Disable most of the ARM vfp / NEON MC tests. These are too fragile to be useful.

I'll work with Jim, Owen, and Bill on an alternative testing strategy until
the assembly parser is available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117530 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/MC/ARM/neon-absdiff-encoding.ll b/test/MC/ARM/neon-absdiff-encoding.ll
index f0adf39467e9a2033f98dbabfd004fe97346fa42..8c649f1576eb688bd8d52f49c5a289076da2c900 100644 (file)
--- a/test/MC/ARM/neon-absdiff-encoding.ll
+++ b/test/MC/ARM/neon-absdiff-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 declare <8 x i8>  @llvm.arm.neon.vabds.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
 declare <4 x i16> @llvm.arm.neon.vabds.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
 declare <2 x i32> @llvm.arm.neon.vabds.v2i32(<2 x i32>, <2 x i32>) nounwind readnone

diff --git a/test/MC/ARM/neon-add-encoding.ll b/test/MC/ARM/neon-add-encoding.ll
index 1bffba0c4f2200fe9690c6b3af6c48fc8917dc3b..62290fb65c999100fda483a5b14187a5c51c95bf 100644 (file)
--- a/test/MC/ARM/neon-add-encoding.ll
+++ b/test/MC/ARM/neon-add-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 ; CHECK: vadd_8xi8
 define <8 x i8> @vadd_8xi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {                                                                          
   %tmp1 = load <8 x i8>* %A

diff --git a/test/MC/ARM/neon-bitwise-encoding.ll b/test/MC/ARM/neon-bitwise-encoding.ll
index 3a3ba9266a8aaf3354141b0e957be491531cc61b..ebfff6025e19e3183ec2f431d02836abb545d0e9 100644 (file)
--- a/test/MC/ARM/neon-bitwise-encoding.ll
+++ b/test/MC/ARM/neon-bitwise-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 ; FIXME: The following instructions still require testing:
 ;  - vand with immediate, vorr with immediate
 ;  - both vbit and vbif

diff --git a/test/MC/ARM/neon-cmp-encoding.ll b/test/MC/ARM/neon-cmp-encoding.ll
index c12bef035bd5c8408628e900aab5d39f0d2f0c59..2600a98639d8beaf8c05cfd948360aa7c7c0c5cc 100644 (file)
--- a/test/MC/ARM/neon-cmp-encoding.ll
+++ b/test/MC/ARM/neon-cmp-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 ; FIXME: We cannot currently test the following instructions, which are 
 ; currently marked as for-disassembly only in the .td files:
 ;  - VCEQz

diff --git a/test/MC/ARM/neon-minmax-encoding.ll b/test/MC/ARM/neon-minmax-encoding.ll
index 913519eb91178a2d83a307dd1e53eb24a885e8cb..6108ab60ec584c2841ab2fdb7a53a12a819dd3e9 100644 (file)
--- a/test/MC/ARM/neon-minmax-encoding.ll
+++ b/test/MC/ARM/neon-minmax-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 declare <8 x i8>  @llvm.arm.neon.vmins.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
 declare <4 x i16> @llvm.arm.neon.vmins.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
 declare <2 x i32> @llvm.arm.neon.vmins.v2i32(<2 x i32>, <2 x i32>) nounwind readnone

diff --git a/test/MC/ARM/neon-mul-accum-encoding.ll b/test/MC/ARM/neon-mul-accum-encoding.ll
index 3543a42fa2d28f9f3166f5a1424f060cf80c9da3..20f93cc5fc5d5cddee59ca61790de20662626d24 100644 (file)
--- a/test/MC/ARM/neon-mul-accum-encoding.ll
+++ b/test/MC/ARM/neon-mul-accum-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 ; CHECK: vmla_8xi8
 define <8 x i8> @vmla_8xi8(<8 x i8>* %A, <8 x i8>* %B, <8 x i8> * %C) nounwind {
        %tmp1 = load <8 x i8>* %A

diff --git a/test/MC/ARM/neon-mul-encoding.ll b/test/MC/ARM/neon-mul-encoding.ll
index 907ff1881c4f9eb8aabb807b1134a07c535ac125..79513a122dddcf54cf70ac3af7b977782c89cfaf 100644 (file)
--- a/test/MC/ARM/neon-mul-encoding.ll
+++ b/test/MC/ARM/neon-mul-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 ; CHECK: vmul_8xi8
 define <8 x i8> @vmul_8xi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
        %tmp1 = load <8 x i8>* %A

diff --git a/test/MC/ARM/neon-pairwise-encoding.ll b/test/MC/ARM/neon-pairwise-encoding.ll
index d8ef1921770d76b2b497fb28c32eb5d1f4a10119..f7fea53c8bf6e417298f39ceb85e774aac57affc 100644 (file)
--- a/test/MC/ARM/neon-pairwise-encoding.ll
+++ b/test/MC/ARM/neon-pairwise-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 declare <8 x i8>  @llvm.arm.neon.vpadd.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
 declare <4 x i16> @llvm.arm.neon.vpadd.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
 declare <2 x i32> @llvm.arm.neon.vpadd.v2i32(<2 x i32>, <2 x i32>) nounwind readnone

diff --git a/test/MC/ARM/neon-reciprocal-encoding.ll b/test/MC/ARM/neon-reciprocal-encoding.ll
index cab5e938079ea0df8283037cafe24cdd927147d0..85fd65f2762820cc047e3bc7bbe999b3faf54bad 100644 (file)
--- a/test/MC/ARM/neon-reciprocal-encoding.ll
+++ b/test/MC/ARM/neon-reciprocal-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 declare <2 x i32> @llvm.arm.neon.vrecpe.v2i32(<2 x i32>) nounwind readnone
 declare <4 x i32> @llvm.arm.neon.vrecpe.v4i32(<4 x i32>) nounwind readnone
 

diff --git a/test/MC/ARM/neon-satshift-encoding.ll b/test/MC/ARM/neon-satshift-encoding.ll
index 4cf6b1d5eace505316536bf334661c5aecf614d2..0f0bee26afc4c5b64cde6c20c427f2cd9fec0652 100644 (file)
--- a/test/MC/ARM/neon-satshift-encoding.ll
+++ b/test/MC/ARM/neon-satshift-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 define <8 x i8> @vqshls8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
        %tmp1 = load <8 x i8>* %A
        %tmp2 = load <8 x i8>* %B

diff --git a/test/MC/ARM/neon-shift-encoding.ll b/test/MC/ARM/neon-shift-encoding.ll
index bc8aeee50925a18e8fc1e18bfca58503cebcf095..8a4780e01613d98e40a86c70815650633ac11c70 100644 (file)
--- a/test/MC/ARM/neon-shift-encoding.ll
+++ b/test/MC/ARM/neon-shift-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 ; CHECK: vshls_8xi8
 define <8 x i8> @vshls_8xi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
        %tmp1 = load <8 x i8>* %A

diff --git a/test/MC/ARM/neon-shiftaccum-encoding.ll b/test/MC/ARM/neon-shiftaccum-encoding.ll
index e2e71092b7b7e688dde018300b5faa29f9d71290..ab6630cf3c17da9823f67f4992ff1c93483980b1 100644 (file)
--- a/test/MC/ARM/neon-shiftaccum-encoding.ll
+++ b/test/MC/ARM/neon-shiftaccum-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 define <8 x i8> @vsras8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
        %tmp1 = load <8 x i8>* %A
        %tmp2 = load <8 x i8>* %B

diff --git a/test/MC/ARM/neon-shuffle-encoding.ll b/test/MC/ARM/neon-shuffle-encoding.ll
index 273a52885995c8130c33fb93a01a81000188e70f..98ccf425c6d00992612a6bc63d085a4644103430 100644 (file)
--- a/test/MC/ARM/neon-shuffle-encoding.ll
+++ b/test/MC/ARM/neon-shuffle-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 define <8 x i8> @test_vextd(<8 x i8>* %A, <8 x i8>* %B) nounwind {
        %tmp1 = load <8 x i8>* %A
        %tmp2 = load <8 x i8>* %B

diff --git a/test/MC/ARM/neon-sub-encoding.ll b/test/MC/ARM/neon-sub-encoding.ll
index 94a2639d202c77c0a2f8bec2ba5ec5e748b952f2..5ebbc63e511313f25b95df334fc3c6240484d31c 100644 (file)
--- a/test/MC/ARM/neon-sub-encoding.ll
+++ b/test/MC/ARM/neon-sub-encoding.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
+
 ; CHECK: vsub_8xi8
 define <8 x i8> @vsub_8xi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
        %tmp1 = load <8 x i8>* %A

diff --git a/test/MC/ARM/neon-table-encoding.ll b/test/MC/ARM/neon-table-encoding.ll
index 1352855fba7b33fe0f9cc83a68e1ab2c06b7c44d..285b0970b212872c0d64a72ad8b7645b60b4c969 100644 (file)
--- a/test/MC/ARM/neon-table-encoding.ll
+++ b/test/MC/ARM/neon-table-encoding.ll
@@ -1,5 +1,6 @@
 ; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
 
+; XFAIL: *
 
 %struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> }
 %struct.__neon_int8x8x3_t = type { <8 x i8>,  <8 x i8>, <8 x i8> }

diff --git a/test/MC/ARM/simple-fp-encoding.ll b/test/MC/ARM/simple-fp-encoding.ll
index b941069244dea97479307ce97dcd6d3a7b6f8eb5..f807757be2d661db15f4573a7c64dc295a585df3 100644 (file)
--- a/test/MC/ARM/simple-fp-encoding.ll
+++ b/test/MC/ARM/simple-fp-encoding.ll
@@ -1,5 +1,6 @@
 ; RUN: llc -mtriple=armv7-apple-darwin -mcpu=cortex-a8 -mattr=-neonfp -show-mc-encoding < %s | FileCheck %s
 
+; XFAIL: *
 
 ; FIXME: Once the ARM integrated assembler is up and going, these sorts of tests
 ;        should run on .s source files rather than using llc to generate the