InVals.push_back(FrameIdxN);
continue;
- } if (VA.isRegLoc()) {
+ }
+
+ if (VA.isRegLoc()) {
// Arguments stored in registers.
EVT RegVT = VA.getLocVT();
SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
SDValue ArgValue;
+ // For NON_EXTLOAD, generic code in getLoad assert(ValVT == MemVT)
ISD::LoadExtType ExtType = ISD::NON_EXTLOAD;
+ MVT MemVT = VA.getValVT();
+
switch (VA.getLocInfo()) {
default:
break;
case CCValAssign::SExt:
ExtType = ISD::SEXTLOAD;
+ MemVT = VA.getLocVT();
break;
case CCValAssign::ZExt:
ExtType = ISD::ZEXTLOAD;
+ MemVT = VA.getLocVT();
break;
case CCValAssign::AExt:
ExtType = ISD::EXTLOAD;
+ MemVT = VA.getLocVT();
break;
}
ArgValue = DAG.getExtLoad(ExtType, DL, VA.getValVT(), Chain, FIN,
MachinePointerInfo::getFixedStack(FI),
- VA.getLocVT(),
- false, false, false, 0);
+ MemVT, false, false, false, 0);
InVals.push_back(ArgValue);
}
; CHECK: ldr {{q[0-9]+}}, [sp]
ret fp128 %arg1
}
+
+; Check if VPR can be correctly pass by stack.
+define <2 x double> @test_vreg_stack([8 x <2 x double>], <2 x double> %varg_stack) {
+entry:
+; CHECK-LABEL: test_vreg_stack:
+; CHECK: ldr {{q[0-9]+}}, [sp]
+ ret <2 x double> %varg_stack;
+}