struct {
unsigned RegNum;
+ bool Writeback;
} Reg;
// This is for all forms of ARM address expressions
return Res;
}
- static ARMOperand CreateReg(unsigned RegNum) {
+ static ARMOperand CreateReg(unsigned RegNum, bool Writeback) {
ARMOperand Res;
Res.Kind = Register;
Res.Reg.RegNum = RegNum;
+ Res.Reg.Writeback = Writeback;
return Res;
}
RegNum = MatchRegisterName(Tok.getString());
if (RegNum == 0)
return true;
-
- Op = ARMOperand::CreateReg(RegNum);
getLexer().Lex(); // Eat identifier token.
+ bool Writeback = false;
+ const AsmToken &ExclaimTok = getLexer().getTok();
+ if (ExclaimTok.is(AsmToken::Exclaim)) {
+ Writeback = true;
+ getLexer().Lex(); // Eat exclaim token
+ }
+
+ Op = ARMOperand::CreateReg(RegNum, Writeback);
+
return false;
}
return 2;
else if (Name == "r3")
return 3;
+ else if (Name == "sp")
+ return 13;
return 0;
}
assert(Op0.Kind == ARMOperand::Token && "First operand not a Token");
const StringRef &Mnemonic = Op0.getToken();
if (Mnemonic == "add" ||
+ Mnemonic == "stmfd" ||
+ Mnemonic == "str" ||
+ Mnemonic == "ldmfd" ||
Mnemonic == "ldr")
return false;