drm/i915: Parametrize DDI_BUF_TRANS registers
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 18 Sep 2015 17:03:22 +0000 (20:03 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 23 Sep 2015 15:15:44 +0000 (17:15 +0200)
FIXME: Should there be a WARN(i != 9) or something, or what does the
entry 9 comment mean?

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_ddi.c

index dad7307932be65e2407cde518cfb1822fd733c87..56157eb8719b91d7b396f76904bf7733a2e0cfae 100644 (file)
@@ -7197,7 +7197,8 @@ enum skl_disp_power_wells {
 /* DDI Buffer Translations */
 #define DDI_BUF_TRANS_A                                0x64E00
 #define DDI_BUF_TRANS_B                                0x64E60
-#define DDI_BUF_TRANS(port) _PORT(port, DDI_BUF_TRANS_A, DDI_BUF_TRANS_B)
+#define DDI_BUF_TRANS_LO(port, i) (_PORT(port, DDI_BUF_TRANS_A, DDI_BUF_TRANS_B) + (i) * 8)
+#define DDI_BUF_TRANS_HI(port, i) (_PORT(port, DDI_BUF_TRANS_A, DDI_BUF_TRANS_B) + (i) * 8 + 4)
 
 /* Sideband Interface (SBI) is programmed indirectly, via
  * SBI_ADDR, which contains the register offset; and SBI_DATA,
index 5b600bf1adcbed117a5cdda373e0000d3115751b..9e640eafc50d2e52f7fe2c2ded012e7dab01d4bc 100644 (file)
@@ -414,7 +414,6 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port,
                                      bool supports_hdmi)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
-       u32 reg;
        u32 iboost_bit = 0;
        int i, n_hdmi_entries, n_dp_entries, n_edp_entries, hdmi_default_entry,
            size;
@@ -505,11 +504,11 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port,
                BUG();
        }
 
-       for (i = 0, reg = DDI_BUF_TRANS(port); i < size; i++) {
-               I915_WRITE(reg, ddi_translations[i].trans1 | iboost_bit);
-               reg += 4;
-               I915_WRITE(reg, ddi_translations[i].trans2);
-               reg += 4;
+       for (i = 0; i < size; i++) {
+               I915_WRITE(DDI_BUF_TRANS_LO(port, i),
+                          ddi_translations[i].trans1 | iboost_bit);
+               I915_WRITE(DDI_BUF_TRANS_HI(port, i),
+                          ddi_translations[i].trans2);
        }
 
        if (!supports_hdmi)
@@ -521,10 +520,10 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port,
                hdmi_level = hdmi_default_entry;
 
        /* Entry 9 is for HDMI: */
-       I915_WRITE(reg, ddi_translations_hdmi[hdmi_level].trans1 | iboost_bit);
-       reg += 4;
-       I915_WRITE(reg, ddi_translations_hdmi[hdmi_level].trans2);
-       reg += 4;
+       I915_WRITE(DDI_BUF_TRANS_LO(port, i),
+                  ddi_translations_hdmi[hdmi_level].trans1 | iboost_bit);
+       I915_WRITE(DDI_BUF_TRANS_HI(port, i),
+                  ddi_translations_hdmi[hdmi_level].trans2);
 }
 
 /* Program DDI buffers translations for DP. By default, program ports A-D in DP