print target nodes nicely

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34369 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index 9daf18150b99a56c1ef043652b76f405d55a89ba..ca256deeaf7a96a3a18d56aa1a41e8cb10e71cbe 100644 (file)
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -307,7 +307,7 @@ void ScheduleDAG::AddOperand(MachineInstr *MI, SDOperand Op,
         cerr << "Register class of operand and regclass of use don't agree!\n";
 #ifndef NDEBUG
         cerr << "Operand = " << IIOpNum << "\n";
-        cerr << "Op->Val = "; Op.Val->dump(0); cerr << "\n";
+        cerr << "Op->Val = "; Op.Val->dump(&DAG); cerr << "\n";
         cerr << "MI = "; MI->print(cerr);
         cerr << "VReg = " << VReg << "\n";
         cerr << "VReg RegClass     size = " << VRC->getSize()