Add storeRegTo{StackSlot|Addr} and loadRegFrom{StackSlot|Addr} descriptions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58164 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index 0bcda44b9706325297b4bf27cb33c3bfe37eef6a..2fdcf8b660c9dadf1860b2bb0a12083c65a23a82 100644 (file)
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -232,6 +232,11 @@ public:
     return false;
   }
   
+  /// storeRegToStackSlot - Store the specified register of the given register
+  /// class to the specified stack frame index. The store instruction is to be
+  /// added to the given machine basic block before the specified machine
+  /// instruction. If isKill is true, the register operand is the last use and
+  /// must be marked kill.
   virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
                                    MachineBasicBlock::iterator MI,
                                    unsigned SrcReg, bool isKill, int FrameIndex,
@@ -239,6 +244,11 @@ public:
     assert(0 && "Target didn't implement TargetInstrInfo::storeRegToStackSlot!");
   }
 
+  /// storeRegToAddr - Store the specified register of the given register class
+  /// to the specified address. The store instruction is to be added to the
+  /// given machine basic block before the specified machine instruction. If
+  /// isKill is true, the register operand is the last use and must be marked
+  /// kill.
   virtual void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
                               SmallVectorImpl<MachineOperand> &Addr,
                               const TargetRegisterClass *RC,
@@ -246,6 +256,10 @@ public:
     assert(0 && "Target didn't implement TargetInstrInfo::storeRegToAddr!");
   }
 
+  /// loadRegFromStackSlot - Load the specified register of the given register
+  /// class from the specified stack frame index. The load instruction is to be
+  /// added to the given machine basic block before the specified machine
+  /// instruction.
   virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
                                     MachineBasicBlock::iterator MI,
                                     unsigned DestReg, int FrameIndex,
@@ -253,6 +267,9 @@ public:
     assert(0 && "Target didn't implement TargetInstrInfo::loadRegFromStackSlot!");
   }
 
+  /// loadRegFromAddr - Load the specified register of the given register class
+  /// class from the specified address. The load instruction is to be added to
+  /// the given machine basic block before the specified machine instruction.
   virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
                                SmallVectorImpl<MachineOperand> &Addr,
                                const TargetRegisterClass *RC,