Fix a bug in MipsTargetLowering::LowerLOAD. A shift-right-logical node is

inserted after the shift-left-logical node.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157937 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index d44bdca03d778e0d8e3575a6bcfbddc90a48c057..1793a0fa21852d7e7e61990af9d6ba79f37c6a60 100644 (file)
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -2144,7 +2144,8 @@ SDValue MipsTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
   DebugLoc DL = LD->getDebugLoc();
   SDValue Const32 = DAG.getConstant(32, MVT::i32);
   SDValue SLL = DAG.getNode(ISD::SHL, DL, MVT::i64, LWR, Const32);
-  SDValue Ops[] = { SLL, LWR.getValue(1) };
+  SDValue SRL = DAG.getNode(ISD::SRL, DL, MVT::i64, SLL, Const32);
+  SDValue Ops[] = { SRL, LWR.getValue(1) };
   return DAG.getMergeValues(Ops, 2, DL);
 }