hoist some funky logic into CodeGenInstruction

from two places in CodeGenDAGPatterns.cpp, and
use it in DAGISelMatcherGen.cpp instead of using
an incorrect predicate that happened to get lucky
on our current targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99726 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/utils/TableGen/CodeGenDAGPatterns.cpp b/utils/TableGen/CodeGenDAGPatterns.cpp
index ba9a98d8dd12e0242d84307de3a6ef53490832fe..b030800c9ee1b6c774494ca4a85bc660eb21c133 100644 (file)
--- a/utils/TableGen/CodeGenDAGPatterns.cpp
+++ b/utils/TableGen/CodeGenDAGPatterns.cpp
@@ -779,15 +779,9 @@ static unsigned GetNumNodeResults(Record *Operator, CodeGenDAGPatterns &CDP) {
     // FIXME: Should allow access to all the results here.
     unsigned NumDefsToAdd = InstInfo.NumDefs ? 1 : 0;
     
-    if (!InstInfo.ImplicitDefs.empty()) {
-      // Add on one implicit def if it has a resolvable type.
-      Record *FirstImplicitDef = InstInfo.ImplicitDefs[0];
-      assert(FirstImplicitDef->isSubClassOf("Register"));
-      const std::vector<MVT::SimpleValueType> &RegVTs = 
-      CDP.getTargetInfo().getRegisterVTs(FirstImplicitDef);
-      if (RegVTs.size() == 1)
-        return NumDefsToAdd+1;
-    }
+    // Add on one implicit def if it has a resolvable type.
+    if (InstInfo.HasOneImplicitDefWithKnownVT(CDP.getTargetInfo()) !=MVT::Other)
+      ++NumDefsToAdd;
     return NumDefsToAdd;
   }
   
@@ -1279,12 +1273,13 @@ bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) {
     if (!InstInfo.ImplicitDefs.empty()) {
       unsigned ResNo = NumResultsToAdd;
       
-      Record *FirstImplicitDef = InstInfo.ImplicitDefs[0];
-      assert(FirstImplicitDef->isSubClassOf("Register"));
-      const std::vector<MVT::SimpleValueType> &RegVTs = 
-        CDP.getTargetInfo().getRegisterVTs(FirstImplicitDef);
-      if (RegVTs.size() == 1)   // FIXME: Generalize.
-        MadeChange |= UpdateNodeType(ResNo, EEVT::TypeSet(RegVTs), TP);
+      // FIXME: Generalize to multiple possible types and multiple possible
+      // ImplicitDefs.
+      MVT::SimpleValueType VT =
+        InstInfo.HasOneImplicitDefWithKnownVT(CDP.getTargetInfo());
+      
+      if (VT != MVT::Other)
+        MadeChange |= UpdateNodeType(ResNo, VT, TP);
     }
     
     // If this is an INSERT_SUBREG, constrain the source and destination VTs to

diff --git a/utils/TableGen/CodeGenInstruction.cpp b/utils/TableGen/CodeGenInstruction.cpp
index eea55618721e51d7bbb79aa85cf2e7c5a0cd925f..99d196c3ceb435722fce8c81d0af5c3a2144bf9c 100644 (file)
--- a/utils/TableGen/CodeGenInstruction.cpp
+++ b/utils/TableGen/CodeGenInstruction.cpp
@@ -12,6 +12,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "CodeGenInstruction.h"
+#include "CodeGenTarget.h"
 #include "Record.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/STLExtras.h"
@@ -294,3 +295,22 @@ CodeGenInstruction::ParseOperandName(const std::string &Op,
   // Otherwise, didn't find it!
   throw TheDef->getName() + ": unknown suboperand name in '" + Op + "'";
 }
+
+
+/// HasOneImplicitDefWithKnownVT - If the instruction has at least one
+/// implicit def and it has a known VT, return the VT, otherwise return
+/// MVT::Other.
+MVT::SimpleValueType CodeGenInstruction::
+HasOneImplicitDefWithKnownVT(const CodeGenTarget &TargetInfo) const {
+  if (ImplicitDefs.empty()) return MVT::Other;
+  
+  // Check to see if the first implicit def has a resolvable type.
+  Record *FirstImplicitDef = ImplicitDefs[0];
+  assert(FirstImplicitDef->isSubClassOf("Register"));
+  const std::vector<MVT::SimpleValueType> &RegVTs = 
+    TargetInfo.getRegisterVTs(FirstImplicitDef);
+  if (RegVTs.size() == 1)
+    return RegVTs[0];
+  return MVT::Other;
+}
+

diff --git a/utils/TableGen/CodeGenInstruction.h b/utils/TableGen/CodeGenInstruction.h
index c369123dd6948006c2357971a4e31816e6b9cf0d..946c2d01a52fc00bcbf32ab484cc7472163c99c9 100644 (file)
--- a/utils/TableGen/CodeGenInstruction.h
+++ b/utils/TableGen/CodeGenInstruction.h
@@ -22,6 +22,7 @@
 namespace llvm {
   class Record;
   class DagInit;
+  class CodeGenTarget;
 
   class CodeGenInstruction {
   public:
@@ -183,6 +184,12 @@ namespace llvm {
     /// non-empty name.  If the instruction does not have an operand with the
     /// specified name, throw an exception.
     unsigned getOperandNamed(const std::string &Name) const;
+    
+    /// HasOneImplicitDefWithKnownVT - If the instruction has at least one
+    /// implicit def and it has a known VT, return the VT, otherwise return
+    /// MVT::Other.
+    MVT::SimpleValueType 
+      HasOneImplicitDefWithKnownVT(const CodeGenTarget &TargetInfo) const;
   };
 }
 

diff --git a/utils/TableGen/DAGISelMatcherGen.cpp b/utils/TableGen/DAGISelMatcherGen.cpp
index f7fd493cd30268771d43fe8b4e22dc4d3bcf050e..f0f8706489338e80d0436a1ba283efd1e02c31ae 100644 (file)
--- a/utils/TableGen/DAGISelMatcherGen.cpp
+++ b/utils/TableGen/DAGISelMatcherGen.cpp
@@ -733,8 +733,7 @@ EmitResultInstructionAsOperand(const TreePatternNode *N,
     // If the root came from an implicit def in the instruction handling stuff,
     // don't re-add it.
     Record *HandledReg = 0;
-    if (N->getNumTypes() != 0 &&
-        !II.ImplicitDefs.empty())
+    if (II.HasOneImplicitDefWithKnownVT(CGT) != MVT::Other)
       HandledReg = II.ImplicitDefs[0];
     
     for (unsigned i = 0; i != Pattern.getDstRegs().size(); ++i) {