Whoops, got my cases swapped.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11526 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/PeepholeOptimizer.cpp b/lib/Target/X86/PeepholeOptimizer.cpp
index 4d90baa071de0bddb244194caa5235aecd0e0ccc..e2b4a46d0cf1f8a52cf4acdbd6c51244dc00c8a7 100644 (file)
--- a/lib/Target/X86/PeepholeOptimizer.cpp
+++ b/lib/Target/X86/PeepholeOptimizer.cpp
@@ -146,12 +146,8 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
         case X86::XORri32:  Opcode = X86::XORri32b; break;
         }
         unsigned R0 = MI->getOperand(0).getReg();
-        unsigned Scale = MI->getOperand(1).getImmedValue();
-        unsigned R1 = MI->getOperand(2).getReg();
-        unsigned Offset = MI->getOperand(3).getImmedValue();
         I = MBB.insert(MBB.erase(I),
-                       BuildMI(Opcode, 5).addReg(R0).addZImm(Scale).
-                             addReg(R1).addSImm(Offset).addZImm((char)Val));
+                    BuildMI(Opcode, 1, R0, MOTy::UseAndDef).addZImm((char)Val));
         return true;
       }
     }
@@ -171,8 +167,12 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
         case X86::ANDmi32:  Opcode = X86::ANDmi32b; break;
         }
         unsigned R0 = MI->getOperand(0).getReg();
+        unsigned Scale = MI->getOperand(1).getImmedValue();
+        unsigned R1 = MI->getOperand(2).getReg();
+        unsigned Offset = MI->getOperand(3).getImmedValue();
         I = MBB.insert(MBB.erase(I),
-                    BuildMI(Opcode, 1, R0, MOTy::UseAndDef).addZImm((char)Val));
+                       BuildMI(Opcode, 5).addReg(R0).addZImm(Scale).
+                             addReg(R1).addSImm(Offset).addZImm((char)Val));
         return true;
       }
     }

diff --git a/lib/Target/X86/X86PeepholeOpt.cpp b/lib/Target/X86/X86PeepholeOpt.cpp
index 4d90baa071de0bddb244194caa5235aecd0e0ccc..e2b4a46d0cf1f8a52cf4acdbd6c51244dc00c8a7 100644 (file)
--- a/lib/Target/X86/X86PeepholeOpt.cpp
+++ b/lib/Target/X86/X86PeepholeOpt.cpp
@@ -146,12 +146,8 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
         case X86::XORri32:  Opcode = X86::XORri32b; break;
         }
         unsigned R0 = MI->getOperand(0).getReg();
-        unsigned Scale = MI->getOperand(1).getImmedValue();
-        unsigned R1 = MI->getOperand(2).getReg();
-        unsigned Offset = MI->getOperand(3).getImmedValue();
         I = MBB.insert(MBB.erase(I),
-                       BuildMI(Opcode, 5).addReg(R0).addZImm(Scale).
-                             addReg(R1).addSImm(Offset).addZImm((char)Val));
+                    BuildMI(Opcode, 1, R0, MOTy::UseAndDef).addZImm((char)Val));
         return true;
       }
     }
@@ -171,8 +167,12 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
         case X86::ANDmi32:  Opcode = X86::ANDmi32b; break;
         }
         unsigned R0 = MI->getOperand(0).getReg();
+        unsigned Scale = MI->getOperand(1).getImmedValue();
+        unsigned R1 = MI->getOperand(2).getReg();
+        unsigned Offset = MI->getOperand(3).getImmedValue();
         I = MBB.insert(MBB.erase(I),
-                    BuildMI(Opcode, 1, R0, MOTy::UseAndDef).addZImm((char)Val));
+                       BuildMI(Opcode, 5).addReg(R0).addZImm(Scale).
+                             addReg(R1).addSImm(Offset).addZImm((char)Val));
         return true;
       }
     }