Dump routine now writes out allocated register numbers if available.
authorVikram S. Adve <vadve@cs.uiuc.edu>
Mon, 16 Sep 2002 15:18:53 +0000 (15:18 +0000)
committerVikram S. Adve <vadve@cs.uiuc.edu>
Mon, 16 Sep 2002 15:18:53 +0000 (15:18 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3737 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/MachineInstr.cpp

index d3608c13208d785ac411233f35843d82b245ae7f..e12922e4c87547468f054d97e3207c7612c09b52 100644 (file)
@@ -112,8 +112,8 @@ MachineInstr::dump() const
   cerr << "  " << *this;
 }
 
-static inline std::ostream &OutputValue(std::ostream &os,
-                                        const Value* val)
+static inline std::ostream&
+OutputValue(std::ostream &os, const Value* val)
 {
   os << "(val ";
   if (val && val->hasName())
@@ -122,6 +122,12 @@ static inline std::ostream &OutputValue(std::ostream &os,
     return os << (void*) val << ")";              // print address only
 }
 
+static inline std::ostream&
+OutputReg(std::ostream &os, unsigned int regNum)
+{
+  return os << "%mreg(" << regNum << ")";
+}
+
 std::ostream &operator<<(std::ostream& os, const MachineInstr& minstr)
 {
   os << TargetInstrDescriptors[minstr.opCode].opCodeString;
@@ -165,14 +171,17 @@ std::ostream &operator<<(std::ostream &os, const MachineOperand &mop)
     case MachineOperand::MO_VirtualRegister:
       os << "%reg";
       OutputValue(os, mop.getVRegValue());
+      if (mop.hasAllocatedReg())
+        os << "==" << OutputReg(os, mop.getAllocatedRegNum());
       break;
     case MachineOperand::MO_CCRegister:
       os << "%ccreg";
       OutputValue(os, mop.getVRegValue());
+      if (mop.hasAllocatedReg())
+        os << "==" << OutputReg(os, mop.getAllocatedRegNum());
       break;
     case MachineOperand::MO_MachineRegister:
-      os << "%reg";
-      os << "(" << mop.getMachineRegNum() << ")";
+      OutputReg(os, mop.getMachineRegNum());
       break;
     case MachineOperand::MO_SignExtendedImmed:
       os << (long)mop.immedVal;