Moved definition of invertPPCBranchOpcode() into PowerPCInstrInfo class.

Patch by Nate Begeman.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15281 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PowerPCInstrInfo.h b/lib/Target/PowerPC/PowerPCInstrInfo.h
index dee7c070c35074b6b517e248d91329ad41b155f3..89ccdafeeae4898ca4261480dc7070a5a0751482 100644 (file)
--- a/lib/Target/PowerPC/PowerPCInstrInfo.h
+++ b/lib/Target/PowerPC/PowerPCInstrInfo.h
@@ -14,8 +14,9 @@
 #ifndef POWERPCINSTRUCTIONINFO_H
 #define POWERPCINSTRUCTIONINFO_H
 
-#include "llvm/Target/TargetInstrInfo.h"
+#include "PowerPC.h"
 #include "PowerPCRegisterInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 
 namespace llvm {
 
@@ -79,6 +80,18 @@ public:
   virtual bool isMoveInstr(const MachineInstr& MI,
                            unsigned& sourceReg,
                            unsigned& destReg) const;
+
+  static unsigned invertPPCBranchOpcode(unsigned Opcode) {
+    switch (Opcode) {
+    default: assert(0 && "Unknown PPC32 branch opcode!");
+    case PPC32::BEQ: return PPC32::BNE;
+    case PPC32::BNE: return PPC32::BEQ;
+    case PPC32::BLT: return PPC32::BGE;
+    case PPC32::BGE: return PPC32::BLT;
+    case PPC32::BGT: return PPC32::BLE;
+    case PPC32::BLE: return PPC32::BGT;
+    } 
+  }
 };
 
 }