ARM VFP assembly parsing for VADD and VSUB two-operand forms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144710 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrVFP.td b/lib/Target/ARM/ARMInstrVFP.td
index 7c0048af99bd0de737cb57aad383df0c4bdc1063..e4201355f7bdb3f1ba0561862fc2fcdfce77ca4e 100644 (file)
--- a/lib/Target/ARM/ARMInstrVFP.td
+++ b/lib/Target/ARM/ARMInstrVFP.td
@@ -1178,6 +1178,16 @@ def : VFP2InstAlias<"vmul${p}.f64 $Dn, $Dm",
                     (VMULD DPR:$Dn, DPR:$Dn, DPR:$Dm, pred:$p)>;
 def : VFP2InstAlias<"vmul${p}.f32 $Sn, $Sm",
                     (VMULS SPR:$Sn, SPR:$Sn, SPR:$Sm, pred:$p)>;
+// VADD has a two-operand form (implied destination operand)
+def : VFP2InstAlias<"vadd${p}.f64 $Dn, $Dm",
+                    (VADDD DPR:$Dn, DPR:$Dn, DPR:$Dm, pred:$p)>;
+def : VFP2InstAlias<"vadd${p}.f32 $Sn, $Sm",
+                    (VADDS SPR:$Sn, SPR:$Sn, SPR:$Sm, pred:$p)>;
+// VSUB has a two-operand form (implied destination operand)
+def : VFP2InstAlias<"vsub${p}.f64 $Dn, $Dm",
+                    (VSUBD DPR:$Dn, DPR:$Dn, DPR:$Dm, pred:$p)>;
+def : VFP2InstAlias<"vsub${p}.f32 $Sn, $Sm",
+                    (VSUBS SPR:$Sn, SPR:$Sn, SPR:$Sm, pred:$p)>;
 
 // VMOV can accept optional .f32/.f64 suffix.
 def : VFP2InstAlias<"vmov${p}.f32 $Rt, $Sn",