video: rockchip: hdmi: v2: phy support clk 59.4MHz

Change-Id: Ibce9bcd09fa8011642c7a9e8de9f4b3471c23e8b
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>

diff --git a/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c b/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c
index 59c2955fdcb3cd67f4dc293be823ff7c33cd9f8e..e0cfc4e628ceccbf87880aae78c064b062f1c326 100755 (executable)
--- a/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c
+++ b/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c
@@ -19,6 +19,14 @@ static const struct phy_mpll_config_tab PHY_MPLL_TABLE[] = {
                3,      3,      0,      3,      3,      0,      0},
        {27000000,      54000000,       0,      16,     3,      0,      0,
                2,      3,      0,      2,      5,      0,      1},
+       {59400000,      59400000,       0,      8,      0,      0,      0,
+               1,      3,      0,      2,      5,      0,      1},
+       {59400000,      74250000,       0,      10,     1,      0,      0,
+               5,      0,      0,      2,      5,      0,      1},
+       {59400000,      89100000,       0,      12,     2,      0,      0,
+               2,      2,      0,      2,      5,      0,      1},
+       {59400000,      118800000,      0,      16,     3,      0,      0,
+               1,      3,      0,      1,      7,      0,      2},
        {65000000,      65000000,       0,      8,      0,      0,      0,
                1,      3,      0,      2,      5,      0,      1},
 /*     {74250000,      74250000,       0,      8,      0,      0,      0,