E: balasub@cis.ohio-state.edu
D: Wrote SYS V IPC (part of standard kernel since 0.99.10)
+N: Chris Ball
+E: chris@printf.net
+D: Former maintainer of the MMC/SD/SDIO subsystem.
+
N: Dario Ballabio
E: ballabio_dario@emc.com
E: dario.ballabio@tiscalinet.it
--- /dev/null
+# Note: This documents additional properties of any device beyond what
+# is documented in Documentation/sysfs-rules.txt
+
+What: /sys/devices/*/of_path
+Date: February 2015
+Contact: Device Tree mailing list <devicetree@vger.kernel.org>
+Description:
+ Any device associated with a device-tree node will have
+ an of_path symlink pointing to the corresponding device
+ node in /sys/firmware/devicetree/
--- /dev/null
+What: /config/usb-gadget/gadget/functions/printer.name
+Date: Apr 2015
+KernelVersion: 4.1
+Description:
+ The attributes:
+
+ pnp_string - Data to be passed to the host in pnp string
+ q_len - Number of requests per endpoint
+
What: /sys/bus/iio/devices/iio:deviceX/in_pressureY_offset
What: /sys/bus/iio/devices/iio:deviceX/in_pressure_offset
What: /sys/bus/iio/devices/iio:deviceX/in_humidityrelative_offset
+What: /sys/bus/iio/devices/iio:deviceX/in_magn_offset
+What: /sys/bus/iio/devices/iio:deviceX/in_rot_offset
KernelVersion: 2.6.35
Contact: linux-iio@vger.kernel.org
Description:
What: /sys/bus/iio/devices/iio:deviceX/in_pressure_scale
What: /sys/bus/iio/devices/iio:deviceX/in_humidityrelative_scale
What: /sys/bus/iio/devices/iio:deviceX/in_velocity_sqrt(x^2+y^2+z^2)_scale
+What: /sys/bus/iio/devices/iio:deviceX/in_illuminance_scale
KernelVersion: 2.6.35
Contact: linux-iio@vger.kernel.org
Description:
what /sys/bus/iio/devices/iio:deviceX/in_proximity0_calibscale
What: /sys/bus/iio/devices/iio:deviceX/in_pressureY_calibscale
What: /sys/bus/iio/devices/iio:deviceX/in_pressure_calibscale
+What: /sys/bus/iio/devices/iio:deviceX/in_illuminance_calibscale
KernelVersion: 2.6.35
Contact: linux-iio@vger.kernel.org
Description:
What: /sys/bus/iio/devices/iio:deviceX/in_energy_calibgender
What: /sys/bus/iio/devices/iio:deviceX/in_distance_calibgender
What: /sys/bus/iio/devices/iio:deviceX/in_velocity_calibgender
-KernelVersion: 3.20
+KernelVersion: 4.0
Contact: linux-iio@vger.kernel.org
Description:
Gender of the user (e.g.: male, female) used by some pedometers
What: /sys/bus/iio/devices/iio:deviceX/in_energy_calibgender_available
What: /sys/bus/iio/devices/iio:deviceX/in_distance_calibgender_available
What: /sys/bus/iio/devices/iio:deviceX/in_velocity_calibgender_available
-KernelVersion: 3.20
+KernelVersion: 4.0
Contact: linux-iio@vger.kernel.org
Description:
Lists all available gender values (e.g.: male, female).
type.
What: /sys/bus/iio/devices/iio:deviceX/in_energy_calibweight
-KernelVersion: 3.20
+KernelVersion: 4.0
Contact: linux-iio@vger.kernel.org
Description:
Weight of the user (in kg). It is needed by some pedometers
a given event type is enabled a future point (and not those for
whatever event was previously enabled).
+What: /sys/.../events/in_accel_thresh_rising_value
+What: /sys/.../events/in_accel_thresh_falling_value
What: /sys/.../events/in_accel_x_raw_thresh_rising_value
What: /sys/.../events/in_accel_x_raw_thresh_falling_value
What: /sys/.../events/in_accel_y_raw_thresh_rising_value
value is in raw device units or in processed units (as _raw
and _input do on sysfs direct channel read attributes).
+What: /sys/.../events/in_accel_scale
+What: /sys/.../events/in_accel_peak_scale
+What: /sys/.../events/in_anglvel_scale
+What: /sys/.../events/in_magn_scale
+What: /sys/.../events/in_rot_from_north_magnetic_scale
+What: /sys/.../events/in_rot_from_north_true_scale
+What: /sys/.../events/in_voltage_scale
+What: /sys/.../events/in_voltage_supply_scale
+What: /sys/.../events/in_temp_scale
+What: /sys/.../events/in_illuminance_scale
+What: /sys/.../events/in_proximity_scale
+KernelVersion: 3.21
+Contact: linux-iio@vger.kernel.org
+Description:
+ Specifies the conversion factor from the standard units
+ to device specific units used to set the event trigger
+ threshold.
+
What: /sys/.../events/in_accel_x_thresh_rising_hysteresis
What: /sys/.../events/in_accel_x_thresh_falling_hysteresis
What: /sys/.../events/in_accel_x_thresh_either_hysteresis
What: /sys/.../events/in_accel_x_thresh_rising_period
What: /sys/.../events/in_accel_x_thresh_falling_period
-hat: /sys/.../events/in_accel_x_roc_rising_period
+What: /sys/.../events/in_accel_x_roc_rising_period
What: /sys/.../events/in_accel_x_roc_falling_period
What: /sys/.../events/in_accel_y_thresh_rising_period
What: /sys/.../events/in_accel_y_thresh_falling_period
this type.
What: /sys/.../events/in_steps_change_en
-KernelVersion: 3.20
+KernelVersion: 4.0
Contact: linux-iio@vger.kernel.org
Description:
Event generated when channel passes a threshold on the absolute
in_steps_change_value.
What: /sys/.../events/in_steps_change_value
-KernelVersion: 3.20
+KernelVersion: 4.0
Contact: linux-iio@vger.kernel.org
Description:
Specifies the value of change threshold that the
What: /sys/.../iio:deviceX/scan_elements/in_pressureY_en
What: /sys/.../iio:deviceX/scan_elements/in_pressure_en
What: /sys/.../iio:deviceX/scan_elements/in_rot_quaternion_en
+What: /sys/.../iio:deviceX/scan_elements/in_proximity_en
KernelVersion: 2.6.37
Contact: linux-iio@vger.kernel.org
Description:
What: /sys/.../iio:deviceX/scan_elements/in_pressureY_type
What: /sys/.../iio:deviceX/scan_elements/in_pressure_type
What: /sys/.../iio:deviceX/scan_elements/in_rot_quaternion_type
+What: /sys/.../iio:deviceX/scan_elements/in_proximity_type
KernelVersion: 2.6.37
Contact: linux-iio@vger.kernel.org
Description:
What: /sys/.../iio:deviceX/scan_elements/in_pressureY_index
What: /sys/.../iio:deviceX/scan_elements/in_pressure_index
What: /sys/.../iio:deviceX/scan_elements/in_rot_quaternion_index
+What: /sys/.../iio:deviceX/scan_elements/in_proximity_index
KernelVersion: 2.6.37
Contact: linux-iio@vger.kernel.org
Description:
What: /sys/.../iio:deviceX/in_energy_input
What: /sys/.../iio:deviceX/in_energy_raw
-KernelVersion: 3.20
+KernelVersion: 4.0
Contact: linux-iio@vger.kernel.org
Description:
This attribute is used to read the energy value reported by the
What: /sys/.../iio:deviceX/in_distance_input
What: /sys/.../iio:deviceX/in_distance_raw
-KernelVersion: 3.20
+KernelVersion: 4.0
Contact: linux-iio@vger.kernel.org
Description:
This attribute is used to read the distance covered by the user
values should behave in the same way as a distance, i.e. lower
values indicate something is closer to the sensor.
+What: /sys/.../iio:deviceX/in_illuminance_input
+What: /sys/.../iio:deviceX/in_illuminance_raw
What: /sys/.../iio:deviceX/in_illuminanceY_input
What: /sys/.../iio:deviceX/in_illuminanceY_raw
What: /sys/.../iio:deviceX/in_illuminanceY_mean_raw
+What: /sys/.../iio:deviceX/in_illuminance_ir_raw
+What: /sys/.../iio:deviceX/in_illuminance_clear_raw
KernelVersion: 3.4
Contact: linux-iio@vger.kernel.org
Description:
seconds.
What: /sys/.../iio:deviceX/in_velocity_sqrt(x^2+y^2+z^2)_integration_time
-KernelVersion: 3.20
+KernelVersion: 4.0
Contact: linux-iio@vger.kernel.org
Description:
Number of seconds in which to compute speed.
Units after application of scale are m/s.
What: /sys/.../iio:deviceX/in_steps_debounce_count
-KernelVersion: 3.20
+KernelVersion: 4.0
Contact: linux-iio@vger.kernel.org
Description:
Specifies the number of steps that must occur within
consumer is making steps.
What: /sys/.../iio:deviceX/in_steps_debounce_time
-KernelVersion: 3.20
+KernelVersion: 4.0
Contact: linux-iio@vger.kernel.org
Description:
Specifies number of seconds in which we compute the steps
that occur in order to decide if the consumer is making steps.
+
+What: /sys/bus/iio/devices/iio:deviceX/buffer/watermark
+KernelVersion: 4.2
+Contact: linux-iio@vger.kernel.org
+Description:
+ A single positive integer specifying the maximum number of scan
+ elements to wait for.
+ Poll will block until the watermark is reached.
+ Blocking read will wait until the minimum between the requested
+ read amount or the low water mark is available.
+ Non-blocking read will retrieve the available samples from the
+ buffer even if there are less samples then watermark level. This
+ allows the application to block on poll with a timeout and read
+ the available samples after the timeout expires and thus have a
+ maximum delay guarantee.
+
+What: /sys/bus/iio/devices/iio:deviceX/buffer/hwfifo_enabled
+KernelVersion: 4.2
+Contact: linux-iio@vger.kernel.org
+Description:
+ A read-only boolean value that indicates if the hardware fifo is
+ currently enabled or disabled. If the device does not have a
+ hardware fifo this entry is not present.
+ The hardware fifo is enabled when the buffer is enabled if the
+ current hardware fifo watermark level is set and other current
+ device settings allows it (e.g. if a trigger is set that samples
+ data differently that the hardware fifo does then hardware fifo
+ will not enabled).
+ If the hardware fifo is enabled and the level of the hardware
+ fifo reaches the hardware fifo watermark level the device will
+ flush its hardware fifo to the device buffer. Doing a non
+ blocking read on the device when no samples are present in the
+ device buffer will also force a flush.
+ When the hardware fifo is enabled there is no need to use a
+ trigger to use buffer mode since the watermark settings
+ guarantees that the hardware fifo is flushed to the device
+ buffer.
+
+What: /sys/bus/iio/devices/iio:deviceX/buffer/hwfifo_watermark
+KernelVersion: 4.2
+Contact: linux-iio@vger.kernel.org
+Description:
+ Read-only entry that contains a single integer specifying the
+ current watermark level for the hardware fifo. If the device
+ does not have a hardware fifo this entry is not present.
+ The watermark level for the hardware fifo is set by the driver
+ based on the value set by the user in buffer/watermark but
+ taking into account hardware limitations (e.g. most hardware
+ buffers are limited to 32-64 samples, some hardware buffers
+ watermarks are fixed or have minimum levels). A value of 0
+ means that the hardware watermark is unset.
+
+What: /sys/bus/iio/devices/iio:deviceX/buffer/hwfifo_watermark_min
+KernelVersion: 4.2
+Contact: linux-iio@vger.kernel.org
+Description:
+ A single positive integer specifying the minimum watermark level
+ for the hardware fifo of this device. If the device does not
+ have a hardware fifo this entry is not present.
+ If the user sets buffer/watermark to a value less than this one,
+ then the hardware watermark will remain unset.
+
+What: /sys/bus/iio/devices/iio:deviceX/buffer/hwfifo_watermark_max
+KernelVersion: 4.2
+Contact: linux-iio@vger.kernel.org
+Description:
+ A single positive integer specifying the maximum watermark level
+ for the hardware fifo of this device. If the device does not
+ have a hardware fifo this entry is not present.
+ If the user sets buffer/watermark to a value greater than this
+ one, then the hardware watermark will be capped at this value.
+
+What: /sys/bus/iio/devices/iio:deviceX/buffer/hwfifo_watermark_available
+KernelVersion: 4.2
+Contact: linux-iio@vger.kernel.org
+Description:
+ A list of positive integers specifying the available watermark
+ levels for the hardware fifo. This entry is optional and if it
+ is not present it means that all the values between
+ hwfifo_watermark_min and hwfifo_watermark_max are supported.
+ If the user sets buffer/watermark to a value greater than
+ hwfifo_watermak_min but not equal to any of the values in this
+ list, the driver will chose an appropriate value for the
+ hardware fifo watermark level.
report descriptor.
This file cannot be written.
Users: HIDAPI library (http://www.signal11.us/oss/hidapi)
+
+What: For USB devices : /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/country
+ For BT devices : /sys/class/bluetooth/hci<addr>/<hid-bus>:<vendor-id>:<product-id>.<num>/country
+ Symlink : /sys/class/hidraw/hidraw<num>/device/country
+Date: February 2015
+KernelVersion: 3.19
+Contact: Olivier Gay <ogay@logitech.com>
+Description: When read, this file returns the hex integer value in ASCII
+ of the device's HID country code (e.g. 21 for US).
+ This file cannot be written.
Description: Display minimum, maximum and current range of the steering
wheel. Writing a value within min and max boundaries sets the
range of the wheel.
+
+What: /sys/bus/hid/drivers/logitech/<dev>/alternate_modes
+Date: Feb 2015
+KernelVersion: 4.1
+Contact: Michal Malý <madcatxster@gmail.com>
+Description: Displays a set of alternate modes supported by a wheel. Each
+ mode is listed as follows:
+ Tag: Mode Name
+ Currently active mode is marked with an asterisk. List also
+ contains an abstract item "native" which always denotes the
+ native mode of the wheel. Echoing the mode tag switches the
+ wheel into the corresponding mode. Depending on the exact model
+ of the wheel not all listed modes might always be selectable.
+ If a wheel cannot be switched into the desired mode, -EINVAL
+ is returned accompanied with an explanatory message in the
+ kernel log.
+ This entry is not created for devices that have only one mode.
+
+ Currently supported mode switches:
+ Driving Force Pro:
+ DF-EX --> DFP
+
+ G25:
+ DF-EX --> DFP --> G25
+
+ G27:
+ DF-EX <*> DFP <-> G25 <-> G27
+ DF-EX <*--------> G25 <-> G27
+ DF-EX <*----------------> G27
+
+ DFGT:
+ DF-EX <*> DFP <-> DFGT
+ DF-EX <*--------> DFGT
+
+ * hid_logitech module must be loaded with lg4ff_no_autoswitch=1
+ parameter set in order for the switch to DF-EX mode to work.
+
+What: /sys/bus/hid/drivers/logitech/<dev>/real_id
+Date: Feb 2015
+KernelVersion: 4.1
+Contact: Michal Malý <madcatxster@gmail.com>
+Description: Displays the real model of the wheel regardless of any
+ alternate mode the wheel might be switched to.
+ It is a read-only value.
+ This entry is not created for devices that have only one mode.
8. Vendor and device identifications
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-One is not required to add new device ids to include/linux/pci_ids.h.
-Please add PCI_VENDOR_ID_xxx for vendors and a hex constant for device ids.
+Do not add new device or vendor IDs to include/linux/pci_ids.h unless they
+are shared across multiple drivers. You can add private definitions in
+your driver if they're helpful, or just use plain hex constants.
-PCI_VENDOR_ID_xxx constants are re-used. The device ids are arbitrary
-hex numbers (vendor controlled) and normally used only in a single
-location, the pci_device_id table.
+The device IDs are arbitrary hex numbers (vendor controlled) and normally used
+only in a single location, the pci_device_id table.
-Please DO submit new vendor/device ids to pciids.sourceforge.net project.
+Please DO submit new vendor/device IDs to http://pciids.sourceforge.net/.
APEI Error INJection
~~~~~~~~~~~~~~~~~~~~
-EINJ provides a hardware error injection mechanism
-It is very useful for debugging and testing of other APEI and RAS features.
+EINJ provides a hardware error injection mechanism. It is very useful
+for debugging and testing APEI and RAS features in general.
-To use EINJ, make sure the following are enabled in your kernel
+You need to check whether your BIOS supports EINJ first. For that, look
+for early boot messages similar to this one:
+
+ACPI: EINJ 0x000000007370A000 000150 (v01 INTEL 00000001 INTL 00000001)
+
+which shows that the BIOS is exposing an EINJ table - it is the
+mechanism through which the injection is done.
+
+Alternatively, look in /sys/firmware/acpi/tables for an "EINJ" file,
+which is a different representation of the same thing.
+
+It doesn't necessarily mean that EINJ is not supported if those above
+don't exist: before you give up, go into BIOS setup to see if the BIOS
+has an option to enable error injection. Look for something called WHEA
+or similar. Often, you need to enable an ACPI5 support option prior, in
+order to see the APEI,EINJ,... functionality supported and exposed by
+the BIOS menu.
+
+To use EINJ, make sure the following are options enabled in your kernel
configuration:
CONFIG_DEBUG_FS
CONFIG_ACPI_APEI
CONFIG_ACPI_APEI_EINJ
-The user interface of EINJ is debug file system, under the
-directory apei/einj. The following files are provided.
+The EINJ user interface is in <debugfs mount point>/apei/einj.
+
+The following files belong to it:
- available_error_type
- Reading this file returns the error injection capability of the
- platform, that is, which error types are supported. The error type
- definition is as follow, the left field is the error type value, the
- right field is error description.
-
- 0x00000001 Processor Correctable
- 0x00000002 Processor Uncorrectable non-fatal
- 0x00000004 Processor Uncorrectable fatal
- 0x00000008 Memory Correctable
- 0x00000010 Memory Uncorrectable non-fatal
- 0x00000020 Memory Uncorrectable fatal
- 0x00000040 PCI Express Correctable
- 0x00000080 PCI Express Uncorrectable fatal
- 0x00000100 PCI Express Uncorrectable non-fatal
- 0x00000200 Platform Correctable
- 0x00000400 Platform Uncorrectable non-fatal
- 0x00000800 Platform Uncorrectable fatal
-
- The format of file contents are as above, except there are only the
- available error type lines.
+
+ This file shows which error types are supported:
+
+ Error Type Value Error Description
+ ================ =================
+ 0x00000001 Processor Correctable
+ 0x00000002 Processor Uncorrectable non-fatal
+ 0x00000004 Processor Uncorrectable fatal
+ 0x00000008 Memory Correctable
+ 0x00000010 Memory Uncorrectable non-fatal
+ 0x00000020 Memory Uncorrectable fatal
+ 0x00000040 PCI Express Correctable
+ 0x00000080 PCI Express Uncorrectable fatal
+ 0x00000100 PCI Express Uncorrectable non-fatal
+ 0x00000200 Platform Correctable
+ 0x00000400 Platform Uncorrectable non-fatal
+ 0x00000800 Platform Uncorrectable fatal
+
+ The format of the file contents are as above, except present are only
+ the available error types.
- error_type
- This file is used to set the error type value. The error type value
- is defined in "available_error_type" description.
+
+ Set the value of the error type being injected. Possible error types
+ are defined in the file available_error_type above.
- error_inject
- Write any integer to this file to trigger the error
- injection. Before this, please specify all necessary error
- parameters.
+
+ Write any integer to this file to trigger the error injection. Make
+ sure you have specified all necessary error parameters, i.e. this
+ write should be the last step when injecting errors.
- flags
- Present for kernel version 3.13 and above. Used to specify which
- of param{1..4} are valid and should be used by BIOS during injection.
- Value is a bitmask as specified in ACPI5.0 spec for the
+
+ Present for kernel versions 3.13 and above. Used to specify which
+ of param{1..4} are valid and should be used by the firmware during
+ injection. Value is a bitmask as specified in ACPI5.0 spec for the
SET_ERROR_TYPE_WITH_ADDRESS data structure:
- Bit 0 - Processor APIC field valid (see param3 below)
- Bit 1 - Memory address and mask valid (param1 and param2)
- Bit 2 - PCIe (seg,bus,dev,fn) valid (param4 below)
- If set to zero, legacy behaviour is used where the type of injection
- specifies just one bit set, and param1 is multiplexed.
+
+ Bit 0 - Processor APIC field valid (see param3 below).
+ Bit 1 - Memory address and mask valid (param1 and param2).
+ Bit 2 - PCIe (seg,bus,dev,fn) valid (see param4 below).
+
+ If set to zero, legacy behavior is mimicked where the type of
+ injection specifies just one bit set, and param1 is multiplexed.
- param1
- This file is used to set the first error parameter value. Effect of
- parameter depends on error_type specified. For example, if error
- type is memory related type, the param1 should be a valid physical
- memory address. [Unless "flag" is set - see above]
+
+ This file is used to set the first error parameter value. Its effect
+ depends on the error type specified in error_type. For example, if
+ error type is memory related type, the param1 should be a valid
+ physical memory address. [Unless "flag" is set - see above]
- param2
- This file is used to set the second error parameter value. Effect of
- parameter depends on error_type specified. For example, if error
- type is memory related type, the param2 should be a physical memory
- address mask. Linux requires page or narrower granularity, say,
- 0xfffffffffffff000.
+
+ Same use as param1 above. For example, if error type is of memory
+ related type, then param2 should be a physical memory address mask.
+ Linux requires page or narrower granularity, say, 0xfffffffffffff000.
- param3
- Used when the 0x1 bit is set in "flag" to specify the APIC id
+
+ Used when the 0x1 bit is set in "flags" to specify the APIC id
- param4
- Used when the 0x4 bit is set in "flag" to specify target PCIe device
+ Used when the 0x4 bit is set in "flags" to specify target PCIe device
- notrigger
- The EINJ mechanism is a two step process. First inject the error, then
- perform some actions to trigger it. Setting "notrigger" to 1 skips the
- trigger phase, which *may* allow the user to cause the error in some other
- context by a simple access to the cpu, memory location, or device that is
- the target of the error injection. Whether this actually works depends
- on what operations the BIOS actually includes in the trigger phase.
-
-BIOS versions based in the ACPI 4.0 specification have limited options
-to control where the errors are injected. Your BIOS may support an
-extension (enabled with the param_extension=1 module parameter, or
-boot command line einj.param_extension=1). This allows the address
-and mask for memory injections to be specified by the param1 and
-param2 files in apei/einj.
-
-BIOS versions using the ACPI 5.0 specification have more control over
-the target of the injection. For processor related errors (type 0x1,
-0x2 and 0x4) the APICID of the target should be provided using the
-param1 file in apei/einj. For memory errors (type 0x8, 0x10 and 0x20)
-the address is set using param1 with a mask in param2 (0x0 is equivalent
-to all ones). For PCI express errors (type 0x40, 0x80 and 0x100) the
-segment, bus, device and function are specified using param1:
+
+ The error injection mechanism is a two-step process. First inject the
+ error, then perform some actions to trigger it. Setting "notrigger"
+ to 1 skips the trigger phase, which *may* allow the user to cause the
+ error in some other context by a simple access to the CPU, memory
+ location, or device that is the target of the error injection. Whether
+ this actually works depends on what operations the BIOS actually
+ includes in the trigger phase.
+
+BIOS versions based on the ACPI 4.0 specification have limited options
+in controlling where the errors are injected. Your BIOS may support an
+extension (enabled with the param_extension=1 module parameter, or boot
+command line einj.param_extension=1). This allows the address and mask
+for memory injections to be specified by the param1 and param2 files in
+apei/einj.
+
+BIOS versions based on the ACPI 5.0 specification have more control over
+the target of the injection. For processor-related errors (type 0x1, 0x2
+and 0x4), you can set flags to 0x3 (param3 for bit 0, and param1 and
+param2 for bit 1) so that you have more information added to the error
+signature being injected. The actual data passed is this:
+
+ memory_address = param1;
+ memory_address_range = param2;
+ apicid = param3;
+ pcie_sbdf = param4;
+
+For memory errors (type 0x8, 0x10 and 0x20) the address is set using
+param1 with a mask in param2 (0x0 is equivalent to all ones). For PCI
+express errors (type 0x40, 0x80 and 0x100) the segment, bus, device and
+function are specified using param1:
31 24 23 16 15 11 10 8 7 0
+-------------------------------------------------+
| segment | bus | device | function | reserved |
+-------------------------------------------------+
-An ACPI 5.0 BIOS may also allow vendor specific errors to be injected.
+Anyway, you get the idea, if there's doubt just take a look at the code
+in drivers/acpi/apei/einj.c.
+
+An ACPI 5.0 BIOS may also allow vendor-specific errors to be injected.
In this case a file named vendor will contain identifying information
from the BIOS that hopefully will allow an application wishing to use
-the vendor specific extension to tell that they are running on a BIOS
+the vendor-specific extension to tell that they are running on a BIOS
that supports it. All vendor extensions have the 0x80000000 bit set in
error_type. A file vendor_flags controls the interpretation of param1
and param2 (1 = PROCESSOR, 2 = MEMORY, 4 = PCI). See your BIOS vendor
documentation for details (and expect changes to this API if vendors
creativity in using this feature expands beyond our expectations).
-Example:
+
+An error injection example:
+
# cd /sys/kernel/debug/apei/einj
# cat available_error_type # See which errors can be injected
0x00000002 Processor Uncorrectable non-fatal
0x00000008 Memory Correctable
0x00000010 Memory Uncorrectable non-fatal
# echo 0x12345000 > param1 # Set memory address for injection
-# echo 0xfffffffffffff000 > param2 # Mask - anywhere in this page
+# echo $((-1 << 12)) > param2 # Mask 0xfffffffffffff000 - anywhere in this page
# echo 0x8 > error_type # Choose correctable memory error
# echo 1 > error_inject # Inject now
+You should see something like this in dmesg:
+
+[22715.830801] EDAC sbridge MC3: HANDLING MCE MEMORY ERROR
+[22715.834759] EDAC sbridge MC3: CPU 0: Machine Check Event: 0 Bank 7: 8c00004000010090
+[22715.834759] EDAC sbridge MC3: TSC 0
+[22715.834759] EDAC sbridge MC3: ADDR 12345000 EDAC sbridge MC3: MISC 144780c86
+[22715.834759] EDAC sbridge MC3: PROCESSOR 0:306e7 TIME 1422553404 SOCKET 0 APIC 0
+[22716.616173] EDAC MC3: 1 CE memory read error on CPU_SrcID#0_Channel#0_DIMM#0 (channel:0 slot:0 page:0x12345 offset:0x0 grain:32 syndrome:0x0 - area:DRAM err_code:0001:0090 socket:0 channel_mask:1 rank:0)
For more information about EINJ, please refer to ACPI specification
version 4.0, section 17.5 and ACPI 5.0, section 18.6.
atomic_t and return the new counter value after the operation is
performed.
-Unlike the above routines, it is required that explicit memory
-barriers are performed before and after the operation. It must be
-done such that all memory operations before and after the atomic
-operation calls are strongly ordered with respect to the atomic
-operation itself.
+Unlike the above routines, it is required that these primitives
+include explicit memory barriers that are performed before and after
+the operation. It must be done such that all memory operations before
+and after the atomic operation calls are strongly ordered with respect
+to the atomic operation itself.
For example, it should behave as if a smp_mb() call existed both
before and after the atomic operation.
given atomic counter. They return a boolean indicating whether the
resulting counter value was zero or not.
-It requires explicit memory barrier semantics around the operation as
-above.
+Again, these primitives provide explicit memory barrier semantics around
+the atomic operation.
int atomic_sub_and_test(int i, atomic_t *v);
This is identical to atomic_dec_and_test() except that an explicit
-decrement is given instead of the implicit "1". It requires explicit
-memory barrier semantics around the operation.
+decrement is given instead of the implicit "1". This primitive must
+provide explicit memory barrier semantics around the operation.
int atomic_add_negative(int i, atomic_t *v);
-The given increment is added to the given atomic counter value. A
-boolean is return which indicates whether the resulting counter value
-is negative. It requires explicit memory barrier semantics around the
-operation.
+The given increment is added to the given atomic counter value. A boolean
+is return which indicates whether the resulting counter value is negative.
+This primitive must provide explicit memory barrier semantics around
+the operation.
Then:
the given new value. It returns the old value that the atomic variable v had
just before the operation.
-atomic_xchg requires explicit memory barriers around the operation.
+atomic_xchg must provide explicit memory barriers around the operation.
int atomic_cmpxchg(atomic_t *v, int old, int new);
atomic_cmpxchg will only satisfy its atomicity semantics as long as all
other accesses of *v are performed through atomic_xxx operations.
-atomic_cmpxchg requires explicit memory barriers around the operation.
+atomic_cmpxchg must provide explicit memory barriers around the operation.
The semantics for atomic_cmpxchg are the same as those defined for 'cas'
below.
returns non zero. If v is equal to u then it returns zero. This is done as
an atomic operation.
-atomic_add_unless requires explicit memory barriers around the operation
-unless it fails (returns 0).
+atomic_add_unless must provide explicit memory barriers around the
+operation unless it fails (returns 0).
atomic_inc_not_zero, equivalent to atomic_add_unless(v, 1, 0)
like this occur as well.
These routines, like the atomic_t counter operations returning values,
-require explicit memory barrier semantics around their execution. All
-memory operations before the atomic bit operation call must be made
-visible globally before the atomic bit operation is made visible.
+must provide explicit memory barrier semantics around their execution.
+All memory operations before the atomic bit operation call must be
+made visible globally before the atomic bit operation is made visible.
Likewise, the atomic bit operation must be visible globally before any
subsequent memory operation is made visible. For example:
These non-atomic variants also do not require any special memory
barrier semantics.
-The routines xchg() and cmpxchg() need the same exact memory barriers
-as the atomic and bit operations returning values.
+The routines xchg() and cmpxchg() must provide the same exact
+memory-barrier semantics as the atomic and bit operations returning
+values.
Spinlocks and rwlocks have memory barrier expectations as well.
The rule to follow is simple:
than one big one, but doing so means that overloads in one of the
two domains won't be load balanced to the other one.
-By default, there is one sched domain covering all CPUs, except those
-marked isolated using the kernel boot time "isolcpus=" argument.
+By default, there is one sched domain covering all CPUs, including those
+marked isolated using the kernel boot time "isolcpus=" argument. However,
+the isolated CPUs will not participate in load balancing, and will not
+have tasks running on them unless explicitly assigned.
This default load balancing across all CPUs is not well suited for
the following two situations:
constrained to some subset of the CPUs allowed to them, for lack of
load balancing to the other CPUs.
+CPUs in "cpuset.isolcpus" were excluded from load balancing by the
+isolcpus= kernel boot option, and will never be load balanced regardless
+of the value of "cpuset.sched_load_balance" in any cpuset.
+
1.7.1 sched_load_balance implementation details.
------------------------------------------------
--- /dev/null
+The CMA debugfs interface is useful to retrieve basic information out of the
+different CMA areas and to test allocation/release in each of the areas.
+
+Each CMA zone represents a directory under <debugfs>/cma/, indexed by the
+kernel's CMA index. So the first CMA zone would be:
+
+ <debugfs>/cma/cma-0
+
+The structure of the files created under that directory is as follows:
+
+ - [RO] base_pfn: The base PFN (Page Frame Number) of the zone.
+ - [RO] count: Amount of memory in the CMA area.
+ - [RO] order_per_bit: Order of pages represented by one bit.
+ - [RO] bitmap: The bitmap of page states in the zone.
+ - [WO] alloc: Allocate N pages from that CMA area. For example:
+
+ echo 5 > <debugfs>/cma/cma-2/alloc
+
+would try to allocate 5 pages from the cma-2 area.
+
+ - [WO] free: Free N pages from that CMA area, similar to the above.
--- /dev/null
+Freescale Vybrid Miscellaneous System Control - CPU Configuration
+
+The MSCM IP contains multiple sub modules, this binding describes the first
+block of registers which contains CPU configuration information.
+
+Required properties:
+- compatible: "fsl,vf610-mscm-cpucfg", "syscon"
+- reg: the register range of the MSCM CPU configuration registers
+
+Example:
+ mscm_cpucfg: cpucfg@40001000 {
+ compatible = "fsl,vf610-mscm-cpucfg", "syscon";
+ reg = <0x40001000 0x800>;
+ }
--- /dev/null
+Freescale Vybrid Miscellaneous System Control - Interrupt Router
+
+The MSCM IP contains multiple sub modules, this binding describes the second
+block of registers which control the interrupt router. The interrupt router
+allows to configure the recipient of each peripheral interrupt. Furthermore
+it controls the directed processor interrupts. The module is available in all
+Vybrid SoC's but is only really useful in dual core configurations (VF6xx
+which comes with a Cortex-A5/Cortex-M4 combination).
+
+Required properties:
+- compatible: "fsl,vf610-mscm-ir"
+- reg: the register range of the MSCM Interrupt Router
+- fsl,cpucfg: The handle to the MSCM CPU configuration node, required
+ to get the current CPU ID
+- interrupt-controller: Identifies the node as an interrupt controller
+- #interrupt-cells: Two cells, interrupt number and cells.
+ The hardware interrupt number according to interrupt
+ assignment of the interrupt router is required.
+ Flags get passed only when using GIC as parent. Flags
+ encoding as documented by the GIC bindings.
+- interrupt-parent: Should be the phandle for the interrupt controller of
+ the CPU the device tree is intended to be used on. This
+ is either the node of the GIC or NVIC controller.
+
+Example:
+ mscm_ir: interrupt-controller@40001800 {
+ compatible = "fsl,vf610-mscm-ir";
+ reg = <0x40001800 0x400>;
+ fsl,cpucfg = <&mscm_cpucfg>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&intc>;
+ }
regions, used when the GIC doesn't have banked registers. The offset is
cpu-offset * cpu-nr.
-- arm,routable-irqs : Total number of gic irq inputs which are not directly
- connected from the peripherals, but are routed dynamically
- by a crossbar/multiplexer preceding the GIC. The GIC irq
- input line is assigned dynamically when the corresponding
- peripheral's crossbar line is mapped.
Example:
intc: interrupt-controller@fff11000 {
#interrupt-cells = <3>;
#address-cells = <1>;
interrupt-controller;
- arm,routable-irqs = <160>;
reg = <0xfff11000 0x1000>,
<0xfff10100 0x100>;
};
Required properties:
- compatible : Should be "ti,irq-crossbar"
- reg: Base address and the size of the crossbar registers.
-- ti,max-irqs: Total number of irqs available at the interrupt controller.
+- interrupt-controller: indicates that this block is an interrupt controller.
+- interrupt-parent: the interrupt controller this block is connected to.
+- ti,max-irqs: Total number of irqs available at the parent interrupt controller.
- ti,max-crossbar-sources: Maximum number of crossbar sources that can be routed.
- ti,reg-size: Size of a individual register in bytes. Every individual
register is assumed to be of same size. Valid sizes are 1, 2, 4.
when the interrupt controller irq is unused (when not provided, default is 0)
Examples:
- crossbar_mpu: @4a020000 {
+ crossbar_mpu: crossbar@4a002a48 {
compatible = "ti,irq-crossbar";
reg = <0x4a002a48 0x130>;
ti,max-irqs = <160>;
ti,max-crossbar-sources = <400>;
ti,reg-size = <2>;
- ti,irqs-reserved = <0 1 2 3 5 6 131 132 139 140>;
+ ti,irqs-reserved = <0 1 2 3 5 6 131 132>;
ti,irqs-skip = <10 133 139 140>;
};
An interrupt consumer on an SoC using crossbar will use:
interrupts = <GIC_SPI request_number interrupt_level>
-When the request number is between 0 to that described by
-"ti,max-crossbar-sources", it is assumed to be a crossbar mapping. If the
-request_number is greater than "ti,max-crossbar-sources", then it is mapped as a
-quirky hardware mapping direct to GIC.
Example:
device_x@0x4a023000 {
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
...
};
-
- device_y@0x4a033000 {
- /* Direct mapped GIC SPI 1 used */
- interrupts = <GIC_SPI DIRECT_IRQ(1) IRQ_TYPE_LEVEL_HIGH>;
- ...
- };
- clocks : list of phandles and specifiers to all input clocks listed in
clock-names property.
+Optional properties:
+
+Some PMUs are capable of behaving as an interrupt controller (mostly
+to wake up a suspended PMU). In which case, they can have the
+following properties:
+
+- interrupt-controller: indicate that said PMU is an interrupt controller
+
+- #interrupt-cells: must be identical to the that of the parent interrupt
+ controller.
+
+- interrupt-parent: a phandle indicating which interrupt controller
+ this PMU signals interrupts to.
+
Example :
pmu_system_controller: system-controller@10040000 {
compatible = "samsung,exynos5250-pmu", "syscon";
reg = <0x10040000 0x5000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
#clock-cells = <1>;
clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
"clkout4", "clkout8", "clkout9";
This binding describes a SATA device.
Required properties:
- - compatible : Must be "st,sti-ahci"
+ - compatible : Must be "st,ahci"
- reg : Physical base addresses and length of register sets
- interrupts : Interrupt associated with the SATA device
- interrupt-names : Associated name must be; "hostc"
- - resets : The power-down and soft-reset lines of SATA IP
- - reset-names : Associated names must be; "pwr-dwn" and "sw-rst"
- clocks : The phandle for the clock
- clock-names : Associated name must be; "ahci_clk"
- - phys : The phandle for the PHY device
+ - phys : The phandle for the PHY port
- phy-names : Associated name must be; "ahci_phy"
+Optional properties:
+ - resets : The power-down, soft-reset and power-reset lines of SATA IP
+ - reset-names : Associated names must be; "pwr-dwn", "sw-rst" and "pwr-rst"
+
Example:
+ /* Example for stih416 */
sata0: sata@fe380000 {
- compatible = "st,sti-ahci";
- reg = <0xfe380000 0x1000>;
- interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
- interrupt-names = "hostc";
- phys = <&miphy365x_phy MIPHY_PORT_0 MIPHY_TYPE_SATA>;
- phy-names = "ahci_phy";
- resets = <&powerdown STIH416_SATA0_POWERDOWN>,
+ compatible = "st,ahci";
+ reg = <0xfe380000 0x1000>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
+ interrupt-names = "hostc";
+ phys = <&phy_port0 PHY_TYPE_SATA>;
+ phy-names = "ahci_phy";
+ resets = <&powerdown STIH416_SATA0_POWERDOWN>,
<&softreset STIH416_SATA0_SOFTRESET>;
- reset-names = "pwr-dwn", "sw-rst";
- clocks = <&clk_s_a0_ls CLK_ICN_REG>;
- clock-names = "ahci_clk";
+ reset-names = "pwr-dwn", "sw-rst";
+ clocks = <&clk_s_a0_ls CLK_ICN_REG>;
+ clock-names = "ahci_clk";
+ };
+
+ /* Example for stih407 family silicon */
+ sata0: sata@9b20000 {
+ compatible = "st,ahci";
+ reg = <0x9b20000 0x1000>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
+ interrupt-names = "hostc";
+ phys = <&phy_port0 PHY_TYPE_SATA>;
+ phy-names = "ahci_phy";
+ resets = <&powerdown STIH407_SATA0_POWERDOWN>,
+ <&softreset STIH407_SATA0_SOFTRESET>,
+ <&softreset STIH407_SATA0_PWR_SOFTRESET>;
+ reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
+ clocks = <&clk_s_c0_flexgen CLK_ICN_REG>;
+ clock-names = "ahci_clk";
};
Required properties:
- compatible : "gpio-fan"
+
+Optional properties:
- gpios: Specifies the pins that map to bits in the control value,
ordered MSB-->LSB.
- gpio-fan,speed-map: A mapping of possible fan RPM speeds and the
control value that should be set to achieve them. This array
must have the RPM values in ascending order.
-
-Optional properties:
- alarm-gpios: This pin going active indicates something is wrong with
the fan, and a udev event will be fired.
+- cooling-cells: If used as a cooling device, must be <2>
+ Also see: Documentation/devicetree/bindings/thermal/thermal.txt
+ min and max states are derived from the speed-map of the fan.
+
+Note: At least one the "gpios" or "alarm-gpios" properties must be set.
Examples:
6000 2>;
alarm-gpios = <&gpio1 15 1>;
};
+ gpio_fan_cool: gpio_fan {
+ compatible = "gpio-fan";
+ gpios = <&gpio2 14 1
+ &gpio2 13 1>;
+ gpio-fan,speed-map = <0 0>,
+ <3000 1>,
+ <6000 2>;
+ alarm-gpios = <&gpio2 15 1>;
+ #cooling-cells = <2>; /* min followed by max */
+ };
Recommended properties :
- interrupts : standard interrupt property.
- clock-frequency : desired I2C bus clock frequency in Hz.
+- ti,has-pfunc: boolean; if defined, it indicates that SoC supports PFUNC
+ registers. PFUNC registers allow to switch I2C pins to function as
+ GPIOs, so they can by toggled manually.
Example (enbw_cmc board):
i2c@1c22000 {
--- /dev/null
+Conexant Digicolor I2C controller
+
+Required properties:
+ - compatible: must be "cnxt,cx92755-i2c"
+ - reg: physical address and length of the device registers
+ - interrupts: a single interrupt specifier
+ - clocks: clock for the device
+ - #address-cells: should be <1>
+ - #size-cells: should be <0>
+
+Optional properties:
+- clock-frequency: the desired I2C bus clock frequency in Hz; in
+ absence of this property the default value is used (100 kHz).
+
+Example:
+
+ i2c: i2c@f0000120 {
+ compatible = "cnxt,cx92755-i2c";
+ reg = <0xf0000120 0x10>;
+ interrupts = <28>;
+ clocks = <&main_clk>;
+ clock-frequency = <100000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
--- /dev/null
+* Ingenic JZ4780 I2C Bus controller
+
+Required properties:
+- compatible: should be "ingenic,jz4780-i2c"
+- reg: Should contain the address & size of the I2C controller registers.
+- interrupts: Should specify the interrupt provided by parent.
+- clocks: Should contain a single clock specifier for the JZ4780 I2C clock.
+- clock-frequency: desired I2C bus clock frequency in Hz.
+
+Recommended properties:
+- pinctrl-names: should be "default";
+- pinctrl-0: phandle to pinctrl function
+
+Optional properties:
+- interrupt-parent: Should be the phandle of the interrupt controller that
+ delivers interrupts to the I2C block.
+
+Example
+
+/ {
+ i2c4: i2c4@0x10054000 {
+ compatible = "ingenic,jz4780-i2c";
+ reg = <0x10054000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <56>;
+
+ clocks = <&cgu JZ4780_CLK_SMB4>;
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c4_data>;
+
+ };
+};
+
--- /dev/null
+Device tree configuration for the I2C controller on the XLP9xx/5xx SoC
+
+Required properties:
+- compatible : should be "netlogic,xlp980-i2c"
+- reg : bus address start and address range size of device
+- interrupts : interrupt number
+
+Optional properties:
+- clock-frequency : frequency of bus clock in Hz
+ Defaults to 100 KHz when the property is not specified
+
+Example:
+
+i2c0: i2c@113100 {
+ compatible = "netlogic,xlp980-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0x113100 0x100>;
+ clock-frequency = <400000>;
+ interrupts = <30>;
+ interrupt-parent = <&pic>;
+};
ricoh,rv5c387a I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
samsung,24ad0xd1 S524AD0XF1 (128K/256K-bit Serial EEPROM for Low Power)
sii,s35390a 2-wire CMOS real-time clock
+skyworks,sky81452 Skyworks SKY81452: Six-Channel White LED Driver with Touch Panel Bias Supply
st-micro,24c256 i2c serial eeprom (24cxx)
stm,m41t00 Serial Access TIMEKEEPER
stm,m41t62 Serial real-time clock (RTC) with alarm
--- /dev/null
+Dialog Semiconductor DA9150 IIO GPADC bindings
+
+Required properties:
+- compatible: "dlg,da9150-gpadc" for DA9150 IIO GPADC
+- #io-channel-cells: Should be set to <1>
+ (See Documentation/devicetree/bindings/iio/iio-bindings.txt for further info)
+
+For further information on GPADC channels, see device datasheet.
+
+
+Example:
+
+ gpadc: da9150-gpadc {
+ compatible = "dlg,da9150-gpadc";
+ #io-channel-cells = <1>;
+ };
--- /dev/null
+* Microchip Analog to Digital Converter (ADC)
+
+The node for this driver must be a child node of a SPI controller, hence
+all mandatory properties described in
+
+ Documentation/devicetree/bindings/spi/spi-bus.txt
+
+must be specified.
+
+Required properties:
+ - compatible: Must be one of the following, depending on the
+ model:
+ "mcp3001"
+ "mcp3002"
+ "mcp3004"
+ "mcp3008"
+ "mcp3201"
+ "mcp3202"
+ "mcp3204"
+ "mcp3208"
+
+
+Examples:
+spi_controller {
+ mcp3x0x@0 {
+ compatible = "mcp3002";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
--- /dev/null
+* Microchip mcp3422/3/4/6/7/8 chip family (ADC)
+
+Required properties:
+ - compatible: Should be
+ "microchip,mcp3422" or
+ "microchip,mcp3423" or
+ "microchip,mcp3424" or
+ "microchip,mcp3426" or
+ "microchip,mcp3427" or
+ "microchip,mcp3428"
+ - reg: I2C address for the device
+
+Example:
+adc@0 {
+ compatible = "microchip,mcp3424";
+ reg = <0x68>;
+};
--- /dev/null
+* Texas Instruments' ADC128S052 ADC chip
+
+Required properties:
+ - compatible: Should be "ti,adc128s052"
+ - reg: spi chip select number for the device
+ - vref-supply: The regulator supply for ADC reference voltage
+
+Recommended properties:
+ - spi-max-frequency: Definition as per
+ Documentation/devicetree/bindings/spi/spi-bus.txt
+
+Example:
+adc@0 {
+ compatible = "ti,adc128s052";
+ reg = <0>;
+ vref-supply = <&vdd_supply>;
+ spi-max-frequency = <1000000>;
+};
Valid compatible strings:
Accelerometers:
+- st,lis3lv02dl-accel
- st,lsm303dlh-accel
- st,lsm303dlhc-accel
- st,lis3dh-accel
--- /dev/null
+NVIDIA Legacy Interrupt Controller
+
+All Tegra SoCs contain a legacy interrupt controller that routes
+interrupts to the GIC, and also serves as a wakeup source. It is also
+referred to as "ictlr", hence the name of the binding.
+
+The HW block exposes a number of interrupt controllers, each
+implementing a set of 32 interrupts.
+
+Required properties:
+
+- compatible : should be: "nvidia,tegra<chip>-ictlr". The LIC on
+ subsequent SoCs remained backwards-compatible with Tegra30, so on
+ Tegra generations later than Tegra30 the compatible value should
+ include "nvidia,tegra30-ictlr".
+- reg : Specifies base physical address and size of the registers.
+ Each controller must be described separately (Tegra20 has 4 of them,
+ whereas Tegra30 and later have 5"
+- interrupt-controller : Identifies the node as an interrupt controller.
+- #interrupt-cells : Specifies the number of cells needed to encode an
+ interrupt source. The value must be 3.
+- interrupt-parent : a phandle to the GIC these interrupts are routed
+ to.
+
+Notes:
+
+- Because this HW ultimately routes interrupts to the GIC, the
+ interrupt specifier must be that of the GIC.
+- Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs
+ are explicitly forbidden.
+
+Example:
+
+ ictlr: interrupt-controller@60004000 {
+ compatible = "nvidia,tegra20-ictlr", "nvidia,tegra-ictlr";
+ reg = <0x60004000 64>,
+ <0x60004100 64>,
+ <0x60004200 64>,
+ <0x60004300 64>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&intc>;
+ };
- compatible: has to be "renesas,irqc-<soctype>", "renesas,irqc" as fallback.
Examples with soctypes are:
- - "renesas,irqc-r8a73a4" (R-Mobile AP6)
+ - "renesas,irqc-r8a73a4" (R-Mobile APE6)
- "renesas,irqc-r8a7790" (R-Car H2)
- "renesas,irqc-r8a7791" (R-Car M2-W)
- "renesas,irqc-r8a7792" (R-Car V2H)
- "renesas,irqc-r8a7794" (R-Car E2)
- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in
interrupts.txt in this directory
+- clocks: Must contain a reference to the functional clock.
Optional properties:
<0 1 IRQ_TYPE_LEVEL_HIGH>,
<0 2 IRQ_TYPE_LEVEL_HIGH>,
<0 3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp4_clks R8A7790_CLK_IRQC>;
};
--- /dev/null
+STMicroelectronics STi System Configuration Controlled IRQs
+-----------------------------------------------------------
+
+On STi based systems; External, CTI (Core Sight), PMU (Performance Management),
+and PL310 L2 Cache IRQs are controlled using System Configuration registers.
+This driver is used to unmask them prior to use.
+
+Required properties:
+- compatible : Should be set to one of:
+ "st,stih415-irq-syscfg"
+ "st,stih416-irq-syscfg"
+ "st,stih407-irq-syscfg"
+ "st,stid127-irq-syscfg"
+- st,syscfg : Phandle to Cortex-A9 IRQ system config registers
+- st,irq-device : Array of IRQs to enable - should be 2 in length
+- st,fiq-device : Array of FIQs to enable - should be 2 in length
+
+Optional properties:
+- st,invert-ext : External IRQs can be inverted at will. This property inverts
+ these IRQs using bitwise logic. A number of defines have been
+ provided for convenience:
+ ST_IRQ_SYSCFG_EXT_1_INV
+ ST_IRQ_SYSCFG_EXT_2_INV
+ ST_IRQ_SYSCFG_EXT_3_INV
+Example:
+
+irq-syscfg {
+ compatible = "st,stih416-irq-syscfg";
+ st,syscfg = <&syscfg_cpu>;
+ st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
+ <ST_IRQ_SYSCFG_PMU_1>;
+ st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
+ <ST_IRQ_SYSCFG_DISABLED>;
+ st,invert-ext = <(ST_IRQ_SYSCFG_EXT_1_INV | ST_IRQ_SYSCFG_EXT_3_INV)>;
+};
--- /dev/null
+TI OMAP4 Wake-up Generator
+
+All TI OMAP4/5 (and their derivatives) an interrupt controller that
+routes interrupts to the GIC, and also serves as a wakeup source. It
+is also referred to as "WUGEN-MPU", hence the name of the binding.
+
+Reguired properties:
+
+- compatible : should contain at least "ti,omap4-wugen-mpu" or
+ "ti,omap5-wugen-mpu"
+- reg : Specifies base physical address and size of the registers.
+- interrupt-controller : Identifies the node as an interrupt controller.
+- #interrupt-cells : Specifies the number of cells needed to encode an
+ interrupt source. The value must be 3.
+- interrupt-parent : a phandle to the GIC these interrupts are routed
+ to.
+
+Notes:
+
+- Because this HW ultimately routes interrupts to the GIC, the
+ interrupt specifier must be that of the GIC.
+- Only SPIs can use the WUGEN as an interrupt parent. SGIs and PPIs
+ are explicitly forbiden.
+
+Example:
+
+ wakeupgen: interrupt-controller@48281000 {
+ compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ reg = <0x48281000 0x1000>;
+ interrupt-parent = <&gic>;
+ };
- compatible : One of the following chip-specific strings:
"wlf,wm5102"
"wlf,wm5110"
+ "wlf,wm8280"
"wlf,wm8997"
- reg : I2C slave address when connected using I2C, chip select number when
using SPI.
- #gpio-cells : Must be 2. The first cell is the pin number and the
second cell is used to specify optional parameters (currently unused).
- - AVDD-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply (wm5102, wm5110),
- CPVDD-supply, SPKVDDL-supply (wm5102, wm5110), SPKVDDR-supply (wm5102,
- wm5110), SPKVDD-supply (wm8997) : Power supplies for the device, as covered
- in Documentation/devicetree/bindings/regulator/regulator.txt
+ - AVDD-supply, DBVDD1-supply, CPVDD-supply : Power supplies for the device,
+ as covered in Documentation/devicetree/bindings/regulator/regulator.txt
+
+ - DBVDD2-supply, DBVDD3-supply : Additional databus power supplies (wm5102,
+ wm5110, wm8280)
+
+ - SPKVDDL-supply, SPKVDDR-supply : Speaker driver power supplies (wm5102,
+ wm5110, wm8280)
+
+ - SPKVDD-supply : Speaker driver power supply (wm8997)
Optional properties:
- wlf,reset : GPIO specifier for the GPIO controlling /RESET
- wlf,ldoena : GPIO specifier for the GPIO controlling LDOENA
- - wlf,gpio-defaults : A list of GPIO configuration register values. If
- absent, no configuration of these registers is performed. If any
- entry has a value that is out of range for a 16 bit register then
- the chip default will be used. If present exactly five values must
- be specified.
+ - wlf,gpio-defaults : A list of GPIO configuration register values. Defines
+ for the appropriate values can found in <dt-bindings/mfd/arizona.txt>. If
+ absent, no configuration of these registers is performed. If any entry has
+ a value that is out of range for a 16 bit register then the chip default
+ will be used. If present exactly five values must be specified.
- wlf,inmode : A list of INn_MODE register values, where n is the number
of input signals. Valid values are 0 (Differential), 1 (Single-ended) and
input singals. If values less than the number of input signals, elements
that has not been specifed are set to 0 by default.
+ - wlf,dmic-ref : DMIC reference voltage source for each input, can be
+ selected from either MICVDD or one of the MICBIAS's, defines
+ (ARIZONA_DMIC_xxxx) are provided in <dt-bindings/mfd/arizona.txt>. If
+ present, the number of values should be less than or equal to the
+ number of inputs, unspecified inputs will use the chip default.
+
- DCVDD-supply, MICVDD-supply : Power supplies, only need to be specified if
they are being externally supplied. As covered in
Documentation/devicetree/bindings/regulator/regulator.txt
#gpio-cells = <2>;
wlf,gpio-defaults = <
- 0x00000000 /* AIF1TXLRCLK */
- 0xffffffff
- 0xffffffff
- 0xffffffff
- 0xffffffff
+ ARIZONA_GP_FN_TXLRCLK
+ ARIZONA_GP_DEFAULT
+ ARIZONA_GP_DEFAULT
+ ARIZONA_GP_DEFAULT
+ ARIZONA_GP_DEFAULT
>;
};
--- /dev/null
+AXP202/AXP209 device tree bindings
+
+The axp20x family current members :
+axp202 (X-Powers)
+axp209 (X-Powers)
+
+Required properties:
+- compatible: "x-powers,axp202" or "x-powers,axp209"
+- reg: The I2C slave address for the AXP chip
+- interrupt-parent: The parent interrupt controller
+- interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin
+- interrupt-controller: axp20x has its own internal IRQs
+- #interrupt-cells: Should be set to 1
+
+Optional properties:
+- x-powers,dcdc-freq: defines the work frequency of DC-DC in KHz
+ (range: 750-1875). Default: 1.5MHz
+- <input>-supply: a phandle to the regulator supply node. May be omitted if
+ inputs are unregulated, such as using the IPSOUT output
+ from the PMIC.
+
+- regulators: A node that houses a sub-node for each regulator. Regulators
+ not used but preferred to be managed by the OS should be
+ listed as well.
+ See Documentation/devicetree/bindings/regulator/regulator.txt
+ for more information on standard regulator bindings.
+
+Optional properties for DCDC regulators:
+- x-powers,dcdc-workmode: 1 for PWM mode, 0 for AUTO (PWM/PFM) mode
+ Default: Current hardware setting
+ The DCDC regulators work in a mixed PWM/PFM mode,
+ using PFM under light loads and switching to PWM
+ for heavier loads. Forcing PWM mode trades efficiency
+ under light loads for lower output noise. This
+ probably makes sense for HiFi audio related
+ applications that aren't battery constrained.
+
+
+AXP202/AXP209 regulators, type, and corresponding input supply names:
+
+Regulator Type Supply Name Notes
+--------- ---- ----------- -----
+DCDC2 : DC-DC buck : vin2-supply
+DCDC3 : DC-DC buck : vin3-supply
+LDO1 : LDO : acin-supply : always on
+LDO2 : LDO : ldo24in-supply : shared supply
+LDO3 : LDO : ldo3in-supply
+LDO4 : LDO : ldo24in-supply : shared supply
+LDO5 : LDO : ldo5in-supply
+
+Example:
+
+axp209: pmic@34 {
+ compatible = "x-powers,axp209";
+ reg = <0x34>;
+ interrupt-parent = <&nmi_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ regulators {
+ x-powers,dcdc-freq = <1500>;
+
+ vdd_cpu: dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1450000>;
+ regulator-name = "vdd-cpu";
+ };
+
+ vdd_int_dll: dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-name = "vdd-int-dll";
+ };
+
+ vdd_rtc: ldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-name = "vdd-rtc";
+ };
+
+ avcc: ldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <2700000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "avcc";
+ };
+
+ ldo3 {
+ /* unused but preferred to be managed by OS */
+ };
+ };
+};
--- /dev/null
+Dialog Semiconductor DA9150 Combined Charger/Fuel-Gauge MFD bindings
+
+DA9150 consists of a group of sub-devices:
+
+Device Description
+------ -----------
+da9150-gpadc : General Purpose ADC
+da9150-charger : Battery Charger
+
+======
+
+Required properties:
+- compatible : Should be "dlg,da9150"
+- reg: Specifies the I2C slave address
+- interrupt-parent: Specifies the phandle of the interrupt controller to which
+ the IRQs from da9150 are delivered to.
+- interrupts: IRQ line info for da9150 chip.
+- interrupt-controller: da9150 has internal IRQs (own IRQ domain).
+ (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for
+ further information relating to interrupt properties)
+
+Sub-devices:
+- da9150-gpadc: See Documentation/devicetree/bindings/iio/adc/da9150-gpadc.txt
+- da9150-charger: See Documentation/devicetree/bindings/power/da9150-charger.txt
+
+
+Example:
+
+ charger_fg: da9150@58 {
+ compatible = "dlg,da9150";
+ reg = <0x58>;
+ interrupt-parent = <&gpio6>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+
+ gpadc: da9150-gpadc {
+ ...
+ };
+
+ da9150-charger {
+ ...
+ };
+ };
--- /dev/null
+MediaTek MT6397 Multifunction Device Driver
+
+MT6397 is a multifunction device with the following sub modules:
+- Regulator
+- RTC
+- Audio codec
+- GPIO
+- Clock
+
+It is interfaced to host controller using SPI interface by a proprietary hardware
+called PMIC wrapper or pwrap. MT6397 MFD is a child device of pwrap.
+See the following for pwarp node definitions:
+Documentation/devicetree/bindings/soc/pwrap.txt
+
+This document describes the binding for MFD device and its sub module.
+
+Required properties:
+compatible: "mediatek,mt6397"
+
+Optional subnodes:
+
+- rtc
+ Required properties:
+ - compatible: "mediatek,mt6397-rtc"
+- regulators
+ Required properties:
+ - compatible: "mediatek,mt6397-regulator"
+ see Documentation/devicetree/bindings/regulator/mt6397-regulator.txt
+- codec
+ Required properties:
+ - compatible: "mediatek,mt6397-codec"
+- clk
+ Required properties:
+ - compatible: "mediatek,mt6397-clk"
+
+Example:
+ pwrap: pwrap@1000f000 {
+ compatible = "mediatek,mt8135-pwrap";
+
+ ...
+
+ pmic {
+ compatible = "mediatek,mt6397";
+
+ codec: mt6397codec {
+ compatible = "mediatek,mt6397-codec";
+ };
+
+ regulators {
+ compatible = "mediatek,mt6397-regulator";
+
+ mt6397_vpca15_reg: buck_vpca15 {
+ regulator-compatible = "buck_vpca15";
+ regulator-name = "vpca15";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-ramp-delay = <12500>;
+ regulator-always-on;
+ };
+
+ mt6397_vgp4_reg: ldo_vgp4 {
+ regulator-compatible = "ldo_vgp4";
+ regulator-name = "vgp4";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <218>;
+ };
+ };
+ };
+ };
Required properties:
- compatible: Should contain one of:
- "qcom,pm8941"
- "qcom,pm8841"
- "qcom,pma8084"
- or generalized "qcom,spmi-pmic".
+ "qcom,pm8941",
+ "qcom,pm8841",
+ "qcom,pma8084",
+ "qcom,pm8019",
+ "qcom,pm8226",
+ "qcom,pm8110",
+ "qcom,pma8084",
+ "qcom,pmi8962",
+ "qcom,pmd9635",
+ "qcom,pm8994",
+ "qcom,pmi8994",
+ "qcom,pm8916",
+ "qcom,pm8004",
+ "qcom,pm8909",
+ or generalized "qcom,spmi-pmic".
- reg: Specifies the SPMI USID slave address for this device.
For more information see:
Documentation/devicetree/bindings/spmi/spmi.txt
"qcom,rpm-apq8064"
"qcom,rpm-msm8660"
"qcom,rpm-msm8960"
+ "qcom,rpm-ipq8064"
- reg:
Usage: required
Value type: <string-array>
Definition: must be the three strings "ack", "err" and "wakeup", in order
-- #address-cells:
- Usage: required
- Value type: <u32>
- Definition: must be 1
-
-- #size-cells:
- Usage: required
- Value type: <u32>
- Definition: must be 0
-
- qcom,ipc:
Usage: required
Value type: <prop-encoded-array>
- u32 representing the ipc bit within the register
+= SUBNODES
+
+The RPM exposes resources to its subnodes. The below bindings specify the set
+of valid subnodes that can operate on these resources.
+
+== Regulators
+
+Regulator nodes are identified by their compatible:
+
+- compatible:
+ Usage: required
+ Value type: <string>
+ Definition: must be one of:
+ "qcom,rpm-pm8058-regulators"
+ "qcom,rpm-pm8901-regulators"
+ "qcom,rpm-pm8921-regulators"
+
+- vdd_l0_l1_lvs-supply:
+- vdd_l2_l11_l12-supply:
+- vdd_l3_l4_l5-supply:
+- vdd_l6_l7-supply:
+- vdd_l8-supply:
+- vdd_l9-supply:
+- vdd_l10-supply:
+- vdd_l13_l16-supply:
+- vdd_l14_l15-supply:
+- vdd_l17_l18-supply:
+- vdd_l19_l20-supply:
+- vdd_l21-supply:
+- vdd_l22-supply:
+- vdd_l23_l24_l25-supply:
+- vdd_ncp-supply:
+- vdd_s0-supply:
+- vdd_s1-supply:
+- vdd_s2-supply:
+- vdd_s3-supply:
+- vdd_s4-supply:
+ Usage: optional (pm8058 only)
+ Value type: <phandle>
+ Definition: reference to regulator supplying the input pin, as
+ described in the data sheet
+
+- lvs0_in-supply:
+- lvs1_in-supply:
+- lvs2_in-supply:
+- lvs3_in-supply:
+- mvs_in-supply:
+- vdd_l0-supply:
+- vdd_l1-supply:
+- vdd_l2-supply:
+- vdd_l3-supply:
+- vdd_l4-supply:
+- vdd_l5-supply:
+- vdd_l6-supply:
+- vdd_s0-supply:
+- vdd_s1-supply:
+- vdd_s2-supply:
+- vdd_s3-supply:
+- vdd_s4-supply:
+ Usage: optional (pm8901 only)
+ Value type: <phandle>
+ Definition: reference to regulator supplying the input pin, as
+ described in the data sheet
+
+- vdd_l1_l2_l12_l18-supply:
+- vdd_l3_l15_l17-supply:
+- vdd_l4_l14-supply:
+- vdd_l5_l8_l16-supply:
+- vdd_l6_l7-supply:
+- vdd_l9_l11-supply:
+- vdd_l10_l22-supply:
+- vdd_l21_l23_l29-supply:
+- vdd_l24-supply:
+- vdd_l25-supply:
+- vdd_l26-supply:
+- vdd_l27-supply:
+- vdd_l28-supply:
+- vdd_ncp-supply:
+- vdd_s1-supply:
+- vdd_s2-supply:
+- vdd_s4-supply:
+- vdd_s5-supply:
+- vdd_s6-supply:
+- vdd_s7-supply:
+- vdd_s8-supply:
+- vin_5vs-supply:
+- vin_lvs1_3_6-supply:
+- vin_lvs2-supply:
+- vin_lvs4_5_7-supply:
+ Usage: optional (pm8921 only)
+ Value type: <phandle>
+ Definition: reference to regulator supplying the input pin, as
+ described in the data sheet
+
+The regulator node houses sub-nodes for each regulator within the device. Each
+sub-node is identified using the node's name, with valid values listed for each
+of the pmics below.
+
+pm8058:
+ l0, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15,
+ l16, l17, l18, l19, l20, l21, l22, l23, l24, l25, s0, s1, s2, s3, s4,
+ lvs0, lvs1, ncp
+
+pm8901:
+ l0, l1, l2, l3, l4, l5, l6, s0, s1, s2, s3, s4, lvs0, lvs1, lvs2, lvs3,
+ mvs
+
+pm8921:
+ s1, s2, s3, s4, s7, s8, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,
+ l12, l14, l15, l16, l17, l18, l21, l22, l23, l24, l25, l26, l27, l28,
+ l29, lvs1, lvs2, lvs3, lvs4, lvs5, lvs6, lvs7, usb-switch, hdmi-switch,
+ ncp
+
+The content of each sub-node is defined by the standard binding for regulators -
+see regulator.txt - with additional custom properties described below:
+
+=== Switch-mode Power Supply regulator custom properties
+
+- bias-pull-down:
+ Usage: optional
+ Value type: <empty>
+ Definition: enable pull down of the regulator when inactive
+
+- qcom,switch-mode-frequency:
+ Usage: required
+ Value type: <u32>
+ Definition: Frequency (Hz) of the switch-mode power supply;
+ must be one of:
+ 19200000, 9600000, 6400000, 4800000, 3840000, 3200000,
+ 2740000, 2400000, 2130000, 1920000, 1750000, 1600000,
+ 1480000, 1370000, 1280000, 1200000
+
+- qcom,force-mode:
+ Usage: optional (default if no other qcom,force-mode is specified)
+ Value type: <u32>
+ Defintion: indicates that the regulator should be forced to a
+ particular mode, valid values are:
+ QCOM_RPM_FORCE_MODE_NONE - do not force any mode
+ QCOM_RPM_FORCE_MODE_LPM - force into low power mode
+ QCOM_RPM_FORCE_MODE_HPM - force into high power mode
+ QCOM_RPM_FORCE_MODE_AUTO - allow regulator to automatically
+ select its own mode based on
+ realtime current draw, only for:
+ pm8921 smps and ftsmps
+
+- qcom,power-mode-hysteretic:
+ Usage: optional
+ Value type: <empty>
+ Definition: select that the power supply should operate in hysteretic
+ mode, instead of the default pwm mode
+
+=== Low-dropout regulator custom properties
+
+- bias-pull-down:
+ Usage: optional
+ Value type: <empty>
+ Definition: enable pull down of the regulator when inactive
+
+- qcom,force-mode:
+ Usage: optional
+ Value type: <u32>
+ Defintion: indicates that the regulator should not be forced to any
+ particular mode, valid values are:
+ QCOM_RPM_FORCE_MODE_NONE - do not force any mode
+ QCOM_RPM_FORCE_MODE_LPM - force into low power mode
+ QCOM_RPM_FORCE_MODE_HPM - force into high power mode
+ QCOM_RPM_FORCE_MODE_BYPASS - set regulator to use bypass
+ mode, i.e. to act as a switch
+ and not regulate, only for:
+ pm8921 pldo, nldo and nldo1200
+
+=== Negative Charge Pump custom properties
+
+- qcom,switch-mode-frequency:
+ Usage: required
+ Value type: <u32>
+ Definition: Frequency (Hz) of the swith mode power supply;
+ must be one of:
+ 19200000, 9600000, 6400000, 4800000, 3840000, 3200000,
+ 2740000, 2400000, 2130000, 1920000, 1750000, 1600000,
+ 1480000, 1370000, 1280000, 1200000
+
= EXAMPLE
#include <dt-bindings/mfd/qcom-rpm.h>
interrupts = <0 19 0>, <0 21 0>, <0 22 0>;
interrupt-names = "ack", "err", "wakeup";
- #address-cells = <1>;
- #size-cells = <0>;
+ regulators {
+ compatible = "qcom,rpm-pm8921-regulators";
+ vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
+
+ s1 {
+ regulator-min-microvolt = <1225000>;
+ regulator-max-microvolt = <1225000>;
+
+ bias-pull-down;
+
+ qcom,switch-mode-frequency = <3200000>;
+ };
+
+ pm8921_s4: s4 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ qcom,switch-mode-frequency = <1600000>;
+ bias-pull-down;
+
+ qcom,force-mode = <QCOM_RPM_FORCE_MODE_AUTO>;
+ };
+ };
};
--- /dev/null
+SKY81452 bindings
+
+Required properties:
+- compatible : Must be "skyworks,sky81452"
+- reg : I2C slave address
+
+Required child nodes:
+- backlight : container node for backlight following the binding
+ in video/backlight/sky81452-backlight.txt
+- regulator : container node for regulators following the binding
+ in regulator/sky81452-regulator.txt
+
+Example:
+
+ sky81452@2c {
+ compatible = "skyworks,sky81452";
+ reg = <0x2c>;
+
+ backlight {
+ compatible = "skyworks,sky81452-backlight";
+ name = "pwm-backlight";
+ led-sources = <0 1 2 3 6>;
+ skyworks,ignore-pwm;
+ skyworks,phase-shift;
+ skyworks,current-limit = <2300>;
+ };
+
+ regulator {
+ lout {
+ regulator-name = "sky81452-lout";
+ regulator-min-microvolt = <4500000>;
+ regulator-max-microvolt = <8000000>;
+ };
+ };
+ };
--- /dev/null
+Broadcom IPROC SDHCI controller
+
+This file documents differences between the core properties described
+by mmc.txt and the properties that represent the IPROC SDHCI controller.
+
+Required properties:
+- compatible : Should be "brcm,sdhci-iproc-cygnus".
+- clocks : The clock feeding the SDHCI controller.
+
+Optional properties:
+ - sdhci,auto-cmd12: specifies that controller should use auto CMD12.
+
+Example:
+
+sdhci0: sdhci@0x18041000 {
+ compatible = "brcm,sdhci-iproc-cygnus";
+ reg = <0x18041000 0x100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&lcpll0_clks BCM_CYGNUS_LCPLL0_SDIO_CLK>;
+ bus-width = <4>;
+ sdhci,auto-cmd12;
+ no-1-8-v;
+};
in transmit mode and CIU clock phase shift value in receive mode for double
data rate mode operation. Refer notes below for the order of the cells and the
valid values.
+* samsung,dw-mshc-hs400-timing: Specifies the value of CIU TX and RX clock phase
+ shift value for hs400 mode operation.
Notes for the sdr-timing and ddr-timing values:
- if CIU clock divider value is 0 (that is divide by 1), both tx and rx
phase shift clocks should be 0.
+* samsung,read-strobe-delay: RCLK (Data strobe) delay to control HS400 mode
+ (Latency value for delay line in Read path)
+
Required properties for a slot (Deprecated - Recommend to use one slot per host):
* gpios: specifies a list of gpios used for command, clock and data bus. The
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
+ samsung,dw-mshc-hs400-timing = <0 2>;
+ samsung,read-strobe-delay = <90>;
bus-width = <8>;
};
to select a proper data sampling window in case the clock quality is not good
due to signal path is too long on the board. Please refer to eSDHC/uSDHC
chapter, DLL (Delay Line) section in RM for details.
+- voltage-ranges : Specify the voltage range in case there are software
+ transparent level shifters on the outputs of the controller. Two cells are
+ required, first cell specifies minimum slot voltage (mV), second cell
+ specifies maximum slot voltage (mV). Several ranges could be specified.
Examples:
--- /dev/null
+mmc-card / eMMC bindings
+------------------------
+
+This documents describes the devicetree bindings for a mmc-host controller
+child node describing a mmc-card / an eMMC, see "Use of Function subnodes"
+in mmc.txt
+
+Required properties:
+-compatible : Must be "mmc-card"
+-reg : Must be <0>
+
+Optional properties:
+-broken-hpi : Use this to indicate that the mmc-card has a broken hpi
+ implementation, and that hpi should not be used
+
+Example:
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins_a>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+
+ mmccard: mmccard@0 {
+ reg = <0>;
+ compatible = "mmc-card";
+ broken-hpi;
+ };
+};
used by the sdhci-st driver.
Required properties:
-- compatible : Must be "st,sdhci"
-- clock-names : Should be "mmc"
- See: Documentation/devicetree/bindings/resource-names.txt
-- clocks : Phandle of the clock used by the sdhci controler
- See: Documentation/devicetree/bindings/clock/clock-bindings.txt
+- compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407"
+ to set the internal glue logic used for configuring the MMC
+ subsystem (mmcss) inside the FlashSS (available in STiH407 SoC
+ family).
+
+- clock-names: Should be "mmc".
+ See: Documentation/devicetree/bindings/resource-names.txt
+- clocks: Phandle to the clock.
+ See: Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+- interrupts: One mmc interrupt should be described here.
+- interrupt-names: Should be "mmcirq".
+
+- pinctrl-names: A pinctrl state names "default" must be defined.
+- pinctrl-0: Phandle referencing pin configuration of the sd/emmc controller.
+ See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt
+
+- reg: This must provide the host controller base address and it can also
+ contain the FlashSS Top register for TX/RX delay used by the driver
+ to configure DLL inside the flashSS, if so reg-names must also be
+ specified.
Optional properties:
-- non-removable: non-removable slot
- See: Documentation/devicetree/bindings/mmc/mmc.txt
-- bus-width: Number of data lines
- See: Documentation/devicetree/bindings/mmc/mmc.txt
+- reg-names: Should be "mmc" and "top-mmc-delay". "top-mmc-delay" is optional
+ for eMMC on stih407 family silicon to configure DLL inside FlashSS.
+
+- non-removable: Non-removable slot. Also used for configuring mmcss in STiH407 SoC
+ family.
+ See: Documentation/devicetree/bindings/mmc/mmc.txt.
+
+- bus-width: Number of data lines.
+ See: Documentation/devicetree/bindings/mmc/mmc.txt.
+
+- max-frequency: Can be 200MHz, 100Mz or 50MHz (default) and used for
+ configuring the CCONFIG3 in the mmcss.
+ See: Documentation/devicetree/bindings/mmc/mmc.txt.
+
+- resets: Phandle and reset specifier pair to softreset line of HC IP.
+ See: Documentation/devicetree/bindings/reset/reset.txt
+
+- vqmmc-supply: Phandle to the regulator dt node, mentioned as the vcc/vdd
+ supply in eMMC/SD specs.
+
+- sd-uhs--sdr50: To enable the SDR50 in the mmcss.
+ See: Documentation/devicetree/bindings/mmc/mmc.txt.
+
+- sd-uhs-sdr104: To enable the SDR104 in the mmcss.
+ See: Documentation/devicetree/bindings/mmc/mmc.txt.
+
+- sd-uhs-ddr50: To enable the DDR50 in the mmcss.
+ See: Documentation/devicetree/bindings/mmc/mmc.txt.
Example:
+/* Example stih416e eMMC configuration */
+
mmc0: sdhci@fe81e000 {
compatible = "st,sdhci";
status = "disabled";
pinctrl-0 = <&pinctrl_mmc0>;
clock-names = "mmc";
clocks = <&clk_s_a1_ls 1>;
- bus-width = <8>
+ bus-width = <8>
+
+/* Example SD stih407 family configuration */
+
+mmc1: sdhci@09080000 {
+ compatible = "st,sdhci-stih407", "st,sdhci";
+ status = "disabled";
+ reg = <0x09080000 0x7ff>;
+ reg-names = "mmc";
+ interrupts = <GIC_SPI 90 IRQ_TYPE_NONE>;
+ interrupt-names = "mmcirq";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sd1>;
+ clock-names = "mmc";
+ clocks = <&clk_s_c0_flexgen CLK_MMC_1>;
+ resets = <&softreset STIH407_MMC1_SOFTRESET>;
+ bus-width = <4>;
+};
+
+/* Example eMMC stih407 family configuration */
+
+mmc0: sdhci@09060000 {
+ compatible = "st,sdhci-stih407", "st,sdhci";
+ status = "disabled";
+ reg = <0x09060000 0x7ff>, <0x9061008 0x20>;
+ reg-names = "mmc", "top-mmc-delay";
+ interrupts = <GIC_SPI 92 IRQ_TYPE_NONE>;
+ interrupt-names = "mmcirq";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mmc0>;
+ clock-names = "mmc";
+ clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
+ vqmmc-supply = <&vmmc_reg>;
+ max-frequency = <200000000>;
+ bus-width = <8>;
+ non-removable;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
};
--- /dev/null
+* Broadcom iProc PCIe controller with the platform bus interface
+
+Required properties:
+- compatible: Must be "brcm,iproc-pcie"
+- reg: base address and length of the PCIe controller I/O register space
+- #interrupt-cells: set to <1>
+- interrupt-map-mask and interrupt-map, standard PCI properties to define the
+ mapping of the PCIe interface to interrupt numbers
+- linux,pci-domain: PCI domain ID. Should be unique for each host controller
+- bus-range: PCI bus numbers covered
+- #address-cells: set to <3>
+- #size-cells: set to <2>
+- device_type: set to "pci"
+- ranges: ranges for the PCI memory and I/O regions
+
+Optional properties:
+- phys: phandle of the PCIe PHY device
+- phy-names: must be "pcie-phy"
+
+Example:
+ pcie0: pcie@18012000 {
+ compatible = "brcm,iproc-pcie";
+ reg = <0x18012000 0x1000>;
+
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
+
+ linux,pci-domain = <0>;
+
+ bus-range = <0x00 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x81000000 0 0 0x28000000 0 0x00010000
+ 0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
+
+ phys = <&phy 0 5>;
+ phy-names = "pcie-phy";
+ };
+
+ pcie1: pcie@18013000 {
+ compatible = "brcm,iproc-pcie";
+ reg = <0x18013000 0x1000>;
+
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
+
+ linux,pci-domain = <1>;
+
+ bus-range = <0x00 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x81000000 0 0 0x48000000 0 0x00010000
+ 0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
+
+ phys = <&phy 1 6>;
+ phy-names = "pcie-phy";
+ };
--- /dev/null
+Device tree binding documentation for am816x USB PHY
+=========================
+
+Required properties:
+- compatible : should be "ti,dm816x-usb-phy"
+- reg : offset and length of the PHY register set.
+- reg-names : name for the phy registers
+- clocks : phandle to the clock
+- clock-names : name of the clock
+- syscon: phandle for the syscon node to access misc registers
+- #phy-cells : from the generic PHY bindings, must be 1
+- syscon: phandle for the syscon node to access misc registers
+
+Example:
+
+usb_phy0: usb-phy@20 {
+ compatible = "ti,dm8168-usb-phy";
+ reg = <0x20 0x8>;
+ reg-names = "phy";
+ clocks = <&main_fapll 6>;
+ clock-names = "refclk";
+ #phy-cells = <0>;
+ syscon = <&scm_conf>;
+};
Required properties (port (child) node):
- #phy-cells : Should be 1 (See second example)
Cell after port phandle is device type from:
- - MIPHY_TYPE_SATA
- - MIPHY_TYPE_PCI
+ - PHY_TYPE_SATA
+ - PHY_TYPE_PCI
- reg : Address and length of register sets for each device in
"reg-names"
- reg-names : The names of the register addresses corresponding to the
Example:
-#include <dt-bindings/phy/phy-miphy365x.h>
+#include <dt-bindings/phy/phy.h>
sata0: sata@fe380000 {
...
- phys = <&phy_port0 MIPHY_TYPE_SATA>;
+ phys = <&phy_port0 PHY_TYPE_SATA>;
...
};
- compatible : Should be set to one of the following supported values:
- "samsung,exynos5250-usbdrd-phy" - for exynos5250 SoC,
- "samsung,exynos5420-usbdrd-phy" - for exynos5420 SoC.
+ - "samsung,exynos5433-usbdrd-phy" - for exynos5433 SoC.
- "samsung,exynos7-usbdrd-phy" - for exynos7 SoC.
- reg : Register offset and length of USB DRD PHY register set;
- clocks: Clock IDs array as required by the controller
PHY operations, associated by phy name. It is used to
determine bit values for clock settings register.
For Exynos5420 this is given as 'sclk_usbphy30' in CMU.
- - optional clocks: Exynos7 SoC has now following additional
+ - optional clocks: Exynos5433 & Exynos7 SoC has now following additional
gate clocks available:
- phy_pipe: for PIPE3 phy
- phy_utmi: for UTMI+ phy
--- /dev/null
+Allwinner sun9i USB PHY
+-----------------------
+
+Required properties:
+- compatible : should be one of
+ * allwinner,sun9i-a80-usb-phy
+- reg : a list of offset + length pairs
+- #phy-cells : from the generic phy bindings, must be 0
+- phy_type : "hsic" for HSIC usage;
+ other values or absence of this property indicates normal USB
+- clocks : phandle + clock specifier for the phy clocks
+- clock-names : depending on the "phy_type" property,
+ * "phy" for normal USB
+ * "hsic_480M", "hsic_12M" for HSIC
+- resets : a list of phandle + reset specifier pairs
+- reset-names : depending on the "phy_type" property,
+ * "phy" for normal USB
+ * "hsic" for HSIC
+
+Optional Properties:
+- phy-supply : from the generic phy bindings, a phandle to a regulator that
+ provides power to VBUS.
+
+It is recommended to list all clocks and resets available.
+The driver will only use those matching the phy_type.
+
+Example:
+ usbphy1: phy@00a01800 {
+ compatible = "allwinner,sun9i-a80-usb-phy";
+ reg = <0x00a01800 0x4>;
+ clocks = <&usb_phy_clk 2>, <&usb_phy_clk 10>,
+ <&usb_phy_clk 3>;
+ clock-names = "hsic_480M", "hsic_12M", "phy";
+ resets = <&usb_phy_clk 18>, <&usb_phy_clk 19>;
+ reset-names = "hsic", "phy";
+ status = "disabled";
+ #phy-cells = <0>;
+ };
--- /dev/null
+Broadcom Cygnus GPIO/PINCONF Controller
+
+Required properties:
+
+- compatible:
+ Must be "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or
+ "brcm,cygnus-crmu-gpio"
+
+- reg:
+ Define the base and range of the I/O address space that contains the Cygnus
+GPIO/PINCONF controller registers
+
+- #gpio-cells:
+ Must be two. The first cell is the GPIO pin number (within the
+controller's pin space) and the second cell is used for the following:
+ bit[0]: polarity (0 for active high and 1 for active low)
+
+- gpio-controller:
+ Specifies that the node is a GPIO controller
+
+Optional properties:
+
+- interrupts:
+ Interrupt ID
+
+- interrupt-controller:
+ Specifies that the node is an interrupt controller
+
+- pinmux:
+ Specifies the phandle to the IOMUX device, where pins can be individually
+muxed to GPIO
+
+Supported generic PINCONF properties in child nodes:
+
+- pins:
+ The list of pins (within the controller's own pin space) that properties
+in the node apply to. Pin names are "gpio-<pin>"
+
+- bias-disable:
+ Disable pin bias
+
+- bias-pull-up:
+ Enable internal pull up resistor
+
+- bias-pull-down:
+ Enable internal pull down resistor
+
+- drive-strength:
+ Valid drive strength values include 2, 4, 6, 8, 10, 12, 14, 16 (mA)
+
+Example:
+ gpio_ccm: gpio@1800a000 {
+ compatible = "brcm,cygnus-ccm-gpio";
+ reg = <0x1800a000 0x50>,
+ <0x0301d164 0x20>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+
+ touch_pins: touch_pins {
+ pwr: pwr {
+ pins = "gpio-0";
+ drive-strength = <16>;
+ };
+
+ event: event {
+ pins = "gpio-1";
+ bias-pull-up;
+ };
+ };
+ };
+
+ gpio_asiu: gpio@180a5000 {
+ compatible = "brcm,cygnus-asiu-gpio";
+ reg = <0x180a5000 0x668>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ };
+
+ /*
+ * Touchscreen that uses the CCM GPIO 0 and 1
+ */
+ tsc {
+ ...
+ ...
+ gpio-pwr = <&gpio_ccm 0 0>;
+ gpio-event = <&gpio_ccm 1 0>;
+ };
+
+ /* Bluetooth that uses the ASIU GPIO 5, with polarity inverted */
+ bluetooth {
+ ...
+ ...
+ bcm,rfkill-bank-sel = <&gpio_asiu 5 1>
+ }
--- /dev/null
+Broadcom Cygnus IOMUX Controller
+
+The Cygnus IOMUX controller supports group based mux configuration. In
+addition, certain pins can be muxed to GPIO function individually.
+
+Required properties:
+
+- compatible:
+ Must be "brcm,cygnus-pinmux"
+
+- reg:
+ Define the base and range of the I/O address space that contains the Cygnus
+IOMUX registers
+
+Properties in subnodes:
+
+- function:
+ The mux function to select
+
+- groups:
+ The list of groups to select with a given function
+
+For more details, refer to
+Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
+
+For example:
+
+ pinmux: pinmux@0x0301d0c8 {
+ compatible = "brcm,cygnus-pinmux";
+ reg = <0x0301d0c8 0x1b0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s0_default>;
+
+ i2s0_default: i2s0_default {
+ mux {
+ function = "i2s0";
+ groups = "i2s0_0_grp", "i2s0_1_grp";
+ };
+ };
+ };
+
+List of supported functions and groups in Cygnus:
+
+"i2s0": "i2s0_0_grp", "i2s0_1_grp"
+
+"i2s1": "i2s1_0_grp", "i2s1_1_grp"
+
+"i2s2": "i2s2_0_grp", "i2s2_1_grp", "i2s2_2_grp", "i2s2_3_grp", "i2s2_4_grp"
+
+"spdif": "spdif_grp"
+
+"pwm0": "pwm0_grp"
+
+"pwm1": "pwm1_grp"
+
+"pwm2": "pwm2_grp"
+
+"pwm3": "pwm3_grp"
+
+"pwm4": "pwm4_grp"
+
+"pwm5": "pwm5_grp"
+
+"key": "key0_grp", "key1_grp", "key2_grp", "key3_grp", "key4_grp", "key5_grp",
+"key6_grp", "key7_grp", "key8_grp", "key9_grp", "key10_grp", "key11_grp",
+"key12_grp", "key13_grp", "key14_grp", "key15_grp"
+
+"audio_dte": "audio_dte0_grp", "audio_dte1_grp", "audio_dte2_grp", "audio_dte3_grp"
+
+"smart_card0": "smart_card0_grp", "smart_card0_fcb_grp"
+
+"smart_card1": "smart_card1_grp", "smart_card1_fcb_grp"
+
+"spi0": "spi0_grp"
+
+"spi1": "spi1_grp"
+
+"spi2": "spi2_grp"
+
+"spi3": "spi3_grp"
+
+"spi4": "spi4_0_grp", "spi4_1_grp"
+
+"spi5": "spi5_grp"
+
+"sw_led0": "sw_led0_0_grp", "sw_led0_1_grp"
+
+"sw_led1": "sw_led1_grp"
+
+"sw_led2": "sw_led2_0_grp", "sw_led2_1_grp"
+
+"d1w": "d1w_grp"
+
+"lcd": "lcd_grp"
+
+"sram": "sram_0_grp", "sram_1_grp"
+
+"uart0": "uart0_grp"
+
+"uart1": "uart1_grp", "uart1_dte_grp"
+
+"uart2": "uart2_grp"
+
+"uart3": "uart3_grp"
+
+"uart4": "uart4_grp"
+
+"qspi": "qspi_0_grp", "qspi_1_grp"
+
+"nand": "nand_grp"
+
+"sdio0": "sdio0_grp", "sdio0_cd_grp", "sdio0_mmc_grp"
+
+"sdio1": "sdio1_data_0_grp", "sdio1_data_1_grp", "sdio1_cd_grp",
+"sdio1_led_grp", "sdio1_mmc_grp"
+
+"can0": "can0_grp"
+
+"can1": "can1_grp"
+
+"cam": "cam_led_grp", "cam_0_grp", "cam_1_grp"
+
+"bsc1": "bsc1_grp"
+
+"pcie_clkreq": "pcie_clkreq_grp"
+
+"usb0_oc": "usb0_oc_grp"
+
+"usb1_oc": "usb1_oc_grp"
+
+"usb2_oc": "usb2_oc_grp"
--- /dev/null
+* Marvell Armada 39x SoC pinctrl driver for mpp
+
+Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
+part and usage.
+
+Required properties:
+- compatible: "marvell,88f6920-pinctrl", "marvell,88f6928-pinctrl"
+ depending on the specific variant of the SoC being used.
+- reg: register specifier of MPP registers
+
+Available mpp pins/groups and functions:
+Note: brackets (x) are not part of the mpp name for marvell,function and given
+only for more detailed description in this document.
+
+name pins functions
+================================================================================
+mpp0 0 gpio, ua0(rxd)
+mpp1 1 gpio, ua0(txd)
+mpp2 2 gpio, i2c0(sck)
+mpp3 3 gpio, i2c0(sda)
+mpp4 4 gpio, ua1(txd), ua0(rts), smi(mdc)
+mpp5 5 gpio, ua1(rxd), ua0(cts), smi(mdio)
+mpp6 6 gpio, dev(cs3), xsmi(mdio)
+mpp7 7 gpio, dev(ad9), xsmi(mdc)
+mpp8 8 gpio, dev(ad10), ptp(trig)
+mpp9 9 gpio, dev(ad11), ptp(clk)
+mpp10 10 gpio, dev(ad12), ptp(event)
+mpp11 11 gpio, dev(ad13), led(clk)
+mpp12 12 gpio, pcie0(rstout), dev(ad14), led(stb)
+mpp13 13 gpio, dev(ad15), led(data)
+mpp14 14 gpio, m(vtt), dev(wen1), ua1(txd)
+mpp15 15 gpio, pcie0(rstout), spi0(mosi), i2c1(sck)
+mpp16 16 gpio, m(decc), spi0(miso), i2c1(sda)
+mpp17 17 gpio, ua1(rxd), spi0(sck), smi(mdio)
+mpp18 18 gpio, ua1(txd), spi0(cs0), i2c2(sck)
+mpp19 19 gpio, sata1(present) [1], ua0(cts), ua1(rxd), i2c2(sda)
+mpp20 20 gpio, sata0(present) [1], ua0(rts), ua1(txd), smi(mdc)
+mpp21 21 gpio, spi0(cs1), sata0(present) [1], sd(cmd), dev(bootcs), ge(rxd0)
+mpp22 22 gpio, spi0(mosi), dev(ad0)
+mpp23 23 gpio, spi0(sck), dev(ad2)
+mpp24 24 gpio, spi0(miso), ua0(cts), ua1(rxd), sd(d4), dev(readyn)
+mpp25 25 gpio, spi0(cs0), ua0(rts), ua1(txd), sd(d5), dev(cs0)
+mpp26 26 gpio, spi0(cs2), i2c1(sck), sd(d6), dev(cs1)
+mpp27 27 gpio, spi0(cs3), i2c1(sda), sd(d7), dev(cs2), ge(txclkout)
+mpp28 28 gpio, sd(clk), dev(ad5), ge(txd0)
+mpp29 29 gpio, dev(ale0), ge(txd1)
+mpp30 30 gpio, dev(oen), ge(txd2)
+mpp31 31 gpio, dev(ale1), ge(txd3)
+mpp32 32 gpio, dev(wen0), ge(txctl)
+mpp33 33 gpio, m(decc), dev(ad3)
+mpp34 34 gpio, dev(ad1)
+mpp35 35 gpio, ref(clk), dev(a1)
+mpp36 36 gpio, dev(a0)
+mpp37 37 gpio, sd(d3), dev(ad8), ge(rxclk)
+mpp38 38 gpio, ref(clk), sd(d0), dev(ad4), ge(rxd1)
+mpp39 39 gpio, i2c1(sck), ua0(cts), sd(d1), dev(a2), ge(rxd2)
+mpp40 40 gpio, i2c1(sda), ua0(rts), sd(d2), dev(ad6), ge(rxd3)
+mpp41 41 gpio, ua1(rxd), ua0(cts), spi1(cs3), dev(burstn), nd(rbn0), ge(rxctl)
+mpp42 42 gpio, ua1(txd), ua0(rts), dev(ad7)
+mpp43 43 gpio, pcie0(clkreq), m(vtt), m(decc), spi1(cs2), dev(clkout), nd(rbn1)
+mpp44 44 gpio, sata0(present) [1], sata1(present) [1], led(clk)
+mpp45 45 gpio, ref(clk), pcie0(rstout), ua1(rxd)
+mpp46 46 gpio, ref(clk), pcie0(rstout), ua1(txd), led(stb)
+mpp47 47 gpio, sata0(present) [1], sata1(present) [1], led(data)
+mpp48 48 gpio, sata0(present) [1], m(vtt), tdm(pclk) [1], audio(mclk) [1], sd(d4), pcie0(clkreq), ua1(txd)
+mpp49 49 gpio, tdm(fsync) [1], audio(lrclk) [1], sd(d5), ua2(rxd)
+mpp50 50 gpio, pcie0(rstout), tdm(drx) [1], audio(extclk) [1], sd(cmd), ua2(rxd)
+mpp51 51 gpio, tdm(dtx) [1], audio(sdo) [1], m(decc), ua2(txd)
+mpp52 52 gpio, pcie0(rstout), tdm(intn) [1], audio(sdi) [1], sd(d6), i2c3(sck)
+mpp53 53 gpio, sata1(present) [1], sata0(present) [1], tdm(rstn) [1], audio(bclk) [1], sd(d7), i2c3(sda)
+mpp54 54 gpio, sata0(present) [1], sata1(present) [1], pcie0(rstout), sd(d3), ua3(txd)
+mpp55 55 gpio, ua1(cts), spi1(cs1), sd(d0), ua1(rxd), ua3(rxd)
+mpp56 56 gpio, ua1(rts), m(decc), spi1(mosi), ua1(txd)
+mpp57 57 gpio, spi1(sck), sd(clk), ua1(txd)
+mpp58 58 gpio, i2c1(sck), pcie2(clkreq), spi1(miso), sd(d1), ua1(rxd)
+mpp59 59 gpio, pcie0(rstout), i2c1(sda), spi1(cs0), sd(d2)
+
+[1]: only available on 88F6928
== Amlogic Meson pinmux controller ==
Required properties for the root node:
- - compatible: "amlogic,meson8-pinctrl"
+ - compatible: "amlogic,meson8-pinctrl" or "amlogic,meson8b-pinctrl"
- reg: address and size of registers controlling irq functionality
=== GPIO sub-nodes ===
--- /dev/null
+NVIDIA Tegra210 pinmux controller
+
+Required properties:
+- compatible: "nvidia,tegra210-pinmux"
+- reg: Should contain a list of base address and size pairs for:
+ - first entry: The APB_MISC_GP_*_PADCTRL registers (pad control)
+ - second entry: The PINMUX_AUX_* registers (pinmux)
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices, including the meaning of the
+phrase "pin configuration node".
+
+Tegra's pin configuration nodes act as a container for an arbitrary number of
+subnodes. Each of these subnodes represents some desired configuration for a
+pin, a group, or a list of pins or groups. This configuration can include the
+mux function to select on those pin(s)/group(s), and various pin configuration
+parameters, such as pull-up, tristate, drive strength, etc.
+
+The name of each subnode is not important; all subnodes should be enumerated
+and processed purely based on their content.
+
+Each subnode only affects those parameters that are explicitly listed. In
+other words, a subnode that lists a mux function but no pin configuration
+parameters implies no information about any pin configuration parameters.
+Similarly, a pin subnode that describes a pullup parameter implies no
+information about e.g. the mux function or tristate parameter. For this
+reason, even seemingly boolean values are actually tristates in this binding:
+unspecified, off, or on. Unspecified is represented as an absent property,
+and off/on are represented as integer values 0 and 1.
+
+See the TRM to determine which properties and values apply to each pin/group.
+Macro values for property values are defined in
+include/dt-binding/pinctrl/pinctrl-tegra.h.
+
+Required subnode-properties:
+- nvidia,pins : An array of strings. Each string contains the name of a pin or
+ group. Valid values for these names are listed below.
+
+Optional subnode-properties:
+- nvidia,function: A string containing the name of the function to mux to the
+ pin or group.
+- nvidia,pull: Integer, representing the pull-down/up to apply to the pin.
+ 0: none, 1: down, 2: up.
+- nvidia,tristate: Integer.
+ 0: drive, 1: tristate.
+- nvidia,enable-input: Integer. Enable the pin's input path.
+ enable :TEGRA_PIN_ENABLE0 and
+ disable or output only: TEGRA_PIN_DISABLE.
+- nvidia,open-drain: Integer.
+ enable: TEGRA_PIN_ENABLE.
+ disable: TEGRA_PIN_DISABLE.
+- nvidia,lock: Integer. Lock the pin configuration against further changes
+ until reset.
+ enable: TEGRA_PIN_ENABLE.
+ disable: TEGRA_PIN_DISABLE.
+- nvidia,io-hv: Integer. Select high-voltage receivers.
+ normal: TEGRA_PIN_DISABLE
+ high: TEGRA_PIN_ENABLE
+- nvidia,high-speed-mode: Integer. Enable high speed mode the pins.
+ normal: TEGRA_PIN_DISABLE
+ high: TEGRA_PIN_ENABLE
+- nvidia,schmitt: Integer. Enables Schmitt Trigger on the input.
+ normal: TEGRA_PIN_DISABLE
+ high: TEGRA_PIN_ENABLE
+- nvidia,drive-type: Integer. Valid range 0...3.
+- nvidia,pull-down-strength: Integer. Controls drive strength. 0 is weakest.
+ The range of valid values depends on the pingroup. See "CAL_DRVDN" in the
+ Tegra TRM.
+- nvidia,pull-up-strength: Integer. Controls drive strength. 0 is weakest.
+ The range of valid values depends on the pingroup. See "CAL_DRVUP" in the
+ Tegra TRM.
+- nvidia,slew-rate-rising: Integer. Controls rising signal slew rate. 0 is
+ fastest. The range of valid values depends on the pingroup. See
+ "DRVDN_SLWR" in the Tegra TRM.
+- nvidia,slew-rate-falling: Integer. Controls falling signal slew rate. 0 is
+ fastest. The range of valid values depends on the pingroup. See
+ "DRVUP_SLWF" in the Tegra TRM.
+
+Valid values for pin and group names (nvidia,pin) are:
+
+ Mux groups:
+
+ These correspond to Tegra PINMUX_AUX_* (pinmux) registers. Any property
+ that exists in those registers may be set for the following pin names.
+
+ In Tegra210, many pins also have a dedicated APB_MISC_GP_*_PADCTRL
+ register. Where that is true, and property that exists in that register
+ may also be set on the following pin names.
+
+ als_prox_int_px3, ap_ready_pv5, ap_wake_bt_ph3, ap_wake_nfc_ph7,
+ aud_mclk_pbb0, batt_bcl, bt_rst_ph4, bt_wake_ap_ph5, button_home_py1,
+ button_power_on_px5, button_slide_sw_py0, button_vol_down_px7,
+ button_vol_up_px6, cam1_mclk_ps0, cam1_pwdn_ps7, cam1_strobe_pt1,
+ cam2_mclk_ps1, cam2_pwdn_pt0, cam_af_en_ps5, cam_flash_en_ps6,
+ cam_i2c_scl_ps2, cam_i2c_sda_ps3, cam_rst_ps4cam_rst_ps4, clk_32k_in,
+ clk_32k_out_py5, clk_req, core_pwr_req, cpu_pwr_req, dap1_din_pb1,
+ dap1_dout_pb2, dap1_fs_pb0, dap1_sclk_pb3, dap2_din_paa2, dap2_dout_paa3,
+ dap2_fs_paa0, dap2_sclk_paa1, dap4_din_pj5, dap4_dout_pj6, dap4_fs_pj4,
+ dap4_sclk_pj7, dmic1_clk_pe0, dmic1_dat_pe1, dmic2_clk_pe2, dmic2_dat_pe3,
+ dmic3_clk_pe4, dmic3_dat_pe5, dp_hpd0_pcc6, dvfs_clk_pbb2, dvfs_pwm_pbb1,
+ gen1_i2c_scl_pj1, gen1_i2c_sda_pj0, gen2_i2c_scl_pj2, gen2_i2c_sda_pj3,
+ gen3_i2c_scl_pf0, gen3_i2c_sda_pf1, gpio_x1_aud_pbb3, gpio_x3_aud_pbb4,
+ gps_en_pi2, gps_rst_pi3, hdmi_cec_pcc0, hdmi_int_dp_hpd_pcc1, jtag_rtck,
+ lcd_bl_en_pv1, lcd_bl_pwm_pv0, lcd_gpio1_pv3, lcd_gpio2_pv4, lcd_rst_pv2,
+ lcd_te_py2, modem_wake_ap_px0, motion_int_px2, nfc_en_pi0, nfc_int_pi1,
+ pa6, pcc7, pe6, pe7, pex_l0_clkreq_n_pa1, pex_l0_rst_n_pa0,
+ pex_l1_clkreq_n_pa4, pex_l1_rst_n_pa3, pex_wake_n_pa2, ph6, pk0, pk1, pk2,
+ pk3, pk4, pk5, pk6, pk7, pl0, pl1, pwr_i2c_scl_py3, pwr_i2c_sda_py4,
+ pwr_int_n, pz0, pz1, pz2, pz3, pz4, pz5, qspi_cs_n_pee1, qspi_io0_pee2,
+ qspi_io1_pee3, qspi_io2_pee4, qspi_io3_pee5, qspi_sck_pee0,
+ sata_led_active_pa5, sdmmc1_clk_pm0, sdmmc1_cmd_pm1, sdmmc1_dat0_pm5,
+ sdmmc1_dat1_pm4, sdmmc1_dat2_pm3, sdmmc1_dat3_pm2, sdmmc3_clk_pp0,
+ sdmmc3_cmd_pp1, sdmmc3_dat0_pp5, sdmmc3_dat1_pp4, sdmmc3_dat2_pp3,
+ sdmmc3_dat3_pp2, shutdown, spdif_in_pcc3, spdif_out_pcc2, spi1_cs0_pc3,
+ spi1_cs1_pc4, spi1_miso_pc1, spi1_mosi_pc0, spi1_sck_pc2, spi2_cs0_pb7,
+ spi2_cs1_pdd0, spi2_miso_pb5, spi2_mosi_pb4, spi2_sck_pb6, spi4_cs0_pc6,
+ spi4_miso_pd0, spi4_mosi_pc7, spi4_sck_pc5, temp_alert_px4, touch_clk_pv7,
+ touch_int_px1, touch_rst_pv6, uart1_cts_pu3, uart1_rts_pu2, uart1_rx_pu1,
+ uart1_tx_pu0, uart2_cts_pg3, uart2_rts_pg2, uart2_rx_pg1, uart2_tx_pg0,
+ uart3_cts_pd4, uart3_rts_pd3, uart3_rx_pd2, uart3_tx_pd1, uart4_cts_pi7,
+ uart4_rts_pi6, uart4_rx_pi5, uart4_tx_pi4, usb_vbus_en0_pcc4,
+ usb_vbus_en1_pcc5, wifi_en_ph0, wifi_rst_ph1, wifi_wake_ap_ph2
+
+ Drive groups:
+
+ These correspond to the Tegra APB_MISC_GP_*_PADCTRL (pad control)
+ registers. Note that where one of these registers controls a single pin
+ for which a PINMUX_AUX_* exists, see the list above for the pin name to
+ use when configuring the pinmux.
+
+ pa6, pcc7, pe6, pe7, ph6, pk0, pk1, pk2, pk3, pk4, pk5, pk6, pk7, pl0, pl1,
+ pz0, pz1, pz2, pz3, pz4, pz5, sdmmc1, sdmmc2, sdmmc3, sdmmc4
+
+Valid values for nvidia,functions are:
+
+ aud, bcl, blink, ccla, cec, cldvfs, clk, core, cpu, displaya, displayb,
+ dmic1, dmic2, dmic3, dp, dtv, extperiph3, i2c1, i2c2, i2c3, i2cpmu, i2cvi,
+ i2s1, i2s2, i2s3, i2s4a, i2s4b, i2s5a, i2s5b, iqc0, iqc1, jtag, pe, pe0,
+ pe1, pmi, pwm0, pwm1, pwm2, pwm3, qspi, rsvd0, rsvd1, rsvd2, rsvd3, sata,
+ sdmmc1, sdmmc3, shutdown, soc, sor0, sor1, spdif, spi1, spi2, spi3, spi4,
+ sys, touch, uart, uarta, uartb, uartc, uartd, usb, vgp1, vgp2, vgp3, vgp4,
+ vgp5, vgp6, vimclk, vimclk2
+
+Example:
+
+ pinmux: pinmux@70000800 {
+ compatible = "nvidia,tegra210-pinmux";
+ reg = <0x0 0x700008d4 0x0 0x2a8>, /* Pad control registers */
+ <0x0 0x70003000 0x0 0x1000>; /* Mux registers */
+
+ pinctrl-names = "boot";
+ pinctrl-0 = <&state_boot>;
+
+ state_boot: pinmux {
+ gen1_i2c_scl_pj1 {
+ nvidia,pins = "gen1_i2c_scl_pj1",
+ nvidia,function = "i2c1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,io-hv = <TEGRA_PIN_ENABLE>;
+ };
+ };
+ };
+};
assigned a name. When names are used, another property exists to map from
those names to the integer IDs.
-Each client device's own binding determines the set of states the must be
+Each client device's own binding determines the set of states that must be
defined in its device tree node, and whether to define the set of state
IDs that must be provided, or whether to define the set of state names that
must be provided.
function - the mux function to select
groups - the list of groups to select with this function
+ (either this or "pins" must be specified)
+pins - the list of pins to select with this function (either
+ this or "groups" must be specified)
Example:
state_0_node_a {
- function = "uart0";
- groups = "u0rxtx", "u0rtscts";
+ uart0 {
+ function = "uart0";
+ groups = "u0rxtx", "u0rtscts";
+ };
};
state_1_node_a {
- function = "spi0";
- groups = "spi0pins";
+ spi0 {
+ function = "spi0";
+ groups = "spi0pins";
+ };
+};
+state_2_node_a {
+ function = "i2c0";
+ pins = "mfio29", "mfio30";
};
== Generic pin configuration node content ==
For example:
state_0_node_a {
- pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
- bias-pull-up;
+ cts_rxd {
+ pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
+ bias-pull-up;
+ };
};
state_1_node_a {
- pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
- output-high;
+ rts_txd {
+ pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
+ output-high;
+ };
};
state_2_node_a {
- group = "foo-group";
- bias-pull-up;
+ foo {
+ group = "foo-group";
+ bias-pull-up;
+ };
};
Some of the generic properties take arguments. For those that do, the
--- /dev/null
+* Mediatek MT65XX Pin Controller
+
+The Mediatek's Pin controller is used to control SoC pins.
+
+Required properties:
+- compatible: value should be either of the following.
+ (a) "mediatek,mt8135-pinctrl", compatible with mt8135 pinctrl.
+- mediatek,pctl-regmap: Should be a phandle of the syscfg node.
+- pins-are-numbered: Specify the subnodes are using numbered pinmux to
+ specify pins.
+- gpio-controller : Marks the device node as a gpio controller.
+- #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
+ binding is used, the amount of cells must be specified as 2. See the below
+ mentioned gpio binding representation for description of particular cells.
+
+ Eg: <&pio 6 0>
+ <[phandle of the gpio controller node]
+ [line number within the gpio controller]
+ [flags]>
+
+ Values for gpio specifier:
+ - Line number: is a value between 0 to 202.
+ - Flags: bit field of flags, as defined in <dt-bindings/gpio/gpio.h>.
+ Only the following flags are supported:
+ 0 - GPIO_ACTIVE_HIGH
+ 1 - GPIO_ACTIVE_LOW
+- reg: physicall address base for EINT registers
+- interrupt-controller: Marks the device node as an interrupt controller
+- #interrupt-cells: Should be two.
+- interrupts : The interrupt outputs from the controller.
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices.
+
+Subnode format
+A pinctrl node should contain at least one subnodes representing the
+pinctrl groups available on the machine. Each subnode will list the
+pins it needs, and how they should be configured, with regard to muxer
+configuration, pullups, drive strength, input enable/disable and input schmitt.
+
+ node {
+ pinmux = <PIN_NUMBER_PINMUX>;
+ GENERIC_PINCONFIG;
+ };
+
+Required properties:
+- pinmux: integer array, represents gpio pin number and mux setting.
+ Supported pin number and mux varies for different SoCs, and are defined
+ as macros in boot/dts/<soc>-pinfunc.h directly.
+
+Optional properties:
+- GENERIC_PINCONFIG: is the generic pinconfig options to use, bias-disable,
+ bias-pull-down, bias-pull-up, input-enable, input-disable, output-low, output-high,
+ input-schmitt-enable, input-schmitt-disable and drive-strength are valid.
+
+ Some special pins have extra pull up strength, there are R0 and R1 pull-up
+ resistors available, but for user, it's only need to set R1R0 as 00, 01, 10 or 11.
+ So when config bias-pull-up, it support arguments for those special pins.
+ Some macros have been defined for this usage, such as MTK_PUPD_SET_R1R0_00.
+ See dt-bindings/pinctrl/mt65xx.h.
+
+ When config drive-strength, it can support some arguments, such as
+ MTK_DRIVE_4mA, MTK_DRIVE_6mA, etc. See dt-bindings/pinctrl/mt65xx.h.
+
+Examples:
+
+#include "mt8135-pinfunc.h"
+
+...
+{
+ syscfg_pctl_a: syscfg_pctl_a@10005000 {
+ compatible = "mediatek,mt8135-pctl-a-syscfg", "syscon";
+ reg = <0 0x10005000 0 0x1000>;
+ };
+
+ syscfg_pctl_b: syscfg_pctl_b@1020C020 {
+ compatible = "mediatek,mt8135-pctl-b-syscfg", "syscon";
+ reg = <0 0x1020C020 0 0x1000>;
+ };
+
+ pinctrl@01c20800 {
+ compatible = "mediatek,mt8135-pinctrl";
+ reg = <0 0x1000B000 0 0x1000>;
+ mediatek,pctl-regmap = <&syscfg_pctl_a &syscfg_pctl_b>;
+ pins-are-numbered;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+
+ i2c0_pins_a: i2c0@0 {
+ pins1 {
+ pinmux = <MT8135_PIN_100_SDA0__FUNC_SDA0>,
+ <MT8135_PIN_101_SCL0__FUNC_SCL0>;
+ bias-disable;
+ };
+ };
+
+ i2c1_pins_a: i2c1@0 {
+ pins {
+ pinmux = <MT8135_PIN_195_SDA1__FUNC_SDA1>,
+ <MT8135_PIN_196_SCL1__FUNC_SCL1>;
+ bias-pull-up = <55>;
+ };
+ };
+
+ i2c2_pins_a: i2c2@0 {
+ pins1 {
+ pinmux = <MT8135_PIN_193_SDA2__FUNC_SDA2>;
+ bias-pull-down;
+ };
+
+ pins2 {
+ pinmux = <MT8135_PIN_49_WATCHDOG__FUNC_GPIO49>;
+ bias-pull-up;
+ };
+ };
+
+ i2c3_pins_a: i2c3@0 {
+ pins1 {
+ pinmux = <MT8135_PIN_40_DAC_CLK__FUNC_GPIO40>,
+ <MT8135_PIN_41_DAC_WS__FUNC_GPIO41>;
+ bias-pull-up = <55>;
+ };
+
+ pins2 {
+ pinmux = <MT8135_PIN_35_SCL3__FUNC_SCL3>,
+ <MT8135_PIN_36_SDA3__FUNC_SDA3>;
+ output-low;
+ bias-pull-up = <55>;
+ };
+
+ pins3 {
+ pinmux = <MT8135_PIN_57_JTCK__FUNC_GPIO57>,
+ <MT8135_PIN_60_JTDI__FUNC_JTDI>;
+ drive-strength = <32>;
+ };
+ };
+
+ ...
+ }
+};
"qcom,pm8018-gpio"
"qcom,pm8038-gpio"
"qcom,pm8058-gpio"
+ "qcom,pm8916-gpio"
"qcom,pm8917-gpio"
"qcom,pm8921-gpio"
"qcom,pm8941-gpio"
gpio1-gpio6 for pm8018
gpio1-gpio12 for pm8038
gpio1-gpio40 for pm8058
+ gpio1-gpio4 for pm8916
gpio1-gpio38 for pm8917
gpio1-gpio44 for pm8921
gpio1-gpio36 for pm8941
Value type: <string>
Definition: Should contain one of:
"qcom,pm8841-mpp",
+ "qcom,pm8916-mpp",
"qcom,pm8941-mpp",
"qcom,pma8084-mpp",
Definition: List of MPP pins affected by the properties specified in
this subnode. Valid pins are:
mpp1-mpp4 for pm8841
+ mpp1-mpp4 for pm8916
mpp1-mpp8 for pm8941
mpp1-mpp4 for pma8084
--- /dev/null
+Dialog Semiconductor DA9150 Charger Power Supply bindings
+
+Required properties:
+- compatible: "dlg,da9150-charger" for DA9150 Charger Power Supply
+
+Optional properties:
+- io-channels: List of phandle and IIO specifier pairs
+- io-channel-names: List of channel names used by charger
+ ["CHAN_IBUS", "CHAN_VBUS", "CHAN_TJUNC", "CHAN_VBAT"]
+ (See Documentation/devicetree/bindings/iio/iio-bindings.txt for further info)
+
+
+Example:
+
+ da9150-charger {
+ compatible = "dlg,da9150-charger";
+
+ io-channels = <&gpadc 0>,
+ <&gpadc 2>,
+ <&gpadc 8>,
+ <&gpadc 5>;
+ io-channel-names = "CHAN_IBUS",
+ "CHAN_VBUS",
+ "CHAN_TJUNC",
+ "CHAN_VBAT";
+ };
--- /dev/null
+Generic SYSCON mapped register poweroff driver
+
+This is a generic poweroff driver using syscon to map the poweroff register.
+The poweroff is generally performed with a write to the poweroff register
+defined by the register map pointed by syscon reference plus the offset
+with the mask defined in the poweroff node.
+
+Required properties:
+- compatible: should contain "syscon-poweroff"
+- regmap: this is phandle to the register map node
+- offset: offset in the register map for the poweroff register (in bytes)
+- mask: the poweroff value written to the poweroff register (32 bit access)
+
+Default will be little endian mode, 32 bit access only.
+
+Examples:
+
+ poweroff {
+ compatible = "syscon-poweroff";
+ regmap = <®mapnode>;
+ offset = <0x0>;
+ mask = <0x7a>;
+ };
-------------------
Required properties:
-- compatible: "active-semi,act8846" or "active-semi,act8865"
+- compatible: "active-semi,act8846" or "active-semi,act8865" or "active-semi,act8600"
- reg: I2C slave address
Optional properties:
- system-power-controller: Telling whether or not this pmic is controlling
the system power. See Documentation/devicetree/bindings/power/power-controller.txt .
+Optional input supply properties:
+- for act8600:
+ - vp1-supply: The input supply for DCDC_REG1
+ - vp2-supply: The input supply for DCDC_REG2
+ - vp3-supply: The input supply for DCDC_REG3
+ - inl-supply: The input supply for LDO_REG5, LDO_REG6, LDO_REG7 and LDO_REG8
+ SUDCDC_REG4, LDO_REG9 and LDO_REG10 do not have separate supplies.
+- for act8846:
+ - vp1-supply: The input supply for REG1
+ - vp2-supply: The input supply for REG2
+ - vp3-supply: The input supply for REG3
+ - vp4-supply: The input supply for REG4
+ - inl1-supply: The input supply for REG5, REG6 and REG7
+ - inl2-supply: The input supply for REG8 and LDO_REG9
+ - inl3-supply: The input supply for REG10, REG11 and REG12
+- for act8865:
+ - vp1-supply: The input supply for DCDC_REG1
+ - vp2-supply: The input supply for DCDC_REG2
+ - vp3-supply: The input supply for DCDC_REG3
+ - inl45-supply: The input supply for LDO_REG1 and LDO_REG2
+ - inl67-supply: The input supply for LDO_REG3 and LDO_REG4
+
Any standard regulator properties can be used to configure the single regulator.
The valid names for regulators are:
REG1, REG2, REG3, REG4, REG5, REG6, REG7, REG8, REG9, REG10, REG11, REG12
- for act8865:
DCDC_REG1, DCDC_REG2, DCDC_REG3, LDO_REG1, LDO_REG2, LDO_REG3, LDO_REG4.
+ - for act8600:
+ DCDC_REG1, DCDC_REG2, DCDC_REG3, SUDCDC_REG4, LDO_REG5, LDO_REG6, LDO_REG7,
+ LDO_REG8, LDO_REG9, LDO_REG10,
Example:
--------
(CSPI/eCSPI) for i.MX
Required properties:
-- compatible : Should be "fsl,<soc>-cspi" or "fsl,<soc>-ecspi"
+- compatible :
+ - "fsl,imx1-cspi" for SPI compatible with the one integrated on i.MX1
+ - "fsl,imx21-cspi" for SPI compatible with the one integrated on i.MX21
+ - "fsl,imx27-cspi" for SPI compatible with the one integrated on i.MX27
+ - "fsl,imx31-cspi" for SPI compatible with the one integrated on i.MX31
+ - "fsl,imx35-cspi" for SPI compatible with the one integrated on i.MX35
+ - "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51
- reg : Offset and length of the register set for the device
- interrupts : Should contain CSPI/eCSPI interrupt
- fsl,spi-num-chipselects : Contains the number of the chipselect
- cs-gpios : Specifies the gpio pins to be used for chipselects.
+- clocks : Clock specifiers for both ipg and per clocks.
+- clock-names : Clock names should include both "ipg" and "per"
+See the clock consumer binding,
+ Documentation/devicetree/bindings/clock/clock-bindings.txt
- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
Documentation/devicetree/bindings/dma/dma.txt
- dma-names: DMA request names should include "tx" and "rx" if present.
nodes. If unspecified, a single SPI device without a chip
select can be used.
+- dmas: Two DMA channel specifiers following the convention outlined
+ in bindings/dma/dma.txt
+- dma-names: Names for the dma channels, if present. There must be at
+ least one channel named "tx" for transmit and named "rx" for
+ receive.
SPI slave nodes must be children of the SPI master node and can contain
properties described in Documentation/devicetree/bindings/spi/spi-bus.txt
clocks = <&gcc GCC_BLSP2_QUP2_SPI_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
clock-names = "core", "iface";
+ dmas = <&blsp1_bam 13>, <&blsp1_bam 12>;
+ dma-names = "rx", "tx";
+
pinctrl-names = "default";
pinctrl-0 = <&spi8_default>;
in big endian mode, otherwise in native mode(same with CPU), for more
detail please see: Documentation/devicetree/bindings/regmap/regmap.txt.
+Optional SPI slave node properties:
+- fsl,spi-cs-sck-delay: a delay in nanoseconds between activating chip
+ select and the start of clock signal, at the start of a transfer.
+- fsl,spi-sck-cs-delay: a delay in nanoseconds between stopping the clock
+ signal and deactivating chip select, at the end of a transfer.
+
Example:
dspi0@4002c000 {
reg = <0>;
linux,modalias = "m25p80";
modal = "at26df081a";
+ fsl,spi-cs-sck-delay = <100>;
+ fsl,spi-sck-cs-delay = <50>;
};
};
- dma-names: Must include the following entries:
- rx
- tx
+- cs-gpios: Must specify the GPIOs used for chipselect lines.
- #address-cells: Must be 1.
- #size-cells: Must be 0.
- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
Documentation/devicetree/bindings/dma/dma.txt
- dma-names: DMA request names should include "tx" and "rx" if present.
+- rx-sample-delay-ns: nanoseconds to delay after the SCLK edge before sampling
+ Rx data (may need to be fine tuned for high capacitance lines).
+ No delay (0) by default.
Example:
reg = <0xff110000 0x1000>;
dmas = <&pdma1 11>, <&pdma1 12>;
dma-names = "tx", "rx";
+ rx-sample-delay-ns = <10>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
- compatible : "renesas,thermal-<soctype>", "renesas,rcar-thermal"
as fallback.
Examples with soctypes are:
- - "renesas,thermal-r8a73a4" (R-Mobile AP6)
+ - "renesas,thermal-r8a73a4" (R-Mobile APE6)
- "renesas,thermal-r8a7779" (R-Car H1)
- "renesas,thermal-r8a7790" (R-Car H2)
- "renesas,thermal-r8a7791" (R-Car M2-W)
- phys: from the *Generic PHY* bindings
- phy-names: from the *Generic PHY* bindings
- tx-fifo-resize: determines if the FIFO *has* to be reallocated.
+ - snps,usb3_lpm_capable: determines if platform is USB3 LPM capable
- snps,disable_scramble_quirk: true when SW should disable data scrambling.
Only really useful for FPGA builds.
- snps,has-lpm-erratum: true when DWC3 was configured with LPM Erratum enabled
- phys: phandle + phy specifier pair
- phy-names: must be "usb"
- dmas: Must contain a list of references to DMA specifiers.
- - dma-names : Must contain a list of DMA names, "tx" or "rx".
+ - dma-names : Must contain a list of DMA names:
+ - tx0 ... tx<n>
+ - rx0 ... rx<n>
+ - This <n> means DnFIFO in USBHS module.
Example:
usbhs: usb@e6590000 {
- compatible: Should be one of below:
"fsl,imx6q-usbmisc" for imx6q
"fsl,vf610-usbmisc" for Vybrid vf610
+ "fsl,imx6sx-usbmisc" for imx6sx
- reg: Should contain registers location and length
Examples:
national National Semiconductor
neonode Neonode Inc.
netgear NETGEAR
+netlogic Broadcom Corporation (formerly NetLogic Microsystems)
newhaven Newhaven Display International
nintendo Nintendo
nokia Nokia
silergy Silergy Corp.
sirf SiRF Technology, Inc.
sitronix Sitronix Technology Corporation
+skyworks Skyworks Solutions, Inc.
smsc Standard Microsystems Corporation
snps Synopsys, Inc.
solidrun SolidRun
winbond Winbond Electronics corp.
wlf Wolfson Microelectronics
wm Wondermedia Technologies, Inc.
+x-powers X-Powers
xes Extreme Engineering Solutions (X-ES)
xillybus Xillybus Ltd.
xlnx Xilinx
--- /dev/null
+SKY81452-backlight bindings
+
+Required properties:
+- compatible : Must be "skyworks,sky81452-backlight"
+
+Optional properties:
+- name : Name of backlight device. Default is 'lcd-backlight'.
+- gpios : GPIO to use to EN pin.
+ See Documentation/devicetree/bindings/gpio/gpio.txt
+- led-sources : List of enabled channels from 0 to 5.
+ See Documentation/devicetree/bindings/leds/common.txt
+- skyworks,ignore-pwm : Ignore both PWM input
+- skyworks,dpwm-mode : Enable DPWM dimming mode, otherwise Analog dimming.
+- skyworks,phase-shift : Enable phase shift mode
+- skyworks,short-detection-threshold-volt
+ : It should be one of 4, 5, 6 and 7V.
+- skyworks,current-limit-mA
+ : It should be 2300mA or 2750mA.
+
+Example:
+
+ backlight {
+ compatible = "skyworks,sky81452-backlight";
+ name = "pwm-backlight";
+ led-sources = <0 1 2 5>;
+ skyworks,ignore-pwm;
+ skyworks,phase-shift;
+ skyworks,current-limit-mA = <2300>;
+ };
the usage id of X axis. HID sensors can provide events, so this is not necessary
to poll for any field. If there is some new sample, the core driver will call
registered callback function to process the sample.
+
+
+----------
+
+HID Custom and generic Sensors
+
+HID Sensor specification defines two special sensor usage types. Since they
+don't represent a standard sensor, it is not possible to define using Linux IIO
+type interfaces.
+The purpose of these sensors is to extend the functionality or provide a
+way to obfuscate the data being communicated by a sensor. Without knowing the
+mapping between the data and its encapsulated form, it is difficult for
+an application/driver to determine what data is being communicated by the sensor.
+This allows some differentiating use cases, where vendor can provide applications.
+Some common use cases are debug other sensors or to provide some events like
+keyboard attached/detached or lid open/close.
+
+To allow application to utilize these sensors, here they are exported uses sysfs
+attribute groups, attributes and misc device interface.
+
+An example of this representation on sysfs:
+/sys/devices/pci0000:00/INT33C2:00/i2c-0/i2c-INT33D1:00/0018:8086:09FA.0001/HID-SENSOR-2000e1.6.auto$ tree -R
+.
+????????? enable_sensor
+????????? feature-0-200316
+??????? ????????? feature-0-200316-maximum
+??????? ????????? feature-0-200316-minimum
+??????? ????????? feature-0-200316-name
+??????? ????????? feature-0-200316-size
+??????? ????????? feature-0-200316-unit-expo
+??????? ????????? feature-0-200316-units
+??????? ????????? feature-0-200316-value
+????????? feature-1-200201
+??????? ????????? feature-1-200201-maximum
+??????? ????????? feature-1-200201-minimum
+??????? ????????? feature-1-200201-name
+??????? ????????? feature-1-200201-size
+??????? ????????? feature-1-200201-unit-expo
+??????? ????????? feature-1-200201-units
+??????? ????????? feature-1-200201-value
+????????? input-0-200201
+??????? ????????? input-0-200201-maximum
+??????? ????????? input-0-200201-minimum
+??????? ????????? input-0-200201-name
+??????? ????????? input-0-200201-size
+??????? ????????? input-0-200201-unit-expo
+??????? ????????? input-0-200201-units
+??????? ????????? input-0-200201-value
+????????? input-1-200202
+??????? ????????? input-1-200202-maximum
+??????? ????????? input-1-200202-minimum
+??????? ????????? input-1-200202-name
+??????? ????????? input-1-200202-size
+??????? ????????? input-1-200202-unit-expo
+??????? ????????? input-1-200202-units
+??????? ????????? input-1-200202-value
+
+Here there is a custom sensors with four fields, two feature and two inputs.
+Each field is represented by a set of attributes. All fields except the "value"
+are read only. The value field is a RW field.
+Example
+/sys/bus/platform/devices/HID-SENSOR-2000e1.6.auto/feature-0-200316$ grep -r . *
+feature-0-200316-maximum:6
+feature-0-200316-minimum:0
+feature-0-200316-name:property-reporting-state
+feature-0-200316-size:1
+feature-0-200316-unit-expo:0
+feature-0-200316-units:25
+feature-0-200316-value:1
+
+How to enable such sensor?
+By default sensor can be power gated. To enable sysfs attribute "enable" can be
+used.
+$ echo 1 > enable_sensor
+
+Once enabled and powered on, sensor can report value using HID reports.
+These reports are pushed using misc device interface in a FIFO order.
+/dev$ tree | grep HID-SENSOR-2000e1.6.auto
+??????? ????????? 10:53 -> ../HID-SENSOR-2000e1.6.auto
+????????? HID-SENSOR-2000e1.6.auto
+
+Each reports can be of variable length preceded by a header. This header
+consist of a 32 bit usage id, 64 bit time stamp and 32 bit length field of raw
+data.
Prefix: 'it8603'
Addresses scanned: from Super I/O config space (8 I/O ports)
Datasheet: Not publicly available
+ * IT8620E
+ Prefix: 'it8620'
+ Addresses scanned: from Super I/O config space (8 I/O ports)
+ Datasheet: Not publicly available
* IT8705F
Prefix: 'it87'
Addresses scanned: from Super I/O config space (8 I/O ports)
Prefix: 'it8772'
Addresses scanned: from Super I/O config space (8 I/O ports)
Datasheet: Not publicly available
+ * IT8781F
+ Prefix: 'it8781'
+ Addresses scanned: from Super I/O config space (8 I/O ports)
+ Datasheet: Not publicly available
* IT8782F
Prefix: 'it8782'
Addresses scanned: from Super I/O config space (8 I/O ports)
Prefix: 'it8783'
Addresses scanned: from Super I/O config space (8 I/O ports)
Datasheet: Not publicly available
+ * IT8786E
+ Prefix: 'it8786'
+ Addresses scanned: from Super I/O config space (8 I/O ports)
+ Datasheet: Not publicly available
+ * IT8790E
+ Prefix: 'it8790'
+ Addresses scanned: from Super I/O config space (8 I/O ports)
+ Datasheet: Not publicly available
* SiS950 [clone of IT8705F]
Prefix: 'it87'
Addresses scanned: from Super I/O config space (8 I/O ports)
Description
-----------
-This driver implements support for the IT8603E, IT8623E, IT8705F, IT8712F,
-IT8716F, IT8718F, IT8720F, IT8721F, IT8726F, IT8728F, IT8758E, IT8771E,
-IT8772E, IT8782F, IT8783E/F, and SiS950 chips.
+This driver implements support for the IT8603E, IT8620E, IT8623E, IT8705F,
+IT8712F, IT8716F, IT8718F, IT8720F, IT8721F, IT8726F, IT8728F, IT8758E,
+IT8771E, IT8772E, IT8781F, IT8782F, IT8783E/F, IT8786E, IT8790E, and SiS950
+chips.
These chips are 'Super I/O chips', supporting floppy disks, infrared ports,
joysticks and other miscellaneous stuff. For hardware monitoring, they
have support for 2 additional fans. The additional fans are supported by the
driver.
-The IT8716F, IT8718F, IT8720F, IT8721F/IT8758E, IT8782F, IT8783E/F, and late
-IT8712F and IT8705F also have optional 16-bit tachometer counters for fans 1 to
-3. This is better (no more fan clock divider mess) but not compatible with the
-older chips and revisions. The 16-bit tachometer mode is enabled by the driver
-when one of the above chips is detected.
+The IT8716F, IT8718F, IT8720F, IT8721F/IT8758E, IT8781F, IT8782F, IT8783E/F,
+and late IT8712F and IT8705F also have optional 16-bit tachometer counters
+for fans 1 to 3. This is better (no more fan clock divider mess) but not
+compatible with the older chips and revisions. The 16-bit tachometer mode
+is enabled by the driver when one of the above chips is detected.
The IT8726F is just bit enhanced IT8716F with additional hardware
for AMD power sequencing. Therefore the chip will appear as IT8716F
until a datasheet becomes available (hopefully.)
The IT8603E/IT8623E is a custom design, hardware monitoring part is similar to
-IT8728F. It only supports 16-bit fan mode, the full speed mode of the
-fan is not supported (value 0 of pwmX_enable).
+IT8728F. It only supports 3 fans, 16-bit fan mode, and the full speed mode
+of the fan is not supported (value 0 of pwmX_enable).
+
+The IT8620E is another custom design, hardware monitoring part is similar to
+IT8728F. It only supports 16-bit fan mode.
+
+The IT8790E supports up to 3 fans. 16-bit fan mode is always enabled.
Temperatures are measured in degrees Celsius. An alarm is triggered once
when the Overtemperature Shutdown limit is crossed.
0.016 volt (except IT8603E, IT8721F/IT8758E and IT8728F: 0.012 volt.) The
battery voltage in8 does not have limit registers.
-On the IT8603E, IT8721F/IT8758E, IT8782F, and IT8783E/F, some voltage inputs
-are internal and scaled inside the chip:
+On the IT8603E, IT8721F/IT8758E, IT8781F, IT8782F, and IT8783E/F, some
+voltage inputs are internal and scaled inside the chip:
* in3 (optional)
-* in7 (optional for IT8782F and IT8783E/F)
+* in7 (optional for IT8781F, IT8782F, and IT8783E/F)
* in8 (always)
* in9 (relevant for IT8603E only)
The driver handles this transparently so user-space doesn't have to care.
http://www.atmel.com/Images/doc8711.pdf
http://www.atmel.com/Images/Atmel-8852-SEEPROM-AT30TSE002A-Datasheet.pdf
http://www.atmel.com/Images/Atmel-8868-DTS-AT30TSE004A-Datasheet.pdf
- * IDT TSE2002B3, TSE2002GB2, TS3000B3, TS3000GB2
+ * IDT TSE2002B3, TSE2002GB2, TSE2004GB2, TS3000B3, TS3000GB0, TS3000GB2,
+ TS3001GB2
Datasheets:
- http://www.idt.com/sites/default/files/documents/IDT_TSE2002B3C_DST_20100512_120303152056.pdf
- http://www.idt.com/sites/default/files/documents/IDT_TSE2002GB2A1_DST_20111107_120303145914.pdf
- http://www.idt.com/sites/default/files/documents/IDT_TS3000B3A_DST_20101129_120303152013.pdf
- http://www.idt.com/sites/default/files/documents/IDT_TS3000GB2A1_DST_20111104_120303151012.pdf
+ Available from IDT web site
* Maxim MAX6604
Datasheets:
http://datasheets.maxim-ic.com/en/ds/MAX6604.pdf
--- /dev/null
+Kernel driver nct7904
+====================
+
+Supported chip:
+ * Nuvoton NCT7904D
+ Prefix: nct7904
+ Addresses: I2C 0x2d, 0x2e
+ Datasheet: Publicly available at Nuvoton website
+ http://www.nuvoton.com/
+
+Author: Vadim V. Vlasov <vvlasov@dev.rtsoft.ru>
+
+
+Description
+-----------
+
+The NCT7904D is a hardware monitor supporting up to 20 voltage sensors,
+internal temperature sensor, Intel PECI and AMD SB-TSI CPU temperature
+interface, up to 12 fan tachometer inputs, up to 4 fan control channels
+with SmartFan.
+
+
+Sysfs entries
+-------------
+
+Currently, the driver supports only the following features:
+
+in[1-20]_input Input voltage measurements (mV)
+
+fan[1-12]_input Fan tachometer measurements (rpm)
+
+temp1_input Local temperature (1/1000 degree,
+ 0.125 degree resolution)
+
+temp[2-9]_input CPU temperatures (1/1000 degree,
+ 0.125 degree resolution)
+
+fan[1-4]_mode R/W, 0/1 for manual or SmartFan mode
+ Setting SmartFan mode is supported only if it has been
+ previously configured by BIOS (or configuration EEPROM)
+
+fan[1-4]_pwm R/O in SmartFan mode, R/W in manual control mode
+
+The driver checks sensor control registers and does not export the sensors
+that are not enabled. Anyway, a sensor that is enabled may actually be not
+connected and thus provide zero readings.
+
+
+Limitations
+-----------
+
+The following features are not supported in current version:
+
+ - SmartFan control
+ - Watchdog
+ - GPIO
+ - external temperature sensors
+ - SMI
+ - min/max values
+ - many other...
--- /dev/null
+Linux I2C slave eeprom backend
+==============================
+
+by Wolfram Sang <wsa@sang-engineering.com> in 2014-15
+
+This is a proof-of-concept backend which acts like an EEPROM on the connected
+I2C bus. The memory contents can be modified from userspace via this file
+located in sysfs:
+
+ /sys/bus/i2c/devices/<device-direcory>/slave-eeprom
+
+As of 2015, Linux doesn't support poll on binary sysfs files, so there is no
+notfication when another master changed the content.
+
--- /dev/null
+Linux I2C slave interface description
+=====================================
+
+by Wolfram Sang <wsa@sang-engineering.com> in 2014-15
+
+Linux can also be an I2C slave in case I2C controllers have slave support.
+Besides this HW requirement, one also needs a software backend providing the
+actual functionality. An example for this is the slave-eeprom driver, which
+acts as a dual memory driver. While another I2C master on the bus can access it
+like a regular EEPROM, the Linux I2C slave can access the content via sysfs and
+retrieve/provide information as needed. The software backend driver and the I2C
+bus driver communicate via events. Here is a small graph visualizing the data
+flow and the means by which data is transported. The dotted line marks only one
+example. The backend could also use e.g. a character device, be in-kernel
+only, or something completely different:
+
+
+ e.g. sysfs I2C slave events I/O registers
+ +-----------+ v +---------+ v +--------+ v +------------+
+ | Userspace +........+ Backend +-----------+ Driver +-----+ Controller |
+ +-----------+ +---------+ +--------+ +------------+
+ | |
+ ----------------------------------------------------------------+-- I2C
+ --------------------------------------------------------------+---- Bus
+
+Note: Technically, there is also the I2C core between the backend and the
+driver. However, at this time of writing, the layer is transparent.
+
+
+User manual
+===========
+
+I2C slave backends behave like standard I2C clients. So, you can instantiate
+them like described in the document 'instantiating-devices'. A quick example
+for instantiating the slave-eeprom driver from userspace:
+
+ # echo 0-0064 > /sys/bus/i2c/drivers/i2c-slave-eeprom/bind
+
+Each backend should come with separate documentation to describe its specific
+behaviour and setup.
+
+
+Developer manual
+================
+
+I2C slave events
+----------------
+
+The bus driver sends an event to the backend using the following function:
+
+ ret = i2c_slave_event(client, event, &val)
+
+'client' describes the i2c slave device. 'event' is one of the special event
+types described hereafter. 'val' holds an u8 value for the data byte to be
+read/written and is thus bidirectional. The pointer to val must always be
+provided even if val is not used for an event, i.e. don't use NULL here. 'ret'
+is the return value from the backend. Mandatory events must be provided by the
+bus drivers and must be checked for by backend drivers.
+
+Event types:
+
+* I2C_SLAVE_WRITE_REQUESTED (mandatory)
+
+'val': unused
+'ret': always 0
+
+Another I2C master wants to write data to us. This event should be sent once
+our own address and the write bit was detected. The data did not arrive yet, so
+there is nothing to process or return. Wakeup or initialization probably needs
+to be done, though.
+
+* I2C_SLAVE_READ_REQUESTED (mandatory)
+
+'val': backend returns first byte to be sent
+'ret': always 0
+
+Another I2C master wants to read data from us. This event should be sent once
+our own address and the read bit was detected. After returning, the bus driver
+should transmit the first byte.
+
+* I2C_SLAVE_WRITE_RECEIVED (mandatory)
+
+'val': bus driver delivers received byte
+'ret': 0 if the byte should be acked, some errno if the byte should be nacked
+
+Another I2C master has sent a byte to us which needs to be set in 'val'. If 'ret'
+is zero, the bus driver should ack this byte. If 'ret' is an errno, then the byte
+should be nacked.
+
+* I2C_SLAVE_READ_PROCESSED (mandatory)
+
+'val': backend returns next byte to be sent
+'ret': always 0
+
+The bus driver requests the next byte to be sent to another I2C master in
+'val'. Important: This does not mean that the previous byte has been acked, it
+only means that the previous byte is shifted out to the bus! To ensure seamless
+transmission, most hardware requests the next byte when the previous one is
+still shifted out. If the master sends NACK and stops reading after the byte
+currently shifted out, this byte requested here is never used. It very likely
+needs to be sent again on the next I2C_SLAVE_READ_REQUEST, depending a bit on
+your backend, though.
+
+* I2C_SLAVE_STOP (mandatory)
+
+'val': unused
+'ret': always 0
+
+A stop condition was received. This can happen anytime and the backend should
+reset its state machine for I2C transfers to be able to receive new requests.
+
+
+Software backends
+-----------------
+
+If you want to write a software backend:
+
+* use a standard i2c_driver and its matching mechanisms
+* write the slave_callback which handles the above slave events
+ (best using a state machine)
+* register this callback via i2c_slave_register()
+
+Check the i2c-slave-eeprom driver as an example.
+
+
+Bus driver support
+------------------
+
+If you want to add slave support to the bus driver:
+
+* implement calls to register/unregister the slave and add those to the
+ struct i2c_algorithm. When registering, you probably need to set the i2c
+ slave address and enable slave specific interrupts. If you use runtime pm, you
+ should use pm_runtime_forbid() because your device usually needs to be powered
+ on always to be able to detect its slave address. When unregistering, do the
+ inverse of the above.
+
+* Catch the slave interrupts and send appropriate i2c_slave_events to the backend.
+
+Check the i2c-rcar driver as an example.
+
+
+About ACK/NACK
+--------------
+
+It is good behaviour to always ACK the address phase, so the master knows if a
+device is basically present or if it mysteriously disappeared. Using NACK to
+state being busy is troublesome. SMBus demands to always ACK the address phase,
+while the I2C specification is more loose on that. Most I2C controllers also
+automatically ACK when detecting their slave addresses, so there is no option
+to NACK them. For those reasons, this API does not support NACK in the address
+phase.
+
+Currently, there is no slave event to report if the master did ACK or NACK a
+byte when it reads from us. We could make this an optional event if the need
+arises. However, cases should be extremely rare because the master is expected
+to send STOP after that and we have an event for that. Also, keep in mind not
+all I2C controllers have the possibility to report that event.
+
+
+About buffers
+-------------
+
+During development of this API, the question of using buffers instead of just
+bytes came up. Such an extension might be possible, usefulness is unclear at
+this time of writing. Some points to keep in mind when using buffers:
+
+* Buffers should be opt-in and slave drivers will always have to support
+ byte-based transactions as the ultimate fallback because this is how the
+ majority of HW works.
+
+* For backends simulating hardware registers, buffers are not helpful because
+ on writes an action should be immediately triggered. For reads, the data in
+ the buffer might get stale.
+
+* A master can send STOP at any time. For partially transferred buffers, this
+ means additional code to handle this exception. Such code tends to be
+ error-prone.
+
For a given configuration, you will need a driver for your I2C bus, and
drivers for your I2C devices (usually one driver for each device).
-
-At this time, Linux only operates I2C (or SMBus) in master mode; you can't
-use these APIs to make a Linux system behave as a slave/device, either to
-speak a custom protocol or to emulate some other device.
Format: {"off" | "on" | "skip[mbr]"}
efi= [EFI]
- Format: { "old_map", "nochunk", "noruntime" }
+ Format: { "old_map", "nochunk", "noruntime", "debug" }
old_map [X86-64]: switch to the old ioremap-based EFI
runtime services mapping. 32-bit still uses this one by
default.
boot stub, as chunking can cause problems with some
firmware implementations.
noruntime : disable EFI runtime services support
+ debug: enable misc debug output
efi_no_storage_paranoia [EFI; X86]
Using this parameter you can use more than 50% of
seconds. Use this parameter to check at some
other rate. 0 disables periodic checking.
- memtest= [KNL,X86] Enable memtest
+ memtest= [KNL,X86,ARM] Enable memtest
Format: <integer>
default : 0 <disable>
Specifies the number of memtest passes to be
nmi_watchdog= [KNL,BUGS=X86] Debugging features for SMP kernels
Format: [panic,][nopanic,][num]
- Valid num: 0
+ Valid num: 0 or 1
0 - turn nmi_watchdog off
+ 1 - turn nmi_watchdog on
When panic is specified, panic when an NMI watchdog
timeout occurs (or 'nopanic' to override the opposite
default).
register save and restore. The kernel will only save
legacy floating-point registers on task switch.
+ nohugeiomap [KNL,x86] Disable kernel huge I/O mappings.
+
noxsave [BUGS=X86] Disables x86 extended register state save
and restore using xsave. The kernel will fallback to
enabling legacy floating-point and sse state.
nousb [USB] Disable the USB subsystem
- nowatchdog [KNL] Disable the lockup detector (NMI watchdog).
+ nowatchdog [KNL] Disable both lockup detectors, i.e.
+ soft-lockup and NMI watchdog (hard-lockup).
nowb [ARM]
Set maximum number of finished RCU callbacks to
process in one batch.
+ rcutree.gp_init_delay= [KNL]
+ Set the number of jiffies to delay each step of
+ RCU grace-period initialization. This only has
+ effect when CONFIG_RCU_TORTURE_TEST_SLOW_INIT is
+ set.
+
rcutree.rcu_fanout_leaf= [KNL]
Increase the number of CPUs assigned to each
leaf rcu_node structure. Useful for very large
value is one, and maximum value is HZ.
rcutree.kthread_prio= [KNL,BOOT]
- Set the SCHED_FIFO priority of the RCU
- per-CPU kthreads (rcuc/N). This value is also
- used for the priority of the RCU boost threads
- (rcub/N). Valid values are 1-99 and the default
- is 1 (the least-favored priority).
+ Set the SCHED_FIFO priority of the RCU per-CPU
+ kthreads (rcuc/N). This value is also used for
+ the priority of the RCU boost threads (rcub/N)
+ and for the RCU grace-period kthreads (rcu_bh,
+ rcu_preempt, and rcu_sched). If RCU_BOOST is
+ set, valid values are 1-99 and the default is 1
+ (the least-favored priority). Otherwise, when
+ RCU_BOOST is not set, valid values are 0-99 and
+ the default is zero (non-realtime operation).
rcutree.rcu_nocb_leader_stride= [KNL]
Set the number of NOCB kthread groups, which
on each CPU, including cs_dbs_timer() and od_dbs_timer().
WARNING: Please check your CPU specifications to
make sure that this is safe on your particular system.
- d. It is not possible to entirely get rid of OS jitter
- from vmstat_update() on CONFIG_SMP=y systems, but you
- can decrease its frequency by writing a large value
- to /proc/sys/vm/stat_interval. The default value is
- HZ, for an interval of one second. Of course, larger
- values will make your virtual-memory statistics update
- more slowly. Of course, you can also run your workload
- at a real-time priority, thus preempting vmstat_update(),
+ d. As of v3.18, Christoph Lameter's on-demand vmstat workers
+ commit prevents OS jitter due to vmstat_update() on
+ CONFIG_SMP=y systems. Before v3.18, is not possible
+ to entirely get rid of the OS jitter, but you can
+ decrease its frequency by writing a large value to
+ /proc/sys/vm/stat_interval. The default value is HZ,
+ for an interval of one second. Of course, larger values
+ will make your virtual-memory statistics update more
+ slowly. Of course, you can also run your workload at
+ a real-time priority, thus preempting vmstat_update(),
but if your workload is CPU-bound, this is a bad idea.
However, there is an RFC patch from Christoph Lameter
(based on an earlier one from Gilad Ben-Yossef) that
reduces or even eliminates vmstat overhead for some
workloads at https://lkml.org/lkml/2013/9/4/379.
- e. If running on high-end powerpc servers, build with
+ e. Boot with "elevator=noop" to avoid workqueue use by
+ the block layer.
+ f. If running on high-end powerpc servers, build with
CONFIG_PPC_RTAS_DAEMON=n. This prevents the RTAS
daemon from running on each CPU every second or so.
(This will require editing Kconfig files and will defeat
due to the rtas_event_scan() function.
WARNING: Please check your CPU specifications to
make sure that this is safe on your particular system.
- f. If running on Cell Processor, build your kernel with
+ g. If running on Cell Processor, build your kernel with
CBE_CPUFREQ_SPU_GOVERNOR=n to avoid OS jitter from
spu_gov_work().
WARNING: Please check your CPU specifications to
make sure that this is safe on your particular system.
- g. If running on PowerMAC, build your kernel with
+ h. If running on PowerMAC, build your kernel with
CONFIG_PMAC_RACKMETER=n to disable the CPU-meter,
avoiding OS jitter from rackmeter_do_timer().
To reduce its OS jitter, do at least one of the following:
1. Build with CONFIG_LOCKUP_DETECTOR=n, which will prevent these
kthreads from being created in the first place.
-2. Echo a zero to /proc/sys/kernel/watchdog to disable the
+2. Boot with "nosoftlockup=0", which will also prevent these kthreads
+ from being created. Other related watchdog and softlockup boot
+ parameters may be found in Documentation/kernel-parameters.txt
+ and Documentation/watchdog/watchdog-parameters.txt.
+3. Echo a zero to /proc/sys/kernel/watchdog to disable the
watchdog timer.
-3. Echo a large number of /proc/sys/kernel/watchdog_thresh in
+4. Echo a large number of /proc/sys/kernel/watchdog_thresh in
order to reduce the frequency of OS jitter due to the watchdog
timer down to a level that is acceptable for your workload.
CONTROL DEPENDENCIES
--------------------
-A control dependency requires a full read memory barrier, not simply a data
-dependency barrier to make it work correctly. Consider the following bit of
-code:
+A load-load control dependency requires a full read memory barrier, not
+simply a data dependency barrier to make it work correctly. Consider the
+following bit of code:
q = ACCESS_ONCE(a);
if (q) {
}
However, stores are not speculated. This means that ordering -is- provided
-in the following example:
+for load-store control dependencies, as in the following example:
q = ACCESS_ONCE(a);
if (q) {
ACCESS_ONCE(b) = p;
}
-Please note that ACCESS_ONCE() is not optional! Without the
+Control dependencies pair normally with other types of barriers.
+That said, please note that ACCESS_ONCE() is not optional! Without the
ACCESS_ONCE(), might combine the load from 'a' with other loads from
'a', and the store to 'b' with other stores to 'b', with possible highly
counterintuitive effects on ordering.
barrier() can help to preserve your control dependency. Please
see the Compiler Barrier section for more information.
+ (*) Control dependencies pair normally with other types of barriers.
+
(*) Control dependencies do -not- provide transitivity. If you
need transitivity, use smp_mb().
When dealing with CPU-CPU interactions, certain types of memory barrier should
always be paired. A lack of appropriate pairing is almost certainly an error.
-General barriers pair with each other, though they also pair with
-most other types of barriers, albeit without transitivity. An acquire
-barrier pairs with a release barrier, but both may also pair with other
-barriers, including of course general barriers. A write barrier pairs
-with a data dependency barrier, an acquire barrier, a release barrier,
-a read barrier, or a general barrier. Similarly a read barrier or a
-data dependency barrier pairs with a write barrier, an acquire barrier,
-a release barrier, or a general barrier:
+General barriers pair with each other, though they also pair with most
+other types of barriers, albeit without transitivity. An acquire barrier
+pairs with a release barrier, but both may also pair with other barriers,
+including of course general barriers. A write barrier pairs with a data
+dependency barrier, a control dependency, an acquire barrier, a release
+barrier, a read barrier, or a general barrier. Similarly a read barrier,
+control dependency, or a data dependency barrier pairs with a write
+barrier, an acquire barrier, a release barrier, or a general barrier:
CPU 1 CPU 2
=============== ===============
<data dependency barrier>
y = *x;
+Or even:
+
+ CPU 1 CPU 2
+ =============== ===============================
+ r1 = ACCESS_ONCE(y);
+ <general barrier>
+ ACCESS_ONCE(y) = 1; if (r2 = ACCESS_ONCE(x)) {
+ <implicit control dependency>
+ ACCESS_ONCE(y) = 1;
+ }
+
+ assert(r1 == 0 || r2 == 0);
+
Basically, the read barrier always has to be there, even though it can be of
the "weaker" type.
.name = "foo",
.pins = foo_pins,
.npins = ARRAY_SIZE(foo_pins),
- .maxpin = 63,
.owner = THIS_MODULE,
};
}
static int foo_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
- unsigned ** const pins,
- unsigned * const num_pins)
+ const unsigned **pins,
+ unsigned *num_pins)
{
*pins = (unsigned *) foo_groups[selector].pins;
*num_pins = foo_groups[selector].num_pins;
this happens.
Pinmux drivers are required to supply a few callback functions, some are
-optional. Usually the enable() and disable() functions are implemented,
-writing values into some certain registers to activate a certain mux setting
-for a certain pin.
+optional. Usually the set_mux() function is implemented, writing values into
+some certain registers to activate a certain mux setting for a certain pin.
A simple driver for the above example will work by setting bits 0, 1, 2, 3 or 4
into some register named MUX to select a certain function with a certain
},
};
-int foo_get_functions_count(struct pinctrl_dev *pctldev)
+static int foo_get_functions_count(struct pinctrl_dev *pctldev)
{
return ARRAY_SIZE(foo_functions);
}
-const char *foo_get_fname(struct pinctrl_dev *pctldev, unsigned selector)
+static const char *foo_get_fname(struct pinctrl_dev *pctldev, unsigned selector)
{
return foo_functions[selector].name;
}
return 0;
}
-int foo_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
+static int foo_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
unsigned group)
{
u8 regbit = (1 << selector + group);
return 0;
}
-struct pinmux_ops foo_pmxops = {
+static struct pinmux_ops foo_pmxops = {
.get_functions_count = foo_get_functions_count,
.get_function_name = foo_get_fname,
.get_function_groups = foo_get_groups,
Usually the pin control core handled the get/put pair and call out to the
device drivers bookkeeping operations, like checking available functions and
-the associated pins, whereas the enable/disable pass on to the pin controller
+the associated pins, whereas select_state pass on to the pin controller
driver which takes care of activating and/or deactivating the mux setting by
quickly poking some registers.
"Advanced mapping" above. So that for an SPI device, we have two states named
"pos-A" and "pos-B".
-This snippet first muxes the function in the pins defined by group A, enables
-it, disables and releases it, and muxes it in on the pins defined by group B:
+This snippet first initializes a state object for both groups (in foo_probe()),
+then muxes the function in the pins defined by group A, and finally muxes it in
+on the pins defined by group B:
#include <linux/pinctrl/consumer.h>
Consumer drivers can request a change in their supply regulator operating mode
by calling :-
-int regulator_set_optimum_mode(struct regulator *regulator, int load_uA);
+int regulator_set_load(struct regulator *regulator, int load_uA);
This will cause the core to recalculate the total load on the regulator (based
on all its consumers) and change operating mode (if necessary and permitted)
* RTC_PIE_ON, RTC_PIE_OFF: These are also emulated by the generic code.
-If all else fails, check out the rtc-test.c driver!
-
-
--------------------- 8< ---------------- 8< -----------------------------
-
-/*
- * Real Time Clock Driver Test/Example Program
- *
- * Compile with:
- * gcc -s -Wall -Wstrict-prototypes rtctest.c -o rtctest
- *
- * Copyright (C) 1996, Paul Gortmaker.
- *
- * Released under the GNU General Public License, version 2,
- * included herein by reference.
- *
- */
-
-#include <stdio.h>
-#include <linux/rtc.h>
-#include <sys/ioctl.h>
-#include <sys/time.h>
-#include <sys/types.h>
-#include <fcntl.h>
-#include <unistd.h>
-#include <stdlib.h>
-#include <errno.h>
-
-
-/*
- * This expects the new RTC class driver framework, working with
- * clocks that will often not be clones of what the PC-AT had.
- * Use the command line to specify another RTC if you need one.
- */
-static const char default_rtc[] = "/dev/rtc0";
-
-
-int main(int argc, char **argv)
-{
- int i, fd, retval, irqcount = 0;
- unsigned long tmp, data;
- struct rtc_time rtc_tm;
- const char *rtc = default_rtc;
-
- switch (argc) {
- case 2:
- rtc = argv[1];
- /* FALLTHROUGH */
- case 1:
- break;
- default:
- fprintf(stderr, "usage: rtctest [rtcdev]\n");
- return 1;
- }
-
- fd = open(rtc, O_RDONLY);
-
- if (fd == -1) {
- perror(rtc);
- exit(errno);
- }
-
- fprintf(stderr, "\n\t\t\tRTC Driver Test Example.\n\n");
-
- /* Turn on update interrupts (one per second) */
- retval = ioctl(fd, RTC_UIE_ON, 0);
- if (retval == -1) {
- if (errno == ENOTTY) {
- fprintf(stderr,
- "\n...Update IRQs not supported.\n");
- goto test_READ;
- }
- perror("RTC_UIE_ON ioctl");
- exit(errno);
- }
-
- fprintf(stderr, "Counting 5 update (1/sec) interrupts from reading %s:",
- rtc);
- fflush(stderr);
- for (i=1; i<6; i++) {
- /* This read will block */
- retval = read(fd, &data, sizeof(unsigned long));
- if (retval == -1) {
- perror("read");
- exit(errno);
- }
- fprintf(stderr, " %d",i);
- fflush(stderr);
- irqcount++;
- }
-
- fprintf(stderr, "\nAgain, from using select(2) on /dev/rtc:");
- fflush(stderr);
- for (i=1; i<6; i++) {
- struct timeval tv = {5, 0}; /* 5 second timeout on select */
- fd_set readfds;
-
- FD_ZERO(&readfds);
- FD_SET(fd, &readfds);
- /* The select will wait until an RTC interrupt happens. */
- retval = select(fd+1, &readfds, NULL, NULL, &tv);
- if (retval == -1) {
- perror("select");
- exit(errno);
- }
- /* This read won't block unlike the select-less case above. */
- retval = read(fd, &data, sizeof(unsigned long));
- if (retval == -1) {
- perror("read");
- exit(errno);
- }
- fprintf(stderr, " %d",i);
- fflush(stderr);
- irqcount++;
- }
-
- /* Turn off update interrupts */
- retval = ioctl(fd, RTC_UIE_OFF, 0);
- if (retval == -1) {
- perror("RTC_UIE_OFF ioctl");
- exit(errno);
- }
-
-test_READ:
- /* Read the RTC time/date */
- retval = ioctl(fd, RTC_RD_TIME, &rtc_tm);
- if (retval == -1) {
- perror("RTC_RD_TIME ioctl");
- exit(errno);
- }
-
- fprintf(stderr, "\n\nCurrent RTC date/time is %d-%d-%d, %02d:%02d:%02d.\n",
- rtc_tm.tm_mday, rtc_tm.tm_mon + 1, rtc_tm.tm_year + 1900,
- rtc_tm.tm_hour, rtc_tm.tm_min, rtc_tm.tm_sec);
-
- /* Set the alarm to 5 sec in the future, and check for rollover */
- rtc_tm.tm_sec += 5;
- if (rtc_tm.tm_sec >= 60) {
- rtc_tm.tm_sec %= 60;
- rtc_tm.tm_min++;
- }
- if (rtc_tm.tm_min == 60) {
- rtc_tm.tm_min = 0;
- rtc_tm.tm_hour++;
- }
- if (rtc_tm.tm_hour == 24)
- rtc_tm.tm_hour = 0;
-
- retval = ioctl(fd, RTC_ALM_SET, &rtc_tm);
- if (retval == -1) {
- if (errno == ENOTTY) {
- fprintf(stderr,
- "\n...Alarm IRQs not supported.\n");
- goto test_PIE;
- }
- perror("RTC_ALM_SET ioctl");
- exit(errno);
- }
-
- /* Read the current alarm settings */
- retval = ioctl(fd, RTC_ALM_READ, &rtc_tm);
- if (retval == -1) {
- perror("RTC_ALM_READ ioctl");
- exit(errno);
- }
-
- fprintf(stderr, "Alarm time now set to %02d:%02d:%02d.\n",
- rtc_tm.tm_hour, rtc_tm.tm_min, rtc_tm.tm_sec);
-
- /* Enable alarm interrupts */
- retval = ioctl(fd, RTC_AIE_ON, 0);
- if (retval == -1) {
- perror("RTC_AIE_ON ioctl");
- exit(errno);
- }
-
- fprintf(stderr, "Waiting 5 seconds for alarm...");
- fflush(stderr);
- /* This blocks until the alarm ring causes an interrupt */
- retval = read(fd, &data, sizeof(unsigned long));
- if (retval == -1) {
- perror("read");
- exit(errno);
- }
- irqcount++;
- fprintf(stderr, " okay. Alarm rang.\n");
-
- /* Disable alarm interrupts */
- retval = ioctl(fd, RTC_AIE_OFF, 0);
- if (retval == -1) {
- perror("RTC_AIE_OFF ioctl");
- exit(errno);
- }
-
-test_PIE:
- /* Read periodic IRQ rate */
- retval = ioctl(fd, RTC_IRQP_READ, &tmp);
- if (retval == -1) {
- /* not all RTCs support periodic IRQs */
- if (errno == ENOTTY) {
- fprintf(stderr, "\nNo periodic IRQ support\n");
- goto done;
- }
- perror("RTC_IRQP_READ ioctl");
- exit(errno);
- }
- fprintf(stderr, "\nPeriodic IRQ rate is %ldHz.\n", tmp);
-
- fprintf(stderr, "Counting 20 interrupts at:");
- fflush(stderr);
-
- /* The frequencies 128Hz, 256Hz, ... 8192Hz are only allowed for root. */
- for (tmp=2; tmp<=64; tmp*=2) {
-
- retval = ioctl(fd, RTC_IRQP_SET, tmp);
- if (retval == -1) {
- /* not all RTCs can change their periodic IRQ rate */
- if (errno == ENOTTY) {
- fprintf(stderr,
- "\n...Periodic IRQ rate is fixed\n");
- goto done;
- }
- perror("RTC_IRQP_SET ioctl");
- exit(errno);
- }
-
- fprintf(stderr, "\n%ldHz:\t", tmp);
- fflush(stderr);
-
- /* Enable periodic interrupts */
- retval = ioctl(fd, RTC_PIE_ON, 0);
- if (retval == -1) {
- perror("RTC_PIE_ON ioctl");
- exit(errno);
- }
-
- for (i=1; i<21; i++) {
- /* This blocks */
- retval = read(fd, &data, sizeof(unsigned long));
- if (retval == -1) {
- perror("read");
- exit(errno);
- }
- fprintf(stderr, " %d",i);
- fflush(stderr);
- irqcount++;
- }
-
- /* Disable periodic interrupts */
- retval = ioctl(fd, RTC_PIE_OFF, 0);
- if (retval == -1) {
- perror("RTC_PIE_OFF ioctl");
- exit(errno);
- }
- }
-
-done:
- fprintf(stderr, "\n\n\t\t\t *** Test complete ***\n");
-
- close(fd);
-
- return 0;
-}
+If all else fails, check out the tools/testing/selftests/timers/rtctest.c test!
irqm:1 same as initial settings (assumed BIOS settings)
irqm:2 always totem pole
irqm:0x10 driver will not use IRQF_SHARED flag when requesting irq
- irqm:0x20 driver will not use IRQF_DISABLED flag when requesting irq
(Bits 0x10 and 0x20 can be combined with hardware irq mode option)
may only be needed under Linux when a scatter/gather list is not used and
when the SCSI DATA IN phase is reentered after a phase mismatch.
-14.5 IRQ sharing problems
-
-When an IRQ is shared by devices that are handled by different drivers, it
-may happen that one driver complains about the request of the IRQ having
-failed. Inder Linux-2.0, this may be due to one driver having requested the
-IRQ using the IRQF_DISABLED flag but some other having requested the same IRQ
-without this flag. Under both Linux-2.0 and linux-2.2, this may be caused by
-one driver not having requested the IRQ with the IRQF_SHARED flag.
-
-By default, the ncr53c8xx and sym53c8xx drivers request IRQs with both the
-IRQF_DISABLED and the IRQF_SHARED flag under Linux-2.0 and with only the IRQF_SHARED
-flag under Linux-2.2.
-
-Under Linux-2.0, you can disable use of IRQF_DISABLED flag from the boot
-command line by using the following option:
-
- ncr53c8xx=irqm:0x20 (for the generic ncr53c8xx driver)
- sym53c8xx=irqm:0x20 (for the sym53c8xx driver)
-
-If this does not fix the problem, then you may want to check how all other
-drivers are requesting the IRQ and report the problem. Note that if at least
-a single driver does not request the IRQ with the IRQF_SHARED flag (share IRQ),
-then the request of the IRQ obviously will not succeed for all the drivers.
-
15. SCSI problem troubleshooting
15.1 Problem tracking
MHz PCI bus works for me, though, but I don't recommend using higher clocks
than the 33.33 MHz being in the PCI spec.
-If you want to share the IRQ with another device and the driver refuses to
-do so, you might succeed with changing the DC390_IRQ type in tmscsim.c to
-IRQF_SHARED | IRQF_DISABLED.
-
3.Features
----------
.driver = {
.name = "CHIP",
.owner = THIS_MODULE,
+ .pm = &CHIP_pm_ops,
},
.probe = CHIP_probe,
.remove = CHIP_remove,
- .suspend = CHIP_suspend,
- .resume = CHIP_resume,
};
The driver core will automatically attempt to bind this driver to any SPI
#include <unistd.h>
#include <stdio.h>
#include <stdlib.h>
+#include <string.h>
#include <getopt.h>
#include <fcntl.h>
#include <sys/ioctl.h>
static uint8_t bits = 8;
static uint32_t speed = 500000;
static uint16_t delay;
+static int verbose;
-static void transfer(int fd)
+uint8_t default_tx[] = {
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x95,
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+ 0xF0, 0x0D,
+};
+
+uint8_t default_rx[ARRAY_SIZE(default_tx)] = {0, };
+char *input_tx;
+
+static void hex_dump(const void *src, size_t length, size_t line_size, char *prefix)
+{
+ int i = 0;
+ const unsigned char *address = src;
+ const unsigned char *line = address;
+ unsigned char c;
+
+ printf("%s | ", prefix);
+ while (length-- > 0) {
+ printf("%02X ", *address++);
+ if (!(++i % line_size) || (length == 0 && i % line_size)) {
+ if (length == 0) {
+ while (i++ % line_size)
+ printf("__ ");
+ }
+ printf(" | "); /* right close */
+ while (line < address) {
+ c = *line++;
+ printf("%c", (c < 33 || c == 255) ? 0x2E : c);
+ }
+ printf("\n");
+ if (length > 0)
+ printf("%s | ", prefix);
+ }
+ }
+}
+
+/*
+ * Unescape - process hexadecimal escape character
+ * converts shell input "\x23" -> 0x23
+ */
+int unespcape(char *_dst, char *_src, size_t len)
+{
+ int ret = 0;
+ char *src = _src;
+ char *dst = _dst;
+ unsigned int ch;
+
+ while (*src) {
+ if (*src == '\\' && *(src+1) == 'x') {
+ sscanf(src + 2, "%2x", &ch);
+ src += 4;
+ *dst++ = (unsigned char)ch;
+ } else {
+ *dst++ = *src++;
+ }
+ ret++;
+ }
+ return ret;
+}
+
+static void transfer(int fd, uint8_t const *tx, uint8_t const *rx, size_t len)
{
int ret;
- uint8_t tx[] = {
- 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
- 0x40, 0x00, 0x00, 0x00, 0x00, 0x95,
- 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
- 0xDE, 0xAD, 0xBE, 0xEF, 0xBA, 0xAD,
- 0xF0, 0x0D,
- };
- uint8_t rx[ARRAY_SIZE(tx)] = {0, };
+
struct spi_ioc_transfer tr = {
.tx_buf = (unsigned long)tx,
.rx_buf = (unsigned long)rx,
- .len = ARRAY_SIZE(tx),
+ .len = len,
.delay_usecs = delay,
.speed_hz = speed,
.bits_per_word = bits,
if (ret < 1)
pabort("can't send spi message");
- for (ret = 0; ret < ARRAY_SIZE(tx); ret++) {
- if (!(ret % 6))
- puts("");
- printf("%.2X ", rx[ret]);
- }
- puts("");
+ if (verbose)
+ hex_dump(tx, len, 32, "TX");
+ hex_dump(rx, len, 32, "RX");
}
static void print_usage(const char *prog)
" -L --lsb least significant bit first\n"
" -C --cs-high chip select active high\n"
" -3 --3wire SI/SO signals shared\n"
+ " -v --verbose Verbose (show tx buffer)\n"
+ " -p Send data (e.g. \"1234\\xde\\xad\")\n"
" -N --no-cs no chip select\n"
" -R --ready slave pulls low to pause\n"
" -2 --dual dual transfer\n"
{ "no-cs", 0, 0, 'N' },
{ "ready", 0, 0, 'R' },
{ "dual", 0, 0, '2' },
+ { "verbose", 0, 0, 'v' },
{ "quad", 0, 0, '4' },
{ NULL, 0, 0, 0 },
};
int c;
- c = getopt_long(argc, argv, "D:s:d:b:lHOLC3NR24", lopts, NULL);
+ c = getopt_long(argc, argv, "D:s:d:b:lHOLC3NR24p:v", lopts, NULL);
if (c == -1)
break;
case 'N':
mode |= SPI_NO_CS;
break;
+ case 'v':
+ verbose = 1;
+ break;
case 'R':
mode |= SPI_READY;
break;
+ case 'p':
+ input_tx = optarg;
+ break;
case '2':
mode |= SPI_TX_DUAL;
break;
{
int ret = 0;
int fd;
+ uint8_t *tx;
+ uint8_t *rx;
+ int size;
parse_opts(argc, argv);
printf("bits per word: %d\n", bits);
printf("max speed: %d Hz (%d KHz)\n", speed, speed/1000);
- transfer(fd);
+ if (input_tx) {
+ size = strlen(input_tx+1);
+ tx = malloc(size);
+ rx = malloc(size);
+ size = unespcape((char *)tx, input_tx, size);
+ transfer(fd, tx, rx, size);
+ free(rx);
+ free(tx);
+ } else {
+ transfer(fd, default_tx, default_rx, sizeof(default_tx));
+ }
close(fd);
git cherry-pick fd21073
git cherry-pick <this commit>
+Also, some patches may have kernel version prerequisites. This can be
+specified in the following format in the sign-off area:
+
+ Cc: <stable@vger.kernel.org> # 3.3.x-
+
+ The tag has the meaning of:
+ git cherry-pick <this commit>
+
+ For each "-stable" tree starting with the specified version.
+
Following the submission:
- The sender will receive an ACK when the patch has been accepted into the
- shmmax [ sysv ipc ]
- shmmni
- softlockup_all_cpu_backtrace
+- soft_watchdog
- stop-a [ SPARC only ]
- sysrq ==> Documentation/sysrq.txt
- sysctl_writes_strict
- tainted
- threads-max
- unknown_nmi_panic
+- watchdog
- watchdog_thresh
- version
nmi_watchdog:
-Enables/Disables the NMI watchdog on x86 systems. When the value is
-non-zero the NMI watchdog is enabled and will continuously test all
-online cpus to determine whether or not they are still functioning
-properly. Currently, passing "nmi_watchdog=" parameter at boot time is
-required for this function to work.
+This parameter can be used to control the NMI watchdog
+(i.e. the hard lockup detector) on x86 systems.
-If LAPIC NMI watchdog method is in use (nmi_watchdog=2 kernel
-parameter), the NMI watchdog shares registers with oprofile. By
-disabling the NMI watchdog, oprofile may have more registers to
-utilize.
+ 0 - disable the hard lockup detector
+ 1 - enable the hard lockup detector
+
+The hard lockup detector monitors each CPU for its ability to respond to
+timer interrupts. The mechanism utilizes CPU performance counter registers
+that are programmed to generate Non-Maskable Interrupts (NMIs) periodically
+while a CPU is busy. Hence, the alternative name 'NMI watchdog'.
+
+The NMI watchdog is disabled by default if the kernel is running as a guest
+in a KVM virtual machine. This default can be overridden by adding
+
+ nmi_watchdog=1
+
+to the guest kernel command line (see Documentation/kernel-parameters.txt).
==============================================================
==============================================================
+soft_watchdog
+
+This parameter can be used to control the soft lockup detector.
+
+ 0 - disable the soft lockup detector
+ 1 - enable the soft lockup detector
+
+The soft lockup detector monitors CPUs for threads that are hogging the CPUs
+without rescheduling voluntarily, and thus prevent the 'watchdog/N' threads
+from running. The mechanism depends on the CPUs ability to respond to timer
+interrupts which are needed for the 'watchdog/N' threads to be woken up by
+the watchdog timer function, otherwise the NMI watchdog - if enabled - can
+detect a hard lockup condition.
+
+==============================================================
+
tainted:
Non-zero if the kernel has been tainted. Numeric values, which
==============================================================
+watchdog:
+
+This parameter can be used to disable or enable the soft lockup detector
+_and_ the NMI watchdog (i.e. the hard lockup detector) at the same time.
+
+ 0 - disable both lockup detectors
+ 1 - enable both lockup detectors
+
+The soft lockup detector and the NMI watchdog can also be disabled or
+enabled individually, using the soft_watchdog and nmi_watchdog parameters.
+If the watchdog parameter is read, for example by executing
+
+ cat /proc/sys/kernel/watchdog
+
+the output of this command (0 or 1) shows the logical OR of soft_watchdog
+and nmi_watchdog.
+
+==============================================================
+
watchdog_thresh:
This value can be used to control the frequency of hrtimer and NMI
to the need to inform kernel subsystems (such as RCU) about
the change in mode.
-3. POSIX CPU timers on adaptive-tick CPUs may miss their deadlines
- (perhaps indefinitely) because they currently rely on
- scheduling-tick interrupts. This will likely be fixed in
- one of two ways: (1) Prevent CPUs with POSIX CPU timers from
- entering adaptive-tick mode, or (2) Use hrtimers or other
- adaptive-ticks-immune mechanism to cause the POSIX CPU timer to
- fire properly.
+3. POSIX CPU timers prevent CPUs from entering adaptive-tick mode.
+ Real-time applications needing to take actions based on CPU time
+ consumption need to use other means of doing so.
4. If there are more perf events pending than the hardware can
accommodate, they are normally round-robined so as to collect
----------------------
"On-The-Go and Embedded Host Supplement to the USB Revision 2.0 Specification
July 27, 2012 Revision 2.0 version 1.1a"
+
+2. How to enable USB as system wakeup source
+-----------------------------------
+Below is the example for how to enable USB as system wakeup source
+at imx6 platform.
+
+2.1 Enable core's wakeup
+echo enabled > /sys/bus/platform/devices/ci_hdrc.0/power/wakeup
+2.2 Enable glue layer's wakeup
+echo enabled > /sys/bus/platform/devices/2184000.usb/power/wakeup
+2.3 Enable PHY's wakeup (optional)
+echo enabled > /sys/bus/platform/devices/20c9000.usbphy/power/wakeup
+2.4 Enable roothub's wakeup
+echo enabled > /sys/bus/usb/devices/usb1/power/wakeup
+2.5 Enable related device's wakeup
+echo enabled > /sys/bus/usb/devices/1-1/power/wakeup
+
+If the system has only one usb port, and you want usb wakeup at this port, you
+can use below script to enable usb wakeup.
+for i in $(find /sys -name wakeup | grep usb);do echo enabled > $i;done;
+
16. UAC1 function
17. UAC2 function
18. UVC function
+19. PRINTER function
1. ACM function
http://www.spinics.net/lists/linux-usb/msg99220.html
host: luvcview -f yuv
+
+19. PRINTER function
+====================
+
+The function is provided by usb_f_printer.ko module.
+
+Function-specific configfs interface
+------------------------------------
+
+The function name to use when creating the function directory is "printer".
+The printer function provides these attributes in its function directory:
+
+ pnp_string - Data to be passed to the host in pnp string
+ q_len - Number of requests per endpoint
+
+Testing the PRINTER function
+----------------------------
+
+The most basic testing:
+
+device: run the gadget
+# ls -l /devices/virtual/usb_printer_gadget/
+
+should show g_printer<number>.
+
+If udev is active, then /dev/g_printer<number> should appear automatically.
+
+host:
+
+If udev is active, then e.g. /dev/usb/lp0 should appear.
+
+host->device transmission:
+
+device:
+# cat /dev/g_printer<number>
+host:
+# cat > /dev/usb/lp0
+
+device->host transmission:
+
+# cat > /dev/g_printer<number>
+host:
+# cat /dev/usb/lp0
+
+More advanced testing can be done with the prn_example
+described in Documentation/usb/gadget-printer.txt.
4.38 KVM_GET_MP_STATE
Capability: KVM_CAP_MP_STATE
-Architectures: x86, s390
+Architectures: x86, s390, arm, arm64
Type: vcpu ioctl
Parameters: struct kvm_mp_state (out)
Returns: 0 on success; -1 on error
Possible values are:
- - KVM_MP_STATE_RUNNABLE: the vcpu is currently running [x86]
+ - KVM_MP_STATE_RUNNABLE: the vcpu is currently running [x86,arm/arm64]
- KVM_MP_STATE_UNINITIALIZED: the vcpu is an application processor (AP)
which has not yet received an INIT signal [x86]
- KVM_MP_STATE_INIT_RECEIVED: the vcpu has received an INIT signal, and is
is waiting for an interrupt [x86]
- KVM_MP_STATE_SIPI_RECEIVED: the vcpu has just received a SIPI (vector
accessible via KVM_GET_VCPU_EVENTS) [x86]
- - KVM_MP_STATE_STOPPED: the vcpu is stopped [s390]
+ - KVM_MP_STATE_STOPPED: the vcpu is stopped [s390,arm/arm64]
- KVM_MP_STATE_CHECK_STOP: the vcpu is in a special error state [s390]
- KVM_MP_STATE_OPERATING: the vcpu is operating (running or halted)
[s390]
in-kernel irqchip, the multiprocessing state must be maintained by userspace on
these architectures.
+For arm/arm64:
+
+The only states that are valid are KVM_MP_STATE_STOPPED and
+KVM_MP_STATE_RUNNABLE which reflect if the vcpu is paused or not.
4.39 KVM_SET_MP_STATE
Capability: KVM_CAP_MP_STATE
-Architectures: x86, s390
+Architectures: x86, s390, arm, arm64
Type: vcpu ioctl
Parameters: struct kvm_mp_state (in)
Returns: 0 on success; -1 on error
in-kernel irqchip, the multiprocessing state must be maintained by userspace on
these architectures.
+For arm/arm64:
+
+The only states that are valid are KVM_MP_STATE_STOPPED and
+KVM_MP_STATE_RUNNABLE which reflect if the vcpu should be paused or not.
4.40 KVM_SET_IDENTITY_MAP_ADDR
MIPS | KVM_REG_MIPS_CP0_STATUS | 32
MIPS | KVM_REG_MIPS_CP0_CAUSE | 32
MIPS | KVM_REG_MIPS_CP0_EPC | 64
+ MIPS | KVM_REG_MIPS_CP0_PRID | 32
MIPS | KVM_REG_MIPS_CP0_CONFIG | 32
MIPS | KVM_REG_MIPS_CP0_CONFIG1 | 32
MIPS | KVM_REG_MIPS_CP0_CONFIG2 | 32
MIPS | KVM_REG_MIPS_CP0_CONFIG3 | 32
+ MIPS | KVM_REG_MIPS_CP0_CONFIG4 | 32
+ MIPS | KVM_REG_MIPS_CP0_CONFIG5 | 32
MIPS | KVM_REG_MIPS_CP0_CONFIG7 | 32
MIPS | KVM_REG_MIPS_CP0_ERROREPC | 64
MIPS | KVM_REG_MIPS_COUNT_CTL | 64
MIPS | KVM_REG_MIPS_COUNT_RESUME | 64
MIPS | KVM_REG_MIPS_COUNT_HZ | 64
+ MIPS | KVM_REG_MIPS_FPR_32(0..31) | 32
+ MIPS | KVM_REG_MIPS_FPR_64(0..31) | 64
+ MIPS | KVM_REG_MIPS_VEC_128(0..31) | 128
+ MIPS | KVM_REG_MIPS_FCR_IR | 32
+ MIPS | KVM_REG_MIPS_FCR_CSR | 32
+ MIPS | KVM_REG_MIPS_MSA_IR | 32
+ MIPS | KVM_REG_MIPS_MSA_CSR | 32
ARM registers are mapped using the lower 32 bits. The upper 16 of that
is the register group type, or coprocessor number:
MIPS KVM control registers (see above) have the following id bit patterns:
0x7030 0000 0002 <reg:16>
+MIPS FPU registers (see KVM_REG_MIPS_FPR_{32,64}() above) have the following
+id bit patterns depending on the size of the register being accessed. They are
+always accessed according to the current guest FPU mode (Status.FR and
+Config5.FRE), i.e. as the guest would see them, and they become unpredictable
+if the guest FPU mode is changed. MIPS SIMD Architecture (MSA) vector
+registers (see KVM_REG_MIPS_VEC_128() above) have similar patterns as they
+overlap the FPU registers:
+ 0x7020 0000 0003 00 <0:3> <reg:5> (32-bit FPU registers)
+ 0x7030 0000 0003 00 <0:3> <reg:5> (64-bit FPU registers)
+ 0x7040 0000 0003 00 <0:3> <reg:5> (128-bit MSA vector registers)
+
+MIPS FPU control registers (see KVM_REG_MIPS_FCR_{IR,CSR} above) have the
+following id bit patterns:
+ 0x7020 0000 0003 01 <0:3> <reg:5>
+
+MIPS MSA control registers (see KVM_REG_MIPS_MSA_{IR,CSR} above) have the
+following id bit patterns:
+ 0x7020 0000 0003 02 <0:3> <reg:5>
+
4.69 KVM_GET_ONE_REG
4.75 KVM_IRQFD
Capability: KVM_CAP_IRQFD
-Architectures: x86 s390
+Architectures: x86 s390 arm arm64
Type: vm ioctl
Parameters: struct kvm_irqfd (in)
Returns: 0 on success, -1 on error
irqfd. The KVM_IRQFD_FLAG_RESAMPLE is only necessary on assignment
and need not be specified with KVM_IRQFD_FLAG_DEASSIGN.
+On ARM/ARM64, the gsi field in the kvm_irqfd struct specifies the Shared
+Peripheral Interrupt (SPI) index, such that the GIC interrupt ID is
+given by gsi + 32.
+
4.76 KVM_PPC_ALLOCATE_HTAB
Capability: KVM_CAP_PPC_ALLOC_HTAB
eax, ebx, ecx, edx: the values returned by the cpuid instruction for
this function/index combination
+4.89 KVM_S390_MEM_OP
+
+Capability: KVM_CAP_S390_MEM_OP
+Architectures: s390
+Type: vcpu ioctl
+Parameters: struct kvm_s390_mem_op (in)
+Returns: = 0 on success,
+ < 0 on generic error (e.g. -EFAULT or -ENOMEM),
+ > 0 if an exception occurred while walking the page tables
+
+Read or write data from/to the logical (virtual) memory of a VPCU.
+
+Parameters are specified via the following structure:
+
+struct kvm_s390_mem_op {
+ __u64 gaddr; /* the guest address */
+ __u64 flags; /* flags */
+ __u32 size; /* amount of bytes */
+ __u32 op; /* type of operation */
+ __u64 buf; /* buffer in userspace */
+ __u8 ar; /* the access register number */
+ __u8 reserved[31]; /* should be set to 0 */
+};
+
+The type of operation is specified in the "op" field. It is either
+KVM_S390_MEMOP_LOGICAL_READ for reading from logical memory space or
+KVM_S390_MEMOP_LOGICAL_WRITE for writing to logical memory space. The
+KVM_S390_MEMOP_F_CHECK_ONLY flag can be set in the "flags" field to check
+whether the corresponding memory access would create an access exception
+(without touching the data in the memory at the destination). In case an
+access exception occurred while walking the MMU tables of the guest, the
+ioctl returns a positive error number to indicate the type of exception.
+This exception is also raised directly at the corresponding VCPU if the
+flag KVM_S390_MEMOP_F_INJECT_EXCEPTION is set in the "flags" field.
+
+The start address of the memory region has to be specified in the "gaddr"
+field, and the length of the region in the "size" field. "buf" is the buffer
+supplied by the userspace application where the read data should be written
+to for KVM_S390_MEMOP_LOGICAL_READ, or where the data that should be written
+is stored for a KVM_S390_MEMOP_LOGICAL_WRITE. "buf" is unused and can be NULL
+when KVM_S390_MEMOP_F_CHECK_ONLY is specified. "ar" designates the access
+register number to be used.
+
+The "reserved" field is meant for future extensions. It is not used by
+KVM with the currently defined set of flags.
+
+4.90 KVM_S390_GET_SKEYS
+
+Capability: KVM_CAP_S390_SKEYS
+Architectures: s390
+Type: vm ioctl
+Parameters: struct kvm_s390_skeys
+Returns: 0 on success, KVM_S390_GET_KEYS_NONE if guest is not using storage
+ keys, negative value on error
+
+This ioctl is used to get guest storage key values on the s390
+architecture. The ioctl takes parameters via the kvm_s390_skeys struct.
+
+struct kvm_s390_skeys {
+ __u64 start_gfn;
+ __u64 count;
+ __u64 skeydata_addr;
+ __u32 flags;
+ __u32 reserved[9];
+};
+
+The start_gfn field is the number of the first guest frame whose storage keys
+you want to get.
+
+The count field is the number of consecutive frames (starting from start_gfn)
+whose storage keys to get. The count field must be at least 1 and the maximum
+allowed value is defined as KVM_S390_SKEYS_ALLOC_MAX. Values outside this range
+will cause the ioctl to return -EINVAL.
+
+The skeydata_addr field is the address to a buffer large enough to hold count
+bytes. This buffer will be filled with storage key data by the ioctl.
+
+4.91 KVM_S390_SET_SKEYS
+
+Capability: KVM_CAP_S390_SKEYS
+Architectures: s390
+Type: vm ioctl
+Parameters: struct kvm_s390_skeys
+Returns: 0 on success, negative value on error
+
+This ioctl is used to set guest storage key values on the s390
+architecture. The ioctl takes parameters via the kvm_s390_skeys struct.
+See section on KVM_S390_GET_SKEYS for struct definition.
+
+The start_gfn field is the number of the first guest frame whose storage keys
+you want to set.
+
+The count field is the number of consecutive frames (starting from start_gfn)
+whose storage keys to get. The count field must be at least 1 and the maximum
+allowed value is defined as KVM_S390_SKEYS_ALLOC_MAX. Values outside this range
+will cause the ioctl to return -EINVAL.
+
+The skeydata_addr field is the address to a buffer containing count bytes of
+storage keys. Each byte in the buffer will be set as the storage key for a
+single frame starting at start_gfn for count frames.
+
+Note: If any architecturally invalid key value is found in the given data then
+the ioctl will return -EINVAL.
+
+4.92 KVM_S390_IRQ
+
+Capability: KVM_CAP_S390_INJECT_IRQ
+Architectures: s390
+Type: vcpu ioctl
+Parameters: struct kvm_s390_irq (in)
+Returns: 0 on success, -1 on error
+Errors:
+ EINVAL: interrupt type is invalid
+ type is KVM_S390_SIGP_STOP and flag parameter is invalid value
+ type is KVM_S390_INT_EXTERNAL_CALL and code is bigger
+ than the maximum of VCPUs
+ EBUSY: type is KVM_S390_SIGP_SET_PREFIX and vcpu is not stopped
+ type is KVM_S390_SIGP_STOP and a stop irq is already pending
+ type is KVM_S390_INT_EXTERNAL_CALL and an external call interrupt
+ is already pending
+
+Allows to inject an interrupt to the guest.
+
+Using struct kvm_s390_irq as a parameter allows
+to inject additional payload which is not
+possible via KVM_S390_INTERRUPT.
+
+Interrupt parameters are passed via kvm_s390_irq:
+
+struct kvm_s390_irq {
+ __u64 type;
+ union {
+ struct kvm_s390_io_info io;
+ struct kvm_s390_ext_info ext;
+ struct kvm_s390_pgm_info pgm;
+ struct kvm_s390_emerg_info emerg;
+ struct kvm_s390_extcall_info extcall;
+ struct kvm_s390_prefix_info prefix;
+ struct kvm_s390_stop_info stop;
+ struct kvm_s390_mchk_info mchk;
+ char reserved[64];
+ } u;
+};
+
+type can be one of the following:
+
+KVM_S390_SIGP_STOP - sigp stop; parameter in .stop
+KVM_S390_PROGRAM_INT - program check; parameters in .pgm
+KVM_S390_SIGP_SET_PREFIX - sigp set prefix; parameters in .prefix
+KVM_S390_RESTART - restart; no parameters
+KVM_S390_INT_CLOCK_COMP - clock comparator interrupt; no parameters
+KVM_S390_INT_CPU_TIMER - CPU timer interrupt; no parameters
+KVM_S390_INT_EMERGENCY - sigp emergency; parameters in .emerg
+KVM_S390_INT_EXTERNAL_CALL - sigp external call; parameters in .extcall
+KVM_S390_MCHK - machine check interrupt; parameters in .mchk
+
+
+Note that the vcpu ioctl is asynchronous to vcpu execution.
+
+4.94 KVM_S390_GET_IRQ_STATE
+
+Capability: KVM_CAP_S390_IRQ_STATE
+Architectures: s390
+Type: vcpu ioctl
+Parameters: struct kvm_s390_irq_state (out)
+Returns: >= number of bytes copied into buffer,
+ -EINVAL if buffer size is 0,
+ -ENOBUFS if buffer size is too small to fit all pending interrupts,
+ -EFAULT if the buffer address was invalid
+
+This ioctl allows userspace to retrieve the complete state of all currently
+pending interrupts in a single buffer. Use cases include migration
+and introspection. The parameter structure contains the address of a
+userspace buffer and its length:
+
+struct kvm_s390_irq_state {
+ __u64 buf;
+ __u32 flags;
+ __u32 len;
+ __u32 reserved[4];
+};
+
+Userspace passes in the above struct and for each pending interrupt a
+struct kvm_s390_irq is copied to the provided buffer.
+
+If -ENOBUFS is returned the buffer provided was too small and userspace
+may retry with a bigger buffer.
+
+4.95 KVM_S390_SET_IRQ_STATE
+
+Capability: KVM_CAP_S390_IRQ_STATE
+Architectures: s390
+Type: vcpu ioctl
+Parameters: struct kvm_s390_irq_state (in)
+Returns: 0 on success,
+ -EFAULT if the buffer address was invalid,
+ -EINVAL for an invalid buffer length (see below),
+ -EBUSY if there were already interrupts pending,
+ errors occurring when actually injecting the
+ interrupt. See KVM_S390_IRQ.
+
+This ioctl allows userspace to set the complete state of all cpu-local
+interrupts currently pending for the vcpu. It is intended for restoring
+interrupt state after a migration. The input parameter is a userspace buffer
+containing a struct kvm_s390_irq_state:
+
+struct kvm_s390_irq_state {
+ __u64 buf;
+ __u32 len;
+ __u32 pad;
+};
+
+The userspace memory referenced by buf contains a struct kvm_s390_irq
+for each interrupt to be injected into the guest.
+If one of the interrupts could not be injected for some reason the
+ioctl aborts.
+
+len must be a multiple of sizeof(struct kvm_s390_irq). It must be > 0
+and it must not exceed (max_vcpus + 32) * sizeof(struct kvm_s390_irq),
+which is the maximum number of possibly pending cpu-local interrupts.
+
5. The kvm_run structure
------------------------
This capability enables the in-kernel irqchip for s390. Please refer to
"4.24 KVM_CREATE_IRQCHIP" for details.
+6.9 KVM_CAP_MIPS_FPU
+
+Architectures: mips
+Target: vcpu
+Parameters: args[0] is reserved for future use (should be 0).
+
+This capability allows the use of the host Floating Point Unit by the guest. It
+allows the Config1.FP bit to be set to enable the FPU in the guest. Once this is
+done the KVM_REG_MIPS_FPR_* and KVM_REG_MIPS_FCR_* registers can be accessed
+(depending on the current guest FPU register mode), and the Status.FR,
+Config5.FRE bits are accessible via the KVM API and also from the guest,
+depending on them being supported by the FPU.
+
+6.10 KVM_CAP_MIPS_MSA
+
+Architectures: mips
+Target: vcpu
+Parameters: args[0] is reserved for future use (should be 0).
+
+This capability allows the use of the MIPS SIMD Architecture (MSA) by the guest.
+It allows the Config3.MSAP bit to be set to enable the use of MSA by the guest.
+Once this is done the KVM_REG_MIPS_VEC_* and KVM_REG_MIPS_MSA_* registers can be
+accessed, and the Config5.MSAEn bit is accessible via the KVM API and also from
+the guest.
+
7. Capabilities that can be enabled on VMs
------------------------------------------
Only privileged operation exceptions will be checked for in the kernel (or even
in the hardware prior to interception). If this capability is not enabled, the
old way of handling SIGP orders is used (partially in kernel and user space).
+
+7.3 KVM_CAP_S390_VECTOR_REGISTERS
+
+Architectures: s390
+Parameters: none
+Returns: 0 on success, negative value on error
+
+Allows use of the vector registers introduced with z13 processor, and
+provides for the synchronization between host and user space. Will
+return -EINVAL if the machine does not support vectors.
+
+7.4 KVM_CAP_S390_USER_STSI
+
+Architectures: s390
+Parameters: none
+
+This capability allows post-handlers for the STSI instruction. After
+initial handling in the kernel, KVM exits to user space with
+KVM_EXIT_S390_STSI to allow user space to insert further data.
+
+Before exiting to userspace, kvm handlers should fill in s390_stsi field of
+vcpu->run:
+struct {
+ __u64 addr;
+ __u8 ar;
+ __u8 reserved;
+ __u8 fc;
+ __u8 sel1;
+ __u16 sel2;
+} s390_stsi;
+
+@addr - guest address of STSI SYSIB
+@fc - function code
+@sel1 - selector 1
+@sel2 - selector 2
+@ar - access register number
+
+KVM handlers should exit to userspace with rc = -EREMOTE.
Copies all floating interrupts into a buffer provided by userspace.
When the buffer is too small it returns -ENOMEM, which is the indication
for userspace to try again with a bigger buffer.
+ -ENOBUFS is returned when the allocation of a kernelspace buffer has
+ failed.
+ -EFAULT is returned when copying data to userspace failed.
All interrupts remain pending, i.e. are not deleted from the list of
currently pending interrupts.
attr->addr contains the userspace address of the buffer into which all
A cleancache "backend" that provides transcendent memory registers itself
to the kernel's cleancache "frontend" by calling cleancache_register_ops,
passing a pointer to a cleancache_ops structure with funcs set appropriately.
-Note that cleancache_register_ops returns the previous settings so that
-chaining can be performed if desired. The functions provided must conform to
-certain semantics as follows:
+The functions provided must conform to certain semantics as follows:
Most important, cleancache is "ephemeral". Pages which are copied into
cleancache have an indefinite lifetime which is completely unknowable
below, mlock_fixup() will attempt to merge the VMA with its neighbors or split
off a subset of the VMA if the range does not cover the entire VMA. Once the
VMA has been merged or split or neither, mlock_fixup() will call
-__mlock_vma_pages_range() to fault in the pages via get_user_pages() and to
+populate_vma_page_range() to fault in the pages via get_user_pages() and to
mark the pages as mlocked via mlock_vma_page().
Note that the VMA being mlocked might be mapped with PROT_NONE. In this case,
Also note that a page returned by get_user_pages() could be truncated or
migrated out from under us, while we're trying to mlock it. To detect this,
-__mlock_vma_pages_range() checks page_mapping() after acquiring the page lock.
+populate_vma_page_range() checks page_mapping() after acquiring the page lock.
If the page is still associated with its mapping, we'll go ahead and call
mlock_vma_page(). If the mapping is gone, we just unlock the page and move on.
In the worst case, this will result in a page mapped in a VM_LOCKED VMA
If the VMA is VM_LOCKED, mlock_fixup() again attempts to merge or split off the
specified range. The range is then munlocked via the function
-__mlock_vma_pages_range() - the same function used to mlock a VMA range -
+populate_vma_page_range() - the same function used to mlock a VMA range -
passing a flag to indicate that munlock() is being performed.
Because the VMA access protections could have been changed to PROT_NONE after
fetching the pages - all of which should be resident as a result of previous
mlocking.
-For munlock(), __mlock_vma_pages_range() unlocks individual pages by calling
+For munlock(), populate_vma_page_range() unlocks individual pages by calling
munlock_vma_page(). munlock_vma_page() unconditionally clears the PG_mlocked
flag using TestClearPageMlocked(). As with mlock_vma_page(),
munlock_vma_page() use the Test*PageMlocked() function to handle the case where
To mlock a range of memory under the unevictable/mlock infrastructure, the
mmap() handler and task address space expansion functions call
-mlock_vma_pages_range() specifying the vma and the address range to mlock.
-mlock_vma_pages_range() filters VMAs like mlock_fixup(), as described above in
-"Filtering Special VMAs". It will clear the VM_LOCKED flag, which will have
-already been set by the caller, in filtered VMAs. Thus these VMA's need not be
-visited for munlock when the region is unmapped.
-
-For "normal" VMAs, mlock_vma_pages_range() calls __mlock_vma_pages_range() to
-fault/allocate the pages and mlock them. Again, like mlock_fixup(),
-mlock_vma_pages_range() downgrades the mmap semaphore to read mode before
-attempting to fault/allocate and mlock the pages and "upgrades" the semaphore
-back to write mode before returning.
-
-The callers of mlock_vma_pages_range() will have already added the memory range
+populate_vma_page_range() specifying the vma and the address range to mlock.
+
+The callers of populate_vma_page_range() will have already added the memory range
to be mlocked to the task's "locked_vm". To account for filtered VMAs,
-mlock_vma_pages_range() returns the number of pages NOT mlocked. All of the
+populate_vma_page_range() returns the number of pages NOT mlocked. All of the
callers then subtract a non-negative return value from the task's locked_vm. A
negative return value represent an error - for example, from get_user_pages()
attempting to fault in a VMA with PROT_NONE access. In this case, we leave the
- If 0, the protected-mode code is loaded at 0x10000.
- If 1, the protected-mode code is loaded at 0x100000.
+ Bit 1 (kernel internal): ALSR_FLAG
+ - Used internally by the compressed kernel to communicate
+ KASLR status to kernel proper.
+ If 1, KASLR enabled.
+ If 0, KASLR disabled.
+
Bit 5 (write): QUIET_FLAG
- If 0, print early messages.
- If 1, suppress early messages.
ANDROID DRIVERS
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-M: Arve Hj
ønnevåg <arve@android.com>
+M: Arve Hj
ønnevåg <arve@android.com>
M: Riley Andrews <riandrews@android.com>
T: git git://git.kernel.org/pub/scm/linux/kernel/gregkh/staging.git
L: devel@driverdev.osuosl.org
F: drivers/i2c/busses/i2c-st.c
F: drivers/media/rc/st_rc.c
F: drivers/mmc/host/sdhci-st.c
+F: drivers/phy/phy-miphy28lp.c
+F: drivers/phy/phy-miphy365x.c
F: drivers/phy/phy-stih407-usb.c
F: drivers/phy/phy-stih41x-usb.c
F: drivers/pinctrl/pinctrl-st.c
CHIPIDEA USB HIGH SPEED DUAL ROLE CONTROLLER
M: Peter Chen <Peter.Chen@freescale.com>
-T: git git://github.com/hzpeterchen/linux-usb.git
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb.git
L: linux-usb@vger.kernel.org
S: Maintained
F: drivers/usb/chipidea/
F: Documentation/hwmon/da90??
F: drivers/gpio/gpio-da90??.c
F: drivers/hwmon/da90??-hwmon.c
+F: drivers/iio/adc/da91??-*.c
F: drivers/input/misc/da90??_onkey.c
F: drivers/input/touchscreen/da9052_tsi.c
F: drivers/leds/leds-da90??.c
F: drivers/mfd/da903x.c
F: drivers/mfd/da90??-*.c
+F: drivers/mfd/da91??-*.c
F: drivers/power/da9052-battery.c
+F: drivers/power/da91??-*.c
F: drivers/regulator/da903x.c
F: drivers/regulator/da9???-regulator.[ch]
F: drivers/rtc/rtc-da90??.c
F: include/linux/mfd/da9052/
F: include/linux/mfd/da9055/
F: include/linux/mfd/da9063/
+F: include/linux/mfd/da9150/
F: include/sound/da[79]*.h
F: sound/soc/codecs/da[79]*.[ch]
F: sound/soc/fsl/imx*
F: sound/soc/fsl/mpc8610_hpcd.c
+FREESCALE QORIQ MANAGEMENT COMPLEX DRIVER
+M: J. German Rivera <German.Rivera@freescale.com>
+L: linux-kernel@vger.kernel.org
+S: Maintained
+F: drivers/staging/fsl-mc/
+
FREEVXFS FILESYSTEM
M: Christoph Hellwig <hch@infradead.org>
W: ftp://ftp.openlinux.org/pub/people/hch/vxfs
GFS2 FILE SYSTEM
M: Steven Whitehouse <swhiteho@redhat.com>
+M: Bob Peterson <rpeterso@redhat.com>
L: cluster-devel@redhat.com
W: http://sources.redhat.com/cluster/
-T: git git://git.kernel.org/pub/scm/linux/kernel/git/steve/gfs2-3.0-fixes.git
-T: git git://git.kernel.org/pub/scm/linux/kernel/git/steve/gfs2-3.0-nmw.git
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/gfs2/linux-gfs2.git
S: Supported
F: Documentation/filesystems/gfs2*.txt
F: fs/gfs2/
F: drivers/iio/
F: drivers/staging/iio/
F: include/linux/iio/
+F: tools/iio/
IKANOS/ADI EAGLE ADSL USB DRIVER
M: Matthieu Castet <castet.matthieu@free.fr>
F: Documentation/*/kvm*.txt
F: Documentation/virtual/kvm/
F: arch/*/kvm/
+F: arch/x86/kernel/kvm.c
+F: arch/x86/kernel/kvmclock.c
F: arch/*/include/asm/kvm*
F: include/linux/kvm*
F: include/uapi/linux/kvm*
F: include/linux/mfd/
MULTIMEDIA CARD (MMC), SECURE DIGITAL (SD) AND SDIO SUBSYSTEM
-M: Chris Ball <chris@printf.net>
M: Ulf Hansson <ulf.hansson@linaro.org>
L: linux-mmc@vger.kernel.org
-T: git git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc.git
T: git git://git.linaro.org/people/ulf.hansson/mmc.git
S: Maintained
F: drivers/mmc/
F: kernel/time/clocksource.c
F: kernel/time/time*.c
F: kernel/time/ntp.c
+F: tools/testing/selftests/timers/
SC1200 WDT DRIVER
M: Zwane Mwaikambo <zwanem@gmail.com>
F: drivers/mmc/host/sdricoh_cs.c
SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) DRIVER
-M: Chris Ball <chris@printf.net>
L: linux-mmc@vger.kernel.org
-T: git git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc.git
-S: Maintained
+S: Orphan
F: drivers/mmc/host/sdhci.*
F: drivers/mmc/host/sdhci-pltfm.[ch]
K: \bsecure_computing
K: \bTIF_SECCOMP\b
-SECURE DIGITAL HOST CONTROLLER INTERFACE, OPEN FIRMWARE BINDINGS (SDHCI-OF)
-M: Anton Vorontsov <anton@enomsg.org>
-L: linuxppc-dev@lists.ozlabs.org
-L: linux-mmc@vger.kernel.org
-S: Maintained
-F: drivers/mmc/host/sdhci-pltfm.[ch]
-
SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) SAMSUNG DRIVER
M: Ben Dooks <ben-linux@fluff.org>
+M: Jaehoon Chung <jh80.chung@samsung.com>
L: linux-mmc@vger.kernel.org
S: Maintained
-F: drivers/mmc/host/sdhci-s3c.c
+F: drivers/mmc/host/sdhci-s3c*
SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) ST SPEAR DRIVER
M: Viresh Kumar <viresh.linux@gmail.com>
S: Maintained
F: drivers/staging/sm7xxfb/
+STAGING - SILICON MOTION SM750 FRAME BUFFER DRIVER
+M: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
+M: Teddy Wang <teddy.wang@siliconmotion.com>
+M: Sudip Mukherjee <sudip@vectorindia.org>
+L: linux-fbdev@vger.kernel.org
+S: Maintained
+F: drivers/staging/sm750fb/
+
STAGING - SLICOSS
M: Lior Dotan <liodot@gmail.com>
M: Christopher Harrer <charrer@alacritech.com>
F: drivers/net/usb/cdc_*.c
F: include/uapi/linux/usb/cdc.h
+USB CHAOSKEY DRIVER
+M: Keith Packard <keithp@keithp.com>
+L: linux-usb@vger.kernel.org
+S: Maintained
+F: drivers/usb/misc/chaoskey.c
+
USB CYPRESS C67X00 DRIVER
M: Peter Korsgaard <jacmet@sunsite.dk>
L: linux-usb@vger.kernel.org
USB OTG FSM (Finite State Machine)
M: Peter Chen <Peter.Chen@freescale.com>
-T: git git://github.com/hzpeterchen/linux-usb.git
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb.git
L: linux-usb@vger.kernel.org
S: Maintained
F: drivers/usb/common/usb-otg-fsm.c
VERSION = 4
PATCHLEVEL = 0
SUBLEVEL = 0
-EXTRAVERSION = -rc7
+EXTRAVERSION =
NAME = Hurr durr I'ma sheep
# *DOCUMENTATION*
# check for 'asm goto'
ifeq ($(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-goto.sh $(CC)), y)
KBUILD_CFLAGS += -DCC_HAVE_ASM_GOTO
+ KBUILD_AFLAGS += -DCC_HAVE_ASM_GOTO
endif
include $(srctree)/scripts/Makefile.kasan
config HAVE_ARCH_TRANSPARENT_HUGEPAGE
bool
+config HAVE_ARCH_HUGE_VMAP
+ bool
+
config HAVE_ARCH_SOFT_DIRTY
bool
This spares a stack switch and improves cache usage on softirq
processing.
+config PGTABLE_LEVELS
+ int
+ default 2
+
+config ARCH_HAS_ELF_RANDOMIZE
+ bool
+ help
+ An architecture supports choosing randomized locations for
+ stack, mmap, brk, and ET_DYN. Defined functions:
+ - arch_mmap_rnd()
+ - arch_randomize_brk()
+
#
# ABI hall of shame
#
bool
default y
+config PGTABLE_LEVELS
+ int
+ default 3
+
source "init/Kconfig"
source "kernel/Kconfig.freezer"
bus = pci_scan_root_bus(NULL, next_busno, alpha_mv.pci_ops,
hose, &resources);
+ if (!bus)
+ continue;
hose->bus = bus;
hose->need_domain_info = need_domain_info;
next_busno = bus->busn_res.end + 1;
pci_assign_unassigned_resources();
pci_fixup_irqs(alpha_mv.pci_swizzle, alpha_mv.pci_map_irq);
+ for (hose = hose_head; hose; hose = hose->next) {
+ bus = hose->bus;
+ if (bus)
+ pci_bus_add_devices(bus);
+ }
}
}
static int
-alpha_rtc_set_mmss(struct device *dev, unsigned long nowtime)
+alpha_rtc_set_mmss(struct device *dev, time64_t nowtime)
{
int retval = 0;
int real_seconds, real_minutes, cmos_minutes;
static const struct rtc_class_ops alpha_rtc_ops = {
.read_time = alpha_rtc_read_time,
.set_time = alpha_rtc_set_time,
- .set_mmss = alpha_rtc_set_mmss,
+ .set_mmss64 = alpha_rtc_set_mmss,
.ioctl = alpha_rtc_ioctl,
};
}
static int
-remote_set_mmss(struct device *dev, unsigned long now)
+remote_set_mmss(struct device *dev, time64_t now)
{
union remote_data x;
if (smp_processor_id() != boot_cpuid) {
static const struct rtc_class_ops remote_rtc_ops = {
.read_time = remote_read_time,
.set_time = remote_set_time,
- .set_mmss = remote_set_mmss,
+ .set_mmss64 = remote_set_mmss,
.ioctl = alpha_rtc_ioctl,
};
#endif
/* Scan our single hose. */
bus = pci_scan_bus(0, alpha_mv.pci_ops, hose);
+ if (!bus)
+ return;
+
hose->bus = bus;
pcibios_claim_one_bus(bus);
for the root bus, so just clear it. */
bus->self = NULL;
pci_fixup_irqs(alpha_mv.pci_swizzle, alpha_mv.pci_map_irq);
+ pci_bus_add_devices(bus);
}
/*
*/
void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long usp)
{
- set_fs(USER_DS); /* user space */
-
regs->sp = usp;
regs->ret = pc;
break;
case DW_CFA_GNU_window_save:
default:
- unw_debug("UNKNOW OPCODE 0x%x\n", opcode);
+ unw_debug("UNKNOWN OPCODE 0x%x\n", opcode);
result = 0;
break;
}
config ARM
bool
default y
- select ARCH_BINFMT_ELF_RANDOMIZE_PIE
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
+ select ARCH_HAS_ELF_RANDOMIZE
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
select ARCH_HAVE_CUSTOM_GPIO_H
select ARCH_HAS_GCOV_PROFILE_ALL
def_bool y
depends on BUG
+config PGTABLE_LEVELS
+ int
+ default 3 if ARM_LPAE
+ default 2
+
source "init/Kconfig"
source "kernel/Kconfig.freezer"
/ {
compatible = "ti,am4372", "ti,am43";
- interrupt-parent = <&gic>;
+ interrupt-parent = <&wakeupgen>;
aliases {
#interrupt-cells = <3>;
reg = <0x48241000 0x1000>,
<0x48240100 0x0100>;
+ interrupt-parent = <&gic>;
+ };
+
+ wakeupgen: interrupt-controller@48281000 {
+ compatible = "ti,omap4-wugen-mpu";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ reg = <0x48281000 0x1000>;
+ interrupt-parent = <&gic>;
};
l2-cache-controller@48242000 {
reg = <0x24>;
compatible = "ti,tps65218";
interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */
- interrupt-parent = <&gic>;
interrupt-controller;
#interrupt-cells = <2>;
tps@24 {
compatible = "ti,tps65218";
reg = <0x24>;
- interrupt-parent = <&gic>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x24>;
compatible = "ti,tps65218";
interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */
- interrupt-parent = <&gic>;
interrupt-controller;
#interrupt-cells = <2>;
mcp_rtc: rtc@6f {
compatible = "microchip,mcp7941x";
reg = <0x6f>;
- interrupt-parent = <&gic>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_LOW>; /* IRQ_SYS_1N */
pinctrl-names = "default";
&uart3 {
status = "okay";
- interrupts-extended = <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
<&dra7_pmx_core 0x248>;
pinctrl-names = "default";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
- interrupts-extended = <&gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
<&dra7_pmx_core 0x3e0>;
};
#include "skeleton.dtsi"
#define MAX_SOURCES 400
-#define DIRECT_IRQ(irq) (MAX_SOURCES + irq)
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "ti,dra7xx";
- interrupt-parent = <&gic>;
+ interrupt-parent = <&crossbar_mpu>;
aliases {
i2c0 = &i2c1;
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupt-parent = <&gic>;
};
gic: interrupt-controller@48211000 {
compatible = "arm,cortex-a15-gic";
interrupt-controller;
#interrupt-cells = <3>;
- arm,routable-irqs = <192>;
reg = <0x48211000 0x1000>,
<0x48212000 0x1000>,
<0x48214000 0x2000>,
<0x48216000 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupt-parent = <&gic>;
+ };
+
+ wakeupgen: interrupt-controller@48281000 {
+ compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ reg = <0x48281000 0x1000>;
+ interrupt-parent = <&gic>;
};
/*
ti,hwmods = "l3_main_1", "l3_main_2";
reg = <0x44000000 0x1000000>,
<0x45000000 0x1000>;
- interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI DIRECT_IRQ(10) IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&crossbar_mpu GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <&wakeupgen GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
prm: prm@4ae06000 {
compatible = "ti,dra7-prm";
uart1: serial@4806a000 {
compatible = "ti,omap4-uart";
reg = <0x4806a000 0x100>;
- interrupts-extended = <&gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart1";
clock-frequency = <48000000>;
status = "disabled";
uart2: serial@4806c000 {
compatible = "ti,omap4-uart";
reg = <0x4806c000 0x100>;
- interrupts-extended = <&gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart2";
clock-frequency = <48000000>;
status = "disabled";
uart3: serial@48020000 {
compatible = "ti,omap4-uart";
reg = <0x48020000 0x100>;
- interrupts-extended = <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart3";
clock-frequency = <48000000>;
status = "disabled";
uart4: serial@4806e000 {
compatible = "ti,omap4-uart";
reg = <0x4806e000 0x100>;
- interrupts-extended = <&gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart4";
clock-frequency = <48000000>;
status = "disabled";
uart5: serial@48066000 {
compatible = "ti,omap4-uart";
reg = <0x48066000 0x100>;
- interrupts-extended = <&gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart5";
clock-frequency = <48000000>;
status = "disabled";
uart6: serial@48068000 {
compatible = "ti,omap4-uart";
reg = <0x48068000 0x100>;
- interrupts-extended = <&gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart6";
clock-frequency = <48000000>;
status = "disabled";
uart7: serial@48420000 {
compatible = "ti,omap4-uart";
reg = <0x48420000 0x100>;
- interrupts-extended = <&gic GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart7";
clock-frequency = <48000000>;
status = "disabled";
uart8: serial@48422000 {
compatible = "ti,omap4-uart";
reg = <0x48422000 0x100>;
- interrupts-extended = <&gic GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart8";
clock-frequency = <48000000>;
status = "disabled";
uart9: serial@48424000 {
compatible = "ti,omap4-uart";
reg = <0x48424000 0x100>;
- interrupts-extended = <&gic GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart9";
clock-frequency = <48000000>;
status = "disabled";
uart10: serial@4ae2b000 {
compatible = "ti,omap4-uart";
reg = <0x4ae2b000 0x100>;
- interrupts-extended = <&gic GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart10";
clock-frequency = <48000000>;
status = "disabled";
status = "disabled";
};
- crossbar_mpu: crossbar@4a020000 {
+ crossbar_mpu: crossbar@4a002a48 {
compatible = "ti,irq-crossbar";
reg = <0x4a002a48 0x130>;
+ interrupt-controller;
+ interrupt-parent = <&wakeupgen>;
+ #interrupt-cells = <3>;
ti,max-irqs = <160>;
ti,max-crossbar-sources = <MAX_SOURCES>;
ti,reg-size = <2>;
pinctrl-0 = <&tps65917_pins_default>;
interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
- interrupt-parent = <&gic>;
interrupt-controller;
#interrupt-cells = <2>;
pmu {
compatible = "arm,cortex-a15-pmu";
- interrupts = <GIC_SPI DIRECT_IRQ(131) IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&wakeupgen>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
};
};
pmu {
compatible = "arm,cortex-a15-pmu";
- interrupts = <GIC_SPI DIRECT_IRQ(131) IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI DIRECT_IRQ(132) IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&wakeupgen>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
};
ocp {
pmu_system_controller: system-controller@10020000 {
compatible = "samsung,exynos3250-pmu", "syscon";
reg = <0x10020000 0x4000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
};
mipi_phy: video-phy@10020710 {
compatible = "samsung,exynos3250-rtc";
reg = <0x10070000 0x100>;
interrupts = <0 73 0>, <0 74 0>;
+ interrupt-parent = <&pmu_system_controller>;
status = "disabled";
};
pmu_system_controller: system-controller@10020000 {
compatible = "samsung,exynos4210-pmu", "syscon";
reg = <0x10020000 0x4000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
};
dsi_0: dsi@11C80000 {
rtc@10070000 {
compatible = "samsung,s3c6410-rtc";
reg = <0x10070000 0x100>;
+ interrupt-parent = <&pmu_system_controller>;
interrupts = <0 44 0>, <0 45 0>;
clocks = <&clock CLK_RTC>;
clock-names = "rtc";
clock-names = "clkout16";
clocks = <&clock CLK_FIN_PLL>;
#clock-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
};
sysreg_system_controller: syscon@10050000 {
rtc: rtc@101E0000 {
clocks = <&clock CLK_RTC>;
clock-names = "rtc";
+ interrupt-parent = <&pmu_system_controller>;
status = "disabled";
};
rtc: rtc@101E0000 {
clocks = <&clock CLK_RTC>;
clock-names = "rtc";
+ interrupt-parent = <&pmu_system_controller>;
status = "disabled";
};
clock-names = "clkout16";
clocks = <&clock CLK_FIN_PLL>;
#clock-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
};
sysreg_system_controller: syscon@10050000 {
twl: twl@48 {
reg = <0x48>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
- interrupt-parent = <&gic>;
};
twl6040: twl@4b {
compatible = "ti,twl6040";
reg = <0x4b>;
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
- interrupt-parent = <&gic>;
ti,audpwron-gpio = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* gpio_160 */
vio-supply = <&v1v8>;
reg = <0x48>;
/* IRQ# = 7 */
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
- interrupt-parent = <&gic>;
};
twl6040: twl@4b {
/* IRQ# = 119 */
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
- interrupt-parent = <&gic>;
ti,audpwron-gpio = <&gpio4 31 GPIO_ACTIVE_HIGH>; /* gpio line 127 */
vio-supply = <&v1v8>;
};
&uart2 {
- interrupts-extended = <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH
+ interrupts-extended = <&wakeupgen GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH
&omap4_pmx_core OMAP4_UART2_RX>;
};
&uart3 {
- interrupts-extended = <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
+ interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
&omap4_pmx_core OMAP4_UART3_RX>;
};
&uart4 {
- interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
+ interrupts-extended = <&wakeupgen GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
&omap4_pmx_core OMAP4_UART4_RX>;
};
reg = <0x48>;
/* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
- interrupt-parent = <&gic>;
};
twl6040: twl@4b {
/* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
- interrupt-parent = <&gic>;
ti,audpwron-gpio = <&gpio4 31 0>; /* gpio line 127 */
vio-supply = <&v1v8>;
};
&uart2 {
- interrupts-extended = <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH
+ interrupts-extended = <&wakeupgen GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH
&omap4_pmx_core OMAP4_UART2_RX>;
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
};
&uart3 {
- interrupts-extended = <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
+ interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
&omap4_pmx_core OMAP4_UART3_RX>;
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
};
&uart4 {
- interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
+ interrupts-extended = <&wakeupgen GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
&omap4_pmx_core OMAP4_UART4_RX>;
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins>;
reg = <0x48>;
/* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
- interrupt-parent = <&gic>;
};
twl6040: twl@4b {
/* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
- interrupt-parent = <&gic>;
ti,audpwron-gpio = <&gpio6 22 0>; /* gpio 182 */
vio-supply = <&v1v8>;
/ {
compatible = "ti,omap4430", "ti,omap4";
- interrupt-parent = <&gic>;
+ interrupt-parent = <&wakeupgen>;
aliases {
i2c0 = &i2c1;
#interrupt-cells = <3>;
reg = <0x48241000 0x1000>,
<0x48240100 0x0100>;
+ interrupt-parent = <&gic>;
};
L2: l2-cache-controller@48242000 {
clocks = <&mpu_periphclk>;
reg = <0x48240600 0x20>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupt-parent = <&gic>;
+ };
+
+ wakeupgen: interrupt-controller@48281000 {
+ compatible = "ti,omap4-wugen-mpu";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ reg = <0x48281000 0x1000>;
+ interrupt-parent = <&gic>;
};
/*
uart2: serial@4806c000 {
compatible = "ti,omap4-uart";
reg = <0x4806c000 0x100>;
- interrupts-extended = <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart2";
clock-frequency = <48000000>;
};
uart3: serial@48020000 {
compatible = "ti,omap4-uart";
reg = <0x48020000 0x100>;
- interrupts-extended = <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart3";
clock-frequency = <48000000>;
};
uart4: serial@4806e000 {
compatible = "ti,omap4-uart";
reg = <0x4806e000 0x100>;
- interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart4";
clock-frequency = <48000000>;
};
palmas: palmas@48 {
compatible = "ti,palmas";
interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
- interrupt-parent = <&gic>;
reg = <0x48>;
interrupt-controller;
#interrupt-cells = <2>;
palmas: palmas@48 {
compatible = "ti,palmas";
interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
- interrupt-parent = <&gic>;
reg = <0x48>;
interrupt-controller;
#interrupt-cells = <2>;
pinctrl-0 = <&twl6040_pins>;
interrupts = <GIC_SPI 119 IRQ_TYPE_NONE>; /* IRQ_SYS_2N cascaded to gic */
- interrupt-parent = <&gic>;
ti,audpwron-gpio = <&gpio5 13 0>; /* gpio line 141 */
vio-supply = <&smps7_reg>;
#size-cells = <1>;
compatible = "ti,omap5";
- interrupt-parent = <&gic>;
+ interrupt-parent = <&wakeupgen>;
aliases {
i2c0 = &i2c1;
<GIC_PPI 14 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupt-parent = <&gic>;
};
pmu {
<0x48212000 0x1000>,
<0x48214000 0x2000>,
<0x48216000 0x2000>;
+ interrupt-parent = <&gic>;
+ };
+
+ wakeupgen: interrupt-controller@48281000 {
+ compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ reg = <0x48281000 0x1000>;
+ interrupt-parent = <&gic>;
};
/*
uart1: serial@4806a000 {
compatible = "ti,omap4-uart";
reg = <0x4806a000 0x100>;
- interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart1";
clock-frequency = <48000000>;
};
uart2: serial@4806c000 {
compatible = "ti,omap4-uart";
reg = <0x4806c000 0x100>;
- interrupts-extended = <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart2";
clock-frequency = <48000000>;
};
uart3: serial@48020000 {
compatible = "ti,omap4-uart";
reg = <0x48020000 0x100>;
- interrupts-extended = <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart3";
clock-frequency = <48000000>;
};
uart4: serial@4806e000 {
compatible = "ti,omap4-uart";
reg = <0x4806e000 0x100>;
- interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart4";
clock-frequency = <48000000>;
};
uart5: serial@48066000 {
compatible = "ti,omap4-uart";
reg = <0x48066000 0x100>;
- interrupts-extended = <&gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart5";
clock-frequency = <48000000>;
};
uart6: serial@48068000 {
compatible = "ti,omap4-uart";
reg = <0x48068000 0x100>;
- interrupts-extended = <&gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart6";
clock-frequency = <48000000>;
};
usbhsohci: ohci@4a064800 {
compatible = "ti,ohci-omap3";
reg = <0x4a064800 0x400>;
- interrupt-parent = <&gic>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
};
usbhsehci: ehci@4a064c00 {
compatible = "ti,ehci-omap";
reg = <0x4a064c00 0x400>;
- interrupt-parent = <&gic>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
};
};
#include "stih416-clock.dtsi"
#include "stih416-pinctrl.dtsi"
-#include <dt-bindings/phy/phy-miphy365x.h>
+#include <dt-bindings/phy/phy.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset-controller/stih416-resets.h>
/ {
reg = <0xfe380000 0x1000>;
interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
interrupt-names = "hostc";
- phys = <&phy_port0 MIPHY_TYPE_SATA>;
+ phys = <&phy_port0 PHY_TYPE_SATA>;
phy-names = "sata-phy";
resets = <&powerdown STIH416_SATA0_POWERDOWN>,
<&softreset STIH416_SATA0_SOFTRESET>;
/ {
compatible = "nvidia,tegra114";
- interrupt-parent = <&gic>;
+ interrupt-parent = <&lic>;
host1x@50000000 {
compatible = "nvidia,tegra114-host1x", "simple-bus";
<0x50046000 0x2000>;
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupt-parent = <&gic>;
+ };
+
+ lic: interrupt-controller@60004000 {
+ compatible = "nvidia,tegra114-ictlr", "nvidia,tegra30-ictlr";
+ reg = <0x60004000 0x100>,
+ <0x60004100 0x50>,
+ <0x60004200 0x50>,
+ <0x60004300 0x50>,
+ <0x60004400 0x50>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
};
timer@60005000 {
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupt-parent = <&gic>;
};
};
/ {
compatible = "nvidia,tegra124";
- interrupt-parent = <&gic>;
+ interrupt-parent = <&lic>;
#address-cells = <2>;
#size-cells = <2>;
<0x0 0x50046000 0x0 0x2000>;
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupt-parent = <&gic>;
};
gpu@0,57000000 {
status = "disabled";
};
+ lic: interrupt-controller@60004000 {
+ compatible = "nvidia,tegra124-ictlr", "nvidia,tegra30-ictlr";
+ reg = <0x0 0x60004000 0x0 0x100>,
+ <0x0 0x60004100 0x0 0x100>,
+ <0x0 0x60004200 0x0 0x100>,
+ <0x0 0x60004300 0x0 0x100>,
+ <0x0 0x60004400 0x0 0x100>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
+ };
+
timer@0,60005000 {
compatible = "nvidia,tegra124-timer", "nvidia,tegra20-timer";
reg = <0x0 0x60005000 0x0 0x400>;
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupt-parent = <&gic>;
};
};
/ {
compatible = "nvidia,tegra20";
- interrupt-parent = <&intc>;
+ interrupt-parent = <&lic>;
host1x@50000000 {
compatible = "nvidia,tegra20-host1x", "simple-bus";
timer@50040600 {
compatible = "arm,cortex-a9-twd-timer";
+ interrupt-parent = <&intc>;
reg = <0x50040600 0x20>;
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
0x50040100 0x0100>;
interrupt-controller;
#interrupt-cells = <3>;
+ interrupt-parent = <&intc>;
};
cache-controller@50043000 {
cache-level = <2>;
};
+ lic: interrupt-controller@60004000 {
+ compatible = "nvidia,tegra20-ictlr";
+ reg = <0x60004000 0x100>,
+ <0x60004100 0x50>,
+ <0x60004200 0x50>,
+ <0x60004300 0x50>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&intc>;
+ };
+
timer@60005000 {
compatible = "nvidia,tegra20-timer";
reg = <0x60005000 0x60>;
/ {
compatible = "nvidia,tegra30";
- interrupt-parent = <&intc>;
+ interrupt-parent = <&lic>;
pcie-controller@00003000 {
compatible = "nvidia,tegra30-pcie";
timer@50040600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x50040600 0x20>;
+ interrupt-parent = <&intc>;
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&tegra_car TEGRA30_CLK_TWD>;
0x50040100 0x0100>;
interrupt-controller;
#interrupt-cells = <3>;
+ interrupt-parent = <&intc>;
};
cache-controller@50043000 {
cache-level = <2>;
};
+ lic: interrupt-controller@60004000 {
+ compatible = "nvidia,tegra30-ictlr";
+ reg = <0x60004000 0x100>,
+ <0x60004100 0x50>,
+ <0x60004200 0x50>,
+ <0x60004300 0x50>,
+ <0x60004400 0x50>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&intc>;
+ };
+
timer@60005000 {
compatible = "nvidia,tegra30-timer", "nvidia,tegra20-timer";
reg = <0x60005000 0x400>;
unsigned int mpidr, this_cpu, that_cpu;
unsigned int ob_mpidr, ob_cpu, ob_cluster, ib_mpidr, ib_cpu, ib_cluster;
struct completion inbound_alive;
- struct tick_device *tdev;
- enum clock_event_mode tdev_mode;
long volatile *handshake_ptr;
int ipi_nr, ret;
/* redirect GIC's SGIs to our counterpart */
gic_migrate_target(bL_gic_id[ib_cpu][ib_cluster]);
- tdev = tick_get_device(this_cpu);
- if (tdev && !cpumask_equal(tdev->evtdev->cpumask, cpumask_of(this_cpu)))
- tdev = NULL;
- if (tdev) {
- tdev_mode = tdev->evtdev->mode;
- clockevents_set_mode(tdev->evtdev, CLOCK_EVT_MODE_SHUTDOWN);
- }
+ tick_suspend_local();
ret = cpu_pm_enter();
ret = cpu_pm_exit();
- if (tdev) {
- clockevents_set_mode(tdev->evtdev, tdev_mode);
- clockevents_program_event(tdev->evtdev,
- tdev->evtdev->next_event, 1);
- }
+ tick_resume_local();
trace_cpu_migrate_finish(ktime_get_real_ns(), ib_mpidr);
local_fiq_enable();
extern void elf_set_personality(const struct elf32_hdr *);
#define SET_PERSONALITY(ex) elf_set_personality(&(ex))
-struct mm_struct;
-extern unsigned long arch_randomize_brk(struct mm_struct *mm);
-#define arch_randomize_brk arch_randomize_brk
-
#ifdef CONFIG_MMU
#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
struct linux_binprm;
#ifndef _ASM_ARM_JUMP_LABEL_H
#define _ASM_ARM_JUMP_LABEL_H
-#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
#include <linux/types.h>
return true;
}
-#endif /* __KERNEL__ */
-
typedef u32 jump_label_t;
struct jump_entry {
jump_label_t key;
};
+#endif /* __ASSEMBLY__ */
#endif
#define HSR_COND (0xfU << HSR_COND_SHIFT)
#define FSC_FAULT (0x04)
+#define FSC_ACCESS (0x08)
#define FSC_PERM (0x0c)
/* Hyp Prefetch Fault Address Register (HPFAR/HDFAR) */
#include <asm/fpstate.h>
#include <kvm/arm_arch_timer.h>
+#define __KVM_HAVE_ARCH_INTC_INITIALIZED
+
#if defined(CONFIG_KVM_ARM_MAX_VCPUS)
#define KVM_MAX_VCPUS CONFIG_KVM_ARM_MAX_VCPUS
#else
unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
+int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
+int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
/* We do not have shadow page tables, hence the empty hooks */
-static inline int kvm_age_hva(struct kvm *kvm, unsigned long start,
- unsigned long end)
-{
- return 0;
-}
-
-static inline int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
-{
- return 0;
-}
-
static inline void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
unsigned long address)
{
bool sign_extend;
};
-/*
- * The in-kernel MMIO emulation code wants to use a copy of run->mmio,
- * which is an anonymous type. Use our own type instead.
- */
-struct kvm_exit_mmio {
- phys_addr_t phys_addr;
- u8 data[8];
- u32 len;
- bool is_write;
- void *private;
-};
-
-static inline void kvm_prepare_mmio(struct kvm_run *run,
- struct kvm_exit_mmio *mmio)
-{
- run->mmio.phys_addr = mmio->phys_addr;
- run->mmio.len = mmio->len;
- run->mmio.is_write = mmio->is_write;
- memcpy(run->mmio.data, mmio->data, mmio->len);
- run->exit_reason = KVM_EXIT_MMIO;
-}
-
int kvm_handle_mmio_return(struct kvm_vcpu *vcpu, struct kvm_run *run);
int io_mem_abort(struct kvm_vcpu *vcpu, struct kvm_run *run,
phys_addr_t fault_ipa);
extern void timer_tick(void);
-struct timespec;
-typedef void (*clock_access_fn)(struct timespec *);
+typedef void (*clock_access_fn)(struct timespec64 *);
extern int register_persistent_clock(clock_access_fn read_boot,
clock_access_fn read_persistent);
/* Highest supported SPI, from VGIC_NR_IRQS */
#define KVM_ARM_IRQ_GIC_MAX 127
+/* One single KVM irqchip, ie. the VGIC */
+#define KVM_NR_IRQCHIPS 1
+
/* PSCI interface */
#define KVM_PSCI_FN_BASE 0x95c1ba5e
#define KVM_PSCI_FN(n) (KVM_PSCI_FN_BASE + (n))
DEFINE(VCPU_HxFAR, offsetof(struct kvm_vcpu, arch.fault.hxfar));
DEFINE(VCPU_HPFAR, offsetof(struct kvm_vcpu, arch.fault.hpfar));
DEFINE(VCPU_HYP_PC, offsetof(struct kvm_vcpu, arch.fault.hyp_pc));
-#ifdef CONFIG_KVM_ARM_VGIC
DEFINE(VCPU_VGIC_CPU, offsetof(struct kvm_vcpu, arch.vgic_cpu));
DEFINE(VGIC_V2_CPU_HCR, offsetof(struct vgic_cpu, vgic_v2.vgic_hcr));
DEFINE(VGIC_V2_CPU_VMCR, offsetof(struct vgic_cpu, vgic_v2.vgic_vmcr));
DEFINE(VGIC_V2_CPU_APR, offsetof(struct vgic_cpu, vgic_v2.vgic_apr));
DEFINE(VGIC_V2_CPU_LR, offsetof(struct vgic_cpu, vgic_v2.vgic_lr));
DEFINE(VGIC_CPU_NR_LR, offsetof(struct vgic_cpu, nr_lr));
-#ifdef CONFIG_KVM_ARM_TIMER
DEFINE(VCPU_TIMER_CNTV_CTL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_ctl));
DEFINE(VCPU_TIMER_CNTV_CVAL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_cval));
DEFINE(KVM_TIMER_CNTVOFF, offsetof(struct kvm, arch.timer.cntvoff));
DEFINE(KVM_TIMER_ENABLED, offsetof(struct kvm, arch.timer.enabled));
-#endif
DEFINE(KVM_VGIC_VCTRL, offsetof(struct kvm, arch.vgic.vctrl_base));
-#endif
DEFINE(KVM_VTTBR, offsetof(struct kvm, arch.vttbr));
#endif
return 0;
* Per-cpu breakpoints are not supported by our stepping
* mechanism.
*/
- if (!bp->hw.bp_target)
+ if (!bp->hw.target)
return -EINVAL;
/*
}
#endif
-static void dummy_clock_access(struct timespec *ts)
+static void dummy_clock_access(struct timespec64 *ts)
{
ts->tv_sec = 0;
ts->tv_nsec = 0;
static clock_access_fn __read_persistent_clock = dummy_clock_access;
static clock_access_fn __read_boot_clock = dummy_clock_access;;
-void read_persistent_clock(struct timespec *ts)
+void read_persistent_clock64(struct timespec64 *ts)
{
__read_persistent_clock(ts);
}
-void read_boot_clock(struct timespec *ts)
+void read_boot_clock64(struct timespec64 *ts)
{
__read_boot_clock(ts);
}
config KVM
bool "Kernel-based Virtual Machine (KVM) support"
+ depends on MMU && OF
select PREEMPT_NOTIFIERS
select ANON_INODES
select HAVE_KVM_CPU_RELAX_INTERCEPT
select KVM_ARM_HOST
select KVM_GENERIC_DIRTYLOG_READ_PROTECT
select SRCU
- depends on ARM_VIRT_EXT && ARM_LPAE
+ select MMU_NOTIFIER
+ select HAVE_KVM_EVENTFD
+ select HAVE_KVM_IRQFD
+ depends on ARM_VIRT_EXT && ARM_LPAE && ARM_ARCH_TIMER
---help---
- Support hosting virtualized guest machines. You will also
- need to select one or more of the processor modules below.
+ Support hosting virtualized guest machines.
This module provides access to the hardware capabilities through
a character device node named /dev/kvm.
If unsure, say N.
config KVM_ARM_HOST
- bool "KVM host support for ARM cpus."
- depends on KVM
- depends on MMU
- select MMU_NOTIFIER
+ bool
---help---
Provides host support for ARM processors.
large, so only choose a reasonable number that you expect to
actually use.
-config KVM_ARM_VGIC
- bool "KVM support for Virtual GIC"
- depends on KVM_ARM_HOST && OF
- select HAVE_KVM_IRQCHIP
- default y
- ---help---
- Adds support for a hardware assisted, in-kernel GIC emulation.
-
-config KVM_ARM_TIMER
- bool "KVM support for Architected Timers"
- depends on KVM_ARM_VGIC && ARM_ARCH_TIMER
- select HAVE_KVM_IRQCHIP
- default y
- ---help---
- Adds support for the Architected Timers in virtual machines
-
endif # VIRTUALIZATION
plus_virt_def := -DREQUIRES_VIRT=1
endif
-ccflags-y += -Ivirt/kvm -Iarch/arm/kvm
+ccflags-y += -Iarch/arm/kvm
CFLAGS_arm.o := -I. $(plus_virt_def)
CFLAGS_mmu.o := -I.
AFLAGS_interrupts.o := -Wa,-march=armv7-a$(plus_virt)
KVM := ../../../virt/kvm
-kvm-arm-y = $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o
+kvm-arm-y = $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o $(KVM)/eventfd.o
obj-y += kvm-arm.o init.o interrupts.o
obj-y += arm.o handle_exit.o guest.o mmu.o emulate.o reset.o
obj-y += coproc.o coproc_a15.o coproc_a7.o mmio.o psci.o perf.o
-obj-$(CONFIG_KVM_ARM_VGIC) += $(KVM)/arm/vgic.o
-obj-$(CONFIG_KVM_ARM_VGIC) += $(KVM)/arm/vgic-v2.o
-obj-$(CONFIG_KVM_ARM_VGIC) += $(KVM)/arm/vgic-v2-emul.o
-obj-$(CONFIG_KVM_ARM_TIMER) += $(KVM)/arm/arch_timer.o
+obj-y += $(KVM)/arm/vgic.o
+obj-y += $(KVM)/arm/vgic-v2.o
+obj-y += $(KVM)/arm/vgic-v2-emul.o
+obj-y += $(KVM)/arm/arch_timer.o
static u8 kvm_next_vmid;
static DEFINE_SPINLOCK(kvm_vmid_lock);
-static bool vgic_present;
-
static void kvm_arm_set_running_vcpu(struct kvm_vcpu *vcpu)
{
BUG_ON(preemptible());
int r;
switch (ext) {
case KVM_CAP_IRQCHIP:
- r = vgic_present;
- break;
+ case KVM_CAP_IRQFD:
+ case KVM_CAP_IOEVENTFD:
case KVM_CAP_DEVICE_CTRL:
case KVM_CAP_USER_MEMORY:
case KVM_CAP_SYNC_MMU:
case KVM_CAP_ARM_PSCI:
case KVM_CAP_ARM_PSCI_0_2:
case KVM_CAP_READONLY_MEM:
+ case KVM_CAP_MP_STATE:
r = 1;
break;
case KVM_CAP_COALESCED_MMIO:
int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
{
- return 0;
+ return kvm_timer_should_fire(vcpu);
}
int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
struct kvm_mp_state *mp_state)
{
- return -EINVAL;
+ if (vcpu->arch.pause)
+ mp_state->mp_state = KVM_MP_STATE_STOPPED;
+ else
+ mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
+
+ return 0;
}
int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
struct kvm_mp_state *mp_state)
{
- return -EINVAL;
+ switch (mp_state->mp_state) {
+ case KVM_MP_STATE_RUNNABLE:
+ vcpu->arch.pause = false;
+ break;
+ case KVM_MP_STATE_STOPPED:
+ vcpu->arch.pause = true;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
}
/**
return 0;
}
+bool kvm_arch_intc_initialized(struct kvm *kvm)
+{
+ return vgic_initialized(kvm);
+}
+
static void vcpu_pause(struct kvm_vcpu *vcpu)
{
wait_queue_head_t *wq = kvm_arch_vcpu_wq(vcpu);
switch (dev_id) {
case KVM_ARM_DEVICE_VGIC_V2:
- if (!vgic_present)
- return -ENXIO;
return kvm_vgic_addr(kvm, type, &dev_addr->addr, true);
default:
return -ENODEV;
switch (ioctl) {
case KVM_CREATE_IRQCHIP: {
- if (vgic_present)
- return kvm_vgic_create(kvm, KVM_DEV_TYPE_ARM_VGIC_V2);
- else
- return -ENXIO;
+ return kvm_vgic_create(kvm, KVM_DEV_TYPE_ARM_VGIC_V2);
}
case KVM_ARM_SET_DEVICE_ADDR: {
struct kvm_arm_device_addr dev_addr;
if (err)
goto out_free_context;
-#ifdef CONFIG_KVM_ARM_VGIC
- vgic_present = true;
-#endif
-
/*
* Init HYP architected timer support
*/
return -EINVAL;
}
-#ifndef CONFIG_KVM_ARM_TIMER
-
-#define NUM_TIMER_REGS 0
-
-static int copy_timer_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
-{
- return 0;
-}
-
-static bool is_timer_reg(u64 index)
-{
- return false;
-}
-
-#else
-
#define NUM_TIMER_REGS 3
static bool is_timer_reg(u64 index)
return 0;
}
-#endif
-
static int set_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
{
void __user *uaddr = (void __user *)(long)reg->addr;
* Assumes vcpu pointer in vcpu reg
*/
.macro save_vgic_state
-#ifdef CONFIG_KVM_ARM_VGIC
/* Get VGIC VCTRL base into r2 */
ldr r2, [vcpu, #VCPU_KVM]
ldr r2, [r2, #KVM_VGIC_VCTRL]
subs r4, r4, #1
bne 1b
2:
-#endif
.endm
/*
* Assumes vcpu pointer in vcpu reg
*/
.macro restore_vgic_state
-#ifdef CONFIG_KVM_ARM_VGIC
/* Get VGIC VCTRL base into r2 */
ldr r2, [vcpu, #VCPU_KVM]
ldr r2, [r2, #KVM_VGIC_VCTRL]
subs r4, r4, #1
bne 1b
2:
-#endif
.endm
#define CNTHCTL_PL1PCTEN (1 << 0)
* Clobbers r2-r5
*/
.macro save_timer_state
-#ifdef CONFIG_KVM_ARM_TIMER
ldr r4, [vcpu, #VCPU_KVM]
ldr r2, [r4, #KVM_TIMER_ENABLED]
cmp r2, #0
mcrr p15, 4, r2, r2, c14 @ CNTVOFF
1:
-#endif
@ Allow physical timer/counter access for the host
mrc p15, 4, r2, c14, c1, 0 @ CNTHCTL
orr r2, r2, #(CNTHCTL_PL1PCEN | CNTHCTL_PL1PCTEN)
bic r2, r2, #CNTHCTL_PL1PCEN
mcr p15, 4, r2, c14, c1, 0 @ CNTHCTL
-#ifdef CONFIG_KVM_ARM_TIMER
ldr r4, [vcpu, #VCPU_KVM]
ldr r2, [r4, #KVM_TIMER_ENABLED]
cmp r2, #0
and r2, r2, #3
mcr p15, 0, r2, c14, c3, 1 @ CNTV_CTL
1:
-#endif
.endm
.equ vmentry, 0
return 0;
}
-static int decode_hsr(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
- struct kvm_exit_mmio *mmio)
+static int decode_hsr(struct kvm_vcpu *vcpu, bool *is_write, int *len)
{
unsigned long rt;
- int len;
- bool is_write, sign_extend;
+ int access_size;
+ bool sign_extend;
if (kvm_vcpu_dabt_isextabt(vcpu)) {
/* cache operation on I/O addr, tell guest unsupported */
return 1;
}
- len = kvm_vcpu_dabt_get_as(vcpu);
- if (unlikely(len < 0))
- return len;
+ access_size = kvm_vcpu_dabt_get_as(vcpu);
+ if (unlikely(access_size < 0))
+ return access_size;
- is_write = kvm_vcpu_dabt_iswrite(vcpu);
+ *is_write = kvm_vcpu_dabt_iswrite(vcpu);
sign_extend = kvm_vcpu_dabt_issext(vcpu);
rt = kvm_vcpu_dabt_get_rd(vcpu);
- mmio->is_write = is_write;
- mmio->phys_addr = fault_ipa;
- mmio->len = len;
+ *len = access_size;
vcpu->arch.mmio_decode.sign_extend = sign_extend;
vcpu->arch.mmio_decode.rt = rt;
int io_mem_abort(struct kvm_vcpu *vcpu, struct kvm_run *run,
phys_addr_t fault_ipa)
{
- struct kvm_exit_mmio mmio;
unsigned long data;
unsigned long rt;
int ret;
+ bool is_write;
+ int len;
+ u8 data_buf[8];
/*
- * Prepare MMIO operation. First stash it in a private
- * structure that we can use for in-kernel emulation. If the
- * kernel can't handle it, copy it into run->mmio and let user
- * space do its magic.
+ * Prepare MMIO operation. First decode the syndrome data we get
+ * from the CPU. Then try if some in-kernel emulation feels
+ * responsible, otherwise let user space do its magic.
*/
-
if (kvm_vcpu_dabt_isvalid(vcpu)) {
- ret = decode_hsr(vcpu, fault_ipa, &mmio);
+ ret = decode_hsr(vcpu, &is_write, &len);
if (ret)
return ret;
} else {
rt = vcpu->arch.mmio_decode.rt;
- if (mmio.is_write) {
- data = vcpu_data_guest_to_host(vcpu, *vcpu_reg(vcpu, rt),
- mmio.len);
+ if (is_write) {
+ data = vcpu_data_guest_to_host(vcpu, *vcpu_reg(vcpu, rt), len);
+
+ trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, len, fault_ipa, data);
+ mmio_write_buf(data_buf, len, data);
- trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, mmio.len,
- fault_ipa, data);
- mmio_write_buf(mmio.data, mmio.len, data);
+ ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, fault_ipa, len,
+ data_buf);
} else {
- trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, mmio.len,
+ trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, len,
fault_ipa, 0);
+
+ ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, fault_ipa, len,
+ data_buf);
}
- if (vgic_handle_mmio(vcpu, run, &mmio))
+ /* Now prepare kvm_run for the potential return to userland. */
+ run->mmio.is_write = is_write;
+ run->mmio.phys_addr = fault_ipa;
+ run->mmio.len = len;
+ memcpy(run->mmio.data, data_buf, len);
+
+ if (!ret) {
+ /* We handled the access successfully in the kernel. */
+ kvm_handle_mmio_return(vcpu, run);
return 1;
+ }
- kvm_prepare_mmio(run, &mmio);
+ run->exit_reason = KVM_EXIT_MMIO;
return 0;
}
out_unlock:
spin_unlock(&kvm->mmu_lock);
+ kvm_set_pfn_accessed(pfn);
kvm_release_pfn_clean(pfn);
return ret;
}
+/*
+ * Resolve the access fault by making the page young again.
+ * Note that because the faulting entry is guaranteed not to be
+ * cached in the TLB, we don't need to invalidate anything.
+ */
+static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa)
+{
+ pmd_t *pmd;
+ pte_t *pte;
+ pfn_t pfn;
+ bool pfn_valid = false;
+
+ trace_kvm_access_fault(fault_ipa);
+
+ spin_lock(&vcpu->kvm->mmu_lock);
+
+ pmd = stage2_get_pmd(vcpu->kvm, NULL, fault_ipa);
+ if (!pmd || pmd_none(*pmd)) /* Nothing there */
+ goto out;
+
+ if (kvm_pmd_huge(*pmd)) { /* THP, HugeTLB */
+ *pmd = pmd_mkyoung(*pmd);
+ pfn = pmd_pfn(*pmd);
+ pfn_valid = true;
+ goto out;
+ }
+
+ pte = pte_offset_kernel(pmd, fault_ipa);
+ if (pte_none(*pte)) /* Nothing there either */
+ goto out;
+
+ *pte = pte_mkyoung(*pte); /* Just a page... */
+ pfn = pte_pfn(*pte);
+ pfn_valid = true;
+out:
+ spin_unlock(&vcpu->kvm->mmu_lock);
+ if (pfn_valid)
+ kvm_set_pfn_accessed(pfn);
+}
+
/**
* kvm_handle_guest_abort - handles all 2nd stage aborts
* @vcpu: the VCPU pointer
/* Check the stage-2 fault is trans. fault or write fault */
fault_status = kvm_vcpu_trap_get_fault_type(vcpu);
- if (fault_status != FSC_FAULT && fault_status != FSC_PERM) {
+ if (fault_status != FSC_FAULT && fault_status != FSC_PERM &&
+ fault_status != FSC_ACCESS) {
kvm_err("Unsupported FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx\n",
kvm_vcpu_trap_get_class(vcpu),
(unsigned long)kvm_vcpu_trap_get_fault(vcpu),
/* Userspace should not be able to register out-of-bounds IPAs */
VM_BUG_ON(fault_ipa >= KVM_PHYS_SIZE);
+ if (fault_status == FSC_ACCESS) {
+ handle_access_fault(vcpu, fault_ipa);
+ ret = 1;
+ goto out_unlock;
+ }
+
ret = user_mem_abort(vcpu, fault_ipa, memslot, hva, fault_status);
if (ret == 0)
ret = 1;
return ret;
}
-static void handle_hva_to_gpa(struct kvm *kvm,
- unsigned long start,
- unsigned long end,
- void (*handler)(struct kvm *kvm,
- gpa_t gpa, void *data),
- void *data)
+static int handle_hva_to_gpa(struct kvm *kvm,
+ unsigned long start,
+ unsigned long end,
+ int (*handler)(struct kvm *kvm,
+ gpa_t gpa, void *data),
+ void *data)
{
struct kvm_memslots *slots;
struct kvm_memory_slot *memslot;
+ int ret = 0;
slots = kvm_memslots(kvm);
for (; gfn < gfn_end; ++gfn) {
gpa_t gpa = gfn << PAGE_SHIFT;
- handler(kvm, gpa, data);
+ ret |= handler(kvm, gpa, data);
}
}
+
+ return ret;
}
-static void kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, void *data)
+static int kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, void *data)
{
unmap_stage2_range(kvm, gpa, PAGE_SIZE);
+ return 0;
}
int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
return 0;
}
-static void kvm_set_spte_handler(struct kvm *kvm, gpa_t gpa, void *data)
+static int kvm_set_spte_handler(struct kvm *kvm, gpa_t gpa, void *data)
{
pte_t *pte = (pte_t *)data;
* through this calling path.
*/
stage2_set_pte(kvm, NULL, gpa, pte, 0);
+ return 0;
}
handle_hva_to_gpa(kvm, hva, end, &kvm_set_spte_handler, &stage2_pte);
}
+static int kvm_age_hva_handler(struct kvm *kvm, gpa_t gpa, void *data)
+{
+ pmd_t *pmd;
+ pte_t *pte;
+
+ pmd = stage2_get_pmd(kvm, NULL, gpa);
+ if (!pmd || pmd_none(*pmd)) /* Nothing there */
+ return 0;
+
+ if (kvm_pmd_huge(*pmd)) { /* THP, HugeTLB */
+ if (pmd_young(*pmd)) {
+ *pmd = pmd_mkold(*pmd);
+ return 1;
+ }
+
+ return 0;
+ }
+
+ pte = pte_offset_kernel(pmd, gpa);
+ if (pte_none(*pte))
+ return 0;
+
+ if (pte_young(*pte)) {
+ *pte = pte_mkold(*pte); /* Just a page... */
+ return 1;
+ }
+
+ return 0;
+}
+
+static int kvm_test_age_hva_handler(struct kvm *kvm, gpa_t gpa, void *data)
+{
+ pmd_t *pmd;
+ pte_t *pte;
+
+ pmd = stage2_get_pmd(kvm, NULL, gpa);
+ if (!pmd || pmd_none(*pmd)) /* Nothing there */
+ return 0;
+
+ if (kvm_pmd_huge(*pmd)) /* THP, HugeTLB */
+ return pmd_young(*pmd);
+
+ pte = pte_offset_kernel(pmd, gpa);
+ if (!pte_none(*pte)) /* Just a page... */
+ return pte_young(*pte);
+
+ return 0;
+}
+
+int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
+{
+ trace_kvm_age_hva(start, end);
+ return handle_hva_to_gpa(kvm, start, end, kvm_age_hva_handler, NULL);
+}
+
+int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
+{
+ trace_kvm_test_age_hva(hva);
+ return handle_hva_to_gpa(kvm, hva, hva, kvm_test_age_hva_handler, NULL);
+}
+
void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu)
{
mmu_free_memory_cache(&vcpu->arch.mmu_page_cache);
__entry->hxfar, __entry->vcpu_pc)
);
+TRACE_EVENT(kvm_access_fault,
+ TP_PROTO(unsigned long ipa),
+ TP_ARGS(ipa),
+
+ TP_STRUCT__entry(
+ __field( unsigned long, ipa )
+ ),
+
+ TP_fast_assign(
+ __entry->ipa = ipa;
+ ),
+
+ TP_printk("IPA: %lx", __entry->ipa)
+);
+
TRACE_EVENT(kvm_irq_line,
TP_PROTO(unsigned int type, int vcpu_idx, int irq_num, int level),
TP_ARGS(type, vcpu_idx, irq_num, level),
TP_printk("mmu notifier set pte hva: %#08lx", __entry->hva)
);
+TRACE_EVENT(kvm_age_hva,
+ TP_PROTO(unsigned long start, unsigned long end),
+ TP_ARGS(start, end),
+
+ TP_STRUCT__entry(
+ __field( unsigned long, start )
+ __field( unsigned long, end )
+ ),
+
+ TP_fast_assign(
+ __entry->start = start;
+ __entry->end = end;
+ ),
+
+ TP_printk("mmu notifier age hva: %#08lx -- %#08lx",
+ __entry->start, __entry->end)
+);
+
+TRACE_EVENT(kvm_test_age_hva,
+ TP_PROTO(unsigned long hva),
+ TP_ARGS(hva),
+
+ TP_STRUCT__entry(
+ __field( unsigned long, hva )
+ ),
+
+ TP_fast_assign(
+ __entry->hva = hva;
+ ),
+
+ TP_printk("mmu notifier test age hva: %#08lx", __entry->hva)
+);
+
TRACE_EVENT(kvm_hvc,
TP_PROTO(unsigned long vcpu_pc, unsigned long r0, unsigned long imm),
TP_ARGS(vcpu_pc, r0, imm),
static struct pci_bus __init *
dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)
{
- struct pci_bus *bus;
-
- if (nr < num_pcie_ports) {
- bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
- &sys->resources);
- } else {
- bus = NULL;
+ if (nr >= num_pcie_ports) {
BUG();
+ return NULL;
}
- return bus;
+ return pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
+ &sys->resources);
}
static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
exynos_map_io();
}
+/*
+ * Apparently, these SoCs are not able to wake-up from suspend using
+ * the PMU. Too bad. Should they suddenly become capable of such a
+ * feat, the matches below should be moved to suspend.c.
+ */
static const struct of_device_id exynos_dt_pmu_match[] = {
- { .compatible = "samsung,exynos3250-pmu" },
- { .compatible = "samsung,exynos4210-pmu" },
- { .compatible = "samsung,exynos4212-pmu" },
- { .compatible = "samsung,exynos4412-pmu" },
- { .compatible = "samsung,exynos4415-pmu" },
- { .compatible = "samsung,exynos5250-pmu" },
{ .compatible = "samsung,exynos5260-pmu" },
{ .compatible = "samsung,exynos5410-pmu" },
- { .compatible = "samsung,exynos5420-pmu" },
{ /*sentinel*/ },
};
np = of_find_matching_node(NULL, exynos_dt_pmu_match);
if (np)
pmu_base_addr = of_iomap(np, 0);
-
- if (!pmu_base_addr)
- panic("failed to find exynos pmu register\n");
}
static void __init exynos_init_irq(void)
#include <linux/syscore_ops.h>
#include <linux/cpu_pm.h>
#include <linux/io.h>
-#include <linux/irqchip/arm-gic.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of_address.h>
#include <linux/err.h>
#include <linux/regulator/machine.h>
#define EXYNOS5420_CPU_STATE 0x28
/**
- * struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
- * @hwirq: Hardware IRQ signal of the GIC
+ * struct exynos_wkup_irq - PMU IRQ to mask mapping
+ * @hwirq: Hardware IRQ signal of the PMU
* @mask: Mask in PMU wake-up mask register
*/
struct exynos_wkup_irq {
};
static const struct exynos_wkup_irq exynos4_wkup_irq[] = {
- { 76, BIT(1) }, /* RTC alarm */
- { 77, BIT(2) }, /* RTC tick */
+ { 44, BIT(1) }, /* RTC alarm */
+ { 45, BIT(2) }, /* RTC tick */
{ /* sentinel */ },
};
static const struct exynos_wkup_irq exynos5250_wkup_irq[] = {
- { 75, BIT(1) }, /* RTC alarm */
- { 76, BIT(2) }, /* RTC tick */
+ { 43, BIT(1) }, /* RTC alarm */
+ { 44, BIT(2) }, /* RTC tick */
{ /* sentinel */ },
};
return -ENOENT;
}
+static struct irq_chip exynos_pmu_chip = {
+ .name = "PMU",
+ .irq_eoi = irq_chip_eoi_parent,
+ .irq_mask = irq_chip_mask_parent,
+ .irq_unmask = irq_chip_unmask_parent,
+ .irq_retrigger = irq_chip_retrigger_hierarchy,
+ .irq_set_wake = exynos_irq_set_wake,
+#ifdef CONFIG_SMP
+ .irq_set_affinity = irq_chip_set_affinity_parent,
+#endif
+};
+
+static int exynos_pmu_domain_xlate(struct irq_domain *domain,
+ struct device_node *controller,
+ const u32 *intspec,
+ unsigned int intsize,
+ unsigned long *out_hwirq,
+ unsigned int *out_type)
+{
+ if (domain->of_node != controller)
+ return -EINVAL; /* Shouldn't happen, really... */
+ if (intsize != 3)
+ return -EINVAL; /* Not GIC compliant */
+ if (intspec[0] != 0)
+ return -EINVAL; /* No PPI should point to this domain */
+
+ *out_hwirq = intspec[1];
+ *out_type = intspec[2];
+ return 0;
+}
+
+static int exynos_pmu_domain_alloc(struct irq_domain *domain,
+ unsigned int virq,
+ unsigned int nr_irqs, void *data)
+{
+ struct of_phandle_args *args = data;
+ struct of_phandle_args parent_args;
+ irq_hw_number_t hwirq;
+ int i;
+
+ if (args->args_count != 3)
+ return -EINVAL; /* Not GIC compliant */
+ if (args->args[0] != 0)
+ return -EINVAL; /* No PPI should point to this domain */
+
+ hwirq = args->args[1];
+
+ for (i = 0; i < nr_irqs; i++)
+ irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
+ &exynos_pmu_chip, NULL);
+
+ parent_args = *args;
+ parent_args.np = domain->parent->of_node;
+ return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &parent_args);
+}
+
+static struct irq_domain_ops exynos_pmu_domain_ops = {
+ .xlate = exynos_pmu_domain_xlate,
+ .alloc = exynos_pmu_domain_alloc,
+ .free = irq_domain_free_irqs_common,
+};
+
+static int __init exynos_pmu_irq_init(struct device_node *node,
+ struct device_node *parent)
+{
+ struct irq_domain *parent_domain, *domain;
+
+ if (!parent) {
+ pr_err("%s: no parent, giving up\n", node->full_name);
+ return -ENODEV;
+ }
+
+ parent_domain = irq_find_host(parent);
+ if (!parent_domain) {
+ pr_err("%s: unable to obtain parent domain\n", node->full_name);
+ return -ENXIO;
+ }
+
+ pmu_base_addr = of_iomap(node, 0);
+
+ if (!pmu_base_addr) {
+ pr_err("%s: failed to find exynos pmu register\n",
+ node->full_name);
+ return -ENOMEM;
+ }
+
+ domain = irq_domain_add_hierarchy(parent_domain, 0, 0,
+ node, &exynos_pmu_domain_ops,
+ NULL);
+ if (!domain) {
+ iounmap(pmu_base_addr);
+ return -ENOMEM;
+ }
+
+ return 0;
+}
+
+#define EXYNOS_PMU_IRQ(symbol, name) OF_DECLARE_2(irqchip, symbol, name, exynos_pmu_irq_init)
+
+EXYNOS_PMU_IRQ(exynos3250_pmu_irq, "samsung,exynos3250-pmu");
+EXYNOS_PMU_IRQ(exynos4210_pmu_irq, "samsung,exynos4210-pmu");
+EXYNOS_PMU_IRQ(exynos4212_pmu_irq, "samsung,exynos4212-pmu");
+EXYNOS_PMU_IRQ(exynos4412_pmu_irq, "samsung,exynos4412-pmu");
+EXYNOS_PMU_IRQ(exynos4415_pmu_irq, "samsung,exynos4415-pmu");
+EXYNOS_PMU_IRQ(exynos5250_pmu_irq, "samsung,exynos5250-pmu");
+EXYNOS_PMU_IRQ(exynos5420_pmu_irq, "samsung,exynos5420-pmu");
+
static int exynos_cpu_do_idle(void)
{
/* issue the standby signal into the pm unit. */
void __init exynos_pm_init(void)
{
const struct of_device_id *match;
+ struct device_node *np;
u32 tmp;
- of_find_matching_node_and_match(NULL, exynos_pmu_of_device_ids, &match);
- if (!match) {
+ np = of_find_matching_node_and_match(NULL, exynos_pmu_of_device_ids, &match);
+ if (!np) {
pr_err("Failed to find PMU node\n");
return;
}
- pm_data = (struct exynos_pm_data *) match->data;
- /* Platform-specific GIC callback */
- gic_arch_extn.irq_set_wake = exynos_irq_set_wake;
+ if (WARN_ON(!of_find_property(np, "interrupt-controller", NULL)))
+ pr_warn("Outdated DT detected, suspend/resume will NOT work\n");
+
+ pm_data = (struct exynos_pm_data *) match->data;
/* All wakeup disable */
tmp = pmu_raw_readl(S5P_WAKEUP_MASK);
config SOC_VF610
bool "Vybrid Family VF610 support"
+ select IRQ_DOMAIN_HIERARCHY
select ARM_GIC
select PINCTRL_VF610
select PL310_ERRATA_769419 if CACHE_L2X0
static struct pci_bus __init *
mv78xx0_pcie_scan_bus(int nr, struct pci_sys_data *sys)
{
- struct pci_bus *bus;
-
- if (nr < num_pcie_ports) {
- bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
- &sys->resources);
- } else {
- bus = NULL;
+ if (nr >= num_pcie_ports) {
BUG();
+ return NULL;
}
- return bus;
+ return pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
+ &sys->resources);
}
static int __init mv78xx0_pcie_map_irq(const struct pci_dev *dev, u8 slot,
#include <linux/cpuidle.h>
#include <linux/cpu_pm.h>
#include <linux/export.h>
-#include <linux/clockchips.h>
+#include <linux/tick.h>
#include <asm/cpuidle.h>
#include <asm/proc-fns.h>
{
struct idle_statedata *cx = state_ptr + index;
u32 mpuss_can_lose_context = 0;
- int cpu_id = smp_processor_id();
/*
* CPU0 has to wait and stay ON until CPU1 is OFF state.
mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) &&
(cx->mpu_logic_state == PWRDM_POWER_OFF);
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu_id);
+ tick_broadcast_enter();
/*
* Call idle CPU PM enter notifier chain so that
if (dev->cpu == 0 && mpuss_can_lose_context)
cpu_cluster_pm_exit();
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu_id);
+ tick_broadcast_exit();
fail:
cpuidle_coupled_parallel_barrier(dev, &abort_barrier);
*/
static void omap_setup_broadcast_timer(void *arg)
{
- int cpu = smp_processor_id();
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ON, &cpu);
+ tick_broadcast_enable();
}
static struct cpuidle_driver omap4_idle_driver = {
static inline void omap_hsmmc_mux(struct omap_hsmmc_platform_data
*mmc_controller, int controller_nr)
{
- if (gpio_is_valid(mmc_controller->switch_pin) &&
- (mmc_controller->switch_pin < OMAP_MAX_GPIO_LINES))
- omap_mux_init_gpio(mmc_controller->switch_pin,
+ if (gpio_is_valid(mmc_controller->gpio_cd) &&
+ (mmc_controller->gpio_cd < OMAP_MAX_GPIO_LINES))
+ omap_mux_init_gpio(mmc_controller->gpio_cd,
+ OMAP_PIN_INPUT_PULLUP);
+ if (gpio_is_valid(mmc_controller->gpio_cod) &&
+ (mmc_controller->gpio_cod < OMAP_MAX_GPIO_LINES))
+ omap_mux_init_gpio(mmc_controller->gpio_cod,
OMAP_PIN_INPUT_PULLUP);
if (gpio_is_valid(mmc_controller->gpio_wp) &&
(mmc_controller->gpio_wp < OMAP_MAX_GPIO_LINES))
mmc->internal_clock = !c->ext_clock;
mmc->reg_offset = 0;
- mmc->switch_pin = c->gpio_cd;
+ if (c->cover_only) {
+ /* detect if mobile phone cover removed */
+ mmc->gpio_cd = -EINVAL;
+ mmc->gpio_cod = c->gpio_cd;
+ } else {
+ /* card detect pin on the mmc socket itself */
+ mmc->gpio_cd = c->gpio_cd;
+ mmc->gpio_cod = -EINVAL;
+ }
mmc->gpio_wp = c->gpio_wp;
mmc->remux = c->remux;
mmc->init_card = c->init_card;
- if (c->cover_only)
- mmc->cover = 1;
-
if (c->nonremovable)
mmc->nonremovable = 1;
if (!mmc_pdata)
continue;
- mmc_pdata->switch_pin = c->gpio_cd;
+ if (c->cover_only) {
+ /* detect if mobile phone cover removed */
+ mmc_pdata->gpio_cd = -EINVAL;
+ mmc_pdata->gpio_cod = c->gpio_cd;
+ } else {
+ /* card detect pin on the mmc socket itself */
+ mmc_pdata->gpio_cd = c->gpio_cd;
+ mmc_pdata->gpio_cod = -EINVAL;
+ }
mmc_pdata->gpio_wp = c->gpio_wp;
res = omap_device_register(pdev);
#include <linux/init.h>
#include <linux/io.h>
#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/cpu.h>
#include <linux/notifier.h>
#include <linux/cpu_pm.h>
-#include <linux/irqchip/arm-gic.h>
#include "omap-wakeupgen.h"
#include "omap-secure.h"
static inline int _wakeupgen_get_irq_info(u32 irq, u32 *bit_posn, u8 *reg_index)
{
- unsigned int spi_irq;
-
- /*
- * PPIs and SGIs are not supported.
- */
- if (irq < OMAP44XX_IRQ_GIC_START)
- return -EINVAL;
-
- /*
- * Subtract the GIC offset.
- */
- spi_irq = irq - OMAP44XX_IRQ_GIC_START;
- if (spi_irq > MAX_IRQS) {
- pr_err("omap wakeupGen: Invalid IRQ%d\n", irq);
- return -EINVAL;
- }
-
/*
* Each WakeupGen register controls 32 interrupt.
* i.e. 1 bit per SPI IRQ
*/
- *reg_index = spi_irq >> 5;
- *bit_posn = spi_irq %= 32;
+ *reg_index = irq >> 5;
+ *bit_posn = irq %= 32;
return 0;
}
raw_spin_lock_irqsave(&wakeupgen_lock, flags);
_wakeupgen_clear(d->hwirq, irq_target_cpu[d->hwirq]);
raw_spin_unlock_irqrestore(&wakeupgen_lock, flags);
+ irq_chip_mask_parent(d);
}
/*
raw_spin_lock_irqsave(&wakeupgen_lock, flags);
_wakeupgen_set(d->hwirq, irq_target_cpu[d->hwirq]);
raw_spin_unlock_irqrestore(&wakeupgen_lock, flags);
+ irq_chip_unmask_parent(d);
}
#ifdef CONFIG_HOTPLUG_CPU
return omap_secure_apis;
}
+static struct irq_chip wakeupgen_chip = {
+ .name = "WUGEN",
+ .irq_eoi = irq_chip_eoi_parent,
+ .irq_mask = wakeupgen_mask,
+ .irq_unmask = wakeupgen_unmask,
+ .irq_retrigger = irq_chip_retrigger_hierarchy,
+ .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND,
+#ifdef CONFIG_SMP
+ .irq_set_affinity = irq_chip_set_affinity_parent,
+#endif
+};
+
+static int wakeupgen_domain_xlate(struct irq_domain *domain,
+ struct device_node *controller,
+ const u32 *intspec,
+ unsigned int intsize,
+ unsigned long *out_hwirq,
+ unsigned int *out_type)
+{
+ if (domain->of_node != controller)
+ return -EINVAL; /* Shouldn't happen, really... */
+ if (intsize != 3)
+ return -EINVAL; /* Not GIC compliant */
+ if (intspec[0] != 0)
+ return -EINVAL; /* No PPI should point to this domain */
+
+ *out_hwirq = intspec[1];
+ *out_type = intspec[2];
+ return 0;
+}
+
+static int wakeupgen_domain_alloc(struct irq_domain *domain,
+ unsigned int virq,
+ unsigned int nr_irqs, void *data)
+{
+ struct of_phandle_args *args = data;
+ struct of_phandle_args parent_args;
+ irq_hw_number_t hwirq;
+ int i;
+
+ if (args->args_count != 3)
+ return -EINVAL; /* Not GIC compliant */
+ if (args->args[0] != 0)
+ return -EINVAL; /* No PPI should point to this domain */
+
+ hwirq = args->args[1];
+ if (hwirq >= MAX_IRQS)
+ return -EINVAL; /* Can't deal with this */
+
+ for (i = 0; i < nr_irqs; i++)
+ irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
+ &wakeupgen_chip, NULL);
+
+ parent_args = *args;
+ parent_args.np = domain->parent->of_node;
+ return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &parent_args);
+}
+
+static struct irq_domain_ops wakeupgen_domain_ops = {
+ .xlate = wakeupgen_domain_xlate,
+ .alloc = wakeupgen_domain_alloc,
+ .free = irq_domain_free_irqs_common,
+};
+
/*
* Initialise the wakeupgen module.
*/
-int __init omap_wakeupgen_init(void)
+static int __init wakeupgen_init(struct device_node *node,
+ struct device_node *parent)
{
+ struct irq_domain *parent_domain, *domain;
int i;
unsigned int boot_cpu = smp_processor_id();
u32 val;
+ if (!parent) {
+ pr_err("%s: no parent, giving up\n", node->full_name);
+ return -ENODEV;
+ }
+
+ parent_domain = irq_find_host(parent);
+ if (!parent_domain) {
+ pr_err("%s: unable to obtain parent domain\n", node->full_name);
+ return -ENXIO;
+ }
/* Not supported on OMAP4 ES1.0 silicon */
if (omap_rev() == OMAP4430_REV_ES1_0) {
WARN(1, "WakeupGen: Not supported on OMAP4430 ES1.0\n");
}
/* Static mapping, never released */
- wakeupgen_base = ioremap(OMAP_WKUPGEN_BASE, SZ_4K);
+ wakeupgen_base = of_iomap(node, 0);
if (WARN_ON(!wakeupgen_base))
return -ENOMEM;
max_irqs = AM43XX_IRQS;
}
+ domain = irq_domain_add_hierarchy(parent_domain, 0, max_irqs,
+ node, &wakeupgen_domain_ops,
+ NULL);
+ if (!domain) {
+ iounmap(wakeupgen_base);
+ return -ENOMEM;
+ }
+
/* Clear all IRQ bitmasks at wakeupGen level */
for (i = 0; i < irq_banks; i++) {
wakeupgen_writel(0, i, CPU0_ID);
wakeupgen_writel(0, i, CPU1_ID);
}
- /*
- * Override GIC architecture specific functions to add
- * OMAP WakeupGen interrupt controller along with GIC
- */
- gic_arch_extn.irq_mask = wakeupgen_mask;
- gic_arch_extn.irq_unmask = wakeupgen_unmask;
- gic_arch_extn.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE;
-
/*
* FIXME: Add support to set_smp_affinity() once the core
* GIC code has necessary hooks in place.
return 0;
}
+
+/*
+ * We cannot use the IRQCHIP_DECLARE macro that lives in
+ * drivers/irqchip, so we're forced to roll our own. Not very nice.
+ */
+OF_DECLARE_2(irqchip, ti_wakeupgen, "ti,omap4-wugen-mpu", wakeupgen_init);
#define OMAP_TIMESTAMPCYCLELO 0xc08
#define OMAP_TIMESTAMPCYCLEHI 0xc0c
-extern int __init omap_wakeupgen_init(void);
extern void __iomem *omap_get_wakeupgen_base(void);
extern int omap_secure_apis_support(void);
#endif
#include <linux/of_platform.h>
#include <linux/export.h>
#include <linux/irqchip/arm-gic.h>
-#include <linux/irqchip/irq-crossbar.h>
#include <linux/of_address.h>
#include <linux/reboot.h>
#include <linux/genalloc.h>
}
omap_early_initcall(omap4_sar_ram_init);
-static const struct of_device_id gic_match[] = {
- { .compatible = "arm,cortex-a9-gic", },
- { .compatible = "arm,cortex-a15-gic", },
+static const struct of_device_id intc_match[] = {
+ { .compatible = "ti,omap4-wugen-mpu", },
+ { .compatible = "ti,omap5-wugen-mpu", },
{ },
};
-static struct device_node *gic_node;
+static struct device_node *intc_node;
unsigned int omap4_xlate_irq(unsigned int hwirq)
{
struct of_phandle_args irq_data;
unsigned int irq;
- if (!gic_node)
- gic_node = of_find_matching_node(NULL, gic_match);
+ if (!intc_node)
+ intc_node = of_find_matching_node(NULL, intc_match);
- if (WARN_ON(!gic_node))
+ if (WARN_ON(!intc_node))
return hwirq;
- irq_data.np = gic_node;
+ irq_data.np = intc_node;
irq_data.args_count = 3;
irq_data.args[0] = 0;
irq_data.args[1] = hwirq - OMAP44XX_IRQ_GIC_START;
{
struct device_node *np;
+ intc_node = of_find_matching_node(NULL, intc_match);
+ if (WARN_ON(!intc_node)) {
+ pr_err("No WUGEN found in DT, system will misbehave.\n");
+ pr_err("UPDATE YOUR DEVICE TREE!\n");
+ }
+
/* Extract GIC distributor and TWD bases for OMAP4460 ROM Errata WA */
if (!cpu_is_omap446x())
goto skip_errata_init;
WARN_ON(!twd_base);
skip_errata_init:
- omap_wakeupgen_init();
-#ifdef CONFIG_IRQ_CROSSBAR
- irqcrossbar_init();
-#endif
irqchip_init();
}
int __init orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys)
{
- int ret = 0;
-
vga_base = ORION5X_PCIE_MEM_PHYS_BASE;
if (nr == 0) {
orion_pcie_set_local_bus_nr(PCIE_BASE, sys->busnr);
- ret = pcie_setup(sys);
- } else if (nr == 1 && !orion5x_pci_disabled) {
+ return pcie_setup(sys);
+ }
+
+ if (nr == 1 && !orion5x_pci_disabled) {
orion5x_pci_set_bus_nr(sys->busnr);
- ret = pci_setup(sys);
+ return pci_setup(sys);
}
- return ret;
+ return 0;
}
struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys)
{
- struct pci_bus *bus;
+ if (nr == 0)
+ return pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
+ &sys->resources);
- if (nr == 0) {
- bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
- &sys->resources);
- } else if (nr == 1 && !orion5x_pci_disabled) {
- bus = pci_scan_root_bus(NULL, sys->busnr, &pci_ops, sys,
- &sys->resources);
- } else {
- bus = NULL;
- BUG();
- }
+ if (nr == 1 && !orion5x_pci_disabled)
+ return pci_scan_root_bus(NULL, sys->busnr, &pci_ops, sys,
+ &sys->resources);
- return bus;
+ BUG();
+ return NULL;
}
int __init orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
struct power_supply *psy =
power_supply_get_by_name(raumfeld_power_supplicants[0]);
- if (psy)
+ if (psy) {
power_supply_set_battery_charged(psy);
+ power_supply_put(psy);
+ }
}
static int raumfeld_power_resume(void)
return IRQ_HANDLED;
}
-static int sh73a0_set_wake(struct irq_data *data, unsigned int on)
-{
- return 0; /* always allow wakeup */
-}
-
#define PINTER0_PHYS 0xe69000a0
#define PINTER1_PHYS 0xe69000a4
#define PINTER0_VIRT IOMEM(0xe69000a0)
void __iomem *gic_cpu_base = IOMEM(0xf0000100);
void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
+ gic_set_irqchip_flags(IRQCHIP_SKIP_SET_WAKE);
gic_init(0, 29, gic_dist_base, gic_cpu_base);
- gic_arch_extn.irq_set_wake = sh73a0_set_wake;
register_intc_controller(&intcs_desc);
register_intc_controller(&intc_pint0_desc);
}
#ifdef CONFIG_USE_OF
-static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
-{
- return 0; /* always allow wakeup */
-}
-
void __init r8a7779_init_irq_dt(void)
{
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
void __iomem *gic_dist_base = ioremap_nocache(0xf0001000, 0x1000);
void __iomem *gic_cpu_base = ioremap_nocache(0xf0000100, 0x1000);
#endif
- gic_arch_extn.irq_set_wake = r8a7779_set_wake;
+ gic_set_irqchip_flags(IRQCHIP_SKIP_SET_WAKE);
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
gic_init(0, 29, gic_dist_base, gic_cpu_base);
*/
#include <asm/firmware.h>
-#include <linux/clockchips.h>
+#include <linux/tick.h>
#include <linux/cpuidle.h>
#include <linux/cpu_pm.h>
#include <linux/kernel.h>
tegra_set_cpu_in_lp2();
cpu_pm_enter();
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
+ tick_broadcast_enter();
call_firmware_op(prepare_idle);
if (call_firmware_op(do_idle, 0) == -ENOSYS)
cpu_suspend(0, tegra30_sleep_cpu_secondary_finish);
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
+ tick_broadcast_exit();
cpu_pm_exit();
tegra_clear_cpu_in_lp2();
*/
#include <linux/clk/tegra.h>
-#include <linux/clockchips.h>
+#include <linux/tick.h>
#include <linux/cpuidle.h>
#include <linux/cpu_pm.h>
#include <linux/kernel.h>
if (tegra20_reset_cpu_1() || !tegra_cpu_rail_off_ready())
return false;
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
+ tick_broadcast_enter();
tegra_idle_lp2_last();
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
+ tick_broadcast_exit();
if (cpu_online(1))
tegra20_wake_cpu1_from_reset();
struct cpuidle_driver *drv,
int index)
{
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
+ tick_broadcast_enter();
cpu_suspend(0, tegra20_sleep_cpu_secondary_finish);
tegra20_cpu_clear_resettable();
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
+ tick_broadcast_exit();
return true;
}
*/
#include <linux/clk/tegra.h>
-#include <linux/clockchips.h>
+#include <linux/tick.h>
#include <linux/cpuidle.h>
#include <linux/cpu_pm.h>
#include <linux/kernel.h>
return false;
}
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
+ tick_broadcast_enter();
tegra_idle_lp2_last();
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
+ tick_broadcast_exit();
return true;
}
struct cpuidle_driver *drv,
int index)
{
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
+ tick_broadcast_enter();
smp_wmb();
cpu_suspend(0, tegra30_sleep_cpu_secondary_finish);
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
+ tick_broadcast_exit();
return true;
}
#define TEGRA_ARM_INT_DIST_BASE 0x50041000
#define TEGRA_ARM_INT_DIST_SIZE SZ_4K
-#define TEGRA_PRIMARY_ICTLR_BASE 0x60004000
-#define TEGRA_PRIMARY_ICTLR_SIZE SZ_64
-
-#define TEGRA_SECONDARY_ICTLR_BASE 0x60004100
-#define TEGRA_SECONDARY_ICTLR_SIZE SZ_64
-
-#define TEGRA_TERTIARY_ICTLR_BASE 0x60004200
-#define TEGRA_TERTIARY_ICTLR_SIZE SZ_64
-
-#define TEGRA_QUATERNARY_ICTLR_BASE 0x60004300
-#define TEGRA_QUATERNARY_ICTLR_SIZE SZ_64
-
-#define TEGRA_QUINARY_ICTLR_BASE 0x60004400
-#define TEGRA_QUINARY_ICTLR_SIZE SZ_64
-
#define TEGRA_TMR1_BASE 0x60005000
#define TEGRA_TMR1_SIZE SZ_8
#include "board.h"
#include "iomap.h"
-#define ICTLR_CPU_IEP_VFIQ 0x08
-#define ICTLR_CPU_IEP_FIR 0x14
-#define ICTLR_CPU_IEP_FIR_SET 0x18
-#define ICTLR_CPU_IEP_FIR_CLR 0x1c
-
-#define ICTLR_CPU_IER 0x20
-#define ICTLR_CPU_IER_SET 0x24
-#define ICTLR_CPU_IER_CLR 0x28
-#define ICTLR_CPU_IEP_CLASS 0x2C
-
-#define ICTLR_COP_IER 0x30
-#define ICTLR_COP_IER_SET 0x34
-#define ICTLR_COP_IER_CLR 0x38
-#define ICTLR_COP_IEP_CLASS 0x3c
-
-#define FIRST_LEGACY_IRQ 32
-#define TEGRA_MAX_NUM_ICTLRS 5
-
#define SGI_MASK 0xFFFF
-static int num_ictlrs;
-
-static void __iomem *ictlr_reg_base[] = {
- IO_ADDRESS(TEGRA_PRIMARY_ICTLR_BASE),
- IO_ADDRESS(TEGRA_SECONDARY_ICTLR_BASE),
- IO_ADDRESS(TEGRA_TERTIARY_ICTLR_BASE),
- IO_ADDRESS(TEGRA_QUATERNARY_ICTLR_BASE),
- IO_ADDRESS(TEGRA_QUINARY_ICTLR_BASE),
-};
-
#ifdef CONFIG_PM_SLEEP
-static u32 cop_ier[TEGRA_MAX_NUM_ICTLRS];
-static u32 cop_iep[TEGRA_MAX_NUM_ICTLRS];
-static u32 cpu_ier[TEGRA_MAX_NUM_ICTLRS];
-static u32 cpu_iep[TEGRA_MAX_NUM_ICTLRS];
-
-static u32 ictlr_wake_mask[TEGRA_MAX_NUM_ICTLRS];
static void __iomem *tegra_gic_cpu_base;
#endif
return false;
}
-static inline void tegra_irq_write_mask(unsigned int irq, unsigned long reg)
-{
- void __iomem *base;
- u32 mask;
-
- BUG_ON(irq < FIRST_LEGACY_IRQ ||
- irq >= FIRST_LEGACY_IRQ + num_ictlrs * 32);
-
- base = ictlr_reg_base[(irq - FIRST_LEGACY_IRQ) / 32];
- mask = BIT((irq - FIRST_LEGACY_IRQ) % 32);
-
- __raw_writel(mask, base + reg);
-}
-
-static void tegra_mask(struct irq_data *d)
-{
- if (d->hwirq < FIRST_LEGACY_IRQ)
- return;
-
- tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IER_CLR);
-}
-
-static void tegra_unmask(struct irq_data *d)
-{
- if (d->hwirq < FIRST_LEGACY_IRQ)
- return;
-
- tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IER_SET);
-}
-
-static void tegra_ack(struct irq_data *d)
-{
- if (d->hwirq < FIRST_LEGACY_IRQ)
- return;
-
- tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IEP_FIR_CLR);
-}
-
-static void tegra_eoi(struct irq_data *d)
-{
- if (d->hwirq < FIRST_LEGACY_IRQ)
- return;
-
- tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IEP_FIR_CLR);
-}
-
-static int tegra_retrigger(struct irq_data *d)
-{
- if (d->hwirq < FIRST_LEGACY_IRQ)
- return 0;
-
- tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IEP_FIR_SET);
-
- return 1;
-}
-
#ifdef CONFIG_PM_SLEEP
-static int tegra_set_wake(struct irq_data *d, unsigned int enable)
-{
- u32 irq = d->hwirq;
- u32 index, mask;
-
- if (irq < FIRST_LEGACY_IRQ ||
- irq >= FIRST_LEGACY_IRQ + num_ictlrs * 32)
- return -EINVAL;
-
- index = ((irq - FIRST_LEGACY_IRQ) / 32);
- mask = BIT((irq - FIRST_LEGACY_IRQ) % 32);
- if (enable)
- ictlr_wake_mask[index] |= mask;
- else
- ictlr_wake_mask[index] &= ~mask;
-
- return 0;
-}
-
-static int tegra_legacy_irq_suspend(void)
-{
- unsigned long flags;
- int i;
-
- local_irq_save(flags);
- for (i = 0; i < num_ictlrs; i++) {
- void __iomem *ictlr = ictlr_reg_base[i];
- /* Save interrupt state */
- cpu_ier[i] = readl_relaxed(ictlr + ICTLR_CPU_IER);
- cpu_iep[i] = readl_relaxed(ictlr + ICTLR_CPU_IEP_CLASS);
- cop_ier[i] = readl_relaxed(ictlr + ICTLR_COP_IER);
- cop_iep[i] = readl_relaxed(ictlr + ICTLR_COP_IEP_CLASS);
-
- /* Disable COP interrupts */
- writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR);
-
- /* Disable CPU interrupts */
- writel_relaxed(~0ul, ictlr + ICTLR_CPU_IER_CLR);
-
- /* Enable the wakeup sources of ictlr */
- writel_relaxed(ictlr_wake_mask[i], ictlr + ICTLR_CPU_IER_SET);
- }
- local_irq_restore(flags);
-
- return 0;
-}
-
-static void tegra_legacy_irq_resume(void)
-{
- unsigned long flags;
- int i;
-
- local_irq_save(flags);
- for (i = 0; i < num_ictlrs; i++) {
- void __iomem *ictlr = ictlr_reg_base[i];
- writel_relaxed(cpu_iep[i], ictlr + ICTLR_CPU_IEP_CLASS);
- writel_relaxed(~0ul, ictlr + ICTLR_CPU_IER_CLR);
- writel_relaxed(cpu_ier[i], ictlr + ICTLR_CPU_IER_SET);
- writel_relaxed(cop_iep[i], ictlr + ICTLR_COP_IEP_CLASS);
- writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR);
- writel_relaxed(cop_ier[i], ictlr + ICTLR_COP_IER_SET);
- }
- local_irq_restore(flags);
-}
-
-static struct syscore_ops tegra_legacy_irq_syscore_ops = {
- .suspend = tegra_legacy_irq_suspend,
- .resume = tegra_legacy_irq_resume,
-};
-
-int tegra_legacy_irq_syscore_init(void)
-{
- register_syscore_ops(&tegra_legacy_irq_syscore_ops);
-
- return 0;
-}
-
static int tegra_gic_notifier(struct notifier_block *self,
unsigned long cmd, void *v)
{
cpu_pm_register_notifier(&tegra_gic_notifier_block);
}
#else
-#define tegra_set_wake NULL
static void tegra114_gic_cpu_pm_registration(void) { }
#endif
+static const struct of_device_id tegra_ictlr_match[] __initconst = {
+ { .compatible = "nvidia,tegra20-ictlr" },
+ { .compatible = "nvidia,tegra30-ictlr" },
+ { }
+};
+
void __init tegra_init_irq(void)
{
- int i;
- void __iomem *distbase;
-
- distbase = IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE);
- num_ictlrs = readl_relaxed(distbase + GIC_DIST_CTR) & 0x1f;
-
- if (num_ictlrs > ARRAY_SIZE(ictlr_reg_base)) {
- WARN(1, "Too many (%d) interrupt controllers found. Maximum is %d.",
- num_ictlrs, ARRAY_SIZE(ictlr_reg_base));
- num_ictlrs = ARRAY_SIZE(ictlr_reg_base);
- }
-
- for (i = 0; i < num_ictlrs; i++) {
- void __iomem *ictlr = ictlr_reg_base[i];
- writel(~0, ictlr + ICTLR_CPU_IER_CLR);
- writel(0, ictlr + ICTLR_CPU_IEP_CLASS);
- }
-
- gic_arch_extn.irq_ack = tegra_ack;
- gic_arch_extn.irq_eoi = tegra_eoi;
- gic_arch_extn.irq_mask = tegra_mask;
- gic_arch_extn.irq_unmask = tegra_unmask;
- gic_arch_extn.irq_retrigger = tegra_retrigger;
- gic_arch_extn.irq_set_wake = tegra_set_wake;
- gic_arch_extn.flags = IRQCHIP_MASK_ON_SUSPEND;
-
- /*
- * Check if there is a devicetree present, since the GIC will be
- * initialized elsewhere under DT.
- */
- if (!of_have_populated_dt())
- gic_init(0, 29, distbase,
- IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
+ if (WARN_ON(!of_find_matching_node(NULL, tegra_ictlr_match)))
+ pr_warn("Outdated DT detected, suspend/resume will NOT work\n");
tegra114_gic_cpu_pm_registration();
}
bool tegra_pending_sgi(void);
-#ifdef CONFIG_PM_SLEEP
-int tegra_legacy_irq_syscore_init(void);
-#else
-static inline int tegra_legacy_irq_syscore_init(void) { return 0; }
-#endif
-
#endif
{
tegra_init_irq();
irqchip_init();
- tegra_legacy_irq_syscore_init();
}
static void __init tegra_dt_init(void)
*/
void __init ux500_init_irq(void)
{
- gic_arch_extn.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
+ gic_set_irqchip_flags(IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND);
irqchip_init();
/*
static void __init zynq_irq_init(void)
{
- gic_arch_extn.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
+ gic_set_irqchip_flags(IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND);
irqchip_init();
}
if (!iommu)
return false;
+ /*
+ * currently arm_iommu_create_mapping() takes a max of size_t
+ * for size param. So check this limit for now.
+ */
+ if (size > SIZE_MAX)
+ return false;
+
mapping = arm_iommu_create_mapping(dev->bus, dma_base, size);
if (IS_ERR(mapping)) {
pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n",
find_limits(&min, &max_low, &max_high);
+ early_memtest((phys_addr_t)min << PAGE_SHIFT,
+ (phys_addr_t)max_low << PAGE_SHIFT);
+
/*
* Sparsemem tries to allocate bootmem in memory_present(),
* so must be done after the fixed reservations
return addr;
}
+unsigned long arch_mmap_rnd(void)
+{
+ unsigned long rnd;
+
+ /* 8 bits of randomness in 20 address space bits */
+ rnd = (unsigned long)get_random_int() % (1 << 8);
+
+ return rnd << PAGE_SHIFT;
+}
+
void arch_pick_mmap_layout(struct mm_struct *mm)
{
unsigned long random_factor = 0UL;
- /* 8 bits of randomness in 20 address space bits */
- if ((current->flags & PF_RANDOMIZE) &&
- !(current->personality & ADDR_NO_RANDOMIZE))
- random_factor = (get_random_int() % (1 << 8)) << PAGE_SHIFT;
+ if (current->flags & PF_RANDOMIZE)
+ random_factor = arch_mmap_rnd();
if (mmap_is_legacy()) {
mm->mmap_base = TASK_UNMAPPED_BASE + random_factor;
}
/**
- * omap_read_persistent_clock - Return time from a persistent clock.
+ * omap_read_persistent_clock64 - Return time from a persistent clock.
*
* Reads the time from a source which isn't disabled during PM, the
* 32k sync timer. Convert the cycles elapsed since last read into
- * nsecs and adds to a monotonically increasing timespec.
+ * nsecs and adds to a monotonically increasing timespec64.
*/
-static struct timespec persistent_ts;
+static struct timespec64 persistent_ts;
static cycles_t cycles;
static unsigned int persistent_mult, persistent_shift;
-static DEFINE_SPINLOCK(read_persistent_clock_lock);
-static void omap_read_persistent_clock(struct timespec *ts)
+static void omap_read_persistent_clock64(struct timespec64 *ts)
{
unsigned long long nsecs;
cycles_t last_cycles;
- unsigned long flags;
-
- spin_lock_irqsave(&read_persistent_clock_lock, flags);
last_cycles = cycles;
cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;
nsecs = clocksource_cyc2ns(cycles - last_cycles,
persistent_mult, persistent_shift);
- timespec_add_ns(&persistent_ts, nsecs);
+ timespec64_add_ns(&persistent_ts, nsecs);
*ts = persistent_ts;
-
- spin_unlock_irqrestore(&read_persistent_clock_lock, flags);
}
/**
/*
* 120000 rough estimate from the calculations in
- * __clocksource_updatefreq_scale.
+ * __clocksource_update_freq_scale.
*/
clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
32768, NSEC_PER_SEC, 120000);
}
sched_clock_register(omap_32k_read_sched_clock, 32, 32768);
- register_persistent_clock(NULL, omap_read_persistent_clock);
+ register_persistent_clock(NULL, omap_read_persistent_clock64);
pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n");
return 0;
config ARM64
def_bool y
- select ARCH_BINFMT_ELF_RANDOMIZE_PIE
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
+ select ARCH_HAS_ELF_RANDOMIZE
select ARCH_HAS_GCOV_PROFILE_ALL
select ARCH_HAS_SG_CHAIN
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
config FIX_EARLYCON_MEM
def_bool y
+config PGTABLE_LEVELS
+ int
+ default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
+ default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
+ default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
+ default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
+
source "init/Kconfig"
source "kernel/Kconfig.freezer"
default 42 if ARM64_VA_BITS_42
default 48 if ARM64_VA_BITS_48
-config ARM64_PGTABLE_LEVELS
- int
- default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
- default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
- default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
- default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
-
config CPU_BIG_ENDIAN
bool "Build big-endian kernel"
help
* the loader. We need to make sure that it is out of the way of the program
* that it will "exec", and that there is sufficient room for the brk.
*/
-extern unsigned long randomize_et_dyn(unsigned long base);
#define ELF_ET_DYN_BASE (2 * TASK_SIZE_64 / 3)
/*
#define STACK_RND_MASK (0x3ffff >> (PAGE_SHIFT - 12))
#endif
-struct mm_struct;
-extern unsigned long arch_randomize_brk(struct mm_struct *mm);
-#define arch_randomize_brk arch_randomize_brk
-
#ifdef CONFIG_COMPAT
#ifdef __AARCH64EB__
#define ESR_ELx_FSC (0x3F)
#define ESR_ELx_FSC_TYPE (0x3C)
#define ESR_ELx_FSC_EXTABT (0x10)
+#define ESR_ELx_FSC_ACCESS (0x08)
#define ESR_ELx_FSC_FAULT (0x04)
#define ESR_ELx_FSC_PERM (0x0C)
#define ESR_ELx_CV (UL(1) << 24)
*/
#ifndef __ASM_JUMP_LABEL_H
#define __ASM_JUMP_LABEL_H
+
+#ifndef __ASSEMBLY__
+
#include <linux/types.h>
#include <asm/insn.h>
-#ifdef __KERNEL__
-
#define JUMP_LABEL_NOP_SIZE AARCH64_INSN_SIZE
static __always_inline bool arch_static_branch(struct static_key *key)
return true;
}
-#endif /* __KERNEL__ */
-
typedef u64 jump_label_t;
struct jump_entry {
jump_label_t key;
};
+#endif /* __ASSEMBLY__ */
#endif /* __ASM_JUMP_LABEL_H */
/* For compatibility with fault code shared with 32-bit */
#define FSC_FAULT ESR_ELx_FSC_FAULT
+#define FSC_ACCESS ESR_ELx_FSC_ACCESS
#define FSC_PERM ESR_ELx_FSC_PERM
/* Hyp Prefetch Fault Address Register (HPFAR/HDFAR) */
#include <asm/kvm_asm.h>
#include <asm/kvm_mmio.h>
+#define __KVM_HAVE_ARCH_INTC_INITIALIZED
+
#if defined(CONFIG_KVM_ARM_MAX_VCPUS)
#define KVM_MAX_VCPUS CONFIG_KVM_ARM_MAX_VCPUS
#else
int kvm_unmap_hva_range(struct kvm *kvm,
unsigned long start, unsigned long end);
void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
+int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
+int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
/* We do not have shadow page tables, hence the empty hooks */
-static inline int kvm_age_hva(struct kvm *kvm, unsigned long start,
- unsigned long end)
-{
- return 0;
-}
-
-static inline int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
-{
- return 0;
-}
-
static inline void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
unsigned long address)
{
bool sign_extend;
};
-/*
- * The in-kernel MMIO emulation code wants to use a copy of run->mmio,
- * which is an anonymous type. Use our own type instead.
- */
-struct kvm_exit_mmio {
- phys_addr_t phys_addr;
- u8 data[8];
- u32 len;
- bool is_write;
- void *private;
-};
-
-static inline void kvm_prepare_mmio(struct kvm_run *run,
- struct kvm_exit_mmio *mmio)
-{
- run->mmio.phys_addr = mmio->phys_addr;
- run->mmio.len = mmio->len;
- run->mmio.is_write = mmio->is_write;
- memcpy(run->mmio.data, mmio->data, mmio->len);
- run->exit_reason = KVM_EXIT_MMIO;
-}
-
int kvm_handle_mmio_return(struct kvm_vcpu *vcpu, struct kvm_run *run);
int io_mem_abort(struct kvm_vcpu *vcpu, struct kvm_run *run,
phys_addr_t fault_ipa);
/*
* If we are concatenating first level stage-2 page tables, we would have less
* than or equal to 16 pointers in the fake PGD, because that's what the
- * architecture allows. In this case, (4 - CONFIG_ARM64_PGTABLE_LEVELS)
+ * architecture allows. In this case, (4 - CONFIG_PGTABLE_LEVELS)
* represents the first level for the host, and we add 1 to go to the next
* level (which uses contatenation) for the stage-2 tables.
*/
#if PTRS_PER_S2_PGD <= 16
-#define KVM_PREALLOC_LEVEL (4 - CONFIG_ARM64_PGTABLE_LEVELS + 1)
+#define KVM_PREALLOC_LEVEL (4 - CONFIG_PGTABLE_LEVELS + 1)
#else
#define KVM_PREALLOC_LEVEL (0)
#endif
* for more information).
*/
#ifdef CONFIG_ARM64_64K_PAGES
-#define SWAPPER_PGTABLE_LEVELS (CONFIG_ARM64_PGTABLE_LEVELS)
+#define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS)
#else
-#define SWAPPER_PGTABLE_LEVELS (CONFIG_ARM64_PGTABLE_LEVELS - 1)
+#define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS - 1)
#endif
#define SWAPPER_DIR_SIZE (SWAPPER_PGTABLE_LEVELS * PAGE_SIZE)
#define PGALLOC_GFP (GFP_KERNEL | __GFP_NOTRACK | __GFP_REPEAT | __GFP_ZERO)
-#if CONFIG_ARM64_PGTABLE_LEVELS > 2
+#if CONFIG_PGTABLE_LEVELS > 2
static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
{
set_pud(pud, __pud(__pa(pmd) | PMD_TYPE_TABLE));
}
-#endif /* CONFIG_ARM64_PGTABLE_LEVELS > 2 */
+#endif /* CONFIG_PGTABLE_LEVELS > 2 */
-#if CONFIG_ARM64_PGTABLE_LEVELS > 3
+#if CONFIG_PGTABLE_LEVELS > 3
static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr)
{
set_pgd(pgd, __pgd(__pa(pud) | PUD_TYPE_TABLE));
}
-#endif /* CONFIG_ARM64_PGTABLE_LEVELS > 3 */
+#endif /* CONFIG_PGTABLE_LEVELS > 3 */
extern pgd_t *pgd_alloc(struct mm_struct *mm);
extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
/*
* PMD_SHIFT determines the size a level 2 page table entry can map.
*/
-#if CONFIG_ARM64_PGTABLE_LEVELS > 2
+#if CONFIG_PGTABLE_LEVELS > 2
#define PMD_SHIFT ((PAGE_SHIFT - 3) * 2 + 3)
#define PMD_SIZE (_AC(1, UL) << PMD_SHIFT)
#define PMD_MASK (~(PMD_SIZE-1))
/*
* PUD_SHIFT determines the size a level 1 page table entry can map.
*/
-#if CONFIG_ARM64_PGTABLE_LEVELS > 3
+#if CONFIG_PGTABLE_LEVELS > 3
#define PUD_SHIFT ((PAGE_SHIFT - 3) * 3 + 3)
#define PUD_SIZE (_AC(1, UL) << PUD_SHIFT)
#define PUD_MASK (~(PUD_SIZE-1))
* PGDIR_SHIFT determines the size a top-level page table entry can map
* (depending on the configuration, this level can be 0, 1 or 2).
*/
-#define PGDIR_SHIFT ((PAGE_SHIFT - 3) * CONFIG_ARM64_PGTABLE_LEVELS + 3)
+#define PGDIR_SHIFT ((PAGE_SHIFT - 3) * CONFIG_PGTABLE_LEVELS + 3)
#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
#define PGDIR_MASK (~(PGDIR_SIZE-1))
#define PTRS_PER_PGD (1 << (VA_BITS - PGDIR_SHIFT))
#define pte_val(x) ((x).pte)
#define __pte(x) ((pte_t) { (x) } )
-#if CONFIG_ARM64_PGTABLE_LEVELS > 2
+#if CONFIG_PGTABLE_LEVELS > 2
typedef struct { pmdval_t pmd; } pmd_t;
#define pmd_val(x) ((x).pmd)
#define __pmd(x) ((pmd_t) { (x) } )
#endif
-#if CONFIG_ARM64_PGTABLE_LEVELS > 3
+#if CONFIG_PGTABLE_LEVELS > 3
typedef struct { pudval_t pud; } pud_t;
#define pud_val(x) ((x).pud)
#define __pud(x) ((pud_t) { (x) } )
#define pte_val(x) (x)
#define __pte(x) (x)
-#if CONFIG_ARM64_PGTABLE_LEVELS > 2
+#if CONFIG_PGTABLE_LEVELS > 2
typedef pmdval_t pmd_t;
#define pmd_val(x) (x)
#define __pmd(x) (x)
#endif
-#if CONFIG_ARM64_PGTABLE_LEVELS > 3
+#if CONFIG_PGTABLE_LEVELS > 3
typedef pudval_t pud_t;
#define pud_val(x) (x)
#define __pud(x) (x)
#endif /* STRICT_MM_TYPECHECKS */
-#if CONFIG_ARM64_PGTABLE_LEVELS == 2
+#if CONFIG_PGTABLE_LEVELS == 2
#include <asm-generic/pgtable-nopmd.h>
-#elif CONFIG_ARM64_PGTABLE_LEVELS == 3
+#elif CONFIG_PGTABLE_LEVELS == 3
#include <asm-generic/pgtable-nopud.h>
#endif
*/
#define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot)
-#if CONFIG_ARM64_PGTABLE_LEVELS > 2
+#if CONFIG_PGTABLE_LEVELS > 2
#define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
#define pud_page(pud) pfn_to_page(__phys_to_pfn(pud_val(pud) & PHYS_MASK))
-#endif /* CONFIG_ARM64_PGTABLE_LEVELS > 2 */
+#endif /* CONFIG_PGTABLE_LEVELS > 2 */
-#if CONFIG_ARM64_PGTABLE_LEVELS > 3
+#if CONFIG_PGTABLE_LEVELS > 3
#define pud_ERROR(pud) __pud_error(__FILE__, __LINE__, pud_val(pud))
#define pgd_page(pgd) pfn_to_page(__phys_to_pfn(pgd_val(pgd) & PHYS_MASK))
-#endif /* CONFIG_ARM64_PGTABLE_LEVELS > 3 */
+#endif /* CONFIG_PGTABLE_LEVELS > 3 */
#define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
tlb_remove_entry(tlb, pte);
}
-#if CONFIG_ARM64_PGTABLE_LEVELS > 2
+#if CONFIG_PGTABLE_LEVELS > 2
static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
unsigned long addr)
{
}
#endif
-#if CONFIG_ARM64_PGTABLE_LEVELS > 3
+#if CONFIG_PGTABLE_LEVELS > 3
static inline void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pudp,
unsigned long addr)
{
/* Highest supported SPI, from VGIC_NR_IRQS */
#define KVM_ARM_IRQ_GIC_MAX 127
+/* One single KVM irqchip, ie. the VGIC */
+#define KVM_NR_IRQCHIPS 1
+
/* PSCI interface */
#define KVM_PSCI_FN_BASE 0x95c1ba5e
#define KVM_PSCI_FN(n) (KVM_PSCI_FN_BASE + (n))
* Disallow per-task kernel breakpoints since these would
* complicate the stepping code.
*/
- if (info->ctrl.privilege == AARCH64_BREAKPOINT_EL1 && bp->hw.bp_target)
+ if (info->ctrl.privilege == AARCH64_BREAKPOINT_EL1 && bp->hw.target)
return -EINVAL;
return 0;
void update_vsyscall(struct timekeeper *tk)
{
struct timespec xtime_coarse;
- u32 use_syscall = strcmp(tk->tkr.clock->name, "arch_sys_counter");
+ u32 use_syscall = strcmp(tk->tkr_mono.clock->name, "arch_sys_counter");
++vdso_data->tb_seq_count;
smp_wmb();
vdso_data->wtm_clock_nsec = tk->wall_to_monotonic.tv_nsec;
if (!use_syscall) {
- vdso_data->cs_cycle_last = tk->tkr.cycle_last;
+ vdso_data->cs_cycle_last = tk->tkr_mono.cycle_last;
vdso_data->xtime_clock_sec = tk->xtime_sec;
- vdso_data->xtime_clock_nsec = tk->tkr.xtime_nsec;
- vdso_data->cs_mult = tk->tkr.mult;
- vdso_data->cs_shift = tk->tkr.shift;
+ vdso_data->xtime_clock_nsec = tk->tkr_mono.xtime_nsec;
+ vdso_data->cs_mult = tk->tkr_mono.mult;
+ vdso_data->cs_shift = tk->tkr_mono.shift;
}
smp_wmb();
config KVM
bool "Kernel-based Virtual Machine (KVM) support"
+ depends on OF
select MMU_NOTIFIER
select PREEMPT_NOTIFIERS
select ANON_INODES
select HAVE_KVM_ARCH_TLB_FLUSH_ALL
select KVM_MMIO
select KVM_ARM_HOST
- select KVM_ARM_VGIC
- select KVM_ARM_TIMER
select KVM_GENERIC_DIRTYLOG_READ_PROTECT
select SRCU
+ select HAVE_KVM_EVENTFD
+ select HAVE_KVM_IRQFD
---help---
Support hosting virtualized guest machines.
large, so only choose a reasonable number that you expect to
actually use.
-config KVM_ARM_VGIC
- bool
- depends on KVM_ARM_HOST && OF
- select HAVE_KVM_IRQCHIP
- ---help---
- Adds support for a hardware assisted, in-kernel GIC emulation.
-
-config KVM_ARM_TIMER
- bool
- depends on KVM_ARM_VGIC
- ---help---
- Adds support for the Architected Timers in virtual machines.
-
endif # VIRTUALIZATION
# Makefile for Kernel-based Virtual Machine module
#
-ccflags-y += -Ivirt/kvm -Iarch/arm64/kvm
+ccflags-y += -Iarch/arm64/kvm
CFLAGS_arm.o := -I.
CFLAGS_mmu.o := -I.
obj-$(CONFIG_KVM_ARM_HOST) += kvm.o
-kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o
+kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o $(KVM)/eventfd.o
kvm-$(CONFIG_KVM_ARM_HOST) += $(ARM)/arm.o $(ARM)/mmu.o $(ARM)/mmio.o
kvm-$(CONFIG_KVM_ARM_HOST) += $(ARM)/psci.o $(ARM)/perf.o
kvm-$(CONFIG_KVM_ARM_HOST) += hyp.o hyp-init.o handle_exit.o
kvm-$(CONFIG_KVM_ARM_HOST) += guest.o reset.o sys_regs.o sys_regs_generic_v8.o
-kvm-$(CONFIG_KVM_ARM_VGIC) += $(KVM)/arm/vgic.o
-kvm-$(CONFIG_KVM_ARM_VGIC) += $(KVM)/arm/vgic-v2.o
-kvm-$(CONFIG_KVM_ARM_VGIC) += $(KVM)/arm/vgic-v2-emul.o
-kvm-$(CONFIG_KVM_ARM_VGIC) += vgic-v2-switch.o
-kvm-$(CONFIG_KVM_ARM_VGIC) += $(KVM)/arm/vgic-v3.o
-kvm-$(CONFIG_KVM_ARM_VGIC) += $(KVM)/arm/vgic-v3-emul.o
-kvm-$(CONFIG_KVM_ARM_VGIC) += vgic-v3-switch.o
-kvm-$(CONFIG_KVM_ARM_TIMER) += $(KVM)/arm/arch_timer.o
+kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/vgic.o
+kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/vgic-v2.o
+kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/vgic-v2-emul.o
+kvm-$(CONFIG_KVM_ARM_HOST) += vgic-v2-switch.o
+kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/vgic-v3.o
+kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/vgic-v3-emul.o
+kvm-$(CONFIG_KVM_ARM_HOST) += vgic-v3-switch.o
+kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/arch_timer.o
min = PFN_UP(memblock_start_of_DRAM());
max = PFN_DOWN(memblock_end_of_DRAM());
+ early_memtest(min << PAGE_SHIFT, max << PAGE_SHIFT);
+
/*
* Sparsemem tries to allocate bootmem in memory_present(), so must be
* done after the fixed reservations.
return sysctl_legacy_va_layout;
}
-static unsigned long mmap_rnd(void)
+unsigned long arch_mmap_rnd(void)
{
- unsigned long rnd = 0;
+ unsigned long rnd;
- if (current->flags & PF_RANDOMIZE)
- rnd = (long)get_random_int() & STACK_RND_MASK;
+ rnd = (unsigned long)get_random_int() & STACK_RND_MASK;
return rnd << PAGE_SHIFT;
}
-static unsigned long mmap_base(void)
+static unsigned long mmap_base(unsigned long rnd)
{
unsigned long gap = rlimit(RLIMIT_STACK);
else if (gap > MAX_GAP)
gap = MAX_GAP;
- return PAGE_ALIGN(STACK_TOP - gap - mmap_rnd());
+ return PAGE_ALIGN(STACK_TOP - gap - rnd);
}
/*
*/
void arch_pick_mmap_layout(struct mm_struct *mm)
{
+ unsigned long random_factor = 0UL;
+
+ if (current->flags & PF_RANDOMIZE)
+ random_factor = arch_mmap_rnd();
+
/*
* Fall back to the standard layout if the personality bit is set, or
* if the expected stack growth is unlimited:
*/
if (mmap_is_legacy()) {
- mm->mmap_base = TASK_UNMAPPED_BASE;
+ mm->mmap_base = TASK_UNMAPPED_BASE + random_factor;
mm->get_unmapped_area = arch_get_unmapped_area;
} else {
- mm->mmap_base = mmap_base();
+ mm->mmap_base = mmap_base(random_factor);
mm->get_unmapped_area = arch_get_unmapped_area_topdown;
}
}
#endif /* CONFIG_SPARSEMEM_VMEMMAP */
static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss;
-#if CONFIG_ARM64_PGTABLE_LEVELS > 2
+#if CONFIG_PGTABLE_LEVELS > 2
static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss;
#endif
-#if CONFIG_ARM64_PGTABLE_LEVELS > 3
+#if CONFIG_PGTABLE_LEVELS > 3
static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss;
#endif
the loader. We need to make sure that it is out of the way of the program
that it will "exec", and that there is sufficient room for the brk. */
-#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
+#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
/* This yields a mask that user programs can use to figure out what
return 0;
}
-static DECLARE_COMPLETION(cpu_killed);
-
int __cpu_die(unsigned int cpu)
{
- return wait_for_completion_timeout(&cpu_killed, 5000);
+ return cpu_wait_death(cpu, 5);
}
void cpu_die(void)
{
- complete(&cpu_killed);
+ (void)cpu_report_death();
atomic_dec(&init_mm.mm_users);
atomic_dec(&init_mm.mm_count);
*/
usp -= 8;
- set_fs(USER_DS);
regs->pc = pc;
regs->sp = usp;
regs->tsr |= 0x40; /* set user mode */
struct sigframe __user *frame;
int rsig, sig = ksig->sig;
- set_fs(USER_DS);
-
frame = get_sigframe(ksig, sizeof(*frame));
if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
struct rt_sigframe __user *frame;
int rsig, sig = ksig->sig;
- set_fs(USER_DS);
-
frame = get_sigframe(ksig, sizeof(*frame));
if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
int __init pcibios_init(void)
{
+ struct pci_bus *bus;
struct pci_ops *dir = NULL;
LIST_HEAD(resources);
printk("PCI: Probing PCI hardware\n");
pci_add_resource(&resources, &pci_ioport_resource);
pci_add_resource(&resources, &pci_iomem_resource);
- pci_scan_root_bus(NULL, 0, pci_root_ops, NULL, &resources);
+ bus = pci_scan_root_bus(NULL, 0, pci_root_ops, NULL, &resources);
pcibios_irq_init();
pcibios_fixup_irqs();
pcibios_resource_survey();
+ if (!bus)
+ return 0;
+ pci_bus_add_devices(bus);
return 0;
}
*/
void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp)
{
- /* Set to run with user-mode data segmentation */
- set_fs(USER_DS);
/* We want to zero all data-containing registers. Is this overkill? */
memset(regs, 0, sizeof(*regs));
/* We might want to also zero all Processor registers here */
+config PGTABLE_LEVELS
+ int "Page Table Levels" if !IA64_PAGE_SIZE_64KB
+ range 3 4 if !IA64_PAGE_SIZE_64KB
+ default 3
+
source "init/Kconfig"
source "kernel/Kconfig.freezer"
endchoice
-choice
- prompt "Page Table Levels"
- default PGTABLE_3
-
-config PGTABLE_3
- bool "3 Levels"
-
-config PGTABLE_4
- depends on !IA64_PAGE_SIZE_64KB
- bool "4 Levels"
-
-endchoice
-
if IA64_HP_SIM
config HZ
default 32
*/
typedef struct { unsigned long pte; } pte_t;
typedef struct { unsigned long pmd; } pmd_t;
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
typedef struct { unsigned long pud; } pud_t;
#endif
typedef struct { unsigned long pgd; } pgd_t;
# define pte_val(x) ((x).pte)
# define pmd_val(x) ((x).pmd)
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
# define pud_val(x) ((x).pud)
#endif
# define pgd_val(x) ((x).pgd)
quicklist_free(0, NULL, pgd);
}
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
static inline void
pgd_populate(struct mm_struct *mm, pgd_t * pgd_entry, pud_t * pud)
{
quicklist_free(0, NULL, pud);
}
#define __pud_free_tlb(tlb, pud, address) pud_free((tlb)->mm, pud)
-#endif /* CONFIG_PGTABLE_4 */
+#endif /* CONFIG_PGTABLE_LEVELS == 4 */
static inline void
pud_populate(struct mm_struct *mm, pud_t * pud_entry, pmd_t * pmd)
#define PMD_MASK (~(PMD_SIZE-1))
#define PTRS_PER_PMD (1UL << (PTRS_PER_PTD_SHIFT))
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
/*
* Definitions for second level:
*
*
* PGDIR_SHIFT determines what a first-level page table entry can map.
*/
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
#define PGDIR_SHIFT (PUD_SHIFT + (PTRS_PER_PTD_SHIFT))
#else
#define PGDIR_SHIFT (PMD_SHIFT + (PTRS_PER_PTD_SHIFT))
#define __S111 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RWX)
#define pgd_ERROR(e) printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
#define pud_ERROR(e) printk("%s:%d: bad pud %016lx.\n", __FILE__, __LINE__, pud_val(e))
#endif
#define pmd_ERROR(e) printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e))
#define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & _PFN_MASK))
#define pud_page(pud) virt_to_page((pud_val(pud) + PAGE_OFFSET))
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
#define pgd_none(pgd) (!pgd_val(pgd))
#define pgd_bad(pgd) (!ia64_phys_addr_valid(pgd_val(pgd)))
#define pgd_present(pgd) (pgd_val(pgd) != 0UL)
here. */
#define pgd_offset_gate(mm, addr) pgd_offset_k(addr)
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
/* Find an entry in the second-level page table.. */
#define pud_offset(dir,addr) \
((pud_t *) pgd_page_vaddr(*(dir)) + (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1)))
#define __HAVE_ARCH_PGD_OFFSET_GATE
-#ifndef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 3
#include <asm-generic/pgtable-nopud.h>
#endif
#include <asm-generic/pgtable.h>
(p6) dep r17=r18,r19,3,(PAGE_SHIFT-3) // r17=pgd_offset for region 5
(p7) dep r17=r18,r17,3,(PAGE_SHIFT-6) // r17=pgd_offset for region[0-4]
cmp.eq p7,p6=0,r21 // unused address bits all zeroes?
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
shr.u r28=r22,PUD_SHIFT // shift pud index into position
#else
shr.u r18=r22,PMD_SHIFT // shift pmd index into position
ld8 r17=[r17] // get *pgd (may be 0)
;;
(p7) cmp.eq p6,p7=r17,r0 // was pgd_present(*pgd) == NULL?
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
dep r28=r28,r17,3,(PAGE_SHIFT-3) // r28=pud_offset(pgd,addr)
;;
shr.u r18=r22,PMD_SHIFT // shift pmd index into position
*/
ld8 r25=[r21] // read *pte again
ld8 r26=[r17] // read *pmd again
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
ld8 r19=[r28] // read *pud again
#endif
cmp.ne p6,p7=r0,r0
;;
cmp.ne.or.andcm p6,p7=r26,r20 // did *pmd change
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
cmp.ne.or.andcm p6,p7=r19,r29 // did *pud change
#endif
mov r27=PAGE_SHIFT<<2
(p6) dep r17=r18,r19,3,(PAGE_SHIFT-3) // r17=pgd_offset for region 5
(p7) dep r17=r18,r17,3,(PAGE_SHIFT-6) // r17=pgd_offset for region[0-4]
cmp.eq p7,p6=0,r21 // unused address bits all zeroes?
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
shr.u r18=r22,PUD_SHIFT // shift pud index into position
#else
shr.u r18=r22,PMD_SHIFT // shift pmd index into position
(p7) cmp.eq p6,p7=r17,r0 // was pgd_present(*pgd) == NULL?
dep r17=r18,r17,3,(PAGE_SHIFT-3) // r17=p[u|m]d_offset(pgd,addr)
;;
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
(p7) ld8 r17=[r17] // get *pud (may be 0)
shr.u r18=r22,PMD_SHIFT // shift pmd index into position
;;
VMCOREINFO_OFFSET(node_memblk_s, start_paddr);
VMCOREINFO_OFFSET(node_memblk_s, size);
#endif
-#ifdef CONFIG_PGTABLE_3
+#if CONFIG_PGTABLE_LEVELS == 3
VMCOREINFO_CONFIG(PGTABLE_3);
-#elif defined(CONFIG_PGTABLE_4)
+#elif CONFIG_PGTABLE_LEVELS == 4
VMCOREINFO_CONFIG(PGTABLE_4);
#endif
}
if (bus == NULL) {
kfree(res);
kfree(controller);
+ return;
}
+ pci_bus_add_devices(bus);
}
/*
regs->r2 = (unsigned long)&frame->uc;
regs->bpc = (unsigned long)ksig->ka.sa.sa_handler;
- set_fs(USER_DS);
-
#if DEBUG_SIG
printk("SIG deliver (%s:%d): sp=%p pc=%p\n",
current->comm, current->pid, frame, regs->pc);
default 1000 if CLEOPATRA
default 100
+config PGTABLE_LEVELS
+ default 2 if SUN3 || COLDFIRE
+ default 3
+
source "init/Kconfig"
source "kernel/Kconfig.freezer"
schedule_timeout(msecs_to_jiffies(200));
rootbus = pci_scan_bus(0, &mcf_pci_ops, NULL);
+ if (!rootbus)
+ return -ENODEV;
+
rootbus->resource[0] = &mcf_pci_io;
rootbus->resource[1] = &mcf_pci_mem;
pci_fixup_irqs(pci_common_swizzle, mcf_pci_map_irq);
pci_bus_size_bridges(rootbus);
pci_bus_assign_resources(rootbus);
+ pci_bus_add_devices(rootbus);
return 0;
}
CONFIG_DLM=m
CONFIG_MAGIC_SYSRQ=y
CONFIG_ASYNC_RAID6_TEST=m
+CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m
CONFIG_TEST_KSTRTOX=m
+CONFIG_TEST_RHASHTABLE=m
CONFIG_TEST_LKM=m
CONFIG_TEST_USER_COPY=m
CONFIG_TEST_BPF=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
+CONFIG_CRYPTO_USER_API_RNG=m
# CONFIG_CRYPTO_HW is not set
CONFIG_XZ_DEC_TEST=m
CONFIG_DLM=m
CONFIG_MAGIC_SYSRQ=y
CONFIG_ASYNC_RAID6_TEST=m
+CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m
CONFIG_TEST_KSTRTOX=m
+CONFIG_TEST_RHASHTABLE=m
CONFIG_TEST_LKM=m
CONFIG_TEST_USER_COPY=m
CONFIG_TEST_BPF=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
+CONFIG_CRYPTO_USER_API_RNG=m
# CONFIG_CRYPTO_HW is not set
CONFIG_XZ_DEC_TEST=m
CONFIG_DLM=m
CONFIG_MAGIC_SYSRQ=y
CONFIG_ASYNC_RAID6_TEST=m
+CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m
CONFIG_TEST_KSTRTOX=m
+CONFIG_TEST_RHASHTABLE=m
CONFIG_TEST_LKM=m
CONFIG_TEST_USER_COPY=m
CONFIG_TEST_BPF=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
+CONFIG_CRYPTO_USER_API_RNG=m
# CONFIG_CRYPTO_HW is not set
CONFIG_XZ_DEC_TEST=m
CONFIG_DLM=m
CONFIG_MAGIC_SYSRQ=y
CONFIG_ASYNC_RAID6_TEST=m
+CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m
CONFIG_TEST_KSTRTOX=m
+CONFIG_TEST_RHASHTABLE=m
CONFIG_TEST_LKM=m
CONFIG_TEST_USER_COPY=m
CONFIG_TEST_BPF=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
+CONFIG_CRYPTO_USER_API_RNG=m
# CONFIG_CRYPTO_HW is not set
CONFIG_XZ_DEC_TEST=m
CONFIG_DLM=m
CONFIG_MAGIC_SYSRQ=y
CONFIG_ASYNC_RAID6_TEST=m
+CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m
CONFIG_TEST_KSTRTOX=m
+CONFIG_TEST_RHASHTABLE=m
CONFIG_TEST_LKM=m
CONFIG_TEST_USER_COPY=m
CONFIG_TEST_BPF=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
+CONFIG_CRYPTO_USER_API_RNG=m
# CONFIG_CRYPTO_HW is not set
CONFIG_XZ_DEC_TEST=m
CONFIG_DLM=m
CONFIG_MAGIC_SYSRQ=y
CONFIG_ASYNC_RAID6_TEST=m
+CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m
CONFIG_TEST_KSTRTOX=m
+CONFIG_TEST_RHASHTABLE=m
CONFIG_TEST_LKM=m
CONFIG_TEST_USER_COPY=m
CONFIG_TEST_BPF=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
+CONFIG_CRYPTO_USER_API_RNG=m
# CONFIG_CRYPTO_HW is not set
CONFIG_XZ_DEC_TEST=m
CONFIG_DLM=m
CONFIG_MAGIC_SYSRQ=y
CONFIG_ASYNC_RAID6_TEST=m
+CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m
CONFIG_TEST_KSTRTOX=m
+CONFIG_TEST_RHASHTABLE=m
CONFIG_TEST_LKM=m
CONFIG_TEST_USER_COPY=m
CONFIG_TEST_BPF=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
+CONFIG_CRYPTO_USER_API_RNG=m
# CONFIG_CRYPTO_HW is not set
CONFIG_XZ_DEC_TEST=m
CONFIG_DLM=m
CONFIG_MAGIC_SYSRQ=y
CONFIG_ASYNC_RAID6_TEST=m
+CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m
CONFIG_TEST_KSTRTOX=m
+CONFIG_TEST_RHASHTABLE=m
CONFIG_TEST_LKM=m
CONFIG_TEST_USER_COPY=m
CONFIG_TEST_BPF=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
+CONFIG_CRYPTO_USER_API_RNG=m
# CONFIG_CRYPTO_HW is not set
CONFIG_XZ_DEC_TEST=m
CONFIG_DLM=m
CONFIG_MAGIC_SYSRQ=y
CONFIG_ASYNC_RAID6_TEST=m
+CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m
CONFIG_TEST_KSTRTOX=m
+CONFIG_TEST_RHASHTABLE=m
CONFIG_TEST_LKM=m
CONFIG_TEST_USER_COPY=m
CONFIG_TEST_BPF=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
+CONFIG_CRYPTO_USER_API_RNG=m
# CONFIG_CRYPTO_HW is not set
CONFIG_XZ_DEC_TEST=m
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
-CONFIG_NE2000=m
+CONFIG_NE2000=y
# CONFIG_NET_VENDOR_QUALCOMM is not set
# CONFIG_NET_VENDOR_ROCKER is not set
# CONFIG_NET_VENDOR_SAMSUNG is not set
CONFIG_DLM=m
CONFIG_MAGIC_SYSRQ=y
CONFIG_ASYNC_RAID6_TEST=m
+CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m
CONFIG_TEST_KSTRTOX=m
+CONFIG_TEST_RHASHTABLE=m
CONFIG_TEST_LKM=m
CONFIG_TEST_USER_COPY=m
CONFIG_TEST_BPF=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
+CONFIG_CRYPTO_USER_API_RNG=m
# CONFIG_CRYPTO_HW is not set
CONFIG_XZ_DEC_TEST=m
CONFIG_DLM=m
CONFIG_MAGIC_SYSRQ=y
CONFIG_ASYNC_RAID6_TEST=m
+CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m
CONFIG_TEST_KSTRTOX=m
+CONFIG_TEST_RHASHTABLE=m
CONFIG_TEST_LKM=m
CONFIG_TEST_USER_COPY=m
CONFIG_TEST_BPF=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
+CONFIG_CRYPTO_USER_API_RNG=m
# CONFIG_CRYPTO_HW is not set
CONFIG_XZ_DEC_TEST=m
CONFIG_DLM=m
CONFIG_MAGIC_SYSRQ=y
CONFIG_ASYNC_RAID6_TEST=m
+CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m
CONFIG_TEST_KSTRTOX=m
+CONFIG_TEST_RHASHTABLE=m
CONFIG_TEST_LKM=m
CONFIG_TEST_USER_COPY=m
CONFIG_TEST_BPF=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
+CONFIG_CRYPTO_USER_API_RNG=m
# CONFIG_CRYPTO_HW is not set
CONFIG_XZ_DEC_TEST=m
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
*/
#ifndef mcfqspi_h
r = dev->resource + idx;
if (!r->start && r->end) {
- pr_err(KERN_ERR "PCI: Device %s not available because of resource collisions\n",
+ pr_err("PCI: Device %s not available because of resource collisions\n",
pci_name(dev));
return -EINVAL;
}
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
+GNU General Public License for more details. */
#define BITS_PER_UNIT 8
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
+GNU General Public License for more details. */
#define BITS_PER_UNIT 8
This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
+General Public License for more details. */
/* As a special exception, if you link this library with files
compiled with GCC to produce an executable, this does not cause
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
+GNU General Public License for more details. */
#define BITS_PER_UNIT 8
This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
+General Public License for more details. */
/* As a special exception, if you link this library with files
compiled with GCC to produce an executable, this does not cause
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
+GNU General Public License for more details. */
#ifdef CONFIG_CPU_HAS_NO_MULDIV64
This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
+General Public License for more details. */
/* As a special exception, if you link this library with files
compiled with GCC to produce an executable, this does not cause
This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
+General Public License for more details. */
/* As a special exception, if you link this library with files
compiled with GCC to produce an executable, this does not cause
This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
+General Public License for more details. */
/* As a special exception, if you link this library with files
compiled with GCC to produce an executable, this does not cause
/* Disable all interrupts. Unlike a VIA it looks like we */
/* do this by setting the source's interrupt level to zero. */
- for (i = 0; i <= OSS_NUM_SOURCES; i++) {
+ for (i = 0; i < OSS_NUM_SOURCES; i++)
oss->irq_level[i] = 0;
- }
}
/*
*/
#define start_thread(regs, pc, usp) do { \
unsigned int *argc = (unsigned int *) bprm->exec; \
- set_fs(USER_DS); \
current->thread.int_depth = 1; \
/* Force this process down to user land */ \
regs->ctx.SaveMask = TBICTX_PRIV_BIT; \
}
#ifdef CONFIG_HOTPLUG_CPU
-static DECLARE_COMPLETION(cpu_killed);
/*
* __cpu_disable runs on the processor to be shutdown.
*/
void __cpu_die(unsigned int cpu)
{
- if (!wait_for_completion_timeout(&cpu_killed, msecs_to_jiffies(1)))
+ if (!cpu_wait_death(cpu, 1))
pr_err("CPU%u: unable to kill\n", cpu);
}
local_irq_disable();
idle_task_exit();
- complete(&cpu_killed);
+ (void)cpu_report_death();
asm ("XOR TXENABLE, D0Re0,D0Re0\n");
}
/* Offset to handle microblaze rtid r14, 0 */
regs->pc = (unsigned long)ksig->ka.sa.sa_handler;
- set_fs(USER_DS);
-
#ifdef DEBUG_SIG
pr_info("SIG deliver (%s:%d): sp=%p pc=%08lx\n",
current->comm, current->pid, frame, regs->pc);
/* Call common code to handle resource allocation */
pcibios_resource_survey();
+ list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
+ if (hose->bus)
+ pci_bus_add_devices(hose->bus);
+ }
return 0;
}
select HAVE_KRETPROBES
select HAVE_DEBUG_KMEMLEAK
select HAVE_SYSCALL_TRACEPOINTS
- select ARCH_BINFMT_ELF_RANDOMIZE_PIE
+ select ARCH_HAS_ELF_RANDOMIZE
select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
select RTC_LIB if !MACH_LOONGSON
select GENERIC_ATOMIC64 if !64BIT
bool
default y
+config PGTABLE_LEVELS
+ int
+ default 3 if 64BIT && !PAGE_SIZE_64KB
+ default 2
+
source "init/Kconfig"
source "kernel/Kconfig.freezer"
.set push
SET_HARDFLOAT
cfc1 \tmp, fcr31
- swc1 $f0, THREAD_FPR0_LS64(\thread)
- swc1 $f1, THREAD_FPR1_LS64(\thread)
- swc1 $f2, THREAD_FPR2_LS64(\thread)
- swc1 $f3, THREAD_FPR3_LS64(\thread)
- swc1 $f4, THREAD_FPR4_LS64(\thread)
- swc1 $f5, THREAD_FPR5_LS64(\thread)
- swc1 $f6, THREAD_FPR6_LS64(\thread)
- swc1 $f7, THREAD_FPR7_LS64(\thread)
- swc1 $f8, THREAD_FPR8_LS64(\thread)
- swc1 $f9, THREAD_FPR9_LS64(\thread)
- swc1 $f10, THREAD_FPR10_LS64(\thread)
- swc1 $f11, THREAD_FPR11_LS64(\thread)
- swc1 $f12, THREAD_FPR12_LS64(\thread)
- swc1 $f13, THREAD_FPR13_LS64(\thread)
- swc1 $f14, THREAD_FPR14_LS64(\thread)
- swc1 $f15, THREAD_FPR15_LS64(\thread)
- swc1 $f16, THREAD_FPR16_LS64(\thread)
- swc1 $f17, THREAD_FPR17_LS64(\thread)
- swc1 $f18, THREAD_FPR18_LS64(\thread)
- swc1 $f19, THREAD_FPR19_LS64(\thread)
- swc1 $f20, THREAD_FPR20_LS64(\thread)
- swc1 $f21, THREAD_FPR21_LS64(\thread)
- swc1 $f22, THREAD_FPR22_LS64(\thread)
- swc1 $f23, THREAD_FPR23_LS64(\thread)
- swc1 $f24, THREAD_FPR24_LS64(\thread)
- swc1 $f25, THREAD_FPR25_LS64(\thread)
- swc1 $f26, THREAD_FPR26_LS64(\thread)
- swc1 $f27, THREAD_FPR27_LS64(\thread)
- swc1 $f28, THREAD_FPR28_LS64(\thread)
- swc1 $f29, THREAD_FPR29_LS64(\thread)
- swc1 $f30, THREAD_FPR30_LS64(\thread)
- swc1 $f31, THREAD_FPR31_LS64(\thread)
+ swc1 $f0, THREAD_FPR0(\thread)
+ swc1 $f1, THREAD_FPR1(\thread)
+ swc1 $f2, THREAD_FPR2(\thread)
+ swc1 $f3, THREAD_FPR3(\thread)
+ swc1 $f4, THREAD_FPR4(\thread)
+ swc1 $f5, THREAD_FPR5(\thread)
+ swc1 $f6, THREAD_FPR6(\thread)
+ swc1 $f7, THREAD_FPR7(\thread)
+ swc1 $f8, THREAD_FPR8(\thread)
+ swc1 $f9, THREAD_FPR9(\thread)
+ swc1 $f10, THREAD_FPR10(\thread)
+ swc1 $f11, THREAD_FPR11(\thread)
+ swc1 $f12, THREAD_FPR12(\thread)
+ swc1 $f13, THREAD_FPR13(\thread)
+ swc1 $f14, THREAD_FPR14(\thread)
+ swc1 $f15, THREAD_FPR15(\thread)
+ swc1 $f16, THREAD_FPR16(\thread)
+ swc1 $f17, THREAD_FPR17(\thread)
+ swc1 $f18, THREAD_FPR18(\thread)
+ swc1 $f19, THREAD_FPR19(\thread)
+ swc1 $f20, THREAD_FPR20(\thread)
+ swc1 $f21, THREAD_FPR21(\thread)
+ swc1 $f22, THREAD_FPR22(\thread)
+ swc1 $f23, THREAD_FPR23(\thread)
+ swc1 $f24, THREAD_FPR24(\thread)
+ swc1 $f25, THREAD_FPR25(\thread)
+ swc1 $f26, THREAD_FPR26(\thread)
+ swc1 $f27, THREAD_FPR27(\thread)
+ swc1 $f28, THREAD_FPR28(\thread)
+ swc1 $f29, THREAD_FPR29(\thread)
+ swc1 $f30, THREAD_FPR30(\thread)
+ swc1 $f31, THREAD_FPR31(\thread)
sw \tmp, THREAD_FCR31(\thread)
.set pop
.endm
.set push
SET_HARDFLOAT
lw \tmp, THREAD_FCR31(\thread)
- lwc1 $f0, THREAD_FPR0_LS64(\thread)
- lwc1 $f1, THREAD_FPR1_LS64(\thread)
- lwc1 $f2, THREAD_FPR2_LS64(\thread)
- lwc1 $f3, THREAD_FPR3_LS64(\thread)
- lwc1 $f4, THREAD_FPR4_LS64(\thread)
- lwc1 $f5, THREAD_FPR5_LS64(\thread)
- lwc1 $f6, THREAD_FPR6_LS64(\thread)
- lwc1 $f7, THREAD_FPR7_LS64(\thread)
- lwc1 $f8, THREAD_FPR8_LS64(\thread)
- lwc1 $f9, THREAD_FPR9_LS64(\thread)
- lwc1 $f10, THREAD_FPR10_LS64(\thread)
- lwc1 $f11, THREAD_FPR11_LS64(\thread)
- lwc1 $f12, THREAD_FPR12_LS64(\thread)
- lwc1 $f13, THREAD_FPR13_LS64(\thread)
- lwc1 $f14, THREAD_FPR14_LS64(\thread)
- lwc1 $f15, THREAD_FPR15_LS64(\thread)
- lwc1 $f16, THREAD_FPR16_LS64(\thread)
- lwc1 $f17, THREAD_FPR17_LS64(\thread)
- lwc1 $f18, THREAD_FPR18_LS64(\thread)
- lwc1 $f19, THREAD_FPR19_LS64(\thread)
- lwc1 $f20, THREAD_FPR20_LS64(\thread)
- lwc1 $f21, THREAD_FPR21_LS64(\thread)
- lwc1 $f22, THREAD_FPR22_LS64(\thread)
- lwc1 $f23, THREAD_FPR23_LS64(\thread)
- lwc1 $f24, THREAD_FPR24_LS64(\thread)
- lwc1 $f25, THREAD_FPR25_LS64(\thread)
- lwc1 $f26, THREAD_FPR26_LS64(\thread)
- lwc1 $f27, THREAD_FPR27_LS64(\thread)
- lwc1 $f28, THREAD_FPR28_LS64(\thread)
- lwc1 $f29, THREAD_FPR29_LS64(\thread)
- lwc1 $f30, THREAD_FPR30_LS64(\thread)
- lwc1 $f31, THREAD_FPR31_LS64(\thread)
+ lwc1 $f0, THREAD_FPR0(\thread)
+ lwc1 $f1, THREAD_FPR1(\thread)
+ lwc1 $f2, THREAD_FPR2(\thread)
+ lwc1 $f3, THREAD_FPR3(\thread)
+ lwc1 $f4, THREAD_FPR4(\thread)
+ lwc1 $f5, THREAD_FPR5(\thread)
+ lwc1 $f6, THREAD_FPR6(\thread)
+ lwc1 $f7, THREAD_FPR7(\thread)
+ lwc1 $f8, THREAD_FPR8(\thread)
+ lwc1 $f9, THREAD_FPR9(\thread)
+ lwc1 $f10, THREAD_FPR10(\thread)
+ lwc1 $f11, THREAD_FPR11(\thread)
+ lwc1 $f12, THREAD_FPR12(\thread)
+ lwc1 $f13, THREAD_FPR13(\thread)
+ lwc1 $f14, THREAD_FPR14(\thread)
+ lwc1 $f15, THREAD_FPR15(\thread)
+ lwc1 $f16, THREAD_FPR16(\thread)
+ lwc1 $f17, THREAD_FPR17(\thread)
+ lwc1 $f18, THREAD_FPR18(\thread)
+ lwc1 $f19, THREAD_FPR19(\thread)
+ lwc1 $f20, THREAD_FPR20(\thread)
+ lwc1 $f21, THREAD_FPR21(\thread)
+ lwc1 $f22, THREAD_FPR22(\thread)
+ lwc1 $f23, THREAD_FPR23(\thread)
+ lwc1 $f24, THREAD_FPR24(\thread)
+ lwc1 $f25, THREAD_FPR25(\thread)
+ lwc1 $f26, THREAD_FPR26(\thread)
+ lwc1 $f27, THREAD_FPR27(\thread)
+ lwc1 $f28, THREAD_FPR28(\thread)
+ lwc1 $f29, THREAD_FPR29(\thread)
+ lwc1 $f30, THREAD_FPR30(\thread)
+ lwc1 $f31, THREAD_FPR31(\thread)
ctc1 \tmp, fcr31
.set pop
.endm
.set push
SET_HARDFLOAT
cfc1 \tmp, fcr31
- sdc1 $f0, THREAD_FPR0_LS64(\thread)
- sdc1 $f2, THREAD_FPR2_LS64(\thread)
- sdc1 $f4, THREAD_FPR4_LS64(\thread)
- sdc1 $f6, THREAD_FPR6_LS64(\thread)
- sdc1 $f8, THREAD_FPR8_LS64(\thread)
- sdc1 $f10, THREAD_FPR10_LS64(\thread)
- sdc1 $f12, THREAD_FPR12_LS64(\thread)
- sdc1 $f14, THREAD_FPR14_LS64(\thread)
- sdc1 $f16, THREAD_FPR16_LS64(\thread)
- sdc1 $f18, THREAD_FPR18_LS64(\thread)
- sdc1 $f20, THREAD_FPR20_LS64(\thread)
- sdc1 $f22, THREAD_FPR22_LS64(\thread)
- sdc1 $f24, THREAD_FPR24_LS64(\thread)
- sdc1 $f26, THREAD_FPR26_LS64(\thread)
- sdc1 $f28, THREAD_FPR28_LS64(\thread)
- sdc1 $f30, THREAD_FPR30_LS64(\thread)
+ sdc1 $f0, THREAD_FPR0(\thread)
+ sdc1 $f2, THREAD_FPR2(\thread)
+ sdc1 $f4, THREAD_FPR4(\thread)
+ sdc1 $f6, THREAD_FPR6(\thread)
+ sdc1 $f8, THREAD_FPR8(\thread)
+ sdc1 $f10, THREAD_FPR10(\thread)
+ sdc1 $f12, THREAD_FPR12(\thread)
+ sdc1 $f14, THREAD_FPR14(\thread)
+ sdc1 $f16, THREAD_FPR16(\thread)
+ sdc1 $f18, THREAD_FPR18(\thread)
+ sdc1 $f20, THREAD_FPR20(\thread)
+ sdc1 $f22, THREAD_FPR22(\thread)
+ sdc1 $f24, THREAD_FPR24(\thread)
+ sdc1 $f26, THREAD_FPR26(\thread)
+ sdc1 $f28, THREAD_FPR28(\thread)
+ sdc1 $f30, THREAD_FPR30(\thread)
sw \tmp, THREAD_FCR31(\thread)
.set pop
.endm
.set push
.set mips64r2
SET_HARDFLOAT
- sdc1 $f1, THREAD_FPR1_LS64(\thread)
- sdc1 $f3, THREAD_FPR3_LS64(\thread)
- sdc1 $f5, THREAD_FPR5_LS64(\thread)
- sdc1 $f7, THREAD_FPR7_LS64(\thread)
- sdc1 $f9, THREAD_FPR9_LS64(\thread)
- sdc1 $f11, THREAD_FPR11_LS64(\thread)
- sdc1 $f13, THREAD_FPR13_LS64(\thread)
- sdc1 $f15, THREAD_FPR15_LS64(\thread)
- sdc1 $f17, THREAD_FPR17_LS64(\thread)
- sdc1 $f19, THREAD_FPR19_LS64(\thread)
- sdc1 $f21, THREAD_FPR21_LS64(\thread)
- sdc1 $f23, THREAD_FPR23_LS64(\thread)
- sdc1 $f25, THREAD_FPR25_LS64(\thread)
- sdc1 $f27, THREAD_FPR27_LS64(\thread)
- sdc1 $f29, THREAD_FPR29_LS64(\thread)
- sdc1 $f31, THREAD_FPR31_LS64(\thread)
+ sdc1 $f1, THREAD_FPR1(\thread)
+ sdc1 $f3, THREAD_FPR3(\thread)
+ sdc1 $f5, THREAD_FPR5(\thread)
+ sdc1 $f7, THREAD_FPR7(\thread)
+ sdc1 $f9, THREAD_FPR9(\thread)
+ sdc1 $f11, THREAD_FPR11(\thread)
+ sdc1 $f13, THREAD_FPR13(\thread)
+ sdc1 $f15, THREAD_FPR15(\thread)
+ sdc1 $f17, THREAD_FPR17(\thread)
+ sdc1 $f19, THREAD_FPR19(\thread)
+ sdc1 $f21, THREAD_FPR21(\thread)
+ sdc1 $f23, THREAD_FPR23(\thread)
+ sdc1 $f25, THREAD_FPR25(\thread)
+ sdc1 $f27, THREAD_FPR27(\thread)
+ sdc1 $f29, THREAD_FPR29(\thread)
+ sdc1 $f31, THREAD_FPR31(\thread)
.set pop
.endm
.set push
SET_HARDFLOAT
lw \tmp, THREAD_FCR31(\thread)
- ldc1 $f0, THREAD_FPR0_LS64(\thread)
- ldc1 $f2, THREAD_FPR2_LS64(\thread)
- ldc1 $f4, THREAD_FPR4_LS64(\thread)
- ldc1 $f6, THREAD_FPR6_LS64(\thread)
- ldc1 $f8, THREAD_FPR8_LS64(\thread)
- ldc1 $f10, THREAD_FPR10_LS64(\thread)
- ldc1 $f12, THREAD_FPR12_LS64(\thread)
- ldc1 $f14, THREAD_FPR14_LS64(\thread)
- ldc1 $f16, THREAD_FPR16_LS64(\thread)
- ldc1 $f18, THREAD_FPR18_LS64(\thread)
- ldc1 $f20, THREAD_FPR20_LS64(\thread)
- ldc1 $f22, THREAD_FPR22_LS64(\thread)
- ldc1 $f24, THREAD_FPR24_LS64(\thread)
- ldc1 $f26, THREAD_FPR26_LS64(\thread)
- ldc1 $f28, THREAD_FPR28_LS64(\thread)
- ldc1 $f30, THREAD_FPR30_LS64(\thread)
+ ldc1 $f0, THREAD_FPR0(\thread)
+ ldc1 $f2, THREAD_FPR2(\thread)
+ ldc1 $f4, THREAD_FPR4(\thread)
+ ldc1 $f6, THREAD_FPR6(\thread)
+ ldc1 $f8, THREAD_FPR8(\thread)
+ ldc1 $f10, THREAD_FPR10(\thread)
+ ldc1 $f12, THREAD_FPR12(\thread)
+ ldc1 $f14, THREAD_FPR14(\thread)
+ ldc1 $f16, THREAD_FPR16(\thread)
+ ldc1 $f18, THREAD_FPR18(\thread)
+ ldc1 $f20, THREAD_FPR20(\thread)
+ ldc1 $f22, THREAD_FPR22(\thread)
+ ldc1 $f24, THREAD_FPR24(\thread)
+ ldc1 $f26, THREAD_FPR26(\thread)
+ ldc1 $f28, THREAD_FPR28(\thread)
+ ldc1 $f30, THREAD_FPR30(\thread)
ctc1 \tmp, fcr31
.endm
.set push
.set mips64r2
SET_HARDFLOAT
- ldc1 $f1, THREAD_FPR1_LS64(\thread)
- ldc1 $f3, THREAD_FPR3_LS64(\thread)
- ldc1 $f5, THREAD_FPR5_LS64(\thread)
- ldc1 $f7, THREAD_FPR7_LS64(\thread)
- ldc1 $f9, THREAD_FPR9_LS64(\thread)
- ldc1 $f11, THREAD_FPR11_LS64(\thread)
- ldc1 $f13, THREAD_FPR13_LS64(\thread)
- ldc1 $f15, THREAD_FPR15_LS64(\thread)
- ldc1 $f17, THREAD_FPR17_LS64(\thread)
- ldc1 $f19, THREAD_FPR19_LS64(\thread)
- ldc1 $f21, THREAD_FPR21_LS64(\thread)
- ldc1 $f23, THREAD_FPR23_LS64(\thread)
- ldc1 $f25, THREAD_FPR25_LS64(\thread)
- ldc1 $f27, THREAD_FPR27_LS64(\thread)
- ldc1 $f29, THREAD_FPR29_LS64(\thread)
- ldc1 $f31, THREAD_FPR31_LS64(\thread)
+ ldc1 $f1, THREAD_FPR1(\thread)
+ ldc1 $f3, THREAD_FPR3(\thread)
+ ldc1 $f5, THREAD_FPR5(\thread)
+ ldc1 $f7, THREAD_FPR7(\thread)
+ ldc1 $f9, THREAD_FPR9(\thread)
+ ldc1 $f11, THREAD_FPR11(\thread)
+ ldc1 $f13, THREAD_FPR13(\thread)
+ ldc1 $f15, THREAD_FPR15(\thread)
+ ldc1 $f17, THREAD_FPR17(\thread)
+ ldc1 $f19, THREAD_FPR19(\thread)
+ ldc1 $f21, THREAD_FPR21(\thread)
+ ldc1 $f23, THREAD_FPR23(\thread)
+ ldc1 $f25, THREAD_FPR25(\thread)
+ ldc1 $f27, THREAD_FPR27(\thread)
+ ldc1 $f29, THREAD_FPR29(\thread)
+ ldc1 $f31, THREAD_FPR31(\thread)
.set pop
.endm
.endm
#ifdef TOOLCHAIN_SUPPORTS_MSA
+ .macro _cfcmsa rd, cs
+ .set push
+ .set mips32r2
+ .set msa
+ cfcmsa \rd, $\cs
+ .set pop
+ .endm
+
+ .macro _ctcmsa cd, rs
+ .set push
+ .set mips32r2
+ .set msa
+ ctcmsa $\cd, \rs
+ .set pop
+ .endm
+
.macro ld_d wd, off, base
.set push
.set mips32r2
.set pop
.endm
- .macro copy_u_w rd, ws, n
+ .macro copy_u_w ws, n
.set push
.set mips32r2
.set msa
- copy_u.w \rd, $w\ws[\n]
+ copy_u.w $1, $w\ws[\n]
.set pop
.endm
- .macro copy_u_d rd, ws, n
+ .macro copy_u_d ws, n
.set push
.set mips64r2
.set msa
- copy_u.d \rd, $w\ws[\n]
+ copy_u.d $1, $w\ws[\n]
.set pop
.endm
- .macro insert_w wd, n, rs
+ .macro insert_w wd, n
.set push
.set mips32r2
.set msa
- insert.w $w\wd[\n], \rs
+ insert.w $w\wd[\n], $1
.set pop
.endm
- .macro insert_d wd, n, rs
+ .macro insert_d wd, n
.set push
.set mips64r2
.set msa
- insert.d $w\wd[\n], \rs
+ insert.d $w\wd[\n], $1
.set pop
.endm
#else
/*
* Temporary until all toolchains in use include MSA support.
*/
- .macro cfcmsa rd, cs
+ .macro _cfcmsa rd, cs
.set push
.set noat
SET_HARDFLOAT
.set pop
.endm
- .macro ctcmsa cd, rs
+ .macro _ctcmsa cd, rs
.set push
.set noat
SET_HARDFLOAT
.set pop
.endm
- .macro copy_u_w rd, ws, n
+ .macro copy_u_w ws, n
.set push
.set noat
SET_HARDFLOAT
.insn
.word COPY_UW_MSA_INSN | (\n << 16) | (\ws << 11)
- /* move triggers an assembler bug... */
- or \rd, $1, zero
.set pop
.endm
- .macro copy_u_d rd, ws, n
+ .macro copy_u_d ws, n
.set push
.set noat
SET_HARDFLOAT
.insn
.word COPY_UD_MSA_INSN | (\n << 16) | (\ws << 11)
- /* move triggers an assembler bug... */
- or \rd, $1, zero
.set pop
.endm
- .macro insert_w wd, n, rs
+ .macro insert_w wd, n
.set push
.set noat
SET_HARDFLOAT
- /* move triggers an assembler bug... */
- or $1, \rs, zero
.word INSERT_W_MSA_INSN | (\n << 16) | (\wd << 6)
.set pop
.endm
- .macro insert_d wd, n, rs
+ .macro insert_d wd, n
.set push
.set noat
SET_HARDFLOAT
- /* move triggers an assembler bug... */
- or $1, \rs, zero
.word INSERT_D_MSA_INSN | (\n << 16) | (\wd << 6)
.set pop
.endm
.set push
.set noat
SET_HARDFLOAT
- cfcmsa $1, MSA_CSR
+ _cfcmsa $1, MSA_CSR
sw $1, THREAD_MSA_CSR(\thread)
.set pop
.endm
.set noat
SET_HARDFLOAT
lw $1, THREAD_MSA_CSR(\thread)
- ctcmsa MSA_CSR, $1
+ _ctcmsa MSA_CSR, $1
.set pop
ld_d 0, THREAD_FPR0, \thread
ld_d 1, THREAD_FPR1, \thread
insert_w \wd, 2
insert_w \wd, 3
#endif
- .if 31-\wd
- msa_init_upper (\wd+1)
- .endif
.endm
.macro msa_init_all_upper
SET_HARDFLOAT
not $1, zero
msa_init_upper 0
+ msa_init_upper 1
+ msa_init_upper 2
+ msa_init_upper 3
+ msa_init_upper 4
+ msa_init_upper 5
+ msa_init_upper 6
+ msa_init_upper 7
+ msa_init_upper 8
+ msa_init_upper 9
+ msa_init_upper 10
+ msa_init_upper 11
+ msa_init_upper 12
+ msa_init_upper 13
+ msa_init_upper 14
+ msa_init_upper 15
+ msa_init_upper 16
+ msa_init_upper 17
+ msa_init_upper 18
+ msa_init_upper 19
+ msa_init_upper 20
+ msa_init_upper 21
+ msa_init_upper 22
+ msa_init_upper 23
+ msa_init_upper 24
+ msa_init_upper 25
+ msa_init_upper 26
+ msa_init_upper 27
+ msa_init_upper 28
+ msa_init_upper 29
+ msa_init_upper 30
+ msa_init_upper 31
.set pop
.endm
extern int arch_setup_additional_pages(struct linux_binprm *bprm,
int uses_interp);
-struct mm_struct;
-extern unsigned long arch_randomize_brk(struct mm_struct *mm);
-#define arch_randomize_brk arch_randomize_brk
-
struct arch_elf_state {
int fp_abi;
int interp_fp_abi;
#define FPU_FR_MASK 0x1
};
+#define __disable_fpu() \
+do { \
+ clear_c0_status(ST0_CU1); \
+ disable_fpu_hazard(); \
+} while (0)
+
static inline int __enable_fpu(enum fpu_mode mode)
{
int fr;
enable_fpu_hazard();
/* check FR has the desired value */
- return (!!(read_c0_status() & ST0_FR) == !!fr) ? 0 : SIGFPE;
+ if (!!(read_c0_status() & ST0_FR) == !!fr)
+ return 0;
+
+ /* unsupported FR value */
+ __disable_fpu();
+ return SIGFPE;
default:
BUG();
return SIGFPE;
}
-#define __disable_fpu() \
-do { \
- clear_c0_status(ST0_CU1); \
- disable_fpu_hazard(); \
-} while (0)
-
#define clear_fpu_owner() clear_thread_flag(TIF_USEDFPU)
static inline int __is_fpu_owner(void)
}
disable_msa();
clear_thread_flag(TIF_USEDMSA);
+ __disable_fpu();
} else if (is_fpu_owner()) {
if (save)
_save_fp(current);
#ifndef _ASM_MIPS_JUMP_LABEL_H
#define _ASM_MIPS_JUMP_LABEL_H
-#include <linux/types.h>
+#ifndef __ASSEMBLY__
-#ifdef __KERNEL__
+#include <linux/types.h>
#define JUMP_LABEL_NOP_SIZE 4
return true;
}
-#endif /* __KERNEL__ */
-
#ifdef CONFIG_64BIT
typedef u64 jump_label_t;
#else
jump_label_t key;
};
+#endif /* __ASSEMBLY__ */
#endif /* _ASM_MIPS_JUMP_LABEL_H */
DIE_RI,
DIE_PAGE_FAULT,
DIE_BREAK,
- DIE_SSTEPBP
+ DIE_SSTEPBP,
+ DIE_MSAFP
};
#endif /* _ASM_MIPS_KDEBUG_H */
/* MIPS KVM register ids */
#define MIPS_CP0_32(_R, _S) \
- (KVM_REG_MIPS | KVM_REG_SIZE_U32 | 0x10000 | (8 * (_R) + (_S)))
+ (KVM_REG_MIPS_CP0 | KVM_REG_SIZE_U32 | (8 * (_R) + (_S)))
#define MIPS_CP0_64(_R, _S) \
- (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 0x10000 | (8 * (_R) + (_S)))
+ (KVM_REG_MIPS_CP0 | KVM_REG_SIZE_U64 | (8 * (_R) + (_S)))
#define KVM_REG_MIPS_CP0_INDEX MIPS_CP0_32(0, 0)
#define KVM_REG_MIPS_CP0_ENTRYLO0 MIPS_CP0_64(2, 0)
#define KVM_REG_MIPS_CP0_STATUS MIPS_CP0_32(12, 0)
#define KVM_REG_MIPS_CP0_CAUSE MIPS_CP0_32(13, 0)
#define KVM_REG_MIPS_CP0_EPC MIPS_CP0_64(14, 0)
+#define KVM_REG_MIPS_CP0_PRID MIPS_CP0_32(15, 0)
#define KVM_REG_MIPS_CP0_EBASE MIPS_CP0_64(15, 1)
#define KVM_REG_MIPS_CP0_CONFIG MIPS_CP0_32(16, 0)
#define KVM_REG_MIPS_CP0_CONFIG1 MIPS_CP0_32(16, 1)
#define KVM_REG_MIPS_CP0_CONFIG2 MIPS_CP0_32(16, 2)
#define KVM_REG_MIPS_CP0_CONFIG3 MIPS_CP0_32(16, 3)
+#define KVM_REG_MIPS_CP0_CONFIG4 MIPS_CP0_32(16, 4)
+#define KVM_REG_MIPS_CP0_CONFIG5 MIPS_CP0_32(16, 5)
#define KVM_REG_MIPS_CP0_CONFIG7 MIPS_CP0_32(16, 7)
#define KVM_REG_MIPS_CP0_XCONTEXT MIPS_CP0_64(20, 0)
#define KVM_REG_MIPS_CP0_ERROREPC MIPS_CP0_64(30, 0)
u32 syscall_exits;
u32 resvd_inst_exits;
u32 break_inst_exits;
+ u32 trap_inst_exits;
+ u32 msa_fpe_exits;
+ u32 fpe_exits;
+ u32 msa_disabled_exits;
u32 flush_dcache_exits;
u32 halt_successful_poll;
u32 halt_wakeup;
SYSCALL_EXITS,
RESVD_INST_EXITS,
BREAK_INST_EXITS,
+ TRAP_INST_EXITS,
+ MSA_FPE_EXITS,
+ FPE_EXITS,
+ MSA_DISABLED_EXITS,
FLUSH_DCACHE_EXITS,
MAX_KVM_MIPS_EXIT_TYPES
};
#define MIPS_CP0_CONFIG1_SEL 1
#define MIPS_CP0_CONFIG2_SEL 2
#define MIPS_CP0_CONFIG3_SEL 3
+#define MIPS_CP0_CONFIG4_SEL 4
+#define MIPS_CP0_CONFIG5_SEL 5
/* Config0 register bits */
#define CP0C0_M 31
#define CP0C3_SM 1
#define CP0C3_TL 0
-/* Have config1, Cacheable, noncoherent, write-back, write allocate*/
-#define MIPS_CONFIG0 \
- ((1 << CP0C0_M) | (0x3 << CP0C0_K0))
-
-/* Have config2, no coprocessor2 attached, no MDMX support attached,
- no performance counters, watch registers present,
- no code compression, EJTAG present, no FPU, no watch registers */
-#define MIPS_CONFIG1 \
-((1 << CP0C1_M) | \
- (0 << CP0C1_C2) | (0 << CP0C1_MD) | (0 << CP0C1_PC) | \
- (0 << CP0C1_WR) | (0 << CP0C1_CA) | (1 << CP0C1_EP) | \
- (0 << CP0C1_FP))
-
-/* Have config3, no tertiary/secondary caches implemented */
-#define MIPS_CONFIG2 \
-((1 << CP0C2_M))
-
-/* No config4, no DSP ASE, no large physaddr (PABITS),
- no external interrupt controller, no vectored interrupts,
- no 1kb pages, no SmartMIPS ASE, no trace logic */
-#define MIPS_CONFIG3 \
-((0 << CP0C3_M) | (0 << CP0C3_DSPP) | (0 << CP0C3_LPA) | \
- (0 << CP0C3_VEIC) | (0 << CP0C3_VInt) | (0 << CP0C3_SP) | \
- (0 << CP0C3_SM) | (0 << CP0C3_TL))
-
/* MMU types, the first four entries have the same layout as the
CP0C0_MT field. */
enum mips_mmu_types {
*/
#define T_TRAP 13 /* Trap instruction */
#define T_VCEI 14 /* Virtual coherency exception */
+#define T_MSAFPE 14 /* MSA floating point exception */
#define T_FPE 15 /* Floating point exception */
+#define T_MSADIS 21 /* MSA disabled exception */
#define T_WATCH 23 /* Watch address reference */
#define T_VCED 31 /* Virtual coherency data */
long tlb_lo1;
};
+#define KVM_MIPS_FPU_FPU 0x1
+#define KVM_MIPS_FPU_MSA 0x2
+
#define KVM_MIPS_GUEST_TLB_SIZE 64
struct kvm_vcpu_arch {
void *host_ebase, *guest_ebase;
/* FPU State */
struct mips_fpu_struct fpu;
+ /* Which FPU state is loaded (KVM_MIPS_FPU_*) */
+ unsigned int fpu_inuse;
/* COP0 State */
struct mips_coproc *cop0;
/* WAIT executed */
int wait;
+
+ u8 fpu_enabled;
+ u8 msa_enabled;
};
#define kvm_read_c0_guest_config1(cop0) (cop0->reg[MIPS_CP0_CONFIG][1])
#define kvm_read_c0_guest_config2(cop0) (cop0->reg[MIPS_CP0_CONFIG][2])
#define kvm_read_c0_guest_config3(cop0) (cop0->reg[MIPS_CP0_CONFIG][3])
+#define kvm_read_c0_guest_config4(cop0) (cop0->reg[MIPS_CP0_CONFIG][4])
+#define kvm_read_c0_guest_config5(cop0) (cop0->reg[MIPS_CP0_CONFIG][5])
#define kvm_read_c0_guest_config7(cop0) (cop0->reg[MIPS_CP0_CONFIG][7])
#define kvm_write_c0_guest_config(cop0, val) (cop0->reg[MIPS_CP0_CONFIG][0] = (val))
#define kvm_write_c0_guest_config1(cop0, val) (cop0->reg[MIPS_CP0_CONFIG][1] = (val))
#define kvm_write_c0_guest_config2(cop0, val) (cop0->reg[MIPS_CP0_CONFIG][2] = (val))
#define kvm_write_c0_guest_config3(cop0, val) (cop0->reg[MIPS_CP0_CONFIG][3] = (val))
+#define kvm_write_c0_guest_config4(cop0, val) (cop0->reg[MIPS_CP0_CONFIG][4] = (val))
+#define kvm_write_c0_guest_config5(cop0, val) (cop0->reg[MIPS_CP0_CONFIG][5] = (val))
#define kvm_write_c0_guest_config7(cop0, val) (cop0->reg[MIPS_CP0_CONFIG][7] = (val))
#define kvm_read_c0_guest_errorepc(cop0) (cop0->reg[MIPS_CP0_ERROR_PC][0])
#define kvm_write_c0_guest_errorepc(cop0, val) (cop0->reg[MIPS_CP0_ERROR_PC][0] = (val))
kvm_set_c0_guest_ebase(cop0, ((val) & (change))); \
}
+/* Helpers */
+
+static inline bool kvm_mips_guest_can_have_fpu(struct kvm_vcpu_arch *vcpu)
+{
+ return (!__builtin_constant_p(cpu_has_fpu) || cpu_has_fpu) &&
+ vcpu->fpu_enabled;
+}
+
+static inline bool kvm_mips_guest_has_fpu(struct kvm_vcpu_arch *vcpu)
+{
+ return kvm_mips_guest_can_have_fpu(vcpu) &&
+ kvm_read_c0_guest_config1(vcpu->cop0) & MIPS_CONF1_FP;
+}
+
+static inline bool kvm_mips_guest_can_have_msa(struct kvm_vcpu_arch *vcpu)
+{
+ return (!__builtin_constant_p(cpu_has_msa) || cpu_has_msa) &&
+ vcpu->msa_enabled;
+}
+
+static inline bool kvm_mips_guest_has_msa(struct kvm_vcpu_arch *vcpu)
+{
+ return kvm_mips_guest_can_have_msa(vcpu) &&
+ kvm_read_c0_guest_config3(vcpu->cop0) & MIPS_CONF3_MSA;
+}
struct kvm_mips_callbacks {
int (*handle_cop_unusable)(struct kvm_vcpu *vcpu);
int (*handle_syscall)(struct kvm_vcpu *vcpu);
int (*handle_res_inst)(struct kvm_vcpu *vcpu);
int (*handle_break)(struct kvm_vcpu *vcpu);
+ int (*handle_trap)(struct kvm_vcpu *vcpu);
+ int (*handle_msa_fpe)(struct kvm_vcpu *vcpu);
+ int (*handle_fpe)(struct kvm_vcpu *vcpu);
+ int (*handle_msa_disabled)(struct kvm_vcpu *vcpu);
int (*vm_init)(struct kvm *kvm);
int (*vcpu_init)(struct kvm_vcpu *vcpu);
int (*vcpu_setup)(struct kvm_vcpu *vcpu);
const struct kvm_one_reg *reg, s64 *v);
int (*set_one_reg)(struct kvm_vcpu *vcpu,
const struct kvm_one_reg *reg, s64 v);
+ int (*vcpu_get_regs)(struct kvm_vcpu *vcpu);
+ int (*vcpu_set_regs)(struct kvm_vcpu *vcpu);
};
extern struct kvm_mips_callbacks *kvm_mips_callbacks;
int kvm_mips_emulation_init(struct kvm_mips_callbacks **install_callbacks);
/* Trampoline ASM routine to start running in "Guest" context */
extern int __kvm_mips_vcpu_run(struct kvm_run *run, struct kvm_vcpu *vcpu);
+/* FPU/MSA context management */
+void __kvm_save_fpu(struct kvm_vcpu_arch *vcpu);
+void __kvm_restore_fpu(struct kvm_vcpu_arch *vcpu);
+void __kvm_restore_fcsr(struct kvm_vcpu_arch *vcpu);
+void __kvm_save_msa(struct kvm_vcpu_arch *vcpu);
+void __kvm_restore_msa(struct kvm_vcpu_arch *vcpu);
+void __kvm_restore_msa_upper(struct kvm_vcpu_arch *vcpu);
+void __kvm_restore_msacsr(struct kvm_vcpu_arch *vcpu);
+void kvm_own_fpu(struct kvm_vcpu *vcpu);
+void kvm_own_msa(struct kvm_vcpu *vcpu);
+void kvm_drop_fpu(struct kvm_vcpu *vcpu);
+void kvm_lose_fpu(struct kvm_vcpu *vcpu);
+
/* TLB handling */
uint32_t kvm_get_kernel_asid(struct kvm_vcpu *vcpu);
struct kvm_run *run,
struct kvm_vcpu *vcpu);
+extern enum emulation_result kvm_mips_emulate_trap_exc(unsigned long cause,
+ uint32_t *opc,
+ struct kvm_run *run,
+ struct kvm_vcpu *vcpu);
+
+extern enum emulation_result kvm_mips_emulate_msafpe_exc(unsigned long cause,
+ uint32_t *opc,
+ struct kvm_run *run,
+ struct kvm_vcpu *vcpu);
+
+extern enum emulation_result kvm_mips_emulate_fpe_exc(unsigned long cause,
+ uint32_t *opc,
+ struct kvm_run *run,
+ struct kvm_vcpu *vcpu);
+
+extern enum emulation_result kvm_mips_emulate_msadis_exc(unsigned long cause,
+ uint32_t *opc,
+ struct kvm_run *run,
+ struct kvm_vcpu *vcpu);
+
extern enum emulation_result kvm_mips_complete_mmio_load(struct kvm_vcpu *vcpu,
struct kvm_run *run);
struct kvm_run *run,
struct kvm_vcpu *vcpu);
+unsigned int kvm_mips_config1_wrmask(struct kvm_vcpu *vcpu);
+unsigned int kvm_mips_config3_wrmask(struct kvm_vcpu *vcpu);
+unsigned int kvm_mips_config4_wrmask(struct kvm_vcpu *vcpu);
+unsigned int kvm_mips_config5_wrmask(struct kvm_vcpu *vcpu);
+
/* Dynamic binary translation */
extern int kvm_mips_trans_cache_index(uint32_t inst, uint32_t *opc,
struct kvm_vcpu *vcpu);
#ifdef CONFIG_CPU_LITTLE_ENDIAN
# define FPR_IDX(width, idx) (idx)
#else
-# define FPR_IDX(width, idx) ((FPU_REG_WIDTH / (width)) - 1 - (idx))
+# define FPR_IDX(width, idx) ((idx) ^ ((64 / (width)) - 1))
#endif
#define BUILD_FPR_ACCESS(width) \
/*
* for KVM_GET_FPU and KVM_SET_FPU
- *
- * If Status[FR] is zero (32-bit FPU), the upper 32-bits of the FPRs
- * are zero filled.
*/
struct kvm_fpu {
- __u64 fpr[32];
- __u32 fir;
- __u32 fccr;
- __u32 fexr;
- __u32 fenr;
- __u32 fcsr;
- __u32 pad;
};
/*
- * For MIPS, we use KVM_SET_ONE_REG and KVM_GET_ONE_REG to access CP0
+ * For MIPS, we use KVM_SET_ONE_REG and KVM_GET_ONE_REG to access various
* registers. The id field is broken down as follows:
*
- * bits[2..0] - Register 'sel' index.
- * bits[7..3] - Register 'rd' index.
- * bits[15..8] - Must be zero.
- * bits[31..16] - 1 -> CP0 registers.
- * bits[51..32] - Must be zero.
* bits[63..52] - As per linux/kvm.h
+ * bits[51..32] - Must be zero.
+ * bits[31..16] - Register set.
+ *
+ * Register set = 0: GP registers from kvm_regs (see definitions below).
+ *
+ * Register set = 1: CP0 registers.
+ * bits[15..8] - Must be zero.
+ * bits[7..3] - Register 'rd' index.
+ * bits[2..0] - Register 'sel' index.
+ *
+ * Register set = 2: KVM specific registers (see definitions below).
+ *
+ * Register set = 3: FPU / MSA registers (see definitions below).
*
* Other sets registers may be added in the future. Each set would
* have its own identifier in bits[31..16].
- *
- * The registers defined in struct kvm_regs are also accessible, the
- * id values for these are below.
*/
-#define KVM_REG_MIPS_R0 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 0)
-#define KVM_REG_MIPS_R1 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 1)
-#define KVM_REG_MIPS_R2 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 2)
-#define KVM_REG_MIPS_R3 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 3)
-#define KVM_REG_MIPS_R4 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 4)
-#define KVM_REG_MIPS_R5 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 5)
-#define KVM_REG_MIPS_R6 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 6)
-#define KVM_REG_MIPS_R7 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 7)
-#define KVM_REG_MIPS_R8 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 8)
-#define KVM_REG_MIPS_R9 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 9)
-#define KVM_REG_MIPS_R10 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 10)
-#define KVM_REG_MIPS_R11 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 11)
-#define KVM_REG_MIPS_R12 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 12)
-#define KVM_REG_MIPS_R13 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 13)
-#define KVM_REG_MIPS_R14 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 14)
-#define KVM_REG_MIPS_R15 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 15)
-#define KVM_REG_MIPS_R16 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 16)
-#define KVM_REG_MIPS_R17 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 17)
-#define KVM_REG_MIPS_R18 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 18)
-#define KVM_REG_MIPS_R19 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 19)
-#define KVM_REG_MIPS_R20 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 20)
-#define KVM_REG_MIPS_R21 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 21)
-#define KVM_REG_MIPS_R22 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 22)
-#define KVM_REG_MIPS_R23 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 23)
-#define KVM_REG_MIPS_R24 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 24)
-#define KVM_REG_MIPS_R25 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 25)
-#define KVM_REG_MIPS_R26 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 26)
-#define KVM_REG_MIPS_R27 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 27)
-#define KVM_REG_MIPS_R28 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 28)
-#define KVM_REG_MIPS_R29 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 29)
-#define KVM_REG_MIPS_R30 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 30)
-#define KVM_REG_MIPS_R31 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 31)
-
-#define KVM_REG_MIPS_HI (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 32)
-#define KVM_REG_MIPS_LO (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 33)
-#define KVM_REG_MIPS_PC (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 34)
-
-/* KVM specific control registers */
+#define KVM_REG_MIPS_GP (KVM_REG_MIPS | 0x0000000000000000ULL)
+#define KVM_REG_MIPS_CP0 (KVM_REG_MIPS | 0x0000000000010000ULL)
+#define KVM_REG_MIPS_KVM (KVM_REG_MIPS | 0x0000000000020000ULL)
+#define KVM_REG_MIPS_FPU (KVM_REG_MIPS | 0x0000000000030000ULL)
+
+
+/*
+ * KVM_REG_MIPS_GP - General purpose registers from kvm_regs.
+ */
+
+#define KVM_REG_MIPS_R0 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 0)
+#define KVM_REG_MIPS_R1 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 1)
+#define KVM_REG_MIPS_R2 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 2)
+#define KVM_REG_MIPS_R3 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 3)
+#define KVM_REG_MIPS_R4 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 4)
+#define KVM_REG_MIPS_R5 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 5)
+#define KVM_REG_MIPS_R6 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 6)
+#define KVM_REG_MIPS_R7 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 7)
+#define KVM_REG_MIPS_R8 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 8)
+#define KVM_REG_MIPS_R9 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 9)
+#define KVM_REG_MIPS_R10 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 10)
+#define KVM_REG_MIPS_R11 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 11)
+#define KVM_REG_MIPS_R12 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 12)
+#define KVM_REG_MIPS_R13 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 13)
+#define KVM_REG_MIPS_R14 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 14)
+#define KVM_REG_MIPS_R15 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 15)
+#define KVM_REG_MIPS_R16 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 16)
+#define KVM_REG_MIPS_R17 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 17)
+#define KVM_REG_MIPS_R18 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 18)
+#define KVM_REG_MIPS_R19 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 19)
+#define KVM_REG_MIPS_R20 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 20)
+#define KVM_REG_MIPS_R21 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 21)
+#define KVM_REG_MIPS_R22 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 22)
+#define KVM_REG_MIPS_R23 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 23)
+#define KVM_REG_MIPS_R24 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 24)
+#define KVM_REG_MIPS_R25 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 25)
+#define KVM_REG_MIPS_R26 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 26)
+#define KVM_REG_MIPS_R27 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 27)
+#define KVM_REG_MIPS_R28 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 28)
+#define KVM_REG_MIPS_R29 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 29)
+#define KVM_REG_MIPS_R30 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 30)
+#define KVM_REG_MIPS_R31 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 31)
+
+#define KVM_REG_MIPS_HI (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 32)
+#define KVM_REG_MIPS_LO (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 33)
+#define KVM_REG_MIPS_PC (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 34)
+
+
+/*
+ * KVM_REG_MIPS_KVM - KVM specific control registers.
+ */
/*
* CP0_Count control
* safely without losing time or guest timer interrupts.
* Other: Reserved, do not change.
*/
-#define KVM_REG_MIPS_COUNT_CTL (KVM_REG_MIPS | KVM_REG_SIZE_U64 | \
- 0x20000 | 0)
+#define KVM_REG_MIPS_COUNT_CTL (KVM_REG_MIPS_KVM | KVM_REG_SIZE_U64 | 0)
#define KVM_REG_MIPS_COUNT_CTL_DC 0x00000001
/*
* emulated.
* Modifications to times in the future are rejected.
*/
-#define KVM_REG_MIPS_COUNT_RESUME (KVM_REG_MIPS | KVM_REG_SIZE_U64 | \
- 0x20000 | 1)
+#define KVM_REG_MIPS_COUNT_RESUME (KVM_REG_MIPS_KVM | KVM_REG_SIZE_U64 | 1)
/*
* CP0_Count rate in Hz
* Specifies the rate of the CP0_Count timer in Hz. Modifications occur without
* discontinuities in CP0_Count.
*/
-#define KVM_REG_MIPS_COUNT_HZ (KVM_REG_MIPS | KVM_REG_SIZE_U64 | \
- 0x20000 | 2)
+#define KVM_REG_MIPS_COUNT_HZ (KVM_REG_MIPS_KVM | KVM_REG_SIZE_U64 | 2)
+
+
+/*
+ * KVM_REG_MIPS_FPU - Floating Point and MIPS SIMD Architecture (MSA) registers.
+ *
+ * bits[15..8] - Register subset (see definitions below).
+ * bits[7..5] - Must be zero.
+ * bits[4..0] - Register number within register subset.
+ */
+
+#define KVM_REG_MIPS_FPR (KVM_REG_MIPS_FPU | 0x0000000000000000ULL)
+#define KVM_REG_MIPS_FCR (KVM_REG_MIPS_FPU | 0x0000000000000100ULL)
+#define KVM_REG_MIPS_MSACR (KVM_REG_MIPS_FPU | 0x0000000000000200ULL)
+
+/*
+ * KVM_REG_MIPS_FPR - Floating point / Vector registers.
+ */
+#define KVM_REG_MIPS_FPR_32(n) (KVM_REG_MIPS_FPR | KVM_REG_SIZE_U32 | (n))
+#define KVM_REG_MIPS_FPR_64(n) (KVM_REG_MIPS_FPR | KVM_REG_SIZE_U64 | (n))
+#define KVM_REG_MIPS_VEC_128(n) (KVM_REG_MIPS_FPR | KVM_REG_SIZE_U128 | (n))
+
+/*
+ * KVM_REG_MIPS_FCR - Floating point control registers.
+ */
+#define KVM_REG_MIPS_FCR_IR (KVM_REG_MIPS_FCR | KVM_REG_SIZE_U32 | 0)
+#define KVM_REG_MIPS_FCR_CSR (KVM_REG_MIPS_FCR | KVM_REG_SIZE_U32 | 31)
+
+/*
+ * KVM_REG_MIPS_MSACR - MIPS SIMD Architecture (MSA) control registers.
+ */
+#define KVM_REG_MIPS_MSA_IR (KVM_REG_MIPS_MSACR | KVM_REG_SIZE_U32 | 0)
+#define KVM_REG_MIPS_MSA_CSR (KVM_REG_MIPS_MSACR | KVM_REG_SIZE_U32 | 1)
+
/*
* KVM MIPS specific structures and definitions
OFFSET(THREAD_FPR30, task_struct, thread.fpu.fpr[30]);
OFFSET(THREAD_FPR31, task_struct, thread.fpu.fpr[31]);
- /* the least significant 64 bits of each FP register */
- OFFSET(THREAD_FPR0_LS64, task_struct,
- thread.fpu.fpr[0].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR1_LS64, task_struct,
- thread.fpu.fpr[1].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR2_LS64, task_struct,
- thread.fpu.fpr[2].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR3_LS64, task_struct,
- thread.fpu.fpr[3].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR4_LS64, task_struct,
- thread.fpu.fpr[4].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR5_LS64, task_struct,
- thread.fpu.fpr[5].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR6_LS64, task_struct,
- thread.fpu.fpr[6].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR7_LS64, task_struct,
- thread.fpu.fpr[7].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR8_LS64, task_struct,
- thread.fpu.fpr[8].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR9_LS64, task_struct,
- thread.fpu.fpr[9].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR10_LS64, task_struct,
- thread.fpu.fpr[10].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR11_LS64, task_struct,
- thread.fpu.fpr[11].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR12_LS64, task_struct,
- thread.fpu.fpr[12].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR13_LS64, task_struct,
- thread.fpu.fpr[13].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR14_LS64, task_struct,
- thread.fpu.fpr[14].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR15_LS64, task_struct,
- thread.fpu.fpr[15].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR16_LS64, task_struct,
- thread.fpu.fpr[16].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR17_LS64, task_struct,
- thread.fpu.fpr[17].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR18_LS64, task_struct,
- thread.fpu.fpr[18].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR19_LS64, task_struct,
- thread.fpu.fpr[19].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR20_LS64, task_struct,
- thread.fpu.fpr[20].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR21_LS64, task_struct,
- thread.fpu.fpr[21].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR22_LS64, task_struct,
- thread.fpu.fpr[22].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR23_LS64, task_struct,
- thread.fpu.fpr[23].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR24_LS64, task_struct,
- thread.fpu.fpr[24].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR25_LS64, task_struct,
- thread.fpu.fpr[25].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR26_LS64, task_struct,
- thread.fpu.fpr[26].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR27_LS64, task_struct,
- thread.fpu.fpr[27].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR28_LS64, task_struct,
- thread.fpu.fpr[28].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR29_LS64, task_struct,
- thread.fpu.fpr[29].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR30_LS64, task_struct,
- thread.fpu.fpr[30].val64[FPR_IDX(64, 0)]);
- OFFSET(THREAD_FPR31_LS64, task_struct,
- thread.fpu.fpr[31].val64[FPR_IDX(64, 0)]);
-
OFFSET(THREAD_FCR31, task_struct, thread.fpu.fcr31);
OFFSET(THREAD_MSA_CSR, task_struct, thread.fpu.msacsr);
BLANK();
OFFSET(VCPU_LO, kvm_vcpu_arch, lo);
OFFSET(VCPU_HI, kvm_vcpu_arch, hi);
OFFSET(VCPU_PC, kvm_vcpu_arch, pc);
+ BLANK();
+
+ OFFSET(VCPU_FPR0, kvm_vcpu_arch, fpu.fpr[0]);
+ OFFSET(VCPU_FPR1, kvm_vcpu_arch, fpu.fpr[1]);
+ OFFSET(VCPU_FPR2, kvm_vcpu_arch, fpu.fpr[2]);
+ OFFSET(VCPU_FPR3, kvm_vcpu_arch, fpu.fpr[3]);
+ OFFSET(VCPU_FPR4, kvm_vcpu_arch, fpu.fpr[4]);
+ OFFSET(VCPU_FPR5, kvm_vcpu_arch, fpu.fpr[5]);
+ OFFSET(VCPU_FPR6, kvm_vcpu_arch, fpu.fpr[6]);
+ OFFSET(VCPU_FPR7, kvm_vcpu_arch, fpu.fpr[7]);
+ OFFSET(VCPU_FPR8, kvm_vcpu_arch, fpu.fpr[8]);
+ OFFSET(VCPU_FPR9, kvm_vcpu_arch, fpu.fpr[9]);
+ OFFSET(VCPU_FPR10, kvm_vcpu_arch, fpu.fpr[10]);
+ OFFSET(VCPU_FPR11, kvm_vcpu_arch, fpu.fpr[11]);
+ OFFSET(VCPU_FPR12, kvm_vcpu_arch, fpu.fpr[12]);
+ OFFSET(VCPU_FPR13, kvm_vcpu_arch, fpu.fpr[13]);
+ OFFSET(VCPU_FPR14, kvm_vcpu_arch, fpu.fpr[14]);
+ OFFSET(VCPU_FPR15, kvm_vcpu_arch, fpu.fpr[15]);
+ OFFSET(VCPU_FPR16, kvm_vcpu_arch, fpu.fpr[16]);
+ OFFSET(VCPU_FPR17, kvm_vcpu_arch, fpu.fpr[17]);
+ OFFSET(VCPU_FPR18, kvm_vcpu_arch, fpu.fpr[18]);
+ OFFSET(VCPU_FPR19, kvm_vcpu_arch, fpu.fpr[19]);
+ OFFSET(VCPU_FPR20, kvm_vcpu_arch, fpu.fpr[20]);
+ OFFSET(VCPU_FPR21, kvm_vcpu_arch, fpu.fpr[21]);
+ OFFSET(VCPU_FPR22, kvm_vcpu_arch, fpu.fpr[22]);
+ OFFSET(VCPU_FPR23, kvm_vcpu_arch, fpu.fpr[23]);
+ OFFSET(VCPU_FPR24, kvm_vcpu_arch, fpu.fpr[24]);
+ OFFSET(VCPU_FPR25, kvm_vcpu_arch, fpu.fpr[25]);
+ OFFSET(VCPU_FPR26, kvm_vcpu_arch, fpu.fpr[26]);
+ OFFSET(VCPU_FPR27, kvm_vcpu_arch, fpu.fpr[27]);
+ OFFSET(VCPU_FPR28, kvm_vcpu_arch, fpu.fpr[28]);
+ OFFSET(VCPU_FPR29, kvm_vcpu_arch, fpu.fpr[29]);
+ OFFSET(VCPU_FPR30, kvm_vcpu_arch, fpu.fpr[30]);
+ OFFSET(VCPU_FPR31, kvm_vcpu_arch, fpu.fpr[31]);
+
+ OFFSET(VCPU_FCR31, kvm_vcpu_arch, fpu.fcr31);
+ OFFSET(VCPU_MSA_CSR, kvm_vcpu_arch, fpu.msacsr);
+ BLANK();
+
OFFSET(VCPU_COP0, kvm_vcpu_arch, cop0);
OFFSET(VCPU_GUEST_KERNEL_ASID, kvm_vcpu_arch, guest_kernel_asid);
OFFSET(VCPU_GUEST_USER_ASID, kvm_vcpu_arch, guest_user_asid);
.set mips1
SET_HARDFLOAT
cfc1 a1, fcr31
- li a2, ~(0x3f << 12)
- and a2, a1
- ctc1 a2, fcr31
.set pop
- TRACE_IRQS_ON
- STI
+ CLI
+ TRACE_IRQS_OFF
+ .endm
+
+ .macro __build_clear_msa_fpe
+ _cfcmsa a1, MSA_CSR
+ CLI
+ TRACE_IRQS_OFF
.endm
.macro __build_clear_ade
BUILD_HANDLER cpu cpu sti silent /* #11 */
BUILD_HANDLER ov ov sti silent /* #12 */
BUILD_HANDLER tr tr sti silent /* #13 */
- BUILD_HANDLER msa_fpe msa_fpe sti silent /* #14 */
+ BUILD_HANDLER msa_fpe msa_fpe msa_fpe silent /* #14 */
BUILD_HANDLER fpe fpe fpe silent /* #15 */
BUILD_HANDLER ftlb ftlb none silent /* #16 */
BUILD_HANDLER msa msa sti silent /* #21 */
#define CREATE_TRACE_POINTS
#include <trace/events/syscalls.h>
+static void init_fp_ctx(struct task_struct *target)
+{
+ /* If FP has been used then the target already has context */
+ if (tsk_used_math(target))
+ return;
+
+ /* Begin with data registers set to all 1s... */
+ memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr));
+
+ /* ...and FCSR zeroed */
+ target->thread.fpu.fcr31 = 0;
+
+ /*
+ * Record that the target has "used" math, such that the context
+ * just initialised, and any modifications made by the caller,
+ * aren't discarded.
+ */
+ set_stopped_child_used_math(target);
+}
+
/*
* Called by kernel/ptrace.c when detaching..
*
if (!access_ok(VERIFY_READ, data, 33 * 8))
return -EIO;
+ init_fp_ctx(child);
fregs = get_fpu_regs(child);
for (i = 0; i < 32; i++) {
/* XXX fcr31 */
+ init_fp_ctx(target);
+
if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
&target->thread.fpu,
case FPR_BASE ... FPR_BASE + 31: {
union fpureg *fregs = get_fpu_regs(child);
- if (!tsk_used_math(child)) {
- /* FP not yet used */
- memset(&child->thread.fpu, ~0,
- sizeof(child->thread.fpu));
- child->thread.fpu.fcr31 = 0;
- }
+ init_fp_ctx(child);
#ifdef CONFIG_32BIT
if (test_thread_flag(TIF_32BIT_FPREGS)) {
/*
.endm
.set noreorder
- .set MIPS_ISA_ARCH_LEVEL_RAW
LEAF(_save_fp_context)
.set push
/* Save 32-bit process floating point context */
LEAF(_save_fp_context32)
.set push
+ .set MIPS_ISA_ARCH_LEVEL_RAW
SET_HARDFLOAT
cfc1 t1, fcr31
int process_fpemu_return(int sig, void __user *fault_addr)
{
+ /*
+ * We can't allow the emulated instruction to leave any of the cause
+ * bits set in FCSR. If they were then the kernel would take an FP
+ * exception when restoring FP context.
+ */
+ current->thread.fpu.fcr31 &= ~FPU_CSR_ALL_X;
+
if (sig == SIGSEGV || sig == SIGBUS) {
struct siginfo si = {0};
si.si_addr = fault_addr;
if (notify_die(DIE_FP, "FP exception", regs, 0, regs_to_trapnr(regs),
SIGFPE) == NOTIFY_STOP)
goto out;
+
+ /* Clear FCSR.Cause before enabling interrupts */
+ write_32bit_cp1_register(CP1_STATUS, fcr31 & ~FPU_CSR_ALL_X);
+ local_irq_enable();
+
die_if_kernel("FP exception in kernel code", regs);
if (fcr31 & FPU_CSR_UNI_X) {
sig = fpu_emulator_cop1Handler(regs, ¤t->thread.fpu, 1,
&fault_addr);
- /*
- * We can't allow the emulated instruction to leave any of
- * the cause bit set in $fcr31.
- */
- current->thread.fpu.fcr31 &= ~FPU_CSR_ALL_X;
+ /* If something went wrong, signal */
+ process_fpemu_return(sig, fault_addr);
/* Restore the hardware register state */
own_fpu(1); /* Using the FPU again. */
- /* If something went wrong, signal */
- process_fpemu_return(sig, fault_addr);
-
goto out;
} else if (fcr31 & FPU_CSR_INV_X)
info.si_code = FPE_FLTINV;
exception_exit(prev_state);
}
-asmlinkage void do_msa_fpe(struct pt_regs *regs)
+asmlinkage void do_msa_fpe(struct pt_regs *regs, unsigned int msacsr)
{
enum ctx_state prev_state;
prev_state = exception_enter();
+ if (notify_die(DIE_MSAFP, "MSA FP exception", regs, 0,
+ regs_to_trapnr(regs), SIGFPE) == NOTIFY_STOP)
+ goto out;
+
+ /* Clear MSACSR.Cause before enabling interrupts */
+ write_msa_csr(msacsr & ~MSA_CSR_CAUSEF);
+ local_irq_enable();
+
die_if_kernel("do_msa_fpe invoked from kernel context!", regs);
force_sig(SIGFPE, current);
+out:
exception_exit(prev_state);
}
# Makefile for KVM support for MIPS
#
-common-objs = $(addprefix ../../../virt/kvm/, kvm_main.o coalesced_mmio.o)
+common-objs-y = $(addprefix ../../../virt/kvm/, kvm_main.o coalesced_mmio.o)
EXTRA_CFLAGS += -Ivirt/kvm -Iarch/mips/kvm
-kvm-objs := $(common-objs) mips.o emulate.o locore.o \
+common-objs-$(CONFIG_CPU_HAS_MSA) += msa.o
+
+kvm-objs := $(common-objs-y) mips.o emulate.o locore.o \
interrupt.o stats.o commpage.o \
- dyntrans.o trap_emul.o
+ dyntrans.o trap_emul.o fpu.o
obj-$(CONFIG_KVM) += kvm.o
obj-y += callback.o tlb.o
return EMULATE_DONE;
}
+/**
+ * kvm_mips_config1_wrmask() - Find mask of writable bits in guest Config1
+ * @vcpu: Virtual CPU.
+ *
+ * Finds the mask of bits which are writable in the guest's Config1 CP0
+ * register, by userland (currently read-only to the guest).
+ */
+unsigned int kvm_mips_config1_wrmask(struct kvm_vcpu *vcpu)
+{
+ unsigned int mask = 0;
+
+ /* Permit FPU to be present if FPU is supported */
+ if (kvm_mips_guest_can_have_fpu(&vcpu->arch))
+ mask |= MIPS_CONF1_FP;
+
+ return mask;
+}
+
+/**
+ * kvm_mips_config3_wrmask() - Find mask of writable bits in guest Config3
+ * @vcpu: Virtual CPU.
+ *
+ * Finds the mask of bits which are writable in the guest's Config3 CP0
+ * register, by userland (currently read-only to the guest).
+ */
+unsigned int kvm_mips_config3_wrmask(struct kvm_vcpu *vcpu)
+{
+ /* Config4 is optional */
+ unsigned int mask = MIPS_CONF_M;
+
+ /* Permit MSA to be present if MSA is supported */
+ if (kvm_mips_guest_can_have_msa(&vcpu->arch))
+ mask |= MIPS_CONF3_MSA;
+
+ return mask;
+}
+
+/**
+ * kvm_mips_config4_wrmask() - Find mask of writable bits in guest Config4
+ * @vcpu: Virtual CPU.
+ *
+ * Finds the mask of bits which are writable in the guest's Config4 CP0
+ * register, by userland (currently read-only to the guest).
+ */
+unsigned int kvm_mips_config4_wrmask(struct kvm_vcpu *vcpu)
+{
+ /* Config5 is optional */
+ return MIPS_CONF_M;
+}
+
+/**
+ * kvm_mips_config5_wrmask() - Find mask of writable bits in guest Config5
+ * @vcpu: Virtual CPU.
+ *
+ * Finds the mask of bits which are writable in the guest's Config5 CP0
+ * register, by the guest itself.
+ */
+unsigned int kvm_mips_config5_wrmask(struct kvm_vcpu *vcpu)
+{
+ unsigned int mask = 0;
+
+ /* Permit MSAEn changes if MSA supported and enabled */
+ if (kvm_mips_guest_has_msa(&vcpu->arch))
+ mask |= MIPS_CONF5_MSAEN;
+
+ /*
+ * Permit guest FPU mode changes if FPU is enabled and the relevant
+ * feature exists according to FIR register.
+ */
+ if (kvm_mips_guest_has_fpu(&vcpu->arch)) {
+ if (cpu_has_fre)
+ mask |= MIPS_CONF5_FRE;
+ /* We don't support UFR or UFE */
+ }
+
+ return mask;
+}
+
enum emulation_result kvm_mips_emulate_CP0(uint32_t inst, uint32_t *opc,
uint32_t cause, struct kvm_run *run,
struct kvm_vcpu *vcpu)
kvm_mips_write_compare(vcpu,
vcpu->arch.gprs[rt]);
} else if ((rd == MIPS_CP0_STATUS) && (sel == 0)) {
- kvm_write_c0_guest_status(cop0,
- vcpu->arch.gprs[rt]);
+ unsigned int old_val, val, change;
+
+ old_val = kvm_read_c0_guest_status(cop0);
+ val = vcpu->arch.gprs[rt];
+ change = val ^ old_val;
+
+ /* Make sure that the NMI bit is never set */
+ val &= ~ST0_NMI;
+
+ /*
+ * Don't allow CU1 or FR to be set unless FPU
+ * capability enabled and exists in guest
+ * configuration.
+ */
+ if (!kvm_mips_guest_has_fpu(&vcpu->arch))
+ val &= ~(ST0_CU1 | ST0_FR);
+
+ /*
+ * Also don't allow FR to be set if host doesn't
+ * support it.
+ */
+ if (!(current_cpu_data.fpu_id & MIPS_FPIR_F64))
+ val &= ~ST0_FR;
+
+
+ /* Handle changes in FPU mode */
+ preempt_disable();
+
+ /*
+ * FPU and Vector register state is made
+ * UNPREDICTABLE by a change of FR, so don't
+ * even bother saving it.
+ */
+ if (change & ST0_FR)
+ kvm_drop_fpu(vcpu);
+
+ /*
+ * If MSA state is already live, it is undefined
+ * how it interacts with FR=0 FPU state, and we
+ * don't want to hit reserved instruction
+ * exceptions trying to save the MSA state later
+ * when CU=1 && FR=1, so play it safe and save
+ * it first.
+ */
+ if (change & ST0_CU1 && !(val & ST0_FR) &&
+ vcpu->arch.fpu_inuse & KVM_MIPS_FPU_MSA)
+ kvm_lose_fpu(vcpu);
+
/*
- * Make sure that CU1 and NMI bits are
- * never set
+ * Propagate CU1 (FPU enable) changes
+ * immediately if the FPU context is already
+ * loaded. When disabling we leave the context
+ * loaded so it can be quickly enabled again in
+ * the near future.
*/
- kvm_clear_c0_guest_status(cop0,
- (ST0_CU1 | ST0_NMI));
+ if (change & ST0_CU1 &&
+ vcpu->arch.fpu_inuse & KVM_MIPS_FPU_FPU)
+ change_c0_status(ST0_CU1, val);
+
+ preempt_enable();
+
+ kvm_write_c0_guest_status(cop0, val);
#ifdef CONFIG_KVM_MIPS_DYN_TRANS
- kvm_mips_trans_mtc0(inst, opc, vcpu);
+ /*
+ * If FPU present, we need CU1/FR bits to take
+ * effect fairly soon.
+ */
+ if (!kvm_mips_guest_has_fpu(&vcpu->arch))
+ kvm_mips_trans_mtc0(inst, opc, vcpu);
#endif
+ } else if ((rd == MIPS_CP0_CONFIG) && (sel == 5)) {
+ unsigned int old_val, val, change, wrmask;
+
+ old_val = kvm_read_c0_guest_config5(cop0);
+ val = vcpu->arch.gprs[rt];
+
+ /* Only a few bits are writable in Config5 */
+ wrmask = kvm_mips_config5_wrmask(vcpu);
+ change = (val ^ old_val) & wrmask;
+ val = old_val ^ change;
+
+
+ /* Handle changes in FPU/MSA modes */
+ preempt_disable();
+
+ /*
+ * Propagate FRE changes immediately if the FPU
+ * context is already loaded.
+ */
+ if (change & MIPS_CONF5_FRE &&
+ vcpu->arch.fpu_inuse & KVM_MIPS_FPU_FPU)
+ change_c0_config5(MIPS_CONF5_FRE, val);
+
+ /*
+ * Propagate MSAEn changes immediately if the
+ * MSA context is already loaded. When disabling
+ * we leave the context loaded so it can be
+ * quickly enabled again in the near future.
+ */
+ if (change & MIPS_CONF5_MSAEN &&
+ vcpu->arch.fpu_inuse & KVM_MIPS_FPU_MSA)
+ change_c0_config5(MIPS_CONF5_MSAEN,
+ val);
+
+ preempt_enable();
+
+ kvm_write_c0_guest_config5(cop0, val);
} else if ((rd == MIPS_CP0_CAUSE) && (sel == 0)) {
uint32_t old_cause, new_cause;
return er;
}
+enum emulation_result kvm_mips_emulate_trap_exc(unsigned long cause,
+ uint32_t *opc,
+ struct kvm_run *run,
+ struct kvm_vcpu *vcpu)
+{
+ struct mips_coproc *cop0 = vcpu->arch.cop0;
+ struct kvm_vcpu_arch *arch = &vcpu->arch;
+ enum emulation_result er = EMULATE_DONE;
+
+ if ((kvm_read_c0_guest_status(cop0) & ST0_EXL) == 0) {
+ /* save old pc */
+ kvm_write_c0_guest_epc(cop0, arch->pc);
+ kvm_set_c0_guest_status(cop0, ST0_EXL);
+
+ if (cause & CAUSEF_BD)
+ kvm_set_c0_guest_cause(cop0, CAUSEF_BD);
+ else
+ kvm_clear_c0_guest_cause(cop0, CAUSEF_BD);
+
+ kvm_debug("Delivering TRAP @ pc %#lx\n", arch->pc);
+
+ kvm_change_c0_guest_cause(cop0, (0xff),
+ (T_TRAP << CAUSEB_EXCCODE));
+
+ /* Set PC to the exception entry point */
+ arch->pc = KVM_GUEST_KSEG0 + 0x180;
+
+ } else {
+ kvm_err("Trying to deliver TRAP when EXL is already set\n");
+ er = EMULATE_FAIL;
+ }
+
+ return er;
+}
+
+enum emulation_result kvm_mips_emulate_msafpe_exc(unsigned long cause,
+ uint32_t *opc,
+ struct kvm_run *run,
+ struct kvm_vcpu *vcpu)
+{
+ struct mips_coproc *cop0 = vcpu->arch.cop0;
+ struct kvm_vcpu_arch *arch = &vcpu->arch;
+ enum emulation_result er = EMULATE_DONE;
+
+ if ((kvm_read_c0_guest_status(cop0) & ST0_EXL) == 0) {
+ /* save old pc */
+ kvm_write_c0_guest_epc(cop0, arch->pc);
+ kvm_set_c0_guest_status(cop0, ST0_EXL);
+
+ if (cause & CAUSEF_BD)
+ kvm_set_c0_guest_cause(cop0, CAUSEF_BD);
+ else
+ kvm_clear_c0_guest_cause(cop0, CAUSEF_BD);
+
+ kvm_debug("Delivering MSAFPE @ pc %#lx\n", arch->pc);
+
+ kvm_change_c0_guest_cause(cop0, (0xff),
+ (T_MSAFPE << CAUSEB_EXCCODE));
+
+ /* Set PC to the exception entry point */
+ arch->pc = KVM_GUEST_KSEG0 + 0x180;
+
+ } else {
+ kvm_err("Trying to deliver MSAFPE when EXL is already set\n");
+ er = EMULATE_FAIL;
+ }
+
+ return er;
+}
+
+enum emulation_result kvm_mips_emulate_fpe_exc(unsigned long cause,
+ uint32_t *opc,
+ struct kvm_run *run,
+ struct kvm_vcpu *vcpu)
+{
+ struct mips_coproc *cop0 = vcpu->arch.cop0;
+ struct kvm_vcpu_arch *arch = &vcpu->arch;
+ enum emulation_result er = EMULATE_DONE;
+
+ if ((kvm_read_c0_guest_status(cop0) & ST0_EXL) == 0) {
+ /* save old pc */
+ kvm_write_c0_guest_epc(cop0, arch->pc);
+ kvm_set_c0_guest_status(cop0, ST0_EXL);
+
+ if (cause & CAUSEF_BD)
+ kvm_set_c0_guest_cause(cop0, CAUSEF_BD);
+ else
+ kvm_clear_c0_guest_cause(cop0, CAUSEF_BD);
+
+ kvm_debug("Delivering FPE @ pc %#lx\n", arch->pc);
+
+ kvm_change_c0_guest_cause(cop0, (0xff),
+ (T_FPE << CAUSEB_EXCCODE));
+
+ /* Set PC to the exception entry point */
+ arch->pc = KVM_GUEST_KSEG0 + 0x180;
+
+ } else {
+ kvm_err("Trying to deliver FPE when EXL is already set\n");
+ er = EMULATE_FAIL;
+ }
+
+ return er;
+}
+
+enum emulation_result kvm_mips_emulate_msadis_exc(unsigned long cause,
+ uint32_t *opc,
+ struct kvm_run *run,
+ struct kvm_vcpu *vcpu)
+{
+ struct mips_coproc *cop0 = vcpu->arch.cop0;
+ struct kvm_vcpu_arch *arch = &vcpu->arch;
+ enum emulation_result er = EMULATE_DONE;
+
+ if ((kvm_read_c0_guest_status(cop0) & ST0_EXL) == 0) {
+ /* save old pc */
+ kvm_write_c0_guest_epc(cop0, arch->pc);
+ kvm_set_c0_guest_status(cop0, ST0_EXL);
+
+ if (cause & CAUSEF_BD)
+ kvm_set_c0_guest_cause(cop0, CAUSEF_BD);
+ else
+ kvm_clear_c0_guest_cause(cop0, CAUSEF_BD);
+
+ kvm_debug("Delivering MSADIS @ pc %#lx\n", arch->pc);
+
+ kvm_change_c0_guest_cause(cop0, (0xff),
+ (T_MSADIS << CAUSEB_EXCCODE));
+
+ /* Set PC to the exception entry point */
+ arch->pc = KVM_GUEST_KSEG0 + 0x180;
+
+ } else {
+ kvm_err("Trying to deliver MSADIS when EXL is already set\n");
+ er = EMULATE_FAIL;
+ }
+
+ return er;
+}
+
/* ll/sc, rdhwr, sync emulation */
#define OPCODE 0xfc000000
case T_SYSCALL:
case T_BREAK:
case T_RES_INST:
+ case T_TRAP:
+ case T_MSAFPE:
+ case T_FPE:
+ case T_MSADIS:
break;
case T_COP_UNUSABLE:
--- /dev/null
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * FPU context handling code for KVM.
+ *
+ * Copyright (C) 2015 Imagination Technologies Ltd.
+ */
+
+#include <asm/asm.h>
+#include <asm/asm-offsets.h>
+#include <asm/fpregdef.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+
+ .set noreorder
+ .set noat
+
+LEAF(__kvm_save_fpu)
+ .set push
+ .set mips64r2
+ SET_HARDFLOAT
+ mfc0 t0, CP0_STATUS
+ sll t0, t0, 5 # is Status.FR set?
+ bgez t0, 1f # no: skip odd doubles
+ nop
+ sdc1 $f1, VCPU_FPR1(a0)
+ sdc1 $f3, VCPU_FPR3(a0)
+ sdc1 $f5, VCPU_FPR5(a0)
+ sdc1 $f7, VCPU_FPR7(a0)
+ sdc1 $f9, VCPU_FPR9(a0)
+ sdc1 $f11, VCPU_FPR11(a0)
+ sdc1 $f13, VCPU_FPR13(a0)
+ sdc1 $f15, VCPU_FPR15(a0)
+ sdc1 $f17, VCPU_FPR17(a0)
+ sdc1 $f19, VCPU_FPR19(a0)
+ sdc1 $f21, VCPU_FPR21(a0)
+ sdc1 $f23, VCPU_FPR23(a0)
+ sdc1 $f25, VCPU_FPR25(a0)
+ sdc1 $f27, VCPU_FPR27(a0)
+ sdc1 $f29, VCPU_FPR29(a0)
+ sdc1 $f31, VCPU_FPR31(a0)
+1: sdc1 $f0, VCPU_FPR0(a0)
+ sdc1 $f2, VCPU_FPR2(a0)
+ sdc1 $f4, VCPU_FPR4(a0)
+ sdc1 $f6, VCPU_FPR6(a0)
+ sdc1 $f8, VCPU_FPR8(a0)
+ sdc1 $f10, VCPU_FPR10(a0)
+ sdc1 $f12, VCPU_FPR12(a0)
+ sdc1 $f14, VCPU_FPR14(a0)
+ sdc1 $f16, VCPU_FPR16(a0)
+ sdc1 $f18, VCPU_FPR18(a0)
+ sdc1 $f20, VCPU_FPR20(a0)
+ sdc1 $f22, VCPU_FPR22(a0)
+ sdc1 $f24, VCPU_FPR24(a0)
+ sdc1 $f26, VCPU_FPR26(a0)
+ sdc1 $f28, VCPU_FPR28(a0)
+ jr ra
+ sdc1 $f30, VCPU_FPR30(a0)
+ .set pop
+ END(__kvm_save_fpu)
+
+LEAF(__kvm_restore_fpu)
+ .set push
+ .set mips64r2
+ SET_HARDFLOAT
+ mfc0 t0, CP0_STATUS
+ sll t0, t0, 5 # is Status.FR set?
+ bgez t0, 1f # no: skip odd doubles
+ nop
+ ldc1 $f1, VCPU_FPR1(a0)
+ ldc1 $f3, VCPU_FPR3(a0)
+ ldc1 $f5, VCPU_FPR5(a0)
+ ldc1 $f7, VCPU_FPR7(a0)
+ ldc1 $f9, VCPU_FPR9(a0)
+ ldc1 $f11, VCPU_FPR11(a0)
+ ldc1 $f13, VCPU_FPR13(a0)
+ ldc1 $f15, VCPU_FPR15(a0)
+ ldc1 $f17, VCPU_FPR17(a0)
+ ldc1 $f19, VCPU_FPR19(a0)
+ ldc1 $f21, VCPU_FPR21(a0)
+ ldc1 $f23, VCPU_FPR23(a0)
+ ldc1 $f25, VCPU_FPR25(a0)
+ ldc1 $f27, VCPU_FPR27(a0)
+ ldc1 $f29, VCPU_FPR29(a0)
+ ldc1 $f31, VCPU_FPR31(a0)
+1: ldc1 $f0, VCPU_FPR0(a0)
+ ldc1 $f2, VCPU_FPR2(a0)
+ ldc1 $f4, VCPU_FPR4(a0)
+ ldc1 $f6, VCPU_FPR6(a0)
+ ldc1 $f8, VCPU_FPR8(a0)
+ ldc1 $f10, VCPU_FPR10(a0)
+ ldc1 $f12, VCPU_FPR12(a0)
+ ldc1 $f14, VCPU_FPR14(a0)
+ ldc1 $f16, VCPU_FPR16(a0)
+ ldc1 $f18, VCPU_FPR18(a0)
+ ldc1 $f20, VCPU_FPR20(a0)
+ ldc1 $f22, VCPU_FPR22(a0)
+ ldc1 $f24, VCPU_FPR24(a0)
+ ldc1 $f26, VCPU_FPR26(a0)
+ ldc1 $f28, VCPU_FPR28(a0)
+ jr ra
+ ldc1 $f30, VCPU_FPR30(a0)
+ .set pop
+ END(__kvm_restore_fpu)
+
+LEAF(__kvm_restore_fcsr)
+ .set push
+ SET_HARDFLOAT
+ lw t0, VCPU_FCR31(a0)
+ /*
+ * The ctc1 must stay at this offset in __kvm_restore_fcsr.
+ * See kvm_mips_csr_die_notify() which handles t0 containing a value
+ * which triggers an FP Exception, which must be stepped over and
+ * ignored since the set cause bits must remain there for the guest.
+ */
+ ctc1 t0, fcr31
+ jr ra
+ nop
+ .set pop
+ END(__kvm_restore_fcsr)
#define PT_HOST_USERLOCAL PT_EPC
#define CP0_DDATA_LO $28,3
+#define CP0_CONFIG3 $16,3
+#define CP0_CONFIG5 $16,5
#define CP0_EBASE $15,1
#define CP0_INTCTL $12,1
LONG_L k0, VCPU_HOST_EBASE(k1)
mtc0 k0,CP0_EBASE
+ /*
+ * If FPU is enabled, save FCR31 and clear it so that later ctc1's don't
+ * trigger FPE for pending exceptions.
+ */
+ .set at
+ and v1, v0, ST0_CU1
+ beqz v1, 1f
+ nop
+ .set push
+ SET_HARDFLOAT
+ cfc1 t0, fcr31
+ sw t0, VCPU_FCR31(k1)
+ ctc1 zero,fcr31
+ .set pop
+ .set noat
+1:
+
+#ifdef CONFIG_CPU_HAS_MSA
+ /*
+ * If MSA is enabled, save MSACSR and clear it so that later
+ * instructions don't trigger MSAFPE for pending exceptions.
+ */
+ mfc0 t0, CP0_CONFIG3
+ ext t0, t0, 28, 1 /* MIPS_CONF3_MSAP */
+ beqz t0, 1f
+ nop
+ mfc0 t0, CP0_CONFIG5
+ ext t0, t0, 27, 1 /* MIPS_CONF5_MSAEN */
+ beqz t0, 1f
+ nop
+ _cfcmsa t0, MSA_CSR
+ sw t0, VCPU_MSA_CSR(k1)
+ _ctcmsa MSA_CSR, zero
+1:
+#endif
+
/* Now that the new EBASE has been loaded, unset BEV and KSU_USER */
.set at
and v0, v0, ~(ST0_EXL | KSU_USER | ST0_IE)
#include <linux/errno.h>
#include <linux/err.h>
+#include <linux/kdebug.h>
#include <linux/module.h>
#include <linux/vmalloc.h>
#include <linux/fs.h>
{ "syscall", VCPU_STAT(syscall_exits), KVM_STAT_VCPU },
{ "resvd_inst", VCPU_STAT(resvd_inst_exits), KVM_STAT_VCPU },
{ "break_inst", VCPU_STAT(break_inst_exits), KVM_STAT_VCPU },
+ { "trap_inst", VCPU_STAT(trap_inst_exits), KVM_STAT_VCPU },
+ { "msa_fpe", VCPU_STAT(msa_fpe_exits), KVM_STAT_VCPU },
+ { "fpe", VCPU_STAT(fpe_exits), KVM_STAT_VCPU },
+ { "msa_disabled", VCPU_STAT(msa_disabled_exits), KVM_STAT_VCPU },
{ "flush_dcache", VCPU_STAT(flush_dcache_exits), KVM_STAT_VCPU },
{ "halt_successful_poll", VCPU_STAT(halt_successful_poll), KVM_STAT_VCPU },
{ "halt_wakeup", VCPU_STAT(halt_wakeup), KVM_STAT_VCPU },
KVM_REG_MIPS_CP0_STATUS,
KVM_REG_MIPS_CP0_CAUSE,
KVM_REG_MIPS_CP0_EPC,
+ KVM_REG_MIPS_CP0_PRID,
KVM_REG_MIPS_CP0_CONFIG,
KVM_REG_MIPS_CP0_CONFIG1,
KVM_REG_MIPS_CP0_CONFIG2,
KVM_REG_MIPS_CP0_CONFIG3,
+ KVM_REG_MIPS_CP0_CONFIG4,
+ KVM_REG_MIPS_CP0_CONFIG5,
KVM_REG_MIPS_CP0_CONFIG7,
KVM_REG_MIPS_CP0_ERROREPC,
const struct kvm_one_reg *reg)
{
struct mips_coproc *cop0 = vcpu->arch.cop0;
+ struct mips_fpu_struct *fpu = &vcpu->arch.fpu;
int ret;
s64 v;
+ s64 vs[2];
+ unsigned int idx;
switch (reg->id) {
+ /* General purpose registers */
case KVM_REG_MIPS_R0 ... KVM_REG_MIPS_R31:
v = (long)vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0];
break;
v = (long)vcpu->arch.pc;
break;
+ /* Floating point registers */
+ case KVM_REG_MIPS_FPR_32(0) ... KVM_REG_MIPS_FPR_32(31):
+ if (!kvm_mips_guest_has_fpu(&vcpu->arch))
+ return -EINVAL;
+ idx = reg->id - KVM_REG_MIPS_FPR_32(0);
+ /* Odd singles in top of even double when FR=0 */
+ if (kvm_read_c0_guest_status(cop0) & ST0_FR)
+ v = get_fpr32(&fpu->fpr[idx], 0);
+ else
+ v = get_fpr32(&fpu->fpr[idx & ~1], idx & 1);
+ break;
+ case KVM_REG_MIPS_FPR_64(0) ... KVM_REG_MIPS_FPR_64(31):
+ if (!kvm_mips_guest_has_fpu(&vcpu->arch))
+ return -EINVAL;
+ idx = reg->id - KVM_REG_MIPS_FPR_64(0);
+ /* Can't access odd doubles in FR=0 mode */
+ if (idx & 1 && !(kvm_read_c0_guest_status(cop0) & ST0_FR))
+ return -EINVAL;
+ v = get_fpr64(&fpu->fpr[idx], 0);
+ break;
+ case KVM_REG_MIPS_FCR_IR:
+ if (!kvm_mips_guest_has_fpu(&vcpu->arch))
+ return -EINVAL;
+ v = boot_cpu_data.fpu_id;
+ break;
+ case KVM_REG_MIPS_FCR_CSR:
+ if (!kvm_mips_guest_has_fpu(&vcpu->arch))
+ return -EINVAL;
+ v = fpu->fcr31;
+ break;
+
+ /* MIPS SIMD Architecture (MSA) registers */
+ case KVM_REG_MIPS_VEC_128(0) ... KVM_REG_MIPS_VEC_128(31):
+ if (!kvm_mips_guest_has_msa(&vcpu->arch))
+ return -EINVAL;
+ /* Can't access MSA registers in FR=0 mode */
+ if (!(kvm_read_c0_guest_status(cop0) & ST0_FR))
+ return -EINVAL;
+ idx = reg->id - KVM_REG_MIPS_VEC_128(0);
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
+ /* least significant byte first */
+ vs[0] = get_fpr64(&fpu->fpr[idx], 0);
+ vs[1] = get_fpr64(&fpu->fpr[idx], 1);
+#else
+ /* most significant byte first */
+ vs[0] = get_fpr64(&fpu->fpr[idx], 1);
+ vs[1] = get_fpr64(&fpu->fpr[idx], 0);
+#endif
+ break;
+ case KVM_REG_MIPS_MSA_IR:
+ if (!kvm_mips_guest_has_msa(&vcpu->arch))
+ return -EINVAL;
+ v = boot_cpu_data.msa_id;
+ break;
+ case KVM_REG_MIPS_MSA_CSR:
+ if (!kvm_mips_guest_has_msa(&vcpu->arch))
+ return -EINVAL;
+ v = fpu->msacsr;
+ break;
+
+ /* Co-processor 0 registers */
case KVM_REG_MIPS_CP0_INDEX:
v = (long)kvm_read_c0_guest_index(cop0);
break;
case KVM_REG_MIPS_CP0_EPC:
v = (long)kvm_read_c0_guest_epc(cop0);
break;
- case KVM_REG_MIPS_CP0_ERROREPC:
- v = (long)kvm_read_c0_guest_errorepc(cop0);
+ case KVM_REG_MIPS_CP0_PRID:
+ v = (long)kvm_read_c0_guest_prid(cop0);
break;
case KVM_REG_MIPS_CP0_CONFIG:
v = (long)kvm_read_c0_guest_config(cop0);
case KVM_REG_MIPS_CP0_CONFIG3:
v = (long)kvm_read_c0_guest_config3(cop0);
break;
+ case KVM_REG_MIPS_CP0_CONFIG4:
+ v = (long)kvm_read_c0_guest_config4(cop0);
+ break;
+ case KVM_REG_MIPS_CP0_CONFIG5:
+ v = (long)kvm_read_c0_guest_config5(cop0);
+ break;
case KVM_REG_MIPS_CP0_CONFIG7:
v = (long)kvm_read_c0_guest_config7(cop0);
break;
+ case KVM_REG_MIPS_CP0_ERROREPC:
+ v = (long)kvm_read_c0_guest_errorepc(cop0);
+ break;
/* registers to be handled specially */
case KVM_REG_MIPS_CP0_COUNT:
case KVM_REG_MIPS_COUNT_CTL:
u32 v32 = (u32)v;
return put_user(v32, uaddr32);
+ } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U128) {
+ void __user *uaddr = (void __user *)(long)reg->addr;
+
+ return copy_to_user(uaddr, vs, 16);
} else {
return -EINVAL;
}
const struct kvm_one_reg *reg)
{
struct mips_coproc *cop0 = vcpu->arch.cop0;
- u64 v;
+ struct mips_fpu_struct *fpu = &vcpu->arch.fpu;
+ s64 v;
+ s64 vs[2];
+ unsigned int idx;
if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
if (get_user(v32, uaddr32) != 0)
return -EFAULT;
v = (s64)v32;
+ } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U128) {
+ void __user *uaddr = (void __user *)(long)reg->addr;
+
+ return copy_from_user(vs, uaddr, 16);
} else {
return -EINVAL;
}
switch (reg->id) {
+ /* General purpose registers */
case KVM_REG_MIPS_R0:
/* Silently ignore requests to set $0 */
break;
vcpu->arch.pc = v;
break;
+ /* Floating point registers */
+ case KVM_REG_MIPS_FPR_32(0) ... KVM_REG_MIPS_FPR_32(31):
+ if (!kvm_mips_guest_has_fpu(&vcpu->arch))
+ return -EINVAL;
+ idx = reg->id - KVM_REG_MIPS_FPR_32(0);
+ /* Odd singles in top of even double when FR=0 */
+ if (kvm_read_c0_guest_status(cop0) & ST0_FR)
+ set_fpr32(&fpu->fpr[idx], 0, v);
+ else
+ set_fpr32(&fpu->fpr[idx & ~1], idx & 1, v);
+ break;
+ case KVM_REG_MIPS_FPR_64(0) ... KVM_REG_MIPS_FPR_64(31):
+ if (!kvm_mips_guest_has_fpu(&vcpu->arch))
+ return -EINVAL;
+ idx = reg->id - KVM_REG_MIPS_FPR_64(0);
+ /* Can't access odd doubles in FR=0 mode */
+ if (idx & 1 && !(kvm_read_c0_guest_status(cop0) & ST0_FR))
+ return -EINVAL;
+ set_fpr64(&fpu->fpr[idx], 0, v);
+ break;
+ case KVM_REG_MIPS_FCR_IR:
+ if (!kvm_mips_guest_has_fpu(&vcpu->arch))
+ return -EINVAL;
+ /* Read-only */
+ break;
+ case KVM_REG_MIPS_FCR_CSR:
+ if (!kvm_mips_guest_has_fpu(&vcpu->arch))
+ return -EINVAL;
+ fpu->fcr31 = v;
+ break;
+
+ /* MIPS SIMD Architecture (MSA) registers */
+ case KVM_REG_MIPS_VEC_128(0) ... KVM_REG_MIPS_VEC_128(31):
+ if (!kvm_mips_guest_has_msa(&vcpu->arch))
+ return -EINVAL;
+ idx = reg->id - KVM_REG_MIPS_VEC_128(0);
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
+ /* least significant byte first */
+ set_fpr64(&fpu->fpr[idx], 0, vs[0]);
+ set_fpr64(&fpu->fpr[idx], 1, vs[1]);
+#else
+ /* most significant byte first */
+ set_fpr64(&fpu->fpr[idx], 1, vs[0]);
+ set_fpr64(&fpu->fpr[idx], 0, vs[1]);
+#endif
+ break;
+ case KVM_REG_MIPS_MSA_IR:
+ if (!kvm_mips_guest_has_msa(&vcpu->arch))
+ return -EINVAL;
+ /* Read-only */
+ break;
+ case KVM_REG_MIPS_MSA_CSR:
+ if (!kvm_mips_guest_has_msa(&vcpu->arch))
+ return -EINVAL;
+ fpu->msacsr = v;
+ break;
+
+ /* Co-processor 0 registers */
case KVM_REG_MIPS_CP0_INDEX:
kvm_write_c0_guest_index(cop0, v);
break;
case KVM_REG_MIPS_CP0_EPC:
kvm_write_c0_guest_epc(cop0, v);
break;
+ case KVM_REG_MIPS_CP0_PRID:
+ kvm_write_c0_guest_prid(cop0, v);
+ break;
case KVM_REG_MIPS_CP0_ERROREPC:
kvm_write_c0_guest_errorepc(cop0, v);
break;
case KVM_REG_MIPS_CP0_COUNT:
case KVM_REG_MIPS_CP0_COMPARE:
case KVM_REG_MIPS_CP0_CAUSE:
+ case KVM_REG_MIPS_CP0_CONFIG:
+ case KVM_REG_MIPS_CP0_CONFIG1:
+ case KVM_REG_MIPS_CP0_CONFIG2:
+ case KVM_REG_MIPS_CP0_CONFIG3:
+ case KVM_REG_MIPS_CP0_CONFIG4:
+ case KVM_REG_MIPS_CP0_CONFIG5:
case KVM_REG_MIPS_COUNT_CTL:
case KVM_REG_MIPS_COUNT_RESUME:
case KVM_REG_MIPS_COUNT_HZ:
return 0;
}
+static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
+ struct kvm_enable_cap *cap)
+{
+ int r = 0;
+
+ if (!kvm_vm_ioctl_check_extension(vcpu->kvm, cap->cap))
+ return -EINVAL;
+ if (cap->flags)
+ return -EINVAL;
+ if (cap->args[0])
+ return -EINVAL;
+
+ switch (cap->cap) {
+ case KVM_CAP_MIPS_FPU:
+ vcpu->arch.fpu_enabled = true;
+ break;
+ case KVM_CAP_MIPS_MSA:
+ vcpu->arch.msa_enabled = true;
+ break;
+ default:
+ r = -EINVAL;
+ break;
+ }
+
+ return r;
+}
+
long kvm_arch_vcpu_ioctl(struct file *filp, unsigned int ioctl,
unsigned long arg)
{
r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
break;
}
+ case KVM_ENABLE_CAP: {
+ struct kvm_enable_cap cap;
+
+ r = -EFAULT;
+ if (copy_from_user(&cap, argp, sizeof(cap)))
+ goto out;
+ r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
+ break;
+ }
default:
r = -ENOIOCTLCMD;
}
switch (ext) {
case KVM_CAP_ONE_REG:
+ case KVM_CAP_ENABLE_CAP:
r = 1;
break;
case KVM_CAP_COALESCED_MMIO:
r = KVM_COALESCED_MMIO_PAGE_OFFSET;
break;
+ case KVM_CAP_MIPS_FPU:
+ r = !!cpu_has_fpu;
+ break;
+ case KVM_CAP_MIPS_MSA:
+ /*
+ * We don't support MSA vector partitioning yet:
+ * 1) It would require explicit support which can't be tested
+ * yet due to lack of support in current hardware.
+ * 2) It extends the state that would need to be saved/restored
+ * by e.g. QEMU for migration.
+ *
+ * When vector partitioning hardware becomes available, support
+ * could be added by requiring a flag when enabling
+ * KVM_CAP_MIPS_MSA capability to indicate that userland knows
+ * to save/restore the appropriate extra state.
+ */
+ r = cpu_has_msa && !(boot_cpu_data.msa_id & MSA_IR_WRPF);
+ break;
default:
r = 0;
break;
ret = kvm_mips_callbacks->handle_break(vcpu);
break;
+ case T_TRAP:
+ ++vcpu->stat.trap_inst_exits;
+ trace_kvm_exit(vcpu, TRAP_INST_EXITS);
+ ret = kvm_mips_callbacks->handle_trap(vcpu);
+ break;
+
+ case T_MSAFPE:
+ ++vcpu->stat.msa_fpe_exits;
+ trace_kvm_exit(vcpu, MSA_FPE_EXITS);
+ ret = kvm_mips_callbacks->handle_msa_fpe(vcpu);
+ break;
+
+ case T_FPE:
+ ++vcpu->stat.fpe_exits;
+ trace_kvm_exit(vcpu, FPE_EXITS);
+ ret = kvm_mips_callbacks->handle_fpe(vcpu);
+ break;
+
+ case T_MSADIS:
+ ++vcpu->stat.msa_disabled_exits;
+ trace_kvm_exit(vcpu, MSA_DISABLED_EXITS);
+ ret = kvm_mips_callbacks->handle_msa_disabled(vcpu);
+ break;
+
default:
kvm_err("Exception Code: %d, not yet handled, @ PC: %p, inst: 0x%08x BadVaddr: %#lx Status: %#lx\n",
exccode, opc, kvm_get_inst(opc, vcpu), badvaddr,
}
}
+ if (ret == RESUME_GUEST) {
+ /*
+ * If FPU / MSA are enabled (i.e. the guest's FPU / MSA context
+ * is live), restore FCR31 / MSACSR.
+ *
+ * This should be before returning to the guest exception
+ * vector, as it may well cause an [MSA] FP exception if there
+ * are pending exception bits unmasked. (see
+ * kvm_mips_csr_die_notifier() for how that is handled).
+ */
+ if (kvm_mips_guest_has_fpu(&vcpu->arch) &&
+ read_c0_status() & ST0_CU1)
+ __kvm_restore_fcsr(&vcpu->arch);
+
+ if (kvm_mips_guest_has_msa(&vcpu->arch) &&
+ read_c0_config5() & MIPS_CONF5_MSAEN)
+ __kvm_restore_msacsr(&vcpu->arch);
+ }
+
/* Disable HTW before returning to guest or host */
htw_stop();
return ret;
}
+/* Enable FPU for guest and restore context */
+void kvm_own_fpu(struct kvm_vcpu *vcpu)
+{
+ struct mips_coproc *cop0 = vcpu->arch.cop0;
+ unsigned int sr, cfg5;
+
+ preempt_disable();
+
+ sr = kvm_read_c0_guest_status(cop0);
+
+ /*
+ * If MSA state is already live, it is undefined how it interacts with
+ * FR=0 FPU state, and we don't want to hit reserved instruction
+ * exceptions trying to save the MSA state later when CU=1 && FR=1, so
+ * play it safe and save it first.
+ *
+ * In theory we shouldn't ever hit this case since kvm_lose_fpu() should
+ * get called when guest CU1 is set, however we can't trust the guest
+ * not to clobber the status register directly via the commpage.
+ */
+ if (cpu_has_msa && sr & ST0_CU1 && !(sr & ST0_FR) &&
+ vcpu->arch.fpu_inuse & KVM_MIPS_FPU_MSA)
+ kvm_lose_fpu(vcpu);
+
+ /*
+ * Enable FPU for guest
+ * We set FR and FRE according to guest context
+ */
+ change_c0_status(ST0_CU1 | ST0_FR, sr);
+ if (cpu_has_fre) {
+ cfg5 = kvm_read_c0_guest_config5(cop0);
+ change_c0_config5(MIPS_CONF5_FRE, cfg5);
+ }
+ enable_fpu_hazard();
+
+ /* If guest FPU state not active, restore it now */
+ if (!(vcpu->arch.fpu_inuse & KVM_MIPS_FPU_FPU)) {
+ __kvm_restore_fpu(&vcpu->arch);
+ vcpu->arch.fpu_inuse |= KVM_MIPS_FPU_FPU;
+ }
+
+ preempt_enable();
+}
+
+#ifdef CONFIG_CPU_HAS_MSA
+/* Enable MSA for guest and restore context */
+void kvm_own_msa(struct kvm_vcpu *vcpu)
+{
+ struct mips_coproc *cop0 = vcpu->arch.cop0;
+ unsigned int sr, cfg5;
+
+ preempt_disable();
+
+ /*
+ * Enable FPU if enabled in guest, since we're restoring FPU context
+ * anyway. We set FR and FRE according to guest context.
+ */
+ if (kvm_mips_guest_has_fpu(&vcpu->arch)) {
+ sr = kvm_read_c0_guest_status(cop0);
+
+ /*
+ * If FR=0 FPU state is already live, it is undefined how it
+ * interacts with MSA state, so play it safe and save it first.
+ */
+ if (!(sr & ST0_FR) &&
+ (vcpu->arch.fpu_inuse & (KVM_MIPS_FPU_FPU |
+ KVM_MIPS_FPU_MSA)) == KVM_MIPS_FPU_FPU)
+ kvm_lose_fpu(vcpu);
+
+ change_c0_status(ST0_CU1 | ST0_FR, sr);
+ if (sr & ST0_CU1 && cpu_has_fre) {
+ cfg5 = kvm_read_c0_guest_config5(cop0);
+ change_c0_config5(MIPS_CONF5_FRE, cfg5);
+ }
+ }
+
+ /* Enable MSA for guest */
+ set_c0_config5(MIPS_CONF5_MSAEN);
+ enable_fpu_hazard();
+
+ switch (vcpu->arch.fpu_inuse & (KVM_MIPS_FPU_FPU | KVM_MIPS_FPU_MSA)) {
+ case KVM_MIPS_FPU_FPU:
+ /*
+ * Guest FPU state already loaded, only restore upper MSA state
+ */
+ __kvm_restore_msa_upper(&vcpu->arch);
+ vcpu->arch.fpu_inuse |= KVM_MIPS_FPU_MSA;
+ break;
+ case 0:
+ /* Neither FPU or MSA already active, restore full MSA state */
+ __kvm_restore_msa(&vcpu->arch);
+ vcpu->arch.fpu_inuse |= KVM_MIPS_FPU_MSA;
+ if (kvm_mips_guest_has_fpu(&vcpu->arch))
+ vcpu->arch.fpu_inuse |= KVM_MIPS_FPU_FPU;
+ break;
+ default:
+ break;
+ }
+
+ preempt_enable();
+}
+#endif
+
+/* Drop FPU & MSA without saving it */
+void kvm_drop_fpu(struct kvm_vcpu *vcpu)
+{
+ preempt_disable();
+ if (cpu_has_msa && vcpu->arch.fpu_inuse & KVM_MIPS_FPU_MSA) {
+ disable_msa();
+ vcpu->arch.fpu_inuse &= ~KVM_MIPS_FPU_MSA;
+ }
+ if (vcpu->arch.fpu_inuse & KVM_MIPS_FPU_FPU) {
+ clear_c0_status(ST0_CU1 | ST0_FR);
+ vcpu->arch.fpu_inuse &= ~KVM_MIPS_FPU_FPU;
+ }
+ preempt_enable();
+}
+
+/* Save and disable FPU & MSA */
+void kvm_lose_fpu(struct kvm_vcpu *vcpu)
+{
+ /*
+ * FPU & MSA get disabled in root context (hardware) when it is disabled
+ * in guest context (software), but the register state in the hardware
+ * may still be in use. This is why we explicitly re-enable the hardware
+ * before saving.
+ */
+
+ preempt_disable();
+ if (cpu_has_msa && vcpu->arch.fpu_inuse & KVM_MIPS_FPU_MSA) {
+ set_c0_config5(MIPS_CONF5_MSAEN);
+ enable_fpu_hazard();
+
+ __kvm_save_msa(&vcpu->arch);
+
+ /* Disable MSA & FPU */
+ disable_msa();
+ if (vcpu->arch.fpu_inuse & KVM_MIPS_FPU_FPU)
+ clear_c0_status(ST0_CU1 | ST0_FR);
+ vcpu->arch.fpu_inuse &= ~(KVM_MIPS_FPU_FPU | KVM_MIPS_FPU_MSA);
+ } else if (vcpu->arch.fpu_inuse & KVM_MIPS_FPU_FPU) {
+ set_c0_status(ST0_CU1);
+ enable_fpu_hazard();
+
+ __kvm_save_fpu(&vcpu->arch);
+ vcpu->arch.fpu_inuse &= ~KVM_MIPS_FPU_FPU;
+
+ /* Disable FPU */
+ clear_c0_status(ST0_CU1 | ST0_FR);
+ }
+ preempt_enable();
+}
+
+/*
+ * Step over a specific ctc1 to FCSR and a specific ctcmsa to MSACSR which are
+ * used to restore guest FCSR/MSACSR state and may trigger a "harmless" FP/MSAFP
+ * exception if cause bits are set in the value being written.
+ */
+static int kvm_mips_csr_die_notify(struct notifier_block *self,
+ unsigned long cmd, void *ptr)
+{
+ struct die_args *args = (struct die_args *)ptr;
+ struct pt_regs *regs = args->regs;
+ unsigned long pc;
+
+ /* Only interested in FPE and MSAFPE */
+ if (cmd != DIE_FP && cmd != DIE_MSAFP)
+ return NOTIFY_DONE;
+
+ /* Return immediately if guest context isn't active */
+ if (!(current->flags & PF_VCPU))
+ return NOTIFY_DONE;
+
+ /* Should never get here from user mode */
+ BUG_ON(user_mode(regs));
+
+ pc = instruction_pointer(regs);
+ switch (cmd) {
+ case DIE_FP:
+ /* match 2nd instruction in __kvm_restore_fcsr */
+ if (pc != (unsigned long)&__kvm_restore_fcsr + 4)
+ return NOTIFY_DONE;
+ break;
+ case DIE_MSAFP:
+ /* match 2nd/3rd instruction in __kvm_restore_msacsr */
+ if (!cpu_has_msa ||
+ pc < (unsigned long)&__kvm_restore_msacsr + 4 ||
+ pc > (unsigned long)&__kvm_restore_msacsr + 8)
+ return NOTIFY_DONE;
+ break;
+ }
+
+ /* Move PC forward a little and continue executing */
+ instruction_pointer(regs) += 4;
+
+ return NOTIFY_STOP;
+}
+
+static struct notifier_block kvm_mips_csr_die_notifier = {
+ .notifier_call = kvm_mips_csr_die_notify,
+};
+
int __init kvm_mips_init(void)
{
int ret;
if (ret)
return ret;
+ register_die_notifier(&kvm_mips_csr_die_notifier);
+
/*
* On MIPS, kernel modules are executed from "mapped space", which
* requires TLBs. The TLB handling code is statically linked with
kvm_mips_release_pfn_clean = kvm_release_pfn_clean;
kvm_mips_is_error_pfn = is_error_pfn;
- pr_info("KVM/MIPS Initialized\n");
return 0;
}
kvm_mips_release_pfn_clean = NULL;
kvm_mips_is_error_pfn = NULL;
- pr_info("KVM/MIPS unloaded\n");
+ unregister_die_notifier(&kvm_mips_csr_die_notifier);
}
module_init(kvm_mips_init);
--- /dev/null
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * MIPS SIMD Architecture (MSA) context handling code for KVM.
+ *
+ * Copyright (C) 2015 Imagination Technologies Ltd.
+ */
+
+#include <asm/asm.h>
+#include <asm/asm-offsets.h>
+#include <asm/asmmacro.h>
+#include <asm/regdef.h>
+
+ .set noreorder
+ .set noat
+
+LEAF(__kvm_save_msa)
+ st_d 0, VCPU_FPR0, a0
+ st_d 1, VCPU_FPR1, a0
+ st_d 2, VCPU_FPR2, a0
+ st_d 3, VCPU_FPR3, a0
+ st_d 4, VCPU_FPR4, a0
+ st_d 5, VCPU_FPR5, a0
+ st_d 6, VCPU_FPR6, a0
+ st_d 7, VCPU_FPR7, a0
+ st_d 8, VCPU_FPR8, a0
+ st_d 9, VCPU_FPR9, a0
+ st_d 10, VCPU_FPR10, a0
+ st_d 11, VCPU_FPR11, a0
+ st_d 12, VCPU_FPR12, a0
+ st_d 13, VCPU_FPR13, a0
+ st_d 14, VCPU_FPR14, a0
+ st_d 15, VCPU_FPR15, a0
+ st_d 16, VCPU_FPR16, a0
+ st_d 17, VCPU_FPR17, a0
+ st_d 18, VCPU_FPR18, a0
+ st_d 19, VCPU_FPR19, a0
+ st_d 20, VCPU_FPR20, a0
+ st_d 21, VCPU_FPR21, a0
+ st_d 22, VCPU_FPR22, a0
+ st_d 23, VCPU_FPR23, a0
+ st_d 24, VCPU_FPR24, a0
+ st_d 25, VCPU_FPR25, a0
+ st_d 26, VCPU_FPR26, a0
+ st_d 27, VCPU_FPR27, a0
+ st_d 28, VCPU_FPR28, a0
+ st_d 29, VCPU_FPR29, a0
+ st_d 30, VCPU_FPR30, a0
+ st_d 31, VCPU_FPR31, a0
+ jr ra
+ nop
+ END(__kvm_save_msa)
+
+LEAF(__kvm_restore_msa)
+ ld_d 0, VCPU_FPR0, a0
+ ld_d 1, VCPU_FPR1, a0
+ ld_d 2, VCPU_FPR2, a0
+ ld_d 3, VCPU_FPR3, a0
+ ld_d 4, VCPU_FPR4, a0
+ ld_d 5, VCPU_FPR5, a0
+ ld_d 6, VCPU_FPR6, a0
+ ld_d 7, VCPU_FPR7, a0
+ ld_d 8, VCPU_FPR8, a0
+ ld_d 9, VCPU_FPR9, a0
+ ld_d 10, VCPU_FPR10, a0
+ ld_d 11, VCPU_FPR11, a0
+ ld_d 12, VCPU_FPR12, a0
+ ld_d 13, VCPU_FPR13, a0
+ ld_d 14, VCPU_FPR14, a0
+ ld_d 15, VCPU_FPR15, a0
+ ld_d 16, VCPU_FPR16, a0
+ ld_d 17, VCPU_FPR17, a0
+ ld_d 18, VCPU_FPR18, a0
+ ld_d 19, VCPU_FPR19, a0
+ ld_d 20, VCPU_FPR20, a0
+ ld_d 21, VCPU_FPR21, a0
+ ld_d 22, VCPU_FPR22, a0
+ ld_d 23, VCPU_FPR23, a0
+ ld_d 24, VCPU_FPR24, a0
+ ld_d 25, VCPU_FPR25, a0
+ ld_d 26, VCPU_FPR26, a0
+ ld_d 27, VCPU_FPR27, a0
+ ld_d 28, VCPU_FPR28, a0
+ ld_d 29, VCPU_FPR29, a0
+ ld_d 30, VCPU_FPR30, a0
+ ld_d 31, VCPU_FPR31, a0
+ jr ra
+ nop
+ END(__kvm_restore_msa)
+
+ .macro kvm_restore_msa_upper wr, off, base
+ .set push
+ .set noat
+#ifdef CONFIG_64BIT
+ ld $1, \off(\base)
+ insert_d \wr, 1
+#elif defined(CONFIG_CPU_LITTLE_ENDIAN)
+ lw $1, \off(\base)
+ insert_w \wr, 2
+ lw $1, (\off+4)(\base)
+ insert_w \wr, 3
+#else /* CONFIG_CPU_BIG_ENDIAN */
+ lw $1, (\off+4)(\base)
+ insert_w \wr, 2
+ lw $1, \off(\base)
+ insert_w \wr, 3
+#endif
+ .set pop
+ .endm
+
+LEAF(__kvm_restore_msa_upper)
+ kvm_restore_msa_upper 0, VCPU_FPR0 +8, a0
+ kvm_restore_msa_upper 1, VCPU_FPR1 +8, a0
+ kvm_restore_msa_upper 2, VCPU_FPR2 +8, a0
+ kvm_restore_msa_upper 3, VCPU_FPR3 +8, a0
+ kvm_restore_msa_upper 4, VCPU_FPR4 +8, a0
+ kvm_restore_msa_upper 5, VCPU_FPR5 +8, a0
+ kvm_restore_msa_upper 6, VCPU_FPR6 +8, a0
+ kvm_restore_msa_upper 7, VCPU_FPR7 +8, a0
+ kvm_restore_msa_upper 8, VCPU_FPR8 +8, a0
+ kvm_restore_msa_upper 9, VCPU_FPR9 +8, a0
+ kvm_restore_msa_upper 10, VCPU_FPR10+8, a0
+ kvm_restore_msa_upper 11, VCPU_FPR11+8, a0
+ kvm_restore_msa_upper 12, VCPU_FPR12+8, a0
+ kvm_restore_msa_upper 13, VCPU_FPR13+8, a0
+ kvm_restore_msa_upper 14, VCPU_FPR14+8, a0
+ kvm_restore_msa_upper 15, VCPU_FPR15+8, a0
+ kvm_restore_msa_upper 16, VCPU_FPR16+8, a0
+ kvm_restore_msa_upper 17, VCPU_FPR17+8, a0
+ kvm_restore_msa_upper 18, VCPU_FPR18+8, a0
+ kvm_restore_msa_upper 19, VCPU_FPR19+8, a0
+ kvm_restore_msa_upper 20, VCPU_FPR20+8, a0
+ kvm_restore_msa_upper 21, VCPU_FPR21+8, a0
+ kvm_restore_msa_upper 22, VCPU_FPR22+8, a0
+ kvm_restore_msa_upper 23, VCPU_FPR23+8, a0
+ kvm_restore_msa_upper 24, VCPU_FPR24+8, a0
+ kvm_restore_msa_upper 25, VCPU_FPR25+8, a0
+ kvm_restore_msa_upper 26, VCPU_FPR26+8, a0
+ kvm_restore_msa_upper 27, VCPU_FPR27+8, a0
+ kvm_restore_msa_upper 28, VCPU_FPR28+8, a0
+ kvm_restore_msa_upper 29, VCPU_FPR29+8, a0
+ kvm_restore_msa_upper 30, VCPU_FPR30+8, a0
+ kvm_restore_msa_upper 31, VCPU_FPR31+8, a0
+ jr ra
+ nop
+ END(__kvm_restore_msa_upper)
+
+LEAF(__kvm_restore_msacsr)
+ lw t0, VCPU_MSA_CSR(a0)
+ /*
+ * The ctcmsa must stay at this offset in __kvm_restore_msacsr.
+ * See kvm_mips_csr_die_notify() which handles t0 containing a value
+ * which triggers an MSA FP Exception, which must be stepped over and
+ * ignored since the set cause bits must remain there for the guest.
+ */
+ _ctcmsa MSA_CSR, t0
+ jr ra
+ nop
+ END(__kvm_restore_msacsr)
"System Call",
"Reserved Inst",
"Break Inst",
+ "Trap Inst",
+ "MSA FPE",
+ "FPE",
+ "MSA Disabled",
"D-Cache Flushes",
};
}
}
+ /* restore guest state to registers */
+ kvm_mips_callbacks->vcpu_set_regs(vcpu);
+
local_irq_restore(flags);
}
vcpu->arch.preempt_entryhi = read_c0_entryhi();
vcpu->arch.last_sched_cpu = cpu;
+ /* save guest state in registers */
+ kvm_mips_callbacks->vcpu_get_regs(vcpu);
+
if (((cpu_context(cpu, current->mm) ^ asid_cache(cpu)) &
ASID_VERSION_MASK)) {
kvm_debug("%s: Dropping MMU Context: %#lx\n", __func__,
static int kvm_trap_emul_handle_cop_unusable(struct kvm_vcpu *vcpu)
{
+ struct mips_coproc *cop0 = vcpu->arch.cop0;
struct kvm_run *run = vcpu->run;
uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
unsigned long cause = vcpu->arch.host_cp0_cause;
enum emulation_result er = EMULATE_DONE;
int ret = RESUME_GUEST;
- if (((cause & CAUSEF_CE) >> CAUSEB_CE) == 1)
- er = kvm_mips_emulate_fpu_exc(cause, opc, run, vcpu);
- else
+ if (((cause & CAUSEF_CE) >> CAUSEB_CE) == 1) {
+ /* FPU Unusable */
+ if (!kvm_mips_guest_has_fpu(&vcpu->arch) ||
+ (kvm_read_c0_guest_status(cop0) & ST0_CU1) == 0) {
+ /*
+ * Unusable/no FPU in guest:
+ * deliver guest COP1 Unusable Exception
+ */
+ er = kvm_mips_emulate_fpu_exc(cause, opc, run, vcpu);
+ } else {
+ /* Restore FPU state */
+ kvm_own_fpu(vcpu);
+ er = EMULATE_DONE;
+ }
+ } else {
er = kvm_mips_emulate_inst(cause, opc, run, vcpu);
+ }
switch (er) {
case EMULATE_DONE:
return ret;
}
+static int kvm_trap_emul_handle_trap(struct kvm_vcpu *vcpu)
+{
+ struct kvm_run *run = vcpu->run;
+ uint32_t __user *opc = (uint32_t __user *)vcpu->arch.pc;
+ unsigned long cause = vcpu->arch.host_cp0_cause;
+ enum emulation_result er = EMULATE_DONE;
+ int ret = RESUME_GUEST;
+
+ er = kvm_mips_emulate_trap_exc(cause, opc, run, vcpu);
+ if (er == EMULATE_DONE) {
+ ret = RESUME_GUEST;
+ } else {
+ run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
+ ret = RESUME_HOST;
+ }
+ return ret;
+}
+
+static int kvm_trap_emul_handle_msa_fpe(struct kvm_vcpu *vcpu)
+{
+ struct kvm_run *run = vcpu->run;
+ uint32_t __user *opc = (uint32_t __user *)vcpu->arch.pc;
+ unsigned long cause = vcpu->arch.host_cp0_cause;
+ enum emulation_result er = EMULATE_DONE;
+ int ret = RESUME_GUEST;
+
+ er = kvm_mips_emulate_msafpe_exc(cause, opc, run, vcpu);
+ if (er == EMULATE_DONE) {
+ ret = RESUME_GUEST;
+ } else {
+ run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
+ ret = RESUME_HOST;
+ }
+ return ret;
+}
+
+static int kvm_trap_emul_handle_fpe(struct kvm_vcpu *vcpu)
+{
+ struct kvm_run *run = vcpu->run;
+ uint32_t __user *opc = (uint32_t __user *)vcpu->arch.pc;
+ unsigned long cause = vcpu->arch.host_cp0_cause;
+ enum emulation_result er = EMULATE_DONE;
+ int ret = RESUME_GUEST;
+
+ er = kvm_mips_emulate_fpe_exc(cause, opc, run, vcpu);
+ if (er == EMULATE_DONE) {
+ ret = RESUME_GUEST;
+ } else {
+ run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
+ ret = RESUME_HOST;
+ }
+ return ret;
+}
+
+/**
+ * kvm_trap_emul_handle_msa_disabled() - Guest used MSA while disabled in root.
+ * @vcpu: Virtual CPU context.
+ *
+ * Handle when the guest attempts to use MSA when it is disabled.
+ */
+static int kvm_trap_emul_handle_msa_disabled(struct kvm_vcpu *vcpu)
+{
+ struct mips_coproc *cop0 = vcpu->arch.cop0;
+ struct kvm_run *run = vcpu->run;
+ uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
+ unsigned long cause = vcpu->arch.host_cp0_cause;
+ enum emulation_result er = EMULATE_DONE;
+ int ret = RESUME_GUEST;
+
+ if (!kvm_mips_guest_has_msa(&vcpu->arch) ||
+ (kvm_read_c0_guest_status(cop0) & (ST0_CU1 | ST0_FR)) == ST0_CU1) {
+ /*
+ * No MSA in guest, or FPU enabled and not in FR=1 mode,
+ * guest reserved instruction exception
+ */
+ er = kvm_mips_emulate_ri_exc(cause, opc, run, vcpu);
+ } else if (!(kvm_read_c0_guest_config5(cop0) & MIPS_CONF5_MSAEN)) {
+ /* MSA disabled by guest, guest MSA disabled exception */
+ er = kvm_mips_emulate_msadis_exc(cause, opc, run, vcpu);
+ } else {
+ /* Restore MSA/FPU state */
+ kvm_own_msa(vcpu);
+ er = EMULATE_DONE;
+ }
+
+ switch (er) {
+ case EMULATE_DONE:
+ ret = RESUME_GUEST;
+ break;
+
+ case EMULATE_FAIL:
+ run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
+ ret = RESUME_HOST;
+ break;
+
+ default:
+ BUG();
+ }
+ return ret;
+}
+
static int kvm_trap_emul_vm_init(struct kvm *kvm)
{
return 0;
* guest will come up as expected, for now we simulate a MIPS 24kc
*/
kvm_write_c0_guest_prid(cop0, 0x00019300);
- kvm_write_c0_guest_config(cop0,
- MIPS_CONFIG0 | (0x1 << CP0C0_AR) |
+ /* Have config1, Cacheable, noncoherent, write-back, write allocate */
+ kvm_write_c0_guest_config(cop0, MIPS_CONF_M | (0x3 << CP0C0_K0) |
+ (0x1 << CP0C0_AR) |
(MMU_TYPE_R4000 << CP0C0_MT));
/* Read the cache characteristics from the host Config1 Register */
(1 << CP0C1_WR) | (1 << CP0C1_CA));
kvm_write_c0_guest_config1(cop0, config1);
- kvm_write_c0_guest_config2(cop0, MIPS_CONFIG2);
- /* MIPS_CONFIG2 | (read_c0_config2() & 0xfff) */
- kvm_write_c0_guest_config3(cop0, MIPS_CONFIG3 | (0 << CP0C3_VInt) |
- (1 << CP0C3_ULRI));
+ /* Have config3, no tertiary/secondary caches implemented */
+ kvm_write_c0_guest_config2(cop0, MIPS_CONF_M);
+ /* MIPS_CONF_M | (read_c0_config2() & 0xfff) */
+
+ /* Have config4, UserLocal */
+ kvm_write_c0_guest_config3(cop0, MIPS_CONF_M | MIPS_CONF3_ULRI);
+
+ /* Have config5 */
+ kvm_write_c0_guest_config4(cop0, MIPS_CONF_M);
+
+ /* No config6 */
+ kvm_write_c0_guest_config5(cop0, 0);
/* Set Wait IE/IXMT Ignore in Config7, IAR, AR */
kvm_write_c0_guest_config7(cop0, (MIPS_CONF7_WII) | (1 << 10));
{
struct mips_coproc *cop0 = vcpu->arch.cop0;
int ret = 0;
+ unsigned int cur, change;
switch (reg->id) {
case KVM_REG_MIPS_CP0_COUNT:
kvm_write_c0_guest_cause(cop0, v);
}
break;
+ case KVM_REG_MIPS_CP0_CONFIG:
+ /* read-only for now */
+ break;
+ case KVM_REG_MIPS_CP0_CONFIG1:
+ cur = kvm_read_c0_guest_config1(cop0);
+ change = (cur ^ v) & kvm_mips_config1_wrmask(vcpu);
+ if (change) {
+ v = cur ^ change;
+ kvm_write_c0_guest_config1(cop0, v);
+ }
+ break;
+ case KVM_REG_MIPS_CP0_CONFIG2:
+ /* read-only for now */
+ break;
+ case KVM_REG_MIPS_CP0_CONFIG3:
+ cur = kvm_read_c0_guest_config3(cop0);
+ change = (cur ^ v) & kvm_mips_config3_wrmask(vcpu);
+ if (change) {
+ v = cur ^ change;
+ kvm_write_c0_guest_config3(cop0, v);
+ }
+ break;
+ case KVM_REG_MIPS_CP0_CONFIG4:
+ cur = kvm_read_c0_guest_config4(cop0);
+ change = (cur ^ v) & kvm_mips_config4_wrmask(vcpu);
+ if (change) {
+ v = cur ^ change;
+ kvm_write_c0_guest_config4(cop0, v);
+ }
+ break;
+ case KVM_REG_MIPS_CP0_CONFIG5:
+ cur = kvm_read_c0_guest_config5(cop0);
+ change = (cur ^ v) & kvm_mips_config5_wrmask(vcpu);
+ if (change) {
+ v = cur ^ change;
+ kvm_write_c0_guest_config5(cop0, v);
+ }
+ break;
case KVM_REG_MIPS_COUNT_CTL:
ret = kvm_mips_set_count_ctl(vcpu, v);
break;
return ret;
}
+static int kvm_trap_emul_vcpu_get_regs(struct kvm_vcpu *vcpu)
+{
+ kvm_lose_fpu(vcpu);
+
+ return 0;
+}
+
+static int kvm_trap_emul_vcpu_set_regs(struct kvm_vcpu *vcpu)
+{
+ return 0;
+}
+
static struct kvm_mips_callbacks kvm_trap_emul_callbacks = {
/* exit handlers */
.handle_cop_unusable = kvm_trap_emul_handle_cop_unusable,
.handle_syscall = kvm_trap_emul_handle_syscall,
.handle_res_inst = kvm_trap_emul_handle_res_inst,
.handle_break = kvm_trap_emul_handle_break,
+ .handle_trap = kvm_trap_emul_handle_trap,
+ .handle_msa_fpe = kvm_trap_emul_handle_msa_fpe,
+ .handle_fpe = kvm_trap_emul_handle_fpe,
+ .handle_msa_disabled = kvm_trap_emul_handle_msa_disabled,
.vm_init = kvm_trap_emul_vm_init,
.vcpu_init = kvm_trap_emul_vcpu_init,
.irq_clear = kvm_mips_irq_clear_cb,
.get_one_reg = kvm_trap_emul_get_one_reg,
.set_one_reg = kvm_trap_emul_set_one_reg,
+ .vcpu_get_regs = kvm_trap_emul_vcpu_get_regs,
+ .vcpu_set_regs = kvm_trap_emul_vcpu_set_regs,
};
int kvm_mips_emulation_init(struct kvm_mips_callbacks **install_callbacks)
int proc_dolasatrtc(struct ctl_table *table, int write,
void *buffer, size_t *lenp, loff_t *ppos)
{
- struct timespec ts;
+ struct timespec64 ts;
int r;
if (!write) {
- read_persistent_clock(&ts);
+ read_persistent_clock64(&ts);
rtctmp = ts.tv_sec;
/* check for time < 0 and set to 0 */
if (rtctmp < 0)
static struct irqaction hpet_irq = {
.handler = hpet_irq_handler,
- .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_TIMER,
+ .flags = IRQF_NOBALANCING | IRQF_TIMER,
.name = "hpet",
};
addr0, len, pgoff, flags, DOWN);
}
+unsigned long arch_mmap_rnd(void)
+{
+ unsigned long rnd;
+
+ rnd = (unsigned long)get_random_int();
+ rnd <<= PAGE_SHIFT;
+ if (TASK_IS_32BIT_ADDR)
+ rnd &= 0xfffffful;
+ else
+ rnd &= 0xffffffful;
+
+ return rnd;
+}
+
void arch_pick_mmap_layout(struct mm_struct *mm)
{
unsigned long random_factor = 0UL;
- if (current->flags & PF_RANDOMIZE) {
- random_factor = get_random_int();
- random_factor = random_factor << PAGE_SHIFT;
- if (TASK_IS_32BIT_ADDR)
- random_factor &= 0xfffffful;
- else
- random_factor &= 0xffffffful;
- }
+ if (current->flags & PF_RANDOMIZE)
+ random_factor = arch_mmap_rnd();
if (mmap_is_legacy()) {
mm->mmap_base = TASK_UNMAPPED_BASE + random_factor;
pci_add_resource_offset(&resources, hose->io_resource, hose->io_offset);
bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
&resources);
- if (!bus)
- pci_free_resource_list(&resources);
-
hose->bus = bus;
need_domain_info = need_domain_info || hose->index;
hose->need_domain_info = need_domain_info;
- if (bus) {
- next_busno = bus->busn_res.end + 1;
- /* Don't allow 8-bit bus number overflow inside the hose -
- reserve some space for bridges. */
- if (next_busno > 224) {
- next_busno = 0;
- need_domain_info = 1;
- }
- if (!pci_has_flag(PCI_PROBE_ONLY)) {
- pci_bus_size_bridges(bus);
- pci_bus_assign_resources(bus);
- }
+ if (!bus) {
+ pci_free_resource_list(&resources);
+ return;
+ }
+
+ next_busno = bus->busn_res.end + 1;
+ /* Don't allow 8-bit bus number overflow inside the hose -
+ reserve some space for bridges. */
+ if (next_busno > 224) {
+ next_busno = 0;
+ need_domain_info = 1;
+ }
+
+ if (!pci_has_flag(PCI_PROBE_ONLY)) {
+ pci_bus_size_bridges(bus);
+ pci_bus_assign_resources(bus);
}
+ pci_bus_add_devices(bus);
}
#ifdef CONFIG_OF
{
resource_size_t io_offset, mem_offset;
LIST_HEAD(resources);
+ struct pci_bus *bus;
ioport_resource.start = 0xA0000000;
ioport_resource.end = 0xDFFFFFFF;
pci_add_resource_offset(&resources, &pci_ioport_resource, io_offset);
pci_add_resource_offset(&resources, &pci_iomem_resource, mem_offset);
- pci_scan_root_bus(NULL, 0, &pci_direct_ampci, NULL, &resources);
+ bus = pci_scan_root_bus(NULL, 0, &pci_direct_ampci, NULL, &resources);
+ if (!bus)
+ return 0;
pcibios_irq_init();
pcibios_fixup_irqs();
pcibios_resource_survey();
+ pci_bus_add_devices(bus);
return 0;
}
0-0x7FFFFFFF for user-thead
0-0xFFFFFFFF for kernel-thread
*/
- struct restart_block restart_block;
struct pt_regs *regs;
};
.cpu = 0, \
.preempt_count = INIT_PREEMPT_COUNT, \
.addr_limit = KERNEL_DS, \
- .restart_block = { \
- .fn = do_no_restart_syscall, \
- }, \
}
#define init_thread_info (init_thread_union.thread_info)
#define PTR_IPENDING 37
#define PTR_CPUID 38
#define PTR_CTL6 39
-#define PTR_CTL7 40
+#define PTR_EXCEPTION 40
#define PTR_PTEADDR 41
#define PTR_TLBACC 42
#define PTR_TLBMISC 43
+#define PTR_ECCINJ 44
+#define PTR_BADADDR 45
+#define PTR_CONFIG 46
+#define PTR_MPUBASE 47
+#define PTR_MPUACC 48
-#define NUM_PTRACE_REG (PTR_TLBMISC + 1)
+#define NUM_PTRACE_REG (PTR_MPUACC + 1)
/* User structures for general purpose registers. */
struct user_pt_regs {
***********************************************************************
*/
ENTRY(handle_trap)
- ldw r24, -4(ea) /* instruction that caused the exception */
+ ldwio r24, -4(ea) /* instruction that caused the exception */
srli r24, r24, 4
andi r24, r24, 0x7c
movia r9,trap_table
void flush_thread(void)
{
- set_fs(USER_DS);
}
int copy_thread(unsigned long clone_flags,
int err;
/* Always make any pending restarted system calls return -EINTR */
- current_thread_info()->restart_block.fn = do_no_restart_syscall;
+ current->restart_block.fn = do_no_restart_syscall;
err = __get_user(temp, &uc->uc_mcontext.version);
if (temp != MCONTEXT_VERSION)
end += (cpuinfo.dcache_line_size - 1);
end &= ~(cpuinfo.dcache_line_size - 1);
- if (end > start + cpuinfo.dcache_size)
- end = start + cpuinfo.dcache_size;
-
for (addr = start; addr < end; addr += cpuinfo.dcache_line_size) {
__asm__ __volatile__ (" flushda 0(%0)\n"
: /* Outputs */
{
unsigned long sr = mfspr(SPR_SR) & ~SPR_SR_SM;
- set_fs(USER_DS);
memset(regs, 0, sizeof(struct pt_regs));
regs->pc = pc;
depends on BROKEN
default y
+config PGTABLE_LEVELS
+ int
+ default 3 if 64BIT && PARISC_PAGE_SIZE_4KB
+ default 2
+
source "init/Kconfig"
source "kernel/Kconfig.freezer"
free_pages((unsigned long)pgd, PGD_ALLOC_ORDER);
}
-#if PT_NLEVELS == 3
+#if CONFIG_PGTABLE_LEVELS == 3
/* Three Level Page Table Support for pmd's */
#define KERNEL_INITIAL_ORDER 24 /* 0 to 1<<24 = 16MB */
#define KERNEL_INITIAL_SIZE (1 << KERNEL_INITIAL_ORDER)
-#if defined(CONFIG_64BIT) && defined(CONFIG_PARISC_PAGE_SIZE_4KB)
-#define PT_NLEVELS 3
+#if CONFIG_PGTABLE_LEVELS == 3
#define PGD_ORDER 1 /* Number of pages per pgd */
#define PMD_ORDER 1 /* Number of pages per pmd */
#define PGD_ALLOC_ORDER 2 /* first pgd contains pmd */
#else
-#define PT_NLEVELS 2
#define PGD_ORDER 1 /* Number of pages per pgd */
#define PGD_ALLOC_ORDER PGD_ORDER
#endif
#define PMD_SHIFT (PLD_SHIFT + BITS_PER_PTE)
#define PMD_SIZE (1UL << PMD_SHIFT)
#define PMD_MASK (~(PMD_SIZE-1))
-#if PT_NLEVELS == 3
+#if CONFIG_PGTABLE_LEVELS == 3
#define BITS_PER_PMD (PAGE_SHIFT + PMD_ORDER - BITS_PER_PMD_ENTRY)
#else
#define __PAGETABLE_PMD_FOLDED
#define pgd_flag(x) (pgd_val(x) & PxD_FLAG_MASK)
#define pgd_address(x) ((unsigned long)(pgd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
-#if PT_NLEVELS == 3
+#if CONFIG_PGTABLE_LEVELS == 3
/* The first entry of the permanent pmd is not there if it contains
* the gateway marker */
#define pmd_none(x) (!pmd_val(x) || pmd_flag(x) == PxD_FLAG_ATTACHED)
#define pmd_bad(x) (!(pmd_flag(x) & PxD_FLAG_VALID))
#define pmd_present(x) (pmd_flag(x) & PxD_FLAG_PRESENT)
static inline void pmd_clear(pmd_t *pmd) {
-#if PT_NLEVELS == 3
+#if CONFIG_PGTABLE_LEVELS == 3
if (pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
/* This is the entry pointing to the permanent pmd
* attached to the pgd; cannot clear it */
-#if PT_NLEVELS == 3
+#if CONFIG_PGTABLE_LEVELS == 3
#define pgd_page_vaddr(pgd) ((unsigned long) __va(pgd_address(pgd)))
#define pgd_page(pgd) virt_to_page((void *)pgd_page_vaddr(pgd))
#define pgd_bad(x) (!(pgd_flag(x) & PxD_FLAG_VALID))
#define pgd_present(x) (pgd_flag(x) & PxD_FLAG_PRESENT)
static inline void pgd_clear(pgd_t *pgd) {
-#if PT_NLEVELS == 3
+#if CONFIG_PGTABLE_LEVELS == 3
if(pgd_flag(*pgd) & PxD_FLAG_ATTACHED)
/* This is the permanent pmd attached to the pgd; cannot
* free it */
/* Find an entry in the second-level page table.. */
-#if PT_NLEVELS == 3
+#if CONFIG_PGTABLE_LEVELS == 3
#define pmd_offset(dir,address) \
((pmd_t *) pgd_page_vaddr(*(dir)) + (((address)>>PMD_SHIFT) & (PTRS_PER_PMD-1)))
#else
* can address up to 1TB
*/
.macro L2_ptep pmd,pte,index,va,fault
-#if PT_NLEVELS == 3
+#if CONFIG_PGTABLE_LEVELS == 3
extru \va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index
#else
# if defined(CONFIG_64BIT)
* all ILP32 processes and all the kernel for machines with
* under 4GB of memory) */
.macro L3_ptep pgd,pte,index,va,fault
-#if PT_NLEVELS == 3 /* we might have a 2-Level scheme, e.g. with 16kb page size */
+#if CONFIG_PGTABLE_LEVELS == 3 /* we might have a 2-Level scheme, e.g. with 16kb page size */
extrd,u \va,63-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index
copy %r0,\pte
extrd,u,*= \va,63-ASM_PGDIR_SHIFT,64-ASM_PGDIR_SHIFT,%r0
mtctl %r4,%cr24 /* Initialize kernel root pointer */
mtctl %r4,%cr25 /* Initialize user root pointer */
-#if PT_NLEVELS == 3
+#if CONFIG_PGTABLE_LEVELS == 3
/* Set pmd in pgd */
load32 PA(pmd0),%r5
shrd %r5,PxD_VALUE_SHIFT,%r3
stw %r3,0(%r4)
ldo (PAGE_SIZE >> PxD_VALUE_SHIFT)(%r3),%r3
addib,> -1,%r1,1b
-#if PT_NLEVELS == 3
+#if CONFIG_PGTABLE_LEVELS == 3
ldo ASM_PMD_ENTRY_SIZE(%r4),%r4
#else
ldo ASM_PGD_ENTRY_SIZE(%r4),%r4
extern int data_start;
extern void parisc_kernel_start(void); /* Kernel entry point in head.S */
-#if PT_NLEVELS == 3
+#if CONFIG_PGTABLE_LEVELS == 3
/* NOTE: This layout exactly conforms to the hybrid L2/L3 page table layout
* with the first pmd adjacent to the pgd and below it. gcc doesn't actually
* guarantee that global objects will be laid out in memory in the same order
select ARCH_MIGHT_HAVE_PC_PARPORT
select ARCH_MIGHT_HAVE_PC_SERIO
select BINFMT_ELF
- select ARCH_BINFMT_ELF_RANDOMIZE_PIE
+ select ARCH_HAS_ELF_RANDOMIZE
select OF
select OF_EARLY_FLATTREE
select OF_RESERVED_MEM
bool
default y if PPC64
+config PGTABLE_LEVELS
+ int
+ default 2 if !PPC64
+ default 3 if PPC_64K_PAGES
+ default 4
+
source "init/Kconfig"
source "kernel/Kconfig.freezer"
(0x7ff >> (PAGE_SHIFT - 12)) : \
(0x3ffff >> (PAGE_SHIFT - 12)))
-extern unsigned long arch_randomize_brk(struct mm_struct *mm);
-#define arch_randomize_brk arch_randomize_brk
-
-
#ifdef CONFIG_SPU_BASE
/* Notes used in ET_CORE. Note name is "SPU/<fd>/<filename>". */
#define NT_SPU 1
spinlock_t mmu_lock;
};
-#define CONTEXT_HOST 0
-#define CONTEXT_GUEST 1
-#define CONTEXT_GUEST_END 2
-
#define VSID_REAL 0x07ffffffffc00000ULL
#define VSID_BAT 0x07ffffffffb00000ULL
#define VSID_64K 0x0800000000000000ULL
/*
- * Kenrel asynchronous i2c interface
+ * Kernel asynchronous i2c interface
*/
#define SMU_I2C_READ_MAX 0x1d
*/
of_scan_flat_dt(early_init_dt_scan_cpus, NULL);
if (boot_cpuid < 0) {
- printk("Failed to indentify boot CPU !\n");
+ printk("Failed to identify boot CPU !\n");
BUG();
}
#include <asm/kvm_para.h>
#include <asm/kvm_host.h>
#include <asm/kvm_ppc.h>
-#include "iodev.h"
+#include <kvm/iodev.h>
#define MAX_CPU 32
#define MAX_SRC 256
clear_bit(n_IRQ, q->queue);
}
-static inline int IRQ_testbit(struct irq_queue *q, int n_IRQ)
-{
- return test_bit(n_IRQ, q->queue);
-}
-
static void IRQ_check(struct openpic *opp, struct irq_queue *q)
{
int irq = -1;
return -ENXIO;
}
-static int kvm_mpic_read(struct kvm_io_device *this, gpa_t addr,
- int len, void *ptr)
+static int kvm_mpic_read(struct kvm_vcpu *vcpu,
+ struct kvm_io_device *this,
+ gpa_t addr, int len, void *ptr)
{
struct openpic *opp = container_of(this, struct openpic, mmio);
int ret;
return ret;
}
-static int kvm_mpic_write(struct kvm_io_device *this, gpa_t addr,
- int len, const void *ptr)
+static int kvm_mpic_write(struct kvm_vcpu *vcpu,
+ struct kvm_io_device *this,
+ gpa_t addr, int len, const void *ptr)
{
struct openpic *opp = container_of(this, struct openpic, mmio);
int ret;
idx = srcu_read_lock(&vcpu->kvm->srcu);
- ret = kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, run->mmio.phys_addr,
+ ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr,
bytes, &run->mmio.data);
srcu_read_unlock(&vcpu->kvm->srcu, idx);
idx = srcu_read_lock(&vcpu->kvm->srcu);
- ret = kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, run->mmio.phys_addr,
+ ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr,
bytes, &run->mmio.data);
srcu_read_unlock(&vcpu->kvm->srcu, idx);
return sysctl_legacy_va_layout;
}
-static unsigned long mmap_rnd(void)
+unsigned long arch_mmap_rnd(void)
{
- unsigned long rnd = 0;
+ unsigned long rnd;
+
+ /* 8MB for 32bit, 1GB for 64bit */
+ if (is_32bit_task())
+ rnd = (unsigned long)get_random_int() % (1<<(23-PAGE_SHIFT));
+ else
+ rnd = (unsigned long)get_random_int() % (1<<(30-PAGE_SHIFT));
- if (current->flags & PF_RANDOMIZE) {
- /* 8MB for 32bit, 1GB for 64bit */
- if (is_32bit_task())
- rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT)));
- else
- rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT)));
- }
return rnd << PAGE_SHIFT;
}
-static inline unsigned long mmap_base(void)
+static inline unsigned long mmap_base(unsigned long rnd)
{
unsigned long gap = rlimit(RLIMIT_STACK);
else if (gap > MAX_GAP)
gap = MAX_GAP;
- return PAGE_ALIGN(TASK_SIZE - gap - mmap_rnd());
+ return PAGE_ALIGN(TASK_SIZE - gap - rnd);
}
/*
*/
void arch_pick_mmap_layout(struct mm_struct *mm)
{
+ unsigned long random_factor = 0UL;
+
+ if (current->flags & PF_RANDOMIZE)
+ random_factor = arch_mmap_rnd();
+
/*
* Fall back to the standard layout if the personality
* bit is set, or if the expected stack growth is unlimited:
mm->mmap_base = TASK_UNMAPPED_BASE;
mm->get_unmapped_area = arch_get_unmapped_area;
} else {
- mm->mmap_base = mmap_base();
+ mm->mmap_base = mmap_base(random_factor);
mm->get_unmapped_area = arch_get_unmapped_area_topdown;
}
}
static inline void power_pmu_bhrb_enable(struct perf_event *event) {}
static inline void power_pmu_bhrb_disable(struct perf_event *event) {}
-static void power_pmu_flush_branch_stack(void) {}
+static void power_pmu_sched_task(struct perf_event_context *ctx, bool sched_in) {}
static inline void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw) {}
static void pmao_restore_workaround(bool ebb) { }
#endif /* CONFIG_PPC32 */
cpuhw->bhrb_context = event->ctx;
}
cpuhw->bhrb_users++;
+ perf_sched_cb_inc(event->ctx->pmu);
}
static void power_pmu_bhrb_disable(struct perf_event *event)
cpuhw->bhrb_users--;
WARN_ON_ONCE(cpuhw->bhrb_users < 0);
+ perf_sched_cb_dec(event->ctx->pmu);
if (!cpuhw->disabled && !cpuhw->bhrb_users) {
/* BHRB cannot be turned off when other
/* Called from ctxsw to prevent one process's branch entries to
* mingle with the other process's entries during context switch.
*/
-static void power_pmu_flush_branch_stack(void)
+static void power_pmu_sched_task(struct perf_event_context *ctx, bool sched_in)
{
- if (ppmu->bhrb_nr)
+ if (!ppmu->bhrb_nr)
+ return;
+
+ if (sched_in)
power_pmu_bhrb_reset();
}
/* Calculate the to address for a branch */
.cancel_txn = power_pmu_cancel_txn,
.commit_txn = power_pmu_commit_txn,
.event_idx = power_pmu_event_idx,
- .flush_branch_stack = power_pmu_flush_branch_stack,
+ .sched_task = power_pmu_sched_task,
};
/*
/* Physical domains & other lpars require extra capabilities */
if (!caps.collect_privileged && (is_physical_domain(domain) ||
(event_get_lpar(event) != event_get_lpar_max()))) {
- pr_devel("hv permisions disallow: is_physical_domain:%d, lpar=0x%llx\n",
+ pr_devel("hv permissions disallow: is_physical_domain:%d, lpar=0x%llx\n",
is_physical_domain(domain),
event_get_lpar(event));
return -EACCES;
/* Map the global utilities registers. */
guts_np = of_find_compatible_node(NULL, NULL, "fsl,p1022-guts");
if (!guts_np) {
- pr_err("p1022rdk: missing global utilties device node\n");
+ pr_err("p1022rdk: missing global utilities device node\n");
return;
}
guts = of_iomap(guts_np, 0);
of_node_put(guts_np);
if (!guts) {
- pr_err("p1022rdk: could not map global utilties device\n");
+ pr_err("p1022rdk: could not map global utilities device\n");
return;
}
* 2 of the License, or (at your option) any later version.
*/
+#include <linux/jump_label.h>
#include <asm/ppc_asm.h>
#include <asm/hvcall.h>
#include <asm/asm-offsets.h>
#include <asm/opal.h>
-#include <asm/jump_label.h>
.section ".text"
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
+#include <linux/jump_label.h>
#include <asm/hvcall.h>
#include <asm/processor.h>
#include <asm/ppc_asm.h>
#include <asm/asm-offsets.h>
#include <asm/ptrace.h>
-#include <asm/jump_label.h>
.section ".text"
#include <linux/dma-mapping.h>
#include <linux/console.h>
#include <linux/export.h>
-#include <linux/static_key.h>
+#include <linux/jump_label.h>
#include <asm/processor.h>
#include <asm/mmu.h>
#include <asm/page.h>
def_bool y
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
select ARCH_HAS_DEBUG_STRICT_USER_COPY_CHECKS
+ select ARCH_HAS_ELF_RANDOMIZE
select ARCH_HAS_GCOV_PROFILE_ALL
select ARCH_HAS_SG_CHAIN
select ARCH_HAVE_NMI_SAFE_CMPXCHG
select HAVE_KPROBES
select HAVE_KRETPROBES
select HAVE_KVM if 64BIT
+ select HAVE_LIVEPATCH
select HAVE_MEMBLOCK
select HAVE_MEMBLOCK_NODE_MAP
select HAVE_MEMBLOCK_PHYS_MAP
config SCHED_OMIT_FRAME_POINTER
def_bool y
+config PGTABLE_LEVELS
+ int
+ default 4 if 64BIT
+ default 2
+
source "init/Kconfig"
source "kernel/Kconfig.freezer"
+source "kernel/livepatch/Kconfig"
+
menu "Processor type and features"
config HAVE_MARCH_Z900_FEATURES
#include <linux/module.h>
#include <linux/seq_file.h>
#include <linux/mount.h>
-#include <linux/aio.h>
+#include <linux/uio.h>
#include <asm/ebcdic.h>
#include "hypfs.h"
/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
use of this is to invoke "./ld.so someprog" to test out a new version of
the loader. We need to make sure that it is out of the way of the program
- that it will "exec", and that there is sufficient room for the brk. */
-
-extern unsigned long randomize_et_dyn(void);
-#define ELF_ET_DYN_BASE randomize_et_dyn()
+ that it will "exec", and that there is sufficient room for the brk. 64-bit
+ tasks are aligned to 4GB. */
+#define ELF_ET_DYN_BASE (is_32bit_task() ? \
+ (STACK_TOP / 3 * 2) : \
+ (STACK_TOP / 3 * 2) & ~((1UL << 32) - 1))
/* This yields a mask that user programs can use to figure out what
instruction set this CPU supports. */
#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
int arch_setup_additional_pages(struct linux_binprm *, int);
-extern unsigned long arch_randomize_brk(struct mm_struct *mm);
-#define arch_randomize_brk arch_randomize_brk
-
void *fill_cpu_elf_notes(void *ptr, struct save_area *sa, __vector128 *vxrs);
#endif
#ifndef _ASM_S390_JUMP_LABEL_H
#define _ASM_S390_JUMP_LABEL_H
+#ifndef __ASSEMBLY__
+
#include <linux/types.h>
#define JUMP_LABEL_NOP_SIZE 6
jump_label_t key;
};
+#endif /* __ASSEMBLY__ */
#endif
__u32 fac; /* 0x01a0 */
__u8 reserved1a4[20]; /* 0x01a4 */
__u64 cbrlo; /* 0x01b8 */
- __u8 reserved1c0[30]; /* 0x01c0 */
+ __u8 reserved1c0[8]; /* 0x01c0 */
+ __u32 ecd; /* 0x01c8 */
+ __u8 reserved1cc[18]; /* 0x01cc */
__u64 pp; /* 0x01de */
__u8 reserved1e6[2]; /* 0x01e6 */
__u64 itdba; /* 0x01e8 */
__u8 data[256];
} __packed;
+struct kvm_s390_vregs {
+ __vector128 vrs[32];
+ __u8 reserved200[512]; /* for future vector expansion */
+} __packed;
+
struct sie_page {
struct kvm_s390_sie_block sie_block;
__u8 reserved200[1024]; /* 0x0200 */
struct kvm_s390_itdb itdb; /* 0x0600 */
- __u8 reserved700[2304]; /* 0x0700 */
+ __u8 reserved700[1280]; /* 0x0700 */
+ struct kvm_s390_vregs vregs; /* 0x0c00 */
} __packed;
struct kvm_vcpu_stat {
u32 instruction_sigp_stop;
u32 instruction_sigp_stop_store_status;
u32 instruction_sigp_store_status;
+ u32 instruction_sigp_store_adtl_status;
u32 instruction_sigp_arch;
u32 instruction_sigp_prefix;
u32 instruction_sigp_restart;
#define PGM_SPECIAL_OPERATION 0x13
#define PGM_OPERAND 0x15
#define PGM_TRACE_TABEL 0x16
+#define PGM_VECTOR_PROCESSING 0x1b
#define PGM_SPACE_SWITCH 0x1c
#define PGM_HFP_SQUARE_ROOT 0x1d
#define PGM_PC_TRANSLATION_SPEC 0x1f
IRQ_PEND_COUNT
};
+/* We have 2M for virtio device descriptor pages. Smallest amount of
+ * memory per page is 24 bytes (1 queue), so (2048*1024) / 24 = 87381
+ */
+#define KVM_S390_MAX_VIRTIO_IRQS 87381
+
/*
* Repressible (non-floating) machine check interrupts
* subclass bits in MCIC
unsigned long pending_irqs;
};
+#define FIRQ_LIST_IO_ISC_0 0
+#define FIRQ_LIST_IO_ISC_1 1
+#define FIRQ_LIST_IO_ISC_2 2
+#define FIRQ_LIST_IO_ISC_3 3
+#define FIRQ_LIST_IO_ISC_4 4
+#define FIRQ_LIST_IO_ISC_5 5
+#define FIRQ_LIST_IO_ISC_6 6
+#define FIRQ_LIST_IO_ISC_7 7
+#define FIRQ_LIST_PFAULT 8
+#define FIRQ_LIST_VIRTIO 9
+#define FIRQ_LIST_COUNT 10
+#define FIRQ_CNTR_IO 0
+#define FIRQ_CNTR_SERVICE 1
+#define FIRQ_CNTR_VIRTIO 2
+#define FIRQ_CNTR_PFAULT 3
+#define FIRQ_MAX_COUNT 4
+
struct kvm_s390_float_interrupt {
+ unsigned long pending_irqs;
spinlock_t lock;
- struct list_head list;
- atomic_t active;
+ struct list_head lists[FIRQ_LIST_COUNT];
+ int counters[FIRQ_MAX_COUNT];
+ struct kvm_s390_mchk_info mchk;
+ struct kvm_s390_ext_info srv_signal;
int next_rr_cpu;
unsigned long idle_mask[BITS_TO_LONGS(KVM_MAX_VCPUS)];
- unsigned int irq_count;
};
struct kvm_hw_wp_info_arch {
s390_fp_regs host_fpregs;
unsigned int host_acrs[NUM_ACRS];
s390_fp_regs guest_fpregs;
+ struct kvm_s390_vregs *host_vregs;
struct kvm_s390_local_interrupt local_int;
struct hrtimer ckc_timer;
struct kvm_s390_pgm_info pgm;
int use_cmma;
int user_cpu_state_ctrl;
int user_sigp;
+ int user_stsi;
struct s390_io_adapter *adapters[MAX_S390_IO_ADAPTERS];
wait_queue_head_t ipte_wq;
int ipte_lock_count;
--- /dev/null
+/*
+ * livepatch.h - s390-specific Kernel Live Patching Core
+ *
+ * Copyright (c) 2013-2015 SUSE
+ * Authors: Jiri Kosina
+ * Vojtech Pavlik
+ * Jiri Slaby
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#ifndef ASM_LIVEPATCH_H
+#define ASM_LIVEPATCH_H
+
+#include <linux/module.h>
+
+#ifdef CONFIG_LIVEPATCH
+static inline int klp_check_compiler_support(void)
+{
+ return 0;
+}
+
+static inline int klp_write_module_reloc(struct module *mod, unsigned long
+ type, unsigned long loc, unsigned long value)
+{
+ /* not supported yet */
+ return -ENOSYS;
+}
+
+static inline void klp_arch_set_pc(struct pt_regs *regs, unsigned long ip)
+{
+ regs->psw.addr = ip;
+}
+#else
+#error Live patching support is disabled; check CONFIG_LIVEPATCH
+#endif
+
+#endif
#define KVM_SYNC_CRS (1UL << 3)
#define KVM_SYNC_ARCH0 (1UL << 4)
#define KVM_SYNC_PFAULT (1UL << 5)
+#define KVM_SYNC_VRS (1UL << 6)
/* definition of registers in kvm_run */
struct kvm_sync_regs {
__u64 prefix; /* prefix register */
__u64 pft; /* pfault token [PFAULT] */
__u64 pfs; /* pfault select [PFAULT] */
__u64 pfc; /* pfault compare [PFAULT] */
+ __u64 vrs[32][2]; /* vector registers */
+ __u8 reserved[512]; /* for future vector expansion */
+ __u32 fpc; /* only valid with vector registers */
};
#define KVM_REG_S390_TODPR (KVM_REG_S390 | KVM_REG_SIZE_U32 | 0x1)
* and returns a key, which can be used to find a mnemonic name
* of the instruction in the icpt_insn_codes table.
*/
-#define icpt_insn_decoder(insn) \
+#define icpt_insn_decoder(insn) ( \
INSN_DECODE_IPA0(0x01, insn, 48, 0xff) \
INSN_DECODE_IPA0(0xaa, insn, 48, 0x0f) \
INSN_DECODE_IPA0(0xb2, insn, 48, 0xff) \
INSN_DECODE_IPA0(0xe5, insn, 48, 0xff) \
INSN_DECODE_IPA0(0xeb, insn, 16, 0xff) \
INSN_DECODE_IPA0(0xc8, insn, 48, 0x0f) \
- INSN_DECODE(insn)
+ INSN_DECODE(insn))
#endif /* _UAPI_ASM_S390_SIE_H */
#else /* CONFIG_32BIT */
DEFINE(__LC_DATA_EXC_CODE, offsetof(struct _lowcore, data_exc_code));
DEFINE(__LC_MCCK_FAIL_STOR_ADDR, offsetof(struct _lowcore, failing_storage_address));
+ DEFINE(__LC_VX_SAVE_AREA_ADDR, offsetof(struct _lowcore, vector_save_area_addr));
DEFINE(__LC_EXT_PARAMS2, offsetof(struct _lowcore, ext_params2));
DEFINE(SAVE_AREA_BASE, offsetof(struct _lowcore, floating_pt_save_area));
DEFINE(__LC_PASTE, offsetof(struct _lowcore, paste));
{
u64 nsecps;
- if (tk->tkr.clock != &clocksource_tod)
+ if (tk->tkr_mono.clock != &clocksource_tod)
return;
/* Make userspace gettimeofday spin until we're done. */
++vdso_data->tb_update_count;
smp_wmb();
- vdso_data->xtime_tod_stamp = tk->tkr.cycle_last;
+ vdso_data->xtime_tod_stamp = tk->tkr_mono.cycle_last;
vdso_data->xtime_clock_sec = tk->xtime_sec;
- vdso_data->xtime_clock_nsec = tk->tkr.xtime_nsec;
+ vdso_data->xtime_clock_nsec = tk->tkr_mono.xtime_nsec;
vdso_data->wtom_clock_sec =
tk->xtime_sec + tk->wall_to_monotonic.tv_sec;
- vdso_data->wtom_clock_nsec = tk->tkr.xtime_nsec +
- + ((u64) tk->wall_to_monotonic.tv_nsec << tk->tkr.shift);
- nsecps = (u64) NSEC_PER_SEC << tk->tkr.shift;
+ vdso_data->wtom_clock_nsec = tk->tkr_mono.xtime_nsec +
+ + ((u64) tk->wall_to_monotonic.tv_nsec << tk->tkr_mono.shift);
+ nsecps = (u64) NSEC_PER_SEC << tk->tkr_mono.shift;
while (vdso_data->wtom_clock_nsec >= nsecps) {
vdso_data->wtom_clock_nsec -= nsecps;
vdso_data->wtom_clock_sec++;
vdso_data->xtime_coarse_sec = tk->xtime_sec;
vdso_data->xtime_coarse_nsec =
- (long)(tk->tkr.xtime_nsec >> tk->tkr.shift);
+ (long)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift);
vdso_data->wtom_coarse_sec =
vdso_data->xtime_coarse_sec + tk->wall_to_monotonic.tv_sec;
vdso_data->wtom_coarse_nsec =
vdso_data->wtom_coarse_sec++;
}
- vdso_data->tk_mult = tk->tkr.mult;
- vdso_data->tk_shift = tk->tkr.shift;
+ vdso_data->tk_mult = tk->tkr_mono.mult;
+ vdso_data->tk_shift = tk->tkr_mono.shift;
smp_wmb();
++vdso_data->tb_update_count;
}
if (register_external_irq(EXT_IRQ_TIMING_ALERT, timing_alert_interrupt))
panic("Couldn't request external interrupt 0x1406");
- if (clocksource_register(&clocksource_tod) != 0)
+ if (__clocksource_register(&clocksource_tod) != 0)
panic("Could not register TOD clock source");
/* Enable TOD clock interrupts on the boot cpu. */
if (vcpu->run->s.regs.gprs[rx] & 7)
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
- rc = read_guest(vcpu, vcpu->run->s.regs.gprs[rx], &parm, sizeof(parm));
+ rc = read_guest(vcpu, vcpu->run->s.regs.gprs[rx], rx, &parm, sizeof(parm));
if (rc)
return kvm_s390_inject_prog_cond(vcpu, rc);
if (parm.parm_version != 2 || parm.parm_len < 5 || parm.code != 0x258)
* - gpr 3 contains the virtqueue index (passed as datamatch)
* - gpr 4 contains the index on the bus (optionally)
*/
- ret = kvm_io_bus_write_cookie(vcpu->kvm, KVM_VIRTIO_CCW_NOTIFY_BUS,
+ ret = kvm_io_bus_write_cookie(vcpu, KVM_VIRTIO_CCW_NOTIFY_BUS,
vcpu->run->s.regs.gprs[2] & 0xffffffff,
8, &vcpu->run->s.regs.gprs[3],
vcpu->run->s.regs.gprs[4]);
int kvm_s390_handle_diag(struct kvm_vcpu *vcpu)
{
- int code = kvm_s390_get_base_disp_rs(vcpu) & 0xffff;
+ int code = kvm_s390_get_base_disp_rs(vcpu, NULL) & 0xffff;
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
#include <asm/pgtable.h>
#include "kvm-s390.h"
#include "gaccess.h"
+#include <asm/switch_to.h>
union asce {
unsigned long val;
unsigned long pfra : 52; /* Page-Frame Real Address */
};
+union alet {
+ u32 val;
+ struct {
+ u32 reserved : 7;
+ u32 p : 1;
+ u32 alesn : 8;
+ u32 alen : 16;
+ };
+};
+
+union ald {
+ u32 val;
+ struct {
+ u32 : 1;
+ u32 alo : 24;
+ u32 all : 7;
+ };
+};
+
+struct ale {
+ unsigned long i : 1; /* ALEN-Invalid Bit */
+ unsigned long : 5;
+ unsigned long fo : 1; /* Fetch-Only Bit */
+ unsigned long p : 1; /* Private Bit */
+ unsigned long alesn : 8; /* Access-List-Entry Sequence Number */
+ unsigned long aleax : 16; /* Access-List-Entry Authorization Index */
+ unsigned long : 32;
+ unsigned long : 1;
+ unsigned long asteo : 25; /* ASN-Second-Table-Entry Origin */
+ unsigned long : 6;
+ unsigned long astesn : 32; /* ASTE Sequence Number */
+} __packed;
+
+struct aste {
+ unsigned long i : 1; /* ASX-Invalid Bit */
+ unsigned long ato : 29; /* Authority-Table Origin */
+ unsigned long : 1;
+ unsigned long b : 1; /* Base-Space Bit */
+ unsigned long ax : 16; /* Authorization Index */
+ unsigned long atl : 12; /* Authority-Table Length */
+ unsigned long : 2;
+ unsigned long ca : 1; /* Controlled-ASN Bit */
+ unsigned long ra : 1; /* Reusable-ASN Bit */
+ unsigned long asce : 64; /* Address-Space-Control Element */
+ unsigned long ald : 32;
+ unsigned long astesn : 32;
+ /* .. more fields there */
+} __packed;
int ipte_lock_held(struct kvm_vcpu *vcpu)
{
ipte_unlock_simple(vcpu);
}
-static unsigned long get_vcpu_asce(struct kvm_vcpu *vcpu)
+static int ar_translation(struct kvm_vcpu *vcpu, union asce *asce, ar_t ar,
+ int write)
+{
+ union alet alet;
+ struct ale ale;
+ struct aste aste;
+ unsigned long ald_addr, authority_table_addr;
+ union ald ald;
+ int eax, rc;
+ u8 authority_table;
+
+ if (ar >= NUM_ACRS)
+ return -EINVAL;
+
+ save_access_regs(vcpu->run->s.regs.acrs);
+ alet.val = vcpu->run->s.regs.acrs[ar];
+
+ if (ar == 0 || alet.val == 0) {
+ asce->val = vcpu->arch.sie_block->gcr[1];
+ return 0;
+ } else if (alet.val == 1) {
+ asce->val = vcpu->arch.sie_block->gcr[7];
+ return 0;
+ }
+
+ if (alet.reserved)
+ return PGM_ALET_SPECIFICATION;
+
+ if (alet.p)
+ ald_addr = vcpu->arch.sie_block->gcr[5];
+ else
+ ald_addr = vcpu->arch.sie_block->gcr[2];
+ ald_addr &= 0x7fffffc0;
+
+ rc = read_guest_real(vcpu, ald_addr + 16, &ald.val, sizeof(union ald));
+ if (rc)
+ return rc;
+
+ if (alet.alen / 8 > ald.all)
+ return PGM_ALEN_TRANSLATION;
+
+ if (0x7fffffff - ald.alo * 128 < alet.alen * 16)
+ return PGM_ADDRESSING;
+
+ rc = read_guest_real(vcpu, ald.alo * 128 + alet.alen * 16, &ale,
+ sizeof(struct ale));
+ if (rc)
+ return rc;
+
+ if (ale.i == 1)
+ return PGM_ALEN_TRANSLATION;
+ if (ale.alesn != alet.alesn)
+ return PGM_ALE_SEQUENCE;
+
+ rc = read_guest_real(vcpu, ale.asteo * 64, &aste, sizeof(struct aste));
+ if (rc)
+ return rc;
+
+ if (aste.i)
+ return PGM_ASTE_VALIDITY;
+ if (aste.astesn != ale.astesn)
+ return PGM_ASTE_SEQUENCE;
+
+ if (ale.p == 1) {
+ eax = (vcpu->arch.sie_block->gcr[8] >> 16) & 0xffff;
+ if (ale.aleax != eax) {
+ if (eax / 16 > aste.atl)
+ return PGM_EXTENDED_AUTHORITY;
+
+ authority_table_addr = aste.ato * 4 + eax / 4;
+
+ rc = read_guest_real(vcpu, authority_table_addr,
+ &authority_table,
+ sizeof(u8));
+ if (rc)
+ return rc;
+
+ if ((authority_table & (0x40 >> ((eax & 3) * 2))) == 0)
+ return PGM_EXTENDED_AUTHORITY;
+ }
+ }
+
+ if (ale.fo == 1 && write)
+ return PGM_PROTECTION;
+
+ asce->val = aste.asce;
+ return 0;
+}
+
+struct trans_exc_code_bits {
+ unsigned long addr : 52; /* Translation-exception Address */
+ unsigned long fsi : 2; /* Access Exception Fetch/Store Indication */
+ unsigned long : 6;
+ unsigned long b60 : 1;
+ unsigned long b61 : 1;
+ unsigned long as : 2; /* ASCE Identifier */
+};
+
+enum {
+ FSI_UNKNOWN = 0, /* Unknown wether fetch or store */
+ FSI_STORE = 1, /* Exception was due to store operation */
+ FSI_FETCH = 2 /* Exception was due to fetch operation */
+};
+
+static int get_vcpu_asce(struct kvm_vcpu *vcpu, union asce *asce,
+ ar_t ar, int write)
{
+ int rc;
+ psw_t *psw = &vcpu->arch.sie_block->gpsw;
+ struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm;
+ struct trans_exc_code_bits *tec_bits;
+
+ memset(pgm, 0, sizeof(*pgm));
+ tec_bits = (struct trans_exc_code_bits *)&pgm->trans_exc_code;
+ tec_bits->fsi = write ? FSI_STORE : FSI_FETCH;
+ tec_bits->as = psw_bits(*psw).as;
+
+ if (!psw_bits(*psw).t) {
+ asce->val = 0;
+ asce->r = 1;
+ return 0;
+ }
+
switch (psw_bits(vcpu->arch.sie_block->gpsw).as) {
case PSW_AS_PRIMARY:
- return vcpu->arch.sie_block->gcr[1];
+ asce->val = vcpu->arch.sie_block->gcr[1];
+ return 0;
case PSW_AS_SECONDARY:
- return vcpu->arch.sie_block->gcr[7];
+ asce->val = vcpu->arch.sie_block->gcr[7];
+ return 0;
case PSW_AS_HOME:
- return vcpu->arch.sie_block->gcr[13];
+ asce->val = vcpu->arch.sie_block->gcr[13];
+ return 0;
+ case PSW_AS_ACCREG:
+ rc = ar_translation(vcpu, asce, ar, write);
+ switch (rc) {
+ case PGM_ALEN_TRANSLATION:
+ case PGM_ALE_SEQUENCE:
+ case PGM_ASTE_VALIDITY:
+ case PGM_ASTE_SEQUENCE:
+ case PGM_EXTENDED_AUTHORITY:
+ vcpu->arch.pgm.exc_access_id = ar;
+ break;
+ case PGM_PROTECTION:
+ tec_bits->b60 = 1;
+ tec_bits->b61 = 1;
+ break;
+ }
+ if (rc > 0)
+ pgm->code = rc;
+ return rc;
}
return 0;
}
* @vcpu: virtual cpu
* @gva: guest virtual address
* @gpa: points to where guest physical (absolute) address should be stored
+ * @asce: effective asce
* @write: indicates if access is a write access
*
* Translate a guest virtual address into a guest absolute address by means
- * of dynamic address translation as specified by the architecuture.
+ * of dynamic address translation as specified by the architecture.
* If the resulting absolute address is not available in the configuration
* an addressing exception is indicated and @gpa will not be changed.
*
* by the architecture
*/
static unsigned long guest_translate(struct kvm_vcpu *vcpu, unsigned long gva,
- unsigned long *gpa, int write)
+ unsigned long *gpa, const union asce asce,
+ int write)
{
union vaddress vaddr = {.addr = gva};
union raddress raddr = {.addr = gva};
union ctlreg0 ctlreg0;
unsigned long ptr;
int edat1, edat2;
- union asce asce;
ctlreg0.val = vcpu->arch.sie_block->gcr[0];
edat1 = ctlreg0.edat && test_kvm_facility(vcpu->kvm, 8);
edat2 = edat1 && test_kvm_facility(vcpu->kvm, 78);
- asce.val = get_vcpu_asce(vcpu);
if (asce.r)
goto real_address;
ptr = asce.origin * 4096;
return (ga & ~0x11fful) == 0;
}
-static int low_address_protection_enabled(struct kvm_vcpu *vcpu)
+static int low_address_protection_enabled(struct kvm_vcpu *vcpu,
+ const union asce asce)
{
union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]};
psw_t *psw = &vcpu->arch.sie_block->gpsw;
- union asce asce;
if (!ctlreg0.lap)
return 0;
- asce.val = get_vcpu_asce(vcpu);
if (psw_bits(*psw).t && asce.p)
return 0;
return 1;
}
-struct trans_exc_code_bits {
- unsigned long addr : 52; /* Translation-exception Address */
- unsigned long fsi : 2; /* Access Exception Fetch/Store Indication */
- unsigned long : 7;
- unsigned long b61 : 1;
- unsigned long as : 2; /* ASCE Identifier */
-};
-
-enum {
- FSI_UNKNOWN = 0, /* Unknown wether fetch or store */
- FSI_STORE = 1, /* Exception was due to store operation */
- FSI_FETCH = 2 /* Exception was due to fetch operation */
-};
-
static int guest_page_range(struct kvm_vcpu *vcpu, unsigned long ga,
unsigned long *pages, unsigned long nr_pages,
- int write)
+ const union asce asce, int write)
{
struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm;
psw_t *psw = &vcpu->arch.sie_block->gpsw;
struct trans_exc_code_bits *tec_bits;
int lap_enabled, rc;
- memset(pgm, 0, sizeof(*pgm));
tec_bits = (struct trans_exc_code_bits *)&pgm->trans_exc_code;
- tec_bits->fsi = write ? FSI_STORE : FSI_FETCH;
- tec_bits->as = psw_bits(*psw).as;
- lap_enabled = low_address_protection_enabled(vcpu);
+ lap_enabled = low_address_protection_enabled(vcpu, asce);
while (nr_pages) {
ga = kvm_s390_logical_to_effective(vcpu, ga);
tec_bits->addr = ga >> PAGE_SHIFT;
}
ga &= PAGE_MASK;
if (psw_bits(*psw).t) {
- rc = guest_translate(vcpu, ga, pages, write);
+ rc = guest_translate(vcpu, ga, pages, asce, write);
if (rc < 0)
return rc;
if (rc == PGM_PROTECTION)
return 0;
}
-int access_guest(struct kvm_vcpu *vcpu, unsigned long ga, void *data,
+int access_guest(struct kvm_vcpu *vcpu, unsigned long ga, ar_t ar, void *data,
unsigned long len, int write)
{
psw_t *psw = &vcpu->arch.sie_block->gpsw;
if (!len)
return 0;
- /* Access register mode is not supported yet. */
- if (psw_bits(*psw).t && psw_bits(*psw).as == PSW_AS_ACCREG)
- return -EOPNOTSUPP;
+ rc = get_vcpu_asce(vcpu, &asce, ar, write);
+ if (rc)
+ return rc;
nr_pages = (((ga & ~PAGE_MASK) + len - 1) >> PAGE_SHIFT) + 1;
pages = pages_array;
if (nr_pages > ARRAY_SIZE(pages_array))
pages = vmalloc(nr_pages * sizeof(unsigned long));
if (!pages)
return -ENOMEM;
- asce.val = get_vcpu_asce(vcpu);
need_ipte_lock = psw_bits(*psw).t && !asce.r;
if (need_ipte_lock)
ipte_lock(vcpu);
- rc = guest_page_range(vcpu, ga, pages, nr_pages, write);
+ rc = guest_page_range(vcpu, ga, pages, nr_pages, asce, write);
for (idx = 0; idx < nr_pages && !rc; idx++) {
gpa = *(pages + idx) + (ga & ~PAGE_MASK);
_len = min(PAGE_SIZE - (gpa & ~PAGE_MASK), len);
* Note: The IPTE lock is not taken during this function, so the caller
* has to take care of this.
*/
-int guest_translate_address(struct kvm_vcpu *vcpu, unsigned long gva,
+int guest_translate_address(struct kvm_vcpu *vcpu, unsigned long gva, ar_t ar,
unsigned long *gpa, int write)
{
struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm;
union asce asce;
int rc;
- /* Access register mode is not supported yet. */
- if (psw_bits(*psw).t && psw_bits(*psw).as == PSW_AS_ACCREG)
- return -EOPNOTSUPP;
-
gva = kvm_s390_logical_to_effective(vcpu, gva);
- memset(pgm, 0, sizeof(*pgm));
tec = (struct trans_exc_code_bits *)&pgm->trans_exc_code;
- tec->as = psw_bits(*psw).as;
- tec->fsi = write ? FSI_STORE : FSI_FETCH;
+ rc = get_vcpu_asce(vcpu, &asce, ar, write);
tec->addr = gva >> PAGE_SHIFT;
- if (is_low_address(gva) && low_address_protection_enabled(vcpu)) {
+ if (rc)
+ return rc;
+ if (is_low_address(gva) && low_address_protection_enabled(vcpu, asce)) {
if (write) {
rc = pgm->code = PGM_PROTECTION;
return rc;
}
}
- asce.val = get_vcpu_asce(vcpu);
if (psw_bits(*psw).t && !asce.r) { /* Use DAT? */
- rc = guest_translate(vcpu, gva, gpa, write);
+ rc = guest_translate(vcpu, gva, gpa, asce, write);
if (rc > 0) {
if (rc == PGM_PROTECTION)
tec->b61 = 1;
}
/**
- * kvm_s390_check_low_addr_protection - check for low-address protection
- * @ga: Guest address
+ * check_gva_range - test a range of guest virtual addresses for accessibility
+ */
+int check_gva_range(struct kvm_vcpu *vcpu, unsigned long gva, ar_t ar,
+ unsigned long length, int is_write)
+{
+ unsigned long gpa;
+ unsigned long currlen;
+ int rc = 0;
+
+ ipte_lock(vcpu);
+ while (length > 0 && !rc) {
+ currlen = min(length, PAGE_SIZE - (gva % PAGE_SIZE));
+ rc = guest_translate_address(vcpu, gva, ar, &gpa, is_write);
+ gva += currlen;
+ length -= currlen;
+ }
+ ipte_unlock(vcpu);
+
+ return rc;
+}
+
+/**
+ * kvm_s390_check_low_addr_prot_real - check for low-address protection
+ * @gra: Guest real address
*
* Checks whether an address is subject to low-address protection and set
* up vcpu->arch.pgm accordingly if necessary.
*
* Return: 0 if no protection exception, or PGM_PROTECTION if protected.
*/
-int kvm_s390_check_low_addr_protection(struct kvm_vcpu *vcpu, unsigned long ga)
+int kvm_s390_check_low_addr_prot_real(struct kvm_vcpu *vcpu, unsigned long gra)
{
struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm;
psw_t *psw = &vcpu->arch.sie_block->gpsw;
struct trans_exc_code_bits *tec_bits;
+ union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]};
- if (!is_low_address(ga) || !low_address_protection_enabled(vcpu))
+ if (!ctlreg0.lap || !is_low_address(gra))
return 0;
memset(pgm, 0, sizeof(*pgm));
tec_bits = (struct trans_exc_code_bits *)&pgm->trans_exc_code;
tec_bits->fsi = FSI_STORE;
tec_bits->as = psw_bits(*psw).as;
- tec_bits->addr = ga >> PAGE_SHIFT;
+ tec_bits->addr = gra >> PAGE_SHIFT;
pgm->code = PGM_PROTECTION;
return pgm->code;
}
int guest_translate_address(struct kvm_vcpu *vcpu, unsigned long gva,
- unsigned long *gpa, int write);
+ ar_t ar, unsigned long *gpa, int write);
+int check_gva_range(struct kvm_vcpu *vcpu, unsigned long gva, ar_t ar,
+ unsigned long length, int is_write);
-int access_guest(struct kvm_vcpu *vcpu, unsigned long ga, void *data,
+int access_guest(struct kvm_vcpu *vcpu, unsigned long ga, ar_t ar, void *data,
unsigned long len, int write);
int access_guest_real(struct kvm_vcpu *vcpu, unsigned long gra,
* write_guest - copy data from kernel space to guest space
* @vcpu: virtual cpu
* @ga: guest address
+ * @ar: access register
* @data: source address in kernel space
* @len: number of bytes to copy
*
* If DAT is off data will be copied to guest real or absolute memory.
* If DAT is on data will be copied to the address space as specified by
* the address space bits of the PSW:
- * Primary, secondory or home space (access register mode is currently not
- * implemented).
+ * Primary, secondary, home space or access register mode.
* The addressing mode of the PSW is also inspected, so that address wrap
* around is taken into account for 24-, 31- and 64-bit addressing mode,
* if the to be copied data crosses page boundaries in guest address space.
* if data has been changed in guest space in case of an exception.
*/
static inline __must_check
-int write_guest(struct kvm_vcpu *vcpu, unsigned long ga, void *data,
+int write_guest(struct kvm_vcpu *vcpu, unsigned long ga, ar_t ar, void *data,
unsigned long len)
{
- return access_guest(vcpu, ga, data, len, 1);
+ return access_guest(vcpu, ga, ar, data, len, 1);
}
/**
* read_guest - copy data from guest space to kernel space
* @vcpu: virtual cpu
* @ga: guest address
+ * @ar: access register
* @data: destination address in kernel space
* @len: number of bytes to copy
*
* data will be copied from guest space to kernel space.
*/
static inline __must_check
-int read_guest(struct kvm_vcpu *vcpu, unsigned long ga, void *data,
+int read_guest(struct kvm_vcpu *vcpu, unsigned long ga, ar_t ar, void *data,
unsigned long len)
{
- return access_guest(vcpu, ga, data, len, 0);
+ return access_guest(vcpu, ga, ar, data, len, 0);
}
/**
void ipte_lock(struct kvm_vcpu *vcpu);
void ipte_unlock(struct kvm_vcpu *vcpu);
int ipte_lock_held(struct kvm_vcpu *vcpu);
-int kvm_s390_check_low_addr_protection(struct kvm_vcpu *vcpu, unsigned long ga);
+int kvm_s390_check_low_addr_prot_real(struct kvm_vcpu *vcpu, unsigned long gra);
#endif /* __KVM_S390_GACCESS_H */
if (!wp_info->old_data)
return -ENOMEM;
/* try to backup the original value */
- ret = read_guest(vcpu, wp_info->phys_addr, wp_info->old_data,
- wp_info->len);
+ ret = read_guest_abs(vcpu, wp_info->phys_addr, wp_info->old_data,
+ wp_info->len);
if (ret) {
kfree(wp_info->old_data);
wp_info->old_data = NULL;
continue;
/* refetch the wp data and compare it to the old value */
- if (!read_guest(vcpu, wp_info->phys_addr, temp,
- wp_info->len)) {
+ if (!read_guest_abs(vcpu, wp_info->phys_addr, temp,
+ wp_info->len)) {
if (memcmp(temp, wp_info->old_data, wp_info->len)) {
kfree(temp);
return wp_info;
pgm_info->mon_class_nr = vcpu->arch.sie_block->mcn;
pgm_info->mon_code = vcpu->arch.sie_block->tecmc;
break;
+ case PGM_VECTOR_PROCESSING:
case PGM_DATA:
pgm_info->data_exc_code = vcpu->arch.sie_block->dxc;
break;
/* Make sure that the source is paged-in */
rc = guest_translate_address(vcpu, vcpu->run->s.regs.gprs[reg2],
- &srcaddr, 0);
+ reg2, &srcaddr, 0);
if (rc)
return kvm_s390_inject_prog_cond(vcpu, rc);
rc = kvm_arch_fault_in_page(vcpu, srcaddr, 0);
/* Make sure that the destination is paged-in */
rc = guest_translate_address(vcpu, vcpu->run->s.regs.gprs[reg1],
- &dstaddr, 1);
+ reg1, &dstaddr, 1);
if (rc)
return kvm_s390_inject_prog_cond(vcpu, rc);
rc = kvm_arch_fault_in_page(vcpu, dstaddr, 1);
/*
* handling kvm guest interrupts
*
- * Copyright IBM Corp. 2008,2014
+ * Copyright IBM Corp. 2008, 2015
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License (version 2 only)
#include <linux/signal.h>
#include <linux/slab.h>
#include <linux/bitmap.h>
+#include <linux/vmalloc.h>
#include <asm/asm-offsets.h>
+#include <asm/dis.h>
#include <asm/uaccess.h>
#include <asm/sclp.h>
+#include <asm/isc.h>
#include "kvm-s390.h"
#include "gaccess.h"
#include "trace-s390.h"
#define PFAULT_DONE 0x0680
#define VIRTIO_PARAM 0x0d00
-static int is_ioint(u64 type)
-{
- return ((type & 0xfffe0000u) != 0xfffe0000u);
-}
-
int psw_extint_disabled(struct kvm_vcpu *vcpu)
{
return !(vcpu->arch.sie_block->gpsw.mask & PSW_MASK_EXT);
return 1;
}
-static u64 int_word_to_isc_bits(u32 int_word)
+static int ckc_irq_pending(struct kvm_vcpu *vcpu)
+{
+ if (!(vcpu->arch.sie_block->ckc <
+ get_tod_clock_fast() + vcpu->arch.sie_block->epoch))
+ return 0;
+ return ckc_interrupts_enabled(vcpu);
+}
+
+static int cpu_timer_interrupts_enabled(struct kvm_vcpu *vcpu)
+{
+ return !psw_extint_disabled(vcpu) &&
+ (vcpu->arch.sie_block->gcr[0] & 0x400ul);
+}
+
+static int cpu_timer_irq_pending(struct kvm_vcpu *vcpu)
+{
+ return (vcpu->arch.sie_block->cputm >> 63) &&
+ cpu_timer_interrupts_enabled(vcpu);
+}
+
+static inline int is_ioirq(unsigned long irq_type)
{
- u8 isc = (int_word & 0x38000000) >> 27;
+ return ((irq_type >= IRQ_PEND_IO_ISC_0) &&
+ (irq_type <= IRQ_PEND_IO_ISC_7));
+}
+static uint64_t isc_to_isc_bits(int isc)
+{
return (0x80 >> isc) << 24;
}
-static int __must_check __interrupt_is_deliverable(struct kvm_vcpu *vcpu,
- struct kvm_s390_interrupt_info *inti)
+static inline u8 int_word_to_isc(u32 int_word)
{
- switch (inti->type) {
- case KVM_S390_INT_EXTERNAL_CALL:
- if (psw_extint_disabled(vcpu))
- return 0;
- if (vcpu->arch.sie_block->gcr[0] & 0x2000ul)
- return 1;
- return 0;
- case KVM_S390_INT_EMERGENCY:
- if (psw_extint_disabled(vcpu))
- return 0;
- if (vcpu->arch.sie_block->gcr[0] & 0x4000ul)
- return 1;
- return 0;
- case KVM_S390_INT_CLOCK_COMP:
- return ckc_interrupts_enabled(vcpu);
- case KVM_S390_INT_CPU_TIMER:
- if (psw_extint_disabled(vcpu))
- return 0;
- if (vcpu->arch.sie_block->gcr[0] & 0x400ul)
- return 1;
- return 0;
- case KVM_S390_INT_SERVICE:
- case KVM_S390_INT_PFAULT_INIT:
- case KVM_S390_INT_PFAULT_DONE:
- case KVM_S390_INT_VIRTIO:
- if (psw_extint_disabled(vcpu))
- return 0;
- if (vcpu->arch.sie_block->gcr[0] & 0x200ul)
- return 1;
- return 0;
- case KVM_S390_PROGRAM_INT:
- case KVM_S390_SIGP_STOP:
- case KVM_S390_SIGP_SET_PREFIX:
- case KVM_S390_RESTART:
- return 1;
- case KVM_S390_MCHK:
- if (psw_mchk_disabled(vcpu))
- return 0;
- if (vcpu->arch.sie_block->gcr[14] & inti->mchk.cr14)
- return 1;
- return 0;
- case KVM_S390_INT_IO_MIN...KVM_S390_INT_IO_MAX:
- if (psw_ioint_disabled(vcpu))
- return 0;
- if (vcpu->arch.sie_block->gcr[6] &
- int_word_to_isc_bits(inti->io.io_int_word))
- return 1;
- return 0;
- default:
- printk(KERN_WARNING "illegal interrupt type %llx\n",
- inti->type);
- BUG();
- }
- return 0;
+ return (int_word & 0x38000000) >> 27;
+}
+
+static inline unsigned long pending_floating_irqs(struct kvm_vcpu *vcpu)
+{
+ return vcpu->kvm->arch.float_int.pending_irqs;
}
static inline unsigned long pending_local_irqs(struct kvm_vcpu *vcpu)
return vcpu->arch.local_int.pending_irqs;
}
-static unsigned long deliverable_local_irqs(struct kvm_vcpu *vcpu)
+static unsigned long disable_iscs(struct kvm_vcpu *vcpu,
+ unsigned long active_mask)
+{
+ int i;
+
+ for (i = 0; i <= MAX_ISC; i++)
+ if (!(vcpu->arch.sie_block->gcr[6] & isc_to_isc_bits(i)))
+ active_mask &= ~(1UL << (IRQ_PEND_IO_ISC_0 + i));
+
+ return active_mask;
+}
+
+static unsigned long deliverable_irqs(struct kvm_vcpu *vcpu)
{
- unsigned long active_mask = pending_local_irqs(vcpu);
+ unsigned long active_mask;
+
+ active_mask = pending_local_irqs(vcpu);
+ active_mask |= pending_floating_irqs(vcpu);
if (psw_extint_disabled(vcpu))
active_mask &= ~IRQ_PEND_EXT_MASK;
+ if (psw_ioint_disabled(vcpu))
+ active_mask &= ~IRQ_PEND_IO_MASK;
+ else
+ active_mask = disable_iscs(vcpu, active_mask);
if (!(vcpu->arch.sie_block->gcr[0] & 0x2000ul))
__clear_bit(IRQ_PEND_EXT_EXTERNAL, &active_mask);
if (!(vcpu->arch.sie_block->gcr[0] & 0x4000ul))
__clear_bit(IRQ_PEND_EXT_CLOCK_COMP, &active_mask);
if (!(vcpu->arch.sie_block->gcr[0] & 0x400ul))
__clear_bit(IRQ_PEND_EXT_CPU_TIMER, &active_mask);
+ if (!(vcpu->arch.sie_block->gcr[0] & 0x200ul))
+ __clear_bit(IRQ_PEND_EXT_SERVICE, &active_mask);
if (psw_mchk_disabled(vcpu))
active_mask &= ~IRQ_PEND_MCHK_MASK;
+ if (!(vcpu->arch.sie_block->gcr[14] &
+ vcpu->kvm->arch.float_int.mchk.cr14))
+ __clear_bit(IRQ_PEND_MCHK_REP, &active_mask);
/*
* STOP irqs will never be actively delivered. They are triggered via
atomic_set_mask(flag, &vcpu->arch.sie_block->cpuflags);
}
+static void set_intercept_indicators_io(struct kvm_vcpu *vcpu)
+{
+ if (!(pending_floating_irqs(vcpu) & IRQ_PEND_IO_MASK))
+ return;
+ else if (psw_ioint_disabled(vcpu))
+ __set_cpuflag(vcpu, CPUSTAT_IO_INT);
+ else
+ vcpu->arch.sie_block->lctl |= LCTL_CR6;
+}
+
static void set_intercept_indicators_ext(struct kvm_vcpu *vcpu)
{
if (!(pending_local_irqs(vcpu) & IRQ_PEND_EXT_MASK))
__set_cpuflag(vcpu, CPUSTAT_STOP_INT);
}
-/* Set interception request for non-deliverable local interrupts */
-static void set_intercept_indicators_local(struct kvm_vcpu *vcpu)
+/* Set interception request for non-deliverable interrupts */
+static void set_intercept_indicators(struct kvm_vcpu *vcpu)
{
+ set_intercept_indicators_io(vcpu);
set_intercept_indicators_ext(vcpu);
set_intercept_indicators_mchk(vcpu);
set_intercept_indicators_stop(vcpu);
}
-static void __set_intercept_indicator(struct kvm_vcpu *vcpu,
- struct kvm_s390_interrupt_info *inti)
-{
- switch (inti->type) {
- case KVM_S390_INT_SERVICE:
- case KVM_S390_INT_PFAULT_DONE:
- case KVM_S390_INT_VIRTIO:
- if (psw_extint_disabled(vcpu))
- __set_cpuflag(vcpu, CPUSTAT_EXT_INT);
- else
- vcpu->arch.sie_block->lctl |= LCTL_CR0;
- break;
- case KVM_S390_MCHK:
- if (psw_mchk_disabled(vcpu))
- vcpu->arch.sie_block->ictl |= ICTL_LPSW;
- else
- vcpu->arch.sie_block->lctl |= LCTL_CR14;
- break;
- case KVM_S390_INT_IO_MIN...KVM_S390_INT_IO_MAX:
- if (psw_ioint_disabled(vcpu))
- __set_cpuflag(vcpu, CPUSTAT_IO_INT);
- else
- vcpu->arch.sie_block->lctl |= LCTL_CR6;
- break;
- default:
- BUG();
- }
-}
-
static u16 get_ilc(struct kvm_vcpu *vcpu)
{
- const unsigned short table[] = { 2, 4, 4, 6 };
-
switch (vcpu->arch.sie_block->icptcode) {
case ICPT_INST:
case ICPT_INSTPROGI:
case ICPT_PARTEXEC:
case ICPT_IOINST:
/* last instruction only stored for these icptcodes */
- return table[vcpu->arch.sie_block->ipa >> 14];
+ return insn_length(vcpu->arch.sie_block->ipa >> 8);
case ICPT_PROGI:
return vcpu->arch.sie_block->pgmilc;
default:
static int __must_check __deliver_machine_check(struct kvm_vcpu *vcpu)
{
+ struct kvm_s390_float_interrupt *fi = &vcpu->kvm->arch.float_int;
struct kvm_s390_local_interrupt *li = &vcpu->arch.local_int;
- struct kvm_s390_mchk_info mchk;
- int rc;
+ struct kvm_s390_mchk_info mchk = {};
+ unsigned long adtl_status_addr;
+ int deliver = 0;
+ int rc = 0;
+ spin_lock(&fi->lock);
spin_lock(&li->lock);
- mchk = li->irq.mchk;
+ if (test_bit(IRQ_PEND_MCHK_EX, &li->pending_irqs) ||
+ test_bit(IRQ_PEND_MCHK_REP, &li->pending_irqs)) {
+ /*
+ * If there was an exigent machine check pending, then any
+ * repressible machine checks that might have been pending
+ * are indicated along with it, so always clear bits for
+ * repressible and exigent interrupts
+ */
+ mchk = li->irq.mchk;
+ clear_bit(IRQ_PEND_MCHK_EX, &li->pending_irqs);
+ clear_bit(IRQ_PEND_MCHK_REP, &li->pending_irqs);
+ memset(&li->irq.mchk, 0, sizeof(mchk));
+ deliver = 1;
+ }
/*
- * If there was an exigent machine check pending, then any repressible
- * machine checks that might have been pending are indicated along
- * with it, so always clear both bits
+ * We indicate floating repressible conditions along with
+ * other pending conditions. Channel Report Pending and Channel
+ * Subsystem damage are the only two and and are indicated by
+ * bits in mcic and masked in cr14.
*/
- clear_bit(IRQ_PEND_MCHK_EX, &li->pending_irqs);
- clear_bit(IRQ_PEND_MCHK_REP, &li->pending_irqs);
- memset(&li->irq.mchk, 0, sizeof(mchk));
+ if (test_and_clear_bit(IRQ_PEND_MCHK_REP, &fi->pending_irqs)) {
+ mchk.mcic |= fi->mchk.mcic;
+ mchk.cr14 |= fi->mchk.cr14;
+ memset(&fi->mchk, 0, sizeof(mchk));
+ deliver = 1;
+ }
spin_unlock(&li->lock);
+ spin_unlock(&fi->lock);
- VCPU_EVENT(vcpu, 4, "interrupt: machine check mcic=%llx",
- mchk.mcic);
- trace_kvm_s390_deliver_interrupt(vcpu->vcpu_id, KVM_S390_MCHK,
- mchk.cr14, mchk.mcic);
-
- rc = kvm_s390_vcpu_store_status(vcpu, KVM_S390_STORE_STATUS_PREFIXED);
- rc |= put_guest_lc(vcpu, mchk.mcic,
- (u64 __user *) __LC_MCCK_CODE);
- rc |= put_guest_lc(vcpu, mchk.failing_storage_address,
- (u64 __user *) __LC_MCCK_FAIL_STOR_ADDR);
- rc |= write_guest_lc(vcpu, __LC_PSW_SAVE_AREA,
- &mchk.fixed_logout, sizeof(mchk.fixed_logout));
- rc |= write_guest_lc(vcpu, __LC_MCK_OLD_PSW,
- &vcpu->arch.sie_block->gpsw, sizeof(psw_t));
- rc |= read_guest_lc(vcpu, __LC_MCK_NEW_PSW,
- &vcpu->arch.sie_block->gpsw, sizeof(psw_t));
+ if (deliver) {
+ VCPU_EVENT(vcpu, 4, "interrupt: machine check mcic=%llx",
+ mchk.mcic);
+ trace_kvm_s390_deliver_interrupt(vcpu->vcpu_id,
+ KVM_S390_MCHK,
+ mchk.cr14, mchk.mcic);
+
+ rc = kvm_s390_vcpu_store_status(vcpu,
+ KVM_S390_STORE_STATUS_PREFIXED);
+ rc |= read_guest_lc(vcpu, __LC_VX_SAVE_AREA_ADDR,
+ &adtl_status_addr,
+ sizeof(unsigned long));
+ rc |= kvm_s390_vcpu_store_adtl_status(vcpu,
+ adtl_status_addr);
+ rc |= put_guest_lc(vcpu, mchk.mcic,
+ (u64 __user *) __LC_MCCK_CODE);
+ rc |= put_guest_lc(vcpu, mchk.failing_storage_address,
+ (u64 __user *) __LC_MCCK_FAIL_STOR_ADDR);
+ rc |= write_guest_lc(vcpu, __LC_PSW_SAVE_AREA,
+ &mchk.fixed_logout,
+ sizeof(mchk.fixed_logout));
+ rc |= write_guest_lc(vcpu, __LC_MCK_OLD_PSW,
+ &vcpu->arch.sie_block->gpsw,
+ sizeof(psw_t));
+ rc |= read_guest_lc(vcpu, __LC_MCK_NEW_PSW,
+ &vcpu->arch.sie_block->gpsw,
+ sizeof(psw_t));
+ }
return rc ? -EFAULT : 0;
}
{
struct kvm_s390_local_interrupt *li = &vcpu->arch.local_int;
struct kvm_s390_pgm_info pgm_info;
- int rc = 0;
+ int rc = 0, nullifying = false;
u16 ilc = get_ilc(vcpu);
spin_lock(&li->lock);
case PGM_LX_TRANSLATION:
case PGM_PRIMARY_AUTHORITY:
case PGM_SECONDARY_AUTHORITY:
+ nullifying = true;
+ /* fall through */
case PGM_SPACE_SWITCH:
rc = put_guest_lc(vcpu, pgm_info.trans_exc_code,
(u64 *)__LC_TRANS_EXC_CODE);
case PGM_EXTENDED_AUTHORITY:
rc = put_guest_lc(vcpu, pgm_info.exc_access_id,
(u8 *)__LC_EXC_ACCESS_ID);
+ nullifying = true;
break;
case PGM_ASCE_TYPE:
case PGM_PAGE_TRANSLATION:
(u8 *)__LC_EXC_ACCESS_ID);
rc |= put_guest_lc(vcpu, pgm_info.op_access_id,
(u8 *)__LC_OP_ACCESS_ID);
+ nullifying = true;
break;
case PGM_MONITOR:
rc = put_guest_lc(vcpu, pgm_info.mon_class_nr,
rc |= put_guest_lc(vcpu, pgm_info.mon_code,
(u64 *)__LC_MON_CODE);
break;
+ case PGM_VECTOR_PROCESSING:
case PGM_DATA:
rc = put_guest_lc(vcpu, pgm_info.data_exc_code,
(u32 *)__LC_DATA_EXC_CODE);
rc |= put_guest_lc(vcpu, pgm_info.exc_access_id,
(u8 *)__LC_EXC_ACCESS_ID);
break;
+ case PGM_STACK_FULL:
+ case PGM_STACK_EMPTY:
+ case PGM_STACK_SPECIFICATION:
+ case PGM_STACK_TYPE:
+ case PGM_STACK_OPERATION:
+ case PGM_TRACE_TABEL:
+ case PGM_CRYPTO_OPERATION:
+ nullifying = true;
+ break;
}
if (pgm_info.code & PGM_PER) {
(u8 *) __LC_PER_ACCESS_ID);
}
+ if (nullifying && vcpu->arch.sie_block->icptcode == ICPT_INST)
+ kvm_s390_rewind_psw(vcpu, ilc);
+
rc |= put_guest_lc(vcpu, ilc, (u16 *) __LC_PGM_ILC);
+ rc |= put_guest_lc(vcpu, vcpu->arch.sie_block->gbea,
+ (u64 *) __LC_LAST_BREAK);
rc |= put_guest_lc(vcpu, pgm_info.code,
(u16 *)__LC_PGM_INT_CODE);
rc |= write_guest_lc(vcpu, __LC_PGM_OLD_PSW,
return rc ? -EFAULT : 0;
}
-static int __must_check __deliver_service(struct kvm_vcpu *vcpu,
- struct kvm_s390_interrupt_info *inti)
+static int __must_check __deliver_service(struct kvm_vcpu *vcpu)
{
- int rc;
+ struct kvm_s390_float_interrupt *fi = &vcpu->kvm->arch.float_int;
+ struct kvm_s390_ext_info ext;
+ int rc = 0;
+
+ spin_lock(&fi->lock);
+ if (!(test_bit(IRQ_PEND_EXT_SERVICE, &fi->pending_irqs))) {
+ spin_unlock(&fi->lock);
+ return 0;
+ }
+ ext = fi->srv_signal;
+ memset(&fi->srv_signal, 0, sizeof(ext));
+ clear_bit(IRQ_PEND_EXT_SERVICE, &fi->pending_irqs);
+ spin_unlock(&fi->lock);
VCPU_EVENT(vcpu, 4, "interrupt: sclp parm:%x",
- inti->ext.ext_params);
+ ext.ext_params);
vcpu->stat.deliver_service_signal++;
- trace_kvm_s390_deliver_interrupt(vcpu->vcpu_id, inti->type,
- inti->ext.ext_params, 0);
+ trace_kvm_s390_deliver_interrupt(vcpu->vcpu_id, KVM_S390_INT_SERVICE,
+ ext.ext_params, 0);
rc = put_guest_lc(vcpu, EXT_IRQ_SERVICE_SIG, (u16 *)__LC_EXT_INT_CODE);
rc |= put_guest_lc(vcpu, 0, (u16 *)__LC_EXT_CPU_ADDR);
&vcpu->arch.sie_block->gpsw, sizeof(psw_t));
rc |= read_guest_lc(vcpu, __LC_EXT_NEW_PSW,
&vcpu->arch.sie_block->gpsw, sizeof(psw_t));
- rc |= put_guest_lc(vcpu, inti->ext.ext_params,
+ rc |= put_guest_lc(vcpu, ext.ext_params,
(u32 *)__LC_EXT_PARAMS);
+
return rc ? -EFAULT : 0;
}
-static int __must_check __deliver_pfault_done(struct kvm_vcpu *vcpu,
- struct kvm_s390_interrupt_info *inti)
+static int __must_check __deliver_pfault_done(struct kvm_vcpu *vcpu)
{
- int rc;
+ struct kvm_s390_float_interrupt *fi = &vcpu->kvm->arch.float_int;
+ struct kvm_s390_interrupt_info *inti;
+ int rc = 0;
- trace_kvm_s390_deliver_interrupt(vcpu->vcpu_id,
- KVM_S390_INT_PFAULT_DONE, 0,
- inti->ext.ext_params2);
+ spin_lock(&fi->lock);
+ inti = list_first_entry_or_null(&fi->lists[FIRQ_LIST_PFAULT],
+ struct kvm_s390_interrupt_info,
+ list);
+ if (inti) {
+ trace_kvm_s390_deliver_interrupt(vcpu->vcpu_id,
+ KVM_S390_INT_PFAULT_DONE, 0,
+ inti->ext.ext_params2);
+ list_del(&inti->list);
+ fi->counters[FIRQ_CNTR_PFAULT] -= 1;
+ }
+ if (list_empty(&fi->lists[FIRQ_LIST_PFAULT]))
+ clear_bit(IRQ_PEND_PFAULT_DONE, &fi->pending_irqs);
+ spin_unlock(&fi->lock);
- rc = put_guest_lc(vcpu, EXT_IRQ_CP_SERVICE, (u16 *)__LC_EXT_INT_CODE);
- rc |= put_guest_lc(vcpu, PFAULT_DONE, (u16 *)__LC_EXT_CPU_ADDR);
- rc |= write_guest_lc(vcpu, __LC_EXT_OLD_PSW,
- &vcpu->arch.sie_block->gpsw, sizeof(psw_t));
- rc |= read_guest_lc(vcpu, __LC_EXT_NEW_PSW,
- &vcpu->arch.sie_block->gpsw, sizeof(psw_t));
- rc |= put_guest_lc(vcpu, inti->ext.ext_params2,
- (u64 *)__LC_EXT_PARAMS2);
+ if (inti) {
+ rc = put_guest_lc(vcpu, EXT_IRQ_CP_SERVICE,
+ (u16 *)__LC_EXT_INT_CODE);
+ rc |= put_guest_lc(vcpu, PFAULT_DONE,
+ (u16 *)__LC_EXT_CPU_ADDR);
+ rc |= write_guest_lc(vcpu, __LC_EXT_OLD_PSW,
+ &vcpu->arch.sie_block->gpsw,
+ sizeof(psw_t));
+ rc |= read_guest_lc(vcpu, __LC_EXT_NEW_PSW,
+ &vcpu->arch.sie_block->gpsw,
+ sizeof(psw_t));
+ rc |= put_guest_lc(vcpu, inti->ext.ext_params2,
+ (u64 *)__LC_EXT_PARAMS2);
+ kfree(inti);
+ }
return rc ? -EFAULT : 0;
}
-static int __must_check __deliver_virtio(struct kvm_vcpu *vcpu,
- struct kvm_s390_interrupt_info *inti)
+static int __must_check __deliver_virtio(struct kvm_vcpu *vcpu)
{
- int rc;
+ struct kvm_s390_float_interrupt *fi = &vcpu->kvm->arch.float_int;
+ struct kvm_s390_interrupt_info *inti;
+ int rc = 0;
- VCPU_EVENT(vcpu, 4, "interrupt: virtio parm:%x,parm64:%llx",
- inti->ext.ext_params, inti->ext.ext_params2);
- vcpu->stat.deliver_virtio_interrupt++;
- trace_kvm_s390_deliver_interrupt(vcpu->vcpu_id, inti->type,
- inti->ext.ext_params,
- inti->ext.ext_params2);
+ spin_lock(&fi->lock);
+ inti = list_first_entry_or_null(&fi->lists[FIRQ_LIST_VIRTIO],
+ struct kvm_s390_interrupt_info,
+ list);
+ if (inti) {
+ VCPU_EVENT(vcpu, 4,
+ "interrupt: virtio parm:%x,parm64:%llx",
+ inti->ext.ext_params, inti->ext.ext_params2);
+ vcpu->stat.deliver_virtio_interrupt++;
+ trace_kvm_s390_deliver_interrupt(vcpu->vcpu_id,
+ inti->type,
+ inti->ext.ext_params,
+ inti->ext.ext_params2);
+ list_del(&inti->list);
+ fi->counters[FIRQ_CNTR_VIRTIO] -= 1;
+ }
+ if (list_empty(&fi->lists[FIRQ_LIST_VIRTIO]))
+ clear_bit(IRQ_PEND_VIRTIO, &fi->pending_irqs);
+ spin_unlock(&fi->lock);
- rc = put_guest_lc(vcpu, EXT_IRQ_CP_SERVICE, (u16 *)__LC_EXT_INT_CODE);
- rc |= put_guest_lc(vcpu, VIRTIO_PARAM, (u16 *)__LC_EXT_CPU_ADDR);
- rc |= write_guest_lc(vcpu, __LC_EXT_OLD_PSW,
- &vcpu->arch.sie_block->gpsw, sizeof(psw_t));
- rc |= read_guest_lc(vcpu, __LC_EXT_NEW_PSW,
- &vcpu->arch.sie_block->gpsw, sizeof(psw_t));
- rc |= put_guest_lc(vcpu, inti->ext.ext_params,
- (u32 *)__LC_EXT_PARAMS);
- rc |= put_guest_lc(vcpu, inti->ext.ext_params2,
- (u64 *)__LC_EXT_PARAMS2);
+ if (inti) {
+ rc = put_guest_lc(vcpu, EXT_IRQ_CP_SERVICE,
+ (u16 *)__LC_EXT_INT_CODE);
+ rc |= put_guest_lc(vcpu, VIRTIO_PARAM,
+ (u16 *)__LC_EXT_CPU_ADDR);
+ rc |= write_guest_lc(vcpu, __LC_EXT_OLD_PSW,
+ &vcpu->arch.sie_block->gpsw,
+ sizeof(psw_t));
+ rc |= read_guest_lc(vcpu, __LC_EXT_NEW_PSW,
+ &vcpu->arch.sie_block->gpsw,
+ sizeof(psw_t));
+ rc |= put_guest_lc(vcpu, inti->ext.ext_params,
+ (u32 *)__LC_EXT_PARAMS);
+ rc |= put_guest_lc(vcpu, inti->ext.ext_params2,
+ (u64 *)__LC_EXT_PARAMS2);
+ kfree(inti);
+ }
return rc ? -EFAULT : 0;
}
static int __must_check __deliver_io(struct kvm_vcpu *vcpu,
- struct kvm_s390_interrupt_info *inti)
+ unsigned long irq_type)
{
- int rc;
+ struct list_head *isc_list;
+ struct kvm_s390_float_interrupt *fi;
+ struct kvm_s390_interrupt_info *inti = NULL;
+ int rc = 0;
- VCPU_EVENT(vcpu, 4, "interrupt: I/O %llx", inti->type);
- vcpu->stat.deliver_io_int++;
- trace_kvm_s390_deliver_interrupt(vcpu->vcpu_id, inti->type,
- ((__u32)inti->io.subchannel_id << 16) |
- inti->io.subchannel_nr,
- ((__u64)inti->io.io_int_parm << 32) |
- inti->io.io_int_word);
-
- rc = put_guest_lc(vcpu, inti->io.subchannel_id,
- (u16 *)__LC_SUBCHANNEL_ID);
- rc |= put_guest_lc(vcpu, inti->io.subchannel_nr,
- (u16 *)__LC_SUBCHANNEL_NR);
- rc |= put_guest_lc(vcpu, inti->io.io_int_parm,
- (u32 *)__LC_IO_INT_PARM);
- rc |= put_guest_lc(vcpu, inti->io.io_int_word,
- (u32 *)__LC_IO_INT_WORD);
- rc |= write_guest_lc(vcpu, __LC_IO_OLD_PSW,
- &vcpu->arch.sie_block->gpsw, sizeof(psw_t));
- rc |= read_guest_lc(vcpu, __LC_IO_NEW_PSW,
- &vcpu->arch.sie_block->gpsw, sizeof(psw_t));
- return rc ? -EFAULT : 0;
-}
+ fi = &vcpu->kvm->arch.float_int;
-static int __must_check __deliver_mchk_floating(struct kvm_vcpu *vcpu,
- struct kvm_s390_interrupt_info *inti)
-{
- struct kvm_s390_mchk_info *mchk = &inti->mchk;
- int rc;
+ spin_lock(&fi->lock);
+ isc_list = &fi->lists[irq_type - IRQ_PEND_IO_ISC_0];
+ inti = list_first_entry_or_null(isc_list,
+ struct kvm_s390_interrupt_info,
+ list);
+ if (inti) {
+ VCPU_EVENT(vcpu, 4, "interrupt: I/O %llx", inti->type);
+ vcpu->stat.deliver_io_int++;
+ trace_kvm_s390_deliver_interrupt(vcpu->vcpu_id,
+ inti->type,
+ ((__u32)inti->io.subchannel_id << 16) |
+ inti->io.subchannel_nr,
+ ((__u64)inti->io.io_int_parm << 32) |
+ inti->io.io_int_word);
+ list_del(&inti->list);
+ fi->counters[FIRQ_CNTR_IO] -= 1;
+ }
+ if (list_empty(isc_list))
+ clear_bit(irq_type, &fi->pending_irqs);
+ spin_unlock(&fi->lock);
+
+ if (inti) {
+ rc = put_guest_lc(vcpu, inti->io.subchannel_id,
+ (u16 *)__LC_SUBCHANNEL_ID);
+ rc |= put_guest_lc(vcpu, inti->io.subchannel_nr,
+ (u16 *)__LC_SUBCHANNEL_NR);
+ rc |= put_guest_lc(vcpu, inti->io.io_int_parm,
+ (u32 *)__LC_IO_INT_PARM);
+ rc |= put_guest_lc(vcpu, inti->io.io_int_word,
+ (u32 *)__LC_IO_INT_WORD);
+ rc |= write_guest_lc(vcpu, __LC_IO_OLD_PSW,
+ &vcpu->arch.sie_block->gpsw,
+ sizeof(psw_t));
+ rc |= read_guest_lc(vcpu, __LC_IO_NEW_PSW,
+ &vcpu->arch.sie_block->gpsw,
+ sizeof(psw_t));
+ kfree(inti);
+ }
- VCPU_EVENT(vcpu, 4, "interrupt: machine check mcic=%llx",
- mchk->mcic);
- trace_kvm_s390_deliver_interrupt(vcpu->vcpu_id, KVM_S390_MCHK,
- mchk->cr14, mchk->mcic);
-
- rc = kvm_s390_vcpu_store_status(vcpu, KVM_S390_STORE_STATUS_PREFIXED);
- rc |= put_guest_lc(vcpu, mchk->mcic,
- (u64 __user *) __LC_MCCK_CODE);
- rc |= put_guest_lc(vcpu, mchk->failing_storage_address,
- (u64 __user *) __LC_MCCK_FAIL_STOR_ADDR);
- rc |= write_guest_lc(vcpu, __LC_PSW_SAVE_AREA,
- &mchk->fixed_logout, sizeof(mchk->fixed_logout));
- rc |= write_guest_lc(vcpu, __LC_MCK_OLD_PSW,
- &vcpu->arch.sie_block->gpsw, sizeof(psw_t));
- rc |= read_guest_lc(vcpu, __LC_MCK_NEW_PSW,
- &vcpu->arch.sie_block->gpsw, sizeof(psw_t));
return rc ? -EFAULT : 0;
}
static const deliver_irq_t deliver_irq_funcs[] = {
[IRQ_PEND_MCHK_EX] = __deliver_machine_check,
+ [IRQ_PEND_MCHK_REP] = __deliver_machine_check,
[IRQ_PEND_PROG] = __deliver_prog,
[IRQ_PEND_EXT_EMERGENCY] = __deliver_emergency_signal,
[IRQ_PEND_EXT_EXTERNAL] = __deliver_external_call,
[IRQ_PEND_RESTART] = __deliver_restart,
[IRQ_PEND_SET_PREFIX] = __deliver_set_prefix,
[IRQ_PEND_PFAULT_INIT] = __deliver_pfault_init,
+ [IRQ_PEND_EXT_SERVICE] = __deliver_service,
+ [IRQ_PEND_PFAULT_DONE] = __deliver_pfault_done,
+ [IRQ_PEND_VIRTIO] = __deliver_virtio,
};
-static int __must_check __deliver_floating_interrupt(struct kvm_vcpu *vcpu,
- struct kvm_s390_interrupt_info *inti)
-{
- int rc;
-
- switch (inti->type) {
- case KVM_S390_INT_SERVICE:
- rc = __deliver_service(vcpu, inti);
- break;
- case KVM_S390_INT_PFAULT_DONE:
- rc = __deliver_pfault_done(vcpu, inti);
- break;
- case KVM_S390_INT_VIRTIO:
- rc = __deliver_virtio(vcpu, inti);
- break;
- case KVM_S390_MCHK:
- rc = __deliver_mchk_floating(vcpu, inti);
- break;
- case KVM_S390_INT_IO_MIN...KVM_S390_INT_IO_MAX:
- rc = __deliver_io(vcpu, inti);
- break;
- default:
- BUG();
- }
-
- return rc;
-}
-
/* Check whether an external call is pending (deliverable or not) */
int kvm_s390_ext_call_pending(struct kvm_vcpu *vcpu)
{
int kvm_s390_vcpu_has_irq(struct kvm_vcpu *vcpu, int exclude_stop)
{
- struct kvm_s390_float_interrupt *fi = vcpu->arch.local_int.float_int;
- struct kvm_s390_interrupt_info *inti;
int rc;
- rc = !!deliverable_local_irqs(vcpu);
-
- if ((!rc) && atomic_read(&fi->active)) {
- spin_lock(&fi->lock);
- list_for_each_entry(inti, &fi->list, list)
- if (__interrupt_is_deliverable(vcpu, inti)) {
- rc = 1;
- break;
- }
- spin_unlock(&fi->lock);
- }
+ rc = !!deliverable_irqs(vcpu);
if (!rc && kvm_cpu_has_pending_timer(vcpu))
rc = 1;
int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
{
- if (!(vcpu->arch.sie_block->ckc <
- get_tod_clock_fast() + vcpu->arch.sie_block->epoch))
- return 0;
- if (!ckc_interrupts_enabled(vcpu))
- return 0;
- return 1;
+ return ckc_irq_pending(vcpu) || cpu_timer_irq_pending(vcpu);
}
int kvm_s390_handle_wait(struct kvm_vcpu *vcpu)
int __must_check kvm_s390_deliver_pending_interrupts(struct kvm_vcpu *vcpu)
{
struct kvm_s390_local_interrupt *li = &vcpu->arch.local_int;
- struct kvm_s390_float_interrupt *fi = vcpu->arch.local_int.float_int;
- struct kvm_s390_interrupt_info *n, *inti = NULL;
deliver_irq_t func;
- int deliver;
int rc = 0;
unsigned long irq_type;
- unsigned long deliverable_irqs;
+ unsigned long irqs;
__reset_intercept_indicators(vcpu);
/* pending ckc conditions might have been invalidated */
clear_bit(IRQ_PEND_EXT_CLOCK_COMP, &li->pending_irqs);
- if (kvm_cpu_has_pending_timer(vcpu))
+ if (ckc_irq_pending(vcpu))
set_bit(IRQ_PEND_EXT_CLOCK_COMP, &li->pending_irqs);
+ /* pending cpu timer conditions might have been invalidated */
+ clear_bit(IRQ_PEND_EXT_CPU_TIMER, &li->pending_irqs);
+ if (cpu_timer_irq_pending(vcpu))
+ set_bit(IRQ_PEND_EXT_CPU_TIMER, &li->pending_irqs);
+
do {
- deliverable_irqs = deliverable_local_irqs(vcpu);
+ irqs = deliverable_irqs(vcpu);
/* bits are in the order of interrupt priority */
- irq_type = find_first_bit(&deliverable_irqs, IRQ_PEND_COUNT);
+ irq_type = find_first_bit(&irqs, IRQ_PEND_COUNT);
if (irq_type == IRQ_PEND_COUNT)
break;
- func = deliver_irq_funcs[irq_type];
- if (!func) {
- WARN_ON_ONCE(func == NULL);
- clear_bit(irq_type, &li->pending_irqs);
- continue;
+ if (is_ioirq(irq_type)) {
+ rc = __deliver_io(vcpu, irq_type);
+ } else {
+ func = deliver_irq_funcs[irq_type];
+ if (!func) {
+ WARN_ON_ONCE(func == NULL);
+ clear_bit(irq_type, &li->pending_irqs);
+ continue;
+ }
+ rc = func(vcpu);
}
- rc = func(vcpu);
- } while (!rc && irq_type != IRQ_PEND_COUNT);
+ if (rc)
+ break;
+ } while (!rc);
- set_intercept_indicators_local(vcpu);
-
- if (!rc && atomic_read(&fi->active)) {
- do {
- deliver = 0;
- spin_lock(&fi->lock);
- list_for_each_entry_safe(inti, n, &fi->list, list) {
- if (__interrupt_is_deliverable(vcpu, inti)) {
- list_del(&inti->list);
- fi->irq_count--;
- deliver = 1;
- break;
- }
- __set_intercept_indicator(vcpu, inti);
- }
- if (list_empty(&fi->list))
- atomic_set(&fi->active, 0);
- spin_unlock(&fi->lock);
- if (deliver) {
- rc = __deliver_floating_interrupt(vcpu, inti);
- kfree(inti);
- }
- } while (!rc && deliver);
- }
+ set_intercept_indicators(vcpu);
return rc;
}
return 0;
}
+static struct kvm_s390_interrupt_info *get_io_int(struct kvm *kvm,
+ int isc, u32 schid)
+{
+ struct kvm_s390_float_interrupt *fi = &kvm->arch.float_int;
+ struct list_head *isc_list = &fi->lists[FIRQ_LIST_IO_ISC_0 + isc];
+ struct kvm_s390_interrupt_info *iter;
+ u16 id = (schid & 0xffff0000U) >> 16;
+ u16 nr = schid & 0x0000ffffU;
+ spin_lock(&fi->lock);
+ list_for_each_entry(iter, isc_list, list) {
+ if (schid && (id != iter->io.subchannel_id ||
+ nr != iter->io.subchannel_nr))
+ continue;
+ /* found an appropriate entry */
+ list_del_init(&iter->list);
+ fi->counters[FIRQ_CNTR_IO] -= 1;
+ if (list_empty(isc_list))
+ clear_bit(IRQ_PEND_IO_ISC_0 + isc, &fi->pending_irqs);
+ spin_unlock(&fi->lock);
+ return iter;
+ }
+ spin_unlock(&fi->lock);
+ return NULL;
+}
+
+/*
+ * Dequeue and return an I/O interrupt matching any of the interruption
+ * subclasses as designated by the isc mask in cr6 and the schid (if != 0).
+ */
struct kvm_s390_interrupt_info *kvm_s390_get_io_int(struct kvm *kvm,
- u64 cr6, u64 schid)
+ u64 isc_mask, u32 schid)
+{
+ struct kvm_s390_interrupt_info *inti = NULL;
+ int isc;
+
+ for (isc = 0; isc <= MAX_ISC && !inti; isc++) {
+ if (isc_mask & isc_to_isc_bits(isc))
+ inti = get_io_int(kvm, isc, schid);
+ }
+ return inti;
+}
+
+#define SCCB_MASK 0xFFFFFFF8
+#define SCCB_EVENT_PENDING 0x3
+
+static int __inject_service(struct kvm *kvm,
+ struct kvm_s390_interrupt_info *inti)
+{
+ struct kvm_s390_float_interrupt *fi = &kvm->arch.float_int;
+
+ spin_lock(&fi->lock);
+ fi->srv_signal.ext_params |= inti->ext.ext_params & SCCB_EVENT_PENDING;
+ /*
+ * Early versions of the QEMU s390 bios will inject several
+ * service interrupts after another without handling a
+ * condition code indicating busy.
+ * We will silently ignore those superfluous sccb values.
+ * A future version of QEMU will take care of serialization
+ * of servc requests
+ */
+ if (fi->srv_signal.ext_params & SCCB_MASK)
+ goto out;
+ fi->srv_signal.ext_params |= inti->ext.ext_params & SCCB_MASK;
+ set_bit(IRQ_PEND_EXT_SERVICE, &fi->pending_irqs);
+out:
+ spin_unlock(&fi->lock);
+ kfree(inti);
+ return 0;
+}
+
+static int __inject_virtio(struct kvm *kvm,
+ struct kvm_s390_interrupt_info *inti)
+{
+ struct kvm_s390_float_interrupt *fi = &kvm->arch.float_int;
+
+ spin_lock(&fi->lock);
+ if (fi->counters[FIRQ_CNTR_VIRTIO] >= KVM_S390_MAX_VIRTIO_IRQS) {
+ spin_unlock(&fi->lock);
+ return -EBUSY;
+ }
+ fi->counters[FIRQ_CNTR_VIRTIO] += 1;
+ list_add_tail(&inti->list, &fi->lists[FIRQ_LIST_VIRTIO]);
+ set_bit(IRQ_PEND_VIRTIO, &fi->pending_irqs);
+ spin_unlock(&fi->lock);
+ return 0;
+}
+
+static int __inject_pfault_done(struct kvm *kvm,
+ struct kvm_s390_interrupt_info *inti)
+{
+ struct kvm_s390_float_interrupt *fi = &kvm->arch.float_int;
+
+ spin_lock(&fi->lock);
+ if (fi->counters[FIRQ_CNTR_PFAULT] >=
+ (ASYNC_PF_PER_VCPU * KVM_MAX_VCPUS)) {
+ spin_unlock(&fi->lock);
+ return -EBUSY;
+ }
+ fi->counters[FIRQ_CNTR_PFAULT] += 1;
+ list_add_tail(&inti->list, &fi->lists[FIRQ_LIST_PFAULT]);
+ set_bit(IRQ_PEND_PFAULT_DONE, &fi->pending_irqs);
+ spin_unlock(&fi->lock);
+ return 0;
+}
+
+#define CR_PENDING_SUBCLASS 28
+static int __inject_float_mchk(struct kvm *kvm,
+ struct kvm_s390_interrupt_info *inti)
+{
+ struct kvm_s390_float_interrupt *fi = &kvm->arch.float_int;
+
+ spin_lock(&fi->lock);
+ fi->mchk.cr14 |= inti->mchk.cr14 & (1UL << CR_PENDING_SUBCLASS);
+ fi->mchk.mcic |= inti->mchk.mcic;
+ set_bit(IRQ_PEND_MCHK_REP, &fi->pending_irqs);
+ spin_unlock(&fi->lock);
+ kfree(inti);
+ return 0;
+}
+
+static int __inject_io(struct kvm *kvm, struct kvm_s390_interrupt_info *inti)
{
struct kvm_s390_float_interrupt *fi;
- struct kvm_s390_interrupt_info *inti, *iter;
+ struct list_head *list;
+ int isc;
- if ((!schid && !cr6) || (schid && cr6))
- return NULL;
fi = &kvm->arch.float_int;
spin_lock(&fi->lock);
- inti = NULL;
- list_for_each_entry(iter, &fi->list, list) {
- if (!is_ioint(iter->type))
- continue;
- if (cr6 &&
- ((cr6 & int_word_to_isc_bits(iter->io.io_int_word)) == 0))
- continue;
- if (schid) {
- if (((schid & 0x00000000ffff0000) >> 16) !=
- iter->io.subchannel_id)
- continue;
- if ((schid & 0x000000000000ffff) !=
- iter->io.subchannel_nr)
- continue;
- }
- inti = iter;
- break;
- }
- if (inti) {
- list_del_init(&inti->list);
- fi->irq_count--;
+ if (fi->counters[FIRQ_CNTR_IO] >= KVM_S390_MAX_FLOAT_IRQS) {
+ spin_unlock(&fi->lock);
+ return -EBUSY;
}
- if (list_empty(&fi->list))
- atomic_set(&fi->active, 0);
+ fi->counters[FIRQ_CNTR_IO] += 1;
+
+ isc = int_word_to_isc(inti->io.io_int_word);
+ list = &fi->lists[FIRQ_LIST_IO_ISC_0 + isc];
+ list_add_tail(&inti->list, list);
+ set_bit(IRQ_PEND_IO_ISC_0 + isc, &fi->pending_irqs);
spin_unlock(&fi->lock);
- return inti;
+ return 0;
}
static int __inject_vm(struct kvm *kvm, struct kvm_s390_interrupt_info *inti)
{
struct kvm_s390_local_interrupt *li;
struct kvm_s390_float_interrupt *fi;
- struct kvm_s390_interrupt_info *iter;
struct kvm_vcpu *dst_vcpu = NULL;
int sigcpu;
- int rc = 0;
+ u64 type = READ_ONCE(inti->type);
+ int rc;
fi = &kvm->arch.float_int;
- spin_lock(&fi->lock);
- if (fi->irq_count >= KVM_S390_MAX_FLOAT_IRQS) {
+
+ switch (type) {
+ case KVM_S390_MCHK:
+ rc = __inject_float_mchk(kvm, inti);
+ break;
+ case KVM_S390_INT_VIRTIO:
+ rc = __inject_virtio(kvm, inti);
+ break;
+ case KVM_S390_INT_SERVICE:
+ rc = __inject_service(kvm, inti);
+ break;
+ case KVM_S390_INT_PFAULT_DONE:
+ rc = __inject_pfault_done(kvm, inti);
+ break;
+ case KVM_S390_INT_IO_MIN...KVM_S390_INT_IO_MAX:
+ rc = __inject_io(kvm, inti);
+ break;
+ default:
rc = -EINVAL;
- goto unlock_fi;
}
- fi->irq_count++;
- if (!is_ioint(inti->type)) {
- list_add_tail(&inti->list, &fi->list);
- } else {
- u64 isc_bits = int_word_to_isc_bits(inti->io.io_int_word);
+ if (rc)
+ return rc;
- /* Keep I/O interrupts sorted in isc order. */
- list_for_each_entry(iter, &fi->list, list) {
- if (!is_ioint(iter->type))
- continue;
- if (int_word_to_isc_bits(iter->io.io_int_word)
- <= isc_bits)
- continue;
- break;
- }
- list_add_tail(&inti->list, &iter->list);
- }
- atomic_set(&fi->active, 1);
- if (atomic_read(&kvm->online_vcpus) == 0)
- goto unlock_fi;
sigcpu = find_first_bit(fi->idle_mask, KVM_MAX_VCPUS);
if (sigcpu == KVM_MAX_VCPUS) {
do {
dst_vcpu = kvm_get_vcpu(kvm, sigcpu);
li = &dst_vcpu->arch.local_int;
spin_lock(&li->lock);
- switch (inti->type) {
+ switch (type) {
case KVM_S390_MCHK:
atomic_set_mask(CPUSTAT_STOP_INT, li->cpuflags);
break;
}
spin_unlock(&li->lock);
kvm_s390_vcpu_wakeup(kvm_get_vcpu(kvm, sigcpu));
-unlock_fi:
- spin_unlock(&fi->lock);
- return rc;
+ return 0;
+
}
int kvm_s390_inject_vm(struct kvm *kvm,
return rc;
}
-void kvm_s390_reinject_io_int(struct kvm *kvm,
+int kvm_s390_reinject_io_int(struct kvm *kvm,
struct kvm_s390_interrupt_info *inti)
{
- __inject_vm(kvm, inti);
+ return __inject_vm(kvm, inti);
}
int s390int_to_s390irq(struct kvm_s390_interrupt *s390int,
spin_unlock(&li->lock);
}
-int kvm_s390_inject_vcpu(struct kvm_vcpu *vcpu, struct kvm_s390_irq *irq)
+static int do_inject_vcpu(struct kvm_vcpu *vcpu, struct kvm_s390_irq *irq)
{
- struct kvm_s390_local_interrupt *li = &vcpu->arch.local_int;
int rc;
- spin_lock(&li->lock);
switch (irq->type) {
case KVM_S390_PROGRAM_INT:
VCPU_EVENT(vcpu, 3, "inject: program check %d (from user)",
default:
rc = -EINVAL;
}
+
+ return rc;
+}
+
+int kvm_s390_inject_vcpu(struct kvm_vcpu *vcpu, struct kvm_s390_irq *irq)
+{
+ struct kvm_s390_local_interrupt *li = &vcpu->arch.local_int;
+ int rc;
+
+ spin_lock(&li->lock);
+ rc = do_inject_vcpu(vcpu, irq);
spin_unlock(&li->lock);
if (!rc)
kvm_s390_vcpu_wakeup(vcpu);
return rc;
}
-void kvm_s390_clear_float_irqs(struct kvm *kvm)
+static inline void clear_irq_list(struct list_head *_list)
{
- struct kvm_s390_float_interrupt *fi;
- struct kvm_s390_interrupt_info *n, *inti = NULL;
+ struct kvm_s390_interrupt_info *inti, *n;
- fi = &kvm->arch.float_int;
- spin_lock(&fi->lock);
- list_for_each_entry_safe(inti, n, &fi->list, list) {
+ list_for_each_entry_safe(inti, n, _list, list) {
list_del(&inti->list);
kfree(inti);
}
- fi->irq_count = 0;
- atomic_set(&fi->active, 0);
- spin_unlock(&fi->lock);
}
-static inline int copy_irq_to_user(struct kvm_s390_interrupt_info *inti,
- u8 *addr)
+static void inti_to_irq(struct kvm_s390_interrupt_info *inti,
+ struct kvm_s390_irq *irq)
{
- struct kvm_s390_irq __user *uptr = (struct kvm_s390_irq __user *) addr;
- struct kvm_s390_irq irq = {0};
-
- irq.type = inti->type;
+ irq->type = inti->type;
switch (inti->type) {
case KVM_S390_INT_PFAULT_INIT:
case KVM_S390_INT_PFAULT_DONE:
case KVM_S390_INT_VIRTIO:
- case KVM_S390_INT_SERVICE:
- irq.u.ext = inti->ext;
+ irq->u.ext = inti->ext;
break;
case KVM_S390_INT_IO_MIN...KVM_S390_INT_IO_MAX:
- irq.u.io = inti->io;
+ irq->u.io = inti->io;
break;
- case KVM_S390_MCHK:
- irq.u.mchk = inti->mchk;
- break;
- default:
- return -EINVAL;
}
+}
- if (copy_to_user(uptr, &irq, sizeof(irq)))
- return -EFAULT;
+void kvm_s390_clear_float_irqs(struct kvm *kvm)
+{
+ struct kvm_s390_float_interrupt *fi = &kvm->arch.float_int;
+ int i;
- return 0;
-}
+ spin_lock(&fi->lock);
+ for (i = 0; i < FIRQ_LIST_COUNT; i++)
+ clear_irq_list(&fi->lists[i]);
+ for (i = 0; i < FIRQ_MAX_COUNT; i++)
+ fi->counters[i] = 0;
+ spin_unlock(&fi->lock);
+};
-static int get_all_floating_irqs(struct kvm *kvm, __u8 *buf, __u64 len)
+static int get_all_floating_irqs(struct kvm *kvm, u8 __user *usrbuf, u64 len)
{
struct kvm_s390_interrupt_info *inti;
struct kvm_s390_float_interrupt *fi;
+ struct kvm_s390_irq *buf;
+ struct kvm_s390_irq *irq;
+ int max_irqs;
int ret = 0;
int n = 0;
+ int i;
+
+ if (len > KVM_S390_FLIC_MAX_BUFFER || len == 0)
+ return -EINVAL;
+
+ /*
+ * We are already using -ENOMEM to signal
+ * userspace it may retry with a bigger buffer,
+ * so we need to use something else for this case
+ */
+ buf = vzalloc(len);
+ if (!buf)
+ return -ENOBUFS;
+
+ max_irqs = len / sizeof(struct kvm_s390_irq);
fi = &kvm->arch.float_int;
spin_lock(&fi->lock);
-
- list_for_each_entry(inti, &fi->list, list) {
- if (len < sizeof(struct kvm_s390_irq)) {
+ for (i = 0; i < FIRQ_LIST_COUNT; i++) {
+ list_for_each_entry(inti, &fi->lists[i], list) {
+ if (n == max_irqs) {
+ /* signal userspace to try again */
+ ret = -ENOMEM;
+ goto out;
+ }
+ inti_to_irq(inti, &buf[n]);
+ n++;
+ }
+ }
+ if (test_bit(IRQ_PEND_EXT_SERVICE, &fi->pending_irqs)) {
+ if (n == max_irqs) {
/* signal userspace to try again */
ret = -ENOMEM;
- break;
+ goto out;
}
- ret = copy_irq_to_user(inti, buf);
- if (ret)
- break;
- buf += sizeof(struct kvm_s390_irq);
- len -= sizeof(struct kvm_s390_irq);
+ irq = (struct kvm_s390_irq *) &buf[n];
+ irq->type = KVM_S390_INT_SERVICE;
+ irq->u.ext = fi->srv_signal;
n++;
}
+ if (test_bit(IRQ_PEND_MCHK_REP, &fi->pending_irqs)) {
+ if (n == max_irqs) {
+ /* signal userspace to try again */
+ ret = -ENOMEM;
+ goto out;
+ }
+ irq = (struct kvm_s390_irq *) &buf[n];
+ irq->type = KVM_S390_MCHK;
+ irq->u.mchk = fi->mchk;
+ n++;
+}
+out:
spin_unlock(&fi->lock);
+ if (!ret && n > 0) {
+ if (copy_to_user(usrbuf, buf, sizeof(struct kvm_s390_irq) * n))
+ ret = -EFAULT;
+ }
+ vfree(buf);
return ret < 0 ? ret : n;
}
switch (attr->group) {
case KVM_DEV_FLIC_GET_ALL_IRQS:
- r = get_all_floating_irqs(dev->kvm, (u8 *) attr->addr,
+ r = get_all_floating_irqs(dev->kvm, (u8 __user *) attr->addr,
attr->attr);
break;
default:
{
return -EINVAL;
}
+
+int kvm_s390_set_irq_state(struct kvm_vcpu *vcpu, void __user *irqstate, int len)
+{
+ struct kvm_s390_local_interrupt *li = &vcpu->arch.local_int;
+ struct kvm_s390_irq *buf;
+ int r = 0;
+ int n;
+
+ buf = vmalloc(len);
+ if (!buf)
+ return -ENOMEM;
+
+ if (copy_from_user((void *) buf, irqstate, len)) {
+ r = -EFAULT;
+ goto out_free;
+ }
+
+ /*
+ * Don't allow setting the interrupt state
+ * when there are already interrupts pending
+ */
+ spin_lock(&li->lock);
+ if (li->pending_irqs) {
+ r = -EBUSY;
+ goto out_unlock;
+ }
+
+ for (n = 0; n < len / sizeof(*buf); n++) {
+ r = do_inject_vcpu(vcpu, &buf[n]);
+ if (r)
+ break;
+ }
+
+out_unlock:
+ spin_unlock(&li->lock);
+out_free:
+ vfree(buf);
+
+ return r;
+}
+
+static void store_local_irq(struct kvm_s390_local_interrupt *li,
+ struct kvm_s390_irq *irq,
+ unsigned long irq_type)
+{
+ switch (irq_type) {
+ case IRQ_PEND_MCHK_EX:
+ case IRQ_PEND_MCHK_REP:
+ irq->type = KVM_S390_MCHK;
+ irq->u.mchk = li->irq.mchk;
+ break;
+ case IRQ_PEND_PROG:
+ irq->type = KVM_S390_PROGRAM_INT;
+ irq->u.pgm = li->irq.pgm;
+ break;
+ case IRQ_PEND_PFAULT_INIT:
+ irq->type = KVM_S390_INT_PFAULT_INIT;
+ irq->u.ext = li->irq.ext;
+ break;
+ case IRQ_PEND_EXT_EXTERNAL:
+ irq->type = KVM_S390_INT_EXTERNAL_CALL;
+ irq->u.extcall = li->irq.extcall;
+ break;
+ case IRQ_PEND_EXT_CLOCK_COMP:
+ irq->type = KVM_S390_INT_CLOCK_COMP;
+ break;
+ case IRQ_PEND_EXT_CPU_TIMER:
+ irq->type = KVM_S390_INT_CPU_TIMER;
+ break;
+ case IRQ_PEND_SIGP_STOP:
+ irq->type = KVM_S390_SIGP_STOP;
+ irq->u.stop = li->irq.stop;
+ break;
+ case IRQ_PEND_RESTART:
+ irq->type = KVM_S390_RESTART;
+ break;
+ case IRQ_PEND_SET_PREFIX:
+ irq->type = KVM_S390_SIGP_SET_PREFIX;
+ irq->u.prefix = li->irq.prefix;
+ break;
+ }
+}
+
+int kvm_s390_get_irq_state(struct kvm_vcpu *vcpu, __u8 __user *buf, int len)
+{
+ uint8_t sigp_ctrl = vcpu->kvm->arch.sca->cpu[vcpu->vcpu_id].sigp_ctrl;
+ unsigned long sigp_emerg_pending[BITS_TO_LONGS(KVM_MAX_VCPUS)];
+ struct kvm_s390_local_interrupt *li = &vcpu->arch.local_int;
+ unsigned long pending_irqs;
+ struct kvm_s390_irq irq;
+ unsigned long irq_type;
+ int cpuaddr;
+ int n = 0;
+
+ spin_lock(&li->lock);
+ pending_irqs = li->pending_irqs;
+ memcpy(&sigp_emerg_pending, &li->sigp_emerg_pending,
+ sizeof(sigp_emerg_pending));
+ spin_unlock(&li->lock);
+
+ for_each_set_bit(irq_type, &pending_irqs, IRQ_PEND_COUNT) {
+ memset(&irq, 0, sizeof(irq));
+ if (irq_type == IRQ_PEND_EXT_EMERGENCY)
+ continue;
+ if (n + sizeof(irq) > len)
+ return -ENOBUFS;
+ store_local_irq(&vcpu->arch.local_int, &irq, irq_type);
+ if (copy_to_user(&buf[n], &irq, sizeof(irq)))
+ return -EFAULT;
+ n += sizeof(irq);
+ }
+
+ if (test_bit(IRQ_PEND_EXT_EMERGENCY, &pending_irqs)) {
+ for_each_set_bit(cpuaddr, sigp_emerg_pending, KVM_MAX_VCPUS) {
+ memset(&irq, 0, sizeof(irq));
+ if (n + sizeof(irq) > len)
+ return -ENOBUFS;
+ irq.type = KVM_S390_INT_EMERGENCY;
+ irq.u.emerg.code = cpuaddr;
+ if (copy_to_user(&buf[n], &irq, sizeof(irq)))
+ return -EFAULT;
+ n += sizeof(irq);
+ }
+ }
+
+ if ((sigp_ctrl & SIGP_CTRL_C) &&
+ (atomic_read(&vcpu->arch.sie_block->cpuflags) &
+ CPUSTAT_ECALL_PEND)) {
+ if (n + sizeof(irq) > len)
+ return -ENOBUFS;
+ memset(&irq, 0, sizeof(irq));
+ irq.type = KVM_S390_INT_EXTERNAL_CALL;
+ irq.u.extcall.code = sigp_ctrl & SIGP_CTRL_SCN_MASK;
+ if (copy_to_user(&buf[n], &irq, sizeof(irq)))
+ return -EFAULT;
+ n += sizeof(irq);
+ }
+
+ return n;
+}
#include <linux/random.h>
#include <linux/slab.h>
#include <linux/timer.h>
+#include <linux/vmalloc.h>
#include <asm/asm-offsets.h>
#include <asm/lowcore.h>
#include <asm/pgtable.h>
#include <asm/nmi.h>
#include <asm/switch_to.h>
+#include <asm/isc.h>
#include <asm/sclp.h>
#include "kvm-s390.h"
#include "gaccess.h"
#include "trace.h"
#include "trace-s390.h"
+#define MEM_OP_MAX_SIZE 65536 /* Maximum transfer size for KVM_S390_MEM_OP */
+#define LOCAL_IRQS 32
+#define VCPU_IRQS_MAX_BUF (sizeof(struct kvm_s390_irq) * \
+ (KVM_MAX_VCPUS + LOCAL_IRQS))
+
#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
struct kvm_stats_debugfs_item debugfs_entries[] = {
{ "instruction_sigp_stop", VCPU_STAT(instruction_sigp_stop) },
{ "instruction_sigp_stop_store_status", VCPU_STAT(instruction_sigp_stop_store_status) },
{ "instruction_sigp_store_status", VCPU_STAT(instruction_sigp_store_status) },
+ { "instruction_sigp_store_adtl_status", VCPU_STAT(instruction_sigp_store_adtl_status) },
{ "instruction_sigp_set_arch", VCPU_STAT(instruction_sigp_arch) },
{ "instruction_sigp_set_prefix", VCPU_STAT(instruction_sigp_prefix) },
{ "instruction_sigp_restart", VCPU_STAT(instruction_sigp_restart) },
/* upper facilities limit for kvm */
unsigned long kvm_s390_fac_list_mask[] = {
- 0xff82fffbf4fc2000UL,
- 0x005c000000000000UL,
+ 0xffe6fffbfcfdfc40UL,
+ 0x205c800000000000UL,
};
unsigned long kvm_s390_fac_list_mask_size(void)
case KVM_CAP_S390_IRQCHIP:
case KVM_CAP_VM_ATTRIBUTES:
case KVM_CAP_MP_STATE:
+ case KVM_CAP_S390_INJECT_IRQ:
case KVM_CAP_S390_USER_SIGP:
+ case KVM_CAP_S390_USER_STSI:
+ case KVM_CAP_S390_SKEYS:
+ case KVM_CAP_S390_IRQ_STATE:
r = 1;
break;
+ case KVM_CAP_S390_MEM_OP:
+ r = MEM_OP_MAX_SIZE;
+ break;
case KVM_CAP_NR_VCPUS:
case KVM_CAP_MAX_VCPUS:
r = KVM_MAX_VCPUS;
case KVM_CAP_S390_COW:
r = MACHINE_HAS_ESOP;
break;
+ case KVM_CAP_S390_VECTOR_REGISTERS:
+ r = MACHINE_HAS_VX;
+ break;
default:
r = 0;
}
kvm->arch.user_sigp = 1;
r = 0;
break;
+ case KVM_CAP_S390_VECTOR_REGISTERS:
+ if (MACHINE_HAS_VX) {
+ set_kvm_facility(kvm->arch.model.fac->mask, 129);
+ set_kvm_facility(kvm->arch.model.fac->list, 129);
+ r = 0;
+ } else
+ r = -EINVAL;
+ break;
+ case KVM_CAP_S390_USER_STSI:
+ kvm->arch.user_stsi = 1;
+ r = 0;
+ break;
default:
r = -EINVAL;
break;
return ret;
}
+static long kvm_s390_get_skeys(struct kvm *kvm, struct kvm_s390_skeys *args)
+{
+ uint8_t *keys;
+ uint64_t hva;
+ unsigned long curkey;
+ int i, r = 0;
+
+ if (args->flags != 0)
+ return -EINVAL;
+
+ /* Is this guest using storage keys? */
+ if (!mm_use_skey(current->mm))
+ return KVM_S390_GET_SKEYS_NONE;
+
+ /* Enforce sane limit on memory allocation */
+ if (args->count < 1 || args->count > KVM_S390_SKEYS_MAX)
+ return -EINVAL;
+
+ keys = kmalloc_array(args->count, sizeof(uint8_t),
+ GFP_KERNEL | __GFP_NOWARN);
+ if (!keys)
+ keys = vmalloc(sizeof(uint8_t) * args->count);
+ if (!keys)
+ return -ENOMEM;
+
+ for (i = 0; i < args->count; i++) {
+ hva = gfn_to_hva(kvm, args->start_gfn + i);
+ if (kvm_is_error_hva(hva)) {
+ r = -EFAULT;
+ goto out;
+ }
+
+ curkey = get_guest_storage_key(current->mm, hva);
+ if (IS_ERR_VALUE(curkey)) {
+ r = curkey;
+ goto out;
+ }
+ keys[i] = curkey;
+ }
+
+ r = copy_to_user((uint8_t __user *)args->skeydata_addr, keys,
+ sizeof(uint8_t) * args->count);
+ if (r)
+ r = -EFAULT;
+out:
+ kvfree(keys);
+ return r;
+}
+
+static long kvm_s390_set_skeys(struct kvm *kvm, struct kvm_s390_skeys *args)
+{
+ uint8_t *keys;
+ uint64_t hva;
+ int i, r = 0;
+
+ if (args->flags != 0)
+ return -EINVAL;
+
+ /* Enforce sane limit on memory allocation */
+ if (args->count < 1 || args->count > KVM_S390_SKEYS_MAX)
+ return -EINVAL;
+
+ keys = kmalloc_array(args->count, sizeof(uint8_t),
+ GFP_KERNEL | __GFP_NOWARN);
+ if (!keys)
+ keys = vmalloc(sizeof(uint8_t) * args->count);
+ if (!keys)
+ return -ENOMEM;
+
+ r = copy_from_user(keys, (uint8_t __user *)args->skeydata_addr,
+ sizeof(uint8_t) * args->count);
+ if (r) {
+ r = -EFAULT;
+ goto out;
+ }
+
+ /* Enable storage key handling for the guest */
+ s390_enable_skey();
+
+ for (i = 0; i < args->count; i++) {
+ hva = gfn_to_hva(kvm, args->start_gfn + i);
+ if (kvm_is_error_hva(hva)) {
+ r = -EFAULT;
+ goto out;
+ }
+
+ /* Lowest order bit is reserved */
+ if (keys[i] & 0x01) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ r = set_guest_storage_key(current->mm, hva,
+ (unsigned long)keys[i], 0);
+ if (r)
+ goto out;
+ }
+out:
+ kvfree(keys);
+ return r;
+}
+
long kvm_arch_vm_ioctl(struct file *filp,
unsigned int ioctl, unsigned long arg)
{
r = kvm_s390_vm_has_attr(kvm, &attr);
break;
}
+ case KVM_S390_GET_SKEYS: {
+ struct kvm_s390_skeys args;
+
+ r = -EFAULT;
+ if (copy_from_user(&args, argp,
+ sizeof(struct kvm_s390_skeys)))
+ break;
+ r = kvm_s390_get_skeys(kvm, &args);
+ break;
+ }
+ case KVM_S390_SET_SKEYS: {
+ struct kvm_s390_skeys args;
+
+ r = -EFAULT;
+ if (copy_from_user(&args, argp,
+ sizeof(struct kvm_s390_skeys)))
+ break;
+ r = kvm_s390_set_skeys(kvm, &args);
+ break;
+ }
default:
r = -ENOTTY;
}
kvm->arch.dbf = debug_register(debug_name, 8, 2, 8 * sizeof(long));
if (!kvm->arch.dbf)
- goto out_nodbf;
+ goto out_err;
/*
* The architectural maximum amount of facilities is 16 kbit. To store
kvm->arch.model.fac =
(struct kvm_s390_fac *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
if (!kvm->arch.model.fac)
- goto out_nofac;
+ goto out_err;
/* Populate the facility mask initially. */
memcpy(kvm->arch.model.fac->mask, S390_lowcore.stfle_fac_list,
kvm->arch.model.ibc = sclp_get_ibc() & 0x0fff;
if (kvm_s390_crypto_init(kvm) < 0)
- goto out_crypto;
+ goto out_err;
spin_lock_init(&kvm->arch.float_int.lock);
- INIT_LIST_HEAD(&kvm->arch.float_int.list);
+ for (i = 0; i < FIRQ_LIST_COUNT; i++)
+ INIT_LIST_HEAD(&kvm->arch.float_int.lists[i]);
init_waitqueue_head(&kvm->arch.ipte_wq);
mutex_init(&kvm->arch.ipte_mutex);
} else {
kvm->arch.gmap = gmap_alloc(current->mm, (1UL << 44) - 1);
if (!kvm->arch.gmap)
- goto out_nogmap;
+ goto out_err;
kvm->arch.gmap->private = kvm;
kvm->arch.gmap->pfault_enabled = 0;
}
spin_lock_init(&kvm->arch.start_stop_lock);
return 0;
-out_nogmap:
+out_err:
kfree(kvm->arch.crypto.crycb);
-out_crypto:
free_page((unsigned long)kvm->arch.model.fac);
-out_nofac:
debug_unregister(kvm->arch.dbf);
-out_nodbf:
free_page((unsigned long)(kvm->arch.sca));
-out_err:
return rc;
}
KVM_SYNC_CRS |
KVM_SYNC_ARCH0 |
KVM_SYNC_PFAULT;
+ if (test_kvm_facility(vcpu->kvm, 129))
+ vcpu->run->kvm_valid_regs |= KVM_SYNC_VRS;
if (kvm_is_ucontrol(vcpu->kvm))
return __kvm_ucontrol_vcpu_init(vcpu);
void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
{
save_fp_ctl(&vcpu->arch.host_fpregs.fpc);
- save_fp_regs(vcpu->arch.host_fpregs.fprs);
+ if (test_kvm_facility(vcpu->kvm, 129))
+ save_vx_regs((__vector128 *)&vcpu->arch.host_vregs->vrs);
+ else
+ save_fp_regs(vcpu->arch.host_fpregs.fprs);
save_access_regs(vcpu->arch.host_acrs);
- restore_fp_ctl(&vcpu->arch.guest_fpregs.fpc);
- restore_fp_regs(vcpu->arch.guest_fpregs.fprs);
+ if (test_kvm_facility(vcpu->kvm, 129)) {
+ restore_fp_ctl(&vcpu->run->s.regs.fpc);
+ restore_vx_regs((__vector128 *)&vcpu->run->s.regs.vrs);
+ } else {
+ restore_fp_ctl(&vcpu->arch.guest_fpregs.fpc);
+ restore_fp_regs(vcpu->arch.guest_fpregs.fprs);
+ }
restore_access_regs(vcpu->run->s.regs.acrs);
gmap_enable(vcpu->arch.gmap);
atomic_set_mask(CPUSTAT_RUNNING, &vcpu->arch.sie_block->cpuflags);
{
atomic_clear_mask(CPUSTAT_RUNNING, &vcpu->arch.sie_block->cpuflags);
gmap_disable(vcpu->arch.gmap);
- save_fp_ctl(&vcpu->arch.guest_fpregs.fpc);
- save_fp_regs(vcpu->arch.guest_fpregs.fprs);
+ if (test_kvm_facility(vcpu->kvm, 129)) {
+ save_fp_ctl(&vcpu->run->s.regs.fpc);
+ save_vx_regs((__vector128 *)&vcpu->run->s.regs.vrs);
+ } else {
+ save_fp_ctl(&vcpu->arch.guest_fpregs.fpc);
+ save_fp_regs(vcpu->arch.guest_fpregs.fprs);
+ }
save_access_regs(vcpu->run->s.regs.acrs);
restore_fp_ctl(&vcpu->arch.host_fpregs.fpc);
- restore_fp_regs(vcpu->arch.host_fpregs.fprs);
+ if (test_kvm_facility(vcpu->kvm, 129))
+ restore_vx_regs((__vector128 *)&vcpu->arch.host_vregs->vrs);
+ else
+ restore_fp_regs(vcpu->arch.host_fpregs.fprs);
restore_access_regs(vcpu->arch.host_acrs);
}
return 0;
}
+static void kvm_s390_vcpu_setup_model(struct kvm_vcpu *vcpu)
+{
+ struct kvm_s390_cpu_model *model = &vcpu->kvm->arch.model;
+
+ vcpu->arch.cpu_id = model->cpu_id;
+ vcpu->arch.sie_block->ibc = model->ibc;
+ vcpu->arch.sie_block->fac = (int) (long) model->fac->list;
+}
+
int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
{
int rc = 0;
CPUSTAT_SM |
CPUSTAT_STOPPED |
CPUSTAT_GED);
+ kvm_s390_vcpu_setup_model(vcpu);
+
vcpu->arch.sie_block->ecb = 6;
if (test_kvm_facility(vcpu->kvm, 50) && test_kvm_facility(vcpu->kvm, 73))
vcpu->arch.sie_block->ecb |= 0x10;
vcpu->arch.sie_block->eca |= 1;
if (sclp_has_sigpif())
vcpu->arch.sie_block->eca |= 0x10000000U;
- vcpu->arch.sie_block->ictl |= ICTL_ISKE | ICTL_SSKE | ICTL_RRBE |
- ICTL_TPROT;
+ if (test_kvm_facility(vcpu->kvm, 129)) {
+ vcpu->arch.sie_block->eca |= 0x00020000;
+ vcpu->arch.sie_block->ecd |= 0x20000000;
+ }
+ vcpu->arch.sie_block->ictl |= ICTL_ISKE | ICTL_SSKE | ICTL_RRBE;
if (kvm_s390_cmma_enabled(vcpu->kvm)) {
rc = kvm_s390_vcpu_setup_cmma(vcpu);
hrtimer_init(&vcpu->arch.ckc_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
vcpu->arch.ckc_timer.function = kvm_s390_idle_wakeup;
- mutex_lock(&vcpu->kvm->lock);
- vcpu->arch.cpu_id = vcpu->kvm->arch.model.cpu_id;
- vcpu->arch.sie_block->ibc = vcpu->kvm->arch.model.ibc;
- mutex_unlock(&vcpu->kvm->lock);
-
kvm_s390_vcpu_crypto_setup(vcpu);
return rc;
vcpu->arch.sie_block = &sie_page->sie_block;
vcpu->arch.sie_block->itdba = (unsigned long) &sie_page->itdb;
+ vcpu->arch.host_vregs = &sie_page->vregs;
vcpu->arch.sie_block->icpua = id;
if (!kvm_is_ucontrol(kvm)) {
vcpu->arch.sie_block->scaol = (__u32)(__u64)kvm->arch.sca;
set_bit(63 - id, (unsigned long *) &kvm->arch.sca->mcn);
}
- vcpu->arch.sie_block->fac = (int) (long) kvm->arch.model.fac->list;
spin_lock_init(&vcpu->arch.local_int.lock);
vcpu->arch.local_int.float_int = &kvm->arch.float_int;
return 0;
}
+static int vcpu_post_run_fault_in_sie(struct kvm_vcpu *vcpu)
+{
+ psw_t *psw = &vcpu->arch.sie_block->gpsw;
+ u8 opcode;
+ int rc;
+
+ VCPU_EVENT(vcpu, 3, "%s", "fault in sie instruction");
+ trace_kvm_s390_sie_fault(vcpu);
+
+ /*
+ * We want to inject an addressing exception, which is defined as a
+ * suppressing or terminating exception. However, since we came here
+ * by a DAT access exception, the PSW still points to the faulting
+ * instruction since DAT exceptions are nullifying. So we've got
+ * to look up the current opcode to get the length of the instruction
+ * to be able to forward the PSW.
+ */
+ rc = read_guest(vcpu, psw->addr, 0, &opcode, 1);
+ if (rc)
+ return kvm_s390_inject_prog_cond(vcpu, rc);
+ psw->addr = __rewind_psw(*psw, -insn_length(opcode));
+
+ return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
+}
+
static int vcpu_post_run(struct kvm_vcpu *vcpu, int exit_reason)
{
int rc = -1;
}
}
- if (rc == -1) {
- VCPU_EVENT(vcpu, 3, "%s", "fault in sie instruction");
- trace_kvm_s390_sie_fault(vcpu);
- rc = kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
- }
+ if (rc == -1)
+ rc = vcpu_post_run_fault_in_sie(vcpu);
memcpy(&vcpu->run->s.regs.gprs[14], &vcpu->arch.sie_block->gg14, 16);
return kvm_s390_store_status_unloaded(vcpu, addr);
}
+/*
+ * store additional status at address
+ */
+int kvm_s390_store_adtl_status_unloaded(struct kvm_vcpu *vcpu,
+ unsigned long gpa)
+{
+ /* Only bits 0-53 are used for address formation */
+ if (!(gpa & ~0x3ff))
+ return 0;
+
+ return write_guest_abs(vcpu, gpa & ~0x3ff,
+ (void *)&vcpu->run->s.regs.vrs, 512);
+}
+
+int kvm_s390_vcpu_store_adtl_status(struct kvm_vcpu *vcpu, unsigned long addr)
+{
+ if (!test_kvm_facility(vcpu->kvm, 129))
+ return 0;
+
+ /*
+ * The guest VXRS are in the host VXRs due to the lazy
+ * copying in vcpu load/put. Let's update our copies before we save
+ * it into the save area.
+ */
+ save_vx_regs((__vector128 *)&vcpu->run->s.regs.vrs);
+
+ return kvm_s390_store_adtl_status_unloaded(vcpu, addr);
+}
+
static void __disable_ibs_on_vcpu(struct kvm_vcpu *vcpu)
{
kvm_check_request(KVM_REQ_ENABLE_IBS, vcpu);
return r;
}
+static long kvm_s390_guest_mem_op(struct kvm_vcpu *vcpu,
+ struct kvm_s390_mem_op *mop)
+{
+ void __user *uaddr = (void __user *)mop->buf;
+ void *tmpbuf = NULL;
+ int r, srcu_idx;
+ const u64 supported_flags = KVM_S390_MEMOP_F_INJECT_EXCEPTION
+ | KVM_S390_MEMOP_F_CHECK_ONLY;
+
+ if (mop->flags & ~supported_flags)
+ return -EINVAL;
+
+ if (mop->size > MEM_OP_MAX_SIZE)
+ return -E2BIG;
+
+ if (!(mop->flags & KVM_S390_MEMOP_F_CHECK_ONLY)) {
+ tmpbuf = vmalloc(mop->size);
+ if (!tmpbuf)
+ return -ENOMEM;
+ }
+
+ srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
+
+ switch (mop->op) {
+ case KVM_S390_MEMOP_LOGICAL_READ:
+ if (mop->flags & KVM_S390_MEMOP_F_CHECK_ONLY) {
+ r = check_gva_range(vcpu, mop->gaddr, mop->ar, mop->size, false);
+ break;
+ }
+ r = read_guest(vcpu, mop->gaddr, mop->ar, tmpbuf, mop->size);
+ if (r == 0) {
+ if (copy_to_user(uaddr, tmpbuf, mop->size))
+ r = -EFAULT;
+ }
+ break;
+ case KVM_S390_MEMOP_LOGICAL_WRITE:
+ if (mop->flags & KVM_S390_MEMOP_F_CHECK_ONLY) {
+ r = check_gva_range(vcpu, mop->gaddr, mop->ar, mop->size, true);
+ break;
+ }
+ if (copy_from_user(tmpbuf, uaddr, mop->size)) {
+ r = -EFAULT;
+ break;
+ }
+ r = write_guest(vcpu, mop->gaddr, mop->ar, tmpbuf, mop->size);
+ break;
+ default:
+ r = -EINVAL;
+ }
+
+ srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
+
+ if (r > 0 && (mop->flags & KVM_S390_MEMOP_F_INJECT_EXCEPTION) != 0)
+ kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
+
+ vfree(tmpbuf);
+ return r;
+}
+
long kvm_arch_vcpu_ioctl(struct file *filp,
unsigned int ioctl, unsigned long arg)
{
long r;
switch (ioctl) {
+ case KVM_S390_IRQ: {
+ struct kvm_s390_irq s390irq;
+
+ r = -EFAULT;
+ if (copy_from_user(&s390irq, argp, sizeof(s390irq)))
+ break;
+ r = kvm_s390_inject_vcpu(vcpu, &s390irq);
+ break;
+ }
case KVM_S390_INTERRUPT: {
struct kvm_s390_interrupt s390int;
struct kvm_s390_irq s390irq;
r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
break;
}
+ case KVM_S390_MEM_OP: {
+ struct kvm_s390_mem_op mem_op;
+
+ if (copy_from_user(&mem_op, argp, sizeof(mem_op)) == 0)
+ r = kvm_s390_guest_mem_op(vcpu, &mem_op);
+ else
+ r = -EFAULT;
+ break;
+ }
+ case KVM_S390_SET_IRQ_STATE: {
+ struct kvm_s390_irq_state irq_state;
+
+ r = -EFAULT;
+ if (copy_from_user(&irq_state, argp, sizeof(irq_state)))
+ break;
+ if (irq_state.len > VCPU_IRQS_MAX_BUF ||
+ irq_state.len == 0 ||
+ irq_state.len % sizeof(struct kvm_s390_irq) > 0) {
+ r = -EINVAL;
+ break;
+ }
+ r = kvm_s390_set_irq_state(vcpu,
+ (void __user *) irq_state.buf,
+ irq_state.len);
+ break;
+ }
+ case KVM_S390_GET_IRQ_STATE: {
+ struct kvm_s390_irq_state irq_state;
+
+ r = -EFAULT;
+ if (copy_from_user(&irq_state, argp, sizeof(irq_state)))
+ break;
+ if (irq_state.len == 0) {
+ r = -EINVAL;
+ break;
+ }
+ r = kvm_s390_get_irq_state(vcpu,
+ (__u8 __user *) irq_state.buf,
+ irq_state.len);
+ break;
+ }
default:
r = -ENOTTY;
}
kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
}
-static inline u64 kvm_s390_get_base_disp_s(struct kvm_vcpu *vcpu)
+typedef u8 __bitwise ar_t;
+
+static inline u64 kvm_s390_get_base_disp_s(struct kvm_vcpu *vcpu, ar_t *ar)
{
u32 base2 = vcpu->arch.sie_block->ipb >> 28;
u32 disp2 = ((vcpu->arch.sie_block->ipb & 0x0fff0000) >> 16);
+ if (ar)
+ *ar = base2;
+
return (base2 ? vcpu->run->s.regs.gprs[base2] : 0) + disp2;
}
static inline void kvm_s390_get_base_disp_sse(struct kvm_vcpu *vcpu,
- u64 *address1, u64 *address2)
+ u64 *address1, u64 *address2,
+ ar_t *ar_b1, ar_t *ar_b2)
{
u32 base1 = (vcpu->arch.sie_block->ipb & 0xf0000000) >> 28;
u32 disp1 = (vcpu->arch.sie_block->ipb & 0x0fff0000) >> 16;
*address1 = (base1 ? vcpu->run->s.regs.gprs[base1] : 0) + disp1;
*address2 = (base2 ? vcpu->run->s.regs.gprs[base2] : 0) + disp2;
+
+ if (ar_b1)
+ *ar_b1 = base1;
+ if (ar_b2)
+ *ar_b2 = base2;
}
static inline void kvm_s390_get_regs_rre(struct kvm_vcpu *vcpu, int *r1, int *r2)
*r2 = (vcpu->arch.sie_block->ipb & 0x000f0000) >> 16;
}
-static inline u64 kvm_s390_get_base_disp_rsy(struct kvm_vcpu *vcpu)
+static inline u64 kvm_s390_get_base_disp_rsy(struct kvm_vcpu *vcpu, ar_t *ar)
{
u32 base2 = vcpu->arch.sie_block->ipb >> 28;
u32 disp2 = ((vcpu->arch.sie_block->ipb & 0x0fff0000) >> 16) +
if (disp2 & 0x80000)
disp2+=0xfff00000;
+ if (ar)
+ *ar = base2;
+
return (base2 ? vcpu->run->s.regs.gprs[base2] : 0) + (long)(int)disp2;
}
-static inline u64 kvm_s390_get_base_disp_rs(struct kvm_vcpu *vcpu)
+static inline u64 kvm_s390_get_base_disp_rs(struct kvm_vcpu *vcpu, ar_t *ar)
{
u32 base2 = vcpu->arch.sie_block->ipb >> 28;
u32 disp2 = ((vcpu->arch.sie_block->ipb & 0x0fff0000) >> 16);
+ if (ar)
+ *ar = base2;
+
return (base2 ? vcpu->run->s.regs.gprs[base2] : 0) + disp2;
}
vcpu->arch.sie_block->gpsw.mask |= cc << 44;
}
-/* test availability of facility in a kvm intance */
+/* test availability of facility in a kvm instance */
static inline int test_kvm_facility(struct kvm *kvm, unsigned long nr)
{
return __test_facility(nr, kvm->arch.model.fac->mask) &&
__test_facility(nr, kvm->arch.model.fac->list);
}
+static inline int set_kvm_facility(u64 *fac_list, unsigned long nr)
+{
+ unsigned char *ptr;
+
+ if (nr >= MAX_FACILITY_BIT)
+ return -EINVAL;
+ ptr = (unsigned char *) fac_list + (nr >> 3);
+ *ptr |= (0x80UL >> (nr & 7));
+ return 0;
+}
+
/* are cpu states controlled by user space */
static inline int kvm_s390_user_cpu_state_ctrl(struct kvm *kvm)
{
struct kvm_s390_irq *irq);
int __must_check kvm_s390_inject_program_int(struct kvm_vcpu *vcpu, u16 code);
struct kvm_s390_interrupt_info *kvm_s390_get_io_int(struct kvm *kvm,
- u64 cr6, u64 schid);
-void kvm_s390_reinject_io_int(struct kvm *kvm,
- struct kvm_s390_interrupt_info *inti);
+ u64 isc_mask, u32 schid);
+int kvm_s390_reinject_io_int(struct kvm *kvm,
+ struct kvm_s390_interrupt_info *inti);
int kvm_s390_mask_adapter(struct kvm *kvm, unsigned int id, bool masked);
/* implemented in intercept.c */
/* implemented in kvm-s390.c */
long kvm_arch_fault_in_page(struct kvm_vcpu *vcpu, gpa_t gpa, int writable);
int kvm_s390_store_status_unloaded(struct kvm_vcpu *vcpu, unsigned long addr);
+int kvm_s390_store_adtl_status_unloaded(struct kvm_vcpu *vcpu,
+ unsigned long addr);
int kvm_s390_vcpu_store_status(struct kvm_vcpu *vcpu, unsigned long addr);
+int kvm_s390_vcpu_store_adtl_status(struct kvm_vcpu *vcpu, unsigned long addr);
void kvm_s390_vcpu_start(struct kvm_vcpu *vcpu);
void kvm_s390_vcpu_stop(struct kvm_vcpu *vcpu);
void s390_vcpu_block(struct kvm_vcpu *vcpu);
extern struct kvm_device_ops kvm_flic_ops;
int kvm_s390_is_stop_irq_pending(struct kvm_vcpu *vcpu);
void kvm_s390_clear_stop_irq(struct kvm_vcpu *vcpu);
+int kvm_s390_set_irq_state(struct kvm_vcpu *vcpu,
+ void __user *buf, int len);
+int kvm_s390_get_irq_state(struct kvm_vcpu *vcpu,
+ __u8 __user *buf, int len);
/* implemented in guestdbg.c */
void kvm_s390_backup_guest_per_regs(struct kvm_vcpu *vcpu);
struct kvm_vcpu *cpup;
s64 hostclk, val;
int i, rc;
+ ar_t ar;
u64 op2;
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
- op2 = kvm_s390_get_base_disp_s(vcpu);
+ op2 = kvm_s390_get_base_disp_s(vcpu, &ar);
if (op2 & 7) /* Operand must be on a doubleword boundary */
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
- rc = read_guest(vcpu, op2, &val, sizeof(val));
+ rc = read_guest(vcpu, op2, ar, &val, sizeof(val));
if (rc)
return kvm_s390_inject_prog_cond(vcpu, rc);
u64 operand2;
u32 address;
int rc;
+ ar_t ar;
vcpu->stat.instruction_spx++;
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
- operand2 = kvm_s390_get_base_disp_s(vcpu);
+ operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
/* must be word boundary */
if (operand2 & 3)
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
/* get the value */
- rc = read_guest(vcpu, operand2, &address, sizeof(address));
+ rc = read_guest(vcpu, operand2, ar, &address, sizeof(address));
if (rc)
return kvm_s390_inject_prog_cond(vcpu, rc);
u64 operand2;
u32 address;
int rc;
+ ar_t ar;
vcpu->stat.instruction_stpx++;
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
- operand2 = kvm_s390_get_base_disp_s(vcpu);
+ operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
/* must be word boundary */
if (operand2 & 3)
address = kvm_s390_get_prefix(vcpu);
/* get the value */
- rc = write_guest(vcpu, operand2, &address, sizeof(address));
+ rc = write_guest(vcpu, operand2, ar, &address, sizeof(address));
if (rc)
return kvm_s390_inject_prog_cond(vcpu, rc);
u16 vcpu_id = vcpu->vcpu_id;
u64 ga;
int rc;
+ ar_t ar;
vcpu->stat.instruction_stap++;
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
- ga = kvm_s390_get_base_disp_s(vcpu);
+ ga = kvm_s390_get_base_disp_s(vcpu, &ar);
if (ga & 1)
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
- rc = write_guest(vcpu, ga, &vcpu_id, sizeof(vcpu_id));
+ rc = write_guest(vcpu, ga, ar, &vcpu_id, sizeof(vcpu_id));
if (rc)
return kvm_s390_inject_prog_cond(vcpu, rc);
kvm_s390_get_regs_rre(vcpu, NULL, ®2);
addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
addr = kvm_s390_logical_to_effective(vcpu, addr);
- if (kvm_s390_check_low_addr_protection(vcpu, addr))
+ if (kvm_s390_check_low_addr_prot_real(vcpu, addr))
return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
addr = kvm_s390_real_to_abs(vcpu, addr);
struct kvm_s390_interrupt_info *inti;
unsigned long len;
u32 tpi_data[3];
- int cc, rc;
+ int rc;
u64 addr;
+ ar_t ar;
- rc = 0;
- addr = kvm_s390_get_base_disp_s(vcpu);
+ addr = kvm_s390_get_base_disp_s(vcpu, &ar);
if (addr & 3)
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
- cc = 0;
+
inti = kvm_s390_get_io_int(vcpu->kvm, vcpu->arch.sie_block->gcr[6], 0);
- if (!inti)
- goto no_interrupt;
- cc = 1;
+ if (!inti) {
+ kvm_s390_set_psw_cc(vcpu, 0);
+ return 0;
+ }
+
tpi_data[0] = inti->io.subchannel_id << 16 | inti->io.subchannel_nr;
tpi_data[1] = inti->io.io_int_parm;
tpi_data[2] = inti->io.io_int_word;
* provided area.
*/
len = sizeof(tpi_data) - 4;
- rc = write_guest(vcpu, addr, &tpi_data, len);
- if (rc)
- return kvm_s390_inject_prog_cond(vcpu, rc);
+ rc = write_guest(vcpu, addr, ar, &tpi_data, len);
+ if (rc) {
+ rc = kvm_s390_inject_prog_cond(vcpu, rc);
+ goto reinject_interrupt;
+ }
} else {
/*
* Store the three-word I/O interruption code into
* the appropriate lowcore area.
*/
len = sizeof(tpi_data);
- if (write_guest_lc(vcpu, __LC_SUBCHANNEL_ID, &tpi_data, len))
+ if (write_guest_lc(vcpu, __LC_SUBCHANNEL_ID, &tpi_data, len)) {
+ /* failed writes to the low core are not recoverable */
rc = -EFAULT;
+ goto reinject_interrupt;
+ }
}
+
+ /* irq was successfully handed to the guest */
+ kfree(inti);
+ kvm_s390_set_psw_cc(vcpu, 1);
+ return 0;
+reinject_interrupt:
/*
* If we encounter a problem storing the interruption code, the
* instruction is suppressed from the guest's view: reinject the
* interrupt.
*/
- if (!rc)
+ if (kvm_s390_reinject_io_int(vcpu->kvm, inti)) {
kfree(inti);
- else
- kvm_s390_reinject_io_int(vcpu->kvm, inti);
-no_interrupt:
- /* Set condition code and we're done. */
- if (!rc)
- kvm_s390_set_psw_cc(vcpu, cc);
+ rc = -EFAULT;
+ }
+ /* don't set the cc, a pgm irq was injected or we drop to user space */
return rc ? -EFAULT : 0;
}
static int handle_tsch(struct kvm_vcpu *vcpu)
{
- struct kvm_s390_interrupt_info *inti;
+ struct kvm_s390_interrupt_info *inti = NULL;
+ const u64 isc_mask = 0xffUL << 24; /* all iscs set */
- inti = kvm_s390_get_io_int(vcpu->kvm, 0,
- vcpu->run->s.regs.gprs[1]);
+ /* a valid schid has at least one bit set */
+ if (vcpu->run->s.regs.gprs[1])
+ inti = kvm_s390_get_io_int(vcpu->kvm, isc_mask,
+ vcpu->run->s.regs.gprs[1]);
/*
* Prepare exit to userspace.
psw_compat_t new_psw;
u64 addr;
int rc;
+ ar_t ar;
if (gpsw->mask & PSW_MASK_PSTATE)
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
- addr = kvm_s390_get_base_disp_s(vcpu);
+ addr = kvm_s390_get_base_disp_s(vcpu, &ar);
if (addr & 7)
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
- rc = read_guest(vcpu, addr, &new_psw, sizeof(new_psw));
+ rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw));
if (rc)
return kvm_s390_inject_prog_cond(vcpu, rc);
if (!(new_psw.mask & PSW32_MASK_BASE))
psw_t new_psw;
u64 addr;
int rc;
+ ar_t ar;
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
- addr = kvm_s390_get_base_disp_s(vcpu);
+ addr = kvm_s390_get_base_disp_s(vcpu, &ar);
if (addr & 7)
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
- rc = read_guest(vcpu, addr, &new_psw, sizeof(new_psw));
+ rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw));
if (rc)
return kvm_s390_inject_prog_cond(vcpu, rc);
vcpu->arch.sie_block->gpsw = new_psw;
u64 stidp_data = vcpu->arch.stidp_data;
u64 operand2;
int rc;
+ ar_t ar;
vcpu->stat.instruction_stidp++;
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
- operand2 = kvm_s390_get_base_disp_s(vcpu);
+ operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
if (operand2 & 7)
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
- rc = write_guest(vcpu, operand2, &stidp_data, sizeof(stidp_data));
+ rc = write_guest(vcpu, operand2, ar, &stidp_data, sizeof(stidp_data));
if (rc)
return kvm_s390_inject_prog_cond(vcpu, rc);
for (n = mem->count - 1; n > 0 ; n--)
memcpy(&mem->vm[n], &mem->vm[n - 1], sizeof(mem->vm[0]));
+ memset(&mem->vm[0], 0, sizeof(mem->vm[0]));
mem->vm[0].cpus_total = cpus;
mem->vm[0].cpus_configured = cpus;
mem->vm[0].cpus_standby = 0;
ASCEBC(mem->vm[0].cpi, 16);
}
+static void insert_stsi_usr_data(struct kvm_vcpu *vcpu, u64 addr, ar_t ar,
+ u8 fc, u8 sel1, u16 sel2)
+{
+ vcpu->run->exit_reason = KVM_EXIT_S390_STSI;
+ vcpu->run->s390_stsi.addr = addr;
+ vcpu->run->s390_stsi.ar = ar;
+ vcpu->run->s390_stsi.fc = fc;
+ vcpu->run->s390_stsi.sel1 = sel1;
+ vcpu->run->s390_stsi.sel2 = sel2;
+}
+
static int handle_stsi(struct kvm_vcpu *vcpu)
{
int fc = (vcpu->run->s.regs.gprs[0] & 0xf0000000) >> 28;
unsigned long mem = 0;
u64 operand2;
int rc = 0;
+ ar_t ar;
vcpu->stat.instruction_stsi++;
VCPU_EVENT(vcpu, 4, "stsi: fc: %x sel1: %x sel2: %x", fc, sel1, sel2);
return 0;
}
- operand2 = kvm_s390_get_base_disp_s(vcpu);
+ operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
if (operand2 & 0xfff)
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
break;
}
- rc = write_guest(vcpu, operand2, (void *)mem, PAGE_SIZE);
+ rc = write_guest(vcpu, operand2, ar, (void *)mem, PAGE_SIZE);
if (rc) {
rc = kvm_s390_inject_prog_cond(vcpu, rc);
goto out;
}
+ if (vcpu->kvm->arch.user_stsi) {
+ insert_stsi_usr_data(vcpu, operand2, ar, fc, sel1, sel2);
+ rc = -EREMOTE;
+ }
trace_kvm_s390_handle_stsi(vcpu, fc, sel1, sel2, operand2);
free_page(mem);
kvm_s390_set_psw_cc(vcpu, 0);
vcpu->run->s.regs.gprs[0] = 0;
- return 0;
+ return rc;
out_no_data:
kvm_s390_set_psw_cc(vcpu, 3);
out:
}
if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
- if (kvm_s390_check_low_addr_protection(vcpu, start))
+ if (kvm_s390_check_low_addr_prot_real(vcpu, start))
return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
}
int reg, rc, nr_regs;
u32 ctl_array[16];
u64 ga;
+ ar_t ar;
vcpu->stat.instruction_lctl++;
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
- ga = kvm_s390_get_base_disp_rs(vcpu);
+ ga = kvm_s390_get_base_disp_rs(vcpu, &ar);
if (ga & 3)
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
trace_kvm_s390_handle_lctl(vcpu, 0, reg1, reg3, ga);
nr_regs = ((reg3 - reg1) & 0xf) + 1;
- rc = read_guest(vcpu, ga, ctl_array, nr_regs * sizeof(u32));
+ rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32));
if (rc)
return kvm_s390_inject_prog_cond(vcpu, rc);
reg = reg1;
int reg, rc, nr_regs;
u32 ctl_array[16];
u64 ga;
+ ar_t ar;
vcpu->stat.instruction_stctl++;
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
- ga = kvm_s390_get_base_disp_rs(vcpu);
+ ga = kvm_s390_get_base_disp_rs(vcpu, &ar);
if (ga & 3)
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
break;
reg = (reg + 1) % 16;
} while (1);
- rc = write_guest(vcpu, ga, ctl_array, nr_regs * sizeof(u32));
+ rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32));
return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
}
int reg, rc, nr_regs;
u64 ctl_array[16];
u64 ga;
+ ar_t ar;
vcpu->stat.instruction_lctlg++;
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
- ga = kvm_s390_get_base_disp_rsy(vcpu);
+ ga = kvm_s390_get_base_disp_rsy(vcpu, &ar);
if (ga & 7)
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
trace_kvm_s390_handle_lctl(vcpu, 1, reg1, reg3, ga);
nr_regs = ((reg3 - reg1) & 0xf) + 1;
- rc = read_guest(vcpu, ga, ctl_array, nr_regs * sizeof(u64));
+ rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64));
if (rc)
return kvm_s390_inject_prog_cond(vcpu, rc);
reg = reg1;
int reg, rc, nr_regs;
u64 ctl_array[16];
u64 ga;
+ ar_t ar;
vcpu->stat.instruction_stctg++;
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
- ga = kvm_s390_get_base_disp_rsy(vcpu);
+ ga = kvm_s390_get_base_disp_rsy(vcpu, &ar);
if (ga & 7)
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
break;
reg = (reg + 1) % 16;
} while (1);
- rc = write_guest(vcpu, ga, ctl_array, nr_regs * sizeof(u64));
+ rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64));
return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
}
unsigned long hva, gpa;
int ret = 0, cc = 0;
bool writable;
+ ar_t ar;
vcpu->stat.instruction_tprot++;
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
- kvm_s390_get_base_disp_sse(vcpu, &address1, &address2);
+ kvm_s390_get_base_disp_sse(vcpu, &address1, &address2, &ar, NULL);
/* we only handle the Linux memory detection case:
* access key == 0
return -EOPNOTSUPP;
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
ipte_lock(vcpu);
- ret = guest_translate_address(vcpu, address1, &gpa, 1);
+ ret = guest_translate_address(vcpu, address1, ar, &gpa, 1);
if (ret == PGM_PROTECTION) {
/* Write protected? Try again with read-only... */
cc = 1;
- ret = guest_translate_address(vcpu, address1, &gpa, 0);
+ ret = guest_translate_address(vcpu, address1, ar, &gpa, 0);
}
if (ret) {
if (ret == PGM_ADDRESSING || ret == PGM_TRANSLATION_SPEC) {
case SIGP_STORE_STATUS_AT_ADDRESS:
vcpu->stat.instruction_sigp_store_status++;
break;
+ case SIGP_STORE_ADDITIONAL_STATUS:
+ vcpu->stat.instruction_sigp_store_adtl_status++;
+ break;
case SIGP_SET_PREFIX:
vcpu->stat.instruction_sigp_prefix++;
break;
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
- order_code = kvm_s390_get_base_disp_rs(vcpu);
+ order_code = kvm_s390_get_base_disp_rs(vcpu, NULL);
if (handle_sigp_order_in_user_space(vcpu, order_code))
return -EOPNOTSUPP;
int r3 = vcpu->arch.sie_block->ipa & 0x000f;
u16 cpu_addr = vcpu->run->s.regs.gprs[r3];
struct kvm_vcpu *dest_vcpu;
- u8 order_code = kvm_s390_get_base_disp_rs(vcpu);
+ u8 order_code = kvm_s390_get_base_disp_rs(vcpu, NULL);
trace_kvm_s390_handle_sigp_pei(vcpu, order_code, cpu_addr);
#undef TRACE_INCLUDE_FILE
#define TRACE_INCLUDE_FILE trace-s390
+/*
+ * The TRACE_SYSTEM_VAR defaults to TRACE_SYSTEM, but must be a
+ * legitimate C variable. It is not exported to user space.
+ */
+#undef TRACE_SYSTEM_VAR
+#define TRACE_SYSTEM_VAR kvm_s390
+
/*
* Trace point for the creation of the kvm instance.
*/
return sysctl_legacy_va_layout;
}
-static unsigned long mmap_rnd(void)
+unsigned long arch_mmap_rnd(void)
{
- if (!(current->flags & PF_RANDOMIZE))
- return 0;
if (is_32bit_task())
return (get_random_int() & 0x7ff) << PAGE_SHIFT;
else
return (get_random_int() & mmap_rnd_mask) << PAGE_SHIFT;
}
-static unsigned long mmap_base_legacy(void)
+static unsigned long mmap_base_legacy(unsigned long rnd)
{
- return TASK_UNMAPPED_BASE + mmap_rnd();
+ return TASK_UNMAPPED_BASE + rnd;
}
-static inline unsigned long mmap_base(void)
+static inline unsigned long mmap_base(unsigned long rnd)
{
unsigned long gap = rlimit(RLIMIT_STACK);
else if (gap > MAX_GAP)
gap = MAX_GAP;
gap &= PAGE_MASK;
- return STACK_TOP - stack_maxrandom_size() - mmap_rnd() - gap;
+ return STACK_TOP - stack_maxrandom_size() - rnd - gap;
}
unsigned long
return addr;
}
-unsigned long randomize_et_dyn(void)
-{
- unsigned long base;
-
- base = STACK_TOP / 3 * 2;
- if (!is_32bit_task())
- /* Align to 4GB */
- base &= ~((1UL << 32) - 1);
- return base + mmap_rnd();
-}
-
#ifndef CONFIG_64BIT
/*
*/
void arch_pick_mmap_layout(struct mm_struct *mm)
{
+ unsigned long random_factor = 0UL;
+
+ if (current->flags & PF_RANDOMIZE)
+ random_factor = arch_mmap_rnd();
+
/*
* Fall back to the standard layout if the personality
* bit is set, or if the expected stack growth is unlimited:
*/
if (mmap_is_legacy()) {
- mm->mmap_base = mmap_base_legacy();
+ mm->mmap_base = mmap_base_legacy(random_factor);
mm->get_unmapped_area = arch_get_unmapped_area;
} else {
- mm->mmap_base = mmap_base();
+ mm->mmap_base = mmap_base(random_factor);
mm->get_unmapped_area = arch_get_unmapped_area_topdown;
}
}
*/
void arch_pick_mmap_layout(struct mm_struct *mm)
{
+ unsigned long random_factor = 0UL;
+
+ if (current->flags & PF_RANDOMIZE)
+ random_factor = arch_mmap_rnd();
+
/*
* Fall back to the standard layout if the personality
* bit is set, or if the expected stack growth is unlimited:
*/
if (mmap_is_legacy()) {
- mm->mmap_base = mmap_base_legacy();
+ mm->mmap_base = mmap_base_legacy(random_factor);
mm->get_unmapped_area = s390_get_unmapped_area;
} else {
- mm->mmap_base = mmap_base();
+ mm->mmap_base = mmap_base(random_factor);
mm->get_unmapped_area = s390_get_unmapped_area_topdown;
}
}
zpci_cleanup_bus_resources(zdev);
return -EIO;
}
-
zdev->bus->max_bus_speed = zdev->max_bus_speed;
+ pci_bus_add_devices(zdev->bus);
return 0;
}
config NEED_SG_DMA_LENGTH
def_bool y
+config PGTABLE_LEVELS
+ default 3 if X2TLB
+ default 2
+
source "init/Kconfig"
source "kernel/Kconfig.freezer"
need_domain_info = need_domain_info || hose->index;
hose->need_domain_info = need_domain_info;
- if (bus) {
- next_busno = bus->busn_res.end + 1;
- /* Don't allow 8-bit bus number overflow inside the hose -
- reserve some space for bridges. */
- if (next_busno > 224) {
- next_busno = 0;
- need_domain_info = 1;
- }
- pci_bus_size_bridges(bus);
- pci_bus_assign_resources(bus);
- } else {
+ if (!bus) {
pci_free_resource_list(&resources);
+ return;
+ }
+
+ next_busno = bus->busn_res.end + 1;
+ /* Don't allow 8-bit bus number overflow inside the hose -
+ reserve some space for bridges. */
+ if (next_busno > 224) {
+ next_busno = 0;
+ need_domain_info = 1;
}
+
+ pci_bus_size_bridges(bus);
+ pci_bus_assign_resources(bus);
+ pci_bus_add_devices(bus);
}
/*
.rating = 150,
};
-static void dwarf_unwinder_cleanup(void)
+static void __init dwarf_unwinder_cleanup(void)
{
struct dwarf_fde *fde, *next_fde;
struct dwarf_cie *cie, *next_cie;
rbtree_postorder_for_each_entry_safe(cie, next_cie, &cie_root, node)
kfree(cie);
+ if (dwarf_reg_pool)
+ mempool_destroy(dwarf_reg_pool);
+ if (dwarf_frame_pool)
+ mempool_destroy(dwarf_frame_pool);
kmem_cache_destroy(dwarf_reg_cachep);
kmem_cache_destroy(dwarf_frame_cachep);
}
sizeof(struct dwarf_reg), 0,
SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
- dwarf_frame_pool = mempool_create(DWARF_FRAME_MIN_REQ,
- mempool_alloc_slab,
- mempool_free_slab,
- dwarf_frame_cachep);
+ dwarf_frame_pool = mempool_create_slab_pool(DWARF_FRAME_MIN_REQ,
+ dwarf_frame_cachep);
if (!dwarf_frame_pool)
goto out;
- dwarf_reg_pool = mempool_create(DWARF_REG_MIN_REQ,
- mempool_alloc_slab,
- mempool_free_slab,
- dwarf_reg_cachep);
+ dwarf_reg_pool = mempool_create_slab_pool(DWARF_REG_MIN_REQ,
+ dwarf_reg_cachep);
if (!dwarf_reg_pool)
goto out;
if (err)
return -EFAULT;
- set_fs(USER_DS);
-
pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n",
current->comm, task_pid_nr(current), frame, regs->pc, regs->pr);
if (err)
return -EFAULT;
- set_fs(USER_DS);
-
pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n",
current->comm, task_pid_nr(current), frame, regs->pc, regs->pr);
regs->pc = neff_sign_extend((unsigned long)ksig->ka.sa.sa_handler);
- set_fs(USER_DS);
-
/* Broken %016Lx */
pr_debug("SIG deliver (#%d,%s:%d): sp=%p pc=%08Lx%08Lx link=%08Lx%08Lx\n",
signal, current->comm, current->pid, frame,
regs->regs[REG_ARG3] = (unsigned long long)(unsigned long)(signed long)&frame->uc.uc_mcontext;
regs->pc = neff_sign_extend((unsigned long)ksig->ka.sa.sa_handler);
- set_fs(USER_DS);
-
pr_debug("SIG deliver (#%d,%s:%d): sp=%p pc=%08Lx%08Lx link=%08Lx%08Lx\n",
signal, current->comm, current->pid, frame,
regs->pc >> 32, regs->pc & 0xffffffff,
config ARCH_SUPPORTS_DEBUG_PAGEALLOC
def_bool y if SPARC64
+config PGTABLE_LEVELS
+ default 4 if 64BIT
+ default 3
+
source "init/Kconfig"
source "kernel/Kconfig.freezer"
#ifndef _ASM_SPARC_JUMP_LABEL_H
#define _ASM_SPARC_JUMP_LABEL_H
-#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
#include <linux/types.h>
return true;
}
-#endif /* __KERNEL__ */
-
typedef u32 jump_label_t;
struct jump_entry {
jump_label_t key;
};
+#endif /* __ASSEMBLY__ */
#endif
root_bus = pci_scan_root_bus(&ofdev->dev, 0, info->ops, info,
&resources);
- if (root_bus) {
- /* Setup IRQs of all devices using custom routines */
- pci_fixup_irqs(pci_common_swizzle, info->map_irq);
-
- /* Assign devices with resources */
- pci_assign_unassigned_resources();
- } else {
+ if (!root_bus) {
pci_free_resource_list(&resources);
+ return;
}
+
+ /* Setup IRQs of all devices using custom routines */
+ pci_fixup_irqs(pci_common_swizzle, info->map_irq);
+
+ /* Assign devices with resources */
+ pci_assign_unassigned_resources();
+ pci_bus_add_devices(root_bus);
}
void pcibios_fixup_bus(struct pci_bus *pbus)
static struct mdesc_handle *mdesc_kmalloc(unsigned int mdesc_size)
{
unsigned int handle_size;
+ struct mdesc_handle *hp;
+ unsigned long addr;
void *base;
handle_size = (sizeof(struct mdesc_handle) -
sizeof(struct mdesc_hdr) +
mdesc_size);
+ /*
+ * Allocation has to succeed because mdesc update would be missed
+ * and such events are not retransmitted.
+ */
base = kmalloc(handle_size + 15, GFP_KERNEL | __GFP_NOFAIL);
- if (base) {
- struct mdesc_handle *hp;
- unsigned long addr;
-
- addr = (unsigned long)base;
- addr = (addr + 15UL) & ~15UL;
- hp = (struct mdesc_handle *) addr;
+ addr = (unsigned long)base;
+ addr = (addr + 15UL) & ~15UL;
+ hp = (struct mdesc_handle *) addr;
- mdesc_handle_init(hp, handle_size, base);
- return hp;
- }
+ mdesc_handle_init(hp, handle_size, base);
- return NULL;
+ return hp;
}
static void mdesc_kfree(struct mdesc_handle *hp)
(unsigned long long)r->end,
(unsigned int)r->flags);
- if (pci_claim_resource(dev, i) == 0)
- continue;
-
- pci_claim_bridge_resource(dev, i);
+ pci_claim_resource(dev, i);
}
}
}
pci_of_scan_bus(pbm, node, bus);
- pci_bus_add_devices(bus);
pci_bus_register_of_sysfs(bus);
pci_claim_bus_resources(bus);
-
+ pci_bus_add_devices(bus);
return bus;
}
struct linux_pbm_info *pbm = &pcic->pbm;
pbm->pci_bus = pci_scan_bus(pbm->pci_first_busno, &pcic_ops, pbm);
+ if (!pbm->pci_bus)
+ return;
+
#if 0 /* deadwood transplanted from sparc64 */
pci_fill_in_pbm_cookies(pbm->pci_bus, pbm, pbm->prom_node);
pci_record_assignments(pbm, pbm->pci_bus);
pci_assign_unassigned(pbm, pbm->pci_bus);
pci_fixup_irq(pbm, pbm->pci_bus);
#endif
+ pci_bus_add_devices(pbm->pci_bus);
}
/*
.rating = 100,
.read = timer_cs_read,
.mask = CLOCKSOURCE_MASK(64),
- .shift = 2,
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
static __init int setup_timer_cs(void)
{
timer_cs_enabled = 1;
- timer_cs.mult = clocksource_hz2mult(sparc_config.clock_rate,
- timer_cs.shift);
-
- return clocksource_register(&timer_cs);
+ return clocksource_register_hz(&timer_cs, sparc_config.clock_rate);
}
#ifdef CONFIG_SMP
default "arch/tile/configs/tilepro_defconfig" if !TILEGX
default "arch/tile/configs/tilegx_defconfig" if TILEGX
+config PGTABLE_LEVELS
+ int
+ default 3 if 64BIT
+ default 2
+
source "init/Kconfig"
source "kernel/Kconfig.freezer"
struct pci_bus *next_bus;
struct pci_dev *dev;
+ pci_bus_add_devices(root_bus);
+
list_for_each_entry(dev, &root_bus->devices, bus_list) {
/*
* Find the PCI host controller, ie. the 1st
alloc_mem_map_failed:
break;
}
+
+ pci_bus_add_devices(root_bus);
}
return 0;
void update_vsyscall(struct timekeeper *tk)
{
- if (tk->tkr.clock != &cycle_counter_cs)
+ if (tk->tkr_mono.clock != &cycle_counter_cs)
return;
write_seqcount_begin(&vdso_data->tb_seq);
- vdso_data->cycle_last = tk->tkr.cycle_last;
- vdso_data->mask = tk->tkr.mask;
- vdso_data->mult = tk->tkr.mult;
- vdso_data->shift = tk->tkr.shift;
+ vdso_data->cycle_last = tk->tkr_mono.cycle_last;
+ vdso_data->mask = tk->tkr_mono.mask;
+ vdso_data->mult = tk->tkr_mono.mult;
+ vdso_data->shift = tk->tkr_mono.shift;
vdso_data->wall_time_sec = tk->xtime_sec;
- vdso_data->wall_time_snsec = tk->tkr.xtime_nsec;
+ vdso_data->wall_time_snsec = tk->tkr_mono.xtime_nsec;
vdso_data->monotonic_time_sec = tk->xtime_sec
+ tk->wall_to_monotonic.tv_sec;
- vdso_data->monotonic_time_snsec = tk->tkr.xtime_nsec
+ vdso_data->monotonic_time_snsec = tk->tkr_mono.xtime_nsec
+ ((u64)tk->wall_to_monotonic.tv_nsec
- << tk->tkr.shift);
+ << tk->tkr_mono.shift);
while (vdso_data->monotonic_time_snsec >=
- (((u64)NSEC_PER_SEC) << tk->tkr.shift)) {
+ (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift)) {
vdso_data->monotonic_time_snsec -=
- ((u64)NSEC_PER_SEC) << tk->tkr.shift;
+ ((u64)NSEC_PER_SEC) << tk->tkr_mono.shift;
vdso_data->monotonic_time_sec++;
}
vdso_data->wall_time_coarse_sec = tk->xtime_sec;
- vdso_data->wall_time_coarse_nsec = (long)(tk->tkr.xtime_nsec >>
- tk->tkr.shift);
+ vdso_data->wall_time_coarse_nsec = (long)(tk->tkr_mono.xtime_nsec >>
+ tk->tkr_mono.shift);
vdso_data->monotonic_time_coarse_sec =
vdso_data->wall_time_coarse_sec + tk->wall_to_monotonic.tv_sec;
config NO_DMA
def_bool y
+
+config PGTABLE_LEVELS
+ int
+ default 3 if 3_LEVEL_PGTABLES
+ default 2
pci_fixup_irqs(pci_common_swizzle, pci_puv3_map_irq);
if (!pci_has_flag(PCI_PROBE_ONLY)) {
- /*
- * Size the bridge windows.
- */
pci_bus_size_bridges(puv3_bus);
-
- /*
- * Assign resources.
- */
pci_bus_assign_resources(puv3_bus);
}
-
+ pci_bus_add_devices(puv3_bus);
return 0;
}
subsys_initcall(pci_common_init);
select HAVE_ARCH_KMEMCHECK
select HAVE_ARCH_KASAN if X86_64 && SPARSEMEM_VMEMMAP
select HAVE_USER_RETURN_NOTIFIER
- select ARCH_BINFMT_ELF_RANDOMIZE_PIE
+ select ARCH_HAS_ELF_RANDOMIZE
select HAVE_ARCH_JUMP_LABEL
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
select SPARSE_IRQ
select IRQ_FORCED_THREADING
select HAVE_BPF_JIT if X86_64
select HAVE_ARCH_TRANSPARENT_HUGEPAGE
+ select HAVE_ARCH_HUGE_VMAP if X86_64 || (X86_32 && X86_PAE)
select ARCH_HAS_SG_CHAIN
select CLKEVT_I8253
select ARCH_HAVE_NMI_SAFE_CMPXCHG
def_bool y
config ZONE_DMA32
- bool
- default X86_64
+ def_bool y if X86_64
config AUDIT_ARCH
- bool
- default X86_64
+ def_bool y if X86_64
config ARCH_SUPPORTS_OPTIMIZED_INLINING
def_bool y
config FIX_EARLYCON_MEM
def_bool y
+config PGTABLE_LEVELS
+ int
+ default 4 if X86_64
+ default 3 if X86_PAE
+ default 2
+
source "init/Kconfig"
source "kernel/Kconfig.freezer"
config NO_BOOTMEM
def_bool y
-config MEMTEST
- bool "Memtest"
- ---help---
- This option adds a kernel parameter 'memtest', which allows memtest
- to be set.
- memtest=0, mean disabled; -- default
- memtest=1, mean do 1 test pattern;
- ...
- memtest=4, mean do 4 test patterns.
- If you are unsure how to answer this question, answer N.
-
source "arch/x86/Kconfig.cpu"
config HPET_TIMER
depends on !SMP && X86_LOCAL_APIC
config X86_UP_APIC
- bool "Local APIC support on uniprocessors"
+ bool "Local APIC support on uniprocessors" if !PCI_MSI
+ default PCI_MSI
depends on X86_32 && !SMP && !X86_32_NON_STANDARD
---help---
A local APIC (Advanced Programmable Interrupt Controller) is an
performance counters), and the NMI watchdog which detects hard
lockups.
-config X86_UP_APIC_MSI
- def_bool y
- select X86_UP_APIC if X86_32 && !SMP && !X86_32_NON_STANDARD && PCI_MSI
-
config X86_UP_IOAPIC
bool "IO-APIC support on uniprocessors"
depends on X86_UP_APIC
select GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
config X86_IO_APIC
- def_bool X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_IOAPIC
- depends on X86_LOCAL_APIC
+ def_bool y
+ depends on X86_LOCAL_APIC || X86_UP_IOAPIC
select IRQ_DOMAIN
config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
depends on MICROCODE
config MICROCODE_INTEL_EARLY
- def_bool n
+ bool
config MICROCODE_AMD_EARLY
- def_bool n
+ bool
config MICROCODE_EARLY
bool "Early load microcode"
def_bool y
depends on X86_64 || HIGHMEM64G
-config DIRECT_GBPAGES
- bool "Enable 1GB pages for kernel pagetables" if EXPERT
- default y
- depends on X86_64
+config X86_DIRECT_GBPAGES
+ def_bool y
+ depends on X86_64 && !DEBUG_PAGEALLOC && !KMEMCHECK
---help---
- Allow the kernel linear mapping to use 1GB pages on CPUs that
- support it. This can improve the kernel's performance a tiny bit by
- reducing TLB pressure. If in doubt, say "Y".
+ Certain kernel features effectively disable kernel
+ linear 1 GB mappings (even if the CPU otherwise
+ supports them), so don't confuse the user by printing
+ that we have them enabled.
# Common NUMA Features
config NUMA
depends on KEXEC_FILE
---help---
This option makes kernel signature verification mandatory for
- kexec_file_load() syscall. If kernel is signature can not be
- verified, kexec_file_load() will fail.
-
- This option enforces signature verification at generic level.
- One needs to enable signature verification for type of kernel
- image being loaded to make sure it works. For example, enable
- bzImage signature verification option to be able to load and
- verify signatures of bzImage. Otherwise kernel loading will fail.
+ the kexec_file_load() syscall.
+
+ In addition to that option, you need to enable signature
+ verification for the corresponding kernel image type being
+ loaded in order for this to work.
config KEXEC_BZIMAGE_VERIFY_SIG
bool "Enable bzImage signature verification support"
return slots_fetch_random();
}
-unsigned char *choose_kernel_location(unsigned char *input,
+unsigned char *choose_kernel_location(struct boot_params *boot_params,
+ unsigned char *input,
unsigned long input_size,
unsigned char *output,
unsigned long output_size)
}
#endif
+ boot_params->hdr.loadflags |= KASLR_FLAG;
+
/* Record the various known unsafe memory ranges. */
mem_avoid_init((unsigned long)input, input_size,
(unsigned long)output, output_size);
#include <asm/page_types.h>
#include <asm/boot.h>
#include <asm/asm-offsets.h>
+#include <asm/bootparam.h>
__HEAD
ENTRY(startup_32)
* Test KEEP_SEGMENTS flag to see if the bootloader is asking
* us to not reload segments
*/
- testb $(1<<6), BP_loadflags(%esi)
+ testb $KEEP_SEGMENTS, BP_loadflags(%esi)
jnz 1f
cli
#include <asm/msr.h>
#include <asm/processor-flags.h>
#include <asm/asm-offsets.h>
+#include <asm/bootparam.h>
__HEAD
.code32
* Test KEEP_SEGMENTS flag to see if the bootloader is asking
* us to not reload segments
*/
- testb $(1<<6), BP_loadflags(%esi)
+ testb $KEEP_SEGMENTS, BP_loadflags(%esi)
jnz 1f
cli
/* After gdt is loaded */
xorl %eax, %eax
lldt %ax
- movl $0x20, %eax
+ movl $__BOOT_TSS, %eax
ltr %ax
/*
real_mode = rmode;
+ /* Clear it for solely in-kernel use */
+ real_mode->hdr.loadflags &= ~KASLR_FLAG;
+
sanitize_boot_params(real_mode);
if (real_mode->screen_info.orig_video_mode == 7) {
* the entire decompressed kernel plus relocation table, or the
* entire decompressed kernel plus .bss and .brk sections.
*/
- output = choose_kernel_location(input_data, input_len, output,
+ output = choose_kernel_location(real_mode, input_data, input_len, output,
output_len > run_size ? output_len
: run_size);
#if CONFIG_RANDOMIZE_BASE
/* aslr.c */
-unsigned char *choose_kernel_location(unsigned char *input,
+unsigned char *choose_kernel_location(struct boot_params *boot_params,
+ unsigned char *input,
unsigned long input_size,
unsigned char *output,
unsigned long output_size);
bool has_cpuflag(int flag);
#else
static inline
-unsigned char *choose_kernel_location(unsigned char *input,
+unsigned char *choose_kernel_location(struct boot_params *boot_params,
+ unsigned char *input,
unsigned long input_size,
unsigned char *output,
unsigned long output_size)
int delta = 0;
while (*s1 || *s2) {
- delta = *s2 - *s1;
+ delta = *s1 - *s2;
if (delta)
return delta;
s1++;
/*
* Common variables
*/
-int adapter; /* 0=CGA/MDA/HGC, 1=EGA, 2=VGA+ */
-u16 video_segment;
+int adapter; /* 0=CGA/MDA/HGC, 1=EGA, 2=VGA+ */
int force_x, force_y; /* Don't query the BIOS for cols/rows */
-
int do_restore; /* Screen contents changed during mode flip */
int graphic_mode; /* Graphic mode with linear frame buffer */
#include "video.h"
#include "vesa.h"
+static u16 video_segment;
+
static void store_cursor_position(void)
{
struct biosregs ireg, oreg;
#define ADAPTER_VGA 2
extern int adapter;
-extern u16 video_segment;
extern int force_x, force_y; /* Don't query the BIOS for cols/rows */
extern int do_restore; /* Restore screen contents */
extern int graphic_mode; /* Graphics mode with linear frame buffer */
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_MON=y
CONFIG_USB_EHCI_HCD=y
-# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+CONFIG_USB_EHCI_TT_NEWSCHED=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_UHCI_HCD=y
CONFIG_USB_PRINTER=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_MON=y
CONFIG_USB_EHCI_HCD=y
-# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+CONFIG_USB_EHCI_TT_NEWSCHED=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_UHCI_HCD=y
CONFIG_USB_PRINTER=y
## 2a) PROCESS FULL BLOCKS:
################################################################
full_block:
- movq $128,%rax
+ movl $128,%eax
lea 128*8*2(block_0), block_1
lea 128*8*3(block_0), block_2
add $128*8*1, block_0
movq R1, 8(%rsi)
popq R1
- movq $1,%rax
+ movl $1,%eax
ret
ENDPROC(twofish_enc_blk)
movq R1, 8(%rsi)
popq R1
- movq $1,%rax
+ movl $1,%eax
ret
ENDPROC(twofish_dec_blk)
#
obj-$(CONFIG_IA32_EMULATION) := ia32entry.o sys_ia32.o ia32_signal.o
-obj-$(CONFIG_IA32_EMULATION) += nosyscall.o syscall_ia32.o
obj-$(CONFIG_IA32_AOUT) += ia32_aout.o
}
static int ia32_restore_sigcontext(struct pt_regs *regs,
- struct sigcontext_ia32 __user *sc,
- unsigned int *pax)
+ struct sigcontext_ia32 __user *sc)
{
unsigned int tmpflags, err = 0;
void __user *buf;
RELOAD_SEG(es);
COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx);
- COPY(dx); COPY(cx); COPY(ip);
+ COPY(dx); COPY(cx); COPY(ip); COPY(ax);
/* Don't touch extended registers */
COPY_SEG_CPL3(cs);
get_user_ex(tmp, &sc->fpstate);
buf = compat_ptr(tmp);
-
- get_user_ex(*pax, &sc->ax);
} get_user_catch(err);
err |= restore_xstate_sig(buf, 1);
+ force_iret();
+
return err;
}
struct pt_regs *regs = current_pt_regs();
struct sigframe_ia32 __user *frame = (struct sigframe_ia32 __user *)(regs->sp-8);
sigset_t set;
- unsigned int ax;
if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
goto badframe;
set_current_blocked(&set);
- if (ia32_restore_sigcontext(regs, &frame->sc, &ax))
+ if (ia32_restore_sigcontext(regs, &frame->sc))
goto badframe;
- return ax;
+ return regs->ax;
badframe:
signal_fault(regs, frame, "32bit sigreturn");
struct pt_regs *regs = current_pt_regs();
struct rt_sigframe_ia32 __user *frame;
sigset_t set;
- unsigned int ax;
frame = (struct rt_sigframe_ia32 __user *)(regs->sp - 4);
set_current_blocked(&set);
- if (ia32_restore_sigcontext(regs, &frame->uc.uc_mcontext, &ax))
+ if (ia32_restore_sigcontext(regs, &frame->uc.uc_mcontext))
goto badframe;
if (compat_restore_altstack(&frame->uc.uc_stack))
goto badframe;
- return ax;
+ return regs->ax;
badframe:
signal_fault(regs, frame, "32bit rt sigreturn");
.section .entry.text, "ax"
- .macro IA32_ARG_FIXUP noebp=0
- movl %edi,%r8d
- .if \noebp
- .else
- movl %ebp,%r9d
- .endif
- xchg %ecx,%esi
- movl %ebx,%edi
- movl %edx,%edx /* zero extension */
- .endm
-
- /* clobbers %eax */
- .macro CLEAR_RREGS offset=0, _r9=rax
+ /* clobbers %rax */
+ .macro CLEAR_RREGS _r9=rax
xorl %eax,%eax
- movq %rax,\offset+R11(%rsp)
- movq %rax,\offset+R10(%rsp)
- movq %\_r9,\offset+R9(%rsp)
- movq %rax,\offset+R8(%rsp)
+ movq %rax,R11(%rsp)
+ movq %rax,R10(%rsp)
+ movq %\_r9,R9(%rsp)
+ movq %rax,R8(%rsp)
.endm
/*
* If it's -1 to make us punt the syscall, then (u32)-1 is still
* an appropriately invalid value.
*/
- .macro LOAD_ARGS32 offset, _r9=0
+ .macro LOAD_ARGS32 _r9=0
.if \_r9
- movl \offset+16(%rsp),%r9d
+ movl R9(%rsp),%r9d
.endif
- movl \offset+40(%rsp),%ecx
- movl \offset+48(%rsp),%edx
- movl \offset+56(%rsp),%esi
- movl \offset+64(%rsp),%edi
+ movl RCX(%rsp),%ecx
+ movl RDX(%rsp),%edx
+ movl RSI(%rsp),%esi
+ movl RDI(%rsp),%edi
movl %eax,%eax /* zero extension */
.endm
/*
* 32bit SYSENTER instruction entry.
*
+ * SYSENTER loads ss, rsp, cs, and rip from previously programmed MSRs.
+ * IF and VM in rflags are cleared (IOW: interrupts are off).
+ * SYSENTER does not save anything on the stack,
+ * and does not save old rip (!!!) and rflags.
+ *
* Arguments:
- * %eax System call number.
- * %ebx Arg1
- * %ecx Arg2
- * %edx Arg3
- * %esi Arg4
- * %edi Arg5
- * %ebp user stack
- * 0(%ebp) Arg6
- *
- * Interrupts off.
- *
+ * eax system call number
+ * ebx arg1
+ * ecx arg2
+ * edx arg3
+ * esi arg4
+ * edi arg5
+ * ebp user stack
+ * 0(%ebp) arg6
+ *
* This is purely a fast path. For anything complicated we use the int 0x80
- * path below. Set up a complete hardware stack frame to share code
+ * path below. We set up a complete hardware stack frame to share code
* with the int 0x80 path.
- */
+ */
ENTRY(ia32_sysenter_target)
CFI_STARTPROC32 simple
CFI_SIGNAL_FRAME
CFI_DEF_CFA rsp,0
CFI_REGISTER rsp,rbp
- SWAPGS_UNSAFE_STACK
- movq PER_CPU_VAR(kernel_stack), %rsp
- addq $(KERNEL_STACK_OFFSET),%rsp
+
/*
- * No need to follow this irqs on/off section: the syscall
- * disabled irqs, here we enable it straight after entry:
+ * Interrupts are off on entry.
+ * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
+ * it is too small to ever cause noticeable irq latency.
*/
+ SWAPGS_UNSAFE_STACK
+ movq PER_CPU_VAR(cpu_tss + TSS_sp0), %rsp
ENABLE_INTERRUPTS(CLBR_NONE)
- movl %ebp,%ebp /* zero extension */
- pushq_cfi $__USER32_DS
- /*CFI_REL_OFFSET ss,0*/
- pushq_cfi %rbp
- CFI_REL_OFFSET rsp,0
- pushfq_cfi
- /*CFI_REL_OFFSET rflags,0*/
- movl TI_sysenter_return+THREAD_INFO(%rsp,3*8-KERNEL_STACK_OFFSET),%r10d
- CFI_REGISTER rip,r10
- pushq_cfi $__USER32_CS
- /*CFI_REL_OFFSET cs,0*/
+
+ /* Zero-extending 32-bit regs, do not remove */
+ movl %ebp, %ebp
movl %eax, %eax
- pushq_cfi %r10
- CFI_REL_OFFSET rip,0
- pushq_cfi %rax
+
+ movl ASM_THREAD_INFO(TI_sysenter_return, %rsp, 0), %r10d
+ CFI_REGISTER rip,r10
+
+ /* Construct struct pt_regs on stack */
+ pushq_cfi $__USER32_DS /* pt_regs->ss */
+ pushq_cfi %rbp /* pt_regs->sp */
+ CFI_REL_OFFSET rsp,0
+ pushfq_cfi /* pt_regs->flags */
+ pushq_cfi $__USER32_CS /* pt_regs->cs */
+ pushq_cfi %r10 /* pt_regs->ip = thread_info->sysenter_return */
+ CFI_REL_OFFSET rip,0
+ pushq_cfi_reg rax /* pt_regs->orig_ax */
+ pushq_cfi_reg rdi /* pt_regs->di */
+ pushq_cfi_reg rsi /* pt_regs->si */
+ pushq_cfi_reg rdx /* pt_regs->dx */
+ pushq_cfi_reg rcx /* pt_regs->cx */
+ pushq_cfi_reg rax /* pt_regs->ax */
cld
- SAVE_ARGS 0,1,0
- /* no need to do an access_ok check here because rbp has been
- 32bit zero extended */
+ sub $(10*8),%rsp /* pt_regs->r8-11,bp,bx,r12-15 not saved */
+ CFI_ADJUST_CFA_OFFSET 10*8
+
+ /*
+ * no need to do an access_ok check here because rbp has been
+ * 32bit zero extended
+ */
ASM_STAC
1: movl (%rbp),%ebp
_ASM_EXTABLE(1b,ia32_badarg)
* ourselves. To save a few cycles, we can check whether
* NT was set instead of doing an unconditional popfq.
*/
- testl $X86_EFLAGS_NT,EFLAGS-ARGOFFSET(%rsp)
+ testl $X86_EFLAGS_NT,EFLAGS(%rsp)
jnz sysenter_fix_flags
sysenter_flags_fixed:
- orl $TS_COMPAT,TI_status+THREAD_INFO(%rsp,RIP-ARGOFFSET)
- testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
+ orl $TS_COMPAT, ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS)
+ testl $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
CFI_REMEMBER_STATE
jnz sysenter_tracesys
cmpq $(IA32_NR_syscalls-1),%rax
ja ia32_badsys
sysenter_do_call:
- IA32_ARG_FIXUP
+ /* 32bit syscall -> 64bit C ABI argument conversion */
+ movl %edi,%r8d /* arg5 */
+ movl %ebp,%r9d /* arg6 */
+ xchg %ecx,%esi /* rsi:arg2, rcx:arg4 */
+ movl %ebx,%edi /* arg1 */
+ movl %edx,%edx /* arg3 (zero extension) */
sysenter_dispatch:
call *ia32_sys_call_table(,%rax,8)
- movq %rax,RAX-ARGOFFSET(%rsp)
+ movq %rax,RAX(%rsp)
DISABLE_INTERRUPTS(CLBR_NONE)
TRACE_IRQS_OFF
- testl $_TIF_ALLWORK_MASK,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
+ testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
jnz sysexit_audit
sysexit_from_sys_call:
- andl $~TS_COMPAT,TI_status+THREAD_INFO(%rsp,RIP-ARGOFFSET)
- /* clear IF, that popfq doesn't enable interrupts early */
- andl $~0x200,EFLAGS-ARGOFFSET(%rsp)
- movl RIP-ARGOFFSET(%rsp),%edx /* User %eip */
- CFI_REGISTER rip,rdx
- RESTORE_ARGS 0,24,0,0,0,0
+ /*
+ * NB: SYSEXIT is not obviously safe for 64-bit kernels -- an
+ * NMI between STI and SYSEXIT has poorly specified behavior,
+ * and and NMI followed by an IRQ with usergs is fatal. So
+ * we just pretend we're using SYSEXIT but we really use
+ * SYSRETL instead.
+ *
+ * This code path is still called 'sysexit' because it pairs
+ * with 'sysenter' and it uses the SYSENTER calling convention.
+ */
+ andl $~TS_COMPAT,ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS)
+ movl RIP(%rsp),%ecx /* User %eip */
+ CFI_REGISTER rip,rcx
+ RESTORE_RSI_RDI
+ xorl %edx,%edx /* avoid info leaks */
xorq %r8,%r8
xorq %r9,%r9
xorq %r10,%r10
- xorq %r11,%r11
- popfq_cfi
+ movl EFLAGS(%rsp),%r11d /* User eflags */
/*CFI_RESTORE rflags*/
- popq_cfi %rcx /* User %esp */
- CFI_REGISTER rsp,rcx
TRACE_IRQS_ON
- ENABLE_INTERRUPTS_SYSEXIT32
+
+ /*
+ * SYSRETL works even on Intel CPUs. Use it in preference to SYSEXIT,
+ * since it avoids a dicey window with interrupts enabled.
+ */
+ movl RSP(%rsp),%esp
+
+ /*
+ * USERGS_SYSRET32 does:
+ * gsbase = user's gs base
+ * eip = ecx
+ * rflags = r11
+ * cs = __USER32_CS
+ * ss = __USER_DS
+ *
+ * The prologue set RIP(%rsp) to VDSO32_SYSENTER_RETURN, which does:
+ *
+ * pop %ebp
+ * pop %edx
+ * pop %ecx
+ *
+ * Therefore, we invoke SYSRETL with EDX and R8-R10 zeroed to
+ * avoid info leaks. R11 ends up with VDSO32_SYSENTER_RETURN's
+ * address (already known to user code), and R12-R15 are
+ * callee-saved and therefore don't contain any interesting
+ * kernel data.
+ */
+ USERGS_SYSRET32
CFI_RESTORE_STATE
movl %ebx,%esi /* 2nd arg: 1st syscall arg */
movl %eax,%edi /* 1st arg: syscall number */
call __audit_syscall_entry
- movl RAX-ARGOFFSET(%rsp),%eax /* reload syscall number */
+ movl RAX(%rsp),%eax /* reload syscall number */
cmpq $(IA32_NR_syscalls-1),%rax
ja ia32_badsys
movl %ebx,%edi /* reload 1st syscall arg */
- movl RCX-ARGOFFSET(%rsp),%esi /* reload 2nd syscall arg */
- movl RDX-ARGOFFSET(%rsp),%edx /* reload 3rd syscall arg */
- movl RSI-ARGOFFSET(%rsp),%ecx /* reload 4th syscall arg */
- movl RDI-ARGOFFSET(%rsp),%r8d /* reload 5th syscall arg */
+ movl RCX(%rsp),%esi /* reload 2nd syscall arg */
+ movl RDX(%rsp),%edx /* reload 3rd syscall arg */
+ movl RSI(%rsp),%ecx /* reload 4th syscall arg */
+ movl RDI(%rsp),%r8d /* reload 5th syscall arg */
.endm
.macro auditsys_exit exit
- testl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
+ testl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT), ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
jnz ia32_ret_from_sys_call
TRACE_IRQS_ON
ENABLE_INTERRUPTS(CLBR_NONE)
1: setbe %al /* 1 if error, 0 if not */
movzbl %al,%edi /* zero-extend that into %edi */
call __audit_syscall_exit
- movq RAX-ARGOFFSET(%rsp),%rax /* reload syscall return value */
+ movq RAX(%rsp),%rax /* reload syscall return value */
movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi
DISABLE_INTERRUPTS(CLBR_NONE)
TRACE_IRQS_OFF
- testl %edi,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
+ testl %edi, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
jz \exit
- CLEAR_RREGS -ARGOFFSET
+ CLEAR_RREGS
jmp int_with_check
.endm
sysenter_tracesys:
#ifdef CONFIG_AUDITSYSCALL
- testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
+ testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT), ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
jz sysenter_auditsys
#endif
- SAVE_REST
+ SAVE_EXTRA_REGS
CLEAR_RREGS
movq $-ENOSYS,RAX(%rsp)/* ptrace can change this for a bad syscall */
movq %rsp,%rdi /* &pt_regs -> arg1 */
call syscall_trace_enter
- LOAD_ARGS32 ARGOFFSET /* reload args from stack in case ptrace changed it */
- RESTORE_REST
+ LOAD_ARGS32 /* reload args from stack in case ptrace changed it */
+ RESTORE_EXTRA_REGS
cmpq $(IA32_NR_syscalls-1),%rax
ja int_ret_from_sys_call /* sysenter_tracesys has set RAX(%rsp) */
jmp sysenter_do_call
/*
* 32bit SYSCALL instruction entry.
*
+ * 32bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
+ * then loads new ss, cs, and rip from previously programmed MSRs.
+ * rflags gets masked by a value from another MSR (so CLD and CLAC
+ * are not needed). SYSCALL does not save anything on the stack
+ * and does not change rsp.
+ *
+ * Note: rflags saving+masking-with-MSR happens only in Long mode
+ * (in legacy 32bit mode, IF, RF and VM bits are cleared and that's it).
+ * Don't get confused: rflags saving+masking depends on Long Mode Active bit
+ * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes
+ * or target CS descriptor's L bit (SYSCALL does not read segment descriptors).
+ *
* Arguments:
- * %eax System call number.
- * %ebx Arg1
- * %ecx return EIP
- * %edx Arg3
- * %esi Arg4
- * %edi Arg5
- * %ebp Arg2 [note: not saved in the stack frame, should not be touched]
- * %esp user stack
- * 0(%esp) Arg6
- *
- * Interrupts off.
- *
+ * eax system call number
+ * ecx return address
+ * ebx arg1
+ * ebp arg2 (note: not saved in the stack frame, should not be touched)
+ * edx arg3
+ * esi arg4
+ * edi arg5
+ * esp user stack
+ * 0(%esp) arg6
+ *
* This is purely a fast path. For anything complicated we use the int 0x80
- * path below. Set up a complete hardware stack frame to share code
- * with the int 0x80 path.
- */
+ * path below. We set up a complete hardware stack frame to share code
+ * with the int 0x80 path.
+ */
ENTRY(ia32_cstar_target)
CFI_STARTPROC32 simple
CFI_SIGNAL_FRAME
- CFI_DEF_CFA rsp,KERNEL_STACK_OFFSET
+ CFI_DEF_CFA rsp,0
CFI_REGISTER rip,rcx
/*CFI_REGISTER rflags,r11*/
+
+ /*
+ * Interrupts are off on entry.
+ * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
+ * it is too small to ever cause noticeable irq latency.
+ */
SWAPGS_UNSAFE_STACK
movl %esp,%r8d
CFI_REGISTER rsp,r8
movq PER_CPU_VAR(kernel_stack),%rsp
- /*
- * No need to follow this irqs on/off section: the syscall
- * disabled irqs and here we enable it straight after entry:
- */
ENABLE_INTERRUPTS(CLBR_NONE)
- SAVE_ARGS 8,0,0
- movl %eax,%eax /* zero extension */
- movq %rax,ORIG_RAX-ARGOFFSET(%rsp)
- movq %rcx,RIP-ARGOFFSET(%rsp)
- CFI_REL_OFFSET rip,RIP-ARGOFFSET
- movq %rbp,RCX-ARGOFFSET(%rsp) /* this lies slightly to ptrace */
+
+ /* Zero-extending 32-bit regs, do not remove */
+ movl %eax,%eax
+
+ /* Construct struct pt_regs on stack */
+ pushq_cfi $__USER32_DS /* pt_regs->ss */
+ pushq_cfi %r8 /* pt_regs->sp */
+ CFI_REL_OFFSET rsp,0
+ pushq_cfi %r11 /* pt_regs->flags */
+ pushq_cfi $__USER32_CS /* pt_regs->cs */
+ pushq_cfi %rcx /* pt_regs->ip */
+ CFI_REL_OFFSET rip,0
+ pushq_cfi_reg rax /* pt_regs->orig_ax */
+ pushq_cfi_reg rdi /* pt_regs->di */
+ pushq_cfi_reg rsi /* pt_regs->si */
+ pushq_cfi_reg rdx /* pt_regs->dx */
+ pushq_cfi_reg rbp /* pt_regs->cx */
movl %ebp,%ecx
- movq $__USER32_CS,CS-ARGOFFSET(%rsp)
- movq $__USER32_DS,SS-ARGOFFSET(%rsp)
- movq %r11,EFLAGS-ARGOFFSET(%rsp)
- /*CFI_REL_OFFSET rflags,EFLAGS-ARGOFFSET*/
- movq %r8,RSP-ARGOFFSET(%rsp)
- CFI_REL_OFFSET rsp,RSP-ARGOFFSET
- /* no need to do an access_ok check here because r8 has been
- 32bit zero extended */
- /* hardware stack frame is complete now */
+ pushq_cfi_reg rax /* pt_regs->ax */
+ sub $(10*8),%rsp /* pt_regs->r8-11,bp,bx,r12-15 not saved */
+ CFI_ADJUST_CFA_OFFSET 10*8
+
+ /*
+ * no need to do an access_ok check here because r8 has been
+ * 32bit zero extended
+ */
ASM_STAC
1: movl (%r8),%r9d
_ASM_EXTABLE(1b,ia32_badarg)
ASM_CLAC
- orl $TS_COMPAT,TI_status+THREAD_INFO(%rsp,RIP-ARGOFFSET)
- testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
+ orl $TS_COMPAT, ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS)
+ testl $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
CFI_REMEMBER_STATE
jnz cstar_tracesys
cmpq $IA32_NR_syscalls-1,%rax
ja ia32_badsys
cstar_do_call:
- IA32_ARG_FIXUP 1
+ /* 32bit syscall -> 64bit C ABI argument conversion */
+ movl %edi,%r8d /* arg5 */
+ /* r9 already loaded */ /* arg6 */
+ xchg %ecx,%esi /* rsi:arg2, rcx:arg4 */
+ movl %ebx,%edi /* arg1 */
+ movl %edx,%edx /* arg3 (zero extension) */
cstar_dispatch:
call *ia32_sys_call_table(,%rax,8)
- movq %rax,RAX-ARGOFFSET(%rsp)
+ movq %rax,RAX(%rsp)
DISABLE_INTERRUPTS(CLBR_NONE)
TRACE_IRQS_OFF
- testl $_TIF_ALLWORK_MASK,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
+ testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
jnz sysretl_audit
sysretl_from_sys_call:
- andl $~TS_COMPAT,TI_status+THREAD_INFO(%rsp,RIP-ARGOFFSET)
- RESTORE_ARGS 0,-ARG_SKIP,0,0,0
- movl RIP-ARGOFFSET(%rsp),%ecx
+ andl $~TS_COMPAT, ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS)
+ RESTORE_RSI_RDI_RDX
+ movl RIP(%rsp),%ecx
CFI_REGISTER rip,rcx
- movl EFLAGS-ARGOFFSET(%rsp),%r11d
+ movl EFLAGS(%rsp),%r11d
/*CFI_REGISTER rflags,r11*/
xorq %r10,%r10
xorq %r9,%r9
xorq %r8,%r8
TRACE_IRQS_ON
- movl RSP-ARGOFFSET(%rsp),%esp
+ movl RSP(%rsp),%esp
CFI_RESTORE rsp
+ /*
+ * 64bit->32bit SYSRET restores eip from ecx,
+ * eflags from r11 (but RF and VM bits are forced to 0),
+ * cs and ss are loaded from MSRs.
+ * (Note: 32bit->32bit SYSRET is different: since r11
+ * does not exist, it merely sets eflags.IF=1).
+ */
USERGS_SYSRET32
-
+
#ifdef CONFIG_AUDITSYSCALL
cstar_auditsys:
CFI_RESTORE_STATE
- movl %r9d,R9-ARGOFFSET(%rsp) /* register to be clobbered by call */
+ movl %r9d,R9(%rsp) /* register to be clobbered by call */
auditsys_entry_common
- movl R9-ARGOFFSET(%rsp),%r9d /* reload 6th syscall arg */
+ movl R9(%rsp),%r9d /* reload 6th syscall arg */
jmp cstar_dispatch
sysretl_audit:
cstar_tracesys:
#ifdef CONFIG_AUDITSYSCALL
- testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
+ testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT), ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
jz cstar_auditsys
#endif
xchgl %r9d,%ebp
- SAVE_REST
- CLEAR_RREGS 0, r9
+ SAVE_EXTRA_REGS
+ CLEAR_RREGS r9
movq $-ENOSYS,RAX(%rsp) /* ptrace can change this for a bad syscall */
movq %rsp,%rdi /* &pt_regs -> arg1 */
call syscall_trace_enter
- LOAD_ARGS32 ARGOFFSET, 1 /* reload args from stack in case ptrace changed it */
- RESTORE_REST
+ LOAD_ARGS32 1 /* reload args from stack in case ptrace changed it */
+ RESTORE_EXTRA_REGS
xchgl %ebp,%r9d
cmpq $(IA32_NR_syscalls-1),%rax
ja int_ret_from_sys_call /* cstar_tracesys has set RAX(%rsp) */
jmp ia32_sysret
CFI_ENDPROC
-/*
- * Emulated IA32 system calls via int 0x80.
+/*
+ * Emulated IA32 system calls via int 0x80.
*
- * Arguments:
- * %eax System call number.
- * %ebx Arg1
- * %ecx Arg2
- * %edx Arg3
- * %esi Arg4
- * %edi Arg5
- * %ebp Arg6 [note: not saved in the stack frame, should not be touched]
+ * Arguments:
+ * eax system call number
+ * ebx arg1
+ * ecx arg2
+ * edx arg3
+ * esi arg4
+ * edi arg5
+ * ebp arg6 (note: not saved in the stack frame, should not be touched)
*
* Notes:
- * Uses the same stack frame as the x86-64 version.
- * All registers except %eax must be saved (but ptrace may violate that)
+ * Uses the same stack frame as the x86-64 version.
+ * All registers except eax must be saved (but ptrace may violate that).
* Arguments are zero extended. For system calls that want sign extension and
* take long arguments a wrapper is needed. Most calls can just be called
* directly.
- * Assumes it is only called from user space and entered with interrupts off.
- */
+ * Assumes it is only called from user space and entered with interrupts off.
+ */
ENTRY(ia32_syscall)
CFI_STARTPROC32 simple
CFI_SIGNAL_FRAME
- CFI_DEF_CFA rsp,SS+8-RIP
- /*CFI_REL_OFFSET ss,SS-RIP*/
- CFI_REL_OFFSET rsp,RSP-RIP
- /*CFI_REL_OFFSET rflags,EFLAGS-RIP*/
- /*CFI_REL_OFFSET cs,CS-RIP*/
- CFI_REL_OFFSET rip,RIP-RIP
- PARAVIRT_ADJUST_EXCEPTION_FRAME
- SWAPGS
+ CFI_DEF_CFA rsp,5*8
+ /*CFI_REL_OFFSET ss,4*8 */
+ CFI_REL_OFFSET rsp,3*8
+ /*CFI_REL_OFFSET rflags,2*8 */
+ /*CFI_REL_OFFSET cs,1*8 */
+ CFI_REL_OFFSET rip,0*8
+
/*
- * No need to follow this irqs on/off section: the syscall
- * disabled irqs and here we enable it straight after entry:
+ * Interrupts are off on entry.
+ * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
+ * it is too small to ever cause noticeable irq latency.
*/
+ PARAVIRT_ADJUST_EXCEPTION_FRAME
+ SWAPGS
ENABLE_INTERRUPTS(CLBR_NONE)
- movl %eax,%eax
- pushq_cfi %rax
+
+ /* Zero-extending 32-bit regs, do not remove */
+ movl %eax,%eax
+
+ /* Construct struct pt_regs on stack (iret frame is already on stack) */
+ pushq_cfi_reg rax /* pt_regs->orig_ax */
+ pushq_cfi_reg rdi /* pt_regs->di */
+ pushq_cfi_reg rsi /* pt_regs->si */
+ pushq_cfi_reg rdx /* pt_regs->dx */
+ pushq_cfi_reg rcx /* pt_regs->cx */
+ pushq_cfi_reg rax /* pt_regs->ax */
cld
- /* note the registers are not zero extended to the sf.
- this could be a problem. */
- SAVE_ARGS 0,1,0
- orl $TS_COMPAT,TI_status+THREAD_INFO(%rsp,RIP-ARGOFFSET)
- testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
+ sub $(10*8),%rsp /* pt_regs->r8-11,bp,bx,r12-15 not saved */
+ CFI_ADJUST_CFA_OFFSET 10*8
+
+ orl $TS_COMPAT, ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS)
+ testl $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
jnz ia32_tracesys
cmpq $(IA32_NR_syscalls-1),%rax
ja ia32_badsys
ia32_do_call:
- IA32_ARG_FIXUP
+ /* 32bit syscall -> 64bit C ABI argument conversion */
+ movl %edi,%r8d /* arg5 */
+ movl %ebp,%r9d /* arg6 */
+ xchg %ecx,%esi /* rsi:arg2, rcx:arg4 */
+ movl %ebx,%edi /* arg1 */
+ movl %edx,%edx /* arg3 (zero extension) */
call *ia32_sys_call_table(,%rax,8) # xxx: rip relative
ia32_sysret:
- movq %rax,RAX-ARGOFFSET(%rsp)
+ movq %rax,RAX(%rsp)
ia32_ret_from_sys_call:
- CLEAR_RREGS -ARGOFFSET
- jmp int_ret_from_sys_call
+ CLEAR_RREGS
+ jmp int_ret_from_sys_call
-ia32_tracesys:
- SAVE_REST
+ia32_tracesys:
+ SAVE_EXTRA_REGS
CLEAR_RREGS
movq $-ENOSYS,RAX(%rsp) /* ptrace can change this for a bad syscall */
movq %rsp,%rdi /* &pt_regs -> arg1 */
call syscall_trace_enter
- LOAD_ARGS32 ARGOFFSET /* reload args from stack in case ptrace changed it */
- RESTORE_REST
+ LOAD_ARGS32 /* reload args from stack in case ptrace changed it */
+ RESTORE_EXTRA_REGS
cmpq $(IA32_NR_syscalls-1),%rax
ja int_ret_from_sys_call /* ia32_tracesys has set RAX(%rsp) */
jmp ia32_do_call
END(ia32_syscall)
ia32_badsys:
- movq $0,ORIG_RAX-ARGOFFSET(%rsp)
+ movq $0,ORIG_RAX(%rsp)
movq $-ENOSYS,%rax
jmp ia32_sysret
PTREGSCALL stub32_rt_sigreturn, sys32_rt_sigreturn
PTREGSCALL stub32_sigreturn, sys32_sigreturn
- PTREGSCALL stub32_execve, compat_sys_execve
- PTREGSCALL stub32_execveat, compat_sys_execveat
PTREGSCALL stub32_fork, sys_fork
PTREGSCALL stub32_vfork, sys_vfork
ALIGN
ia32_ptregs_common:
- popq %r11
CFI_ENDPROC
CFI_STARTPROC32 simple
CFI_SIGNAL_FRAME
- CFI_DEF_CFA rsp,SS+8-ARGOFFSET
- CFI_REL_OFFSET rax,RAX-ARGOFFSET
- CFI_REL_OFFSET rcx,RCX-ARGOFFSET
- CFI_REL_OFFSET rdx,RDX-ARGOFFSET
- CFI_REL_OFFSET rsi,RSI-ARGOFFSET
- CFI_REL_OFFSET rdi,RDI-ARGOFFSET
- CFI_REL_OFFSET rip,RIP-ARGOFFSET
-/* CFI_REL_OFFSET cs,CS-ARGOFFSET*/
-/* CFI_REL_OFFSET rflags,EFLAGS-ARGOFFSET*/
- CFI_REL_OFFSET rsp,RSP-ARGOFFSET
-/* CFI_REL_OFFSET ss,SS-ARGOFFSET*/
- SAVE_REST
+ CFI_DEF_CFA rsp,SIZEOF_PTREGS
+ CFI_REL_OFFSET rax,RAX
+ CFI_REL_OFFSET rcx,RCX
+ CFI_REL_OFFSET rdx,RDX
+ CFI_REL_OFFSET rsi,RSI
+ CFI_REL_OFFSET rdi,RDI
+ CFI_REL_OFFSET rip,RIP
+/* CFI_REL_OFFSET cs,CS*/
+/* CFI_REL_OFFSET rflags,EFLAGS*/
+ CFI_REL_OFFSET rsp,RSP
+/* CFI_REL_OFFSET ss,SS*/
+ SAVE_EXTRA_REGS 8
call *%rax
- RESTORE_REST
- jmp ia32_sysret /* misbalances the return cache */
+ RESTORE_EXTRA_REGS 8
+ ret
CFI_ENDPROC
END(ia32_ptregs_common)
+++ /dev/null
-#include <linux/kernel.h>
-#include <linux/errno.h>
-
-long compat_ni_syscall(void)
-{
- return -ENOSYS;
-}
advice);
}
-long sys32_vm86_warning(void)
-{
- struct task_struct *me = current;
- static char lastcomm[sizeof(me->comm)];
-
- if (strncmp(lastcomm, me->comm, sizeof(lastcomm))) {
- compat_printk(KERN_INFO
- "%s: vm86 mode not supported on 64 bit kernel\n",
- me->comm);
- strncpy(lastcomm, me->comm, sizeof(lastcomm));
- }
- return -ENOSYS;
-}
-
asmlinkage ssize_t sys32_readahead(int fd, unsigned off_lo, unsigned off_hi,
size_t count)
{
+++ /dev/null
-/* System call table for ia32 emulation. */
-
-#include <linux/linkage.h>
-#include <linux/sys.h>
-#include <linux/cache.h>
-#include <asm/asm-offsets.h>
-
-#define __SYSCALL_I386(nr, sym, compat) extern asmlinkage void compat(void) ;
-#include <asm/syscalls_32.h>
-#undef __SYSCALL_I386
-
-#define __SYSCALL_I386(nr, sym, compat) [nr] = compat,
-
-typedef void (*sys_call_ptr_t)(void);
-
-extern void compat_ni_syscall(void);
-
-const sys_call_ptr_t ia32_sys_call_table[__NR_ia32_syscall_max+1] = {
- /*
- * Smells like a compiler bug -- it doesn't work
- * when the & below is removed.
- */
- [0 ... __NR_ia32_syscall_max] = &compat_ni_syscall,
-#include <asm/syscalls_32.h>
-};
.endm
#endif
-.macro altinstruction_entry orig alt feature orig_len alt_len
+.macro altinstruction_entry orig alt feature orig_len alt_len pad_len
.long \orig - .
.long \alt - .
.word \feature
.byte \orig_len
.byte \alt_len
+ .byte \pad_len
+.endm
+
+.macro ALTERNATIVE oldinstr, newinstr, feature
+140:
+ \oldinstr
+141:
+ .skip -(((144f-143f)-(141b-140b)) > 0) * ((144f-143f)-(141b-140b)),0x90
+142:
+
+ .pushsection .altinstructions,"a"
+ altinstruction_entry 140b,143f,\feature,142b-140b,144f-143f,142b-141b
+ .popsection
+
+ .pushsection .altinstr_replacement,"ax"
+143:
+ \newinstr
+144:
+ .popsection
+.endm
+
+#define old_len 141b-140b
+#define new_len1 144f-143f
+#define new_len2 145f-144f
+
+/*
+ * max without conditionals. Idea adapted from:
+ * http://graphics.stanford.edu/~seander/bithacks.html#IntegerMinOrMax
+ */
+#define alt_max_short(a, b) ((a) ^ (((a) ^ (b)) & -(-((a) < (b)))))
+
+.macro ALTERNATIVE_2 oldinstr, newinstr1, feature1, newinstr2, feature2
+140:
+ \oldinstr
+141:
+ .skip -((alt_max_short(new_len1, new_len2) - (old_len)) > 0) * \
+ (alt_max_short(new_len1, new_len2) - (old_len)),0x90
+142:
+
+ .pushsection .altinstructions,"a"
+ altinstruction_entry 140b,143f,\feature1,142b-140b,144f-143f,142b-141b
+ altinstruction_entry 140b,144f,\feature2,142b-140b,145f-144f,142b-141b
+ .popsection
+
+ .pushsection .altinstr_replacement,"ax"
+143:
+ \newinstr1
+144:
+ \newinstr2
+145:
+ .popsection
.endm
#endif /* __ASSEMBLY__ */
s32 repl_offset; /* offset to replacement instruction */
u16 cpuid; /* cpuid bit set for replacement */
u8 instrlen; /* length of original instruction */
- u8 replacementlen; /* length of new instruction, <= instrlen */
-};
+ u8 replacementlen; /* length of new instruction */
+ u8 padlen; /* length of build-time padding */
+} __packed;
extern void alternative_instructions(void);
extern void apply_alternatives(struct alt_instr *start, struct alt_instr *end);
}
#endif /* CONFIG_SMP */
-#define OLDINSTR(oldinstr) "661:\n\t" oldinstr "\n662:\n"
+#define b_replacement(num) "664"#num
+#define e_replacement(num) "665"#num
-#define b_replacement(number) "663"#number
-#define e_replacement(number) "664"#number
+#define alt_end_marker "663"
+#define alt_slen "662b-661b"
+#define alt_pad_len alt_end_marker"b-662b"
+#define alt_total_slen alt_end_marker"b-661b"
+#define alt_rlen(num) e_replacement(num)"f-"b_replacement(num)"f"
-#define alt_slen "662b-661b"
-#define alt_rlen(number) e_replacement(number)"f-"b_replacement(number)"f"
+#define __OLDINSTR(oldinstr, num) \
+ "661:\n\t" oldinstr "\n662:\n" \
+ ".skip -(((" alt_rlen(num) ")-(" alt_slen ")) > 0) * " \
+ "((" alt_rlen(num) ")-(" alt_slen ")),0x90\n"
-#define ALTINSTR_ENTRY(feature, number) \
+#define OLDINSTR(oldinstr, num) \
+ __OLDINSTR(oldinstr, num) \
+ alt_end_marker ":\n"
+
+/*
+ * max without conditionals. Idea adapted from:
+ * http://graphics.stanford.edu/~seander/bithacks.html#IntegerMinOrMax
+ *
+ * The additional "-" is needed because gas works with s32s.
+ */
+#define alt_max_short(a, b) "((" a ") ^ (((" a ") ^ (" b ")) & -(-((" a ") - (" b ")))))"
+
+/*
+ * Pad the second replacement alternative with additional NOPs if it is
+ * additionally longer than the first replacement alternative.
+ */
+#define OLDINSTR_2(oldinstr, num1, num2) \
+ "661:\n\t" oldinstr "\n662:\n" \
+ ".skip -((" alt_max_short(alt_rlen(num1), alt_rlen(num2)) " - (" alt_slen ")) > 0) * " \
+ "(" alt_max_short(alt_rlen(num1), alt_rlen(num2)) " - (" alt_slen ")), 0x90\n" \
+ alt_end_marker ":\n"
+
+#define ALTINSTR_ENTRY(feature, num) \
" .long 661b - .\n" /* label */ \
- " .long " b_replacement(number)"f - .\n" /* new instruction */ \
+ " .long " b_replacement(num)"f - .\n" /* new instruction */ \
" .word " __stringify(feature) "\n" /* feature bit */ \
- " .byte " alt_slen "\n" /* source len */ \
- " .byte " alt_rlen(number) "\n" /* replacement len */
-
-#define DISCARD_ENTRY(number) /* rlen <= slen */ \
- " .byte 0xff + (" alt_rlen(number) ") - (" alt_slen ")\n"
+ " .byte " alt_total_slen "\n" /* source len */ \
+ " .byte " alt_rlen(num) "\n" /* replacement len */ \
+ " .byte " alt_pad_len "\n" /* pad len */
-#define ALTINSTR_REPLACEMENT(newinstr, feature, number) /* replacement */ \
- b_replacement(number)":\n\t" newinstr "\n" e_replacement(number) ":\n\t"
+#define ALTINSTR_REPLACEMENT(newinstr, feature, num) /* replacement */ \
+ b_replacement(num)":\n\t" newinstr "\n" e_replacement(num) ":\n\t"
/* alternative assembly primitive: */
#define ALTERNATIVE(oldinstr, newinstr, feature) \
- OLDINSTR(oldinstr) \
+ OLDINSTR(oldinstr, 1) \
".pushsection .altinstructions,\"a\"\n" \
ALTINSTR_ENTRY(feature, 1) \
".popsection\n" \
- ".pushsection .discard,\"aw\",@progbits\n" \
- DISCARD_ENTRY(1) \
- ".popsection\n" \
".pushsection .altinstr_replacement, \"ax\"\n" \
ALTINSTR_REPLACEMENT(newinstr, feature, 1) \
".popsection"
#define ALTERNATIVE_2(oldinstr, newinstr1, feature1, newinstr2, feature2)\
- OLDINSTR(oldinstr) \
+ OLDINSTR_2(oldinstr, 1, 2) \
".pushsection .altinstructions,\"a\"\n" \
ALTINSTR_ENTRY(feature1, 1) \
ALTINSTR_ENTRY(feature2, 2) \
".popsection\n" \
- ".pushsection .discard,\"aw\",@progbits\n" \
- DISCARD_ENTRY(1) \
- DISCARD_ENTRY(2) \
- ".popsection\n" \
".pushsection .altinstr_replacement, \"ax\"\n" \
ALTINSTR_REPLACEMENT(newinstr1, feature1, 1) \
ALTINSTR_REPLACEMENT(newinstr2, feature2, 2) \
#define alternative(oldinstr, newinstr, feature) \
asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory")
+#define alternative_2(oldinstr, newinstr1, feature1, newinstr2, feature2) \
+ asm volatile(ALTERNATIVE_2(oldinstr, newinstr1, feature1, newinstr2, feature2) ::: "memory")
+
/*
* Alternative inline assembly with input.
*
{
volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg);
- alternative_io("movl %0, %1", "xchgl %0, %1", X86_BUG_11AP,
+ alternative_io("movl %0, %P1", "xchgl %0, %P1", X86_BUG_11AP,
ASM_OUTPUT2("=r" (v), "=m" (*addr)),
ASM_OUTPUT2("0" (v), "m" (*addr)));
}
extern void disconnect_bsp_APIC(int virt_wire_setup);
extern void disable_local_APIC(void);
extern void lapic_shutdown(void);
-extern int verify_local_APIC(void);
extern void sync_Arb_IDs(void);
extern void init_bsp_APIC(void);
extern void setup_local_APIC(void);
* Stop RDTSC speculation. This is needed when you need to use RDTSC
* (or get_cycles or vread that possibly accesses the TSC) in a defined
* code region.
- *
- * (Could use an alternative three way for this if there was one.)
*/
static __always_inline void rdtsc_barrier(void)
{
- alternative(ASM_NOP3, "mfence", X86_FEATURE_MFENCE_RDTSC);
- alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
+ alternative_2("", "mfence", X86_FEATURE_MFENCE_RDTSC,
+ "lfence", X86_FEATURE_LFENCE_RDTSC);
}
#endif /* _ASM_X86_BARRIER_H */
* for assembly code:
*/
-#define R15 0
-#define R14 8
-#define R13 16
-#define R12 24
-#define RBP 32
-#define RBX 40
-
-/* arguments: interrupts/non tracing syscalls only save up to here: */
-#define R11 48
-#define R10 56
-#define R9 64
-#define R8 72
-#define RAX 80
-#define RCX 88
-#define RDX 96
-#define RSI 104
-#define RDI 112
-#define ORIG_RAX 120 /* + error_code */
-/* end of arguments */
-
-/* cpu exception frame or undefined in case of fast syscall: */
-#define RIP 128
-#define CS 136
-#define EFLAGS 144
-#define RSP 152
-#define SS 160
-
-#define ARGOFFSET R11
-
- .macro SAVE_ARGS addskip=0, save_rcx=1, save_r891011=1, rax_enosys=0
- subq $9*8+\addskip, %rsp
- CFI_ADJUST_CFA_OFFSET 9*8+\addskip
- movq_cfi rdi, 8*8
- movq_cfi rsi, 7*8
- movq_cfi rdx, 6*8
-
- .if \save_rcx
- movq_cfi rcx, 5*8
- .endif
+/* The layout forms the "struct pt_regs" on the stack: */
+/*
+ * C ABI says these regs are callee-preserved. They aren't saved on kernel entry
+ * unless syscall needs a complete, fully filled "struct pt_regs".
+ */
+#define R15 0*8
+#define R14 1*8
+#define R13 2*8
+#define R12 3*8
+#define RBP 4*8
+#define RBX 5*8
+/* These regs are callee-clobbered. Always saved on kernel entry. */
+#define R11 6*8
+#define R10 7*8
+#define R9 8*8
+#define R8 9*8
+#define RAX 10*8
+#define RCX 11*8
+#define RDX 12*8
+#define RSI 13*8
+#define RDI 14*8
+/*
+ * On syscall entry, this is syscall#. On CPU exception, this is error code.
+ * On hw interrupt, it's IRQ number:
+ */
+#define ORIG_RAX 15*8
+/* Return frame for iretq */
+#define RIP 16*8
+#define CS 17*8
+#define EFLAGS 18*8
+#define RSP 19*8
+#define SS 20*8
+
+#define SIZEOF_PTREGS 21*8
+
+ .macro ALLOC_PT_GPREGS_ON_STACK addskip=0
+ subq $15*8+\addskip, %rsp
+ CFI_ADJUST_CFA_OFFSET 15*8+\addskip
+ .endm
- .if \rax_enosys
- movq $-ENOSYS, 4*8(%rsp)
- .else
- movq_cfi rax, 4*8
+ .macro SAVE_C_REGS_HELPER offset=0 rax=1 rcx=1 r8910=1 r11=1
+ .if \r11
+ movq_cfi r11, 6*8+\offset
.endif
-
- .if \save_r891011
- movq_cfi r8, 3*8
- movq_cfi r9, 2*8
- movq_cfi r10, 1*8
- movq_cfi r11, 0*8
+ .if \r8910
+ movq_cfi r10, 7*8+\offset
+ movq_cfi r9, 8*8+\offset
+ movq_cfi r8, 9*8+\offset
+ .endif
+ .if \rax
+ movq_cfi rax, 10*8+\offset
+ .endif
+ .if \rcx
+ movq_cfi rcx, 11*8+\offset
.endif
+ movq_cfi rdx, 12*8+\offset
+ movq_cfi rsi, 13*8+\offset
+ movq_cfi rdi, 14*8+\offset
+ .endm
+ .macro SAVE_C_REGS offset=0
+ SAVE_C_REGS_HELPER \offset, 1, 1, 1, 1
+ .endm
+ .macro SAVE_C_REGS_EXCEPT_RAX_RCX offset=0
+ SAVE_C_REGS_HELPER \offset, 0, 0, 1, 1
+ .endm
+ .macro SAVE_C_REGS_EXCEPT_R891011
+ SAVE_C_REGS_HELPER 0, 1, 1, 0, 0
+ .endm
+ .macro SAVE_C_REGS_EXCEPT_RCX_R891011
+ SAVE_C_REGS_HELPER 0, 1, 0, 0, 0
+ .endm
+ .macro SAVE_C_REGS_EXCEPT_RAX_RCX_R11
+ SAVE_C_REGS_HELPER 0, 0, 0, 1, 0
+ .endm
+
+ .macro SAVE_EXTRA_REGS offset=0
+ movq_cfi r15, 0*8+\offset
+ movq_cfi r14, 1*8+\offset
+ movq_cfi r13, 2*8+\offset
+ movq_cfi r12, 3*8+\offset
+ movq_cfi rbp, 4*8+\offset
+ movq_cfi rbx, 5*8+\offset
+ .endm
+ .macro SAVE_EXTRA_REGS_RBP offset=0
+ movq_cfi rbp, 4*8+\offset
+ .endm
+ .macro RESTORE_EXTRA_REGS offset=0
+ movq_cfi_restore 0*8+\offset, r15
+ movq_cfi_restore 1*8+\offset, r14
+ movq_cfi_restore 2*8+\offset, r13
+ movq_cfi_restore 3*8+\offset, r12
+ movq_cfi_restore 4*8+\offset, rbp
+ movq_cfi_restore 5*8+\offset, rbx
.endm
-#define ARG_SKIP (9*8)
+ .macro ZERO_EXTRA_REGS
+ xorl %r15d, %r15d
+ xorl %r14d, %r14d
+ xorl %r13d, %r13d
+ xorl %r12d, %r12d
+ xorl %ebp, %ebp
+ xorl %ebx, %ebx
+ .endm
- .macro RESTORE_ARGS rstor_rax=1, addskip=0, rstor_rcx=1, rstor_r11=1, \
- rstor_r8910=1, rstor_rdx=1
+ .macro RESTORE_C_REGS_HELPER rstor_rax=1, rstor_rcx=1, rstor_r11=1, rstor_r8910=1, rstor_rdx=1
.if \rstor_r11
- movq_cfi_restore 0*8, r11
+ movq_cfi_restore 6*8, r11
.endif
-
.if \rstor_r8910
- movq_cfi_restore 1*8, r10
- movq_cfi_restore 2*8, r9
- movq_cfi_restore 3*8, r8
+ movq_cfi_restore 7*8, r10
+ movq_cfi_restore 8*8, r9
+ movq_cfi_restore 9*8, r8
.endif
-
.if \rstor_rax
- movq_cfi_restore 4*8, rax
+ movq_cfi_restore 10*8, rax
.endif
-
.if \rstor_rcx
- movq_cfi_restore 5*8, rcx
+ movq_cfi_restore 11*8, rcx
.endif
-
.if \rstor_rdx
- movq_cfi_restore 6*8, rdx
- .endif
-
- movq_cfi_restore 7*8, rsi
- movq_cfi_restore 8*8, rdi
-
- .if ARG_SKIP+\addskip > 0
- addq $ARG_SKIP+\addskip, %rsp
- CFI_ADJUST_CFA_OFFSET -(ARG_SKIP+\addskip)
+ movq_cfi_restore 12*8, rdx
.endif
+ movq_cfi_restore 13*8, rsi
+ movq_cfi_restore 14*8, rdi
.endm
-
- .macro LOAD_ARGS offset, skiprax=0
- movq \offset(%rsp), %r11
- movq \offset+8(%rsp), %r10
- movq \offset+16(%rsp), %r9
- movq \offset+24(%rsp), %r8
- movq \offset+40(%rsp), %rcx
- movq \offset+48(%rsp), %rdx
- movq \offset+56(%rsp), %rsi
- movq \offset+64(%rsp), %rdi
- .if \skiprax
- .else
- movq \offset+72(%rsp), %rax
- .endif
+ .macro RESTORE_C_REGS
+ RESTORE_C_REGS_HELPER 1,1,1,1,1
.endm
-
-#define REST_SKIP (6*8)
-
- .macro SAVE_REST
- subq $REST_SKIP, %rsp
- CFI_ADJUST_CFA_OFFSET REST_SKIP
- movq_cfi rbx, 5*8
- movq_cfi rbp, 4*8
- movq_cfi r12, 3*8
- movq_cfi r13, 2*8
- movq_cfi r14, 1*8
- movq_cfi r15, 0*8
+ .macro RESTORE_C_REGS_EXCEPT_RAX
+ RESTORE_C_REGS_HELPER 0,1,1,1,1
.endm
-
- .macro RESTORE_REST
- movq_cfi_restore 0*8, r15
- movq_cfi_restore 1*8, r14
- movq_cfi_restore 2*8, r13
- movq_cfi_restore 3*8, r12
- movq_cfi_restore 4*8, rbp
- movq_cfi_restore 5*8, rbx
- addq $REST_SKIP, %rsp
- CFI_ADJUST_CFA_OFFSET -(REST_SKIP)
+ .macro RESTORE_C_REGS_EXCEPT_RCX
+ RESTORE_C_REGS_HELPER 1,0,1,1,1
.endm
-
- .macro SAVE_ALL
- SAVE_ARGS
- SAVE_REST
+ .macro RESTORE_C_REGS_EXCEPT_R11
+ RESTORE_C_REGS_HELPER 1,1,0,1,1
+ .endm
+ .macro RESTORE_C_REGS_EXCEPT_RCX_R11
+ RESTORE_C_REGS_HELPER 1,0,0,1,1
+ .endm
+ .macro RESTORE_RSI_RDI
+ RESTORE_C_REGS_HELPER 0,0,0,0,0
+ .endm
+ .macro RESTORE_RSI_RDI_RDX
+ RESTORE_C_REGS_HELPER 0,0,0,0,1
.endm
- .macro RESTORE_ALL addskip=0
- RESTORE_REST
- RESTORE_ARGS 1, \addskip
+ .macro REMOVE_PT_GPREGS_FROM_STACK addskip=0
+ addq $15*8+\addskip, %rsp
+ CFI_ADJUST_CFA_OFFSET -(15*8+\addskip)
.endm
.macro icebp
*/
.macro SAVE_ALL
- pushl_cfi %eax
- CFI_REL_OFFSET eax, 0
- pushl_cfi %ebp
- CFI_REL_OFFSET ebp, 0
- pushl_cfi %edi
- CFI_REL_OFFSET edi, 0
- pushl_cfi %esi
- CFI_REL_OFFSET esi, 0
- pushl_cfi %edx
- CFI_REL_OFFSET edx, 0
- pushl_cfi %ecx
- CFI_REL_OFFSET ecx, 0
- pushl_cfi %ebx
- CFI_REL_OFFSET ebx, 0
+ pushl_cfi_reg eax
+ pushl_cfi_reg ebp
+ pushl_cfi_reg edi
+ pushl_cfi_reg esi
+ pushl_cfi_reg edx
+ pushl_cfi_reg ecx
+ pushl_cfi_reg ebx
.endm
.macro RESTORE_ALL
- popl_cfi %ebx
- CFI_RESTORE ebx
- popl_cfi %ecx
- CFI_RESTORE ecx
- popl_cfi %edx
- CFI_RESTORE edx
- popl_cfi %esi
- CFI_RESTORE esi
- popl_cfi %edi
- CFI_RESTORE edi
- popl_cfi %ebp
- CFI_RESTORE ebp
- popl_cfi %eax
- CFI_RESTORE eax
+ popl_cfi_reg ebx
+ popl_cfi_reg ecx
+ popl_cfi_reg edx
+ popl_cfi_reg esi
+ popl_cfi_reg edi
+ popl_cfi_reg ebp
+ popl_cfi_reg eax
.endm
#endif /* CONFIG_X86_64 */
sp = task_pt_regs(current)->sp;
} else {
/* -128 for the x32 ABI redzone */
- sp = this_cpu_read(old_rsp) - 128;
+ sp = task_pt_regs(current)->sp - 128;
}
return (void __user *)round_down(sp - len, 16);
#endif
#endif
-DECLARE_PER_CPU(int, cpu_state);
-
int mwait_usable(const struct cpuinfo_x86 *);
#endif /* _ASM_X86_CPU_H */
#include <asm/disabled-features.h>
#endif
-#define NCAPINTS 11 /* N 32-bit words worth of info */
+#define NCAPINTS 13 /* N 32-bit words worth of info */
#define NBUGINTS 1 /* N 32-bit bug flags */
/*
#define X86_FEATURE_HWP_ACT_WINDOW ( 7*32+ 12) /* Intel HWP_ACT_WINDOW */
#define X86_FEATURE_HWP_EPP ( 7*32+13) /* Intel HWP_EPP */
#define X86_FEATURE_HWP_PKG_REQ ( 7*32+14) /* Intel HWP_PKG_REQ */
+#define X86_FEATURE_INTEL_PT ( 7*32+15) /* Intel Processor Trace */
/* Virtualization flags: Linux defined, word 8 */
#define X86_FEATURE_TPR_SHADOW ( 8*32+ 0) /* Intel TPR Shadow */
#define X86_FEATURE_ERMS ( 9*32+ 9) /* Enhanced REP MOVSB/STOSB */
#define X86_FEATURE_INVPCID ( 9*32+10) /* Invalidate Processor Context ID */
#define X86_FEATURE_RTM ( 9*32+11) /* Restricted Transactional Memory */
+#define X86_FEATURE_CQM ( 9*32+12) /* Cache QoS Monitoring */
#define X86_FEATURE_MPX ( 9*32+14) /* Memory Protection Extension */
#define X86_FEATURE_AVX512F ( 9*32+16) /* AVX-512 Foundation */
#define X86_FEATURE_RDSEED ( 9*32+18) /* The RDSEED instruction */
#define X86_FEATURE_ADX ( 9*32+19) /* The ADCX and ADOX instructions */
#define X86_FEATURE_SMAP ( 9*32+20) /* Supervisor Mode Access Prevention */
+#define X86_FEATURE_PCOMMIT ( 9*32+22) /* PCOMMIT instruction */
#define X86_FEATURE_CLFLUSHOPT ( 9*32+23) /* CLFLUSHOPT instruction */
+#define X86_FEATURE_CLWB ( 9*32+24) /* CLWB instruction */
#define X86_FEATURE_AVX512PF ( 9*32+26) /* AVX-512 Prefetch */
#define X86_FEATURE_AVX512ER ( 9*32+27) /* AVX-512 Exponential and Reciprocal */
#define X86_FEATURE_AVX512CD ( 9*32+28) /* AVX-512 Conflict Detection */
#define X86_FEATURE_XGETBV1 (10*32+ 2) /* XGETBV with ECX = 1 */
#define X86_FEATURE_XSAVES (10*32+ 3) /* XSAVES/XRSTORS */
+/* Intel-defined CPU QoS Sub-leaf, CPUID level 0x0000000F:0 (edx), word 11 */
+#define X86_FEATURE_CQM_LLC (11*32+ 1) /* LLC QoS if 1 */
+
+/* Intel-defined CPU QoS Sub-leaf, CPUID level 0x0000000F:1 (edx), word 12 */
+#define X86_FEATURE_CQM_OCCUP_LLC (12*32+ 0) /* LLC occupancy monitoring if 1 */
+
/*
* BUG word(s)
*/
" .word %P0\n" /* 1: do replace */
" .byte 2b - 1b\n" /* source len */
" .byte 0\n" /* replacement len */
+ " .byte 0\n" /* pad len */
".previous\n"
/* skipping size check since replacement size = 0 */
: : "i" (X86_FEATURE_ALWAYS) : : t_warn);
" .word %P0\n" /* feature bit */
" .byte 2b - 1b\n" /* source len */
" .byte 0\n" /* replacement len */
+ " .byte 0\n" /* pad len */
".previous\n"
/* skipping size check since replacement size = 0 */
: : "i" (bit) : : t_no);
" .word %P1\n" /* feature bit */
" .byte 2b - 1b\n" /* source len */
" .byte 4f - 3f\n" /* replacement len */
+ " .byte 0\n" /* pad len */
".previous\n"
".section .discard,\"aw\",@progbits\n"
" .byte 0xff + (4f-3f) - (2b-1b)\n" /* size check */
static __always_inline __pure bool _static_cpu_has_safe(u16 bit)
{
#ifdef CC_HAVE_ASM_GOTO
-/*
- * We need to spell the jumps to the compiler because, depending on the offset,
- * the replacement jump can be bigger than the original jump, and this we cannot
- * have. Thus, we force the jump to the widest, 4-byte, signed relative
- * offset even though the last would often fit in less bytes.
- */
- asm_volatile_goto("1: .byte 0xe9\n .long %l[t_dynamic] - 2f\n"
+ asm_volatile_goto("1: jmp %l[t_dynamic]\n"
"2:\n"
+ ".skip -(((5f-4f) - (2b-1b)) > 0) * "
+ "((5f-4f) - (2b-1b)),0x90\n"
+ "3:\n"
".section .altinstructions,\"a\"\n"
" .long 1b - .\n" /* src offset */
- " .long 3f - .\n" /* repl offset */
+ " .long 4f - .\n" /* repl offset */
" .word %P1\n" /* always replace */
- " .byte 2b - 1b\n" /* src len */
- " .byte 4f - 3f\n" /* repl len */
+ " .byte 3b - 1b\n" /* src len */
+ " .byte 5f - 4f\n" /* repl len */
+ " .byte 3b - 2b\n" /* pad len */
".previous\n"
".section .altinstr_replacement,\"ax\"\n"
- "3: .byte 0xe9\n .long %l[t_no] - 2b\n"
- "4:\n"
+ "4: jmp %l[t_no]\n"
+ "5:\n"
".previous\n"
".section .altinstructions,\"a\"\n"
" .long 1b - .\n" /* src offset */
" .long 0\n" /* no replacement */
" .word %P0\n" /* feature bit */
- " .byte 2b - 1b\n" /* src len */
+ " .byte 3b - 1b\n" /* src len */
" .byte 0\n" /* repl len */
+ " .byte 0\n" /* pad len */
".previous\n"
: : "i" (bit), "i" (X86_FEATURE_ALWAYS)
: : t_dynamic, t_no);
" .word %P2\n" /* always replace */
" .byte 2b - 1b\n" /* source len */
" .byte 4f - 3f\n" /* replacement len */
+ " .byte 0\n" /* pad len */
".previous\n"
".section .discard,\"aw\",@progbits\n"
" .byte 0xff + (4f-3f) - (2b-1b)\n" /* size check */
" .word %P1\n" /* feature bit */
" .byte 4b - 3b\n" /* src len */
" .byte 6f - 5f\n" /* repl len */
+ " .byte 0\n" /* pad len */
".previous\n"
".section .discard,\"aw\",@progbits\n"
" .byte 0xff + (6f-5f) - (4b-3b)\n" /* size check */
* Pentium F0 0F bugfix can have resulted in the mapped
* IDT being write-protected.
*/
-#define set_intr_gate(n, addr) \
+#define set_intr_gate_notrace(n, addr) \
do { \
BUG_ON((unsigned)n > 0xFF); \
_set_gate(n, GATE_INTERRUPT, (void *)addr, 0, 0, \
__KERNEL_CS); \
+ } while (0)
+
+#define set_intr_gate(n, addr) \
+ do { \
+ set_intr_gate_notrace(n, addr); \
_trace_set_gate(n, GATE_INTERRUPT, (void *)trace_##addr,\
0, 0, __KERNEL_CS); \
} while (0)
CFI_ADJUST_CFA_OFFSET 8
.endm
+ .macro pushq_cfi_reg reg
+ pushq %\reg
+ CFI_ADJUST_CFA_OFFSET 8
+ CFI_REL_OFFSET \reg, 0
+ .endm
+
.macro popq_cfi reg
popq \reg
CFI_ADJUST_CFA_OFFSET -8
.endm
+ .macro popq_cfi_reg reg
+ popq %\reg
+ CFI_ADJUST_CFA_OFFSET -8
+ CFI_RESTORE \reg
+ .endm
+
.macro pushfq_cfi
pushfq
CFI_ADJUST_CFA_OFFSET 8
CFI_ADJUST_CFA_OFFSET 4
.endm
+ .macro pushl_cfi_reg reg
+ pushl %\reg
+ CFI_ADJUST_CFA_OFFSET 4
+ CFI_REL_OFFSET \reg, 0
+ .endm
+
.macro popl_cfi reg
popl \reg
CFI_ADJUST_CFA_OFFSET -4
.endm
+ .macro popl_cfi_reg reg
+ popl %\reg
+ CFI_ADJUST_CFA_OFFSET -4
+ CFI_RESTORE \reg
+ .endm
+
.macro pushfl_cfi
pushfl
CFI_ADJUST_CFA_OFFSET 4
}
#endif
-#ifdef CONFIG_MEMTEST
-extern void early_memtest(unsigned long start, unsigned long end);
-#else
-static inline void early_memtest(unsigned long start, unsigned long end)
-{
-}
-#endif
-
extern unsigned long e820_end_of_ram_pfn(void);
extern unsigned long e820_end_of_low_ram_pfn(void);
extern u64 early_reserve_e820(u64 sizet, u64 align);
#define _ASM_X86_EFI_H
#include <asm/i387.h>
+#include <asm/pgtable.h>
+
/*
* We map the EFI regions needed for runtime services non-contiguously,
* with preserved alignment on virtual addresses starting from -4G down
extern struct efi_scratch efi_scratch;
extern void __init efi_set_executable(efi_memory_desc_t *md, bool executable);
extern int __init efi_memblock_x86_reserve_range(void);
-extern void __init efi_call_phys_prolog(void);
-extern void __init efi_call_phys_epilog(void);
+extern pgd_t * __init efi_call_phys_prolog(void);
+extern void __init efi_call_phys_epilog(pgd_t *save_pgd);
extern void __init efi_unmap_memmap(void);
extern void __init efi_memory_uc(u64 addr, unsigned long size);
extern void __init efi_map_region(efi_memory_desc_t *md);
static inline void elf_common_init(struct thread_struct *t,
struct pt_regs *regs, const u16 ds)
{
- regs->ax = regs->bx = regs->cx = regs->dx = 0;
- regs->si = regs->di = regs->bp = 0;
+ /* Commented-out registers are cleared in stub_execve */
+ /*regs->ax = regs->bx =*/ regs->cx = regs->dx = 0;
+ regs->si = regs->di /*= regs->bp*/ = 0;
regs->r8 = regs->r9 = regs->r10 = regs->r11 = 0;
- regs->r12 = regs->r13 = regs->r14 = regs->r15 = 0;
+ /*regs->r12 = regs->r13 = regs->r14 = regs->r15 = 0;*/
t->fs = t->gs = 0;
t->fsindex = t->gsindex = 0;
t->ds = t->es = ds;
int uses_interp);
#define compat_arch_setup_additional_pages compat_arch_setup_additional_pages
-extern unsigned long arch_randomize_brk(struct mm_struct *mm);
-#define arch_randomize_brk arch_randomize_brk
-
/*
* True on X86_32 or when emulating IA32 on X86_64
*/
struct va_alignment {
int flags;
unsigned long mask;
+ unsigned long bits;
} ____cacheline_aligned;
extern struct va_alignment va_align;
static inline void finit_soft_fpu(struct i387_soft_struct *soft) {}
#endif
+/*
+ * Must be run with preemption disabled: this clears the fpu_owner_task,
+ * on this CPU.
+ *
+ * This will disable any lazy FPU state restore of the current FPU state,
+ * but if the current thread owns the FPU, it will still be saved by.
+ */
+static inline void __cpu_disable_lazy_restore(unsigned int cpu)
+{
+ per_cpu(fpu_owner_task, cpu) = NULL;
+}
+
+/*
+ * Used to indicate that the FPU state in memory is newer than the FPU
+ * state in registers, and the FPU state should be reloaded next time the
+ * task is run. Only safe on the current task, or non-running tasks.
+ */
+static inline void task_disable_lazy_fpu_restore(struct task_struct *tsk)
+{
+ tsk->thread.fpu.last_cpu = ~0;
+}
+
+static inline int fpu_lazy_restore(struct task_struct *new, unsigned int cpu)
+{
+ return new == this_cpu_read_stable(fpu_owner_task) &&
+ cpu == new->thread.fpu.last_cpu;
+}
+
static inline int is_ia32_compat_frame(void)
{
return config_enabled(CONFIG_IA32_EMULATION) &&
static inline void fx_finit(struct i387_fxsave_struct *fx)
{
- memset(fx, 0, xstate_size);
fx->cwd = 0x37f;
fx->mxcsr = MXCSR_DEFAULT;
}
__thread_set_has_fpu(tsk);
}
-static inline void __drop_fpu(struct task_struct *tsk)
+static inline void drop_fpu(struct task_struct *tsk)
{
+ /*
+ * Forget coprocessor state..
+ */
+ preempt_disable();
+ tsk->thread.fpu_counter = 0;
+
if (__thread_has_fpu(tsk)) {
/* Ignore delayed exceptions from user space */
asm volatile("1: fwait\n"
_ASM_EXTABLE(1b, 2b));
__thread_fpu_end(tsk);
}
-}
-static inline void drop_fpu(struct task_struct *tsk)
-{
- /*
- * Forget coprocessor state..
- */
- preempt_disable();
- tsk->thread.fpu_counter = 0;
- __drop_fpu(tsk);
clear_stopped_child_used_math(tsk);
preempt_enable();
}
-static inline void drop_init_fpu(struct task_struct *tsk)
+static inline void restore_init_xstate(void)
+{
+ if (use_xsave())
+ xrstor_state(init_xstate_buf, -1);
+ else
+ fxrstor_checking(&init_xstate_buf->i387);
+}
+
+/*
+ * Reset the FPU state in the eager case and drop it in the lazy case (later use
+ * will reinit it).
+ */
+static inline void fpu_reset_state(struct task_struct *tsk)
{
if (!use_eager_fpu())
drop_fpu(tsk);
- else {
- if (use_xsave())
- xrstor_state(init_xstate_buf, -1);
- else
- fxrstor_checking(&init_xstate_buf->i387);
- }
+ else
+ restore_init_xstate();
}
/*
*/
typedef struct { int preload; } fpu_switch_t;
-/*
- * Must be run with preemption disabled: this clears the fpu_owner_task,
- * on this CPU.
- *
- * This will disable any lazy FPU state restore of the current FPU state,
- * but if the current thread owns the FPU, it will still be saved by.
- */
-static inline void __cpu_disable_lazy_restore(unsigned int cpu)
-{
- per_cpu(fpu_owner_task, cpu) = NULL;
-}
-
-static inline int fpu_lazy_restore(struct task_struct *new, unsigned int cpu)
-{
- return new == this_cpu_read_stable(fpu_owner_task) &&
- cpu == new->thread.fpu.last_cpu;
-}
-
static inline fpu_switch_t switch_fpu_prepare(struct task_struct *old, struct task_struct *new, int cpu)
{
fpu_switch_t fpu;
* If the task has used the math, pre-load the FPU on xsave processors
* or if the past 5 consecutive context-switches used math.
*/
- fpu.preload = tsk_used_math(new) && (use_eager_fpu() ||
- new->thread.fpu_counter > 5);
+ fpu.preload = tsk_used_math(new) &&
+ (use_eager_fpu() || new->thread.fpu_counter > 5);
+
if (__thread_has_fpu(old)) {
if (!__save_init_fpu(old))
- cpu = ~0;
- old->thread.fpu.last_cpu = cpu;
- old->thread.fpu.has_fpu = 0; /* But leave fpu_owner_task! */
+ task_disable_lazy_fpu_restore(old);
+ else
+ old->thread.fpu.last_cpu = cpu;
+
+ /* But leave fpu_owner_task! */
+ old->thread.fpu.has_fpu = 0;
/* Don't change CR0.TS if we just switch! */
if (fpu.preload) {
stts();
} else {
old->thread.fpu_counter = 0;
- old->thread.fpu.last_cpu = ~0;
+ task_disable_lazy_fpu_restore(old);
if (fpu.preload) {
new->thread.fpu_counter++;
- if (!use_eager_fpu() && fpu_lazy_restore(new, cpu))
+ if (fpu_lazy_restore(new, cpu))
fpu.preload = 0;
else
prefetch(new->thread.fpu.state);
{
if (fpu.preload) {
if (unlikely(restore_fpu_checking(new)))
- drop_init_fpu(new);
+ fpu_reset_state(new);
}
}
}
/*
- * Need to be preemption-safe.
+ * Needs to be preemption-safe.
*
* NOTE! user_fpu_begin() must be used only immediately before restoring
- * it. This function does not do any save/restore on their own.
+ * the save state. It does not do any saving/restoring on its own. In
+ * lazy FPU mode, it is just an optimization to avoid a #NM exception,
+ * the task can lose the FPU right after preempt_enable().
*/
static inline void user_fpu_begin(void)
{
fpu_fxsave(&tsk->thread.fpu);
}
-/*
- * These disable preemption on their own and are safe
- */
-static inline void save_init_fpu(struct task_struct *tsk)
-{
- WARN_ON_ONCE(!__thread_has_fpu(tsk));
-
- if (use_eager_fpu()) {
- __save_fpu(tsk);
- return;
- }
-
- preempt_disable();
- __save_init_fpu(tsk);
- __thread_fpu_end(tsk);
- preempt_enable();
-}
-
/*
* i387 state interaction
*/
extern __visible void smp_invalidate_interrupt(struct pt_regs *);
#endif
-extern void (*__initconst interrupt[FIRST_SYSTEM_VECTOR
- - FIRST_EXTERNAL_VECTOR])(void);
+extern char irq_entries_start[];
#ifdef CONFIG_TRACING
-#define trace_interrupt interrupt
+#define trace_irq_entries_start irq_entries_start
#endif
#define VECTOR_UNDEFINED (-1)
const insn_byte_t *next_byte;
};
-#define MAX_INSN_SIZE 16
+#define MAX_INSN_SIZE 15
#define X86_MODRM_MOD(modrm) (((modrm) & 0xc0) >> 6)
#define X86_MODRM_REG(modrm) (((modrm) & 0x38) >> 3)
* d). Similar to the 'init', except that this gets called from pci_iommu_init
* where we do have a memory allocator.
*
- * The standard vs the _FINISH differs in that the _FINISH variant will
- * continue detecting other IOMMUs in the call list after the
- * the detection routine returns a positive number. The _FINISH will
- * stop the execution chain. Both will still call the 'init' and
- * 'late_init' functions if they are set.
+ * The standard IOMMU_INIT differs from the IOMMU_INIT_FINISH variant
+ * in that the former will continue detecting other IOMMUs in the call
+ * list after the detection routine returns a positive number, while the
+ * latter will stop the execution chain upon first successful detection.
+ * Both variants will still call the 'init' and 'late_init' functions if
+ * they are set.
*/
#define IOMMU_INIT_FINISH(_detect, _depend, _init, _late_init) \
__IOMMU_INIT(_detect, _depend, _init, _late_init, 1)
#define USERGS_SYSRET32 \
swapgs; \
sysretl
-#define ENABLE_INTERRUPTS_SYSEXIT32 \
- swapgs; \
- sti; \
- sysexit
#else
#define INTERRUPT_RETURN iret
return arch_irqs_disabled_flags(flags);
}
+#endif /* !__ASSEMBLY__ */
+#ifdef __ASSEMBLY__
+#ifdef CONFIG_TRACE_IRQFLAGS
+# define TRACE_IRQS_ON call trace_hardirqs_on_thunk;
+# define TRACE_IRQS_OFF call trace_hardirqs_off_thunk;
#else
-
-#ifdef CONFIG_X86_64
-#define ARCH_LOCKDEP_SYS_EXIT call lockdep_sys_exit_thunk
-#define ARCH_LOCKDEP_SYS_EXIT_IRQ \
+# define TRACE_IRQS_ON
+# define TRACE_IRQS_OFF
+#endif
+#ifdef CONFIG_DEBUG_LOCK_ALLOC
+# ifdef CONFIG_X86_64
+# define LOCKDEP_SYS_EXIT call lockdep_sys_exit_thunk
+# define LOCKDEP_SYS_EXIT_IRQ \
TRACE_IRQS_ON; \
sti; \
- SAVE_REST; \
- LOCKDEP_SYS_EXIT; \
- RESTORE_REST; \
+ call lockdep_sys_exit_thunk; \
cli; \
TRACE_IRQS_OFF;
-
-#else
-#define ARCH_LOCKDEP_SYS_EXIT \
+# else
+# define LOCKDEP_SYS_EXIT \
pushl %eax; \
pushl %ecx; \
pushl %edx; \
popl %edx; \
popl %ecx; \
popl %eax;
-
-#define ARCH_LOCKDEP_SYS_EXIT_IRQ
-#endif
-
-#ifdef CONFIG_TRACE_IRQFLAGS
-# define TRACE_IRQS_ON call trace_hardirqs_on_thunk;
-# define TRACE_IRQS_OFF call trace_hardirqs_off_thunk;
+# define LOCKDEP_SYS_EXIT_IRQ
+# endif
#else
-# define TRACE_IRQS_ON
-# define TRACE_IRQS_OFF
-#endif
-#ifdef CONFIG_DEBUG_LOCK_ALLOC
-# define LOCKDEP_SYS_EXIT ARCH_LOCKDEP_SYS_EXIT
-# define LOCKDEP_SYS_EXIT_IRQ ARCH_LOCKDEP_SYS_EXIT_IRQ
-# else
# define LOCKDEP_SYS_EXIT
# define LOCKDEP_SYS_EXIT_IRQ
-# endif
-
+#endif
#endif /* __ASSEMBLY__ */
+
#endif
#ifndef _ASM_X86_JUMP_LABEL_H
#define _ASM_X86_JUMP_LABEL_H
-#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
#include <linux/stringify.h>
#include <linux/types.h>
return true;
}
-#endif /* __KERNEL__ */
-
#ifdef CONFIG_X86_64
typedef u64 jump_label_t;
#else
jump_label_t key;
};
+#endif /* __ASSEMBLY__ */
#endif
(base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
}
-#define SELECTOR_TI_MASK (1 << 2)
-#define SELECTOR_RPL_MASK 0x03
-
-#define IOPL_SHIFT 12
-
#define KVM_PERMILLE_MMU_PAGES 20
#define KVM_MIN_ALLOC_MMU_PAGES 64
#define KVM_MMU_HASH_SHIFT 10
enum {
KVM_DEBUGREG_BP_ENABLED = 1,
KVM_DEBUGREG_WONT_EXIT = 2,
+ KVM_DEBUGREG_RELOAD = 4,
};
struct kvm_vcpu_arch {
int cpuid_nent;
struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
+
+ int maxphyaddr;
+
/* emulate context */
struct x86_emulate_ctxt emulate_ctxt;
struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
};
+/*
+ * We use as the mode the number of bits allocated in the LDR for the
+ * logical processor ID. It happens that these are all powers of two.
+ * This makes it is very easy to detect cases where the APICs are
+ * configured for multiple modes; in that case, we cannot use the map and
+ * hence cannot use kvm_irq_delivery_to_apic_fast either.
+ */
+#define KVM_APIC_MODE_XAPIC_CLUSTER 4
+#define KVM_APIC_MODE_XAPIC_FLAT 8
+#define KVM_APIC_MODE_X2APIC 16
+
struct kvm_apic_map {
struct rcu_head rcu;
- u8 ldr_bits;
- /* fields bellow are used to decode ldr values in different modes */
- u32 cid_shift, cid_mask, lid_mask, broadcast;
+ u8 mode;
struct kvm_lapic *phys_map[256];
/* first index is cluster id second is cpu id in a cluster */
struct kvm_lapic *logical_map[16][16];
void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
struct kvm_memory_slot *memslot);
+void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
+ struct kvm_memory_slot *memslot);
void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
struct kvm_memory_slot *memslot);
void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
int kvm_emulate_halt(struct kvm_vcpu *vcpu);
+int kvm_vcpu_halt(struct kvm_vcpu *vcpu);
int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
-int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
static inline bool kvm_para_available(void)
{
- return 0;
+ return false;
}
static inline unsigned int kvm_arch_para_features(void)
#endif
return 0;
}
-extern int klp_write_module_reloc(struct module *mod, unsigned long type,
- unsigned long loc, unsigned long value);
+int klp_write_module_reloc(struct module *mod, unsigned long type,
+ unsigned long loc, unsigned long value);
static inline void klp_arch_set_pc(struct pt_regs *regs, unsigned long ip)
{
u32 rip_msr;
};
+struct mce_vendor_flags {
+ __u64 overflow_recov : 1, /* cpuid_ebx(80000007) */
+ __reserved_0 : 63;
+};
+extern struct mce_vendor_flags mce_flags;
+
extern struct mca_config mca_cfg;
extern void mce_register_decode_chain(struct notifier_block *nb);
extern void mce_unregister_decode_chain(struct notifier_block *nb);
#ifdef CONFIG_X86_MCE
int mcheck_init(void);
void mcheck_cpu_init(struct cpuinfo_x86 *c);
+void mcheck_vendor_init_severity(void);
#else
static inline int mcheck_init(void) { return 0; }
static inline void mcheck_cpu_init(struct cpuinfo_x86 *c) {}
+static inline void mcheck_vendor_init_severity(void) {}
#endif
#ifdef CONFIG_X86_ANCIENT_MCE
DECLARE_PER_CPU(mce_banks_t, mce_poll_banks);
enum mcp_flags {
- MCP_TIMESTAMP = (1 << 0), /* log time stamp */
- MCP_UC = (1 << 1), /* log uncorrected errors */
- MCP_DONTLOG = (1 << 2), /* only clear, don't log */
+ MCP_TIMESTAMP = BIT(0), /* log time stamp */
+ MCP_UC = BIT(1), /* log uncorrected errors */
+ MCP_DONTLOG = BIT(2), /* only clear, don't log */
};
-void machine_check_poll(enum mcp_flags flags, mce_banks_t *b);
+bool machine_check_poll(enum mcp_flags flags, mce_banks_t *b);
int mce_notify_irq(void);
#ifdef CONFIG_MICROCODE_EARLY
#define MAX_UCODE_COUNT 128
+
+#define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
+#define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u')
+#define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I')
+#define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l')
+#define CPUID_AMD1 QCHAR('A', 'u', 't', 'h')
+#define CPUID_AMD2 QCHAR('e', 'n', 't', 'i')
+#define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D')
+
+#define CPUID_IS(a, b, c, ebx, ecx, edx) \
+ (!((ebx ^ (a))|(edx ^ (b))|(ecx ^ (c))))
+
+/*
+ * In early loading microcode phase on BSP, boot_cpu_data is not set up yet.
+ * x86_vendor() gets vendor id for BSP.
+ *
+ * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify
+ * coding, we still use x86_vendor() to get vendor id for AP.
+ *
+ * x86_vendor() gets vendor information directly from CPUID.
+ */
+static inline int x86_vendor(void)
+{
+ u32 eax = 0x00000000;
+ u32 ebx, ecx = 0, edx;
+
+ native_cpuid(&eax, &ebx, &ecx, &edx);
+
+ if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx))
+ return X86_VENDOR_INTEL;
+
+ if (CPUID_IS(CPUID_AMD1, CPUID_AMD2, CPUID_AMD3, ebx, ecx, edx))
+ return X86_VENDOR_AMD;
+
+ return X86_VENDOR_UNKNOWN;
+}
+
+static inline unsigned int __x86_family(unsigned int sig)
+{
+ unsigned int x86;
+
+ x86 = (sig >> 8) & 0xf;
+
+ if (x86 == 0xf)
+ x86 += (sig >> 20) & 0xff;
+
+ return x86;
+}
+
+static inline unsigned int x86_family(void)
+{
+ u32 eax = 0x00000001;
+ u32 ebx, ecx = 0, edx;
+
+ native_cpuid(&eax, &ebx, &ecx, &edx);
+
+ return __x86_family(eax);
+}
+
+static inline unsigned int x86_model(unsigned int sig)
+{
+ unsigned int x86, model;
+
+ x86 = __x86_family(sig);
+
+ model = (sig >> 4) & 0xf;
+
+ if (x86 == 0x6 || x86 == 0xf)
+ model += ((sig >> 16) & 0xf) << 4;
+
+ return model;
+}
+
extern void __init load_ucode_bsp(void);
extern void load_ucode_ap(void);
extern int __init save_microcode_in_initrd(void);
#define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
-extern int
-get_matching_microcode(unsigned int csig, int cpf, void *mc, int rev);
+extern int get_matching_microcode(unsigned int csig, int cpf, int rev, void *mc);
extern int microcode_sanity_check(void *mc, int print_err);
-extern int get_matching_sig(unsigned int csig, int cpf, void *mc, int rev);
-extern int
-update_match_revision(struct microcode_header_intel *mc_header, int rev);
+extern int get_matching_sig(unsigned int csig, int cpf, int rev, void *mc);
+
+static inline int
+revision_is_newer(struct microcode_header_intel *mc_header, int rev)
+{
+ return (mc_header->rev <= rev) ? 0 : 1;
+}
#ifdef CONFIG_MICROCODE_INTEL_EARLY
extern void __init load_ucode_intel_bsp(void);
:: "a" (eax), "c" (ecx));
}
+static inline void __sti_mwait(unsigned long eax, unsigned long ecx)
+{
+ trace_hardirqs_on();
+ /* "mwait %eax, %ecx;" */
+ asm volatile("sti; .byte 0x0f, 0x01, 0xc9;"
+ :: "a" (eax), "c" (ecx));
+}
+
/*
* This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
* which can obviate IPI to trigger checking of need_resched.
#ifdef CONFIG_X86_64
#include <asm/page_64_types.h>
+#define IOREMAP_MAX_ORDER (PUD_SHIFT)
#else
#include <asm/page_32_types.h>
+#define IOREMAP_MAX_ORDER (PMD_SHIFT)
#endif /* CONFIG_X86_64 */
#ifndef __ASSEMBLY__
PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
}
-#if PAGETABLE_LEVELS >= 3
+#if CONFIG_PGTABLE_LEVELS >= 3
static inline pmd_t __pmd(pmdval_t val)
{
pmdval_t ret;
PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
val);
}
-#if PAGETABLE_LEVELS == 4
+#if CONFIG_PGTABLE_LEVELS == 4
static inline pud_t __pud(pudval_t val)
{
pudval_t ret;
set_pud(pudp, __pud(0));
}
-#endif /* PAGETABLE_LEVELS == 4 */
+#endif /* CONFIG_PGTABLE_LEVELS == 4 */
-#endif /* PAGETABLE_LEVELS >= 3 */
+#endif /* CONFIG_PGTABLE_LEVELS >= 3 */
#ifdef CONFIG_X86_PAE
/* Special-case pte-setting operations for PAE, which can't update a
PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
CLBR_NONE, \
jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
-
-#define ENABLE_INTERRUPTS_SYSEXIT32 \
- PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
- CLBR_NONE, \
- jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
#endif /* CONFIG_X86_32 */
#endif /* __ASSEMBLY__ */
struct paravirt_callee_save pgd_val;
struct paravirt_callee_save make_pgd;
-#if PAGETABLE_LEVELS >= 3
+#if CONFIG_PGTABLE_LEVELS >= 3
#ifdef CONFIG_X86_PAE
void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
struct paravirt_callee_save pmd_val;
struct paravirt_callee_save make_pmd;
-#if PAGETABLE_LEVELS == 4
+#if CONFIG_PGTABLE_LEVELS == 4
struct paravirt_callee_save pud_val;
struct paravirt_callee_save make_pud;
void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
-#endif /* PAGETABLE_LEVELS == 4 */
-#endif /* PAGETABLE_LEVELS >= 3 */
+#endif /* CONFIG_PGTABLE_LEVELS == 4 */
+#endif /* CONFIG_PGTABLE_LEVELS >= 3 */
struct pv_lazy_ops lazy_mode;
#define pmd_pgtable(pmd) pmd_page(pmd)
-#if PAGETABLE_LEVELS > 2
+#if CONFIG_PGTABLE_LEVELS > 2
static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
{
struct page *page;
}
#endif /* CONFIG_X86_PAE */
-#if PAGETABLE_LEVELS > 3
+#if CONFIG_PGTABLE_LEVELS > 3
static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgd, pud_t *pud)
{
paravirt_alloc_pud(mm, __pa(pud) >> PAGE_SHIFT);
___pud_free_tlb(tlb, pud);
}
-#endif /* PAGETABLE_LEVELS > 3 */
-#endif /* PAGETABLE_LEVELS > 2 */
+#endif /* CONFIG_PGTABLE_LEVELS > 3 */
+#endif /* CONFIG_PGTABLE_LEVELS > 2 */
#endif /* _ASM_X86_PGALLOC_H */
#endif /* !__ASSEMBLY__ */
#define SHARED_KERNEL_PMD 0
-#define PAGETABLE_LEVELS 2
/*
* traditional i386 two-level paging structure:
#define SHARED_KERNEL_PMD 1
#endif
-#define PAGETABLE_LEVELS 3
-
/*
* PGDIR_SHIFT determines what a top-level page table entry can map
*/
return npg >> (20 - PAGE_SHIFT);
}
-#if PAGETABLE_LEVELS > 2
+#if CONFIG_PGTABLE_LEVELS > 2
static inline int pud_none(pud_t pud)
{
return native_pud_val(pud) == 0;
{
return 0;
}
-#endif /* PAGETABLE_LEVELS > 2 */
+#endif /* CONFIG_PGTABLE_LEVELS > 2 */
-#if PAGETABLE_LEVELS > 3
+#if CONFIG_PGTABLE_LEVELS > 3
static inline int pgd_present(pgd_t pgd)
{
return pgd_flags(pgd) & _PAGE_PRESENT;
{
return !native_pgd_val(pgd);
}
-#endif /* PAGETABLE_LEVELS > 3 */
+#endif /* CONFIG_PGTABLE_LEVELS > 3 */
#endif /* __ASSEMBLY__ */
#endif /* !__ASSEMBLY__ */
#define SHARED_KERNEL_PMD 0
-#define PAGETABLE_LEVELS 4
/*
* PGDIR_SHIFT determines what a top-level page table entry can map
return native_pgd_val(pgd) & PTE_FLAGS_MASK;
}
-#if PAGETABLE_LEVELS > 3
+#if CONFIG_PGTABLE_LEVELS > 3
typedef struct { pudval_t pud; } pud_t;
static inline pud_t native_make_pud(pmdval_t val)
}
#endif
-#if PAGETABLE_LEVELS > 2
+#if CONFIG_PGTABLE_LEVELS > 2
typedef struct { pmdval_t pmd; } pmd_t;
static inline pmd_t native_make_pmd(pmdval_t val)
/* in KB - valid for CPUS which support this call: */
int x86_cache_size;
int x86_cache_alignment; /* In bytes */
+ /* Cache QoS architectural values: */
+ int x86_cache_max_rmid; /* max index */
+ int x86_cache_occ_scale; /* scale to bytes */
int x86_power;
unsigned long loops_per_jiffy;
/* cpuid returned max cores value: */
unsigned long sp0;
unsigned short ss0, __ss0h;
unsigned long sp1;
- /* ss1 caches MSR_IA32_SYSENTER_CS: */
- unsigned short ss1, __ss1h;
+
+ /*
+ * We don't use ring 1, so ss1 is a convenient scratch space in
+ * the same cacheline as sp0. We use ss1 to cache the value in
+ * MSR_IA32_SYSENTER_CS. When we context switch
+ * MSR_IA32_SYSENTER_CS, we first check if the new value being
+ * written matches ss1, and, if it's not, then we wrmsr the new
+ * value and update ss1.
+ *
+ * The only reason we context switch MSR_IA32_SYSENTER_CS is
+ * that we set it to zero in vm86 tasks to avoid corrupting the
+ * stack if we were to go through the sysenter path from vm86
+ * mode.
+ */
+ unsigned short ss1; /* MSR_IA32_SYSENTER_CS */
+
+ unsigned short __ss1h;
unsigned long sp2;
unsigned short ss2, __ss2h;
unsigned long __cr3;
unsigned long io_bitmap[IO_BITMAP_LONGS + 1];
/*
- * .. and then another 0x100 bytes for the emergency kernel stack:
+ * Space for the temporary SYSENTER stack:
*/
- unsigned long stack[64];
+ unsigned long SYSENTER_stack[64];
} ____cacheline_aligned;
-DECLARE_PER_CPU_SHARED_ALIGNED(struct tss_struct, init_tss);
+DECLARE_PER_CPU_SHARED_ALIGNED(struct tss_struct, cpu_tss);
+
+#ifdef CONFIG_X86_32
+DECLARE_PER_CPU(unsigned long, cpu_current_top_of_stack);
+#endif
/*
* Save the original ist values for checking stack pointers during debugging
#ifdef CONFIG_X86_32
unsigned long sysenter_cs;
#else
- unsigned long usersp; /* Copy from PDA */
unsigned short es;
unsigned short ds;
unsigned short fsindex;
#endif
}
+static inline unsigned long current_top_of_stack(void)
+{
+#ifdef CONFIG_X86_64
+ return this_cpu_read_stable(cpu_tss.x86_tss.sp0);
+#else
+ /* sp0 on x86_32 is special in and around vm86 mode. */
+ return this_cpu_read_stable(cpu_current_top_of_stack);
+#endif
+}
+
#ifdef CONFIG_PARAVIRT
#include <asm/paravirt.h>
#else
#define ARCH_HAS_SPINLOCK_PREFETCH
#ifdef CONFIG_X86_32
-# define BASE_PREFETCH ASM_NOP4
+# define BASE_PREFETCH ""
# define ARCH_HAS_PREFETCH
#else
-# define BASE_PREFETCH "prefetcht0 (%1)"
+# define BASE_PREFETCH "prefetcht0 %P1"
#endif
/*
*/
static inline void prefetch(const void *x)
{
- alternative_input(BASE_PREFETCH,
- "prefetchnta (%1)",
+ alternative_input(BASE_PREFETCH, "prefetchnta %P1",
X86_FEATURE_XMM,
- "r" (x));
+ "m" (*(const char *)x));
}
/*
*/
static inline void prefetchw(const void *x)
{
- alternative_input(BASE_PREFETCH,
- "prefetchw (%1)",
- X86_FEATURE_3DNOW,
- "r" (x));
+ alternative_input(BASE_PREFETCH, "prefetchw %P1",
+ X86_FEATURE_3DNOWPREFETCH,
+ "m" (*(const char *)x));
}
static inline void spin_lock_prefetch(const void *x)
prefetchw(x);
}
+#define TOP_OF_INIT_STACK ((unsigned long)&init_stack + sizeof(init_stack) - \
+ TOP_OF_KERNEL_STACK_PADDING)
+
#ifdef CONFIG_X86_32
/*
* User space process size: 3GB (default).
#define STACK_TOP_MAX STACK_TOP
#define INIT_THREAD { \
- .sp0 = sizeof(init_stack) + (long)&init_stack, \
+ .sp0 = TOP_OF_INIT_STACK, \
.vm86_info = NULL, \
.sysenter_cs = __KERNEL_CS, \
.io_bitmap_ptr = NULL, \
}
-/*
- * Note that the .io_bitmap member must be extra-big. This is because
- * the CPU will access an additional byte beyond the end of the IO
- * permission bitmap. The extra byte must be all 1 bits, and must
- * be within the limit.
- */
-#define INIT_TSS { \
- .x86_tss = { \
- .sp0 = sizeof(init_stack) + (long)&init_stack, \
- .ss0 = __KERNEL_DS, \
- .ss1 = __KERNEL_CS, \
- .io_bitmap_base = INVALID_IO_BITMAP_OFFSET, \
- }, \
- .io_bitmap = { [0 ... IO_BITMAP_LONGS] = ~0 }, \
-}
-
extern unsigned long thread_saved_pc(struct task_struct *tsk);
-#define THREAD_SIZE_LONGS (THREAD_SIZE/sizeof(unsigned long))
-#define KSTK_TOP(info) \
-({ \
- unsigned long *__ptr = (unsigned long *)(info); \
- (unsigned long)(&__ptr[THREAD_SIZE_LONGS]); \
-})
-
/*
- * The below -8 is to reserve 8 bytes on top of the ring0 stack.
+ * TOP_OF_KERNEL_STACK_PADDING reserves 8 bytes on top of the ring0 stack.
* This is necessary to guarantee that the entire "struct pt_regs"
* is accessible even if the CPU haven't stored the SS/ESP registers
* on the stack (interrupt gate does not save these registers
* "struct pt_regs" is possible, but they may contain the
* completely wrong values.
*/
-#define task_pt_regs(task) \
-({ \
- struct pt_regs *__regs__; \
- __regs__ = (struct pt_regs *)(KSTK_TOP(task_stack_page(task))-8); \
- __regs__ - 1; \
+#define task_pt_regs(task) \
+({ \
+ unsigned long __ptr = (unsigned long)task_stack_page(task); \
+ __ptr += THREAD_SIZE - TOP_OF_KERNEL_STACK_PADDING; \
+ ((struct pt_regs *)__ptr) - 1; \
})
#define KSTK_ESP(task) (task_pt_regs(task)->sp)
#define STACK_TOP_MAX TASK_SIZE_MAX
#define INIT_THREAD { \
- .sp0 = (unsigned long)&init_stack + sizeof(init_stack) \
-}
-
-#define INIT_TSS { \
- .x86_tss.sp0 = (unsigned long)&init_stack + sizeof(init_stack) \
+ .sp0 = TOP_OF_INIT_STACK \
}
/*
#define task_pt_regs(tsk) ((struct pt_regs *)(tsk)->thread.sp0 - 1)
extern unsigned long KSTK_ESP(struct task_struct *task);
-/*
- * User space RSP while inside the SYSCALL fast path
- */
-DECLARE_PER_CPU(unsigned long, old_rsp);
-
#endif /* CONFIG_X86_64 */
extern void start_thread(struct pt_regs *regs, unsigned long new_ip,
#else /* __i386__ */
struct pt_regs {
+/*
+ * C ABI says these regs are callee-preserved. They aren't saved on kernel entry
+ * unless syscall needs a complete, fully filled "struct pt_regs".
+ */
unsigned long r15;
unsigned long r14;
unsigned long r13;
unsigned long r12;
unsigned long bp;
unsigned long bx;
-/* arguments: non interrupts/non tracing syscalls only save up to here*/
+/* These regs are callee-clobbered. Always saved on kernel entry. */
unsigned long r11;
unsigned long r10;
unsigned long r9;
unsigned long dx;
unsigned long si;
unsigned long di;
+/*
+ * On syscall entry, this is syscall#. On CPU exception, this is error code.
+ * On hw interrupt, it's IRQ number:
+ */
unsigned long orig_ax;
-/* end of arguments */
-/* cpu exception frame or undefined */
+/* Return frame for iretq */
unsigned long ip;
unsigned long cs;
unsigned long flags;
}
/*
- * user_mode_vm(regs) determines whether a register set came from user mode.
- * This is true if V8086 mode was enabled OR if the register set was from
- * protected mode with RPL-3 CS value. This tricky test checks that with
- * one comparison. Many places in the kernel can bypass this full check
- * if they have already ruled out V8086 mode, so user_mode(regs) can be used.
+ * user_mode(regs) determines whether a register set came from user
+ * mode. On x86_32, this is true if V8086 mode was enabled OR if the
+ * register set was from protected mode with RPL-3 CS value. This
+ * tricky test checks that with one comparison.
+ *
+ * On x86_64, vm86 mode is mercifully nonexistent, and we don't need
+ * the extra check.
*/
static inline int user_mode(struct pt_regs *regs)
{
#endif
}
-static inline int user_mode_vm(struct pt_regs *regs)
-{
-#ifdef CONFIG_X86_32
- return ((regs->cs & SEGMENT_RPL_MASK) | (regs->flags & X86_VM_MASK)) >=
- USER_RPL;
-#else
- return user_mode(regs);
-#endif
-}
-
static inline int v8086_mode(struct pt_regs *regs)
{
#ifdef CONFIG_X86_32
#endif
}
-#define current_user_stack_pointer() this_cpu_read(old_rsp)
-/* ia32 vs. x32 difference */
-#define compat_user_stack_pointer() \
- (test_thread_flag(TIF_IA32) \
- ? current_pt_regs()->sp \
- : this_cpu_read(old_rsp))
+#define current_user_stack_pointer() current_pt_regs()->sp
+#define compat_user_stack_pointer() current_pt_regs()->sp
#endif
#ifdef CONFIG_X86_32
*/
#define arch_ptrace_stop_needed(code, info) \
({ \
- set_thread_flag(TIF_NOTIFY_RESUME); \
+ force_iret(); \
false; \
})
struct pvclock_vsyscall_time_info {
struct pvclock_vcpu_time_info pvti;
+ u32 migrate_count;
} __attribute__((__aligned__(SMP_CACHE_BYTES)));
#define PVTI_SIZE sizeof(struct pvclock_vsyscall_time_info)
#include <linux/const.h>
-/* Constructor for a conventional segment GDT (or LDT) entry */
-/* This is a macro so it can be used in initializers */
+/*
+ * Constructor for a conventional segment GDT (or LDT) entry.
+ * This is a macro so it can be used in initializers.
+ */
#define GDT_ENTRY(flags, base, limit) \
((((base) & _AC(0xff000000,ULL)) << (56-24)) | \
(((flags) & _AC(0x0000f0ff,ULL)) << 40) | \
(((base) & _AC(0x00ffffff,ULL)) << 16) | \
(((limit) & _AC(0x0000ffff,ULL))))
-/* Simple and small GDT entries for booting only */
+/* Simple and small GDT entries for booting only: */
#define GDT_ENTRY_BOOT_CS 2
-#define __BOOT_CS (GDT_ENTRY_BOOT_CS * 8)
+#define GDT_ENTRY_BOOT_DS 3
+#define GDT_ENTRY_BOOT_TSS 4
+#define __BOOT_CS (GDT_ENTRY_BOOT_CS*8)
+#define __BOOT_DS (GDT_ENTRY_BOOT_DS*8)
+#define __BOOT_TSS (GDT_ENTRY_BOOT_TSS*8)
+
+/*
+ * Bottom two bits of selector give the ring
+ * privilege level
+ */
+#define SEGMENT_RPL_MASK 0x3
-#define GDT_ENTRY_BOOT_DS (GDT_ENTRY_BOOT_CS + 1)
-#define __BOOT_DS (GDT_ENTRY_BOOT_DS * 8)
+/* User mode is privilege level 3: */
+#define USER_RPL 0x3
-#define GDT_ENTRY_BOOT_TSS (GDT_ENTRY_BOOT_CS + 2)
-#define __BOOT_TSS (GDT_ENTRY_BOOT_TSS * 8)
+/* Bit 2 is Table Indicator (TI): selects between LDT or GDT */
+#define SEGMENT_TI_MASK 0x4
+/* LDT segment has TI set ... */
+#define SEGMENT_LDT 0x4
+/* ... GDT has it cleared */
+#define SEGMENT_GDT 0x0
-#define SEGMENT_RPL_MASK 0x3 /*
- * Bottom two bits of selector give the ring
- * privilege level
- */
-#define SEGMENT_TI_MASK 0x4 /* Bit 2 is table indicator (LDT/GDT) */
-#define USER_RPL 0x3 /* User mode is privilege level 3 */
-#define SEGMENT_LDT 0x4 /* LDT segment has TI set... */
-#define SEGMENT_GDT 0x0 /* ... GDT has it cleared */
+#define GDT_ENTRY_INVALID_SEG 0
#ifdef CONFIG_X86_32
/*
* The layout of the per-CPU GDT under Linux:
*
- * 0 - null
+ * 0 - null <=== cacheline #1
* 1 - reserved
* 2 - reserved
* 3 - reserved
*
- * 4 - unused <==== new cacheline
+ * 4 - unused <=== cacheline #2
* 5 - unused
*
* ------- start of TLS (Thread-Local Storage) segments:
*
* 6 - TLS segment #1 [ glibc's TLS segment ]
* 7 - TLS segment #2 [ Wine's %fs Win32 segment ]
- * 8 - TLS segment #3
+ * 8 - TLS segment #3 <=== cacheline #3
* 9 - reserved
* 10 - reserved
* 11 - reserved
*
* ------- start of kernel segments:
*
- * 12 - kernel code segment <==== new cacheline
+ * 12 - kernel code segment <=== cacheline #4
* 13 - kernel data segment
* 14 - default user CS
* 15 - default user DS
- * 16 - TSS
+ * 16 - TSS <=== cacheline #5
* 17 - LDT
* 18 - PNPBIOS support (16->32 gate)
* 19 - PNPBIOS support
- * 20 - PNPBIOS support
+ * 20 - PNPBIOS support <=== cacheline #6
* 21 - PNPBIOS support
* 22 - PNPBIOS support
* 23 - APM BIOS support
- * 24 - APM BIOS support
+ * 24 - APM BIOS support <=== cacheline #7
* 25 - APM BIOS support
*
* 26 - ESPFIX small SS
* 27 - per-cpu [ offset to per-cpu data area ]
- * 28 - stack_canary-20 [ for stack protector ]
+ * 28 - stack_canary-20 [ for stack protector ] <=== cacheline #8
* 29 - unused
* 30 - unused
* 31 - TSS for double fault handler
*/
-#define GDT_ENTRY_TLS_MIN 6
-#define GDT_ENTRY_TLS_MAX (GDT_ENTRY_TLS_MIN + GDT_ENTRY_TLS_ENTRIES - 1)
+#define GDT_ENTRY_TLS_MIN 6
+#define GDT_ENTRY_TLS_MAX (GDT_ENTRY_TLS_MIN + GDT_ENTRY_TLS_ENTRIES - 1)
+#define GDT_ENTRY_KERNEL_CS 12
+#define GDT_ENTRY_KERNEL_DS 13
#define GDT_ENTRY_DEFAULT_USER_CS 14
-
#define GDT_ENTRY_DEFAULT_USER_DS 15
+#define GDT_ENTRY_TSS 16
+#define GDT_ENTRY_LDT 17
+#define GDT_ENTRY_PNPBIOS_CS32 18
+#define GDT_ENTRY_PNPBIOS_CS16 19
+#define GDT_ENTRY_PNPBIOS_DS 20
+#define GDT_ENTRY_PNPBIOS_TS1 21
+#define GDT_ENTRY_PNPBIOS_TS2 22
+#define GDT_ENTRY_APMBIOS_BASE 23
+
+#define GDT_ENTRY_ESPFIX_SS 26
+#define GDT_ENTRY_PERCPU 27
+#define GDT_ENTRY_STACK_CANARY 28
+
+#define GDT_ENTRY_DOUBLEFAULT_TSS 31
-#define GDT_ENTRY_KERNEL_BASE (12)
+/*
+ * Number of entries in the GDT table:
+ */
+#define GDT_ENTRIES 32
-#define GDT_ENTRY_KERNEL_CS (GDT_ENTRY_KERNEL_BASE+0)
+/*
+ * Segment selector values corresponding to the above entries:
+ */
-#define GDT_ENTRY_KERNEL_DS (GDT_ENTRY_KERNEL_BASE+1)
+#define __KERNEL_CS (GDT_ENTRY_KERNEL_CS*8)
+#define __KERNEL_DS (GDT_ENTRY_KERNEL_DS*8)
+#define __USER_DS (GDT_ENTRY_DEFAULT_USER_DS*8 + 3)
+#define __USER_CS (GDT_ENTRY_DEFAULT_USER_CS*8 + 3)
+#define __ESPFIX_SS (GDT_ENTRY_ESPFIX_SS*8)
-#define GDT_ENTRY_TSS (GDT_ENTRY_KERNEL_BASE+4)
-#define GDT_ENTRY_LDT (GDT_ENTRY_KERNEL_BASE+5)
+/* segment for calling fn: */
+#define PNP_CS32 (GDT_ENTRY_PNPBIOS_CS32*8)
+/* code segment for BIOS: */
+#define PNP_CS16 (GDT_ENTRY_PNPBIOS_CS16*8)
-#define GDT_ENTRY_PNPBIOS_BASE (GDT_ENTRY_KERNEL_BASE+6)
-#define GDT_ENTRY_APMBIOS_BASE (GDT_ENTRY_KERNEL_BASE+11)
+/* "Is this PNP code selector (PNP_CS32 or PNP_CS16)?" */
+#define SEGMENT_IS_PNP_CODE(x) (((x) & 0xf4) == PNP_CS32)
-#define GDT_ENTRY_ESPFIX_SS (GDT_ENTRY_KERNEL_BASE+14)
-#define __ESPFIX_SS (GDT_ENTRY_ESPFIX_SS*8)
+/* data segment for BIOS: */
+#define PNP_DS (GDT_ENTRY_PNPBIOS_DS*8)
+/* transfer data segment: */
+#define PNP_TS1 (GDT_ENTRY_PNPBIOS_TS1*8)
+/* another data segment: */
+#define PNP_TS2 (GDT_ENTRY_PNPBIOS_TS2*8)
-#define GDT_ENTRY_PERCPU (GDT_ENTRY_KERNEL_BASE+15)
#ifdef CONFIG_SMP
-#define __KERNEL_PERCPU (GDT_ENTRY_PERCPU * 8)
+# define __KERNEL_PERCPU (GDT_ENTRY_PERCPU*8)
#else
-#define __KERNEL_PERCPU 0
+# define __KERNEL_PERCPU 0
#endif
-#define GDT_ENTRY_STACK_CANARY (GDT_ENTRY_KERNEL_BASE+16)
#ifdef CONFIG_CC_STACKPROTECTOR
-#define __KERNEL_STACK_CANARY (GDT_ENTRY_STACK_CANARY*8)
+# define __KERNEL_STACK_CANARY (GDT_ENTRY_STACK_CANARY*8)
#else
-#define __KERNEL_STACK_CANARY 0
+# define __KERNEL_STACK_CANARY 0
#endif
-#define GDT_ENTRY_DOUBLEFAULT_TSS 31
-
-/*
- * The GDT has 32 entries
- */
-#define GDT_ENTRIES 32
+#else /* 64-bit: */
-/* The PnP BIOS entries in the GDT */
-#define GDT_ENTRY_PNPBIOS_CS32 (GDT_ENTRY_PNPBIOS_BASE + 0)
-#define GDT_ENTRY_PNPBIOS_CS16 (GDT_ENTRY_PNPBIOS_BASE + 1)
-#define GDT_ENTRY_PNPBIOS_DS (GDT_ENTRY_PNPBIOS_BASE + 2)
-#define GDT_ENTRY_PNPBIOS_TS1 (GDT_ENTRY_PNPBIOS_BASE + 3)
-#define GDT_ENTRY_PNPBIOS_TS2 (GDT_ENTRY_PNPBIOS_BASE + 4)
-
-/* The PnP BIOS selectors */
-#define PNP_CS32 (GDT_ENTRY_PNPBIOS_CS32 * 8) /* segment for calling fn */
-#define PNP_CS16 (GDT_ENTRY_PNPBIOS_CS16 * 8) /* code segment for BIOS */
-#define PNP_DS (GDT_ENTRY_PNPBIOS_DS * 8) /* data segment for BIOS */
-#define PNP_TS1 (GDT_ENTRY_PNPBIOS_TS1 * 8) /* transfer data segment */
-#define PNP_TS2 (GDT_ENTRY_PNPBIOS_TS2 * 8) /* another data segment */
+#include <asm/cache.h>
+#define GDT_ENTRY_KERNEL32_CS 1
+#define GDT_ENTRY_KERNEL_CS 2
+#define GDT_ENTRY_KERNEL_DS 3
/*
- * Matching rules for certain types of segments.
+ * We cannot use the same code segment descriptor for user and kernel mode,
+ * not even in long flat mode, because of different DPL.
+ *
+ * GDT layout to get 64-bit SYSCALL/SYSRET support right. SYSRET hardcodes
+ * selectors:
+ *
+ * if returning to 32-bit userspace: cs = STAR.SYSRET_CS,
+ * if returning to 64-bit userspace: cs = STAR.SYSRET_CS+16,
+ *
+ * ss = STAR.SYSRET_CS+8 (in either case)
+ *
+ * thus USER_DS should be between 32-bit and 64-bit code selectors:
*/
+#define GDT_ENTRY_DEFAULT_USER32_CS 4
+#define GDT_ENTRY_DEFAULT_USER_DS 5
+#define GDT_ENTRY_DEFAULT_USER_CS 6
-/* Matches PNP_CS32 and PNP_CS16 (they must be consecutive) */
-#define SEGMENT_IS_PNP_CODE(x) (((x) & 0xf4) == GDT_ENTRY_PNPBIOS_BASE * 8)
-
+/* Needs two entries */
+#define GDT_ENTRY_TSS 8
+/* Needs two entries */
+#define GDT_ENTRY_LDT 10
-#else
-#include <asm/cache.h>
-
-#define GDT_ENTRY_KERNEL32_CS 1
-#define GDT_ENTRY_KERNEL_CS 2
-#define GDT_ENTRY_KERNEL_DS 3
+#define GDT_ENTRY_TLS_MIN 12
+#define GDT_ENTRY_TLS_MAX 14
-#define __KERNEL32_CS (GDT_ENTRY_KERNEL32_CS * 8)
+/* Abused to load per CPU data from limit */
+#define GDT_ENTRY_PER_CPU 15
/*
- * we cannot use the same code segment descriptor for user and kernel
- * -- not even in the long flat mode, because of different DPL /kkeil
- * The segment offset needs to contain a RPL. Grr. -AK
- * GDT layout to get 64bit syscall right (sysret hardcodes gdt offsets)
+ * Number of entries in the GDT table:
*/
-#define GDT_ENTRY_DEFAULT_USER32_CS 4
-#define GDT_ENTRY_DEFAULT_USER_DS 5
-#define GDT_ENTRY_DEFAULT_USER_CS 6
-#define __USER32_CS (GDT_ENTRY_DEFAULT_USER32_CS*8+3)
-#define __USER32_DS __USER_DS
-
-#define GDT_ENTRY_TSS 8 /* needs two entries */
-#define GDT_ENTRY_LDT 10 /* needs two entries */
-#define GDT_ENTRY_TLS_MIN 12
-#define GDT_ENTRY_TLS_MAX 14
-
-#define GDT_ENTRY_PER_CPU 15 /* Abused to load per CPU data from limit */
-#define __PER_CPU_SEG (GDT_ENTRY_PER_CPU * 8 + 3)
+#define GDT_ENTRIES 16
-/* TLS indexes for 64bit - hardcoded in arch_prctl */
-#define FS_TLS 0
-#define GS_TLS 1
-
-#define GS_TLS_SEL ((GDT_ENTRY_TLS_MIN+GS_TLS)*8 + 3)
-#define FS_TLS_SEL ((GDT_ENTRY_TLS_MIN+FS_TLS)*8 + 3)
-
-#define GDT_ENTRIES 16
+/*
+ * Segment selector values corresponding to the above entries:
+ *
+ * Note, selectors also need to have a correct RPL,
+ * expressed with the +3 value for user-space selectors:
+ */
+#define __KERNEL32_CS (GDT_ENTRY_KERNEL32_CS*8)
+#define __KERNEL_CS (GDT_ENTRY_KERNEL_CS*8)
+#define __KERNEL_DS (GDT_ENTRY_KERNEL_DS*8)
+#define __USER32_CS (GDT_ENTRY_DEFAULT_USER32_CS*8 + 3)
+#define __USER_DS (GDT_ENTRY_DEFAULT_USER_DS*8 + 3)
+#define __USER32_DS __USER_DS
+#define __USER_CS (GDT_ENTRY_DEFAULT_USER_CS*8 + 3)
+#define __PER_CPU_SEG (GDT_ENTRY_PER_CPU*8 + 3)
+
+/* TLS indexes for 64-bit - hardcoded in arch_prctl(): */
+#define FS_TLS 0
+#define GS_TLS 1
+
+#define GS_TLS_SEL ((GDT_ENTRY_TLS_MIN+GS_TLS)*8 + 3)
+#define FS_TLS_SEL ((GDT_ENTRY_TLS_MIN+FS_TLS)*8 + 3)
#endif
-#define __KERNEL_CS (GDT_ENTRY_KERNEL_CS*8)
-#define __KERNEL_DS (GDT_ENTRY_KERNEL_DS*8)
-#define __USER_DS (GDT_ENTRY_DEFAULT_USER_DS*8+3)
-#define __USER_CS (GDT_ENTRY_DEFAULT_USER_CS*8+3)
#ifndef CONFIG_PARAVIRT
-#define get_kernel_rpl() 0
+# define get_kernel_rpl() 0
#endif
-#define IDT_ENTRIES 256
-#define NUM_EXCEPTION_VECTORS 32
-/* Bitmask of exception vectors which push an error code on the stack */
-#define EXCEPTION_ERRCODE_MASK 0x00027d00
-#define GDT_SIZE (GDT_ENTRIES * 8)
-#define GDT_ENTRY_TLS_ENTRIES 3
-#define TLS_SIZE (GDT_ENTRY_TLS_ENTRIES * 8)
+#define IDT_ENTRIES 256
+#define NUM_EXCEPTION_VECTORS 32
+
+/* Bitmask of exception vectors which push an error code on the stack: */
+#define EXCEPTION_ERRCODE_MASK 0x00027d00
+
+#define GDT_SIZE (GDT_ENTRIES*8)
+#define GDT_ENTRY_TLS_ENTRIES 3
+#define TLS_SIZE (GDT_ENTRY_TLS_ENTRIES* 8)
#ifdef __KERNEL__
#ifndef __ASSEMBLY__
+
extern const char early_idt_handlers[NUM_EXCEPTION_VECTORS][2+2+5];
#ifdef CONFIG_TRACING
-#define trace_early_idt_handlers early_idt_handlers
+# define trace_early_idt_handlers early_idt_handlers
#endif
/*
} while (0)
/*
- * Save a segment register away
+ * Save a segment register away:
*/
#define savesegment(seg, value) \
asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
/*
- * x86_32 user gs accessors.
+ * x86-32 user GS accessors:
*/
#ifdef CONFIG_X86_32
-#ifdef CONFIG_X86_32_LAZY_GS
-#define get_user_gs(regs) (u16)({unsigned long v; savesegment(gs, v); v;})
-#define set_user_gs(regs, v) loadsegment(gs, (unsigned long)(v))
-#define task_user_gs(tsk) ((tsk)->thread.gs)
-#define lazy_save_gs(v) savesegment(gs, (v))
-#define lazy_load_gs(v) loadsegment(gs, (v))
-#else /* X86_32_LAZY_GS */
-#define get_user_gs(regs) (u16)((regs)->gs)
-#define set_user_gs(regs, v) do { (regs)->gs = (v); } while (0)
-#define task_user_gs(tsk) (task_pt_regs(tsk)->gs)
-#define lazy_save_gs(v) do { } while (0)
-#define lazy_load_gs(v) do { } while (0)
-#endif /* X86_32_LAZY_GS */
+# ifdef CONFIG_X86_32_LAZY_GS
+# define get_user_gs(regs) (u16)({ unsigned long v; savesegment(gs, v); v; })
+# define set_user_gs(regs, v) loadsegment(gs, (unsigned long)(v))
+# define task_user_gs(tsk) ((tsk)->thread.gs)
+# define lazy_save_gs(v) savesegment(gs, (v))
+# define lazy_load_gs(v) loadsegment(gs, (v))
+# else /* X86_32_LAZY_GS */
+# define get_user_gs(regs) (u16)((regs)->gs)
+# define set_user_gs(regs, v) do { (regs)->gs = (v); } while (0)
+# define task_user_gs(tsk) (task_pt_regs(tsk)->gs)
+# define lazy_save_gs(v) do { } while (0)
+# define lazy_load_gs(v) do { } while (0)
+# endif /* X86_32_LAZY_GS */
#endif /* X86_32 */
-static inline unsigned long get_limit(unsigned long segment)
-{
- unsigned long __limit;
- asm("lsll %1,%0" : "=r" (__limit) : "r" (segment));
- return __limit + 1;
-}
-
#endif /* !__ASSEMBLY__ */
#endif /* __KERNEL__ */
*/
extern struct boot_params boot_params;
+static inline bool kaslr_enabled(void)
+{
+ return !!(boot_params.hdr.loadflags & KASLR_FLAG);
+}
+
/*
* Do NOT EVER look at the BIOS memory size location.
* It does not work on many machines.
unsigned long ip;
unsigned long flags;
unsigned short cs;
- unsigned short gs;
- unsigned short fs;
- unsigned short __pad0;
+ unsigned short __pad2; /* Was called gs, but was always zero. */
+ unsigned short __pad1; /* Was called fs, but was always zero. */
+ unsigned short ss;
unsigned long err;
unsigned long trapno;
unsigned long oldmask;
X86_EFLAGS_CF | X86_EFLAGS_RF)
void signal_fault(struct pt_regs *regs, void __user *frame, char *where);
-
-int restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc,
- unsigned long *pax);
+int restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc);
int setup_sigcontext(struct sigcontext __user *sc, void __user *fpstate,
struct pt_regs *regs, unsigned long mask);
#ifdef CONFIG_X86_SMAP
-#define ASM_CLAC \
- 661: ASM_NOP3 ; \
- .pushsection .altinstr_replacement, "ax" ; \
- 662: __ASM_CLAC ; \
- .popsection ; \
- .pushsection .altinstructions, "a" ; \
- altinstruction_entry 661b, 662b, X86_FEATURE_SMAP, 3, 3 ; \
- .popsection
-
-#define ASM_STAC \
- 661: ASM_NOP3 ; \
- .pushsection .altinstr_replacement, "ax" ; \
- 662: __ASM_STAC ; \
- .popsection ; \
- .pushsection .altinstructions, "a" ; \
- altinstruction_entry 661b, 662b, X86_FEATURE_SMAP, 3, 3 ; \
- .popsection
+#define ASM_CLAC \
+ ALTERNATIVE "", __stringify(__ASM_CLAC), X86_FEATURE_SMAP
+
+#define ASM_STAC \
+ ALTERNATIVE "", __stringify(__ASM_STAC), X86_FEATURE_SMAP
#else /* CONFIG_X86_SMAP */
static __always_inline void clac(void)
{
/* Note: a barrier is implicit in alternative() */
- alternative(ASM_NOP3, __stringify(__ASM_CLAC), X86_FEATURE_SMAP);
+ alternative("", __stringify(__ASM_CLAC), X86_FEATURE_SMAP);
}
static __always_inline void stac(void)
{
/* Note: a barrier is implicit in alternative() */
- alternative(ASM_NOP3, __stringify(__ASM_STAC), X86_FEATURE_SMAP);
+ alternative("", __stringify(__ASM_STAC), X86_FEATURE_SMAP);
}
/* These macros can be used in asm() statements */
#define ASM_CLAC \
- ALTERNATIVE(ASM_NOP3, __stringify(__ASM_CLAC), X86_FEATURE_SMAP)
+ ALTERNATIVE("", __stringify(__ASM_CLAC), X86_FEATURE_SMAP)
#define ASM_STAC \
- ALTERNATIVE(ASM_NOP3, __stringify(__ASM_STAC), X86_FEATURE_SMAP)
+ ALTERNATIVE("", __stringify(__ASM_STAC), X86_FEATURE_SMAP)
#else /* CONFIG_X86_SMAP */
}
void cpu_disable_common(void);
-void cpu_die_common(unsigned int cpu);
void native_smp_prepare_boot_cpu(void);
void native_smp_prepare_cpus(unsigned int max_cpus);
void native_smp_cpus_done(unsigned int max_cpus);
+void common_cpu_up(unsigned int cpunum, struct task_struct *tidle);
int native_cpu_up(unsigned int cpunum, struct task_struct *tidle);
int native_cpu_disable(void);
+int common_cpu_die(unsigned int cpu);
void native_cpu_die(unsigned int cpu);
void native_play_dead(void);
void play_dead_common(void);
#ifdef __KERNEL__
+#include <asm/nops.h>
+
static inline void native_clts(void)
{
asm volatile("clts");
"+m" (*(volatile char __force *)__p));
}
+static inline void clwb(volatile void *__p)
+{
+ volatile struct { char x[64]; } *p = __p;
+
+ asm volatile(ALTERNATIVE_2(
+ ".byte " __stringify(NOP_DS_PREFIX) "; clflush (%[pax])",
+ ".byte 0x66; clflush (%[pax])", /* clflushopt (%%rax) */
+ X86_FEATURE_CLFLUSHOPT,
+ ".byte 0x66, 0x0f, 0xae, 0x30", /* clwb (%%rax) */
+ X86_FEATURE_CLWB)
+ : [p] "+m" (*p)
+ : [pax] "a" (p));
+}
+
+static inline void pcommit_sfence(void)
+{
+ alternative(ASM_NOP7,
+ ".byte 0x66, 0x0f, 0xae, 0xf8\n\t" /* pcommit */
+ "sfence",
+ X86_FEATURE_PCOMMIT);
+}
+
#define nop() asm volatile ("nop")
#include <asm/percpu.h>
#include <asm/types.h>
+/*
+ * TOP_OF_KERNEL_STACK_PADDING is a number of unused bytes that we
+ * reserve at the top of the kernel stack. We do it because of a nasty
+ * 32-bit corner case. On x86_32, the hardware stack frame is
+ * variable-length. Except for vm86 mode, struct pt_regs assumes a
+ * maximum-length frame. If we enter from CPL 0, the top 8 bytes of
+ * pt_regs don't actually exist. Ordinarily this doesn't matter, but it
+ * does in at least one case:
+ *
+ * If we take an NMI early enough in SYSENTER, then we can end up with
+ * pt_regs that extends above sp0. On the way out, in the espfix code,
+ * we can read the saved SS value, but that value will be above sp0.
+ * Without this offset, that can result in a page fault. (We are
+ * careful that, in this case, the value we read doesn't matter.)
+ *
+ * In vm86 mode, the hardware frame is much longer still, but we neither
+ * access the extra members from NMI context, nor do we write such a
+ * frame at sp0 at all.
+ *
+ * x86_64 has a fixed-length stack frame.
+ */
+#ifdef CONFIG_X86_32
+# define TOP_OF_KERNEL_STACK_PADDING 8
+#else
+# define TOP_OF_KERNEL_STACK_PADDING 0
+#endif
+
/*
* low level task data that entry.S needs immediate access to
* - this struct should fit entirely inside of one cache line
#define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW)
#define STACK_WARN (THREAD_SIZE/8)
-#define KERNEL_STACK_OFFSET (5*(BITS_PER_LONG/8))
/*
* macros/functions for gaining access to the thread information structure
static inline struct thread_info *current_thread_info(void)
{
- struct thread_info *ti;
- ti = (void *)(this_cpu_read_stable(kernel_stack) +
- KERNEL_STACK_OFFSET - THREAD_SIZE);
- return ti;
+ return (struct thread_info *)(current_top_of_stack() - THREAD_SIZE);
}
static inline unsigned long current_stack_pointer(void)
#else /* !__ASSEMBLY__ */
-/* how to get the thread information struct from ASM */
+/* Load thread_info address into "reg" */
#define GET_THREAD_INFO(reg) \
_ASM_MOV PER_CPU_VAR(kernel_stack),reg ; \
- _ASM_SUB $(THREAD_SIZE-KERNEL_STACK_OFFSET),reg ;
+ _ASM_SUB $(THREAD_SIZE),reg ;
/*
- * Same if PER_CPU_VAR(kernel_stack) is, perhaps with some offset, already in
- * a certain register (to be used in assembler memory operands).
+ * ASM operand which evaluates to a 'thread_info' address of
+ * the current task, if it is known that "reg" is exactly "off"
+ * bytes below the top of the stack currently.
+ *
+ * ( The kernel stack's size is known at build time, it is usually
+ * 2 or 4 pages, and the bottom of the kernel stack contains
+ * the thread_info structure. So to access the thread_info very
+ * quickly from assembly code we can calculate down from the
+ * top of the kernel stack to the bottom, using constant,
+ * build-time calculations only. )
+ *
+ * For example, to fetch the current thread_info->flags value into %eax
+ * on x86-64 defconfig kernels, in syscall entry code where RSP is
+ * currently at exactly SIZEOF_PTREGS bytes away from the top of the
+ * stack:
+ *
+ * mov ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS), %eax
+ *
+ * will translate to:
+ *
+ * 8b 84 24 b8 c0 ff ff mov -0x3f48(%rsp), %eax
+ *
+ * which is below the current RSP by almost 16K.
*/
-#define THREAD_INFO(reg, off) KERNEL_STACK_OFFSET+(off)-THREAD_SIZE(reg)
+#define ASM_THREAD_INFO(field, reg, off) ((field)+(off)-THREAD_SIZE)(reg)
#endif
#endif
return false;
}
+
+/*
+ * Force syscall return via IRET by making it look as if there was
+ * some work pending. IRET is our most capable (but slowest) syscall
+ * return path, which is able to restore modified SS, CS and certain
+ * EFLAGS values that other (fast) syscall return instructions
+ * are not able to restore properly.
+ */
+#define force_iret() set_thread_flag(TIF_NOTIFY_RESUME)
+
#endif /* !__ASSEMBLY__ */
#ifndef __ASSEMBLY__
}
unsigned long
-copy_user_handle_tail(char *to, char *from, unsigned len, unsigned zerorest);
+copy_user_handle_tail(char *to, char *from, unsigned len);
#endif /* _ASM_X86_UACCESS_64_H */
/* loadflags */
#define LOADED_HIGH (1<<0)
+#define KASLR_FLAG (1<<1)
#define QUIET_FLAG (1<<5)
#define KEEP_SEGMENTS (1<<6)
#define CAN_USE_HEAP (1<<7)
#define MSR_IA32_PERF_CAPABILITIES 0x00000345
#define MSR_PEBS_LD_LAT_THRESHOLD 0x000003f6
+#define MSR_IA32_RTIT_CTL 0x00000570
+#define RTIT_CTL_TRACEEN BIT(0)
+#define RTIT_CTL_OS BIT(2)
+#define RTIT_CTL_USR BIT(3)
+#define RTIT_CTL_CR3EN BIT(7)
+#define RTIT_CTL_TOPA BIT(8)
+#define RTIT_CTL_TSC_EN BIT(10)
+#define RTIT_CTL_DISRETC BIT(11)
+#define RTIT_CTL_BRANCH_EN BIT(13)
+#define MSR_IA32_RTIT_STATUS 0x00000571
+#define RTIT_STATUS_CONTEXTEN BIT(1)
+#define RTIT_STATUS_TRIGGEREN BIT(2)
+#define RTIT_STATUS_ERROR BIT(4)
+#define RTIT_STATUS_STOPPED BIT(5)
+#define MSR_IA32_RTIT_CR3_MATCH 0x00000572
+#define MSR_IA32_RTIT_OUTPUT_BASE 0x00000560
+#define MSR_IA32_RTIT_OUTPUT_MASK 0x00000561
+
#define MSR_MTRRfix64K_00000 0x00000250
#define MSR_MTRRfix16K_80000 0x00000258
#define MSR_MTRRfix16K_A0000 0x00000259
#else /* __i386__ */
#if defined(__ASSEMBLY__) || defined(__FRAME_OFFSETS)
+/*
+ * C ABI says these regs are callee-preserved. They aren't saved on kernel entry
+ * unless syscall needs a complete, fully filled "struct pt_regs".
+ */
#define R15 0
#define R14 8
#define R13 16
#define R12 24
#define RBP 32
#define RBX 40
-/* arguments: interrupts/non tracing syscalls only save up to here*/
+/* These regs are callee-clobbered. Always saved on kernel entry. */
#define R11 48
#define R10 56
#define R9 64
#define RDX 96
#define RSI 104
#define RDI 112
-#define ORIG_RAX 120 /* = ERROR */
-/* end of arguments */
-/* cpu exception frame or undefined in case of fast syscall. */
+/*
+ * On syscall entry, this is syscall#. On CPU exception, this is error code.
+ * On hw interrupt, it's IRQ number:
+ */
+#define ORIG_RAX 120
+/* Return frame for iretq */
#define RIP 128
#define CS 136
#define EFLAGS 144
#define RSP 152
#define SS 160
-#define ARGOFFSET R11
#endif /* __ASSEMBLY__ */
/* top of stack page */
#ifndef __KERNEL__
struct pt_regs {
+/*
+ * C ABI says these regs are callee-preserved. They aren't saved on kernel entry
+ * unless syscall needs a complete, fully filled "struct pt_regs".
+ */
unsigned long r15;
unsigned long r14;
unsigned long r13;
unsigned long r12;
unsigned long rbp;
unsigned long rbx;
-/* arguments: non interrupts/non tracing syscalls only save up to here*/
+/* These regs are callee-clobbered. Always saved on kernel entry. */
unsigned long r11;
unsigned long r10;
unsigned long r9;
unsigned long rdx;
unsigned long rsi;
unsigned long rdi;
+/*
+ * On syscall entry, this is syscall#. On CPU exception, this is error code.
+ * On hw interrupt, it's IRQ number:
+ */
unsigned long orig_rax;
-/* end of arguments */
-/* cpu exception frame or undefined */
+/* Return frame for iretq */
unsigned long rip;
unsigned long cs;
unsigned long eflags;
__u64 rip;
__u64 eflags; /* RFLAGS */
__u16 cs;
- __u16 gs;
- __u16 fs;
- __u16 __pad0;
+
+ /*
+ * Prior to 2.5.64 ("[PATCH] x86-64 updates for 2.5.64-bk3"),
+ * Linux saved and restored fs and gs in these slots. This
+ * was counterproductive, as fsbase and gsbase were never
+ * saved, so arch_prctl was presumably unreliable.
+ *
+ * If these slots are ever needed for any other purpose, there
+ * is some risk that very old 64-bit binaries could get
+ * confused. I doubt that many such binaries still work,
+ * though, since the same patch in 2.5.64 also removed the
+ * 64-bit set_thread_area syscall, so it appears that there is
+ * no TLS API that works in both pre- and post-2.5.64 kernels.
+ */
+ __u16 __pad2; /* Was gs. */
+ __u16 __pad1; /* Was fs. */
+
+ __u16 ss;
__u64 err;
__u64 trapno;
__u64 oldmask;
#define EXIT_REASON_EPT_VIOLATION 48
#define EXIT_REASON_EPT_MISCONFIG 49
#define EXIT_REASON_INVEPT 50
+#define EXIT_REASON_RDTSCP 51
#define EXIT_REASON_PREEMPTION_TIMER 52
#define EXIT_REASON_INVVPID 53
#define EXIT_REASON_WBINVD 54
obj-$(CONFIG_X86_64) += sys_x86_64.o x8664_ksyms_64.o
obj-$(CONFIG_X86_64) += mcount_64.o
obj-y += syscall_$(BITS).o vsyscall_gtod.o
+obj-$(CONFIG_IA32_EMULATION) += syscall_32.o
obj-$(CONFIG_X86_VSYSCALL_EMULATION) += vsyscall_64.o vsyscall_emu_64.o
obj-$(CONFIG_X86_ESPFIX64) += espfix_64.o
obj-$(CONFIG_SYSFS) += ksysfs.o
__setup("noreplace-paravirt", setup_noreplace_paravirt);
#endif
-#define DPRINTK(fmt, ...) \
-do { \
- if (debug_alternative) \
- printk(KERN_DEBUG fmt, ##__VA_ARGS__); \
+#define DPRINTK(fmt, args...) \
+do { \
+ if (debug_alternative) \
+ printk(KERN_DEBUG "%s: " fmt "\n", __func__, ##args); \
+} while (0)
+
+#define DUMP_BYTES(buf, len, fmt, args...) \
+do { \
+ if (unlikely(debug_alternative)) { \
+ int j; \
+ \
+ if (!(len)) \
+ break; \
+ \
+ printk(KERN_DEBUG fmt, ##args); \
+ for (j = 0; j < (len) - 1; j++) \
+ printk(KERN_CONT "%02hhx ", buf[j]); \
+ printk(KERN_CONT "%02hhx\n", buf[j]); \
+ } \
} while (0)
/*
extern s32 __smp_locks[], __smp_locks_end[];
void *text_poke_early(void *addr, const void *opcode, size_t len);
-/* Replace instructions with better alternatives for this CPU type.
- This runs before SMP is initialized to avoid SMP problems with
- self modifying code. This implies that asymmetric systems where
- APs have less capabilities than the boot processor are not handled.
- Tough. Make sure you disable such features by hand. */
+/*
+ * Are we looking at a near JMP with a 1 or 4-byte displacement.
+ */
+static inline bool is_jmp(const u8 opcode)
+{
+ return opcode == 0xeb || opcode == 0xe9;
+}
+
+static void __init_or_module
+recompute_jump(struct alt_instr *a, u8 *orig_insn, u8 *repl_insn, u8 *insnbuf)
+{
+ u8 *next_rip, *tgt_rip;
+ s32 n_dspl, o_dspl;
+ int repl_len;
+
+ if (a->replacementlen != 5)
+ return;
+
+ o_dspl = *(s32 *)(insnbuf + 1);
+
+ /* next_rip of the replacement JMP */
+ next_rip = repl_insn + a->replacementlen;
+ /* target rip of the replacement JMP */
+ tgt_rip = next_rip + o_dspl;
+ n_dspl = tgt_rip - orig_insn;
+
+ DPRINTK("target RIP: %p, new_displ: 0x%x", tgt_rip, n_dspl);
+
+ if (tgt_rip - orig_insn >= 0) {
+ if (n_dspl - 2 <= 127)
+ goto two_byte_jmp;
+ else
+ goto five_byte_jmp;
+ /* negative offset */
+ } else {
+ if (((n_dspl - 2) & 0xff) == (n_dspl - 2))
+ goto two_byte_jmp;
+ else
+ goto five_byte_jmp;
+ }
+
+two_byte_jmp:
+ n_dspl -= 2;
+
+ insnbuf[0] = 0xeb;
+ insnbuf[1] = (s8)n_dspl;
+ add_nops(insnbuf + 2, 3);
+
+ repl_len = 2;
+ goto done;
+
+five_byte_jmp:
+ n_dspl -= 5;
+
+ insnbuf[0] = 0xe9;
+ *(s32 *)&insnbuf[1] = n_dspl;
+ repl_len = 5;
+
+done:
+
+ DPRINTK("final displ: 0x%08x, JMP 0x%lx",
+ n_dspl, (unsigned long)orig_insn + n_dspl + repl_len);
+}
+
+static void __init_or_module optimize_nops(struct alt_instr *a, u8 *instr)
+{
+ if (instr[0] != 0x90)
+ return;
+
+ add_nops(instr + (a->instrlen - a->padlen), a->padlen);
+
+ DUMP_BYTES(instr, a->instrlen, "%p: [%d:%d) optimized NOPs: ",
+ instr, a->instrlen - a->padlen, a->padlen);
+}
+
+/*
+ * Replace instructions with better alternatives for this CPU type. This runs
+ * before SMP is initialized to avoid SMP problems with self modifying code.
+ * This implies that asymmetric systems where APs have less capabilities than
+ * the boot processor are not handled. Tough. Make sure you disable such
+ * features by hand.
+ */
void __init_or_module apply_alternatives(struct alt_instr *start,
struct alt_instr *end)
{
u8 *instr, *replacement;
u8 insnbuf[MAX_PATCH_LEN];
- DPRINTK("%s: alt table %p -> %p\n", __func__, start, end);
+ DPRINTK("alt table %p -> %p", start, end);
/*
* The scan order should be from start to end. A later scanned
- * alternative code can overwrite a previous scanned alternative code.
+ * alternative code can overwrite previously scanned alternative code.
* Some kernel functions (e.g. memcpy, memset, etc) use this order to
* patch code.
*
* order.
*/
for (a = start; a < end; a++) {
+ int insnbuf_sz = 0;
+
instr = (u8 *)&a->instr_offset + a->instr_offset;
replacement = (u8 *)&a->repl_offset + a->repl_offset;
- BUG_ON(a->replacementlen > a->instrlen);
BUG_ON(a->instrlen > sizeof(insnbuf));
BUG_ON(a->cpuid >= (NCAPINTS + NBUGINTS) * 32);
- if (!boot_cpu_has(a->cpuid))
+ if (!boot_cpu_has(a->cpuid)) {
+ if (a->padlen > 1)
+ optimize_nops(a, instr);
+
continue;
+ }
+
+ DPRINTK("feat: %d*32+%d, old: (%p, len: %d), repl: (%p, len: %d), pad: %d",
+ a->cpuid >> 5,
+ a->cpuid & 0x1f,
+ instr, a->instrlen,
+ replacement, a->replacementlen, a->padlen);
+
+ DUMP_BYTES(instr, a->instrlen, "%p: old_insn: ", instr);
+ DUMP_BYTES(replacement, a->replacementlen, "%p: rpl_insn: ", replacement);
memcpy(insnbuf, replacement, a->replacementlen);
+ insnbuf_sz = a->replacementlen;
/* 0xe8 is a relative jump; fix the offset. */
- if (*insnbuf == 0xe8 && a->replacementlen == 5)
- *(s32 *)(insnbuf + 1) += replacement - instr;
+ if (*insnbuf == 0xe8 && a->replacementlen == 5) {
+ *(s32 *)(insnbuf + 1) += replacement - instr;
+ DPRINTK("Fix CALL offset: 0x%x, CALL 0x%lx",
+ *(s32 *)(insnbuf + 1),
+ (unsigned long)instr + *(s32 *)(insnbuf + 1) + 5);
+ }
+
+ if (a->replacementlen && is_jmp(replacement[0]))
+ recompute_jump(a, instr, replacement, insnbuf);
- add_nops(insnbuf + a->replacementlen,
- a->instrlen - a->replacementlen);
+ if (a->instrlen > a->replacementlen) {
+ add_nops(insnbuf + a->replacementlen,
+ a->instrlen - a->replacementlen);
+ insnbuf_sz += a->instrlen - a->replacementlen;
+ }
+ DUMP_BYTES(insnbuf, insnbuf_sz, "%p: final_insn: ", instr);
- text_poke_early(instr, insnbuf, a->instrlen);
+ text_poke_early(instr, insnbuf, insnbuf_sz);
}
}
#ifdef CONFIG_SMP
-
static void alternatives_smp_lock(const s32 *start, const s32 *end,
u8 *text, u8 *text_end)
{
smp->locks_end = locks_end;
smp->text = text;
smp->text_end = text_end;
- DPRINTK("%s: locks %p -> %p, text %p -> %p, name %s\n",
- __func__, smp->locks, smp->locks_end,
+ DPRINTK("locks %p -> %p, text %p -> %p, name %s\n",
+ smp->locks, smp->locks_end,
smp->text, smp->text_end, smp->name);
list_add_tail(&smp->next, &smp_alt_modules);
return 0;
}
-#endif
+#endif /* CONFIG_SMP */
#ifdef CONFIG_PARAVIRT
void __init_or_module apply_paravirt(struct paravirt_patch_site *start,
if (likely(!bp_patching_in_progress))
return 0;
- if (user_mode_vm(regs) || regs->ip != (unsigned long)bp_int3_addr)
+ if (user_mode(regs) || regs->ip != (unsigned long)bp_int3_addr)
return 0;
/* set up the specified breakpoint handler */
local_irq_restore(flags);
}
-/*
- * This is to verify that we're looking at a real local APIC.
- * Check these against your board if the CPUs aren't getting
- * started for no apparent reason.
- */
-int __init verify_local_APIC(void)
-{
- unsigned int reg0, reg1;
-
- /*
- * The version register is read-only in a real APIC.
- */
- reg0 = apic_read(APIC_LVR);
- apic_printk(APIC_DEBUG, "Getting VERSION: %x\n", reg0);
- apic_write(APIC_LVR, reg0 ^ APIC_LVR_MASK);
- reg1 = apic_read(APIC_LVR);
- apic_printk(APIC_DEBUG, "Getting VERSION: %x\n", reg1);
-
- /*
- * The two version reads above should print the same
- * numbers. If the second one is different, then we
- * poke at a non-APIC.
- */
- if (reg1 != reg0)
- return 0;
-
- /*
- * Check if the version looks reasonably.
- */
- reg1 = GET_APIC_VERSION(reg0);
- if (reg1 == 0x00 || reg1 == 0xff)
- return 0;
- reg1 = lapic_get_maxlvt();
- if (reg1 < 0x02 || reg1 == 0xff)
- return 0;
-
- /*
- * The ID register is read/write in a real APIC.
- */
- reg0 = apic_read(APIC_ID);
- apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg0);
- apic_write(APIC_ID, reg0 ^ apic->apic_id_mask);
- reg1 = apic_read(APIC_ID);
- apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg1);
- apic_write(APIC_ID, reg0);
- if (reg1 != (reg0 ^ apic->apic_id_mask))
- return 0;
-
- /*
- * The next two are just to see if we have sane values.
- * They're only really relevant if we're in Virtual Wire
- * compatibility mode, but most boxes are anymore.
- */
- reg0 = apic_read(APIC_LVT0);
- apic_printk(APIC_DEBUG, "Getting LVT0: %x\n", reg0);
- reg1 = apic_read(APIC_LVT1);
- apic_printk(APIC_DEBUG, "Getting LVT1: %x\n", reg1);
-
- return 1;
-}
-
/**
* sync_Arb_IDs - synchronize APIC bus arbitration IDs
*/
disable_ioapic_support();
default_setup_apic_routing();
- verify_local_APIC();
apic_bsp_setup(true);
return 0;
}
per_cpu(x86_cpu_to_logical_apicid, this_cpu) = apic_read(APIC_LDR);
- __cpu_set(this_cpu, per_cpu(cpus_in_cluster, this_cpu));
+ cpumask_set_cpu(this_cpu, per_cpu(cpus_in_cluster, this_cpu));
for_each_online_cpu(cpu) {
if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu))
continue;
- __cpu_set(this_cpu, per_cpu(cpus_in_cluster, cpu));
- __cpu_set(cpu, per_cpu(cpus_in_cluster, this_cpu));
+ cpumask_set_cpu(this_cpu, per_cpu(cpus_in_cluster, cpu));
+ cpumask_set_cpu(cpu, per_cpu(cpus_in_cluster, this_cpu));
}
}
BUG_ON(!per_cpu(cpus_in_cluster, cpu) || !per_cpu(ipi_mask, cpu));
- __cpu_set(cpu, per_cpu(cpus_in_cluster, cpu));
+ cpumask_set_cpu(cpu, per_cpu(cpus_in_cluster, cpu));
register_hotcpu_notifier(&x2apic_cpu_notifier);
return 1;
}
static int __init uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
{
- int pnodeid, is_uv1, is_uv2, is_uv3;
-
- is_uv1 = !strcmp(oem_id, "SGI");
- is_uv2 = !strcmp(oem_id, "SGI2");
- is_uv3 = !strncmp(oem_id, "SGI3", 4); /* there are varieties of UV3 */
- if (is_uv1 || is_uv2 || is_uv3) {
- uv_hub_info->hub_revision =
- (is_uv1 ? UV1_HUB_REVISION_BASE :
- (is_uv2 ? UV2_HUB_REVISION_BASE :
- UV3_HUB_REVISION_BASE));
- pnodeid = early_get_pnodeid();
- early_get_apic_pnode_shift();
- x86_platform.is_untracked_pat_range = uv_is_untracked_pat_range;
- x86_platform.nmi_init = uv_nmi_init;
- if (!strcmp(oem_table_id, "UVL"))
- uv_system_type = UV_LEGACY_APIC;
- else if (!strcmp(oem_table_id, "UVX"))
- uv_system_type = UV_X2APIC;
- else if (!strcmp(oem_table_id, "UVH")) {
- __this_cpu_write(x2apic_extra_bits,
- pnodeid << uvh_apicid.s.pnode_shift);
- uv_system_type = UV_NON_UNIQUE_APIC;
- uv_set_apicid_hibit();
- return 1;
- }
+ int pnodeid;
+ int uv_apic;
+
+ if (strncmp(oem_id, "SGI", 3) != 0)
+ return 0;
+
+ /*
+ * Determine UV arch type.
+ * SGI: UV100/1000
+ * SGI2: UV2000/3000
+ * SGI3: UV300 (truncated to 4 chars because of different varieties)
+ */
+ uv_hub_info->hub_revision =
+ !strncmp(oem_id, "SGI3", 4) ? UV3_HUB_REVISION_BASE :
+ !strcmp(oem_id, "SGI2") ? UV2_HUB_REVISION_BASE :
+ !strcmp(oem_id, "SGI") ? UV1_HUB_REVISION_BASE : 0;
+
+ if (uv_hub_info->hub_revision == 0)
+ goto badbios;
+
+ pnodeid = early_get_pnodeid();
+ early_get_apic_pnode_shift();
+ x86_platform.is_untracked_pat_range = uv_is_untracked_pat_range;
+ x86_platform.nmi_init = uv_nmi_init;
+
+ if (!strcmp(oem_table_id, "UVX")) { /* most common */
+ uv_system_type = UV_X2APIC;
+ uv_apic = 0;
+
+ } else if (!strcmp(oem_table_id, "UVH")) { /* only UV1 systems */
+ uv_system_type = UV_NON_UNIQUE_APIC;
+ __this_cpu_write(x2apic_extra_bits,
+ pnodeid << uvh_apicid.s.pnode_shift);
+ uv_set_apicid_hibit();
+ uv_apic = 1;
+
+ } else if (!strcmp(oem_table_id, "UVL")) { /* only used for */
+ uv_system_type = UV_LEGACY_APIC; /* very small systems */
+ uv_apic = 0;
+
+ } else {
+ goto badbios;
}
- return 0;
+
+ pr_info("UV: OEM IDs %s/%s, System/HUB Types %d/%d, uv_apic %d\n",
+ oem_id, oem_table_id, uv_system_type,
+ uv_min_hub_revision_id, uv_apic);
+
+ return uv_apic;
+
+badbios:
+ pr_err("UV: OEM_ID:%s OEM_TABLE_ID:%s\n", oem_id, oem_table_id);
+ pr_err("Current BIOS not supported, update kernel and/or BIOS\n");
+ BUG();
}
enum uv_system_type get_uv_system_type(void)
unsigned long mmr_base, present, paddr;
unsigned short pnode_mask;
unsigned char n_lshift;
- char *hub = (is_uv1_hub() ? "UV1" :
- (is_uv2_hub() ? "UV2" :
- "UV3"));
+ char *hub = (is_uv1_hub() ? "UV100/1000" :
+ (is_uv2_hub() ? "UV2000/3000" :
+ (is_uv3_hub() ? "UV300" : NULL)));
+ if (!hub) {
+ pr_err("UV: Unknown/unsupported UV hub\n");
+ return;
+ }
pr_info("UV: Found %s hub\n", hub);
map_low_mmrs();
/* Offset from the sysenter stack to tss.sp0 */
DEFINE(TSS_sysenter_sp0, offsetof(struct tss_struct, x86_tss.sp0) -
- sizeof(struct tss_struct));
+ offsetofend(struct tss_struct, SYSENTER_stack));
#if defined(CONFIG_LGUEST) || defined(CONFIG_LGUEST_GUEST) || defined(CONFIG_LGUEST_MODULE)
BLANK();
#undef ENTRY
OFFSET(TSS_ist, tss_struct, x86_tss.ist);
+ OFFSET(TSS_sp0, tss_struct, x86_tss.sp0);
BLANK();
DEFINE(__NR_syscall_max, sizeof(syscalls_64) - 1);
endif
obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_p6.o perf_event_knc.o perf_event_p4.o
obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_intel_lbr.o perf_event_intel_ds.o perf_event_intel.o
-obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_intel_rapl.o
+obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_intel_rapl.o perf_event_intel_cqm.o
+obj-$(CONFIG_CPU_SUP_INTEL) += perf_event_intel_pt.o perf_event_intel_bts.o
obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += perf_event_intel_uncore.o \
perf_event_intel_uncore_snb.o \
#include <linux/io.h>
#include <linux/sched.h>
+#include <linux/random.h>
#include <asm/processor.h>
#include <asm/apic.h>
#include <asm/cpu.h>
va_align.mask = (upperbit - 1) & PAGE_MASK;
va_align.flags = ALIGN_VA_32 | ALIGN_VA_64;
+
+ /* A random value per boot for bit slice [12:upper_bit) */
+ va_align.bits = get_random_int() & va_align.mask;
}
}
set_cpu_bug(c, X86_BUG_AMD_APIC_C1E);
rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);
+
+ /* 3DNow or LM implies PREFETCHW */
+ if (!cpu_has(c, X86_FEATURE_3DNOWPREFETCH))
+ if (cpu_has(c, X86_FEATURE_3DNOW) || cpu_has(c, X86_FEATURE_LM))
+ set_cpu_cap(c, X86_FEATURE_3DNOWPREFETCH);
}
#ifdef CONFIG_X86_32
c->x86_capability[10] = eax;
}
+ /* Additional Intel-defined flags: level 0x0000000F */
+ if (c->cpuid_level >= 0x0000000F) {
+ u32 eax, ebx, ecx, edx;
+
+ /* QoS sub-leaf, EAX=0Fh, ECX=0 */
+ cpuid_count(0x0000000F, 0, &eax, &ebx, &ecx, &edx);
+ c->x86_capability[11] = edx;
+ if (cpu_has(c, X86_FEATURE_CQM_LLC)) {
+ /* will be overridden if occupancy monitoring exists */
+ c->x86_cache_max_rmid = ebx;
+
+ /* QoS sub-leaf, EAX=0Fh, ECX=1 */
+ cpuid_count(0x0000000F, 1, &eax, &ebx, &ecx, &edx);
+ c->x86_capability[12] = edx;
+ if (cpu_has(c, X86_FEATURE_CQM_OCCUP_LLC)) {
+ c->x86_cache_max_rmid = ecx;
+ c->x86_cache_occ_scale = ebx;
+ }
+ } else {
+ c->x86_cache_max_rmid = -1;
+ c->x86_cache_occ_scale = -1;
+ }
+ }
+
/* AMD-defined flags: level 0x80000001 */
xlvl = cpuid_eax(0x80000000);
c->extended_cpuid_level = xlvl;
detect_nopl(c);
}
+static void x86_init_cache_qos(struct cpuinfo_x86 *c)
+{
+ /*
+ * The heavy lifting of max_rmid and cache_occ_scale are handled
+ * in get_cpu_cap(). Here we just set the max_rmid for the boot_cpu
+ * in case CQM bits really aren't there in this CPU.
+ */
+ if (c != &boot_cpu_data) {
+ boot_cpu_data.x86_cache_max_rmid =
+ min(boot_cpu_data.x86_cache_max_rmid,
+ c->x86_cache_max_rmid);
+ }
+}
+
/*
* This does the hard work of actually picking apart the CPU stuff...
*/
init_hypervisor(c);
x86_init_rdrand(c);
+ x86_init_cache_qos(c);
/*
* Clear/Set all flags overriden by options, need do it
#endif
}
-#ifdef CONFIG_X86_64
-#ifdef CONFIG_IA32_EMULATION
-/* May not be __init: called during resume */
-static void syscall32_cpu_init(void)
-{
- /* Load these always in case some future AMD CPU supports
- SYSENTER from compat mode too. */
- wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)__KERNEL_CS);
- wrmsrl_safe(MSR_IA32_SYSENTER_ESP, 0ULL);
- wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (u64)ia32_sysenter_target);
-
- wrmsrl(MSR_CSTAR, ia32_cstar_target);
-}
-#endif /* CONFIG_IA32_EMULATION */
-#endif /* CONFIG_X86_64 */
-
+/*
+ * Set up the CPU state needed to execute SYSENTER/SYSEXIT instructions
+ * on 32-bit kernels:
+ */
#ifdef CONFIG_X86_32
void enable_sep_cpu(void)
{
- int cpu = get_cpu();
- struct tss_struct *tss = &per_cpu(init_tss, cpu);
+ struct tss_struct *tss;
+ int cpu;
- if (!boot_cpu_has(X86_FEATURE_SEP)) {
- put_cpu();
- return;
- }
+ cpu = get_cpu();
+ tss = &per_cpu(cpu_tss, cpu);
+
+ if (!boot_cpu_has(X86_FEATURE_SEP))
+ goto out;
+
+ /*
+ * We cache MSR_IA32_SYSENTER_CS's value in the TSS's ss1 field --
+ * see the big comment in struct x86_hw_tss's definition.
+ */
tss->x86_tss.ss1 = __KERNEL_CS;
- tss->x86_tss.sp1 = sizeof(struct tss_struct) + (unsigned long) tss;
- wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
- wrmsr(MSR_IA32_SYSENTER_ESP, tss->x86_tss.sp1, 0);
- wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long) ia32_sysenter_target, 0);
+ wrmsr(MSR_IA32_SYSENTER_CS, tss->x86_tss.ss1, 0);
+
+ wrmsr(MSR_IA32_SYSENTER_ESP,
+ (unsigned long)tss + offsetofend(struct tss_struct, SYSENTER_stack),
+ 0);
+
+ wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long)ia32_sysenter_target, 0);
+
+out:
put_cpu();
}
#endif
__setup("clearcpuid=", setup_disablecpuid);
DEFINE_PER_CPU(unsigned long, kernel_stack) =
- (unsigned long)&init_thread_union - KERNEL_STACK_OFFSET + THREAD_SIZE;
+ (unsigned long)&init_thread_union + THREAD_SIZE;
EXPORT_PER_CPU_SYMBOL(kernel_stack);
#ifdef CONFIG_X86_64
irq_stack_union) __aligned(PAGE_SIZE) __visible;
/*
- * The following four percpu variables are hot. Align current_task to
- * cacheline size such that all four fall in the same cacheline.
+ * The following percpu variables are hot. Align current_task to
+ * cacheline size such that they fall in the same cacheline.
*/
DEFINE_PER_CPU(struct task_struct *, current_task) ____cacheline_aligned =
&init_task;
*/
wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 | ((u64)__KERNEL_CS)<<32);
wrmsrl(MSR_LSTAR, system_call);
- wrmsrl(MSR_CSTAR, ignore_sysret);
#ifdef CONFIG_IA32_EMULATION
- syscall32_cpu_init();
+ wrmsrl(MSR_CSTAR, ia32_cstar_target);
+ /*
+ * This only works on Intel CPUs.
+ * On AMD CPUs these MSRs are 32-bit, CPU truncates MSR_IA32_SYSENTER_EIP.
+ * This does not cause SYSENTER to jump to the wrong location, because
+ * AMD doesn't allow SYSENTER in long mode (either 32- or 64-bit).
+ */
+ wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)__KERNEL_CS);
+ wrmsrl_safe(MSR_IA32_SYSENTER_ESP, 0ULL);
+ wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (u64)ia32_sysenter_target);
+#else
+ wrmsrl(MSR_CSTAR, ignore_sysret);
+ wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)GDT_ENTRY_INVALID_SEG);
+ wrmsrl_safe(MSR_IA32_SYSENTER_ESP, 0ULL);
+ wrmsrl_safe(MSR_IA32_SYSENTER_EIP, 0ULL);
#endif
/* Flags to clear on syscall */
EXPORT_PER_CPU_SYMBOL(__preempt_count);
DEFINE_PER_CPU(struct task_struct *, fpu_owner_task);
+/*
+ * On x86_32, vm86 modifies tss.sp0, so sp0 isn't a reliable way to find
+ * the top of the kernel stack. Use an extra percpu variable to track the
+ * top of the kernel stack directly.
+ */
+DEFINE_PER_CPU(unsigned long, cpu_current_top_of_stack) =
+ (unsigned long)&init_thread_union + THREAD_SIZE;
+EXPORT_PER_CPU_SYMBOL(cpu_current_top_of_stack);
+
#ifdef CONFIG_CC_STACKPROTECTOR
DEFINE_PER_CPU_ALIGNED(struct stack_canary, stack_canary);
#endif
*/
load_ucode_ap();
- t = &per_cpu(init_tss, cpu);
+ t = &per_cpu(cpu_tss, cpu);
oist = &per_cpu(orig_ist, cpu);
#ifdef CONFIG_NUMA
{
int cpu = smp_processor_id();
struct task_struct *curr = current;
- struct tss_struct *t = &per_cpu(init_tss, cpu);
+ struct tss_struct *t = &per_cpu(cpu_tss, cpu);
struct thread_struct *thread = &curr->thread;
wait_for_master_cpu(cpu);
* Andi Kleen / Andreas Herrmann : CPUID4 emulation on AMD.
*/
-#include <linux/init.h>
#include <linux/slab.h>
-#include <linux/device.h>
-#include <linux/compiler.h>
+#include <linux/cacheinfo.h>
#include <linux/cpu.h>
#include <linux/sched.h>
+#include <linux/sysfs.h>
#include <linux/pci.h>
#include <asm/processor.h>
-#include <linux/smp.h>
#include <asm/amd_nb.h>
#include <asm/smp.h>
enum _cache_type {
- CACHE_TYPE_NULL = 0,
- CACHE_TYPE_DATA = 1,
- CACHE_TYPE_INST = 2,
- CACHE_TYPE_UNIFIED = 3
+ CTYPE_NULL = 0,
+ CTYPE_DATA = 1,
+ CTYPE_INST = 2,
+ CTYPE_UNIFIED = 3
};
union _cpuid4_leaf_eax {
struct amd_northbridge *nb;
};
-struct _cpuid4_info {
- struct _cpuid4_info_regs base;
- DECLARE_BITMAP(shared_cpu_map, NR_CPUS);
-};
-
unsigned short num_cache_leaves;
/* AMD doesn't have CPUID4. Emulate it here to report the same
static const unsigned char levels[] = { 1, 1, 2, 3 };
static const unsigned char types[] = { 1, 2, 3, 3 };
+static const enum cache_type cache_type_map[] = {
+ [CTYPE_NULL] = CACHE_TYPE_NOCACHE,
+ [CTYPE_DATA] = CACHE_TYPE_DATA,
+ [CTYPE_INST] = CACHE_TYPE_INST,
+ [CTYPE_UNIFIED] = CACHE_TYPE_UNIFIED,
+};
+
static void
amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
union _cpuid4_leaf_ebx *ebx,
(ebx->split.ways_of_associativity + 1) - 1;
}
-struct _cache_attr {
- struct attribute attr;
- ssize_t (*show)(struct _cpuid4_info *, char *, unsigned int);
- ssize_t (*store)(struct _cpuid4_info *, const char *, size_t count,
- unsigned int);
-};
-
#if defined(CONFIG_AMD_NB) && defined(CONFIG_SYSFS)
+
/*
* L3 cache descriptors
*/
l3->indices = (max(max3(sc0, sc1, sc2), sc3) << 10) - 1;
}
-static void amd_init_l3_cache(struct _cpuid4_info_regs *this_leaf, int index)
-{
- int node;
-
- /* only for L3, and not in virtualized environments */
- if (index < 3)
- return;
-
- node = amd_get_nb_id(smp_processor_id());
- this_leaf->nb = node_to_amd_nb(node);
- if (this_leaf->nb && !this_leaf->nb->l3_cache.indices)
- amd_calc_l3_indices(this_leaf->nb);
-}
-
/*
* check whether a slot used for disabling an L3 index is occupied.
* @l3: L3 cache descriptor
return -1;
}
-static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf,
+static ssize_t show_cache_disable(struct cacheinfo *this_leaf, char *buf,
unsigned int slot)
{
int index;
+ struct amd_northbridge *nb = this_leaf->priv;
- if (!this_leaf->base.nb || !amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE))
- return -EINVAL;
-
- index = amd_get_l3_disable_slot(this_leaf->base.nb, slot);
+ index = amd_get_l3_disable_slot(nb, slot);
if (index >= 0)
return sprintf(buf, "%d\n", index);
#define SHOW_CACHE_DISABLE(slot) \
static ssize_t \
-show_cache_disable_##slot(struct _cpuid4_info *this_leaf, char *buf, \
- unsigned int cpu) \
+cache_disable_##slot##_show(struct device *dev, \
+ struct device_attribute *attr, char *buf) \
{ \
+ struct cacheinfo *this_leaf = dev_get_drvdata(dev); \
return show_cache_disable(this_leaf, buf, slot); \
}
SHOW_CACHE_DISABLE(0)
return 0;
}
-static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf,
- const char *buf, size_t count,
- unsigned int slot)
+static ssize_t store_cache_disable(struct cacheinfo *this_leaf,
+ const char *buf, size_t count,
+ unsigned int slot)
{
unsigned long val = 0;
int cpu, err = 0;
+ struct amd_northbridge *nb = this_leaf->priv;
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
- if (!this_leaf->base.nb || !amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE))
- return -EINVAL;
-
- cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));
+ cpu = cpumask_first(&this_leaf->shared_cpu_map);
if (kstrtoul(buf, 10, &val) < 0)
return -EINVAL;
- err = amd_set_l3_disable_slot(this_leaf->base.nb, cpu, slot, val);
+ err = amd_set_l3_disable_slot(nb, cpu, slot, val);
if (err) {
if (err == -EEXIST)
pr_warning("L3 slot %d in use/index already disabled!\n",
#define STORE_CACHE_DISABLE(slot) \
static ssize_t \
-store_cache_disable_##slot(struct _cpuid4_info *this_leaf, \
- const char *buf, size_t count, \
- unsigned int cpu) \
+cache_disable_##slot##_store(struct device *dev, \
+ struct device_attribute *attr, \
+ const char *buf, size_t count) \
{ \
+ struct cacheinfo *this_leaf = dev_get_drvdata(dev); \
return store_cache_disable(this_leaf, buf, count, slot); \
}
STORE_CACHE_DISABLE(0)
STORE_CACHE_DISABLE(1)
-static struct _cache_attr cache_disable_0 = __ATTR(cache_disable_0, 0644,
- show_cache_disable_0, store_cache_disable_0);
-static struct _cache_attr cache_disable_1 = __ATTR(cache_disable_1, 0644,
- show_cache_disable_1, store_cache_disable_1);
-
-static ssize_t
-show_subcaches(struct _cpuid4_info *this_leaf, char *buf, unsigned int cpu)
+static ssize_t subcaches_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
{
- if (!this_leaf->base.nb || !amd_nb_has_feature(AMD_NB_L3_PARTITIONING))
- return -EINVAL;
+ struct cacheinfo *this_leaf = dev_get_drvdata(dev);
+ int cpu = cpumask_first(&this_leaf->shared_cpu_map);
return sprintf(buf, "%x\n", amd_get_subcaches(cpu));
}
-static ssize_t
-store_subcaches(struct _cpuid4_info *this_leaf, const char *buf, size_t count,
- unsigned int cpu)
+static ssize_t subcaches_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
{
+ struct cacheinfo *this_leaf = dev_get_drvdata(dev);
+ int cpu = cpumask_first(&this_leaf->shared_cpu_map);
unsigned long val;
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
- if (!this_leaf->base.nb || !amd_nb_has_feature(AMD_NB_L3_PARTITIONING))
- return -EINVAL;
-
if (kstrtoul(buf, 16, &val) < 0)
return -EINVAL;
return count;
}
-static struct _cache_attr subcaches =
- __ATTR(subcaches, 0644, show_subcaches, store_subcaches);
+static DEVICE_ATTR_RW(cache_disable_0);
+static DEVICE_ATTR_RW(cache_disable_1);
+static DEVICE_ATTR_RW(subcaches);
+
+static umode_t
+cache_private_attrs_is_visible(struct kobject *kobj,
+ struct attribute *attr, int unused)
+{
+ struct device *dev = kobj_to_dev(kobj);
+ struct cacheinfo *this_leaf = dev_get_drvdata(dev);
+ umode_t mode = attr->mode;
+
+ if (!this_leaf->priv)
+ return 0;
+
+ if ((attr == &dev_attr_subcaches.attr) &&
+ amd_nb_has_feature(AMD_NB_L3_PARTITIONING))
+ return mode;
+
+ if ((attr == &dev_attr_cache_disable_0.attr ||
+ attr == &dev_attr_cache_disable_1.attr) &&
+ amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE))
+ return mode;
+
+ return 0;
+}
+
+static struct attribute_group cache_private_group = {
+ .is_visible = cache_private_attrs_is_visible,
+};
+
+static void init_amd_l3_attrs(void)
+{
+ int n = 1;
+ static struct attribute **amd_l3_attrs;
+
+ if (amd_l3_attrs) /* already initialized */
+ return;
+
+ if (amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE))
+ n += 2;
+ if (amd_nb_has_feature(AMD_NB_L3_PARTITIONING))
+ n += 1;
+
+ amd_l3_attrs = kcalloc(n, sizeof(*amd_l3_attrs), GFP_KERNEL);
+ if (!amd_l3_attrs)
+ return;
+
+ n = 0;
+ if (amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE)) {
+ amd_l3_attrs[n++] = &dev_attr_cache_disable_0.attr;
+ amd_l3_attrs[n++] = &dev_attr_cache_disable_1.attr;
+ }
+ if (amd_nb_has_feature(AMD_NB_L3_PARTITIONING))
+ amd_l3_attrs[n++] = &dev_attr_subcaches.attr;
+ cache_private_group.attrs = amd_l3_attrs;
+}
+
+const struct attribute_group *
+cache_get_priv_group(struct cacheinfo *this_leaf)
+{
+ struct amd_northbridge *nb = this_leaf->priv;
+
+ if (this_leaf->level < 3 || !nb)
+ return NULL;
+
+ if (nb && nb->l3_cache.indices)
+ init_amd_l3_attrs();
+
+ return &cache_private_group;
+}
+
+static void amd_init_l3_cache(struct _cpuid4_info_regs *this_leaf, int index)
+{
+ int node;
+
+ /* only for L3, and not in virtualized environments */
+ if (index < 3)
+ return;
+
+ node = amd_get_nb_id(smp_processor_id());
+ this_leaf->nb = node_to_amd_nb(node);
+ if (this_leaf->nb && !this_leaf->nb->l3_cache.indices)
+ amd_calc_l3_indices(this_leaf->nb);
+}
#else
#define amd_init_l3_cache(x, y)
#endif /* CONFIG_AMD_NB && CONFIG_SYSFS */
cpuid_count(4, index, &eax.full, &ebx.full, &ecx.full, &edx);
}
- if (eax.split.type == CACHE_TYPE_NULL)
+ if (eax.split.type == CTYPE_NULL)
return -EIO; /* better error ? */
this_leaf->eax = eax;
/* Do cpuid(op) loop to find out num_cache_leaves */
cpuid_count(op, i, &eax, &ebx, &ecx, &edx);
cache_eax.full = eax;
- } while (cache_eax.split.type != CACHE_TYPE_NULL);
+ } while (cache_eax.split.type != CTYPE_NULL);
return i;
}
switch (this_leaf.eax.split.level) {
case 1:
- if (this_leaf.eax.split.type == CACHE_TYPE_DATA)
+ if (this_leaf.eax.split.type == CTYPE_DATA)
new_l1d = this_leaf.size/1024;
- else if (this_leaf.eax.split.type == CACHE_TYPE_INST)
+ else if (this_leaf.eax.split.type == CTYPE_INST)
new_l1i = this_leaf.size/1024;
break;
case 2:
return l2;
}
-#ifdef CONFIG_SYSFS
-
-/* pointer to _cpuid4_info array (for each cache leaf) */
-static DEFINE_PER_CPU(struct _cpuid4_info *, ici_cpuid4_info);
-#define CPUID4_INFO_IDX(x, y) (&((per_cpu(ici_cpuid4_info, x))[y]))
-
-#ifdef CONFIG_SMP
-
-static int cache_shared_amd_cpu_map_setup(unsigned int cpu, int index)
+static int __cache_amd_cpumap_setup(unsigned int cpu, int index,
+ struct _cpuid4_info_regs *base)
{
- struct _cpuid4_info *this_leaf;
+ struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
+ struct cacheinfo *this_leaf;
int i, sibling;
if (cpu_has_topoext) {
unsigned int apicid, nshared, first, last;
- if (!per_cpu(ici_cpuid4_info, cpu))
- return 0;
-
- this_leaf = CPUID4_INFO_IDX(cpu, index);
- nshared = this_leaf->base.eax.split.num_threads_sharing + 1;
+ this_leaf = this_cpu_ci->info_list + index;
+ nshared = base->eax.split.num_threads_sharing + 1;
apicid = cpu_data(cpu).apicid;
first = apicid - (apicid % nshared);
last = first + nshared - 1;
for_each_online_cpu(i) {
+ this_cpu_ci = get_cpu_cacheinfo(i);
+ if (!this_cpu_ci->info_list)
+ continue;
+
apicid = cpu_data(i).apicid;
if ((apicid < first) || (apicid > last))
continue;
- if (!per_cpu(ici_cpuid4_info, i))
- continue;
- this_leaf = CPUID4_INFO_IDX(i, index);
+
+ this_leaf = this_cpu_ci->info_list + index;
for_each_online_cpu(sibling) {
apicid = cpu_data(sibling).apicid;
if ((apicid < first) || (apicid > last))
continue;
- set_bit(sibling, this_leaf->shared_cpu_map);
+ cpumask_set_cpu(sibling,
+ &this_leaf->shared_cpu_map);
}
}
} else if (index == 3) {
for_each_cpu(i, cpu_llc_shared_mask(cpu)) {
- if (!per_cpu(ici_cpuid4_info, i))
+ this_cpu_ci = get_cpu_cacheinfo(i);
+ if (!this_cpu_ci->info_list)
continue;
- this_leaf = CPUID4_INFO_IDX(i, index);
+ this_leaf = this_cpu_ci->info_list + index;
for_each_cpu(sibling, cpu_llc_shared_mask(cpu)) {
if (!cpu_online(sibling))
continue;
- set_bit(sibling, this_leaf->shared_cpu_map);
+ cpumask_set_cpu(sibling,
+ &this_leaf->shared_cpu_map);
}
}
} else
return 1;
}
-static void cache_shared_cpu_map_setup(unsigned int cpu, int index)
+static void __cache_cpumap_setup(unsigned int cpu, int index,
+ struct _cpuid4_info_regs *base)
{
- struct _cpuid4_info *this_leaf, *sibling_leaf;
+ struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
+ struct cacheinfo *this_leaf, *sibling_leaf;
unsigned long num_threads_sharing;
int index_msb, i;
struct cpuinfo_x86 *c = &cpu_data(cpu);
if (c->x86_vendor == X86_VENDOR_AMD) {
- if (cache_shared_amd_cpu_map_setup(cpu, index))
+ if (__cache_amd_cpumap_setup(cpu, index, base))
return;
}
- this_leaf = CPUID4_INFO_IDX(cpu, index);
- num_threads_sharing = 1 + this_leaf->base.eax.split.num_threads_sharing;
+ this_leaf = this_cpu_ci->info_list + index;
+ num_threads_sharing = 1 + base->eax.split.num_threads_sharing;
+ cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map);
if (num_threads_sharing == 1)
- cpumask_set_cpu(cpu, to_cpumask(this_leaf->shared_cpu_map));
- else {
- index_msb = get_count_order(num_threads_sharing);
-
- for_each_online_cpu(i) {
- if (cpu_data(i).apicid >> index_msb ==
- c->apicid >> index_msb) {
- cpumask_set_cpu(i,
- to_cpumask(this_leaf->shared_cpu_map));
- if (i != cpu && per_cpu(ici_cpuid4_info, i)) {
- sibling_leaf =
- CPUID4_INFO_IDX(i, index);
- cpumask_set_cpu(cpu, to_cpumask(
- sibling_leaf->shared_cpu_map));
- }
- }
- }
- }
-}
-static void cache_remove_shared_cpu_map(unsigned int cpu, int index)
-{
- struct _cpuid4_info *this_leaf, *sibling_leaf;
- int sibling;
-
- this_leaf = CPUID4_INFO_IDX(cpu, index);
- for_each_cpu(sibling, to_cpumask(this_leaf->shared_cpu_map)) {
- sibling_leaf = CPUID4_INFO_IDX(sibling, index);
- cpumask_clear_cpu(cpu,
- to_cpumask(sibling_leaf->shared_cpu_map));
- }
-}
-#else
-static void cache_shared_cpu_map_setup(unsigned int cpu, int index)
-{
-}
-
-static void cache_remove_shared_cpu_map(unsigned int cpu, int index)
-{
-}
-#endif
-
-static void free_cache_attributes(unsigned int cpu)
-{
- int i;
-
- for (i = 0; i < num_cache_leaves; i++)
- cache_remove_shared_cpu_map(cpu, i);
-
- kfree(per_cpu(ici_cpuid4_info, cpu));
- per_cpu(ici_cpuid4_info, cpu) = NULL;
-}
-
-static void get_cpu_leaves(void *_retval)
-{
- int j, *retval = _retval, cpu = smp_processor_id();
+ return;
- /* Do cpuid and store the results */
- for (j = 0; j < num_cache_leaves; j++) {
- struct _cpuid4_info *this_leaf = CPUID4_INFO_IDX(cpu, j);
+ index_msb = get_count_order(num_threads_sharing);
- *retval = cpuid4_cache_lookup_regs(j, &this_leaf->base);
- if (unlikely(*retval < 0)) {
- int i;
+ for_each_online_cpu(i)
+ if (cpu_data(i).apicid >> index_msb == c->apicid >> index_msb) {
+ struct cpu_cacheinfo *sib_cpu_ci = get_cpu_cacheinfo(i);
- for (i = 0; i < j; i++)
- cache_remove_shared_cpu_map(cpu, i);
- break;
+ if (i == cpu || !sib_cpu_ci->info_list)
+ continue;/* skip if itself or no cacheinfo */
+ sibling_leaf = sib_cpu_ci->info_list + index;
+ cpumask_set_cpu(i, &this_leaf->shared_cpu_map);
+ cpumask_set_cpu(cpu, &sibling_leaf->shared_cpu_map);
}
- cache_shared_cpu_map_setup(cpu, j);
- }
}
-static int detect_cache_attributes(unsigned int cpu)
+static void ci_leaf_init(struct cacheinfo *this_leaf,
+ struct _cpuid4_info_regs *base)
{
- int retval;
-
- if (num_cache_leaves == 0)
- return -ENOENT;
-
- per_cpu(ici_cpuid4_info, cpu) = kzalloc(
- sizeof(struct _cpuid4_info) * num_cache_leaves, GFP_KERNEL);
- if (per_cpu(ici_cpuid4_info, cpu) == NULL)
- return -ENOMEM;
-
- smp_call_function_single(cpu, get_cpu_leaves, &retval, true);
- if (retval) {
- kfree(per_cpu(ici_cpuid4_info, cpu));
- per_cpu(ici_cpuid4_info, cpu) = NULL;
- }
-
- return retval;
+ this_leaf->level = base->eax.split.level;
+ this_leaf->type = cache_type_map[base->eax.split.type];
+ this_leaf->coherency_line_size =
+ base->ebx.split.coherency_line_size + 1;
+ this_leaf->ways_of_associativity =
+ base->ebx.split.ways_of_associativity + 1;
+ this_leaf->size = base->size;
+ this_leaf->number_of_sets = base->ecx.split.number_of_sets + 1;
+ this_leaf->physical_line_partition =
+ base->ebx.split.physical_line_partition + 1;
+ this_leaf->priv = base->nb;
}
-#include <linux/kobject.h>
-#include <linux/sysfs.h>
-#include <linux/cpu.h>
-
-/* pointer to kobject for cpuX/cache */
-static DEFINE_PER_CPU(struct kobject *, ici_cache_kobject);
-
-struct _index_kobject {
- struct kobject kobj;
- unsigned int cpu;
- unsigned short index;
-};
-
-/* pointer to array of kobjects for cpuX/cache/indexY */
-static DEFINE_PER_CPU(struct _index_kobject *, ici_index_kobject);
-#define INDEX_KOBJECT_PTR(x, y) (&((per_cpu(ici_index_kobject, x))[y]))
-
-#define show_one_plus(file_name, object, val) \
-static ssize_t show_##file_name(struct _cpuid4_info *this_leaf, char *buf, \
- unsigned int cpu) \
-{ \
- return sprintf(buf, "%lu\n", (unsigned long)this_leaf->object + val); \
-}
-
-show_one_plus(level, base.eax.split.level, 0);
-show_one_plus(coherency_line_size, base.ebx.split.coherency_line_size, 1);
-show_one_plus(physical_line_partition, base.ebx.split.physical_line_partition, 1);
-show_one_plus(ways_of_associativity, base.ebx.split.ways_of_associativity, 1);
-show_one_plus(number_of_sets, base.ecx.split.number_of_sets, 1);
-
-static ssize_t show_size(struct _cpuid4_info *this_leaf, char *buf,
- unsigned int cpu)
-{
- return sprintf(buf, "%luK\n", this_leaf->base.size / 1024);
-}
-
-static ssize_t show_shared_cpu_map_func(struct _cpuid4_info *this_leaf,
- int type, char *buf)
-{
- const struct cpumask *mask = to_cpumask(this_leaf->shared_cpu_map);
- int ret;
-
- if (type)
- ret = scnprintf(buf, PAGE_SIZE - 1, "%*pbl",
- cpumask_pr_args(mask));
- else
- ret = scnprintf(buf, PAGE_SIZE - 1, "%*pb",
- cpumask_pr_args(mask));
- buf[ret++] = '\n';
- buf[ret] = '\0';
- return ret;
-}
-
-static inline ssize_t show_shared_cpu_map(struct _cpuid4_info *leaf, char *buf,
- unsigned int cpu)
+static int __init_cache_level(unsigned int cpu)
{
- return show_shared_cpu_map_func(leaf, 0, buf);
-}
-
-static inline ssize_t show_shared_cpu_list(struct _cpuid4_info *leaf, char *buf,
- unsigned int cpu)
-{
- return show_shared_cpu_map_func(leaf, 1, buf);
-}
+ struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
-static ssize_t show_type(struct _cpuid4_info *this_leaf, char *buf,
- unsigned int cpu)
-{
- switch (this_leaf->base.eax.split.type) {
- case CACHE_TYPE_DATA:
- return sprintf(buf, "Data\n");
- case CACHE_TYPE_INST:
- return sprintf(buf, "Instruction\n");
- case CACHE_TYPE_UNIFIED:
- return sprintf(buf, "Unified\n");
- default:
- return sprintf(buf, "Unknown\n");
- }
-}
-
-#define to_object(k) container_of(k, struct _index_kobject, kobj)
-#define to_attr(a) container_of(a, struct _cache_attr, attr)
-
-#define define_one_ro(_name) \
-static struct _cache_attr _name = \
- __ATTR(_name, 0444, show_##_name, NULL)
-
-define_one_ro(level);
-define_one_ro(type);
-define_one_ro(coherency_line_size);
-define_one_ro(physical_line_partition);
-define_one_ro(ways_of_associativity);
-define_one_ro(number_of_sets);
-define_one_ro(size);
-define_one_ro(shared_cpu_map);
-define_one_ro(shared_cpu_list);
-
-static struct attribute *default_attrs[] = {
- &type.attr,
- &level.attr,
- &coherency_line_size.attr,
- &physical_line_partition.attr,
- &ways_of_associativity.attr,
- &number_of_sets.attr,
- &size.attr,
- &shared_cpu_map.attr,
- &shared_cpu_list.attr,
- NULL
-};
-
-#ifdef CONFIG_AMD_NB
-static struct attribute **amd_l3_attrs(void)
-{
- static struct attribute **attrs;
- int n;
-
- if (attrs)
- return attrs;
-
- n = ARRAY_SIZE(default_attrs);
-
- if (amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE))
- n += 2;
-
- if (amd_nb_has_feature(AMD_NB_L3_PARTITIONING))
- n += 1;
-
- attrs = kzalloc(n * sizeof (struct attribute *), GFP_KERNEL);
- if (attrs == NULL)
- return attrs = default_attrs;
-
- for (n = 0; default_attrs[n]; n++)
- attrs[n] = default_attrs[n];
-
- if (amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE)) {
- attrs[n++] = &cache_disable_0.attr;
- attrs[n++] = &cache_disable_1.attr;
- }
-
- if (amd_nb_has_feature(AMD_NB_L3_PARTITIONING))
- attrs[n++] = &subcaches.attr;
-
- return attrs;
-}
-#endif
-
-static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)
-{
- struct _cache_attr *fattr = to_attr(attr);
- struct _index_kobject *this_leaf = to_object(kobj);
- ssize_t ret;
-
- ret = fattr->show ?
- fattr->show(CPUID4_INFO_IDX(this_leaf->cpu, this_leaf->index),
- buf, this_leaf->cpu) :
- 0;
- return ret;
-}
-
-static ssize_t store(struct kobject *kobj, struct attribute *attr,
- const char *buf, size_t count)
-{
- struct _cache_attr *fattr = to_attr(attr);
- struct _index_kobject *this_leaf = to_object(kobj);
- ssize_t ret;
-
- ret = fattr->store ?
- fattr->store(CPUID4_INFO_IDX(this_leaf->cpu, this_leaf->index),
- buf, count, this_leaf->cpu) :
- 0;
- return ret;
-}
-
-static const struct sysfs_ops sysfs_ops = {
- .show = show,
- .store = store,
-};
-
-static struct kobj_type ktype_cache = {
- .sysfs_ops = &sysfs_ops,
- .default_attrs = default_attrs,
-};
-
-static struct kobj_type ktype_percpu_entry = {
- .sysfs_ops = &sysfs_ops,
-};
-
-static void cpuid4_cache_sysfs_exit(unsigned int cpu)
-{
- kfree(per_cpu(ici_cache_kobject, cpu));
- kfree(per_cpu(ici_index_kobject, cpu));
- per_cpu(ici_cache_kobject, cpu) = NULL;
- per_cpu(ici_index_kobject, cpu) = NULL;
- free_cache_attributes(cpu);
-}
-
-static int cpuid4_cache_sysfs_init(unsigned int cpu)
-{
- int err;
-
- if (num_cache_leaves == 0)
+ if (!num_cache_leaves)
return -ENOENT;
-
- err = detect_cache_attributes(cpu);
- if (err)
- return err;
-
- /* Allocate all required memory */
- per_cpu(ici_cache_kobject, cpu) =
- kzalloc(sizeof(struct kobject), GFP_KERNEL);
- if (unlikely(per_cpu(ici_cache_kobject, cpu) == NULL))
- goto err_out;
-
- per_cpu(ici_index_kobject, cpu) = kzalloc(
- sizeof(struct _index_kobject) * num_cache_leaves, GFP_KERNEL);
- if (unlikely(per_cpu(ici_index_kobject, cpu) == NULL))
- goto err_out;
-
+ if (!this_cpu_ci)
+ return -EINVAL;
+ this_cpu_ci->num_levels = 3;
+ this_cpu_ci->num_leaves = num_cache_leaves;
return 0;
-
-err_out:
- cpuid4_cache_sysfs_exit(cpu);
- return -ENOMEM;
}
-static DECLARE_BITMAP(cache_dev_map, NR_CPUS);
-
-/* Add/Remove cache interface for CPU device */
-static int cache_add_dev(struct device *dev)
+static int __populate_cache_leaves(unsigned int cpu)
{
- unsigned int cpu = dev->id;
- unsigned long i, j;
- struct _index_kobject *this_object;
- struct _cpuid4_info *this_leaf;
- int retval;
-
- retval = cpuid4_cache_sysfs_init(cpu);
- if (unlikely(retval < 0))
- return retval;
-
- retval = kobject_init_and_add(per_cpu(ici_cache_kobject, cpu),
- &ktype_percpu_entry,
- &dev->kobj, "%s", "cache");
- if (retval < 0) {
- cpuid4_cache_sysfs_exit(cpu);
- return retval;
- }
+ unsigned int idx, ret;
+ struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
+ struct cacheinfo *this_leaf = this_cpu_ci->info_list;
+ struct _cpuid4_info_regs id4_regs = {};
- for (i = 0; i < num_cache_leaves; i++) {
- this_object = INDEX_KOBJECT_PTR(cpu, i);
- this_object->cpu = cpu;
- this_object->index = i;
-
- this_leaf = CPUID4_INFO_IDX(cpu, i);
-
- ktype_cache.default_attrs = default_attrs;
-#ifdef CONFIG_AMD_NB
- if (this_leaf->base.nb)
- ktype_cache.default_attrs = amd_l3_attrs();
-#endif
- retval = kobject_init_and_add(&(this_object->kobj),
- &ktype_cache,
- per_cpu(ici_cache_kobject, cpu),
- "index%1lu", i);
- if (unlikely(retval)) {
- for (j = 0; j < i; j++)
- kobject_put(&(INDEX_KOBJECT_PTR(cpu, j)->kobj));
- kobject_put(per_cpu(ici_cache_kobject, cpu));
- cpuid4_cache_sysfs_exit(cpu);
- return retval;
- }
- kobject_uevent(&(this_object->kobj), KOBJ_ADD);
+ for (idx = 0; idx < this_cpu_ci->num_leaves; idx++) {
+ ret = cpuid4_cache_lookup_regs(idx, &id4_regs);
+ if (ret)
+ return ret;
+ ci_leaf_init(this_leaf++, &id4_regs);
+ __cache_cpumap_setup(cpu, idx, &id4_regs);
}
- cpumask_set_cpu(cpu, to_cpumask(cache_dev_map));
-
- kobject_uevent(per_cpu(ici_cache_kobject, cpu), KOBJ_ADD);
return 0;
}
-static void cache_remove_dev(struct device *dev)
-{
- unsigned int cpu = dev->id;
- unsigned long i;
-
- if (per_cpu(ici_cpuid4_info, cpu) == NULL)
- return;
- if (!cpumask_test_cpu(cpu, to_cpumask(cache_dev_map)))
- return;
- cpumask_clear_cpu(cpu, to_cpumask(cache_dev_map));
-
- for (i = 0; i < num_cache_leaves; i++)
- kobject_put(&(INDEX_KOBJECT_PTR(cpu, i)->kobj));
- kobject_put(per_cpu(ici_cache_kobject, cpu));
- cpuid4_cache_sysfs_exit(cpu);
-}
-
-static int cacheinfo_cpu_callback(struct notifier_block *nfb,
- unsigned long action, void *hcpu)
-{
- unsigned int cpu = (unsigned long)hcpu;
- struct device *dev;
-
- dev = get_cpu_device(cpu);
- switch (action) {
- case CPU_ONLINE:
- case CPU_ONLINE_FROZEN:
- cache_add_dev(dev);
- break;
- case CPU_DEAD:
- case CPU_DEAD_FROZEN:
- cache_remove_dev(dev);
- break;
- }
- return NOTIFY_OK;
-}
-
-static struct notifier_block cacheinfo_cpu_notifier = {
- .notifier_call = cacheinfo_cpu_callback,
-};
-
-static int __init cache_sysfs_init(void)
-{
- int i, err = 0;
-
- if (num_cache_leaves == 0)
- return 0;
-
- cpu_notifier_register_begin();
- for_each_online_cpu(i) {
- struct device *dev = get_cpu_device(i);
-
- err = cache_add_dev(dev);
- if (err)
- goto out;
- }
- __register_hotcpu_notifier(&cacheinfo_cpu_notifier);
-
-out:
- cpu_notifier_register_done();
- return err;
-}
-
-device_initcall(cache_sysfs_init);
-
-#endif
+DEFINE_SMP_CALL_CACHE_FUNCTION(init_cache_level)
+DEFINE_SMP_CALL_CACHE_FUNCTION(populate_cache_leaves)
--- /dev/null
+/*
+ * Intel(R) Processor Trace PMU driver for perf
+ * Copyright (c) 2013-2014, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * Intel PT is specified in the Intel Architecture Instruction Set Extensions
+ * Programming Reference:
+ * http://software.intel.com/en-us/intel-isa-extensions
+ */
+
+#ifndef __INTEL_PT_H__
+#define __INTEL_PT_H__
+
+/*
+ * Single-entry ToPA: when this close to region boundary, switch
+ * buffers to avoid losing data.
+ */
+#define TOPA_PMI_MARGIN 512
+
+/*
+ * Table of Physical Addresses bits
+ */
+enum topa_sz {
+ TOPA_4K = 0,
+ TOPA_8K,
+ TOPA_16K,
+ TOPA_32K,
+ TOPA_64K,
+ TOPA_128K,
+ TOPA_256K,
+ TOPA_512K,
+ TOPA_1MB,
+ TOPA_2MB,
+ TOPA_4MB,
+ TOPA_8MB,
+ TOPA_16MB,
+ TOPA_32MB,
+ TOPA_64MB,
+ TOPA_128MB,
+ TOPA_SZ_END,
+};
+
+static inline unsigned int sizes(enum topa_sz tsz)
+{
+ return 1 << (tsz + 12);
+};
+
+struct topa_entry {
+ u64 end : 1;
+ u64 rsvd0 : 1;
+ u64 intr : 1;
+ u64 rsvd1 : 1;
+ u64 stop : 1;
+ u64 rsvd2 : 1;
+ u64 size : 4;
+ u64 rsvd3 : 2;
+ u64 base : 36;
+ u64 rsvd4 : 16;
+};
+
+#define TOPA_SHIFT 12
+#define PT_CPUID_LEAVES 2
+
+enum pt_capabilities {
+ PT_CAP_max_subleaf = 0,
+ PT_CAP_cr3_filtering,
+ PT_CAP_topa_output,
+ PT_CAP_topa_multiple_entries,
+ PT_CAP_payloads_lip,
+};
+
+struct pt_pmu {
+ struct pmu pmu;
+ u32 caps[4 * PT_CPUID_LEAVES];
+};
+
+/**
+ * struct pt_buffer - buffer configuration; one buffer per task_struct or
+ * cpu, depending on perf event configuration
+ * @cpu: cpu for per-cpu allocation
+ * @tables: list of ToPA tables in this buffer
+ * @first: shorthand for first topa table
+ * @last: shorthand for last topa table
+ * @cur: current topa table
+ * @nr_pages: buffer size in pages
+ * @cur_idx: current output region's index within @cur table
+ * @output_off: offset within the current output region
+ * @data_size: running total of the amount of data in this buffer
+ * @lost: if data was lost/truncated
+ * @head: logical write offset inside the buffer
+ * @snapshot: if this is for a snapshot/overwrite counter
+ * @stop_pos: STOP topa entry in the buffer
+ * @intr_pos: INT topa entry in the buffer
+ * @data_pages: array of pages from perf
+ * @topa_index: table of topa entries indexed by page offset
+ */
+struct pt_buffer {
+ int cpu;
+ struct list_head tables;
+ struct topa *first, *last, *cur;
+ unsigned int cur_idx;
+ size_t output_off;
+ unsigned long nr_pages;
+ local_t data_size;
+ local_t lost;
+ local64_t head;
+ bool snapshot;
+ unsigned long stop_pos, intr_pos;
+ void **data_pages;
+ struct topa_entry *topa_index[0];
+};
+
+/**
+ * struct pt - per-cpu pt context
+ * @handle: perf output handle
+ * @handle_nmi: do handle PT PMI on this cpu, there's an active event
+ */
+struct pt {
+ struct perf_output_handle handle;
+ int handle_nmi;
+};
+
+#endif /* __INTEL_PT_H__ */
};
#define ATTR_LEN 16
+#define INITIAL_CHECK_INTERVAL 5 * 60 /* 5 minutes */
/* One object for each MCE bank, shared by all CPUs */
struct mce_bank {
char attrname[ATTR_LEN]; /* attribute name */
};
-int mce_severity(struct mce *a, int tolerant, char **msg, bool is_excp);
+extern int (*mce_severity)(struct mce *a, int tolerant, char **msg, bool is_excp);
struct dentry *mce_get_debugfs_dir(void);
extern struct mce_bank *mce_banks;
extern mce_banks_t mce_banks_ce_disabled;
#ifdef CONFIG_X86_MCE_INTEL
-unsigned long mce_intel_adjust_timer(unsigned long interval);
-void mce_intel_cmci_poll(void);
+unsigned long cmci_intel_adjust_timer(unsigned long interval);
+bool mce_intel_cmci_poll(void);
void mce_intel_hcpu_update(unsigned long cpu);
void cmci_disable_bank(int bank);
#else
-# define mce_intel_adjust_timer mce_adjust_timer_default
-static inline void mce_intel_cmci_poll(void) { }
+# define cmci_intel_adjust_timer mce_adjust_timer_default
+static inline bool mce_intel_cmci_poll(void) { return false; }
static inline void mce_intel_hcpu_update(unsigned long cpu) { }
static inline void cmci_disable_bank(int bank) { }
#endif
return ((m->cs & 3) == 3) ? IN_USER : IN_KERNEL;
}
-int mce_severity(struct mce *m, int tolerant, char **msg, bool is_excp)
+/*
+ * See AMD Error Scope Hierarchy table in a newer BKDG. For example
+ * 49125_15h_Models_30h-3Fh_BKDG.pdf, section "RAS Features"
+ */
+static int mce_severity_amd(struct mce *m, int tolerant, char **msg, bool is_excp)
+{
+ enum context ctx = error_context(m);
+
+ /* Processor Context Corrupt, no need to fumble too much, die! */
+ if (m->status & MCI_STATUS_PCC)
+ return MCE_PANIC_SEVERITY;
+
+ if (m->status & MCI_STATUS_UC) {
+
+ /*
+ * On older systems where overflow_recov flag is not present, we
+ * should simply panic if an error overflow occurs. If
+ * overflow_recov flag is present and set, then software can try
+ * to at least kill process to prolong system operation.
+ */
+ if (mce_flags.overflow_recov) {
+ /* software can try to contain */
+ if (!(m->mcgstatus & MCG_STATUS_RIPV) && (ctx == IN_KERNEL))
+ return MCE_PANIC_SEVERITY;
+
+ /* kill current process */
+ return MCE_AR_SEVERITY;
+ } else {
+ /* at least one error was not logged */
+ if (m->status & MCI_STATUS_OVER)
+ return MCE_PANIC_SEVERITY;
+ }
+
+ /*
+ * For any other case, return MCE_UC_SEVERITY so that we log the
+ * error and exit #MC handler.
+ */
+ return MCE_UC_SEVERITY;
+ }
+
+ /*
+ * deferred error: poll handler catches these and adds to mce_ring so
+ * memory-failure can take recovery actions.
+ */
+ if (m->status & MCI_STATUS_DEFERRED)
+ return MCE_DEFERRED_SEVERITY;
+
+ /*
+ * corrected error: poll handler catches these and passes responsibility
+ * of decoding the error to EDAC
+ */
+ return MCE_KEEP_SEVERITY;
+}
+
+static int mce_severity_intel(struct mce *m, int tolerant, char **msg, bool is_excp)
{
enum exception excp = (is_excp ? EXCP_CONTEXT : NO_EXCP);
enum context ctx = error_context(m);
}
}
+/* Default to mce_severity_intel */
+int (*mce_severity)(struct mce *m, int tolerant, char **msg, bool is_excp) =
+ mce_severity_intel;
+
+void __init mcheck_vendor_init_severity(void)
+{
+ if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
+ mce_severity = mce_severity_amd;
+}
+
#ifdef CONFIG_DEBUG_FS
static void *s_start(struct seq_file *f, loff_t *pos)
{
#define CREATE_TRACE_POINTS
#include <trace/events/mce.h>
-#define SPINUNIT 100 /* 100ns */
+#define SPINUNIT 100 /* 100ns */
DEFINE_PER_CPU(unsigned, mce_exception_count);
struct mce_bank *mce_banks __read_mostly;
+struct mce_vendor_flags mce_flags __read_mostly;
struct mca_config mca_cfg __read_mostly = {
.bootlog = -1,
static DEFINE_PER_CPU(struct mce, mces_seen);
static int cpu_missing;
-/* CMCI storm detection filter */
-static DEFINE_PER_CPU(unsigned long, mce_polled_error);
-
/*
* MCA banks polled by the period polling timer for corrected events.
* With Intel CMCI, this only has MCA banks which do not support CMCI (if any).
* is already totally * confused. In this case it's likely it will
* not fully execute the machine check handler either.
*/
-void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
+bool machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
{
+ bool error_logged = false;
struct mce m;
int severity;
int i;
if (!(m.status & MCI_STATUS_VAL))
continue;
- this_cpu_write(mce_polled_error, 1);
+
/*
* Uncorrected or signalled events are handled by the exception
* handler when it is enabled, so don't process those here.
* Don't get the IP here because it's unlikely to
* have anything to do with the actual error location.
*/
- if (!(flags & MCP_DONTLOG) && !mca_cfg.dont_log_ce)
+ if (!(flags & MCP_DONTLOG) && !mca_cfg.dont_log_ce) {
+ error_logged = true;
mce_log(&m);
+ }
/*
* Clear state for this bank.
*/
sync_core();
+
+ return error_logged;
}
EXPORT_SYMBOL_GPL(machine_check_poll);
* other CPUs.
*/
if (m && global_worst >= MCE_PANIC_SEVERITY && mca_cfg.tolerant < 3)
- mce_panic("Fatal Machine check", m, msg);
+ mce_panic("Fatal machine check", m, msg);
/*
* For UC somewhere we let the CPU who detects it handle it.
* source or one CPU is hung. Panic.
*/
if (global_worst <= MCE_KEEP_SEVERITY && mca_cfg.tolerant < 3)
- mce_panic("Machine check from unknown source", NULL, NULL);
+ mce_panic("Fatal machine check from unknown source", NULL, NULL);
/*
* Now clear all the mces_seen so that they don't reappear on
* poller finds an MCE, poll 2x faster. When the poller finds no more
* errors, poll 2x slower (up to check_interval seconds).
*/
-static unsigned long check_interval = 5 * 60; /* 5 minutes */
+static unsigned long check_interval = INITIAL_CHECK_INTERVAL;
static DEFINE_PER_CPU(unsigned long, mce_next_interval); /* in jiffies */
static DEFINE_PER_CPU(struct timer_list, mce_timer);
return interval;
}
-static unsigned long (*mce_adjust_timer)(unsigned long interval) =
- mce_adjust_timer_default;
+static unsigned long (*mce_adjust_timer)(unsigned long interval) = mce_adjust_timer_default;
-static int cmc_error_seen(void)
+static void __restart_timer(struct timer_list *t, unsigned long interval)
{
- unsigned long *v = this_cpu_ptr(&mce_polled_error);
+ unsigned long when = jiffies + interval;
+ unsigned long flags;
+
+ local_irq_save(flags);
- return test_and_clear_bit(0, v);
+ if (timer_pending(t)) {
+ if (time_before(when, t->expires))
+ mod_timer_pinned(t, when);
+ } else {
+ t->expires = round_jiffies(when);
+ add_timer_on(t, smp_processor_id());
+ }
+
+ local_irq_restore(flags);
}
static void mce_timer_fn(unsigned long data)
{
struct timer_list *t = this_cpu_ptr(&mce_timer);
+ int cpu = smp_processor_id();
unsigned long iv;
- int notify;
- WARN_ON(smp_processor_id() != data);
+ WARN_ON(cpu != data);
+
+ iv = __this_cpu_read(mce_next_interval);
if (mce_available(this_cpu_ptr(&cpu_info))) {
- machine_check_poll(MCP_TIMESTAMP,
- this_cpu_ptr(&mce_poll_banks));
- mce_intel_cmci_poll();
+ machine_check_poll(MCP_TIMESTAMP, this_cpu_ptr(&mce_poll_banks));
+
+ if (mce_intel_cmci_poll()) {
+ iv = mce_adjust_timer(iv);
+ goto done;
+ }
}
/*
- * Alert userspace if needed. If we logged an MCE, reduce the
- * polling interval, otherwise increase the polling interval.
+ * Alert userspace if needed. If we logged an MCE, reduce the polling
+ * interval, otherwise increase the polling interval.
*/
- iv = __this_cpu_read(mce_next_interval);
- notify = mce_notify_irq();
- notify |= cmc_error_seen();
- if (notify) {
+ if (mce_notify_irq())
iv = max(iv / 2, (unsigned long) HZ/100);
- } else {
+ else
iv = min(iv * 2, round_jiffies_relative(check_interval * HZ));
- iv = mce_adjust_timer(iv);
- }
+
+done:
__this_cpu_write(mce_next_interval, iv);
- /* Might have become 0 after CMCI storm subsided */
- if (iv) {
- t->expires = jiffies + iv;
- add_timer_on(t, smp_processor_id());
- }
+ __restart_timer(t, iv);
}
/*
void mce_timer_kick(unsigned long interval)
{
struct timer_list *t = this_cpu_ptr(&mce_timer);
- unsigned long when = jiffies + interval;
unsigned long iv = __this_cpu_read(mce_next_interval);
- if (timer_pending(t)) {
- if (time_before(when, t->expires))
- mod_timer_pinned(t, when);
- } else {
- t->expires = round_jiffies(when);
- add_timer_on(t, smp_processor_id());
- }
+ __restart_timer(t, interval);
+
if (interval < iv)
__this_cpu_write(mce_next_interval, interval);
}
* Various K7s with broken bank 0 around. Always disable
* by default.
*/
- if (c->x86 == 6 && cfg->banks > 0)
+ if (c->x86 == 6 && cfg->banks > 0)
mce_banks[0].ctl = 0;
- /*
- * Turn off MC4_MISC thresholding banks on those models since
- * they're not supported there.
- */
- if (c->x86 == 0x15 &&
- (c->x86_model >= 0x10 && c->x86_model <= 0x1f)) {
- int i;
- u64 val, hwcr;
- bool need_toggle;
- u32 msrs[] = {
+ /*
+ * overflow_recov is supported for F15h Models 00h-0fh
+ * even though we don't have a CPUID bit for it.
+ */
+ if (c->x86 == 0x15 && c->x86_model <= 0xf)
+ mce_flags.overflow_recov = 1;
+
+ /*
+ * Turn off MC4_MISC thresholding banks on those models since
+ * they're not supported there.
+ */
+ if (c->x86 == 0x15 &&
+ (c->x86_model >= 0x10 && c->x86_model <= 0x1f)) {
+ int i;
+ u64 hwcr;
+ bool need_toggle;
+ u32 msrs[] = {
0x00000413, /* MC4_MISC0 */
0xc0000408, /* MC4_MISC1 */
- };
+ };
- rdmsrl(MSR_K7_HWCR, hwcr);
+ rdmsrl(MSR_K7_HWCR, hwcr);
- /* McStatusWrEn has to be set */
- need_toggle = !(hwcr & BIT(18));
+ /* McStatusWrEn has to be set */
+ need_toggle = !(hwcr & BIT(18));
- if (need_toggle)
- wrmsrl(MSR_K7_HWCR, hwcr | BIT(18));
+ if (need_toggle)
+ wrmsrl(MSR_K7_HWCR, hwcr | BIT(18));
- for (i = 0; i < ARRAY_SIZE(msrs); i++) {
- rdmsrl(msrs[i], val);
+ /* Clear CntP bit safely */
+ for (i = 0; i < ARRAY_SIZE(msrs); i++)
+ msr_clear_bit(msrs[i], 62);
- /* CntP bit set? */
- if (val & BIT_64(62)) {
- val &= ~BIT_64(62);
- wrmsrl(msrs[i], val);
- }
- }
-
- /* restore old settings */
- if (need_toggle)
- wrmsrl(MSR_K7_HWCR, hwcr);
- }
+ /* restore old settings */
+ if (need_toggle)
+ wrmsrl(MSR_K7_HWCR, hwcr);
+ }
}
if (c->x86_vendor == X86_VENDOR_INTEL) {
switch (c->x86_vendor) {
case X86_VENDOR_INTEL:
mce_intel_feature_init(c);
- mce_adjust_timer = mce_intel_adjust_timer;
+ mce_adjust_timer = cmci_intel_adjust_timer;
break;
case X86_VENDOR_AMD:
mce_amd_feature_init(c);
+ mce_flags.overflow_recov = cpuid_ebx(0x80000007) & 0x1;
break;
default:
break;
int __init mcheck_init(void)
{
mcheck_intel_therm_init();
+ mcheck_vendor_init_severity();
return 0;
}
return (bank == 4);
}
-static const char * const bank4_names(struct threshold_block *b)
+static const char *bank4_names(const struct threshold_block *b)
{
switch (b->address) {
/* MSR4_MISC0 */
if (!b.interrupt_capable)
goto init;
+ b.interrupt_enable = 1;
new = (high & MASK_LVTOFF_HI) >> 20;
offset = setup_APIC_mce(offset, new);
log:
mce_setup(&m);
rdmsrl(MSR_IA32_MCx_STATUS(bank), m.status);
+ if (!(m.status & MCI_STATUS_VAL))
+ return;
m.misc = ((u64)high << 32) | low;
m.bank = bank;
mce_log(&m);
b->interrupt_capable = lvt_interrupt_supported(bank, high);
b->threshold_limit = THRESHOLD_MAX;
- if (b->interrupt_capable)
+ if (b->interrupt_capable) {
threshold_ktype.default_attrs[2] = &interrupt_enable.attr;
- else
+ b->interrupt_enable = 1;
+ } else {
threshold_ktype.default_attrs[2] = NULL;
+ }
INIT_LIST_HEAD(&b->miscj);
*/
static DEFINE_PER_CPU(mce_banks_t, mce_banks_owned);
+/*
+ * CMCI storm detection backoff counter
+ *
+ * During storm, we reset this counter to INITIAL_CHECK_INTERVAL in case we've
+ * encountered an error. If not, we decrement it by one. We signal the end of
+ * the CMCI storm when it reaches 0.
+ */
+static DEFINE_PER_CPU(int, cmci_backoff_cnt);
+
/*
* cmci_discover_lock protects against parallel discovery attempts
* which could race against each other.
#define CMCI_THRESHOLD 1
#define CMCI_POLL_INTERVAL (30 * HZ)
-#define CMCI_STORM_INTERVAL (1 * HZ)
+#define CMCI_STORM_INTERVAL (HZ)
#define CMCI_STORM_THRESHOLD 15
static DEFINE_PER_CPU(unsigned long, cmci_time_stamp);
return !!(cap & MCG_CMCI_P);
}
-void mce_intel_cmci_poll(void)
+bool mce_intel_cmci_poll(void)
{
if (__this_cpu_read(cmci_storm_state) == CMCI_STORM_NONE)
- return;
- machine_check_poll(MCP_TIMESTAMP, this_cpu_ptr(&mce_banks_owned));
+ return false;
+
+ /*
+ * Reset the counter if we've logged an error in the last poll
+ * during the storm.
+ */
+ if (machine_check_poll(MCP_TIMESTAMP, this_cpu_ptr(&mce_banks_owned)))
+ this_cpu_write(cmci_backoff_cnt, INITIAL_CHECK_INTERVAL);
+ else
+ this_cpu_dec(cmci_backoff_cnt);
+
+ return true;
}
void mce_intel_hcpu_update(unsigned long cpu)
per_cpu(cmci_storm_state, cpu) = CMCI_STORM_NONE;
}
-unsigned long mce_intel_adjust_timer(unsigned long interval)
+unsigned long cmci_intel_adjust_timer(unsigned long interval)
{
- int r;
-
- if (interval < CMCI_POLL_INTERVAL)
- return interval;
+ if ((this_cpu_read(cmci_backoff_cnt) > 0) &&
+ (__this_cpu_read(cmci_storm_state) == CMCI_STORM_ACTIVE)) {
+ mce_notify_irq();
+ return CMCI_STORM_INTERVAL;
+ }
switch (__this_cpu_read(cmci_storm_state)) {
case CMCI_STORM_ACTIVE:
+
/*
* We switch back to interrupt mode once the poll timer has
- * silenced itself. That means no events recorded and the
- * timer interval is back to our poll interval.
+ * silenced itself. That means no events recorded and the timer
+ * interval is back to our poll interval.
*/
__this_cpu_write(cmci_storm_state, CMCI_STORM_SUBSIDED);
- r = atomic_sub_return(1, &cmci_storm_on_cpus);
- if (r == 0)
+ if (!atomic_sub_return(1, &cmci_storm_on_cpus))
pr_notice("CMCI storm subsided: switching to interrupt mode\n");
+
/* FALLTHROUGH */
case CMCI_STORM_SUBSIDED:
/*
- * We wait for all cpus to go back to SUBSIDED
- * state. When that happens we switch back to
- * interrupt mode.
+ * We wait for all CPUs to go back to SUBSIDED state. When that
+ * happens we switch back to interrupt mode.
*/
if (!atomic_read(&cmci_storm_on_cpus)) {
__this_cpu_write(cmci_storm_state, CMCI_STORM_NONE);
}
return CMCI_POLL_INTERVAL;
default:
- /*
- * We have shiny weather. Let the poll do whatever it
- * thinks.
- */
+
+ /* We have shiny weather. Let the poll do whatever it thinks. */
return interval;
}
}
cmci_storm_disable_banks();
__this_cpu_write(cmci_storm_state, CMCI_STORM_ACTIVE);
r = atomic_add_return(1, &cmci_storm_on_cpus);
- mce_timer_kick(CMCI_POLL_INTERVAL);
+ mce_timer_kick(CMCI_STORM_INTERVAL);
+ this_cpu_write(cmci_backoff_cnt, INITIAL_CHECK_INTERVAL);
if (r == 1)
pr_notice("CMCI storm detected: switching to poll mode\n");
{
if (cmci_storm_detect())
return;
+
machine_check_poll(MCP_TIMESTAMP, this_cpu_ptr(&mce_banks_owned));
mce_notify_irq();
}
if (!mce_available(raw_cpu_ptr(&cpu_info)) || !cmci_supported(&banks))
return;
+
local_irq_save(flags);
machine_check_poll(MCP_TIMESTAMP, this_cpu_ptr(&mce_banks_owned));
local_irq_restore(flags);
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/firmware.h>
-#include <linux/pci_ids.h>
#include <linux/uaccess.h>
#include <linux/vmalloc.h>
#include <linux/kernel.h>
#include <asm/processor.h>
#include <asm/cmdline.h>
-#define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
-#define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u')
-#define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I')
-#define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l')
-#define CPUID_AMD1 QCHAR('A', 'u', 't', 'h')
-#define CPUID_AMD2 QCHAR('e', 'n', 't', 'i')
-#define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D')
-
-#define CPUID_IS(a, b, c, ebx, ecx, edx) \
- (!((ebx ^ (a))|(edx ^ (b))|(ecx ^ (c))))
-
-/*
- * In early loading microcode phase on BSP, boot_cpu_data is not set up yet.
- * x86_vendor() gets vendor id for BSP.
- *
- * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify
- * coding, we still use x86_vendor() to get vendor id for AP.
- *
- * x86_vendor() gets vendor information directly through cpuid.
- */
-static int x86_vendor(void)
-{
- u32 eax = 0x00000000;
- u32 ebx, ecx = 0, edx;
-
- native_cpuid(&eax, &ebx, &ecx, &edx);
-
- if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx))
- return X86_VENDOR_INTEL;
-
- if (CPUID_IS(CPUID_AMD1, CPUID_AMD2, CPUID_AMD3, ebx, ecx, edx))
- return X86_VENDOR_AMD;
-
- return X86_VENDOR_UNKNOWN;
-}
-
-static int x86_family(void)
-{
- u32 eax = 0x00000001;
- u32 ebx, ecx = 0, edx;
- int x86;
-
- native_cpuid(&eax, &ebx, &ecx, &edx);
-
- x86 = (eax >> 8) & 0xf;
- if (x86 == 15)
- x86 += (eax >> 20) & 0xff;
-
- return x86;
-}
-
static bool __init check_loader_disabled_bsp(void)
{
#ifdef CONFIG_X86_32
void __init load_ucode_bsp(void)
{
- int vendor, x86;
+ int vendor, family;
if (check_loader_disabled_bsp())
return;
return;
vendor = x86_vendor();
- x86 = x86_family();
+ family = x86_family();
switch (vendor) {
case X86_VENDOR_INTEL:
- if (x86 >= 6)
+ if (family >= 6)
load_ucode_intel_bsp();
break;
case X86_VENDOR_AMD:
- if (x86 >= 0x10)
+ if (family >= 0x10)
load_ucode_amd_bsp();
break;
default:
void load_ucode_ap(void)
{
- int vendor, x86;
+ int vendor, family;
if (check_loader_disabled_ap())
return;
return;
vendor = x86_vendor();
- x86 = x86_family();
+ family = x86_family();
switch (vendor) {
case X86_VENDOR_INTEL:
- if (x86 >= 6)
+ if (family >= 6)
load_ucode_intel_ap();
break;
case X86_VENDOR_AMD:
- if (x86 >= 0x10)
+ if (family >= 0x10)
load_ucode_amd_ap();
break;
default:
void reload_early_microcode(void)
{
- int vendor, x86;
+ int vendor, family;
vendor = x86_vendor();
- x86 = x86_family();
+ family = x86_family();
switch (vendor) {
case X86_VENDOR_INTEL:
- if (x86 >= 6)
+ if (family >= 6)
reload_ucode_intel();
break;
case X86_VENDOR_AMD:
- if (x86 >= 0x10)
+ if (family >= 0x10)
reload_ucode_amd();
break;
default:
cpf = cpu_sig.pf;
crev = cpu_sig.rev;
- return get_matching_microcode(csig, cpf, mc_intel, crev);
+ return get_matching_microcode(csig, cpf, crev, mc_intel);
}
static int apply_microcode_intel(int cpu)
csig = uci->cpu_sig.sig;
cpf = uci->cpu_sig.pf;
- if (get_matching_microcode(csig, cpf, mc, new_rev)) {
+ if (get_matching_microcode(csig, cpf, new_rev, mc)) {
vfree(new_mc);
new_rev = mc_header.rev;
new_mc = mc;
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
+
+/*
+ * This needs to be before all headers so that pr_debug in printk.h doesn't turn
+ * printk calls into no_printk().
+ *
+ *#define DEBUG
+ */
+
#include <linux/module.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <asm/tlbflush.h>
#include <asm/setup.h>
+#undef pr_fmt
+#define pr_fmt(fmt) "microcode: " fmt
+
static unsigned long mc_saved_in_initrd[MAX_UCODE_COUNT];
static struct mc_saved_data {
unsigned int mc_saved_count;
} mc_saved_data;
static enum ucode_state
-generic_load_microcode_early(struct microcode_intel **mc_saved_p,
- unsigned int mc_saved_count,
- struct ucode_cpu_info *uci)
+load_microcode_early(struct microcode_intel **saved,
+ unsigned int num_saved, struct ucode_cpu_info *uci)
{
struct microcode_intel *ucode_ptr, *new_mc = NULL;
- int new_rev = uci->cpu_sig.rev;
- enum ucode_state state = UCODE_OK;
- unsigned int mc_size;
- struct microcode_header_intel *mc_header;
- unsigned int csig = uci->cpu_sig.sig;
- unsigned int cpf = uci->cpu_sig.pf;
- int i;
+ struct microcode_header_intel *mc_hdr;
+ int new_rev, ret, i;
- for (i = 0; i < mc_saved_count; i++) {
- ucode_ptr = mc_saved_p[i];
+ new_rev = uci->cpu_sig.rev;
- mc_header = (struct microcode_header_intel *)ucode_ptr;
- mc_size = get_totalsize(mc_header);
- if (get_matching_microcode(csig, cpf, ucode_ptr, new_rev)) {
- new_rev = mc_header->rev;
- new_mc = ucode_ptr;
- }
- }
+ for (i = 0; i < num_saved; i++) {
+ ucode_ptr = saved[i];
+ mc_hdr = (struct microcode_header_intel *)ucode_ptr;
- if (!new_mc) {
- state = UCODE_NFOUND;
- goto out;
+ ret = get_matching_microcode(uci->cpu_sig.sig,
+ uci->cpu_sig.pf,
+ new_rev,
+ ucode_ptr);
+ if (!ret)
+ continue;
+
+ new_rev = mc_hdr->rev;
+ new_mc = ucode_ptr;
}
+ if (!new_mc)
+ return UCODE_NFOUND;
+
uci->mc = (struct microcode_intel *)new_mc;
-out:
- return state;
+ return UCODE_OK;
}
-static void
-microcode_pointer(struct microcode_intel **mc_saved,
- unsigned long *mc_saved_in_initrd,
- unsigned long initrd_start, int mc_saved_count)
+static inline void
+copy_initrd_ptrs(struct microcode_intel **mc_saved, unsigned long *initrd,
+ unsigned long off, int num_saved)
{
int i;
- for (i = 0; i < mc_saved_count; i++)
- mc_saved[i] = (struct microcode_intel *)
- (mc_saved_in_initrd[i] + initrd_start);
+ for (i = 0; i < num_saved; i++)
+ mc_saved[i] = (struct microcode_intel *)(initrd[i] + off);
}
#ifdef CONFIG_X86_32
#endif
static enum ucode_state
-load_microcode(struct mc_saved_data *mc_saved_data,
- unsigned long *mc_saved_in_initrd,
- unsigned long initrd_start,
- struct ucode_cpu_info *uci)
+load_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd,
+ unsigned long initrd_start, struct ucode_cpu_info *uci)
{
struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
unsigned int count = mc_saved_data->mc_saved_count;
if (!mc_saved_data->mc_saved) {
- microcode_pointer(mc_saved_tmp, mc_saved_in_initrd,
- initrd_start, count);
+ copy_initrd_ptrs(mc_saved_tmp, initrd, initrd_start, count);
- return generic_load_microcode_early(mc_saved_tmp, count, uci);
+ return load_microcode_early(mc_saved_tmp, count, uci);
} else {
#ifdef CONFIG_X86_32
microcode_phys(mc_saved_tmp, mc_saved_data);
- return generic_load_microcode_early(mc_saved_tmp, count, uci);
+ return load_microcode_early(mc_saved_tmp, count, uci);
#else
- return generic_load_microcode_early(mc_saved_data->mc_saved,
+ return load_microcode_early(mc_saved_data->mc_saved,
count, uci);
#endif
}
}
-static u8 get_x86_family(unsigned long sig)
-{
- u8 x86;
-
- x86 = (sig >> 8) & 0xf;
-
- if (x86 == 0xf)
- x86 += (sig >> 20) & 0xff;
-
- return x86;
-}
-
-static u8 get_x86_model(unsigned long sig)
-{
- u8 x86, x86_model;
-
- x86 = get_x86_family(sig);
- x86_model = (sig >> 4) & 0xf;
-
- if (x86 == 0x6 || x86 == 0xf)
- x86_model += ((sig >> 16) & 0xf) << 4;
-
- return x86_model;
-}
-
/*
* Given CPU signature and a microcode patch, this function finds if the
* microcode patch has matching family and model with the CPU.
matching_model_microcode(struct microcode_header_intel *mc_header,
unsigned long sig)
{
- u8 x86, x86_model;
- u8 x86_ucode, x86_model_ucode;
+ unsigned int fam, model;
+ unsigned int fam_ucode, model_ucode;
struct extended_sigtable *ext_header;
unsigned long total_size = get_totalsize(mc_header);
unsigned long data_size = get_datasize(mc_header);
int ext_sigcount, i;
struct extended_signature *ext_sig;
- x86 = get_x86_family(sig);
- x86_model = get_x86_model(sig);
+ fam = __x86_family(sig);
+ model = x86_model(sig);
- x86_ucode = get_x86_family(mc_header->sig);
- x86_model_ucode = get_x86_model(mc_header->sig);
+ fam_ucode = __x86_family(mc_header->sig);
+ model_ucode = x86_model(mc_header->sig);
- if (x86 == x86_ucode && x86_model == x86_model_ucode)
+ if (fam == fam_ucode && model == model_ucode)
return UCODE_OK;
/* Look for ext. headers: */
if (total_size <= data_size + MC_HEADER_SIZE)
return UCODE_NFOUND;
- ext_header = (struct extended_sigtable *)
- mc_header + data_size + MC_HEADER_SIZE;
+ ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE;
+ ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
ext_sigcount = ext_header->count;
- ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
for (i = 0; i < ext_sigcount; i++) {
- x86_ucode = get_x86_family(ext_sig->sig);
- x86_model_ucode = get_x86_model(ext_sig->sig);
+ fam_ucode = __x86_family(ext_sig->sig);
+ model_ucode = x86_model(ext_sig->sig);
- if (x86 == x86_ucode && x86_model == x86_model_ucode)
+ if (fam == fam_ucode && model == model_ucode)
return UCODE_OK;
ext_sig++;
}
-
return UCODE_NFOUND;
}
unsigned int mc_saved_count)
{
int i, j;
- struct microcode_intel **mc_saved_p;
+ struct microcode_intel **saved_ptr;
int ret;
if (!mc_saved_count)
/*
* Copy new microcode data.
*/
- mc_saved_p = kmalloc(mc_saved_count*sizeof(struct microcode_intel *),
- GFP_KERNEL);
- if (!mc_saved_p)
+ saved_ptr = kcalloc(mc_saved_count, sizeof(struct microcode_intel *), GFP_KERNEL);
+ if (!saved_ptr)
return -ENOMEM;
for (i = 0; i < mc_saved_count; i++) {
- struct microcode_intel *mc = mc_saved_src[i];
- struct microcode_header_intel *mc_header = &mc->hdr;
- unsigned long mc_size = get_totalsize(mc_header);
- mc_saved_p[i] = kmalloc(mc_size, GFP_KERNEL);
- if (!mc_saved_p[i]) {
- ret = -ENOMEM;
- goto err;
- }
+ struct microcode_header_intel *mc_hdr;
+ struct microcode_intel *mc;
+ unsigned long size;
+
if (!mc_saved_src[i]) {
ret = -EINVAL;
goto err;
}
- memcpy(mc_saved_p[i], mc, mc_size);
+
+ mc = mc_saved_src[i];
+ mc_hdr = &mc->hdr;
+ size = get_totalsize(mc_hdr);
+
+ saved_ptr[i] = kmalloc(size, GFP_KERNEL);
+ if (!saved_ptr[i]) {
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ memcpy(saved_ptr[i], mc, size);
}
/*
* Point to newly saved microcode.
*/
- mc_saved_data->mc_saved = mc_saved_p;
+ mc_saved_data->mc_saved = saved_ptr;
mc_saved_data->mc_saved_count = mc_saved_count;
return 0;
err:
for (j = 0; j <= i; j++)
- kfree(mc_saved_p[j]);
- kfree(mc_saved_p);
+ kfree(saved_ptr[j]);
+ kfree(saved_ptr);
return ret;
}
* - or if it is a newly discovered microcode patch.
*
* The microcode patch should have matching model with CPU.
+ *
+ * Returns: The updated number @num_saved of saved microcode patches.
*/
-static void _save_mc(struct microcode_intel **mc_saved, u8 *ucode_ptr,
- unsigned int *mc_saved_count_p)
+static unsigned int _save_mc(struct microcode_intel **mc_saved,
+ u8 *ucode_ptr, unsigned int num_saved)
{
- int i;
- int found = 0;
- unsigned int mc_saved_count = *mc_saved_count_p;
- struct microcode_header_intel *mc_header;
+ struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
+ unsigned int sig, pf, new_rev;
+ int found = 0, i;
+
+ mc_hdr = (struct microcode_header_intel *)ucode_ptr;
+
+ for (i = 0; i < num_saved; i++) {
+ mc_saved_hdr = (struct microcode_header_intel *)mc_saved[i];
+ sig = mc_saved_hdr->sig;
+ pf = mc_saved_hdr->pf;
+ new_rev = mc_hdr->rev;
+
+ if (!get_matching_sig(sig, pf, new_rev, ucode_ptr))
+ continue;
+
+ found = 1;
+
+ if (!revision_is_newer(mc_hdr, new_rev))
+ continue;
- mc_header = (struct microcode_header_intel *)ucode_ptr;
- for (i = 0; i < mc_saved_count; i++) {
- unsigned int sig, pf;
- unsigned int new_rev;
- struct microcode_header_intel *mc_saved_header =
- (struct microcode_header_intel *)mc_saved[i];
- sig = mc_saved_header->sig;
- pf = mc_saved_header->pf;
- new_rev = mc_header->rev;
-
- if (get_matching_sig(sig, pf, ucode_ptr, new_rev)) {
- found = 1;
- if (update_match_revision(mc_header, new_rev)) {
- /*
- * Found an older ucode saved before.
- * Replace the older one with this newer
- * one.
- */
- mc_saved[i] =
- (struct microcode_intel *)ucode_ptr;
- break;
- }
- }
- }
- if (i >= mc_saved_count && !found)
/*
- * This ucode is first time discovered in ucode file.
- * Save it to memory.
+ * Found an older ucode saved earlier. Replace it with
+ * this newer one.
*/
- mc_saved[mc_saved_count++] =
- (struct microcode_intel *)ucode_ptr;
+ mc_saved[i] = (struct microcode_intel *)ucode_ptr;
+ break;
+ }
+
+ /* Newly detected microcode, save it to memory. */
+ if (i >= num_saved && !found)
+ mc_saved[num_saved++] = (struct microcode_intel *)ucode_ptr;
- *mc_saved_count_p = mc_saved_count;
+ return num_saved;
}
/*
continue;
}
- _save_mc(mc_saved_tmp, ucode_ptr, &mc_saved_count);
+ mc_saved_count = _save_mc(mc_saved_tmp, ucode_ptr, mc_saved_count);
ucode_ptr += mc_size;
}
static int collect_cpu_info_early(struct ucode_cpu_info *uci)
{
unsigned int val[2];
- u8 x86, x86_model;
+ unsigned int family, model;
struct cpu_signature csig;
unsigned int eax, ebx, ecx, edx;
native_cpuid(&eax, &ebx, &ecx, &edx);
csig.sig = eax;
- x86 = get_x86_family(csig.sig);
- x86_model = get_x86_model(csig.sig);
+ family = __x86_family(csig.sig);
+ model = x86_model(csig.sig);
- if ((x86_model >= 5) || (x86 > 6)) {
+ if ((model >= 5) || (family > 6)) {
/* get processor flags from MSR 0x17 */
native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
csig.pf = 1 << ((val[1] >> 18) & 7);
sig = uci.cpu_sig.sig;
pf = uci.cpu_sig.pf;
rev = uci.cpu_sig.rev;
- pr_debug("CPU%d: sig=0x%x, pf=0x%x, rev=0x%x\n",
- smp_processor_id(), sig, pf, rev);
+ pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
for (i = 0; i < mc_saved_data.mc_saved_count; i++) {
struct microcode_header_intel *mc_saved_header;
if (total_size <= data_size + MC_HEADER_SIZE)
continue;
- ext_header = (struct extended_sigtable *)
- mc_saved_header + data_size + MC_HEADER_SIZE;
+ ext_header = (void *) mc_saved_header + data_size + MC_HEADER_SIZE;
ext_sigcount = ext_header->count;
ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
* Save the microcode patch mc in mc_save_tmp structure if it's a newer
* version.
*/
-
- _save_mc(mc_saved_tmp, mc, &mc_saved_count);
+ mc_saved_count = _save_mc(mc_saved_tmp, mc, mc_saved_count);
/*
* Save the mc_save_tmp in global mc_saved_data.
static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
static __init enum ucode_state
-scan_microcode(unsigned long start, unsigned long end,
- struct mc_saved_data *mc_saved_data,
- unsigned long *mc_saved_in_initrd,
- struct ucode_cpu_info *uci)
+scan_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd,
+ unsigned long start, unsigned long size,
+ struct ucode_cpu_info *uci)
{
- unsigned int size = end - start + 1;
struct cpio_data cd;
long offset = 0;
#ifdef CONFIG_X86_32
if (!cd.data)
return UCODE_ERROR;
-
return get_matching_model_microcode(0, start, cd.data, cd.size,
- mc_saved_data, mc_saved_in_initrd,
- uci);
+ mc_saved_data, initrd, uci);
}
/*
if (count == 0)
return ret;
- microcode_pointer(mc_saved, mc_saved_in_initrd, initrd_start, count);
+ copy_initrd_ptrs(mc_saved, mc_saved_in_initrd, initrd_start, count);
ret = save_microcode(&mc_saved_data, mc_saved, count);
if (ret)
pr_err("Cannot save microcode patches from initrd.\n");
static void __init
_load_ucode_intel_bsp(struct mc_saved_data *mc_saved_data,
- unsigned long *mc_saved_in_initrd,
- unsigned long initrd_start_early,
- unsigned long initrd_end_early,
- struct ucode_cpu_info *uci)
+ unsigned long *initrd,
+ unsigned long start, unsigned long size)
{
+ struct ucode_cpu_info uci;
enum ucode_state ret;
- collect_cpu_info_early(uci);
- scan_microcode(initrd_start_early, initrd_end_early, mc_saved_data,
- mc_saved_in_initrd, uci);
+ collect_cpu_info_early(&uci);
- ret = load_microcode(mc_saved_data, mc_saved_in_initrd,
- initrd_start_early, uci);
+ ret = scan_microcode(mc_saved_data, initrd, start, size, &uci);
+ if (ret != UCODE_OK)
+ return;
- if (ret == UCODE_OK)
- apply_microcode_early(uci, true);
+ ret = load_microcode(mc_saved_data, initrd, start, &uci);
+ if (ret != UCODE_OK)
+ return;
+
+ apply_microcode_early(&uci, true);
}
-void __init
-load_ucode_intel_bsp(void)
+void __init load_ucode_intel_bsp(void)
{
- u64 ramdisk_image, ramdisk_size;
- unsigned long initrd_start_early, initrd_end_early;
- struct ucode_cpu_info uci;
+ u64 start, size;
#ifdef CONFIG_X86_32
- struct boot_params *boot_params_p;
+ struct boot_params *p;
- boot_params_p = (struct boot_params *)__pa_nodebug(&boot_params);
- ramdisk_image = boot_params_p->hdr.ramdisk_image;
- ramdisk_size = boot_params_p->hdr.ramdisk_size;
- initrd_start_early = ramdisk_image;
- initrd_end_early = initrd_start_early + ramdisk_size;
+ p = (struct boot_params *)__pa_nodebug(&boot_params);
+ start = p->hdr.ramdisk_image;
+ size = p->hdr.ramdisk_size;
_load_ucode_intel_bsp(
- (struct mc_saved_data *)__pa_nodebug(&mc_saved_data),
- (unsigned long *)__pa_nodebug(&mc_saved_in_initrd),
- initrd_start_early, initrd_end_early, &uci);
+ (struct mc_saved_data *)__pa_nodebug(&mc_saved_data),
+ (unsigned long *)__pa_nodebug(&mc_saved_in_initrd),
+ start, size);
#else
- ramdisk_image = boot_params.hdr.ramdisk_image;
- ramdisk_size = boot_params.hdr.ramdisk_size;
- initrd_start_early = ramdisk_image + PAGE_OFFSET;
- initrd_end_early = initrd_start_early + ramdisk_size;
-
- _load_ucode_intel_bsp(&mc_saved_data, mc_saved_in_initrd,
- initrd_start_early, initrd_end_early,
- &uci);
+ start = boot_params.hdr.ramdisk_image + PAGE_OFFSET;
+ size = boot_params.hdr.ramdisk_size;
+
+ _load_ucode_intel_bsp(&mc_saved_data, mc_saved_in_initrd, start, size);
#endif
}
struct ucode_cpu_info uci;
unsigned long *mc_saved_in_initrd_p;
unsigned long initrd_start_addr;
+ enum ucode_state ret;
#ifdef CONFIG_X86_32
unsigned long *initrd_start_p;
return;
collect_cpu_info_early(&uci);
- load_microcode(mc_saved_data_p, mc_saved_in_initrd_p,
- initrd_start_addr, &uci);
+ ret = load_microcode(mc_saved_data_p, mc_saved_in_initrd_p,
+ initrd_start_addr, &uci);
+
+ if (ret != UCODE_OK)
+ return;
+
apply_microcode_early(&uci, true);
}
collect_cpu_info_early(&uci);
- ret = generic_load_microcode_early(mc_saved_data.mc_saved,
- mc_saved_data.mc_saved_count, &uci);
+ ret = load_microcode_early(mc_saved_data.mc_saved,
+ mc_saved_data.mc_saved_count, &uci);
if (ret != UCODE_OK)
return;
return (!sigmatch(sig, csig, pf, cpf)) ? 0 : 1;
}
-int
-update_match_revision(struct microcode_header_intel *mc_header, int rev)
-{
- return (mc_header->rev <= rev) ? 0 : 1;
-}
-
int microcode_sanity_check(void *mc, int print_err)
{
unsigned long total_size, data_size, ext_table_size;
EXPORT_SYMBOL_GPL(microcode_sanity_check);
/*
- * return 0 - no update found
- * return 1 - found update
+ * Returns 1 if update has been found, 0 otherwise.
*/
-int get_matching_sig(unsigned int csig, int cpf, void *mc, int rev)
+int get_matching_sig(unsigned int csig, int cpf, int rev, void *mc)
{
struct microcode_header_intel *mc_header = mc;
struct extended_sigtable *ext_header;
}
/*
- * return 0 - no update found
- * return 1 - found update
+ * Returns 1 if update has been found, 0 otherwise.
*/
-int get_matching_microcode(unsigned int csig, int cpf, void *mc, int rev)
+int get_matching_microcode(unsigned int csig, int cpf, int rev, void *mc)
{
- struct microcode_header_intel *mc_header = mc;
+ struct microcode_header_intel *mc_hdr = mc;
- if (!update_match_revision(mc_header, rev))
+ if (!revision_is_newer(mc_hdr, rev))
return 0;
- return get_matching_sig(csig, cpf, mc, rev);
+ return get_matching_sig(csig, cpf, rev, mc);
}
EXPORT_SYMBOL_GPL(get_matching_microcode);
IN=$1
OUT=$2
-function dump_array()
+dump_array()
{
ARRAY=$1
SIZE=$2
}
}
+void hw_perf_lbr_event_destroy(struct perf_event *event)
+{
+ hw_perf_event_destroy(event);
+
+ /* undo the lbr/bts event accounting */
+ x86_del_exclusive(x86_lbr_exclusive_lbr);
+}
+
static inline int x86_pmu_initialized(void)
{
return x86_pmu.handle_irq != NULL;
return x86_pmu_extra_regs(val, event);
}
+/*
+ * Check if we can create event of a certain type (that no conflicting events
+ * are present).
+ */
+int x86_add_exclusive(unsigned int what)
+{
+ int ret = -EBUSY, i;
+
+ if (atomic_inc_not_zero(&x86_pmu.lbr_exclusive[what]))
+ return 0;
+
+ mutex_lock(&pmc_reserve_mutex);
+ for (i = 0; i < ARRAY_SIZE(x86_pmu.lbr_exclusive); i++)
+ if (i != what && atomic_read(&x86_pmu.lbr_exclusive[i]))
+ goto out;
+
+ atomic_inc(&x86_pmu.lbr_exclusive[what]);
+ ret = 0;
+
+out:
+ mutex_unlock(&pmc_reserve_mutex);
+ return ret;
+}
+
+void x86_del_exclusive(unsigned int what)
+{
+ atomic_dec(&x86_pmu.lbr_exclusive[what]);
+}
+
int x86_setup_perfctr(struct perf_event *event)
{
struct perf_event_attr *attr = &event->attr;
/* BTS is currently only allowed for user-mode. */
if (!attr->exclude_kernel)
return -EOPNOTSUPP;
+
+ /* disallow bts if conflicting events are present */
+ if (x86_add_exclusive(x86_lbr_exclusive_lbr))
+ return -EBUSY;
+
+ event->destroy = hw_perf_lbr_event_destroy;
}
hwc->config |= config;
if (event->attr.precise_ip > precise)
return -EOPNOTSUPP;
- /*
- * check that PEBS LBR correction does not conflict with
- * whatever the user is asking with attr->branch_sample_type
- */
- if (event->attr.precise_ip > 1 &&
- x86_pmu.intel_cap.pebs_format < 2) {
- u64 *br_type = &event->attr.branch_sample_type;
-
- if (has_branch_stack(event)) {
- if (!precise_br_compat(event))
- return -EOPNOTSUPP;
-
- /* branch_sample_type is compatible */
-
- } else {
- /*
- * user did not specify branch_sample_type
- *
- * For PEBS fixups, we capture all
- * the branches at the priv level of the
- * event.
- */
- *br_type = PERF_SAMPLE_BRANCH_ANY;
-
- if (!event->attr.exclude_user)
- *br_type |= PERF_SAMPLE_BRANCH_USER;
-
- if (!event->attr.exclude_kernel)
- *br_type |= PERF_SAMPLE_BRANCH_KERNEL;
- }
+ }
+ /*
+ * check that PEBS LBR correction does not conflict with
+ * whatever the user is asking with attr->branch_sample_type
+ */
+ if (event->attr.precise_ip > 1 && x86_pmu.intel_cap.pebs_format < 2) {
+ u64 *br_type = &event->attr.branch_sample_type;
+
+ if (has_branch_stack(event)) {
+ if (!precise_br_compat(event))
+ return -EOPNOTSUPP;
+
+ /* branch_sample_type is compatible */
+
+ } else {
+ /*
+ * user did not specify branch_sample_type
+ *
+ * For PEBS fixups, we capture all
+ * the branches at the priv level of the
+ * event.
+ */
+ *br_type = PERF_SAMPLE_BRANCH_ANY;
+
+ if (!event->attr.exclude_user)
+ *br_type |= PERF_SAMPLE_BRANCH_USER;
+
+ if (!event->attr.exclude_kernel)
+ *br_type |= PERF_SAMPLE_BRANCH_KERNEL;
}
}
+ if (event->attr.branch_sample_type & PERF_SAMPLE_BRANCH_CALL_STACK)
+ event->attach_state |= PERF_ATTACH_TASK_DATA;
+
/*
* Generate PMC IRQs:
* (keep 'enabled' bit clear for now)
if (event->attr.type == PERF_TYPE_RAW)
event->hw.config |= event->attr.config & X86_RAW_EVENT_MASK;
+ if (event->attr.sample_period && x86_pmu.limit_period) {
+ if (x86_pmu.limit_period(event, event->attr.sample_period) >
+ event->attr.sample_period)
+ return -EINVAL;
+ }
+
return x86_setup_perfctr(event);
}
struct event_constraint *c;
unsigned long used_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
struct perf_event *e;
- int i, wmin, wmax, num = 0;
+ int i, wmin, wmax, unsched = 0;
struct hw_perf_event *hwc;
bitmap_zero(used_mask, X86_PMC_IDX_MAX);
+ if (x86_pmu.start_scheduling)
+ x86_pmu.start_scheduling(cpuc);
+
for (i = 0, wmin = X86_PMC_IDX_MAX, wmax = 0; i < n; i++) {
hwc = &cpuc->event_list[i]->hw;
- c = x86_pmu.get_event_constraints(cpuc, cpuc->event_list[i]);
+ c = x86_pmu.get_event_constraints(cpuc, i, cpuc->event_list[i]);
hwc->constraint = c;
wmin = min(wmin, c->weight);
/* slow path */
if (i != n)
- num = perf_assign_events(cpuc->event_list, n, wmin,
- wmax, assign);
+ unsched = perf_assign_events(cpuc->event_list, n, wmin,
+ wmax, assign);
/*
- * Mark the event as committed, so we do not put_constraint()
- * in case new events are added and fail scheduling.
+ * In case of success (unsched = 0), mark events as committed,
+ * so we do not put_constraint() in case new events are added
+ * and fail to be scheduled
+ *
+ * We invoke the lower level commit callback to lock the resource
+ *
+ * We do not need to do all of this in case we are called to
+ * validate an event group (assign == NULL)
*/
- if (!num && assign) {
+ if (!unsched && assign) {
for (i = 0; i < n; i++) {
e = cpuc->event_list[i];
e->hw.flags |= PERF_X86_EVENT_COMMITTED;
+ if (x86_pmu.commit_scheduling)
+ x86_pmu.commit_scheduling(cpuc, e, assign[i]);
}
}
- /*
- * scheduling failed or is just a simulation,
- * free resources if necessary
- */
- if (!assign || num) {
+
+ if (!assign || unsched) {
+
for (i = 0; i < n; i++) {
e = cpuc->event_list[i];
/*
if ((e->hw.flags & PERF_X86_EVENT_COMMITTED))
continue;
+ /*
+ * release events that failed scheduling
+ */
if (x86_pmu.put_event_constraints)
x86_pmu.put_event_constraints(cpuc, e);
}
}
- return num ? -EINVAL : 0;
+
+ if (x86_pmu.stop_scheduling)
+ x86_pmu.stop_scheduling(cpuc);
+
+ return unsched ? -EINVAL : 0;
}
/*
if (left > x86_pmu.max_period)
left = x86_pmu.max_period;
+ if (x86_pmu.limit_period)
+ left = x86_pmu.limit_period(event, left);
+
per_cpu(pmc_prev_left[idx], smp_processor_id()) = left;
/*
hwc = &event->hw;
- perf_pmu_disable(event->pmu);
n0 = cpuc->n_events;
ret = n = collect_events(cpuc, event, false);
if (ret < 0)
ret = 0;
out:
- perf_pmu_enable(event->pmu);
return ret;
}
void perf_event_print_debug(void)
{
u64 ctrl, status, overflow, pmc_ctrl, pmc_count, prev_left, fixed;
- u64 pebs;
+ u64 pebs, debugctl;
struct cpu_hw_events *cpuc;
unsigned long flags;
int cpu, idx;
rdmsrl(MSR_CORE_PERF_GLOBAL_STATUS, status);
rdmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, overflow);
rdmsrl(MSR_ARCH_PERFMON_FIXED_CTR_CTRL, fixed);
- rdmsrl(MSR_IA32_PEBS_ENABLE, pebs);
pr_info("\n");
pr_info("CPU#%d: ctrl: %016llx\n", cpu, ctrl);
pr_info("CPU#%d: status: %016llx\n", cpu, status);
pr_info("CPU#%d: overflow: %016llx\n", cpu, overflow);
pr_info("CPU#%d: fixed: %016llx\n", cpu, fixed);
- pr_info("CPU#%d: pebs: %016llx\n", cpu, pebs);
+ if (x86_pmu.pebs_constraints) {
+ rdmsrl(MSR_IA32_PEBS_ENABLE, pebs);
+ pr_info("CPU#%d: pebs: %016llx\n", cpu, pebs);
+ }
+ if (x86_pmu.lbr_nr) {
+ rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);
+ pr_info("CPU#%d: debugctl: %016llx\n", cpu, debugctl);
+ }
}
pr_info("CPU#%d: active: %016llx\n", cpu, *(u64 *)cpuc->active_mask);
{
unsigned int cpu = (long)hcpu;
struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
- int ret = NOTIFY_OK;
+ int i, ret = NOTIFY_OK;
switch (action & ~CPU_TASKS_FROZEN) {
case CPU_UP_PREPARE:
- cpuc->kfree_on_online = NULL;
+ for (i = 0 ; i < X86_PERF_KFREE_MAX; i++)
+ cpuc->kfree_on_online[i] = NULL;
if (x86_pmu.cpu_prepare)
ret = x86_pmu.cpu_prepare(cpu);
break;
break;
case CPU_ONLINE:
- kfree(cpuc->kfree_on_online);
+ for (i = 0 ; i < X86_PERF_KFREE_MAX; i++) {
+ kfree(cpuc->kfree_on_online[i]);
+ cpuc->kfree_on_online[i] = NULL;
+ }
break;
case CPU_DYING:
if (IS_ERR(fake_cpuc))
return PTR_ERR(fake_cpuc);
- c = x86_pmu.get_event_constraints(fake_cpuc, event);
+ c = x86_pmu.get_event_constraints(fake_cpuc, -1, event);
if (!c || !c->weight)
ret = -EINVAL;
NULL,
};
-static void x86_pmu_flush_branch_stack(void)
+static void x86_pmu_sched_task(struct perf_event_context *ctx, bool sched_in)
{
- if (x86_pmu.flush_branch_stack)
- x86_pmu.flush_branch_stack();
+ if (x86_pmu.sched_task)
+ x86_pmu.sched_task(ctx, sched_in);
}
void perf_check_microcode(void)
.commit_txn = x86_pmu_commit_txn,
.event_idx = x86_pmu_event_idx,
- .flush_branch_stack = x86_pmu_flush_branch_stack,
+ .sched_task = x86_pmu_sched_task,
+ .task_ctx_size = sizeof(struct x86_perf_task_context),
};
void arch_perf_update_userpage(struct perf_event *event,
data = cyc2ns_read_begin();
+ /*
+ * Internal timekeeping for enabled/running/stopped times
+ * is always in the local_clock domain.
+ */
userpg->cap_user_time = 1;
userpg->time_mult = data->cyc2ns_mul;
userpg->time_shift = data->cyc2ns_shift;
userpg->time_offset = data->cyc2ns_offset - now;
- userpg->cap_user_time_zero = 1;
- userpg->time_zero = data->cyc2ns_offset;
+ /*
+ * cap_user_time_zero doesn't make sense when we're using a different
+ * time base for the records.
+ */
+ if (event->clock == &local_clock) {
+ userpg->cap_user_time_zero = 1;
+ userpg->time_zero = data->cyc2ns_offset;
+ }
cyc2ns_read_end(data);
}
*/
static unsigned long code_segment_base(struct pt_regs *regs)
{
+ /*
+ * For IA32 we look at the GDT/LDT segment base to convert the
+ * effective IP to a linear address.
+ */
+
+#ifdef CONFIG_X86_32
/*
* If we are in VM86 mode, add the segment offset to convert to a
* linear address.
if (regs->flags & X86_VM_MASK)
return 0x10 * regs->cs;
- /*
- * For IA32 we look at the GDT/LDT segment base to convert the
- * effective IP to a linear address.
- */
-#ifdef CONFIG_X86_32
if (user_mode(regs) && regs->cs != __USER_CS)
return get_segment_base(regs->cs);
#else
- if (test_thread_flag(TIF_IA32)) {
- if (user_mode(regs) && regs->cs != __USER32_CS)
- return get_segment_base(regs->cs);
- }
+ if (user_mode(regs) && !user_64bit_mode(regs) &&
+ regs->cs != __USER32_CS)
+ return get_segment_base(regs->cs);
#endif
return 0;
}
#define PERF_X86_EVENT_COMMITTED 0x8 /* event passed commit_txn */
#define PERF_X86_EVENT_PEBS_LD_HSW 0x10 /* haswell style datala, load */
#define PERF_X86_EVENT_PEBS_NA_HSW 0x20 /* haswell style datala, unknown */
+#define PERF_X86_EVENT_EXCL 0x40 /* HT exclusivity on counter */
+#define PERF_X86_EVENT_DYNAMIC 0x80 /* dynamic alloc'd constraint */
#define PERF_X86_EVENT_RDPMC_ALLOWED 0x40 /* grant rdpmc permission */
unsigned core_id; /* per-core: core id */
};
+enum intel_excl_state_type {
+ INTEL_EXCL_UNUSED = 0, /* counter is unused */
+ INTEL_EXCL_SHARED = 1, /* counter can be used by both threads */
+ INTEL_EXCL_EXCLUSIVE = 2, /* counter can be used by one thread only */
+};
+
+struct intel_excl_states {
+ enum intel_excl_state_type init_state[X86_PMC_IDX_MAX];
+ enum intel_excl_state_type state[X86_PMC_IDX_MAX];
+ int num_alloc_cntrs;/* #counters allocated */
+ int max_alloc_cntrs;/* max #counters allowed */
+ bool sched_started; /* true if scheduling has started */
+};
+
+struct intel_excl_cntrs {
+ raw_spinlock_t lock;
+
+ struct intel_excl_states states[2];
+
+ int refcnt; /* per-core: #HT threads */
+ unsigned core_id; /* per-core: core id */
+};
+
#define MAX_LBR_ENTRIES 16
+enum {
+ X86_PERF_KFREE_SHARED = 0,
+ X86_PERF_KFREE_EXCL = 1,
+ X86_PERF_KFREE_MAX
+};
+
struct cpu_hw_events {
/*
* Generic x86 PMC bits
* used on Intel NHM/WSM/SNB
*/
struct intel_shared_regs *shared_regs;
+ /*
+ * manage exclusive counter access between hyperthread
+ */
+ struct event_constraint *constraint_list; /* in enable order */
+ struct intel_excl_cntrs *excl_cntrs;
+ int excl_thread_id; /* 0 or 1 */
/*
* AMD specific bits
/* Inverted mask of bits to clear in the perf_ctr ctrl registers */
u64 perf_ctr_virt_mask;
- void *kfree_on_online;
+ void *kfree_on_online[X86_PERF_KFREE_MAX];
};
#define __EVENT_CONSTRAINT(c, n, m, w, o, f) {\
#define EVENT_CONSTRAINT(c, n, m) \
__EVENT_CONSTRAINT(c, n, m, HWEIGHT(n), 0, 0)
+#define INTEL_EXCLEVT_CONSTRAINT(c, n) \
+ __EVENT_CONSTRAINT(c, n, ARCH_PERFMON_EVENTSEL_EVENT, HWEIGHT(n),\
+ 0, PERF_X86_EVENT_EXCL)
+
/*
* The overlap flag marks event constraints with overlapping counter
* masks. This is the case if the counter mask of such an event is not
#define INTEL_FLAGS_UEVENT_CONSTRAINT(c, n) \
EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS)
+#define INTEL_EXCLUEVT_CONSTRAINT(c, n) \
+ __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK, \
+ HWEIGHT(n), 0, PERF_X86_EVENT_EXCL)
+
#define INTEL_PLD_CONSTRAINT(c, n) \
__EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
HWEIGHT(n), 0, PERF_X86_EVENT_PEBS_LDLAT)
/* Check flags and event code, and set the HSW load flag */
#define INTEL_FLAGS_EVENT_CONSTRAINT_DATALA_LD(code, n) \
- __EVENT_CONSTRAINT(code, n, \
+ __EVENT_CONSTRAINT(code, n, \
ARCH_PERFMON_EVENTSEL_EVENT|X86_ALL_EVENT_FLAGS, \
HWEIGHT(n), 0, PERF_X86_EVENT_PEBS_LD_HSW)
+#define INTEL_FLAGS_EVENT_CONSTRAINT_DATALA_XLD(code, n) \
+ __EVENT_CONSTRAINT(code, n, \
+ ARCH_PERFMON_EVENTSEL_EVENT|X86_ALL_EVENT_FLAGS, \
+ HWEIGHT(n), 0, \
+ PERF_X86_EVENT_PEBS_LD_HSW|PERF_X86_EVENT_EXCL)
+
/* Check flags and event code/umask, and set the HSW store flag */
#define INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_ST(code, n) \
__EVENT_CONSTRAINT(code, n, \
INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
HWEIGHT(n), 0, PERF_X86_EVENT_PEBS_ST_HSW)
+#define INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_XST(code, n) \
+ __EVENT_CONSTRAINT(code, n, \
+ INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
+ HWEIGHT(n), 0, \
+ PERF_X86_EVENT_PEBS_ST_HSW|PERF_X86_EVENT_EXCL)
+
/* Check flags and event code/umask, and set the HSW load flag */
#define INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_LD(code, n) \
__EVENT_CONSTRAINT(code, n, \
INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
HWEIGHT(n), 0, PERF_X86_EVENT_PEBS_LD_HSW)
+#define INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_XLD(code, n) \
+ __EVENT_CONSTRAINT(code, n, \
+ INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
+ HWEIGHT(n), 0, \
+ PERF_X86_EVENT_PEBS_LD_HSW|PERF_X86_EVENT_EXCL)
+
/* Check flags and event code/umask, and set the HSW N/A flag */
#define INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_NA(code, n) \
__EVENT_CONSTRAINT(code, n, \
#define X86_CONFIG(args...) ((union x86_pmu_config){.bits = {args}}).value
+enum {
+ x86_lbr_exclusive_lbr,
+ x86_lbr_exclusive_bts,
+ x86_lbr_exclusive_pt,
+ x86_lbr_exclusive_max,
+};
+
/*
* struct x86_pmu - generic x86 pmu
*/
u64 max_period;
struct event_constraint *
(*get_event_constraints)(struct cpu_hw_events *cpuc,
+ int idx,
struct perf_event *event);
void (*put_event_constraints)(struct cpu_hw_events *cpuc,
struct perf_event *event);
+
+ void (*commit_scheduling)(struct cpu_hw_events *cpuc,
+ struct perf_event *event,
+ int cntr);
+
+ void (*start_scheduling)(struct cpu_hw_events *cpuc);
+
+ void (*stop_scheduling)(struct cpu_hw_events *cpuc);
+
struct event_constraint *event_constraints;
struct x86_pmu_quirk *quirks;
int perfctr_second_write;
bool late_ack;
+ unsigned (*limit_period)(struct perf_event *event, unsigned l);
/*
* sysfs attrs
void (*cpu_dead)(int cpu);
void (*check_microcode)(void);
- void (*flush_branch_stack)(void);
+ void (*sched_task)(struct perf_event_context *ctx,
+ bool sched_in);
/*
* Intel Arch Perfmon v2+
const int *lbr_sel_map; /* lbr_select mappings */
bool lbr_double_abort; /* duplicated lbr aborts */
+ /*
+ * Intel PT/LBR/BTS are exclusive
+ */
+ atomic_t lbr_exclusive[x86_lbr_exclusive_max];
+
/*
* Extra registers for events
*/
struct extra_reg *extra_regs;
- unsigned int er_flags;
+ unsigned int flags;
/*
* Intel host/guest support (KVM)
struct perf_guest_switch_msr *(*guest_get_msrs)(int *nr);
};
+struct x86_perf_task_context {
+ u64 lbr_from[MAX_LBR_ENTRIES];
+ u64 lbr_to[MAX_LBR_ENTRIES];
+ int lbr_callstack_users;
+ int lbr_stack_state;
+};
+
#define x86_add_quirk(func_) \
do { \
static struct x86_pmu_quirk __quirk __initdata = { \
x86_pmu.quirks = &__quirk; \
} while (0)
-#define ERF_NO_HT_SHARING 1
-#define ERF_HAS_RSP_1 2
+/*
+ * x86_pmu flags
+ */
+#define PMU_FL_NO_HT_SHARING 0x1 /* no hyper-threading resource sharing */
+#define PMU_FL_HAS_RSP_1 0x2 /* has 2 equivalent offcore_rsp regs */
+#define PMU_FL_EXCL_CNTRS 0x4 /* has exclusive counter requirements */
+#define PMU_FL_EXCL_ENABLED 0x8 /* exclusive counter active */
#define EVENT_VAR(_id) event_attr_##_id
#define EVENT_PTR(_id) &event_attr_##_id.attr.attr
extern struct x86_pmu x86_pmu __read_mostly;
+static inline bool x86_pmu_has_lbr_callstack(void)
+{
+ return x86_pmu.lbr_sel_map &&
+ x86_pmu.lbr_sel_map[PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT] > 0;
+}
+
DECLARE_PER_CPU(struct cpu_hw_events, cpu_hw_events);
int x86_perf_event_set_period(struct perf_event *event);
return x86_pmu.rdpmc_index ? x86_pmu.rdpmc_index(index) : index;
}
+int x86_add_exclusive(unsigned int what);
+
+void x86_del_exclusive(unsigned int what);
+
+void hw_perf_lbr_event_destroy(struct perf_event *event);
+
int x86_setup_perfctr(struct perf_event *event);
int x86_pmu_hw_config(struct perf_event *event);
#ifdef CONFIG_CPU_SUP_INTEL
+static inline bool intel_pmu_needs_lbr_smpl(struct perf_event *event)
+{
+ /* user explicitly requested branch sampling */
+ if (has_branch_stack(event))
+ return true;
+
+ /* implicit branch sampling to correct PEBS skid */
+ if (x86_pmu.intel_cap.pebs_trap && event->attr.precise_ip > 1 &&
+ x86_pmu.intel_cap.pebs_format < 2)
+ return true;
+
+ return false;
+}
+
+static inline bool intel_pmu_has_bts(struct perf_event *event)
+{
+ if (event->attr.config == PERF_COUNT_HW_BRANCH_INSTRUCTIONS &&
+ !event->attr.freq && event->hw.sample_period == 1)
+ return true;
+
+ return false;
+}
+
int intel_pmu_save_and_restart(struct perf_event *event);
struct event_constraint *
-x86_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event);
+x86_get_event_constraints(struct cpu_hw_events *cpuc, int idx,
+ struct perf_event *event);
struct intel_shared_regs *allocate_shared_regs(int cpu);
void intel_ds_init(void);
+void intel_pmu_lbr_sched_task(struct perf_event_context *ctx, bool sched_in);
+
void intel_pmu_lbr_reset(void);
void intel_pmu_lbr_enable(struct perf_event *event);
void intel_pmu_lbr_disable(struct perf_event *event);
-void intel_pmu_lbr_enable_all(void);
+void intel_pmu_lbr_enable_all(bool pmi);
void intel_pmu_lbr_disable_all(void);
void intel_pmu_lbr_init_snb(void);
+void intel_pmu_lbr_init_hsw(void);
+
int intel_pmu_setup_lbr_filter(struct perf_event *event);
+void intel_pt_interrupt(void);
+
+int intel_bts_interrupt(void);
+
+void intel_bts_enable_local(void);
+
+void intel_bts_disable_local(void);
+
int p4_pmu_init(void);
int p6_pmu_init(void);
ssize_t events_sysfs_show(struct device *dev, struct device_attribute *attr,
char *page);
+static inline int is_ht_workaround_enabled(void)
+{
+ return !!(x86_pmu.flags & PMU_FL_EXCL_ENABLED);
+}
#else /* CONFIG_CPU_SUP_INTEL */
static inline void reserve_ds_buffers(void)
static void amd_pmu_cpu_starting(int cpu)
{
struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
+ void **onln = &cpuc->kfree_on_online[X86_PERF_KFREE_SHARED];
struct amd_nb *nb;
int i, nb_id;
continue;
if (nb->nb_id == nb_id) {
- cpuc->kfree_on_online = cpuc->amd_nb;
+ *onln = cpuc->amd_nb;
cpuc->amd_nb = nb;
break;
}
}
static struct event_constraint *
-amd_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)
+amd_get_event_constraints(struct cpu_hw_events *cpuc, int idx,
+ struct perf_event *event)
{
/*
* if not NB event or no NB, then no constraints
static struct event_constraint amd_f15_PMC53 = EVENT_CONSTRAINT(0, 0x38, 0);
static struct event_constraint *
-amd_get_event_constraints_f15h(struct cpu_hw_events *cpuc, struct perf_event *event)
+amd_get_event_constraints_f15h(struct cpu_hw_events *cpuc, int idx,
+ struct perf_event *event)
{
struct hw_perf_event *hwc = &event->hw;
unsigned int event_code = amd_get_event_code(hwc);
* the IBS interrupt vector is handled by perf_ibs_cpu_notifier that
* is using the new offset.
*/
-static int force_ibs_eilvt_setup(void)
+static void force_ibs_eilvt_setup(void)
{
int offset;
int ret;
if (offset == APIC_EILVT_NR_MAX) {
printk(KERN_DEBUG "No EILVT entry available\n");
- return -EBUSY;
+ return;
}
ret = setup_ibs_ctl(offset);
if (ret)
goto out;
- if (!ibs_eilvt_valid()) {
- ret = -EFAULT;
+ if (!ibs_eilvt_valid())
goto out;
- }
pr_info("IBS: LVT offset %d assigned\n", offset);
- return 0;
+ return;
out:
preempt_disable();
put_eilvt(offset);
preempt_enable();
- return ret;
+ return;
}
static void ibs_eilvt_setup(void)
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/export.h>
+#include <linux/watchdog.h>
#include <asm/cpufeature.h>
#include <asm/hardirq.h>
INTEL_EVENT_CONSTRAINT(0xcd, 0x8), /* MEM_TRANS_RETIRED.LOAD_LATENCY */
INTEL_UEVENT_CONSTRAINT(0x04a3, 0xf), /* CYCLE_ACTIVITY.CYCLES_NO_DISPATCH */
INTEL_UEVENT_CONSTRAINT(0x02a3, 0x4), /* CYCLE_ACTIVITY.CYCLES_L1D_PENDING */
+
+ INTEL_EXCLEVT_CONSTRAINT(0xd0, 0xf), /* MEM_UOPS_RETIRED.* */
+ INTEL_EXCLEVT_CONSTRAINT(0xd1, 0xf), /* MEM_LOAD_UOPS_RETIRED.* */
+ INTEL_EXCLEVT_CONSTRAINT(0xd2, 0xf), /* MEM_LOAD_UOPS_LLC_HIT_RETIRED.* */
+ INTEL_EXCLEVT_CONSTRAINT(0xd3, 0xf), /* MEM_LOAD_UOPS_LLC_MISS_RETIRED.* */
+
EVENT_CONSTRAINT_END
};
INTEL_UEVENT_CONSTRAINT(0x08a3, 0x4), /* CYCLE_ACTIVITY.CYCLES_L1D_PENDING */
INTEL_UEVENT_CONSTRAINT(0x0ca3, 0x4), /* CYCLE_ACTIVITY.STALLS_L1D_PENDING */
INTEL_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.PREC_DIST */
- /*
- * Errata BV98 -- MEM_*_RETIRED events can leak between counters of SMT
- * siblings; disable these events because they can corrupt unrelated
- * counters.
- */
- INTEL_EVENT_CONSTRAINT(0xd0, 0x0), /* MEM_UOPS_RETIRED.* */
- INTEL_EVENT_CONSTRAINT(0xd1, 0x0), /* MEM_LOAD_UOPS_RETIRED.* */
- INTEL_EVENT_CONSTRAINT(0xd2, 0x0), /* MEM_LOAD_UOPS_LLC_HIT_RETIRED.* */
- INTEL_EVENT_CONSTRAINT(0xd3, 0x0), /* MEM_LOAD_UOPS_LLC_MISS_RETIRED.* */
+
+ INTEL_EXCLEVT_CONSTRAINT(0xd0, 0xf), /* MEM_UOPS_RETIRED.* */
+ INTEL_EXCLEVT_CONSTRAINT(0xd1, 0xf), /* MEM_LOAD_UOPS_RETIRED.* */
+ INTEL_EXCLEVT_CONSTRAINT(0xd2, 0xf), /* MEM_LOAD_UOPS_LLC_HIT_RETIRED.* */
+ INTEL_EXCLEVT_CONSTRAINT(0xd3, 0xf), /* MEM_LOAD_UOPS_LLC_MISS_RETIRED.* */
+
EVENT_CONSTRAINT_END
};
INTEL_UEVENT_CONSTRAINT(0x0ca3, 0x4),
/* CYCLE_ACTIVITY.CYCLES_NO_EXECUTE */
INTEL_UEVENT_CONSTRAINT(0x04a3, 0xf),
+
+ INTEL_EXCLEVT_CONSTRAINT(0xd0, 0xf), /* MEM_UOPS_RETIRED.* */
+ INTEL_EXCLEVT_CONSTRAINT(0xd1, 0xf), /* MEM_LOAD_UOPS_RETIRED.* */
+ INTEL_EXCLEVT_CONSTRAINT(0xd2, 0xf), /* MEM_LOAD_UOPS_LLC_HIT_RETIRED.* */
+ INTEL_EXCLEVT_CONSTRAINT(0xd3, 0xf), /* MEM_LOAD_UOPS_LLC_MISS_RETIRED.* */
+
+ EVENT_CONSTRAINT_END
+};
+
+struct event_constraint intel_bdw_event_constraints[] = {
+ FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
+ FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
+ FIXED_EVENT_CONSTRAINT(0x0300, 2), /* CPU_CLK_UNHALTED.REF */
+ INTEL_UEVENT_CONSTRAINT(0x148, 0x4), /* L1D_PEND_MISS.PENDING */
+ INTEL_EVENT_CONSTRAINT(0xa3, 0x4), /* CYCLE_ACTIVITY.* */
EVENT_CONSTRAINT_END
};
};
+/*
+ * Notes on the events:
+ * - data reads do not include code reads (comparable to earlier tables)
+ * - data counts include speculative execution (except L1 write, dtlb, bpu)
+ * - remote node access includes remote memory, remote cache, remote mmio.
+ * - prefetches are not included in the counts because they are not
+ * reliably counted.
+ */
+
+#define HSW_DEMAND_DATA_RD BIT_ULL(0)
+#define HSW_DEMAND_RFO BIT_ULL(1)
+#define HSW_ANY_RESPONSE BIT_ULL(16)
+#define HSW_SUPPLIER_NONE BIT_ULL(17)
+#define HSW_L3_MISS_LOCAL_DRAM BIT_ULL(22)
+#define HSW_L3_MISS_REMOTE_HOP0 BIT_ULL(27)
+#define HSW_L3_MISS_REMOTE_HOP1 BIT_ULL(28)
+#define HSW_L3_MISS_REMOTE_HOP2P BIT_ULL(29)
+#define HSW_L3_MISS (HSW_L3_MISS_LOCAL_DRAM| \
+ HSW_L3_MISS_REMOTE_HOP0|HSW_L3_MISS_REMOTE_HOP1| \
+ HSW_L3_MISS_REMOTE_HOP2P)
+#define HSW_SNOOP_NONE BIT_ULL(31)
+#define HSW_SNOOP_NOT_NEEDED BIT_ULL(32)
+#define HSW_SNOOP_MISS BIT_ULL(33)
+#define HSW_SNOOP_HIT_NO_FWD BIT_ULL(34)
+#define HSW_SNOOP_HIT_WITH_FWD BIT_ULL(35)
+#define HSW_SNOOP_HITM BIT_ULL(36)
+#define HSW_SNOOP_NON_DRAM BIT_ULL(37)
+#define HSW_ANY_SNOOP (HSW_SNOOP_NONE| \
+ HSW_SNOOP_NOT_NEEDED|HSW_SNOOP_MISS| \
+ HSW_SNOOP_HIT_NO_FWD|HSW_SNOOP_HIT_WITH_FWD| \
+ HSW_SNOOP_HITM|HSW_SNOOP_NON_DRAM)
+#define HSW_SNOOP_DRAM (HSW_ANY_SNOOP & ~HSW_SNOOP_NON_DRAM)
+#define HSW_DEMAND_READ HSW_DEMAND_DATA_RD
+#define HSW_DEMAND_WRITE HSW_DEMAND_RFO
+#define HSW_L3_MISS_REMOTE (HSW_L3_MISS_REMOTE_HOP0|\
+ HSW_L3_MISS_REMOTE_HOP1|HSW_L3_MISS_REMOTE_HOP2P)
+#define HSW_LLC_ACCESS HSW_ANY_RESPONSE
+
+#define BDW_L3_MISS_LOCAL BIT(26)
+#define BDW_L3_MISS (BDW_L3_MISS_LOCAL| \
+ HSW_L3_MISS_REMOTE_HOP0|HSW_L3_MISS_REMOTE_HOP1| \
+ HSW_L3_MISS_REMOTE_HOP2P)
+
+
+static __initconst const u64 hsw_hw_cache_event_ids
+ [PERF_COUNT_HW_CACHE_MAX]
+ [PERF_COUNT_HW_CACHE_OP_MAX]
+ [PERF_COUNT_HW_CACHE_RESULT_MAX] =
+{
+ [ C(L1D ) ] = {
+ [ C(OP_READ) ] = {
+ [ C(RESULT_ACCESS) ] = 0x81d0, /* MEM_UOPS_RETIRED.ALL_LOADS */
+ [ C(RESULT_MISS) ] = 0x151, /* L1D.REPLACEMENT */
+ },
+ [ C(OP_WRITE) ] = {
+ [ C(RESULT_ACCESS) ] = 0x82d0, /* MEM_UOPS_RETIRED.ALL_STORES */
+ [ C(RESULT_MISS) ] = 0x0,
+ },
+ [ C(OP_PREFETCH) ] = {
+ [ C(RESULT_ACCESS) ] = 0x0,
+ [ C(RESULT_MISS) ] = 0x0,
+ },
+ },
+ [ C(L1I ) ] = {
+ [ C(OP_READ) ] = {
+ [ C(RESULT_ACCESS) ] = 0x0,
+ [ C(RESULT_MISS) ] = 0x280, /* ICACHE.MISSES */
+ },
+ [ C(OP_WRITE) ] = {
+ [ C(RESULT_ACCESS) ] = -1,
+ [ C(RESULT_MISS) ] = -1,
+ },
+ [ C(OP_PREFETCH) ] = {
+ [ C(RESULT_ACCESS) ] = 0x0,
+ [ C(RESULT_MISS) ] = 0x0,
+ },
+ },
+ [ C(LL ) ] = {
+ [ C(OP_READ) ] = {
+ [ C(RESULT_ACCESS) ] = 0x1b7, /* OFFCORE_RESPONSE */
+ [ C(RESULT_MISS) ] = 0x1b7, /* OFFCORE_RESPONSE */
+ },
+ [ C(OP_WRITE) ] = {
+ [ C(RESULT_ACCESS) ] = 0x1b7, /* OFFCORE_RESPONSE */
+ [ C(RESULT_MISS) ] = 0x1b7, /* OFFCORE_RESPONSE */
+ },
+ [ C(OP_PREFETCH) ] = {
+ [ C(RESULT_ACCESS) ] = 0x0,
+ [ C(RESULT_MISS) ] = 0x0,
+ },
+ },
+ [ C(DTLB) ] = {
+ [ C(OP_READ) ] = {
+ [ C(RESULT_ACCESS) ] = 0x81d0, /* MEM_UOPS_RETIRED.ALL_LOADS */
+ [ C(RESULT_MISS) ] = 0x108, /* DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK */
+ },
+ [ C(OP_WRITE) ] = {
+ [ C(RESULT_ACCESS) ] = 0x82d0, /* MEM_UOPS_RETIRED.ALL_STORES */
+ [ C(RESULT_MISS) ] = 0x149, /* DTLB_STORE_MISSES.MISS_CAUSES_A_WALK */
+ },
+ [ C(OP_PREFETCH) ] = {
+ [ C(RESULT_ACCESS) ] = 0x0,
+ [ C(RESULT_MISS) ] = 0x0,
+ },
+ },
+ [ C(ITLB) ] = {
+ [ C(OP_READ) ] = {
+ [ C(RESULT_ACCESS) ] = 0x6085, /* ITLB_MISSES.STLB_HIT */
+ [ C(RESULT_MISS) ] = 0x185, /* ITLB_MISSES.MISS_CAUSES_A_WALK */
+ },
+ [ C(OP_WRITE) ] = {
+ [ C(RESULT_ACCESS) ] = -1,
+ [ C(RESULT_MISS) ] = -1,
+ },
+ [ C(OP_PREFETCH) ] = {
+ [ C(RESULT_ACCESS) ] = -1,
+ [ C(RESULT_MISS) ] = -1,
+ },
+ },
+ [ C(BPU ) ] = {
+ [ C(OP_READ) ] = {
+ [ C(RESULT_ACCESS) ] = 0xc4, /* BR_INST_RETIRED.ALL_BRANCHES */
+ [ C(RESULT_MISS) ] = 0xc5, /* BR_MISP_RETIRED.ALL_BRANCHES */
+ },
+ [ C(OP_WRITE) ] = {
+ [ C(RESULT_ACCESS) ] = -1,
+ [ C(RESULT_MISS) ] = -1,
+ },
+ [ C(OP_PREFETCH) ] = {
+ [ C(RESULT_ACCESS) ] = -1,
+ [ C(RESULT_MISS) ] = -1,
+ },
+ },
+ [ C(NODE) ] = {
+ [ C(OP_READ) ] = {
+ [ C(RESULT_ACCESS) ] = 0x1b7, /* OFFCORE_RESPONSE */
+ [ C(RESULT_MISS) ] = 0x1b7, /* OFFCORE_RESPONSE */
+ },
+ [ C(OP_WRITE) ] = {
+ [ C(RESULT_ACCESS) ] = 0x1b7, /* OFFCORE_RESPONSE */
+ [ C(RESULT_MISS) ] = 0x1b7, /* OFFCORE_RESPONSE */
+ },
+ [ C(OP_PREFETCH) ] = {
+ [ C(RESULT_ACCESS) ] = 0x0,
+ [ C(RESULT_MISS) ] = 0x0,
+ },
+ },
+};
+
+static __initconst const u64 hsw_hw_cache_extra_regs
+ [PERF_COUNT_HW_CACHE_MAX]
+ [PERF_COUNT_HW_CACHE_OP_MAX]
+ [PERF_COUNT_HW_CACHE_RESULT_MAX] =
+{
+ [ C(LL ) ] = {
+ [ C(OP_READ) ] = {
+ [ C(RESULT_ACCESS) ] = HSW_DEMAND_READ|
+ HSW_LLC_ACCESS,
+ [ C(RESULT_MISS) ] = HSW_DEMAND_READ|
+ HSW_L3_MISS|HSW_ANY_SNOOP,
+ },
+ [ C(OP_WRITE) ] = {
+ [ C(RESULT_ACCESS) ] = HSW_DEMAND_WRITE|
+ HSW_LLC_ACCESS,
+ [ C(RESULT_MISS) ] = HSW_DEMAND_WRITE|
+ HSW_L3_MISS|HSW_ANY_SNOOP,
+ },
+ [ C(OP_PREFETCH) ] = {
+ [ C(RESULT_ACCESS) ] = 0x0,
+ [ C(RESULT_MISS) ] = 0x0,
+ },
+ },
+ [ C(NODE) ] = {
+ [ C(OP_READ) ] = {
+ [ C(RESULT_ACCESS) ] = HSW_DEMAND_READ|
+ HSW_L3_MISS_LOCAL_DRAM|
+ HSW_SNOOP_DRAM,
+ [ C(RESULT_MISS) ] = HSW_DEMAND_READ|
+ HSW_L3_MISS_REMOTE|
+ HSW_SNOOP_DRAM,
+ },
+ [ C(OP_WRITE) ] = {
+ [ C(RESULT_ACCESS) ] = HSW_DEMAND_WRITE|
+ HSW_L3_MISS_LOCAL_DRAM|
+ HSW_SNOOP_DRAM,
+ [ C(RESULT_MISS) ] = HSW_DEMAND_WRITE|
+ HSW_L3_MISS_REMOTE|
+ HSW_SNOOP_DRAM,
+ },
+ [ C(OP_PREFETCH) ] = {
+ [ C(RESULT_ACCESS) ] = 0x0,
+ [ C(RESULT_MISS) ] = 0x0,
+ },
+ },
+};
+
static __initconst const u64 westmere_hw_cache_event_ids
[PERF_COUNT_HW_CACHE_MAX]
[PERF_COUNT_HW_CACHE_OP_MAX]
},
};
-static inline bool intel_pmu_needs_lbr_smpl(struct perf_event *event)
-{
- /* user explicitly requested branch sampling */
- if (has_branch_stack(event))
- return true;
-
- /* implicit branch sampling to correct PEBS skid */
- if (x86_pmu.intel_cap.pebs_trap && event->attr.precise_ip > 1 &&
- x86_pmu.intel_cap.pebs_format < 2)
- return true;
-
- return false;
-}
-
-static void intel_pmu_disable_all(void)
+/*
+ * Use from PMIs where the LBRs are already disabled.
+ */
+static void __intel_pmu_disable_all(void)
{
struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
if (test_bit(INTEL_PMC_IDX_FIXED_BTS, cpuc->active_mask))
intel_pmu_disable_bts();
+ else
+ intel_bts_disable_local();
intel_pmu_pebs_disable_all();
+}
+
+static void intel_pmu_disable_all(void)
+{
+ __intel_pmu_disable_all();
intel_pmu_lbr_disable_all();
}
-static void intel_pmu_enable_all(int added)
+static void __intel_pmu_enable_all(int added, bool pmi)
{
struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
intel_pmu_pebs_enable_all();
- intel_pmu_lbr_enable_all();
+ intel_pmu_lbr_enable_all(pmi);
wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL,
x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_guest_mask);
return;
intel_pmu_enable_bts(event->hw.config);
- }
+ } else
+ intel_bts_enable_local();
+}
+
+static void intel_pmu_enable_all(int added)
+{
+ __intel_pmu_enable_all(added, false);
}
/*
* must disable before any actual event
* because any event may be combined with LBR
*/
- if (intel_pmu_needs_lbr_smpl(event))
+ if (needs_branch_stack(event))
intel_pmu_lbr_disable(event);
if (unlikely(hwc->config_base == MSR_ARCH_PERFMON_FIXED_CTR_CTRL)) {
* must enabled before any actual event
* because any event may be combined with LBR
*/
- if (intel_pmu_needs_lbr_smpl(event))
+ if (needs_branch_stack(event))
intel_pmu_lbr_enable(event);
if (event->attr.exclude_host)
if (ds)
ds->bts_index = ds->bts_buffer_base;
+ /* Ack all overflows and disable fixed counters */
+ if (x86_pmu.version >= 2) {
+ intel_pmu_ack_status(intel_pmu_get_status());
+ wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0);
+ }
+
+ /* Reset LBRs and LBR freezing */
+ if (x86_pmu.lbr_nr) {
+ update_debugctlmsr(get_debugctlmsr() &
+ ~(DEBUGCTLMSR_FREEZE_LBRS_ON_PMI|DEBUGCTLMSR_LBR));
+ }
+
local_irq_restore(flags);
}
*/
if (!x86_pmu.late_ack)
apic_write(APIC_LVTPC, APIC_DM_NMI);
- intel_pmu_disable_all();
+ __intel_pmu_disable_all();
handled = intel_pmu_drain_bts_buffer();
+ handled += intel_bts_interrupt();
status = intel_pmu_get_status();
if (!status)
goto done;
x86_pmu.drain_pebs(regs);
}
+ /*
+ * Intel PT
+ */
+ if (__test_and_clear_bit(55, (unsigned long *)&status)) {
+ handled++;
+ intel_pt_interrupt();
+ }
+
/*
* Checkpointed counters can lead to 'spurious' PMIs because the
* rollback caused by the PMI will have cleared the overflow status
goto again;
done:
- intel_pmu_enable_all(0);
+ __intel_pmu_enable_all(0, true);
/*
* Only unmask the NMI after the overflow counters
* have been reset. This avoids spurious NMIs on
static int intel_alt_er(int idx)
{
- if (!(x86_pmu.er_flags & ERF_HAS_RSP_1))
+ if (!(x86_pmu.flags & PMU_FL_HAS_RSP_1))
return idx;
if (idx == EXTRA_REG_RSP_0)
}
struct event_constraint *
-x86_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)
+x86_get_event_constraints(struct cpu_hw_events *cpuc, int idx,
+ struct perf_event *event)
{
struct event_constraint *c;
}
static struct event_constraint *
-intel_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)
+__intel_get_event_constraints(struct cpu_hw_events *cpuc, int idx,
+ struct perf_event *event)
{
struct event_constraint *c;
if (c)
return c;
- return x86_get_event_constraints(cpuc, event);
+ return x86_get_event_constraints(cpuc, idx, event);
+}
+
+static void
+intel_start_scheduling(struct cpu_hw_events *cpuc)
+{
+ struct intel_excl_cntrs *excl_cntrs = cpuc->excl_cntrs;
+ struct intel_excl_states *xl, *xlo;
+ int tid = cpuc->excl_thread_id;
+ int o_tid = 1 - tid; /* sibling thread */
+
+ /*
+ * nothing needed if in group validation mode
+ */
+ if (cpuc->is_fake || !is_ht_workaround_enabled())
+ return;
+
+ /*
+ * no exclusion needed
+ */
+ if (!excl_cntrs)
+ return;
+
+ xlo = &excl_cntrs->states[o_tid];
+ xl = &excl_cntrs->states[tid];
+
+ xl->sched_started = true;
+ xl->num_alloc_cntrs = 0;
+ /*
+ * lock shared state until we are done scheduling
+ * in stop_event_scheduling()
+ * makes scheduling appear as a transaction
+ */
+ WARN_ON_ONCE(!irqs_disabled());
+ raw_spin_lock(&excl_cntrs->lock);
+
+ /*
+ * save initial state of sibling thread
+ */
+ memcpy(xlo->init_state, xlo->state, sizeof(xlo->init_state));
+}
+
+static void
+intel_stop_scheduling(struct cpu_hw_events *cpuc)
+{
+ struct intel_excl_cntrs *excl_cntrs = cpuc->excl_cntrs;
+ struct intel_excl_states *xl, *xlo;
+ int tid = cpuc->excl_thread_id;
+ int o_tid = 1 - tid; /* sibling thread */
+
+ /*
+ * nothing needed if in group validation mode
+ */
+ if (cpuc->is_fake || !is_ht_workaround_enabled())
+ return;
+ /*
+ * no exclusion needed
+ */
+ if (!excl_cntrs)
+ return;
+
+ xlo = &excl_cntrs->states[o_tid];
+ xl = &excl_cntrs->states[tid];
+
+ /*
+ * make new sibling thread state visible
+ */
+ memcpy(xlo->state, xlo->init_state, sizeof(xlo->state));
+
+ xl->sched_started = false;
+ /*
+ * release shared state lock (acquired in intel_start_scheduling())
+ */
+ raw_spin_unlock(&excl_cntrs->lock);
+}
+
+static struct event_constraint *
+intel_get_excl_constraints(struct cpu_hw_events *cpuc, struct perf_event *event,
+ int idx, struct event_constraint *c)
+{
+ struct event_constraint *cx;
+ struct intel_excl_cntrs *excl_cntrs = cpuc->excl_cntrs;
+ struct intel_excl_states *xl, *xlo;
+ int is_excl, i;
+ int tid = cpuc->excl_thread_id;
+ int o_tid = 1 - tid; /* alternate */
+
+ /*
+ * validating a group does not require
+ * enforcing cross-thread exclusion
+ */
+ if (cpuc->is_fake || !is_ht_workaround_enabled())
+ return c;
+
+ /*
+ * no exclusion needed
+ */
+ if (!excl_cntrs)
+ return c;
+ /*
+ * event requires exclusive counter access
+ * across HT threads
+ */
+ is_excl = c->flags & PERF_X86_EVENT_EXCL;
+
+ /*
+ * xl = state of current HT
+ * xlo = state of sibling HT
+ */
+ xl = &excl_cntrs->states[tid];
+ xlo = &excl_cntrs->states[o_tid];
+
+ /*
+ * do not allow scheduling of more than max_alloc_cntrs
+ * which is set to half the available generic counters.
+ * this helps avoid counter starvation of sibling thread
+ * by ensuring at most half the counters cannot be in
+ * exclusive mode. There is not designated counters for the
+ * limits. Any N/2 counters can be used. This helps with
+ * events with specifix counter constraints
+ */
+ if (xl->num_alloc_cntrs++ == xl->max_alloc_cntrs)
+ return &emptyconstraint;
+
+ cx = c;
+
+ /*
+ * because we modify the constraint, we need
+ * to make a copy. Static constraints come
+ * from static const tables.
+ *
+ * only needed when constraint has not yet
+ * been cloned (marked dynamic)
+ */
+ if (!(c->flags & PERF_X86_EVENT_DYNAMIC)) {
+
+ /* sanity check */
+ if (idx < 0)
+ return &emptyconstraint;
+
+ /*
+ * grab pre-allocated constraint entry
+ */
+ cx = &cpuc->constraint_list[idx];
+
+ /*
+ * initialize dynamic constraint
+ * with static constraint
+ */
+ memcpy(cx, c, sizeof(*cx));
+
+ /*
+ * mark constraint as dynamic, so we
+ * can free it later on
+ */
+ cx->flags |= PERF_X86_EVENT_DYNAMIC;
+ }
+
+ /*
+ * From here on, the constraint is dynamic.
+ * Either it was just allocated above, or it
+ * was allocated during a earlier invocation
+ * of this function
+ */
+
+ /*
+ * Modify static constraint with current dynamic
+ * state of thread
+ *
+ * EXCLUSIVE: sibling counter measuring exclusive event
+ * SHARED : sibling counter measuring non-exclusive event
+ * UNUSED : sibling counter unused
+ */
+ for_each_set_bit(i, cx->idxmsk, X86_PMC_IDX_MAX) {
+ /*
+ * exclusive event in sibling counter
+ * our corresponding counter cannot be used
+ * regardless of our event
+ */
+ if (xl->state[i] == INTEL_EXCL_EXCLUSIVE)
+ __clear_bit(i, cx->idxmsk);
+ /*
+ * if measuring an exclusive event, sibling
+ * measuring non-exclusive, then counter cannot
+ * be used
+ */
+ if (is_excl && xl->state[i] == INTEL_EXCL_SHARED)
+ __clear_bit(i, cx->idxmsk);
+ }
+
+ /*
+ * recompute actual bit weight for scheduling algorithm
+ */
+ cx->weight = hweight64(cx->idxmsk64);
+
+ /*
+ * if we return an empty mask, then switch
+ * back to static empty constraint to avoid
+ * the cost of freeing later on
+ */
+ if (cx->weight == 0)
+ cx = &emptyconstraint;
+
+ return cx;
+}
+
+static struct event_constraint *
+intel_get_event_constraints(struct cpu_hw_events *cpuc, int idx,
+ struct perf_event *event)
+{
+ struct event_constraint *c1 = event->hw.constraint;
+ struct event_constraint *c2;
+
+ /*
+ * first time only
+ * - static constraint: no change across incremental scheduling calls
+ * - dynamic constraint: handled by intel_get_excl_constraints()
+ */
+ c2 = __intel_get_event_constraints(cpuc, idx, event);
+ if (c1 && (c1->flags & PERF_X86_EVENT_DYNAMIC)) {
+ bitmap_copy(c1->idxmsk, c2->idxmsk, X86_PMC_IDX_MAX);
+ c1->weight = c2->weight;
+ c2 = c1;
+ }
+
+ if (cpuc->excl_cntrs)
+ return intel_get_excl_constraints(cpuc, event, idx, c2);
+
+ return c2;
+}
+
+static void intel_put_excl_constraints(struct cpu_hw_events *cpuc,
+ struct perf_event *event)
+{
+ struct hw_perf_event *hwc = &event->hw;
+ struct intel_excl_cntrs *excl_cntrs = cpuc->excl_cntrs;
+ struct intel_excl_states *xlo, *xl;
+ unsigned long flags = 0; /* keep compiler happy */
+ int tid = cpuc->excl_thread_id;
+ int o_tid = 1 - tid;
+
+ /*
+ * nothing needed if in group validation mode
+ */
+ if (cpuc->is_fake)
+ return;
+
+ WARN_ON_ONCE(!excl_cntrs);
+
+ if (!excl_cntrs)
+ return;
+
+ xl = &excl_cntrs->states[tid];
+ xlo = &excl_cntrs->states[o_tid];
+
+ /*
+ * put_constraint may be called from x86_schedule_events()
+ * which already has the lock held so here make locking
+ * conditional
+ */
+ if (!xl->sched_started)
+ raw_spin_lock_irqsave(&excl_cntrs->lock, flags);
+
+ /*
+ * if event was actually assigned, then mark the
+ * counter state as unused now
+ */
+ if (hwc->idx >= 0)
+ xlo->state[hwc->idx] = INTEL_EXCL_UNUSED;
+
+ if (!xl->sched_started)
+ raw_spin_unlock_irqrestore(&excl_cntrs->lock, flags);
}
static void
static void intel_put_event_constraints(struct cpu_hw_events *cpuc,
struct perf_event *event)
{
+ struct event_constraint *c = event->hw.constraint;
+
intel_put_shared_regs_event_constraints(cpuc, event);
+
+ /*
+ * is PMU has exclusive counter restrictions, then
+ * all events are subject to and must call the
+ * put_excl_constraints() routine
+ */
+ if (c && cpuc->excl_cntrs)
+ intel_put_excl_constraints(cpuc, event);
+
+ /* cleanup dynamic constraint */
+ if (c && (c->flags & PERF_X86_EVENT_DYNAMIC))
+ event->hw.constraint = NULL;
+}
+
+static void intel_commit_scheduling(struct cpu_hw_events *cpuc,
+ struct perf_event *event, int cntr)
+{
+ struct intel_excl_cntrs *excl_cntrs = cpuc->excl_cntrs;
+ struct event_constraint *c = event->hw.constraint;
+ struct intel_excl_states *xlo, *xl;
+ int tid = cpuc->excl_thread_id;
+ int o_tid = 1 - tid;
+ int is_excl;
+
+ if (cpuc->is_fake || !c)
+ return;
+
+ is_excl = c->flags & PERF_X86_EVENT_EXCL;
+
+ if (!(c->flags & PERF_X86_EVENT_DYNAMIC))
+ return;
+
+ WARN_ON_ONCE(!excl_cntrs);
+
+ if (!excl_cntrs)
+ return;
+
+ xl = &excl_cntrs->states[tid];
+ xlo = &excl_cntrs->states[o_tid];
+
+ WARN_ON_ONCE(!raw_spin_is_locked(&excl_cntrs->lock));
+
+ if (cntr >= 0) {
+ if (is_excl)
+ xlo->init_state[cntr] = INTEL_EXCL_EXCLUSIVE;
+ else
+ xlo->init_state[cntr] = INTEL_EXCL_SHARED;
+ }
}
static void intel_pebs_aliases_core2(struct perf_event *event)
if (event->attr.precise_ip && x86_pmu.pebs_aliases)
x86_pmu.pebs_aliases(event);
- if (intel_pmu_needs_lbr_smpl(event)) {
+ if (needs_branch_stack(event)) {
ret = intel_pmu_setup_lbr_filter(event);
if (ret)
return ret;
+
+ /*
+ * BTS is set up earlier in this path, so don't account twice
+ */
+ if (!intel_pmu_has_bts(event)) {
+ /* disallow lbr if conflicting events are present */
+ if (x86_add_exclusive(x86_lbr_exclusive_lbr))
+ return -EBUSY;
+
+ event->destroy = hw_perf_lbr_event_destroy;
+ }
}
if (event->attr.type != PERF_TYPE_RAW)
EVENT_CONSTRAINT(0, 0x4, 0);
static struct event_constraint *
-hsw_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)
+hsw_get_event_constraints(struct cpu_hw_events *cpuc, int idx,
+ struct perf_event *event)
{
- struct event_constraint *c = intel_get_event_constraints(cpuc, event);
+ struct event_constraint *c;
+
+ c = intel_get_event_constraints(cpuc, idx, event);
/* Handle special quirk on in_tx_checkpointed only in counter 2 */
if (event->hw.config & HSW_IN_TX_CHECKPOINTED) {
return c;
}
+/*
+ * Broadwell:
+ *
+ * The INST_RETIRED.ALL period always needs to have lowest 6 bits cleared
+ * (BDM55) and it must not use a period smaller than 100 (BDM11). We combine
+ * the two to enforce a minimum period of 128 (the smallest value that has bits
+ * 0-5 cleared and >= 100).
+ *
+ * Because of how the code in x86_perf_event_set_period() works, the truncation
+ * of the lower 6 bits is 'harmless' as we'll occasionally add a longer period
+ * to make up for the 'lost' events due to carrying the 'error' in period_left.
+ *
+ * Therefore the effective (average) period matches the requested period,
+ * despite coarser hardware granularity.
+ */
+static unsigned bdw_limit_period(struct perf_event *event, unsigned left)
+{
+ if ((event->hw.config & INTEL_ARCH_EVENT_MASK) ==
+ X86_CONFIG(.event=0xc0, .umask=0x01)) {
+ if (left < 128)
+ left = 128;
+ left &= ~0x3fu;
+ }
+ return left;
+}
+
PMU_FORMAT_ATTR(event, "config:0-7" );
PMU_FORMAT_ATTR(umask, "config:8-15" );
PMU_FORMAT_ATTR(edge, "config:18" );
return regs;
}
+static struct intel_excl_cntrs *allocate_excl_cntrs(int cpu)
+{
+ struct intel_excl_cntrs *c;
+ int i;
+
+ c = kzalloc_node(sizeof(struct intel_excl_cntrs),
+ GFP_KERNEL, cpu_to_node(cpu));
+ if (c) {
+ raw_spin_lock_init(&c->lock);
+ for (i = 0; i < X86_PMC_IDX_MAX; i++) {
+ c->states[0].state[i] = INTEL_EXCL_UNUSED;
+ c->states[0].init_state[i] = INTEL_EXCL_UNUSED;
+
+ c->states[1].state[i] = INTEL_EXCL_UNUSED;
+ c->states[1].init_state[i] = INTEL_EXCL_UNUSED;
+ }
+ c->core_id = -1;
+ }
+ return c;
+}
+
static int intel_pmu_cpu_prepare(int cpu)
{
struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
- if (!(x86_pmu.extra_regs || x86_pmu.lbr_sel_map))
- return NOTIFY_OK;
+ if (x86_pmu.extra_regs || x86_pmu.lbr_sel_map) {
+ cpuc->shared_regs = allocate_shared_regs(cpu);
+ if (!cpuc->shared_regs)
+ return NOTIFY_BAD;
+ }
- cpuc->shared_regs = allocate_shared_regs(cpu);
- if (!cpuc->shared_regs)
- return NOTIFY_BAD;
+ if (x86_pmu.flags & PMU_FL_EXCL_CNTRS) {
+ size_t sz = X86_PMC_IDX_MAX * sizeof(struct event_constraint);
+
+ cpuc->constraint_list = kzalloc(sz, GFP_KERNEL);
+ if (!cpuc->constraint_list)
+ return NOTIFY_BAD;
+
+ cpuc->excl_cntrs = allocate_excl_cntrs(cpu);
+ if (!cpuc->excl_cntrs) {
+ kfree(cpuc->constraint_list);
+ kfree(cpuc->shared_regs);
+ return NOTIFY_BAD;
+ }
+ cpuc->excl_thread_id = 0;
+ }
return NOTIFY_OK;
}
if (!cpuc->shared_regs)
return;
- if (!(x86_pmu.er_flags & ERF_NO_HT_SHARING)) {
+ if (!(x86_pmu.flags & PMU_FL_NO_HT_SHARING)) {
+ void **onln = &cpuc->kfree_on_online[X86_PERF_KFREE_SHARED];
+
for_each_cpu(i, topology_thread_cpumask(cpu)) {
struct intel_shared_regs *pc;
pc = per_cpu(cpu_hw_events, i).shared_regs;
if (pc && pc->core_id == core_id) {
- cpuc->kfree_on_online = cpuc->shared_regs;
+ *onln = cpuc->shared_regs;
cpuc->shared_regs = pc;
break;
}
if (x86_pmu.lbr_sel_map)
cpuc->lbr_sel = &cpuc->shared_regs->regs[EXTRA_REG_LBR];
+
+ if (x86_pmu.flags & PMU_FL_EXCL_CNTRS) {
+ int h = x86_pmu.num_counters >> 1;
+
+ for_each_cpu(i, topology_thread_cpumask(cpu)) {
+ struct intel_excl_cntrs *c;
+
+ c = per_cpu(cpu_hw_events, i).excl_cntrs;
+ if (c && c->core_id == core_id) {
+ cpuc->kfree_on_online[1] = cpuc->excl_cntrs;
+ cpuc->excl_cntrs = c;
+ cpuc->excl_thread_id = 1;
+ break;
+ }
+ }
+ cpuc->excl_cntrs->core_id = core_id;
+ cpuc->excl_cntrs->refcnt++;
+ /*
+ * set hard limit to half the number of generic counters
+ */
+ cpuc->excl_cntrs->states[0].max_alloc_cntrs = h;
+ cpuc->excl_cntrs->states[1].max_alloc_cntrs = h;
+ }
+}
+
+static void free_excl_cntrs(int cpu)
+{
+ struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
+ struct intel_excl_cntrs *c;
+
+ c = cpuc->excl_cntrs;
+ if (c) {
+ if (c->core_id == -1 || --c->refcnt == 0)
+ kfree(c);
+ cpuc->excl_cntrs = NULL;
+ kfree(cpuc->constraint_list);
+ cpuc->constraint_list = NULL;
+ }
}
static void intel_pmu_cpu_dying(int cpu)
cpuc->shared_regs = NULL;
}
- fini_debug_store_on_cpu(cpu);
-}
+ free_excl_cntrs(cpu);
-static void intel_pmu_flush_branch_stack(void)
-{
- /*
- * Intel LBR does not tag entries with the
- * PID of the current task, then we need to
- * flush it on ctxsw
- * For now, we simply reset it
- */
- if (x86_pmu.lbr_nr)
- intel_pmu_lbr_reset();
+ fini_debug_store_on_cpu(cpu);
}
PMU_FORMAT_ATTR(offcore_rsp, "config1:0-63");
.cpu_starting = intel_pmu_cpu_starting,
.cpu_dying = intel_pmu_cpu_dying,
.guest_get_msrs = intel_guest_get_msrs,
- .flush_branch_stack = intel_pmu_flush_branch_stack,
+ .sched_task = intel_pmu_lbr_sched_task,
};
static __init void intel_clovertown_quirk(void)
}
}
+/*
+ * enable software workaround for errata:
+ * SNB: BJ122
+ * IVB: BV98
+ * HSW: HSD29
+ *
+ * Only needed when HT is enabled. However detecting
+ * if HT is enabled is difficult (model specific). So instead,
+ * we enable the workaround in the early boot, and verify if
+ * it is needed in a later initcall phase once we have valid
+ * topology information to check if HT is actually enabled
+ */
+static __init void intel_ht_bug(void)
+{
+ x86_pmu.flags |= PMU_FL_EXCL_CNTRS | PMU_FL_EXCL_ENABLED;
+
+ x86_pmu.commit_scheduling = intel_commit_scheduling;
+ x86_pmu.start_scheduling = intel_start_scheduling;
+ x86_pmu.stop_scheduling = intel_stop_scheduling;
+}
+
EVENT_ATTR_STR(mem-loads, mem_ld_hsw, "event=0xcd,umask=0x1,ldlat=3");
EVENT_ATTR_STR(mem-stores, mem_st_hsw, "event=0xd0,umask=0x82")
x86_pmu.event_constraints = intel_slm_event_constraints;
x86_pmu.pebs_constraints = intel_slm_pebs_event_constraints;
x86_pmu.extra_regs = intel_slm_extra_regs;
- x86_pmu.er_flags |= ERF_HAS_RSP_1;
+ x86_pmu.flags |= PMU_FL_HAS_RSP_1;
pr_cont("Silvermont events, ");
break;
x86_pmu.enable_all = intel_pmu_nhm_enable_all;
x86_pmu.pebs_constraints = intel_westmere_pebs_event_constraints;
x86_pmu.extra_regs = intel_westmere_extra_regs;
- x86_pmu.er_flags |= ERF_HAS_RSP_1;
+ x86_pmu.flags |= PMU_FL_HAS_RSP_1;
x86_pmu.cpu_events = nhm_events_attrs;
case 42: /* 32nm SandyBridge */
case 45: /* 32nm SandyBridge-E/EN/EP */
x86_add_quirk(intel_sandybridge_quirk);
+ x86_add_quirk(intel_ht_bug);
memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, snb_hw_cache_extra_regs,
x86_pmu.extra_regs = intel_snbep_extra_regs;
else
x86_pmu.extra_regs = intel_snb_extra_regs;
+
+
/* all extra regs are per-cpu when HT is on */
- x86_pmu.er_flags |= ERF_HAS_RSP_1;
- x86_pmu.er_flags |= ERF_NO_HT_SHARING;
+ x86_pmu.flags |= PMU_FL_HAS_RSP_1;
+ x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
x86_pmu.cpu_events = snb_events_attrs;
case 58: /* 22nm IvyBridge */
case 62: /* 22nm IvyBridge-EP/EX */
+ x86_add_quirk(intel_ht_bug);
memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
/* dTLB-load-misses on IVB is different than SNB */
else
x86_pmu.extra_regs = intel_snb_extra_regs;
/* all extra regs are per-cpu when HT is on */
- x86_pmu.er_flags |= ERF_HAS_RSP_1;
- x86_pmu.er_flags |= ERF_NO_HT_SHARING;
+ x86_pmu.flags |= PMU_FL_HAS_RSP_1;
+ x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
x86_pmu.cpu_events = snb_events_attrs;
case 63: /* 22nm Haswell Server */
case 69: /* 22nm Haswell ULT */
case 70: /* 22nm Haswell + GT3e (Intel Iris Pro graphics) */
+ x86_add_quirk(intel_ht_bug);
x86_pmu.late_ack = true;
- memcpy(hw_cache_event_ids, snb_hw_cache_event_ids, sizeof(hw_cache_event_ids));
- memcpy(hw_cache_extra_regs, snb_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));
+ memcpy(hw_cache_event_ids, hsw_hw_cache_event_ids, sizeof(hw_cache_event_ids));
+ memcpy(hw_cache_extra_regs, hsw_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));
- intel_pmu_lbr_init_snb();
+ intel_pmu_lbr_init_hsw();
x86_pmu.event_constraints = intel_hsw_event_constraints;
x86_pmu.pebs_constraints = intel_hsw_pebs_event_constraints;
x86_pmu.extra_regs = intel_snbep_extra_regs;
x86_pmu.pebs_aliases = intel_pebs_aliases_snb;
/* all extra regs are per-cpu when HT is on */
- x86_pmu.er_flags |= ERF_HAS_RSP_1;
- x86_pmu.er_flags |= ERF_NO_HT_SHARING;
+ x86_pmu.flags |= PMU_FL_HAS_RSP_1;
+ x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
x86_pmu.hw_config = hsw_hw_config;
x86_pmu.get_event_constraints = hsw_get_event_constraints;
pr_cont("Haswell events, ");
break;
+ case 61: /* 14nm Broadwell Core-M */
+ case 86: /* 14nm Broadwell Xeon D */
+ x86_pmu.late_ack = true;
+ memcpy(hw_cache_event_ids, hsw_hw_cache_event_ids, sizeof(hw_cache_event_ids));
+ memcpy(hw_cache_extra_regs, hsw_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));
+
+ /* L3_MISS_LOCAL_DRAM is BIT(26) in Broadwell */
+ hw_cache_extra_regs[C(LL)][C(OP_READ)][C(RESULT_MISS)] = HSW_DEMAND_READ |
+ BDW_L3_MISS|HSW_SNOOP_DRAM;
+ hw_cache_extra_regs[C(LL)][C(OP_WRITE)][C(RESULT_MISS)] = HSW_DEMAND_WRITE|BDW_L3_MISS|
+ HSW_SNOOP_DRAM;
+ hw_cache_extra_regs[C(NODE)][C(OP_READ)][C(RESULT_ACCESS)] = HSW_DEMAND_READ|
+ BDW_L3_MISS_LOCAL|HSW_SNOOP_DRAM;
+ hw_cache_extra_regs[C(NODE)][C(OP_WRITE)][C(RESULT_ACCESS)] = HSW_DEMAND_WRITE|
+ BDW_L3_MISS_LOCAL|HSW_SNOOP_DRAM;
+
+ intel_pmu_lbr_init_snb();
+
+ x86_pmu.event_constraints = intel_bdw_event_constraints;
+ x86_pmu.pebs_constraints = intel_hsw_pebs_event_constraints;
+ x86_pmu.extra_regs = intel_snbep_extra_regs;
+ x86_pmu.pebs_aliases = intel_pebs_aliases_snb;
+ /* all extra regs are per-cpu when HT is on */
+ x86_pmu.flags |= PMU_FL_HAS_RSP_1;
+ x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
+
+ x86_pmu.hw_config = hsw_hw_config;
+ x86_pmu.get_event_constraints = hsw_get_event_constraints;
+ x86_pmu.cpu_events = hsw_events_attrs;
+ x86_pmu.limit_period = bdw_limit_period;
+ pr_cont("Broadwell events, ");
+ break;
+
default:
switch (x86_pmu.version) {
case 1:
return 0;
}
+
+/*
+ * HT bug: phase 2 init
+ * Called once we have valid topology information to check
+ * whether or not HT is enabled
+ * If HT is off, then we disable the workaround
+ */
+static __init int fixup_ht_bug(void)
+{
+ int cpu = smp_processor_id();
+ int w, c;
+ /*
+ * problem not present on this CPU model, nothing to do
+ */
+ if (!(x86_pmu.flags & PMU_FL_EXCL_ENABLED))
+ return 0;
+
+ w = cpumask_weight(topology_thread_cpumask(cpu));
+ if (w > 1) {
+ pr_info("PMU erratum BJ122, BV98, HSD29 worked around, HT is on\n");
+ return 0;
+ }
+
+ watchdog_nmi_disable_all();
+
+ x86_pmu.flags &= ~(PMU_FL_EXCL_CNTRS | PMU_FL_EXCL_ENABLED);
+
+ x86_pmu.commit_scheduling = NULL;
+ x86_pmu.start_scheduling = NULL;
+ x86_pmu.stop_scheduling = NULL;
+
+ watchdog_nmi_enable_all();
+
+ get_online_cpus();
+
+ for_each_online_cpu(c) {
+ free_excl_cntrs(c);
+ }
+
+ put_online_cpus();
+ pr_info("PMU erratum BJ122, BV98, HSD29 workaround disabled, HT off\n");
+ return 0;
+}
+subsys_initcall(fixup_ht_bug)
--- /dev/null
+/*
+ * BTS PMU driver for perf
+ * Copyright (c) 2013-2014, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#undef DEBUG
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include <linux/bitops.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/debugfs.h>
+#include <linux/device.h>
+#include <linux/coredump.h>
+
+#include <asm-generic/sizes.h>
+#include <asm/perf_event.h>
+
+#include "perf_event.h"
+
+struct bts_ctx {
+ struct perf_output_handle handle;
+ struct debug_store ds_back;
+ int started;
+};
+
+static DEFINE_PER_CPU(struct bts_ctx, bts_ctx);
+
+#define BTS_RECORD_SIZE 24
+#define BTS_SAFETY_MARGIN 4080
+
+struct bts_phys {
+ struct page *page;
+ unsigned long size;
+ unsigned long offset;
+ unsigned long displacement;
+};
+
+struct bts_buffer {
+ size_t real_size; /* multiple of BTS_RECORD_SIZE */
+ unsigned int nr_pages;
+ unsigned int nr_bufs;
+ unsigned int cur_buf;
+ bool snapshot;
+ local_t data_size;
+ local_t lost;
+ local_t head;
+ unsigned long end;
+ void **data_pages;
+ struct bts_phys buf[0];
+};
+
+struct pmu bts_pmu;
+
+void intel_pmu_enable_bts(u64 config);
+void intel_pmu_disable_bts(void);
+
+static size_t buf_size(struct page *page)
+{
+ return 1 << (PAGE_SHIFT + page_private(page));
+}
+
+static void *
+bts_buffer_setup_aux(int cpu, void **pages, int nr_pages, bool overwrite)
+{
+ struct bts_buffer *buf;
+ struct page *page;
+ int node = (cpu == -1) ? cpu : cpu_to_node(cpu);
+ unsigned long offset;
+ size_t size = nr_pages << PAGE_SHIFT;
+ int pg, nbuf, pad;
+
+ /* count all the high order buffers */
+ for (pg = 0, nbuf = 0; pg < nr_pages;) {
+ page = virt_to_page(pages[pg]);
+ if (WARN_ON_ONCE(!PagePrivate(page) && nr_pages > 1))
+ return NULL;
+ pg += 1 << page_private(page);
+ nbuf++;
+ }
+
+ /*
+ * to avoid interrupts in overwrite mode, only allow one physical
+ */
+ if (overwrite && nbuf > 1)
+ return NULL;
+
+ buf = kzalloc_node(offsetof(struct bts_buffer, buf[nbuf]), GFP_KERNEL, node);
+ if (!buf)
+ return NULL;
+
+ buf->nr_pages = nr_pages;
+ buf->nr_bufs = nbuf;
+ buf->snapshot = overwrite;
+ buf->data_pages = pages;
+ buf->real_size = size - size % BTS_RECORD_SIZE;
+
+ for (pg = 0, nbuf = 0, offset = 0, pad = 0; nbuf < buf->nr_bufs; nbuf++) {
+ unsigned int __nr_pages;
+
+ page = virt_to_page(pages[pg]);
+ __nr_pages = PagePrivate(page) ? 1 << page_private(page) : 1;
+ buf->buf[nbuf].page = page;
+ buf->buf[nbuf].offset = offset;
+ buf->buf[nbuf].displacement = (pad ? BTS_RECORD_SIZE - pad : 0);
+ buf->buf[nbuf].size = buf_size(page) - buf->buf[nbuf].displacement;
+ pad = buf->buf[nbuf].size % BTS_RECORD_SIZE;
+ buf->buf[nbuf].size -= pad;
+
+ pg += __nr_pages;
+ offset += __nr_pages << PAGE_SHIFT;
+ }
+
+ return buf;
+}
+
+static void bts_buffer_free_aux(void *data)
+{
+ kfree(data);
+}
+
+static unsigned long bts_buffer_offset(struct bts_buffer *buf, unsigned int idx)
+{
+ return buf->buf[idx].offset + buf->buf[idx].displacement;
+}
+
+static void
+bts_config_buffer(struct bts_buffer *buf)
+{
+ int cpu = raw_smp_processor_id();
+ struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds;
+ struct bts_phys *phys = &buf->buf[buf->cur_buf];
+ unsigned long index, thresh = 0, end = phys->size;
+ struct page *page = phys->page;
+
+ index = local_read(&buf->head);
+
+ if (!buf->snapshot) {
+ if (buf->end < phys->offset + buf_size(page))
+ end = buf->end - phys->offset - phys->displacement;
+
+ index -= phys->offset + phys->displacement;
+
+ if (end - index > BTS_SAFETY_MARGIN)
+ thresh = end - BTS_SAFETY_MARGIN;
+ else if (end - index > BTS_RECORD_SIZE)
+ thresh = end - BTS_RECORD_SIZE;
+ else
+ thresh = end;
+ }
+
+ ds->bts_buffer_base = (u64)(long)page_address(page) + phys->displacement;
+ ds->bts_index = ds->bts_buffer_base + index;
+ ds->bts_absolute_maximum = ds->bts_buffer_base + end;
+ ds->bts_interrupt_threshold = !buf->snapshot
+ ? ds->bts_buffer_base + thresh
+ : ds->bts_absolute_maximum + BTS_RECORD_SIZE;
+}
+
+static void bts_buffer_pad_out(struct bts_phys *phys, unsigned long head)
+{
+ unsigned long index = head - phys->offset;
+
+ memset(page_address(phys->page) + index, 0, phys->size - index);
+}
+
+static bool bts_buffer_is_full(struct bts_buffer *buf, struct bts_ctx *bts)
+{
+ if (buf->snapshot)
+ return false;
+
+ if (local_read(&buf->data_size) >= bts->handle.size ||
+ bts->handle.size - local_read(&buf->data_size) < BTS_RECORD_SIZE)
+ return true;
+
+ return false;
+}
+
+static void bts_update(struct bts_ctx *bts)
+{
+ int cpu = raw_smp_processor_id();
+ struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds;
+ struct bts_buffer *buf = perf_get_aux(&bts->handle);
+ unsigned long index = ds->bts_index - ds->bts_buffer_base, old, head;
+
+ if (!buf)
+ return;
+
+ head = index + bts_buffer_offset(buf, buf->cur_buf);
+ old = local_xchg(&buf->head, head);
+
+ if (!buf->snapshot) {
+ if (old == head)
+ return;
+
+ if (ds->bts_index >= ds->bts_absolute_maximum)
+ local_inc(&buf->lost);
+
+ /*
+ * old and head are always in the same physical buffer, so we
+ * can subtract them to get the data size.
+ */
+ local_add(head - old, &buf->data_size);
+ } else {
+ local_set(&buf->data_size, head);
+ }
+}
+
+static void __bts_event_start(struct perf_event *event)
+{
+ struct bts_ctx *bts = this_cpu_ptr(&bts_ctx);
+ struct bts_buffer *buf = perf_get_aux(&bts->handle);
+ u64 config = 0;
+
+ if (!buf || bts_buffer_is_full(buf, bts))
+ return;
+
+ event->hw.state = 0;
+
+ if (!buf->snapshot)
+ config |= ARCH_PERFMON_EVENTSEL_INT;
+ if (!event->attr.exclude_kernel)
+ config |= ARCH_PERFMON_EVENTSEL_OS;
+ if (!event->attr.exclude_user)
+ config |= ARCH_PERFMON_EVENTSEL_USR;
+
+ bts_config_buffer(buf);
+
+ /*
+ * local barrier to make sure that ds configuration made it
+ * before we enable BTS
+ */
+ wmb();
+
+ intel_pmu_enable_bts(config);
+}
+
+static void bts_event_start(struct perf_event *event, int flags)
+{
+ struct bts_ctx *bts = this_cpu_ptr(&bts_ctx);
+
+ __bts_event_start(event);
+
+ /* PMI handler: this counter is running and likely generating PMIs */
+ ACCESS_ONCE(bts->started) = 1;
+}
+
+static void __bts_event_stop(struct perf_event *event)
+{
+ /*
+ * No extra synchronization is mandated by the documentation to have
+ * BTS data stores globally visible.
+ */
+ intel_pmu_disable_bts();
+
+ if (event->hw.state & PERF_HES_STOPPED)
+ return;
+
+ ACCESS_ONCE(event->hw.state) |= PERF_HES_STOPPED;
+}
+
+static void bts_event_stop(struct perf_event *event, int flags)
+{
+ struct bts_ctx *bts = this_cpu_ptr(&bts_ctx);
+
+ /* PMI handler: don't restart this counter */
+ ACCESS_ONCE(bts->started) = 0;
+
+ __bts_event_stop(event);
+
+ if (flags & PERF_EF_UPDATE)
+ bts_update(bts);
+}
+
+void intel_bts_enable_local(void)
+{
+ struct bts_ctx *bts = this_cpu_ptr(&bts_ctx);
+
+ if (bts->handle.event && bts->started)
+ __bts_event_start(bts->handle.event);
+}
+
+void intel_bts_disable_local(void)
+{
+ struct bts_ctx *bts = this_cpu_ptr(&bts_ctx);
+
+ if (bts->handle.event)
+ __bts_event_stop(bts->handle.event);
+}
+
+static int
+bts_buffer_reset(struct bts_buffer *buf, struct perf_output_handle *handle)
+{
+ unsigned long head, space, next_space, pad, gap, skip, wakeup;
+ unsigned int next_buf;
+ struct bts_phys *phys, *next_phys;
+ int ret;
+
+ if (buf->snapshot)
+ return 0;
+
+ head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1);
+ if (WARN_ON_ONCE(head != local_read(&buf->head)))
+ return -EINVAL;
+
+ phys = &buf->buf[buf->cur_buf];
+ space = phys->offset + phys->displacement + phys->size - head;
+ pad = space;
+ if (space > handle->size) {
+ space = handle->size;
+ space -= space % BTS_RECORD_SIZE;
+ }
+ if (space <= BTS_SAFETY_MARGIN) {
+ /* See if next phys buffer has more space */
+ next_buf = buf->cur_buf + 1;
+ if (next_buf >= buf->nr_bufs)
+ next_buf = 0;
+ next_phys = &buf->buf[next_buf];
+ gap = buf_size(phys->page) - phys->displacement - phys->size +
+ next_phys->displacement;
+ skip = pad + gap;
+ if (handle->size >= skip) {
+ next_space = next_phys->size;
+ if (next_space + skip > handle->size) {
+ next_space = handle->size - skip;
+ next_space -= next_space % BTS_RECORD_SIZE;
+ }
+ if (next_space > space || !space) {
+ if (pad)
+ bts_buffer_pad_out(phys, head);
+ ret = perf_aux_output_skip(handle, skip);
+ if (ret)
+ return ret;
+ /* Advance to next phys buffer */
+ phys = next_phys;
+ space = next_space;
+ head = phys->offset + phys->displacement;
+ /*
+ * After this, cur_buf and head won't match ds
+ * anymore, so we must not be racing with
+ * bts_update().
+ */
+ buf->cur_buf = next_buf;
+ local_set(&buf->head, head);
+ }
+ }
+ }
+
+ /* Don't go far beyond wakeup watermark */
+ wakeup = BTS_SAFETY_MARGIN + BTS_RECORD_SIZE + handle->wakeup -
+ handle->head;
+ if (space > wakeup) {
+ space = wakeup;
+ space -= space % BTS_RECORD_SIZE;
+ }
+
+ buf->end = head + space;
+
+ /*
+ * If we have no space, the lost notification would have been sent when
+ * we hit absolute_maximum - see bts_update()
+ */
+ if (!space)
+ return -ENOSPC;
+
+ return 0;
+}
+
+int intel_bts_interrupt(void)
+{
+ struct bts_ctx *bts = this_cpu_ptr(&bts_ctx);
+ struct perf_event *event = bts->handle.event;
+ struct bts_buffer *buf;
+ s64 old_head;
+ int err;
+
+ if (!event || !bts->started)
+ return 0;
+
+ buf = perf_get_aux(&bts->handle);
+ /*
+ * Skip snapshot counters: they don't use the interrupt, but
+ * there's no other way of telling, because the pointer will
+ * keep moving
+ */
+ if (!buf || buf->snapshot)
+ return 0;
+
+ old_head = local_read(&buf->head);
+ bts_update(bts);
+
+ /* no new data */
+ if (old_head == local_read(&buf->head))
+ return 0;
+
+ perf_aux_output_end(&bts->handle, local_xchg(&buf->data_size, 0),
+ !!local_xchg(&buf->lost, 0));
+
+ buf = perf_aux_output_begin(&bts->handle, event);
+ if (!buf)
+ return 1;
+
+ err = bts_buffer_reset(buf, &bts->handle);
+ if (err)
+ perf_aux_output_end(&bts->handle, 0, false);
+
+ return 1;
+}
+
+static void bts_event_del(struct perf_event *event, int mode)
+{
+ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
+ struct bts_ctx *bts = this_cpu_ptr(&bts_ctx);
+ struct bts_buffer *buf = perf_get_aux(&bts->handle);
+
+ bts_event_stop(event, PERF_EF_UPDATE);
+
+ if (buf) {
+ if (buf->snapshot)
+ bts->handle.head =
+ local_xchg(&buf->data_size,
+ buf->nr_pages << PAGE_SHIFT);
+ perf_aux_output_end(&bts->handle, local_xchg(&buf->data_size, 0),
+ !!local_xchg(&buf->lost, 0));
+ }
+
+ cpuc->ds->bts_index = bts->ds_back.bts_buffer_base;
+ cpuc->ds->bts_buffer_base = bts->ds_back.bts_buffer_base;
+ cpuc->ds->bts_absolute_maximum = bts->ds_back.bts_absolute_maximum;
+ cpuc->ds->bts_interrupt_threshold = bts->ds_back.bts_interrupt_threshold;
+}
+
+static int bts_event_add(struct perf_event *event, int mode)
+{
+ struct bts_buffer *buf;
+ struct bts_ctx *bts = this_cpu_ptr(&bts_ctx);
+ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
+ struct hw_perf_event *hwc = &event->hw;
+ int ret = -EBUSY;
+
+ event->hw.state = PERF_HES_STOPPED;
+
+ if (test_bit(INTEL_PMC_IDX_FIXED_BTS, cpuc->active_mask))
+ return -EBUSY;
+
+ if (bts->handle.event)
+ return -EBUSY;
+
+ buf = perf_aux_output_begin(&bts->handle, event);
+ if (!buf)
+ return -EINVAL;
+
+ ret = bts_buffer_reset(buf, &bts->handle);
+ if (ret) {
+ perf_aux_output_end(&bts->handle, 0, false);
+ return ret;
+ }
+
+ bts->ds_back.bts_buffer_base = cpuc->ds->bts_buffer_base;
+ bts->ds_back.bts_absolute_maximum = cpuc->ds->bts_absolute_maximum;
+ bts->ds_back.bts_interrupt_threshold = cpuc->ds->bts_interrupt_threshold;
+
+ if (mode & PERF_EF_START) {
+ bts_event_start(event, 0);
+ if (hwc->state & PERF_HES_STOPPED) {
+ bts_event_del(event, 0);
+ return -EBUSY;
+ }
+ }
+
+ return 0;
+}
+
+static void bts_event_destroy(struct perf_event *event)
+{
+ x86_del_exclusive(x86_lbr_exclusive_bts);
+}
+
+static int bts_event_init(struct perf_event *event)
+{
+ if (event->attr.type != bts_pmu.type)
+ return -ENOENT;
+
+ if (x86_add_exclusive(x86_lbr_exclusive_bts))
+ return -EBUSY;
+
+ event->destroy = bts_event_destroy;
+
+ return 0;
+}
+
+static void bts_event_read(struct perf_event *event)
+{
+}
+
+static __init int bts_init(void)
+{
+ if (!boot_cpu_has(X86_FEATURE_DTES64) || !x86_pmu.bts)
+ return -ENODEV;
+
+ bts_pmu.capabilities = PERF_PMU_CAP_AUX_NO_SG | PERF_PMU_CAP_ITRACE;
+ bts_pmu.task_ctx_nr = perf_sw_context;
+ bts_pmu.event_init = bts_event_init;
+ bts_pmu.add = bts_event_add;
+ bts_pmu.del = bts_event_del;
+ bts_pmu.start = bts_event_start;
+ bts_pmu.stop = bts_event_stop;
+ bts_pmu.read = bts_event_read;
+ bts_pmu.setup_aux = bts_buffer_setup_aux;
+ bts_pmu.free_aux = bts_buffer_free_aux;
+
+ return perf_pmu_register(&bts_pmu, "intel_bts", -1);
+}
+
+module_init(bts_init);
--- /dev/null
+/*
+ * Intel Cache Quality-of-Service Monitoring (CQM) support.
+ *
+ * Based very, very heavily on work by Peter Zijlstra.
+ */
+
+#include <linux/perf_event.h>
+#include <linux/slab.h>
+#include <asm/cpu_device_id.h>
+#include "perf_event.h"
+
+#define MSR_IA32_PQR_ASSOC 0x0c8f
+#define MSR_IA32_QM_CTR 0x0c8e
+#define MSR_IA32_QM_EVTSEL 0x0c8d
+
+static unsigned int cqm_max_rmid = -1;
+static unsigned int cqm_l3_scale; /* supposedly cacheline size */
+
+struct intel_cqm_state {
+ raw_spinlock_t lock;
+ int rmid;
+ int cnt;
+};
+
+static DEFINE_PER_CPU(struct intel_cqm_state, cqm_state);
+
+/*
+ * Protects cache_cgroups and cqm_rmid_free_lru and cqm_rmid_limbo_lru.
+ * Also protects event->hw.cqm_rmid
+ *
+ * Hold either for stability, both for modification of ->hw.cqm_rmid.
+ */
+static DEFINE_MUTEX(cache_mutex);
+static DEFINE_RAW_SPINLOCK(cache_lock);
+
+/*
+ * Groups of events that have the same target(s), one RMID per group.
+ */
+static LIST_HEAD(cache_groups);
+
+/*
+ * Mask of CPUs for reading CQM values. We only need one per-socket.
+ */
+static cpumask_t cqm_cpumask;
+
+#define RMID_VAL_ERROR (1ULL << 63)
+#define RMID_VAL_UNAVAIL (1ULL << 62)
+
+#define QOS_L3_OCCUP_EVENT_ID (1 << 0)
+
+#define QOS_EVENT_MASK QOS_L3_OCCUP_EVENT_ID
+
+/*
+ * This is central to the rotation algorithm in __intel_cqm_rmid_rotate().
+ *
+ * This rmid is always free and is guaranteed to have an associated
+ * near-zero occupancy value, i.e. no cachelines are tagged with this
+ * RMID, once __intel_cqm_rmid_rotate() returns.
+ */
+static unsigned int intel_cqm_rotation_rmid;
+
+#define INVALID_RMID (-1)
+
+/*
+ * Is @rmid valid for programming the hardware?
+ *
+ * rmid 0 is reserved by the hardware for all non-monitored tasks, which
+ * means that we should never come across an rmid with that value.
+ * Likewise, an rmid value of -1 is used to indicate "no rmid currently
+ * assigned" and is used as part of the rotation code.
+ */
+static inline bool __rmid_valid(unsigned int rmid)
+{
+ if (!rmid || rmid == INVALID_RMID)
+ return false;
+
+ return true;
+}
+
+static u64 __rmid_read(unsigned int rmid)
+{
+ u64 val;
+
+ /*
+ * Ignore the SDM, this thing is _NOTHING_ like a regular perfcnt,
+ * it just says that to increase confusion.
+ */
+ wrmsr(MSR_IA32_QM_EVTSEL, QOS_L3_OCCUP_EVENT_ID, rmid);
+ rdmsrl(MSR_IA32_QM_CTR, val);
+
+ /*
+ * Aside from the ERROR and UNAVAIL bits, assume this thing returns
+ * the number of cachelines tagged with @rmid.
+ */
+ return val;
+}
+
+enum rmid_recycle_state {
+ RMID_YOUNG = 0,
+ RMID_AVAILABLE,
+ RMID_DIRTY,
+};
+
+struct cqm_rmid_entry {
+ unsigned int rmid;
+ enum rmid_recycle_state state;
+ struct list_head list;
+ unsigned long queue_time;
+};
+
+/*
+ * cqm_rmid_free_lru - A least recently used list of RMIDs.
+ *
+ * Oldest entry at the head, newest (most recently used) entry at the
+ * tail. This list is never traversed, it's only used to keep track of
+ * the lru order. That is, we only pick entries of the head or insert
+ * them on the tail.
+ *
+ * All entries on the list are 'free', and their RMIDs are not currently
+ * in use. To mark an RMID as in use, remove its entry from the lru
+ * list.
+ *
+ *
+ * cqm_rmid_limbo_lru - list of currently unused but (potentially) dirty RMIDs.
+ *
+ * This list is contains RMIDs that no one is currently using but that
+ * may have a non-zero occupancy value associated with them. The
+ * rotation worker moves RMIDs from the limbo list to the free list once
+ * the occupancy value drops below __intel_cqm_threshold.
+ *
+ * Both lists are protected by cache_mutex.
+ */
+static LIST_HEAD(cqm_rmid_free_lru);
+static LIST_HEAD(cqm_rmid_limbo_lru);
+
+/*
+ * We use a simple array of pointers so that we can lookup a struct
+ * cqm_rmid_entry in O(1). This alleviates the callers of __get_rmid()
+ * and __put_rmid() from having to worry about dealing with struct
+ * cqm_rmid_entry - they just deal with rmids, i.e. integers.
+ *
+ * Once this array is initialized it is read-only. No locks are required
+ * to access it.
+ *
+ * All entries for all RMIDs can be looked up in the this array at all
+ * times.
+ */
+static struct cqm_rmid_entry **cqm_rmid_ptrs;
+
+static inline struct cqm_rmid_entry *__rmid_entry(int rmid)
+{
+ struct cqm_rmid_entry *entry;
+
+ entry = cqm_rmid_ptrs[rmid];
+ WARN_ON(entry->rmid != rmid);
+
+ return entry;
+}
+
+/*
+ * Returns < 0 on fail.
+ *
+ * We expect to be called with cache_mutex held.
+ */
+static int __get_rmid(void)
+{
+ struct cqm_rmid_entry *entry;
+
+ lockdep_assert_held(&cache_mutex);
+
+ if (list_empty(&cqm_rmid_free_lru))
+ return INVALID_RMID;
+
+ entry = list_first_entry(&cqm_rmid_free_lru, struct cqm_rmid_entry, list);
+ list_del(&entry->list);
+
+ return entry->rmid;
+}
+
+static void __put_rmid(unsigned int rmid)
+{
+ struct cqm_rmid_entry *entry;
+
+ lockdep_assert_held(&cache_mutex);
+
+ WARN_ON(!__rmid_valid(rmid));
+ entry = __rmid_entry(rmid);
+
+ entry->queue_time = jiffies;
+ entry->state = RMID_YOUNG;
+
+ list_add_tail(&entry->list, &cqm_rmid_limbo_lru);
+}
+
+static int intel_cqm_setup_rmid_cache(void)
+{
+ struct cqm_rmid_entry *entry;
+ unsigned int nr_rmids;
+ int r = 0;
+
+ nr_rmids = cqm_max_rmid + 1;
+ cqm_rmid_ptrs = kmalloc(sizeof(struct cqm_rmid_entry *) *
+ nr_rmids, GFP_KERNEL);
+ if (!cqm_rmid_ptrs)
+ return -ENOMEM;
+
+ for (; r <= cqm_max_rmid; r++) {
+ struct cqm_rmid_entry *entry;
+
+ entry = kmalloc(sizeof(*entry), GFP_KERNEL);
+ if (!entry)
+ goto fail;
+
+ INIT_LIST_HEAD(&entry->list);
+ entry->rmid = r;
+ cqm_rmid_ptrs[r] = entry;
+
+ list_add_tail(&entry->list, &cqm_rmid_free_lru);
+ }
+
+ /*
+ * RMID 0 is special and is always allocated. It's used for all
+ * tasks that are not monitored.
+ */
+ entry = __rmid_entry(0);
+ list_del(&entry->list);
+
+ mutex_lock(&cache_mutex);
+ intel_cqm_rotation_rmid = __get_rmid();
+ mutex_unlock(&cache_mutex);
+
+ return 0;
+fail:
+ while (r--)
+ kfree(cqm_rmid_ptrs[r]);
+
+ kfree(cqm_rmid_ptrs);
+ return -ENOMEM;
+}
+
+/*
+ * Determine if @a and @b measure the same set of tasks.
+ *
+ * If @a and @b measure the same set of tasks then we want to share a
+ * single RMID.
+ */
+static bool __match_event(struct perf_event *a, struct perf_event *b)
+{
+ /* Per-cpu and task events don't mix */
+ if ((a->attach_state & PERF_ATTACH_TASK) !=
+ (b->attach_state & PERF_ATTACH_TASK))
+ return false;
+
+#ifdef CONFIG_CGROUP_PERF
+ if (a->cgrp != b->cgrp)
+ return false;
+#endif
+
+ /* If not task event, we're machine wide */
+ if (!(b->attach_state & PERF_ATTACH_TASK))
+ return true;
+
+ /*
+ * Events that target same task are placed into the same cache group.
+ */
+ if (a->hw.target == b->hw.target)
+ return true;
+
+ /*
+ * Are we an inherited event?
+ */
+ if (b->parent == a)
+ return true;
+
+ return false;
+}
+
+#ifdef CONFIG_CGROUP_PERF
+static inline struct perf_cgroup *event_to_cgroup(struct perf_event *event)
+{
+ if (event->attach_state & PERF_ATTACH_TASK)
+ return perf_cgroup_from_task(event->hw.target);
+
+ return event->cgrp;
+}
+#endif
+
+/*
+ * Determine if @a's tasks intersect with @b's tasks
+ *
+ * There are combinations of events that we explicitly prohibit,
+ *
+ * PROHIBITS
+ * system-wide -> cgroup and task
+ * cgroup -> system-wide
+ * -> task in cgroup
+ * task -> system-wide
+ * -> task in cgroup
+ *
+ * Call this function before allocating an RMID.
+ */
+static bool __conflict_event(struct perf_event *a, struct perf_event *b)
+{
+#ifdef CONFIG_CGROUP_PERF
+ /*
+ * We can have any number of cgroups but only one system-wide
+ * event at a time.
+ */
+ if (a->cgrp && b->cgrp) {
+ struct perf_cgroup *ac = a->cgrp;
+ struct perf_cgroup *bc = b->cgrp;
+
+ /*
+ * This condition should have been caught in
+ * __match_event() and we should be sharing an RMID.
+ */
+ WARN_ON_ONCE(ac == bc);
+
+ if (cgroup_is_descendant(ac->css.cgroup, bc->css.cgroup) ||
+ cgroup_is_descendant(bc->css.cgroup, ac->css.cgroup))
+ return true;
+
+ return false;
+ }
+
+ if (a->cgrp || b->cgrp) {
+ struct perf_cgroup *ac, *bc;
+
+ /*
+ * cgroup and system-wide events are mutually exclusive
+ */
+ if ((a->cgrp && !(b->attach_state & PERF_ATTACH_TASK)) ||
+ (b->cgrp && !(a->attach_state & PERF_ATTACH_TASK)))
+ return true;
+
+ /*
+ * Ensure neither event is part of the other's cgroup
+ */
+ ac = event_to_cgroup(a);
+ bc = event_to_cgroup(b);
+ if (ac == bc)
+ return true;
+
+ /*
+ * Must have cgroup and non-intersecting task events.
+ */
+ if (!ac || !bc)
+ return false;
+
+ /*
+ * We have cgroup and task events, and the task belongs
+ * to a cgroup. Check for for overlap.
+ */
+ if (cgroup_is_descendant(ac->css.cgroup, bc->css.cgroup) ||
+ cgroup_is_descendant(bc->css.cgroup, ac->css.cgroup))
+ return true;
+
+ return false;
+ }
+#endif
+ /*
+ * If one of them is not a task, same story as above with cgroups.
+ */
+ if (!(a->attach_state & PERF_ATTACH_TASK) ||
+ !(b->attach_state & PERF_ATTACH_TASK))
+ return true;
+
+ /*
+ * Must be non-overlapping.
+ */
+ return false;
+}
+
+struct rmid_read {
+ unsigned int rmid;
+ atomic64_t value;
+};
+
+static void __intel_cqm_event_count(void *info);
+
+/*
+ * Exchange the RMID of a group of events.
+ */
+static unsigned int
+intel_cqm_xchg_rmid(struct perf_event *group, unsigned int rmid)
+{
+ struct perf_event *event;
+ unsigned int old_rmid = group->hw.cqm_rmid;
+ struct list_head *head = &group->hw.cqm_group_entry;
+
+ lockdep_assert_held(&cache_mutex);
+
+ /*
+ * If our RMID is being deallocated, perform a read now.
+ */
+ if (__rmid_valid(old_rmid) && !__rmid_valid(rmid)) {
+ struct rmid_read rr = {
+ .value = ATOMIC64_INIT(0),
+ .rmid = old_rmid,
+ };
+
+ on_each_cpu_mask(&cqm_cpumask, __intel_cqm_event_count,
+ &rr, 1);
+ local64_set(&group->count, atomic64_read(&rr.value));
+ }
+
+ raw_spin_lock_irq(&cache_lock);
+
+ group->hw.cqm_rmid = rmid;
+ list_for_each_entry(event, head, hw.cqm_group_entry)
+ event->hw.cqm_rmid = rmid;
+
+ raw_spin_unlock_irq(&cache_lock);
+
+ return old_rmid;
+}
+
+/*
+ * If we fail to assign a new RMID for intel_cqm_rotation_rmid because
+ * cachelines are still tagged with RMIDs in limbo, we progressively
+ * increment the threshold until we find an RMID in limbo with <=
+ * __intel_cqm_threshold lines tagged. This is designed to mitigate the
+ * problem where cachelines tagged with an RMID are not steadily being
+ * evicted.
+ *
+ * On successful rotations we decrease the threshold back towards zero.
+ *
+ * __intel_cqm_max_threshold provides an upper bound on the threshold,
+ * and is measured in bytes because it's exposed to userland.
+ */
+static unsigned int __intel_cqm_threshold;
+static unsigned int __intel_cqm_max_threshold;
+
+/*
+ * Test whether an RMID has a zero occupancy value on this cpu.
+ */
+static void intel_cqm_stable(void *arg)
+{
+ struct cqm_rmid_entry *entry;
+
+ list_for_each_entry(entry, &cqm_rmid_limbo_lru, list) {
+ if (entry->state != RMID_AVAILABLE)
+ break;
+
+ if (__rmid_read(entry->rmid) > __intel_cqm_threshold)
+ entry->state = RMID_DIRTY;
+ }
+}
+
+/*
+ * If we have group events waiting for an RMID that don't conflict with
+ * events already running, assign @rmid.
+ */
+static bool intel_cqm_sched_in_event(unsigned int rmid)
+{
+ struct perf_event *leader, *event;
+
+ lockdep_assert_held(&cache_mutex);
+
+ leader = list_first_entry(&cache_groups, struct perf_event,
+ hw.cqm_groups_entry);
+ event = leader;
+
+ list_for_each_entry_continue(event, &cache_groups,
+ hw.cqm_groups_entry) {
+ if (__rmid_valid(event->hw.cqm_rmid))
+ continue;
+
+ if (__conflict_event(event, leader))
+ continue;
+
+ intel_cqm_xchg_rmid(event, rmid);
+ return true;
+ }
+
+ return false;
+}
+
+/*
+ * Initially use this constant for both the limbo queue time and the
+ * rotation timer interval, pmu::hrtimer_interval_ms.
+ *
+ * They don't need to be the same, but the two are related since if you
+ * rotate faster than you recycle RMIDs, you may run out of available
+ * RMIDs.
+ */
+#define RMID_DEFAULT_QUEUE_TIME 250 /* ms */
+
+static unsigned int __rmid_queue_time_ms = RMID_DEFAULT_QUEUE_TIME;
+
+/*
+ * intel_cqm_rmid_stabilize - move RMIDs from limbo to free list
+ * @nr_available: number of freeable RMIDs on the limbo list
+ *
+ * Quiescent state; wait for all 'freed' RMIDs to become unused, i.e. no
+ * cachelines are tagged with those RMIDs. After this we can reuse them
+ * and know that the current set of active RMIDs is stable.
+ *
+ * Return %true or %false depending on whether stabilization needs to be
+ * reattempted.
+ *
+ * If we return %true then @nr_available is updated to indicate the
+ * number of RMIDs on the limbo list that have been queued for the
+ * minimum queue time (RMID_AVAILABLE), but whose data occupancy values
+ * are above __intel_cqm_threshold.
+ */
+static bool intel_cqm_rmid_stabilize(unsigned int *available)
+{
+ struct cqm_rmid_entry *entry, *tmp;
+
+ lockdep_assert_held(&cache_mutex);
+
+ *available = 0;
+ list_for_each_entry(entry, &cqm_rmid_limbo_lru, list) {
+ unsigned long min_queue_time;
+ unsigned long now = jiffies;
+
+ /*
+ * We hold RMIDs placed into limbo for a minimum queue
+ * time. Before the minimum queue time has elapsed we do
+ * not recycle RMIDs.
+ *
+ * The reasoning is that until a sufficient time has
+ * passed since we stopped using an RMID, any RMID
+ * placed onto the limbo list will likely still have
+ * data tagged in the cache, which means we'll probably
+ * fail to recycle it anyway.
+ *
+ * We can save ourselves an expensive IPI by skipping
+ * any RMIDs that have not been queued for the minimum
+ * time.
+ */
+ min_queue_time = entry->queue_time +
+ msecs_to_jiffies(__rmid_queue_time_ms);
+
+ if (time_after(min_queue_time, now))
+ break;
+
+ entry->state = RMID_AVAILABLE;
+ (*available)++;
+ }
+
+ /*
+ * Fast return if none of the RMIDs on the limbo list have been
+ * sitting on the queue for the minimum queue time.
+ */
+ if (!*available)
+ return false;
+
+ /*
+ * Test whether an RMID is free for each package.
+ */
+ on_each_cpu_mask(&cqm_cpumask, intel_cqm_stable, NULL, true);
+
+ list_for_each_entry_safe(entry, tmp, &cqm_rmid_limbo_lru, list) {
+ /*
+ * Exhausted all RMIDs that have waited min queue time.
+ */
+ if (entry->state == RMID_YOUNG)
+ break;
+
+ if (entry->state == RMID_DIRTY)
+ continue;
+
+ list_del(&entry->list); /* remove from limbo */
+
+ /*
+ * The rotation RMID gets priority if it's
+ * currently invalid. In which case, skip adding
+ * the RMID to the the free lru.
+ */
+ if (!__rmid_valid(intel_cqm_rotation_rmid)) {
+ intel_cqm_rotation_rmid = entry->rmid;
+ continue;
+ }
+
+ /*
+ * If we have groups waiting for RMIDs, hand
+ * them one now provided they don't conflict.
+ */
+ if (intel_cqm_sched_in_event(entry->rmid))
+ continue;
+
+ /*
+ * Otherwise place it onto the free list.
+ */
+ list_add_tail(&entry->list, &cqm_rmid_free_lru);
+ }
+
+
+ return __rmid_valid(intel_cqm_rotation_rmid);
+}
+
+/*
+ * Pick a victim group and move it to the tail of the group list.
+ * @next: The first group without an RMID
+ */
+static void __intel_cqm_pick_and_rotate(struct perf_event *next)
+{
+ struct perf_event *rotor;
+ unsigned int rmid;
+
+ lockdep_assert_held(&cache_mutex);
+
+ rotor = list_first_entry(&cache_groups, struct perf_event,
+ hw.cqm_groups_entry);
+
+ /*
+ * The group at the front of the list should always have a valid
+ * RMID. If it doesn't then no groups have RMIDs assigned and we
+ * don't need to rotate the list.
+ */
+ if (next == rotor)
+ return;
+
+ rmid = intel_cqm_xchg_rmid(rotor, INVALID_RMID);
+ __put_rmid(rmid);
+
+ list_rotate_left(&cache_groups);
+}
+
+/*
+ * Deallocate the RMIDs from any events that conflict with @event, and
+ * place them on the back of the group list.
+ */
+static void intel_cqm_sched_out_conflicting_events(struct perf_event *event)
+{
+ struct perf_event *group, *g;
+ unsigned int rmid;
+
+ lockdep_assert_held(&cache_mutex);
+
+ list_for_each_entry_safe(group, g, &cache_groups, hw.cqm_groups_entry) {
+ if (group == event)
+ continue;
+
+ rmid = group->hw.cqm_rmid;
+
+ /*
+ * Skip events that don't have a valid RMID.
+ */
+ if (!__rmid_valid(rmid))
+ continue;
+
+ /*
+ * No conflict? No problem! Leave the event alone.
+ */
+ if (!__conflict_event(group, event))
+ continue;
+
+ intel_cqm_xchg_rmid(group, INVALID_RMID);
+ __put_rmid(rmid);
+ }
+}
+
+/*
+ * Attempt to rotate the groups and assign new RMIDs.
+ *
+ * We rotate for two reasons,
+ * 1. To handle the scheduling of conflicting events
+ * 2. To recycle RMIDs
+ *
+ * Rotating RMIDs is complicated because the hardware doesn't give us
+ * any clues.
+ *
+ * There's problems with the hardware interface; when you change the
+ * task:RMID map cachelines retain their 'old' tags, giving a skewed
+ * picture. In order to work around this, we must always keep one free
+ * RMID - intel_cqm_rotation_rmid.
+ *
+ * Rotation works by taking away an RMID from a group (the old RMID),
+ * and assigning the free RMID to another group (the new RMID). We must
+ * then wait for the old RMID to not be used (no cachelines tagged).
+ * This ensure that all cachelines are tagged with 'active' RMIDs. At
+ * this point we can start reading values for the new RMID and treat the
+ * old RMID as the free RMID for the next rotation.
+ *
+ * Return %true or %false depending on whether we did any rotating.
+ */
+static bool __intel_cqm_rmid_rotate(void)
+{
+ struct perf_event *group, *start = NULL;
+ unsigned int threshold_limit;
+ unsigned int nr_needed = 0;
+ unsigned int nr_available;
+ bool rotated = false;
+
+ mutex_lock(&cache_mutex);
+
+again:
+ /*
+ * Fast path through this function if there are no groups and no
+ * RMIDs that need cleaning.
+ */
+ if (list_empty(&cache_groups) && list_empty(&cqm_rmid_limbo_lru))
+ goto out;
+
+ list_for_each_entry(group, &cache_groups, hw.cqm_groups_entry) {
+ if (!__rmid_valid(group->hw.cqm_rmid)) {
+ if (!start)
+ start = group;
+ nr_needed++;
+ }
+ }
+
+ /*
+ * We have some event groups, but they all have RMIDs assigned
+ * and no RMIDs need cleaning.
+ */
+ if (!nr_needed && list_empty(&cqm_rmid_limbo_lru))
+ goto out;
+
+ if (!nr_needed)
+ goto stabilize;
+
+ /*
+ * We have more event groups without RMIDs than available RMIDs,
+ * or we have event groups that conflict with the ones currently
+ * scheduled.
+ *
+ * We force deallocate the rmid of the group at the head of
+ * cache_groups. The first event group without an RMID then gets
+ * assigned intel_cqm_rotation_rmid. This ensures we always make
+ * forward progress.
+ *
+ * Rotate the cache_groups list so the previous head is now the
+ * tail.
+ */
+ __intel_cqm_pick_and_rotate(start);
+
+ /*
+ * If the rotation is going to succeed, reduce the threshold so
+ * that we don't needlessly reuse dirty RMIDs.
+ */
+ if (__rmid_valid(intel_cqm_rotation_rmid)) {
+ intel_cqm_xchg_rmid(start, intel_cqm_rotation_rmid);
+ intel_cqm_rotation_rmid = __get_rmid();
+
+ intel_cqm_sched_out_conflicting_events(start);
+
+ if (__intel_cqm_threshold)
+ __intel_cqm_threshold--;
+ }
+
+ rotated = true;
+
+stabilize:
+ /*
+ * We now need to stablize the RMID we freed above (if any) to
+ * ensure that the next time we rotate we have an RMID with zero
+ * occupancy value.
+ *
+ * Alternatively, if we didn't need to perform any rotation,
+ * we'll have a bunch of RMIDs in limbo that need stabilizing.
+ */
+ threshold_limit = __intel_cqm_max_threshold / cqm_l3_scale;
+
+ while (intel_cqm_rmid_stabilize(&nr_available) &&
+ __intel_cqm_threshold < threshold_limit) {
+ unsigned int steal_limit;
+
+ /*
+ * Don't spin if nobody is actively waiting for an RMID,
+ * the rotation worker will be kicked as soon as an
+ * event needs an RMID anyway.
+ */
+ if (!nr_needed)
+ break;
+
+ /* Allow max 25% of RMIDs to be in limbo. */
+ steal_limit = (cqm_max_rmid + 1) / 4;
+
+ /*
+ * We failed to stabilize any RMIDs so our rotation
+ * logic is now stuck. In order to make forward progress
+ * we have a few options:
+ *
+ * 1. rotate ("steal") another RMID
+ * 2. increase the threshold
+ * 3. do nothing
+ *
+ * We do both of 1. and 2. until we hit the steal limit.
+ *
+ * The steal limit prevents all RMIDs ending up on the
+ * limbo list. This can happen if every RMID has a
+ * non-zero occupancy above threshold_limit, and the
+ * occupancy values aren't dropping fast enough.
+ *
+ * Note that there is prioritisation at work here - we'd
+ * rather increase the number of RMIDs on the limbo list
+ * than increase the threshold, because increasing the
+ * threshold skews the event data (because we reuse
+ * dirty RMIDs) - threshold bumps are a last resort.
+ */
+ if (nr_available < steal_limit)
+ goto again;
+
+ __intel_cqm_threshold++;
+ }
+
+out:
+ mutex_unlock(&cache_mutex);
+ return rotated;
+}
+
+static void intel_cqm_rmid_rotate(struct work_struct *work);
+
+static DECLARE_DELAYED_WORK(intel_cqm_rmid_work, intel_cqm_rmid_rotate);
+
+static struct pmu intel_cqm_pmu;
+
+static void intel_cqm_rmid_rotate(struct work_struct *work)
+{
+ unsigned long delay;
+
+ __intel_cqm_rmid_rotate();
+
+ delay = msecs_to_jiffies(intel_cqm_pmu.hrtimer_interval_ms);
+ schedule_delayed_work(&intel_cqm_rmid_work, delay);
+}
+
+/*
+ * Find a group and setup RMID.
+ *
+ * If we're part of a group, we use the group's RMID.
+ */
+static void intel_cqm_setup_event(struct perf_event *event,
+ struct perf_event **group)
+{
+ struct perf_event *iter;
+ unsigned int rmid;
+ bool conflict = false;
+
+ list_for_each_entry(iter, &cache_groups, hw.cqm_groups_entry) {
+ rmid = iter->hw.cqm_rmid;
+
+ if (__match_event(iter, event)) {
+ /* All tasks in a group share an RMID */
+ event->hw.cqm_rmid = rmid;
+ *group = iter;
+ return;
+ }
+
+ /*
+ * We only care about conflicts for events that are
+ * actually scheduled in (and hence have a valid RMID).
+ */
+ if (__conflict_event(iter, event) && __rmid_valid(rmid))
+ conflict = true;
+ }
+
+ if (conflict)
+ rmid = INVALID_RMID;
+ else
+ rmid = __get_rmid();
+
+ event->hw.cqm_rmid = rmid;
+}
+
+static void intel_cqm_event_read(struct perf_event *event)
+{
+ unsigned long flags;
+ unsigned int rmid;
+ u64 val;
+
+ /*
+ * Task events are handled by intel_cqm_event_count().
+ */
+ if (event->cpu == -1)
+ return;
+
+ raw_spin_lock_irqsave(&cache_lock, flags);
+ rmid = event->hw.cqm_rmid;
+
+ if (!__rmid_valid(rmid))
+ goto out;
+
+ val = __rmid_read(rmid);
+
+ /*
+ * Ignore this reading on error states and do not update the value.
+ */
+ if (val & (RMID_VAL_ERROR | RMID_VAL_UNAVAIL))
+ goto out;
+
+ local64_set(&event->count, val);
+out:
+ raw_spin_unlock_irqrestore(&cache_lock, flags);
+}
+
+static void __intel_cqm_event_count(void *info)
+{
+ struct rmid_read *rr = info;
+ u64 val;
+
+ val = __rmid_read(rr->rmid);
+
+ if (val & (RMID_VAL_ERROR | RMID_VAL_UNAVAIL))
+ return;
+
+ atomic64_add(val, &rr->value);
+}
+
+static inline bool cqm_group_leader(struct perf_event *event)
+{
+ return !list_empty(&event->hw.cqm_groups_entry);
+}
+
+static u64 intel_cqm_event_count(struct perf_event *event)
+{
+ unsigned long flags;
+ struct rmid_read rr = {
+ .value = ATOMIC64_INIT(0),
+ };
+
+ /*
+ * We only need to worry about task events. System-wide events
+ * are handled like usual, i.e. entirely with
+ * intel_cqm_event_read().
+ */
+ if (event->cpu != -1)
+ return __perf_event_count(event);
+
+ /*
+ * Only the group leader gets to report values. This stops us
+ * reporting duplicate values to userspace, and gives us a clear
+ * rule for which task gets to report the values.
+ *
+ * Note that it is impossible to attribute these values to
+ * specific packages - we forfeit that ability when we create
+ * task events.
+ */
+ if (!cqm_group_leader(event))
+ return 0;
+
+ /*
+ * Notice that we don't perform the reading of an RMID
+ * atomically, because we can't hold a spin lock across the
+ * IPIs.
+ *
+ * Speculatively perform the read, since @event might be
+ * assigned a different (possibly invalid) RMID while we're
+ * busying performing the IPI calls. It's therefore necessary to
+ * check @event's RMID afterwards, and if it has changed,
+ * discard the result of the read.
+ */
+ rr.rmid = ACCESS_ONCE(event->hw.cqm_rmid);
+
+ if (!__rmid_valid(rr.rmid))
+ goto out;
+
+ on_each_cpu_mask(&cqm_cpumask, __intel_cqm_event_count, &rr, 1);
+
+ raw_spin_lock_irqsave(&cache_lock, flags);
+ if (event->hw.cqm_rmid == rr.rmid)
+ local64_set(&event->count, atomic64_read(&rr.value));
+ raw_spin_unlock_irqrestore(&cache_lock, flags);
+out:
+ return __perf_event_count(event);
+}
+
+static void intel_cqm_event_start(struct perf_event *event, int mode)
+{
+ struct intel_cqm_state *state = this_cpu_ptr(&cqm_state);
+ unsigned int rmid = event->hw.cqm_rmid;
+ unsigned long flags;
+
+ if (!(event->hw.cqm_state & PERF_HES_STOPPED))
+ return;
+
+ event->hw.cqm_state &= ~PERF_HES_STOPPED;
+
+ raw_spin_lock_irqsave(&state->lock, flags);
+
+ if (state->cnt++)
+ WARN_ON_ONCE(state->rmid != rmid);
+ else
+ WARN_ON_ONCE(state->rmid);
+
+ state->rmid = rmid;
+ wrmsrl(MSR_IA32_PQR_ASSOC, state->rmid);
+
+ raw_spin_unlock_irqrestore(&state->lock, flags);
+}
+
+static void intel_cqm_event_stop(struct perf_event *event, int mode)
+{
+ struct intel_cqm_state *state = this_cpu_ptr(&cqm_state);
+ unsigned long flags;
+
+ if (event->hw.cqm_state & PERF_HES_STOPPED)
+ return;
+
+ event->hw.cqm_state |= PERF_HES_STOPPED;
+
+ raw_spin_lock_irqsave(&state->lock, flags);
+ intel_cqm_event_read(event);
+
+ if (!--state->cnt) {
+ state->rmid = 0;
+ wrmsrl(MSR_IA32_PQR_ASSOC, 0);
+ } else {
+ WARN_ON_ONCE(!state->rmid);
+ }
+
+ raw_spin_unlock_irqrestore(&state->lock, flags);
+}
+
+static int intel_cqm_event_add(struct perf_event *event, int mode)
+{
+ unsigned long flags;
+ unsigned int rmid;
+
+ raw_spin_lock_irqsave(&cache_lock, flags);
+
+ event->hw.cqm_state = PERF_HES_STOPPED;
+ rmid = event->hw.cqm_rmid;
+
+ if (__rmid_valid(rmid) && (mode & PERF_EF_START))
+ intel_cqm_event_start(event, mode);
+
+ raw_spin_unlock_irqrestore(&cache_lock, flags);
+
+ return 0;
+}
+
+static void intel_cqm_event_del(struct perf_event *event, int mode)
+{
+ intel_cqm_event_stop(event, mode);
+}
+
+static void intel_cqm_event_destroy(struct perf_event *event)
+{
+ struct perf_event *group_other = NULL;
+
+ mutex_lock(&cache_mutex);
+
+ /*
+ * If there's another event in this group...
+ */
+ if (!list_empty(&event->hw.cqm_group_entry)) {
+ group_other = list_first_entry(&event->hw.cqm_group_entry,
+ struct perf_event,
+ hw.cqm_group_entry);
+ list_del(&event->hw.cqm_group_entry);
+ }
+
+ /*
+ * And we're the group leader..
+ */
+ if (cqm_group_leader(event)) {
+ /*
+ * If there was a group_other, make that leader, otherwise
+ * destroy the group and return the RMID.
+ */
+ if (group_other) {
+ list_replace(&event->hw.cqm_groups_entry,
+ &group_other->hw.cqm_groups_entry);
+ } else {
+ unsigned int rmid = event->hw.cqm_rmid;
+
+ if (__rmid_valid(rmid))
+ __put_rmid(rmid);
+ list_del(&event->hw.cqm_groups_entry);
+ }
+ }
+
+ mutex_unlock(&cache_mutex);
+}
+
+static int intel_cqm_event_init(struct perf_event *event)
+{
+ struct perf_event *group = NULL;
+ bool rotate = false;
+
+ if (event->attr.type != intel_cqm_pmu.type)
+ return -ENOENT;
+
+ if (event->attr.config & ~QOS_EVENT_MASK)
+ return -EINVAL;
+
+ /* unsupported modes and filters */
+ if (event->attr.exclude_user ||
+ event->attr.exclude_kernel ||
+ event->attr.exclude_hv ||
+ event->attr.exclude_idle ||
+ event->attr.exclude_host ||
+ event->attr.exclude_guest ||
+ event->attr.sample_period) /* no sampling */
+ return -EINVAL;
+
+ INIT_LIST_HEAD(&event->hw.cqm_group_entry);
+ INIT_LIST_HEAD(&event->hw.cqm_groups_entry);
+
+ event->destroy = intel_cqm_event_destroy;
+
+ mutex_lock(&cache_mutex);
+
+ /* Will also set rmid */
+ intel_cqm_setup_event(event, &group);
+
+ if (group) {
+ list_add_tail(&event->hw.cqm_group_entry,
+ &group->hw.cqm_group_entry);
+ } else {
+ list_add_tail(&event->hw.cqm_groups_entry,
+ &cache_groups);
+
+ /*
+ * All RMIDs are either in use or have recently been
+ * used. Kick the rotation worker to clean/free some.
+ *
+ * We only do this for the group leader, rather than for
+ * every event in a group to save on needless work.
+ */
+ if (!__rmid_valid(event->hw.cqm_rmid))
+ rotate = true;
+ }
+
+ mutex_unlock(&cache_mutex);
+
+ if (rotate)
+ schedule_delayed_work(&intel_cqm_rmid_work, 0);
+
+ return 0;
+}
+
+EVENT_ATTR_STR(llc_occupancy, intel_cqm_llc, "event=0x01");
+EVENT_ATTR_STR(llc_occupancy.per-pkg, intel_cqm_llc_pkg, "1");
+EVENT_ATTR_STR(llc_occupancy.unit, intel_cqm_llc_unit, "Bytes");
+EVENT_ATTR_STR(llc_occupancy.scale, intel_cqm_llc_scale, NULL);
+EVENT_ATTR_STR(llc_occupancy.snapshot, intel_cqm_llc_snapshot, "1");
+
+static struct attribute *intel_cqm_events_attr[] = {
+ EVENT_PTR(intel_cqm_llc),
+ EVENT_PTR(intel_cqm_llc_pkg),
+ EVENT_PTR(intel_cqm_llc_unit),
+ EVENT_PTR(intel_cqm_llc_scale),
+ EVENT_PTR(intel_cqm_llc_snapshot),
+ NULL,
+};
+
+static struct attribute_group intel_cqm_events_group = {
+ .name = "events",
+ .attrs = intel_cqm_events_attr,
+};
+
+PMU_FORMAT_ATTR(event, "config:0-7");
+static struct attribute *intel_cqm_formats_attr[] = {
+ &format_attr_event.attr,
+ NULL,
+};
+
+static struct attribute_group intel_cqm_format_group = {
+ .name = "format",
+ .attrs = intel_cqm_formats_attr,
+};
+
+static ssize_t
+max_recycle_threshold_show(struct device *dev, struct device_attribute *attr,
+ char *page)
+{
+ ssize_t rv;
+
+ mutex_lock(&cache_mutex);
+ rv = snprintf(page, PAGE_SIZE-1, "%u\n", __intel_cqm_max_threshold);
+ mutex_unlock(&cache_mutex);
+
+ return rv;
+}
+
+static ssize_t
+max_recycle_threshold_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ unsigned int bytes, cachelines;
+ int ret;
+
+ ret = kstrtouint(buf, 0, &bytes);
+ if (ret)
+ return ret;
+
+ mutex_lock(&cache_mutex);
+
+ __intel_cqm_max_threshold = bytes;
+ cachelines = bytes / cqm_l3_scale;
+
+ /*
+ * The new maximum takes effect immediately.
+ */
+ if (__intel_cqm_threshold > cachelines)
+ __intel_cqm_threshold = cachelines;
+
+ mutex_unlock(&cache_mutex);
+
+ return count;
+}
+
+static DEVICE_ATTR_RW(max_recycle_threshold);
+
+static struct attribute *intel_cqm_attrs[] = {
+ &dev_attr_max_recycle_threshold.attr,
+ NULL,
+};
+
+static const struct attribute_group intel_cqm_group = {
+ .attrs = intel_cqm_attrs,
+};
+
+static const struct attribute_group *intel_cqm_attr_groups[] = {
+ &intel_cqm_events_group,
+ &intel_cqm_format_group,
+ &intel_cqm_group,
+ NULL,
+};
+
+static struct pmu intel_cqm_pmu = {
+ .hrtimer_interval_ms = RMID_DEFAULT_QUEUE_TIME,
+ .attr_groups = intel_cqm_attr_groups,
+ .task_ctx_nr = perf_sw_context,
+ .event_init = intel_cqm_event_init,
+ .add = intel_cqm_event_add,
+ .del = intel_cqm_event_del,
+ .start = intel_cqm_event_start,
+ .stop = intel_cqm_event_stop,
+ .read = intel_cqm_event_read,
+ .count = intel_cqm_event_count,
+};
+
+static inline void cqm_pick_event_reader(int cpu)
+{
+ int phys_id = topology_physical_package_id(cpu);
+ int i;
+
+ for_each_cpu(i, &cqm_cpumask) {
+ if (phys_id == topology_physical_package_id(i))
+ return; /* already got reader for this socket */
+ }
+
+ cpumask_set_cpu(cpu, &cqm_cpumask);
+}
+
+static void intel_cqm_cpu_prepare(unsigned int cpu)
+{
+ struct intel_cqm_state *state = &per_cpu(cqm_state, cpu);
+ struct cpuinfo_x86 *c = &cpu_data(cpu);
+
+ raw_spin_lock_init(&state->lock);
+ state->rmid = 0;
+ state->cnt = 0;
+
+ WARN_ON(c->x86_cache_max_rmid != cqm_max_rmid);
+ WARN_ON(c->x86_cache_occ_scale != cqm_l3_scale);
+}
+
+static void intel_cqm_cpu_exit(unsigned int cpu)
+{
+ int phys_id = topology_physical_package_id(cpu);
+ int i;
+
+ /*
+ * Is @cpu a designated cqm reader?
+ */
+ if (!cpumask_test_and_clear_cpu(cpu, &cqm_cpumask))
+ return;
+
+ for_each_online_cpu(i) {
+ if (i == cpu)
+ continue;
+
+ if (phys_id == topology_physical_package_id(i)) {
+ cpumask_set_cpu(i, &cqm_cpumask);
+ break;
+ }
+ }
+}
+
+static int intel_cqm_cpu_notifier(struct notifier_block *nb,
+ unsigned long action, void *hcpu)
+{
+ unsigned int cpu = (unsigned long)hcpu;
+
+ switch (action & ~CPU_TASKS_FROZEN) {
+ case CPU_UP_PREPARE:
+ intel_cqm_cpu_prepare(cpu);
+ break;
+ case CPU_DOWN_PREPARE:
+ intel_cqm_cpu_exit(cpu);
+ break;
+ case CPU_STARTING:
+ cqm_pick_event_reader(cpu);
+ break;
+ }
+
+ return NOTIFY_OK;
+}
+
+static const struct x86_cpu_id intel_cqm_match[] = {
+ { .vendor = X86_VENDOR_INTEL, .feature = X86_FEATURE_CQM_OCCUP_LLC },
+ {}
+};
+
+static int __init intel_cqm_init(void)
+{
+ char *str, scale[20];
+ int i, cpu, ret;
+
+ if (!x86_match_cpu(intel_cqm_match))
+ return -ENODEV;
+
+ cqm_l3_scale = boot_cpu_data.x86_cache_occ_scale;
+
+ /*
+ * It's possible that not all resources support the same number
+ * of RMIDs. Instead of making scheduling much more complicated
+ * (where we have to match a task's RMID to a cpu that supports
+ * that many RMIDs) just find the minimum RMIDs supported across
+ * all cpus.
+ *
+ * Also, check that the scales match on all cpus.
+ */
+ cpu_notifier_register_begin();
+
+ for_each_online_cpu(cpu) {
+ struct cpuinfo_x86 *c = &cpu_data(cpu);
+
+ if (c->x86_cache_max_rmid < cqm_max_rmid)
+ cqm_max_rmid = c->x86_cache_max_rmid;
+
+ if (c->x86_cache_occ_scale != cqm_l3_scale) {
+ pr_err("Multiple LLC scale values, disabling\n");
+ ret = -EINVAL;
+ goto out;
+ }
+ }
+
+ /*
+ * A reasonable upper limit on the max threshold is the number
+ * of lines tagged per RMID if all RMIDs have the same number of
+ * lines tagged in the LLC.
+ *
+ * For a 35MB LLC and 56 RMIDs, this is ~1.8% of the LLC.
+ */
+ __intel_cqm_max_threshold =
+ boot_cpu_data.x86_cache_size * 1024 / (cqm_max_rmid + 1);
+
+ snprintf(scale, sizeof(scale), "%u", cqm_l3_scale);
+ str = kstrdup(scale, GFP_KERNEL);
+ if (!str) {
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ event_attr_intel_cqm_llc_scale.event_str = str;
+
+ ret = intel_cqm_setup_rmid_cache();
+ if (ret)
+ goto out;
+
+ for_each_online_cpu(i) {
+ intel_cqm_cpu_prepare(i);
+ cqm_pick_event_reader(i);
+ }
+
+ __perf_cpu_notifier(intel_cqm_cpu_notifier);
+
+ ret = perf_pmu_register(&intel_cqm_pmu, "intel_cqm", -1);
+ if (ret)
+ pr_err("Intel CQM perf registration failed: %d\n", ret);
+ else
+ pr_info("Intel CQM monitoring enabled\n");
+
+out:
+ cpu_notifier_register_done();
+
+ return ret;
+}
+device_initcall(intel_cqm_init);
debugctlmsr |= DEBUGCTLMSR_TR;
debugctlmsr |= DEBUGCTLMSR_BTS;
- debugctlmsr |= DEBUGCTLMSR_BTINT;
+ if (config & ARCH_PERFMON_EVENTSEL_INT)
+ debugctlmsr |= DEBUGCTLMSR_BTINT;
if (!(config & ARCH_PERFMON_EVENTSEL_OS))
debugctlmsr |= DEBUGCTLMSR_BTS_OFF_OS;
INTEL_PST_CONSTRAINT(0x02cd, 0x8), /* MEM_TRANS_RETIRED.PRECISE_STORES */
/* UOPS_RETIRED.ALL, inv=1, cmask=16 (cycles:p). */
INTEL_FLAGS_EVENT_CONSTRAINT(0x108001c2, 0xf),
+ INTEL_EXCLEVT_CONSTRAINT(0xd0, 0xf), /* MEM_UOP_RETIRED.* */
+ INTEL_EXCLEVT_CONSTRAINT(0xd1, 0xf), /* MEM_LOAD_UOPS_RETIRED.* */
+ INTEL_EXCLEVT_CONSTRAINT(0xd2, 0xf), /* MEM_LOAD_UOPS_LLC_HIT_RETIRED.* */
+ INTEL_EXCLEVT_CONSTRAINT(0xd3, 0xf), /* MEM_LOAD_UOPS_LLC_MISS_RETIRED.* */
/* Allow all events as PEBS with no flags */
INTEL_ALL_EVENT_CONSTRAINT(0, 0xf),
EVENT_CONSTRAINT_END
INTEL_PST_CONSTRAINT(0x02cd, 0x8), /* MEM_TRANS_RETIRED.PRECISE_STORES */
/* UOPS_RETIRED.ALL, inv=1, cmask=16 (cycles:p). */
INTEL_FLAGS_EVENT_CONSTRAINT(0x108001c2, 0xf),
+ INTEL_EXCLEVT_CONSTRAINT(0xd0, 0xf), /* MEM_UOP_RETIRED.* */
+ INTEL_EXCLEVT_CONSTRAINT(0xd1, 0xf), /* MEM_LOAD_UOPS_RETIRED.* */
+ INTEL_EXCLEVT_CONSTRAINT(0xd2, 0xf), /* MEM_LOAD_UOPS_LLC_HIT_RETIRED.* */
+ INTEL_EXCLEVT_CONSTRAINT(0xd3, 0xf), /* MEM_LOAD_UOPS_LLC_MISS_RETIRED.* */
/* Allow all events as PEBS with no flags */
INTEL_ALL_EVENT_CONSTRAINT(0, 0xf),
EVENT_CONSTRAINT_END
/* UOPS_RETIRED.ALL, inv=1, cmask=16 (cycles:p). */
INTEL_FLAGS_EVENT_CONSTRAINT(0x108001c2, 0xf),
INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_NA(0x01c2, 0xf), /* UOPS_RETIRED.ALL */
- INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_LD(0x11d0, 0xf), /* MEM_UOPS_RETIRED.STLB_MISS_LOADS */
- INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_LD(0x21d0, 0xf), /* MEM_UOPS_RETIRED.LOCK_LOADS */
- INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_LD(0x41d0, 0xf), /* MEM_UOPS_RETIRED.SPLIT_LOADS */
- INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_LD(0x81d0, 0xf), /* MEM_UOPS_RETIRED.ALL_LOADS */
- INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_ST(0x12d0, 0xf), /* MEM_UOPS_RETIRED.STLB_MISS_STORES */
- INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_ST(0x42d0, 0xf), /* MEM_UOPS_RETIRED.SPLIT_STORES */
- INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_ST(0x82d0, 0xf), /* MEM_UOPS_RETIRED.ALL_STORES */
- INTEL_FLAGS_EVENT_CONSTRAINT_DATALA_LD(0xd1, 0xf), /* MEM_LOAD_UOPS_RETIRED.* */
- INTEL_FLAGS_EVENT_CONSTRAINT_DATALA_LD(0xd2, 0xf), /* MEM_LOAD_UOPS_L3_HIT_RETIRED.* */
- INTEL_FLAGS_EVENT_CONSTRAINT_DATALA_LD(0xd3, 0xf), /* MEM_LOAD_UOPS_L3_MISS_RETIRED.* */
+ INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_XLD(0x11d0, 0xf), /* MEM_UOPS_RETIRED.STLB_MISS_LOADS */
+ INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_XLD(0x21d0, 0xf), /* MEM_UOPS_RETIRED.LOCK_LOADS */
+ INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_XLD(0x41d0, 0xf), /* MEM_UOPS_RETIRED.SPLIT_LOADS */
+ INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_XLD(0x81d0, 0xf), /* MEM_UOPS_RETIRED.ALL_LOADS */
+ INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_XST(0x12d0, 0xf), /* MEM_UOPS_RETIRED.STLB_MISS_STORES */
+ INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_XST(0x42d0, 0xf), /* MEM_UOPS_RETIRED.SPLIT_STORES */
+ INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_XST(0x82d0, 0xf), /* MEM_UOPS_RETIRED.ALL_STORES */
+ INTEL_FLAGS_EVENT_CONSTRAINT_DATALA_XLD(0xd1, 0xf), /* MEM_LOAD_UOPS_RETIRED.* */
+ INTEL_FLAGS_EVENT_CONSTRAINT_DATALA_XLD(0xd2, 0xf), /* MEM_LOAD_UOPS_L3_HIT_RETIRED.* */
+ INTEL_FLAGS_EVENT_CONSTRAINT_DATALA_XLD(0xd3, 0xf), /* MEM_LOAD_UOPS_L3_MISS_RETIRED.* */
/* Allow all events as PEBS with no flags */
INTEL_ALL_EVENT_CONSTRAINT(0, 0xf),
EVENT_CONSTRAINT_END
#define LBR_IND_JMP_BIT 6 /* do not capture indirect jumps */
#define LBR_REL_JMP_BIT 7 /* do not capture relative jumps */
#define LBR_FAR_BIT 8 /* do not capture far branches */
+#define LBR_CALL_STACK_BIT 9 /* enable call stack */
#define LBR_KERNEL (1 << LBR_KERNEL_BIT)
#define LBR_USER (1 << LBR_USER_BIT)
#define LBR_REL_JMP (1 << LBR_REL_JMP_BIT)
#define LBR_IND_JMP (1 << LBR_IND_JMP_BIT)
#define LBR_FAR (1 << LBR_FAR_BIT)
+#define LBR_CALL_STACK (1 << LBR_CALL_STACK_BIT)
#define LBR_PLM (LBR_KERNEL | LBR_USER)
#define LBR_FROM_FLAG_IN_TX (1ULL << 62)
#define LBR_FROM_FLAG_ABORT (1ULL << 61)
-#define for_each_branch_sample_type(x) \
- for ((x) = PERF_SAMPLE_BRANCH_USER; \
- (x) < PERF_SAMPLE_BRANCH_MAX; (x) <<= 1)
-
/*
* x86control flow change classification
* x86control flow changes include branches, interrupts, traps, faults
*/
enum {
- X86_BR_NONE = 0, /* unknown */
-
- X86_BR_USER = 1 << 0, /* branch target is user */
- X86_BR_KERNEL = 1 << 1, /* branch target is kernel */
-
- X86_BR_CALL = 1 << 2, /* call */
- X86_BR_RET = 1 << 3, /* return */
- X86_BR_SYSCALL = 1 << 4, /* syscall */
- X86_BR_SYSRET = 1 << 5, /* syscall return */
- X86_BR_INT = 1 << 6, /* sw interrupt */
- X86_BR_IRET = 1 << 7, /* return from interrupt */
- X86_BR_JCC = 1 << 8, /* conditional */
- X86_BR_JMP = 1 << 9, /* jump */
- X86_BR_IRQ = 1 << 10,/* hw interrupt or trap or fault */
- X86_BR_IND_CALL = 1 << 11,/* indirect calls */
- X86_BR_ABORT = 1 << 12,/* transaction abort */
- X86_BR_IN_TX = 1 << 13,/* in transaction */
- X86_BR_NO_TX = 1 << 14,/* not in transaction */
+ X86_BR_NONE = 0, /* unknown */
+
+ X86_BR_USER = 1 << 0, /* branch target is user */
+ X86_BR_KERNEL = 1 << 1, /* branch target is kernel */
+
+ X86_BR_CALL = 1 << 2, /* call */
+ X86_BR_RET = 1 << 3, /* return */
+ X86_BR_SYSCALL = 1 << 4, /* syscall */
+ X86_BR_SYSRET = 1 << 5, /* syscall return */
+ X86_BR_INT = 1 << 6, /* sw interrupt */
+ X86_BR_IRET = 1 << 7, /* return from interrupt */
+ X86_BR_JCC = 1 << 8, /* conditional */
+ X86_BR_JMP = 1 << 9, /* jump */
+ X86_BR_IRQ = 1 << 10,/* hw interrupt or trap or fault */
+ X86_BR_IND_CALL = 1 << 11,/* indirect calls */
+ X86_BR_ABORT = 1 << 12,/* transaction abort */
+ X86_BR_IN_TX = 1 << 13,/* in transaction */
+ X86_BR_NO_TX = 1 << 14,/* not in transaction */
+ X86_BR_ZERO_CALL = 1 << 15,/* zero length call */
+ X86_BR_CALL_STACK = 1 << 16,/* call stack */
};
#define X86_BR_PLM (X86_BR_USER | X86_BR_KERNEL)
X86_BR_JMP |\
X86_BR_IRQ |\
X86_BR_ABORT |\
- X86_BR_IND_CALL)
+ X86_BR_IND_CALL |\
+ X86_BR_ZERO_CALL)
#define X86_BR_ALL (X86_BR_PLM | X86_BR_ANY)
#define X86_BR_ANY_CALL \
(X86_BR_CALL |\
X86_BR_IND_CALL |\
+ X86_BR_ZERO_CALL |\
X86_BR_SYSCALL |\
X86_BR_IRQ |\
X86_BR_INT)
* otherwise it becomes near impossible to get a reliable stack.
*/
-static void __intel_pmu_lbr_enable(void)
+static void __intel_pmu_lbr_enable(bool pmi)
{
- u64 debugctl;
struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
+ u64 debugctl, lbr_select = 0, orig_debugctl;
- if (cpuc->lbr_sel)
- wrmsrl(MSR_LBR_SELECT, cpuc->lbr_sel->config);
+ /*
+ * No need to reprogram LBR_SELECT in a PMI, as it
+ * did not change.
+ */
+ if (cpuc->lbr_sel && !pmi) {
+ lbr_select = cpuc->lbr_sel->config;
+ wrmsrl(MSR_LBR_SELECT, lbr_select);
+ }
rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);
- debugctl |= (DEBUGCTLMSR_LBR | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI);
- wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);
+ orig_debugctl = debugctl;
+ debugctl |= DEBUGCTLMSR_LBR;
+ /*
+ * LBR callstack does not work well with FREEZE_LBRS_ON_PMI.
+ * If FREEZE_LBRS_ON_PMI is set, PMI near call/return instructions
+ * may cause superfluous increase/decrease of LBR_TOS.
+ */
+ if (!(lbr_select & LBR_CALL_STACK))
+ debugctl |= DEBUGCTLMSR_FREEZE_LBRS_ON_PMI;
+ if (orig_debugctl != debugctl)
+ wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);
}
static void __intel_pmu_lbr_disable(void)
intel_pmu_lbr_reset_64();
}
+/*
+ * TOS = most recently recorded branch
+ */
+static inline u64 intel_pmu_lbr_tos(void)
+{
+ u64 tos;
+
+ rdmsrl(x86_pmu.lbr_tos, tos);
+ return tos;
+}
+
+enum {
+ LBR_NONE,
+ LBR_VALID,
+};
+
+static void __intel_pmu_lbr_restore(struct x86_perf_task_context *task_ctx)
+{
+ int i;
+ unsigned lbr_idx, mask;
+ u64 tos;
+
+ if (task_ctx->lbr_callstack_users == 0 ||
+ task_ctx->lbr_stack_state == LBR_NONE) {
+ intel_pmu_lbr_reset();
+ return;
+ }
+
+ mask = x86_pmu.lbr_nr - 1;
+ tos = intel_pmu_lbr_tos();
+ for (i = 0; i < x86_pmu.lbr_nr; i++) {
+ lbr_idx = (tos - i) & mask;
+ wrmsrl(x86_pmu.lbr_from + lbr_idx, task_ctx->lbr_from[i]);
+ wrmsrl(x86_pmu.lbr_to + lbr_idx, task_ctx->lbr_to[i]);
+ }
+ task_ctx->lbr_stack_state = LBR_NONE;
+}
+
+static void __intel_pmu_lbr_save(struct x86_perf_task_context *task_ctx)
+{
+ int i;
+ unsigned lbr_idx, mask;
+ u64 tos;
+
+ if (task_ctx->lbr_callstack_users == 0) {
+ task_ctx->lbr_stack_state = LBR_NONE;
+ return;
+ }
+
+ mask = x86_pmu.lbr_nr - 1;
+ tos = intel_pmu_lbr_tos();
+ for (i = 0; i < x86_pmu.lbr_nr; i++) {
+ lbr_idx = (tos - i) & mask;
+ rdmsrl(x86_pmu.lbr_from + lbr_idx, task_ctx->lbr_from[i]);
+ rdmsrl(x86_pmu.lbr_to + lbr_idx, task_ctx->lbr_to[i]);
+ }
+ task_ctx->lbr_stack_state = LBR_VALID;
+}
+
+void intel_pmu_lbr_sched_task(struct perf_event_context *ctx, bool sched_in)
+{
+ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
+ struct x86_perf_task_context *task_ctx;
+
+ if (!x86_pmu.lbr_nr)
+ return;
+
+ /*
+ * If LBR callstack feature is enabled and the stack was saved when
+ * the task was scheduled out, restore the stack. Otherwise flush
+ * the LBR stack.
+ */
+ task_ctx = ctx ? ctx->task_ctx_data : NULL;
+ if (task_ctx) {
+ if (sched_in) {
+ __intel_pmu_lbr_restore(task_ctx);
+ cpuc->lbr_context = ctx;
+ } else {
+ __intel_pmu_lbr_save(task_ctx);
+ }
+ return;
+ }
+
+ /*
+ * When sampling the branck stack in system-wide, it may be
+ * necessary to flush the stack on context switch. This happens
+ * when the branch stack does not tag its entries with the pid
+ * of the current task. Otherwise it becomes impossible to
+ * associate a branch entry with a task. This ambiguity is more
+ * likely to appear when the branch stack supports priv level
+ * filtering and the user sets it to monitor only at the user
+ * level (which could be a useful measurement in system-wide
+ * mode). In that case, the risk is high of having a branch
+ * stack with branch from multiple tasks.
+ */
+ if (sched_in) {
+ intel_pmu_lbr_reset();
+ cpuc->lbr_context = ctx;
+ }
+}
+
+static inline bool branch_user_callstack(unsigned br_sel)
+{
+ return (br_sel & X86_BR_USER) && (br_sel & X86_BR_CALL_STACK);
+}
+
void intel_pmu_lbr_enable(struct perf_event *event)
{
struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
+ struct x86_perf_task_context *task_ctx;
if (!x86_pmu.lbr_nr)
return;
}
cpuc->br_sel = event->hw.branch_reg.reg;
+ if (branch_user_callstack(cpuc->br_sel) && event->ctx &&
+ event->ctx->task_ctx_data) {
+ task_ctx = event->ctx->task_ctx_data;
+ task_ctx->lbr_callstack_users++;
+ }
+
cpuc->lbr_users++;
+ perf_sched_cb_inc(event->ctx->pmu);
}
void intel_pmu_lbr_disable(struct perf_event *event)
{
struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
+ struct x86_perf_task_context *task_ctx;
if (!x86_pmu.lbr_nr)
return;
+ if (branch_user_callstack(cpuc->br_sel) && event->ctx &&
+ event->ctx->task_ctx_data) {
+ task_ctx = event->ctx->task_ctx_data;
+ task_ctx->lbr_callstack_users--;
+ }
+
cpuc->lbr_users--;
WARN_ON_ONCE(cpuc->lbr_users < 0);
+ perf_sched_cb_dec(event->ctx->pmu);
if (cpuc->enabled && !cpuc->lbr_users) {
__intel_pmu_lbr_disable();
}
}
-void intel_pmu_lbr_enable_all(void)
+void intel_pmu_lbr_enable_all(bool pmi)
{
struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
if (cpuc->lbr_users)
- __intel_pmu_lbr_enable();
+ __intel_pmu_lbr_enable(pmi);
}
void intel_pmu_lbr_disable_all(void)
__intel_pmu_lbr_disable();
}
-/*
- * TOS = most recently recorded branch
- */
-static inline u64 intel_pmu_lbr_tos(void)
-{
- u64 tos;
-
- rdmsrl(x86_pmu.lbr_tos, tos);
-
- return tos;
-}
-
static void intel_pmu_lbr_read_32(struct cpu_hw_events *cpuc)
{
unsigned long mask = x86_pmu.lbr_nr - 1;
* - in case there is no HW filter
* - in case the HW filter has errata or limitations
*/
-static void intel_pmu_setup_sw_lbr_filter(struct perf_event *event)
+static int intel_pmu_setup_sw_lbr_filter(struct perf_event *event)
{
u64 br_type = event->attr.branch_sample_type;
int mask = 0;
if (br_type & PERF_SAMPLE_BRANCH_COND)
mask |= X86_BR_JCC;
+ if (br_type & PERF_SAMPLE_BRANCH_CALL_STACK) {
+ if (!x86_pmu_has_lbr_callstack())
+ return -EOPNOTSUPP;
+ if (mask & ~(X86_BR_USER | X86_BR_KERNEL))
+ return -EINVAL;
+ mask |= X86_BR_CALL | X86_BR_IND_CALL | X86_BR_RET |
+ X86_BR_CALL_STACK;
+ }
+
/*
* stash actual user request into reg, it may
* be used by fixup code for some CPU
*/
event->hw.branch_reg.reg = mask;
+ return 0;
}
/*
{
struct hw_perf_event_extra *reg;
u64 br_type = event->attr.branch_sample_type;
- u64 mask = 0, m;
- u64 v;
+ u64 mask = 0, v;
+ int i;
- for_each_branch_sample_type(m) {
- if (!(br_type & m))
+ for (i = 0; i < PERF_SAMPLE_BRANCH_MAX_SHIFT; i++) {
+ if (!(br_type & (1ULL << i)))
continue;
- v = x86_pmu.lbr_sel_map[m];
+ v = x86_pmu.lbr_sel_map[i];
if (v == LBR_NOT_SUPP)
return -EOPNOTSUPP;
reg = &event->hw.branch_reg;
reg->idx = EXTRA_REG_LBR;
- /* LBR_SELECT operates in suppress mode so invert mask */
- reg->config = ~mask & x86_pmu.lbr_sel_mask;
+ /*
+ * The first 9 bits (LBR_SEL_MASK) in LBR_SELECT operate
+ * in suppress mode. So LBR_SELECT should be set to
+ * (~mask & LBR_SEL_MASK) | (mask & ~LBR_SEL_MASK)
+ */
+ reg->config = mask ^ x86_pmu.lbr_sel_mask;
return 0;
}
/*
* setup SW LBR filter
*/
- intel_pmu_setup_sw_lbr_filter(event);
+ ret = intel_pmu_setup_sw_lbr_filter(event);
+ if (ret)
+ return ret;
/*
* setup HW LBR filter, if any
ret = X86_BR_INT;
break;
case 0xe8: /* call near rel */
+ insn_get_immediate(&insn);
+ if (insn.immediate1.value == 0) {
+ /* zero length call */
+ ret = X86_BR_ZERO_CALL;
+ break;
+ }
case 0x9a: /* call far absolute */
ret = X86_BR_CALL;
break;
/*
* Map interface branch filters onto LBR filters
*/
-static const int nhm_lbr_sel_map[PERF_SAMPLE_BRANCH_MAX] = {
- [PERF_SAMPLE_BRANCH_ANY] = LBR_ANY,
- [PERF_SAMPLE_BRANCH_USER] = LBR_USER,
- [PERF_SAMPLE_BRANCH_KERNEL] = LBR_KERNEL,
- [PERF_SAMPLE_BRANCH_HV] = LBR_IGN,
- [PERF_SAMPLE_BRANCH_ANY_RETURN] = LBR_RETURN | LBR_REL_JMP
- | LBR_IND_JMP | LBR_FAR,
+static const int nhm_lbr_sel_map[PERF_SAMPLE_BRANCH_MAX_SHIFT] = {
+ [PERF_SAMPLE_BRANCH_ANY_SHIFT] = LBR_ANY,
+ [PERF_SAMPLE_BRANCH_USER_SHIFT] = LBR_USER,
+ [PERF_SAMPLE_BRANCH_KERNEL_SHIFT] = LBR_KERNEL,
+ [PERF_SAMPLE_BRANCH_HV_SHIFT] = LBR_IGN,
+ [PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT] = LBR_RETURN | LBR_REL_JMP
+ | LBR_IND_JMP | LBR_FAR,
/*
* NHM/WSM erratum: must include REL_JMP+IND_JMP to get CALL branches
*/
- [PERF_SAMPLE_BRANCH_ANY_CALL] =
+ [PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT] =
LBR_REL_CALL | LBR_IND_CALL | LBR_REL_JMP | LBR_IND_JMP | LBR_FAR,
/*
* NHM/WSM erratum: must include IND_JMP to capture IND_CALL
*/
- [PERF_SAMPLE_BRANCH_IND_CALL] = LBR_IND_CALL | LBR_IND_JMP,
- [PERF_SAMPLE_BRANCH_COND] = LBR_JCC,
+ [PERF_SAMPLE_BRANCH_IND_CALL_SHIFT] = LBR_IND_CALL | LBR_IND_JMP,
+ [PERF_SAMPLE_BRANCH_COND_SHIFT] = LBR_JCC,
};
-static const int snb_lbr_sel_map[PERF_SAMPLE_BRANCH_MAX] = {
- [PERF_SAMPLE_BRANCH_ANY] = LBR_ANY,
- [PERF_SAMPLE_BRANCH_USER] = LBR_USER,
- [PERF_SAMPLE_BRANCH_KERNEL] = LBR_KERNEL,
- [PERF_SAMPLE_BRANCH_HV] = LBR_IGN,
- [PERF_SAMPLE_BRANCH_ANY_RETURN] = LBR_RETURN | LBR_FAR,
- [PERF_SAMPLE_BRANCH_ANY_CALL] = LBR_REL_CALL | LBR_IND_CALL
- | LBR_FAR,
- [PERF_SAMPLE_BRANCH_IND_CALL] = LBR_IND_CALL,
- [PERF_SAMPLE_BRANCH_COND] = LBR_JCC,
+static const int snb_lbr_sel_map[PERF_SAMPLE_BRANCH_MAX_SHIFT] = {
+ [PERF_SAMPLE_BRANCH_ANY_SHIFT] = LBR_ANY,
+ [PERF_SAMPLE_BRANCH_USER_SHIFT] = LBR_USER,
+ [PERF_SAMPLE_BRANCH_KERNEL_SHIFT] = LBR_KERNEL,
+ [PERF_SAMPLE_BRANCH_HV_SHIFT] = LBR_IGN,
+ [PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT] = LBR_RETURN | LBR_FAR,
+ [PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT] = LBR_REL_CALL | LBR_IND_CALL
+ | LBR_FAR,
+ [PERF_SAMPLE_BRANCH_IND_CALL_SHIFT] = LBR_IND_CALL,
+ [PERF_SAMPLE_BRANCH_COND_SHIFT] = LBR_JCC,
+};
+
+static const int hsw_lbr_sel_map[PERF_SAMPLE_BRANCH_MAX_SHIFT] = {
+ [PERF_SAMPLE_BRANCH_ANY_SHIFT] = LBR_ANY,
+ [PERF_SAMPLE_BRANCH_USER_SHIFT] = LBR_USER,
+ [PERF_SAMPLE_BRANCH_KERNEL_SHIFT] = LBR_KERNEL,
+ [PERF_SAMPLE_BRANCH_HV_SHIFT] = LBR_IGN,
+ [PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT] = LBR_RETURN | LBR_FAR,
+ [PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT] = LBR_REL_CALL | LBR_IND_CALL
+ | LBR_FAR,
+ [PERF_SAMPLE_BRANCH_IND_CALL_SHIFT] = LBR_IND_CALL,
+ [PERF_SAMPLE_BRANCH_COND_SHIFT] = LBR_JCC,
+ [PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT] = LBR_REL_CALL | LBR_IND_CALL
+ | LBR_RETURN | LBR_CALL_STACK,
};
/* core */
pr_cont("16-deep LBR, ");
}
+/* haswell */
+void intel_pmu_lbr_init_hsw(void)
+{
+ x86_pmu.lbr_nr = 16;
+ x86_pmu.lbr_tos = MSR_LBR_TOS;
+ x86_pmu.lbr_from = MSR_LBR_NHM_FROM;
+ x86_pmu.lbr_to = MSR_LBR_NHM_TO;
+
+ x86_pmu.lbr_sel_mask = LBR_SEL_MASK;
+ x86_pmu.lbr_sel_map = hsw_lbr_sel_map;
+
+ pr_cont("16-deep LBR, ");
+}
+
/* atom */
void __init intel_pmu_lbr_init_atom(void)
{
--- /dev/null
+/*
+ * Intel(R) Processor Trace PMU driver for perf
+ * Copyright (c) 2013-2014, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * Intel PT is specified in the Intel Architecture Instruction Set Extensions
+ * Programming Reference:
+ * http://software.intel.com/en-us/intel-isa-extensions
+ */
+
+#undef DEBUG
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+
+#include <asm/perf_event.h>
+#include <asm/insn.h>
+#include <asm/io.h>
+
+#include "perf_event.h"
+#include "intel_pt.h"
+
+static DEFINE_PER_CPU(struct pt, pt_ctx);
+
+static struct pt_pmu pt_pmu;
+
+enum cpuid_regs {
+ CR_EAX = 0,
+ CR_ECX,
+ CR_EDX,
+ CR_EBX
+};
+
+/*
+ * Capabilities of Intel PT hardware, such as number of address bits or
+ * supported output schemes, are cached and exported to userspace as "caps"
+ * attribute group of pt pmu device
+ * (/sys/bus/event_source/devices/intel_pt/caps/) so that userspace can store
+ * relevant bits together with intel_pt traces.
+ *
+ * These are necessary for both trace decoding (payloads_lip, contains address
+ * width encoded in IP-related packets), and event configuration (bitmasks with
+ * permitted values for certain bit fields).
+ */
+#define PT_CAP(_n, _l, _r, _m) \
+ [PT_CAP_ ## _n] = { .name = __stringify(_n), .leaf = _l, \
+ .reg = _r, .mask = _m }
+
+static struct pt_cap_desc {
+ const char *name;
+ u32 leaf;
+ u8 reg;
+ u32 mask;
+} pt_caps[] = {
+ PT_CAP(max_subleaf, 0, CR_EAX, 0xffffffff),
+ PT_CAP(cr3_filtering, 0, CR_EBX, BIT(0)),
+ PT_CAP(topa_output, 0, CR_ECX, BIT(0)),
+ PT_CAP(topa_multiple_entries, 0, CR_ECX, BIT(1)),
+ PT_CAP(payloads_lip, 0, CR_ECX, BIT(31)),
+};
+
+static u32 pt_cap_get(enum pt_capabilities cap)
+{
+ struct pt_cap_desc *cd = &pt_caps[cap];
+ u32 c = pt_pmu.caps[cd->leaf * 4 + cd->reg];
+ unsigned int shift = __ffs(cd->mask);
+
+ return (c & cd->mask) >> shift;
+}
+
+static ssize_t pt_cap_show(struct device *cdev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct dev_ext_attribute *ea =
+ container_of(attr, struct dev_ext_attribute, attr);
+ enum pt_capabilities cap = (long)ea->var;
+
+ return snprintf(buf, PAGE_SIZE, "%x\n", pt_cap_get(cap));
+}
+
+static struct attribute_group pt_cap_group = {
+ .name = "caps",
+};
+
+PMU_FORMAT_ATTR(tsc, "config:10" );
+PMU_FORMAT_ATTR(noretcomp, "config:11" );
+
+static struct attribute *pt_formats_attr[] = {
+ &format_attr_tsc.attr,
+ &format_attr_noretcomp.attr,
+ NULL,
+};
+
+static struct attribute_group pt_format_group = {
+ .name = "format",
+ .attrs = pt_formats_attr,
+};
+
+static const struct attribute_group *pt_attr_groups[] = {
+ &pt_cap_group,
+ &pt_format_group,
+ NULL,
+};
+
+static int __init pt_pmu_hw_init(void)
+{
+ struct dev_ext_attribute *de_attrs;
+ struct attribute **attrs;
+ size_t size;
+ int ret;
+ long i;
+
+ attrs = NULL;
+ ret = -ENODEV;
+ if (!test_cpu_cap(&boot_cpu_data, X86_FEATURE_INTEL_PT))
+ goto fail;
+
+ for (i = 0; i < PT_CPUID_LEAVES; i++) {
+ cpuid_count(20, i,
+ &pt_pmu.caps[CR_EAX + i*4],
+ &pt_pmu.caps[CR_EBX + i*4],
+ &pt_pmu.caps[CR_ECX + i*4],
+ &pt_pmu.caps[CR_EDX + i*4]);
+ }
+
+ ret = -ENOMEM;
+ size = sizeof(struct attribute *) * (ARRAY_SIZE(pt_caps)+1);
+ attrs = kzalloc(size, GFP_KERNEL);
+ if (!attrs)
+ goto fail;
+
+ size = sizeof(struct dev_ext_attribute) * (ARRAY_SIZE(pt_caps)+1);
+ de_attrs = kzalloc(size, GFP_KERNEL);
+ if (!de_attrs)
+ goto fail;
+
+ for (i = 0; i < ARRAY_SIZE(pt_caps); i++) {
+ struct dev_ext_attribute *de_attr = de_attrs + i;
+
+ de_attr->attr.attr.name = pt_caps[i].name;
+
+ sysfs_attr_init(&de_attrs->attr.attr);
+
+ de_attr->attr.attr.mode = S_IRUGO;
+ de_attr->attr.show = pt_cap_show;
+ de_attr->var = (void *)i;
+
+ attrs[i] = &de_attr->attr.attr;
+ }
+
+ pt_cap_group.attrs = attrs;
+
+ return 0;
+
+fail:
+ kfree(attrs);
+
+ return ret;
+}
+
+#define PT_CONFIG_MASK (RTIT_CTL_TSC_EN | RTIT_CTL_DISRETC)
+
+static bool pt_event_valid(struct perf_event *event)
+{
+ u64 config = event->attr.config;
+
+ if ((config & PT_CONFIG_MASK) != config)
+ return false;
+
+ return true;
+}
+
+/*
+ * PT configuration helpers
+ * These all are cpu affine and operate on a local PT
+ */
+
+static bool pt_is_running(void)
+{
+ u64 ctl;
+
+ rdmsrl(MSR_IA32_RTIT_CTL, ctl);
+
+ return !!(ctl & RTIT_CTL_TRACEEN);
+}
+
+static void pt_config(struct perf_event *event)
+{
+ u64 reg;
+
+ reg = RTIT_CTL_TOPA | RTIT_CTL_BRANCH_EN | RTIT_CTL_TRACEEN;
+
+ if (!event->attr.exclude_kernel)
+ reg |= RTIT_CTL_OS;
+ if (!event->attr.exclude_user)
+ reg |= RTIT_CTL_USR;
+
+ reg |= (event->attr.config & PT_CONFIG_MASK);
+
+ wrmsrl(MSR_IA32_RTIT_CTL, reg);
+}
+
+static void pt_config_start(bool start)
+{
+ u64 ctl;
+
+ rdmsrl(MSR_IA32_RTIT_CTL, ctl);
+ if (start)
+ ctl |= RTIT_CTL_TRACEEN;
+ else
+ ctl &= ~RTIT_CTL_TRACEEN;
+ wrmsrl(MSR_IA32_RTIT_CTL, ctl);
+
+ /*
+ * A wrmsr that disables trace generation serializes other PT
+ * registers and causes all data packets to be written to memory,
+ * but a fence is required for the data to become globally visible.
+ *
+ * The below WMB, separating data store and aux_head store matches
+ * the consumer's RMB that separates aux_head load and data load.
+ */
+ if (!start)
+ wmb();
+}
+
+static void pt_config_buffer(void *buf, unsigned int topa_idx,
+ unsigned int output_off)
+{
+ u64 reg;
+
+ wrmsrl(MSR_IA32_RTIT_OUTPUT_BASE, virt_to_phys(buf));
+
+ reg = 0x7f | ((u64)topa_idx << 7) | ((u64)output_off << 32);
+
+ wrmsrl(MSR_IA32_RTIT_OUTPUT_MASK, reg);
+}
+
+/*
+ * Keep ToPA table-related metadata on the same page as the actual table,
+ * taking up a few words from the top
+ */
+
+#define TENTS_PER_PAGE (((PAGE_SIZE - 40) / sizeof(struct topa_entry)) - 1)
+
+/**
+ * struct topa - page-sized ToPA table with metadata at the top
+ * @table: actual ToPA table entries, as understood by PT hardware
+ * @list: linkage to struct pt_buffer's list of tables
+ * @phys: physical address of this page
+ * @offset: offset of the first entry in this table in the buffer
+ * @size: total size of all entries in this table
+ * @last: index of the last initialized entry in this table
+ */
+struct topa {
+ struct topa_entry table[TENTS_PER_PAGE];
+ struct list_head list;
+ u64 phys;
+ u64 offset;
+ size_t size;
+ int last;
+};
+
+/* make -1 stand for the last table entry */
+#define TOPA_ENTRY(t, i) ((i) == -1 ? &(t)->table[(t)->last] : &(t)->table[(i)])
+
+/**
+ * topa_alloc() - allocate page-sized ToPA table
+ * @cpu: CPU on which to allocate.
+ * @gfp: Allocation flags.
+ *
+ * Return: On success, return the pointer to ToPA table page.
+ */
+static struct topa *topa_alloc(int cpu, gfp_t gfp)
+{
+ int node = cpu_to_node(cpu);
+ struct topa *topa;
+ struct page *p;
+
+ p = alloc_pages_node(node, gfp | __GFP_ZERO, 0);
+ if (!p)
+ return NULL;
+
+ topa = page_address(p);
+ topa->last = 0;
+ topa->phys = page_to_phys(p);
+
+ /*
+ * In case of singe-entry ToPA, always put the self-referencing END
+ * link as the 2nd entry in the table
+ */
+ if (!pt_cap_get(PT_CAP_topa_multiple_entries)) {
+ TOPA_ENTRY(topa, 1)->base = topa->phys >> TOPA_SHIFT;
+ TOPA_ENTRY(topa, 1)->end = 1;
+ }
+
+ return topa;
+}
+
+/**
+ * topa_free() - free a page-sized ToPA table
+ * @topa: Table to deallocate.
+ */
+static void topa_free(struct topa *topa)
+{
+ free_page((unsigned long)topa);
+}
+
+/**
+ * topa_insert_table() - insert a ToPA table into a buffer
+ * @buf: PT buffer that's being extended.
+ * @topa: New topa table to be inserted.
+ *
+ * If it's the first table in this buffer, set up buffer's pointers
+ * accordingly; otherwise, add a END=1 link entry to @topa to the current
+ * "last" table and adjust the last table pointer to @topa.
+ */
+static void topa_insert_table(struct pt_buffer *buf, struct topa *topa)
+{
+ struct topa *last = buf->last;
+
+ list_add_tail(&topa->list, &buf->tables);
+
+ if (!buf->first) {
+ buf->first = buf->last = buf->cur = topa;
+ return;
+ }
+
+ topa->offset = last->offset + last->size;
+ buf->last = topa;
+
+ if (!pt_cap_get(PT_CAP_topa_multiple_entries))
+ return;
+
+ BUG_ON(last->last != TENTS_PER_PAGE - 1);
+
+ TOPA_ENTRY(last, -1)->base = topa->phys >> TOPA_SHIFT;
+ TOPA_ENTRY(last, -1)->end = 1;
+}
+
+/**
+ * topa_table_full() - check if a ToPA table is filled up
+ * @topa: ToPA table.
+ */
+static bool topa_table_full(struct topa *topa)
+{
+ /* single-entry ToPA is a special case */
+ if (!pt_cap_get(PT_CAP_topa_multiple_entries))
+ return !!topa->last;
+
+ return topa->last == TENTS_PER_PAGE - 1;
+}
+
+/**
+ * topa_insert_pages() - create a list of ToPA tables
+ * @buf: PT buffer being initialized.
+ * @gfp: Allocation flags.
+ *
+ * This initializes a list of ToPA tables with entries from
+ * the data_pages provided by rb_alloc_aux().
+ *
+ * Return: 0 on success or error code.
+ */
+static int topa_insert_pages(struct pt_buffer *buf, gfp_t gfp)
+{
+ struct topa *topa = buf->last;
+ int order = 0;
+ struct page *p;
+
+ p = virt_to_page(buf->data_pages[buf->nr_pages]);
+ if (PagePrivate(p))
+ order = page_private(p);
+
+ if (topa_table_full(topa)) {
+ topa = topa_alloc(buf->cpu, gfp);
+ if (!topa)
+ return -ENOMEM;
+
+ topa_insert_table(buf, topa);
+ }
+
+ TOPA_ENTRY(topa, -1)->base = page_to_phys(p) >> TOPA_SHIFT;
+ TOPA_ENTRY(topa, -1)->size = order;
+ if (!buf->snapshot && !pt_cap_get(PT_CAP_topa_multiple_entries)) {
+ TOPA_ENTRY(topa, -1)->intr = 1;
+ TOPA_ENTRY(topa, -1)->stop = 1;
+ }
+
+ topa->last++;
+ topa->size += sizes(order);
+
+ buf->nr_pages += 1ul << order;
+
+ return 0;
+}
+
+/**
+ * pt_topa_dump() - print ToPA tables and their entries
+ * @buf: PT buffer.
+ */
+static void pt_topa_dump(struct pt_buffer *buf)
+{
+ struct topa *topa;
+
+ list_for_each_entry(topa, &buf->tables, list) {
+ int i;
+
+ pr_debug("# table @%p (%016Lx), off %llx size %zx\n", topa->table,
+ topa->phys, topa->offset, topa->size);
+ for (i = 0; i < TENTS_PER_PAGE; i++) {
+ pr_debug("# entry @%p (%lx sz %u %c%c%c) raw=%16llx\n",
+ &topa->table[i],
+ (unsigned long)topa->table[i].base << TOPA_SHIFT,
+ sizes(topa->table[i].size),
+ topa->table[i].end ? 'E' : ' ',
+ topa->table[i].intr ? 'I' : ' ',
+ topa->table[i].stop ? 'S' : ' ',
+ *(u64 *)&topa->table[i]);
+ if ((pt_cap_get(PT_CAP_topa_multiple_entries) &&
+ topa->table[i].stop) ||
+ topa->table[i].end)
+ break;
+ }
+ }
+}
+
+/**
+ * pt_buffer_advance() - advance to the next output region
+ * @buf: PT buffer.
+ *
+ * Advance the current pointers in the buffer to the next ToPA entry.
+ */
+static void pt_buffer_advance(struct pt_buffer *buf)
+{
+ buf->output_off = 0;
+ buf->cur_idx++;
+
+ if (buf->cur_idx == buf->cur->last) {
+ if (buf->cur == buf->last)
+ buf->cur = buf->first;
+ else
+ buf->cur = list_entry(buf->cur->list.next, struct topa,
+ list);
+ buf->cur_idx = 0;
+ }
+}
+
+/**
+ * pt_update_head() - calculate current offsets and sizes
+ * @pt: Per-cpu pt context.
+ *
+ * Update buffer's current write pointer position and data size.
+ */
+static void pt_update_head(struct pt *pt)
+{
+ struct pt_buffer *buf = perf_get_aux(&pt->handle);
+ u64 topa_idx, base, old;
+
+ /* offset of the first region in this table from the beginning of buf */
+ base = buf->cur->offset + buf->output_off;
+
+ /* offset of the current output region within this table */
+ for (topa_idx = 0; topa_idx < buf->cur_idx; topa_idx++)
+ base += sizes(buf->cur->table[topa_idx].size);
+
+ if (buf->snapshot) {
+ local_set(&buf->data_size, base);
+ } else {
+ old = (local64_xchg(&buf->head, base) &
+ ((buf->nr_pages << PAGE_SHIFT) - 1));
+ if (base < old)
+ base += buf->nr_pages << PAGE_SHIFT;
+
+ local_add(base - old, &buf->data_size);
+ }
+}
+
+/**
+ * pt_buffer_region() - obtain current output region's address
+ * @buf: PT buffer.
+ */
+static void *pt_buffer_region(struct pt_buffer *buf)
+{
+ return phys_to_virt(buf->cur->table[buf->cur_idx].base << TOPA_SHIFT);
+}
+
+/**
+ * pt_buffer_region_size() - obtain current output region's size
+ * @buf: PT buffer.
+ */
+static size_t pt_buffer_region_size(struct pt_buffer *buf)
+{
+ return sizes(buf->cur->table[buf->cur_idx].size);
+}
+
+/**
+ * pt_handle_status() - take care of possible status conditions
+ * @pt: Per-cpu pt context.
+ */
+static void pt_handle_status(struct pt *pt)
+{
+ struct pt_buffer *buf = perf_get_aux(&pt->handle);
+ int advance = 0;
+ u64 status;
+
+ rdmsrl(MSR_IA32_RTIT_STATUS, status);
+
+ if (status & RTIT_STATUS_ERROR) {
+ pr_err_ratelimited("ToPA ERROR encountered, trying to recover\n");
+ pt_topa_dump(buf);
+ status &= ~RTIT_STATUS_ERROR;
+ }
+
+ if (status & RTIT_STATUS_STOPPED) {
+ status &= ~RTIT_STATUS_STOPPED;
+
+ /*
+ * On systems that only do single-entry ToPA, hitting STOP
+ * means we are already losing data; need to let the decoder
+ * know.
+ */
+ if (!pt_cap_get(PT_CAP_topa_multiple_entries) ||
+ buf->output_off == sizes(TOPA_ENTRY(buf->cur, buf->cur_idx)->size)) {
+ local_inc(&buf->lost);
+ advance++;
+ }
+ }
+
+ /*
+ * Also on single-entry ToPA implementations, interrupt will come
+ * before the output reaches its output region's boundary.
+ */
+ if (!pt_cap_get(PT_CAP_topa_multiple_entries) && !buf->snapshot &&
+ pt_buffer_region_size(buf) - buf->output_off <= TOPA_PMI_MARGIN) {
+ void *head = pt_buffer_region(buf);
+
+ /* everything within this margin needs to be zeroed out */
+ memset(head + buf->output_off, 0,
+ pt_buffer_region_size(buf) -
+ buf->output_off);
+ advance++;
+ }
+
+ if (advance)
+ pt_buffer_advance(buf);
+
+ wrmsrl(MSR_IA32_RTIT_STATUS, status);
+}
+
+/**
+ * pt_read_offset() - translate registers into buffer pointers
+ * @buf: PT buffer.
+ *
+ * Set buffer's output pointers from MSR values.
+ */
+static void pt_read_offset(struct pt_buffer *buf)
+{
+ u64 offset, base_topa;
+
+ rdmsrl(MSR_IA32_RTIT_OUTPUT_BASE, base_topa);
+ buf->cur = phys_to_virt(base_topa);
+
+ rdmsrl(MSR_IA32_RTIT_OUTPUT_MASK, offset);
+ /* offset within current output region */
+ buf->output_off = offset >> 32;
+ /* index of current output region within this table */
+ buf->cur_idx = (offset & 0xffffff80) >> 7;
+}
+
+/**
+ * pt_topa_next_entry() - obtain index of the first page in the next ToPA entry
+ * @buf: PT buffer.
+ * @pg: Page offset in the buffer.
+ *
+ * When advancing to the next output region (ToPA entry), given a page offset
+ * into the buffer, we need to find the offset of the first page in the next
+ * region.
+ */
+static unsigned int pt_topa_next_entry(struct pt_buffer *buf, unsigned int pg)
+{
+ struct topa_entry *te = buf->topa_index[pg];
+
+ /* one region */
+ if (buf->first == buf->last && buf->first->last == 1)
+ return pg;
+
+ do {
+ pg++;
+ pg &= buf->nr_pages - 1;
+ } while (buf->topa_index[pg] == te);
+
+ return pg;
+}
+
+/**
+ * pt_buffer_reset_markers() - place interrupt and stop bits in the buffer
+ * @buf: PT buffer.
+ * @handle: Current output handle.
+ *
+ * Place INT and STOP marks to prevent overwriting old data that the consumer
+ * hasn't yet collected.
+ */
+static int pt_buffer_reset_markers(struct pt_buffer *buf,
+ struct perf_output_handle *handle)
+
+{
+ unsigned long idx, npages, end;
+
+ if (buf->snapshot)
+ return 0;
+
+ /* can't stop in the middle of an output region */
+ if (buf->output_off + handle->size + 1 <
+ sizes(TOPA_ENTRY(buf->cur, buf->cur_idx)->size))
+ return -EINVAL;
+
+
+ /* single entry ToPA is handled by marking all regions STOP=1 INT=1 */
+ if (!pt_cap_get(PT_CAP_topa_multiple_entries))
+ return 0;
+
+ /* clear STOP and INT from current entry */
+ buf->topa_index[buf->stop_pos]->stop = 0;
+ buf->topa_index[buf->intr_pos]->intr = 0;
+
+ if (pt_cap_get(PT_CAP_topa_multiple_entries)) {
+ npages = (handle->size + 1) >> PAGE_SHIFT;
+ end = (local64_read(&buf->head) >> PAGE_SHIFT) + npages;
+ /*if (end > handle->wakeup >> PAGE_SHIFT)
+ end = handle->wakeup >> PAGE_SHIFT;*/
+ idx = end & (buf->nr_pages - 1);
+ buf->stop_pos = idx;
+ idx = (local64_read(&buf->head) >> PAGE_SHIFT) + npages - 1;
+ idx &= buf->nr_pages - 1;
+ buf->intr_pos = idx;
+ }
+
+ buf->topa_index[buf->stop_pos]->stop = 1;
+ buf->topa_index[buf->intr_pos]->intr = 1;
+
+ return 0;
+}
+
+/**
+ * pt_buffer_setup_topa_index() - build topa_index[] table of regions
+ * @buf: PT buffer.
+ *
+ * topa_index[] references output regions indexed by offset into the
+ * buffer for purposes of quick reverse lookup.
+ */
+static void pt_buffer_setup_topa_index(struct pt_buffer *buf)
+{
+ struct topa *cur = buf->first, *prev = buf->last;
+ struct topa_entry *te_cur = TOPA_ENTRY(cur, 0),
+ *te_prev = TOPA_ENTRY(prev, prev->last - 1);
+ int pg = 0, idx = 0, ntopa = 0;
+
+ while (pg < buf->nr_pages) {
+ int tidx;
+
+ /* pages within one topa entry */
+ for (tidx = 0; tidx < 1 << te_cur->size; tidx++, pg++)
+ buf->topa_index[pg] = te_prev;
+
+ te_prev = te_cur;
+
+ if (idx == cur->last - 1) {
+ /* advance to next topa table */
+ idx = 0;
+ cur = list_entry(cur->list.next, struct topa, list);
+ ntopa++;
+ } else
+ idx++;
+ te_cur = TOPA_ENTRY(cur, idx);
+ }
+
+}
+
+/**
+ * pt_buffer_reset_offsets() - adjust buffer's write pointers from aux_head
+ * @buf: PT buffer.
+ * @head: Write pointer (aux_head) from AUX buffer.
+ *
+ * Find the ToPA table and entry corresponding to given @head and set buffer's
+ * "current" pointers accordingly.
+ */
+static void pt_buffer_reset_offsets(struct pt_buffer *buf, unsigned long head)
+{
+ int pg;
+
+ if (buf->snapshot)
+ head &= (buf->nr_pages << PAGE_SHIFT) - 1;
+
+ pg = (head >> PAGE_SHIFT) & (buf->nr_pages - 1);
+ pg = pt_topa_next_entry(buf, pg);
+
+ buf->cur = (struct topa *)((unsigned long)buf->topa_index[pg] & PAGE_MASK);
+ buf->cur_idx = ((unsigned long)buf->topa_index[pg] -
+ (unsigned long)buf->cur) / sizeof(struct topa_entry);
+ buf->output_off = head & (sizes(buf->cur->table[buf->cur_idx].size) - 1);
+
+ local64_set(&buf->head, head);
+ local_set(&buf->data_size, 0);
+}
+
+/**
+ * pt_buffer_fini_topa() - deallocate ToPA structure of a buffer
+ * @buf: PT buffer.
+ */
+static void pt_buffer_fini_topa(struct pt_buffer *buf)
+{
+ struct topa *topa, *iter;
+
+ list_for_each_entry_safe(topa, iter, &buf->tables, list) {
+ /*
+ * right now, this is in free_aux() path only, so
+ * no need to unlink this table from the list
+ */
+ topa_free(topa);
+ }
+}
+
+/**
+ * pt_buffer_init_topa() - initialize ToPA table for pt buffer
+ * @buf: PT buffer.
+ * @size: Total size of all regions within this ToPA.
+ * @gfp: Allocation flags.
+ */
+static int pt_buffer_init_topa(struct pt_buffer *buf, unsigned long nr_pages,
+ gfp_t gfp)
+{
+ struct topa *topa;
+ int err;
+
+ topa = topa_alloc(buf->cpu, gfp);
+ if (!topa)
+ return -ENOMEM;
+
+ topa_insert_table(buf, topa);
+
+ while (buf->nr_pages < nr_pages) {
+ err = topa_insert_pages(buf, gfp);
+ if (err) {
+ pt_buffer_fini_topa(buf);
+ return -ENOMEM;
+ }
+ }
+
+ pt_buffer_setup_topa_index(buf);
+
+ /* link last table to the first one, unless we're double buffering */
+ if (pt_cap_get(PT_CAP_topa_multiple_entries)) {
+ TOPA_ENTRY(buf->last, -1)->base = buf->first->phys >> TOPA_SHIFT;
+ TOPA_ENTRY(buf->last, -1)->end = 1;
+ }
+
+ pt_topa_dump(buf);
+ return 0;
+}
+
+/**
+ * pt_buffer_setup_aux() - set up topa tables for a PT buffer
+ * @cpu: Cpu on which to allocate, -1 means current.
+ * @pages: Array of pointers to buffer pages passed from perf core.
+ * @nr_pages: Number of pages in the buffer.
+ * @snapshot: If this is a snapshot/overwrite counter.
+ *
+ * This is a pmu::setup_aux callback that sets up ToPA tables and all the
+ * bookkeeping for an AUX buffer.
+ *
+ * Return: Our private PT buffer structure.
+ */
+static void *
+pt_buffer_setup_aux(int cpu, void **pages, int nr_pages, bool snapshot)
+{
+ struct pt_buffer *buf;
+ int node, ret;
+
+ if (!nr_pages)
+ return NULL;
+
+ if (cpu == -1)
+ cpu = raw_smp_processor_id();
+ node = cpu_to_node(cpu);
+
+ buf = kzalloc_node(offsetof(struct pt_buffer, topa_index[nr_pages]),
+ GFP_KERNEL, node);
+ if (!buf)
+ return NULL;
+
+ buf->cpu = cpu;
+ buf->snapshot = snapshot;
+ buf->data_pages = pages;
+
+ INIT_LIST_HEAD(&buf->tables);
+
+ ret = pt_buffer_init_topa(buf, nr_pages, GFP_KERNEL);
+ if (ret) {
+ kfree(buf);
+ return NULL;
+ }
+
+ return buf;
+}
+
+/**
+ * pt_buffer_free_aux() - perf AUX deallocation path callback
+ * @data: PT buffer.
+ */
+static void pt_buffer_free_aux(void *data)
+{
+ struct pt_buffer *buf = data;
+
+ pt_buffer_fini_topa(buf);
+ kfree(buf);
+}
+
+/**
+ * pt_buffer_is_full() - check if the buffer is full
+ * @buf: PT buffer.
+ * @pt: Per-cpu pt handle.
+ *
+ * If the user hasn't read data from the output region that aux_head
+ * points to, the buffer is considered full: the user needs to read at
+ * least this region and update aux_tail to point past it.
+ */
+static bool pt_buffer_is_full(struct pt_buffer *buf, struct pt *pt)
+{
+ if (buf->snapshot)
+ return false;
+
+ if (local_read(&buf->data_size) >= pt->handle.size)
+ return true;
+
+ return false;
+}
+
+/**
+ * intel_pt_interrupt() - PT PMI handler
+ */
+void intel_pt_interrupt(void)
+{
+ struct pt *pt = this_cpu_ptr(&pt_ctx);
+ struct pt_buffer *buf;
+ struct perf_event *event = pt->handle.event;
+
+ /*
+ * There may be a dangling PT bit in the interrupt status register
+ * after PT has been disabled by pt_event_stop(). Make sure we don't
+ * do anything (particularly, re-enable) for this event here.
+ */
+ if (!ACCESS_ONCE(pt->handle_nmi))
+ return;
+
+ pt_config_start(false);
+
+ if (!event)
+ return;
+
+ buf = perf_get_aux(&pt->handle);
+ if (!buf)
+ return;
+
+ pt_read_offset(buf);
+
+ pt_handle_status(pt);
+
+ pt_update_head(pt);
+
+ perf_aux_output_end(&pt->handle, local_xchg(&buf->data_size, 0),
+ local_xchg(&buf->lost, 0));
+
+ if (!event->hw.state) {
+ int ret;
+
+ buf = perf_aux_output_begin(&pt->handle, event);
+ if (!buf) {
+ event->hw.state = PERF_HES_STOPPED;
+ return;
+ }
+
+ pt_buffer_reset_offsets(buf, pt->handle.head);
+ ret = pt_buffer_reset_markers(buf, &pt->handle);
+ if (ret) {
+ perf_aux_output_end(&pt->handle, 0, true);
+ return;
+ }
+
+ pt_config_buffer(buf->cur->table, buf->cur_idx,
+ buf->output_off);
+ wrmsrl(MSR_IA32_RTIT_STATUS, 0);
+ pt_config(event);
+ }
+}
+
+/*
+ * PMU callbacks
+ */
+
+static void pt_event_start(struct perf_event *event, int mode)
+{
+ struct pt *pt = this_cpu_ptr(&pt_ctx);
+ struct pt_buffer *buf = perf_get_aux(&pt->handle);
+
+ if (pt_is_running() || !buf || pt_buffer_is_full(buf, pt)) {
+ event->hw.state = PERF_HES_STOPPED;
+ return;
+ }
+
+ ACCESS_ONCE(pt->handle_nmi) = 1;
+ event->hw.state = 0;
+
+ pt_config_buffer(buf->cur->table, buf->cur_idx,
+ buf->output_off);
+ wrmsrl(MSR_IA32_RTIT_STATUS, 0);
+ pt_config(event);
+}
+
+static void pt_event_stop(struct perf_event *event, int mode)
+{
+ struct pt *pt = this_cpu_ptr(&pt_ctx);
+
+ /*
+ * Protect against the PMI racing with disabling wrmsr,
+ * see comment in intel_pt_interrupt().
+ */
+ ACCESS_ONCE(pt->handle_nmi) = 0;
+ pt_config_start(false);
+
+ if (event->hw.state == PERF_HES_STOPPED)
+ return;
+
+ event->hw.state = PERF_HES_STOPPED;
+
+ if (mode & PERF_EF_UPDATE) {
+ struct pt *pt = this_cpu_ptr(&pt_ctx);
+ struct pt_buffer *buf = perf_get_aux(&pt->handle);
+
+ if (!buf)
+ return;
+
+ if (WARN_ON_ONCE(pt->handle.event != event))
+ return;
+
+ pt_read_offset(buf);
+
+ pt_handle_status(pt);
+
+ pt_update_head(pt);
+ }
+}
+
+static void pt_event_del(struct perf_event *event, int mode)
+{
+ struct pt *pt = this_cpu_ptr(&pt_ctx);
+ struct pt_buffer *buf;
+
+ pt_event_stop(event, PERF_EF_UPDATE);
+
+ buf = perf_get_aux(&pt->handle);
+
+ if (buf) {
+ if (buf->snapshot)
+ pt->handle.head =
+ local_xchg(&buf->data_size,
+ buf->nr_pages << PAGE_SHIFT);
+ perf_aux_output_end(&pt->handle, local_xchg(&buf->data_size, 0),
+ local_xchg(&buf->lost, 0));
+ }
+}
+
+static int pt_event_add(struct perf_event *event, int mode)
+{
+ struct pt_buffer *buf;
+ struct pt *pt = this_cpu_ptr(&pt_ctx);
+ struct hw_perf_event *hwc = &event->hw;
+ int ret = -EBUSY;
+
+ if (pt->handle.event)
+ goto out;
+
+ buf = perf_aux_output_begin(&pt->handle, event);
+ if (!buf) {
+ ret = -EINVAL;
+ goto out;
+ }
+
+ pt_buffer_reset_offsets(buf, pt->handle.head);
+ if (!buf->snapshot) {
+ ret = pt_buffer_reset_markers(buf, &pt->handle);
+ if (ret) {
+ perf_aux_output_end(&pt->handle, 0, true);
+ goto out;
+ }
+ }
+
+ if (mode & PERF_EF_START) {
+ pt_event_start(event, 0);
+ if (hwc->state == PERF_HES_STOPPED) {
+ pt_event_del(event, 0);
+ ret = -EBUSY;
+ }
+ } else {
+ hwc->state = PERF_HES_STOPPED;
+ }
+
+ ret = 0;
+out:
+
+ if (ret)
+ hwc->state = PERF_HES_STOPPED;
+
+ return ret;
+}
+
+static void pt_event_read(struct perf_event *event)
+{
+}
+
+static void pt_event_destroy(struct perf_event *event)
+{
+ x86_del_exclusive(x86_lbr_exclusive_pt);
+}
+
+static int pt_event_init(struct perf_event *event)
+{
+ if (event->attr.type != pt_pmu.pmu.type)
+ return -ENOENT;
+
+ if (!pt_event_valid(event))
+ return -EINVAL;
+
+ if (x86_add_exclusive(x86_lbr_exclusive_pt))
+ return -EBUSY;
+
+ event->destroy = pt_event_destroy;
+
+ return 0;
+}
+
+static __init int pt_init(void)
+{
+ int ret, cpu, prior_warn = 0;
+
+ BUILD_BUG_ON(sizeof(struct topa) > PAGE_SIZE);
+ get_online_cpus();
+ for_each_online_cpu(cpu) {
+ u64 ctl;
+
+ ret = rdmsrl_safe_on_cpu(cpu, MSR_IA32_RTIT_CTL, &ctl);
+ if (!ret && (ctl & RTIT_CTL_TRACEEN))
+ prior_warn++;
+ }
+ put_online_cpus();
+
+ if (prior_warn) {
+ x86_add_exclusive(x86_lbr_exclusive_pt);
+ pr_warn("PT is enabled at boot time, doing nothing\n");
+
+ return -EBUSY;
+ }
+
+ ret = pt_pmu_hw_init();
+ if (ret)
+ return ret;
+
+ if (!pt_cap_get(PT_CAP_topa_output)) {
+ pr_warn("ToPA output is not supported on this CPU\n");
+ return -ENODEV;
+ }
+
+ if (!pt_cap_get(PT_CAP_topa_multiple_entries))
+ pt_pmu.pmu.capabilities =
+ PERF_PMU_CAP_AUX_NO_SG | PERF_PMU_CAP_AUX_SW_DOUBLEBUF;
+
+ pt_pmu.pmu.capabilities |= PERF_PMU_CAP_EXCLUSIVE | PERF_PMU_CAP_ITRACE;
+ pt_pmu.pmu.attr_groups = pt_attr_groups;
+ pt_pmu.pmu.task_ctx_nr = perf_sw_context;
+ pt_pmu.pmu.event_init = pt_event_init;
+ pt_pmu.pmu.add = pt_event_add;
+ pt_pmu.pmu.del = pt_event_del;
+ pt_pmu.pmu.start = pt_event_start;
+ pt_pmu.pmu.stop = pt_event_stop;
+ pt_pmu.pmu.read = pt_event_read;
+ pt_pmu.pmu.setup_aux = pt_buffer_setup_aux;
+ pt_pmu.pmu.free_aux = pt_buffer_free_aux;
+ ret = perf_pmu_register(&pt_pmu.pmu, "intel_pt", -1);
+
+ return ret;
+}
+
+module_init(pt_init);
}
}
- if (ubox_dev)
- pci_dev_put(ubox_dev);
+ pci_dev_put(ubox_dev);
return err ? pcibios_err_to_errno(err) : 0;
}
{ X86_FEATURE_HWP_ACT_WINDOW, CR_EAX, 9, 0x00000006, 0 },
{ X86_FEATURE_HWP_EPP, CR_EAX,10, 0x00000006, 0 },
{ X86_FEATURE_HWP_PKG_REQ, CR_EAX,11, 0x00000006, 0 },
+ { X86_FEATURE_INTEL_PT, CR_EBX,25, 0x00000007, 0 },
{ X86_FEATURE_APERFMPERF, CR_ECX, 0, 0x00000006, 0 },
{ X86_FEATURE_EPB, CR_ECX, 3, 0x00000006, 0 },
{ X86_FEATURE_HW_PSTATE, CR_EDX, 7, 0x80000007, 0 },
#ifdef CONFIG_X86_32
struct pt_regs fixed_regs;
- if (!user_mode_vm(regs)) {
+ if (!user_mode(regs)) {
crash_fixup_ss_esp(&fixed_regs, regs);
regs = &fixed_regs;
}
initial_boot_params = dt = early_memremap(initial_dtb, map_len);
size = of_get_flat_dt_size();
if (map_len < size) {
- early_iounmap(dt, map_len);
+ early_memunmap(dt, map_len);
initial_boot_params = dt = early_memremap(initial_dtb, size);
map_len = size;
}
unflatten_and_copy_device_tree();
- early_iounmap(dt, map_len);
+ early_memunmap(dt, map_len);
}
#else
static inline void x86_flattree_get_config(void) { }
int kstack_depth_to_print = 3 * STACKSLOTS_PER_LINE;
static int die_counter;
-static void printk_stack_address(unsigned long address, int reliable)
+static void printk_stack_address(unsigned long address, int reliable,
+ void *data)
{
- pr_cont(" [<%p>] %s%pB\n",
- (void *)address, reliable ? "" : "? ", (void *)address);
+ printk("%s [<%p>] %s%pB\n",
+ (char *)data, (void *)address, reliable ? "" : "? ",
+ (void *)address);
}
void printk_address(unsigned long address)
static void print_trace_address(void *data, unsigned long addr, int reliable)
{
touch_nmi_watchdog();
- printk(data);
- printk_stack_address(addr, reliable);
+ printk_stack_address(addr, reliable, data);
}
static const struct stacktrace_ops print_trace_ops = {
print_modules();
show_regs(regs);
#ifdef CONFIG_X86_32
- if (user_mode_vm(regs)) {
+ if (user_mode(regs)) {
sp = regs->sp;
ss = regs->ss & 0xffff;
} else {
unsigned long flags = oops_begin();
int sig = SIGSEGV;
- if (!user_mode_vm(regs))
+ if (!user_mode(regs))
report_bug(regs->ip, regs);
if (__die(str, regs, err))
for (i = 0; i < kstack_depth_to_print; i++) {
if (kstack_end(stack))
break;
- if (i && ((i % STACKSLOTS_PER_LINE) == 0))
- pr_cont("\n");
- pr_cont(" %08lx", *stack++);
+ if ((i % STACKSLOTS_PER_LINE) == 0) {
+ if (i != 0)
+ pr_cont("\n");
+ printk("%s %08lx", log_lvl, *stack++);
+ } else
+ pr_cont(" %08lx", *stack++);
touch_nmi_watchdog();
}
pr_cont("\n");
int i;
show_regs_print_info(KERN_EMERG);
- __show_regs(regs, !user_mode_vm(regs));
+ __show_regs(regs, !user_mode(regs));
/*
* When in-kernel, we also print out the stack and code at the
* time of the fault..
*/
- if (!user_mode_vm(regs)) {
+ if (!user_mode(regs)) {
unsigned int code_prologue = code_bytes * 43 / 64;
unsigned int code_len = code_bytes;
unsigned char c;
pr_cont(" <EOI> ");
}
} else {
- if (((long) stack & (THREAD_SIZE-1)) == 0)
+ if (kstack_end(stack))
break;
}
- if (i && ((i % STACKSLOTS_PER_LINE) == 0))
- pr_cont("\n");
- pr_cont(" %016lx", *stack++);
+ if ((i % STACKSLOTS_PER_LINE) == 0) {
+ if (i != 0)
+ pr_cont("\n");
+ printk("%s %016lx", log_lvl, *stack++);
+ } else
+ pr_cont(" %016lx", *stack++);
touch_nmi_watchdog();
}
preempt_enable();
extmap = (struct e820entry *)(sdata->data);
__append_e820_map(extmap, entries);
sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map);
- early_iounmap(sdata, data_len);
+ early_memunmap(sdata, data_len);
printk(KERN_INFO "e820: extended physical RAM map:\n");
e820_print_map("extended");
}
#define DLL 0 /* Divisor Latch Low */
#define DLH 1 /* Divisor latch High */
-static void mem32_serial_out(unsigned long addr, int offset, int value)
-{
- uint32_t *vaddr = (uint32_t *)addr;
- /* shift implied by pointer type */
- writel(value, vaddr + offset);
-}
-
-static unsigned int mem32_serial_in(unsigned long addr, int offset)
-{
- uint32_t *vaddr = (uint32_t *)addr;
- /* shift implied by pointer type */
- return readl(vaddr + offset);
-}
-
static unsigned int io_serial_in(unsigned long addr, int offset)
{
return inb(addr + offset);
}
#ifdef CONFIG_PCI
+static void mem32_serial_out(unsigned long addr, int offset, int value)
+{
+ u32 *vaddr = (u32 *)addr;
+ /* shift implied by pointer type */
+ writel(value, vaddr + offset);
+}
+
+static unsigned int mem32_serial_in(unsigned long addr, int offset)
+{
+ u32 *vaddr = (u32 *)addr;
+ /* shift implied by pointer type */
+ return readl(vaddr + offset);
+}
+
/*
* early_pci_serial_init()
*
unsigned divisor;
unsigned long baud = DEFAULT_BAUD;
u8 bus, slot, func;
- uint32_t classcode, bar0;
- uint16_t cmdreg;
+ u32 classcode, bar0;
+ u16 cmdreg;
char *e;
/*CFI_REL_OFFSET cs, 0*/
/*
* Push current_thread_info()->sysenter_return to the stack.
- * A tiny bit of offset fixup is necessary - 4*4 means the 4 words
- * pushed above; +8 corresponds to copy_thread's esp0 setting.
+ * A tiny bit of offset fixup is necessary: TI_sysenter_return
+ * is relative to thread_info, which is at the bottom of the
+ * kernel stack page. 4*4 means the 4 words pushed above;
+ * TOP_OF_KERNEL_STACK_PADDING takes us to the top of the stack;
+ * and THREAD_SIZE takes us to the bottom.
*/
- pushl_cfi ((TI_sysenter_return)-THREAD_SIZE+8+4*4)(%esp)
+ pushl_cfi ((TI_sysenter_return) - THREAD_SIZE + TOP_OF_KERNEL_STACK_PADDING + 4*4)(%esp)
CFI_REL_OFFSET eip, 0
pushl_cfi %eax
TRACE_IRQS_OFF
movl TI_flags(%ebp), %ecx
testl $_TIF_ALLWORK_MASK, %ecx
- jne sysexit_audit
+ jnz sysexit_audit
sysenter_exit:
/* if something modifies registers it must also disable sysexit */
movl PT_EIP(%esp), %edx
sysexit_audit:
testl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT), %ecx
- jne syscall_exit_work
+ jnz syscall_exit_work
TRACE_IRQS_ON
ENABLE_INTERRUPTS(CLBR_ANY)
movl %eax,%edx /* second arg, syscall return value */
TRACE_IRQS_OFF
movl TI_flags(%ebp), %ecx
testl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT), %ecx
- jne syscall_exit_work
+ jnz syscall_exit_work
movl PT_EAX(%esp),%eax /* reload syscall return value */
jmp sysenter_exit
#endif
TRACE_IRQS_OFF
movl TI_flags(%ebp), %ecx
testl $_TIF_ALLWORK_MASK, %ecx # current->work
- jne syscall_exit_work
+ jnz syscall_exit_work
restore_all:
TRACE_IRQS_IRET
#ifdef CONFIG_VM86
testl $X86_EFLAGS_VM, PT_EFLAGS(%esp)
movl %esp, %eax
- jne work_notifysig_v86 # returning to kernel-space or
+ jnz work_notifysig_v86 # returning to kernel-space or
# vm86-space
1:
#else
.endm
/*
- * Build the entry stubs and pointer table with some assembler magic.
- * We pack 7 stubs into a single 32-byte chunk, which will fit in a
- * single cache line on all modern x86 implementations.
+ * Build the entry stubs with some assembler magic.
+ * We pack 1 stub into every 8-byte block.
*/
-.section .init.rodata,"a"
-ENTRY(interrupt)
-.section .entry.text, "ax"
- .p2align 5
- .p2align CONFIG_X86_L1_CACHE_SHIFT
+ .align 8
ENTRY(irq_entries_start)
RING0_INT_FRAME
-vector=FIRST_EXTERNAL_VECTOR
-.rept (FIRST_SYSTEM_VECTOR-FIRST_EXTERNAL_VECTOR+6)/7
- .balign 32
- .rept 7
- .if vector < FIRST_SYSTEM_VECTOR
- .if vector <> FIRST_EXTERNAL_VECTOR
+ vector=FIRST_EXTERNAL_VECTOR
+ .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
+ pushl_cfi $(~vector+0x80) /* Note: always in signed byte range */
+ vector=vector+1
+ jmp common_interrupt
CFI_ADJUST_CFA_OFFSET -4
- .endif
-1: pushl_cfi $(~vector+0x80) /* Note: always in signed byte range */
- .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6
- jmp 2f
- .endif
- .previous
- .long 1b
- .section .entry.text, "ax"
-vector=vector+1
- .endif
- .endr
-2: jmp common_interrupt
-.endr
+ .align 8
+ .endr
END(irq_entries_start)
-.previous
-END(interrupt)
-.previous
-
/*
* the CPU automatically disables interrupts when executing an IRQ vector,
* so IRQ-flags tracing has to follow that:
pushl_cfi $0
#ifdef CONFIG_X86_INVD_BUG
/* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */
-661: pushl_cfi $do_general_protection
-662:
-.section .altinstructions,"a"
- altinstruction_entry 661b, 663f, X86_FEATURE_XMM, 662b-661b, 664f-663f
-.previous
-.section .altinstr_replacement,"ax"
-663: pushl $do_simd_coprocessor_error
-664:
-.previous
+ ALTERNATIVE "pushl_cfi $do_general_protection", \
+ "pushl $do_simd_coprocessor_error", \
+ X86_FEATURE_XMM
#else
pushl_cfi $do_simd_coprocessor_error
#endif
/*CFI_REL_OFFSET es, 0*/
pushl_cfi %ds
/*CFI_REL_OFFSET ds, 0*/
- pushl_cfi %eax
- CFI_REL_OFFSET eax, 0
- pushl_cfi %ebp
- CFI_REL_OFFSET ebp, 0
- pushl_cfi %edi
- CFI_REL_OFFSET edi, 0
- pushl_cfi %esi
- CFI_REL_OFFSET esi, 0
- pushl_cfi %edx
- CFI_REL_OFFSET edx, 0
- pushl_cfi %ecx
- CFI_REL_OFFSET ecx, 0
- pushl_cfi %ebx
- CFI_REL_OFFSET ebx, 0
+ pushl_cfi_reg eax
+ pushl_cfi_reg ebp
+ pushl_cfi_reg edi
+ pushl_cfi_reg esi
+ pushl_cfi_reg edx
+ pushl_cfi_reg ecx
+ pushl_cfi_reg ebx
cld
movl $(__KERNEL_PERCPU), %ecx
movl %ecx, %fs
* NOTE: This code handles signal-recognition, which happens every time
* after an interrupt and after each system call.
*
- * Normal syscalls and interrupts don't save a full stack frame, this is
- * only done for syscall tracing, signals or fork/exec et.al.
- *
* A note on terminology:
- * - top of stack: Architecture defined interrupt frame from SS to RIP
+ * - iret frame: Architecture defined interrupt frame from SS to RIP
* at the top of the kernel process stack.
- * - partial stack frame: partially saved registers up to R11.
- * - full stack frame: Like partial stack frame, but all register saved.
*
* Some macro usage:
* - CFI macros are used to generate dwarf2 unwind information for better
* backtraces. They don't change any code.
- * - SAVE_ALL/RESTORE_ALL - Save/restore all registers
- * - SAVE_ARGS/RESTORE_ARGS - Save/restore registers that C functions modify.
- * There are unfortunately lots of special cases where some registers
- * not touched. The macro is a big mess that should be cleaned up.
- * - SAVE_REST/RESTORE_REST - Handle the registers not saved by SAVE_ARGS.
- * Gives a full stack frame.
* - ENTRY/END Define functions in the symbol table.
- * - FIXUP_TOP_OF_STACK/RESTORE_TOP_OF_STACK - Fix up the hardware stack
- * frame that is otherwise undefined after a SYSCALL
* - TRACE_IRQ_* - Trace hard interrupt state for lock debugging.
* - idtentry - Define exception entry points.
*/
.section .entry.text, "ax"
-#ifndef CONFIG_PREEMPT
-#define retint_kernel retint_restore_args
-#endif
-
#ifdef CONFIG_PARAVIRT
ENTRY(native_usergs_sysret64)
swapgs
#endif /* CONFIG_PARAVIRT */
-.macro TRACE_IRQS_IRETQ offset=ARGOFFSET
+.macro TRACE_IRQS_IRETQ
#ifdef CONFIG_TRACE_IRQFLAGS
- bt $9,EFLAGS-\offset(%rsp) /* interrupts off? */
+ bt $9,EFLAGS(%rsp) /* interrupts off? */
jnc 1f
TRACE_IRQS_ON
1:
call debug_stack_reset
.endm
-.macro TRACE_IRQS_IRETQ_DEBUG offset=ARGOFFSET
- bt $9,EFLAGS-\offset(%rsp) /* interrupts off? */
+.macro TRACE_IRQS_IRETQ_DEBUG
+ bt $9,EFLAGS(%rsp) /* interrupts off? */
jnc 1f
TRACE_IRQS_ON_DEBUG
1:
#endif
/*
- * C code is not supposed to know about undefined top of stack. Every time
- * a C function with an pt_regs argument is called from the SYSCALL based
- * fast path FIXUP_TOP_OF_STACK is needed.
- * RESTORE_TOP_OF_STACK syncs the syscall state after any possible ptregs
- * manipulation.
- */
-
- /* %rsp:at FRAMEEND */
- .macro FIXUP_TOP_OF_STACK tmp offset=0
- movq PER_CPU_VAR(old_rsp),\tmp
- movq \tmp,RSP+\offset(%rsp)
- movq $__USER_DS,SS+\offset(%rsp)
- movq $__USER_CS,CS+\offset(%rsp)
- movq RIP+\offset(%rsp),\tmp /* get rip */
- movq \tmp,RCX+\offset(%rsp) /* copy it to rcx as sysret would do */
- movq R11+\offset(%rsp),\tmp /* get eflags */
- movq \tmp,EFLAGS+\offset(%rsp)
- .endm
-
- .macro RESTORE_TOP_OF_STACK tmp offset=0
- movq RSP+\offset(%rsp),\tmp
- movq \tmp,PER_CPU_VAR(old_rsp)
- movq EFLAGS+\offset(%rsp),\tmp
- movq \tmp,R11+\offset(%rsp)
- .endm
-
-/*
- * initial frame state for interrupts (and exceptions without error code)
+ * empty frame
*/
.macro EMPTY_FRAME start=1 offset=0
.if \start
* initial frame state for interrupts (and exceptions without error code)
*/
.macro INTR_FRAME start=1 offset=0
- EMPTY_FRAME \start, SS+8+\offset-RIP
- /*CFI_REL_OFFSET ss, SS+\offset-RIP*/
- CFI_REL_OFFSET rsp, RSP+\offset-RIP
- /*CFI_REL_OFFSET rflags, EFLAGS+\offset-RIP*/
- /*CFI_REL_OFFSET cs, CS+\offset-RIP*/
- CFI_REL_OFFSET rip, RIP+\offset-RIP
+ EMPTY_FRAME \start, 5*8+\offset
+ /*CFI_REL_OFFSET ss, 4*8+\offset*/
+ CFI_REL_OFFSET rsp, 3*8+\offset
+ /*CFI_REL_OFFSET rflags, 2*8+\offset*/
+ /*CFI_REL_OFFSET cs, 1*8+\offset*/
+ CFI_REL_OFFSET rip, 0*8+\offset
.endm
/*
* with vector already pushed)
*/
.macro XCPT_FRAME start=1 offset=0
- INTR_FRAME \start, RIP+\offset-ORIG_RAX
- .endm
-
-/*
- * frame that enables calling into C.
- */
- .macro PARTIAL_FRAME start=1 offset=0
- XCPT_FRAME \start, ORIG_RAX+\offset-ARGOFFSET
- CFI_REL_OFFSET rdi, RDI+\offset-ARGOFFSET
- CFI_REL_OFFSET rsi, RSI+\offset-ARGOFFSET
- CFI_REL_OFFSET rdx, RDX+\offset-ARGOFFSET
- CFI_REL_OFFSET rcx, RCX+\offset-ARGOFFSET
- CFI_REL_OFFSET rax, RAX+\offset-ARGOFFSET
- CFI_REL_OFFSET r8, R8+\offset-ARGOFFSET
- CFI_REL_OFFSET r9, R9+\offset-ARGOFFSET
- CFI_REL_OFFSET r10, R10+\offset-ARGOFFSET
- CFI_REL_OFFSET r11, R11+\offset-ARGOFFSET
+ INTR_FRAME \start, 1*8+\offset
.endm
/*
* frame that enables passing a complete pt_regs to a C function.
*/
.macro DEFAULT_FRAME start=1 offset=0
- PARTIAL_FRAME \start, R11+\offset-R15
+ XCPT_FRAME \start, ORIG_RAX+\offset
+ CFI_REL_OFFSET rdi, RDI+\offset
+ CFI_REL_OFFSET rsi, RSI+\offset
+ CFI_REL_OFFSET rdx, RDX+\offset
+ CFI_REL_OFFSET rcx, RCX+\offset
+ CFI_REL_OFFSET rax, RAX+\offset
+ CFI_REL_OFFSET r8, R8+\offset
+ CFI_REL_OFFSET r9, R9+\offset
+ CFI_REL_OFFSET r10, R10+\offset
+ CFI_REL_OFFSET r11, R11+\offset
CFI_REL_OFFSET rbx, RBX+\offset
CFI_REL_OFFSET rbp, RBP+\offset
CFI_REL_OFFSET r12, R12+\offset
CFI_REL_OFFSET r15, R15+\offset
.endm
-ENTRY(save_paranoid)
- XCPT_FRAME 1 RDI+8
- cld
- movq %rdi, RDI+8(%rsp)
- movq %rsi, RSI+8(%rsp)
- movq_cfi rdx, RDX+8
- movq_cfi rcx, RCX+8
- movq_cfi rax, RAX+8
- movq %r8, R8+8(%rsp)
- movq %r9, R9+8(%rsp)
- movq %r10, R10+8(%rsp)
- movq %r11, R11+8(%rsp)
- movq_cfi rbx, RBX+8
- movq %rbp, RBP+8(%rsp)
- movq %r12, R12+8(%rsp)
- movq %r13, R13+8(%rsp)
- movq %r14, R14+8(%rsp)
- movq %r15, R15+8(%rsp)
- movl $1,%ebx
- movl $MSR_GS_BASE,%ecx
- rdmsr
- testl %edx,%edx
- js 1f /* negative -> in kernel */
- SWAPGS
- xorl %ebx,%ebx
-1: ret
- CFI_ENDPROC
-END(save_paranoid)
-
/*
- * A newly forked process directly context switches into this address.
+ * 64bit SYSCALL instruction entry. Up to 6 arguments in registers.
*
- * rdi: prev task we switched from
- */
-ENTRY(ret_from_fork)
- DEFAULT_FRAME
-
- LOCK ; btr $TIF_FORK,TI_flags(%r8)
-
- pushq_cfi $0x0002
- popfq_cfi # reset kernel eflags
-
- call schedule_tail # rdi: 'prev' task parameter
-
- GET_THREAD_INFO(%rcx)
-
- RESTORE_REST
-
- testl $3, CS-ARGOFFSET(%rsp) # from kernel_thread?
- jz 1f
-
- /*
- * By the time we get here, we have no idea whether our pt_regs,
- * ti flags, and ti status came from the 64-bit SYSCALL fast path,
- * the slow path, or one of the ia32entry paths.
- * Use int_ret_from_sys_call to return, since it can safely handle
- * all of the above.
- */
- jmp int_ret_from_sys_call
-
-1:
- subq $REST_SKIP, %rsp # leave space for volatiles
- CFI_ADJUST_CFA_OFFSET REST_SKIP
- movq %rbp, %rdi
- call *%rbx
- movl $0, RAX(%rsp)
- RESTORE_REST
- jmp int_ret_from_sys_call
- CFI_ENDPROC
-END(ret_from_fork)
-
-/*
- * System call entry. Up to 6 arguments in registers are supported.
+ * 64bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
+ * then loads new ss, cs, and rip from previously programmed MSRs.
+ * rflags gets masked by a value from another MSR (so CLD and CLAC
+ * are not needed). SYSCALL does not save anything on the stack
+ * and does not change rsp.
*
- * SYSCALL does not save anything on the stack and does not change the
- * stack pointer. However, it does mask the flags register for us, so
- * CLD and CLAC are not needed.
- */
-
-/*
- * Register setup:
+ * Registers on entry:
* rax system call number
+ * rcx return address
+ * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
* rdi arg0
- * rcx return address for syscall/sysret, C arg3
* rsi arg1
* rdx arg2
- * r10 arg3 (--> moved to rcx for C)
+ * r10 arg3 (needs to be moved to rcx to conform to C ABI)
* r8 arg4
* r9 arg5
- * r11 eflags for syscall/sysret, temporary for C
- * r12-r15,rbp,rbx saved by C code, not touched.
+ * (note: r12-r15,rbp,rbx are callee-preserved in C ABI)
*
- * Interrupts are off on entry.
* Only called from user space.
*
- * XXX if we had a free scratch register we could save the RSP into the stack frame
- * and report it properly in ps. Unfortunately we haven't.
- *
- * When user can change the frames always force IRET. That is because
+ * When user can change pt_regs->foo always force IRET. That is because
* it deals with uncanonical addresses better. SYSRET has trouble
* with them due to bugs in both AMD and Intel CPUs.
*/
ENTRY(system_call)
CFI_STARTPROC simple
CFI_SIGNAL_FRAME
- CFI_DEF_CFA rsp,KERNEL_STACK_OFFSET
+ CFI_DEF_CFA rsp,0
CFI_REGISTER rip,rcx
/*CFI_REGISTER rflags,r11*/
+
+ /*
+ * Interrupts are off on entry.
+ * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
+ * it is too small to ever cause noticeable irq latency.
+ */
SWAPGS_UNSAFE_STACK
/*
* A hypervisor implementation might want to use a label
*/
GLOBAL(system_call_after_swapgs)
- movq %rsp,PER_CPU_VAR(old_rsp)
+ movq %rsp,PER_CPU_VAR(rsp_scratch)
movq PER_CPU_VAR(kernel_stack),%rsp
+
+ /* Construct struct pt_regs on stack */
+ pushq_cfi $__USER_DS /* pt_regs->ss */
+ pushq_cfi PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
/*
- * No need to follow this irqs off/on section - it's straight
- * and short:
+ * Re-enable interrupts.
+ * We use 'rsp_scratch' as a scratch space, hence irq-off block above
+ * must execute atomically in the face of possible interrupt-driven
+ * task preemption. We must enable interrupts only after we're done
+ * with using rsp_scratch:
*/
ENABLE_INTERRUPTS(CLBR_NONE)
- SAVE_ARGS 8, 0, rax_enosys=1
- movq_cfi rax,(ORIG_RAX-ARGOFFSET)
- movq %rcx,RIP-ARGOFFSET(%rsp)
- CFI_REL_OFFSET rip,RIP-ARGOFFSET
- testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
+ pushq_cfi %r11 /* pt_regs->flags */
+ pushq_cfi $__USER_CS /* pt_regs->cs */
+ pushq_cfi %rcx /* pt_regs->ip */
+ CFI_REL_OFFSET rip,0
+ pushq_cfi_reg rax /* pt_regs->orig_ax */
+ pushq_cfi_reg rdi /* pt_regs->di */
+ pushq_cfi_reg rsi /* pt_regs->si */
+ pushq_cfi_reg rdx /* pt_regs->dx */
+ pushq_cfi_reg rcx /* pt_regs->cx */
+ pushq_cfi $-ENOSYS /* pt_regs->ax */
+ pushq_cfi_reg r8 /* pt_regs->r8 */
+ pushq_cfi_reg r9 /* pt_regs->r9 */
+ pushq_cfi_reg r10 /* pt_regs->r10 */
+ pushq_cfi_reg r11 /* pt_regs->r11 */
+ sub $(6*8),%rsp /* pt_regs->bp,bx,r12-15 not saved */
+ CFI_ADJUST_CFA_OFFSET 6*8
+
+ testl $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
jnz tracesys
system_call_fastpath:
#if __SYSCALL_MASK == ~0
andl $__SYSCALL_MASK,%eax
cmpl $__NR_syscall_max,%eax
#endif
- ja ret_from_sys_call /* and return regs->ax */
+ ja 1f /* return -ENOSYS (already in pt_regs->ax) */
movq %r10,%rcx
- call *sys_call_table(,%rax,8) # XXX: rip relative
- movq %rax,RAX-ARGOFFSET(%rsp)
+ call *sys_call_table(,%rax,8)
+ movq %rax,RAX(%rsp)
+1:
/*
- * Syscall return path ending with SYSRET (fast path)
- * Has incomplete stack frame and undefined top of stack.
+ * Syscall return path ending with SYSRET (fast path).
+ * Has incompletely filled pt_regs.
*/
-ret_from_sys_call:
LOCKDEP_SYS_EXIT
+ /*
+ * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
+ * it is too small to ever cause noticeable irq latency.
+ */
DISABLE_INTERRUPTS(CLBR_NONE)
- TRACE_IRQS_OFF
/*
* We must check ti flags with interrupts (or at least preemption)
* flags (TIF_NOTIFY_RESUME, TIF_USER_RETURN_NOTIFY, etc) set is
* very bad.
*/
- testl $_TIF_ALLWORK_MASK,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
- jnz int_ret_from_sys_call_fixup /* Go the the slow path */
+ testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
+ jnz int_ret_from_sys_call_irqs_off /* Go to the slow path */
CFI_REMEMBER_STATE
- /*
- * sysretq will re-enable interrupts:
- */
- TRACE_IRQS_ON
- movq RIP-ARGOFFSET(%rsp),%rcx
+
+ RESTORE_C_REGS_EXCEPT_RCX_R11
+ movq RIP(%rsp),%rcx
CFI_REGISTER rip,rcx
- RESTORE_ARGS 1,-ARG_SKIP,0
+ movq EFLAGS(%rsp),%r11
/*CFI_REGISTER rflags,r11*/
- movq PER_CPU_VAR(old_rsp), %rsp
+ movq RSP(%rsp),%rsp
+ /*
+ * 64bit SYSRET restores rip from rcx,
+ * rflags from r11 (but RF and VM bits are forced to 0),
+ * cs and ss are loaded from MSRs.
+ * Restoration of rflags re-enables interrupts.
+ */
USERGS_SYSRET64
CFI_RESTORE_STATE
-int_ret_from_sys_call_fixup:
- FIXUP_TOP_OF_STACK %r11, -ARGOFFSET
- jmp int_ret_from_sys_call_irqs_off
-
- /* Do syscall tracing */
+ /* Do syscall entry tracing */
tracesys:
- leaq -REST_SKIP(%rsp), %rdi
- movq $AUDIT_ARCH_X86_64, %rsi
+ movq %rsp, %rdi
+ movl $AUDIT_ARCH_X86_64, %esi
call syscall_trace_enter_phase1
test %rax, %rax
jnz tracesys_phase2 /* if needed, run the slow path */
- LOAD_ARGS 0 /* else restore clobbered regs */
+ RESTORE_C_REGS_EXCEPT_RAX /* else restore clobbered regs */
+ movq ORIG_RAX(%rsp), %rax
jmp system_call_fastpath /* and return to the fast path */
tracesys_phase2:
- SAVE_REST
- FIXUP_TOP_OF_STACK %rdi
+ SAVE_EXTRA_REGS
movq %rsp, %rdi
- movq $AUDIT_ARCH_X86_64, %rsi
+ movl $AUDIT_ARCH_X86_64, %esi
movq %rax,%rdx
call syscall_trace_enter_phase2
/*
- * Reload arg registers from stack in case ptrace changed them.
+ * Reload registers from stack in case ptrace changed them.
* We don't reload %rax because syscall_trace_entry_phase2() returned
* the value it wants us to use in the table lookup.
*/
- LOAD_ARGS ARGOFFSET, 1
- RESTORE_REST
+ RESTORE_C_REGS_EXCEPT_RAX
+ RESTORE_EXTRA_REGS
#if __SYSCALL_MASK == ~0
cmpq $__NR_syscall_max,%rax
#else
andl $__SYSCALL_MASK,%eax
cmpl $__NR_syscall_max,%eax
#endif
- ja int_ret_from_sys_call /* RAX(%rsp) is already set */
+ ja 1f /* return -ENOSYS (already in pt_regs->ax) */
movq %r10,%rcx /* fixup for C */
call *sys_call_table(,%rax,8)
- movq %rax,RAX-ARGOFFSET(%rsp)
- /* Use IRET because user could have changed frame */
+ movq %rax,RAX(%rsp)
+1:
+ /* Use IRET because user could have changed pt_regs->foo */
/*
* Syscall return path ending with IRET.
- * Has correct top of stack, but partial stack frame.
+ * Has correct iret frame.
*/
GLOBAL(int_ret_from_sys_call)
DISABLE_INTERRUPTS(CLBR_NONE)
+int_ret_from_sys_call_irqs_off: /* jumps come here from the irqs-off SYSRET path */
TRACE_IRQS_OFF
-int_ret_from_sys_call_irqs_off:
movl $_TIF_ALLWORK_MASK,%edi
/* edi: mask to check */
GLOBAL(int_with_check)
movl TI_flags(%rcx),%edx
andl %edi,%edx
jnz int_careful
- andl $~TS_COMPAT,TI_status(%rcx)
- jmp retint_swapgs
+ andl $~TS_COMPAT,TI_status(%rcx)
+ jmp syscall_return
/* Either reschedule or signal or syscall exit tracking needed. */
/* First do a reschedule test. */
TRACE_IRQS_OFF
jmp int_with_check
- /* handle signals and tracing -- both require a full stack frame */
+ /* handle signals and tracing -- both require a full pt_regs */
int_very_careful:
TRACE_IRQS_ON
ENABLE_INTERRUPTS(CLBR_NONE)
-int_check_syscall_exit_work:
- SAVE_REST
+ SAVE_EXTRA_REGS
/* Check for syscall exit trace */
testl $_TIF_WORK_SYSCALL_EXIT,%edx
jz int_signal
call do_notify_resume
1: movl $_TIF_WORK_MASK,%edi
int_restore_rest:
- RESTORE_REST
+ RESTORE_EXTRA_REGS
DISABLE_INTERRUPTS(CLBR_NONE)
TRACE_IRQS_OFF
jmp int_with_check
+
+syscall_return:
+ /* The IRETQ could re-enable interrupts: */
+ DISABLE_INTERRUPTS(CLBR_ANY)
+ TRACE_IRQS_IRETQ
+
+ /*
+ * Try to use SYSRET instead of IRET if we're returning to
+ * a completely clean 64-bit userspace context.
+ */
+ movq RCX(%rsp),%rcx
+ cmpq %rcx,RIP(%rsp) /* RCX == RIP */
+ jne opportunistic_sysret_failed
+
+ /*
+ * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
+ * in kernel space. This essentially lets the user take over
+ * the kernel, since userspace controls RSP. It's not worth
+ * testing for canonicalness exactly -- this check detects any
+ * of the 17 high bits set, which is true for non-canonical
+ * or kernel addresses. (This will pessimize vsyscall=native.
+ * Big deal.)
+ *
+ * If virtual addresses ever become wider, this will need
+ * to be updated to remain correct on both old and new CPUs.
+ */
+ .ifne __VIRTUAL_MASK_SHIFT - 47
+ .error "virtual address width changed -- SYSRET checks need update"
+ .endif
+ shr $__VIRTUAL_MASK_SHIFT, %rcx
+ jnz opportunistic_sysret_failed
+
+ cmpq $__USER_CS,CS(%rsp) /* CS must match SYSRET */
+ jne opportunistic_sysret_failed
+
+ movq R11(%rsp),%r11
+ cmpq %r11,EFLAGS(%rsp) /* R11 == RFLAGS */
+ jne opportunistic_sysret_failed
+
+ /*
+ * SYSRET can't restore RF. SYSRET can restore TF, but unlike IRET,
+ * restoring TF results in a trap from userspace immediately after
+ * SYSRET. This would cause an infinite loop whenever #DB happens
+ * with register state that satisfies the opportunistic SYSRET
+ * conditions. For example, single-stepping this user code:
+ *
+ * movq $stuck_here,%rcx
+ * pushfq
+ * popq %r11
+ * stuck_here:
+ *
+ * would never get past 'stuck_here'.
+ */
+ testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
+ jnz opportunistic_sysret_failed
+
+ /* nothing to check for RSP */
+
+ cmpq $__USER_DS,SS(%rsp) /* SS must match SYSRET */
+ jne opportunistic_sysret_failed
+
+ /*
+ * We win! This label is here just for ease of understanding
+ * perf profiles. Nothing jumps here.
+ */
+syscall_return_via_sysret:
+ CFI_REMEMBER_STATE
+ /* r11 is already restored (see code above) */
+ RESTORE_C_REGS_EXCEPT_R11
+ movq RSP(%rsp),%rsp
+ USERGS_SYSRET64
+ CFI_RESTORE_STATE
+
+opportunistic_sysret_failed:
+ SWAPGS
+ jmp restore_c_regs_and_iret
CFI_ENDPROC
END(system_call)
+
.macro FORK_LIKE func
ENTRY(stub_\func)
CFI_STARTPROC
- popq %r11 /* save return address */
- PARTIAL_FRAME 0
- SAVE_REST
- pushq %r11 /* put it back on stack */
- FIXUP_TOP_OF_STACK %r11, 8
- DEFAULT_FRAME 0 8 /* offset 8: return address */
- call sys_\func
- RESTORE_TOP_OF_STACK %r11, 8
- ret $REST_SKIP /* pop extended registers */
+ DEFAULT_FRAME 0, 8 /* offset 8: return address */
+ SAVE_EXTRA_REGS 8
+ jmp sys_\func
CFI_ENDPROC
END(stub_\func)
.endm
- .macro FIXED_FRAME label,func
-ENTRY(\label)
- CFI_STARTPROC
- PARTIAL_FRAME 0 8 /* offset 8: return address */
- FIXUP_TOP_OF_STACK %r11, 8-ARGOFFSET
- call \func
- RESTORE_TOP_OF_STACK %r11, 8-ARGOFFSET
- ret
- CFI_ENDPROC
-END(\label)
- .endm
-
FORK_LIKE clone
FORK_LIKE fork
FORK_LIKE vfork
- FIXED_FRAME stub_iopl, sys_iopl
ENTRY(stub_execve)
CFI_STARTPROC
- addq $8, %rsp
- PARTIAL_FRAME 0
- SAVE_REST
- FIXUP_TOP_OF_STACK %r11
- call sys_execve
- movq %rax,RAX(%rsp)
- RESTORE_REST
- jmp int_ret_from_sys_call
+ DEFAULT_FRAME 0, 8
+ call sys_execve
+return_from_execve:
+ testl %eax, %eax
+ jz 1f
+ /* exec failed, can use fast SYSRET code path in this case */
+ ret
+1:
+ /* must use IRET code path (pt_regs->cs may have changed) */
+ addq $8, %rsp
+ CFI_ADJUST_CFA_OFFSET -8
+ ZERO_EXTRA_REGS
+ movq %rax,RAX(%rsp)
+ jmp int_ret_from_sys_call
CFI_ENDPROC
END(stub_execve)
-
-ENTRY(stub_execveat)
+/*
+ * Remaining execve stubs are only 7 bytes long.
+ * ENTRY() often aligns to 16 bytes, which in this case has no benefits.
+ */
+ .align 8
+GLOBAL(stub_execveat)
CFI_STARTPROC
- addq $8, %rsp
- PARTIAL_FRAME 0
- SAVE_REST
- FIXUP_TOP_OF_STACK %r11
- call sys_execveat
- RESTORE_TOP_OF_STACK %r11
- movq %rax,RAX(%rsp)
- RESTORE_REST
- jmp int_ret_from_sys_call
+ DEFAULT_FRAME 0, 8
+ call sys_execveat
+ jmp return_from_execve
CFI_ENDPROC
END(stub_execveat)
+#ifdef CONFIG_X86_X32_ABI
+ .align 8
+GLOBAL(stub_x32_execve)
+ CFI_STARTPROC
+ DEFAULT_FRAME 0, 8
+ call compat_sys_execve
+ jmp return_from_execve
+ CFI_ENDPROC
+END(stub_x32_execve)
+ .align 8
+GLOBAL(stub_x32_execveat)
+ CFI_STARTPROC
+ DEFAULT_FRAME 0, 8
+ call compat_sys_execveat
+ jmp return_from_execve
+ CFI_ENDPROC
+END(stub_x32_execveat)
+#endif
+
+#ifdef CONFIG_IA32_EMULATION
+ .align 8
+GLOBAL(stub32_execve)
+ CFI_STARTPROC
+ call compat_sys_execve
+ jmp return_from_execve
+ CFI_ENDPROC
+END(stub32_execve)
+ .align 8
+GLOBAL(stub32_execveat)
+ CFI_STARTPROC
+ call compat_sys_execveat
+ jmp return_from_execve
+ CFI_ENDPROC
+END(stub32_execveat)
+#endif
+
/*
* sigreturn is special because it needs to restore all registers on return.
* This cannot be done with SYSRET, so use the IRET return path instead.
*/
ENTRY(stub_rt_sigreturn)
CFI_STARTPROC
- addq $8, %rsp
- PARTIAL_FRAME 0
- SAVE_REST
- FIXUP_TOP_OF_STACK %r11
+ DEFAULT_FRAME 0, 8
+ /*
+ * SAVE_EXTRA_REGS result is not normally needed:
+ * sigreturn overwrites all pt_regs->GPREGS.
+ * But sigreturn can fail (!), and there is no easy way to detect that.
+ * To make sure RESTORE_EXTRA_REGS doesn't restore garbage on error,
+ * we SAVE_EXTRA_REGS here.
+ */
+ SAVE_EXTRA_REGS 8
call sys_rt_sigreturn
- movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer
- RESTORE_REST
+return_from_stub:
+ addq $8, %rsp
+ CFI_ADJUST_CFA_OFFSET -8
+ RESTORE_EXTRA_REGS
+ movq %rax,RAX(%rsp)
jmp int_ret_from_sys_call
CFI_ENDPROC
END(stub_rt_sigreturn)
#ifdef CONFIG_X86_X32_ABI
ENTRY(stub_x32_rt_sigreturn)
CFI_STARTPROC
- addq $8, %rsp
- PARTIAL_FRAME 0
- SAVE_REST
- FIXUP_TOP_OF_STACK %r11
+ DEFAULT_FRAME 0, 8
+ SAVE_EXTRA_REGS 8
call sys32_x32_rt_sigreturn
- movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer
- RESTORE_REST
- jmp int_ret_from_sys_call
+ jmp return_from_stub
CFI_ENDPROC
END(stub_x32_rt_sigreturn)
+#endif
-ENTRY(stub_x32_execve)
- CFI_STARTPROC
- addq $8, %rsp
- PARTIAL_FRAME 0
- SAVE_REST
- FIXUP_TOP_OF_STACK %r11
- call compat_sys_execve
- RESTORE_TOP_OF_STACK %r11
- movq %rax,RAX(%rsp)
- RESTORE_REST
- jmp int_ret_from_sys_call
- CFI_ENDPROC
-END(stub_x32_execve)
+/*
+ * A newly forked process directly context switches into this address.
+ *
+ * rdi: prev task we switched from
+ */
+ENTRY(ret_from_fork)
+ DEFAULT_FRAME
-ENTRY(stub_x32_execveat)
- CFI_STARTPROC
- addq $8, %rsp
- PARTIAL_FRAME 0
- SAVE_REST
- FIXUP_TOP_OF_STACK %r11
- call compat_sys_execveat
- RESTORE_TOP_OF_STACK %r11
- movq %rax,RAX(%rsp)
- RESTORE_REST
+ LOCK ; btr $TIF_FORK,TI_flags(%r8)
+
+ pushq_cfi $0x0002
+ popfq_cfi # reset kernel eflags
+
+ call schedule_tail # rdi: 'prev' task parameter
+
+ RESTORE_EXTRA_REGS
+
+ testl $3,CS(%rsp) # from kernel_thread?
+
+ /*
+ * By the time we get here, we have no idea whether our pt_regs,
+ * ti flags, and ti status came from the 64-bit SYSCALL fast path,
+ * the slow path, or one of the ia32entry paths.
+ * Use IRET code path to return, since it can safely handle
+ * all of the above.
+ */
+ jnz int_ret_from_sys_call
+
+ /* We came from kernel_thread */
+ /* nb: we depend on RESTORE_EXTRA_REGS above */
+ movq %rbp, %rdi
+ call *%rbx
+ movl $0, RAX(%rsp)
+ RESTORE_EXTRA_REGS
jmp int_ret_from_sys_call
CFI_ENDPROC
-END(stub_x32_execveat)
-
-#endif
+END(ret_from_fork)
/*
- * Build the entry stubs and pointer table with some assembler magic.
- * We pack 7 stubs into a single 32-byte chunk, which will fit in a
- * single cache line on all modern x86 implementations.
+ * Build the entry stubs with some assembler magic.
+ * We pack 1 stub into every 8-byte block.
*/
- .section .init.rodata,"a"
-ENTRY(interrupt)
- .section .entry.text
- .p2align 5
- .p2align CONFIG_X86_L1_CACHE_SHIFT
+ .align 8
ENTRY(irq_entries_start)
INTR_FRAME
-vector=FIRST_EXTERNAL_VECTOR
-.rept (FIRST_SYSTEM_VECTOR-FIRST_EXTERNAL_VECTOR+6)/7
- .balign 32
- .rept 7
- .if vector < FIRST_SYSTEM_VECTOR
- .if vector <> FIRST_EXTERNAL_VECTOR
+ vector=FIRST_EXTERNAL_VECTOR
+ .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
+ pushq_cfi $(~vector+0x80) /* Note: always in signed byte range */
+ vector=vector+1
+ jmp common_interrupt
CFI_ADJUST_CFA_OFFSET -8
- .endif
-1: pushq_cfi $(~vector+0x80) /* Note: always in signed byte range */
- .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6
- jmp 2f
- .endif
- .previous
- .quad 1b
- .section .entry.text
-vector=vector+1
- .endif
- .endr
-2: jmp common_interrupt
-.endr
+ .align 8
+ .endr
CFI_ENDPROC
END(irq_entries_start)
-.previous
-END(interrupt)
-.previous
-
/*
* Interrupt entry/exit.
*
/* 0(%rsp): ~(interrupt number) */
.macro interrupt func
- /* reserve pt_regs for scratch regs and rbp */
- subq $ORIG_RAX-RBP, %rsp
- CFI_ADJUST_CFA_OFFSET ORIG_RAX-RBP
cld
- /* start from rbp in pt_regs and jump over */
- movq_cfi rdi, (RDI-RBP)
- movq_cfi rsi, (RSI-RBP)
- movq_cfi rdx, (RDX-RBP)
- movq_cfi rcx, (RCX-RBP)
- movq_cfi rax, (RAX-RBP)
- movq_cfi r8, (R8-RBP)
- movq_cfi r9, (R9-RBP)
- movq_cfi r10, (R10-RBP)
- movq_cfi r11, (R11-RBP)
-
- /* Save rbp so that we can unwind from get_irq_regs() */
- movq_cfi rbp, 0
-
- /* Save previous stack value */
- movq %rsp, %rsi
+ /*
+ * Since nothing in interrupt handling code touches r12...r15 members
+ * of "struct pt_regs", and since interrupts can nest, we can save
+ * four stack slots and simultaneously provide
+ * an unwind-friendly stack layout by saving "truncated" pt_regs
+ * exactly up to rbp slot, without these members.
+ */
+ ALLOC_PT_GPREGS_ON_STACK -RBP
+ SAVE_C_REGS -RBP
+ /* this goes to 0(%rsp) for unwinder, not for saving the value: */
+ SAVE_EXTRA_REGS_RBP -RBP
- leaq -RBP(%rsp),%rdi /* arg1 for handler */
- testl $3, CS-RBP(%rsi)
+ leaq -RBP(%rsp),%rdi /* arg1 for \func (pointer to pt_regs) */
+
+ testl $3, CS-RBP(%rsp)
je 1f
SWAPGS
+1:
/*
+ * Save previous stack pointer, optionally switch to interrupt stack.
* irq_count is used to check if a CPU is already on an interrupt stack
* or not. While this is essentially redundant with preempt_count it is
* a little cheaper to use a separate counter in the PDA (short of
* moving irq_enter into assembly, which would be too much work)
*/
-1: incl PER_CPU_VAR(irq_count)
+ movq %rsp, %rsi
+ incl PER_CPU_VAR(irq_count)
cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
CFI_DEF_CFA_REGISTER rsi
-
- /* Store previous stack value */
pushq %rsi
+ /*
+ * For debugger:
+ * "CFA (Current Frame Address) is the value on stack + offset"
+ */
CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \
- 0x77 /* DW_OP_breg7 */, 0, \
+ 0x77 /* DW_OP_breg7 (rsp) */, 0, \
0x06 /* DW_OP_deref */, \
- 0x08 /* DW_OP_const1u */, SS+8-RBP, \
+ 0x08 /* DW_OP_const1u */, SIZEOF_PTREGS-RBP, \
0x22 /* DW_OP_plus */
/* We entered an interrupt context - irqs are off: */
TRACE_IRQS_OFF
ASM_CLAC
addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */
interrupt do_IRQ
- /* 0(%rsp): old_rsp-ARGOFFSET */
+ /* 0(%rsp): old RSP */
ret_from_intr:
DISABLE_INTERRUPTS(CLBR_NONE)
TRACE_IRQS_OFF
/* Restore saved previous stack */
popq %rsi
- CFI_DEF_CFA rsi,SS+8-RBP /* reg/off reset after def_cfa_expr */
- leaq ARGOFFSET-RBP(%rsi), %rsp
+ CFI_DEF_CFA rsi,SIZEOF_PTREGS-RBP /* reg/off reset after def_cfa_expr */
+ /* return code expects complete pt_regs - adjust rsp accordingly: */
+ leaq -RBP(%rsi),%rsp
CFI_DEF_CFA_REGISTER rsp
- CFI_ADJUST_CFA_OFFSET RBP-ARGOFFSET
+ CFI_ADJUST_CFA_OFFSET RBP
-exit_intr:
- GET_THREAD_INFO(%rcx)
- testl $3,CS-ARGOFFSET(%rsp)
+ testl $3,CS(%rsp)
je retint_kernel
-
/* Interrupt came from user space */
+
+ GET_THREAD_INFO(%rcx)
/*
- * Has a correct top of stack, but a partial stack frame
* %rcx: thread info. Interrupts off.
*/
retint_with_reschedule:
DISABLE_INTERRUPTS(CLBR_ANY)
TRACE_IRQS_IRETQ
- /*
- * Try to use SYSRET instead of IRET if we're returning to
- * a completely clean 64-bit userspace context.
- */
- movq (RCX-R11)(%rsp), %rcx
- cmpq %rcx,(RIP-R11)(%rsp) /* RCX == RIP */
- jne opportunistic_sysret_failed
-
- /*
- * On Intel CPUs, sysret with non-canonical RCX/RIP will #GP
- * in kernel space. This essentially lets the user take over
- * the kernel, since userspace controls RSP. It's not worth
- * testing for canonicalness exactly -- this check detects any
- * of the 17 high bits set, which is true for non-canonical
- * or kernel addresses. (This will pessimize vsyscall=native.
- * Big deal.)
- *
- * If virtual addresses ever become wider, this will need
- * to be updated to remain correct on both old and new CPUs.
- */
- .ifne __VIRTUAL_MASK_SHIFT - 47
- .error "virtual address width changed -- sysret checks need update"
- .endif
- shr $__VIRTUAL_MASK_SHIFT, %rcx
- jnz opportunistic_sysret_failed
-
- cmpq $__USER_CS,(CS-R11)(%rsp) /* CS must match SYSRET */
- jne opportunistic_sysret_failed
-
- movq (R11-ARGOFFSET)(%rsp), %r11
- cmpq %r11,(EFLAGS-ARGOFFSET)(%rsp) /* R11 == RFLAGS */
- jne opportunistic_sysret_failed
-
- /*
- * SYSRET can't restore RF. SYSRET can restore TF, but unlike IRET,
- * restoring TF results in a trap from userspace immediately after
- * SYSRET. This would cause an infinite loop whenever #DB happens
- * with register state that satisfies the opportunistic SYSRET
- * conditions. For example, single-stepping this user code:
- *
- * movq $stuck_here,%rcx
- * pushfq
- * popq %r11
- * stuck_here:
- *
- * would never get past 'stuck_here'.
- */
- testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
- jnz opportunistic_sysret_failed
-
- /* nothing to check for RSP */
-
- cmpq $__USER_DS,(SS-ARGOFFSET)(%rsp) /* SS must match SYSRET */
- jne opportunistic_sysret_failed
-
- /*
- * We win! This label is here just for ease of understanding
- * perf profiles. Nothing jumps here.
- */
-irq_return_via_sysret:
- CFI_REMEMBER_STATE
- RESTORE_ARGS 1,8,1
- movq (RSP-RIP)(%rsp),%rsp
- USERGS_SYSRET64
- CFI_RESTORE_STATE
-
-opportunistic_sysret_failed:
SWAPGS
- jmp restore_args
+ jmp restore_c_regs_and_iret
-retint_restore_args: /* return to kernel space */
- DISABLE_INTERRUPTS(CLBR_ANY)
+/* Returning to kernel space */
+retint_kernel:
+#ifdef CONFIG_PREEMPT
+ /* Interrupts are off */
+ /* Check if we need preemption */
+ bt $9,EFLAGS(%rsp) /* interrupts were off? */
+ jnc 1f
+0: cmpl $0,PER_CPU_VAR(__preempt_count)
+ jnz 1f
+ call preempt_schedule_irq
+ jmp 0b
+1:
+#endif
/*
* The iretq could re-enable interrupts:
*/
TRACE_IRQS_IRETQ
-restore_args:
- RESTORE_ARGS 1,8,1
+
+/*
+ * At this label, code paths which return to kernel and to user,
+ * which come from interrupts/exception and from syscalls, merge.
+ */
+restore_c_regs_and_iret:
+ RESTORE_C_REGS
+ REMOVE_PT_GPREGS_FROM_STACK 8
irq_return:
INTERRUPT_RETURN
jz retint_swapgs
TRACE_IRQS_ON
ENABLE_INTERRUPTS(CLBR_NONE)
- SAVE_REST
+ SAVE_EXTRA_REGS
movq $-1,ORIG_RAX(%rsp)
xorl %esi,%esi # oldset
movq %rsp,%rdi # &pt_regs
call do_notify_resume
- RESTORE_REST
+ RESTORE_EXTRA_REGS
DISABLE_INTERRUPTS(CLBR_NONE)
TRACE_IRQS_OFF
GET_THREAD_INFO(%rcx)
jmp retint_with_reschedule
-#ifdef CONFIG_PREEMPT
- /* Returning to kernel space. Check if we need preemption */
- /* rcx: threadinfo. interrupts off. */
-ENTRY(retint_kernel)
- cmpl $0,PER_CPU_VAR(__preempt_count)
- jnz retint_restore_args
- bt $9,EFLAGS-ARGOFFSET(%rsp) /* interrupts off? */
- jnc retint_restore_args
- call preempt_schedule_irq
- jmp exit_intr
-#endif
CFI_ENDPROC
END(common_interrupt)
/*
* Exception entry points.
*/
-#define INIT_TSS_IST(x) PER_CPU_VAR(init_tss) + (TSS_ist + ((x) - 1) * 8)
+#define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
.macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
ENTRY(\sym)
pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
.endif
- subq $ORIG_RAX-R15, %rsp
- CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15
+ ALLOC_PT_GPREGS_ON_STACK
.if \paranoid
.if \paranoid == 1
testl $3, CS(%rsp) /* If coming from userspace, switch */
jnz 1f /* stacks. */
.endif
- call save_paranoid
+ call paranoid_entry
.else
call error_entry
.endif
+ /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
DEFAULT_FRAME 0
.endif
.if \shift_ist != -1
- subq $EXCEPTION_STKSZ, INIT_TSS_IST(\shift_ist)
+ subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
.endif
call \do_sym
.if \shift_ist != -1
- addq $EXCEPTION_STKSZ, INIT_TSS_IST(\shift_ist)
+ addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
.endif
+ /* these procedures expect "no swapgs" flag in ebx */
.if \paranoid
- jmp paranoid_exit /* %ebx: no swapgs flag */
+ jmp paranoid_exit
.else
- jmp error_exit /* %ebx: no swapgs flag */
+ jmp error_exit
.endif
.if \paranoid == 1
addq $0x30,%rsp
CFI_ADJUST_CFA_OFFSET -0x30
pushq_cfi $-1 /* orig_ax = -1 => not a system call */
- SAVE_ALL
+ ALLOC_PT_GPREGS_ON_STACK
+ SAVE_C_REGS
+ SAVE_EXTRA_REGS
jmp error_exit
CFI_ENDPROC
END(xen_failsafe_callback)
idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
#endif
- /*
- * "Paranoid" exit path from exception stack. This is invoked
- * only on return from non-NMI IST interrupts that came
- * from kernel space.
- *
- * We may be returning to very strange contexts (e.g. very early
- * in syscall entry), so checking for preemption here would
- * be complicated. Fortunately, we there's no good reason
- * to try to handle preemption here.
- */
+/*
+ * Save all registers in pt_regs, and switch gs if needed.
+ * Use slow, but surefire "are we in kernel?" check.
+ * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
+ */
+ENTRY(paranoid_entry)
+ XCPT_FRAME 1 15*8
+ cld
+ SAVE_C_REGS 8
+ SAVE_EXTRA_REGS 8
+ movl $1,%ebx
+ movl $MSR_GS_BASE,%ecx
+ rdmsr
+ testl %edx,%edx
+ js 1f /* negative -> in kernel */
+ SWAPGS
+ xorl %ebx,%ebx
+1: ret
+ CFI_ENDPROC
+END(paranoid_entry)
- /* ebx: no swapgs flag */
+/*
+ * "Paranoid" exit path from exception stack. This is invoked
+ * only on return from non-NMI IST interrupts that came
+ * from kernel space.
+ *
+ * We may be returning to very strange contexts (e.g. very early
+ * in syscall entry), so checking for preemption here would
+ * be complicated. Fortunately, we there's no good reason
+ * to try to handle preemption here.
+ */
+/* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */
ENTRY(paranoid_exit)
DEFAULT_FRAME
DISABLE_INTERRUPTS(CLBR_NONE)
TRACE_IRQS_OFF_DEBUG
testl %ebx,%ebx /* swapgs needed? */
- jnz paranoid_restore
- TRACE_IRQS_IRETQ 0
+ jnz paranoid_exit_no_swapgs
+ TRACE_IRQS_IRETQ
SWAPGS_UNSAFE_STACK
- RESTORE_ALL 8
- INTERRUPT_RETURN
-paranoid_restore:
- TRACE_IRQS_IRETQ_DEBUG 0
- RESTORE_ALL 8
+ jmp paranoid_exit_restore
+paranoid_exit_no_swapgs:
+ TRACE_IRQS_IRETQ_DEBUG
+paranoid_exit_restore:
+ RESTORE_EXTRA_REGS
+ RESTORE_C_REGS
+ REMOVE_PT_GPREGS_FROM_STACK 8
INTERRUPT_RETURN
CFI_ENDPROC
END(paranoid_exit)
/*
- * Exception entry point. This expects an error code/orig_rax on the stack.
- * returns in "no swapgs flag" in %ebx.
+ * Save all registers in pt_regs, and switch gs if needed.
+ * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
*/
ENTRY(error_entry)
- XCPT_FRAME
- CFI_ADJUST_CFA_OFFSET 15*8
- /* oldrax contains error code */
+ XCPT_FRAME 1 15*8
cld
- movq %rdi, RDI+8(%rsp)
- movq %rsi, RSI+8(%rsp)
- movq %rdx, RDX+8(%rsp)
- movq %rcx, RCX+8(%rsp)
- movq %rax, RAX+8(%rsp)
- movq %r8, R8+8(%rsp)
- movq %r9, R9+8(%rsp)
- movq %r10, R10+8(%rsp)
- movq %r11, R11+8(%rsp)
- movq_cfi rbx, RBX+8
- movq %rbp, RBP+8(%rsp)
- movq %r12, R12+8(%rsp)
- movq %r13, R13+8(%rsp)
- movq %r14, R14+8(%rsp)
- movq %r15, R15+8(%rsp)
+ SAVE_C_REGS 8
+ SAVE_EXTRA_REGS 8
xorl %ebx,%ebx
testl $3,CS+8(%rsp)
je error_kernelspace
TRACE_IRQS_OFF
ret
-/*
- * There are two places in the kernel that can potentially fault with
- * usergs. Handle them here. B stepping K8s sometimes report a
- * truncated RIP for IRET exceptions returning to compat mode. Check
- * for these here too.
- */
+ /*
+ * There are two places in the kernel that can potentially fault with
+ * usergs. Handle them here. B stepping K8s sometimes report a
+ * truncated RIP for IRET exceptions returning to compat mode. Check
+ * for these here too.
+ */
error_kernelspace:
CFI_REL_OFFSET rcx, RCX+8
incl %ebx
END(error_entry)
-/* ebx: no swapgs flag (1: don't need swapgs, 0: need it) */
+/* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */
ENTRY(error_exit)
DEFAULT_FRAME
movl %ebx,%eax
- RESTORE_REST
+ RESTORE_EXTRA_REGS
DISABLE_INTERRUPTS(CLBR_NONE)
TRACE_IRQS_OFF
GET_THREAD_INFO(%rcx)
CFI_ENDPROC
END(error_exit)
-/*
- * Test if a given stack is an NMI stack or not.
- */
- .macro test_in_nmi reg stack nmi_ret normal_ret
- cmpq %\reg, \stack
- ja \normal_ret
- subq $EXCEPTION_STKSZ, %\reg
- cmpq %\reg, \stack
- jb \normal_ret
- jmp \nmi_ret
- .endm
-
- /* runs on exception stack */
+/* Runs on exception stack */
ENTRY(nmi)
INTR_FRAME
PARAVIRT_ADJUST_EXCEPTION_FRAME
* NMI.
*/
- /* Use %rdx as out temp variable throughout */
+ /* Use %rdx as our temp variable throughout */
pushq_cfi %rdx
CFI_REL_OFFSET rdx, 0
* We check the variable because the first NMI could be in a
* breakpoint routine using a breakpoint stack.
*/
- lea 6*8(%rsp), %rdx
- test_in_nmi rdx, 4*8(%rsp), nested_nmi, first_nmi
+ lea 6*8(%rsp), %rdx
+ /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
+ cmpq %rdx, 4*8(%rsp)
+ /* If the stack pointer is above the NMI stack, this is a normal NMI */
+ ja first_nmi
+ subq $EXCEPTION_STKSZ, %rdx
+ cmpq %rdx, 4*8(%rsp)
+ /* If it is below the NMI stack, it is a normal NMI */
+ jb first_nmi
+ /* Ah, it is within the NMI stack, treat it as nested */
+
CFI_REMEMBER_STATE
nested_nmi:
.rept 5
pushq_cfi 11*8(%rsp)
.endr
- CFI_DEF_CFA_OFFSET SS+8-RIP
+ CFI_DEF_CFA_OFFSET 5*8
/* Everything up to here is safe from nested NMIs */
pushq_cfi -6*8(%rsp)
.endr
subq $(5*8), %rsp
- CFI_DEF_CFA_OFFSET SS+8-RIP
+ CFI_DEF_CFA_OFFSET 5*8
end_repeat_nmi:
/*
* so that we repeat another NMI.
*/
pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
- subq $ORIG_RAX-R15, %rsp
- CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15
+ ALLOC_PT_GPREGS_ON_STACK
+
/*
- * Use save_paranoid to handle SWAPGS, but no need to use paranoid_exit
+ * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
* as we should not be calling schedule in NMI context.
* Even with normal interrupts enabled. An NMI should not be
* setting NEED_RESCHED or anything that normal interrupts and
* exceptions might do.
*/
- call save_paranoid
+ call paranoid_entry
DEFAULT_FRAME 0
/*
nmi_swapgs:
SWAPGS_UNSAFE_STACK
nmi_restore:
+ RESTORE_EXTRA_REGS
+ RESTORE_C_REGS
/* Pop the extra iret frame at once */
- RESTORE_ALL 6*8
+ REMOVE_PT_GPREGS_FROM_STACK 6*8
/* Clear the NMI executing stack variable */
movq $0, 5*8(%rsp)
*/
load_ucode_bsp();
- if (console_loglevel >= CONSOLE_LOGLEVEL_DEBUG)
- early_printk("Kernel alive\n");
-
clear_page(init_level4_pgt);
/* set init_level4_pgt kernel high mapping*/
init_level4_pgt[511] = early_level4_pgt[511];
#include <asm/cpufeature.h>
#include <asm/percpu.h>
#include <asm/nops.h>
+#include <asm/bootparam.h>
/* Physical address */
#define pa(X) ((X) - __PAGE_OFFSET)
/* test KEEP_SEGMENTS flag to see if the bootloader is asking
us to not reload segments */
- testb $(1<<6), BP_loadflags(%esi)
+ testb $KEEP_SEGMENTS, BP_loadflags(%esi)
jnz 2f
/*
/*
- * linux/arch/x86_64/kernel/head.S -- start in 32bit and switch to 64bit
+ * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit
*
* Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
* Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
* %rsi holds a physical pointer to real_mode_data.
*
* We come here either directly from a 64bit bootloader, or from
- * arch/x86_64/boot/compressed/head.S.
+ * arch/x86/boot/compressed/head_64.S.
*
* We only come here initially at boot nothing else comes here.
*
leaq level2_kernel_pgt(%rip), %rdi
leaq 4096(%rdi), %r8
/* See if it is a valid page table entry */
-1: testq $1, 0(%rdi)
+1: testb $1, 0(%rdi)
jz 2f
addq %rbp, 0(%rdi)
/* Go to the next page */
* be set (so that the clts/stts pair does nothing that is
* visible in the interrupted kernel thread).
*
- * Except for the eagerfpu case when we return 1 unless we've already
- * been eager and saved the state in kernel_fpu_begin().
+ * Except for the eagerfpu case when we return true; in the likely case
+ * the thread has FPU but we are not going to set/clear TS.
*/
static inline bool interrupted_kernel_fpu_idle(void)
{
return false;
if (use_eager_fpu())
- return __thread_has_fpu(current);
+ return true;
return !__thread_has_fpu(current) &&
(read_cr0() & X86_CR0_TS);
static inline bool interrupted_user_mode(void)
{
struct pt_regs *regs = get_irq_regs();
- return regs && user_mode_vm(regs);
+ return regs && user_mode(regs);
}
/*
if (__thread_has_fpu(me)) {
__save_init_fpu(me);
- } else if (!use_eager_fpu()) {
+ } else {
this_cpu_write(fpu_owner_task, NULL);
- clts();
+ if (!use_eager_fpu())
+ clts();
}
}
EXPORT_SYMBOL(__kernel_fpu_begin);
if (__thread_has_fpu(me)) {
if (WARN_ON(restore_fpu_checking(me)))
- drop_init_fpu(me);
+ fpu_reset_state(me);
} else if (!use_eager_fpu()) {
stts();
}
{
preempt_disable();
if (__thread_has_fpu(tsk)) {
- __save_init_fpu(tsk);
- __thread_fpu_end(tsk);
- } else
- tsk->thread.fpu_counter = 0;
+ if (use_eager_fpu()) {
+ __save_fpu(tsk);
+ } else {
+ __save_init_fpu(tsk);
+ __thread_fpu_end(tsk);
+ }
+ }
preempt_enable();
}
EXPORT_SYMBOL(unlazy_fpu);
return;
}
+ memset(fpu->state, 0, xstate_size);
+
if (cpu_has_fxsr) {
fx_finit(&fpu->state->fxsave);
} else {
struct i387_fsave_struct *fp = &fpu->state->fsave;
- memset(fp, 0, xstate_size);
fp->cwd = 0xffff037fu;
fp->swd = 0xffff0000u;
fp->twd = 0xffffffffu;
if (tsk_used_math(tsk)) {
if (cpu_has_fpu && tsk == current)
unlazy_fpu(tsk);
- tsk->thread.fpu.last_cpu = ~0;
+ task_disable_lazy_fpu_restore(tsk);
return 0;
}
unsigned int pos, unsigned int count,
void *kbuf, void __user *ubuf)
{
+ struct xsave_struct *xsave = &target->thread.fpu.state->xsave;
int ret;
if (!cpu_has_xsave)
* memory layout in the thread struct, so that we can copy the entire
* xstateregs to the user using one user_regset_copyout().
*/
- memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
- xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
-
+ memcpy(&xsave->i387.sw_reserved,
+ xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
/*
* Copy the xstate memory layout.
*/
- ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
- &target->thread.fpu.state->xsave, 0, -1);
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
return ret;
}
unsigned int pos, unsigned int count,
const void *kbuf, const void __user *ubuf)
{
+ struct xsave_struct *xsave = &target->thread.fpu.state->xsave;
int ret;
- struct xsave_hdr_struct *xsave_hdr;
if (!cpu_has_xsave)
return -ENODEV;
if (ret)
return ret;
- ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
- &target->thread.fpu.state->xsave, 0, -1);
-
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
/*
* mxcsr reserved bits must be masked to zero for security reasons.
*/
- target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
-
- xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
-
- xsave_hdr->xstate_bv &= pcntxt_mask;
+ xsave->i387.mxcsr &= mxcsr_feature_mask;
+ xsave->xsave_hdr.xstate_bv &= pcntxt_mask;
/*
* These bits must be zero.
*/
- memset(xsave_hdr->reserved, 0, 48);
-
+ memset(&xsave->xsave_hdr.reserved, 0, 48);
return ret;
}
* because the ->io_bitmap_max value must match the bitmap
* contents:
*/
- tss = &per_cpu(init_tss, get_cpu());
+ tss = &per_cpu(cpu_tss, get_cpu());
if (turn_on)
bitmap_clear(t->io_bitmap_ptr, from, num);
this_cpu = smp_processor_id();
cpumask_copy(&online_new, cpu_online_mask);
- cpu_clear(this_cpu, online_new);
+ cpumask_clear_cpu(this_cpu, &online_new);
this_count = 0;
for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; vector++) {
data = irq_desc_get_irq_data(desc);
cpumask_copy(&affinity_new, data->affinity);
- cpu_clear(this_cpu, affinity_new);
+ cpumask_clear_cpu(this_cpu, &affinity_new);
/* Do not count inactive or per-cpu irqs. */
if (!irq_has_action(irq) || irqd_is_per_cpu(data))
if (unlikely(!desc))
return false;
- if (user_mode_vm(regs) || !execute_on_irq_stack(overflow, desc, irq)) {
+ if (user_mode(regs) || !execute_on_irq_stack(overflow, desc, irq)) {
if (unlikely(overflow))
print_stack_overflow();
desc->handle_irq(irq, desc);
u64 estack_top, estack_bottom;
u64 curbase = (u64)task_stack_page(current);
- if (user_mode_vm(regs))
+ if (user_mode(regs))
return;
if (regs->sp >= curbase + sizeof(struct thread_info) +
#endif
for_each_clear_bit_from(i, used_vectors, first_system_vector) {
/* IA32_SYSCALL_VECTOR could be used in trap_init already. */
- set_intr_gate(i, interrupt[i - FIRST_EXTERNAL_VECTOR]);
+ set_intr_gate(i, irq_entries_start +
+ 8 * (i - FIRST_EXTERNAL_VECTOR));
}
#ifdef CONFIG_X86_LOCAL_APIC
for_each_clear_bit_from(i, used_vectors, NR_VECTORS)
#ifdef CONFIG_X86_32
switch (regno) {
case GDB_SS:
- if (!user_mode_vm(regs))
+ if (!user_mode(regs))
*(unsigned long *)mem = __KERNEL_DS;
break;
case GDB_SP:
- if (!user_mode_vm(regs))
+ if (!user_mode(regs))
*(unsigned long *)mem = kernel_stack_pointer(regs);
break;
case GDB_GS:
{
struct insn insn;
kprobe_opcode_t buf[MAX_INSN_SIZE];
+ int length;
unsigned long recovered_insn =
recover_probed_instruction(buf, (unsigned long)src);
return 0;
kernel_insn_init(&insn, (void *)recovered_insn, MAX_INSN_SIZE);
insn_get_length(&insn);
+ length = insn.length;
+
/* Another subsystem puts a breakpoint, failed to recover */
if (insn.opcode.bytes[0] == BREAKPOINT_INSTRUCTION)
return 0;
- memcpy(dest, insn.kaddr, insn.length);
+ memcpy(dest, insn.kaddr, length);
#ifdef CONFIG_X86_64
if (insn_rip_relative(&insn)) {
s64 newdisp;
u8 *disp;
- kernel_insn_init(&insn, dest, insn.length);
+ kernel_insn_init(&insn, dest, length);
insn_get_displacement(&insn);
/*
* The copied instruction uses the %rip-relative addressing
*(s32 *) disp = (s32) newdisp;
}
#endif
- return insn.length;
+ return length;
}
static int arch_copy_kprobe(struct kprobe *p)
struct kprobe *p;
struct kprobe_ctlblk *kcb;
- if (user_mode_vm(regs))
+ if (user_mode(regs))
return 0;
addr = (kprobe_opcode_t *)(regs->ip - sizeof(kprobe_opcode_t));
struct die_args *args = data;
int ret = NOTIFY_DONE;
- if (args->regs && user_mode_vm(args->regs))
+ if (args->regs && user_mode(args->regs))
return ret;
if (val == DIE_GPF) {
* can get false positives too easily, for example if the host is
* overcommitted.
*/
- watchdog_enable_hardlockup_detector(false);
+ hardlockup_detector_disable();
}
static noinline uint32_t __kvm_cpuid_base(void)
#include <asm/page.h>
#include <asm/pgtable.h>
+#include <asm/setup.h>
#if 0
#define DEBUGP(fmt, ...) \
#ifdef CONFIG_RANDOMIZE_BASE
static unsigned long module_load_offset;
-static int randomize_modules = 1;
/* Mutex protects the module_load_offset. */
static DEFINE_MUTEX(module_kaslr_mutex);
-static int __init parse_nokaslr(char *p)
-{
- randomize_modules = 0;
- return 0;
-}
-early_param("nokaslr", parse_nokaslr);
-
static unsigned long int get_module_load_offset(void)
{
- if (randomize_modules) {
+ if (kaslr_enabled()) {
mutex_lock(&module_kaslr_mutex);
/*
* Calculate the module_load_offset the first time this
.ptep_modify_prot_start = __ptep_modify_prot_start,
.ptep_modify_prot_commit = __ptep_modify_prot_commit,
-#if PAGETABLE_LEVELS >= 3
+#if CONFIG_PGTABLE_LEVELS >= 3
#ifdef CONFIG_X86_PAE
.set_pte_atomic = native_set_pte_atomic,
.pte_clear = native_pte_clear,
.pmd_val = PTE_IDENT,
.make_pmd = PTE_IDENT,
-#if PAGETABLE_LEVELS == 4
+#if CONFIG_PGTABLE_LEVELS == 4
.pud_val = PTE_IDENT,
.make_pud = PTE_IDENT,
.set_pgd = native_set_pgd,
#endif
-#endif /* PAGETABLE_LEVELS >= 3 */
+#endif /* CONFIG_PGTABLE_LEVELS >= 3 */
.pte_val = PTE_IDENT,
.pgd_val = PTE_IDENT,
}
/*
- * RIP, flags, and the argument registers are usually saved.
- * orig_ax is probably okay, too.
+ * These registers are always saved on 64-bit syscall entry.
+ * On 32-bit entry points, they are saved too except r8..r11.
*/
regs_user_copy->ip = user_regs->ip;
+ regs_user_copy->ax = user_regs->ax;
regs_user_copy->cx = user_regs->cx;
regs_user_copy->dx = user_regs->dx;
regs_user_copy->si = user_regs->si;
regs_user_copy->r11 = user_regs->r11;
regs_user_copy->orig_ax = user_regs->orig_ax;
regs_user_copy->flags = user_regs->flags;
+ regs_user_copy->sp = user_regs->sp;
+ regs_user_copy->cs = user_regs->cs;
+ regs_user_copy->ss = user_regs->ss;
/*
- * Don't even try to report the "rest" regs.
+ * Most system calls don't save these registers, don't report them.
*/
regs_user_copy->bx = -1;
regs_user_copy->bp = -1;
/*
* For this to be at all useful, we need a reasonable guess for
- * sp and the ABI. Be careful: we're in NMI context, and we're
+ * the ABI. Be careful: we're in NMI context, and we're
* considering current to be the current task, so we should
* be careful not to look at any other percpu variables that might
* change during context switches.
*/
- if (IS_ENABLED(CONFIG_IA32_EMULATION) &&
- task_thread_info(current)->status & TS_COMPAT) {
- /* Easy case: we're in a compat syscall. */
- regs_user->abi = PERF_SAMPLE_REGS_ABI_32;
- regs_user_copy->sp = user_regs->sp;
- regs_user_copy->cs = user_regs->cs;
- regs_user_copy->ss = user_regs->ss;
- } else if (user_regs->orig_ax != -1) {
- /*
- * We're probably in a 64-bit syscall.
- * Warning: this code is severely racy. At least it's better
- * than just blindly copying user_regs.
- */
- regs_user->abi = PERF_SAMPLE_REGS_ABI_64;
- regs_user_copy->sp = this_cpu_read(old_rsp);
- regs_user_copy->cs = __USER_CS;
- regs_user_copy->ss = __USER_DS;
- regs_user_copy->cx = -1; /* usually contains garbage */
- } else {
- /* We're probably in an interrupt or exception. */
- regs_user->abi = user_64bit_mode(user_regs) ?
- PERF_SAMPLE_REGS_ABI_64 : PERF_SAMPLE_REGS_ABI_32;
- regs_user_copy->sp = user_regs->sp;
- regs_user_copy->cs = user_regs->cs;
- regs_user_copy->ss = user_regs->ss;
- }
+ regs_user->abi = user_64bit_mode(user_regs) ?
+ PERF_SAMPLE_REGS_ABI_64 : PERF_SAMPLE_REGS_ABI_32;
regs_user->regs = regs_user_copy;
}
#include <linux/sched.h>
#include <linux/module.h>
#include <linux/pm.h>
-#include <linux/clockchips.h>
+#include <linux/tick.h>
#include <linux/random.h>
#include <linux/user-return-notifier.h>
#include <linux/dmi.h>
#include <asm/syscalls.h>
#include <asm/idle.h>
#include <asm/uaccess.h>
+#include <asm/mwait.h>
#include <asm/i387.h>
#include <asm/fpu-internal.h>
#include <asm/debugreg.h>
* section. Since TSS's are completely CPU-local, we want them
* on exact cacheline boundaries, to eliminate cacheline ping-pong.
*/
-__visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct, init_tss) = INIT_TSS;
+__visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct, cpu_tss) = {
+ .x86_tss = {
+ .sp0 = TOP_OF_INIT_STACK,
+#ifdef CONFIG_X86_32
+ .ss0 = __KERNEL_DS,
+ .ss1 = __KERNEL_CS,
+ .io_bitmap_base = INVALID_IO_BITMAP_OFFSET,
+#endif
+ },
+#ifdef CONFIG_X86_32
+ /*
+ * Note that the .io_bitmap member must be extra-big. This is because
+ * the CPU will access an additional byte beyond the end of the IO
+ * permission bitmap. The extra byte must be all 1 bits, and must
+ * be within the limit.
+ */
+ .io_bitmap = { [0 ... IO_BITMAP_LONGS] = ~0 },
+#endif
+};
+EXPORT_PER_CPU_SYMBOL_GPL(cpu_tss);
#ifdef CONFIG_X86_64
static DEFINE_PER_CPU(unsigned char, is_idle);
dst->thread.fpu_counter = 0;
dst->thread.fpu.has_fpu = 0;
- dst->thread.fpu.last_cpu = ~0;
dst->thread.fpu.state = NULL;
+ task_disable_lazy_fpu_restore(dst);
if (tsk_used_math(src)) {
int err = fpu_alloc(&dst->thread.fpu);
if (err)
unsigned long *bp = t->io_bitmap_ptr;
if (bp) {
- struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
+ struct tss_struct *tss = &per_cpu(cpu_tss, get_cpu());
t->io_bitmap_ptr = NULL;
clear_thread_flag(TIF_IO_BITMAP);
flush_ptrace_hw_breakpoint(tsk);
memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
- drop_init_fpu(tsk);
- /*
- * Free the FPU state for non xsave platforms. They get reallocated
- * lazily at the first use.
- */
- if (!use_eager_fpu())
+
+ if (!use_eager_fpu()) {
+ /* FPU state will be reallocated lazily at the first use. */
+ drop_fpu(tsk);
free_thread_xstate(tsk);
+ } else if (!used_math()) {
+ /* kthread execs. TODO: cleanup this horror. */
+ if (WARN_ON(init_fpu(tsk)))
+ force_sig(SIGKILL, tsk);
+ user_fpu_begin();
+ restore_init_xstate();
+ }
}
static void hard_disable_TSC(void)
if (!cpumask_test_cpu(cpu, amd_e400_c1e_mask)) {
cpumask_set_cpu(cpu, amd_e400_c1e_mask);
- /*
- * Force broadcast so ACPI can not interfere.
- */
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
- &cpu);
+ /* Force broadcast so ACPI can not interfere. */
+ tick_broadcast_force();
pr_info("Switch to broadcast mode on CPU%d\n", cpu);
}
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
+ tick_broadcast_enter();
default_idle();
* called with interrupts disabled.
*/
local_irq_disable();
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
+ tick_broadcast_exit();
local_irq_enable();
} else
default_idle();
}
+/*
+ * Intel Core2 and older machines prefer MWAIT over HALT for C1.
+ * We can't rely on cpuidle installing MWAIT, because it will not load
+ * on systems that support only C1 -- so the boot default must be MWAIT.
+ *
+ * Some AMD machines are the opposite, they depend on using HALT.
+ *
+ * So for default C1, which is used during boot until cpuidle loads,
+ * use MWAIT-C1 on Intel HW that has it, else use HALT.
+ */
+static int prefer_mwait_c1_over_halt(const struct cpuinfo_x86 *c)
+{
+ if (c->x86_vendor != X86_VENDOR_INTEL)
+ return 0;
+
+ if (!cpu_has(c, X86_FEATURE_MWAIT))
+ return 0;
+
+ return 1;
+}
+
+/*
+ * MONITOR/MWAIT with no hints, used for default default C1 state.
+ * This invokes MWAIT with interrutps enabled and no flags,
+ * which is backwards compatible with the original MWAIT implementation.
+ */
+
+static void mwait_idle(void)
+{
+ if (!current_set_polling_and_test()) {
+ if (this_cpu_has(X86_BUG_CLFLUSH_MONITOR)) {
+ smp_mb(); /* quirk */
+ clflush((void *)¤t_thread_info()->flags);
+ smp_mb(); /* quirk */
+ }
+
+ __monitor((void *)¤t_thread_info()->flags, 0, 0);
+ if (!need_resched())
+ __sti_mwait(0, 0);
+ else
+ local_irq_enable();
+ } else {
+ local_irq_enable();
+ }
+ __current_clr_polling();
+}
+
void select_idle_routine(const struct cpuinfo_x86 *c)
{
#ifdef CONFIG_SMP
/* E400: APIC timer interrupt does not wake up CPU from C1e */
pr_info("using AMD E400 aware idle routine\n");
x86_idle = amd_e400_idle;
+ } else if (prefer_mwait_c1_over_halt(c)) {
+ pr_info("using mwait in idle threads\n");
+ x86_idle = mwait_idle;
} else
x86_idle = default_idle;
}
unsigned long sp;
unsigned short ss, gs;
- if (user_mode_vm(regs)) {
+ if (user_mode(regs)) {
sp = regs->sp;
ss = regs->ss & 0xffff;
gs = get_user_gs(regs);
regs->ip = new_ip;
regs->sp = new_sp;
regs->flags = X86_EFLAGS_IF;
- /*
- * force it to the iret return path by making it look as if there was
- * some work pending.
- */
- set_thread_flag(TIF_NOTIFY_RESUME);
+ force_iret();
}
EXPORT_SYMBOL_GPL(start_thread);
struct thread_struct *prev = &prev_p->thread,
*next = &next_p->thread;
int cpu = smp_processor_id();
- struct tss_struct *tss = &per_cpu(init_tss, cpu);
+ struct tss_struct *tss = &per_cpu(cpu_tss, cpu);
fpu_switch_t fpu;
/* never put a printk in __switch_to... printk() calls wake_up*() indirectly */
fpu = switch_fpu_prepare(prev_p, next_p, cpu);
- /*
- * Reload esp0.
- */
- load_sp0(tss, next);
-
/*
* Save away %gs. No need to save %fs, as it was saved on the
* stack on entry. No need to save %es and %ds, as those are
*/
arch_end_context_switch(next_p);
+ /*
+ * Reload esp0, kernel_stack, and current_top_of_stack. This changes
+ * current_thread_info().
+ */
+ load_sp0(tss, next);
this_cpu_write(kernel_stack,
- (unsigned long)task_stack_page(next_p) +
- THREAD_SIZE - KERNEL_STACK_OFFSET);
+ (unsigned long)task_stack_page(next_p) +
+ THREAD_SIZE);
+ this_cpu_write(cpu_current_top_of_stack,
+ (unsigned long)task_stack_page(next_p) +
+ THREAD_SIZE);
/*
* Restore %gs if needed (which is common)
asmlinkage extern void ret_from_fork(void);
-__visible DEFINE_PER_CPU(unsigned long, old_rsp);
+__visible DEFINE_PER_CPU(unsigned long, rsp_scratch);
/* Prints also some state that isn't saved in the pt_regs */
void __show_regs(struct pt_regs *regs, int all)
p->thread.sp0 = (unsigned long)task_stack_page(p) + THREAD_SIZE;
childregs = task_pt_regs(p);
p->thread.sp = (unsigned long) childregs;
- p->thread.usersp = me->thread.usersp;
set_tsk_thread_flag(p, TIF_FORK);
p->thread.io_bitmap_ptr = NULL;
*/
if (clone_flags & CLONE_SETTLS) {
#ifdef CONFIG_IA32_EMULATION
- if (test_thread_flag(TIF_IA32))
+ if (is_ia32_task())
err = do_set_thread_area(p, -1,
(struct user_desc __user *)childregs->si, 0);
else
loadsegment(es, _ds);
loadsegment(ds, _ds);
load_gs_index(0);
- current->thread.usersp = new_sp;
regs->ip = new_ip;
regs->sp = new_sp;
- this_cpu_write(old_rsp, new_sp);
regs->cs = _cs;
regs->ss = _ss;
regs->flags = X86_EFLAGS_IF;
+ force_iret();
}
void
struct thread_struct *prev = &prev_p->thread;
struct thread_struct *next = &next_p->thread;
int cpu = smp_processor_id();
- struct tss_struct *tss = &per_cpu(init_tss, cpu);
+ struct tss_struct *tss = &per_cpu(cpu_tss, cpu);
unsigned fsindex, gsindex;
fpu_switch_t fpu;
fpu = switch_fpu_prepare(prev_p, next_p, cpu);
- /* Reload esp0 and ss1. */
- load_sp0(tss, next);
-
/* We must save %fs and %gs before load_TLS() because
* %fs and %gs may be cleared by load_TLS().
*
/*
* Switch the PDA and FPU contexts.
*/
- prev->usersp = this_cpu_read(old_rsp);
- this_cpu_write(old_rsp, next->usersp);
this_cpu_write(current_task, next_p);
/*
task_thread_info(prev_p)->saved_preempt_count = this_cpu_read(__preempt_count);
this_cpu_write(__preempt_count, task_thread_info(next_p)->saved_preempt_count);
+ /* Reload esp0 and ss1. This changes current_thread_info(). */
+ load_sp0(tss, next);
+
this_cpu_write(kernel_stack,
- (unsigned long)task_stack_page(next_p) +
- THREAD_SIZE - KERNEL_STACK_OFFSET);
+ (unsigned long)task_stack_page(next_p) + THREAD_SIZE);
/*
* Now maybe reload the debug registers and handle I/O bitmaps
unsigned long KSTK_ESP(struct task_struct *task)
{
- return (test_tsk_thread_flag(task, TIF_IA32)) ?
- (task_pt_regs(task)->sp) : ((task)->thread.usersp);
+ return task_pt_regs(task)->sp;
}
case offsetof(struct user_regs_struct,cs):
if (unlikely(value == 0))
return -EIO;
-#ifdef CONFIG_IA32_EMULATION
- if (test_tsk_thread_flag(task, TIF_IA32))
- task_pt_regs(task)->cs = value;
-#endif
+ task_pt_regs(task)->cs = value;
break;
case offsetof(struct user_regs_struct,ss):
if (unlikely(value == 0))
return -EIO;
-#ifdef CONFIG_IA32_EMULATION
- if (test_tsk_thread_flag(task, TIF_IA32))
- task_pt_regs(task)->ss = value;
-#endif
+ task_pt_regs(task)->ss = value;
break;
}
memset(info, 0, sizeof(*info));
info->si_signo = SIGTRAP;
info->si_code = si_code;
- info->si_addr = user_mode_vm(regs) ? (void __user *)regs->ip : NULL;
+ info->si_addr = user_mode(regs) ? (void __user *)regs->ip : NULL;
}
void user_single_step_siginfo(struct task_struct *tsk,
set_normalized_timespec(ts, now.tv_sec, now.tv_nsec);
}
+static struct pvclock_vsyscall_time_info *pvclock_vdso_info;
+
+static struct pvclock_vsyscall_time_info *
+pvclock_get_vsyscall_user_time_info(int cpu)
+{
+ if (!pvclock_vdso_info) {
+ BUG();
+ return NULL;
+ }
+
+ return &pvclock_vdso_info[cpu];
+}
+
+struct pvclock_vcpu_time_info *pvclock_get_vsyscall_time_info(int cpu)
+{
+ return &pvclock_get_vsyscall_user_time_info(cpu)->pvti;
+}
+
#ifdef CONFIG_X86_64
+static int pvclock_task_migrate(struct notifier_block *nb, unsigned long l,
+ void *v)
+{
+ struct task_migration_notifier *mn = v;
+ struct pvclock_vsyscall_time_info *pvti;
+
+ pvti = pvclock_get_vsyscall_user_time_info(mn->from_cpu);
+
+ /* this is NULL when pvclock vsyscall is not initialized */
+ if (unlikely(pvti == NULL))
+ return NOTIFY_DONE;
+
+ pvti->migrate_count++;
+
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block pvclock_migrate = {
+ .notifier_call = pvclock_task_migrate,
+};
+
/*
* Initialize the generic pvclock vsyscall state. This will allocate
* a/some page(s) for the per-vcpu pvclock information, set up a
WARN_ON (size != PVCLOCK_VSYSCALL_NR_PAGES*PAGE_SIZE);
+ pvclock_vdso_info = i;
+
for (idx = 0; idx <= (PVCLOCK_FIXMAP_END-PVCLOCK_FIXMAP_BEGIN); idx++) {
__set_fixmap(PVCLOCK_FIXMAP_BEGIN + idx,
__pa(i) + (idx*PAGE_SIZE),
PAGE_KERNEL_VVAR);
}
+
+ register_task_migration_notifier(&pvclock_migrate);
+
return 0;
}
#endif
movl (%ebx), %ecx
addl $4, %ebx
1:
- testl $0x1, %ecx /* is it a destination page */
+ testb $0x1, %cl /* is it a destination page */
jz 2f
movl %ecx, %edi
andl $0xfffff000, %edi
jmp 0b
2:
- testl $0x2, %ecx /* is it an indirection page */
+ testb $0x2, %cl /* is it an indirection page */
jz 2f
movl %ecx, %ebx
andl $0xfffff000, %ebx
jmp 0b
2:
- testl $0x4, %ecx /* is it the done indicator */
+ testb $0x4, %cl /* is it the done indicator */
jz 2f
jmp 3f
2:
- testl $0x8, %ecx /* is it the source indicator */
+ testb $0x8, %cl /* is it the source indicator */
jz 0b /* Ignore it otherwise */
movl %ecx, %esi /* For every source page do a copy */
andl $0xfffff000, %esi
* Set cr4 to a known state:
* - physical address extension enabled
*/
- movq $X86_CR4_PAE, %rax
+ movl $X86_CR4_PAE, %eax
movq %rax, %cr4
jmp 1f
movq (%rbx), %rcx
addq $8, %rbx
1:
- testq $0x1, %rcx /* is it a destination page? */
+ testb $0x1, %cl /* is it a destination page? */
jz 2f
movq %rcx, %rdi
andq $0xfffffffffffff000, %rdi
jmp 0b
2:
- testq $0x2, %rcx /* is it an indirection page? */
+ testb $0x2, %cl /* is it an indirection page? */
jz 2f
movq %rcx, %rbx
andq $0xfffffffffffff000, %rbx
jmp 0b
2:
- testq $0x4, %rcx /* is it the done indicator? */
+ testb $0x4, %cl /* is it the done indicator? */
jz 2f
jmp 3f
2:
- testq $0x8, %rcx /* is it the source indicator? */
+ testb $0x8, %cl /* is it the source indicator? */
jz 0b /* Ignore it otherwise */
movq %rcx, %rsi /* For ever source page do a copy */
andq $0xfffffffffffff000, %rsi
movq %rsi, %rax
movq %r10, %rdi
- movq $512, %rcx
+ movl $512, %ecx
rep ; movsq
movq %rax, %rdi
movq %rdx, %rsi
- movq $512, %rcx
+ movl $512, %ecx
rep ; movsq
movq %rdx, %rdi
movq %r10, %rsi
- movq $512, %rcx
+ movl $512, %ecx
rep ; movsq
lea PAGE_SIZE(%rax), %rsi
mapaddr = ramdisk_image & PAGE_MASK;
p = early_memremap(mapaddr, clen+slop);
memcpy(q, p+slop, clen);
- early_iounmap(p, clen+slop);
+ early_memunmap(p, clen+slop);
q += clen;
ramdisk_image += clen;
ramdisk_size -= clen;
data_len = data->len + sizeof(struct setup_data);
data_type = data->type;
pa_next = data->next;
- early_iounmap(data, sizeof(*data));
+ early_memunmap(data, sizeof(*data));
switch (data_type) {
case SETUP_E820_EXT:
E820_RAM, E820_RESERVED_KERN);
found = 1;
pa_data = data->next;
- early_iounmap(data, sizeof(*data));
+ early_memunmap(data, sizeof(*data));
}
if (!found)
return;
data = early_memremap(pa_data, sizeof(*data));
memblock_reserve(pa_data, sizeof(*data) + data->len);
pa_data = data->next;
- early_iounmap(data, sizeof(*data));
+ early_memunmap(data, sizeof(*data));
}
}
static int
dump_kernel_offset(struct notifier_block *self, unsigned long v, void *p)
{
- pr_emerg("Kernel Offset: 0x%lx from 0x%lx "
- "(relocation range: 0x%lx-0x%lx)\n",
- (unsigned long)&_text - __START_KERNEL, __START_KERNEL,
- __START_KERNEL_map, MODULES_VADDR-1);
+ if (kaslr_enabled()) {
+ pr_emerg("Kernel Offset: 0x%lx from 0x%lx (relocation range: 0x%lx-0x%lx)\n",
+ (unsigned long)&_text - __START_KERNEL,
+ __START_KERNEL,
+ __START_KERNEL_map,
+ MODULES_VADDR-1);
+ } else {
+ pr_emerg("Kernel Offset: disabled\n");
+ }
return 0;
}
regs->seg = GET_SEG(seg) | 3; \
} while (0)
-int restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc,
- unsigned long *pax)
+int restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
{
void __user *buf;
unsigned int tmpflags;
#endif /* CONFIG_X86_32 */
COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx);
- COPY(dx); COPY(cx); COPY(ip);
+ COPY(dx); COPY(cx); COPY(ip); COPY(ax);
#ifdef CONFIG_X86_64
COPY(r8);
COPY(r15);
#endif /* CONFIG_X86_64 */
-#ifdef CONFIG_X86_32
COPY_SEG_CPL3(cs);
COPY_SEG_CPL3(ss);
-#else /* !CONFIG_X86_32 */
- /* Kernel saves and restores only the CS segment register on signals,
- * which is the bare minimum needed to allow mixed 32/64-bit code.
- * App's signal handler can save/restore other segments if needed. */
- COPY_SEG_CPL3(cs);
-#endif /* CONFIG_X86_32 */
get_user_ex(tmpflags, &sc->flags);
regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
regs->orig_ax = -1; /* disable syscall checks */
get_user_ex(buf, &sc->fpstate);
-
- get_user_ex(*pax, &sc->ax);
} get_user_catch(err);
err |= restore_xstate_sig(buf, config_enabled(CONFIG_X86_32));
+ force_iret();
+
return err;
}
#else /* !CONFIG_X86_32 */
put_user_ex(regs->flags, &sc->flags);
put_user_ex(regs->cs, &sc->cs);
- put_user_ex(0, &sc->gs);
- put_user_ex(0, &sc->fs);
+ put_user_ex(0, &sc->__pad2);
+ put_user_ex(0, &sc->__pad1);
+ put_user_ex(regs->ss, &sc->ss);
#endif /* CONFIG_X86_32 */
put_user_ex(fpstate, &sc->fpstate);
regs->sp = (unsigned long)frame;
- /* Set up the CS register to run signal handlers in 64-bit mode,
- even if the handler happens to be interrupting 32-bit code. */
+ /*
+ * Set up the CS and SS registers to run signal handlers in
+ * 64-bit mode, even if the handler happens to be interrupting
+ * 32-bit or 16-bit code.
+ *
+ * SS is subtle. In 64-bit mode, we don't need any particular
+ * SS descriptor, but we do need SS to be valid. It's possible
+ * that the old SS is entirely bogus -- this can happen if the
+ * signal we're trying to deliver is #GP or #SS caused by a bad
+ * SS value.
+ */
regs->cs = __USER_CS;
+ regs->ss = __USER_DS;
return 0;
}
{
struct pt_regs *regs = current_pt_regs();
struct sigframe __user *frame;
- unsigned long ax;
sigset_t set;
frame = (struct sigframe __user *)(regs->sp - 8);
set_current_blocked(&set);
- if (restore_sigcontext(regs, &frame->sc, &ax))
+ if (restore_sigcontext(regs, &frame->sc))
goto badframe;
- return ax;
+ return regs->ax;
badframe:
signal_fault(regs, frame, "sigreturn");
{
struct pt_regs *regs = current_pt_regs();
struct rt_sigframe __user *frame;
- unsigned long ax;
sigset_t set;
frame = (struct rt_sigframe __user *)(regs->sp - sizeof(long));
set_current_blocked(&set);
- if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &ax))
+ if (restore_sigcontext(regs, &frame->uc.uc_mcontext))
goto badframe;
if (restore_altstack(&frame->uc.uc_stack))
goto badframe;
- return ax;
+ return regs->ax;
badframe:
signal_fault(regs, frame, "rt_sigreturn");
* Ensure the signal handler starts with the new fpu state.
*/
if (used_math())
- drop_init_fpu(current);
+ fpu_reset_state(current);
}
signal_setup_done(failed, ksig, test_thread_flag(TIF_SINGLESTEP));
}
struct pt_regs *regs = current_pt_regs();
struct rt_sigframe_x32 __user *frame;
sigset_t set;
- unsigned long ax;
frame = (struct rt_sigframe_x32 __user *)(regs->sp - 8);
set_current_blocked(&set);
- if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &ax))
+ if (restore_sigcontext(regs, &frame->uc.uc_mcontext))
goto badframe;
if (compat_restore_altstack(&frame->uc.uc_stack))
goto badframe;
- return ax;
+ return regs->ax;
badframe:
signal_fault(regs, frame, "x32 rt_sigreturn");
#include <asm/realmode.h>
#include <asm/misc.h>
-/* State of each CPU */
-DEFINE_PER_CPU(int, cpu_state) = { 0 };
-
/* Number of siblings per CPU package */
int smp_num_siblings = 1;
EXPORT_SYMBOL(smp_num_siblings);
lock_vector_lock();
set_cpu_online(smp_processor_id(), true);
unlock_vector_lock();
- per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
+ cpu_set_state_online(smp_processor_id());
x86_platform.nmi_init();
/* enable local interrupts */
return boot_error;
}
+void common_cpu_up(unsigned int cpu, struct task_struct *idle)
+{
+ /* Just in case we booted with a single CPU. */
+ alternatives_enable_smp();
+
+ per_cpu(current_task, cpu) = idle;
+
+#ifdef CONFIG_X86_32
+ /* Stack for startup_32 can be just as for start_secondary onwards */
+ irq_ctx_init(cpu);
+ per_cpu(cpu_current_top_of_stack, cpu) =
+ (unsigned long)task_stack_page(idle) + THREAD_SIZE;
+#else
+ clear_tsk_thread_flag(idle, TIF_FORK);
+ initial_gs = per_cpu_offset(cpu);
+#endif
+ per_cpu(kernel_stack, cpu) =
+ (unsigned long)task_stack_page(idle) + THREAD_SIZE;
+}
+
/*
* NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
* (ie clustered apic addressing mode), this is a LOGICAL apic ID.
int cpu0_nmi_registered = 0;
unsigned long timeout;
- /* Just in case we booted with a single CPU. */
- alternatives_enable_smp();
-
idle->thread.sp = (unsigned long) (((struct pt_regs *)
(THREAD_SIZE + task_stack_page(idle))) - 1);
- per_cpu(current_task, cpu) = idle;
-#ifdef CONFIG_X86_32
- /* Stack for startup_32 can be just as for start_secondary onwards */
- irq_ctx_init(cpu);
-#else
- clear_tsk_thread_flag(idle, TIF_FORK);
- initial_gs = per_cpu_offset(cpu);
-#endif
- per_cpu(kernel_stack, cpu) =
- (unsigned long)task_stack_page(idle) -
- KERNEL_STACK_OFFSET + THREAD_SIZE;
early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
initial_code = (unsigned long)start_secondary;
stack_start = idle->thread.sp;
*/
mtrr_save_state();
- per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
+ /* x86 CPUs take themselves offline, so delayed offline is OK. */
+ err = cpu_check_up_prepare(cpu);
+ if (err && err != -EBUSY)
+ return err;
/* the FPU context is blank, nobody can own it */
__cpu_disable_lazy_restore(cpu);
+ common_cpu_up(cpu, tidle);
+
err = do_boot_cpu(apicid, cpu, tidle);
if (err) {
pr_err("do_boot_cpu failed(%d) to wakeup CPU#%u\n", err, cpu);
return SMP_NO_APIC;
}
- verify_local_APIC();
-
/*
* If SMP should be disabled, then really disable it!
*/
switch_to_new_gdt(me);
/* already set me in cpu_online_mask in boot_cpu_init() */
cpumask_set_cpu(me, cpu_callout_mask);
- per_cpu(cpu_state, me) = CPU_ONLINE;
+ cpu_set_state_online(me);
}
void __init native_smp_cpus_done(unsigned int max_cpus)
numa_remove_cpu(cpu);
}
-static DEFINE_PER_CPU(struct completion, die_complete);
-
void cpu_disable_common(void)
{
int cpu = smp_processor_id();
- init_completion(&per_cpu(die_complete, smp_processor_id()));
-
remove_siblinginfo(cpu);
/* It's now safe to remove this processor from the online map */
return 0;
}
-void cpu_die_common(unsigned int cpu)
+int common_cpu_die(unsigned int cpu)
{
- wait_for_completion_timeout(&per_cpu(die_complete, cpu), HZ);
-}
+ int ret = 0;
-void native_cpu_die(unsigned int cpu)
-{
/* We don't do anything here: idle task is faking death itself. */
- cpu_die_common(cpu);
-
/* They ack this in play_dead() by setting CPU_DEAD */
- if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
+ if (cpu_wait_death(cpu, 5)) {
if (system_state == SYSTEM_RUNNING)
pr_info("CPU %u is now offline\n", cpu);
} else {
pr_err("CPU %u didn't die...\n", cpu);
+ ret = -1;
}
+
+ return ret;
+}
+
+void native_cpu_die(unsigned int cpu)
+{
+ common_cpu_die(cpu);
}
void play_dead_common(void)
reset_lazy_tlbstate();
amd_e400_remove_cpu(raw_smp_processor_id());
- mb();
/* Ack it */
- __this_cpu_write(cpu_state, CPU_DEAD);
- complete(&per_cpu(die_complete, smp_processor_id()));
+ (void)cpu_report_death();
/*
* With physical CPU hotplug, we should halt the cpu
return va_align.mask;
}
+/*
+ * To avoid aliasing in the I$ on AMD F15h, the bits defined by the
+ * va_align.bits, [12:upper_bit), are set to a random value instead of
+ * zeroing them. This random value is computed once per boot. This form
+ * of ASLR is known as "per-boot ASLR".
+ *
+ * To achieve this, the random value is added to the info.align_offset
+ * value before calling vm_unmapped_area() or ORed directly to the
+ * address.
+ */
+static unsigned long get_align_bits(void)
+{
+ return va_align.bits & get_align_mask();
+}
+
unsigned long align_vdso_addr(unsigned long addr)
{
unsigned long align_mask = get_align_mask();
- return (addr + align_mask) & ~align_mask;
+ addr = (addr + align_mask) & ~align_mask;
+ return addr | get_align_bits();
}
static int __init control_va_addr_alignment(char *str)
info.length = len;
info.low_limit = begin;
info.high_limit = end;
- info.align_mask = filp ? get_align_mask() : 0;
+ info.align_mask = 0;
info.align_offset = pgoff << PAGE_SHIFT;
+ if (filp) {
+ info.align_mask = get_align_mask();
+ info.align_offset += get_align_bits();
+ }
return vm_unmapped_area(&info);
}
info.length = len;
info.low_limit = PAGE_SIZE;
info.high_limit = mm->mmap_base;
- info.align_mask = filp ? get_align_mask() : 0;
+ info.align_mask = 0;
info.align_offset = pgoff << PAGE_SHIFT;
+ if (filp) {
+ info.align_mask = get_align_mask();
+ info.align_offset += get_align_bits();
+ }
addr = vm_unmapped_area(&info);
if (!(addr & ~PAGE_MASK))
return addr;
#include <linux/cache.h>
#include <asm/asm-offsets.h>
-#define __SYSCALL_I386(nr, sym, compat) extern asmlinkage void sym(void) ;
+#ifdef CONFIG_IA32_EMULATION
+#define SYM(sym, compat) compat
+#else
+#define SYM(sym, compat) sym
+#define ia32_sys_call_table sys_call_table
+#define __NR_ia32_syscall_max __NR_syscall_max
+#endif
+
+#define __SYSCALL_I386(nr, sym, compat) extern asmlinkage void SYM(sym, compat)(void) ;
#include <asm/syscalls_32.h>
#undef __SYSCALL_I386
-#define __SYSCALL_I386(nr, sym, compat) [nr] = sym,
+#define __SYSCALL_I386(nr, sym, compat) [nr] = SYM(sym, compat),
typedef asmlinkage void (*sys_call_ptr_t)(void);
extern asmlinkage void sys_ni_syscall(void);
-__visible const sys_call_ptr_t sys_call_table[__NR_syscall_max+1] = {
+__visible const sys_call_ptr_t ia32_sys_call_table[__NR_ia32_syscall_max+1] = {
/*
* Smells like a compiler bug -- it doesn't work
* when the & below is removed.
*/
- [0 ... __NR_syscall_max] = &sys_ni_syscall,
+ [0 ... __NR_ia32_syscall_max] = &sys_ni_syscall,
#include <asm/syscalls_32.h>
};
/* test 3: check the value hasn't changed */
/* If this test fails, we managed to overwrite the data */
if (!rodata_test_data) {
- printk(KERN_ERR "rodata_test: Test 3 failes (end data)\n");
+ printk(KERN_ERR "rodata_test: Test 3 fails (end data)\n");
return -ENODEV;
}
/* test 4: check if the rodata section is 4Kb aligned */
{
unsigned long pc = instruction_pointer(regs);
- if (!user_mode_vm(regs) && in_lock_functions(pc)) {
+ if (!user_mode(regs) && in_lock_functions(pc)) {
#ifdef CONFIG_FRAME_POINTER
return *(unsigned long *)(regs->bp + sizeof(long));
#else
{
enum ctx_state prev_state;
- if (user_mode_vm(regs)) {
+ if (user_mode(regs)) {
/* Other than that, we're just an exception. */
prev_state = exception_enter();
} else {
* but we need to notify RCU.
*/
rcu_nmi_enter();
- prev_state = IN_KERNEL; /* the value is irrelevant. */
+ prev_state = CONTEXT_KERNEL; /* the value is irrelevant. */
}
/*
/* Must be before exception_exit. */
preempt_count_sub(HARDIRQ_OFFSET);
- if (user_mode_vm(regs))
+ if (user_mode(regs))
return exception_exit(prev_state);
else
rcu_nmi_exit();
*
* IST exception handlers normally cannot schedule. As a special
* exception, if the exception interrupted userspace code (i.e.
- * user_mode_vm(regs) would return true) and the exception was not
+ * user_mode(regs) would return true) and the exception was not
* a double fault, it can be safe to schedule. ist_begin_non_atomic()
* begins a non-atomic section within an ist_enter()/ist_exit() region.
* Callers are responsible for enabling interrupts themselves inside
*/
void ist_begin_non_atomic(struct pt_regs *regs)
{
- BUG_ON(!user_mode_vm(regs));
+ BUG_ON(!user_mode(regs));
/*
* Sanity check: we need to be on the normal thread stack. This
* will catch asm bugs and any attempt to use ist_preempt_enable
* from double_fault.
*/
- BUG_ON(((current_stack_pointer() ^ this_cpu_read_stable(kernel_stack))
- & ~(THREAD_SIZE - 1)) != 0);
+ BUG_ON((unsigned long)(current_top_of_stack() -
+ current_stack_pointer()) >= THREAD_SIZE);
preempt_count_sub(HARDIRQ_OFFSET);
}
do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str,
struct pt_regs *regs, long error_code)
{
-#ifdef CONFIG_X86_32
- if (regs->flags & X86_VM_MASK) {
+ if (v8086_mode(regs)) {
/*
* Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
* On nmi (interrupt 2), do_trap should not be called.
}
return -1;
}
-#endif
+
if (!user_mode(regs)) {
if (!fixup_exception(regs)) {
tsk->thread.error_code = error_code;
goto exit;
conditional_sti(regs);
- if (!user_mode_vm(regs))
+ if (!user_mode(regs))
die("bounds", regs, error_code);
if (!cpu_feature_enabled(X86_FEATURE_MPX)) {
prev_state = exception_enter();
conditional_sti(regs);
-#ifdef CONFIG_X86_32
- if (regs->flags & X86_VM_MASK) {
+ if (v8086_mode(regs)) {
local_irq_enable();
handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
goto exit;
}
-#endif
tsk = current;
if (!user_mode(regs)) {
/* Copy the remainder of the stack from the current stack. */
memmove(new_stack, s, offsetof(struct bad_iret_stack, regs.ip));
- BUG_ON(!user_mode_vm(&new_stack->regs));
+ BUG_ON(!user_mode(&new_stack->regs));
return new_stack;
}
NOKPROBE_SYMBOL(fixup_bad_iret);
* then it's very likely the result of an icebp/int01 trap.
* User wants a sigtrap for that.
*/
- if (!dr6 && user_mode_vm(regs))
+ if (!dr6 && user_mode(regs))
user_icebp = 1;
/* Catch kmemcheck conditions first of all! */
/* It's safe to allow irq's after DR6 has been saved */
preempt_conditional_sti(regs);
- if (regs->flags & X86_VM_MASK) {
+ if (v8086_mode(regs)) {
handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
X86_TRAP_DB);
preempt_conditional_cli(regs);
return;
conditional_sti(regs);
- if (!user_mode_vm(regs))
+ if (!user_mode(regs))
{
if (!fixup_exception(regs)) {
task->thread.error_code = error_code;
/*
* Save the info for the exception handler and clear the error.
*/
- save_init_fpu(task);
+ unlazy_fpu(task);
task->thread.trap_nr = trapnr;
task->thread.error_code = error_code;
info.si_signo = SIGFPE;
kernel_fpu_disable();
__thread_fpu_begin(tsk);
if (unlikely(restore_fpu_checking(tsk))) {
- drop_init_fpu(tsk);
+ fpu_reset_state(tsk);
force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
} else {
tsk->thread.fpu_counter++;
/* Set of traps needed for early debugging. */
void __init early_trap_init(void)
{
- set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK);
+ /*
+ * Don't use IST to set DEBUG_STACK as it doesn't work until TSS
+ * is ready in cpu_init() <-- trap_init(). Before trap_init(),
+ * CPU runs at ring 0 so it is impossible to hit an invalid
+ * stack. Using the original stack works well enough at this
+ * early stage. DEBUG_STACK will be equipped after cpu_init() in
+ * trap_init().
+ *
+ * We don't need to set trace_idt_table like set_intr_gate(),
+ * since we don't have trace_debug and it will be reset to
+ * 'debug' in trap_init() by set_intr_gate_ist().
+ */
+ set_intr_gate_notrace(X86_TRAP_DB, debug);
/* int3 can be called from all */
- set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK);
+ set_system_intr_gate(X86_TRAP_BP, &int3);
#ifdef CONFIG_X86_32
set_intr_gate(X86_TRAP_PF, page_fault);
#endif
*/
cpu_init();
+ /*
+ * X86_TRAP_DB and X86_TRAP_BP have been set
+ * in early_trap_init(). However, ITS works only after
+ * cpu_init() loads TSS. See comments in early_trap_init().
+ */
+ set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK);
+ /* int3 can be called from all */
+ set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK);
+
x86_init.irqs.trap_init();
#ifdef CONFIG_X86_64
int ret = NOTIFY_DONE;
/* We are only interested in userspace traps */
- if (regs && !user_mode_vm(regs))
+ if (regs && !user_mode(regs))
return NOTIFY_DONE;
switch (val) {
do_exit(SIGSEGV);
}
- tss = &per_cpu(init_tss, get_cpu());
+ tss = &per_cpu(cpu_tss, get_cpu());
current->thread.sp0 = current->thread.saved_sp0;
current->thread.sysenter_cs = __KERNEL_CS;
load_sp0(tss, ¤t->thread);
tsk->thread.saved_fs = info->regs32->fs;
tsk->thread.saved_gs = get_user_gs(info->regs32);
- tss = &per_cpu(init_tss, get_cpu());
+ tss = &per_cpu(cpu_tss, get_cpu());
tsk->thread.sp0 = (unsigned long) &info->VM86_TSS_ESP0;
if (cpu_has_sep)
tsk->thread.sysenter_cs = 0;
gtod_write_begin(vdata);
/* copy vsyscall data */
- vdata->vclock_mode = tk->tkr.clock->archdata.vclock_mode;
- vdata->cycle_last = tk->tkr.cycle_last;
- vdata->mask = tk->tkr.mask;
- vdata->mult = tk->tkr.mult;
- vdata->shift = tk->tkr.shift;
+ vdata->vclock_mode = tk->tkr_mono.clock->archdata.vclock_mode;
+ vdata->cycle_last = tk->tkr_mono.cycle_last;
+ vdata->mask = tk->tkr_mono.mask;
+ vdata->mult = tk->tkr_mono.mult;
+ vdata->shift = tk->tkr_mono.shift;
vdata->wall_time_sec = tk->xtime_sec;
- vdata->wall_time_snsec = tk->tkr.xtime_nsec;
+ vdata->wall_time_snsec = tk->tkr_mono.xtime_nsec;
vdata->monotonic_time_sec = tk->xtime_sec
+ tk->wall_to_monotonic.tv_sec;
- vdata->monotonic_time_snsec = tk->tkr.xtime_nsec
+ vdata->monotonic_time_snsec = tk->tkr_mono.xtime_nsec
+ ((u64)tk->wall_to_monotonic.tv_nsec
- << tk->tkr.shift);
+ << tk->tkr_mono.shift);
while (vdata->monotonic_time_snsec >=
- (((u64)NSEC_PER_SEC) << tk->tkr.shift)) {
+ (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift)) {
vdata->monotonic_time_snsec -=
- ((u64)NSEC_PER_SEC) << tk->tkr.shift;
+ ((u64)NSEC_PER_SEC) << tk->tkr_mono.shift;
vdata->monotonic_time_sec++;
}
vdata->wall_time_coarse_sec = tk->xtime_sec;
- vdata->wall_time_coarse_nsec = (long)(tk->tkr.xtime_nsec >>
- tk->tkr.shift);
+ vdata->wall_time_coarse_nsec = (long)(tk->tkr_mono.xtime_nsec >>
+ tk->tkr_mono.shift);
vdata->monotonic_time_coarse_sec =
vdata->wall_time_coarse_sec + tk->wall_to_monotonic.tv_sec;
config_enabled(CONFIG_IA32_EMULATION));
if (!buf) {
- drop_init_fpu(tsk);
+ fpu_reset_state(tsk);
return 0;
}
*/
user_fpu_begin();
if (restore_user_xstate(buf_fx, xstate_bv, fx_only)) {
- drop_init_fpu(tsk);
+ fpu_reset_state(tsk);
return -1;
}
}
this_func();
}
-static inline void __init eager_fpu_init_bp(void)
-{
- current->thread.fpu.state =
- alloc_bootmem_align(xstate_size, __alignof__(struct xsave_struct));
- if (!init_xstate_buf)
- setup_init_fpu_buf();
-}
-
-void eager_fpu_init(void)
+/*
+ * setup_init_fpu_buf() is __init and it is OK to call it here because
+ * init_xstate_buf will be unset only once during boot.
+ */
+void __init_refok eager_fpu_init(void)
{
- static __refdata void (*boot_func)(void) = eager_fpu_init_bp;
-
- clear_used_math();
+ WARN_ON(used_math());
current_thread_info()->status = 0;
if (eagerfpu == ENABLE)
return;
}
- if (boot_func) {
- boot_func();
- boot_func = NULL;
- }
-
- /*
- * This is same as math_state_restore(). But use_xsave() is
- * not yet patched to use math_state_restore().
- */
- init_fpu(current);
- __thread_fpu_begin(current);
- if (cpu_has_xsave)
- xrstor_state(init_xstate_buf, -1);
- else
- fxrstor_checking(&init_xstate_buf->i387);
+ if (!init_xstate_buf)
+ setup_init_fpu_buf();
}
/*
-ccflags-y += -Ivirt/kvm -Iarch/x86/kvm
+ccflags-y += -Iarch/x86/kvm
CFLAGS_x86.o := -I.
CFLAGS_svm.o := -I.
((best->eax & 0xff00) >> 8) != 0)
return -EINVAL;
+ /* Update physical-address width */
+ vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
+
kvm_pmu_cpuid_update(vcpu);
return 0;
}
}
}
+int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu)
+{
+ struct kvm_cpuid_entry2 *best;
+
+ best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
+ if (!best || best->eax < 0x80000008)
+ goto not_found;
+ best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
+ if (best)
+ return best->eax & 0xff;
+not_found:
+ return 36;
+}
+EXPORT_SYMBOL_GPL(cpuid_query_maxphyaddr);
+
/* when an old userspace process fills a new kernel module */
int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
struct kvm_cpuid *cpuid,
}
EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
-int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
-{
- struct kvm_cpuid_entry2 *best;
-
- best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
- if (!best || best->eax < 0x80000008)
- goto not_found;
- best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
- if (best)
- return best->eax & 0xff;
-not_found:
- return 36;
-}
-EXPORT_SYMBOL_GPL(cpuid_maxphyaddr);
-
/*
* If no match is found, check whether we exceed the vCPU's limit
* and return the content of the highest valid _standard_ leaf instead.
struct kvm_cpuid_entry2 __user *entries);
void kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx, u32 *ecx, u32 *edx);
+int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu);
+
+static inline int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
+{
+ return vcpu->arch.maxphyaddr;
+}
static inline bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
{
struct kvm_cpuid_entry2 *best;
if (!static_cpu_has(X86_FEATURE_XSAVE))
- return 0;
+ return false;
best = kvm_find_cpuid_entry(vcpu, 1, 0);
return best && (best->ecx & bit(X86_FEATURE_XSAVE));
struct opcode mode64;
};
-/* EFLAGS bit definitions. */
-#define EFLG_ID (1<<21)
-#define EFLG_VIP (1<<20)
-#define EFLG_VIF (1<<19)
-#define EFLG_AC (1<<18)
-#define EFLG_VM (1<<17)
-#define EFLG_RF (1<<16)
-#define EFLG_IOPL (3<<12)
-#define EFLG_NT (1<<14)
-#define EFLG_OF (1<<11)
-#define EFLG_DF (1<<10)
-#define EFLG_IF (1<<9)
-#define EFLG_TF (1<<8)
-#define EFLG_SF (1<<7)
-#define EFLG_ZF (1<<6)
-#define EFLG_AF (1<<4)
-#define EFLG_PF (1<<2)
-#define EFLG_CF (1<<0)
-
#define EFLG_RESERVED_ZEROS_MASK 0xffc0802a
-#define EFLG_RESERVED_ONE_MASK 2
enum x86_transfer_type {
X86_TRANSFER_NONE,
* These EFLAGS bits are restored from saved value during emulation, and
* any changes are written back to the saved value after emulation.
*/
-#define EFLAGS_MASK (EFLG_OF|EFLG_SF|EFLG_ZF|EFLG_AF|EFLG_PF|EFLG_CF)
+#define EFLAGS_MASK (X86_EFLAGS_OF|X86_EFLAGS_SF|X86_EFLAGS_ZF|X86_EFLAGS_AF|\
+ X86_EFLAGS_PF|X86_EFLAGS_CF)
#ifdef CONFIG_X86_64
#define ON64(x) x
*dest = (*dest & ~mask) | (src & mask);
}
+static void assign_register(unsigned long *reg, u64 val, int bytes)
+{
+ /* The 4-byte case *is* correct: in 64-bit mode we zero-extend. */
+ switch (bytes) {
+ case 1:
+ *(u8 *)reg = (u8)val;
+ break;
+ case 2:
+ *(u16 *)reg = (u16)val;
+ break;
+ case 4:
+ *reg = (u32)val;
+ break; /* 64b: zero-extend */
+ case 8:
+ *reg = val;
+ break;
+ }
+}
+
static inline unsigned long ad_mask(struct x86_emulate_ctxt *ctxt)
{
return (1UL << (ctxt->ad_bytes << 3)) - 1;
FASTOP2R(cmp, cmp_r);
+static int em_bsf_c(struct x86_emulate_ctxt *ctxt)
+{
+ /* If src is zero, do not writeback, but update flags */
+ if (ctxt->src.val == 0)
+ ctxt->dst.type = OP_NONE;
+ return fastop(ctxt, em_bsf);
+}
+
+static int em_bsr_c(struct x86_emulate_ctxt *ctxt)
+{
+ /* If src is zero, do not writeback, but update flags */
+ if (ctxt->src.val == 0)
+ ctxt->dst.type = OP_NONE;
+ return fastop(ctxt, em_bsr);
+}
+
static u8 test_cc(unsigned int condition, unsigned long flags)
{
u8 rc;
unsigned int in_page, n;
unsigned int count = ctxt->rep_prefix ?
address_mask(ctxt, reg_read(ctxt, VCPU_REGS_RCX)) : 1;
- in_page = (ctxt->eflags & EFLG_DF) ?
+ in_page = (ctxt->eflags & X86_EFLAGS_DF) ?
offset_in_page(reg_read(ctxt, VCPU_REGS_RDI)) :
PAGE_SIZE - offset_in_page(reg_read(ctxt, VCPU_REGS_RDI));
n = min3(in_page, (unsigned int)sizeof(rc->data) / size, count);
}
if (ctxt->rep_prefix && (ctxt->d & String) &&
- !(ctxt->eflags & EFLG_DF)) {
+ !(ctxt->eflags & X86_EFLAGS_DF)) {
ctxt->dst.data = rc->data + rc->pos;
ctxt->dst.type = OP_MEM_STR;
ctxt->dst.count = (rc->end - rc->pos) / size;
static void write_register_operand(struct operand *op)
{
- /* The 4-byte case *is* correct: in 64-bit mode we zero-extend. */
- switch (op->bytes) {
- case 1:
- *(u8 *)op->addr.reg = (u8)op->val;
- break;
- case 2:
- *(u16 *)op->addr.reg = (u16)op->val;
- break;
- case 4:
- *op->addr.reg = (u32)op->val;
- break; /* 64b: zero-extend */
- case 8:
- *op->addr.reg = op->val;
- break;
- }
+ return assign_register(op->addr.reg, op->val, op->bytes);
}
static int writeback(struct x86_emulate_ctxt *ctxt, struct operand *op)
{
int rc;
unsigned long val, change_mask;
- int iopl = (ctxt->eflags & X86_EFLAGS_IOPL) >> IOPL_SHIFT;
+ int iopl = (ctxt->eflags & X86_EFLAGS_IOPL) >> X86_EFLAGS_IOPL_BIT;
int cpl = ctxt->ops->cpl(ctxt);
rc = emulate_pop(ctxt, &val, len);
if (rc != X86EMUL_CONTINUE)
return rc;
- change_mask = EFLG_CF | EFLG_PF | EFLG_AF | EFLG_ZF | EFLG_SF | EFLG_OF
- | EFLG_TF | EFLG_DF | EFLG_NT | EFLG_AC | EFLG_ID;
+ change_mask = X86_EFLAGS_CF | X86_EFLAGS_PF | X86_EFLAGS_AF |
+ X86_EFLAGS_ZF | X86_EFLAGS_SF | X86_EFLAGS_OF |
+ X86_EFLAGS_TF | X86_EFLAGS_DF | X86_EFLAGS_NT |
+ X86_EFLAGS_AC | X86_EFLAGS_ID;
switch(ctxt->mode) {
case X86EMUL_MODE_PROT64:
case X86EMUL_MODE_PROT32:
case X86EMUL_MODE_PROT16:
if (cpl == 0)
- change_mask |= EFLG_IOPL;
+ change_mask |= X86_EFLAGS_IOPL;
if (cpl <= iopl)
- change_mask |= EFLG_IF;
+ change_mask |= X86_EFLAGS_IF;
break;
case X86EMUL_MODE_VM86:
if (iopl < 3)
return emulate_gp(ctxt, 0);
- change_mask |= EFLG_IF;
+ change_mask |= X86_EFLAGS_IF;
break;
default: /* real mode */
- change_mask |= (EFLG_IOPL | EFLG_IF);
+ change_mask |= (X86_EFLAGS_IOPL | X86_EFLAGS_IF);
break;
}
static int em_pushf(struct x86_emulate_ctxt *ctxt)
{
- ctxt->src.val = (unsigned long)ctxt->eflags & ~EFLG_VM;
+ ctxt->src.val = (unsigned long)ctxt->eflags & ~X86_EFLAGS_VM;
return em_push(ctxt);
}
{
int rc = X86EMUL_CONTINUE;
int reg = VCPU_REGS_RDI;
+ u32 val;
while (reg >= VCPU_REGS_RAX) {
if (reg == VCPU_REGS_RSP) {
--reg;
}
- rc = emulate_pop(ctxt, reg_rmw(ctxt, reg), ctxt->op_bytes);
+ rc = emulate_pop(ctxt, &val, ctxt->op_bytes);
if (rc != X86EMUL_CONTINUE)
break;
+ assign_register(reg_rmw(ctxt, reg), val, ctxt->op_bytes);
--reg;
}
return rc;
if (rc != X86EMUL_CONTINUE)
return rc;
- ctxt->eflags &= ~(EFLG_IF | EFLG_TF | EFLG_AC);
+ ctxt->eflags &= ~(X86_EFLAGS_IF | X86_EFLAGS_TF | X86_EFLAGS_AC);
ctxt->src.val = get_segment_selector(ctxt, VCPU_SREG_CS);
rc = em_push(ctxt);
unsigned long temp_eip = 0;
unsigned long temp_eflags = 0;
unsigned long cs = 0;
- unsigned long mask = EFLG_CF | EFLG_PF | EFLG_AF | EFLG_ZF | EFLG_SF | EFLG_TF |
- EFLG_IF | EFLG_DF | EFLG_OF | EFLG_IOPL | EFLG_NT | EFLG_RF |
- EFLG_AC | EFLG_ID | (1 << 1); /* Last one is the reserved bit */
- unsigned long vm86_mask = EFLG_VM | EFLG_VIF | EFLG_VIP;
+ unsigned long mask = X86_EFLAGS_CF | X86_EFLAGS_PF | X86_EFLAGS_AF |
+ X86_EFLAGS_ZF | X86_EFLAGS_SF | X86_EFLAGS_TF |
+ X86_EFLAGS_IF | X86_EFLAGS_DF | X86_EFLAGS_OF |
+ X86_EFLAGS_IOPL | X86_EFLAGS_NT | X86_EFLAGS_RF |
+ X86_EFLAGS_AC | X86_EFLAGS_ID |
+ X86_EFLAGS_FIXED;
+ unsigned long vm86_mask = X86_EFLAGS_VM | X86_EFLAGS_VIF |
+ X86_EFLAGS_VIP;
/* TODO: Add stack limit check */
ctxt->_eip = temp_eip;
-
if (ctxt->op_bytes == 4)
ctxt->eflags = ((temp_eflags & mask) | (ctxt->eflags & vm86_mask));
else if (ctxt->op_bytes == 2) {
}
ctxt->eflags &= ~EFLG_RESERVED_ZEROS_MASK; /* Clear reserved zeros */
- ctxt->eflags |= EFLG_RESERVED_ONE_MASK;
+ ctxt->eflags |= X86_EFLAGS_FIXED;
ctxt->ops->set_nmi_mask(ctxt, false);
return rc;
((u32) (old >> 32) != (u32) reg_read(ctxt, VCPU_REGS_RDX))) {
*reg_write(ctxt, VCPU_REGS_RAX) = (u32) (old >> 0);
*reg_write(ctxt, VCPU_REGS_RDX) = (u32) (old >> 32);
- ctxt->eflags &= ~EFLG_ZF;
+ ctxt->eflags &= ~X86_EFLAGS_ZF;
} else {
ctxt->dst.val64 = ((u64)reg_read(ctxt, VCPU_REGS_RCX) << 32) |
(u32) reg_read(ctxt, VCPU_REGS_RBX);
- ctxt->eflags |= EFLG_ZF;
+ ctxt->eflags |= X86_EFLAGS_ZF;
}
return X86EMUL_CONTINUE;
}
ctxt->src.val = ctxt->dst.orig_val;
fastop(ctxt, em_cmp);
- if (ctxt->eflags & EFLG_ZF) {
+ if (ctxt->eflags & X86_EFLAGS_ZF) {
/* Success: write back to memory; no update of EAX */
ctxt->src.type = OP_NONE;
ctxt->dst.val = ctxt->src.orig_val;
ops->get_msr(ctxt, MSR_SYSCALL_MASK, &msr_data);
ctxt->eflags &= ~msr_data;
- ctxt->eflags |= EFLG_RESERVED_ONE_MASK;
+ ctxt->eflags |= X86_EFLAGS_FIXED;
#endif
} else {
/* legacy mode */
ops->get_msr(ctxt, MSR_STAR, &msr_data);
ctxt->_eip = (u32)msr_data;
- ctxt->eflags &= ~(EFLG_VM | EFLG_IF);
+ ctxt->eflags &= ~(X86_EFLAGS_VM | X86_EFLAGS_IF);
}
return X86EMUL_CONTINUE;
if ((msr_data & 0xfffc) == 0x0)
return emulate_gp(ctxt, 0);
- ctxt->eflags &= ~(EFLG_VM | EFLG_IF);
- cs_sel = (u16)msr_data & ~SELECTOR_RPL_MASK;
+ ctxt->eflags &= ~(X86_EFLAGS_VM | X86_EFLAGS_IF);
+ cs_sel = (u16)msr_data & ~SEGMENT_RPL_MASK;
ss_sel = cs_sel + 8;
if (efer & EFER_LMA) {
cs.d = 0;
return emulate_gp(ctxt, 0);
break;
}
- cs_sel |= SELECTOR_RPL_MASK;
- ss_sel |= SELECTOR_RPL_MASK;
+ cs_sel |= SEGMENT_RPL_MASK;
+ ss_sel |= SEGMENT_RPL_MASK;
ops->set_segment(ctxt, cs_sel, &cs, 0, VCPU_SREG_CS);
ops->set_segment(ctxt, ss_sel, &ss, 0, VCPU_SREG_SS);
return false;
if (ctxt->mode == X86EMUL_MODE_VM86)
return true;
- iopl = (ctxt->eflags & X86_EFLAGS_IOPL) >> IOPL_SHIFT;
+ iopl = (ctxt->eflags & X86_EFLAGS_IOPL) >> X86_EFLAGS_IOPL_BIT;
return ctxt->ops->cpl(ctxt) > iopl;
}
return ret;
ret = __load_segment_descriptor(ctxt, tss->gs, VCPU_SREG_GS, cpl,
X86_TRANSFER_TASK_SWITCH, NULL);
- if (ret != X86EMUL_CONTINUE)
- return ret;
- return X86EMUL_CONTINUE;
+ return ret;
}
static int task_switch_32(struct x86_emulate_ctxt *ctxt,
static void string_addr_inc(struct x86_emulate_ctxt *ctxt, int reg,
struct operand *op)
{
- int df = (ctxt->eflags & EFLG_DF) ? -op->count : op->count;
+ int df = (ctxt->eflags & X86_EFLAGS_DF) ? -op->count : op->count;
register_address_increment(ctxt, reg, df * op->bytes);
op->addr.mem.ea = register_address(ctxt, reg);
return X86EMUL_CONTINUE;
}
-static int em_vmcall(struct x86_emulate_ctxt *ctxt)
+static int em_hypercall(struct x86_emulate_ctxt *ctxt)
{
int rc = ctxt->ops->fix_hypercall(ctxt);
return em_lgdt_lidt(ctxt, true);
}
-static int em_vmmcall(struct x86_emulate_ctxt *ctxt)
-{
- int rc;
-
- rc = ctxt->ops->fix_hypercall(ctxt);
-
- /* Disable writeback. */
- ctxt->dst.type = OP_NONE;
- return rc;
-}
-
static int em_lidt(struct x86_emulate_ctxt *ctxt)
{
return em_lgdt_lidt(ctxt, false);
{
u32 flags;
- flags = EFLG_CF | EFLG_PF | EFLG_AF | EFLG_ZF | EFLG_SF;
+ flags = X86_EFLAGS_CF | X86_EFLAGS_PF | X86_EFLAGS_AF | X86_EFLAGS_ZF |
+ X86_EFLAGS_SF;
flags &= *reg_rmw(ctxt, VCPU_REGS_RAX) >> 8;
ctxt->eflags &= ~0xffUL;
static const struct opcode group7_rm0[] = {
N,
- I(SrcNone | Priv | EmulateOnUD, em_vmcall),
+ I(SrcNone | Priv | EmulateOnUD, em_hypercall),
N, N, N, N, N, N,
};
static const struct opcode group7_rm3[] = {
DIP(SrcNone | Prot | Priv, vmrun, check_svme_pa),
- II(SrcNone | Prot | EmulateOnUD, em_vmmcall, vmmcall),
+ II(SrcNone | Prot | EmulateOnUD, em_hypercall, vmmcall),
DIP(SrcNone | Prot | Priv, vmload, check_svme_pa),
DIP(SrcNone | Prot | Priv, vmsave, check_svme_pa),
DIP(SrcNone | Prot | Priv, stgi, check_svme),
N, N,
G(BitOp, group8),
F(DstMem | SrcReg | ModRM | BitOp | Lock | PageTable, em_btc),
- F(DstReg | SrcMem | ModRM, em_bsf), F(DstReg | SrcMem | ModRM, em_bsr),
+ I(DstReg | SrcMem | ModRM, em_bsf_c),
+ I(DstReg | SrcMem | ModRM, em_bsr_c),
D(DstReg | SrcMem8 | ModRM | Mov), D(DstReg | SrcMem16 | ModRM | Mov),
/* 0xC0 - 0xC7 */
F2bv(DstMem | SrcReg | ModRM | SrcWrite | Lock, em_xadd),
if (((ctxt->b == 0xa6) || (ctxt->b == 0xa7) ||
(ctxt->b == 0xae) || (ctxt->b == 0xaf))
&& (((ctxt->rep_prefix == REPE_PREFIX) &&
- ((ctxt->eflags & EFLG_ZF) == 0))
+ ((ctxt->eflags & X86_EFLAGS_ZF) == 0))
|| ((ctxt->rep_prefix == REPNE_PREFIX) &&
- ((ctxt->eflags & EFLG_ZF) == EFLG_ZF))))
+ ((ctxt->eflags & X86_EFLAGS_ZF) == X86_EFLAGS_ZF))))
return true;
return false;
/* All REP prefixes have the same first termination condition */
if (address_mask(ctxt, reg_read(ctxt, VCPU_REGS_RCX)) == 0) {
ctxt->eip = ctxt->_eip;
- ctxt->eflags &= ~EFLG_RF;
+ ctxt->eflags &= ~X86_EFLAGS_RF;
goto done;
}
}
}
if (ctxt->rep_prefix && (ctxt->d & String))
- ctxt->eflags |= EFLG_RF;
+ ctxt->eflags |= X86_EFLAGS_RF;
else
- ctxt->eflags &= ~EFLG_RF;
+ ctxt->eflags &= ~X86_EFLAGS_RF;
if (ctxt->execute) {
if (ctxt->d & Fastop) {
rc = emulate_int(ctxt, ctxt->src.val);
break;
case 0xce: /* into */
- if (ctxt->eflags & EFLG_OF)
+ if (ctxt->eflags & X86_EFLAGS_OF)
rc = emulate_int(ctxt, 4);
break;
case 0xe9: /* jmp rel */
break;
case 0xf5: /* cmc */
/* complement carry flag from eflags reg */
- ctxt->eflags ^= EFLG_CF;
+ ctxt->eflags ^= X86_EFLAGS_CF;
break;
case 0xf8: /* clc */
- ctxt->eflags &= ~EFLG_CF;
+ ctxt->eflags &= ~X86_EFLAGS_CF;
break;
case 0xf9: /* stc */
- ctxt->eflags |= EFLG_CF;
+ ctxt->eflags |= X86_EFLAGS_CF;
break;
case 0xfc: /* cld */
- ctxt->eflags &= ~EFLG_DF;
+ ctxt->eflags &= ~X86_EFLAGS_DF;
break;
case 0xfd: /* std */
- ctxt->eflags |= EFLG_DF;
+ ctxt->eflags |= X86_EFLAGS_DF;
break;
default:
goto cannot_emulate;
}
goto done; /* skip rip writeback */
}
- ctxt->eflags &= ~EFLG_RF;
+ ctxt->eflags &= ~X86_EFLAGS_RF;
}
ctxt->eip = ctxt->_eip;
case 0x40 ... 0x4f: /* cmov */
if (test_cc(ctxt->b, ctxt->eflags))
ctxt->dst.val = ctxt->src.val;
- else if (ctxt->mode != X86EMUL_MODE_PROT64 ||
- ctxt->op_bytes != 4)
+ else if (ctxt->op_bytes != 4)
ctxt->dst.type = OP_NONE; /* no writeback */
break;
case 0x80 ... 0x8f: /* jnz rel, etc*/
(addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH));
}
-static int pit_ioport_write(struct kvm_io_device *this,
+static int pit_ioport_write(struct kvm_vcpu *vcpu,
+ struct kvm_io_device *this,
gpa_t addr, int len, const void *data)
{
struct kvm_pit *pit = dev_to_pit(this);
return 0;
}
-static int pit_ioport_read(struct kvm_io_device *this,
+static int pit_ioport_read(struct kvm_vcpu *vcpu,
+ struct kvm_io_device *this,
gpa_t addr, int len, void *data)
{
struct kvm_pit *pit = dev_to_pit(this);
return 0;
}
-static int speaker_ioport_write(struct kvm_io_device *this,
+static int speaker_ioport_write(struct kvm_vcpu *vcpu,
+ struct kvm_io_device *this,
gpa_t addr, int len, const void *data)
{
struct kvm_pit *pit = speaker_to_pit(this);
return 0;
}
-static int speaker_ioport_read(struct kvm_io_device *this,
- gpa_t addr, int len, void *data)
+static int speaker_ioport_read(struct kvm_vcpu *vcpu,
+ struct kvm_io_device *this,
+ gpa_t addr, int len, void *data)
{
struct kvm_pit *pit = speaker_to_pit(this);
struct kvm_kpit_state *pit_state = &pit->pit_state;
#include <linux/kthread.h>
-#include "iodev.h"
+#include <kvm/iodev.h>
struct kvm_kpit_channel_state {
u32 count; /* can be 65536 */
return 0;
}
-static int picdev_master_write(struct kvm_io_device *dev,
+static int picdev_master_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
gpa_t addr, int len, const void *val)
{
return picdev_write(container_of(dev, struct kvm_pic, dev_master),
addr, len, val);
}
-static int picdev_master_read(struct kvm_io_device *dev,
+static int picdev_master_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
gpa_t addr, int len, void *val)
{
return picdev_read(container_of(dev, struct kvm_pic, dev_master),
addr, len, val);
}
-static int picdev_slave_write(struct kvm_io_device *dev,
+static int picdev_slave_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
gpa_t addr, int len, const void *val)
{
return picdev_write(container_of(dev, struct kvm_pic, dev_slave),
addr, len, val);
}
-static int picdev_slave_read(struct kvm_io_device *dev,
+static int picdev_slave_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
gpa_t addr, int len, void *val)
{
return picdev_read(container_of(dev, struct kvm_pic, dev_slave),
addr, len, val);
}
-static int picdev_eclr_write(struct kvm_io_device *dev,
+static int picdev_eclr_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
gpa_t addr, int len, const void *val)
{
return picdev_write(container_of(dev, struct kvm_pic, dev_eclr),
addr, len, val);
}
-static int picdev_eclr_read(struct kvm_io_device *dev,
+static int picdev_eclr_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
gpa_t addr, int len, void *val)
{
return picdev_read(container_of(dev, struct kvm_pic, dev_eclr),
old_irr = ioapic->irr;
ioapic->irr |= mask;
+ if (edge)
+ ioapic->irr_delivered &= ~mask;
if ((edge && old_irr == ioapic->irr) ||
(!edge && entry.fields.remote_irr)) {
ret = 0;
irqe.shorthand = 0;
if (irqe.trig_mode == IOAPIC_EDGE_TRIG)
- ioapic->irr &= ~(1 << irq);
+ ioapic->irr_delivered |= 1 << irq;
if (irq == RTC_GSI && line_status) {
/*
}
}
-bool kvm_ioapic_handles_vector(struct kvm *kvm, int vector)
-{
- struct kvm_ioapic *ioapic = kvm->arch.vioapic;
- smp_rmb();
- return test_bit(vector, ioapic->handled_vectors);
-}
-
void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
{
struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
(addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
}
-static int ioapic_mmio_read(struct kvm_io_device *this, gpa_t addr, int len,
- void *val)
+static int ioapic_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
+ gpa_t addr, int len, void *val)
{
struct kvm_ioapic *ioapic = to_ioapic(this);
u32 result;
return 0;
}
-static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
- const void *val)
+static int ioapic_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
+ gpa_t addr, int len, const void *val)
{
struct kvm_ioapic *ioapic = to_ioapic(this);
u32 data;
ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
ioapic->ioregsel = 0;
ioapic->irr = 0;
+ ioapic->irr_delivered = 0;
ioapic->id = 0;
memset(ioapic->irq_eoi, 0x00, IOAPIC_NUM_PINS);
rtc_irq_eoi_tracking_reset(ioapic);
spin_lock(&ioapic->lock);
memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
+ state->irr &= ~ioapic->irr_delivered;
spin_unlock(&ioapic->lock);
return 0;
}
spin_lock(&ioapic->lock);
memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
ioapic->irr = 0;
+ ioapic->irr_delivered = 0;
update_handled_vectors(ioapic);
kvm_vcpu_request_scan_ioapic(kvm);
kvm_ioapic_inject_all(ioapic, state->irr);
#include <linux/kvm_host.h>
-#include "iodev.h"
+#include <kvm/iodev.h>
struct kvm;
struct kvm_vcpu;
struct rtc_status rtc_status;
struct delayed_work eoi_inject;
u32 irq_eoi[IOAPIC_NUM_PINS];
+ u32 irr_delivered;
};
#ifdef DEBUG
return kvm->arch.vioapic;
}
+static inline bool kvm_ioapic_handles_vector(struct kvm *kvm, int vector)
+{
+ struct kvm_ioapic *ioapic = kvm->arch.vioapic;
+ smp_rmb();
+ return test_bit(vector, ioapic->handled_vectors);
+}
+
void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu);
bool kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
int short_hand, unsigned int dest, int dest_mode);
int kvm_apic_compare_prio(struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2);
void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector,
int trigger_mode);
-bool kvm_ioapic_handles_vector(struct kvm *kvm, int vector);
int kvm_ioapic_init(struct kvm *kvm);
void kvm_ioapic_destroy(struct kvm *kvm);
int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
#include <linux/kvm_host.h>
#include <linux/spinlock.h>
-#include "iodev.h"
+#include <kvm/iodev.h>
#include "ioapic.h"
#include "lapic.h"
return (kvm_apic_get_reg(apic, APIC_ID) >> 24) & 0xff;
}
+/* The logical map is definitely wrong if we have multiple
+ * modes at the same time. (Physical map is always right.)
+ */
+static inline bool kvm_apic_logical_map_valid(struct kvm_apic_map *map)
+{
+ return !(map->mode & (map->mode - 1));
+}
+
+static inline void
+apic_logical_id(struct kvm_apic_map *map, u32 dest_id, u16 *cid, u16 *lid)
+{
+ unsigned lid_bits;
+
+ BUILD_BUG_ON(KVM_APIC_MODE_XAPIC_CLUSTER != 4);
+ BUILD_BUG_ON(KVM_APIC_MODE_XAPIC_FLAT != 8);
+ BUILD_BUG_ON(KVM_APIC_MODE_X2APIC != 16);
+ lid_bits = map->mode;
+
+ *cid = dest_id >> lid_bits;
+ *lid = dest_id & ((1 << lid_bits) - 1);
+}
+
static void recalculate_apic_map(struct kvm *kvm)
{
struct kvm_apic_map *new, *old = NULL;
if (!new)
goto out;
- new->ldr_bits = 8;
- /* flat mode is default */
- new->cid_shift = 8;
- new->cid_mask = 0;
- new->lid_mask = 0xff;
- new->broadcast = APIC_BROADCAST;
-
- kvm_for_each_vcpu(i, vcpu, kvm) {
- struct kvm_lapic *apic = vcpu->arch.apic;
-
- if (!kvm_apic_present(vcpu))
- continue;
-
- if (apic_x2apic_mode(apic)) {
- new->ldr_bits = 32;
- new->cid_shift = 16;
- new->cid_mask = new->lid_mask = 0xffff;
- new->broadcast = X2APIC_BROADCAST;
- } else if (kvm_apic_get_reg(apic, APIC_LDR)) {
- if (kvm_apic_get_reg(apic, APIC_DFR) ==
- APIC_DFR_CLUSTER) {
- new->cid_shift = 4;
- new->cid_mask = 0xf;
- new->lid_mask = 0xf;
- } else {
- new->cid_shift = 8;
- new->cid_mask = 0;
- new->lid_mask = 0xff;
- }
- }
-
- /*
- * All APICs have to be configured in the same mode by an OS.
- * We take advatage of this while building logical id loockup
- * table. After reset APICs are in software disabled mode, so if
- * we find apic with different setting we assume this is the mode
- * OS wants all apics to be in; build lookup table accordingly.
- */
- if (kvm_apic_sw_enabled(apic))
- break;
- }
-
kvm_for_each_vcpu(i, vcpu, kvm) {
struct kvm_lapic *apic = vcpu->arch.apic;
u16 cid, lid;
aid = kvm_apic_id(apic);
ldr = kvm_apic_get_reg(apic, APIC_LDR);
- cid = apic_cluster_id(new, ldr);
- lid = apic_logical_id(new, ldr);
if (aid < ARRAY_SIZE(new->phys_map))
new->phys_map[aid] = apic;
+
+ if (apic_x2apic_mode(apic)) {
+ new->mode |= KVM_APIC_MODE_X2APIC;
+ } else if (ldr) {
+ ldr = GET_APIC_LOGICAL_ID(ldr);
+ if (kvm_apic_get_reg(apic, APIC_DFR) == APIC_DFR_FLAT)
+ new->mode |= KVM_APIC_MODE_XAPIC_FLAT;
+ else
+ new->mode |= KVM_APIC_MODE_XAPIC_CLUSTER;
+ }
+
+ if (!kvm_apic_logical_map_valid(new))
+ continue;
+
+ apic_logical_id(new, ldr, &cid, &lid);
+
if (lid && cid < ARRAY_SIZE(new->logical_map))
new->logical_map[cid][ffs(lid) - 1] = apic;
}
apic_update_ppr(apic);
}
-static bool kvm_apic_broadcast(struct kvm_lapic *apic, u32 dest)
+static bool kvm_apic_broadcast(struct kvm_lapic *apic, u32 mda)
{
- return dest == (apic_x2apic_mode(apic) ?
- X2APIC_BROADCAST : APIC_BROADCAST);
+ if (apic_x2apic_mode(apic))
+ return mda == X2APIC_BROADCAST;
+
+ return GET_APIC_DEST_FIELD(mda) == APIC_BROADCAST;
}
-static bool kvm_apic_match_physical_addr(struct kvm_lapic *apic, u32 dest)
+static bool kvm_apic_match_physical_addr(struct kvm_lapic *apic, u32 mda)
{
- return kvm_apic_id(apic) == dest || kvm_apic_broadcast(apic, dest);
+ if (kvm_apic_broadcast(apic, mda))
+ return true;
+
+ if (apic_x2apic_mode(apic))
+ return mda == kvm_apic_id(apic);
+
+ return mda == SET_APIC_DEST_FIELD(kvm_apic_id(apic));
}
static bool kvm_apic_match_logical_addr(struct kvm_lapic *apic, u32 mda)
&& (logical_id & mda & 0xffff) != 0;
logical_id = GET_APIC_LOGICAL_ID(logical_id);
+ mda = GET_APIC_DEST_FIELD(mda);
switch (kvm_apic_get_reg(apic, APIC_DFR)) {
case APIC_DFR_FLAT:
}
}
+/* KVM APIC implementation has two quirks
+ * - dest always begins at 0 while xAPIC MDA has offset 24,
+ * - IOxAPIC messages have to be delivered (directly) to x2APIC.
+ */
+static u32 kvm_apic_mda(unsigned int dest_id, struct kvm_lapic *source,
+ struct kvm_lapic *target)
+{
+ bool ipi = source != NULL;
+ bool x2apic_mda = apic_x2apic_mode(ipi ? source : target);
+
+ if (!ipi && dest_id == APIC_BROADCAST && x2apic_mda)
+ return X2APIC_BROADCAST;
+
+ return x2apic_mda ? dest_id : SET_APIC_DEST_FIELD(dest_id);
+}
+
bool kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
int short_hand, unsigned int dest, int dest_mode)
{
struct kvm_lapic *target = vcpu->arch.apic;
+ u32 mda = kvm_apic_mda(dest, source, target);
apic_debug("target %p, source %p, dest 0x%x, "
"dest_mode 0x%x, short_hand 0x%x\n",
switch (short_hand) {
case APIC_DEST_NOSHORT:
if (dest_mode == APIC_DEST_PHYSICAL)
- return kvm_apic_match_physical_addr(target, dest);
+ return kvm_apic_match_physical_addr(target, mda);
else
- return kvm_apic_match_logical_addr(target, dest);
+ return kvm_apic_match_logical_addr(target, mda);
case APIC_DEST_SELF:
return target == source;
case APIC_DEST_ALLINC:
struct kvm_lapic **dst;
int i;
bool ret = false;
+ bool x2apic_ipi = src && apic_x2apic_mode(src);
*r = -1;
if (irq->shorthand)
return false;
+ if (irq->dest_id == (x2apic_ipi ? X2APIC_BROADCAST : APIC_BROADCAST))
+ return false;
+
rcu_read_lock();
map = rcu_dereference(kvm->arch.apic_map);
if (!map)
goto out;
- if (irq->dest_id == map->broadcast)
- goto out;
-
ret = true;
if (irq->dest_mode == APIC_DEST_PHYSICAL) {
dst = &map->phys_map[irq->dest_id];
} else {
- u32 mda = irq->dest_id << (32 - map->ldr_bits);
- u16 cid = apic_cluster_id(map, mda);
+ u16 cid;
+
+ if (!kvm_apic_logical_map_valid(map)) {
+ ret = false;
+ goto out;
+ }
+
+ apic_logical_id(map, irq->dest_id, &cid, (u16 *)&bitmap);
if (cid >= ARRAY_SIZE(map->logical_map))
goto out;
dst = map->logical_map[cid];
- bitmap = apic_logical_id(map, mda);
-
if (irq->delivery_mode == APIC_DM_LOWEST) {
int l = -1;
for_each_set_bit(i, &bitmap, 16) {
addr < apic->base_address + LAPIC_MMIO_LENGTH;
}
-static int apic_mmio_read(struct kvm_io_device *this,
+static int apic_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
gpa_t address, int len, void *data)
{
struct kvm_lapic *apic = to_lapic(this);
return ret;
}
-static int apic_mmio_write(struct kvm_io_device *this,
+static int apic_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
gpa_t address, int len, const void *data)
{
struct kvm_lapic *apic = to_lapic(this);
return;
}
- if (!kvm_vcpu_is_bsp(apic->vcpu))
- value &= ~MSR_IA32_APICBASE_BSP;
vcpu->arch.apic_base = value;
/* update jump label if enable bit changes */
#ifndef __KVM_X86_LAPIC_H
#define __KVM_X86_LAPIC_H
-#include "iodev.h"
+#include <kvm/iodev.h>
#include <linux/kvm_host.h>
return kvm_x86_ops->vm_has_apicv(kvm);
}
-static inline u16 apic_cluster_id(struct kvm_apic_map *map, u32 ldr)
-{
- u16 cid;
- ldr >>= 32 - map->ldr_bits;
- cid = (ldr >> map->cid_shift) & map->cid_mask;
-
- return cid;
-}
-
-static inline u16 apic_logical_id(struct kvm_apic_map *map, u32 ldr)
-{
- ldr >>= (32 - map->ldr_bits);
- return ldr & map->lid_mask;
-}
-
static inline bool kvm_apic_has_events(struct kvm_vcpu *vcpu)
{
return vcpu->arch.apic->pending_events;
kvm_flush_remote_tlbs(kvm);
}
+static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm,
+ unsigned long *rmapp)
+{
+ u64 *sptep;
+ struct rmap_iterator iter;
+ int need_tlb_flush = 0;
+ pfn_t pfn;
+ struct kvm_mmu_page *sp;
+
+ for (sptep = rmap_get_first(*rmapp, &iter); sptep;) {
+ BUG_ON(!(*sptep & PT_PRESENT_MASK));
+
+ sp = page_header(__pa(sptep));
+ pfn = spte_to_pfn(*sptep);
+
+ /*
+ * Only EPT supported for now; otherwise, one would need to
+ * find out efficiently whether the guest page tables are
+ * also using huge pages.
+ */
+ if (sp->role.direct &&
+ !kvm_is_reserved_pfn(pfn) &&
+ PageTransCompound(pfn_to_page(pfn))) {
+ drop_spte(kvm, sptep);
+ sptep = rmap_get_first(*rmapp, &iter);
+ need_tlb_flush = 1;
+ } else
+ sptep = rmap_get_next(&iter);
+ }
+
+ return need_tlb_flush;
+}
+
+void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
+ struct kvm_memory_slot *memslot)
+{
+ bool flush = false;
+ unsigned long *rmapp;
+ unsigned long last_index, index;
+ gfn_t gfn_start, gfn_end;
+
+ spin_lock(&kvm->mmu_lock);
+
+ gfn_start = memslot->base_gfn;
+ gfn_end = memslot->base_gfn + memslot->npages - 1;
+
+ if (gfn_start >= gfn_end)
+ goto out;
+
+ rmapp = memslot->arch.rmap[0];
+ last_index = gfn_to_index(gfn_end, memslot->base_gfn,
+ PT_PAGE_TABLE_LEVEL);
+
+ for (index = 0; index <= last_index; ++index, ++rmapp) {
+ if (*rmapp)
+ flush |= kvm_mmu_zap_collapsible_spte(kvm, rmapp);
+
+ if (need_resched() || spin_needbreak(&kvm->mmu_lock)) {
+ if (flush) {
+ kvm_flush_remote_tlbs(kvm);
+ flush = false;
+ }
+ cond_resched_lock(&kvm->mmu_lock);
+ }
+ }
+
+ if (flush)
+ kvm_flush_remote_tlbs(kvm);
+
+out:
+ spin_unlock(&kvm->mmu_lock);
+}
+
void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
struct kvm_memory_slot *memslot)
{
};
/* mapping between fixed pmc index and arch_events array */
-int fixed_pmc_events[] = {1, 0, 7};
+static int fixed_pmc_events[] = {1, 0, 7};
static bool pmc_is_gp(struct kvm_pmc *pmc)
{
svm->vcpu.arch.apic_base = APIC_DEFAULT_PHYS_BASE |
MSR_IA32_APICBASE_ENABLE;
- if (kvm_vcpu_is_bsp(&svm->vcpu))
+ if (kvm_vcpu_is_reset_bsp(&svm->vcpu))
svm->vcpu.arch.apic_base |= MSR_IA32_APICBASE_BSP;
svm_init_osvw(&svm->vcpu);
static int halt_interception(struct vcpu_svm *svm)
{
svm->next_rip = kvm_rip_read(&svm->vcpu) + 1;
- skip_emulated_instruction(&svm->vcpu);
return kvm_emulate_halt(&svm->vcpu);
}
static int vmmcall_interception(struct vcpu_svm *svm)
{
svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
- skip_emulated_instruction(&svm->vcpu);
kvm_emulate_hypercall(&svm->vcpu);
return 1;
}
{
struct kvm_vcpu *vcpu = &svm->vcpu;
- trace_kvm_invlpga(svm->vmcb->save.rip, vcpu->arch.regs[VCPU_REGS_RCX],
- vcpu->arch.regs[VCPU_REGS_RAX]);
+ trace_kvm_invlpga(svm->vmcb->save.rip, kvm_register_read(&svm->vcpu, VCPU_REGS_RCX),
+ kvm_register_read(&svm->vcpu, VCPU_REGS_RAX));
/* Let's treat INVLPGA the same as INVLPG (can be optimized!) */
- kvm_mmu_invlpg(vcpu, vcpu->arch.regs[VCPU_REGS_RAX]);
+ kvm_mmu_invlpg(vcpu, kvm_register_read(&svm->vcpu, VCPU_REGS_RAX));
svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
skip_emulated_instruction(&svm->vcpu);
static int skinit_interception(struct vcpu_svm *svm)
{
- trace_kvm_skinit(svm->vmcb->save.rip, svm->vcpu.arch.regs[VCPU_REGS_RAX]);
+ trace_kvm_skinit(svm->vmcb->save.rip, kvm_register_read(&svm->vcpu, VCPU_REGS_RAX));
kvm_queue_exception(&svm->vcpu, UD_VECTOR);
return 1;
}
+static int wbinvd_interception(struct vcpu_svm *svm)
+{
+ kvm_emulate_wbinvd(&svm->vcpu);
+ return 1;
+}
+
static int xsetbv_interception(struct vcpu_svm *svm)
{
u64 new_bv = kvm_read_edx_eax(&svm->vcpu);
return 1;
}
-bool check_selective_cr0_intercepted(struct vcpu_svm *svm, unsigned long val)
+static bool check_selective_cr0_intercepted(struct vcpu_svm *svm,
+ unsigned long val)
{
unsigned long cr0 = svm->vcpu.arch.cr0;
bool ret = false;
return emulate_on_interception(svm);
reg = svm->vmcb->control.exit_info_1 & SVM_EXITINFO_REG_MASK;
- cr = svm->vmcb->control.exit_code - SVM_EXIT_READ_CR0;
+ if (svm->vmcb->control.exit_code == SVM_EXIT_CR0_SEL_WRITE)
+ cr = SVM_EXIT_WRITE_CR0 - SVM_EXIT_READ_CR0;
+ else
+ cr = svm->vmcb->control.exit_code - SVM_EXIT_READ_CR0;
err = 0;
if (cr >= 16) { /* mov to cr */
static int rdmsr_interception(struct vcpu_svm *svm)
{
- u32 ecx = svm->vcpu.arch.regs[VCPU_REGS_RCX];
+ u32 ecx = kvm_register_read(&svm->vcpu, VCPU_REGS_RCX);
u64 data;
if (svm_get_msr(&svm->vcpu, ecx, &data)) {
} else {
trace_kvm_msr_read(ecx, data);
- svm->vcpu.arch.regs[VCPU_REGS_RAX] = data & 0xffffffff;
- svm->vcpu.arch.regs[VCPU_REGS_RDX] = data >> 32;
+ kvm_register_write(&svm->vcpu, VCPU_REGS_RAX, data & 0xffffffff);
+ kvm_register_write(&svm->vcpu, VCPU_REGS_RDX, data >> 32);
svm->next_rip = kvm_rip_read(&svm->vcpu) + 2;
skip_emulated_instruction(&svm->vcpu);
}
static int wrmsr_interception(struct vcpu_svm *svm)
{
struct msr_data msr;
- u32 ecx = svm->vcpu.arch.regs[VCPU_REGS_RCX];
- u64 data = (svm->vcpu.arch.regs[VCPU_REGS_RAX] & -1u)
- | ((u64)(svm->vcpu.arch.regs[VCPU_REGS_RDX] & -1u) << 32);
+ u32 ecx = kvm_register_read(&svm->vcpu, VCPU_REGS_RCX);
+ u64 data = kvm_read_edx_eax(&svm->vcpu);
msr.data = data;
msr.index = ecx;
[SVM_EXIT_READ_CR3] = cr_interception,
[SVM_EXIT_READ_CR4] = cr_interception,
[SVM_EXIT_READ_CR8] = cr_interception,
- [SVM_EXIT_CR0_SEL_WRITE] = emulate_on_interception,
+ [SVM_EXIT_CR0_SEL_WRITE] = cr_interception,
[SVM_EXIT_WRITE_CR0] = cr_interception,
[SVM_EXIT_WRITE_CR3] = cr_interception,
[SVM_EXIT_WRITE_CR4] = cr_interception,
[SVM_EXIT_STGI] = stgi_interception,
[SVM_EXIT_CLGI] = clgi_interception,
[SVM_EXIT_SKINIT] = skinit_interception,
- [SVM_EXIT_WBINVD] = emulate_on_interception,
+ [SVM_EXIT_WBINVD] = wbinvd_interception,
[SVM_EXIT_MONITOR] = monitor_interception,
[SVM_EXIT_MWAIT] = mwait_interception,
[SVM_EXIT_XSETBV] = xsetbv_interception,
if (exit_code >= ARRAY_SIZE(svm_exit_handlers)
|| !svm_exit_handlers[exit_code]) {
- WARN_ONCE(1, "vmx: unexpected exit reason 0x%x\n", exit_code);
+ WARN_ONCE(1, "svm: unexpected exit reason 0x%x\n", exit_code);
kvm_queue_exception(vcpu, UD_VECTOR);
return 1;
}
vmx->nested.nested_vmx_secondary_ctls_low = 0;
vmx->nested.nested_vmx_secondary_ctls_high &=
SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES |
+ SECONDARY_EXEC_RDTSCP |
SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE |
SECONDARY_EXEC_APIC_REGISTER_VIRT |
SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY |
* default value.
*/
if (seg == VCPU_SREG_CS || seg == VCPU_SREG_SS)
- save->selector &= ~SELECTOR_RPL_MASK;
- save->dpl = save->selector & SELECTOR_RPL_MASK;
+ save->selector &= ~SEGMENT_RPL_MASK;
+ save->dpl = save->selector & SEGMENT_RPL_MASK;
save->s = 1;
}
vmx_set_segment(vcpu, save, seg);
unsigned int cs_rpl;
vmx_get_segment(vcpu, &cs, VCPU_SREG_CS);
- cs_rpl = cs.selector & SELECTOR_RPL_MASK;
+ cs_rpl = cs.selector & SEGMENT_RPL_MASK;
if (cs.unusable)
return false;
unsigned int ss_rpl;
vmx_get_segment(vcpu, &ss, VCPU_SREG_SS);
- ss_rpl = ss.selector & SELECTOR_RPL_MASK;
+ ss_rpl = ss.selector & SEGMENT_RPL_MASK;
if (ss.unusable)
return true;
unsigned int rpl;
vmx_get_segment(vcpu, &var, seg);
- rpl = var.selector & SELECTOR_RPL_MASK;
+ rpl = var.selector & SEGMENT_RPL_MASK;
if (var.unusable)
return true;
if (tr.unusable)
return false;
- if (tr.selector & SELECTOR_TI_MASK) /* TI = 1 */
+ if (tr.selector & SEGMENT_TI_MASK) /* TI = 1 */
return false;
if (tr.type != 3 && tr.type != 11) /* TODO: Check if guest is in IA32e mode */
return false;
if (ldtr.unusable)
return true;
- if (ldtr.selector & SELECTOR_TI_MASK) /* TI = 1 */
+ if (ldtr.selector & SEGMENT_TI_MASK) /* TI = 1 */
return false;
if (ldtr.type != 2)
return false;
vmx_get_segment(vcpu, &cs, VCPU_SREG_CS);
vmx_get_segment(vcpu, &ss, VCPU_SREG_SS);
- return ((cs.selector & SELECTOR_RPL_MASK) ==
- (ss.selector & SELECTOR_RPL_MASK));
+ return ((cs.selector & SEGMENT_RPL_MASK) ==
+ (ss.selector & SEGMENT_RPL_MASK));
}
/*
vmx->vcpu.arch.regs[VCPU_REGS_RDX] = get_rdx_init_val();
kvm_set_cr8(&vmx->vcpu, 0);
apic_base_msr.data = APIC_DEFAULT_PHYS_BASE | MSR_IA32_APICBASE_ENABLE;
- if (kvm_vcpu_is_bsp(&vmx->vcpu))
+ if (kvm_vcpu_is_reset_bsp(&vmx->vcpu))
apic_base_msr.data |= MSR_IA32_APICBASE_BSP;
apic_base_msr.host_initiated = true;
kvm_set_apic_base(&vmx->vcpu, &apic_base_msr);
if (emulate_instruction(vcpu, 0) == EMULATE_DONE) {
if (vcpu->arch.halt_request) {
vcpu->arch.halt_request = 0;
- return kvm_emulate_halt(vcpu);
+ return kvm_vcpu_halt(vcpu);
}
return 1;
}
}
if (is_invalid_opcode(intr_info)) {
+ if (is_guest_mode(vcpu)) {
+ kvm_queue_exception(vcpu, UD_VECTOR);
+ return 1;
+ }
er = emulate_instruction(vcpu, EMULTYPE_TRAP_UD);
if (er != EMULATE_DONE)
kvm_queue_exception(vcpu, UD_VECTOR);
!(is_page_fault(intr_info) && !(error_code & PFERR_RSVD_MASK))) {
vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_SIMUL_EX;
- vcpu->run->internal.ndata = 2;
+ vcpu->run->internal.ndata = 3;
vcpu->run->internal.data[0] = vect_info;
vcpu->run->internal.data[1] = intr_info;
+ vcpu->run->internal.data[2] = error_code;
return 0;
}
static int handle_halt(struct kvm_vcpu *vcpu)
{
- skip_emulated_instruction(vcpu);
return kvm_emulate_halt(vcpu);
}
static int handle_vmcall(struct kvm_vcpu *vcpu)
{
- skip_emulated_instruction(vcpu);
kvm_emulate_hypercall(vcpu);
return 1;
}
static int handle_wbinvd(struct kvm_vcpu *vcpu)
{
- skip_emulated_instruction(vcpu);
kvm_emulate_wbinvd(vcpu);
return 1;
}
gpa_t gpa;
gpa = vmcs_read64(GUEST_PHYSICAL_ADDRESS);
- if (!kvm_io_bus_write(vcpu->kvm, KVM_FAST_MMIO_BUS, gpa, 0, NULL)) {
+ if (!kvm_io_bus_write(vcpu, KVM_FAST_MMIO_BUS, gpa, 0, NULL)) {
skip_emulated_instruction(vcpu);
return 1;
}
if (vcpu->arch.halt_request) {
vcpu->arch.halt_request = 0;
- ret = kvm_emulate_halt(vcpu);
+ ret = kvm_vcpu_halt(vcpu);
goto out;
}
else if (port < 0x10000)
bitmap = vmcs12->io_bitmap_b;
else
- return 1;
+ return true;
bitmap += (port & 0x7fff) / 8;
if (last_bitmap != bitmap)
if (kvm_read_guest(vcpu->kvm, bitmap, &b, 1))
- return 1;
+ return true;
if (b & (1 << (port & 7)))
- return 1;
+ return true;
port++;
size--;
last_bitmap = bitmap;
}
- return 0;
+ return false;
}
/*
gpa_t bitmap;
if (!nested_cpu_has(vmcs12, CPU_BASED_USE_MSR_BITMAPS))
- return 1;
+ return true;
/*
* The MSR_BITMAP page is divided into four 1024-byte bitmaps,
if (msr_index < 1024*8) {
unsigned char b;
if (kvm_read_guest(vcpu->kvm, bitmap + msr_index/8, &b, 1))
- return 1;
+ return true;
return 1 & (b >> (msr_index & 7));
} else
- return 1; /* let L1 handle the wrong parameter */
+ return true; /* let L1 handle the wrong parameter */
}
/*
case 0:
if (vmcs12->cr0_guest_host_mask &
(val ^ vmcs12->cr0_read_shadow))
- return 1;
+ return true;
break;
case 3:
if ((vmcs12->cr3_target_count >= 1 &&
vmcs12->cr3_target_value2 == val) ||
(vmcs12->cr3_target_count >= 4 &&
vmcs12->cr3_target_value3 == val))
- return 0;
+ return false;
if (nested_cpu_has(vmcs12, CPU_BASED_CR3_LOAD_EXITING))
- return 1;
+ return true;
break;
case 4:
if (vmcs12->cr4_guest_host_mask &
(vmcs12->cr4_read_shadow ^ val))
- return 1;
+ return true;
break;
case 8:
if (nested_cpu_has(vmcs12, CPU_BASED_CR8_LOAD_EXITING))
- return 1;
+ return true;
break;
}
break;
case 2: /* clts */
if ((vmcs12->cr0_guest_host_mask & X86_CR0_TS) &&
(vmcs12->cr0_read_shadow & X86_CR0_TS))
- return 1;
+ return true;
break;
case 1: /* mov from cr */
switch (cr) {
case 3:
if (vmcs12->cpu_based_vm_exec_control &
CPU_BASED_CR3_STORE_EXITING)
- return 1;
+ return true;
break;
case 8:
if (vmcs12->cpu_based_vm_exec_control &
CPU_BASED_CR8_STORE_EXITING)
- return 1;
+ return true;
break;
}
break;
*/
if (vmcs12->cr0_guest_host_mask & 0xe &
(val ^ vmcs12->cr0_read_shadow))
- return 1;
+ return true;
if ((vmcs12->cr0_guest_host_mask & 0x1) &&
!(vmcs12->cr0_read_shadow & 0x1) &&
(val & 0x1))
- return 1;
+ return true;
break;
}
- return 0;
+ return false;
}
/*
KVM_ISA_VMX);
if (vmx->nested.nested_run_pending)
- return 0;
+ return false;
if (unlikely(vmx->fail)) {
pr_info_ratelimited("%s failed vm entry %x\n", __func__,
vmcs_read32(VM_INSTRUCTION_ERROR));
- return 1;
+ return true;
}
switch (exit_reason) {
case EXIT_REASON_EXCEPTION_NMI:
if (!is_exception(intr_info))
- return 0;
+ return false;
else if (is_page_fault(intr_info))
return enable_ept;
else if (is_no_device(intr_info) &&
!(vmcs12->guest_cr0 & X86_CR0_TS))
- return 0;
+ return false;
return vmcs12->exception_bitmap &
(1u << (intr_info & INTR_INFO_VECTOR_MASK));
case EXIT_REASON_EXTERNAL_INTERRUPT:
- return 0;
+ return false;
case EXIT_REASON_TRIPLE_FAULT:
- return 1;
+ return true;
case EXIT_REASON_PENDING_INTERRUPT:
return nested_cpu_has(vmcs12, CPU_BASED_VIRTUAL_INTR_PENDING);
case EXIT_REASON_NMI_WINDOW:
return nested_cpu_has(vmcs12, CPU_BASED_VIRTUAL_NMI_PENDING);
case EXIT_REASON_TASK_SWITCH:
- return 1;
+ return true;
case EXIT_REASON_CPUID:
if (kvm_register_read(vcpu, VCPU_REGS_RAX) == 0xa)
- return 0;
- return 1;
+ return false;
+ return true;
case EXIT_REASON_HLT:
return nested_cpu_has(vmcs12, CPU_BASED_HLT_EXITING);
case EXIT_REASON_INVD:
- return 1;
+ return true;
case EXIT_REASON_INVLPG:
return nested_cpu_has(vmcs12, CPU_BASED_INVLPG_EXITING);
case EXIT_REASON_RDPMC:
return nested_cpu_has(vmcs12, CPU_BASED_RDPMC_EXITING);
- case EXIT_REASON_RDTSC:
+ case EXIT_REASON_RDTSC: case EXIT_REASON_RDTSCP:
return nested_cpu_has(vmcs12, CPU_BASED_RDTSC_EXITING);
case EXIT_REASON_VMCALL: case EXIT_REASON_VMCLEAR:
case EXIT_REASON_VMLAUNCH: case EXIT_REASON_VMPTRLD:
* VMX instructions trap unconditionally. This allows L1 to
* emulate them for its L2 guest, i.e., allows 3-level nesting!
*/
- return 1;
+ return true;
case EXIT_REASON_CR_ACCESS:
return nested_vmx_exit_handled_cr(vcpu, vmcs12);
case EXIT_REASON_DR_ACCESS:
case EXIT_REASON_MSR_WRITE:
return nested_vmx_exit_handled_msr(vcpu, vmcs12, exit_reason);
case EXIT_REASON_INVALID_STATE:
- return 1;
+ return true;
case EXIT_REASON_MWAIT_INSTRUCTION:
return nested_cpu_has(vmcs12, CPU_BASED_MWAIT_EXITING);
case EXIT_REASON_MONITOR_INSTRUCTION:
nested_cpu_has2(vmcs12,
SECONDARY_EXEC_PAUSE_LOOP_EXITING);
case EXIT_REASON_MCE_DURING_VMENTRY:
- return 0;
+ return false;
case EXIT_REASON_TPR_BELOW_THRESHOLD:
return nested_cpu_has(vmcs12, CPU_BASED_TPR_SHADOW);
case EXIT_REASON_APIC_ACCESS:
case EXIT_REASON_APIC_WRITE:
case EXIT_REASON_EOI_INDUCED:
/* apic_write and eoi_induced should exit unconditionally. */
- return 1;
+ return true;
case EXIT_REASON_EPT_VIOLATION:
/*
* L0 always deals with the EPT violation. If nested EPT is
* missing in the guest EPT table (EPT12), the EPT violation
* will be injected with nested_ept_inject_page_fault()
*/
- return 0;
+ return false;
case EXIT_REASON_EPT_MISCONFIG:
/*
* L2 never uses directly L1's EPT, but rather L0's own EPT
* (EPT on EPT). So any problems with the structure of the
* table is L0's fault.
*/
- return 0;
+ return false;
case EXIT_REASON_WBINVD:
return nested_cpu_has2(vmcs12, SECONDARY_EXEC_WBINVD_EXITING);
case EXIT_REASON_XSETBV:
- return 1;
+ return true;
case EXIT_REASON_XSAVES: case EXIT_REASON_XRSTORS:
/*
* This should never happen, since it is not possible to
*/
return nested_cpu_has2(vmcs12, SECONDARY_EXEC_XSAVES);
default:
- return 1;
+ return true;
}
}
exec_control);
}
}
+ if (nested && !vmx->rdtscp_enabled)
+ vmx->nested.nested_vmx_secondary_ctls_high &=
+ ~SECONDARY_EXEC_RDTSCP;
}
/* Exposing INVPCID only when PCID is exposed */
struct vmcs12 *vmcs12)
{
struct vcpu_vmx *vmx = to_vmx(vcpu);
+ int maxphyaddr = cpuid_maxphyaddr(vcpu);
if (nested_cpu_has2(vmcs12, SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES)) {
- /* TODO: Also verify bits beyond physical address width are 0 */
- if (!PAGE_ALIGNED(vmcs12->apic_access_addr))
+ if (!PAGE_ALIGNED(vmcs12->apic_access_addr) ||
+ vmcs12->apic_access_addr >> maxphyaddr)
return false;
/*
}
if (nested_cpu_has(vmcs12, CPU_BASED_TPR_SHADOW)) {
- /* TODO: Also verify bits beyond physical address width are 0 */
- if (!PAGE_ALIGNED(vmcs12->virtual_apic_page_addr))
+ if (!PAGE_ALIGNED(vmcs12->virtual_apic_page_addr) ||
+ vmcs12->virtual_apic_page_addr >> maxphyaddr)
return false;
if (vmx->nested.virtual_apic_page) /* shouldn't happen */
}
if (nested_cpu_has_posted_intr(vmcs12)) {
- if (!IS_ALIGNED(vmcs12->posted_intr_desc_addr, 64))
+ if (!IS_ALIGNED(vmcs12->posted_intr_desc_addr, 64) ||
+ vmcs12->posted_intr_desc_addr >> maxphyaddr)
return false;
if (vmx->nested.pi_desc_page) { /* shouldn't happen */
static int nested_vmx_check_msr_switch(struct kvm_vcpu *vcpu,
unsigned long count_field,
- unsigned long addr_field,
- int maxphyaddr)
+ unsigned long addr_field)
{
+ int maxphyaddr;
u64 count, addr;
if (vmcs12_read_any(vcpu, count_field, &count) ||
}
if (count == 0)
return 0;
+ maxphyaddr = cpuid_maxphyaddr(vcpu);
if (!IS_ALIGNED(addr, 16) || addr >> maxphyaddr ||
(addr + count * sizeof(struct vmx_msr_entry) - 1) >> maxphyaddr) {
pr_warn_ratelimited(
static int nested_vmx_check_msr_switch_controls(struct kvm_vcpu *vcpu,
struct vmcs12 *vmcs12)
{
- int maxphyaddr;
-
if (vmcs12->vm_exit_msr_load_count == 0 &&
vmcs12->vm_exit_msr_store_count == 0 &&
vmcs12->vm_entry_msr_load_count == 0)
return 0; /* Fast path */
- maxphyaddr = cpuid_maxphyaddr(vcpu);
if (nested_vmx_check_msr_switch(vcpu, VM_EXIT_MSR_LOAD_COUNT,
- VM_EXIT_MSR_LOAD_ADDR, maxphyaddr) ||
+ VM_EXIT_MSR_LOAD_ADDR) ||
nested_vmx_check_msr_switch(vcpu, VM_EXIT_MSR_STORE_COUNT,
- VM_EXIT_MSR_STORE_ADDR, maxphyaddr) ||
+ VM_EXIT_MSR_STORE_ADDR) ||
nested_vmx_check_msr_switch(vcpu, VM_ENTRY_MSR_LOAD_COUNT,
- VM_ENTRY_MSR_LOAD_ADDR, maxphyaddr))
+ VM_ENTRY_MSR_LOAD_ADDR))
return -EINVAL;
return 0;
}
exec_control &= ~SECONDARY_EXEC_RDTSCP;
/* Take the following fields only from vmcs12 */
exec_control &= ~(SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES |
+ SECONDARY_EXEC_RDTSCP |
SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY |
- SECONDARY_EXEC_APIC_REGISTER_VIRT);
+ SECONDARY_EXEC_APIC_REGISTER_VIRT);
if (nested_cpu_has(vmcs12,
CPU_BASED_ACTIVATE_SECONDARY_CONTROLS))
exec_control |= vmcs12->secondary_vm_exec_control;
}
if (!nested_get_vmcs12_pages(vcpu, vmcs12)) {
- /*TODO: Also verify bits beyond physical address width are 0*/
nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
return 1;
}
vmcs12->launch_state = 1;
if (vmcs12->guest_activity_state == GUEST_ACTIVITY_HLT)
- return kvm_emulate_halt(vcpu);
+ return kvm_vcpu_halt(vcpu);
vmx->nested.nested_run_pending = 1;
}
EXPORT_SYMBOL_GPL(kvm_get_cr8);
+static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
+{
+ int i;
+
+ if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
+ for (i = 0; i < KVM_NR_DB_REGS; i++)
+ vcpu->arch.eff_db[i] = vcpu->arch.db[i];
+ vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
+ }
+}
+
static void kvm_update_dr6(struct kvm_vcpu *vcpu)
{
if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
u64 boot_ns;
- boot_ns = ktime_to_ns(ktime_add(tk->tkr.base_mono, tk->offs_boot));
+ boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
write_seqcount_begin(&vdata->seq);
/* copy pvclock gtod data */
- vdata->clock.vclock_mode = tk->tkr.clock->archdata.vclock_mode;
- vdata->clock.cycle_last = tk->tkr.cycle_last;
- vdata->clock.mask = tk->tkr.mask;
- vdata->clock.mult = tk->tkr.mult;
- vdata->clock.shift = tk->tkr.shift;
+ vdata->clock.vclock_mode = tk->tkr_mono.clock->archdata.vclock_mode;
+ vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
+ vdata->clock.mask = tk->tkr_mono.mask;
+ vdata->clock.mult = tk->tkr_mono.mult;
+ vdata->clock.shift = tk->tkr_mono.shift;
vdata->boot_ns = boot_ns;
- vdata->nsec_base = tk->tkr.xtime_nsec;
+ vdata->nsec_base = tk->tkr_mono.xtime_nsec;
write_seqcount_end(&vdata->seq);
}
return -EINVAL;
memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
+ kvm_update_dr0123(vcpu);
vcpu->arch.dr6 = dbgregs->dr6;
kvm_update_dr6(vcpu);
vcpu->arch.dr7 = dbgregs->dr7;
do {
n = min(len, 8);
if (!(vcpu->arch.apic &&
- !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
- && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
+ !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
+ && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
break;
handled += n;
addr += n;
do {
n = min(len, 8);
if (!(vcpu->arch.apic &&
- !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
- && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
+ !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
+ addr, n, v))
+ && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
break;
trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
handled += n;
return X86EMUL_CONTINUE;
}
-int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
+static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
+ unsigned long addr,
void *val, unsigned int bytes,
struct x86_exception *exception,
const struct read_write_emulator_ops *ops)
exception, &read_emultor);
}
-int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
+static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
unsigned long addr,
const void *val,
unsigned int bytes,
int r;
if (vcpu->arch.pio.in)
- r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
+ r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
vcpu->arch.pio.size, pd);
else
- r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
+ r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
vcpu->arch.pio.port, vcpu->arch.pio.size,
pd);
return r;
kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
}
-int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
+int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
{
if (!need_emulate_wbinvd(vcpu))
return X86EMUL_CONTINUE;
wbinvd();
return X86EMUL_CONTINUE;
}
+
+int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
+{
+ kvm_x86_ops->skip_emulated_instruction(vcpu);
+ return kvm_emulate_wbinvd_noskip(vcpu);
+}
EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
+
+
static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
{
- kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
+ kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
}
-int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
+static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
+ unsigned long *dest)
{
return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
}
-int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
+static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
+ unsigned long value)
{
return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
free_percpu(shared_msrs);
}
-int kvm_emulate_halt(struct kvm_vcpu *vcpu)
+int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
{
++vcpu->stat.halt_exits;
if (irqchip_in_kernel(vcpu->kvm)) {
return 0;
}
}
+EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
+
+int kvm_emulate_halt(struct kvm_vcpu *vcpu)
+{
+ kvm_x86_ops->skip_emulated_instruction(vcpu);
+ return kvm_vcpu_halt(vcpu);
+}
EXPORT_SYMBOL_GPL(kvm_emulate_halt);
int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
lapic_irq.dest_id = apicid;
lapic_irq.delivery_mode = APIC_DM_REMRD;
- kvm_irq_delivery_to_apic(kvm, 0, &lapic_irq, NULL);
+ kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
}
int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
unsigned long nr, a0, a1, a2, a3, ret;
int op_64_bit, r = 1;
+ kvm_x86_ops->skip_emulated_instruction(vcpu);
+
if (kvm_hv_hypercall_enabled(vcpu->kvm))
return kvm_hv_hypercall(vcpu);
}
/*
- * Returns 1 to let __vcpu_run() continue the guest execution loop without
+ * Returns 1 to let vcpu_run() continue the guest execution loop without
* exiting to the userspace. Otherwise, the value will be returned to the
* userspace.
*/
set_debugreg(vcpu->arch.eff_db[2], 2);
set_debugreg(vcpu->arch.eff_db[3], 3);
set_debugreg(vcpu->arch.dr6, 6);
+ vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
}
trace_kvm_entry(vcpu->vcpu_id);
return r;
}
+static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
+{
+ if (!kvm_arch_vcpu_runnable(vcpu)) {
+ srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
+ kvm_vcpu_block(vcpu);
+ vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
+ if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
+ return 1;
+ }
+
+ kvm_apic_accept_events(vcpu);
+ switch(vcpu->arch.mp_state) {
+ case KVM_MP_STATE_HALTED:
+ vcpu->arch.pv.pv_unhalted = false;
+ vcpu->arch.mp_state =
+ KVM_MP_STATE_RUNNABLE;
+ case KVM_MP_STATE_RUNNABLE:
+ vcpu->arch.apf.halted = false;
+ break;
+ case KVM_MP_STATE_INIT_RECEIVED:
+ break;
+ default:
+ return -EINTR;
+ break;
+ }
+ return 1;
+}
-static int __vcpu_run(struct kvm_vcpu *vcpu)
+static int vcpu_run(struct kvm_vcpu *vcpu)
{
int r;
struct kvm *kvm = vcpu->kvm;
vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
- r = 1;
- while (r > 0) {
+ for (;;) {
if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
!vcpu->arch.apf.halted)
r = vcpu_enter_guest(vcpu);
- else {
- srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
- kvm_vcpu_block(vcpu);
- vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
- if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
- kvm_apic_accept_events(vcpu);
- switch(vcpu->arch.mp_state) {
- case KVM_MP_STATE_HALTED:
- vcpu->arch.pv.pv_unhalted = false;
- vcpu->arch.mp_state =
- KVM_MP_STATE_RUNNABLE;
- case KVM_MP_STATE_RUNNABLE:
- vcpu->arch.apf.halted = false;
- break;
- case KVM_MP_STATE_INIT_RECEIVED:
- break;
- default:
- r = -EINTR;
- break;
- }
- }
- }
-
+ else
+ r = vcpu_block(kvm, vcpu);
if (r <= 0)
break;
r = -EINTR;
vcpu->run->exit_reason = KVM_EXIT_INTR;
++vcpu->stat.request_irq_exits;
+ break;
}
kvm_check_async_pf_completion(vcpu);
r = -EINTR;
vcpu->run->exit_reason = KVM_EXIT_INTR;
++vcpu->stat.signal_exits;
+ break;
}
if (need_resched()) {
srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
} else
WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
- r = __vcpu_run(vcpu);
+ r = vcpu_run(vcpu);
out:
post_kvm_run_save(vcpu);
kvm_clear_exception_queue(vcpu);
memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
+ kvm_update_dr0123(vcpu);
vcpu->arch.dr6 = DR6_INIT;
kvm_update_dr6(vcpu);
vcpu->arch.dr7 = DR7_FIXED_1;
kvm_update_dr7(vcpu);
+ vcpu->arch.cr2 = 0;
+
kvm_make_request(KVM_REQ_EVENT, vcpu);
vcpu->arch.apf.msr_val = 0;
vcpu->arch.st.msr_val = 0;
vcpu->arch.pv.pv_unhalted = false;
vcpu->arch.emulate_ctxt.ops = &emulate_ops;
- if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
+ if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
else
vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
vcpu->arch.guest_supported_xcr0 = 0;
vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
+ vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
+
kvm_async_pf_hash_reset(vcpu);
kvm_pmu_init(vcpu);
for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
- kvm_kvfree(free->arch.rmap[i]);
+ kvfree(free->arch.rmap[i]);
free->arch.rmap[i] = NULL;
}
if (i == 0)
if (!dont || free->arch.lpage_info[i - 1] !=
dont->arch.lpage_info[i - 1]) {
- kvm_kvfree(free->arch.lpage_info[i - 1]);
+ kvfree(free->arch.lpage_info[i - 1]);
free->arch.lpage_info[i - 1] = NULL;
}
}
out_free:
for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
- kvm_kvfree(slot->arch.rmap[i]);
+ kvfree(slot->arch.rmap[i]);
slot->arch.rmap[i] = NULL;
if (i == 0)
continue;
- kvm_kvfree(slot->arch.lpage_info[i - 1]);
+ kvfree(slot->arch.lpage_info[i - 1]);
slot->arch.lpage_info[i - 1] = NULL;
}
return -ENOMEM;
/* It's OK to get 'new' slot here as it has already been installed */
new = id_to_memslot(kvm->memslots, mem->slot);
+ /*
+ * Dirty logging tracks sptes in 4k granularity, meaning that large
+ * sptes have to be split. If live migration is successful, the guest
+ * in the source machine will be destroyed and large sptes will be
+ * created in the destination. However, if the guest continues to run
+ * in the source machine (for example if live migration fails), small
+ * sptes will remain around and cause bad performance.
+ *
+ * Scan sptes if dirty logging has been stopped, dropping those
+ * which can be collapsed into a single large-page spte. Later
+ * page faults will create the large-page sptes.
+ */
+ if ((change != KVM_MR_DELETE) &&
+ (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
+ !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
+ kvm_mmu_zap_collapsible_sptes(kvm, new);
+
/*
* Set up write protection and/or dirty logging for the new slot.
*
/* Some systems map "vectors" to interrupts weirdly. Not us! */
__this_cpu_write(vector_irq[i], i - FIRST_EXTERNAL_VECTOR);
if (i != SYSCALL_VECTOR)
- set_intr_gate(i, interrupt[i - FIRST_EXTERNAL_VECTOR]);
+ set_intr_gate(i, irq_entries_start +
+ 8 * (i - FIRST_EXTERNAL_VECTOR));
}
/*
{
lazy_hcall3(LHCALL_SET_STACK, __KERNEL_DS | 0x1, thread->sp0,
THREAD_SIZE / PAGE_SIZE);
+ tss->x86_tss.sp0 = thread->sp0;
}
/* Let's just say, I wouldn't do debugging under a Guest. */
#include <asm/alternative-asm.h>
#include <asm/dwarf2.h>
-.macro SAVE reg
- pushl_cfi %\reg
- CFI_REL_OFFSET \reg, 0
-.endm
-
-.macro RESTORE reg
- popl_cfi %\reg
- CFI_RESTORE \reg
-.endm
-
.macro read64 reg
movl %ebx, %eax
movl %ecx, %edx
.macro addsub_return func ins insc
ENTRY(atomic64_\func\()_return_cx8)
CFI_STARTPROC
- SAVE ebp
- SAVE ebx
- SAVE esi
- SAVE edi
+ pushl_cfi_reg ebp
+ pushl_cfi_reg ebx
+ pushl_cfi_reg esi
+ pushl_cfi_reg edi
movl %eax, %esi
movl %edx, %edi
10:
movl %ebx, %eax
movl %ecx, %edx
- RESTORE edi
- RESTORE esi
- RESTORE ebx
- RESTORE ebp
+ popl_cfi_reg edi
+ popl_cfi_reg esi
+ popl_cfi_reg ebx
+ popl_cfi_reg ebp
ret
CFI_ENDPROC
ENDPROC(atomic64_\func\()_return_cx8)
.macro incdec_return func ins insc
ENTRY(atomic64_\func\()_return_cx8)
CFI_STARTPROC
- SAVE ebx
+ pushl_cfi_reg ebx
read64 %esi
1:
10:
movl %ebx, %eax
movl %ecx, %edx
- RESTORE ebx
+ popl_cfi_reg ebx
ret
CFI_ENDPROC
ENDPROC(atomic64_\func\()_return_cx8)
ENTRY(atomic64_dec_if_positive_cx8)
CFI_STARTPROC
- SAVE ebx
+ pushl_cfi_reg ebx
read64 %esi
1:
2:
movl %ebx, %eax
movl %ecx, %edx
- RESTORE ebx
+ popl_cfi_reg ebx
ret
CFI_ENDPROC
ENDPROC(atomic64_dec_if_positive_cx8)
ENTRY(atomic64_add_unless_cx8)
CFI_STARTPROC
- SAVE ebp
- SAVE ebx
+ pushl_cfi_reg ebp
+ pushl_cfi_reg ebx
/* these just push these two parameters on the stack */
- SAVE edi
- SAVE ecx
+ pushl_cfi_reg edi
+ pushl_cfi_reg ecx
movl %eax, %ebp
movl %edx, %edi
3:
addl $8, %esp
CFI_ADJUST_CFA_OFFSET -8
- RESTORE ebx
- RESTORE ebp
+ popl_cfi_reg ebx
+ popl_cfi_reg ebp
ret
4:
cmpl %edx, 4(%esp)
ENTRY(atomic64_inc_not_zero_cx8)
CFI_STARTPROC
- SAVE ebx
+ pushl_cfi_reg ebx
read64 %esi
1:
movl $1, %eax
3:
- RESTORE ebx
+ popl_cfi_reg ebx
ret
CFI_ENDPROC
ENDPROC(atomic64_inc_not_zero_cx8)
*/
ENTRY(csum_partial)
CFI_STARTPROC
- pushl_cfi %esi
- CFI_REL_OFFSET esi, 0
- pushl_cfi %ebx
- CFI_REL_OFFSET ebx, 0
+ pushl_cfi_reg esi
+ pushl_cfi_reg ebx
movl 20(%esp),%eax # Function arg: unsigned int sum
movl 16(%esp),%ecx # Function arg: int len
movl 12(%esp),%esi # Function arg: unsigned char *buff
6: addl %ecx,%eax
adcl $0, %eax
7:
- testl $1, 12(%esp)
+ testb $1, 12(%esp)
jz 8f
roll $8, %eax
8:
- popl_cfi %ebx
- CFI_RESTORE ebx
- popl_cfi %esi
- CFI_RESTORE esi
+ popl_cfi_reg ebx
+ popl_cfi_reg esi
ret
CFI_ENDPROC
ENDPROC(csum_partial)
ENTRY(csum_partial)
CFI_STARTPROC
- pushl_cfi %esi
- CFI_REL_OFFSET esi, 0
- pushl_cfi %ebx
- CFI_REL_OFFSET ebx, 0
+ pushl_cfi_reg esi
+ pushl_cfi_reg ebx
movl 20(%esp),%eax # Function arg: unsigned int sum
movl 16(%esp),%ecx # Function arg: int len
movl 12(%esp),%esi # Function arg: const unsigned char *buf
addl %ebx,%eax
adcl $0,%eax
80:
- testl $1, 12(%esp)
+ testb $1, 12(%esp)
jz 90f
roll $8, %eax
90:
- popl_cfi %ebx
- CFI_RESTORE ebx
- popl_cfi %esi
- CFI_RESTORE esi
+ popl_cfi_reg ebx
+ popl_cfi_reg esi
ret
CFI_ENDPROC
ENDPROC(csum_partial)
CFI_STARTPROC
subl $4,%esp
CFI_ADJUST_CFA_OFFSET 4
- pushl_cfi %edi
- CFI_REL_OFFSET edi, 0
- pushl_cfi %esi
- CFI_REL_OFFSET esi, 0
- pushl_cfi %ebx
- CFI_REL_OFFSET ebx, 0
+ pushl_cfi_reg edi
+ pushl_cfi_reg esi
+ pushl_cfi_reg ebx
movl ARGBASE+16(%esp),%eax # sum
movl ARGBASE+12(%esp),%ecx # len
movl ARGBASE+4(%esp),%esi # src
.previous
- popl_cfi %ebx
- CFI_RESTORE ebx
- popl_cfi %esi
- CFI_RESTORE esi
- popl_cfi %edi
- CFI_RESTORE edi
+ popl_cfi_reg ebx
+ popl_cfi_reg esi
+ popl_cfi_reg edi
popl_cfi %ecx # equivalent to addl $4,%esp
ret
CFI_ENDPROC
ENTRY(csum_partial_copy_generic)
CFI_STARTPROC
- pushl_cfi %ebx
- CFI_REL_OFFSET ebx, 0
- pushl_cfi %edi
- CFI_REL_OFFSET edi, 0
- pushl_cfi %esi
- CFI_REL_OFFSET esi, 0
+ pushl_cfi_reg ebx
+ pushl_cfi_reg edi
+ pushl_cfi_reg esi
movl ARGBASE+4(%esp),%esi #src
movl ARGBASE+8(%esp),%edi #dst
movl ARGBASE+12(%esp),%ecx #len
jmp 7b
.previous
- popl_cfi %esi
- CFI_RESTORE esi
- popl_cfi %edi
- CFI_RESTORE edi
- popl_cfi %ebx
- CFI_RESTORE ebx
+ popl_cfi_reg esi
+ popl_cfi_reg edi
+ popl_cfi_reg ebx
ret
CFI_ENDPROC
ENDPROC(csum_partial_copy_generic)
#include <linux/linkage.h>
#include <asm/dwarf2.h>
+#include <asm/cpufeature.h>
#include <asm/alternative-asm.h>
/*
- * Zero a page.
- * rdi page
- */
-ENTRY(clear_page_c)
+ * Most CPUs support enhanced REP MOVSB/STOSB instructions. It is
+ * recommended to use this when possible and we do use them by default.
+ * If enhanced REP MOVSB/STOSB is not available, try to use fast string.
+ * Otherwise, use original.
+ */
+
+/*
+ * Zero a page.
+ * %rdi - page
+ */
+ENTRY(clear_page)
CFI_STARTPROC
+
+ ALTERNATIVE_2 "jmp clear_page_orig", "", X86_FEATURE_REP_GOOD, \
+ "jmp clear_page_c_e", X86_FEATURE_ERMS
+
movl $4096/8,%ecx
xorl %eax,%eax
rep stosq
ret
CFI_ENDPROC
-ENDPROC(clear_page_c)
+ENDPROC(clear_page)
-ENTRY(clear_page_c_e)
+ENTRY(clear_page_orig)
CFI_STARTPROC
- movl $4096,%ecx
- xorl %eax,%eax
- rep stosb
- ret
- CFI_ENDPROC
-ENDPROC(clear_page_c_e)
-ENTRY(clear_page)
- CFI_STARTPROC
xorl %eax,%eax
movl $4096/64,%ecx
.p2align 4
nop
ret
CFI_ENDPROC
-.Lclear_page_end:
-ENDPROC(clear_page)
-
- /*
- * Some CPUs support enhanced REP MOVSB/STOSB instructions.
- * It is recommended to use this when possible.
- * If enhanced REP MOVSB/STOSB is not available, try to use fast string.
- * Otherwise, use original function.
- *
- */
+ENDPROC(clear_page_orig)
-#include <asm/cpufeature.h>
-
- .section .altinstr_replacement,"ax"
-1: .byte 0xeb /* jmp <disp8> */
- .byte (clear_page_c - clear_page) - (2f - 1b) /* offset */
-2: .byte 0xeb /* jmp <disp8> */
- .byte (clear_page_c_e - clear_page) - (3f - 2b) /* offset */
-3:
- .previous
- .section .altinstructions,"a"
- altinstruction_entry clear_page,1b,X86_FEATURE_REP_GOOD,\
- .Lclear_page_end-clear_page, 2b-1b
- altinstruction_entry clear_page,2b,X86_FEATURE_ERMS, \
- .Lclear_page_end-clear_page,3b-2b
- .previous
+ENTRY(clear_page_c_e)
+ CFI_STARTPROC
+ movl $4096,%ecx
+ xorl %eax,%eax
+ rep stosb
+ ret
+ CFI_ENDPROC
+ENDPROC(clear_page_c_e)
#include <linux/linkage.h>
#include <asm/dwarf2.h>
+#include <asm/cpufeature.h>
#include <asm/alternative-asm.h>
+/*
+ * Some CPUs run faster using the string copy instructions (sane microcode).
+ * It is also a lot simpler. Use this when possible. But, don't use streaming
+ * copy unless the CPU indicates X86_FEATURE_REP_GOOD. Could vary the
+ * prefetch distance based on SMP/UP.
+ */
ALIGN
-copy_page_rep:
+ENTRY(copy_page)
CFI_STARTPROC
+ ALTERNATIVE "jmp copy_page_regs", "", X86_FEATURE_REP_GOOD
movl $4096/8, %ecx
rep movsq
ret
CFI_ENDPROC
-ENDPROC(copy_page_rep)
-
-/*
- * Don't use streaming copy unless the CPU indicates X86_FEATURE_REP_GOOD.
- * Could vary the prefetch distance based on SMP/UP.
-*/
+ENDPROC(copy_page)
-ENTRY(copy_page)
+ENTRY(copy_page_regs)
CFI_STARTPROC
subq $2*8, %rsp
CFI_ADJUST_CFA_OFFSET 2*8
addq $2*8, %rsp
CFI_ADJUST_CFA_OFFSET -2*8
ret
-.Lcopy_page_end:
CFI_ENDPROC
-ENDPROC(copy_page)
-
- /* Some CPUs run faster using the string copy instructions.
- It is also a lot simpler. Use this when possible */
-
-#include <asm/cpufeature.h>
-
- .section .altinstr_replacement,"ax"
-1: .byte 0xeb /* jmp <disp8> */
- .byte (copy_page_rep - copy_page) - (2f - 1b) /* offset */
-2:
- .previous
- .section .altinstructions,"a"
- altinstruction_entry copy_page, 1b, X86_FEATURE_REP_GOOD, \
- .Lcopy_page_end-copy_page, 2b-1b
- .previous
+ENDPROC(copy_page_regs)
#include <linux/linkage.h>
#include <asm/dwarf2.h>
-
-#define FIX_ALIGNMENT 1
-
#include <asm/current.h>
#include <asm/asm-offsets.h>
#include <asm/thread_info.h>
#include <asm/asm.h>
#include <asm/smap.h>
-/*
- * By placing feature2 after feature1 in altinstructions section, we logically
- * implement:
- * If CPU has feature2, jmp to alt2 is used
- * else if CPU has feature1, jmp to alt1 is used
- * else jmp to orig is used.
- */
- .macro ALTERNATIVE_JUMP feature1,feature2,orig,alt1,alt2
-0:
- .byte 0xe9 /* 32bit jump */
- .long \orig-1f /* by default jump to orig */
-1:
- .section .altinstr_replacement,"ax"
-2: .byte 0xe9 /* near jump with 32bit immediate */
- .long \alt1-1b /* offset */ /* or alternatively to alt1 */
-3: .byte 0xe9 /* near jump with 32bit immediate */
- .long \alt2-1b /* offset */ /* or alternatively to alt2 */
- .previous
-
- .section .altinstructions,"a"
- altinstruction_entry 0b,2b,\feature1,5,5
- altinstruction_entry 0b,3b,\feature2,5,5
- .previous
- .endm
-
.macro ALIGN_DESTINATION
-#ifdef FIX_ALIGNMENT
/* check for bad alignment of destination */
movl %edi,%ecx
andl $7,%ecx
_ASM_EXTABLE(100b,103b)
_ASM_EXTABLE(101b,103b)
-#endif
.endm
/* Standard copy_to_user with segment limit checking */
jc bad_to_user
cmpq TI_addr_limit(%rax),%rcx
ja bad_to_user
- ALTERNATIVE_JUMP X86_FEATURE_REP_GOOD,X86_FEATURE_ERMS, \
- copy_user_generic_unrolled,copy_user_generic_string, \
- copy_user_enhanced_fast_string
+ ALTERNATIVE_2 "jmp copy_user_generic_unrolled", \
+ "jmp copy_user_generic_string", \
+ X86_FEATURE_REP_GOOD, \
+ "jmp copy_user_enhanced_fast_string", \
+ X86_FEATURE_ERMS
CFI_ENDPROC
ENDPROC(_copy_to_user)
jc bad_from_user
cmpq TI_addr_limit(%rax),%rcx
ja bad_from_user
- ALTERNATIVE_JUMP X86_FEATURE_REP_GOOD,X86_FEATURE_ERMS, \
- copy_user_generic_unrolled,copy_user_generic_string, \
- copy_user_enhanced_fast_string
+ ALTERNATIVE_2 "jmp copy_user_generic_unrolled", \
+ "jmp copy_user_generic_string", \
+ X86_FEATURE_REP_GOOD, \
+ "jmp copy_user_enhanced_fast_string", \
+ X86_FEATURE_ERMS
CFI_ENDPROC
ENDPROC(_copy_from_user)
/* handle last odd byte */
.Lhandle_1:
- testl $1, %r10d
+ testb $1, %r10b
jz .Lende
xorl %ebx, %ebx
source
*/
void insn_init(struct insn *insn, const void *kaddr, int buf_len, int x86_64)
{
+ /*
+ * Instructions longer than MAX_INSN_SIZE (15 bytes) are invalid
+ * even if the input buffer is long enough to hold them.
+ */
+ if (buf_len > MAX_INSN_SIZE)
+ buf_len = MAX_INSN_SIZE;
+
memset(insn, 0, sizeof(*insn));
insn->kaddr = kaddr;
insn->end_kaddr = kaddr + buf_len;
/* VEX.W overrides opnd_size */
insn->opnd_bytes = 8;
} else {
+ /*
+ * For VEX2, fake VEX3-like byte#2.
+ * Makes it easier to decode vex.W, vex.vvvv,
+ * vex.L and vex.pp. Masking with 0x7f sets vex.W == 0.
+ */
+ insn->vex_prefix.bytes[2] = b2 & 0x7f;
insn->vex_prefix.nbytes = 2;
insn->next_byte += 2;
}
/* Copyright 2002 Andi Kleen */
#include <linux/linkage.h>
-
#include <asm/cpufeature.h>
#include <asm/dwarf2.h>
#include <asm/alternative-asm.h>
+/*
+ * We build a jump to memcpy_orig by default which gets NOPped out on
+ * the majority of x86 CPUs which set REP_GOOD. In addition, CPUs which
+ * have the enhanced REP MOVSB/STOSB feature (ERMS), change those NOPs
+ * to a jmp to memcpy_erms which does the REP; MOVSB mem copy.
+ */
+
+.weak memcpy
+
/*
* memcpy - Copy a memory block.
*
* Output:
* rax original destination
*/
+ENTRY(__memcpy)
+ENTRY(memcpy)
+ ALTERNATIVE_2 "jmp memcpy_orig", "", X86_FEATURE_REP_GOOD, \
+ "jmp memcpy_erms", X86_FEATURE_ERMS
-/*
- * memcpy_c() - fast string ops (REP MOVSQ) based variant.
- *
- * This gets patched over the unrolled variant (below) via the
- * alternative instructions framework:
- */
- .section .altinstr_replacement, "ax", @progbits
-.Lmemcpy_c:
movq %rdi, %rax
movq %rdx, %rcx
shrq $3, %rcx
movl %edx, %ecx
rep movsb
ret
-.Lmemcpy_e:
- .previous
+ENDPROC(memcpy)
+ENDPROC(__memcpy)
/*
- * memcpy_c_e() - enhanced fast string memcpy. This is faster and simpler than
- * memcpy_c. Use memcpy_c_e when possible.
- *
- * This gets patched over the unrolled variant (below) via the
- * alternative instructions framework:
+ * memcpy_erms() - enhanced fast string memcpy. This is faster and
+ * simpler than memcpy. Use memcpy_erms when possible.
*/
- .section .altinstr_replacement, "ax", @progbits
-.Lmemcpy_c_e:
+ENTRY(memcpy_erms)
movq %rdi, %rax
movq %rdx, %rcx
rep movsb
ret
-.Lmemcpy_e_e:
- .previous
-
-.weak memcpy
+ENDPROC(memcpy_erms)
-ENTRY(__memcpy)
-ENTRY(memcpy)
+ENTRY(memcpy_orig)
CFI_STARTPROC
movq %rdi, %rax
.Lend:
retq
CFI_ENDPROC
-ENDPROC(memcpy)
-ENDPROC(__memcpy)
-
- /*
- * Some CPUs are adding enhanced REP MOVSB/STOSB feature
- * If the feature is supported, memcpy_c_e() is the first choice.
- * If enhanced rep movsb copy is not available, use fast string copy
- * memcpy_c() when possible. This is faster and code is simpler than
- * original memcpy().
- * Otherwise, original memcpy() is used.
- * In .altinstructions section, ERMS feature is placed after REG_GOOD
- * feature to implement the right patch order.
- *
- * Replace only beginning, memcpy is used to apply alternatives,
- * so it is silly to overwrite itself with nops - reboot is the
- * only outcome...
- */
- .section .altinstructions, "a"
- altinstruction_entry __memcpy,.Lmemcpy_c,X86_FEATURE_REP_GOOD,\
- .Lmemcpy_e-.Lmemcpy_c,.Lmemcpy_e-.Lmemcpy_c
- altinstruction_entry __memcpy,.Lmemcpy_c_e,X86_FEATURE_ERMS, \
- .Lmemcpy_e_e-.Lmemcpy_c_e,.Lmemcpy_e_e-.Lmemcpy_c_e
- .previous
+ENDPROC(memcpy_orig)
* This assembly file is re-written from memmove_64.c file.
* - Copyright 2011 Fenghua Yu <fenghua.yu@intel.com>
*/
-#define _STRING_C
#include <linux/linkage.h>
#include <asm/dwarf2.h>
#include <asm/cpufeature.h>
jg 2f
.Lmemmove_begin_forward:
+ ALTERNATIVE "", "movq %rdx, %rcx; rep movsb; retq", X86_FEATURE_ERMS
+
/*
* movsq instruction have many startup latency
* so we handle small size by general register.
13:
retq
CFI_ENDPROC
-
- .section .altinstr_replacement,"ax"
-.Lmemmove_begin_forward_efs:
- /* Forward moving data. */
- movq %rdx, %rcx
- rep movsb
- retq
-.Lmemmove_end_forward_efs:
- .previous
-
- .section .altinstructions,"a"
- altinstruction_entry .Lmemmove_begin_forward, \
- .Lmemmove_begin_forward_efs,X86_FEATURE_ERMS, \
- .Lmemmove_end_forward-.Lmemmove_begin_forward, \
- .Lmemmove_end_forward_efs-.Lmemmove_begin_forward_efs
- .previous
ENDPROC(__memmove)
ENDPROC(memmove)
#include <asm/cpufeature.h>
#include <asm/alternative-asm.h>
+.weak memset
+
/*
* ISO C memset - set a memory block to a byte value. This function uses fast
* string to get better performance than the original function. The code is
* simpler and shorter than the orignal function as well.
- *
+ *
* rdi destination
- * rsi value (char)
- * rdx count (bytes)
- *
+ * rsi value (char)
+ * rdx count (bytes)
+ *
* rax original destination
- */
- .section .altinstr_replacement, "ax", @progbits
-.Lmemset_c:
+ */
+ENTRY(memset)
+ENTRY(__memset)
+ /*
+ * Some CPUs support enhanced REP MOVSB/STOSB feature. It is recommended
+ * to use it when possible. If not available, use fast string instructions.
+ *
+ * Otherwise, use original memset function.
+ */
+ ALTERNATIVE_2 "jmp memset_orig", "", X86_FEATURE_REP_GOOD, \
+ "jmp memset_erms", X86_FEATURE_ERMS
+
movq %rdi,%r9
movq %rdx,%rcx
andl $7,%edx
rep stosb
movq %r9,%rax
ret
-.Lmemset_e:
- .previous
+ENDPROC(memset)
+ENDPROC(__memset)
/*
* ISO C memset - set a memory block to a byte value. This function uses
*
* rax original destination
*/
- .section .altinstr_replacement, "ax", @progbits
-.Lmemset_c_e:
+ENTRY(memset_erms)
movq %rdi,%r9
movb %sil,%al
movq %rdx,%rcx
rep stosb
movq %r9,%rax
ret
-.Lmemset_e_e:
- .previous
-
-.weak memset
+ENDPROC(memset_erms)
-ENTRY(memset)
-ENTRY(__memset)
+ENTRY(memset_orig)
CFI_STARTPROC
movq %rdi,%r10
jmp .Lafter_bad_alignment
.Lfinal:
CFI_ENDPROC
-ENDPROC(memset)
-ENDPROC(__memset)
-
- /* Some CPUs support enhanced REP MOVSB/STOSB feature.
- * It is recommended to use this when possible.
- *
- * If enhanced REP MOVSB/STOSB feature is not available, use fast string
- * instructions.
- *
- * Otherwise, use original memset function.
- *
- * In .altinstructions section, ERMS feature is placed after REG_GOOD
- * feature to implement the right patch order.
- */
- .section .altinstructions,"a"
- altinstruction_entry __memset,.Lmemset_c,X86_FEATURE_REP_GOOD,\
- .Lfinal-__memset,.Lmemset_e-.Lmemset_c
- altinstruction_entry __memset,.Lmemset_c_e,X86_FEATURE_ERMS, \
- .Lfinal-__memset,.Lmemset_e_e-.Lmemset_c_e
- .previous
+ENDPROC(memset_orig)
.macro op_safe_regs op
ENTRY(\op\()_safe_regs)
CFI_STARTPROC
- pushq_cfi %rbx
- pushq_cfi %rbp
+ pushq_cfi_reg rbx
+ pushq_cfi_reg rbp
movq %rdi, %r10 /* Save pointer */
xorl %r11d, %r11d /* Return value */
movl (%rdi), %eax
movl %ebp, 20(%r10)
movl %esi, 24(%r10)
movl %edi, 28(%r10)
- popq_cfi %rbp
- popq_cfi %rbx
+ popq_cfi_reg rbp
+ popq_cfi_reg rbx
ret
3:
CFI_RESTORE_STATE
.macro op_safe_regs op
ENTRY(\op\()_safe_regs)
CFI_STARTPROC
- pushl_cfi %ebx
- pushl_cfi %ebp
- pushl_cfi %esi
- pushl_cfi %edi
+ pushl_cfi_reg ebx
+ pushl_cfi_reg ebp
+ pushl_cfi_reg esi
+ pushl_cfi_reg edi
pushl_cfi $0 /* Return value */
pushl_cfi %eax
movl 4(%eax), %ecx
movl %esi, 24(%eax)
movl %edi, 28(%eax)
popl_cfi %eax
- popl_cfi %edi
- popl_cfi %esi
- popl_cfi %ebp
- popl_cfi %ebx
+ popl_cfi_reg edi
+ popl_cfi_reg esi
+ popl_cfi_reg ebp
+ popl_cfi_reg ebx
ret
3:
CFI_RESTORE_STATE
*/
#define save_common_regs \
- pushl_cfi %ecx; CFI_REL_OFFSET ecx, 0
+ pushl_cfi_reg ecx
#define restore_common_regs \
- popl_cfi %ecx; CFI_RESTORE ecx
+ popl_cfi_reg ecx
/* Avoid uglifying the argument copying x86-64 needs to do. */
.macro movq src, dst
*/
#define save_common_regs \
- pushq_cfi %rdi; CFI_REL_OFFSET rdi, 0; \
- pushq_cfi %rsi; CFI_REL_OFFSET rsi, 0; \
- pushq_cfi %rcx; CFI_REL_OFFSET rcx, 0; \
- pushq_cfi %r8; CFI_REL_OFFSET r8, 0; \
- pushq_cfi %r9; CFI_REL_OFFSET r9, 0; \
- pushq_cfi %r10; CFI_REL_OFFSET r10, 0; \
- pushq_cfi %r11; CFI_REL_OFFSET r11, 0
+ pushq_cfi_reg rdi; \
+ pushq_cfi_reg rsi; \
+ pushq_cfi_reg rcx; \
+ pushq_cfi_reg r8; \
+ pushq_cfi_reg r9; \
+ pushq_cfi_reg r10; \
+ pushq_cfi_reg r11
#define restore_common_regs \
- popq_cfi %r11; CFI_RESTORE r11; \
- popq_cfi %r10; CFI_RESTORE r10; \
- popq_cfi %r9; CFI_RESTORE r9; \
- popq_cfi %r8; CFI_RESTORE r8; \
- popq_cfi %rcx; CFI_RESTORE rcx; \
- popq_cfi %rsi; CFI_RESTORE rsi; \
- popq_cfi %rdi; CFI_RESTORE rdi
+ popq_cfi_reg r11; \
+ popq_cfi_reg r10; \
+ popq_cfi_reg r9; \
+ popq_cfi_reg r8; \
+ popq_cfi_reg rcx; \
+ popq_cfi_reg rsi; \
+ popq_cfi_reg rdi
#endif
ENTRY(call_rwsem_down_read_failed)
CFI_STARTPROC
save_common_regs
- __ASM_SIZE(push,_cfi) %__ASM_REG(dx)
- CFI_REL_OFFSET __ASM_REG(dx), 0
+ __ASM_SIZE(push,_cfi_reg) __ASM_REG(dx)
movq %rax,%rdi
call rwsem_down_read_failed
- __ASM_SIZE(pop,_cfi) %__ASM_REG(dx)
- CFI_RESTORE __ASM_REG(dx)
+ __ASM_SIZE(pop,_cfi_reg) __ASM_REG(dx)
restore_common_regs
ret
CFI_ENDPROC
ENTRY(call_rwsem_downgrade_wake)
CFI_STARTPROC
save_common_regs
- __ASM_SIZE(push,_cfi) %__ASM_REG(dx)
- CFI_REL_OFFSET __ASM_REG(dx), 0
+ __ASM_SIZE(push,_cfi_reg) __ASM_REG(dx)
movq %rax,%rdi
call rwsem_downgrade_wake
- __ASM_SIZE(pop,_cfi) %__ASM_REG(dx)
- CFI_RESTORE __ASM_REG(dx)
+ __ASM_SIZE(pop,_cfi_reg) __ASM_REG(dx)
restore_common_regs
ret
CFI_ENDPROC
.globl \name
\name:
CFI_STARTPROC
- pushl_cfi %eax
- CFI_REL_OFFSET eax, 0
- pushl_cfi %ecx
- CFI_REL_OFFSET ecx, 0
- pushl_cfi %edx
- CFI_REL_OFFSET edx, 0
+ pushl_cfi_reg eax
+ pushl_cfi_reg ecx
+ pushl_cfi_reg edx
.if \put_ret_addr_in_eax
/* Place EIP in the arg1 */
.endif
call \func
- popl_cfi %edx
- CFI_RESTORE edx
- popl_cfi %ecx
- CFI_RESTORE ecx
- popl_cfi %eax
- CFI_RESTORE eax
+ popl_cfi_reg edx
+ popl_cfi_reg ecx
+ popl_cfi_reg eax
ret
CFI_ENDPROC
_ASM_NOKPROBE(\name)
CFI_STARTPROC
/* this one pushes 9 elems, the next one would be %rIP */
- SAVE_ARGS
+ pushq_cfi_reg rdi
+ pushq_cfi_reg rsi
+ pushq_cfi_reg rdx
+ pushq_cfi_reg rcx
+ pushq_cfi_reg rax
+ pushq_cfi_reg r8
+ pushq_cfi_reg r9
+ pushq_cfi_reg r10
+ pushq_cfi_reg r11
.if \put_ret_addr_in_rdi
+ /* 9*8(%rsp) is return addr on stack */
movq_cfi_restore 9*8, rdi
.endif
#endif
#endif
- /* SAVE_ARGS below is used only for the .cfi directives it contains. */
+#if defined(CONFIG_TRACE_IRQFLAGS) \
+ || defined(CONFIG_DEBUG_LOCK_ALLOC) \
+ || defined(CONFIG_PREEMPT)
CFI_STARTPROC
- SAVE_ARGS
+ CFI_ADJUST_CFA_OFFSET 9*8
restore:
- RESTORE_ARGS
+ popq_cfi_reg r11
+ popq_cfi_reg r10
+ popq_cfi_reg r9
+ popq_cfi_reg r8
+ popq_cfi_reg rax
+ popq_cfi_reg rcx
+ popq_cfi_reg rdx
+ popq_cfi_reg rsi
+ popq_cfi_reg rdi
ret
CFI_ENDPROC
_ASM_NOKPROBE(restore)
+#endif
* it is not necessary to optimize tail handling.
*/
__visible unsigned long
-copy_user_handle_tail(char *to, char *from, unsigned len, unsigned zerorest)
+copy_user_handle_tail(char *to, char *from, unsigned len)
{
- char c;
- unsigned zero_len;
-
for (; len; --len, to++) {
+ char c;
+
if (__get_user_nocheck(c, from++, sizeof(char)))
break;
if (__put_user_nocheck(c, to, sizeof(char)))
break;
}
-
- for (c = 0, zero_len = len; zerorest && zero_len; --zero_len)
- if (__put_user_nocheck(c, to++, sizeof(char)))
- break;
clac();
+
+ /* If the destination is a kernel buffer, we always clear the end */
+ if ((unsigned long)to >= TASK_SIZE_MAX)
+ memset(to, 0, len);
return len;
}
de: ESC
df: ESC
# 0xe0 - 0xef
+# Note: "forced64" is Intel CPU behavior: they ignore 0x66 prefix
+# in 64-bit mode. AMD CPUs accept 0x66 prefix, it causes RIP truncation
+# to 16 bits. In 32-bit mode, 0x66 is accepted by both Intel and AMD.
e0: LOOPNE/LOOPNZ Jb (f64)
e1: LOOPE/LOOPZ Jb (f64)
e2: LOOP Jb (f64)
e5: IN eAX,Ib
e6: OUT Ib,AL
e7: OUT Ib,eAX
+# With 0x66 prefix in 64-bit mode, for AMD CPUs immediate offset
+# in "near" jumps and calls is 16-bit. For CALL,
+# push of return address is 16-bit wide, RSP is decremented by 2
+# but is not truncated to 16 bits, unlike RIP.
e8: CALL Jz (f64)
e9: JMP-near Jz (f64)
ea: JMP-far Ap (i64)
7e: movd/q Ey,Pd | vmovd/q Ey,Vy (66),(v1) | vmovq Vq,Wq (F3),(v1)
7f: movq Qq,Pq | vmovdqa Wx,Vx (66) | vmovdqu Wx,Vx (F3)
# 0x0f 0x80-0x8f
+# Note: "forced64" is Intel CPU behavior (see comment about CALL insn).
80: JO Jz (f64)
81: JNO Jz (f64)
82: JB/JC/JNAE Jz (f64)
GrpTable: Grp5
0: INC Ev
1: DEC Ev
+# Note: "forced64" is Intel CPU behavior (see comment about CALL insn).
2: CALLN Ev (f64)
3: CALLF Ep
4: JMPN Ev (f64)
obj-$(CONFIG_ACPI_NUMA) += srat.o
obj-$(CONFIG_NUMA_EMU) += numa_emulation.o
-obj-$(CONFIG_MEMTEST) += memtest.o
-
obj-$(CONFIG_X86_INTEL_MPX) += mpx.o
int ret = 0;
/* kprobe_running() needs smp_processor_id() */
- if (kprobes_built_in() && !user_mode_vm(regs)) {
+ if (kprobes_built_in() && !user_mode(regs)) {
preempt_disable();
if (kprobe_running() && kprobe_fault_handler(regs, 14))
ret = 1;
instr = (void *)convert_ip_to_linear(current, regs);
max_instr = instr + 15;
- if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE)
+ if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE_MAX)
return 0;
while (instr < max_instr) {
if (error_code & PF_USER)
return false;
- if (!user_mode_vm(regs) && (regs->flags & X86_EFLAGS_AC))
+ if (!user_mode(regs) && (regs->flags & X86_EFLAGS_AC))
return false;
return true;
* User-mode registers count as a user access even for any
* potential system fault or CPU buglet:
*/
- if (user_mode_vm(regs)) {
+ if (user_mode(regs)) {
local_irq_enable();
error_code |= PF_USER;
flags |= FAULT_FLAG_USER;
/*
* Tables translating between page_cache_type_t and pte encoding.
- * Minimal supported modes are defined statically, modified if more supported
- * cache modes are available.
- * Index into __cachemode2pte_tbl is the cachemode.
- * Index into __pte2cachemode_tbl are the caching attribute bits of the pte
- * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
+ *
+ * Minimal supported modes are defined statically, they are modified
+ * during bootup if more supported cache modes are available.
+ *
+ * Index into __cachemode2pte_tbl[] is the cachemode.
+ *
+ * Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte
+ * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
*/
uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = {
- [_PAGE_CACHE_MODE_WB] = 0,
- [_PAGE_CACHE_MODE_WC] = _PAGE_PWT,
- [_PAGE_CACHE_MODE_UC_MINUS] = _PAGE_PCD,
- [_PAGE_CACHE_MODE_UC] = _PAGE_PCD | _PAGE_PWT,
- [_PAGE_CACHE_MODE_WT] = _PAGE_PCD,
- [_PAGE_CACHE_MODE_WP] = _PAGE_PCD,
+ [_PAGE_CACHE_MODE_WB ] = 0 | 0 ,
+ [_PAGE_CACHE_MODE_WC ] = _PAGE_PWT | 0 ,
+ [_PAGE_CACHE_MODE_UC_MINUS] = 0 | _PAGE_PCD,
+ [_PAGE_CACHE_MODE_UC ] = _PAGE_PWT | _PAGE_PCD,
+ [_PAGE_CACHE_MODE_WT ] = 0 | _PAGE_PCD,
+ [_PAGE_CACHE_MODE_WP ] = 0 | _PAGE_PCD,
};
EXPORT_SYMBOL(__cachemode2pte_tbl);
+
uint8_t __pte2cachemode_tbl[8] = {
- [__pte2cm_idx(0)] = _PAGE_CACHE_MODE_WB,
- [__pte2cm_idx(_PAGE_PWT)] = _PAGE_CACHE_MODE_WC,
- [__pte2cm_idx(_PAGE_PCD)] = _PAGE_CACHE_MODE_UC_MINUS,
- [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD)] = _PAGE_CACHE_MODE_UC,
- [__pte2cm_idx(_PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
- [__pte2cm_idx(_PAGE_PWT | _PAGE_PAT)] = _PAGE_CACHE_MODE_WC,
- [__pte2cm_idx(_PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
+ [__pte2cm_idx( 0 | 0 | 0 )] = _PAGE_CACHE_MODE_WB,
+ [__pte2cm_idx(_PAGE_PWT | 0 | 0 )] = _PAGE_CACHE_MODE_WC,
+ [__pte2cm_idx( 0 | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC_MINUS,
+ [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC,
+ [__pte2cm_idx( 0 | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
+ [__pte2cm_idx(_PAGE_PWT | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_WC,
+ [__pte2cm_idx(0 | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC,
};
EXPORT_SYMBOL(__pte2cachemode_tbl);
int after_bootmem;
-int direct_gbpages
-#ifdef CONFIG_DIRECT_GBPAGES
- = 1
-#endif
-;
-
-static void __init init_gbpages(void)
-{
-#ifdef CONFIG_X86_64
- if (direct_gbpages && cpu_has_gbpages)
- printk(KERN_INFO "Using GB pages for direct mapping\n");
- else
- direct_gbpages = 0;
-#endif
-}
+early_param_on_off("gbpages", "nogbpages", direct_gbpages, CONFIG_X86_DIRECT_GBPAGES);
struct map_range {
unsigned long start;
static void __init probe_page_size_mask(void)
{
- init_gbpages();
-
#if !defined(CONFIG_DEBUG_PAGEALLOC) && !defined(CONFIG_KMEMCHECK)
/*
* For CONFIG_DEBUG_PAGEALLOC, identity mapping will use small pages.
* This will simplify cpa(), which otherwise needs to support splitting
* large pages into small in interrupt context, etc.
*/
- if (direct_gbpages)
- page_size_mask |= 1 << PG_LEVEL_1G;
if (cpu_has_pse)
page_size_mask |= 1 << PG_LEVEL_2M;
#endif
if (cpu_has_pge) {
cr4_set_bits_and_update_boot(X86_CR4_PGE);
__supported_pte_mask |= _PAGE_GLOBAL;
+ } else
+ __supported_pte_mask &= ~_PAGE_GLOBAL;
+
+ /* Enable 1 GB linear kernel mappings if available: */
+ if (direct_gbpages && cpu_has_gbpages) {
+ printk(KERN_INFO "Using GB pages for direct mapping\n");
+ page_size_mask |= 1 << PG_LEVEL_1G;
+ } else {
+ direct_gbpages = 0;
}
}
return 0;
}
-static int __init parse_direct_gbpages_off(char *arg)
-{
- direct_gbpages = 0;
- return 0;
-}
-early_param("nogbpages", parse_direct_gbpages_off);
-
-static int __init parse_direct_gbpages_on(char *arg)
-{
- direct_gbpages = 1;
- return 0;
-}
-early_param("gbpages", parse_direct_gbpages_on);
-
/*
* NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the
* physical space so we can cache the place of the first one and move
/*
* Remap an arbitrary physical address space into the kernel virtual
- * address space. Needed when the kernel wants to access high addresses
- * directly.
+ * address space. It transparently creates kernel huge I/O mapping when
+ * the physical address is aligned by a huge page size (1GB or 2MB) and
+ * the requested size is at least the huge page size.
+ *
+ * NOTE: MTRRs can override PAT memory types with a 4KB granularity.
+ * Therefore, the mapping code falls back to use a smaller page toward 4KB
+ * when a mapping range is covered by non-WB type of MTRRs.
*
* NOTE! We need to allow non-page-aligned mappings too: we will obviously
* have to convert them into an offset in a page-aligned mapping, but the
}
EXPORT_SYMBOL(iounmap);
+int arch_ioremap_pud_supported(void)
+{
+#ifdef CONFIG_X86_64
+ return cpu_has_gbpages;
+#else
+ return 0;
+#endif
+}
+
+int arch_ioremap_pmd_supported(void)
+{
+ return cpu_has_pse;
+}
+
/*
* Convert a physical pointer to a virtual kernel pointer for /dev/mem
* access
+++ /dev/null
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/init.h>
-#include <linux/pfn.h>
-#include <linux/memblock.h>
-
-static u64 patterns[] __initdata = {
- /* The first entry has to be 0 to leave memtest with zeroed memory */
- 0,
- 0xffffffffffffffffULL,
- 0x5555555555555555ULL,
- 0xaaaaaaaaaaaaaaaaULL,
- 0x1111111111111111ULL,
- 0x2222222222222222ULL,
- 0x4444444444444444ULL,
- 0x8888888888888888ULL,
- 0x3333333333333333ULL,
- 0x6666666666666666ULL,
- 0x9999999999999999ULL,
- 0xccccccccccccccccULL,
- 0x7777777777777777ULL,
- 0xbbbbbbbbbbbbbbbbULL,
- 0xddddddddddddddddULL,
- 0xeeeeeeeeeeeeeeeeULL,
- 0x7a6c7258554e494cULL, /* yeah ;-) */
-};
-
-static void __init reserve_bad_mem(u64 pattern, u64 start_bad, u64 end_bad)
-{
- printk(KERN_INFO " %016llx bad mem addr %010llx - %010llx reserved\n",
- (unsigned long long) pattern,
- (unsigned long long) start_bad,
- (unsigned long long) end_bad);
- memblock_reserve(start_bad, end_bad - start_bad);
-}
-
-static void __init memtest(u64 pattern, u64 start_phys, u64 size)
-{
- u64 *p, *start, *end;
- u64 start_bad, last_bad;
- u64 start_phys_aligned;
- const size_t incr = sizeof(pattern);
-
- start_phys_aligned = ALIGN(start_phys, incr);
- start = __va(start_phys_aligned);
- end = start + (size - (start_phys_aligned - start_phys)) / incr;
- start_bad = 0;
- last_bad = 0;
-
- for (p = start; p < end; p++)
- *p = pattern;
-
- for (p = start; p < end; p++, start_phys_aligned += incr) {
- if (*p == pattern)
- continue;
- if (start_phys_aligned == last_bad + incr) {
- last_bad += incr;
- continue;
- }
- if (start_bad)
- reserve_bad_mem(pattern, start_bad, last_bad + incr);
- start_bad = last_bad = start_phys_aligned;
- }
- if (start_bad)
- reserve_bad_mem(pattern, start_bad, last_bad + incr);
-}
-
-static void __init do_one_pass(u64 pattern, u64 start, u64 end)
-{
- u64 i;
- phys_addr_t this_start, this_end;
-
- for_each_free_mem_range(i, NUMA_NO_NODE, &this_start, &this_end, NULL) {
- this_start = clamp_t(phys_addr_t, this_start, start, end);
- this_end = clamp_t(phys_addr_t, this_end, start, end);
- if (this_start < this_end) {
- printk(KERN_INFO " %010llx - %010llx pattern %016llx\n",
- (unsigned long long)this_start,
- (unsigned long long)this_end,
- (unsigned long long)cpu_to_be64(pattern));
- memtest(pattern, this_start, this_end - this_start);
- }
- }
-}
-
-/* default is disabled */
-static int memtest_pattern __initdata;
-
-static int __init parse_memtest(char *arg)
-{
- if (arg)
- memtest_pattern = simple_strtoul(arg, NULL, 0);
- else
- memtest_pattern = ARRAY_SIZE(patterns);
-
- return 0;
-}
-
-early_param("memtest", parse_memtest);
-
-void __init early_memtest(unsigned long start, unsigned long end)
-{
- unsigned int i;
- unsigned int idx = 0;
-
- if (!memtest_pattern)
- return;
-
- printk(KERN_INFO "early_memtest: # of tests: %d\n", memtest_pattern);
- for (i = memtest_pattern-1; i < UINT_MAX; --i) {
- idx = i % ARRAY_SIZE(patterns);
- do_one_pass(patterns[idx], start, end);
- }
-}
return sysctl_legacy_va_layout;
}
-static unsigned long mmap_rnd(void)
+unsigned long arch_mmap_rnd(void)
{
- unsigned long rnd = 0;
+ unsigned long rnd;
/*
- * 8 bits of randomness in 32bit mmaps, 20 address space bits
- * 28 bits of randomness in 64bit mmaps, 40 address space bits
- */
- if (current->flags & PF_RANDOMIZE) {
- if (mmap_is_ia32())
- rnd = get_random_int() % (1<<8);
- else
- rnd = get_random_int() % (1<<28);
- }
+ * 8 bits of randomness in 32bit mmaps, 20 address space bits
+ * 28 bits of randomness in 64bit mmaps, 40 address space bits
+ */
+ if (mmap_is_ia32())
+ rnd = (unsigned long)get_random_int() % (1<<8);
+ else
+ rnd = (unsigned long)get_random_int() % (1<<28);
+
return rnd << PAGE_SHIFT;
}
-static unsigned long mmap_base(void)
+static unsigned long mmap_base(unsigned long rnd)
{
unsigned long gap = rlimit(RLIMIT_STACK);
else if (gap > MAX_GAP)
gap = MAX_GAP;
- return PAGE_ALIGN(TASK_SIZE - gap - mmap_rnd());
+ return PAGE_ALIGN(TASK_SIZE - gap - rnd);
}
/*
* Bottom-up (legacy) layout on X86_32 did not support randomization, X86_64
* does, but not when emulating X86_32
*/
-static unsigned long mmap_legacy_base(void)
+static unsigned long mmap_legacy_base(unsigned long rnd)
{
if (mmap_is_ia32())
return TASK_UNMAPPED_BASE;
else
- return TASK_UNMAPPED_BASE + mmap_rnd();
+ return TASK_UNMAPPED_BASE + rnd;
}
/*
*/
void arch_pick_mmap_layout(struct mm_struct *mm)
{
- mm->mmap_legacy_base = mmap_legacy_base();
- mm->mmap_base = mmap_base();
+ unsigned long random_factor = 0UL;
+
+ if (current->flags & PF_RANDOMIZE)
+ random_factor = arch_mmap_rnd();
+
+ mm->mmap_legacy_base = mmap_legacy_base(random_factor);
if (mmap_is_legacy()) {
mm->mmap_base = mm->mmap_legacy_base;
mm->get_unmapped_area = arch_get_unmapped_area;
} else {
+ mm->mmap_base = mmap_base(random_factor);
mm->get_unmapped_area = arch_get_unmapped_area_topdown;
}
}
&memblock.reserved, mb->nid);
}
- /* Mark all kernel nodes. */
+ /*
+ * Mark all kernel nodes.
+ *
+ * When booting with mem=nn[kMG] or in a kdump kernel, numa_meminfo
+ * may not include all the memblock.reserved memory ranges because
+ * trim_snb_memory() reserves specific pages for Sandy Bridge graphics.
+ */
for_each_memblock(reserved, r)
- node_set(r->nid, numa_kernel_nodes);
+ if (r->nid != MAX_NUMNODES)
+ node_set(r->nid, numa_kernel_nodes);
/* Clear MEMBLOCK_HOTPLUG flag for memory in kernel nodes. */
for (i = 0; i < numa_meminfo.nr_blks; i++) {
seq_printf(m, "DirectMap4M: %8lu kB\n",
direct_pages_count[PG_LEVEL_2M] << 12);
#endif
-#ifdef CONFIG_X86_64
if (direct_gbpages)
seq_printf(m, "DirectMap1G: %8lu kB\n",
direct_pages_count[PG_LEVEL_1G] << 20);
-#endif
}
#else
static inline void split_page_count(int level) { }
{
return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
}
-EXPORT_SYMBOL_GPL(set_memory_ro);
int set_memory_rw(unsigned long addr, int numpages)
{
return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
}
-EXPORT_SYMBOL_GPL(set_memory_rw);
int set_memory_np(unsigned long addr, int numpages)
{
}
#ifdef CONFIG_STRICT_DEVMEM
-/* This check is done in drivers/char/mem.c in case of STRICT_DEVMEM*/
+/* This check is done in drivers/char/mem.c in case of STRICT_DEVMEM */
static inline int range_is_allowed(unsigned long pfn, unsigned long size)
{
return 1;
while (cursor < to) {
if (!devmem_is_allowed(pfn)) {
- printk(KERN_INFO "Program %s tried to access /dev/mem between [mem %#010Lx-%#010Lx]\n",
- current->comm, from, to - 1);
+ printk(KERN_INFO "Program %s tried to access /dev/mem between [mem %#010Lx-%#010Lx], PAT prevents it\n",
+ current->comm, from, to - 1);
return 0;
}
cursor += PAGE_SIZE;
#include <asm/pgtable.h>
#include <asm/tlb.h>
#include <asm/fixmap.h>
+#include <asm/mtrr.h>
#define PGALLOC_GFP GFP_KERNEL | __GFP_NOTRACK | __GFP_REPEAT | __GFP_ZERO
tlb_remove_page(tlb, pte);
}
-#if PAGETABLE_LEVELS > 2
+#if CONFIG_PGTABLE_LEVELS > 2
void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd)
{
struct page *page = virt_to_page(pmd);
tlb_remove_page(tlb, page);
}
-#if PAGETABLE_LEVELS > 3
+#if CONFIG_PGTABLE_LEVELS > 3
void ___pud_free_tlb(struct mmu_gather *tlb, pud_t *pud)
{
paravirt_release_pud(__pa(pud) >> PAGE_SHIFT);
tlb_remove_page(tlb, virt_to_page(pud));
}
-#endif /* PAGETABLE_LEVELS > 3 */
-#endif /* PAGETABLE_LEVELS > 2 */
+#endif /* CONFIG_PGTABLE_LEVELS > 3 */
+#endif /* CONFIG_PGTABLE_LEVELS > 2 */
static inline void pgd_list_add(pgd_t *pgd)
{
/* If the pgd points to a shared pagetable level (either the
ptes in non-PAE, or shared PMD in PAE), then just copy the
references from swapper_pg_dir. */
- if (PAGETABLE_LEVELS == 2 ||
- (PAGETABLE_LEVELS == 3 && SHARED_KERNEL_PMD) ||
- PAGETABLE_LEVELS == 4) {
+ if (CONFIG_PGTABLE_LEVELS == 2 ||
+ (CONFIG_PGTABLE_LEVELS == 3 && SHARED_KERNEL_PMD) ||
+ CONFIG_PGTABLE_LEVELS == 4) {
clone_pgd_range(pgd + KERNEL_PGD_BOUNDARY,
swapper_pg_dir + KERNEL_PGD_BOUNDARY,
KERNEL_PGD_PTRS);
}
}
+/*
+ * Xen paravirt assumes pgd table should be in one page. 64 bit kernel also
+ * assumes that pgd should be in one page.
+ *
+ * But kernel with PAE paging that is not running as a Xen domain
+ * only needs to allocate 32 bytes for pgd instead of one page.
+ */
+#ifdef CONFIG_X86_PAE
+
+#include <linux/slab.h>
+
+#define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t))
+#define PGD_ALIGN 32
+
+static struct kmem_cache *pgd_cache;
+
+static int __init pgd_cache_init(void)
+{
+ /*
+ * When PAE kernel is running as a Xen domain, it does not use
+ * shared kernel pmd. And this requires a whole page for pgd.
+ */
+ if (!SHARED_KERNEL_PMD)
+ return 0;
+
+ /*
+ * when PAE kernel is not running as a Xen domain, it uses
+ * shared kernel pmd. Shared kernel pmd does not require a whole
+ * page for pgd. We are able to just allocate a 32-byte for pgd.
+ * During boot time, we create a 32-byte slab for pgd table allocation.
+ */
+ pgd_cache = kmem_cache_create("pgd_cache", PGD_SIZE, PGD_ALIGN,
+ SLAB_PANIC, NULL);
+ if (!pgd_cache)
+ return -ENOMEM;
+
+ return 0;
+}
+core_initcall(pgd_cache_init);
+
+static inline pgd_t *_pgd_alloc(void)
+{
+ /*
+ * If no SHARED_KERNEL_PMD, PAE kernel is running as a Xen domain.
+ * We allocate one page for pgd.
+ */
+ if (!SHARED_KERNEL_PMD)
+ return (pgd_t *)__get_free_page(PGALLOC_GFP);
+
+ /*
+ * Now PAE kernel is not running as a Xen domain. We can allocate
+ * a 32-byte slab for pgd to save memory space.
+ */
+ return kmem_cache_alloc(pgd_cache, PGALLOC_GFP);
+}
+
+static inline void _pgd_free(pgd_t *pgd)
+{
+ if (!SHARED_KERNEL_PMD)
+ free_page((unsigned long)pgd);
+ else
+ kmem_cache_free(pgd_cache, pgd);
+}
+#else
+static inline pgd_t *_pgd_alloc(void)
+{
+ return (pgd_t *)__get_free_page(PGALLOC_GFP);
+}
+
+static inline void _pgd_free(pgd_t *pgd)
+{
+ free_page((unsigned long)pgd);
+}
+#endif /* CONFIG_X86_PAE */
+
pgd_t *pgd_alloc(struct mm_struct *mm)
{
pgd_t *pgd;
pmd_t *pmds[PREALLOCATED_PMDS];
- pgd = (pgd_t *)__get_free_page(PGALLOC_GFP);
+ pgd = _pgd_alloc();
if (pgd == NULL)
goto out;
out_free_pmds:
free_pmds(mm, pmds);
out_free_pgd:
- free_page((unsigned long)pgd);
+ _pgd_free(pgd);
out:
return NULL;
}
pgd_mop_up_pmds(mm, pgd);
pgd_dtor(pgd);
paravirt_pgd_free(mm, pgd);
- free_page((unsigned long)pgd);
+ _pgd_free(pgd);
}
/*
{
__native_set_fixmap(idx, pfn_pte(phys >> PAGE_SHIFT, flags));
}
+
+#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
+int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
+{
+ u8 mtrr;
+
+ /*
+ * Do not use a huge page when the range is covered by non-WB type
+ * of MTRRs.
+ */
+ mtrr = mtrr_type_lookup(addr, addr + PUD_SIZE);
+ if ((mtrr != MTRR_TYPE_WRBACK) && (mtrr != 0xFF))
+ return 0;
+
+ prot = pgprot_4k_2_large(prot);
+
+ set_pte((pte_t *)pud, pfn_pte(
+ (u64)addr >> PAGE_SHIFT,
+ __pgprot(pgprot_val(prot) | _PAGE_PSE)));
+
+ return 1;
+}
+
+int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
+{
+ u8 mtrr;
+
+ /*
+ * Do not use a huge page when the range is covered by non-WB type
+ * of MTRRs.
+ */
+ mtrr = mtrr_type_lookup(addr, addr + PMD_SIZE);
+ if ((mtrr != MTRR_TYPE_WRBACK) && (mtrr != 0xFF))
+ return 0;
+
+ prot = pgprot_4k_2_large(prot);
+
+ set_pte((pte_t *)pmd, pfn_pte(
+ (u64)addr >> PAGE_SHIFT,
+ __pgprot(pgprot_val(prot) | _PAGE_PSE)));
+
+ return 1;
+}
+
+int pud_clear_huge(pud_t *pud)
+{
+ if (pud_large(*pud)) {
+ pud_clear(pud);
+ return 1;
+ }
+
+ return 0;
+}
+
+int pmd_clear_huge(pmd_t *pmd)
+{
+ if (pmd_large(*pmd)) {
+ pmd_clear(pmd);
+ return 1;
+ }
+
+ return 0;
+}
+#endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
{
struct stack_frame *head = (struct stack_frame *)frame_pointer(regs);
- if (!user_mode_vm(regs)) {
+ if (!user_mode(regs)) {
unsigned long stack = kernel_stack_pointer(regs);
if (depth)
dump_trace(NULL, regs, (unsigned long *)stack, 0,
if (!bus) {
pci_free_resource_list(&resources);
kfree(sd);
+ return;
}
+ pci_bus_add_devices(bus);
}
void __init pcibios_set_cache_line_size(void)
image = efi_lookup_mapped_addr(bgrt_tab->image_address);
if (!image) {
- image = early_memremap(bgrt_tab->image_address,
+ image = early_ioremap(bgrt_tab->image_address,
sizeof(bmp_header));
ioremapped = true;
if (!image) {
}
if (ioremapped) {
- image = early_memremap(bgrt_tab->image_address,
+ image = early_ioremap(bgrt_tab->image_address,
bmp_header.size);
if (!image) {
pr_err("Ignoring BGRT: failed to map image memory\n");
efi_memory_desc_t *virtual_map)
{
efi_status_t status;
+ unsigned long flags;
+ pgd_t *save_pgd;
- efi_call_phys_prolog();
+ save_pgd = efi_call_phys_prolog();
+
+ /* Disable interrupts around EFI calls: */
+ local_irq_save(flags);
status = efi_call_phys(efi_phys.set_virtual_address_map,
memory_map_size, descriptor_size,
descriptor_version, virtual_map);
- efi_call_phys_epilog();
+ local_irq_restore(flags);
+
+ efi_call_phys_epilog(save_pgd);
+
return status;
}
if (efi_memmap_init())
return;
- print_efi_memmap();
+ if (efi_enabled(EFI_DBG))
+ print_efi_memmap();
}
void __init efi_late_init(void)
{
if (parse_option_str(str, "old_map"))
set_bit(EFI_OLD_MEMMAP, &efi.flags);
+ if (parse_option_str(str, "debug"))
+ set_bit(EFI_DBG, &efi.flags);
return 0;
}
/*
* To make EFI call EFI runtime service in physical addressing mode we need
- * prolog/epilog before/after the invocation to disable interrupt, to
- * claim EFI runtime service handler exclusively and to duplicate a memory in
- * low memory space say 0 - 3G.
+ * prolog/epilog before/after the invocation to claim the EFI runtime service
+ * handler exclusively and to duplicate a memory mapping in low memory space,
+ * say 0 - 3G.
*/
-static unsigned long efi_rt_eflags;
void efi_sync_low_kernel_mappings(void) {}
void __init efi_dump_pagetable(void) {}
void __init efi_map_region_fixed(efi_memory_desc_t *md) {}
void __init parse_efi_setup(u64 phys_addr, u32 data_len) {}
-void __init efi_call_phys_prolog(void)
+pgd_t * __init efi_call_phys_prolog(void)
{
struct desc_ptr gdt_descr;
+ pgd_t *save_pgd;
- local_irq_save(efi_rt_eflags);
-
+ /* Current pgd is swapper_pg_dir, we'll restore it later: */
+ save_pgd = swapper_pg_dir;
load_cr3(initial_page_table);
__flush_tlb_all();
gdt_descr.address = __pa(get_cpu_gdt_table(0));
gdt_descr.size = GDT_SIZE - 1;
load_gdt(&gdt_descr);
+
+ return save_pgd;
}
-void __init efi_call_phys_epilog(void)
+void __init efi_call_phys_epilog(pgd_t *save_pgd)
{
struct desc_ptr gdt_descr;
gdt_descr.size = GDT_SIZE - 1;
load_gdt(&gdt_descr);
- load_cr3(swapper_pg_dir);
+ load_cr3(save_pgd);
__flush_tlb_all();
-
- local_irq_restore(efi_rt_eflags);
}
void __init efi_runtime_mkexec(void)
#include <asm/realmode.h>
#include <asm/time.h>
-static pgd_t *save_pgd __initdata;
-static unsigned long efi_flags __initdata;
-
/*
* We allocate runtime services regions bottom-up, starting from -4G, i.e.
* 0xffff_ffff_0000_0000 and limit EFI VA mapping space to 64G.
}
}
-void __init efi_call_phys_prolog(void)
+pgd_t * __init efi_call_phys_prolog(void)
{
unsigned long vaddress;
+ pgd_t *save_pgd;
+
int pgd;
int n_pgds;
if (!efi_enabled(EFI_OLD_MEMMAP))
- return;
+ return NULL;
early_code_mapping_set_exec(1);
- local_irq_save(efi_flags);
n_pgds = DIV_ROUND_UP((max_pfn << PAGE_SHIFT), PGDIR_SIZE);
save_pgd = kmalloc(n_pgds * sizeof(pgd_t), GFP_KERNEL);
set_pgd(pgd_offset_k(pgd * PGDIR_SIZE), *pgd_offset_k(vaddress));
}
__flush_tlb_all();
+
+ return save_pgd;
}
-void __init efi_call_phys_epilog(void)
+void __init efi_call_phys_epilog(pgd_t *save_pgd)
{
/*
* After the lock is released, the original page table is restored.
*/
- int pgd;
- int n_pgds = DIV_ROUND_UP((max_pfn << PAGE_SHIFT) , PGDIR_SIZE);
+ int pgd_idx;
+ int nr_pgds;
- if (!efi_enabled(EFI_OLD_MEMMAP))
+ if (!save_pgd)
return;
- for (pgd = 0; pgd < n_pgds; pgd++)
- set_pgd(pgd_offset_k(pgd * PGDIR_SIZE), save_pgd[pgd]);
+ nr_pgds = DIV_ROUND_UP((max_pfn << PAGE_SHIFT) , PGDIR_SIZE);
+
+ for (pgd_idx = 0; pgd_idx < nr_pgds; pgd_idx++)
+ set_pgd(pgd_offset_k(pgd_idx * PGDIR_SIZE), save_pgd[pgd_idx]);
+
kfree(save_pgd);
+
__flush_tlb_all();
- local_irq_restore(efi_flags);
early_code_mapping_set_exec(0);
}
*/
#include <asm-generic/sections.h>
+#include <asm/cpu_device_id.h>
#include <asm/imr.h>
#include <linux/init.h>
#include <linux/mm.h>
}
}
+static const struct x86_cpu_id imr_ids[] __initconst = {
+ { X86_VENDOR_INTEL, 5, 9 }, /* Intel Quark SoC X1000. */
+ {}
+};
+MODULE_DEVICE_TABLE(x86cpu, imr_ids);
+
/**
* imr_self_test_init - entry point for IMR driver.
*
*/
static int __init imr_self_test_init(void)
{
- imr_self_test();
+ if (x86_match_cpu(imr_ids))
+ imr_self_test();
return 0;
}
if (psy) {
power_supply_changed(psy);
- put_device(psy->dev);
+ power_supply_put(psy);
}
}
if (psy) {
power_supply_changed(psy);
- put_device(psy->dev);
+ power_supply_put(psy);
}
}
if (psy) {
power_supply_changed(psy);
- put_device(psy->dev);
+ power_supply_put(psy);
}
}
if (psy) {
power_supply_changed(psy);
- put_device(psy->dev);
+ power_supply_put(psy);
}
}
struct reset_args reset_args;
reset_args.sender = sender;
- cpus_clear(*mask);
+ cpumask_clear(mask);
/* find a single cpu for each uvhub in this distribution mask */
maskbits = sizeof(struct pnmask) * BITSPERBYTE;
/* each bit is a pnode relative to the partition base pnode */
continue;
apnode = pnode + bcp->partition_base_pnode;
cpu = pnode_to_first_cpu(apnode, smaster);
- cpu_set(cpu, *mask);
+ cpumask_set_cpu(cpu, mask);
}
/* IPI all cpus; preemption is already disabled */
/* don't actually do a shootdown of the local cpu */
cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
- if (cpu_isset(cpu, *cpumask))
+ if (cpumask_test_cpu(cpu, cpumask))
stat->s_ntargself++;
bau_desc = bcp->descriptor_base;
static void fix_processor_context(void)
{
int cpu = smp_processor_id();
- struct tss_struct *t = &per_cpu(init_tss, cpu);
+ struct tss_struct *t = &per_cpu(cpu_tss, cpu);
#ifdef CONFIG_X86_64
struct desc_struct *desc = get_cpu_gdt_table(cpu);
tss_desc tss;
110 i386 iopl sys_iopl
111 i386 vhangup sys_vhangup
112 i386 idle
-113 i386 vm86old sys_vm86old sys32_vm86_warning
+113 i386 vm86old sys_vm86old sys_ni_syscall
114 i386 wait4 sys_wait4 compat_sys_wait4
115 i386 swapoff sys_swapoff
116 i386 sysinfo sys_sysinfo compat_sys_sysinfo
163 i386 mremap sys_mremap
164 i386 setresuid sys_setresuid16
165 i386 getresuid sys_getresuid16
-166 i386 vm86 sys_vm86 sys32_vm86_warning
+166 i386 vm86 sys_vm86 sys_ni_syscall
167 i386 query_module
168 i386 poll sys_poll
169 i386 nfsservctl
169 common reboot sys_reboot
170 common sethostname sys_sethostname
171 common setdomainname sys_setdomainname
-172 common iopl stub_iopl
+172 common iopl sys_iopl
173 common ioperm sys_ioperm
174 64 create_module
175 common init_module sys_init_module
*/
static inline void rdtsc_barrier(void)
{
- alternative(ASM_NOP3, "mfence", X86_FEATURE_MFENCE_RDTSC);
- alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
+ alternative_2("", "mfence", X86_FEATURE_MFENCE_RDTSC,
+ "lfence", X86_FEATURE_LFENCE_RDTSC);
}
#endif
*/
/* Not going to be implemented by UML, since we have no hardware. */
-#define stub_iopl sys_ni_syscall
+#define sys_iopl sys_ni_syscall
#define sys_ioperm sys_ni_syscall
/*
$(obj)/vdso64.so.dbg: $(src)/vdso.lds $(vobjs) FORCE
$(call if_changed,vdso)
-HOST_EXTRACFLAGS += -I$(srctree)/tools/include
+HOST_EXTRACFLAGS += -I$(srctree)/tools/include -I$(srctree)/include/uapi
hostprogs-y += vdso2c
quiet_cmd_vdso2c = VDSO2C $@
PHONY += vdso_install $(vdso_img_insttargets)
vdso_install: $(vdso_img_insttargets) FORCE
-clean-files := vdso32-syscall* vdso32-sysenter* vdso32-int80* vdso64*
+clean-files := vdso32-syscall* vdso32-sysenter* vdso32-int80* vdso64* vdso-image-*.c vdsox32.so*
cycle_t ret;
u64 last;
u32 version;
+ u32 migrate_count;
u8 flags;
unsigned cpu, cpu1;
/*
- * Note: hypervisor must guarantee that:
- * 1. cpu ID number maps 1:1 to per-CPU pvclock time info.
- * 2. that per-CPU pvclock time info is updated if the
- * underlying CPU changes.
- * 3. that version is increased whenever underlying CPU
- * changes.
- *
+ * When looping to get a consistent (time-info, tsc) pair, we
+ * also need to deal with the possibility we can switch vcpus,
+ * so make sure we always re-fetch time-info for the current vcpu.
*/
do {
cpu = __getcpu() & VGETCPU_CPU_MASK;
* __getcpu() calls (Gleb).
*/
- pvti = get_pvti(cpu);
+ /* Make sure migrate_count will change if we leave the VCPU. */
+ do {
+ pvti = get_pvti(cpu);
+ migrate_count = pvti->migrate_count;
+
+ cpu1 = cpu;
+ cpu = __getcpu() & VGETCPU_CPU_MASK;
+ } while (unlikely(cpu != cpu1));
version = __pvclock_read_cycles(&pvti->pvti, &ret, &flags);
/*
* Test we're still on the cpu as well as the version.
- * We could have been migrated just after the first
- * vgetcpu but before fetching the version, so we
- * wouldn't notice a version change.
+ * - We must read TSC of pvti's VCPU.
+ * - KVM doesn't follow the versioning protocol, so data could
+ * change before version if we left the VCPU.
*/
- cpu1 = __getcpu() & VGETCPU_CPU_MASK;
- } while (unlikely(cpu != cpu1 ||
- (pvti->pvti.version & 1) ||
- pvti->pvti.version != version));
+ smp_rmb();
+ } while (unlikely((pvti->pvti.version & 1) ||
+ pvti->pvti.version != version ||
+ pvti->migrate_count != migrate_count));
if (unlikely(!(flags & PVCLOCK_TSC_STABLE_BIT)))
*mode = VCLOCK_NONE;
.Lpush_ebp:
movl %ecx, %ebp
syscall
- movl $__USER32_DS, %ecx
- movl %ecx, %ss
movl %ebp, %ecx
popl %ebp
.Lpop_ebp:
mcs = xen_mc_entry(0);
MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
xen_mc_issue(PARAVIRT_LAZY_CPU);
+ tss->x86_tss.sp0 = thread->sp0;
}
static void xen_set_iopl_mask(unsigned mask)
}
PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
-#if PAGETABLE_LEVELS == 4
+#if CONFIG_PGTABLE_LEVELS == 4
__visible pudval_t xen_pud_val(pud_t pud)
{
return pte_mfn_to_pfn(pud.pud);
xen_mc_issue(PARAVIRT_LAZY_MMU);
}
-#endif /* PAGETABLE_LEVELS == 4 */
+#endif /* CONFIG_PGTABLE_LEVELS == 4 */
/*
* (Yet another) pagetable walker. This one is intended for pinning a
xen_release_ptpage(pfn, PT_PMD);
}
-#if PAGETABLE_LEVELS == 4
+#if CONFIG_PGTABLE_LEVELS == 4
static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
{
xen_alloc_ptpage(mm, pfn, PT_PUD);
pv_mmu_ops.set_pte = xen_set_pte;
pv_mmu_ops.set_pmd = xen_set_pmd;
pv_mmu_ops.set_pud = xen_set_pud;
-#if PAGETABLE_LEVELS == 4
+#if CONFIG_PGTABLE_LEVELS == 4
pv_mmu_ops.set_pgd = xen_set_pgd;
#endif
pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
pv_mmu_ops.release_pte = xen_release_pte;
pv_mmu_ops.release_pmd = xen_release_pmd;
-#if PAGETABLE_LEVELS == 4
+#if CONFIG_PGTABLE_LEVELS == 4
pv_mmu_ops.alloc_pud = xen_alloc_pud;
pv_mmu_ops.release_pud = xen_release_pud;
#endif
.make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
.pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
-#if PAGETABLE_LEVELS == 4
+#if CONFIG_PGTABLE_LEVELS == 4
.pud_val = PV_CALLEE_SAVE(xen_pud_val),
.make_pud = PV_CALLEE_SAVE(xen_make_pud),
.set_pgd = xen_set_pgd_hyper,
.alloc_pud = xen_alloc_pmd_init,
.release_pud = xen_release_pmd_init,
-#endif /* PAGETABLE_LEVELS == 4 */
+#endif /* CONFIG_PGTABLE_LEVELS == 4 */
.activate_mm = xen_activate_mm,
.dup_mmap = xen_dup_mmap,
set_cpu_online(cpu, true);
- this_cpu_write(cpu_state, CPU_ONLINE);
-
- wmb();
+ cpu_set_state_online(cpu); /* Implies full memory barrier. */
/* We can take interrupts now: we're officially "up". */
local_irq_enable();
-
- wmb(); /* make sure everything is out */
}
/*
{
int rc;
- per_cpu(current_task, cpu) = idle;
-#ifdef CONFIG_X86_32
- irq_ctx_init(cpu);
-#else
- clear_tsk_thread_flag(idle, TIF_FORK);
-#endif
- per_cpu(kernel_stack, cpu) =
- (unsigned long)task_stack_page(idle) -
- KERNEL_STACK_OFFSET + THREAD_SIZE;
+ common_cpu_up(cpu, idle);
xen_setup_runstate_info(cpu);
xen_setup_timer(cpu);
xen_init_lock_cpu(cpu);
- per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
+ /*
+ * PV VCPUs are always successfully taken down (see 'while' loop
+ * in xen_cpu_die()), so -EBUSY is an error.
+ */
+ rc = cpu_check_up_prepare(cpu);
+ if (rc)
+ return rc;
/* make sure interrupts start blocked */
per_cpu(xen_vcpu, cpu)->evtchn_upcall_mask = 1;
if (rc)
return rc;
- if (num_online_cpus() == 1)
- /* Just in case we booted with a single CPU. */
- alternatives_enable_smp();
-
rc = xen_smp_intr_init(cpu);
if (rc)
return rc;
rc = HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL);
BUG_ON(rc);
- while(per_cpu(cpu_state, cpu) != CPU_ONLINE) {
+ while (cpu_report_state(cpu) != CPU_ONLINE)
HYPERVISOR_sched_op(SCHEDOP_yield, NULL);
- barrier();
- }
return 0;
}
schedule_timeout(HZ/10);
}
- cpu_die_common(cpu);
-
- xen_smp_intr_free(cpu);
- xen_uninit_lock_cpu(cpu);
- xen_teardown_timer(cpu);
+ if (common_cpu_die(cpu) == 0) {
+ xen_smp_intr_free(cpu);
+ xen_uninit_lock_cpu(cpu);
+ xen_teardown_timer(cpu);
+ }
}
static void xen_play_dead(void) /* used only with HOTPLUG_CPU */
static int xen_hvm_cpu_up(unsigned int cpu, struct task_struct *tidle)
{
int rc;
+
+ /*
+ * This can happen if CPU was offlined earlier and
+ * offlining timed out in common_cpu_die().
+ */
+ if (cpu_report_state(cpu) == CPU_DEAD_FROZEN) {
+ xen_smp_intr_free(cpu);
+ xen_uninit_lock_cpu(cpu);
+ }
+
/*
* xen_smp_intr_init() needs to run before native_cpu_up()
* so that IPI vectors are set up on the booting CPU before
return rc;
}
-static void xen_hvm_cpu_die(unsigned int cpu)
-{
- xen_cpu_die(cpu);
- native_cpu_die(cpu);
-}
-
void __init xen_hvm_smp_init(void)
{
if (!xen_have_vector_callback)
smp_ops.smp_prepare_cpus = xen_hvm_smp_prepare_cpus;
smp_ops.smp_send_reschedule = xen_smp_send_reschedule;
smp_ops.cpu_up = xen_hvm_cpu_up;
- smp_ops.cpu_die = xen_hvm_cpu_die;
+ smp_ops.cpu_die = xen_cpu_die;
smp_ops.send_call_func_ipi = xen_smp_send_call_function_ipi;
smp_ops.send_call_func_single_ipi = xen_smp_send_call_function_single_ipi;
smp_ops.smp_prepare_boot_cpu = xen_smp_prepare_boot_cpu;
#include <linux/types.h>
-#include <linux/clockchips.h>
+#include <linux/tick.h>
#include <xen/interface/xen.h>
#include <xen/grant_table.h>
static void xen_vcpu_notify_restore(void *data)
{
- unsigned long reason = (unsigned long)data;
-
/* Boot processor notified via generic timekeeping_resume() */
- if ( smp_processor_id() == 0)
+ if (smp_processor_id() == 0)
return;
- clockevents_notify(reason, NULL);
+ tick_resume_local();
}
void xen_arch_resume(void)
{
- on_each_cpu(xen_vcpu_notify_restore,
- (void *)CLOCK_EVT_NOTIFY_RESUME, 1);
+ on_each_cpu(xen_vcpu_notify_restore, NULL, 1);
}
* We're already on the usermode stack at this point, but
* still with the kernel gs, so we can easily switch back
*/
- movq %rsp, PER_CPU_VAR(old_rsp)
+ movq %rsp, PER_CPU_VAR(rsp_scratch)
movq PER_CPU_VAR(kernel_stack), %rsp
pushq $__USER_DS
- pushq PER_CPU_VAR(old_rsp)
+ pushq PER_CPU_VAR(rsp_scratch)
pushq %r11
pushq $__USER_CS
pushq %rcx
* We're already on the usermode stack at this point, but
* still with the kernel gs, so we can easily switch back
*/
- movq %rsp, PER_CPU_VAR(old_rsp)
+ movq %rsp, PER_CPU_VAR(rsp_scratch)
movq PER_CPU_VAR(kernel_stack), %rsp
pushq $__USER32_DS
- pushq PER_CPU_VAR(old_rsp)
+ pushq PER_CPU_VAR(rsp_scratch)
pushq %r11
pushq $__USER32_CS
pushq %rcx
struct pci_controller *pci_ctrl;
struct list_head resources;
struct pci_bus *bus;
- int next_busno = 0;
+ int next_busno = 0, ret;
printk("PCI: Probing PCI hardware\n");
pci_controller_apertures(pci_ctrl, &resources);
bus = pci_scan_root_bus(NULL, pci_ctrl->first_busno,
pci_ctrl->ops, pci_ctrl, &resources);
+ if (!bus)
+ continue;
+
pci_ctrl->bus = bus;
pci_ctrl->last_busno = bus->busn_res.end;
if (next_busno <= pci_ctrl->last_busno)
next_busno = pci_ctrl->last_busno+1;
}
pci_bus_count = next_busno;
+ ret = platform_pcibios_fixup();
+ if (ret)
+ return ret;
- return platform_pcibios_fixup();
+ for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) {
+ if (pci_ctrl->bus)
+ pci_bus_add_devices(pci_ctrl->bus);
+ }
+
+ return 0;
}
subsys_initcall(pcibios_init);
regs->areg[8] = (unsigned long) &frame->uc;
regs->threadptr = tp;
- /* Set access mode to USER_DS. Nomenclature is outdated, but
- * functionality is used in uaccess.h
- */
- set_fs(USER_DS);
-
#if DEBUG_SIG
printk("SIG rt deliver (%s:%d): signal=%d sp=%p pc=%08x\n",
current->comm, current->pid, signal, frame, regs->pc);
{
struct iovec iov;
struct iov_iter i;
+ int ret = import_single_range(rq_data_dir(rq), ubuf, len, &iov, &i);
- iov.iov_base = ubuf;
- iov.iov_len = len;
- iov_iter_init(&i, rq_data_dir(rq), &iov, 1, len);
+ if (unlikely(ret < 0))
+ return ret;
return blk_rq_map_user_iov(q, rq, map_data, &i, gfp_mask);
}
do {
page = alloc_pages_node(set->numa_node,
- GFP_KERNEL | __GFP_NOWARN | __GFP_NORETRY,
+ GFP_KERNEL | __GFP_NOWARN | __GFP_NORETRY | __GFP_ZERO,
this_order);
if (page)
break;
left -= to_do * rq_size;
for (j = 0; j < to_do; j++) {
tags->rqs[i] = p;
- tags->rqs[i]->atomic_flags = 0;
- tags->rqs[i]->cmd_flags = 0;
if (set->ops->init_request) {
if (set->ops->init_request(set->driver_data,
tags->rqs[i], hctx_idx, i,
struct iov_iter i;
struct iovec *iov = NULL;
- ret = rw_copy_check_uvector(-1, hdr->dxferp, hdr->iovec_count,
- 0, NULL, &iov);
- if (ret < 0) {
- kfree(iov);
+ ret = import_iovec(rq_data_dir(rq),
+ hdr->dxferp, hdr->iovec_count,
+ 0, &iov, &i);
+ if (ret < 0)
goto out_free_cdb;
- }
/* SG_IO howto says that the shorter of the two wins */
- iov_iter_init(&i, rq_data_dir(rq), iov, hdr->iovec_count,
- min_t(unsigned, ret, hdr->dxfer_len));
+ iov_iter_truncate(&i, hdr->dxfer_len);
ret = blk_rq_map_user_iov(q, rq, NULL, &i, GFP_KERNEL);
kfree(iov);
};
struct acpi_ac {
- struct power_supply charger;
+ struct power_supply *charger;
+ struct power_supply_desc charger_desc;
struct acpi_device * device;
unsigned long long state;
struct notifier_block battery_nb;
};
-#define to_acpi_ac(x) container_of(x, struct acpi_ac, charger)
+#define to_acpi_ac(x) power_supply_get_drvdata(x)
#ifdef CONFIG_ACPI_PROCFS_POWER
static const struct file_operations acpi_ac_fops = {
dev_name(&device->dev), event,
(u32) ac->state);
acpi_notifier_call_chain(device, event, (u32) ac->state);
- kobject_uevent(&ac->charger.dev->kobj, KOBJ_CHANGE);
+ kobject_uevent(&ac->charger->dev.kobj, KOBJ_CHANGE);
}
return;
static int acpi_ac_add(struct acpi_device *device)
{
+ struct power_supply_config psy_cfg = {};
int result = 0;
struct acpi_ac *ac = NULL;
if (result)
goto end;
- ac->charger.name = acpi_device_bid(device);
+ psy_cfg.drv_data = ac;
+
+ ac->charger_desc.name = acpi_device_bid(device);
#ifdef CONFIG_ACPI_PROCFS_POWER
result = acpi_ac_add_fs(ac);
if (result)
goto end;
#endif
- ac->charger.type = POWER_SUPPLY_TYPE_MAINS;
- ac->charger.properties = ac_props;
- ac->charger.num_properties = ARRAY_SIZE(ac_props);
- ac->charger.get_property = get_ac_property;
- result = power_supply_register(&ac->device->dev, &ac->charger);
- if (result)
+ ac->charger_desc.type = POWER_SUPPLY_TYPE_MAINS;
+ ac->charger_desc.properties = ac_props;
+ ac->charger_desc.num_properties = ARRAY_SIZE(ac_props);
+ ac->charger_desc.get_property = get_ac_property;
+ ac->charger = power_supply_register(&ac->device->dev,
+ &ac->charger_desc, &psy_cfg);
+ if (IS_ERR(ac->charger)) {
+ result = PTR_ERR(ac->charger);
goto end;
+ }
printk(KERN_INFO PREFIX "%s [%s] (%s)\n",
acpi_device_name(device), acpi_device_bid(device),
if (acpi_ac_get_state(ac))
return 0;
if (old_state != ac->state)
- kobject_uevent(&ac->charger.dev->kobj, KOBJ_CHANGE);
+ kobject_uevent(&ac->charger->dev.kobj, KOBJ_CHANGE);
return 0;
}
#else
ac = acpi_driver_data(device);
- if (ac->charger.dev)
- power_supply_unregister(&ac->charger);
+ power_supply_unregister(ac->charger);
unregister_acpi_notifier(&ac->battery_nb);
#ifdef CONFIG_ACPI_PROCFS_POWER
#include <linux/kthread.h>
#include <linux/freezer.h>
#include <linux/cpu.h>
-#include <linux/clockchips.h>
+#include <linux/tick.h>
#include <linux/slab.h>
#include <linux/acpi.h>
#include <asm/mwait.h>
static unsigned char tsc_detected_unstable;
static unsigned char tsc_marked_unstable;
-static unsigned char lapic_detected_unstable;
-static unsigned char lapic_marked_unstable;
static void power_saving_mwait_init(void)
{
*/
if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
tsc_detected_unstable = 1;
- if (!boot_cpu_has(X86_FEATURE_ARAT))
- lapic_detected_unstable = 1;
break;
default:
- /* TSC & LAPIC could halt in idle */
+ /* TSC could halt in idle */
tsc_detected_unstable = 1;
- lapic_detected_unstable = 1;
}
#endif
}
sched_setscheduler(current, SCHED_RR, ¶m);
while (!kthread_should_stop()) {
- int cpu;
unsigned long expire_time;
try_to_freeze();
mark_tsc_unstable("TSC halts in idle");
tsc_marked_unstable = 1;
}
- if (lapic_detected_unstable && !lapic_marked_unstable) {
- int i;
- /* LAPIC could halt in idle, so notify users */
- for_each_online_cpu(i)
- clockevents_notify(
- CLOCK_EVT_NOTIFY_BROADCAST_ON,
- &i);
- lapic_marked_unstable = 1;
- }
local_irq_disable();
- cpu = smp_processor_id();
- if (lapic_marked_unstable)
- clockevents_notify(
- CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
+ tick_broadcast_enable();
+ tick_broadcast_enter();
stop_critical_timings();
mwait_idle_with_hints(power_saving_mwait_eax, 1);
start_critical_timings();
- if (lapic_marked_unstable)
- clockevents_notify(
- CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
+ tick_broadcast_exit();
local_irq_enable();
if (time_before(expire_time, jiffies)) {
struct acpi_battery {
struct mutex lock;
struct mutex sysfs_lock;
- struct power_supply bat;
+ struct power_supply *bat;
+ struct power_supply_desc bat_desc;
struct acpi_device *device;
struct notifier_block pm_nb;
unsigned long update_time;
unsigned long flags;
};
-#define to_acpi_battery(x) container_of(x, struct acpi_battery, bat)
+#define to_acpi_battery(x) power_supply_get_drvdata(x)
static inline int acpi_battery_present(struct acpi_battery *battery)
{
static int sysfs_add_battery(struct acpi_battery *battery)
{
- int result;
+ struct power_supply_config psy_cfg = { .drv_data = battery, };
if (battery->power_unit == ACPI_BATTERY_POWER_UNIT_MA) {
- battery->bat.properties = charge_battery_props;
- battery->bat.num_properties =
+ battery->bat_desc.properties = charge_battery_props;
+ battery->bat_desc.num_properties =
ARRAY_SIZE(charge_battery_props);
} else {
- battery->bat.properties = energy_battery_props;
- battery->bat.num_properties =
+ battery->bat_desc.properties = energy_battery_props;
+ battery->bat_desc.num_properties =
ARRAY_SIZE(energy_battery_props);
}
- battery->bat.name = acpi_device_bid(battery->device);
- battery->bat.type = POWER_SUPPLY_TYPE_BATTERY;
- battery->bat.get_property = acpi_battery_get_property;
+ battery->bat_desc.name = acpi_device_bid(battery->device);
+ battery->bat_desc.type = POWER_SUPPLY_TYPE_BATTERY;
+ battery->bat_desc.get_property = acpi_battery_get_property;
- result = power_supply_register_no_ws(&battery->device->dev, &battery->bat);
+ battery->bat = power_supply_register_no_ws(&battery->device->dev,
+ &battery->bat_desc, &psy_cfg);
- if (result)
+ if (IS_ERR(battery->bat)) {
+ int result = PTR_ERR(battery->bat);
+
+ battery->bat = NULL;
return result;
- return device_create_file(battery->bat.dev, &alarm_attr);
+ }
+ return device_create_file(&battery->bat->dev, &alarm_attr);
}
static void sysfs_remove_battery(struct acpi_battery *battery)
{
mutex_lock(&battery->sysfs_lock);
- if (!battery->bat.dev) {
+ if (!battery->bat) {
mutex_unlock(&battery->sysfs_lock);
return;
}
- device_remove_file(battery->bat.dev, &alarm_attr);
- power_supply_unregister(&battery->bat);
- battery->bat.dev = NULL;
+ device_remove_file(&battery->bat->dev, &alarm_attr);
+ power_supply_unregister(battery->bat);
+ battery->bat = NULL;
mutex_unlock(&battery->sysfs_lock);
}
return result;
acpi_battery_init_alarm(battery);
}
- if (!battery->bat.dev) {
+ if (!battery->bat) {
result = sysfs_add_battery(battery);
if (result)
return result;
{
int power_unit;
- if (!battery->bat.dev)
+ if (!battery->bat)
return;
power_unit = battery->power_unit;
static void acpi_battery_notify(struct acpi_device *device, u32 event)
{
struct acpi_battery *battery = acpi_driver_data(device);
- struct device *old;
+ struct power_supply *old;
if (!battery)
return;
- old = battery->bat.dev;
+ old = battery->bat;
/*
* On Acer Aspire V5-573G notifications are sometimes triggered too
* early. For example, when AC is unplugged and notification is
acpi_battery_present(battery));
acpi_notifier_call_chain(device, event, acpi_battery_present(battery));
/* acpi_battery_update could remove power_supply object */
- if (old && battery->bat.dev)
- power_supply_changed(&battery->bat);
+ if (old && battery->bat)
+ power_supply_changed(battery->bat);
}
static int battery_notify(struct notifier_block *nb,
if (!acpi_battery_present(battery))
return 0;
- if (!battery->bat.dev) {
+ if (!battery->bat) {
result = acpi_battery_get_info(battery);
if (result)
return result;
}
EXPORT_SYMBOL(acpi_pci_osc_control_set);
-static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm,
- int *clear_aspm)
+static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm)
{
u32 support, control, requested;
acpi_status status;
decode_osc_control(root, "OS now controls", control);
if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
/*
- * We have ASPM control, but the FADT indicates
- * that it's unsupported. Clear it.
+ * We have ASPM control, but the FADT indicates that
+ * it's unsupported. Leave existing configuration
+ * intact and prevent the OS from touching it.
*/
- *clear_aspm = 1;
+ dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n");
+ *no_aspm = 1;
}
} else {
decode_osc_control(root, "OS requested", requested);
int result;
struct acpi_pci_root *root;
acpi_handle handle = device->handle;
- int no_aspm = 0, clear_aspm = 0;
+ int no_aspm = 0;
bool hotadd = system_state != SYSTEM_BOOTING;
root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle);
- negotiate_os_control(root, &no_aspm, &clear_aspm);
+ negotiate_os_control(root, &no_aspm);
/*
* TBD: Need PCI interface for enumeration/configuration of roots.
goto remove_dmar;
}
- if (clear_aspm) {
- dev_info(&device->dev, "Disabling ASPM (FADT indicates it is unsupported)\n");
- pcie_clear_aspm(root->bus);
- }
if (no_aspm)
pcie_no_aspm();
#include <linux/acpi.h>
#include <linux/dmi.h>
#include <linux/sched.h> /* need_resched() */
-#include <linux/clockchips.h>
+#include <linux/tick.h>
#include <linux/cpuidle.h>
#include <linux/syscore_ops.h>
#include <acpi/processor.h>
static void __lapic_timer_propagate_broadcast(void *arg)
{
struct acpi_processor *pr = (struct acpi_processor *) arg;
- unsigned long reason;
- reason = pr->power.timer_broadcast_on_state < INT_MAX ?
- CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
-
- clockevents_notify(reason, &pr->id);
+ if (pr->power.timer_broadcast_on_state < INT_MAX)
+ tick_broadcast_enable();
+ else
+ tick_broadcast_disable();
}
static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
int state = cx - pr->power.states;
if (state >= pr->power.timer_broadcast_on_state) {
- unsigned long reason;
-
- reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
- CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
- clockevents_notify(reason, &pr->id);
+ if (broadcast)
+ tick_broadcast_enter();
+ else
+ tick_broadcast_exit();
}
}
return -EINVAL;
drv->safe_state_index = -1;
- for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
+ for (i = CPUIDLE_DRIVER_STATE_START; i < CPUIDLE_STATE_MAX; i++) {
drv->states[i].name[0] = '\0';
drv->states[i].desc[0] = '\0';
}
MODULE_DEVICE_TABLE(acpi, sbs_device_ids);
struct acpi_battery {
- struct power_supply bat;
+ struct power_supply *bat;
+ struct power_supply_desc bat_desc;
struct acpi_sbs *sbs;
unsigned long update_time;
char name[8];
u8 have_sysfs_alarm:1;
};
-#define to_acpi_battery(x) container_of(x, struct acpi_battery, bat)
+#define to_acpi_battery(x) power_supply_get_drvdata(x)
struct acpi_sbs {
- struct power_supply charger;
+ struct power_supply *charger;
struct acpi_device *device;
struct acpi_smb_hc *hc;
struct mutex lock;
u8 charger_exists:1;
};
-#define to_acpi_sbs(x) container_of(x, struct acpi_sbs, charger)
+#define to_acpi_sbs(x) power_supply_get_drvdata(x)
static int acpi_sbs_remove(struct acpi_device *device);
static int acpi_battery_get_state(struct acpi_battery *battery);
POWER_SUPPLY_PROP_MANUFACTURER,
};
+static const struct power_supply_desc acpi_sbs_charger_desc = {
+ .name = "sbs-charger",
+ .type = POWER_SUPPLY_TYPE_MAINS,
+ .properties = sbs_ac_props,
+ .num_properties = ARRAY_SIZE(sbs_ac_props),
+ .get_property = sbs_get_ac_property,
+};
/* --------------------------------------------------------------------------
Smart Battery System Management
static int acpi_battery_add(struct acpi_sbs *sbs, int id)
{
struct acpi_battery *battery = &sbs->battery[id];
+ struct power_supply_config psy_cfg = { .drv_data = battery, };
int result;
battery->id = id;
return result;
sprintf(battery->name, ACPI_BATTERY_DIR_NAME, id);
- battery->bat.name = battery->name;
- battery->bat.type = POWER_SUPPLY_TYPE_BATTERY;
+ battery->bat_desc.name = battery->name;
+ battery->bat_desc.type = POWER_SUPPLY_TYPE_BATTERY;
if (!acpi_battery_mode(battery)) {
- battery->bat.properties = sbs_charge_battery_props;
- battery->bat.num_properties =
+ battery->bat_desc.properties = sbs_charge_battery_props;
+ battery->bat_desc.num_properties =
ARRAY_SIZE(sbs_charge_battery_props);
} else {
- battery->bat.properties = sbs_energy_battery_props;
- battery->bat.num_properties =
+ battery->bat_desc.properties = sbs_energy_battery_props;
+ battery->bat_desc.num_properties =
ARRAY_SIZE(sbs_energy_battery_props);
}
- battery->bat.get_property = acpi_sbs_battery_get_property;
- result = power_supply_register(&sbs->device->dev, &battery->bat);
- if (result)
+ battery->bat_desc.get_property = acpi_sbs_battery_get_property;
+ battery->bat = power_supply_register(&sbs->device->dev,
+ &battery->bat_desc, &psy_cfg);
+ if (IS_ERR(battery->bat)) {
+ result = PTR_ERR(battery->bat);
+ battery->bat = NULL;
goto end;
+ }
- result = device_create_file(battery->bat.dev, &alarm_attr);
+ result = device_create_file(&battery->bat->dev, &alarm_attr);
if (result)
goto end;
battery->have_sysfs_alarm = 1;
{
struct acpi_battery *battery = &sbs->battery[id];
- if (battery->bat.dev) {
+ if (battery->bat) {
if (battery->have_sysfs_alarm)
- device_remove_file(battery->bat.dev, &alarm_attr);
- power_supply_unregister(&battery->bat);
+ device_remove_file(&battery->bat->dev, &alarm_attr);
+ power_supply_unregister(battery->bat);
}
}
static int acpi_charger_add(struct acpi_sbs *sbs)
{
int result;
+ struct power_supply_config psy_cfg = { .drv_data = sbs, };
result = acpi_ac_get_present(sbs);
if (result)
goto end;
sbs->charger_exists = 1;
- sbs->charger.name = "sbs-charger";
- sbs->charger.type = POWER_SUPPLY_TYPE_MAINS;
- sbs->charger.properties = sbs_ac_props;
- sbs->charger.num_properties = ARRAY_SIZE(sbs_ac_props);
- sbs->charger.get_property = sbs_get_ac_property;
- power_supply_register(&sbs->device->dev, &sbs->charger);
+ sbs->charger = power_supply_register(&sbs->device->dev,
+ &acpi_sbs_charger_desc, &psy_cfg);
+ if (IS_ERR(sbs->charger)) {
+ result = PTR_ERR(sbs->charger);
+ sbs->charger = NULL;
+ }
printk(KERN_INFO PREFIX "%s [%s]: AC Adapter [%s] (%s)\n",
ACPI_SBS_DEVICE_NAME, acpi_device_bid(sbs->device),
ACPI_AC_DIR_NAME, sbs->charger_present ? "on-line" : "off-line");
static void acpi_charger_remove(struct acpi_sbs *sbs)
{
- if (sbs->charger.dev)
- power_supply_unregister(&sbs->charger);
+ if (sbs->charger)
+ power_supply_unregister(sbs->charger);
}
static void acpi_sbs_callback(void *context)
if (sbs->charger_exists) {
acpi_ac_get_present(sbs);
if (sbs->charger_present != saved_charger_state)
- kobject_uevent(&sbs->charger.dev->kobj, KOBJ_CHANGE);
+ kobject_uevent(&sbs->charger->dev.kobj, KOBJ_CHANGE);
}
if (sbs->manager_present) {
acpi_battery_read(bat);
if (saved_battery_state == bat->present)
continue;
- kobject_uevent(&bat->bat.dev->kobj, KOBJ_CHANGE);
+ kobject_uevent(&bat->bat->dev.kobj, KOBJ_CHANGE);
}
}
}
# Should be last libata driver
obj-$(CONFIG_PATA_LEGACY) += pata_legacy.o
-libata-y := libata-core.o libata-scsi.o libata-eh.o libata-transport.o
+libata-y := libata-core.o libata-scsi.o libata-eh.o \
+ libata-transport.o libata-trace.o
libata-$(CONFIG_ATA_SFF) += libata-sff.o
libata-$(CONFIG_SATA_PMP) += libata-pmp.o
libata-$(CONFIG_ATA_ACPI) += libata-acpi.o
int rc;
if (using_dac &&
- !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
+ !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
if (rc) {
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev,
"64-bit DMA enable failed\n");
}
}
} else {
- rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev, "32-bit DMA enable failed\n");
return rc;
}
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev,
"32-bit consistent DMA enable failed\n");
return 0;
if (using_dac &&
- !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
+ !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
if (rc) {
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev,
"64-bit DMA enable failed\n");
}
}
} else {
- rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev, "32-bit DMA enable failed\n");
return rc;
}
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev,
"32-bit consistent DMA enable failed\n");
}
}
- st_ahci_configure_oob(drv_data->hpriv->mmio);
-
if (drv_data->sw_rst) {
err = reset_control_deassert(drv_data->sw_rst);
if (err) {
if (err)
return err;
+ st_ahci_configure_oob(drv_data->hpriv->mmio);
+
err = ahci_platform_init_host(pdev, hpriv, &st_ahci_port_info,
&ahci_platform_sht);
if (err) {
return err;
}
+ st_ahci_configure_oob(drv_data->hpriv->mmio);
+
return ahci_platform_resume_host(dev);
}
#endif
* NOTE: PM support is not currently available.
*
*/
+#include <linux/acpi.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/ahci_platform.h>
return rc;
}
+#ifdef CONFIG_ACPI
+static const struct acpi_device_id xgene_ahci_acpi_match[] = {
+ { "APMC0D0D", },
+ { }
+};
+MODULE_DEVICE_TABLE(acpi, xgene_ahci_acpi_match);
+#endif
+
static const struct of_device_id xgene_ahci_of_match[] = {
{.compatible = "apm,xgene-ahci"},
{},
.driver = {
.name = DRV_NAME,
.of_match_table = xgene_ahci_of_match,
+ .acpi_match_table = ACPI_PTR(xgene_ahci_acpi_match),
},
};
#include <linux/pm_runtime.h>
#include <linux/platform_device.h>
+#define CREATE_TRACE_POINTS
+#include <trace/events/libata.h>
+
#include "libata.h"
#include "libata-transport.h"
* RETURNS:
* Block address read from @tf.
*/
-u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
+u64 ata_tf_read_block(const struct ata_taskfile *tf, struct ata_device *dev)
{
u64 block = 0;
- if (tf->flags & ATA_TFLAG_LBA) {
+ if (!dev || tf->flags & ATA_TFLAG_LBA) {
if (tf->flags & ATA_TFLAG_LBA48) {
block |= (u64)tf->hob_lbah << 40;
block |= (u64)tf->hob_lbam << 32;
return 0;
}
+static void ata_dev_config_sense_reporting(struct ata_device *dev)
+{
+ unsigned int err_mask;
+
+ if (!ata_id_has_sense_reporting(dev->id))
+ return;
+
+ if (ata_id_sense_reporting_enabled(dev->id))
+ return;
+
+ err_mask = ata_dev_set_feature(dev, SETFEATURE_SENSE_DATA, 0x1);
+ if (err_mask) {
+ ata_dev_dbg(dev,
+ "failed to enable Sense Data Reporting, Emask 0x%x\n",
+ err_mask);
+ }
+}
+
/**
* ata_dev_configure - Configure the specified ATA/ATAPI device
* @dev: Target device to configure
dev->devslp_timing[i] = sata_setting[j];
}
}
-
+ ata_dev_config_sense_reporting(dev);
dev->cdb_len = 16;
}
*/
if (unlikely(ata_tag_internal(qc->tag))) {
fill_result_tf(qc);
+ trace_ata_qc_complete_internal(qc);
__ata_qc_complete(qc);
return;
}
*/
if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
fill_result_tf(qc);
+ trace_ata_qc_complete_failed(qc);
ata_qc_schedule_eh(qc);
return;
}
if (qc->flags & ATA_QCFLAG_RESULT_TF)
fill_result_tf(qc);
+ trace_ata_qc_complete_done(qc);
/* Some commands need post-processing after successful
* completion.
*/
}
ap->ops->qc_prep(qc);
-
+ trace_ata_qc_issue(qc);
qc->err_mask |= ap->ops->qc_issue(qc);
if (unlikely(qc->err_mask))
goto err;
#include <linux/libata.h>
+#include <trace/events/libata.h>
#include "libata.h"
enum {
DPRINTK("read log page - log 0x%x, page 0x%x\n", log, page);
ata_tf_init(dev, &tf);
- tf.command = ATA_CMD_READ_LOG_EXT;
+ if (dev->dma_mode && ata_id_has_read_log_dma_ext(dev->id)) {
+ tf.command = ATA_CMD_READ_LOG_DMA_EXT;
+ tf.protocol = ATA_PROT_DMA;
+ } else {
+ tf.command = ATA_CMD_READ_LOG_EXT;
+ tf.protocol = ATA_PROT_PIO;
+ }
tf.lbal = log;
tf.lbam = page;
tf.nsect = sectors;
tf.hob_nsect = sectors >> 8;
tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_LBA48 | ATA_TFLAG_DEVICE;
- tf.protocol = ATA_PROT_PIO;
err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
buf, sectors * ATA_SECT_SIZE, 0);
tf->hob_lbah = buf[10];
tf->nsect = buf[12];
tf->hob_nsect = buf[13];
+ if (ata_id_has_ncq_autosense(dev->id))
+ tf->auxiliary = buf[14] << 16 | buf[15] << 8 | buf[16];
return 0;
}
return err_mask;
}
+/**
+ * ata_eh_request_sense - perform REQUEST_SENSE_DATA_EXT
+ * @dev: device to perform REQUEST_SENSE_SENSE_DATA_EXT to
+ * @sense_buf: result sense data buffer (SCSI_SENSE_BUFFERSIZE bytes long)
+ * @dfl_sense_key: default sense key to use
+ *
+ * Perform REQUEST_SENSE_DATA_EXT after the device reported CHECK
+ * SENSE. This function is EH helper.
+ *
+ * LOCKING:
+ * Kernel thread context (may sleep).
+ *
+ * RETURNS:
+ * encoded sense data on success, 0 on failure or if sense data
+ * is not available.
+ */
+static u32 ata_eh_request_sense(struct ata_queued_cmd *qc,
+ struct scsi_cmnd *cmd)
+{
+ struct ata_device *dev = qc->dev;
+ struct ata_taskfile tf;
+ unsigned int err_mask;
+
+ if (!cmd)
+ return 0;
+
+ DPRINTK("ATA request sense\n");
+ ata_dev_warn(dev, "request sense\n");
+ if (!ata_id_sense_reporting_enabled(dev->id)) {
+ ata_dev_warn(qc->dev, "sense data reporting disabled\n");
+ return 0;
+ }
+ ata_tf_init(dev, &tf);
+
+ tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
+ tf.flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
+ tf.command = ATA_CMD_REQ_SENSE_DATA;
+ tf.protocol = ATA_PROT_NODATA;
+
+ err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
+ /*
+ * ACS-4 states:
+ * The device may set the SENSE DATA AVAILABLE bit to one in the
+ * STATUS field and clear the ERROR bit to zero in the STATUS field
+ * to indicate that the command returned completion without an error
+ * and the sense data described in table 306 is available.
+ *
+ * IOW the 'ATA_SENSE' bit might not be set even though valid
+ * sense data is available.
+ * So check for both.
+ */
+ if ((tf.command & ATA_SENSE) ||
+ tf.lbah != 0 || tf.lbam != 0 || tf.lbal != 0) {
+ ata_scsi_set_sense(cmd, tf.lbah, tf.lbam, tf.lbal);
+ qc->flags |= ATA_QCFLAG_SENSE_VALID;
+ ata_dev_warn(dev, "sense data %02x/%02x/%02x\n",
+ tf.lbah, tf.lbam, tf.lbal);
+ } else {
+ ata_dev_warn(dev, "request sense failed stat %02x emask %x\n",
+ tf.command, err_mask);
+ }
+ return err_mask;
+}
+
/**
* atapi_eh_request_sense - perform ATAPI REQUEST_SENSE
* @dev: device to perform REQUEST_SENSE to
memcpy(&qc->result_tf, &tf, sizeof(tf));
qc->result_tf.flags = ATA_TFLAG_ISADDR | ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
qc->err_mask |= AC_ERR_DEV | AC_ERR_NCQ;
+ if (qc->result_tf.auxiliary) {
+ char sense_key, asc, ascq;
+
+ sense_key = (qc->result_tf.auxiliary >> 16) & 0xff;
+ asc = (qc->result_tf.auxiliary >> 8) & 0xff;
+ ascq = qc->result_tf.auxiliary & 0xff;
+ ata_dev_dbg(dev, "NCQ Autosense %02x/%02x/%02x\n",
+ sense_key, asc, ascq);
+ ata_scsi_set_sense(qc->scsicmd, sense_key, asc, ascq);
+ ata_scsi_set_sense_information(qc->scsicmd, &qc->result_tf);
+ qc->flags |= ATA_QCFLAG_SENSE_VALID;
+ }
+
ehc->i.err_mask &= ~AC_ERR_DEV;
}
return ATA_EH_RESET;
}
+ /*
+ * Sense data reporting does not work if the
+ * device fault bit is set.
+ */
+ if ((stat & ATA_SENSE) && !(stat & ATA_DF) &&
+ !(qc->flags & ATA_QCFLAG_SENSE_VALID)) {
+ if (!(qc->ap->pflags & ATA_PFLAG_FROZEN)) {
+ tmp = ata_eh_request_sense(qc, qc->scsicmd);
+ if (tmp)
+ qc->err_mask |= tmp;
+ else
+ ata_scsi_set_sense_information(qc->scsicmd, tf);
+ } else {
+ ata_dev_warn(qc->dev, "sense data available but port frozen\n");
+ }
+ }
+
+ /* Set by NCQ autosense or request sense above */
+ if (qc->flags & ATA_QCFLAG_SENSE_VALID)
+ return 0;
+
if (stat & (ATA_ERR | ATA_DF))
qc->err_mask |= AC_ERR_DEV;
else
all_err_mask |= qc->err_mask;
if (qc->flags & ATA_QCFLAG_IO)
eflags |= ATA_EFLAG_IS_IO;
+ trace_ata_eh_link_autopsy_qc(qc);
}
/* enforce default EH actions */
eflags |= ATA_EFLAG_DUBIOUS_XFER;
ehc->i.action |= ata_eh_speed_down(dev, eflags, all_err_mask);
}
-
+ trace_ata_eh_link_autopsy(dev, ehc->i.action, all_err_mask);
DPRINTK("EXIT\n");
}
const char *text;
} cmd_descr[] = {
{ ATA_CMD_DEV_RESET, "DEVICE RESET" },
- { ATA_CMD_CHK_POWER, "CHECK POWER MODE" },
- { ATA_CMD_STANDBY, "STANDBY" },
- { ATA_CMD_IDLE, "IDLE" },
- { ATA_CMD_EDD, "EXECUTE DEVICE DIAGNOSTIC" },
- { ATA_CMD_DOWNLOAD_MICRO, "DOWNLOAD MICROCODE" },
+ { ATA_CMD_CHK_POWER, "CHECK POWER MODE" },
+ { ATA_CMD_STANDBY, "STANDBY" },
+ { ATA_CMD_IDLE, "IDLE" },
+ { ATA_CMD_EDD, "EXECUTE DEVICE DIAGNOSTIC" },
+ { ATA_CMD_DOWNLOAD_MICRO, "DOWNLOAD MICROCODE" },
{ ATA_CMD_DOWNLOAD_MICRO_DMA, "DOWNLOAD MICROCODE DMA" },
{ ATA_CMD_NOP, "NOP" },
- { ATA_CMD_FLUSH, "FLUSH CACHE" },
- { ATA_CMD_FLUSH_EXT, "FLUSH CACHE EXT" },
- { ATA_CMD_ID_ATA, "IDENTIFY DEVICE" },
- { ATA_CMD_ID_ATAPI, "IDENTIFY PACKET DEVICE" },
- { ATA_CMD_SERVICE, "SERVICE" },
- { ATA_CMD_READ, "READ DMA" },
- { ATA_CMD_READ_EXT, "READ DMA EXT" },
- { ATA_CMD_READ_QUEUED, "READ DMA QUEUED" },
- { ATA_CMD_READ_STREAM_EXT, "READ STREAM EXT" },
+ { ATA_CMD_FLUSH, "FLUSH CACHE" },
+ { ATA_CMD_FLUSH_EXT, "FLUSH CACHE EXT" },
+ { ATA_CMD_ID_ATA, "IDENTIFY DEVICE" },
+ { ATA_CMD_ID_ATAPI, "IDENTIFY PACKET DEVICE" },
+ { ATA_CMD_SERVICE, "SERVICE" },
+ { ATA_CMD_READ, "READ DMA" },
+ { ATA_CMD_READ_EXT, "READ DMA EXT" },
+ { ATA_CMD_READ_QUEUED, "READ DMA QUEUED" },
+ { ATA_CMD_READ_STREAM_EXT, "READ STREAM EXT" },
{ ATA_CMD_READ_STREAM_DMA_EXT, "READ STREAM DMA EXT" },
- { ATA_CMD_WRITE, "WRITE DMA" },
- { ATA_CMD_WRITE_EXT, "WRITE DMA EXT" },
- { ATA_CMD_WRITE_QUEUED, "WRITE DMA QUEUED EXT" },
- { ATA_CMD_WRITE_STREAM_EXT, "WRITE STREAM EXT" },
+ { ATA_CMD_WRITE, "WRITE DMA" },
+ { ATA_CMD_WRITE_EXT, "WRITE DMA EXT" },
+ { ATA_CMD_WRITE_QUEUED, "WRITE DMA QUEUED EXT" },
+ { ATA_CMD_WRITE_STREAM_EXT, "WRITE STREAM EXT" },
{ ATA_CMD_WRITE_STREAM_DMA_EXT, "WRITE STREAM DMA EXT" },
{ ATA_CMD_WRITE_FUA_EXT, "WRITE DMA FUA EXT" },
{ ATA_CMD_WRITE_QUEUED_FUA_EXT, "WRITE DMA QUEUED FUA EXT" },
{ ATA_CMD_READ_MULTI_EXT, "READ MULTIPLE EXT" },
{ ATA_CMD_WRITE_MULTI, "WRITE MULTIPLE" },
{ ATA_CMD_WRITE_MULTI_EXT, "WRITE MULTIPLE EXT" },
- { ATA_CMD_WRITE_MULTI_FUA_EXT, "WRITE MULTIPLE FUA EXT" },
+ { ATA_CMD_WRITE_MULTI_FUA_EXT, "WRITE MULTIPLE FUA EXT" },
{ ATA_CMD_SET_FEATURES, "SET FEATURES" },
{ ATA_CMD_SET_MULTI, "SET MULTIPLE MODE" },
{ ATA_CMD_VERIFY, "READ VERIFY SECTOR(S)" },
{ ATA_CMD_READ_LOG_EXT, "READ LOG EXT" },
{ ATA_CMD_WRITE_LOG_EXT, "WRITE LOG EXT" },
{ ATA_CMD_READ_LOG_DMA_EXT, "READ LOG DMA EXT" },
- { ATA_CMD_WRITE_LOG_DMA_EXT, "WRITE LOG DMA EXT" },
+ { ATA_CMD_WRITE_LOG_DMA_EXT, "WRITE LOG DMA EXT" },
{ ATA_CMD_TRUSTED_NONDATA, "TRUSTED NON-DATA" },
{ ATA_CMD_TRUSTED_RCV, "TRUSTED RECEIVE" },
- { ATA_CMD_TRUSTED_RCV_DMA, "TRUSTED RECEIVE DMA" },
+ { ATA_CMD_TRUSTED_RCV_DMA, "TRUSTED RECEIVE DMA" },
{ ATA_CMD_TRUSTED_SND, "TRUSTED SEND" },
- { ATA_CMD_TRUSTED_SND_DMA, "TRUSTED SEND DMA" },
+ { ATA_CMD_TRUSTED_SND_DMA, "TRUSTED SEND DMA" },
{ ATA_CMD_PMP_READ, "READ BUFFER" },
{ ATA_CMD_PMP_READ_DMA, "READ BUFFER DMA" },
{ ATA_CMD_PMP_WRITE, "WRITE BUFFER" },
{ ATA_CMD_MEDIA_LOCK, "DOOR LOCK" },
{ ATA_CMD_MEDIA_UNLOCK, "DOOR UNLOCK" },
{ ATA_CMD_DSM, "DATA SET MANAGEMENT" },
- { ATA_CMD_CHK_MED_CRD_TYP, "CHECK MEDIA CARD TYPE" },
- { ATA_CMD_CFA_REQ_EXT_ERR, "CFA REQUEST EXTENDED ERROR" },
+ { ATA_CMD_CHK_MED_CRD_TYP, "CHECK MEDIA CARD TYPE" },
+ { ATA_CMD_CFA_REQ_EXT_ERR, "CFA REQUEST EXTENDED ERROR" },
{ ATA_CMD_CFA_WRITE_NE, "CFA WRITE SECTORS WITHOUT ERASE" },
{ ATA_CMD_CFA_TRANS_SECT, "CFA TRANSLATE SECTOR" },
{ ATA_CMD_CFA_ERASE, "CFA ERASE SECTORS" },
- { ATA_CMD_CFA_WRITE_MULT_NE, "CFA WRITE MULTIPLE WITHOUT ERASE" },
+ { ATA_CMD_CFA_WRITE_MULT_NE, "CFA WRITE MULTIPLE WITHOUT ERASE" },
{ ATA_CMD_REQ_SENSE_DATA, "REQUEST SENSE DATA EXT" },
{ ATA_CMD_SANITIZE_DEVICE, "SANITIZE DEVICE" },
{ ATA_CMD_READ_LONG, "READ LONG (with retries)" },
#ifdef CONFIG_ATA_VERBOSE_ERROR
if (res->command & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ |
- ATA_ERR)) {
+ ATA_SENSE | ATA_ERR)) {
if (res->command & ATA_BUSY)
ata_dev_err(qc->dev, "status: { Busy }\n");
else
- ata_dev_err(qc->dev, "status: { %s%s%s%s}\n",
+ ata_dev_err(qc->dev, "status: { %s%s%s%s%s}\n",
res->command & ATA_DRDY ? "DRDY " : "",
res->command & ATA_DF ? "DF " : "",
res->command & ATA_DRQ ? "DRQ " : "",
+ res->command & ATA_SENSE ? "SENSE " : "",
res->command & ATA_ERR ? "ERR " : "");
}
ata_scsi_park_show, ata_scsi_park_store);
EXPORT_SYMBOL_GPL(dev_attr_unload_heads);
-static void ata_scsi_set_sense(struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq)
+void ata_scsi_set_sense(struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq)
{
+ if (!cmd)
+ return;
+
cmd->result = (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION;
scsi_build_sense_buffer(0, cmd->sense_buffer, sk, asc, ascq);
}
+void ata_scsi_set_sense_information(struct scsi_cmnd *cmd,
+ const struct ata_taskfile *tf)
+{
+ u64 information;
+
+ if (!cmd)
+ return;
+
+ information = ata_tf_read_block(tf, NULL);
+ scsi_set_sense_information(cmd->sense_buffer, information);
+}
+
static ssize_t
ata_scsi_em_message_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
if (stat & ATA_BUSY) {
printk("Busy }\n"); /* Data is not valid in this case */
} else {
- if (stat & 0x40) printk("DriveReady ");
- if (stat & 0x20) printk("DeviceFault ");
- if (stat & 0x10) printk("SeekComplete ");
- if (stat & 0x08) printk("DataRequest ");
- if (stat & 0x04) printk("CorrectedError ");
- if (stat & 0x02) printk("Index ");
- if (stat & 0x01) printk("Error ");
+ if (stat & ATA_DRDY) printk("DriveReady ");
+ if (stat & ATA_DF) printk("DeviceFault ");
+ if (stat & ATA_DSC) printk("SeekComplete ");
+ if (stat & ATA_DRQ) printk("DataRequest ");
+ if (stat & ATA_CORR) printk("CorrectedError ");
+ if (stat & ATA_SENSE) printk("Sense ");
+ if (stat & ATA_ERR) printk("Error ");
printk("}\n");
if (err) {
printk(KERN_WARNING "ata%u: error=0x%02x { ", id, err);
- if (err & 0x04) printk("DriveStatusError ");
- if (err & 0x80) {
- if (err & 0x04) printk("BadCRC ");
+ if (err & ATA_ABORTED) printk("DriveStatusError ");
+ if (err & ATA_ICRC) {
+ if (err & ATA_ABORTED)
+ printk("BadCRC ");
else printk("Sector ");
}
- if (err & 0x40) printk("UncorrectableError ");
- if (err & 0x10) printk("SectorIdNotFound ");
- if (err & 0x02) printk("TrackZeroNotFound ");
- if (err & 0x01) printk("AddrMarkNotFound ");
+ if (err & ATA_UNC) printk("UncorrectableError ");
+ if (err & ATA_IDNF) printk("SectorIdNotFound ");
+ if (err & ATA_TRK0NF) printk("TrackZeroNotFound ");
+ if (err & ATA_AMNF) printk("AddrMarkNotFound ");
printk("}\n");
}
}
/* Based on the 3ware driver translation table */
static const unsigned char sense_table[][4] = {
/* BBD|ECC|ID|MAR */
- {0xd1, ABORTED_COMMAND, 0x00, 0x00}, // Device busy Aborted command
+ {0xd1, ABORTED_COMMAND, 0x00, 0x00},
+ // Device busy Aborted command
/* BBD|ECC|ID */
- {0xd0, ABORTED_COMMAND, 0x00, 0x00}, // Device busy Aborted command
+ {0xd0, ABORTED_COMMAND, 0x00, 0x00},
+ // Device busy Aborted command
/* ECC|MC|MARK */
- {0x61, HARDWARE_ERROR, 0x00, 0x00}, // Device fault Hardware error
+ {0x61, HARDWARE_ERROR, 0x00, 0x00},
+ // Device fault Hardware error
/* ICRC|ABRT */ /* NB: ICRC & !ABRT is BBD */
- {0x84, ABORTED_COMMAND, 0x47, 0x00}, // Data CRC error SCSI parity error
+ {0x84, ABORTED_COMMAND, 0x47, 0x00},
+ // Data CRC error SCSI parity error
/* MC|ID|ABRT|TRK0|MARK */
- {0x37, NOT_READY, 0x04, 0x00}, // Unit offline Not ready
+ {0x37, NOT_READY, 0x04, 0x00},
+ // Unit offline Not ready
/* MCR|MARK */
- {0x09, NOT_READY, 0x04, 0x00}, // Unrecovered disk error Not ready
+ {0x09, NOT_READY, 0x04, 0x00},
+ // Unrecovered disk error Not ready
/* Bad address mark */
- {0x01, MEDIUM_ERROR, 0x13, 0x00}, // Address mark not found Address mark not found for data field
- /* TRK0 */
- {0x02, HARDWARE_ERROR, 0x00, 0x00}, // Track 0 not found Hardware error
+ {0x01, MEDIUM_ERROR, 0x13, 0x00},
+ // Address mark not found for data field
+ /* TRK0 - Track 0 not found */
+ {0x02, HARDWARE_ERROR, 0x00, 0x00},
+ // Hardware error
/* Abort: 0x04 is not translated here, see below */
/* Media change request */
- {0x08, NOT_READY, 0x04, 0x00}, // Media change request FIXME: faking offline
- /* SRV/IDNF */
- {0x10, ILLEGAL_REQUEST, 0x21, 0x00}, // ID not found Logical address out of range
- /* MC */
- {0x20, UNIT_ATTENTION, 0x28, 0x00}, // Media Changed Not ready to ready change, medium may have changed
- /* ECC */
- {0x40, MEDIUM_ERROR, 0x11, 0x04}, // Uncorrectable ECC error Unrecovered read error
+ {0x08, NOT_READY, 0x04, 0x00},
+ // FIXME: faking offline
+ /* SRV/IDNF - ID not found */
+ {0x10, ILLEGAL_REQUEST, 0x21, 0x00},
+ // Logical address out of range
+ /* MC - Media Changed */
+ {0x20, UNIT_ATTENTION, 0x28, 0x00},
+ // Not ready to ready change, medium may have changed
+ /* ECC - Uncorrectable ECC error */
+ {0x40, MEDIUM_ERROR, 0x11, 0x04},
+ // Unrecovered read error
/* BBD - block marked bad */
- {0x80, MEDIUM_ERROR, 0x11, 0x04}, // Block marked bad Medium error, unrecovered read error
+ {0x80, MEDIUM_ERROR, 0x11, 0x04},
+ // Block marked bad Medium error, unrecovered read error
{0xFF, 0xFF, 0xFF, 0xFF}, // END mark
};
static const unsigned char stat_table[][4] = {
/* Must be first because BUSY means no other bits valid */
- {0x80, ABORTED_COMMAND, 0x47, 0x00}, // Busy, fake parity for now
- {0x20, HARDWARE_ERROR, 0x44, 0x00}, // Device fault, internal target failure
- {0x08, ABORTED_COMMAND, 0x47, 0x00}, // Timed out in xfer, fake parity for now
- {0x04, RECOVERED_ERROR, 0x11, 0x00}, // Recovered ECC error Medium error, recovered
+ {0x80, ABORTED_COMMAND, 0x47, 0x00},
+ // Busy, fake parity for now
+ {0x40, ILLEGAL_REQUEST, 0x21, 0x04},
+ // Device ready, unaligned write command
+ {0x20, HARDWARE_ERROR, 0x44, 0x00},
+ // Device fault, internal target failure
+ {0x08, ABORTED_COMMAND, 0x47, 0x00},
+ // Timed out in xfer, fake parity for now
+ {0x04, RECOVERED_ERROR, 0x11, 0x00},
+ // Recovered ECC error Medium error, recovered
{0xFF, 0xFF, 0xFF, 0xFF}, // END mark
};
((cdb[2] & 0x20) || need_sense)) {
ata_gen_passthru_sense(qc);
} else {
- if (!need_sense) {
+ if (qc->flags & ATA_QCFLAG_SENSE_VALID) {
+ cmd->result = SAM_STAT_CHECK_CONDITION;
+ } else if (!need_sense) {
cmd->result = SAM_STAT_GOOD;
} else {
/* TODO: decide which descriptor format to use
unsigned int i, tag;
for (i = 0, tag = ap->sas_last_tag + 1; i < max_queue; i++, tag++) {
- if (ap->flags & ATA_FLAG_LOWTAG)
- tag = 1;
- else
- tag = tag < max_queue ? tag : 0;
+ tag = tag < max_queue ? tag : 0;
/* the last tag is reserved for internal command. */
if (tag == ATA_TAG_INTERNAL)
* ->sff_irq_clear method. Try to initialize bmdma_addr
* regardless of dma masks.
*/
- rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
ata_bmdma_nodma(host, "failed to set dma mask");
if (!rc) {
- rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
ata_bmdma_nodma(host,
"failed to set consistent dma mask");
--- /dev/null
+/*
+ * libata-trace.c - trace functions for libata
+ *
+ * Copyright 2015 Hannes Reinecke
+ * Copyright 2015 SUSE Linux GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING. If not, write to
+ * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/kernel.h>
+#include <linux/trace_seq.h>
+#include <trace/events/libata.h>
+
+const char *
+libata_trace_parse_status(struct trace_seq *p, unsigned char status)
+{
+ const char *ret = trace_seq_buffer_ptr(p);
+
+ trace_seq_printf(p, "{ ");
+ if (status & ATA_BUSY)
+ trace_seq_printf(p, "BUSY ");
+ if (status & ATA_DRDY)
+ trace_seq_printf(p, "DRDY ");
+ if (status & ATA_DF)
+ trace_seq_printf(p, "DF ");
+ if (status & ATA_DSC)
+ trace_seq_printf(p, "DSC ");
+ if (status & ATA_DRQ)
+ trace_seq_printf(p, "DRQ ");
+ if (status & ATA_CORR)
+ trace_seq_printf(p, "CORR ");
+ if (status & ATA_SENSE)
+ trace_seq_printf(p, "SENSE ");
+ if (status & ATA_ERR)
+ trace_seq_printf(p, "ERR ");
+ trace_seq_putc(p, '}');
+ trace_seq_putc(p, 0);
+
+ return ret;
+}
+
+const char *
+libata_trace_parse_eh_action(struct trace_seq *p, unsigned int eh_action)
+{
+ const char *ret = trace_seq_buffer_ptr(p);
+
+ trace_seq_printf(p, "%x", eh_action);
+ if (eh_action) {
+ trace_seq_printf(p, "{ ");
+ if (eh_action & ATA_EH_REVALIDATE)
+ trace_seq_printf(p, "REVALIDATE ");
+ if (eh_action & (ATA_EH_SOFTRESET | ATA_EH_HARDRESET))
+ trace_seq_printf(p, "RESET ");
+ else if (eh_action & ATA_EH_SOFTRESET)
+ trace_seq_printf(p, "SOFTRESET ");
+ else if (eh_action & ATA_EH_HARDRESET)
+ trace_seq_printf(p, "HARDRESET ");
+ if (eh_action & ATA_EH_ENABLE_LINK)
+ trace_seq_printf(p, "ENABLE_LINK ");
+ if (eh_action & ATA_EH_PARK)
+ trace_seq_printf(p, "PARK ");
+ trace_seq_putc(p, '}');
+ }
+ trace_seq_putc(p, 0);
+
+ return ret;
+}
+
+const char *
+libata_trace_parse_eh_err_mask(struct trace_seq *p, unsigned int eh_err_mask)
+{
+ const char *ret = trace_seq_buffer_ptr(p);
+
+ trace_seq_printf(p, "%x", eh_err_mask);
+ if (eh_err_mask) {
+ trace_seq_printf(p, "{ ");
+ if (eh_err_mask & AC_ERR_DEV)
+ trace_seq_printf(p, "DEV ");
+ if (eh_err_mask & AC_ERR_HSM)
+ trace_seq_printf(p, "HSM ");
+ if (eh_err_mask & AC_ERR_TIMEOUT)
+ trace_seq_printf(p, "TIMEOUT ");
+ if (eh_err_mask & AC_ERR_MEDIA)
+ trace_seq_printf(p, "MEDIA ");
+ if (eh_err_mask & AC_ERR_ATA_BUS)
+ trace_seq_printf(p, "ATA_BUS ");
+ if (eh_err_mask & AC_ERR_HOST_BUS)
+ trace_seq_printf(p, "HOST_BUS ");
+ if (eh_err_mask & AC_ERR_SYSTEM)
+ trace_seq_printf(p, "SYSTEM ");
+ if (eh_err_mask & AC_ERR_INVALID)
+ trace_seq_printf(p, "INVALID ");
+ if (eh_err_mask & AC_ERR_OTHER)
+ trace_seq_printf(p, "OTHER ");
+ if (eh_err_mask & AC_ERR_NODEV_HINT)
+ trace_seq_printf(p, "NODEV_HINT ");
+ if (eh_err_mask & AC_ERR_NCQ)
+ trace_seq_printf(p, "NCQ ");
+ trace_seq_putc(p, '}');
+ }
+ trace_seq_putc(p, 0);
+
+ return ret;
+}
+
+const char *
+libata_trace_parse_qc_flags(struct trace_seq *p, unsigned int qc_flags)
+{
+ const char *ret = trace_seq_buffer_ptr(p);
+
+ trace_seq_printf(p, "%x", qc_flags);
+ if (qc_flags) {
+ trace_seq_printf(p, "{ ");
+ if (qc_flags & ATA_QCFLAG_ACTIVE)
+ trace_seq_printf(p, "ACTIVE ");
+ if (qc_flags & ATA_QCFLAG_DMAMAP)
+ trace_seq_printf(p, "DMAMAP ");
+ if (qc_flags & ATA_QCFLAG_IO)
+ trace_seq_printf(p, "IO ");
+ if (qc_flags & ATA_QCFLAG_RESULT_TF)
+ trace_seq_printf(p, "RESULT_TF ");
+ if (qc_flags & ATA_QCFLAG_CLEAR_EXCL)
+ trace_seq_printf(p, "CLEAR_EXCL ");
+ if (qc_flags & ATA_QCFLAG_QUIET)
+ trace_seq_printf(p, "QUIET ");
+ if (qc_flags & ATA_QCFLAG_RETRY)
+ trace_seq_printf(p, "RETRY ");
+ if (qc_flags & ATA_QCFLAG_FAILED)
+ trace_seq_printf(p, "FAILED ");
+ if (qc_flags & ATA_QCFLAG_SENSE_VALID)
+ trace_seq_printf(p, "SENSE_VALID ");
+ if (qc_flags & ATA_QCFLAG_EH_SCHEDULED)
+ trace_seq_printf(p, "EH_SCHEDULED ");
+ trace_seq_putc(p, '}');
+ }
+ trace_seq_putc(p, 0);
+
+ return ret;
+}
extern int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
u64 block, u32 n_block, unsigned int tf_flags,
unsigned int tag);
-extern u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev);
+extern u64 ata_tf_read_block(const struct ata_taskfile *tf,
+ struct ata_device *dev);
extern unsigned ata_exec_internal(struct ata_device *dev,
struct ata_taskfile *tf, const u8 *cdb,
int dma_dir, void *buf, unsigned int buflen,
struct scsi_host_template *sht);
extern void ata_scsi_scan_host(struct ata_port *ap, int sync);
extern int ata_scsi_offline_dev(struct ata_device *dev);
+extern void ata_scsi_set_sense(struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq);
+extern void ata_scsi_set_sense_information(struct scsi_cmnd *cmd,
+ const struct ata_taskfile *tf);
extern void ata_scsi_media_change_notify(struct ata_device *dev);
extern void ata_scsi_hotplug(struct work_struct *work);
extern void ata_schedule_scsi_eh(struct Scsi_Host *shost);
atp867x_fixup(host);
- rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
- rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
return rc;
}
return -ENODEV;
}
- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
+ if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
printk(KERN_ERR DRV_NAME ": unable to configure DMA mask.\n");
return -ENODEV;
}
- if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
+ if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32))) {
printk(KERN_ERR DRV_NAME ": unable to configure consistent DMA mask.\n");
return -ENODEV;
}
if (rc)
return rc;
host->iomap = pcim_iomap_table(pdev);
- rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
- rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
return rc;
host->iomap = pcim_iomap_table(dev);
- rc = pci_set_dma_mask(dev, ATA_DMA_MASK);
+ rc = dma_set_mask(&dev->dev, ATA_DMA_MASK);
if (rc)
return rc;
- rc = pci_set_consistent_dma_mask(dev, ATA_DMA_MASK);
+ rc = dma_set_coherent_mask(&dev->dev, ATA_DMA_MASK);
if (rc)
return rc;
pci_set_master(dev);
return rc;
host->iomap = pcim_iomap_table(pdev);
- rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
- rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
if (rc)
return rc;
- rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
- rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
host->iomap = pcim_iomap_table(pdev);
/* Setup DMA masks */
- rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
- rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
pci_set_master(pdev);
{
int rc;
- rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev, "32-bit DMA enable failed\n");
return rc;
}
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev, "32-bit consistent DMA enable failed\n");
return rc;
#include <linux/platform_device.h>
#include <linux/libata.h>
#include <linux/slab.h>
+
#include "libata.h"
#include <scsi/scsi_host.h>
#include <scsi/scsi_cmnd.h>
+/* Supported DMA engine drivers */
+#include <linux/platform_data/dma-dw.h>
+#include <linux/dma/dw.h>
+
/* These two are defined in "libata.h" */
#undef DRV_NAME
#undef DRV_VERSION
#define NO_IRQ 0
#endif
-/* SATA DMA driver Globals */
-#define DMA_NUM_CHANS 1
-#define DMA_NUM_CHAN_REGS 8
-
-/* SATA DMA Register definitions */
#define AHB_DMA_BRST_DFLT 64 /* 16 data items burst length*/
-struct dmareg {
- u32 low; /* Low bits 0-31 */
- u32 high; /* High bits 32-63 */
-};
-
-/* DMA Per Channel registers */
-struct dma_chan_regs {
- struct dmareg sar; /* Source Address */
- struct dmareg dar; /* Destination address */
- struct dmareg llp; /* Linked List Pointer */
- struct dmareg ctl; /* Control */
- struct dmareg sstat; /* Source Status not implemented in core */
- struct dmareg dstat; /* Destination Status not implemented in core*/
- struct dmareg sstatar; /* Source Status Address not impl in core */
- struct dmareg dstatar; /* Destination Status Address not implemente */
- struct dmareg cfg; /* Config */
- struct dmareg sgr; /* Source Gather */
- struct dmareg dsr; /* Destination Scatter */
-};
-
-/* Generic Interrupt Registers */
-struct dma_interrupt_regs {
- struct dmareg tfr; /* Transfer Interrupt */
- struct dmareg block; /* Block Interrupt */
- struct dmareg srctran; /* Source Transfer Interrupt */
- struct dmareg dsttran; /* Dest Transfer Interrupt */
- struct dmareg error; /* Error */
-};
-
-struct ahb_dma_regs {
- struct dma_chan_regs chan_regs[DMA_NUM_CHAN_REGS];
- struct dma_interrupt_regs interrupt_raw; /* Raw Interrupt */
- struct dma_interrupt_regs interrupt_status; /* Interrupt Status */
- struct dma_interrupt_regs interrupt_mask; /* Interrupt Mask */
- struct dma_interrupt_regs interrupt_clear; /* Interrupt Clear */
- struct dmareg statusInt; /* Interrupt combined*/
- struct dmareg rq_srcreg; /* Src Trans Req */
- struct dmareg rq_dstreg; /* Dst Trans Req */
- struct dmareg rq_sgl_srcreg; /* Sngl Src Trans Req*/
- struct dmareg rq_sgl_dstreg; /* Sngl Dst Trans Req*/
- struct dmareg rq_lst_srcreg; /* Last Src Trans Req*/
- struct dmareg rq_lst_dstreg; /* Last Dst Trans Req*/
- struct dmareg dma_cfg; /* DMA Config */
- struct dmareg dma_chan_en; /* DMA Channel Enable*/
- struct dmareg dma_id; /* DMA ID */
- struct dmareg dma_test; /* DMA Test */
- struct dmareg res1; /* reserved */
- struct dmareg res2; /* reserved */
- /*
- * DMA Comp Params
- * Param 6 = dma_param[0], Param 5 = dma_param[1],
- * Param 4 = dma_param[2] ...
- */
- struct dmareg dma_params[6];
-};
-
-/* Data structure for linked list item */
-struct lli {
- u32 sar; /* Source Address */
- u32 dar; /* Destination address */
- u32 llp; /* Linked List Pointer */
- struct dmareg ctl; /* Control */
- struct dmareg dstat; /* Destination Status */
-};
-
-enum {
- SATA_DWC_DMAC_LLI_SZ = (sizeof(struct lli)),
- SATA_DWC_DMAC_LLI_NUM = 256,
- SATA_DWC_DMAC_LLI_TBL_SZ = (SATA_DWC_DMAC_LLI_SZ * \
- SATA_DWC_DMAC_LLI_NUM),
- SATA_DWC_DMAC_TWIDTH_BYTES = 4,
- SATA_DWC_DMAC_CTRL_TSIZE_MAX = (0x00000800 * \
- SATA_DWC_DMAC_TWIDTH_BYTES),
-};
-
-/* DMA Register Operation Bits */
-enum {
- DMA_EN = 0x00000001, /* Enable AHB DMA */
- DMA_CTL_LLP_SRCEN = 0x10000000, /* Blk chain enable Src */
- DMA_CTL_LLP_DSTEN = 0x08000000, /* Blk chain enable Dst */
-};
-
-#define DMA_CTL_BLK_TS(size) ((size) & 0x000000FFF) /* Blk Transfer size */
-#define DMA_CHANNEL(ch) (0x00000001 << (ch)) /* Select channel */
- /* Enable channel */
-#define DMA_ENABLE_CHAN(ch) ((0x00000001 << (ch)) | \
- ((0x000000001 << (ch)) << 8))
- /* Disable channel */
-#define DMA_DISABLE_CHAN(ch) (0x00000000 | ((0x000000001 << (ch)) << 8))
- /* Transfer Type & Flow Controller */
-#define DMA_CTL_TTFC(type) (((type) & 0x7) << 20)
-#define DMA_CTL_SMS(num) (((num) & 0x3) << 25) /* Src Master Select */
-#define DMA_CTL_DMS(num) (((num) & 0x3) << 23)/* Dst Master Select */
- /* Src Burst Transaction Length */
-#define DMA_CTL_SRC_MSIZE(size) (((size) & 0x7) << 14)
- /* Dst Burst Transaction Length */
-#define DMA_CTL_DST_MSIZE(size) (((size) & 0x7) << 11)
- /* Source Transfer Width */
-#define DMA_CTL_SRC_TRWID(size) (((size) & 0x7) << 4)
- /* Destination Transfer Width */
-#define DMA_CTL_DST_TRWID(size) (((size) & 0x7) << 1)
-
-/* Assign HW handshaking interface (x) to destination / source peripheral */
-#define DMA_CFG_HW_HS_DEST(int_num) (((int_num) & 0xF) << 11)
-#define DMA_CFG_HW_HS_SRC(int_num) (((int_num) & 0xF) << 7)
-#define DMA_CFG_HW_CH_PRIOR(int_num) (((int_num) & 0xF) << 5)
-#define DMA_LLP_LMS(addr, master) (((addr) & 0xfffffffc) | (master))
-
-/*
- * This define is used to set block chaining disabled in the control low
- * register. It is already in little endian format so it can be &'d dirctly.
- * It is essentially: cpu_to_le32(~(DMA_CTL_LLP_SRCEN | DMA_CTL_LLP_DSTEN))
- */
enum {
- DMA_CTL_LLP_DISABLE_LE32 = 0xffffffe7,
- DMA_CTL_TTFC_P2M_DMAC = 0x00000002, /* Per to mem, DMAC cntr */
- DMA_CTL_TTFC_M2P_PER = 0x00000003, /* Mem to per, peripheral cntr */
- DMA_CTL_SINC_INC = 0x00000000, /* Source Address Increment */
- DMA_CTL_SINC_DEC = 0x00000200,
- DMA_CTL_SINC_NOCHANGE = 0x00000400,
- DMA_CTL_DINC_INC = 0x00000000, /* Destination Address Increment */
- DMA_CTL_DINC_DEC = 0x00000080,
- DMA_CTL_DINC_NOCHANGE = 0x00000100,
- DMA_CTL_INT_EN = 0x00000001, /* Interrupt Enable */
-
-/* Channel Configuration Register high bits */
- DMA_CFG_FCMOD_REQ = 0x00000001, /* Flow Control - request based */
- DMA_CFG_PROTCTL = (0x00000003 << 2),/* Protection Control */
-
-/* Channel Configuration Register low bits */
- DMA_CFG_RELD_DST = 0x80000000, /* Reload Dest / Src Addr */
- DMA_CFG_RELD_SRC = 0x40000000,
- DMA_CFG_HS_SELSRC = 0x00000800, /* Software handshake Src/ Dest */
- DMA_CFG_HS_SELDST = 0x00000400,
- DMA_CFG_FIFOEMPTY = (0x00000001 << 9), /* FIFO Empty bit */
-
-/* Channel Linked List Pointer Register */
- DMA_LLP_AHBMASTER1 = 0, /* List Master Select */
- DMA_LLP_AHBMASTER2 = 1,
-
SATA_DWC_MAX_PORTS = 1,
SATA_DWC_SCR_OFFSET = 0x24,
struct ata_host *host;
u8 __iomem *reg_base;
struct sata_dwc_regs *sata_dwc_regs; /* DW Synopsys SATA specific */
- int irq_dma;
+ struct dw_dma_chip *dma;
};
#define SATA_DWC_QCMD_MAX 32
struct sata_dwc_device_port {
struct sata_dwc_device *hsdev;
int cmd_issued[SATA_DWC_QCMD_MAX];
- struct lli *llit[SATA_DWC_QCMD_MAX]; /* DMA LLI table */
- dma_addr_t llit_dma[SATA_DWC_QCMD_MAX];
- u32 dma_chan[SATA_DWC_QCMD_MAX];
int dma_pending[SATA_DWC_QCMD_MAX];
+
+ /* DMA info */
+ struct dw_dma_slave *dws;
+ struct dma_chan *chan;
+ struct dma_async_tx_descriptor *desc[SATA_DWC_QCMD_MAX];
+ u32 dma_interrupt_count;
};
/*
void __iomem *scr_addr_sstatus;
u32 sata_dwc_sactive_issued ;
u32 sata_dwc_sactive_queued ;
- u32 dma_interrupt_count;
- struct ahb_dma_regs *sata_dma_regs;
- struct device *dwc_dev;
- int dma_channel;
};
static struct sata_dwc_host_priv host_pvt;
+static struct dw_dma_slave sata_dwc_dma_dws = {
+ .src_id = 0,
+ .dst_id = 0,
+ .src_master = 0,
+ .dst_master = 1,
+};
+
/*
* Prototypes
*/
static void sata_dwc_dma_xfer_complete(struct ata_port *ap, u32 check_status);
static void sata_dwc_port_stop(struct ata_port *ap);
static void sata_dwc_clear_dmacr(struct sata_dwc_device_port *hsdevp, u8 tag);
-static int dma_dwc_init(struct sata_dwc_device *hsdev, int irq);
-static void dma_dwc_exit(struct sata_dwc_device *hsdev);
-static int dma_dwc_xfer_setup(struct scatterlist *sg, int num_elems,
- struct lli *lli, dma_addr_t dma_lli,
- void __iomem *addr, int dir);
-static void dma_dwc_xfer_start(int dma_ch);
static const char *get_prot_descript(u8 protocol)
{
}
}
-static void sata_dwc_tf_dump(struct ata_taskfile *tf)
+static void sata_dwc_tf_dump(struct ata_port *ap, struct ata_taskfile *tf)
{
- dev_vdbg(host_pvt.dwc_dev, "taskfile cmd: 0x%02x protocol: %s flags:"
- "0x%lx device: %x\n", tf->command,
- get_prot_descript(tf->protocol), tf->flags, tf->device);
- dev_vdbg(host_pvt.dwc_dev, "feature: 0x%02x nsect: 0x%x lbal: 0x%x "
- "lbam: 0x%x lbah: 0x%x\n", tf->feature, tf->nsect, tf->lbal,
- tf->lbam, tf->lbah);
- dev_vdbg(host_pvt.dwc_dev, "hob_feature: 0x%02x hob_nsect: 0x%x "
- "hob_lbal: 0x%x hob_lbam: 0x%x hob_lbah: 0x%x\n",
+ dev_vdbg(ap->dev,
+ "taskfile cmd: 0x%02x protocol: %s flags: 0x%lx device: %x\n",
+ tf->command, get_prot_descript(tf->protocol), tf->flags,
+ tf->device);
+ dev_vdbg(ap->dev,
+ "feature: 0x%02x nsect: 0x%x lbal: 0x%x lbam: 0x%x lbah: 0x%x\n",
+ tf->feature, tf->nsect, tf->lbal, tf->lbam, tf->lbah);
+ dev_vdbg(ap->dev,
+ "hob_feature: 0x%02x hob_nsect: 0x%x hob_lbal: 0x%x hob_lbam: 0x%x hob_lbah: 0x%x\n",
tf->hob_feature, tf->hob_nsect, tf->hob_lbal, tf->hob_lbam,
tf->hob_lbah);
}
-/*
- * Function: get_burst_length_encode
- * arguments: datalength: length in bytes of data
- * returns value to be programmed in register corresponding to data length
- * This value is effectively the log(base 2) of the length
- */
-static int get_burst_length_encode(int datalength)
-{
- int items = datalength >> 2; /* div by 4 to get lword count */
-
- if (items >= 64)
- return 5;
-
- if (items >= 32)
- return 4;
-
- if (items >= 16)
- return 3;
-
- if (items >= 8)
- return 2;
-
- if (items >= 4)
- return 1;
-
- return 0;
-}
-
-static void clear_chan_interrupts(int c)
+static void dma_dwc_xfer_done(void *hsdev_instance)
{
- out_le32(&(host_pvt.sata_dma_regs->interrupt_clear.tfr.low),
- DMA_CHANNEL(c));
- out_le32(&(host_pvt.sata_dma_regs->interrupt_clear.block.low),
- DMA_CHANNEL(c));
- out_le32(&(host_pvt.sata_dma_regs->interrupt_clear.srctran.low),
- DMA_CHANNEL(c));
- out_le32(&(host_pvt.sata_dma_regs->interrupt_clear.dsttran.low),
- DMA_CHANNEL(c));
- out_le32(&(host_pvt.sata_dma_regs->interrupt_clear.error.low),
- DMA_CHANNEL(c));
-}
-
-/*
- * Function: dma_request_channel
- * arguments: None
- * returns channel number if available else -1
- * This function assigns the next available DMA channel from the list to the
- * requester
- */
-static int dma_request_channel(void)
-{
- /* Check if the channel is not currently in use */
- if (!(in_le32(&(host_pvt.sata_dma_regs->dma_chan_en.low)) &
- DMA_CHANNEL(host_pvt.dma_channel)))
- return host_pvt.dma_channel;
- dev_err(host_pvt.dwc_dev, "%s Channel %d is currently in use\n",
- __func__, host_pvt.dma_channel);
- return -1;
-}
-
-/*
- * Function: dma_dwc_interrupt
- * arguments: irq, dev_id, pt_regs
- * returns channel number if available else -1
- * Interrupt Handler for DW AHB SATA DMA
- */
-static irqreturn_t dma_dwc_interrupt(int irq, void *hsdev_instance)
-{
- int chan;
- u32 tfr_reg, err_reg;
unsigned long flags;
struct sata_dwc_device *hsdev = hsdev_instance;
struct ata_host *host = (struct ata_host *)hsdev->host;
hsdevp = HSDEVP_FROM_AP(ap);
tag = ap->link.active_tag;
- tfr_reg = in_le32(&(host_pvt.sata_dma_regs->interrupt_status.tfr\
- .low));
- err_reg = in_le32(&(host_pvt.sata_dma_regs->interrupt_status.error\
- .low));
-
- dev_dbg(ap->dev, "eot=0x%08x err=0x%08x pending=%d active port=%d\n",
- tfr_reg, err_reg, hsdevp->dma_pending[tag], port);
-
- chan = host_pvt.dma_channel;
- if (chan >= 0) {
- /* Check for end-of-transfer interrupt. */
- if (tfr_reg & DMA_CHANNEL(chan)) {
- /*
- * Each DMA command produces 2 interrupts. Only
- * complete the command after both interrupts have been
- * seen. (See sata_dwc_isr())
- */
- host_pvt.dma_interrupt_count++;
- sata_dwc_clear_dmacr(hsdevp, tag);
-
- if (hsdevp->dma_pending[tag] ==
- SATA_DWC_DMA_PENDING_NONE) {
- dev_err(ap->dev, "DMA not pending eot=0x%08x "
- "err=0x%08x tag=0x%02x pending=%d\n",
- tfr_reg, err_reg, tag,
- hsdevp->dma_pending[tag]);
- }
-
- if ((host_pvt.dma_interrupt_count % 2) == 0)
- sata_dwc_dma_xfer_complete(ap, 1);
-
- /* Clear the interrupt */
- out_le32(&(host_pvt.sata_dma_regs->interrupt_clear\
- .tfr.low),
- DMA_CHANNEL(chan));
- }
-
- /* Check for error interrupt. */
- if (err_reg & DMA_CHANNEL(chan)) {
- /* TODO Need error handler ! */
- dev_err(ap->dev, "error interrupt err_reg=0x%08x\n",
- err_reg);
-
- /* Clear the interrupt. */
- out_le32(&(host_pvt.sata_dma_regs->interrupt_clear\
- .error.low),
- DMA_CHANNEL(chan));
- }
- }
- spin_unlock_irqrestore(&host->lock, flags);
- return IRQ_HANDLED;
-}
-
-/*
- * Function: dma_request_interrupts
- * arguments: hsdev
- * returns status
- * This function registers ISR for a particular DMA channel interrupt
- */
-static int dma_request_interrupts(struct sata_dwc_device *hsdev, int irq)
-{
- int retval = 0;
- int chan = host_pvt.dma_channel;
-
- if (chan >= 0) {
- /* Unmask error interrupt */
- out_le32(&(host_pvt.sata_dma_regs)->interrupt_mask.error.low,
- DMA_ENABLE_CHAN(chan));
-
- /* Unmask end-of-transfer interrupt */
- out_le32(&(host_pvt.sata_dma_regs)->interrupt_mask.tfr.low,
- DMA_ENABLE_CHAN(chan));
- }
-
- retval = request_irq(irq, dma_dwc_interrupt, 0, "SATA DMA", hsdev);
- if (retval) {
- dev_err(host_pvt.dwc_dev, "%s: could not get IRQ %d\n",
- __func__, irq);
- return -ENODEV;
- }
-
- /* Mark this interrupt as requested */
- hsdev->irq_dma = irq;
- return 0;
-}
-
-/*
- * Function: map_sg_to_lli
- * The Synopsis driver has a comment proposing that better performance
- * is possible by only enabling interrupts on the last item in the linked list.
- * However, it seems that could be a problem if an error happened on one of the
- * first items. The transfer would halt, but no error interrupt would occur.
- * Currently this function sets interrupts enabled for each linked list item:
- * DMA_CTL_INT_EN.
- */
-static int map_sg_to_lli(struct scatterlist *sg, int num_elems,
- struct lli *lli, dma_addr_t dma_lli,
- void __iomem *dmadr_addr, int dir)
-{
- int i, idx = 0;
- int fis_len = 0;
- dma_addr_t next_llp;
- int bl;
- int sms_val, dms_val;
-
- sms_val = 0;
- dms_val = 1 + host_pvt.dma_channel;
- dev_dbg(host_pvt.dwc_dev,
- "%s: sg=%p nelem=%d lli=%p dma_lli=0x%pad dmadr=0x%p\n",
- __func__, sg, num_elems, lli, &dma_lli, dmadr_addr);
-
- bl = get_burst_length_encode(AHB_DMA_BRST_DFLT);
-
- for (i = 0; i < num_elems; i++, sg++) {
- u32 addr, offset;
- u32 sg_len, len;
-
- addr = (u32) sg_dma_address(sg);
- sg_len = sg_dma_len(sg);
-
- dev_dbg(host_pvt.dwc_dev, "%s: elem=%d sg_addr=0x%x sg_len"
- "=%d\n", __func__, i, addr, sg_len);
-
- while (sg_len) {
- if (idx >= SATA_DWC_DMAC_LLI_NUM) {
- /* The LLI table is not large enough. */
- dev_err(host_pvt.dwc_dev, "LLI table overrun "
- "(idx=%d)\n", idx);
- break;
- }
- len = (sg_len > SATA_DWC_DMAC_CTRL_TSIZE_MAX) ?
- SATA_DWC_DMAC_CTRL_TSIZE_MAX : sg_len;
-
- offset = addr & 0xffff;
- if ((offset + sg_len) > 0x10000)
- len = 0x10000 - offset;
-
- /*
- * Make sure a LLI block is not created that will span
- * 8K max FIS boundary. If the block spans such a FIS
- * boundary, there is a chance that a DMA burst will
- * cross that boundary -- this results in an error in
- * the host controller.
- */
- if (fis_len + len > 8192) {
- dev_dbg(host_pvt.dwc_dev, "SPLITTING: fis_len="
- "%d(0x%x) len=%d(0x%x)\n", fis_len,
- fis_len, len, len);
- len = 8192 - fis_len;
- fis_len = 0;
- } else {
- fis_len += len;
- }
- if (fis_len == 8192)
- fis_len = 0;
-
- /*
- * Set DMA addresses and lower half of control register
- * based on direction.
- */
- if (dir == DMA_FROM_DEVICE) {
- lli[idx].dar = cpu_to_le32(addr);
- lli[idx].sar = cpu_to_le32((u32)dmadr_addr);
-
- lli[idx].ctl.low = cpu_to_le32(
- DMA_CTL_TTFC(DMA_CTL_TTFC_P2M_DMAC) |
- DMA_CTL_SMS(sms_val) |
- DMA_CTL_DMS(dms_val) |
- DMA_CTL_SRC_MSIZE(bl) |
- DMA_CTL_DST_MSIZE(bl) |
- DMA_CTL_SINC_NOCHANGE |
- DMA_CTL_SRC_TRWID(2) |
- DMA_CTL_DST_TRWID(2) |
- DMA_CTL_INT_EN |
- DMA_CTL_LLP_SRCEN |
- DMA_CTL_LLP_DSTEN);
- } else { /* DMA_TO_DEVICE */
- lli[idx].sar = cpu_to_le32(addr);
- lli[idx].dar = cpu_to_le32((u32)dmadr_addr);
-
- lli[idx].ctl.low = cpu_to_le32(
- DMA_CTL_TTFC(DMA_CTL_TTFC_M2P_PER) |
- DMA_CTL_SMS(dms_val) |
- DMA_CTL_DMS(sms_val) |
- DMA_CTL_SRC_MSIZE(bl) |
- DMA_CTL_DST_MSIZE(bl) |
- DMA_CTL_DINC_NOCHANGE |
- DMA_CTL_SRC_TRWID(2) |
- DMA_CTL_DST_TRWID(2) |
- DMA_CTL_INT_EN |
- DMA_CTL_LLP_SRCEN |
- DMA_CTL_LLP_DSTEN);
- }
-
- dev_dbg(host_pvt.dwc_dev, "%s setting ctl.high len: "
- "0x%08x val: 0x%08x\n", __func__,
- len, DMA_CTL_BLK_TS(len / 4));
-
- /* Program the LLI CTL high register */
- lli[idx].ctl.high = cpu_to_le32(DMA_CTL_BLK_TS\
- (len / 4));
-
- /* Program the next pointer. The next pointer must be
- * the physical address, not the virtual address.
- */
- next_llp = (dma_lli + ((idx + 1) * sizeof(struct \
- lli)));
-
- /* The last 2 bits encode the list master select. */
- next_llp = DMA_LLP_LMS(next_llp, DMA_LLP_AHBMASTER2);
-
- lli[idx].llp = cpu_to_le32(next_llp);
- idx++;
- sg_len -= len;
- addr += len;
- }
- }
-
/*
- * The last next ptr has to be zero and the last control low register
- * has to have LLP_SRC_EN and LLP_DST_EN (linked list pointer source
- * and destination enable) set back to 0 (disabled.) This is what tells
- * the core that this is the last item in the linked list.
+ * Each DMA command produces 2 interrupts. Only
+ * complete the command after both interrupts have been
+ * seen. (See sata_dwc_isr())
*/
- if (idx) {
- lli[idx-1].llp = 0x00000000;
- lli[idx-1].ctl.low &= DMA_CTL_LLP_DISABLE_LE32;
+ hsdevp->dma_interrupt_count++;
+ sata_dwc_clear_dmacr(hsdevp, tag);
- /* Flush cache to memory */
- dma_cache_sync(NULL, lli, (sizeof(struct lli) * idx),
- DMA_BIDIRECTIONAL);
+ if (hsdevp->dma_pending[tag] == SATA_DWC_DMA_PENDING_NONE) {
+ dev_err(ap->dev, "DMA not pending tag=0x%02x pending=%d\n",
+ tag, hsdevp->dma_pending[tag]);
}
- return idx;
-}
+ if ((hsdevp->dma_interrupt_count % 2) == 0)
+ sata_dwc_dma_xfer_complete(ap, 1);
-/*
- * Function: dma_dwc_xfer_start
- * arguments: Channel number
- * Return : None
- * Enables the DMA channel
- */
-static void dma_dwc_xfer_start(int dma_ch)
-{
- /* Enable the DMA channel */
- out_le32(&(host_pvt.sata_dma_regs->dma_chan_en.low),
- in_le32(&(host_pvt.sata_dma_regs->dma_chan_en.low)) |
- DMA_ENABLE_CHAN(dma_ch));
+ spin_unlock_irqrestore(&host->lock, flags);
}
-static int dma_dwc_xfer_setup(struct scatterlist *sg, int num_elems,
- struct lli *lli, dma_addr_t dma_lli,
- void __iomem *addr, int dir)
+static struct dma_async_tx_descriptor *dma_dwc_xfer_setup(struct ata_queued_cmd *qc)
{
- int dma_ch;
- int num_lli;
- /* Acquire DMA channel */
- dma_ch = dma_request_channel();
- if (dma_ch == -1) {
- dev_err(host_pvt.dwc_dev, "%s: dma channel unavailable\n",
- __func__);
- return -EAGAIN;
+ struct ata_port *ap = qc->ap;
+ struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap);
+ struct sata_dwc_device *hsdev = HSDEV_FROM_AP(ap);
+ dma_addr_t addr = (dma_addr_t)&hsdev->sata_dwc_regs->dmadr;
+ struct dma_slave_config sconf;
+ struct dma_async_tx_descriptor *desc;
+
+ if (qc->dma_dir == DMA_DEV_TO_MEM) {
+ sconf.src_addr = addr;
+ sconf.device_fc = true;
+ } else { /* DMA_MEM_TO_DEV */
+ sconf.dst_addr = addr;
+ sconf.device_fc = false;
}
- /* Convert SG list to linked list of items (LLIs) for AHB DMA */
- num_lli = map_sg_to_lli(sg, num_elems, lli, dma_lli, addr, dir);
-
- dev_dbg(host_pvt.dwc_dev, "%s sg: 0x%p, count: %d lli: %p dma_lli:"
- " 0x%0xlx addr: %p lli count: %d\n", __func__, sg, num_elems,
- lli, (u32)dma_lli, addr, num_lli);
-
- clear_chan_interrupts(dma_ch);
+ sconf.direction = qc->dma_dir;
+ sconf.src_maxburst = AHB_DMA_BRST_DFLT;
+ sconf.dst_maxburst = AHB_DMA_BRST_DFLT;
+ sconf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+ sconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
- /* Program the CFG register. */
- out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].cfg.high),
- DMA_CFG_HW_HS_SRC(dma_ch) | DMA_CFG_HW_HS_DEST(dma_ch) |
- DMA_CFG_PROTCTL | DMA_CFG_FCMOD_REQ);
- out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].cfg.low),
- DMA_CFG_HW_CH_PRIOR(dma_ch));
+ dmaengine_slave_config(hsdevp->chan, &sconf);
- /* Program the address of the linked list */
- out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].llp.low),
- DMA_LLP_LMS(dma_lli, DMA_LLP_AHBMASTER2));
-
- /* Program the CTL register with src enable / dst enable */
- out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].ctl.low),
- DMA_CTL_LLP_SRCEN | DMA_CTL_LLP_DSTEN);
- return dma_ch;
-}
-
-/*
- * Function: dma_dwc_exit
- * arguments: None
- * returns status
- * This function exits the SATA DMA driver
- */
-static void dma_dwc_exit(struct sata_dwc_device *hsdev)
-{
- dev_dbg(host_pvt.dwc_dev, "%s:\n", __func__);
- if (host_pvt.sata_dma_regs) {
- iounmap((void __iomem *)host_pvt.sata_dma_regs);
- host_pvt.sata_dma_regs = NULL;
- }
-
- if (hsdev->irq_dma) {
- free_irq(hsdev->irq_dma, hsdev);
- hsdev->irq_dma = 0;
- }
-}
-
-/*
- * Function: dma_dwc_init
- * arguments: hsdev
- * returns status
- * This function initializes the SATA DMA driver
- */
-static int dma_dwc_init(struct sata_dwc_device *hsdev, int irq)
-{
- int err;
+ /* Convert SG list to linked list of items (LLIs) for AHB DMA */
+ desc = dmaengine_prep_slave_sg(hsdevp->chan, qc->sg, qc->n_elem,
+ qc->dma_dir,
+ DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
- err = dma_request_interrupts(hsdev, irq);
- if (err) {
- dev_err(host_pvt.dwc_dev, "%s: dma_request_interrupts returns"
- " %d\n", __func__, err);
- return err;
- }
+ if (!desc)
+ return NULL;
- /* Enabe DMA */
- out_le32(&(host_pvt.sata_dma_regs->dma_cfg.low), DMA_EN);
+ desc->callback = dma_dwc_xfer_done;
+ desc->callback_param = hsdev;
- dev_notice(host_pvt.dwc_dev, "DMA initialized\n");
- dev_dbg(host_pvt.dwc_dev, "SATA DMA registers=0x%p\n", host_pvt.\
- sata_dma_regs);
+ dev_dbg(hsdev->dev, "%s sg: 0x%p, count: %d addr: %pad\n",
+ __func__, qc->sg, qc->n_elem, &addr);
- return 0;
+ return desc;
}
static int sata_dwc_scr_read(struct ata_link *link, unsigned int scr, u32 *val)
struct ata_queued_cmd *qc;
u32 serror;
u8 status, tag;
- u32 err_reg;
ata_ehi_clear_desc(ehi);
serror = core_scr_read(SCR_ERROR);
status = ap->ops->sff_check_status(ap);
- err_reg = in_le32(&(host_pvt.sata_dma_regs->interrupt_status.error.\
- low));
tag = ap->link.active_tag;
- dev_err(ap->dev, "%s SCR_ERROR=0x%08x intpr=0x%08x status=0x%08x "
- "dma_intp=%d pending=%d issued=%d dma_err_status=0x%08x\n",
- __func__, serror, intpr, status, host_pvt.dma_interrupt_count,
- hsdevp->dma_pending[tag], hsdevp->cmd_issued[tag], err_reg);
+ dev_err(ap->dev,
+ "%s SCR_ERROR=0x%08x intpr=0x%08x status=0x%08x dma_intp=%d pending=%d issued=%d",
+ __func__, serror, intpr, status, hsdevp->dma_interrupt_count,
+ hsdevp->dma_pending[tag], hsdevp->cmd_issued[tag]);
/* Clear error register and interrupt bit */
clear_serror();
/* DEV interrupt w/ no active qc? */
if (unlikely(!qc || (qc->tf.flags & ATA_TFLAG_POLLING))) {
- dev_err(ap->dev, "%s interrupt with no active qc "
- "qc=%p\n", __func__, qc);
+ dev_err(ap->dev,
+ "%s interrupt with no active qc qc=%p\n",
+ __func__, qc);
ap->ops->sff_check_status(ap);
handled = 1;
goto DONE;
* operation done interrupt. The command should be
* completed only after both interrupts are seen.
*/
- host_pvt.dma_interrupt_count++;
+ hsdevp->dma_interrupt_count++;
if (hsdevp->dma_pending[tag] == \
SATA_DWC_DMA_PENDING_NONE) {
- dev_err(ap->dev, "%s: DMA not pending "
- "intpr=0x%08x status=0x%08x pending"
- "=%d\n", __func__, intpr, status,
+ dev_err(ap->dev,
+ "%s: DMA not pending intpr=0x%08x status=0x%08x pending=%d\n",
+ __func__, intpr, status,
hsdevp->dma_pending[tag]);
}
- if ((host_pvt.dma_interrupt_count % 2) == 0)
+ if ((hsdevp->dma_interrupt_count % 2) == 0)
sata_dwc_dma_xfer_complete(ap, 1);
} else if (ata_is_pio(qc->tf.protocol)) {
ata_sff_hsm_move(ap, qc, status, 0);
if (sactive != 0 || (host_pvt.sata_dwc_sactive_issued) > 1 || \
tag_mask > 1) {
- dev_dbg(ap->dev, "%s NCQ:sactive=0x%08x sactive_issued=0x%08x"
- "tag_mask=0x%08x\n", __func__, sactive,
- host_pvt.sata_dwc_sactive_issued, tag_mask);
+ dev_dbg(ap->dev,
+ "%s NCQ:sactive=0x%08x sactive_issued=0x%08x tag_mask=0x%08x\n",
+ __func__, sactive, host_pvt.sata_dwc_sactive_issued,
+ tag_mask);
}
if ((tag_mask | (host_pvt.sata_dwc_sactive_issued)) != \
(host_pvt.sata_dwc_sactive_issued)) {
- dev_warn(ap->dev, "Bad tag mask? sactive=0x%08x "
- "(host_pvt.sata_dwc_sactive_issued)=0x%08x tag_mask"
- "=0x%08x\n", sactive, host_pvt.sata_dwc_sactive_issued,
- tag_mask);
+ dev_warn(ap->dev,
+ "Bad tag mask? sactive=0x%08x (host_pvt.sata_dwc_sactive_issued)=0x%08x tag_mask=0x%08x\n",
+ sactive, host_pvt.sata_dwc_sactive_issued, tag_mask);
}
/* read just to clear ... not bad if currently still busy */
dev_dbg(ap->dev, "%s NCQ command, protocol: %s\n", __func__,
get_prot_descript(qc->tf.protocol));
if (ata_is_dma(qc->tf.protocol)) {
- host_pvt.dma_interrupt_count++;
+ hsdevp->dma_interrupt_count++;
if (hsdevp->dma_pending[tag] == \
SATA_DWC_DMA_PENDING_NONE)
dev_warn(ap->dev, "%s: DMA not pending?\n",
__func__);
- if ((host_pvt.dma_interrupt_count % 2) == 0)
+ if ((hsdevp->dma_interrupt_count % 2) == 0)
sata_dwc_dma_xfer_complete(ap, 1);
} else {
if (unlikely(sata_dwc_qc_complete(ap, qc, 1)))
*/
sactive2 = core_scr_read(SCR_ACTIVE);
if (sactive2 != sactive) {
- dev_dbg(ap->dev, "More completed - sactive=0x%x sactive2"
- "=0x%x\n", sactive, sactive2);
+ dev_dbg(ap->dev,
+ "More completed - sactive=0x%x sactive2=0x%x\n",
+ sactive, sactive2);
}
handled = 1;
* This should not happen, it indicates the driver is out of
* sync. If it does happen, clear dmacr anyway.
*/
- dev_err(host_pvt.dwc_dev, "%s DMA protocol RX and"
- "TX DMA not pending tag=0x%02x pending=%d"
- " dmacr: 0x%08x\n", __func__, tag,
- hsdevp->dma_pending[tag],
- in_le32(&(hsdev->sata_dwc_regs->dmacr)));
+ dev_err(hsdev->dev,
+ "%s DMA protocol RX and TX DMA not pending tag=0x%02x pending=%d dmacr: 0x%08x\n",
+ __func__, tag, hsdevp->dma_pending[tag],
+ in_le32(&hsdev->sata_dwc_regs->dmacr));
out_le32(&(hsdev->sata_dwc_regs->dmacr),
SATA_DWC_DMACR_TXRXCH_CLEAR);
}
#ifdef DEBUG_NCQ
if (tag > 0) {
- dev_info(ap->dev, "%s tag=%u cmd=0x%02x dma dir=%s proto=%s "
- "dmacr=0x%08x\n", __func__, qc->tag, qc->tf.command,
+ dev_info(ap->dev,
+ "%s tag=%u cmd=0x%02x dma dir=%s proto=%s dmacr=0x%08x\n",
+ __func__, qc->tag, qc->tf.command,
get_dma_dir_descript(qc->dma_dir),
get_prot_descript(qc->tf.protocol),
in_le32(&(hsdev->sata_dwc_regs->dmacr)));
if (ata_is_dma(qc->tf.protocol)) {
if (hsdevp->dma_pending[tag] == SATA_DWC_DMA_PENDING_NONE) {
- dev_err(ap->dev, "%s DMA protocol RX and TX DMA not "
- "pending dmacr: 0x%08x\n", __func__,
+ dev_err(ap->dev,
+ "%s DMA protocol RX and TX DMA not pending dmacr: 0x%08x\n",
+ __func__,
in_le32(&(hsdev->sata_dwc_regs->dmacr)));
}
dev_err(ap->dev, "TX DMA PENDING\n");
else if (hsdevp->dma_pending[tag] == SATA_DWC_DMA_PENDING_RX)
dev_err(ap->dev, "RX DMA PENDING\n");
- dev_dbg(ap->dev, "QC complete cmd=0x%02x status=0x%02x ata%u:"
- " protocol=%d\n", qc->tf.command, status, ap->print_id,
- qc->tf.protocol);
+ dev_dbg(ap->dev,
+ "QC complete cmd=0x%02x status=0x%02x ata%u: protocol=%d\n",
+ qc->tf.command, status, ap->print_id, qc->tf.protocol);
/* clear active bit */
mask = (~(qcmd_tag_to_mask(tag)));
*/
out_le32(&hsdev->sata_dwc_regs->errmr, SATA_DWC_SERROR_ERR_BITS);
- dev_dbg(host_pvt.dwc_dev, "%s: INTMR = 0x%08x, ERRMR = 0x%08x\n",
+ dev_dbg(hsdev->dev, "%s: INTMR = 0x%08x, ERRMR = 0x%08x\n",
__func__, in_le32(&hsdev->sata_dwc_regs->intmr),
in_le32(&hsdev->sata_dwc_regs->errmr));
}
+static bool sata_dwc_dma_filter(struct dma_chan *chan, void *param)
+{
+ struct sata_dwc_device_port *hsdevp = param;
+ struct dw_dma_slave *dws = hsdevp->dws;
+
+ if (dws->dma_dev != chan->device->dev)
+ return false;
+
+ chan->private = dws;
+ return true;
+}
+
static void sata_dwc_setup_port(struct ata_ioports *port, unsigned long base)
{
port->cmd_addr = (void __iomem *)base + 0x00;
struct sata_dwc_device *hsdev;
struct sata_dwc_device_port *hsdevp = NULL;
struct device *pdev;
+ dma_cap_mask_t mask;
int i;
hsdev = HSDEV_FROM_AP(ap);
}
hsdevp->hsdev = hsdev;
+ hsdevp->dws = &sata_dwc_dma_dws;
+ hsdevp->dws->dma_dev = hsdev->dev;
+
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_SLAVE, mask);
+
+ /* Acquire DMA channel */
+ hsdevp->chan = dma_request_channel(mask, sata_dwc_dma_filter, hsdevp);
+ if (!hsdevp->chan) {
+ dev_err(hsdev->dev, "%s: dma channel unavailable\n",
+ __func__);
+ err = -EAGAIN;
+ goto CLEANUP_ALLOC;
+ }
+
for (i = 0; i < SATA_DWC_QCMD_MAX; i++)
hsdevp->cmd_issued[i] = SATA_DWC_CMD_ISSUED_NOT;
ap->bmdma_prd = NULL; /* set these so libata doesn't use them */
ap->bmdma_prd_dma = 0;
- /*
- * DMA - Assign scatter gather LLI table. We can't use the libata
- * version since it's PRD is IDE PCI specific.
- */
- for (i = 0; i < SATA_DWC_QCMD_MAX; i++) {
- hsdevp->llit[i] = dma_alloc_coherent(pdev,
- SATA_DWC_DMAC_LLI_TBL_SZ,
- &(hsdevp->llit_dma[i]),
- GFP_ATOMIC);
- if (!hsdevp->llit[i]) {
- dev_err(ap->dev, "%s: dma_alloc_coherent failed\n",
- __func__);
- err = -ENOMEM;
- goto CLEANUP_ALLOC;
- }
- }
-
if (ap->port_no == 0) {
dev_dbg(ap->dev, "%s: clearing TXCHEN, RXCHEN in DMAC\n",
__func__);
static void sata_dwc_port_stop(struct ata_port *ap)
{
- int i;
- struct sata_dwc_device *hsdev = HSDEV_FROM_AP(ap);
struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap);
dev_dbg(ap->dev, "%s: ap->id = %d\n", __func__, ap->print_id);
- if (hsdevp && hsdev) {
- /* deallocate LLI table */
- for (i = 0; i < SATA_DWC_QCMD_MAX; i++) {
- dma_free_coherent(ap->host->dev,
- SATA_DWC_DMAC_LLI_TBL_SZ,
- hsdevp->llit[i], hsdevp->llit_dma[i]);
- }
+ dmaengine_terminate_all(hsdevp->chan);
+ dma_release_channel(hsdevp->chan);
- kfree(hsdevp);
- }
+ kfree(hsdevp);
ap->private_data = NULL;
}
static void sata_dwc_bmdma_start_by_tag(struct ata_queued_cmd *qc, u8 tag)
{
int start_dma;
- u32 reg, dma_chan;
+ u32 reg;
struct sata_dwc_device *hsdev = HSDEV_FROM_QC(qc);
struct ata_port *ap = qc->ap;
struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap);
+ struct dma_async_tx_descriptor *desc = hsdevp->desc[tag];
int dir = qc->dma_dir;
- dma_chan = hsdevp->dma_chan[tag];
if (hsdevp->cmd_issued[tag] != SATA_DWC_CMD_ISSUED_NOT) {
start_dma = 1;
else
hsdevp->dma_pending[tag] = SATA_DWC_DMA_PENDING_RX;
} else {
- dev_err(ap->dev, "%s: Command not pending cmd_issued=%d "
- "(tag=%d) DMA NOT started\n", __func__,
- hsdevp->cmd_issued[tag], tag);
+ dev_err(ap->dev,
+ "%s: Command not pending cmd_issued=%d (tag=%d) DMA NOT started\n",
+ __func__, hsdevp->cmd_issued[tag], tag);
start_dma = 0;
}
- dev_dbg(ap->dev, "%s qc=%p tag: %x cmd: 0x%02x dma_dir: %s "
- "start_dma? %x\n", __func__, qc, tag, qc->tf.command,
+ dev_dbg(ap->dev,
+ "%s qc=%p tag: %x cmd: 0x%02x dma_dir: %s start_dma? %x\n",
+ __func__, qc, tag, qc->tf.command,
get_dma_dir_descript(qc->dma_dir), start_dma);
- sata_dwc_tf_dump(&(qc->tf));
+ sata_dwc_tf_dump(ap, &qc->tf);
if (start_dma) {
reg = core_scr_read(SCR_ERROR);
SATA_DWC_DMACR_RXCHEN);
/* Enable AHB DMA transfer on the specified channel */
- dma_dwc_xfer_start(dma_chan);
+ dmaengine_submit(desc);
+ dma_async_issue_pending(hsdevp->chan);
}
}
*/
static void sata_dwc_qc_prep_by_tag(struct ata_queued_cmd *qc, u8 tag)
{
- struct scatterlist *sg = qc->sg;
+ struct dma_async_tx_descriptor *desc;
struct ata_port *ap = qc->ap;
- int dma_chan;
- struct sata_dwc_device *hsdev = HSDEV_FROM_AP(ap);
struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap);
dev_dbg(ap->dev, "%s: port=%d dma dir=%s n_elem=%d\n",
__func__, ap->port_no, get_dma_dir_descript(qc->dma_dir),
qc->n_elem);
- dma_chan = dma_dwc_xfer_setup(sg, qc->n_elem, hsdevp->llit[tag],
- hsdevp->llit_dma[tag],
- (void __iomem *)&hsdev->sata_dwc_regs->dmadr,
- qc->dma_dir);
- if (dma_chan < 0) {
- dev_err(ap->dev, "%s: dma_dwc_xfer_setup returns err %d\n",
- __func__, dma_chan);
+ desc = dma_dwc_xfer_setup(qc);
+ if (!desc) {
+ dev_err(ap->dev, "%s: dma_dwc_xfer_setup returns NULL\n",
+ __func__);
return;
}
- hsdevp->dma_chan[tag] = dma_chan;
+ hsdevp->desc[tag] = desc;
}
static unsigned int sata_dwc_qc_issue(struct ata_queued_cmd *qc)
#ifdef DEBUG_NCQ
if (qc->tag > 0 || ap->link.sactive > 1)
- dev_info(ap->dev, "%s ap id=%d cmd(0x%02x)=%s qc tag=%d "
- "prot=%s ap active_tag=0x%08x ap sactive=0x%08x\n",
+ dev_info(ap->dev,
+ "%s ap id=%d cmd(0x%02x)=%s qc tag=%d prot=%s ap active_tag=0x%08x ap sactive=0x%08x\n",
__func__, ap->print_id, qc->tf.command,
ata_get_cmd_descript(qc->tf.command),
qc->tag, get_prot_descript(qc->tf.protocol),
sactive |= (0x00000001 << tag);
core_scr_write(SCR_ACTIVE, sactive);
- dev_dbg(qc->ap->dev, "%s: tag=%d ap->link.sactive = 0x%08x "
- "sactive=0x%08x\n", __func__, tag, qc->ap->link.sactive,
- sactive);
+ dev_dbg(qc->ap->dev,
+ "%s: tag=%d ap->link.sactive = 0x%08x sactive=0x%08x\n",
+ __func__, tag, qc->ap->link.sactive, sactive);
ap->ops->sff_tf_load(ap, &qc->tf);
sata_dwc_exec_command_by_tag(ap, &qc->tf, qc->tag,
struct ata_port_info pi = sata_dwc_port_info[0];
const struct ata_port_info *ppi[] = { &pi, NULL };
struct device_node *np = ofdev->dev.of_node;
- u32 dma_chan;
/* Allocate DWC SATA device */
host = ata_host_alloc_pinfo(&ofdev->dev, ppi, SATA_DWC_MAX_PORTS);
host->private_data = hsdev;
- if (of_property_read_u32(np, "dma-channel", &dma_chan)) {
- dev_warn(&ofdev->dev, "no dma-channel property set."
- " Use channel 0\n");
- dma_chan = 0;
- }
- host_pvt.dma_channel = dma_chan;
-
/* Ioremap SATA registers */
base = of_iomap(np, 0);
if (!base) {
- dev_err(&ofdev->dev, "ioremap failed for SATA register"
- " address\n");
+ dev_err(&ofdev->dev,
+ "ioremap failed for SATA register address\n");
return -ENODEV;
}
hsdev->reg_base = base;
idr, ver[0], ver[1], ver[2]);
/* Get SATA DMA interrupt number */
- irq = irq_of_parse_and_map(np, 1);
- if (irq == NO_IRQ) {
+ hsdev->dma->irq = irq_of_parse_and_map(np, 1);
+ if (hsdev->dma->irq == NO_IRQ) {
dev_err(&ofdev->dev, "no SATA DMA irq\n");
err = -ENODEV;
goto error_iomap;
}
/* Get physical SATA DMA register base address */
- host_pvt.sata_dma_regs = (void *)of_iomap(np, 1);
- if (!(host_pvt.sata_dma_regs)) {
- dev_err(&ofdev->dev, "ioremap failed for AHBDMA register"
- " address\n");
+ hsdev->dma->regs = of_iomap(np, 1);
+ if (!hsdev->dma->regs) {
+ dev_err(&ofdev->dev,
+ "ioremap failed for AHBDMA register address\n");
err = -ENODEV;
goto error_iomap;
}
/* Save dev for later use in dev_xxx() routines */
- host_pvt.dwc_dev = &ofdev->dev;
+ hsdev->dev = &ofdev->dev;
+
+ hsdev->dma->dev = &ofdev->dev;
/* Initialize AHB DMAC */
- err = dma_dwc_init(hsdev, irq);
+ err = dw_dma_probe(hsdev->dma, NULL);
if (err)
goto error_dma_iomap;
error_out:
/* Free SATA DMA resources */
- dma_dwc_exit(hsdev);
+ dw_dma_remove(hsdev->dma);
error_dma_iomap:
- iounmap((void __iomem *)host_pvt.sata_dma_regs);
+ iounmap(hsdev->dma->regs);
error_iomap:
iounmap(base);
return err;
ata_host_detach(host);
/* Free SATA DMA resources */
- dma_dwc_exit(hsdev);
+ dw_dma_remove(hsdev->dma);
- iounmap((void __iomem *)host_pvt.sata_dma_regs);
+ iounmap(hsdev->dma->regs);
iounmap(hsdev->reg_base);
dev_dbg(&ofdev->dev, "done\n");
return 0;
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Mark Miesfeld <mmiesfeld@amcc.com>");
-MODULE_DESCRIPTION("DesignWare Cores SATA controller low lever driver");
+MODULE_DESCRIPTION("DesignWare Cores SATA controller low level driver");
MODULE_VERSION(DRV_VERSION);
}
/* Set dma_mask. This devices doesn't support 64bit addressing. */
- rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev, "32-bit DMA enable failed\n");
return rc;
}
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev, "32-bit consistent DMA enable failed\n");
return rc;
MV5_PHY_CTL = 0x0C,
SATA_IFCFG = 0x050,
LP_PHY_CTL = 0x058,
+ LP_PHY_CTL_PIN_PU_PLL = (1 << 0),
+ LP_PHY_CTL_PIN_PU_RX = (1 << 1),
+ LP_PHY_CTL_PIN_PU_TX = (1 << 2),
+ LP_PHY_CTL_GEN_TX_3G = (1 << 5),
+ LP_PHY_CTL_GEN_RX_3G = (1 << 9),
MV_M2_PREAMP_MASK = 0x7e0,
/*
* Set PHY speed according to SControl speed.
*/
- if ((val & 0xf0) == 0x10)
- writelfl(0x7, lp_phy_addr);
- else
- writelfl(0x227, lp_phy_addr);
+ u32 lp_phy_val =
+ LP_PHY_CTL_PIN_PU_PLL |
+ LP_PHY_CTL_PIN_PU_RX |
+ LP_PHY_CTL_PIN_PU_TX;
+
+ if ((val & 0xf0) != 0x10)
+ lp_phy_val |=
+ LP_PHY_CTL_GEN_TX_3G |
+ LP_PHY_CTL_GEN_RX_3G;
+
+ writelfl(lp_phy_val, lp_phy_addr);
}
}
writelfl(val, addr);
{
int rc;
- if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
+ if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
if (rc) {
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev,
"64-bit DMA enable failed\n");
}
}
} else {
- rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev, "32-bit DMA enable failed\n");
return rc;
}
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev,
"32-bit consistent DMA enable failed\n");
blk_queue_bounce_limit(sdev1->request_queue,
ATA_DMA_MASK);
- pci_set_dma_mask(pdev, ATA_DMA_MASK);
+ dma_set_mask(&pdev->dev, ATA_DMA_MASK);
} else {
/** This shouldn't fail as it was set to this value before */
- pci_set_dma_mask(pdev, pp->adma_dma_mask);
+ dma_set_mask(&pdev->dev, pp->adma_dma_mask);
if (sdev0)
blk_queue_bounce_limit(sdev0->request_queue,
pp->adma_dma_mask);
/* Ensure DMA mask is set to 32-bit before allocating legacy PRD and
pad buffers */
- rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc)
return rc;
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc)
return rc;
These are allowed to fail since we store the value that ends up
being used to set as the bounce limit in slave_config later if
needed. */
- pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
+ dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
+ dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
pp->adma_dma_mask = *dev->dma_mask;
mem = dmam_alloc_coherent(dev, NV_ADMA_PORT_PRIV_DMA_SZ,
/* initialize adapter */
pdc_host_init(host);
- rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
- rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
int rc, have_64bit_bus = (bus_info & QS_HPHY_64BIT);
if (have_64bit_bus &&
- !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
+ !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
if (rc) {
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev,
"64-bit DMA enable failed\n");
}
}
} else {
- rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev, "32-bit DMA enable failed\n");
return rc;
}
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev,
"32-bit consistent DMA enable failed\n");
return rc;
host->iomap = pcim_iomap_table(pdev);
- rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
- rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
/* host flags */
SIL24_COMMON_FLAGS = ATA_FLAG_SATA | ATA_FLAG_PIO_DMA |
ATA_FLAG_NCQ | ATA_FLAG_ACPI_SATA |
- ATA_FLAG_AN | ATA_FLAG_PMP | ATA_FLAG_LOWTAG,
+ ATA_FLAG_AN | ATA_FLAG_PMP,
SIL24_FLAG_PCIX_IRQ_WOC = (1 << 24), /* IRQ loss errata on PCI-X */
IRQ_STAT_4PORTS = 0xf,
host->iomap = iomap;
/* configure and activate the device */
- if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
+ if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
if (rc) {
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev,
"64-bit DMA enable failed\n");
}
}
} else {
- rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev, "32-bit DMA enable failed\n");
return rc;
}
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc) {
dev_err(&pdev->dev,
"32-bit consistent DMA enable failed\n");
ata_port_pbar_desc(ap, 5, offset, "port");
}
- rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
- rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
}
/* configure and activate */
- rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
- rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
for (i = 0; i < host->n_ports; i++)
vt6421_init_addrs(host->ports[i]);
- rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
- rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
+ rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
if (rc)
return rc;
/*
* Use 32 bit DMA mask, because 64 bit address support is poor.
*/
- rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc)
return rc;
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+ rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
if (rc)
return rc;
attribute_container_unregister(struct attribute_container *cont)
{
int retval = -EBUSY;
+
mutex_lock(&attribute_container_mutex);
spin_lock(&cont->containers.k_lock);
if (!list_empty(&cont->containers.k_list))
attribute_container_add_class_device(struct device *classdev)
{
int error = device_add(classdev);
+
if (error)
return error;
return attribute_container_add_attrs(classdev);
goto out_put;
error = device_add_groups(dev, bus->dev_groups);
if (error)
- goto out_groups;
+ goto out_id;
error = sysfs_create_link(&bus->p->devices_kset->kobj,
&dev->kobj, dev_name(dev));
if (error)
- goto out_id;
+ goto out_groups;
error = sysfs_create_link(&dev->kobj,
&dev->bus->p->subsys.kobj, "subsystem");
if (error)
return -ENOENT;
}
- while (np && index < cache_leaves(cpu)) {
+ while (index < cache_leaves(cpu)) {
this_leaf = this_cpu_ci->info_list + index;
if (this_leaf->level != 1)
np = of_find_next_cache_node(np);
else
np = of_node_get(np);/* cpu node itself */
+ if (!np)
+ break;
this_leaf->of_node = np;
index++;
}
+
+ if (index != cache_leaves(cpu)) /* not all OF nodes populated */
+ return -ENOENT;
+
return 0;
}
* will be set up here only if they are not populated already
*/
ret = cache_shared_cpu_map_setup(cpu);
- if (ret)
+ if (ret) {
+ pr_warn("Unable to detect cache hierarcy from DT for CPU %d\n",
+ cpu);
goto free_ci;
+ }
return 0;
free_ci:
const void *ns)
{
int error;
+
if (cls)
error = sysfs_create_file_ns(&cls->p->subsys.kobj,
&attr->attr, ns);
struct class_attribute *attr, char *buf)
{
struct class_attribute_string *cs;
+
cs = container_of(attr, struct class_attribute_string, attr);
return snprintf(buf, PAGE_SIZE, "%s\n", cs->str);
}
static int device_add_class_symlinks(struct device *dev)
{
+ struct device_node *of_node = dev_of_node(dev);
int error;
+ if (of_node) {
+ error = sysfs_create_link(&dev->kobj, &of_node->kobj,"of_node");
+ if (error)
+ dev_warn(dev, "Error %d creating of_node link\n",error);
+ /* An error here doesn't warrant bringing down the device */
+ }
+
if (!dev->class)
return 0;
&dev->class->p->subsys.kobj,
"subsystem");
if (error)
- goto out;
+ goto out_devnode;
if (dev->parent && device_is_not_partition(dev)) {
error = sysfs_create_link(&dev->kobj, &dev->parent->kobj,
out_subsys:
sysfs_remove_link(&dev->kobj, "subsystem");
-out:
+out_devnode:
+ sysfs_remove_link(&dev->kobj, "of_node");
return error;
}
static void device_remove_class_symlinks(struct device *dev)
{
+ if (dev_of_node(dev))
+ sysfs_remove_link(&dev->kobj, "of_node");
+
if (!dev->class)
return;
kobject_del(&dev->kobj);
Error:
cleanup_device_parent(dev);
- if (parent)
- put_device(parent);
+ put_device(parent);
name_error:
kfree(dev->p);
dev->p = NULL;
dev->driver = NULL;
dev_set_drvdata(dev, NULL);
- if (ret == -EPROBE_DEFER) {
+ switch (ret) {
+ case -EPROBE_DEFER:
/* Driver requested deferred probing */
- dev_info(dev, "Driver %s requests probe deferral\n", drv->name);
+ dev_dbg(dev, "Driver %s requests probe deferral\n", drv->name);
driver_deferred_probe_add(dev);
/* Did a trigger occur while probing? Need to re-trigger if yes */
if (local_trigger_count != atomic_read(&deferred_trigger_count))
driver_deferred_probe_trigger();
- } else if (ret != -ENODEV && ret != -ENXIO) {
+ break;
+ case -ENODEV:
+ case -ENXIO:
+ pr_debug("%s: probe of %s rejects match %d\n",
+ drv->name, dev_name(dev), ret);
+ break;
+ default:
/* driver matched but the probe failed */
printk(KERN_WARNING
"%s: probe of %s failed with error %d\n",
drv->name, dev_name(dev), ret);
- } else {
- pr_debug("%s: probe of %s rejects match %d\n",
- drv->name, dev_name(dev), ret);
}
/*
* Ignore errors returned by ->probe so that the next driver can try
* RETURNS:
* Pointer to allocated memory on success, NULL on failure.
*/
-void * dmam_alloc_coherent(struct device *dev, size_t size,
+void *dmam_alloc_coherent(struct device *dev, size_t size,
dma_addr_t *dma_handle, gfp_t gfp)
{
struct dma_devres *dr;
const struct driver_attribute *attr)
{
int error;
+
if (drv)
error = sysfs_create_file(&drv->p->kobj, &attr->attr);
else
{
struct firmware_buf *buf;
- buf = kzalloc(sizeof(*buf) + strlen(fw_name) + 1 , GFP_ATOMIC);
+ buf = kzalloc(sizeof(*buf) + strlen(fw_name) + 1, GFP_ATOMIC);
if (!buf)
return buf;
.write = firmware_data_write,
};
+static struct attribute *fw_dev_attrs[] = {
+ &dev_attr_loading.attr,
+ NULL
+};
+
+static struct bin_attribute *fw_dev_bin_attrs[] = {
+ &firmware_attr_data,
+ NULL
+};
+
+static const struct attribute_group fw_dev_attr_group = {
+ .attrs = fw_dev_attrs,
+ .bin_attrs = fw_dev_bin_attrs,
+};
+
+static const struct attribute_group *fw_dev_attr_groups[] = {
+ &fw_dev_attr_group,
+ NULL
+};
+
static struct firmware_priv *
fw_create_instance(struct firmware *firmware, const char *fw_name,
struct device *device, unsigned int opt_flags)
dev_set_name(f_dev, "%s", fw_name);
f_dev->parent = device;
f_dev->class = &firmware_class;
+ f_dev->groups = fw_dev_attr_groups;
exit:
return fw_priv;
}
goto err_put_dev;
}
- retval = device_create_bin_file(f_dev, &firmware_attr_data);
- if (retval) {
- dev_err(f_dev, "%s: sysfs_create_bin_file failed\n", __func__);
- goto err_del_dev;
- }
-
mutex_lock(&fw_lock);
list_add(&buf->pending_list, &pending_fw_head);
mutex_unlock(&fw_lock);
- retval = device_create_file(f_dev, &dev_attr_loading);
- if (retval) {
- mutex_lock(&fw_lock);
- list_del_init(&buf->pending_list);
- mutex_unlock(&fw_lock);
- dev_err(f_dev, "%s: device_create_file failed\n", __func__);
- goto err_del_bin_attr;
- }
-
if (opt_flags & FW_OPT_UEVENT) {
buf->need_uevent = true;
dev_set_uevent_suppress(f_dev, false);
mutex_lock(&fw_lock);
fw_load_abort(fw_priv);
mutex_unlock(&fw_lock);
+ } else if (retval > 0) {
+ retval = 0;
}
if (is_fw_load_aborted(buf))
else if (!buf->data)
retval = -ENOMEM;
- device_remove_file(f_dev, &dev_attr_loading);
-err_del_bin_attr:
- device_remove_bin_file(f_dev, &firmware_attr_data);
-err_del_dev:
device_del(f_dev);
err_put_dev:
put_device(f_dev);
**/
int
request_firmware(const struct firmware **firmware_p, const char *name,
- struct device *device)
+ struct device *device)
{
int ret;
const char *name, struct device *device)
{
int ret;
+
__module_get(THIS_MODULE);
ret = _request_firmware(firmware_p, name, device,
FW_OPT_UEVENT | FW_OPT_NO_WARN);
{
struct firmware_work *fw_work;
- fw_work = kzalloc(sizeof (struct firmware_work), gfp);
+ fw_work = kzalloc(sizeof(struct firmware_work), gfp);
if (!fw_work)
return -ENOMEM;
if (n > 255)
n = 255;
- p = kmalloc(sizeof(struct probe) * n, GFP_KERNEL);
-
+ p = kmalloc_array(n, sizeof(struct probe), GFP_KERNEL);
if (p == NULL)
return -ENOMEM;
int register_memory_notifier(struct notifier_block *nb)
{
- return blocking_notifier_chain_register(&memory_chain, nb);
+ return blocking_notifier_chain_register(&memory_chain, nb);
}
EXPORT_SYMBOL(register_memory_notifier);
void unregister_memory_notifier(struct notifier_block *nb)
{
- blocking_notifier_chain_unregister(&memory_chain, nb);
+ blocking_notifier_chain_unregister(&memory_chain, nb);
}
EXPORT_SYMBOL(unregister_memory_notifier);
* so that they're not open-coded
*/
switch (mem->state) {
- case MEM_ONLINE:
- len = sprintf(buf, "online\n");
- break;
- case MEM_OFFLINE:
- len = sprintf(buf, "offline\n");
- break;
- case MEM_GOING_OFFLINE:
- len = sprintf(buf, "going-offline\n");
- break;
- default:
- len = sprintf(buf, "ERROR-UNKNOWN-%ld\n",
- mem->state);
- WARN_ON(1);
- break;
+ case MEM_ONLINE:
+ len = sprintf(buf, "online\n");
+ break;
+ case MEM_OFFLINE:
+ len = sprintf(buf, "offline\n");
+ break;
+ case MEM_GOING_OFFLINE:
+ len = sprintf(buf, "going-offline\n");
+ break;
+ default:
+ len = sprintf(buf, "ERROR-UNKNOWN-%ld\n",
+ mem->state);
+ WARN_ON(1);
+ break;
}
return len;
/*
* MEMORY_HOTPLUG depends on SPARSEMEM in mm/Kconfig, so it is
* OK to have direct references to sparsemem variables in here.
+ * Must already be protected by mem_hotplug_begin().
*/
static int
memory_block_action(unsigned long phys_index, unsigned long action, int online_type)
struct page *first_page;
int ret;
- start_pfn = phys_index << PFN_SECTION_SHIFT;
+ start_pfn = section_nr_to_pfn(phys_index);
first_page = pfn_to_page(start_pfn);
switch (action) {
- case MEM_ONLINE:
- if (!pages_correctly_reserved(start_pfn))
- return -EBUSY;
-
- ret = online_pages(start_pfn, nr_pages, online_type);
- break;
- case MEM_OFFLINE:
- ret = offline_pages(start_pfn, nr_pages);
- break;
- default:
- WARN(1, KERN_WARNING "%s(%ld, %ld) unknown action: "
- "%ld\n", __func__, phys_index, action, action);
- ret = -EINVAL;
+ case MEM_ONLINE:
+ if (!pages_correctly_reserved(start_pfn))
+ return -EBUSY;
+
+ ret = online_pages(start_pfn, nr_pages, online_type);
+ break;
+ case MEM_OFFLINE:
+ ret = offline_pages(start_pfn, nr_pages);
+ break;
+ default:
+ WARN(1, KERN_WARNING "%s(%ld, %ld) unknown action: "
+ "%ld\n", __func__, phys_index, action, action);
+ ret = -EINVAL;
}
return ret;
if (mem->online_type < 0)
mem->online_type = MMOP_ONLINE_KEEP;
+ /* Already under protection of mem_hotplug_begin() */
ret = memory_block_change_state(mem, MEM_ONLINE, MEM_OFFLINE);
/* clear online_type */
goto err;
}
+ /*
+ * Memory hotplug needs to hold mem_hotplug_begin() for probe to find
+ * the correct memory block to online before doing device_online(dev),
+ * which will take dev->mutex. Take the lock early to prevent an
+ * inversion, memory_subsys_online() callbacks will be implemented by
+ * assuming it's already protected.
+ */
+ mem_hotplug_begin();
+
switch (online_type) {
case MMOP_ONLINE_KERNEL:
case MMOP_ONLINE_MOVABLE:
case MMOP_ONLINE_KEEP:
- /*
- * mem->online_type is not protected so there can be a
- * race here. However, when racing online, the first
- * will succeed and the second will just return as the
- * block will already be online. The online type
- * could be either one, but that is expected.
- */
mem->online_type = online_type;
ret = device_online(&mem->dev);
break;
ret = -EINVAL; /* should never happen */
}
+ mem_hotplug_done();
err:
unlock_device_hotplug();
static DEVICE_ATTR(vmstat, S_IRUGO, node_read_vmstat, NULL);
static ssize_t node_read_distance(struct device *dev,
- struct device_attribute *attr, char * buf)
+ struct device_attribute *attr, char *buf)
{
int nid = dev->id;
int len = 0;
}
static DEVICE_ATTR(distance, S_IRUGO, node_read_distance, NULL);
+static struct attribute *node_dev_attrs[] = {
+ &dev_attr_cpumap.attr,
+ &dev_attr_cpulist.attr,
+ &dev_attr_meminfo.attr,
+ &dev_attr_numastat.attr,
+ &dev_attr_distance.attr,
+ &dev_attr_vmstat.attr,
+ NULL
+};
+ATTRIBUTE_GROUPS(node_dev);
+
#ifdef CONFIG_HUGETLBFS
/*
* hugetlbfs per node attributes registration interface:
node->dev.id = num;
node->dev.bus = &node_subsys;
node->dev.release = node_device_release;
+ node->dev.groups = node_dev_groups;
error = device_register(&node->dev);
if (!error){
- device_create_file(&node->dev, &dev_attr_cpumap);
- device_create_file(&node->dev, &dev_attr_cpulist);
- device_create_file(&node->dev, &dev_attr_meminfo);
- device_create_file(&node->dev, &dev_attr_numastat);
- device_create_file(&node->dev, &dev_attr_distance);
- device_create_file(&node->dev, &dev_attr_vmstat);
-
hugetlb_register_node(node);
compaction_register_node(node);
*/
void unregister_node(struct node *node)
{
- device_remove_file(&node->dev, &dev_attr_cpumap);
- device_remove_file(&node->dev, &dev_attr_cpulist);
- device_remove_file(&node->dev, &dev_attr_meminfo);
- device_remove_file(&node->dev, &dev_attr_numastat);
- device_remove_file(&node->dev, &dev_attr_distance);
- device_remove_file(&node->dev, &dev_attr_vmstat);
-
hugetlb_unregister_node(node); /* no-op, if memoryless node */
device_unregister(&node->dev);
}
r = platform_get_resource(dev, IORESOURCE_IRQ, num);
+ /*
+ * The resources may pass trigger flags to the irqs that need
+ * to be set up. It so happens that the trigger flags for
+ * IORESOURCE_BITS correspond 1-to-1 to the IRQF_TRIGGER*
+ * settings.
+ */
+ if (r && r->flags & IORESOURCE_BITS)
+ irqd_set_trigger_type(irq_get_irq_data(r->start),
+ r->flags & IORESOURCE_BITS);
return r ? r->start : -ENXIO;
#endif
const char *propname, const char **val)
{
if (is_of_node(fwnode))
- return of_property_read_string(of_node(fwnode),propname, val);
+ return of_property_read_string(of_node(fwnode), propname, val);
else if (is_acpi_node(fwnode))
return acpi_dev_prop_read(acpi_node(fwnode), propname,
DEV_PROP_STRING, val, 1);
+# For include/trace/define_trace.h to include trace.h
+CFLAGS_regmap.o := -I$(src)
+
obj-$(CONFIG_REGMAP) += regmap.o regcache.o
obj-$(CONFIG_REGMAP) += regcache-rbtree.o regcache-lzo.o regcache-flat.o
obj-$(CONFIG_DEBUG_FS) += regmap-debugfs.o
#include <linux/export.h>
#include <linux/slab.h>
#include <linux/sort.h>
-#include <trace/events/regmap.h>
+#include "trace.h"
#include "internal.h"
static const struct regcache_ops *cache_types[] = {
#include <linux/sched.h>
#define CREATE_TRACE_POINTS
-#include <trace/events/regmap.h>
+#include "trace.h"
#include "internal.h"
--- /dev/null
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM regmap
+
+#if !defined(_TRACE_REGMAP_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_REGMAP_H
+
+#include <linux/ktime.h>
+#include <linux/tracepoint.h>
+
+#include "internal.h"
+
+/*
+ * Log register events
+ */
+DECLARE_EVENT_CLASS(regmap_reg,
+
+ TP_PROTO(struct regmap *map, unsigned int reg,
+ unsigned int val),
+
+ TP_ARGS(map, reg, val),
+
+ TP_STRUCT__entry(
+ __string( name, regmap_name(map) )
+ __field( unsigned int, reg )
+ __field( unsigned int, val )
+ ),
+
+ TP_fast_assign(
+ __assign_str(name, regmap_name(map));
+ __entry->reg = reg;
+ __entry->val = val;
+ ),
+
+ TP_printk("%s reg=%x val=%x", __get_str(name),
+ (unsigned int)__entry->reg,
+ (unsigned int)__entry->val)
+);
+
+DEFINE_EVENT(regmap_reg, regmap_reg_write,
+
+ TP_PROTO(struct regmap *map, unsigned int reg,
+ unsigned int val),
+
+ TP_ARGS(map, reg, val)
+
+);
+
+DEFINE_EVENT(regmap_reg, regmap_reg_read,
+
+ TP_PROTO(struct regmap *map, unsigned int reg,
+ unsigned int val),
+
+ TP_ARGS(map, reg, val)
+
+);
+
+DEFINE_EVENT(regmap_reg, regmap_reg_read_cache,
+
+ TP_PROTO(struct regmap *map, unsigned int reg,
+ unsigned int val),
+
+ TP_ARGS(map, reg, val)
+
+);
+
+DECLARE_EVENT_CLASS(regmap_block,
+
+ TP_PROTO(struct regmap *map, unsigned int reg, int count),
+
+ TP_ARGS(map, reg, count),
+
+ TP_STRUCT__entry(
+ __string( name, regmap_name(map) )
+ __field( unsigned int, reg )
+ __field( int, count )
+ ),
+
+ TP_fast_assign(
+ __assign_str(name, regmap_name(map));
+ __entry->reg = reg;
+ __entry->count = count;
+ ),
+
+ TP_printk("%s reg=%x count=%d", __get_str(name),
+ (unsigned int)__entry->reg,
+ (int)__entry->count)
+);
+
+DEFINE_EVENT(regmap_block, regmap_hw_read_start,
+
+ TP_PROTO(struct regmap *map, unsigned int reg, int count),
+
+ TP_ARGS(map, reg, count)
+);
+
+DEFINE_EVENT(regmap_block, regmap_hw_read_done,
+
+ TP_PROTO(struct regmap *map, unsigned int reg, int count),
+
+ TP_ARGS(map, reg, count)
+);
+
+DEFINE_EVENT(regmap_block, regmap_hw_write_start,
+
+ TP_PROTO(struct regmap *map, unsigned int reg, int count),
+
+ TP_ARGS(map, reg, count)
+);
+
+DEFINE_EVENT(regmap_block, regmap_hw_write_done,
+
+ TP_PROTO(struct regmap *map, unsigned int reg, int count),
+
+ TP_ARGS(map, reg, count)
+);
+
+TRACE_EVENT(regcache_sync,
+
+ TP_PROTO(struct regmap *map, const char *type,
+ const char *status),
+
+ TP_ARGS(map, type, status),
+
+ TP_STRUCT__entry(
+ __string( name, regmap_name(map) )
+ __string( status, status )
+ __string( type, type )
+ __field( int, type )
+ ),
+
+ TP_fast_assign(
+ __assign_str(name, regmap_name(map));
+ __assign_str(status, status);
+ __assign_str(type, type);
+ ),
+
+ TP_printk("%s type=%s status=%s", __get_str(name),
+ __get_str(type), __get_str(status))
+);
+
+DECLARE_EVENT_CLASS(regmap_bool,
+
+ TP_PROTO(struct regmap *map, bool flag),
+
+ TP_ARGS(map, flag),
+
+ TP_STRUCT__entry(
+ __string( name, regmap_name(map) )
+ __field( int, flag )
+ ),
+
+ TP_fast_assign(
+ __assign_str(name, regmap_name(map));
+ __entry->flag = flag;
+ ),
+
+ TP_printk("%s flag=%d", __get_str(name),
+ (int)__entry->flag)
+);
+
+DEFINE_EVENT(regmap_bool, regmap_cache_only,
+
+ TP_PROTO(struct regmap *map, bool flag),
+
+ TP_ARGS(map, flag)
+
+);
+
+DEFINE_EVENT(regmap_bool, regmap_cache_bypass,
+
+ TP_PROTO(struct regmap *map, bool flag),
+
+ TP_ARGS(map, flag)
+
+);
+
+DECLARE_EVENT_CLASS(regmap_async,
+
+ TP_PROTO(struct regmap *map),
+
+ TP_ARGS(map),
+
+ TP_STRUCT__entry(
+ __string( name, regmap_name(map) )
+ ),
+
+ TP_fast_assign(
+ __assign_str(name, regmap_name(map));
+ ),
+
+ TP_printk("%s", __get_str(name))
+);
+
+DEFINE_EVENT(regmap_block, regmap_async_write_start,
+
+ TP_PROTO(struct regmap *map, unsigned int reg, int count),
+
+ TP_ARGS(map, reg, count)
+);
+
+DEFINE_EVENT(regmap_async, regmap_async_io_complete,
+
+ TP_PROTO(struct regmap *map),
+
+ TP_ARGS(map)
+
+);
+
+DEFINE_EVENT(regmap_async, regmap_async_complete_start,
+
+ TP_PROTO(struct regmap *map),
+
+ TP_ARGS(map)
+
+);
+
+DEFINE_EVENT(regmap_async, regmap_async_complete_done,
+
+ TP_PROTO(struct regmap *map),
+
+ TP_ARGS(map)
+
+);
+
+TRACE_EVENT(regcache_drop_region,
+
+ TP_PROTO(struct regmap *map, unsigned int from,
+ unsigned int to),
+
+ TP_ARGS(map, from, to),
+
+ TP_STRUCT__entry(
+ __string( name, regmap_name(map) )
+ __field( unsigned int, from )
+ __field( unsigned int, to )
+ ),
+
+ TP_fast_assign(
+ __assign_str(name, regmap_name(map));
+ __entry->from = from;
+ __entry->to = to;
+ ),
+
+ TP_printk("%s %u-%u", __get_str(name), (unsigned int)__entry->from,
+ (unsigned int)__entry->to)
+);
+
+#endif /* _TRACE_REGMAP_H */
+
+#undef TRACE_INCLUDE_PATH
+#define TRACE_INCLUDE_PATH .
+
+#undef TRACE_INCLUDE_FILE
+#define TRACE_INCLUDE_FILE trace
+
+/* This part must be outside protection */
+#include <trace/define_trace.h>
}
static umode_t soc_attribute_mode(struct kobject *kobj,
- struct attribute *attr,
- int index)
+ struct attribute *attr,
+ int index)
{
struct device *dev = container_of(kobj, struct device, kobj);
struct soc_device *soc_dev = container_of(dev, struct soc_device, dev);
return attr->mode;
if ((attr == &dev_attr_soc_id.attr)
&& (soc_dev->attr->soc_id != NULL))
- return attr->mode;
+ return attr->mode;
/* Unknown or unfilled attribute. */
return 0;
soc_dev = kzalloc(sizeof(*soc_dev), GFP_KERNEL);
if (!soc_dev) {
- ret = -ENOMEM;
+ ret = -ENOMEM;
goto out1;
}
} while (ret == -EAGAIN);
if (ret)
- goto out2;
+ goto out2;
soc_dev->attr = soc_dev_attr;
soc_dev->dev.bus = &soc_bus_type;
goto Enomem4;
}
hba[i]->access.set_intr_mask(hba[i], 0);
- if (request_irq(hba[i]->intr, do_ida_intr,
- IRQF_DISABLED|IRQF_SHARED, hba[i]->devname, hba[i]))
+ if (request_irq(hba[i]->intr, do_ida_intr, IRQF_SHARED,
+ hba[i]->devname, hba[i]))
{
printk(KERN_ERR "cpqarray: Unable to get irq %d for %s\n",
hba[i]->intr, hba[i]->devname);
*/
l3->debug_irq = platform_get_irq(pdev, 0);
ret = devm_request_irq(l3->dev, l3->debug_irq, l3_interrupt_handler,
- IRQF_DISABLED, "l3-dbg-irq", l3);
+ 0x0, "l3-dbg-irq", l3);
if (ret) {
dev_err(l3->dev, "request_irq failed for %d\n",
l3->debug_irq);
l3->app_irq = platform_get_irq(pdev, 1);
ret = devm_request_irq(l3->dev, l3->app_irq, l3_interrupt_handler,
- IRQF_DISABLED, "l3-app-irq", l3);
+ 0x0, "l3-app-irq", l3);
if (ret)
dev_err(l3->dev, "request_irq failed for %d\n", l3->app_irq);
}
l3->debug_irq = platform_get_irq(pdev, 0);
- ret = request_irq(l3->debug_irq, omap3_l3_app_irq,
- IRQF_DISABLED | IRQF_TRIGGER_RISING,
- "l3-debug-irq", l3);
+ ret = request_irq(l3->debug_irq, omap3_l3_app_irq, IRQF_TRIGGER_RISING,
+ "l3-debug-irq", l3);
if (ret) {
dev_err(&pdev->dev, "couldn't request debug irq\n");
goto err1;
}
l3->app_irq = platform_get_irq(pdev, 1);
- ret = request_irq(l3->app_irq, omap3_l3_app_irq,
- IRQF_DISABLED | IRQF_TRIGGER_RISING,
- "l3-app-irq", l3);
+ ret = request_irq(l3->app_irq, omap3_l3_app_irq, IRQF_TRIGGER_RISING,
+ "l3-app-irq", l3);
if (ret) {
dev_err(&pdev->dev, "couldn't request app irq\n");
goto err2;
spin_lock_irqsave(&smi->msg_lock, flags);
if (!smi->cur_msg) {
+ spin_unlock_irqrestore(&smi->msg_lock, flags);
pr_warn("no current message?\n");
return 0;
}
*/
bool supports_event_msg_buff;
+ /*
+ * Can we clear the global enables receive irq bit?
+ */
+ bool cannot_clear_recv_irq_bit;
+
/*
* Did we get an attention that we did not handle?
*/
* allocate messages, we just leave them in the BMC and run the system
* polled until we can allocate some memory. Once we have some
* memory, we will re-enable the interrupt.
+ *
+ * Note that we cannot just use disable_irq(), since the interrupt may
+ * be shared.
*/
static inline bool disable_si_irq(struct smi_info *smi_info)
{
if (smi_info->supports_event_msg_buff)
enables |= IPMI_BMC_EVT_MSG_BUFF;
- else
- enables &= ~IPMI_BMC_EVT_MSG_BUFF;
- if (smi_info->irq && !smi_info->interrupt_disabled)
+ if ((smi_info->irq && !smi_info->interrupt_disabled) ||
+ smi_info->cannot_clear_recv_irq_bit)
enables |= IPMI_BMC_RCV_MSG_INTR;
- else
- enables &= ~IPMI_BMC_RCV_MSG_INTR;
if (smi_info->supports_event_msg_buff &&
smi_info->irq && !smi_info->interrupt_disabled)
enables |= IPMI_BMC_EVT_MSG_INTR;
- else
- enables &= ~IPMI_BMC_EVT_MSG_INTR;
*irq_on = enables & (IPMI_BMC_EVT_MSG_INTR | IPMI_BMC_RCV_MSG_INTR);
return rv;
}
+/*
+ * Some BMCs do not support clearing the receive irq bit in the global
+ * enables (even if they don't support interrupts on the BMC). Check
+ * for this and handle it properly.
+ */
+static void check_clr_rcv_irq(struct smi_info *smi_info)
+{
+ unsigned char msg[3];
+ unsigned char *resp;
+ unsigned long resp_len;
+ int rv;
+
+ resp = kmalloc(IPMI_MAX_MSG_LENGTH, GFP_KERNEL);
+ if (!resp) {
+ printk(KERN_WARNING PFX "Out of memory allocating response for"
+ " global enables command, cannot check recv irq bit"
+ " handling.\n");
+ return;
+ }
+
+ msg[0] = IPMI_NETFN_APP_REQUEST << 2;
+ msg[1] = IPMI_GET_BMC_GLOBAL_ENABLES_CMD;
+ smi_info->handlers->start_transaction(smi_info->si_sm, msg, 2);
+
+ rv = wait_for_msg_done(smi_info);
+ if (rv) {
+ printk(KERN_WARNING PFX "Error getting response from get"
+ " global enables command, cannot check recv irq bit"
+ " handling.\n");
+ goto out;
+ }
+
+ resp_len = smi_info->handlers->get_result(smi_info->si_sm,
+ resp, IPMI_MAX_MSG_LENGTH);
+
+ if (resp_len < 4 ||
+ resp[0] != (IPMI_NETFN_APP_REQUEST | 1) << 2 ||
+ resp[1] != IPMI_GET_BMC_GLOBAL_ENABLES_CMD ||
+ resp[2] != 0) {
+ printk(KERN_WARNING PFX "Invalid return from get global"
+ " enables command, cannot check recv irq bit"
+ " handling.\n");
+ rv = -EINVAL;
+ goto out;
+ }
+
+ if ((resp[3] & IPMI_BMC_RCV_MSG_INTR) == 0)
+ /* Already clear, should work ok. */
+ goto out;
+
+ msg[0] = IPMI_NETFN_APP_REQUEST << 2;
+ msg[1] = IPMI_SET_BMC_GLOBAL_ENABLES_CMD;
+ msg[2] = resp[3] & ~IPMI_BMC_RCV_MSG_INTR;
+ smi_info->handlers->start_transaction(smi_info->si_sm, msg, 3);
+
+ rv = wait_for_msg_done(smi_info);
+ if (rv) {
+ printk(KERN_WARNING PFX "Error getting response from set"
+ " global enables command, cannot check recv irq bit"
+ " handling.\n");
+ goto out;
+ }
+
+ resp_len = smi_info->handlers->get_result(smi_info->si_sm,
+ resp, IPMI_MAX_MSG_LENGTH);
+
+ if (resp_len < 3 ||
+ resp[0] != (IPMI_NETFN_APP_REQUEST | 1) << 2 ||
+ resp[1] != IPMI_SET_BMC_GLOBAL_ENABLES_CMD) {
+ printk(KERN_WARNING PFX "Invalid return from get global"
+ " enables command, cannot check recv irq bit"
+ " handling.\n");
+ rv = -EINVAL;
+ goto out;
+ }
+
+ if (resp[2] != 0) {
+ /*
+ * An error when setting the event buffer bit means
+ * clearing the bit is not supported.
+ */
+ printk(KERN_WARNING PFX "The BMC does not support clearing"
+ " the recv irq bit, compensating, but the BMC needs to"
+ " be fixed.\n");
+ smi_info->cannot_clear_recv_irq_bit = true;
+ }
+ out:
+ kfree(resp);
+}
+
static int try_enable_event_buffer(struct smi_info *smi_info)
{
unsigned char msg[3];
goto out_err;
}
+ check_clr_rcv_irq(new_smi);
+
setup_oem_data_handler(new_smi);
setup_xaction_handlers(new_smi);
int result;
/* Wait for something to do */
- wait_for_completion(&ssif_info->wake_thread);
- init_completion(&ssif_info->wake_thread);
-
+ result = wait_for_completion_interruptible(
+ &ssif_info->wake_thread);
if (ssif_info->stopping)
break;
+ if (result == -ERESTARTSYS)
+ continue;
+ init_completion(&ssif_info->wake_thread);
if (ssif_info->i2c_read_write == I2C_SMBUS_WRITE) {
result = i2c_smbus_write_block_data(
#include <linux/pfn.h>
#include <linux/export.h>
#include <linux/io.h>
-#include <linux/aio.h>
+#include <linux/uio.h>
#include <linux/uaccess.h>
#include <linux/types.h> /* size_t */
#include <linux/proc_fs.h>
#include <linux/fcntl.h> /* O_ACCMODE */
-#include <linux/aio.h>
#include <linux/pagemap.h>
#include <linux/hugetlb.h>
#include <linux/uaccess.h>
};
static bool __init
-arch_timer_probed(int type, const struct of_device_id *matches)
+arch_timer_needs_probing(int type, const struct of_device_id *matches)
{
struct device_node *dn;
- bool probed = true;
+ bool needs_probing = false;
dn = of_find_matching_node(NULL, matches);
if (dn && of_device_is_available(dn) && !(arch_timers_present & type))
- probed = false;
+ needs_probing = true;
of_node_put(dn);
- return probed;
+ return needs_probing;
}
static void __init arch_timer_common_init(void)
/* Wait until both nodes are probed if we have two timers */
if ((arch_timers_present & mask) != mask) {
- if (!arch_timer_probed(ARCH_MEM_TIMER, arch_timer_mem_of_match))
+ if (arch_timer_needs_probing(ARCH_MEM_TIMER, arch_timer_mem_of_match))
return;
- if (!arch_timer_probed(ARCH_CP15_TIMER, arch_timer_of_match))
+ if (arch_timer_needs_probing(ARCH_CP15_TIMER, arch_timer_of_match))
return;
}
static u64 notrace read_sched_clock(void)
{
- return ~__raw_readl(sched_io_base);
+ return ~readl_relaxed(sched_io_base);
}
static const struct of_device_id sptimer_ids[] __initconst = {
ret = em_sti_start(p, USER_CLOCKSOURCE);
if (!ret)
- __clocksource_updatefreq_hz(cs, p->rate);
+ __clocksource_update_freq_hz(cs, p->rate);
return ret;
}
ret = sh_cmt_start(ch, FLAG_CLOCKSOURCE);
if (!ret) {
- __clocksource_updatefreq_hz(cs, ch->rate);
+ __clocksource_update_freq_hz(cs, ch->rate);
ch->cs_enabled = true;
}
return ret;
ret = sh_tmu_enable(ch);
if (!ret) {
- __clocksource_updatefreq_hz(cs, ch->rate);
+ __clocksource_update_freq_hz(cs, ch->rate);
ch->cs_enabled = true;
}
TIMER_CTL_CLK_SRC(TIMER_CTL_CLK_SRC_OSC24M),
timer_base + TIMER_CTL_REG(1));
- sched_clock_register(sun4i_timer_sched_read, 32, rate);
+ /*
+ * sched_clock_register does not have priorities, and on sun6i and
+ * later there is a better sched_clock registered by arm_arch_timer.c
+ */
+ if (of_machine_is_compatible("allwinner,sun4i-a10") ||
+ of_machine_is_compatible("allwinner,sun5i-a13") ||
+ of_machine_is_compatible("allwinner,sun5i-a10s"))
+ sched_clock_register(sun4i_timer_sched_read, 32, rate);
+
clocksource_mmio_init(timer_base + TIMER_CNTVAL_REG(1), node->name,
rate, 350, 32, clocksource_mmio_readl_down);
static void __iomem *timer_reg_base;
static void __iomem *rtc_base;
-static struct timespec persistent_ts;
+static struct timespec64 persistent_ts;
static u64 persistent_ms, last_persistent_ms;
static struct delay_timer tegra_delay_timer;
#define timer_writel(value, reg) \
- __raw_writel(value, timer_reg_base + (reg))
+ writel_relaxed(value, timer_reg_base + (reg))
#define timer_readl(reg) \
- __raw_readl(timer_reg_base + (reg))
+ readl_relaxed(timer_reg_base + (reg))
static int tegra_timer_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
}
/*
- * tegra_read_persistent_clock - Return time from a persistent clock.
+ * tegra_read_persistent_clock64 - Return time from a persistent clock.
*
* Reads the time from a source which isn't disabled during PM, the
* 32k sync timer. Convert the cycles elapsed since last read into
- * nsecs and adds to a monotonically increasing timespec.
+ * nsecs and adds to a monotonically increasing timespec64.
* Care must be taken that this funciton is not called while the
* tegra_rtc driver could be executing to avoid race conditions
* on the RTC shadow register
*/
-static void tegra_read_persistent_clock(struct timespec *ts)
+static void tegra_read_persistent_clock64(struct timespec64 *ts)
{
u64 delta;
- struct timespec *tsp = &persistent_ts;
last_persistent_ms = persistent_ms;
persistent_ms = tegra_rtc_read_ms();
delta = persistent_ms - last_persistent_ms;
- timespec_add_ns(tsp, delta * NSEC_PER_MSEC);
- *ts = *tsp;
+ timespec64_add_ns(&persistent_ts, delta * NSEC_PER_MSEC);
+ *ts = persistent_ts;
}
static unsigned long tegra_delay_timer_read_counter_long(void)
else
clk_prepare_enable(clk);
- register_persistent_clock(NULL, tegra_read_persistent_clock);
+ register_persistent_clock(NULL, tegra_read_persistent_clock64);
}
CLOCKSOURCE_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc);
static struct efm32_clock_event_ddata clock_event_ddata = {
.evtdev = {
.name = "efm32 clockevent",
- .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_MODE_PERIODIC,
+ .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
.set_mode = efm32_clock_event_set_mode,
.set_next_event = efm32_clock_event_set_next_event,
.rating = 200,
static inline unsigned int pit_read(void __iomem *base, unsigned int reg_offset)
{
- return __raw_readl(base + reg_offset);
+ return readl_relaxed(base + reg_offset);
}
static inline void pit_write(void __iomem *base, unsigned int reg_offset, unsigned long value)
{
- __raw_writel(value, base + reg_offset);
+ writel_relaxed(value, base + reg_offset);
}
/*
#include <linux/irq.h>
#include <linux/irqreturn.h>
#include <linux/reset.h>
+#include <linux/slab.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#define TIMER_SYNC_TICKS 3
-static void __iomem *timer_base;
-static u32 ticks_per_jiffy;
+struct sun5i_timer {
+ void __iomem *base;
+ struct clk *clk;
+ struct notifier_block clk_rate_cb;
+ u32 ticks_per_jiffy;
+};
+
+#define to_sun5i_timer(x) \
+ container_of(x, struct sun5i_timer, clk_rate_cb)
+
+struct sun5i_timer_clksrc {
+ struct sun5i_timer timer;
+ struct clocksource clksrc;
+};
+
+#define to_sun5i_timer_clksrc(x) \
+ container_of(x, struct sun5i_timer_clksrc, clksrc)
+
+struct sun5i_timer_clkevt {
+ struct sun5i_timer timer;
+ struct clock_event_device clkevt;
+};
+
+#define to_sun5i_timer_clkevt(x) \
+ container_of(x, struct sun5i_timer_clkevt, clkevt)
/*
* When we disable a timer, we need to wait at least for 2 cycles of
* that is already setup and runs at the same frequency than the other
* timers, and we never will be disabled.
*/
-static void sun5i_clkevt_sync(void)
+static void sun5i_clkevt_sync(struct sun5i_timer_clkevt *ce)
{
- u32 old = readl(timer_base + TIMER_CNTVAL_LO_REG(1));
+ u32 old = readl(ce->timer.base + TIMER_CNTVAL_LO_REG(1));
- while ((old - readl(timer_base + TIMER_CNTVAL_LO_REG(1))) < TIMER_SYNC_TICKS)
+ while ((old - readl(ce->timer.base + TIMER_CNTVAL_LO_REG(1))) < TIMER_SYNC_TICKS)
cpu_relax();
}
-static void sun5i_clkevt_time_stop(u8 timer)
+static void sun5i_clkevt_time_stop(struct sun5i_timer_clkevt *ce, u8 timer)
{
- u32 val = readl(timer_base + TIMER_CTL_REG(timer));
- writel(val & ~TIMER_CTL_ENABLE, timer_base + TIMER_CTL_REG(timer));
+ u32 val = readl(ce->timer.base + TIMER_CTL_REG(timer));
+ writel(val & ~TIMER_CTL_ENABLE, ce->timer.base + TIMER_CTL_REG(timer));
- sun5i_clkevt_sync();
+ sun5i_clkevt_sync(ce);
}
-static void sun5i_clkevt_time_setup(u8 timer, u32 delay)
+static void sun5i_clkevt_time_setup(struct sun5i_timer_clkevt *ce, u8 timer, u32 delay)
{
- writel(delay, timer_base + TIMER_INTVAL_LO_REG(timer));
+ writel(delay, ce->timer.base + TIMER_INTVAL_LO_REG(timer));
}
-static void sun5i_clkevt_time_start(u8 timer, bool periodic)
+static void sun5i_clkevt_time_start(struct sun5i_timer_clkevt *ce, u8 timer, bool periodic)
{
- u32 val = readl(timer_base + TIMER_CTL_REG(timer));
+ u32 val = readl(ce->timer.base + TIMER_CTL_REG(timer));
if (periodic)
val &= ~TIMER_CTL_ONESHOT;
val |= TIMER_CTL_ONESHOT;
writel(val | TIMER_CTL_ENABLE | TIMER_CTL_RELOAD,
- timer_base + TIMER_CTL_REG(timer));
+ ce->timer.base + TIMER_CTL_REG(timer));
}
static void sun5i_clkevt_mode(enum clock_event_mode mode,
- struct clock_event_device *clk)
+ struct clock_event_device *clkevt)
{
+ struct sun5i_timer_clkevt *ce = to_sun5i_timer_clkevt(clkevt);
+
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
- sun5i_clkevt_time_stop(0);
- sun5i_clkevt_time_setup(0, ticks_per_jiffy);
- sun5i_clkevt_time_start(0, true);
+ sun5i_clkevt_time_stop(ce, 0);
+ sun5i_clkevt_time_setup(ce, 0, ce->timer.ticks_per_jiffy);
+ sun5i_clkevt_time_start(ce, 0, true);
break;
case CLOCK_EVT_MODE_ONESHOT:
- sun5i_clkevt_time_stop(0);
- sun5i_clkevt_time_start(0, false);
+ sun5i_clkevt_time_stop(ce, 0);
+ sun5i_clkevt_time_start(ce, 0, false);
break;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
default:
- sun5i_clkevt_time_stop(0);
+ sun5i_clkevt_time_stop(ce, 0);
break;
}
}
static int sun5i_clkevt_next_event(unsigned long evt,
- struct clock_event_device *unused)
+ struct clock_event_device *clkevt)
{
- sun5i_clkevt_time_stop(0);
- sun5i_clkevt_time_setup(0, evt - TIMER_SYNC_TICKS);
- sun5i_clkevt_time_start(0, false);
+ struct sun5i_timer_clkevt *ce = to_sun5i_timer_clkevt(clkevt);
+
+ sun5i_clkevt_time_stop(ce, 0);
+ sun5i_clkevt_time_setup(ce, 0, evt - TIMER_SYNC_TICKS);
+ sun5i_clkevt_time_start(ce, 0, false);
return 0;
}
-static struct clock_event_device sun5i_clockevent = {
- .name = "sun5i_tick",
- .rating = 340,
- .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
- .set_mode = sun5i_clkevt_mode,
- .set_next_event = sun5i_clkevt_next_event,
-};
-
-
static irqreturn_t sun5i_timer_interrupt(int irq, void *dev_id)
{
- struct clock_event_device *evt = (struct clock_event_device *)dev_id;
+ struct sun5i_timer_clkevt *ce = (struct sun5i_timer_clkevt *)dev_id;
- writel(0x1, timer_base + TIMER_IRQ_ST_REG);
- evt->event_handler(evt);
+ writel(0x1, ce->timer.base + TIMER_IRQ_ST_REG);
+ ce->clkevt.event_handler(&ce->clkevt);
return IRQ_HANDLED;
}
-static struct irqaction sun5i_timer_irq = {
- .name = "sun5i_timer0",
- .flags = IRQF_TIMER | IRQF_IRQPOLL,
- .handler = sun5i_timer_interrupt,
- .dev_id = &sun5i_clockevent,
-};
+static cycle_t sun5i_clksrc_read(struct clocksource *clksrc)
+{
+ struct sun5i_timer_clksrc *cs = to_sun5i_timer_clksrc(clksrc);
+
+ return ~readl(cs->timer.base + TIMER_CNTVAL_LO_REG(1));
+}
+
+static int sun5i_rate_cb_clksrc(struct notifier_block *nb,
+ unsigned long event, void *data)
+{
+ struct clk_notifier_data *ndata = data;
+ struct sun5i_timer *timer = to_sun5i_timer(nb);
+ struct sun5i_timer_clksrc *cs = container_of(timer, struct sun5i_timer_clksrc, timer);
+
+ switch (event) {
+ case PRE_RATE_CHANGE:
+ clocksource_unregister(&cs->clksrc);
+ break;
+
+ case POST_RATE_CHANGE:
+ clocksource_register_hz(&cs->clksrc, ndata->new_rate);
+ break;
+
+ default:
+ break;
+ }
+
+ return NOTIFY_DONE;
+}
+
+static int __init sun5i_setup_clocksource(struct device_node *node,
+ void __iomem *base,
+ struct clk *clk, int irq)
+{
+ struct sun5i_timer_clksrc *cs;
+ unsigned long rate;
+ int ret;
+
+ cs = kzalloc(sizeof(*cs), GFP_KERNEL);
+ if (!cs)
+ return -ENOMEM;
+
+ ret = clk_prepare_enable(clk);
+ if (ret) {
+ pr_err("Couldn't enable parent clock\n");
+ goto err_free;
+ }
+
+ rate = clk_get_rate(clk);
+
+ cs->timer.base = base;
+ cs->timer.clk = clk;
+ cs->timer.clk_rate_cb.notifier_call = sun5i_rate_cb_clksrc;
+ cs->timer.clk_rate_cb.next = NULL;
+
+ ret = clk_notifier_register(clk, &cs->timer.clk_rate_cb);
+ if (ret) {
+ pr_err("Unable to register clock notifier.\n");
+ goto err_disable_clk;
+ }
+
+ writel(~0, base + TIMER_INTVAL_LO_REG(1));
+ writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD,
+ base + TIMER_CTL_REG(1));
+
+ cs->clksrc.name = node->name;
+ cs->clksrc.rating = 340;
+ cs->clksrc.read = sun5i_clksrc_read;
+ cs->clksrc.mask = CLOCKSOURCE_MASK(32);
+ cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
+
+ ret = clocksource_register_hz(&cs->clksrc, rate);
+ if (ret) {
+ pr_err("Couldn't register clock source.\n");
+ goto err_remove_notifier;
+ }
+
+ return 0;
+
+err_remove_notifier:
+ clk_notifier_unregister(clk, &cs->timer.clk_rate_cb);
+err_disable_clk:
+ clk_disable_unprepare(clk);
+err_free:
+ kfree(cs);
+ return ret;
+}
+
+static int sun5i_rate_cb_clkevt(struct notifier_block *nb,
+ unsigned long event, void *data)
+{
+ struct clk_notifier_data *ndata = data;
+ struct sun5i_timer *timer = to_sun5i_timer(nb);
+ struct sun5i_timer_clkevt *ce = container_of(timer, struct sun5i_timer_clkevt, timer);
+
+ if (event == POST_RATE_CHANGE) {
+ clockevents_update_freq(&ce->clkevt, ndata->new_rate);
+ ce->timer.ticks_per_jiffy = DIV_ROUND_UP(ndata->new_rate, HZ);
+ }
+
+ return NOTIFY_DONE;
+}
+
+static int __init sun5i_setup_clockevent(struct device_node *node, void __iomem *base,
+ struct clk *clk, int irq)
+{
+ struct sun5i_timer_clkevt *ce;
+ unsigned long rate;
+ int ret;
+ u32 val;
+
+ ce = kzalloc(sizeof(*ce), GFP_KERNEL);
+ if (!ce)
+ return -ENOMEM;
+
+ ret = clk_prepare_enable(clk);
+ if (ret) {
+ pr_err("Couldn't enable parent clock\n");
+ goto err_free;
+ }
+
+ rate = clk_get_rate(clk);
+
+ ce->timer.base = base;
+ ce->timer.ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
+ ce->timer.clk = clk;
+ ce->timer.clk_rate_cb.notifier_call = sun5i_rate_cb_clkevt;
+ ce->timer.clk_rate_cb.next = NULL;
+
+ ret = clk_notifier_register(clk, &ce->timer.clk_rate_cb);
+ if (ret) {
+ pr_err("Unable to register clock notifier.\n");
+ goto err_disable_clk;
+ }
+
+ ce->clkevt.name = node->name;
+ ce->clkevt.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
+ ce->clkevt.set_next_event = sun5i_clkevt_next_event;
+ ce->clkevt.set_mode = sun5i_clkevt_mode;
+ ce->clkevt.rating = 340;
+ ce->clkevt.irq = irq;
+ ce->clkevt.cpumask = cpu_possible_mask;
+
+ /* Enable timer0 interrupt */
+ val = readl(base + TIMER_IRQ_EN_REG);
+ writel(val | TIMER_IRQ_EN(0), base + TIMER_IRQ_EN_REG);
+
+ clockevents_config_and_register(&ce->clkevt, rate,
+ TIMER_SYNC_TICKS, 0xffffffff);
+
+ ret = request_irq(irq, sun5i_timer_interrupt, IRQF_TIMER | IRQF_IRQPOLL,
+ "sun5i_timer0", ce);
+ if (ret) {
+ pr_err("Unable to register interrupt\n");
+ goto err_remove_notifier;
+ }
+
+ return 0;
+
+err_remove_notifier:
+ clk_notifier_unregister(clk, &ce->timer.clk_rate_cb);
+err_disable_clk:
+ clk_disable_unprepare(clk);
+err_free:
+ kfree(ce);
+ return ret;
+}
static void __init sun5i_timer_init(struct device_node *node)
{
struct reset_control *rstc;
- unsigned long rate;
+ void __iomem *timer_base;
struct clk *clk;
- int ret, irq;
- u32 val;
+ int irq;
- timer_base = of_iomap(node, 0);
+ timer_base = of_io_request_and_map(node, 0, of_node_full_name(node));
if (!timer_base)
panic("Can't map registers");
clk = of_clk_get(node, 0);
if (IS_ERR(clk))
panic("Can't get timer clock");
- clk_prepare_enable(clk);
- rate = clk_get_rate(clk);
rstc = of_reset_control_get(node, NULL);
if (!IS_ERR(rstc))
reset_control_deassert(rstc);
- writel(~0, timer_base + TIMER_INTVAL_LO_REG(1));
- writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD,
- timer_base + TIMER_CTL_REG(1));
-
- clocksource_mmio_init(timer_base + TIMER_CNTVAL_LO_REG(1), node->name,
- rate, 340, 32, clocksource_mmio_readl_down);
-
- ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
-
- /* Enable timer0 interrupt */
- val = readl(timer_base + TIMER_IRQ_EN_REG);
- writel(val | TIMER_IRQ_EN(0), timer_base + TIMER_IRQ_EN_REG);
-
- sun5i_clockevent.cpumask = cpu_possible_mask;
- sun5i_clockevent.irq = irq;
-
- clockevents_config_and_register(&sun5i_clockevent, rate,
- TIMER_SYNC_TICKS, 0xffffffff);
-
- ret = setup_irq(irq, &sun5i_timer_irq);
- if (ret)
- pr_warn("failed to setup irq %d\n", irq);
+ sun5i_setup_clocksource(node, timer_base, clk, irq);
+ sun5i_setup_clockevent(node, timer_base, clk, irq);
}
CLOCKSOURCE_OF_DECLARE(sun5i_a13, "allwinner,sun5i-a13-hstimer",
sun5i_timer_init);
|| __cpufreq_governor(policy, CPUFREQ_GOV_LIMITS))
pr_err("%s: Failed to start governor for policy: %p\n",
__func__, policy);
-
- /*
- * schedule call cpufreq_update_policy() for boot CPU, i.e. last
- * policy in list. It will verify that the current freq is in
- * sync with what we believe it to be.
- */
- if (list_is_last(&policy->policy_list, &cpufreq_policy_list))
- schedule_work(&policy->update);
}
+
+ /*
+ * schedule call cpufreq_update_policy() for first-online CPU, as that
+ * wouldn't be hotplugged-out on suspend. It will verify that the
+ * current freq is in sync with what we believe it to be.
+ */
+ policy = cpufreq_cpu_get_raw(cpumask_first(cpu_online_mask));
+ if (WARN_ON(!policy))
+ return;
+
+ schedule_work(&policy->update);
}
/**
if (!dev->registered)
return -EINVAL;
- if (!dev->state_count)
- dev->state_count = drv->state_count;
-
ret = cpuidle_add_device_sysfs(dev);
if (ret)
return ret;
#include <linux/sched.h>
#include <linux/cpuidle.h>
#include <linux/cpumask.h>
-#include <linux/clockchips.h>
+#include <linux/tick.h>
#include "cpuidle.h"
#endif
/**
- * cpuidle_setup_broadcast_timer - enable/disable the broadcast timer
+ * cpuidle_setup_broadcast_timer - enable/disable the broadcast timer on a cpu
* @arg: a void pointer used to match the SMP cross call API
*
- * @arg is used as a value of type 'long' with one of the two values:
- * - CLOCK_EVT_NOTIFY_BROADCAST_ON
- * - CLOCK_EVT_NOTIFY_BROADCAST_OFF
+ * If @arg is NULL broadcast is disabled otherwise enabled
*
- * Set the broadcast timer notification for the current CPU. This function
- * is executed per CPU by an SMP cross call. It not supposed to be called
- * directly.
+ * This function is executed per CPU by an SMP cross call. It's not
+ * supposed to be called directly.
*/
static void cpuidle_setup_broadcast_timer(void *arg)
{
- int cpu = smp_processor_id();
- clockevents_notify((long)(arg), &cpu);
+ if (arg)
+ tick_broadcast_enable();
+ else
+ tick_broadcast_disable();
}
/**
if (drv->bctimer)
on_each_cpu_mask(drv->cpumask, cpuidle_setup_broadcast_timer,
- (void *)CLOCK_EVT_NOTIFY_BROADCAST_ON, 1);
+ (void *)1, 1);
poll_idle_init(drv);
if (drv->bctimer) {
drv->bctimer = 0;
on_each_cpu_mask(drv->cpumask, cpuidle_setup_broadcast_timer,
- (void *)CLOCK_EVT_NOTIFY_BROADCAST_OFF, 1);
+ NULL, 1);
}
__cpuidle_unset_driver(drv);
struct cpuidle_driver *drv = cpuidle_get_cpu_driver(device);
/* state statistics */
- for (i = 0; i < device->state_count; i++) {
+ for (i = 0; i < drv->state_count; i++) {
kobj = kzalloc(sizeof(struct cpuidle_state_kobj), GFP_KERNEL);
if (!kobj)
goto error_state;
*/
static void cpuidle_remove_state_sysfs(struct cpuidle_device *device)
{
+ struct cpuidle_driver *drv = cpuidle_get_cpu_driver(device);
int i;
- for (i = 0; i < device->state_count; i++)
+ for (i = 0; i < drv->state_count; i++)
cpuidle_free_state_kobj(device, i);
}
OS and tools for MIC to use with this driver are available from
<http://software.intel.com/en-us/mic-developer>.
-config INTEL_MID_DMAC
- tristate "Intel MID DMA support for Peripheral DMA controllers"
- depends on PCI && X86
- select DMA_ENGINE
- default n
- help
- Enable support for the Intel(R) MID DMA engine present
- in Intel MID chipsets.
-
- Say Y here if you have such a chipset.
-
- If unsure, say N.
-
config ASYNC_TX_ENABLE_CHANNEL_SWITCH
bool
obj-$(CONFIG_DMA_ACPI) += acpi-dma.o
obj-$(CONFIG_DMA_OF) += of-dma.o
-obj-$(CONFIG_INTEL_MID_DMAC) += intel_mid_dma.o
obj-$(CONFIG_DMATEST) += dmatest.o
obj-$(CONFIG_INTEL_IOATDMA) += ioat/
obj-$(CONFIG_INTEL_IOP_ADMA) += iop-adma.o
return of_id->data;
}
+#define CPPI41_DMA_BUSWIDTHS (BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | \
+ BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
+ BIT(DMA_SLAVE_BUSWIDTH_3_BYTES) | \
+ BIT(DMA_SLAVE_BUSWIDTH_4_BYTES))
+
static int cppi41_dma_probe(struct platform_device *pdev)
{
struct cppi41_dd *cdd;
cdd->ddev.device_issue_pending = cppi41_dma_issue_pending;
cdd->ddev.device_prep_slave_sg = cppi41_dma_prep_slave_sg;
cdd->ddev.device_terminate_all = cppi41_stop_chan;
+ cdd->ddev.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
+ cdd->ddev.src_addr_widths = CPPI41_DMA_BUSWIDTHS;
+ cdd->ddev.dst_addr_widths = CPPI41_DMA_BUSWIDTHS;
+ cdd->ddev.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
cdd->ddev.dev = dev;
INIT_LIST_HEAD(&cdd->ddev.channels);
cpp41_dma_info.dma_cap = cdd->ddev.cap_mask;
BUG_ON(!device->device_issue_pending);
BUG_ON(!device->dev);
- WARN(dma_has_cap(DMA_SLAVE, device->cap_mask) && !device->directions,
- "this driver doesn't support generic slave capabilities reporting\n");
-
/* note: this only matters in the
* CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case
*/
+++ /dev/null
-/*
- * intel_mid_dma.c - Intel Langwell DMA Drivers
- *
- * Copyright (C) 2008-10 Intel Corp
- * Author: Vinod Koul <vinod.koul@intel.com>
- * The driver design is based on dw_dmac driver
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
- *
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- *
- */
-#include <linux/pci.h>
-#include <linux/interrupt.h>
-#include <linux/pm_runtime.h>
-#include <linux/intel_mid_dma.h>
-#include <linux/module.h>
-
-#include "dmaengine.h"
-
-#define MAX_CHAN 4 /*max ch across controllers*/
-#include "intel_mid_dma_regs.h"
-
-#define INTEL_MID_DMAC1_ID 0x0814
-#define INTEL_MID_DMAC2_ID 0x0813
-#define INTEL_MID_GP_DMAC2_ID 0x0827
-#define INTEL_MFLD_DMAC1_ID 0x0830
-#define LNW_PERIPHRAL_MASK_BASE 0xFFAE8008
-#define LNW_PERIPHRAL_MASK_SIZE 0x10
-#define LNW_PERIPHRAL_STATUS 0x0
-#define LNW_PERIPHRAL_MASK 0x8
-
-struct intel_mid_dma_probe_info {
- u8 max_chan;
- u8 ch_base;
- u16 block_size;
- u32 pimr_mask;
-};
-
-#define INFO(_max_chan, _ch_base, _block_size, _pimr_mask) \
- ((kernel_ulong_t)&(struct intel_mid_dma_probe_info) { \
- .max_chan = (_max_chan), \
- .ch_base = (_ch_base), \
- .block_size = (_block_size), \
- .pimr_mask = (_pimr_mask), \
- })
-
-/*****************************************************************************
-Utility Functions*/
-/**
- * get_ch_index - convert status to channel
- * @status: status mask
- * @base: dma ch base value
- *
- * Modify the status mask and return the channel index needing
- * attention (or -1 if neither)
- */
-static int get_ch_index(int *status, unsigned int base)
-{
- int i;
- for (i = 0; i < MAX_CHAN; i++) {
- if (*status & (1 << (i + base))) {
- *status = *status & ~(1 << (i + base));
- pr_debug("MDMA: index %d New status %x\n", i, *status);
- return i;
- }
- }
- return -1;
-}
-
-/**
- * get_block_ts - calculates dma transaction length
- * @len: dma transfer length
- * @tx_width: dma transfer src width
- * @block_size: dma controller max block size
- *
- * Based on src width calculate the DMA trsaction length in data items
- * return data items or FFFF if exceeds max length for block
- */
-static int get_block_ts(int len, int tx_width, int block_size)
-{
- int byte_width = 0, block_ts = 0;
-
- switch (tx_width) {
- case DMA_SLAVE_BUSWIDTH_1_BYTE:
- byte_width = 1;
- break;
- case DMA_SLAVE_BUSWIDTH_2_BYTES:
- byte_width = 2;
- break;
- case DMA_SLAVE_BUSWIDTH_4_BYTES:
- default:
- byte_width = 4;
- break;
- }
-
- block_ts = len/byte_width;
- if (block_ts > block_size)
- block_ts = 0xFFFF;
- return block_ts;
-}
-
-/*****************************************************************************
-DMAC1 interrupt Functions*/
-
-/**
- * dmac1_mask_periphral_intr - mask the periphral interrupt
- * @mid: dma device for which masking is required
- *
- * Masks the DMA periphral interrupt
- * this is valid for DMAC1 family controllers only
- * This controller should have periphral mask registers already mapped
- */
-static void dmac1_mask_periphral_intr(struct middma_device *mid)
-{
- u32 pimr;
-
- if (mid->pimr_mask) {
- pimr = readl(mid->mask_reg + LNW_PERIPHRAL_MASK);
- pimr |= mid->pimr_mask;
- writel(pimr, mid->mask_reg + LNW_PERIPHRAL_MASK);
- }
- return;
-}
-
-/**
- * dmac1_unmask_periphral_intr - unmask the periphral interrupt
- * @midc: dma channel for which masking is required
- *
- * UnMasks the DMA periphral interrupt,
- * this is valid for DMAC1 family controllers only
- * This controller should have periphral mask registers already mapped
- */
-static void dmac1_unmask_periphral_intr(struct intel_mid_dma_chan *midc)
-{
- u32 pimr;
- struct middma_device *mid = to_middma_device(midc->chan.device);
-
- if (mid->pimr_mask) {
- pimr = readl(mid->mask_reg + LNW_PERIPHRAL_MASK);
- pimr &= ~mid->pimr_mask;
- writel(pimr, mid->mask_reg + LNW_PERIPHRAL_MASK);
- }
- return;
-}
-
-/**
- * enable_dma_interrupt - enable the periphral interrupt
- * @midc: dma channel for which enable interrupt is required
- *
- * Enable the DMA periphral interrupt,
- * this is valid for DMAC1 family controllers only
- * This controller should have periphral mask registers already mapped
- */
-static void enable_dma_interrupt(struct intel_mid_dma_chan *midc)
-{
- dmac1_unmask_periphral_intr(midc);
-
- /*en ch interrupts*/
- iowrite32(UNMASK_INTR_REG(midc->ch_id), midc->dma_base + MASK_TFR);
- iowrite32(UNMASK_INTR_REG(midc->ch_id), midc->dma_base + MASK_ERR);
- return;
-}
-
-/**
- * disable_dma_interrupt - disable the periphral interrupt
- * @midc: dma channel for which disable interrupt is required
- *
- * Disable the DMA periphral interrupt,
- * this is valid for DMAC1 family controllers only
- * This controller should have periphral mask registers already mapped
- */
-static void disable_dma_interrupt(struct intel_mid_dma_chan *midc)
-{
- /*Check LPE PISR, make sure fwd is disabled*/
- iowrite32(MASK_INTR_REG(midc->ch_id), midc->dma_base + MASK_BLOCK);
- iowrite32(MASK_INTR_REG(midc->ch_id), midc->dma_base + MASK_TFR);
- iowrite32(MASK_INTR_REG(midc->ch_id), midc->dma_base + MASK_ERR);
- return;
-}
-
-/*****************************************************************************
-DMA channel helper Functions*/
-/**
- * mid_desc_get - get a descriptor
- * @midc: dma channel for which descriptor is required
- *
- * Obtain a descriptor for the channel. Returns NULL if none are free.
- * Once the descriptor is returned it is private until put on another
- * list or freed
- */
-static struct intel_mid_dma_desc *midc_desc_get(struct intel_mid_dma_chan *midc)
-{
- struct intel_mid_dma_desc *desc, *_desc;
- struct intel_mid_dma_desc *ret = NULL;
-
- spin_lock_bh(&midc->lock);
- list_for_each_entry_safe(desc, _desc, &midc->free_list, desc_node) {
- if (async_tx_test_ack(&desc->txd)) {
- list_del(&desc->desc_node);
- ret = desc;
- break;
- }
- }
- spin_unlock_bh(&midc->lock);
- return ret;
-}
-
-/**
- * mid_desc_put - put a descriptor
- * @midc: dma channel for which descriptor is required
- * @desc: descriptor to put
- *
- * Return a descriptor from lwn_desc_get back to the free pool
- */
-static void midc_desc_put(struct intel_mid_dma_chan *midc,
- struct intel_mid_dma_desc *desc)
-{
- if (desc) {
- spin_lock_bh(&midc->lock);
- list_add_tail(&desc->desc_node, &midc->free_list);
- spin_unlock_bh(&midc->lock);
- }
-}
-/**
- * midc_dostart - begin a DMA transaction
- * @midc: channel for which txn is to be started
- * @first: first descriptor of series
- *
- * Load a transaction into the engine. This must be called with midc->lock
- * held and bh disabled.
- */
-static void midc_dostart(struct intel_mid_dma_chan *midc,
- struct intel_mid_dma_desc *first)
-{
- struct middma_device *mid = to_middma_device(midc->chan.device);
-
- /* channel is idle */
- if (midc->busy && test_ch_en(midc->dma_base, midc->ch_id)) {
- /*error*/
- pr_err("ERR_MDMA: channel is busy in start\n");
- /* The tasklet will hopefully advance the queue... */
- return;
- }
- midc->busy = true;
- /*write registers and en*/
- iowrite32(first->sar, midc->ch_regs + SAR);
- iowrite32(first->dar, midc->ch_regs + DAR);
- iowrite32(first->lli_phys, midc->ch_regs + LLP);
- iowrite32(first->cfg_hi, midc->ch_regs + CFG_HIGH);
- iowrite32(first->cfg_lo, midc->ch_regs + CFG_LOW);
- iowrite32(first->ctl_lo, midc->ch_regs + CTL_LOW);
- iowrite32(first->ctl_hi, midc->ch_regs + CTL_HIGH);
- pr_debug("MDMA:TX SAR %x,DAR %x,CFGL %x,CFGH %x,CTLH %x, CTLL %x\n",
- (int)first->sar, (int)first->dar, first->cfg_hi,
- first->cfg_lo, first->ctl_hi, first->ctl_lo);
- first->status = DMA_IN_PROGRESS;
-
- iowrite32(ENABLE_CHANNEL(midc->ch_id), mid->dma_base + DMA_CHAN_EN);
-}
-
-/**
- * midc_descriptor_complete - process completed descriptor
- * @midc: channel owning the descriptor
- * @desc: the descriptor itself
- *
- * Process a completed descriptor and perform any callbacks upon
- * the completion. The completion handling drops the lock during the
- * callbacks but must be called with the lock held.
- */
-static void midc_descriptor_complete(struct intel_mid_dma_chan *midc,
- struct intel_mid_dma_desc *desc)
- __releases(&midc->lock) __acquires(&midc->lock)
-{
- struct dma_async_tx_descriptor *txd = &desc->txd;
- dma_async_tx_callback callback_txd = NULL;
- struct intel_mid_dma_lli *llitem;
- void *param_txd = NULL;
-
- dma_cookie_complete(txd);
- callback_txd = txd->callback;
- param_txd = txd->callback_param;
-
- if (desc->lli != NULL) {
- /*clear the DONE bit of completed LLI in memory*/
- llitem = desc->lli + desc->current_lli;
- llitem->ctl_hi &= CLEAR_DONE;
- if (desc->current_lli < desc->lli_length-1)
- (desc->current_lli)++;
- else
- desc->current_lli = 0;
- }
- spin_unlock_bh(&midc->lock);
- if (callback_txd) {
- pr_debug("MDMA: TXD callback set ... calling\n");
- callback_txd(param_txd);
- }
- if (midc->raw_tfr) {
- desc->status = DMA_COMPLETE;
- if (desc->lli != NULL) {
- pci_pool_free(desc->lli_pool, desc->lli,
- desc->lli_phys);
- pci_pool_destroy(desc->lli_pool);
- desc->lli = NULL;
- }
- list_move(&desc->desc_node, &midc->free_list);
- midc->busy = false;
- }
- spin_lock_bh(&midc->lock);
-
-}
-/**
- * midc_scan_descriptors - check the descriptors in channel
- * mark completed when tx is completete
- * @mid: device
- * @midc: channel to scan
- *
- * Walk the descriptor chain for the device and process any entries
- * that are complete.
- */
-static void midc_scan_descriptors(struct middma_device *mid,
- struct intel_mid_dma_chan *midc)
-{
- struct intel_mid_dma_desc *desc = NULL, *_desc = NULL;
-
- /*tx is complete*/
- list_for_each_entry_safe(desc, _desc, &midc->active_list, desc_node) {
- if (desc->status == DMA_IN_PROGRESS)
- midc_descriptor_complete(midc, desc);
- }
- return;
- }
-/**
- * midc_lli_fill_sg - Helper function to convert
- * SG list to Linked List Items.
- *@midc: Channel
- *@desc: DMA descriptor
- *@sglist: Pointer to SG list
- *@sglen: SG list length
- *@flags: DMA transaction flags
- *
- * Walk through the SG list and convert the SG list into Linked
- * List Items (LLI).
- */
-static int midc_lli_fill_sg(struct intel_mid_dma_chan *midc,
- struct intel_mid_dma_desc *desc,
- struct scatterlist *sglist,
- unsigned int sglen,
- unsigned int flags)
-{
- struct intel_mid_dma_slave *mids;
- struct scatterlist *sg;
- dma_addr_t lli_next, sg_phy_addr;
- struct intel_mid_dma_lli *lli_bloc_desc;
- union intel_mid_dma_ctl_lo ctl_lo;
- union intel_mid_dma_ctl_hi ctl_hi;
- int i;
-
- pr_debug("MDMA: Entered midc_lli_fill_sg\n");
- mids = midc->mid_slave;
-
- lli_bloc_desc = desc->lli;
- lli_next = desc->lli_phys;
-
- ctl_lo.ctl_lo = desc->ctl_lo;
- ctl_hi.ctl_hi = desc->ctl_hi;
- for_each_sg(sglist, sg, sglen, i) {
- /*Populate CTL_LOW and LLI values*/
- if (i != sglen - 1) {
- lli_next = lli_next +
- sizeof(struct intel_mid_dma_lli);
- } else {
- /*Check for circular list, otherwise terminate LLI to ZERO*/
- if (flags & DMA_PREP_CIRCULAR_LIST) {
- pr_debug("MDMA: LLI is configured in circular mode\n");
- lli_next = desc->lli_phys;
- } else {
- lli_next = 0;
- ctl_lo.ctlx.llp_dst_en = 0;
- ctl_lo.ctlx.llp_src_en = 0;
- }
- }
- /*Populate CTL_HI values*/
- ctl_hi.ctlx.block_ts = get_block_ts(sg_dma_len(sg),
- desc->width,
- midc->dma->block_size);
- /*Populate SAR and DAR values*/
- sg_phy_addr = sg_dma_address(sg);
- if (desc->dirn == DMA_MEM_TO_DEV) {
- lli_bloc_desc->sar = sg_phy_addr;
- lli_bloc_desc->dar = mids->dma_slave.dst_addr;
- } else if (desc->dirn == DMA_DEV_TO_MEM) {
- lli_bloc_desc->sar = mids->dma_slave.src_addr;
- lli_bloc_desc->dar = sg_phy_addr;
- }
- /*Copy values into block descriptor in system memroy*/
- lli_bloc_desc->llp = lli_next;
- lli_bloc_desc->ctl_lo = ctl_lo.ctl_lo;
- lli_bloc_desc->ctl_hi = ctl_hi.ctl_hi;
-
- lli_bloc_desc++;
- }
- /*Copy very first LLI values to descriptor*/
- desc->ctl_lo = desc->lli->ctl_lo;
- desc->ctl_hi = desc->lli->ctl_hi;
- desc->sar = desc->lli->sar;
- desc->dar = desc->lli->dar;
-
- return 0;
-}
-/*****************************************************************************
-DMA engine callback Functions*/
-/**
- * intel_mid_dma_tx_submit - callback to submit DMA transaction
- * @tx: dma engine descriptor
- *
- * Submit the DMA transaction for this descriptor, start if ch idle
- */
-static dma_cookie_t intel_mid_dma_tx_submit(struct dma_async_tx_descriptor *tx)
-{
- struct intel_mid_dma_desc *desc = to_intel_mid_dma_desc(tx);
- struct intel_mid_dma_chan *midc = to_intel_mid_dma_chan(tx->chan);
- dma_cookie_t cookie;
-
- spin_lock_bh(&midc->lock);
- cookie = dma_cookie_assign(tx);
-
- if (list_empty(&midc->active_list))
- list_add_tail(&desc->desc_node, &midc->active_list);
- else
- list_add_tail(&desc->desc_node, &midc->queue);
-
- midc_dostart(midc, desc);
- spin_unlock_bh(&midc->lock);
-
- return cookie;
-}
-
-/**
- * intel_mid_dma_issue_pending - callback to issue pending txn
- * @chan: chan where pending trascation needs to be checked and submitted
- *
- * Call for scan to issue pending descriptors
- */
-static void intel_mid_dma_issue_pending(struct dma_chan *chan)
-{
- struct intel_mid_dma_chan *midc = to_intel_mid_dma_chan(chan);
-
- spin_lock_bh(&midc->lock);
- if (!list_empty(&midc->queue))
- midc_scan_descriptors(to_middma_device(chan->device), midc);
- spin_unlock_bh(&midc->lock);
-}
-
-/**
- * intel_mid_dma_tx_status - Return status of txn
- * @chan: chan for where status needs to be checked
- * @cookie: cookie for txn
- * @txstate: DMA txn state
- *
- * Return status of DMA txn
- */
-static enum dma_status intel_mid_dma_tx_status(struct dma_chan *chan,
- dma_cookie_t cookie,
- struct dma_tx_state *txstate)
-{
- struct intel_mid_dma_chan *midc = to_intel_mid_dma_chan(chan);
- enum dma_status ret;
-
- ret = dma_cookie_status(chan, cookie, txstate);
- if (ret != DMA_COMPLETE) {
- spin_lock_bh(&midc->lock);
- midc_scan_descriptors(to_middma_device(chan->device), midc);
- spin_unlock_bh(&midc->lock);
-
- ret = dma_cookie_status(chan, cookie, txstate);
- }
-
- return ret;
-}
-
-static int intel_mid_dma_config(struct dma_chan *chan,
- struct dma_slave_config *slave)
-{
- struct intel_mid_dma_chan *midc = to_intel_mid_dma_chan(chan);
- struct intel_mid_dma_slave *mid_slave;
-
- BUG_ON(!midc);
- BUG_ON(!slave);
- pr_debug("MDMA: slave control called\n");
-
- mid_slave = to_intel_mid_dma_slave(slave);
-
- BUG_ON(!mid_slave);
-
- midc->mid_slave = mid_slave;
- return 0;
-}
-
-static int intel_mid_dma_terminate_all(struct dma_chan *chan)
-{
- struct intel_mid_dma_chan *midc = to_intel_mid_dma_chan(chan);
- struct middma_device *mid = to_middma_device(chan->device);
- struct intel_mid_dma_desc *desc, *_desc;
- union intel_mid_dma_cfg_lo cfg_lo;
-
- spin_lock_bh(&midc->lock);
- if (midc->busy == false) {
- spin_unlock_bh(&midc->lock);
- return 0;
- }
- /*Suspend and disable the channel*/
- cfg_lo.cfg_lo = ioread32(midc->ch_regs + CFG_LOW);
- cfg_lo.cfgx.ch_susp = 1;
- iowrite32(cfg_lo.cfg_lo, midc->ch_regs + CFG_LOW);
- iowrite32(DISABLE_CHANNEL(midc->ch_id), mid->dma_base + DMA_CHAN_EN);
- midc->busy = false;
- /* Disable interrupts */
- disable_dma_interrupt(midc);
- midc->descs_allocated = 0;
-
- spin_unlock_bh(&midc->lock);
- list_for_each_entry_safe(desc, _desc, &midc->active_list, desc_node) {
- if (desc->lli != NULL) {
- pci_pool_free(desc->lli_pool, desc->lli,
- desc->lli_phys);
- pci_pool_destroy(desc->lli_pool);
- desc->lli = NULL;
- }
- list_move(&desc->desc_node, &midc->free_list);
- }
- return 0;
-}
-
-
-/**
- * intel_mid_dma_prep_memcpy - Prep memcpy txn
- * @chan: chan for DMA transfer
- * @dest: destn address
- * @src: src address
- * @len: DMA transfer len
- * @flags: DMA flags
- *
- * Perform a DMA memcpy. Note we support slave periphral DMA transfers only
- * The periphral txn details should be filled in slave structure properly
- * Returns the descriptor for this txn
- */
-static struct dma_async_tx_descriptor *intel_mid_dma_prep_memcpy(
- struct dma_chan *chan, dma_addr_t dest,
- dma_addr_t src, size_t len, unsigned long flags)
-{
- struct intel_mid_dma_chan *midc;
- struct intel_mid_dma_desc *desc = NULL;
- struct intel_mid_dma_slave *mids;
- union intel_mid_dma_ctl_lo ctl_lo;
- union intel_mid_dma_ctl_hi ctl_hi;
- union intel_mid_dma_cfg_lo cfg_lo;
- union intel_mid_dma_cfg_hi cfg_hi;
- enum dma_slave_buswidth width;
-
- pr_debug("MDMA: Prep for memcpy\n");
- BUG_ON(!chan);
- if (!len)
- return NULL;
-
- midc = to_intel_mid_dma_chan(chan);
- BUG_ON(!midc);
-
- mids = midc->mid_slave;
- BUG_ON(!mids);
-
- pr_debug("MDMA:called for DMA %x CH %d Length %zu\n",
- midc->dma->pci_id, midc->ch_id, len);
- pr_debug("MDMA:Cfg passed Mode %x, Dirn %x, HS %x, Width %x\n",
- mids->cfg_mode, mids->dma_slave.direction,
- mids->hs_mode, mids->dma_slave.src_addr_width);
-
- /*calculate CFG_LO*/
- if (mids->hs_mode == LNW_DMA_SW_HS) {
- cfg_lo.cfg_lo = 0;
- cfg_lo.cfgx.hs_sel_dst = 1;
- cfg_lo.cfgx.hs_sel_src = 1;
- } else if (mids->hs_mode == LNW_DMA_HW_HS)
- cfg_lo.cfg_lo = 0x00000;
-
- /*calculate CFG_HI*/
- if (mids->cfg_mode == LNW_DMA_MEM_TO_MEM) {
- /*SW HS only*/
- cfg_hi.cfg_hi = 0;
- } else {
- cfg_hi.cfg_hi = 0;
- if (midc->dma->pimr_mask) {
- cfg_hi.cfgx.protctl = 0x0; /*default value*/
- cfg_hi.cfgx.fifo_mode = 1;
- if (mids->dma_slave.direction == DMA_MEM_TO_DEV) {
- cfg_hi.cfgx.src_per = 0;
- if (mids->device_instance == 0)
- cfg_hi.cfgx.dst_per = 3;
- if (mids->device_instance == 1)
- cfg_hi.cfgx.dst_per = 1;
- } else if (mids->dma_slave.direction == DMA_DEV_TO_MEM) {
- if (mids->device_instance == 0)
- cfg_hi.cfgx.src_per = 2;
- if (mids->device_instance == 1)
- cfg_hi.cfgx.src_per = 0;
- cfg_hi.cfgx.dst_per = 0;
- }
- } else {
- cfg_hi.cfgx.protctl = 0x1; /*default value*/
- cfg_hi.cfgx.src_per = cfg_hi.cfgx.dst_per =
- midc->ch_id - midc->dma->chan_base;
- }
- }
-
- /*calculate CTL_HI*/
- ctl_hi.ctlx.reser = 0;
- ctl_hi.ctlx.done = 0;
- width = mids->dma_slave.src_addr_width;
-
- ctl_hi.ctlx.block_ts = get_block_ts(len, width, midc->dma->block_size);
- pr_debug("MDMA:calc len %d for block size %d\n",
- ctl_hi.ctlx.block_ts, midc->dma->block_size);
- /*calculate CTL_LO*/
- ctl_lo.ctl_lo = 0;
- ctl_lo.ctlx.int_en = 1;
- ctl_lo.ctlx.dst_msize = mids->dma_slave.src_maxburst;
- ctl_lo.ctlx.src_msize = mids->dma_slave.dst_maxburst;
-
- /*
- * Here we need some translation from "enum dma_slave_buswidth"
- * to the format for our dma controller
- * standard intel_mid_dmac's format
- * 1 Byte 0b000
- * 2 Bytes 0b001
- * 4 Bytes 0b010
- */
- ctl_lo.ctlx.dst_tr_width = mids->dma_slave.dst_addr_width / 2;
- ctl_lo.ctlx.src_tr_width = mids->dma_slave.src_addr_width / 2;
-
- if (mids->cfg_mode == LNW_DMA_MEM_TO_MEM) {
- ctl_lo.ctlx.tt_fc = 0;
- ctl_lo.ctlx.sinc = 0;
- ctl_lo.ctlx.dinc = 0;
- } else {
- if (mids->dma_slave.direction == DMA_MEM_TO_DEV) {
- ctl_lo.ctlx.sinc = 0;
- ctl_lo.ctlx.dinc = 2;
- ctl_lo.ctlx.tt_fc = 1;
- } else if (mids->dma_slave.direction == DMA_DEV_TO_MEM) {
- ctl_lo.ctlx.sinc = 2;
- ctl_lo.ctlx.dinc = 0;
- ctl_lo.ctlx.tt_fc = 2;
- }
- }
-
- pr_debug("MDMA:Calc CTL LO %x, CTL HI %x, CFG LO %x, CFG HI %x\n",
- ctl_lo.ctl_lo, ctl_hi.ctl_hi, cfg_lo.cfg_lo, cfg_hi.cfg_hi);
-
- enable_dma_interrupt(midc);
-
- desc = midc_desc_get(midc);
- if (desc == NULL)
- goto err_desc_get;
- desc->sar = src;
- desc->dar = dest ;
- desc->len = len;
- desc->cfg_hi = cfg_hi.cfg_hi;
- desc->cfg_lo = cfg_lo.cfg_lo;
- desc->ctl_lo = ctl_lo.ctl_lo;
- desc->ctl_hi = ctl_hi.ctl_hi;
- desc->width = width;
- desc->dirn = mids->dma_slave.direction;
- desc->lli_phys = 0;
- desc->lli = NULL;
- desc->lli_pool = NULL;
- return &desc->txd;
-
-err_desc_get:
- pr_err("ERR_MDMA: Failed to get desc\n");
- midc_desc_put(midc, desc);
- return NULL;
-}
-/**
- * intel_mid_dma_prep_slave_sg - Prep slave sg txn
- * @chan: chan for DMA transfer
- * @sgl: scatter gather list
- * @sg_len: length of sg txn
- * @direction: DMA transfer dirtn
- * @flags: DMA flags
- * @context: transfer context (ignored)
- *
- * Prepares LLI based periphral transfer
- */
-static struct dma_async_tx_descriptor *intel_mid_dma_prep_slave_sg(
- struct dma_chan *chan, struct scatterlist *sgl,
- unsigned int sg_len, enum dma_transfer_direction direction,
- unsigned long flags, void *context)
-{
- struct intel_mid_dma_chan *midc = NULL;
- struct intel_mid_dma_slave *mids = NULL;
- struct intel_mid_dma_desc *desc = NULL;
- struct dma_async_tx_descriptor *txd = NULL;
- union intel_mid_dma_ctl_lo ctl_lo;
-
- pr_debug("MDMA: Prep for slave SG\n");
-
- if (!sg_len) {
- pr_err("MDMA: Invalid SG length\n");
- return NULL;
- }
- midc = to_intel_mid_dma_chan(chan);
- BUG_ON(!midc);
-
- mids = midc->mid_slave;
- BUG_ON(!mids);
-
- if (!midc->dma->pimr_mask) {
- /* We can still handle sg list with only one item */
- if (sg_len == 1) {
- txd = intel_mid_dma_prep_memcpy(chan,
- mids->dma_slave.dst_addr,
- mids->dma_slave.src_addr,
- sg_dma_len(sgl),
- flags);
- return txd;
- } else {
- pr_warn("MDMA: SG list is not supported by this controller\n");
- return NULL;
- }
- }
-
- pr_debug("MDMA: SG Length = %d, direction = %d, Flags = %#lx\n",
- sg_len, direction, flags);
-
- txd = intel_mid_dma_prep_memcpy(chan, 0, 0, sg_dma_len(sgl), flags);
- if (NULL == txd) {
- pr_err("MDMA: Prep memcpy failed\n");
- return NULL;
- }
-
- desc = to_intel_mid_dma_desc(txd);
- desc->dirn = direction;
- ctl_lo.ctl_lo = desc->ctl_lo;
- ctl_lo.ctlx.llp_dst_en = 1;
- ctl_lo.ctlx.llp_src_en = 1;
- desc->ctl_lo = ctl_lo.ctl_lo;
- desc->lli_length = sg_len;
- desc->current_lli = 0;
- /* DMA coherent memory pool for LLI descriptors*/
- desc->lli_pool = pci_pool_create("intel_mid_dma_lli_pool",
- midc->dma->pdev,
- (sizeof(struct intel_mid_dma_lli)*sg_len),
- 32, 0);
- if (NULL == desc->lli_pool) {
- pr_err("MID_DMA:LLI pool create failed\n");
- return NULL;
- }
-
- desc->lli = pci_pool_alloc(desc->lli_pool, GFP_KERNEL, &desc->lli_phys);
- if (!desc->lli) {
- pr_err("MID_DMA: LLI alloc failed\n");
- pci_pool_destroy(desc->lli_pool);
- return NULL;
- }
-
- midc_lli_fill_sg(midc, desc, sgl, sg_len, flags);
- if (flags & DMA_PREP_INTERRUPT) {
- iowrite32(UNMASK_INTR_REG(midc->ch_id),
- midc->dma_base + MASK_BLOCK);
- pr_debug("MDMA:Enabled Block interrupt\n");
- }
- return &desc->txd;
-}
-
-/**
- * intel_mid_dma_free_chan_resources - Frees dma resources
- * @chan: chan requiring attention
- *
- * Frees the allocated resources on this DMA chan
- */
-static void intel_mid_dma_free_chan_resources(struct dma_chan *chan)
-{
- struct intel_mid_dma_chan *midc = to_intel_mid_dma_chan(chan);
- struct middma_device *mid = to_middma_device(chan->device);
- struct intel_mid_dma_desc *desc, *_desc;
-
- if (true == midc->busy) {
- /*trying to free ch in use!!!!!*/
- pr_err("ERR_MDMA: trying to free ch in use\n");
- }
- spin_lock_bh(&midc->lock);
- midc->descs_allocated = 0;
- list_for_each_entry_safe(desc, _desc, &midc->active_list, desc_node) {
- list_del(&desc->desc_node);
- pci_pool_free(mid->dma_pool, desc, desc->txd.phys);
- }
- list_for_each_entry_safe(desc, _desc, &midc->free_list, desc_node) {
- list_del(&desc->desc_node);
- pci_pool_free(mid->dma_pool, desc, desc->txd.phys);
- }
- list_for_each_entry_safe(desc, _desc, &midc->queue, desc_node) {
- list_del(&desc->desc_node);
- pci_pool_free(mid->dma_pool, desc, desc->txd.phys);
- }
- spin_unlock_bh(&midc->lock);
- midc->in_use = false;
- midc->busy = false;
- /* Disable CH interrupts */
- iowrite32(MASK_INTR_REG(midc->ch_id), mid->dma_base + MASK_BLOCK);
- iowrite32(MASK_INTR_REG(midc->ch_id), mid->dma_base + MASK_ERR);
- pm_runtime_put(&mid->pdev->dev);
-}
-
-/**
- * intel_mid_dma_alloc_chan_resources - Allocate dma resources
- * @chan: chan requiring attention
- *
- * Allocates DMA resources on this chan
- * Return the descriptors allocated
- */
-static int intel_mid_dma_alloc_chan_resources(struct dma_chan *chan)
-{
- struct intel_mid_dma_chan *midc = to_intel_mid_dma_chan(chan);
- struct middma_device *mid = to_middma_device(chan->device);
- struct intel_mid_dma_desc *desc;
- dma_addr_t phys;
- int i = 0;
-
- pm_runtime_get_sync(&mid->pdev->dev);
-
- if (mid->state == SUSPENDED) {
- if (dma_resume(&mid->pdev->dev)) {
- pr_err("ERR_MDMA: resume failed");
- return -EFAULT;
- }
- }
-
- /* ASSERT: channel is idle */
- if (test_ch_en(mid->dma_base, midc->ch_id)) {
- /*ch is not idle*/
- pr_err("ERR_MDMA: ch not idle\n");
- pm_runtime_put(&mid->pdev->dev);
- return -EIO;
- }
- dma_cookie_init(chan);
-
- spin_lock_bh(&midc->lock);
- while (midc->descs_allocated < DESCS_PER_CHANNEL) {
- spin_unlock_bh(&midc->lock);
- desc = pci_pool_alloc(mid->dma_pool, GFP_KERNEL, &phys);
- if (!desc) {
- pr_err("ERR_MDMA: desc failed\n");
- pm_runtime_put(&mid->pdev->dev);
- return -ENOMEM;
- /*check*/
- }
- dma_async_tx_descriptor_init(&desc->txd, chan);
- desc->txd.tx_submit = intel_mid_dma_tx_submit;
- desc->txd.flags = DMA_CTRL_ACK;
- desc->txd.phys = phys;
- spin_lock_bh(&midc->lock);
- i = ++midc->descs_allocated;
- list_add_tail(&desc->desc_node, &midc->free_list);
- }
- spin_unlock_bh(&midc->lock);
- midc->in_use = true;
- midc->busy = false;
- pr_debug("MID_DMA: Desc alloc done ret: %d desc\n", i);
- return i;
-}
-
-/**
- * midc_handle_error - Handle DMA txn error
- * @mid: controller where error occurred
- * @midc: chan where error occurred
- *
- * Scan the descriptor for error
- */
-static void midc_handle_error(struct middma_device *mid,
- struct intel_mid_dma_chan *midc)
-{
- midc_scan_descriptors(mid, midc);
-}
-
-/**
- * dma_tasklet - DMA interrupt tasklet
- * @data: tasklet arg (the controller structure)
- *
- * Scan the controller for interrupts for completion/error
- * Clear the interrupt and call for handling completion/error
- */
-static void dma_tasklet(unsigned long data)
-{
- struct middma_device *mid = NULL;
- struct intel_mid_dma_chan *midc = NULL;
- u32 status, raw_tfr, raw_block;
- int i;
-
- mid = (struct middma_device *)data;
- if (mid == NULL) {
- pr_err("ERR_MDMA: tasklet Null param\n");
- return;
- }
- pr_debug("MDMA: in tasklet for device %x\n", mid->pci_id);
- raw_tfr = ioread32(mid->dma_base + RAW_TFR);
- raw_block = ioread32(mid->dma_base + RAW_BLOCK);
- status = raw_tfr | raw_block;
- status &= mid->intr_mask;
- while (status) {
- /*txn interrupt*/
- i = get_ch_index(&status, mid->chan_base);
- if (i < 0) {
- pr_err("ERR_MDMA:Invalid ch index %x\n", i);
- return;
- }
- midc = &mid->ch[i];
- if (midc == NULL) {
- pr_err("ERR_MDMA:Null param midc\n");
- return;
- }
- pr_debug("MDMA:Tx complete interrupt %x, Ch No %d Index %d\n",
- status, midc->ch_id, i);
- midc->raw_tfr = raw_tfr;
- midc->raw_block = raw_block;
- spin_lock_bh(&midc->lock);
- /*clearing this interrupts first*/
- iowrite32((1 << midc->ch_id), mid->dma_base + CLEAR_TFR);
- if (raw_block) {
- iowrite32((1 << midc->ch_id),
- mid->dma_base + CLEAR_BLOCK);
- }
- midc_scan_descriptors(mid, midc);
- pr_debug("MDMA:Scan of desc... complete, unmasking\n");
- iowrite32(UNMASK_INTR_REG(midc->ch_id),
- mid->dma_base + MASK_TFR);
- if (raw_block) {
- iowrite32(UNMASK_INTR_REG(midc->ch_id),
- mid->dma_base + MASK_BLOCK);
- }
- spin_unlock_bh(&midc->lock);
- }
-
- status = ioread32(mid->dma_base + RAW_ERR);
- status &= mid->intr_mask;
- while (status) {
- /*err interrupt*/
- i = get_ch_index(&status, mid->chan_base);
- if (i < 0) {
- pr_err("ERR_MDMA:Invalid ch index %x\n", i);
- return;
- }
- midc = &mid->ch[i];
- if (midc == NULL) {
- pr_err("ERR_MDMA:Null param midc\n");
- return;
- }
- pr_debug("MDMA:Tx complete interrupt %x, Ch No %d Index %d\n",
- status, midc->ch_id, i);
-
- iowrite32((1 << midc->ch_id), mid->dma_base + CLEAR_ERR);
- spin_lock_bh(&midc->lock);
- midc_handle_error(mid, midc);
- iowrite32(UNMASK_INTR_REG(midc->ch_id),
- mid->dma_base + MASK_ERR);
- spin_unlock_bh(&midc->lock);
- }
- pr_debug("MDMA:Exiting takslet...\n");
- return;
-}
-
-static void dma_tasklet1(unsigned long data)
-{
- pr_debug("MDMA:in takslet1...\n");
- return dma_tasklet(data);
-}
-
-static void dma_tasklet2(unsigned long data)
-{
- pr_debug("MDMA:in takslet2...\n");
- return dma_tasklet(data);
-}
-
-/**
- * intel_mid_dma_interrupt - DMA ISR
- * @irq: IRQ where interrupt occurred
- * @data: ISR cllback data (the controller structure)
- *
- * See if this is our interrupt if so then schedule the tasklet
- * otherwise ignore
- */
-static irqreturn_t intel_mid_dma_interrupt(int irq, void *data)
-{
- struct middma_device *mid = data;
- u32 tfr_status, err_status;
- int call_tasklet = 0;
-
- tfr_status = ioread32(mid->dma_base + RAW_TFR);
- err_status = ioread32(mid->dma_base + RAW_ERR);
- if (!tfr_status && !err_status)
- return IRQ_NONE;
-
- /*DMA Interrupt*/
- pr_debug("MDMA:Got an interrupt on irq %d\n", irq);
- pr_debug("MDMA: Status %x, Mask %x\n", tfr_status, mid->intr_mask);
- tfr_status &= mid->intr_mask;
- if (tfr_status) {
- /*need to disable intr*/
- iowrite32((tfr_status << INT_MASK_WE), mid->dma_base + MASK_TFR);
- iowrite32((tfr_status << INT_MASK_WE), mid->dma_base + MASK_BLOCK);
- pr_debug("MDMA: Calling tasklet %x\n", tfr_status);
- call_tasklet = 1;
- }
- err_status &= mid->intr_mask;
- if (err_status) {
- iowrite32((err_status << INT_MASK_WE),
- mid->dma_base + MASK_ERR);
- call_tasklet = 1;
- }
- if (call_tasklet)
- tasklet_schedule(&mid->tasklet);
-
- return IRQ_HANDLED;
-}
-
-static irqreturn_t intel_mid_dma_interrupt1(int irq, void *data)
-{
- return intel_mid_dma_interrupt(irq, data);
-}
-
-static irqreturn_t intel_mid_dma_interrupt2(int irq, void *data)
-{
- return intel_mid_dma_interrupt(irq, data);
-}
-
-/**
- * mid_setup_dma - Setup the DMA controller
- * @pdev: Controller PCI device structure
- *
- * Initialize the DMA controller, channels, registers with DMA engine,
- * ISR. Initialize DMA controller channels.
- */
-static int mid_setup_dma(struct pci_dev *pdev)
-{
- struct middma_device *dma = pci_get_drvdata(pdev);
- int err, i;
-
- /* DMA coherent memory pool for DMA descriptor allocations */
- dma->dma_pool = pci_pool_create("intel_mid_dma_desc_pool", pdev,
- sizeof(struct intel_mid_dma_desc),
- 32, 0);
- if (NULL == dma->dma_pool) {
- pr_err("ERR_MDMA:pci_pool_create failed\n");
- err = -ENOMEM;
- goto err_dma_pool;
- }
-
- INIT_LIST_HEAD(&dma->common.channels);
- dma->pci_id = pdev->device;
- if (dma->pimr_mask) {
- dma->mask_reg = ioremap(LNW_PERIPHRAL_MASK_BASE,
- LNW_PERIPHRAL_MASK_SIZE);
- if (dma->mask_reg == NULL) {
- pr_err("ERR_MDMA:Can't map periphral intr space !!\n");
- err = -ENOMEM;
- goto err_ioremap;
- }
- } else
- dma->mask_reg = NULL;
-
- pr_debug("MDMA:Adding %d channel for this controller\n", dma->max_chan);
- /*init CH structures*/
- dma->intr_mask = 0;
- dma->state = RUNNING;
- for (i = 0; i < dma->max_chan; i++) {
- struct intel_mid_dma_chan *midch = &dma->ch[i];
-
- midch->chan.device = &dma->common;
- dma_cookie_init(&midch->chan);
- midch->ch_id = dma->chan_base + i;
- pr_debug("MDMA:Init CH %d, ID %d\n", i, midch->ch_id);
-
- midch->dma_base = dma->dma_base;
- midch->ch_regs = dma->dma_base + DMA_CH_SIZE * midch->ch_id;
- midch->dma = dma;
- dma->intr_mask |= 1 << (dma->chan_base + i);
- spin_lock_init(&midch->lock);
-
- INIT_LIST_HEAD(&midch->active_list);
- INIT_LIST_HEAD(&midch->queue);
- INIT_LIST_HEAD(&midch->free_list);
- /*mask interrupts*/
- iowrite32(MASK_INTR_REG(midch->ch_id),
- dma->dma_base + MASK_BLOCK);
- iowrite32(MASK_INTR_REG(midch->ch_id),
- dma->dma_base + MASK_SRC_TRAN);
- iowrite32(MASK_INTR_REG(midch->ch_id),
- dma->dma_base + MASK_DST_TRAN);
- iowrite32(MASK_INTR_REG(midch->ch_id),
- dma->dma_base + MASK_ERR);
- iowrite32(MASK_INTR_REG(midch->ch_id),
- dma->dma_base + MASK_TFR);
-
- disable_dma_interrupt(midch);
- list_add_tail(&midch->chan.device_node, &dma->common.channels);
- }
- pr_debug("MDMA: Calc Mask as %x for this controller\n", dma->intr_mask);
-
- /*init dma structure*/
- dma_cap_zero(dma->common.cap_mask);
- dma_cap_set(DMA_MEMCPY, dma->common.cap_mask);
- dma_cap_set(DMA_SLAVE, dma->common.cap_mask);
- dma_cap_set(DMA_PRIVATE, dma->common.cap_mask);
- dma->common.dev = &pdev->dev;
-
- dma->common.device_alloc_chan_resources =
- intel_mid_dma_alloc_chan_resources;
- dma->common.device_free_chan_resources =
- intel_mid_dma_free_chan_resources;
-
- dma->common.device_tx_status = intel_mid_dma_tx_status;
- dma->common.device_prep_dma_memcpy = intel_mid_dma_prep_memcpy;
- dma->common.device_issue_pending = intel_mid_dma_issue_pending;
- dma->common.device_prep_slave_sg = intel_mid_dma_prep_slave_sg;
- dma->common.device_config = intel_mid_dma_config;
- dma->common.device_terminate_all = intel_mid_dma_terminate_all;
-
- /*enable dma cntrl*/
- iowrite32(REG_BIT0, dma->dma_base + DMA_CFG);
-
- /*register irq */
- if (dma->pimr_mask) {
- pr_debug("MDMA:Requesting irq shared for DMAC1\n");
- err = request_irq(pdev->irq, intel_mid_dma_interrupt1,
- IRQF_SHARED, "INTEL_MID_DMAC1", dma);
- if (0 != err)
- goto err_irq;
- } else {
- dma->intr_mask = 0x03;
- pr_debug("MDMA:Requesting irq for DMAC2\n");
- err = request_irq(pdev->irq, intel_mid_dma_interrupt2,
- IRQF_SHARED, "INTEL_MID_DMAC2", dma);
- if (0 != err)
- goto err_irq;
- }
- /*register device w/ engine*/
- err = dma_async_device_register(&dma->common);
- if (0 != err) {
- pr_err("ERR_MDMA:device_register failed: %d\n", err);
- goto err_engine;
- }
- if (dma->pimr_mask) {
- pr_debug("setting up tasklet1 for DMAC1\n");
- tasklet_init(&dma->tasklet, dma_tasklet1, (unsigned long)dma);
- } else {
- pr_debug("setting up tasklet2 for DMAC2\n");
- tasklet_init(&dma->tasklet, dma_tasklet2, (unsigned long)dma);
- }
- return 0;
-
-err_engine:
- free_irq(pdev->irq, dma);
-err_irq:
- if (dma->mask_reg)
- iounmap(dma->mask_reg);
-err_ioremap:
- pci_pool_destroy(dma->dma_pool);
-err_dma_pool:
- pr_err("ERR_MDMA:setup_dma failed: %d\n", err);
- return err;
-
-}
-
-/**
- * middma_shutdown - Shutdown the DMA controller
- * @pdev: Controller PCI device structure
- *
- * Called by remove
- * Unregister DMa controller, clear all structures and free interrupt
- */
-static void middma_shutdown(struct pci_dev *pdev)
-{
- struct middma_device *device = pci_get_drvdata(pdev);
-
- dma_async_device_unregister(&device->common);
- pci_pool_destroy(device->dma_pool);
- if (device->mask_reg)
- iounmap(device->mask_reg);
- if (device->dma_base)
- iounmap(device->dma_base);
- free_irq(pdev->irq, device);
- return;
-}
-
-/**
- * intel_mid_dma_probe - PCI Probe
- * @pdev: Controller PCI device structure
- * @id: pci device id structure
- *
- * Initialize the PCI device, map BARs, query driver data.
- * Call setup_dma to complete contoller and chan initilzation
- */
-static int intel_mid_dma_probe(struct pci_dev *pdev,
- const struct pci_device_id *id)
-{
- struct middma_device *device;
- u32 base_addr, bar_size;
- struct intel_mid_dma_probe_info *info;
- int err;
-
- pr_debug("MDMA: probe for %x\n", pdev->device);
- info = (void *)id->driver_data;
- pr_debug("MDMA: CH %d, base %d, block len %d, Periphral mask %x\n",
- info->max_chan, info->ch_base,
- info->block_size, info->pimr_mask);
-
- err = pci_enable_device(pdev);
- if (err)
- goto err_enable_device;
-
- err = pci_request_regions(pdev, "intel_mid_dmac");
- if (err)
- goto err_request_regions;
-
- err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
- if (err)
- goto err_set_dma_mask;
-
- err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
- if (err)
- goto err_set_dma_mask;
-
- device = kzalloc(sizeof(*device), GFP_KERNEL);
- if (!device) {
- pr_err("ERR_MDMA:kzalloc failed probe\n");
- err = -ENOMEM;
- goto err_kzalloc;
- }
- device->pdev = pci_dev_get(pdev);
-
- base_addr = pci_resource_start(pdev, 0);
- bar_size = pci_resource_len(pdev, 0);
- device->dma_base = ioremap_nocache(base_addr, DMA_REG_SIZE);
- if (!device->dma_base) {
- pr_err("ERR_MDMA:ioremap failed\n");
- err = -ENOMEM;
- goto err_ioremap;
- }
- pci_set_drvdata(pdev, device);
- pci_set_master(pdev);
- device->max_chan = info->max_chan;
- device->chan_base = info->ch_base;
- device->block_size = info->block_size;
- device->pimr_mask = info->pimr_mask;
-
- err = mid_setup_dma(pdev);
- if (err)
- goto err_dma;
-
- pm_runtime_put_noidle(&pdev->dev);
- pm_runtime_allow(&pdev->dev);
- return 0;
-
-err_dma:
- iounmap(device->dma_base);
-err_ioremap:
- pci_dev_put(pdev);
- kfree(device);
-err_kzalloc:
-err_set_dma_mask:
- pci_release_regions(pdev);
- pci_disable_device(pdev);
-err_request_regions:
-err_enable_device:
- pr_err("ERR_MDMA:Probe failed %d\n", err);
- return err;
-}
-
-/**
- * intel_mid_dma_remove - PCI remove
- * @pdev: Controller PCI device structure
- *
- * Free up all resources and data
- * Call shutdown_dma to complete contoller and chan cleanup
- */
-static void intel_mid_dma_remove(struct pci_dev *pdev)
-{
- struct middma_device *device = pci_get_drvdata(pdev);
-
- pm_runtime_get_noresume(&pdev->dev);
- pm_runtime_forbid(&pdev->dev);
- middma_shutdown(pdev);
- pci_dev_put(pdev);
- kfree(device);
- pci_release_regions(pdev);
- pci_disable_device(pdev);
-}
-
-/* Power Management */
-/*
-* dma_suspend - PCI suspend function
-*
-* @pci: PCI device structure
-* @state: PM message
-*
-* This function is called by OS when a power event occurs
-*/
-static int dma_suspend(struct device *dev)
-{
- struct pci_dev *pci = to_pci_dev(dev);
- int i;
- struct middma_device *device = pci_get_drvdata(pci);
- pr_debug("MDMA: dma_suspend called\n");
-
- for (i = 0; i < device->max_chan; i++) {
- if (device->ch[i].in_use)
- return -EAGAIN;
- }
- dmac1_mask_periphral_intr(device);
- device->state = SUSPENDED;
- pci_save_state(pci);
- pci_disable_device(pci);
- pci_set_power_state(pci, PCI_D3hot);
- return 0;
-}
-
-/**
-* dma_resume - PCI resume function
-*
-* @pci: PCI device structure
-*
-* This function is called by OS when a power event occurs
-*/
-int dma_resume(struct device *dev)
-{
- struct pci_dev *pci = to_pci_dev(dev);
- int ret;
- struct middma_device *device = pci_get_drvdata(pci);
-
- pr_debug("MDMA: dma_resume called\n");
- pci_set_power_state(pci, PCI_D0);
- pci_restore_state(pci);
- ret = pci_enable_device(pci);
- if (ret) {
- pr_err("MDMA: device can't be enabled for %x\n", pci->device);
- return ret;
- }
- device->state = RUNNING;
- iowrite32(REG_BIT0, device->dma_base + DMA_CFG);
- return 0;
-}
-
-static int dma_runtime_suspend(struct device *dev)
-{
- struct pci_dev *pci_dev = to_pci_dev(dev);
- struct middma_device *device = pci_get_drvdata(pci_dev);
-
- device->state = SUSPENDED;
- return 0;
-}
-
-static int dma_runtime_resume(struct device *dev)
-{
- struct pci_dev *pci_dev = to_pci_dev(dev);
- struct middma_device *device = pci_get_drvdata(pci_dev);
-
- device->state = RUNNING;
- iowrite32(REG_BIT0, device->dma_base + DMA_CFG);
- return 0;
-}
-
-static int dma_runtime_idle(struct device *dev)
-{
- struct pci_dev *pdev = to_pci_dev(dev);
- struct middma_device *device = pci_get_drvdata(pdev);
- int i;
-
- for (i = 0; i < device->max_chan; i++) {
- if (device->ch[i].in_use)
- return -EAGAIN;
- }
-
- return 0;
-}
-
-/******************************************************************************
-* PCI stuff
-*/
-static struct pci_device_id intel_mid_dma_ids[] = {
- { PCI_VDEVICE(INTEL, INTEL_MID_DMAC1_ID), INFO(2, 6, 4095, 0x200020)},
- { PCI_VDEVICE(INTEL, INTEL_MID_DMAC2_ID), INFO(2, 0, 2047, 0)},
- { PCI_VDEVICE(INTEL, INTEL_MID_GP_DMAC2_ID), INFO(2, 0, 2047, 0)},
- { PCI_VDEVICE(INTEL, INTEL_MFLD_DMAC1_ID), INFO(4, 0, 4095, 0x400040)},
- { 0, }
-};
-MODULE_DEVICE_TABLE(pci, intel_mid_dma_ids);
-
-static const struct dev_pm_ops intel_mid_dma_pm = {
- .runtime_suspend = dma_runtime_suspend,
- .runtime_resume = dma_runtime_resume,
- .runtime_idle = dma_runtime_idle,
- .suspend = dma_suspend,
- .resume = dma_resume,
-};
-
-static struct pci_driver intel_mid_dma_pci_driver = {
- .name = "Intel MID DMA",
- .id_table = intel_mid_dma_ids,
- .probe = intel_mid_dma_probe,
- .remove = intel_mid_dma_remove,
-#ifdef CONFIG_PM
- .driver = {
- .pm = &intel_mid_dma_pm,
- },
-#endif
-};
-
-static int __init intel_mid_dma_init(void)
-{
- pr_debug("INFO_MDMA: LNW DMA Driver Version %s\n",
- INTEL_MID_DMA_DRIVER_VERSION);
- return pci_register_driver(&intel_mid_dma_pci_driver);
-}
-fs_initcall(intel_mid_dma_init);
-
-static void __exit intel_mid_dma_exit(void)
-{
- pci_unregister_driver(&intel_mid_dma_pci_driver);
-}
-module_exit(intel_mid_dma_exit);
-
-MODULE_AUTHOR("Vinod Koul <vinod.koul@intel.com>");
-MODULE_DESCRIPTION("Intel (R) MID DMAC Driver");
-MODULE_LICENSE("GPL v2");
-MODULE_VERSION(INTEL_MID_DMA_DRIVER_VERSION);
+++ /dev/null
-/*
- * intel_mid_dma_regs.h - Intel MID DMA Drivers
- *
- * Copyright (C) 2008-10 Intel Corp
- * Author: Vinod Koul <vinod.koul@intel.com>
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
- *
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- *
- */
-#ifndef __INTEL_MID_DMAC_REGS_H__
-#define __INTEL_MID_DMAC_REGS_H__
-
-#include <linux/dmaengine.h>
-#include <linux/dmapool.h>
-#include <linux/pci_ids.h>
-
-#define INTEL_MID_DMA_DRIVER_VERSION "1.1.0"
-
-#define REG_BIT0 0x00000001
-#define REG_BIT8 0x00000100
-#define INT_MASK_WE 0x8
-#define CLEAR_DONE 0xFFFFEFFF
-#define UNMASK_INTR_REG(chan_num) \
- ((REG_BIT0 << chan_num) | (REG_BIT8 << chan_num))
-#define MASK_INTR_REG(chan_num) (REG_BIT8 << chan_num)
-
-#define ENABLE_CHANNEL(chan_num) \
- ((REG_BIT0 << chan_num) | (REG_BIT8 << chan_num))
-
-#define DISABLE_CHANNEL(chan_num) \
- (REG_BIT8 << chan_num)
-
-#define DESCS_PER_CHANNEL 16
-/*DMA Registers*/
-/*registers associated with channel programming*/
-#define DMA_REG_SIZE 0x400
-#define DMA_CH_SIZE 0x58
-
-/*CH X REG = (DMA_CH_SIZE)*CH_NO + REG*/
-#define SAR 0x00 /* Source Address Register*/
-#define DAR 0x08 /* Destination Address Register*/
-#define LLP 0x10 /* Linked List Pointer Register*/
-#define CTL_LOW 0x18 /* Control Register*/
-#define CTL_HIGH 0x1C /* Control Register*/
-#define CFG_LOW 0x40 /* Configuration Register Low*/
-#define CFG_HIGH 0x44 /* Configuration Register high*/
-
-#define STATUS_TFR 0x2E8
-#define STATUS_BLOCK 0x2F0
-#define STATUS_ERR 0x308
-
-#define RAW_TFR 0x2C0
-#define RAW_BLOCK 0x2C8
-#define RAW_ERR 0x2E0
-
-#define MASK_TFR 0x310
-#define MASK_BLOCK 0x318
-#define MASK_SRC_TRAN 0x320
-#define MASK_DST_TRAN 0x328
-#define MASK_ERR 0x330
-
-#define CLEAR_TFR 0x338
-#define CLEAR_BLOCK 0x340
-#define CLEAR_SRC_TRAN 0x348
-#define CLEAR_DST_TRAN 0x350
-#define CLEAR_ERR 0x358
-
-#define INTR_STATUS 0x360
-#define DMA_CFG 0x398
-#define DMA_CHAN_EN 0x3A0
-
-/*DMA channel control registers*/
-union intel_mid_dma_ctl_lo {
- struct {
- u32 int_en:1; /*enable or disable interrupts*/
- /*should be 0*/
- u32 dst_tr_width:3; /*destination transfer width*/
- /*usually 32 bits = 010*/
- u32 src_tr_width:3; /*source transfer width*/
- /*usually 32 bits = 010*/
- u32 dinc:2; /*destination address inc/dec*/
- /*For mem:INC=00, Periphral NoINC=11*/
- u32 sinc:2; /*source address inc or dec, as above*/
- u32 dst_msize:3; /*destination burst transaction length*/
- /*always = 16 ie 011*/
- u32 src_msize:3; /*source burst transaction length*/
- /*always = 16 ie 011*/
- u32 reser1:3;
- u32 tt_fc:3; /*transfer type and flow controller*/
- /*M-M = 000
- P-M = 010
- M-P = 001*/
- u32 dms:2; /*destination master select = 0*/
- u32 sms:2; /*source master select = 0*/
- u32 llp_dst_en:1; /*enable/disable destination LLP = 0*/
- u32 llp_src_en:1; /*enable/disable source LLP = 0*/
- u32 reser2:3;
- } ctlx;
- u32 ctl_lo;
-};
-
-union intel_mid_dma_ctl_hi {
- struct {
- u32 block_ts:12; /*block transfer size*/
- u32 done:1; /*Done - updated by DMAC*/
- u32 reser:19; /*configured by DMAC*/
- } ctlx;
- u32 ctl_hi;
-
-};
-
-/*DMA channel configuration registers*/
-union intel_mid_dma_cfg_lo {
- struct {
- u32 reser1:5;
- u32 ch_prior:3; /*channel priority = 0*/
- u32 ch_susp:1; /*channel suspend = 0*/
- u32 fifo_empty:1; /*FIFO empty or not R bit = 0*/
- u32 hs_sel_dst:1; /*select HW/SW destn handshaking*/
- /*HW = 0, SW = 1*/
- u32 hs_sel_src:1; /*select HW/SW src handshaking*/
- u32 reser2:6;
- u32 dst_hs_pol:1; /*dest HS interface polarity*/
- u32 src_hs_pol:1; /*src HS interface polarity*/
- u32 max_abrst:10; /*max AMBA burst len = 0 (no sw limit*/
- u32 reload_src:1; /*auto reload src addr =1 if src is P*/
- u32 reload_dst:1; /*AR destn addr =1 if dstn is P*/
- } cfgx;
- u32 cfg_lo;
-};
-
-union intel_mid_dma_cfg_hi {
- struct {
- u32 fcmode:1; /*flow control mode = 1*/
- u32 fifo_mode:1; /*FIFO mode select = 1*/
- u32 protctl:3; /*protection control = 0*/
- u32 rsvd:2;
- u32 src_per:4; /*src hw HS interface*/
- u32 dst_per:4; /*dstn hw HS interface*/
- u32 reser2:17;
- } cfgx;
- u32 cfg_hi;
-};
-
-
-/**
- * struct intel_mid_dma_chan - internal mid representation of a DMA channel
- * @chan: dma_chan strcture represetation for mid chan
- * @ch_regs: MMIO register space pointer to channel register
- * @dma_base: MMIO register space DMA engine base pointer
- * @ch_id: DMA channel id
- * @lock: channel spinlock
- * @active_list: current active descriptors
- * @queue: current queued up descriptors
- * @free_list: current free descriptors
- * @slave: dma slave structure
- * @descs_allocated: total number of descriptors allocated
- * @dma: dma device structure pointer
- * @busy: bool representing if ch is busy (active txn) or not
- * @in_use: bool representing if ch is in use or not
- * @raw_tfr: raw trf interrupt received
- * @raw_block: raw block interrupt received
- */
-struct intel_mid_dma_chan {
- struct dma_chan chan;
- void __iomem *ch_regs;
- void __iomem *dma_base;
- int ch_id;
- spinlock_t lock;
- struct list_head active_list;
- struct list_head queue;
- struct list_head free_list;
- unsigned int descs_allocated;
- struct middma_device *dma;
- bool busy;
- bool in_use;
- u32 raw_tfr;
- u32 raw_block;
- struct intel_mid_dma_slave *mid_slave;
-};
-
-static inline struct intel_mid_dma_chan *to_intel_mid_dma_chan(
- struct dma_chan *chan)
-{
- return container_of(chan, struct intel_mid_dma_chan, chan);
-}
-
-enum intel_mid_dma_state {
- RUNNING = 0,
- SUSPENDED,
-};
-/**
- * struct middma_device - internal representation of a DMA device
- * @pdev: PCI device
- * @dma_base: MMIO register space pointer of DMA
- * @dma_pool: for allocating DMA descriptors
- * @common: embedded struct dma_device
- * @tasklet: dma tasklet for processing interrupts
- * @ch: per channel data
- * @pci_id: DMA device PCI ID
- * @intr_mask: Interrupt mask to be used
- * @mask_reg: MMIO register for periphral mask
- * @chan_base: Base ch index (read from driver data)
- * @max_chan: max number of chs supported (from drv_data)
- * @block_size: Block size of DMA transfer supported (from drv_data)
- * @pimr_mask: MMIO register addr for periphral interrupt (from drv_data)
- * @state: dma PM device state
- */
-struct middma_device {
- struct pci_dev *pdev;
- void __iomem *dma_base;
- struct pci_pool *dma_pool;
- struct dma_device common;
- struct tasklet_struct tasklet;
- struct intel_mid_dma_chan ch[MAX_CHAN];
- unsigned int pci_id;
- unsigned int intr_mask;
- void __iomem *mask_reg;
- int chan_base;
- int max_chan;
- int block_size;
- unsigned int pimr_mask;
- enum intel_mid_dma_state state;
-};
-
-static inline struct middma_device *to_middma_device(struct dma_device *common)
-{
- return container_of(common, struct middma_device, common);
-}
-
-struct intel_mid_dma_desc {
- void __iomem *block; /*ch ptr*/
- struct list_head desc_node;
- struct dma_async_tx_descriptor txd;
- size_t len;
- dma_addr_t sar;
- dma_addr_t dar;
- u32 cfg_hi;
- u32 cfg_lo;
- u32 ctl_lo;
- u32 ctl_hi;
- struct pci_pool *lli_pool;
- struct intel_mid_dma_lli *lli;
- dma_addr_t lli_phys;
- unsigned int lli_length;
- unsigned int current_lli;
- dma_addr_t next;
- enum dma_transfer_direction dirn;
- enum dma_status status;
- enum dma_slave_buswidth width; /*width of DMA txn*/
- enum intel_mid_dma_mode cfg_mode; /*mode configuration*/
-
-};
-
-struct intel_mid_dma_lli {
- dma_addr_t sar;
- dma_addr_t dar;
- dma_addr_t llp;
- u32 ctl_lo;
- u32 ctl_hi;
-} __attribute__ ((packed));
-
-static inline int test_ch_en(void __iomem *dma, u32 ch_no)
-{
- u32 en_reg = ioread32(dma + DMA_CHAN_EN);
- return (en_reg >> ch_no) & 0x1;
-}
-
-static inline struct intel_mid_dma_desc *to_intel_mid_dma_desc
- (struct dma_async_tx_descriptor *txd)
-{
- return container_of(txd, struct intel_mid_dma_desc, txd);
-}
-
-static inline struct intel_mid_dma_slave *to_intel_mid_dma_slave
- (struct dma_slave_config *slave)
-{
- return container_of(slave, struct intel_mid_dma_slave, dma_slave);
-}
-
-
-int dma_resume(struct device *dev);
-
-#endif /*__INTEL_MID_DMAC_REGS_H__*/
if (!plat_data) {
if (np) {
- if(d40_of_probe(pdev, np)) {
+ if (d40_of_probe(pdev, np)) {
ret = -ENOMEM;
goto failure;
}
*/
static atomic_t drv_instances = ATOMIC_INIT(0);
-/* Per-node driver instances */
-static struct mem_ctl_info **mcis;
+/* Per-node stuff */
static struct ecc_settings **ecc_stngs;
/*
/* On F10h and later ErrAddr is MC4_ADDR[47:1] */
static u64 get_error_address(struct amd64_pvt *pvt, struct mce *m)
{
- u64 addr;
+ u16 mce_nid = amd_get_nb_id(m->extcpu);
+ struct mem_ctl_info *mci;
u8 start_bit = 1;
u8 end_bit = 47;
+ u64 addr;
+
+ mci = edac_mc_find(mce_nid);
+ if (!mci)
+ return 0;
+
+ pvt = mci->pvt_info;
if (pvt->fam == 0xf) {
start_bit = 3;
* Erratum 637 workaround
*/
if (pvt->fam == 0x15) {
- struct amd64_pvt *pvt;
u64 cc6_base, tmp_addr;
u32 tmp;
- u16 mce_nid;
u8 intlv_en;
if ((addr & GENMASK_ULL(47, 24)) >> 24 != 0x00fdf7)
return addr;
- mce_nid = amd_get_nb_id(m->extcpu);
- pvt = mcis[mce_nid]->pvt_info;
amd64_read_pci_cfg(pvt->F1, DRAM_LOCAL_NODE_LIM, &tmp);
intlv_en = tmp >> 21 & 0x7;
int cs_found = -EINVAL;
int csrow;
- mci = mcis[nid];
+ mci = edac_mc_find(nid);
if (!mci)
return cs_found;
return true;
}
-static int set_mc_sysfs_attrs(struct mem_ctl_info *mci)
-{
- struct amd64_pvt *pvt = mci->pvt_info;
- int rc;
-
- rc = amd64_create_sysfs_dbg_files(mci);
- if (rc < 0)
- return rc;
-
- if (pvt->fam >= 0x10) {
- rc = amd64_create_sysfs_inject_files(mci);
- if (rc < 0)
- return rc;
- }
-
- return 0;
-}
-
-static void del_mc_sysfs_attrs(struct mem_ctl_info *mci)
-{
- struct amd64_pvt *pvt = mci->pvt_info;
-
- amd64_remove_sysfs_dbg_files(mci);
-
- if (pvt->fam >= 0x10)
- amd64_remove_sysfs_inject_files(mci);
-}
-
static void setup_mci_misc_attrs(struct mem_ctl_info *mci,
struct amd64_family_type *fam)
{
return fam_type;
}
+static const struct attribute_group *amd64_edac_attr_groups[] = {
+#ifdef CONFIG_EDAC_DEBUG
+ &amd64_edac_dbg_group,
+#endif
+#ifdef CONFIG_EDAC_AMD64_ERROR_INJECTION
+ &amd64_edac_inj_group,
+#endif
+ NULL
+};
+
static int init_one_instance(struct pci_dev *F2)
{
struct amd64_pvt *pvt = NULL;
mci->edac_cap = EDAC_FLAG_NONE;
ret = -ENODEV;
- if (edac_mc_add_mc(mci)) {
+ if (edac_mc_add_mc_with_groups(mci, amd64_edac_attr_groups)) {
edac_dbg(1, "failed edac_mc_add_mc()\n");
goto err_add_mc;
}
- if (set_mc_sysfs_attrs(mci)) {
- edac_dbg(1, "failed edac_mc_add_mc()\n");
- goto err_add_sysfs;
- }
/* register stuff with EDAC MCE */
if (report_gart_errors)
amd_register_ecc_decoder(decode_bus_error);
- mcis[nid] = mci;
-
atomic_inc(&drv_instances);
return 0;
-err_add_sysfs:
- edac_mc_del_mc(mci->pdev);
err_add_mc:
edac_mc_free(mci);
mci = find_mci_by_dev(&pdev->dev);
WARN_ON(!mci);
- del_mc_sysfs_attrs(mci);
/* Remove from EDAC CORE tracking list */
mci = edac_mc_del_mc(&pdev->dev);
if (!mci)
/* Free the EDAC CORE resources */
mci->pvt_info = NULL;
- mcis[nid] = NULL;
kfree(pvt);
edac_mc_free(mci);
if (pci_ctl)
return;
- mci = mcis[0];
+ mci = edac_mc_find(0);
if (!mci)
return;
goto err_ret;
err = -ENOMEM;
- mcis = kzalloc(amd_nb_num() * sizeof(mcis[0]), GFP_KERNEL);
ecc_stngs = kzalloc(amd_nb_num() * sizeof(ecc_stngs[0]), GFP_KERNEL);
- if (!(mcis && ecc_stngs))
+ if (!ecc_stngs)
goto err_free;
msrs = msrs_alloc();
msrs = NULL;
err_free:
- kfree(mcis);
- mcis = NULL;
-
kfree(ecc_stngs);
ecc_stngs = NULL;
kfree(ecc_stngs);
ecc_stngs = NULL;
- kfree(mcis);
- mcis = NULL;
-
msrs_free(msrs);
msrs = NULL;
}
};
#ifdef CONFIG_EDAC_DEBUG
-int amd64_create_sysfs_dbg_files(struct mem_ctl_info *mci);
-void amd64_remove_sysfs_dbg_files(struct mem_ctl_info *mci);
-
-#else
-static inline int amd64_create_sysfs_dbg_files(struct mem_ctl_info *mci)
-{
- return 0;
-}
-static void inline amd64_remove_sysfs_dbg_files(struct mem_ctl_info *mci)
-{
-}
+extern const struct attribute_group amd64_edac_dbg_group;
#endif
#ifdef CONFIG_EDAC_AMD64_ERROR_INJECTION
-int amd64_create_sysfs_inject_files(struct mem_ctl_info *mci);
-void amd64_remove_sysfs_inject_files(struct mem_ctl_info *mci);
-
-#else
-static inline int amd64_create_sysfs_inject_files(struct mem_ctl_info *mci)
-{
- return 0;
-}
-static inline void amd64_remove_sysfs_inject_files(struct mem_ctl_info *mci)
-{
-}
+extern const struct attribute_group amd64_edac_inj_group;
#endif
/*
static DEVICE_ATTR(topmem2, S_IRUGO, amd64_top_mem2_show, NULL);
static DEVICE_ATTR(dram_hole, S_IRUGO, amd64_hole_show, NULL);
-int amd64_create_sysfs_dbg_files(struct mem_ctl_info *mci)
-{
- int rc;
-
- rc = device_create_file(&mci->dev, &dev_attr_dhar);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_dbam);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_topmem);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_topmem2);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_dram_hole);
- if (rc < 0)
- return rc;
-
- return 0;
-}
-
-void amd64_remove_sysfs_dbg_files(struct mem_ctl_info *mci)
-{
- device_remove_file(&mci->dev, &dev_attr_dhar);
- device_remove_file(&mci->dev, &dev_attr_dbam);
- device_remove_file(&mci->dev, &dev_attr_topmem);
- device_remove_file(&mci->dev, &dev_attr_topmem2);
- device_remove_file(&mci->dev, &dev_attr_dram_hole);
-}
+static struct attribute *amd64_edac_dbg_attrs[] = {
+ &dev_attr_dhar.attr,
+ &dev_attr_dbam.attr,
+ &dev_attr_topmem.attr,
+ &dev_attr_topmem2.attr,
+ &dev_attr_dram_hole.attr,
+ NULL
+};
+
+const struct attribute_group amd64_edac_dbg_group = {
+ .attrs = amd64_edac_dbg_attrs,
+};
static DEVICE_ATTR(inject_read, S_IWUSR,
NULL, amd64_inject_read_store);
-
-int amd64_create_sysfs_inject_files(struct mem_ctl_info *mci)
+static struct attribute *amd64_edac_inj_attrs[] = {
+ &dev_attr_inject_section.attr,
+ &dev_attr_inject_word.attr,
+ &dev_attr_inject_ecc_vector.attr,
+ &dev_attr_inject_write.attr,
+ &dev_attr_inject_read.attr,
+ NULL
+};
+
+static umode_t amd64_edac_inj_is_visible(struct kobject *kobj,
+ struct attribute *attr, int idx)
{
- int rc;
-
- rc = device_create_file(&mci->dev, &dev_attr_inject_section);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_inject_word);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_inject_ecc_vector);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_inject_write);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_inject_read);
- if (rc < 0)
- return rc;
-
- return 0;
-}
+ struct device *dev = kobj_to_dev(kobj);
+ struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev);
+ struct amd64_pvt *pvt = mci->pvt_info;
-void amd64_remove_sysfs_inject_files(struct mem_ctl_info *mci)
-{
- device_remove_file(&mci->dev, &dev_attr_inject_section);
- device_remove_file(&mci->dev, &dev_attr_inject_word);
- device_remove_file(&mci->dev, &dev_attr_inject_ecc_vector);
- device_remove_file(&mci->dev, &dev_attr_inject_write);
- device_remove_file(&mci->dev, &dev_attr_inject_read);
+ if (pvt->fam < 0x10)
+ return 0;
+ return attr->mode;
}
+
+const struct attribute_group amd64_edac_inj_group = {
+ .attrs = amd64_edac_inj_attrs,
+ .is_visible = amd64_edac_inj_is_visible,
+};
unsigned n_layers,
struct edac_mc_layer *layers,
unsigned sz_pvt);
-extern int edac_mc_add_mc(struct mem_ctl_info *mci);
+extern int edac_mc_add_mc_with_groups(struct mem_ctl_info *mci,
+ const struct attribute_group **groups);
+#define edac_mc_add_mc(mci) edac_mc_add_mc_with_groups(mci, NULL)
extern void edac_mc_free(struct mem_ctl_info *mci);
extern struct mem_ctl_info *edac_mc_find(int idx);
extern struct mem_ctl_info *find_mci_by_dev(struct device *dev);
EXPORT_SYMBOL(edac_mc_find);
/**
- * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and
- * create sysfs entries associated with mci structure
+ * edac_mc_add_mc_with_groups: Insert the 'mci' structure into the mci
+ * global list and create sysfs entries associated with mci structure
* @mci: pointer to the mci structure to be added to the list
+ * @groups: optional attribute groups for the driver-specific sysfs entries
*
* Return:
* 0 Success
*/
/* FIXME - should a warning be printed if no error detection? correction? */
-int edac_mc_add_mc(struct mem_ctl_info *mci)
+int edac_mc_add_mc_with_groups(struct mem_ctl_info *mci,
+ const struct attribute_group **groups)
{
int ret = -EINVAL;
edac_dbg(0, "\n");
mci->bus = &mc_bus[mci->mc_idx];
- if (edac_create_sysfs_mci_device(mci)) {
+ if (edac_create_sysfs_mci_device(mci, groups)) {
edac_mc_printk(mci, KERN_WARNING,
"failed to create sysfs device\n");
goto fail1;
mutex_unlock(&mem_ctls_mutex);
return ret;
}
-EXPORT_SYMBOL_GPL(edac_mc_add_mc);
+EXPORT_SYMBOL_GPL(edac_mc_add_mc_with_groups);
/**
* edac_mc_del_mc: Remove sysfs entries for specified mci structure and
channel_dimm_label_show, channel_dimm_label_store, 5);
/* Total possible dynamic DIMM Label attribute file table */
-static struct device_attribute *dynamic_csrow_dimm_attr[] = {
- &dev_attr_legacy_ch0_dimm_label.attr,
- &dev_attr_legacy_ch1_dimm_label.attr,
- &dev_attr_legacy_ch2_dimm_label.attr,
- &dev_attr_legacy_ch3_dimm_label.attr,
- &dev_attr_legacy_ch4_dimm_label.attr,
- &dev_attr_legacy_ch5_dimm_label.attr
+static struct attribute *dynamic_csrow_dimm_attr[] = {
+ &dev_attr_legacy_ch0_dimm_label.attr.attr,
+ &dev_attr_legacy_ch1_dimm_label.attr.attr,
+ &dev_attr_legacy_ch2_dimm_label.attr.attr,
+ &dev_attr_legacy_ch3_dimm_label.attr.attr,
+ &dev_attr_legacy_ch4_dimm_label.attr.attr,
+ &dev_attr_legacy_ch5_dimm_label.attr.attr,
+ NULL
};
/* possible dynamic channel ce_count attribute files */
channel_ce_count_show, NULL, 5);
/* Total possible dynamic ce_count attribute file table */
-static struct device_attribute *dynamic_csrow_ce_count_attr[] = {
- &dev_attr_legacy_ch0_ce_count.attr,
- &dev_attr_legacy_ch1_ce_count.attr,
- &dev_attr_legacy_ch2_ce_count.attr,
- &dev_attr_legacy_ch3_ce_count.attr,
- &dev_attr_legacy_ch4_ce_count.attr,
- &dev_attr_legacy_ch5_ce_count.attr
+static struct attribute *dynamic_csrow_ce_count_attr[] = {
+ &dev_attr_legacy_ch0_ce_count.attr.attr,
+ &dev_attr_legacy_ch1_ce_count.attr.attr,
+ &dev_attr_legacy_ch2_ce_count.attr.attr,
+ &dev_attr_legacy_ch3_ce_count.attr.attr,
+ &dev_attr_legacy_ch4_ce_count.attr.attr,
+ &dev_attr_legacy_ch5_ce_count.attr.attr,
+ NULL
+};
+
+static umode_t csrow_dev_is_visible(struct kobject *kobj,
+ struct attribute *attr, int idx)
+{
+ struct device *dev = kobj_to_dev(kobj);
+ struct csrow_info *csrow = container_of(dev, struct csrow_info, dev);
+
+ if (idx >= csrow->nr_channels)
+ return 0;
+ /* Only expose populated DIMMs */
+ if (!csrow->channels[idx]->dimm->nr_pages)
+ return 0;
+ return attr->mode;
+}
+
+
+static const struct attribute_group csrow_dev_dimm_group = {
+ .attrs = dynamic_csrow_dimm_attr,
+ .is_visible = csrow_dev_is_visible,
+};
+
+static const struct attribute_group csrow_dev_ce_count_group = {
+ .attrs = dynamic_csrow_ce_count_attr,
+ .is_visible = csrow_dev_is_visible,
+};
+
+static const struct attribute_group *csrow_dev_groups[] = {
+ &csrow_dev_dimm_group,
+ &csrow_dev_ce_count_group,
+ NULL
};
static inline int nr_pages_per_csrow(struct csrow_info *csrow)
static int edac_create_csrow_object(struct mem_ctl_info *mci,
struct csrow_info *csrow, int index)
{
- int err, chan;
-
if (csrow->nr_channels > EDAC_NR_CHANNELS)
return -ENODEV;
csrow->dev.type = &csrow_attr_type;
csrow->dev.bus = mci->bus;
+ csrow->dev.groups = csrow_dev_groups;
device_initialize(&csrow->dev);
csrow->dev.parent = &mci->dev;
csrow->mci = mci;
edac_dbg(0, "creating (virtual) csrow node %s\n",
dev_name(&csrow->dev));
- err = device_add(&csrow->dev);
- if (err < 0)
- return err;
-
- for (chan = 0; chan < csrow->nr_channels; chan++) {
- /* Only expose populated DIMMs */
- if (!csrow->channels[chan]->dimm->nr_pages)
- continue;
- err = device_create_file(&csrow->dev,
- dynamic_csrow_dimm_attr[chan]);
- if (err < 0)
- goto error;
- err = device_create_file(&csrow->dev,
- dynamic_csrow_ce_count_attr[chan]);
- if (err < 0) {
- device_remove_file(&csrow->dev,
- dynamic_csrow_dimm_attr[chan]);
- goto error;
- }
- }
-
- return 0;
-
-error:
- for (--chan; chan >= 0; chan--) {
- device_remove_file(&csrow->dev,
- dynamic_csrow_dimm_attr[chan]);
- device_remove_file(&csrow->dev,
- dynamic_csrow_ce_count_attr[chan]);
- }
- put_device(&csrow->dev);
-
- return err;
+ return device_add(&csrow->dev);
}
/* Create a CSROW object under specifed edac_mc_device */
static int edac_create_csrow_objects(struct mem_ctl_info *mci)
{
- int err, i, chan;
+ int err, i;
struct csrow_info *csrow;
for (i = 0; i < mci->nr_csrows; i++) {
csrow = mci->csrows[i];
if (!nr_pages_per_csrow(csrow))
continue;
- for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
- if (!csrow->channels[chan]->dimm->nr_pages)
- continue;
- device_remove_file(&csrow->dev,
- dynamic_csrow_dimm_attr[chan]);
- device_remove_file(&csrow->dev,
- dynamic_csrow_ce_count_attr[chan]);
- }
put_device(&mci->csrows[i]->dev);
}
static void edac_delete_csrow_objects(struct mem_ctl_info *mci)
{
- int i, chan;
+ int i;
struct csrow_info *csrow;
for (i = mci->nr_csrows - 1; i >= 0; i--) {
csrow = mci->csrows[i];
if (!nr_pages_per_csrow(csrow))
continue;
- for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
- if (!csrow->channels[chan]->dimm->nr_pages)
- continue;
- edac_dbg(1, "Removing csrow %d channel %d sysfs nodes\n",
- i, chan);
- device_remove_file(&csrow->dev,
- dynamic_csrow_dimm_attr[chan]);
- device_remove_file(&csrow->dev,
- dynamic_csrow_ce_count_attr[chan]);
- }
device_unregister(&mci->csrows[i]->dev);
}
}
static DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
/* memory scrubber attribute file */
-static DEVICE_ATTR(sdram_scrub_rate, 0, NULL, NULL);
+DEVICE_ATTR(sdram_scrub_rate, 0, mci_sdram_scrub_rate_show,
+ mci_sdram_scrub_rate_store); /* umode set later in is_visible */
static struct attribute *mci_attrs[] = {
&dev_attr_reset_counters.attr,
&dev_attr_ue_count.attr,
&dev_attr_ce_count.attr,
&dev_attr_max_location.attr,
+ &dev_attr_sdram_scrub_rate.attr,
NULL
};
+static umode_t mci_attr_is_visible(struct kobject *kobj,
+ struct attribute *attr, int idx)
+{
+ struct device *dev = kobj_to_dev(kobj);
+ struct mem_ctl_info *mci = to_mci(dev);
+ umode_t mode = 0;
+
+ if (attr != &dev_attr_sdram_scrub_rate.attr)
+ return attr->mode;
+ if (mci->get_sdram_scrub_rate)
+ mode |= S_IRUGO;
+ if (mci->set_sdram_scrub_rate)
+ mode |= S_IWUSR;
+ return mode;
+}
+
static struct attribute_group mci_attr_grp = {
.attrs = mci_attrs,
+ .is_visible = mci_attr_is_visible,
};
static const struct attribute_group *mci_attr_groups[] = {
return 0;
}
-void __exit edac_debugfs_exit(void)
+void edac_debugfs_exit(void)
{
debugfs_remove(edac_debugfs);
}
* 0 Success
* !0 Failure
*/
-int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
+int edac_create_sysfs_mci_device(struct mem_ctl_info *mci,
+ const struct attribute_group **groups)
{
int i, err;
mci->dev.parent = mci_pdev;
mci->dev.bus = mci->bus;
+ mci->dev.groups = groups;
dev_set_name(&mci->dev, "mc%d", mci->mc_idx);
dev_set_drvdata(&mci->dev, mci);
pm_runtime_forbid(&mci->dev);
goto fail_unregister_bus;
}
- if (mci->set_sdram_scrub_rate || mci->get_sdram_scrub_rate) {
- if (mci->get_sdram_scrub_rate) {
- dev_attr_sdram_scrub_rate.attr.mode |= S_IRUGO;
- dev_attr_sdram_scrub_rate.show = &mci_sdram_scrub_rate_show;
- }
-
- if (mci->set_sdram_scrub_rate) {
- dev_attr_sdram_scrub_rate.attr.mode |= S_IWUSR;
- dev_attr_sdram_scrub_rate.store = &mci_sdram_scrub_rate_store;
- }
-
- err = device_create_file(&mci->dev, &dev_attr_sdram_scrub_rate);
- if (err) {
- edac_dbg(1, "failure: create sdram_scrub_rate\n");
- goto fail_unregister_dev;
- }
- }
/*
* Create the dimm/rank devices
*/
device_unregister(&dimm->dev);
}
-fail_unregister_dev:
device_unregister(&mci->dev);
fail_unregister_bus:
bus_unregister(mci->bus);
return err;
}
-void __exit edac_mc_sysfs_exit(void)
+void edac_mc_sysfs_exit(void)
{
device_unregister(mci_pdev);
edac_put_sysfs_subsys();
err = edac_mc_sysfs_init();
if (err)
- goto error;
+ goto err_sysfs;
edac_debugfs_init();
- /* Setup/Initialize the workq for this core */
err = edac_workqueue_setup();
if (err) {
- edac_printk(KERN_ERR, EDAC_MC, "init WorkQueue failure\n");
- goto error;
+ edac_printk(KERN_ERR, EDAC_MC, "Failure initializing workqueue\n");
+ goto err_wq;
}
return 0;
-error:
+err_wq:
+ edac_debugfs_exit();
+ edac_mc_sysfs_exit();
+
+err_sysfs:
return err;
}
/* on edac_mc_sysfs.c */
int edac_mc_sysfs_init(void);
void edac_mc_sysfs_exit(void);
-extern int edac_create_sysfs_mci_device(struct mem_ctl_info *mci);
+extern int edac_create_sysfs_mci_device(struct mem_ctl_info *mci,
+ const struct attribute_group **groups);
extern void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci);
void edac_unregister_sysfs(struct mem_ctl_info *mci);
extern int edac_get_log_ue(void);
static DEVICE_ATTR(inject_ctrl, S_IWUSR, NULL, highbank_mc_inject_ctrl);
+static struct attribute *highbank_dev_attrs[] = {
+ &dev_attr_inject_ctrl.attr,
+ NULL
+};
+
+ATTRIBUTE_GROUPS(highbank_dev);
+
struct hb_mc_settings {
int err_offset;
int int_offset;
.int_offset = MW_DDR_ECC_INT_BASE,
};
-static struct of_device_id hb_ddr_ctrl_of_match[] = {
+static const struct of_device_id hb_ddr_ctrl_of_match[] = {
{ .compatible = "calxeda,hb-ddr-ctrl", .data = &hb_settings },
{ .compatible = "calxeda,ecx-2000-ddr-ctrl", .data = &mw_settings },
{},
dimm->mtype = MEM_DDR3;
dimm->edac_mode = EDAC_SECDED;
- res = edac_mc_add_mc(mci);
+ res = edac_mc_add_mc_with_groups(mci, highbank_dev_groups);
if (res < 0)
goto err;
goto err2;
}
- device_create_file(&mci->dev, &dev_attr_inject_ctrl);
-
devres_close_group(&pdev->dev, NULL);
return 0;
err2:
{
struct mem_ctl_info *mci = platform_get_drvdata(pdev);
- device_remove_file(&mci->dev, &dev_attr_inject_ctrl);
edac_mc_del_mc(&pdev->dev);
edac_mc_free(mci);
return 0;
static DEVICE_ATTR(inject_enable, S_IRUGO | S_IWUSR,
i7core_inject_enable_show, i7core_inject_enable_store);
+static struct attribute *i7core_dev_attrs[] = {
+ &dev_attr_inject_section.attr,
+ &dev_attr_inject_type.attr,
+ &dev_attr_inject_eccmask.attr,
+ &dev_attr_inject_enable.attr,
+ NULL
+};
+
+ATTRIBUTE_GROUPS(i7core_dev);
+
static int i7core_create_sysfs_devices(struct mem_ctl_info *mci)
{
struct i7core_pvt *pvt = mci->pvt_info;
int rc;
- rc = device_create_file(&mci->dev, &dev_attr_inject_section);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_inject_type);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_inject_eccmask);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_inject_enable);
- if (rc < 0)
- return rc;
-
pvt->addrmatch_dev = kzalloc(sizeof(*pvt->addrmatch_dev), GFP_KERNEL);
if (!pvt->addrmatch_dev)
- return rc;
+ return -ENOMEM;
pvt->addrmatch_dev->type = &addrmatch_type;
pvt->addrmatch_dev->bus = mci->dev.bus;
if (!pvt->chancounts_dev) {
put_device(pvt->addrmatch_dev);
device_del(pvt->addrmatch_dev);
- return rc;
+ return -ENOMEM;
}
pvt->chancounts_dev->type = &all_channel_counts_type;
edac_dbg(1, "\n");
- device_remove_file(&mci->dev, &dev_attr_inject_section);
- device_remove_file(&mci->dev, &dev_attr_inject_type);
- device_remove_file(&mci->dev, &dev_attr_inject_eccmask);
- device_remove_file(&mci->dev, &dev_attr_inject_enable);
-
if (!pvt->is_registered) {
put_device(pvt->chancounts_dev);
device_del(pvt->chancounts_dev);
enable_sdram_scrub_setting(mci);
/* add this new MC control structure to EDAC's list of MCs */
- if (unlikely(edac_mc_add_mc(mci))) {
+ if (unlikely(edac_mc_add_mc_with_groups(mci, i7core_dev_groups))) {
edac_dbg(0, "MC: failed edac_mc_add_mc()\n");
/* FIXME: perhaps some code should go here that disables error
* reporting if we just enabled it
return -ENODEV;
}
-EXPORT_SYMBOL_GPL(i82443bxgx_edacmc_probe1);
-
/* returns count (>= 0), or negative on error */
static int i82443bxgx_edacmc_init_one(struct pci_dev *pdev,
const struct pci_device_id *ent)
edac_mc_free(mci);
}
-EXPORT_SYMBOL_GPL(i82443bxgx_edacmc_remove_one);
-
static const struct pci_device_id i82443bxgx_pci_tbl[] = {
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_0)},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_2)},
pci_unregister_driver(&i82443bxgx_edacmc_driver);
fail0:
- if (mci_pdev != NULL)
- pci_dev_put(mci_pdev);
-
+ pci_dev_put(mci_pdev);
return pci_rc;
}
pci_unregister_driver(&i82860_driver);
fail0:
- if (mci_pdev != NULL)
- pci_dev_put(mci_pdev);
-
+ pci_dev_put(mci_pdev);
return pci_rc;
}
static void __exit i82860_exit(void)
{
edac_dbg(3, "\n");
-
pci_unregister_driver(&i82860_driver);
-
- if (mci_pdev != NULL)
- pci_dev_put(mci_pdev);
+ pci_dev_put(mci_pdev);
}
module_init(i82860_init);
pci_unregister_driver(&i82875p_driver);
fail0:
- if (mci_pdev != NULL)
- pci_dev_put(mci_pdev);
-
+ pci_dev_put(mci_pdev);
return pci_rc;
}
pci_unregister_driver(&i82975x_driver);
fail0:
- if (mci_pdev != NULL)
- pci_dev_put(mci_pdev);
-
+ pci_dev_put(mci_pdev);
return pci_rc;
}
DEVICE_ATTR(inject_ctrl, S_IRUGO | S_IWUSR,
mpc85xx_mc_inject_ctrl_show, mpc85xx_mc_inject_ctrl_store);
-static int mpc85xx_create_sysfs_attributes(struct mem_ctl_info *mci)
-{
- int rc;
-
- rc = device_create_file(&mci->dev, &dev_attr_inject_data_hi);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_inject_data_lo);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_inject_ctrl);
- if (rc < 0)
- return rc;
+static struct attribute *mpc85xx_dev_attrs[] = {
+ &dev_attr_inject_data_hi.attr,
+ &dev_attr_inject_data_lo.attr,
+ &dev_attr_inject_ctrl.attr,
+ NULL
+};
- return 0;
-}
-
-static void mpc85xx_remove_sysfs_attributes(struct mem_ctl_info *mci)
-{
- device_remove_file(&mci->dev, &dev_attr_inject_data_hi);
- device_remove_file(&mci->dev, &dev_attr_inject_data_lo);
- device_remove_file(&mci->dev, &dev_attr_inject_ctrl);
-}
+ATTRIBUTE_GROUPS(mpc85xx_dev);
/**************************** PCI Err device ***************************/
#ifdef CONFIG_PCI
return 0;
}
-static struct of_device_id mpc85xx_l2_err_of_match[] = {
+static const struct of_device_id mpc85xx_l2_err_of_match[] = {
/* deprecate the fsl,85.. forms in the future, 2.6.30? */
{ .compatible = "fsl,8540-l2-cache-controller", },
{ .compatible = "fsl,8541-l2-cache-controller", },
/* clear all error bits */
out_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DETECT, ~0);
- if (edac_mc_add_mc(mci)) {
- edac_dbg(3, "failed edac_mc_add_mc()\n");
- goto err;
- }
-
- if (mpc85xx_create_sysfs_attributes(mci)) {
- edac_mc_del_mc(mci->pdev);
+ if (edac_mc_add_mc_with_groups(mci, mpc85xx_dev_groups)) {
edac_dbg(3, "failed edac_mc_add_mc()\n");
goto err;
}
orig_ddr_err_disable);
out_be32(pdata->mc_vbase + MPC85XX_MC_ERR_SBE, orig_ddr_err_sbe);
- mpc85xx_remove_sysfs_attributes(mci);
edac_mc_del_mc(&op->dev);
edac_mc_free(mci);
return 0;
}
-static struct of_device_id mpc85xx_mc_err_of_match[] = {
+static const struct of_device_id mpc85xx_mc_err_of_match[] = {
/* deprecate the fsl,85.. forms in the future, 2.6.30? */
{ .compatible = "fsl,8540-memory-controller", },
{ .compatible = "fsl,8541-memory-controller", },
static DEVICE_ATTR(col, S_IRUGO | S_IWUSR,
octeon_mc_inject_col_show, octeon_mc_inject_col_store);
+static struct attribute *octeon_dev_attrs[] = {
+ &dev_attr_inject.attr,
+ &dev_attr_error_type.attr,
+ &dev_attr_dimm.attr,
+ &dev_attr_rank.attr,
+ &dev_attr_bank.attr,
+ &dev_attr_row.attr,
+ &dev_attr_col.attr,
+ NULL
+};
-static int octeon_set_mc_sysfs_attributes(struct mem_ctl_info *mci)
-{
- int rc;
-
- rc = device_create_file(&mci->dev, &dev_attr_inject);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_error_type);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_dimm);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_rank);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_bank);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_row);
- if (rc < 0)
- return rc;
- rc = device_create_file(&mci->dev, &dev_attr_col);
- if (rc < 0)
- return rc;
-
- return 0;
-}
+ATTRIBUTE_GROUPS(octeon_dev);
static int octeon_lmc_edac_probe(struct platform_device *pdev)
{
mci->ctl_name = "octeon-lmc-err";
mci->edac_check = octeon_lmc_edac_poll;
- if (edac_mc_add_mc(mci)) {
+ if (edac_mc_add_mc_with_groups(mci, octeon_dev_groups)) {
dev_err(&pdev->dev, "edac_mc_add_mc() failed\n");
edac_mc_free(mci);
return -ENXIO;
}
- if (octeon_set_mc_sysfs_attributes(mci)) {
- dev_err(&pdev->dev, "octeon_set_mc_sysfs_attributes() failed\n");
- return -ENXIO;
- }
-
-
cfg0.u64 = cvmx_read_csr(CVMX_LMCX_MEM_CFG0(mc));
cfg0.s.intr_ded_ena = 0; /* We poll */
cfg0.s.intr_sec_ena = 0;
mci->ctl_name = "co_lmc_err";
mci->edac_check = octeon_lmc_edac_poll_o2;
- if (edac_mc_add_mc(mci)) {
+ if (edac_mc_add_mc_with_groups(mci, octeon_dev_groups)) {
dev_err(&pdev->dev, "edac_mc_add_mc() failed\n");
edac_mc_free(mci);
return -ENXIO;
}
- if (octeon_set_mc_sysfs_attributes(mci)) {
- dev_err(&pdev->dev, "octeon_set_mc_sysfs_attributes() failed\n");
- return -ENXIO;
- }
-
-
en.u64 = cvmx_read_csr(CVMX_LMCX_MEM_CFG0(mc));
en.s.intr_ded_ena = 0; /* We poll */
en.s.intr_sec_ena = 0;
* Device tree node type and compatible tuples this driver can match
* on.
*/
-static struct of_device_id ppc4xx_edac_match[] = {
+static const struct of_device_id ppc4xx_edac_match[] = {
{
.compatible = "ibm,sdram-4xx-ddr2"
},
return 0;
}
-static struct of_device_id synps_edac_match[] = {
+static const struct of_device_id synps_edac_match[] = {
{ .compatible = "xlnx,zynq-ddrc-a05", },
{ /* end of table */ }
};
}
break;
case WM5110:
+ case WM8280:
switch (arizona->rev) {
case 0 ... 2:
break;
*/
static const char dmi_empty_string[] = " ";
-static u16 __initdata dmi_ver;
+static u32 dmi_ver __initdata;
+static u32 dmi_len;
+static u16 dmi_num;
/*
* Catch too early calls to dmi_check_system():
*/
* We have to be cautious here. We have seen BIOSes with DMI pointers
* pointing to completely the wrong place for example
*/
-static void dmi_table(u8 *buf, u32 len, int num,
+static void dmi_table(u8 *buf,
void (*decode)(const struct dmi_header *, void *),
void *private_data)
{
* off the end of the table (should never happen but sometimes does
* on bogus implementations.)
*/
- while ((!num || i < num) &&
- (data - buf + sizeof(struct dmi_header)) <= len) {
+ while ((!dmi_num || i < dmi_num) &&
+ (data - buf + sizeof(struct dmi_header)) <= dmi_len) {
const struct dmi_header *dm = (const struct dmi_header *)data;
/*
* table in dmi_decode or dmi_string
*/
data += dm->length;
- while ((data - buf < len - 1) && (data[0] || data[1]))
+ while ((data - buf < dmi_len - 1) && (data[0] || data[1]))
data++;
- if (data - buf < len - 1)
+ if (data - buf < dmi_len - 1)
decode(dm, private_data);
/*
}
static phys_addr_t dmi_base;
-static u32 dmi_len;
-static u16 dmi_num;
static int __init dmi_walk_early(void (*decode)(const struct dmi_header *,
void *))
if (buf == NULL)
return -1;
- dmi_table(buf, dmi_len, dmi_num, decode, NULL);
+ dmi_table(buf, decode, NULL);
add_device_randomness(buf, dmi_len);
* the UUID are supposed to be little-endian encoded. The specification
* says that this is the defacto standard.
*/
- if (dmi_ver >= 0x0206)
+ if (dmi_ver >= 0x020600)
sprintf(s, "%pUL", d);
else
sprintf(s, "%pUB", d);
*/
static int __init dmi_present(const u8 *buf)
{
- int smbios_ver;
+ u32 smbios_ver;
if (memcmp(buf, "_SM_", 4) == 0 &&
buf[5] < 32 && dmi_checksum(buf, buf[5])) {
if (dmi_walk_early(dmi_decode) == 0) {
if (smbios_ver) {
dmi_ver = smbios_ver;
- pr_info("SMBIOS %d.%d present.\n",
- dmi_ver >> 8, dmi_ver & 0xFF);
+ pr_info("SMBIOS %d.%d%s present.\n",
+ dmi_ver >> 8, dmi_ver & 0xFF,
+ (dmi_ver < 0x0300) ? "" : ".x");
} else {
dmi_ver = (buf[14] & 0xF0) << 4 |
(buf[14] & 0x0F);
pr_info("Legacy DMI %d.%d present.\n",
dmi_ver >> 8, dmi_ver & 0xFF);
}
+ dmi_ver <<= 8;
dmi_format_ids(dmi_ids_string, sizeof(dmi_ids_string));
printk(KERN_DEBUG "DMI: %s\n", dmi_ids_string);
return 0;
{
if (memcmp(buf, "_SM3_", 5) == 0 &&
buf[6] < 32 && dmi_checksum(buf, buf[6])) {
- dmi_ver = get_unaligned_be16(buf + 7);
+ dmi_ver = get_unaligned_be32(buf + 6);
+ dmi_ver &= 0xFFFFFF;
dmi_num = 0; /* No longer specified */
dmi_len = get_unaligned_le32(buf + 12);
dmi_base = get_unaligned_le64(buf + 16);
if (dmi_walk_early(dmi_decode) == 0) {
- pr_info("SMBIOS %d.%d present.\n",
- dmi_ver >> 8, dmi_ver & 0xFF);
+ pr_info("SMBIOS %d.%d.%d present.\n",
+ dmi_ver >> 16, (dmi_ver >> 8) & 0xFF,
+ dmi_ver & 0xFF);
dmi_format_ids(dmi_ids_string, sizeof(dmi_ids_string));
pr_debug("DMI: %s\n", dmi_ids_string);
return 0;
if (buf == NULL)
return -1;
- dmi_table(buf, dmi_len, dmi_num, decode, private_data);
+ dmi_table(buf, decode, private_data);
dmi_unmap(buf);
return 0;
unsigned long initrd_addr;
u64 initrd_size = 0;
unsigned long fdt_addr = 0; /* Original DTB */
- u64 fdt_size = 0; /* We don't get size from configuration table */
+ unsigned long fdt_size = 0;
char *cmdline_ptr = NULL;
int cmdline_size = 0;
unsigned long new_fdt_addr;
} else {
status = handle_cmdline_files(sys_table, image, cmdline_ptr,
"dtb=",
- ~0UL, (unsigned long *)&fdt_addr,
- (unsigned long *)&fdt_size);
+ ~0UL, &fdt_addr, &fdt_size);
if (status != EFI_SUCCESS) {
pr_efi_err(sys_table, "Failed to load device tree!\n");
pr_efi(sys_table, "Using DTB from command line\n");
} else {
/* Look for a device tree configuration table entry. */
- fdt_addr = (uintptr_t)get_fdt(sys_table);
+ fdt_addr = (uintptr_t)get_fdt(sys_table, &fdt_size);
if (fdt_addr)
pr_efi(sys_table, "Using DTB from configuration table\n");
}
unsigned long fdt_addr,
unsigned long fdt_size);
-void *get_fdt(efi_system_table_t *sys_table);
+void *get_fdt(efi_system_table_t *sys_table, unsigned long *fdt_size);
void efi_get_virtmap(efi_memory_desc_t *memory_map, unsigned long map_size,
unsigned long desc_size, efi_memory_desc_t *runtime_map,
return EFI_LOAD_ERROR;
}
-void *get_fdt(efi_system_table_t *sys_table)
+void *get_fdt(efi_system_table_t *sys_table, unsigned long *fdt_size)
{
efi_guid_t fdt_guid = DEVICE_TREE_GUID;
efi_config_table_t *tables;
for (i = 0; i < sys_table->nr_tables; i++)
if (efi_guidcmp(tables[i].guid, fdt_guid) == 0) {
fdt = (void *) tables[i].table;
+ if (fdt_check_header(fdt) != 0) {
+ pr_efi_err(sys_table, "Invalid header detected on UEFI supplied FDT, ignoring ...\n");
+ return NULL;
+ }
+ *fdt_size = fdt_totalsize(fdt);
break;
}
switch (arizona->type) {
case WM5102:
case WM5110:
+ case WM8280:
case WM8997:
arizona_gpio->gpio_chip.ngpio = 5;
break;
connector = drm_connector_find(dev, out_resp->connector_id);
if (!connector) {
ret = -ENOENT;
- goto out;
+ goto out_unlock;
}
for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++)
out:
drm_modeset_unlock(&dev->mode_config.connection_mutex);
+
+out_unlock:
mutex_unlock(&dev->mode_config.mutex);
return ret;
#undef TRACE_SYSTEM
#define TRACE_SYSTEM drm
-#define TRACE_SYSTEM_STRING __stringify(TRACE_SYSTEM)
#define TRACE_INCLUDE_FILE drm_trace
TRACE_EVENT(drm_vblank_event,
/* Gunit-Display CZ domain, 0x182028-0x1821CF */
s->gu_ctl0 = I915_READ(VLV_GU_CTL0);
s->gu_ctl1 = I915_READ(VLV_GU_CTL1);
+ s->pcbr = I915_READ(VLV_PCBR);
s->clock_gate_dis2 = I915_READ(VLV_GUNIT_CLOCK_GATE2);
/*
/* Gunit-Display CZ domain, 0x182028-0x1821CF */
I915_WRITE(VLV_GU_CTL0, s->gu_ctl0);
I915_WRITE(VLV_GU_CTL1, s->gu_ctl1);
+ I915_WRITE(VLV_PCBR, s->pcbr);
I915_WRITE(VLV_GUNIT_CLOCK_GATE2, s->clock_gate_dis2);
}
u32 val;
int err;
- val = I915_READ(VLV_GTLC_SURVIVABILITY_REG);
- WARN_ON(!!(val & VLV_GFX_CLK_FORCE_ON_BIT) == force_on);
-
#define COND (I915_READ(VLV_GTLC_SURVIVABILITY_REG) & VLV_GFX_CLK_STATUS_BIT)
- /* Wait for a previous force-off to settle */
- if (force_on) {
- err = wait_for(!COND, 20);
- if (err) {
- DRM_ERROR("timeout waiting for GFX clock force-off (%08x)\n",
- I915_READ(VLV_GTLC_SURVIVABILITY_REG));
- return err;
- }
- }
val = I915_READ(VLV_GTLC_SURVIVABILITY_REG);
val &= ~VLV_GFX_CLK_FORCE_ON_BIT;
/* Display 2 CZ domain */
u32 gu_ctl0;
u32 gu_ctl1;
+ u32 pcbr;
u32 clock_gate_dis2;
};
#undef TRACE_SYSTEM
#define TRACE_SYSTEM i915
-#define TRACE_SYSTEM_STRING __stringify(TRACE_SYSTEM)
#define TRACE_INCLUDE_FILE i915_trace
/* pipe updates */
goto vdda_set_fail;
}
- ret = regulator_set_optimum_mode(ctrl->vdda_vreg, VDDA_UA_ON_LOAD);
+ ret = regulator_set_load(ctrl->vdda_vreg, VDDA_UA_ON_LOAD);
if (ret < 0) {
pr_err("%s: vdda_vreg set regulator mode failed.\n", __func__);
goto vdda_set_fail;
lvl_enable_fail:
regulator_disable(ctrl->vdda_vreg);
vdda_enable_fail:
- regulator_set_optimum_mode(ctrl->vdda_vreg, VDDA_UA_OFF_LOAD);
+ regulator_set_load(ctrl->vdda_vreg, VDDA_UA_OFF_LOAD);
vdda_set_fail:
return ret;
}
{
regulator_disable(ctrl->lvl_vreg);
regulator_disable(ctrl->vdda_vreg);
- regulator_set_optimum_mode(ctrl->vdda_vreg, VDDA_UA_OFF_LOAD);
+ regulator_set_load(ctrl->vdda_vreg, VDDA_UA_OFF_LOAD);
}
static int edp_gpio_config(struct edp_ctrl *ctrl)
#undef TRACE_SYSTEM
#define TRACE_SYSTEM radeon
-#define TRACE_SYSTEM_STRING __stringify(TRACE_SYSTEM)
#define TRACE_INCLUDE_FILE radeon_trace
TRACE_EVENT(radeon_bo_create,
depends on HID
config HID_A4TECH
- tristate "A4 tech mice" if EXPERT
+ tristate "A4 tech mice"
depends on HID
default !EXPERT
---help---
game controllers.
config HID_APPLE
- tristate "Apple {i,Power,Mac}Books" if EXPERT
+ tristate "Apple {i,Power,Mac}Books"
depends on HID
default !EXPERT
---help---
Support for Aureal Cy se W-01RN Remote Controller and other Aureal derived remotes.
config HID_BELKIN
- tristate "Belkin Flip KVM and Wireless keyboard" if EXPERT
+ tristate "Belkin Flip KVM and Wireless keyboard"
depends on HID
default !EXPERT
---help---
- BETOP 2185 PC & BFM MODE
config HID_CHERRY
- tristate "Cherry Cymotion keyboard" if EXPERT
+ tristate "Cherry Cymotion keyboard"
depends on HID
default !EXPERT
---help---
Support for Cherry Cymotion keyboard.
config HID_CHICONY
- tristate "Chicony Tactical pad" if EXPERT
+ tristate "Chicony Tactical pad"
depends on HID
default !EXPERT
---help---
customizable USB descriptor fields are exposed as sysfs attributes.
config HID_CYPRESS
- tristate "Cypress mouse and barcode readers" if EXPERT
+ tristate "Cypress mouse and barcode readers"
depends on HID
default !EXPERT
---help---
different devices than those handled by CONFIG_TOUCHSCREEN_USB_ELO.
config HID_EZKEY
- tristate "Ezkey BTC 8193 keyboard" if EXPERT
+ tristate "Ezkey BTC 8193 keyboard"
depends on HID
default !EXPERT
---help---
Currently the following devices are know to be supported:
- MSI GT683R
-config HID_HUION
- tristate "Huion tablets"
- depends on USB_HID
- ---help---
- Support for Huion 580 tablet.
-
config HID_KEYTOUCH
tristate "Keytouch HID devices"
depends on HID
config HID_UCLOGIC
tristate "UC-Logic"
- depends on HID
+ depends on USB_HID
---help---
- Support for UC-Logic tablets.
+ Support for UC-Logic and Huion tablets.
config HID_WALTOP
tristate "Waltop"
Support for Twinhan IR remote control.
config HID_KENSINGTON
- tristate "Kensington Slimblade Trackball" if EXPERT
+ tristate "Kensington Slimblade Trackball"
depends on HID
default !EXPERT
---help---
- ThinkPad Compact USB Keyboard with TrackPoint (supports Fn keys)
config HID_LOGITECH
- tristate "Logitech devices" if EXPERT
+ tristate "Logitech devices"
depends on HID
default !EXPERT
---help---
Apple Wireless "Magic" Mouse and the Apple Wireless "Magic" Trackpad.
config HID_MICROSOFT
- tristate "Microsoft non-fully HID-compliant devices" if EXPERT
+ tristate "Microsoft non-fully HID-compliant devices"
depends on HID
default !EXPERT
---help---
Support for Microsoft devices that are not fully compliant with HID standard.
config HID_MONTEREY
- tristate "Monterey Genius KB29E keyboard" if EXPERT
+ tristate "Monterey Genius KB29E keyboard"
depends on HID
default !EXPERT
---help---
config HID_PLANTRONICS
tristate "Plantronics USB HID Driver"
- default !EXPERT
depends on HID
---help---
Provides HID support for Plantronics telephony devices.
for events and handle data streams. Each sensor driver can format
data and present to user mode using input or IIO interface.
+config HID_SENSOR_CUSTOM_SENSOR
+ tristate "HID Sensors hub custom sensor support"
+ depends on HID_SENSOR_HUB
+ default n
+ ---help---
+ HID Sensor hub specification allows definition of some custom and
+ generic sensors. Unlike other HID sensors, they can't be exported
+ via Linux IIO because of custom fields. This is up to the manufacturer
+ to decide how to interpret these special sensor ids and process in
+ the user space. Currently some manufacturers are using these ids for
+ sensor calibration and debugging other sensors. Manufacturers
+ should't use these special custom sensor ids to export any of the
+ standard sensors.
+ Select this config option for custom/generic sensor support.
+
endmenu
endif # HID
obj-$(CONFIG_HID_HOLTEK) += hid-holtek-kbd.o
obj-$(CONFIG_HID_HOLTEK) += hid-holtek-mouse.o
obj-$(CONFIG_HID_HOLTEK) += hid-holtekff.o
-obj-$(CONFIG_HID_HUION) += hid-huion.o
obj-$(CONFIG_HID_HYPERV_MOUSE) += hid-hyperv.o
obj-$(CONFIG_HID_ICADE) += hid-icade.o
obj-$(CONFIG_HID_KENSINGTON) += hid-kensington.o
obj-$(CONFIG_HID_WALTOP) += hid-waltop.o
obj-$(CONFIG_HID_WIIMOTE) += hid-wiimote.o
obj-$(CONFIG_HID_SENSOR_HUB) += hid-sensor-hub.o
+obj-$(CONFIG_HID_SENSOR_CUSTOM_SENSOR) += hid-sensor-custom.o
obj-$(CONFIG_USB_HID) += usbhid/
obj-$(CONFIG_USB_MOUSE) += usbhid/
return count;
}
+static ssize_t
+show_country(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ struct hid_device *hdev = container_of(dev, struct hid_device, dev);
+
+ return sprintf(buf, "%02x\n", hdev->country & 0xff);
+}
+
static struct bin_attribute dev_bin_attr_report_desc = {
.attr = { .name = "report_descriptor", .mode = 0444 },
.read = read_report_descriptor,
.size = HID_MAX_DESCRIPTOR_SIZE,
};
+static struct device_attribute dev_attr_country = {
+ .attr = { .name = "country", .mode = 0444 },
+ .show = show_country,
+};
+
int hid_connect(struct hid_device *hdev, unsigned int connect_mask)
{
static const char *types[] = { "Device", "Pointer", "Mouse", "Device",
bus = "<UNKNOWN>";
}
+ ret = device_create_file(&hdev->dev, &dev_attr_country);
+ if (ret)
+ hid_warn(hdev,
+ "can't create sysfs country code attribute err: %d\n", ret);
+
ret = device_create_bin_file(&hdev->dev, &dev_bin_attr_report_desc);
if (ret)
hid_warn(hdev,
void hid_disconnect(struct hid_device *hdev)
{
+ device_remove_file(&hdev->dev, &dev_attr_country);
device_remove_bin_file(&hdev->dev, &dev_bin_attr_report_desc);
if (hdev->claimed & HID_CLAIMED_INPUT)
hidinput_disconnect(hdev);
{ HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_MOUSEPEN_I608X) },
{ HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_MOUSEPEN_I608X_2) },
{ HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_EASYPEN_M610X) },
+ { HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_PENSKETCH_M912) },
{ HID_USB_DEVICE(USB_VENDOR_ID_LABTEC, USB_DEVICE_ID_LABTEC_WIRELESS_KEYBOARD) },
{ HID_USB_DEVICE(USB_VENDOR_ID_LCPOWER, USB_DEVICE_ID_LCPOWER_LC1000 ) },
#if IS_ENABLED(CONFIG_HID_LENOVO)
{0, 0x53, "DeviceIndex"},
{0, 0x54, "ContactCount"},
{0, 0x55, "ContactMaximumNumber"},
+ {0, 0x59, "ButtonType"},
{0, 0x5A, "SecondaryBarrelSwitch"},
{0, 0x5B, "TransducerSerialNumber"},
{ 15, 0, "PhysicalInterfaceDevice" },
if (!list->hdev || !list->hdev->debug) {
ret = -EIO;
- break;
+ set_current_state(TASK_RUNNING);
+ goto out;
}
/* allow O_NONBLOCK from other threads */
+++ /dev/null
-/*
- * HID driver for Huion devices not fully compliant with HID standard
- *
- * Copyright (c) 2013 Martin Rusko
- * Copyright (c) 2014 Nikolai Kondrashov
- */
-
-/*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- */
-
-#include <linux/device.h>
-#include <linux/hid.h>
-#include <linux/module.h>
-#include <linux/usb.h>
-#include <asm/unaligned.h>
-#include "usbhid/usbhid.h"
-
-#include "hid-ids.h"
-
-/* Report descriptor template placeholder head */
-#define HUION_PH_HEAD 0xFE, 0xED, 0x1D
-
-/* Report descriptor template placeholder IDs */
-enum huion_ph_id {
- HUION_PH_ID_X_LM,
- HUION_PH_ID_X_PM,
- HUION_PH_ID_Y_LM,
- HUION_PH_ID_Y_PM,
- HUION_PH_ID_PRESSURE_LM,
- HUION_PH_ID_NUM
-};
-
-/* Report descriptor template placeholder */
-#define HUION_PH(_ID) HUION_PH_HEAD, HUION_PH_ID_##_ID
-
-/* Fixed report descriptor template */
-static const __u8 huion_tablet_rdesc_template[] = {
- 0x05, 0x0D, /* Usage Page (Digitizer), */
- 0x09, 0x02, /* Usage (Pen), */
- 0xA1, 0x01, /* Collection (Application), */
- 0x85, 0x07, /* Report ID (7), */
- 0x09, 0x20, /* Usage (Stylus), */
- 0xA0, /* Collection (Physical), */
- 0x14, /* Logical Minimum (0), */
- 0x25, 0x01, /* Logical Maximum (1), */
- 0x75, 0x01, /* Report Size (1), */
- 0x09, 0x42, /* Usage (Tip Switch), */
- 0x09, 0x44, /* Usage (Barrel Switch), */
- 0x09, 0x46, /* Usage (Tablet Pick), */
- 0x95, 0x03, /* Report Count (3), */
- 0x81, 0x02, /* Input (Variable), */
- 0x95, 0x03, /* Report Count (3), */
- 0x81, 0x03, /* Input (Constant, Variable), */
- 0x09, 0x32, /* Usage (In Range), */
- 0x95, 0x01, /* Report Count (1), */
- 0x81, 0x02, /* Input (Variable), */
- 0x95, 0x01, /* Report Count (1), */
- 0x81, 0x03, /* Input (Constant, Variable), */
- 0x75, 0x10, /* Report Size (16), */
- 0x95, 0x01, /* Report Count (1), */
- 0xA4, /* Push, */
- 0x05, 0x01, /* Usage Page (Desktop), */
- 0x65, 0x13, /* Unit (Inch), */
- 0x55, 0xFD, /* Unit Exponent (-3), */
- 0x34, /* Physical Minimum (0), */
- 0x09, 0x30, /* Usage (X), */
- 0x27, HUION_PH(X_LM), /* Logical Maximum (PLACEHOLDER), */
- 0x47, HUION_PH(X_PM), /* Physical Maximum (PLACEHOLDER), */
- 0x81, 0x02, /* Input (Variable), */
- 0x09, 0x31, /* Usage (Y), */
- 0x27, HUION_PH(Y_LM), /* Logical Maximum (PLACEHOLDER), */
- 0x47, HUION_PH(Y_PM), /* Physical Maximum (PLACEHOLDER), */
- 0x81, 0x02, /* Input (Variable), */
- 0xB4, /* Pop, */
- 0x09, 0x30, /* Usage (Tip Pressure), */
- 0x27,
- HUION_PH(PRESSURE_LM), /* Logical Maximum (PLACEHOLDER), */
- 0x81, 0x02, /* Input (Variable), */
- 0xC0, /* End Collection, */
- 0xC0 /* End Collection */
-};
-
-/* Parameter indices */
-enum huion_prm {
- HUION_PRM_X_LM = 1,
- HUION_PRM_Y_LM = 2,
- HUION_PRM_PRESSURE_LM = 4,
- HUION_PRM_RESOLUTION = 5,
- HUION_PRM_NUM
-};
-
-/* Driver data */
-struct huion_drvdata {
- __u8 *rdesc;
- unsigned int rsize;
-};
-
-static __u8 *huion_report_fixup(struct hid_device *hdev, __u8 *rdesc,
- unsigned int *rsize)
-{
- struct huion_drvdata *drvdata = hid_get_drvdata(hdev);
- switch (hdev->product) {
- case USB_DEVICE_ID_HUION_TABLET:
- if (drvdata->rdesc != NULL) {
- rdesc = drvdata->rdesc;
- *rsize = drvdata->rsize;
- }
- break;
- }
- return rdesc;
-}
-
-/**
- * Enable fully-functional tablet mode and determine device parameters.
- *
- * @hdev: HID device
- */
-static int huion_tablet_enable(struct hid_device *hdev)
-{
- int rc;
- struct usb_device *usb_dev = hid_to_usb_dev(hdev);
- struct huion_drvdata *drvdata = hid_get_drvdata(hdev);
- __le16 *buf = NULL;
- size_t len;
- s32 params[HUION_PH_ID_NUM];
- s32 resolution;
- __u8 *p;
- s32 v;
-
- /*
- * Read string descriptor containing tablet parameters. The specific
- * string descriptor and data were discovered by sniffing the Windows
- * driver traffic.
- * NOTE: This enables fully-functional tablet mode.
- */
- len = HUION_PRM_NUM * sizeof(*buf);
- buf = kmalloc(len, GFP_KERNEL);
- if (buf == NULL) {
- hid_err(hdev, "failed to allocate parameter buffer\n");
- rc = -ENOMEM;
- goto cleanup;
- }
- rc = usb_control_msg(usb_dev, usb_rcvctrlpipe(usb_dev, 0),
- USB_REQ_GET_DESCRIPTOR, USB_DIR_IN,
- (USB_DT_STRING << 8) + 0x64,
- 0x0409, buf, len,
- USB_CTRL_GET_TIMEOUT);
- if (rc == -EPIPE) {
- hid_err(hdev, "device parameters not found\n");
- rc = -ENODEV;
- goto cleanup;
- } else if (rc < 0) {
- hid_err(hdev, "failed to get device parameters: %d\n", rc);
- rc = -ENODEV;
- goto cleanup;
- } else if (rc != len) {
- hid_err(hdev, "invalid device parameters\n");
- rc = -ENODEV;
- goto cleanup;
- }
-
- /* Extract device parameters */
- params[HUION_PH_ID_X_LM] = le16_to_cpu(buf[HUION_PRM_X_LM]);
- params[HUION_PH_ID_Y_LM] = le16_to_cpu(buf[HUION_PRM_Y_LM]);
- params[HUION_PH_ID_PRESSURE_LM] =
- le16_to_cpu(buf[HUION_PRM_PRESSURE_LM]);
- resolution = le16_to_cpu(buf[HUION_PRM_RESOLUTION]);
- if (resolution == 0) {
- params[HUION_PH_ID_X_PM] = 0;
- params[HUION_PH_ID_Y_PM] = 0;
- } else {
- params[HUION_PH_ID_X_PM] = params[HUION_PH_ID_X_LM] *
- 1000 / resolution;
- params[HUION_PH_ID_Y_PM] = params[HUION_PH_ID_Y_LM] *
- 1000 / resolution;
- }
-
- /* Allocate fixed report descriptor */
- drvdata->rdesc = devm_kmalloc(&hdev->dev,
- sizeof(huion_tablet_rdesc_template),
- GFP_KERNEL);
- if (drvdata->rdesc == NULL) {
- hid_err(hdev, "failed to allocate fixed rdesc\n");
- rc = -ENOMEM;
- goto cleanup;
- }
- drvdata->rsize = sizeof(huion_tablet_rdesc_template);
-
- /* Format fixed report descriptor */
- memcpy(drvdata->rdesc, huion_tablet_rdesc_template,
- drvdata->rsize);
- for (p = drvdata->rdesc;
- p <= drvdata->rdesc + drvdata->rsize - 4;) {
- if (p[0] == 0xFE && p[1] == 0xED && p[2] == 0x1D &&
- p[3] < sizeof(params)) {
- v = params[p[3]];
- put_unaligned(cpu_to_le32(v), (s32 *)p);
- p += 4;
- } else {
- p++;
- }
- }
-
- rc = 0;
-
-cleanup:
- kfree(buf);
- return rc;
-}
-
-static int huion_probe(struct hid_device *hdev, const struct hid_device_id *id)
-{
- int rc;
- struct usb_interface *intf = to_usb_interface(hdev->dev.parent);
- struct huion_drvdata *drvdata;
-
- /* Allocate and assign driver data */
- drvdata = devm_kzalloc(&hdev->dev, sizeof(*drvdata), GFP_KERNEL);
- if (drvdata == NULL) {
- hid_err(hdev, "failed to allocate driver data\n");
- return -ENOMEM;
- }
- hid_set_drvdata(hdev, drvdata);
-
- switch (id->product) {
- case USB_DEVICE_ID_HUION_TABLET:
- /* If this is the pen interface */
- if (intf->cur_altsetting->desc.bInterfaceNumber == 0) {
- rc = huion_tablet_enable(hdev);
- if (rc) {
- hid_err(hdev, "tablet enabling failed\n");
- return rc;
- }
- }
- break;
- }
-
- rc = hid_parse(hdev);
- if (rc) {
- hid_err(hdev, "parse failed\n");
- return rc;
- }
-
- rc = hid_hw_start(hdev, HID_CONNECT_DEFAULT);
- if (rc) {
- hid_err(hdev, "hw start failed\n");
- return rc;
- }
-
- return 0;
-}
-
-static int huion_raw_event(struct hid_device *hdev, struct hid_report *report,
- u8 *data, int size)
-{
- struct usb_interface *intf = to_usb_interface(hdev->dev.parent);
-
- /* If this is a pen input report */
- if (intf->cur_altsetting->desc.bInterfaceNumber == 0 &&
- report->type == HID_INPUT_REPORT &&
- report->id == 0x07 && size >= 2)
- /* Invert the in-range bit */
- data[1] ^= 0x40;
-
- return 0;
-}
-
-static const struct hid_device_id huion_devices[] = {
- { HID_USB_DEVICE(USB_VENDOR_ID_HUION, USB_DEVICE_ID_HUION_TABLET) },
- { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_HUION_TABLET) },
- { }
-};
-MODULE_DEVICE_TABLE(hid, huion_devices);
-
-static struct hid_driver huion_driver = {
- .name = "huion",
- .id_table = huion_devices,
- .probe = huion_probe,
- .report_fixup = huion_report_fixup,
- .raw_event = huion_raw_event,
-};
-module_hid_driver(huion_driver);
-
-MODULE_AUTHOR("Martin Rusko");
-MODULE_DESCRIPTION("Huion HID driver");
-MODULE_LICENSE("GPL");
#define USB_DEVICE_ID_UGCI_FLYING 0x0020
#define USB_DEVICE_ID_UGCI_FIGHTING 0x0030
+#define USB_VENDOR_ID_HP 0x03f0
+#define USB_PRODUCT_ID_HP_LOGITECH_OEM_USB_OPTICAL_MOUSE_0A4A 0x0a4a
+#define USB_PRODUCT_ID_HP_LOGITECH_OEM_USB_OPTICAL_MOUSE_0B4A 0x0b4a
+#define USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE 0x134a
+
#define USB_VENDOR_ID_HUION 0x256c
#define USB_DEVICE_ID_HUION_TABLET 0x006e
#define USB_DEVICE_ID_KYE_MOUSEPEN_I608X 0x5011
#define USB_DEVICE_ID_KYE_MOUSEPEN_I608X_2 0x501a
#define USB_DEVICE_ID_KYE_EASYPEN_M610X 0x5013
+#define USB_DEVICE_ID_KYE_PENSKETCH_M912 0x5015
#define USB_VENDOR_ID_LABTEC 0x1020
#define USB_DEVICE_ID_LABTEC_WIRELESS_KEYBOARD 0x0006
#define USB_DEVICE_ID_LOGITECH_HARMONY_FIRST 0xc110
#define USB_DEVICE_ID_LOGITECH_HARMONY_LAST 0xc14f
#define USB_DEVICE_ID_LOGITECH_HARMONY_PS3 0x0306
+#define USB_DEVICE_ID_LOGITECH_MOUSE_C01A 0xc01a
+#define USB_DEVICE_ID_LOGITECH_MOUSE_C05A 0xc05a
+#define USB_DEVICE_ID_LOGITECH_MOUSE_C06A 0xc06a
#define USB_DEVICE_ID_LOGITECH_RUMBLEPAD_CORD 0xc20a
#define USB_DEVICE_ID_LOGITECH_RUMBLEPAD 0xc211
#define USB_DEVICE_ID_LOGITECH_EXTREME_3D 0xc215
#define USB_DEVICE_ID_ZYTRONIC_ZXY100 0x0005
#define USB_VENDOR_ID_PRIMAX 0x0461
+#define USB_DEVICE_ID_PRIMAX_MOUSE_4D22 0x4d22
#define USB_DEVICE_ID_PRIMAX_KEYBOARD 0x4e05
enum power_supply_property prop,
union power_supply_propval *val)
{
- struct hid_device *dev = container_of(psy, struct hid_device, battery);
+ struct hid_device *dev = power_supply_get_drvdata(psy);
int ret = 0;
__u8 *buf;
static bool hidinput_setup_battery(struct hid_device *dev, unsigned report_type, struct hid_field *field)
{
- struct power_supply *battery = &dev->battery;
- int ret;
+ struct power_supply_desc *psy_desc = NULL;
+ struct power_supply_config psy_cfg = { .drv_data = dev, };
unsigned quirks;
s32 min, max;
if (field->usage->hid != HID_DC_BATTERYSTRENGTH)
return false; /* no match */
- if (battery->name != NULL)
+ if (dev->battery != NULL)
goto out; /* already initialized? */
- battery->name = kasprintf(GFP_KERNEL, "hid-%s-battery", dev->uniq);
- if (battery->name == NULL)
+ psy_desc = kzalloc(sizeof(*psy_desc), GFP_KERNEL);
+ if (psy_desc == NULL)
goto out;
- battery->type = POWER_SUPPLY_TYPE_BATTERY;
- battery->properties = hidinput_battery_props;
- battery->num_properties = ARRAY_SIZE(hidinput_battery_props);
- battery->use_for_apm = 0;
- battery->get_property = hidinput_get_battery_property;
+ psy_desc->name = kasprintf(GFP_KERNEL, "hid-%s-battery", dev->uniq);
+ if (psy_desc->name == NULL) {
+ kfree(psy_desc);
+ goto out;
+ }
+
+ psy_desc->type = POWER_SUPPLY_TYPE_BATTERY;
+ psy_desc->properties = hidinput_battery_props;
+ psy_desc->num_properties = ARRAY_SIZE(hidinput_battery_props);
+ psy_desc->use_for_apm = 0;
+ psy_desc->get_property = hidinput_get_battery_property;
quirks = find_battery_quirk(dev);
dev->battery_report_type = report_type;
dev->battery_report_id = field->report->id;
- ret = power_supply_register(&dev->dev, battery);
- if (ret != 0) {
- hid_warn(dev, "can't register power supply: %d\n", ret);
- kfree(battery->name);
- battery->name = NULL;
+ dev->battery = power_supply_register(&dev->dev, psy_desc, &psy_cfg);
+ if (IS_ERR(dev->battery)) {
+ hid_warn(dev, "can't register power supply: %ld\n",
+ PTR_ERR(dev->battery));
+ kfree(psy_desc->name);
+ kfree(psy_desc);
+ dev->battery = NULL;
+ } else {
+ power_supply_powers(dev->battery, &dev->dev);
}
- power_supply_powers(battery, &dev->dev);
-
out:
return true;
}
static void hidinput_cleanup_battery(struct hid_device *dev)
{
- if (!dev->battery.name)
+ if (!dev->battery)
return;
- power_supply_unregister(&dev->battery);
- kfree(dev->battery.name);
- dev->battery.name = NULL;
+ power_supply_unregister(dev->battery);
+ kfree(dev->battery->desc->name);
+ kfree(dev->battery->desc);
+ dev->battery = NULL;
}
#else /* !CONFIG_HID_BATTERY_STRENGTH */
static bool hidinput_setup_battery(struct hid_device *dev, unsigned report_type,
}
break;
+ case HID_UP_TELEPHONY:
+ switch (usage->hid & HID_USAGE) {
+ case 0x2f: map_key_clear(KEY_MICMUTE); break;
+ case 0xb0: map_key_clear(KEY_NUMERIC_0); break;
+ case 0xb1: map_key_clear(KEY_NUMERIC_1); break;
+ case 0xb2: map_key_clear(KEY_NUMERIC_2); break;
+ case 0xb3: map_key_clear(KEY_NUMERIC_3); break;
+ case 0xb4: map_key_clear(KEY_NUMERIC_4); break;
+ case 0xb5: map_key_clear(KEY_NUMERIC_5); break;
+ case 0xb6: map_key_clear(KEY_NUMERIC_6); break;
+ case 0xb7: map_key_clear(KEY_NUMERIC_7); break;
+ case 0xb8: map_key_clear(KEY_NUMERIC_8); break;
+ case 0xb9: map_key_clear(KEY_NUMERIC_9); break;
+ case 0xba: map_key_clear(KEY_NUMERIC_STAR); break;
+ case 0xbb: map_key_clear(KEY_NUMERIC_POUND); break;
+ case 0xbc: map_key_clear(KEY_NUMERIC_A); break;
+ case 0xbd: map_key_clear(KEY_NUMERIC_B); break;
+ case 0xbe: map_key_clear(KEY_NUMERIC_C); break;
+ case 0xbf: map_key_clear(KEY_NUMERIC_D); break;
+ default: goto ignore;
+ }
+ break;
+
case HID_UP_CONSUMER: /* USB HUT v1.12, pages 75-84 */
switch (usage->hid & HID_USAGE) {
case 0x000: goto ignore;
0xC0 /* End Collection */
};
+
+/* Original PenSketch M912 report descriptor size */
+#define PENSKETCH_M912_RDESC_ORIG_SIZE 482
+
+/* Fixed PenSketch M912 report descriptor */
+static __u8 pensketch_m912_rdesc_fixed[] = {
+ 0x05, 0x01, /* Usage Page (Desktop), */
+ 0x08, /* Usage (00h), */
+ 0xA1, 0x01, /* Collection (Application), */
+ 0x85, 0x05, /* Report ID (5), */
+ 0x06, 0x00, 0xFF, /* Usage Page (FF00h), */
+ 0x09, 0x01, /* Usage (01h), */
+ 0x15, 0x81, /* Logical Minimum (-127), */
+ 0x25, 0x7F, /* Logical Maximum (127), */
+ 0x75, 0x08, /* Report Size (8), */
+ 0x95, 0x07, /* Report Count (7), */
+ 0xB1, 0x02, /* Feature (Variable), */
+ 0xC0, /* End Collection, */
+ 0x05, 0x0D, /* Usage Page (Digitizer), */
+ 0x09, 0x02, /* Usage (Pen), */
+ 0xA1, 0x01, /* Collection (Application), */
+ 0x85, 0x10, /* Report ID (16), */
+ 0x09, 0x20, /* Usage (Stylus), */
+ 0xA0, /* Collection (Physical), */
+ 0x09, 0x42, /* Usage (Tip Switch), */
+ 0x09, 0x44, /* Usage (Barrel Switch), */
+ 0x09, 0x46, /* Usage (Tablet Pick), */
+ 0x14, /* Logical Minimum (0), */
+ 0x25, 0x01, /* Logical Maximum (1), */
+ 0x75, 0x01, /* Report Size (1), */
+ 0x95, 0x03, /* Report Count (3), */
+ 0x81, 0x02, /* Input (Variable), */
+ 0x95, 0x04, /* Report Count (4), */
+ 0x81, 0x03, /* Input (Constant, Variable), */
+ 0x09, 0x32, /* Usage (In Range), */
+ 0x95, 0x01, /* Report Count (1), */
+ 0x81, 0x02, /* Input (Variable), */
+ 0x75, 0x10, /* Report Size (16), */
+ 0x95, 0x01, /* Report Count (1), */
+ 0xA4, /* Push, */
+ 0x05, 0x01, /* Usage Page (Desktop), */
+ 0x55, 0xFD, /* Unit Exponent (-3), */
+ 0x65, 0x13, /* Unit (Inch), */
+ 0x14, /* Logical Minimum (0), */
+ 0x34, /* Physical Minimum (0), */
+ 0x09, 0x30, /* Usage (X), */
+ 0x27, 0x00, 0xF0, 0x00, 0x00, /* Logical Maximum (61440), */
+ 0x46, 0xE0, 0x2E, /* Physical Maximum (12000), */
+ 0x81, 0x02, /* Input (Variable), */
+ 0x09, 0x31, /* Usage (Y), */
+ 0x27, 0x00, 0xB4, 0x00, 0x00, /* Logical Maximum (46080), */
+ 0x46, 0x28, 0x23, /* Physical Maximum (9000), */
+ 0x81, 0x02, /* Input (Variable), */
+ 0xB4, /* Pop, */
+ 0x09, 0x30, /* Usage (Tip Pressure), */
+ 0x14, /* Logical Minimum (0), */
+ 0x26, 0xFF, 0x07, /* Logical Maximum (2047), */
+ 0x81, 0x02, /* Input (Variable), */
+ 0xC0, /* End Collection, */
+ 0xC0, /* End Collection, */
+ 0x05, 0x0D, /* Usage Page (Digitizer), */
+ 0x09, 0x21, /* Usage (Puck), */
+ 0xA1, 0x01, /* Collection (Application), */
+ 0x85, 0x11, /* Report ID (17), */
+ 0x09, 0x21, /* Usage (Puck), */
+ 0xA0, /* Collection (Physical), */
+ 0x05, 0x09, /* Usage Page (Button), */
+ 0x75, 0x01, /* Report Size (1), */
+ 0x19, 0x01, /* Usage Minimum (01h), */
+ 0x29, 0x03, /* Usage Maximum (03h), */
+ 0x14, /* Logical Minimum (0), */
+ 0x25, 0x01, /* Logical Maximum (1), */
+ 0x95, 0x03, /* Report Count (3), */
+ 0x81, 0x02, /* Input (Variable), */
+ 0x95, 0x04, /* Report Count (4), */
+ 0x81, 0x01, /* Input (Constant), */
+ 0x95, 0x01, /* Report Count (1), */
+ 0x0B, 0x32, 0x00, 0x0D, 0x00, /* Usage (Digitizer In Range), */
+ 0x14, /* Logical Minimum (0), */
+ 0x25, 0x01, /* Logical Maximum (1), */
+ 0x81, 0x02, /* Input (Variable), */
+ 0xA4, /* Push, */
+ 0x05, 0x01, /* Usage Page (Desktop), */
+ 0x75, 0x10, /* Report Size (16), */
+ 0x95, 0x01, /* Report Count (1), */
+ 0x55, 0xFD, /* Unit Exponent (-3), */
+ 0x65, 0x13, /* Unit (Inch), */
+ 0x14, /* Logical Minimum (0), */
+ 0x34, /* Physical Minimum (0), */
+ 0x09, 0x30, /* Usage (X), */
+ 0x27, 0x00, 0xF0, 0x00, 0x00, /* Logical Maximum (61440), */
+ 0x46, 0xE0, 0x2E, /* Physical Maximum (12000), */
+ 0x81, 0x02, /* Input (Variable), */
+ 0x09, 0x31, /* Usage (Y), */
+ 0x27, 0x00, 0xB4, 0x00, 0x00, /* Logical Maximum (46080), */
+ 0x46, 0x28, 0x23, /* Physical Maximum (9000), */
+ 0x81, 0x02, /* Input (Variable), */
+ 0x09, 0x38, /* Usage (Wheel), */
+ 0x75, 0x08, /* Report Size (8), */
+ 0x95, 0x01, /* Report Count (1), */
+ 0x15, 0xFF, /* Logical Minimum (-1), */
+ 0x25, 0x01, /* Logical Maximum (1), */
+ 0x34, /* Physical Minimum (0), */
+ 0x44, /* Physical Maximum (0), */
+ 0x81, 0x06, /* Input (Variable, Relative), */
+ 0xB4, /* Pop, */
+ 0xC0, /* End Collection, */
+ 0xC0, /* End Collection, */
+ 0x05, 0x0C, /* Usage Page (Consumer), */
+ 0x09, 0x01, /* Usage (Consumer Control), */
+ 0xA1, 0x01, /* Collection (Application), */
+ 0x85, 0x12, /* Report ID (18), */
+ 0x14, /* Logical Minimum (0), */
+ 0x25, 0x01, /* Logical Maximum (1), */
+ 0x75, 0x01, /* Report Size (1), */
+ 0x95, 0x08, /* Report Count (8), */
+ 0x05, 0x0C, /* Usage Page (Consumer), */
+ 0x0A, 0x6A, 0x02, /* Usage (AC Delete), */
+ 0x0A, 0x1A, 0x02, /* Usage (AC Undo), */
+ 0x0A, 0x01, 0x02, /* Usage (AC New), */
+ 0x0A, 0x2F, 0x02, /* Usage (AC Zoom), */
+ 0x0A, 0x25, 0x02, /* Usage (AC Forward), */
+ 0x0A, 0x24, 0x02, /* Usage (AC Back), */
+ 0x0A, 0x2D, 0x02, /* Usage (AC Zoom In), */
+ 0x0A, 0x2E, 0x02, /* Usage (AC Zoom Out), */
+ 0x81, 0x02, /* Input (Variable), */
+ 0x95, 0x30, /* Report Count (48), */
+ 0x81, 0x03, /* Input (Constant, Variable), */
+ 0xC0 /* End Collection */
+};
+
static __u8 *kye_consumer_control_fixup(struct hid_device *hdev, __u8 *rdesc,
unsigned int *rsize, int offset, const char *device_name) {
/*
*rsize = sizeof(easypen_m610x_rdesc_fixed);
}
break;
+ case USB_DEVICE_ID_KYE_PENSKETCH_M912:
+ if (*rsize == PENSKETCH_M912_RDESC_ORIG_SIZE) {
+ rdesc = pensketch_m912_rdesc_fixed;
+ *rsize = sizeof(pensketch_m912_rdesc_fixed);
+ }
+ break;
case USB_DEVICE_ID_GENIUS_GILA_GAMING_MOUSE:
rdesc = kye_consumer_control_fixup(hdev, rdesc, rsize, 104,
"Genius Gila Gaming Mouse");
case USB_DEVICE_ID_KYE_MOUSEPEN_I608X:
case USB_DEVICE_ID_KYE_MOUSEPEN_I608X_2:
case USB_DEVICE_ID_KYE_EASYPEN_M610X:
+ case USB_DEVICE_ID_KYE_PENSKETCH_M912:
ret = kye_tablet_enable(hdev);
if (ret) {
hid_err(hdev, "tablet enabling failed\n");
USB_DEVICE_ID_GENIUS_GX_IMPERATOR) },
{ HID_USB_DEVICE(USB_VENDOR_ID_KYE,
USB_DEVICE_ID_GENIUS_MANTICORE) },
+ { HID_USB_DEVICE(USB_VENDOR_ID_KYE,
+ USB_DEVICE_ID_KYE_PENSKETCH_M912) },
{ }
};
MODULE_DEVICE_TABLE(hid, kye_devices);
#include "usbhid/usbhid.h"
#include "hid-ids.h"
#include "hid-lg.h"
+#include "hid-lg4ff.h"
#define LG_RDESC 0x001
#define LG_BAD_RELATIVE_KEYS 0x002
};
module_hid_driver(lg_driver);
+#ifdef CONFIG_LOGIWHEELS_FF
+int lg4ff_no_autoswitch = 0;
+module_param_named(lg4ff_no_autoswitch, lg4ff_no_autoswitch, int, S_IRUGO);
+MODULE_PARM_DESC(lg4ff_no_autoswitch, "Do not switch multimode wheels to their native mode automatically");
+#endif
+
MODULE_LICENSE("GPL");
static inline int lg3ff_init(struct hid_device *hdev) { return -1; }
#endif
-#ifdef CONFIG_LOGIWHEELS_FF
-int lg4ff_adjust_input_event(struct hid_device *hid, struct hid_field *field,
- struct hid_usage *usage, __s32 value, struct lg_drv_data *drv_data);
-int lg4ff_init(struct hid_device *hdev);
-int lg4ff_deinit(struct hid_device *hdev);
-#else
-static inline int lg4ff_adjust_input_event(struct hid_device *hid, struct hid_field *field,
- struct hid_usage *usage, __s32 value, struct lg_drv_data *drv_data) { return 0; }
-static inline int lg4ff_init(struct hid_device *hdev) { return -1; }
-static inline int lg4ff_deinit(struct hid_device *hdev) { return -1; }
-#endif
-
#endif
#include "usbhid/usbhid.h"
#include "hid-lg.h"
+#include "hid-lg4ff.h"
#include "hid-ids.h"
-#define DFGT_REV_MAJ 0x13
-#define DFGT_REV_MIN 0x22
-#define DFGT2_REV_MIN 0x26
-#define DFP_REV_MAJ 0x11
-#define DFP_REV_MIN 0x06
-#define FFEX_REV_MAJ 0x21
-#define FFEX_REV_MIN 0x00
-#define G25_REV_MAJ 0x12
-#define G25_REV_MIN 0x22
-#define G27_REV_MAJ 0x12
-#define G27_REV_MIN 0x38
-#define G27_2_REV_MIN 0x39
-
#define to_hid_device(pdev) container_of(pdev, struct hid_device, dev)
+#define LG4FF_MMODE_IS_MULTIMODE 0
+#define LG4FF_MMODE_SWITCHED 1
+#define LG4FF_MMODE_NOT_MULTIMODE 2
+
+#define LG4FF_MODE_NATIVE_IDX 0
+#define LG4FF_MODE_DFEX_IDX 1
+#define LG4FF_MODE_DFP_IDX 2
+#define LG4FF_MODE_G25_IDX 3
+#define LG4FF_MODE_DFGT_IDX 4
+#define LG4FF_MODE_G27_IDX 5
+#define LG4FF_MODE_MAX_IDX 6
+
+#define LG4FF_MODE_NATIVE BIT(LG4FF_MODE_NATIVE_IDX)
+#define LG4FF_MODE_DFEX BIT(LG4FF_MODE_DFEX_IDX)
+#define LG4FF_MODE_DFP BIT(LG4FF_MODE_DFP_IDX)
+#define LG4FF_MODE_G25 BIT(LG4FF_MODE_G25_IDX)
+#define LG4FF_MODE_DFGT BIT(LG4FF_MODE_DFGT_IDX)
+#define LG4FF_MODE_G27 BIT(LG4FF_MODE_G27_IDX)
+
+#define LG4FF_DFEX_TAG "DF-EX"
+#define LG4FF_DFEX_NAME "Driving Force / Formula EX"
+#define LG4FF_DFP_TAG "DFP"
+#define LG4FF_DFP_NAME "Driving Force Pro"
+#define LG4FF_G25_TAG "G25"
+#define LG4FF_G25_NAME "G25 Racing Wheel"
+#define LG4FF_G27_TAG "G27"
+#define LG4FF_G27_NAME "G27 Racing Wheel"
+#define LG4FF_DFGT_TAG "DFGT"
+#define LG4FF_DFGT_NAME "Driving Force GT"
+
+#define LG4FF_FFEX_REV_MAJ 0x21
+#define LG4FF_FFEX_REV_MIN 0x00
+
static void hid_lg4ff_set_range_dfp(struct hid_device *hid, u16 range);
static void hid_lg4ff_set_range_g25(struct hid_device *hid, u16 range);
__u8 led_state;
struct led_classdev *led[5];
#endif
+ u32 alternate_modes;
+ const char *real_tag;
+ const char *real_name;
+ u16 real_product_id;
struct list_head list;
void (*set_range)(struct hid_device *hid, u16 range);
};
void (*set_range)(struct hid_device *hid, u16 range);
};
+struct lg4ff_compat_mode_switch {
+ const __u8 cmd_count; /* Number of commands to send */
+ const __u8 cmd[];
+};
+
+struct lg4ff_wheel_ident_info {
+ const u16 mask;
+ const u16 result;
+ const u16 real_product_id;
+};
+
+struct lg4ff_wheel_ident_checklist {
+ const u32 count;
+ const struct lg4ff_wheel_ident_info *models[];
+};
+
+struct lg4ff_multimode_wheel {
+ const u16 product_id;
+ const u32 alternate_modes;
+ const char *real_tag;
+ const char *real_name;
+};
+
+struct lg4ff_alternate_mode {
+ const u16 product_id;
+ const char *tag;
+ const char *name;
+};
+
static const struct lg4ff_wheel lg4ff_devices[] = {
{USB_DEVICE_ID_LOGITECH_WHEEL, lg4ff_wheel_effects, 40, 270, NULL},
{USB_DEVICE_ID_LOGITECH_MOMO_WHEEL, lg4ff_wheel_effects, 40, 270, NULL},
{USB_DEVICE_ID_LOGITECH_WII_WHEEL, lg4ff_wheel_effects, 40, 270, NULL}
};
-struct lg4ff_native_cmd {
- const __u8 cmd_num; /* Number of commands to send */
- const __u8 cmd[];
+static const struct lg4ff_multimode_wheel lg4ff_multimode_wheels[] = {
+ {USB_DEVICE_ID_LOGITECH_DFP_WHEEL,
+ LG4FF_MODE_NATIVE | LG4FF_MODE_DFP | LG4FF_MODE_DFEX,
+ LG4FF_DFP_TAG, LG4FF_DFP_NAME},
+ {USB_DEVICE_ID_LOGITECH_G25_WHEEL,
+ LG4FF_MODE_NATIVE | LG4FF_MODE_G25 | LG4FF_MODE_DFP | LG4FF_MODE_DFEX,
+ LG4FF_G25_TAG, LG4FF_G25_NAME},
+ {USB_DEVICE_ID_LOGITECH_DFGT_WHEEL,
+ LG4FF_MODE_NATIVE | LG4FF_MODE_DFGT | LG4FF_MODE_DFP | LG4FF_MODE_DFEX,
+ LG4FF_DFGT_TAG, LG4FF_DFGT_NAME},
+ {USB_DEVICE_ID_LOGITECH_G27_WHEEL,
+ LG4FF_MODE_NATIVE | LG4FF_MODE_G27 | LG4FF_MODE_G25 | LG4FF_MODE_DFP | LG4FF_MODE_DFEX,
+ LG4FF_G27_TAG, LG4FF_G27_NAME},
};
-struct lg4ff_usb_revision {
- const __u16 rev_maj;
- const __u16 rev_min;
- const struct lg4ff_native_cmd *command;
+static const struct lg4ff_alternate_mode lg4ff_alternate_modes[] = {
+ [LG4FF_MODE_NATIVE_IDX] = {0, "native", ""},
+ [LG4FF_MODE_DFEX_IDX] = {USB_DEVICE_ID_LOGITECH_WHEEL, LG4FF_DFEX_TAG, LG4FF_DFEX_NAME},
+ [LG4FF_MODE_DFP_IDX] = {USB_DEVICE_ID_LOGITECH_DFP_WHEEL, LG4FF_DFP_TAG, LG4FF_DFP_NAME},
+ [LG4FF_MODE_G25_IDX] = {USB_DEVICE_ID_LOGITECH_G25_WHEEL, LG4FF_G25_TAG, LG4FF_G25_NAME},
+ [LG4FF_MODE_DFGT_IDX] = {USB_DEVICE_ID_LOGITECH_DFGT_WHEEL, LG4FF_DFGT_TAG, LG4FF_DFGT_NAME},
+ [LG4FF_MODE_G27_IDX] = {USB_DEVICE_ID_LOGITECH_G27_WHEEL, LG4FF_G27_TAG, LG4FF_G27_NAME}
};
-static const struct lg4ff_native_cmd native_dfp = {
- 1,
- {0xf8, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00}
+/* Multimode wheel identificators */
+static const struct lg4ff_wheel_ident_info lg4ff_dfp_ident_info = {
+ 0xf000,
+ 0x1000,
+ USB_DEVICE_ID_LOGITECH_DFP_WHEEL
+};
+
+static const struct lg4ff_wheel_ident_info lg4ff_g25_ident_info = {
+ 0xff00,
+ 0x1200,
+ USB_DEVICE_ID_LOGITECH_G25_WHEEL
+};
+
+static const struct lg4ff_wheel_ident_info lg4ff_g27_ident_info = {
+ 0xfff0,
+ 0x1230,
+ USB_DEVICE_ID_LOGITECH_G27_WHEEL
};
-static const struct lg4ff_native_cmd native_dfgt = {
+static const struct lg4ff_wheel_ident_info lg4ff_dfgt_ident_info = {
+ 0xff00,
+ 0x1300,
+ USB_DEVICE_ID_LOGITECH_DFGT_WHEEL
+};
+
+/* Multimode wheel identification checklists */
+static const struct lg4ff_wheel_ident_checklist lg4ff_main_checklist = {
+ 4,
+ {&lg4ff_dfgt_ident_info,
+ &lg4ff_g27_ident_info,
+ &lg4ff_g25_ident_info,
+ &lg4ff_dfp_ident_info}
+};
+
+/* Compatibility mode switching commands */
+/* EXT_CMD9 - Understood by G27 and DFGT */
+static const struct lg4ff_compat_mode_switch lg4ff_mode_switch_ext09_dfex = {
2,
- {0xf8, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, /* 1st command */
- 0xf8, 0x09, 0x03, 0x01, 0x00, 0x00, 0x00} /* 2nd command */
+ {0xf8, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, /* Revert mode upon USB reset */
+ 0xf8, 0x09, 0x00, 0x01, 0x00, 0x00, 0x00} /* Switch mode to DF-EX with detach */
};
-static const struct lg4ff_native_cmd native_g25 = {
- 1,
- {0xf8, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00}
+static const struct lg4ff_compat_mode_switch lg4ff_mode_switch_ext09_dfp = {
+ 2,
+ {0xf8, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, /* Revert mode upon USB reset */
+ 0xf8, 0x09, 0x01, 0x01, 0x00, 0x00, 0x00} /* Switch mode to DFP with detach */
+};
+
+static const struct lg4ff_compat_mode_switch lg4ff_mode_switch_ext09_g25 = {
+ 2,
+ {0xf8, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, /* Revert mode upon USB reset */
+ 0xf8, 0x09, 0x02, 0x01, 0x00, 0x00, 0x00} /* Switch mode to G25 with detach */
+};
+
+static const struct lg4ff_compat_mode_switch lg4ff_mode_switch_ext09_dfgt = {
+ 2,
+ {0xf8, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, /* Revert mode upon USB reset */
+ 0xf8, 0x09, 0x03, 0x01, 0x00, 0x00, 0x00} /* Switch mode to DFGT with detach */
};
-static const struct lg4ff_native_cmd native_g27 = {
+static const struct lg4ff_compat_mode_switch lg4ff_mode_switch_ext09_g27 = {
2,
- {0xf8, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, /* 1st command */
- 0xf8, 0x09, 0x04, 0x01, 0x00, 0x00, 0x00} /* 2nd command */
+ {0xf8, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, /* Revert mode upon USB reset */
+ 0xf8, 0x09, 0x04, 0x01, 0x00, 0x00, 0x00} /* Switch mode to G27 with detach */
};
-static const struct lg4ff_usb_revision lg4ff_revs[] = {
- {DFGT_REV_MAJ, DFGT_REV_MIN, &native_dfgt}, /* Driving Force GT */
- {DFGT_REV_MAJ, DFGT2_REV_MIN, &native_dfgt}, /* Driving Force GT v2 */
- {DFP_REV_MAJ, DFP_REV_MIN, &native_dfp}, /* Driving Force Pro */
- {G25_REV_MAJ, G25_REV_MIN, &native_g25}, /* G25 */
- {G27_REV_MAJ, G27_REV_MIN, &native_g27}, /* G27 */
- {G27_REV_MAJ, G27_2_REV_MIN, &native_g27}, /* G27 v2 */
+/* EXT_CMD1 - Understood by DFP, G25, G27 and DFGT */
+static const struct lg4ff_compat_mode_switch lg4ff_mode_switch_ext01_dfp = {
+ 1,
+ {0xf8, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00}
+};
+
+/* EXT_CMD16 - Understood by G25 and G27 */
+static const struct lg4ff_compat_mode_switch lg4ff_mode_switch_ext16_g25 = {
+ 1,
+ {0xf8, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00}
};
/* Recalculates X axis value accordingly to currently selected range */
hid_hw_request(hid, report, HID_REQ_SET_REPORT);
}
-static void hid_lg4ff_switch_native(struct hid_device *hid, const struct lg4ff_native_cmd *cmd)
+static const struct lg4ff_compat_mode_switch *lg4ff_get_mode_switch_command(const u16 real_product_id, const u16 target_product_id)
+{
+ switch (real_product_id) {
+ case USB_DEVICE_ID_LOGITECH_DFP_WHEEL:
+ switch (target_product_id) {
+ case USB_DEVICE_ID_LOGITECH_DFP_WHEEL:
+ return &lg4ff_mode_switch_ext01_dfp;
+ /* DFP can only be switched to its native mode */
+ default:
+ return NULL;
+ }
+ break;
+ case USB_DEVICE_ID_LOGITECH_G25_WHEEL:
+ switch (target_product_id) {
+ case USB_DEVICE_ID_LOGITECH_DFP_WHEEL:
+ return &lg4ff_mode_switch_ext01_dfp;
+ case USB_DEVICE_ID_LOGITECH_G25_WHEEL:
+ return &lg4ff_mode_switch_ext16_g25;
+ /* G25 can only be switched to DFP mode or its native mode */
+ default:
+ return NULL;
+ }
+ break;
+ case USB_DEVICE_ID_LOGITECH_G27_WHEEL:
+ switch (target_product_id) {
+ case USB_DEVICE_ID_LOGITECH_WHEEL:
+ return &lg4ff_mode_switch_ext09_dfex;
+ case USB_DEVICE_ID_LOGITECH_DFP_WHEEL:
+ return &lg4ff_mode_switch_ext09_dfp;
+ case USB_DEVICE_ID_LOGITECH_G25_WHEEL:
+ return &lg4ff_mode_switch_ext09_g25;
+ case USB_DEVICE_ID_LOGITECH_G27_WHEEL:
+ return &lg4ff_mode_switch_ext09_g27;
+ /* G27 can only be switched to DF-EX, DFP, G25 or its native mode */
+ default:
+ return NULL;
+ }
+ break;
+ case USB_DEVICE_ID_LOGITECH_DFGT_WHEEL:
+ switch (target_product_id) {
+ case USB_DEVICE_ID_LOGITECH_WHEEL:
+ return &lg4ff_mode_switch_ext09_dfex;
+ case USB_DEVICE_ID_LOGITECH_DFP_WHEEL:
+ return &lg4ff_mode_switch_ext09_dfp;
+ case USB_DEVICE_ID_LOGITECH_DFGT_WHEEL:
+ return &lg4ff_mode_switch_ext09_dfgt;
+ /* DFGT can only be switched to DF-EX, DFP or its native mode */
+ default:
+ return NULL;
+ }
+ break;
+ /* No other wheels have multiple modes */
+ default:
+ return NULL;
+ }
+}
+
+static int lg4ff_switch_compatibility_mode(struct hid_device *hid, const struct lg4ff_compat_mode_switch *s)
{
struct list_head *report_list = &hid->report_enum[HID_OUTPUT_REPORT].report_list;
struct hid_report *report = list_entry(report_list->next, struct hid_report, list);
- __u8 i, j;
+ __s32 *value = report->field[0]->value;
+ u8 i;
- j = 0;
- while (j < 7*cmd->cmd_num) {
- for (i = 0; i < 7; i++)
- report->field[0]->value[i] = cmd->cmd[j++];
+ for (i = 0; i < s->cmd_count; i++) {
+ u8 j;
+
+ for (j = 0; j < 7; j++)
+ value[j] = s->cmd[j + (7*i)];
hid_hw_request(hid, report, HID_REQ_SET_REPORT);
}
+ hid_hw_wait(hid);
+ return 0;
+}
+
+static ssize_t lg4ff_alternate_modes_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct hid_device *hid = to_hid_device(dev);
+ struct lg4ff_device_entry *entry;
+ struct lg_drv_data *drv_data;
+ ssize_t count = 0;
+ int i;
+
+ drv_data = hid_get_drvdata(hid);
+ if (!drv_data) {
+ hid_err(hid, "Private driver data not found!\n");
+ return 0;
+ }
+
+ entry = drv_data->device_props;
+ if (!entry) {
+ hid_err(hid, "Device properties not found!\n");
+ return 0;
+ }
+
+ if (!entry->real_name) {
+ hid_err(hid, "NULL pointer to string\n");
+ return 0;
+ }
+
+ for (i = 0; i < LG4FF_MODE_MAX_IDX; i++) {
+ if (entry->alternate_modes & BIT(i)) {
+ /* Print tag and full name */
+ count += scnprintf(buf + count, PAGE_SIZE - count, "%s: %s",
+ lg4ff_alternate_modes[i].tag,
+ !lg4ff_alternate_modes[i].product_id ? entry->real_name : lg4ff_alternate_modes[i].name);
+ if (count >= PAGE_SIZE - 1)
+ return count;
+
+ /* Mark the currently active mode with an asterisk */
+ if (lg4ff_alternate_modes[i].product_id == entry->product_id ||
+ (lg4ff_alternate_modes[i].product_id == 0 && entry->product_id == entry->real_product_id))
+ count += scnprintf(buf + count, PAGE_SIZE - count, " *\n");
+ else
+ count += scnprintf(buf + count, PAGE_SIZE - count, "\n");
+
+ if (count >= PAGE_SIZE - 1)
+ return count;
+ }
+ }
+
+ return count;
+}
+
+static ssize_t lg4ff_alternate_modes_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
+{
+ struct hid_device *hid = to_hid_device(dev);
+ struct lg4ff_device_entry *entry;
+ struct lg_drv_data *drv_data;
+ const struct lg4ff_compat_mode_switch *s;
+ u16 target_product_id = 0;
+ int i, ret;
+ char *lbuf;
+
+ drv_data = hid_get_drvdata(hid);
+ if (!drv_data) {
+ hid_err(hid, "Private driver data not found!\n");
+ return -EINVAL;
+ }
+
+ entry = drv_data->device_props;
+ if (!entry) {
+ hid_err(hid, "Device properties not found!\n");
+ return -EINVAL;
+ }
+
+ /* Allow \n at the end of the input parameter */
+ lbuf = kasprintf(GFP_KERNEL, "%s", buf);
+ if (!lbuf)
+ return -ENOMEM;
+
+ i = strlen(lbuf);
+ if (lbuf[i-1] == '\n') {
+ if (i == 1) {
+ kfree(lbuf);
+ return -EINVAL;
+ }
+ lbuf[i-1] = '\0';
+ }
+
+ for (i = 0; i < LG4FF_MODE_MAX_IDX; i++) {
+ const u16 mode_product_id = lg4ff_alternate_modes[i].product_id;
+ const char *tag = lg4ff_alternate_modes[i].tag;
+
+ if (entry->alternate_modes & BIT(i)) {
+ if (!strcmp(tag, lbuf)) {
+ if (!mode_product_id)
+ target_product_id = entry->real_product_id;
+ else
+ target_product_id = mode_product_id;
+ break;
+ }
+ }
+ }
+
+ if (i == LG4FF_MODE_MAX_IDX) {
+ hid_info(hid, "Requested mode \"%s\" is not supported by the device\n", lbuf);
+ kfree(lbuf);
+ return -EINVAL;
+ }
+ kfree(lbuf); /* Not needed anymore */
+
+ if (target_product_id == entry->product_id) /* Nothing to do */
+ return count;
+
+ /* Automatic switching has to be disabled for the switch to DF-EX mode to work correctly */
+ if (target_product_id == USB_DEVICE_ID_LOGITECH_WHEEL && !lg4ff_no_autoswitch) {
+ hid_info(hid, "\"%s\" cannot be switched to \"DF-EX\" mode. Load the \"hid_logitech\" module with \"lg4ff_no_autoswitch=1\" parameter set and try again\n",
+ entry->real_name);
+ return -EINVAL;
+ }
+
+ /* Take care of hardware limitations */
+ if ((entry->real_product_id == USB_DEVICE_ID_LOGITECH_DFP_WHEEL || entry->real_product_id == USB_DEVICE_ID_LOGITECH_G25_WHEEL) &&
+ entry->product_id > target_product_id) {
+ hid_info(hid, "\"%s\" cannot be switched back into \"%s\" mode\n", entry->real_name, lg4ff_alternate_modes[i].name);
+ return -EINVAL;
+ }
+
+ s = lg4ff_get_mode_switch_command(entry->real_product_id, target_product_id);
+ if (!s) {
+ hid_err(hid, "Invalid target product ID %X\n", target_product_id);
+ return -EINVAL;
+ }
+
+ ret = lg4ff_switch_compatibility_mode(hid, s);
+ return (ret == 0 ? count : ret);
}
+static DEVICE_ATTR(alternate_modes, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP | S_IROTH, lg4ff_alternate_modes_show, lg4ff_alternate_modes_store);
/* Read current range and display it in terminal */
static ssize_t range_show(struct device *dev, struct device_attribute *attr,
}
static DEVICE_ATTR_RW(range);
+static ssize_t lg4ff_real_id_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct hid_device *hid = to_hid_device(dev);
+ struct lg4ff_device_entry *entry;
+ struct lg_drv_data *drv_data;
+ size_t count;
+
+ drv_data = hid_get_drvdata(hid);
+ if (!drv_data) {
+ hid_err(hid, "Private driver data not found!\n");
+ return 0;
+ }
+
+ entry = drv_data->device_props;
+ if (!entry) {
+ hid_err(hid, "Device properties not found!\n");
+ return 0;
+ }
+
+ if (!entry->real_tag || !entry->real_name) {
+ hid_err(hid, "NULL pointer to string\n");
+ return 0;
+ }
+
+ count = scnprintf(buf, PAGE_SIZE, "%s: %s\n", entry->real_tag, entry->real_name);
+ return count;
+}
+
+static ssize_t lg4ff_real_id_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
+{
+ /* Real ID is a read-only value */
+ return -EPERM;
+}
+static DEVICE_ATTR(real_id, S_IRUGO, lg4ff_real_id_show, lg4ff_real_id_store);
+
#ifdef CONFIG_LEDS_CLASS
static void lg4ff_set_leds(struct hid_device *hid, __u8 leds)
{
}
#endif
+static u16 lg4ff_identify_multimode_wheel(struct hid_device *hid, const u16 reported_product_id, const u16 bcdDevice)
+{
+ const struct lg4ff_wheel_ident_checklist *checklist;
+ int i, from_idx, to_idx;
+
+ switch (reported_product_id) {
+ case USB_DEVICE_ID_LOGITECH_WHEEL:
+ case USB_DEVICE_ID_LOGITECH_DFP_WHEEL:
+ checklist = &lg4ff_main_checklist;
+ from_idx = 0;
+ to_idx = checklist->count - 1;
+ break;
+ case USB_DEVICE_ID_LOGITECH_G25_WHEEL:
+ checklist = &lg4ff_main_checklist;
+ from_idx = 0;
+ to_idx = checklist->count - 2; /* End identity check at G25 */
+ break;
+ case USB_DEVICE_ID_LOGITECH_G27_WHEEL:
+ checklist = &lg4ff_main_checklist;
+ from_idx = 1; /* Start identity check at G27 */
+ to_idx = checklist->count - 3; /* End identity check at G27 */
+ break;
+ case USB_DEVICE_ID_LOGITECH_DFGT_WHEEL:
+ checklist = &lg4ff_main_checklist;
+ from_idx = 0;
+ to_idx = checklist->count - 4; /* End identity check at DFGT */
+ break;
+ default:
+ return 0;
+ }
+
+ for (i = from_idx; i <= to_idx; i++) {
+ const u16 mask = checklist->models[i]->mask;
+ const u16 result = checklist->models[i]->result;
+ const u16 real_product_id = checklist->models[i]->real_product_id;
+
+ if ((bcdDevice & mask) == result) {
+ dbg_hid("Found wheel with real PID %X whose reported PID is %X\n", real_product_id, reported_product_id);
+ return real_product_id;
+ }
+ }
+
+ /* No match found. This is either Driving Force or an unknown
+ * wheel model, do not touch it */
+ dbg_hid("Wheel with bcdDevice %X was not recognized as multimode wheel, leaving in its current mode\n", bcdDevice);
+ return 0;
+}
+
+static int lg4ff_handle_multimode_wheel(struct hid_device *hid, u16 *real_product_id, const u16 bcdDevice)
+{
+ const u16 reported_product_id = hid->product;
+ int ret;
+
+ *real_product_id = lg4ff_identify_multimode_wheel(hid, reported_product_id, bcdDevice);
+ /* Probed wheel is not a multimode wheel */
+ if (!*real_product_id) {
+ *real_product_id = reported_product_id;
+ dbg_hid("Wheel is not a multimode wheel\n");
+ return LG4FF_MMODE_NOT_MULTIMODE;
+ }
+
+ /* Switch from "Driving Force" mode to native mode automatically.
+ * Otherwise keep the wheel in its current mode */
+ if (reported_product_id == USB_DEVICE_ID_LOGITECH_WHEEL &&
+ reported_product_id != *real_product_id &&
+ !lg4ff_no_autoswitch) {
+ const struct lg4ff_compat_mode_switch *s = lg4ff_get_mode_switch_command(*real_product_id, *real_product_id);
+
+ if (!s) {
+ hid_err(hid, "Invalid product id %X\n", *real_product_id);
+ return LG4FF_MMODE_NOT_MULTIMODE;
+ }
+
+ ret = lg4ff_switch_compatibility_mode(hid, s);
+ if (ret) {
+ /* Wheel could not have been switched to native mode,
+ * leave it in "Driving Force" mode and continue */
+ hid_err(hid, "Unable to switch wheel mode, errno %d\n", ret);
+ return LG4FF_MMODE_IS_MULTIMODE;
+ }
+ return LG4FF_MMODE_SWITCHED;
+ }
+
+ return LG4FF_MMODE_IS_MULTIMODE;
+}
+
+
int lg4ff_init(struct hid_device *hid)
{
struct hid_input *hidinput = list_entry(hid->inputs.next, struct hid_input, list);
struct input_dev *dev = hidinput->input;
+ const struct usb_device_descriptor *udesc = &(hid_to_usb_dev(hid)->descriptor);
+ const u16 bcdDevice = le16_to_cpu(udesc->bcdDevice);
struct lg4ff_device_entry *entry;
struct lg_drv_data *drv_data;
- struct usb_device_descriptor *udesc;
int error, i, j;
- __u16 bcdDevice, rev_maj, rev_min;
+ int mmode_ret, mmode_idx = -1;
+ u16 real_product_id;
/* Check that the report looks ok */
if (!hid_validate_values(hid, HID_OUTPUT_REPORT, 0, 0, 7))
return -1;
+ /* Check if a multimode wheel has been connected and
+ * handle it appropriately */
+ mmode_ret = lg4ff_handle_multimode_wheel(hid, &real_product_id, bcdDevice);
+
+ /* Wheel has been told to switch to native mode. There is no point in going on
+ * with the initialization as the wheel will do a USB reset when it switches mode
+ */
+ if (mmode_ret == LG4FF_MMODE_SWITCHED)
+ return 0;
+
/* Check what wheel has been connected */
for (i = 0; i < ARRAY_SIZE(lg4ff_devices); i++) {
if (hid->product == lg4ff_devices[i].product_id) {
return -1;
}
- /* Attempt to switch wheel to native mode when applicable */
- udesc = &(hid_to_usb_dev(hid)->descriptor);
- if (!udesc) {
- hid_err(hid, "NULL USB device descriptor\n");
- return -1;
- }
- bcdDevice = le16_to_cpu(udesc->bcdDevice);
- rev_maj = bcdDevice >> 8;
- rev_min = bcdDevice & 0xff;
-
- if (lg4ff_devices[i].product_id == USB_DEVICE_ID_LOGITECH_WHEEL) {
- dbg_hid("Generic wheel detected, can it do native?\n");
- dbg_hid("USB revision: %2x.%02x\n", rev_maj, rev_min);
+ if (mmode_ret == LG4FF_MMODE_IS_MULTIMODE) {
+ for (mmode_idx = 0; mmode_idx < ARRAY_SIZE(lg4ff_multimode_wheels); mmode_idx++) {
+ if (real_product_id == lg4ff_multimode_wheels[mmode_idx].product_id)
+ break;
+ }
- for (j = 0; j < ARRAY_SIZE(lg4ff_revs); j++) {
- if (lg4ff_revs[j].rev_maj == rev_maj && lg4ff_revs[j].rev_min == rev_min) {
- hid_lg4ff_switch_native(hid, lg4ff_revs[j].command);
- hid_info(hid, "Switched to native mode\n");
- }
+ if (mmode_idx == ARRAY_SIZE(lg4ff_multimode_wheels)) {
+ hid_err(hid, "Device product ID %X is not listed as a multimode wheel", real_product_id);
+ return -1;
}
}
drv_data->device_props = entry;
entry->product_id = lg4ff_devices[i].product_id;
+ entry->real_product_id = real_product_id;
entry->min_range = lg4ff_devices[i].min_range;
entry->max_range = lg4ff_devices[i].max_range;
entry->set_range = lg4ff_devices[i].set_range;
+ if (mmode_ret == LG4FF_MMODE_IS_MULTIMODE) {
+ BUG_ON(mmode_idx == -1);
+ entry->alternate_modes = lg4ff_multimode_wheels[mmode_idx].alternate_modes;
+ entry->real_tag = lg4ff_multimode_wheels[mmode_idx].real_tag;
+ entry->real_name = lg4ff_multimode_wheels[mmode_idx].real_name;
+ }
/* Check if autocentering is available and
* set the centering force to zero by default */
if (test_bit(FF_AUTOCENTER, dev->ffbit)) {
- if (rev_maj == FFEX_REV_MAJ && rev_min == FFEX_REV_MIN) /* Formula Force EX expects different autocentering command */
+ /* Formula Force EX expects different autocentering command */
+ if ((bcdDevice >> 8) == LG4FF_FFEX_REV_MAJ &&
+ (bcdDevice & 0xff) == LG4FF_FFEX_REV_MIN)
dev->ff->set_autocenter = hid_lg4ff_set_autocenter_ffex;
else
dev->ff->set_autocenter = hid_lg4ff_set_autocenter_default;
error = device_create_file(&hid->dev, &dev_attr_range);
if (error)
return error;
+ if (mmode_ret == LG4FF_MMODE_IS_MULTIMODE) {
+ error = device_create_file(&hid->dev, &dev_attr_real_id);
+ if (error)
+ return error;
+ error = device_create_file(&hid->dev, &dev_attr_alternate_modes);
+ if (error)
+ return error;
+ }
dbg_hid("sysfs interface created\n");
/* Set the maximum range to start with */
return 0;
}
-
-
int lg4ff_deinit(struct hid_device *hid)
{
struct lg4ff_device_entry *entry;
struct lg_drv_data *drv_data;
- device_remove_file(&hid->dev, &dev_attr_range);
-
drv_data = hid_get_drvdata(hid);
if (!drv_data) {
hid_err(hid, "Error while deinitializing device, no private driver data.\n");
return -1;
}
entry = drv_data->device_props;
- if (!entry) {
- hid_err(hid, "Error while deinitializing device, no device properties data.\n");
- return -1;
+ if (!entry)
+ goto out; /* Nothing more to do */
+
+ device_remove_file(&hid->dev, &dev_attr_range);
+
+ /* Multimode devices will have at least the "MODE_NATIVE" bit set */
+ if (entry->alternate_modes) {
+ device_remove_file(&hid->dev, &dev_attr_real_id);
+ device_remove_file(&hid->dev, &dev_attr_alternate_modes);
}
#ifdef CONFIG_LEDS_CLASS
/* Deallocate memory */
kfree(entry);
+out:
dbg_hid("Device successfully unregistered\n");
return 0;
}
--- /dev/null
+#ifndef __HID_LG4FF_H
+#define __HID_LG4FF_H
+
+#ifdef CONFIG_LOGIWHEELS_FF
+extern int lg4ff_no_autoswitch; /* From hid-lg.c */
+
+int lg4ff_adjust_input_event(struct hid_device *hid, struct hid_field *field,
+ struct hid_usage *usage, __s32 value, struct lg_drv_data *drv_data);
+int lg4ff_init(struct hid_device *hdev);
+int lg4ff_deinit(struct hid_device *hdev);
+#else
+static inline int lg4ff_adjust_input_event(struct hid_device *hid, struct hid_field *field,
+ struct hid_usage *usage, __s32 value, struct lg_drv_data *drv_data) { return 0; }
+static inline int lg4ff_init(struct hid_device *hdev) { return -1; }
+static inline int lg4ff_deinit(struct hid_device *hdev) { return -1; }
+#endif
+
+#endif
MODULE_AUTHOR("Benjamin Tissoires <benjamin.tissoires@gmail.com>");
MODULE_AUTHOR("Nestor Lopez Casado <nlopezcasad@logitech.com>");
+static bool disable_raw_mode;
+module_param(disable_raw_mode, bool, 0644);
+MODULE_PARM_DESC(disable_raw_mode,
+ "Disable Raw mode reporting for touchpads and keep firmware gestures.");
+
#define REPORT_ID_HIDPP_SHORT 0x10
#define REPORT_ID_HIDPP_LONG 0x11
hidpp->quirks = id->driver_data;
+ if (disable_raw_mode) {
+ hidpp->quirks &= ~HIDPP_QUIRK_CLASS_WTP;
+ hidpp->quirks &= ~HIDPP_QUIRK_DELAYED_INIT;
+ }
+
if (hidpp->quirks & HIDPP_QUIRK_CLASS_WTP) {
ret = wtp_allocate(hdev, id);
if (ret)
connected = hidpp_is_connected(hidpp);
if (id->group != HID_GROUP_LOGITECH_DJ_DEVICE) {
if (!connected) {
+ ret = -ENODEV;
hid_err(hdev, "Device not connected");
hid_device_io_stop(hdev);
goto hid_parse_fail;
#include <linux/hid.h>
#include <linux/module.h>
#include <linux/slab.h>
-#include <linux/usb.h>
#include <linux/input/mt.h>
#include <linux/string.h>
#define MT_INPUTMODE_TOUCHSCREEN 0x02
#define MT_INPUTMODE_TOUCHPAD 0x03
+#define MT_BUTTONTYPE_CLICKPAD 0
+
struct mt_slot {
__s32 x, y, cx, cy, p, w, h;
__s32 contactid; /* the device ContactID assigned to this slot */
__u8 touches_by_report; /* how many touches are present in one report:
* 1 means we should use a serial protocol
* > 1 means hybrid (multitouch) protocol */
+ __u8 buttons_count; /* number of physical buttons per touchpad */
+ bool is_buttonpad; /* is this device a button pad? */
bool serial_maybe; /* need to check for serial protocol */
bool curvalid; /* is the current contact valid? */
unsigned mt_flags; /* flags to pass to input-mt */
/* check if the maxcontacts is given by the class */
td->maxcontacts = td->mtclass.maxcontacts;
+ break;
+ case HID_DG_BUTTONTYPE:
+ if (usage->usage_index >= field->report_count) {
+ dev_err(&hdev->dev, "HID_DG_BUTTONTYPE out of range\n");
+ break;
+ }
+
+ if (field->value[usage->usage_index] == MT_BUTTONTYPE_CLICKPAD)
+ td->is_buttonpad = true;
+
break;
}
}
td->inputmode_value = MT_INPUTMODE_TOUCHPAD;
}
+ /* count the buttons on touchpads */
+ if ((usage->hid & HID_USAGE_PAGE) == HID_UP_BUTTON)
+ td->buttons_count++;
+
if (usage->usage_index)
prev_usage = &field->usage[usage->usage_index - 1];
if (cls->quirks & MT_QUIRK_NOT_SEEN_MEANS_UP)
td->mt_flags |= INPUT_MT_DROP_UNUSED;
+ /* check for clickpads */
+ if ((td->mt_flags & INPUT_MT_POINTER) && (td->buttons_count == 1))
+ td->is_buttonpad = true;
+
+ if (td->is_buttonpad)
+ __set_bit(INPUT_PROP_BUTTONPAD, input->propbit);
+
input_mt_init_slots(input, td->maxcontacts, td->mt_flags);
td->mt_flags = 0;
unsigned long flags;
+ struct rmi_function f01;
struct rmi_function f11;
struct rmi_function f30;
struct hid_device *hdev;
unsigned long device_flags;
+ unsigned long firmware_id;
};
#define RMI_PAGE(addr) (((addr) >> 8) & 0xff)
return rmi_read_block(hdev, addr, buf, 1);
}
+static int rmi_write_block(struct hid_device *hdev, u16 addr, void *buf,
+ const int len)
+{
+ struct rmi_data *data = hid_get_drvdata(hdev);
+ int ret;
+
+ mutex_lock(&data->page_mutex);
+
+ if (RMI_PAGE(addr) != data->page) {
+ ret = rmi_set_page(hdev, RMI_PAGE(addr));
+ if (ret < 0)
+ goto exit;
+ }
+
+ data->writeReport[0] = RMI_WRITE_REPORT_ID;
+ data->writeReport[1] = len;
+ data->writeReport[2] = addr & 0xFF;
+ data->writeReport[3] = (addr >> 8) & 0xFF;
+ memcpy(&data->writeReport[4], buf, len);
+
+ ret = rmi_write_report(hdev, data->writeReport,
+ data->output_report_size);
+ if (ret < 0) {
+ dev_err(&hdev->dev,
+ "failed to write request output report (%d)\n",
+ ret);
+ goto exit;
+ }
+ ret = 0;
+
+exit:
+ mutex_unlock(&data->page_mutex);
+ return ret;
+}
+
+static inline int rmi_write(struct hid_device *hdev, u16 addr, void *buf)
+{
+ return rmi_write_block(hdev, addr, buf, 1);
+}
+
static void rmi_f11_process_touch(struct rmi_data *hdata, int slot,
u8 finger_state, u8 *touch_data)
{
u16 page_base = page << 8;
switch (pdt_entry->function_number) {
+ case 0x01:
+ f = &data->f01;
+ break;
case 0x11:
f = &data->f11;
break;
return retval;
}
+#define RMI_DEVICE_F01_BASIC_QUERY_LEN 11
+
+static int rmi_populate_f01(struct hid_device *hdev)
+{
+ struct rmi_data *data = hid_get_drvdata(hdev);
+ u8 basic_queries[RMI_DEVICE_F01_BASIC_QUERY_LEN];
+ u8 info[3];
+ int ret;
+ bool has_query42;
+ bool has_lts;
+ bool has_sensor_id;
+ bool has_ds4_queries = false;
+ bool has_build_id_query = false;
+ bool has_package_id_query = false;
+ u16 query_offset = data->f01.query_base_addr;
+ u16 prod_info_addr;
+ u8 ds4_query_len;
+
+ ret = rmi_read_block(hdev, query_offset, basic_queries,
+ RMI_DEVICE_F01_BASIC_QUERY_LEN);
+ if (ret) {
+ hid_err(hdev, "Can not read basic queries from Function 0x1.\n");
+ return ret;
+ }
+
+ has_lts = !!(basic_queries[0] & BIT(2));
+ has_sensor_id = !!(basic_queries[1] & BIT(3));
+ has_query42 = !!(basic_queries[1] & BIT(7));
+
+ query_offset += 11;
+ prod_info_addr = query_offset + 6;
+ query_offset += 10;
+
+ if (has_lts)
+ query_offset += 20;
+
+ if (has_sensor_id)
+ query_offset++;
+
+ if (has_query42) {
+ ret = rmi_read(hdev, query_offset, info);
+ if (ret) {
+ hid_err(hdev, "Can not read query42.\n");
+ return ret;
+ }
+ has_ds4_queries = !!(info[0] & BIT(0));
+ query_offset++;
+ }
+
+ if (has_ds4_queries) {
+ ret = rmi_read(hdev, query_offset, &ds4_query_len);
+ if (ret) {
+ hid_err(hdev, "Can not read DS4 Query length.\n");
+ return ret;
+ }
+ query_offset++;
+
+ if (ds4_query_len > 0) {
+ ret = rmi_read(hdev, query_offset, info);
+ if (ret) {
+ hid_err(hdev, "Can not read DS4 query.\n");
+ return ret;
+ }
+
+ has_package_id_query = !!(info[0] & BIT(0));
+ has_build_id_query = !!(info[0] & BIT(1));
+ }
+ }
+
+ if (has_package_id_query)
+ prod_info_addr++;
+
+ if (has_build_id_query) {
+ ret = rmi_read_block(hdev, prod_info_addr, info, 3);
+ if (ret) {
+ hid_err(hdev, "Can not read product info.\n");
+ return ret;
+ }
+
+ data->firmware_id = info[1] << 8 | info[0];
+ data->firmware_id += info[2] * 65536;
+ }
+
+ return 0;
+}
+
static int rmi_populate_f11(struct hid_device *hdev)
{
struct rmi_data *data = hid_get_drvdata(hdev);
bool has_gestures;
bool has_rel;
bool has_data40 = false;
+ bool has_dribble = false;
+ bool has_palm_detect = false;
unsigned x_size, y_size;
u16 query_offset;
has_rel = !!(buf[0] & BIT(3));
has_gestures = !!(buf[0] & BIT(5));
+ ret = rmi_read(hdev, data->f11.query_base_addr + 5, buf);
+ if (ret) {
+ hid_err(hdev, "can not get absolute data sources: %d.\n", ret);
+ return ret;
+ }
+
+ has_dribble = !!(buf[0] & BIT(4));
+
/*
* At least 4 queries are guaranteed to be present in F11
* +1 for query 5 which is present since absolute events are
ret);
return ret;
}
+ has_palm_detect = !!(buf[0] & BIT(0));
has_query10 = !!(buf[0] & BIT(2));
query_offset += 2; /* query 7 and 8 are present */
* retrieve the ctrl registers
* the ctrl register has a size of 20 but a fw bug split it into 16 + 4,
* and there is no way to know if the first 20 bytes are here or not.
- * We use only the first 10 bytes, so get only them.
+ * We use only the first 12 bytes, so get only them.
*/
- ret = rmi_read_block(hdev, data->f11.control_base_addr, buf, 10);
+ ret = rmi_read_block(hdev, data->f11.control_base_addr, buf, 12);
if (ret) {
- hid_err(hdev, "can not read ctrl block of size 10: %d.\n", ret);
+ hid_err(hdev, "can not read ctrl block of size 11: %d.\n", ret);
return ret;
}
data->max_x = buf[6] | (buf[7] << 8);
data->max_y = buf[8] | (buf[9] << 8);
+ if (has_dribble) {
+ buf[0] = buf[0] & ~BIT(6);
+ ret = rmi_write(hdev, data->f11.control_base_addr, buf);
+ if (ret) {
+ hid_err(hdev, "can not write to control reg 0: %d.\n",
+ ret);
+ return ret;
+ }
+ }
+
+ if (has_palm_detect) {
+ buf[11] = buf[11] & ~BIT(0);
+ ret = rmi_write(hdev, data->f11.control_base_addr + 11,
+ &buf[11]);
+ if (ret) {
+ hid_err(hdev, "can not write to control reg 11: %d.\n",
+ ret);
+ return ret;
+ }
+ }
+
return 0;
}
return ret;
}
+ ret = rmi_populate_f01(hdev);
+ if (ret) {
+ hid_err(hdev, "Error while initializing F01 (%d).\n", ret);
+ return ret;
+ }
+
ret = rmi_populate_f11(hdev);
if (ret) {
hid_err(hdev, "Error while initializing F11 (%d).\n", ret);
if (ret)
goto exit;
+ hid_info(hdev, "firmware id: %ld\n", data->firmware_id);
+
__set_bit(EV_ABS, input->evbit);
input_set_abs_params(input, ABS_MT_POSITION_X, 1, data->max_x, 0, 0);
input_set_abs_params(input, ABS_MT_POSITION_Y, 1, data->max_y, 0, 0);
--- /dev/null
+/*
+ * hid-sensor-custom.c
+ * Copyright (c) 2015, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/miscdevice.h>
+#include <linux/kfifo.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
+#include <linux/poll.h>
+#include <linux/bsearch.h>
+#include <linux/platform_device.h>
+#include <linux/hid-sensor-hub.h>
+
+#define HID_CUSTOM_NAME_LENGTH 64
+#define HID_CUSTOM_MAX_CORE_ATTRS 10
+#define HID_CUSTOM_TOTAL_ATTRS (HID_CUSTOM_MAX_CORE_ATTRS + 1)
+#define HID_CUSTOM_FIFO_SIZE 4096
+#define HID_CUSTOM_MAX_FEATURE_BYTES 64
+
+struct hid_sensor_custom_field {
+ int report_id;
+ char group_name[HID_CUSTOM_NAME_LENGTH];
+ struct hid_sensor_hub_attribute_info attribute;
+ struct device_attribute sd_attrs[HID_CUSTOM_MAX_CORE_ATTRS];
+ char attr_name[HID_CUSTOM_TOTAL_ATTRS][HID_CUSTOM_NAME_LENGTH];
+ struct attribute *attrs[HID_CUSTOM_TOTAL_ATTRS];
+ struct attribute_group hid_custom_attribute_group;
+};
+
+struct hid_sensor_custom {
+ struct mutex mutex;
+ struct platform_device *pdev;
+ struct hid_sensor_hub_device *hsdev;
+ struct hid_sensor_hub_callbacks callbacks;
+ int sensor_field_count;
+ struct hid_sensor_custom_field *fields;
+ int input_field_count;
+ int input_report_size;
+ int input_report_recd_size;
+ bool input_skip_sample;
+ bool enable;
+ struct hid_sensor_custom_field *power_state;
+ struct hid_sensor_custom_field *report_state;
+ struct miscdevice custom_dev;
+ struct kfifo data_fifo;
+ unsigned long misc_opened;
+ wait_queue_head_t wait;
+};
+
+/* Header for each sample to user space via dev interface */
+struct hid_sensor_sample {
+ u32 usage_id;
+ u64 timestamp;
+ u32 raw_len;
+} __packed;
+
+static struct attribute hid_custom_attrs[] = {
+ {.name = "name", .mode = S_IRUGO},
+ {.name = "units", .mode = S_IRUGO},
+ {.name = "unit-expo", .mode = S_IRUGO},
+ {.name = "minimum", .mode = S_IRUGO},
+ {.name = "maximum", .mode = S_IRUGO},
+ {.name = "size", .mode = S_IRUGO},
+ {.name = "value", .mode = S_IWUSR | S_IRUGO},
+ {.name = NULL}
+};
+
+static const struct hid_custom_usage_desc {
+ int usage_id;
+ char *desc;
+} hid_custom_usage_desc_table[] = {
+ {0x200201, "event-sensor-state"},
+ {0x200202, "event-sensor-event"},
+ {0x200301, "property-friendly-name"},
+ {0x200302, "property-persistent-unique-id"},
+ {0x200303, "property-sensor-status"},
+ {0x200304, "property-min-report-interval"},
+ {0x200305, "property-sensor-manufacturer"},
+ {0x200306, "property-sensor-model"},
+ {0x200307, "property-sensor-serial-number"},
+ {0x200308, "property-sensor-description"},
+ {0x200309, "property-sensor-connection-type"},
+ {0x20030A, "property-sensor-device-path"},
+ {0x20030B, "property-hardware-revision"},
+ {0x20030C, "property-firmware-version"},
+ {0x20030D, "property-release-date"},
+ {0x20030E, "property-report-interval"},
+ {0x20030F, "property-change-sensitivity-absolute"},
+ {0x200310, "property-change-sensitivity-percent-range"},
+ {0x200311, "property-change-sensitivity-percent-relative"},
+ {0x200312, "property-accuracy"},
+ {0x200313, "property-resolution"},
+ {0x200314, "property-maximum"},
+ {0x200315, "property-minimum"},
+ {0x200316, "property-reporting-state"},
+ {0x200317, "property-sampling-rate"},
+ {0x200318, "property-response-curve"},
+ {0x200319, "property-power-state"},
+ {0x200540, "data-field-custom"},
+ {0x200541, "data-field-custom-usage"},
+ {0x200542, "data-field-custom-boolean-array"},
+ {0x200543, "data-field-custom-value"},
+ {0x200544, "data-field-custom-value_1"},
+ {0x200545, "data-field-custom-value_2"},
+ {0x200546, "data-field-custom-value_3"},
+ {0x200547, "data-field-custom-value_4"},
+ {0x200548, "data-field-custom-value_5"},
+ {0x200549, "data-field-custom-value_6"},
+ {0x20054A, "data-field-custom-value_7"},
+ {0x20054B, "data-field-custom-value_8"},
+ {0x20054C, "data-field-custom-value_9"},
+ {0x20054D, "data-field-custom-value_10"},
+ {0x20054E, "data-field-custom-value_11"},
+ {0x20054F, "data-field-custom-value_12"},
+ {0x200550, "data-field-custom-value_13"},
+ {0x200551, "data-field-custom-value_14"},
+ {0x200552, "data-field-custom-value_15"},
+ {0x200553, "data-field-custom-value_16"},
+ {0x200554, "data-field-custom-value_17"},
+ {0x200555, "data-field-custom-value_18"},
+ {0x200556, "data-field-custom-value_19"},
+ {0x200557, "data-field-custom-value_20"},
+ {0x200558, "data-field-custom-value_21"},
+ {0x200559, "data-field-custom-value_22"},
+ {0x20055A, "data-field-custom-value_23"},
+ {0x20055B, "data-field-custom-value_24"},
+ {0x20055C, "data-field-custom-value_25"},
+ {0x20055D, "data-field-custom-value_26"},
+ {0x20055E, "data-field-custom-value_27"},
+ {0x20055F, "data-field-custom-value_28"},
+};
+
+static int usage_id_cmp(const void *p1, const void *p2)
+{
+ if (*(int *)p1 < *(int *)p2)
+ return -1;
+
+ if (*(int *)p1 > *(int *)p2)
+ return 1;
+
+ return 0;
+}
+
+static ssize_t enable_sensor_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct hid_sensor_custom *sensor_inst = platform_get_drvdata(pdev);
+
+ return sprintf(buf, "%d\n", sensor_inst->enable);
+}
+
+static int set_power_report_state(struct hid_sensor_custom *sensor_inst,
+ bool state)
+{
+ int power_val = -1;
+ int report_val = -1;
+ u32 power_state_usage_id;
+ u32 report_state_usage_id;
+ int ret;
+
+ /*
+ * It is possible that the power/report state ids are not present.
+ * In this case this function will return success. But if the
+ * ids are present, then it will return error if set fails.
+ */
+ if (state) {
+ power_state_usage_id =
+ HID_USAGE_SENSOR_PROP_POWER_STATE_D0_FULL_POWER_ENUM;
+ report_state_usage_id =
+ HID_USAGE_SENSOR_PROP_REPORTING_STATE_ALL_EVENTS_ENUM;
+ } else {
+ power_state_usage_id =
+ HID_USAGE_SENSOR_PROP_POWER_STATE_D4_POWER_OFF_ENUM;
+ report_state_usage_id =
+ HID_USAGE_SENSOR_PROP_REPORTING_STATE_NO_EVENTS_ENUM;
+ }
+
+ if (sensor_inst->power_state)
+ power_val = hid_sensor_get_usage_index(sensor_inst->hsdev,
+ sensor_inst->power_state->attribute.report_id,
+ sensor_inst->power_state->attribute.index,
+ power_state_usage_id);
+ if (sensor_inst->report_state)
+ report_val = hid_sensor_get_usage_index(sensor_inst->hsdev,
+ sensor_inst->report_state->attribute.report_id,
+ sensor_inst->report_state->attribute.index,
+ report_state_usage_id);
+
+ if (power_val >= 0) {
+ power_val +=
+ sensor_inst->power_state->attribute.logical_minimum;
+ ret = sensor_hub_set_feature(sensor_inst->hsdev,
+ sensor_inst->power_state->attribute.report_id,
+ sensor_inst->power_state->attribute.index,
+ sizeof(power_val),
+ &power_val);
+ if (ret) {
+ hid_err(sensor_inst->hsdev->hdev,
+ "Set power state failed\n");
+ return ret;
+ }
+ }
+
+ if (report_val >= 0) {
+ report_val +=
+ sensor_inst->report_state->attribute.logical_minimum;
+ ret = sensor_hub_set_feature(sensor_inst->hsdev,
+ sensor_inst->report_state->attribute.report_id,
+ sensor_inst->report_state->attribute.index,
+ sizeof(report_val),
+ &report_val);
+ if (ret) {
+ hid_err(sensor_inst->hsdev->hdev,
+ "Set report state failed\n");
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static ssize_t enable_sensor_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct hid_sensor_custom *sensor_inst = platform_get_drvdata(pdev);
+ int value;
+ int ret = -EINVAL;
+
+ if (kstrtoint(buf, 0, &value) != 0)
+ return -EINVAL;
+
+ mutex_lock(&sensor_inst->mutex);
+ if (value && !sensor_inst->enable) {
+ ret = sensor_hub_device_open(sensor_inst->hsdev);
+ if (ret)
+ goto unlock_state;
+
+ ret = set_power_report_state(sensor_inst, true);
+ if (ret) {
+ sensor_hub_device_close(sensor_inst->hsdev);
+ goto unlock_state;
+ }
+ sensor_inst->enable = true;
+ } else if (!value && sensor_inst->enable) {
+ ret = set_power_report_state(sensor_inst, false);
+ sensor_hub_device_close(sensor_inst->hsdev);
+ sensor_inst->enable = false;
+ }
+unlock_state:
+ mutex_unlock(&sensor_inst->mutex);
+ if (ret < 0)
+ return ret;
+
+ return count;
+}
+static DEVICE_ATTR_RW(enable_sensor);
+
+static struct attribute *enable_sensor_attrs[] = {
+ &dev_attr_enable_sensor.attr,
+ NULL,
+};
+
+static struct attribute_group enable_sensor_attr_group = {
+ .attrs = enable_sensor_attrs,
+};
+
+static ssize_t show_value(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct hid_sensor_custom *sensor_inst = platform_get_drvdata(pdev);
+ struct hid_sensor_hub_attribute_info *attribute;
+ int index, usage, field_index;
+ char name[HID_CUSTOM_NAME_LENGTH];
+ bool feature = false;
+ bool input = false;
+ int value = 0;
+
+ if (sscanf(attr->attr.name, "feature-%d-%x-%s", &index, &usage,
+ name) == 3) {
+ feature = true;
+ field_index = index + sensor_inst->input_field_count;
+ } else if (sscanf(attr->attr.name, "input-%d-%x-%s", &index, &usage,
+ name) == 3) {
+ input = true;
+ field_index = index;
+ } else
+ return -EINVAL;
+
+ if (!strncmp(name, "value", strlen("value"))) {
+ u32 report_id;
+ int ret;
+
+ attribute = &sensor_inst->fields[field_index].attribute;
+ report_id = attribute->report_id;
+ if (feature) {
+ u8 values[HID_CUSTOM_MAX_FEATURE_BYTES];
+ int len = 0;
+ u64 value = 0;
+ int i = 0;
+
+ ret = sensor_hub_get_feature(sensor_inst->hsdev,
+ report_id,
+ index,
+ sizeof(values), values);
+ if (ret < 0)
+ return ret;
+
+ while (i < ret) {
+ if (i + attribute->size > ret) {
+ len += snprintf(&buf[len],
+ PAGE_SIZE - len,
+ "%d ", values[i]);
+ break;
+ }
+ switch (attribute->size) {
+ case 2:
+ value = (u64) *(u16 *)&values[i];
+ i += attribute->size;
+ break;
+ case 4:
+ value = (u64) *(u32 *)&values[i];
+ i += attribute->size;
+ break;
+ case 8:
+ value = *(u64 *)&values[i];
+ i += attribute->size;
+ break;
+ default:
+ value = (u64) values[i];
+ ++i;
+ break;
+ }
+ len += snprintf(&buf[len], PAGE_SIZE - len,
+ "%lld ", value);
+ }
+ len += snprintf(&buf[len], PAGE_SIZE - len, "\n");
+
+ return len;
+ } else if (input)
+ value = sensor_hub_input_attr_get_raw_value(
+ sensor_inst->hsdev,
+ sensor_inst->hsdev->usage,
+ usage, report_id,
+ SENSOR_HUB_SYNC);
+ } else if (!strncmp(name, "units", strlen("units")))
+ value = sensor_inst->fields[field_index].attribute.units;
+ else if (!strncmp(name, "unit-expo", strlen("unit-expo")))
+ value = sensor_inst->fields[field_index].attribute.unit_expo;
+ else if (!strncmp(name, "size", strlen("size")))
+ value = sensor_inst->fields[field_index].attribute.size;
+ else if (!strncmp(name, "minimum", strlen("minimum")))
+ value = sensor_inst->fields[field_index].attribute.
+ logical_minimum;
+ else if (!strncmp(name, "maximum", strlen("maximum")))
+ value = sensor_inst->fields[field_index].attribute.
+ logical_maximum;
+ else if (!strncmp(name, "name", strlen("name"))) {
+ struct hid_custom_usage_desc *usage_desc;
+
+ usage_desc = bsearch(&usage, hid_custom_usage_desc_table,
+ ARRAY_SIZE(hid_custom_usage_desc_table),
+ sizeof(struct hid_custom_usage_desc),
+ usage_id_cmp);
+ if (usage_desc)
+ return snprintf(buf, PAGE_SIZE, "%s\n",
+ usage_desc->desc);
+ else
+ return sprintf(buf, "not-specified\n");
+ } else
+ return -EINVAL;
+
+ return sprintf(buf, "%d\n", value);
+}
+
+static ssize_t store_value(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct hid_sensor_custom *sensor_inst = platform_get_drvdata(pdev);
+ int index, field_index, usage;
+ char name[HID_CUSTOM_NAME_LENGTH];
+ int value;
+
+ if (sscanf(attr->attr.name, "feature-%d-%x-%s", &index, &usage,
+ name) == 3) {
+ field_index = index + sensor_inst->input_field_count;
+ } else
+ return -EINVAL;
+
+ if (!strncmp(name, "value", strlen("value"))) {
+ u32 report_id;
+ int ret;
+
+ if (kstrtoint(buf, 0, &value) != 0)
+ return -EINVAL;
+
+ report_id = sensor_inst->fields[field_index].attribute.
+ report_id;
+ ret = sensor_hub_set_feature(sensor_inst->hsdev, report_id,
+ index, sizeof(value), &value);
+ } else
+ return -EINVAL;
+
+ return count;
+}
+
+static int hid_sensor_capture_sample(struct hid_sensor_hub_device *hsdev,
+ unsigned usage_id, size_t raw_len,
+ char *raw_data, void *priv)
+{
+ struct hid_sensor_custom *sensor_inst = platform_get_drvdata(priv);
+ struct hid_sensor_sample header;
+
+ /* If any error occurs in a sample, rest of the fields are ignored */
+ if (sensor_inst->input_skip_sample) {
+ hid_err(sensor_inst->hsdev->hdev, "Skipped remaining data\n");
+ return 0;
+ }
+
+ hid_dbg(sensor_inst->hsdev->hdev, "%s received %d of %d\n", __func__,
+ (int) (sensor_inst->input_report_recd_size + raw_len),
+ sensor_inst->input_report_size);
+
+ if (!test_bit(0, &sensor_inst->misc_opened))
+ return 0;
+
+ if (!sensor_inst->input_report_recd_size) {
+ int required_size = sizeof(struct hid_sensor_sample) +
+ sensor_inst->input_report_size;
+ header.usage_id = hsdev->usage;
+ header.raw_len = sensor_inst->input_report_size;
+ header.timestamp = ktime_get_real_ns();
+ if (kfifo_avail(&sensor_inst->data_fifo) >= required_size) {
+ kfifo_in(&sensor_inst->data_fifo,
+ (unsigned char *)&header,
+ sizeof(header));
+ } else
+ sensor_inst->input_skip_sample = true;
+ }
+ if (kfifo_avail(&sensor_inst->data_fifo) >= raw_len)
+ kfifo_in(&sensor_inst->data_fifo, (unsigned char *)raw_data,
+ raw_len);
+
+ sensor_inst->input_report_recd_size += raw_len;
+
+ return 0;
+}
+
+static int hid_sensor_send_event(struct hid_sensor_hub_device *hsdev,
+ unsigned usage_id, void *priv)
+{
+ struct hid_sensor_custom *sensor_inst = platform_get_drvdata(priv);
+
+ if (!test_bit(0, &sensor_inst->misc_opened))
+ return 0;
+
+ sensor_inst->input_report_recd_size = 0;
+ sensor_inst->input_skip_sample = false;
+
+ wake_up(&sensor_inst->wait);
+
+ return 0;
+}
+
+static int hid_sensor_custom_add_field(struct hid_sensor_custom *sensor_inst,
+ int index, int report_type,
+ struct hid_report *report,
+ struct hid_field *field)
+{
+ struct hid_sensor_custom_field *sensor_field;
+ void *fields;
+
+ fields = krealloc(sensor_inst->fields,
+ (sensor_inst->sensor_field_count + 1) *
+ sizeof(struct hid_sensor_custom_field), GFP_KERNEL);
+ if (!fields) {
+ kfree(sensor_inst->fields);
+ return -ENOMEM;
+ }
+ sensor_inst->fields = fields;
+ sensor_field = &sensor_inst->fields[sensor_inst->sensor_field_count];
+ sensor_field->attribute.usage_id = sensor_inst->hsdev->usage;
+ if (field->logical)
+ sensor_field->attribute.attrib_id = field->logical;
+ else
+ sensor_field->attribute.attrib_id = field->usage[0].hid;
+
+ sensor_field->attribute.index = index;
+ sensor_field->attribute.report_id = report->id;
+ sensor_field->attribute.units = field->unit;
+ sensor_field->attribute.unit_expo = field->unit_exponent;
+ sensor_field->attribute.size = (field->report_size / 8);
+ sensor_field->attribute.logical_minimum = field->logical_minimum;
+ sensor_field->attribute.logical_maximum = field->logical_maximum;
+
+ if (report_type == HID_FEATURE_REPORT)
+ snprintf(sensor_field->group_name,
+ sizeof(sensor_field->group_name), "feature-%x-%x",
+ sensor_field->attribute.index,
+ sensor_field->attribute.attrib_id);
+ else if (report_type == HID_INPUT_REPORT) {
+ snprintf(sensor_field->group_name,
+ sizeof(sensor_field->group_name),
+ "input-%x-%x", sensor_field->attribute.index,
+ sensor_field->attribute.attrib_id);
+ sensor_inst->input_field_count++;
+ sensor_inst->input_report_size += (field->report_size *
+ field->report_count) / 8;
+ }
+
+ memset(&sensor_field->hid_custom_attribute_group, 0,
+ sizeof(struct attribute_group));
+ sensor_inst->sensor_field_count++;
+
+ return 0;
+}
+
+static int hid_sensor_custom_add_fields(struct hid_sensor_custom *sensor_inst,
+ struct hid_report_enum *report_enum,
+ int report_type)
+{
+ int i;
+ int ret;
+ struct hid_report *report;
+ struct hid_field *field;
+ struct hid_sensor_hub_device *hsdev = sensor_inst->hsdev;
+
+ list_for_each_entry(report, &report_enum->report_list, list) {
+ for (i = 0; i < report->maxfield; ++i) {
+ field = report->field[i];
+ if (field->maxusage &&
+ ((field->usage[0].collection_index >=
+ hsdev->start_collection_index) &&
+ (field->usage[0].collection_index <
+ hsdev->end_collection_index))) {
+
+ ret = hid_sensor_custom_add_field(sensor_inst,
+ i,
+ report_type,
+ report,
+ field);
+ if (ret)
+ return ret;
+
+ }
+ }
+ }
+
+ return 0;
+}
+
+static int hid_sensor_custom_add_attributes(struct hid_sensor_custom
+ *sensor_inst)
+{
+ struct hid_sensor_hub_device *hsdev = sensor_inst->hsdev;
+ struct hid_device *hdev = hsdev->hdev;
+ int ret = -1;
+ int i, j;
+
+ for (j = 0; j < HID_REPORT_TYPES; ++j) {
+ if (j == HID_OUTPUT_REPORT)
+ continue;
+
+ ret = hid_sensor_custom_add_fields(sensor_inst,
+ &hdev->report_enum[j], j);
+ if (ret)
+ return ret;
+
+ }
+
+ /* Create sysfs attributes */
+ for (i = 0; i < sensor_inst->sensor_field_count; ++i) {
+ j = 0;
+ while (j < HID_CUSTOM_TOTAL_ATTRS &&
+ hid_custom_attrs[j].name) {
+ struct device_attribute *device_attr;
+
+ device_attr = &sensor_inst->fields[i].sd_attrs[j];
+
+ snprintf((char *)&sensor_inst->fields[i].attr_name[j],
+ HID_CUSTOM_NAME_LENGTH, "%s-%s",
+ sensor_inst->fields[i].group_name,
+ hid_custom_attrs[j].name);
+ sysfs_attr_init(&device_attr->attr);
+ device_attr->attr.name =
+ (char *)&sensor_inst->fields[i].attr_name[j];
+ device_attr->attr.mode = hid_custom_attrs[j].mode;
+ device_attr->show = show_value;
+ if (hid_custom_attrs[j].mode & S_IWUSR)
+ device_attr->store = store_value;
+ sensor_inst->fields[i].attrs[j] = &device_attr->attr;
+ ++j;
+ }
+ sensor_inst->fields[i].attrs[j] = NULL;
+ sensor_inst->fields[i].hid_custom_attribute_group.attrs =
+ sensor_inst->fields[i].attrs;
+ sensor_inst->fields[i].hid_custom_attribute_group.name =
+ sensor_inst->fields[i].group_name;
+ ret = sysfs_create_group(&sensor_inst->pdev->dev.kobj,
+ &sensor_inst->fields[i].
+ hid_custom_attribute_group);
+ if (ret)
+ break;
+
+ /* For power or report field store indexes */
+ if (sensor_inst->fields[i].attribute.attrib_id ==
+ HID_USAGE_SENSOR_PROY_POWER_STATE)
+ sensor_inst->power_state = &sensor_inst->fields[i];
+ else if (sensor_inst->fields[i].attribute.attrib_id ==
+ HID_USAGE_SENSOR_PROP_REPORT_STATE)
+ sensor_inst->report_state = &sensor_inst->fields[i];
+ }
+
+ return ret;
+}
+
+static void hid_sensor_custom_remove_attributes(struct hid_sensor_custom *
+ sensor_inst)
+{
+ int i;
+
+ for (i = 0; i < sensor_inst->sensor_field_count; ++i)
+ sysfs_remove_group(&sensor_inst->pdev->dev.kobj,
+ &sensor_inst->fields[i].
+ hid_custom_attribute_group);
+
+ kfree(sensor_inst->fields);
+}
+
+static ssize_t hid_sensor_custom_read(struct file *file, char __user *buf,
+ size_t count, loff_t *f_ps)
+{
+ struct hid_sensor_custom *sensor_inst;
+ unsigned int copied;
+ int ret;
+
+ sensor_inst = container_of(file->private_data,
+ struct hid_sensor_custom, custom_dev);
+
+ if (count < sizeof(struct hid_sensor_sample))
+ return -EINVAL;
+
+ do {
+ if (kfifo_is_empty(&sensor_inst->data_fifo)) {
+ if (file->f_flags & O_NONBLOCK)
+ return -EAGAIN;
+
+ ret = wait_event_interruptible(sensor_inst->wait,
+ !kfifo_is_empty(&sensor_inst->data_fifo));
+ if (ret)
+ return ret;
+ }
+ ret = kfifo_to_user(&sensor_inst->data_fifo, buf, count,
+ &copied);
+ if (ret)
+ return ret;
+
+ } while (copied == 0);
+
+ return copied;
+}
+
+static int hid_sensor_custom_release(struct inode *inode, struct file *file)
+{
+ struct hid_sensor_custom *sensor_inst;
+
+ sensor_inst = container_of(file->private_data,
+ struct hid_sensor_custom, custom_dev);
+
+ clear_bit(0, &sensor_inst->misc_opened);
+
+ return 0;
+}
+
+static int hid_sensor_custom_open(struct inode *inode, struct file *file)
+{
+ struct hid_sensor_custom *sensor_inst;
+
+ sensor_inst = container_of(file->private_data,
+ struct hid_sensor_custom, custom_dev);
+ /* We essentially have single reader and writer */
+ if (test_and_set_bit(0, &sensor_inst->misc_opened))
+ return -EBUSY;
+
+ return nonseekable_open(inode, file);
+}
+
+static unsigned int hid_sensor_custom_poll(struct file *file,
+ struct poll_table_struct *wait)
+{
+ struct hid_sensor_custom *sensor_inst;
+ unsigned int mask = 0;
+
+ sensor_inst = container_of(file->private_data,
+ struct hid_sensor_custom, custom_dev);
+
+ poll_wait(file, &sensor_inst->wait, wait);
+
+ if (!kfifo_is_empty(&sensor_inst->data_fifo))
+ mask = POLLIN | POLLRDNORM;
+
+ return mask;
+}
+
+static const struct file_operations hid_sensor_custom_fops = {
+ .open = hid_sensor_custom_open,
+ .read = hid_sensor_custom_read,
+ .release = hid_sensor_custom_release,
+ .poll = hid_sensor_custom_poll,
+ .llseek = noop_llseek,
+};
+
+static int hid_sensor_custom_dev_if_add(struct hid_sensor_custom *sensor_inst)
+{
+ int ret;
+
+ ret = kfifo_alloc(&sensor_inst->data_fifo, HID_CUSTOM_FIFO_SIZE,
+ GFP_KERNEL);
+ if (ret)
+ return ret;
+
+ init_waitqueue_head(&sensor_inst->wait);
+
+ sensor_inst->custom_dev.minor = MISC_DYNAMIC_MINOR;
+ sensor_inst->custom_dev.name = dev_name(&sensor_inst->pdev->dev);
+ sensor_inst->custom_dev.fops = &hid_sensor_custom_fops,
+ ret = misc_register(&sensor_inst->custom_dev);
+ if (ret) {
+ kfifo_free(&sensor_inst->data_fifo);
+ return ret;
+ }
+ return 0;
+}
+
+static void hid_sensor_custom_dev_if_remove(struct hid_sensor_custom
+ *sensor_inst)
+{
+ wake_up(&sensor_inst->wait);
+ misc_deregister(&sensor_inst->custom_dev);
+ kfifo_free(&sensor_inst->data_fifo);
+
+}
+
+static int hid_sensor_custom_probe(struct platform_device *pdev)
+{
+ struct hid_sensor_custom *sensor_inst;
+ struct hid_sensor_hub_device *hsdev = pdev->dev.platform_data;
+ int ret;
+
+ sensor_inst = devm_kzalloc(&pdev->dev, sizeof(*sensor_inst),
+ GFP_KERNEL);
+ if (!sensor_inst)
+ return -ENOMEM;
+
+ sensor_inst->callbacks.capture_sample = hid_sensor_capture_sample;
+ sensor_inst->callbacks.send_event = hid_sensor_send_event;
+ sensor_inst->callbacks.pdev = pdev;
+ sensor_inst->hsdev = hsdev;
+ sensor_inst->pdev = pdev;
+ mutex_init(&sensor_inst->mutex);
+ platform_set_drvdata(pdev, sensor_inst);
+ ret = sensor_hub_register_callback(hsdev, hsdev->usage,
+ &sensor_inst->callbacks);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "callback reg failed\n");
+ return ret;
+ }
+
+ ret = sysfs_create_group(&sensor_inst->pdev->dev.kobj,
+ &enable_sensor_attr_group);
+ if (ret)
+ goto err_remove_callback;
+
+ ret = hid_sensor_custom_add_attributes(sensor_inst);
+ if (ret)
+ goto err_remove_group;
+
+ ret = hid_sensor_custom_dev_if_add(sensor_inst);
+ if (ret)
+ goto err_remove_attributes;
+
+ return 0;
+
+err_remove_attributes:
+ hid_sensor_custom_remove_attributes(sensor_inst);
+err_remove_group:
+ sysfs_remove_group(&sensor_inst->pdev->dev.kobj,
+ &enable_sensor_attr_group);
+err_remove_callback:
+ sensor_hub_remove_callback(hsdev, hsdev->usage);
+
+ return ret;
+}
+
+static int hid_sensor_custom_remove(struct platform_device *pdev)
+{
+ struct hid_sensor_custom *sensor_inst = platform_get_drvdata(pdev);
+ struct hid_sensor_hub_device *hsdev = pdev->dev.platform_data;
+
+ hid_sensor_custom_dev_if_remove(sensor_inst);
+ hid_sensor_custom_remove_attributes(sensor_inst);
+ sysfs_remove_group(&sensor_inst->pdev->dev.kobj,
+ &enable_sensor_attr_group);
+ sensor_hub_remove_callback(hsdev, hsdev->usage);
+
+ return 0;
+}
+
+static struct platform_device_id hid_sensor_custom_ids[] = {
+ {
+ .name = "HID-SENSOR-2000e1",
+ },
+ {
+ .name = "HID-SENSOR-2000e2",
+ },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(platform, hid_sensor_custom_ids);
+
+static struct platform_driver hid_sensor_custom_platform_driver = {
+ .id_table = hid_sensor_custom_ids,
+ .driver = {
+ .name = KBUILD_MODNAME,
+ },
+ .probe = hid_sensor_custom_probe,
+ .remove = hid_sensor_custom_remove,
+};
+module_platform_driver(hid_sensor_custom_platform_driver);
+
+MODULE_DESCRIPTION("HID Sensor Custom and Generic sensor Driver");
+MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
+MODULE_LICENSE("GPL");
#define HID_SENSOR_HUB_ENUM_QUIRK 0x01
-/**
- * struct sensor_hub_pending - Synchronous read pending information
- * @status: Pending status true/false.
- * @ready: Completion synchronization data.
- * @usage_id: Usage id for physical device, E.g. Gyro usage id.
- * @attr_usage_id: Usage Id of a field, E.g. X-AXIS for a gyro.
- * @raw_size: Response size for a read request.
- * @raw_data: Place holder for received response.
- */
-struct sensor_hub_pending {
- bool status;
- struct completion ready;
- u32 usage_id;
- u32 attr_usage_id;
- int raw_size;
- u8 *raw_data;
-};
-
/**
* struct sensor_hub_data - Hold a instance data for a HID hub device
* @hsdev: Stored hid instance for current hub device.
* @mutex: Mutex to serialize synchronous request.
* @lock: Spin lock to protect pending request structure.
- * @pending: Holds information of pending sync read request.
* @dyn_callback_list: Holds callback function
* @dyn_callback_lock: spin lock to protect callback list
* @hid_sensor_hub_client_devs: Stores all MFD cells for a hub instance.
struct sensor_hub_data {
struct mutex mutex;
spinlock_t lock;
- struct sensor_hub_pending pending;
struct list_head dyn_callback_list;
spinlock_t dyn_callback_lock;
struct mfd_cell *hid_sensor_hub_client_devs;
for (i = 0; i < hdev->maxcollection; ++i) {
struct hid_collection *collection = &hdev->collection[i];
- if (collection->type == HID_COLLECTION_PHYSICAL)
+ if (collection->type == HID_COLLECTION_PHYSICAL ||
+ collection->type == HID_COLLECTION_APPLICATION)
++count;
}
spin_lock_irqsave(&pdata->dyn_callback_lock, flags);
list_for_each_entry(callback, &pdata->dyn_callback_list, list)
- if (callback->usage_id == usage_id &&
+ if ((callback->usage_id == usage_id ||
+ callback->usage_id == HID_USAGE_SENSOR_COLLECTION) &&
(collection_index >=
callback->hsdev->start_collection_index) &&
(collection_index <
callback->usage_callback = usage_callback;
callback->usage_id = usage_id;
callback->priv = NULL;
- list_add_tail(&callback->list, &pdata->dyn_callback_list);
+ /*
+ * If there is a handler registered for the collection type, then
+ * it will handle all reports for sensors in this collection. If
+ * there is also an individual sensor handler registration, then
+ * we want to make sure that the reports are directed to collection
+ * handler, as this may be a fusion sensor. So add collection handlers
+ * to the beginning of the list, so that they are matched first.
+ */
+ if (usage_id == HID_USAGE_SENSOR_COLLECTION)
+ list_add(&callback->list, &pdata->dyn_callback_list);
+ else
+ list_add_tail(&callback->list, &pdata->dyn_callback_list);
spin_unlock_irqrestore(&pdata->dyn_callback_lock, flags);
return 0;
EXPORT_SYMBOL_GPL(sensor_hub_remove_callback);
int sensor_hub_set_feature(struct hid_sensor_hub_device *hsdev, u32 report_id,
- u32 field_index, s32 value)
+ u32 field_index, int buffer_size, void *buffer)
{
struct hid_report *report;
struct sensor_hub_data *data = hid_get_drvdata(hsdev->hdev);
+ __s32 *buf32 = buffer;
+ int i = 0;
+ int remaining_bytes;
+ __s32 value;
int ret = 0;
mutex_lock(&data->mutex);
ret = -EINVAL;
goto done_proc;
}
- hid_set_field(report->field[field_index], 0, value);
+
+ remaining_bytes = do_div(buffer_size, sizeof(__s32));
+ if (buffer_size) {
+ for (i = 0; i < buffer_size; ++i) {
+ hid_set_field(report->field[field_index], i,
+ (__force __s32)cpu_to_le32(*buf32));
+ ++buf32;
+ }
+ }
+ if (remaining_bytes) {
+ value = 0;
+ memcpy(&value, (u8 *)buf32, remaining_bytes);
+ hid_set_field(report->field[field_index], i,
+ (__force __s32)cpu_to_le32(value));
+ }
hid_hw_request(hsdev->hdev, report, HID_REQ_SET_REPORT);
hid_hw_wait(hsdev->hdev);
EXPORT_SYMBOL_GPL(sensor_hub_set_feature);
int sensor_hub_get_feature(struct hid_sensor_hub_device *hsdev, u32 report_id,
- u32 field_index, s32 *value)
+ u32 field_index, int buffer_size, void *buffer)
{
struct hid_report *report;
struct sensor_hub_data *data = hid_get_drvdata(hsdev->hdev);
+ int report_size;
int ret = 0;
mutex_lock(&data->mutex);
}
hid_hw_request(hsdev->hdev, report, HID_REQ_GET_REPORT);
hid_hw_wait(hsdev->hdev);
- *value = report->field[field_index]->value[0];
+
+ /* calculate number of bytes required to read this field */
+ report_size = DIV_ROUND_UP(report->field[field_index]->report_size,
+ 8) *
+ report->field[field_index]->report_count;
+ if (!report_size) {
+ ret = -EINVAL;
+ goto done_proc;
+ }
+ ret = min(report_size, buffer_size);
+ memcpy(buffer, report->field[field_index]->value, ret);
done_proc:
mutex_unlock(&data->mutex);
int sensor_hub_input_attr_get_raw_value(struct hid_sensor_hub_device *hsdev,
u32 usage_id,
- u32 attr_usage_id, u32 report_id)
+ u32 attr_usage_id, u32 report_id,
+ enum sensor_hub_read_flags flag)
{
struct sensor_hub_data *data = hid_get_drvdata(hsdev->hdev);
unsigned long flags;
struct hid_report *report;
int ret_val = 0;
- mutex_lock(&data->mutex);
- memset(&data->pending, 0, sizeof(data->pending));
- init_completion(&data->pending.ready);
- data->pending.usage_id = usage_id;
- data->pending.attr_usage_id = attr_usage_id;
- data->pending.raw_size = 0;
-
- spin_lock_irqsave(&data->lock, flags);
- data->pending.status = true;
- spin_unlock_irqrestore(&data->lock, flags);
- report = sensor_hub_report(report_id, hsdev->hdev, HID_INPUT_REPORT);
+ report = sensor_hub_report(report_id, hsdev->hdev,
+ HID_INPUT_REPORT);
if (!report)
- goto err_free;
-
- hid_hw_request(hsdev->hdev, report, HID_REQ_GET_REPORT);
- wait_for_completion_interruptible_timeout(&data->pending.ready, HZ*5);
- switch (data->pending.raw_size) {
- case 1:
- ret_val = *(u8 *)data->pending.raw_data;
- break;
- case 2:
- ret_val = *(u16 *)data->pending.raw_data;
- break;
- case 4:
- ret_val = *(u32 *)data->pending.raw_data;
- break;
- default:
- ret_val = 0;
+ return -EINVAL;
+
+ mutex_lock(&hsdev->mutex);
+ if (flag == SENSOR_HUB_SYNC) {
+ memset(&hsdev->pending, 0, sizeof(hsdev->pending));
+ init_completion(&hsdev->pending.ready);
+ hsdev->pending.usage_id = usage_id;
+ hsdev->pending.attr_usage_id = attr_usage_id;
+ hsdev->pending.raw_size = 0;
+
+ spin_lock_irqsave(&data->lock, flags);
+ hsdev->pending.status = true;
+ spin_unlock_irqrestore(&data->lock, flags);
}
- kfree(data->pending.raw_data);
-
-err_free:
- data->pending.status = false;
+ mutex_lock(&data->mutex);
+ hid_hw_request(hsdev->hdev, report, HID_REQ_GET_REPORT);
mutex_unlock(&data->mutex);
+ if (flag == SENSOR_HUB_SYNC) {
+ wait_for_completion_interruptible_timeout(
+ &hsdev->pending.ready, HZ*5);
+ switch (hsdev->pending.raw_size) {
+ case 1:
+ ret_val = *(u8 *)hsdev->pending.raw_data;
+ break;
+ case 2:
+ ret_val = *(u16 *)hsdev->pending.raw_data;
+ break;
+ case 4:
+ ret_val = *(u32 *)hsdev->pending.raw_data;
+ break;
+ default:
+ ret_val = 0;
+ }
+ kfree(hsdev->pending.raw_data);
+ hsdev->pending.status = false;
+ }
+ mutex_unlock(&hsdev->mutex);
return ret_val;
}
report->field[i]->report_count)/8);
sz = (report->field[i]->report_size *
report->field[i]->report_count)/8;
- if (pdata->pending.status && pdata->pending.attr_usage_id ==
- report->field[i]->usage->hid) {
- hid_dbg(hdev, "data was pending ...\n");
- pdata->pending.raw_data = kmemdup(ptr, sz, GFP_ATOMIC);
- if (pdata->pending.raw_data)
- pdata->pending.raw_size = sz;
- else
- pdata->pending.raw_size = 0;
- complete(&pdata->pending.ready);
- }
collection = &hdev->collection[
report->field[i]->usage->collection_index];
hid_dbg(hdev, "collection->usage %x\n",
report->field[i]->physical,
report->field[i]->usage[0].collection_index,
&hsdev, &priv);
-
- if (callback && callback->capture_sample) {
+ if (!callback) {
+ ptr += sz;
+ continue;
+ }
+ if (hsdev->pending.status && (hsdev->pending.attr_usage_id ==
+ report->field[i]->usage->hid ||
+ hsdev->pending.attr_usage_id ==
+ report->field[i]->logical)) {
+ hid_dbg(hdev, "data was pending ...\n");
+ hsdev->pending.raw_data = kmemdup(ptr, sz, GFP_ATOMIC);
+ if (hsdev->pending.raw_data)
+ hsdev->pending.raw_size = sz;
+ else
+ hsdev->pending.raw_size = 0;
+ complete(&hsdev->pending.ready);
+ }
+ if (callback->capture_sample) {
if (report->field[i]->logical)
callback->capture_sample(hsdev,
report->field[i]->logical, sz, ptr,
int dev_cnt;
struct hid_sensor_hub_device *hsdev;
struct hid_sensor_hub_device *last_hsdev = NULL;
+ struct hid_sensor_hub_device *collection_hsdev = NULL;
sd = devm_kzalloc(&hdev->dev, sizeof(*sd), GFP_KERNEL);
if (!sd) {
for (i = 0; i < hdev->maxcollection; ++i) {
struct hid_collection *collection = &hdev->collection[i];
- if (collection->type == HID_COLLECTION_PHYSICAL) {
+ if (collection->type == HID_COLLECTION_PHYSICAL ||
+ collection->type == HID_COLLECTION_APPLICATION) {
hsdev = devm_kzalloc(&hdev->dev, sizeof(*hsdev),
GFP_KERNEL);
hsdev->hdev = hdev;
hsdev->vendor_id = hdev->vendor;
hsdev->product_id = hdev->product;
+ hsdev->usage = collection->usage;
+ mutex_init(&hsdev->mutex);
hsdev->start_collection_index = i;
if (last_hsdev)
last_hsdev->end_collection_index = i;
hid_dbg(hdev, "Adding %s:%d\n", name,
hsdev->start_collection_index);
sd->hid_sensor_client_cnt++;
+ if (collection_hsdev)
+ collection_hsdev->end_collection_index = i;
+ if (collection->type == HID_COLLECTION_APPLICATION &&
+ collection->usage == HID_USAGE_SENSOR_COLLECTION)
+ collection_hsdev = hsdev;
}
}
if (last_hsdev)
last_hsdev->end_collection_index = i;
+ if (collection_hsdev)
+ collection_hsdev->end_collection_index = i;
ret = mfd_add_hotplug_devices(&hdev->dev,
sd->hid_sensor_hub_client_devs,
{
struct sensor_hub_data *data = hid_get_drvdata(hdev);
unsigned long flags;
+ int i;
hid_dbg(hdev, " hardware removed\n");
hid_hw_close(hdev);
hid_hw_stop(hdev);
spin_lock_irqsave(&data->lock, flags);
- if (data->pending.status)
- complete(&data->pending.ready);
+ for (i = 0; i < data->hid_sensor_client_cnt; ++i) {
+ struct hid_sensor_hub_device *hsdev =
+ data->hid_sensor_hub_client_devs[i].platform_data;
+ if (hsdev->pending.status)
+ complete(&hsdev->pending.ready);
+ }
spin_unlock_irqrestore(&data->lock, flags);
mfd_remove_devices(&hdev->dev);
hid_set_drvdata(hdev, NULL);
#define DS4_REPORT_0x05_SIZE 32
#define DS4_REPORT_0x11_SIZE 78
#define DS4_REPORT_0x81_SIZE 7
-#define SIXAXIS_REPORT_0xF2_SIZE 18
+#define SIXAXIS_REPORT_0xF2_SIZE 17
+#define SIXAXIS_REPORT_0xF5_SIZE 8
static DEFINE_SPINLOCK(sony_dev_list_lock);
static LIST_HEAD(sony_device_list);
struct led_classdev *leds[MAX_LEDS];
unsigned long quirks;
struct work_struct state_worker;
- struct power_supply battery;
+ struct power_supply *battery;
+ struct power_supply_desc battery_desc;
int device_id;
__u8 *output_report_dmabuf;
*/
static int sixaxis_set_operational_usb(struct hid_device *hdev)
{
+ const int buf_size =
+ max(SIXAXIS_REPORT_0xF2_SIZE, SIXAXIS_REPORT_0xF5_SIZE);
+ __u8 *buf;
int ret;
- char *buf = kmalloc(18, GFP_KERNEL);
+ buf = kmalloc(buf_size, GFP_KERNEL);
if (!buf)
return -ENOMEM;
- ret = hid_hw_raw_request(hdev, 0xf2, buf, 17, HID_FEATURE_REPORT,
- HID_REQ_GET_REPORT);
+ ret = hid_hw_raw_request(hdev, 0xf2, buf, SIXAXIS_REPORT_0xF2_SIZE,
+ HID_FEATURE_REPORT, HID_REQ_GET_REPORT);
+ if (ret < 0) {
+ hid_err(hdev, "can't set operational mode: step 1\n");
+ goto out;
+ }
+ /*
+ * Some compatible controllers like the Speedlink Strike FX and
+ * Gasia need another query plus an USB interrupt to get operational.
+ */
+ ret = hid_hw_raw_request(hdev, 0xf5, buf, SIXAXIS_REPORT_0xF5_SIZE,
+ HID_FEATURE_REPORT, HID_REQ_GET_REPORT);
+ if (ret < 0) {
+ hid_err(hdev, "can't set operational mode: step 2\n");
+ goto out;
+ }
+
+ ret = hid_hw_output_report(hdev, buf, 1);
if (ret < 0)
- hid_err(hdev, "can't set operational mode\n");
+ hid_err(hdev, "can't set operational mode: step 3\n");
+out:
kfree(buf);
return ret;
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct sony_sc *sc = container_of(psy, struct sony_sc, battery);
+ struct sony_sc *sc = power_supply_get_drvdata(psy);
unsigned long flags;
int ret = 0;
u8 battery_charging, battery_capacity, cable_state;
static int sony_battery_probe(struct sony_sc *sc)
{
+ struct power_supply_config psy_cfg = { .drv_data = sc, };
struct hid_device *hdev = sc->hdev;
int ret;
*/
sc->battery_capacity = 100;
- sc->battery.properties = sony_battery_props;
- sc->battery.num_properties = ARRAY_SIZE(sony_battery_props);
- sc->battery.get_property = sony_battery_get_property;
- sc->battery.type = POWER_SUPPLY_TYPE_BATTERY;
- sc->battery.use_for_apm = 0;
- sc->battery.name = kasprintf(GFP_KERNEL, "sony_controller_battery_%pMR",
- sc->mac_address);
- if (!sc->battery.name)
+ sc->battery_desc.properties = sony_battery_props;
+ sc->battery_desc.num_properties = ARRAY_SIZE(sony_battery_props);
+ sc->battery_desc.get_property = sony_battery_get_property;
+ sc->battery_desc.type = POWER_SUPPLY_TYPE_BATTERY;
+ sc->battery_desc.use_for_apm = 0;
+ sc->battery_desc.name = kasprintf(GFP_KERNEL,
+ "sony_controller_battery_%pMR",
+ sc->mac_address);
+ if (!sc->battery_desc.name)
return -ENOMEM;
- ret = power_supply_register(&hdev->dev, &sc->battery);
- if (ret) {
+ sc->battery = power_supply_register(&hdev->dev, &sc->battery_desc,
+ &psy_cfg);
+ if (IS_ERR(sc->battery)) {
+ ret = PTR_ERR(sc->battery);
hid_err(hdev, "Unable to register battery device\n");
goto err_free;
}
- power_supply_powers(&sc->battery, &hdev->dev);
+ power_supply_powers(sc->battery, &hdev->dev);
return 0;
err_free:
- kfree(sc->battery.name);
- sc->battery.name = NULL;
+ kfree(sc->battery_desc.name);
+ sc->battery_desc.name = NULL;
return ret;
}
static void sony_battery_remove(struct sony_sc *sc)
{
- if (!sc->battery.name)
+ if (!sc->battery_desc.name)
return;
- power_supply_unregister(&sc->battery);
- kfree(sc->battery.name);
- sc->battery.name = NULL;
+ power_supply_unregister(sc->battery);
+ kfree(sc->battery_desc.name);
+ sc->battery_desc.name = NULL;
}
/*
*/
#include <linux/device.h>
-#include <linux/usb.h>
#include <linux/hid.h>
#include <linux/module.h>
/*
* HID driver for UC-Logic devices not fully compliant with HID standard
*
- * Copyright (c) 2010 Nikolai Kondrashov
+ * Copyright (c) 2010-2014 Nikolai Kondrashov
+ * Copyright (c) 2013 Martin Rusko
*/
/*
#include <linux/hid.h>
#include <linux/module.h>
#include <linux/usb.h>
+#include <asm/unaligned.h>
+#include "usbhid/usbhid.h"
#include "hid-ids.h"
0xC0 /* End Collection */
};
+/* Report descriptor template placeholder head */
+#define UCLOGIC_PH_HEAD 0xFE, 0xED, 0x1D
+
+/* Report descriptor template placeholder IDs */
+enum uclogic_ph_id {
+ UCLOGIC_PH_ID_X_LM,
+ UCLOGIC_PH_ID_X_PM,
+ UCLOGIC_PH_ID_Y_LM,
+ UCLOGIC_PH_ID_Y_PM,
+ UCLOGIC_PH_ID_PRESSURE_LM,
+ UCLOGIC_PH_ID_NUM
+};
+
+/* Report descriptor template placeholder */
+#define UCLOGIC_PH(_ID) UCLOGIC_PH_HEAD, UCLOGIC_PH_ID_##_ID
+#define UCLOGIC_PEN_REPORT_ID 0x07
+
+/* Fixed report descriptor template */
+static const __u8 uclogic_tablet_rdesc_template[] = {
+ 0x05, 0x0D, /* Usage Page (Digitizer), */
+ 0x09, 0x02, /* Usage (Pen), */
+ 0xA1, 0x01, /* Collection (Application), */
+ 0x85, 0x07, /* Report ID (7), */
+ 0x09, 0x20, /* Usage (Stylus), */
+ 0xA0, /* Collection (Physical), */
+ 0x14, /* Logical Minimum (0), */
+ 0x25, 0x01, /* Logical Maximum (1), */
+ 0x75, 0x01, /* Report Size (1), */
+ 0x09, 0x42, /* Usage (Tip Switch), */
+ 0x09, 0x44, /* Usage (Barrel Switch), */
+ 0x09, 0x46, /* Usage (Tablet Pick), */
+ 0x95, 0x03, /* Report Count (3), */
+ 0x81, 0x02, /* Input (Variable), */
+ 0x95, 0x03, /* Report Count (3), */
+ 0x81, 0x03, /* Input (Constant, Variable), */
+ 0x09, 0x32, /* Usage (In Range), */
+ 0x95, 0x01, /* Report Count (1), */
+ 0x81, 0x02, /* Input (Variable), */
+ 0x95, 0x01, /* Report Count (1), */
+ 0x81, 0x03, /* Input (Constant, Variable), */
+ 0x75, 0x10, /* Report Size (16), */
+ 0x95, 0x01, /* Report Count (1), */
+ 0xA4, /* Push, */
+ 0x05, 0x01, /* Usage Page (Desktop), */
+ 0x65, 0x13, /* Unit (Inch), */
+ 0x55, 0xFD, /* Unit Exponent (-3), */
+ 0x34, /* Physical Minimum (0), */
+ 0x09, 0x30, /* Usage (X), */
+ 0x27, UCLOGIC_PH(X_LM), /* Logical Maximum (PLACEHOLDER), */
+ 0x47, UCLOGIC_PH(X_PM), /* Physical Maximum (PLACEHOLDER), */
+ 0x81, 0x02, /* Input (Variable), */
+ 0x09, 0x31, /* Usage (Y), */
+ 0x27, UCLOGIC_PH(Y_LM), /* Logical Maximum (PLACEHOLDER), */
+ 0x47, UCLOGIC_PH(Y_PM), /* Physical Maximum (PLACEHOLDER), */
+ 0x81, 0x02, /* Input (Variable), */
+ 0xB4, /* Pop, */
+ 0x09, 0x30, /* Usage (Tip Pressure), */
+ 0x27,
+ UCLOGIC_PH(PRESSURE_LM),/* Logical Maximum (PLACEHOLDER), */
+ 0x81, 0x02, /* Input (Variable), */
+ 0xC0, /* End Collection, */
+ 0xC0 /* End Collection */
+};
+
+/* Parameter indices */
+enum uclogic_prm {
+ UCLOGIC_PRM_X_LM = 1,
+ UCLOGIC_PRM_Y_LM = 2,
+ UCLOGIC_PRM_PRESSURE_LM = 4,
+ UCLOGIC_PRM_RESOLUTION = 5,
+ UCLOGIC_PRM_NUM
+};
+
+/* Driver data */
+struct uclogic_drvdata {
+ __u8 *rdesc;
+ unsigned int rsize;
+ bool invert_pen_inrange;
+ bool ignore_pen_usage;
+};
+
static __u8 *uclogic_report_fixup(struct hid_device *hdev, __u8 *rdesc,
unsigned int *rsize)
{
struct usb_interface *iface = to_usb_interface(hdev->dev.parent);
__u8 iface_num = iface->cur_altsetting->desc.bInterfaceNumber;
+ struct uclogic_drvdata *drvdata = hid_get_drvdata(hdev);
switch (hdev->product) {
case USB_DEVICE_ID_UCLOGIC_TABLET_PF1209:
break;
}
break;
+ default:
+ if (drvdata->rdesc != NULL) {
+ rdesc = drvdata->rdesc;
+ *rsize = drvdata->rsize;
+ }
}
return rdesc;
}
+static int uclogic_input_mapping(struct hid_device *hdev, struct hid_input *hi,
+ struct hid_field *field, struct hid_usage *usage,
+ unsigned long **bit, int *max)
+{
+ struct uclogic_drvdata *drvdata = hid_get_drvdata(hdev);
+
+ /* discard the unused pen interface */
+ if ((drvdata->ignore_pen_usage) &&
+ (field->application == HID_DG_PEN))
+ return -1;
+
+ /* let hid-core decide what to do */
+ return 0;
+}
+
+static void uclogic_input_configured(struct hid_device *hdev,
+ struct hid_input *hi)
+{
+ char *name;
+ const char *suffix = NULL;
+ struct hid_field *field;
+ size_t len;
+
+ /* no report associated (HID_QUIRK_MULTI_INPUT not set) */
+ if (!hi->report)
+ return;
+
+ field = hi->report->field[0];
+
+ switch (field->application) {
+ case HID_GD_KEYBOARD:
+ suffix = "Keyboard";
+ break;
+ case HID_GD_MOUSE:
+ suffix = "Mouse";
+ break;
+ case HID_GD_KEYPAD:
+ suffix = "Pad";
+ break;
+ case HID_DG_PEN:
+ suffix = "Pen";
+ break;
+ case HID_CP_CONSUMER_CONTROL:
+ suffix = "Consumer Control";
+ break;
+ case HID_GD_SYSTEM_CONTROL:
+ suffix = "System Control";
+ break;
+ }
+
+ if (suffix) {
+ len = strlen(hdev->name) + 2 + strlen(suffix);
+ name = devm_kzalloc(&hi->input->dev, len, GFP_KERNEL);
+ if (name) {
+ snprintf(name, len, "%s %s", hdev->name, suffix);
+ hi->input->name = name;
+ }
+ }
+}
+
+/**
+ * Enable fully-functional tablet mode and determine device parameters.
+ *
+ * @hdev: HID device
+ */
+static int uclogic_tablet_enable(struct hid_device *hdev)
+{
+ int rc;
+ struct usb_device *usb_dev = hid_to_usb_dev(hdev);
+ struct uclogic_drvdata *drvdata = hid_get_drvdata(hdev);
+ __le16 *buf = NULL;
+ size_t len;
+ s32 params[UCLOGIC_PH_ID_NUM];
+ s32 resolution;
+ __u8 *p;
+ s32 v;
+
+ /*
+ * Read string descriptor containing tablet parameters. The specific
+ * string descriptor and data were discovered by sniffing the Windows
+ * driver traffic.
+ * NOTE: This enables fully-functional tablet mode.
+ */
+ len = UCLOGIC_PRM_NUM * sizeof(*buf);
+ buf = kmalloc(len, GFP_KERNEL);
+ if (buf == NULL) {
+ hid_err(hdev, "failed to allocate parameter buffer\n");
+ rc = -ENOMEM;
+ goto cleanup;
+ }
+ rc = usb_control_msg(usb_dev, usb_rcvctrlpipe(usb_dev, 0),
+ USB_REQ_GET_DESCRIPTOR, USB_DIR_IN,
+ (USB_DT_STRING << 8) + 0x64,
+ 0x0409, buf, len,
+ USB_CTRL_GET_TIMEOUT);
+ if (rc == -EPIPE) {
+ hid_err(hdev, "device parameters not found\n");
+ rc = -ENODEV;
+ goto cleanup;
+ } else if (rc < 0) {
+ hid_err(hdev, "failed to get device parameters: %d\n", rc);
+ rc = -ENODEV;
+ goto cleanup;
+ } else if (rc != len) {
+ hid_err(hdev, "invalid device parameters\n");
+ rc = -ENODEV;
+ goto cleanup;
+ }
+
+ /* Extract device parameters */
+ params[UCLOGIC_PH_ID_X_LM] = le16_to_cpu(buf[UCLOGIC_PRM_X_LM]);
+ params[UCLOGIC_PH_ID_Y_LM] = le16_to_cpu(buf[UCLOGIC_PRM_Y_LM]);
+ params[UCLOGIC_PH_ID_PRESSURE_LM] =
+ le16_to_cpu(buf[UCLOGIC_PRM_PRESSURE_LM]);
+ resolution = le16_to_cpu(buf[UCLOGIC_PRM_RESOLUTION]);
+ if (resolution == 0) {
+ params[UCLOGIC_PH_ID_X_PM] = 0;
+ params[UCLOGIC_PH_ID_Y_PM] = 0;
+ } else {
+ params[UCLOGIC_PH_ID_X_PM] = params[UCLOGIC_PH_ID_X_LM] *
+ 1000 / resolution;
+ params[UCLOGIC_PH_ID_Y_PM] = params[UCLOGIC_PH_ID_Y_LM] *
+ 1000 / resolution;
+ }
+
+ /* Allocate fixed report descriptor */
+ drvdata->rdesc = devm_kzalloc(&hdev->dev,
+ sizeof(uclogic_tablet_rdesc_template),
+ GFP_KERNEL);
+ if (drvdata->rdesc == NULL) {
+ hid_err(hdev, "failed to allocate fixed rdesc\n");
+ rc = -ENOMEM;
+ goto cleanup;
+ }
+ drvdata->rsize = sizeof(uclogic_tablet_rdesc_template);
+
+ /* Format fixed report descriptor */
+ memcpy(drvdata->rdesc, uclogic_tablet_rdesc_template,
+ drvdata->rsize);
+ for (p = drvdata->rdesc;
+ p <= drvdata->rdesc + drvdata->rsize - 4;) {
+ if (p[0] == 0xFE && p[1] == 0xED && p[2] == 0x1D &&
+ p[3] < sizeof(params)) {
+ v = params[p[3]];
+ put_unaligned(cpu_to_le32(v), (s32 *)p);
+ p += 4;
+ } else {
+ p++;
+ }
+ }
+
+ rc = 0;
+
+cleanup:
+ kfree(buf);
+ return rc;
+}
+
+static int uclogic_probe(struct hid_device *hdev,
+ const struct hid_device_id *id)
+{
+ int rc;
+ struct usb_interface *intf = to_usb_interface(hdev->dev.parent);
+ struct uclogic_drvdata *drvdata;
+
+ /*
+ * libinput requires the pad interface to be on a different node
+ * than the pen, so use QUIRK_MULTI_INPUT for all tablets.
+ */
+ hdev->quirks |= HID_QUIRK_MULTI_INPUT;
+ hdev->quirks |= HID_QUIRK_NO_EMPTY_INPUT;
+
+ /* Allocate and assign driver data */
+ drvdata = devm_kzalloc(&hdev->dev, sizeof(*drvdata), GFP_KERNEL);
+ if (drvdata == NULL)
+ return -ENOMEM;
+
+ hid_set_drvdata(hdev, drvdata);
+
+ switch (id->product) {
+ case USB_DEVICE_ID_HUION_TABLET:
+ /* If this is the pen interface */
+ if (intf->cur_altsetting->desc.bInterfaceNumber == 0) {
+ rc = uclogic_tablet_enable(hdev);
+ if (rc) {
+ hid_err(hdev, "tablet enabling failed\n");
+ return rc;
+ }
+ drvdata->invert_pen_inrange = true;
+ } else {
+ drvdata->ignore_pen_usage = true;
+ }
+ break;
+ }
+
+ rc = hid_parse(hdev);
+ if (rc) {
+ hid_err(hdev, "parse failed\n");
+ return rc;
+ }
+
+ rc = hid_hw_start(hdev, HID_CONNECT_DEFAULT);
+ if (rc) {
+ hid_err(hdev, "hw start failed\n");
+ return rc;
+ }
+
+ return 0;
+}
+
+static int uclogic_raw_event(struct hid_device *hdev, struct hid_report *report,
+ u8 *data, int size)
+{
+ struct uclogic_drvdata *drvdata = hid_get_drvdata(hdev);
+
+ if ((drvdata->invert_pen_inrange) &&
+ (report->type == HID_INPUT_REPORT) &&
+ (report->id == UCLOGIC_PEN_REPORT_ID) &&
+ (size >= 2))
+ /* Invert the in-range bit */
+ data[1] ^= 0x40;
+
+ return 0;
+}
+
static const struct hid_device_id uclogic_devices[] = {
{ HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC,
USB_DEVICE_ID_UCLOGIC_TABLET_PF1209) },
USB_DEVICE_ID_UCLOGIC_WIRELESS_TABLET_TWHL850) },
{ HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC,
USB_DEVICE_ID_UCLOGIC_TABLET_TWHA60) },
+ { HID_USB_DEVICE(USB_VENDOR_ID_HUION, USB_DEVICE_ID_HUION_TABLET) },
+ { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_HUION_TABLET) },
{ }
};
MODULE_DEVICE_TABLE(hid, uclogic_devices);
static struct hid_driver uclogic_driver = {
.name = "uclogic",
.id_table = uclogic_devices,
+ .probe = uclogic_probe,
.report_fixup = uclogic_report_fixup,
+ .raw_event = uclogic_raw_event,
+ .input_mapping = uclogic_input_mapping,
+ .input_configured = uclogic_input_configured,
};
module_hid_driver(uclogic_driver);
+MODULE_AUTHOR("Martin Rusko");
+MODULE_AUTHOR("Nikolai Kondrashov");
MODULE_LICENSE("GPL");
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct wiimote_data *wdata = container_of(psy, struct wiimote_data,
- battery);
+ struct wiimote_data *wdata = power_supply_get_drvdata(psy);
int ret = 0, state;
unsigned long flags;
static int wiimod_battery_probe(const struct wiimod_ops *ops,
struct wiimote_data *wdata)
{
+ struct power_supply_config psy_cfg = { .drv_data = wdata, };
int ret;
- wdata->battery.properties = wiimod_battery_props;
- wdata->battery.num_properties = ARRAY_SIZE(wiimod_battery_props);
- wdata->battery.get_property = wiimod_battery_get_property;
- wdata->battery.type = POWER_SUPPLY_TYPE_BATTERY;
- wdata->battery.use_for_apm = 0;
- wdata->battery.name = kasprintf(GFP_KERNEL, "wiimote_battery_%s",
- wdata->hdev->uniq);
- if (!wdata->battery.name)
+ wdata->battery_desc.properties = wiimod_battery_props;
+ wdata->battery_desc.num_properties = ARRAY_SIZE(wiimod_battery_props);
+ wdata->battery_desc.get_property = wiimod_battery_get_property;
+ wdata->battery_desc.type = POWER_SUPPLY_TYPE_BATTERY;
+ wdata->battery_desc.use_for_apm = 0;
+ wdata->battery_desc.name = kasprintf(GFP_KERNEL, "wiimote_battery_%s",
+ wdata->hdev->uniq);
+ if (!wdata->battery_desc.name)
return -ENOMEM;
- ret = power_supply_register(&wdata->hdev->dev, &wdata->battery);
- if (ret) {
+ wdata->battery = power_supply_register(&wdata->hdev->dev,
+ &wdata->battery_desc,
+ &psy_cfg);
+ if (IS_ERR(wdata->battery)) {
hid_err(wdata->hdev, "cannot register battery device\n");
+ ret = PTR_ERR(wdata->battery);
goto err_free;
}
- power_supply_powers(&wdata->battery, &wdata->hdev->dev);
+ power_supply_powers(wdata->battery, &wdata->hdev->dev);
return 0;
err_free:
- kfree(wdata->battery.name);
- wdata->battery.name = NULL;
+ kfree(wdata->battery_desc.name);
+ wdata->battery_desc.name = NULL;
return ret;
}
static void wiimod_battery_remove(const struct wiimod_ops *ops,
struct wiimote_data *wdata)
{
- if (!wdata->battery.name)
+ if (!wdata->battery_desc.name)
return;
- power_supply_unregister(&wdata->battery);
- kfree(wdata->battery.name);
- wdata->battery.name = NULL;
+ power_supply_unregister(wdata->battery);
+ kfree(wdata->battery_desc.name);
+ wdata->battery_desc.name = NULL;
}
static const struct wiimod_ops wiimod_battery = {
struct led_classdev *leds[4];
struct input_dev *accel;
struct input_dev *ir;
- struct power_supply battery;
+ struct power_supply *battery;
+ struct power_supply_desc battery_desc;
struct input_dev *mp;
struct timer_list timer;
struct wiimote_debug *debug;
#include <linux/mutex.h>
#include <linux/acpi.h>
#include <linux/of.h>
+#include <linux/gpio/consumer.h>
#include <linux/i2c/i2c-hid.h>
unsigned long flags; /* device flags */
wait_queue_head_t wait; /* For waiting the interrupt */
+ struct gpio_desc *desc;
+ int irq;
struct i2c_hid_platform_data pdata;
};
struct i2c_hid *ihid = i2c_get_clientdata(client);
int ret;
- dev_dbg(&client->dev, "Requesting IRQ: %d\n", client->irq);
+ dev_dbg(&client->dev, "Requesting IRQ: %d\n", ihid->irq);
- ret = request_threaded_irq(client->irq, NULL, i2c_hid_irq,
+ ret = request_threaded_irq(ihid->irq, NULL, i2c_hid_irq,
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
client->name, ihid);
if (ret < 0) {
dev_warn(&client->dev,
"Could not register for %s interrupt, irq = %d,"
" ret = %d\n",
- client->name, client->irq, ret);
+ client->name, ihid->irq, ret);
return ret;
}
}
#ifdef CONFIG_ACPI
+
+/* Default GPIO mapping */
+static const struct acpi_gpio_params i2c_hid_irq_gpio = { 0, 0, true };
+static const struct acpi_gpio_mapping i2c_hid_acpi_gpios[] = {
+ { "gpios", &i2c_hid_irq_gpio, 1 },
+ { },
+};
+
static int i2c_hid_acpi_pdata(struct i2c_client *client,
struct i2c_hid_platform_data *pdata)
{
pdata->hid_descriptor_address = obj->integer.value;
ACPI_FREE(obj);
- return 0;
+ return acpi_dev_add_driver_gpios(adev, i2c_hid_acpi_gpios);
}
static const struct acpi_device_id i2c_hid_acpi_match[] = {
dbg_hid("HID probe called for i2c 0x%02x\n", client->addr);
- if (!client->irq) {
- dev_err(&client->dev,
- "HID over i2c has not been provided an Int IRQ\n");
- return -EINVAL;
- }
-
ihid = kzalloc(sizeof(struct i2c_hid), GFP_KERNEL);
if (!ihid)
return -ENOMEM;
ihid->pdata = *platform_data;
}
+ if (client->irq > 0) {
+ ihid->irq = client->irq;
+ } else if (ACPI_COMPANION(&client->dev)) {
+ ihid->desc = gpiod_get(&client->dev, NULL, GPIOD_IN);
+ if (IS_ERR(ihid->desc)) {
+ dev_err(&client->dev, "Failed to get GPIO interrupt\n");
+ return PTR_ERR(ihid->desc);
+ }
+
+ ihid->irq = gpiod_to_irq(ihid->desc);
+ if (ihid->irq < 0) {
+ gpiod_put(ihid->desc);
+ dev_err(&client->dev, "Failed to convert GPIO to IRQ\n");
+ return ihid->irq;
+ }
+ }
+
i2c_set_clientdata(client, ihid);
ihid->client = client;
hid_destroy_device(hid);
err_irq:
- free_irq(client->irq, ihid);
+ free_irq(ihid->irq, ihid);
err_pm:
pm_runtime_put_noidle(&client->dev);
pm_runtime_disable(&client->dev);
err:
+ if (ihid->desc)
+ gpiod_put(ihid->desc);
+
i2c_hid_free_buffers(ihid);
kfree(ihid);
return ret;
hid = ihid->hid;
hid_destroy_device(hid);
- free_irq(client->irq, ihid);
+ free_irq(ihid->irq, ihid);
if (ihid->bufsize)
i2c_hid_free_buffers(ihid);
+ if (ihid->desc)
+ gpiod_put(ihid->desc);
+
kfree(ihid);
+ acpi_dev_remove_driver_gpios(ACPI_COMPANION(&client->dev));
+
return 0;
}
struct hid_device *hid = ihid->hid;
int ret = 0;
- disable_irq(client->irq);
+ disable_irq(ihid->irq);
if (device_may_wakeup(&client->dev))
- enable_irq_wake(client->irq);
+ enable_irq_wake(ihid->irq);
if (hid->driver && hid->driver->suspend)
ret = hid->driver->suspend(hid, PMSG_SUSPEND);
struct i2c_hid *ihid = i2c_get_clientdata(client);
struct hid_device *hid = ihid->hid;
- enable_irq(client->irq);
+ enable_irq(ihid->irq);
ret = i2c_hid_hwreset(client);
if (ret)
return ret;
if (device_may_wakeup(&client->dev))
- disable_irq_wake(client->irq);
+ disable_irq_wake(ihid->irq);
if (hid->driver && hid->driver->reset_resume) {
ret = hid->driver->reset_resume(hid);
static int i2c_hid_runtime_suspend(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
+ struct i2c_hid *ihid = i2c_get_clientdata(client);
i2c_hid_set_power(client, I2C_HID_PWR_SLEEP);
- disable_irq(client->irq);
+ disable_irq(ihid->irq);
return 0;
}
static int i2c_hid_runtime_resume(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
+ struct i2c_hid *ihid = i2c_get_clientdata(client);
- enable_irq(client->irq);
+ enable_irq(ihid->irq);
i2c_hid_set_power(client, I2C_HID_PWR_ON);
return 0;
}
int type_id;
int error;
+ pidff->block_load[PID_EFFECT_BLOCK_INDEX].value[0] = 0;
+ if (old) {
+ pidff->block_load[PID_EFFECT_BLOCK_INDEX].value[0] =
+ pidff->pid_id[effect->id];
+ }
+
switch (effect->type) {
case FF_CONSTANT:
if (!old) {
{ USB_VENDOR_ID_ELO, USB_DEVICE_ID_ELO_TS2700, HID_QUIRK_NOGET },
{ USB_VENDOR_ID_FORMOSA, USB_DEVICE_ID_FORMOSA_IR_RECEIVER, HID_QUIRK_NO_INIT_REPORTS },
{ USB_VENDOR_ID_FREESCALE, USB_DEVICE_ID_FREESCALE_MX28, HID_QUIRK_NOGET },
+ { USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_LOGITECH_OEM_USB_OPTICAL_MOUSE_0A4A, HID_QUIRK_ALWAYS_POLL },
+ { USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_LOGITECH_OEM_USB_OPTICAL_MOUSE_0B4A, HID_QUIRK_ALWAYS_POLL },
+ { USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE, HID_QUIRK_ALWAYS_POLL },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_C077, HID_QUIRK_ALWAYS_POLL },
+ { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_MOUSE_C01A, HID_QUIRK_ALWAYS_POLL },
+ { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_MOUSE_C05A, HID_QUIRK_ALWAYS_POLL },
+ { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_MOUSE_C06A, HID_QUIRK_ALWAYS_POLL },
{ USB_VENDOR_ID_MGE, USB_DEVICE_ID_MGE_UPS, HID_QUIRK_NOGET },
{ USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3, HID_QUIRK_NO_INIT_REPORTS },
{ USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3_JP, HID_QUIRK_NO_INIT_REPORTS },
{ USB_VENDOR_ID_PIXART, USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN, HID_QUIRK_NO_INIT_REPORTS },
{ USB_VENDOR_ID_PIXART, USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN1, HID_QUIRK_NO_INIT_REPORTS },
{ USB_VENDOR_ID_PIXART, USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN2, HID_QUIRK_NO_INIT_REPORTS },
+ { USB_VENDOR_ID_PRIMAX, USB_DEVICE_ID_PRIMAX_MOUSE_4D22, HID_QUIRK_ALWAYS_POLL },
{ USB_VENDOR_ID_PRODIGE, USB_DEVICE_ID_PRODIGE_CORDLESS, HID_QUIRK_NOGET },
{ USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH_3001, HID_QUIRK_NOGET },
{ USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH_3008, HID_QUIRK_NOGET },
{ USB_VENDOR_ID_SYMBOL, USB_DEVICE_ID_SYMBOL_SCANNER_2, HID_QUIRK_NOGET },
{ USB_VENDOR_ID_TPV, USB_DEVICE_ID_TPV_OPTICAL_TOUCHSCREEN, HID_QUIRK_NOGET },
{ USB_VENDOR_ID_TURBOX, USB_DEVICE_ID_TURBOX_KEYBOARD, HID_QUIRK_NOGET },
- { USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_PF1209, HID_QUIRK_MULTI_INPUT },
- { USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_WP4030U, HID_QUIRK_MULTI_INPUT },
{ USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_KNA5, HID_QUIRK_MULTI_INPUT },
{ USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_TWA60, HID_QUIRK_MULTI_INPUT },
- { USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_WP5540U, HID_QUIRK_MULTI_INPUT },
- { USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_WP8060U, HID_QUIRK_MULTI_INPUT },
{ USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_MEDIA_TABLET_10_6_INCH, HID_QUIRK_MULTI_INPUT },
{ USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_MEDIA_TABLET_14_1_INCH, HID_QUIRK_MULTI_INPUT },
{ USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_SIRIUS_BATTERY_FREE_TABLET, HID_QUIRK_MULTI_INPUT },
{ USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_MOUSEPEN_I608X, HID_QUIRK_MULTI_INPUT },
{ USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_MOUSEPEN_I608X_2, HID_QUIRK_MULTI_INPUT },
{ USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_EASYPEN_M610X, HID_QUIRK_MULTI_INPUT },
+ { USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_PENSKETCH_M912, HID_QUIRK_MULTI_INPUT },
{ USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_DUOSENSE, HID_QUIRK_NO_INIT_REPORTS },
{ USB_VENDOR_ID_SEMICO, USB_DEVICE_ID_SEMICO_USB_KEYKOARD, HID_QUIRK_NO_INIT_REPORTS },
{ USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_LTS1, HID_QUIRK_NO_INIT_REPORTS },
u8 img_lum; /* OLED matrix display brightness */
} led;
bool led_initialized;
- struct power_supply battery;
- struct power_supply ac;
+ struct power_supply *battery;
+ struct power_supply *ac;
+ struct power_supply_desc battery_desc;
+ struct power_supply_desc ac_desc;
};
static inline void wacom_schedule_work(struct wacom_wac *wacom_wac)
schedule_work(&wacom->work);
}
-static inline void wacom_notify_battery(struct wacom_wac *wacom_wac)
-{
- struct wacom *wacom = container_of(wacom_wac, struct wacom, wacom_wac);
-
- power_supply_changed(&wacom->battery);
-}
-
extern const struct hid_device_id wacom_ids[];
void wacom_wac_irq(struct wacom_wac *wacom_wac, size_t len);
int wacom_wac_event(struct hid_device *hdev, struct hid_field *field,
struct hid_usage *usage, __s32 value);
void wacom_wac_report(struct hid_device *hdev, struct hid_report *report);
+void wacom_battery_work(struct work_struct *work);
#endif
else if (features->type == WACOM_27QHDT) {
return wacom_set_device_mode(hdev, 131, 3, 2);
}
+ else if (features->type == BAMBOO_PAD) {
+ return wacom_set_device_mode(hdev, 2, 2, 2);
+ }
} else if (features->device_type == BTN_TOOL_PEN) {
if (features->type <= BAMBOO_PT && features->type != WIRELESS) {
return wacom_set_device_mode(hdev, 2, 2, 2);
wacom_wac->shared = &data->shared;
+ if (wacom_wac->features.device_type == BTN_TOOL_FINGER)
+ wacom_wac->shared->touch = hdev;
+ else if (wacom_wac->features.device_type == BTN_TOOL_PEN)
+ wacom_wac->shared->pen = hdev;
+
out:
mutex_unlock(&wacom_udev_list_lock);
return retval;
kfree(data);
}
-static void wacom_remove_shared_data(struct wacom_wac *wacom)
+static void wacom_remove_shared_data(struct wacom *wacom)
{
struct wacom_hdev_data *data;
+ struct wacom_wac *wacom_wac = &wacom->wacom_wac;
+
+ if (wacom_wac->shared) {
+ data = container_of(wacom_wac->shared, struct wacom_hdev_data,
+ shared);
+
+ if (wacom_wac->shared->touch == wacom->hdev)
+ wacom_wac->shared->touch = NULL;
+ else if (wacom_wac->shared->pen == wacom->hdev)
+ wacom_wac->shared->pen = NULL;
- if (wacom->shared) {
- data = container_of(wacom->shared, struct wacom_hdev_data, shared);
kref_put(&data->kref, wacom_release_shared_data);
- wacom->shared = NULL;
+ wacom_wac->shared = NULL;
}
}
}
static enum power_supply_property wacom_battery_props[] = {
+ POWER_SUPPLY_PROP_PRESENT,
POWER_SUPPLY_PROP_STATUS,
POWER_SUPPLY_PROP_SCOPE,
POWER_SUPPLY_PROP_CAPACITY
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct wacom *wacom = container_of(psy, struct wacom, battery);
+ struct wacom *wacom = power_supply_get_drvdata(psy);
int ret = 0;
switch (psp) {
+ case POWER_SUPPLY_PROP_PRESENT:
+ val->intval = wacom->wacom_wac.bat_connected;
+ break;
case POWER_SUPPLY_PROP_SCOPE:
val->intval = POWER_SUPPLY_SCOPE_DEVICE;
break;
else if (wacom->wacom_wac.battery_capacity == 100 &&
wacom->wacom_wac.ps_connected)
val->intval = POWER_SUPPLY_STATUS_FULL;
+ else if (wacom->wacom_wac.ps_connected)
+ val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
else
val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
break;
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct wacom *wacom = container_of(psy, struct wacom, ac);
+ struct wacom *wacom = power_supply_get_drvdata(psy);
int ret = 0;
switch (psp) {
static int wacom_initialize_battery(struct wacom *wacom)
{
static atomic_t battery_no = ATOMIC_INIT(0);
- int error;
+ struct power_supply_config psy_cfg = { .drv_data = wacom, };
unsigned long n;
if (wacom->wacom_wac.features.quirks & WACOM_QUIRK_BATTERY) {
+ struct power_supply_desc *bat_desc = &wacom->battery_desc;
+ struct power_supply_desc *ac_desc = &wacom->ac_desc;
n = atomic_inc_return(&battery_no) - 1;
- wacom->battery.properties = wacom_battery_props;
- wacom->battery.num_properties = ARRAY_SIZE(wacom_battery_props);
- wacom->battery.get_property = wacom_battery_get_property;
+ bat_desc->properties = wacom_battery_props;
+ bat_desc->num_properties = ARRAY_SIZE(wacom_battery_props);
+ bat_desc->get_property = wacom_battery_get_property;
sprintf(wacom->wacom_wac.bat_name, "wacom_battery_%ld", n);
- wacom->battery.name = wacom->wacom_wac.bat_name;
- wacom->battery.type = POWER_SUPPLY_TYPE_BATTERY;
- wacom->battery.use_for_apm = 0;
+ bat_desc->name = wacom->wacom_wac.bat_name;
+ bat_desc->type = POWER_SUPPLY_TYPE_BATTERY;
+ bat_desc->use_for_apm = 0;
- wacom->ac.properties = wacom_ac_props;
- wacom->ac.num_properties = ARRAY_SIZE(wacom_ac_props);
- wacom->ac.get_property = wacom_ac_get_property;
+ ac_desc->properties = wacom_ac_props;
+ ac_desc->num_properties = ARRAY_SIZE(wacom_ac_props);
+ ac_desc->get_property = wacom_ac_get_property;
sprintf(wacom->wacom_wac.ac_name, "wacom_ac_%ld", n);
- wacom->ac.name = wacom->wacom_wac.ac_name;
- wacom->ac.type = POWER_SUPPLY_TYPE_MAINS;
- wacom->ac.use_for_apm = 0;
-
- error = power_supply_register(&wacom->hdev->dev,
- &wacom->battery);
- if (error)
- return error;
-
- power_supply_powers(&wacom->battery, &wacom->hdev->dev);
-
- error = power_supply_register(&wacom->hdev->dev, &wacom->ac);
- if (error) {
- power_supply_unregister(&wacom->battery);
- return error;
+ ac_desc->name = wacom->wacom_wac.ac_name;
+ ac_desc->type = POWER_SUPPLY_TYPE_MAINS;
+ ac_desc->use_for_apm = 0;
+
+ wacom->battery = power_supply_register(&wacom->hdev->dev,
+ &wacom->battery_desc, &psy_cfg);
+ if (IS_ERR(wacom->battery))
+ return PTR_ERR(wacom->battery);
+
+ power_supply_powers(wacom->battery, &wacom->hdev->dev);
+
+ wacom->ac = power_supply_register(&wacom->hdev->dev,
+ &wacom->ac_desc,
+ &psy_cfg);
+ if (IS_ERR(wacom->ac)) {
+ power_supply_unregister(wacom->battery);
+ return PTR_ERR(wacom->ac);
}
- power_supply_powers(&wacom->ac, &wacom->hdev->dev);
+ power_supply_powers(wacom->ac, &wacom->hdev->dev);
}
return 0;
static void wacom_destroy_battery(struct wacom *wacom)
{
- if ((wacom->wacom_wac.features.quirks & WACOM_QUIRK_BATTERY) &&
- wacom->battery.dev) {
- power_supply_unregister(&wacom->battery);
- wacom->battery.dev = NULL;
- power_supply_unregister(&wacom->ac);
- wacom->ac.dev = NULL;
+ if (wacom->battery) {
+ power_supply_unregister(wacom->battery);
+ wacom->battery = NULL;
+ power_supply_unregister(wacom->ac);
+ wacom->ac = NULL;
}
}
return;
}
+void wacom_battery_work(struct work_struct *work)
+{
+ struct wacom *wacom = container_of(work, struct wacom, work);
+
+ if ((wacom->wacom_wac.features.quirks & WACOM_QUIRK_BATTERY) &&
+ !wacom->battery) {
+ wacom_initialize_battery(wacom);
+ }
+ else if (!(wacom->wacom_wac.features.quirks & WACOM_QUIRK_BATTERY) &&
+ wacom->battery) {
+ wacom_destroy_battery(wacom);
+ }
+}
+
/*
* Not all devices report physical dimensions from HID.
* Compute the default from hardcoded logical dimension
hdev->quirks |= HID_QUIRK_NO_INIT_REPORTS;
+ /* hid-core sets this quirk for the boot interface */
+ hdev->quirks &= ~HID_QUIRK_NOGET;
+
wacom = kzalloc(sizeof(struct wacom), GFP_KERNEL);
if (!wacom)
return -ENOMEM;
goto fail_allocate_inputs;
}
+ /*
+ * Bamboo Pad has a generic hid handling for the Pen, and we switch it
+ * into debug mode for the touch part.
+ * We ignore the other interfaces.
+ */
+ if (features->type == BAMBOO_PAD) {
+ if (features->pktlen == WACOM_PKGLEN_PENABLED) {
+ features->type = HID_GENERIC;
+ } else if ((features->pktlen != WACOM_PKGLEN_BPAD_TOUCH) &&
+ (features->pktlen != WACOM_PKGLEN_BPAD_TOUCH_USB)) {
+ error = -ENODEV;
+ goto fail_shared_data;
+ }
+ }
+
/* set the default size in case we do not get them from hid */
wacom_set_default_phy(features);
features->y_max = 4096;
}
+ /*
+ * Same thing for Bamboo PAD
+ */
+ if (features->type == BAMBOO_PAD)
+ features->device_type = BTN_TOOL_FINGER;
+
if (hdev->bus == BUS_BLUETOOTH)
features->quirks |= WACOM_QUIRK_BATTERY;
snprintf(wacom_wac->pad_name, sizeof(wacom_wac->pad_name),
"%s Pad", features->name);
- if (features->quirks & WACOM_QUIRK_MULTI_INPUT) {
- /* Append the device type to the name */
- if (features->device_type != BTN_TOOL_FINGER)
- strlcat(wacom_wac->name, " Pen", WACOM_NAME_MAX);
- else if (features->touch_max)
- strlcat(wacom_wac->name, " Finger", WACOM_NAME_MAX);
- else
- strlcat(wacom_wac->name, " Pad", WACOM_NAME_MAX);
+ /* Append the device type to the name */
+ if (features->device_type != BTN_TOOL_FINGER)
+ strlcat(wacom_wac->name, " Pen", WACOM_NAME_MAX);
+ else if (features->touch_max)
+ strlcat(wacom_wac->name, " Finger", WACOM_NAME_MAX);
+ else
+ strlcat(wacom_wac->name, " Pad", WACOM_NAME_MAX);
- error = wacom_add_shared_data(hdev);
- if (error)
- goto fail_shared_data;
- }
+ error = wacom_add_shared_data(hdev);
+ if (error)
+ goto fail_shared_data;
if (!(features->quirks & WACOM_QUIRK_MONITOR) &&
(features->quirks & WACOM_QUIRK_BATTERY)) {
wacom_clean_inputs(wacom);
wacom_destroy_battery(wacom);
fail_battery:
- wacom_remove_shared_data(wacom_wac);
+ wacom_remove_shared_data(wacom);
fail_shared_data:
wacom_clean_inputs(wacom);
fail_allocate_inputs:
if (hdev->bus == BUS_BLUETOOTH)
device_remove_file(&hdev->dev, &dev_attr_speed);
wacom_destroy_battery(wacom);
- wacom_remove_shared_data(&wacom->wacom_wac);
+ wacom_remove_shared_data(wacom);
hid_set_drvdata(hdev, NULL);
kfree(wacom);
*/
static unsigned short batcap_i4[8] = { 1, 15, 30, 45, 60, 70, 85, 100 };
+static void wacom_notify_battery(struct wacom_wac *wacom_wac,
+ int bat_capacity, bool bat_charging, bool bat_connected,
+ bool ps_connected)
+{
+ struct wacom *wacom = container_of(wacom_wac, struct wacom, wacom_wac);
+ bool changed = wacom_wac->battery_capacity != bat_capacity ||
+ wacom_wac->bat_charging != bat_charging ||
+ wacom_wac->bat_connected != bat_connected ||
+ wacom_wac->ps_connected != ps_connected;
+
+ if (changed) {
+ wacom_wac->battery_capacity = bat_capacity;
+ wacom_wac->bat_charging = bat_charging;
+ wacom_wac->bat_connected = bat_connected;
+ wacom_wac->ps_connected = ps_connected;
+
+ if (wacom->battery)
+ power_supply_changed(wacom->battery);
+ }
+}
+
static int wacom_penpartner_irq(struct wacom_wac *wacom)
{
unsigned char *data = wacom->data;
rw = (data[7] >> 2 & 0x07);
battery_capacity = batcap_gr[rw];
ps_connected = rw == 7;
- if ((wacom->battery_capacity != battery_capacity) ||
- (wacom->ps_connected != ps_connected)) {
- wacom->battery_capacity = battery_capacity;
- wacom->ps_connected = ps_connected;
- wacom_notify_battery(wacom);
- }
+ wacom_notify_battery(wacom, battery_capacity, ps_connected,
+ 1, ps_connected);
}
exit:
return retval;
}
+static void wacom_intuos_schedule_prox_event(struct wacom_wac *wacom_wac)
+{
+ struct wacom *wacom = container_of(wacom_wac, struct wacom, wacom_wac);
+ struct hid_report *r;
+ struct hid_report_enum *re;
+
+ re = &(wacom->hdev->report_enum[HID_FEATURE_REPORT]);
+ r = re->report_id_hash[WACOM_REPORT_INTUOSREAD];
+ if (r) {
+ hid_hw_request(wacom->hdev, r, HID_REQ_GET_REPORT);
+ }
+}
+
static int wacom_intuos_inout(struct wacom_wac *wacom)
{
struct wacom_features *features = &wacom->features;
(features->type == CINTIQ && !(data[1] & 0x40)))
return 1;
- if (wacom->shared) {
- wacom->shared->stylus_in_proximity = true;
-
- if (wacom->shared->touch_down)
- return 1;
- }
+ wacom->shared->stylus_in_proximity = true;
+ if (wacom->shared->touch_down)
+ return 1;
/* in Range while exiting */
if (((data[1] & 0xfe) == 0x20) && wacom->reporting_data) {
/* Exit report */
if ((data[1] & 0xfe) == 0x80) {
- if (features->quirks & WACOM_QUIRK_MULTI_INPUT)
- wacom->shared->stylus_in_proximity = false;
+ wacom->shared->stylus_in_proximity = false;
wacom->reporting_data = false;
/* don't report exit if we don't know the ID */
}
/* don't report other events if we don't know the ID */
- if (!wacom->id[idx])
+ if (!wacom->id[idx]) {
+ /* but reschedule a read of the current tool */
+ wacom_intuos_schedule_prox_event(wacom);
return 1;
+ }
return 0;
}
bat_charging = (power_raw & 0x08) ? 1 : 0;
ps_connected = (power_raw & 0x10) ? 1 : 0;
battery_capacity = batcap_i4[power_raw & 0x07];
- if ((wacom->battery_capacity != battery_capacity) ||
- (wacom->bat_charging != bat_charging) ||
- (wacom->ps_connected != ps_connected)) {
- wacom->battery_capacity = battery_capacity;
- wacom->bat_charging = bat_charging;
- wacom->ps_connected = ps_connected;
- wacom_notify_battery(wacom);
- }
-
+ wacom_notify_battery(wacom, battery_capacity, bat_charging,
+ battery_capacity || bat_charging,
+ ps_connected);
break;
default:
dev_dbg(wacom->input->dev.parent,
return 0;
}
+static int wacom_wac_finger_count_touches(struct wacom_wac *wacom)
+{
+ struct input_dev *input = wacom->input;
+ unsigned touch_max = wacom->features.touch_max;
+ int count = 0;
+ int i;
+
+ /* non-HID_GENERIC single touch input doesn't call this routine */
+ if ((touch_max == 1) && (wacom->features.type == HID_GENERIC))
+ return wacom->hid_data.tipswitch &&
+ !wacom->shared->stylus_in_proximity;
+
+ for (i = 0; i < input->mt->num_slots; i++) {
+ struct input_mt_slot *ps = &input->mt->slots[i];
+ int id = input_mt_get_value(ps, ABS_MT_TRACKING_ID);
+ if (id >= 0)
+ count++;
+ }
+
+ return count;
+}
+
static int wacom_24hdt_irq(struct wacom_wac *wacom)
{
struct input_dev *input = wacom->input;
int num_contacts_left = 4; /* maximum contacts per packet */
int byte_per_packet = WACOM_BYTES_PER_24HDT_PACKET;
int y_offset = 2;
- static int contact_with_no_pen_down_count = 0;
if (wacom->features.type == WACOM_27QHDT) {
current_num_contacts = data[63];
* First packet resets the counter since only the first
* packet in series will have non-zero current_num_contacts.
*/
- if (current_num_contacts) {
+ if (current_num_contacts)
wacom->num_contacts_left = current_num_contacts;
- contact_with_no_pen_down_count = 0;
- }
contacts_to_send = min(num_contacts_left, wacom->num_contacts_left);
input_report_abs(input, ABS_MT_WIDTH_MINOR, min(w, h));
input_report_abs(input, ABS_MT_ORIENTATION, w > h);
}
- contact_with_no_pen_down_count++;
}
}
- input_mt_report_pointer_emulation(input, true);
+ input_mt_sync_frame(input);
wacom->num_contacts_left -= contacts_to_send;
if (wacom->num_contacts_left <= 0) {
wacom->num_contacts_left = 0;
- wacom->shared->touch_down = (contact_with_no_pen_down_count > 0);
+ wacom->shared->touch_down = wacom_wac_finger_count_touches(wacom);
}
return 1;
}
int current_num_contacts = data[2];
int contacts_to_send = 0;
int x_offset = 0;
- static int contact_with_no_pen_down_count = 0;
/* MTTPC does not support Height and Width */
if (wacom->features.type == MTTPC || wacom->features.type == MTTPC_B)
* First packet resets the counter since only the first
* packet in series will have non-zero current_num_contacts.
*/
- if (current_num_contacts) {
+ if (current_num_contacts)
wacom->num_contacts_left = current_num_contacts;
- contact_with_no_pen_down_count = 0;
- }
/* There are at most 5 contacts per packet */
contacts_to_send = min(5, wacom->num_contacts_left);
int y = get_unaligned_le16(&data[offset + x_offset + 9]);
input_report_abs(input, ABS_MT_POSITION_X, x);
input_report_abs(input, ABS_MT_POSITION_Y, y);
- contact_with_no_pen_down_count++;
}
}
- input_mt_report_pointer_emulation(input, true);
+ input_mt_sync_frame(input);
wacom->num_contacts_left -= contacts_to_send;
if (wacom->num_contacts_left <= 0) {
wacom->num_contacts_left = 0;
- wacom->shared->touch_down = (contact_with_no_pen_down_count > 0);
+ wacom->shared->touch_down = wacom_wac_finger_count_touches(wacom);
}
return 1;
}
{
struct input_dev *input = wacom->input;
unsigned char *data = wacom->data;
- int contact_with_no_pen_down_count = 0;
int i;
for (i = 0; i < 2; i++) {
input_report_abs(input, ABS_MT_POSITION_X, x);
input_report_abs(input, ABS_MT_POSITION_Y, y);
- contact_with_no_pen_down_count++;
}
}
- input_mt_report_pointer_emulation(input, true);
+ input_mt_sync_frame(input);
/* keep touch state for pen event */
- wacom->shared->touch_down = (contact_with_no_pen_down_count > 0);
+ wacom->shared->touch_down = wacom_wac_finger_count_touches(wacom);
return 1;
}
return 0;
}
-static int wacom_wac_finger_count_touches(struct hid_device *hdev)
-{
- struct wacom *wacom = hid_get_drvdata(hdev);
- struct wacom_wac *wacom_wac = &wacom->wacom_wac;
- struct input_dev *input = wacom_wac->input;
- unsigned touch_max = wacom_wac->features.touch_max;
- int count = 0;
- int i;
-
- if (touch_max == 1)
- return wacom_wac->hid_data.tipswitch &&
- !wacom_wac->shared->stylus_in_proximity;
-
- for (i = 0; i < input->mt->num_slots; i++) {
- struct input_mt_slot *ps = &input->mt->slots[i];
- int id = input_mt_get_value(ps, ABS_MT_TRACKING_ID);
- if (id >= 0)
- count++;
- }
-
- return count;
-}
-
static void wacom_wac_finger_report(struct hid_device *hdev,
struct hid_report *report)
{
input_sync(input);
/* keep touch state for pen event */
- wacom_wac->shared->touch_down = wacom_wac_finger_count_touches(hdev);
+ wacom_wac->shared->touch_down = wacom_wac_finger_count_touches(wacom_wac);
}
void wacom_wac_usage_mapping(struct hid_device *hdev,
struct input_dev *pad_input = wacom->pad_input;
unsigned char *data = wacom->data;
int i;
- int contact_with_no_pen_down_count = 0;
if (data[0] != 0x02)
return 0;
}
input_report_abs(input, ABS_MT_POSITION_X, x);
input_report_abs(input, ABS_MT_POSITION_Y, y);
- contact_with_no_pen_down_count++;
}
}
- input_mt_report_pointer_emulation(input, true);
+ input_mt_sync_frame(input);
input_report_key(pad_input, BTN_LEFT, (data[1] & 0x08) != 0);
input_report_key(pad_input, BTN_FORWARD, (data[1] & 0x04) != 0);
input_report_key(pad_input, BTN_BACK, (data[1] & 0x02) != 0);
input_report_key(pad_input, BTN_RIGHT, (data[1] & 0x01) != 0);
- wacom->shared->touch_down = (contact_with_no_pen_down_count > 0);
+ wacom->shared->touch_down = wacom_wac_finger_count_touches(wacom);
return 1;
}
-static int wacom_bpt3_touch_msg(struct wacom_wac *wacom, unsigned char *data, int last_touch_count)
+static void wacom_bpt3_touch_msg(struct wacom_wac *wacom, unsigned char *data)
{
struct wacom_features *features = &wacom->features;
struct input_dev *input = wacom->input;
int slot = input_mt_get_slot_by_key(input, data[0]);
if (slot < 0)
- return 0;
+ return;
touch = touch && !wacom->shared->stylus_in_proximity;
input_report_abs(input, ABS_MT_POSITION_Y, y);
input_report_abs(input, ABS_MT_TOUCH_MAJOR, width);
input_report_abs(input, ABS_MT_TOUCH_MINOR, height);
- last_touch_count++;
}
- return last_touch_count;
}
static void wacom_bpt3_button_msg(struct wacom_wac *wacom, unsigned char *data)
unsigned char *data = wacom->data;
int count = data[1] & 0x07;
int i;
- int contact_with_no_pen_down_count = 0;
if (data[0] != 0x02)
return 0;
int msg_id = data[offset];
if (msg_id >= 2 && msg_id <= 17)
- contact_with_no_pen_down_count =
- wacom_bpt3_touch_msg(wacom, data + offset,
- contact_with_no_pen_down_count);
+ wacom_bpt3_touch_msg(wacom, data + offset);
else if (msg_id == 128)
wacom_bpt3_button_msg(wacom, data + offset);
}
- input_mt_report_pointer_emulation(input, true);
- wacom->shared->touch_down = (contact_with_no_pen_down_count > 0);
+ input_mt_sync_frame(input);
+ wacom->shared->touch_down = wacom_wac_finger_count_touches(wacom);
return 1;
}
unsigned char *data = wacom->data;
int prox = 0, x = 0, y = 0, p = 0, d = 0, pen = 0, btn1 = 0, btn2 = 0;
- if (data[0] != WACOM_REPORT_PENABLED && data[0] != WACOM_REPORT_USB)
+ if (data[0] != WACOM_REPORT_PENABLED)
return 0;
- if (data[0] == WACOM_REPORT_USB) {
- if (features->type == INTUOSHT &&
- wacom->shared->touch_input &&
- features->touch_max) {
- input_report_switch(wacom->shared->touch_input,
- SW_MUTE_DEVICE, data[8] & 0x40);
- input_sync(wacom->shared->touch_input);
- }
- return 0;
- }
-
- if (wacom->shared->touch_down)
- return 0;
-
prox = (data[1] & 0x20) == 0x20;
/*
*
* Hardware does report zero in most out-of-prox cases but not all.
*/
- if (prox) {
- if (!wacom->shared->stylus_in_proximity) {
- if (data[1] & 0x08) {
- wacom->tool[0] = BTN_TOOL_RUBBER;
- wacom->id[0] = ERASER_DEVICE_ID;
- } else {
- wacom->tool[0] = BTN_TOOL_PEN;
- wacom->id[0] = STYLUS_DEVICE_ID;
- }
- wacom->shared->stylus_in_proximity = true;
+ if (!wacom->shared->stylus_in_proximity) {
+ if (data[1] & 0x08) {
+ wacom->tool[0] = BTN_TOOL_RUBBER;
+ wacom->id[0] = ERASER_DEVICE_ID;
+ } else {
+ wacom->tool[0] = BTN_TOOL_PEN;
+ wacom->id[0] = STYLUS_DEVICE_ID;
}
+ }
+
+ wacom->shared->stylus_in_proximity = prox;
+ if (wacom->shared->touch_down)
+ return 0;
+
+ if (prox) {
x = le16_to_cpup((__le16 *)&data[2]);
y = le16_to_cpup((__le16 *)&data[4]);
p = le16_to_cpup((__le16 *)&data[6]);
pen = data[1] & 0x01;
btn1 = data[1] & 0x02;
btn2 = data[1] & 0x04;
+ } else {
+ wacom->id[0] = 0;
}
input_report_key(input, BTN_TOUCH, pen);
input_report_abs(input, ABS_PRESSURE, p);
input_report_abs(input, ABS_DISTANCE, d);
- if (!prox) {
- wacom->id[0] = 0;
- wacom->shared->stylus_in_proximity = false;
- }
-
input_report_key(input, wacom->tool[0], prox); /* PEN or RUBBER */
input_report_abs(input, ABS_MISC, wacom->id[0]); /* TOOL ID */
return 0;
}
+static void wacom_bamboo_pad_pen_event(struct wacom_wac *wacom,
+ unsigned char *data)
+{
+ unsigned char prefix;
+
+ /*
+ * We need to reroute the event from the debug interface to the
+ * pen interface.
+ * We need to add the report ID to the actual pen report, so we
+ * temporary overwrite the first byte to prevent having to kzalloc/kfree
+ * and memcpy the report.
+ */
+ prefix = data[0];
+ data[0] = WACOM_REPORT_BPAD_PEN;
+
+ /*
+ * actually reroute the event.
+ * No need to check if wacom->shared->pen is valid, hid_input_report()
+ * will check for us.
+ */
+ hid_input_report(wacom->shared->pen, HID_INPUT_REPORT, data,
+ WACOM_PKGLEN_PENABLED, 1);
+
+ data[0] = prefix;
+}
+
+static int wacom_bamboo_pad_touch_event(struct wacom_wac *wacom,
+ unsigned char *data)
+{
+ struct input_dev *input = wacom->input;
+ unsigned char *finger_data, prefix;
+ unsigned id;
+ int x, y;
+ bool valid;
+
+ prefix = data[0];
+
+ for (id = 0; id < wacom->features.touch_max; id++) {
+ valid = !!(prefix & BIT(id)) &&
+ !wacom->shared->stylus_in_proximity;
+
+ input_mt_slot(input, id);
+ input_mt_report_slot_state(input, MT_TOOL_FINGER, valid);
+
+ if (!valid)
+ continue;
+
+ finger_data = data + 1 + id * 3;
+ x = finger_data[0] | ((finger_data[1] & 0x0f) << 8);
+ y = (finger_data[2] << 4) | (finger_data[1] >> 4);
+
+ input_report_abs(input, ABS_MT_POSITION_X, x);
+ input_report_abs(input, ABS_MT_POSITION_Y, y);
+ }
+
+ input_mt_sync_frame(input);
+
+ input_report_key(input, BTN_LEFT, prefix & 0x40);
+ input_report_key(input, BTN_RIGHT, prefix & 0x80);
+
+ /* keep touch state for pen event */
+ wacom->shared->touch_down = !!prefix &&
+ !wacom->shared->stylus_in_proximity;
+
+ return 1;
+}
+
+static int wacom_bamboo_pad_irq(struct wacom_wac *wacom, size_t len)
+{
+ unsigned char *data = wacom->data;
+
+ if (!((len == WACOM_PKGLEN_BPAD_TOUCH) ||
+ (len == WACOM_PKGLEN_BPAD_TOUCH_USB)) ||
+ (data[0] != WACOM_REPORT_BPAD_TOUCH))
+ return 0;
+
+ if (data[1] & 0x01)
+ wacom_bamboo_pad_pen_event(wacom, &data[1]);
+
+ if (data[1] & 0x02)
+ return wacom_bamboo_pad_touch_event(wacom, &data[9]);
+
+ return 0;
+}
+
static int wacom_wireless_irq(struct wacom_wac *wacom, size_t len)
{
unsigned char *data = wacom->data;
connected = data[1] & 0x01;
if (connected) {
- int pid, battery, ps_connected;
+ int pid, battery, charging;
if ((wacom->shared->type == INTUOSHT) &&
wacom->shared->touch_input &&
pid = get_unaligned_be16(&data[6]);
battery = (data[5] & 0x3f) * 100 / 31;
- ps_connected = !!(data[5] & 0x80);
+ charging = !!(data[5] & 0x80);
if (wacom->pid != pid) {
wacom->pid = pid;
wacom_schedule_work(wacom);
}
- if (wacom->shared->type &&
- (battery != wacom->battery_capacity ||
- ps_connected != wacom->ps_connected)) {
- wacom->battery_capacity = battery;
- wacom->ps_connected = ps_connected;
- wacom->bat_charging = ps_connected &&
- wacom->battery_capacity < 100;
- wacom_notify_battery(wacom);
- }
+ if (wacom->shared->type)
+ wacom_notify_battery(wacom, battery, charging, 1, 0);
+
} else if (wacom->pid != 0) {
/* disconnected while previously connected */
wacom->pid = 0;
wacom_schedule_work(wacom);
- wacom->battery_capacity = 0;
- wacom->bat_charging = 0;
- wacom->ps_connected = 0;
+ wacom_notify_battery(wacom, 0, 0, 0, 0);
+ }
+
+ return 0;
+}
+
+static int wacom_status_irq(struct wacom_wac *wacom_wac, size_t len)
+{
+ struct wacom *wacom = container_of(wacom_wac, struct wacom, wacom_wac);
+ struct wacom_features *features = &wacom_wac->features;
+ unsigned char *data = wacom_wac->data;
+
+ if (data[0] != WACOM_REPORT_USB)
+ return 0;
+
+ if (features->type == INTUOSHT &&
+ wacom_wac->shared->touch_input &&
+ features->touch_max) {
+ input_report_switch(wacom_wac->shared->touch_input,
+ SW_MUTE_DEVICE, data[8] & 0x40);
+ input_sync(wacom_wac->shared->touch_input);
}
+ if (data[9] & 0x02) { /* wireless module is attached */
+ int battery = (data[8] & 0x3f) * 100 / 31;
+ bool charging = !!(data[8] & 0x80);
+
+ wacom_notify_battery(wacom_wac, battery, charging,
+ battery || charging, 1);
+
+ if (!wacom->battery &&
+ !(features->quirks & WACOM_QUIRK_BATTERY)) {
+ features->quirks |= WACOM_QUIRK_BATTERY;
+ INIT_WORK(&wacom->work, wacom_battery_work);
+ wacom_schedule_work(wacom_wac);
+ }
+ }
+ else if ((features->quirks & WACOM_QUIRK_BATTERY) &&
+ wacom->battery) {
+ features->quirks &= ~WACOM_QUIRK_BATTERY;
+ INIT_WORK(&wacom->work, wacom_battery_work);
+ wacom_schedule_work(wacom_wac);
+ wacom_notify_battery(wacom_wac, 0, 0, 0, 0);
+ }
return 0;
}
case INTUOSPL:
if (len == WACOM_PKGLEN_BBTOUCH3)
sync = wacom_bpt3_touch(wacom_wac);
+ else if (wacom_wac->data[0] == WACOM_REPORT_USB)
+ sync = wacom_status_irq(wacom_wac, len);
else
sync = wacom_intuos_irq(wacom_wac);
break;
case BAMBOO_PT:
case INTUOSHT:
- sync = wacom_bpt_irq(wacom_wac, len);
+ if (wacom_wac->data[0] == WACOM_REPORT_USB)
+ sync = wacom_status_irq(wacom_wac, len);
+ else
+ sync = wacom_bpt_irq(wacom_wac, len);
+ break;
+
+ case BAMBOO_PAD:
+ sync = wacom_bamboo_pad_irq(wacom_wac, len);
break;
case WIRELESS:
features->y_max = 1023;
}
- /* these device have multiple inputs */
- if (features->type >= WIRELESS ||
- (features->type >= INTUOS5S && features->type <= INTUOSHT) ||
- (features->oVid && features->oPid))
- features->quirks |= WACOM_QUIRK_MULTI_INPUT;
-
/* quirk for bamboo touch with 2 low res touches */
if (features->type == BAMBOO_PT &&
features->pktlen == WACOM_PKGLEN_BBTOUCH) {
0, 0);
}
break;
+ case BAMBOO_PAD:
+ __clear_bit(ABS_MISC, input_dev->absbit);
+ input_mt_init_slots(input_dev, features->touch_max,
+ INPUT_MT_POINTER);
+ __set_bit(BTN_LEFT, input_dev->keybit);
+ __set_bit(BTN_RIGHT, input_dev->keybit);
+ break;
}
return 0;
}
{ "Wacom Cintiq 13HD", 59152, 33448, 1023, 63,
WACOM_13HD, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES,
WACOM_CINTIQ_OFFSET, WACOM_CINTIQ_OFFSET };
+static const struct wacom_features wacom_features_0x333 =
+ { "Wacom Cintiq 13HD touch", 59152, 33448, 2047, 63,
+ WACOM_13HD, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES,
+ WACOM_CINTIQ_OFFSET, WACOM_CINTIQ_OFFSET,
+ .oVid = USB_VENDOR_ID_WACOM, .oPid = 0x335 };
+static const struct wacom_features wacom_features_0x335 =
+ { "Wacom Cintiq 13HD touch", .type = WACOM_24HDT, /* Touch */
+ .oVid = USB_VENDOR_ID_WACOM, .oPid = 0x333, .touch_max = 10,
+ .check_for_hid_type = true, .hid_type = HID_TYPE_USBNONE };
static const struct wacom_features wacom_features_0xC7 =
{ "Wacom DTU1931", 37832, 30305, 511, 0,
PL, WACOM_INTUOS_RES, WACOM_INTUOS_RES };
{ "Wacom ISDv5 30C", .type = WACOM_24HDT, /* Touch */
.oVid = USB_VENDOR_ID_WACOM, .oPid = 0x30A, .touch_max = 10,
.check_for_hid_type = true, .hid_type = HID_TYPE_USBNONE };
+static const struct wacom_features wacom_features_0x318 =
+ { "Wacom USB Bamboo PAD", 4095, 4095, /* Touch */
+ .type = BAMBOO_PAD, 35, 48, .touch_max = 4 };
+static const struct wacom_features wacom_features_0x319 =
+ { "Wacom Wireless Bamboo PAD", 4095, 4095, /* Touch */
+ .type = BAMBOO_PAD, 35, 48, .touch_max = 4 };
static const struct wacom_features wacom_features_0x323 =
{ "Wacom Intuos P M", 21600, 13500, 1023, 31,
INTUOSHT, WACOM_INTUOS_RES, WACOM_INTUOS_RES,
HID_DEVICE(BUS_BLUETOOTH, HID_GROUP_WACOM, USB_VENDOR_ID_WACOM, prod),\
.driver_data = (kernel_ulong_t)&wacom_features_##prod
+#define I2C_DEVICE_WACOM(prod) \
+ HID_DEVICE(BUS_I2C, HID_GROUP_WACOM, USB_VENDOR_ID_WACOM, prod),\
+ .driver_data = (kernel_ulong_t)&wacom_features_##prod
+
#define USB_DEVICE_LENOVO(prod) \
HID_USB_DEVICE(USB_VENDOR_ID_LENOVO, prod), \
.driver_data = (kernel_ulong_t)&wacom_features_##prod
{ USB_DEVICE_WACOM(0x314) },
{ USB_DEVICE_WACOM(0x315) },
{ USB_DEVICE_WACOM(0x317) },
+ { USB_DEVICE_WACOM(0x318) },
+ { USB_DEVICE_WACOM(0x319) },
{ USB_DEVICE_WACOM(0x323) },
{ USB_DEVICE_WACOM(0x32A) },
{ USB_DEVICE_WACOM(0x32B) },
{ USB_DEVICE_WACOM(0x32C) },
{ USB_DEVICE_WACOM(0x32F) },
+ { USB_DEVICE_WACOM(0x333) },
+ { USB_DEVICE_WACOM(0x335) },
{ USB_DEVICE_WACOM(0x4001) },
{ USB_DEVICE_WACOM(0x4004) },
{ USB_DEVICE_WACOM(0x5000) },
{ USB_DEVICE_LENOVO(0x6004) },
{ USB_DEVICE_WACOM(HID_ANY_ID) },
+ { I2C_DEVICE_WACOM(HID_ANY_ID) },
{ }
};
MODULE_DEVICE_TABLE(hid, wacom_ids);
#define WACOM_PKGLEN_MTTPC 40
#define WACOM_PKGLEN_DTUS 68
#define WACOM_PKGLEN_PENABLED 8
+#define WACOM_PKGLEN_BPAD_TOUCH 32
+#define WACOM_PKGLEN_BPAD_TOUCH_USB 64
/* wacom data size per MT contact */
#define WACOM_BYTES_PER_MT_PACKET 11
#define WACOM_REPORT_24HDT 1
#define WACOM_REPORT_WL 128
#define WACOM_REPORT_USB 192
+#define WACOM_REPORT_BPAD_PEN 3
+#define WACOM_REPORT_BPAD_TOUCH 16
/* device quirks */
-#define WACOM_QUIRK_MULTI_INPUT 0x0001
-#define WACOM_QUIRK_BBTOUCH_LOWRES 0x0002
-#define WACOM_QUIRK_NO_INPUT 0x0004
-#define WACOM_QUIRK_MONITOR 0x0008
-#define WACOM_QUIRK_BATTERY 0x0010
+#define WACOM_QUIRK_BBTOUCH_LOWRES 0x0001
+#define WACOM_QUIRK_NO_INPUT 0x0002
+#define WACOM_QUIRK_MONITOR 0x0004
+#define WACOM_QUIRK_BATTERY 0x0008
#define WACOM_PEN_FIELD(f) (((f)->logical == HID_DG_STYLUS) || \
((f)->physical == HID_DG_STYLUS) || \
BAMBOO_PT,
WACOM_24HDT,
WACOM_27QHDT,
+ BAMBOO_PAD,
TABLETPC, /* add new TPC below */
TABLETPCE,
TABLETPC2FG,
unsigned touch_max;
int type;
struct input_dev *touch_input;
+ struct hid_device *pen;
+ struct hid_device *touch;
};
struct hid_data {
int battery_capacity;
int num_contacts_left;
int bat_charging;
+ int bat_connected;
int ps_connected;
u8 bt_features;
u8 bt_high_speed;
config NOKIA_MODEM
tristate "Nokia Modem"
- depends on HSI && SSI_PROTOCOL
+ depends on HSI && SSI_PROTOCOL && CMT_SPEECH
help
Say Y here if you want to add support for the modem on Nokia
N900 (Nokia RX-51) hardware.
If unsure, say N.
+config CMT_SPEECH
+ tristate "CMT speech"
+ depends on HSI && SSI_PROTOCOL
+ help
+ If you say Y here, you will enable the CMT speech protocol used
+ by Nokia modems. If you say M the protocol will be available as
+ module named cmt_speech.
+
+ If unsure, say N.
+
config SSI_PROTOCOL
tristate "SSI protocol"
depends on HSI && PHONET && OMAP_SSI
obj-$(CONFIG_NOKIA_MODEM) += nokia-modem.o
obj-$(CONFIG_SSI_PROTOCOL) += ssi_protocol.o
+obj-$(CONFIG_CMT_SPEECH) += cmt_speech.o
obj-$(CONFIG_HSI_CHAR) += hsi_char.o
--- /dev/null
+/*
+ * cmt_speech.c - HSI CMT speech driver
+ *
+ * Copyright (C) 2008,2009,2010 Nokia Corporation. All rights reserved.
+ *
+ * Contact: Kai Vehmanen <kai.vehmanen@nokia.com>
+ * Original author: Peter Ujfalusi <peter.ujfalusi@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ */
+
+#include <linux/errno.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+#include <linux/mm.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/poll.h>
+#include <linux/sched.h>
+#include <linux/ioctl.h>
+#include <linux/uaccess.h>
+#include <linux/pm_qos.h>
+#include <linux/hsi/hsi.h>
+#include <linux/hsi/ssi_protocol.h>
+#include <linux/hsi/cs-protocol.h>
+
+#define CS_MMAP_SIZE PAGE_SIZE
+
+struct char_queue {
+ struct list_head list;
+ u32 msg;
+};
+
+struct cs_char {
+ unsigned int opened;
+ struct hsi_client *cl;
+ struct cs_hsi_iface *hi;
+ struct list_head chardev_queue;
+ struct list_head dataind_queue;
+ int dataind_pending;
+ /* mmap things */
+ unsigned long mmap_base;
+ unsigned long mmap_size;
+ spinlock_t lock;
+ struct fasync_struct *async_queue;
+ wait_queue_head_t wait;
+ /* hsi channel ids */
+ int channel_id_cmd;
+ int channel_id_data;
+};
+
+#define SSI_CHANNEL_STATE_READING 1
+#define SSI_CHANNEL_STATE_WRITING (1 << 1)
+#define SSI_CHANNEL_STATE_POLL (1 << 2)
+#define SSI_CHANNEL_STATE_ERROR (1 << 3)
+
+#define TARGET_MASK 0xf000000
+#define TARGET_REMOTE (1 << CS_DOMAIN_SHIFT)
+#define TARGET_LOCAL 0
+
+/* Number of pre-allocated commands buffers */
+#define CS_MAX_CMDS 4
+
+/*
+ * During data transfers, transactions must be handled
+ * within 20ms (fixed value in cmtspeech HSI protocol)
+ */
+#define CS_QOS_LATENCY_FOR_DATA_USEC 20000
+
+/* Timeout to wait for pending HSI transfers to complete */
+#define CS_HSI_TRANSFER_TIMEOUT_MS 500
+
+
+#define RX_PTR_BOUNDARY_SHIFT 8
+#define RX_PTR_MAX_SHIFT (RX_PTR_BOUNDARY_SHIFT + \
+ CS_MAX_BUFFERS_SHIFT)
+struct cs_hsi_iface {
+ struct hsi_client *cl;
+ struct hsi_client *master;
+
+ unsigned int iface_state;
+ unsigned int wakeline_state;
+ unsigned int control_state;
+ unsigned int data_state;
+
+ /* state exposed to application */
+ struct cs_mmap_config_block *mmap_cfg;
+
+ unsigned long mmap_base;
+ unsigned long mmap_size;
+
+ unsigned int rx_slot;
+ unsigned int tx_slot;
+
+ /* note: for security reasons, we do not trust the contents of
+ * mmap_cfg, but instead duplicate the variables here */
+ unsigned int buf_size;
+ unsigned int rx_bufs;
+ unsigned int tx_bufs;
+ unsigned int rx_ptr_boundary;
+ unsigned int rx_offsets[CS_MAX_BUFFERS];
+ unsigned int tx_offsets[CS_MAX_BUFFERS];
+
+ /* size of aligned memory blocks */
+ unsigned int slot_size;
+ unsigned int flags;
+
+ struct list_head cmdqueue;
+
+ struct hsi_msg *data_rx_msg;
+ struct hsi_msg *data_tx_msg;
+ wait_queue_head_t datawait;
+
+ struct pm_qos_request pm_qos_req;
+
+ spinlock_t lock;
+};
+
+static struct cs_char cs_char_data;
+
+static void cs_hsi_read_on_control(struct cs_hsi_iface *hi);
+static void cs_hsi_read_on_data(struct cs_hsi_iface *hi);
+
+static inline void rx_ptr_shift_too_big(void)
+{
+ BUILD_BUG_ON((1LLU << RX_PTR_MAX_SHIFT) > UINT_MAX);
+}
+
+static void cs_notify(u32 message, struct list_head *head)
+{
+ struct char_queue *entry;
+
+ spin_lock(&cs_char_data.lock);
+
+ if (!cs_char_data.opened) {
+ spin_unlock(&cs_char_data.lock);
+ goto out;
+ }
+
+ entry = kmalloc(sizeof(*entry), GFP_ATOMIC);
+ if (!entry) {
+ dev_err(&cs_char_data.cl->device,
+ "Can't allocate new entry for the queue.\n");
+ spin_unlock(&cs_char_data.lock);
+ goto out;
+ }
+
+ entry->msg = message;
+ list_add_tail(&entry->list, head);
+
+ spin_unlock(&cs_char_data.lock);
+
+ wake_up_interruptible(&cs_char_data.wait);
+ kill_fasync(&cs_char_data.async_queue, SIGIO, POLL_IN);
+
+out:
+ return;
+}
+
+static u32 cs_pop_entry(struct list_head *head)
+{
+ struct char_queue *entry;
+ u32 data;
+
+ entry = list_entry(head->next, struct char_queue, list);
+ data = entry->msg;
+ list_del(&entry->list);
+ kfree(entry);
+
+ return data;
+}
+
+static void cs_notify_control(u32 message)
+{
+ cs_notify(message, &cs_char_data.chardev_queue);
+}
+
+static void cs_notify_data(u32 message, int maxlength)
+{
+ cs_notify(message, &cs_char_data.dataind_queue);
+
+ spin_lock(&cs_char_data.lock);
+ cs_char_data.dataind_pending++;
+ while (cs_char_data.dataind_pending > maxlength &&
+ !list_empty(&cs_char_data.dataind_queue)) {
+ dev_dbg(&cs_char_data.cl->device, "data notification "
+ "queue overrun (%u entries)\n", cs_char_data.dataind_pending);
+
+ cs_pop_entry(&cs_char_data.dataind_queue);
+ cs_char_data.dataind_pending--;
+ }
+ spin_unlock(&cs_char_data.lock);
+}
+
+static inline void cs_set_cmd(struct hsi_msg *msg, u32 cmd)
+{
+ u32 *data = sg_virt(msg->sgt.sgl);
+ *data = cmd;
+}
+
+static inline u32 cs_get_cmd(struct hsi_msg *msg)
+{
+ u32 *data = sg_virt(msg->sgt.sgl);
+ return *data;
+}
+
+static void cs_release_cmd(struct hsi_msg *msg)
+{
+ struct cs_hsi_iface *hi = msg->context;
+
+ list_add_tail(&msg->link, &hi->cmdqueue);
+}
+
+static void cs_cmd_destructor(struct hsi_msg *msg)
+{
+ struct cs_hsi_iface *hi = msg->context;
+
+ spin_lock(&hi->lock);
+
+ dev_dbg(&cs_char_data.cl->device, "control cmd destructor\n");
+
+ if (hi->iface_state != CS_STATE_CLOSED)
+ dev_err(&hi->cl->device, "Cmd flushed while driver active\n");
+
+ if (msg->ttype == HSI_MSG_READ)
+ hi->control_state &=
+ ~(SSI_CHANNEL_STATE_POLL | SSI_CHANNEL_STATE_READING);
+ else if (msg->ttype == HSI_MSG_WRITE &&
+ hi->control_state & SSI_CHANNEL_STATE_WRITING)
+ hi->control_state &= ~SSI_CHANNEL_STATE_WRITING;
+
+ cs_release_cmd(msg);
+
+ spin_unlock(&hi->lock);
+}
+
+static struct hsi_msg *cs_claim_cmd(struct cs_hsi_iface* ssi)
+{
+ struct hsi_msg *msg;
+
+ BUG_ON(list_empty(&ssi->cmdqueue));
+
+ msg = list_first_entry(&ssi->cmdqueue, struct hsi_msg, link);
+ list_del(&msg->link);
+ msg->destructor = cs_cmd_destructor;
+
+ return msg;
+}
+
+static void cs_free_cmds(struct cs_hsi_iface *ssi)
+{
+ struct hsi_msg *msg, *tmp;
+
+ list_for_each_entry_safe(msg, tmp, &ssi->cmdqueue, link) {
+ list_del(&msg->link);
+ msg->destructor = NULL;
+ kfree(sg_virt(msg->sgt.sgl));
+ hsi_free_msg(msg);
+ }
+}
+
+static int cs_alloc_cmds(struct cs_hsi_iface *hi)
+{
+ struct hsi_msg *msg;
+ u32 *buf;
+ unsigned int i;
+
+ INIT_LIST_HEAD(&hi->cmdqueue);
+
+ for (i = 0; i < CS_MAX_CMDS; i++) {
+ msg = hsi_alloc_msg(1, GFP_KERNEL);
+ if (!msg)
+ goto out;
+ buf = kmalloc(sizeof(*buf), GFP_KERNEL);
+ if (!buf) {
+ hsi_free_msg(msg);
+ goto out;
+ }
+ sg_init_one(msg->sgt.sgl, buf, sizeof(*buf));
+ msg->channel = cs_char_data.channel_id_cmd;
+ msg->context = hi;
+ list_add_tail(&msg->link, &hi->cmdqueue);
+ }
+
+ return 0;
+
+out:
+ cs_free_cmds(hi);
+ return -ENOMEM;
+}
+
+static void cs_hsi_data_destructor(struct hsi_msg *msg)
+{
+ struct cs_hsi_iface *hi = msg->context;
+ const char *dir = (msg->ttype == HSI_MSG_READ) ? "TX" : "RX";
+
+ dev_dbg(&cs_char_data.cl->device, "Freeing data %s message\n", dir);
+
+ spin_lock(&hi->lock);
+ if (hi->iface_state != CS_STATE_CLOSED)
+ dev_err(&cs_char_data.cl->device,
+ "Data %s flush while device active\n", dir);
+ if (msg->ttype == HSI_MSG_READ)
+ hi->data_state &=
+ ~(SSI_CHANNEL_STATE_POLL | SSI_CHANNEL_STATE_READING);
+ else
+ hi->data_state &= ~SSI_CHANNEL_STATE_WRITING;
+
+ msg->status = HSI_STATUS_COMPLETED;
+ if (unlikely(waitqueue_active(&hi->datawait)))
+ wake_up_interruptible(&hi->datawait);
+
+ spin_unlock(&hi->lock);
+}
+
+static int cs_hsi_alloc_data(struct cs_hsi_iface *hi)
+{
+ struct hsi_msg *txmsg, *rxmsg;
+ int res = 0;
+
+ rxmsg = hsi_alloc_msg(1, GFP_KERNEL);
+ if (!rxmsg) {
+ res = -ENOMEM;
+ goto out1;
+ }
+ rxmsg->channel = cs_char_data.channel_id_data;
+ rxmsg->destructor = cs_hsi_data_destructor;
+ rxmsg->context = hi;
+
+ txmsg = hsi_alloc_msg(1, GFP_KERNEL);
+ if (!txmsg) {
+ res = -ENOMEM;
+ goto out2;
+ }
+ txmsg->channel = cs_char_data.channel_id_data;
+ txmsg->destructor = cs_hsi_data_destructor;
+ txmsg->context = hi;
+
+ hi->data_rx_msg = rxmsg;
+ hi->data_tx_msg = txmsg;
+
+ return 0;
+
+out2:
+ hsi_free_msg(rxmsg);
+out1:
+ return res;
+}
+
+static void cs_hsi_free_data_msg(struct hsi_msg *msg)
+{
+ WARN_ON(msg->status != HSI_STATUS_COMPLETED &&
+ msg->status != HSI_STATUS_ERROR);
+ hsi_free_msg(msg);
+}
+
+static void cs_hsi_free_data(struct cs_hsi_iface *hi)
+{
+ cs_hsi_free_data_msg(hi->data_rx_msg);
+ cs_hsi_free_data_msg(hi->data_tx_msg);
+}
+
+static inline void __cs_hsi_error_pre(struct cs_hsi_iface *hi,
+ struct hsi_msg *msg, const char *info,
+ unsigned int *state)
+{
+ spin_lock(&hi->lock);
+ dev_err(&hi->cl->device, "HSI %s error, msg %d, state %u\n",
+ info, msg->status, *state);
+}
+
+static inline void __cs_hsi_error_post(struct cs_hsi_iface *hi)
+{
+ spin_unlock(&hi->lock);
+}
+
+static inline void __cs_hsi_error_read_bits(unsigned int *state)
+{
+ *state |= SSI_CHANNEL_STATE_ERROR;
+ *state &= ~(SSI_CHANNEL_STATE_READING | SSI_CHANNEL_STATE_POLL);
+}
+
+static inline void __cs_hsi_error_write_bits(unsigned int *state)
+{
+ *state |= SSI_CHANNEL_STATE_ERROR;
+ *state &= ~SSI_CHANNEL_STATE_WRITING;
+}
+
+static void cs_hsi_control_read_error(struct cs_hsi_iface *hi,
+ struct hsi_msg *msg)
+{
+ __cs_hsi_error_pre(hi, msg, "control read", &hi->control_state);
+ cs_release_cmd(msg);
+ __cs_hsi_error_read_bits(&hi->control_state);
+ __cs_hsi_error_post(hi);
+}
+
+static void cs_hsi_control_write_error(struct cs_hsi_iface *hi,
+ struct hsi_msg *msg)
+{
+ __cs_hsi_error_pre(hi, msg, "control write", &hi->control_state);
+ cs_release_cmd(msg);
+ __cs_hsi_error_write_bits(&hi->control_state);
+ __cs_hsi_error_post(hi);
+
+}
+
+static void cs_hsi_data_read_error(struct cs_hsi_iface *hi, struct hsi_msg *msg)
+{
+ __cs_hsi_error_pre(hi, msg, "data read", &hi->data_state);
+ __cs_hsi_error_read_bits(&hi->data_state);
+ __cs_hsi_error_post(hi);
+}
+
+static void cs_hsi_data_write_error(struct cs_hsi_iface *hi,
+ struct hsi_msg *msg)
+{
+ __cs_hsi_error_pre(hi, msg, "data write", &hi->data_state);
+ __cs_hsi_error_write_bits(&hi->data_state);
+ __cs_hsi_error_post(hi);
+}
+
+static void cs_hsi_read_on_control_complete(struct hsi_msg *msg)
+{
+ u32 cmd = cs_get_cmd(msg);
+ struct cs_hsi_iface *hi = msg->context;
+
+ spin_lock(&hi->lock);
+ hi->control_state &= ~SSI_CHANNEL_STATE_READING;
+ if (msg->status == HSI_STATUS_ERROR) {
+ dev_err(&hi->cl->device, "Control RX error detected\n");
+ cs_hsi_control_read_error(hi, msg);
+ spin_unlock(&hi->lock);
+ goto out;
+ }
+ dev_dbg(&hi->cl->device, "Read on control: %08X\n", cmd);
+ cs_release_cmd(msg);
+ if (hi->flags & CS_FEAT_TSTAMP_RX_CTRL) {
+ struct timespec *tstamp =
+ &hi->mmap_cfg->tstamp_rx_ctrl;
+ do_posix_clock_monotonic_gettime(tstamp);
+ }
+ spin_unlock(&hi->lock);
+
+ cs_notify_control(cmd);
+
+out:
+ cs_hsi_read_on_control(hi);
+}
+
+static void cs_hsi_peek_on_control_complete(struct hsi_msg *msg)
+{
+ struct cs_hsi_iface *hi = msg->context;
+ int ret;
+
+ if (msg->status == HSI_STATUS_ERROR) {
+ dev_err(&hi->cl->device, "Control peek RX error detected\n");
+ cs_hsi_control_read_error(hi, msg);
+ return;
+ }
+
+ WARN_ON(!(hi->control_state & SSI_CHANNEL_STATE_READING));
+
+ dev_dbg(&hi->cl->device, "Peek on control complete, reading\n");
+ msg->sgt.nents = 1;
+ msg->complete = cs_hsi_read_on_control_complete;
+ ret = hsi_async_read(hi->cl, msg);
+ if (ret)
+ cs_hsi_control_read_error(hi, msg);
+}
+
+static void cs_hsi_read_on_control(struct cs_hsi_iface *hi)
+{
+ struct hsi_msg *msg;
+ int ret;
+
+ spin_lock(&hi->lock);
+ if (hi->control_state & SSI_CHANNEL_STATE_READING) {
+ dev_err(&hi->cl->device, "Control read already pending (%d)\n",
+ hi->control_state);
+ spin_unlock(&hi->lock);
+ return;
+ }
+ if (hi->control_state & SSI_CHANNEL_STATE_ERROR) {
+ dev_err(&hi->cl->device, "Control read error (%d)\n",
+ hi->control_state);
+ spin_unlock(&hi->lock);
+ return;
+ }
+ hi->control_state |= SSI_CHANNEL_STATE_READING;
+ dev_dbg(&hi->cl->device, "Issuing RX on control\n");
+ msg = cs_claim_cmd(hi);
+ spin_unlock(&hi->lock);
+
+ msg->sgt.nents = 0;
+ msg->complete = cs_hsi_peek_on_control_complete;
+ ret = hsi_async_read(hi->cl, msg);
+ if (ret)
+ cs_hsi_control_read_error(hi, msg);
+}
+
+static void cs_hsi_write_on_control_complete(struct hsi_msg *msg)
+{
+ struct cs_hsi_iface *hi = msg->context;
+ if (msg->status == HSI_STATUS_COMPLETED) {
+ spin_lock(&hi->lock);
+ hi->control_state &= ~SSI_CHANNEL_STATE_WRITING;
+ cs_release_cmd(msg);
+ spin_unlock(&hi->lock);
+ } else if (msg->status == HSI_STATUS_ERROR) {
+ cs_hsi_control_write_error(hi, msg);
+ } else {
+ dev_err(&hi->cl->device,
+ "unexpected status in control write callback %d\n",
+ msg->status);
+ }
+}
+
+static int cs_hsi_write_on_control(struct cs_hsi_iface *hi, u32 message)
+{
+ struct hsi_msg *msg;
+ int ret;
+
+ spin_lock(&hi->lock);
+ if (hi->control_state & SSI_CHANNEL_STATE_ERROR) {
+ spin_unlock(&hi->lock);
+ return -EIO;
+ }
+ if (hi->control_state & SSI_CHANNEL_STATE_WRITING) {
+ dev_err(&hi->cl->device,
+ "Write still pending on control channel.\n");
+ spin_unlock(&hi->lock);
+ return -EBUSY;
+ }
+ hi->control_state |= SSI_CHANNEL_STATE_WRITING;
+ msg = cs_claim_cmd(hi);
+ spin_unlock(&hi->lock);
+
+ cs_set_cmd(msg, message);
+ msg->sgt.nents = 1;
+ msg->complete = cs_hsi_write_on_control_complete;
+ dev_dbg(&hi->cl->device,
+ "Sending control message %08X\n", message);
+ ret = hsi_async_write(hi->cl, msg);
+ if (ret) {
+ dev_err(&hi->cl->device,
+ "async_write failed with %d\n", ret);
+ cs_hsi_control_write_error(hi, msg);
+ }
+
+ /*
+ * Make sure control read is always pending when issuing
+ * new control writes. This is needed as the controller
+ * may flush our messages if e.g. the peer device reboots
+ * unexpectedly (and we cannot directly resubmit a new read from
+ * the message destructor; see cs_cmd_destructor()).
+ */
+ if (!(hi->control_state & SSI_CHANNEL_STATE_READING)) {
+ dev_err(&hi->cl->device, "Restarting control reads\n");
+ cs_hsi_read_on_control(hi);
+ }
+
+ return 0;
+}
+
+static void cs_hsi_read_on_data_complete(struct hsi_msg *msg)
+{
+ struct cs_hsi_iface *hi = msg->context;
+ u32 payload;
+
+ if (unlikely(msg->status == HSI_STATUS_ERROR)) {
+ cs_hsi_data_read_error(hi, msg);
+ return;
+ }
+
+ spin_lock(&hi->lock);
+ WARN_ON(!(hi->data_state & SSI_CHANNEL_STATE_READING));
+ hi->data_state &= ~SSI_CHANNEL_STATE_READING;
+ payload = CS_RX_DATA_RECEIVED;
+ payload |= hi->rx_slot;
+ hi->rx_slot++;
+ hi->rx_slot %= hi->rx_ptr_boundary;
+ /* expose current rx ptr in mmap area */
+ hi->mmap_cfg->rx_ptr = hi->rx_slot;
+ if (unlikely(waitqueue_active(&hi->datawait)))
+ wake_up_interruptible(&hi->datawait);
+ spin_unlock(&hi->lock);
+
+ cs_notify_data(payload, hi->rx_bufs);
+ cs_hsi_read_on_data(hi);
+}
+
+static void cs_hsi_peek_on_data_complete(struct hsi_msg *msg)
+{
+ struct cs_hsi_iface *hi = msg->context;
+ u32 *address;
+ int ret;
+
+ if (unlikely(msg->status == HSI_STATUS_ERROR)) {
+ cs_hsi_data_read_error(hi, msg);
+ return;
+ }
+ if (unlikely(hi->iface_state != CS_STATE_CONFIGURED)) {
+ dev_err(&hi->cl->device, "Data received in invalid state\n");
+ cs_hsi_data_read_error(hi, msg);
+ return;
+ }
+
+ spin_lock(&hi->lock);
+ WARN_ON(!(hi->data_state & SSI_CHANNEL_STATE_POLL));
+ hi->data_state &= ~SSI_CHANNEL_STATE_POLL;
+ hi->data_state |= SSI_CHANNEL_STATE_READING;
+ spin_unlock(&hi->lock);
+
+ address = (u32 *)(hi->mmap_base +
+ hi->rx_offsets[hi->rx_slot % hi->rx_bufs]);
+ sg_init_one(msg->sgt.sgl, address, hi->buf_size);
+ msg->sgt.nents = 1;
+ msg->complete = cs_hsi_read_on_data_complete;
+ ret = hsi_async_read(hi->cl, msg);
+ if (ret)
+ cs_hsi_data_read_error(hi, msg);
+}
+
+/*
+ * Read/write transaction is ongoing. Returns false if in
+ * SSI_CHANNEL_STATE_POLL state.
+ */
+static inline int cs_state_xfer_active(unsigned int state)
+{
+ return (state & SSI_CHANNEL_STATE_WRITING) ||
+ (state & SSI_CHANNEL_STATE_READING);
+}
+
+/*
+ * No pending read/writes
+ */
+static inline int cs_state_idle(unsigned int state)
+{
+ return !(state & ~SSI_CHANNEL_STATE_ERROR);
+}
+
+static void cs_hsi_read_on_data(struct cs_hsi_iface *hi)
+{
+ struct hsi_msg *rxmsg;
+ int ret;
+
+ spin_lock(&hi->lock);
+ if (hi->data_state &
+ (SSI_CHANNEL_STATE_READING | SSI_CHANNEL_STATE_POLL)) {
+ dev_dbg(&hi->cl->device, "Data read already pending (%u)\n",
+ hi->data_state);
+ spin_unlock(&hi->lock);
+ return;
+ }
+ hi->data_state |= SSI_CHANNEL_STATE_POLL;
+ spin_unlock(&hi->lock);
+
+ rxmsg = hi->data_rx_msg;
+ sg_init_one(rxmsg->sgt.sgl, (void *)hi->mmap_base, 0);
+ rxmsg->sgt.nents = 0;
+ rxmsg->complete = cs_hsi_peek_on_data_complete;
+
+ ret = hsi_async_read(hi->cl, rxmsg);
+ if (ret)
+ cs_hsi_data_read_error(hi, rxmsg);
+}
+
+static void cs_hsi_write_on_data_complete(struct hsi_msg *msg)
+{
+ struct cs_hsi_iface *hi = msg->context;
+
+ if (msg->status == HSI_STATUS_COMPLETED) {
+ spin_lock(&hi->lock);
+ hi->data_state &= ~SSI_CHANNEL_STATE_WRITING;
+ if (unlikely(waitqueue_active(&hi->datawait)))
+ wake_up_interruptible(&hi->datawait);
+ spin_unlock(&hi->lock);
+ } else {
+ cs_hsi_data_write_error(hi, msg);
+ }
+}
+
+static int cs_hsi_write_on_data(struct cs_hsi_iface *hi, unsigned int slot)
+{
+ u32 *address;
+ struct hsi_msg *txmsg;
+ int ret;
+
+ spin_lock(&hi->lock);
+ if (hi->iface_state != CS_STATE_CONFIGURED) {
+ dev_err(&hi->cl->device, "Not configured, aborting\n");
+ ret = -EINVAL;
+ goto error;
+ }
+ if (hi->data_state & SSI_CHANNEL_STATE_ERROR) {
+ dev_err(&hi->cl->device, "HSI error, aborting\n");
+ ret = -EIO;
+ goto error;
+ }
+ if (hi->data_state & SSI_CHANNEL_STATE_WRITING) {
+ dev_err(&hi->cl->device, "Write pending on data channel.\n");
+ ret = -EBUSY;
+ goto error;
+ }
+ hi->data_state |= SSI_CHANNEL_STATE_WRITING;
+ spin_unlock(&hi->lock);
+
+ hi->tx_slot = slot;
+ address = (u32 *)(hi->mmap_base + hi->tx_offsets[hi->tx_slot]);
+ txmsg = hi->data_tx_msg;
+ sg_init_one(txmsg->sgt.sgl, address, hi->buf_size);
+ txmsg->complete = cs_hsi_write_on_data_complete;
+ ret = hsi_async_write(hi->cl, txmsg);
+ if (ret)
+ cs_hsi_data_write_error(hi, txmsg);
+
+ return ret;
+
+error:
+ spin_unlock(&hi->lock);
+ if (ret == -EIO)
+ cs_hsi_data_write_error(hi, hi->data_tx_msg);
+
+ return ret;
+}
+
+static unsigned int cs_hsi_get_state(struct cs_hsi_iface *hi)
+{
+ return hi->iface_state;
+}
+
+static int cs_hsi_command(struct cs_hsi_iface *hi, u32 cmd)
+{
+ int ret = 0;
+
+ local_bh_disable();
+ switch (cmd & TARGET_MASK) {
+ case TARGET_REMOTE:
+ ret = cs_hsi_write_on_control(hi, cmd);
+ break;
+ case TARGET_LOCAL:
+ if ((cmd & CS_CMD_MASK) == CS_TX_DATA_READY)
+ ret = cs_hsi_write_on_data(hi, cmd & CS_PARAM_MASK);
+ else
+ ret = -EINVAL;
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+ local_bh_enable();
+
+ return ret;
+}
+
+static void cs_hsi_set_wakeline(struct cs_hsi_iface *hi, bool new_state)
+{
+ int change = 0;
+
+ spin_lock_bh(&hi->lock);
+ if (hi->wakeline_state != new_state) {
+ hi->wakeline_state = new_state;
+ change = 1;
+ dev_dbg(&hi->cl->device, "setting wake line to %d (%p)\n",
+ new_state, hi->cl);
+ }
+ spin_unlock_bh(&hi->lock);
+
+ if (change) {
+ if (new_state)
+ ssip_slave_start_tx(hi->master);
+ else
+ ssip_slave_stop_tx(hi->master);
+ }
+
+ dev_dbg(&hi->cl->device, "wake line set to %d (%p)\n",
+ new_state, hi->cl);
+}
+
+static void set_buffer_sizes(struct cs_hsi_iface *hi, int rx_bufs, int tx_bufs)
+{
+ hi->rx_bufs = rx_bufs;
+ hi->tx_bufs = tx_bufs;
+ hi->mmap_cfg->rx_bufs = rx_bufs;
+ hi->mmap_cfg->tx_bufs = tx_bufs;
+
+ if (hi->flags & CS_FEAT_ROLLING_RX_COUNTER) {
+ /*
+ * For more robust overrun detection, let the rx
+ * pointer run in range 0..'boundary-1'. Boundary
+ * is a multiple of rx_bufs, and limited in max size
+ * by RX_PTR_MAX_SHIFT to allow for fast ptr-diff
+ * calculation.
+ */
+ hi->rx_ptr_boundary = (rx_bufs << RX_PTR_BOUNDARY_SHIFT);
+ hi->mmap_cfg->rx_ptr_boundary = hi->rx_ptr_boundary;
+ } else {
+ hi->rx_ptr_boundary = hi->rx_bufs;
+ }
+}
+
+static int check_buf_params(struct cs_hsi_iface *hi,
+ const struct cs_buffer_config *buf_cfg)
+{
+ size_t buf_size_aligned = L1_CACHE_ALIGN(buf_cfg->buf_size) *
+ (buf_cfg->rx_bufs + buf_cfg->tx_bufs);
+ size_t ctrl_size_aligned = L1_CACHE_ALIGN(sizeof(*hi->mmap_cfg));
+ int r = 0;
+
+ if (buf_cfg->rx_bufs > CS_MAX_BUFFERS ||
+ buf_cfg->tx_bufs > CS_MAX_BUFFERS) {
+ r = -EINVAL;
+ } else if ((buf_size_aligned + ctrl_size_aligned) >= hi->mmap_size) {
+ dev_err(&hi->cl->device, "No space for the requested buffer "
+ "configuration\n");
+ r = -ENOBUFS;
+ }
+
+ return r;
+}
+
+/**
+ * Block until pending data transfers have completed.
+ */
+static int cs_hsi_data_sync(struct cs_hsi_iface *hi)
+{
+ int r = 0;
+
+ spin_lock_bh(&hi->lock);
+
+ if (!cs_state_xfer_active(hi->data_state)) {
+ dev_dbg(&hi->cl->device, "hsi_data_sync break, idle\n");
+ goto out;
+ }
+
+ for (;;) {
+ int s;
+ DEFINE_WAIT(wait);
+ if (!cs_state_xfer_active(hi->data_state))
+ goto out;
+ if (signal_pending(current)) {
+ r = -ERESTARTSYS;
+ goto out;
+ }
+ /**
+ * prepare_to_wait must be called with hi->lock held
+ * so that callbacks can check for waitqueue_active()
+ */
+ prepare_to_wait(&hi->datawait, &wait, TASK_INTERRUPTIBLE);
+ spin_unlock_bh(&hi->lock);
+ s = schedule_timeout(
+ msecs_to_jiffies(CS_HSI_TRANSFER_TIMEOUT_MS));
+ spin_lock_bh(&hi->lock);
+ finish_wait(&hi->datawait, &wait);
+ if (!s) {
+ dev_dbg(&hi->cl->device,
+ "hsi_data_sync timeout after %d ms\n",
+ CS_HSI_TRANSFER_TIMEOUT_MS);
+ r = -EIO;
+ goto out;
+ }
+ }
+
+out:
+ spin_unlock_bh(&hi->lock);
+ dev_dbg(&hi->cl->device, "hsi_data_sync done with res %d\n", r);
+
+ return r;
+}
+
+static void cs_hsi_data_enable(struct cs_hsi_iface *hi,
+ struct cs_buffer_config *buf_cfg)
+{
+ unsigned int data_start, i;
+
+ BUG_ON(hi->buf_size == 0);
+
+ set_buffer_sizes(hi, buf_cfg->rx_bufs, buf_cfg->tx_bufs);
+
+ hi->slot_size = L1_CACHE_ALIGN(hi->buf_size);
+ dev_dbg(&hi->cl->device,
+ "setting slot size to %u, buf size %u, align %u\n",
+ hi->slot_size, hi->buf_size, L1_CACHE_BYTES);
+
+ data_start = L1_CACHE_ALIGN(sizeof(*hi->mmap_cfg));
+ dev_dbg(&hi->cl->device,
+ "setting data start at %u, cfg block %u, align %u\n",
+ data_start, sizeof(*hi->mmap_cfg), L1_CACHE_BYTES);
+
+ for (i = 0; i < hi->mmap_cfg->rx_bufs; i++) {
+ hi->rx_offsets[i] = data_start + i * hi->slot_size;
+ hi->mmap_cfg->rx_offsets[i] = hi->rx_offsets[i];
+ dev_dbg(&hi->cl->device, "DL buf #%u at %u\n",
+ i, hi->rx_offsets[i]);
+ }
+ for (i = 0; i < hi->mmap_cfg->tx_bufs; i++) {
+ hi->tx_offsets[i] = data_start +
+ (i + hi->mmap_cfg->rx_bufs) * hi->slot_size;
+ hi->mmap_cfg->tx_offsets[i] = hi->tx_offsets[i];
+ dev_dbg(&hi->cl->device, "UL buf #%u at %u\n",
+ i, hi->rx_offsets[i]);
+ }
+
+ hi->iface_state = CS_STATE_CONFIGURED;
+}
+
+static void cs_hsi_data_disable(struct cs_hsi_iface *hi, int old_state)
+{
+ if (old_state == CS_STATE_CONFIGURED) {
+ dev_dbg(&hi->cl->device,
+ "closing data channel with slot size 0\n");
+ hi->iface_state = CS_STATE_OPENED;
+ }
+}
+
+static int cs_hsi_buf_config(struct cs_hsi_iface *hi,
+ struct cs_buffer_config *buf_cfg)
+{
+ int r = 0;
+ unsigned int old_state = hi->iface_state;
+
+ spin_lock_bh(&hi->lock);
+ /* Prevent new transactions during buffer reconfig */
+ if (old_state == CS_STATE_CONFIGURED)
+ hi->iface_state = CS_STATE_OPENED;
+ spin_unlock_bh(&hi->lock);
+
+ /*
+ * make sure that no non-zero data reads are ongoing before
+ * proceeding to change the buffer layout
+ */
+ r = cs_hsi_data_sync(hi);
+ if (r < 0)
+ return r;
+
+ WARN_ON(cs_state_xfer_active(hi->data_state));
+
+ spin_lock_bh(&hi->lock);
+ r = check_buf_params(hi, buf_cfg);
+ if (r < 0)
+ goto error;
+
+ hi->buf_size = buf_cfg->buf_size;
+ hi->mmap_cfg->buf_size = hi->buf_size;
+ hi->flags = buf_cfg->flags;
+
+ hi->rx_slot = 0;
+ hi->tx_slot = 0;
+ hi->slot_size = 0;
+
+ if (hi->buf_size)
+ cs_hsi_data_enable(hi, buf_cfg);
+ else
+ cs_hsi_data_disable(hi, old_state);
+
+ spin_unlock_bh(&hi->lock);
+
+ if (old_state != hi->iface_state) {
+ if (hi->iface_state == CS_STATE_CONFIGURED) {
+ pm_qos_add_request(&hi->pm_qos_req,
+ PM_QOS_CPU_DMA_LATENCY,
+ CS_QOS_LATENCY_FOR_DATA_USEC);
+ local_bh_disable();
+ cs_hsi_read_on_data(hi);
+ local_bh_enable();
+ } else if (old_state == CS_STATE_CONFIGURED) {
+ pm_qos_remove_request(&hi->pm_qos_req);
+ }
+ }
+ return r;
+
+error:
+ spin_unlock_bh(&hi->lock);
+ return r;
+}
+
+static int cs_hsi_start(struct cs_hsi_iface **hi, struct hsi_client *cl,
+ unsigned long mmap_base, unsigned long mmap_size)
+{
+ int err = 0;
+ struct cs_hsi_iface *hsi_if = kzalloc(sizeof(*hsi_if), GFP_KERNEL);
+
+ dev_dbg(&cl->device, "cs_hsi_start\n");
+
+ if (!hsi_if) {
+ err = -ENOMEM;
+ goto leave0;
+ }
+ spin_lock_init(&hsi_if->lock);
+ hsi_if->cl = cl;
+ hsi_if->iface_state = CS_STATE_CLOSED;
+ hsi_if->mmap_cfg = (struct cs_mmap_config_block *)mmap_base;
+ hsi_if->mmap_base = mmap_base;
+ hsi_if->mmap_size = mmap_size;
+ memset(hsi_if->mmap_cfg, 0, sizeof(*hsi_if->mmap_cfg));
+ init_waitqueue_head(&hsi_if->datawait);
+ err = cs_alloc_cmds(hsi_if);
+ if (err < 0) {
+ dev_err(&cl->device, "Unable to alloc HSI messages\n");
+ goto leave1;
+ }
+ err = cs_hsi_alloc_data(hsi_if);
+ if (err < 0) {
+ dev_err(&cl->device, "Unable to alloc HSI messages for data\n");
+ goto leave2;
+ }
+ err = hsi_claim_port(cl, 1);
+ if (err < 0) {
+ dev_err(&cl->device,
+ "Could not open, HSI port already claimed\n");
+ goto leave3;
+ }
+ hsi_if->master = ssip_slave_get_master(cl);
+ if (IS_ERR(hsi_if->master)) {
+ err = PTR_ERR(hsi_if->master);
+ dev_err(&cl->device, "Could not get HSI master client\n");
+ goto leave4;
+ }
+ if (!ssip_slave_running(hsi_if->master)) {
+ err = -ENODEV;
+ dev_err(&cl->device,
+ "HSI port not initialized\n");
+ goto leave4;
+ }
+
+ hsi_if->iface_state = CS_STATE_OPENED;
+ local_bh_disable();
+ cs_hsi_read_on_control(hsi_if);
+ local_bh_enable();
+
+ dev_dbg(&cl->device, "cs_hsi_start...done\n");
+
+ BUG_ON(!hi);
+ *hi = hsi_if;
+
+ return 0;
+
+leave4:
+ hsi_release_port(cl);
+leave3:
+ cs_hsi_free_data(hsi_if);
+leave2:
+ cs_free_cmds(hsi_if);
+leave1:
+ kfree(hsi_if);
+leave0:
+ dev_dbg(&cl->device, "cs_hsi_start...done/error\n\n");
+
+ return err;
+}
+
+static void cs_hsi_stop(struct cs_hsi_iface *hi)
+{
+ dev_dbg(&hi->cl->device, "cs_hsi_stop\n");
+ cs_hsi_set_wakeline(hi, 0);
+ ssip_slave_put_master(hi->master);
+
+ /* hsi_release_port() needs to be called with CS_STATE_CLOSED */
+ hi->iface_state = CS_STATE_CLOSED;
+ hsi_release_port(hi->cl);
+
+ /*
+ * hsi_release_port() should flush out all the pending
+ * messages, so cs_state_idle() should be true for both
+ * control and data channels.
+ */
+ WARN_ON(!cs_state_idle(hi->control_state));
+ WARN_ON(!cs_state_idle(hi->data_state));
+
+ if (pm_qos_request_active(&hi->pm_qos_req))
+ pm_qos_remove_request(&hi->pm_qos_req);
+
+ spin_lock_bh(&hi->lock);
+ cs_hsi_free_data(hi);
+ cs_free_cmds(hi);
+ spin_unlock_bh(&hi->lock);
+ kfree(hi);
+}
+
+static int cs_char_vma_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
+{
+ struct cs_char *csdata = vma->vm_private_data;
+ struct page *page;
+
+ page = virt_to_page(csdata->mmap_base);
+ get_page(page);
+ vmf->page = page;
+
+ return 0;
+}
+
+static struct vm_operations_struct cs_char_vm_ops = {
+ .fault = cs_char_vma_fault,
+};
+
+static int cs_char_fasync(int fd, struct file *file, int on)
+{
+ struct cs_char *csdata = file->private_data;
+
+ if (fasync_helper(fd, file, on, &csdata->async_queue) < 0)
+ return -EIO;
+
+ return 0;
+}
+
+static unsigned int cs_char_poll(struct file *file, poll_table *wait)
+{
+ struct cs_char *csdata = file->private_data;
+ unsigned int ret = 0;
+
+ poll_wait(file, &cs_char_data.wait, wait);
+ spin_lock_bh(&csdata->lock);
+ if (!list_empty(&csdata->chardev_queue))
+ ret = POLLIN | POLLRDNORM;
+ else if (!list_empty(&csdata->dataind_queue))
+ ret = POLLIN | POLLRDNORM;
+ spin_unlock_bh(&csdata->lock);
+
+ return ret;
+}
+
+static ssize_t cs_char_read(struct file *file, char __user *buf, size_t count,
+ loff_t *unused)
+{
+ struct cs_char *csdata = file->private_data;
+ u32 data;
+ ssize_t retval;
+
+ if (count < sizeof(data))
+ return -EINVAL;
+
+ for (;;) {
+ DEFINE_WAIT(wait);
+
+ spin_lock_bh(&csdata->lock);
+ if (!list_empty(&csdata->chardev_queue)) {
+ data = cs_pop_entry(&csdata->chardev_queue);
+ } else if (!list_empty(&csdata->dataind_queue)) {
+ data = cs_pop_entry(&csdata->dataind_queue);
+ csdata->dataind_pending--;
+ } else {
+ data = 0;
+ }
+ spin_unlock_bh(&csdata->lock);
+
+ if (data)
+ break;
+ if (file->f_flags & O_NONBLOCK) {
+ retval = -EAGAIN;
+ goto out;
+ } else if (signal_pending(current)) {
+ retval = -ERESTARTSYS;
+ goto out;
+ }
+ prepare_to_wait_exclusive(&csdata->wait, &wait,
+ TASK_INTERRUPTIBLE);
+ schedule();
+ finish_wait(&csdata->wait, &wait);
+ }
+
+ retval = put_user(data, (u32 __user *)buf);
+ if (!retval)
+ retval = sizeof(data);
+
+out:
+ return retval;
+}
+
+static ssize_t cs_char_write(struct file *file, const char __user *buf,
+ size_t count, loff_t *unused)
+{
+ struct cs_char *csdata = file->private_data;
+ u32 data;
+ int err;
+ ssize_t retval;
+
+ if (count < sizeof(data))
+ return -EINVAL;
+
+ if (get_user(data, (u32 __user *)buf))
+ retval = -EFAULT;
+ else
+ retval = count;
+
+ err = cs_hsi_command(csdata->hi, data);
+ if (err < 0)
+ retval = err;
+
+ return retval;
+}
+
+static long cs_char_ioctl(struct file *file, unsigned int cmd,
+ unsigned long arg)
+{
+ struct cs_char *csdata = file->private_data;
+ int r = 0;
+
+ switch (cmd) {
+ case CS_GET_STATE: {
+ unsigned int state;
+
+ state = cs_hsi_get_state(csdata->hi);
+ if (copy_to_user((void __user *)arg, &state, sizeof(state)))
+ r = -EFAULT;
+
+ break;
+ }
+ case CS_SET_WAKELINE: {
+ unsigned int state;
+
+ if (copy_from_user(&state, (void __user *)arg, sizeof(state))) {
+ r = -EFAULT;
+ break;
+ }
+
+ if (state > 1) {
+ r = -EINVAL;
+ break;
+ }
+
+ cs_hsi_set_wakeline(csdata->hi, !!state);
+
+ break;
+ }
+ case CS_GET_IF_VERSION: {
+ unsigned int ifver = CS_IF_VERSION;
+
+ if (copy_to_user((void __user *)arg, &ifver, sizeof(ifver)))
+ r = -EFAULT;
+
+ break;
+ }
+ case CS_CONFIG_BUFS: {
+ struct cs_buffer_config buf_cfg;
+
+ if (copy_from_user(&buf_cfg, (void __user *)arg,
+ sizeof(buf_cfg)))
+ r = -EFAULT;
+ else
+ r = cs_hsi_buf_config(csdata->hi, &buf_cfg);
+
+ break;
+ }
+ default:
+ r = -ENOTTY;
+ break;
+ }
+
+ return r;
+}
+
+static int cs_char_mmap(struct file *file, struct vm_area_struct *vma)
+{
+ if (vma->vm_end < vma->vm_start)
+ return -EINVAL;
+
+ if (((vma->vm_end - vma->vm_start) >> PAGE_SHIFT) != 1)
+ return -EINVAL;
+
+ vma->vm_flags |= VM_IO | VM_DONTDUMP | VM_DONTEXPAND;
+ vma->vm_ops = &cs_char_vm_ops;
+ vma->vm_private_data = file->private_data;
+
+ return 0;
+}
+
+static int cs_char_open(struct inode *unused, struct file *file)
+{
+ int ret = 0;
+ unsigned long p;
+
+ spin_lock_bh(&cs_char_data.lock);
+ if (cs_char_data.opened) {
+ ret = -EBUSY;
+ spin_unlock_bh(&cs_char_data.lock);
+ goto out1;
+ }
+ cs_char_data.opened = 1;
+ cs_char_data.dataind_pending = 0;
+ spin_unlock_bh(&cs_char_data.lock);
+
+ p = get_zeroed_page(GFP_KERNEL);
+ if (!p) {
+ ret = -ENOMEM;
+ goto out2;
+ }
+
+ ret = cs_hsi_start(&cs_char_data.hi, cs_char_data.cl, p, CS_MMAP_SIZE);
+ if (ret) {
+ dev_err(&cs_char_data.cl->device, "Unable to initialize HSI\n");
+ goto out3;
+ }
+
+ /* these are only used in release so lock not needed */
+ cs_char_data.mmap_base = p;
+ cs_char_data.mmap_size = CS_MMAP_SIZE;
+
+ file->private_data = &cs_char_data;
+
+ return 0;
+
+out3:
+ free_page(p);
+out2:
+ spin_lock_bh(&cs_char_data.lock);
+ cs_char_data.opened = 0;
+ spin_unlock_bh(&cs_char_data.lock);
+out1:
+ return ret;
+}
+
+static void cs_free_char_queue(struct list_head *head)
+{
+ struct char_queue *entry;
+ struct list_head *cursor, *next;
+
+ if (!list_empty(head)) {
+ list_for_each_safe(cursor, next, head) {
+ entry = list_entry(cursor, struct char_queue, list);
+ list_del(&entry->list);
+ kfree(entry);
+ }
+ }
+
+}
+
+static int cs_char_release(struct inode *unused, struct file *file)
+{
+ struct cs_char *csdata = file->private_data;
+
+ cs_hsi_stop(csdata->hi);
+ spin_lock_bh(&csdata->lock);
+ csdata->hi = NULL;
+ free_page(csdata->mmap_base);
+ cs_free_char_queue(&csdata->chardev_queue);
+ cs_free_char_queue(&csdata->dataind_queue);
+ csdata->opened = 0;
+ spin_unlock_bh(&csdata->lock);
+
+ return 0;
+}
+
+static const struct file_operations cs_char_fops = {
+ .owner = THIS_MODULE,
+ .read = cs_char_read,
+ .write = cs_char_write,
+ .poll = cs_char_poll,
+ .unlocked_ioctl = cs_char_ioctl,
+ .mmap = cs_char_mmap,
+ .open = cs_char_open,
+ .release = cs_char_release,
+ .fasync = cs_char_fasync,
+};
+
+static struct miscdevice cs_char_miscdev = {
+ .minor = MISC_DYNAMIC_MINOR,
+ .name = "cmt_speech",
+ .fops = &cs_char_fops
+};
+
+static int cs_hsi_client_probe(struct device *dev)
+{
+ int err = 0;
+ struct hsi_client *cl = to_hsi_client(dev);
+
+ dev_dbg(dev, "hsi_client_probe\n");
+ init_waitqueue_head(&cs_char_data.wait);
+ spin_lock_init(&cs_char_data.lock);
+ cs_char_data.opened = 0;
+ cs_char_data.cl = cl;
+ cs_char_data.hi = NULL;
+ INIT_LIST_HEAD(&cs_char_data.chardev_queue);
+ INIT_LIST_HEAD(&cs_char_data.dataind_queue);
+
+ cs_char_data.channel_id_cmd = hsi_get_channel_id_by_name(cl,
+ "speech-control");
+ if (cs_char_data.channel_id_cmd < 0) {
+ err = cs_char_data.channel_id_cmd;
+ dev_err(dev, "Could not get cmd channel (%d)\n", err);
+ return err;
+ }
+
+ cs_char_data.channel_id_data = hsi_get_channel_id_by_name(cl,
+ "speech-data");
+ if (cs_char_data.channel_id_data < 0) {
+ err = cs_char_data.channel_id_data;
+ dev_err(dev, "Could not get data channel (%d)\n", err);
+ return err;
+ }
+
+ err = misc_register(&cs_char_miscdev);
+ if (err)
+ dev_err(dev, "Failed to register: %d\n", err);
+
+ return err;
+}
+
+static int cs_hsi_client_remove(struct device *dev)
+{
+ struct cs_hsi_iface *hi;
+
+ dev_dbg(dev, "hsi_client_remove\n");
+ misc_deregister(&cs_char_miscdev);
+ spin_lock_bh(&cs_char_data.lock);
+ hi = cs_char_data.hi;
+ cs_char_data.hi = NULL;
+ spin_unlock_bh(&cs_char_data.lock);
+ if (hi)
+ cs_hsi_stop(hi);
+
+ return 0;
+}
+
+static struct hsi_client_driver cs_hsi_driver = {
+ .driver = {
+ .name = "cmt-speech",
+ .owner = THIS_MODULE,
+ .probe = cs_hsi_client_probe,
+ .remove = cs_hsi_client_remove,
+ },
+};
+
+static int __init cs_char_init(void)
+{
+ pr_info("CMT speech driver added\n");
+ return hsi_register_client_driver(&cs_hsi_driver);
+}
+module_init(cs_char_init);
+
+static void __exit cs_char_exit(void)
+{
+ hsi_unregister_client_driver(&cs_hsi_driver);
+ pr_info("CMT speech driver removed\n");
+}
+module_exit(cs_char_exit);
+
+MODULE_ALIAS("hsi:cmt-speech");
+MODULE_AUTHOR("Kai Vehmanen <kai.vehmanen@nokia.com>");
+MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@nokia.com>");
+MODULE_DESCRIPTION("CMT speech driver");
+MODULE_LICENSE("GPL v2");
struct nokia_modem_gpio *gpios;
int gpio_amount;
struct hsi_client *ssi_protocol;
+ struct hsi_client *cmt_speech;
};
static void do_nokia_modem_rst_ind_tasklet(unsigned long data)
struct hsi_port *port = hsi_get_port(cl);
int irq, pflags, err;
struct hsi_board_info ssip;
+ struct hsi_board_info cmtspeech;
np = dev->of_node;
if (!np) {
modem->ssi_protocol = hsi_new_client(port, &ssip);
if (!modem->ssi_protocol) {
dev_err(dev, "Could not register ssi-protocol device\n");
+ err = -ENOMEM;
goto error2;
}
goto error3;
}
- /* TODO: register cmt-speech hsi client */
+ cmtspeech.name = "cmt-speech";
+ cmtspeech.tx_cfg = cl->tx_cfg;
+ cmtspeech.rx_cfg = cl->rx_cfg;
+ cmtspeech.platform_data = NULL;
+ cmtspeech.archdata = NULL;
+
+ modem->cmt_speech = hsi_new_client(port, &cmtspeech);
+ if (!modem->cmt_speech) {
+ dev_err(dev, "Could not register cmt-speech device\n");
+ err = -ENOMEM;
+ goto error3;
+ }
+
+ err = device_attach(&modem->cmt_speech->device);
+ if (err == 0) {
+ dev_err(dev, "Missing cmt-speech driver\n");
+ err = -EPROBE_DEFER;
+ goto error4;
+ } else if (err < 0) {
+ dev_err(dev, "Could not load cmt-speech driver (%d)\n", err);
+ goto error4;
+ }
dev_info(dev, "Registered Nokia HSI modem\n");
return 0;
+error4:
+ hsi_remove_client(&modem->cmt_speech->device, NULL);
error3:
hsi_remove_client(&modem->ssi_protocol->device, NULL);
error2:
if (!modem)
return 0;
+ if (modem->cmt_speech) {
+ hsi_remove_client(&modem->cmt_speech->device, NULL);
+ modem->cmt_speech = NULL;
+ }
+
if (modem->ssi_protocol) {
hsi_remove_client(&modem->ssi_protocol->device, NULL);
modem->ssi_protocol = NULL;
config SENSORS_GPIO_FAN
tristate "GPIO fan"
depends on GPIOLIB
+ depends on THERMAL || THERMAL=n
help
If you say yes here you get support for fans connected to GPIO lines.
help
If you say yes here you get support for ITE IT8705F, IT8712F,
IT8716F, IT8718F, IT8720F, IT8721F, IT8726F, IT8728F, IT8758E,
- IT8771E, IT8772E, IT8782F, IT8783E/F and IT8603E sensor chips,
- and the SiS950 clone.
+ IT8771E, IT8772E, IT8781F, IT8782F, IT8783E/F, IT8786E, IT8790E,
+ IT8603E, IT8620E, and IT8623E sensor chips, and the SiS950 clone.
This driver can also be built as a module. If so, the module
will be called it87.
mobile devices and servers. Support will include, but not be limited
to, ADT7408, AT30TS00, CAT34TS02, CAT6095, MAX6604, MCP9804, MCP9805,
MCP98242, MCP98243, MCP98244, MCP9843, SE97, SE98, STTS424(E),
- STTS2002, STTS3000, TSE2002B3, TSE2002GB2, TS3000B3, and TS3000GB2.
+ STTS2002, STTS3000, TSE2002, TSE2004, TS3000, and TS3001.
This driver can also be built as a module. If so, the module
will be called jc42.
This driver can also be built as a module. If so, the module
will be called nct7802.
+config SENSORS_NCT7904
+ tristate "Nuvoton NCT7904"
+ depends on I2C
+ help
+ If you say yes here you get support for the Nuvoton NCT7904
+ hardware monitoring chip, including manual fan speed control.
+
+ This driver can also be built as a module. If so, the module
+ will be called nct7904.
+
config SENSORS_PCF8591
tristate "Philips PCF8591 ADC/DAC"
depends on I2C
config SENSORS_PWM_FAN
tristate "PWM fan"
depends on (PWM && OF) || COMPILE_TEST
+ depends on THERMAL || THERMAL=n
help
If you say yes here you get support for fans connected to PWM lines.
The driver uses the generic PWM interface, thus it will work on a
obj-$(CONFIG_SENSORS_NCT6683) += nct6683.o
obj-$(CONFIG_SENSORS_NCT6775) += nct6775.o
obj-$(CONFIG_SENSORS_NCT7802) += nct7802.o
+obj-$(CONFIG_SENSORS_NCT7904) += nct7904.o
obj-$(CONFIG_SENSORS_NTC_THERMISTOR) += ntc_thermistor.o
obj-$(CONFIG_SENSORS_PC87360) += pc87360.o
obj-$(CONFIG_SENSORS_PC87427) += pc87427.o
struct device_attribute *devattr, char *buf) = {
show_label, show_crit_alarm, show_temp, show_tjmax,
show_ttarget };
- static const char *const names[TOTAL_ATTRS] = {
- "temp%d_label", "temp%d_crit_alarm",
- "temp%d_input", "temp%d_crit",
- "temp%d_max" };
+ static const char *const suffixes[TOTAL_ATTRS] = {
+ "label", "crit_alarm", "input", "crit", "max"
+ };
for (i = 0; i < tdata->attr_size; i++) {
- snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
- attr_no);
+ snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH,
+ "temp%d_%s", attr_no, suffixes[i]);
sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/of_gpio.h>
+#include <linux/thermal.h>
struct gpio_fan_data {
struct platform_device *pdev;
struct device *hwmon_dev;
+ /* Cooling device if any */
+ struct thermal_cooling_device *cdev;
struct mutex lock; /* lock GPIOs operations. */
int num_ctrl;
unsigned *ctrl;
return 0;
}
+static int gpio_fan_get_max_state(struct thermal_cooling_device *cdev,
+ unsigned long *state)
+{
+ struct gpio_fan_data *fan_data = cdev->devdata;
+
+ if (!fan_data)
+ return -EINVAL;
+
+ *state = fan_data->num_speed - 1;
+ return 0;
+}
+
+static int gpio_fan_get_cur_state(struct thermal_cooling_device *cdev,
+ unsigned long *state)
+{
+ struct gpio_fan_data *fan_data = cdev->devdata;
+ int r;
+
+ if (!fan_data)
+ return -EINVAL;
+
+ r = get_fan_speed_index(fan_data);
+ if (r < 0)
+ return r;
+
+ *state = r;
+ return 0;
+}
+
+static int gpio_fan_set_cur_state(struct thermal_cooling_device *cdev,
+ unsigned long state)
+{
+ struct gpio_fan_data *fan_data = cdev->devdata;
+
+ if (!fan_data)
+ return -EINVAL;
+
+ set_fan_speed(fan_data, state);
+ return 0;
+}
+
+static const struct thermal_cooling_device_ops gpio_fan_cool_ops = {
+ .get_max_state = gpio_fan_get_max_state,
+ .get_cur_state = gpio_fan_get_cur_state,
+ .set_cur_state = gpio_fan_set_cur_state,
+};
+
#ifdef CONFIG_OF_GPIO
/*
* Translate OpenFirmware node properties into platform_data
node = dev->of_node;
+ /* Alarm GPIO if one exists */
+ if (of_gpio_named_count(node, "alarm-gpios") > 0) {
+ struct gpio_fan_alarm *alarm;
+ int val;
+ enum of_gpio_flags flags;
+
+ alarm = devm_kzalloc(dev, sizeof(struct gpio_fan_alarm),
+ GFP_KERNEL);
+ if (!alarm)
+ return -ENOMEM;
+
+ val = of_get_named_gpio_flags(node, "alarm-gpios", 0, &flags);
+ if (val < 0)
+ return val;
+ alarm->gpio = val;
+ alarm->active_low = flags & OF_GPIO_ACTIVE_LOW;
+
+ pdata->alarm = alarm;
+ }
+
/* Fill GPIO pin array */
pdata->num_ctrl = of_gpio_count(node);
if (pdata->num_ctrl <= 0) {
- dev_err(dev, "gpios DT property empty / missing");
+ if (pdata->alarm)
+ return 0;
+ dev_err(dev, "DT properties empty / missing");
return -ENODEV;
}
ctrl = devm_kzalloc(dev, pdata->num_ctrl * sizeof(unsigned),
}
pdata->speed = speed;
- /* Alarm GPIO if one exists */
- if (of_gpio_named_count(node, "alarm-gpios") > 0) {
- struct gpio_fan_alarm *alarm;
- int val;
- enum of_gpio_flags flags;
-
- alarm = devm_kzalloc(dev, sizeof(struct gpio_fan_alarm),
- GFP_KERNEL);
- if (!alarm)
- return -ENOMEM;
-
- val = of_get_named_gpio_flags(node, "alarm-gpios", 0, &flags);
- if (val < 0)
- return val;
- alarm->gpio = val;
- alarm->active_low = flags & OF_GPIO_ACTIVE_LOW;
-
- pdata->alarm = alarm;
- }
-
return 0;
}
struct gpio_fan_data *fan_data;
struct gpio_fan_platform_data *pdata = dev_get_platdata(&pdev->dev);
+ fan_data = devm_kzalloc(&pdev->dev, sizeof(struct gpio_fan_data),
+ GFP_KERNEL);
+ if (!fan_data)
+ return -ENOMEM;
+
#ifdef CONFIG_OF_GPIO
if (!pdata) {
pdata = devm_kzalloc(&pdev->dev,
return -EINVAL;
#endif /* CONFIG_OF_GPIO */
- fan_data = devm_kzalloc(&pdev->dev, sizeof(struct gpio_fan_data),
- GFP_KERNEL);
- if (!fan_data)
- return -ENOMEM;
-
fan_data->pdev = pdev;
platform_set_drvdata(pdev, fan_data);
mutex_init(&fan_data->lock);
gpio_fan_groups);
if (IS_ERR(fan_data->hwmon_dev))
return PTR_ERR(fan_data->hwmon_dev);
+#ifdef CONFIG_OF_GPIO
+ /* Optional cooling device register for Device tree platforms */
+ fan_data->cdev = thermal_of_cooling_device_register(pdev->dev.of_node,
+ "gpio-fan",
+ fan_data,
+ &gpio_fan_cool_ops);
+#else /* CONFIG_OF_GPIO */
+ /* Optional cooling device register for non Device tree platforms */
+ fan_data->cdev = thermal_cooling_device_register("gpio-fan", fan_data,
+ &gpio_fan_cool_ops);
+#endif /* CONFIG_OF_GPIO */
dev_info(&pdev->dev, "GPIO fan initialized\n");
return 0;
}
-static void gpio_fan_shutdown(struct platform_device *pdev)
+static int gpio_fan_remove(struct platform_device *pdev)
{
- struct gpio_fan_data *fan_data = dev_get_drvdata(&pdev->dev);
+ struct gpio_fan_data *fan_data = platform_get_drvdata(pdev);
+
+ if (!IS_ERR(fan_data->cdev))
+ thermal_cooling_device_unregister(fan_data->cdev);
if (fan_data->ctrl)
set_fan_speed(fan_data, 0);
+
+ return 0;
+}
+
+static void gpio_fan_shutdown(struct platform_device *pdev)
+{
+ gpio_fan_remove(pdev);
}
#ifdef CONFIG_PM_SLEEP
static struct platform_driver gpio_fan_driver = {
.probe = gpio_fan_probe,
+ .remove = gpio_fan_remove,
.shutdown = gpio_fan_shutdown,
.driver = {
.name = "gpio-fan",
static u8 const watt_sensor_sig[] = {0x41, 0x43};
#define PEX_NUM_SENSOR_FUNCS 3
-static char const * const power_sensor_name_templates[] = {
- "%s%d_average",
- "%s%d_average_lowest",
- "%s%d_average_highest"
-};
-static char const * const temp_sensor_name_templates[] = {
- "%s%d_input",
- "%s%d_input_lowest",
- "%s%d_input_highest"
+static const char * const sensor_name_suffixes[] = {
+ "",
+ "_lowest",
+ "_highest"
};
static void ibmpex_msg_handler(struct ipmi_recv_msg *msg, void *user_msg_data);
return -ENOMEM;
if (type == TEMP_SENSOR)
- sprintf(n, temp_sensor_name_templates[func], "temp", counter);
+ sprintf(n, "temp%d_input%s",
+ counter, sensor_name_suffixes[func]);
else if (type == POWER_SENSOR)
- sprintf(n, power_sensor_name_templates[func], "power", counter);
+ sprintf(n, "power%d_average%s",
+ counter, sensor_name_suffixes[func]);
sysfs_attr_init(&data->sensors[sensor].attr[func].dev_attr.attr);
data->sensors[sensor].attr[func].dev_attr.attr.name = n;
#include <linux/platform_device.h>
#include <asm/opal.h>
#include <linux/err.h>
+#include <asm/cputhreads.h>
+#include <asm/smp.h>
#define MAX_ATTR_LEN 32
+#define MAX_LABEL_LEN 64
/* Sensor suffix name from DT */
#define DT_FAULT_ATTR_SUFFIX "faulted"
*/
enum sensors {
FAN,
- AMBIENT_TEMP,
+ TEMP,
POWER_SUPPLY,
POWER_INPUT,
MAX_SENSOR_TYPE,
};
+#define INVALID_INDEX (-1U)
+
static struct sensor_group {
const char *name;
const char *compatible;
struct attribute_group group;
u32 attr_count;
+ u32 hwmon_index;
} sensor_groups[] = {
{"fan", "ibm,opal-sensor-cooling-fan"},
{"temp", "ibm,opal-sensor-amb-temp"},
struct sensor_data {
u32 id; /* An opaque id of the firmware for each sensor */
+ u32 hwmon_index;
+ u32 opal_index;
enum sensors type;
+ char label[MAX_LABEL_LEN];
char name[MAX_ATTR_LEN];
struct device_attribute dev_attr;
};
return ret;
/* Convert temperature to milli-degrees */
- if (sdata->type == AMBIENT_TEMP)
+ if (sdata->type == TEMP)
x *= 1000;
/* Convert power to micro-watts */
else if (sdata->type == POWER_INPUT)
return sprintf(buf, "%u\n", x);
}
-static int get_sensor_index_attr(const char *name, u32 *index,
- char *attr)
+static ssize_t show_label(struct device *dev, struct device_attribute *devattr,
+ char *buf)
+{
+ struct sensor_data *sdata = container_of(devattr, struct sensor_data,
+ dev_attr);
+
+ return sprintf(buf, "%s\n", sdata->label);
+}
+
+static int __init get_logical_cpu(int hwcpu)
+{
+ int cpu;
+
+ for_each_possible_cpu(cpu)
+ if (get_hard_smp_processor_id(cpu) == hwcpu)
+ return cpu;
+
+ return -ENOENT;
+}
+
+static void __init make_sensor_label(struct device_node *np,
+ struct sensor_data *sdata,
+ const char *label)
+{
+ u32 id;
+ size_t n;
+
+ n = snprintf(sdata->label, sizeof(sdata->label), "%s", label);
+
+ /*
+ * Core temp pretty print
+ */
+ if (!of_property_read_u32(np, "ibm,pir", &id)) {
+ int cpuid = get_logical_cpu(id);
+
+ if (cpuid >= 0)
+ /*
+ * The digital thermal sensors are associated
+ * with a core. Let's print out the range of
+ * cpu ids corresponding to the hardware
+ * threads of the core.
+ */
+ n += snprintf(sdata->label + n,
+ sizeof(sdata->label) - n, " %d-%d",
+ cpuid, cpuid + threads_per_core - 1);
+ else
+ n += snprintf(sdata->label + n,
+ sizeof(sdata->label) - n, " phy%d", id);
+ }
+
+ /*
+ * Membuffer pretty print
+ */
+ if (!of_property_read_u32(np, "ibm,chip-id", &id))
+ n += snprintf(sdata->label + n, sizeof(sdata->label) - n,
+ " %d", id & 0xffff);
+}
+
+static int get_sensor_index_attr(const char *name, u32 *index, char *attr)
{
char *hash_pos = strchr(name, '#');
char buf[8] = { 0 };
return 0;
}
+static const char *convert_opal_attr_name(enum sensors type,
+ const char *opal_attr)
+{
+ const char *attr_name = NULL;
+
+ if (!strcmp(opal_attr, DT_FAULT_ATTR_SUFFIX)) {
+ attr_name = "fault";
+ } else if (!strcmp(opal_attr, DT_DATA_ATTR_SUFFIX)) {
+ attr_name = "input";
+ } else if (!strcmp(opal_attr, DT_THRESHOLD_ATTR_SUFFIX)) {
+ if (type == TEMP)
+ attr_name = "max";
+ else if (type == FAN)
+ attr_name = "min";
+ }
+
+ return attr_name;
+}
+
/*
* This function translates the DT node name into the 'hwmon' attribute name.
* IBMPOWERNV device node appear like cooling-fan#2-data, amb-temp#1-thrs etc.
* which need to be mapped as fan2_input, temp1_max respectively before
* populating them inside hwmon device class.
*/
-static int create_hwmon_attr_name(struct device *dev, enum sensors type,
- const char *node_name,
- char *hwmon_attr_name)
+static const char *parse_opal_node_name(const char *node_name,
+ enum sensors type, u32 *index)
{
char attr_suffix[MAX_ATTR_LEN];
- char *attr_name;
- u32 index;
+ const char *attr_name;
int err;
- err = get_sensor_index_attr(node_name, &index, attr_suffix);
- if (err) {
- dev_err(dev, "Sensor device node name '%s' is invalid\n",
- node_name);
- return err;
- }
+ err = get_sensor_index_attr(node_name, index, attr_suffix);
+ if (err)
+ return ERR_PTR(err);
- if (!strcmp(attr_suffix, DT_FAULT_ATTR_SUFFIX)) {
- attr_name = "fault";
- } else if (!strcmp(attr_suffix, DT_DATA_ATTR_SUFFIX)) {
- attr_name = "input";
- } else if (!strcmp(attr_suffix, DT_THRESHOLD_ATTR_SUFFIX)) {
- if (type == AMBIENT_TEMP)
- attr_name = "max";
- else if (type == FAN)
- attr_name = "min";
- else
- return -ENOENT;
- } else {
- return -ENOENT;
+ attr_name = convert_opal_attr_name(type, attr_suffix);
+ if (!attr_name)
+ return ERR_PTR(-ENOENT);
+
+ return attr_name;
+}
+
+static int get_sensor_type(struct device_node *np)
+{
+ enum sensors type;
+ const char *str;
+
+ for (type = 0; type < MAX_SENSOR_TYPE; type++) {
+ if (of_device_is_compatible(np, sensor_groups[type].compatible))
+ return type;
}
- snprintf(hwmon_attr_name, MAX_ATTR_LEN, "%s%d_%s",
- sensor_groups[type].name, index, attr_name);
- return 0;
+ /*
+ * Let's check if we have a newer device tree
+ */
+ if (!of_device_is_compatible(np, "ibm,opal-sensor"))
+ return MAX_SENSOR_TYPE;
+
+ if (of_property_read_string(np, "sensor-type", &str))
+ return MAX_SENSOR_TYPE;
+
+ for (type = 0; type < MAX_SENSOR_TYPE; type++)
+ if (!strcmp(str, sensor_groups[type].name))
+ return type;
+
+ return MAX_SENSOR_TYPE;
+}
+
+static u32 get_sensor_hwmon_index(struct sensor_data *sdata,
+ struct sensor_data *sdata_table, int count)
+{
+ int i;
+
+ /*
+ * We don't use the OPAL index on newer device trees
+ */
+ if (sdata->opal_index != INVALID_INDEX) {
+ for (i = 0; i < count; i++)
+ if (sdata_table[i].opal_index == sdata->opal_index &&
+ sdata_table[i].type == sdata->type)
+ return sdata_table[i].hwmon_index;
+ }
+ return ++sensor_groups[sdata->type].hwmon_index;
}
static int populate_attr_groups(struct platform_device *pdev)
opal = of_find_node_by_path("/ibm,opal/sensors");
for_each_child_of_node(opal, np) {
+ const char *label;
+
if (np->name == NULL)
continue;
- for (type = 0; type < MAX_SENSOR_TYPE; type++)
- if (of_device_is_compatible(np,
- sensor_groups[type].compatible)) {
- sensor_groups[type].attr_count++;
- break;
- }
+ type = get_sensor_type(np);
+ if (type == MAX_SENSOR_TYPE)
+ continue;
+
+ sensor_groups[type].attr_count++;
+
+ /*
+ * add a new attribute for labels
+ */
+ if (!of_property_read_string(np, "label", &label))
+ sensor_groups[type].attr_count++;
}
of_node_put(opal);
return 0;
}
+static void create_hwmon_attr(struct sensor_data *sdata, const char *attr_name,
+ ssize_t (*show)(struct device *dev,
+ struct device_attribute *attr,
+ char *buf))
+{
+ snprintf(sdata->name, MAX_ATTR_LEN, "%s%d_%s",
+ sensor_groups[sdata->type].name, sdata->hwmon_index,
+ attr_name);
+
+ sysfs_attr_init(&sdata->dev_attr.attr);
+ sdata->dev_attr.attr.name = sdata->name;
+ sdata->dev_attr.attr.mode = S_IRUGO;
+ sdata->dev_attr.show = show;
+}
+
/*
* Iterate through the device tree for each child of 'sensors' node, create
* a sysfs attribute file, the file is named by translating the DT node name
}
for_each_child_of_node(opal, np) {
+ const char *attr_name;
+ u32 opal_index;
+ const char *label;
+
if (np->name == NULL)
continue;
- for (type = 0; type < MAX_SENSOR_TYPE; type++)
- if (of_device_is_compatible(np,
- sensor_groups[type].compatible))
- break;
-
+ type = get_sensor_type(np);
if (type == MAX_SENSOR_TYPE)
continue;
- if (of_property_read_u32(np, "sensor-id", &sensor_id)) {
+ /*
+ * Newer device trees use a "sensor-data" property
+ * name for input.
+ */
+ if (of_property_read_u32(np, "sensor-id", &sensor_id) &&
+ of_property_read_u32(np, "sensor-data", &sensor_id)) {
dev_info(&pdev->dev,
"'sensor-id' missing in the node '%s'\n",
np->name);
sdata[count].id = sensor_id;
sdata[count].type = type;
- err = create_hwmon_attr_name(&pdev->dev, type, np->name,
- sdata[count].name);
- if (err)
- goto exit_put_node;
- sysfs_attr_init(&sdata[count].dev_attr.attr);
- sdata[count].dev_attr.attr.name = sdata[count].name;
- sdata[count].dev_attr.attr.mode = S_IRUGO;
- sdata[count].dev_attr.show = show_sensor;
+ /*
+ * If we can not parse the node name, it means we are
+ * running on a newer device tree. We can just forget
+ * about the OPAL index and use a defaut value for the
+ * hwmon attribute name
+ */
+ attr_name = parse_opal_node_name(np->name, type, &opal_index);
+ if (IS_ERR(attr_name)) {
+ attr_name = "input";
+ opal_index = INVALID_INDEX;
+ }
+
+ sdata[count].opal_index = opal_index;
+ sdata[count].hwmon_index =
+ get_sensor_hwmon_index(&sdata[count], sdata, count);
+
+ create_hwmon_attr(&sdata[count], attr_name, show_sensor);
pgroups[type]->attrs[sensor_groups[type].attr_count++] =
&sdata[count++].dev_attr.attr;
+
+ if (!of_property_read_string(np, "label", &label)) {
+ /*
+ * For the label attribute, we can reuse the
+ * "properties" of the previous "input"
+ * attribute. They are related to the same
+ * sensor.
+ */
+ sdata[count].type = type;
+ sdata[count].opal_index = sdata[count - 1].opal_index;
+ sdata[count].hwmon_index = sdata[count - 1].hwmon_index;
+
+ make_sensor_label(np, &sdata[count], label);
+
+ create_hwmon_attr(&sdata[count], "label", show_label);
+
+ pgroups[type]->attrs[sensor_groups[type].attr_count++] =
+ &sdata[count++].dev_attr.attr;
+ }
}
exit_put_node:
* similar parts. The other devices are supported by different drivers.
*
* Supports: IT8603E Super I/O chip w/LPC interface
+ * IT8620E Super I/O chip w/LPC interface
* IT8623E Super I/O chip w/LPC interface
* IT8705F Super I/O chip w/LPC interface
* IT8712F Super I/O chip w/LPC interface
* IT8758E Super I/O chip w/LPC interface
* IT8771E Super I/O chip w/LPC interface
* IT8772E Super I/O chip w/LPC interface
+ * IT8781F Super I/O chip w/LPC interface
* IT8782F Super I/O chip w/LPC interface
* IT8783E/F Super I/O chip w/LPC interface
+ * IT8786E Super I/O chip w/LPC interface
+ * IT8790E Super I/O chip w/LPC interface
* Sis950 A clone of the IT8705F
*
* Copyright (C) 2001 Chris Gauthron
#define DRVNAME "it87"
enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8771,
- it8772, it8782, it8783, it8603 };
+ it8772, it8781, it8782, it8783, it8786, it8790, it8603, it8620 };
static unsigned short force_id;
module_param(force_id, ushort, 0);
#define IT8728F_DEVID 0x8728
#define IT8771E_DEVID 0x8771
#define IT8772E_DEVID 0x8772
+#define IT8781F_DEVID 0x8781
#define IT8782F_DEVID 0x8782
#define IT8783E_DEVID 0x8783
+#define IT8786E_DEVID 0x8786
+#define IT8790E_DEVID 0x8790
#define IT8603E_DEVID 0x8603
+#define IT8620E_DEVID 0x8620
#define IT8623E_DEVID 0x8623
#define IT87_ACT_REG 0x30
#define IT87_BASE_REG 0x60
/* Logical device 7 registers (IT8712F and later) */
#define IT87_SIO_GPIO1_REG 0x25
+#define IT87_SIO_GPIO2_REG 0x26
#define IT87_SIO_GPIO3_REG 0x27
#define IT87_SIO_GPIO5_REG 0x29
#define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
/* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
-static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
-static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 };
-static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 };
-static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
-static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
+static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
+static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
+static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
+static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
+static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
#define IT87_REG_FAN_MAIN_CTRL 0x13
#define IT87_REG_FAN_CTL 0x14
struct it87_devices {
const char *name;
+ const char * const suffix;
u16 features;
u8 peci_mask;
u8 old_peci_mask;
#define FEAT_TEMP_OFFSET (1 << 4)
#define FEAT_TEMP_PECI (1 << 5)
#define FEAT_TEMP_OLD_PECI (1 << 6)
+#define FEAT_FAN16_CONFIG (1 << 7) /* Need to enable 16-bit fans */
+#define FEAT_FIVE_FANS (1 << 8) /* Supports five fans */
+#define FEAT_VID (1 << 9) /* Set if chip supports VID */
+#define FEAT_IN7_INTERNAL (1 << 10) /* Set if in7 is internal */
+#define FEAT_SIX_FANS (1 << 11) /* Supports six fans */
static const struct it87_devices it87_devices[] = {
[it87] = {
.name = "it87",
+ .suffix = "F",
.features = FEAT_OLD_AUTOPWM, /* may need to overwrite */
},
[it8712] = {
.name = "it8712",
- .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */
+ .suffix = "F",
+ .features = FEAT_OLD_AUTOPWM | FEAT_VID,
+ /* may need to overwrite */
},
[it8716] = {
.name = "it8716",
- .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET,
+ .suffix = "F",
+ .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
+ | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS,
},
[it8718] = {
.name = "it8718",
- .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
- | FEAT_TEMP_OLD_PECI,
+ .suffix = "F",
+ .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
+ | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS,
.old_peci_mask = 0x4,
},
[it8720] = {
.name = "it8720",
- .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
- | FEAT_TEMP_OLD_PECI,
+ .suffix = "F",
+ .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
+ | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS,
.old_peci_mask = 0x4,
},
[it8721] = {
.name = "it8721",
+ .suffix = "F",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI,
+ | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
+ | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL,
.peci_mask = 0x05,
.old_peci_mask = 0x02, /* Actually reports PCH */
},
[it8728] = {
.name = "it8728",
+ .suffix = "F",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI,
+ | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
+ | FEAT_IN7_INTERNAL,
.peci_mask = 0x07,
},
[it8771] = {
.name = "it8771",
+ .suffix = "E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI,
- /* PECI: guesswork */
- /* 12mV ADC (OHM) */
- /* 16 bit fans (OHM) */
+ | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL,
+ /* PECI: guesswork */
+ /* 12mV ADC (OHM) */
+ /* 16 bit fans (OHM) */
+ /* three fans, always 16 bit (guesswork) */
.peci_mask = 0x07,
},
[it8772] = {
.name = "it8772",
+ .suffix = "E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI,
- /* PECI (coreboot) */
- /* 12mV ADC (HWSensors4, OHM) */
- /* 16 bit fans (HWSensors4, OHM) */
+ | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL,
+ /* PECI (coreboot) */
+ /* 12mV ADC (HWSensors4, OHM) */
+ /* 16 bit fans (HWSensors4, OHM) */
+ /* three fans, always 16 bit (datasheet) */
.peci_mask = 0x07,
},
+ [it8781] = {
+ .name = "it8781",
+ .suffix = "F",
+ .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
+ | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG,
+ .old_peci_mask = 0x4,
+ },
[it8782] = {
.name = "it8782",
+ .suffix = "F",
.features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
- | FEAT_TEMP_OLD_PECI,
+ | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG,
.old_peci_mask = 0x4,
},
[it8783] = {
.name = "it8783",
+ .suffix = "E/F",
.features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
- | FEAT_TEMP_OLD_PECI,
+ | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG,
.old_peci_mask = 0x4,
},
+ [it8786] = {
+ .name = "it8786",
+ .suffix = "E",
+ .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
+ | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL,
+ .peci_mask = 0x07,
+ },
+ [it8790] = {
+ .name = "it8790",
+ .suffix = "E",
+ .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
+ | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL,
+ .peci_mask = 0x07,
+ },
[it8603] = {
.name = "it8603",
+ .suffix = "E",
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
- | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI,
+ | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL,
+ .peci_mask = 0x07,
+ },
+ [it8620] = {
+ .name = "it8620",
+ .suffix = "E",
+ .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
+ | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
+ | FEAT_IN7_INTERNAL,
.peci_mask = 0x07,
},
};
#define has_temp_old_peci(data, nr) \
(((data)->features & FEAT_TEMP_OLD_PECI) && \
((data)->old_peci_mask & (1 << nr)))
+#define has_fan16_config(data) ((data)->features & FEAT_FAN16_CONFIG)
+#define has_five_fans(data) ((data)->features & (FEAT_FIVE_FANS | \
+ FEAT_SIX_FANS))
+#define has_vid(data) ((data)->features & FEAT_VID)
+#define has_in7_internal(data) ((data)->features & FEAT_IN7_INTERNAL)
+#define has_six_fans(data) ((data)->features & FEAT_SIX_FANS)
struct it87_sio_data {
enum chips type;
u16 in_scaled; /* Internal voltage sensors are scaled */
u8 in[10][3]; /* [nr][0]=in, [1]=min, [2]=max */
u8 has_fan; /* Bitfield, fans enabled */
- u16 fan[5][2]; /* Register values, [nr][0]=fan, [1]=min */
+ u16 fan[6][2]; /* Register values, [nr][0]=fan, [1]=min */
u8 has_temp; /* Bitfield, temp sensors enabled */
s8 temp[3][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */
}
#define DIV_FROM_REG(val) (1 << (val))
+/*
+ * PWM base frequencies. The frequency has to be divided by either 128 or 256,
+ * depending on the chip type, to calculate the actual PWM frequency.
+ *
+ * Some of the chip datasheets suggest a base frequency of 51 kHz instead
+ * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
+ * of 200 Hz. Sometimes both PWM frequency select registers are affected,
+ * sometimes just one. It is unknown if this is a datasheet error or real,
+ * so this is ignored for now.
+ */
static const unsigned int pwm_freq[8] = {
- 48000000 / 128,
- 24000000 / 128,
- 12000000 / 128,
- 8000000 / 128,
- 6000000 / 128,
- 3000000 / 128,
- 1500000 / 128,
- 750000 / 128,
+ 48000000,
+ 24000000,
+ 12000000,
+ 8000000,
+ 6000000,
+ 3000000,
+ 1500000,
+ 750000,
};
static int it87_probe(struct platform_device *pdev);
{
struct it87_data *data = it87_update_device(dev);
int index = (data->fan_ctl >> 4) & 0x07;
+ unsigned int freq;
- return sprintf(buf, "%u\n", pwm_freq[index]);
+ freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
+
+ return sprintf(buf, "%u\n", freq);
}
static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
if (kstrtoul(buf, 10, &val) < 0)
return -EINVAL;
+ val = clamp_val(val, 0, 1000000);
+ val *= has_newer_autopwm(data) ? 256 : 128;
+
/* Search for the nearest available frequency */
for (i = 0; i < 7; i++) {
if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
4, 1);
+static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
+static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
+ 5, 1);
+
static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
show_pwm_enable, set_pwm_enable, 0);
static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
+static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
+static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
show_beep, set_beep, 2);
static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
&sensor_dev_attr_temp3_beep.dev_attr.attr,
};
-static struct attribute *it87_attributes_fan[5][3+1] = { {
+static struct attribute *it87_attributes_fan[6][3+1] = { {
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_fan5_min.dev_attr.attr,
&sensor_dev_attr_fan5_alarm.dev_attr.attr,
NULL
+}, {
+ &sensor_dev_attr_fan6_input.dev_attr.attr,
+ &sensor_dev_attr_fan6_min.dev_attr.attr,
+ &sensor_dev_attr_fan6_alarm.dev_attr.attr,
+ NULL
} };
-static const struct attribute_group it87_group_fan[5] = {
+static const struct attribute_group it87_group_fan[6] = {
{ .attrs = it87_attributes_fan[0] },
{ .attrs = it87_attributes_fan[1] },
{ .attrs = it87_attributes_fan[2] },
{ .attrs = it87_attributes_fan[3] },
{ .attrs = it87_attributes_fan[4] },
+ { .attrs = it87_attributes_fan[5] },
};
static const struct attribute *it87_attributes_fan_div[] = {
&sensor_dev_attr_fan3_beep.dev_attr.attr,
&sensor_dev_attr_fan4_beep.dev_attr.attr,
&sensor_dev_attr_fan5_beep.dev_attr.attr,
+ &sensor_dev_attr_fan6_beep.dev_attr.attr,
};
static struct attribute *it87_attributes_vid[] = {
int err;
u16 chip_type;
const char *board_vendor, *board_name;
+ const struct it87_devices *config;
err = superio_enter();
if (err)
case IT8772E_DEVID:
sio_data->type = it8772;
break;
+ case IT8781F_DEVID:
+ sio_data->type = it8781;
+ break;
case IT8782F_DEVID:
sio_data->type = it8782;
break;
case IT8783E_DEVID:
sio_data->type = it8783;
break;
+ case IT8786E_DEVID:
+ sio_data->type = it8786;
+ break;
+ case IT8790E_DEVID:
+ sio_data->type = it8790;
+ break;
case IT8603E_DEVID:
case IT8623E_DEVID:
sio_data->type = it8603;
break;
+ case IT8620E_DEVID:
+ sio_data->type = it8620;
+ break;
case 0xffff: /* No device at all */
goto exit;
default:
err = 0;
sio_data->revision = superio_inb(DEVREV) & 0x0f;
- pr_info("Found IT%04x%c chip at 0x%x, revision %d\n", chip_type,
- chip_type == 0x8771 || chip_type == 0x8772 ||
- chip_type == 0x8603 ? 'E' : 'F', *address,
- sio_data->revision);
+ pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
+ it87_devices[sio_data->type].suffix,
+ *address, sio_data->revision);
+
+ config = &it87_devices[sio_data->type];
+
+ /* in7 (VSB or VCCH5V) is always internal on some chips */
+ if (has_in7_internal(config))
+ sio_data->internal |= (1 << 1);
/* in8 (Vbat) is always internal */
- sio_data->internal = (1 << 2);
+ sio_data->internal |= (1 << 2);
+
/* Only the IT8603E has in9 */
if (sio_data->type != it8603)
sio_data->skip_in |= (1 << 9);
- /* Read GPIO config and VID value from LDN 7 (GPIO) */
- if (sio_data->type == it87) {
- /* The IT8705F doesn't have VID pins at all */
+ if (!has_vid(config))
sio_data->skip_vid = 1;
+ /* Read GPIO config and VID value from LDN 7 (GPIO) */
+ if (sio_data->type == it87) {
/* The IT8705F has a different LD number for GPIO */
superio_select(5);
sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
} else if (sio_data->type == it8783) {
int reg25, reg27, reg2a, reg2c, regef;
- sio_data->skip_vid = 1; /* No VID */
-
superio_select(GPIO);
reg25 = superio_inb(IT87_SIO_GPIO1_REG);
} else if (sio_data->type == it8603) {
int reg27, reg29;
- sio_data->skip_vid = 1; /* No VID */
superio_select(GPIO);
reg27 = superio_inb(IT87_SIO_GPIO3_REG);
sio_data->skip_in |= (1 << 5); /* No VIN5 */
sio_data->skip_in |= (1 << 6); /* No VIN6 */
- /* no fan4 */
- sio_data->skip_pwm |= (1 << 3);
- sio_data->skip_fan |= (1 << 3);
-
- sio_data->internal |= (1 << 1); /* in7 is VSB */
sio_data->internal |= (1 << 3); /* in9 is AVCC */
+ sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
+ } else if (sio_data->type == it8620) {
+ int reg;
+
+ superio_select(GPIO);
+
+ /* Check for fan4, fan5 */
+ reg = superio_inb(IT87_SIO_GPIO2_REG);
+ if (!(reg & (1 << 5)))
+ sio_data->skip_fan |= (1 << 3);
+ if (!(reg & (1 << 4)))
+ sio_data->skip_fan |= (1 << 4);
+
+ /* Check for pwm3, fan3 */
+ reg = superio_inb(IT87_SIO_GPIO3_REG);
+ if (reg & (1 << 6))
+ sio_data->skip_pwm |= (1 << 2);
+ if (reg & (1 << 7))
+ sio_data->skip_fan |= (1 << 2);
+
+ /* Check for pwm2, fan2 */
+ reg = superio_inb(IT87_SIO_GPIO5_REG);
+ if (reg & (1 << 1))
+ sio_data->skip_pwm |= (1 << 1);
+ if (reg & (1 << 2))
+ sio_data->skip_fan |= (1 << 1);
+
sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
} else {
int reg;
superio_select(GPIO);
reg = superio_inb(IT87_SIO_GPIO3_REG);
- if (sio_data->type == it8721 || sio_data->type == it8728 ||
- sio_data->type == it8771 || sio_data->type == it8772 ||
- sio_data->type == it8782) {
- /*
- * IT8721F/IT8758E, and IT8782F don't have VID pins
- * at all, not sure about the IT8728F and compatibles.
- */
- sio_data->skip_vid = 1;
- } else {
+ if (!sio_data->skip_vid) {
/* We need at least 4 VID pins */
if (reg & 0x0f) {
pr_info("VID is disabled (pins used for GPIO)\n");
}
if (reg & (1 << 0))
sio_data->internal |= (1 << 0);
- if ((reg & (1 << 1)) || sio_data->type == it8721 ||
- sio_data->type == it8728 ||
- sio_data->type == it8771 ||
- sio_data->type == it8772)
+ if (reg & (1 << 1))
sio_data->internal |= (1 << 1);
/*
sysfs_remove_file(&dev->kobj,
it87_attributes_temp_beep[i]);
}
- for (i = 0; i < 5; i++) {
+ for (i = 0; i < 6; i++) {
if (!(data->has_fan & (1 << i)))
continue;
sysfs_remove_group(&dev->kobj, &it87_group_fan[i]);
it87_attributes_fan_div[i]);
}
for (i = 0; i < 3; i++) {
- if (sio_data->skip_pwm & (1 << 0))
+ if (sio_data->skip_pwm & (1 << i))
continue;
sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
if (has_old_autopwm(data))
case it87:
if (sio_data->revision >= 0x03) {
data->features &= ~FEAT_OLD_AUTOPWM;
- data->features |= FEAT_16BIT_FANS;
+ data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
}
break;
case it8712:
if (sio_data->revision >= 0x08) {
data->features &= ~FEAT_OLD_AUTOPWM;
- data->features |= FEAT_16BIT_FANS;
+ data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
+ FEAT_FIVE_FANS;
}
break;
default:
data->in_scaled |= (1 << 8); /* in8 is Vbat */
if (sio_data->internal & (1 << 3))
data->in_scaled |= (1 << 9); /* in9 is AVCC */
- } else if (sio_data->type == it8782 || sio_data->type == it8783) {
+ } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
+ sio_data->type == it8783) {
if (sio_data->internal & (1 << 0))
data->in_scaled |= (1 << 3); /* in3 is VCC5V */
if (sio_data->internal & (1 << 1))
/* Do not create fan files for disabled fans */
fan_beep_need_rw = 1;
- for (i = 0; i < 5; i++) {
+ for (i = 0; i < 6; i++) {
if (!(data->has_fan & (1 << i)))
continue;
err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]);
}
data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
- /* Set tachometers to 16-bit mode if needed, IT8603E (and IT8728F?)
- * has it by default */
- if (has_16bit_fans(data) && data->type != it8603) {
- tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
+ tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
+
+ /* Set tachometers to 16-bit mode if needed */
+ if (has_fan16_config(data)) {
if (~tmp & 0x07 & data->has_fan) {
dev_dbg(&pdev->dev,
"Setting fan1-3 to 16-bit mode\n");
it87_write_value(data, IT87_REG_FAN_16BIT,
tmp | 0x07);
}
- /* IT8705F, IT8782F, and IT8783E/F only support three fans. */
- if (data->type != it87 && data->type != it8782 &&
- data->type != it8783) {
- if (tmp & (1 << 4))
- data->has_fan |= (1 << 3); /* fan4 enabled */
- if (tmp & (1 << 5))
- data->has_fan |= (1 << 4); /* fan5 enabled */
- }
+ }
+
+ /* Check for additional fans */
+ if (has_five_fans(data)) {
+ if (tmp & (1 << 4))
+ data->has_fan |= (1 << 3); /* fan4 enabled */
+ if (tmp & (1 << 5))
+ data->has_fan |= (1 << 4); /* fan5 enabled */
+ if (has_six_fans(data) && (tmp & (1 << 2)))
+ data->has_fan |= (1 << 5); /* fan6 enabled */
}
/* Fan input pins may be used for alternative functions */
if (data->type == it8603)
data->in[9][0] = it87_read_value(data, 0x2f);
- for (i = 0; i < 5; i++) {
+ for (i = 0; i < 6; i++) {
/* Skip disabled fans */
if (!(data->has_fan & (1 << i)))
continue;
#define AT30TSE004_DEVID_MASK 0xffff
/* IDT */
-#define TS3000B3_DEVID 0x2903 /* Also matches TSE2002B3 */
-#define TS3000B3_DEVID_MASK 0xffff
+#define TSE2004_DEVID 0x2200
+#define TSE2004_DEVID_MASK 0xff00
-#define TS3000GB2_DEVID 0x2912 /* Also matches TSE2002GB2 */
-#define TS3000GB2_DEVID_MASK 0xffff
+#define TS3000_DEVID 0x2900 /* Also matches TSE2002 */
+#define TS3000_DEVID_MASK 0xff00
+
+#define TS3001_DEVID 0x3000
+#define TS3001_DEVID_MASK 0xff00
/* Maxim */
#define MAX6604_DEVID 0x3e00
{ ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK },
{ ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK },
{ ATMEL_MANID2, AT30TSE004_DEVID, AT30TSE004_DEVID_MASK },
- { IDT_MANID, TS3000B3_DEVID, TS3000B3_DEVID_MASK },
- { IDT_MANID, TS3000GB2_DEVID, TS3000GB2_DEVID_MASK },
+ { IDT_MANID, TSE2004_DEVID, TSE2004_DEVID_MASK },
+ { IDT_MANID, TS3000_DEVID, TS3000_DEVID_MASK },
+ { IDT_MANID, TS3001_DEVID, TS3001_DEVID_MASK },
{ MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK },
{ MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK },
{ MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK },
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/acpi.h>
+#include <linux/dmi.h>
#include <linux/io.h>
#include "lm75.h"
u16 have_temp;
u16 have_temp_fixed;
u16 have_in;
-#ifdef CONFIG_PM
+
/* Remember extra register values over suspend/resume */
u8 vbat;
u8 fandiv1;
u8 fandiv2;
-#endif
+ u8 sio_reg_enable;
};
struct nct6775_sio_data {
int sioreg = data->sioreg;
int regval;
+ /* Store SIO_REG_ENABLE for use during resume */
+ superio_select(sioreg, NCT6775_LD_HWM);
+ data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
+
/* fan4 and fan5 share some pins with the GPIO and serial flash */
if (data->kind == nct6775) {
regval = superio_inb(sioreg, 0x2c);
pwm6pin = false;
} else if (data->kind == nct6776) {
bool gpok = superio_inb(sioreg, 0x27) & 0x80;
+ const char *board_vendor, *board_name;
- superio_select(sioreg, NCT6775_LD_HWM);
- regval = superio_inb(sioreg, SIO_REG_ENABLE);
+ board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
+ board_name = dmi_get_system_info(DMI_BOARD_NAME);
+
+ if (board_name && board_vendor &&
+ !strcmp(board_vendor, "ASRock")) {
+ /*
+ * Auxiliary fan monitoring is not enabled on ASRock
+ * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
+ * Observed with BIOS version 2.00.
+ */
+ if (!strcmp(board_name, "Z77 Pro4-M")) {
+ if ((data->sio_reg_enable & 0xe0) != 0xe0) {
+ data->sio_reg_enable |= 0xe0;
+ superio_outb(sioreg, SIO_REG_ENABLE,
+ data->sio_reg_enable);
+ }
+ }
+ }
- if (regval & 0x80)
+ if (data->sio_reg_enable & 0x80)
fan3pin = gpok;
else
fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
- if (regval & 0x40)
+ if (data->sio_reg_enable & 0x40)
fan4pin = gpok;
else
fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
- if (regval & 0x20)
+ if (data->sio_reg_enable & 0x20)
fan5pin = gpok;
else
fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
}
}
-#ifdef CONFIG_PM
-static int nct6775_suspend(struct device *dev)
+static int __maybe_unused nct6775_suspend(struct device *dev)
{
struct nct6775_data *data = nct6775_update_device(dev);
return 0;
}
-static int nct6775_resume(struct device *dev)
+static int __maybe_unused nct6775_resume(struct device *dev)
{
struct nct6775_data *data = dev_get_drvdata(dev);
+ int sioreg = data->sioreg;
int i, j, err = 0;
+ u8 reg;
mutex_lock(&data->update_lock);
data->bank = 0xff; /* Force initial bank selection */
- if (data->kind == nct6791 || data->kind == nct6792) {
- err = superio_enter(data->sioreg);
- if (err)
- goto abort;
+ err = superio_enter(sioreg);
+ if (err)
+ goto abort;
- nct6791_enable_io_mapping(data->sioreg);
- superio_exit(data->sioreg);
- }
+ superio_select(sioreg, NCT6775_LD_HWM);
+ reg = superio_inb(sioreg, SIO_REG_ENABLE);
+ if (reg != data->sio_reg_enable)
+ superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
+
+ if (data->kind == nct6791 || data->kind == nct6792)
+ nct6791_enable_io_mapping(sioreg);
+
+ superio_exit(sioreg);
/* Restore limits */
for (i = 0; i < data->in_num; i++) {
return err;
}
-static const struct dev_pm_ops nct6775_dev_pm_ops = {
- .suspend = nct6775_suspend,
- .resume = nct6775_resume,
- .freeze = nct6775_suspend,
- .restore = nct6775_resume,
-};
-
-#define NCT6775_DEV_PM_OPS (&nct6775_dev_pm_ops)
-#else
-#define NCT6775_DEV_PM_OPS NULL
-#endif /* CONFIG_PM */
+static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
static struct platform_driver nct6775_driver = {
.driver = {
.name = DRVNAME,
- .pm = NCT6775_DEV_PM_OPS,
+ .pm = &nct6775_dev_pm_ops,
},
.probe = nct6775_probe,
};
--- /dev/null
+/*
+ * nct7904.c - driver for Nuvoton NCT7904D.
+ *
+ * Copyright (c) 2015 Kontron
+ * Author: Vadim V. Vlasov <vvlasov@dev.rtsoft.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/mutex.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+
+#define VENDOR_ID_REG 0x7A /* Any bank */
+#define NUVOTON_ID 0x50
+#define CHIP_ID_REG 0x7B /* Any bank */
+#define NCT7904_ID 0xC5
+#define DEVICE_ID_REG 0x7C /* Any bank */
+
+#define BANK_SEL_REG 0xFF
+#define BANK_0 0x00
+#define BANK_1 0x01
+#define BANK_2 0x02
+#define BANK_3 0x03
+#define BANK_4 0x04
+#define BANK_MAX 0x04
+
+#define FANIN_MAX 12 /* Counted from 1 */
+#define VSEN_MAX 21 /* VSEN1..14, 3VDD, VBAT, V3VSB,
+ LTD (not a voltage), VSEN17..19 */
+#define FANCTL_MAX 4 /* Counted from 1 */
+#define TCPU_MAX 8 /* Counted from 1 */
+#define TEMP_MAX 4 /* Counted from 1 */
+
+#define VT_ADC_CTRL0_REG 0x20 /* Bank 0 */
+#define VT_ADC_CTRL1_REG 0x21 /* Bank 0 */
+#define VT_ADC_CTRL2_REG 0x22 /* Bank 0 */
+#define FANIN_CTRL0_REG 0x24
+#define FANIN_CTRL1_REG 0x25
+#define DTS_T_CTRL0_REG 0x26
+#define DTS_T_CTRL1_REG 0x27
+#define VT_ADC_MD_REG 0x2E
+
+#define VSEN1_HV_REG 0x40 /* Bank 0; 2 regs (HV/LV) per sensor */
+#define TEMP_CH1_HV_REG 0x42 /* Bank 0; same as VSEN2_HV */
+#define LTD_HV_REG 0x62 /* Bank 0; 2 regs in VSEN range */
+#define FANIN1_HV_REG 0x80 /* Bank 0; 2 regs (HV/LV) per sensor */
+#define T_CPU1_HV_REG 0xA0 /* Bank 0; 2 regs (HV/LV) per sensor */
+
+#define PRTS_REG 0x03 /* Bank 2 */
+#define FANCTL1_FMR_REG 0x00 /* Bank 3; 1 reg per channel */
+#define FANCTL1_OUT_REG 0x10 /* Bank 3; 1 reg per channel */
+
+static const unsigned short normal_i2c[] = {
+ 0x2d, 0x2e, I2C_CLIENT_END
+};
+
+struct nct7904_data {
+ struct i2c_client *client;
+ struct mutex bank_lock;
+ int bank_sel;
+ u32 fanin_mask;
+ u32 vsen_mask;
+ u32 tcpu_mask;
+ u8 fan_mode[FANCTL_MAX];
+};
+
+/* Access functions */
+static int nct7904_bank_lock(struct nct7904_data *data, unsigned bank)
+{
+ int ret;
+
+ mutex_lock(&data->bank_lock);
+ if (data->bank_sel == bank)
+ return 0;
+ ret = i2c_smbus_write_byte_data(data->client, BANK_SEL_REG, bank);
+ if (ret == 0)
+ data->bank_sel = bank;
+ else
+ data->bank_sel = -1;
+ return ret;
+}
+
+static inline void nct7904_bank_release(struct nct7904_data *data)
+{
+ mutex_unlock(&data->bank_lock);
+}
+
+/* Read 1-byte register. Returns unsigned reg or -ERRNO on error. */
+static int nct7904_read_reg(struct nct7904_data *data,
+ unsigned bank, unsigned reg)
+{
+ struct i2c_client *client = data->client;
+ int ret;
+
+ ret = nct7904_bank_lock(data, bank);
+ if (ret == 0)
+ ret = i2c_smbus_read_byte_data(client, reg);
+
+ nct7904_bank_release(data);
+ return ret;
+}
+
+/*
+ * Read 2-byte register. Returns register in big-endian format or
+ * -ERRNO on error.
+ */
+static int nct7904_read_reg16(struct nct7904_data *data,
+ unsigned bank, unsigned reg)
+{
+ struct i2c_client *client = data->client;
+ int ret, hi;
+
+ ret = nct7904_bank_lock(data, bank);
+ if (ret == 0) {
+ ret = i2c_smbus_read_byte_data(client, reg);
+ if (ret >= 0) {
+ hi = ret;
+ ret = i2c_smbus_read_byte_data(client, reg + 1);
+ if (ret >= 0)
+ ret |= hi << 8;
+ }
+ }
+
+ nct7904_bank_release(data);
+ return ret;
+}
+
+/* Write 1-byte register. Returns 0 or -ERRNO on error. */
+static int nct7904_write_reg(struct nct7904_data *data,
+ unsigned bank, unsigned reg, u8 val)
+{
+ struct i2c_client *client = data->client;
+ int ret;
+
+ ret = nct7904_bank_lock(data, bank);
+ if (ret == 0)
+ ret = i2c_smbus_write_byte_data(client, reg, val);
+
+ nct7904_bank_release(data);
+ return ret;
+}
+
+/* FANIN ATTR */
+static ssize_t show_fan(struct device *dev,
+ struct device_attribute *devattr, char *buf)
+{
+ int index = to_sensor_dev_attr(devattr)->index;
+ struct nct7904_data *data = dev_get_drvdata(dev);
+ int ret;
+ unsigned cnt, rpm;
+
+ ret = nct7904_read_reg16(data, BANK_0, FANIN1_HV_REG + index * 2);
+ if (ret < 0)
+ return ret;
+ cnt = ((ret & 0xff00) >> 3) | (ret & 0x1f);
+ if (cnt == 0x1fff)
+ rpm = 0;
+ else
+ rpm = 1350000 / cnt;
+ return sprintf(buf, "%u\n", rpm);
+}
+
+static umode_t nct7904_fanin_is_visible(struct kobject *kobj,
+ struct attribute *a, int n)
+{
+ struct device *dev = container_of(kobj, struct device, kobj);
+ struct nct7904_data *data = dev_get_drvdata(dev);
+
+ if (data->fanin_mask & (1 << n))
+ return a->mode;
+ return 0;
+}
+
+static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
+static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
+static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
+static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3);
+static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4);
+static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_fan, NULL, 5);
+static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_fan, NULL, 6);
+static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO, show_fan, NULL, 7);
+static SENSOR_DEVICE_ATTR(fan9_input, S_IRUGO, show_fan, NULL, 8);
+static SENSOR_DEVICE_ATTR(fan10_input, S_IRUGO, show_fan, NULL, 9);
+static SENSOR_DEVICE_ATTR(fan11_input, S_IRUGO, show_fan, NULL, 10);
+static SENSOR_DEVICE_ATTR(fan12_input, S_IRUGO, show_fan, NULL, 11);
+
+static struct attribute *nct7904_fanin_attrs[] = {
+ &sensor_dev_attr_fan1_input.dev_attr.attr,
+ &sensor_dev_attr_fan2_input.dev_attr.attr,
+ &sensor_dev_attr_fan3_input.dev_attr.attr,
+ &sensor_dev_attr_fan4_input.dev_attr.attr,
+ &sensor_dev_attr_fan5_input.dev_attr.attr,
+ &sensor_dev_attr_fan6_input.dev_attr.attr,
+ &sensor_dev_attr_fan7_input.dev_attr.attr,
+ &sensor_dev_attr_fan8_input.dev_attr.attr,
+ &sensor_dev_attr_fan9_input.dev_attr.attr,
+ &sensor_dev_attr_fan10_input.dev_attr.attr,
+ &sensor_dev_attr_fan11_input.dev_attr.attr,
+ &sensor_dev_attr_fan12_input.dev_attr.attr,
+ NULL
+};
+
+static const struct attribute_group nct7904_fanin_group = {
+ .attrs = nct7904_fanin_attrs,
+ .is_visible = nct7904_fanin_is_visible,
+};
+
+/* VSEN ATTR */
+static ssize_t show_voltage(struct device *dev,
+ struct device_attribute *devattr, char *buf)
+{
+ int index = to_sensor_dev_attr(devattr)->index;
+ struct nct7904_data *data = dev_get_drvdata(dev);
+ int ret;
+ int volt;
+
+ ret = nct7904_read_reg16(data, BANK_0, VSEN1_HV_REG + index * 2);
+ if (ret < 0)
+ return ret;
+ volt = ((ret & 0xff00) >> 5) | (ret & 0x7);
+ if (index < 14)
+ volt *= 2; /* 0.002V scale */
+ else
+ volt *= 6; /* 0.006V scale */
+
+ return sprintf(buf, "%d\n", volt);
+}
+
+static ssize_t show_ltemp(struct device *dev,
+ struct device_attribute *devattr, char *buf)
+{
+ struct nct7904_data *data = dev_get_drvdata(dev);
+ int ret;
+ int temp;
+
+ ret = nct7904_read_reg16(data, BANK_0, LTD_HV_REG);
+ if (ret < 0)
+ return ret;
+ temp = ((ret & 0xff00) >> 5) | (ret & 0x7);
+ temp = sign_extend32(temp, 10) * 125;
+
+ return sprintf(buf, "%d\n", temp);
+}
+
+static umode_t nct7904_vsen_is_visible(struct kobject *kobj,
+ struct attribute *a, int n)
+{
+ struct device *dev = container_of(kobj, struct device, kobj);
+ struct nct7904_data *data = dev_get_drvdata(dev);
+
+ if (data->vsen_mask & (1 << n))
+ return a->mode;
+ return 0;
+}
+
+static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_voltage, NULL, 0);
+static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_voltage, NULL, 1);
+static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_voltage, NULL, 2);
+static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_voltage, NULL, 3);
+static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_voltage, NULL, 4);
+static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_voltage, NULL, 5);
+static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_voltage, NULL, 6);
+static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_voltage, NULL, 7);
+static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_voltage, NULL, 8);
+static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_voltage, NULL, 9);
+static SENSOR_DEVICE_ATTR(in11_input, S_IRUGO, show_voltage, NULL, 10);
+static SENSOR_DEVICE_ATTR(in12_input, S_IRUGO, show_voltage, NULL, 11);
+static SENSOR_DEVICE_ATTR(in13_input, S_IRUGO, show_voltage, NULL, 12);
+static SENSOR_DEVICE_ATTR(in14_input, S_IRUGO, show_voltage, NULL, 13);
+/*
+ * Next 3 voltage sensors have specific names in the Nuvoton doc
+ * (3VDD, VBAT, 3VSB) but we use vacant numbers for them.
+ */
+static SENSOR_DEVICE_ATTR(in15_input, S_IRUGO, show_voltage, NULL, 14);
+static SENSOR_DEVICE_ATTR(in16_input, S_IRUGO, show_voltage, NULL, 15);
+static SENSOR_DEVICE_ATTR(in20_input, S_IRUGO, show_voltage, NULL, 16);
+/* This is not a voltage, but a local temperature sensor. */
+static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_ltemp, NULL, 0);
+static SENSOR_DEVICE_ATTR(in17_input, S_IRUGO, show_voltage, NULL, 18);
+static SENSOR_DEVICE_ATTR(in18_input, S_IRUGO, show_voltage, NULL, 19);
+static SENSOR_DEVICE_ATTR(in19_input, S_IRUGO, show_voltage, NULL, 20);
+
+static struct attribute *nct7904_vsen_attrs[] = {
+ &sensor_dev_attr_in1_input.dev_attr.attr,
+ &sensor_dev_attr_in2_input.dev_attr.attr,
+ &sensor_dev_attr_in3_input.dev_attr.attr,
+ &sensor_dev_attr_in4_input.dev_attr.attr,
+ &sensor_dev_attr_in5_input.dev_attr.attr,
+ &sensor_dev_attr_in6_input.dev_attr.attr,
+ &sensor_dev_attr_in7_input.dev_attr.attr,
+ &sensor_dev_attr_in8_input.dev_attr.attr,
+ &sensor_dev_attr_in9_input.dev_attr.attr,
+ &sensor_dev_attr_in10_input.dev_attr.attr,
+ &sensor_dev_attr_in11_input.dev_attr.attr,
+ &sensor_dev_attr_in12_input.dev_attr.attr,
+ &sensor_dev_attr_in13_input.dev_attr.attr,
+ &sensor_dev_attr_in14_input.dev_attr.attr,
+ &sensor_dev_attr_in15_input.dev_attr.attr,
+ &sensor_dev_attr_in16_input.dev_attr.attr,
+ &sensor_dev_attr_in20_input.dev_attr.attr,
+ &sensor_dev_attr_temp1_input.dev_attr.attr,
+ &sensor_dev_attr_in17_input.dev_attr.attr,
+ &sensor_dev_attr_in18_input.dev_attr.attr,
+ &sensor_dev_attr_in19_input.dev_attr.attr,
+ NULL
+};
+
+static const struct attribute_group nct7904_vsen_group = {
+ .attrs = nct7904_vsen_attrs,
+ .is_visible = nct7904_vsen_is_visible,
+};
+
+/* CPU_TEMP ATTR */
+static ssize_t show_tcpu(struct device *dev,
+ struct device_attribute *devattr, char *buf)
+{
+ int index = to_sensor_dev_attr(devattr)->index;
+ struct nct7904_data *data = dev_get_drvdata(dev);
+ int ret;
+ int temp;
+
+ ret = nct7904_read_reg16(data, BANK_0, T_CPU1_HV_REG + index * 2);
+ if (ret < 0)
+ return ret;
+
+ temp = ((ret & 0xff00) >> 5) | (ret & 0x7);
+ temp = sign_extend32(temp, 10) * 125;
+ return sprintf(buf, "%d\n", temp);
+}
+
+static umode_t nct7904_tcpu_is_visible(struct kobject *kobj,
+ struct attribute *a, int n)
+{
+ struct device *dev = container_of(kobj, struct device, kobj);
+ struct nct7904_data *data = dev_get_drvdata(dev);
+
+ if (data->tcpu_mask & (1 << n))
+ return a->mode;
+ return 0;
+}
+
+/* "temp1_input" reserved for local temp */
+static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_tcpu, NULL, 0);
+static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_tcpu, NULL, 1);
+static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_tcpu, NULL, 2);
+static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_tcpu, NULL, 3);
+static SENSOR_DEVICE_ATTR(temp6_input, S_IRUGO, show_tcpu, NULL, 4);
+static SENSOR_DEVICE_ATTR(temp7_input, S_IRUGO, show_tcpu, NULL, 5);
+static SENSOR_DEVICE_ATTR(temp8_input, S_IRUGO, show_tcpu, NULL, 6);
+static SENSOR_DEVICE_ATTR(temp9_input, S_IRUGO, show_tcpu, NULL, 7);
+
+static struct attribute *nct7904_tcpu_attrs[] = {
+ &sensor_dev_attr_temp2_input.dev_attr.attr,
+ &sensor_dev_attr_temp3_input.dev_attr.attr,
+ &sensor_dev_attr_temp4_input.dev_attr.attr,
+ &sensor_dev_attr_temp5_input.dev_attr.attr,
+ &sensor_dev_attr_temp6_input.dev_attr.attr,
+ &sensor_dev_attr_temp7_input.dev_attr.attr,
+ &sensor_dev_attr_temp8_input.dev_attr.attr,
+ &sensor_dev_attr_temp9_input.dev_attr.attr,
+ NULL
+};
+
+static const struct attribute_group nct7904_tcpu_group = {
+ .attrs = nct7904_tcpu_attrs,
+ .is_visible = nct7904_tcpu_is_visible,
+};
+
+/* PWM ATTR */
+static ssize_t store_pwm(struct device *dev, struct device_attribute *devattr,
+ const char *buf, size_t count)
+{
+ int index = to_sensor_dev_attr(devattr)->index;
+ struct nct7904_data *data = dev_get_drvdata(dev);
+ unsigned long val;
+ int ret;
+
+ if (kstrtoul(buf, 10, &val) < 0)
+ return -EINVAL;
+ if (val > 255)
+ return -EINVAL;
+
+ ret = nct7904_write_reg(data, BANK_3, FANCTL1_OUT_REG + index, val);
+
+ return ret ? ret : count;
+}
+
+static ssize_t show_pwm(struct device *dev,
+ struct device_attribute *devattr, char *buf)
+{
+ int index = to_sensor_dev_attr(devattr)->index;
+ struct nct7904_data *data = dev_get_drvdata(dev);
+ int val;
+
+ val = nct7904_read_reg(data, BANK_3, FANCTL1_OUT_REG + index);
+ if (val < 0)
+ return val;
+
+ return sprintf(buf, "%d\n", val);
+}
+
+static ssize_t store_mode(struct device *dev, struct device_attribute *devattr,
+ const char *buf, size_t count)
+{
+ int index = to_sensor_dev_attr(devattr)->index;
+ struct nct7904_data *data = dev_get_drvdata(dev);
+ unsigned long val;
+ int ret;
+
+ if (kstrtoul(buf, 10, &val) < 0)
+ return -EINVAL;
+ if (val > 1 || (val && !data->fan_mode[index]))
+ return -EINVAL;
+
+ ret = nct7904_write_reg(data, BANK_3, FANCTL1_FMR_REG + index,
+ val ? data->fan_mode[index] : 0);
+
+ return ret ? ret : count;
+}
+
+/* Return 0 for manual mode or 1 for SmartFan mode */
+static ssize_t show_mode(struct device *dev,
+ struct device_attribute *devattr, char *buf)
+{
+ int index = to_sensor_dev_attr(devattr)->index;
+ struct nct7904_data *data = dev_get_drvdata(dev);
+ int val;
+
+ val = nct7904_read_reg(data, BANK_3, FANCTL1_FMR_REG + index);
+ if (val < 0)
+ return val;
+
+ return sprintf(buf, "%d\n", val ? 1 : 0);
+}
+
+/* 2 attributes per channel: pwm and mode */
+static SENSOR_DEVICE_ATTR(fan1_pwm, S_IRUGO | S_IWUSR,
+ show_pwm, store_pwm, 0);
+static SENSOR_DEVICE_ATTR(fan1_mode, S_IRUGO | S_IWUSR,
+ show_mode, store_mode, 0);
+static SENSOR_DEVICE_ATTR(fan2_pwm, S_IRUGO | S_IWUSR,
+ show_pwm, store_pwm, 1);
+static SENSOR_DEVICE_ATTR(fan2_mode, S_IRUGO | S_IWUSR,
+ show_mode, store_mode, 1);
+static SENSOR_DEVICE_ATTR(fan3_pwm, S_IRUGO | S_IWUSR,
+ show_pwm, store_pwm, 2);
+static SENSOR_DEVICE_ATTR(fan3_mode, S_IRUGO | S_IWUSR,
+ show_mode, store_mode, 2);
+static SENSOR_DEVICE_ATTR(fan4_pwm, S_IRUGO | S_IWUSR,
+ show_pwm, store_pwm, 3);
+static SENSOR_DEVICE_ATTR(fan4_mode, S_IRUGO | S_IWUSR,
+ show_mode, store_mode, 3);
+
+static struct attribute *nct7904_fanctl_attrs[] = {
+ &sensor_dev_attr_fan1_pwm.dev_attr.attr,
+ &sensor_dev_attr_fan1_mode.dev_attr.attr,
+ &sensor_dev_attr_fan2_pwm.dev_attr.attr,
+ &sensor_dev_attr_fan2_mode.dev_attr.attr,
+ &sensor_dev_attr_fan3_pwm.dev_attr.attr,
+ &sensor_dev_attr_fan3_mode.dev_attr.attr,
+ &sensor_dev_attr_fan4_pwm.dev_attr.attr,
+ &sensor_dev_attr_fan4_mode.dev_attr.attr,
+ NULL
+};
+
+static const struct attribute_group nct7904_fanctl_group = {
+ .attrs = nct7904_fanctl_attrs,
+};
+
+static const struct attribute_group *nct7904_groups[] = {
+ &nct7904_fanin_group,
+ &nct7904_vsen_group,
+ &nct7904_tcpu_group,
+ &nct7904_fanctl_group,
+ NULL
+};
+
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int nct7904_detect(struct i2c_client *client,
+ struct i2c_board_info *info)
+{
+ struct i2c_adapter *adapter = client->adapter;
+
+ if (!i2c_check_functionality(adapter,
+ I2C_FUNC_SMBUS_READ_BYTE |
+ I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
+ return -ENODEV;
+
+ /* Determine the chip type. */
+ if (i2c_smbus_read_byte_data(client, VENDOR_ID_REG) != NUVOTON_ID ||
+ i2c_smbus_read_byte_data(client, CHIP_ID_REG) != NCT7904_ID ||
+ (i2c_smbus_read_byte_data(client, DEVICE_ID_REG) & 0xf0) != 0x50 ||
+ (i2c_smbus_read_byte_data(client, BANK_SEL_REG) & 0xf8) != 0x00)
+ return -ENODEV;
+
+ strlcpy(info->type, "nct7904", I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int nct7904_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct nct7904_data *data;
+ struct device *hwmon_dev;
+ struct device *dev = &client->dev;
+ int ret, i;
+ u32 mask;
+
+ data = devm_kzalloc(dev, sizeof(struct nct7904_data), GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ data->client = client;
+ mutex_init(&data->bank_lock);
+ data->bank_sel = -1;
+
+ /* Setup sensor groups. */
+ /* FANIN attributes */
+ ret = nct7904_read_reg16(data, BANK_0, FANIN_CTRL0_REG);
+ if (ret < 0)
+ return ret;
+ data->fanin_mask = (ret >> 8) | ((ret & 0xff) << 8);
+
+ /*
+ * VSEN attributes
+ *
+ * Note: voltage sensors overlap with external temperature
+ * sensors. So, if we ever decide to support the latter
+ * we will have to adjust 'vsen_mask' accordingly.
+ */
+ mask = 0;
+ ret = nct7904_read_reg16(data, BANK_0, VT_ADC_CTRL0_REG);
+ if (ret >= 0)
+ mask = (ret >> 8) | ((ret & 0xff) << 8);
+ ret = nct7904_read_reg(data, BANK_0, VT_ADC_CTRL2_REG);
+ if (ret >= 0)
+ mask |= (ret << 16);
+ data->vsen_mask = mask;
+
+ /* CPU_TEMP attributes */
+ ret = nct7904_read_reg16(data, BANK_0, DTS_T_CTRL0_REG);
+ if (ret < 0)
+ return ret;
+ data->tcpu_mask = ((ret >> 8) & 0xf) | ((ret & 0xf) << 4);
+
+ for (i = 0; i < FANCTL_MAX; i++) {
+ ret = nct7904_read_reg(data, BANK_3, FANCTL1_FMR_REG + i);
+ if (ret < 0)
+ return ret;
+ data->fan_mode[i] = ret;
+ }
+
+ hwmon_dev =
+ devm_hwmon_device_register_with_groups(dev, client->name, data,
+ nct7904_groups);
+ return PTR_ERR_OR_ZERO(hwmon_dev);
+}
+
+static const struct i2c_device_id nct7904_id[] = {
+ {"nct7904", 0},
+ {}
+};
+
+static struct i2c_driver nct7904_driver = {
+ .class = I2C_CLASS_HWMON,
+ .driver = {
+ .name = "nct7904",
+ },
+ .probe = nct7904_probe,
+ .id_table = nct7904_id,
+ .detect = nct7904_detect,
+ .address_list = normal_i2c,
+};
+
+module_i2c_driver(nct7904_driver);
+
+MODULE_AUTHOR("Vadim V. Vlasov <vvlasov@dev.rtsoft.ru>");
+MODULE_DESCRIPTION("Hwmon driver for NUVOTON NCT7904");
+MODULE_LICENSE("GPL");
#include <linux/platform_device.h>
#include <linux/pwm.h>
#include <linux/sysfs.h>
+#include <linux/thermal.h>
#define MAX_PWM 255
struct pwm_fan_ctx {
struct mutex lock;
struct pwm_device *pwm;
- unsigned char pwm_value;
+ unsigned int pwm_value;
+ unsigned int pwm_fan_state;
+ unsigned int pwm_fan_max_state;
+ unsigned int *pwm_fan_cooling_levels;
+ struct thermal_cooling_device *cdev;
};
-static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
- const char *buf, size_t count)
+static int __set_pwm(struct pwm_fan_ctx *ctx, unsigned long pwm)
{
- struct pwm_fan_ctx *ctx = dev_get_drvdata(dev);
- unsigned long pwm, duty;
- ssize_t ret;
-
- if (kstrtoul(buf, 10, &pwm) || pwm > MAX_PWM)
- return -EINVAL;
+ unsigned long duty;
+ int ret = 0;
mutex_lock(&ctx->lock);
-
if (ctx->pwm_value == pwm)
- goto exit_set_pwm_no_change;
-
- if (pwm == 0) {
- pwm_disable(ctx->pwm);
- goto exit_set_pwm;
- }
+ goto exit_set_pwm_err;
duty = DIV_ROUND_UP(pwm * (ctx->pwm->period - 1), MAX_PWM);
ret = pwm_config(ctx->pwm, duty, ctx->pwm->period);
if (ret)
goto exit_set_pwm_err;
+ if (pwm == 0)
+ pwm_disable(ctx->pwm);
+
if (ctx->pwm_value == 0) {
ret = pwm_enable(ctx->pwm);
if (ret)
goto exit_set_pwm_err;
}
-exit_set_pwm:
ctx->pwm_value = pwm;
-exit_set_pwm_no_change:
- ret = count;
exit_set_pwm_err:
mutex_unlock(&ctx->lock);
return ret;
}
+static void pwm_fan_update_state(struct pwm_fan_ctx *ctx, unsigned long pwm)
+{
+ int i;
+
+ for (i = 0; i < ctx->pwm_fan_max_state; ++i)
+ if (pwm < ctx->pwm_fan_cooling_levels[i + 1])
+ break;
+
+ ctx->pwm_fan_state = i;
+}
+
+static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct pwm_fan_ctx *ctx = dev_get_drvdata(dev);
+ unsigned long pwm;
+ int ret;
+
+ if (kstrtoul(buf, 10, &pwm) || pwm > MAX_PWM)
+ return -EINVAL;
+
+ ret = __set_pwm(ctx, pwm);
+ if (ret)
+ return ret;
+
+ pwm_fan_update_state(ctx, pwm);
+ return count;
+}
+
static ssize_t show_pwm(struct device *dev,
struct device_attribute *attr, char *buf)
{
ATTRIBUTE_GROUPS(pwm_fan);
+/* thermal cooling device callbacks */
+static int pwm_fan_get_max_state(struct thermal_cooling_device *cdev,
+ unsigned long *state)
+{
+ struct pwm_fan_ctx *ctx = cdev->devdata;
+
+ if (!ctx)
+ return -EINVAL;
+
+ *state = ctx->pwm_fan_max_state;
+
+ return 0;
+}
+
+static int pwm_fan_get_cur_state(struct thermal_cooling_device *cdev,
+ unsigned long *state)
+{
+ struct pwm_fan_ctx *ctx = cdev->devdata;
+
+ if (!ctx)
+ return -EINVAL;
+
+ *state = ctx->pwm_fan_state;
+
+ return 0;
+}
+
+static int
+pwm_fan_set_cur_state(struct thermal_cooling_device *cdev, unsigned long state)
+{
+ struct pwm_fan_ctx *ctx = cdev->devdata;
+ int ret;
+
+ if (!ctx || (state > ctx->pwm_fan_max_state))
+ return -EINVAL;
+
+ if (state == ctx->pwm_fan_state)
+ return 0;
+
+ ret = __set_pwm(ctx, ctx->pwm_fan_cooling_levels[state]);
+ if (ret) {
+ dev_err(&cdev->device, "Cannot set pwm!\n");
+ return ret;
+ }
+
+ ctx->pwm_fan_state = state;
+
+ return ret;
+}
+
+static const struct thermal_cooling_device_ops pwm_fan_cooling_ops = {
+ .get_max_state = pwm_fan_get_max_state,
+ .get_cur_state = pwm_fan_get_cur_state,
+ .set_cur_state = pwm_fan_set_cur_state,
+};
+
+static int pwm_fan_of_get_cooling_data(struct device *dev,
+ struct pwm_fan_ctx *ctx)
+{
+ struct device_node *np = dev->of_node;
+ int num, i, ret;
+
+ if (!of_find_property(np, "cooling-levels", NULL))
+ return 0;
+
+ ret = of_property_count_u32_elems(np, "cooling-levels");
+ if (ret <= 0) {
+ dev_err(dev, "Wrong data!\n");
+ return ret ? : -EINVAL;
+ }
+
+ num = ret;
+ ctx->pwm_fan_cooling_levels = devm_kzalloc(dev, num * sizeof(u32),
+ GFP_KERNEL);
+ if (!ctx->pwm_fan_cooling_levels)
+ return -ENOMEM;
+
+ ret = of_property_read_u32_array(np, "cooling-levels",
+ ctx->pwm_fan_cooling_levels, num);
+ if (ret) {
+ dev_err(dev, "Property 'cooling-levels' cannot be read!\n");
+ return ret;
+ }
+
+ for (i = 0; i < num; i++) {
+ if (ctx->pwm_fan_cooling_levels[i] > MAX_PWM) {
+ dev_err(dev, "PWM fan state[%d]:%d > %d\n", i,
+ ctx->pwm_fan_cooling_levels[i], MAX_PWM);
+ return -EINVAL;
+ }
+ }
+
+ ctx->pwm_fan_max_state = num - 1;
+
+ return 0;
+}
+
static int pwm_fan_probe(struct platform_device *pdev)
{
- struct device *hwmon;
+ struct thermal_cooling_device *cdev;
struct pwm_fan_ctx *ctx;
+ struct device *hwmon;
int duty_cycle;
int ret;
pwm_disable(ctx->pwm);
return PTR_ERR(hwmon);
}
+
+ ret = pwm_fan_of_get_cooling_data(&pdev->dev, ctx);
+ if (ret)
+ return ret;
+
+ ctx->pwm_fan_state = ctx->pwm_fan_max_state;
+ if (IS_ENABLED(CONFIG_THERMAL)) {
+ cdev = thermal_of_cooling_device_register(pdev->dev.of_node,
+ "pwm-fan", ctx,
+ &pwm_fan_cooling_ops);
+ if (IS_ERR(cdev)) {
+ dev_err(&pdev->dev,
+ "Failed to register pwm-fan as cooling device");
+ pwm_disable(ctx->pwm);
+ return PTR_ERR(cdev);
+ }
+ ctx->cdev = cdev;
+ thermal_cdev_update(cdev);
+ }
+
return 0;
}
{
struct pwm_fan_ctx *ctx = platform_get_drvdata(pdev);
+ thermal_cooling_device_unregister(ctx->cdev);
if (ctx->pwm_value)
pwm_disable(ctx->pwm);
return 0;
static SIMPLE_DEV_PM_OPS(pwm_fan_pm, pwm_fan_suspend, pwm_fan_resume);
-static struct of_device_id of_pwm_fan_match[] = {
+static const struct of_device_id of_pwm_fan_match[] = {
{ .compatible = "pwm-fan", },
{},
};
},
};
-static struct of_device_id vexpress_hwmon_of_match[] = {
+static const struct of_device_id vexpress_hwmon_of_match[] = {
#if !defined(CONFIG_REGULATOR_VEXPRESS)
{
.compatible = "arm,vexpress-volt",
the platform firmware controlling it. You should say Y if running on
a BayTrail system using the AXP288.
+config I2C_DIGICOLOR
+ tristate "Conexant Digicolor I2C driver"
+ depends on ARCH_DIGICOLOR
+ help
+ Support for Conexant Digicolor SoCs (CX92755) I2C controller driver.
+
+ This driver can also be built as a module. If so, the module
+ will be called i2c-digicolor.
+
config I2C_EFM32
tristate "EFM32 I2C controller"
depends on ARCH_EFM32 || COMPILE_TEST
This driver can also be built as a module. If so, the module
will be called i2c-iop3xx.
+config I2C_JZ4780
+ tristate "JZ4780 I2C controller interface support"
+ depends on MACH_JZ4780 || COMPILE_TEST
+ help
+ If you say yes to this option, support will be included for the
+ Ingenic JZ4780 I2C controller.
+
+ If you don't know what to do here, say N.
+
config I2C_KEMPLD
tristate "Kontron COM I2C Controller"
depends on MFD_KEMPLD
This driver can also be built as a module. If so, the module
will be called i2c-xlr.
+config I2C_XLP9XX
+ tristate "XLP9XX I2C support"
+ depends on CPU_XLP || COMPILE_TEST
+ help
+ This driver enables support for the on-chip I2C interface of
+ the Broadcom XLP9xx/XLP5xx MIPS processors.
+
+ This driver can also be built as a module. If so, the module will
+ be called i2c-xlp9xx.
+
config I2C_RCAR
tristate "Renesas R-Car I2C Controller"
depends on ARCH_SHMOBILE || COMPILE_TEST
i2c-designware-platform-$(CONFIG_I2C_DESIGNWARE_BAYTRAIL) += i2c-designware-baytrail.o
obj-$(CONFIG_I2C_DESIGNWARE_PCI) += i2c-designware-pci.o
i2c-designware-pci-objs := i2c-designware-pcidrv.o
+obj-$(CONFIG_I2C_DIGICOLOR) += i2c-digicolor.o
obj-$(CONFIG_I2C_EFM32) += i2c-efm32.o
obj-$(CONFIG_I2C_EG20T) += i2c-eg20t.o
obj-$(CONFIG_I2C_EXYNOS5) += i2c-exynos5.o
obj-$(CONFIG_I2C_IMG) += i2c-img-scb.o
obj-$(CONFIG_I2C_IMX) += i2c-imx.o
obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o
+obj-$(CONFIG_I2C_JZ4780) += i2c-jz4780.o
obj-$(CONFIG_I2C_KEMPLD) += i2c-kempld.o
obj-$(CONFIG_I2C_MESON) += i2c-meson.o
obj-$(CONFIG_I2C_MPC) += i2c-mpc.o
obj-$(CONFIG_I2C_OCTEON) += i2c-octeon.o
obj-$(CONFIG_I2C_XILINX) += i2c-xiic.o
obj-$(CONFIG_I2C_XLR) += i2c-xlr.o
+obj-$(CONFIG_I2C_XLP9XX) += i2c-xlp9xx.o
obj-$(CONFIG_I2C_RCAR) += i2c-rcar.o
# External I2C/SMBus adapter drivers
static int at91_do_twi_transfer(struct at91_twi_dev *dev)
{
int ret;
+ unsigned long time_left;
bool has_unre_flag = dev->pdata->has_unre_flag;
dev_dbg(dev->dev, "transfer: %s %d bytes.\n",
}
}
- ret = wait_for_completion_timeout(&dev->cmd_complete,
- dev->adapter.timeout);
- if (ret == 0) {
+ time_left = wait_for_completion_timeout(&dev->cmd_complete,
+ dev->adapter.timeout);
+ if (time_left == 0) {
dev_err(dev->dev, "controller timed out\n");
at91_init_twi_bus(dev);
ret = -ETIMEDOUT;
if (ret < 0)
goto out;
- /*
- * The hardware can handle at most two messages concatenated by a
- * repeated start via it's internal address feature.
- */
- if (num > 2) {
- dev_err(dev->dev,
- "cannot handle more than two concatenated messages.\n");
- ret = 0;
- goto out;
- } else if (num == 2) {
+ if (num == 2) {
int internal_address = 0;
int i;
- if (msg->flags & I2C_M_RD) {
- dev_err(dev->dev, "first transfer must be write.\n");
- ret = -EINVAL;
- goto out;
- }
- if (msg->len > 3) {
- dev_err(dev->dev, "first message size must be <= 3.\n");
- ret = -EINVAL;
- goto out;
- }
-
/* 1st msg is put into the internal address, start with 2nd */
m_start = &msg[1];
for (i = 0; i < msg->len; ++i) {
return ret;
}
+/*
+ * The hardware can handle at most two messages concatenated by a
+ * repeated start via it's internal address feature.
+ */
+static struct i2c_adapter_quirks at91_twi_quirks = {
+ .flags = I2C_AQ_COMB | I2C_AQ_COMB_WRITE_FIRST | I2C_AQ_COMB_SAME_ADDR,
+ .max_comb_1st_msg_len = 3,
+};
+
static u32 at91_twi_func(struct i2c_adapter *adapter)
{
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL
dev->adapter.owner = THIS_MODULE;
dev->adapter.class = I2C_CLASS_DEPRECATED;
dev->adapter.algo = &at91_twi_algorithm;
+ dev->adapter.quirks = &at91_twi_quirks;
dev->adapter.dev.parent = dev->dev;
dev->adapter.nr = pdev->id;
dev->adapter.timeout = AT91_I2C_TIMEOUT;
u32 int_mask = MST_STATUS_ERR | MST_STATUS_SNS;
u32 rx_xfer, tx_xfer;
u32 addr_1, addr_2;
- int ret;
-
- if (msg->len > 255) {
- dev_warn(idev->dev, "unsupported length %u\n", msg->len);
- return -EINVAL;
- }
+ unsigned long time_left;
idev->msg = msg;
idev->msg_xfrd = 0;
i2c_int_enable(idev, int_mask);
- ret = wait_for_completion_timeout(&idev->msg_complete,
- I2C_XFER_TIMEOUT);
+ time_left = wait_for_completion_timeout(&idev->msg_complete,
+ I2C_XFER_TIMEOUT);
i2c_int_disable(idev, int_mask);
if (readl(idev->base + MST_COMMAND) & CMD_BUSY)
dev_warn(idev->dev, "busy after xfer\n");
- if (ret == 0)
+ if (time_left == 0)
idev->msg_err = -ETIMEDOUT;
if (unlikely(idev->msg_err) && idev->msg_err != -ENXIO)
static int axxia_i2c_stop(struct axxia_i2c_dev *idev)
{
u32 int_mask = MST_STATUS_ERR | MST_STATUS_SCC;
- int ret;
+ unsigned long time_left;
reinit_completion(&idev->msg_complete);
/* Issue stop */
writel(0xb, idev->base + MST_COMMAND);
i2c_int_enable(idev, int_mask);
- ret = wait_for_completion_timeout(&idev->msg_complete,
- I2C_STOP_TIMEOUT);
+ time_left = wait_for_completion_timeout(&idev->msg_complete,
+ I2C_STOP_TIMEOUT);
i2c_int_disable(idev, int_mask);
- if (ret == 0)
+ if (time_left == 0)
return -ETIMEDOUT;
if (readl(idev->base + MST_COMMAND) & CMD_BUSY)
.functionality = axxia_i2c_func,
};
+static struct i2c_adapter_quirks axxia_i2c_quirks = {
+ .max_read_len = 255,
+ .max_write_len = 255,
+};
+
static int axxia_i2c_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
strlcpy(idev->adapter.name, pdev->name, sizeof(idev->adapter.name));
idev->adapter.owner = THIS_MODULE;
idev->adapter.algo = &axxia_i2c_algo;
+ idev->adapter.quirks = &axxia_i2c_quirks;
idev->adapter.dev.parent = &pdev->dev;
idev->adapter.dev.of_node = pdev->dev.of_node;
u32 val;
unsigned long time_left = msecs_to_jiffies(I2C_TIMEOUT_MESC);
- /* need to reserve one byte in the FIFO for the slave address */
- if (msg->len > M_TX_RX_FIFO_SIZE - 1) {
- dev_err(iproc_i2c->device,
- "only support data length up to %u bytes\n",
- M_TX_RX_FIFO_SIZE - 1);
- return -EOPNOTSUPP;
- }
-
/* check if bus is busy */
if (!!(readl(iproc_i2c->base + M_CMD_OFFSET) &
BIT(M_CMD_START_BUSY_SHIFT))) {
.functionality = bcm_iproc_i2c_functionality,
};
+static struct i2c_adapter_quirks bcm_iproc_i2c_quirks = {
+ /* need to reserve one byte in the FIFO for the slave address */
+ .max_read_len = M_TX_RX_FIFO_SIZE - 1,
+ .max_write_len = M_TX_RX_FIFO_SIZE - 1,
+};
+
static int bcm_iproc_i2c_cfg_speed(struct bcm_iproc_i2c_dev *iproc_i2c)
{
unsigned int bus_speed;
i2c_set_adapdata(adap, iproc_i2c);
strlcpy(adap->name, "Broadcom iProc I2C adapter", sizeof(adap->name));
adap->algo = &bcm_iproc_algo;
+ adap->quirks = &bcm_iproc_i2c_quirks;
adap->dev.parent = &pdev->dev;
adap->dev.of_node = pdev->dev.of_node;
struct i2c_msg *msg)
{
u32 c;
- int time_left;
+ unsigned long time_left;
i2c_dev->msg_buf = msg->buf;
i2c_dev->msg_buf_remaining = msg->len;
static int cdns_i2c_process_msg(struct cdns_i2c *id, struct i2c_msg *msg,
struct i2c_adapter *adap)
{
- int ret;
+ unsigned long time_left;
u32 reg;
id->p_msg = msg;
cdns_i2c_msend(id);
/* Wait for the signal of completion */
- ret = wait_for_completion_timeout(&id->xfer_done, adap->timeout);
- if (!ret) {
+ time_left = wait_for_completion_timeout(&id->xfer_done, adap->timeout);
+ if (time_left == 0) {
cdns_i2c_master_reset(adap);
dev_err(id->adap.dev.parent,
"timeout waiting on completion\n");
struct i2c_reg __iomem *i2c_reg = cpm->i2c_reg;
struct i2c_ram __iomem *i2c_ram = cpm->i2c_ram;
struct i2c_msg *pmsg;
- int ret, i;
+ int ret;
int tptr;
int rptr;
cbd_t __iomem *tbdf;
cbd_t __iomem *rbdf;
- if (num > CPM_MAXBD)
- return -EINVAL;
-
- /* Check if we have any oversized READ requests */
- for (i = 0; i < num; i++) {
- pmsg = &msgs[i];
- if (pmsg->len >= CPM_MAX_READ)
- return -EINVAL;
- }
-
/* Reset to use first buffer */
out_be16(&i2c_ram->rbptr, in_be16(&i2c_ram->rbase));
out_be16(&i2c_ram->tbptr, in_be16(&i2c_ram->tbase));
.functionality = cpm_i2c_func,
};
+/* CPM_MAX_READ is also limiting writes according to the code! */
+static struct i2c_adapter_quirks cpm_i2c_quirks = {
+ .max_num_msgs = CPM_MAXBD,
+ .max_read_len = CPM_MAX_READ,
+ .max_write_len = CPM_MAX_READ,
+};
+
static const struct i2c_adapter cpm_ops = {
.owner = THIS_MODULE,
.name = "i2c-cpm",
.algo = &cpm_i2c_algo,
+ .quirks = &cpm_i2c_quirks,
};
static int cpm_i2c_setup(struct cpm_i2c *cpm)
#define DAVINCI_I2C_IVR_REG 0x28
#define DAVINCI_I2C_EMDR_REG 0x2c
#define DAVINCI_I2C_PSC_REG 0x30
+#define DAVINCI_I2C_FUNC_REG 0x48
+#define DAVINCI_I2C_DIR_REG 0x4c
+#define DAVINCI_I2C_DIN_REG 0x50
+#define DAVINCI_I2C_DOUT_REG 0x54
+#define DAVINCI_I2C_DSET_REG 0x58
+#define DAVINCI_I2C_DCLR_REG 0x5c
#define DAVINCI_I2C_IVR_AAS 0x07
#define DAVINCI_I2C_IVR_SCD 0x06
#define DAVINCI_I2C_IMR_NACK BIT(1)
#define DAVINCI_I2C_IMR_AL BIT(0)
+/* set SDA and SCL as GPIO */
+#define DAVINCI_I2C_FUNC_PFUNC0 BIT(0)
+
+/* set SCL as output when used as GPIO*/
+#define DAVINCI_I2C_DIR_PDIR0 BIT(0)
+/* set SDA as output when used as GPIO*/
+#define DAVINCI_I2C_DIR_PDIR1 BIT(1)
+
+/* read SCL GPIO level */
+#define DAVINCI_I2C_DIN_PDIN0 BIT(0)
+/* read SDA GPIO level */
+#define DAVINCI_I2C_DIN_PDIN1 BIT(1)
+
+/*set the SCL GPIO high */
+#define DAVINCI_I2C_DSET_PDSET0 BIT(0)
+/*set the SDA GPIO high */
+#define DAVINCI_I2C_DSET_PDSET1 BIT(1)
+
+/* set the SCL GPIO low */
+#define DAVINCI_I2C_DCLR_PDCLR0 BIT(0)
+/* set the SDA GPIO low */
+#define DAVINCI_I2C_DCLR_PDCLR1 BIT(1)
+
struct davinci_i2c_dev {
struct device *dev;
void __iomem *base;
return readw_relaxed(i2c_dev->base + reg);
}
-/* Generate a pulse on the i2c clock pin. */
-static void davinci_i2c_clock_pulse(unsigned int scl_pin)
-{
- u16 i;
-
- if (scl_pin) {
- /* Send high and low on the SCL line */
- for (i = 0; i < 9; i++) {
- gpio_set_value(scl_pin, 0);
- udelay(20);
- gpio_set_value(scl_pin, 1);
- udelay(20);
- }
- }
-}
-
-/* This routine does i2c bus recovery as specified in the
- * i2c protocol Rev. 03 section 3.16 titled "Bus clear"
- */
-static void davinci_i2c_recover_bus(struct davinci_i2c_dev *dev)
-{
- u32 flag = 0;
- struct davinci_i2c_platform_data *pdata = dev->pdata;
-
- dev_err(dev->dev, "initiating i2c bus recovery\n");
- /* Send NACK to the slave */
- flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
- flag |= DAVINCI_I2C_MDR_NACK;
- /* write the data into mode register */
- davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
- davinci_i2c_clock_pulse(pdata->scl_pin);
- /* Send STOP */
- flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
- flag |= DAVINCI_I2C_MDR_STP;
- davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
-}
-
static inline void davinci_i2c_reset_ctrl(struct davinci_i2c_dev *i2c_dev,
int val)
{
return 0;
}
+/*
+ * This routine does i2c bus recovery by using i2c_generic_gpio_recovery
+ * which is provided by I2C Bus recovery infrastructure.
+ */
+static void davinci_i2c_prepare_recovery(struct i2c_adapter *adap)
+{
+ struct davinci_i2c_dev *dev = i2c_get_adapdata(adap);
+
+ /* Disable interrupts */
+ davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, 0);
+
+ /* put I2C into reset */
+ davinci_i2c_reset_ctrl(dev, 0);
+}
+
+static void davinci_i2c_unprepare_recovery(struct i2c_adapter *adap)
+{
+ struct davinci_i2c_dev *dev = i2c_get_adapdata(adap);
+
+ i2c_davinci_init(dev);
+}
+
+static struct i2c_bus_recovery_info davinci_i2c_gpio_recovery_info = {
+ .recover_bus = i2c_generic_gpio_recovery,
+ .prepare_recovery = davinci_i2c_prepare_recovery,
+ .unprepare_recovery = davinci_i2c_unprepare_recovery,
+};
+
+static void davinci_i2c_set_scl(struct i2c_adapter *adap, int val)
+{
+ struct davinci_i2c_dev *dev = i2c_get_adapdata(adap);
+
+ if (val)
+ davinci_i2c_write_reg(dev, DAVINCI_I2C_DSET_REG,
+ DAVINCI_I2C_DSET_PDSET0);
+ else
+ davinci_i2c_write_reg(dev, DAVINCI_I2C_DCLR_REG,
+ DAVINCI_I2C_DCLR_PDCLR0);
+}
+
+static int davinci_i2c_get_scl(struct i2c_adapter *adap)
+{
+ struct davinci_i2c_dev *dev = i2c_get_adapdata(adap);
+ int val;
+
+ /* read the state of SCL */
+ val = davinci_i2c_read_reg(dev, DAVINCI_I2C_DIN_REG);
+ return val & DAVINCI_I2C_DIN_PDIN0;
+}
+
+static int davinci_i2c_get_sda(struct i2c_adapter *adap)
+{
+ struct davinci_i2c_dev *dev = i2c_get_adapdata(adap);
+ int val;
+
+ /* read the state of SDA */
+ val = davinci_i2c_read_reg(dev, DAVINCI_I2C_DIN_REG);
+ return val & DAVINCI_I2C_DIN_PDIN1;
+}
+
+static void davinci_i2c_scl_prepare_recovery(struct i2c_adapter *adap)
+{
+ struct davinci_i2c_dev *dev = i2c_get_adapdata(adap);
+
+ davinci_i2c_prepare_recovery(adap);
+
+ /* SCL output, SDA input */
+ davinci_i2c_write_reg(dev, DAVINCI_I2C_DIR_REG, DAVINCI_I2C_DIR_PDIR0);
+
+ /* change to GPIO mode */
+ davinci_i2c_write_reg(dev, DAVINCI_I2C_FUNC_REG,
+ DAVINCI_I2C_FUNC_PFUNC0);
+}
+
+static void davinci_i2c_scl_unprepare_recovery(struct i2c_adapter *adap)
+{
+ struct davinci_i2c_dev *dev = i2c_get_adapdata(adap);
+
+ /* change back to I2C mode */
+ davinci_i2c_write_reg(dev, DAVINCI_I2C_FUNC_REG, 0);
+
+ davinci_i2c_unprepare_recovery(adap);
+}
+
+static struct i2c_bus_recovery_info davinci_i2c_scl_recovery_info = {
+ .recover_bus = i2c_generic_scl_recovery,
+ .set_scl = davinci_i2c_set_scl,
+ .get_scl = davinci_i2c_get_scl,
+ .get_sda = davinci_i2c_get_sda,
+ .prepare_recovery = davinci_i2c_scl_prepare_recovery,
+ .unprepare_recovery = davinci_i2c_scl_unprepare_recovery,
+};
+
/*
* Waiting for bus not busy
*/
return -ETIMEDOUT;
} else {
to_cnt = 0;
- davinci_i2c_recover_bus(dev);
- i2c_davinci_init(dev);
+ i2c_recover_bus(&dev->adapter);
}
}
if (allow_sleep)
struct davinci_i2c_platform_data *pdata = dev->pdata;
u32 flag;
u16 w;
- int r;
+ unsigned long time_left;
/* Introduce a delay, required for some boards (e.g Davinci EVM) */
if (pdata->bus_delay)
flag |= DAVINCI_I2C_MDR_STP;
davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
- r = wait_for_completion_timeout(&dev->cmd_complete, dev->adapter.timeout);
- if (r == 0) {
+ time_left = wait_for_completion_timeout(&dev->cmd_complete,
+ dev->adapter.timeout);
+ if (!time_left) {
dev_err(dev->dev, "controller timed out\n");
- davinci_i2c_recover_bus(dev);
- i2c_davinci_init(dev);
+ i2c_recover_bus(adap);
dev->buf_len = 0;
return -ETIMEDOUT;
}
/* This should be 0 if all bytes were transferred
* or dev->cmd_err denotes an error.
*/
- if (r >= 0) {
- dev_err(dev->dev, "abnormal termination buf_len=%i\n",
- dev->buf_len);
- r = -EREMOTEIO;
- }
+ dev_err(dev->dev, "abnormal termination buf_len=%i\n",
+ dev->buf_len);
dev->terminate = 1;
wmb();
dev->buf_len = 0;
+ return -EREMOTEIO;
}
- if (r < 0)
- return r;
/* no error */
if (likely(!dev->cmd_err))
if (!of_property_read_u32(pdev->dev.of_node, "clock-frequency",
&prop))
dev->pdata->bus_freq = prop / 1000;
+
+ dev->pdata->has_pfunc =
+ of_property_read_bool(pdev->dev.of_node,
+ "ti,has-pfunc");
} else if (!dev->pdata) {
dev->pdata = &davinci_i2c_platform_data_default;
}
adap->timeout = DAVINCI_I2C_TIMEOUT;
adap->dev.of_node = pdev->dev.of_node;
+ if (dev->pdata->has_pfunc)
+ adap->bus_recovery_info = &davinci_i2c_scl_recovery_info;
+ else if (dev->pdata->scl_pin) {
+ adap->bus_recovery_info = &davinci_i2c_gpio_recovery_info;
+ adap->bus_recovery_info->scl_gpio = dev->pdata->scl_pin;
+ adap->bus_recovery_info->sda_gpio = dev->pdata->sda_pin;
+ }
+
adap->nr = pdev->id;
r = i2c_add_numbered_adapter(adap);
if (r) {
i2c_dw_xfer_init(dev);
/* wait for tx to complete */
- ret = wait_for_completion_timeout(&dev->cmd_complete, HZ);
- if (ret == 0) {
+ if (!wait_for_completion_timeout(&dev->cmd_complete, HZ)) {
dev_err(dev->dev, "controller timed out\n");
/* i2c_dw_init implicitly disables the adapter */
i2c_dw_init(dev);
u32 clk_freq, ht = 0;
irq = platform_get_irq(pdev, 0);
- if (irq < 0) {
- dev_err(&pdev->dev, "no irq resource?\n");
- return irq; /* -ENXIO */
- }
+ if (irq < 0)
+ return irq;
dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
if (!dev)
--- /dev/null
+/*
+ * I2C bus driver for Conexant Digicolor SoCs
+ *
+ * Author: Baruch Siach <baruch@tkos.co.il>
+ *
+ * Copyright (C) 2015 Paradox Innovation Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/clk.h>
+#include <linux/completion.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+#define DEFAULT_FREQ 100000
+#define TIMEOUT_MS 100
+
+#define II_CONTROL 0x0
+#define II_CONTROL_LOCAL_RESET BIT(0)
+
+#define II_CLOCKTIME 0x1
+
+#define II_COMMAND 0x2
+#define II_CMD_START 1
+#define II_CMD_RESTART 2
+#define II_CMD_SEND_ACK 3
+#define II_CMD_GET_ACK 6
+#define II_CMD_GET_NOACK 7
+#define II_CMD_STOP 10
+#define II_COMMAND_GO BIT(7)
+#define II_COMMAND_COMPLETION_STATUS(r) (((r) >> 5) & 3)
+#define II_CMD_STATUS_NORMAL 0
+#define II_CMD_STATUS_ACK_GOOD 1
+#define II_CMD_STATUS_ACK_BAD 2
+#define II_CMD_STATUS_ABORT 3
+
+#define II_DATA 0x3
+#define II_INTFLAG_CLEAR 0x8
+#define II_INTENABLE 0xa
+
+struct dc_i2c {
+ struct i2c_adapter adap;
+ struct device *dev;
+ void __iomem *regs;
+ struct clk *clk;
+ unsigned int frequency;
+
+ struct i2c_msg *msg;
+ unsigned int msgbuf_ptr;
+ int last;
+ spinlock_t lock;
+ struct completion done;
+ int state;
+ int error;
+};
+
+enum {
+ STATE_IDLE,
+ STATE_START,
+ STATE_ADDR,
+ STATE_WRITE,
+ STATE_READ,
+ STATE_STOP,
+};
+
+static void dc_i2c_cmd(struct dc_i2c *i2c, u8 cmd)
+{
+ writeb_relaxed(cmd | II_COMMAND_GO, i2c->regs + II_COMMAND);
+}
+
+static u8 dc_i2c_addr_cmd(struct i2c_msg *msg)
+{
+ u8 addr = (msg->addr & 0x7f) << 1;
+
+ if (msg->flags & I2C_M_RD)
+ addr |= 1;
+
+ return addr;
+}
+
+static void dc_i2c_data(struct dc_i2c *i2c, u8 data)
+{
+ writeb_relaxed(data, i2c->regs + II_DATA);
+}
+
+static void dc_i2c_write_byte(struct dc_i2c *i2c, u8 byte)
+{
+ dc_i2c_data(i2c, byte);
+ dc_i2c_cmd(i2c, II_CMD_SEND_ACK);
+}
+
+static void dc_i2c_write_buf(struct dc_i2c *i2c)
+{
+ dc_i2c_write_byte(i2c, i2c->msg->buf[i2c->msgbuf_ptr++]);
+}
+
+static void dc_i2c_next_read(struct dc_i2c *i2c)
+{
+ bool last = (i2c->msgbuf_ptr + 1 == i2c->msg->len);
+
+ dc_i2c_cmd(i2c, last ? II_CMD_GET_NOACK : II_CMD_GET_ACK);
+}
+
+static void dc_i2c_stop(struct dc_i2c *i2c)
+{
+ i2c->state = STATE_STOP;
+ if (i2c->last)
+ dc_i2c_cmd(i2c, II_CMD_STOP);
+ else
+ complete(&i2c->done);
+}
+
+static u8 dc_i2c_read_byte(struct dc_i2c *i2c)
+{
+ return readb_relaxed(i2c->regs + II_DATA);
+}
+
+static void dc_i2c_read_buf(struct dc_i2c *i2c)
+{
+ i2c->msg->buf[i2c->msgbuf_ptr++] = dc_i2c_read_byte(i2c);
+ dc_i2c_next_read(i2c);
+}
+
+static void dc_i2c_set_irq(struct dc_i2c *i2c, int enable)
+{
+ if (enable)
+ writeb_relaxed(1, i2c->regs + II_INTFLAG_CLEAR);
+ writeb_relaxed(!!enable, i2c->regs + II_INTENABLE);
+}
+
+static int dc_i2c_cmd_status(struct dc_i2c *i2c)
+{
+ u8 cmd = readb_relaxed(i2c->regs + II_COMMAND);
+
+ return II_COMMAND_COMPLETION_STATUS(cmd);
+}
+
+static void dc_i2c_start_msg(struct dc_i2c *i2c, int first)
+{
+ struct i2c_msg *msg = i2c->msg;
+
+ if (!(msg->flags & I2C_M_NOSTART)) {
+ i2c->state = STATE_START;
+ dc_i2c_cmd(i2c, first ? II_CMD_START : II_CMD_RESTART);
+ } else if (msg->flags & I2C_M_RD) {
+ i2c->state = STATE_READ;
+ dc_i2c_next_read(i2c);
+ } else {
+ i2c->state = STATE_WRITE;
+ dc_i2c_write_buf(i2c);
+ }
+}
+
+static irqreturn_t dc_i2c_irq(int irq, void *dev_id)
+{
+ struct dc_i2c *i2c = dev_id;
+ int cmd_status = dc_i2c_cmd_status(i2c);
+ unsigned long flags;
+ u8 addr_cmd;
+
+ writeb_relaxed(1, i2c->regs + II_INTFLAG_CLEAR);
+
+ spin_lock_irqsave(&i2c->lock, flags);
+
+ if (cmd_status == II_CMD_STATUS_ACK_BAD
+ || cmd_status == II_CMD_STATUS_ABORT) {
+ i2c->error = -EIO;
+ complete(&i2c->done);
+ goto out;
+ }
+
+ switch (i2c->state) {
+ case STATE_START:
+ addr_cmd = dc_i2c_addr_cmd(i2c->msg);
+ dc_i2c_write_byte(i2c, addr_cmd);
+ i2c->state = STATE_ADDR;
+ break;
+ case STATE_ADDR:
+ if (i2c->msg->flags & I2C_M_RD) {
+ dc_i2c_next_read(i2c);
+ i2c->state = STATE_READ;
+ break;
+ }
+ i2c->state = STATE_WRITE;
+ /* fall through */
+ case STATE_WRITE:
+ if (i2c->msgbuf_ptr < i2c->msg->len)
+ dc_i2c_write_buf(i2c);
+ else
+ dc_i2c_stop(i2c);
+ break;
+ case STATE_READ:
+ if (i2c->msgbuf_ptr < i2c->msg->len)
+ dc_i2c_read_buf(i2c);
+ else
+ dc_i2c_stop(i2c);
+ break;
+ case STATE_STOP:
+ i2c->state = STATE_IDLE;
+ complete(&i2c->done);
+ break;
+ }
+
+out:
+ spin_unlock_irqrestore(&i2c->lock, flags);
+ return IRQ_HANDLED;
+}
+
+static int dc_i2c_xfer_msg(struct dc_i2c *i2c, struct i2c_msg *msg, int first,
+ int last)
+{
+ unsigned long timeout = msecs_to_jiffies(TIMEOUT_MS);
+ unsigned long flags;
+
+ spin_lock_irqsave(&i2c->lock, flags);
+ i2c->msg = msg;
+ i2c->msgbuf_ptr = 0;
+ i2c->last = last;
+ i2c->error = 0;
+
+ reinit_completion(&i2c->done);
+ dc_i2c_set_irq(i2c, 1);
+ dc_i2c_start_msg(i2c, first);
+ spin_unlock_irqrestore(&i2c->lock, flags);
+
+ timeout = wait_for_completion_timeout(&i2c->done, timeout);
+ dc_i2c_set_irq(i2c, 0);
+ if (timeout == 0) {
+ i2c->state = STATE_IDLE;
+ return -ETIMEDOUT;
+ }
+
+ if (i2c->error)
+ return i2c->error;
+
+ return 0;
+}
+
+static int dc_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
+{
+ struct dc_i2c *i2c = adap->algo_data;
+ int i, ret;
+
+ for (i = 0; i < num; i++) {
+ ret = dc_i2c_xfer_msg(i2c, &msgs[i], i == 0, i == num - 1);
+ if (ret)
+ return ret;
+ }
+
+ return num;
+}
+
+static int dc_i2c_init_hw(struct dc_i2c *i2c)
+{
+ unsigned long clk_rate = clk_get_rate(i2c->clk);
+ unsigned int clocktime;
+
+ writeb_relaxed(II_CONTROL_LOCAL_RESET, i2c->regs + II_CONTROL);
+ udelay(100);
+ writeb_relaxed(0, i2c->regs + II_CONTROL);
+ udelay(100);
+
+ clocktime = DIV_ROUND_UP(clk_rate, 64 * i2c->frequency);
+ if (clocktime < 1 || clocktime > 0xff) {
+ dev_err(i2c->dev, "can't set bus speed of %u Hz\n",
+ i2c->frequency);
+ return -EINVAL;
+ }
+ writeb_relaxed(clocktime - 1, i2c->regs + II_CLOCKTIME);
+
+ return 0;
+}
+
+static u32 dc_i2c_func(struct i2c_adapter *adap)
+{
+ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_NOSTART;
+}
+
+static const struct i2c_algorithm dc_i2c_algorithm = {
+ .master_xfer = dc_i2c_xfer,
+ .functionality = dc_i2c_func,
+};
+
+static int dc_i2c_probe(struct platform_device *pdev)
+{
+ struct device_node *np = pdev->dev.of_node;
+ struct dc_i2c *i2c;
+ struct resource *r;
+ int ret = 0, irq;
+
+ i2c = devm_kzalloc(&pdev->dev, sizeof(struct dc_i2c), GFP_KERNEL);
+ if (!i2c)
+ return -ENOMEM;
+
+ if (of_property_read_u32(pdev->dev.of_node, "clock-frequency",
+ &i2c->frequency))
+ i2c->frequency = DEFAULT_FREQ;
+
+ i2c->dev = &pdev->dev;
+ platform_set_drvdata(pdev, i2c);
+
+ spin_lock_init(&i2c->lock);
+ init_completion(&i2c->done);
+
+ i2c->clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(i2c->clk))
+ return PTR_ERR(i2c->clk);
+
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ i2c->regs = devm_ioremap_resource(&pdev->dev, r);
+ if (IS_ERR(i2c->regs))
+ return PTR_ERR(i2c->regs);
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+
+ ret = devm_request_irq(&pdev->dev, irq, dc_i2c_irq, 0,
+ dev_name(&pdev->dev), i2c);
+ if (ret < 0)
+ return ret;
+
+ strlcpy(i2c->adap.name, "Conexant Digicolor I2C adapter",
+ sizeof(i2c->adap.name));
+ i2c->adap.owner = THIS_MODULE;
+ i2c->adap.algo = &dc_i2c_algorithm;
+ i2c->adap.dev.parent = &pdev->dev;
+ i2c->adap.dev.of_node = np;
+ i2c->adap.algo_data = i2c;
+
+ ret = dc_i2c_init_hw(i2c);
+ if (ret)
+ return ret;
+
+ ret = clk_prepare_enable(i2c->clk);
+ if (ret < 0)
+ return ret;
+
+ ret = i2c_add_adapter(&i2c->adap);
+ if (ret < 0) {
+ clk_unprepare(i2c->clk);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int dc_i2c_remove(struct platform_device *pdev)
+{
+ struct dc_i2c *i2c = platform_get_drvdata(pdev);
+
+ i2c_del_adapter(&i2c->adap);
+ clk_disable_unprepare(i2c->clk);
+
+ return 0;
+}
+
+static const struct of_device_id dc_i2c_match[] = {
+ { .compatible = "cnxt,cx92755-i2c" },
+ { },
+};
+
+static struct platform_driver dc_i2c_driver = {
+ .probe = dc_i2c_probe,
+ .remove = dc_i2c_remove,
+ .driver = {
+ .name = "digicolor-i2c",
+ .of_match_table = dc_i2c_match,
+ },
+};
+module_platform_driver(dc_i2c_driver);
+
+MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
+MODULE_DESCRIPTION("Conexant Digicolor I2C master driver");
+MODULE_LICENSE("GPL v2");
{
struct dln2_i2c *dln2 = i2c_get_adapdata(adapter);
struct i2c_msg *pmsg;
- struct device *dev = &dln2->adapter.dev;
int i;
for (i = 0; i < num; i++) {
pmsg = &msgs[i];
- if (pmsg->len > DLN2_I2C_MAX_XFER_SIZE) {
- dev_warn(dev, "maximum transfer size exceeded\n");
- return -EOPNOTSUPP;
- }
-
if (pmsg->flags & I2C_M_RD) {
ret = dln2_i2c_read(dln2, pmsg->addr, pmsg->buf,
pmsg->len);
.functionality = dln2_i2c_func,
};
+static struct i2c_adapter_quirks dln2_i2c_quirks = {
+ .max_read_len = DLN2_I2C_MAX_XFER_SIZE,
+ .max_write_len = DLN2_I2C_MAX_XFER_SIZE,
+};
+
static int dln2_i2c_probe(struct platform_device *pdev)
{
int ret;
dln2->adapter.owner = THIS_MODULE;
dln2->adapter.class = I2C_CLASS_HWMON;
dln2->adapter.algo = &dln2_i2c_usb_algorithm;
+ dln2->adapter.quirks = &dln2_i2c_quirks;
dln2->adapter.dev.parent = dev;
+ dln2->adapter.dev.of_node = dev->of_node;
i2c_set_adapdata(&dln2->adapter, dln2);
snprintf(dln2->adapter.name, sizeof(dln2->adapter.name), "%s-%s-%d",
"dln2-i2c", dev_name(pdev->dev.parent), dln2->port);
#endif
};
-static struct pci_driver i801_driver;
-
#define FEATURE_SMBUS_PEC (1 << 0)
#define FEATURE_BLOCK_BUFFER (1 << 1)
#define FEATURE_BLOCK_PROC (1 << 2)
int err, i;
struct i801_priv *priv;
- priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+ priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
}
priv->features &= ~disable_features;
- err = pci_enable_device(dev);
+ err = pcim_enable_device(dev);
if (err) {
dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n",
err);
- goto exit;
+ return err;
}
+ pcim_pin_device(dev);
/* Determine the address of the SMBus area */
priv->smba = pci_resource_start(dev, SMBBAR);
if (!priv->smba) {
- dev_err(&dev->dev, "SMBus base address uninitialized, "
- "upgrade BIOS\n");
- err = -ENODEV;
- goto exit;
+ dev_err(&dev->dev,
+ "SMBus base address uninitialized, upgrade BIOS\n");
+ return -ENODEV;
}
err = acpi_check_resource_conflict(&dev->resource[SMBBAR]);
if (err) {
- err = -ENODEV;
- goto exit;
+ return -ENODEV;
}
- err = pci_request_region(dev, SMBBAR, i801_driver.name);
+ err = pcim_iomap_regions(dev, 1 << SMBBAR,
+ dev_driver_string(&dev->dev));
if (err) {
- dev_err(&dev->dev, "Failed to request SMBus region "
- "0x%lx-0x%Lx\n", priv->smba,
+ dev_err(&dev->dev,
+ "Failed to request SMBus region 0x%lx-0x%Lx\n",
+ priv->smba,
(unsigned long long)pci_resource_end(dev, SMBBAR));
- goto exit;
+ return err;
}
pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &temp);
if (priv->features & FEATURE_IRQ) {
init_waitqueue_head(&priv->waitq);
- err = request_irq(dev->irq, i801_isr, IRQF_SHARED,
- i801_driver.name, priv);
+ err = devm_request_irq(&dev->dev, dev->irq, i801_isr,
+ IRQF_SHARED,
+ dev_driver_string(&dev->dev), priv);
if (err) {
dev_err(&dev->dev, "Failed to allocate irq %d: %d\n",
dev->irq, err);
err = i2c_add_adapter(&priv->adapter);
if (err) {
dev_err(&dev->dev, "Failed to add SMBus adapter\n");
- goto exit_free_irq;
+ return err;
}
i801_probe_optional_slaves(priv);
pci_set_drvdata(dev, priv);
return 0;
-
-exit_free_irq:
- if (priv->features & FEATURE_IRQ)
- free_irq(dev->irq, priv);
- pci_release_region(dev, SMBBAR);
-exit:
- kfree(priv);
- return err;
}
static void i801_remove(struct pci_dev *dev)
i2c_del_adapter(&priv->adapter);
pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
- if (priv->features & FEATURE_IRQ)
- free_irq(dev->irq, priv);
- pci_release_region(dev, SMBBAR);
-
- kfree(priv);
/*
* do not call pci_disable_device(dev) since it can cause hard hangs on
* some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010)
{
pci_set_power_state(dev, PCI_D0);
pci_restore_state(dev);
- return pci_enable_device(dev);
+ return 0;
}
#else
#define i801_suspend NULL
static int img_i2c_reset_bus(struct img_i2c *i2c)
{
unsigned long flags;
- int ret;
+ unsigned long time_left;
spin_lock_irqsave(&i2c->lock, flags);
reinit_completion(&i2c->msg_complete);
img_i2c_reset_start(i2c);
spin_unlock_irqrestore(&i2c->lock, flags);
- ret = wait_for_completion_timeout(&i2c->msg_complete, IMG_I2C_TIMEOUT);
- if (ret == 0)
+ time_left = wait_for_completion_timeout(&i2c->msg_complete,
+ IMG_I2C_TIMEOUT);
+ if (time_left == 0)
return -ETIMEDOUT;
return 0;
}
struct img_i2c *i2c = i2c_get_adapdata(adap);
bool atomic = false;
int i, ret;
+ unsigned long time_left;
if (i2c->mode == MODE_SUSPEND) {
WARN(1, "refusing to service transaction in suspended state\n");
img_i2c_write(i2c);
spin_unlock_irqrestore(&i2c->lock, flags);
- ret = wait_for_completion_timeout(&i2c->msg_complete,
- IMG_I2C_TIMEOUT);
+ time_left = wait_for_completion_timeout(&i2c->msg_complete,
+ IMG_I2C_TIMEOUT);
del_timer_sync(&i2c->check_timer);
- if (ret == 0) {
+ if (time_left == 0) {
dev_err(adap->dev.parent, "i2c transfer timed out\n");
i2c->msg_status = -ETIMEDOUT;
break;
struct i2c_msg *msgs)
{
int result;
+ unsigned long time_left;
unsigned int temp = 0;
unsigned long orig_jiffies = jiffies;
struct imx_i2c_dma *dma = i2c_imx->dma;
*/
imx_i2c_write_reg(msgs->addr << 1, i2c_imx, IMX_I2C_I2DR);
reinit_completion(&i2c_imx->dma->cmd_complete);
- result = wait_for_completion_timeout(
+ time_left = wait_for_completion_timeout(
&i2c_imx->dma->cmd_complete,
msecs_to_jiffies(DMA_TIMEOUT));
- if (result == 0) {
+ if (time_left == 0) {
dmaengine_terminate_all(dma->chan_using);
return -ETIMEDOUT;
}
struct i2c_msg *msgs, bool is_lastmsg)
{
int result;
+ unsigned long time_left;
unsigned int temp;
unsigned long orig_jiffies = jiffies;
struct imx_i2c_dma *dma = i2c_imx->dma;
return result;
reinit_completion(&i2c_imx->dma->cmd_complete);
- result = wait_for_completion_timeout(
+ time_left = wait_for_completion_timeout(
&i2c_imx->dma->cmd_complete,
msecs_to_jiffies(DMA_TIMEOUT));
- if (result == 0) {
+ if (time_left == 0) {
dmaengine_terminate_all(dma->chan_using);
return -ETIMEDOUT;
}
int size, union i2c_smbus_data *data)
{
int ret;
+ unsigned long time_left;
dma_addr_t dma_addr = 0; /* address of the data buffer */
u8 dma_size = 0;
enum dma_data_direction dma_direction = 0;
ismt_submit_desc(priv);
/* Now we wait for interrupt completion, 1s */
- ret = wait_for_completion_timeout(&priv->cmp, HZ*1);
+ time_left = wait_for_completion_timeout(&priv->cmp, HZ*1);
/* unmap the data buffer */
if (dma_size != 0)
dma_unmap_single(&adap->dev, dma_addr, dma_size, dma_direction);
- if (unlikely(!ret)) {
+ if (unlikely(!time_left)) {
dev_err(dev, "completion wait timed out\n");
ret = -ETIMEDOUT;
goto out;
--- /dev/null
+/*
+ * Ingenic JZ4780 I2C bus driver
+ *
+ * Copyright (C) 2006 - 2009 Ingenic Semiconductor Inc.
+ * Copyright (C) 2015 Imagination Technologies
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/bitops.h>
+#include <linux/clk.h>
+#include <linux/completion.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/time.h>
+
+#define JZ4780_I2C_CTRL 0x00
+#define JZ4780_I2C_TAR 0x04
+#define JZ4780_I2C_SAR 0x08
+#define JZ4780_I2C_DC 0x10
+#define JZ4780_I2C_SHCNT 0x14
+#define JZ4780_I2C_SLCNT 0x18
+#define JZ4780_I2C_FHCNT 0x1C
+#define JZ4780_I2C_FLCNT 0x20
+#define JZ4780_I2C_INTST 0x2C
+#define JZ4780_I2C_INTM 0x30
+#define JZ4780_I2C_RXTL 0x38
+#define JZ4780_I2C_TXTL 0x3C
+#define JZ4780_I2C_CINTR 0x40
+#define JZ4780_I2C_CRXUF 0x44
+#define JZ4780_I2C_CRXOF 0x48
+#define JZ4780_I2C_CTXOF 0x4C
+#define JZ4780_I2C_CRXREQ 0x50
+#define JZ4780_I2C_CTXABRT 0x54
+#define JZ4780_I2C_CRXDONE 0x58
+#define JZ4780_I2C_CACT 0x5C
+#define JZ4780_I2C_CSTP 0x60
+#define JZ4780_I2C_CSTT 0x64
+#define JZ4780_I2C_CGC 0x68
+#define JZ4780_I2C_ENB 0x6C
+#define JZ4780_I2C_STA 0x70
+#define JZ4780_I2C_TXABRT 0x80
+#define JZ4780_I2C_DMACR 0x88
+#define JZ4780_I2C_DMATDLR 0x8C
+#define JZ4780_I2C_DMARDLR 0x90
+#define JZ4780_I2C_SDASU 0x94
+#define JZ4780_I2C_ACKGC 0x98
+#define JZ4780_I2C_ENSTA 0x9C
+#define JZ4780_I2C_SDAHD 0xD0
+
+#define JZ4780_I2C_CTRL_STPHLD BIT(7)
+#define JZ4780_I2C_CTRL_SLVDIS BIT(6)
+#define JZ4780_I2C_CTRL_REST BIT(5)
+#define JZ4780_I2C_CTRL_MATP BIT(4)
+#define JZ4780_I2C_CTRL_SATP BIT(3)
+#define JZ4780_I2C_CTRL_SPDF BIT(2)
+#define JZ4780_I2C_CTRL_SPDS BIT(1)
+#define JZ4780_I2C_CTRL_MD BIT(0)
+
+#define JZ4780_I2C_STA_SLVACT BIT(6)
+#define JZ4780_I2C_STA_MSTACT BIT(5)
+#define JZ4780_I2C_STA_RFF BIT(4)
+#define JZ4780_I2C_STA_RFNE BIT(3)
+#define JZ4780_I2C_STA_TFE BIT(2)
+#define JZ4780_I2C_STA_TFNF BIT(1)
+#define JZ4780_I2C_STA_ACT BIT(0)
+
+static const char * const jz4780_i2c_abrt_src[] = {
+ "ABRT_7B_ADDR_NOACK",
+ "ABRT_10ADDR1_NOACK",
+ "ABRT_10ADDR2_NOACK",
+ "ABRT_XDATA_NOACK",
+ "ABRT_GCALL_NOACK",
+ "ABRT_GCALL_READ",
+ "ABRT_HS_ACKD",
+ "SBYTE_ACKDET",
+ "ABRT_HS_NORSTRT",
+ "SBYTE_NORSTRT",
+ "ABRT_10B_RD_NORSTRT",
+ "ABRT_MASTER_DIS",
+ "ARB_LOST",
+ "SLVFLUSH_TXFIFO",
+ "SLV_ARBLOST",
+ "SLVRD_INTX",
+};
+
+#define JZ4780_I2C_INTST_IGC BIT(11)
+#define JZ4780_I2C_INTST_ISTT BIT(10)
+#define JZ4780_I2C_INTST_ISTP BIT(9)
+#define JZ4780_I2C_INTST_IACT BIT(8)
+#define JZ4780_I2C_INTST_RXDN BIT(7)
+#define JZ4780_I2C_INTST_TXABT BIT(6)
+#define JZ4780_I2C_INTST_RDREQ BIT(5)
+#define JZ4780_I2C_INTST_TXEMP BIT(4)
+#define JZ4780_I2C_INTST_TXOF BIT(3)
+#define JZ4780_I2C_INTST_RXFL BIT(2)
+#define JZ4780_I2C_INTST_RXOF BIT(1)
+#define JZ4780_I2C_INTST_RXUF BIT(0)
+
+#define JZ4780_I2C_INTM_MIGC BIT(11)
+#define JZ4780_I2C_INTM_MISTT BIT(10)
+#define JZ4780_I2C_INTM_MISTP BIT(9)
+#define JZ4780_I2C_INTM_MIACT BIT(8)
+#define JZ4780_I2C_INTM_MRXDN BIT(7)
+#define JZ4780_I2C_INTM_MTXABT BIT(6)
+#define JZ4780_I2C_INTM_MRDREQ BIT(5)
+#define JZ4780_I2C_INTM_MTXEMP BIT(4)
+#define JZ4780_I2C_INTM_MTXOF BIT(3)
+#define JZ4780_I2C_INTM_MRXFL BIT(2)
+#define JZ4780_I2C_INTM_MRXOF BIT(1)
+#define JZ4780_I2C_INTM_MRXUF BIT(0)
+
+#define JZ4780_I2C_DC_READ BIT(8)
+
+#define JZ4780_I2C_SDAHD_HDENB BIT(8)
+
+#define JZ4780_I2C_ENB_I2C BIT(0)
+
+#define JZ4780_I2CSHCNT_ADJUST(n) (((n) - 8) < 6 ? 6 : ((n) - 8))
+#define JZ4780_I2CSLCNT_ADJUST(n) (((n) - 1) < 8 ? 8 : ((n) - 1))
+#define JZ4780_I2CFHCNT_ADJUST(n) (((n) - 8) < 6 ? 6 : ((n) - 8))
+#define JZ4780_I2CFLCNT_ADJUST(n) (((n) - 1) < 8 ? 8 : ((n) - 1))
+
+#define JZ4780_I2C_FIFO_LEN 16
+#define TX_LEVEL 3
+#define RX_LEVEL (JZ4780_I2C_FIFO_LEN - TX_LEVEL - 1)
+
+#define JZ4780_I2C_TIMEOUT 300
+
+#define BUFSIZE 200
+
+struct jz4780_i2c {
+ void __iomem *iomem;
+ int irq;
+ struct clk *clk;
+ struct i2c_adapter adap;
+
+ /* lock to protect rbuf and wbuf between xfer_rd/wr and irq handler */
+ spinlock_t lock;
+
+ /* beginning of lock scope */
+ unsigned char *rbuf;
+ int rd_total_len;
+ int rd_data_xfered;
+ int rd_cmd_xfered;
+
+ unsigned char *wbuf;
+ int wt_len;
+
+ int is_write;
+ int stop_hold;
+ int speed;
+
+ int data_buf[BUFSIZE];
+ int cmd_buf[BUFSIZE];
+ int cmd;
+
+ /* end of lock scope */
+ struct completion trans_waitq;
+};
+
+static inline unsigned short jz4780_i2c_readw(struct jz4780_i2c *i2c,
+ unsigned long offset)
+{
+ return readw(i2c->iomem + offset);
+}
+
+static inline void jz4780_i2c_writew(struct jz4780_i2c *i2c,
+ unsigned long offset, unsigned short val)
+{
+ writew(val, i2c->iomem + offset);
+}
+
+static int jz4780_i2c_disable(struct jz4780_i2c *i2c)
+{
+ unsigned short regval;
+ unsigned long loops = 5;
+
+ jz4780_i2c_writew(i2c, JZ4780_I2C_ENB, 0);
+
+ do {
+ regval = jz4780_i2c_readw(i2c, JZ4780_I2C_ENSTA);
+ if (!(regval & JZ4780_I2C_ENB_I2C))
+ return 0;
+
+ usleep_range(5000, 15000);
+ } while (--loops);
+
+ dev_err(&i2c->adap.dev, "disable failed: ENSTA=0x%04x\n", regval);
+ return -ETIMEDOUT;
+}
+
+static int jz4780_i2c_enable(struct jz4780_i2c *i2c)
+{
+ unsigned short regval;
+ unsigned long loops = 5;
+
+ jz4780_i2c_writew(i2c, JZ4780_I2C_ENB, 1);
+
+ do {
+ regval = jz4780_i2c_readw(i2c, JZ4780_I2C_ENSTA);
+ if (regval & JZ4780_I2C_ENB_I2C)
+ return 0;
+
+ usleep_range(5000, 15000);
+ } while (--loops);
+
+ dev_err(&i2c->adap.dev, "enable failed: ENSTA=0x%04x\n", regval);
+ return -ETIMEDOUT;
+}
+
+static int jz4780_i2c_set_target(struct jz4780_i2c *i2c, unsigned char address)
+{
+ unsigned short regval;
+ unsigned long loops = 5;
+
+ do {
+ regval = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
+ if ((regval & JZ4780_I2C_STA_TFE) &&
+ !(regval & JZ4780_I2C_STA_MSTACT))
+ break;
+
+ usleep_range(5000, 15000);
+ } while (--loops);
+
+ if (loops) {
+ jz4780_i2c_writew(i2c, JZ4780_I2C_TAR, address);
+ return 0;
+ }
+
+ dev_err(&i2c->adap.dev,
+ "set device to address 0x%02x failed, STA=0x%04x\n",
+ address, regval);
+
+ return -ENXIO;
+}
+
+static int jz4780_i2c_set_speed(struct jz4780_i2c *i2c)
+{
+ int dev_clk_khz = clk_get_rate(i2c->clk) / 1000;
+ int cnt_high = 0; /* HIGH period count of the SCL clock */
+ int cnt_low = 0; /* LOW period count of the SCL clock */
+ int cnt_period = 0; /* period count of the SCL clock */
+ int setup_time = 0;
+ int hold_time = 0;
+ unsigned short tmp = 0;
+ int i2c_clk = i2c->speed;
+
+ if (jz4780_i2c_disable(i2c))
+ dev_dbg(&i2c->adap.dev, "i2c not disabled\n");
+
+ /*
+ * 1 JZ4780_I2C cycle equals to cnt_period PCLK(i2c_clk)
+ * standard mode, min LOW and HIGH period are 4700 ns and 4000 ns
+ * fast mode, min LOW and HIGH period are 1300 ns and 600 ns
+ */
+ cnt_period = dev_clk_khz / i2c_clk;
+
+ if (i2c_clk <= 100)
+ cnt_high = (cnt_period * 4000) / (4700 + 4000);
+ else
+ cnt_high = (cnt_period * 600) / (1300 + 600);
+
+ cnt_low = cnt_period - cnt_high;
+
+ /*
+ * NOTE: JZ4780_I2C_CTRL_REST can't set when i2c enabled, because
+ * normal read are 2 messages, we cannot disable i2c controller
+ * between these two messages, this means that we must always set
+ * JZ4780_I2C_CTRL_REST when init JZ4780_I2C_CTRL
+ *
+ */
+ if (i2c_clk <= 100) {
+ tmp = JZ4780_I2C_CTRL_SPDS | JZ4780_I2C_CTRL_REST
+ | JZ4780_I2C_CTRL_SLVDIS | JZ4780_I2C_CTRL_MD;
+ jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
+
+ jz4780_i2c_writew(i2c, JZ4780_I2C_SHCNT,
+ JZ4780_I2CSHCNT_ADJUST(cnt_high));
+ jz4780_i2c_writew(i2c, JZ4780_I2C_SLCNT,
+ JZ4780_I2CSLCNT_ADJUST(cnt_low));
+ } else {
+ tmp = JZ4780_I2C_CTRL_SPDF | JZ4780_I2C_CTRL_REST
+ | JZ4780_I2C_CTRL_SLVDIS | JZ4780_I2C_CTRL_MD;
+ jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
+
+ jz4780_i2c_writew(i2c, JZ4780_I2C_FHCNT,
+ JZ4780_I2CFHCNT_ADJUST(cnt_high));
+ jz4780_i2c_writew(i2c, JZ4780_I2C_FLCNT,
+ JZ4780_I2CFLCNT_ADJUST(cnt_low));
+ }
+
+ /*
+ * a i2c device must internally provide a hold time at least 300ns
+ * tHD:DAT
+ * Standard Mode: min=300ns, max=3450ns
+ * Fast Mode: min=0ns, max=900ns
+ * tSU:DAT
+ * Standard Mode: min=250ns, max=infinite
+ * Fast Mode: min=100(250ns is recommended), max=infinite
+ *
+ * 1i2c_clk = 10^6 / dev_clk_khz
+ * on FPGA, dev_clk_khz = 12000, so 1i2c_clk = 1000/12 = 83ns
+ * on Pisces(1008M), dev_clk_khz=126000, so 1i2c_clk = 1000 / 126 = 8ns
+ *
+ * The actual hold time is (SDAHD + 1) * (i2c_clk period).
+ *
+ * Length of setup time calculated using (SDASU - 1) * (ic_clk_period)
+ *
+ */
+ if (i2c_clk <= 100) { /* standard mode */
+ setup_time = 300;
+ hold_time = 400;
+ } else {
+ setup_time = 450;
+ hold_time = 450;
+ }
+
+ hold_time = ((hold_time * dev_clk_khz) / 1000000) - 1;
+ setup_time = ((setup_time * dev_clk_khz) / 1000000) + 1;
+
+ if (setup_time > 255)
+ setup_time = 255;
+
+ if (setup_time <= 0)
+ setup_time = 1;
+
+ jz4780_i2c_writew(i2c, JZ4780_I2C_SDASU, setup_time);
+
+ if (hold_time > 255)
+ hold_time = 255;
+
+ if (hold_time >= 0) {
+ /*i2c hold time enable */
+ hold_time |= JZ4780_I2C_SDAHD_HDENB;
+ jz4780_i2c_writew(i2c, JZ4780_I2C_SDAHD, hold_time);
+ } else {
+ /* disable hold time */
+ jz4780_i2c_writew(i2c, JZ4780_I2C_SDAHD, 0);
+ }
+
+ return 0;
+}
+
+static int jz4780_i2c_cleanup(struct jz4780_i2c *i2c)
+{
+ int ret;
+ unsigned long flags;
+ unsigned short tmp;
+
+ spin_lock_irqsave(&i2c->lock, flags);
+
+ /* can send stop now if need */
+ tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
+ tmp &= ~JZ4780_I2C_CTRL_STPHLD;
+ jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
+
+ /* disable all interrupts first */
+ jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0);
+
+ /* then clear all interrupts */
+ jz4780_i2c_readw(i2c, JZ4780_I2C_CTXABRT);
+ jz4780_i2c_readw(i2c, JZ4780_I2C_CINTR);
+
+ /* then disable the controller */
+ tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
+ tmp &= ~JZ4780_I2C_ENB_I2C;
+ jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
+ udelay(10);
+ tmp |= JZ4780_I2C_ENB_I2C;
+ jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
+
+ spin_unlock_irqrestore(&i2c->lock, flags);
+
+ ret = jz4780_i2c_disable(i2c);
+ if (ret)
+ dev_err(&i2c->adap.dev,
+ "unable to disable device during cleanup!\n");
+
+ if (unlikely(jz4780_i2c_readw(i2c, JZ4780_I2C_INTM)
+ & jz4780_i2c_readw(i2c, JZ4780_I2C_INTST)))
+ dev_err(&i2c->adap.dev,
+ "device has interrupts after a complete cleanup!\n");
+
+ return ret;
+}
+
+static int jz4780_i2c_prepare(struct jz4780_i2c *i2c)
+{
+ jz4780_i2c_set_speed(i2c);
+ return jz4780_i2c_enable(i2c);
+}
+
+static void jz4780_i2c_send_rcmd(struct jz4780_i2c *i2c, int cmd_count)
+{
+ int i;
+
+ for (i = 0; i < cmd_count; i++)
+ jz4780_i2c_writew(i2c, JZ4780_I2C_DC, JZ4780_I2C_DC_READ);
+}
+
+static void jz4780_i2c_trans_done(struct jz4780_i2c *i2c)
+{
+ jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0);
+ complete(&i2c->trans_waitq);
+}
+
+static irqreturn_t jz4780_i2c_irq(int irqno, void *dev_id)
+{
+ unsigned short tmp;
+ unsigned short intst;
+ unsigned short intmsk;
+ struct jz4780_i2c *i2c = dev_id;
+ unsigned long flags;
+
+ spin_lock_irqsave(&i2c->lock, flags);
+ intmsk = jz4780_i2c_readw(i2c, JZ4780_I2C_INTM);
+ intst = jz4780_i2c_readw(i2c, JZ4780_I2C_INTST);
+
+ intst &= intmsk;
+
+ if (intst & JZ4780_I2C_INTST_TXABT) {
+ jz4780_i2c_trans_done(i2c);
+ goto done;
+ }
+
+ if (intst & JZ4780_I2C_INTST_RXOF) {
+ dev_dbg(&i2c->adap.dev, "received fifo overflow!\n");
+ jz4780_i2c_trans_done(i2c);
+ goto done;
+ }
+
+ /*
+ * When reading, always drain RX FIFO before we send more Read
+ * Commands to avoid fifo overrun
+ */
+ if (i2c->is_write == 0) {
+ int rd_left;
+
+ while ((jz4780_i2c_readw(i2c, JZ4780_I2C_STA)
+ & JZ4780_I2C_STA_RFNE)) {
+ *(i2c->rbuf++) = jz4780_i2c_readw(i2c, JZ4780_I2C_DC)
+ & 0xff;
+ i2c->rd_data_xfered++;
+ if (i2c->rd_data_xfered == i2c->rd_total_len) {
+ jz4780_i2c_trans_done(i2c);
+ goto done;
+ }
+ }
+
+ rd_left = i2c->rd_total_len - i2c->rd_data_xfered;
+
+ if (rd_left <= JZ4780_I2C_FIFO_LEN)
+ jz4780_i2c_writew(i2c, JZ4780_I2C_RXTL, rd_left - 1);
+ }
+
+ if (intst & JZ4780_I2C_INTST_TXEMP) {
+ if (i2c->is_write == 0) {
+ int cmd_left = i2c->rd_total_len - i2c->rd_cmd_xfered;
+ int max_send = (JZ4780_I2C_FIFO_LEN - 1)
+ - (i2c->rd_cmd_xfered
+ - i2c->rd_data_xfered);
+ int cmd_to_send = min(cmd_left, max_send);
+
+ if (i2c->rd_cmd_xfered != 0)
+ cmd_to_send = min(cmd_to_send,
+ JZ4780_I2C_FIFO_LEN
+ - TX_LEVEL - 1);
+
+ if (cmd_to_send) {
+ jz4780_i2c_send_rcmd(i2c, cmd_to_send);
+ i2c->rd_cmd_xfered += cmd_to_send;
+ }
+
+ cmd_left = i2c->rd_total_len - i2c->rd_cmd_xfered;
+ if (cmd_left == 0) {
+ intmsk = jz4780_i2c_readw(i2c, JZ4780_I2C_INTM);
+ intmsk &= ~JZ4780_I2C_INTM_MTXEMP;
+ jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, intmsk);
+
+ tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
+ tmp &= ~JZ4780_I2C_CTRL_STPHLD;
+ jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
+ }
+ } else {
+ unsigned short data;
+ unsigned short i2c_sta;
+
+ i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
+
+ while ((i2c_sta & JZ4780_I2C_STA_TFNF) &&
+ (i2c->wt_len > 0)) {
+ i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
+ data = *i2c->wbuf;
+ data &= ~JZ4780_I2C_DC_READ;
+ jz4780_i2c_writew(i2c, JZ4780_I2C_DC,
+ data);
+ i2c->wbuf++;
+ i2c->wt_len--;
+ }
+
+ if (i2c->wt_len == 0) {
+ if (!i2c->stop_hold) {
+ tmp = jz4780_i2c_readw(i2c,
+ JZ4780_I2C_CTRL);
+ tmp &= ~JZ4780_I2C_CTRL_STPHLD;
+ jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL,
+ tmp);
+ }
+
+ jz4780_i2c_trans_done(i2c);
+ goto done;
+ }
+ }
+ }
+
+done:
+ spin_unlock_irqrestore(&i2c->lock, flags);
+ return IRQ_HANDLED;
+}
+
+static void jz4780_i2c_txabrt(struct jz4780_i2c *i2c, int src)
+{
+ int i;
+
+ dev_err(&i2c->adap.dev, "txabrt: 0x%08x\n", src);
+ dev_err(&i2c->adap.dev, "device addr=%x\n",
+ jz4780_i2c_readw(i2c, JZ4780_I2C_TAR));
+ dev_err(&i2c->adap.dev, "send cmd count:%d %d\n",
+ i2c->cmd, i2c->cmd_buf[i2c->cmd]);
+ dev_err(&i2c->adap.dev, "receive data count:%d %d\n",
+ i2c->cmd, i2c->data_buf[i2c->cmd]);
+
+ for (i = 0; i < 16; i++) {
+ if (src & BIT(i))
+ dev_dbg(&i2c->adap.dev, "I2C TXABRT[%d]=%s\n",
+ i, jz4780_i2c_abrt_src[i]);
+ }
+}
+
+static inline int jz4780_i2c_xfer_read(struct jz4780_i2c *i2c,
+ unsigned char *buf, int len, int cnt,
+ int idx)
+{
+ int ret = 0;
+ long timeout;
+ int wait_time = JZ4780_I2C_TIMEOUT * (len + 5);
+ unsigned short tmp;
+ unsigned long flags;
+
+ memset(buf, 0, len);
+
+ spin_lock_irqsave(&i2c->lock, flags);
+
+ i2c->stop_hold = 0;
+ i2c->is_write = 0;
+ i2c->rbuf = buf;
+ i2c->rd_total_len = len;
+ i2c->rd_data_xfered = 0;
+ i2c->rd_cmd_xfered = 0;
+
+ if (len <= JZ4780_I2C_FIFO_LEN)
+ jz4780_i2c_writew(i2c, JZ4780_I2C_RXTL, len - 1);
+ else
+ jz4780_i2c_writew(i2c, JZ4780_I2C_RXTL, RX_LEVEL);
+
+ jz4780_i2c_writew(i2c, JZ4780_I2C_TXTL, TX_LEVEL);
+
+ jz4780_i2c_writew(i2c, JZ4780_I2C_INTM,
+ JZ4780_I2C_INTM_MRXFL | JZ4780_I2C_INTM_MTXEMP
+ | JZ4780_I2C_INTM_MTXABT | JZ4780_I2C_INTM_MRXOF);
+
+ tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
+ tmp |= JZ4780_I2C_CTRL_STPHLD;
+ jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
+
+ spin_unlock_irqrestore(&i2c->lock, flags);
+
+ timeout = wait_for_completion_timeout(&i2c->trans_waitq,
+ msecs_to_jiffies(wait_time));
+
+ if (!timeout) {
+ dev_err(&i2c->adap.dev, "irq read timeout\n");
+ dev_dbg(&i2c->adap.dev, "send cmd count:%d %d\n",
+ i2c->cmd, i2c->cmd_buf[i2c->cmd]);
+ dev_dbg(&i2c->adap.dev, "receive data count:%d %d\n",
+ i2c->cmd, i2c->data_buf[i2c->cmd]);
+ ret = -EIO;
+ }
+
+ tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_TXABRT);
+ if (tmp) {
+ jz4780_i2c_txabrt(i2c, tmp);
+ ret = -EIO;
+ }
+
+ return ret;
+}
+
+static inline int jz4780_i2c_xfer_write(struct jz4780_i2c *i2c,
+ unsigned char *buf, int len,
+ int cnt, int idx)
+{
+ int ret = 0;
+ int wait_time = JZ4780_I2C_TIMEOUT * (len + 5);
+ long timeout;
+ unsigned short tmp;
+ unsigned long flags;
+
+ spin_lock_irqsave(&i2c->lock, flags);
+
+ if (idx < (cnt - 1))
+ i2c->stop_hold = 1;
+ else
+ i2c->stop_hold = 0;
+
+ i2c->is_write = 1;
+ i2c->wbuf = buf;
+ i2c->wt_len = len;
+
+ jz4780_i2c_writew(i2c, JZ4780_I2C_TXTL, TX_LEVEL);
+
+ jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, JZ4780_I2C_INTM_MTXEMP
+ | JZ4780_I2C_INTM_MTXABT);
+
+ tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
+ tmp |= JZ4780_I2C_CTRL_STPHLD;
+ jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
+
+ spin_unlock_irqrestore(&i2c->lock, flags);
+
+ timeout = wait_for_completion_timeout(&i2c->trans_waitq,
+ msecs_to_jiffies(wait_time));
+ if (timeout && !i2c->stop_hold) {
+ unsigned short i2c_sta;
+ int write_in_process;
+
+ timeout = JZ4780_I2C_TIMEOUT * 100;
+ for (; timeout > 0; timeout--) {
+ i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
+
+ write_in_process = (i2c_sta & JZ4780_I2C_STA_MSTACT) ||
+ !(i2c_sta & JZ4780_I2C_STA_TFE);
+ if (!write_in_process)
+ break;
+ udelay(10);
+ }
+ }
+
+ if (!timeout) {
+ dev_err(&i2c->adap.dev, "write wait timeout\n");
+ ret = -EIO;
+ }
+
+ tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_TXABRT);
+ if (tmp) {
+ jz4780_i2c_txabrt(i2c, tmp);
+ ret = -EIO;
+ }
+
+ return ret;
+}
+
+static int jz4780_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msg,
+ int count)
+{
+ int i = -EIO;
+ int ret = 0;
+ struct jz4780_i2c *i2c = adap->algo_data;
+
+ ret = jz4780_i2c_prepare(i2c);
+ if (ret) {
+ dev_err(&i2c->adap.dev, "I2C prepare failed\n");
+ goto out;
+ }
+
+ if (msg->addr != jz4780_i2c_readw(i2c, JZ4780_I2C_TAR)) {
+ ret = jz4780_i2c_set_target(i2c, msg->addr);
+ if (ret)
+ goto out;
+ }
+ for (i = 0; i < count; i++, msg++) {
+ if (msg->flags & I2C_M_RD)
+ ret = jz4780_i2c_xfer_read(i2c, msg->buf, msg->len,
+ count, i);
+ else
+ ret = jz4780_i2c_xfer_write(i2c, msg->buf, msg->len,
+ count, i);
+
+ if (ret)
+ goto out;
+ }
+
+ ret = i;
+
+out:
+ jz4780_i2c_cleanup(i2c);
+ return ret;
+}
+
+static u32 jz4780_i2c_functionality(struct i2c_adapter *adap)
+{
+ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static const struct i2c_algorithm jz4780_i2c_algorithm = {
+ .master_xfer = jz4780_i2c_xfer,
+ .functionality = jz4780_i2c_functionality,
+};
+
+static const struct of_device_id jz4780_i2c_of_matches[] = {
+ { .compatible = "ingenic,jz4780-i2c", },
+ { /* sentinel */ }
+};
+
+static int jz4780_i2c_probe(struct platform_device *pdev)
+{
+ int ret = 0;
+ unsigned int clk_freq = 0;
+ unsigned short tmp;
+ struct resource *r;
+ struct jz4780_i2c *i2c;
+
+ i2c = devm_kzalloc(&pdev->dev, sizeof(struct jz4780_i2c), GFP_KERNEL);
+ if (!i2c)
+ return -ENOMEM;
+
+ i2c->adap.owner = THIS_MODULE;
+ i2c->adap.algo = &jz4780_i2c_algorithm;
+ i2c->adap.algo_data = i2c;
+ i2c->adap.retries = 5;
+ i2c->adap.dev.parent = &pdev->dev;
+ i2c->adap.dev.of_node = pdev->dev.of_node;
+ sprintf(i2c->adap.name, "%s", pdev->name);
+
+ init_completion(&i2c->trans_waitq);
+ spin_lock_init(&i2c->lock);
+
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ i2c->iomem = devm_ioremap_resource(&pdev->dev, r);
+ if (IS_ERR(i2c->iomem))
+ return PTR_ERR(i2c->iomem);
+
+ platform_set_drvdata(pdev, i2c);
+
+ i2c->clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(i2c->clk))
+ return PTR_ERR(i2c->clk);
+
+ clk_prepare_enable(i2c->clk);
+
+ if (of_property_read_u32(pdev->dev.of_node, "clock-frequency",
+ &clk_freq)) {
+ dev_err(&pdev->dev, "clock-frequency not specified in DT");
+ return clk_freq;
+ }
+
+ i2c->speed = clk_freq / 1000;
+ jz4780_i2c_set_speed(i2c);
+
+ dev_info(&pdev->dev, "Bus frequency is %d KHz\n", i2c->speed);
+
+ tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
+ tmp &= ~JZ4780_I2C_CTRL_STPHLD;
+ jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
+
+ jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0x0);
+
+ i2c->cmd = 0;
+ memset(i2c->cmd_buf, 0, BUFSIZE);
+ memset(i2c->data_buf, 0, BUFSIZE);
+
+ i2c->irq = platform_get_irq(pdev, 0);
+ ret = devm_request_irq(&pdev->dev, i2c->irq, jz4780_i2c_irq, 0,
+ dev_name(&pdev->dev), i2c);
+ if (ret) {
+ ret = -ENODEV;
+ goto err;
+ }
+
+ ret = i2c_add_adapter(&i2c->adap);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "Failed to add bus\n");
+ goto err;
+ }
+
+ return 0;
+
+err:
+ clk_disable_unprepare(i2c->clk);
+ return ret;
+}
+
+static int jz4780_i2c_remove(struct platform_device *pdev)
+{
+ struct jz4780_i2c *i2c = platform_get_drvdata(pdev);
+
+ clk_disable_unprepare(i2c->clk);
+ i2c_del_adapter(&i2c->adap);
+ return 0;
+}
+
+static struct platform_driver jz4780_i2c_driver = {
+ .probe = jz4780_i2c_probe,
+ .remove = jz4780_i2c_remove,
+ .driver = {
+ .name = "jz4780-i2c",
+ .of_match_table = of_match_ptr(jz4780_i2c_of_matches),
+ },
+};
+
+module_platform_driver(jz4780_i2c_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("ztyan<ztyan@ingenic.cn>");
+MODULE_DESCRIPTION("i2c driver for JZ4780 SoCs");
#include <linux/delay.h>
#include <asm/mpc52xx.h>
+#include <asm/mpc85xx.h>
#include <sysdev/fsl_soc.h>
#define DRV_NAME "mpc-i2c"
i2c->interrupt = readb(i2c->base + MPC_I2C_SR);
writeb(0, i2c->base + MPC_I2C_SR);
wake_up(&i2c->queue);
+ return IRQ_HANDLED;
}
- return IRQ_HANDLED;
+ return IRQ_NONE;
}
/* Sometimes 9th clock pulse isn't generated, and slave doesn't release
return val;
}
+static u32 mpc_i2c_get_prescaler_8xxx(void)
+{
+ /* mpc83xx and mpc82xx all have prescaler 1 */
+ u32 prescaler = 1;
+
+ /* mpc85xx */
+ if (pvr_version_is(PVR_VER_E500V1) || pvr_version_is(PVR_VER_E500V2)
+ || pvr_version_is(PVR_VER_E500MC)
+ || pvr_version_is(PVR_VER_E5500)
+ || pvr_version_is(PVR_VER_E6500)) {
+ unsigned int svr = mfspr(SPRN_SVR);
+
+ if ((SVR_SOC_VER(svr) == SVR_8540)
+ || (SVR_SOC_VER(svr) == SVR_8541)
+ || (SVR_SOC_VER(svr) == SVR_8560)
+ || (SVR_SOC_VER(svr) == SVR_8555)
+ || (SVR_SOC_VER(svr) == SVR_8610))
+ /* the above 85xx SoCs have prescaler 1 */
+ prescaler = 1;
+ else
+ /* all the other 85xx have prescaler 2 */
+ prescaler = 2;
+ }
+
+ return prescaler;
+}
+
static int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock,
u32 prescaler, u32 *real_clk)
{
if (of_device_is_compatible(node, "fsl,mpc8544-i2c"))
prescaler = mpc_i2c_get_sec_cfg_8xxx() ? 3 : 2;
if (!prescaler)
- prescaler = 1;
+ prescaler = mpc_i2c_get_prescaler_8xxx();
divider = fsl_get_sys_freq() / clock / prescaler;
int ret;
int flags;
int use_pio = 0;
+ unsigned long time_left;
flags = stop ? MXS_I2C_CTRL0_POST_SEND_STOP : 0;
if (ret)
return ret;
- ret = wait_for_completion_timeout(&i2c->cmd_complete,
+ time_left = wait_for_completion_timeout(&i2c->cmd_complete,
msecs_to_jiffies(1000));
- if (ret == 0)
+ if (!time_left)
goto timeout;
ret = i2c->cmd_err;
*/
static int read_i2c(struct nmk_i2c_dev *dev, u16 flags)
{
- u32 status = 0;
+ int status = 0;
u32 mcr, irq_mask;
- int timeout;
+ unsigned long timeout;
mcr = load_i2c_mcr_reg(dev, flags);
writel(mcr, dev->virtbase + I2C_MCR);
{
u32 status = 0;
u32 mcr, irq_mask;
- int timeout;
+ unsigned long timeout;
mcr = load_i2c_mcr_reg(dev, flags);
req.buffer_ra = cpu_to_be64(__pa(msgs[0].buf));
break;
case 2:
- /* For two messages, we basically support only simple
- * smbus transactions of a write plus a read. We might
- * want to allow also two writes but we'd have to bounce
- * the data into a single buffer.
- */
- if ((msgs[0].flags & I2C_M_RD) || !(msgs[1].flags & I2C_M_RD))
- return -EOPNOTSUPP;
- if (msgs[0].len > 4)
- return -EOPNOTSUPP;
- if (msgs[0].addr != msgs[1].addr)
- return -EOPNOTSUPP;
- req.type = OPAL_I2C_SM_READ;
+ req.type = (msgs[1].flags & I2C_M_RD) ?
+ OPAL_I2C_SM_READ : OPAL_I2C_SM_WRITE;
req.addr = cpu_to_be16(msgs[0].addr);
req.subaddr_sz = msgs[0].len;
for (i = 0; i < msgs[0].len; i++)
.functionality = i2c_opal_func,
};
+/*
+ * For two messages, we basically support simple smbus transactions of a
+ * write-then-anything.
+ */
+static struct i2c_adapter_quirks i2c_opal_quirks = {
+ .flags = I2C_AQ_COMB | I2C_AQ_COMB_WRITE_FIRST | I2C_AQ_COMB_SAME_ADDR,
+ .max_comb_1st_msg_len = 4,
+};
+
static int i2c_opal_probe(struct platform_device *pdev)
{
struct i2c_adapter *adapter;
adapter->algo = &i2c_opal_algo;
adapter->algo_data = (void *)(unsigned long)opal_id;
+ adapter->quirks = &i2c_opal_quirks;
adapter->dev.parent = &pdev->dev;
adapter->dev.of_node = of_node_get(pdev->dev.of_node);
pname = of_get_property(pdev->dev.of_node, "ibm,port-name", NULL);
return -EINVAL;
}
- if (cmd->read_len > MSP_MAX_BYTES_PER_RW ||
- cmd->write_len > MSP_MAX_BYTES_PER_RW) {
- dev_err(&pmcmsptwi_adapter.dev,
- "%s: Cannot transfer more than %d bytes\n",
- __func__, MSP_MAX_BYTES_PER_RW);
- return -EINVAL;
- }
-
mutex_lock(&data->lock);
dev_dbg(&pmcmsptwi_adapter.dev,
"Setting address to 0x%04x\n", cmd->addr);
struct pmcmsptwi_cfg oldcfg, newcfg;
int ret;
- if (num > 2) {
- dev_dbg(&adap->dev, "%d messages unsupported\n", num);
- return -EINVAL;
- } else if (num == 2) {
- /* Check for a dual write-then-read command */
+ if (num == 2) {
struct i2c_msg *nextmsg = msg + 1;
- if (!(msg->flags & I2C_M_RD) &&
- (nextmsg->flags & I2C_M_RD) &&
- msg->addr == nextmsg->addr) {
- cmd.type = MSP_TWI_CMD_WRITE_READ;
- cmd.write_len = msg->len;
- cmd.write_data = msg->buf;
- cmd.read_len = nextmsg->len;
- cmd.read_data = nextmsg->buf;
- } else {
- dev_dbg(&adap->dev,
- "Non write-read dual messages unsupported\n");
- return -EINVAL;
- }
+
+ cmd.type = MSP_TWI_CMD_WRITE_READ;
+ cmd.write_len = msg->len;
+ cmd.write_data = msg->buf;
+ cmd.read_len = nextmsg->len;
+ cmd.read_data = nextmsg->buf;
} else if (msg->flags & I2C_M_RD) {
cmd.type = MSP_TWI_CMD_READ;
cmd.read_len = msg->len;
I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_PROC_CALL;
}
+static struct i2c_adapter_quirks pmcmsptwi_i2c_quirks = {
+ .flags = I2C_AQ_COMB_WRITE_THEN_READ,
+ .max_write_len = MSP_MAX_BYTES_PER_RW,
+ .max_read_len = MSP_MAX_BYTES_PER_RW,
+ .max_comb_1st_msg_len = MSP_MAX_BYTES_PER_RW,
+ .max_comb_2nd_msg_len = MSP_MAX_BYTES_PER_RW,
+};
+
/* -- Initialization -- */
static struct i2c_algorithm pmcmsptwi_algo = {
.owner = THIS_MODULE,
.class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
.algo = &pmcmsptwi_algo,
+ .quirks = &pmcmsptwi_i2c_quirks,
.name = DRV_NAME,
};
int read;
int addrdir;
- if (num != 1) {
- dev_err(&adap->dev,
- "Multi-message I2C transactions not supported\n");
- return -EOPNOTSUPP;
- }
-
if (msgs->flags & I2C_M_TEN)
return -EINVAL;
read = (msgs->flags & I2C_M_RD) != 0;
.functionality = i2c_powermac_func,
};
+static struct i2c_adapter_quirks i2c_powermac_quirks = {
+ .max_num_msgs = 1,
+};
static int i2c_powermac_remove(struct platform_device *dev)
{
platform_set_drvdata(dev, adapter);
adapter->algo = &i2c_powermac_algorithm;
+ adapter->quirks = &i2c_powermac_quirks;
i2c_set_adapdata(adapter, bus);
adapter->dev.parent = &dev->dev;
unsigned long left;
int ret;
- /*
- * The QUP block will issue a NACK and STOP on the bus when reaching
- * the end of the read, the length of the read is specified as one byte
- * which limits the possible read to 256 (QUP_READ_LIMIT) bytes.
- */
- if (msg->len > QUP_READ_LIMIT) {
- dev_err(qup->dev, "HW not capable of reads over %d bytes\n",
- QUP_READ_LIMIT);
- return -EINVAL;
- }
-
qup->msg = msg;
qup->pos = 0;
.functionality = qup_i2c_func,
};
+/*
+ * The QUP block will issue a NACK and STOP on the bus when reaching
+ * the end of the read, the length of the read is specified as one byte
+ * which limits the possible read to 256 (QUP_READ_LIMIT) bytes.
+ */
+static struct i2c_adapter_quirks qup_i2c_quirks = {
+ .max_read_len = QUP_READ_LIMIT,
+};
+
static void qup_i2c_enable_clocks(struct qup_i2c_dev *qup)
{
clk_prepare_enable(qup->clk);
i2c_set_adapdata(&qup->adap, qup);
qup->adap.algo = &qup_i2c_algo;
+ qup->adap.quirks = &qup_i2c_quirks;
qup->adap.dev.parent = qup->dev;
qup->adap.dev.of_node = pdev->dev.of_node;
strlcpy(qup->adap.name, "QUP I2C adapter", sizeof(qup->adap.name));
if (ssr_filtered & SAR) {
/* read or write request */
if (ssr_raw & STM) {
- i2c_slave_event(priv->slave, I2C_SLAVE_REQ_READ_START, &value);
+ i2c_slave_event(priv->slave, I2C_SLAVE_READ_REQUESTED, &value);
rcar_i2c_write(priv, ICRXTX, value);
rcar_i2c_write(priv, ICSIER, SDE | SSR | SAR);
} else {
- i2c_slave_event(priv->slave, I2C_SLAVE_REQ_WRITE_START, &value);
+ i2c_slave_event(priv->slave, I2C_SLAVE_WRITE_REQUESTED, &value);
rcar_i2c_read(priv, ICRXTX); /* dummy read */
rcar_i2c_write(priv, ICSIER, SDR | SSR | SAR);
}
int ret;
value = rcar_i2c_read(priv, ICRXTX);
- ret = i2c_slave_event(priv->slave, I2C_SLAVE_REQ_WRITE_END, &value);
+ ret = i2c_slave_event(priv->slave, I2C_SLAVE_WRITE_RECEIVED, &value);
/* Send NACK in case of error */
rcar_i2c_write(priv, ICSCR, SIE | SDBS | (ret < 0 ? FNA : 0));
- i2c_slave_event(priv->slave, I2C_SLAVE_REQ_WRITE_START, &value);
rcar_i2c_write(priv, ICSSR, ~SDR & 0xff);
}
/* master wants to read from us */
if (ssr_filtered & SDE) {
- i2c_slave_event(priv->slave, I2C_SLAVE_REQ_READ_END, &value);
- i2c_slave_event(priv->slave, I2C_SLAVE_REQ_READ_START, &value);
+ i2c_slave_event(priv->slave, I2C_SLAVE_READ_PROCESSED, &value);
rcar_i2c_write(priv, ICRXTX, value);
rcar_i2c_write(priv, ICSSR, ~SDE & 0xff);
}
{
u32 packet_header;
u32 int_mask;
- int ret;
+ unsigned long time_left;
tegra_i2c_flush_fifos(i2c_dev);
dev_dbg(i2c_dev->dev, "unmasked irq: %02x\n",
i2c_readl(i2c_dev, I2C_INT_MASK));
- ret = wait_for_completion_timeout(&i2c_dev->msg_complete, TEGRA_I2C_TIMEOUT);
+ time_left = wait_for_completion_timeout(&i2c_dev->msg_complete,
+ TEGRA_I2C_TIMEOUT);
tegra_i2c_mask_irq(i2c_dev, int_mask);
- if (ret == 0) {
+ if (time_left == 0) {
dev_err(i2c_dev->dev, "i2c transfer timed out\n");
tegra_i2c_init(i2c_dev);
return -ETIMEDOUT;
}
- dev_dbg(i2c_dev->dev, "transfer complete: %d %d %d\n",
- ret, completion_done(&i2c_dev->msg_complete), i2c_dev->msg_err);
+ dev_dbg(i2c_dev->dev, "transfer complete: %lu %d %d\n",
+ time_left, completion_done(&i2c_dev->msg_complete),
+ i2c_dev->msg_err);
if (likely(i2c_dev->msg_err == I2C_ERR_NONE))
return 0;
i, pmsg->flags & I2C_M_RD ? "read" : "write",
pmsg->flags, pmsg->len, pmsg->addr);
- /* msgs longer than 2048 bytes are not supported by adapter */
- if (pmsg->len > 2048)
- return -EINVAL;
-
mutex_lock(&vb->lock);
/* directly send the message */
if (pmsg->flags & I2C_M_RD) {
.functionality = vprbrd_i2c_func,
};
+static struct i2c_adapter_quirks vprbrd_quirks = {
+ .max_read_len = 2048,
+ .max_write_len = 2048,
+};
+
static int vprbrd_i2c_probe(struct platform_device *pdev)
{
struct vprbrd *vb = dev_get_drvdata(pdev->dev.parent);
vb_i2c->i2c.owner = THIS_MODULE;
vb_i2c->i2c.class = I2C_CLASS_HWMON;
vb_i2c->i2c.algo = &vprbrd_algorithm;
+ vb_i2c->i2c.quirks = &vprbrd_quirks;
vb_i2c->i2c.algo_data = vb;
/* save the param in usb capabable memory */
vb_i2c->bus_freq_param = i2c_bus_param;
{
struct wmt_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
u16 val, tcr_val;
- int ret, wait_result;
+ int ret;
+ unsigned long wait_result;
int xfer_len = 0;
if (!(pmsg->flags & I2C_M_NOSTART)) {
while (xfer_len < pmsg->len) {
wait_result = wait_for_completion_timeout(&i2c_dev->complete,
- 500 * HZ / 1000);
+ msecs_to_jiffies(500));
if (wait_result == 0)
return -ETIMEDOUT;
{
struct wmt_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
u16 val, tcr_val;
- int ret, wait_result;
+ int ret;
+ unsigned long wait_result;
u32 xfer_len = 0;
if (!(pmsg->flags & I2C_M_NOSTART)) {
while (xfer_len < pmsg->len) {
wait_result = wait_for_completion_timeout(&i2c_dev->complete,
- 500 * HZ / 1000);
+ msecs_to_jiffies(500));
if (!wait_result)
return -ETIMEDOUT;
--- /dev/null
+/*
+ * Copyright (c) 2003-2015 Broadcom Corporation
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/completion.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+
+#define XLP9XX_I2C_DIV 0x0
+#define XLP9XX_I2C_CTRL 0x1
+#define XLP9XX_I2C_CMD 0x2
+#define XLP9XX_I2C_STATUS 0x3
+#define XLP9XX_I2C_MTXFIFO 0x4
+#define XLP9XX_I2C_MRXFIFO 0x5
+#define XLP9XX_I2C_MFIFOCTRL 0x6
+#define XLP9XX_I2C_STXFIFO 0x7
+#define XLP9XX_I2C_SRXFIFO 0x8
+#define XLP9XX_I2C_SFIFOCTRL 0x9
+#define XLP9XX_I2C_SLAVEADDR 0xA
+#define XLP9XX_I2C_OWNADDR 0xB
+#define XLP9XX_I2C_FIFOWCNT 0xC
+#define XLP9XX_I2C_INTEN 0xD
+#define XLP9XX_I2C_INTST 0xE
+#define XLP9XX_I2C_WAITCNT 0xF
+#define XLP9XX_I2C_TIMEOUT 0X10
+#define XLP9XX_I2C_GENCALLADDR 0x11
+
+#define XLP9XX_I2C_CMD_START BIT(7)
+#define XLP9XX_I2C_CMD_STOP BIT(6)
+#define XLP9XX_I2C_CMD_READ BIT(5)
+#define XLP9XX_I2C_CMD_WRITE BIT(4)
+#define XLP9XX_I2C_CMD_ACK BIT(3)
+
+#define XLP9XX_I2C_CTRL_MCTLEN_SHIFT 16
+#define XLP9XX_I2C_CTRL_MCTLEN_MASK 0xffff0000
+#define XLP9XX_I2C_CTRL_RST BIT(8)
+#define XLP9XX_I2C_CTRL_EN BIT(6)
+#define XLP9XX_I2C_CTRL_MASTER BIT(4)
+#define XLP9XX_I2C_CTRL_FIFORD BIT(1)
+#define XLP9XX_I2C_CTRL_ADDMODE BIT(0)
+
+#define XLP9XX_I2C_INTEN_NACKADDR BIT(25)
+#define XLP9XX_I2C_INTEN_SADDR BIT(13)
+#define XLP9XX_I2C_INTEN_DATADONE BIT(12)
+#define XLP9XX_I2C_INTEN_ARLOST BIT(11)
+#define XLP9XX_I2C_INTEN_MFIFOFULL BIT(4)
+#define XLP9XX_I2C_INTEN_MFIFOEMTY BIT(3)
+#define XLP9XX_I2C_INTEN_MFIFOHI BIT(2)
+#define XLP9XX_I2C_INTEN_BUSERR BIT(0)
+
+#define XLP9XX_I2C_MFIFOCTRL_HITH_SHIFT 8
+#define XLP9XX_I2C_MFIFOCTRL_LOTH_SHIFT 0
+#define XLP9XX_I2C_MFIFOCTRL_RST BIT(16)
+
+#define XLP9XX_I2C_SLAVEADDR_RW BIT(0)
+#define XLP9XX_I2C_SLAVEADDR_ADDR_SHIFT 1
+
+#define XLP9XX_I2C_IP_CLK_FREQ 133000000UL
+#define XLP9XX_I2C_DEFAULT_FREQ 100000
+#define XLP9XX_I2C_HIGH_FREQ 400000
+#define XLP9XX_I2C_FIFO_SIZE 0x80U
+#define XLP9XX_I2C_TIMEOUT_MS 1000
+
+#define XLP9XX_I2C_FIFO_WCNT_MASK 0xff
+#define XLP9XX_I2C_STATUS_ERRMASK (XLP9XX_I2C_INTEN_ARLOST | \
+ XLP9XX_I2C_INTEN_NACKADDR | XLP9XX_I2C_INTEN_BUSERR)
+
+struct xlp9xx_i2c_dev {
+ struct device *dev;
+ struct i2c_adapter adapter;
+ struct completion msg_complete;
+ int irq;
+ bool msg_read;
+ u32 __iomem *base;
+ u32 msg_buf_remaining;
+ u32 msg_len;
+ u32 clk_hz;
+ u32 msg_err;
+ u8 *msg_buf;
+};
+
+static inline void xlp9xx_write_i2c_reg(struct xlp9xx_i2c_dev *priv,
+ unsigned long reg, u32 val)
+{
+ writel(val, priv->base + reg);
+}
+
+static inline u32 xlp9xx_read_i2c_reg(struct xlp9xx_i2c_dev *priv,
+ unsigned long reg)
+{
+ return readl(priv->base + reg);
+}
+
+static void xlp9xx_i2c_mask_irq(struct xlp9xx_i2c_dev *priv, u32 mask)
+{
+ u32 inten;
+
+ inten = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_INTEN) & ~mask;
+ xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_INTEN, inten);
+}
+
+static void xlp9xx_i2c_unmask_irq(struct xlp9xx_i2c_dev *priv, u32 mask)
+{
+ u32 inten;
+
+ inten = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_INTEN) | mask;
+ xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_INTEN, inten);
+}
+
+static void xlp9xx_i2c_update_rx_fifo_thres(struct xlp9xx_i2c_dev *priv)
+{
+ u32 thres;
+
+ thres = min(priv->msg_buf_remaining, XLP9XX_I2C_FIFO_SIZE);
+ xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_MFIFOCTRL,
+ thres << XLP9XX_I2C_MFIFOCTRL_HITH_SHIFT);
+}
+
+static void xlp9xx_i2c_fill_tx_fifo(struct xlp9xx_i2c_dev *priv)
+{
+ u32 len, i;
+ u8 *buf = priv->msg_buf;
+
+ len = min(priv->msg_buf_remaining, XLP9XX_I2C_FIFO_SIZE);
+ for (i = 0; i < len; i++)
+ xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_MTXFIFO, buf[i]);
+ priv->msg_buf_remaining -= len;
+ priv->msg_buf += len;
+}
+
+static void xlp9xx_i2c_drain_rx_fifo(struct xlp9xx_i2c_dev *priv)
+{
+ u32 len, i;
+ u8 *buf = priv->msg_buf;
+
+ len = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_FIFOWCNT) &
+ XLP9XX_I2C_FIFO_WCNT_MASK;
+ len = min(priv->msg_buf_remaining, len);
+ for (i = 0; i < len; i++, buf++)
+ *buf = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_MRXFIFO);
+
+ priv->msg_buf_remaining -= len;
+ priv->msg_buf = buf;
+
+ if (priv->msg_buf_remaining)
+ xlp9xx_i2c_update_rx_fifo_thres(priv);
+}
+
+static irqreturn_t xlp9xx_i2c_isr(int irq, void *dev_id)
+{
+ struct xlp9xx_i2c_dev *priv = dev_id;
+ u32 status;
+
+ status = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_INTST);
+ if (status == 0)
+ return IRQ_NONE;
+
+ xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_INTST, status);
+ if (status & XLP9XX_I2C_STATUS_ERRMASK) {
+ priv->msg_err = status;
+ goto xfer_done;
+ }
+
+ /* SADDR ACK for SMBUS_QUICK */
+ if ((status & XLP9XX_I2C_INTEN_SADDR) && (priv->msg_len == 0))
+ goto xfer_done;
+
+ if (!priv->msg_read) {
+ if (status & XLP9XX_I2C_INTEN_MFIFOEMTY) {
+ /* TX FIFO got empty, fill it up again */
+ if (priv->msg_buf_remaining)
+ xlp9xx_i2c_fill_tx_fifo(priv);
+ else
+ xlp9xx_i2c_mask_irq(priv,
+ XLP9XX_I2C_INTEN_MFIFOEMTY);
+ }
+ } else {
+ if (status & (XLP9XX_I2C_INTEN_DATADONE |
+ XLP9XX_I2C_INTEN_MFIFOHI)) {
+ /* data is in FIFO, read it */
+ if (priv->msg_buf_remaining)
+ xlp9xx_i2c_drain_rx_fifo(priv);
+ }
+ }
+
+ /* Transfer complete */
+ if (status & XLP9XX_I2C_INTEN_DATADONE)
+ goto xfer_done;
+
+ return IRQ_HANDLED;
+
+xfer_done:
+ xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_INTEN, 0);
+ complete(&priv->msg_complete);
+ return IRQ_HANDLED;
+}
+
+static int xlp9xx_i2c_init(struct xlp9xx_i2c_dev *priv)
+{
+ u32 prescale;
+
+ /*
+ * The controller uses 5 * SCL clock internally.
+ * So prescale value should be divided by 5.
+ */
+ prescale = DIV_ROUND_UP(XLP9XX_I2C_IP_CLK_FREQ, priv->clk_hz);
+ prescale = ((prescale - 8) / 5) - 1;
+ xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_CTRL, XLP9XX_I2C_CTRL_RST);
+ xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_CTRL, XLP9XX_I2C_CTRL_EN |
+ XLP9XX_I2C_CTRL_MASTER);
+ xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_DIV, prescale);
+ xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_INTEN, 0);
+
+ return 0;
+}
+
+static int xlp9xx_i2c_xfer_msg(struct xlp9xx_i2c_dev *priv, struct i2c_msg *msg,
+ int last_msg)
+{
+ unsigned long timeleft;
+ u32 intr_mask, cmd, val;
+
+ priv->msg_buf = msg->buf;
+ priv->msg_buf_remaining = priv->msg_len = msg->len;
+ priv->msg_err = 0;
+ priv->msg_read = (msg->flags & I2C_M_RD);
+ reinit_completion(&priv->msg_complete);
+
+ /* Reset FIFO */
+ xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_MFIFOCTRL,
+ XLP9XX_I2C_MFIFOCTRL_RST);
+
+ /* set FIFO threshold if reading */
+ if (priv->msg_read)
+ xlp9xx_i2c_update_rx_fifo_thres(priv);
+
+ /* set slave addr */
+ xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_SLAVEADDR,
+ (msg->addr << XLP9XX_I2C_SLAVEADDR_ADDR_SHIFT) |
+ (priv->msg_read ? XLP9XX_I2C_SLAVEADDR_RW : 0));
+
+ /* Build control word for transfer */
+ val = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_CTRL);
+ if (!priv->msg_read)
+ val &= ~XLP9XX_I2C_CTRL_FIFORD;
+ else
+ val |= XLP9XX_I2C_CTRL_FIFORD; /* read */
+
+ if (msg->flags & I2C_M_TEN)
+ val |= XLP9XX_I2C_CTRL_ADDMODE; /* 10-bit address mode*/
+ else
+ val &= ~XLP9XX_I2C_CTRL_ADDMODE;
+
+ /* set data length to be transferred */
+ val = (val & ~XLP9XX_I2C_CTRL_MCTLEN_MASK) |
+ (msg->len << XLP9XX_I2C_CTRL_MCTLEN_SHIFT);
+ xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_CTRL, val);
+
+ /* fill fifo during tx */
+ if (!priv->msg_read)
+ xlp9xx_i2c_fill_tx_fifo(priv);
+
+ /* set interrupt mask */
+ intr_mask = (XLP9XX_I2C_INTEN_ARLOST | XLP9XX_I2C_INTEN_BUSERR |
+ XLP9XX_I2C_INTEN_NACKADDR | XLP9XX_I2C_INTEN_DATADONE);
+
+ if (priv->msg_read) {
+ intr_mask |= XLP9XX_I2C_INTEN_MFIFOHI;
+ if (msg->len == 0)
+ intr_mask |= XLP9XX_I2C_INTEN_SADDR;
+ } else {
+ if (msg->len == 0)
+ intr_mask |= XLP9XX_I2C_INTEN_SADDR;
+ else
+ intr_mask |= XLP9XX_I2C_INTEN_MFIFOEMTY;
+ }
+ xlp9xx_i2c_unmask_irq(priv, intr_mask);
+
+ /* set cmd reg */
+ cmd = XLP9XX_I2C_CMD_START;
+ cmd |= (priv->msg_read ? XLP9XX_I2C_CMD_READ : XLP9XX_I2C_CMD_WRITE);
+ if (last_msg)
+ cmd |= XLP9XX_I2C_CMD_STOP;
+
+ xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_CMD, cmd);
+
+ timeleft = msecs_to_jiffies(XLP9XX_I2C_TIMEOUT_MS);
+ timeleft = wait_for_completion_timeout(&priv->msg_complete, timeleft);
+
+ if (priv->msg_err) {
+ dev_dbg(priv->dev, "transfer error %x!\n", priv->msg_err);
+ if (priv->msg_err & XLP9XX_I2C_INTEN_BUSERR)
+ xlp9xx_i2c_init(priv);
+ return -EIO;
+ }
+
+ if (timeleft == 0) {
+ dev_dbg(priv->dev, "i2c transfer timed out!\n");
+ xlp9xx_i2c_init(priv);
+ return -ETIMEDOUT;
+ }
+
+ return 0;
+}
+
+static int xlp9xx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
+ int num)
+{
+ int i, ret;
+ struct xlp9xx_i2c_dev *priv = i2c_get_adapdata(adap);
+
+ for (i = 0; i < num; i++) {
+ ret = xlp9xx_i2c_xfer_msg(priv, &msgs[i], i == num - 1);
+ if (ret != 0)
+ return ret;
+ }
+
+ return num;
+}
+
+static u32 xlp9xx_i2c_functionality(struct i2c_adapter *adapter)
+{
+ return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C |
+ I2C_FUNC_10BIT_ADDR;
+}
+
+static struct i2c_algorithm xlp9xx_i2c_algo = {
+ .master_xfer = xlp9xx_i2c_xfer,
+ .functionality = xlp9xx_i2c_functionality,
+};
+
+static int xlp9xx_i2c_get_frequency(struct platform_device *pdev,
+ struct xlp9xx_i2c_dev *priv)
+{
+ struct device_node *np = pdev->dev.of_node;
+ u32 freq;
+ int err;
+
+ err = of_property_read_u32(np, "clock-frequency", &freq);
+ if (err) {
+ freq = XLP9XX_I2C_DEFAULT_FREQ;
+ dev_dbg(&pdev->dev, "using default frequency %u\n", freq);
+ } else if (freq == 0 || freq > XLP9XX_I2C_HIGH_FREQ) {
+ dev_warn(&pdev->dev, "invalid frequency %u, using default\n",
+ freq);
+ freq = XLP9XX_I2C_DEFAULT_FREQ;
+ }
+ priv->clk_hz = freq;
+
+ return 0;
+}
+
+static int xlp9xx_i2c_probe(struct platform_device *pdev)
+{
+ struct xlp9xx_i2c_dev *priv;
+ struct resource *res;
+ int err = 0;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ priv->base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(priv->base))
+ return PTR_ERR(priv->base);
+
+ priv->irq = platform_get_irq(pdev, 0);
+ if (priv->irq <= 0) {
+ dev_err(&pdev->dev, "invalid irq!\n");
+ return priv->irq;
+ }
+
+ xlp9xx_i2c_get_frequency(pdev, priv);
+ xlp9xx_i2c_init(priv);
+
+ err = devm_request_irq(&pdev->dev, priv->irq, xlp9xx_i2c_isr, 0,
+ pdev->name, priv);
+ if (err) {
+ dev_err(&pdev->dev, "IRQ request failed!\n");
+ return err;
+ }
+
+ init_completion(&priv->msg_complete);
+ priv->adapter.dev.parent = &pdev->dev;
+ priv->adapter.algo = &xlp9xx_i2c_algo;
+ priv->adapter.dev.of_node = pdev->dev.of_node;
+ priv->dev = &pdev->dev;
+
+ snprintf(priv->adapter.name, sizeof(priv->adapter.name), "xlp9xx-i2c");
+ i2c_set_adapdata(&priv->adapter, priv);
+
+ err = i2c_add_adapter(&priv->adapter);
+ if (err) {
+ dev_err(&pdev->dev, "failed to add I2C adapter!\n");
+ return err;
+ }
+
+ platform_set_drvdata(pdev, priv);
+ dev_dbg(&pdev->dev, "I2C bus:%d added\n", priv->adapter.nr);
+
+ return 0;
+}
+
+static int xlp9xx_i2c_remove(struct platform_device *pdev)
+{
+ struct xlp9xx_i2c_dev *priv;
+
+ priv = platform_get_drvdata(pdev);
+ xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_INTEN, 0);
+ synchronize_irq(priv->irq);
+ i2c_del_adapter(&priv->adapter);
+ xlp9xx_write_i2c_reg(priv, XLP9XX_I2C_CTRL, 0);
+
+ return 0;
+}
+
+static const struct of_device_id xlp9xx_i2c_of_match[] = {
+ { .compatible = "netlogic,xlp980-i2c", },
+ { /* sentinel */ },
+};
+
+static struct platform_driver xlp9xx_i2c_driver = {
+ .probe = xlp9xx_i2c_probe,
+ .remove = xlp9xx_i2c_remove,
+ .driver = {
+ .name = "xlp9xx-i2c",
+ .of_match_table = xlp9xx_i2c_of_match,
+ },
+};
+
+module_platform_driver(xlp9xx_i2c_driver);
+
+MODULE_AUTHOR("Subhendu Sekhar Behera <sbehera@broadcom.com>");
+MODULE_DESCRIPTION("XLP9XX/5XX I2C Bus Controller Driver");
+MODULE_LICENSE("GPL v2");
int i = 0, val = 1, ret = 0;
if (bri->prepare_recovery)
- bri->prepare_recovery(bri);
+ bri->prepare_recovery(adap);
/*
* By this time SCL is high, as we need to give 9 falling-rising edges
}
if (bri->unprepare_recovery)
- bri->unprepare_recovery(bri);
+ bri->unprepare_recovery(adap);
return ret;
}
{
int retval;
+ retval = of_alias_get_highest_id("i2c");
+
+ down_write(&__i2c_board_lock);
+ if (retval >= __i2c_first_dynamic_bus_num)
+ __i2c_first_dynamic_bus_num = retval + 1;
+ up_write(&__i2c_board_lock);
+
retval = bus_register(&i2c_bus_type);
if (retval)
return retval;
* ----------------------------------------------------
*/
+/* Check if val is exceeding the quirk IFF quirk is non 0 */
+#define i2c_quirk_exceeded(val, quirk) ((quirk) && ((val) > (quirk)))
+
+static int i2c_quirk_error(struct i2c_adapter *adap, struct i2c_msg *msg, char *err_msg)
+{
+ dev_err_ratelimited(&adap->dev, "adapter quirk: %s (addr 0x%04x, size %u, %s)\n",
+ err_msg, msg->addr, msg->len,
+ msg->flags & I2C_M_RD ? "read" : "write");
+ return -EOPNOTSUPP;
+}
+
+static int i2c_check_for_quirks(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
+{
+ const struct i2c_adapter_quirks *q = adap->quirks;
+ int max_num = q->max_num_msgs, i;
+ bool do_len_check = true;
+
+ if (q->flags & I2C_AQ_COMB) {
+ max_num = 2;
+
+ /* special checks for combined messages */
+ if (num == 2) {
+ if (q->flags & I2C_AQ_COMB_WRITE_FIRST && msgs[0].flags & I2C_M_RD)
+ return i2c_quirk_error(adap, &msgs[0], "1st comb msg must be write");
+
+ if (q->flags & I2C_AQ_COMB_READ_SECOND && !(msgs[1].flags & I2C_M_RD))
+ return i2c_quirk_error(adap, &msgs[1], "2nd comb msg must be read");
+
+ if (q->flags & I2C_AQ_COMB_SAME_ADDR && msgs[0].addr != msgs[1].addr)
+ return i2c_quirk_error(adap, &msgs[0], "comb msg only to same addr");
+
+ if (i2c_quirk_exceeded(msgs[0].len, q->max_comb_1st_msg_len))
+ return i2c_quirk_error(adap, &msgs[0], "msg too long");
+
+ if (i2c_quirk_exceeded(msgs[1].len, q->max_comb_2nd_msg_len))
+ return i2c_quirk_error(adap, &msgs[1], "msg too long");
+
+ do_len_check = false;
+ }
+ }
+
+ if (i2c_quirk_exceeded(num, max_num))
+ return i2c_quirk_error(adap, &msgs[0], "too many messages");
+
+ for (i = 0; i < num; i++) {
+ u16 len = msgs[i].len;
+
+ if (msgs[i].flags & I2C_M_RD) {
+ if (do_len_check && i2c_quirk_exceeded(len, q->max_read_len))
+ return i2c_quirk_error(adap, &msgs[i], "msg too long");
+ } else {
+ if (do_len_check && i2c_quirk_exceeded(len, q->max_write_len))
+ return i2c_quirk_error(adap, &msgs[i], "msg too long");
+ }
+ }
+
+ return 0;
+}
+
/**
* __i2c_transfer - unlocked flavor of i2c_transfer
* @adap: Handle to I2C bus
unsigned long orig_jiffies;
int ret, try;
+ if (adap->quirks && i2c_check_for_quirks(adap, msgs, num))
+ return -EOPNOTSUPP;
+
/* i2c_trace_msg gets enabled when tracepoint i2c_transfer gets
* enabled. This is an efficient way of keeping the for-loop from
* being executed when not needed.
struct eeprom_data *eeprom = i2c_get_clientdata(client);
switch (event) {
- case I2C_SLAVE_REQ_WRITE_END:
+ case I2C_SLAVE_WRITE_RECEIVED:
if (eeprom->first_write) {
eeprom->buffer_idx = *val;
eeprom->first_write = false;
}
break;
- case I2C_SLAVE_REQ_READ_START:
+ case I2C_SLAVE_READ_PROCESSED:
+ /* The previous byte made it to the bus, get next one */
+ eeprom->buffer_idx++;
+ /* fallthrough */
+ case I2C_SLAVE_READ_REQUESTED:
spin_lock(&eeprom->buffer_lock);
*val = eeprom->buffer[eeprom->buffer_idx];
spin_unlock(&eeprom->buffer_lock);
- break;
-
- case I2C_SLAVE_REQ_READ_END:
- eeprom->buffer_idx++;
+ /*
+ * Do not increment buffer_idx here, because we don't know if
+ * this byte will be actually used. Read Linux I2C slave docs
+ * for details.
+ */
break;
case I2C_SLAVE_STOP:
+ case I2C_SLAVE_WRITE_REQUESTED:
eeprom->first_write = true;
break;
return -ENODEV;
}
adapter = of_find_i2c_adapter_by_node(adapter_np);
- if (!adapter) {
- dev_err(&pdev->dev, "Cannot find parent bus\n");
+ if (!adapter)
return -EPROBE_DEFER;
- }
+
mux->data.parent = i2c_adapter_id(adapter);
put_device(&adapter->dev);
}
parent = i2c_get_adapter(mux->data.parent);
- if (!parent) {
- dev_err(&pdev->dev, "Parent adapter (%d) not found\n",
- mux->data.parent);
+ if (!parent)
return -EPROBE_DEFER;
- }
mux->parent = parent;
mux->gpio_base = gpio_base;
i2c_set_clientdata(client, data);
/* Get the mux out of reset if a reset GPIO is specified. */
- gpio = devm_gpiod_get(&client->dev, "reset");
- if (!IS_ERR(gpio))
- gpiod_direction_output(gpio, 0);
+ gpio = devm_gpiod_get_optional(&client->dev, "reset", GPIOD_OUT_LOW);
+ if (IS_ERR(gpio))
+ return PTR_ERR(gpio);
/* Write the mux register at addr to verify
* that the mux is in fact present. This also
printk(KERN_CONT "DataRequest ");
if (stat & ATA_CORR)
printk(KERN_CONT "CorrectedError ");
- if (stat & ATA_IDX)
- printk(KERN_CONT "Index ");
+ if (stat & ATA_SENSE)
+ printk(KERN_CONT "Sense ");
if (stat & ATA_ERR)
printk(KERN_CONT "Error ");
}
(hwif->host_flags & IDE_HFLAG_BROKEN_ALTSTATUS) == 0) {
a = tp_ops->read_altstatus(hwif);
s = tp_ops->read_status(hwif);
- if ((a ^ s) & ~ATA_IDX)
+ if ((a ^ s) & ~ATA_SENSE)
/* ancient Seagate drives, broken interfaces */
printk(KERN_INFO "%s: probing with STATUS(0x%02x) "
"instead of ALTSTATUS(0x%02x)\n",
#include <linux/kernel.h>
#include <linux/cpuidle.h>
-#include <linux/clockchips.h>
+#include <linux/tick.h>
#include <trace/events/power.h>
#include <linux/sched.h>
#include <linux/notifier.h>
leave_mm(cpu);
if (!(lapic_timer_reliable_states & (1 << (cstate))))
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
+ tick_broadcast_enter();
mwait_idle_with_hints(eax, ecx);
if (!(lapic_timer_reliable_states & (1 << (cstate))))
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
+ tick_broadcast_exit();
return index;
}
static void __setup_broadcast_timer(void *arg)
{
- unsigned long reason = (unsigned long)arg;
- int cpu = smp_processor_id();
-
- reason = reason ?
- CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
+ unsigned long on = (unsigned long)arg;
- clockevents_notify(reason, &cpu);
+ if (on)
+ tick_broadcast_enable();
+ else
+ tick_broadcast_disable();
}
static int cpu_hotplug_notify(struct notifier_block *n,
#define BMC150_ACCEL_INT_MAP_0_BIT_SLOPE BIT(2)
#define BMC150_ACCEL_REG_INT_MAP_1 0x1A
-#define BMC150_ACCEL_INT_MAP_1_BIT_DATA BIT(0)
+#define BMC150_ACCEL_INT_MAP_1_BIT_DATA BIT(0)
+#define BMC150_ACCEL_INT_MAP_1_BIT_FWM BIT(1)
+#define BMC150_ACCEL_INT_MAP_1_BIT_FFULL BIT(2)
#define BMC150_ACCEL_REG_INT_RST_LATCH 0x21
#define BMC150_ACCEL_INT_MODE_LATCH_RESET 0x80
#define BMC150_ACCEL_INT_EN_BIT_SLP_Z BIT(2)
#define BMC150_ACCEL_REG_INT_EN_1 0x17
-#define BMC150_ACCEL_INT_EN_BIT_DATA_EN BIT(4)
+#define BMC150_ACCEL_INT_EN_BIT_DATA_EN BIT(4)
+#define BMC150_ACCEL_INT_EN_BIT_FFULL_EN BIT(5)
+#define BMC150_ACCEL_INT_EN_BIT_FWM_EN BIT(6)
#define BMC150_ACCEL_REG_INT_OUT_CTRL 0x20
#define BMC150_ACCEL_INT_OUT_CTRL_INT1_LVL BIT(0)
#define BMC150_ACCEL_AXIS_TO_REG(axis) (BMC150_ACCEL_REG_XOUT_L + (axis * 2))
#define BMC150_AUTO_SUSPEND_DELAY_MS 2000
+#define BMC150_ACCEL_REG_FIFO_STATUS 0x0E
+#define BMC150_ACCEL_REG_FIFO_CONFIG0 0x30
+#define BMC150_ACCEL_REG_FIFO_CONFIG1 0x3E
+#define BMC150_ACCEL_REG_FIFO_DATA 0x3F
+#define BMC150_ACCEL_FIFO_LENGTH 32
+
enum bmc150_accel_axis {
AXIS_X,
AXIS_Y,
const struct bmc150_scale_info scale_table[4];
};
+struct bmc150_accel_interrupt {
+ const struct bmc150_accel_interrupt_info *info;
+ atomic_t users;
+};
+
+struct bmc150_accel_trigger {
+ struct bmc150_accel_data *data;
+ struct iio_trigger *indio_trig;
+ int (*setup)(struct bmc150_accel_trigger *t, bool state);
+ int intr;
+ bool enabled;
+};
+
+enum bmc150_accel_interrupt_id {
+ BMC150_ACCEL_INT_DATA_READY,
+ BMC150_ACCEL_INT_ANY_MOTION,
+ BMC150_ACCEL_INT_WATERMARK,
+ BMC150_ACCEL_INTERRUPTS,
+};
+
+enum bmc150_accel_trigger_id {
+ BMC150_ACCEL_TRIGGER_DATA_READY,
+ BMC150_ACCEL_TRIGGER_ANY_MOTION,
+ BMC150_ACCEL_TRIGGERS,
+};
+
struct bmc150_accel_data {
struct i2c_client *client;
- struct iio_trigger *dready_trig;
- struct iio_trigger *motion_trig;
+ struct bmc150_accel_interrupt interrupts[BMC150_ACCEL_INTERRUPTS];
+ atomic_t active_intr;
+ struct bmc150_accel_trigger triggers[BMC150_ACCEL_TRIGGERS];
struct mutex mutex;
+ u8 fifo_mode, watermark;
s16 buffer[8];
u8 bw_bits;
u32 slope_dur;
u32 slope_thres;
u32 range;
int ev_enable_state;
- bool dready_trigger_on;
- bool motion_trigger_on;
- int64_t timestamp;
+ int64_t timestamp, old_timestamp;
const struct bmc150_accel_chip_info *chip_info;
};
return -EINVAL;
}
+static int bmc150_accel_update_slope(struct bmc150_accel_data *data)
+{
+ int ret, val;
+
+ ret = i2c_smbus_write_byte_data(data->client, BMC150_ACCEL_REG_INT_6,
+ data->slope_thres);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error writing reg_int_6\n");
+ return ret;
+ }
+
+ ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_INT_5);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error reading reg_int_5\n");
+ return ret;
+ }
+
+ val = (ret & ~BMC150_ACCEL_SLOPE_DUR_MASK) | data->slope_dur;
+ ret = i2c_smbus_write_byte_data(data->client, BMC150_ACCEL_REG_INT_5,
+ val);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error write reg_int_5\n");
+ return ret;
+ }
+
+ dev_dbg(&data->client->dev, "%s: %x %x\n", __func__, data->slope_thres,
+ data->slope_dur);
+
+ return ret;
+}
+
+static int bmc150_accel_any_motion_setup(struct bmc150_accel_trigger *t,
+ bool state)
+{
+ if (state)
+ return bmc150_accel_update_slope(t->data);
+
+ return 0;
+}
+
static int bmc150_accel_chip_init(struct bmc150_accel_data *data)
{
int ret;
data->range = BMC150_ACCEL_DEF_RANGE_4G;
- /* Set default slope duration */
- ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_INT_5);
- if (ret < 0) {
- dev_err(&data->client->dev, "Error reading reg_int_5\n");
- return ret;
- }
- data->slope_dur |= BMC150_ACCEL_DEF_SLOPE_DURATION;
- ret = i2c_smbus_write_byte_data(data->client,
- BMC150_ACCEL_REG_INT_5,
- data->slope_dur);
- if (ret < 0) {
- dev_err(&data->client->dev, "Error writing reg_int_5\n");
- return ret;
- }
- dev_dbg(&data->client->dev, "slope_dur %x\n", data->slope_dur);
-
- /* Set default slope thresholds */
- ret = i2c_smbus_write_byte_data(data->client,
- BMC150_ACCEL_REG_INT_6,
- BMC150_ACCEL_DEF_SLOPE_THRESHOLD);
- if (ret < 0) {
- dev_err(&data->client->dev, "Error writing reg_int_6\n");
- return ret;
- }
+ /* Set default slope duration and thresholds */
data->slope_thres = BMC150_ACCEL_DEF_SLOPE_THRESHOLD;
- dev_dbg(&data->client->dev, "slope_thres %x\n", data->slope_thres);
+ data->slope_dur = BMC150_ACCEL_DEF_SLOPE_DURATION;
+ ret = bmc150_accel_update_slope(data);
+ if (ret < 0)
+ return ret;
/* Set default as latched interrupts */
ret = i2c_smbus_write_byte_data(data->client,
return 0;
}
-static int bmc150_accel_setup_any_motion_interrupt(
- struct bmc150_accel_data *data,
- bool status)
-{
- int ret;
-
- /* Enable/Disable INT1 mapping */
- ret = i2c_smbus_read_byte_data(data->client,
- BMC150_ACCEL_REG_INT_MAP_0);
- if (ret < 0) {
- dev_err(&data->client->dev, "Error reading reg_int_map_0\n");
- return ret;
- }
- if (status)
- ret |= BMC150_ACCEL_INT_MAP_0_BIT_SLOPE;
- else
- ret &= ~BMC150_ACCEL_INT_MAP_0_BIT_SLOPE;
-
- ret = i2c_smbus_write_byte_data(data->client,
- BMC150_ACCEL_REG_INT_MAP_0,
- ret);
- if (ret < 0) {
- dev_err(&data->client->dev, "Error writing reg_int_map_0\n");
- return ret;
- }
-
- if (status) {
- /* Set slope duration (no of samples) */
- ret = i2c_smbus_write_byte_data(data->client,
- BMC150_ACCEL_REG_INT_5,
- data->slope_dur);
- if (ret < 0) {
- dev_err(&data->client->dev, "Error write reg_int_5\n");
- return ret;
- }
-
- /* Set slope thresholds */
- ret = i2c_smbus_write_byte_data(data->client,
- BMC150_ACCEL_REG_INT_6,
- data->slope_thres);
- if (ret < 0) {
- dev_err(&data->client->dev, "Error write reg_int_6\n");
- return ret;
- }
-
- /*
- * New data interrupt is always non-latched,
- * which will have higher priority, so no need
- * to set latched mode, we will be flooded anyway with INTR
- */
- if (!data->dready_trigger_on) {
- ret = i2c_smbus_write_byte_data(data->client,
- BMC150_ACCEL_REG_INT_RST_LATCH,
- BMC150_ACCEL_INT_MODE_LATCH_INT |
- BMC150_ACCEL_INT_MODE_LATCH_RESET);
- if (ret < 0) {
- dev_err(&data->client->dev,
- "Error writing reg_int_rst_latch\n");
- return ret;
- }
- }
-
- ret = i2c_smbus_write_byte_data(data->client,
- BMC150_ACCEL_REG_INT_EN_0,
- BMC150_ACCEL_INT_EN_BIT_SLP_X |
- BMC150_ACCEL_INT_EN_BIT_SLP_Y |
- BMC150_ACCEL_INT_EN_BIT_SLP_Z);
- } else
- ret = i2c_smbus_write_byte_data(data->client,
- BMC150_ACCEL_REG_INT_EN_0,
- 0);
-
- if (ret < 0) {
- dev_err(&data->client->dev, "Error writing reg_int_en_0\n");
- return ret;
- }
-
- return 0;
-}
-
-static int bmc150_accel_setup_new_data_interrupt(struct bmc150_accel_data *data,
- bool status)
-{
- int ret;
-
- /* Enable/Disable INT1 mapping */
- ret = i2c_smbus_read_byte_data(data->client,
- BMC150_ACCEL_REG_INT_MAP_1);
- if (ret < 0) {
- dev_err(&data->client->dev, "Error reading reg_int_map_1\n");
- return ret;
- }
- if (status)
- ret |= BMC150_ACCEL_INT_MAP_1_BIT_DATA;
- else
- ret &= ~BMC150_ACCEL_INT_MAP_1_BIT_DATA;
-
- ret = i2c_smbus_write_byte_data(data->client,
- BMC150_ACCEL_REG_INT_MAP_1,
- ret);
- if (ret < 0) {
- dev_err(&data->client->dev, "Error writing reg_int_map_1\n");
- return ret;
- }
-
- if (status) {
- /*
- * Set non latched mode interrupt and clear any latched
- * interrupt
- */
- ret = i2c_smbus_write_byte_data(data->client,
- BMC150_ACCEL_REG_INT_RST_LATCH,
- BMC150_ACCEL_INT_MODE_NON_LATCH_INT |
- BMC150_ACCEL_INT_MODE_LATCH_RESET);
- if (ret < 0) {
- dev_err(&data->client->dev,
- "Error writing reg_int_rst_latch\n");
- return ret;
- }
-
- ret = i2c_smbus_write_byte_data(data->client,
- BMC150_ACCEL_REG_INT_EN_1,
- BMC150_ACCEL_INT_EN_BIT_DATA_EN);
-
- } else {
- /* Restore default interrupt mode */
- ret = i2c_smbus_write_byte_data(data->client,
- BMC150_ACCEL_REG_INT_RST_LATCH,
- BMC150_ACCEL_INT_MODE_LATCH_INT |
- BMC150_ACCEL_INT_MODE_LATCH_RESET);
- if (ret < 0) {
- dev_err(&data->client->dev,
- "Error writing reg_int_rst_latch\n");
- return ret;
- }
-
- ret = i2c_smbus_write_byte_data(data->client,
- BMC150_ACCEL_REG_INT_EN_1,
- 0);
- }
-
- if (ret < 0) {
- dev_err(&data->client->dev, "Error writing reg_int_en_1\n");
- return ret;
- }
-
- return 0;
-}
-
static int bmc150_accel_get_bw(struct bmc150_accel_data *data, int *val,
int *val2)
{
}
#endif
+static const struct bmc150_accel_interrupt_info {
+ u8 map_reg;
+ u8 map_bitmask;
+ u8 en_reg;
+ u8 en_bitmask;
+} bmc150_accel_interrupts[BMC150_ACCEL_INTERRUPTS] = {
+ { /* data ready interrupt */
+ .map_reg = BMC150_ACCEL_REG_INT_MAP_1,
+ .map_bitmask = BMC150_ACCEL_INT_MAP_1_BIT_DATA,
+ .en_reg = BMC150_ACCEL_REG_INT_EN_1,
+ .en_bitmask = BMC150_ACCEL_INT_EN_BIT_DATA_EN,
+ },
+ { /* motion interrupt */
+ .map_reg = BMC150_ACCEL_REG_INT_MAP_0,
+ .map_bitmask = BMC150_ACCEL_INT_MAP_0_BIT_SLOPE,
+ .en_reg = BMC150_ACCEL_REG_INT_EN_0,
+ .en_bitmask = BMC150_ACCEL_INT_EN_BIT_SLP_X |
+ BMC150_ACCEL_INT_EN_BIT_SLP_Y |
+ BMC150_ACCEL_INT_EN_BIT_SLP_Z
+ },
+ { /* fifo watermark interrupt */
+ .map_reg = BMC150_ACCEL_REG_INT_MAP_1,
+ .map_bitmask = BMC150_ACCEL_INT_MAP_1_BIT_FWM,
+ .en_reg = BMC150_ACCEL_REG_INT_EN_1,
+ .en_bitmask = BMC150_ACCEL_INT_EN_BIT_FWM_EN,
+ },
+};
+
+static void bmc150_accel_interrupts_setup(struct iio_dev *indio_dev,
+ struct bmc150_accel_data *data)
+{
+ int i;
+
+ for (i = 0; i < BMC150_ACCEL_INTERRUPTS; i++)
+ data->interrupts[i].info = &bmc150_accel_interrupts[i];
+}
+
+static int bmc150_accel_set_interrupt(struct bmc150_accel_data *data, int i,
+ bool state)
+{
+ struct bmc150_accel_interrupt *intr = &data->interrupts[i];
+ const struct bmc150_accel_interrupt_info *info = intr->info;
+ int ret;
+
+ if (state) {
+ if (atomic_inc_return(&intr->users) > 1)
+ return 0;
+ } else {
+ if (atomic_dec_return(&intr->users) > 0)
+ return 0;
+ }
+
+ /*
+ * We will expect the enable and disable to do operation in
+ * in reverse order. This will happen here anyway as our
+ * resume operation uses sync mode runtime pm calls, the
+ * suspend operation will be delayed by autosuspend delay
+ * So the disable operation will still happen in reverse of
+ * enable operation. When runtime pm is disabled the mode
+ * is always on so sequence doesn't matter
+ */
+ ret = bmc150_accel_set_power_state(data, state);
+ if (ret < 0)
+ return ret;
+
+ /* map the interrupt to the appropriate pins */
+ ret = i2c_smbus_read_byte_data(data->client, info->map_reg);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error reading reg_int_map\n");
+ goto out_fix_power_state;
+ }
+ if (state)
+ ret |= info->map_bitmask;
+ else
+ ret &= ~info->map_bitmask;
+
+ ret = i2c_smbus_write_byte_data(data->client, info->map_reg,
+ ret);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error writing reg_int_map\n");
+ goto out_fix_power_state;
+ }
+
+ /* enable/disable the interrupt */
+ ret = i2c_smbus_read_byte_data(data->client, info->en_reg);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error reading reg_int_en\n");
+ goto out_fix_power_state;
+ }
+
+ if (state)
+ ret |= info->en_bitmask;
+ else
+ ret &= ~info->en_bitmask;
+
+ ret = i2c_smbus_write_byte_data(data->client, info->en_reg, ret);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error writing reg_int_en\n");
+ goto out_fix_power_state;
+ }
+
+ if (state)
+ atomic_inc(&data->active_intr);
+ else
+ atomic_dec(&data->active_intr);
+
+ return 0;
+
+out_fix_power_state:
+ bmc150_accel_set_power_state(data, false);
+ return ret;
+}
+
+
static int bmc150_accel_set_scale(struct bmc150_accel_data *data, int val)
{
int ret, i;
*val = data->slope_thres;
break;
case IIO_EV_INFO_PERIOD:
- *val = data->slope_dur & BMC150_ACCEL_SLOPE_DUR_MASK;
+ *val = data->slope_dur;
break;
default:
return -EINVAL;
switch (info) {
case IIO_EV_INFO_VALUE:
- data->slope_thres = val;
+ data->slope_thres = val & 0xFF;
break;
case IIO_EV_INFO_PERIOD:
- data->slope_dur &= ~BMC150_ACCEL_SLOPE_DUR_MASK;
- data->slope_dur |= val & BMC150_ACCEL_SLOPE_DUR_MASK;
+ data->slope_dur = val & BMC150_ACCEL_SLOPE_DUR_MASK;
break;
default:
return -EINVAL;
struct bmc150_accel_data *data = iio_priv(indio_dev);
int ret;
- if (state && data->ev_enable_state)
+ if (state == data->ev_enable_state)
return 0;
mutex_lock(&data->mutex);
- if (!state && data->motion_trigger_on) {
- data->ev_enable_state = 0;
- mutex_unlock(&data->mutex);
- return 0;
- }
-
- /*
- * We will expect the enable and disable to do operation in
- * in reverse order. This will happen here anyway as our
- * resume operation uses sync mode runtime pm calls, the
- * suspend operation will be delayed by autosuspend delay
- * So the disable operation will still happen in reverse of
- * enable operation. When runtime pm is disabled the mode
- * is always on so sequence doesn't matter
- */
-
- ret = bmc150_accel_set_power_state(data, state);
- if (ret < 0) {
- mutex_unlock(&data->mutex);
- return ret;
- }
-
- ret = bmc150_accel_setup_any_motion_interrupt(data, state);
+ ret = bmc150_accel_set_interrupt(data, BMC150_ACCEL_INT_ANY_MOTION,
+ state);
if (ret < 0) {
- bmc150_accel_set_power_state(data, false);
mutex_unlock(&data->mutex);
return ret;
}
struct iio_trigger *trig)
{
struct bmc150_accel_data *data = iio_priv(indio_dev);
+ int i;
- if (data->dready_trig != trig && data->motion_trig != trig)
- return -EINVAL;
+ for (i = 0; i < BMC150_ACCEL_TRIGGERS; i++) {
+ if (data->triggers[i].indio_trig == trig)
+ return 0;
+ }
+
+ return -EINVAL;
+}
+
+static ssize_t bmc150_accel_get_fifo_watermark(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct iio_dev *indio_dev = dev_to_iio_dev(dev);
+ struct bmc150_accel_data *data = iio_priv(indio_dev);
+ int wm;
+
+ mutex_lock(&data->mutex);
+ wm = data->watermark;
+ mutex_unlock(&data->mutex);
+
+ return sprintf(buf, "%d\n", wm);
+}
+
+static ssize_t bmc150_accel_get_fifo_state(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct iio_dev *indio_dev = dev_to_iio_dev(dev);
+ struct bmc150_accel_data *data = iio_priv(indio_dev);
+ bool state;
+
+ mutex_lock(&data->mutex);
+ state = data->fifo_mode;
+ mutex_unlock(&data->mutex);
+
+ return sprintf(buf, "%d\n", state);
+}
+
+static IIO_CONST_ATTR(hwfifo_watermark_min, "1");
+static IIO_CONST_ATTR(hwfifo_watermark_max,
+ __stringify(BMC150_ACCEL_FIFO_LENGTH));
+static IIO_DEVICE_ATTR(hwfifo_enabled, S_IRUGO,
+ bmc150_accel_get_fifo_state, NULL, 0);
+static IIO_DEVICE_ATTR(hwfifo_watermark, S_IRUGO,
+ bmc150_accel_get_fifo_watermark, NULL, 0);
+
+static const struct attribute *bmc150_accel_fifo_attributes[] = {
+ &iio_const_attr_hwfifo_watermark_min.dev_attr.attr,
+ &iio_const_attr_hwfifo_watermark_max.dev_attr.attr,
+ &iio_dev_attr_hwfifo_watermark.dev_attr.attr,
+ &iio_dev_attr_hwfifo_enabled.dev_attr.attr,
+ NULL,
+};
+
+static int bmc150_accel_set_watermark(struct iio_dev *indio_dev, unsigned val)
+{
+ struct bmc150_accel_data *data = iio_priv(indio_dev);
+
+ if (val > BMC150_ACCEL_FIFO_LENGTH)
+ val = BMC150_ACCEL_FIFO_LENGTH;
+
+ mutex_lock(&data->mutex);
+ data->watermark = val;
+ mutex_unlock(&data->mutex);
return 0;
}
+/*
+ * We must read at least one full frame in one burst, otherwise the rest of the
+ * frame data is discarded.
+ */
+static int bmc150_accel_fifo_transfer(const struct i2c_client *client,
+ char *buffer, int samples)
+{
+ int sample_length = 3 * 2;
+ u8 reg_fifo_data = BMC150_ACCEL_REG_FIFO_DATA;
+ int ret = -EIO;
+
+ if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+ struct i2c_msg msg[2] = {
+ {
+ .addr = client->addr,
+ .flags = 0,
+ .buf = ®_fifo_data,
+ .len = sizeof(reg_fifo_data),
+ },
+ {
+ .addr = client->addr,
+ .flags = I2C_M_RD,
+ .buf = (u8 *)buffer,
+ .len = samples * sample_length,
+ }
+ };
+
+ ret = i2c_transfer(client->adapter, msg, 2);
+ if (ret != 2)
+ ret = -EIO;
+ else
+ ret = 0;
+ } else {
+ int i, step = I2C_SMBUS_BLOCK_MAX / sample_length;
+
+ for (i = 0; i < samples * sample_length; i += step) {
+ ret = i2c_smbus_read_i2c_block_data(client,
+ reg_fifo_data, step,
+ &buffer[i]);
+ if (ret != step) {
+ ret = -EIO;
+ break;
+ }
+
+ ret = 0;
+ }
+ }
+
+ if (ret)
+ dev_err(&client->dev, "Error transferring data from fifo\n");
+
+ return ret;
+}
+
+static int __bmc150_accel_fifo_flush(struct iio_dev *indio_dev,
+ unsigned samples, bool irq)
+{
+ struct bmc150_accel_data *data = iio_priv(indio_dev);
+ int ret, i;
+ u8 count;
+ u16 buffer[BMC150_ACCEL_FIFO_LENGTH * 3];
+ int64_t tstamp;
+ uint64_t sample_period;
+ ret = i2c_smbus_read_byte_data(data->client,
+ BMC150_ACCEL_REG_FIFO_STATUS);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error reading reg_fifo_status\n");
+ return ret;
+ }
+
+ count = ret & 0x7F;
+
+ if (!count)
+ return 0;
+
+ /*
+ * If we getting called from IRQ handler we know the stored timestamp is
+ * fairly accurate for the last stored sample. Otherwise, if we are
+ * called as a result of a read operation from userspace and hence
+ * before the watermark interrupt was triggered, take a timestamp
+ * now. We can fall anywhere in between two samples so the error in this
+ * case is at most one sample period.
+ */
+ if (!irq) {
+ data->old_timestamp = data->timestamp;
+ data->timestamp = iio_get_time_ns();
+ }
+
+ /*
+ * Approximate timestamps for each of the sample based on the sampling
+ * frequency, timestamp for last sample and number of samples.
+ *
+ * Note that we can't use the current bandwidth settings to compute the
+ * sample period because the sample rate varies with the device
+ * (e.g. between 31.70ms to 32.20ms for a bandwidth of 15.63HZ). That
+ * small variation adds when we store a large number of samples and
+ * creates significant jitter between the last and first samples in
+ * different batches (e.g. 32ms vs 21ms).
+ *
+ * To avoid this issue we compute the actual sample period ourselves
+ * based on the timestamp delta between the last two flush operations.
+ */
+ sample_period = (data->timestamp - data->old_timestamp);
+ do_div(sample_period, count);
+ tstamp = data->timestamp - (count - 1) * sample_period;
+
+ if (samples && count > samples)
+ count = samples;
+
+ ret = bmc150_accel_fifo_transfer(data->client, (u8 *)buffer, count);
+ if (ret)
+ return ret;
+
+ /*
+ * Ideally we want the IIO core to handle the demux when running in fifo
+ * mode but not when running in triggered buffer mode. Unfortunately
+ * this does not seem to be possible, so stick with driver demux for
+ * now.
+ */
+ for (i = 0; i < count; i++) {
+ u16 sample[8];
+ int j, bit;
+
+ j = 0;
+ for_each_set_bit(bit, indio_dev->active_scan_mask,
+ indio_dev->masklength)
+ memcpy(&sample[j++], &buffer[i * 3 + bit], 2);
+
+ iio_push_to_buffers_with_timestamp(indio_dev, sample, tstamp);
+
+ tstamp += sample_period;
+ }
+
+ return count;
+}
+
+static int bmc150_accel_fifo_flush(struct iio_dev *indio_dev, unsigned samples)
+{
+ struct bmc150_accel_data *data = iio_priv(indio_dev);
+ int ret;
+
+ mutex_lock(&data->mutex);
+ ret = __bmc150_accel_fifo_flush(indio_dev, samples, false);
+ mutex_unlock(&data->mutex);
+
+ return ret;
+}
+
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
"15.620000 31.260000 62.50000 125 250 500 1000 2000");
.driver_module = THIS_MODULE,
};
+static const struct iio_info bmc150_accel_info_fifo = {
+ .attrs = &bmc150_accel_attrs_group,
+ .read_raw = bmc150_accel_read_raw,
+ .write_raw = bmc150_accel_write_raw,
+ .read_event_value = bmc150_accel_read_event,
+ .write_event_value = bmc150_accel_write_event,
+ .write_event_config = bmc150_accel_write_event_config,
+ .read_event_config = bmc150_accel_read_event_config,
+ .validate_trigger = bmc150_accel_validate_trigger,
+ .hwfifo_set_watermark = bmc150_accel_set_watermark,
+ .hwfifo_flush_to_buffer = bmc150_accel_fifo_flush,
+ .driver_module = THIS_MODULE,
+};
+
static irqreturn_t bmc150_accel_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
static int bmc150_accel_trig_try_reen(struct iio_trigger *trig)
{
- struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
- struct bmc150_accel_data *data = iio_priv(indio_dev);
+ struct bmc150_accel_trigger *t = iio_trigger_get_drvdata(trig);
+ struct bmc150_accel_data *data = t->data;
int ret;
/* new data interrupts don't need ack */
- if (data->dready_trigger_on)
+ if (t == &t->data->triggers[BMC150_ACCEL_TRIGGER_DATA_READY])
return 0;
mutex_lock(&data->mutex);
return 0;
}
-static int bmc150_accel_data_rdy_trigger_set_state(struct iio_trigger *trig,
+static int bmc150_accel_trigger_set_state(struct iio_trigger *trig,
bool state)
{
- struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
- struct bmc150_accel_data *data = iio_priv(indio_dev);
+ struct bmc150_accel_trigger *t = iio_trigger_get_drvdata(trig);
+ struct bmc150_accel_data *data = t->data;
int ret;
mutex_lock(&data->mutex);
- if (!state && data->ev_enable_state && data->motion_trigger_on) {
- data->motion_trigger_on = false;
+ if (t->enabled == state) {
mutex_unlock(&data->mutex);
return 0;
}
- /*
- * Refer to comment in bmc150_accel_write_event_config for
- * enable/disable operation order
- */
- ret = bmc150_accel_set_power_state(data, state);
- if (ret < 0) {
- mutex_unlock(&data->mutex);
- return ret;
+ if (t->setup) {
+ ret = t->setup(t, state);
+ if (ret < 0) {
+ mutex_unlock(&data->mutex);
+ return ret;
+ }
}
- if (data->motion_trig == trig)
- ret = bmc150_accel_setup_any_motion_interrupt(data, state);
- else
- ret = bmc150_accel_setup_new_data_interrupt(data, state);
+
+ ret = bmc150_accel_set_interrupt(data, t->intr, state);
if (ret < 0) {
- bmc150_accel_set_power_state(data, false);
mutex_unlock(&data->mutex);
return ret;
}
- if (data->motion_trig == trig)
- data->motion_trigger_on = state;
- else
- data->dready_trigger_on = state;
+
+ t->enabled = state;
mutex_unlock(&data->mutex);
}
static const struct iio_trigger_ops bmc150_accel_trigger_ops = {
- .set_trigger_state = bmc150_accel_data_rdy_trigger_set_state,
+ .set_trigger_state = bmc150_accel_trigger_set_state,
.try_reenable = bmc150_accel_trig_try_reen,
.owner = THIS_MODULE,
};
-static irqreturn_t bmc150_accel_event_handler(int irq, void *private)
+static int bmc150_accel_handle_roc_event(struct iio_dev *indio_dev)
{
- struct iio_dev *indio_dev = private;
struct bmc150_accel_data *data = iio_priv(indio_dev);
- int ret;
int dir;
+ int ret;
ret = i2c_smbus_read_byte_data(data->client,
BMC150_ACCEL_REG_INT_STATUS_2);
if (ret < 0) {
dev_err(&data->client->dev, "Error reading reg_int_status_2\n");
- goto ack_intr_status;
+ return ret;
}
if (ret & BMC150_ACCEL_ANY_MOTION_BIT_SIGN)
IIO_EV_TYPE_ROC,
dir),
data->timestamp);
-ack_intr_status:
- if (!data->dready_trigger_on)
+ return ret;
+}
+
+static irqreturn_t bmc150_accel_irq_thread_handler(int irq, void *private)
+{
+ struct iio_dev *indio_dev = private;
+ struct bmc150_accel_data *data = iio_priv(indio_dev);
+ bool ack = false;
+ int ret;
+
+ mutex_lock(&data->mutex);
+
+ if (data->fifo_mode) {
+ ret = __bmc150_accel_fifo_flush(indio_dev,
+ BMC150_ACCEL_FIFO_LENGTH, true);
+ if (ret > 0)
+ ack = true;
+ }
+
+ if (data->ev_enable_state) {
+ ret = bmc150_accel_handle_roc_event(indio_dev);
+ if (ret > 0)
+ ack = true;
+ }
+
+ if (ack) {
ret = i2c_smbus_write_byte_data(data->client,
BMC150_ACCEL_REG_INT_RST_LATCH,
BMC150_ACCEL_INT_MODE_LATCH_INT |
BMC150_ACCEL_INT_MODE_LATCH_RESET);
+ if (ret)
+ dev_err(&data->client->dev, "Error writing reg_int_rst_latch\n");
+ ret = IRQ_HANDLED;
+ } else {
+ ret = IRQ_NONE;
+ }
- return IRQ_HANDLED;
+ mutex_unlock(&data->mutex);
+
+ return ret;
}
-static irqreturn_t bmc150_accel_data_rdy_trig_poll(int irq, void *private)
+static irqreturn_t bmc150_accel_irq_handler(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct bmc150_accel_data *data = iio_priv(indio_dev);
+ bool ack = false;
+ int i;
+ data->old_timestamp = data->timestamp;
data->timestamp = iio_get_time_ns();
- if (data->dready_trigger_on)
- iio_trigger_poll(data->dready_trig);
- else if (data->motion_trigger_on)
- iio_trigger_poll(data->motion_trig);
+ for (i = 0; i < BMC150_ACCEL_TRIGGERS; i++) {
+ if (data->triggers[i].enabled) {
+ iio_trigger_poll(data->triggers[i].indio_trig);
+ ack = true;
+ break;
+ }
+ }
- if (data->ev_enable_state)
+ if (data->ev_enable_state || data->fifo_mode)
return IRQ_WAKE_THREAD;
- else
+
+ if (ack)
return IRQ_HANDLED;
+
+ return IRQ_NONE;
}
static const char *bmc150_accel_match_acpi_device(struct device *dev, int *data)
dev = &client->dev;
/* data ready gpio interrupt pin */
- gpio = devm_gpiod_get_index(dev, BMC150_ACCEL_GPIO_NAME, 0);
+ gpio = devm_gpiod_get_index(dev, BMC150_ACCEL_GPIO_NAME, 0, GPIOD_IN);
if (IS_ERR(gpio)) {
dev_err(dev, "Failed: gpio get index\n");
return PTR_ERR(gpio);
}
- ret = gpiod_direction_input(gpio);
+ ret = gpiod_to_irq(gpio);
+
+ dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
+
+ return ret;
+}
+
+static const struct {
+ int intr;
+ const char *name;
+ int (*setup)(struct bmc150_accel_trigger *t, bool state);
+} bmc150_accel_triggers[BMC150_ACCEL_TRIGGERS] = {
+ {
+ .intr = 0,
+ .name = "%s-dev%d",
+ },
+ {
+ .intr = 1,
+ .name = "%s-any-motion-dev%d",
+ .setup = bmc150_accel_any_motion_setup,
+ },
+};
+
+static void bmc150_accel_unregister_triggers(struct bmc150_accel_data *data,
+ int from)
+{
+ int i;
+
+ for (i = from; i >= 0; i++) {
+ if (data->triggers[i].indio_trig) {
+ iio_trigger_unregister(data->triggers[i].indio_trig);
+ data->triggers[i].indio_trig = NULL;
+ }
+ }
+}
+
+static int bmc150_accel_triggers_setup(struct iio_dev *indio_dev,
+ struct bmc150_accel_data *data)
+{
+ int i, ret;
+
+ for (i = 0; i < BMC150_ACCEL_TRIGGERS; i++) {
+ struct bmc150_accel_trigger *t = &data->triggers[i];
+
+ t->indio_trig = devm_iio_trigger_alloc(&data->client->dev,
+ bmc150_accel_triggers[i].name,
+ indio_dev->name,
+ indio_dev->id);
+ if (!t->indio_trig) {
+ ret = -ENOMEM;
+ break;
+ }
+
+ t->indio_trig->dev.parent = &data->client->dev;
+ t->indio_trig->ops = &bmc150_accel_trigger_ops;
+ t->intr = bmc150_accel_triggers[i].intr;
+ t->data = data;
+ t->setup = bmc150_accel_triggers[i].setup;
+ iio_trigger_set_drvdata(t->indio_trig, t);
+
+ ret = iio_trigger_register(t->indio_trig);
+ if (ret)
+ break;
+ }
+
if (ret)
+ bmc150_accel_unregister_triggers(data, i - 1);
+
+ return ret;
+}
+
+#define BMC150_ACCEL_FIFO_MODE_STREAM 0x80
+#define BMC150_ACCEL_FIFO_MODE_FIFO 0x40
+#define BMC150_ACCEL_FIFO_MODE_BYPASS 0x00
+
+static int bmc150_accel_fifo_set_mode(struct bmc150_accel_data *data)
+{
+ u8 reg = BMC150_ACCEL_REG_FIFO_CONFIG1;
+ int ret;
+
+ ret = i2c_smbus_write_byte_data(data->client, reg, data->fifo_mode);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error writing reg_fifo_config1\n");
return ret;
+ }
- ret = gpiod_to_irq(gpio);
+ if (!data->fifo_mode)
+ return 0;
- dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
+ ret = i2c_smbus_write_byte_data(data->client,
+ BMC150_ACCEL_REG_FIFO_CONFIG0,
+ data->watermark);
+ if (ret < 0)
+ dev_err(&data->client->dev, "Error writing reg_fifo_config0\n");
return ret;
}
+static int bmc150_accel_buffer_postenable(struct iio_dev *indio_dev)
+{
+ struct bmc150_accel_data *data = iio_priv(indio_dev);
+ int ret = 0;
+
+ if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED)
+ return iio_triggered_buffer_postenable(indio_dev);
+
+ mutex_lock(&data->mutex);
+
+ if (!data->watermark)
+ goto out;
+
+ ret = bmc150_accel_set_interrupt(data, BMC150_ACCEL_INT_WATERMARK,
+ true);
+ if (ret)
+ goto out;
+
+ data->fifo_mode = BMC150_ACCEL_FIFO_MODE_FIFO;
+
+ ret = bmc150_accel_fifo_set_mode(data);
+ if (ret) {
+ data->fifo_mode = 0;
+ bmc150_accel_set_interrupt(data, BMC150_ACCEL_INT_WATERMARK,
+ false);
+ }
+
+out:
+ mutex_unlock(&data->mutex);
+
+ return ret;
+}
+
+static int bmc150_accel_buffer_predisable(struct iio_dev *indio_dev)
+{
+ struct bmc150_accel_data *data = iio_priv(indio_dev);
+
+ if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED)
+ return iio_triggered_buffer_predisable(indio_dev);
+
+ mutex_lock(&data->mutex);
+
+ if (!data->fifo_mode)
+ goto out;
+
+ bmc150_accel_set_interrupt(data, BMC150_ACCEL_INT_WATERMARK, false);
+ __bmc150_accel_fifo_flush(indio_dev, BMC150_ACCEL_FIFO_LENGTH, false);
+ data->fifo_mode = 0;
+ bmc150_accel_fifo_set_mode(data);
+
+out:
+ mutex_unlock(&data->mutex);
+
+ return 0;
+}
+
+static const struct iio_buffer_setup_ops bmc150_accel_buffer_ops = {
+ .postenable = bmc150_accel_buffer_postenable,
+ .predisable = bmc150_accel_buffer_predisable,
+};
+
static int bmc150_accel_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
if (client->irq >= 0) {
ret = devm_request_threaded_irq(
&client->dev, client->irq,
- bmc150_accel_data_rdy_trig_poll,
- bmc150_accel_event_handler,
+ bmc150_accel_irq_handler,
+ bmc150_accel_irq_thread_handler,
IRQF_TRIGGER_RISING,
BMC150_ACCEL_IRQ_NAME,
indio_dev);
if (ret)
return ret;
- data->dready_trig = devm_iio_trigger_alloc(&client->dev,
- "%s-dev%d",
- indio_dev->name,
- indio_dev->id);
- if (!data->dready_trig)
- return -ENOMEM;
-
- data->motion_trig = devm_iio_trigger_alloc(&client->dev,
- "%s-any-motion-dev%d",
- indio_dev->name,
- indio_dev->id);
- if (!data->motion_trig)
- return -ENOMEM;
-
- data->dready_trig->dev.parent = &client->dev;
- data->dready_trig->ops = &bmc150_accel_trigger_ops;
- iio_trigger_set_drvdata(data->dready_trig, indio_dev);
- ret = iio_trigger_register(data->dready_trig);
- if (ret)
+ /*
+ * Set latched mode interrupt. While certain interrupts are
+ * non-latched regardless of this settings (e.g. new data) we
+ * want to use latch mode when we can to prevent interrupt
+ * flooding.
+ */
+ ret = i2c_smbus_write_byte_data(data->client,
+ BMC150_ACCEL_REG_INT_RST_LATCH,
+ BMC150_ACCEL_INT_MODE_LATCH_RESET);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error writing reg_int_rst_latch\n");
return ret;
-
- data->motion_trig->dev.parent = &client->dev;
- data->motion_trig->ops = &bmc150_accel_trigger_ops;
- iio_trigger_set_drvdata(data->motion_trig, indio_dev);
- ret = iio_trigger_register(data->motion_trig);
- if (ret) {
- data->motion_trig = NULL;
- goto err_trigger_unregister;
}
+ bmc150_accel_interrupts_setup(indio_dev, data);
+
+ ret = bmc150_accel_triggers_setup(indio_dev, data);
+ if (ret)
+ return ret;
+
ret = iio_triggered_buffer_setup(indio_dev,
&iio_pollfunc_store_time,
bmc150_accel_trigger_handler,
- NULL);
+ &bmc150_accel_buffer_ops);
if (ret < 0) {
dev_err(&client->dev,
"Failed: iio triggered buffer setup\n");
goto err_trigger_unregister;
}
+
+ if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) ||
+ i2c_check_functionality(client->adapter,
+ I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
+ indio_dev->modes |= INDIO_BUFFER_SOFTWARE;
+ indio_dev->info = &bmc150_accel_info_fifo;
+ indio_dev->buffer->attrs = bmc150_accel_fifo_attributes;
+ }
}
ret = iio_device_register(indio_dev);
err_iio_unregister:
iio_device_unregister(indio_dev);
err_buffer_cleanup:
- if (data->dready_trig)
+ if (indio_dev->pollfunc)
iio_triggered_buffer_cleanup(indio_dev);
err_trigger_unregister:
- if (data->dready_trig)
- iio_trigger_unregister(data->dready_trig);
- if (data->motion_trig)
- iio_trigger_unregister(data->motion_trig);
+ bmc150_accel_unregister_triggers(data, BMC150_ACCEL_TRIGGERS - 1);
return ret;
}
iio_device_unregister(indio_dev);
- if (data->dready_trig) {
- iio_triggered_buffer_cleanup(indio_dev);
- iio_trigger_unregister(data->dready_trig);
- iio_trigger_unregister(data->motion_trig);
- }
+ bmc150_accel_unregister_triggers(data, BMC150_ACCEL_TRIGGERS - 1);
mutex_lock(&data->mutex);
bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND, 0);
struct bmc150_accel_data *data = iio_priv(indio_dev);
mutex_lock(&data->mutex);
- if (data->dready_trigger_on || data->motion_trigger_on ||
- data->ev_enable_state)
+ if (atomic_read(&data->active_intr))
bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
+ bmc150_accel_fifo_set_mode(data);
mutex_unlock(&data->mutex);
return 0;
dev_dbg(&data->client->dev, __func__);
ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
+ if (ret < 0)
+ return ret;
+ ret = bmc150_accel_fifo_set_mode(data);
if (ret < 0)
return ret;
*val = sensor_hub_input_attr_get_raw_value(
accel_state->common_attributes.hsdev,
HID_USAGE_SENSOR_ACCEL_3D, address,
- report_id);
+ report_id,
+ SENSOR_HUB_SYNC);
else {
*val = 0;
hid_sensor_power_state(&accel_state->common_attributes,
dev = &client->dev;
/* data ready gpio interrupt pin */
- gpio = devm_gpiod_get_index(dev, "kxcjk1013_int", 0);
+ gpio = devm_gpiod_get_index(dev, "kxcjk1013_int", 0, GPIOD_IN);
if (IS_ERR(gpio)) {
dev_err(dev, "acpi gpio get index failed\n");
return PTR_ERR(gpio);
}
- ret = gpiod_direction_input(gpio);
- if (ret)
- return ret;
-
ret = gpiod_to_irq(gpio);
dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
struct device *dev = &data->client->dev;
for (i = 0; i < MMA9551_GPIO_COUNT; i++) {
- gpio = devm_gpiod_get_index(dev, MMA9551_GPIO_NAME, i);
+ gpio = devm_gpiod_get_index(dev, MMA9551_GPIO_NAME, i,
+ GPIOD_IN);
if (IS_ERR(gpio)) {
dev_err(dev, "acpi gpio get index failed\n");
return PTR_ERR(gpio);
}
- ret = gpiod_direction_input(gpio);
- if (ret)
+ ret = gpiod_to_irq(gpio);
+ if (ret < 0)
return ret;
- data->irqs[i] = gpiod_to_irq(gpio);
+ data->irqs[i] = ret;
ret = devm_request_threaded_irq(dev, data->irqs[i],
NULL, mma9551_event_handler,
IRQF_TRIGGER_RISING | IRQF_ONESHOT,
dev = &client->dev;
/* data ready gpio interrupt pin */
- gpio = devm_gpiod_get_index(dev, MMA9553_GPIO_NAME, 0);
+ gpio = devm_gpiod_get_index(dev, MMA9553_GPIO_NAME, 0, GPIOD_IN);
if (IS_ERR(gpio)) {
dev_err(dev, "acpi gpio get index failed\n");
return PTR_ERR(gpio);
}
- ret = gpiod_direction_input(gpio);
- if (ret)
- return ret;
-
ret = gpiod_to_irq(gpio);
dev_dbg(dev, "gpio resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
#include <linux/types.h>
#include <linux/iio/common/st_sensors.h>
+#define LIS3LV02DL_ACCEL_DEV_NAME "lis3lv02dl_accel"
#define LSM303DLHC_ACCEL_DEV_NAME "lsm303dlhc_accel"
#define LIS3DH_ACCEL_DEV_NAME "lis3dh"
#define LSM330D_ACCEL_DEV_NAME "lsm330d_accel"
#define ST_ACCEL_3_IG1_EN_MASK 0x08
#define ST_ACCEL_3_MULTIREAD_BIT false
+/* CUSTOM VALUES FOR SENSOR 4 */
+#define ST_ACCEL_4_WAI_EXP 0x3a
+#define ST_ACCEL_4_ODR_ADDR 0x20
+#define ST_ACCEL_4_ODR_MASK 0x30 /* DF1 and DF0 */
+#define ST_ACCEL_4_ODR_AVL_40HZ_VAL 0x00
+#define ST_ACCEL_4_ODR_AVL_160HZ_VAL 0x01
+#define ST_ACCEL_4_ODR_AVL_640HZ_VAL 0x02
+#define ST_ACCEL_4_ODR_AVL_2560HZ_VAL 0x03
+#define ST_ACCEL_4_PW_ADDR 0x20
+#define ST_ACCEL_4_PW_MASK 0xc0
+#define ST_ACCEL_4_FS_ADDR 0x21
+#define ST_ACCEL_4_FS_MASK 0x80
+#define ST_ACCEL_4_FS_AVL_2_VAL 0X00
+#define ST_ACCEL_4_FS_AVL_6_VAL 0X01
+#define ST_ACCEL_4_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1024)
+#define ST_ACCEL_4_FS_AVL_6_GAIN IIO_G_TO_M_S_2(340)
+#define ST_ACCEL_4_BDU_ADDR 0x21
+#define ST_ACCEL_4_BDU_MASK 0x40
+#define ST_ACCEL_4_DRDY_IRQ_ADDR 0x21
+#define ST_ACCEL_4_DRDY_IRQ_INT1_MASK 0x04
+#define ST_ACCEL_4_IG1_EN_ADDR 0x21
+#define ST_ACCEL_4_IG1_EN_MASK 0x08
+#define ST_ACCEL_4_MULTIREAD_BIT true
+
static const struct iio_chan_spec st_accel_12bit_channels[] = {
ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
.multi_read_bit = ST_ACCEL_3_MULTIREAD_BIT,
.bootime = 2,
},
+ {
+ .wai = ST_ACCEL_4_WAI_EXP,
+ .sensors_supported = {
+ [0] = LIS3LV02DL_ACCEL_DEV_NAME,
+ },
+ .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
+ .odr = {
+ .addr = ST_ACCEL_4_ODR_ADDR,
+ .mask = ST_ACCEL_4_ODR_MASK,
+ .odr_avl = {
+ { 40, ST_ACCEL_4_ODR_AVL_40HZ_VAL },
+ { 160, ST_ACCEL_4_ODR_AVL_160HZ_VAL, },
+ { 640, ST_ACCEL_4_ODR_AVL_640HZ_VAL, },
+ { 2560, ST_ACCEL_4_ODR_AVL_2560HZ_VAL, },
+ },
+ },
+ .pw = {
+ .addr = ST_ACCEL_4_PW_ADDR,
+ .mask = ST_ACCEL_4_PW_MASK,
+ .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
+ .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
+ },
+ .enable_axis = {
+ .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
+ .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
+ },
+ .fs = {
+ .addr = ST_ACCEL_4_FS_ADDR,
+ .mask = ST_ACCEL_4_FS_MASK,
+ .fs_avl = {
+ [0] = {
+ .num = ST_ACCEL_FS_AVL_2G,
+ .value = ST_ACCEL_4_FS_AVL_2_VAL,
+ .gain = ST_ACCEL_4_FS_AVL_2_GAIN,
+ },
+ [1] = {
+ .num = ST_ACCEL_FS_AVL_6G,
+ .value = ST_ACCEL_4_FS_AVL_6_VAL,
+ .gain = ST_ACCEL_4_FS_AVL_6_GAIN,
+ },
+ },
+ },
+ .bdu = {
+ .addr = ST_ACCEL_4_BDU_ADDR,
+ .mask = ST_ACCEL_4_BDU_MASK,
+ },
+ .drdy_irq = {
+ .addr = ST_ACCEL_4_DRDY_IRQ_ADDR,
+ .mask_int1 = ST_ACCEL_4_DRDY_IRQ_INT1_MASK,
+ .ig1 = {
+ .en_addr = ST_ACCEL_4_IG1_EN_ADDR,
+ .en_mask = ST_ACCEL_4_IG1_EN_MASK,
+ },
+ },
+ .multi_read_bit = ST_ACCEL_4_MULTIREAD_BIT,
+ .bootime = 2, /* guess */
+ },
};
static int st_accel_read_raw(struct iio_dev *indio_dev,
#ifdef CONFIG_OF
static const struct of_device_id st_accel_of_match[] = {
+ {
+ .compatible = "st,lis3lv02dl-accel",
+ .data = LIS3LV02DL_ACCEL_DEV_NAME,
+ },
{
.compatible = "st,lsm303dlh-accel",
.data = LSM303DLH_ACCEL_DEV_NAME,
device. Depending on platform configuration, this general purpose ADC can
be used for sampling sensors such as thermal resistors.
+config DA9150_GPADC
+ tristate "Dialog DA9150 GPADC driver support"
+ depends on MFD_DA9150
+ help
+ Say yes here to build support for Dialog DA9150 GPADC.
+
+ This driver can also be built as a module. If chosen, the module name
+ will be da9150-gpadc.
+
config CC10001_ADC
tristate "Cosmic Circuits 10001 ADC driver"
depends on HAVE_CLK || REGULATOR
data via the iio dev interface.
config MCP320X
- tristate "Microchip Technology MCP3204/08"
+ tristate "Microchip Technology MCP3x01/02/04/08"
depends on SPI
help
- Say yes here to build support for Microchip Technology's MCP3204 or
+ Say yes here to build support for Microchip Technology's
+ MCP3001, MCP3002, MCP3004, MCP3008, MCP3201, MCP3202, MCP3204 or
MCP3208 analog to digital converter.
This driver can also be built as a module. If so, the module will be
obj-$(CONFIG_AD799X) += ad799x.o
obj-$(CONFIG_AT91_ADC) += at91_adc.o
obj-$(CONFIG_AXP288_ADC) += axp288_adc.o
+obj-$(CONFIG_DA9150_GPADC) += da9150-gpadc.o
obj-$(CONFIG_CC10001_ADC) += cc10001_adc.o
obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o
obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
module_spi_driver(ad7793_driver);
MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
-MODULE_DESCRIPTION("Analog Devices AD7793 and simialr ADCs");
+MODULE_DESCRIPTION("Analog Devices AD7793 and similar ADCs");
MODULE_LICENSE("GPL v2");
--- /dev/null
+/*
+ * DA9150 GPADC Driver
+ *
+ * Copyright (c) 2014 Dialog Semiconductor
+ *
+ * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/mutex.h>
+#include <linux/completion.h>
+#include <linux/iio/iio.h>
+#include <linux/iio/machine.h>
+#include <linux/iio/driver.h>
+#include <linux/mfd/da9150/core.h>
+#include <linux/mfd/da9150/registers.h>
+
+/* Channels */
+enum da9150_gpadc_hw_channel {
+ DA9150_GPADC_HW_CHAN_GPIOA_2V = 0,
+ DA9150_GPADC_HW_CHAN_GPIOA_2V_,
+ DA9150_GPADC_HW_CHAN_GPIOB_2V,
+ DA9150_GPADC_HW_CHAN_GPIOB_2V_,
+ DA9150_GPADC_HW_CHAN_GPIOC_2V,
+ DA9150_GPADC_HW_CHAN_GPIOC_2V_,
+ DA9150_GPADC_HW_CHAN_GPIOD_2V,
+ DA9150_GPADC_HW_CHAN_GPIOD_2V_,
+ DA9150_GPADC_HW_CHAN_IBUS_SENSE,
+ DA9150_GPADC_HW_CHAN_IBUS_SENSE_,
+ DA9150_GPADC_HW_CHAN_VBUS_DIV,
+ DA9150_GPADC_HW_CHAN_VBUS_DIV_,
+ DA9150_GPADC_HW_CHAN_ID,
+ DA9150_GPADC_HW_CHAN_ID_,
+ DA9150_GPADC_HW_CHAN_VSYS,
+ DA9150_GPADC_HW_CHAN_VSYS_,
+ DA9150_GPADC_HW_CHAN_GPIOA_6V,
+ DA9150_GPADC_HW_CHAN_GPIOA_6V_,
+ DA9150_GPADC_HW_CHAN_GPIOB_6V,
+ DA9150_GPADC_HW_CHAN_GPIOB_6V_,
+ DA9150_GPADC_HW_CHAN_GPIOC_6V,
+ DA9150_GPADC_HW_CHAN_GPIOC_6V_,
+ DA9150_GPADC_HW_CHAN_GPIOD_6V,
+ DA9150_GPADC_HW_CHAN_GPIOD_6V_,
+ DA9150_GPADC_HW_CHAN_VBAT,
+ DA9150_GPADC_HW_CHAN_VBAT_,
+ DA9150_GPADC_HW_CHAN_TBAT,
+ DA9150_GPADC_HW_CHAN_TBAT_,
+ DA9150_GPADC_HW_CHAN_TJUNC_CORE,
+ DA9150_GPADC_HW_CHAN_TJUNC_CORE_,
+ DA9150_GPADC_HW_CHAN_TJUNC_OVP,
+ DA9150_GPADC_HW_CHAN_TJUNC_OVP_,
+};
+
+enum da9150_gpadc_channel {
+ DA9150_GPADC_CHAN_GPIOA = 0,
+ DA9150_GPADC_CHAN_GPIOB,
+ DA9150_GPADC_CHAN_GPIOC,
+ DA9150_GPADC_CHAN_GPIOD,
+ DA9150_GPADC_CHAN_IBUS,
+ DA9150_GPADC_CHAN_VBUS,
+ DA9150_GPADC_CHAN_VSYS,
+ DA9150_GPADC_CHAN_VBAT,
+ DA9150_GPADC_CHAN_TBAT,
+ DA9150_GPADC_CHAN_TJUNC_CORE,
+ DA9150_GPADC_CHAN_TJUNC_OVP,
+};
+
+/* Private data */
+struct da9150_gpadc {
+ struct da9150 *da9150;
+ struct device *dev;
+
+ struct mutex lock;
+ struct completion complete;
+};
+
+
+static irqreturn_t da9150_gpadc_irq(int irq, void *data)
+{
+
+ struct da9150_gpadc *gpadc = data;
+
+ complete(&gpadc->complete);
+
+ return IRQ_HANDLED;
+}
+
+static int da9150_gpadc_read_adc(struct da9150_gpadc *gpadc, int hw_chan)
+{
+ u8 result_regs[2];
+ int result;
+
+ mutex_lock(&gpadc->lock);
+
+ /* Set channel & enable measurement */
+ da9150_reg_write(gpadc->da9150, DA9150_GPADC_MAN,
+ (DA9150_GPADC_EN_MASK |
+ hw_chan << DA9150_GPADC_MUX_SHIFT));
+
+ /* Consume left-over completion from a previous timeout */
+ try_wait_for_completion(&gpadc->complete);
+
+ /* Check for actual completion */
+ wait_for_completion_timeout(&gpadc->complete, msecs_to_jiffies(5));
+
+ /* Read result and status from device */
+ da9150_bulk_read(gpadc->da9150, DA9150_GPADC_RES_A, 2, result_regs);
+
+ mutex_unlock(&gpadc->lock);
+
+ /* Check to make sure device really has completed reading */
+ if (result_regs[1] & DA9150_GPADC_RUN_MASK) {
+ dev_err(gpadc->dev, "Timeout on channel %d of GPADC\n",
+ hw_chan);
+ return -ETIMEDOUT;
+ }
+
+ /* LSBs - 2 bits */
+ result = (result_regs[1] & DA9150_GPADC_RES_L_MASK) >>
+ DA9150_GPADC_RES_L_SHIFT;
+ /* MSBs - 8 bits */
+ result |= result_regs[0] << DA9150_GPADC_RES_L_BITS;
+
+ return result;
+}
+
+static inline int da9150_gpadc_gpio_6v_voltage_now(int raw_val)
+{
+ /* Convert to mV */
+ return (6 * ((raw_val * 1000) + 500)) / 1024;
+}
+
+static inline int da9150_gpadc_ibus_current_avg(int raw_val)
+{
+ /* Convert to mA */
+ return (4 * ((raw_val * 1000) + 500)) / 2048;
+}
+
+static inline int da9150_gpadc_vbus_21v_voltage_now(int raw_val)
+{
+ /* Convert to mV */
+ return (21 * ((raw_val * 1000) + 500)) / 1024;
+}
+
+static inline int da9150_gpadc_vsys_6v_voltage_now(int raw_val)
+{
+ /* Convert to mV */
+ return (3 * ((raw_val * 1000) + 500)) / 512;
+}
+
+static int da9150_gpadc_read_processed(struct da9150_gpadc *gpadc, int channel,
+ int hw_chan, int *val)
+{
+ int raw_val;
+
+ raw_val = da9150_gpadc_read_adc(gpadc, hw_chan);
+ if (raw_val < 0)
+ return raw_val;
+
+ switch (channel) {
+ case DA9150_GPADC_CHAN_GPIOA:
+ case DA9150_GPADC_CHAN_GPIOB:
+ case DA9150_GPADC_CHAN_GPIOC:
+ case DA9150_GPADC_CHAN_GPIOD:
+ *val = da9150_gpadc_gpio_6v_voltage_now(raw_val);
+ break;
+ case DA9150_GPADC_CHAN_IBUS:
+ *val = da9150_gpadc_ibus_current_avg(raw_val);
+ break;
+ case DA9150_GPADC_CHAN_VBUS:
+ *val = da9150_gpadc_vbus_21v_voltage_now(raw_val);
+ break;
+ case DA9150_GPADC_CHAN_VSYS:
+ *val = da9150_gpadc_vsys_6v_voltage_now(raw_val);
+ break;
+ default:
+ /* No processing for other channels so return raw value */
+ *val = raw_val;
+ break;
+ }
+
+ return IIO_VAL_INT;
+}
+
+static int da9150_gpadc_read_scale(int channel, int *val, int *val2)
+{
+ switch (channel) {
+ case DA9150_GPADC_CHAN_VBAT:
+ *val = 2932;
+ *val2 = 1000;
+ return IIO_VAL_FRACTIONAL;
+ case DA9150_GPADC_CHAN_TJUNC_CORE:
+ case DA9150_GPADC_CHAN_TJUNC_OVP:
+ *val = 1000000;
+ *val2 = 4420;
+ return IIO_VAL_FRACTIONAL;
+ default:
+ return -EINVAL;
+ }
+}
+
+static int da9150_gpadc_read_offset(int channel, int *val)
+{
+ switch (channel) {
+ case DA9150_GPADC_CHAN_VBAT:
+ *val = 1500000 / 2932;
+ return IIO_VAL_INT;
+ case DA9150_GPADC_CHAN_TJUNC_CORE:
+ case DA9150_GPADC_CHAN_TJUNC_OVP:
+ *val = -144;
+ return IIO_VAL_INT;
+ default:
+ return -EINVAL;
+ }
+}
+
+static int da9150_gpadc_read_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ int *val, int *val2, long mask)
+{
+ struct da9150_gpadc *gpadc = iio_priv(indio_dev);
+
+ if ((chan->channel < DA9150_GPADC_CHAN_GPIOA) ||
+ (chan->channel > DA9150_GPADC_CHAN_TJUNC_OVP))
+ return -EINVAL;
+
+ switch (mask) {
+ case IIO_CHAN_INFO_RAW:
+ case IIO_CHAN_INFO_PROCESSED:
+ return da9150_gpadc_read_processed(gpadc, chan->channel,
+ chan->address, val);
+ case IIO_CHAN_INFO_SCALE:
+ return da9150_gpadc_read_scale(chan->channel, val, val2);
+ case IIO_CHAN_INFO_OFFSET:
+ return da9150_gpadc_read_offset(chan->channel, val);
+ default:
+ return -EINVAL;
+ }
+}
+
+static const struct iio_info da9150_gpadc_info = {
+ .read_raw = &da9150_gpadc_read_raw,
+ .driver_module = THIS_MODULE,
+};
+
+#define DA9150_GPADC_CHANNEL(_id, _hw_id, _type, chan_info, \
+ _ext_name) { \
+ .type = _type, \
+ .indexed = 1, \
+ .channel = DA9150_GPADC_CHAN_##_id, \
+ .address = DA9150_GPADC_HW_CHAN_##_hw_id, \
+ .info_mask_separate = chan_info, \
+ .extend_name = _ext_name, \
+ .datasheet_name = #_id, \
+}
+
+#define DA9150_GPADC_CHANNEL_RAW(_id, _hw_id, _type, _ext_name) \
+ DA9150_GPADC_CHANNEL(_id, _hw_id, _type, \
+ BIT(IIO_CHAN_INFO_RAW), _ext_name)
+
+#define DA9150_GPADC_CHANNEL_SCALED(_id, _hw_id, _type, _ext_name) \
+ DA9150_GPADC_CHANNEL(_id, _hw_id, _type, \
+ BIT(IIO_CHAN_INFO_RAW) | \
+ BIT(IIO_CHAN_INFO_SCALE) | \
+ BIT(IIO_CHAN_INFO_OFFSET), \
+ _ext_name)
+
+#define DA9150_GPADC_CHANNEL_PROCESSED(_id, _hw_id, _type, _ext_name) \
+ DA9150_GPADC_CHANNEL(_id, _hw_id, _type, \
+ BIT(IIO_CHAN_INFO_PROCESSED), _ext_name)
+
+/* Supported channels */
+static const struct iio_chan_spec da9150_gpadc_channels[] = {
+ DA9150_GPADC_CHANNEL_PROCESSED(GPIOA, GPIOA_6V, IIO_VOLTAGE, NULL),
+ DA9150_GPADC_CHANNEL_PROCESSED(GPIOB, GPIOB_6V, IIO_VOLTAGE, NULL),
+ DA9150_GPADC_CHANNEL_PROCESSED(GPIOC, GPIOC_6V, IIO_VOLTAGE, NULL),
+ DA9150_GPADC_CHANNEL_PROCESSED(GPIOD, GPIOD_6V, IIO_VOLTAGE, NULL),
+ DA9150_GPADC_CHANNEL_PROCESSED(IBUS, IBUS_SENSE, IIO_CURRENT, "ibus"),
+ DA9150_GPADC_CHANNEL_PROCESSED(VBUS, VBUS_DIV_, IIO_VOLTAGE, "vbus"),
+ DA9150_GPADC_CHANNEL_PROCESSED(VSYS, VSYS, IIO_VOLTAGE, "vsys"),
+ DA9150_GPADC_CHANNEL_SCALED(VBAT, VBAT, IIO_VOLTAGE, "vbat"),
+ DA9150_GPADC_CHANNEL_RAW(TBAT, TBAT, IIO_VOLTAGE, "tbat"),
+ DA9150_GPADC_CHANNEL_SCALED(TJUNC_CORE, TJUNC_CORE, IIO_TEMP,
+ "tjunc_core"),
+ DA9150_GPADC_CHANNEL_SCALED(TJUNC_OVP, TJUNC_OVP, IIO_TEMP,
+ "tjunc_ovp"),
+};
+
+/* Default maps used by da9150-charger */
+static struct iio_map da9150_gpadc_default_maps[] = {
+ {
+ .consumer_dev_name = "da9150-charger",
+ .consumer_channel = "CHAN_IBUS",
+ .adc_channel_label = "IBUS",
+ },
+ {
+ .consumer_dev_name = "da9150-charger",
+ .consumer_channel = "CHAN_VBUS",
+ .adc_channel_label = "VBUS",
+ },
+ {
+ .consumer_dev_name = "da9150-charger",
+ .consumer_channel = "CHAN_TJUNC",
+ .adc_channel_label = "TJUNC_CORE",
+ },
+ {
+ .consumer_dev_name = "da9150-charger",
+ .consumer_channel = "CHAN_VBAT",
+ .adc_channel_label = "VBAT",
+ },
+ {},
+};
+
+static int da9150_gpadc_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct da9150 *da9150 = dev_get_drvdata(dev->parent);
+ struct da9150_gpadc *gpadc;
+ struct iio_dev *indio_dev;
+ int irq, ret;
+
+ indio_dev = devm_iio_device_alloc(dev, sizeof(*gpadc));
+ if (!indio_dev) {
+ dev_err(&pdev->dev, "Failed to allocate IIO device\n");
+ return -ENOMEM;
+ }
+ gpadc = iio_priv(indio_dev);
+
+ platform_set_drvdata(pdev, indio_dev);
+ gpadc->da9150 = da9150;
+ gpadc->dev = dev;
+ mutex_init(&gpadc->lock);
+ init_completion(&gpadc->complete);
+
+ irq = platform_get_irq_byname(pdev, "GPADC");
+ if (irq < 0) {
+ dev_err(dev, "Failed to get IRQ: %d\n", irq);
+ return irq;
+ }
+
+ ret = devm_request_threaded_irq(dev, irq, NULL, da9150_gpadc_irq,
+ IRQF_ONESHOT, "GPADC", gpadc);
+ if (ret) {
+ dev_err(dev, "Failed to request IRQ %d: %d\n", irq, ret);
+ return ret;
+ }
+
+ ret = iio_map_array_register(indio_dev, da9150_gpadc_default_maps);
+ if (ret) {
+ dev_err(dev, "Failed to register IIO maps: %d\n", ret);
+ return ret;
+ }
+
+ indio_dev->name = dev_name(dev);
+ indio_dev->dev.parent = dev;
+ indio_dev->dev.of_node = pdev->dev.of_node;
+ indio_dev->info = &da9150_gpadc_info;
+ indio_dev->modes = INDIO_DIRECT_MODE;
+ indio_dev->channels = da9150_gpadc_channels;
+ indio_dev->num_channels = ARRAY_SIZE(da9150_gpadc_channels);
+
+ ret = iio_device_register(indio_dev);
+ if (ret) {
+ dev_err(dev, "Failed to register IIO device: %d\n", ret);
+ goto iio_map_unreg;
+ }
+
+ return 0;
+
+iio_map_unreg:
+ iio_map_array_unregister(indio_dev);
+
+ return ret;
+}
+
+static int da9150_gpadc_remove(struct platform_device *pdev)
+{
+ struct iio_dev *indio_dev = platform_get_drvdata(pdev);
+
+ iio_device_unregister(indio_dev);
+ iio_map_array_unregister(indio_dev);
+
+ return 0;
+}
+
+static struct platform_driver da9150_gpadc_driver = {
+ .driver = {
+ .name = "da9150-gpadc",
+ },
+ .probe = da9150_gpadc_probe,
+ .remove = da9150_gpadc_remove,
+};
+
+module_platform_driver(da9150_gpadc_driver);
+
+MODULE_DESCRIPTION("GPADC Driver for DA9150");
+MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>");
+MODULE_LICENSE("GPL");
indio_dev->num_channels * 2,
GFP_KERNEL);
if (st->buffer == NULL) {
- dev_err(&indio_dev->dev, "Can't allocate bufffer\n");
+ dev_err(&indio_dev->dev, "Can't allocate buffer\n");
return -ENOMEM;
}
static void vf610_adc_calibration(struct vf610_adc *info)
{
int adc_gc, hc_cfg;
- int timeout;
if (!info->adc_feature.calibration)
return;
adc_gc = readl(info->regs + VF610_REG_ADC_GC);
writel(adc_gc | VF610_ADC_CAL, info->regs + VF610_REG_ADC_GC);
- timeout = wait_for_completion_timeout
- (&info->completion, VF610_ADC_TIMEOUT);
- if (timeout == 0)
+ if (!wait_for_completion_timeout(&info->completion, VF610_ADC_TIMEOUT))
dev_err(info->dev, "Timeout for adc calibration\n");
adc_gc = readl(info->regs + VF610_REG_ADC_GS);
int ret;
ret = sensor_hub_get_feature(st->hsdev,
- st->poll.report_id,
- st->poll.index, &value);
+ st->poll.report_id,
+ st->poll.index, sizeof(value), &value);
if (ret < 0 || value < 0) {
return -EINVAL;
int ret;
ret = sensor_hub_get_feature(st->hsdev,
- st->poll.report_id,
- st->poll.index, &value);
+ st->poll.report_id,
+ st->poll.index, sizeof(value), &value);
if (ret < 0 || value < 0) {
*val1 = *val2 = 0;
return -EINVAL;
else
value = 0;
}
- ret = sensor_hub_set_feature(st->hsdev,
- st->poll.report_id,
- st->poll.index, value);
+ ret = sensor_hub_set_feature(st->hsdev, st->poll.report_id,
+ st->poll.index, sizeof(value), &value);
if (ret < 0 || value < 0)
ret = -EINVAL;
int ret;
ret = sensor_hub_get_feature(st->hsdev,
- st->sensitivity.report_id,
- st->sensitivity.index, &value);
+ st->sensitivity.report_id,
+ st->sensitivity.index, sizeof(value),
+ &value);
if (ret < 0 || value < 0) {
*val1 = *val2 = 0;
return -EINVAL;
value = convert_to_vtf_format(st->sensitivity.size,
st->sensitivity.unit_expo,
val1, val2);
- ret = sensor_hub_set_feature(st->hsdev,
- st->sensitivity.report_id,
- st->sensitivity.index, value);
+ ret = sensor_hub_set_feature(st->hsdev, st->sensitivity.report_id,
+ st->sensitivity.index, sizeof(value),
+ &value);
if (ret < 0 || value < 0)
ret = -EINVAL;
if (state_val >= 0) {
state_val += st->power_state.logical_minimum;
sensor_hub_set_feature(st->hsdev, st->power_state.report_id,
- st->power_state.index,
- (s32)state_val);
+ st->power_state.index, sizeof(state_val),
+ &state_val);
}
if (report_val >= 0) {
report_val += st->report_state.logical_minimum;
sensor_hub_set_feature(st->hsdev, st->report_state.report_id,
- st->report_state.index,
- (s32)report_val);
+ st->report_state.index,
+ sizeof(report_val),
+ &report_val);
}
sensor_hub_get_feature(st->hsdev, st->power_state.report_id,
- st->power_state.index,
- &state_val);
+ st->power_state.index,
+ sizeof(state_val), &state_val);
if (state && poll_value)
msleep_interruptible(poll_value * 2);
}
#ifdef CONFIG_OF
-static struct of_device_id ssp_of_match[] = {
+static const struct of_device_id ssp_of_match[] = {
{
.compatible = "samsung,sensorhub-rinato",
.data = &ssp_rinato_info,
ad7303.
config MAX517
- tristate "Maxim MAX517/518/519 DAC driver"
+ tristate "Maxim MAX517/518/519/520/521 DAC driver"
depends on I2C
help
- If you say yes here you get support for the Maxim chips MAX517,
- MAX518 and MAX519 (I2C 8-Bit DACs with rail-to-rail outputs).
+ If you say yes here you get support for the following Maxim chips
+ (I2C 8-Bit DACs with rail-to-rail outputs):
+ MAX517 - Single channel, single reference
+ MAX518 - Dual channel, ref=Vdd
+ MAX519 - Dual channel, dual reference
+ MAX520 - Quad channel, quad reference
+ MAX521 - Octal channel, independent ref for ch0-3, shared ref for ch4-7
This driver can also be built as a module. If so, the module
will be called max517.
ID_MAX517,
ID_MAX518,
ID_MAX519,
+ ID_MAX520,
+ ID_MAX521,
};
struct max517_data {
struct i2c_client *client;
- unsigned short vref_mv[2];
+ unsigned short vref_mv[8];
};
/*
static const struct iio_chan_spec max517_channels[] = {
MAX517_CHANNEL(0),
- MAX517_CHANNEL(1)
+ MAX517_CHANNEL(1),
+ MAX517_CHANNEL(2),
+ MAX517_CHANNEL(3),
+ MAX517_CHANNEL(4),
+ MAX517_CHANNEL(5),
+ MAX517_CHANNEL(6),
+ MAX517_CHANNEL(7),
};
static int max517_probe(struct i2c_client *client,
struct max517_data *data;
struct iio_dev *indio_dev;
struct max517_platform_data *platform_data = client->dev.platform_data;
+ int chan;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
/* establish that the iio_dev is a child of the i2c device */
indio_dev->dev.parent = &client->dev;
- /* reduced channel set for MAX517 */
- if (id->driver_data == ID_MAX517)
- indio_dev->num_channels = 1;
- else
+ switch (id->driver_data) {
+ case ID_MAX521:
+ indio_dev->num_channels = 8;
+ break;
+ case ID_MAX520:
+ indio_dev->num_channels = 4;
+ break;
+ case ID_MAX519:
+ case ID_MAX518:
indio_dev->num_channels = 2;
+ break;
+ default: /* single channel for MAX517 */
+ indio_dev->num_channels = 1;
+ break;
+ }
indio_dev->channels = max517_channels;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &max517_info;
* Reference voltage on MAX518 and default is 5V, else take vref_mv
* from platform_data
*/
- if (id->driver_data == ID_MAX518 || !platform_data) {
- data->vref_mv[0] = data->vref_mv[1] = 5000; /* mV */
- } else {
- data->vref_mv[0] = platform_data->vref_mv[0];
- data->vref_mv[1] = platform_data->vref_mv[1];
+ for (chan = 0; chan < indio_dev->num_channels; chan++) {
+ if (id->driver_data == ID_MAX518 || !platform_data)
+ data->vref_mv[chan] = 5000; /* mV */
+ else
+ data->vref_mv[chan] = platform_data->vref_mv[chan];
}
return iio_device_register(indio_dev);
{ "max517", ID_MAX517 },
{ "max518", ID_MAX518 },
{ "max519", ID_MAX519 },
+ { "max520", ID_MAX520 },
+ { "max521", ID_MAX521 },
{ }
};
MODULE_DEVICE_TABLE(i2c, max517_id);
module_i2c_driver(max517_driver);
MODULE_AUTHOR("Roland Stigge <stigge@antcom.de>");
-MODULE_DESCRIPTION("MAX517/MAX518/MAX519 8-bit DAC");
+MODULE_DESCRIPTION("MAX517/518/519/520/521 8-bit DAC");
MODULE_LICENSE("GPL");
dev = &client->dev;
/* data ready gpio interrupt pin */
- gpio = devm_gpiod_get_index(dev, BMG160_GPIO_NAME, 0);
+ gpio = devm_gpiod_get_index(dev, BMG160_GPIO_NAME, 0, GPIOD_IN);
if (IS_ERR(gpio)) {
dev_err(dev, "acpi gpio get index failed\n");
return PTR_ERR(gpio);
}
- ret = gpiod_direction_input(gpio);
- if (ret)
- return ret;
-
ret = gpiod_to_irq(gpio);
dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
*val = sensor_hub_input_attr_get_raw_value(
gyro_state->common_attributes.hsdev,
HID_USAGE_SENSOR_GYRO_3D, address,
- report_id);
+ report_id,
+ SENSOR_HUB_SYNC);
else {
*val = 0;
hid_sensor_power_state(&gyro_state->common_attributes,
int ret;
u8 val;
+ ret = itg3200_reset(indio_dev);
+ if (ret)
+ goto err_ret;
+
ret = itg3200_read_reg_8(indio_dev, ITG3200_REG_ADDRESS, &val);
if (ret)
goto err_ret;
goto err_ret;
}
- ret = itg3200_reset(indio_dev);
- if (ret)
- goto err_ret;
-
ret = itg3200_enable_full_scale(indio_dev);
err_ret:
return ret;
return 0;
}
+static int __maybe_unused itg3200_suspend(struct device *dev)
+{
+ struct iio_dev *indio_dev = dev_get_drvdata(dev);
+ struct itg3200 *st = iio_priv(indio_dev);
+
+ dev_dbg(&st->i2c->dev, "suspend device");
+
+ return itg3200_write_reg_8(indio_dev, ITG3200_REG_POWER_MANAGEMENT,
+ ITG3200_SLEEP);
+}
+
+static int __maybe_unused itg3200_resume(struct device *dev)
+{
+ struct iio_dev *indio_dev = dev_get_drvdata(dev);
+
+ return itg3200_initial_setup(indio_dev);
+}
+
+static SIMPLE_DEV_PM_OPS(itg3200_pm_ops, itg3200_suspend, itg3200_resume);
+
static const struct i2c_device_id itg3200_id[] = {
{ "itg3200", 0 },
{ }
.driver = {
.owner = THIS_MODULE,
.name = "itg3200",
+ .pm = &itg3200_pm_ops,
},
.id_table = itg3200_id,
.probe = itg3200_probe,
#define ST_GYRO_2_DRDY_IRQ_INT2_MASK 0x08
#define ST_GYRO_2_MULTIREAD_BIT true
+/* CUSTOM VALUES FOR SENSOR 3 */
+#define ST_GYRO_3_WAI_EXP 0xd7
+#define ST_GYRO_3_ODR_ADDR 0x20
+#define ST_GYRO_3_ODR_MASK 0xc0
+#define ST_GYRO_3_ODR_AVL_95HZ_VAL 0x00
+#define ST_GYRO_3_ODR_AVL_190HZ_VAL 0x01
+#define ST_GYRO_3_ODR_AVL_380HZ_VAL 0x02
+#define ST_GYRO_3_ODR_AVL_760HZ_VAL 0x03
+#define ST_GYRO_3_PW_ADDR 0x20
+#define ST_GYRO_3_PW_MASK 0x08
+#define ST_GYRO_3_FS_ADDR 0x23
+#define ST_GYRO_3_FS_MASK 0x30
+#define ST_GYRO_3_FS_AVL_250_VAL 0x00
+#define ST_GYRO_3_FS_AVL_500_VAL 0x01
+#define ST_GYRO_3_FS_AVL_2000_VAL 0x02
+#define ST_GYRO_3_FS_AVL_250_GAIN IIO_DEGREE_TO_RAD(8750)
+#define ST_GYRO_3_FS_AVL_500_GAIN IIO_DEGREE_TO_RAD(17500)
+#define ST_GYRO_3_FS_AVL_2000_GAIN IIO_DEGREE_TO_RAD(70000)
+#define ST_GYRO_3_BDU_ADDR 0x23
+#define ST_GYRO_3_BDU_MASK 0x80
+#define ST_GYRO_3_DRDY_IRQ_ADDR 0x22
+#define ST_GYRO_3_DRDY_IRQ_INT2_MASK 0x08
+#define ST_GYRO_3_MULTIREAD_BIT true
+
+
static const struct iio_chan_spec st_gyro_16bit_channels[] = {
ST_SENSORS_LSM_CHANNELS(IIO_ANGL_VEL,
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
.multi_read_bit = ST_GYRO_2_MULTIREAD_BIT,
.bootime = 2,
},
+ {
+ .wai = ST_GYRO_3_WAI_EXP,
+ .sensors_supported = {
+ [0] = L3GD20_GYRO_DEV_NAME,
+ },
+ .ch = (struct iio_chan_spec *)st_gyro_16bit_channels,
+ .odr = {
+ .addr = ST_GYRO_3_ODR_ADDR,
+ .mask = ST_GYRO_3_ODR_MASK,
+ .odr_avl = {
+ { 95, ST_GYRO_3_ODR_AVL_95HZ_VAL, },
+ { 190, ST_GYRO_3_ODR_AVL_190HZ_VAL, },
+ { 380, ST_GYRO_3_ODR_AVL_380HZ_VAL, },
+ { 760, ST_GYRO_3_ODR_AVL_760HZ_VAL, },
+ },
+ },
+ .pw = {
+ .addr = ST_GYRO_3_PW_ADDR,
+ .mask = ST_GYRO_3_PW_MASK,
+ .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
+ .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
+ },
+ .enable_axis = {
+ .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
+ .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
+ },
+ .fs = {
+ .addr = ST_GYRO_3_FS_ADDR,
+ .mask = ST_GYRO_3_FS_MASK,
+ .fs_avl = {
+ [0] = {
+ .num = ST_GYRO_FS_AVL_250DPS,
+ .value = ST_GYRO_3_FS_AVL_250_VAL,
+ .gain = ST_GYRO_3_FS_AVL_250_GAIN,
+ },
+ [1] = {
+ .num = ST_GYRO_FS_AVL_500DPS,
+ .value = ST_GYRO_3_FS_AVL_500_VAL,
+ .gain = ST_GYRO_3_FS_AVL_500_GAIN,
+ },
+ [2] = {
+ .num = ST_GYRO_FS_AVL_2000DPS,
+ .value = ST_GYRO_3_FS_AVL_2000_VAL,
+ .gain = ST_GYRO_3_FS_AVL_2000_GAIN,
+ },
+ },
+ },
+ .bdu = {
+ .addr = ST_GYRO_3_BDU_ADDR,
+ .mask = ST_GYRO_3_BDU_MASK,
+ },
+ .drdy_irq = {
+ .addr = ST_GYRO_3_DRDY_IRQ_ADDR,
+ .mask_int2 = ST_GYRO_3_DRDY_IRQ_INT2_MASK,
+ },
+ .multi_read_bit = ST_GYRO_3_MULTIREAD_BIT,
+ .bootime = 2,
+ },
};
static int st_gyro_read_raw(struct iio_dev *indio_dev,
#
obj-$(CONFIG_INV_MPU6050_IIO) += inv-mpu6050.o
-inv-mpu6050-objs := inv_mpu_core.o inv_mpu_ring.o inv_mpu_trigger.o
+inv-mpu6050-objs := inv_mpu_core.o inv_mpu_ring.o inv_mpu_trigger.o inv_mpu_acpi.o
--- /dev/null
+/*
+ * inv_mpu_acpi: ACPI processing for creating client devices
+ * Copyright (c) 2015, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#ifdef CONFIG_ACPI
+
+#include <linux/kernel.h>
+#include <linux/i2c.h>
+#include <linux/dmi.h>
+#include <linux/acpi.h>
+#include "inv_mpu_iio.h"
+
+enum inv_mpu_product_name {
+ INV_MPU_NOT_MATCHED,
+ INV_MPU_ASUS_T100TA,
+};
+
+static enum inv_mpu_product_name matched_product_name;
+
+static int __init asus_t100_matched(const struct dmi_system_id *d)
+{
+ matched_product_name = INV_MPU_ASUS_T100TA;
+
+ return 0;
+}
+
+static const struct dmi_system_id inv_mpu_dev_list[] = {
+ {
+ .callback = asus_t100_matched,
+ .ident = "Asus Transformer Book T100",
+ .matches = {
+ DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC"),
+ DMI_MATCH(DMI_PRODUCT_NAME, "T100TA"),
+ DMI_MATCH(DMI_PRODUCT_VERSION, "1.0"),
+ },
+ },
+ /* Add more matching tables here..*/
+ {}
+};
+
+static int asus_acpi_get_sensor_info(struct acpi_device *adev,
+ struct i2c_client *client,
+ struct i2c_board_info *info)
+{
+ struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
+ int i;
+ acpi_status status;
+ union acpi_object *cpm;
+
+ status = acpi_evaluate_object(adev->handle, "CNF0", NULL, &buffer);
+ if (ACPI_FAILURE(status))
+ return -ENODEV;
+
+ cpm = buffer.pointer;
+ for (i = 0; i < cpm->package.count; ++i) {
+ union acpi_object *elem;
+ int j;
+
+ elem = &(cpm->package.elements[i]);
+ for (j = 0; j < elem->package.count; ++j) {
+ union acpi_object *sub_elem;
+
+ sub_elem = &(elem->package.elements[j]);
+ if (sub_elem->type == ACPI_TYPE_STRING)
+ strlcpy(info->type, sub_elem->string.pointer,
+ sizeof(info->type));
+ else if (sub_elem->type == ACPI_TYPE_INTEGER) {
+ if (sub_elem->integer.value != client->addr) {
+ info->addr = sub_elem->integer.value;
+ break; /* Not a MPU6500 primary */
+ }
+ }
+ }
+ }
+
+ kfree(buffer.pointer);
+
+ return cpm->package.count;
+}
+
+static int acpi_i2c_check_resource(struct acpi_resource *ares, void *data)
+{
+ u32 *addr = data;
+
+ if (ares->type == ACPI_RESOURCE_TYPE_SERIAL_BUS) {
+ struct acpi_resource_i2c_serialbus *sb;
+
+ sb = &ares->data.i2c_serial_bus;
+ if (sb->type == ACPI_RESOURCE_SERIAL_TYPE_I2C) {
+ if (*addr)
+ *addr |= (sb->slave_address << 16);
+ else
+ *addr = sb->slave_address;
+ }
+ }
+
+ /* Tell the ACPI core that we already copied this address */
+ return 1;
+}
+
+static int inv_mpu_process_acpi_config(struct i2c_client *client,
+ unsigned short *primary_addr,
+ unsigned short *secondary_addr)
+{
+ const struct acpi_device_id *id;
+ struct acpi_device *adev;
+ u32 i2c_addr = 0;
+ LIST_HEAD(resources);
+ int ret;
+
+ id = acpi_match_device(client->dev.driver->acpi_match_table,
+ &client->dev);
+ if (!id)
+ return -ENODEV;
+
+ adev = ACPI_COMPANION(&client->dev);
+ if (!adev)
+ return -ENODEV;
+
+ ret = acpi_dev_get_resources(adev, &resources,
+ acpi_i2c_check_resource, &i2c_addr);
+ if (ret < 0)
+ return ret;
+
+ acpi_dev_free_resource_list(&resources);
+ *primary_addr = i2c_addr & 0x0000ffff;
+ *secondary_addr = (i2c_addr & 0xffff0000) >> 16;
+
+ return 0;
+}
+
+int inv_mpu_acpi_create_mux_client(struct inv_mpu6050_state *st)
+{
+
+ st->mux_client = NULL;
+ if (ACPI_HANDLE(&st->client->dev)) {
+ struct i2c_board_info info;
+ struct acpi_device *adev;
+ int ret = -1;
+
+ adev = ACPI_COMPANION(&st->client->dev);
+ memset(&info, 0, sizeof(info));
+
+ dmi_check_system(inv_mpu_dev_list);
+ switch (matched_product_name) {
+ case INV_MPU_ASUS_T100TA:
+ ret = asus_acpi_get_sensor_info(adev, st->client,
+ &info);
+ break;
+ /* Add more matched product processing here */
+ default:
+ break;
+ }
+
+ if (ret < 0) {
+ /* No matching DMI, so create device on INV6XX type */
+ unsigned short primary, secondary;
+
+ ret = inv_mpu_process_acpi_config(st->client, &primary,
+ &secondary);
+ if (!ret && secondary) {
+ char *name;
+
+ info.addr = secondary;
+ strlcpy(info.type, dev_name(&adev->dev),
+ sizeof(info.type));
+ name = strchr(info.type, ':');
+ if (name)
+ *name = '\0';
+ strlcat(info.type, "-client",
+ sizeof(info.type));
+ } else
+ return 0; /* no secondary addr, which is OK */
+ }
+ st->mux_client = i2c_new_device(st->mux_adapter, &info);
+ if (!st->mux_client)
+ return -ENODEV;
+
+ }
+
+ return 0;
+}
+
+void inv_mpu_acpi_delete_mux_client(struct inv_mpu6050_state *st)
+{
+ if (st->mux_client)
+ i2c_unregister_device(st->mux_client);
+}
+#else
+
+#include "inv_mpu_iio.h"
+
+int inv_mpu_acpi_create_mux_client(struct inv_mpu6050_state *st)
+{
+ return 0;
+}
+
+void inv_mpu_acpi_delete_mux_client(struct inv_mpu6050_state *st)
+{
+}
+#endif
goto out_unreg_device;
}
+ result = inv_mpu_acpi_create_mux_client(st);
+ if (result)
+ goto out_del_mux;
+
return 0;
+out_del_mux:
+ i2c_del_mux_adapter(st->mux_adapter);
out_unreg_device:
iio_device_unregister(indio_dev);
out_remove_trigger:
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct inv_mpu6050_state *st = iio_priv(indio_dev);
+ inv_mpu_acpi_delete_mux_client(st);
i2c_del_mux_adapter(st->mux_adapter);
iio_device_unregister(indio_dev);
inv_mpu6050_remove_trigger(st);
spinlock_t time_stamp_lock;
struct i2c_client *client;
struct i2c_adapter *mux_adapter;
+ struct i2c_client *mux_client;
unsigned int powerup_count;
struct inv_mpu6050_platform_data plat_data;
DECLARE_KFIFO(timestamps, long long, TIMESTAMP_FIFO_SIZE);
int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask);
int inv_mpu6050_write_reg(struct inv_mpu6050_state *st, int reg, u8 val);
int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, bool power_on);
+int inv_mpu_acpi_create_mux_client(struct inv_mpu6050_state *st);
+void inv_mpu_acpi_delete_mux_client(struct inv_mpu6050_state *st);
static const struct {
int val;
int val2;
- u8 odr_bits;
-} kmx61_samp_freq_table[] = { {12, 500000, 0x00},
- {25, 0, 0x01},
- {50, 0, 0x02},
- {100, 0, 0x03},
- {200, 0, 0x04},
- {400, 0, 0x05},
- {800, 0, 0x06},
- {1600, 0, 0x07},
- {0, 781000, 0x08},
- {1, 563000, 0x09},
- {3, 125000, 0x0A},
- {6, 250000, 0x0B} };
+} kmx61_samp_freq_table[] = { {12, 500000},
+ {25, 0},
+ {50, 0},
+ {100, 0},
+ {200, 0},
+ {400, 0},
+ {800, 0},
+ {1600, 0},
+ {0, 781000},
+ {1, 563000},
+ {3, 125000},
+ {6, 250000} };
static const struct {
int val;
for (i = 0; i < ARRAY_SIZE(kmx61_samp_freq_table); i++)
if (val == kmx61_samp_freq_table[i].val &&
val2 == kmx61_samp_freq_table[i].val2)
- return kmx61_samp_freq_table[i].odr_bits;
+ return i;
return -EINVAL;
}
-static int kmx61_convert_bit_to_freq(u8 odr_bits, int *val, int *val2)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(kmx61_samp_freq_table); i++)
- if (odr_bits == kmx61_samp_freq_table[i].odr_bits) {
- *val = kmx61_samp_freq_table[i].val;
- *val2 = kmx61_samp_freq_table[i].val2;
- return 0;
- }
- return -EINVAL;
-}
-
-
static int kmx61_convert_wake_up_odr_to_bit(int val, int val2)
{
int i;
static int kmx61_get_odr(struct kmx61_data *data, int *val, int *val2,
u8 device)
-{ int i;
+{
u8 lodr_bits;
if (device & KMX61_ACC)
else
return -EINVAL;
- for (i = 0; i < ARRAY_SIZE(kmx61_samp_freq_table); i++)
- if (lodr_bits == kmx61_samp_freq_table[i].odr_bits) {
- *val = kmx61_samp_freq_table[i].val;
- *val2 = kmx61_samp_freq_table[i].val2;
- return 0;
- }
- return -EINVAL;
+ if (lodr_bits >= ARRAY_SIZE(kmx61_samp_freq_table))
+ return -EINVAL;
+
+ *val = kmx61_samp_freq_table[lodr_bits].val;
+ *val2 = kmx61_samp_freq_table[lodr_bits].val2;
+
+ return 0;
}
static int kmx61_set_range(struct kmx61_data *data, u8 range)
}
data->odr_bits = ret;
- /* set output data rate for wake up (motion detection) function */
- ret = kmx61_convert_bit_to_freq(data->odr_bits, &val, &val2);
+ /*
+ * set output data rate for wake up (motion detection) function
+ * to match data rate for accelerometer sampling
+ */
+ ret = kmx61_get_odr(data, &val, &val2, KMX61_ACC);
if (ret < 0)
return ret;
dev = &client->dev;
/* data ready gpio interrupt pin */
- gpio = devm_gpiod_get_index(dev, KMX61_GPIO_NAME, 0);
+ gpio = devm_gpiod_get_index(dev, KMX61_GPIO_NAME, 0, GPIOD_IN);
if (IS_ERR(gpio)) {
dev_err(dev, "acpi gpio get index failed\n");
return PTR_ERR(gpio);
}
- ret = gpiod_direction_input(gpio);
- if (ret)
- return ret;
-
ret = gpiod_to_irq(gpio);
dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
return !list_empty(&buf->buffer_list);
}
-static bool iio_buffer_data_available(struct iio_buffer *buf)
+static size_t iio_buffer_data_available(struct iio_buffer *buf)
{
return buf->access->data_available(buf);
}
+static int iio_buffer_flush_hwfifo(struct iio_dev *indio_dev,
+ struct iio_buffer *buf, size_t required)
+{
+ if (!indio_dev->info->hwfifo_flush_to_buffer)
+ return -ENODEV;
+
+ return indio_dev->info->hwfifo_flush_to_buffer(indio_dev, required);
+}
+
+static bool iio_buffer_ready(struct iio_dev *indio_dev, struct iio_buffer *buf,
+ size_t to_wait, int to_flush)
+{
+ size_t avail;
+ int flushed = 0;
+
+ /* wakeup if the device was unregistered */
+ if (!indio_dev->info)
+ return true;
+
+ /* drain the buffer if it was disabled */
+ if (!iio_buffer_is_active(buf)) {
+ to_wait = min_t(size_t, to_wait, 1);
+ to_flush = 0;
+ }
+
+ avail = iio_buffer_data_available(buf);
+
+ if (avail >= to_wait) {
+ /* force a flush for non-blocking reads */
+ if (!to_wait && !avail && to_flush)
+ iio_buffer_flush_hwfifo(indio_dev, buf, to_flush);
+ return true;
+ }
+
+ if (to_flush)
+ flushed = iio_buffer_flush_hwfifo(indio_dev, buf,
+ to_wait - avail);
+ if (flushed <= 0)
+ return false;
+
+ if (avail + flushed >= to_wait)
+ return true;
+
+ return false;
+}
+
/**
* iio_buffer_read_first_n_outer() - chrdev read for buffer access
*
{
struct iio_dev *indio_dev = filp->private_data;
struct iio_buffer *rb = indio_dev->buffer;
+ size_t datum_size;
+ size_t to_wait = 0;
+ size_t to_read;
int ret;
if (!indio_dev->info)
if (!rb || !rb->access->read_first_n)
return -EINVAL;
+ datum_size = rb->bytes_per_datum;
+
+ /*
+ * If datum_size is 0 there will never be anything to read from the
+ * buffer, so signal end of file now.
+ */
+ if (!datum_size)
+ return 0;
+
+ to_read = min_t(size_t, n / datum_size, rb->watermark);
+
+ if (!(filp->f_flags & O_NONBLOCK))
+ to_wait = to_read;
+
do {
- if (!iio_buffer_data_available(rb)) {
- if (filp->f_flags & O_NONBLOCK)
- return -EAGAIN;
+ ret = wait_event_interruptible(rb->pollq,
+ iio_buffer_ready(indio_dev, rb, to_wait, to_read));
+ if (ret)
+ return ret;
- ret = wait_event_interruptible(rb->pollq,
- iio_buffer_data_available(rb) ||
- indio_dev->info == NULL);
- if (ret)
- return ret;
- if (indio_dev->info == NULL)
- return -ENODEV;
- }
+ if (!indio_dev->info)
+ return -ENODEV;
ret = rb->access->read_first_n(rb, n, buf);
if (ret == 0 && (filp->f_flags & O_NONBLOCK))
return -ENODEV;
poll_wait(filp, &rb->pollq, wait);
- if (iio_buffer_data_available(rb))
+ if (iio_buffer_ready(indio_dev, rb, rb->watermark, 0))
return POLLIN | POLLRDNORM;
- /* need a way of knowing if there may be enough data... */
return 0;
}
INIT_LIST_HEAD(&buffer->buffer_list);
init_waitqueue_head(&buffer->pollq);
kref_init(&buffer->ref);
+ buffer->watermark = 1;
}
EXPORT_SYMBOL(iio_buffer_init);
buffer->access->set_length(buffer, val);
ret = 0;
}
+ if (ret)
+ goto out;
+ if (buffer->length && buffer->length < buffer->watermark)
+ buffer->watermark = buffer->length;
+out:
mutex_unlock(&indio_dev->mlock);
return ret ? ret : len;
static void iio_buffer_deactivate(struct iio_buffer *buffer)
{
list_del_init(&buffer->buffer_list);
+ wake_up_interruptible(&buffer->pollq);
iio_buffer_put(buffer);
}
}
}
/* Definitely possible for devices to support both of these. */
- if (indio_dev->modes & INDIO_BUFFER_TRIGGERED) {
- if (!indio_dev->trig) {
- printk(KERN_INFO "Buffer not started: no trigger\n");
- ret = -EINVAL;
- /* Can only occur on first buffer */
- goto error_run_postdisable;
- }
+ if ((indio_dev->modes & INDIO_BUFFER_TRIGGERED) && indio_dev->trig) {
indio_dev->currentmode = INDIO_BUFFER_TRIGGERED;
} else if (indio_dev->modes & INDIO_BUFFER_HARDWARE) {
indio_dev->currentmode = INDIO_BUFFER_HARDWARE;
} else if (indio_dev->modes & INDIO_BUFFER_SOFTWARE) {
indio_dev->currentmode = INDIO_BUFFER_SOFTWARE;
} else { /* Should never be reached */
+ /* Can only occur on first buffer */
+ if (indio_dev->modes & INDIO_BUFFER_TRIGGERED)
+ pr_info("Buffer not started: no trigger\n");
ret = -EINVAL;
goto error_run_postdisable;
}
static const char * const iio_scan_elements_group_name = "scan_elements";
+static ssize_t iio_buffer_show_watermark(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct iio_dev *indio_dev = dev_to_iio_dev(dev);
+ struct iio_buffer *buffer = indio_dev->buffer;
+
+ return sprintf(buf, "%u\n", buffer->watermark);
+}
+
+static ssize_t iio_buffer_store_watermark(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t len)
+{
+ struct iio_dev *indio_dev = dev_to_iio_dev(dev);
+ struct iio_buffer *buffer = indio_dev->buffer;
+ unsigned int val;
+ int ret;
+
+ ret = kstrtouint(buf, 10, &val);
+ if (ret)
+ return ret;
+ if (!val)
+ return -EINVAL;
+
+ mutex_lock(&indio_dev->mlock);
+
+ if (val > buffer->length) {
+ ret = -EINVAL;
+ goto out;
+ }
+
+ if (iio_buffer_is_active(indio_dev->buffer)) {
+ ret = -EBUSY;
+ goto out;
+ }
+
+ buffer->watermark = val;
+
+ if (indio_dev->info->hwfifo_set_watermark)
+ indio_dev->info->hwfifo_set_watermark(indio_dev, val);
+out:
+ mutex_unlock(&indio_dev->mlock);
+
+ return ret ? ret : len;
+}
+
static DEVICE_ATTR(length, S_IRUGO | S_IWUSR, iio_buffer_read_length,
iio_buffer_write_length);
static struct device_attribute dev_attr_length_ro = __ATTR(length,
S_IRUGO, iio_buffer_read_length, NULL);
static DEVICE_ATTR(enable, S_IRUGO | S_IWUSR,
iio_buffer_show_enable, iio_buffer_store_enable);
+static DEVICE_ATTR(watermark, S_IRUGO | S_IWUSR,
+ iio_buffer_show_watermark, iio_buffer_store_watermark);
+
+static struct attribute *iio_buffer_attrs[] = {
+ &dev_attr_length.attr,
+ &dev_attr_enable.attr,
+ &dev_attr_watermark.attr,
+};
int iio_buffer_alloc_sysfs_and_mask(struct iio_dev *indio_dev)
{
attrcount++;
}
- buffer->buffer_group.name = "buffer";
- buffer->buffer_group.attrs = kcalloc(attrcount + 3,
- sizeof(*buffer->buffer_group.attrs), GFP_KERNEL);
- if (!buffer->buffer_group.attrs)
+ attr = kcalloc(attrcount + ARRAY_SIZE(iio_buffer_attrs) + 1,
+ sizeof(struct attribute *), GFP_KERNEL);
+ if (!attr)
return -ENOMEM;
- if (buffer->access->set_length)
- buffer->buffer_group.attrs[0] = &dev_attr_length.attr;
- else
- buffer->buffer_group.attrs[0] = &dev_attr_length_ro.attr;
- buffer->buffer_group.attrs[1] = &dev_attr_enable.attr;
+ memcpy(attr, iio_buffer_attrs, sizeof(iio_buffer_attrs));
+ if (!buffer->access->set_length)
+ attr[0] = &dev_attr_length_ro.attr;
+
if (buffer->attrs)
- memcpy(&buffer->buffer_group.attrs[2], buffer->attrs,
- sizeof(*&buffer->buffer_group.attrs) * attrcount);
- buffer->buffer_group.attrs[attrcount+2] = NULL;
+ memcpy(&attr[ARRAY_SIZE(iio_buffer_attrs)], buffer->attrs,
+ sizeof(struct attribute *) * attrcount);
+
+ attr[attrcount + ARRAY_SIZE(iio_buffer_attrs)] = NULL;
+
+ buffer->buffer_group.name = "buffer";
+ buffer->buffer_group.attrs = attr;
indio_dev->groups[indio_dev->groupcounter++] = &buffer->buffer_group;
static int iio_push_to_buffer(struct iio_buffer *buffer, const void *data)
{
const void *dataout = iio_demux(buffer, data);
+ int ret;
- return buffer->access->store_to(buffer, dataout);
+ ret = buffer->access->store_to(buffer, dataout);
+ if (ret)
+ return ret;
+
+ /*
+ * We can't just test for watermark to decide if we wake the poll queue
+ * because read may request less samples than the watermark.
+ */
+ wake_up_interruptible_poll(&buffer->pollq, POLLIN | POLLRDNORM);
+ return 0;
}
static void iio_buffer_demux_free(struct iio_buffer *buffer)
ret = kfifo_in(&kf->kf, data, 1);
if (ret != 1)
return -EBUSY;
-
- wake_up_interruptible_poll(&r->pollq, POLLIN | POLLRDNORM);
-
return 0;
}
return copied;
}
-static bool iio_kfifo_buf_data_available(struct iio_buffer *r)
+static size_t iio_kfifo_buf_data_available(struct iio_buffer *r)
{
struct iio_kfifo *kf = iio_to_kfifo(r);
- bool empty;
+ size_t samples;
mutex_lock(&kf->user_lock);
- empty = kfifo_is_empty(&kf->kf);
+ samples = kfifo_len(&kf->kf);
mutex_unlock(&kf->user_lock);
- return !empty;
+ return samples;
}
static void iio_kfifo_buffer_release(struct iio_buffer *buffer)
To compile this driver as a module, choose M here:
the module will be called cm3232.
+config CM3323
+ depends on I2C
+ tristate "Capella CM3323 color light sensor"
+ help
+ Say Y here if you want to build a driver for Capela CM3323
+ color sensor.
+
+ To compile this driver as a module, choose M here: the module will
+ be called cm3323.
+
config CM36651
depends on I2C
tristate "CM36651 driver"
obj-$(CONFIG_APDS9300) += apds9300.o
obj-$(CONFIG_CM32181) += cm32181.o
obj-$(CONFIG_CM3232) += cm3232.o
+obj-$(CONFIG_CM3323) += cm3323.o
obj-$(CONFIG_CM36651) += cm36651.o
obj-$(CONFIG_GP2AP020A00F) += gp2ap020a00f.o
obj-$(CONFIG_HID_SENSOR_ALS) += hid-sensor-als.o
{}
};
+#ifdef CONFIG_PM_SLEEP
+static int cm3232_suspend(struct device *dev)
+{
+ struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
+ struct cm3232_chip *chip = iio_priv(indio_dev);
+ struct i2c_client *client = chip->client;
+ int ret;
+
+ chip->regs_cmd |= CM3232_CMD_ALS_DISABLE;
+ ret = i2c_smbus_write_byte_data(client, CM3232_REG_ADDR_CMD,
+ chip->regs_cmd);
+
+ return ret;
+}
+
+static int cm3232_resume(struct device *dev)
+{
+ struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
+ struct cm3232_chip *chip = iio_priv(indio_dev);
+ struct i2c_client *client = chip->client;
+ int ret;
+
+ chip->regs_cmd &= ~CM3232_CMD_ALS_DISABLE;
+ ret = i2c_smbus_write_byte_data(client, CM3232_REG_ADDR_CMD,
+ chip->regs_cmd | CM3232_CMD_ALS_RESET);
+
+ return ret;
+}
+
+static const struct dev_pm_ops cm3232_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(cm3232_suspend, cm3232_resume)};
+#endif
+
MODULE_DEVICE_TABLE(i2c, cm3232_id);
static const struct of_device_id cm3232_of_match[] = {
.name = "cm3232",
.owner = THIS_MODULE,
.of_match_table = of_match_ptr(cm3232_of_match),
+#ifdef CONFIG_PM_SLEEP
+ .pm = &cm3232_pm_ops,
+#endif
},
.id_table = cm3232_id,
.probe = cm3232_probe,
--- /dev/null
+/*
+ * CM3323 - Capella Color Light Sensor
+ *
+ * Copyright (c) 2015, Intel Corporation.
+ *
+ * This file is subject to the terms and conditions of version 2 of
+ * the GNU General Public License. See the file COPYING in the main
+ * directory of this archive for more details.
+ *
+ * IIO driver for CM3323 (7-bit I2C slave address 0x10)
+ *
+ * TODO: calibscale to correct the lens factor
+ */
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/mutex.h>
+
+#include <linux/iio/iio.h>
+#include <linux/iio/sysfs.h>
+
+#define CM3323_DRV_NAME "cm3323"
+
+#define CM3323_CMD_CONF 0x00
+#define CM3323_CMD_RED_DATA 0x08
+#define CM3323_CMD_GREEN_DATA 0x09
+#define CM3323_CMD_BLUE_DATA 0x0A
+#define CM3323_CMD_CLEAR_DATA 0x0B
+
+#define CM3323_CONF_SD_BIT BIT(0) /* sensor disable */
+#define CM3323_CONF_AF_BIT BIT(1) /* auto/manual force mode */
+#define CM3323_CONF_IT_MASK (BIT(4) | BIT(5) | BIT(6))
+#define CM3323_CONF_IT_SHIFT 4
+
+#define CM3323_INT_TIME_AVAILABLE "0.04 0.08 0.16 0.32 0.64 1.28"
+
+static const struct {
+ int val;
+ int val2;
+} cm3323_int_time[] = {
+ {0, 40000}, /* 40 ms */
+ {0, 80000}, /* 80 ms */
+ {0, 160000}, /* 160 ms */
+ {0, 320000}, /* 320 ms */
+ {0, 640000}, /* 640 ms */
+ {1, 280000}, /* 1280 ms */
+};
+
+struct cm3323_data {
+ struct i2c_client *client;
+ u16 reg_conf;
+ struct mutex mutex;
+};
+
+#define CM3323_COLOR_CHANNEL(_color, _addr) { \
+ .type = IIO_INTENSITY, \
+ .modified = 1, \
+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
+ .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME), \
+ .channel2 = IIO_MOD_LIGHT_##_color, \
+ .address = _addr, \
+}
+
+static const struct iio_chan_spec cm3323_channels[] = {
+ CM3323_COLOR_CHANNEL(RED, CM3323_CMD_RED_DATA),
+ CM3323_COLOR_CHANNEL(GREEN, CM3323_CMD_GREEN_DATA),
+ CM3323_COLOR_CHANNEL(BLUE, CM3323_CMD_BLUE_DATA),
+ CM3323_COLOR_CHANNEL(CLEAR, CM3323_CMD_CLEAR_DATA),
+};
+
+static IIO_CONST_ATTR_INT_TIME_AVAIL(CM3323_INT_TIME_AVAILABLE);
+
+static struct attribute *cm3323_attributes[] = {
+ &iio_const_attr_integration_time_available.dev_attr.attr,
+ NULL
+};
+
+static const struct attribute_group cm3323_attribute_group = {
+ .attrs = cm3323_attributes,
+};
+
+static int cm3323_init(struct iio_dev *indio_dev)
+{
+ int ret;
+ struct cm3323_data *data = iio_priv(indio_dev);
+
+ ret = i2c_smbus_read_word_data(data->client, CM3323_CMD_CONF);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error reading reg_conf\n");
+ return ret;
+ }
+
+ /* enable sensor and set auto force mode */
+ ret &= ~(CM3323_CONF_SD_BIT | CM3323_CONF_AF_BIT);
+
+ ret = i2c_smbus_write_word_data(data->client, CM3323_CMD_CONF, ret);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error writing reg_conf\n");
+ return ret;
+ }
+
+ data->reg_conf = ret;
+
+ return 0;
+}
+
+static void cm3323_disable(struct iio_dev *indio_dev)
+{
+ int ret;
+ struct cm3323_data *data = iio_priv(indio_dev);
+
+ ret = i2c_smbus_write_word_data(data->client, CM3323_CMD_CONF,
+ CM3323_CONF_SD_BIT);
+ if (ret < 0)
+ dev_err(&data->client->dev, "Error writing reg_conf\n");
+}
+
+static int cm3323_set_it_bits(struct cm3323_data *data, int val, int val2)
+{
+ int i, ret;
+ u16 reg_conf;
+
+ for (i = 0; i < ARRAY_SIZE(cm3323_int_time); i++) {
+ if (val == cm3323_int_time[i].val &&
+ val2 == cm3323_int_time[i].val2) {
+ reg_conf = data->reg_conf;
+ reg_conf |= i << CM3323_CONF_IT_SHIFT;
+
+ ret = i2c_smbus_write_word_data(data->client,
+ CM3323_CMD_CONF,
+ reg_conf);
+ if (ret < 0)
+ return ret;
+
+ data->reg_conf = reg_conf;
+ return 0;
+ }
+ }
+ return -EINVAL;
+}
+
+static int cm3323_get_it_bits(struct cm3323_data *data)
+{
+ int bits;
+
+ bits = (data->reg_conf & CM3323_CONF_IT_MASK) >>
+ CM3323_CONF_IT_SHIFT;
+
+ if (bits >= ARRAY_SIZE(cm3323_int_time))
+ return -EINVAL;
+ return bits;
+}
+
+static int cm3323_read_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan, int *val,
+ int *val2, long mask)
+{
+ int i, ret;
+ struct cm3323_data *data = iio_priv(indio_dev);
+
+ switch (mask) {
+ case IIO_CHAN_INFO_RAW:
+ mutex_lock(&data->mutex);
+ ret = i2c_smbus_read_word_data(data->client, chan->address);
+ if (ret < 0) {
+ mutex_unlock(&data->mutex);
+ return ret;
+ }
+ *val = ret;
+ mutex_unlock(&data->mutex);
+
+ return IIO_VAL_INT;
+ case IIO_CHAN_INFO_INT_TIME:
+ mutex_lock(&data->mutex);
+ i = cm3323_get_it_bits(data);
+ if (i < 0) {
+ mutex_unlock(&data->mutex);
+ return -EINVAL;
+ }
+
+ *val = cm3323_int_time[i].val;
+ *val2 = cm3323_int_time[i].val2;
+ mutex_unlock(&data->mutex);
+
+ return IIO_VAL_INT_PLUS_MICRO;
+ default:
+ return -EINVAL;
+ }
+}
+
+static int cm3323_write_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan, int val,
+ int val2, long mask)
+{
+ struct cm3323_data *data = iio_priv(indio_dev);
+ int ret;
+
+ switch (mask) {
+ case IIO_CHAN_INFO_INT_TIME:
+ mutex_lock(&data->mutex);
+ ret = cm3323_set_it_bits(data, val, val2);
+ mutex_unlock(&data->mutex);
+
+ return ret;
+ default:
+ return -EINVAL;
+ }
+}
+
+static const struct iio_info cm3323_info = {
+ .driver_module = THIS_MODULE,
+ .read_raw = cm3323_read_raw,
+ .write_raw = cm3323_write_raw,
+ .attrs = &cm3323_attribute_group,
+};
+
+static int cm3323_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct cm3323_data *data;
+ struct iio_dev *indio_dev;
+ int ret;
+
+ indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
+ if (!indio_dev)
+ return -ENOMEM;
+
+ data = iio_priv(indio_dev);
+ i2c_set_clientdata(client, indio_dev);
+ data->client = client;
+
+ mutex_init(&data->mutex);
+
+ indio_dev->dev.parent = &client->dev;
+ indio_dev->info = &cm3323_info;
+ indio_dev->name = CM3323_DRV_NAME;
+ indio_dev->channels = cm3323_channels;
+ indio_dev->num_channels = ARRAY_SIZE(cm3323_channels);
+ indio_dev->modes = INDIO_DIRECT_MODE;
+
+ ret = cm3323_init(indio_dev);
+ if (ret < 0) {
+ dev_err(&client->dev, "cm3323 chip init failed\n");
+ return ret;
+ }
+ ret = iio_device_register(indio_dev);
+ if (ret < 0) {
+ dev_err(&client->dev, "failed to register iio dev\n");
+ goto err_init;
+ }
+ return 0;
+err_init:
+ cm3323_disable(indio_dev);
+ return ret;
+}
+
+static int cm3323_remove(struct i2c_client *client)
+{
+ struct iio_dev *indio_dev = i2c_get_clientdata(client);
+
+ iio_device_unregister(indio_dev);
+ cm3323_disable(indio_dev);
+
+ return 0;
+}
+
+static const struct i2c_device_id cm3323_id[] = {
+ {"cm3323", 0},
+ {}
+};
+MODULE_DEVICE_TABLE(i2c, cm3323_id);
+
+static struct i2c_driver cm3323_driver = {
+ .driver = {
+ .name = CM3323_DRV_NAME,
+ },
+ .probe = cm3323_probe,
+ .remove = cm3323_remove,
+ .id_table = cm3323_id,
+};
+
+module_i2c_driver(cm3323_driver);
+
+MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
+MODULE_DESCRIPTION("Capella CM3323 Color Light Sensor driver");
+MODULE_LICENSE("GPL v2");
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
+#include <asm/unaligned.h>
#include <linux/iio/buffer.h>
#include <linux/iio/events.h>
#include <linux/iio/iio.h>
struct iio_dev *indio_dev = pf->indio_dev;
struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
size_t d_size = 0;
- __le32 light_lux;
int i, out_val, ret;
for_each_set_bit(i, indio_dev->active_scan_mask,
i == GP2AP020A00F_SCAN_MODE_LIGHT_IR) {
out_val = le16_to_cpup((__le16 *)&priv->buffer[d_size]);
gp2ap020a00f_output_to_lux(priv, &out_val);
- light_lux = cpu_to_le32(out_val);
- memcpy(&priv->buffer[d_size], (u8 *)&light_lux, 4);
+
+ put_unaligned_le32(out_val, &priv->buffer[d_size]);
d_size += 4;
} else {
d_size += 2;
*val = sensor_hub_input_attr_get_raw_value(
als_state->common_attributes.hsdev,
HID_USAGE_SENSOR_ALS, address,
- report_id);
+ report_id,
+ SENSOR_HUB_SYNC);
hid_sensor_power_state(&als_state->common_attributes,
false);
} else {
*val = sensor_hub_input_attr_get_raw_value(
prox_state->common_attributes.hsdev,
HID_USAGE_SENSOR_PROX, address,
- report_id);
+ report_id,
+ SENSOR_HUB_SYNC);
hid_sensor_power_state(&prox_state->common_attributes,
false);
} else {
}
}
-static struct regmap_config jsa1212_regmap_config = {
+static const struct regmap_config jsa1212_regmap_config = {
.name = JSA1212_REGMAP_NAME,
.reg_bits = 8,
.val_bits = 8,
data->ps_contr);
}
+static int ltr501_powerdown(struct ltr501_data *data)
+{
+ return ltr501_write_contr(data->client,
+ data->als_contr & ~LTR501_CONTR_ACTIVE,
+ data->ps_contr & ~LTR501_CONTR_ACTIVE);
+}
+
static int ltr501_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
ret = iio_triggered_buffer_setup(indio_dev, NULL,
ltr501_trigger_handler, NULL);
if (ret)
- return ret;
+ goto powerdown_on_error;
ret = iio_device_register(indio_dev);
if (ret)
error_unreg_buffer:
iio_triggered_buffer_cleanup(indio_dev);
+powerdown_on_error:
+ ltr501_powerdown(data);
return ret;
}
-static int ltr501_powerdown(struct ltr501_data *data)
-{
- return ltr501_write_contr(data->client,
- data->als_contr & ~LTR501_CONTR_ACTIVE,
- data->ps_contr & ~LTR501_CONTR_ACTIVE);
-}
-
static int ltr501_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
*val = sensor_hub_input_attr_get_raw_value(
magn_state->common_attributes.hsdev,
HID_USAGE_SENSOR_COMPASS_3D, address,
- report_id);
+ report_id,
+ SENSOR_HUB_SYNC);
else {
*val = 0;
hid_sensor_power_state(&magn_state->common_attributes,
static const unsigned long mag3110_scan_masks[] = {0x7, 0xf, 0};
+static int mag3110_standby(struct mag3110_data *data)
+{
+ return i2c_smbus_write_byte_data(data->client, MAG3110_CTRL_REG1,
+ data->ctrl_reg1 & ~MAG3110_CTRL_AC);
+}
+
static int mag3110_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
ret = i2c_smbus_write_byte_data(client, MAG3110_CTRL_REG2,
MAG3110_CTRL_AUTO_MRST_EN);
if (ret < 0)
- return ret;
+ goto standby_on_error;
ret = iio_triggered_buffer_setup(indio_dev, NULL,
mag3110_trigger_handler, NULL);
if (ret < 0)
- return ret;
+ goto standby_on_error;
ret = iio_device_register(indio_dev);
if (ret < 0)
buffer_cleanup:
iio_triggered_buffer_cleanup(indio_dev);
+standby_on_error:
+ mag3110_standby(iio_priv(indio_dev));
return ret;
}
-static int mag3110_standby(struct mag3110_data *data)
-{
- return i2c_smbus_write_byte_data(data->client, MAG3110_CTRL_REG1,
- data->ctrl_reg1 & ~MAG3110_CTRL_AC);
-}
-
static int mag3110_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
*val = sensor_hub_input_attr_get_raw_value(
incl_state->common_attributes.hsdev,
HID_USAGE_SENSOR_INCLINOMETER_3D, address,
- report_id);
+ report_id,
+ SENSOR_HUB_SYNC);
else {
hid_sensor_power_state(&incl_state->common_attributes,
false);
To compile this driver as a module, choose M here: the module
will be called mpl3115.
+config MS5611
+ tristate "Measurement Specialities MS5611 pressure sensor driver"
+ help
+ Say Y here to build support for the Measurement Specialities
+ MS5611 pressure and temperature sensor.
+
+ To compile this driver as a module, choose M here: the module will
+ be called ms5611_core.
+
+config MS5611_I2C
+ tristate "support I2C bus connection"
+ depends on I2C && MS5611
+ help
+ Say Y here to build I2C bus support for MS5611.
+
+ To compile this driver as a module, choose M here: the module will
+ be called ms5611_i2c.
+
+config MS5611_SPI
+ tristate "support SPI bus connection"
+ depends on SPI_MASTER && MS5611
+ help
+ Say Y here to build SPI bus support for MS5611.
+
+ To compile this driver as a module, choose M here: the module will
+ be called ms5611_spi.
+
config IIO_ST_PRESS
tristate "STMicroelectronics pressure sensor Driver"
depends on (I2C || SPI_MASTER) && SYSFS
obj-$(CONFIG_HID_SENSOR_PRESS) += hid-sensor-press.o
obj-$(CONFIG_MPL115) += mpl115.o
obj-$(CONFIG_MPL3115) += mpl3115.o
+obj-$(CONFIG_MS5611) += ms5611_core.o
+obj-$(CONFIG_MS5611_I2C) += ms5611_i2c.o
+obj-$(CONFIG_MS5611_SPI) += ms5611_spi.o
obj-$(CONFIG_IIO_ST_PRESS) += st_pressure.o
st_pressure-y := st_pressure_core.o
st_pressure-$(CONFIG_IIO_BUFFER) += st_pressure_buffer.o
*val = sensor_hub_input_attr_get_raw_value(
press_state->common_attributes.hsdev,
HID_USAGE_SENSOR_PRESSURE, address,
- report_id);
+ report_id,
+ SENSOR_HUB_SYNC);
hid_sensor_power_state(&press_state->common_attributes,
false);
} else {
--- /dev/null
+/*
+ * MS5611 pressure and temperature sensor driver
+ *
+ * Copyright (c) Tomasz Duszynski <tduszyns@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef _MS5611_H
+#define _MS5611_H
+
+#include <linux/device.h>
+#include <linux/iio/iio.h>
+#include <linux/mutex.h>
+
+#define MS5611_RESET 0x1e
+#define MS5611_READ_ADC 0x00
+#define MS5611_READ_PROM_WORD 0xA0
+#define MS5611_START_TEMP_CONV 0x58
+#define MS5611_START_PRESSURE_CONV 0x48
+
+#define MS5611_CONV_TIME_MIN 9040
+#define MS5611_CONV_TIME_MAX 10000
+
+#define MS5611_PROM_WORDS_NB 8
+
+struct ms5611_state {
+ void *client;
+ struct mutex lock;
+
+ int (*reset)(struct device *dev);
+ int (*read_prom_word)(struct device *dev, int index, u16 *word);
+ int (*read_adc_temp_and_pressure)(struct device *dev,
+ s32 *temp, s32 *pressure);
+
+ u16 prom[MS5611_PROM_WORDS_NB];
+};
+
+int ms5611_probe(struct iio_dev *indio_dev, struct device *dev);
+
+#endif /* _MS5611_H */
--- /dev/null
+/*
+ * MS5611 pressure and temperature sensor driver
+ *
+ * Copyright (c) Tomasz Duszynski <tduszyns@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Data sheet:
+ * http://www.meas-spec.com/downloads/MS5611-01BA03.pdf
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/iio/iio.h>
+#include <linux/delay.h>
+
+#include "ms5611.h"
+
+static bool ms5611_prom_is_valid(u16 *prom, size_t len)
+{
+ int i, j;
+ uint16_t crc = 0, crc_orig = prom[7] & 0x000F;
+
+ prom[7] &= 0xFF00;
+
+ for (i = 0; i < len * 2; i++) {
+ if (i % 2 == 1)
+ crc ^= prom[i >> 1] & 0x00FF;
+ else
+ crc ^= prom[i >> 1] >> 8;
+
+ for (j = 0; j < 8; j++) {
+ if (crc & 0x8000)
+ crc = (crc << 1) ^ 0x3000;
+ else
+ crc <<= 1;
+ }
+ }
+
+ crc = (crc >> 12) & 0x000F;
+
+ return crc_orig != 0x0000 && crc == crc_orig;
+}
+
+static int ms5611_read_prom(struct iio_dev *indio_dev)
+{
+ int ret, i;
+ struct ms5611_state *st = iio_priv(indio_dev);
+
+ for (i = 0; i < MS5611_PROM_WORDS_NB; i++) {
+ ret = st->read_prom_word(&indio_dev->dev, i, &st->prom[i]);
+ if (ret < 0) {
+ dev_err(&indio_dev->dev,
+ "failed to read prom at %d\n", i);
+ return ret;
+ }
+ }
+
+ if (!ms5611_prom_is_valid(st->prom, MS5611_PROM_WORDS_NB)) {
+ dev_err(&indio_dev->dev, "PROM integrity check failed\n");
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+static int ms5611_read_temp_and_pressure(struct iio_dev *indio_dev,
+ s32 *temp, s32 *pressure)
+{
+ int ret;
+ s32 t, p;
+ s64 off, sens, dt;
+ struct ms5611_state *st = iio_priv(indio_dev);
+
+ ret = st->read_adc_temp_and_pressure(&indio_dev->dev, &t, &p);
+ if (ret < 0) {
+ dev_err(&indio_dev->dev,
+ "failed to read temperature and pressure\n");
+ return ret;
+ }
+
+ dt = t - (st->prom[5] << 8);
+ off = ((s64)st->prom[2] << 16) + ((st->prom[4] * dt) >> 7);
+ sens = ((s64)st->prom[1] << 15) + ((st->prom[3] * dt) >> 8);
+
+ t = 2000 + ((st->prom[6] * dt) >> 23);
+ if (t < 2000) {
+ s64 off2, sens2, t2;
+
+ t2 = (dt * dt) >> 31;
+ off2 = (5 * (t - 2000) * (t - 2000)) >> 1;
+ sens2 = off2 >> 1;
+
+ if (t < -1500) {
+ s64 tmp = (t + 1500) * (t + 1500);
+
+ off2 += 7 * tmp;
+ sens2 += (11 * tmp) >> 1;
+ }
+
+ t -= t2;
+ off -= off2;
+ sens -= sens2;
+ }
+
+ *temp = t;
+ *pressure = (((p * sens) >> 21) - off) >> 15;
+
+ return 0;
+}
+
+static int ms5611_reset(struct iio_dev *indio_dev)
+{
+ int ret;
+ struct ms5611_state *st = iio_priv(indio_dev);
+
+ ret = st->reset(&indio_dev->dev);
+ if (ret < 0) {
+ dev_err(&indio_dev->dev, "failed to reset device\n");
+ return ret;
+ }
+
+ usleep_range(3000, 4000);
+
+ return 0;
+}
+
+static int ms5611_read_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ int *val, int *val2, long mask)
+{
+ int ret;
+ s32 temp, pressure;
+ struct ms5611_state *st = iio_priv(indio_dev);
+
+ switch (mask) {
+ case IIO_CHAN_INFO_PROCESSED:
+ mutex_lock(&st->lock);
+ ret = ms5611_read_temp_and_pressure(indio_dev,
+ &temp, &pressure);
+ mutex_unlock(&st->lock);
+ if (ret < 0)
+ return ret;
+
+ switch (chan->type) {
+ case IIO_TEMP:
+ *val = temp * 10;
+ return IIO_VAL_INT;
+ case IIO_PRESSURE:
+ *val = pressure / 1000;
+ *val2 = (pressure % 1000) * 1000;
+ return IIO_VAL_INT_PLUS_MICRO;
+ default:
+ return -EINVAL;
+ }
+ }
+
+ return -EINVAL;
+}
+
+static const struct iio_chan_spec ms5611_channels[] = {
+ {
+ .type = IIO_PRESSURE,
+ .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
+ BIT(IIO_CHAN_INFO_SCALE)
+ },
+ {
+ .type = IIO_TEMP,
+ .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
+ BIT(IIO_CHAN_INFO_SCALE)
+ }
+};
+
+static const struct iio_info ms5611_info = {
+ .read_raw = &ms5611_read_raw,
+ .driver_module = THIS_MODULE,
+};
+
+static int ms5611_init(struct iio_dev *indio_dev)
+{
+ int ret;
+
+ ret = ms5611_reset(indio_dev);
+ if (ret < 0)
+ return ret;
+
+ return ms5611_read_prom(indio_dev);
+}
+
+int ms5611_probe(struct iio_dev *indio_dev, struct device *dev)
+{
+ int ret;
+ struct ms5611_state *st = iio_priv(indio_dev);
+
+ mutex_init(&st->lock);
+ indio_dev->dev.parent = dev;
+ indio_dev->name = dev->driver->name;
+ indio_dev->info = &ms5611_info;
+ indio_dev->channels = ms5611_channels;
+ indio_dev->num_channels = ARRAY_SIZE(ms5611_channels);
+ indio_dev->modes = INDIO_DIRECT_MODE;
+
+ ret = ms5611_init(indio_dev);
+ if (ret < 0)
+ return ret;
+
+ return devm_iio_device_register(dev, indio_dev);
+}
+EXPORT_SYMBOL(ms5611_probe);
+
+MODULE_AUTHOR("Tomasz Duszynski <tduszyns@gmail.com>");
+MODULE_DESCRIPTION("MS5611 core driver");
+MODULE_LICENSE("GPL v2");
--- /dev/null
+/*
+ * MS5611 pressure and temperature sensor driver (I2C bus)
+ *
+ * Copyright (c) Tomasz Duszynski <tduszyns@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * 7-bit I2C slave addresses:
+ *
+ * 0x77 (CSB pin low)
+ * 0x76 (CSB pin high)
+ *
+ */
+
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+
+#include "ms5611.h"
+
+static int ms5611_i2c_reset(struct device *dev)
+{
+ struct ms5611_state *st = iio_priv(dev_to_iio_dev(dev));
+
+ return i2c_smbus_write_byte(st->client, MS5611_RESET);
+}
+
+static int ms5611_i2c_read_prom_word(struct device *dev, int index, u16 *word)
+{
+ int ret;
+ struct ms5611_state *st = iio_priv(dev_to_iio_dev(dev));
+
+ ret = i2c_smbus_read_word_swapped(st->client,
+ MS5611_READ_PROM_WORD + (index << 1));
+ if (ret < 0)
+ return ret;
+
+ *word = ret;
+
+ return 0;
+}
+
+static int ms5611_i2c_read_adc(struct ms5611_state *st, s32 *val)
+{
+ int ret;
+ u8 buf[3];
+
+ ret = i2c_smbus_read_i2c_block_data(st->client, MS5611_READ_ADC,
+ 3, buf);
+ if (ret < 0)
+ return ret;
+
+ *val = (buf[0] << 16) | (buf[1] << 8) | buf[2];
+
+ return 0;
+}
+
+static int ms5611_i2c_read_adc_temp_and_pressure(struct device *dev,
+ s32 *temp, s32 *pressure)
+{
+ int ret;
+ struct ms5611_state *st = iio_priv(dev_to_iio_dev(dev));
+
+ ret = i2c_smbus_write_byte(st->client, MS5611_START_TEMP_CONV);
+ if (ret < 0)
+ return ret;
+
+ usleep_range(MS5611_CONV_TIME_MIN, MS5611_CONV_TIME_MAX);
+
+ ret = ms5611_i2c_read_adc(st, temp);
+ if (ret < 0)
+ return ret;
+
+ ret = i2c_smbus_write_byte(st->client, MS5611_START_PRESSURE_CONV);
+ if (ret < 0)
+ return ret;
+
+ usleep_range(MS5611_CONV_TIME_MIN, MS5611_CONV_TIME_MAX);
+
+ return ms5611_i2c_read_adc(st, pressure);
+}
+
+static int ms5611_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct ms5611_state *st;
+ struct iio_dev *indio_dev;
+
+ if (!i2c_check_functionality(client->adapter,
+ I2C_FUNC_SMBUS_WRITE_BYTE |
+ I2C_FUNC_SMBUS_READ_WORD_DATA |
+ I2C_FUNC_SMBUS_READ_I2C_BLOCK))
+ return -ENODEV;
+
+ indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
+ if (!indio_dev)
+ return -ENOMEM;
+
+ st = iio_priv(indio_dev);
+ st->reset = ms5611_i2c_reset;
+ st->read_prom_word = ms5611_i2c_read_prom_word;
+ st->read_adc_temp_and_pressure = ms5611_i2c_read_adc_temp_and_pressure;
+ st->client = client;
+
+ return ms5611_probe(indio_dev, &client->dev);
+}
+
+static const struct i2c_device_id ms5611_id[] = {
+ { "ms5611", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, ms5611_id);
+
+static struct i2c_driver ms5611_driver = {
+ .driver = {
+ .name = "ms5611",
+ .owner = THIS_MODULE,
+ },
+ .id_table = ms5611_id,
+ .probe = ms5611_i2c_probe,
+};
+module_i2c_driver(ms5611_driver);
+
+MODULE_AUTHOR("Tomasz Duszynski <tduszyns@gmail.com>");
+MODULE_DESCRIPTION("MS5611 i2c driver");
+MODULE_LICENSE("GPL v2");
--- /dev/null
+/*
+ * MS5611 pressure and temperature sensor driver (SPI bus)
+ *
+ * Copyright (c) Tomasz Duszynski <tduszyns@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <linux/spi/spi.h>
+
+#include "ms5611.h"
+
+static int ms5611_spi_reset(struct device *dev)
+{
+ u8 cmd = MS5611_RESET;
+ struct ms5611_state *st = iio_priv(dev_to_iio_dev(dev));
+
+ return spi_write_then_read(st->client, &cmd, 1, NULL, 0);
+}
+
+static int ms5611_spi_read_prom_word(struct device *dev, int index, u16 *word)
+{
+ int ret;
+ struct ms5611_state *st = iio_priv(dev_to_iio_dev(dev));
+
+ ret = spi_w8r16be(st->client, MS5611_READ_PROM_WORD + (index << 1));
+ if (ret < 0)
+ return ret;
+
+ *word = ret;
+
+ return 0;
+}
+
+static int ms5611_spi_read_adc(struct device *dev, s32 *val)
+{
+ int ret;
+ u8 buf[3] = { MS5611_READ_ADC };
+ struct ms5611_state *st = iio_priv(dev_to_iio_dev(dev));
+
+ ret = spi_write_then_read(st->client, buf, 1, buf, 3);
+ if (ret < 0)
+ return ret;
+
+ *val = (buf[0] << 16) | (buf[1] << 8) | buf[2];
+
+ return 0;
+}
+
+static int ms5611_spi_read_adc_temp_and_pressure(struct device *dev,
+ s32 *temp, s32 *pressure)
+{
+ u8 cmd;
+ int ret;
+ struct ms5611_state *st = iio_priv(dev_to_iio_dev(dev));
+
+ cmd = MS5611_START_TEMP_CONV;
+ ret = spi_write_then_read(st->client, &cmd, 1, NULL, 0);
+ if (ret < 0)
+ return ret;
+
+ usleep_range(MS5611_CONV_TIME_MIN, MS5611_CONV_TIME_MAX);
+
+ ret = ms5611_spi_read_adc(dev, temp);
+ if (ret < 0)
+ return ret;
+
+ cmd = MS5611_START_PRESSURE_CONV;
+ ret = spi_write_then_read(st->client, &cmd, 1, NULL, 0);
+ if (ret < 0)
+ return ret;
+
+ usleep_range(MS5611_CONV_TIME_MIN, MS5611_CONV_TIME_MAX);
+
+ return ms5611_spi_read_adc(dev, pressure);
+}
+
+static int ms5611_spi_probe(struct spi_device *spi)
+{
+ int ret;
+ struct ms5611_state *st;
+ struct iio_dev *indio_dev;
+
+ indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
+ if (!indio_dev)
+ return -ENOMEM;
+
+ spi->mode = SPI_MODE_0;
+ spi->max_speed_hz = 20000000;
+ spi->bits_per_word = 8;
+ ret = spi_setup(spi);
+ if (ret < 0)
+ return ret;
+
+ st = iio_priv(indio_dev);
+ st->reset = ms5611_spi_reset;
+ st->read_prom_word = ms5611_spi_read_prom_word;
+ st->read_adc_temp_and_pressure = ms5611_spi_read_adc_temp_and_pressure;
+ st->client = spi;
+
+ return ms5611_probe(indio_dev, &spi->dev);
+}
+
+static const struct spi_device_id ms5611_id[] = {
+ { "ms5611", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(spi, ms5611_id);
+
+static struct spi_driver ms5611_driver = {
+ .driver = {
+ .name = "ms5611",
+ .owner = THIS_MODULE,
+ },
+ .id_table = ms5611_id,
+ .probe = ms5611_spi_probe,
+};
+module_spi_driver(ms5611_driver);
+
+MODULE_AUTHOR("Tomasz Duszynski <tduszyns@gmail.com>");
+MODULE_DESCRIPTION("MS5611 spi driver");
+MODULE_LICENSE("GPL v2");
dev = &client->dev;
/* data ready gpio interrupt pin */
- gpio = devm_gpiod_get_index(dev, SX9500_GPIO_NAME, 0);
+ gpio = devm_gpiod_get_index(dev, SX9500_GPIO_NAME, 0, GPIOD_IN);
if (IS_ERR(gpio)) {
dev_err(dev, "acpi gpio get index failed\n");
return PTR_ERR(gpio);
}
- ret = gpiod_direction_input(gpio);
- if (ret)
- return ret;
-
ret = gpiod_to_irq(gpio);
dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
* mlx90614.c - Support for Melexis MLX90614 contactless IR temperature sensor
*
* Copyright (c) 2014 Peter Meerwald <pmeerw@pmeerw.net>
+ * Copyright (c) 2015 Essensium NV
*
* This file is subject to the terms and conditions of version 2 of
* the GNU General Public License. See the file COPYING in the main
#include <linux/iio/iio.h>
-#define MLX90614_OP_RAM 0x00
+#define MLX90614_OP_RAM 0x00
+#define MLX90614_OP_EEPROM 0x20
+#define MLX90614_OP_SLEEP 0xff
/* RAM offsets with 16-bit data, MSB first */
-#define MLX90614_TA 0x06 /* ambient temperature */
-#define MLX90614_TOBJ1 0x07 /* object temperature */
+#define MLX90614_RAW1 (MLX90614_OP_RAM | 0x04) /* raw data IR channel 1 */
+#define MLX90614_RAW2 (MLX90614_OP_RAM | 0x05) /* raw data IR channel 2 */
+#define MLX90614_TA (MLX90614_OP_RAM | 0x06) /* ambient temperature */
+#define MLX90614_TOBJ1 (MLX90614_OP_RAM | 0x07) /* object 1 temperature */
+#define MLX90614_TOBJ2 (MLX90614_OP_RAM | 0x08) /* object 2 temperature */
+
+/* EEPROM offsets with 16-bit data, MSB first */
+#define MLX90614_EMISSIVITY (MLX90614_OP_EEPROM | 0x04) /* emissivity correction coefficient */
+#define MLX90614_CONFIG (MLX90614_OP_EEPROM | 0x05) /* configuration register */
+
+/* Control bits in configuration register */
+#define MLX90614_CONFIG_IIR_SHIFT 0 /* IIR coefficient */
+#define MLX90614_CONFIG_IIR_MASK (0x7 << MLX90614_CONFIG_IIR_SHIFT)
+#define MLX90614_CONFIG_DUAL_SHIFT 6 /* single (0) or dual (1) IR sensor */
+#define MLX90614_CONFIG_DUAL_MASK (1 << MLX90614_CONFIG_DUAL_SHIFT)
+#define MLX90614_CONFIG_FIR_SHIFT 8 /* FIR coefficient */
+#define MLX90614_CONFIG_FIR_MASK (0x7 << MLX90614_CONFIG_FIR_SHIFT)
+#define MLX90614_CONFIG_GAIN_SHIFT 11 /* gain */
+#define MLX90614_CONFIG_GAIN_MASK (0x7 << MLX90614_CONFIG_GAIN_SHIFT)
+
+/* Timings (in ms) */
+#define MLX90614_TIMING_EEPROM 20 /* time for EEPROM write/erase to complete */
+#define MLX90614_TIMING_WAKEUP 34 /* time to hold SDA low for wake-up */
+#define MLX90614_TIMING_STARTUP 250 /* time before first data after wake-up */
struct mlx90614_data {
struct i2c_client *client;
int *val2, long mask)
{
struct mlx90614_data *data = iio_priv(indio_dev);
+ u8 cmd;
s32 ret;
switch (mask) {
case IIO_CHAN_INFO_RAW: /* 0.02K / LSB */
switch (channel->channel2) {
case IIO_MOD_TEMP_AMBIENT:
- ret = i2c_smbus_read_word_data(data->client,
- MLX90614_OP_RAM | MLX90614_TA);
- if (ret < 0)
- return ret;
+ cmd = MLX90614_TA;
break;
case IIO_MOD_TEMP_OBJECT:
- ret = i2c_smbus_read_word_data(data->client,
- MLX90614_OP_RAM | MLX90614_TOBJ1);
- if (ret < 0)
- return ret;
+ switch (channel->channel) {
+ case 0:
+ cmd = MLX90614_TOBJ1;
+ break;
+ case 1:
+ cmd = MLX90614_TOBJ2;
+ break;
+ default:
+ return -EINVAL;
+ }
break;
default:
return -EINVAL;
}
+
+ ret = i2c_smbus_read_word_data(data->client, cmd);
+ if (ret < 0)
+ return ret;
*val = ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_OFFSET:
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE),
},
+ {
+ .type = IIO_TEMP,
+ .indexed = 1,
+ .modified = 1,
+ .channel = 1,
+ .channel2 = IIO_MOD_TEMP_OBJECT,
+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
+ .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
+ BIT(IIO_CHAN_INFO_SCALE),
+ },
};
static const struct iio_info mlx90614_info = {
.driver_module = THIS_MODULE,
};
+/* Return 0 for single sensor, 1 for dual sensor, <0 on error. */
+static int mlx90614_probe_num_ir_sensors(struct i2c_client *client)
+{
+ s32 ret;
+
+ ret = i2c_smbus_read_word_data(client, MLX90614_CONFIG);
+
+ if (ret < 0)
+ return ret;
+
+ return (ret & MLX90614_CONFIG_DUAL_MASK) ? 1 : 0;
+}
+
static int mlx90614_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct iio_dev *indio_dev;
struct mlx90614_data *data;
+ int ret;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA))
return -ENODEV;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &mlx90614_info;
- indio_dev->channels = mlx90614_channels;
- indio_dev->num_channels = ARRAY_SIZE(mlx90614_channels);
+ ret = mlx90614_probe_num_ir_sensors(client);
+ switch (ret) {
+ case 0:
+ dev_dbg(&client->dev, "Found single sensor");
+ indio_dev->channels = mlx90614_channels;
+ indio_dev->num_channels = 2;
+ break;
+ case 1:
+ dev_dbg(&client->dev, "Found dual sensor");
+ indio_dev->channels = mlx90614_channels;
+ indio_dev->num_channels = 3;
+ break;
+ default:
+ return ret;
+ }
return iio_device_register(indio_dev);
}
module_i2c_driver(mlx90614_driver);
MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
+MODULE_AUTHOR("Vianney le Clément de Saint-Marcq <vianney.leclement@essensium.com>");
MODULE_DESCRIPTION("Melexis MLX90614 contactless IR temperature sensor driver");
MODULE_LICENSE("GPL");
#include <linux/slab.h>
#include <linux/highmem.h>
#include <linux/io.h>
-#include <linux/aio.h>
#include <linux/jiffies.h>
#include <linux/cpu.h>
#include <asm/pgtable.h>
#include <linux/vmalloc.h>
#include <linux/highmem.h>
#include <linux/io.h>
-#include <linux/aio.h>
#include <linux/jiffies.h>
#include <asm/pgtable.h>
#include <linux/delay.h>
goto err_mem;
}
- /* Mark slots as 'unused' */
+ /* Mark slots as 'inactive' */
for (i = 0; i < num_slots; i++)
input_mt_set_value(&mt->slots[i], ABS_MT_TRACKING_ID, -1);
+ /* Mark slots as 'unused' */
+ mt->frame = 1;
+
dev->mt = mt;
return 0;
err_mem:
* set the key on the first unused slot and return.
*
* If no available slot can be found, -1 is returned.
+ * Note that for this function to work properly, input_mt_sync_frame() has
+ * to be called at each frame.
*/
int input_mt_get_slot_by_key(struct input_dev *dev, int key)
{
return s - mt->slots;
for (s = mt->slots; s != mt->slots + mt->num_slots; s++)
- if (!input_mt_is_active(s)) {
+ if (!input_mt_is_active(s) && !input_mt_is_used(mt, s)) {
s->key = key;
return s - mt->slots;
}
return ops;
}
-struct iommu_ops *of_iommu_configure(struct device *dev)
+struct iommu_ops *of_iommu_configure(struct device *dev,
+ struct device_node *master_np)
{
struct of_phandle_args iommu_spec;
struct device_node *np;
struct iommu_ops *ops = NULL;
int idx = 0;
+ if (dev_is_pci(dev)) {
+ dev_err(dev, "IOMMU is currently not supported for PCI\n");
+ return NULL;
+ }
+
/*
* We don't currently walk up the tree looking for a parent IOMMU.
* See the `Notes:' section of
* Documentation/devicetree/bindings/iommu/iommu.txt
*/
- while (!of_parse_phandle_with_args(dev->of_node, "iommus",
+ while (!of_parse_phandle_with_args(master_np, "iommus",
"#iommu-cells", idx,
&iommu_spec)) {
np = iommu_spec.np;
bool
select IRQ_DOMAIN
+config ST_IRQCHIP
+ bool
+ select REGMAP
+ select MFD_SYSCON
+ help
+ Enables SysCfg Controlled IRQs on STi based platforms.
+
config TB10X_IRQC
bool
select IRQ_DOMAIN
obj-$(CONFIG_ARCH_MMP) += irq-mmp.o
obj-$(CONFIG_ARCH_MVEBU) += irq-armada-370-xp.o
obj-$(CONFIG_ARCH_MXS) += irq-mxs.o
+obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o
obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o
obj-$(CONFIG_METAG) += irq-metag-ext.o
obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o
obj-$(CONFIG_ARCH_NSPIRE) += irq-zevio.o
obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o
+obj-$(CONFIG_ST_IRQCHIP) += irq-st.o
obj-$(CONFIG_TB10X_IRQC) += irq-tb10x.o
obj-$(CONFIG_XTENSA) += irq-xtensa-pic.o
obj-$(CONFIG_XTENSA_MX) += irq-xtensa-mx.o
obj-$(CONFIG_IRQ_CROSSBAR) += irq-crossbar.o
+obj-$(CONFIG_SOC_VF610) += irq-vf610-mscm-ir.o
obj-$(CONFIG_BCM7120_L2_IRQ) += irq-bcm7120-l2.o
obj-$(CONFIG_BRCMSTB_L2_IRQ) += irq-brcmstb-l2.o
obj-$(CONFIG_KEYSTONE_IRQ) += irq-keystone.o
/* Interrupt Controller Registers Map */
#define ARMADA_370_XP_INT_SET_MASK_OFFS (0x48)
#define ARMADA_370_XP_INT_CLEAR_MASK_OFFS (0x4C)
+#define ARMADA_370_XP_INT_FABRIC_MASK_OFFS (0x54)
+#define ARMADA_370_XP_INT_CAUSE_PERF(cpu) (1 << cpu)
#define ARMADA_370_XP_INT_CONTROL (0x00)
#define ARMADA_370_XP_INT_SET_ENABLE_OFFS (0x30)
#define ARMADA_370_XP_MAX_PER_CPU_IRQS (28)
#define ARMADA_370_XP_TIMER0_PER_CPU_IRQ (5)
+#define ARMADA_370_XP_FABRIC_IRQ (3)
#define IPI_DOORBELL_START (0)
#define IPI_DOORBELL_END (8)
static phys_addr_t msi_doorbell_addr;
#endif
+static inline bool is_percpu_irq(irq_hw_number_t irq)
+{
+ switch (irq) {
+ case ARMADA_370_XP_TIMER0_PER_CPU_IRQ:
+ case ARMADA_370_XP_FABRIC_IRQ:
+ return true;
+ default:
+ return false;
+ }
+}
+
/*
* In SMP mode:
* For shared global interrupts, mask/unmask global enable bit
{
irq_hw_number_t hwirq = irqd_to_hwirq(d);
- if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
+ if (!is_percpu_irq(hwirq))
writel(hwirq, main_int_base +
ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS);
else
{
irq_hw_number_t hwirq = irqd_to_hwirq(d);
- if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
+ if (!is_percpu_irq(hwirq))
writel(hwirq, main_int_base +
ARMADA_370_XP_INT_SET_ENABLE_OFFS);
else
#ifdef CONFIG_SMP
.irq_set_affinity = armada_xp_set_affinity,
#endif
+ .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND,
};
static int armada_370_xp_mpic_irq_map(struct irq_domain *h,
unsigned int virq, irq_hw_number_t hw)
{
armada_370_xp_irq_mask(irq_get_irq_data(virq));
- if (hw != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
+ if (!is_percpu_irq(hw))
writel(hw, per_cpu_int_base +
ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
else
writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS);
irq_set_status_flags(virq, IRQ_LEVEL);
- if (hw == ARMADA_370_XP_TIMER0_PER_CPU_IRQ) {
+ if (is_percpu_irq(hw)) {
irq_set_percpu_devid(virq);
irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip,
handle_percpu_devid_irq);
return 0;
}
-#ifdef CONFIG_SMP
-static void armada_mpic_send_doorbell(const struct cpumask *mask,
- unsigned int irq)
-{
- int cpu;
- unsigned long map = 0;
-
- /* Convert our logical CPU mask into a physical one. */
- for_each_cpu(cpu, mask)
- map |= 1 << cpu_logical_map(cpu);
-
- /*
- * Ensure that stores to Normal memory are visible to the
- * other CPUs before issuing the IPI.
- */
- dsb();
-
- /* submit softirq */
- writel((map << 8) | irq, main_int_base +
- ARMADA_370_XP_SW_TRIG_INT_OFFS);
-}
-
static void armada_xp_mpic_smp_cpu_init(void)
{
u32 control;
writel(0, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
}
+static void armada_xp_mpic_perf_init(void)
+{
+ unsigned long cpuid = cpu_logical_map(smp_processor_id());
+
+ /* Enable Performance Counter Overflow interrupts */
+ writel(ARMADA_370_XP_INT_CAUSE_PERF(cpuid),
+ per_cpu_int_base + ARMADA_370_XP_INT_FABRIC_MASK_OFFS);
+}
+
+#ifdef CONFIG_SMP
+static void armada_mpic_send_doorbell(const struct cpumask *mask,
+ unsigned int irq)
+{
+ int cpu;
+ unsigned long map = 0;
+
+ /* Convert our logical CPU mask into a physical one. */
+ for_each_cpu(cpu, mask)
+ map |= 1 << cpu_logical_map(cpu);
+
+ /*
+ * Ensure that stores to Normal memory are visible to the
+ * other CPUs before issuing the IPI.
+ */
+ dsb();
+
+ /* submit softirq */
+ writel((map << 8) | irq, main_int_base +
+ ARMADA_370_XP_SW_TRIG_INT_OFFS);
+}
+
static int armada_xp_mpic_secondary_init(struct notifier_block *nfb,
unsigned long action, void *hcpu)
{
- if (action == CPU_STARTING || action == CPU_STARTING_FROZEN)
+ if (action == CPU_STARTING || action == CPU_STARTING_FROZEN) {
+ armada_xp_mpic_perf_init();
armada_xp_mpic_smp_cpu_init();
+ }
return NOTIFY_OK;
}
static int mpic_cascaded_secondary_init(struct notifier_block *nfb,
unsigned long action, void *hcpu)
{
- if (action == CPU_STARTING || action == CPU_STARTING_FROZEN)
+ if (action == CPU_STARTING || action == CPU_STARTING_FROZEN) {
+ armada_xp_mpic_perf_init();
enable_percpu_irq(parent_irq, IRQ_TYPE_NONE);
+ }
return NOTIFY_OK;
}
.notifier_call = mpic_cascaded_secondary_init,
.priority = 100,
};
-
#endif /* CONFIG_SMP */
static struct irq_domain_ops armada_370_xp_mpic_irq_ops = {
BUG_ON(!armada_370_xp_mpic_domain);
-#ifdef CONFIG_SMP
+ /* Setup for the boot CPU */
+ armada_xp_mpic_perf_init();
armada_xp_mpic_smp_cpu_init();
-#endif
armada_370_xp_msi_init(node, main_int_res.start);
*/
#include <linux/err.h>
#include <linux/io.h>
+#include <linux/irqdomain.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/slab.h>
-#include <linux/irqchip/arm-gic.h>
-#include <linux/irqchip/irq-crossbar.h>
+
+#include "irqchip.h"
#define IRQ_FREE -1
#define IRQ_RESERVED -2
/**
* struct crossbar_device - crossbar device description
+ * @lock: spinlock serializing access to @irq_map
* @int_max: maximum number of supported interrupts
* @safe_map: safe default value to initialize the crossbar
* @max_crossbar_sources: Maximum number of crossbar sources
* @write: register write function pointer
*/
struct crossbar_device {
+ raw_spinlock_t lock;
uint int_max;
uint safe_map;
uint max_crossbar_sources;
static struct crossbar_device *cb;
-static inline void crossbar_writel(int irq_no, int cb_no)
+static void crossbar_writel(int irq_no, int cb_no)
{
writel(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]);
}
-static inline void crossbar_writew(int irq_no, int cb_no)
+static void crossbar_writew(int irq_no, int cb_no)
{
writew(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]);
}
-static inline void crossbar_writeb(int irq_no, int cb_no)
+static void crossbar_writeb(int irq_no, int cb_no)
{
writeb(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]);
}
-static inline int get_prev_map_irq(int cb_no)
-{
- int i;
-
- for (i = cb->int_max - 1; i >= 0; i--)
- if (cb->irq_map[i] == cb_no)
- return i;
-
- return -ENODEV;
-}
+static struct irq_chip crossbar_chip = {
+ .name = "CBAR",
+ .irq_eoi = irq_chip_eoi_parent,
+ .irq_mask = irq_chip_mask_parent,
+ .irq_unmask = irq_chip_unmask_parent,
+ .irq_retrigger = irq_chip_retrigger_hierarchy,
+ .irq_set_wake = irq_chip_set_wake_parent,
+#ifdef CONFIG_SMP
+ .irq_set_affinity = irq_chip_set_affinity_parent,
+#endif
+};
-static inline int allocate_free_irq(int cb_no)
+static int allocate_gic_irq(struct irq_domain *domain, unsigned virq,
+ irq_hw_number_t hwirq)
{
+ struct of_phandle_args args;
int i;
+ int err;
+ raw_spin_lock(&cb->lock);
for (i = cb->int_max - 1; i >= 0; i--) {
if (cb->irq_map[i] == IRQ_FREE) {
- cb->irq_map[i] = cb_no;
- return i;
+ cb->irq_map[i] = hwirq;
+ break;
}
}
+ raw_spin_unlock(&cb->lock);
- return -ENODEV;
-}
+ if (i < 0)
+ return -ENODEV;
-static inline bool needs_crossbar_write(irq_hw_number_t hw)
-{
- int cb_no;
+ args.np = domain->parent->of_node;
+ args.args_count = 3;
+ args.args[0] = 0; /* SPI */
+ args.args[1] = i;
+ args.args[2] = IRQ_TYPE_LEVEL_HIGH;
- if (hw > GIC_IRQ_START) {
- cb_no = cb->irq_map[hw - GIC_IRQ_START];
- if (cb_no != IRQ_RESERVED && cb_no != IRQ_SKIP)
- return true;
- }
+ err = irq_domain_alloc_irqs_parent(domain, virq, 1, &args);
+ if (err)
+ cb->irq_map[i] = IRQ_FREE;
+ else
+ cb->write(i, hwirq);
- return false;
+ return err;
}
-static int crossbar_domain_map(struct irq_domain *d, unsigned int irq,
- irq_hw_number_t hw)
+static int crossbar_domain_alloc(struct irq_domain *d, unsigned int virq,
+ unsigned int nr_irqs, void *data)
{
- if (needs_crossbar_write(hw))
- cb->write(hw - GIC_IRQ_START, cb->irq_map[hw - GIC_IRQ_START]);
+ struct of_phandle_args *args = data;
+ irq_hw_number_t hwirq;
+ int i;
+
+ if (args->args_count != 3)
+ return -EINVAL; /* Not GIC compliant */
+ if (args->args[0] != 0)
+ return -EINVAL; /* No PPI should point to this domain */
+
+ hwirq = args->args[1];
+ if ((hwirq + nr_irqs) > cb->max_crossbar_sources)
+ return -EINVAL; /* Can't deal with this */
+
+ for (i = 0; i < nr_irqs; i++) {
+ int err = allocate_gic_irq(d, virq + i, hwirq + i);
+
+ if (err)
+ return err;
+
+ irq_domain_set_hwirq_and_chip(d, virq + i, hwirq + i,
+ &crossbar_chip, NULL);
+ }
return 0;
}
/**
- * crossbar_domain_unmap - unmap a crossbar<->irq connection
- * @d: domain of irq to unmap
- * @irq: virq number
+ * crossbar_domain_free - unmap/free a crossbar<->irq connection
+ * @domain: domain of irq to unmap
+ * @virq: virq number
+ * @nr_irqs: number of irqs to free
*
* We do not maintain a use count of total number of map/unmap
* calls for a particular irq to find out if a irq can be really
* after which irq is anyways unusable. So an explicit map has to be called
* after that.
*/
-static void crossbar_domain_unmap(struct irq_domain *d, unsigned int irq)
+static void crossbar_domain_free(struct irq_domain *domain, unsigned int virq,
+ unsigned int nr_irqs)
{
- irq_hw_number_t hw = irq_get_irq_data(irq)->hwirq;
+ int i;
- if (needs_crossbar_write(hw)) {
- cb->irq_map[hw - GIC_IRQ_START] = IRQ_FREE;
- cb->write(hw - GIC_IRQ_START, cb->safe_map);
+ raw_spin_lock(&cb->lock);
+ for (i = 0; i < nr_irqs; i++) {
+ struct irq_data *d = irq_domain_get_irq_data(domain, virq + i);
+
+ irq_domain_reset_irq_data(d);
+ cb->irq_map[d->hwirq] = IRQ_FREE;
+ cb->write(d->hwirq, cb->safe_map);
}
+ raw_spin_unlock(&cb->lock);
}
static int crossbar_domain_xlate(struct irq_domain *d,
unsigned long *out_hwirq,
unsigned int *out_type)
{
- int ret;
- int req_num = intspec[1];
- int direct_map_num;
-
- if (req_num >= cb->max_crossbar_sources) {
- direct_map_num = req_num - cb->max_crossbar_sources;
- if (direct_map_num < cb->int_max) {
- ret = cb->irq_map[direct_map_num];
- if (ret == IRQ_RESERVED || ret == IRQ_SKIP) {
- /* We use the interrupt num as h/w irq num */
- ret = direct_map_num;
- goto found;
- }
- }
-
- pr_err("%s: requested crossbar number %d > max %d\n",
- __func__, req_num, cb->max_crossbar_sources);
- return -EINVAL;
- }
-
- ret = get_prev_map_irq(req_num);
- if (ret >= 0)
- goto found;
-
- ret = allocate_free_irq(req_num);
-
- if (ret < 0)
- return ret;
-
-found:
- *out_hwirq = ret + GIC_IRQ_START;
+ if (d->of_node != controller)
+ return -EINVAL; /* Shouldn't happen, really... */
+ if (intsize != 3)
+ return -EINVAL; /* Not GIC compliant */
+ if (intspec[0] != 0)
+ return -EINVAL; /* No PPI should point to this domain */
+
+ *out_hwirq = intspec[1];
+ *out_type = intspec[2];
return 0;
}
-static const struct irq_domain_ops routable_irq_domain_ops = {
- .map = crossbar_domain_map,
- .unmap = crossbar_domain_unmap,
- .xlate = crossbar_domain_xlate
+static const struct irq_domain_ops crossbar_domain_ops = {
+ .alloc = crossbar_domain_alloc,
+ .free = crossbar_domain_free,
+ .xlate = crossbar_domain_xlate,
};
static int __init crossbar_of_init(struct device_node *node)
cb->write(i, cb->safe_map);
}
- register_routable_domain_ops(&routable_irq_domain_ops);
+ raw_spin_lock_init(&cb->lock);
+
return 0;
err_reg_offset:
return ret;
}
-static const struct of_device_id crossbar_match[] __initconst = {
- { .compatible = "ti,irq-crossbar" },
- {}
-};
-
-int __init irqcrossbar_init(void)
+static int __init irqcrossbar_init(struct device_node *node,
+ struct device_node *parent)
{
- struct device_node *np;
- np = of_find_matching_node(NULL, crossbar_match);
- if (!np)
+ struct irq_domain *parent_domain, *domain;
+ int err;
+
+ if (!parent) {
+ pr_err("%s: no parent, giving up\n", node->full_name);
return -ENODEV;
+ }
+
+ parent_domain = irq_find_host(parent);
+ if (!parent_domain) {
+ pr_err("%s: unable to obtain parent domain\n", node->full_name);
+ return -ENXIO;
+ }
+
+ err = crossbar_of_init(node);
+ if (err)
+ return err;
+
+ domain = irq_domain_add_hierarchy(parent_domain, 0,
+ cb->max_crossbar_sources,
+ node, &crossbar_domain_ops,
+ NULL);
+ if (!domain) {
+ pr_err("%s: failed to allocated domain\n", node->full_name);
+ return -ENOMEM;
+ }
- crossbar_of_init(np);
return 0;
}
+
+IRQCHIP_DECLARE(ti_irqcrossbar, "ti,irq-crossbar", irqcrossbar_init);
} while (1);
}
-static void digicolor_set_gc(void __iomem *reg_base, unsigned irq_base,
- unsigned en_reg, unsigned ack_reg)
+static void __init digicolor_set_gc(void __iomem *reg_base, unsigned irq_base,
+ unsigned en_reg, unsigned ack_reg)
{
struct irq_chip_generic *gc;
/*
* Routines to disable, enable, EOI and route interrupts
*/
+static int gic_peek_irq(struct irq_data *d, u32 offset)
+{
+ u32 mask = 1 << (gic_irq(d) % 32);
+ void __iomem *base;
+
+ if (gic_irq_in_rdist(d))
+ base = gic_data_rdist_sgi_base();
+ else
+ base = gic_data.dist_base;
+
+ return !!(readl_relaxed(base + offset + (gic_irq(d) / 32) * 4) & mask);
+}
+
static void gic_poke_irq(struct irq_data *d, u32 offset)
{
u32 mask = 1 << (gic_irq(d) % 32);
gic_poke_irq(d, GICD_ISENABLER);
}
+static int gic_irq_set_irqchip_state(struct irq_data *d,
+ enum irqchip_irq_state which, bool val)
+{
+ u32 reg;
+
+ if (d->hwirq >= gic_data.irq_nr) /* PPI/SPI only */
+ return -EINVAL;
+
+ switch (which) {
+ case IRQCHIP_STATE_PENDING:
+ reg = val ? GICD_ISPENDR : GICD_ICPENDR;
+ break;
+
+ case IRQCHIP_STATE_ACTIVE:
+ reg = val ? GICD_ISACTIVER : GICD_ICACTIVER;
+ break;
+
+ case IRQCHIP_STATE_MASKED:
+ reg = val ? GICD_ICENABLER : GICD_ISENABLER;
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ gic_poke_irq(d, reg);
+ return 0;
+}
+
+static int gic_irq_get_irqchip_state(struct irq_data *d,
+ enum irqchip_irq_state which, bool *val)
+{
+ if (d->hwirq >= gic_data.irq_nr) /* PPI/SPI only */
+ return -EINVAL;
+
+ switch (which) {
+ case IRQCHIP_STATE_PENDING:
+ *val = gic_peek_irq(d, GICD_ISPENDR);
+ break;
+
+ case IRQCHIP_STATE_ACTIVE:
+ *val = gic_peek_irq(d, GICD_ISACTIVER);
+ break;
+
+ case IRQCHIP_STATE_MASKED:
+ *val = !gic_peek_irq(d, GICD_ISENABLER);
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static void gic_eoi_irq(struct irq_data *d)
{
gic_write_eoir(gic_irq(d));
}
#ifdef CONFIG_SMP
-static int gic_peek_irq(struct irq_data *d, u32 offset)
-{
- u32 mask = 1 << (gic_irq(d) % 32);
- void __iomem *base;
-
- if (gic_irq_in_rdist(d))
- base = gic_data_rdist_sgi_base();
- else
- base = gic_data.dist_base;
-
- return !!(readl_relaxed(base + offset + (gic_irq(d) / 32) * 4) & mask);
-}
-
static int gic_secondary_init(struct notifier_block *nfb,
unsigned long action, void *hcpu)
{
.irq_eoi = gic_eoi_irq,
.irq_set_type = gic_set_type,
.irq_set_affinity = gic_set_affinity,
+ .irq_get_irqchip_state = gic_irq_get_irqchip_state,
+ .irq_set_irqchip_state = gic_irq_set_irqchip_state,
};
#define GIC_ID_NR (1U << gic_data.rdists.id_bits)
/*
* Routines to acknowledge, disable and enable interrupts
*/
-static void gic_mask_irq(struct irq_data *d)
+static void gic_poke_irq(struct irq_data *d, u32 offset)
{
u32 mask = 1 << (gic_irq(d) % 32);
+ writel_relaxed(mask, gic_dist_base(d) + offset + (gic_irq(d) / 32) * 4);
+}
+
+static int gic_peek_irq(struct irq_data *d, u32 offset)
+{
+ u32 mask = 1 << (gic_irq(d) % 32);
+ return !!(readl_relaxed(gic_dist_base(d) + offset + (gic_irq(d) / 32) * 4) & mask);
+}
+
+static void gic_mask_irq(struct irq_data *d)
+{
unsigned long flags;
raw_spin_lock_irqsave(&irq_controller_lock, flags);
- writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + (gic_irq(d) / 32) * 4);
+ gic_poke_irq(d, GIC_DIST_ENABLE_CLEAR);
if (gic_arch_extn.irq_mask)
gic_arch_extn.irq_mask(d);
raw_spin_unlock_irqrestore(&irq_controller_lock, flags);
static void gic_unmask_irq(struct irq_data *d)
{
- u32 mask = 1 << (gic_irq(d) % 32);
unsigned long flags;
raw_spin_lock_irqsave(&irq_controller_lock, flags);
if (gic_arch_extn.irq_unmask)
gic_arch_extn.irq_unmask(d);
- writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_SET + (gic_irq(d) / 32) * 4);
+ gic_poke_irq(d, GIC_DIST_ENABLE_SET);
raw_spin_unlock_irqrestore(&irq_controller_lock, flags);
}
writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI);
}
+static int gic_irq_set_irqchip_state(struct irq_data *d,
+ enum irqchip_irq_state which, bool val)
+{
+ u32 reg;
+
+ switch (which) {
+ case IRQCHIP_STATE_PENDING:
+ reg = val ? GIC_DIST_PENDING_SET : GIC_DIST_PENDING_CLEAR;
+ break;
+
+ case IRQCHIP_STATE_ACTIVE:
+ reg = val ? GIC_DIST_ACTIVE_SET : GIC_DIST_ACTIVE_CLEAR;
+ break;
+
+ case IRQCHIP_STATE_MASKED:
+ reg = val ? GIC_DIST_ENABLE_CLEAR : GIC_DIST_ENABLE_SET;
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ gic_poke_irq(d, reg);
+ return 0;
+}
+
+static int gic_irq_get_irqchip_state(struct irq_data *d,
+ enum irqchip_irq_state which, bool *val)
+{
+ switch (which) {
+ case IRQCHIP_STATE_PENDING:
+ *val = gic_peek_irq(d, GIC_DIST_PENDING_SET);
+ break;
+
+ case IRQCHIP_STATE_ACTIVE:
+ *val = gic_peek_irq(d, GIC_DIST_ACTIVE_SET);
+ break;
+
+ case IRQCHIP_STATE_MASKED:
+ *val = !gic_peek_irq(d, GIC_DIST_ENABLE_SET);
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static int gic_set_type(struct irq_data *d, unsigned int type)
{
void __iomem *base = gic_dist_base(d);
.irq_set_affinity = gic_set_affinity,
#endif
.irq_set_wake = gic_set_wake,
+ .irq_get_irqchip_state = gic_irq_get_irqchip_state,
+ .irq_set_irqchip_state = gic_irq_set_irqchip_state,
};
void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
break;
}
- if (!mask)
+ if (!mask && num_possible_cpus() > 1)
pr_crit("GIC CPU mask not found - kernel will fail to boot.\n");
return mask;
irq_domain_set_info(d, irq, hw, &gic_chip, d->host_data,
handle_fasteoi_irq, NULL, NULL);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
-
- gic_routable_irq_domain_ops->map(d, irq, hw);
}
return 0;
}
static void gic_irq_domain_unmap(struct irq_domain *d, unsigned int irq)
{
- gic_routable_irq_domain_ops->unmap(d, irq);
}
static int gic_irq_domain_xlate(struct irq_domain *d,
*out_hwirq = intspec[1] + 16;
/* For SPIs, we need to add 16 more to get the GIC irq ID number */
- if (!intspec[0]) {
- ret = gic_routable_irq_domain_ops->xlate(d, controller,
- intspec,
- intsize,
- out_hwirq,
- out_type);
-
- if (IS_ERR_VALUE(ret))
- return ret;
- }
+ if (!intspec[0])
+ *out_hwirq += 16;
*out_type = intspec[2] & IRQ_TYPE_SENSE_MASK;
.xlate = gic_irq_domain_xlate,
};
-/* Default functions for routable irq domain */
-static int gic_routable_irq_domain_map(struct irq_domain *d, unsigned int irq,
- irq_hw_number_t hw)
+void gic_set_irqchip_flags(unsigned long flags)
{
- return 0;
+ gic_chip.flags |= flags;
}
-static void gic_routable_irq_domain_unmap(struct irq_domain *d,
- unsigned int irq)
-{
-}
-
-static int gic_routable_irq_domain_xlate(struct irq_domain *d,
- struct device_node *controller,
- const u32 *intspec, unsigned int intsize,
- unsigned long *out_hwirq,
- unsigned int *out_type)
-{
- *out_hwirq += 16;
- return 0;
-}
-
-static const struct irq_domain_ops gic_default_routable_irq_domain_ops = {
- .map = gic_routable_irq_domain_map,
- .unmap = gic_routable_irq_domain_unmap,
- .xlate = gic_routable_irq_domain_xlate,
-};
-
-const struct irq_domain_ops *gic_routable_irq_domain_ops =
- &gic_default_routable_irq_domain_ops;
-
void __init gic_init_bases(unsigned int gic_nr, int irq_start,
void __iomem *dist_base, void __iomem *cpu_base,
u32 percpu_offset, struct device_node *node)
irq_hw_number_t hwirq_base;
struct gic_chip_data *gic;
int gic_irqs, irq_base, i;
- int nr_routable_irqs;
BUG_ON(gic_nr >= MAX_GIC_NR);
gic->gic_irqs = gic_irqs;
if (node) { /* DT case */
- const struct irq_domain_ops *ops = &gic_irq_domain_hierarchy_ops;
-
- if (!of_property_read_u32(node, "arm,routable-irqs",
- &nr_routable_irqs)) {
- ops = &gic_irq_domain_ops;
- gic_irqs = nr_routable_irqs;
- }
-
- gic->domain = irq_domain_add_linear(node, gic_irqs, ops, gic);
+ gic->domain = irq_domain_add_linear(node, gic_irqs,
+ &gic_irq_domain_hierarchy_ops,
+ gic);
} else { /* Non-DT case */
/*
* For primary GICs, skip over SGIs.
return (((cycle_t) hi) << 32) + lo;
}
+
+void gic_start_count(void)
+{
+ u32 gicconfig;
+
+ /* Start the counter */
+ gicconfig = gic_read(GIC_REG(SHARED, GIC_SH_CONFIG));
+ gicconfig &= ~(1 << GIC_SH_CONFIG_COUNTSTOP_SHF);
+ gic_write(GIC_REG(SHARED, GIC_SH_CONFIG), gicconfig);
+}
+
+void gic_stop_count(void)
+{
+ u32 gicconfig;
+
+ /* Stop the counter */
+ gicconfig = gic_read(GIC_REG(SHARED, GIC_SH_CONFIG));
+ gicconfig |= 1 << GIC_SH_CONFIG_COUNTSTOP_SHF;
+ gic_write(GIC_REG(SHARED, GIC_SH_CONFIG), gicconfig);
+}
+
#endif
static bool gic_local_irq_is_routable(int intr)
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
+#include <linux/clk.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/platform_data/irq-renesas-irqc.h>
+#include <linux/pm_runtime.h>
-#define IRQC_IRQ_MAX 32 /* maximum 32 interrupts per driver instance */
+#define IRQC_IRQ_MAX 32 /* maximum 32 interrupts per driver instance */
-#define IRQC_REQ_STS 0x00
-#define IRQC_EN_STS 0x04
-#define IRQC_EN_SET 0x08
+#define IRQC_REQ_STS 0x00 /* Interrupt Request Status Register */
+#define IRQC_EN_STS 0x04 /* Interrupt Enable Status Register */
+#define IRQC_EN_SET 0x08 /* Interrupt Enable Set Register */
#define IRQC_INT_CPU_BASE(n) (0x000 + ((n) * 0x10))
-#define DETECT_STATUS 0x100
+ /* SYS-CPU vs. RT-CPU */
+#define DETECT_STATUS 0x100 /* IRQn Detect Status Register */
+#define MONITOR 0x104 /* IRQn Signal Level Monitor Register */
+#define HLVL_STS 0x108 /* IRQn High Level Detect Status Register */
+#define LLVL_STS 0x10c /* IRQn Low Level Detect Status Register */
+#define S_R_EDGE_STS 0x110 /* IRQn Sync Rising Edge Detect Status Reg. */
+#define S_F_EDGE_STS 0x114 /* IRQn Sync Falling Edge Detect Status Reg. */
+#define A_R_EDGE_STS 0x118 /* IRQn Async Rising Edge Detect Status Reg. */
+#define A_F_EDGE_STS 0x11c /* IRQn Async Falling Edge Detect Status Reg. */
+#define CHTEN_STS 0x120 /* Chattering Reduction Status Register */
#define IRQC_CONFIG(n) (0x180 + ((n) * 0x04))
+ /* IRQn Configuration Register */
struct irqc_irq {
int hw_irq;
struct platform_device *pdev;
struct irq_chip irq_chip;
struct irq_domain *irq_domain;
+ struct clk *clk;
};
static void irqc_dbg(struct irqc_irq *i, char *str)
struct irqc_priv *p = irq_data_get_irq_chip_data(d);
int hw_irq = irqd_to_hwirq(d);
unsigned char value = irqc_sense[type & IRQ_TYPE_SENSE_MASK];
- unsigned long tmp;
+ u32 tmp;
irqc_dbg(&p->irq[hw_irq], "sense");
return 0;
}
+static int irqc_irq_set_wake(struct irq_data *d, unsigned int on)
+{
+ struct irqc_priv *p = irq_data_get_irq_chip_data(d);
+
+ if (!p->clk)
+ return 0;
+
+ if (on)
+ clk_enable(p->clk);
+ else
+ clk_disable(p->clk);
+
+ return 0;
+}
+
static irqreturn_t irqc_irq_handler(int irq, void *dev_id)
{
struct irqc_irq *i = dev_id;
struct irqc_priv *p = i->p;
- unsigned long bit = BIT(i->hw_irq);
+ u32 bit = BIT(i->hw_irq);
irqc_dbg(i, "demux1");
p->pdev = pdev;
platform_set_drvdata(pdev, p);
+ p->clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(p->clk)) {
+ dev_warn(&pdev->dev, "unable to get clock\n");
+ p->clk = NULL;
+ }
+
+ pm_runtime_enable(&pdev->dev);
+ pm_runtime_get_sync(&pdev->dev);
+
/* get hold of manadatory IOMEM */
io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!io) {
irq_chip->irq_mask = irqc_irq_disable;
irq_chip->irq_unmask = irqc_irq_enable;
irq_chip->irq_set_type = irqc_irq_set_type;
- irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
+ irq_chip->irq_set_wake = irqc_irq_set_wake;
+ irq_chip->flags = IRQCHIP_MASK_ON_SUSPEND;
p->irq_domain = irq_domain_add_simple(pdev->dev.of_node,
p->number_of_irqs,
err2:
iounmap(p->iomem);
err1:
+ pm_runtime_put(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
kfree(p);
err0:
return ret;
irq_domain_remove(p->irq_domain);
iounmap(p->iomem);
+ pm_runtime_put(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
kfree(p);
return 0;
}
--- /dev/null
+/*
+ * Copyright (C) 2014 STMicroelectronics – All Rights Reserved
+ *
+ * Author: Lee Jones <lee.jones@linaro.org>
+ *
+ * This is a re-write of Christophe Kerello's PMU driver.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <dt-bindings/interrupt-controller/irq-st.h>
+#include <linux/err.h>
+#include <linux/mfd/syscon.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+
+#define STIH415_SYSCFG_642 0x0a8
+#define STIH416_SYSCFG_7543 0x87c
+#define STIH407_SYSCFG_5102 0x198
+#define STID127_SYSCFG_734 0x088
+
+#define ST_A9_IRQ_MASK 0x001FFFFF
+#define ST_A9_IRQ_MAX_CHANS 2
+
+#define ST_A9_IRQ_EN_CTI_0 BIT(0)
+#define ST_A9_IRQ_EN_CTI_1 BIT(1)
+#define ST_A9_IRQ_EN_PMU_0 BIT(2)
+#define ST_A9_IRQ_EN_PMU_1 BIT(3)
+#define ST_A9_IRQ_EN_PL310_L2 BIT(4)
+#define ST_A9_IRQ_EN_EXT_0 BIT(5)
+#define ST_A9_IRQ_EN_EXT_1 BIT(6)
+#define ST_A9_IRQ_EN_EXT_2 BIT(7)
+
+#define ST_A9_FIQ_N_SEL(dev, chan) (dev << (8 + (chan * 3)))
+#define ST_A9_IRQ_N_SEL(dev, chan) (dev << (14 + (chan * 3)))
+#define ST_A9_EXTIRQ_INV_SEL(dev) (dev << 20)
+
+struct st_irq_syscfg {
+ struct regmap *regmap;
+ unsigned int syscfg;
+ unsigned int config;
+ bool ext_inverted;
+};
+
+static const struct of_device_id st_irq_syscfg_match[] = {
+ {
+ .compatible = "st,stih415-irq-syscfg",
+ .data = (void *)STIH415_SYSCFG_642,
+ },
+ {
+ .compatible = "st,stih416-irq-syscfg",
+ .data = (void *)STIH416_SYSCFG_7543,
+ },
+ {
+ .compatible = "st,stih407-irq-syscfg",
+ .data = (void *)STIH407_SYSCFG_5102,
+ },
+ {
+ .compatible = "st,stid127-irq-syscfg",
+ .data = (void *)STID127_SYSCFG_734,
+ },
+ {}
+};
+
+static int st_irq_xlate(struct platform_device *pdev,
+ int device, int channel, bool irq)
+{
+ struct st_irq_syscfg *ddata = dev_get_drvdata(&pdev->dev);
+
+ /* Set the device enable bit. */
+ switch (device) {
+ case ST_IRQ_SYSCFG_EXT_0:
+ ddata->config |= ST_A9_IRQ_EN_EXT_0;
+ break;
+ case ST_IRQ_SYSCFG_EXT_1:
+ ddata->config |= ST_A9_IRQ_EN_EXT_1;
+ break;
+ case ST_IRQ_SYSCFG_EXT_2:
+ ddata->config |= ST_A9_IRQ_EN_EXT_2;
+ break;
+ case ST_IRQ_SYSCFG_CTI_0:
+ ddata->config |= ST_A9_IRQ_EN_CTI_0;
+ break;
+ case ST_IRQ_SYSCFG_CTI_1:
+ ddata->config |= ST_A9_IRQ_EN_CTI_1;
+ break;
+ case ST_IRQ_SYSCFG_PMU_0:
+ ddata->config |= ST_A9_IRQ_EN_PMU_0;
+ break;
+ case ST_IRQ_SYSCFG_PMU_1:
+ ddata->config |= ST_A9_IRQ_EN_PMU_1;
+ break;
+ case ST_IRQ_SYSCFG_pl310_L2:
+ ddata->config |= ST_A9_IRQ_EN_PL310_L2;
+ break;
+ case ST_IRQ_SYSCFG_DISABLED:
+ return 0;
+ default:
+ dev_err(&pdev->dev, "Unrecognised device %d\n", device);
+ return -EINVAL;
+ }
+
+ /* Select IRQ/FIQ channel for device. */
+ ddata->config |= irq ?
+ ST_A9_IRQ_N_SEL(device, channel) :
+ ST_A9_FIQ_N_SEL(device, channel);
+
+ return 0;
+}
+
+static int st_irq_syscfg_enable(struct platform_device *pdev)
+{
+ struct device_node *np = pdev->dev.of_node;
+ struct st_irq_syscfg *ddata = dev_get_drvdata(&pdev->dev);
+ int channels, ret, i;
+ u32 device, invert;
+
+ channels = of_property_count_u32_elems(np, "st,irq-device");
+ if (channels != ST_A9_IRQ_MAX_CHANS) {
+ dev_err(&pdev->dev, "st,enable-irq-device must have 2 elems\n");
+ return -EINVAL;
+ }
+
+ channels = of_property_count_u32_elems(np, "st,fiq-device");
+ if (channels != ST_A9_IRQ_MAX_CHANS) {
+ dev_err(&pdev->dev, "st,enable-fiq-device must have 2 elems\n");
+ return -EINVAL;
+ }
+
+ for (i = 0; i < ST_A9_IRQ_MAX_CHANS; i++) {
+ of_property_read_u32_index(np, "st,irq-device", i, &device);
+
+ ret = st_irq_xlate(pdev, device, i, true);
+ if (ret)
+ return ret;
+
+ of_property_read_u32_index(np, "st,fiq-device", i, &device);
+
+ ret = st_irq_xlate(pdev, device, i, false);
+ if (ret)
+ return ret;
+ }
+
+ /* External IRQs may be inverted. */
+ of_property_read_u32(np, "st,invert-ext", &invert);
+ ddata->config |= ST_A9_EXTIRQ_INV_SEL(invert);
+
+ return regmap_update_bits(ddata->regmap, ddata->syscfg,
+ ST_A9_IRQ_MASK, ddata->config);
+}
+
+static int st_irq_syscfg_probe(struct platform_device *pdev)
+{
+ struct device_node *np = pdev->dev.of_node;
+ const struct of_device_id *match;
+ struct st_irq_syscfg *ddata;
+
+ ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
+ if (!ddata)
+ return -ENOMEM;
+
+ match = of_match_device(st_irq_syscfg_match, &pdev->dev);
+ if (!match)
+ return -ENODEV;
+
+ ddata->syscfg = (unsigned int)match->data;
+
+ ddata->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg");
+ if (IS_ERR(ddata->regmap)) {
+ dev_err(&pdev->dev, "syscfg phandle missing\n");
+ return PTR_ERR(ddata->regmap);
+ }
+
+ dev_set_drvdata(&pdev->dev, ddata);
+
+ return st_irq_syscfg_enable(pdev);
+}
+
+static int st_irq_syscfg_resume(struct device *dev)
+{
+ struct st_irq_syscfg *ddata = dev_get_drvdata(dev);
+
+ return regmap_update_bits(ddata->regmap, ddata->syscfg,
+ ST_A9_IRQ_MASK, ddata->config);
+}
+
+static SIMPLE_DEV_PM_OPS(st_irq_syscfg_pm_ops, NULL, st_irq_syscfg_resume);
+
+static struct platform_driver st_irq_syscfg_driver = {
+ .driver = {
+ .name = "st_irq_syscfg",
+ .pm = &st_irq_syscfg_pm_ops,
+ .of_match_table = st_irq_syscfg_match,
+ },
+ .probe = st_irq_syscfg_probe,
+};
+
+static int __init st_irq_syscfg_init(void)
+{
+ return platform_driver_register(&st_irq_syscfg_driver);
+}
+core_initcall(st_irq_syscfg_init);
--- /dev/null
+/*
+ * Driver code for Tegra's Legacy Interrupt Controller
+ *
+ * Author: Marc Zyngier <marc.zyngier@arm.com>
+ *
+ * Heavily based on the original arch/arm/mach-tegra/irq.c code:
+ * Copyright (C) 2011 Google, Inc.
+ *
+ * Author:
+ * Colin Cross <ccross@android.com>
+ *
+ * Copyright (C) 2010,2013, NVIDIA Corporation
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+#include <linux/syscore_ops.h>
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+#include "irqchip.h"
+
+#define ICTLR_CPU_IEP_VFIQ 0x08
+#define ICTLR_CPU_IEP_FIR 0x14
+#define ICTLR_CPU_IEP_FIR_SET 0x18
+#define ICTLR_CPU_IEP_FIR_CLR 0x1c
+
+#define ICTLR_CPU_IER 0x20
+#define ICTLR_CPU_IER_SET 0x24
+#define ICTLR_CPU_IER_CLR 0x28
+#define ICTLR_CPU_IEP_CLASS 0x2C
+
+#define ICTLR_COP_IER 0x30
+#define ICTLR_COP_IER_SET 0x34
+#define ICTLR_COP_IER_CLR 0x38
+#define ICTLR_COP_IEP_CLASS 0x3c
+
+#define TEGRA_MAX_NUM_ICTLRS 6
+
+static unsigned int num_ictlrs;
+
+struct tegra_ictlr_soc {
+ unsigned int num_ictlrs;
+};
+
+static const struct tegra_ictlr_soc tegra20_ictlr_soc = {
+ .num_ictlrs = 4,
+};
+
+static const struct tegra_ictlr_soc tegra30_ictlr_soc = {
+ .num_ictlrs = 5,
+};
+
+static const struct tegra_ictlr_soc tegra210_ictlr_soc = {
+ .num_ictlrs = 6,
+};
+
+static const struct of_device_id ictlr_matches[] = {
+ { .compatible = "nvidia,tegra210-ictlr", .data = &tegra210_ictlr_soc },
+ { .compatible = "nvidia,tegra30-ictlr", .data = &tegra30_ictlr_soc },
+ { .compatible = "nvidia,tegra20-ictlr", .data = &tegra20_ictlr_soc },
+ { }
+};
+
+struct tegra_ictlr_info {
+ void __iomem *base[TEGRA_MAX_NUM_ICTLRS];
+#ifdef CONFIG_PM_SLEEP
+ u32 cop_ier[TEGRA_MAX_NUM_ICTLRS];
+ u32 cop_iep[TEGRA_MAX_NUM_ICTLRS];
+ u32 cpu_ier[TEGRA_MAX_NUM_ICTLRS];
+ u32 cpu_iep[TEGRA_MAX_NUM_ICTLRS];
+
+ u32 ictlr_wake_mask[TEGRA_MAX_NUM_ICTLRS];
+#endif
+};
+
+static struct tegra_ictlr_info *lic;
+
+static inline void tegra_ictlr_write_mask(struct irq_data *d, unsigned long reg)
+{
+ void __iomem *base = d->chip_data;
+ u32 mask;
+
+ mask = BIT(d->hwirq % 32);
+ writel_relaxed(mask, base + reg);
+}
+
+static void tegra_mask(struct irq_data *d)
+{
+ tegra_ictlr_write_mask(d, ICTLR_CPU_IER_CLR);
+ irq_chip_mask_parent(d);
+}
+
+static void tegra_unmask(struct irq_data *d)
+{
+ tegra_ictlr_write_mask(d, ICTLR_CPU_IER_SET);
+ irq_chip_unmask_parent(d);
+}
+
+static void tegra_eoi(struct irq_data *d)
+{
+ tegra_ictlr_write_mask(d, ICTLR_CPU_IEP_FIR_CLR);
+ irq_chip_eoi_parent(d);
+}
+
+static int tegra_retrigger(struct irq_data *d)
+{
+ tegra_ictlr_write_mask(d, ICTLR_CPU_IEP_FIR_SET);
+ return irq_chip_retrigger_hierarchy(d);
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int tegra_set_wake(struct irq_data *d, unsigned int enable)
+{
+ u32 irq = d->hwirq;
+ u32 index, mask;
+
+ index = (irq / 32);
+ mask = BIT(irq % 32);
+ if (enable)
+ lic->ictlr_wake_mask[index] |= mask;
+ else
+ lic->ictlr_wake_mask[index] &= ~mask;
+
+ /*
+ * Do *not* call into the parent, as the GIC doesn't have any
+ * wake-up facility...
+ */
+ return 0;
+}
+
+static int tegra_ictlr_suspend(void)
+{
+ unsigned long flags;
+ unsigned int i;
+
+ local_irq_save(flags);
+ for (i = 0; i < num_ictlrs; i++) {
+ void __iomem *ictlr = lic->base[i];
+
+ /* Save interrupt state */
+ lic->cpu_ier[i] = readl_relaxed(ictlr + ICTLR_CPU_IER);
+ lic->cpu_iep[i] = readl_relaxed(ictlr + ICTLR_CPU_IEP_CLASS);
+ lic->cop_ier[i] = readl_relaxed(ictlr + ICTLR_COP_IER);
+ lic->cop_iep[i] = readl_relaxed(ictlr + ICTLR_COP_IEP_CLASS);
+
+ /* Disable COP interrupts */
+ writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR);
+
+ /* Disable CPU interrupts */
+ writel_relaxed(~0ul, ictlr + ICTLR_CPU_IER_CLR);
+
+ /* Enable the wakeup sources of ictlr */
+ writel_relaxed(lic->ictlr_wake_mask[i], ictlr + ICTLR_CPU_IER_SET);
+ }
+ local_irq_restore(flags);
+
+ return 0;
+}
+
+static void tegra_ictlr_resume(void)
+{
+ unsigned long flags;
+ unsigned int i;
+
+ local_irq_save(flags);
+ for (i = 0; i < num_ictlrs; i++) {
+ void __iomem *ictlr = lic->base[i];
+
+ writel_relaxed(lic->cpu_iep[i],
+ ictlr + ICTLR_CPU_IEP_CLASS);
+ writel_relaxed(~0ul, ictlr + ICTLR_CPU_IER_CLR);
+ writel_relaxed(lic->cpu_ier[i],
+ ictlr + ICTLR_CPU_IER_SET);
+ writel_relaxed(lic->cop_iep[i],
+ ictlr + ICTLR_COP_IEP_CLASS);
+ writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR);
+ writel_relaxed(lic->cop_ier[i],
+ ictlr + ICTLR_COP_IER_SET);
+ }
+ local_irq_restore(flags);
+}
+
+static struct syscore_ops tegra_ictlr_syscore_ops = {
+ .suspend = tegra_ictlr_suspend,
+ .resume = tegra_ictlr_resume,
+};
+
+static void tegra_ictlr_syscore_init(void)
+{
+ register_syscore_ops(&tegra_ictlr_syscore_ops);
+}
+#else
+#define tegra_set_wake NULL
+static inline void tegra_ictlr_syscore_init(void) {}
+#endif
+
+static struct irq_chip tegra_ictlr_chip = {
+ .name = "LIC",
+ .irq_eoi = tegra_eoi,
+ .irq_mask = tegra_mask,
+ .irq_unmask = tegra_unmask,
+ .irq_retrigger = tegra_retrigger,
+ .irq_set_wake = tegra_set_wake,
+ .flags = IRQCHIP_MASK_ON_SUSPEND,
+#ifdef CONFIG_SMP
+ .irq_set_affinity = irq_chip_set_affinity_parent,
+#endif
+};
+
+static int tegra_ictlr_domain_xlate(struct irq_domain *domain,
+ struct device_node *controller,
+ const u32 *intspec,
+ unsigned int intsize,
+ unsigned long *out_hwirq,
+ unsigned int *out_type)
+{
+ if (domain->of_node != controller)
+ return -EINVAL; /* Shouldn't happen, really... */
+ if (intsize != 3)
+ return -EINVAL; /* Not GIC compliant */
+ if (intspec[0] != GIC_SPI)
+ return -EINVAL; /* No PPI should point to this domain */
+
+ *out_hwirq = intspec[1];
+ *out_type = intspec[2];
+ return 0;
+}
+
+static int tegra_ictlr_domain_alloc(struct irq_domain *domain,
+ unsigned int virq,
+ unsigned int nr_irqs, void *data)
+{
+ struct of_phandle_args *args = data;
+ struct of_phandle_args parent_args;
+ struct tegra_ictlr_info *info = domain->host_data;
+ irq_hw_number_t hwirq;
+ unsigned int i;
+
+ if (args->args_count != 3)
+ return -EINVAL; /* Not GIC compliant */
+ if (args->args[0] != GIC_SPI)
+ return -EINVAL; /* No PPI should point to this domain */
+
+ hwirq = args->args[1];
+ if (hwirq >= (num_ictlrs * 32))
+ return -EINVAL;
+
+ for (i = 0; i < nr_irqs; i++) {
+ int ictlr = (hwirq + i) / 32;
+
+ irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
+ &tegra_ictlr_chip,
+ &info->base[ictlr]);
+ }
+
+ parent_args = *args;
+ parent_args.np = domain->parent->of_node;
+ return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &parent_args);
+}
+
+static void tegra_ictlr_domain_free(struct irq_domain *domain,
+ unsigned int virq,
+ unsigned int nr_irqs)
+{
+ unsigned int i;
+
+ for (i = 0; i < nr_irqs; i++) {
+ struct irq_data *d = irq_domain_get_irq_data(domain, virq + i);
+ irq_domain_reset_irq_data(d);
+ }
+}
+
+static const struct irq_domain_ops tegra_ictlr_domain_ops = {
+ .xlate = tegra_ictlr_domain_xlate,
+ .alloc = tegra_ictlr_domain_alloc,
+ .free = tegra_ictlr_domain_free,
+};
+
+static int __init tegra_ictlr_init(struct device_node *node,
+ struct device_node *parent)
+{
+ struct irq_domain *parent_domain, *domain;
+ const struct of_device_id *match;
+ const struct tegra_ictlr_soc *soc;
+ unsigned int i;
+ int err;
+
+ if (!parent) {
+ pr_err("%s: no parent, giving up\n", node->full_name);
+ return -ENODEV;
+ }
+
+ parent_domain = irq_find_host(parent);
+ if (!parent_domain) {
+ pr_err("%s: unable to obtain parent domain\n", node->full_name);
+ return -ENXIO;
+ }
+
+ match = of_match_node(ictlr_matches, node);
+ if (!match) /* Should never happen... */
+ return -ENODEV;
+
+ soc = match->data;
+
+ lic = kzalloc(sizeof(*lic), GFP_KERNEL);
+ if (!lic)
+ return -ENOMEM;
+
+ for (i = 0; i < TEGRA_MAX_NUM_ICTLRS; i++) {
+ void __iomem *base;
+
+ base = of_iomap(node, i);
+ if (!base)
+ break;
+
+ lic->base[i] = base;
+
+ /* Disable all interrupts */
+ writel_relaxed(~0UL, base + ICTLR_CPU_IER_CLR);
+ /* All interrupts target IRQ */
+ writel_relaxed(0, base + ICTLR_CPU_IEP_CLASS);
+
+ num_ictlrs++;
+ }
+
+ if (!num_ictlrs) {
+ pr_err("%s: no valid regions, giving up\n", node->full_name);
+ err = -ENOMEM;
+ goto out_free;
+ }
+
+ WARN(num_ictlrs != soc->num_ictlrs,
+ "%s: Found %u interrupt controllers in DT; expected %u.\n",
+ node->full_name, num_ictlrs, soc->num_ictlrs);
+
+
+ domain = irq_domain_add_hierarchy(parent_domain, 0, num_ictlrs * 32,
+ node, &tegra_ictlr_domain_ops,
+ lic);
+ if (!domain) {
+ pr_err("%s: failed to allocated domain\n", node->full_name);
+ err = -ENOMEM;
+ goto out_unmap;
+ }
+
+ tegra_ictlr_syscore_init();
+
+ pr_info("%s: %d interrupts forwarded to %s\n",
+ node->full_name, num_ictlrs * 32, parent->full_name);
+
+ return 0;
+
+out_unmap:
+ for (i = 0; i < num_ictlrs; i++)
+ iounmap(lic->base[i]);
+out_free:
+ kfree(lic);
+ return err;
+}
+
+IRQCHIP_DECLARE(tegra20_ictlr, "nvidia,tegra20-ictlr", tegra_ictlr_init);
+IRQCHIP_DECLARE(tegra30_ictlr, "nvidia,tegra30-ictlr", tegra_ictlr_init);
+IRQCHIP_DECLARE(tegra210_ictlr, "nvidia,tegra210-ictlr", tegra_ictlr_init);
--- /dev/null
+/*
+ * Copyright (C) 2014-2015 Toradex AG
+ * Author: Stefan Agner <stefan@agner.ch>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *
+ * IRQ chip driver for MSCM interrupt router available on Vybrid SoC's.
+ * The interrupt router is between the CPU's interrupt controller and the
+ * peripheral. The router allows to route the peripheral interrupts to
+ * one of the two available CPU's on Vybrid VF6xx SoC's (Cortex-A5 or
+ * Cortex-M4). The router will be configured transparently on a IRQ
+ * request.
+ *
+ * o All peripheral interrupts of the Vybrid SoC can be routed to
+ * CPU 0, CPU 1 or both. The routing is useful for dual-core
+ * variants of Vybrid SoC such as VF6xx. This driver routes the
+ * requested interrupt to the CPU currently running on.
+ *
+ * o It is required to setup the interrupt router even on single-core
+ * variants of Vybrid.
+ */
+
+#include <linux/cpu_pm.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/mfd/syscon.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+#include <linux/regmap.h>
+
+#include "irqchip.h"
+
+#define MSCM_CPxNUM 0x4
+
+#define MSCM_IRSPRC(n) (0x80 + 2 * (n))
+#define MSCM_IRSPRC_CPEN_MASK 0x3
+
+#define MSCM_IRSPRC_NUM 112
+
+struct vf610_mscm_ir_chip_data {
+ void __iomem *mscm_ir_base;
+ u16 cpu_mask;
+ u16 saved_irsprc[MSCM_IRSPRC_NUM];
+};
+
+static struct vf610_mscm_ir_chip_data *mscm_ir_data;
+
+static inline void vf610_mscm_ir_save(struct vf610_mscm_ir_chip_data *data)
+{
+ int i;
+
+ for (i = 0; i < MSCM_IRSPRC_NUM; i++)
+ data->saved_irsprc[i] = readw_relaxed(data->mscm_ir_base + MSCM_IRSPRC(i));
+}
+
+static inline void vf610_mscm_ir_restore(struct vf610_mscm_ir_chip_data *data)
+{
+ int i;
+
+ for (i = 0; i < MSCM_IRSPRC_NUM; i++)
+ writew_relaxed(data->saved_irsprc[i], data->mscm_ir_base + MSCM_IRSPRC(i));
+}
+
+static int vf610_mscm_ir_notifier(struct notifier_block *self,
+ unsigned long cmd, void *v)
+{
+ switch (cmd) {
+ case CPU_CLUSTER_PM_ENTER:
+ vf610_mscm_ir_save(mscm_ir_data);
+ break;
+ case CPU_CLUSTER_PM_ENTER_FAILED:
+ case CPU_CLUSTER_PM_EXIT:
+ vf610_mscm_ir_restore(mscm_ir_data);
+ break;
+ }
+
+ return NOTIFY_OK;
+}
+
+static struct notifier_block mscm_ir_notifier_block = {
+ .notifier_call = vf610_mscm_ir_notifier,
+};
+
+static void vf610_mscm_ir_enable(struct irq_data *data)
+{
+ irq_hw_number_t hwirq = data->hwirq;
+ struct vf610_mscm_ir_chip_data *chip_data = data->chip_data;
+ u16 irsprc;
+
+ irsprc = readw_relaxed(chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq));
+ irsprc &= MSCM_IRSPRC_CPEN_MASK;
+
+ WARN_ON(irsprc & ~chip_data->cpu_mask);
+
+ writew_relaxed(chip_data->cpu_mask,
+ chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq));
+
+ irq_chip_unmask_parent(data);
+}
+
+static void vf610_mscm_ir_disable(struct irq_data *data)
+{
+ irq_hw_number_t hwirq = data->hwirq;
+ struct vf610_mscm_ir_chip_data *chip_data = data->chip_data;
+
+ writew_relaxed(0x0, chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq));
+
+ irq_chip_mask_parent(data);
+}
+
+static struct irq_chip vf610_mscm_ir_irq_chip = {
+ .name = "mscm-ir",
+ .irq_mask = irq_chip_mask_parent,
+ .irq_unmask = irq_chip_unmask_parent,
+ .irq_eoi = irq_chip_eoi_parent,
+ .irq_enable = vf610_mscm_ir_enable,
+ .irq_disable = vf610_mscm_ir_disable,
+ .irq_retrigger = irq_chip_retrigger_hierarchy,
+ .irq_set_affinity = irq_chip_set_affinity_parent,
+};
+
+static int vf610_mscm_ir_domain_alloc(struct irq_domain *domain, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ int i;
+ irq_hw_number_t hwirq;
+ struct of_phandle_args *irq_data = arg;
+ struct of_phandle_args gic_data;
+
+ if (irq_data->args_count != 2)
+ return -EINVAL;
+
+ hwirq = irq_data->args[0];
+ for (i = 0; i < nr_irqs; i++)
+ irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
+ &vf610_mscm_ir_irq_chip,
+ domain->host_data);
+
+ gic_data.np = domain->parent->of_node;
+ gic_data.args_count = 3;
+ gic_data.args[0] = GIC_SPI;
+ gic_data.args[1] = irq_data->args[0];
+ gic_data.args[2] = irq_data->args[1];
+ return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &gic_data);
+}
+
+static const struct irq_domain_ops mscm_irq_domain_ops = {
+ .xlate = irq_domain_xlate_twocell,
+ .alloc = vf610_mscm_ir_domain_alloc,
+ .free = irq_domain_free_irqs_common,
+};
+
+static int __init vf610_mscm_ir_of_init(struct device_node *node,
+ struct device_node *parent)
+{
+ struct irq_domain *domain, *domain_parent;
+ struct regmap *mscm_cp_regmap;
+ int ret, cpuid;
+
+ domain_parent = irq_find_host(parent);
+ if (!domain_parent) {
+ pr_err("vf610_mscm_ir: interrupt-parent not found\n");
+ return -EINVAL;
+ }
+
+ mscm_ir_data = kzalloc(sizeof(*mscm_ir_data), GFP_KERNEL);
+ if (!mscm_ir_data)
+ return -ENOMEM;
+
+ mscm_ir_data->mscm_ir_base = of_io_request_and_map(node, 0, "mscm-ir");
+
+ if (!mscm_ir_data->mscm_ir_base) {
+ pr_err("vf610_mscm_ir: unable to map mscm register\n");
+ ret = -ENOMEM;
+ goto out_free;
+ }
+
+ mscm_cp_regmap = syscon_regmap_lookup_by_phandle(node, "fsl,cpucfg");
+ if (IS_ERR(mscm_cp_regmap)) {
+ ret = PTR_ERR(mscm_cp_regmap);
+ pr_err("vf610_mscm_ir: regmap lookup for cpucfg failed\n");
+ goto out_unmap;
+ }
+
+ regmap_read(mscm_cp_regmap, MSCM_CPxNUM, &cpuid);
+ mscm_ir_data->cpu_mask = 0x1 << cpuid;
+
+ domain = irq_domain_add_hierarchy(domain_parent, 0,
+ MSCM_IRSPRC_NUM, node,
+ &mscm_irq_domain_ops, mscm_ir_data);
+ if (!domain) {
+ ret = -ENOMEM;
+ goto out_unmap;
+ }
+
+ cpu_pm_register_notifier(&mscm_ir_notifier_block);
+
+ return 0;
+
+out_unmap:
+ iounmap(mscm_ir_data->mscm_ir_base);
+out_free:
+ kfree(mscm_ir_data);
+ return ret;
+}
+IRQCHIP_DECLARE(vf610_mscm_ir, "fsl,vf610-mscm-ir", vf610_mscm_ir_of_init);
}
card->ci = get_card_info(ent->driver_data);
if (!card->ci) {
- pr_info("mISDN: do not have informations about adapter at %s\n",
+ pr_info("mISDN: do not have information about adapter at %s\n",
pci_name(pdev));
kfree(card);
pci_disable_device(pdev);
}
}
printk(KERN_WARNING
- "%s: dsp is not present in its own conf_meber list.\n",
+ "%s: dsp is not present in its own conf_member list.\n",
__func__);
return -EINVAL;
}
if (dsp_debug & DEBUG_DSP_CORE)
printk(KERN_DEBUG "%s: enable mixing of "
- "tx-data with conf mebers\n", __func__);
+ "tx-data with conf members\n", __func__);
dsp->tx_mix = 1;
dsp_cmx_hardware(dsp->conf, dsp);
dsp_rx_off(dsp);
}
if (dsp_debug & DEBUG_DSP_CORE)
printk(KERN_DEBUG "%s: disable mixing of "
- "tx-data with conf mebers\n", __func__);
+ "tx-data with conf members\n", __func__);
dsp->tx_mix = 0;
dsp_cmx_hardware(dsp->conf, dsp);
dsp_rx_off(dsp);
const int rw = bio_data_dir(bio);
struct mddev *mddev = q->queuedata;
unsigned int sectors;
+ int cpu;
if (mddev == NULL || mddev->pers == NULL
|| !mddev->ready) {
sectors = bio_sectors(bio);
mddev->pers->make_request(mddev, bio);
- generic_start_io_acct(rw, sectors, &mddev->gendisk->part0);
+ cpu = part_stat_lock();
+ part_stat_inc(cpu, &mddev->gendisk->part0, ios[rw]);
+ part_stat_add(cpu, &mddev->gendisk->part0, sectors[rw], sectors);
+ part_stat_unlock();
if (atomic_dec_and_test(&mddev->active_io) && mddev->suspended)
wake_up(&mddev->sb_wait);
/*
* remaps the bio to the target device. we separate two flows.
- * power 2 flow and a general flow for the sake of perfromance
+ * power 2 flow and a general flow for the sake of performance
*/
static struct md_rdev *map_sector(struct mddev *mddev, struct strip_zone *zone,
sector_t sector, sector_t *sector_offset)
split = bio;
}
+ sector = bio->bi_iter.bi_sector;
zone = find_zone(mddev->private, §or);
tmp_dev = map_sector(mddev, zone, sector, §or);
split->bi_bdev = tmp_dev->bdev;
/* request the firmware, this will block and timeout */
ret = request_firmware(&fw, fw_file, priv->i2c->dev.parent);
if (ret) {
- dev_err(&priv->i2c->dev, "%s: firmare file '%s' not found\n",
+ dev_err(&priv->i2c->dev, "%s: firmware file '%s' not found\n",
KBUILD_MODNAME, fw_file);
goto err;
}
dev->regmap_config.max_register = 5 * 0x100,
dev->regmap_config.ranges = regmap_range_cfg,
dev->regmap_config.num_ranges = ARRAY_SIZE(regmap_range_cfg),
- dev->regmap_config.cache_type = REGCACHE_RBTREE,
+ dev->regmap_config.cache_type = REGCACHE_NONE,
dev->regmap = regmap_init(&client->dev, ®map_bus, client,
&dev->regmap_config);
if (IS_ERR(dev->regmap)) {
bool ts_clock_inv;
};
-/* firmare command struct */
+/* firmware command struct */
#define SI2168_ARGLEN 30
struct si2168_cmd {
u8 args[SI2168_ARGLEN];
#define CMD_BER_CONTROL 0x3e
#define CMD_BER_UPDATE_COUNTERS 0x3f
-/* firmare command struct */
+/* firmware command struct */
#define TDA10071_ARGLEN 30
struct tda10071_cmd {
u8 args[TDA10071_ARGLEN];
strlcpy(cap->driver, dev->name, sizeof(cap->driver));
strlcpy(cap->card, cx23885_boards[tsport->dev->board].name,
sizeof(cap->card));
- sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci));
- cap->capabilities =
- V4L2_CAP_VIDEO_CAPTURE |
- V4L2_CAP_READWRITE |
- V4L2_CAP_STREAMING |
- 0;
+ sprintf(cap->bus_info, "PCIe:%s", pci_name(dev->pci));
+ cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
+ V4L2_CAP_STREAMING;
if (dev->tuner_type != TUNER_ABSENT)
- cap->capabilities |= V4L2_CAP_TUNER;
+ cap->device_caps |= V4L2_CAP_TUNER;
+ cap->capabilities = cap->device_caps | V4L2_CAP_VBI_CAPTURE |
+ V4L2_CAP_AUDIO | V4L2_CAP_DEVICE_CAPS;
return 0;
}
struct s5p_jpeg_addr jpeg_addr;
u32 pix_size, padding_bytes = 0;
+ jpeg_addr.cb = 0;
+ jpeg_addr.cr = 0;
+
pix_size = ctx->cap_q.w * ctx->cap_q.h;
if (ctx->mode == S5P_JPEG_ENCODE) {
void exynos3250_jpeg_reset(void __iomem *regs)
{
- u32 reg = 0;
+ u32 reg = 1;
int count = 1000;
writel(1, regs + EXYNOS3250_SW_RESET);
q->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
q->io_modes = VB2_MMAP;
q->drv_priv = &ctx->fh;
+ q->lock = &dev->mfc_mutex;
if (vdev == dev->vfd_dec) {
q->io_modes = VB2_MMAP;
q->ops = get_dec_queue_ops();
/* Offset base used to differentiate between CAPTURE and OUTPUT
* while mmaping */
-#define DST_QUEUE_OFF_BASE (TASK_SIZE / 2)
+#define DST_QUEUE_OFF_BASE (1 << 30)
#define MFC_BANK1_ALLOC_CTX 0
#define MFC_BANK2_ALLOC_CTX 1
void (*write_info)(struct s5p_mfc_ctx *ctx, unsigned int data,
unsigned int ofs);
unsigned int (*read_info)(struct s5p_mfc_ctx *ctx,
- unsigned int ofs);
+ unsigned long ofs);
int (*get_dspl_y_adr)(struct s5p_mfc_dev *dev);
int (*get_dec_y_adr)(struct s5p_mfc_dev *dev);
int (*get_dspl_status)(struct s5p_mfc_dev *dev);
static void s5p_mfc_write_info_v5(struct s5p_mfc_ctx *ctx, unsigned int data,
unsigned int ofs)
{
- writel(data, (volatile void __iomem *)(ctx->shm.virt + ofs));
+ writel(data, (void *)(ctx->shm.virt + ofs));
wmb();
}
static unsigned int s5p_mfc_read_info_v5(struct s5p_mfc_ctx *ctx,
- unsigned int ofs)
+ unsigned long ofs)
{
rmb();
- return readl((volatile void __iomem *)(ctx->shm.virt + ofs));
+ return readl((void *)(ctx->shm.virt + ofs));
}
static void s5p_mfc_dec_calc_dpb_size_v5(struct s5p_mfc_ctx *ctx)
unsigned int ofs)
{
s5p_mfc_clock_on();
- writel(data, (volatile void __iomem *)((unsigned long)ofs));
+ writel(data, (void *)((unsigned long)ofs));
s5p_mfc_clock_off();
}
static unsigned int
-s5p_mfc_read_info_v6(struct s5p_mfc_ctx *ctx, unsigned int ofs)
+s5p_mfc_read_info_v6(struct s5p_mfc_ctx *ctx, unsigned long ofs)
{
int ret;
s5p_mfc_clock_on();
- ret = readl((volatile void __iomem *)((unsigned long)ofs));
+ ret = readl((void *)ofs);
s5p_mfc_clock_off();
return ret;
config VIDEO_SAMSUNG_S5P_HDMI
tristate "Samsung HDMI Driver"
depends on VIDEO_V4L2
+ depends on I2C
depends on VIDEO_SAMSUNG_S5P_TV
select VIDEO_SAMSUNG_S5P_HDMIPHY
help
}
*vdev = sh_veu_videodev;
+ vdev->v4l2_dev = &veu->v4l2_dev;
spin_lock_init(&veu->lock);
mutex_init(&veu->fop_lock);
vdev->lock = &veu->fop_lock;
if (isi->pdata.full_mode)
cfg1 |= ISI_CFG1_FULL_MODE;
+ cfg1 |= ISI_CFG1_THMASK_BEATS_16;
+
isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
isi_writel(isi, ISI_CFG1, cfg1);
eaddpdev:
platform_device_put(sasc->pdev);
eallocpdev:
- devm_kfree(ici->v4l2_dev.dev, sasc);
+ devm_kfree(ici->v4l2_dev.dev, info);
dev_err(ici->v4l2_dev.dev, "group probe failed: %d\n", ret);
return ret;
s->mixer_gain->cur.val, s->if_gain->val);
break;
default:
- dev_dbg(&s->spi->dev, "unkown control %d\n", ctrl->id);
+ dev_dbg(&s->spi->dev, "unknown control %d\n", ctrl->id);
ret = -EINVAL;
}
case TUNER_RTL2832_TUA9001:
return rtl2832u_tua9001_tuner_callback(d, cmd, arg);
}
- default:
- return -EINVAL;
}
return 0;
menuconfig USB_GSPCA
tristate "GSPCA based webcams"
depends on VIDEO_V4L2
+ depends on INPUT || INPUT=n
default m
---help---
Say Y here if you want to enable selecting webcams based
if (threadio == NULL)
return 0;
- call_void_qop(q, wait_finish, q);
threadio->stop = true;
- vb2_internal_streamoff(q, q->type);
- call_void_qop(q, wait_prepare, q);
+ /* Wake up all pending sleeps in the thread */
+ vb2_queue_error(q);
err = kthread_stop(threadio->thread);
- q->fileio = NULL;
- fileio->req.count = 0;
- vb2_reqbufs(q, &fileio->req);
- kfree(fileio);
+ __vb2_cleanup_fileio(q);
threadio->thread = NULL;
kfree(threadio);
- q->fileio = NULL;
q->threadio = NULL;
return err;
}
}
/* extract page list from userspace mapping */
- ret = vb2_dc_get_user_pages(start, pages, n_pages, vma,
- dma_dir == DMA_FROM_DEVICE);
+ ret = vb2_dc_get_user_pages(start, pages, n_pages, vma, dma_dir);
if (ret) {
unsigned long pfn;
if (vb2_dc_get_user_pfn(start, n_pages, vma, &pfn) == 0) {
This device provides input and output GPIOs through an I2C
interface to one or more sub-chips.
+config MFD_INTEL_QUARK_I2C_GPIO
+ tristate "Intel Quark MFD I2C GPIO"
+ depends on PCI
+ depends on X86
+ depends on COMMON_CLK
+ select MFD_CORE
+ help
+ This MFD provides support for I2C and GPIO that exist only
+ in a single PCI device. It splits the 2 IO devices to
+ their respective IO driver.
+ The GPIO exports a total amount of 8 interrupt-capable GPIOs.
+
config LPC_ICH
tristate "Intel ICH LPC"
depends on PCI
* COMe-bIP#
* COMe-bPC2 (ETXexpress-PC)
* COMe-bSC# (ETXexpress-SC T#)
+ * COMe-cBL6
* COMe-cBT6
* COMe-cCT6
* COMe-cDC2 (microETXexpress-DC)
additional drivers must be enabled in order to use the functionality
of the device.
+config MFD_MAX77843
+ bool "Maxim Semiconductor MAX77843 PMIC Support"
+ depends on I2C=y
+ select MFD_CORE
+ select REGMAP_I2C
+ select REGMAP_IRQ
+ help
+ Say yes here to add support for Maxim Semiconductor MAX77843.
+ This is companion Power Management IC with LEDs, Haptic, Charger,
+ Fuel Gauge, MUIC(Micro USB Interface Controller) controls on chip.
+ This driver provides common support for accessing the device;
+ additional drivers must be enabled in order to use the functionality
+ of the device.
+
config MFD_MAX8907
tristate "Maxim Semiconductor MAX8907 PMIC Support"
select MFD_CORE
additional drivers must be enabled in order to use the functionality
of the device.
+config MFD_MT6397
+ tristate "MediaTek MT6397 PMIC Support"
+ select MFD_CORE
+ select IRQ_DOMAIN
+ help
+ Say yes here to add support for MediaTek MT6397 PMIC. This is
+ a Power Management IC. This driver provides common support for
+ accessing the device; additional drivers must be enabled in order
+ to use the functionality of the device.
+
config MFD_MENF21BMC
tristate "MEN 14F021P00 Board Management Controller Support"
depends on I2C
depends on I2C=y
select MFD_CORE
select REGMAP_I2C
+ select REGMAP_IRQ
help
This driver provides for the Richtek RT5033 Power Management IC,
which includes the I2C driver and the Core APIs. This driver provides
lines on the SM501. The platform data is used to supply the
base number for the first GPIO line to register.
+config MFD_SKY81452
+ tristate "Skyworks Solutions SKY81452"
+ select MFD_CORE
+ select REGMAP_I2C
+ depends on I2C
+ help
+ This is the core driver for the Skyworks SKY81452 backlight and
+ voltage regulator device.
+
+ This driver can also be built as a module. If so, the module
+ will be called sky81452.
+
config MFD_SMSC
bool "SMSC ECE1099 series chips"
depends on I2C=y
Support for Wolfson Microelectronics WM5102 low power audio SoC
config MFD_WM5110
- bool "Wolfson Microelectronics WM5110"
+ bool "Wolfson Microelectronics WM5110 and WM8280/WM8281"
depends on MFD_ARIZONA
help
- Support for Wolfson Microelectronics WM5110 low power audio SoC
+ Support for Wolfson Microelectronics WM5110 and WM8280/WM8281
+ low power audio SoC
config MFD_WM8997
bool "Wolfson Microelectronics WM8997"
depends on I2C
help
The WM8994 is a highly integrated hi-fi CODEC designed for
- smartphone applicatiosn. As well as audio functionality it
+ smartphone applications. As well as audio functionality it
has on board GPIO and regulator functionality which is
supported via the relevant subsystems. This driver provides
core support for the WM8994, in order to use the actual
obj-$(CONFIG_MFD_CROS_EC_I2C) += cros_ec_i2c.o
obj-$(CONFIG_MFD_CROS_EC_SPI) += cros_ec_spi.o
-rtsx_pci-objs := rtsx_pcr.o rtsx_gops.o rts5209.o rts5229.o rtl8411.o rts5227.o rts5249.o
+rtsx_pci-objs := rtsx_pcr.o rts5209.o rts5229.o rtl8411.o rts5227.o rts5249.o
obj-$(CONFIG_MFD_RTSX_PCI) += rtsx_pci.o
obj-$(CONFIG_MFD_RTSX_USB) += rtsx_usb.o
obj-$(CONFIG_MFD_MAX14577) += max14577.o
obj-$(CONFIG_MFD_MAX77686) += max77686.o
obj-$(CONFIG_MFD_MAX77693) += max77693.o
+obj-$(CONFIG_MFD_MAX77843) += max77843.o
obj-$(CONFIG_MFD_MAX8907) += max8907.o
max8925-objs := max8925-core.o max8925-i2c.o
obj-$(CONFIG_MFD_MAX8925) += max8925.o
obj-$(CONFIG_MFD_TIMBERDALE) += timberdale.o
obj-$(CONFIG_PMIC_ADP5520) += adp5520.o
obj-$(CONFIG_MFD_KEMPLD) += kempld-core.o
+obj-$(CONFIG_MFD_INTEL_QUARK_I2C_GPIO) += intel_quark_i2c_gpio.o
obj-$(CONFIG_LPC_SCH) += lpc_sch.o
obj-$(CONFIG_LPC_ICH) += lpc_ich.o
obj-$(CONFIG_MFD_RDC321X) += rdc321x-southbridge.o
obj-$(CONFIG_MFD_HI6421_PMIC) += hi6421-pmic-core.o
obj-$(CONFIG_MFD_DLN2) += dln2.o
obj-$(CONFIG_MFD_RT5033) += rt5033.o
+obj-$(CONFIG_MFD_SKY81452) += sky81452.o
intel-soc-pmic-objs := intel_soc_pmic_core.o intel_soc_pmic_crc.o
obj-$(CONFIG_INTEL_SOC_PMIC) += intel-soc-pmic.o
+obj-$(CONFIG_MFD_MT6397) += mt6397-core.o
/* Prints to seq_file or log_buf */
static int ab8500_registers_print(struct device *dev, u32 bank,
- struct seq_file *s)
+ struct seq_file *s)
{
unsigned int i;
}
if (s) {
- err = seq_printf(s,
- " [0x%02X/0x%02X]: 0x%02X\n",
- bank, reg, value);
- if (err < 0) {
- /* Error is not returned here since
- * the output is wanted in any case */
+ seq_printf(s, " [0x%02X/0x%02X]: 0x%02X\n",
+ bank, reg, value);
+ /* Error is not returned here since
+ * the output is wanted in any case */
+ if (seq_has_overflowed(s))
return 0;
- }
} else {
dev_info(dev, " [0x%02X/0x%02X]: 0x%02X\n",
bank, reg, value);
}
}
}
+
return 0;
}
seq_printf(s, " bank 0x%02X:\n", bank);
- ab8500_registers_print(dev, bank, s);
- return 0;
+ return ab8500_registers_print(dev, bank, s);
}
static int ab8500_registers_open(struct inode *inode, struct file *file)
seq_puts(s, AB8500_NAME_STRING " register values:\n");
for (i = 0; i < AB8500_NUM_BANKS; i++) {
- seq_printf(s, " bank 0x%02X:\n", i);
+ int err;
- ab8500_registers_print(dev, i, s);
+ seq_printf(s, " bank 0x%02X:\n", i);
+ err = ab8500_registers_print(dev, i, s);
+ if (err)
+ return err;
}
return 0;
}
static int ab8500_bank_print(struct seq_file *s, void *p)
{
- return seq_printf(s, "0x%02X\n", debug_bank);
+ seq_printf(s, "0x%02X\n", debug_bank);
+ return 0;
}
static int ab8500_bank_open(struct inode *inode, struct file *file)
static int ab8500_address_print(struct seq_file *s, void *p)
{
- return seq_printf(s, "0x%02X\n", debug_address);
+ seq_printf(s, "0x%02X\n", debug_address);
+ return 0;
}
static int ab8500_address_open(struct inode *inode, struct file *file)
for (line = 0; line < num_interrupt_lines; line++) {
struct irq_desc *desc = irq_to_desc(line + irq_first);
- seq_printf(s, "%3i: %6i %4i", line,
+ seq_printf(s, "%3i: %6i %4i",
+ line,
num_interrupts[line],
num_wake_interrupts[line]);
dev_err(dev, "ab->read fail %d\n", err);
return err;
}
- err = seq_printf(s, " [0x%02X/0x%02X]: 0x%02X\n",
- bank, reg, value);
+ seq_printf(s, " [0x%02X/0x%02X]: 0x%02X\n", bank, reg, value);
}
err = abx500_set_register_interruptible(dev,
AB8500_REGU_CTRL1, AB8500_SUPPLY_CONTROL_REG, orig_value);
bat_ctrl_convert = ab8500_gpadc_ad_to_voltage(gpadc,
BAT_CTRL, bat_ctrl_raw);
- return seq_printf(s, "%d,0x%X\n",
- bat_ctrl_convert, bat_ctrl_raw);
+ seq_printf(s, "%d,0x%X\n", bat_ctrl_convert, bat_ctrl_raw);
+
+ return 0;
}
static int ab8500_gpadc_bat_ctrl_open(struct inode *inode, struct file *file)
btemp_ball_convert = ab8500_gpadc_ad_to_voltage(gpadc, BTEMP_BALL,
btemp_ball_raw);
- return seq_printf(s,
- "%d,0x%X\n", btemp_ball_convert, btemp_ball_raw);
+ seq_printf(s, "%d,0x%X\n", btemp_ball_convert, btemp_ball_raw);
+
+ return 0;
}
static int ab8500_gpadc_btemp_ball_open(struct inode *inode,
main_charger_v_convert = ab8500_gpadc_ad_to_voltage(gpadc,
MAIN_CHARGER_V, main_charger_v_raw);
- return seq_printf(s, "%d,0x%X\n",
- main_charger_v_convert, main_charger_v_raw);
+ seq_printf(s, "%d,0x%X\n", main_charger_v_convert, main_charger_v_raw);
+
+ return 0;
}
static int ab8500_gpadc_main_charger_v_open(struct inode *inode,
acc_detect1_convert = ab8500_gpadc_ad_to_voltage(gpadc, ACC_DETECT1,
acc_detect1_raw);
- return seq_printf(s, "%d,0x%X\n",
- acc_detect1_convert, acc_detect1_raw);
+ seq_printf(s, "%d,0x%X\n", acc_detect1_convert, acc_detect1_raw);
+
+ return 0;
}
static int ab8500_gpadc_acc_detect1_open(struct inode *inode,
acc_detect2_convert = ab8500_gpadc_ad_to_voltage(gpadc,
ACC_DETECT2, acc_detect2_raw);
- return seq_printf(s, "%d,0x%X\n",
- acc_detect2_convert, acc_detect2_raw);
+ seq_printf(s, "%d,0x%X\n", acc_detect2_convert, acc_detect2_raw);
+
+ return 0;
}
static int ab8500_gpadc_acc_detect2_open(struct inode *inode,
aux1_convert = ab8500_gpadc_ad_to_voltage(gpadc, ADC_AUX1,
aux1_raw);
- return seq_printf(s, "%d,0x%X\n",
- aux1_convert, aux1_raw);
+ seq_printf(s, "%d,0x%X\n", aux1_convert, aux1_raw);
+
+ return 0;
}
static int ab8500_gpadc_aux1_open(struct inode *inode, struct file *file)
aux2_convert = ab8500_gpadc_ad_to_voltage(gpadc, ADC_AUX2,
aux2_raw);
- return seq_printf(s, "%d,0x%X\n",
- aux2_convert, aux2_raw);
+ seq_printf(s, "%d,0x%X\n", aux2_convert, aux2_raw);
+
+ return 0;
}
static int ab8500_gpadc_aux2_open(struct inode *inode, struct file *file)
main_bat_v_convert = ab8500_gpadc_ad_to_voltage(gpadc, MAIN_BAT_V,
main_bat_v_raw);
- return seq_printf(s, "%d,0x%X\n",
- main_bat_v_convert, main_bat_v_raw);
+ seq_printf(s, "%d,0x%X\n", main_bat_v_convert, main_bat_v_raw);
+
+ return 0;
}
static int ab8500_gpadc_main_bat_v_open(struct inode *inode,
vbus_v_convert = ab8500_gpadc_ad_to_voltage(gpadc, VBUS_V,
vbus_v_raw);
- return seq_printf(s, "%d,0x%X\n",
- vbus_v_convert, vbus_v_raw);
+ seq_printf(s, "%d,0x%X\n", vbus_v_convert, vbus_v_raw);
+
+ return 0;
}
static int ab8500_gpadc_vbus_v_open(struct inode *inode, struct file *file)
main_charger_c_convert = ab8500_gpadc_ad_to_voltage(gpadc,
MAIN_CHARGER_C, main_charger_c_raw);
- return seq_printf(s, "%d,0x%X\n",
- main_charger_c_convert, main_charger_c_raw);
+ seq_printf(s, "%d,0x%X\n", main_charger_c_convert, main_charger_c_raw);
+
+ return 0;
}
static int ab8500_gpadc_main_charger_c_open(struct inode *inode,
usb_charger_c_convert = ab8500_gpadc_ad_to_voltage(gpadc,
USB_CHARGER_C, usb_charger_c_raw);
- return seq_printf(s, "%d,0x%X\n",
- usb_charger_c_convert, usb_charger_c_raw);
+ seq_printf(s, "%d,0x%X\n", usb_charger_c_convert, usb_charger_c_raw);
+
+ return 0;
}
static int ab8500_gpadc_usb_charger_c_open(struct inode *inode,
bk_bat_v_convert = ab8500_gpadc_ad_to_voltage(gpadc,
BK_BAT_V, bk_bat_v_raw);
- return seq_printf(s, "%d,0x%X\n",
- bk_bat_v_convert, bk_bat_v_raw);
+ seq_printf(s, "%d,0x%X\n", bk_bat_v_convert, bk_bat_v_raw);
+
+ return 0;
}
static int ab8500_gpadc_bk_bat_v_open(struct inode *inode, struct file *file)
die_temp_convert = ab8500_gpadc_ad_to_voltage(gpadc, DIE_TEMP,
die_temp_raw);
- return seq_printf(s, "%d,0x%X\n",
- die_temp_convert, die_temp_raw);
+ seq_printf(s, "%d,0x%X\n", die_temp_convert, die_temp_raw);
+
+ return 0;
}
static int ab8500_gpadc_die_temp_open(struct inode *inode, struct file *file)
usb_id_convert = ab8500_gpadc_ad_to_voltage(gpadc, USB_ID,
usb_id_raw);
- return seq_printf(s, "%d,0x%X\n",
- usb_id_convert, usb_id_raw);
+ seq_printf(s, "%d,0x%X\n", usb_id_convert, usb_id_raw);
+
+ return 0;
}
static int ab8500_gpadc_usb_id_open(struct inode *inode, struct file *file)
xtal_temp_convert = ab8500_gpadc_ad_to_voltage(gpadc, XTAL_TEMP,
xtal_temp_raw);
- return seq_printf(s, "%d,0x%X\n",
- xtal_temp_convert, xtal_temp_raw);
+ seq_printf(s, "%d,0x%X\n", xtal_temp_convert, xtal_temp_raw);
+
+ return 0;
}
static int ab8540_gpadc_xtal_temp_open(struct inode *inode, struct file *file)
ab8500_gpadc_ad_to_voltage(gpadc, VBAT_TRUE_MEAS,
vbat_true_meas_raw);
- return seq_printf(s, "%d,0x%X\n",
- vbat_true_meas_convert, vbat_true_meas_raw);
+ seq_printf(s, "%d,0x%X\n", vbat_true_meas_convert, vbat_true_meas_raw);
+
+ return 0;
}
static int ab8540_gpadc_vbat_true_meas_open(struct inode *inode,
ibat_convert = ab8500_gpadc_ad_to_voltage(gpadc, IBAT_VIRTUAL_CHANNEL,
ibat_raw);
- return seq_printf(s, "%d,0x%X\n" "%d,0x%X\n",
- bat_ctrl_convert, bat_ctrl_raw,
- ibat_convert, ibat_raw);
+ seq_printf(s,
+ "%d,0x%X\n"
+ "%d,0x%X\n",
+ bat_ctrl_convert, bat_ctrl_raw,
+ ibat_convert, ibat_raw);
+
+ return 0;
}
static int ab8540_gpadc_bat_ctrl_and_ibat_open(struct inode *inode,
ibat_convert = ab8500_gpadc_ad_to_voltage(gpadc, IBAT_VIRTUAL_CHANNEL,
ibat_raw);
- return seq_printf(s, "%d,0x%X\n" "%d,0x%X\n",
- vbat_meas_convert, vbat_meas_raw,
- ibat_convert, ibat_raw);
+ seq_printf(s,
+ "%d,0x%X\n"
+ "%d,0x%X\n",
+ vbat_meas_convert, vbat_meas_raw,
+ ibat_convert, ibat_raw);
+
+ return 0;
}
static int ab8540_gpadc_vbat_meas_and_ibat_open(struct inode *inode,
ibat_convert = ab8500_gpadc_ad_to_voltage(gpadc, IBAT_VIRTUAL_CHANNEL,
ibat_raw);
- return seq_printf(s, "%d,0x%X\n" "%d,0x%X\n",
- vbat_true_meas_convert, vbat_true_meas_raw,
- ibat_convert, ibat_raw);
+ seq_printf(s,
+ "%d,0x%X\n"
+ "%d,0x%X\n",
+ vbat_true_meas_convert, vbat_true_meas_raw,
+ ibat_convert, ibat_raw);
+
+ return 0;
}
static int ab8540_gpadc_vbat_true_meas_and_ibat_open(struct inode *inode,
ibat_convert = ab8500_gpadc_ad_to_voltage(gpadc, IBAT_VIRTUAL_CHANNEL,
ibat_raw);
- return seq_printf(s, "%d,0x%X\n" "%d,0x%X\n",
- bat_temp_convert, bat_temp_raw,
- ibat_convert, ibat_raw);
+ seq_printf(s,
+ "%d,0x%X\n"
+ "%d,0x%X\n",
+ bat_temp_convert, bat_temp_raw,
+ ibat_convert, ibat_raw);
+
+ return 0;
}
static int ab8540_gpadc_bat_temp_and_ibat_open(struct inode *inode,
gpadc = ab8500_gpadc_get("ab8500-gpadc.0");
ab8540_gpadc_get_otp(gpadc, &vmain_l, &vmain_h, &btemp_l, &btemp_h,
&vbat_l, &vbat_h, &ibat_l, &ibat_h);
- return seq_printf(s, "VMAIN_L:0x%X\n"
- "VMAIN_H:0x%X\n"
- "BTEMP_L:0x%X\n"
- "BTEMP_H:0x%X\n"
- "VBAT_L:0x%X\n"
- "VBAT_H:0x%X\n"
- "IBAT_L:0x%X\n"
- "IBAT_H:0x%X\n",
- vmain_l, vmain_h, btemp_l, btemp_h,
- vbat_l, vbat_h, ibat_l, ibat_h);
+ seq_printf(s,
+ "VMAIN_L:0x%X\n"
+ "VMAIN_H:0x%X\n"
+ "BTEMP_L:0x%X\n"
+ "BTEMP_H:0x%X\n"
+ "VBAT_L:0x%X\n"
+ "VBAT_H:0x%X\n"
+ "IBAT_L:0x%X\n"
+ "IBAT_H:0x%X\n",
+ vmain_l, vmain_h, btemp_l, btemp_h,
+ vbat_l, vbat_h, ibat_l, ibat_h);
+
+ return 0;
}
static int ab8540_gpadc_otp_cal_open(struct inode *inode, struct file *file)
static int ab8500_gpadc_avg_sample_print(struct seq_file *s, void *p)
{
- return seq_printf(s, "%d\n", avg_sample);
+ seq_printf(s, "%d\n", avg_sample);
+
+ return 0;
}
static int ab8500_gpadc_avg_sample_open(struct inode *inode, struct file *file)
static int ab8500_gpadc_trig_edge_print(struct seq_file *s, void *p)
{
- return seq_printf(s, "%d\n", trig_edge);
+ seq_printf(s, "%d\n", trig_edge);
+
+ return 0;
}
static int ab8500_gpadc_trig_edge_open(struct inode *inode, struct file *file)
static int ab8500_gpadc_trig_timer_print(struct seq_file *s, void *p)
{
- return seq_printf(s, "%d\n", trig_timer);
+ seq_printf(s, "%d\n", trig_timer);
+
+ return 0;
}
static int ab8500_gpadc_trig_timer_open(struct inode *inode, struct file *file)
static int ab8500_gpadc_conv_type_print(struct seq_file *s, void *p)
{
- return seq_printf(s, "%d\n", conv_type);
+ seq_printf(s, "%d\n", conv_type);
+
+ return 0;
}
static int ab8500_gpadc_conv_type_open(struct inode *inode, struct file *file)
if (!psy)
continue;
- ret = psy->get_property(psy, POWER_SUPPLY_PROP_ONLINE, &val);
+ ret = power_supply_get_property(psy, POWER_SUPPLY_PROP_ONLINE,
+ &val);
+ power_supply_put(psy);
if (!ret && val.intval) {
charger_present = true;
/* Check if battery is known */
psy = power_supply_get_by_name("ab8500_btemp");
if (psy) {
- ret = psy->get_property(psy, POWER_SUPPLY_PROP_TECHNOLOGY,
- &val);
+ ret = power_supply_get_property(psy,
+ POWER_SUPPLY_PROP_TECHNOLOGY, &val);
if (!ret && val.intval != POWER_SUPPLY_TECHNOLOGY_UNKNOWN) {
printk(KERN_INFO
"Charger \"%s\" is connected with known battery."
pss[i]);
machine_restart("charging");
}
+ power_supply_put(psy);
}
shutdown:
count++;
}
+ count = 0;
+ of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop,
+ cur, val) {
+ if (count == ARRAY_SIZE(arizona->pdata.dmic_ref))
+ break;
+
+ arizona->pdata.dmic_ref[count] = val;
+ count++;
+ }
+
return 0;
}
const struct of_device_id arizona_of_match[] = {
{ .compatible = "wlf,wm5102", .data = (void *)WM5102 },
{ .compatible = "wlf,wm5110", .data = (void *)WM5110 },
+ { .compatible = "wlf,wm8280", .data = (void *)WM8280 },
{ .compatible = "wlf,wm8997", .data = (void *)WM8997 },
{},
};
switch (arizona->type) {
case WM5102:
case WM5110:
+ case WM8280:
case WM8997:
for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
arizona->core_supplies[i].supply
#endif
#ifdef CONFIG_MFD_WM5110
case 0x5110:
- type_name = "WM5110";
- if (arizona->type != WM5110) {
+ switch (arizona->type) {
+ case WM5110:
+ type_name = "WM5110";
+ break;
+ case WM8280:
+ type_name = "WM8280";
+ break;
+ default:
+ type_name = "WM5110";
dev_err(arizona->dev, "WM5110 registered as %d\n",
arizona->type);
arizona->type = WM5110;
+ break;
}
apply_patch = wm5110_patch;
break;
ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
break;
case WM5110:
+ case WM8280:
ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
break;
#endif
#ifdef CONFIG_MFD_WM5110
case WM5110:
+ case WM8280:
regmap_config = &wm5110_i2c_regmap;
break;
#endif
static const struct i2c_device_id arizona_i2c_id[] = {
{ "wm5102", WM5102 },
{ "wm5110", WM5110 },
+ { "wm8280", WM8280 },
{ "wm8997", WM8997 },
{ }
};
#endif
#ifdef CONFIG_MFD_WM5110
case WM5110:
+ case WM8280:
aod = &wm5110_aod;
switch (arizona->rev) {
#endif
#ifdef CONFIG_MFD_WM5110
case WM5110:
+ case WM8280:
regmap_config = &wm5110_spi_regmap;
break;
#endif
static const struct spi_device_id arizona_spi_ids[] = {
{ "wm5102", WM5102 },
{ "wm5110", WM5110 },
+ { "wm8280", WM8280 },
{ },
};
MODULE_DEVICE_TABLE(spi, arizona_spi_ids);
#define AXP20X_OFF 0x80
-static const char const *axp20x_model_names[] = {
+static const char * const axp20x_model_names[] = {
"AXP202",
"AXP209",
"AXP288",
},
};
-static struct resource axp288_battery_resources[] = {
+static struct resource axp288_fuel_gauge_resources[] = {
{
.start = AXP288_IRQ_QWBTU,
.end = AXP288_IRQ_QWBTU,
},
};
+static struct resource axp288_extcon_resources[] = {
+ {
+ .start = AXP288_IRQ_VBUS_FALL,
+ .end = AXP288_IRQ_VBUS_FALL,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = AXP288_IRQ_VBUS_RISE,
+ .end = AXP288_IRQ_VBUS_RISE,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = AXP288_IRQ_MV_CHNG,
+ .end = AXP288_IRQ_MV_CHNG,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = AXP288_IRQ_BC_USB_CHNG,
+ .end = AXP288_IRQ_BC_USB_CHNG,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
static struct resource axp288_charger_resources[] = {
{
.start = AXP288_IRQ_OV,
.num_resources = ARRAY_SIZE(axp288_adc_resources),
.resources = axp288_adc_resources,
},
+ {
+ .name = "axp288_extcon",
+ .num_resources = ARRAY_SIZE(axp288_extcon_resources),
+ .resources = axp288_extcon_resources,
+ },
{
.name = "axp288_charger",
.num_resources = ARRAY_SIZE(axp288_charger_resources),
.resources = axp288_charger_resources,
},
{
- .name = "axp288_battery",
- .num_resources = ARRAY_SIZE(axp288_battery_resources),
- .resources = axp288_battery_resources,
+ .name = "axp288_fuel_gauge",
+ .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources),
+ .resources = axp288_fuel_gauge_resources,
},
{
.name = "axp288_pmic_acpi",
goto regmap_err;
}
+ enable_irq_wake(da9052->chip_irq);
+
ret = da9052_request_irq(da9052, DA9052_IRQ_ADC_EOM, "adc-irq",
da9052_auxadc_irq, da9052);
if (!da9052)
return -ENOMEM;
- spi->mode = SPI_MODE_0 | SPI_CPOL;
+ spi->mode = SPI_MODE_0;
spi->bits_per_word = 8;
spi_setup(spi);
config = da9052_regmap_config;
config.read_flag_mask = 1;
+ config.reg_bits = 7;
+ config.pad_bits = 1;
+ config.val_bits = 8;
+ config.use_single_rw = 1;
da9052->regmap = devm_regmap_init_spi(spi, &config);
if (IS_ERR(da9052->regmap)) {
},
};
-static struct regmap_config da9150_regmap_config = {
+static const struct regmap_config da9150_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.ranges = da9150_range_cfg,
struct dln2_response *rsp;
struct dln2_rx_context *rxc;
struct device *dev = &dln2->interface->dev;
- const unsigned long timeout = DLN2_USB_TIMEOUT * HZ / 1000;
+ const unsigned long timeout = msecs_to_jiffies(DLN2_USB_TIMEOUT);
struct dln2_mod_rx_slots *rxs = &dln2->mod_rx_slots[handle];
int size;
return 0;
}
-static struct of_device_id of_hi6421_pmic_match_tbl[] = {
+static const struct of_device_id of_hi6421_pmic_match_tbl[] = {
{ .compatible = "hisilicon,hi6421-pmic", },
{ },
};
--- /dev/null
+/*
+ * Intel Quark MFD PCI driver for I2C & GPIO
+ *
+ * Copyright(c) 2014 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * Intel Quark PCI device for I2C and GPIO controller sharing the same
+ * PCI function. This PCI driver will split the 2 devices into their
+ * respective drivers.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/mfd/core.h>
+#include <linux/clkdev.h>
+#include <linux/clk-provider.h>
+#include <linux/dmi.h>
+#include <linux/platform_data/gpio-dwapb.h>
+#include <linux/platform_data/i2c-designware.h>
+
+/* PCI BAR for register base address */
+#define MFD_I2C_BAR 0
+#define MFD_GPIO_BAR 1
+
+/* The base GPIO number under GPIOLIB framework */
+#define INTEL_QUARK_MFD_GPIO_BASE 8
+
+/* The default number of South-Cluster GPIO on Quark. */
+#define INTEL_QUARK_MFD_NGPIO 8
+
+/* The DesignWare GPIO ports on Quark. */
+#define INTEL_QUARK_GPIO_NPORTS 1
+
+#define INTEL_QUARK_IORES_MEM 0
+#define INTEL_QUARK_IORES_IRQ 1
+
+#define INTEL_QUARK_I2C_CONTROLLER_CLK "i2c_designware.0"
+
+/* The Quark I2C controller source clock */
+#define INTEL_QUARK_I2C_CLK_HZ 33000000
+
+#define INTEL_QUARK_I2C_NCLK 1
+
+struct intel_quark_mfd {
+ struct pci_dev *pdev;
+ struct clk *i2c_clk;
+ struct clk_lookup *i2c_clk_lookup;
+};
+
+struct i2c_mode_info {
+ const char *name;
+ unsigned int i2c_scl_freq;
+};
+
+static const struct i2c_mode_info platform_i2c_mode_info[] = {
+ {
+ .name = "Galileo",
+ .i2c_scl_freq = 100000,
+ },
+ {
+ .name = "GalileoGen2",
+ .i2c_scl_freq = 400000,
+ },
+ {}
+};
+
+static struct resource intel_quark_i2c_res[] = {
+ [INTEL_QUARK_IORES_MEM] = {
+ .flags = IORESOURCE_MEM,
+ },
+ [INTEL_QUARK_IORES_IRQ] = {
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct resource intel_quark_gpio_res[] = {
+ [INTEL_QUARK_IORES_MEM] = {
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct mfd_cell intel_quark_mfd_cells[] = {
+ {
+ .id = MFD_I2C_BAR,
+ .name = "i2c_designware",
+ .num_resources = ARRAY_SIZE(intel_quark_i2c_res),
+ .resources = intel_quark_i2c_res,
+ .ignore_resource_conflicts = true,
+ },
+ {
+ .id = MFD_GPIO_BAR,
+ .name = "gpio-dwapb",
+ .num_resources = ARRAY_SIZE(intel_quark_gpio_res),
+ .resources = intel_quark_gpio_res,
+ .ignore_resource_conflicts = true,
+ },
+};
+
+static const struct pci_device_id intel_quark_mfd_ids[] = {
+ { PCI_VDEVICE(INTEL, 0x0934), },
+ {},
+};
+MODULE_DEVICE_TABLE(pci, intel_quark_mfd_ids);
+
+static int intel_quark_register_i2c_clk(struct intel_quark_mfd *quark_mfd)
+{
+ struct pci_dev *pdev = quark_mfd->pdev;
+ struct clk_lookup *i2c_clk_lookup;
+ struct clk *i2c_clk;
+ int ret;
+
+ i2c_clk_lookup = devm_kcalloc(&pdev->dev, INTEL_QUARK_I2C_NCLK,
+ sizeof(*i2c_clk_lookup), GFP_KERNEL);
+ if (!i2c_clk_lookup)
+ return -ENOMEM;
+
+ i2c_clk_lookup[0].dev_id = INTEL_QUARK_I2C_CONTROLLER_CLK;
+
+ i2c_clk = clk_register_fixed_rate(&pdev->dev,
+ INTEL_QUARK_I2C_CONTROLLER_CLK, NULL,
+ CLK_IS_ROOT, INTEL_QUARK_I2C_CLK_HZ);
+
+ quark_mfd->i2c_clk_lookup = i2c_clk_lookup;
+ quark_mfd->i2c_clk = i2c_clk;
+
+ ret = clk_register_clkdevs(i2c_clk, i2c_clk_lookup,
+ INTEL_QUARK_I2C_NCLK);
+ if (ret)
+ dev_err(&pdev->dev, "Fixed clk register failed: %d\n", ret);
+
+ return ret;
+}
+
+static void intel_quark_unregister_i2c_clk(struct pci_dev *pdev)
+{
+ struct intel_quark_mfd *quark_mfd = dev_get_drvdata(&pdev->dev);
+
+ if (!quark_mfd->i2c_clk || !quark_mfd->i2c_clk_lookup)
+ return;
+
+ clkdev_drop(quark_mfd->i2c_clk_lookup);
+ clk_unregister(quark_mfd->i2c_clk);
+}
+
+static int intel_quark_i2c_setup(struct pci_dev *pdev, struct mfd_cell *cell)
+{
+ const char *board_name = dmi_get_system_info(DMI_BOARD_NAME);
+ const struct i2c_mode_info *info;
+ struct dw_i2c_platform_data *pdata;
+ struct resource *res = (struct resource *)cell->resources;
+ struct device *dev = &pdev->dev;
+
+ res[INTEL_QUARK_IORES_MEM].start =
+ pci_resource_start(pdev, MFD_I2C_BAR);
+ res[INTEL_QUARK_IORES_MEM].end =
+ pci_resource_end(pdev, MFD_I2C_BAR);
+
+ res[INTEL_QUARK_IORES_IRQ].start = pdev->irq;
+ res[INTEL_QUARK_IORES_IRQ].end = pdev->irq;
+
+ pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
+ return -ENOMEM;
+
+ /* Normal mode by default */
+ pdata->i2c_scl_freq = 100000;
+
+ if (board_name) {
+ for (info = platform_i2c_mode_info; info->name; info++) {
+ if (!strcmp(board_name, info->name)) {
+ pdata->i2c_scl_freq = info->i2c_scl_freq;
+ break;
+ }
+ }
+ }
+
+ cell->platform_data = pdata;
+ cell->pdata_size = sizeof(*pdata);
+
+ return 0;
+}
+
+static int intel_quark_gpio_setup(struct pci_dev *pdev, struct mfd_cell *cell)
+{
+ struct dwapb_platform_data *pdata;
+ struct resource *res = (struct resource *)cell->resources;
+ struct device *dev = &pdev->dev;
+
+ res[INTEL_QUARK_IORES_MEM].start =
+ pci_resource_start(pdev, MFD_GPIO_BAR);
+ res[INTEL_QUARK_IORES_MEM].end =
+ pci_resource_end(pdev, MFD_GPIO_BAR);
+
+ pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
+ return -ENOMEM;
+
+ /* For intel quark x1000, it has only one port: portA */
+ pdata->nports = INTEL_QUARK_GPIO_NPORTS;
+ pdata->properties = devm_kcalloc(dev, pdata->nports,
+ sizeof(*pdata->properties),
+ GFP_KERNEL);
+ if (!pdata->properties)
+ return -ENOMEM;
+
+ /* Set the properties for portA */
+ pdata->properties->node = NULL;
+ pdata->properties->name = "intel-quark-x1000-gpio-portA";
+ pdata->properties->idx = 0;
+ pdata->properties->ngpio = INTEL_QUARK_MFD_NGPIO;
+ pdata->properties->gpio_base = INTEL_QUARK_MFD_GPIO_BASE;
+ pdata->properties->irq = pdev->irq;
+ pdata->properties->irq_shared = true;
+
+ cell->platform_data = pdata;
+ cell->pdata_size = sizeof(*pdata);
+
+ return 0;
+}
+
+static int intel_quark_mfd_probe(struct pci_dev *pdev,
+ const struct pci_device_id *id)
+{
+ struct intel_quark_mfd *quark_mfd;
+ int ret;
+
+ ret = pcim_enable_device(pdev);
+ if (ret)
+ return ret;
+
+ quark_mfd = devm_kzalloc(&pdev->dev, sizeof(*quark_mfd), GFP_KERNEL);
+ if (!quark_mfd)
+ return -ENOMEM;
+ quark_mfd->pdev = pdev;
+
+ ret = intel_quark_register_i2c_clk(quark_mfd);
+ if (ret)
+ return ret;
+
+ dev_set_drvdata(&pdev->dev, quark_mfd);
+
+ ret = intel_quark_i2c_setup(pdev, &intel_quark_mfd_cells[MFD_I2C_BAR]);
+ if (ret)
+ return ret;
+
+ ret = intel_quark_gpio_setup(pdev,
+ &intel_quark_mfd_cells[MFD_GPIO_BAR]);
+ if (ret)
+ return ret;
+
+ return mfd_add_devices(&pdev->dev, 0, intel_quark_mfd_cells,
+ ARRAY_SIZE(intel_quark_mfd_cells), NULL, 0,
+ NULL);
+}
+
+static void intel_quark_mfd_remove(struct pci_dev *pdev)
+{
+ intel_quark_unregister_i2c_clk(pdev);
+ mfd_remove_devices(&pdev->dev);
+}
+
+static struct pci_driver intel_quark_mfd_driver = {
+ .name = "intel_quark_mfd_i2c_gpio",
+ .id_table = intel_quark_mfd_ids,
+ .probe = intel_quark_mfd_probe,
+ .remove = intel_quark_mfd_remove,
+};
+
+module_pci_driver(intel_quark_mfd_driver);
+
+MODULE_AUTHOR("Raymond Tan <raymond.tan@intel.com>");
+MODULE_DESCRIPTION("Intel Quark MFD PCI driver for I2C & GPIO");
+MODULE_LICENSE("GPL v2");
#include <linux/mfd/intel_soc_pmic.h>
#include "intel_soc_pmic_core.h"
-/*
- * On some boards the PMIC interrupt may come from a GPIO line.
- * Try to lookup the ACPI table and see if such connection exists. If not,
- * return -ENOENT and use the IRQ provided by I2C.
- */
static int intel_soc_pmic_find_gpio_irq(struct device *dev)
{
struct gpio_desc *desc;
int irq;
- desc = devm_gpiod_get_index(dev, "intel_soc_pmic", 0);
+ desc = devm_gpiod_get_index(dev, "intel_soc_pmic", 0, GPIOD_IN);
if (IS_ERR(desc))
- return -ENOENT;
+ return PTR_ERR(desc);
irq = gpiod_to_irq(desc);
if (irq < 0)
pmic->regmap = devm_regmap_init_i2c(i2c, config->regmap_config);
+ /*
+ * On some boards the PMIC interrupt may come from a GPIO line. Try to
+ * lookup the ACPI table for a such connection and setup a GPIO
+ * interrupt if it exists. Otherwise use the IRQ provided by I2C
+ */
irq = intel_soc_pmic_find_gpio_irq(dev);
pmic->irq = (irq < 0) ? i2c->irq : irq;
},
.driver_data = (void *)&kempld_platform_data_generic,
.callback = kempld_create_platform_device,
- },
- {
+ }, {
+ .ident = "CBL6",
+ .matches = {
+ DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"),
+ DMI_MATCH(DMI_BOARD_NAME, "COMe-cBL6"),
+ },
+ .driver_data = (void *)&kempld_platform_data_generic,
+ .callback = kempld_create_platform_device,
+ }, {
.ident = "CCR2",
.matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"),
* functions that probably will be registered by other drivers.
*/
static const struct pci_device_id lpc_ich_ids[] = {
- { PCI_VDEVICE(INTEL, 0x2410), LPC_ICH},
- { PCI_VDEVICE(INTEL, 0x2420), LPC_ICH0},
- { PCI_VDEVICE(INTEL, 0x2440), LPC_ICH2},
- { PCI_VDEVICE(INTEL, 0x244c), LPC_ICH2M},
- { PCI_VDEVICE(INTEL, 0x2480), LPC_ICH3},
- { PCI_VDEVICE(INTEL, 0x248c), LPC_ICH3M},
- { PCI_VDEVICE(INTEL, 0x24c0), LPC_ICH4},
- { PCI_VDEVICE(INTEL, 0x24cc), LPC_ICH4M},
- { PCI_VDEVICE(INTEL, 0x2450), LPC_CICH},
- { PCI_VDEVICE(INTEL, 0x24d0), LPC_ICH5},
- { PCI_VDEVICE(INTEL, 0x25a1), LPC_6300ESB},
- { PCI_VDEVICE(INTEL, 0x2640), LPC_ICH6},
- { PCI_VDEVICE(INTEL, 0x2641), LPC_ICH6M},
- { PCI_VDEVICE(INTEL, 0x2642), LPC_ICH6W},
- { PCI_VDEVICE(INTEL, 0x2670), LPC_631XESB},
- { PCI_VDEVICE(INTEL, 0x2671), LPC_631XESB},
- { PCI_VDEVICE(INTEL, 0x2672), LPC_631XESB},
- { PCI_VDEVICE(INTEL, 0x2673), LPC_631XESB},
- { PCI_VDEVICE(INTEL, 0x2674), LPC_631XESB},
- { PCI_VDEVICE(INTEL, 0x2675), LPC_631XESB},
- { PCI_VDEVICE(INTEL, 0x2676), LPC_631XESB},
- { PCI_VDEVICE(INTEL, 0x2677), LPC_631XESB},
- { PCI_VDEVICE(INTEL, 0x2678), LPC_631XESB},
- { PCI_VDEVICE(INTEL, 0x2679), LPC_631XESB},
- { PCI_VDEVICE(INTEL, 0x267a), LPC_631XESB},
- { PCI_VDEVICE(INTEL, 0x267b), LPC_631XESB},
- { PCI_VDEVICE(INTEL, 0x267c), LPC_631XESB},
- { PCI_VDEVICE(INTEL, 0x267d), LPC_631XESB},
- { PCI_VDEVICE(INTEL, 0x267e), LPC_631XESB},
- { PCI_VDEVICE(INTEL, 0x267f), LPC_631XESB},
- { PCI_VDEVICE(INTEL, 0x27b8), LPC_ICH7},
- { PCI_VDEVICE(INTEL, 0x27b0), LPC_ICH7DH},
- { PCI_VDEVICE(INTEL, 0x27b9), LPC_ICH7M},
- { PCI_VDEVICE(INTEL, 0x27bd), LPC_ICH7MDH},
- { PCI_VDEVICE(INTEL, 0x27bc), LPC_NM10},
- { PCI_VDEVICE(INTEL, 0x2810), LPC_ICH8},
- { PCI_VDEVICE(INTEL, 0x2812), LPC_ICH8DH},
- { PCI_VDEVICE(INTEL, 0x2814), LPC_ICH8DO},
- { PCI_VDEVICE(INTEL, 0x2815), LPC_ICH8M},
- { PCI_VDEVICE(INTEL, 0x2811), LPC_ICH8ME},
- { PCI_VDEVICE(INTEL, 0x2918), LPC_ICH9},
- { PCI_VDEVICE(INTEL, 0x2916), LPC_ICH9R},
- { PCI_VDEVICE(INTEL, 0x2912), LPC_ICH9DH},
- { PCI_VDEVICE(INTEL, 0x2914), LPC_ICH9DO},
- { PCI_VDEVICE(INTEL, 0x2919), LPC_ICH9M},
- { PCI_VDEVICE(INTEL, 0x2917), LPC_ICH9ME},
- { PCI_VDEVICE(INTEL, 0x3a18), LPC_ICH10},
- { PCI_VDEVICE(INTEL, 0x3a16), LPC_ICH10R},
- { PCI_VDEVICE(INTEL, 0x3a1a), LPC_ICH10D},
- { PCI_VDEVICE(INTEL, 0x3a14), LPC_ICH10DO},
- { PCI_VDEVICE(INTEL, 0x3b00), LPC_PCH},
- { PCI_VDEVICE(INTEL, 0x3b01), LPC_PCHM},
- { PCI_VDEVICE(INTEL, 0x3b02), LPC_P55},
- { PCI_VDEVICE(INTEL, 0x3b03), LPC_PM55},
- { PCI_VDEVICE(INTEL, 0x3b06), LPC_H55},
- { PCI_VDEVICE(INTEL, 0x3b07), LPC_QM57},
- { PCI_VDEVICE(INTEL, 0x3b08), LPC_H57},
- { PCI_VDEVICE(INTEL, 0x3b09), LPC_HM55},
- { PCI_VDEVICE(INTEL, 0x3b0a), LPC_Q57},
- { PCI_VDEVICE(INTEL, 0x3b0b), LPC_HM57},
- { PCI_VDEVICE(INTEL, 0x3b0d), LPC_PCHMSFF},
- { PCI_VDEVICE(INTEL, 0x3b0f), LPC_QS57},
- { PCI_VDEVICE(INTEL, 0x3b12), LPC_3400},
- { PCI_VDEVICE(INTEL, 0x3b14), LPC_3420},
- { PCI_VDEVICE(INTEL, 0x3b16), LPC_3450},
- { PCI_VDEVICE(INTEL, 0x5031), LPC_EP80579},
+ { PCI_VDEVICE(INTEL, 0x0f1c), LPC_BAYTRAIL},
{ PCI_VDEVICE(INTEL, 0x1c41), LPC_CPT},
{ PCI_VDEVICE(INTEL, 0x1c42), LPC_CPTD},
{ PCI_VDEVICE(INTEL, 0x1c43), LPC_CPTM},
{ PCI_VDEVICE(INTEL, 0x1c5f), LPC_CPT},
{ PCI_VDEVICE(INTEL, 0x1d40), LPC_PBG},
{ PCI_VDEVICE(INTEL, 0x1d41), LPC_PBG},
- { PCI_VDEVICE(INTEL, 0x2310), LPC_DH89XXCC},
{ PCI_VDEVICE(INTEL, 0x1e40), LPC_PPT},
{ PCI_VDEVICE(INTEL, 0x1e41), LPC_PPT},
{ PCI_VDEVICE(INTEL, 0x1e42), LPC_PPT},
{ PCI_VDEVICE(INTEL, 0x1e5d), LPC_PPT},
{ PCI_VDEVICE(INTEL, 0x1e5e), LPC_PPT},
{ PCI_VDEVICE(INTEL, 0x1e5f), LPC_PPT},
+ { PCI_VDEVICE(INTEL, 0x1f38), LPC_AVN},
+ { PCI_VDEVICE(INTEL, 0x1f39), LPC_AVN},
+ { PCI_VDEVICE(INTEL, 0x1f3a), LPC_AVN},
+ { PCI_VDEVICE(INTEL, 0x1f3b), LPC_AVN},
+ { PCI_VDEVICE(INTEL, 0x229c), LPC_BRASWELL},
+ { PCI_VDEVICE(INTEL, 0x2310), LPC_DH89XXCC},
+ { PCI_VDEVICE(INTEL, 0x2390), LPC_COLETO},
+ { PCI_VDEVICE(INTEL, 0x2410), LPC_ICH},
+ { PCI_VDEVICE(INTEL, 0x2420), LPC_ICH0},
+ { PCI_VDEVICE(INTEL, 0x2440), LPC_ICH2},
+ { PCI_VDEVICE(INTEL, 0x244c), LPC_ICH2M},
+ { PCI_VDEVICE(INTEL, 0x2450), LPC_CICH},
+ { PCI_VDEVICE(INTEL, 0x2480), LPC_ICH3},
+ { PCI_VDEVICE(INTEL, 0x248c), LPC_ICH3M},
+ { PCI_VDEVICE(INTEL, 0x24c0), LPC_ICH4},
+ { PCI_VDEVICE(INTEL, 0x24cc), LPC_ICH4M},
+ { PCI_VDEVICE(INTEL, 0x24d0), LPC_ICH5},
+ { PCI_VDEVICE(INTEL, 0x25a1), LPC_6300ESB},
+ { PCI_VDEVICE(INTEL, 0x2640), LPC_ICH6},
+ { PCI_VDEVICE(INTEL, 0x2641), LPC_ICH6M},
+ { PCI_VDEVICE(INTEL, 0x2642), LPC_ICH6W},
+ { PCI_VDEVICE(INTEL, 0x2670), LPC_631XESB},
+ { PCI_VDEVICE(INTEL, 0x2671), LPC_631XESB},
+ { PCI_VDEVICE(INTEL, 0x2672), LPC_631XESB},
+ { PCI_VDEVICE(INTEL, 0x2673), LPC_631XESB},
+ { PCI_VDEVICE(INTEL, 0x2674), LPC_631XESB},
+ { PCI_VDEVICE(INTEL, 0x2675), LPC_631XESB},
+ { PCI_VDEVICE(INTEL, 0x2676), LPC_631XESB},
+ { PCI_VDEVICE(INTEL, 0x2677), LPC_631XESB},
+ { PCI_VDEVICE(INTEL, 0x2678), LPC_631XESB},
+ { PCI_VDEVICE(INTEL, 0x2679), LPC_631XESB},
+ { PCI_VDEVICE(INTEL, 0x267a), LPC_631XESB},
+ { PCI_VDEVICE(INTEL, 0x267b), LPC_631XESB},
+ { PCI_VDEVICE(INTEL, 0x267c), LPC_631XESB},
+ { PCI_VDEVICE(INTEL, 0x267d), LPC_631XESB},
+ { PCI_VDEVICE(INTEL, 0x267e), LPC_631XESB},
+ { PCI_VDEVICE(INTEL, 0x267f), LPC_631XESB},
+ { PCI_VDEVICE(INTEL, 0x27b0), LPC_ICH7DH},
+ { PCI_VDEVICE(INTEL, 0x27b8), LPC_ICH7},
+ { PCI_VDEVICE(INTEL, 0x27b9), LPC_ICH7M},
+ { PCI_VDEVICE(INTEL, 0x27bc), LPC_NM10},
+ { PCI_VDEVICE(INTEL, 0x27bd), LPC_ICH7MDH},
+ { PCI_VDEVICE(INTEL, 0x2810), LPC_ICH8},
+ { PCI_VDEVICE(INTEL, 0x2811), LPC_ICH8ME},
+ { PCI_VDEVICE(INTEL, 0x2812), LPC_ICH8DH},
+ { PCI_VDEVICE(INTEL, 0x2814), LPC_ICH8DO},
+ { PCI_VDEVICE(INTEL, 0x2815), LPC_ICH8M},
+ { PCI_VDEVICE(INTEL, 0x2912), LPC_ICH9DH},
+ { PCI_VDEVICE(INTEL, 0x2914), LPC_ICH9DO},
+ { PCI_VDEVICE(INTEL, 0x2916), LPC_ICH9R},
+ { PCI_VDEVICE(INTEL, 0x2917), LPC_ICH9ME},
+ { PCI_VDEVICE(INTEL, 0x2918), LPC_ICH9},
+ { PCI_VDEVICE(INTEL, 0x2919), LPC_ICH9M},
+ { PCI_VDEVICE(INTEL, 0x3a14), LPC_ICH10DO},
+ { PCI_VDEVICE(INTEL, 0x3a16), LPC_ICH10R},
+ { PCI_VDEVICE(INTEL, 0x3a18), LPC_ICH10},
+ { PCI_VDEVICE(INTEL, 0x3a1a), LPC_ICH10D},
+ { PCI_VDEVICE(INTEL, 0x3b00), LPC_PCH},
+ { PCI_VDEVICE(INTEL, 0x3b01), LPC_PCHM},
+ { PCI_VDEVICE(INTEL, 0x3b02), LPC_P55},
+ { PCI_VDEVICE(INTEL, 0x3b03), LPC_PM55},
+ { PCI_VDEVICE(INTEL, 0x3b06), LPC_H55},
+ { PCI_VDEVICE(INTEL, 0x3b07), LPC_QM57},
+ { PCI_VDEVICE(INTEL, 0x3b08), LPC_H57},
+ { PCI_VDEVICE(INTEL, 0x3b09), LPC_HM55},
+ { PCI_VDEVICE(INTEL, 0x3b0a), LPC_Q57},
+ { PCI_VDEVICE(INTEL, 0x3b0b), LPC_HM57},
+ { PCI_VDEVICE(INTEL, 0x3b0d), LPC_PCHMSFF},
+ { PCI_VDEVICE(INTEL, 0x3b0f), LPC_QS57},
+ { PCI_VDEVICE(INTEL, 0x3b12), LPC_3400},
+ { PCI_VDEVICE(INTEL, 0x3b14), LPC_3420},
+ { PCI_VDEVICE(INTEL, 0x3b16), LPC_3450},
+ { PCI_VDEVICE(INTEL, 0x5031), LPC_EP80579},
{ PCI_VDEVICE(INTEL, 0x8c40), LPC_LPT},
{ PCI_VDEVICE(INTEL, 0x8c41), LPC_LPT},
{ PCI_VDEVICE(INTEL, 0x8c42), LPC_LPT},
{ PCI_VDEVICE(INTEL, 0x8c5d), LPC_LPT},
{ PCI_VDEVICE(INTEL, 0x8c5e), LPC_LPT},
{ PCI_VDEVICE(INTEL, 0x8c5f), LPC_LPT},
- { PCI_VDEVICE(INTEL, 0x9c40), LPC_LPT_LP},
- { PCI_VDEVICE(INTEL, 0x9c41), LPC_LPT_LP},
- { PCI_VDEVICE(INTEL, 0x9c42), LPC_LPT_LP},
- { PCI_VDEVICE(INTEL, 0x9c43), LPC_LPT_LP},
- { PCI_VDEVICE(INTEL, 0x9c44), LPC_LPT_LP},
- { PCI_VDEVICE(INTEL, 0x9c45), LPC_LPT_LP},
- { PCI_VDEVICE(INTEL, 0x9c46), LPC_LPT_LP},
- { PCI_VDEVICE(INTEL, 0x9c47), LPC_LPT_LP},
+ { PCI_VDEVICE(INTEL, 0x8cc1), LPC_9S},
+ { PCI_VDEVICE(INTEL, 0x8cc2), LPC_9S},
+ { PCI_VDEVICE(INTEL, 0x8cc3), LPC_9S},
+ { PCI_VDEVICE(INTEL, 0x8cc4), LPC_9S},
+ { PCI_VDEVICE(INTEL, 0x8cc6), LPC_9S},
{ PCI_VDEVICE(INTEL, 0x8d40), LPC_WBG},
{ PCI_VDEVICE(INTEL, 0x8d41), LPC_WBG},
{ PCI_VDEVICE(INTEL, 0x8d42), LPC_WBG},
{ PCI_VDEVICE(INTEL, 0x8d5d), LPC_WBG},
{ PCI_VDEVICE(INTEL, 0x8d5e), LPC_WBG},
{ PCI_VDEVICE(INTEL, 0x8d5f), LPC_WBG},
- { PCI_VDEVICE(INTEL, 0x1f38), LPC_AVN},
- { PCI_VDEVICE(INTEL, 0x1f39), LPC_AVN},
- { PCI_VDEVICE(INTEL, 0x1f3a), LPC_AVN},
- { PCI_VDEVICE(INTEL, 0x1f3b), LPC_AVN},
- { PCI_VDEVICE(INTEL, 0x0f1c), LPC_BAYTRAIL},
- { PCI_VDEVICE(INTEL, 0x2390), LPC_COLETO},
+ { PCI_VDEVICE(INTEL, 0x9c40), LPC_LPT_LP},
+ { PCI_VDEVICE(INTEL, 0x9c41), LPC_LPT_LP},
+ { PCI_VDEVICE(INTEL, 0x9c42), LPC_LPT_LP},
+ { PCI_VDEVICE(INTEL, 0x9c43), LPC_LPT_LP},
+ { PCI_VDEVICE(INTEL, 0x9c44), LPC_LPT_LP},
+ { PCI_VDEVICE(INTEL, 0x9c45), LPC_LPT_LP},
+ { PCI_VDEVICE(INTEL, 0x9c46), LPC_LPT_LP},
+ { PCI_VDEVICE(INTEL, 0x9c47), LPC_LPT_LP},
{ PCI_VDEVICE(INTEL, 0x9cc1), LPC_WPT_LP},
{ PCI_VDEVICE(INTEL, 0x9cc2), LPC_WPT_LP},
{ PCI_VDEVICE(INTEL, 0x9cc3), LPC_WPT_LP},
{ PCI_VDEVICE(INTEL, 0x9cc6), LPC_WPT_LP},
{ PCI_VDEVICE(INTEL, 0x9cc7), LPC_WPT_LP},
{ PCI_VDEVICE(INTEL, 0x9cc9), LPC_WPT_LP},
- { PCI_VDEVICE(INTEL, 0x229c), LPC_BRASWELL},
- { PCI_VDEVICE(INTEL, 0x8cc1), LPC_9S},
- { PCI_VDEVICE(INTEL, 0x8cc2), LPC_9S},
- { PCI_VDEVICE(INTEL, 0x8cc3), LPC_9S},
- { PCI_VDEVICE(INTEL, 0x8cc4), LPC_9S},
- { PCI_VDEVICE(INTEL, 0x8cc6), LPC_9S},
{ 0, }, /* End of list */
};
MODULE_DEVICE_TABLE(pci, lpc_ich_ids);
.of_compatible = "maxim,max77693-haptic",
},
{
- .name = "max77693-flash",
- .of_compatible = "maxim,max77693-flash",
+ .name = "max77693-led",
+ .of_compatible = "maxim,max77693-led",
},
};
--- /dev/null
+/*
+ * MFD core driver for the Maxim MAX77843
+ *
+ * Copyright (C) 2015 Samsung Electronics
+ * Author: Jaewon Kim <jaewon02.kim@samsung.com>
+ * Author: Beomho Seo <beomho.seo@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/max77843-private.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+
+static const struct mfd_cell max77843_devs[] = {
+ {
+ .name = "max77843-muic",
+ .of_compatible = "maxim,max77843-muic",
+ }, {
+ .name = "max77843-regulator",
+ .of_compatible = "maxim,max77843-regulator",
+ }, {
+ .name = "max77843-charger",
+ .of_compatible = "maxim,max77843-charger"
+ }, {
+ .name = "max77843-fuelgauge",
+ .of_compatible = "maxim,max77843-fuelgauge",
+ }, {
+ .name = "max77843-haptic",
+ .of_compatible = "maxim,max77843-haptic",
+ },
+};
+
+static const struct regmap_config max77843_charger_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .max_register = MAX77843_CHG_REG_END,
+};
+
+static const struct regmap_config max77843_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .max_register = MAX77843_SYS_REG_END,
+};
+
+static const struct regmap_irq max77843_irqs[] = {
+ /* TOPSYS interrupts */
+ { .reg_offset = 0, .mask = MAX77843_SYS_IRQ_SYSUVLO_INT, },
+ { .reg_offset = 0, .mask = MAX77843_SYS_IRQ_SYSOVLO_INT, },
+ { .reg_offset = 0, .mask = MAX77843_SYS_IRQ_TSHDN_INT, },
+ { .reg_offset = 0, .mask = MAX77843_SYS_IRQ_TM_INT, },
+};
+
+static const struct regmap_irq_chip max77843_irq_chip = {
+ .name = "max77843",
+ .status_base = MAX77843_SYS_REG_SYSINTSRC,
+ .mask_base = MAX77843_SYS_REG_SYSINTMASK,
+ .mask_invert = false,
+ .num_regs = 1,
+ .irqs = max77843_irqs,
+ .num_irqs = ARRAY_SIZE(max77843_irqs),
+};
+
+/* Charger and Charger regulator use same regmap. */
+static int max77843_chg_init(struct max77843 *max77843)
+{
+ int ret;
+
+ max77843->i2c_chg = i2c_new_dummy(max77843->i2c->adapter, I2C_ADDR_CHG);
+ if (!max77843->i2c_chg) {
+ dev_err(&max77843->i2c->dev,
+ "Cannot allocate I2C device for Charger\n");
+ return PTR_ERR(max77843->i2c_chg);
+ }
+ i2c_set_clientdata(max77843->i2c_chg, max77843);
+
+ max77843->regmap_chg = devm_regmap_init_i2c(max77843->i2c_chg,
+ &max77843_charger_regmap_config);
+ if (IS_ERR(max77843->regmap_chg)) {
+ ret = PTR_ERR(max77843->regmap_chg);
+ goto err_chg_i2c;
+ }
+
+ return 0;
+
+err_chg_i2c:
+ i2c_unregister_device(max77843->i2c_chg);
+
+ return ret;
+}
+
+static int max77843_probe(struct i2c_client *i2c,
+ const struct i2c_device_id *id)
+{
+ struct max77843 *max77843;
+ unsigned int reg_data;
+ int ret;
+
+ max77843 = devm_kzalloc(&i2c->dev, sizeof(*max77843), GFP_KERNEL);
+ if (!max77843)
+ return -ENOMEM;
+
+ i2c_set_clientdata(i2c, max77843);
+ max77843->dev = &i2c->dev;
+ max77843->i2c = i2c;
+ max77843->irq = i2c->irq;
+
+ max77843->regmap = devm_regmap_init_i2c(i2c,
+ &max77843_regmap_config);
+ if (IS_ERR(max77843->regmap)) {
+ dev_err(&i2c->dev, "Failed to allocate topsys register map\n");
+ return PTR_ERR(max77843->regmap);
+ }
+
+ ret = regmap_add_irq_chip(max77843->regmap, max77843->irq,
+ IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED,
+ 0, &max77843_irq_chip, &max77843->irq_data);
+ if (ret) {
+ dev_err(&i2c->dev, "Failed to add TOPSYS IRQ chip\n");
+ return ret;
+ }
+
+ ret = regmap_read(max77843->regmap,
+ MAX77843_SYS_REG_PMICID, ®_data);
+ if (ret < 0) {
+ dev_err(&i2c->dev, "Failed to read PMIC ID\n");
+ goto err_pmic_id;
+ }
+ dev_info(&i2c->dev, "device ID: 0x%x\n", reg_data);
+
+ ret = max77843_chg_init(max77843);
+ if (ret) {
+ dev_err(&i2c->dev, "Failed to init Charger\n");
+ goto err_pmic_id;
+ }
+
+ ret = regmap_update_bits(max77843->regmap,
+ MAX77843_SYS_REG_INTSRCMASK,
+ MAX77843_INTSRC_MASK_MASK,
+ (unsigned int)~MAX77843_INTSRC_MASK_MASK);
+ if (ret < 0) {
+ dev_err(&i2c->dev, "Failed to unmask interrupt source\n");
+ goto err_pmic_id;
+ }
+
+ ret = mfd_add_devices(max77843->dev, -1, max77843_devs,
+ ARRAY_SIZE(max77843_devs), NULL, 0, NULL);
+ if (ret < 0) {
+ dev_err(&i2c->dev, "Failed to add mfd device\n");
+ goto err_pmic_id;
+ }
+
+ device_init_wakeup(max77843->dev, true);
+
+ return 0;
+
+err_pmic_id:
+ regmap_del_irq_chip(max77843->irq, max77843->irq_data);
+
+ return ret;
+}
+
+static int max77843_remove(struct i2c_client *i2c)
+{
+ struct max77843 *max77843 = i2c_get_clientdata(i2c);
+
+ mfd_remove_devices(max77843->dev);
+
+ regmap_del_irq_chip(max77843->irq, max77843->irq_data);
+
+ i2c_unregister_device(max77843->i2c_chg);
+
+ return 0;
+}
+
+static const struct of_device_id max77843_dt_match[] = {
+ { .compatible = "maxim,max77843", },
+ { },
+};
+
+static const struct i2c_device_id max77843_id[] = {
+ { "max77843", },
+ { },
+};
+MODULE_DEVICE_TABLE(i2c, max77843_id);
+
+static int __maybe_unused max77843_suspend(struct device *dev)
+{
+ struct i2c_client *i2c = container_of(dev, struct i2c_client, dev);
+ struct max77843 *max77843 = i2c_get_clientdata(i2c);
+
+ disable_irq(max77843->irq);
+ if (device_may_wakeup(dev))
+ enable_irq_wake(max77843->irq);
+
+ return 0;
+}
+
+static int __maybe_unused max77843_resume(struct device *dev)
+{
+ struct i2c_client *i2c = container_of(dev, struct i2c_client, dev);
+ struct max77843 *max77843 = i2c_get_clientdata(i2c);
+
+ if (device_may_wakeup(dev))
+ disable_irq_wake(max77843->irq);
+ enable_irq(max77843->irq);
+
+ return 0;
+}
+
+static SIMPLE_DEV_PM_OPS(max77843_pm, max77843_suspend, max77843_resume);
+
+static struct i2c_driver max77843_i2c_driver = {
+ .driver = {
+ .name = "max77843",
+ .pm = &max77843_pm,
+ .of_match_table = max77843_dt_match,
+ },
+ .probe = max77843_probe,
+ .remove = max77843_remove,
+ .id_table = max77843_id,
+};
+
+static int __init max77843_i2c_init(void)
+{
+ return i2c_add_driver(&max77843_i2c_driver);
+}
+subsys_initcall(max77843_i2c_init);
+
+static void __exit max77843_i2c_exit(void)
+{
+ i2c_del_driver(&max77843_i2c_driver);
+}
+module_exit(max77843_i2c_exit);
void mc13xxx_lock(struct mc13xxx *mc13xxx)
{
if (!mutex_trylock(&mc13xxx->lock)) {
- dev_dbg(mc13xxx->dev, "wait for %s from %pf\n",
+ dev_dbg(mc13xxx->dev, "wait for %s from %ps\n",
__func__, __builtin_return_address(0));
mutex_lock(&mc13xxx->lock);
}
- dev_dbg(mc13xxx->dev, "%s from %pf\n",
+ dev_dbg(mc13xxx->dev, "%s from %ps\n",
__func__, __builtin_return_address(0));
}
EXPORT_SYMBOL(mc13xxx_lock);
void mc13xxx_unlock(struct mc13xxx *mc13xxx)
{
- dev_dbg(mc13xxx->dev, "%s from %pf\n",
+ dev_dbg(mc13xxx->dev, "%s from %ps\n",
__func__, __builtin_return_address(0));
mutex_unlock(&mc13xxx->lock);
}
{ 1450, 18 },
};
-int menelaus_set_vcore_sw(unsigned int mV)
-{
- int val, ret;
- struct i2c_client *c = the_menelaus->client;
-
- val = menelaus_get_vtg_value(mV, vcore_values,
- ARRAY_SIZE(vcore_values));
- if (val < 0)
- return -EINVAL;
-
- dev_dbg(&c->dev, "Setting VCORE to %d mV (val 0x%02x)\n", mV, val);
-
- /* Set SW mode and the voltage in one go. */
- mutex_lock(&the_menelaus->lock);
- ret = menelaus_write_reg(MENELAUS_VCORE_CTRL1, val);
- if (ret == 0)
- the_menelaus->vcore_hw_mode = 0;
- mutex_unlock(&the_menelaus->lock);
- msleep(1);
-
- return ret;
-}
-
int menelaus_set_vcore_hw(unsigned int roof_mV, unsigned int floor_mV)
{
int fval, rval, val, ret;
err = menelaus_read_reg(MENELAUS_VCORE_CTRL1);
if (err < 0)
goto fail;
- if (err & BIT(7))
+ if (err & VCORE_CTRL1_HW_NSW)
menelaus->vcore_hw_mode = 1;
else
menelaus->vcore_hw_mode = 0;
return err;
}
-static int __exit menelaus_remove(struct i2c_client *client)
+static int menelaus_remove(struct i2c_client *client)
{
struct menelaus_chip *menelaus = i2c_get_clientdata(client);
.name = DRIVER_NAME,
},
.probe = menelaus_probe,
- .remove = __exit_p(menelaus_remove),
+ .remove = menelaus_remove,
.id_table = menelaus_id,
};
int platform_id;
int r;
- if (id < 0)
+ if (id == PLATFORM_DEVID_AUTO)
platform_id = id;
else
platform_id = id + cell->id;
--- /dev/null
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ * Author: Flora Fu, MediaTek
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/of_irq.h>
+#include <linux/regmap.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/mt6397/core.h>
+#include <linux/mfd/mt6397/registers.h>
+
+static const struct mfd_cell mt6397_devs[] = {
+ {
+ .name = "mt6397-rtc",
+ .of_compatible = "mediatek,mt6397-rtc",
+ }, {
+ .name = "mt6397-regulator",
+ .of_compatible = "mediatek,mt6397-regulator",
+ }, {
+ .name = "mt6397-codec",
+ .of_compatible = "mediatek,mt6397-codec",
+ }, {
+ .name = "mt6397-clk",
+ .of_compatible = "mediatek,mt6397-clk",
+ },
+};
+
+static void mt6397_irq_lock(struct irq_data *data)
+{
+ struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq);
+
+ mutex_lock(&mt6397->irqlock);
+}
+
+static void mt6397_irq_sync_unlock(struct irq_data *data)
+{
+ struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq);
+
+ regmap_write(mt6397->regmap, MT6397_INT_CON0, mt6397->irq_masks_cur[0]);
+ regmap_write(mt6397->regmap, MT6397_INT_CON1, mt6397->irq_masks_cur[1]);
+
+ mutex_unlock(&mt6397->irqlock);
+}
+
+static void mt6397_irq_disable(struct irq_data *data)
+{
+ struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq);
+ int shift = data->hwirq & 0xf;
+ int reg = data->hwirq >> 4;
+
+ mt6397->irq_masks_cur[reg] &= ~BIT(shift);
+}
+
+static void mt6397_irq_enable(struct irq_data *data)
+{
+ struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq);
+ int shift = data->hwirq & 0xf;
+ int reg = data->hwirq >> 4;
+
+ mt6397->irq_masks_cur[reg] |= BIT(shift);
+}
+
+static struct irq_chip mt6397_irq_chip = {
+ .name = "mt6397-irq",
+ .irq_bus_lock = mt6397_irq_lock,
+ .irq_bus_sync_unlock = mt6397_irq_sync_unlock,
+ .irq_enable = mt6397_irq_enable,
+ .irq_disable = mt6397_irq_disable,
+};
+
+static void mt6397_irq_handle_reg(struct mt6397_chip *mt6397, int reg,
+ int irqbase)
+{
+ unsigned int status;
+ int i, irq, ret;
+
+ ret = regmap_read(mt6397->regmap, reg, &status);
+ if (ret) {
+ dev_err(mt6397->dev, "Failed to read irq status: %d\n", ret);
+ return;
+ }
+
+ for (i = 0; i < 16; i++) {
+ if (status & BIT(i)) {
+ irq = irq_find_mapping(mt6397->irq_domain, irqbase + i);
+ if (irq)
+ handle_nested_irq(irq);
+ }
+ }
+
+ regmap_write(mt6397->regmap, reg, status);
+}
+
+static irqreturn_t mt6397_irq_thread(int irq, void *data)
+{
+ struct mt6397_chip *mt6397 = data;
+
+ mt6397_irq_handle_reg(mt6397, MT6397_INT_STATUS0, 0);
+ mt6397_irq_handle_reg(mt6397, MT6397_INT_STATUS1, 16);
+
+ return IRQ_HANDLED;
+}
+
+static int mt6397_irq_domain_map(struct irq_domain *d, unsigned int irq,
+ irq_hw_number_t hw)
+{
+ struct mt6397_chip *mt6397 = d->host_data;
+
+ irq_set_chip_data(irq, mt6397);
+ irq_set_chip_and_handler(irq, &mt6397_irq_chip, handle_level_irq);
+ irq_set_nested_thread(irq, 1);
+#ifdef CONFIG_ARM
+ set_irq_flags(irq, IRQF_VALID);
+#else
+ irq_set_noprobe(irq);
+#endif
+
+ return 0;
+}
+
+static struct irq_domain_ops mt6397_irq_domain_ops = {
+ .map = mt6397_irq_domain_map,
+};
+
+static int mt6397_irq_init(struct mt6397_chip *mt6397)
+{
+ int ret;
+
+ mutex_init(&mt6397->irqlock);
+
+ /* Mask all interrupt sources */
+ regmap_write(mt6397->regmap, MT6397_INT_CON0, 0x0);
+ regmap_write(mt6397->regmap, MT6397_INT_CON1, 0x0);
+
+ mt6397->irq_domain = irq_domain_add_linear(mt6397->dev->of_node,
+ MT6397_IRQ_NR, &mt6397_irq_domain_ops, mt6397);
+ if (!mt6397->irq_domain) {
+ dev_err(mt6397->dev, "could not create irq domain\n");
+ return -ENOMEM;
+ }
+
+ ret = devm_request_threaded_irq(mt6397->dev, mt6397->irq, NULL,
+ mt6397_irq_thread, IRQF_ONESHOT, "mt6397-pmic", mt6397);
+ if (ret) {
+ dev_err(mt6397->dev, "failed to register irq=%d; err: %d\n",
+ mt6397->irq, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int mt6397_probe(struct platform_device *pdev)
+{
+ int ret;
+ struct mt6397_chip *mt6397;
+
+ mt6397 = devm_kzalloc(&pdev->dev, sizeof(*mt6397), GFP_KERNEL);
+ if (!mt6397)
+ return -ENOMEM;
+
+ mt6397->dev = &pdev->dev;
+ /*
+ * mt6397 MFD is child device of soc pmic wrapper.
+ * Regmap is set from its parent.
+ */
+ mt6397->regmap = dev_get_regmap(pdev->dev.parent, NULL);
+ if (!mt6397->regmap)
+ return -ENODEV;
+
+ platform_set_drvdata(pdev, mt6397);
+
+ mt6397->irq = platform_get_irq(pdev, 0);
+ if (mt6397->irq > 0) {
+ ret = mt6397_irq_init(mt6397);
+ if (ret)
+ return ret;
+ }
+
+ ret = mfd_add_devices(&pdev->dev, -1, mt6397_devs,
+ ARRAY_SIZE(mt6397_devs), NULL, 0, NULL);
+ if (ret)
+ dev_err(&pdev->dev, "failed to add child devices: %d\n", ret);
+
+ return ret;
+}
+
+static int mt6397_remove(struct platform_device *pdev)
+{
+ mfd_remove_devices(&pdev->dev);
+
+ return 0;
+}
+
+static const struct of_device_id mt6397_of_match[] = {
+ { .compatible = "mediatek,mt6397" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, mt6397_of_match);
+
+static struct platform_driver mt6397_driver = {
+ .probe = mt6397_probe,
+ .remove = mt6397_remove,
+ .driver = {
+ .name = "mt6397",
+ .of_match_table = of_match_ptr(mt6397_of_match),
+ },
+};
+
+module_platform_driver(mt6397_driver);
+
+MODULE_AUTHOR("Flora Fu, MediaTek");
+MODULE_DESCRIPTION("Driver for MediaTek MT6397 PMIC");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:mt6397");
#include <linux/regmap.h>
#include <linux/of_platform.h>
+#define PMIC_REV2 0x101
+#define PMIC_REV3 0x102
+#define PMIC_REV4 0x103
+#define PMIC_TYPE 0x104
+#define PMIC_SUBTYPE 0x105
+
+#define PMIC_TYPE_VALUE 0x51
+
+#define COMMON_SUBTYPE 0x00
+#define PM8941_SUBTYPE 0x01
+#define PM8841_SUBTYPE 0x02
+#define PM8019_SUBTYPE 0x03
+#define PM8226_SUBTYPE 0x04
+#define PM8110_SUBTYPE 0x05
+#define PMA8084_SUBTYPE 0x06
+#define PMI8962_SUBTYPE 0x07
+#define PMD9635_SUBTYPE 0x08
+#define PM8994_SUBTYPE 0x09
+#define PMI8994_SUBTYPE 0x0a
+#define PM8916_SUBTYPE 0x0b
+#define PM8004_SUBTYPE 0x0c
+#define PM8909_SUBTYPE 0x0d
+
+static const struct of_device_id pmic_spmi_id_table[] = {
+ { .compatible = "qcom,spmi-pmic", .data = (void *)COMMON_SUBTYPE },
+ { .compatible = "qcom,pm8941", .data = (void *)PM8941_SUBTYPE },
+ { .compatible = "qcom,pm8841", .data = (void *)PM8841_SUBTYPE },
+ { .compatible = "qcom,pm8019", .data = (void *)PM8019_SUBTYPE },
+ { .compatible = "qcom,pm8226", .data = (void *)PM8226_SUBTYPE },
+ { .compatible = "qcom,pm8110", .data = (void *)PM8110_SUBTYPE },
+ { .compatible = "qcom,pma8084", .data = (void *)PMA8084_SUBTYPE },
+ { .compatible = "qcom,pmi8962", .data = (void *)PMI8962_SUBTYPE },
+ { .compatible = "qcom,pmd9635", .data = (void *)PMD9635_SUBTYPE },
+ { .compatible = "qcom,pm8994", .data = (void *)PM8994_SUBTYPE },
+ { .compatible = "qcom,pmi8994", .data = (void *)PMI8994_SUBTYPE },
+ { .compatible = "qcom,pm8916", .data = (void *)PM8916_SUBTYPE },
+ { .compatible = "qcom,pm8004", .data = (void *)PM8004_SUBTYPE },
+ { .compatible = "qcom,pm8909", .data = (void *)PM8909_SUBTYPE },
+ { }
+};
+
+static void pmic_spmi_show_revid(struct regmap *map, struct device *dev)
+{
+ unsigned int rev2, minor, major, type, subtype;
+ const char *name = "unknown";
+ int ret, i;
+
+ ret = regmap_read(map, PMIC_TYPE, &type);
+ if (ret < 0)
+ return;
+
+ if (type != PMIC_TYPE_VALUE)
+ return;
+
+ ret = regmap_read(map, PMIC_SUBTYPE, &subtype);
+ if (ret < 0)
+ return;
+
+ for (i = 0; i < ARRAY_SIZE(pmic_spmi_id_table); i++) {
+ if (subtype == (unsigned long)pmic_spmi_id_table[i].data)
+ break;
+ }
+
+ if (i != ARRAY_SIZE(pmic_spmi_id_table))
+ name = pmic_spmi_id_table[i].compatible;
+
+ ret = regmap_read(map, PMIC_REV2, &rev2);
+ if (ret < 0)
+ return;
+
+ ret = regmap_read(map, PMIC_REV3, &minor);
+ if (ret < 0)
+ return;
+
+ ret = regmap_read(map, PMIC_REV4, &major);
+ if (ret < 0)
+ return;
+
+ /*
+ * In early versions of PM8941 and PM8226, the major revision number
+ * started incrementing from 0 (eg 0 = v1.0, 1 = v2.0).
+ * Increment the major revision number here if the chip is an early
+ * version of PM8941 or PM8226.
+ */
+ if ((subtype == PM8941_SUBTYPE || subtype == PM8226_SUBTYPE) &&
+ major < 0x02)
+ major++;
+
+ if (subtype == PM8110_SUBTYPE)
+ minor = rev2;
+
+ dev_dbg(dev, "%x: %s v%d.%d\n", subtype, name, major, minor);
+}
+
static const struct regmap_config spmi_regmap_config = {
.reg_bits = 16,
.val_bits = 8,
if (IS_ERR(regmap))
return PTR_ERR(regmap);
+ pmic_spmi_show_revid(regmap, &sdev->dev);
+
return of_platform_populate(root, NULL, NULL, &sdev->dev);
}
of_platform_depopulate(&sdev->dev);
}
-static const struct of_device_id pmic_spmi_id_table[] = {
- { .compatible = "qcom,spmi-pmic" },
- { .compatible = "qcom,pm8941" },
- { .compatible = "qcom,pm8841" },
- { .compatible = "qcom,pma8084" },
- { }
-};
MODULE_DEVICE_TABLE(of, pmic_spmi_id_table);
static struct spmi_driver pmic_spmi_driver = {
.n_resources = ARRAY_SIZE(msm8960_rpm_resource_table),
};
+static const struct qcom_rpm_resource ipq806x_rpm_resource_table[] = {
+ [QCOM_RPM_CXO_CLK] = { 25, 9, 5, 1 },
+ [QCOM_RPM_PXO_CLK] = { 26, 10, 6, 1 },
+ [QCOM_RPM_APPS_FABRIC_CLK] = { 27, 11, 8, 1 },
+ [QCOM_RPM_SYS_FABRIC_CLK] = { 28, 12, 9, 1 },
+ [QCOM_RPM_NSS_FABRIC_0_CLK] = { 29, 13, 10, 1 },
+ [QCOM_RPM_DAYTONA_FABRIC_CLK] = { 30, 14, 11, 1 },
+ [QCOM_RPM_SFPB_CLK] = { 31, 15, 12, 1 },
+ [QCOM_RPM_CFPB_CLK] = { 32, 16, 13, 1 },
+ [QCOM_RPM_NSS_FABRIC_1_CLK] = { 33, 17, 14, 1 },
+ [QCOM_RPM_EBI1_CLK] = { 34, 18, 16, 1 },
+ [QCOM_RPM_APPS_FABRIC_HALT] = { 35, 19, 18, 2 },
+ [QCOM_RPM_APPS_FABRIC_MODE] = { 37, 20, 19, 3 },
+ [QCOM_RPM_APPS_FABRIC_IOCTL] = { 40, 21, 20, 1 },
+ [QCOM_RPM_APPS_FABRIC_ARB] = { 41, 22, 21, 12 },
+ [QCOM_RPM_SYS_FABRIC_HALT] = { 53, 23, 22, 2 },
+ [QCOM_RPM_SYS_FABRIC_MODE] = { 55, 24, 23, 3 },
+ [QCOM_RPM_SYS_FABRIC_IOCTL] = { 58, 25, 24, 1 },
+ [QCOM_RPM_SYS_FABRIC_ARB] = { 59, 26, 25, 30 },
+ [QCOM_RPM_MM_FABRIC_HALT] = { 89, 27, 26, 2 },
+ [QCOM_RPM_MM_FABRIC_MODE] = { 91, 28, 27, 3 },
+ [QCOM_RPM_MM_FABRIC_IOCTL] = { 94, 29, 28, 1 },
+ [QCOM_RPM_MM_FABRIC_ARB] = { 95, 30, 29, 2 },
+ [QCOM_RPM_CXO_BUFFERS] = { 209, 33, 31, 1 },
+ [QCOM_RPM_USB_OTG_SWITCH] = { 210, 34, 32, 1 },
+ [QCOM_RPM_HDMI_SWITCH] = { 211, 35, 33, 1 },
+ [QCOM_RPM_DDR_DMM] = { 212, 36, 34, 2 },
+ [QCOM_RPM_VDDMIN_GPIO] = { 215, 40, 39, 1 },
+ [QCOM_RPM_SMB208_S1a] = { 216, 41, 90, 2 },
+ [QCOM_RPM_SMB208_S1b] = { 218, 43, 91, 2 },
+ [QCOM_RPM_SMB208_S2a] = { 220, 45, 92, 2 },
+ [QCOM_RPM_SMB208_S2b] = { 222, 47, 93, 2 },
+};
+
+static const struct qcom_rpm_data ipq806x_template = {
+ .version = 3,
+ .resource_table = ipq806x_rpm_resource_table,
+ .n_resources = ARRAY_SIZE(ipq806x_rpm_resource_table),
+};
+
static const struct of_device_id qcom_rpm_of_match[] = {
{ .compatible = "qcom,rpm-apq8064", .data = &apq8064_template },
{ .compatible = "qcom,rpm-msm8660", .data = &msm8660_template },
{ .compatible = "qcom,rpm-msm8960", .data = &msm8960_template },
+ { .compatible = "qcom,rpm-ipq8064", .data = &ipq806x_template },
{ }
};
MODULE_DEVICE_TABLE(of, qcom_rpm_of_match);
{ RK808_BOOST_CONFIG_REG, BOOST_ILMIN_MASK, BOOST_ILMIN_100MA },
{ RK808_BUCK1_CONFIG_REG, BUCK1_RATE_MASK, BUCK_ILMIN_200MA },
{ RK808_BUCK2_CONFIG_REG, BUCK2_RATE_MASK, BUCK_ILMIN_200MA },
+ { RK808_DCDC_UV_ACT_REG, BUCK_UV_ACT_MASK, BUCK_UV_ACT_DISABLE},
{ RK808_VB_MON_REG, MASK_ALL, VB_LO_ACT |
VB_LO_SEL_3500MV },
};
return 0;
}
-static struct of_device_id rk808_of_match[] = {
+static const struct of_device_id rk808_of_match[] = {
{ .compatible = "rockchip,rk808" },
{ },
};
u8 reg3 = 0;
rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, ®1);
- dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg1);
+ pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg1);
if (!rtsx_vendor_setting_valid(reg1))
return;
pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg1);
rtsx_pci_read_config_byte(pcr, PCR_SETTING_REG3, ®3);
- dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG3, reg3);
+ pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG3, reg3);
pcr->sd30_drive_sel_3v3 = rtl8411_reg_to_sd30_drive_sel_3v3(reg3);
}
u32 reg = 0;
rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, ®);
- dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
+ pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
if (!rtsx_vendor_setting_valid(reg))
return;
rtsx_pci_write_register(pcr, CARD_PWR_CTL,
BPP_POWER_MASK, BPP_POWER_OFF);
- dev_dbg(&(pcr->pci->dev),
- "After CD deglitch, card_exist = 0x%x\n",
- card_exist);
+ pcr_dbg(pcr, "After CD deglitch, card_exist = 0x%x\n",
+ card_exist);
}
if (card_exist & MS_EXIST) {
u32 reg;
rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, ®);
- dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
+ pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
if (rts5209_vendor_setting1_valid(reg)) {
if (rts5209_reg_check_ms_pmos(reg))
}
rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, ®);
- dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
+ pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
if (rts5209_vendor_setting2_valid(reg)) {
pcr->sd30_drive_sel_1v8 =
u32 reg;
rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, ®);
- dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
+ pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
if (!rtsx_vendor_setting_valid(reg))
return;
pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);
rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, ®);
- dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
+ pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg);
if (rtsx_reg_check_reverse_socket(reg))
pcr->flags |= PCR_REVERSE_SOCKET;
rts5227_fill_driving(pcr, OUTPUT_3V3);
/* Configure force_clock_req */
if (pcr->flags & PCR_REVERSE_SOCKET)
- rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,
- AUTOLOAD_CFG_BASE + 3, 0xB8, 0xB8);
+ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB8, 0xB8);
else
- rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,
- AUTOLOAD_CFG_BASE + 3, 0xB8, 0x88);
+ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB8, 0x88);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CTRL3, 0x10, 0x00);
return rtsx_pci_send_cmd(pcr, 100);
{
int err;
- err = rtsx_gops_pm_reset(pcr);
+ err = rtsx_pci_write_register(pcr, PM_CTRL3, D3_DELINK_MODE_EN, 0x00);
if (err < 0)
return err;
u32 reg;
rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, ®);
- dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
+ pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
if (!rtsx_vendor_setting_valid(reg))
return;
pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);
rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, ®);
- dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
+ pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
pcr->sd30_drive_sel_3v3 =
map_sd_drive(rtsx_reg_to_sd30_drive_sel_3v3(reg));
}
static void rts5249_fill_driving(struct rtsx_pcr *pcr, u8 voltage)
{
u8 driving_3v3[4][3] = {
- {0x11, 0x11, 0x11},
+ {0x11, 0x11, 0x18},
{0x55, 0x55, 0x5C},
- {0x99, 0x99, 0x92},
- {0x99, 0x99, 0x92},
+ {0xFF, 0xFF, 0xFF},
+ {0x96, 0x96, 0x96},
};
u8 driving_1v8[4][3] = {
+ {0xC4, 0xC4, 0xC4},
{0x3C, 0x3C, 0x3C},
- {0xB3, 0xB3, 0xB3},
{0xFE, 0xFE, 0xFE},
- {0xC4, 0xC4, 0xC4},
+ {0xB3, 0xB3, 0xB3},
};
u8 (*driving)[3], drive_sel;
0xFF, driving[drive_sel][2]);
}
-static void rts5249_fetch_vendor_settings(struct rtsx_pcr *pcr)
+static void rtsx_base_fetch_vendor_settings(struct rtsx_pcr *pcr)
{
u32 reg;
rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, ®);
- dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
+ pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
- if (!rtsx_vendor_setting_valid(reg))
+ if (!rtsx_vendor_setting_valid(reg)) {
+ pcr_dbg(pcr, "skip fetch vendor setting\n");
return;
+ }
pcr->aspm_en = rtsx_reg_to_aspm(reg);
pcr->sd30_drive_sel_1v8 = rtsx_reg_to_sd30_drive_sel_1v8(reg);
pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);
rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, ®);
- dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
+ pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg);
if (rtsx_reg_check_reverse_socket(reg))
pcr->flags |= PCR_REVERSE_SOCKET;
}
-static void rts5249_force_power_down(struct rtsx_pcr *pcr, u8 pm_state)
+static void rtsx_base_force_power_down(struct rtsx_pcr *pcr, u8 pm_state)
{
/* Set relink_time to 0 */
rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 1, 0xFF, 0);
rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 3, 0x01, 0);
if (pm_state == HOST_ENTER_S3)
- rtsx_pci_write_register(pcr, PM_CTRL3, 0x10, 0x10);
+ rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3,
+ D3_DELINK_MODE_EN, D3_DELINK_MODE_EN);
rtsx_pci_write_register(pcr, FPDCTL, 0x03, 0x03);
}
{
rtsx_pci_init_cmd(pcr);
+ /* Rest L1SUB Config */
+ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, L1SUB_CONFIG3, 0xFF, 0x00);
/* Configure GPIO as output */
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02);
/* Reset ASPM state to default value */
/* Configure driving */
rts5249_fill_driving(pcr, OUTPUT_3V3);
if (pcr->flags & PCR_REVERSE_SOCKET)
- rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,
- AUTOLOAD_CFG_BASE + 3, 0xB0, 0xB0);
+ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB0, 0xB0);
else
- rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,
- AUTOLOAD_CFG_BASE + 3, 0xB0, 0x80);
- rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CTRL3, 0x10, 0x00);
+ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB0, 0x80);
return rtsx_pci_send_cmd(pcr, 100);
}
{
int err;
- err = rtsx_gops_pm_reset(pcr);
+ err = rtsx_pci_write_register(pcr, PM_CTRL3, D3_DELINK_MODE_EN, 0x00);
if (err < 0)
return err;
- err = rtsx_pci_write_phy_register(pcr, PHY_REG_REV,
- PHY_REG_REV_RESV | PHY_REG_REV_RXIDLE_LATCHED |
- PHY_REG_REV_P1_EN | PHY_REG_REV_RXIDLE_EN |
- PHY_REG_REV_RX_PWST | PHY_REG_REV_CLKREQ_DLY_TIMER_1_0 |
- PHY_REG_REV_STOP_CLKRD | PHY_REG_REV_STOP_CLKWR);
+ err = rtsx_pci_write_phy_register(pcr, PHY_REV,
+ PHY_REV_RESV | PHY_REV_RXIDLE_LATCHED |
+ PHY_REV_P1_EN | PHY_REV_RXIDLE_EN |
+ PHY_REV_CLKREQ_TX_EN | PHY_REV_RX_PWST |
+ PHY_REV_CLKREQ_DT_1_0 | PHY_REV_STOP_CLKRD |
+ PHY_REV_STOP_CLKWR);
if (err < 0)
return err;
PHY_BPCR_IB_FILTER | PHY_BPCR_CMIRROR_EN);
if (err < 0)
return err;
+
err = rtsx_pci_write_phy_register(pcr, PHY_PCR,
PHY_PCR_FORCE_CODE | PHY_PCR_OOBS_CALI_50 |
PHY_PCR_OOBS_VCM_08 | PHY_PCR_OOBS_SEN_90 |
- PHY_PCR_RSSI_EN);
+ PHY_PCR_RSSI_EN | PHY_PCR_RX10K);
if (err < 0)
return err;
+
err = rtsx_pci_write_phy_register(pcr, PHY_RCR2,
PHY_RCR2_EMPHASE_EN | PHY_RCR2_NADJR |
- PHY_RCR2_CDR_CP_10 | PHY_RCR2_CDR_SR_2 |
- PHY_RCR2_FREQSEL_12 | PHY_RCR2_CPADJEN |
- PHY_RCR2_CDR_SC_8 | PHY_RCR2_CALIB_LATE);
+ PHY_RCR2_CDR_SR_2 | PHY_RCR2_FREQSEL_12 |
+ PHY_RCR2_CDR_SC_12P | PHY_RCR2_CALIB_LATE);
if (err < 0)
return err;
+
err = rtsx_pci_write_phy_register(pcr, PHY_FLD4,
PHY_FLD4_FLDEN_SEL | PHY_FLD4_REQ_REF |
PHY_FLD4_RXAMP_OFF | PHY_FLD4_REQ_ADDA |
PHY_FLD4_BER_CHK_EN);
if (err < 0)
return err;
- err = rtsx_pci_write_phy_register(pcr, PHY_RDR, PHY_RDR_RXDSEL_1_9);
+ err = rtsx_pci_write_phy_register(pcr, PHY_RDR,
+ PHY_RDR_RXDSEL_1_9 | PHY_SSC_AUTO_PWD);
if (err < 0)
return err;
err = rtsx_pci_write_phy_register(pcr, PHY_RCR1,
- PHY_RCR1_ADP_TIME | PHY_RCR1_VCO_COARSE);
+ PHY_RCR1_ADP_TIME_4 | PHY_RCR1_VCO_COARSE);
if (err < 0)
return err;
err = rtsx_pci_write_phy_register(pcr, PHY_FLD3,
PHY_FLD3_RXDELINK);
if (err < 0)
return err;
+
return rtsx_pci_write_phy_register(pcr, PHY_TUNE,
PHY_TUNE_TUNEREF_1_0 | PHY_TUNE_VBGSEL_1252 |
PHY_TUNE_SDBUS_33 | PHY_TUNE_TUNED18 |
- PHY_TUNE_TUNED12);
+ PHY_TUNE_TUNED12 | PHY_TUNE_TUNEA12);
}
-static int rts5249_turn_on_led(struct rtsx_pcr *pcr)
+static int rtsx_base_turn_on_led(struct rtsx_pcr *pcr)
{
return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x02);
}
-static int rts5249_turn_off_led(struct rtsx_pcr *pcr)
+static int rtsx_base_turn_off_led(struct rtsx_pcr *pcr)
{
return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x00);
}
-static int rts5249_enable_auto_blink(struct rtsx_pcr *pcr)
+static int rtsx_base_enable_auto_blink(struct rtsx_pcr *pcr)
{
return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x08);
}
-static int rts5249_disable_auto_blink(struct rtsx_pcr *pcr)
+static int rtsx_base_disable_auto_blink(struct rtsx_pcr *pcr)
{
return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x00);
}
-static int rts5249_card_power_on(struct rtsx_pcr *pcr, int card)
+static int rtsx_base_card_power_on(struct rtsx_pcr *pcr, int card)
{
int err;
return 0;
}
-static int rts5249_card_power_off(struct rtsx_pcr *pcr, int card)
+static int rtsx_base_card_power_off(struct rtsx_pcr *pcr, int card)
{
rtsx_pci_init_cmd(pcr);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
return rtsx_pci_send_cmd(pcr, 100);
}
-static int rts5249_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
+static int rtsx_base_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
{
int err;
+ u16 append;
- if (voltage == OUTPUT_3V3) {
- err = rtsx_pci_write_phy_register(pcr, PHY_TUNE, 0x4FC0 | 0x24);
+ switch (voltage) {
+ case OUTPUT_3V3:
+ err = rtsx_pci_update_phy(pcr, PHY_TUNE, PHY_TUNE_VOLTAGE_MASK,
+ PHY_TUNE_VOLTAGE_3V3);
if (err < 0)
return err;
- } else if (voltage == OUTPUT_1V8) {
- err = rtsx_pci_write_phy_register(pcr, PHY_BACR, 0x3C02);
+ break;
+ case OUTPUT_1V8:
+ append = PHY_TUNE_D18_1V8;
+ if (CHK_PCI_PID(pcr, 0x5249)) {
+ err = rtsx_pci_update_phy(pcr, PHY_BACR,
+ PHY_BACR_BASIC_MASK, 0);
+ if (err < 0)
+ return err;
+ append = PHY_TUNE_D18_1V7;
+ }
+
+ err = rtsx_pci_update_phy(pcr, PHY_TUNE, PHY_TUNE_VOLTAGE_MASK,
+ append);
if (err < 0)
return err;
- err = rtsx_pci_write_phy_register(pcr, PHY_TUNE, 0x4C40 | 0x24);
- if (err < 0)
- return err;
- } else {
+ break;
+ default:
+ pcr_dbg(pcr, "unknown output voltage %d\n", voltage);
return -EINVAL;
}
}
static const struct pcr_ops rts5249_pcr_ops = {
- .fetch_vendor_settings = rts5249_fetch_vendor_settings,
+ .fetch_vendor_settings = rtsx_base_fetch_vendor_settings,
.extra_init_hw = rts5249_extra_init_hw,
.optimize_phy = rts5249_optimize_phy,
- .turn_on_led = rts5249_turn_on_led,
- .turn_off_led = rts5249_turn_off_led,
- .enable_auto_blink = rts5249_enable_auto_blink,
- .disable_auto_blink = rts5249_disable_auto_blink,
- .card_power_on = rts5249_card_power_on,
- .card_power_off = rts5249_card_power_off,
- .switch_output_voltage = rts5249_switch_output_voltage,
- .force_power_down = rts5249_force_power_down,
+ .turn_on_led = rtsx_base_turn_on_led,
+ .turn_off_led = rtsx_base_turn_off_led,
+ .enable_auto_blink = rtsx_base_enable_auto_blink,
+ .disable_auto_blink = rtsx_base_disable_auto_blink,
+ .card_power_on = rtsx_base_card_power_on,
+ .card_power_off = rtsx_base_card_power_off,
+ .switch_output_voltage = rtsx_base_switch_output_voltage,
+ .force_power_down = rtsx_base_force_power_down,
};
/* SD Pull Control Enable:
pcr->flags = 0;
pcr->card_drive_sel = RTSX_CARD_DRIVE_DEFAULT;
- pcr->sd30_drive_sel_1v8 = CFG_DRIVER_TYPE_C;
+ pcr->sd30_drive_sel_1v8 = CFG_DRIVER_TYPE_B;
pcr->sd30_drive_sel_3v3 = CFG_DRIVER_TYPE_B;
pcr->aspm_en = ASPM_L1_EN;
pcr->tx_initial_phase = SET_CLOCK_PHASE(1, 29, 16);
pcr->sd_pull_ctl_disable_tbl = rts5249_sd_pull_ctl_disable_tbl;
pcr->ms_pull_ctl_enable_tbl = rts5249_ms_pull_ctl_enable_tbl;
pcr->ms_pull_ctl_disable_tbl = rts5249_ms_pull_ctl_disable_tbl;
+
+ pcr->reg_pm_ctrl3 = PM_CTRL3;
+}
+
+static int rts524a_write_phy(struct rtsx_pcr *pcr, u8 addr, u16 val)
+{
+ addr = addr & 0x80 ? (addr & 0x7F) | 0x40 : addr;
+
+ return __rtsx_pci_write_phy_register(pcr, addr, val);
+}
+
+static int rts524a_read_phy(struct rtsx_pcr *pcr, u8 addr, u16 *val)
+{
+ addr = addr & 0x80 ? (addr & 0x7F) | 0x40 : addr;
+
+ return __rtsx_pci_read_phy_register(pcr, addr, val);
}
+
+static int rts524a_optimize_phy(struct rtsx_pcr *pcr)
+{
+ int err;
+
+ err = rtsx_pci_write_register(pcr, RTS524A_PM_CTRL3,
+ D3_DELINK_MODE_EN, 0x00);
+ if (err < 0)
+ return err;
+
+ rtsx_pci_write_phy_register(pcr, PHY_PCR,
+ PHY_PCR_FORCE_CODE | PHY_PCR_OOBS_CALI_50 |
+ PHY_PCR_OOBS_VCM_08 | PHY_PCR_OOBS_SEN_90 | PHY_PCR_RSSI_EN);
+ rtsx_pci_write_phy_register(pcr, PHY_SSCCR3,
+ PHY_SSCCR3_STEP_IN | PHY_SSCCR3_CHECK_DELAY);
+
+ if (is_version(pcr, 0x524A, IC_VER_A)) {
+ rtsx_pci_write_phy_register(pcr, PHY_SSCCR3,
+ PHY_SSCCR3_STEP_IN | PHY_SSCCR3_CHECK_DELAY);
+ rtsx_pci_write_phy_register(pcr, PHY_SSCCR2,
+ PHY_SSCCR2_PLL_NCODE | PHY_SSCCR2_TIME0 |
+ PHY_SSCCR2_TIME2_WIDTH);
+ rtsx_pci_write_phy_register(pcr, PHY_ANA1A,
+ PHY_ANA1A_TXR_LOOPBACK | PHY_ANA1A_RXT_BIST |
+ PHY_ANA1A_TXR_BIST | PHY_ANA1A_REV);
+ rtsx_pci_write_phy_register(pcr, PHY_ANA1D,
+ PHY_ANA1D_DEBUG_ADDR);
+ rtsx_pci_write_phy_register(pcr, PHY_DIG1E,
+ PHY_DIG1E_REV | PHY_DIG1E_D0_X_D1 |
+ PHY_DIG1E_RX_ON_HOST | PHY_DIG1E_RCLK_REF_HOST |
+ PHY_DIG1E_RCLK_TX_EN_KEEP |
+ PHY_DIG1E_RCLK_TX_TERM_KEEP |
+ PHY_DIG1E_RCLK_RX_EIDLE_ON | PHY_DIG1E_TX_TERM_KEEP |
+ PHY_DIG1E_RX_TERM_KEEP | PHY_DIG1E_TX_EN_KEEP |
+ PHY_DIG1E_RX_EN_KEEP);
+ }
+
+ rtsx_pci_write_phy_register(pcr, PHY_ANA08,
+ PHY_ANA08_RX_EQ_DCGAIN | PHY_ANA08_SEL_RX_EN |
+ PHY_ANA08_RX_EQ_VAL | PHY_ANA08_SCP | PHY_ANA08_SEL_IPI);
+
+ return 0;
+}
+
+static int rts524a_extra_init_hw(struct rtsx_pcr *pcr)
+{
+ rts5249_extra_init_hw(pcr);
+
+ rtsx_pci_write_register(pcr, FUNC_FORCE_CTL,
+ FORCE_ASPM_L1_EN, FORCE_ASPM_L1_EN);
+ rtsx_pci_write_register(pcr, PM_EVENT_DEBUG, PME_DEBUG_0, PME_DEBUG_0);
+ rtsx_pci_write_register(pcr, LDO_VCC_CFG1, LDO_VCC_LMT_EN,
+ LDO_VCC_LMT_EN);
+ rtsx_pci_write_register(pcr, PCLK_CTL, PCLK_MODE_SEL, PCLK_MODE_SEL);
+ if (is_version(pcr, 0x524A, IC_VER_A)) {
+ rtsx_pci_write_register(pcr, LDO_DV18_CFG,
+ LDO_DV18_SR_MASK, LDO_DV18_SR_DF);
+ rtsx_pci_write_register(pcr, LDO_VCC_CFG1,
+ LDO_VCC_REF_TUNE_MASK, LDO_VCC_REF_1V2);
+ rtsx_pci_write_register(pcr, LDO_VIO_CFG,
+ LDO_VIO_REF_TUNE_MASK, LDO_VIO_REF_1V2);
+ rtsx_pci_write_register(pcr, LDO_VIO_CFG,
+ LDO_VIO_SR_MASK, LDO_VIO_SR_DF);
+ rtsx_pci_write_register(pcr, LDO_DV12S_CFG,
+ LDO_REF12_TUNE_MASK, LDO_REF12_TUNE_DF);
+ rtsx_pci_write_register(pcr, SD40_LDO_CTL1,
+ SD40_VIO_TUNE_MASK, SD40_VIO_TUNE_1V7);
+ }
+
+ return 0;
+}
+
+static const struct pcr_ops rts524a_pcr_ops = {
+ .write_phy = rts524a_write_phy,
+ .read_phy = rts524a_read_phy,
+ .fetch_vendor_settings = rtsx_base_fetch_vendor_settings,
+ .extra_init_hw = rts524a_extra_init_hw,
+ .optimize_phy = rts524a_optimize_phy,
+ .turn_on_led = rtsx_base_turn_on_led,
+ .turn_off_led = rtsx_base_turn_off_led,
+ .enable_auto_blink = rtsx_base_enable_auto_blink,
+ .disable_auto_blink = rtsx_base_disable_auto_blink,
+ .card_power_on = rtsx_base_card_power_on,
+ .card_power_off = rtsx_base_card_power_off,
+ .switch_output_voltage = rtsx_base_switch_output_voltage,
+ .force_power_down = rtsx_base_force_power_down,
+};
+
+void rts524a_init_params(struct rtsx_pcr *pcr)
+{
+ rts5249_init_params(pcr);
+
+ pcr->reg_pm_ctrl3 = RTS524A_PM_CTRL3;
+ pcr->ops = &rts524a_pcr_ops;
+}
+
+static int rts525a_card_power_on(struct rtsx_pcr *pcr, int card)
+{
+ rtsx_pci_write_register(pcr, LDO_VCC_CFG1,
+ LDO_VCC_TUNE_MASK, LDO_VCC_3V3);
+ return rtsx_base_card_power_on(pcr, card);
+}
+
+static int rts525a_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
+{
+ switch (voltage) {
+ case OUTPUT_3V3:
+ rtsx_pci_write_register(pcr, LDO_CONFIG2,
+ LDO_D3318_MASK, LDO_D3318_33V);
+ rtsx_pci_write_register(pcr, SD_PAD_CTL, SD_IO_USING_1V8, 0);
+ break;
+ case OUTPUT_1V8:
+ rtsx_pci_write_register(pcr, LDO_CONFIG2,
+ LDO_D3318_MASK, LDO_D3318_18V);
+ rtsx_pci_write_register(pcr, SD_PAD_CTL, SD_IO_USING_1V8,
+ SD_IO_USING_1V8);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ rtsx_pci_init_cmd(pcr);
+ rts5249_fill_driving(pcr, voltage);
+ return rtsx_pci_send_cmd(pcr, 100);
+}
+
+static int rts525a_optimize_phy(struct rtsx_pcr *pcr)
+{
+ int err;
+
+ err = rtsx_pci_write_register(pcr, RTS524A_PM_CTRL3,
+ D3_DELINK_MODE_EN, 0x00);
+ if (err < 0)
+ return err;
+
+ rtsx_pci_write_phy_register(pcr, _PHY_FLD0,
+ _PHY_FLD0_CLK_REQ_20C | _PHY_FLD0_RX_IDLE_EN |
+ _PHY_FLD0_BIT_ERR_RSTN | _PHY_FLD0_BER_COUNT |
+ _PHY_FLD0_BER_TIMER | _PHY_FLD0_CHECK_EN);
+
+ rtsx_pci_write_phy_register(pcr, _PHY_ANA03,
+ _PHY_ANA03_TIMER_MAX | _PHY_ANA03_OOBS_DEB_EN |
+ _PHY_CMU_DEBUG_EN);
+
+ if (is_version(pcr, 0x525A, IC_VER_A))
+ rtsx_pci_write_phy_register(pcr, _PHY_REV0,
+ _PHY_REV0_FILTER_OUT | _PHY_REV0_CDR_BYPASS_PFD |
+ _PHY_REV0_CDR_RX_IDLE_BYPASS);
+
+ return 0;
+}
+
+static int rts525a_extra_init_hw(struct rtsx_pcr *pcr)
+{
+ rts5249_extra_init_hw(pcr);
+
+ rtsx_pci_write_register(pcr, PCLK_CTL, PCLK_MODE_SEL, PCLK_MODE_SEL);
+ if (is_version(pcr, 0x525A, IC_VER_A)) {
+ rtsx_pci_write_register(pcr, L1SUB_CONFIG2,
+ L1SUB_AUTO_CFG, L1SUB_AUTO_CFG);
+ rtsx_pci_write_register(pcr, RREF_CFG,
+ RREF_VBGSEL_MASK, RREF_VBGSEL_1V25);
+ rtsx_pci_write_register(pcr, LDO_VIO_CFG,
+ LDO_VIO_TUNE_MASK, LDO_VIO_1V7);
+ rtsx_pci_write_register(pcr, LDO_DV12S_CFG,
+ LDO_D12_TUNE_MASK, LDO_D12_TUNE_DF);
+ rtsx_pci_write_register(pcr, LDO_AV12S_CFG,
+ LDO_AV12S_TUNE_MASK, LDO_AV12S_TUNE_DF);
+ rtsx_pci_write_register(pcr, LDO_VCC_CFG0,
+ LDO_VCC_LMTVTH_MASK, LDO_VCC_LMTVTH_2A);
+ rtsx_pci_write_register(pcr, OOBS_CONFIG,
+ OOBS_AUTOK_DIS | OOBS_VAL_MASK, 0x89);
+ }
+
+ return 0;
+}
+
+static const struct pcr_ops rts525a_pcr_ops = {
+ .fetch_vendor_settings = rtsx_base_fetch_vendor_settings,
+ .extra_init_hw = rts525a_extra_init_hw,
+ .optimize_phy = rts525a_optimize_phy,
+ .turn_on_led = rtsx_base_turn_on_led,
+ .turn_off_led = rtsx_base_turn_off_led,
+ .enable_auto_blink = rtsx_base_enable_auto_blink,
+ .disable_auto_blink = rtsx_base_disable_auto_blink,
+ .card_power_on = rts525a_card_power_on,
+ .card_power_off = rtsx_base_card_power_off,
+ .switch_output_voltage = rts525a_switch_output_voltage,
+ .force_power_down = rtsx_base_force_power_down,
+};
+
+void rts525a_init_params(struct rtsx_pcr *pcr)
+{
+ rts5249_init_params(pcr);
+
+ pcr->reg_pm_ctrl3 = RTS524A_PM_CTRL3;
+ pcr->ops = &rts525a_pcr_ops;
+}
+
+++ /dev/null
-/* Driver for Realtek PCI-Express card reader
- *
- * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2, or (at your option) any
- * later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, see <http://www.gnu.org/licenses/>.
- *
- * Author:
- * Micky Ching <micky_ching@realsil.com.cn>
- */
-
-#include <linux/mfd/rtsx_pci.h>
-#include "rtsx_pcr.h"
-
-int rtsx_gops_pm_reset(struct rtsx_pcr *pcr)
-{
- int err;
-
- /* init aspm */
- rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0xFF, 0x00);
- err = rtsx_pci_update_cfg_byte(pcr, LCTLR, ~LCTLR_ASPM_CTL_MASK, 0x00);
- if (err < 0)
- return err;
-
- /* reset PM_CTRL3 before send buffer cmd */
- return rtsx_pci_write_register(pcr, PM_CTRL3, D3_DELINK_MODE_EN, 0x00);
-}
{ PCI_DEVICE(0x10EC, 0x5249), PCI_CLASS_OTHERS << 16, 0xFF0000 },
{ PCI_DEVICE(0x10EC, 0x5287), PCI_CLASS_OTHERS << 16, 0xFF0000 },
{ PCI_DEVICE(0x10EC, 0x5286), PCI_CLASS_OTHERS << 16, 0xFF0000 },
+ { PCI_DEVICE(0x10EC, 0x524A), PCI_CLASS_OTHERS << 16, 0xFF0000 },
+ { PCI_DEVICE(0x10EC, 0x525A), PCI_CLASS_OTHERS << 16, 0xFF0000 },
{ 0, }
};
MODULE_DEVICE_TABLE(pci, rtsx_pci_ids);
+static inline void rtsx_pci_enable_aspm(struct rtsx_pcr *pcr)
+{
+ rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
+ 0xFC, pcr->aspm_en);
+}
+
+static inline void rtsx_pci_disable_aspm(struct rtsx_pcr *pcr)
+{
+ rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
+ 0xFC, 0);
+}
+
void rtsx_pci_start_run(struct rtsx_pcr *pcr)
{
/* If pci device removed, don't queue idle work any more */
pcr->ops->enable_auto_blink(pcr);
if (pcr->aspm_en)
- rtsx_pci_write_config_byte(pcr, LCTLR, 0);
+ rtsx_pci_disable_aspm(pcr);
}
mod_delayed_work(system_wq, &pcr->idle_work, msecs_to_jiffies(200));
}
EXPORT_SYMBOL_GPL(rtsx_pci_read_register);
-int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val)
+int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val)
{
int err, i, finished = 0;
u8 tmp;
return 0;
}
+
+int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val)
+{
+ if (pcr->ops->write_phy)
+ return pcr->ops->write_phy(pcr, addr, val);
+
+ return __rtsx_pci_write_phy_register(pcr, addr, val);
+}
EXPORT_SYMBOL_GPL(rtsx_pci_write_phy_register);
-int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val)
+int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val)
{
int err, i, finished = 0;
u16 data;
return 0;
}
+
+int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val)
+{
+ if (pcr->ops->read_phy)
+ return pcr->ops->read_phy(pcr, addr, val);
+
+ return __rtsx_pci_read_phy_register(pcr, addr, val);
+}
EXPORT_SYMBOL_GPL(rtsx_pci_read_phy_register);
void rtsx_pci_stop_cmd(struct rtsx_pcr *pcr)
timeleft = wait_for_completion_interruptible_timeout(
&trans_done, msecs_to_jiffies(timeout));
if (timeleft <= 0) {
- dev_dbg(&(pcr->pci->dev), "Timeout (%s %d)\n",
- __func__, __LINE__);
+ pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__);
err = -ETIMEDOUT;
goto finish_send_cmd;
}
u64 val;
u8 option = SG_VALID | SG_TRANS_DATA;
- dev_dbg(&(pcr->pci->dev), "DMA addr: 0x%x, Len: 0x%x\n",
- (unsigned int)addr, len);
+ pcr_dbg(pcr, "DMA addr: 0x%x, Len: 0x%x\n", (unsigned int)addr, len);
if (end)
option |= SG_END;
{
int err = 0, count;
- dev_dbg(&(pcr->pci->dev), "--> %s: num_sg = %d\n", __func__, num_sg);
+ pcr_dbg(pcr, "--> %s: num_sg = %d\n", __func__, num_sg);
count = rtsx_pci_dma_map_sg(pcr, sglist, num_sg, read);
if (count < 1)
return -EINVAL;
- dev_dbg(&(pcr->pci->dev), "DMA mapping count: %d\n", count);
+ pcr_dbg(pcr, "DMA mapping count: %d\n", count);
err = rtsx_pci_dma_transfer(pcr, sglist, count, read, timeout);
timeleft = wait_for_completion_interruptible_timeout(
&trans_done, msecs_to_jiffies(timeout));
if (timeleft <= 0) {
- dev_dbg(&(pcr->pci->dev), "Timeout (%s %d)\n",
- __func__, __LINE__);
+ pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__);
err = -ETIMEDOUT;
goto out;
}
/* Enable Bus Interrupt */
rtsx_pci_writel(pcr, RTSX_BIER, pcr->bier);
- dev_dbg(&(pcr->pci->dev), "RTSX_BIER: 0x%08x\n", pcr->bier);
+ pcr_dbg(pcr, "RTSX_BIER: 0x%08x\n", pcr->bier);
}
static inline u8 double_ssc_depth(u8 depth)
return err;
card_clock /= 1000000;
- dev_dbg(&(pcr->pci->dev), "Switch card clock to %dMHz\n", card_clock);
+ pcr_dbg(pcr, "Switch card clock to %dMHz\n", card_clock);
clk = card_clock;
if (!initial_mode && double_clk)
clk = card_clock * 2;
- dev_dbg(&(pcr->pci->dev),
- "Internal SSC clock: %dMHz (cur_clock = %d)\n",
- clk, pcr->cur_clock);
+ pcr_dbg(pcr, "Internal SSC clock: %dMHz (cur_clock = %d)\n",
+ clk, pcr->cur_clock);
if (clk == pcr->cur_clock)
return 0;
}
div++;
}
- dev_dbg(&(pcr->pci->dev), "n = %d, div = %d\n", n, div);
+ pcr_dbg(pcr, "n = %d, div = %d\n", n, div);
ssc_depth = depth[ssc_depth];
if (double_clk)
ssc_depth = double_ssc_depth(ssc_depth);
ssc_depth = revise_ssc_depth(ssc_depth, div);
- dev_dbg(&(pcr->pci->dev), "ssc_depth = %d\n", ssc_depth);
+ pcr_dbg(pcr, "ssc_depth = %d\n", ssc_depth);
rtsx_pci_init_cmd(pcr);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL,
dwork = to_delayed_work(work);
pcr = container_of(dwork, struct rtsx_pcr, carddet_work);
- dev_dbg(&(pcr->pci->dev), "--> %s\n", __func__);
+ pcr_dbg(pcr, "--> %s\n", __func__);
mutex_lock(&pcr->pcr_mutex);
spin_lock_irqsave(&pcr->lock, flags);
irq_status = rtsx_pci_readl(pcr, RTSX_BIPR);
- dev_dbg(&(pcr->pci->dev), "irq_status: 0x%08x\n", irq_status);
+ pcr_dbg(pcr, "irq_status: 0x%08x\n", irq_status);
irq_status &= CARD_EXIST;
card_inserted = pcr->card_inserted & irq_status;
spin_unlock_irqrestore(&pcr->lock, flags);
if (card_inserted || card_removed) {
- dev_dbg(&(pcr->pci->dev),
- "card_inserted: 0x%x, card_removed: 0x%x\n",
- card_inserted, card_removed);
+ pcr_dbg(pcr, "card_inserted: 0x%x, card_removed: 0x%x\n",
+ card_inserted, card_removed);
if (pcr->ops->cd_deglitch)
card_inserted = pcr->ops->cd_deglitch(pcr);
struct delayed_work *dwork = to_delayed_work(work);
struct rtsx_pcr *pcr = container_of(dwork, struct rtsx_pcr, idle_work);
- dev_dbg(&(pcr->pci->dev), "--> %s\n", __func__);
+ pcr_dbg(pcr, "--> %s\n", __func__);
mutex_lock(&pcr->pcr_mutex);
pcr->ops->turn_off_led(pcr);
if (pcr->aspm_en)
- rtsx_pci_write_config_byte(pcr, LCTLR, pcr->aspm_en);
+ rtsx_pci_enable_aspm(pcr);
mutex_unlock(&pcr->pcr_mutex);
}
{
int err;
+ pcr->pcie_cap = pci_find_capability(pcr->pci, PCI_CAP_ID_EXP);
rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr);
rtsx_pci_enable_bus_int(pcr);
/* Wait SSC power stable */
udelay(200);
+ rtsx_pci_disable_aspm(pcr);
if (pcr->ops->optimize_phy) {
err = pcr->ops->optimize_phy(pcr);
if (err < 0)
if (err < 0)
return err;
- rtsx_pci_write_config_byte(pcr, LCTLR, 0);
-
/* Enable clk_request_n to enable clock power management */
- rtsx_pci_write_config_byte(pcr, 0x81, 1);
+ rtsx_pci_write_config_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL + 1, 1);
/* Enter L1 when host tx idle */
rtsx_pci_write_config_byte(pcr, 0x70F, 0x5B);
rts5249_init_params(pcr);
break;
+ case 0x524A:
+ rts524a_init_params(pcr);
+ break;
+
+ case 0x525A:
+ rts525a_init_params(pcr);
+ break;
+
case 0x5287:
rtl8411b_init_params(pcr);
break;
break;
}
- dev_dbg(&(pcr->pci->dev), "PID: 0x%04x, IC version: 0x%02x\n",
+ pcr_dbg(pcr, "PID: 0x%04x, IC version: 0x%02x\n",
PCI_PID(pcr), pcr->ic_version);
pcr->slots = kcalloc(pcr->num_slots, sizeof(struct rtsx_slot),
if (pcr->ops->fetch_vendor_settings)
pcr->ops->fetch_vendor_settings(pcr);
- dev_dbg(&(pcr->pci->dev), "pcr->aspm_en = 0x%x\n", pcr->aspm_en);
- dev_dbg(&(pcr->pci->dev), "pcr->sd30_drive_sel_1v8 = 0x%x\n",
+ pcr_dbg(pcr, "pcr->aspm_en = 0x%x\n", pcr->aspm_en);
+ pcr_dbg(pcr, "pcr->sd30_drive_sel_1v8 = 0x%x\n",
pcr->sd30_drive_sel_1v8);
- dev_dbg(&(pcr->pci->dev), "pcr->sd30_drive_sel_3v3 = 0x%x\n",
+ pcr_dbg(pcr, "pcr->sd30_drive_sel_3v3 = 0x%x\n",
pcr->sd30_drive_sel_3v3);
- dev_dbg(&(pcr->pci->dev), "pcr->card_drive_sel = 0x%x\n",
+ pcr_dbg(pcr, "pcr->card_drive_sel = 0x%x\n",
pcr->card_drive_sel);
- dev_dbg(&(pcr->pci->dev), "pcr->flags = 0x%x\n", pcr->flags);
+ pcr_dbg(pcr, "pcr->flags = 0x%x\n", pcr->flags);
pcr->state = PDEV_STAT_IDLE;
err = rtsx_pci_init_hw(pcr);
struct rtsx_pcr *pcr;
struct pcr_handle *handle;
u32 base, len;
- int ret, i;
+ int ret, i, bar = 0;
dev_dbg(&(pcidev->dev),
": Realtek PCI-E Card Reader found at %s [%04x:%04x] (rev %x)\n",
pcr->pci = pcidev;
dev_set_drvdata(&pcidev->dev, handle);
- len = pci_resource_len(pcidev, 0);
- base = pci_resource_start(pcidev, 0);
+ if (CHK_PCI_PID(pcr, 0x525A))
+ bar = 1;
+ len = pci_resource_len(pcidev, bar);
+ base = pci_resource_start(pcidev, bar);
pcr->remap_addr = ioremap_nocache(base, len);
if (!pcr->remap_addr) {
ret = -ENOMEM;
#define MIN_DIV_N_PCR 80
#define MAX_DIV_N_PCR 208
+#define RTS524A_PME_FORCE_CTL 0xFF78
+#define RTS524A_PM_CTRL3 0xFF7E
+
+int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val);
+int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val);
+
void rts5209_init_params(struct rtsx_pcr *pcr);
void rts5229_init_params(struct rtsx_pcr *pcr);
void rtl8411_init_params(struct rtsx_pcr *pcr);
void rtl8402_init_params(struct rtsx_pcr *pcr);
void rts5227_init_params(struct rtsx_pcr *pcr);
void rts5249_init_params(struct rtsx_pcr *pcr);
+void rts524a_init_params(struct rtsx_pcr *pcr);
+void rts525a_init_params(struct rtsx_pcr *pcr);
void rtl8411b_init_params(struct rtsx_pcr *pcr);
static inline u8 map_sd_drive(int idx)
static const struct mfd_cell s2mps11_devs[] = {
{
.name = "s2mps11-pmic",
+ }, {
+ .name = "s2mps14-rtc",
}, {
.name = "s2mps11-clk",
.of_compatible = "samsung,s2mps11-clk",
struct sec_platform_data *pd;
pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);
- if (!pd) {
- dev_err(dev, "could not allocate memory for pdata\n");
+ if (!pd)
return ERR_PTR(-ENOMEM);
- }
/*
* ToDo: the 'wakeup' member in the platform data is more of a linux
}
if (pdata) {
sec_pmic->device_type = pdata->device_type;
- sec_pmic->ono = pdata->ono;
sec_pmic->irq_base = pdata->irq_base;
sec_pmic->wakeup = pdata->wakeup;
sec_pmic->pdata = pdata;
.reg_offset = 1,
.mask = S2MPS11_IRQ_RTC60S_MASK,
},
- [S2MPS11_IRQ_RTCA0] = {
- .reg_offset = 1,
- .mask = S2MPS11_IRQ_RTCA0_MASK,
- },
[S2MPS11_IRQ_RTCA1] = {
.reg_offset = 1,
.mask = S2MPS11_IRQ_RTCA1_MASK,
},
+ [S2MPS11_IRQ_RTCA0] = {
+ .reg_offset = 1,
+ .mask = S2MPS11_IRQ_RTCA0_MASK,
+ },
[S2MPS11_IRQ_SMPL] = {
.reg_offset = 1,
.mask = S2MPS11_IRQ_SMPL_MASK,
return ret;
}
+ /*
+ * The rtc-s5m driver requests S2MPS14_IRQ_RTCA0 also for S2MPS11
+ * so the interrupt number must be consistent.
+ */
+ BUILD_BUG_ON(((enum s2mps14_irq)S2MPS11_IRQ_RTCA0) != S2MPS14_IRQ_RTCA0);
+
return 0;
}
sizeof(struct v4l2_rds_data),
GFP_KERNEL);
if (rval) {
- dev_err(&client->dev, "Could not alloate the FIFO\n");
+ dev_err(&client->dev, "Could not allocate the FIFO\n");
goto free_gpio;
}
mutex_init(&core->rds_drainer_status_lock);
--- /dev/null
+/*
+ * sky81452.c SKY81452 MFD driver
+ *
+ * Copyright 2014 Skyworks Solutions Inc.
+ * Author : Gyungoh Yoo <jack.yoo@skyworksinc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/regmap.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/sky81452.h>
+
+static const struct regmap_config sky81452_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+};
+
+static int sky81452_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct device *dev = &client->dev;
+ const struct sky81452_platform_data *pdata = dev_get_platdata(dev);
+ struct mfd_cell cells[2];
+ struct regmap *regmap;
+ int ret;
+
+ if (!pdata) {
+ pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
+ return -ENOMEM;
+ }
+
+ regmap = devm_regmap_init_i2c(client, &sky81452_config);
+ if (IS_ERR(regmap)) {
+ dev_err(dev, "failed to initialize.err=%ld\n", PTR_ERR(regmap));
+ return PTR_ERR(regmap);
+ }
+
+ i2c_set_clientdata(client, regmap);
+
+ memset(cells, 0, sizeof(cells));
+ cells[0].name = "sky81452-backlight";
+ cells[0].of_compatible = "skyworks,sky81452-backlight";
+ cells[0].platform_data = pdata->bl_pdata;
+ cells[0].pdata_size = sizeof(*pdata->bl_pdata);
+ cells[1].name = "sky81452-regulator";
+ cells[1].platform_data = pdata->regulator_init_data;
+ cells[1].pdata_size = sizeof(*pdata->regulator_init_data);
+
+ ret = mfd_add_devices(dev, -1, cells, ARRAY_SIZE(cells), NULL, 0, NULL);
+ if (ret)
+ dev_err(dev, "failed to add child devices. err=%d\n", ret);
+
+ return ret;
+}
+
+static int sky81452_remove(struct i2c_client *client)
+{
+ mfd_remove_devices(&client->dev);
+ return 0;
+}
+
+static const struct i2c_device_id sky81452_ids[] = {
+ { "sky81452" },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, sky81452_ids);
+
+#ifdef CONFIG_OF
+static const struct of_device_id sky81452_of_match[] = {
+ { .compatible = "skyworks,sky81452", },
+ { }
+};
+MODULE_DEVICE_TABLE(of, sky81452_of_match);
+#endif
+
+static struct i2c_driver sky81452_driver = {
+ .driver = {
+ .name = "sky81452",
+ .of_match_table = of_match_ptr(sky81452_of_match),
+ },
+ .probe = sky81452_probe,
+ .remove = sky81452_remove,
+ .id_table = sky81452_ids,
+};
+
+module_i2c_driver(sky81452_driver);
+
+MODULE_DESCRIPTION("Skyworks SKY81452 MFD driver");
+MODULE_AUTHOR("Gyungoh Yoo <jack.yoo@skyworksinc.com>");
+MODULE_LICENSE("GPL v2");
DEFINE_WAIT(wait);
u32 reg;
- /*
- * disable TSC steps so it does not run while the ADC is using it. If
- * write 0 while it is running (it just started or was already running)
- * then it completes all steps that were enabled and stops then.
- */
- tscadc_writel(tsadc, REG_SE, 0);
reg = tscadc_readl(tsadc, REG_ADCFSM);
if (reg & SEQ_STATUS) {
tsadc->adc_waiting = true;
spin_lock_irq(&tsadc->reg_lock);
finish_wait(&tsadc->reg_se_wait, &wait);
+ /*
+ * Sequencer should either be idle or
+ * busy applying the charge step.
+ */
reg = tscadc_readl(tsadc, REG_ADCFSM);
- WARN_ON(reg & SEQ_STATUS);
+ WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP));
tsadc->adc_waiting = false;
}
tsadc->adc_in_use = true;
void am335x_tsc_se_set_once(struct ti_tscadc_dev *tsadc, u32 val)
{
spin_lock_irq(&tsadc->reg_lock);
- tsadc->reg_se_cache |= val;
am335x_tscadc_need_adc(tsadc);
tscadc_writel(tsadc, REG_SE, val);
static struct tps65010 *the_tps;
-static int __exit tps65010_remove(struct i2c_client *client)
+static int tps65010_remove(struct i2c_client *client)
{
struct tps65010 *tps = i2c_get_clientdata(client);
struct tps65010_board *board = dev_get_platdata(&client->dev);
.name = "tps65010",
},
.probe = tps65010_probe,
- .remove = __exit_p(tps65010_remove),
+ .remove = tps65010_remove,
.id_table = tps65010_id,
};
.board_config = osc_off_rconfig,
};
-static struct of_device_id twl4030_power_of_match[] = {
+static const struct of_device_id twl4030_power_of_match[] = {
{
.compatible = "ti,twl4030-power",
},
MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>");
MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:twl6040");
#define SYS_HBI_MASK 0xfff
#define SYS_PROCIDx_HBI_SHIFT 0
-#define SYS_MCI_CARDIN (1 << 0)
-#define SYS_MCI_WPROT (1 << 1)
-
#define SYS_MISC_MASTERSITE (1 << 14)
-
-static void __iomem *__vexpress_sysreg_base;
-
-static void __iomem *vexpress_sysreg_base(void)
+void vexpress_flags_set(u32 data)
{
- if (!__vexpress_sysreg_base) {
+ static void __iomem *base;
+
+ if (!base) {
struct device_node *node = of_find_compatible_node(NULL, NULL,
"arm,vexpress-sysreg");
- __vexpress_sysreg_base = of_iomap(node, 0);
+ base = of_iomap(node, 0);
}
- WARN_ON(!__vexpress_sysreg_base);
-
- return __vexpress_sysreg_base;
-}
-
-
-static int vexpress_sysreg_get_master(void)
-{
- if (readl(vexpress_sysreg_base() + SYS_MISC) & SYS_MISC_MASTERSITE)
- return VEXPRESS_SITE_DB2;
-
- return VEXPRESS_SITE_DB1;
-}
-
-void vexpress_flags_set(u32 data)
-{
- writel(~0, vexpress_sysreg_base() + SYS_FLAGSCLR);
- writel(data, vexpress_sysreg_base() + SYS_FLAGSSET);
-}
-
-unsigned int vexpress_get_mci_cardin(struct device *dev)
-{
- return readl(vexpress_sysreg_base() + SYS_MCI) & SYS_MCI_CARDIN;
-}
-
-u32 vexpress_get_procid(int site)
-{
- if (site == VEXPRESS_SITE_MASTER)
- site = vexpress_sysreg_get_master();
+ if (WARN_ON(!base))
+ return;
- return readl(vexpress_sysreg_base() + (site == VEXPRESS_SITE_DB1 ?
- SYS_PROCID0 : SYS_PROCID1));
+ writel(~0, base + SYS_FLAGSCLR);
+ writel(data, base + SYS_FLAGSSET);
}
-void __iomem *vexpress_get_24mhz_clock_base(void)
-{
- return vexpress_sysreg_base() + SYS_24MHZ;
-}
-
-
-void __init vexpress_sysreg_early_init(void __iomem *base)
-{
- __vexpress_sysreg_base = base;
-
- vexpress_config_set_master(vexpress_sysreg_get_master());
-}
-
-
/* The sysreg block is just a random collection of various functions... */
static struct syscon_platform_data vexpress_sysreg_sys_id_pdata = {
struct resource *mem;
void __iomem *base;
struct bgpio_chip *mmc_gpio_chip;
+ int master;
u32 dt_hbi;
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!base)
return -ENOMEM;
- vexpress_config_set_master(vexpress_sysreg_get_master());
+ master = readl(base + SYS_MISC) & SYS_MISC_MASTERSITE ?
+ VEXPRESS_SITE_DB2 : VEXPRESS_SITE_DB1;
+ vexpress_config_set_master(master);
/* Confirm board type against DT property, if available */
if (of_property_read_u32(of_root, "arm,hbi", &dt_hbi) == 0) {
- u32 id = vexpress_get_procid(VEXPRESS_SITE_MASTER);
+ u32 id = readl(base + (master == VEXPRESS_SITE_DB1 ?
+ SYS_PROCID0 : SYS_PROCID1));
u32 hbi = (id >> SYS_PROCIDx_HBI_SHIFT) & SYS_HBI_MASK;
if (WARN_ON(dt_hbi != hbi))
case ARIZONA_DAC_DIGITAL_VOLUME_3L:
case ARIZONA_DAC_VOLUME_LIMIT_3L:
case ARIZONA_NOISE_GATE_SELECT_3L:
- case ARIZONA_OUTPUT_PATH_CONFIG_3R:
- case ARIZONA_DAC_DIGITAL_VOLUME_3R:
- case ARIZONA_DAC_VOLUME_LIMIT_3R:
case ARIZONA_OUTPUT_PATH_CONFIG_4L:
case ARIZONA_DAC_DIGITAL_VOLUME_4L:
case ARIZONA_OUT_VOLUME_4L:
{
char name[ENCLOSURE_NAME_SIZE];
+ enclosure_link_name(cdev, name);
+
/*
* In odd circumstances, like multipath devices, something else may
* already have removed the links, so check for this condition first.
*/
- if (!cdev->dev->kobj.sd)
- return;
+ if (cdev->dev->kobj.sd)
+ sysfs_remove_link(&cdev->dev->kobj, name);
- enclosure_link_name(cdev, name);
- sysfs_remove_link(&cdev->dev->kobj, name);
- sysfs_remove_link(&cdev->cdev.kobj, "device");
+ if (cdev->cdev.kobj.sd)
+ sysfs_remove_link(&cdev->cdev.kobj, "device");
}
static int enclosure_add_links(struct enclosure_component *cdev)
#include <linux/errno.h>
#include <linux/types.h>
#include <linux/fcntl.h>
-#include <linux/aio.h>
#include <linux/ioctl.h>
#include <linux/cdev.h>
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/types.h>
#include <linux/fcntl.h>
-#include <linux/aio.h>
#include <linux/poll.h>
#include <linux/init.h>
#include <linux/ioctl.h>
#include <linux/errno.h>
#include <linux/types.h>
#include <linux/fcntl.h>
-#include <linux/aio.h>
#include <linux/pci.h>
#include <linux/poll.h>
#include <linux/ioctl.h>
if (((die_args->trapnr == X86_TRAP_MF) ||
(die_args->trapnr == X86_TRAP_XF)) &&
- !user_mode_vm(die_args->regs))
+ !user_mode(die_args->regs))
xpc_die_deactivate();
break;
DECLARE_WAITQUEUE(wait, current);
unsigned long flags;
int stop;
+ bool pm = false;
might_sleep();
host->claimed = 1;
host->claimer = current;
host->claim_cnt += 1;
+ if (host->claim_cnt == 1)
+ pm = true;
} else
wake_up(&host->wq);
spin_unlock_irqrestore(&host->lock, flags);
remove_wait_queue(&host->wq, &wait);
- if (host->ops->enable && !stop && host->claim_cnt == 1)
- host->ops->enable(host);
+
+ if (pm)
+ pm_runtime_get_sync(mmc_dev(host));
+
return stop;
}
-
EXPORT_SYMBOL(__mmc_claim_host);
/**
WARN_ON(!host->claimed);
- if (host->ops->disable && host->claim_cnt == 1)
- host->ops->disable(host);
-
spin_lock_irqsave(&host->lock, flags);
if (--host->claim_cnt) {
/* Release for nested claim */
host->claimer = NULL;
spin_unlock_irqrestore(&host->lock, flags);
wake_up(&host->wq);
+ pm_runtime_mark_last_busy(mmc_dev(host));
+ pm_runtime_put_autosuspend(mmc_dev(host));
}
}
EXPORT_SYMBOL(mmc_release_host);
*/
#include <linux/err.h>
+#include <linux/of.h>
#include <linux/slab.h>
#include <linux/stat.h>
#include <linux/pm_runtime.h>
{
int err = 0, idx;
unsigned int part_size;
+ struct device_node *np;
+ bool broken_hpi = false;
/* Version is coded in the CSD_STRUCTURE byte in the EXT_CSD register */
card->ext_csd.raw_ext_csd_structure = ext_csd[EXT_CSD_STRUCTURE];
}
}
+ np = mmc_of_find_child_device(card->host, 0);
+ if (np && of_device_is_compatible(np, "mmc-card"))
+ broken_hpi = of_property_read_bool(np, "broken-hpi");
+ of_node_put(np);
+
/*
* The EXT_CSD format is meant to be forward compatible. As long
* as CSD_STRUCTURE does not change, all values for EXT_CSD_REV
}
/* check whether the eMMC card supports HPI */
- if (ext_csd[EXT_CSD_HPI_FEATURES] & 0x1) {
+ if (!broken_hpi && (ext_csd[EXT_CSD_HPI_FEATURES] & 0x1)) {
card->ext_csd.hpi = 1;
if (ext_csd[EXT_CSD_HPI_FEATURES] & 0x2)
card->ext_csd.hpi_cmd = MMC_STOP_TRANSMISSION;
err = _mmc_suspend(host, true);
if (err)
- pr_err("%s: error %d doing aggessive suspend\n",
+ pr_err("%s: error %d doing aggressive suspend\n",
mmc_hostname(host), err);
return err;
err = _mmc_resume(host);
if (err)
- pr_err("%s: error %d doing aggessive resume\n",
+ pr_err("%s: error %d doing aggressive resume\n",
mmc_hostname(host), err);
return 0;
struct mmc_pwrseq_match {
const char *compatible;
- int (*alloc)(struct mmc_host *host, struct device *dev);
+ struct mmc_pwrseq *(*alloc)(struct mmc_host *host, struct device *dev);
};
static struct mmc_pwrseq_match pwrseq_match[] = {
struct platform_device *pdev;
struct device_node *np;
struct mmc_pwrseq_match *match;
+ struct mmc_pwrseq *pwrseq;
int ret = 0;
np = of_parse_phandle(host->parent->of_node, "mmc-pwrseq", 0);
goto err;
}
- ret = match->alloc(host, &pdev->dev);
- if (!ret)
- dev_info(host->parent, "allocated mmc-pwrseq\n");
+ pwrseq = match->alloc(host, &pdev->dev);
+ if (IS_ERR(pwrseq)) {
+ ret = PTR_ERR(host->pwrseq);
+ goto err;
+ }
+
+ host->pwrseq = pwrseq;
+ dev_info(host->parent, "allocated mmc-pwrseq\n");
err:
of_node_put(np);
if (pwrseq && pwrseq->ops && pwrseq->ops->free)
pwrseq->ops->free(host);
+
+ host->pwrseq = NULL;
}
void mmc_pwrseq_power_off(struct mmc_host *host);
void mmc_pwrseq_free(struct mmc_host *host);
-int mmc_pwrseq_simple_alloc(struct mmc_host *host, struct device *dev);
-int mmc_pwrseq_emmc_alloc(struct mmc_host *host, struct device *dev);
+struct mmc_pwrseq *mmc_pwrseq_simple_alloc(struct mmc_host *host,
+ struct device *dev);
+struct mmc_pwrseq *mmc_pwrseq_emmc_alloc(struct mmc_host *host,
+ struct device *dev);
#else
unregister_restart_handler(&pwrseq->reset_nb);
gpiod_put(pwrseq->reset_gpio);
kfree(pwrseq);
- host->pwrseq = NULL;
}
static struct mmc_pwrseq_ops mmc_pwrseq_emmc_ops = {
return NOTIFY_DONE;
}
-int mmc_pwrseq_emmc_alloc(struct mmc_host *host, struct device *dev)
+struct mmc_pwrseq *mmc_pwrseq_emmc_alloc(struct mmc_host *host,
+ struct device *dev)
{
struct mmc_pwrseq_emmc *pwrseq;
int ret = 0;
pwrseq = kzalloc(sizeof(struct mmc_pwrseq_emmc), GFP_KERNEL);
if (!pwrseq)
- return -ENOMEM;
+ return ERR_PTR(-ENOMEM);
pwrseq->reset_gpio = gpiod_get_index(dev, "reset", 0, GPIOD_OUT_LOW);
if (IS_ERR(pwrseq->reset_gpio)) {
register_restart_handler(&pwrseq->reset_nb);
pwrseq->pwrseq.ops = &mmc_pwrseq_emmc_ops;
- host->pwrseq = &pwrseq->pwrseq;
- return 0;
+ return &pwrseq->pwrseq;
free:
kfree(pwrseq);
- return ret;
+ return ERR_PTR(ret);
}
clk_put(pwrseq->ext_clk);
kfree(pwrseq);
- host->pwrseq = NULL;
}
static struct mmc_pwrseq_ops mmc_pwrseq_simple_ops = {
.free = mmc_pwrseq_simple_free,
};
-int mmc_pwrseq_simple_alloc(struct mmc_host *host, struct device *dev)
+struct mmc_pwrseq *mmc_pwrseq_simple_alloc(struct mmc_host *host,
+ struct device *dev)
{
struct mmc_pwrseq_simple *pwrseq;
int i, nr_gpios, ret = 0;
pwrseq = kzalloc(sizeof(struct mmc_pwrseq_simple) + nr_gpios *
sizeof(struct gpio_desc *), GFP_KERNEL);
if (!pwrseq)
- return -ENOMEM;
+ return ERR_PTR(-ENOMEM);
pwrseq->ext_clk = clk_get(dev, "ext_clock");
if (IS_ERR(pwrseq->ext_clk) &&
pwrseq->nr_gpios = nr_gpios;
pwrseq->pwrseq.ops = &mmc_pwrseq_simple_ops;
- host->pwrseq = &pwrseq->pwrseq;
- return 0;
+ return &pwrseq->pwrseq;
clk_put:
if (!IS_ERR(pwrseq->ext_clk))
clk_put(pwrseq->ext_clk);
free:
kfree(pwrseq);
- return ret;
+ return ERR_PTR(ret);
}
err = _mmc_sd_suspend(host);
if (err)
- pr_err("%s: error %d doing aggessive suspend\n",
+ pr_err("%s: error %d doing aggressive suspend\n",
mmc_hostname(host), err);
return err;
err = _mmc_sd_resume(host);
if (err)
- pr_err("%s: error %d doing aggessive resume\n",
+ pr_err("%s: error %d doing aggressive resume\n",
mmc_hostname(host), err);
return 0;
int err;
if (card->type == MMC_TYPE_SDIO)
- return sdio_enable_wide(card);
-
- if ((card->host->caps & MMC_CAP_4_BIT_DATA) &&
- (card->scr.bus_widths & SD_SCR_BUS_WIDTH_4)) {
+ err = sdio_enable_wide(card);
+ else if ((card->host->caps & MMC_CAP_4_BIT_DATA) &&
+ (card->scr.bus_widths & SD_SCR_BUS_WIDTH_4)) {
err = mmc_app_set_bus_width(card, MMC_BUS_WIDTH_4);
if (err)
return err;
+ err = sdio_enable_wide(card);
+ if (err <= 0)
+ mmc_app_set_bus_width(card, MMC_BUS_WIDTH_1);
} else
return 0;
- err = sdio_enable_wide(card);
- if (err <= 0)
- mmc_app_set_bus_width(card, MMC_BUS_WIDTH_1);
+ if (err > 0) {
+ mmc_set_bus_width(card->host, MMC_BUS_WIDTH_4);
+ err = 0;
+ }
return err;
}
/*
* Switch to wider bus (if supported).
*/
- if (card->host->caps & MMC_CAP_4_BIT_DATA) {
+ if (card->host->caps & MMC_CAP_4_BIT_DATA)
err = sdio_enable_4bit_bus(card);
- if (err > 0) {
- mmc_set_bus_width(card->host, MMC_BUS_WIDTH_4);
- err = 0;
- }
- }
/* Set the driver strength for the card */
sdio_select_driver_type(card);
* Switch to wider bus (if supported).
*/
err = sdio_enable_4bit_bus(card);
- if (err > 0)
- mmc_set_bus_width(card->host, MMC_BUS_WIDTH_4);
- else if (err)
+ if (err)
goto remove;
}
finish:
} else if (mmc_card_keep_power(host) && mmc_card_wake_sdio_irq(host)) {
/* We may have switched to 1-bit mode during suspend */
err = sdio_enable_4bit_bus(host->card);
- if (err > 0) {
- mmc_set_bus_width(host, MMC_BUS_WIDTH_4);
- err = 0;
- }
}
if (!err && host->sdio_irqs) {
config MMC_SDHCI_OF_ESDHC
tristate "SDHCI OF support for the Freescale eSDHC controller"
depends on MMC_SDHCI_PLTFM
- depends on PPC_OF
+ depends on PPC
select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
help
This selects the Freescale eSDHC controller support.
config MMC_SDHCI_OF_HLWD
tristate "SDHCI OF support for the Nintendo Wii SDHCI controllers"
depends on MMC_SDHCI_PLTFM
- depends on PPC_OF
+ depends on PPC
select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
help
This selects the Secure Digital Host Controller Interface (SDHCI)
tristate "Marvell MMP2 SD Host Controller support (PXAV3)"
depends on CLKDEV_LOOKUP
depends on MMC_SDHCI_PLTFM
- depends on ARCH_MMP || COMPILE_TEST
+ depends on ARCH_BERLIN || ARCH_MMP || ARCH_MVEBU || COMPILE_TEST
default CPU_MMP2
help
This selects the Marvell(R) PXAV3 SD Host Controller.
config MMC_SDHCI_SPEAR
tristate "SDHCI support on ST SPEAr platform"
depends on MMC_SDHCI && PLAT_SPEAR
+ depends on OF
help
This selects the Secure Digital Host Controller Interface (SDHCI)
often referrered to as the HSMMC block in some of the ST SPEAR range
If unsure, say N.
+config MMC_SDHCI_IPROC
+ tristate "SDHCI platform support for the iProc SD/MMC Controller"
+ depends on ARCH_BCM_IPROC || COMPILE_TEST
+ depends on MMC_SDHCI_PLTFM
+ default ARCH_BCM_IPROC
+ select MMC_SDHCI_IO_ACCESSORS
+ help
+ This selects the iProc SD/MMC controller.
+
+ If you have an IPROC platform with SD or MMC devices,
+ say Y or M here.
+
+ If unsure, say N.
+
config MMC_MOXART
tristate "MOXART SD/MMC Host Controller support"
depends on ARCH_MOXART && MMC
obj-$(CONFIG_MMC_SDHCI_OF_HLWD) += sdhci-of-hlwd.o
obj-$(CONFIG_MMC_SDHCI_BCM_KONA) += sdhci-bcm-kona.o
obj-$(CONFIG_MMC_SDHCI_BCM2835) += sdhci-bcm2835.o
+obj-$(CONFIG_MMC_SDHCI_IPROC) += sdhci-iproc.o
obj-$(CONFIG_MMC_SDHCI_MSM) += sdhci-msm.o
obj-$(CONFIG_MMC_SDHCI_ST) += sdhci-st.o
#define ATMCI_REGS_SIZE 0x100
/* Register access macros */
-#define atmci_readl(port,reg) \
+#ifdef CONFIG_AVR32
+#define atmci_readl(port, reg) \
__raw_readl((port)->regs + reg)
-#define atmci_writel(port,reg,value) \
+#define atmci_writel(port, reg, value) \
__raw_writel((value), (port)->regs + reg)
+#else
+#define atmci_readl(port, reg) \
+ readl_relaxed((port)->regs + reg)
+#define atmci_writel(port, reg, value) \
+ writel_relaxed((value), (port)->regs + reg)
+#endif
/* On AVR chips the Peripheral DMA Controller is not connected to MCI. */
#ifdef CONFIG_AVR32
u8 ciu_div;
u32 sdr_timing;
u32 ddr_timing;
+ u32 hs400_timing;
+ u32 tuned_sample;
u32 cur_speed;
+ u32 dqs_delay;
+ u32 saved_dqs_en;
+ u32 saved_strobe_ctrl;
};
static struct dw_mci_exynos_compatible {
},
};
+static inline u8 dw_mci_exynos_get_ciu_div(struct dw_mci *host)
+{
+ struct dw_mci_exynos_priv_data *priv = host->priv;
+
+ if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS4412)
+ return EXYNOS4412_FIXED_CIU_CLK_DIV;
+ else if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS4210)
+ return EXYNOS4210_FIXED_CIU_CLK_DIV;
+ else if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
+ priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
+ return SDMMC_CLKSEL_GET_DIV(mci_readl(host, CLKSEL64)) + 1;
+ else
+ return SDMMC_CLKSEL_GET_DIV(mci_readl(host, CLKSEL)) + 1;
+}
+
static int dw_mci_exynos_priv_init(struct dw_mci *host)
{
struct dw_mci_exynos_priv_data *priv = host->priv;
SDMMC_MPSCTRL_NON_SECURE_WRITE_BIT);
}
+ if (priv->ctrl_type >= DW_MCI_TYPE_EXYNOS5420) {
+ priv->saved_strobe_ctrl = mci_readl(host, HS400_DLINE_CTRL);
+ priv->saved_dqs_en = mci_readl(host, HS400_DQS_EN);
+ priv->saved_dqs_en |= AXI_NON_BLOCKING_WR;
+ mci_writel(host, HS400_DQS_EN, priv->saved_dqs_en);
+ if (!priv->dqs_delay)
+ priv->dqs_delay =
+ DQS_CTRL_GET_RD_DELAY(priv->saved_strobe_ctrl);
+ }
+
return 0;
}
return 0;
}
+static void dw_mci_exynos_set_clksel_timing(struct dw_mci *host, u32 timing)
+{
+ struct dw_mci_exynos_priv_data *priv = host->priv;
+ u32 clksel;
+
+ if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
+ priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
+ clksel = mci_readl(host, CLKSEL64);
+ else
+ clksel = mci_readl(host, CLKSEL);
+
+ clksel = (clksel & ~SDMMC_CLKSEL_TIMING_MASK) | timing;
+
+ if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
+ priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
+ mci_writel(host, CLKSEL64, clksel);
+ else
+ mci_writel(host, CLKSEL, clksel);
+}
+
#ifdef CONFIG_PM_SLEEP
static int dw_mci_exynos_suspend(struct device *dev)
{
}
}
-static void dw_mci_exynos_set_ios(struct dw_mci *host, struct mmc_ios *ios)
+static void dw_mci_exynos_config_hs400(struct dw_mci *host, u32 timing)
{
struct dw_mci_exynos_priv_data *priv = host->priv;
- unsigned int wanted = ios->clock;
- unsigned long actual;
- u8 div = priv->ciu_div + 1;
+ u32 dqs, strobe;
- if (ios->timing == MMC_TIMING_MMC_DDR52) {
- if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
- priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
- mci_writel(host, CLKSEL64, priv->ddr_timing);
- else
- mci_writel(host, CLKSEL, priv->ddr_timing);
- /* Should be double rate for DDR mode */
- if (ios->bus_width == MMC_BUS_WIDTH_8)
- wanted <<= 1;
+ /*
+ * Not supported to configure register
+ * related to HS400
+ */
+ if (priv->ctrl_type < DW_MCI_TYPE_EXYNOS5420)
+ return;
+
+ dqs = priv->saved_dqs_en;
+ strobe = priv->saved_strobe_ctrl;
+
+ if (timing == MMC_TIMING_MMC_HS400) {
+ dqs |= DATA_STROBE_EN;
+ strobe = DQS_CTRL_RD_DELAY(strobe, priv->dqs_delay);
} else {
- if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
- priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
- mci_writel(host, CLKSEL64, priv->sdr_timing);
- else
- mci_writel(host, CLKSEL, priv->sdr_timing);
+ dqs &= ~DATA_STROBE_EN;
}
+ mci_writel(host, HS400_DQS_EN, dqs);
+ mci_writel(host, HS400_DLINE_CTRL, strobe);
+}
+
+static void dw_mci_exynos_adjust_clock(struct dw_mci *host, unsigned int wanted)
+{
+ struct dw_mci_exynos_priv_data *priv = host->priv;
+ unsigned long actual;
+ u8 div;
+ int ret;
/*
* Don't care if wanted clock is zero or
* ciu clock is unavailable
if (wanted < EXYNOS_CCLKIN_MIN)
wanted = EXYNOS_CCLKIN_MIN;
- if (wanted != priv->cur_speed) {
- int ret = clk_set_rate(host->ciu_clk, wanted * div);
- if (ret)
- dev_warn(host->dev,
- "failed to set clk-rate %u error: %d\n",
- wanted * div, ret);
- actual = clk_get_rate(host->ciu_clk);
- host->bus_hz = actual / div;
- priv->cur_speed = wanted;
- host->current_speed = 0;
+ if (wanted == priv->cur_speed)
+ return;
+
+ div = dw_mci_exynos_get_ciu_div(host);
+ ret = clk_set_rate(host->ciu_clk, wanted * div);
+ if (ret)
+ dev_warn(host->dev,
+ "failed to set clk-rate %u error: %d\n",
+ wanted * div, ret);
+ actual = clk_get_rate(host->ciu_clk);
+ host->bus_hz = actual / div;
+ priv->cur_speed = wanted;
+ host->current_speed = 0;
+}
+
+static void dw_mci_exynos_set_ios(struct dw_mci *host, struct mmc_ios *ios)
+{
+ struct dw_mci_exynos_priv_data *priv = host->priv;
+ unsigned int wanted = ios->clock;
+ u32 timing = ios->timing, clksel;
+
+ switch (timing) {
+ case MMC_TIMING_MMC_HS400:
+ /* Update tuned sample timing */
+ clksel = SDMMC_CLKSEL_UP_SAMPLE(
+ priv->hs400_timing, priv->tuned_sample);
+ wanted <<= 1;
+ break;
+ case MMC_TIMING_MMC_DDR52:
+ clksel = priv->ddr_timing;
+ /* Should be double rate for DDR mode */
+ if (ios->bus_width == MMC_BUS_WIDTH_8)
+ wanted <<= 1;
+ break;
+ default:
+ clksel = priv->sdr_timing;
}
+
+ /* Set clock timing for the requested speed mode*/
+ dw_mci_exynos_set_clksel_timing(host, clksel);
+
+ /* Configure setting for HS400 */
+ dw_mci_exynos_config_hs400(host, timing);
+
+ /* Configure clock rate */
+ dw_mci_exynos_adjust_clock(host, wanted);
}
static int dw_mci_exynos_parse_dt(struct dw_mci *host)
return ret;
priv->ddr_timing = SDMMC_CLKSEL_TIMING(timing[0], timing[1], div);
+
+ ret = of_property_read_u32_array(np,
+ "samsung,dw-mshc-hs400-timing", timing, 2);
+ if (!ret && of_property_read_u32(np,
+ "samsung,read-strobe-delay", &priv->dqs_delay))
+ dev_dbg(host->dev,
+ "read-strobe-delay is not found, assuming usage of default value\n");
+
+ priv->hs400_timing = SDMMC_CLKSEL_TIMING(timing[0], timing[1],
+ HS400_FIXED_CIU_CLK_DIV);
host->priv = priv;
return 0;
}
clksel = mci_readl(host, CLKSEL64);
else
clksel = mci_readl(host, CLKSEL);
- clksel = (clksel & ~0x7) | SDMMC_CLKSEL_CCLK_SAMPLE(sample);
+ clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample);
if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
mci_writel(host, CLKSEL64, clksel);
clksel = mci_readl(host, CLKSEL64);
else
clksel = mci_readl(host, CLKSEL);
+
sample = (clksel + 1) & 0x7;
- clksel = (clksel & ~0x7) | sample;
+ clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample);
+
if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
mci_writel(host, CLKSEL64, clksel);
else
mci_writel(host, CLKSEL, clksel);
+
return sample;
}
static int dw_mci_exynos_execute_tuning(struct dw_mci_slot *slot)
{
struct dw_mci *host = slot->host;
+ struct dw_mci_exynos_priv_data *priv = host->priv;
struct mmc_host *mmc = slot->mmc;
u8 start_smpl, smpl, candiates = 0;
s8 found = -1;
} while (start_smpl != smpl);
found = dw_mci_exynos_get_best_clksmpl(candiates);
- if (found >= 0)
+ if (found >= 0) {
dw_mci_exynos_set_clksmpl(host, found);
- else
+ priv->tuned_sample = found;
+ } else {
ret = -EIO;
+ }
return ret;
}
+static int dw_mci_exynos_prepare_hs400_tuning(struct dw_mci *host,
+ struct mmc_ios *ios)
+{
+ struct dw_mci_exynos_priv_data *priv = host->priv;
+
+ dw_mci_exynos_set_clksel_timing(host, priv->hs400_timing);
+ dw_mci_exynos_adjust_clock(host, (ios->clock) << 1);
+
+ return 0;
+}
+
/* Common capabilities of Exynos4/Exynos5 SoC */
static unsigned long exynos_dwmmc_caps[4] = {
MMC_CAP_1_8V_DDR | MMC_CAP_8_BIT_DATA | MMC_CAP_CMD23,
.set_ios = dw_mci_exynos_set_ios,
.parse_dt = dw_mci_exynos_parse_dt,
.execute_tuning = dw_mci_exynos_execute_tuning,
+ .prepare_hs400_tuning = dw_mci_exynos_prepare_hs400_tuning,
};
static const struct of_device_id dw_mci_exynos_match[] = {
#ifndef _DW_MMC_EXYNOS_H_
#define _DW_MMC_EXYNOS_H_
-/* Extended Register's Offset */
#define SDMMC_CLKSEL 0x09C
#define SDMMC_CLKSEL64 0x0A8
+/* Extended Register's Offset */
+#define SDMMC_HS400_DQS_EN 0x180
+#define SDMMC_HS400_ASYNC_FIFO_CTRL 0x184
+#define SDMMC_HS400_DLINE_CTRL 0x188
+
/* CLKSEL register defines */
#define SDMMC_CLKSEL_CCLK_SAMPLE(x) (((x) & 7) << 0)
#define SDMMC_CLKSEL_CCLK_DRIVE(x) (((x) & 7) << 16)
#define SDMMC_CLKSEL_CCLK_DIVIDER(x) (((x) & 7) << 24)
#define SDMMC_CLKSEL_GET_DRV_WD3(x) (((x) >> 16) & 0x7)
+#define SDMMC_CLKSEL_GET_DIV(x) (((x) >> 24) & 0x7)
+#define SDMMC_CLKSEL_UP_SAMPLE(x, y) (((x) & ~SDMMC_CLKSEL_CCLK_SAMPLE(7)) |\
+ SDMMC_CLKSEL_CCLK_SAMPLE(y))
#define SDMMC_CLKSEL_TIMING(x, y, z) (SDMMC_CLKSEL_CCLK_SAMPLE(x) | \
SDMMC_CLKSEL_CCLK_DRIVE(y) | \
SDMMC_CLKSEL_CCLK_DIVIDER(z))
+#define SDMMC_CLKSEL_TIMING_MASK SDMMC_CLKSEL_TIMING(0x7, 0x7, 0x7)
#define SDMMC_CLKSEL_WAKEUP_INT BIT(11)
+/* RCLK_EN register defines */
+#define DATA_STROBE_EN BIT(0)
+#define AXI_NON_BLOCKING_WR BIT(7)
+
+/* DLINE_CTRL register defines */
+#define DQS_CTRL_RD_DELAY(x, y) (((x) & ~0x3FF) | ((y) & 0x3FF))
+#define DQS_CTRL_GET_RD_DELAY(x) ((x) & 0x3FF)
+
/* Protector Register */
#define SDMMC_EMMCP_BASE 0x1000
#define SDMMC_MPSECURITY (SDMMC_EMMCP_BASE + 0x0010)
/* Fixed clock divider */
#define EXYNOS4210_FIXED_CIU_CLK_DIV 2
#define EXYNOS4412_FIXED_CIU_CLK_DIV 4
+#define HS400_FIXED_CIU_CLK_DIV 1
/* Minimal required clock frequency for cclkin, unit: HZ */
#define EXYNOS_CCLKIN_MIN 50000000
return 0;
}
+/* Common capabilities of RK3288 SoC */
+static unsigned long dw_mci_rk3288_dwmmc_caps[4] = {
+ MMC_CAP_RUNTIME_RESUME, /* emmc */
+ MMC_CAP_RUNTIME_RESUME, /* sdmmc */
+ MMC_CAP_RUNTIME_RESUME, /* sdio0 */
+ MMC_CAP_RUNTIME_RESUME, /* sdio1 */
+};
static const struct dw_mci_drv_data rk2928_drv_data = {
.prepare_command = dw_mci_rockchip_prepare_command,
.init = dw_mci_rockchip_init,
};
static const struct dw_mci_drv_data rk3288_drv_data = {
+ .caps = dw_mci_rk3288_dwmmc_caps,
.prepare_command = dw_mci_rockchip_prepare_command,
.set_ios = dw_mci_rk3288_set_ios,
.setup_clock = dw_mci_rk3288_setup_clock,
u32 des2; /*Buffer sizes */
#define IDMAC_64ADDR_SET_BUFFER1_SIZE(d, s) \
- ((d)->des2 = ((d)->des2 & 0x03ffe000) | ((s) & 0x1fff))
+ ((d)->des2 = ((d)->des2 & cpu_to_le32(0x03ffe000)) | \
+ ((cpu_to_le32(s)) & cpu_to_le32(0x1fff)))
u32 des3; /* Reserved */
};
struct idmac_desc {
- u32 des0; /* Control Descriptor */
+ __le32 des0; /* Control Descriptor */
#define IDMAC_DES0_DIC BIT(1)
#define IDMAC_DES0_LD BIT(2)
#define IDMAC_DES0_FD BIT(3)
#define IDMAC_DES0_CES BIT(30)
#define IDMAC_DES0_OWN BIT(31)
- u32 des1; /* Buffer sizes */
+ __le32 des1; /* Buffer sizes */
#define IDMAC_SET_BUFFER1_SIZE(d, s) \
((d)->des1 = ((d)->des1 & 0x03ffe000) | ((s) & 0x1fff))
- u32 des2; /* buffer 1 physical address */
+ __le32 des2; /* buffer 1 physical address */
- u32 des3; /* buffer 2 physical address */
+ __le32 des3; /* buffer 2 physical address */
};
#endif /* CONFIG_MMC_DW_IDMAC */
static bool dw_mci_reset(struct dw_mci *host);
static bool dw_mci_ctrl_reset(struct dw_mci *host, u32 reset);
+static int dw_mci_card_busy(struct mmc_host *mmc);
#if defined(CONFIG_DEBUG_FS)
static int dw_mci_req_show(struct seq_file *s, void *v)
return cmdr;
}
+static void dw_mci_wait_while_busy(struct dw_mci *host, u32 cmd_flags)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(500);
+
+ /*
+ * Databook says that before issuing a new data transfer command
+ * we need to check to see if the card is busy. Data transfer commands
+ * all have SDMMC_CMD_PRV_DAT_WAIT set, so we'll key off that.
+ *
+ * ...also allow sending for SDMMC_CMD_VOLT_SWITCH where busy is
+ * expected.
+ */
+ if ((cmd_flags & SDMMC_CMD_PRV_DAT_WAIT) &&
+ !(cmd_flags & SDMMC_CMD_VOLT_SWITCH)) {
+ while (mci_readl(host, STATUS) & SDMMC_STATUS_BUSY) {
+ if (time_after(jiffies, timeout)) {
+ /* Command will fail; we'll pass error then */
+ dev_err(host->dev, "Busy; trying anyway\n");
+ break;
+ }
+ udelay(10);
+ }
+ }
+}
+
static void dw_mci_start_command(struct dw_mci *host,
struct mmc_command *cmd, u32 cmd_flags)
{
mci_writel(host, CMDARG, cmd->arg);
wmb();
+ dw_mci_wait_while_busy(host, cmd_flags);
mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START);
}
* Set the OWN bit and disable interrupts for this
* descriptor
*/
- desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC |
- IDMAC_DES0_CH;
+ desc->des0 = cpu_to_le32(IDMAC_DES0_OWN |
+ IDMAC_DES0_DIC | IDMAC_DES0_CH);
/* Buffer length */
IDMAC_SET_BUFFER1_SIZE(desc, length);
/* Physical address to DMA to/from */
- desc->des2 = mem_addr;
+ desc->des2 = cpu_to_le32(mem_addr);
}
/* Set first descriptor */
desc = host->sg_cpu;
- desc->des0 |= IDMAC_DES0_FD;
+ desc->des0 |= cpu_to_le32(IDMAC_DES0_FD);
/* Set last descriptor */
desc = host->sg_cpu + (i - 1) * sizeof(struct idmac_desc);
- desc->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC);
- desc->des0 |= IDMAC_DES0_LD;
+ desc->des0 &= cpu_to_le32(~(IDMAC_DES0_CH | IDMAC_DES0_DIC));
+ desc->des0 |= cpu_to_le32(IDMAC_DES0_LD);
}
wmb();
/* Forward link the descriptor list */
for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; i++, p++)
- p->des3 = host->sg_dma + (sizeof(struct idmac_desc) *
- (i + 1));
+ p->des3 = cpu_to_le32(host->sg_dma +
+ (sizeof(struct idmac_desc) * (i + 1)));
/* Set the last descriptor as the end-of-ring descriptor */
- p->des3 = host->sg_dma;
- p->des0 = IDMAC_DES0_ER;
+ p->des3 = cpu_to_le32(host->sg_dma);
+ p->des0 = cpu_to_le32(IDMAC_DES0_ER);
}
dw_mci_idmac_reset(host);
return;
if (host->timing != MMC_TIMING_MMC_HS200 &&
+ host->timing != MMC_TIMING_MMC_HS400 &&
host->timing != MMC_TIMING_UHS_SDR104)
goto disable;
mci_writel(host, CMDARG, arg);
wmb();
+ dw_mci_wait_while_busy(host, cmd);
mci_writel(host, CMD, SDMMC_CMD_START | cmd);
while (time_before(jiffies, timeout)) {
dw_mci_start_command(host, cmd, cmdflags);
+ if (cmd->opcode == SD_SWITCH_VOLTAGE) {
+ unsigned long irqflags;
+
+ /*
+ * Databook says to fail after 2ms w/ no response, but evidence
+ * shows that sometimes the cmd11 interrupt takes over 130ms.
+ * We'll set to 500ms, plus an extra jiffy just in case jiffies
+ * is just about to roll over.
+ *
+ * We do this whole thing under spinlock and only if the
+ * command hasn't already completed (indicating the the irq
+ * already ran so we don't want the timeout).
+ */
+ spin_lock_irqsave(&host->irq_lock, irqflags);
+ if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events))
+ mod_timer(&host->cmd11_timer,
+ jiffies + msecs_to_jiffies(500) + 1);
+ spin_unlock_irqrestore(&host->irq_lock, irqflags);
+ }
+
if (mrq->stop)
host->stop_cmdr = dw_mci_prepare_command(slot->mmc, mrq->stop);
else
regs = mci_readl(slot->host, UHS_REG);
/* DDR mode set */
- if (ios->timing == MMC_TIMING_MMC_DDR52)
+ if (ios->timing == MMC_TIMING_MMC_DDR52 ||
+ ios->timing == MMC_TIMING_MMC_HS400)
regs |= ((0x1 << slot->id) << 16);
else
regs &= ~((0x1 << slot->id) << 16);
if (drv_data && drv_data->set_ios)
drv_data->set_ios(slot->host, ios);
- /* Slot specific timing and width adjustment */
- dw_mci_setup_bus(slot, false);
-
- if (slot->host->state == STATE_WAITING_CMD11_DONE && ios->clock != 0)
- slot->host->state = STATE_IDLE;
-
switch (ios->power_mode) {
case MMC_POWER_UP:
if (!IS_ERR(mmc->supply.vmmc)) {
mci_writel(slot->host, PWREN, regs);
break;
case MMC_POWER_ON:
- if (!IS_ERR(mmc->supply.vqmmc) && !slot->host->vqmmc_enabled) {
- ret = regulator_enable(mmc->supply.vqmmc);
- if (ret < 0)
- dev_err(slot->host->dev,
- "failed to enable vqmmc regulator\n");
- else
+ if (!slot->host->vqmmc_enabled) {
+ if (!IS_ERR(mmc->supply.vqmmc)) {
+ ret = regulator_enable(mmc->supply.vqmmc);
+ if (ret < 0)
+ dev_err(slot->host->dev,
+ "failed to enable vqmmc\n");
+ else
+ slot->host->vqmmc_enabled = true;
+
+ } else {
+ /* Keep track so we don't reset again */
slot->host->vqmmc_enabled = true;
+ }
+
+ /* Reset our state machine after powering on */
+ dw_mci_ctrl_reset(slot->host,
+ SDMMC_CTRL_ALL_RESET_FLAGS);
}
+
+ /* Adjust clock / bus width after power is up */
+ dw_mci_setup_bus(slot, false);
+
break;
case MMC_POWER_OFF:
+ /* Turn clock off before power goes down */
+ dw_mci_setup_bus(slot, false);
+
if (!IS_ERR(mmc->supply.vmmc))
mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
- if (!IS_ERR(mmc->supply.vqmmc) && slot->host->vqmmc_enabled) {
+ if (!IS_ERR(mmc->supply.vqmmc) && slot->host->vqmmc_enabled)
regulator_disable(mmc->supply.vqmmc);
- slot->host->vqmmc_enabled = false;
- }
+ slot->host->vqmmc_enabled = false;
regs = mci_readl(slot->host, PWREN);
regs &= ~(1 << slot->id);
default:
break;
}
+
+ if (slot->host->state == STATE_WAITING_CMD11_DONE && ios->clock != 0)
+ slot->host->state = STATE_IDLE;
}
static int dw_mci_card_busy(struct mmc_host *mmc)
return err;
}
+static int dw_mci_prepare_hs400_tuning(struct mmc_host *mmc, struct mmc_ios *ios)
+{
+ struct dw_mci_slot *slot = mmc_priv(mmc);
+ struct dw_mci *host = slot->host;
+ const struct dw_mci_drv_data *drv_data = host->drv_data;
+
+ if (drv_data && drv_data->prepare_hs400_tuning)
+ return drv_data->prepare_hs400_tuning(host, ios);
+
+ return 0;
+}
+
static const struct mmc_host_ops dw_mci_ops = {
.request = dw_mci_request,
.pre_req = dw_mci_pre_req,
.card_busy = dw_mci_card_busy,
.start_signal_voltage_switch = dw_mci_switch_voltage,
.init_card = dw_mci_init_card,
+ .prepare_hs400_tuning = dw_mci_prepare_hs400_tuning,
};
static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq)
if (test_and_clear_bit(EVENT_DATA_ERROR,
&host->pending_events)) {
dw_mci_stop_dma(host);
- send_stop_abort(host, data);
+ if (data->stop ||
+ !(host->data_status & (SDMMC_INT_DRTO |
+ SDMMC_INT_EBE)))
+ send_stop_abort(host, data);
state = STATE_DATA_ERROR;
break;
}
if (test_and_clear_bit(EVENT_DATA_ERROR,
&host->pending_events)) {
dw_mci_stop_dma(host);
- send_stop_abort(host, data);
+ if (data->stop ||
+ !(host->data_status & (SDMMC_INT_DRTO |
+ SDMMC_INT_EBE)))
+ send_stop_abort(host, data);
state = STATE_DATA_ERROR;
break;
}
buf += len;
cnt -= len;
if (host->part_buf_count == 2) {
- mci_writew(host, DATA(host->data_offset),
- host->part_buf16);
+ mci_fifo_writew(host->fifo_reg, host->part_buf16);
host->part_buf_count = 0;
}
}
cnt -= len;
/* push data from aligned buffer into fifo */
for (i = 0; i < items; ++i)
- mci_writew(host, DATA(host->data_offset),
- aligned_buf[i]);
+ mci_fifo_writew(host->fifo_reg, aligned_buf[i]);
}
} else
#endif
{
u16 *pdata = buf;
for (; cnt >= 2; cnt -= 2)
- mci_writew(host, DATA(host->data_offset), *pdata++);
+ mci_fifo_writew(host->fifo_reg, *pdata++);
buf = pdata;
}
/* put anything remaining in the part_buf */
/* Push data if we have reached the expected data length */
if ((data->bytes_xfered + init_cnt) ==
(data->blksz * data->blocks))
- mci_writew(host, DATA(host->data_offset),
- host->part_buf16);
+ mci_fifo_writew(host->fifo_reg, host->part_buf16);
}
}
int items = len >> 1;
int i;
for (i = 0; i < items; ++i)
- aligned_buf[i] = mci_readw(host,
- DATA(host->data_offset));
+ aligned_buf[i] = mci_fifo_readw(host->fifo_reg);
/* memcpy from aligned buffer into output buffer */
memcpy(buf, aligned_buf, len);
buf += len;
{
u16 *pdata = buf;
for (; cnt >= 2; cnt -= 2)
- *pdata++ = mci_readw(host, DATA(host->data_offset));
+ *pdata++ = mci_fifo_readw(host->fifo_reg);
buf = pdata;
}
if (cnt) {
- host->part_buf16 = mci_readw(host, DATA(host->data_offset));
+ host->part_buf16 = mci_fifo_readw(host->fifo_reg);
dw_mci_pull_final_bytes(host, buf, cnt);
}
}
buf += len;
cnt -= len;
if (host->part_buf_count == 4) {
- mci_writel(host, DATA(host->data_offset),
- host->part_buf32);
+ mci_fifo_writel(host->fifo_reg, host->part_buf32);
host->part_buf_count = 0;
}
}
cnt -= len;
/* push data from aligned buffer into fifo */
for (i = 0; i < items; ++i)
- mci_writel(host, DATA(host->data_offset),
- aligned_buf[i]);
+ mci_fifo_writel(host->fifo_reg, aligned_buf[i]);
}
} else
#endif
{
u32 *pdata = buf;
for (; cnt >= 4; cnt -= 4)
- mci_writel(host, DATA(host->data_offset), *pdata++);
+ mci_fifo_writel(host->fifo_reg, *pdata++);
buf = pdata;
}
/* put anything remaining in the part_buf */
/* Push data if we have reached the expected data length */
if ((data->bytes_xfered + init_cnt) ==
(data->blksz * data->blocks))
- mci_writel(host, DATA(host->data_offset),
- host->part_buf32);
+ mci_fifo_writel(host->fifo_reg, host->part_buf32);
}
}
int items = len >> 2;
int i;
for (i = 0; i < items; ++i)
- aligned_buf[i] = mci_readl(host,
- DATA(host->data_offset));
+ aligned_buf[i] = mci_fifo_readl(host->fifo_reg);
/* memcpy from aligned buffer into output buffer */
memcpy(buf, aligned_buf, len);
buf += len;
{
u32 *pdata = buf;
for (; cnt >= 4; cnt -= 4)
- *pdata++ = mci_readl(host, DATA(host->data_offset));
+ *pdata++ = mci_fifo_readl(host->fifo_reg);
buf = pdata;
}
if (cnt) {
- host->part_buf32 = mci_readl(host, DATA(host->data_offset));
+ host->part_buf32 = mci_fifo_readl(host->fifo_reg);
dw_mci_pull_final_bytes(host, buf, cnt);
}
}
cnt -= len;
if (host->part_buf_count == 8) {
- mci_writeq(host, DATA(host->data_offset),
- host->part_buf);
+ mci_fifo_writeq(host->fifo_reg, host->part_buf);
host->part_buf_count = 0;
}
}
cnt -= len;
/* push data from aligned buffer into fifo */
for (i = 0; i < items; ++i)
- mci_writeq(host, DATA(host->data_offset),
- aligned_buf[i]);
+ mci_fifo_writeq(host->fifo_reg, aligned_buf[i]);
}
} else
#endif
{
u64 *pdata = buf;
for (; cnt >= 8; cnt -= 8)
- mci_writeq(host, DATA(host->data_offset), *pdata++);
+ mci_fifo_writeq(host->fifo_reg, *pdata++);
buf = pdata;
}
/* put anything remaining in the part_buf */
/* Push data if we have reached the expected data length */
if ((data->bytes_xfered + init_cnt) ==
(data->blksz * data->blocks))
- mci_writeq(host, DATA(host->data_offset),
- host->part_buf);
+ mci_fifo_writeq(host->fifo_reg, host->part_buf);
}
}
int items = len >> 3;
int i;
for (i = 0; i < items; ++i)
- aligned_buf[i] = mci_readq(host,
- DATA(host->data_offset));
+ aligned_buf[i] = mci_fifo_readq(host->fifo_reg);
+
/* memcpy from aligned buffer into output buffer */
memcpy(buf, aligned_buf, len);
buf += len;
{
u64 *pdata = buf;
for (; cnt >= 8; cnt -= 8)
- *pdata++ = mci_readq(host, DATA(host->data_offset));
+ *pdata++ = mci_fifo_readq(host->fifo_reg);
buf = pdata;
}
if (cnt) {
- host->part_buf = mci_readq(host, DATA(host->data_offset));
+ host->part_buf = mci_fifo_readq(host->fifo_reg);
dw_mci_pull_final_bytes(host, buf, cnt);
}
}
/* Check volt switch first, since it can look like an error */
if ((host->state == STATE_SENDING_CMD11) &&
(pending & SDMMC_INT_VOLT_SWITCH)) {
+ unsigned long irqflags;
+
mci_writel(host, RINTSTS, SDMMC_INT_VOLT_SWITCH);
pending &= ~SDMMC_INT_VOLT_SWITCH;
+
+ /*
+ * Hold the lock; we know cmd11_timer can't be kicked
+ * off after the lock is released, so safe to delete.
+ */
+ spin_lock_irqsave(&host->irq_lock, irqflags);
dw_mci_cmd_interrupt(host, pending);
+ spin_unlock_irqrestore(&host->irq_lock, irqflags);
+
+ del_timer(&host->cmd11_timer);
}
if (pending & DW_MCI_CMD_ERROR_FLAGS) {
/* Handle SDIO Interrupts */
for (i = 0; i < host->num_slots; i++) {
struct dw_mci_slot *slot = host->slot[i];
+
+ if (!slot)
+ continue;
+
if (pending & SDMMC_INT_SDIO(slot->sdio_id)) {
mci_writel(host, RINTSTS,
SDMMC_INT_SDIO(slot->sdio_id));
return ret;
}
+static void dw_mci_cmd11_timer(unsigned long arg)
+{
+ struct dw_mci *host = (struct dw_mci *)arg;
+
+ if (host->state != STATE_SENDING_CMD11) {
+ dev_warn(host->dev, "Unexpected CMD11 timeout\n");
+ return;
+ }
+
+ host->cmd_status = SDMMC_INT_RTO;
+ set_bit(EVENT_CMD_COMPLETE, &host->pending_events);
+ tasklet_schedule(&host->tasklet);
+}
+
#ifdef CONFIG_OF
static struct dw_mci_of_quirks {
char *quirk;
}
#endif /* CONFIG_OF */
+static void dw_mci_enable_cd(struct dw_mci *host)
+{
+ struct dw_mci_board *brd = host->pdata;
+ unsigned long irqflags;
+ u32 temp;
+ int i;
+
+ /* No need for CD if broken card detection */
+ if (brd->quirks & DW_MCI_QUIRK_BROKEN_CARD_DETECTION)
+ return;
+
+ /* No need for CD if all slots have a non-error GPIO */
+ for (i = 0; i < host->num_slots; i++) {
+ struct dw_mci_slot *slot = host->slot[i];
+
+ if (IS_ERR_VALUE(mmc_gpio_get_cd(slot->mmc)))
+ break;
+ }
+ if (i == host->num_slots)
+ return;
+
+ spin_lock_irqsave(&host->irq_lock, irqflags);
+ temp = mci_readl(host, INTMASK);
+ temp |= SDMMC_INT_CD;
+ mci_writel(host, INTMASK, temp);
+ spin_unlock_irqrestore(&host->irq_lock, irqflags);
+}
+
int dw_mci_probe(struct dw_mci *host)
{
const struct dw_mci_drv_data *drv_data = host->drv_data;
}
}
+ setup_timer(&host->cmd11_timer,
+ dw_mci_cmd11_timer, (unsigned long)host);
+
host->quirks = host->pdata->quirks;
spin_lock_init(&host->lock);
dev_info(host->dev, "Version ID is %04x\n", host->verid);
if (host->verid < DW_MMC_240A)
- host->data_offset = DATA_OFFSET;
+ host->fifo_reg = host->regs + DATA_OFFSET;
else
- host->data_offset = DATA_240A_OFFSET;
+ host->fifo_reg = host->regs + DATA_240A_OFFSET;
tasklet_init(&host->tasklet, dw_mci_tasklet_func, (unsigned long)host);
ret = devm_request_irq(host->dev, host->irq, dw_mci_interrupt,
host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1;
/*
- * Enable interrupts for command done, data over, data empty, card det,
+ * Enable interrupts for command done, data over, data empty,
* receive ready and error such as transmit, receive timeout, crc error
*/
mci_writel(host, RINTSTS, 0xFFFFFFFF);
mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |
SDMMC_INT_TXDR | SDMMC_INT_RXDR |
- DW_MCI_ERROR_FLAGS | SDMMC_INT_CD);
+ DW_MCI_ERROR_FLAGS);
mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */
dev_info(host->dev, "DW MMC controller at irq %d, "
goto err_dmaunmap;
}
+ /* Now that slots are all setup, we can enable card detect */
+ dw_mci_enable_cd(host);
+
if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO)
dev_info(host->dev, "Internal DMAC interrupt fix enabled.\n");
mci_writel(host, RINTSTS, 0xFFFFFFFF);
mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |
SDMMC_INT_TXDR | SDMMC_INT_RXDR |
- DW_MCI_ERROR_FLAGS | SDMMC_INT_CD);
+ DW_MCI_ERROR_FLAGS);
mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE);
for (i = 0; i < host->num_slots; i++) {
dw_mci_setup_bus(slot, true);
}
}
+
+ /* Now that slots are all setup, we can enable card detect */
+ dw_mci_enable_cd(host);
+
return 0;
}
EXPORT_SYMBOL(dw_mci_resume);
#define SDMMC_CTRL_ALL_RESET_FLAGS \
(SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET)
+/* FIFO register access macros. These should not change the data endian-ness
+ * as they are written to memory to be dealt with by the upper layers */
+#define mci_fifo_readw(__reg) __raw_readw(__reg)
+#define mci_fifo_readl(__reg) __raw_readl(__reg)
+#define mci_fifo_readq(__reg) __raw_readq(__reg)
+
+#define mci_fifo_writew(__value, __reg) __raw_writew(__reg, __value)
+#define mci_fifo_writel(__value, __reg) __raw_writel(__reg, __value)
+#define mci_fifo_writeq(__value, __reg) __raw_writeq(__reg, __value)
+
/* Register access macros */
#define mci_readl(dev, reg) \
- __raw_readl((dev)->regs + SDMMC_##reg)
+ readl_relaxed((dev)->regs + SDMMC_##reg)
#define mci_writel(dev, reg, value) \
- __raw_writel((value), (dev)->regs + SDMMC_##reg)
+ writel_relaxed((value), (dev)->regs + SDMMC_##reg)
/* 16-bit FIFO access macros */
#define mci_readw(dev, reg) \
- __raw_readw((dev)->regs + SDMMC_##reg)
+ readw_relaxed((dev)->regs + SDMMC_##reg)
#define mci_writew(dev, reg, value) \
- __raw_writew((value), (dev)->regs + SDMMC_##reg)
+ writew_relaxed((value), (dev)->regs + SDMMC_##reg)
/* 64-bit FIFO access macros */
#ifdef readq
#define mci_readq(dev, reg) \
- __raw_readq((dev)->regs + SDMMC_##reg)
+ readq_relaxed((dev)->regs + SDMMC_##reg)
#define mci_writeq(dev, reg, value) \
- __raw_writeq((value), (dev)->regs + SDMMC_##reg)
+ writeq_relaxed((value), (dev)->regs + SDMMC_##reg)
#else
/*
* Dummy readq implementation for architectures that don't define it.
(*(volatile u64 __force *)((dev)->regs + SDMMC_##reg))
#define mci_writeq(dev, reg, value) \
(*(volatile u64 __force *)((dev)->regs + SDMMC_##reg) = (value))
+
+#define __raw_writeq(__value, __reg) \
+ (*(volatile u64 __force *)(__reg) = (__value))
+#define __raw_readq(__reg) (*(volatile u64 __force *)(__reg))
#endif
extern int dw_mci_probe(struct dw_mci *host);
void (*set_ios)(struct dw_mci *host, struct mmc_ios *ios);
int (*parse_dt)(struct dw_mci *host);
int (*execute_tuning)(struct dw_mci_slot *slot);
+ int (*prepare_hs400_tuning)(struct dw_mci *host,
+ struct mmc_ios *ios);
};
#endif /* _DW_MMC_H_ */
return 0;
}
-static struct of_device_id mmc_spi_of_match_table[] = {
+static const struct of_device_id mmc_spi_of_match_table[] = {
{ .compatible = "mmc-spi-slot", },
{},
};
dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max);
/* Get regulators and the supported OCR mask */
- mmc_regulator_get_supply(mmc);
+ ret = mmc_regulator_get_supply(mmc);
+ if (ret == -EPROBE_DEFER)
+ goto clk_disable;
+
if (!mmc->ocr_avail)
mmc->ocr_avail = plat->ocr_mask;
else if (plat->ocr_mask)
struct omap_hsmmc_next next_data;
struct omap_hsmmc_platform_data *pdata;
- /* To handle board related suspend/resume functionality for MMC */
- int (*suspend)(struct device *dev);
- int (*resume)(struct device *dev);
-
/* return MMC cover switch state, can be NULL if not supported.
*
* possible return values:
*/
int (*get_cover_state)(struct device *dev);
- /* Card detection IRQs */
- int card_detect_irq;
-
int (*card_detect)(struct device *dev);
- int (*get_ro)(struct device *dev);
-
};
struct omap_mmc_of_data {
return mmc_gpio_get_cd(host->mmc);
}
-static int omap_hsmmc_get_wp(struct device *dev)
-{
- struct omap_hsmmc_host *host = dev_get_drvdata(dev);
-
- return mmc_gpio_get_ro(host->mmc);
-}
-
static int omap_hsmmc_get_cover_state(struct device *dev)
{
struct omap_hsmmc_host *host = dev_get_drvdata(dev);
#endif
-static irqreturn_t omap_hsmmc_detect(int irq, void *dev_id);
+static irqreturn_t omap_hsmmc_cover_irq(int irq, void *dev_id);
static int omap_hsmmc_gpio_init(struct mmc_host *mmc,
struct omap_hsmmc_host *host,
{
int ret;
- if (gpio_is_valid(pdata->switch_pin)) {
- if (pdata->cover)
- host->get_cover_state =
- omap_hsmmc_get_cover_state;
- else
- host->card_detect = omap_hsmmc_card_detect;
- host->card_detect_irq =
- gpio_to_irq(pdata->switch_pin);
- mmc_gpio_set_cd_isr(mmc, omap_hsmmc_detect);
- ret = mmc_gpio_request_cd(mmc, pdata->switch_pin, 0);
+ if (gpio_is_valid(pdata->gpio_cod)) {
+ ret = mmc_gpio_request_cd(mmc, pdata->gpio_cod, 0);
if (ret)
return ret;
- } else {
- pdata->switch_pin = -EINVAL;
+
+ host->get_cover_state = omap_hsmmc_get_cover_state;
+ mmc_gpio_set_cd_isr(mmc, omap_hsmmc_cover_irq);
+ } else if (gpio_is_valid(pdata->gpio_cd)) {
+ ret = mmc_gpio_request_cd(mmc, pdata->gpio_cd, 0);
+ if (ret)
+ return ret;
+
+ host->card_detect = omap_hsmmc_card_detect;
}
if (gpio_is_valid(pdata->gpio_wp)) {
- host->get_ro = omap_hsmmc_get_wp;
ret = mmc_gpio_request_ro(mmc, pdata->gpio_wp);
if (ret)
return ret;
- } else {
- pdata->gpio_wp = -EINVAL;
}
return 0;
return;
host->mrq = NULL;
mmc_request_done(host->mmc, mrq);
+ pm_runtime_mark_last_busy(host->dev);
+ pm_runtime_put_autosuspend(host->dev);
}
/*
}
/*
- * irq handler to notify the core about card insertion/removal
+ * irq handler when (cell-phone) cover is mounted/removed
*/
-static irqreturn_t omap_hsmmc_detect(int irq, void *dev_id)
+static irqreturn_t omap_hsmmc_cover_irq(int irq, void *dev_id)
{
struct omap_hsmmc_host *host = dev_id;
- int carddetect;
sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch");
- if (host->card_detect)
- carddetect = host->card_detect(host->dev);
- else {
- omap_hsmmc_protect_card(host);
- carddetect = -ENOSYS;
- }
-
- if (carddetect)
- mmc_detect_change(host->mmc, (HZ * 200) / 1000);
- else
- mmc_detect_change(host->mmc, (HZ * 50) / 1000);
+ omap_hsmmc_protect_card(host);
+ mmc_detect_change(host->mmc, (HZ * 200) / 1000);
return IRQ_HANDLED;
}
host->mrq = NULL;
mmc_request_done(host->mmc, mrq);
+ pm_runtime_mark_last_busy(host->dev);
+ pm_runtime_put_autosuspend(host->dev);
}
}
BUG_ON(host->req_in_progress);
BUG_ON(host->dma_ch != -1);
+ pm_runtime_get_sync(host->dev);
if (host->protect_card) {
if (host->reqs_blocked < 3) {
/*
req->data->error = -EBADF;
req->cmd->retries = 0;
mmc_request_done(mmc, req);
+ pm_runtime_mark_last_busy(host->dev);
+ pm_runtime_put_autosuspend(host->dev);
return;
} else if (host->reqs_blocked)
host->reqs_blocked = 0;
req->data->error = err;
host->mrq = NULL;
mmc_request_done(mmc, req);
+ pm_runtime_mark_last_busy(host->dev);
+ pm_runtime_put_autosuspend(host->dev);
return;
}
if (req->sbc && !(host->flags & AUTO_CMD23)) {
return host->card_detect(host->dev);
}
-static int omap_hsmmc_get_ro(struct mmc_host *mmc)
-{
- struct omap_hsmmc_host *host = mmc_priv(mmc);
-
- if (!host->get_ro)
- return -ENOSYS;
- return host->get_ro(host->dev);
-}
-
static void omap_hsmmc_init_card(struct mmc_host *mmc, struct mmc_card *card)
{
struct omap_hsmmc_host *host = mmc_priv(mmc);
set_sd_bus_power(host);
}
-static int omap_hsmmc_enable_fclk(struct mmc_host *mmc)
-{
- struct omap_hsmmc_host *host = mmc_priv(mmc);
-
- pm_runtime_get_sync(host->dev);
-
- return 0;
-}
-
-static int omap_hsmmc_disable_fclk(struct mmc_host *mmc)
-{
- struct omap_hsmmc_host *host = mmc_priv(mmc);
-
- pm_runtime_mark_last_busy(host->dev);
- pm_runtime_put_autosuspend(host->dev);
-
- return 0;
-}
-
static int omap_hsmmc_multi_io_quirk(struct mmc_card *card,
unsigned int direction, int blk_size)
{
}
static struct mmc_host_ops omap_hsmmc_ops = {
- .enable = omap_hsmmc_enable_fclk,
- .disable = omap_hsmmc_disable_fclk,
.post_req = omap_hsmmc_post_req,
.pre_req = omap_hsmmc_pre_req,
.request = omap_hsmmc_request,
.set_ios = omap_hsmmc_set_ios,
.get_cd = omap_hsmmc_get_cd,
- .get_ro = omap_hsmmc_get_ro,
+ .get_ro = mmc_gpio_get_ro,
.init_card = omap_hsmmc_init_card,
.enable_sdio_irq = omap_hsmmc_enable_sdio_irq,
};
if (of_find_property(np, "ti,dual-volt", NULL))
pdata->controller_flags |= OMAP_HSMMC_SUPPORTS_DUAL_VOLT;
- pdata->switch_pin = -EINVAL;
+ pdata->gpio_cd = -EINVAL;
+ pdata->gpio_cod = -EINVAL;
pdata->gpio_wp = -EINVAL;
if (of_find_property(np, "ti,non-removable", NULL)) {
if (ret < 0)
goto err_slot_name;
}
- if (host->card_detect_irq && host->get_cover_state) {
+ if (host->get_cover_state) {
ret = device_create_file(&mmc->class_dev,
- &dev_attr_cover_switch);
+ &dev_attr_cover_switch);
if (ret < 0)
goto err_slot_name;
}
return 0;
}
-#ifdef CONFIG_PM
+#ifdef CONFIG_PM_SLEEP
static int omap_hsmmc_suspend(struct device *dev)
{
struct omap_hsmmc_host *host = dev_get_drvdata(dev);
pm_runtime_put_autosuspend(host->dev);
return 0;
}
-
-#else
-#define omap_hsmmc_suspend NULL
-#define omap_hsmmc_resume NULL
#endif
static int omap_hsmmc_runtime_suspend(struct device *dev)
}
static struct dev_pm_ops omap_hsmmc_dev_pm_ops = {
- .suspend = omap_hsmmc_suspend,
- .resume = omap_hsmmc_resume,
+ SET_SYSTEM_SLEEP_PM_OPS(omap_hsmmc_suspend, omap_hsmmc_resume)
.runtime_suspend = omap_hsmmc_runtime_suspend,
.runtime_resume = omap_hsmmc_runtime_resume,
};
#include <linux/mmc/host.h>
#include <linux/mmc/pm.h>
#include <linux/mmc/slot-gpio.h>
-#include <linux/mmc/sdhci.h>
#include "sdhci.h"
struct sdhci_bcm_kona_dev {
struct mutex write_lock; /* protect back to back writes */
- struct clk *external_clk;
};
}
}
-/*
- * Get the base clock. Use central clock source for now. Not sure if different
- * clock speed to each dev is allowed
- */
-static unsigned int sdhci_bcm_kona_get_max_clk(struct sdhci_host *host)
-{
- struct sdhci_bcm_kona_dev *kona_dev;
- struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
- kona_dev = sdhci_pltfm_priv(pltfm_priv);
-
- return host->mmc->f_max;
-}
-
-static unsigned int sdhci_bcm_kona_get_timeout_clock(struct sdhci_host *host)
-{
- return sdhci_bcm_kona_get_max_clk(host);
-}
-
static void sdhci_bcm_kona_init_74_clocks(struct sdhci_host *host,
u8 power_mode)
{
static struct sdhci_ops sdhci_bcm_kona_ops = {
.set_clock = sdhci_set_clock,
- .get_max_clock = sdhci_bcm_kona_get_max_clk,
- .get_timeout_clock = sdhci_bcm_kona_get_timeout_clock,
+ .get_max_clock = sdhci_pltfm_clk_get_max_clock,
+ .get_timeout_clock = sdhci_pltfm_clk_get_max_clock,
.platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks,
.set_bus_width = sdhci_set_bus_width,
.reset = sdhci_reset,
goto err_pltfm_free;
}
- /* Get and enable the external clock */
- kona_dev->external_clk = devm_clk_get(dev, NULL);
- if (IS_ERR(kona_dev->external_clk)) {
- dev_err(dev, "Failed to get external clock\n");
- ret = PTR_ERR(kona_dev->external_clk);
+ /* Get and enable the core clock */
+ pltfm_priv->clk = devm_clk_get(dev, NULL);
+ if (IS_ERR(pltfm_priv->clk)) {
+ dev_err(dev, "Failed to get core clock\n");
+ ret = PTR_ERR(pltfm_priv->clk);
goto err_pltfm_free;
}
- if (clk_set_rate(kona_dev->external_clk, host->mmc->f_max) != 0) {
- dev_err(dev, "Failed to set rate external clock\n");
+ if (clk_set_rate(pltfm_priv->clk, host->mmc->f_max) != 0) {
+ dev_err(dev, "Failed to set rate core clock\n");
goto err_pltfm_free;
}
- if (clk_prepare_enable(kona_dev->external_clk) != 0) {
- dev_err(dev, "Failed to enable external clock\n");
+ if (clk_prepare_enable(pltfm_priv->clk) != 0) {
+ dev_err(dev, "Failed to enable core clock\n");
goto err_pltfm_free;
}
sdhci_bcm_kona_sd_reset(host);
err_clk_disable:
- clk_disable_unprepare(kona_dev->external_clk);
+ clk_disable_unprepare(pltfm_priv->clk);
err_pltfm_free:
sdhci_pltfm_free(pdev);
return ret;
}
-static int sdhci_bcm_kona_remove(struct platform_device *pdev)
-{
- struct sdhci_host *host = platform_get_drvdata(pdev);
- struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
- struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv);
- int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);
-
- sdhci_remove_host(host, dead);
-
- clk_disable_unprepare(kona_dev->external_clk);
-
- sdhci_pltfm_free(pdev);
-
- return 0;
-}
-
static struct platform_driver sdhci_bcm_kona_driver = {
.driver = {
.name = "sdhci-kona",
.of_match_table = sdhci_bcm_kona_of_match,
},
.probe = sdhci_bcm_kona_probe,
- .remove = sdhci_bcm_kona_remove,
+ .remove = sdhci_pltfm_unregister,
};
module_platform_driver(sdhci_bcm_kona_driver);
return ret;
}
-static int bcm2835_sdhci_remove(struct platform_device *pdev)
-{
- return sdhci_pltfm_unregister(pdev);
-}
-
static const struct of_device_id bcm2835_sdhci_of_match[] = {
{ .compatible = "brcm,bcm2835-sdhci" },
{ }
.pm = SDHCI_PLTFM_PMOPS,
},
.probe = bcm2835_sdhci_probe,
- .remove = bcm2835_sdhci_remove,
+ .remove = sdhci_pltfm_unregister,
};
module_platform_driver(bcm2835_sdhci_driver);
return sdhci_pltfm_register(pdev, &sdhci_cns3xxx_pdata, 0);
}
-static int sdhci_cns3xxx_remove(struct platform_device *pdev)
-{
- return sdhci_pltfm_unregister(pdev);
-}
-
static struct platform_driver sdhci_cns3xxx_driver = {
.driver = {
.name = "sdhci-cns3xxx",
.pm = SDHCI_PLTFM_PMOPS,
},
.probe = sdhci_cns3xxx_probe,
- .remove = sdhci_cns3xxx_remove,
+ .remove = sdhci_pltfm_unregister,
};
module_platform_driver(sdhci_cns3xxx_driver);
#include "sdhci-pltfm.h"
-struct sdhci_dove_priv {
- struct clk *clk;
-};
-
static u16 sdhci_dove_readw(struct sdhci_host *host, int reg)
{
u16 ret;
{
struct sdhci_host *host;
struct sdhci_pltfm_host *pltfm_host;
- struct sdhci_dove_priv *priv;
int ret;
- priv = devm_kzalloc(&pdev->dev, sizeof(struct sdhci_dove_priv),
- GFP_KERNEL);
- if (!priv) {
- dev_err(&pdev->dev, "unable to allocate private data");
- return -ENOMEM;
- }
-
- priv->clk = devm_clk_get(&pdev->dev, NULL);
-
host = sdhci_pltfm_init(pdev, &sdhci_dove_pdata, 0);
if (IS_ERR(host))
return PTR_ERR(host);
pltfm_host = sdhci_priv(host);
- pltfm_host->priv = priv;
+ pltfm_host->clk = devm_clk_get(&pdev->dev, NULL);
- if (!IS_ERR(priv->clk))
- clk_prepare_enable(priv->clk);
+ if (!IS_ERR(pltfm_host->clk))
+ clk_prepare_enable(pltfm_host->clk);
ret = mmc_of_parse(host->mmc);
if (ret)
return 0;
err_sdhci_add:
- if (!IS_ERR(priv->clk))
- clk_disable_unprepare(priv->clk);
+ clk_disable_unprepare(pltfm_host->clk);
sdhci_pltfm_free(pdev);
return ret;
}
-static int sdhci_dove_remove(struct platform_device *pdev)
-{
- struct sdhci_host *host = platform_get_drvdata(pdev);
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct sdhci_dove_priv *priv = pltfm_host->priv;
-
- sdhci_pltfm_unregister(pdev);
-
- if (!IS_ERR(priv->clk))
- clk_disable_unprepare(priv->clk);
-
- return 0;
-}
-
static const struct of_device_id sdhci_dove_of_match_table[] = {
{ .compatible = "marvell,dove-sdhci", },
{}
.of_match_table = sdhci_dove_of_match_table,
},
.probe = sdhci_dove_probe,
- .remove = sdhci_dove_remove,
+ .remove = sdhci_pltfm_unregister,
};
module_platform_driver(sdhci_dove_driver);
new_val |= ESDHC_VENDOR_SPEC_FRC_SDCLK_ON;
else
new_val &= ~ESDHC_VENDOR_SPEC_FRC_SDCLK_ON;
- writel(new_val, host->ioaddr + ESDHC_VENDOR_SPEC);
+ writel(new_val, host->ioaddr + ESDHC_VENDOR_SPEC);
return;
case SDHCI_HOST_CONTROL2:
new_val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
#ifdef CONFIG_OF
static int
sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
+ struct sdhci_host *host,
struct esdhc_platform_data *boarddata)
{
struct device_node *np = pdev->dev.of_node;
if (of_property_read_u32(np, "fsl,delay-line", &boarddata->delay_line))
boarddata->delay_line = 0;
+ mmc_of_parse_voltage(np, &host->ocr_mask);
+
return 0;
}
#else
static inline int
sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
+ struct sdhci_host *host,
struct esdhc_platform_data *boarddata)
{
return -ENODEV;
host->ioaddr + ESDHC_TUNING_CTRL);
boarddata = &imx_data->boarddata;
- if (sdhci_esdhc_imx_probe_dt(pdev, boarddata) < 0) {
+ if (sdhci_esdhc_imx_probe_dt(pdev, host, boarddata) < 0) {
if (!host->mmc->parent->platform_data) {
dev_err(mmc_dev(host->mmc), "no board data!\n");
err = -EINVAL;
host->mmc->parent->platform_data);
}
- /* write_protect */
- if (boarddata->wp_type == ESDHC_WP_GPIO) {
- err = mmc_gpio_request_ro(host->mmc, boarddata->wp_gpio);
- if (err) {
- dev_err(mmc_dev(host->mmc),
- "failed to request write-protect gpio!\n");
- goto disable_clk;
- }
- host->mmc->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH;
- }
-
/* card_detect */
- switch (boarddata->cd_type) {
- case ESDHC_CD_GPIO:
- err = mmc_gpio_request_cd(host->mmc, boarddata->cd_gpio, 0);
- if (err) {
- dev_err(mmc_dev(host->mmc),
- "failed to request card-detect gpio!\n");
- goto disable_clk;
- }
- /* fall through */
-
- case ESDHC_CD_CONTROLLER:
- /* we have a working card_detect back */
+ if (boarddata->cd_type == ESDHC_CD_CONTROLLER)
host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
- break;
-
- case ESDHC_CD_PERMANENT:
- host->mmc->caps |= MMC_CAP_NONREMOVABLE;
- break;
-
- case ESDHC_CD_NONE:
- break;
- }
switch (boarddata->max_bus_width) {
case 8:
host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
}
+ /* call to generic mmc_of_parse to support additional capabilities */
+ err = mmc_of_parse(host->mmc);
+ if (err)
+ goto disable_clk;
+
err = sdhci_add_host(host);
if (err)
goto disable_clk;
--- /dev/null
+/*
+ * Copyright (C) 2014 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * iProc SDHCI platform driver
+ */
+
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <linux/mmc/host.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include "sdhci-pltfm.h"
+
+struct sdhci_iproc_data {
+ const struct sdhci_pltfm_data *pdata;
+ u32 caps;
+ u32 caps1;
+};
+
+struct sdhci_iproc_host {
+ const struct sdhci_iproc_data *data;
+ u32 shadow_cmd;
+ u32 shadow_blk;
+};
+
+#define REG_OFFSET_IN_BITS(reg) ((reg) << 3 & 0x18)
+
+static inline u32 sdhci_iproc_readl(struct sdhci_host *host, int reg)
+{
+ u32 val = readl(host->ioaddr + reg);
+
+ pr_debug("%s: readl [0x%02x] 0x%08x\n",
+ mmc_hostname(host->mmc), reg, val);
+ return val;
+}
+
+static u16 sdhci_iproc_readw(struct sdhci_host *host, int reg)
+{
+ u32 val = sdhci_iproc_readl(host, (reg & ~3));
+ u16 word = val >> REG_OFFSET_IN_BITS(reg) & 0xffff;
+ return word;
+}
+
+static u8 sdhci_iproc_readb(struct sdhci_host *host, int reg)
+{
+ u32 val = sdhci_iproc_readl(host, (reg & ~3));
+ u8 byte = val >> REG_OFFSET_IN_BITS(reg) & 0xff;
+ return byte;
+}
+
+static inline void sdhci_iproc_writel(struct sdhci_host *host, u32 val, int reg)
+{
+ pr_debug("%s: writel [0x%02x] 0x%08x\n",
+ mmc_hostname(host->mmc), reg, val);
+
+ writel(val, host->ioaddr + reg);
+
+ if (host->clock <= 400000) {
+ /* Round up to micro-second four SD clock delay */
+ if (host->clock)
+ udelay((4 * 1000000 + host->clock - 1) / host->clock);
+ else
+ udelay(10);
+ }
+}
+
+/*
+ * The Arasan has a bugette whereby it may lose the content of successive
+ * writes to the same register that are within two SD-card clock cycles of
+ * each other (a clock domain crossing problem). The data
+ * register does not have this problem, which is just as well - otherwise we'd
+ * have to nobble the DMA engine too.
+ *
+ * This wouldn't be a problem with the code except that we can only write the
+ * controller with 32-bit writes. So two different 16-bit registers are
+ * written back to back creates the problem.
+ *
+ * In reality, this only happens when SDHCI_BLOCK_SIZE and SDHCI_BLOCK_COUNT
+ * are written followed by SDHCI_TRANSFER_MODE and SDHCI_COMMAND.
+ * The BLOCK_SIZE and BLOCK_COUNT are meaningless until a command issued so
+ * the work around can be further optimized. We can keep shadow values of
+ * BLOCK_SIZE, BLOCK_COUNT, and TRANSFER_MODE until a COMMAND is issued.
+ * Then, write the BLOCK_SIZE+BLOCK_COUNT in a single 32-bit write followed
+ * by the TRANSFER+COMMAND in another 32-bit write.
+ */
+static void sdhci_iproc_writew(struct sdhci_host *host, u16 val, int reg)
+{
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct sdhci_iproc_host *iproc_host = sdhci_pltfm_priv(pltfm_host);
+ u32 word_shift = REG_OFFSET_IN_BITS(reg);
+ u32 mask = 0xffff << word_shift;
+ u32 oldval, newval;
+
+ if (reg == SDHCI_COMMAND) {
+ /* Write the block now as we are issuing a command */
+ if (iproc_host->shadow_blk != 0) {
+ sdhci_iproc_writel(host, iproc_host->shadow_blk,
+ SDHCI_BLOCK_SIZE);
+ iproc_host->shadow_blk = 0;
+ }
+ oldval = iproc_host->shadow_cmd;
+ } else if (reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) {
+ /* Block size and count are stored in shadow reg */
+ oldval = iproc_host->shadow_blk;
+ } else {
+ /* Read reg, all other registers are not shadowed */
+ oldval = sdhci_iproc_readl(host, (reg & ~3));
+ }
+ newval = (oldval & ~mask) | (val << word_shift);
+
+ if (reg == SDHCI_TRANSFER_MODE) {
+ /* Save the transfer mode until the command is issued */
+ iproc_host->shadow_cmd = newval;
+ } else if (reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) {
+ /* Save the block info until the command is issued */
+ iproc_host->shadow_blk = newval;
+ } else {
+ /* Command or other regular 32-bit write */
+ sdhci_iproc_writel(host, newval, reg & ~3);
+ }
+}
+
+static void sdhci_iproc_writeb(struct sdhci_host *host, u8 val, int reg)
+{
+ u32 oldval = sdhci_iproc_readl(host, (reg & ~3));
+ u32 byte_shift = REG_OFFSET_IN_BITS(reg);
+ u32 mask = 0xff << byte_shift;
+ u32 newval = (oldval & ~mask) | (val << byte_shift);
+
+ sdhci_iproc_writel(host, newval, reg & ~3);
+}
+
+static const struct sdhci_ops sdhci_iproc_ops = {
+ .read_l = sdhci_iproc_readl,
+ .read_w = sdhci_iproc_readw,
+ .read_b = sdhci_iproc_readb,
+ .write_l = sdhci_iproc_writel,
+ .write_w = sdhci_iproc_writew,
+ .write_b = sdhci_iproc_writeb,
+ .set_clock = sdhci_set_clock,
+ .get_max_clock = sdhci_pltfm_clk_get_max_clock,
+ .set_bus_width = sdhci_set_bus_width,
+ .reset = sdhci_reset,
+ .set_uhs_signaling = sdhci_set_uhs_signaling,
+};
+
+static const struct sdhci_pltfm_data sdhci_iproc_pltfm_data = {
+ .quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK,
+ .quirks2 = SDHCI_QUIRK2_ACMD23_BROKEN,
+ .ops = &sdhci_iproc_ops,
+};
+
+static const struct sdhci_iproc_data iproc_data = {
+ .pdata = &sdhci_iproc_pltfm_data,
+ .caps = 0x05E90000,
+ .caps1 = 0x00000064,
+};
+
+static const struct of_device_id sdhci_iproc_of_match[] = {
+ { .compatible = "brcm,sdhci-iproc-cygnus", .data = &iproc_data },
+ { }
+};
+MODULE_DEVICE_TABLE(of, sdhci_iproc_of_match);
+
+static int sdhci_iproc_probe(struct platform_device *pdev)
+{
+ const struct of_device_id *match;
+ const struct sdhci_iproc_data *iproc_data;
+ struct sdhci_host *host;
+ struct sdhci_iproc_host *iproc_host;
+ struct sdhci_pltfm_host *pltfm_host;
+ int ret;
+
+ match = of_match_device(sdhci_iproc_of_match, &pdev->dev);
+ if (!match)
+ return -EINVAL;
+ iproc_data = match->data;
+
+ host = sdhci_pltfm_init(pdev, iproc_data->pdata, sizeof(*iproc_host));
+ if (IS_ERR(host))
+ return PTR_ERR(host);
+
+ pltfm_host = sdhci_priv(host);
+ iproc_host = sdhci_pltfm_priv(pltfm_host);
+
+ iproc_host->data = iproc_data;
+
+ mmc_of_parse(host->mmc);
+ sdhci_get_of_property(pdev);
+
+ /* Enable EMMC 1/8V DDR capable */
+ host->mmc->caps |= MMC_CAP_1_8V_DDR;
+
+ pltfm_host->clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(pltfm_host->clk)) {
+ ret = PTR_ERR(pltfm_host->clk);
+ goto err;
+ }
+
+ if (iproc_host->data->pdata->quirks & SDHCI_QUIRK_MISSING_CAPS) {
+ host->caps = iproc_host->data->caps;
+ host->caps1 = iproc_host->data->caps1;
+ }
+
+ return sdhci_add_host(host);
+
+err:
+ sdhci_pltfm_free(pdev);
+ return ret;
+}
+
+static int sdhci_iproc_remove(struct platform_device *pdev)
+{
+ return sdhci_pltfm_unregister(pdev);
+}
+
+static struct platform_driver sdhci_iproc_driver = {
+ .driver = {
+ .name = "sdhci-iproc",
+ .of_match_table = sdhci_iproc_of_match,
+ .pm = SDHCI_PLTFM_PMOPS,
+ },
+ .probe = sdhci_iproc_probe,
+ .remove = sdhci_iproc_remove,
+};
+module_platform_driver(sdhci_iproc_driver);
+
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("IPROC SDHCI driver");
+MODULE_LICENSE("GPL v2");
#include "sdhci-pltfm.h"
+#define CORE_MCI_VERSION 0x50
+#define CORE_VERSION_MAJOR_SHIFT 28
+#define CORE_VERSION_MAJOR_MASK (0xf << CORE_VERSION_MAJOR_SHIFT)
+#define CORE_VERSION_MINOR_MASK 0xff
+
#define CORE_HC_MODE 0x78
#define HC_MODE_EN 0x1
#define CORE_POWER 0x0
#define CORE_VENDOR_SPEC 0x10c
#define CORE_CLK_PWRSAVE BIT(1)
+#define CORE_VENDOR_SPEC_CAPABILITIES0 0x11c
+
#define CDR_SELEXT_SHIFT 20
#define CDR_SELEXT_MASK (0xf << CDR_SELEXT_SHIFT)
#define CMUX_SHIFT_PHASE_SHIFT 24
struct sdhci_msm_host *msm_host;
struct resource *core_memres;
int ret;
- u16 host_version;
+ u16 host_version, core_minor;
+ u32 core_version, caps;
+ u8 core_major;
msm_host = devm_kzalloc(&pdev->dev, sizeof(*msm_host), GFP_KERNEL);
if (!msm_host)
host_version, ((host_version & SDHCI_VENDOR_VER_MASK) >>
SDHCI_VENDOR_VER_SHIFT));
+ core_version = readl_relaxed(msm_host->core_mem + CORE_MCI_VERSION);
+ core_major = (core_version & CORE_VERSION_MAJOR_MASK) >>
+ CORE_VERSION_MAJOR_SHIFT;
+ core_minor = core_version & CORE_VERSION_MINOR_MASK;
+ dev_dbg(&pdev->dev, "MCI Version: 0x%08x, major: 0x%04x, minor: 0x%02x\n",
+ core_version, core_major, core_minor);
+
+ /*
+ * Support for some capabilities is not advertised by newer
+ * controller versions and must be explicitly enabled.
+ */
+ if (core_major >= 1 && core_minor != 0x11 && core_minor != 0x12) {
+ caps = readl_relaxed(host->ioaddr + SDHCI_CAPABILITIES);
+ caps |= SDHCI_CAN_VDD_300 | SDHCI_CAN_DO_8BIT;
+ writel_relaxed(caps, host->ioaddr +
+ CORE_VENDOR_SPEC_CAPABILITIES0);
+ }
+
ret = sdhci_add_host(host);
if (ret)
goto clk_disable;
pltfm_host->priv = sdhci_arasan;
pltfm_host->clk = clk_xin;
+ ret = mmc_of_parse(host->mmc);
+ if (ret) {
+ dev_err(&pdev->dev, "parsing dt failed (%u)\n", ret);
+ goto clk_disable_all;
+ }
+
ret = sdhci_add_host(host);
if (ret)
goto err_pltfm_free;
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
- clk_disable_unprepare(pltfm_host->clk);
clk_disable_unprepare(sdhci_arasan->clk_ahb);
return sdhci_pltfm_unregister(pdev);
return ret;
}
-static int sdhci_esdhc_remove(struct platform_device *pdev)
-{
- return sdhci_pltfm_unregister(pdev);
-}
-
static const struct of_device_id sdhci_esdhc_of_match[] = {
{ .compatible = "fsl,mpc8379-esdhc" },
{ .compatible = "fsl,mpc8536-esdhc" },
.pm = ESDHC_PMOPS,
},
.probe = sdhci_esdhc_probe,
- .remove = sdhci_esdhc_remove,
+ .remove = sdhci_pltfm_unregister,
};
module_platform_driver(sdhci_esdhc_driver);
return sdhci_pltfm_register(pdev, &sdhci_hlwd_pdata, 0);
}
-static int sdhci_hlwd_remove(struct platform_device *pdev)
-{
- return sdhci_pltfm_unregister(pdev);
-}
-
static const struct of_device_id sdhci_hlwd_of_match[] = {
{ .compatible = "nintendo,hollywood-sdhci" },
{ }
.pm = SDHCI_PLTFM_PMOPS,
},
.probe = sdhci_hlwd_probe,
- .remove = sdhci_hlwd_remove,
+ .remove = sdhci_pltfm_unregister,
};
module_platform_driver(sdhci_hlwd_driver);
static const struct sdhci_pci_fixes sdhci_rtsx = {
.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
+ SDHCI_QUIRK2_BROKEN_64_BIT_DMA |
SDHCI_QUIRK2_BROKEN_DDR50,
.probe_slot = rtsx_probe_slot,
};
u32 bus_width;
int size;
- if (of_device_is_available(np)) {
- if (of_get_property(np, "sdhci,auto-cmd12", NULL))
- host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
+ if (of_get_property(np, "sdhci,auto-cmd12", NULL))
+ host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
- if (of_get_property(np, "sdhci,1-bit-only", NULL) ||
- (of_property_read_u32(np, "bus-width", &bus_width) == 0 &&
- bus_width == 1))
- host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA;
+ if (of_get_property(np, "sdhci,1-bit-only", NULL) ||
+ (of_property_read_u32(np, "bus-width", &bus_width) == 0 &&
+ bus_width == 1))
+ host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA;
- if (sdhci_of_wp_inverted(np))
- host->quirks |= SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
+ if (sdhci_of_wp_inverted(np))
+ host->quirks |= SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
- if (of_get_property(np, "broken-cd", NULL))
- host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
+ if (of_get_property(np, "broken-cd", NULL))
+ host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
- if (of_get_property(np, "no-1-8-v", NULL))
- host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
+ if (of_get_property(np, "no-1-8-v", NULL))
+ host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
- if (of_device_is_compatible(np, "fsl,p2020-rev1-esdhc"))
- host->quirks |= SDHCI_QUIRK_BROKEN_DMA;
+ if (of_device_is_compatible(np, "fsl,p2020-rev1-esdhc"))
+ host->quirks |= SDHCI_QUIRK_BROKEN_DMA;
- if (of_device_is_compatible(np, "fsl,p2020-esdhc") ||
- of_device_is_compatible(np, "fsl,p1010-esdhc") ||
- of_device_is_compatible(np, "fsl,t4240-esdhc") ||
- of_device_is_compatible(np, "fsl,mpc8536-esdhc"))
- host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
+ if (of_device_is_compatible(np, "fsl,p2020-esdhc") ||
+ of_device_is_compatible(np, "fsl,p1010-esdhc") ||
+ of_device_is_compatible(np, "fsl,t4240-esdhc") ||
+ of_device_is_compatible(np, "fsl,mpc8536-esdhc"))
+ host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
- clk = of_get_property(np, "clock-frequency", &size);
- if (clk && size == sizeof(*clk) && *clk)
- pltfm_host->clock = be32_to_cpup(clk);
+ clk = of_get_property(np, "clock-frequency", &size);
+ if (clk && size == sizeof(*clk) && *clk)
+ pltfm_host->clock = be32_to_cpup(clk);
- if (of_find_property(np, "keep-power-in-suspend", NULL))
- host->mmc->pm_caps |= MMC_PM_KEEP_POWER;
+ if (of_find_property(np, "keep-power-in-suspend", NULL))
+ host->mmc->pm_caps |= MMC_PM_KEEP_POWER;
- if (of_find_property(np, "enable-sdio-wakeup", NULL))
- host->mmc->pm_caps |= MMC_PM_WAKE_SDIO_IRQ;
- }
+ if (of_find_property(np, "enable-sdio-wakeup", NULL))
+ host->mmc->pm_caps |= MMC_PM_WAKE_SDIO_IRQ;
}
#else
void sdhci_get_of_property(struct platform_device *pdev) {}
int sdhci_pltfm_unregister(struct platform_device *pdev)
{
struct sdhci_host *host = platform_get_drvdata(pdev);
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);
sdhci_remove_host(host, dead);
+ clk_disable_unprepare(pltfm_host->clk);
sdhci_pltfm_free(pdev);
return 0;
#define SIRF_TUNING_COUNT 128
struct sdhci_sirf_priv {
- struct clk *clk;
int gpio_cd;
};
-static unsigned int sdhci_sirf_get_max_clk(struct sdhci_host *host)
-{
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct sdhci_sirf_priv *priv = sdhci_pltfm_priv(pltfm_host);
- return clk_get_rate(priv->clk);
-}
-
static void sdhci_sirf_set_bus_width(struct sdhci_host *host, int width)
{
u8 ctrl;
int tuning_seq_cnt = 3;
u8 phase, tuned_phases[SIRF_TUNING_COUNT];
u8 tuned_phase_cnt = 0;
- int rc, longest_range = 0;
+ int rc = 0, longest_range = 0;
int start = -1, end = 0, tuning_value = -1, range = 0;
u16 clock_setting;
struct mmc_host *mmc = host->mmc;
phase = 0;
do {
sdhci_writel(host,
- clock_setting | phase | (phase << 7) | (phase << 16),
+ clock_setting | phase,
SDHCI_CLK_DELAY_SETTING);
if (!mmc_send_tuning(mmc)) {
*/
phase = tuning_value;
sdhci_writel(host,
- clock_setting | phase | (phase << 7) | (phase << 16),
+ clock_setting | phase,
SDHCI_CLK_DELAY_SETTING);
dev_dbg(mmc_dev(mmc), "%s: Setting the tuning phase to %d\n",
static struct sdhci_ops sdhci_sirf_ops = {
.platform_execute_tuning = sdhci_sirf_execute_tuning,
.set_clock = sdhci_set_clock,
- .get_max_clock = sdhci_sirf_get_max_clk,
+ .get_max_clock = sdhci_pltfm_clk_get_max_clock,
.set_bus_width = sdhci_sirf_set_bus_width,
.reset = sdhci_reset,
.set_uhs_signaling = sdhci_set_uhs_signaling,
return PTR_ERR(host);
pltfm_host = sdhci_priv(host);
+ pltfm_host->clk = clk;
priv = sdhci_pltfm_priv(pltfm_host);
- priv->clk = clk;
priv->gpio_cd = gpio_cd;
sdhci_get_of_property(pdev);
- ret = clk_prepare_enable(priv->clk);
+ ret = clk_prepare_enable(pltfm_host->clk);
if (ret)
goto err_clk_prepare;
err_request_cd:
sdhci_remove_host(host, 0);
err_sdhci_add:
- clk_disable_unprepare(priv->clk);
+ clk_disable_unprepare(pltfm_host->clk);
err_clk_prepare:
sdhci_pltfm_free(pdev);
return ret;
}
-static int sdhci_sirf_remove(struct platform_device *pdev)
-{
- struct sdhci_host *host = platform_get_drvdata(pdev);
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct sdhci_sirf_priv *priv = sdhci_pltfm_priv(pltfm_host);
-
- sdhci_pltfm_unregister(pdev);
-
- clk_disable_unprepare(priv->clk);
- return 0;
-}
-
#ifdef CONFIG_PM_SLEEP
static int sdhci_sirf_suspend(struct device *dev)
{
struct sdhci_host *host = dev_get_drvdata(dev);
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct sdhci_sirf_priv *priv = sdhci_pltfm_priv(pltfm_host);
int ret;
ret = sdhci_suspend_host(host);
if (ret)
return ret;
- clk_disable(priv->clk);
+ clk_disable(pltfm_host->clk);
return 0;
}
{
struct sdhci_host *host = dev_get_drvdata(dev);
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct sdhci_sirf_priv *priv = sdhci_pltfm_priv(pltfm_host);
int ret;
- ret = clk_enable(priv->clk);
+ ret = clk_enable(pltfm_host->clk);
if (ret) {
dev_dbg(dev, "Resume: Error enabling clock\n");
return ret;
#endif
},
.probe = sdhci_sirf_probe,
- .remove = sdhci_sirf_remove,
+ .remove = sdhci_pltfm_unregister,
};
module_platform_driver(sdhci_sirf_driver);
#include <linux/pm.h>
#include <linux/slab.h>
#include <linux/mmc/host.h>
-#include <linux/mmc/sdhci-spear.h>
#include <linux/mmc/slot-gpio.h>
#include <linux/io.h>
#include "sdhci.h"
struct spear_sdhci {
struct clk *clk;
- struct sdhci_plat_data *data;
+ int card_int_gpio;
};
/* sdhci ops */
.set_uhs_signaling = sdhci_set_uhs_signaling,
};
-#ifdef CONFIG_OF
-static struct sdhci_plat_data *sdhci_probe_config_dt(struct platform_device *pdev)
+static void sdhci_probe_config_dt(struct device_node *np,
+ struct spear_sdhci *host)
{
- struct device_node *np = pdev->dev.of_node;
- struct sdhci_plat_data *pdata = NULL;
int cd_gpio;
cd_gpio = of_get_named_gpio(np, "cd-gpios", 0);
if (!gpio_is_valid(cd_gpio))
cd_gpio = -1;
- /* If pdata is required */
- if (cd_gpio != -1) {
- pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
- if (!pdata)
- dev_err(&pdev->dev, "DT: kzalloc failed\n");
- else
- pdata->card_int_gpio = cd_gpio;
- }
-
- return pdata;
-}
-#else
-static struct sdhci_plat_data *sdhci_probe_config_dt(struct platform_device *pdev)
-{
- return ERR_PTR(-ENOSYS);
+ host->card_int_gpio = cd_gpio;
}
-#endif
static int sdhci_probe(struct platform_device *pdev)
{
- struct device_node *np = pdev->dev.of_node;
struct sdhci_host *host;
struct resource *iomem;
struct spear_sdhci *sdhci;
dev_dbg(&pdev->dev, "Error setting desired clk, clk=%lu\n",
clk_get_rate(sdhci->clk));
- if (np) {
- sdhci->data = sdhci_probe_config_dt(pdev);
- if (IS_ERR(sdhci->data)) {
- dev_err(&pdev->dev, "DT: Failed to get pdata\n");
- goto disable_clk;
- }
- } else {
- sdhci->data = dev_get_platdata(&pdev->dev);
- }
-
+ sdhci_probe_config_dt(pdev->dev.of_node, sdhci);
/*
* It is optional to use GPIOs for sdhci card detection. If
- * sdhci->data is NULL, then use original sdhci lines otherwise
+ * sdhci->card_int_gpio < 0, then use original sdhci lines otherwise
* GPIO lines. We use the built-in GPIO support for this.
*/
- if (sdhci->data && sdhci->data->card_int_gpio >= 0) {
- ret = mmc_gpio_request_cd(host->mmc,
- sdhci->data->card_int_gpio, 0);
+ if (sdhci->card_int_gpio >= 0) {
+ ret = mmc_gpio_request_cd(host->mmc, sdhci->card_int_gpio, 0);
if (ret < 0) {
dev_dbg(&pdev->dev,
"failed to request card-detect gpio%d\n",
- sdhci->data->card_int_gpio);
+ sdhci->card_int_gpio);
goto disable_clk;
}
}
#include <linux/module.h>
#include <linux/err.h>
#include <linux/mmc/host.h>
-
+#include <linux/reset.h>
#include "sdhci-pltfm.h"
+struct st_mmc_platform_data {
+ struct reset_control *rstc;
+ void __iomem *top_ioaddr;
+};
+
+/* MMCSS glue logic to setup the HC on some ST SoCs (e.g. STiH407 family) */
+
+#define ST_MMC_CCONFIG_REG_1 0x400
+#define ST_MMC_CCONFIG_TIMEOUT_CLK_UNIT BIT(24)
+#define ST_MMC_CCONFIG_TIMEOUT_CLK_FREQ BIT(12)
+#define ST_MMC_CCONFIG_TUNING_COUNT_DEFAULT BIT(8)
+#define ST_MMC_CCONFIG_ASYNC_WAKEUP BIT(0)
+#define ST_MMC_CCONFIG_1_DEFAULT \
+ ((ST_MMC_CCONFIG_TIMEOUT_CLK_UNIT) | \
+ (ST_MMC_CCONFIG_TIMEOUT_CLK_FREQ) | \
+ (ST_MMC_CCONFIG_TUNING_COUNT_DEFAULT))
+
+#define ST_MMC_CCONFIG_REG_2 0x404
+#define ST_MMC_CCONFIG_HIGH_SPEED BIT(28)
+#define ST_MMC_CCONFIG_ADMA2 BIT(24)
+#define ST_MMC_CCONFIG_8BIT BIT(20)
+#define ST_MMC_CCONFIG_MAX_BLK_LEN 16
+#define MAX_BLK_LEN_1024 1
+#define MAX_BLK_LEN_2048 2
+#define BASE_CLK_FREQ_200 0xc8
+#define BASE_CLK_FREQ_100 0x64
+#define BASE_CLK_FREQ_50 0x32
+#define ST_MMC_CCONFIG_2_DEFAULT \
+ (ST_MMC_CCONFIG_HIGH_SPEED | ST_MMC_CCONFIG_ADMA2 | \
+ ST_MMC_CCONFIG_8BIT | \
+ (MAX_BLK_LEN_1024 << ST_MMC_CCONFIG_MAX_BLK_LEN))
+
+#define ST_MMC_CCONFIG_REG_3 0x408
+#define ST_MMC_CCONFIG_EMMC_SLOT_TYPE BIT(28)
+#define ST_MMC_CCONFIG_64BIT BIT(24)
+#define ST_MMC_CCONFIG_ASYNCH_INTR_SUPPORT BIT(20)
+#define ST_MMC_CCONFIG_1P8_VOLT BIT(16)
+#define ST_MMC_CCONFIG_3P0_VOLT BIT(12)
+#define ST_MMC_CCONFIG_3P3_VOLT BIT(8)
+#define ST_MMC_CCONFIG_SUSP_RES_SUPPORT BIT(4)
+#define ST_MMC_CCONFIG_SDMA BIT(0)
+#define ST_MMC_CCONFIG_3_DEFAULT \
+ (ST_MMC_CCONFIG_ASYNCH_INTR_SUPPORT | \
+ ST_MMC_CCONFIG_3P3_VOLT | \
+ ST_MMC_CCONFIG_SUSP_RES_SUPPORT | \
+ ST_MMC_CCONFIG_SDMA)
+
+#define ST_MMC_CCONFIG_REG_4 0x40c
+#define ST_MMC_CCONFIG_D_DRIVER BIT(20)
+#define ST_MMC_CCONFIG_C_DRIVER BIT(16)
+#define ST_MMC_CCONFIG_A_DRIVER BIT(12)
+#define ST_MMC_CCONFIG_DDR50 BIT(8)
+#define ST_MMC_CCONFIG_SDR104 BIT(4)
+#define ST_MMC_CCONFIG_SDR50 BIT(0)
+#define ST_MMC_CCONFIG_4_DEFAULT 0
+
+#define ST_MMC_CCONFIG_REG_5 0x410
+#define ST_MMC_CCONFIG_TUNING_FOR_SDR50 BIT(8)
+#define RETUNING_TIMER_CNT_MAX 0xf
+#define ST_MMC_CCONFIG_5_DEFAULT 0
+
+/* I/O configuration for Arasan IP */
+#define ST_MMC_GP_OUTPUT 0x450
+#define ST_MMC_GP_OUTPUT_CD BIT(12)
+
+#define ST_MMC_STATUS_R 0x460
+
+#define ST_TOP_MMC_DLY_FIX_OFF(x) (x - 0x8)
+
+/* TOP config registers to manage static and dynamic delay */
+#define ST_TOP_MMC_TX_CLK_DLY ST_TOP_MMC_DLY_FIX_OFF(0x8)
+#define ST_TOP_MMC_RX_CLK_DLY ST_TOP_MMC_DLY_FIX_OFF(0xc)
+/* MMC delay control register */
+#define ST_TOP_MMC_DLY_CTRL ST_TOP_MMC_DLY_FIX_OFF(0x18)
+#define ST_TOP_MMC_DLY_CTRL_DLL_BYPASS_CMD BIT(0)
+#define ST_TOP_MMC_DLY_CTRL_DLL_BYPASS_PH_SEL BIT(1)
+#define ST_TOP_MMC_DLY_CTRL_TX_DLL_ENABLE BIT(8)
+#define ST_TOP_MMC_DLY_CTRL_RX_DLL_ENABLE BIT(9)
+#define ST_TOP_MMC_DLY_CTRL_ATUNE_NOT_CFG_DLY BIT(10)
+#define ST_TOP_MMC_START_DLL_LOCK BIT(11)
+
+/* register to provide the phase-shift value for DLL */
+#define ST_TOP_MMC_TX_DLL_STEP_DLY ST_TOP_MMC_DLY_FIX_OFF(0x1c)
+#define ST_TOP_MMC_RX_DLL_STEP_DLY ST_TOP_MMC_DLY_FIX_OFF(0x20)
+#define ST_TOP_MMC_RX_CMD_STEP_DLY ST_TOP_MMC_DLY_FIX_OFF(0x24)
+
+/* phase shift delay on the tx clk 2.188ns */
+#define ST_TOP_MMC_TX_DLL_STEP_DLY_VALID 0x6
+
+#define ST_TOP_MMC_DLY_MAX 0xf
+
+#define ST_TOP_MMC_DYN_DLY_CONF \
+ (ST_TOP_MMC_DLY_CTRL_TX_DLL_ENABLE | \
+ ST_TOP_MMC_DLY_CTRL_ATUNE_NOT_CFG_DLY | \
+ ST_TOP_MMC_START_DLL_LOCK)
+
+/*
+ * For clock speeds greater than 90MHz, we need to check that the
+ * DLL procedure has finished before switching to ultra-speed modes.
+ */
+#define CLK_TO_CHECK_DLL_LOCK 90000000
+
+static inline void st_mmcss_set_static_delay(void __iomem *ioaddr)
+{
+ if (!ioaddr)
+ return;
+
+ writel_relaxed(0x0, ioaddr + ST_TOP_MMC_DLY_CTRL);
+ writel_relaxed(ST_TOP_MMC_DLY_MAX,
+ ioaddr + ST_TOP_MMC_TX_CLK_DLY);
+}
+
+/**
+ * st_mmcss_cconfig: configure the Arasan HC inside the flashSS.
+ * @np: dt device node.
+ * @host: sdhci host
+ * Description: this function is to configure the Arasan host controller.
+ * On some ST SoCs, i.e. STiH407 family, the MMC devices inside a dedicated
+ * flashSS sub-system which needs to be configured to be compliant to eMMC 4.5
+ * or eMMC4.3. This has to be done before registering the sdhci host.
+ */
+static void st_mmcss_cconfig(struct device_node *np, struct sdhci_host *host)
+{
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct mmc_host *mhost = host->mmc;
+ u32 cconf2, cconf3, cconf4, cconf5;
+
+ if (!of_device_is_compatible(np, "st,sdhci-stih407"))
+ return;
+
+ cconf2 = ST_MMC_CCONFIG_2_DEFAULT;
+ cconf3 = ST_MMC_CCONFIG_3_DEFAULT;
+ cconf4 = ST_MMC_CCONFIG_4_DEFAULT;
+ cconf5 = ST_MMC_CCONFIG_5_DEFAULT;
+
+ writel_relaxed(ST_MMC_CCONFIG_1_DEFAULT,
+ host->ioaddr + ST_MMC_CCONFIG_REG_1);
+
+ /* Set clock frequency, default to 50MHz if max-frequency is not
+ * provided */
+
+ switch (mhost->f_max) {
+ case 200000000:
+ clk_set_rate(pltfm_host->clk, mhost->f_max);
+ cconf2 |= BASE_CLK_FREQ_200;
+ break;
+ case 100000000:
+ clk_set_rate(pltfm_host->clk, mhost->f_max);
+ cconf2 |= BASE_CLK_FREQ_100;
+ break;
+ default:
+ clk_set_rate(pltfm_host->clk, 50000000);
+ cconf2 |= BASE_CLK_FREQ_50;
+ }
+
+ writel_relaxed(cconf2, host->ioaddr + ST_MMC_CCONFIG_REG_2);
+
+ if (mhost->caps & MMC_CAP_NONREMOVABLE)
+ cconf3 |= ST_MMC_CCONFIG_EMMC_SLOT_TYPE;
+ else
+ /* CARD _D ET_CTRL */
+ writel_relaxed(ST_MMC_GP_OUTPUT_CD,
+ host->ioaddr + ST_MMC_GP_OUTPUT);
+
+ if (mhost->caps & MMC_CAP_UHS_SDR50) {
+ /* use 1.8V */
+ cconf3 |= ST_MMC_CCONFIG_1P8_VOLT;
+ cconf4 |= ST_MMC_CCONFIG_SDR50;
+ /* Use tuning */
+ cconf5 |= ST_MMC_CCONFIG_TUNING_FOR_SDR50;
+ /* Max timeout for retuning */
+ cconf5 |= RETUNING_TIMER_CNT_MAX;
+ }
+
+ if (mhost->caps & MMC_CAP_UHS_SDR104) {
+ /*
+ * SDR104 implies the HC can support HS200 mode, so
+ * it's mandatory to use 1.8V
+ */
+ cconf3 |= ST_MMC_CCONFIG_1P8_VOLT;
+ cconf4 |= ST_MMC_CCONFIG_SDR104;
+ /* Max timeout for retuning */
+ cconf5 |= RETUNING_TIMER_CNT_MAX;
+ }
+
+ if (mhost->caps & MMC_CAP_UHS_DDR50)
+ cconf4 |= ST_MMC_CCONFIG_DDR50;
+
+ writel_relaxed(cconf3, host->ioaddr + ST_MMC_CCONFIG_REG_3);
+ writel_relaxed(cconf4, host->ioaddr + ST_MMC_CCONFIG_REG_4);
+ writel_relaxed(cconf5, host->ioaddr + ST_MMC_CCONFIG_REG_5);
+}
+
+static inline void st_mmcss_set_dll(void __iomem *ioaddr)
+{
+ if (!ioaddr)
+ return;
+
+ writel_relaxed(ST_TOP_MMC_DYN_DLY_CONF, ioaddr + ST_TOP_MMC_DLY_CTRL);
+ writel_relaxed(ST_TOP_MMC_TX_DLL_STEP_DLY_VALID,
+ ioaddr + ST_TOP_MMC_TX_DLL_STEP_DLY);
+}
+
+static int st_mmcss_lock_dll(void __iomem *ioaddr)
+{
+ unsigned long curr, value;
+ unsigned long finish = jiffies + HZ;
+
+ /* Checks if the DLL procedure is finished */
+ do {
+ curr = jiffies;
+ value = readl(ioaddr + ST_MMC_STATUS_R);
+ if (value & 0x1)
+ return 0;
+
+ cpu_relax();
+ } while (!time_after_eq(curr, finish));
+
+ return -EBUSY;
+}
+
+static int sdhci_st_set_dll_for_clock(struct sdhci_host *host)
+{
+ int ret = 0;
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct st_mmc_platform_data *pdata = pltfm_host->priv;
+
+ if (host->clock > CLK_TO_CHECK_DLL_LOCK) {
+ st_mmcss_set_dll(pdata->top_ioaddr);
+ ret = st_mmcss_lock_dll(host->ioaddr);
+ }
+
+ return ret;
+}
+
+static void sdhci_st_set_uhs_signaling(struct sdhci_host *host,
+ unsigned int uhs)
+{
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct st_mmc_platform_data *pdata = pltfm_host->priv;
+ u16 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+ int ret = 0;
+
+ /* Select Bus Speed Mode for host */
+ ctrl_2 &= ~SDHCI_CTRL_UHS_MASK;
+ switch (uhs) {
+ /*
+ * Set V18_EN -- UHS modes do not work without this.
+ * does not change signaling voltage
+ */
+
+ case MMC_TIMING_UHS_SDR12:
+ st_mmcss_set_static_delay(pdata->top_ioaddr);
+ ctrl_2 |= SDHCI_CTRL_UHS_SDR12 | SDHCI_CTRL_VDD_180;
+ break;
+ case MMC_TIMING_UHS_SDR25:
+ st_mmcss_set_static_delay(pdata->top_ioaddr);
+ ctrl_2 |= SDHCI_CTRL_UHS_SDR25 | SDHCI_CTRL_VDD_180;
+ break;
+ case MMC_TIMING_UHS_SDR50:
+ st_mmcss_set_static_delay(pdata->top_ioaddr);
+ ctrl_2 |= SDHCI_CTRL_UHS_SDR50 | SDHCI_CTRL_VDD_180;
+ ret = sdhci_st_set_dll_for_clock(host);
+ break;
+ case MMC_TIMING_UHS_SDR104:
+ case MMC_TIMING_MMC_HS200:
+ st_mmcss_set_static_delay(pdata->top_ioaddr);
+ ctrl_2 |= SDHCI_CTRL_UHS_SDR104 | SDHCI_CTRL_VDD_180;
+ ret = sdhci_st_set_dll_for_clock(host);
+ break;
+ case MMC_TIMING_UHS_DDR50:
+ case MMC_TIMING_MMC_DDR52:
+ st_mmcss_set_static_delay(pdata->top_ioaddr);
+ ctrl_2 |= SDHCI_CTRL_UHS_DDR50 | SDHCI_CTRL_VDD_180;
+ break;
+ }
+
+ if (ret)
+ dev_warn(mmc_dev(host->mmc), "Error setting dll for clock "
+ "(uhs %d)\n", uhs);
+
+ dev_dbg(mmc_dev(host->mmc), "uhs %d, ctrl_2 %04X\n", uhs, ctrl_2);
+
+ sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
+}
+
static u32 sdhci_st_readl(struct sdhci_host *host, int reg)
{
u32 ret;
.set_bus_width = sdhci_set_bus_width,
.read_l = sdhci_st_readl,
.reset = sdhci_reset,
+ .set_uhs_signaling = sdhci_st_set_uhs_signaling,
};
static const struct sdhci_pltfm_data sdhci_st_pdata = {
.ops = &sdhci_st_ops,
.quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
- SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
+ SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
+ SDHCI_QUIRK_NO_HISPD_BIT,
+ .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
+ SDHCI_QUIRK2_STOP_WITH_TC,
};
static int sdhci_st_probe(struct platform_device *pdev)
{
+ struct device_node *np = pdev->dev.of_node;
struct sdhci_host *host;
+ struct st_mmc_platform_data *pdata;
struct sdhci_pltfm_host *pltfm_host;
struct clk *clk;
int ret = 0;
u16 host_version;
+ struct resource *res;
+
+ pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
+ return -ENOMEM;
clk = devm_clk_get(&pdev->dev, "mmc");
if (IS_ERR(clk)) {
return PTR_ERR(clk);
}
+ pdata->rstc = devm_reset_control_get(&pdev->dev, NULL);
+ if (IS_ERR(pdata->rstc))
+ pdata->rstc = NULL;
+ else
+ reset_control_deassert(pdata->rstc);
+
host = sdhci_pltfm_init(pdev, &sdhci_st_pdata, 0);
if (IS_ERR(host)) {
dev_err(&pdev->dev, "Failed sdhci_pltfm_init\n");
- return PTR_ERR(host);
+ ret = PTR_ERR(host);
+ goto err_pltfm_init;
}
ret = mmc_of_parse(host->mmc);
clk_prepare_enable(clk);
+ /* Configure the FlashSS Top registers for setting eMMC TX/RX delay */
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+ "top-mmc-delay");
+ pdata->top_ioaddr = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(pdata->top_ioaddr)) {
+ dev_warn(&pdev->dev, "FlashSS Top Dly registers not available");
+ pdata->top_ioaddr = NULL;
+ }
+
pltfm_host = sdhci_priv(host);
+ pltfm_host->priv = pdata;
pltfm_host->clk = clk;
+ /* Configure the Arasan HC inside the flashSS */
+ st_mmcss_cconfig(np, host);
+
ret = sdhci_add_host(host);
if (ret) {
dev_err(&pdev->dev, "Failed sdhci_add_host\n");
clk_disable_unprepare(clk);
err_of:
sdhci_pltfm_free(pdev);
+err_pltfm_init:
+ if (pdata->rstc)
+ reset_control_assert(pdata->rstc);
return ret;
}
{
struct sdhci_host *host = platform_get_drvdata(pdev);
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct st_mmc_platform_data *pdata = pltfm_host->priv;
+ int ret;
- clk_disable_unprepare(pltfm_host->clk);
+ ret = sdhci_pltfm_unregister(pdev);
+
+ if (pdata->rstc)
+ reset_control_assert(pdata->rstc);
- return sdhci_pltfm_unregister(pdev);
+ return ret;
}
#ifdef CONFIG_PM_SLEEP
{
struct sdhci_host *host = dev_get_drvdata(dev);
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct st_mmc_platform_data *pdata = pltfm_host->priv;
int ret = sdhci_suspend_host(host);
if (ret)
goto out;
+ if (pdata->rstc)
+ reset_control_assert(pdata->rstc);
+
clk_disable_unprepare(pltfm_host->clk);
out:
return ret;
{
struct sdhci_host *host = dev_get_drvdata(dev);
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct st_mmc_platform_data *pdata = pltfm_host->priv;
+ struct device_node *np = dev->of_node;
clk_prepare_enable(pltfm_host->clk);
+ if (pdata->rstc)
+ reset_control_deassert(pdata->rstc);
+
+ st_mmcss_cconfig(np, host);
+
return sdhci_resume_host(host);
}
#endif
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_device.h>
-#include <linux/of_gpio.h>
-#include <linux/gpio.h>
#include <linux/mmc/card.h>
#include <linux/mmc/host.h>
#include <linux/mmc/slot-gpio.h>
+#include <linux/gpio/consumer.h>
#include "sdhci-pltfm.h"
#define NVQUIRK_DISABLE_SDR50 BIT(3)
#define NVQUIRK_DISABLE_SDR104 BIT(4)
#define NVQUIRK_DISABLE_DDR50 BIT(5)
-#define NVQUIRK_SHADOW_XFER_MODE_REG BIT(6)
struct sdhci_tegra_soc_data {
const struct sdhci_pltfm_data *pdata;
struct sdhci_tegra {
const struct sdhci_tegra_soc_data *soc_data;
- int power_gpio;
+ struct gpio_desc *power_gpio;
};
static u16 tegra_sdhci_readw(struct sdhci_host *host, int reg)
static void tegra_sdhci_writew(struct sdhci_host *host, u16 val, int reg)
{
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct sdhci_tegra *tegra_host = pltfm_host->priv;
- const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;
- if (soc_data->nvquirks & NVQUIRK_SHADOW_XFER_MODE_REG) {
- switch (reg) {
- case SDHCI_TRANSFER_MODE:
- /*
- * Postpone this write, we must do it together with a
- * command write that is down below.
- */
- pltfm_host->xfer_mode_shadow = val;
- return;
- case SDHCI_COMMAND:
- writel((val << 16) | pltfm_host->xfer_mode_shadow,
- host->ioaddr + SDHCI_TRANSFER_MODE);
- return;
- }
+ switch (reg) {
+ case SDHCI_TRANSFER_MODE:
+ /*
+ * Postpone this write, we must do it together with a
+ * command write that is down below.
+ */
+ pltfm_host->xfer_mode_shadow = val;
+ return;
+ case SDHCI_COMMAND:
+ writel((val << 16) | pltfm_host->xfer_mode_shadow,
+ host->ioaddr + SDHCI_TRANSFER_MODE);
+ return;
}
writew(val, host->ioaddr + reg);
static const struct sdhci_ops tegra_sdhci_ops = {
.get_ro = tegra_sdhci_get_ro,
.read_w = tegra_sdhci_readw,
- .write_w = tegra_sdhci_writew,
.write_l = tegra_sdhci_writel,
.set_clock = sdhci_set_clock,
.set_bus_width = tegra_sdhci_set_bus_width,
NVQUIRK_DISABLE_SDR104,
};
+static const struct sdhci_ops tegra114_sdhci_ops = {
+ .get_ro = tegra_sdhci_get_ro,
+ .read_w = tegra_sdhci_readw,
+ .write_w = tegra_sdhci_writew,
+ .write_l = tegra_sdhci_writel,
+ .set_clock = sdhci_set_clock,
+ .set_bus_width = tegra_sdhci_set_bus_width,
+ .reset = tegra_sdhci_reset,
+ .set_uhs_signaling = sdhci_set_uhs_signaling,
+ .get_max_clock = sdhci_pltfm_clk_get_max_clock,
+};
+
static const struct sdhci_pltfm_data sdhci_tegra114_pdata = {
.quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
SDHCI_QUIRK_NO_HISPD_BIT |
SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC |
SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
- .ops = &tegra_sdhci_ops,
+ .ops = &tegra114_sdhci_ops,
};
static struct sdhci_tegra_soc_data soc_data_tegra114 = {
.pdata = &sdhci_tegra114_pdata,
.nvquirks = NVQUIRK_DISABLE_SDR50 |
NVQUIRK_DISABLE_DDR50 |
- NVQUIRK_DISABLE_SDR104 |
- NVQUIRK_SHADOW_XFER_MODE_REG,
+ NVQUIRK_DISABLE_SDR104,
};
static const struct of_device_id sdhci_tegra_dt_match[] = {
};
MODULE_DEVICE_TABLE(of, sdhci_tegra_dt_match);
-static int sdhci_tegra_parse_dt(struct device *dev)
-{
- struct device_node *np = dev->of_node;
- struct sdhci_host *host = dev_get_drvdata(dev);
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct sdhci_tegra *tegra_host = pltfm_host->priv;
-
- tegra_host->power_gpio = of_get_named_gpio(np, "power-gpios", 0);
- return mmc_of_parse(host->mmc);
-}
-
static int sdhci_tegra_probe(struct platform_device *pdev)
{
const struct of_device_id *match;
tegra_host->soc_data = soc_data;
pltfm_host->priv = tegra_host;
- rc = sdhci_tegra_parse_dt(&pdev->dev);
+ rc = mmc_of_parse(host->mmc);
if (rc)
goto err_parse_dt;
- if (gpio_is_valid(tegra_host->power_gpio)) {
- rc = gpio_request(tegra_host->power_gpio, "sdhci_power");
- if (rc) {
- dev_err(mmc_dev(host->mmc),
- "failed to allocate power gpio\n");
- goto err_power_req;
- }
- gpio_direction_output(tegra_host->power_gpio, 1);
+ tegra_host->power_gpio = devm_gpiod_get_optional(&pdev->dev, "power",
+ GPIOD_OUT_HIGH);
+ if (IS_ERR(tegra_host->power_gpio)) {
+ rc = PTR_ERR(tegra_host->power_gpio);
+ goto err_power_req;
}
- clk = clk_get(mmc_dev(host->mmc), NULL);
+ clk = devm_clk_get(mmc_dev(host->mmc), NULL);
if (IS_ERR(clk)) {
dev_err(mmc_dev(host->mmc), "clk err\n");
rc = PTR_ERR(clk);
err_add_host:
clk_disable_unprepare(pltfm_host->clk);
- clk_put(pltfm_host->clk);
err_clk_get:
- if (gpio_is_valid(tegra_host->power_gpio))
- gpio_free(tegra_host->power_gpio);
err_power_req:
err_parse_dt:
err_alloc_tegra_host:
return rc;
}
-static int sdhci_tegra_remove(struct platform_device *pdev)
-{
- struct sdhci_host *host = platform_get_drvdata(pdev);
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct sdhci_tegra *tegra_host = pltfm_host->priv;
- int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);
-
- sdhci_remove_host(host, dead);
-
- if (gpio_is_valid(tegra_host->power_gpio))
- gpio_free(tegra_host->power_gpio);
-
- clk_disable_unprepare(pltfm_host->clk);
- clk_put(pltfm_host->clk);
-
- sdhci_pltfm_free(pdev);
-
- return 0;
-}
-
static struct platform_driver sdhci_tegra_driver = {
.driver = {
.name = "sdhci-tegra",
.pm = SDHCI_PLTFM_PMOPS,
},
.probe = sdhci_tegra_probe,
- .remove = sdhci_tegra_remove,
+ .remove = sdhci_pltfm_unregister,
};
module_platform_driver(sdhci_tegra_driver);
#include <linux/mmc/mmc.h>
#include <linux/mmc/host.h>
#include <linux/mmc/card.h>
+#include <linux/mmc/sdio.h>
#include <linux/mmc/slot-gpio.h>
#include "sdhci.h"
static int sdhci_pre_dma_transfer(struct sdhci_host *host,
struct mmc_data *data,
struct sdhci_host_next *next);
+static int sdhci_do_get_cd(struct sdhci_host *host);
#ifdef CONFIG_PM
static int sdhci_runtime_pm_get(struct sdhci_host *host);
* If we are sending CMD23, CMD12 never gets sent
* on successful completion (so no Auto-CMD12).
*/
- if (!host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD12))
+ if (!host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD12) &&
+ (cmd->opcode != SD_IO_RW_EXTENDED))
mode |= SDHCI_TRNS_AUTO_CMD12;
else if (host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD23)) {
mode |= SDHCI_TRNS_AUTO_CMD23;
sdhci_runtime_pm_get(host);
- present = mmc_gpio_get_cd(host->mmc);
+ /* Firstly check card presence */
+ present = sdhci_do_get_cd(host);
spin_lock_irqsave(&host->lock, flags);
host->mrq = mrq;
- /*
- * Firstly check card presence from cd-gpio. The return could
- * be one of the following possibilities:
- * negative: cd-gpio is not available
- * zero: cd-gpio is used, and card is removed
- * one: cd-gpio is used, and card is present
- */
- if (present < 0) {
- /* If polling, assume that the card is always present. */
- if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
- present = 1;
- else
- present = sdhci_readl(host, SDHCI_PRESENT_STATE) &
- SDHCI_CARD_PRESENT;
- }
-
if (!present || host->flags & SDHCI_DEVICE_DEAD) {
host->mrq->cmd->error = -ENOMEDIUM;
tasklet_schedule(&host->finish_tasklet);
/* Auto-CMD23 stuff only works in ADMA or PIO. */
if ((host->version >= SDHCI_SPEC_300) &&
((host->flags & SDHCI_USE_ADMA) ||
- !(host->flags & SDHCI_USE_SDMA))) {
+ !(host->flags & SDHCI_USE_SDMA)) &&
+ !(host->quirks2 & SDHCI_QUIRK2_ACMD23_BROKEN)) {
host->flags |= SDHCI_AUTO_CMD23;
DBG("%s: Auto-CMD23 available\n", mmc_hostname(mmc));
} else {
#include <linux/types.h>
#include <linux/io.h>
-#include <linux/mmc/sdhci.h>
+#include <linux/mmc/host.h>
/*
* Controller registers
*/
#define SDHCI_MAX_SEGS 128
+struct sdhci_host_next {
+ unsigned int sg_count;
+ s32 cookie;
+};
+
+struct sdhci_host {
+ /* Data set by hardware interface driver */
+ const char *hw_name; /* Hardware bus name */
+
+ unsigned int quirks; /* Deviations from spec. */
+
+/* Controller doesn't honor resets unless we touch the clock register */
+#define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0)
+/* Controller has bad caps bits, but really supports DMA */
+#define SDHCI_QUIRK_FORCE_DMA (1<<1)
+/* Controller doesn't like to be reset when there is no card inserted. */
+#define SDHCI_QUIRK_NO_CARD_NO_RESET (1<<2)
+/* Controller doesn't like clearing the power reg before a change */
+#define SDHCI_QUIRK_SINGLE_POWER_WRITE (1<<3)
+/* Controller has flaky internal state so reset it on each ios change */
+#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS (1<<4)
+/* Controller has an unusable DMA engine */
+#define SDHCI_QUIRK_BROKEN_DMA (1<<5)
+/* Controller has an unusable ADMA engine */
+#define SDHCI_QUIRK_BROKEN_ADMA (1<<6)
+/* Controller can only DMA from 32-bit aligned addresses */
+#define SDHCI_QUIRK_32BIT_DMA_ADDR (1<<7)
+/* Controller can only DMA chunk sizes that are a multiple of 32 bits */
+#define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<8)
+/* Controller can only ADMA chunks that are a multiple of 32 bits */
+#define SDHCI_QUIRK_32BIT_ADMA_SIZE (1<<9)
+/* Controller needs to be reset after each request to stay stable */
+#define SDHCI_QUIRK_RESET_AFTER_REQUEST (1<<10)
+/* Controller needs voltage and power writes to happen separately */
+#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER (1<<11)
+/* Controller provides an incorrect timeout value for transfers */
+#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL (1<<12)
+/* Controller has an issue with buffer bits for small transfers */
+#define SDHCI_QUIRK_BROKEN_SMALL_PIO (1<<13)
+/* Controller does not provide transfer-complete interrupt when not busy */
+#define SDHCI_QUIRK_NO_BUSY_IRQ (1<<14)
+/* Controller has unreliable card detection */
+#define SDHCI_QUIRK_BROKEN_CARD_DETECTION (1<<15)
+/* Controller reports inverted write-protect state */
+#define SDHCI_QUIRK_INVERTED_WRITE_PROTECT (1<<16)
+/* Controller does not like fast PIO transfers */
+#define SDHCI_QUIRK_PIO_NEEDS_DELAY (1<<18)
+/* Controller has to be forced to use block size of 2048 bytes */
+#define SDHCI_QUIRK_FORCE_BLK_SZ_2048 (1<<20)
+/* Controller cannot do multi-block transfers */
+#define SDHCI_QUIRK_NO_MULTIBLOCK (1<<21)
+/* Controller can only handle 1-bit data transfers */
+#define SDHCI_QUIRK_FORCE_1_BIT_DATA (1<<22)
+/* Controller needs 10ms delay between applying power and clock */
+#define SDHCI_QUIRK_DELAY_AFTER_POWER (1<<23)
+/* Controller uses SDCLK instead of TMCLK for data timeouts */
+#define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK (1<<24)
+/* Controller reports wrong base clock capability */
+#define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN (1<<25)
+/* Controller cannot support End Attribute in NOP ADMA descriptor */
+#define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC (1<<26)
+/* Controller is missing device caps. Use caps provided by host */
+#define SDHCI_QUIRK_MISSING_CAPS (1<<27)
+/* Controller uses Auto CMD12 command to stop the transfer */
+#define SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 (1<<28)
+/* Controller doesn't have HISPD bit field in HI-SPEED SD card */
+#define SDHCI_QUIRK_NO_HISPD_BIT (1<<29)
+/* Controller treats ADMA descriptors with length 0000h incorrectly */
+#define SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC (1<<30)
+/* The read-only detection via SDHCI_PRESENT_STATE register is unstable */
+#define SDHCI_QUIRK_UNSTABLE_RO_DETECT (1<<31)
+
+ unsigned int quirks2; /* More deviations from spec. */
+
+#define SDHCI_QUIRK2_HOST_OFF_CARD_ON (1<<0)
+#define SDHCI_QUIRK2_HOST_NO_CMD23 (1<<1)
+/* The system physically doesn't support 1.8v, even if the host does */
+#define SDHCI_QUIRK2_NO_1_8_V (1<<2)
+#define SDHCI_QUIRK2_PRESET_VALUE_BROKEN (1<<3)
+#define SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON (1<<4)
+/* Controller has a non-standard host control register */
+#define SDHCI_QUIRK2_BROKEN_HOST_CONTROL (1<<5)
+/* Controller does not support HS200 */
+#define SDHCI_QUIRK2_BROKEN_HS200 (1<<6)
+/* Controller does not support DDR50 */
+#define SDHCI_QUIRK2_BROKEN_DDR50 (1<<7)
+/* Stop command (CMD12) can set Transfer Complete when not using MMC_RSP_BUSY */
+#define SDHCI_QUIRK2_STOP_WITH_TC (1<<8)
+/* Controller does not support 64-bit DMA */
+#define SDHCI_QUIRK2_BROKEN_64_BIT_DMA (1<<9)
+/* need clear transfer mode register before send cmd */
+#define SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD (1<<10)
+/* Capability register bit-63 indicates HS400 support */
+#define SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 (1<<11)
+/* forced tuned clock */
+#define SDHCI_QUIRK2_TUNING_WORK_AROUND (1<<12)
+/* disable the block count for single block transactions */
+#define SDHCI_QUIRK2_SUPPORT_SINGLE (1<<13)
+/* Controller broken with using ACMD23 */
+#define SDHCI_QUIRK2_ACMD23_BROKEN (1<<14)
+
+ int irq; /* Device IRQ */
+ void __iomem *ioaddr; /* Mapped address */
+
+ const struct sdhci_ops *ops; /* Low level hw interface */
+
+ /* Internal data */
+ struct mmc_host *mmc; /* MMC structure */
+ u64 dma_mask; /* custom DMA mask */
+
+#if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE)
+ struct led_classdev led; /* LED control */
+ char led_name[32];
+#endif
+
+ spinlock_t lock; /* Mutex */
+
+ int flags; /* Host attributes */
+#define SDHCI_USE_SDMA (1<<0) /* Host is SDMA capable */
+#define SDHCI_USE_ADMA (1<<1) /* Host is ADMA capable */
+#define SDHCI_REQ_USE_DMA (1<<2) /* Use DMA for this req. */
+#define SDHCI_DEVICE_DEAD (1<<3) /* Device unresponsive */
+#define SDHCI_SDR50_NEEDS_TUNING (1<<4) /* SDR50 needs tuning */
+#define SDHCI_NEEDS_RETUNING (1<<5) /* Host needs retuning */
+#define SDHCI_AUTO_CMD12 (1<<6) /* Auto CMD12 support */
+#define SDHCI_AUTO_CMD23 (1<<7) /* Auto CMD23 support */
+#define SDHCI_PV_ENABLED (1<<8) /* Preset value enabled */
+#define SDHCI_SDIO_IRQ_ENABLED (1<<9) /* SDIO irq enabled */
+#define SDHCI_SDR104_NEEDS_TUNING (1<<10) /* SDR104/HS200 needs tuning */
+#define SDHCI_USING_RETUNING_TIMER (1<<11) /* Host is using a retuning timer for the card */
+#define SDHCI_USE_64_BIT_DMA (1<<12) /* Use 64-bit DMA */
+#define SDHCI_HS400_TUNING (1<<13) /* Tuning for HS400 */
+
+ unsigned int version; /* SDHCI spec. version */
+
+ unsigned int max_clk; /* Max possible freq (MHz) */
+ unsigned int timeout_clk; /* Timeout freq (KHz) */
+ unsigned int clk_mul; /* Clock Muliplier value */
+
+ unsigned int clock; /* Current clock (MHz) */
+ u8 pwr; /* Current voltage */
+
+ bool runtime_suspended; /* Host is runtime suspended */
+ bool bus_on; /* Bus power prevents runtime suspend */
+ bool preset_enabled; /* Preset is enabled */
+
+ struct mmc_request *mrq; /* Current request */
+ struct mmc_command *cmd; /* Current command */
+ struct mmc_data *data; /* Current data request */
+ unsigned int data_early:1; /* Data finished before cmd */
+ unsigned int busy_handle:1; /* Handling the order of Busy-end */
+
+ struct sg_mapping_iter sg_miter; /* SG state for PIO */
+ unsigned int blocks; /* remaining PIO blocks */
+
+ int sg_count; /* Mapped sg entries */
+
+ void *adma_table; /* ADMA descriptor table */
+ void *align_buffer; /* Bounce buffer */
+
+ size_t adma_table_sz; /* ADMA descriptor table size */
+ size_t align_buffer_sz; /* Bounce buffer size */
+
+ dma_addr_t adma_addr; /* Mapped ADMA descr. table */
+ dma_addr_t align_addr; /* Mapped bounce buffer */
+
+ unsigned int desc_sz; /* ADMA descriptor size */
+ unsigned int align_sz; /* ADMA alignment */
+ unsigned int align_mask; /* ADMA alignment mask */
+
+ struct tasklet_struct finish_tasklet; /* Tasklet structures */
+
+ struct timer_list timer; /* Timer for timeouts */
+
+ u32 caps; /* Alternative CAPABILITY_0 */
+ u32 caps1; /* Alternative CAPABILITY_1 */
+
+ unsigned int ocr_avail_sdio; /* OCR bit masks */
+ unsigned int ocr_avail_sd;
+ unsigned int ocr_avail_mmc;
+ u32 ocr_mask; /* available voltages */
+
+ unsigned timing; /* Current timing */
+
+ u32 thread_isr;
+
+ /* cached registers */
+ u32 ier;
+
+ wait_queue_head_t buf_ready_int; /* Waitqueue for Buffer Read Ready interrupt */
+ unsigned int tuning_done; /* Condition flag set when CMD19 succeeds */
+
+ unsigned int tuning_count; /* Timer count for re-tuning */
+ unsigned int tuning_mode; /* Re-tuning mode supported by host */
+#define SDHCI_TUNING_MODE_1 0
+ struct timer_list tuning_timer; /* Timer for tuning */
+
+ struct sdhci_host_next next_data;
+ unsigned long private[0] ____cacheline_aligned;
+};
+
struct sdhci_ops {
#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
u32 (*read_l)(struct sdhci_host *host, int reg);
struct mmc_command *cmd = mrq->cmd;
u32 opc = cmd->opcode;
u32 mask;
+ unsigned long flags;
switch (opc) {
/* response busy check */
/* set arg */
sh_mmcif_writel(host->addr, MMCIF_CE_ARG, cmd->arg);
/* set cmd */
+ spin_lock_irqsave(&host->lock, flags);
sh_mmcif_writel(host->addr, MMCIF_CE_CMD_SET, opc);
host->wait_for = MMCIF_WAIT_FOR_CMD;
schedule_delayed_work(&host->timeout_work, host->timeout);
+ spin_unlock_irqrestore(&host->lock, flags);
}
static void sh_mmcif_stop_cmd(struct sh_mmcif_host *host,
struct sh_mmcif_host *host = dev_id;
struct mmc_request *mrq;
bool wait = false;
+ unsigned long flags;
+ int wait_work;
+
+ spin_lock_irqsave(&host->lock, flags);
+ wait_work = host->wait_for;
+ spin_unlock_irqrestore(&host->lock, flags);
cancel_delayed_work_sync(&host->timeout_work);
* All handlers return true, if processing continues, and false, if the
* request has to be completed - successfully or not
*/
- switch (host->wait_for) {
+ switch (wait_work) {
case MMCIF_WAIT_FOR_REQUEST:
/* We're too late, the timeout has already kicked in */
mutex_unlock(&host->thread_lock);
/* Don't run after mmc_remove_host() */
return;
- dev_err(&host->pd->dev, "Timeout waiting for %u on CMD%u\n",
- host->wait_for, mrq->cmd->opcode);
-
spin_lock_irqsave(&host->lock, flags);
if (host->state == STATE_IDLE) {
spin_unlock_irqrestore(&host->lock, flags);
return;
}
+ dev_err(&host->pd->dev, "Timeout waiting for %u on CMD%u\n",
+ host->wait_for, mrq->cmd->opcode);
+
host->state = STATE_TIMEOUT;
spin_unlock_irqrestore(&host->lock, flags);
struct mmc_data *data)
{
struct sunxi_idma_des *pdes = (struct sunxi_idma_des *)host->sg_cpu;
- struct sunxi_idma_des *pdes_pa = (struct sunxi_idma_des *)host->sg_dma;
+ dma_addr_t next_desc = host->sg_dma;
int i, max_len = (1 << host->idma_des_size_bits);
for (i = 0; i < data->sg_len; i++) {
else
pdes[i].buf_size = data->sg[i].length;
+ next_desc += sizeof(struct sunxi_idma_des);
pdes[i].buf_addr_ptr1 = sg_dma_address(&data->sg[i]);
- pdes[i].buf_addr_ptr2 = (u32)&pdes_pa[i + 1];
+ pdes[i].buf_addr_ptr2 = (u32)next_desc;
}
pdes[0].config |= SDXC_IDMAC_DES0_FD;
return PTR_ERR(host->clk_sample);
}
- host->reset = devm_reset_control_get(&pdev->dev, "ahb");
+ host->reset = devm_reset_control_get_optional(&pdev->dev, "ahb");
+ if (PTR_ERR(host->reset) == -EPROBE_DEFER)
+ return PTR_ERR(host->reset);
ret = clk_prepare_enable(host->clk_ahb);
if (ret) {
mmc->f_min = 400000;
mmc->f_max = 50000000;
mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
- MMC_CAP_ERASE;
+ MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ;
ret = mmc_of_parse(mmc);
if (ret)
void tmio_mmc_host_free(struct tmio_mmc_host *host)
{
mmc_free_host(host->mmc);
-
- host->mmc = NULL;
}
EXPORT_SYMBOL(tmio_mmc_host_free);
.max_blk_size = 2048,
};
-static struct of_device_id wmt_mci_dt_ids[] = {
+static const struct of_device_id wmt_mci_dt_ids[] = {
{ .compatible = "wm,wm8505-sdhc", .data = &wm8505_caps },
{ /* Sentinel */ },
};
mask = MX28_BF_GPMI_STAT_READY_BUSY(1 << chip);
reg = readl(r->gpmi_regs + HW_GPMI_STAT);
} else
- dev_err(this->dev, "unknow arch.\n");
+ dev_err(this->dev, "unknown arch.\n");
return reg & mask;
}
hisi_nfc_host_init(host);
- ret = devm_request_irq(dev, irq, hinfc_irq_handle, IRQF_DISABLED,
- "nandc", host);
+ ret = devm_request_irq(dev, irq, hinfc_irq_handle, 0x0, "nandc", host);
if (ret) {
dev_err(dev, "failed to request IRQ\n");
goto err_res;
mc = kzalloc(mc_num * sizeof(struct bnx2x_mcast_list_elem),
GFP_KERNEL);
if (!mc) {
- BNX2X_ERR("Cannot Configure mulicasts due to lack of memory\n");
+ BNX2X_ERR("Cannot Configure multicasts due to lack of memory\n");
return -ENOMEM;
}
}
if (rv)
netdev_err(adapter->netdev,
- "Failed to set Rx coalescing parametrs\n");
+ "Failed to set Rx coalescing parameters\n");
return rv;
}
trigger = CAL_TRIGGER;
cal_gpio = 1 + ptp_find_pin(clock->ptp_clock, PTP_PF_PHYSYNC, 0);
if (cal_gpio < 1) {
- pr_err("PHY calibration pin not avaible - PHY is not calibrated.");
+ pr_err("PHY calibration pin not available - PHY is not calibrated.");
return;
}
airo_print_dbg(devname, "link lost (TSF sync lost)");
break;
default:
- airo_print_dbg(devname, "unknow status %x\n", status);
+ airo_print_dbg(devname, "unknown status %x\n", status);
break;
}
break;
case STAT_REASSOC:
break;
default:
- airo_print_dbg(devname, "unknow status %x\n", status);
+ airo_print_dbg(devname, "unknown status %x\n", status);
break;
}
}
bw = WMI_PEER_CHWIDTH_80MHZ;
break;
case IEEE80211_STA_RX_BW_160:
- ath10k_warn(ar, "Invalid bandwith %d in rc update for %pM\n",
+ ath10k_warn(ar, "Invalid bandwidth %d in rc update for %pM\n",
sta->bandwidth, sta->addr);
bw = WMI_PEER_CHWIDTH_20MHZ;
break;
} else if (packet_type == WCN36XX_HAL_KEEP_ALIVE_UNSOLICIT_ARP_RSP) {
/* TODO: it also support ARP response type */
} else {
- wcn36xx_warn("unknow keep alive packet type %d\n", packet_type);
+ wcn36xx_warn("unknown keep alive packet type %d\n", packet_type);
ret = -EINVAL;
goto out;
}
--- /dev/null
+/*
+ * Copyright (c) 2011 Broadcom Corporation
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#if !defined(__TRACE_BRCMSMAC_H) || defined(TRACE_HEADER_MULTI_READ)
+#define __TRACE_BRCMSMAC_H
+
+#include <linux/tracepoint.h>
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM brcmsmac
+
+/*
+ * We define a tracepoint, its arguments, its printk format and its
+ * 'fast binary record' layout.
+ */
+TRACE_EVENT(brcms_timer,
+ /* TPPROTO is the prototype of the function called by this tracepoint */
+ TP_PROTO(struct brcms_timer *t),
+ /*
+ * TPARGS(firstarg, p) are the parameters names, same as found in the
+ * prototype.
+ */
+ TP_ARGS(t),
+ /*
+ * Fast binary tracing: define the trace record via TP_STRUCT__entry().
+ * You can think about it like a regular C structure local variable
+ * definition.
+ */
+ TP_STRUCT__entry(
+ __field(uint, ms)
+ __field(uint, set)
+ __field(uint, periodic)
+ ),
+ TP_fast_assign(
+ __entry->ms = t->ms;
+ __entry->set = t->set;
+ __entry->periodic = t->periodic;
+ ),
+ TP_printk(
+ "ms=%u set=%u periodic=%u",
+ __entry->ms, __entry->set, __entry->periodic
+ )
+);
+
+TRACE_EVENT(brcms_dpc,
+ TP_PROTO(unsigned long data),
+ TP_ARGS(data),
+ TP_STRUCT__entry(
+ __field(unsigned long, data)
+ ),
+ TP_fast_assign(
+ __entry->data = data;
+ ),
+ TP_printk(
+ "data=%p",
+ (void *)__entry->data
+ )
+);
+
+TRACE_EVENT(brcms_macintstatus,
+ TP_PROTO(const struct device *dev, int in_isr, u32 macintstatus,
+ u32 mask),
+ TP_ARGS(dev, in_isr, macintstatus, mask),
+ TP_STRUCT__entry(
+ __string(dev, dev_name(dev))
+ __field(int, in_isr)
+ __field(u32, macintstatus)
+ __field(u32, mask)
+ ),
+ TP_fast_assign(
+ __assign_str(dev, dev_name(dev));
+ __entry->in_isr = in_isr;
+ __entry->macintstatus = macintstatus;
+ __entry->mask = mask;
+ ),
+ TP_printk("[%s] in_isr=%d macintstatus=%#x mask=%#x", __get_str(dev),
+ __entry->in_isr, __entry->macintstatus, __entry->mask)
+);
+#endif /* __TRACE_BRCMSMAC_H */
+
+#ifdef CONFIG_BRCM_TRACING
+
+#undef TRACE_INCLUDE_PATH
+#define TRACE_INCLUDE_PATH .
+#undef TRACE_INCLUDE_FILE
+#define TRACE_INCLUDE_FILE brcms_trace_brcmsmac
+#include <trace/define_trace.h>
+
+#endif /* CONFIG_BRCM_TRACING */
--- /dev/null
+/*
+ * Copyright (c) 2011 Broadcom Corporation
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#if !defined(__TRACE_BRCMSMAC_MSG_H) || defined(TRACE_HEADER_MULTI_READ)
+#define __TRACE_BRCMSMAC_MSG_H
+
+#include <linux/tracepoint.h>
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM brcmsmac_msg
+
+#define MAX_MSG_LEN 100
+
+DECLARE_EVENT_CLASS(brcms_msg_event,
+ TP_PROTO(struct va_format *vaf),
+ TP_ARGS(vaf),
+ TP_STRUCT__entry(
+ __dynamic_array(char, msg, MAX_MSG_LEN)
+ ),
+ TP_fast_assign(
+ WARN_ON_ONCE(vsnprintf(__get_dynamic_array(msg),
+ MAX_MSG_LEN, vaf->fmt,
+ *vaf->va) >= MAX_MSG_LEN);
+ ),
+ TP_printk("%s", __get_str(msg))
+);
+
+DEFINE_EVENT(brcms_msg_event, brcms_info,
+ TP_PROTO(struct va_format *vaf),
+ TP_ARGS(vaf)
+);
+
+DEFINE_EVENT(brcms_msg_event, brcms_warn,
+ TP_PROTO(struct va_format *vaf),
+ TP_ARGS(vaf)
+);
+
+DEFINE_EVENT(brcms_msg_event, brcms_err,
+ TP_PROTO(struct va_format *vaf),
+ TP_ARGS(vaf)
+);
+
+DEFINE_EVENT(brcms_msg_event, brcms_crit,
+ TP_PROTO(struct va_format *vaf),
+ TP_ARGS(vaf)
+);
+
+TRACE_EVENT(brcms_dbg,
+ TP_PROTO(u32 level, const char *func, struct va_format *vaf),
+ TP_ARGS(level, func, vaf),
+ TP_STRUCT__entry(
+ __field(u32, level)
+ __string(func, func)
+ __dynamic_array(char, msg, MAX_MSG_LEN)
+ ),
+ TP_fast_assign(
+ __entry->level = level;
+ __assign_str(func, func);
+ WARN_ON_ONCE(vsnprintf(__get_dynamic_array(msg),
+ MAX_MSG_LEN, vaf->fmt,
+ *vaf->va) >= MAX_MSG_LEN);
+ ),
+ TP_printk("%s: %s", __get_str(func), __get_str(msg))
+);
+#endif /* __TRACE_BRCMSMAC_MSG_H */
+
+#ifdef CONFIG_BRCM_TRACING
+
+#undef TRACE_INCLUDE_PATH
+#define TRACE_INCLUDE_PATH .
+#undef TRACE_INCLUDE_FILE
+#define TRACE_INCLUDE_FILE brcms_trace_brcmsmac_msg
+#include <trace/define_trace.h>
+
+#endif /* CONFIG_BRCM_TRACING */
--- /dev/null
+/*
+ * Copyright (c) 2011 Broadcom Corporation
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#if !defined(__TRACE_BRCMSMAC_TX_H) || defined(TRACE_HEADER_MULTI_READ)
+#define __TRACE_BRCMSMAC_TX_H
+
+#include <linux/tracepoint.h>
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM brcmsmac_tx
+
+TRACE_EVENT(brcms_txdesc,
+ TP_PROTO(const struct device *dev,
+ void *txh, size_t txh_len),
+ TP_ARGS(dev, txh, txh_len),
+ TP_STRUCT__entry(
+ __string(dev, dev_name(dev))
+ __dynamic_array(u8, txh, txh_len)
+ ),
+ TP_fast_assign(
+ __assign_str(dev, dev_name(dev));
+ memcpy(__get_dynamic_array(txh), txh, txh_len);
+ ),
+ TP_printk("[%s] txdesc", __get_str(dev))
+);
+
+TRACE_EVENT(brcms_txstatus,
+ TP_PROTO(const struct device *dev, u16 framelen, u16 frameid,
+ u16 status, u16 lasttxtime, u16 sequence, u16 phyerr,
+ u16 ackphyrxsh),
+ TP_ARGS(dev, framelen, frameid, status, lasttxtime, sequence, phyerr,
+ ackphyrxsh),
+ TP_STRUCT__entry(
+ __string(dev, dev_name(dev))
+ __field(u16, framelen)
+ __field(u16, frameid)
+ __field(u16, status)
+ __field(u16, lasttxtime)
+ __field(u16, sequence)
+ __field(u16, phyerr)
+ __field(u16, ackphyrxsh)
+ ),
+ TP_fast_assign(
+ __assign_str(dev, dev_name(dev));
+ __entry->framelen = framelen;
+ __entry->frameid = frameid;
+ __entry->status = status;
+ __entry->lasttxtime = lasttxtime;
+ __entry->sequence = sequence;
+ __entry->phyerr = phyerr;
+ __entry->ackphyrxsh = ackphyrxsh;
+ ),
+ TP_printk("[%s] FrameId %#04x TxStatus %#04x LastTxTime %#04x "
+ "Seq %#04x PHYTxStatus %#04x RxAck %#04x",
+ __get_str(dev), __entry->frameid, __entry->status,
+ __entry->lasttxtime, __entry->sequence, __entry->phyerr,
+ __entry->ackphyrxsh)
+);
+
+TRACE_EVENT(brcms_ampdu_session,
+ TP_PROTO(const struct device *dev, unsigned max_ampdu_len,
+ u16 max_ampdu_frames, u16 ampdu_len, u16 ampdu_frames,
+ u16 dma_len),
+ TP_ARGS(dev, max_ampdu_len, max_ampdu_frames, ampdu_len, ampdu_frames,
+ dma_len),
+ TP_STRUCT__entry(
+ __string(dev, dev_name(dev))
+ __field(unsigned, max_ampdu_len)
+ __field(u16, max_ampdu_frames)
+ __field(u16, ampdu_len)
+ __field(u16, ampdu_frames)
+ __field(u16, dma_len)
+ ),
+ TP_fast_assign(
+ __assign_str(dev, dev_name(dev));
+ __entry->max_ampdu_len = max_ampdu_len;
+ __entry->max_ampdu_frames = max_ampdu_frames;
+ __entry->ampdu_len = ampdu_len;
+ __entry->ampdu_frames = ampdu_frames;
+ __entry->dma_len = dma_len;
+ ),
+ TP_printk("[%s] ampdu session max_len=%u max_frames=%u len=%u frames=%u dma_len=%u",
+ __get_str(dev), __entry->max_ampdu_len,
+ __entry->max_ampdu_frames, __entry->ampdu_len,
+ __entry->ampdu_frames, __entry->dma_len)
+);
+#endif /* __TRACE_BRCMSMAC_TX_H */
+
+#ifdef CONFIG_BRCM_TRACING
+
+#undef TRACE_INCLUDE_PATH
+#define TRACE_INCLUDE_PATH .
+#undef TRACE_INCLUDE_FILE
+#define TRACE_INCLUDE_FILE brcms_trace_brcmsmac_tx
+#include <trace/define_trace.h>
+
+#endif /* CONFIG_BRCM_TRACING */
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#if !defined(__TRACE_BRCMSMAC_H) || defined(TRACE_HEADER_MULTI_READ)
-
-#define __TRACE_BRCMSMAC_H
+#ifndef __BRCMS_TRACE_EVENTS_H
+#define __BRCMS_TRACE_EVENTS_H
#include <linux/types.h>
#include <linux/device.h>
static inline void trace_ ## name(proto) {}
#endif
-#undef TRACE_SYSTEM
-#define TRACE_SYSTEM brcmsmac
-
-/*
- * We define a tracepoint, its arguments, its printk format and its
- * 'fast binary record' layout.
- */
-TRACE_EVENT(brcms_timer,
- /* TPPROTO is the prototype of the function called by this tracepoint */
- TP_PROTO(struct brcms_timer *t),
- /*
- * TPARGS(firstarg, p) are the parameters names, same as found in the
- * prototype.
- */
- TP_ARGS(t),
- /*
- * Fast binary tracing: define the trace record via TP_STRUCT__entry().
- * You can think about it like a regular C structure local variable
- * definition.
- */
- TP_STRUCT__entry(
- __field(uint, ms)
- __field(uint, set)
- __field(uint, periodic)
- ),
- TP_fast_assign(
- __entry->ms = t->ms;
- __entry->set = t->set;
- __entry->periodic = t->periodic;
- ),
- TP_printk(
- "ms=%u set=%u periodic=%u",
- __entry->ms, __entry->set, __entry->periodic
- )
-);
-
-TRACE_EVENT(brcms_dpc,
- TP_PROTO(unsigned long data),
- TP_ARGS(data),
- TP_STRUCT__entry(
- __field(unsigned long, data)
- ),
- TP_fast_assign(
- __entry->data = data;
- ),
- TP_printk(
- "data=%p",
- (void *)__entry->data
- )
-);
-
-TRACE_EVENT(brcms_macintstatus,
- TP_PROTO(const struct device *dev, int in_isr, u32 macintstatus,
- u32 mask),
- TP_ARGS(dev, in_isr, macintstatus, mask),
- TP_STRUCT__entry(
- __string(dev, dev_name(dev))
- __field(int, in_isr)
- __field(u32, macintstatus)
- __field(u32, mask)
- ),
- TP_fast_assign(
- __assign_str(dev, dev_name(dev));
- __entry->in_isr = in_isr;
- __entry->macintstatus = macintstatus;
- __entry->mask = mask;
- ),
- TP_printk("[%s] in_isr=%d macintstatus=%#x mask=%#x", __get_str(dev),
- __entry->in_isr, __entry->macintstatus, __entry->mask)
-);
-
-#undef TRACE_SYSTEM
-#define TRACE_SYSTEM brcmsmac_tx
-
-TRACE_EVENT(brcms_txdesc,
- TP_PROTO(const struct device *dev,
- void *txh, size_t txh_len),
- TP_ARGS(dev, txh, txh_len),
- TP_STRUCT__entry(
- __string(dev, dev_name(dev))
- __dynamic_array(u8, txh, txh_len)
- ),
- TP_fast_assign(
- __assign_str(dev, dev_name(dev));
- memcpy(__get_dynamic_array(txh), txh, txh_len);
- ),
- TP_printk("[%s] txdesc", __get_str(dev))
-);
-
-TRACE_EVENT(brcms_txstatus,
- TP_PROTO(const struct device *dev, u16 framelen, u16 frameid,
- u16 status, u16 lasttxtime, u16 sequence, u16 phyerr,
- u16 ackphyrxsh),
- TP_ARGS(dev, framelen, frameid, status, lasttxtime, sequence, phyerr,
- ackphyrxsh),
- TP_STRUCT__entry(
- __string(dev, dev_name(dev))
- __field(u16, framelen)
- __field(u16, frameid)
- __field(u16, status)
- __field(u16, lasttxtime)
- __field(u16, sequence)
- __field(u16, phyerr)
- __field(u16, ackphyrxsh)
- ),
- TP_fast_assign(
- __assign_str(dev, dev_name(dev));
- __entry->framelen = framelen;
- __entry->frameid = frameid;
- __entry->status = status;
- __entry->lasttxtime = lasttxtime;
- __entry->sequence = sequence;
- __entry->phyerr = phyerr;
- __entry->ackphyrxsh = ackphyrxsh;
- ),
- TP_printk("[%s] FrameId %#04x TxStatus %#04x LastTxTime %#04x "
- "Seq %#04x PHYTxStatus %#04x RxAck %#04x",
- __get_str(dev), __entry->frameid, __entry->status,
- __entry->lasttxtime, __entry->sequence, __entry->phyerr,
- __entry->ackphyrxsh)
-);
-
-TRACE_EVENT(brcms_ampdu_session,
- TP_PROTO(const struct device *dev, unsigned max_ampdu_len,
- u16 max_ampdu_frames, u16 ampdu_len, u16 ampdu_frames,
- u16 dma_len),
- TP_ARGS(dev, max_ampdu_len, max_ampdu_frames, ampdu_len, ampdu_frames,
- dma_len),
- TP_STRUCT__entry(
- __string(dev, dev_name(dev))
- __field(unsigned, max_ampdu_len)
- __field(u16, max_ampdu_frames)
- __field(u16, ampdu_len)
- __field(u16, ampdu_frames)
- __field(u16, dma_len)
- ),
- TP_fast_assign(
- __assign_str(dev, dev_name(dev));
- __entry->max_ampdu_len = max_ampdu_len;
- __entry->max_ampdu_frames = max_ampdu_frames;
- __entry->ampdu_len = ampdu_len;
- __entry->ampdu_frames = ampdu_frames;
- __entry->dma_len = dma_len;
- ),
- TP_printk("[%s] ampdu session max_len=%u max_frames=%u len=%u frames=%u dma_len=%u",
- __get_str(dev), __entry->max_ampdu_len,
- __entry->max_ampdu_frames, __entry->ampdu_len,
- __entry->ampdu_frames, __entry->dma_len)
-);
-
-#undef TRACE_SYSTEM
-#define TRACE_SYSTEM brcmsmac_msg
-
-#define MAX_MSG_LEN 100
-
-DECLARE_EVENT_CLASS(brcms_msg_event,
- TP_PROTO(struct va_format *vaf),
- TP_ARGS(vaf),
- TP_STRUCT__entry(
- __dynamic_array(char, msg, MAX_MSG_LEN)
- ),
- TP_fast_assign(
- WARN_ON_ONCE(vsnprintf(__get_dynamic_array(msg),
- MAX_MSG_LEN, vaf->fmt,
- *vaf->va) >= MAX_MSG_LEN);
- ),
- TP_printk("%s", __get_str(msg))
-);
-
-DEFINE_EVENT(brcms_msg_event, brcms_info,
- TP_PROTO(struct va_format *vaf),
- TP_ARGS(vaf)
-);
-
-DEFINE_EVENT(brcms_msg_event, brcms_warn,
- TP_PROTO(struct va_format *vaf),
- TP_ARGS(vaf)
-);
-
-DEFINE_EVENT(brcms_msg_event, brcms_err,
- TP_PROTO(struct va_format *vaf),
- TP_ARGS(vaf)
-);
-
-DEFINE_EVENT(brcms_msg_event, brcms_crit,
- TP_PROTO(struct va_format *vaf),
- TP_ARGS(vaf)
-);
-
-TRACE_EVENT(brcms_dbg,
- TP_PROTO(u32 level, const char *func, struct va_format *vaf),
- TP_ARGS(level, func, vaf),
- TP_STRUCT__entry(
- __field(u32, level)
- __string(func, func)
- __dynamic_array(char, msg, MAX_MSG_LEN)
- ),
- TP_fast_assign(
- __entry->level = level;
- __assign_str(func, func);
- WARN_ON_ONCE(vsnprintf(__get_dynamic_array(msg),
- MAX_MSG_LEN, vaf->fmt,
- *vaf->va) >= MAX_MSG_LEN);
- ),
- TP_printk("%s: %s", __get_str(func), __get_str(msg))
-);
+#include "brcms_trace_brcmsmac.h"
+#include "brcms_trace_brcmsmac_tx.h"
+#include "brcms_trace_brcmsmac_msg.h"
#endif /* __TRACE_BRCMSMAC_H */
-
-#ifdef CONFIG_BRCM_TRACING
-
-#undef TRACE_INCLUDE_PATH
-#define TRACE_INCLUDE_PATH .
-#undef TRACE_INCLUDE_FILE
-#define TRACE_INCLUDE_FILE brcms_trace_events
-
-#include <trace/define_trace.h>
-
-#endif /* CONFIG_BRCM_TRACING */
--- /dev/null
+/******************************************************************************
+ *
+ * Copyright(c) 2009 - 2014 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * Intel Linux Wireless <ilw@linux.intel.com>
+ * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+ *
+ *****************************************************************************/
+
+#if !defined(__IWLWIFI_DEVICE_TRACE_DATA) || defined(TRACE_HEADER_MULTI_READ)
+#define __IWLWIFI_DEVICE_TRACE_DATA
+
+#include <linux/tracepoint.h>
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM iwlwifi_data
+
+TRACE_EVENT(iwlwifi_dev_tx_data,
+ TP_PROTO(const struct device *dev,
+ struct sk_buff *skb,
+ void *data, size_t data_len),
+ TP_ARGS(dev, skb, data, data_len),
+ TP_STRUCT__entry(
+ DEV_ENTRY
+
+ __dynamic_array(u8, data, iwl_trace_data(skb) ? data_len : 0)
+ ),
+ TP_fast_assign(
+ DEV_ASSIGN;
+ if (iwl_trace_data(skb))
+ memcpy(__get_dynamic_array(data), data, data_len);
+ ),
+ TP_printk("[%s] TX frame data", __get_str(dev))
+);
+
+TRACE_EVENT(iwlwifi_dev_rx_data,
+ TP_PROTO(const struct device *dev,
+ const struct iwl_trans *trans,
+ void *rxbuf, size_t len),
+ TP_ARGS(dev, trans, rxbuf, len),
+ TP_STRUCT__entry(
+ DEV_ENTRY
+
+ __dynamic_array(u8, data,
+ len - iwl_rx_trace_len(trans, rxbuf, len))
+ ),
+ TP_fast_assign(
+ size_t offs = iwl_rx_trace_len(trans, rxbuf, len);
+ DEV_ASSIGN;
+ if (offs < len)
+ memcpy(__get_dynamic_array(data),
+ ((u8 *)rxbuf) + offs, len - offs);
+ ),
+ TP_printk("[%s] RX frame data", __get_str(dev))
+);
+#endif /* __IWLWIFI_DEVICE_TRACE_DATA */
+
+#undef TRACE_INCLUDE_PATH
+#define TRACE_INCLUDE_PATH .
+#undef TRACE_INCLUDE_FILE
+#define TRACE_INCLUDE_FILE iwl-devtrace-data
+#include <trace/define_trace.h>
--- /dev/null
+/******************************************************************************
+ *
+ * Copyright(c) 2009 - 2014 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * Intel Linux Wireless <ilw@linux.intel.com>
+ * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+ *
+ *****************************************************************************/
+
+#if !defined(__IWLWIFI_DEVICE_TRACE_IO) || defined(TRACE_HEADER_MULTI_READ)
+#define __IWLWIFI_DEVICE_TRACE_IO
+
+#include <linux/tracepoint.h>
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM iwlwifi_io
+
+TRACE_EVENT(iwlwifi_dev_ioread32,
+ TP_PROTO(const struct device *dev, u32 offs, u32 val),
+ TP_ARGS(dev, offs, val),
+ TP_STRUCT__entry(
+ DEV_ENTRY
+ __field(u32, offs)
+ __field(u32, val)
+ ),
+ TP_fast_assign(
+ DEV_ASSIGN;
+ __entry->offs = offs;
+ __entry->val = val;
+ ),
+ TP_printk("[%s] read io[%#x] = %#x",
+ __get_str(dev), __entry->offs, __entry->val)
+);
+
+TRACE_EVENT(iwlwifi_dev_iowrite8,
+ TP_PROTO(const struct device *dev, u32 offs, u8 val),
+ TP_ARGS(dev, offs, val),
+ TP_STRUCT__entry(
+ DEV_ENTRY
+ __field(u32, offs)
+ __field(u8, val)
+ ),
+ TP_fast_assign(
+ DEV_ASSIGN;
+ __entry->offs = offs;
+ __entry->val = val;
+ ),
+ TP_printk("[%s] write io[%#x] = %#x)",
+ __get_str(dev), __entry->offs, __entry->val)
+);
+
+TRACE_EVENT(iwlwifi_dev_iowrite32,
+ TP_PROTO(const struct device *dev, u32 offs, u32 val),
+ TP_ARGS(dev, offs, val),
+ TP_STRUCT__entry(
+ DEV_ENTRY
+ __field(u32, offs)
+ __field(u32, val)
+ ),
+ TP_fast_assign(
+ DEV_ASSIGN;
+ __entry->offs = offs;
+ __entry->val = val;
+ ),
+ TP_printk("[%s] write io[%#x] = %#x)",
+ __get_str(dev), __entry->offs, __entry->val)
+);
+
+TRACE_EVENT(iwlwifi_dev_iowrite_prph32,
+ TP_PROTO(const struct device *dev, u32 offs, u32 val),
+ TP_ARGS(dev, offs, val),
+ TP_STRUCT__entry(
+ DEV_ENTRY
+ __field(u32, offs)
+ __field(u32, val)
+ ),
+ TP_fast_assign(
+ DEV_ASSIGN;
+ __entry->offs = offs;
+ __entry->val = val;
+ ),
+ TP_printk("[%s] write PRPH[%#x] = %#x)",
+ __get_str(dev), __entry->offs, __entry->val)
+);
+
+TRACE_EVENT(iwlwifi_dev_ioread_prph32,
+ TP_PROTO(const struct device *dev, u32 offs, u32 val),
+ TP_ARGS(dev, offs, val),
+ TP_STRUCT__entry(
+ DEV_ENTRY
+ __field(u32, offs)
+ __field(u32, val)
+ ),
+ TP_fast_assign(
+ DEV_ASSIGN;
+ __entry->offs = offs;
+ __entry->val = val;
+ ),
+ TP_printk("[%s] read PRPH[%#x] = %#x",
+ __get_str(dev), __entry->offs, __entry->val)
+);
+
+TRACE_EVENT(iwlwifi_dev_irq,
+ TP_PROTO(const struct device *dev),
+ TP_ARGS(dev),
+ TP_STRUCT__entry(
+ DEV_ENTRY
+ ),
+ TP_fast_assign(
+ DEV_ASSIGN;
+ ),
+ /* TP_printk("") doesn't compile */
+ TP_printk("%d", 0)
+);
+
+TRACE_EVENT(iwlwifi_dev_ict_read,
+ TP_PROTO(const struct device *dev, u32 index, u32 value),
+ TP_ARGS(dev, index, value),
+ TP_STRUCT__entry(
+ DEV_ENTRY
+ __field(u32, index)
+ __field(u32, value)
+ ),
+ TP_fast_assign(
+ DEV_ASSIGN;
+ __entry->index = index;
+ __entry->value = value;
+ ),
+ TP_printk("[%s] read ict[%d] = %#.8x",
+ __get_str(dev), __entry->index, __entry->value)
+);
+#endif /* __IWLWIFI_DEVICE_TRACE_IO */
+
+#undef TRACE_INCLUDE_PATH
+#define TRACE_INCLUDE_PATH .
+#undef TRACE_INCLUDE_FILE
+#define TRACE_INCLUDE_FILE iwl-devtrace-io
+#include <trace/define_trace.h>
--- /dev/null
+/******************************************************************************
+ *
+ * Copyright(c) 2009 - 2014 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * Intel Linux Wireless <ilw@linux.intel.com>
+ * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+ *
+ *****************************************************************************/
+
+#if !defined(__IWLWIFI_DEVICE_TRACE_IWLWIFI) || defined(TRACE_HEADER_MULTI_READ)
+#define __IWLWIFI_DEVICE_TRACE_IWLWIFI
+
+#include <linux/tracepoint.h>
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM iwlwifi
+
+TRACE_EVENT(iwlwifi_dev_hcmd,
+ TP_PROTO(const struct device *dev,
+ struct iwl_host_cmd *cmd, u16 total_size,
+ struct iwl_cmd_header *hdr),
+ TP_ARGS(dev, cmd, total_size, hdr),
+ TP_STRUCT__entry(
+ DEV_ENTRY
+ __dynamic_array(u8, hcmd, total_size)
+ __field(u32, flags)
+ ),
+ TP_fast_assign(
+ int i, offset = sizeof(*hdr);
+
+ DEV_ASSIGN;
+ __entry->flags = cmd->flags;
+ memcpy(__get_dynamic_array(hcmd), hdr, sizeof(*hdr));
+
+ for (i = 0; i < IWL_MAX_CMD_TBS_PER_TFD; i++) {
+ if (!cmd->len[i])
+ continue;
+ memcpy((u8 *)__get_dynamic_array(hcmd) + offset,
+ cmd->data[i], cmd->len[i]);
+ offset += cmd->len[i];
+ }
+ ),
+ TP_printk("[%s] hcmd %#.2x (%ssync)",
+ __get_str(dev), ((u8 *)__get_dynamic_array(hcmd))[0],
+ __entry->flags & CMD_ASYNC ? "a" : "")
+);
+
+TRACE_EVENT(iwlwifi_dev_rx,
+ TP_PROTO(const struct device *dev, const struct iwl_trans *trans,
+ void *rxbuf, size_t len),
+ TP_ARGS(dev, trans, rxbuf, len),
+ TP_STRUCT__entry(
+ DEV_ENTRY
+ __dynamic_array(u8, rxbuf, iwl_rx_trace_len(trans, rxbuf, len))
+ ),
+ TP_fast_assign(
+ DEV_ASSIGN;
+ memcpy(__get_dynamic_array(rxbuf), rxbuf,
+ iwl_rx_trace_len(trans, rxbuf, len));
+ ),
+ TP_printk("[%s] RX cmd %#.2x",
+ __get_str(dev), ((u8 *)__get_dynamic_array(rxbuf))[4])
+);
+
+TRACE_EVENT(iwlwifi_dev_tx,
+ TP_PROTO(const struct device *dev, struct sk_buff *skb,
+ void *tfd, size_t tfdlen,
+ void *buf0, size_t buf0_len,
+ void *buf1, size_t buf1_len),
+ TP_ARGS(dev, skb, tfd, tfdlen, buf0, buf0_len, buf1, buf1_len),
+ TP_STRUCT__entry(
+ DEV_ENTRY
+
+ __field(size_t, framelen)
+ __dynamic_array(u8, tfd, tfdlen)
+
+ /*
+ * Do not insert between or below these items,
+ * we want to keep the frame together (except
+ * for the possible padding).
+ */
+ __dynamic_array(u8, buf0, buf0_len)
+ __dynamic_array(u8, buf1, iwl_trace_data(skb) ? 0 : buf1_len)
+ ),
+ TP_fast_assign(
+ DEV_ASSIGN;
+ __entry->framelen = buf0_len + buf1_len;
+ memcpy(__get_dynamic_array(tfd), tfd, tfdlen);
+ memcpy(__get_dynamic_array(buf0), buf0, buf0_len);
+ if (!iwl_trace_data(skb))
+ memcpy(__get_dynamic_array(buf1), buf1, buf1_len);
+ ),
+ TP_printk("[%s] TX %.2x (%zu bytes)",
+ __get_str(dev), ((u8 *)__get_dynamic_array(buf0))[0],
+ __entry->framelen)
+);
+
+TRACE_EVENT(iwlwifi_dev_ucode_error,
+ TP_PROTO(const struct device *dev, u32 desc, u32 tsf_low,
+ u32 data1, u32 data2, u32 line, u32 blink1,
+ u32 blink2, u32 ilink1, u32 ilink2, u32 bcon_time,
+ u32 gp1, u32 gp2, u32 gp3, u32 ucode_ver, u32 hw_ver,
+ u32 brd_ver),
+ TP_ARGS(dev, desc, tsf_low, data1, data2, line,
+ blink1, blink2, ilink1, ilink2, bcon_time, gp1, gp2,
+ gp3, ucode_ver, hw_ver, brd_ver),
+ TP_STRUCT__entry(
+ DEV_ENTRY
+ __field(u32, desc)
+ __field(u32, tsf_low)
+ __field(u32, data1)
+ __field(u32, data2)
+ __field(u32, line)
+ __field(u32, blink1)
+ __field(u32, blink2)
+ __field(u32, ilink1)
+ __field(u32, ilink2)
+ __field(u32, bcon_time)
+ __field(u32, gp1)
+ __field(u32, gp2)
+ __field(u32, gp3)
+ __field(u32, ucode_ver)
+ __field(u32, hw_ver)
+ __field(u32, brd_ver)
+ ),
+ TP_fast_assign(
+ DEV_ASSIGN;
+ __entry->desc = desc;
+ __entry->tsf_low = tsf_low;
+ __entry->data1 = data1;
+ __entry->data2 = data2;
+ __entry->line = line;
+ __entry->blink1 = blink1;
+ __entry->blink2 = blink2;
+ __entry->ilink1 = ilink1;
+ __entry->ilink2 = ilink2;
+ __entry->bcon_time = bcon_time;
+ __entry->gp1 = gp1;
+ __entry->gp2 = gp2;
+ __entry->gp3 = gp3;
+ __entry->ucode_ver = ucode_ver;
+ __entry->hw_ver = hw_ver;
+ __entry->brd_ver = brd_ver;
+ ),
+ TP_printk("[%s] #%02d %010u data 0x%08X 0x%08X line %u, "
+ "blink 0x%05X 0x%05X ilink 0x%05X 0x%05X "
+ "bcon_tm %010u gp 0x%08X 0x%08X 0x%08X uCode 0x%08X "
+ "hw 0x%08X brd 0x%08X",
+ __get_str(dev), __entry->desc, __entry->tsf_low,
+ __entry->data1,
+ __entry->data2, __entry->line, __entry->blink1,
+ __entry->blink2, __entry->ilink1, __entry->ilink2,
+ __entry->bcon_time, __entry->gp1, __entry->gp2,
+ __entry->gp3, __entry->ucode_ver, __entry->hw_ver,
+ __entry->brd_ver)
+);
+
+TRACE_EVENT(iwlwifi_dev_ucode_event,
+ TP_PROTO(const struct device *dev, u32 time, u32 data, u32 ev),
+ TP_ARGS(dev, time, data, ev),
+ TP_STRUCT__entry(
+ DEV_ENTRY
+
+ __field(u32, time)
+ __field(u32, data)
+ __field(u32, ev)
+ ),
+ TP_fast_assign(
+ DEV_ASSIGN;
+ __entry->time = time;
+ __entry->data = data;
+ __entry->ev = ev;
+ ),
+ TP_printk("[%s] EVT_LOGT:%010u:0x%08x:%04u",
+ __get_str(dev), __entry->time, __entry->data, __entry->ev)
+);
+#endif /* __IWLWIFI_DEVICE_TRACE_IWLWIFI */
+
+#undef TRACE_INCLUDE_PATH
+#define TRACE_INCLUDE_PATH .
+#undef TRACE_INCLUDE_FILE
+#define TRACE_INCLUDE_FILE iwl-devtrace-iwlwifi
+#include <trace/define_trace.h>
--- /dev/null
+/******************************************************************************
+ *
+ * Copyright(c) 2009 - 2014 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * Intel Linux Wireless <ilw@linux.intel.com>
+ * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+ *
+ *****************************************************************************/
+
+#if !defined(__IWLWIFI_DEVICE_TRACE_MSG) || defined(TRACE_HEADER_MULTI_READ)
+#define __IWLWIFI_DEVICE_TRACE_MSG
+
+#include <linux/tracepoint.h>
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM iwlwifi_msg
+
+#define MAX_MSG_LEN 110
+
+DECLARE_EVENT_CLASS(iwlwifi_msg_event,
+ TP_PROTO(struct va_format *vaf),
+ TP_ARGS(vaf),
+ TP_STRUCT__entry(
+ __dynamic_array(char, msg, MAX_MSG_LEN)
+ ),
+ TP_fast_assign(
+ WARN_ON_ONCE(vsnprintf(__get_dynamic_array(msg),
+ MAX_MSG_LEN, vaf->fmt,
+ *vaf->va) >= MAX_MSG_LEN);
+ ),
+ TP_printk("%s", __get_str(msg))
+);
+
+DEFINE_EVENT(iwlwifi_msg_event, iwlwifi_err,
+ TP_PROTO(struct va_format *vaf),
+ TP_ARGS(vaf)
+);
+
+DEFINE_EVENT(iwlwifi_msg_event, iwlwifi_warn,
+ TP_PROTO(struct va_format *vaf),
+ TP_ARGS(vaf)
+);
+
+DEFINE_EVENT(iwlwifi_msg_event, iwlwifi_info,
+ TP_PROTO(struct va_format *vaf),
+ TP_ARGS(vaf)
+);
+
+DEFINE_EVENT(iwlwifi_msg_event, iwlwifi_crit,
+ TP_PROTO(struct va_format *vaf),
+ TP_ARGS(vaf)
+);
+
+TRACE_EVENT(iwlwifi_dbg,
+ TP_PROTO(u32 level, bool in_interrupt, const char *function,
+ struct va_format *vaf),
+ TP_ARGS(level, in_interrupt, function, vaf),
+ TP_STRUCT__entry(
+ __field(u32, level)
+ __field(u8, in_interrupt)
+ __string(function, function)
+ __dynamic_array(char, msg, MAX_MSG_LEN)
+ ),
+ TP_fast_assign(
+ __entry->level = level;
+ __entry->in_interrupt = in_interrupt;
+ __assign_str(function, function);
+ WARN_ON_ONCE(vsnprintf(__get_dynamic_array(msg),
+ MAX_MSG_LEN, vaf->fmt,
+ *vaf->va) >= MAX_MSG_LEN);
+ ),
+ TP_printk("%s", __get_str(msg))
+);
+#endif /* __IWLWIFI_DEVICE_TRACE_MSG */
+
+#undef TRACE_INCLUDE_PATH
+#define TRACE_INCLUDE_PATH .
+#undef TRACE_INCLUDE_FILE
+#define TRACE_INCLUDE_FILE iwl-devtrace-msg
+#include <trace/define_trace.h>
--- /dev/null
+/******************************************************************************
+ *
+ * Copyright(c) 2009 - 2014 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * Intel Linux Wireless <ilw@linux.intel.com>
+ * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+ *
+ *****************************************************************************/
+
+#if !defined(__IWLWIFI_DEVICE_TRACE_UCODE) || defined(TRACE_HEADER_MULTI_READ)
+#define __IWLWIFI_DEVICE_TRACE_UCODE
+
+#include <linux/tracepoint.h>
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM iwlwifi_ucode
+
+TRACE_EVENT(iwlwifi_dev_ucode_cont_event,
+ TP_PROTO(const struct device *dev, u32 time, u32 data, u32 ev),
+ TP_ARGS(dev, time, data, ev),
+ TP_STRUCT__entry(
+ DEV_ENTRY
+
+ __field(u32, time)
+ __field(u32, data)
+ __field(u32, ev)
+ ),
+ TP_fast_assign(
+ DEV_ASSIGN;
+ __entry->time = time;
+ __entry->data = data;
+ __entry->ev = ev;
+ ),
+ TP_printk("[%s] EVT_LOGT:%010u:0x%08x:%04u",
+ __get_str(dev), __entry->time, __entry->data, __entry->ev)
+);
+
+TRACE_EVENT(iwlwifi_dev_ucode_wrap_event,
+ TP_PROTO(const struct device *dev, u32 wraps, u32 n_entry, u32 p_entry),
+ TP_ARGS(dev, wraps, n_entry, p_entry),
+ TP_STRUCT__entry(
+ DEV_ENTRY
+
+ __field(u32, wraps)
+ __field(u32, n_entry)
+ __field(u32, p_entry)
+ ),
+ TP_fast_assign(
+ DEV_ASSIGN;
+ __entry->wraps = wraps;
+ __entry->n_entry = n_entry;
+ __entry->p_entry = p_entry;
+ ),
+ TP_printk("[%s] wraps=#%02d n=0x%X p=0x%X",
+ __get_str(dev), __entry->wraps, __entry->n_entry,
+ __entry->p_entry)
+);
+#endif /* __IWLWIFI_DEVICE_TRACE_UCODE */
+
+#undef TRACE_INCLUDE_PATH
+#define TRACE_INCLUDE_PATH .
+#undef TRACE_INCLUDE_FILE
+#define TRACE_INCLUDE_FILE iwl-devtrace-ucode
+#include <trace/define_trace.h>
*
*****************************************************************************/
-#if !defined(__IWLWIFI_DEVICE_TRACE) || defined(TRACE_HEADER_MULTI_READ)
+#ifndef __IWLWIFI_DEVICE_TRACE
#include <linux/skbuff.h>
#include <linux/ieee80211.h>
#include <net/cfg80211.h>
#define DEV_ENTRY __string(dev, dev_name(dev))
#define DEV_ASSIGN __assign_str(dev, dev_name(dev))
-#undef TRACE_SYSTEM
-#define TRACE_SYSTEM iwlwifi_io
+#include "iwl-devtrace-io.h"
+#include "iwl-devtrace-ucode.h"
+#include "iwl-devtrace-msg.h"
+#include "iwl-devtrace-data.h"
+#include "iwl-devtrace-iwlwifi.h"
-TRACE_EVENT(iwlwifi_dev_ioread32,
- TP_PROTO(const struct device *dev, u32 offs, u32 val),
- TP_ARGS(dev, offs, val),
- TP_STRUCT__entry(
- DEV_ENTRY
- __field(u32, offs)
- __field(u32, val)
- ),
- TP_fast_assign(
- DEV_ASSIGN;
- __entry->offs = offs;
- __entry->val = val;
- ),
- TP_printk("[%s] read io[%#x] = %#x",
- __get_str(dev), __entry->offs, __entry->val)
-);
-
-TRACE_EVENT(iwlwifi_dev_iowrite8,
- TP_PROTO(const struct device *dev, u32 offs, u8 val),
- TP_ARGS(dev, offs, val),
- TP_STRUCT__entry(
- DEV_ENTRY
- __field(u32, offs)
- __field(u8, val)
- ),
- TP_fast_assign(
- DEV_ASSIGN;
- __entry->offs = offs;
- __entry->val = val;
- ),
- TP_printk("[%s] write io[%#x] = %#x)",
- __get_str(dev), __entry->offs, __entry->val)
-);
-
-TRACE_EVENT(iwlwifi_dev_iowrite32,
- TP_PROTO(const struct device *dev, u32 offs, u32 val),
- TP_ARGS(dev, offs, val),
- TP_STRUCT__entry(
- DEV_ENTRY
- __field(u32, offs)
- __field(u32, val)
- ),
- TP_fast_assign(
- DEV_ASSIGN;
- __entry->offs = offs;
- __entry->val = val;
- ),
- TP_printk("[%s] write io[%#x] = %#x)",
- __get_str(dev), __entry->offs, __entry->val)
-);
-
-TRACE_EVENT(iwlwifi_dev_iowrite_prph32,
- TP_PROTO(const struct device *dev, u32 offs, u32 val),
- TP_ARGS(dev, offs, val),
- TP_STRUCT__entry(
- DEV_ENTRY
- __field(u32, offs)
- __field(u32, val)
- ),
- TP_fast_assign(
- DEV_ASSIGN;
- __entry->offs = offs;
- __entry->val = val;
- ),
- TP_printk("[%s] write PRPH[%#x] = %#x)",
- __get_str(dev), __entry->offs, __entry->val)
-);
-
-TRACE_EVENT(iwlwifi_dev_ioread_prph32,
- TP_PROTO(const struct device *dev, u32 offs, u32 val),
- TP_ARGS(dev, offs, val),
- TP_STRUCT__entry(
- DEV_ENTRY
- __field(u32, offs)
- __field(u32, val)
- ),
- TP_fast_assign(
- DEV_ASSIGN;
- __entry->offs = offs;
- __entry->val = val;
- ),
- TP_printk("[%s] read PRPH[%#x] = %#x",
- __get_str(dev), __entry->offs, __entry->val)
-);
-
-TRACE_EVENT(iwlwifi_dev_irq,
- TP_PROTO(const struct device *dev),
- TP_ARGS(dev),
- TP_STRUCT__entry(
- DEV_ENTRY
- ),
- TP_fast_assign(
- DEV_ASSIGN;
- ),
- /* TP_printk("") doesn't compile */
- TP_printk("%d", 0)
-);
-
-TRACE_EVENT(iwlwifi_dev_ict_read,
- TP_PROTO(const struct device *dev, u32 index, u32 value),
- TP_ARGS(dev, index, value),
- TP_STRUCT__entry(
- DEV_ENTRY
- __field(u32, index)
- __field(u32, value)
- ),
- TP_fast_assign(
- DEV_ASSIGN;
- __entry->index = index;
- __entry->value = value;
- ),
- TP_printk("[%s] read ict[%d] = %#.8x",
- __get_str(dev), __entry->index, __entry->value)
-);
-
-#undef TRACE_SYSTEM
-#define TRACE_SYSTEM iwlwifi_ucode
-
-TRACE_EVENT(iwlwifi_dev_ucode_cont_event,
- TP_PROTO(const struct device *dev, u32 time, u32 data, u32 ev),
- TP_ARGS(dev, time, data, ev),
- TP_STRUCT__entry(
- DEV_ENTRY
-
- __field(u32, time)
- __field(u32, data)
- __field(u32, ev)
- ),
- TP_fast_assign(
- DEV_ASSIGN;
- __entry->time = time;
- __entry->data = data;
- __entry->ev = ev;
- ),
- TP_printk("[%s] EVT_LOGT:%010u:0x%08x:%04u",
- __get_str(dev), __entry->time, __entry->data, __entry->ev)
-);
-
-TRACE_EVENT(iwlwifi_dev_ucode_wrap_event,
- TP_PROTO(const struct device *dev, u32 wraps, u32 n_entry, u32 p_entry),
- TP_ARGS(dev, wraps, n_entry, p_entry),
- TP_STRUCT__entry(
- DEV_ENTRY
-
- __field(u32, wraps)
- __field(u32, n_entry)
- __field(u32, p_entry)
- ),
- TP_fast_assign(
- DEV_ASSIGN;
- __entry->wraps = wraps;
- __entry->n_entry = n_entry;
- __entry->p_entry = p_entry;
- ),
- TP_printk("[%s] wraps=#%02d n=0x%X p=0x%X",
- __get_str(dev), __entry->wraps, __entry->n_entry,
- __entry->p_entry)
-);
-
-#undef TRACE_SYSTEM
-#define TRACE_SYSTEM iwlwifi_msg
-
-#define MAX_MSG_LEN 110
-
-DECLARE_EVENT_CLASS(iwlwifi_msg_event,
- TP_PROTO(struct va_format *vaf),
- TP_ARGS(vaf),
- TP_STRUCT__entry(
- __dynamic_array(char, msg, MAX_MSG_LEN)
- ),
- TP_fast_assign(
- WARN_ON_ONCE(vsnprintf(__get_dynamic_array(msg),
- MAX_MSG_LEN, vaf->fmt,
- *vaf->va) >= MAX_MSG_LEN);
- ),
- TP_printk("%s", __get_str(msg))
-);
-
-DEFINE_EVENT(iwlwifi_msg_event, iwlwifi_err,
- TP_PROTO(struct va_format *vaf),
- TP_ARGS(vaf)
-);
-
-DEFINE_EVENT(iwlwifi_msg_event, iwlwifi_warn,
- TP_PROTO(struct va_format *vaf),
- TP_ARGS(vaf)
-);
-
-DEFINE_EVENT(iwlwifi_msg_event, iwlwifi_info,
- TP_PROTO(struct va_format *vaf),
- TP_ARGS(vaf)
-);
-
-DEFINE_EVENT(iwlwifi_msg_event, iwlwifi_crit,
- TP_PROTO(struct va_format *vaf),
- TP_ARGS(vaf)
-);
-
-TRACE_EVENT(iwlwifi_dbg,
- TP_PROTO(u32 level, bool in_interrupt, const char *function,
- struct va_format *vaf),
- TP_ARGS(level, in_interrupt, function, vaf),
- TP_STRUCT__entry(
- __field(u32, level)
- __field(u8, in_interrupt)
- __string(function, function)
- __dynamic_array(char, msg, MAX_MSG_LEN)
- ),
- TP_fast_assign(
- __entry->level = level;
- __entry->in_interrupt = in_interrupt;
- __assign_str(function, function);
- WARN_ON_ONCE(vsnprintf(__get_dynamic_array(msg),
- MAX_MSG_LEN, vaf->fmt,
- *vaf->va) >= MAX_MSG_LEN);
- ),
- TP_printk("%s", __get_str(msg))
-);
-
-#undef TRACE_SYSTEM
-#define TRACE_SYSTEM iwlwifi_data
-
-TRACE_EVENT(iwlwifi_dev_tx_data,
- TP_PROTO(const struct device *dev,
- struct sk_buff *skb,
- void *data, size_t data_len),
- TP_ARGS(dev, skb, data, data_len),
- TP_STRUCT__entry(
- DEV_ENTRY
-
- __dynamic_array(u8, data, iwl_trace_data(skb) ? data_len : 0)
- ),
- TP_fast_assign(
- DEV_ASSIGN;
- if (iwl_trace_data(skb))
- memcpy(__get_dynamic_array(data), data, data_len);
- ),
- TP_printk("[%s] TX frame data", __get_str(dev))
-);
-
-TRACE_EVENT(iwlwifi_dev_rx_data,
- TP_PROTO(const struct device *dev,
- const struct iwl_trans *trans,
- void *rxbuf, size_t len),
- TP_ARGS(dev, trans, rxbuf, len),
- TP_STRUCT__entry(
- DEV_ENTRY
-
- __dynamic_array(u8, data,
- len - iwl_rx_trace_len(trans, rxbuf, len))
- ),
- TP_fast_assign(
- size_t offs = iwl_rx_trace_len(trans, rxbuf, len);
- DEV_ASSIGN;
- if (offs < len)
- memcpy(__get_dynamic_array(data),
- ((u8 *)rxbuf) + offs, len - offs);
- ),
- TP_printk("[%s] RX frame data", __get_str(dev))
-);
-
-#undef TRACE_SYSTEM
-#define TRACE_SYSTEM iwlwifi
-
-TRACE_EVENT(iwlwifi_dev_hcmd,
- TP_PROTO(const struct device *dev,
- struct iwl_host_cmd *cmd, u16 total_size,
- struct iwl_cmd_header *hdr),
- TP_ARGS(dev, cmd, total_size, hdr),
- TP_STRUCT__entry(
- DEV_ENTRY
- __dynamic_array(u8, hcmd, total_size)
- __field(u32, flags)
- ),
- TP_fast_assign(
- int i, offset = sizeof(*hdr);
-
- DEV_ASSIGN;
- __entry->flags = cmd->flags;
- memcpy(__get_dynamic_array(hcmd), hdr, sizeof(*hdr));
-
- for (i = 0; i < IWL_MAX_CMD_TBS_PER_TFD; i++) {
- if (!cmd->len[i])
- continue;
- memcpy((u8 *)__get_dynamic_array(hcmd) + offset,
- cmd->data[i], cmd->len[i]);
- offset += cmd->len[i];
- }
- ),
- TP_printk("[%s] hcmd %#.2x (%ssync)",
- __get_str(dev), ((u8 *)__get_dynamic_array(hcmd))[0],
- __entry->flags & CMD_ASYNC ? "a" : "")
-);
-
-TRACE_EVENT(iwlwifi_dev_rx,
- TP_PROTO(const struct device *dev, const struct iwl_trans *trans,
- void *rxbuf, size_t len),
- TP_ARGS(dev, trans, rxbuf, len),
- TP_STRUCT__entry(
- DEV_ENTRY
- __dynamic_array(u8, rxbuf, iwl_rx_trace_len(trans, rxbuf, len))
- ),
- TP_fast_assign(
- DEV_ASSIGN;
- memcpy(__get_dynamic_array(rxbuf), rxbuf,
- iwl_rx_trace_len(trans, rxbuf, len));
- ),
- TP_printk("[%s] RX cmd %#.2x",
- __get_str(dev), ((u8 *)__get_dynamic_array(rxbuf))[4])
-);
-
-TRACE_EVENT(iwlwifi_dev_tx,
- TP_PROTO(const struct device *dev, struct sk_buff *skb,
- void *tfd, size_t tfdlen,
- void *buf0, size_t buf0_len,
- void *buf1, size_t buf1_len),
- TP_ARGS(dev, skb, tfd, tfdlen, buf0, buf0_len, buf1, buf1_len),
- TP_STRUCT__entry(
- DEV_ENTRY
-
- __field(size_t, framelen)
- __dynamic_array(u8, tfd, tfdlen)
-
- /*
- * Do not insert between or below these items,
- * we want to keep the frame together (except
- * for the possible padding).
- */
- __dynamic_array(u8, buf0, buf0_len)
- __dynamic_array(u8, buf1, iwl_trace_data(skb) ? 0 : buf1_len)
- ),
- TP_fast_assign(
- DEV_ASSIGN;
- __entry->framelen = buf0_len + buf1_len;
- memcpy(__get_dynamic_array(tfd), tfd, tfdlen);
- memcpy(__get_dynamic_array(buf0), buf0, buf0_len);
- if (!iwl_trace_data(skb))
- memcpy(__get_dynamic_array(buf1), buf1, buf1_len);
- ),
- TP_printk("[%s] TX %.2x (%zu bytes)",
- __get_str(dev), ((u8 *)__get_dynamic_array(buf0))[0],
- __entry->framelen)
-);
-
-TRACE_EVENT(iwlwifi_dev_ucode_error,
- TP_PROTO(const struct device *dev, u32 desc, u32 tsf_low,
- u32 data1, u32 data2, u32 line, u32 blink1,
- u32 blink2, u32 ilink1, u32 ilink2, u32 bcon_time,
- u32 gp1, u32 gp2, u32 gp3, u32 ucode_ver, u32 hw_ver,
- u32 brd_ver),
- TP_ARGS(dev, desc, tsf_low, data1, data2, line,
- blink1, blink2, ilink1, ilink2, bcon_time, gp1, gp2,
- gp3, ucode_ver, hw_ver, brd_ver),
- TP_STRUCT__entry(
- DEV_ENTRY
- __field(u32, desc)
- __field(u32, tsf_low)
- __field(u32, data1)
- __field(u32, data2)
- __field(u32, line)
- __field(u32, blink1)
- __field(u32, blink2)
- __field(u32, ilink1)
- __field(u32, ilink2)
- __field(u32, bcon_time)
- __field(u32, gp1)
- __field(u32, gp2)
- __field(u32, gp3)
- __field(u32, ucode_ver)
- __field(u32, hw_ver)
- __field(u32, brd_ver)
- ),
- TP_fast_assign(
- DEV_ASSIGN;
- __entry->desc = desc;
- __entry->tsf_low = tsf_low;
- __entry->data1 = data1;
- __entry->data2 = data2;
- __entry->line = line;
- __entry->blink1 = blink1;
- __entry->blink2 = blink2;
- __entry->ilink1 = ilink1;
- __entry->ilink2 = ilink2;
- __entry->bcon_time = bcon_time;
- __entry->gp1 = gp1;
- __entry->gp2 = gp2;
- __entry->gp3 = gp3;
- __entry->ucode_ver = ucode_ver;
- __entry->hw_ver = hw_ver;
- __entry->brd_ver = brd_ver;
- ),
- TP_printk("[%s] #%02d %010u data 0x%08X 0x%08X line %u, "
- "blink 0x%05X 0x%05X ilink 0x%05X 0x%05X "
- "bcon_tm %010u gp 0x%08X 0x%08X 0x%08X uCode 0x%08X "
- "hw 0x%08X brd 0x%08X",
- __get_str(dev), __entry->desc, __entry->tsf_low,
- __entry->data1,
- __entry->data2, __entry->line, __entry->blink1,
- __entry->blink2, __entry->ilink1, __entry->ilink2,
- __entry->bcon_time, __entry->gp1, __entry->gp2,
- __entry->gp3, __entry->ucode_ver, __entry->hw_ver,
- __entry->brd_ver)
-);
-
-TRACE_EVENT(iwlwifi_dev_ucode_event,
- TP_PROTO(const struct device *dev, u32 time, u32 data, u32 ev),
- TP_ARGS(dev, time, data, ev),
- TP_STRUCT__entry(
- DEV_ENTRY
-
- __field(u32, time)
- __field(u32, data)
- __field(u32, ev)
- ),
- TP_fast_assign(
- DEV_ASSIGN;
- __entry->time = time;
- __entry->data = data;
- __entry->ev = ev;
- ),
- TP_printk("[%s] EVT_LOGT:%010u:0x%08x:%04u",
- __get_str(dev), __entry->time, __entry->data, __entry->ev)
-);
#endif /* __IWLWIFI_DEVICE_TRACE */
-
-#undef TRACE_INCLUDE_PATH
-#define TRACE_INCLUDE_PATH .
-#undef TRACE_INCLUDE_FILE
-#define TRACE_INCLUDE_FILE iwl-devtrace
-#include <trace/define_trace.h>
rtl_dm_dig->min_undec_pwdb_for_dm =
rtlpriv->dm.entry_min_undec_sm_pwdb;
RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
- "AP Ext Port or disconnet PWDB = 0x%x\n",
+ "AP Ext Port or disconnect PWDB = 0x%x\n",
rtl_dm_dig->min_undec_pwdb_for_dm);
}
RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "MinUndecoratedPWDBForDM =%d\n",
if (rtlpriv->falsealm_cnt.cnt_all > 10000) {
RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
- "Abnornally false alarm case.\n");
+ "Abnormally false alarm case.\n");
if (dm_digtable->large_fa_hit != 3)
dm_digtable->large_fa_hit++;
}
EXPORT_SYMBOL_GPL(of_alias_get_id);
+/**
+ * of_alias_get_highest_id - Get highest alias id for the given stem
+ * @stem: Alias stem to be examined
+ *
+ * The function travels the lookup table to get the highest alias id for the
+ * given alias stem. It returns the alias id if found.
+ */
+int of_alias_get_highest_id(const char *stem)
+{
+ struct alias_prop *app;
+ int id = -ENODEV;
+
+ mutex_lock(&of_mutex);
+ list_for_each_entry(app, &aliases_lookup, link) {
+ if (strcmp(app->stem, stem) != 0)
+ continue;
+
+ if (app->id > id)
+ id = app->id;
+ }
+ mutex_unlock(&of_mutex);
+
+ return id;
+}
+EXPORT_SYMBOL_GPL(of_alias_get_highest_id);
+
const __be32 *of_prop_next_u32(struct property *prop, const __be32 *cur,
u32 *pu)
{
#include <linux/kernel.h>
#include <linux/of.h>
#include <linux/of_device.h>
+#include <linux/of_address.h>
+#include <linux/of_iommu.h>
+#include <linux/dma-mapping.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
return device_add(&ofdev->dev);
}
+/**
+ * of_dma_configure - Setup DMA configuration
+ * @dev: Device to apply DMA configuration
+ * @np: Pointer to OF node having DMA configuration
+ *
+ * Try to get devices's DMA configuration from DT and update it
+ * accordingly.
+ *
+ * If platform code needs to use its own special DMA configuration, it
+ * can use a platform bus notifier and handle BUS_NOTIFY_ADD_DEVICE events
+ * to fix up DMA configuration.
+ */
+void of_dma_configure(struct device *dev, struct device_node *np)
+{
+ u64 dma_addr, paddr, size;
+ int ret;
+ bool coherent;
+ unsigned long offset;
+ struct iommu_ops *iommu;
+
+ /*
+ * Set default coherent_dma_mask to 32 bit. Drivers are expected to
+ * setup the correct supported mask.
+ */
+ if (!dev->coherent_dma_mask)
+ dev->coherent_dma_mask = DMA_BIT_MASK(32);
+
+ /*
+ * Set it to coherent_dma_mask by default if the architecture
+ * code has not set it.
+ */
+ if (!dev->dma_mask)
+ dev->dma_mask = &dev->coherent_dma_mask;
+
+ ret = of_dma_get_range(np, &dma_addr, &paddr, &size);
+ if (ret < 0) {
+ dma_addr = offset = 0;
+ size = dev->coherent_dma_mask + 1;
+ } else {
+ offset = PFN_DOWN(paddr - dma_addr);
+
+ /*
+ * Add a work around to treat the size as mask + 1 in case
+ * it is defined in DT as a mask.
+ */
+ if (size & 1) {
+ dev_warn(dev, "Invalid size 0x%llx for dma-range\n",
+ size);
+ size = size + 1;
+ }
+
+ if (!size) {
+ dev_err(dev, "Adjusted size 0x%llx invalid\n", size);
+ return;
+ }
+ dev_dbg(dev, "dma_pfn_offset(%#08lx)\n", offset);
+ }
+
+ dev->dma_pfn_offset = offset;
+
+ /*
+ * Limit coherent and dma mask based on size and default mask
+ * set by the driver.
+ */
+ dev->coherent_dma_mask = min(dev->coherent_dma_mask,
+ DMA_BIT_MASK(ilog2(dma_addr + size)));
+ *dev->dma_mask = min((*dev->dma_mask),
+ DMA_BIT_MASK(ilog2(dma_addr + size)));
+
+ coherent = of_dma_is_coherent(np);
+ dev_dbg(dev, "device is%sdma coherent\n",
+ coherent ? " " : " not ");
+
+ iommu = of_iommu_configure(dev, np);
+ dev_dbg(dev, "device is%sbehind an iommu\n",
+ iommu ? " " : " not ");
+
+ arch_setup_dma_ops(dev, dma_addr, size, iommu, coherent);
+}
+EXPORT_SYMBOL_GPL(of_dma_configure);
+
int of_device_register(struct platform_device *pdev)
{
device_initialize(&pdev->dev);
#include <linux/export.h>
#include <linux/of.h>
#include <linux/of_address.h>
+#include <linux/of_device.h>
#include <linux/of_pci.h>
#include <linux/slab.h>
}
EXPORT_SYMBOL_GPL(of_get_pci_domain_nr);
+/**
+ * of_pci_dma_configure - Setup DMA configuration
+ * @dev: ptr to pci_dev struct of the PCI device
+ *
+ * Function to update PCI devices's DMA configuration using the same
+ * info from the OF node of host bridge's parent (if any).
+ */
+void of_pci_dma_configure(struct pci_dev *pci_dev)
+{
+ struct device *dev = &pci_dev->dev;
+ struct device *bridge = pci_get_host_bridge_device(pci_dev);
+
+ if (!bridge->parent)
+ return;
+
+ of_dma_configure(dev, bridge->parent->of_node);
+ pci_put_host_bridge_device(bridge);
+}
+EXPORT_SYMBOL_GPL(of_pci_dma_configure);
+
#if defined(CONFIG_OF_ADDRESS)
/**
* of_pci_get_host_bridge_resources - Parse PCI host bridge resources from DT
#include <linux/slab.h>
#include <linux/of_address.h>
#include <linux/of_device.h>
-#include <linux/of_iommu.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
}
EXPORT_SYMBOL(of_device_alloc);
-/**
- * of_dma_configure - Setup DMA configuration
- * @dev: Device to apply DMA configuration
- *
- * Try to get devices's DMA configuration from DT and update it
- * accordingly.
- *
- * In case if platform code need to use own special DMA configuration,it
- * can use Platform bus notifier and handle BUS_NOTIFY_ADD_DEVICE event
- * to fix up DMA configuration.
- */
-static void of_dma_configure(struct device *dev)
-{
- u64 dma_addr, paddr, size;
- int ret;
- bool coherent;
- unsigned long offset;
- struct iommu_ops *iommu;
-
- /*
- * Set default dma-mask to 32 bit. Drivers are expected to setup
- * the correct supported dma_mask.
- */
- dev->coherent_dma_mask = DMA_BIT_MASK(32);
-
- /*
- * Set it to coherent_dma_mask by default if the architecture
- * code has not set it.
- */
- if (!dev->dma_mask)
- dev->dma_mask = &dev->coherent_dma_mask;
-
- ret = of_dma_get_range(dev->of_node, &dma_addr, &paddr, &size);
- if (ret < 0) {
- dma_addr = offset = 0;
- size = dev->coherent_dma_mask;
- } else {
- offset = PFN_DOWN(paddr - dma_addr);
- dev_dbg(dev, "dma_pfn_offset(%#08lx)\n", offset);
- }
- dev->dma_pfn_offset = offset;
-
- coherent = of_dma_is_coherent(dev->of_node);
- dev_dbg(dev, "device is%sdma coherent\n",
- coherent ? " " : " not ");
-
- iommu = of_iommu_configure(dev);
- dev_dbg(dev, "device is%sbehind an iommu\n",
- iommu ? " " : " not ");
-
- arch_setup_dma_ops(dev, dma_addr, size, iommu, coherent);
-}
-
static void of_dma_deconfigure(struct device *dev)
{
arch_teardown_dma_ops(dev);
dev->dev.bus = &platform_bus_type;
dev->dev.platform_data = platform_data;
- of_dma_configure(&dev->dev);
+ of_dma_configure(&dev->dev, dev->dev.of_node);
if (of_device_add(dev) != 0) {
of_dma_deconfigure(&dev->dev);
dev_set_name(&dev->dev, "%s", bus_id);
else
of_device_make_bus_id(&dev->dev);
- of_dma_configure(&dev->dev);
+ of_dma_configure(&dev->dev, dev->dev.of_node);
/* Allow the HW Peripheral ID to be overridden */
prop = of_get_property(node, "arm,primecell-periphid", NULL);
}
if (flags & HPEE_FUNCTION_INFO_CFG_FREE_FORM) {
/* I have no idea how to handle this */
- printk("function %d have free-form confgiuration, skipping ",
+ printk("function %d have free-form configuration, skipping ",
num_func);
pos = p0 + function_len;
continue;
return bus;
}
-static struct pci_host_bridge *find_pci_host_bridge(struct pci_bus *bus)
+struct pci_host_bridge *pci_find_host_bridge(struct pci_bus *bus)
{
struct pci_bus *root_bus = find_pci_root_bus(bus);
return to_pci_host_bridge(root_bus->bridge);
}
+struct device *pci_get_host_bridge_device(struct pci_dev *dev)
+{
+ struct pci_bus *root_bus = find_pci_root_bus(dev->bus);
+ struct device *bridge = root_bus->bridge;
+
+ kobject_get(&bridge->kobj);
+ return bridge;
+}
+
+void pci_put_host_bridge_device(struct device *dev)
+{
+ kobject_put(&dev->kobj);
+}
+
void pci_set_host_bridge_release(struct pci_host_bridge *bridge,
void (*release_fn)(struct pci_host_bridge *),
void *release_data)
void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region,
struct resource *res)
{
- struct pci_host_bridge *bridge = find_pci_host_bridge(bus);
+ struct pci_host_bridge *bridge = pci_find_host_bridge(bus);
struct resource_entry *window;
resource_size_t offset = 0;
void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res,
struct pci_bus_region *region)
{
- struct pci_host_bridge *bridge = find_pci_host_bridge(bus);
+ struct pci_host_bridge *bridge = pci_find_host_bridge(bus);
struct resource_entry *window;
resource_size_t offset = 0;
bool "ARM Versatile PB PCI controller"
depends on ARCH_VERSATILE
+config PCIE_IPROC
+ tristate "Broadcom iProc PCIe controller"
+ depends on OF && ARM
+ default n
+ help
+ This enables the iProc PCIe core controller support for Broadcom's
+ iProc family of SoCs. An appropriate bus interface driver also needs
+ to be enabled
+
+config PCIE_IPROC_PLATFORM
+ tristate "Broadcom iProc PCIe platform bus driver"
+ depends on ARCH_BCM_IPROC || (ARM && COMPILE_TEST)
+ depends on OF
+ select PCIE_IPROC
+ default ARCH_BCM_IPROC
+ help
+ Say Y here if you want to use the Broadcom iProc PCIe controller
+ through the generic platform bus interface
+
endmenu
obj-$(CONFIG_PCI_XGENE) += pci-xgene.o
obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o
obj-$(CONFIG_PCI_VERSATILE) += pci-versatile.o
+obj-$(CONFIG_PCIE_IPROC) += pcie-iproc.o
+obj-$(CONFIG_PCIE_IPROC_PLATFORM) += pcie-iproc-platform.o
/* enable INTX interrupt */
val = IRQ_INTA_ASSERT | IRQ_INTB_ASSERT |
- IRQ_INTC_ASSERT | IRQ_INTD_ASSERT,
+ IRQ_INTC_ASSERT | IRQ_INTD_ASSERT;
exynos_elb_writel(exynos_pcie, val, PCIE_IRQ_EN_PULSE);
}
/* Index 1 is the application reg. space address */
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- ks_pcie->app = *res;
ks_pcie->va_app_base = devm_ioremap_resource(pp->dev, res);
if (IS_ERR(ks_pcie->va_app_base))
return PTR_ERR(ks_pcie->va_app_base);
+ ks_pcie->app = *res;
+
/* Create legacy IRQ domain */
ks_pcie->legacy_irq_domain =
irq_domain_add_linear(ks_pcie->legacy_intc_np,
pcie->dev = &pdev->dev;
dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
- if (!dbi_base) {
- dev_err(&pdev->dev, "missing *regs* space\n");
- return -ENODEV;
- }
-
pcie->dbi = devm_ioremap_resource(&pdev->dev, dbi_base);
- if (IS_ERR(pcie->dbi))
+ if (IS_ERR(pcie->dbi)) {
+ dev_err(&pdev->dev, "missing *regs* space\n");
return PTR_ERR(pcie->dbi);
+ }
pcie->scfg = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
"fsl,pcie-scfg");
size_t memwin_size;
phys_addr_t iowin_base;
size_t iowin_size;
+ u32 saved_pcie_stat;
};
static inline void mvebu_writel(struct mvebu_pcie_port *port, u32 val, u32 reg)
pcie->msi->dev = &pcie->pdev->dev;
}
+static int mvebu_pcie_suspend(struct device *dev)
+{
+ struct mvebu_pcie *pcie;
+ int i;
+
+ pcie = dev_get_drvdata(dev);
+ for (i = 0; i < pcie->nports; i++) {
+ struct mvebu_pcie_port *port = pcie->ports + i;
+ port->saved_pcie_stat = mvebu_readl(port, PCIE_STAT_OFF);
+ }
+
+ return 0;
+}
+
+static int mvebu_pcie_resume(struct device *dev)
+{
+ struct mvebu_pcie *pcie;
+ int i;
+
+ pcie = dev_get_drvdata(dev);
+ for (i = 0; i < pcie->nports; i++) {
+ struct mvebu_pcie_port *port = pcie->ports + i;
+ mvebu_writel(port, port->saved_pcie_stat, PCIE_STAT_OFF);
+ mvebu_pcie_setup_hw(port);
+ }
+
+ return 0;
+}
+
static int mvebu_pcie_probe(struct platform_device *pdev)
{
struct mvebu_pcie *pcie;
mvebu_pcie_msi_enable(pcie);
mvebu_pcie_enable(pcie);
+ platform_set_drvdata(pdev, pcie);
+
return 0;
}
};
MODULE_DEVICE_TABLE(of, mvebu_pcie_of_match_table);
+static struct dev_pm_ops mvebu_pcie_pm_ops = {
+ .suspend_noirq = mvebu_pcie_suspend,
+ .resume_noirq = mvebu_pcie_resume,
+};
+
static struct platform_driver mvebu_pcie_driver = {
.driver = {
.name = "mvebu-pcie",
.of_match_table = mvebu_pcie_of_match_table,
/* driver unloading/unbinding currently not supported */
.suppress_bind_attrs = true,
+ .pm = &mvebu_pcie_pm_ops,
},
.probe = mvebu_pcie_probe,
};
if (!mem_res || !mem_res->start)
return -ENODEV;
+ if (mem_res->start & 0xFFFF)
+ return -EINVAL;
+
priv = devm_kzalloc(&pdev->dev,
sizeof(struct rcar_pci_priv), GFP_KERNEL);
if (!priv)
LIST_HEAD(pci_res);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res)
- return -ENODEV;
versatile_pci_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(versatile_pci_base))
+ return PTR_ERR(versatile_pci_base);
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- if (!res)
- return -ENODEV;
versatile_cfg_base[0] = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(versatile_cfg_base[0]))
+ return PTR_ERR(versatile_cfg_base[0]);
res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
- if (!res)
- return -ENODEV;
versatile_cfg_base[1] = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(versatile_cfg_base[1]))
+ return PTR_ERR(versatile_cfg_base[1]);
ret = versatile_pci_parse_request_of_pci_ranges(&pdev->dev, &pci_res);
if (ret)
pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
pci_assign_unassigned_bus_resources(bus);
+ pci_bus_add_devices(bus);
return 0;
}
.map = dw_pcie_msi_map,
};
-int __init dw_pcie_host_init(struct pcie_port *pp)
+int dw_pcie_host_init(struct pcie_port *pp)
{
struct device_node *np = pp->dev->of_node;
struct platform_device *pdev = to_platform_device(pp->dev);
--- /dev/null
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/clk.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/of_address.h>
+#include <linux/of_pci.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/phy/phy.h>
+
+#include "pcie-iproc.h"
+
+static int iproc_pcie_pltfm_probe(struct platform_device *pdev)
+{
+ struct iproc_pcie *pcie;
+ struct device_node *np = pdev->dev.of_node;
+ struct resource reg;
+ resource_size_t iobase = 0;
+ LIST_HEAD(res);
+ int ret;
+
+ pcie = devm_kzalloc(&pdev->dev, sizeof(struct iproc_pcie), GFP_KERNEL);
+ if (!pcie)
+ return -ENOMEM;
+
+ pcie->dev = &pdev->dev;
+ platform_set_drvdata(pdev, pcie);
+
+ ret = of_address_to_resource(np, 0, ®);
+ if (ret < 0) {
+ dev_err(pcie->dev, "unable to obtain controller resources\n");
+ return ret;
+ }
+
+ pcie->base = devm_ioremap(pcie->dev, reg.start, resource_size(®));
+ if (!pcie->base) {
+ dev_err(pcie->dev, "unable to map controller registers\n");
+ return -ENOMEM;
+ }
+
+ /* PHY use is optional */
+ pcie->phy = devm_phy_get(&pdev->dev, "pcie-phy");
+ if (IS_ERR(pcie->phy)) {
+ if (PTR_ERR(pcie->phy) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
+ pcie->phy = NULL;
+ }
+
+ ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &iobase);
+ if (ret) {
+ dev_err(pcie->dev,
+ "unable to get PCI host bridge resources\n");
+ return ret;
+ }
+
+ pcie->resources = &res;
+
+ ret = iproc_pcie_setup(pcie);
+ if (ret) {
+ dev_err(pcie->dev, "PCIe controller setup failed\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int iproc_pcie_pltfm_remove(struct platform_device *pdev)
+{
+ struct iproc_pcie *pcie = platform_get_drvdata(pdev);
+
+ return iproc_pcie_remove(pcie);
+}
+
+static const struct of_device_id iproc_pcie_of_match_table[] = {
+ { .compatible = "brcm,iproc-pcie", },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, iproc_pcie_of_match_table);
+
+static struct platform_driver iproc_pcie_pltfm_driver = {
+ .driver = {
+ .name = "iproc-pcie",
+ .of_match_table = of_match_ptr(iproc_pcie_of_match_table),
+ },
+ .probe = iproc_pcie_pltfm_probe,
+ .remove = iproc_pcie_pltfm_remove,
+};
+module_platform_driver(iproc_pcie_pltfm_driver);
+
+MODULE_AUTHOR("Ray Jui <rjui@broadcom.com>");
+MODULE_DESCRIPTION("Broadcom iPROC PCIe platform driver");
+MODULE_LICENSE("GPL v2");
--- /dev/null
+/*
+ * Copyright (C) 2014 Hauke Mehrtens <hauke@hauke-m.de>
+ * Copyright (C) 2015 Broadcom Corporatcommon ion
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/msi.h>
+#include <linux/clk.h>
+#include <linux/module.h>
+#include <linux/mbus.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/of_address.h>
+#include <linux/of_pci.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/phy/phy.h>
+
+#include "pcie-iproc.h"
+
+#define CLK_CONTROL_OFFSET 0x000
+#define EP_MODE_SURVIVE_PERST_SHIFT 1
+#define EP_MODE_SURVIVE_PERST BIT(EP_MODE_SURVIVE_PERST_SHIFT)
+#define RC_PCIE_RST_OUTPUT_SHIFT 0
+#define RC_PCIE_RST_OUTPUT BIT(RC_PCIE_RST_OUTPUT_SHIFT)
+
+#define CFG_IND_ADDR_OFFSET 0x120
+#define CFG_IND_ADDR_MASK 0x00001ffc
+
+#define CFG_IND_DATA_OFFSET 0x124
+
+#define CFG_ADDR_OFFSET 0x1f8
+#define CFG_ADDR_BUS_NUM_SHIFT 20
+#define CFG_ADDR_BUS_NUM_MASK 0x0ff00000
+#define CFG_ADDR_DEV_NUM_SHIFT 15
+#define CFG_ADDR_DEV_NUM_MASK 0x000f8000
+#define CFG_ADDR_FUNC_NUM_SHIFT 12
+#define CFG_ADDR_FUNC_NUM_MASK 0x00007000
+#define CFG_ADDR_REG_NUM_SHIFT 2
+#define CFG_ADDR_REG_NUM_MASK 0x00000ffc
+#define CFG_ADDR_CFG_TYPE_SHIFT 0
+#define CFG_ADDR_CFG_TYPE_MASK 0x00000003
+
+#define CFG_DATA_OFFSET 0x1fc
+
+#define SYS_RC_INTX_EN 0x330
+#define SYS_RC_INTX_MASK 0xf
+
+static inline struct iproc_pcie *sys_to_pcie(struct pci_sys_data *sys)
+{
+ return sys->private_data;
+}
+
+/**
+ * Note access to the configuration registers are protected at the higher layer
+ * by 'pci_lock' in drivers/pci/access.c
+ */
+static void __iomem *iproc_pcie_map_cfg_bus(struct pci_bus *bus,
+ unsigned int devfn,
+ int where)
+{
+ struct pci_sys_data *sys = bus->sysdata;
+ struct iproc_pcie *pcie = sys_to_pcie(sys);
+ unsigned slot = PCI_SLOT(devfn);
+ unsigned fn = PCI_FUNC(devfn);
+ unsigned busno = bus->number;
+ u32 val;
+
+ /* root complex access */
+ if (busno == 0) {
+ if (slot >= 1)
+ return NULL;
+ writel(where & CFG_IND_ADDR_MASK,
+ pcie->base + CFG_IND_ADDR_OFFSET);
+ return (pcie->base + CFG_IND_DATA_OFFSET);
+ }
+
+ if (fn > 1)
+ return NULL;
+
+ /* EP device access */
+ val = (busno << CFG_ADDR_BUS_NUM_SHIFT) |
+ (slot << CFG_ADDR_DEV_NUM_SHIFT) |
+ (fn << CFG_ADDR_FUNC_NUM_SHIFT) |
+ (where & CFG_ADDR_REG_NUM_MASK) |
+ (1 & CFG_ADDR_CFG_TYPE_MASK);
+ writel(val, pcie->base + CFG_ADDR_OFFSET);
+
+ return (pcie->base + CFG_DATA_OFFSET);
+}
+
+static struct pci_ops iproc_pcie_ops = {
+ .map_bus = iproc_pcie_map_cfg_bus,
+ .read = pci_generic_config_read32,
+ .write = pci_generic_config_write32,
+};
+
+static void iproc_pcie_reset(struct iproc_pcie *pcie)
+{
+ u32 val;
+
+ /*
+ * Configure the PCIe controller as root complex and send a downstream
+ * reset
+ */
+ val = EP_MODE_SURVIVE_PERST | RC_PCIE_RST_OUTPUT;
+ writel(val, pcie->base + CLK_CONTROL_OFFSET);
+ udelay(250);
+ val &= ~EP_MODE_SURVIVE_PERST;
+ writel(val, pcie->base + CLK_CONTROL_OFFSET);
+ msleep(250);
+}
+
+static int iproc_pcie_check_link(struct iproc_pcie *pcie, struct pci_bus *bus)
+{
+ u8 hdr_type;
+ u32 link_ctrl;
+ u16 pos, link_status;
+ int link_is_active = 0;
+
+ /* make sure we are not in EP mode */
+ pci_bus_read_config_byte(bus, 0, PCI_HEADER_TYPE, &hdr_type);
+ if ((hdr_type & 0x7f) != PCI_HEADER_TYPE_BRIDGE) {
+ dev_err(pcie->dev, "in EP mode, hdr=%#02x\n", hdr_type);
+ return -EFAULT;
+ }
+
+ /* force class to PCI_CLASS_BRIDGE_PCI (0x0604) */
+ pci_bus_write_config_word(bus, 0, PCI_CLASS_DEVICE,
+ PCI_CLASS_BRIDGE_PCI);
+
+ /* check link status to see if link is active */
+ pos = pci_bus_find_capability(bus, 0, PCI_CAP_ID_EXP);
+ pci_bus_read_config_word(bus, 0, pos + PCI_EXP_LNKSTA, &link_status);
+ if (link_status & PCI_EXP_LNKSTA_NLW)
+ link_is_active = 1;
+
+ if (!link_is_active) {
+ /* try GEN 1 link speed */
+#define PCI_LINK_STATUS_CTRL_2_OFFSET 0x0dc
+#define PCI_TARGET_LINK_SPEED_MASK 0xf
+#define PCI_TARGET_LINK_SPEED_GEN2 0x2
+#define PCI_TARGET_LINK_SPEED_GEN1 0x1
+ pci_bus_read_config_dword(bus, 0,
+ PCI_LINK_STATUS_CTRL_2_OFFSET,
+ &link_ctrl);
+ if ((link_ctrl & PCI_TARGET_LINK_SPEED_MASK) ==
+ PCI_TARGET_LINK_SPEED_GEN2) {
+ link_ctrl &= ~PCI_TARGET_LINK_SPEED_MASK;
+ link_ctrl |= PCI_TARGET_LINK_SPEED_GEN1;
+ pci_bus_write_config_dword(bus, 0,
+ PCI_LINK_STATUS_CTRL_2_OFFSET,
+ link_ctrl);
+ msleep(100);
+
+ pos = pci_bus_find_capability(bus, 0, PCI_CAP_ID_EXP);
+ pci_bus_read_config_word(bus, 0, pos + PCI_EXP_LNKSTA,
+ &link_status);
+ if (link_status & PCI_EXP_LNKSTA_NLW)
+ link_is_active = 1;
+ }
+ }
+
+ dev_info(pcie->dev, "link: %s\n", link_is_active ? "UP" : "DOWN");
+
+ return link_is_active ? 0 : -ENODEV;
+}
+
+static void iproc_pcie_enable(struct iproc_pcie *pcie)
+{
+ writel(SYS_RC_INTX_MASK, pcie->base + SYS_RC_INTX_EN);
+}
+
+int iproc_pcie_setup(struct iproc_pcie *pcie)
+{
+ int ret;
+ struct pci_bus *bus;
+
+ if (!pcie || !pcie->dev || !pcie->base)
+ return -EINVAL;
+
+ if (pcie->phy) {
+ ret = phy_init(pcie->phy);
+ if (ret) {
+ dev_err(pcie->dev, "unable to initialize PCIe PHY\n");
+ return ret;
+ }
+
+ ret = phy_power_on(pcie->phy);
+ if (ret) {
+ dev_err(pcie->dev, "unable to power on PCIe PHY\n");
+ goto err_exit_phy;
+ }
+
+ }
+
+ iproc_pcie_reset(pcie);
+
+ pcie->sysdata.private_data = pcie;
+
+ bus = pci_create_root_bus(pcie->dev, 0, &iproc_pcie_ops,
+ &pcie->sysdata, pcie->resources);
+ if (!bus) {
+ dev_err(pcie->dev, "unable to create PCI root bus\n");
+ ret = -ENOMEM;
+ goto err_power_off_phy;
+ }
+ pcie->root_bus = bus;
+
+ ret = iproc_pcie_check_link(pcie, bus);
+ if (ret) {
+ dev_err(pcie->dev, "no PCIe EP device detected\n");
+ goto err_rm_root_bus;
+ }
+
+ iproc_pcie_enable(pcie);
+
+ pci_scan_child_bus(bus);
+ pci_assign_unassigned_bus_resources(bus);
+ pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
+ pci_bus_add_devices(bus);
+
+ return 0;
+
+err_rm_root_bus:
+ pci_stop_root_bus(bus);
+ pci_remove_root_bus(bus);
+
+err_power_off_phy:
+ if (pcie->phy)
+ phy_power_off(pcie->phy);
+err_exit_phy:
+ if (pcie->phy)
+ phy_exit(pcie->phy);
+
+ return ret;
+}
+EXPORT_SYMBOL(iproc_pcie_setup);
+
+int iproc_pcie_remove(struct iproc_pcie *pcie)
+{
+ pci_stop_root_bus(pcie->root_bus);
+ pci_remove_root_bus(pcie->root_bus);
+
+ if (pcie->phy) {
+ phy_power_off(pcie->phy);
+ phy_exit(pcie->phy);
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(iproc_pcie_remove);
+
+MODULE_AUTHOR("Ray Jui <rjui@broadcom.com>");
+MODULE_DESCRIPTION("Broadcom iPROC PCIe common driver");
+MODULE_LICENSE("GPL v2");
--- /dev/null
+/*
+ * Copyright (C) 2014-2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _PCIE_IPROC_H
+#define _PCIE_IPROC_H
+
+#define IPROC_PCIE_MAX_NUM_IRQS 6
+
+/**
+ * iProc PCIe device
+ * @dev: pointer to device data structure
+ * @base: PCIe host controller I/O register base
+ * @resources: linked list of all PCI resources
+ * @sysdata: Per PCI controller data
+ * @root_bus: pointer to root bus
+ * @phy: optional PHY device that controls the Serdes
+ * @irqs: interrupt IDs
+ */
+struct iproc_pcie {
+ struct device *dev;
+ void __iomem *base;
+ struct list_head *resources;
+ struct pci_sys_data sysdata;
+ struct pci_bus *root_bus;
+ struct phy *phy;
+ int irqs[IPROC_PCIE_MAX_NUM_IRQS];
+};
+
+int iproc_pcie_setup(struct iproc_pcie *pcie);
+int iproc_pcie_remove(struct iproc_pcie *pcie);
+
+#endif /* _PCIE_IPROC_H */
#define LAR_ENABLE (1 << 1)
/* PCIe address reg & mask */
-#define PCIEPARL(x) (0x03400 + ((x) * 0x20))
-#define PCIEPARH(x) (0x03404 + ((x) * 0x20))
+#define PCIEPALR(x) (0x03400 + ((x) * 0x20))
+#define PCIEPAUR(x) (0x03404 + ((x) * 0x20))
#define PCIEPAMR(x) (0x03408 + ((x) * 0x20))
#define PCIEPTCTLR(x) (0x0340c + ((x) * 0x20))
#define PAR_ENABLE (1 << 31)
else
res_start = res->start;
- rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPARH(win));
- rcar_pci_write_reg(pcie, lower_32_bits(res_start), PCIEPARL(win));
+ rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPAUR(win));
+ rcar_pci_write_reg(pcie, lower_32_bits(res_start) & ~0x7F,
+ PCIEPALR(win));
/* First resource is for IO */
mask = PAR_ENABLE;
/* Enable MSI */
if (IS_ENABLED(CONFIG_PCI_MSI))
- rcar_pci_write_reg(pcie, 0x101f0000, PCIEMSITXR);
+ rcar_pci_write_reg(pcie, 0x801f0000, PCIEMSITXR);
/* Finish initialization - establish a PCI Express link */
rcar_pci_write_reg(pcie, CFINIT, PCIETCTLR);
.host_init = spear13xx_pcie_host_init,
};
-static int __init spear13xx_add_pcie_port(struct pcie_port *pp,
+static int spear13xx_add_pcie_port(struct pcie_port *pp,
struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
return 0;
}
-static int __init spear13xx_pcie_probe(struct platform_device *pdev)
+static int spear13xx_pcie_probe(struct platform_device *pdev)
{
struct spear13xx_pcie *spear13xx_pcie;
struct pcie_port *pp;
};
MODULE_DEVICE_TABLE(of, spear13xx_pcie_of_match);
-static struct platform_driver spear13xx_pcie_driver __initdata = {
+static struct platform_driver spear13xx_pcie_driver = {
.probe = spear13xx_pcie_probe,
.driver = {
.name = "spear-pcie",
}
parent = slot->dev->bus;
- list_for_each_entry(dev, &parent->devices, bus_list)
+ list_for_each_entry(dev, &parent->devices, bus_list) {
if (PCI_SLOT(dev->devfn) != PCI_SLOT(slot->devfn))
continue;
if (pci_is_bridge(dev))
pci_hp_add_bridge(dev);
+ }
pci_assign_unassigned_bridge_resources(parent->self);
*/
static u8 bus_structure_fixup(u8 busno)
{
- struct pci_bus *bus;
+ struct pci_bus *bus, *b;
struct pci_dev *dev;
u16 l;
(l != 0x0000) && (l != 0xffff)) {
debug("%s - Inside bus_structure_fixup()\n",
__func__);
- pci_scan_bus(busno, ibmphp_pci_bus->ops, NULL);
+ b = pci_scan_bus(busno, ibmphp_pci_bus->ops, NULL);
+ if (!b)
+ continue;
+
+ pci_bus_add_devices(b);
break;
}
}
#include <linux/pm_qos.h>
#include "pci.h"
+/*
+ * The UUID is defined in the PCI Firmware Specification available here:
+ * https://www.pcisig.com/members/downloads/pcifw_r3_1_13Dec10.pdf
+ */
+const u8 pci_acpi_dsm_uuid[] = {
+ 0xd0, 0x37, 0xc9, 0xe5, 0x53, 0x35, 0x7a, 0x4d,
+ 0x91, 0x17, 0xea, 0x4d, 0x19, 0xc3, 0x43, 0x4d
+};
+
phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle)
{
acpi_status status = AE_NOT_EXIST;
acpi_handle handle, phandle;
struct pci_bus *pbus;
+ if (acpi_pci_disabled)
+ return -ENODEV;
+
handle = NULL;
for (pbus = dev->bus; pbus; pbus = pbus->parent) {
handle = acpi_pci_get_bridge_handle(pbus);
void acpi_pci_add_bus(struct pci_bus *bus)
{
+ union acpi_object *obj;
+ struct pci_host_bridge *bridge;
+
if (acpi_pci_disabled || !bus->bridge)
return;
acpi_pci_slot_enumerate(bus);
acpiphp_enumerate_slots(bus);
+
+ /*
+ * For a host bridge, check its _DSM for function 8 and if
+ * that is available, mark it in pci_host_bridge.
+ */
+ if (!pci_is_root_bus(bus))
+ return;
+
+ obj = acpi_evaluate_dsm(ACPI_HANDLE(bus->bridge), pci_acpi_dsm_uuid, 3,
+ RESET_DELAY_DSM, NULL);
+ if (!obj)
+ return;
+
+ if (obj->type == ACPI_TYPE_INTEGER && obj->integer.value == 1) {
+ bridge = pci_find_host_bridge(bus);
+ bridge->ignore_reset_delay = 1;
+ }
+ ACPI_FREE(obj);
}
void acpi_pci_remove_bus(struct pci_bus *bus)
check_children);
}
+/**
+ * pci_acpi_optimize_delay - optimize PCI D3 and D3cold delay from ACPI
+ * @pdev: the PCI device whose delay is to be updated
+ * @adev: the companion ACPI device of this PCI device
+ *
+ * Update the d3_delay and d3cold_delay of a PCI device from the ACPI _DSM
+ * control method of either the device itself or the PCI host bridge.
+ *
+ * Function 8, "Reset Delay," applies to the entire hierarchy below a PCI
+ * host bridge. If it returns one, the OS may assume that all devices in
+ * the hierarchy have already completed power-on reset delays.
+ *
+ * Function 9, "Device Readiness Durations," applies only to the object
+ * where it is located. It returns delay durations required after various
+ * events if the device requires less time than the spec requires. Delays
+ * from this function take precedence over the Reset Delay function.
+ *
+ * These _DSM functions are defined by the draft ECN of January 28, 2014,
+ * titled "ACPI additions for FW latency optimizations."
+ */
+static void pci_acpi_optimize_delay(struct pci_dev *pdev,
+ acpi_handle handle)
+{
+ struct pci_host_bridge *bridge = pci_find_host_bridge(pdev->bus);
+ int value;
+ union acpi_object *obj, *elements;
+
+ if (bridge->ignore_reset_delay)
+ pdev->d3cold_delay = 0;
+
+ obj = acpi_evaluate_dsm(handle, pci_acpi_dsm_uuid, 3,
+ FUNCTION_DELAY_DSM, NULL);
+ if (!obj)
+ return;
+
+ if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 5) {
+ elements = obj->package.elements;
+ if (elements[0].type == ACPI_TYPE_INTEGER) {
+ value = (int)elements[0].integer.value / 1000;
+ if (value < PCI_PM_D3COLD_WAIT)
+ pdev->d3cold_delay = value;
+ }
+ if (elements[3].type == ACPI_TYPE_INTEGER) {
+ value = (int)elements[3].integer.value / 1000;
+ if (value < PCI_PM_D3_WAIT)
+ pdev->d3_delay = value;
+ }
+ }
+ ACPI_FREE(obj);
+}
+
static void pci_acpi_setup(struct device *dev)
{
struct pci_dev *pci_dev = to_pci_dev(dev);
if (!adev)
return;
+ pci_acpi_optimize_delay(pci_dev, adev->handle);
+
pci_acpi_add_pm_notifier(adev, pci_dev);
if (!adev->wakeup.flags.valid)
return;
#include <linux/pci-acpi.h>
#include "pci.h"
-#define DEVICE_LABEL_DSM 0x07
-
#ifdef CONFIG_DMI
enum smbios_attr_enum {
SMBIOS_ATTR_NONE = 0,
#endif
#ifdef CONFIG_ACPI
-static const char device_label_dsm_uuid[] = {
- 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,
- 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D
-};
-
enum acpi_attr_enum {
ACPI_ATTR_LABEL_SHOW,
ACPI_ATTR_INDEX_SHOW,
if (!handle)
return -1;
- obj = acpi_evaluate_dsm(handle, device_label_dsm_uuid, 0x2,
+ obj = acpi_evaluate_dsm(handle, pci_acpi_dsm_uuid, 0x2,
DEVICE_LABEL_DSM, NULL);
if (!obj)
return -1;
if (!handle)
return false;
- return !!acpi_check_dsm(handle, device_label_dsm_uuid, 0x2,
+ return !!acpi_check_dsm(handle, pci_acpi_dsm_uuid, 0x2,
1 << DEVICE_LABEL_DSM);
}
#ifdef CONFIG_HAS_IOMEM
void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar)
{
+ struct resource *res = &pdev->resource[bar];
+
/*
* Make sure the BAR is actually a memory resource, not an IO resource
*/
- if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
- WARN_ON(1);
+ if (res->flags & IORESOURCE_UNSET || !(res->flags & IORESOURCE_MEM)) {
+ dev_warn(&pdev->dev, "can't ioremap BAR %d: %pR\n", bar, res);
return NULL;
}
- return ioremap_nocache(pci_resource_start(pdev, bar),
- pci_resource_len(pdev, bar));
+ return ioremap_nocache(res->start, resource_size(res));
}
EXPORT_SYMBOL_GPL(pci_ioremap_bar);
#endif
u8 pos, int cap, int *ttl)
{
u8 id;
+ u16 ent;
+
+ pci_bus_read_config_byte(bus, devfn, pos, &pos);
while ((*ttl)--) {
- pci_bus_read_config_byte(bus, devfn, pos, &pos);
if (pos < 0x40)
break;
pos &= ~3;
- pci_bus_read_config_byte(bus, devfn, pos + PCI_CAP_LIST_ID,
- &id);
+ pci_bus_read_config_word(bus, devfn, pos, &ent);
+
+ id = ent & 0xff;
if (id == 0xff)
break;
if (id == cap)
return pos;
- pos += PCI_CAP_LIST_NEXT;
+ pos = (ent >> 8);
}
return 0;
}
*pinp = pin;
return PCI_SLOT(dev->devfn);
}
+EXPORT_SYMBOL_GPL(pci_common_swizzle);
/**
* pci_release_region - Release a PCI bar
}
#endif
+struct pci_host_bridge *pci_find_host_bridge(struct pci_bus *bus);
+
#endif /* DRIVERS_PCI_H */
static void __print_tlp_header(struct pci_dev *dev,
struct aer_header_log_regs *t)
{
- unsigned char *tlp = (unsigned char *)&t;
-
- dev_err(&dev->dev, " TLP Header:"
- " %02x%02x%02x%02x %02x%02x%02x%02x"
- " %02x%02x%02x%02x %02x%02x%02x%02x\n",
- *(tlp + 3), *(tlp + 2), *(tlp + 1), *tlp,
- *(tlp + 7), *(tlp + 6), *(tlp + 5), *(tlp + 4),
- *(tlp + 11), *(tlp + 10), *(tlp + 9),
- *(tlp + 8), *(tlp + 15), *(tlp + 14),
- *(tlp + 13), *(tlp + 12));
+ dev_err(&dev->dev, " TLP Header: %08x %08x %08x %08x\n",
+ t->dw0, t->dw1, t->dw2, t->dw3);
}
static void __aer_print_error(struct pci_dev *dev,
}
EXPORT_SYMBOL(pci_disable_link_state);
-void pcie_clear_aspm(struct pci_bus *bus)
-{
- struct pci_dev *child;
-
- if (aspm_force)
- return;
-
- /*
- * Clear any ASPM setup that the firmware has carried out on this bus
- */
- list_for_each_entry(child, &bus->devices, bus_list) {
- __pci_disable_link_state(child, PCIE_LINK_STATE_L0S |
- PCIE_LINK_STATE_L1 |
- PCIE_LINK_STATE_CLKPM,
- false, true);
- }
-}
-
static int pcie_aspm_set_policy(const char *val, struct kernel_param *kp)
{
int i;
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/pci.h>
+#include <linux/of_pci.h>
#include <linux/pci_hotplug.h>
#include <linux/slab.h>
#include <linux/module.h>
dev->dev.dma_mask = &dev->dma_mask;
dev->dev.dma_parms = &dev->dma_parms;
dev->dev.coherent_dma_mask = 0xffffffffull;
+ of_pci_dma_configure(dev);
pci_set_dma_max_seg_size(dev, 65536);
pci_set_dma_seg_boundary(dev, 0xffffffff);
kfree(b);
return NULL;
}
+EXPORT_SYMBOL_GPL(pci_create_root_bus);
int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int bus_max)
{
if (!found)
pci_bus_update_busn_res_end(b, max);
- pci_bus_add_devices(b);
return b;
}
EXPORT_SYMBOL(pci_scan_root_bus);
b = pci_create_root_bus(NULL, bus, ops, sysdata, &resources);
if (b) {
pci_scan_child_bus(b);
- pci_bus_add_devices(b);
} else {
pci_free_resource_list(&resources);
}
|| nhi->subsystem_vendor != 0x2222
|| nhi->subsystem_device != 0x1111)
goto out;
- dev_info(&dev->dev, "quirk: wating for thunderbolt to reestablish pci tunnels...\n");
+ dev_info(&dev->dev, "quirk: waiting for thunderbolt to reestablish PCI tunnels...\n");
device_pm_wait_for_dev(&dev->dev, &nhi->dev);
out:
pci_dev_put(nhi);
{ PCI_VENDOR_ID_INTEL, 0x154F, pci_quirk_mf_endpoint_acs },
{ PCI_VENDOR_ID_INTEL, 0x1551, pci_quirk_mf_endpoint_acs },
{ PCI_VENDOR_ID_INTEL, 0x1558, pci_quirk_mf_endpoint_acs },
+ /* 82580 */
+ { PCI_VENDOR_ID_INTEL, 0x1509, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x150E, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x150F, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x1510, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x1511, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x1516, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x1527, pci_quirk_mf_endpoint_acs },
+ /* 82576 */
+ { PCI_VENDOR_ID_INTEL, 0x10C9, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x10E6, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x10E7, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x10E8, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x150A, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x150D, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x1518, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x1526, pci_quirk_mf_endpoint_acs },
+ /* 82575 */
+ { PCI_VENDOR_ID_INTEL, 0x10A7, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x10A9, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x10D6, pci_quirk_mf_endpoint_acs },
+ /* I350 */
+ { PCI_VENDOR_ID_INTEL, 0x1521, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x1522, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x1523, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x1524, pci_quirk_mf_endpoint_acs },
+ /* 82571 (Quads omitted due to non-ACS switch) */
+ { PCI_VENDOR_ID_INTEL, 0x105E, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x105F, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x1060, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x10D9, pci_quirk_mf_endpoint_acs },
+ /* Intel PCH root ports */
{ PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_pch_acs },
{ 0x19a2, 0x710, pci_quirk_mf_endpoint_acs }, /* Emulex BE3-R */
{ 0x10df, 0x720, pci_quirk_mf_endpoint_acs }, /* Emulex Skyhawk-R */
/* stop the host bridge */
device_release_driver(&host_bridge->dev);
}
+EXPORT_SYMBOL_GPL(pci_stop_root_bus);
void pci_remove_root_bus(struct pci_bus *bus)
{
/* remove the host bridge */
device_unregister(&host_bridge->dev);
}
+EXPORT_SYMBOL_GPL(pci_remove_root_bus);
__pci_bus_assign_resources(bus, &add_list, NULL);
BUG_ON(!list_empty(&add_list));
}
+EXPORT_SYMBOL_GPL(pci_assign_unassigned_bus_resources);
for_each_pci_dev(dev)
pdev_fixup_irq(dev, swizzle, map_irq);
}
+EXPORT_SYMBOL_GPL(pci_fixup_irqs);
if (!root) {
dev_info(&dev->dev, "can't claim BAR %d %pR: no compatible bridge window\n",
resource, res);
+ res->flags |= IORESOURCE_UNSET;
return -EINVAL;
}
if (conflict) {
dev_info(&dev->dev, "can't claim BAR %d %pR: address conflict with %s %pR\n",
resource, res, conflict->name, conflict);
+ res->flags |= IORESOURCE_UNSET;
return -EBUSY;
}
depends on OF
select GENERIC_PHY
+config PHY_DM816X_USB
+ tristate "TI dm816x USB PHY driver"
+ depends on ARCH_OMAP2PLUS
+ select GENERIC_PHY
+ help
+ Enable this for dm816x USB to work.
+
config PHY_EXYNOS_MIPI_VIDEO
tristate "S5P/EXYNOS SoC series MIPI CSI-2/DSI PHY driver"
depends on HAS_IOMEM
This driver controls the entire USB PHY block, both the USB OTG
parts, as well as the 2 regular USB 2 host PHYs.
+config PHY_SUN9I_USB
+ tristate "Allwinner sun9i SoC USB PHY driver"
+ depends on ARCH_SUNXI && HAS_IOMEM && OF
+ depends on RESET_CONTROLLER
+ select GENERIC_PHY
+ help
+ Enable this to support the transceiver that is part of Allwinner
+ sun9i SoCs.
+
+ This driver controls each individual USB 2 host PHY.
+
config PHY_SAMSUNG_USB2
tristate "Samsung USB 2.0 PHY driver"
depends on HAS_IOMEM
obj-$(CONFIG_GENERIC_PHY) += phy-core.o
obj-$(CONFIG_PHY_BERLIN_USB) += phy-berlin-usb.o
obj-$(CONFIG_PHY_BERLIN_SATA) += phy-berlin-sata.o
+obj-$(CONFIG_PHY_DM816X_USB) += phy-dm816x-usb.o
obj-$(CONFIG_ARMADA375_USBCLUSTER_PHY) += phy-armada375-usb2.o
obj-$(CONFIG_BCM_KONA_USB2_PHY) += phy-bcm-kona-usb2.o
obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO) += phy-exynos-dp-video.o
obj-$(CONFIG_PHY_EXYNOS5250_SATA) += phy-exynos5250-sata.o
obj-$(CONFIG_PHY_HIX5HD2_SATA) += phy-hix5hd2-sata.o
obj-$(CONFIG_PHY_SUN4I_USB) += phy-sun4i-usb.o
+obj-$(CONFIG_PHY_SUN9I_USB) += phy-sun9i-usb.o
obj-$(CONFIG_PHY_SAMSUNG_USB2) += phy-exynos-usb2.o
phy-exynos-usb2-y += phy-samsung-usb2.o
phy-exynos-usb2-$(CONFIG_PHY_EXYNOS4210_USB2) += phy-exynos4210-usb2.o
if (priv->nphys == 0)
return -ENODEV;
- priv->phys = devm_kzalloc(dev, priv->nphys * sizeof(*priv->phys),
+ priv->phys = devm_kcalloc(dev, priv->nphys, sizeof(*priv->phys),
GFP_KERNEL);
if (!priv->phys)
return -ENOMEM;
#define MODE_TEST_EN BIT(11)
#define ANA_TEST_DC_CTRL(x) ((x) << 12)
-#define to_phy_berlin_usb_priv(p) \
- container_of((p), struct phy_berlin_usb_priv, phy)
-
static const u32 phy_berlin_pll_dividers[] = {
/* Berlin 2 */
CLK_REF_DIV(0xc) | FEEDBACK_CLK_DIV(0x54),
struct phy_berlin_usb_priv {
void __iomem *base;
- struct phy *phy;
struct reset_control *rst_ctrl;
u32 pll_divider;
};
static int phy_berlin_usb_power_on(struct phy *phy)
{
- struct phy_berlin_usb_priv *priv = dev_get_drvdata(phy->dev.parent);
+ struct phy_berlin_usb_priv *priv = phy_get_drvdata(phy);
reset_control_reset(priv->rst_ctrl);
of_match_device(phy_berlin_sata_of_match, &pdev->dev);
struct phy_berlin_usb_priv *priv;
struct resource *res;
+ struct phy *phy;
struct phy_provider *phy_provider;
priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
priv->pll_divider = *((u32 *)match->data);
- priv->phy = devm_phy_create(&pdev->dev, NULL, &phy_berlin_usb_ops);
- if (IS_ERR(priv->phy)) {
+ phy = devm_phy_create(&pdev->dev, NULL, &phy_berlin_usb_ops);
+ if (IS_ERR(phy)) {
dev_err(&pdev->dev, "failed to create PHY\n");
- return PTR_ERR(priv->phy);
+ return PTR_ERR(phy);
}
platform_set_drvdata(pdev, priv);
+ phy_set_drvdata(phy, priv);
phy_provider =
devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate);
- if (IS_ERR(phy_provider))
- return PTR_ERR(phy_provider);
-
- return 0;
+ return PTR_ERR_OR_ZERO(phy_provider);
}
static struct platform_driver phy_berlin_usb_driver = {
--- /dev/null
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+#include <linux/slab.h>
+#include <linux/of.h>
+#include <linux/io.h>
+#include <linux/usb/phy_companion.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/pm_runtime.h>
+#include <linux/delay.h>
+#include <linux/phy/phy.h>
+#include <linux/of_platform.h>
+
+#include <linux/mfd/syscon.h>
+
+/*
+ * TRM has two sets of USB_CTRL registers.. The correct register bits
+ * are in TRM section 24.9.8.2 USB_CTRL Register. The TRM documents the
+ * phy as being SR70LX Synopsys USB 2.0 OTG nanoPHY. It also seems at
+ * least dm816x rev c ignores writes to USB_CTRL register, but the TI
+ * kernel is writing to those so it's possible that later revisions
+ * have worknig USB_CTRL register.
+ *
+ * Also note that At least USB_CTRL register seems to be dm816x specific
+ * according to the TRM. It's possible that USBPHY_CTRL is more generic,
+ * but that would have to be checked against the SR70LX documentation
+ * which does not seem to be publicly available.
+ *
+ * Finally, the phy on dm814x and am335x is different from dm816x.
+ */
+#define DM816X_USB_CTRL_PHYCLKSRC BIT(8) /* 1 = PLL ref clock */
+#define DM816X_USB_CTRL_PHYSLEEP1 BIT(1) /* Enable the first phy */
+#define DM816X_USB_CTRL_PHYSLEEP0 BIT(0) /* Enable the second phy */
+
+#define DM816X_USBPHY_CTRL_TXRISETUNE 1
+#define DM816X_USBPHY_CTRL_TXVREFTUNE 0xc
+#define DM816X_USBPHY_CTRL_TXPREEMTUNE 0x2
+
+struct dm816x_usb_phy {
+ struct regmap *syscon;
+ struct device *dev;
+ unsigned int instance;
+ struct clk *refclk;
+ struct usb_phy phy;
+ unsigned int usb_ctrl; /* Shared between phy0 and phy1 */
+ unsigned int usbphy_ctrl;
+};
+
+static int dm816x_usb_phy_set_host(struct usb_otg *otg, struct usb_bus *host)
+{
+ otg->host = host;
+ if (!host)
+ otg->state = OTG_STATE_UNDEFINED;
+
+ return 0;
+}
+
+static int dm816x_usb_phy_set_peripheral(struct usb_otg *otg,
+ struct usb_gadget *gadget)
+{
+ otg->gadget = gadget;
+ if (!gadget)
+ otg->state = OTG_STATE_UNDEFINED;
+
+ return 0;
+}
+
+static int dm816x_usb_phy_init(struct phy *x)
+{
+ struct dm816x_usb_phy *phy = phy_get_drvdata(x);
+ unsigned int val;
+ int error;
+
+ if (clk_get_rate(phy->refclk) != 24000000)
+ dev_warn(phy->dev, "nonstandard phy refclk\n");
+
+ /* Set PLL ref clock and put phys to sleep */
+ error = regmap_update_bits(phy->syscon, phy->usb_ctrl,
+ DM816X_USB_CTRL_PHYCLKSRC |
+ DM816X_USB_CTRL_PHYSLEEP1 |
+ DM816X_USB_CTRL_PHYSLEEP0,
+ 0);
+ regmap_read(phy->syscon, phy->usb_ctrl, &val);
+ if ((val & 3) != 0)
+ dev_info(phy->dev,
+ "Working dm816x USB_CTRL! (0x%08x)\n",
+ val);
+
+ /*
+ * TI kernel sets these values for "symmetrical eye diagram and
+ * better signal quality" so let's assume somebody checked the
+ * values with a scope and set them here too.
+ */
+ regmap_read(phy->syscon, phy->usbphy_ctrl, &val);
+ val |= DM816X_USBPHY_CTRL_TXRISETUNE |
+ DM816X_USBPHY_CTRL_TXVREFTUNE |
+ DM816X_USBPHY_CTRL_TXPREEMTUNE;
+ regmap_write(phy->syscon, phy->usbphy_ctrl, val);
+
+ return 0;
+}
+
+static struct phy_ops ops = {
+ .init = dm816x_usb_phy_init,
+ .owner = THIS_MODULE,
+};
+
+static int dm816x_usb_phy_runtime_suspend(struct device *dev)
+{
+ struct dm816x_usb_phy *phy = dev_get_drvdata(dev);
+ unsigned int mask, val;
+ int error = 0;
+
+ mask = BIT(phy->instance);
+ val = ~BIT(phy->instance);
+ error = regmap_update_bits(phy->syscon, phy->usb_ctrl,
+ mask, val);
+ if (error)
+ dev_err(phy->dev, "phy%i failed to power off\n",
+ phy->instance);
+ clk_disable(phy->refclk);
+
+ return 0;
+}
+
+static int dm816x_usb_phy_runtime_resume(struct device *dev)
+{
+ struct dm816x_usb_phy *phy = dev_get_drvdata(dev);
+ unsigned int mask, val;
+ int error;
+
+ error = clk_enable(phy->refclk);
+ if (error)
+ return error;
+
+ /*
+ * Note that at least dm816x rev c does not seem to do
+ * anything with the USB_CTRL register. But let's follow
+ * what the TI tree is doing in case later revisions use
+ * USB_CTRL.
+ */
+ mask = BIT(phy->instance);
+ val = BIT(phy->instance);
+ error = regmap_update_bits(phy->syscon, phy->usb_ctrl,
+ mask, val);
+ if (error) {
+ dev_err(phy->dev, "phy%i failed to power on\n",
+ phy->instance);
+ clk_disable(phy->refclk);
+ return error;
+ }
+
+ return 0;
+}
+
+static UNIVERSAL_DEV_PM_OPS(dm816x_usb_phy_pm_ops,
+ dm816x_usb_phy_runtime_suspend,
+ dm816x_usb_phy_runtime_resume,
+ NULL);
+
+#ifdef CONFIG_OF
+static const struct of_device_id dm816x_usb_phy_id_table[] = {
+ {
+ .compatible = "ti,dm8168-usb-phy",
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, dm816x_usb_phy_id_table);
+#endif
+
+static int dm816x_usb_phy_probe(struct platform_device *pdev)
+{
+ struct dm816x_usb_phy *phy;
+ struct resource *res;
+ struct phy *generic_phy;
+ struct phy_provider *phy_provider;
+ struct usb_otg *otg;
+ const struct of_device_id *of_id;
+ const struct usb_phy_data *phy_data;
+ int error;
+
+ of_id = of_match_device(of_match_ptr(dm816x_usb_phy_id_table),
+ &pdev->dev);
+ if (!of_id)
+ return -EINVAL;
+
+ phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL);
+ if (!phy)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res)
+ return -ENOENT;
+
+ phy->syscon = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
+ "syscon");
+ if (IS_ERR(phy->syscon))
+ return PTR_ERR(phy->syscon);
+
+ /*
+ * According to sprs614e.pdf, the first usb_ctrl is shared and
+ * the second instance for usb_ctrl is reserved.. Also the
+ * register bits are different from earlier TRMs.
+ */
+ phy->usb_ctrl = 0x20;
+ phy->usbphy_ctrl = (res->start & 0xff) + 4;
+ if (phy->usbphy_ctrl == 0x2c)
+ phy->instance = 1;
+
+ phy_data = of_id->data;
+
+ otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL);
+ if (!otg)
+ return -ENOMEM;
+
+ phy->dev = &pdev->dev;
+ phy->phy.dev = phy->dev;
+ phy->phy.label = "dm8168_usb_phy";
+ phy->phy.otg = otg;
+ phy->phy.type = USB_PHY_TYPE_USB2;
+ otg->set_host = dm816x_usb_phy_set_host;
+ otg->set_peripheral = dm816x_usb_phy_set_peripheral;
+ otg->usb_phy = &phy->phy;
+
+ platform_set_drvdata(pdev, phy);
+
+ phy->refclk = devm_clk_get(phy->dev, "refclk");
+ if (IS_ERR(phy->refclk))
+ return PTR_ERR(phy->refclk);
+ error = clk_prepare(phy->refclk);
+ if (error)
+ return error;
+
+ pm_runtime_enable(phy->dev);
+ generic_phy = devm_phy_create(phy->dev, NULL, &ops);
+ if (IS_ERR(generic_phy))
+ return PTR_ERR(generic_phy);
+
+ phy_set_drvdata(generic_phy, phy);
+
+ phy_provider = devm_of_phy_provider_register(phy->dev,
+ of_phy_simple_xlate);
+ if (IS_ERR(phy_provider))
+ return PTR_ERR(phy_provider);
+
+ usb_add_phy_dev(&phy->phy);
+
+ return 0;
+}
+
+static int dm816x_usb_phy_remove(struct platform_device *pdev)
+{
+ struct dm816x_usb_phy *phy = platform_get_drvdata(pdev);
+
+ usb_remove_phy(&phy->phy);
+ pm_runtime_disable(phy->dev);
+ clk_unprepare(phy->refclk);
+
+ return 0;
+}
+
+static struct platform_driver dm816x_usb_phy_driver = {
+ .probe = dm816x_usb_phy_probe,
+ .remove = dm816x_usb_phy_remove,
+ .driver = {
+ .name = "dm816x-usb-phy",
+ .pm = &dm816x_usb_phy_pm_ops,
+ .of_match_table = of_match_ptr(dm816x_usb_phy_id_table),
+ },
+};
+
+module_platform_driver(dm816x_usb_phy_driver);
+
+MODULE_ALIAS("platform:dm816x_usb");
+MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>");
+MODULE_DESCRIPTION("dm816x usb phy driver");
+MODULE_LICENSE("GPL v2");
.has_common_clk_gate = true,
};
+static const struct exynos5_usbdrd_phy_drvdata exynos5433_usbdrd_phy = {
+ .phy_cfg = phy_cfg_exynos5,
+ .pmu_offset_usbdrd0_phy = EXYNOS5_USBDRD_PHY_CONTROL,
+ .pmu_offset_usbdrd1_phy = EXYNOS5433_USBHOST30_PHY_CONTROL,
+ .has_common_clk_gate = false,
+};
+
static const struct exynos5_usbdrd_phy_drvdata exynos7_usbdrd_phy = {
.phy_cfg = phy_cfg_exynos5,
.pmu_offset_usbdrd0_phy = EXYNOS5_USBDRD_PHY_CONTROL,
}, {
.compatible = "samsung,exynos5420-usbdrd-phy",
.data = &exynos5420_usbdrd_phy
+ }, {
+ .compatible = "samsung,exynos5433-usbdrd-phy",
+ .data = &exynos5433_usbdrd_phy
}, {
.compatible = "samsung,exynos7-usbdrd-phy",
.data = &exynos7_usbdrd_phy
}
provider = devm_of_phy_provider_register(&pdev->dev, miphy28lp_xlate);
- if (IS_ERR(provider))
- return PTR_ERR(provider);
-
- return 0;
+ return PTR_ERR_OR_ZERO(provider);
}
static const struct of_device_id miphy28lp_of_match[] = {
#include <linux/mfd/syscon.h>
#include <linux/regmap.h>
-#include <dt-bindings/phy/phy-miphy365x.h>
+#include <dt-bindings/phy/phy.h>
#define HFC_TIMEOUT 100
static int miphy365x_set_path(struct miphy365x_phy *miphy_phy,
struct miphy365x_dev *miphy_dev)
{
- bool sata = (miphy_phy->type == MIPHY_TYPE_SATA);
+ bool sata = (miphy_phy->type == PHY_TYPE_SATA);
return regmap_update_bits(miphy_dev->regmap,
miphy_phy->ctrlreg,
}
/* Initialise Miphy for PCIe or SATA */
- if (miphy_phy->type == MIPHY_TYPE_PCIE)
+ if (miphy_phy->type == PHY_TYPE_PCIE)
ret = miphy365x_init_pcie_port(miphy_phy, miphy_dev);
else
ret = miphy365x_init_sata_port(miphy_phy, miphy_dev);
return ret;
}
- if (!((!strncmp(name, "sata", 4) && type == MIPHY_TYPE_SATA) ||
- (!strncmp(name, "pcie", 4) && type == MIPHY_TYPE_PCIE)))
+ if (!((!strncmp(name, "sata", 4) && type == PHY_TYPE_SATA) ||
+ (!strncmp(name, "pcie", 4) && type == PHY_TYPE_PCIE)))
return 0;
miphy_phy->base = of_iomap(phynode, index);
miphy_phy->type = args->args[0];
- if (!(miphy_phy->type == MIPHY_TYPE_SATA ||
- miphy_phy->type == MIPHY_TYPE_PCIE)) {
+ if (!(miphy_phy->type == PHY_TYPE_SATA ||
+ miphy_phy->type == PHY_TYPE_PCIE)) {
dev_err(dev, "Unsupported device type: %d\n", miphy_phy->type);
return ERR_PTR(-EINVAL);
}
return;
ctrl_phy = dev_get_drvdata(dev);
-
if (!ctrl_phy) {
dev_err(dev, "Invalid control phy device\n");
return;
}
EXPORT_SYMBOL_GPL(omap_control_usb_set_mode);
-#ifdef CONFIG_OF
-
static const enum omap_control_phy_type otghs_data = OMAP_CTRL_TYPE_OTGHS;
static const enum omap_control_phy_type usb2_data = OMAP_CTRL_TYPE_USB2;
static const enum omap_control_phy_type pipe3_data = OMAP_CTRL_TYPE_PIPE3;
{},
};
MODULE_DEVICE_TABLE(of, omap_control_phy_id_table);
-#endif
-
static int omap_control_phy_probe(struct platform_device *pdev)
{
const struct of_device_id *of_id;
struct omap_control_phy *control_phy;
- of_id = of_match_device(of_match_ptr(omap_control_phy_id_table),
- &pdev->dev);
+ of_id = of_match_device(omap_control_phy_id_table, &pdev->dev);
if (!of_id)
return -EINVAL;
.probe = omap_control_phy_probe,
.driver = {
.name = "omap-control-phy",
- .of_match_table = of_match_ptr(omap_control_phy_id_table),
+ .of_match_table = omap_control_phy_id_table,
},
};
.owner = THIS_MODULE,
};
-#ifdef CONFIG_OF
static const struct usb_phy_data omap_usb2_data = {
.label = "omap_usb2",
.flags = OMAP_USB2_HAS_START_SRP | OMAP_USB2_HAS_SET_VBUS,
{},
};
MODULE_DEVICE_TABLE(of, omap_usb2_id_table);
-#endif
static int omap_usb2_probe(struct platform_device *pdev)
{
const struct of_device_id *of_id;
struct usb_phy_data *phy_data;
- of_id = of_match_device(of_match_ptr(omap_usb2_id_table), &pdev->dev);
+ of_id = of_match_device(omap_usb2_id_table, &pdev->dev);
if (!of_id)
return -EINVAL;
.driver = {
.name = "omap-usb2",
.pm = DEV_PM_OPS,
- .of_match_table = of_match_ptr(omap_usb2_id_table),
+ .of_match_table = omap_usb2_id_table,
},
};
out:
return ret;
}
+EXPORT_SYMBOL_GPL(ufs_qcom_phy_calibrate);
struct phy *ufs_qcom_phy_generic_probe(struct platform_device *pdev,
struct ufs_qcom_phy *common_cfg,
if (IS_ERR(generic_phy)) {
err = PTR_ERR(generic_phy);
dev_err(dev, "%s: failed to create phy %d\n", __func__, err);
+ generic_phy = NULL;
goto out;
}
out:
return generic_phy;
}
+EXPORT_SYMBOL_GPL(ufs_qcom_phy_generic_probe);
/*
* This assumes the embedded phy structure inside generic_phy is of type
{
return (struct ufs_qcom_phy *)phy_get_drvdata(generic_phy);
}
+EXPORT_SYMBOL_GPL(get_ufs_qcom_phy);
static
int ufs_qcom_phy_base_init(struct platform_device *pdev,
int err = 0;
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phy_mem");
- if (!res) {
- dev_err(dev, "%s: phy_mem resource not found\n", __func__);
- err = -ENOMEM;
- goto out;
- }
-
phy_common->mmio = devm_ioremap_resource(dev, res);
if (IS_ERR((void const *)phy_common->mmio)) {
err = PTR_ERR((void const *)phy_common->mmio);
phy_common->mmio = NULL;
dev_err(dev, "%s: ioremap for phy_mem resource failed %d\n",
__func__, err);
- goto out;
+ return err;
}
/* "dev_ref_clk_ctrl_mem" is optional resource */
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"dev_ref_clk_ctrl_mem");
- if (!res) {
- dev_dbg(dev, "%s: dev_ref_clk_ctrl_mem resource not found\n",
- __func__);
- goto out;
- }
-
phy_common->dev_ref_clk_ctrl_mmio = devm_ioremap_resource(dev, res);
- if (IS_ERR((void const *)phy_common->dev_ref_clk_ctrl_mmio)) {
- err = PTR_ERR((void const *)phy_common->dev_ref_clk_ctrl_mmio);
+ if (IS_ERR((void const *)phy_common->dev_ref_clk_ctrl_mmio))
phy_common->dev_ref_clk_ctrl_mmio = NULL;
- dev_err(dev, "%s: ioremap for dev_ref_clk_ctrl_mem resource failed %d\n",
- __func__, err);
- }
-out:
- return err;
+ return 0;
}
static int __ufs_qcom_phy_clk_get(struct phy *phy,
out:
return err;
}
+EXPORT_SYMBOL_GPL(ufs_qcom_phy_init_clks);
int
ufs_qcom_phy_init_vregulators(struct phy *generic_phy,
out:
return err;
}
+EXPORT_SYMBOL_GPL(ufs_qcom_phy_init_vregulators);
static int __ufs_qcom_phy_init_vreg(struct phy *phy,
struct ufs_qcom_phy_vreg *vreg, const char *name, bool optional)
goto out;
}
uA_load = on ? vreg->max_uA : 0;
- ret = regulator_set_optimum_mode(reg, uA_load);
+ ret = regulator_set_load(reg, uA_load);
if (ret >= 0) {
/*
- * regulator_set_optimum_mode() returns new regulator
+ * regulator_set_load() returns new regulator
* mode upon success.
*/
ret = 0;
return 0;
}
+EXPORT_SYMBOL_GPL(ufs_qcom_phy_remove);
int ufs_qcom_phy_exit(struct phy *generic_phy)
{
return 0;
}
+EXPORT_SYMBOL_GPL(ufs_qcom_phy_exit);
int ufs_qcom_phy_is_pcs_ready(struct phy *generic_phy)
{
out:
return err;
}
+EXPORT_SYMBOL_GPL(ufs_qcom_phy_power_on);
int ufs_qcom_phy_power_off(struct phy *generic_phy)
{
return 0;
}
+EXPORT_SYMBOL_GPL(ufs_qcom_phy_power_off);
spin_lock(&drv->lock);
ret = inst->cfg->power_on(inst);
spin_unlock(&drv->lock);
+ if (ret)
+ goto err_power_on;
}
return 0;
+err_power_on:
+ clk_disable_unprepare(drv->ref_clk);
err_instance_clk:
clk_disable_unprepare(drv->clk);
err_main_clk:
{
struct samsung_usb2_phy_instance *inst = phy_get_drvdata(phy);
struct samsung_usb2_phy_driver *drv = inst->drv;
- int ret = 0;
+ int ret;
dev_dbg(drv->dev, "Request to power_off \"%s\" usb phy\n",
inst->cfg->label);
spin_lock(&drv->lock);
ret = inst->cfg->power_off(inst);
spin_unlock(&drv->lock);
+ if (ret)
+ return ret;
}
clk_disable_unprepare(drv->ref_clk);
clk_disable_unprepare(drv->clk);
- return ret;
+ return 0;
}
static struct phy_ops samsung_usb2_phy_ops = {
if (args->args_count < 1) {
dev_err(dev, "DT did not pass correct no of args\n");
- return NULL;
+ return ERR_PTR(-ENODEV);
}
priv->mode = args->args[0];
if (priv->mode != SATA && priv->mode != PCIE) {
dev_err(dev, "DT did not pass correct phy mode\n");
- return NULL;
+ return ERR_PTR(-ENODEV);
}
return priv->phy;
if (args->args_count < 1) {
dev_err(dev, "DT did not pass correct no of args\n");
- return NULL;
+ return ERR_PTR(-ENODEV);
}
priv->mode = args->args[0];
if (priv->mode != SATA && priv->mode != PCIE) {
dev_err(dev, "DT did not pass correct phy mode\n");
- return NULL;
+ return ERR_PTR(-ENODEV);
}
return priv->phy;
return ret;
}
- return regmap_update_bits(phy_dev->regmap, phy_dev->cfg->syscfg,
- phy_dev->cfg->oscok, phy_dev->cfg->oscok);
+ ret = regmap_update_bits(phy_dev->regmap, phy_dev->cfg->syscfg,
+ phy_dev->cfg->oscok, phy_dev->cfg->oscok);
+ if (ret)
+ clk_disable_unprepare(phy_dev->clk);
+
+ return ret;
}
static int stih41x_usb_phy_power_off(struct phy *phy)
--- /dev/null
+/*
+ * Allwinner sun9i USB phy driver
+ *
+ * Copyright (C) 2014-2015 Chen-Yu Tsai <wens@csie.org>
+ *
+ * Based on phy-sun4i-usb.c from
+ * Hans de Goede <hdegoede@redhat.com>
+ *
+ * and code from
+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/phy/phy.h>
+#include <linux/usb/of.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
+
+#define SUNXI_AHB_INCR16_BURST_EN BIT(11)
+#define SUNXI_AHB_INCR8_BURST_EN BIT(10)
+#define SUNXI_AHB_INCR4_BURST_EN BIT(9)
+#define SUNXI_AHB_INCRX_ALIGN_EN BIT(8)
+#define SUNXI_ULPI_BYPASS_EN BIT(0)
+
+/* usb1 HSIC specific bits */
+#define SUNXI_EHCI_HS_FORCE BIT(20)
+#define SUNXI_HSIC_CONNECT_DET BIT(17)
+#define SUNXI_HSIC_CONNECT_INT BIT(16)
+#define SUNXI_HSIC BIT(1)
+
+struct sun9i_usb_phy {
+ struct phy *phy;
+ void __iomem *pmu;
+ struct reset_control *reset;
+ struct clk *clk;
+ struct clk *hsic_clk;
+ enum usb_phy_interface type;
+};
+
+static void sun9i_usb_phy_passby(struct sun9i_usb_phy *phy, int enable)
+{
+ u32 bits, reg_value;
+
+ bits = SUNXI_AHB_INCR16_BURST_EN | SUNXI_AHB_INCR8_BURST_EN |
+ SUNXI_AHB_INCR4_BURST_EN | SUNXI_AHB_INCRX_ALIGN_EN |
+ SUNXI_ULPI_BYPASS_EN;
+
+ if (phy->type == USBPHY_INTERFACE_MODE_HSIC)
+ bits |= SUNXI_HSIC | SUNXI_EHCI_HS_FORCE |
+ SUNXI_HSIC_CONNECT_DET | SUNXI_HSIC_CONNECT_INT;
+
+ reg_value = readl(phy->pmu);
+
+ if (enable)
+ reg_value |= bits;
+ else
+ reg_value &= ~bits;
+
+ writel(reg_value, phy->pmu);
+}
+
+static int sun9i_usb_phy_init(struct phy *_phy)
+{
+ struct sun9i_usb_phy *phy = phy_get_drvdata(_phy);
+ int ret;
+
+ ret = clk_prepare_enable(phy->clk);
+ if (ret)
+ goto err_clk;
+
+ ret = clk_prepare_enable(phy->hsic_clk);
+ if (ret)
+ goto err_hsic_clk;
+
+ ret = reset_control_deassert(phy->reset);
+ if (ret)
+ goto err_reset;
+
+ sun9i_usb_phy_passby(phy, 1);
+ return 0;
+
+err_reset:
+ clk_disable_unprepare(phy->hsic_clk);
+
+err_hsic_clk:
+ clk_disable_unprepare(phy->clk);
+
+err_clk:
+ return ret;
+}
+
+static int sun9i_usb_phy_exit(struct phy *_phy)
+{
+ struct sun9i_usb_phy *phy = phy_get_drvdata(_phy);
+
+ sun9i_usb_phy_passby(phy, 0);
+ reset_control_assert(phy->reset);
+ clk_disable_unprepare(phy->hsic_clk);
+ clk_disable_unprepare(phy->clk);
+
+ return 0;
+}
+
+static struct phy_ops sun9i_usb_phy_ops = {
+ .init = sun9i_usb_phy_init,
+ .exit = sun9i_usb_phy_exit,
+ .owner = THIS_MODULE,
+};
+
+static int sun9i_usb_phy_probe(struct platform_device *pdev)
+{
+ struct sun9i_usb_phy *phy;
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ struct phy_provider *phy_provider;
+ struct resource *res;
+
+ phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
+ if (!phy)
+ return -ENOMEM;
+
+ phy->type = of_usb_get_phy_mode(np);
+ if (phy->type == USBPHY_INTERFACE_MODE_HSIC) {
+ phy->clk = devm_clk_get(dev, "hsic_480M");
+ if (IS_ERR(phy->clk)) {
+ dev_err(dev, "failed to get hsic_480M clock\n");
+ return PTR_ERR(phy->clk);
+ }
+
+ phy->hsic_clk = devm_clk_get(dev, "hsic_12M");
+ if (IS_ERR(phy->clk)) {
+ dev_err(dev, "failed to get hsic_12M clock\n");
+ return PTR_ERR(phy->clk);
+ }
+
+ phy->reset = devm_reset_control_get(dev, "hsic");
+ if (IS_ERR(phy->reset)) {
+ dev_err(dev, "failed to get reset control\n");
+ return PTR_ERR(phy->reset);
+ }
+ } else {
+ phy->clk = devm_clk_get(dev, "phy");
+ if (IS_ERR(phy->clk)) {
+ dev_err(dev, "failed to get phy clock\n");
+ return PTR_ERR(phy->clk);
+ }
+
+ phy->reset = devm_reset_control_get(dev, "phy");
+ if (IS_ERR(phy->reset)) {
+ dev_err(dev, "failed to get reset control\n");
+ return PTR_ERR(phy->reset);
+ }
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ phy->pmu = devm_ioremap_resource(dev, res);
+ if (IS_ERR(phy->pmu))
+ return PTR_ERR(phy->pmu);
+
+ phy->phy = devm_phy_create(dev, NULL, &sun9i_usb_phy_ops);
+ if (IS_ERR(phy->phy)) {
+ dev_err(dev, "failed to create PHY\n");
+ return PTR_ERR(phy->phy);
+ }
+
+ phy_set_drvdata(phy->phy, phy);
+ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
+
+ return PTR_ERR_OR_ZERO(phy_provider);
+}
+
+static const struct of_device_id sun9i_usb_phy_of_match[] = {
+ { .compatible = "allwinner,sun9i-a80-usb-phy" },
+ { },
+};
+MODULE_DEVICE_TABLE(of, sun9i_usb_phy_of_match);
+
+static struct platform_driver sun9i_usb_phy_driver = {
+ .probe = sun9i_usb_phy_probe,
+ .driver = {
+ .of_match_table = sun9i_usb_phy_of_match,
+ .name = "sun9i-usb-phy",
+ }
+};
+module_platform_driver(sun9i_usb_phy_driver);
+
+MODULE_DESCRIPTION("Allwinner sun9i USB phy driver");
+MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
+MODULE_LICENSE("GPL");
.owner = THIS_MODULE,
};
-#ifdef CONFIG_OF
static const struct of_device_id ti_pipe3_id_table[];
-#endif
static int ti_pipe3_probe(struct platform_device *pdev)
{
spin_lock_init(&phy->lock);
if (!of_device_is_compatible(node, "ti,phy-pipe3-pcie")) {
- match = of_match_device(of_match_ptr(ti_pipe3_id_table),
- &pdev->dev);
+ match = of_match_device(ti_pipe3_id_table, &pdev->dev);
if (!match)
return -EINVAL;
SET_SYSTEM_SLEEP_PM_OPS(ti_pipe3_suspend, ti_pipe3_resume)
};
-#ifdef CONFIG_OF
static const struct of_device_id ti_pipe3_id_table[] = {
{
.compatible = "ti,phy-usb3",
{}
};
MODULE_DEVICE_TABLE(of, ti_pipe3_id_table);
-#endif
static struct platform_driver ti_pipe3_driver = {
.probe = ti_pipe3_probe,
.driver = {
.name = "ti-pipe3",
.pm = &ti_pipe3_pm_ops,
- .of_match_table = of_match_ptr(ti_pipe3_id_table),
+ .of_match_table = ti_pipe3_id_table,
},
};
struct phy_provider *phy_provider;
struct xgene_phy_ctx *ctx;
struct resource *res;
- int rc = 0;
u32 default_spd[] = DEFAULT_SATA_SPD_SEL;
u32 default_txboost_gain[] = DEFAULT_SATA_TXBOOST_GAIN;
u32 default_txeye_direction[] = DEFAULT_SATA_TXEYEDIRECTION;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
ctx->sds_base = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(ctx->sds_base)) {
- rc = PTR_ERR(ctx->sds_base);
- goto error;
- }
+ if (IS_ERR(ctx->sds_base))
+ return PTR_ERR(ctx->sds_base);
/* Retrieve optional clock */
ctx->clk = clk_get(&pdev->dev, NULL);
ctx->phy = devm_phy_create(ctx->dev, NULL, &xgene_phy_ops);
if (IS_ERR(ctx->phy)) {
dev_dbg(&pdev->dev, "Failed to create PHY\n");
- rc = PTR_ERR(ctx->phy);
- goto error;
+ return PTR_ERR(ctx->phy);
}
phy_set_drvdata(ctx->phy, ctx);
- phy_provider = devm_of_phy_provider_register(ctx->dev,
- xgene_phy_xlate);
- if (IS_ERR(phy_provider)) {
- rc = PTR_ERR(phy_provider);
- goto error;
- }
-
- return 0;
-
-error:
- return rc;
+ phy_provider = devm_of_phy_provider_register(ctx->dev, xgene_phy_xlate);
+ return PTR_ERR_OR_ZERO(phy_provider);
}
static const struct of_device_id xgene_phy_of_match[] = {
help
Say Y here to enable the at91 pinctrl driver
-config PINCTRL_BCM2835
- bool
- select PINMUX
- select PINCONF
-
-config PINCTRL_BCM281XX
- bool "Broadcom BCM281xx pinctrl driver"
- depends on OF && (ARCH_BCM_MOBILE || COMPILE_TEST)
- select PINMUX
+config PINCTRL_AMD
+ bool "AMD GPIO pin control"
+ depends on GPIOLIB
+ select GPIOLIB_IRQCHIP
select PINCONF
select GENERIC_PINCONF
- select REGMAP_MMIO
help
- Say Y here to support Broadcom BCM281xx pinctrl driver, which is used
- for the BCM281xx SoC family, including BCM11130, BCM11140, BCM11351,
- BCM28145, and BCM28155 SoCs. This driver requires the pinctrl
- framework. GPIO is provided by a separate GPIO driver.
+ driver for memory mapped GPIO functionality on AMD platforms
+ (x86 or arm).Most pins are usually muxed to some other
+ functionality by firmware,so only a small amount is available
+ for gpio use.
+
+ Requires ACPI/FDT device enumeration code to set up a platform
+ device.
config PINCTRL_LANTIQ
bool
bool
select PINCTRL_TEGRA
+config PINCTRL_TEGRA210
+ bool
+ select PINCTRL_TEGRA
+
config PINCTRL_TEGRA_XUSB
def_bool y if ARCH_TEGRA
select GENERIC_PHY
help
This selectes the pinctrl driver for Xilinx Zynq.
+source "drivers/pinctrl/bcm/Kconfig"
source "drivers/pinctrl/berlin/Kconfig"
source "drivers/pinctrl/freescale/Kconfig"
source "drivers/pinctrl/intel/Kconfig"
source "drivers/pinctrl/spear/Kconfig"
source "drivers/pinctrl/sunxi/Kconfig"
source "drivers/pinctrl/vt8500/Kconfig"
+source "drivers/pinctrl/mediatek/Kconfig"
config PINCTRL_XWAY
bool
obj-$(CONFIG_PINCTRL_BF54x) += pinctrl-adi2-bf54x.o
obj-$(CONFIG_PINCTRL_BF60x) += pinctrl-adi2-bf60x.o
obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o
-obj-$(CONFIG_PINCTRL_BCM2835) += pinctrl-bcm2835.o
-obj-$(CONFIG_PINCTRL_BCM281XX) += pinctrl-bcm281xx.o
+obj-$(CONFIG_PINCTRL_AMD) += pinctrl-amd.o
obj-$(CONFIG_PINCTRL_FALCON) += pinctrl-falcon.o
obj-$(CONFIG_PINCTRL_MESON) += meson/
obj-$(CONFIG_PINCTRL_PALMAS) += pinctrl-palmas.o
obj-$(CONFIG_PINCTRL_TEGRA30) += pinctrl-tegra30.o
obj-$(CONFIG_PINCTRL_TEGRA114) += pinctrl-tegra114.o
obj-$(CONFIG_PINCTRL_TEGRA124) += pinctrl-tegra124.o
+obj-$(CONFIG_PINCTRL_TEGRA210) += pinctrl-tegra210.o
obj-$(CONFIG_PINCTRL_TEGRA_XUSB) += pinctrl-tegra-xusb.o
obj-$(CONFIG_PINCTRL_TZ1090) += pinctrl-tz1090.o
obj-$(CONFIG_PINCTRL_TZ1090_PDC) += pinctrl-tz1090-pdc.o
obj-$(CONFIG_PINCTRL_ST) += pinctrl-st.o
obj-$(CONFIG_PINCTRL_ZYNQ) += pinctrl-zynq.o
+obj-$(CONFIG_ARCH_BCM) += bcm/
obj-$(CONFIG_ARCH_BERLIN) += berlin/
obj-y += freescale/
obj-$(CONFIG_X86) += intel/
obj-$(CONFIG_PLAT_SPEAR) += spear/
obj-$(CONFIG_ARCH_SUNXI) += sunxi/
obj-$(CONFIG_ARCH_VT8500) += vt8500/
+obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
--- /dev/null
+#
+# Broadcom pinctrl drivers
+#
+
+config PINCTRL_BCM281XX
+ bool "Broadcom BCM281xx pinctrl driver"
+ depends on OF && (ARCH_BCM_MOBILE || COMPILE_TEST)
+ select PINMUX
+ select PINCONF
+ select GENERIC_PINCONF
+ select REGMAP_MMIO
+ help
+ Say Y here to support Broadcom BCM281xx pinctrl driver, which is used
+ for the BCM281xx SoC family, including BCM11130, BCM11140, BCM11351,
+ BCM28145, and BCM28155 SoCs. This driver requires the pinctrl
+ framework. GPIO is provided by a separate GPIO driver.
+
+config PINCTRL_BCM2835
+ bool
+ select PINMUX
+ select PINCONF
+
+config PINCTRL_CYGNUS_GPIO
+ bool "Broadcom Cygnus GPIO (with PINCONF) driver"
+ depends on OF_GPIO && ARCH_BCM_CYGNUS
+ select GPIOLIB_IRQCHIP
+ select PINCONF
+ select GENERIC_PINCONF
+ default ARCH_BCM_CYGNUS
+ help
+ Say yes here to enable the Broadcom Cygnus GPIO driver.
+
+ The Broadcom Cygnus SoC has 3 GPIO controllers including the ASIU
+ GPIO controller (ASIU), the chipCommonG GPIO controller (CCM), and
+ the always-ON GPIO controller (CRMU/AON). All 3 GPIO controllers are
+ supported by this driver.
+
+ All 3 Cygnus GPIO controllers support basic PINCONF functions such
+ as bias pull up, pull down, and drive strength configurations, when
+ these pins are muxed to GPIO.
+
+ Pins from the ASIU GPIO can be individually muxed to GPIO function,
+ through interaction with the Cygnus IOMUX controller.
+
+config PINCTRL_CYGNUS_MUX
+ bool "Broadcom Cygnus IOMUX driver"
+ depends on (ARCH_BCM_CYGNUS || COMPILE_TEST)
+ select PINMUX
+ select GENERIC_PINCONF
+ default ARCH_BCM_CYGNUS
+ help
+ Say yes here to enable the Broadcom Cygnus IOMUX driver.
+
+ The Broadcom Cygnus IOMUX driver supports group based IOMUX
+ configuration, with the exception that certain individual pins
+ can be overrided to GPIO function
--- /dev/null
+# Broadcom pinctrl support
+
+obj-$(CONFIG_PINCTRL_BCM281XX) += pinctrl-bcm281xx.o
+obj-$(CONFIG_PINCTRL_BCM2835) += pinctrl-bcm2835.o
+obj-$(CONFIG_PINCTRL_CYGNUS_GPIO) += pinctrl-cygnus-gpio.o
+obj-$(CONFIG_PINCTRL_CYGNUS_MUX) += pinctrl-cygnus-mux.o
--- /dev/null
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinconf-generic.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+#include "../core.h"
+#include "../pinctrl-utils.h"
+
+/* BCM281XX Pin Control Registers Definitions */
+
+/* Function Select bits are the same for all pin control registers */
+#define BCM281XX_PIN_REG_F_SEL_MASK 0x0700
+#define BCM281XX_PIN_REG_F_SEL_SHIFT 8
+
+/* Standard pin register */
+#define BCM281XX_STD_PIN_REG_DRV_STR_MASK 0x0007
+#define BCM281XX_STD_PIN_REG_DRV_STR_SHIFT 0
+#define BCM281XX_STD_PIN_REG_INPUT_DIS_MASK 0x0008
+#define BCM281XX_STD_PIN_REG_INPUT_DIS_SHIFT 3
+#define BCM281XX_STD_PIN_REG_SLEW_MASK 0x0010
+#define BCM281XX_STD_PIN_REG_SLEW_SHIFT 4
+#define BCM281XX_STD_PIN_REG_PULL_UP_MASK 0x0020
+#define BCM281XX_STD_PIN_REG_PULL_UP_SHIFT 5
+#define BCM281XX_STD_PIN_REG_PULL_DN_MASK 0x0040
+#define BCM281XX_STD_PIN_REG_PULL_DN_SHIFT 6
+#define BCM281XX_STD_PIN_REG_HYST_MASK 0x0080
+#define BCM281XX_STD_PIN_REG_HYST_SHIFT 7
+
+/* I2C pin register */
+#define BCM281XX_I2C_PIN_REG_INPUT_DIS_MASK 0x0004
+#define BCM281XX_I2C_PIN_REG_INPUT_DIS_SHIFT 2
+#define BCM281XX_I2C_PIN_REG_SLEW_MASK 0x0008
+#define BCM281XX_I2C_PIN_REG_SLEW_SHIFT 3
+#define BCM281XX_I2C_PIN_REG_PULL_UP_STR_MASK 0x0070
+#define BCM281XX_I2C_PIN_REG_PULL_UP_STR_SHIFT 4
+
+/* HDMI pin register */
+#define BCM281XX_HDMI_PIN_REG_INPUT_DIS_MASK 0x0008
+#define BCM281XX_HDMI_PIN_REG_INPUT_DIS_SHIFT 3
+#define BCM281XX_HDMI_PIN_REG_MODE_MASK 0x0010
+#define BCM281XX_HDMI_PIN_REG_MODE_SHIFT 4
+
+/**
+ * bcm281xx_pin_type - types of pin register
+ */
+enum bcm281xx_pin_type {
+ BCM281XX_PIN_TYPE_UNKNOWN = 0,
+ BCM281XX_PIN_TYPE_STD,
+ BCM281XX_PIN_TYPE_I2C,
+ BCM281XX_PIN_TYPE_HDMI,
+};
+
+static enum bcm281xx_pin_type std_pin = BCM281XX_PIN_TYPE_STD;
+static enum bcm281xx_pin_type i2c_pin = BCM281XX_PIN_TYPE_I2C;
+static enum bcm281xx_pin_type hdmi_pin = BCM281XX_PIN_TYPE_HDMI;
+
+/**
+ * bcm281xx_pin_function- define pin function
+ */
+struct bcm281xx_pin_function {
+ const char *name;
+ const char * const *groups;
+ const unsigned ngroups;
+};
+
+/**
+ * bcm281xx_pinctrl_data - Broadcom-specific pinctrl data
+ * @reg_base - base of pinctrl registers
+ */
+struct bcm281xx_pinctrl_data {
+ void __iomem *reg_base;
+
+ /* List of all pins */
+ const struct pinctrl_pin_desc *pins;
+ const unsigned npins;
+
+ const struct bcm281xx_pin_function *functions;
+ const unsigned nfunctions;
+
+ struct regmap *regmap;
+};
+
+/*
+ * Pin number definition. The order here must be the same as defined in the
+ * PADCTRLREG block in the RDB.
+ */
+#define BCM281XX_PIN_ADCSYNC 0
+#define BCM281XX_PIN_BAT_RM 1
+#define BCM281XX_PIN_BSC1_SCL 2
+#define BCM281XX_PIN_BSC1_SDA 3
+#define BCM281XX_PIN_BSC2_SCL 4
+#define BCM281XX_PIN_BSC2_SDA 5
+#define BCM281XX_PIN_CLASSGPWR 6
+#define BCM281XX_PIN_CLK_CX8 7
+#define BCM281XX_PIN_CLKOUT_0 8
+#define BCM281XX_PIN_CLKOUT_1 9
+#define BCM281XX_PIN_CLKOUT_2 10
+#define BCM281XX_PIN_CLKOUT_3 11
+#define BCM281XX_PIN_CLKREQ_IN_0 12
+#define BCM281XX_PIN_CLKREQ_IN_1 13
+#define BCM281XX_PIN_CWS_SYS_REQ1 14
+#define BCM281XX_PIN_CWS_SYS_REQ2 15
+#define BCM281XX_PIN_CWS_SYS_REQ3 16
+#define BCM281XX_PIN_DIGMIC1_CLK 17
+#define BCM281XX_PIN_DIGMIC1_DQ 18
+#define BCM281XX_PIN_DIGMIC2_CLK 19
+#define BCM281XX_PIN_DIGMIC2_DQ 20
+#define BCM281XX_PIN_GPEN13 21
+#define BCM281XX_PIN_GPEN14 22
+#define BCM281XX_PIN_GPEN15 23
+#define BCM281XX_PIN_GPIO00 24
+#define BCM281XX_PIN_GPIO01 25
+#define BCM281XX_PIN_GPIO02 26
+#define BCM281XX_PIN_GPIO03 27
+#define BCM281XX_PIN_GPIO04 28
+#define BCM281XX_PIN_GPIO05 29
+#define BCM281XX_PIN_GPIO06 30
+#define BCM281XX_PIN_GPIO07 31
+#define BCM281XX_PIN_GPIO08 32
+#define BCM281XX_PIN_GPIO09 33
+#define BCM281XX_PIN_GPIO10 34
+#define BCM281XX_PIN_GPIO11 35
+#define BCM281XX_PIN_GPIO12 36
+#define BCM281XX_PIN_GPIO13 37
+#define BCM281XX_PIN_GPIO14 38
+#define BCM281XX_PIN_GPS_PABLANK 39
+#define BCM281XX_PIN_GPS_TMARK 40
+#define BCM281XX_PIN_HDMI_SCL 41
+#define BCM281XX_PIN_HDMI_SDA 42
+#define BCM281XX_PIN_IC_DM 43
+#define BCM281XX_PIN_IC_DP 44
+#define BCM281XX_PIN_KP_COL_IP_0 45
+#define BCM281XX_PIN_KP_COL_IP_1 46
+#define BCM281XX_PIN_KP_COL_IP_2 47
+#define BCM281XX_PIN_KP_COL_IP_3 48
+#define BCM281XX_PIN_KP_ROW_OP_0 49
+#define BCM281XX_PIN_KP_ROW_OP_1 50
+#define BCM281XX_PIN_KP_ROW_OP_2 51
+#define BCM281XX_PIN_KP_ROW_OP_3 52
+#define BCM281XX_PIN_LCD_B_0 53
+#define BCM281XX_PIN_LCD_B_1 54
+#define BCM281XX_PIN_LCD_B_2 55
+#define BCM281XX_PIN_LCD_B_3 56
+#define BCM281XX_PIN_LCD_B_4 57
+#define BCM281XX_PIN_LCD_B_5 58
+#define BCM281XX_PIN_LCD_B_6 59
+#define BCM281XX_PIN_LCD_B_7 60
+#define BCM281XX_PIN_LCD_G_0 61
+#define BCM281XX_PIN_LCD_G_1 62
+#define BCM281XX_PIN_LCD_G_2 63
+#define BCM281XX_PIN_LCD_G_3 64
+#define BCM281XX_PIN_LCD_G_4 65
+#define BCM281XX_PIN_LCD_G_5 66
+#define BCM281XX_PIN_LCD_G_6 67
+#define BCM281XX_PIN_LCD_G_7 68
+#define BCM281XX_PIN_LCD_HSYNC 69
+#define BCM281XX_PIN_LCD_OE 70
+#define BCM281XX_PIN_LCD_PCLK 71
+#define BCM281XX_PIN_LCD_R_0 72
+#define BCM281XX_PIN_LCD_R_1 73
+#define BCM281XX_PIN_LCD_R_2 74
+#define BCM281XX_PIN_LCD_R_3 75
+#define BCM281XX_PIN_LCD_R_4 76
+#define BCM281XX_PIN_LCD_R_5 77
+#define BCM281XX_PIN_LCD_R_6 78
+#define BCM281XX_PIN_LCD_R_7 79
+#define BCM281XX_PIN_LCD_VSYNC 80
+#define BCM281XX_PIN_MDMGPIO0 81
+#define BCM281XX_PIN_MDMGPIO1 82
+#define BCM281XX_PIN_MDMGPIO2 83
+#define BCM281XX_PIN_MDMGPIO3 84
+#define BCM281XX_PIN_MDMGPIO4 85
+#define BCM281XX_PIN_MDMGPIO5 86
+#define BCM281XX_PIN_MDMGPIO6 87
+#define BCM281XX_PIN_MDMGPIO7 88
+#define BCM281XX_PIN_MDMGPIO8 89
+#define BCM281XX_PIN_MPHI_DATA_0 90
+#define BCM281XX_PIN_MPHI_DATA_1 91
+#define BCM281XX_PIN_MPHI_DATA_2 92
+#define BCM281XX_PIN_MPHI_DATA_3 93
+#define BCM281XX_PIN_MPHI_DATA_4 94
+#define BCM281XX_PIN_MPHI_DATA_5 95
+#define BCM281XX_PIN_MPHI_DATA_6 96
+#define BCM281XX_PIN_MPHI_DATA_7 97
+#define BCM281XX_PIN_MPHI_DATA_8 98
+#define BCM281XX_PIN_MPHI_DATA_9 99
+#define BCM281XX_PIN_MPHI_DATA_10 100
+#define BCM281XX_PIN_MPHI_DATA_11 101
+#define BCM281XX_PIN_MPHI_DATA_12 102
+#define BCM281XX_PIN_MPHI_DATA_13 103
+#define BCM281XX_PIN_MPHI_DATA_14 104
+#define BCM281XX_PIN_MPHI_DATA_15 105
+#define BCM281XX_PIN_MPHI_HA0 106
+#define BCM281XX_PIN_MPHI_HAT0 107
+#define BCM281XX_PIN_MPHI_HAT1 108
+#define BCM281XX_PIN_MPHI_HCE0_N 109
+#define BCM281XX_PIN_MPHI_HCE1_N 110
+#define BCM281XX_PIN_MPHI_HRD_N 111
+#define BCM281XX_PIN_MPHI_HWR_N 112
+#define BCM281XX_PIN_MPHI_RUN0 113
+#define BCM281XX_PIN_MPHI_RUN1 114
+#define BCM281XX_PIN_MTX_SCAN_CLK 115
+#define BCM281XX_PIN_MTX_SCAN_DATA 116
+#define BCM281XX_PIN_NAND_AD_0 117
+#define BCM281XX_PIN_NAND_AD_1 118
+#define BCM281XX_PIN_NAND_AD_2 119
+#define BCM281XX_PIN_NAND_AD_3 120
+#define BCM281XX_PIN_NAND_AD_4 121
+#define BCM281XX_PIN_NAND_AD_5 122
+#define BCM281XX_PIN_NAND_AD_6 123
+#define BCM281XX_PIN_NAND_AD_7 124
+#define BCM281XX_PIN_NAND_ALE 125
+#define BCM281XX_PIN_NAND_CEN_0 126
+#define BCM281XX_PIN_NAND_CEN_1 127
+#define BCM281XX_PIN_NAND_CLE 128
+#define BCM281XX_PIN_NAND_OEN 129
+#define BCM281XX_PIN_NAND_RDY_0 130
+#define BCM281XX_PIN_NAND_RDY_1 131
+#define BCM281XX_PIN_NAND_WEN 132
+#define BCM281XX_PIN_NAND_WP 133
+#define BCM281XX_PIN_PC1 134
+#define BCM281XX_PIN_PC2 135
+#define BCM281XX_PIN_PMU_INT 136
+#define BCM281XX_PIN_PMU_SCL 137
+#define BCM281XX_PIN_PMU_SDA 138
+#define BCM281XX_PIN_RFST2G_MTSLOTEN3G 139
+#define BCM281XX_PIN_RGMII_0_RX_CTL 140
+#define BCM281XX_PIN_RGMII_0_RXC 141
+#define BCM281XX_PIN_RGMII_0_RXD_0 142
+#define BCM281XX_PIN_RGMII_0_RXD_1 143
+#define BCM281XX_PIN_RGMII_0_RXD_2 144
+#define BCM281XX_PIN_RGMII_0_RXD_3 145
+#define BCM281XX_PIN_RGMII_0_TX_CTL 146
+#define BCM281XX_PIN_RGMII_0_TXC 147
+#define BCM281XX_PIN_RGMII_0_TXD_0 148
+#define BCM281XX_PIN_RGMII_0_TXD_1 149
+#define BCM281XX_PIN_RGMII_0_TXD_2 150
+#define BCM281XX_PIN_RGMII_0_TXD_3 151
+#define BCM281XX_PIN_RGMII_1_RX_CTL 152
+#define BCM281XX_PIN_RGMII_1_RXC 153
+#define BCM281XX_PIN_RGMII_1_RXD_0 154
+#define BCM281XX_PIN_RGMII_1_RXD_1 155
+#define BCM281XX_PIN_RGMII_1_RXD_2 156
+#define BCM281XX_PIN_RGMII_1_RXD_3 157
+#define BCM281XX_PIN_RGMII_1_TX_CTL 158
+#define BCM281XX_PIN_RGMII_1_TXC 159
+#define BCM281XX_PIN_RGMII_1_TXD_0 160
+#define BCM281XX_PIN_RGMII_1_TXD_1 161
+#define BCM281XX_PIN_RGMII_1_TXD_2 162
+#define BCM281XX_PIN_RGMII_1_TXD_3 163
+#define BCM281XX_PIN_RGMII_GPIO_0 164
+#define BCM281XX_PIN_RGMII_GPIO_1 165
+#define BCM281XX_PIN_RGMII_GPIO_2 166
+#define BCM281XX_PIN_RGMII_GPIO_3 167
+#define BCM281XX_PIN_RTXDATA2G_TXDATA3G1 168
+#define BCM281XX_PIN_RTXEN2G_TXDATA3G2 169
+#define BCM281XX_PIN_RXDATA3G0 170
+#define BCM281XX_PIN_RXDATA3G1 171
+#define BCM281XX_PIN_RXDATA3G2 172
+#define BCM281XX_PIN_SDIO1_CLK 173
+#define BCM281XX_PIN_SDIO1_CMD 174
+#define BCM281XX_PIN_SDIO1_DATA_0 175
+#define BCM281XX_PIN_SDIO1_DATA_1 176
+#define BCM281XX_PIN_SDIO1_DATA_2 177
+#define BCM281XX_PIN_SDIO1_DATA_3 178
+#define BCM281XX_PIN_SDIO4_CLK 179
+#define BCM281XX_PIN_SDIO4_CMD 180
+#define BCM281XX_PIN_SDIO4_DATA_0 181
+#define BCM281XX_PIN_SDIO4_DATA_1 182
+#define BCM281XX_PIN_SDIO4_DATA_2 183
+#define BCM281XX_PIN_SDIO4_DATA_3 184
+#define BCM281XX_PIN_SIM_CLK 185
+#define BCM281XX_PIN_SIM_DATA 186
+#define BCM281XX_PIN_SIM_DET 187
+#define BCM281XX_PIN_SIM_RESETN 188
+#define BCM281XX_PIN_SIM2_CLK 189
+#define BCM281XX_PIN_SIM2_DATA 190
+#define BCM281XX_PIN_SIM2_DET 191
+#define BCM281XX_PIN_SIM2_RESETN 192
+#define BCM281XX_PIN_SRI_C 193
+#define BCM281XX_PIN_SRI_D 194
+#define BCM281XX_PIN_SRI_E 195
+#define BCM281XX_PIN_SSP_EXTCLK 196
+#define BCM281XX_PIN_SSP0_CLK 197
+#define BCM281XX_PIN_SSP0_FS 198
+#define BCM281XX_PIN_SSP0_RXD 199
+#define BCM281XX_PIN_SSP0_TXD 200
+#define BCM281XX_PIN_SSP2_CLK 201
+#define BCM281XX_PIN_SSP2_FS_0 202
+#define BCM281XX_PIN_SSP2_FS_1 203
+#define BCM281XX_PIN_SSP2_FS_2 204
+#define BCM281XX_PIN_SSP2_FS_3 205
+#define BCM281XX_PIN_SSP2_RXD_0 206
+#define BCM281XX_PIN_SSP2_RXD_1 207
+#define BCM281XX_PIN_SSP2_TXD_0 208
+#define BCM281XX_PIN_SSP2_TXD_1 209
+#define BCM281XX_PIN_SSP3_CLK 210
+#define BCM281XX_PIN_SSP3_FS 211
+#define BCM281XX_PIN_SSP3_RXD 212
+#define BCM281XX_PIN_SSP3_TXD 213
+#define BCM281XX_PIN_SSP4_CLK 214
+#define BCM281XX_PIN_SSP4_FS 215
+#define BCM281XX_PIN_SSP4_RXD 216
+#define BCM281XX_PIN_SSP4_TXD 217
+#define BCM281XX_PIN_SSP5_CLK 218
+#define BCM281XX_PIN_SSP5_FS 219
+#define BCM281XX_PIN_SSP5_RXD 220
+#define BCM281XX_PIN_SSP5_TXD 221
+#define BCM281XX_PIN_SSP6_CLK 222
+#define BCM281XX_PIN_SSP6_FS 223
+#define BCM281XX_PIN_SSP6_RXD 224
+#define BCM281XX_PIN_SSP6_TXD 225
+#define BCM281XX_PIN_STAT_1 226
+#define BCM281XX_PIN_STAT_2 227
+#define BCM281XX_PIN_SYSCLKEN 228
+#define BCM281XX_PIN_TRACECLK 229
+#define BCM281XX_PIN_TRACEDT00 230
+#define BCM281XX_PIN_TRACEDT01 231
+#define BCM281XX_PIN_TRACEDT02 232
+#define BCM281XX_PIN_TRACEDT03 233
+#define BCM281XX_PIN_TRACEDT04 234
+#define BCM281XX_PIN_TRACEDT05 235
+#define BCM281XX_PIN_TRACEDT06 236
+#define BCM281XX_PIN_TRACEDT07 237
+#define BCM281XX_PIN_TRACEDT08 238
+#define BCM281XX_PIN_TRACEDT09 239
+#define BCM281XX_PIN_TRACEDT10 240
+#define BCM281XX_PIN_TRACEDT11 241
+#define BCM281XX_PIN_TRACEDT12 242
+#define BCM281XX_PIN_TRACEDT13 243
+#define BCM281XX_PIN_TRACEDT14 244
+#define BCM281XX_PIN_TRACEDT15 245
+#define BCM281XX_PIN_TXDATA3G0 246
+#define BCM281XX_PIN_TXPWRIND 247
+#define BCM281XX_PIN_UARTB1_UCTS 248
+#define BCM281XX_PIN_UARTB1_URTS 249
+#define BCM281XX_PIN_UARTB1_URXD 250
+#define BCM281XX_PIN_UARTB1_UTXD 251
+#define BCM281XX_PIN_UARTB2_URXD 252
+#define BCM281XX_PIN_UARTB2_UTXD 253
+#define BCM281XX_PIN_UARTB3_UCTS 254
+#define BCM281XX_PIN_UARTB3_URTS 255
+#define BCM281XX_PIN_UARTB3_URXD 256
+#define BCM281XX_PIN_UARTB3_UTXD 257
+#define BCM281XX_PIN_UARTB4_UCTS 258
+#define BCM281XX_PIN_UARTB4_URTS 259
+#define BCM281XX_PIN_UARTB4_URXD 260
+#define BCM281XX_PIN_UARTB4_UTXD 261
+#define BCM281XX_PIN_VC_CAM1_SCL 262
+#define BCM281XX_PIN_VC_CAM1_SDA 263
+#define BCM281XX_PIN_VC_CAM2_SCL 264
+#define BCM281XX_PIN_VC_CAM2_SDA 265
+#define BCM281XX_PIN_VC_CAM3_SCL 266
+#define BCM281XX_PIN_VC_CAM3_SDA 267
+
+#define BCM281XX_PIN_DESC(a, b, c) \
+ { .number = a, .name = b, .drv_data = &c##_pin }
+
+/*
+ * Pin description definition. The order here must be the same as defined in
+ * the PADCTRLREG block in the RDB, since the pin number is used as an index
+ * into this array.
+ */
+static const struct pinctrl_pin_desc bcm281xx_pinctrl_pins[] = {
+ BCM281XX_PIN_DESC(BCM281XX_PIN_ADCSYNC, "adcsync", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_BAT_RM, "bat_rm", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_BSC1_SCL, "bsc1_scl", i2c),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_BSC1_SDA, "bsc1_sda", i2c),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_BSC2_SCL, "bsc2_scl", i2c),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_BSC2_SDA, "bsc2_sda", i2c),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_CLASSGPWR, "classgpwr", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_CLK_CX8, "clk_cx8", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_CLKOUT_0, "clkout_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_CLKOUT_1, "clkout_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_CLKOUT_2, "clkout_2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_CLKOUT_3, "clkout_3", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_CLKREQ_IN_0, "clkreq_in_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_CLKREQ_IN_1, "clkreq_in_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_CWS_SYS_REQ1, "cws_sys_req1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_CWS_SYS_REQ2, "cws_sys_req2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_CWS_SYS_REQ3, "cws_sys_req3", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_DIGMIC1_CLK, "digmic1_clk", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_DIGMIC1_DQ, "digmic1_dq", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_DIGMIC2_CLK, "digmic2_clk", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_DIGMIC2_DQ, "digmic2_dq", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPEN13, "gpen13", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPEN14, "gpen14", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPEN15, "gpen15", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO00, "gpio00", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO01, "gpio01", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO02, "gpio02", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO03, "gpio03", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO04, "gpio04", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO05, "gpio05", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO06, "gpio06", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO07, "gpio07", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO08, "gpio08", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO09, "gpio09", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO10, "gpio10", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO11, "gpio11", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO12, "gpio12", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO13, "gpio13", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO14, "gpio14", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPS_PABLANK, "gps_pablank", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_GPS_TMARK, "gps_tmark", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_HDMI_SCL, "hdmi_scl", hdmi),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_HDMI_SDA, "hdmi_sda", hdmi),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_IC_DM, "ic_dm", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_IC_DP, "ic_dp", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_KP_COL_IP_0, "kp_col_ip_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_KP_COL_IP_1, "kp_col_ip_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_KP_COL_IP_2, "kp_col_ip_2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_KP_COL_IP_3, "kp_col_ip_3", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_KP_ROW_OP_0, "kp_row_op_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_KP_ROW_OP_1, "kp_row_op_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_KP_ROW_OP_2, "kp_row_op_2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_KP_ROW_OP_3, "kp_row_op_3", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_0, "lcd_b_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_1, "lcd_b_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_2, "lcd_b_2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_3, "lcd_b_3", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_4, "lcd_b_4", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_5, "lcd_b_5", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_6, "lcd_b_6", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_7, "lcd_b_7", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_0, "lcd_g_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_1, "lcd_g_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_2, "lcd_g_2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_3, "lcd_g_3", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_4, "lcd_g_4", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_5, "lcd_g_5", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_6, "lcd_g_6", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_7, "lcd_g_7", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_HSYNC, "lcd_hsync", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_OE, "lcd_oe", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_PCLK, "lcd_pclk", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_0, "lcd_r_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_1, "lcd_r_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_2, "lcd_r_2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_3, "lcd_r_3", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_4, "lcd_r_4", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_5, "lcd_r_5", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_6, "lcd_r_6", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_7, "lcd_r_7", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_VSYNC, "lcd_vsync", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO0, "mdmgpio0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO1, "mdmgpio1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO2, "mdmgpio2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO3, "mdmgpio3", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO4, "mdmgpio4", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO5, "mdmgpio5", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO6, "mdmgpio6", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO7, "mdmgpio7", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO8, "mdmgpio8", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_0, "mphi_data_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_1, "mphi_data_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_2, "mphi_data_2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_3, "mphi_data_3", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_4, "mphi_data_4", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_5, "mphi_data_5", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_6, "mphi_data_6", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_7, "mphi_data_7", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_8, "mphi_data_8", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_9, "mphi_data_9", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_10, "mphi_data_10", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_11, "mphi_data_11", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_12, "mphi_data_12", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_13, "mphi_data_13", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_14, "mphi_data_14", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_15, "mphi_data_15", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HA0, "mphi_ha0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HAT0, "mphi_hat0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HAT1, "mphi_hat1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HCE0_N, "mphi_hce0_n", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HCE1_N, "mphi_hce1_n", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HRD_N, "mphi_hrd_n", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HWR_N, "mphi_hwr_n", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_RUN0, "mphi_run0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_RUN1, "mphi_run1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MTX_SCAN_CLK, "mtx_scan_clk", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_MTX_SCAN_DATA, "mtx_scan_data", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_0, "nand_ad_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_1, "nand_ad_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_2, "nand_ad_2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_3, "nand_ad_3", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_4, "nand_ad_4", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_5, "nand_ad_5", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_6, "nand_ad_6", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_7, "nand_ad_7", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_ALE, "nand_ale", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_CEN_0, "nand_cen_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_CEN_1, "nand_cen_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_CLE, "nand_cle", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_OEN, "nand_oen", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_RDY_0, "nand_rdy_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_RDY_1, "nand_rdy_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_WEN, "nand_wen", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_WP, "nand_wp", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_PC1, "pc1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_PC2, "pc2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_PMU_INT, "pmu_int", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_PMU_SCL, "pmu_scl", i2c),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_PMU_SDA, "pmu_sda", i2c),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RFST2G_MTSLOTEN3G, "rfst2g_mtsloten3g",
+ std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RX_CTL, "rgmii_0_rx_ctl", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXC, "rgmii_0_rxc", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXD_0, "rgmii_0_rxd_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXD_1, "rgmii_0_rxd_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXD_2, "rgmii_0_rxd_2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXD_3, "rgmii_0_rxd_3", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TX_CTL, "rgmii_0_tx_ctl", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXC, "rgmii_0_txc", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXD_0, "rgmii_0_txd_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXD_1, "rgmii_0_txd_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXD_2, "rgmii_0_txd_2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXD_3, "rgmii_0_txd_3", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RX_CTL, "rgmii_1_rx_ctl", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXC, "rgmii_1_rxc", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXD_0, "rgmii_1_rxd_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXD_1, "rgmii_1_rxd_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXD_2, "rgmii_1_rxd_2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXD_3, "rgmii_1_rxd_3", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TX_CTL, "rgmii_1_tx_ctl", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXC, "rgmii_1_txc", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXD_0, "rgmii_1_txd_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXD_1, "rgmii_1_txd_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXD_2, "rgmii_1_txd_2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXD_3, "rgmii_1_txd_3", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_GPIO_0, "rgmii_gpio_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_GPIO_1, "rgmii_gpio_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_GPIO_2, "rgmii_gpio_2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_GPIO_3, "rgmii_gpio_3", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RTXDATA2G_TXDATA3G1,
+ "rtxdata2g_txdata3g1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RTXEN2G_TXDATA3G2, "rtxen2g_txdata3g2",
+ std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RXDATA3G0, "rxdata3g0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RXDATA3G1, "rxdata3g1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_RXDATA3G2, "rxdata3g2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_CLK, "sdio1_clk", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_CMD, "sdio1_cmd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_DATA_0, "sdio1_data_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_DATA_1, "sdio1_data_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_DATA_2, "sdio1_data_2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_DATA_3, "sdio1_data_3", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_CLK, "sdio4_clk", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_CMD, "sdio4_cmd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_DATA_0, "sdio4_data_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_DATA_1, "sdio4_data_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_DATA_2, "sdio4_data_2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_DATA_3, "sdio4_data_3", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SIM_CLK, "sim_clk", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SIM_DATA, "sim_data", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SIM_DET, "sim_det", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SIM_RESETN, "sim_resetn", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SIM2_CLK, "sim2_clk", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SIM2_DATA, "sim2_data", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SIM2_DET, "sim2_det", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SIM2_RESETN, "sim2_resetn", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SRI_C, "sri_c", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SRI_D, "sri_d", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SRI_E, "sri_e", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP_EXTCLK, "ssp_extclk", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP0_CLK, "ssp0_clk", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP0_FS, "ssp0_fs", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP0_RXD, "ssp0_rxd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP0_TXD, "ssp0_txd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_CLK, "ssp2_clk", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_FS_0, "ssp2_fs_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_FS_1, "ssp2_fs_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_FS_2, "ssp2_fs_2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_FS_3, "ssp2_fs_3", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_RXD_0, "ssp2_rxd_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_RXD_1, "ssp2_rxd_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_TXD_0, "ssp2_txd_0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_TXD_1, "ssp2_txd_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP3_CLK, "ssp3_clk", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP3_FS, "ssp3_fs", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP3_RXD, "ssp3_rxd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP3_TXD, "ssp3_txd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP4_CLK, "ssp4_clk", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP4_FS, "ssp4_fs", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP4_RXD, "ssp4_rxd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP4_TXD, "ssp4_txd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP5_CLK, "ssp5_clk", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP5_FS, "ssp5_fs", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP5_RXD, "ssp5_rxd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP5_TXD, "ssp5_txd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP6_CLK, "ssp6_clk", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP6_FS, "ssp6_fs", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP6_RXD, "ssp6_rxd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SSP6_TXD, "ssp6_txd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_STAT_1, "stat_1", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_STAT_2, "stat_2", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_SYSCLKEN, "sysclken", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TRACECLK, "traceclk", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT00, "tracedt00", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT01, "tracedt01", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT02, "tracedt02", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT03, "tracedt03", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT04, "tracedt04", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT05, "tracedt05", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT06, "tracedt06", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT07, "tracedt07", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT08, "tracedt08", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT09, "tracedt09", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT10, "tracedt10", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT11, "tracedt11", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT12, "tracedt12", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT13, "tracedt13", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT14, "tracedt14", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT15, "tracedt15", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TXDATA3G0, "txdata3g0", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_TXPWRIND, "txpwrind", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB1_UCTS, "uartb1_ucts", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB1_URTS, "uartb1_urts", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB1_URXD, "uartb1_urxd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB1_UTXD, "uartb1_utxd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB2_URXD, "uartb2_urxd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB2_UTXD, "uartb2_utxd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB3_UCTS, "uartb3_ucts", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB3_URTS, "uartb3_urts", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB3_URXD, "uartb3_urxd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB3_UTXD, "uartb3_utxd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB4_UCTS, "uartb4_ucts", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB4_URTS, "uartb4_urts", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB4_URXD, "uartb4_urxd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB4_UTXD, "uartb4_utxd", std),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM1_SCL, "vc_cam1_scl", i2c),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM1_SDA, "vc_cam1_sda", i2c),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM2_SCL, "vc_cam2_scl", i2c),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM2_SDA, "vc_cam2_sda", i2c),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM3_SCL, "vc_cam3_scl", i2c),
+ BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM3_SDA, "vc_cam3_sda", i2c),
+};
+
+static const char * const bcm281xx_alt_groups[] = {
+ "adcsync",
+ "bat_rm",
+ "bsc1_scl",
+ "bsc1_sda",
+ "bsc2_scl",
+ "bsc2_sda",
+ "classgpwr",
+ "clk_cx8",
+ "clkout_0",
+ "clkout_1",
+ "clkout_2",
+ "clkout_3",
+ "clkreq_in_0",
+ "clkreq_in_1",
+ "cws_sys_req1",
+ "cws_sys_req2",
+ "cws_sys_req3",
+ "digmic1_clk",
+ "digmic1_dq",
+ "digmic2_clk",
+ "digmic2_dq",
+ "gpen13",
+ "gpen14",
+ "gpen15",
+ "gpio00",
+ "gpio01",
+ "gpio02",
+ "gpio03",
+ "gpio04",
+ "gpio05",
+ "gpio06",
+ "gpio07",
+ "gpio08",
+ "gpio09",
+ "gpio10",
+ "gpio11",
+ "gpio12",
+ "gpio13",
+ "gpio14",
+ "gps_pablank",
+ "gps_tmark",
+ "hdmi_scl",
+ "hdmi_sda",
+ "ic_dm",
+ "ic_dp",
+ "kp_col_ip_0",
+ "kp_col_ip_1",
+ "kp_col_ip_2",
+ "kp_col_ip_3",
+ "kp_row_op_0",
+ "kp_row_op_1",
+ "kp_row_op_2",
+ "kp_row_op_3",
+ "lcd_b_0",
+ "lcd_b_1",
+ "lcd_b_2",
+ "lcd_b_3",
+ "lcd_b_4",
+ "lcd_b_5",
+ "lcd_b_6",
+ "lcd_b_7",
+ "lcd_g_0",
+ "lcd_g_1",
+ "lcd_g_2",
+ "lcd_g_3",
+ "lcd_g_4",
+ "lcd_g_5",
+ "lcd_g_6",
+ "lcd_g_7",
+ "lcd_hsync",
+ "lcd_oe",
+ "lcd_pclk",
+ "lcd_r_0",
+ "lcd_r_1",
+ "lcd_r_2",
+ "lcd_r_3",
+ "lcd_r_4",
+ "lcd_r_5",
+ "lcd_r_6",
+ "lcd_r_7",
+ "lcd_vsync",
+ "mdmgpio0",
+ "mdmgpio1",
+ "mdmgpio2",
+ "mdmgpio3",
+ "mdmgpio4",
+ "mdmgpio5",
+ "mdmgpio6",
+ "mdmgpio7",
+ "mdmgpio8",
+ "mphi_data_0",
+ "mphi_data_1",
+ "mphi_data_2",
+ "mphi_data_3",
+ "mphi_data_4",
+ "mphi_data_5",
+ "mphi_data_6",
+ "mphi_data_7",
+ "mphi_data_8",
+ "mphi_data_9",
+ "mphi_data_10",
+ "mphi_data_11",
+ "mphi_data_12",
+ "mphi_data_13",
+ "mphi_data_14",
+ "mphi_data_15",
+ "mphi_ha0",
+ "mphi_hat0",
+ "mphi_hat1",
+ "mphi_hce0_n",
+ "mphi_hce1_n",
+ "mphi_hrd_n",
+ "mphi_hwr_n",
+ "mphi_run0",
+ "mphi_run1",
+ "mtx_scan_clk",
+ "mtx_scan_data",
+ "nand_ad_0",
+ "nand_ad_1",
+ "nand_ad_2",
+ "nand_ad_3",
+ "nand_ad_4",
+ "nand_ad_5",
+ "nand_ad_6",
+ "nand_ad_7",
+ "nand_ale",
+ "nand_cen_0",
+ "nand_cen_1",
+ "nand_cle",
+ "nand_oen",
+ "nand_rdy_0",
+ "nand_rdy_1",
+ "nand_wen",
+ "nand_wp",
+ "pc1",
+ "pc2",
+ "pmu_int",
+ "pmu_scl",
+ "pmu_sda",
+ "rfst2g_mtsloten3g",
+ "rgmii_0_rx_ctl",
+ "rgmii_0_rxc",
+ "rgmii_0_rxd_0",
+ "rgmii_0_rxd_1",
+ "rgmii_0_rxd_2",
+ "rgmii_0_rxd_3",
+ "rgmii_0_tx_ctl",
+ "rgmii_0_txc",
+ "rgmii_0_txd_0",
+ "rgmii_0_txd_1",
+ "rgmii_0_txd_2",
+ "rgmii_0_txd_3",
+ "rgmii_1_rx_ctl",
+ "rgmii_1_rxc",
+ "rgmii_1_rxd_0",
+ "rgmii_1_rxd_1",
+ "rgmii_1_rxd_2",
+ "rgmii_1_rxd_3",
+ "rgmii_1_tx_ctl",
+ "rgmii_1_txc",
+ "rgmii_1_txd_0",
+ "rgmii_1_txd_1",
+ "rgmii_1_txd_2",
+ "rgmii_1_txd_3",
+ "rgmii_gpio_0",
+ "rgmii_gpio_1",
+ "rgmii_gpio_2",
+ "rgmii_gpio_3",
+ "rtxdata2g_txdata3g1",
+ "rtxen2g_txdata3g2",
+ "rxdata3g0",
+ "rxdata3g1",
+ "rxdata3g2",
+ "sdio1_clk",
+ "sdio1_cmd",
+ "sdio1_data_0",
+ "sdio1_data_1",
+ "sdio1_data_2",
+ "sdio1_data_3",
+ "sdio4_clk",
+ "sdio4_cmd",
+ "sdio4_data_0",
+ "sdio4_data_1",
+ "sdio4_data_2",
+ "sdio4_data_3",
+ "sim_clk",
+ "sim_data",
+ "sim_det",
+ "sim_resetn",
+ "sim2_clk",
+ "sim2_data",
+ "sim2_det",
+ "sim2_resetn",
+ "sri_c",
+ "sri_d",
+ "sri_e",
+ "ssp_extclk",
+ "ssp0_clk",
+ "ssp0_fs",
+ "ssp0_rxd",
+ "ssp0_txd",
+ "ssp2_clk",
+ "ssp2_fs_0",
+ "ssp2_fs_1",
+ "ssp2_fs_2",
+ "ssp2_fs_3",
+ "ssp2_rxd_0",
+ "ssp2_rxd_1",
+ "ssp2_txd_0",
+ "ssp2_txd_1",
+ "ssp3_clk",
+ "ssp3_fs",
+ "ssp3_rxd",
+ "ssp3_txd",
+ "ssp4_clk",
+ "ssp4_fs",
+ "ssp4_rxd",
+ "ssp4_txd",
+ "ssp5_clk",
+ "ssp5_fs",
+ "ssp5_rxd",
+ "ssp5_txd",
+ "ssp6_clk",
+ "ssp6_fs",
+ "ssp6_rxd",
+ "ssp6_txd",
+ "stat_1",
+ "stat_2",
+ "sysclken",
+ "traceclk",
+ "tracedt00",
+ "tracedt01",
+ "tracedt02",
+ "tracedt03",
+ "tracedt04",
+ "tracedt05",
+ "tracedt06",
+ "tracedt07",
+ "tracedt08",
+ "tracedt09",
+ "tracedt10",
+ "tracedt11",
+ "tracedt12",
+ "tracedt13",
+ "tracedt14",
+ "tracedt15",
+ "txdata3g0",
+ "txpwrind",
+ "uartb1_ucts",
+ "uartb1_urts",
+ "uartb1_urxd",
+ "uartb1_utxd",
+ "uartb2_urxd",
+ "uartb2_utxd",
+ "uartb3_ucts",
+ "uartb3_urts",
+ "uartb3_urxd",
+ "uartb3_utxd",
+ "uartb4_ucts",
+ "uartb4_urts",
+ "uartb4_urxd",
+ "uartb4_utxd",
+ "vc_cam1_scl",
+ "vc_cam1_sda",
+ "vc_cam2_scl",
+ "vc_cam2_sda",
+ "vc_cam3_scl",
+ "vc_cam3_sda",
+};
+
+/* Every pin can implement all ALT1-ALT4 functions */
+#define BCM281XX_PIN_FUNCTION(fcn_name) \
+{ \
+ .name = #fcn_name, \
+ .groups = bcm281xx_alt_groups, \
+ .ngroups = ARRAY_SIZE(bcm281xx_alt_groups), \
+}
+
+static const struct bcm281xx_pin_function bcm281xx_functions[] = {
+ BCM281XX_PIN_FUNCTION(alt1),
+ BCM281XX_PIN_FUNCTION(alt2),
+ BCM281XX_PIN_FUNCTION(alt3),
+ BCM281XX_PIN_FUNCTION(alt4),
+};
+
+static struct bcm281xx_pinctrl_data bcm281xx_pinctrl = {
+ .pins = bcm281xx_pinctrl_pins,
+ .npins = ARRAY_SIZE(bcm281xx_pinctrl_pins),
+ .functions = bcm281xx_functions,
+ .nfunctions = ARRAY_SIZE(bcm281xx_functions),
+};
+
+static inline enum bcm281xx_pin_type pin_type_get(struct pinctrl_dev *pctldev,
+ unsigned pin)
+{
+ struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+
+ if (pin >= pdata->npins)
+ return BCM281XX_PIN_TYPE_UNKNOWN;
+
+ return *(enum bcm281xx_pin_type *)(pdata->pins[pin].drv_data);
+}
+
+#define BCM281XX_PIN_SHIFT(type, param) \
+ (BCM281XX_ ## type ## _PIN_REG_ ## param ## _SHIFT)
+
+#define BCM281XX_PIN_MASK(type, param) \
+ (BCM281XX_ ## type ## _PIN_REG_ ## param ## _MASK)
+
+/*
+ * This helper function is used to build up the value and mask used to write to
+ * a pin register, but does not actually write to the register.
+ */
+static inline void bcm281xx_pin_update(u32 *reg_val, u32 *reg_mask,
+ u32 param_val, u32 param_shift,
+ u32 param_mask)
+{
+ *reg_val &= ~param_mask;
+ *reg_val |= (param_val << param_shift) & param_mask;
+ *reg_mask |= param_mask;
+}
+
+static const struct regmap_config bcm281xx_pinctrl_regmap_config = {
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = BCM281XX_PIN_VC_CAM3_SDA,
+};
+
+static int bcm281xx_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
+{
+ struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+
+ return pdata->npins;
+}
+
+static const char *bcm281xx_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
+ unsigned group)
+{
+ struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+
+ return pdata->pins[group].name;
+}
+
+static int bcm281xx_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
+ unsigned group,
+ const unsigned **pins,
+ unsigned *num_pins)
+{
+ struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+
+ *pins = &pdata->pins[group].number;
+ *num_pins = 1;
+
+ return 0;
+}
+
+static void bcm281xx_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
+ struct seq_file *s,
+ unsigned offset)
+{
+ seq_printf(s, " %s", dev_name(pctldev->dev));
+}
+
+static struct pinctrl_ops bcm281xx_pinctrl_ops = {
+ .get_groups_count = bcm281xx_pinctrl_get_groups_count,
+ .get_group_name = bcm281xx_pinctrl_get_group_name,
+ .get_group_pins = bcm281xx_pinctrl_get_group_pins,
+ .pin_dbg_show = bcm281xx_pinctrl_pin_dbg_show,
+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
+ .dt_free_map = pinctrl_utils_dt_free_map,
+};
+
+static int bcm281xx_pinctrl_get_fcns_count(struct pinctrl_dev *pctldev)
+{
+ struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+
+ return pdata->nfunctions;
+}
+
+static const char *bcm281xx_pinctrl_get_fcn_name(struct pinctrl_dev *pctldev,
+ unsigned function)
+{
+ struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+
+ return pdata->functions[function].name;
+}
+
+static int bcm281xx_pinctrl_get_fcn_groups(struct pinctrl_dev *pctldev,
+ unsigned function,
+ const char * const **groups,
+ unsigned * const num_groups)
+{
+ struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+
+ *groups = pdata->functions[function].groups;
+ *num_groups = pdata->functions[function].ngroups;
+
+ return 0;
+}
+
+static int bcm281xx_pinmux_set(struct pinctrl_dev *pctldev,
+ unsigned function,
+ unsigned group)
+{
+ struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+ const struct bcm281xx_pin_function *f = &pdata->functions[function];
+ u32 offset = 4 * pdata->pins[group].number;
+ int rc = 0;
+
+ dev_dbg(pctldev->dev,
+ "%s(): Enable function %s (%d) of pin %s (%d) @offset 0x%x.\n",
+ __func__, f->name, function, pdata->pins[group].name,
+ pdata->pins[group].number, offset);
+
+ rc = regmap_update_bits(pdata->regmap, offset,
+ BCM281XX_PIN_REG_F_SEL_MASK,
+ function << BCM281XX_PIN_REG_F_SEL_SHIFT);
+ if (rc)
+ dev_err(pctldev->dev,
+ "Error updating register for pin %s (%d).\n",
+ pdata->pins[group].name, pdata->pins[group].number);
+
+ return rc;
+}
+
+static struct pinmux_ops bcm281xx_pinctrl_pinmux_ops = {
+ .get_functions_count = bcm281xx_pinctrl_get_fcns_count,
+ .get_function_name = bcm281xx_pinctrl_get_fcn_name,
+ .get_function_groups = bcm281xx_pinctrl_get_fcn_groups,
+ .set_mux = bcm281xx_pinmux_set,
+};
+
+static int bcm281xx_pinctrl_pin_config_get(struct pinctrl_dev *pctldev,
+ unsigned pin,
+ unsigned long *config)
+{
+ return -ENOTSUPP;
+}
+
+
+/* Goes through the configs and update register val/mask */
+static int bcm281xx_std_pin_update(struct pinctrl_dev *pctldev,
+ unsigned pin,
+ unsigned long *configs,
+ unsigned num_configs,
+ u32 *val,
+ u32 *mask)
+{
+ struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+ int i;
+ enum pin_config_param param;
+ u16 arg;
+
+ for (i = 0; i < num_configs; i++) {
+ param = pinconf_to_config_param(configs[i]);
+ arg = pinconf_to_config_argument(configs[i]);
+
+ switch (param) {
+ case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
+ arg = (arg >= 1 ? 1 : 0);
+ bcm281xx_pin_update(val, mask, arg,
+ BCM281XX_PIN_SHIFT(STD, HYST),
+ BCM281XX_PIN_MASK(STD, HYST));
+ break;
+ /*
+ * The pin bias can only be one of pull-up, pull-down, or
+ * disable. The user does not need to specify a value for the
+ * property, and the default value from pinconf-generic is
+ * ignored.
+ */
+ case PIN_CONFIG_BIAS_DISABLE:
+ bcm281xx_pin_update(val, mask, 0,
+ BCM281XX_PIN_SHIFT(STD, PULL_UP),
+ BCM281XX_PIN_MASK(STD, PULL_UP));
+ bcm281xx_pin_update(val, mask, 0,
+ BCM281XX_PIN_SHIFT(STD, PULL_DN),
+ BCM281XX_PIN_MASK(STD, PULL_DN));
+ break;
+
+ case PIN_CONFIG_BIAS_PULL_UP:
+ bcm281xx_pin_update(val, mask, 1,
+ BCM281XX_PIN_SHIFT(STD, PULL_UP),
+ BCM281XX_PIN_MASK(STD, PULL_UP));
+ bcm281xx_pin_update(val, mask, 0,
+ BCM281XX_PIN_SHIFT(STD, PULL_DN),
+ BCM281XX_PIN_MASK(STD, PULL_DN));
+ break;
+
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ bcm281xx_pin_update(val, mask, 0,
+ BCM281XX_PIN_SHIFT(STD, PULL_UP),
+ BCM281XX_PIN_MASK(STD, PULL_UP));
+ bcm281xx_pin_update(val, mask, 1,
+ BCM281XX_PIN_SHIFT(STD, PULL_DN),
+ BCM281XX_PIN_MASK(STD, PULL_DN));
+ break;
+
+ case PIN_CONFIG_SLEW_RATE:
+ arg = (arg >= 1 ? 1 : 0);
+ bcm281xx_pin_update(val, mask, arg,
+ BCM281XX_PIN_SHIFT(STD, SLEW),
+ BCM281XX_PIN_MASK(STD, SLEW));
+ break;
+
+ case PIN_CONFIG_INPUT_ENABLE:
+ /* inversed since register is for input _disable_ */
+ arg = (arg >= 1 ? 0 : 1);
+ bcm281xx_pin_update(val, mask, arg,
+ BCM281XX_PIN_SHIFT(STD, INPUT_DIS),
+ BCM281XX_PIN_MASK(STD, INPUT_DIS));
+ break;
+
+ case PIN_CONFIG_DRIVE_STRENGTH:
+ /* Valid range is 2-16 mA, even numbers only */
+ if ((arg < 2) || (arg > 16) || (arg % 2)) {
+ dev_err(pctldev->dev,
+ "Invalid Drive Strength value (%d) for "
+ "pin %s (%d). Valid values are "
+ "(2..16) mA, even numbers only.\n",
+ arg, pdata->pins[pin].name, pin);
+ return -EINVAL;
+ }
+ bcm281xx_pin_update(val, mask, (arg/2)-1,
+ BCM281XX_PIN_SHIFT(STD, DRV_STR),
+ BCM281XX_PIN_MASK(STD, DRV_STR));
+ break;
+
+ default:
+ dev_err(pctldev->dev,
+ "Unrecognized pin config %d for pin %s (%d).\n",
+ param, pdata->pins[pin].name, pin);
+ return -EINVAL;
+
+ } /* switch config */
+ } /* for each config */
+
+ return 0;
+}
+
+/*
+ * The pull-up strength for an I2C pin is represented by bits 4-6 in the
+ * register with the following mapping:
+ * 0b000: No pull-up
+ * 0b001: 1200 Ohm
+ * 0b010: 1800 Ohm
+ * 0b011: 720 Ohm
+ * 0b100: 2700 Ohm
+ * 0b101: 831 Ohm
+ * 0b110: 1080 Ohm
+ * 0b111: 568 Ohm
+ * This array maps pull-up strength in Ohms to register values (1+index).
+ */
+static const u16 bcm281xx_pullup_map[] = {
+ 1200, 1800, 720, 2700, 831, 1080, 568
+};
+
+/* Goes through the configs and update register val/mask */
+static int bcm281xx_i2c_pin_update(struct pinctrl_dev *pctldev,
+ unsigned pin,
+ unsigned long *configs,
+ unsigned num_configs,
+ u32 *val,
+ u32 *mask)
+{
+ struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+ int i, j;
+ enum pin_config_param param;
+ u16 arg;
+
+ for (i = 0; i < num_configs; i++) {
+ param = pinconf_to_config_param(configs[i]);
+ arg = pinconf_to_config_argument(configs[i]);
+
+ switch (param) {
+ case PIN_CONFIG_BIAS_PULL_UP:
+ for (j = 0; j < ARRAY_SIZE(bcm281xx_pullup_map); j++)
+ if (bcm281xx_pullup_map[j] == arg)
+ break;
+
+ if (j == ARRAY_SIZE(bcm281xx_pullup_map)) {
+ dev_err(pctldev->dev,
+ "Invalid pull-up value (%d) for pin %s "
+ "(%d). Valid values are 568, 720, 831, "
+ "1080, 1200, 1800, 2700 Ohms.\n",
+ arg, pdata->pins[pin].name, pin);
+ return -EINVAL;
+ }
+
+ bcm281xx_pin_update(val, mask, j+1,
+ BCM281XX_PIN_SHIFT(I2C, PULL_UP_STR),
+ BCM281XX_PIN_MASK(I2C, PULL_UP_STR));
+ break;
+
+ case PIN_CONFIG_BIAS_DISABLE:
+ bcm281xx_pin_update(val, mask, 0,
+ BCM281XX_PIN_SHIFT(I2C, PULL_UP_STR),
+ BCM281XX_PIN_MASK(I2C, PULL_UP_STR));
+ break;
+
+ case PIN_CONFIG_SLEW_RATE:
+ arg = (arg >= 1 ? 1 : 0);
+ bcm281xx_pin_update(val, mask, arg,
+ BCM281XX_PIN_SHIFT(I2C, SLEW),
+ BCM281XX_PIN_MASK(I2C, SLEW));
+ break;
+
+ case PIN_CONFIG_INPUT_ENABLE:
+ /* inversed since register is for input _disable_ */
+ arg = (arg >= 1 ? 0 : 1);
+ bcm281xx_pin_update(val, mask, arg,
+ BCM281XX_PIN_SHIFT(I2C, INPUT_DIS),
+ BCM281XX_PIN_MASK(I2C, INPUT_DIS));
+ break;
+
+ default:
+ dev_err(pctldev->dev,
+ "Unrecognized pin config %d for pin %s (%d).\n",
+ param, pdata->pins[pin].name, pin);
+ return -EINVAL;
+
+ } /* switch config */
+ } /* for each config */
+
+ return 0;
+}
+
+/* Goes through the configs and update register val/mask */
+static int bcm281xx_hdmi_pin_update(struct pinctrl_dev *pctldev,
+ unsigned pin,
+ unsigned long *configs,
+ unsigned num_configs,
+ u32 *val,
+ u32 *mask)
+{
+ struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+ int i;
+ enum pin_config_param param;
+ u16 arg;
+
+ for (i = 0; i < num_configs; i++) {
+ param = pinconf_to_config_param(configs[i]);
+ arg = pinconf_to_config_argument(configs[i]);
+
+ switch (param) {
+ case PIN_CONFIG_SLEW_RATE:
+ arg = (arg >= 1 ? 1 : 0);
+ bcm281xx_pin_update(val, mask, arg,
+ BCM281XX_PIN_SHIFT(HDMI, MODE),
+ BCM281XX_PIN_MASK(HDMI, MODE));
+ break;
+
+ case PIN_CONFIG_INPUT_ENABLE:
+ /* inversed since register is for input _disable_ */
+ arg = (arg >= 1 ? 0 : 1);
+ bcm281xx_pin_update(val, mask, arg,
+ BCM281XX_PIN_SHIFT(HDMI, INPUT_DIS),
+ BCM281XX_PIN_MASK(HDMI, INPUT_DIS));
+ break;
+
+ default:
+ dev_err(pctldev->dev,
+ "Unrecognized pin config %d for pin %s (%d).\n",
+ param, pdata->pins[pin].name, pin);
+ return -EINVAL;
+
+ } /* switch config */
+ } /* for each config */
+
+ return 0;
+}
+
+static int bcm281xx_pinctrl_pin_config_set(struct pinctrl_dev *pctldev,
+ unsigned pin,
+ unsigned long *configs,
+ unsigned num_configs)
+{
+ struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+ enum bcm281xx_pin_type pin_type;
+ u32 offset = 4 * pin;
+ u32 cfg_val, cfg_mask;
+ int rc;
+
+ cfg_val = 0;
+ cfg_mask = 0;
+ pin_type = pin_type_get(pctldev, pin);
+
+ /* Different pins have different configuration options */
+ switch (pin_type) {
+ case BCM281XX_PIN_TYPE_STD:
+ rc = bcm281xx_std_pin_update(pctldev, pin, configs,
+ num_configs, &cfg_val, &cfg_mask);
+ break;
+
+ case BCM281XX_PIN_TYPE_I2C:
+ rc = bcm281xx_i2c_pin_update(pctldev, pin, configs,
+ num_configs, &cfg_val, &cfg_mask);
+ break;
+
+ case BCM281XX_PIN_TYPE_HDMI:
+ rc = bcm281xx_hdmi_pin_update(pctldev, pin, configs,
+ num_configs, &cfg_val, &cfg_mask);
+ break;
+
+ default:
+ dev_err(pctldev->dev, "Unknown pin type for pin %s (%d).\n",
+ pdata->pins[pin].name, pin);
+ return -EINVAL;
+
+ } /* switch pin type */
+
+ if (rc)
+ return rc;
+
+ dev_dbg(pctldev->dev,
+ "%s(): Set pin %s (%d) with config 0x%x, mask 0x%x\n",
+ __func__, pdata->pins[pin].name, pin, cfg_val, cfg_mask);
+
+ rc = regmap_update_bits(pdata->regmap, offset, cfg_mask, cfg_val);
+ if (rc) {
+ dev_err(pctldev->dev,
+ "Error updating register for pin %s (%d).\n",
+ pdata->pins[pin].name, pin);
+ return rc;
+ }
+
+ return 0;
+}
+
+static struct pinconf_ops bcm281xx_pinctrl_pinconf_ops = {
+ .pin_config_get = bcm281xx_pinctrl_pin_config_get,
+ .pin_config_set = bcm281xx_pinctrl_pin_config_set,
+};
+
+static struct pinctrl_desc bcm281xx_pinctrl_desc = {
+ /* name, pins, npins members initialized in probe function */
+ .pctlops = &bcm281xx_pinctrl_ops,
+ .pmxops = &bcm281xx_pinctrl_pinmux_ops,
+ .confops = &bcm281xx_pinctrl_pinconf_ops,
+ .owner = THIS_MODULE,
+};
+
+static int __init bcm281xx_pinctrl_probe(struct platform_device *pdev)
+{
+ struct bcm281xx_pinctrl_data *pdata = &bcm281xx_pinctrl;
+ struct resource *res;
+ struct pinctrl_dev *pctl;
+
+ /* So far We can assume there is only 1 bank of registers */
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ pdata->reg_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(pdata->reg_base)) {
+ dev_err(&pdev->dev, "Failed to ioremap MEM resource\n");
+ return -ENODEV;
+ }
+
+ /* Initialize the dynamic part of pinctrl_desc */
+ pdata->regmap = devm_regmap_init_mmio(&pdev->dev, pdata->reg_base,
+ &bcm281xx_pinctrl_regmap_config);
+ if (IS_ERR(pdata->regmap)) {
+ dev_err(&pdev->dev, "Regmap MMIO init failed.\n");
+ return -ENODEV;
+ }
+
+ bcm281xx_pinctrl_desc.name = dev_name(&pdev->dev);
+ bcm281xx_pinctrl_desc.pins = bcm281xx_pinctrl.pins;
+ bcm281xx_pinctrl_desc.npins = bcm281xx_pinctrl.npins;
+
+ pctl = pinctrl_register(&bcm281xx_pinctrl_desc,
+ &pdev->dev,
+ pdata);
+ if (!pctl) {
+ dev_err(&pdev->dev, "Failed to register pinctrl\n");
+ return -ENODEV;
+ }
+
+ platform_set_drvdata(pdev, pdata);
+
+ return 0;
+}
+
+static const struct of_device_id bcm281xx_pinctrl_of_match[] = {
+ { .compatible = "brcm,bcm11351-pinctrl", },
+ { },
+};
+
+static struct platform_driver bcm281xx_pinctrl_driver = {
+ .driver = {
+ .name = "bcm281xx-pinctrl",
+ .of_match_table = bcm281xx_pinctrl_of_match,
+ },
+};
+
+module_platform_driver_probe(bcm281xx_pinctrl_driver, bcm281xx_pinctrl_probe);
+
+MODULE_AUTHOR("Broadcom Corporation <bcm-kernel-feedback-list@broadcom.com>");
+MODULE_AUTHOR("Sherman Yin <syin@broadcom.com>");
+MODULE_DESCRIPTION("Broadcom BCM281xx pinctrl driver");
+MODULE_LICENSE("GPL v2");
--- /dev/null
+/*
+ * Driver for Broadcom BCM2835 GPIO unit (pinctrl + GPIO)
+ *
+ * Copyright (C) 2012 Chris Boot, Simon Arlott, Stephen Warren
+ *
+ * This driver is inspired by:
+ * pinctrl-nomadik.c, please see original file for copyright information
+ * pinctrl-tegra.c, please see original file for copyright information
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/bitmap.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/gpio.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/irqdesc.h>
+#include <linux/irqdomain.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/pinctrl/machine.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/platform_device.h>
+#include <linux/seq_file.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+
+#define MODULE_NAME "pinctrl-bcm2835"
+#define BCM2835_NUM_GPIOS 54
+#define BCM2835_NUM_BANKS 2
+
+#define BCM2835_PIN_BITMAP_SZ \
+ DIV_ROUND_UP(BCM2835_NUM_GPIOS, sizeof(unsigned long) * 8)
+
+/* GPIO register offsets */
+#define GPFSEL0 0x0 /* Function Select */
+#define GPSET0 0x1c /* Pin Output Set */
+#define GPCLR0 0x28 /* Pin Output Clear */
+#define GPLEV0 0x34 /* Pin Level */
+#define GPEDS0 0x40 /* Pin Event Detect Status */
+#define GPREN0 0x4c /* Pin Rising Edge Detect Enable */
+#define GPFEN0 0x58 /* Pin Falling Edge Detect Enable */
+#define GPHEN0 0x64 /* Pin High Detect Enable */
+#define GPLEN0 0x70 /* Pin Low Detect Enable */
+#define GPAREN0 0x7c /* Pin Async Rising Edge Detect */
+#define GPAFEN0 0x88 /* Pin Async Falling Edge Detect */
+#define GPPUD 0x94 /* Pin Pull-up/down Enable */
+#define GPPUDCLK0 0x98 /* Pin Pull-up/down Enable Clock */
+
+#define FSEL_REG(p) (GPFSEL0 + (((p) / 10) * 4))
+#define FSEL_SHIFT(p) (((p) % 10) * 3)
+#define GPIO_REG_OFFSET(p) ((p) / 32)
+#define GPIO_REG_SHIFT(p) ((p) % 32)
+
+enum bcm2835_pinconf_param {
+ /* argument: bcm2835_pinconf_pull */
+ BCM2835_PINCONF_PARAM_PULL,
+};
+
+enum bcm2835_pinconf_pull {
+ BCM2835_PINCONFIG_PULL_NONE,
+ BCM2835_PINCONFIG_PULL_DOWN,
+ BCM2835_PINCONFIG_PULL_UP,
+};
+
+#define BCM2835_PINCONF_PACK(_param_, _arg_) ((_param_) << 16 | (_arg_))
+#define BCM2835_PINCONF_UNPACK_PARAM(_conf_) ((_conf_) >> 16)
+#define BCM2835_PINCONF_UNPACK_ARG(_conf_) ((_conf_) & 0xffff)
+
+struct bcm2835_gpio_irqdata {
+ struct bcm2835_pinctrl *pc;
+ int bank;
+};
+
+struct bcm2835_pinctrl {
+ struct device *dev;
+ void __iomem *base;
+ int irq[BCM2835_NUM_BANKS];
+
+ /* note: locking assumes each bank will have its own unsigned long */
+ unsigned long enabled_irq_map[BCM2835_NUM_BANKS];
+ unsigned int irq_type[BCM2835_NUM_GPIOS];
+
+ struct pinctrl_dev *pctl_dev;
+ struct irq_domain *irq_domain;
+ struct gpio_chip gpio_chip;
+ struct pinctrl_gpio_range gpio_range;
+
+ struct bcm2835_gpio_irqdata irq_data[BCM2835_NUM_BANKS];
+ spinlock_t irq_lock[BCM2835_NUM_BANKS];
+};
+
+static struct lock_class_key gpio_lock_class;
+
+/* pins are just named GPIO0..GPIO53 */
+#define BCM2835_GPIO_PIN(a) PINCTRL_PIN(a, "gpio" #a)
+static struct pinctrl_pin_desc bcm2835_gpio_pins[] = {
+ BCM2835_GPIO_PIN(0),
+ BCM2835_GPIO_PIN(1),
+ BCM2835_GPIO_PIN(2),
+ BCM2835_GPIO_PIN(3),
+ BCM2835_GPIO_PIN(4),
+ BCM2835_GPIO_PIN(5),
+ BCM2835_GPIO_PIN(6),
+ BCM2835_GPIO_PIN(7),
+ BCM2835_GPIO_PIN(8),
+ BCM2835_GPIO_PIN(9),
+ BCM2835_GPIO_PIN(10),
+ BCM2835_GPIO_PIN(11),
+ BCM2835_GPIO_PIN(12),
+ BCM2835_GPIO_PIN(13),
+ BCM2835_GPIO_PIN(14),
+ BCM2835_GPIO_PIN(15),
+ BCM2835_GPIO_PIN(16),
+ BCM2835_GPIO_PIN(17),
+ BCM2835_GPIO_PIN(18),
+ BCM2835_GPIO_PIN(19),
+ BCM2835_GPIO_PIN(20),
+ BCM2835_GPIO_PIN(21),
+ BCM2835_GPIO_PIN(22),
+ BCM2835_GPIO_PIN(23),
+ BCM2835_GPIO_PIN(24),
+ BCM2835_GPIO_PIN(25),
+ BCM2835_GPIO_PIN(26),
+ BCM2835_GPIO_PIN(27),
+ BCM2835_GPIO_PIN(28),
+ BCM2835_GPIO_PIN(29),
+ BCM2835_GPIO_PIN(30),
+ BCM2835_GPIO_PIN(31),
+ BCM2835_GPIO_PIN(32),
+ BCM2835_GPIO_PIN(33),
+ BCM2835_GPIO_PIN(34),
+ BCM2835_GPIO_PIN(35),
+ BCM2835_GPIO_PIN(36),
+ BCM2835_GPIO_PIN(37),
+ BCM2835_GPIO_PIN(38),
+ BCM2835_GPIO_PIN(39),
+ BCM2835_GPIO_PIN(40),
+ BCM2835_GPIO_PIN(41),
+ BCM2835_GPIO_PIN(42),
+ BCM2835_GPIO_PIN(43),
+ BCM2835_GPIO_PIN(44),
+ BCM2835_GPIO_PIN(45),
+ BCM2835_GPIO_PIN(46),
+ BCM2835_GPIO_PIN(47),
+ BCM2835_GPIO_PIN(48),
+ BCM2835_GPIO_PIN(49),
+ BCM2835_GPIO_PIN(50),
+ BCM2835_GPIO_PIN(51),
+ BCM2835_GPIO_PIN(52),
+ BCM2835_GPIO_PIN(53),
+};
+
+/* one pin per group */
+static const char * const bcm2835_gpio_groups[] = {
+ "gpio0",
+ "gpio1",
+ "gpio2",
+ "gpio3",
+ "gpio4",
+ "gpio5",
+ "gpio6",
+ "gpio7",
+ "gpio8",
+ "gpio9",
+ "gpio10",
+ "gpio11",
+ "gpio12",
+ "gpio13",
+ "gpio14",
+ "gpio15",
+ "gpio16",
+ "gpio17",
+ "gpio18",
+ "gpio19",
+ "gpio20",
+ "gpio21",
+ "gpio22",
+ "gpio23",
+ "gpio24",
+ "gpio25",
+ "gpio26",
+ "gpio27",
+ "gpio28",
+ "gpio29",
+ "gpio30",
+ "gpio31",
+ "gpio32",
+ "gpio33",
+ "gpio34",
+ "gpio35",
+ "gpio36",
+ "gpio37",
+ "gpio38",
+ "gpio39",
+ "gpio40",
+ "gpio41",
+ "gpio42",
+ "gpio43",
+ "gpio44",
+ "gpio45",
+ "gpio46",
+ "gpio47",
+ "gpio48",
+ "gpio49",
+ "gpio50",
+ "gpio51",
+ "gpio52",
+ "gpio53",
+};
+
+enum bcm2835_fsel {
+ BCM2835_FSEL_GPIO_IN = 0,
+ BCM2835_FSEL_GPIO_OUT = 1,
+ BCM2835_FSEL_ALT0 = 4,
+ BCM2835_FSEL_ALT1 = 5,
+ BCM2835_FSEL_ALT2 = 6,
+ BCM2835_FSEL_ALT3 = 7,
+ BCM2835_FSEL_ALT4 = 3,
+ BCM2835_FSEL_ALT5 = 2,
+ BCM2835_FSEL_COUNT = 8,
+ BCM2835_FSEL_MASK = 0x7,
+};
+
+static const char * const bcm2835_functions[BCM2835_FSEL_COUNT] = {
+ [BCM2835_FSEL_GPIO_IN] = "gpio_in",
+ [BCM2835_FSEL_GPIO_OUT] = "gpio_out",
+ [BCM2835_FSEL_ALT0] = "alt0",
+ [BCM2835_FSEL_ALT1] = "alt1",
+ [BCM2835_FSEL_ALT2] = "alt2",
+ [BCM2835_FSEL_ALT3] = "alt3",
+ [BCM2835_FSEL_ALT4] = "alt4",
+ [BCM2835_FSEL_ALT5] = "alt5",
+};
+
+static const char * const irq_type_names[] = {
+ [IRQ_TYPE_NONE] = "none",
+ [IRQ_TYPE_EDGE_RISING] = "edge-rising",
+ [IRQ_TYPE_EDGE_FALLING] = "edge-falling",
+ [IRQ_TYPE_EDGE_BOTH] = "edge-both",
+ [IRQ_TYPE_LEVEL_HIGH] = "level-high",
+ [IRQ_TYPE_LEVEL_LOW] = "level-low",
+};
+
+static inline u32 bcm2835_gpio_rd(struct bcm2835_pinctrl *pc, unsigned reg)
+{
+ return readl(pc->base + reg);
+}
+
+static inline void bcm2835_gpio_wr(struct bcm2835_pinctrl *pc, unsigned reg,
+ u32 val)
+{
+ writel(val, pc->base + reg);
+}
+
+static inline int bcm2835_gpio_get_bit(struct bcm2835_pinctrl *pc, unsigned reg,
+ unsigned bit)
+{
+ reg += GPIO_REG_OFFSET(bit) * 4;
+ return (bcm2835_gpio_rd(pc, reg) >> GPIO_REG_SHIFT(bit)) & 1;
+}
+
+/* note NOT a read/modify/write cycle */
+static inline void bcm2835_gpio_set_bit(struct bcm2835_pinctrl *pc,
+ unsigned reg, unsigned bit)
+{
+ reg += GPIO_REG_OFFSET(bit) * 4;
+ bcm2835_gpio_wr(pc, reg, BIT(GPIO_REG_SHIFT(bit)));
+}
+
+static inline enum bcm2835_fsel bcm2835_pinctrl_fsel_get(
+ struct bcm2835_pinctrl *pc, unsigned pin)
+{
+ u32 val = bcm2835_gpio_rd(pc, FSEL_REG(pin));
+ enum bcm2835_fsel status = (val >> FSEL_SHIFT(pin)) & BCM2835_FSEL_MASK;
+
+ dev_dbg(pc->dev, "get %08x (%u => %s)\n", val, pin,
+ bcm2835_functions[status]);
+
+ return status;
+}
+
+static inline void bcm2835_pinctrl_fsel_set(
+ struct bcm2835_pinctrl *pc, unsigned pin,
+ enum bcm2835_fsel fsel)
+{
+ u32 val = bcm2835_gpio_rd(pc, FSEL_REG(pin));
+ enum bcm2835_fsel cur = (val >> FSEL_SHIFT(pin)) & BCM2835_FSEL_MASK;
+
+ dev_dbg(pc->dev, "read %08x (%u => %s)\n", val, pin,
+ bcm2835_functions[cur]);
+
+ if (cur == fsel)
+ return;
+
+ if (cur != BCM2835_FSEL_GPIO_IN && fsel != BCM2835_FSEL_GPIO_IN) {
+ /* always transition through GPIO_IN */
+ val &= ~(BCM2835_FSEL_MASK << FSEL_SHIFT(pin));
+ val |= BCM2835_FSEL_GPIO_IN << FSEL_SHIFT(pin);
+
+ dev_dbg(pc->dev, "trans %08x (%u <= %s)\n", val, pin,
+ bcm2835_functions[BCM2835_FSEL_GPIO_IN]);
+ bcm2835_gpio_wr(pc, FSEL_REG(pin), val);
+ }
+
+ val &= ~(BCM2835_FSEL_MASK << FSEL_SHIFT(pin));
+ val |= fsel << FSEL_SHIFT(pin);
+
+ dev_dbg(pc->dev, "write %08x (%u <= %s)\n", val, pin,
+ bcm2835_functions[fsel]);
+ bcm2835_gpio_wr(pc, FSEL_REG(pin), val);
+}
+
+static int bcm2835_gpio_request(struct gpio_chip *chip, unsigned offset)
+{
+ return pinctrl_request_gpio(chip->base + offset);
+}
+
+static void bcm2835_gpio_free(struct gpio_chip *chip, unsigned offset)
+{
+ pinctrl_free_gpio(chip->base + offset);
+}
+
+static int bcm2835_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
+{
+ return pinctrl_gpio_direction_input(chip->base + offset);
+}
+
+static int bcm2835_gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+ struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev);
+
+ return bcm2835_gpio_get_bit(pc, GPLEV0, offset);
+}
+
+static int bcm2835_gpio_direction_output(struct gpio_chip *chip,
+ unsigned offset, int value)
+{
+ return pinctrl_gpio_direction_output(chip->base + offset);
+}
+
+static void bcm2835_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+ struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev);
+
+ bcm2835_gpio_set_bit(pc, value ? GPSET0 : GPCLR0, offset);
+}
+
+static int bcm2835_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
+{
+ struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev);
+
+ return irq_linear_revmap(pc->irq_domain, offset);
+}
+
+static struct gpio_chip bcm2835_gpio_chip = {
+ .label = MODULE_NAME,
+ .owner = THIS_MODULE,
+ .request = bcm2835_gpio_request,
+ .free = bcm2835_gpio_free,
+ .direction_input = bcm2835_gpio_direction_input,
+ .direction_output = bcm2835_gpio_direction_output,
+ .get = bcm2835_gpio_get,
+ .set = bcm2835_gpio_set,
+ .to_irq = bcm2835_gpio_to_irq,
+ .base = -1,
+ .ngpio = BCM2835_NUM_GPIOS,
+ .can_sleep = false,
+};
+
+static irqreturn_t bcm2835_gpio_irq_handler(int irq, void *dev_id)
+{
+ struct bcm2835_gpio_irqdata *irqdata = dev_id;
+ struct bcm2835_pinctrl *pc = irqdata->pc;
+ int bank = irqdata->bank;
+ unsigned long events;
+ unsigned offset;
+ unsigned gpio;
+ unsigned int type;
+
+ events = bcm2835_gpio_rd(pc, GPEDS0 + bank * 4);
+ events &= pc->enabled_irq_map[bank];
+ for_each_set_bit(offset, &events, 32) {
+ gpio = (32 * bank) + offset;
+ type = pc->irq_type[gpio];
+
+ generic_handle_irq(irq_linear_revmap(pc->irq_domain, gpio));
+ }
+ return events ? IRQ_HANDLED : IRQ_NONE;
+}
+
+static inline void __bcm2835_gpio_irq_config(struct bcm2835_pinctrl *pc,
+ unsigned reg, unsigned offset, bool enable)
+{
+ u32 value;
+ reg += GPIO_REG_OFFSET(offset) * 4;
+ value = bcm2835_gpio_rd(pc, reg);
+ if (enable)
+ value |= BIT(GPIO_REG_SHIFT(offset));
+ else
+ value &= ~(BIT(GPIO_REG_SHIFT(offset)));
+ bcm2835_gpio_wr(pc, reg, value);
+}
+
+/* fast path for IRQ handler */
+static void bcm2835_gpio_irq_config(struct bcm2835_pinctrl *pc,
+ unsigned offset, bool enable)
+{
+ switch (pc->irq_type[offset]) {
+ case IRQ_TYPE_EDGE_RISING:
+ __bcm2835_gpio_irq_config(pc, GPREN0, offset, enable);
+ break;
+
+ case IRQ_TYPE_EDGE_FALLING:
+ __bcm2835_gpio_irq_config(pc, GPFEN0, offset, enable);
+ break;
+
+ case IRQ_TYPE_EDGE_BOTH:
+ __bcm2835_gpio_irq_config(pc, GPREN0, offset, enable);
+ __bcm2835_gpio_irq_config(pc, GPFEN0, offset, enable);
+ break;
+
+ case IRQ_TYPE_LEVEL_HIGH:
+ __bcm2835_gpio_irq_config(pc, GPHEN0, offset, enable);
+ break;
+
+ case IRQ_TYPE_LEVEL_LOW:
+ __bcm2835_gpio_irq_config(pc, GPLEN0, offset, enable);
+ break;
+ }
+}
+
+static void bcm2835_gpio_irq_enable(struct irq_data *data)
+{
+ struct bcm2835_pinctrl *pc = irq_data_get_irq_chip_data(data);
+ unsigned gpio = irqd_to_hwirq(data);
+ unsigned offset = GPIO_REG_SHIFT(gpio);
+ unsigned bank = GPIO_REG_OFFSET(gpio);
+ unsigned long flags;
+
+ spin_lock_irqsave(&pc->irq_lock[bank], flags);
+ set_bit(offset, &pc->enabled_irq_map[bank]);
+ bcm2835_gpio_irq_config(pc, gpio, true);
+ spin_unlock_irqrestore(&pc->irq_lock[bank], flags);
+}
+
+static void bcm2835_gpio_irq_disable(struct irq_data *data)
+{
+ struct bcm2835_pinctrl *pc = irq_data_get_irq_chip_data(data);
+ unsigned gpio = irqd_to_hwirq(data);
+ unsigned offset = GPIO_REG_SHIFT(gpio);
+ unsigned bank = GPIO_REG_OFFSET(gpio);
+ unsigned long flags;
+
+ spin_lock_irqsave(&pc->irq_lock[bank], flags);
+ bcm2835_gpio_irq_config(pc, gpio, false);
+ clear_bit(offset, &pc->enabled_irq_map[bank]);
+ spin_unlock_irqrestore(&pc->irq_lock[bank], flags);
+}
+
+static int __bcm2835_gpio_irq_set_type_disabled(struct bcm2835_pinctrl *pc,
+ unsigned offset, unsigned int type)
+{
+ switch (type) {
+ case IRQ_TYPE_NONE:
+ case IRQ_TYPE_EDGE_RISING:
+ case IRQ_TYPE_EDGE_FALLING:
+ case IRQ_TYPE_EDGE_BOTH:
+ case IRQ_TYPE_LEVEL_HIGH:
+ case IRQ_TYPE_LEVEL_LOW:
+ pc->irq_type[offset] = type;
+ break;
+
+ default:
+ return -EINVAL;
+ }
+ return 0;
+}
+
+/* slower path for reconfiguring IRQ type */
+static int __bcm2835_gpio_irq_set_type_enabled(struct bcm2835_pinctrl *pc,
+ unsigned offset, unsigned int type)
+{
+ switch (type) {
+ case IRQ_TYPE_NONE:
+ if (pc->irq_type[offset] != type) {
+ bcm2835_gpio_irq_config(pc, offset, false);
+ pc->irq_type[offset] = type;
+ }
+ break;
+
+ case IRQ_TYPE_EDGE_RISING:
+ if (pc->irq_type[offset] == IRQ_TYPE_EDGE_BOTH) {
+ /* RISING already enabled, disable FALLING */
+ pc->irq_type[offset] = IRQ_TYPE_EDGE_FALLING;
+ bcm2835_gpio_irq_config(pc, offset, false);
+ pc->irq_type[offset] = type;
+ } else if (pc->irq_type[offset] != type) {
+ bcm2835_gpio_irq_config(pc, offset, false);
+ pc->irq_type[offset] = type;
+ bcm2835_gpio_irq_config(pc, offset, true);
+ }
+ break;
+
+ case IRQ_TYPE_EDGE_FALLING:
+ if (pc->irq_type[offset] == IRQ_TYPE_EDGE_BOTH) {
+ /* FALLING already enabled, disable RISING */
+ pc->irq_type[offset] = IRQ_TYPE_EDGE_RISING;
+ bcm2835_gpio_irq_config(pc, offset, false);
+ pc->irq_type[offset] = type;
+ } else if (pc->irq_type[offset] != type) {
+ bcm2835_gpio_irq_config(pc, offset, false);
+ pc->irq_type[offset] = type;
+ bcm2835_gpio_irq_config(pc, offset, true);
+ }
+ break;
+
+ case IRQ_TYPE_EDGE_BOTH:
+ if (pc->irq_type[offset] == IRQ_TYPE_EDGE_RISING) {
+ /* RISING already enabled, enable FALLING too */
+ pc->irq_type[offset] = IRQ_TYPE_EDGE_FALLING;
+ bcm2835_gpio_irq_config(pc, offset, true);
+ pc->irq_type[offset] = type;
+ } else if (pc->irq_type[offset] == IRQ_TYPE_EDGE_FALLING) {
+ /* FALLING already enabled, enable RISING too */
+ pc->irq_type[offset] = IRQ_TYPE_EDGE_RISING;
+ bcm2835_gpio_irq_config(pc, offset, true);
+ pc->irq_type[offset] = type;
+ } else if (pc->irq_type[offset] != type) {
+ bcm2835_gpio_irq_config(pc, offset, false);
+ pc->irq_type[offset] = type;
+ bcm2835_gpio_irq_config(pc, offset, true);
+ }
+ break;
+
+ case IRQ_TYPE_LEVEL_HIGH:
+ case IRQ_TYPE_LEVEL_LOW:
+ if (pc->irq_type[offset] != type) {
+ bcm2835_gpio_irq_config(pc, offset, false);
+ pc->irq_type[offset] = type;
+ bcm2835_gpio_irq_config(pc, offset, true);
+ }
+ break;
+
+ default:
+ return -EINVAL;
+ }
+ return 0;
+}
+
+static int bcm2835_gpio_irq_set_type(struct irq_data *data, unsigned int type)
+{
+ struct bcm2835_pinctrl *pc = irq_data_get_irq_chip_data(data);
+ unsigned gpio = irqd_to_hwirq(data);
+ unsigned offset = GPIO_REG_SHIFT(gpio);
+ unsigned bank = GPIO_REG_OFFSET(gpio);
+ unsigned long flags;
+ int ret;
+
+ spin_lock_irqsave(&pc->irq_lock[bank], flags);
+
+ if (test_bit(offset, &pc->enabled_irq_map[bank]))
+ ret = __bcm2835_gpio_irq_set_type_enabled(pc, gpio, type);
+ else
+ ret = __bcm2835_gpio_irq_set_type_disabled(pc, gpio, type);
+
+ if (type & IRQ_TYPE_EDGE_BOTH)
+ __irq_set_handler_locked(data->irq, handle_edge_irq);
+ else
+ __irq_set_handler_locked(data->irq, handle_level_irq);
+
+ spin_unlock_irqrestore(&pc->irq_lock[bank], flags);
+
+ return ret;
+}
+
+static void bcm2835_gpio_irq_ack(struct irq_data *data)
+{
+ struct bcm2835_pinctrl *pc = irq_data_get_irq_chip_data(data);
+ unsigned gpio = irqd_to_hwirq(data);
+
+ bcm2835_gpio_set_bit(pc, GPEDS0, gpio);
+}
+
+static struct irq_chip bcm2835_gpio_irq_chip = {
+ .name = MODULE_NAME,
+ .irq_enable = bcm2835_gpio_irq_enable,
+ .irq_disable = bcm2835_gpio_irq_disable,
+ .irq_set_type = bcm2835_gpio_irq_set_type,
+ .irq_ack = bcm2835_gpio_irq_ack,
+ .irq_mask = bcm2835_gpio_irq_disable,
+ .irq_unmask = bcm2835_gpio_irq_enable,
+};
+
+static int bcm2835_pctl_get_groups_count(struct pinctrl_dev *pctldev)
+{
+ return ARRAY_SIZE(bcm2835_gpio_groups);
+}
+
+static const char *bcm2835_pctl_get_group_name(struct pinctrl_dev *pctldev,
+ unsigned selector)
+{
+ return bcm2835_gpio_groups[selector];
+}
+
+static int bcm2835_pctl_get_group_pins(struct pinctrl_dev *pctldev,
+ unsigned selector,
+ const unsigned **pins,
+ unsigned *num_pins)
+{
+ *pins = &bcm2835_gpio_pins[selector].number;
+ *num_pins = 1;
+
+ return 0;
+}
+
+static void bcm2835_pctl_pin_dbg_show(struct pinctrl_dev *pctldev,
+ struct seq_file *s,
+ unsigned offset)
+{
+ struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
+ enum bcm2835_fsel fsel = bcm2835_pinctrl_fsel_get(pc, offset);
+ const char *fname = bcm2835_functions[fsel];
+ int value = bcm2835_gpio_get_bit(pc, GPLEV0, offset);
+ int irq = irq_find_mapping(pc->irq_domain, offset);
+
+ seq_printf(s, "function %s in %s; irq %d (%s)",
+ fname, value ? "hi" : "lo",
+ irq, irq_type_names[pc->irq_type[offset]]);
+}
+
+static void bcm2835_pctl_dt_free_map(struct pinctrl_dev *pctldev,
+ struct pinctrl_map *maps, unsigned num_maps)
+{
+ int i;
+
+ for (i = 0; i < num_maps; i++)
+ if (maps[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
+ kfree(maps[i].data.configs.configs);
+
+ kfree(maps);
+}
+
+static int bcm2835_pctl_dt_node_to_map_func(struct bcm2835_pinctrl *pc,
+ struct device_node *np, u32 pin, u32 fnum,
+ struct pinctrl_map **maps)
+{
+ struct pinctrl_map *map = *maps;
+
+ if (fnum >= ARRAY_SIZE(bcm2835_functions)) {
+ dev_err(pc->dev, "%s: invalid brcm,function %d\n",
+ of_node_full_name(np), fnum);
+ return -EINVAL;
+ }
+
+ map->type = PIN_MAP_TYPE_MUX_GROUP;
+ map->data.mux.group = bcm2835_gpio_groups[pin];
+ map->data.mux.function = bcm2835_functions[fnum];
+ (*maps)++;
+
+ return 0;
+}
+
+static int bcm2835_pctl_dt_node_to_map_pull(struct bcm2835_pinctrl *pc,
+ struct device_node *np, u32 pin, u32 pull,
+ struct pinctrl_map **maps)
+{
+ struct pinctrl_map *map = *maps;
+ unsigned long *configs;
+
+ if (pull > 2) {
+ dev_err(pc->dev, "%s: invalid brcm,pull %d\n",
+ of_node_full_name(np), pull);
+ return -EINVAL;
+ }
+
+ configs = kzalloc(sizeof(*configs), GFP_KERNEL);
+ if (!configs)
+ return -ENOMEM;
+ configs[0] = BCM2835_PINCONF_PACK(BCM2835_PINCONF_PARAM_PULL, pull);
+
+ map->type = PIN_MAP_TYPE_CONFIGS_PIN;
+ map->data.configs.group_or_pin = bcm2835_gpio_pins[pin].name;
+ map->data.configs.configs = configs;
+ map->data.configs.num_configs = 1;
+ (*maps)++;
+
+ return 0;
+}
+
+static int bcm2835_pctl_dt_node_to_map(struct pinctrl_dev *pctldev,
+ struct device_node *np,
+ struct pinctrl_map **map, unsigned *num_maps)
+{
+ struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
+ struct property *pins, *funcs, *pulls;
+ int num_pins, num_funcs, num_pulls, maps_per_pin;
+ struct pinctrl_map *maps, *cur_map;
+ int i, err;
+ u32 pin, func, pull;
+
+ pins = of_find_property(np, "brcm,pins", NULL);
+ if (!pins) {
+ dev_err(pc->dev, "%s: missing brcm,pins property\n",
+ of_node_full_name(np));
+ return -EINVAL;
+ }
+
+ funcs = of_find_property(np, "brcm,function", NULL);
+ pulls = of_find_property(np, "brcm,pull", NULL);
+
+ if (!funcs && !pulls) {
+ dev_err(pc->dev,
+ "%s: neither brcm,function nor brcm,pull specified\n",
+ of_node_full_name(np));
+ return -EINVAL;
+ }
+
+ num_pins = pins->length / 4;
+ num_funcs = funcs ? (funcs->length / 4) : 0;
+ num_pulls = pulls ? (pulls->length / 4) : 0;
+
+ if (num_funcs > 1 && num_funcs != num_pins) {
+ dev_err(pc->dev,
+ "%s: brcm,function must have 1 or %d entries\n",
+ of_node_full_name(np), num_pins);
+ return -EINVAL;
+ }
+
+ if (num_pulls > 1 && num_pulls != num_pins) {
+ dev_err(pc->dev,
+ "%s: brcm,pull must have 1 or %d entries\n",
+ of_node_full_name(np), num_pins);
+ return -EINVAL;
+ }
+
+ maps_per_pin = 0;
+ if (num_funcs)
+ maps_per_pin++;
+ if (num_pulls)
+ maps_per_pin++;
+ cur_map = maps = kzalloc(num_pins * maps_per_pin * sizeof(*maps),
+ GFP_KERNEL);
+ if (!maps)
+ return -ENOMEM;
+
+ for (i = 0; i < num_pins; i++) {
+ err = of_property_read_u32_index(np, "brcm,pins", i, &pin);
+ if (err)
+ goto out;
+ if (pin >= ARRAY_SIZE(bcm2835_gpio_pins)) {
+ dev_err(pc->dev, "%s: invalid brcm,pins value %d\n",
+ of_node_full_name(np), pin);
+ err = -EINVAL;
+ goto out;
+ }
+
+ if (num_funcs) {
+ err = of_property_read_u32_index(np, "brcm,function",
+ (num_funcs > 1) ? i : 0, &func);
+ if (err)
+ goto out;
+ err = bcm2835_pctl_dt_node_to_map_func(pc, np, pin,
+ func, &cur_map);
+ if (err)
+ goto out;
+ }
+ if (num_pulls) {
+ err = of_property_read_u32_index(np, "brcm,pull",
+ (num_funcs > 1) ? i : 0, &pull);
+ if (err)
+ goto out;
+ err = bcm2835_pctl_dt_node_to_map_pull(pc, np, pin,
+ pull, &cur_map);
+ if (err)
+ goto out;
+ }
+ }
+
+ *map = maps;
+ *num_maps = num_pins * maps_per_pin;
+
+ return 0;
+
+out:
+ kfree(maps);
+ return err;
+}
+
+static const struct pinctrl_ops bcm2835_pctl_ops = {
+ .get_groups_count = bcm2835_pctl_get_groups_count,
+ .get_group_name = bcm2835_pctl_get_group_name,
+ .get_group_pins = bcm2835_pctl_get_group_pins,
+ .pin_dbg_show = bcm2835_pctl_pin_dbg_show,
+ .dt_node_to_map = bcm2835_pctl_dt_node_to_map,
+ .dt_free_map = bcm2835_pctl_dt_free_map,
+};
+
+static int bcm2835_pmx_get_functions_count(struct pinctrl_dev *pctldev)
+{
+ return BCM2835_FSEL_COUNT;
+}
+
+static const char *bcm2835_pmx_get_function_name(struct pinctrl_dev *pctldev,
+ unsigned selector)
+{
+ return bcm2835_functions[selector];
+}
+
+static int bcm2835_pmx_get_function_groups(struct pinctrl_dev *pctldev,
+ unsigned selector,
+ const char * const **groups,
+ unsigned * const num_groups)
+{
+ /* every pin can do every function */
+ *groups = bcm2835_gpio_groups;
+ *num_groups = ARRAY_SIZE(bcm2835_gpio_groups);
+
+ return 0;
+}
+
+static int bcm2835_pmx_set(struct pinctrl_dev *pctldev,
+ unsigned func_selector,
+ unsigned group_selector)
+{
+ struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
+
+ bcm2835_pinctrl_fsel_set(pc, group_selector, func_selector);
+
+ return 0;
+}
+
+static void bcm2835_pmx_gpio_disable_free(struct pinctrl_dev *pctldev,
+ struct pinctrl_gpio_range *range,
+ unsigned offset)
+{
+ struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
+
+ /* disable by setting to GPIO_IN */
+ bcm2835_pinctrl_fsel_set(pc, offset, BCM2835_FSEL_GPIO_IN);
+}
+
+static int bcm2835_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
+ struct pinctrl_gpio_range *range,
+ unsigned offset,
+ bool input)
+{
+ struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
+ enum bcm2835_fsel fsel = input ?
+ BCM2835_FSEL_GPIO_IN : BCM2835_FSEL_GPIO_OUT;
+
+ bcm2835_pinctrl_fsel_set(pc, offset, fsel);
+
+ return 0;
+}
+
+static const struct pinmux_ops bcm2835_pmx_ops = {
+ .get_functions_count = bcm2835_pmx_get_functions_count,
+ .get_function_name = bcm2835_pmx_get_function_name,
+ .get_function_groups = bcm2835_pmx_get_function_groups,
+ .set_mux = bcm2835_pmx_set,
+ .gpio_disable_free = bcm2835_pmx_gpio_disable_free,
+ .gpio_set_direction = bcm2835_pmx_gpio_set_direction,
+};
+
+static int bcm2835_pinconf_get(struct pinctrl_dev *pctldev,
+ unsigned pin, unsigned long *config)
+{
+ /* No way to read back config in HW */
+ return -ENOTSUPP;
+}
+
+static int bcm2835_pinconf_set(struct pinctrl_dev *pctldev,
+ unsigned pin, unsigned long *configs,
+ unsigned num_configs)
+{
+ struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
+ enum bcm2835_pinconf_param param;
+ u16 arg;
+ u32 off, bit;
+ int i;
+
+ for (i = 0; i < num_configs; i++) {
+ param = BCM2835_PINCONF_UNPACK_PARAM(configs[i]);
+ arg = BCM2835_PINCONF_UNPACK_ARG(configs[i]);
+
+ if (param != BCM2835_PINCONF_PARAM_PULL)
+ return -EINVAL;
+
+ off = GPIO_REG_OFFSET(pin);
+ bit = GPIO_REG_SHIFT(pin);
+
+ bcm2835_gpio_wr(pc, GPPUD, arg & 3);
+ /*
+ * Docs say to wait 150 cycles, but not of what. We assume a
+ * 1 MHz clock here, which is pretty slow...
+ */
+ udelay(150);
+ bcm2835_gpio_wr(pc, GPPUDCLK0 + (off * 4), BIT(bit));
+ udelay(150);
+ bcm2835_gpio_wr(pc, GPPUDCLK0 + (off * 4), 0);
+ } /* for each config */
+
+ return 0;
+}
+
+static const struct pinconf_ops bcm2835_pinconf_ops = {
+ .pin_config_get = bcm2835_pinconf_get,
+ .pin_config_set = bcm2835_pinconf_set,
+};
+
+static struct pinctrl_desc bcm2835_pinctrl_desc = {
+ .name = MODULE_NAME,
+ .pins = bcm2835_gpio_pins,
+ .npins = ARRAY_SIZE(bcm2835_gpio_pins),
+ .pctlops = &bcm2835_pctl_ops,
+ .pmxops = &bcm2835_pmx_ops,
+ .confops = &bcm2835_pinconf_ops,
+ .owner = THIS_MODULE,
+};
+
+static struct pinctrl_gpio_range bcm2835_pinctrl_gpio_range = {
+ .name = MODULE_NAME,
+ .npins = BCM2835_NUM_GPIOS,
+};
+
+static int bcm2835_pinctrl_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ struct bcm2835_pinctrl *pc;
+ struct resource iomem;
+ int err, i;
+ BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_pins) != BCM2835_NUM_GPIOS);
+ BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_groups) != BCM2835_NUM_GPIOS);
+
+ pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
+ if (!pc)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, pc);
+ pc->dev = dev;
+
+ err = of_address_to_resource(np, 0, &iomem);
+ if (err) {
+ dev_err(dev, "could not get IO memory\n");
+ return err;
+ }
+
+ pc->base = devm_ioremap_resource(dev, &iomem);
+ if (IS_ERR(pc->base))
+ return PTR_ERR(pc->base);
+
+ pc->gpio_chip = bcm2835_gpio_chip;
+ pc->gpio_chip.dev = dev;
+ pc->gpio_chip.of_node = np;
+
+ pc->irq_domain = irq_domain_add_linear(np, BCM2835_NUM_GPIOS,
+ &irq_domain_simple_ops, NULL);
+ if (!pc->irq_domain) {
+ dev_err(dev, "could not create IRQ domain\n");
+ return -ENOMEM;
+ }
+
+ for (i = 0; i < BCM2835_NUM_GPIOS; i++) {
+ int irq = irq_create_mapping(pc->irq_domain, i);
+ irq_set_lockdep_class(irq, &gpio_lock_class);
+ irq_set_chip_and_handler(irq, &bcm2835_gpio_irq_chip,
+ handle_level_irq);
+ irq_set_chip_data(irq, pc);
+ set_irq_flags(irq, IRQF_VALID);
+ }
+
+ for (i = 0; i < BCM2835_NUM_BANKS; i++) {
+ unsigned long events;
+ unsigned offset;
+ int len;
+ char *name;
+
+ /* clear event detection flags */
+ bcm2835_gpio_wr(pc, GPREN0 + i * 4, 0);
+ bcm2835_gpio_wr(pc, GPFEN0 + i * 4, 0);
+ bcm2835_gpio_wr(pc, GPHEN0 + i * 4, 0);
+ bcm2835_gpio_wr(pc, GPLEN0 + i * 4, 0);
+ bcm2835_gpio_wr(pc, GPAREN0 + i * 4, 0);
+ bcm2835_gpio_wr(pc, GPAFEN0 + i * 4, 0);
+
+ /* clear all the events */
+ events = bcm2835_gpio_rd(pc, GPEDS0 + i * 4);
+ for_each_set_bit(offset, &events, 32)
+ bcm2835_gpio_wr(pc, GPEDS0 + i * 4, BIT(offset));
+
+ pc->irq[i] = irq_of_parse_and_map(np, i);
+ pc->irq_data[i].pc = pc;
+ pc->irq_data[i].bank = i;
+ spin_lock_init(&pc->irq_lock[i]);
+
+ len = strlen(dev_name(pc->dev)) + 16;
+ name = devm_kzalloc(pc->dev, len, GFP_KERNEL);
+ if (!name)
+ return -ENOMEM;
+ snprintf(name, len, "%s:bank%d", dev_name(pc->dev), i);
+
+ err = devm_request_irq(dev, pc->irq[i],
+ bcm2835_gpio_irq_handler, IRQF_SHARED,
+ name, &pc->irq_data[i]);
+ if (err) {
+ dev_err(dev, "unable to request IRQ %d\n", pc->irq[i]);
+ return err;
+ }
+ }
+
+ err = gpiochip_add(&pc->gpio_chip);
+ if (err) {
+ dev_err(dev, "could not add GPIO chip\n");
+ return err;
+ }
+
+ pc->pctl_dev = pinctrl_register(&bcm2835_pinctrl_desc, dev, pc);
+ if (!pc->pctl_dev) {
+ gpiochip_remove(&pc->gpio_chip);
+ return -EINVAL;
+ }
+
+ pc->gpio_range = bcm2835_pinctrl_gpio_range;
+ pc->gpio_range.base = pc->gpio_chip.base;
+ pc->gpio_range.gc = &pc->gpio_chip;
+ pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);
+
+ return 0;
+}
+
+static int bcm2835_pinctrl_remove(struct platform_device *pdev)
+{
+ struct bcm2835_pinctrl *pc = platform_get_drvdata(pdev);
+
+ pinctrl_unregister(pc->pctl_dev);
+ gpiochip_remove(&pc->gpio_chip);
+
+ return 0;
+}
+
+static const struct of_device_id bcm2835_pinctrl_match[] = {
+ { .compatible = "brcm,bcm2835-gpio" },
+ {}
+};
+MODULE_DEVICE_TABLE(of, bcm2835_pinctrl_match);
+
+static struct platform_driver bcm2835_pinctrl_driver = {
+ .probe = bcm2835_pinctrl_probe,
+ .remove = bcm2835_pinctrl_remove,
+ .driver = {
+ .name = MODULE_NAME,
+ .of_match_table = bcm2835_pinctrl_match,
+ },
+};
+module_platform_driver(bcm2835_pinctrl_driver);
+
+MODULE_AUTHOR("Chris Boot, Simon Arlott, Stephen Warren");
+MODULE_DESCRIPTION("BCM2835 Pin control driver");
+MODULE_LICENSE("GPL");
--- /dev/null
+/*
+ * Copyright (C) 2014-2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * This file contains the Broadcom Cygnus GPIO driver that supports 3
+ * GPIO controllers on Cygnus including the ASIU GPIO controller, the
+ * chipCommonG GPIO controller, and the always-on GPIO controller. Basic
+ * PINCONF such as bias pull up/down, and drive strength are also supported
+ * in this driver.
+ *
+ * Pins from the ASIU GPIO can be individually muxed to GPIO function,
+ * through the interaction with the Cygnus IOMUX controller
+ */
+
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/ioport.h>
+#include <linux/of_device.h>
+#include <linux/of_irq.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinconf-generic.h>
+
+#include "../pinctrl-utils.h"
+
+#define CYGNUS_GPIO_DATA_IN_OFFSET 0x00
+#define CYGNUS_GPIO_DATA_OUT_OFFSET 0x04
+#define CYGNUS_GPIO_OUT_EN_OFFSET 0x08
+#define CYGNUS_GPIO_IN_TYPE_OFFSET 0x0c
+#define CYGNUS_GPIO_INT_DE_OFFSET 0x10
+#define CYGNUS_GPIO_INT_EDGE_OFFSET 0x14
+#define CYGNUS_GPIO_INT_MSK_OFFSET 0x18
+#define CYGNUS_GPIO_INT_STAT_OFFSET 0x1c
+#define CYGNUS_GPIO_INT_MSTAT_OFFSET 0x20
+#define CYGNUS_GPIO_INT_CLR_OFFSET 0x24
+#define CYGNUS_GPIO_PAD_RES_OFFSET 0x34
+#define CYGNUS_GPIO_RES_EN_OFFSET 0x38
+
+/* drive strength control for ASIU GPIO */
+#define CYGNUS_GPIO_ASIU_DRV0_CTRL_OFFSET 0x58
+
+/* drive strength control for CCM/CRMU (AON) GPIO */
+#define CYGNUS_GPIO_DRV0_CTRL_OFFSET 0x00
+
+#define GPIO_BANK_SIZE 0x200
+#define NGPIOS_PER_BANK 32
+#define GPIO_BANK(pin) ((pin) / NGPIOS_PER_BANK)
+
+#define CYGNUS_GPIO_REG(pin, reg) (GPIO_BANK(pin) * GPIO_BANK_SIZE + (reg))
+#define CYGNUS_GPIO_SHIFT(pin) ((pin) % NGPIOS_PER_BANK)
+
+#define GPIO_DRV_STRENGTH_BIT_SHIFT 20
+#define GPIO_DRV_STRENGTH_BITS 3
+#define GPIO_DRV_STRENGTH_BIT_MASK ((1 << GPIO_DRV_STRENGTH_BITS) - 1)
+
+/*
+ * Cygnus GPIO core
+ *
+ * @dev: pointer to device
+ * @base: I/O register base for Cygnus GPIO controller
+ * @io_ctrl: I/O register base for certain type of Cygnus GPIO controller that
+ * has the PINCONF support implemented outside of the GPIO block
+ * @lock: lock to protect access to I/O registers
+ * @gc: GPIO chip
+ * @num_banks: number of GPIO banks, each bank supports up to 32 GPIOs
+ * @pinmux_is_supported: flag to indicate this GPIO controller contains pins
+ * that can be individually muxed to GPIO
+ * @pctl: pointer to pinctrl_dev
+ * @pctldesc: pinctrl descriptor
+ */
+struct cygnus_gpio {
+ struct device *dev;
+
+ void __iomem *base;
+ void __iomem *io_ctrl;
+
+ spinlock_t lock;
+
+ struct gpio_chip gc;
+ unsigned num_banks;
+
+ bool pinmux_is_supported;
+
+ struct pinctrl_dev *pctl;
+ struct pinctrl_desc pctldesc;
+};
+
+static inline struct cygnus_gpio *to_cygnus_gpio(struct gpio_chip *gc)
+{
+ return container_of(gc, struct cygnus_gpio, gc);
+}
+
+/*
+ * Mapping from PINCONF pins to GPIO pins is 1-to-1
+ */
+static inline unsigned cygnus_pin_to_gpio(unsigned pin)
+{
+ return pin;
+}
+
+/**
+ * cygnus_set_bit - set or clear one bit (corresponding to the GPIO pin) in a
+ * Cygnus GPIO register
+ *
+ * @cygnus_gpio: Cygnus GPIO device
+ * @reg: register offset
+ * @gpio: GPIO pin
+ * @set: set or clear
+ */
+static inline void cygnus_set_bit(struct cygnus_gpio *chip, unsigned int reg,
+ unsigned gpio, bool set)
+{
+ unsigned int offset = CYGNUS_GPIO_REG(gpio, reg);
+ unsigned int shift = CYGNUS_GPIO_SHIFT(gpio);
+ u32 val;
+
+ val = readl(chip->base + offset);
+ if (set)
+ val |= BIT(shift);
+ else
+ val &= ~BIT(shift);
+ writel(val, chip->base + offset);
+}
+
+static inline bool cygnus_get_bit(struct cygnus_gpio *chip, unsigned int reg,
+ unsigned gpio)
+{
+ unsigned int offset = CYGNUS_GPIO_REG(gpio, reg);
+ unsigned int shift = CYGNUS_GPIO_SHIFT(gpio);
+
+ return !!(readl(chip->base + offset) & BIT(shift));
+}
+
+static void cygnus_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
+{
+ struct gpio_chip *gc = irq_desc_get_handler_data(desc);
+ struct cygnus_gpio *chip = to_cygnus_gpio(gc);
+ struct irq_chip *irq_chip = irq_desc_get_chip(desc);
+ int i, bit;
+
+ chained_irq_enter(irq_chip, desc);
+
+ /* go through the entire GPIO banks and handle all interrupts */
+ for (i = 0; i < chip->num_banks; i++) {
+ unsigned long val = readl(chip->base + (i * GPIO_BANK_SIZE) +
+ CYGNUS_GPIO_INT_MSTAT_OFFSET);
+
+ for_each_set_bit(bit, &val, NGPIOS_PER_BANK) {
+ unsigned pin = NGPIOS_PER_BANK * i + bit;
+ int child_irq = irq_find_mapping(gc->irqdomain, pin);
+
+ /*
+ * Clear the interrupt before invoking the
+ * handler, so we do not leave any window
+ */
+ writel(BIT(bit), chip->base + (i * GPIO_BANK_SIZE) +
+ CYGNUS_GPIO_INT_CLR_OFFSET);
+
+ generic_handle_irq(child_irq);
+ }
+ }
+
+ chained_irq_exit(irq_chip, desc);
+}
+
+
+static void cygnus_gpio_irq_ack(struct irq_data *d)
+{
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct cygnus_gpio *chip = to_cygnus_gpio(gc);
+ unsigned gpio = d->hwirq;
+ unsigned int offset = CYGNUS_GPIO_REG(gpio,
+ CYGNUS_GPIO_INT_CLR_OFFSET);
+ unsigned int shift = CYGNUS_GPIO_SHIFT(gpio);
+ u32 val = BIT(shift);
+
+ writel(val, chip->base + offset);
+}
+
+/**
+ * cygnus_gpio_irq_set_mask - mask/unmask a GPIO interrupt
+ *
+ * @d: IRQ chip data
+ * @unmask: mask/unmask GPIO interrupt
+ */
+static void cygnus_gpio_irq_set_mask(struct irq_data *d, bool unmask)
+{
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct cygnus_gpio *chip = to_cygnus_gpio(gc);
+ unsigned gpio = d->hwirq;
+
+ cygnus_set_bit(chip, CYGNUS_GPIO_INT_MSK_OFFSET, gpio, unmask);
+}
+
+static void cygnus_gpio_irq_mask(struct irq_data *d)
+{
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct cygnus_gpio *chip = to_cygnus_gpio(gc);
+ unsigned long flags;
+
+ spin_lock_irqsave(&chip->lock, flags);
+ cygnus_gpio_irq_set_mask(d, false);
+ spin_unlock_irqrestore(&chip->lock, flags);
+}
+
+static void cygnus_gpio_irq_unmask(struct irq_data *d)
+{
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct cygnus_gpio *chip = to_cygnus_gpio(gc);
+ unsigned long flags;
+
+ spin_lock_irqsave(&chip->lock, flags);
+ cygnus_gpio_irq_set_mask(d, true);
+ spin_unlock_irqrestore(&chip->lock, flags);
+}
+
+static int cygnus_gpio_irq_set_type(struct irq_data *d, unsigned int type)
+{
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct cygnus_gpio *chip = to_cygnus_gpio(gc);
+ unsigned gpio = d->hwirq;
+ bool level_triggered = false;
+ bool dual_edge = false;
+ bool rising_or_high = false;
+ unsigned long flags;
+
+ switch (type & IRQ_TYPE_SENSE_MASK) {
+ case IRQ_TYPE_EDGE_RISING:
+ rising_or_high = true;
+ break;
+
+ case IRQ_TYPE_EDGE_FALLING:
+ break;
+
+ case IRQ_TYPE_EDGE_BOTH:
+ dual_edge = true;
+ break;
+
+ case IRQ_TYPE_LEVEL_HIGH:
+ level_triggered = true;
+ rising_or_high = true;
+ break;
+
+ case IRQ_TYPE_LEVEL_LOW:
+ level_triggered = true;
+ break;
+
+ default:
+ dev_err(chip->dev, "invalid GPIO IRQ type 0x%x\n",
+ type);
+ return -EINVAL;
+ }
+
+ spin_lock_irqsave(&chip->lock, flags);
+ cygnus_set_bit(chip, CYGNUS_GPIO_IN_TYPE_OFFSET, gpio,
+ level_triggered);
+ cygnus_set_bit(chip, CYGNUS_GPIO_INT_DE_OFFSET, gpio, dual_edge);
+ cygnus_set_bit(chip, CYGNUS_GPIO_INT_EDGE_OFFSET, gpio,
+ rising_or_high);
+ spin_unlock_irqrestore(&chip->lock, flags);
+
+ dev_dbg(chip->dev,
+ "gpio:%u level_triggered:%d dual_edge:%d rising_or_high:%d\n",
+ gpio, level_triggered, dual_edge, rising_or_high);
+
+ return 0;
+}
+
+static struct irq_chip cygnus_gpio_irq_chip = {
+ .name = "bcm-cygnus-gpio",
+ .irq_ack = cygnus_gpio_irq_ack,
+ .irq_mask = cygnus_gpio_irq_mask,
+ .irq_unmask = cygnus_gpio_irq_unmask,
+ .irq_set_type = cygnus_gpio_irq_set_type,
+};
+
+/*
+ * Request the Cygnus IOMUX pinmux controller to mux individual pins to GPIO
+ */
+static int cygnus_gpio_request(struct gpio_chip *gc, unsigned offset)
+{
+ struct cygnus_gpio *chip = to_cygnus_gpio(gc);
+ unsigned gpio = gc->base + offset;
+
+ /* not all Cygnus GPIO pins can be muxed individually */
+ if (!chip->pinmux_is_supported)
+ return 0;
+
+ return pinctrl_request_gpio(gpio);
+}
+
+static void cygnus_gpio_free(struct gpio_chip *gc, unsigned offset)
+{
+ struct cygnus_gpio *chip = to_cygnus_gpio(gc);
+ unsigned gpio = gc->base + offset;
+
+ if (!chip->pinmux_is_supported)
+ return;
+
+ pinctrl_free_gpio(gpio);
+}
+
+static int cygnus_gpio_direction_input(struct gpio_chip *gc, unsigned gpio)
+{
+ struct cygnus_gpio *chip = to_cygnus_gpio(gc);
+ unsigned long flags;
+
+ spin_lock_irqsave(&chip->lock, flags);
+ cygnus_set_bit(chip, CYGNUS_GPIO_OUT_EN_OFFSET, gpio, false);
+ spin_unlock_irqrestore(&chip->lock, flags);
+
+ dev_dbg(chip->dev, "gpio:%u set input\n", gpio);
+
+ return 0;
+}
+
+static int cygnus_gpio_direction_output(struct gpio_chip *gc, unsigned gpio,
+ int val)
+{
+ struct cygnus_gpio *chip = to_cygnus_gpio(gc);
+ unsigned long flags;
+
+ spin_lock_irqsave(&chip->lock, flags);
+ cygnus_set_bit(chip, CYGNUS_GPIO_OUT_EN_OFFSET, gpio, true);
+ cygnus_set_bit(chip, CYGNUS_GPIO_DATA_OUT_OFFSET, gpio, !!(val));
+ spin_unlock_irqrestore(&chip->lock, flags);
+
+ dev_dbg(chip->dev, "gpio:%u set output, value:%d\n", gpio, val);
+
+ return 0;
+}
+
+static void cygnus_gpio_set(struct gpio_chip *gc, unsigned gpio, int val)
+{
+ struct cygnus_gpio *chip = to_cygnus_gpio(gc);
+ unsigned long flags;
+
+ spin_lock_irqsave(&chip->lock, flags);
+ cygnus_set_bit(chip, CYGNUS_GPIO_DATA_OUT_OFFSET, gpio, !!(val));
+ spin_unlock_irqrestore(&chip->lock, flags);
+
+ dev_dbg(chip->dev, "gpio:%u set, value:%d\n", gpio, val);
+}
+
+static int cygnus_gpio_get(struct gpio_chip *gc, unsigned gpio)
+{
+ struct cygnus_gpio *chip = to_cygnus_gpio(gc);
+ unsigned int offset = CYGNUS_GPIO_REG(gpio,
+ CYGNUS_GPIO_DATA_IN_OFFSET);
+ unsigned int shift = CYGNUS_GPIO_SHIFT(gpio);
+
+ return !!(readl(chip->base + offset) & BIT(shift));
+}
+
+static int cygnus_get_groups_count(struct pinctrl_dev *pctldev)
+{
+ return 1;
+}
+
+/*
+ * Only one group: "gpio_grp", since this local pinctrl device only performs
+ * GPIO specific PINCONF configurations
+ */
+static const char *cygnus_get_group_name(struct pinctrl_dev *pctldev,
+ unsigned selector)
+{
+ return "gpio_grp";
+}
+
+static const struct pinctrl_ops cygnus_pctrl_ops = {
+ .get_groups_count = cygnus_get_groups_count,
+ .get_group_name = cygnus_get_group_name,
+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
+ .dt_free_map = pinctrl_utils_dt_free_map,
+};
+
+static int cygnus_gpio_set_pull(struct cygnus_gpio *chip, unsigned gpio,
+ bool disable, bool pull_up)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&chip->lock, flags);
+
+ if (disable) {
+ cygnus_set_bit(chip, CYGNUS_GPIO_RES_EN_OFFSET, gpio, false);
+ } else {
+ cygnus_set_bit(chip, CYGNUS_GPIO_PAD_RES_OFFSET, gpio,
+ pull_up);
+ cygnus_set_bit(chip, CYGNUS_GPIO_RES_EN_OFFSET, gpio, true);
+ }
+
+ spin_unlock_irqrestore(&chip->lock, flags);
+
+ dev_dbg(chip->dev, "gpio:%u set pullup:%d\n", gpio, pull_up);
+
+ return 0;
+}
+
+static void cygnus_gpio_get_pull(struct cygnus_gpio *chip, unsigned gpio,
+ bool *disable, bool *pull_up)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&chip->lock, flags);
+ *disable = !cygnus_get_bit(chip, CYGNUS_GPIO_RES_EN_OFFSET, gpio);
+ *pull_up = cygnus_get_bit(chip, CYGNUS_GPIO_PAD_RES_OFFSET, gpio);
+ spin_unlock_irqrestore(&chip->lock, flags);
+}
+
+static int cygnus_gpio_set_strength(struct cygnus_gpio *chip, unsigned gpio,
+ unsigned strength)
+{
+ void __iomem *base;
+ unsigned int i, offset, shift;
+ u32 val;
+ unsigned long flags;
+
+ /* make sure drive strength is supported */
+ if (strength < 2 || strength > 16 || (strength % 2))
+ return -ENOTSUPP;
+
+ if (chip->io_ctrl) {
+ base = chip->io_ctrl;
+ offset = CYGNUS_GPIO_DRV0_CTRL_OFFSET;
+ } else {
+ base = chip->base;
+ offset = CYGNUS_GPIO_REG(gpio,
+ CYGNUS_GPIO_ASIU_DRV0_CTRL_OFFSET);
+ }
+
+ shift = CYGNUS_GPIO_SHIFT(gpio);
+
+ dev_dbg(chip->dev, "gpio:%u set drive strength:%d mA\n", gpio,
+ strength);
+
+ spin_lock_irqsave(&chip->lock, flags);
+ strength = (strength / 2) - 1;
+ for (i = 0; i < GPIO_DRV_STRENGTH_BITS; i++) {
+ val = readl(base + offset);
+ val &= ~BIT(shift);
+ val |= ((strength >> i) & 0x1) << shift;
+ writel(val, base + offset);
+ offset += 4;
+ }
+ spin_unlock_irqrestore(&chip->lock, flags);
+
+ return 0;
+}
+
+static int cygnus_gpio_get_strength(struct cygnus_gpio *chip, unsigned gpio,
+ u16 *strength)
+{
+ void __iomem *base;
+ unsigned int i, offset, shift;
+ u32 val;
+ unsigned long flags;
+
+ if (chip->io_ctrl) {
+ base = chip->io_ctrl;
+ offset = CYGNUS_GPIO_DRV0_CTRL_OFFSET;
+ } else {
+ base = chip->base;
+ offset = CYGNUS_GPIO_REG(gpio,
+ CYGNUS_GPIO_ASIU_DRV0_CTRL_OFFSET);
+ }
+
+ shift = CYGNUS_GPIO_SHIFT(gpio);
+
+ spin_lock_irqsave(&chip->lock, flags);
+ *strength = 0;
+ for (i = 0; i < GPIO_DRV_STRENGTH_BITS; i++) {
+ val = readl(base + offset) & BIT(shift);
+ val >>= shift;
+ *strength += (val << i);
+ offset += 4;
+ }
+
+ /* convert to mA */
+ *strength = (*strength + 1) * 2;
+ spin_unlock_irqrestore(&chip->lock, flags);
+
+ return 0;
+}
+
+static int cygnus_pin_config_get(struct pinctrl_dev *pctldev, unsigned pin,
+ unsigned long *config)
+{
+ struct cygnus_gpio *chip = pinctrl_dev_get_drvdata(pctldev);
+ enum pin_config_param param = pinconf_to_config_param(*config);
+ unsigned gpio = cygnus_pin_to_gpio(pin);
+ u16 arg;
+ bool disable, pull_up;
+ int ret;
+
+ switch (param) {
+ case PIN_CONFIG_BIAS_DISABLE:
+ cygnus_gpio_get_pull(chip, gpio, &disable, &pull_up);
+ if (disable)
+ return 0;
+ else
+ return -EINVAL;
+
+ case PIN_CONFIG_BIAS_PULL_UP:
+ cygnus_gpio_get_pull(chip, gpio, &disable, &pull_up);
+ if (!disable && pull_up)
+ return 0;
+ else
+ return -EINVAL;
+
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ cygnus_gpio_get_pull(chip, gpio, &disable, &pull_up);
+ if (!disable && !pull_up)
+ return 0;
+ else
+ return -EINVAL;
+
+ case PIN_CONFIG_DRIVE_STRENGTH:
+ ret = cygnus_gpio_get_strength(chip, gpio, &arg);
+ if (ret)
+ return ret;
+ else
+ *config = pinconf_to_config_packed(param, arg);
+
+ return 0;
+
+ default:
+ return -ENOTSUPP;
+ }
+
+ return -ENOTSUPP;
+}
+
+static int cygnus_pin_config_set(struct pinctrl_dev *pctldev, unsigned pin,
+ unsigned long *configs, unsigned num_configs)
+{
+ struct cygnus_gpio *chip = pinctrl_dev_get_drvdata(pctldev);
+ enum pin_config_param param;
+ u16 arg;
+ unsigned i, gpio = cygnus_pin_to_gpio(pin);
+ int ret = -ENOTSUPP;
+
+ for (i = 0; i < num_configs; i++) {
+ param = pinconf_to_config_param(configs[i]);
+ arg = pinconf_to_config_argument(configs[i]);
+
+ switch (param) {
+ case PIN_CONFIG_BIAS_DISABLE:
+ ret = cygnus_gpio_set_pull(chip, gpio, true, false);
+ if (ret < 0)
+ goto out;
+ break;
+
+ case PIN_CONFIG_BIAS_PULL_UP:
+ ret = cygnus_gpio_set_pull(chip, gpio, false, true);
+ if (ret < 0)
+ goto out;
+ break;
+
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ ret = cygnus_gpio_set_pull(chip, gpio, false, false);
+ if (ret < 0)
+ goto out;
+ break;
+
+ case PIN_CONFIG_DRIVE_STRENGTH:
+ ret = cygnus_gpio_set_strength(chip, gpio, arg);
+ if (ret < 0)
+ goto out;
+ break;
+
+ default:
+ dev_err(chip->dev, "invalid configuration\n");
+ return -ENOTSUPP;
+ }
+ } /* for each config */
+
+out:
+ return ret;
+}
+
+static const struct pinconf_ops cygnus_pconf_ops = {
+ .is_generic = true,
+ .pin_config_get = cygnus_pin_config_get,
+ .pin_config_set = cygnus_pin_config_set,
+};
+
+/*
+ * Map a GPIO in the local gpio_chip pin space to a pin in the Cygnus IOMUX
+ * pinctrl pin space
+ */
+struct cygnus_gpio_pin_range {
+ unsigned offset;
+ unsigned pin_base;
+ unsigned num_pins;
+};
+
+#define CYGNUS_PINRANGE(o, p, n) { .offset = o, .pin_base = p, .num_pins = n }
+
+/*
+ * Pin mapping table for mapping local GPIO pins to Cygnus IOMUX pinctrl pins
+ */
+static const struct cygnus_gpio_pin_range cygnus_gpio_pintable[] = {
+ CYGNUS_PINRANGE(0, 42, 1),
+ CYGNUS_PINRANGE(1, 44, 3),
+ CYGNUS_PINRANGE(4, 48, 1),
+ CYGNUS_PINRANGE(5, 50, 3),
+ CYGNUS_PINRANGE(8, 126, 1),
+ CYGNUS_PINRANGE(9, 155, 1),
+ CYGNUS_PINRANGE(10, 152, 1),
+ CYGNUS_PINRANGE(11, 154, 1),
+ CYGNUS_PINRANGE(12, 153, 1),
+ CYGNUS_PINRANGE(13, 127, 3),
+ CYGNUS_PINRANGE(16, 140, 1),
+ CYGNUS_PINRANGE(17, 145, 7),
+ CYGNUS_PINRANGE(24, 130, 10),
+ CYGNUS_PINRANGE(34, 141, 4),
+ CYGNUS_PINRANGE(38, 54, 1),
+ CYGNUS_PINRANGE(39, 56, 3),
+ CYGNUS_PINRANGE(42, 60, 3),
+ CYGNUS_PINRANGE(45, 64, 3),
+ CYGNUS_PINRANGE(48, 68, 2),
+ CYGNUS_PINRANGE(50, 84, 6),
+ CYGNUS_PINRANGE(56, 94, 6),
+ CYGNUS_PINRANGE(62, 72, 1),
+ CYGNUS_PINRANGE(63, 70, 1),
+ CYGNUS_PINRANGE(64, 80, 1),
+ CYGNUS_PINRANGE(65, 74, 3),
+ CYGNUS_PINRANGE(68, 78, 1),
+ CYGNUS_PINRANGE(69, 82, 1),
+ CYGNUS_PINRANGE(70, 156, 17),
+ CYGNUS_PINRANGE(87, 104, 12),
+ CYGNUS_PINRANGE(99, 102, 2),
+ CYGNUS_PINRANGE(101, 90, 4),
+ CYGNUS_PINRANGE(105, 116, 10),
+ CYGNUS_PINRANGE(123, 11, 1),
+ CYGNUS_PINRANGE(124, 38, 4),
+ CYGNUS_PINRANGE(128, 43, 1),
+ CYGNUS_PINRANGE(129, 47, 1),
+ CYGNUS_PINRANGE(130, 49, 1),
+ CYGNUS_PINRANGE(131, 53, 1),
+ CYGNUS_PINRANGE(132, 55, 1),
+ CYGNUS_PINRANGE(133, 59, 1),
+ CYGNUS_PINRANGE(134, 63, 1),
+ CYGNUS_PINRANGE(135, 67, 1),
+ CYGNUS_PINRANGE(136, 71, 1),
+ CYGNUS_PINRANGE(137, 73, 1),
+ CYGNUS_PINRANGE(138, 77, 1),
+ CYGNUS_PINRANGE(139, 79, 1),
+ CYGNUS_PINRANGE(140, 81, 1),
+ CYGNUS_PINRANGE(141, 83, 1),
+ CYGNUS_PINRANGE(142, 10, 1)
+};
+
+/*
+ * The Cygnus IOMUX controller mainly supports group based mux configuration,
+ * but certain pins can be muxed to GPIO individually. Only the ASIU GPIO
+ * controller can support this, so it's an optional configuration
+ *
+ * Return -ENODEV means no support and that's fine
+ */
+static int cygnus_gpio_pinmux_add_range(struct cygnus_gpio *chip)
+{
+ struct device_node *node = chip->dev->of_node;
+ struct device_node *pinmux_node;
+ struct platform_device *pinmux_pdev;
+ struct gpio_chip *gc = &chip->gc;
+ int i, ret = 0;
+
+ /* parse DT to find the phandle to the pinmux controller */
+ pinmux_node = of_parse_phandle(node, "pinmux", 0);
+ if (!pinmux_node)
+ return -ENODEV;
+
+ pinmux_pdev = of_find_device_by_node(pinmux_node);
+ /* no longer need the pinmux node */
+ of_node_put(pinmux_node);
+ if (!pinmux_pdev) {
+ dev_err(chip->dev, "failed to get pinmux device\n");
+ return -EINVAL;
+ }
+
+ /* now need to create the mapping between local GPIO and PINMUX pins */
+ for (i = 0; i < ARRAY_SIZE(cygnus_gpio_pintable); i++) {
+ ret = gpiochip_add_pin_range(gc, dev_name(&pinmux_pdev->dev),
+ cygnus_gpio_pintable[i].offset,
+ cygnus_gpio_pintable[i].pin_base,
+ cygnus_gpio_pintable[i].num_pins);
+ if (ret) {
+ dev_err(chip->dev, "unable to add GPIO pin range\n");
+ goto err_put_device;
+ }
+ }
+
+ chip->pinmux_is_supported = true;
+
+ /* no need for pinmux_pdev device reference anymore */
+ put_device(&pinmux_pdev->dev);
+ return 0;
+
+err_put_device:
+ put_device(&pinmux_pdev->dev);
+ gpiochip_remove_pin_ranges(gc);
+ return ret;
+}
+
+/*
+ * Cygnus GPIO controller supports some PINCONF related configurations such as
+ * pull up, pull down, and drive strength, when the pin is configured to GPIO
+ *
+ * Here a local pinctrl device is created with simple 1-to-1 pin mapping to the
+ * local GPIO pins
+ */
+static int cygnus_gpio_register_pinconf(struct cygnus_gpio *chip)
+{
+ struct pinctrl_desc *pctldesc = &chip->pctldesc;
+ struct pinctrl_pin_desc *pins;
+ struct gpio_chip *gc = &chip->gc;
+ int i;
+
+ pins = devm_kcalloc(chip->dev, gc->ngpio, sizeof(*pins), GFP_KERNEL);
+ if (!pins)
+ return -ENOMEM;
+
+ for (i = 0; i < gc->ngpio; i++) {
+ pins[i].number = i;
+ pins[i].name = devm_kasprintf(chip->dev, GFP_KERNEL,
+ "gpio-%d", i);
+ if (!pins[i].name)
+ return -ENOMEM;
+ }
+
+ pctldesc->name = dev_name(chip->dev);
+ pctldesc->pctlops = &cygnus_pctrl_ops;
+ pctldesc->pins = pins;
+ pctldesc->npins = gc->ngpio;
+ pctldesc->confops = &cygnus_pconf_ops;
+
+ chip->pctl = pinctrl_register(pctldesc, chip->dev, chip);
+ if (!chip->pctl) {
+ dev_err(chip->dev, "unable to register pinctrl device\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static void cygnus_gpio_unregister_pinconf(struct cygnus_gpio *chip)
+{
+ if (chip->pctl)
+ pinctrl_unregister(chip->pctl);
+}
+
+struct cygnus_gpio_data {
+ unsigned num_gpios;
+};
+
+static const struct cygnus_gpio_data cygnus_cmm_gpio_data = {
+ .num_gpios = 24,
+};
+
+static const struct cygnus_gpio_data cygnus_asiu_gpio_data = {
+ .num_gpios = 146,
+};
+
+static const struct cygnus_gpio_data cygnus_crmu_gpio_data = {
+ .num_gpios = 6,
+};
+
+static const struct of_device_id cygnus_gpio_of_match[] = {
+ {
+ .compatible = "brcm,cygnus-ccm-gpio",
+ .data = &cygnus_cmm_gpio_data,
+ },
+ {
+ .compatible = "brcm,cygnus-asiu-gpio",
+ .data = &cygnus_asiu_gpio_data,
+ },
+ {
+ .compatible = "brcm,cygnus-crmu-gpio",
+ .data = &cygnus_crmu_gpio_data,
+ }
+};
+
+static int cygnus_gpio_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct resource *res;
+ struct cygnus_gpio *chip;
+ struct gpio_chip *gc;
+ u32 ngpios;
+ int irq, ret;
+ const struct of_device_id *match;
+ const struct cygnus_gpio_data *gpio_data;
+
+ match = of_match_device(cygnus_gpio_of_match, dev);
+ if (!match)
+ return -ENODEV;
+ gpio_data = match->data;
+ ngpios = gpio_data->num_gpios;
+
+ chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
+ if (!chip)
+ return -ENOMEM;
+
+ chip->dev = dev;
+ platform_set_drvdata(pdev, chip);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ chip->base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(chip->base)) {
+ dev_err(dev, "unable to map I/O memory\n");
+ return PTR_ERR(chip->base);
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ if (res) {
+ chip->io_ctrl = devm_ioremap_resource(dev, res);
+ if (IS_ERR(chip->io_ctrl)) {
+ dev_err(dev, "unable to map I/O memory\n");
+ return PTR_ERR(chip->io_ctrl);
+ }
+ }
+
+ spin_lock_init(&chip->lock);
+
+ gc = &chip->gc;
+ gc->base = -1;
+ gc->ngpio = ngpios;
+ chip->num_banks = (ngpios + NGPIOS_PER_BANK - 1) / NGPIOS_PER_BANK;
+ gc->label = dev_name(dev);
+ gc->dev = dev;
+ gc->of_node = dev->of_node;
+ gc->request = cygnus_gpio_request;
+ gc->free = cygnus_gpio_free;
+ gc->direction_input = cygnus_gpio_direction_input;
+ gc->direction_output = cygnus_gpio_direction_output;
+ gc->set = cygnus_gpio_set;
+ gc->get = cygnus_gpio_get;
+
+ ret = gpiochip_add(gc);
+ if (ret < 0) {
+ dev_err(dev, "unable to add GPIO chip\n");
+ return ret;
+ }
+
+ ret = cygnus_gpio_pinmux_add_range(chip);
+ if (ret && ret != -ENODEV) {
+ dev_err(dev, "unable to add GPIO pin range\n");
+ goto err_rm_gpiochip;
+ }
+
+ ret = cygnus_gpio_register_pinconf(chip);
+ if (ret) {
+ dev_err(dev, "unable to register pinconf\n");
+ goto err_rm_gpiochip;
+ }
+
+ /* optional GPIO interrupt support */
+ irq = platform_get_irq(pdev, 0);
+ if (irq) {
+ ret = gpiochip_irqchip_add(gc, &cygnus_gpio_irq_chip, 0,
+ handle_simple_irq, IRQ_TYPE_NONE);
+ if (ret) {
+ dev_err(dev, "no GPIO irqchip\n");
+ goto err_unregister_pinconf;
+ }
+
+ gpiochip_set_chained_irqchip(gc, &cygnus_gpio_irq_chip, irq,
+ cygnus_gpio_irq_handler);
+ }
+
+ return 0;
+
+err_unregister_pinconf:
+ cygnus_gpio_unregister_pinconf(chip);
+
+err_rm_gpiochip:
+ gpiochip_remove(gc);
+
+ return ret;
+}
+
+static struct platform_driver cygnus_gpio_driver = {
+ .driver = {
+ .name = "cygnus-gpio",
+ .of_match_table = cygnus_gpio_of_match,
+ },
+ .probe = cygnus_gpio_probe,
+};
+
+static int __init cygnus_gpio_init(void)
+{
+ return platform_driver_probe(&cygnus_gpio_driver, cygnus_gpio_probe);
+}
+arch_initcall_sync(cygnus_gpio_init);
--- /dev/null
+/* Copyright (C) 2014-2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * This file contains the Cygnus IOMUX driver that supports group based PINMUX
+ * configuration. Although PINMUX configuration is mainly group based, the
+ * Cygnus IOMUX controller allows certain pins to be individually muxed to GPIO
+ * function, and therefore be controlled by the Cygnus ASIU GPIO controller
+ */
+
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/slab.h>
+#include <linux/platform_device.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinconf-generic.h>
+#include "../core.h"
+#include "../pinctrl-utils.h"
+
+#define CYGNUS_NUM_IOMUX_REGS 8
+#define CYGNUS_NUM_MUX_PER_REG 8
+#define CYGNUS_NUM_IOMUX (CYGNUS_NUM_IOMUX_REGS * \
+ CYGNUS_NUM_MUX_PER_REG)
+
+/*
+ * Cygnus IOMUX register description
+ *
+ * @offset: register offset for mux configuration of a group
+ * @shift: bit shift for mux configuration of a group
+ * @alt: alternate function to set to
+ */
+struct cygnus_mux {
+ unsigned int offset;
+ unsigned int shift;
+ unsigned int alt;
+};
+
+/*
+ * Keep track of Cygnus IOMUX configuration and prevent double configuration
+ *
+ * @cygnus_mux: Cygnus IOMUX register description
+ * @is_configured: flag to indicate whether a mux setting has already been
+ * configured
+ */
+struct cygnus_mux_log {
+ struct cygnus_mux mux;
+ bool is_configured;
+};
+
+/*
+ * Group based IOMUX configuration
+ *
+ * @name: name of the group
+ * @pins: array of pins used by this group
+ * @num_pins: total number of pins used by this group
+ * @mux: Cygnus group based IOMUX configuration
+ */
+struct cygnus_pin_group {
+ const char *name;
+ const unsigned *pins;
+ unsigned num_pins;
+ struct cygnus_mux mux;
+};
+
+/*
+ * Cygnus mux function and supported pin groups
+ *
+ * @name: name of the function
+ * @groups: array of groups that can be supported by this function
+ * @num_groups: total number of groups that can be supported by this function
+ */
+struct cygnus_pin_function {
+ const char *name;
+ const char * const *groups;
+ unsigned num_groups;
+};
+
+/*
+ * Cygnus IOMUX pinctrl core
+ *
+ * @pctl: pointer to pinctrl_dev
+ * @dev: pointer to device
+ * @base0: first I/O register base of the Cygnus IOMUX controller
+ * @base1: second I/O register base
+ * @groups: pointer to array of groups
+ * @num_groups: total number of groups
+ * @functions: pointer to array of functions
+ * @num_functions: total number of functions
+ * @mux_log: pointer to the array of mux logs
+ * @lock: lock to protect register access
+ */
+struct cygnus_pinctrl {
+ struct pinctrl_dev *pctl;
+ struct device *dev;
+ void __iomem *base0;
+ void __iomem *base1;
+
+ const struct cygnus_pin_group *groups;
+ unsigned num_groups;
+
+ const struct cygnus_pin_function *functions;
+ unsigned num_functions;
+
+ struct cygnus_mux_log *mux_log;
+
+ spinlock_t lock;
+};
+
+/*
+ * Certain pins can be individually muxed to GPIO function
+ *
+ * @is_supported: flag to indicate GPIO mux is supported for this pin
+ * @offset: register offset for GPIO mux override of a pin
+ * @shift: bit shift for GPIO mux override of a pin
+ */
+struct cygnus_gpio_mux {
+ int is_supported;
+ unsigned int offset;
+ unsigned int shift;
+};
+
+/*
+ * Description of a pin in Cygnus
+ *
+ * @pin: pin number
+ * @name: pin name
+ * @gpio_mux: GPIO override related information
+ */
+struct cygnus_pin {
+ unsigned pin;
+ char *name;
+ struct cygnus_gpio_mux gpio_mux;
+};
+
+#define CYGNUS_PIN_DESC(p, n, i, o, s) \
+{ \
+ .pin = p, \
+ .name = n, \
+ .gpio_mux = { \
+ .is_supported = i, \
+ .offset = o, \
+ .shift = s, \
+ }, \
+}
+
+/*
+ * List of pins in Cygnus
+ */
+static struct cygnus_pin cygnus_pins[] = {
+ CYGNUS_PIN_DESC(0, "ext_device_reset_n", 0, 0, 0),
+ CYGNUS_PIN_DESC(1, "chip_mode0", 0, 0, 0),
+ CYGNUS_PIN_DESC(2, "chip_mode1", 0, 0, 0),
+ CYGNUS_PIN_DESC(3, "chip_mode2", 0, 0, 0),
+ CYGNUS_PIN_DESC(4, "chip_mode3", 0, 0, 0),
+ CYGNUS_PIN_DESC(5, "chip_mode4", 0, 0, 0),
+ CYGNUS_PIN_DESC(6, "bsc0_scl", 0, 0, 0),
+ CYGNUS_PIN_DESC(7, "bsc0_sda", 0, 0, 0),
+ CYGNUS_PIN_DESC(8, "bsc1_scl", 0, 0, 0),
+ CYGNUS_PIN_DESC(9, "bsc1_sda", 0, 0, 0),
+ CYGNUS_PIN_DESC(10, "d1w_dq", 1, 0x28, 0),
+ CYGNUS_PIN_DESC(11, "d1wowstz_l", 1, 0x4, 28),
+ CYGNUS_PIN_DESC(12, "gpio0", 0, 0, 0),
+ CYGNUS_PIN_DESC(13, "gpio1", 0, 0, 0),
+ CYGNUS_PIN_DESC(14, "gpio2", 0, 0, 0),
+ CYGNUS_PIN_DESC(15, "gpio3", 0, 0, 0),
+ CYGNUS_PIN_DESC(16, "gpio4", 0, 0, 0),
+ CYGNUS_PIN_DESC(17, "gpio5", 0, 0, 0),
+ CYGNUS_PIN_DESC(18, "gpio6", 0, 0, 0),
+ CYGNUS_PIN_DESC(19, "gpio7", 0, 0, 0),
+ CYGNUS_PIN_DESC(20, "gpio8", 0, 0, 0),
+ CYGNUS_PIN_DESC(21, "gpio9", 0, 0, 0),
+ CYGNUS_PIN_DESC(22, "gpio10", 0, 0, 0),
+ CYGNUS_PIN_DESC(23, "gpio11", 0, 0, 0),
+ CYGNUS_PIN_DESC(24, "gpio12", 0, 0, 0),
+ CYGNUS_PIN_DESC(25, "gpio13", 0, 0, 0),
+ CYGNUS_PIN_DESC(26, "gpio14", 0, 0, 0),
+ CYGNUS_PIN_DESC(27, "gpio15", 0, 0, 0),
+ CYGNUS_PIN_DESC(28, "gpio16", 0, 0, 0),
+ CYGNUS_PIN_DESC(29, "gpio17", 0, 0, 0),
+ CYGNUS_PIN_DESC(30, "gpio18", 0, 0, 0),
+ CYGNUS_PIN_DESC(31, "gpio19", 0, 0, 0),
+ CYGNUS_PIN_DESC(32, "gpio20", 0, 0, 0),
+ CYGNUS_PIN_DESC(33, "gpio21", 0, 0, 0),
+ CYGNUS_PIN_DESC(34, "gpio22", 0, 0, 0),
+ CYGNUS_PIN_DESC(35, "gpio23", 0, 0, 0),
+ CYGNUS_PIN_DESC(36, "mdc", 0, 0, 0),
+ CYGNUS_PIN_DESC(37, "mdio", 0, 0, 0),
+ CYGNUS_PIN_DESC(38, "pwm0", 1, 0x10, 30),
+ CYGNUS_PIN_DESC(39, "pwm1", 1, 0x10, 28),
+ CYGNUS_PIN_DESC(40, "pwm2", 1, 0x10, 26),
+ CYGNUS_PIN_DESC(41, "pwm3", 1, 0x10, 24),
+ CYGNUS_PIN_DESC(42, "sc0_clk", 1, 0x10, 22),
+ CYGNUS_PIN_DESC(43, "sc0_cmdvcc_l", 1, 0x10, 20),
+ CYGNUS_PIN_DESC(44, "sc0_detect", 1, 0x10, 18),
+ CYGNUS_PIN_DESC(45, "sc0_fcb", 1, 0x10, 16),
+ CYGNUS_PIN_DESC(46, "sc0_io", 1, 0x10, 14),
+ CYGNUS_PIN_DESC(47, "sc0_rst_l", 1, 0x10, 12),
+ CYGNUS_PIN_DESC(48, "sc1_clk", 1, 0x10, 10),
+ CYGNUS_PIN_DESC(49, "sc1_cmdvcc_l", 1, 0x10, 8),
+ CYGNUS_PIN_DESC(50, "sc1_detect", 1, 0x10, 6),
+ CYGNUS_PIN_DESC(51, "sc1_fcb", 1, 0x10, 4),
+ CYGNUS_PIN_DESC(52, "sc1_io", 1, 0x10, 2),
+ CYGNUS_PIN_DESC(53, "sc1_rst_l", 1, 0x10, 0),
+ CYGNUS_PIN_DESC(54, "spi0_clk", 1, 0x18, 10),
+ CYGNUS_PIN_DESC(55, "spi0_mosi", 1, 0x18, 6),
+ CYGNUS_PIN_DESC(56, "spi0_miso", 1, 0x18, 8),
+ CYGNUS_PIN_DESC(57, "spi0_ss", 1, 0x18, 4),
+ CYGNUS_PIN_DESC(58, "spi1_clk", 1, 0x18, 2),
+ CYGNUS_PIN_DESC(59, "spi1_mosi", 1, 0x1c, 30),
+ CYGNUS_PIN_DESC(60, "spi1_miso", 1, 0x18, 0),
+ CYGNUS_PIN_DESC(61, "spi1_ss", 1, 0x1c, 28),
+ CYGNUS_PIN_DESC(62, "spi2_clk", 1, 0x1c, 26),
+ CYGNUS_PIN_DESC(63, "spi2_mosi", 1, 0x1c, 22),
+ CYGNUS_PIN_DESC(64, "spi2_miso", 1, 0x1c, 24),
+ CYGNUS_PIN_DESC(65, "spi2_ss", 1, 0x1c, 20),
+ CYGNUS_PIN_DESC(66, "spi3_clk", 1, 0x1c, 18),
+ CYGNUS_PIN_DESC(67, "spi3_mosi", 1, 0x1c, 14),
+ CYGNUS_PIN_DESC(68, "spi3_miso", 1, 0x1c, 16),
+ CYGNUS_PIN_DESC(69, "spi3_ss", 1, 0x1c, 12),
+ CYGNUS_PIN_DESC(70, "uart0_cts", 1, 0x1c, 10),
+ CYGNUS_PIN_DESC(71, "uart0_rts", 1, 0x1c, 8),
+ CYGNUS_PIN_DESC(72, "uart0_rx", 1, 0x1c, 6),
+ CYGNUS_PIN_DESC(73, "uart0_tx", 1, 0x1c, 4),
+ CYGNUS_PIN_DESC(74, "uart1_cts", 1, 0x1c, 2),
+ CYGNUS_PIN_DESC(75, "uart1_dcd", 1, 0x1c, 0),
+ CYGNUS_PIN_DESC(76, "uart1_dsr", 1, 0x20, 14),
+ CYGNUS_PIN_DESC(77, "uart1_dtr", 1, 0x20, 12),
+ CYGNUS_PIN_DESC(78, "uart1_ri", 1, 0x20, 10),
+ CYGNUS_PIN_DESC(79, "uart1_rts", 1, 0x20, 8),
+ CYGNUS_PIN_DESC(80, "uart1_rx", 1, 0x20, 6),
+ CYGNUS_PIN_DESC(81, "uart1_tx", 1, 0x20, 4),
+ CYGNUS_PIN_DESC(82, "uart3_rx", 1, 0x20, 2),
+ CYGNUS_PIN_DESC(83, "uart3_tx", 1, 0x20, 0),
+ CYGNUS_PIN_DESC(84, "sdio1_clk_sdcard", 1, 0x14, 6),
+ CYGNUS_PIN_DESC(85, "sdio1_cmd", 1, 0x14, 4),
+ CYGNUS_PIN_DESC(86, "sdio1_data0", 1, 0x14, 2),
+ CYGNUS_PIN_DESC(87, "sdio1_data1", 1, 0x14, 0),
+ CYGNUS_PIN_DESC(88, "sdio1_data2", 1, 0x18, 30),
+ CYGNUS_PIN_DESC(89, "sdio1_data3", 1, 0x18, 28),
+ CYGNUS_PIN_DESC(90, "sdio1_wp_n", 1, 0x18, 24),
+ CYGNUS_PIN_DESC(91, "sdio1_card_rst", 1, 0x14, 10),
+ CYGNUS_PIN_DESC(92, "sdio1_led_on", 1, 0x18, 26),
+ CYGNUS_PIN_DESC(93, "sdio1_cd", 1, 0x14, 8),
+ CYGNUS_PIN_DESC(94, "sdio0_clk_sdcard", 1, 0x14, 26),
+ CYGNUS_PIN_DESC(95, "sdio0_cmd", 1, 0x14, 24),
+ CYGNUS_PIN_DESC(96, "sdio0_data0", 1, 0x14, 22),
+ CYGNUS_PIN_DESC(97, "sdio0_data1", 1, 0x14, 20),
+ CYGNUS_PIN_DESC(98, "sdio0_data2", 1, 0x14, 18),
+ CYGNUS_PIN_DESC(99, "sdio0_data3", 1, 0x14, 16),
+ CYGNUS_PIN_DESC(100, "sdio0_wp_n", 1, 0x14, 12),
+ CYGNUS_PIN_DESC(101, "sdio0_card_rst", 1, 0x14, 30),
+ CYGNUS_PIN_DESC(102, "sdio0_led_on", 1, 0x14, 14),
+ CYGNUS_PIN_DESC(103, "sdio0_cd", 1, 0x14, 28),
+ CYGNUS_PIN_DESC(104, "sflash_clk", 1, 0x18, 22),
+ CYGNUS_PIN_DESC(105, "sflash_cs_l", 1, 0x18, 20),
+ CYGNUS_PIN_DESC(106, "sflash_mosi", 1, 0x18, 14),
+ CYGNUS_PIN_DESC(107, "sflash_miso", 1, 0x18, 16),
+ CYGNUS_PIN_DESC(108, "sflash_wp_n", 1, 0x18, 12),
+ CYGNUS_PIN_DESC(109, "sflash_hold_n", 1, 0x18, 18),
+ CYGNUS_PIN_DESC(110, "nand_ale", 1, 0xc, 30),
+ CYGNUS_PIN_DESC(111, "nand_ce0_l", 1, 0xc, 28),
+ CYGNUS_PIN_DESC(112, "nand_ce1_l", 1, 0xc, 26),
+ CYGNUS_PIN_DESC(113, "nand_cle", 1, 0xc, 24),
+ CYGNUS_PIN_DESC(114, "nand_dq0", 1, 0xc, 22),
+ CYGNUS_PIN_DESC(115, "nand_dq1", 1, 0xc, 20),
+ CYGNUS_PIN_DESC(116, "nand_dq2", 1, 0xc, 18),
+ CYGNUS_PIN_DESC(117, "nand_dq3", 1, 0xc, 16),
+ CYGNUS_PIN_DESC(118, "nand_dq4", 1, 0xc, 14),
+ CYGNUS_PIN_DESC(119, "nand_dq5", 1, 0xc, 12),
+ CYGNUS_PIN_DESC(120, "nand_dq6", 1, 0xc, 10),
+ CYGNUS_PIN_DESC(121, "nand_dq7", 1, 0xc, 8),
+ CYGNUS_PIN_DESC(122, "nand_rb_l", 1, 0xc, 6),
+ CYGNUS_PIN_DESC(123, "nand_re_l", 1, 0xc, 4),
+ CYGNUS_PIN_DESC(124, "nand_we_l", 1, 0xc, 2),
+ CYGNUS_PIN_DESC(125, "nand_wp_l", 1, 0xc, 0),
+ CYGNUS_PIN_DESC(126, "lcd_clac", 1, 0x4, 26),
+ CYGNUS_PIN_DESC(127, "lcd_clcp", 1, 0x4, 24),
+ CYGNUS_PIN_DESC(128, "lcd_cld0", 1, 0x4, 22),
+ CYGNUS_PIN_DESC(129, "lcd_cld1", 1, 0x4, 0),
+ CYGNUS_PIN_DESC(130, "lcd_cld10", 1, 0x4, 20),
+ CYGNUS_PIN_DESC(131, "lcd_cld11", 1, 0x4, 18),
+ CYGNUS_PIN_DESC(132, "lcd_cld12", 1, 0x4, 16),
+ CYGNUS_PIN_DESC(133, "lcd_cld13", 1, 0x4, 14),
+ CYGNUS_PIN_DESC(134, "lcd_cld14", 1, 0x4, 12),
+ CYGNUS_PIN_DESC(135, "lcd_cld15", 1, 0x4, 10),
+ CYGNUS_PIN_DESC(136, "lcd_cld16", 1, 0x4, 8),
+ CYGNUS_PIN_DESC(137, "lcd_cld17", 1, 0x4, 6),
+ CYGNUS_PIN_DESC(138, "lcd_cld18", 1, 0x4, 4),
+ CYGNUS_PIN_DESC(139, "lcd_cld19", 1, 0x4, 2),
+ CYGNUS_PIN_DESC(140, "lcd_cld2", 1, 0x8, 22),
+ CYGNUS_PIN_DESC(141, "lcd_cld20", 1, 0x8, 30),
+ CYGNUS_PIN_DESC(142, "lcd_cld21", 1, 0x8, 28),
+ CYGNUS_PIN_DESC(143, "lcd_cld22", 1, 0x8, 26),
+ CYGNUS_PIN_DESC(144, "lcd_cld23", 1, 0x8, 24),
+ CYGNUS_PIN_DESC(145, "lcd_cld3", 1, 0x8, 20),
+ CYGNUS_PIN_DESC(146, "lcd_cld4", 1, 0x8, 18),
+ CYGNUS_PIN_DESC(147, "lcd_cld5", 1, 0x8, 16),
+ CYGNUS_PIN_DESC(148, "lcd_cld6", 1, 0x8, 14),
+ CYGNUS_PIN_DESC(149, "lcd_cld7", 1, 0x8, 12),
+ CYGNUS_PIN_DESC(150, "lcd_cld8", 1, 0x8, 10),
+ CYGNUS_PIN_DESC(151, "lcd_cld9", 1, 0x8, 8),
+ CYGNUS_PIN_DESC(152, "lcd_clfp", 1, 0x8, 6),
+ CYGNUS_PIN_DESC(153, "lcd_clle", 1, 0x8, 4),
+ CYGNUS_PIN_DESC(154, "lcd_cllp", 1, 0x8, 2),
+ CYGNUS_PIN_DESC(155, "lcd_clpower", 1, 0x8, 0),
+ CYGNUS_PIN_DESC(156, "camera_vsync", 1, 0x4, 30),
+ CYGNUS_PIN_DESC(157, "camera_trigger", 1, 0x0, 0),
+ CYGNUS_PIN_DESC(158, "camera_strobe", 1, 0x0, 2),
+ CYGNUS_PIN_DESC(159, "camera_standby", 1, 0x0, 4),
+ CYGNUS_PIN_DESC(160, "camera_reset_n", 1, 0x0, 6),
+ CYGNUS_PIN_DESC(161, "camera_pixdata9", 1, 0x0, 8),
+ CYGNUS_PIN_DESC(162, "camera_pixdata8", 1, 0x0, 10),
+ CYGNUS_PIN_DESC(163, "camera_pixdata7", 1, 0x0, 12),
+ CYGNUS_PIN_DESC(164, "camera_pixdata6", 1, 0x0, 14),
+ CYGNUS_PIN_DESC(165, "camera_pixdata5", 1, 0x0, 16),
+ CYGNUS_PIN_DESC(166, "camera_pixdata4", 1, 0x0, 18),
+ CYGNUS_PIN_DESC(167, "camera_pixdata3", 1, 0x0, 20),
+ CYGNUS_PIN_DESC(168, "camera_pixdata2", 1, 0x0, 22),
+ CYGNUS_PIN_DESC(169, "camera_pixdata1", 1, 0x0, 24),
+ CYGNUS_PIN_DESC(170, "camera_pixdata0", 1, 0x0, 26),
+ CYGNUS_PIN_DESC(171, "camera_pixclk", 1, 0x0, 28),
+ CYGNUS_PIN_DESC(172, "camera_hsync", 1, 0x0, 30),
+ CYGNUS_PIN_DESC(173, "camera_pll_ref_clk", 0, 0, 0),
+ CYGNUS_PIN_DESC(174, "usb_id_indication", 0, 0, 0),
+ CYGNUS_PIN_DESC(175, "usb_vbus_indication", 0, 0, 0),
+ CYGNUS_PIN_DESC(176, "gpio0_3p3", 0, 0, 0),
+ CYGNUS_PIN_DESC(177, "gpio1_3p3", 0, 0, 0),
+ CYGNUS_PIN_DESC(178, "gpio2_3p3", 0, 0, 0),
+ CYGNUS_PIN_DESC(179, "gpio3_3p3", 0, 0, 0),
+};
+
+/*
+ * List of groups of pins
+ */
+static const unsigned bsc1_pins[] = { 8, 9 };
+static const unsigned pcie_clkreq_pins[] = { 8, 9 };
+
+static const unsigned i2s2_0_pins[] = { 12 };
+static const unsigned i2s2_1_pins[] = { 13 };
+static const unsigned i2s2_2_pins[] = { 14 };
+static const unsigned i2s2_3_pins[] = { 15 };
+static const unsigned i2s2_4_pins[] = { 16 };
+
+static const unsigned pwm4_pins[] = { 17 };
+static const unsigned pwm5_pins[] = { 18 };
+
+static const unsigned key0_pins[] = { 20 };
+static const unsigned key1_pins[] = { 21 };
+static const unsigned key2_pins[] = { 22 };
+static const unsigned key3_pins[] = { 23 };
+static const unsigned key4_pins[] = { 24 };
+static const unsigned key5_pins[] = { 25 };
+
+static const unsigned key6_pins[] = { 26 };
+static const unsigned audio_dte0_pins[] = { 26 };
+
+static const unsigned key7_pins[] = { 27 };
+static const unsigned audio_dte1_pins[] = { 27 };
+
+static const unsigned key8_pins[] = { 28 };
+static const unsigned key9_pins[] = { 29 };
+static const unsigned key10_pins[] = { 30 };
+static const unsigned key11_pins[] = { 31 };
+static const unsigned key12_pins[] = { 32 };
+static const unsigned key13_pins[] = { 33 };
+
+static const unsigned key14_pins[] = { 34 };
+static const unsigned audio_dte2_pins[] = { 34 };
+
+static const unsigned key15_pins[] = { 35 };
+static const unsigned audio_dte3_pins[] = { 35 };
+
+static const unsigned pwm0_pins[] = { 38 };
+static const unsigned pwm1_pins[] = { 39 };
+static const unsigned pwm2_pins[] = { 40 };
+static const unsigned pwm3_pins[] = { 41 };
+
+static const unsigned sdio0_pins[] = { 94, 95, 96, 97, 98, 99 };
+
+static const unsigned smart_card0_pins[] = { 42, 43, 44, 46, 47 };
+static const unsigned i2s0_0_pins[] = { 42, 43, 44, 46 };
+static const unsigned spdif_pins[] = { 47 };
+
+static const unsigned smart_card1_pins[] = { 48, 49, 50, 52, 53 };
+static const unsigned i2s1_0_pins[] = { 48, 49, 50, 52 };
+
+static const unsigned spi0_pins[] = { 54, 55, 56, 57 };
+
+static const unsigned spi1_pins[] = { 58, 59, 60, 61 };
+
+static const unsigned spi2_pins[] = { 62, 63, 64, 65 };
+
+static const unsigned spi3_pins[] = { 66, 67, 68, 69 };
+static const unsigned sw_led0_0_pins[] = { 66, 67, 68, 69 };
+
+static const unsigned d1w_pins[] = { 10, 11 };
+static const unsigned uart4_pins[] = { 10, 11 };
+static const unsigned sw_led2_0_pins[] = { 10, 11 };
+
+static const unsigned lcd_pins[] = { 126, 127, 128, 129, 130, 131, 132, 133,
+ 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147,
+ 148, 149, 150, 151, 152, 153, 154, 155 };
+static const unsigned sram_0_pins[] = { 126, 127, 128, 129, 130, 131, 132, 133,
+ 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147,
+ 148, 149, 150, 151, 152, 153, 154, 155 };
+static const unsigned spi5_pins[] = { 141, 142, 143, 144 };
+
+static const unsigned uart0_pins[] = { 70, 71, 72, 73 };
+static const unsigned sw_led0_1_pins[] = { 70, 71, 72, 73 };
+
+static const unsigned uart1_dte_pins[] = { 75, 76, 77, 78 };
+static const unsigned uart2_pins[] = { 75, 76, 77, 78 };
+
+static const unsigned uart1_pins[] = { 74, 79, 80, 81 };
+
+static const unsigned uart3_pins[] = { 82, 83 };
+
+static const unsigned qspi_0_pins[] = { 104, 105, 106, 107 };
+
+static const unsigned nand_pins[] = { 110, 111, 112, 113, 114, 115, 116, 117,
+ 118, 119, 120, 121, 122, 123, 124, 125 };
+
+static const unsigned sdio0_cd_pins[] = { 103 };
+
+static const unsigned sdio0_mmc_pins[] = { 100, 101, 102 };
+
+static const unsigned sdio1_data_0_pins[] = { 86, 87 };
+static const unsigned can0_pins[] = { 86, 87 };
+static const unsigned spi4_0_pins[] = { 86, 87 };
+
+static const unsigned sdio1_data_1_pins[] = { 88, 89 };
+static const unsigned can1_pins[] = { 88, 89 };
+static const unsigned spi4_1_pins[] = { 88, 89 };
+
+static const unsigned sdio1_cd_pins[] = { 93 };
+
+static const unsigned sdio1_led_pins[] = { 84, 85 };
+static const unsigned sw_led2_1_pins[] = { 84, 85 };
+
+static const unsigned sdio1_mmc_pins[] = { 90, 91, 92 };
+
+static const unsigned cam_led_pins[] = { 156, 157, 158, 159, 160 };
+static const unsigned sw_led1_pins[] = { 156, 157, 158, 159 };
+
+static const unsigned cam_0_pins[] = { 169, 170, 171, 169, 170 };
+
+static const unsigned cam_1_pins[] = { 161, 162, 163, 164, 165, 166, 167,
+ 168 };
+static const unsigned sram_1_pins[] = { 161, 162, 163, 164, 165, 166, 167,
+ 168 };
+
+static const unsigned qspi_1_pins[] = { 108, 109 };
+
+static const unsigned smart_card0_fcb_pins[] = { 45 };
+static const unsigned i2s0_1_pins[] = { 45 };
+
+static const unsigned smart_card1_fcb_pins[] = { 51 };
+static const unsigned i2s1_1_pins[] = { 51 };
+
+static const unsigned gpio0_3p3_pins[] = { 176 };
+static const unsigned usb0_oc_pins[] = { 176 };
+
+static const unsigned gpio1_3p3_pins[] = { 177 };
+static const unsigned usb1_oc_pins[] = { 177 };
+
+static const unsigned gpio2_3p3_pins[] = { 178 };
+static const unsigned usb2_oc_pins[] = { 178 };
+
+#define CYGNUS_PIN_GROUP(group_name, off, sh, al) \
+{ \
+ .name = __stringify(group_name) "_grp", \
+ .pins = group_name ## _pins, \
+ .num_pins = ARRAY_SIZE(group_name ## _pins), \
+ .mux = { \
+ .offset = off, \
+ .shift = sh, \
+ .alt = al, \
+ } \
+}
+
+/*
+ * List of Cygnus pin groups
+ */
+static const struct cygnus_pin_group cygnus_pin_groups[] = {
+ CYGNUS_PIN_GROUP(i2s2_0, 0x0, 0, 2),
+ CYGNUS_PIN_GROUP(i2s2_1, 0x0, 4, 2),
+ CYGNUS_PIN_GROUP(i2s2_2, 0x0, 8, 2),
+ CYGNUS_PIN_GROUP(i2s2_3, 0x0, 12, 2),
+ CYGNUS_PIN_GROUP(i2s2_4, 0x0, 16, 2),
+ CYGNUS_PIN_GROUP(pwm4, 0x0, 20, 0),
+ CYGNUS_PIN_GROUP(pwm5, 0x0, 24, 2),
+ CYGNUS_PIN_GROUP(key0, 0x4, 0, 1),
+ CYGNUS_PIN_GROUP(key1, 0x4, 4, 1),
+ CYGNUS_PIN_GROUP(key2, 0x4, 8, 1),
+ CYGNUS_PIN_GROUP(key3, 0x4, 12, 1),
+ CYGNUS_PIN_GROUP(key4, 0x4, 16, 1),
+ CYGNUS_PIN_GROUP(key5, 0x4, 20, 1),
+ CYGNUS_PIN_GROUP(key6, 0x4, 24, 1),
+ CYGNUS_PIN_GROUP(audio_dte0, 0x4, 24, 2),
+ CYGNUS_PIN_GROUP(key7, 0x4, 28, 1),
+ CYGNUS_PIN_GROUP(audio_dte1, 0x4, 28, 2),
+ CYGNUS_PIN_GROUP(key8, 0x8, 0, 1),
+ CYGNUS_PIN_GROUP(key9, 0x8, 4, 1),
+ CYGNUS_PIN_GROUP(key10, 0x8, 8, 1),
+ CYGNUS_PIN_GROUP(key11, 0x8, 12, 1),
+ CYGNUS_PIN_GROUP(key12, 0x8, 16, 1),
+ CYGNUS_PIN_GROUP(key13, 0x8, 20, 1),
+ CYGNUS_PIN_GROUP(key14, 0x8, 24, 1),
+ CYGNUS_PIN_GROUP(audio_dte2, 0x8, 24, 2),
+ CYGNUS_PIN_GROUP(key15, 0x8, 28, 1),
+ CYGNUS_PIN_GROUP(audio_dte3, 0x8, 28, 2),
+ CYGNUS_PIN_GROUP(pwm0, 0xc, 0, 0),
+ CYGNUS_PIN_GROUP(pwm1, 0xc, 4, 0),
+ CYGNUS_PIN_GROUP(pwm2, 0xc, 8, 0),
+ CYGNUS_PIN_GROUP(pwm3, 0xc, 12, 0),
+ CYGNUS_PIN_GROUP(sdio0, 0xc, 16, 0),
+ CYGNUS_PIN_GROUP(smart_card0, 0xc, 20, 0),
+ CYGNUS_PIN_GROUP(i2s0_0, 0xc, 20, 1),
+ CYGNUS_PIN_GROUP(spdif, 0xc, 20, 1),
+ CYGNUS_PIN_GROUP(smart_card1, 0xc, 24, 0),
+ CYGNUS_PIN_GROUP(i2s1_0, 0xc, 24, 1),
+ CYGNUS_PIN_GROUP(spi0, 0x10, 0, 0),
+ CYGNUS_PIN_GROUP(spi1, 0x10, 4, 0),
+ CYGNUS_PIN_GROUP(spi2, 0x10, 8, 0),
+ CYGNUS_PIN_GROUP(spi3, 0x10, 12, 0),
+ CYGNUS_PIN_GROUP(sw_led0_0, 0x10, 12, 2),
+ CYGNUS_PIN_GROUP(d1w, 0x10, 16, 0),
+ CYGNUS_PIN_GROUP(uart4, 0x10, 16, 1),
+ CYGNUS_PIN_GROUP(sw_led2_0, 0x10, 16, 2),
+ CYGNUS_PIN_GROUP(lcd, 0x10, 20, 0),
+ CYGNUS_PIN_GROUP(sram_0, 0x10, 20, 1),
+ CYGNUS_PIN_GROUP(spi5, 0x10, 20, 2),
+ CYGNUS_PIN_GROUP(uart0, 0x14, 0, 0),
+ CYGNUS_PIN_GROUP(sw_led0_1, 0x14, 0, 2),
+ CYGNUS_PIN_GROUP(uart1_dte, 0x14, 4, 0),
+ CYGNUS_PIN_GROUP(uart2, 0x14, 4, 1),
+ CYGNUS_PIN_GROUP(uart1, 0x14, 8, 0),
+ CYGNUS_PIN_GROUP(uart3, 0x14, 12, 0),
+ CYGNUS_PIN_GROUP(qspi_0, 0x14, 16, 0),
+ CYGNUS_PIN_GROUP(nand, 0x14, 20, 0),
+ CYGNUS_PIN_GROUP(sdio0_cd, 0x18, 0, 0),
+ CYGNUS_PIN_GROUP(sdio0_mmc, 0x18, 4, 0),
+ CYGNUS_PIN_GROUP(sdio1_data_0, 0x18, 8, 0),
+ CYGNUS_PIN_GROUP(can0, 0x18, 8, 1),
+ CYGNUS_PIN_GROUP(spi4_0, 0x18, 8, 2),
+ CYGNUS_PIN_GROUP(sdio1_data_1, 0x18, 12, 0),
+ CYGNUS_PIN_GROUP(can1, 0x18, 12, 1),
+ CYGNUS_PIN_GROUP(spi4_1, 0x18, 12, 2),
+ CYGNUS_PIN_GROUP(sdio1_cd, 0x18, 16, 0),
+ CYGNUS_PIN_GROUP(sdio1_led, 0x18, 20, 0),
+ CYGNUS_PIN_GROUP(sw_led2_1, 0x18, 20, 2),
+ CYGNUS_PIN_GROUP(sdio1_mmc, 0x18, 24, 0),
+ CYGNUS_PIN_GROUP(cam_led, 0x1c, 0, 0),
+ CYGNUS_PIN_GROUP(sw_led1, 0x1c, 0, 1),
+ CYGNUS_PIN_GROUP(cam_0, 0x1c, 4, 0),
+ CYGNUS_PIN_GROUP(cam_1, 0x1c, 8, 0),
+ CYGNUS_PIN_GROUP(sram_1, 0x1c, 8, 1),
+ CYGNUS_PIN_GROUP(qspi_1, 0x1c, 12, 0),
+ CYGNUS_PIN_GROUP(bsc1, 0x1c, 16, 0),
+ CYGNUS_PIN_GROUP(pcie_clkreq, 0x1c, 16, 1),
+ CYGNUS_PIN_GROUP(smart_card0_fcb, 0x20, 0, 0),
+ CYGNUS_PIN_GROUP(i2s0_1, 0x20, 0, 1),
+ CYGNUS_PIN_GROUP(smart_card1_fcb, 0x20, 4, 0),
+ CYGNUS_PIN_GROUP(i2s1_1, 0x20, 4, 1),
+ CYGNUS_PIN_GROUP(gpio0_3p3, 0x28, 0, 0),
+ CYGNUS_PIN_GROUP(usb0_oc, 0x28, 0, 1),
+ CYGNUS_PIN_GROUP(gpio1_3p3, 0x28, 4, 0),
+ CYGNUS_PIN_GROUP(usb1_oc, 0x28, 4, 1),
+ CYGNUS_PIN_GROUP(gpio2_3p3, 0x28, 8, 0),
+ CYGNUS_PIN_GROUP(usb2_oc, 0x28, 8, 1),
+};
+
+/*
+ * List of groups supported by functions
+ */
+static const char * const i2s0_grps[] = { "i2s0_0_grp", "i2s0_1_grp" };
+static const char * const i2s1_grps[] = { "i2s1_0_grp", "i2s1_1_grp" };
+static const char * const i2s2_grps[] = { "i2s2_0_grp", "i2s2_1_grp",
+ "i2s2_2_grp", "i2s2_3_grp", "i2s2_4_grp" };
+static const char * const spdif_grps[] = { "spdif_grp" };
+static const char * const pwm0_grps[] = { "pwm0_grp" };
+static const char * const pwm1_grps[] = { "pwm1_grp" };
+static const char * const pwm2_grps[] = { "pwm2_grp" };
+static const char * const pwm3_grps[] = { "pwm3_grp" };
+static const char * const pwm4_grps[] = { "pwm4_grp" };
+static const char * const pwm5_grps[] = { "pwm5_grp" };
+static const char * const key_grps[] = { "key0_grp", "key1_grp", "key2_grp",
+ "key3_grp", "key4_grp", "key5_grp", "key6_grp", "key7_grp", "key8_grp",
+ "key9_grp", "key10_grp", "key11_grp", "key12_grp", "key13_grp",
+ "key14_grp", "key15_grp" };
+static const char * const audio_dte_grps[] = { "audio_dte0_grp",
+ "audio_dte1_grp", "audio_dte2_grp", "audio_dte3_grp" };
+static const char * const smart_card0_grps[] = { "smart_card0_grp",
+ "smart_card0_fcb_grp" };
+static const char * const smart_card1_grps[] = { "smart_card1_grp",
+ "smart_card1_fcb_grp" };
+static const char * const spi0_grps[] = { "spi0_grp" };
+static const char * const spi1_grps[] = { "spi1_grp" };
+static const char * const spi2_grps[] = { "spi2_grp" };
+static const char * const spi3_grps[] = { "spi3_grp" };
+static const char * const spi4_grps[] = { "spi4_0_grp", "spi4_1_grp" };
+static const char * const spi5_grps[] = { "spi5_grp" };
+
+static const char * const sw_led0_grps[] = { "sw_led0_0_grp",
+ "sw_led0_1_grp" };
+static const char * const sw_led1_grps[] = { "sw_led1_grp" };
+static const char * const sw_led2_grps[] = { "sw_led2_0_grp",
+ "sw_led2_1_grp" };
+static const char * const d1w_grps[] = { "d1w_grp" };
+static const char * const lcd_grps[] = { "lcd_grp" };
+static const char * const sram_grps[] = { "sram_0_grp", "sram_1_grp" };
+
+static const char * const uart0_grps[] = { "uart0_grp" };
+static const char * const uart1_grps[] = { "uart1_grp", "uart1_dte_grp" };
+static const char * const uart2_grps[] = { "uart2_grp" };
+static const char * const uart3_grps[] = { "uart3_grp" };
+static const char * const uart4_grps[] = { "uart4_grp" };
+static const char * const qspi_grps[] = { "qspi_0_grp", "qspi_1_grp" };
+static const char * const nand_grps[] = { "nand_grp" };
+static const char * const sdio0_grps[] = { "sdio0_grp", "sdio0_cd_grp",
+ "sdio0_mmc_grp" };
+static const char * const sdio1_grps[] = { "sdio1_data_0_grp",
+ "sdio1_data_1_grp", "sdio1_cd_grp", "sdio1_led_grp", "sdio1_mmc_grp" };
+static const char * const can0_grps[] = { "can0_grp" };
+static const char * const can1_grps[] = { "can1_grp" };
+static const char * const cam_grps[] = { "cam_led_grp", "cam_0_grp",
+ "cam_1_grp" };
+static const char * const bsc1_grps[] = { "bsc1_grp" };
+static const char * const pcie_clkreq_grps[] = { "pcie_clkreq_grp" };
+static const char * const usb0_oc_grps[] = { "usb0_oc_grp" };
+static const char * const usb1_oc_grps[] = { "usb1_oc_grp" };
+static const char * const usb2_oc_grps[] = { "usb2_oc_grp" };
+
+#define CYGNUS_PIN_FUNCTION(func) \
+{ \
+ .name = #func, \
+ .groups = func ## _grps, \
+ .num_groups = ARRAY_SIZE(func ## _grps), \
+}
+
+/*
+ * List of supported functions in Cygnus
+ */
+static const struct cygnus_pin_function cygnus_pin_functions[] = {
+ CYGNUS_PIN_FUNCTION(i2s0),
+ CYGNUS_PIN_FUNCTION(i2s1),
+ CYGNUS_PIN_FUNCTION(i2s2),
+ CYGNUS_PIN_FUNCTION(spdif),
+ CYGNUS_PIN_FUNCTION(pwm0),
+ CYGNUS_PIN_FUNCTION(pwm1),
+ CYGNUS_PIN_FUNCTION(pwm2),
+ CYGNUS_PIN_FUNCTION(pwm3),
+ CYGNUS_PIN_FUNCTION(pwm4),
+ CYGNUS_PIN_FUNCTION(pwm5),
+ CYGNUS_PIN_FUNCTION(key),
+ CYGNUS_PIN_FUNCTION(audio_dte),
+ CYGNUS_PIN_FUNCTION(smart_card0),
+ CYGNUS_PIN_FUNCTION(smart_card1),
+ CYGNUS_PIN_FUNCTION(spi0),
+ CYGNUS_PIN_FUNCTION(spi1),
+ CYGNUS_PIN_FUNCTION(spi2),
+ CYGNUS_PIN_FUNCTION(spi3),
+ CYGNUS_PIN_FUNCTION(spi4),
+ CYGNUS_PIN_FUNCTION(spi5),
+ CYGNUS_PIN_FUNCTION(sw_led0),
+ CYGNUS_PIN_FUNCTION(sw_led1),
+ CYGNUS_PIN_FUNCTION(sw_led2),
+ CYGNUS_PIN_FUNCTION(d1w),
+ CYGNUS_PIN_FUNCTION(lcd),
+ CYGNUS_PIN_FUNCTION(sram),
+ CYGNUS_PIN_FUNCTION(uart0),
+ CYGNUS_PIN_FUNCTION(uart1),
+ CYGNUS_PIN_FUNCTION(uart2),
+ CYGNUS_PIN_FUNCTION(uart3),
+ CYGNUS_PIN_FUNCTION(uart4),
+ CYGNUS_PIN_FUNCTION(qspi),
+ CYGNUS_PIN_FUNCTION(nand),
+ CYGNUS_PIN_FUNCTION(sdio0),
+ CYGNUS_PIN_FUNCTION(sdio1),
+ CYGNUS_PIN_FUNCTION(can0),
+ CYGNUS_PIN_FUNCTION(can1),
+ CYGNUS_PIN_FUNCTION(cam),
+ CYGNUS_PIN_FUNCTION(bsc1),
+ CYGNUS_PIN_FUNCTION(pcie_clkreq),
+ CYGNUS_PIN_FUNCTION(usb0_oc),
+ CYGNUS_PIN_FUNCTION(usb1_oc),
+ CYGNUS_PIN_FUNCTION(usb2_oc),
+};
+
+static int cygnus_get_groups_count(struct pinctrl_dev *pctrl_dev)
+{
+ struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
+
+ return pinctrl->num_groups;
+}
+
+static const char *cygnus_get_group_name(struct pinctrl_dev *pctrl_dev,
+ unsigned selector)
+{
+ struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
+
+ return pinctrl->groups[selector].name;
+}
+
+static int cygnus_get_group_pins(struct pinctrl_dev *pctrl_dev,
+ unsigned selector, const unsigned **pins,
+ unsigned *num_pins)
+{
+ struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
+
+ *pins = pinctrl->groups[selector].pins;
+ *num_pins = pinctrl->groups[selector].num_pins;
+
+ return 0;
+}
+
+static void cygnus_pin_dbg_show(struct pinctrl_dev *pctrl_dev,
+ struct seq_file *s, unsigned offset)
+{
+ seq_printf(s, " %s", dev_name(pctrl_dev->dev));
+}
+
+static const struct pinctrl_ops cygnus_pinctrl_ops = {
+ .get_groups_count = cygnus_get_groups_count,
+ .get_group_name = cygnus_get_group_name,
+ .get_group_pins = cygnus_get_group_pins,
+ .pin_dbg_show = cygnus_pin_dbg_show,
+ .dt_node_to_map = pinconf_generic_dt_node_to_map_group,
+ .dt_free_map = pinctrl_utils_dt_free_map,
+};
+
+static int cygnus_get_functions_count(struct pinctrl_dev *pctrl_dev)
+{
+ struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
+
+ return pinctrl->num_functions;
+}
+
+static const char *cygnus_get_function_name(struct pinctrl_dev *pctrl_dev,
+ unsigned selector)
+{
+ struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
+
+ return pinctrl->functions[selector].name;
+}
+
+static int cygnus_get_function_groups(struct pinctrl_dev *pctrl_dev,
+ unsigned selector,
+ const char * const **groups,
+ unsigned * const num_groups)
+{
+ struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
+
+ *groups = pinctrl->functions[selector].groups;
+ *num_groups = pinctrl->functions[selector].num_groups;
+
+ return 0;
+}
+
+static int cygnus_pinmux_set(struct cygnus_pinctrl *pinctrl,
+ const struct cygnus_pin_function *func,
+ const struct cygnus_pin_group *grp,
+ struct cygnus_mux_log *mux_log)
+{
+ const struct cygnus_mux *mux = &grp->mux;
+ int i;
+ u32 val, mask = 0x7;
+ unsigned long flags;
+
+ for (i = 0; i < CYGNUS_NUM_IOMUX; i++) {
+ if (mux->offset != mux_log[i].mux.offset ||
+ mux->shift != mux_log[i].mux.shift)
+ continue;
+
+ /* match found if we reach here */
+
+ /* if this is a new configuration, just do it! */
+ if (!mux_log[i].is_configured)
+ break;
+
+ /*
+ * IOMUX has been configured previously and one is trying to
+ * configure it to a different function
+ */
+ if (mux_log[i].mux.alt != mux->alt) {
+ dev_err(pinctrl->dev,
+ "double configuration error detected!\n");
+ dev_err(pinctrl->dev, "func:%s grp:%s\n",
+ func->name, grp->name);
+ return -EINVAL;
+ } else {
+ /*
+ * One tries to configure it to the same function.
+ * Just quit and don't bother
+ */
+ return 0;
+ }
+ }
+
+ mux_log[i].mux.alt = mux->alt;
+ mux_log[i].is_configured = true;
+
+ spin_lock_irqsave(&pinctrl->lock, flags);
+
+ val = readl(pinctrl->base0 + grp->mux.offset);
+ val &= ~(mask << grp->mux.shift);
+ val |= grp->mux.alt << grp->mux.shift;
+ writel(val, pinctrl->base0 + grp->mux.offset);
+
+ spin_unlock_irqrestore(&pinctrl->lock, flags);
+
+ return 0;
+}
+
+static int cygnus_pinmux_set_mux(struct pinctrl_dev *pctrl_dev,
+ unsigned func_select, unsigned grp_select)
+{
+ struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
+ const struct cygnus_pin_function *func =
+ &pinctrl->functions[func_select];
+ const struct cygnus_pin_group *grp = &pinctrl->groups[grp_select];
+
+ dev_dbg(pctrl_dev->dev, "func:%u name:%s grp:%u name:%s\n",
+ func_select, func->name, grp_select, grp->name);
+
+ dev_dbg(pctrl_dev->dev, "offset:0x%08x shift:%u alt:%u\n",
+ grp->mux.offset, grp->mux.shift, grp->mux.alt);
+
+ return cygnus_pinmux_set(pinctrl, func, grp, pinctrl->mux_log);
+}
+
+static int cygnus_gpio_request_enable(struct pinctrl_dev *pctrl_dev,
+ struct pinctrl_gpio_range *range,
+ unsigned pin)
+{
+ struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
+ const struct cygnus_gpio_mux *mux = pctrl_dev->desc->pins[pin].drv_data;
+ u32 val;
+ unsigned long flags;
+
+ /* not all pins support GPIO pinmux override */
+ if (!mux->is_supported)
+ return -ENOTSUPP;
+
+ spin_lock_irqsave(&pinctrl->lock, flags);
+
+ val = readl(pinctrl->base1 + mux->offset);
+ val |= 0x3 << mux->shift;
+ writel(val, pinctrl->base1 + mux->offset);
+
+ spin_unlock_irqrestore(&pinctrl->lock, flags);
+
+ dev_dbg(pctrl_dev->dev,
+ "gpio request enable pin=%u offset=0x%x shift=%u\n",
+ pin, mux->offset, mux->shift);
+
+ return 0;
+}
+
+static void cygnus_gpio_disable_free(struct pinctrl_dev *pctrl_dev,
+ struct pinctrl_gpio_range *range,
+ unsigned pin)
+{
+ struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
+ struct cygnus_gpio_mux *mux = pctrl_dev->desc->pins[pin].drv_data;
+ u32 val;
+ unsigned long flags;
+
+ if (!mux->is_supported)
+ return;
+
+ spin_lock_irqsave(&pinctrl->lock, flags);
+
+ val = readl(pinctrl->base1 + mux->offset);
+ val &= ~(0x3 << mux->shift);
+ writel(val, pinctrl->base1 + mux->offset);
+
+ spin_unlock_irqrestore(&pinctrl->lock, flags);
+
+ dev_err(pctrl_dev->dev,
+ "gpio disable free pin=%u offset=0x%x shift=%u\n",
+ pin, mux->offset, mux->shift);
+}
+
+static const struct pinmux_ops cygnus_pinmux_ops = {
+ .get_functions_count = cygnus_get_functions_count,
+ .get_function_name = cygnus_get_function_name,
+ .get_function_groups = cygnus_get_function_groups,
+ .set_mux = cygnus_pinmux_set_mux,
+ .gpio_request_enable = cygnus_gpio_request_enable,
+ .gpio_disable_free = cygnus_gpio_disable_free,
+};
+
+static struct pinctrl_desc cygnus_pinctrl_desc = {
+ .name = "cygnus-pinmux",
+ .pctlops = &cygnus_pinctrl_ops,
+ .pmxops = &cygnus_pinmux_ops,
+};
+
+static int cygnus_mux_log_init(struct cygnus_pinctrl *pinctrl)
+{
+ struct cygnus_mux_log *log;
+ unsigned int i, j;
+
+ pinctrl->mux_log = devm_kcalloc(pinctrl->dev, CYGNUS_NUM_IOMUX,
+ sizeof(struct cygnus_mux_log),
+ GFP_KERNEL);
+ if (!pinctrl->mux_log)
+ return -ENOMEM;
+
+ log = pinctrl->mux_log;
+ for (i = 0; i < CYGNUS_NUM_IOMUX_REGS; i++) {
+ for (j = 0; j < CYGNUS_NUM_MUX_PER_REG; j++) {
+ log = &pinctrl->mux_log[i * CYGNUS_NUM_MUX_PER_REG
+ + j];
+ log->mux.offset = i * 4;
+ log->mux.shift = j * 4;
+ log->mux.alt = 0;
+ log->is_configured = false;
+ }
+ }
+
+ return 0;
+}
+
+static int cygnus_pinmux_probe(struct platform_device *pdev)
+{
+ struct cygnus_pinctrl *pinctrl;
+ struct resource *res;
+ int i, ret;
+ struct pinctrl_pin_desc *pins;
+ unsigned num_pins = ARRAY_SIZE(cygnus_pins);
+
+ pinctrl = devm_kzalloc(&pdev->dev, sizeof(*pinctrl), GFP_KERNEL);
+ if (!pinctrl)
+ return -ENOMEM;
+
+ pinctrl->dev = &pdev->dev;
+ platform_set_drvdata(pdev, pinctrl);
+ spin_lock_init(&pinctrl->lock);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ pinctrl->base0 = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(pinctrl->base0)) {
+ dev_err(&pdev->dev, "unable to map I/O space\n");
+ return PTR_ERR(pinctrl->base0);
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ pinctrl->base1 = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(pinctrl->base1)) {
+ dev_err(&pdev->dev, "unable to map I/O space\n");
+ return PTR_ERR(pinctrl->base1);
+ }
+
+ ret = cygnus_mux_log_init(pinctrl);
+ if (ret) {
+ dev_err(&pdev->dev, "unable to initialize IOMUX log\n");
+ return ret;
+ }
+
+ pins = devm_kcalloc(&pdev->dev, num_pins, sizeof(*pins), GFP_KERNEL);
+ if (!pins)
+ return -ENOMEM;
+
+ for (i = 0; i < num_pins; i++) {
+ pins[i].number = cygnus_pins[i].pin;
+ pins[i].name = cygnus_pins[i].name;
+ pins[i].drv_data = &cygnus_pins[i].gpio_mux;
+ }
+
+ pinctrl->groups = cygnus_pin_groups;
+ pinctrl->num_groups = ARRAY_SIZE(cygnus_pin_groups);
+ pinctrl->functions = cygnus_pin_functions;
+ pinctrl->num_functions = ARRAY_SIZE(cygnus_pin_functions);
+ cygnus_pinctrl_desc.pins = pins;
+ cygnus_pinctrl_desc.npins = num_pins;
+
+ pinctrl->pctl = pinctrl_register(&cygnus_pinctrl_desc, &pdev->dev,
+ pinctrl);
+ if (!pinctrl->pctl) {
+ dev_err(&pdev->dev, "unable to register Cygnus IOMUX pinctrl\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static const struct of_device_id cygnus_pinmux_of_match[] = {
+ { .compatible = "brcm,cygnus-pinmux" },
+ { }
+};
+
+static struct platform_driver cygnus_pinmux_driver = {
+ .driver = {
+ .name = "cygnus-pinmux",
+ .of_match_table = cygnus_pinmux_of_match,
+ .suppress_bind_attrs = true,
+ },
+ .probe = cygnus_pinmux_probe,
+};
+
+static int __init cygnus_pinmux_init(void)
+{
+ return platform_driver_register(&cygnus_pinmux_driver);
+}
+arch_initcall(cygnus_pinmux_init);
+
+MODULE_AUTHOR("Ray Jui <rjui@broadcom.com>");
+MODULE_DESCRIPTION("Broadcom Cygnus IOMUX driver");
+MODULE_LICENSE("GPL v2");
struct imx_pin_reg *pin_reg;
struct imx_pin *pin = &grp->pins[i];
- if (info->flags & SHARE_MUX_CONF_REG)
+ if (info->flags & SHARE_MUX_CONF_REG) {
conf_reg = mux_reg;
- else
+ } else {
conf_reg = be32_to_cpu(*list++);
+ if (!conf_reg)
+ conf_reg = -1;
+ }
pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
pin_reg = &info->pin_regs[pin_id];
{
struct imx_pinctrl *ipctl;
struct resource *res;
- int ret;
+ int ret, i;
if (!info || !info->pins || !info->npins) {
dev_err(&pdev->dev, "wrong pinctrl info\n");
info->npins, GFP_KERNEL);
if (!info->pin_regs)
return -ENOMEM;
- memset(info->pin_regs, 0xff, sizeof(*info->pin_regs) * info->npins);
+
+ for (i = 0; i < info->npins; i++) {
+ info->pin_regs[i].mux_reg = -1;
+ info->pin_regs[i].conf_reg = -1;
+ }
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
ipctl->base = devm_ioremap_resource(&pdev->dev, res);
.flags = SHARE_MUX_CONF_REG,
};
-static struct of_device_id vf610_pinctrl_of_match[] = {
+static const struct of_device_id vf610_pinctrl_of_match[] = {
{ .compatible = "fsl,vf610-iomuxc", },
{ /* sentinel */ }
};
help
Cherryview/Braswell pinctrl driver provides an interface that
allows configuring of SoC pins and using them as GPIOs.
+
+config PINCTRL_INTEL
+ tristate
+ select PINMUX
+ select PINCONF
+ select GENERIC_PINCONF
+ select GPIOLIB
+ select GPIOLIB_IRQCHIP
+
+config PINCTRL_SUNRISEPOINT
+ tristate "Intel Sunrisepoint pinctrl and GPIO driver"
+ depends on ACPI
+ select PINCTRL_INTEL
+ help
+ Sunrisepoint is the PCH of Intel Skylake. This pinctrl driver
+ provides an interface that allows configuring of PCH pins and
+ using them as GPIOs.
obj-$(CONFIG_PINCTRL_BAYTRAIL) += pinctrl-baytrail.o
obj-$(CONFIG_PINCTRL_CHERRYVIEW) += pinctrl-cherryview.o
+obj-$(CONFIG_PINCTRL_INTEL) += pinctrl-intel.o
+obj-$(CONFIG_PINCTRL_SUNRISEPOINT) += pinctrl-sunrisepoint.o
--- /dev/null
+/*
+ * Intel pinctrl/GPIO core driver.
+ *
+ * Copyright (C) 2015, Intel Corporation
+ * Authors: Mathias Nyman <mathias.nyman@linux.intel.com>
+ * Mika Westerberg <mika.westerberg@linux.intel.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/acpi.h>
+#include <linux/gpio.h>
+#include <linux/gpio/driver.h>
+#include <linux/platform_device.h>
+#include <linux/pm.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinconf-generic.h>
+
+#include "pinctrl-intel.h"
+
+/* Maximum number of pads in each group */
+#define NPADS_IN_GPP 24
+
+/* Offset from regs */
+#define PADBAR 0x00c
+#define GPI_IS 0x100
+#define GPI_GPE_STS 0x140
+#define GPI_GPE_EN 0x160
+
+#define PADOWN_BITS 4
+#define PADOWN_SHIFT(p) ((p) % 8 * PADOWN_BITS)
+#define PADOWN_MASK(p) (0xf << PADOWN_SHIFT(p))
+
+/* Offset from pad_regs */
+#define PADCFG0 0x000
+#define PADCFG0_RXEVCFG_SHIFT 25
+#define PADCFG0_RXEVCFG_MASK (3 << PADCFG0_RXEVCFG_SHIFT)
+#define PADCFG0_RXEVCFG_LEVEL 0
+#define PADCFG0_RXEVCFG_EDGE 1
+#define PADCFG0_RXEVCFG_DISABLED 2
+#define PADCFG0_RXEVCFG_EDGE_BOTH 3
+#define PADCFG0_RXINV BIT(23)
+#define PADCFG0_GPIROUTIOXAPIC BIT(20)
+#define PADCFG0_GPIROUTSCI BIT(19)
+#define PADCFG0_GPIROUTSMI BIT(18)
+#define PADCFG0_GPIROUTNMI BIT(17)
+#define PADCFG0_PMODE_SHIFT 10
+#define PADCFG0_PMODE_MASK (0xf << PADCFG0_PMODE_SHIFT)
+#define PADCFG0_GPIORXDIS BIT(9)
+#define PADCFG0_GPIOTXDIS BIT(8)
+#define PADCFG0_GPIORXSTATE BIT(1)
+#define PADCFG0_GPIOTXSTATE BIT(0)
+
+#define PADCFG1 0x004
+#define PADCFG1_TERM_UP BIT(13)
+#define PADCFG1_TERM_SHIFT 10
+#define PADCFG1_TERM_MASK (7 << PADCFG1_TERM_SHIFT)
+#define PADCFG1_TERM_20K 4
+#define PADCFG1_TERM_2K 3
+#define PADCFG1_TERM_5K 2
+#define PADCFG1_TERM_1K 1
+
+struct intel_pad_context {
+ u32 padcfg0;
+ u32 padcfg1;
+};
+
+struct intel_community_context {
+ u32 *intmask;
+};
+
+struct intel_pinctrl_context {
+ struct intel_pad_context *pads;
+ struct intel_community_context *communities;
+};
+
+/**
+ * struct intel_pinctrl - Intel pinctrl private structure
+ * @dev: Pointer to the device structure
+ * @lock: Lock to serialize register access
+ * @pctldesc: Pin controller description
+ * @pctldev: Pointer to the pin controller device
+ * @chip: GPIO chip in this pin controller
+ * @soc: SoC/PCH specific pin configuration data
+ * @communities: All communities in this pin controller
+ * @ncommunities: Number of communities in this pin controller
+ * @context: Configuration saved over system sleep
+ */
+struct intel_pinctrl {
+ struct device *dev;
+ spinlock_t lock;
+ struct pinctrl_desc pctldesc;
+ struct pinctrl_dev *pctldev;
+ struct gpio_chip chip;
+ const struct intel_pinctrl_soc_data *soc;
+ struct intel_community *communities;
+ size_t ncommunities;
+ struct intel_pinctrl_context context;
+};
+
+#define gpiochip_to_pinctrl(c) container_of(c, struct intel_pinctrl, chip)
+#define pin_to_padno(c, p) ((p) - (c)->pin_base)
+
+static struct intel_community *intel_get_community(struct intel_pinctrl *pctrl,
+ unsigned pin)
+{
+ struct intel_community *community;
+ int i;
+
+ for (i = 0; i < pctrl->ncommunities; i++) {
+ community = &pctrl->communities[i];
+ if (pin >= community->pin_base &&
+ pin < community->pin_base + community->npins)
+ return community;
+ }
+
+ dev_warn(pctrl->dev, "failed to find community for pin %u\n", pin);
+ return NULL;
+}
+
+static void __iomem *intel_get_padcfg(struct intel_pinctrl *pctrl, unsigned pin,
+ unsigned reg)
+{
+ const struct intel_community *community;
+ unsigned padno;
+
+ community = intel_get_community(pctrl, pin);
+ if (!community)
+ return NULL;
+
+ padno = pin_to_padno(community, pin);
+ return community->pad_regs + reg + padno * 8;
+}
+
+static bool intel_pad_owned_by_host(struct intel_pinctrl *pctrl, unsigned pin)
+{
+ const struct intel_community *community;
+ unsigned padno, gpp, gpp_offset, offset;
+ void __iomem *padown;
+
+ community = intel_get_community(pctrl, pin);
+ if (!community)
+ return false;
+ if (!community->padown_offset)
+ return true;
+
+ padno = pin_to_padno(community, pin);
+ gpp = padno / NPADS_IN_GPP;
+ gpp_offset = padno % NPADS_IN_GPP;
+ offset = community->padown_offset + gpp * 16 + (gpp_offset / 8) * 4;
+ padown = community->regs + offset;
+
+ return !(readl(padown) & PADOWN_MASK(padno));
+}
+
+static bool intel_pad_reserved_for_acpi(struct intel_pinctrl *pctrl,
+ unsigned pin)
+{
+ const struct intel_community *community;
+ unsigned padno, gpp, offset;
+ void __iomem *hostown;
+
+ community = intel_get_community(pctrl, pin);
+ if (!community)
+ return true;
+ if (!community->hostown_offset)
+ return false;
+
+ padno = pin_to_padno(community, pin);
+ gpp = padno / NPADS_IN_GPP;
+ offset = community->hostown_offset + gpp * 4;
+ hostown = community->regs + offset;
+
+ return !(readl(hostown) & BIT(padno % NPADS_IN_GPP));
+}
+
+static bool intel_pad_locked(struct intel_pinctrl *pctrl, unsigned pin)
+{
+ struct intel_community *community;
+ unsigned padno, gpp, offset;
+ u32 value;
+
+ community = intel_get_community(pctrl, pin);
+ if (!community)
+ return true;
+ if (!community->padcfglock_offset)
+ return false;
+
+ padno = pin_to_padno(community, pin);
+ gpp = padno / NPADS_IN_GPP;
+
+ /*
+ * If PADCFGLOCK and PADCFGLOCKTX bits are both clear for this pad,
+ * the pad is considered unlocked. Any other case means that it is
+ * either fully or partially locked and we don't touch it.
+ */
+ offset = community->padcfglock_offset + gpp * 8;
+ value = readl(community->regs + offset);
+ if (value & BIT(pin % NPADS_IN_GPP))
+ return true;
+
+ offset = community->padcfglock_offset + 4 + gpp * 8;
+ value = readl(community->regs + offset);
+ if (value & BIT(pin % NPADS_IN_GPP))
+ return true;
+
+ return false;
+}
+
+static bool intel_pad_usable(struct intel_pinctrl *pctrl, unsigned pin)
+{
+ return intel_pad_owned_by_host(pctrl, pin) &&
+ !intel_pad_reserved_for_acpi(pctrl, pin) &&
+ !intel_pad_locked(pctrl, pin);
+}
+
+static int intel_get_groups_count(struct pinctrl_dev *pctldev)
+{
+ struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+
+ return pctrl->soc->ngroups;
+}
+
+static const char *intel_get_group_name(struct pinctrl_dev *pctldev,
+ unsigned group)
+{
+ struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+
+ return pctrl->soc->groups[group].name;
+}
+
+static int intel_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
+ const unsigned **pins, unsigned *npins)
+{
+ struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+
+ *pins = pctrl->soc->groups[group].pins;
+ *npins = pctrl->soc->groups[group].npins;
+ return 0;
+}
+
+static void intel_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
+ unsigned pin)
+{
+ struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+ u32 cfg0, cfg1, mode;
+ bool locked, acpi;
+
+ if (!intel_pad_owned_by_host(pctrl, pin)) {
+ seq_puts(s, "not available");
+ return;
+ }
+
+ cfg0 = readl(intel_get_padcfg(pctrl, pin, PADCFG0));
+ cfg1 = readl(intel_get_padcfg(pctrl, pin, PADCFG1));
+
+ mode = (cfg0 & PADCFG0_PMODE_MASK) >> PADCFG0_PMODE_SHIFT;
+ if (!mode)
+ seq_puts(s, "GPIO ");
+ else
+ seq_printf(s, "mode %d ", mode);
+
+ seq_printf(s, "0x%08x 0x%08x", cfg0, cfg1);
+
+ locked = intel_pad_locked(pctrl, pin);
+ acpi = intel_pad_reserved_for_acpi(pctrl, pin);
+
+ if (locked || acpi) {
+ seq_puts(s, " [");
+ if (locked) {
+ seq_puts(s, "LOCKED");
+ if (acpi)
+ seq_puts(s, ", ");
+ }
+ if (acpi)
+ seq_puts(s, "ACPI");
+ seq_puts(s, "]");
+ }
+}
+
+static const struct pinctrl_ops intel_pinctrl_ops = {
+ .get_groups_count = intel_get_groups_count,
+ .get_group_name = intel_get_group_name,
+ .get_group_pins = intel_get_group_pins,
+ .pin_dbg_show = intel_pin_dbg_show,
+};
+
+static int intel_get_functions_count(struct pinctrl_dev *pctldev)
+{
+ struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+
+ return pctrl->soc->nfunctions;
+}
+
+static const char *intel_get_function_name(struct pinctrl_dev *pctldev,
+ unsigned function)
+{
+ struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+
+ return pctrl->soc->functions[function].name;
+}
+
+static int intel_get_function_groups(struct pinctrl_dev *pctldev,
+ unsigned function,
+ const char * const **groups,
+ unsigned * const ngroups)
+{
+ struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+
+ *groups = pctrl->soc->functions[function].groups;
+ *ngroups = pctrl->soc->functions[function].ngroups;
+ return 0;
+}
+
+static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned function,
+ unsigned group)
+{
+ struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+ const struct intel_pingroup *grp = &pctrl->soc->groups[group];
+ unsigned long flags;
+ int i;
+
+ spin_lock_irqsave(&pctrl->lock, flags);
+
+ /*
+ * All pins in the groups needs to be accessible and writable
+ * before we can enable the mux for this group.
+ */
+ for (i = 0; i < grp->npins; i++) {
+ if (!intel_pad_usable(pctrl, grp->pins[i])) {
+ spin_unlock_irqrestore(&pctrl->lock, flags);
+ return -EBUSY;
+ }
+ }
+
+ /* Now enable the mux setting for each pin in the group */
+ for (i = 0; i < grp->npins; i++) {
+ void __iomem *padcfg0;
+ u32 value;
+
+ padcfg0 = intel_get_padcfg(pctrl, grp->pins[i], PADCFG0);
+ value = readl(padcfg0);
+
+ value &= ~PADCFG0_PMODE_MASK;
+ value |= grp->mode << PADCFG0_PMODE_SHIFT;
+
+ writel(value, padcfg0);
+ }
+
+ spin_unlock_irqrestore(&pctrl->lock, flags);
+
+ return 0;
+}
+
+static int intel_gpio_request_enable(struct pinctrl_dev *pctldev,
+ struct pinctrl_gpio_range *range,
+ unsigned pin)
+{
+ struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+ void __iomem *padcfg0;
+ unsigned long flags;
+ u32 value;
+
+ spin_lock_irqsave(&pctrl->lock, flags);
+
+ if (!intel_pad_usable(pctrl, pin)) {
+ spin_unlock_irqrestore(&pctrl->lock, flags);
+ return -EBUSY;
+ }
+
+ padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0);
+ /* Put the pad into GPIO mode */
+ value = readl(padcfg0) & ~PADCFG0_PMODE_MASK;
+ /* Disable SCI/SMI/NMI generation */
+ value &= ~(PADCFG0_GPIROUTIOXAPIC | PADCFG0_GPIROUTSCI);
+ value &= ~(PADCFG0_GPIROUTSMI | PADCFG0_GPIROUTNMI);
+ /* Disable TX buffer and enable RX (this will be input) */
+ value &= ~PADCFG0_GPIORXDIS;
+ value |= PADCFG0_GPIOTXDIS;
+ writel(value, padcfg0);
+
+ spin_unlock_irqrestore(&pctrl->lock, flags);
+
+ return 0;
+}
+
+static int intel_gpio_set_direction(struct pinctrl_dev *pctldev,
+ struct pinctrl_gpio_range *range,
+ unsigned pin, bool input)
+{
+ struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+ void __iomem *padcfg0;
+ unsigned long flags;
+ u32 value;
+
+ spin_lock_irqsave(&pctrl->lock, flags);
+
+ padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0);
+
+ value = readl(padcfg0);
+ if (input)
+ value |= PADCFG0_GPIOTXDIS;
+ else
+ value &= ~PADCFG0_GPIOTXDIS;
+ writel(value, padcfg0);
+
+ spin_unlock_irqrestore(&pctrl->lock, flags);
+
+ return 0;
+}
+
+static const struct pinmux_ops intel_pinmux_ops = {
+ .get_functions_count = intel_get_functions_count,
+ .get_function_name = intel_get_function_name,
+ .get_function_groups = intel_get_function_groups,
+ .set_mux = intel_pinmux_set_mux,
+ .gpio_request_enable = intel_gpio_request_enable,
+ .gpio_set_direction = intel_gpio_set_direction,
+};
+
+static int intel_config_get(struct pinctrl_dev *pctldev, unsigned pin,
+ unsigned long *config)
+{
+ struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+ enum pin_config_param param = pinconf_to_config_param(*config);
+ u32 value, term;
+ u16 arg = 0;
+
+ if (!intel_pad_owned_by_host(pctrl, pin))
+ return -ENOTSUPP;
+
+ value = readl(intel_get_padcfg(pctrl, pin, PADCFG1));
+ term = (value & PADCFG1_TERM_MASK) >> PADCFG1_TERM_SHIFT;
+
+ switch (param) {
+ case PIN_CONFIG_BIAS_DISABLE:
+ if (term)
+ return -EINVAL;
+ break;
+
+ case PIN_CONFIG_BIAS_PULL_UP:
+ if (!term || !(value & PADCFG1_TERM_UP))
+ return -EINVAL;
+
+ switch (term) {
+ case PADCFG1_TERM_1K:
+ arg = 1000;
+ break;
+ case PADCFG1_TERM_2K:
+ arg = 2000;
+ break;
+ case PADCFG1_TERM_5K:
+ arg = 5000;
+ break;
+ case PADCFG1_TERM_20K:
+ arg = 20000;
+ break;
+ }
+
+ break;
+
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ if (!term || value & PADCFG1_TERM_UP)
+ return -EINVAL;
+
+ switch (term) {
+ case PADCFG1_TERM_5K:
+ arg = 5000;
+ break;
+ case PADCFG1_TERM_20K:
+ arg = 20000;
+ break;
+ }
+
+ break;
+
+ default:
+ return -ENOTSUPP;
+ }
+
+ *config = pinconf_to_config_packed(param, arg);
+ return 0;
+}
+
+static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned pin,
+ unsigned long config)
+{
+ unsigned param = pinconf_to_config_param(config);
+ unsigned arg = pinconf_to_config_argument(config);
+ void __iomem *padcfg1;
+ unsigned long flags;
+ int ret = 0;
+ u32 value;
+
+ spin_lock_irqsave(&pctrl->lock, flags);
+
+ padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1);
+ value = readl(padcfg1);
+
+ switch (param) {
+ case PIN_CONFIG_BIAS_DISABLE:
+ value &= ~(PADCFG1_TERM_MASK | PADCFG1_TERM_UP);
+ break;
+
+ case PIN_CONFIG_BIAS_PULL_UP:
+ value &= ~PADCFG1_TERM_MASK;
+
+ value |= PADCFG1_TERM_UP;
+
+ switch (arg) {
+ case 20000:
+ value |= PADCFG1_TERM_20K << PADCFG1_TERM_SHIFT;
+ break;
+ case 5000:
+ value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT;
+ break;
+ case 2000:
+ value |= PADCFG1_TERM_2K << PADCFG1_TERM_SHIFT;
+ break;
+ case 1000:
+ value |= PADCFG1_TERM_1K << PADCFG1_TERM_SHIFT;
+ break;
+ default:
+ ret = -EINVAL;
+ }
+
+ break;
+
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ value &= ~(PADCFG1_TERM_UP | PADCFG1_TERM_MASK);
+
+ switch (arg) {
+ case 20000:
+ value |= PADCFG1_TERM_20K << PADCFG1_TERM_SHIFT;
+ break;
+ case 5000:
+ value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT;
+ break;
+ default:
+ ret = -EINVAL;
+ }
+
+ break;
+ }
+
+ if (!ret)
+ writel(value, padcfg1);
+
+ spin_unlock_irqrestore(&pctrl->lock, flags);
+
+ return ret;
+}
+
+static int intel_config_set(struct pinctrl_dev *pctldev, unsigned pin,
+ unsigned long *configs, unsigned nconfigs)
+{
+ struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+ int i, ret;
+
+ if (!intel_pad_usable(pctrl, pin))
+ return -ENOTSUPP;
+
+ for (i = 0; i < nconfigs; i++) {
+ switch (pinconf_to_config_param(configs[i])) {
+ case PIN_CONFIG_BIAS_DISABLE:
+ case PIN_CONFIG_BIAS_PULL_UP:
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ ret = intel_config_set_pull(pctrl, pin, configs[i]);
+ if (ret)
+ return ret;
+ break;
+
+ default:
+ return -ENOTSUPP;
+ }
+ }
+
+ return 0;
+}
+
+static const struct pinconf_ops intel_pinconf_ops = {
+ .is_generic = true,
+ .pin_config_get = intel_config_get,
+ .pin_config_set = intel_config_set,
+};
+
+static const struct pinctrl_desc intel_pinctrl_desc = {
+ .pctlops = &intel_pinctrl_ops,
+ .pmxops = &intel_pinmux_ops,
+ .confops = &intel_pinconf_ops,
+ .owner = THIS_MODULE,
+};
+
+static int intel_gpio_request(struct gpio_chip *chip, unsigned offset)
+{
+ return pinctrl_request_gpio(chip->base + offset);
+}
+
+static void intel_gpio_free(struct gpio_chip *chip, unsigned offset)
+{
+ pinctrl_free_gpio(chip->base + offset);
+}
+
+static int intel_gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+ struct intel_pinctrl *pctrl = gpiochip_to_pinctrl(chip);
+ void __iomem *reg;
+
+ reg = intel_get_padcfg(pctrl, offset, PADCFG0);
+ if (!reg)
+ return -EINVAL;
+
+ return !!(readl(reg) & PADCFG0_GPIORXSTATE);
+}
+
+static void intel_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+ struct intel_pinctrl *pctrl = gpiochip_to_pinctrl(chip);
+ void __iomem *reg;
+
+ reg = intel_get_padcfg(pctrl, offset, PADCFG0);
+ if (reg) {
+ unsigned long flags;
+ u32 padcfg0;
+
+ spin_lock_irqsave(&pctrl->lock, flags);
+ padcfg0 = readl(reg);
+ if (value)
+ padcfg0 |= PADCFG0_GPIOTXSTATE;
+ else
+ padcfg0 &= ~PADCFG0_GPIOTXSTATE;
+ writel(padcfg0, reg);
+ spin_unlock_irqrestore(&pctrl->lock, flags);
+ }
+}
+
+static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
+{
+ return pinctrl_gpio_direction_input(chip->base + offset);
+}
+
+static int intel_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
+ int value)
+{
+ intel_gpio_set(chip, offset, value);
+ return pinctrl_gpio_direction_output(chip->base + offset);
+}
+
+static const struct gpio_chip intel_gpio_chip = {
+ .owner = THIS_MODULE,
+ .request = intel_gpio_request,
+ .free = intel_gpio_free,
+ .direction_input = intel_gpio_direction_input,
+ .direction_output = intel_gpio_direction_output,
+ .get = intel_gpio_get,
+ .set = intel_gpio_set,
+};
+
+static void intel_gpio_irq_ack(struct irq_data *d)
+{
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct intel_pinctrl *pctrl = gpiochip_to_pinctrl(gc);
+ const struct intel_community *community;
+ unsigned pin = irqd_to_hwirq(d);
+
+ spin_lock(&pctrl->lock);
+
+ community = intel_get_community(pctrl, pin);
+ if (community) {
+ unsigned padno = pin_to_padno(community, pin);
+ unsigned gpp_offset = padno % NPADS_IN_GPP;
+ unsigned gpp = padno / NPADS_IN_GPP;
+
+ writel(BIT(gpp_offset), community->regs + GPI_IS + gpp * 4);
+ }
+
+ spin_unlock(&pctrl->lock);
+}
+
+static void intel_gpio_irq_mask_unmask(struct irq_data *d, bool mask)
+{
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct intel_pinctrl *pctrl = gpiochip_to_pinctrl(gc);
+ const struct intel_community *community;
+ unsigned pin = irqd_to_hwirq(d);
+ unsigned long flags;
+
+ spin_lock_irqsave(&pctrl->lock, flags);
+
+ community = intel_get_community(pctrl, pin);
+ if (community) {
+ unsigned padno = pin_to_padno(community, pin);
+ unsigned gpp_offset = padno % NPADS_IN_GPP;
+ unsigned gpp = padno / NPADS_IN_GPP;
+ void __iomem *reg;
+ u32 value;
+
+ reg = community->regs + community->ie_offset + gpp * 4;
+ value = readl(reg);
+ if (mask)
+ value &= ~BIT(gpp_offset);
+ else
+ value |= BIT(gpp_offset);
+ writel(value, reg);
+ }
+
+ spin_unlock_irqrestore(&pctrl->lock, flags);
+}
+
+static void intel_gpio_irq_mask(struct irq_data *d)
+{
+ intel_gpio_irq_mask_unmask(d, true);
+}
+
+static void intel_gpio_irq_unmask(struct irq_data *d)
+{
+ intel_gpio_irq_mask_unmask(d, false);
+}
+
+static int intel_gpio_irq_type(struct irq_data *d, unsigned type)
+{
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct intel_pinctrl *pctrl = gpiochip_to_pinctrl(gc);
+ unsigned pin = irqd_to_hwirq(d);
+ unsigned long flags;
+ void __iomem *reg;
+ u32 value;
+
+ reg = intel_get_padcfg(pctrl, pin, PADCFG0);
+ if (!reg)
+ return -EINVAL;
+
+ spin_lock_irqsave(&pctrl->lock, flags);
+
+ value = readl(reg);
+
+ value &= ~(PADCFG0_RXEVCFG_MASK | PADCFG0_RXINV);
+
+ if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
+ value |= PADCFG0_RXEVCFG_EDGE_BOTH << PADCFG0_RXEVCFG_SHIFT;
+ } else if (type & IRQ_TYPE_EDGE_FALLING) {
+ value |= PADCFG0_RXEVCFG_EDGE << PADCFG0_RXEVCFG_SHIFT;
+ value |= PADCFG0_RXINV;
+ } else if (type & IRQ_TYPE_EDGE_RISING) {
+ value |= PADCFG0_RXEVCFG_EDGE << PADCFG0_RXEVCFG_SHIFT;
+ } else if (type & IRQ_TYPE_LEVEL_LOW) {
+ value |= PADCFG0_RXINV;
+ } else {
+ value |= PADCFG0_RXEVCFG_DISABLED << PADCFG0_RXEVCFG_SHIFT;
+ }
+
+ writel(value, reg);
+
+ if (type & IRQ_TYPE_EDGE_BOTH)
+ __irq_set_handler_locked(d->irq, handle_edge_irq);
+ else if (type & IRQ_TYPE_LEVEL_MASK)
+ __irq_set_handler_locked(d->irq, handle_level_irq);
+
+ spin_unlock_irqrestore(&pctrl->lock, flags);
+
+ return 0;
+}
+
+static int intel_gpio_irq_wake(struct irq_data *d, unsigned int on)
+{
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct intel_pinctrl *pctrl = gpiochip_to_pinctrl(gc);
+ const struct intel_community *community;
+ unsigned pin = irqd_to_hwirq(d);
+ unsigned padno, gpp, gpp_offset;
+ u32 gpe_en;
+
+ community = intel_get_community(pctrl, pin);
+ if (!community)
+ return -EINVAL;
+
+ padno = pin_to_padno(community, pin);
+ gpp = padno / NPADS_IN_GPP;
+ gpp_offset = padno % NPADS_IN_GPP;
+
+ /* Clear the existing wake status */
+ writel(BIT(gpp_offset), community->regs + GPI_GPE_STS + gpp * 4);
+
+ /*
+ * The controller will generate wake when GPE of the corresponding
+ * pad is enabled and it is not routed to SCI (GPIROUTSCI is not
+ * set).
+ */
+ gpe_en = readl(community->regs + GPI_GPE_EN + gpp * 4);
+ if (on)
+ gpe_en |= BIT(gpp_offset);
+ else
+ gpe_en &= ~BIT(gpp_offset);
+ writel(gpe_en, community->regs + GPI_GPE_EN + gpp * 4);
+
+ dev_dbg(pctrl->dev, "%sable wake for pin %u\n", on ? "en" : "dis", pin);
+ return 0;
+}
+
+static void intel_gpio_community_irq_handler(struct gpio_chip *gc,
+ const struct intel_community *community)
+{
+ int gpp;
+
+ for (gpp = 0; gpp < community->ngpps; gpp++) {
+ unsigned long pending, enabled, gpp_offset;
+
+ pending = readl(community->regs + GPI_IS + gpp * 4);
+ enabled = readl(community->regs + community->ie_offset +
+ gpp * 4);
+
+ /* Only interrupts that are enabled */
+ pending &= enabled;
+
+ for_each_set_bit(gpp_offset, &pending, NPADS_IN_GPP) {
+ unsigned padno, irq;
+
+ /*
+ * The last group in community can have less pins
+ * than NPADS_IN_GPP.
+ */
+ padno = gpp_offset + gpp * NPADS_IN_GPP;
+ if (padno >= community->npins)
+ break;
+
+ irq = irq_find_mapping(gc->irqdomain,
+ community->pin_base + padno);
+ generic_handle_irq(irq);
+ }
+ }
+}
+
+static void intel_gpio_irq_handler(unsigned irq, struct irq_desc *desc)
+{
+ struct gpio_chip *gc = irq_desc_get_handler_data(desc);
+ struct intel_pinctrl *pctrl = gpiochip_to_pinctrl(gc);
+ struct irq_chip *chip = irq_get_chip(irq);
+ int i;
+
+ chained_irq_enter(chip, desc);
+
+ /* Need to check all communities for pending interrupts */
+ for (i = 0; i < pctrl->ncommunities; i++)
+ intel_gpio_community_irq_handler(gc, &pctrl->communities[i]);
+
+ chained_irq_exit(chip, desc);
+}
+
+static struct irq_chip intel_gpio_irqchip = {
+ .name = "intel-gpio",
+ .irq_ack = intel_gpio_irq_ack,
+ .irq_mask = intel_gpio_irq_mask,
+ .irq_unmask = intel_gpio_irq_unmask,
+ .irq_set_type = intel_gpio_irq_type,
+ .irq_set_wake = intel_gpio_irq_wake,
+};
+
+static void intel_gpio_irq_init(struct intel_pinctrl *pctrl)
+{
+ size_t i;
+
+ for (i = 0; i < pctrl->ncommunities; i++) {
+ const struct intel_community *community;
+ void __iomem *base;
+ unsigned gpp;
+
+ community = &pctrl->communities[i];
+ base = community->regs;
+
+ for (gpp = 0; gpp < community->ngpps; gpp++) {
+ /* Mask and clear all interrupts */
+ writel(0, base + community->ie_offset + gpp * 4);
+ writel(0xffff, base + GPI_IS + gpp * 4);
+ }
+ }
+}
+
+static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
+{
+ int ret;
+
+ pctrl->chip = intel_gpio_chip;
+
+ pctrl->chip.ngpio = pctrl->soc->npins;
+ pctrl->chip.label = dev_name(pctrl->dev);
+ pctrl->chip.dev = pctrl->dev;
+ pctrl->chip.base = -1;
+
+ ret = gpiochip_add(&pctrl->chip);
+ if (ret) {
+ dev_err(pctrl->dev, "failed to register gpiochip\n");
+ return ret;
+ }
+
+ ret = gpiochip_add_pin_range(&pctrl->chip, dev_name(pctrl->dev),
+ 0, 0, pctrl->soc->npins);
+ if (ret) {
+ dev_err(pctrl->dev, "failed to add GPIO pin range\n");
+ gpiochip_remove(&pctrl->chip);
+ return ret;
+ }
+
+ ret = gpiochip_irqchip_add(&pctrl->chip, &intel_gpio_irqchip, 0,
+ handle_simple_irq, IRQ_TYPE_NONE);
+ if (ret) {
+ dev_err(pctrl->dev, "failed to add irqchip\n");
+ gpiochip_remove(&pctrl->chip);
+ return ret;
+ }
+
+ gpiochip_set_chained_irqchip(&pctrl->chip, &intel_gpio_irqchip, irq,
+ intel_gpio_irq_handler);
+ return 0;
+}
+
+static int intel_pinctrl_pm_init(struct intel_pinctrl *pctrl)
+{
+#ifdef CONFIG_PM_SLEEP
+ const struct intel_pinctrl_soc_data *soc = pctrl->soc;
+ struct intel_community_context *communities;
+ struct intel_pad_context *pads;
+ int i;
+
+ pads = devm_kcalloc(pctrl->dev, soc->npins, sizeof(*pads), GFP_KERNEL);
+ if (!pads)
+ return -ENOMEM;
+
+ communities = devm_kcalloc(pctrl->dev, pctrl->ncommunities,
+ sizeof(*communities), GFP_KERNEL);
+ if (!communities)
+ return -ENOMEM;
+
+
+ for (i = 0; i < pctrl->ncommunities; i++) {
+ struct intel_community *community = &pctrl->communities[i];
+ u32 *intmask;
+
+ intmask = devm_kcalloc(pctrl->dev, community->ngpps,
+ sizeof(*intmask), GFP_KERNEL);
+ if (!intmask)
+ return -ENOMEM;
+
+ communities[i].intmask = intmask;
+ }
+
+ pctrl->context.pads = pads;
+ pctrl->context.communities = communities;
+#endif
+
+ return 0;
+}
+
+int intel_pinctrl_probe(struct platform_device *pdev,
+ const struct intel_pinctrl_soc_data *soc_data)
+{
+ struct intel_pinctrl *pctrl;
+ int i, ret, irq;
+
+ if (!soc_data)
+ return -EINVAL;
+
+ pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
+ if (!pctrl)
+ return -ENOMEM;
+
+ pctrl->dev = &pdev->dev;
+ pctrl->soc = soc_data;
+ spin_lock_init(&pctrl->lock);
+
+ /*
+ * Make a copy of the communities which we can use to hold pointers
+ * to the registers.
+ */
+ pctrl->ncommunities = pctrl->soc->ncommunities;
+ pctrl->communities = devm_kcalloc(&pdev->dev, pctrl->ncommunities,
+ sizeof(*pctrl->communities), GFP_KERNEL);
+ if (!pctrl->communities)
+ return -ENOMEM;
+
+ for (i = 0; i < pctrl->ncommunities; i++) {
+ struct intel_community *community = &pctrl->communities[i];
+ struct resource *res;
+ void __iomem *regs;
+ u32 padbar;
+
+ *community = pctrl->soc->communities[i];
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM,
+ community->barno);
+ regs = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(regs))
+ return PTR_ERR(regs);
+
+ /* Read offset of the pad configuration registers */
+ padbar = readl(regs + PADBAR);
+
+ community->regs = regs;
+ community->pad_regs = regs + padbar;
+ community->ngpps = DIV_ROUND_UP(community->npins, NPADS_IN_GPP);
+ }
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+ dev_err(&pdev->dev, "failed to get interrupt number\n");
+ return irq;
+ }
+
+ ret = intel_pinctrl_pm_init(pctrl);
+ if (ret)
+ return ret;
+
+ pctrl->pctldesc = intel_pinctrl_desc;
+ pctrl->pctldesc.name = dev_name(&pdev->dev);
+ pctrl->pctldesc.pins = pctrl->soc->pins;
+ pctrl->pctldesc.npins = pctrl->soc->npins;
+
+ pctrl->pctldev = pinctrl_register(&pctrl->pctldesc, &pdev->dev, pctrl);
+ if (!pctrl->pctldev) {
+ dev_err(&pdev->dev, "failed to register pinctrl driver\n");
+ return -ENODEV;
+ }
+
+ ret = intel_gpio_probe(pctrl, irq);
+ if (ret) {
+ pinctrl_unregister(pctrl->pctldev);
+ return ret;
+ }
+
+ platform_set_drvdata(pdev, pctrl);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(intel_pinctrl_probe);
+
+int intel_pinctrl_remove(struct platform_device *pdev)
+{
+ struct intel_pinctrl *pctrl = platform_get_drvdata(pdev);
+
+ gpiochip_remove(&pctrl->chip);
+ pinctrl_unregister(pctrl->pctldev);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(intel_pinctrl_remove);
+
+#ifdef CONFIG_PM_SLEEP
+int intel_pinctrl_suspend(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct intel_pinctrl *pctrl = platform_get_drvdata(pdev);
+ struct intel_community_context *communities;
+ struct intel_pad_context *pads;
+ int i;
+
+ pads = pctrl->context.pads;
+ for (i = 0; i < pctrl->soc->npins; i++) {
+ const struct pinctrl_pin_desc *desc = &pctrl->soc->pins[i];
+ u32 val;
+
+ if (!intel_pad_usable(pctrl, desc->number))
+ continue;
+
+ val = readl(intel_get_padcfg(pctrl, desc->number, PADCFG0));
+ pads[i].padcfg0 = val & ~PADCFG0_GPIORXSTATE;
+ val = readl(intel_get_padcfg(pctrl, desc->number, PADCFG1));
+ pads[i].padcfg1 = val;
+ }
+
+ communities = pctrl->context.communities;
+ for (i = 0; i < pctrl->ncommunities; i++) {
+ struct intel_community *community = &pctrl->communities[i];
+ void __iomem *base;
+ unsigned gpp;
+
+ base = community->regs + community->ie_offset;
+ for (gpp = 0; gpp < community->ngpps; gpp++)
+ communities[i].intmask[gpp] = readl(base + gpp * 4);
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(intel_pinctrl_suspend);
+
+int intel_pinctrl_resume(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct intel_pinctrl *pctrl = platform_get_drvdata(pdev);
+ const struct intel_community_context *communities;
+ const struct intel_pad_context *pads;
+ int i;
+
+ /* Mask all interrupts */
+ intel_gpio_irq_init(pctrl);
+
+ pads = pctrl->context.pads;
+ for (i = 0; i < pctrl->soc->npins; i++) {
+ const struct pinctrl_pin_desc *desc = &pctrl->soc->pins[i];
+ void __iomem *padcfg;
+ u32 val;
+
+ if (!intel_pad_usable(pctrl, desc->number))
+ continue;
+
+ padcfg = intel_get_padcfg(pctrl, desc->number, PADCFG0);
+ val = readl(padcfg) & ~PADCFG0_GPIORXSTATE;
+ if (val != pads[i].padcfg0) {
+ writel(pads[i].padcfg0, padcfg);
+ dev_dbg(dev, "restored pin %u padcfg0 %#08x\n",
+ desc->number, readl(padcfg));
+ }
+
+ padcfg = intel_get_padcfg(pctrl, desc->number, PADCFG1);
+ val = readl(padcfg);
+ if (val != pads[i].padcfg1) {
+ writel(pads[i].padcfg1, padcfg);
+ dev_dbg(dev, "restored pin %u padcfg1 %#08x\n",
+ desc->number, readl(padcfg));
+ }
+ }
+
+ communities = pctrl->context.communities;
+ for (i = 0; i < pctrl->ncommunities; i++) {
+ struct intel_community *community = &pctrl->communities[i];
+ void __iomem *base;
+ unsigned gpp;
+
+ base = community->regs + community->ie_offset;
+ for (gpp = 0; gpp < community->ngpps; gpp++) {
+ writel(communities[i].intmask[gpp], base + gpp * 4);
+ dev_dbg(dev, "restored mask %d/%u %#08x\n", i, gpp,
+ readl(base + gpp * 4));
+ }
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(intel_pinctrl_resume);
+#endif
+
+MODULE_AUTHOR("Mathias Nyman <mathias.nyman@linux.intel.com>");
+MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
+MODULE_DESCRIPTION("Intel pinctrl/GPIO core driver");
+MODULE_LICENSE("GPL v2");
--- /dev/null
+/*
+ * Core pinctrl/GPIO driver for Intel GPIO controllers
+ *
+ * Copyright (C) 2015, Intel Corporation
+ * Authors: Mathias Nyman <mathias.nyman@linux.intel.com>
+ * Mika Westerberg <mika.westerberg@linux.intel.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef PINCTRL_INTEL_H
+#define PINCTRL_INTEL_H
+
+struct pinctrl_pin_desc;
+struct platform_device;
+struct device;
+
+/**
+ * struct intel_pingroup - Description about group of pins
+ * @name: Name of the groups
+ * @pins: All pins in this group
+ * @npins: Number of pins in this groups
+ * @mode: Native mode in which the group is muxed out @pins
+ */
+struct intel_pingroup {
+ const char *name;
+ const unsigned *pins;
+ size_t npins;
+ unsigned short mode;
+};
+
+/**
+ * struct intel_function - Description about a function
+ * @name: Name of the function
+ * @groups: An array of groups for this function
+ * @ngroups: Number of groups in @groups
+ */
+struct intel_function {
+ const char *name;
+ const char * const *groups;
+ size_t ngroups;
+};
+
+/**
+ * struct intel_community - Intel pin community description
+ * @barno: MMIO BAR number where registers for this community reside
+ * @padown_offset: Register offset of PAD_OWN register from @regs. If %0
+ * then there is no support for owner.
+ * @padcfglock_offset: Register offset of PADCFGLOCK from @regs. If %0 then
+ * locking is not supported.
+ * @hostown_offset: Register offset of HOSTSW_OWN from @regs. If %0 then it
+ * is assumed that the host owns the pin (rather than
+ * ACPI).
+ * @ie_offset: Register offset of GPI_IE from @regs.
+ * @pin_base: Starting pin of pins in this community
+ * @npins: Number of pins in this community
+ * @regs: Community specific common registers (reserved for core driver)
+ * @pad_regs: Community specific pad registers (reserved for core driver)
+ * @ngpps: Number of groups (hw groups) in this community (reserved for
+ * core driver)
+ */
+struct intel_community {
+ unsigned barno;
+ unsigned padown_offset;
+ unsigned padcfglock_offset;
+ unsigned hostown_offset;
+ unsigned ie_offset;
+ unsigned pin_base;
+ size_t npins;
+ void __iomem *regs;
+ void __iomem *pad_regs;
+ size_t ngpps;
+};
+
+#define PIN_GROUP(n, p, m) \
+ { \
+ .name = (n), \
+ .pins = (p), \
+ .npins = ARRAY_SIZE((p)), \
+ .mode = (m), \
+ }
+
+#define FUNCTION(n, g) \
+ { \
+ .name = (n), \
+ .groups = (g), \
+ .ngroups = ARRAY_SIZE((g)), \
+ }
+
+/**
+ * struct intel_pinctrl_soc_data - Intel pin controller per-SoC configuration
+ * @uid: ACPI _UID for the probe driver use if needed
+ * @pins: Array if pins this pinctrl controls
+ * @npins: Number of pins in the array
+ * @groups: Array of pin groups
+ * @ngroups: Number of groups in the array
+ * @functions: Array of functions
+ * @nfunctions: Number of functions in the array
+ * @communities: Array of communities this pinctrl handles
+ * @ncommunities: Number of communities in the array
+ *
+ * The @communities is used as a template by the core driver. It will make
+ * copy of all communities and fill in rest of the information.
+ */
+struct intel_pinctrl_soc_data {
+ const char *uid;
+ const struct pinctrl_pin_desc *pins;
+ size_t npins;
+ const struct intel_pingroup *groups;
+ size_t ngroups;
+ const struct intel_function *functions;
+ size_t nfunctions;
+ const struct intel_community *communities;
+ size_t ncommunities;
+};
+
+int intel_pinctrl_probe(struct platform_device *pdev,
+ const struct intel_pinctrl_soc_data *soc_data);
+int intel_pinctrl_remove(struct platform_device *pdev);
+
+#ifdef CONFIG_PM_SLEEP
+int intel_pinctrl_suspend(struct device *dev);
+int intel_pinctrl_resume(struct device *dev);
+#endif
+
+#endif /* PINCTRL_INTEL_H */
--- /dev/null
+/*
+ * Intel Sunrisepoint PCH pinctrl/GPIO driver
+ *
+ * Copyright (C) 2015, Intel Corporation
+ * Authors: Mathias Nyman <mathias.nyman@linux.intel.com>
+ * Mika Westerberg <mika.westerberg@linux.intel.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/acpi.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/pm.h>
+#include <linux/pinctrl/pinctrl.h>
+
+#include "pinctrl-intel.h"
+
+#define SPT_PAD_OWN 0x020
+#define SPT_PADCFGLOCK 0x0a0
+#define SPT_HOSTSW_OWN 0x0d0
+#define SPT_GPI_IE 0x120
+
+#define SPT_COMMUNITY(b, s, e) \
+ { \
+ .barno = (b), \
+ .padown_offset = SPT_PAD_OWN, \
+ .padcfglock_offset = SPT_PADCFGLOCK, \
+ .hostown_offset = SPT_HOSTSW_OWN, \
+ .ie_offset = SPT_GPI_IE, \
+ .pin_base = (s), \
+ .npins = ((e) - (s) + 1), \
+ }
+
+/* Sunrisepoint-LP */
+static const struct pinctrl_pin_desc sptlp_pins[] = {
+ /* GPP_A */
+ PINCTRL_PIN(0, "RCINB"),
+ PINCTRL_PIN(1, "LAD_0"),
+ PINCTRL_PIN(2, "LAD_1"),
+ PINCTRL_PIN(3, "LAD_2"),
+ PINCTRL_PIN(4, "LAD_3"),
+ PINCTRL_PIN(5, "LFRAMEB"),
+ PINCTRL_PIN(6, "SERIQ"),
+ PINCTRL_PIN(7, "PIRQAB"),
+ PINCTRL_PIN(8, "CLKRUNB"),
+ PINCTRL_PIN(9, "CLKOUT_LPC_0"),
+ PINCTRL_PIN(10, "CLKOUT_LPC_1"),
+ PINCTRL_PIN(11, "PMEB"),
+ PINCTRL_PIN(12, "BM_BUSYB"),
+ PINCTRL_PIN(13, "SUSWARNB_SUS_PWRDNACK"),
+ PINCTRL_PIN(14, "SUS_STATB"),
+ PINCTRL_PIN(15, "SUSACKB"),
+ PINCTRL_PIN(16, "SD_1P8_SEL"),
+ PINCTRL_PIN(17, "SD_PWR_EN_B"),
+ PINCTRL_PIN(18, "ISH_GP_0"),
+ PINCTRL_PIN(19, "ISH_GP_1"),
+ PINCTRL_PIN(20, "ISH_GP_2"),
+ PINCTRL_PIN(21, "ISH_GP_3"),
+ PINCTRL_PIN(22, "ISH_GP_4"),
+ PINCTRL_PIN(23, "ISH_GP_5"),
+ /* GPP_B */
+ PINCTRL_PIN(24, "CORE_VID_0"),
+ PINCTRL_PIN(25, "CORE_VID_1"),
+ PINCTRL_PIN(26, "VRALERTB"),
+ PINCTRL_PIN(27, "CPU_GP_2"),
+ PINCTRL_PIN(28, "CPU_GP_3"),
+ PINCTRL_PIN(29, "SRCCLKREQB_0"),
+ PINCTRL_PIN(30, "SRCCLKREQB_1"),
+ PINCTRL_PIN(31, "SRCCLKREQB_2"),
+ PINCTRL_PIN(32, "SRCCLKREQB_3"),
+ PINCTRL_PIN(33, "SRCCLKREQB_4"),
+ PINCTRL_PIN(34, "SRCCLKREQB_5"),
+ PINCTRL_PIN(35, "EXT_PWR_GATEB"),
+ PINCTRL_PIN(36, "SLP_S0B"),
+ PINCTRL_PIN(37, "PLTRSTB"),
+ PINCTRL_PIN(38, "SPKR"),
+ PINCTRL_PIN(39, "GSPI0_CSB"),
+ PINCTRL_PIN(40, "GSPI0_CLK"),
+ PINCTRL_PIN(41, "GSPI0_MISO"),
+ PINCTRL_PIN(42, "GSPI0_MOSI"),
+ PINCTRL_PIN(43, "GSPI1_CSB"),
+ PINCTRL_PIN(44, "GSPI1_CLK"),
+ PINCTRL_PIN(45, "GSPI1_MISO"),
+ PINCTRL_PIN(46, "GSPI1_MOSI"),
+ PINCTRL_PIN(47, "SML1ALERTB"),
+ /* GPP_C */
+ PINCTRL_PIN(48, "SMBCLK"),
+ PINCTRL_PIN(49, "SMBDATA"),
+ PINCTRL_PIN(50, "SMBALERTB"),
+ PINCTRL_PIN(51, "SML0CLK"),
+ PINCTRL_PIN(52, "SML0DATA"),
+ PINCTRL_PIN(53, "SML0ALERTB"),
+ PINCTRL_PIN(54, "SML1CLK"),
+ PINCTRL_PIN(55, "SML1DATA"),
+ PINCTRL_PIN(56, "UART0_RXD"),
+ PINCTRL_PIN(57, "UART0_TXD"),
+ PINCTRL_PIN(58, "UART0_RTSB"),
+ PINCTRL_PIN(59, "UART0_CTSB"),
+ PINCTRL_PIN(60, "UART1_RXD"),
+ PINCTRL_PIN(61, "UART1_TXD"),
+ PINCTRL_PIN(62, "UART1_RTSB"),
+ PINCTRL_PIN(63, "UART1_CTSB"),
+ PINCTRL_PIN(64, "I2C0_SDA"),
+ PINCTRL_PIN(65, "I2C0_SCL"),
+ PINCTRL_PIN(66, "I2C1_SDA"),
+ PINCTRL_PIN(67, "I2C1_SCL"),
+ PINCTRL_PIN(68, "UART2_RXD"),
+ PINCTRL_PIN(69, "UART2_TXD"),
+ PINCTRL_PIN(70, "UART2_RTSB"),
+ PINCTRL_PIN(71, "UART2_CTSB"),
+ /* GPP_D */
+ PINCTRL_PIN(72, "SPI1_CSB"),
+ PINCTRL_PIN(73, "SPI1_CLK"),
+ PINCTRL_PIN(74, "SPI1_MISO_IO_1"),
+ PINCTRL_PIN(75, "SPI1_MOSI_IO_0"),
+ PINCTRL_PIN(76, "FLASHTRIG"),
+ PINCTRL_PIN(77, "ISH_I2C0_SDA"),
+ PINCTRL_PIN(78, "ISH_I2C0_SCL"),
+ PINCTRL_PIN(79, "ISH_I2C1_SDA"),
+ PINCTRL_PIN(80, "ISH_I2C1_SCL"),
+ PINCTRL_PIN(81, "ISH_SPI_CSB"),
+ PINCTRL_PIN(82, "ISH_SPI_CLK"),
+ PINCTRL_PIN(83, "ISH_SPI_MISO"),
+ PINCTRL_PIN(84, "ISH_SPI_MOSI"),
+ PINCTRL_PIN(85, "ISH_UART0_RXD"),
+ PINCTRL_PIN(86, "ISH_UART0_TXD"),
+ PINCTRL_PIN(87, "ISH_UART0_RTSB"),
+ PINCTRL_PIN(88, "ISH_UART0_CTSB"),
+ PINCTRL_PIN(89, "DMIC_CLK_1"),
+ PINCTRL_PIN(90, "DMIC_DATA_1"),
+ PINCTRL_PIN(91, "DMIC_CLK_0"),
+ PINCTRL_PIN(92, "DMIC_DATA_0"),
+ PINCTRL_PIN(93, "SPI1_IO_2"),
+ PINCTRL_PIN(94, "SPI1_IO_3"),
+ PINCTRL_PIN(95, "SSP_MCLK"),
+ /* GPP_E */
+ PINCTRL_PIN(96, "SATAXPCIE_0"),
+ PINCTRL_PIN(97, "SATAXPCIE_1"),
+ PINCTRL_PIN(98, "SATAXPCIE_2"),
+ PINCTRL_PIN(99, "CPU_GP_0"),
+ PINCTRL_PIN(100, "SATA_DEVSLP_0"),
+ PINCTRL_PIN(101, "SATA_DEVSLP_1"),
+ PINCTRL_PIN(102, "SATA_DEVSLP_2"),
+ PINCTRL_PIN(103, "CPU_GP_1"),
+ PINCTRL_PIN(104, "SATA_LEDB"),
+ PINCTRL_PIN(105, "USB2_OCB_0"),
+ PINCTRL_PIN(106, "USB2_OCB_1"),
+ PINCTRL_PIN(107, "USB2_OCB_2"),
+ PINCTRL_PIN(108, "USB2_OCB_3"),
+ PINCTRL_PIN(109, "DDSP_HPD_0"),
+ PINCTRL_PIN(110, "DDSP_HPD_1"),
+ PINCTRL_PIN(111, "DDSP_HPD_2"),
+ PINCTRL_PIN(112, "DDSP_HPD_3"),
+ PINCTRL_PIN(113, "EDP_HPD"),
+ PINCTRL_PIN(114, "DDPB_CTRLCLK"),
+ PINCTRL_PIN(115, "DDPB_CTRLDATA"),
+ PINCTRL_PIN(116, "DDPC_CTRLCLK"),
+ PINCTRL_PIN(117, "DDPC_CTRLDATA"),
+ PINCTRL_PIN(118, "DDPD_CTRLCLK"),
+ PINCTRL_PIN(119, "DDPD_CTRLDATA"),
+ /* GPP_F */
+ PINCTRL_PIN(120, "SSP2_SCLK"),
+ PINCTRL_PIN(121, "SSP2_SFRM"),
+ PINCTRL_PIN(122, "SSP2_TXD"),
+ PINCTRL_PIN(123, "SSP2_RXD"),
+ PINCTRL_PIN(124, "I2C2_SDA"),
+ PINCTRL_PIN(125, "I2C2_SCL"),
+ PINCTRL_PIN(126, "I2C3_SDA"),
+ PINCTRL_PIN(127, "I2C3_SCL"),
+ PINCTRL_PIN(128, "I2C4_SDA"),
+ PINCTRL_PIN(129, "I2C4_SCL"),
+ PINCTRL_PIN(130, "I2C5_SDA"),
+ PINCTRL_PIN(131, "I2C5_SCL"),
+ PINCTRL_PIN(132, "EMMC_CMD"),
+ PINCTRL_PIN(133, "EMMC_DATA_0"),
+ PINCTRL_PIN(134, "EMMC_DATA_1"),
+ PINCTRL_PIN(135, "EMMC_DATA_2"),
+ PINCTRL_PIN(136, "EMMC_DATA_3"),
+ PINCTRL_PIN(137, "EMMC_DATA_4"),
+ PINCTRL_PIN(138, "EMMC_DATA_5"),
+ PINCTRL_PIN(139, "EMMC_DATA_6"),
+ PINCTRL_PIN(140, "EMMC_DATA_7"),
+ PINCTRL_PIN(141, "EMMC_RCLK"),
+ PINCTRL_PIN(142, "EMMC_CLK"),
+ PINCTRL_PIN(143, "GPP_F_23"),
+ /* GPP_G */
+ PINCTRL_PIN(144, "SD_CMD"),
+ PINCTRL_PIN(145, "SD_DATA_0"),
+ PINCTRL_PIN(146, "SD_DATA_1"),
+ PINCTRL_PIN(147, "SD_DATA_2"),
+ PINCTRL_PIN(148, "SD_DATA_3"),
+ PINCTRL_PIN(149, "SD_CDB"),
+ PINCTRL_PIN(150, "SD_CLK"),
+ PINCTRL_PIN(151, "SD_WP"),
+};
+
+static const unsigned sptlp_spi0_pins[] = { 39, 40, 41, 42 };
+static const unsigned sptlp_spi1_pins[] = { 43, 44, 45, 46 };
+static const unsigned sptlp_uart0_pins[] = { 56, 57, 58, 59 };
+static const unsigned sptlp_uart1_pins[] = { 60, 61, 62, 63 };
+static const unsigned sptlp_uart2_pins[] = { 68, 69, 71, 71 };
+static const unsigned sptlp_i2c0_pins[] = { 64, 65 };
+static const unsigned sptlp_i2c1_pins[] = { 66, 67 };
+static const unsigned sptlp_i2c2_pins[] = { 124, 125 };
+static const unsigned sptlp_i2c3_pins[] = { 126, 127 };
+static const unsigned sptlp_i2c4_pins[] = { 128, 129 };
+static const unsigned sptlp_i2c4b_pins[] = { 85, 86 };
+static const unsigned sptlp_i2c5_pins[] = { 130, 131 };
+static const unsigned sptlp_ssp2_pins[] = { 120, 121, 122, 123 };
+static const unsigned sptlp_emmc_pins[] = {
+ 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142,
+};
+static const unsigned sptlp_sd_pins[] = {
+ 144, 145, 146, 147, 148, 149, 150, 151,
+};
+
+static const struct intel_pingroup sptlp_groups[] = {
+ PIN_GROUP("spi0_grp", sptlp_spi0_pins, 1),
+ PIN_GROUP("spi1_grp", sptlp_spi1_pins, 1),
+ PIN_GROUP("uart0_grp", sptlp_uart0_pins, 1),
+ PIN_GROUP("uart1_grp", sptlp_uart1_pins, 1),
+ PIN_GROUP("uart2_grp", sptlp_uart2_pins, 1),
+ PIN_GROUP("i2c0_grp", sptlp_i2c0_pins, 1),
+ PIN_GROUP("i2c1_grp", sptlp_i2c1_pins, 1),
+ PIN_GROUP("i2c2_grp", sptlp_i2c2_pins, 1),
+ PIN_GROUP("i2c3_grp", sptlp_i2c3_pins, 1),
+ PIN_GROUP("i2c4_grp", sptlp_i2c4_pins, 1),
+ PIN_GROUP("i2c4b_grp", sptlp_i2c4b_pins, 3),
+ PIN_GROUP("i2c5_grp", sptlp_i2c5_pins, 1),
+ PIN_GROUP("ssp2_grp", sptlp_ssp2_pins, 1),
+ PIN_GROUP("emmc_grp", sptlp_emmc_pins, 1),
+ PIN_GROUP("sd_grp", sptlp_sd_pins, 1),
+};
+
+static const char * const sptlp_spi0_groups[] = { "spi0_grp" };
+static const char * const sptlp_spi1_groups[] = { "spi0_grp" };
+static const char * const sptlp_uart0_groups[] = { "uart0_grp" };
+static const char * const sptlp_uart1_groups[] = { "uart1_grp" };
+static const char * const sptlp_uart2_groups[] = { "uart2_grp" };
+static const char * const sptlp_i2c0_groups[] = { "i2c0_grp" };
+static const char * const sptlp_i2c1_groups[] = { "i2c1_grp" };
+static const char * const sptlp_i2c2_groups[] = { "i2c2_grp" };
+static const char * const sptlp_i2c3_groups[] = { "i2c3_grp" };
+static const char * const sptlp_i2c4_groups[] = { "i2c4_grp", "i2c4b_grp" };
+static const char * const sptlp_i2c5_groups[] = { "i2c5_grp" };
+static const char * const sptlp_ssp2_groups[] = { "ssp2_grp" };
+static const char * const sptlp_emmc_groups[] = { "emmc_grp" };
+static const char * const sptlp_sd_groups[] = { "sd_grp" };
+
+static const struct intel_function sptlp_functions[] = {
+ FUNCTION("spi0", sptlp_spi0_groups),
+ FUNCTION("spi1", sptlp_spi1_groups),
+ FUNCTION("uart0", sptlp_uart0_groups),
+ FUNCTION("uart1", sptlp_uart1_groups),
+ FUNCTION("uart2", sptlp_uart2_groups),
+ FUNCTION("i2c0", sptlp_i2c0_groups),
+ FUNCTION("i2c1", sptlp_i2c1_groups),
+ FUNCTION("i2c2", sptlp_i2c2_groups),
+ FUNCTION("i2c3", sptlp_i2c3_groups),
+ FUNCTION("i2c4", sptlp_i2c4_groups),
+ FUNCTION("i2c5", sptlp_i2c5_groups),
+ FUNCTION("ssp2", sptlp_ssp2_groups),
+ FUNCTION("emmc", sptlp_emmc_groups),
+ FUNCTION("sd", sptlp_sd_groups),
+};
+
+static const struct intel_community sptlp_communities[] = {
+ SPT_COMMUNITY(0, 0, 47),
+ SPT_COMMUNITY(1, 48, 119),
+ SPT_COMMUNITY(2, 120, 151),
+};
+
+static const struct intel_pinctrl_soc_data sptlp_soc_data = {
+ .pins = sptlp_pins,
+ .npins = ARRAY_SIZE(sptlp_pins),
+ .groups = sptlp_groups,
+ .ngroups = ARRAY_SIZE(sptlp_groups),
+ .functions = sptlp_functions,
+ .nfunctions = ARRAY_SIZE(sptlp_functions),
+ .communities = sptlp_communities,
+ .ncommunities = ARRAY_SIZE(sptlp_communities),
+};
+
+static const struct acpi_device_id spt_pinctrl_acpi_match[] = {
+ { "INT344B", (kernel_ulong_t)&sptlp_soc_data },
+ { }
+};
+MODULE_DEVICE_TABLE(acpi, spt_pinctrl_acpi_match);
+
+static int spt_pinctrl_probe(struct platform_device *pdev)
+{
+ const struct intel_pinctrl_soc_data *soc_data;
+ const struct acpi_device_id *id;
+
+ id = acpi_match_device(spt_pinctrl_acpi_match, &pdev->dev);
+ if (!id || !id->driver_data)
+ return -ENODEV;
+
+ soc_data = (const struct intel_pinctrl_soc_data *)id->driver_data;
+ return intel_pinctrl_probe(pdev, soc_data);
+}
+
+static const struct dev_pm_ops spt_pinctrl_pm_ops = {
+ SET_LATE_SYSTEM_SLEEP_PM_OPS(intel_pinctrl_suspend,
+ intel_pinctrl_resume)
+};
+
+static struct platform_driver spt_pinctrl_driver = {
+ .probe = spt_pinctrl_probe,
+ .remove = intel_pinctrl_remove,
+ .driver = {
+ .name = "sunrisepoint-pinctrl",
+ .acpi_match_table = spt_pinctrl_acpi_match,
+ .pm = &spt_pinctrl_pm_ops,
+ },
+};
+
+static int __init spt_pinctrl_init(void)
+{
+ return platform_driver_register(&spt_pinctrl_driver);
+}
+subsys_initcall(spt_pinctrl_init);
+
+static void __exit spt_pinctrl_exit(void)
+{
+ platform_driver_unregister(&spt_pinctrl_driver);
+}
+module_exit(spt_pinctrl_exit);
+
+MODULE_AUTHOR("Mathias Nyman <mathias.nyman@linux.intel.com>");
+MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
+MODULE_DESCRIPTION("Intel Sunrisepoint PCH pinctrl/GPIO driver");
+MODULE_LICENSE("GPL v2");
--- /dev/null
+if ARCH_MEDIATEK || COMPILE_TEST
+
+config PINCTRL_MTK_COMMON
+ bool
+ select PINMUX
+ select GENERIC_PINCONF
+ select GPIOLIB
+ select OF_GPIO
+
+# For ARMv7 SoCs
+config PINCTRL_MT8135
+ bool "Mediatek MT8135 pin control" if COMPILE_TEST && !MACH_MT8135
+ default MACH_MT8135
+ select PINCTRL_MTK_COMMON
+
+# For ARMv8 SoCs
+config PINCTRL_MT8173
+ bool "Mediatek MT8173 pin control"
+ depends on ARM64 || COMPILE_TEST
+ default ARM64 && ARCH_MEDIATEK
+ select PINCTRL_MTK_COMMON
+
+endif
--- /dev/null
+# Core
+obj-$(CONFIG_PINCTRL_MTK_COMMON) += pinctrl-mtk-common.o
+
+# SoC Drivers
+obj-$(CONFIG_PINCTRL_MT8135) += pinctrl-mt8135.o
+obj-$(CONFIG_PINCTRL_MT8173) += pinctrl-mt8173.o
--- /dev/null
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/regmap.h>
+#include <dt-bindings/pinctrl/mt65xx.h>
+
+#include "pinctrl-mtk-common.h"
+#include "pinctrl-mtk-mt8135.h"
+
+#define DRV_BASE1 0x500
+#define DRV_BASE2 0x510
+#define PUPD_BASE1 0x400
+#define PUPD_BASE2 0x450
+#define R0_BASE1 0x4d0
+#define R1_BASE1 0x200
+#define R1_BASE2 0x250
+
+struct mtk_spec_pull_set {
+ unsigned int pin;
+ unsigned int pupd_offset;
+ unsigned char pupd_bit;
+ unsigned int r0_offset;
+ unsigned char r0_bit;
+ unsigned int r1_offset;
+ unsigned char r1_bit;
+};
+
+#define SPEC_PULL(_pin, _pupd_offset, _pupd_bit, _r0_offset, \
+ _r0_bit, _r1_offset, _r1_bit) \
+ { \
+ .pin = _pin, \
+ .pupd_offset = _pupd_offset, \
+ .pupd_bit = _pupd_bit, \
+ .r0_offset = _r0_offset, \
+ .r0_bit = _r0_bit, \
+ .r1_offset = _r1_offset, \
+ .r1_bit = _r1_bit, \
+ }
+
+static const struct mtk_drv_group_desc mt8135_drv_grp[] = {
+ /* E8E4E2 2/4/6/8/10/12/14/16 */
+ MTK_DRV_GRP(2, 16, 0, 2, 2),
+ /* E8E4 4/8/12/16 */
+ MTK_DRV_GRP(4, 16, 1, 2, 4),
+ /* E4E2 2/4/6/8 */
+ MTK_DRV_GRP(2, 8, 0, 1, 2),
+ /* E16E8E4 4/8/12/16/20/24/28/32 */
+ MTK_DRV_GRP(4, 32, 0, 2, 4)
+};
+
+static const struct mtk_pin_drv_grp mt8135_pin_drv[] = {
+ MTK_PIN_DRV_GRP(0, DRV_BASE1, 0, 0),
+ MTK_PIN_DRV_GRP(1, DRV_BASE1, 0, 0),
+ MTK_PIN_DRV_GRP(2, DRV_BASE1, 0, 0),
+ MTK_PIN_DRV_GRP(3, DRV_BASE1, 0, 0),
+ MTK_PIN_DRV_GRP(4, DRV_BASE1, 4, 0),
+ MTK_PIN_DRV_GRP(5, DRV_BASE1, 8, 0),
+ MTK_PIN_DRV_GRP(6, DRV_BASE1, 0, 0),
+ MTK_PIN_DRV_GRP(7, DRV_BASE1, 0, 0),
+ MTK_PIN_DRV_GRP(8, DRV_BASE1, 0, 0),
+ MTK_PIN_DRV_GRP(9, DRV_BASE1, 0, 0),
+
+ MTK_PIN_DRV_GRP(10, DRV_BASE1, 12, 1),
+ MTK_PIN_DRV_GRP(11, DRV_BASE1, 12, 1),
+ MTK_PIN_DRV_GRP(12, DRV_BASE1, 12, 1),
+ MTK_PIN_DRV_GRP(13, DRV_BASE1, 12, 1),
+ MTK_PIN_DRV_GRP(14, DRV_BASE1, 12, 1),
+ MTK_PIN_DRV_GRP(15, DRV_BASE1, 12, 1),
+ MTK_PIN_DRV_GRP(16, DRV_BASE1, 12, 1),
+ MTK_PIN_DRV_GRP(17, DRV_BASE1, 16, 1),
+ MTK_PIN_DRV_GRP(18, DRV_BASE1, 16, 1),
+ MTK_PIN_DRV_GRP(19, DRV_BASE1, 16, 1),
+ MTK_PIN_DRV_GRP(20, DRV_BASE1, 16, 1),
+ MTK_PIN_DRV_GRP(21, DRV_BASE1, 16, 1),
+ MTK_PIN_DRV_GRP(22, DRV_BASE1, 16, 1),
+ MTK_PIN_DRV_GRP(23, DRV_BASE1, 16, 1),
+ MTK_PIN_DRV_GRP(24, DRV_BASE1, 16, 1),
+ MTK_PIN_DRV_GRP(33, DRV_BASE1, 24, 1),
+ MTK_PIN_DRV_GRP(34, DRV_BASE2, 12, 2),
+ MTK_PIN_DRV_GRP(37, DRV_BASE2, 20, 1),
+ MTK_PIN_DRV_GRP(38, DRV_BASE2, 20, 1),
+ MTK_PIN_DRV_GRP(39, DRV_BASE2, 20, 1),
+ MTK_PIN_DRV_GRP(40, DRV_BASE2, 24, 1),
+ MTK_PIN_DRV_GRP(41, DRV_BASE2, 24, 1),
+ MTK_PIN_DRV_GRP(42, DRV_BASE2, 24, 1),
+ MTK_PIN_DRV_GRP(43, DRV_BASE2, 28, 1),
+ MTK_PIN_DRV_GRP(44, DRV_BASE2, 28, 1),
+ MTK_PIN_DRV_GRP(45, DRV_BASE2, 28, 1),
+ MTK_PIN_DRV_GRP(46, DRV_BASE2, 28, 1),
+ MTK_PIN_DRV_GRP(47, DRV_BASE2, 28, 1),
+
+ MTK_PIN_DRV_GRP(49, DRV_BASE2+0x10, 0, 1),
+ MTK_PIN_DRV_GRP(50, DRV_BASE2+0x10, 4, 1),
+ MTK_PIN_DRV_GRP(51, DRV_BASE2+0x10, 8, 1),
+ MTK_PIN_DRV_GRP(52, DRV_BASE2+0x10, 12, 2),
+ MTK_PIN_DRV_GRP(53, DRV_BASE2+0x10, 16, 1),
+ MTK_PIN_DRV_GRP(54, DRV_BASE2+0x10, 20, 1),
+ MTK_PIN_DRV_GRP(55, DRV_BASE2+0x10, 24, 1),
+ MTK_PIN_DRV_GRP(56, DRV_BASE2+0x10, 28, 1),
+
+ MTK_PIN_DRV_GRP(57, DRV_BASE2+0x20, 0, 1),
+ MTK_PIN_DRV_GRP(58, DRV_BASE2+0x20, 0, 1),
+ MTK_PIN_DRV_GRP(59, DRV_BASE2+0x20, 0, 1),
+ MTK_PIN_DRV_GRP(60, DRV_BASE2+0x20, 0, 1),
+ MTK_PIN_DRV_GRP(61, DRV_BASE2+0x20, 0, 1),
+ MTK_PIN_DRV_GRP(62, DRV_BASE2+0x20, 0, 1),
+ MTK_PIN_DRV_GRP(63, DRV_BASE2+0x20, 4, 1),
+ MTK_PIN_DRV_GRP(64, DRV_BASE2+0x20, 8, 1),
+ MTK_PIN_DRV_GRP(65, DRV_BASE2+0x20, 12, 1),
+ MTK_PIN_DRV_GRP(66, DRV_BASE2+0x20, 16, 1),
+ MTK_PIN_DRV_GRP(67, DRV_BASE2+0x20, 20, 1),
+ MTK_PIN_DRV_GRP(68, DRV_BASE2+0x20, 24, 1),
+ MTK_PIN_DRV_GRP(69, DRV_BASE2+0x20, 28, 1),
+
+ MTK_PIN_DRV_GRP(70, DRV_BASE2+0x30, 0, 1),
+ MTK_PIN_DRV_GRP(71, DRV_BASE2+0x30, 4, 1),
+ MTK_PIN_DRV_GRP(72, DRV_BASE2+0x30, 8, 1),
+ MTK_PIN_DRV_GRP(73, DRV_BASE2+0x30, 12, 1),
+ MTK_PIN_DRV_GRP(74, DRV_BASE2+0x30, 16, 1),
+ MTK_PIN_DRV_GRP(75, DRV_BASE2+0x30, 20, 1),
+ MTK_PIN_DRV_GRP(76, DRV_BASE2+0x30, 24, 1),
+ MTK_PIN_DRV_GRP(77, DRV_BASE2+0x30, 28, 3),
+ MTK_PIN_DRV_GRP(78, DRV_BASE2+0x30, 28, 3),
+
+ MTK_PIN_DRV_GRP(79, DRV_BASE2+0x40, 0, 3),
+ MTK_PIN_DRV_GRP(80, DRV_BASE2+0x40, 4, 3),
+
+ MTK_PIN_DRV_GRP(81, DRV_BASE2+0x30, 28, 3),
+ MTK_PIN_DRV_GRP(82, DRV_BASE2+0x30, 28, 3),
+
+ MTK_PIN_DRV_GRP(83, DRV_BASE2+0x40, 8, 3),
+ MTK_PIN_DRV_GRP(84, DRV_BASE2+0x40, 8, 3),
+ MTK_PIN_DRV_GRP(85, DRV_BASE2+0x40, 12, 3),
+ MTK_PIN_DRV_GRP(86, DRV_BASE2+0x40, 16, 3),
+ MTK_PIN_DRV_GRP(87, DRV_BASE2+0x40, 8, 3),
+ MTK_PIN_DRV_GRP(88, DRV_BASE2+0x40, 8, 3),
+
+ MTK_PIN_DRV_GRP(89, DRV_BASE2+0x50, 12, 0),
+ MTK_PIN_DRV_GRP(90, DRV_BASE2+0x50, 12, 0),
+ MTK_PIN_DRV_GRP(91, DRV_BASE2+0x50, 12, 0),
+ MTK_PIN_DRV_GRP(92, DRV_BASE2+0x50, 12, 0),
+ MTK_PIN_DRV_GRP(93, DRV_BASE2+0x50, 12, 0),
+ MTK_PIN_DRV_GRP(94, DRV_BASE2+0x50, 12, 0),
+ MTK_PIN_DRV_GRP(95, DRV_BASE2+0x50, 12, 0),
+
+ MTK_PIN_DRV_GRP(96, DRV_BASE1+0xb0, 28, 0),
+
+ MTK_PIN_DRV_GRP(97, DRV_BASE2+0x50, 12, 0),
+ MTK_PIN_DRV_GRP(98, DRV_BASE2+0x50, 16, 0),
+ MTK_PIN_DRV_GRP(99, DRV_BASE2+0x50, 20, 1),
+ MTK_PIN_DRV_GRP(102, DRV_BASE2+0x50, 24, 1),
+ MTK_PIN_DRV_GRP(103, DRV_BASE2+0x50, 28, 1),
+
+
+ MTK_PIN_DRV_GRP(104, DRV_BASE2+0x60, 0, 1),
+ MTK_PIN_DRV_GRP(105, DRV_BASE2+0x60, 4, 1),
+ MTK_PIN_DRV_GRP(106, DRV_BASE2+0x60, 4, 1),
+ MTK_PIN_DRV_GRP(107, DRV_BASE2+0x60, 4, 1),
+ MTK_PIN_DRV_GRP(108, DRV_BASE2+0x60, 4, 1),
+ MTK_PIN_DRV_GRP(109, DRV_BASE2+0x60, 8, 2),
+ MTK_PIN_DRV_GRP(110, DRV_BASE2+0x60, 12, 2),
+ MTK_PIN_DRV_GRP(111, DRV_BASE2+0x60, 16, 2),
+ MTK_PIN_DRV_GRP(112, DRV_BASE2+0x60, 20, 2),
+ MTK_PIN_DRV_GRP(113, DRV_BASE2+0x60, 24, 2),
+ MTK_PIN_DRV_GRP(114, DRV_BASE2+0x60, 28, 2),
+
+ MTK_PIN_DRV_GRP(115, DRV_BASE2+0x70, 0, 2),
+ MTK_PIN_DRV_GRP(116, DRV_BASE2+0x70, 4, 2),
+ MTK_PIN_DRV_GRP(117, DRV_BASE2+0x70, 8, 2),
+ MTK_PIN_DRV_GRP(118, DRV_BASE2+0x70, 12, 2),
+ MTK_PIN_DRV_GRP(119, DRV_BASE2+0x70, 16, 2),
+ MTK_PIN_DRV_GRP(120, DRV_BASE2+0x70, 20, 2),
+
+ MTK_PIN_DRV_GRP(181, DRV_BASE1+0xa0, 12, 1),
+ MTK_PIN_DRV_GRP(182, DRV_BASE1+0xa0, 16, 1),
+ MTK_PIN_DRV_GRP(183, DRV_BASE1+0xa0, 20, 1),
+ MTK_PIN_DRV_GRP(184, DRV_BASE1+0xa0, 24, 1),
+ MTK_PIN_DRV_GRP(185, DRV_BASE1+0xa0, 28, 1),
+
+ MTK_PIN_DRV_GRP(186, DRV_BASE1+0xb0, 0, 2),
+ MTK_PIN_DRV_GRP(187, DRV_BASE1+0xb0, 0, 2),
+ MTK_PIN_DRV_GRP(188, DRV_BASE1+0xb0, 0, 2),
+ MTK_PIN_DRV_GRP(189, DRV_BASE1+0xb0, 0, 2),
+ MTK_PIN_DRV_GRP(190, DRV_BASE1+0xb0, 4, 1),
+ MTK_PIN_DRV_GRP(191, DRV_BASE1+0xb0, 8, 1),
+ MTK_PIN_DRV_GRP(192, DRV_BASE1+0xb0, 12, 1),
+
+ MTK_PIN_DRV_GRP(197, DRV_BASE1+0xb0, 16, 0),
+ MTK_PIN_DRV_GRP(198, DRV_BASE1+0xb0, 16, 0),
+ MTK_PIN_DRV_GRP(199, DRV_BASE1+0xb0, 20, 0),
+ MTK_PIN_DRV_GRP(200, DRV_BASE1+0xb0, 24, 0),
+ MTK_PIN_DRV_GRP(201, DRV_BASE1+0xb0, 16, 0),
+ MTK_PIN_DRV_GRP(202, DRV_BASE1+0xb0, 16, 0)
+};
+
+static const struct mtk_spec_pull_set spec_pupd[] = {
+ SPEC_PULL(0, PUPD_BASE1, 0, R0_BASE1, 9, R1_BASE1, 0),
+ SPEC_PULL(1, PUPD_BASE1, 1, R0_BASE1, 8, R1_BASE1, 1),
+ SPEC_PULL(2, PUPD_BASE1, 2, R0_BASE1, 7, R1_BASE1, 2),
+ SPEC_PULL(3, PUPD_BASE1, 3, R0_BASE1, 6, R1_BASE1, 3),
+ SPEC_PULL(4, PUPD_BASE1, 4, R0_BASE1, 1, R1_BASE1, 4),
+ SPEC_PULL(5, PUPD_BASE1, 5, R0_BASE1, 0, R1_BASE1, 5),
+ SPEC_PULL(6, PUPD_BASE1, 6, R0_BASE1, 5, R1_BASE1, 6),
+ SPEC_PULL(7, PUPD_BASE1, 7, R0_BASE1, 4, R1_BASE1, 7),
+ SPEC_PULL(8, PUPD_BASE1, 8, R0_BASE1, 3, R1_BASE1, 8),
+ SPEC_PULL(9, PUPD_BASE1, 9, R0_BASE1, 2, R1_BASE1, 9),
+ SPEC_PULL(89, PUPD_BASE2, 9, R0_BASE1, 18, R1_BASE2, 9),
+ SPEC_PULL(90, PUPD_BASE2, 10, R0_BASE1, 19, R1_BASE2, 10),
+ SPEC_PULL(91, PUPD_BASE2, 11, R0_BASE1, 23, R1_BASE2, 11),
+ SPEC_PULL(92, PUPD_BASE2, 12, R0_BASE1, 24, R1_BASE2, 12),
+ SPEC_PULL(93, PUPD_BASE2, 13, R0_BASE1, 25, R1_BASE2, 13),
+ SPEC_PULL(94, PUPD_BASE2, 14, R0_BASE1, 22, R1_BASE2, 14),
+ SPEC_PULL(95, PUPD_BASE2, 15, R0_BASE1, 20, R1_BASE2, 15),
+ SPEC_PULL(96, PUPD_BASE2+0x10, 0, R0_BASE1, 16, R1_BASE2+0x10, 0),
+ SPEC_PULL(97, PUPD_BASE2+0x10, 1, R0_BASE1, 21, R1_BASE2+0x10, 1),
+ SPEC_PULL(98, PUPD_BASE2+0x10, 2, R0_BASE1, 17, R1_BASE2+0x10, 2),
+ SPEC_PULL(197, PUPD_BASE1+0xc0, 5, R0_BASE1, 13, R1_BASE2+0xc0, 5),
+ SPEC_PULL(198, PUPD_BASE2+0xc0, 6, R0_BASE1, 14, R1_BASE2+0xc0, 6),
+ SPEC_PULL(199, PUPD_BASE2+0xc0, 7, R0_BASE1, 11, R1_BASE2+0xc0, 7),
+ SPEC_PULL(200, PUPD_BASE2+0xc0, 8, R0_BASE1, 10, R1_BASE2+0xc0, 8),
+ SPEC_PULL(201, PUPD_BASE2+0xc0, 9, R0_BASE1, 13, R1_BASE2+0xc0, 9),
+ SPEC_PULL(202, PUPD_BASE2+0xc0, 10, R0_BASE1, 12, R1_BASE2+0xc0, 10)
+};
+
+static int spec_pull_set(struct regmap *regmap, unsigned int pin,
+ unsigned char align, bool isup, unsigned int r1r0)
+{
+ unsigned int i;
+ unsigned int reg_pupd, reg_set_r0, reg_set_r1;
+ unsigned int reg_rst_r0, reg_rst_r1;
+ bool find = false;
+
+ for (i = 0; i < ARRAY_SIZE(spec_pupd); i++) {
+ if (pin == spec_pupd[i].pin) {
+ find = true;
+ break;
+ }
+ }
+
+ if (!find)
+ return -EINVAL;
+
+ if (isup)
+ reg_pupd = spec_pupd[i].pupd_offset + align;
+ else
+ reg_pupd = spec_pupd[i].pupd_offset + (align << 1);
+
+ regmap_write(regmap, reg_pupd, spec_pupd[i].pupd_bit);
+
+ reg_set_r0 = spec_pupd[i].r0_offset + align;
+ reg_rst_r0 = spec_pupd[i].r0_offset + (align << 1);
+ reg_set_r1 = spec_pupd[i].r1_offset + align;
+ reg_rst_r1 = spec_pupd[i].r1_offset + (align << 1);
+
+ switch (r1r0) {
+ case MTK_PUPD_SET_R1R0_00:
+ regmap_write(regmap, reg_rst_r0, spec_pupd[i].r0_bit);
+ regmap_write(regmap, reg_rst_r1, spec_pupd[i].r1_bit);
+ break;
+ case MTK_PUPD_SET_R1R0_01:
+ regmap_write(regmap, reg_set_r0, spec_pupd[i].r0_bit);
+ regmap_write(regmap, reg_rst_r1, spec_pupd[i].r1_bit);
+ break;
+ case MTK_PUPD_SET_R1R0_10:
+ regmap_write(regmap, reg_rst_r0, spec_pupd[i].r0_bit);
+ regmap_write(regmap, reg_set_r1, spec_pupd[i].r1_bit);
+ break;
+ case MTK_PUPD_SET_R1R0_11:
+ regmap_write(regmap, reg_set_r0, spec_pupd[i].r0_bit);
+ regmap_write(regmap, reg_set_r1, spec_pupd[i].r1_bit);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static const struct mtk_pinctrl_devdata mt8135_pinctrl_data = {
+ .pins = mtk_pins_mt8135,
+ .npins = ARRAY_SIZE(mtk_pins_mt8135),
+ .grp_desc = mt8135_drv_grp,
+ .n_grp_cls = ARRAY_SIZE(mt8135_drv_grp),
+ .pin_drv_grp = mt8135_pin_drv,
+ .n_pin_drv_grps = ARRAY_SIZE(mt8135_pin_drv),
+ .spec_pull_set = spec_pull_set,
+ .dir_offset = 0x0000,
+ .ies_offset = 0x0100,
+ .pullen_offset = 0x0200,
+ .smt_offset = 0x0300,
+ .pullsel_offset = 0x0400,
+ .invser_offset = 0x0600,
+ .dout_offset = 0x0800,
+ .din_offset = 0x0A00,
+ .pinmux_offset = 0x0C00,
+ .type1_start = 34,
+ .type1_end = 149,
+ .port_shf = 4,
+ .port_mask = 0xf,
+ .port_align = 4,
+ .chip_type = MTK_CHIP_TYPE_BASE,
+ .eint_offsets = {
+ .name = "mt8135_eint",
+ .stat = 0x000,
+ .ack = 0x040,
+ .mask = 0x080,
+ .mask_set = 0x0c0,
+ .mask_clr = 0x100,
+ .sens = 0x140,
+ .sens_set = 0x180,
+ .sens_clr = 0x1c0,
+ .soft = 0x200,
+ .soft_set = 0x240,
+ .soft_clr = 0x280,
+ .pol = 0x300,
+ .pol_set = 0x340,
+ .pol_clr = 0x380,
+ .dom_en = 0x400,
+ .dbnc_ctrl = 0x500,
+ .dbnc_set = 0x600,
+ .dbnc_clr = 0x700,
+ .port_mask = 7,
+ .ports = 6,
+ },
+ .ap_num = 192,
+ .db_cnt = 16,
+};
+
+static int mt8135_pinctrl_probe(struct platform_device *pdev)
+{
+ return mtk_pctrl_init(pdev, &mt8135_pinctrl_data);
+}
+
+static const struct of_device_id mt8135_pctrl_match[] = {
+ {
+ .compatible = "mediatek,mt8135-pinctrl",
+ },
+ { }
+};
+MODULE_DEVICE_TABLE(of, mt8135_pctrl_match);
+
+static struct platform_driver mtk_pinctrl_driver = {
+ .probe = mt8135_pinctrl_probe,
+ .driver = {
+ .name = "mediatek-mt8135-pinctrl",
+ .owner = THIS_MODULE,
+ .of_match_table = mt8135_pctrl_match,
+ },
+};
+
+static int __init mtk_pinctrl_init(void)
+{
+ return platform_driver_register(&mtk_pinctrl_driver);
+}
+
+module_init(mtk_pinctrl_init);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("MediaTek Pinctrl Driver");
+MODULE_AUTHOR("Hongzhou Yang <hongzhou.yang@mediatek.com>");
--- /dev/null
+/*
+ * Copyright (c) 2014-2015 MediaTek Inc.
+ * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/regmap.h>
+#include <dt-bindings/pinctrl/mt65xx.h>
+
+#include "pinctrl-mtk-common.h"
+#include "pinctrl-mtk-mt8173.h"
+
+#define DRV_BASE 0xb00
+
+/**
+ * struct mtk_pin_ies_smt_set - For special pins' ies and smt setting.
+ * @start: The start pin number of those special pins.
+ * @end: The end pin number of those special pins.
+ * @offset: The offset of special setting register.
+ * @bit: The bit of special setting register.
+ */
+struct mtk_pin_ies_smt_set {
+ unsigned int start;
+ unsigned int end;
+ unsigned int offset;
+ unsigned char bit;
+};
+
+#define MTK_PIN_IES_SMT_SET(_start, _end, _offset, _bit) \
+ { \
+ .start = _start, \
+ .end = _end, \
+ .bit = _bit, \
+ .offset = _offset, \
+ }
+
+/**
+ * struct mtk_pin_spec_pupd_set - For special pins' pull up/down setting.
+ * @pin: The pin number.
+ * @offset: The offset of special pull up/down setting register.
+ * @pupd_bit: The pull up/down bit in this register.
+ * @r0_bit: The r0 bit of pull resistor.
+ * @r1_bit: The r1 bit of pull resistor.
+ */
+struct mtk_pin_spec_pupd_set {
+ unsigned int pin;
+ unsigned int offset;
+ unsigned char pupd_bit;
+ unsigned char r1_bit;
+ unsigned char r0_bit;
+};
+
+#define MTK_PIN_PUPD_SPEC(_pin, _offset, _pupd, _r1, _r0) \
+ { \
+ .pin = _pin, \
+ .offset = _offset, \
+ .pupd_bit = _pupd, \
+ .r1_bit = _r1, \
+ .r0_bit = _r0, \
+ }
+
+static const struct mtk_pin_spec_pupd_set mt8173_spec_pupd[] = {
+ MTK_PIN_PUPD_SPEC(119, 0xe00, 2, 1, 0), /* KROW0 */
+ MTK_PIN_PUPD_SPEC(120, 0xe00, 6, 5, 4), /* KROW1 */
+ MTK_PIN_PUPD_SPEC(121, 0xe00, 10, 9, 8), /* KROW2 */
+ MTK_PIN_PUPD_SPEC(122, 0xe10, 2, 1, 0), /* KCOL0 */
+ MTK_PIN_PUPD_SPEC(123, 0xe10, 6, 5, 4), /* KCOL1 */
+ MTK_PIN_PUPD_SPEC(124, 0xe10, 10, 9, 8), /* KCOL2 */
+
+ MTK_PIN_PUPD_SPEC(67, 0xd10, 2, 1, 0), /* ms0 DS */
+ MTK_PIN_PUPD_SPEC(68, 0xd00, 2, 1, 0), /* ms0 RST */
+ MTK_PIN_PUPD_SPEC(66, 0xc10, 2, 1, 0), /* ms0 cmd */
+ MTK_PIN_PUPD_SPEC(65, 0xc00, 2, 1, 0), /* ms0 clk */
+ MTK_PIN_PUPD_SPEC(57, 0xc20, 2, 1, 0), /* ms0 data0 */
+ MTK_PIN_PUPD_SPEC(58, 0xc20, 2, 1, 0), /* ms0 data1 */
+ MTK_PIN_PUPD_SPEC(59, 0xc20, 2, 1, 0), /* ms0 data2 */
+ MTK_PIN_PUPD_SPEC(60, 0xc20, 2, 1, 0), /* ms0 data3 */
+ MTK_PIN_PUPD_SPEC(61, 0xc20, 2, 1, 0), /* ms0 data4 */
+ MTK_PIN_PUPD_SPEC(62, 0xc20, 2, 1, 0), /* ms0 data5 */
+ MTK_PIN_PUPD_SPEC(63, 0xc20, 2, 1, 0), /* ms0 data6 */
+ MTK_PIN_PUPD_SPEC(64, 0xc20, 2, 1, 0), /* ms0 data7 */
+
+ MTK_PIN_PUPD_SPEC(78, 0xc50, 2, 1, 0), /* ms1 cmd */
+ MTK_PIN_PUPD_SPEC(73, 0xd20, 2, 1, 0), /* ms1 dat0 */
+ MTK_PIN_PUPD_SPEC(74, 0xd20, 6, 5, 4), /* ms1 dat1 */
+ MTK_PIN_PUPD_SPEC(75, 0xd20, 10, 9, 8), /* ms1 dat2 */
+ MTK_PIN_PUPD_SPEC(76, 0xd20, 14, 13, 12), /* ms1 dat3 */
+ MTK_PIN_PUPD_SPEC(77, 0xc40, 2, 1, 0), /* ms1 clk */
+
+ MTK_PIN_PUPD_SPEC(100, 0xd40, 2, 1, 0), /* ms2 dat0 */
+ MTK_PIN_PUPD_SPEC(101, 0xd40, 6, 5, 4), /* ms2 dat1 */
+ MTK_PIN_PUPD_SPEC(102, 0xd40, 10, 9, 8), /* ms2 dat2 */
+ MTK_PIN_PUPD_SPEC(103, 0xd40, 14, 13, 12), /* ms2 dat3 */
+ MTK_PIN_PUPD_SPEC(104, 0xc80, 2, 1, 0), /* ms2 clk */
+ MTK_PIN_PUPD_SPEC(105, 0xc90, 2, 1, 0), /* ms2 cmd */
+
+ MTK_PIN_PUPD_SPEC(22, 0xd60, 2, 1, 0), /* ms3 dat0 */
+ MTK_PIN_PUPD_SPEC(23, 0xd60, 6, 5, 4), /* ms3 dat1 */
+ MTK_PIN_PUPD_SPEC(24, 0xd60, 10, 9, 8), /* ms3 dat2 */
+ MTK_PIN_PUPD_SPEC(25, 0xd60, 14, 13, 12), /* ms3 dat3 */
+ MTK_PIN_PUPD_SPEC(26, 0xcc0, 2, 1, 0), /* ms3 clk */
+ MTK_PIN_PUPD_SPEC(27, 0xcd0, 2, 1, 0) /* ms3 cmd */
+};
+
+static int spec_pull_set(struct regmap *regmap, unsigned int pin,
+ unsigned char align, bool isup, unsigned int r1r0)
+{
+ unsigned int i;
+ unsigned int reg_pupd, reg_set, reg_rst;
+ unsigned int bit_pupd, bit_r0, bit_r1;
+ const struct mtk_pin_spec_pupd_set *spec_pupd_pin;
+ bool find = false;
+
+ for (i = 0; i < ARRAY_SIZE(mt8173_spec_pupd); i++) {
+ if (pin == mt8173_spec_pupd[i].pin) {
+ find = true;
+ break;
+ }
+ }
+
+ if (!find)
+ return -EINVAL;
+
+ spec_pupd_pin = mt8173_spec_pupd + i;
+ reg_set = spec_pupd_pin->offset + align;
+ reg_rst = spec_pupd_pin->offset + (align << 1);
+
+ if (isup)
+ reg_pupd = reg_rst;
+ else
+ reg_pupd = reg_set;
+
+ bit_pupd = BIT(spec_pupd_pin->pupd_bit);
+ regmap_write(regmap, reg_pupd, bit_pupd);
+
+ bit_r0 = BIT(spec_pupd_pin->r0_bit);
+ bit_r1 = BIT(spec_pupd_pin->r1_bit);
+
+ switch (r1r0) {
+ case MTK_PUPD_SET_R1R0_00:
+ regmap_write(regmap, reg_rst, bit_r0);
+ regmap_write(regmap, reg_rst, bit_r1);
+ break;
+ case MTK_PUPD_SET_R1R0_01:
+ regmap_write(regmap, reg_set, bit_r0);
+ regmap_write(regmap, reg_rst, bit_r1);
+ break;
+ case MTK_PUPD_SET_R1R0_10:
+ regmap_write(regmap, reg_rst, bit_r0);
+ regmap_write(regmap, reg_set, bit_r1);
+ break;
+ case MTK_PUPD_SET_R1R0_11:
+ regmap_write(regmap, reg_set, bit_r0);
+ regmap_write(regmap, reg_set, bit_r1);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static const struct mtk_pin_ies_smt_set mt8173_ies_smt_set[] = {
+ MTK_PIN_IES_SMT_SET(0, 4, 0x930, 1),
+ MTK_PIN_IES_SMT_SET(5, 9, 0x930, 2),
+ MTK_PIN_IES_SMT_SET(10, 13, 0x930, 10),
+ MTK_PIN_IES_SMT_SET(14, 15, 0x940, 10),
+ MTK_PIN_IES_SMT_SET(16, 16, 0x930, 0),
+ MTK_PIN_IES_SMT_SET(17, 17, 0x950, 2),
+ MTK_PIN_IES_SMT_SET(18, 21, 0x940, 3),
+ MTK_PIN_IES_SMT_SET(29, 32, 0x930, 3),
+ MTK_PIN_IES_SMT_SET(33, 33, 0x930, 4),
+ MTK_PIN_IES_SMT_SET(34, 36, 0x930, 5),
+ MTK_PIN_IES_SMT_SET(37, 38, 0x930, 6),
+ MTK_PIN_IES_SMT_SET(39, 39, 0x930, 7),
+ MTK_PIN_IES_SMT_SET(40, 41, 0x930, 9),
+ MTK_PIN_IES_SMT_SET(42, 42, 0x940, 0),
+ MTK_PIN_IES_SMT_SET(43, 44, 0x930, 11),
+ MTK_PIN_IES_SMT_SET(45, 46, 0x930, 12),
+ MTK_PIN_IES_SMT_SET(57, 64, 0xc20, 13),
+ MTK_PIN_IES_SMT_SET(65, 65, 0xc10, 13),
+ MTK_PIN_IES_SMT_SET(66, 66, 0xc00, 13),
+ MTK_PIN_IES_SMT_SET(67, 67, 0xd10, 13),
+ MTK_PIN_IES_SMT_SET(68, 68, 0xd00, 13),
+ MTK_PIN_IES_SMT_SET(69, 72, 0x940, 14),
+ MTK_PIN_IES_SMT_SET(73, 76, 0xc60, 13),
+ MTK_PIN_IES_SMT_SET(77, 77, 0xc40, 13),
+ MTK_PIN_IES_SMT_SET(78, 78, 0xc50, 13),
+ MTK_PIN_IES_SMT_SET(79, 82, 0x940, 15),
+ MTK_PIN_IES_SMT_SET(83, 83, 0x950, 0),
+ MTK_PIN_IES_SMT_SET(84, 85, 0x950, 1),
+ MTK_PIN_IES_SMT_SET(86, 91, 0x950, 2),
+ MTK_PIN_IES_SMT_SET(92, 92, 0x930, 13),
+ MTK_PIN_IES_SMT_SET(93, 95, 0x930, 14),
+ MTK_PIN_IES_SMT_SET(96, 99, 0x930, 15),
+ MTK_PIN_IES_SMT_SET(100, 103, 0xca0, 13),
+ MTK_PIN_IES_SMT_SET(104, 104, 0xc80, 13),
+ MTK_PIN_IES_SMT_SET(105, 105, 0xc90, 13),
+ MTK_PIN_IES_SMT_SET(106, 107, 0x940, 4),
+ MTK_PIN_IES_SMT_SET(108, 112, 0x940, 1),
+ MTK_PIN_IES_SMT_SET(113, 116, 0x940, 2),
+ MTK_PIN_IES_SMT_SET(117, 118, 0x940, 5),
+ MTK_PIN_IES_SMT_SET(119, 124, 0x940, 6),
+ MTK_PIN_IES_SMT_SET(125, 126, 0x940, 7),
+ MTK_PIN_IES_SMT_SET(127, 127, 0x940, 0),
+ MTK_PIN_IES_SMT_SET(128, 128, 0x950, 8),
+ MTK_PIN_IES_SMT_SET(129, 130, 0x950, 9),
+ MTK_PIN_IES_SMT_SET(131, 132, 0x950, 8),
+ MTK_PIN_IES_SMT_SET(133, 134, 0x910, 8)
+};
+
+static int spec_ies_smt_set(struct regmap *regmap, unsigned int pin,
+ unsigned char align, int value)
+{
+ unsigned int i, reg_addr, bit;
+ bool find = false;
+
+ for (i = 0; i < ARRAY_SIZE(mt8173_ies_smt_set); i++) {
+ if (pin >= mt8173_ies_smt_set[i].start &&
+ pin <= mt8173_ies_smt_set[i].end) {
+ find = true;
+ break;
+ }
+ }
+
+ if (!find)
+ return -EINVAL;
+
+ if (value)
+ reg_addr = mt8173_ies_smt_set[i].offset + align;
+ else
+ reg_addr = mt8173_ies_smt_set[i].offset + (align << 1);
+
+ bit = BIT(mt8173_ies_smt_set[i].bit);
+ regmap_write(regmap, reg_addr, bit);
+ return 0;
+}
+
+static const struct mtk_drv_group_desc mt8173_drv_grp[] = {
+ /* 0E4E8SR 4/8/12/16 */
+ MTK_DRV_GRP(4, 16, 1, 2, 4),
+ /* 0E2E4SR 2/4/6/8 */
+ MTK_DRV_GRP(2, 8, 1, 2, 2),
+ /* E8E4E2 2/4/6/8/10/12/14/16 */
+ MTK_DRV_GRP(2, 16, 0, 2, 2)
+};
+
+static const struct mtk_pin_drv_grp mt8173_pin_drv[] = {
+ MTK_PIN_DRV_GRP(0, DRV_BASE+0x20, 12, 0),
+ MTK_PIN_DRV_GRP(1, DRV_BASE+0x20, 12, 0),
+ MTK_PIN_DRV_GRP(2, DRV_BASE+0x20, 12, 0),
+ MTK_PIN_DRV_GRP(3, DRV_BASE+0x20, 12, 0),
+ MTK_PIN_DRV_GRP(4, DRV_BASE+0x20, 12, 0),
+ MTK_PIN_DRV_GRP(5, DRV_BASE+0x30, 0, 0),
+ MTK_PIN_DRV_GRP(6, DRV_BASE+0x30, 0, 0),
+ MTK_PIN_DRV_GRP(7, DRV_BASE+0x30, 0, 0),
+ MTK_PIN_DRV_GRP(8, DRV_BASE+0x30, 0, 0),
+ MTK_PIN_DRV_GRP(9, DRV_BASE+0x30, 0, 0),
+ MTK_PIN_DRV_GRP(10, DRV_BASE+0x30, 4, 1),
+ MTK_PIN_DRV_GRP(11, DRV_BASE+0x30, 4, 1),
+ MTK_PIN_DRV_GRP(12, DRV_BASE+0x30, 4, 1),
+ MTK_PIN_DRV_GRP(13, DRV_BASE+0x30, 4, 1),
+ MTK_PIN_DRV_GRP(14, DRV_BASE+0x40, 8, 1),
+ MTK_PIN_DRV_GRP(15, DRV_BASE+0x40, 8, 1),
+ MTK_PIN_DRV_GRP(16, DRV_BASE, 8, 1),
+ MTK_PIN_DRV_GRP(17, 0xce0, 8, 2),
+ MTK_PIN_DRV_GRP(22, 0xce0, 8, 2),
+ MTK_PIN_DRV_GRP(23, 0xce0, 8, 2),
+ MTK_PIN_DRV_GRP(24, 0xce0, 8, 2),
+ MTK_PIN_DRV_GRP(25, 0xce0, 8, 2),
+ MTK_PIN_DRV_GRP(26, 0xcc0, 8, 2),
+ MTK_PIN_DRV_GRP(27, 0xcd0, 8, 2),
+ MTK_PIN_DRV_GRP(28, 0xd70, 8, 2),
+ MTK_PIN_DRV_GRP(29, DRV_BASE+0x80, 12, 1),
+ MTK_PIN_DRV_GRP(30, DRV_BASE+0x80, 12, 1),
+ MTK_PIN_DRV_GRP(31, DRV_BASE+0x80, 12, 1),
+ MTK_PIN_DRV_GRP(32, DRV_BASE+0x80, 12, 1),
+ MTK_PIN_DRV_GRP(33, DRV_BASE+0x10, 12, 1),
+ MTK_PIN_DRV_GRP(34, DRV_BASE+0x10, 8, 1),
+ MTK_PIN_DRV_GRP(35, DRV_BASE+0x10, 8, 1),
+ MTK_PIN_DRV_GRP(36, DRV_BASE+0x10, 8, 1),
+ MTK_PIN_DRV_GRP(37, DRV_BASE+0x10, 4, 1),
+ MTK_PIN_DRV_GRP(38, DRV_BASE+0x10, 4, 1),
+ MTK_PIN_DRV_GRP(39, DRV_BASE+0x20, 0, 0),
+ MTK_PIN_DRV_GRP(40, DRV_BASE+0x20, 8, 0),
+ MTK_PIN_DRV_GRP(41, DRV_BASE+0x20, 8, 0),
+ MTK_PIN_DRV_GRP(42, DRV_BASE+0x50, 8, 1),
+ MTK_PIN_DRV_GRP(57, 0xc20, 8, 2),
+ MTK_PIN_DRV_GRP(58, 0xc20, 8, 2),
+ MTK_PIN_DRV_GRP(59, 0xc20, 8, 2),
+ MTK_PIN_DRV_GRP(60, 0xc20, 8, 2),
+ MTK_PIN_DRV_GRP(61, 0xc20, 8, 2),
+ MTK_PIN_DRV_GRP(62, 0xc20, 8, 2),
+ MTK_PIN_DRV_GRP(63, 0xc20, 8, 2),
+ MTK_PIN_DRV_GRP(64, 0xc20, 8, 2),
+ MTK_PIN_DRV_GRP(65, 0xc00, 8, 2),
+ MTK_PIN_DRV_GRP(66, 0xc10, 8, 2),
+ MTK_PIN_DRV_GRP(67, 0xd10, 8, 2),
+ MTK_PIN_DRV_GRP(68, 0xd00, 8, 2),
+ MTK_PIN_DRV_GRP(69, DRV_BASE+0x80, 0, 1),
+ MTK_PIN_DRV_GRP(70, DRV_BASE+0x80, 0, 1),
+ MTK_PIN_DRV_GRP(71, DRV_BASE+0x80, 0, 1),
+ MTK_PIN_DRV_GRP(72, DRV_BASE+0x80, 0, 1),
+ MTK_PIN_DRV_GRP(73, 0xc60, 8, 2),
+ MTK_PIN_DRV_GRP(74, 0xc60, 8, 2),
+ MTK_PIN_DRV_GRP(75, 0xc60, 8, 2),
+ MTK_PIN_DRV_GRP(76, 0xc60, 8, 2),
+ MTK_PIN_DRV_GRP(77, 0xc40, 8, 2),
+ MTK_PIN_DRV_GRP(78, 0xc50, 8, 2),
+ MTK_PIN_DRV_GRP(79, DRV_BASE+0x70, 12, 1),
+ MTK_PIN_DRV_GRP(80, DRV_BASE+0x70, 12, 1),
+ MTK_PIN_DRV_GRP(81, DRV_BASE+0x70, 12, 1),
+ MTK_PIN_DRV_GRP(82, DRV_BASE+0x70, 12, 1),
+ MTK_PIN_DRV_GRP(83, DRV_BASE, 4, 1),
+ MTK_PIN_DRV_GRP(84, DRV_BASE, 0, 1),
+ MTK_PIN_DRV_GRP(85, DRV_BASE, 0, 1),
+ MTK_PIN_DRV_GRP(85, DRV_BASE+0x60, 8, 1),
+ MTK_PIN_DRV_GRP(86, DRV_BASE+0x60, 8, 1),
+ MTK_PIN_DRV_GRP(87, DRV_BASE+0x60, 8, 1),
+ MTK_PIN_DRV_GRP(88, DRV_BASE+0x60, 8, 1),
+ MTK_PIN_DRV_GRP(89, DRV_BASE+0x60, 8, 1),
+ MTK_PIN_DRV_GRP(90, DRV_BASE+0x60, 8, 1),
+ MTK_PIN_DRV_GRP(91, DRV_BASE+0x60, 8, 1),
+ MTK_PIN_DRV_GRP(92, DRV_BASE+0x60, 4, 0),
+ MTK_PIN_DRV_GRP(93, DRV_BASE+0x60, 0, 0),
+ MTK_PIN_DRV_GRP(94, DRV_BASE+0x60, 0, 0),
+ MTK_PIN_DRV_GRP(95, DRV_BASE+0x60, 0, 0),
+ MTK_PIN_DRV_GRP(96, DRV_BASE+0x80, 8, 1),
+ MTK_PIN_DRV_GRP(97, DRV_BASE+0x80, 8, 1),
+ MTK_PIN_DRV_GRP(98, DRV_BASE+0x80, 8, 1),
+ MTK_PIN_DRV_GRP(99, DRV_BASE+0x80, 8, 1),
+ MTK_PIN_DRV_GRP(100, 0xca0, 8, 2),
+ MTK_PIN_DRV_GRP(101, 0xca0, 8, 2),
+ MTK_PIN_DRV_GRP(102, 0xca0, 8, 2),
+ MTK_PIN_DRV_GRP(103, 0xca0, 8, 2),
+ MTK_PIN_DRV_GRP(104, 0xc80, 8, 2),
+ MTK_PIN_DRV_GRP(105, 0xc90, 8, 2),
+ MTK_PIN_DRV_GRP(108, DRV_BASE+0x50, 0, 1),
+ MTK_PIN_DRV_GRP(109, DRV_BASE+0x50, 0, 1),
+ MTK_PIN_DRV_GRP(110, DRV_BASE+0x50, 0, 1),
+ MTK_PIN_DRV_GRP(111, DRV_BASE+0x50, 0, 1),
+ MTK_PIN_DRV_GRP(112, DRV_BASE+0x50, 0, 1),
+ MTK_PIN_DRV_GRP(113, DRV_BASE+0x80, 4, 1),
+ MTK_PIN_DRV_GRP(114, DRV_BASE+0x80, 4, 1),
+ MTK_PIN_DRV_GRP(115, DRV_BASE+0x80, 4, 1),
+ MTK_PIN_DRV_GRP(116, DRV_BASE+0x80, 4, 1),
+ MTK_PIN_DRV_GRP(117, DRV_BASE+0x90, 0, 1),
+ MTK_PIN_DRV_GRP(118, DRV_BASE+0x90, 0, 1),
+ MTK_PIN_DRV_GRP(119, DRV_BASE+0x50, 4, 1),
+ MTK_PIN_DRV_GRP(120, DRV_BASE+0x50, 4, 1),
+ MTK_PIN_DRV_GRP(121, DRV_BASE+0x50, 4, 1),
+ MTK_PIN_DRV_GRP(122, DRV_BASE+0x50, 4, 1),
+ MTK_PIN_DRV_GRP(123, DRV_BASE+0x50, 4, 1),
+ MTK_PIN_DRV_GRP(124, DRV_BASE+0x50, 4, 1),
+ MTK_PIN_DRV_GRP(125, DRV_BASE+0x30, 12, 1),
+ MTK_PIN_DRV_GRP(126, DRV_BASE+0x30, 12, 1),
+ MTK_PIN_DRV_GRP(127, DRV_BASE+0x50, 8, 1),
+ MTK_PIN_DRV_GRP(128, DRV_BASE+0x40, 0, 1),
+ MTK_PIN_DRV_GRP(129, DRV_BASE+0x40, 0, 1),
+ MTK_PIN_DRV_GRP(130, DRV_BASE+0x40, 0, 1),
+ MTK_PIN_DRV_GRP(131, DRV_BASE+0x40, 0, 1),
+ MTK_PIN_DRV_GRP(132, DRV_BASE+0x40, 0, 1)
+};
+
+static const struct mtk_pinctrl_devdata mt8173_pinctrl_data = {
+ .pins = mtk_pins_mt8173,
+ .npins = ARRAY_SIZE(mtk_pins_mt8173),
+ .grp_desc = mt8173_drv_grp,
+ .n_grp_cls = ARRAY_SIZE(mt8173_drv_grp),
+ .pin_drv_grp = mt8173_pin_drv,
+ .n_pin_drv_grps = ARRAY_SIZE(mt8173_pin_drv),
+ .spec_pull_set = spec_pull_set,
+ .spec_ies_smt_set = spec_ies_smt_set,
+ .dir_offset = 0x0000,
+ .pullen_offset = 0x0100,
+ .pullsel_offset = 0x0200,
+ .dout_offset = 0x0400,
+ .din_offset = 0x0500,
+ .pinmux_offset = 0x0600,
+ .type1_start = 135,
+ .type1_end = 135,
+ .port_shf = 4,
+ .port_mask = 0xf,
+ .port_align = 4,
+ .eint_offsets = {
+ .name = "mt8173_eint",
+ .stat = 0x000,
+ .ack = 0x040,
+ .mask = 0x080,
+ .mask_set = 0x0c0,
+ .mask_clr = 0x100,
+ .sens = 0x140,
+ .sens_set = 0x180,
+ .sens_clr = 0x1c0,
+ .soft = 0x200,
+ .soft_set = 0x240,
+ .soft_clr = 0x280,
+ .pol = 0x300,
+ .pol_set = 0x340,
+ .pol_clr = 0x380,
+ .dom_en = 0x400,
+ .dbnc_ctrl = 0x500,
+ .dbnc_set = 0x600,
+ .dbnc_clr = 0x700,
+ .port_mask = 7,
+ .ports = 6,
+ },
+ .ap_num = 224,
+ .db_cnt = 16,
+};
+
+static int mt8173_pinctrl_probe(struct platform_device *pdev)
+{
+ return mtk_pctrl_init(pdev, &mt8173_pinctrl_data);
+}
+
+static const struct of_device_id mt8173_pctrl_match[] = {
+ {
+ .compatible = "mediatek,mt8173-pinctrl",
+ },
+ { }
+};
+MODULE_DEVICE_TABLE(of, mt8173_pctrl_match);
+
+static struct platform_driver mtk_pinctrl_driver = {
+ .probe = mt8173_pinctrl_probe,
+ .driver = {
+ .name = "mediatek-mt8173-pinctrl",
+ .of_match_table = mt8173_pctrl_match,
+ },
+};
+
+static int __init mtk_pinctrl_init(void)
+{
+ return platform_driver_register(&mtk_pinctrl_driver);
+}
+
+module_init(mtk_pinctrl_init);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("MediaTek Pinctrl Driver");
+MODULE_AUTHOR("Hongzhou Yang <hongzhou.yang@mediatek.com>");
--- /dev/null
+/*
+ * mt65xx pinctrl driver based on Allwinner A1X pinctrl driver.
+ * Copyright (c) 2014 MediaTek Inc.
+ * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/of_irq.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/pinctrl/machine.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinconf-generic.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/bitops.h>
+#include <linux/regmap.h>
+#include <linux/mfd/syscon.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <dt-bindings/pinctrl/mt65xx.h>
+
+#include "../core.h"
+#include "../pinconf.h"
+#include "../pinctrl-utils.h"
+#include "pinctrl-mtk-common.h"
+
+#define MAX_GPIO_MODE_PER_REG 5
+#define GPIO_MODE_BITS 3
+
+static const char * const mtk_gpio_functions[] = {
+ "func0", "func1", "func2", "func3",
+ "func4", "func5", "func6", "func7",
+};
+
+/*
+ * There are two base address for pull related configuration
+ * in mt8135, and different GPIO pins use different base address.
+ * When pin number greater than type1_start and less than type1_end,
+ * should use the second base address.
+ */
+static struct regmap *mtk_get_regmap(struct mtk_pinctrl *pctl,
+ unsigned long pin)
+{
+ if (pin >= pctl->devdata->type1_start && pin < pctl->devdata->type1_end)
+ return pctl->regmap2;
+ return pctl->regmap1;
+}
+
+static unsigned int mtk_get_port(struct mtk_pinctrl *pctl, unsigned long pin)
+{
+ /* Different SoC has different mask and port shift. */
+ return ((pin >> 4) & pctl->devdata->port_mask)
+ << pctl->devdata->port_shf;
+}
+
+static int mtk_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
+ struct pinctrl_gpio_range *range, unsigned offset,
+ bool input)
+{
+ unsigned int reg_addr;
+ unsigned int bit;
+ struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
+
+ reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dir_offset;
+ bit = BIT(offset & 0xf);
+
+ if (input)
+ /* Different SoC has different alignment offset. */
+ reg_addr = CLR_ADDR(reg_addr, pctl);
+ else
+ reg_addr = SET_ADDR(reg_addr, pctl);
+
+ regmap_write(mtk_get_regmap(pctl, offset), reg_addr, bit);
+ return 0;
+}
+
+static void mtk_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+ unsigned int reg_addr;
+ unsigned int bit;
+ struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev);
+
+ reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dout_offset;
+ bit = BIT(offset & 0xf);
+
+ if (value)
+ reg_addr = SET_ADDR(reg_addr, pctl);
+ else
+ reg_addr = CLR_ADDR(reg_addr, pctl);
+
+ regmap_write(mtk_get_regmap(pctl, offset), reg_addr, bit);
+}
+
+static void mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin,
+ int value, enum pin_config_param param)
+{
+ unsigned int reg_addr, offset;
+ unsigned int bit;
+ int ret;
+
+ /*
+ * Due to some pins are irregular, their input enable and smt
+ * control register are discontinuous, but they are mapping together.
+ * So we need this special handle.
+ */
+ if (pctl->devdata->spec_ies_smt_set) {
+ ret = pctl->devdata->spec_ies_smt_set(mtk_get_regmap(pctl, pin),
+ pin, pctl->devdata->port_align, value);
+ if (!ret)
+ return;
+ }
+
+ bit = BIT(pin & 0xf);
+
+ if (param == PIN_CONFIG_INPUT_ENABLE)
+ offset = pctl->devdata->ies_offset;
+ else
+ offset = pctl->devdata->smt_offset;
+
+ if (value)
+ reg_addr = SET_ADDR(mtk_get_port(pctl, pin) + offset, pctl);
+ else
+ reg_addr = CLR_ADDR(mtk_get_port(pctl, pin) + offset, pctl);
+
+ regmap_write(mtk_get_regmap(pctl, pin), reg_addr, bit);
+}
+
+static const struct mtk_pin_drv_grp *mtk_find_pin_drv_grp_by_pin(
+ struct mtk_pinctrl *pctl, unsigned long pin) {
+ int i;
+
+ for (i = 0; i < pctl->devdata->n_pin_drv_grps; i++) {
+ const struct mtk_pin_drv_grp *pin_drv =
+ pctl->devdata->pin_drv_grp + i;
+ if (pin == pin_drv->pin)
+ return pin_drv;
+ }
+
+ return NULL;
+}
+
+static int mtk_pconf_set_driving(struct mtk_pinctrl *pctl,
+ unsigned int pin, unsigned char driving)
+{
+ const struct mtk_pin_drv_grp *pin_drv;
+ unsigned int val;
+ unsigned int bits, mask, shift;
+ const struct mtk_drv_group_desc *drv_grp;
+
+ if (pin >= pctl->devdata->npins)
+ return -EINVAL;
+
+ pin_drv = mtk_find_pin_drv_grp_by_pin(pctl, pin);
+ if (!pin_drv || pin_drv->grp > pctl->devdata->n_grp_cls)
+ return -EINVAL;
+
+ drv_grp = pctl->devdata->grp_desc + pin_drv->grp;
+ if (driving >= drv_grp->min_drv && driving <= drv_grp->max_drv
+ && !(driving % drv_grp->step)) {
+ val = driving / drv_grp->step - 1;
+ bits = drv_grp->high_bit - drv_grp->low_bit + 1;
+ mask = BIT(bits) - 1;
+ shift = pin_drv->bit + drv_grp->low_bit;
+ mask <<= shift;
+ val <<= shift;
+ return regmap_update_bits(mtk_get_regmap(pctl, pin),
+ pin_drv->offset, mask, val);
+ }
+
+ return -EINVAL;
+}
+
+static int mtk_pconf_set_pull_select(struct mtk_pinctrl *pctl,
+ unsigned int pin, bool enable, bool isup, unsigned int arg)
+{
+ unsigned int bit;
+ unsigned int reg_pullen, reg_pullsel;
+ int ret;
+
+ /* Some pins' pull setting are very different,
+ * they have separate pull up/down bit, R0 and R1
+ * resistor bit, so we need this special handle.
+ */
+ if (pctl->devdata->spec_pull_set) {
+ ret = pctl->devdata->spec_pull_set(mtk_get_regmap(pctl, pin),
+ pin, pctl->devdata->port_align, isup, arg);
+ if (!ret)
+ return 0;
+ }
+
+ /* For generic pull config, default arg value should be 0 or 1. */
+ if (arg != 0 && arg != 1) {
+ dev_err(pctl->dev, "invalid pull-up argument %d on pin %d .\n",
+ arg, pin);
+ return -EINVAL;
+ }
+
+ bit = BIT(pin & 0xf);
+ if (enable)
+ reg_pullen = SET_ADDR(mtk_get_port(pctl, pin) +
+ pctl->devdata->pullen_offset, pctl);
+ else
+ reg_pullen = CLR_ADDR(mtk_get_port(pctl, pin) +
+ pctl->devdata->pullen_offset, pctl);
+
+ if (isup)
+ reg_pullsel = SET_ADDR(mtk_get_port(pctl, pin) +
+ pctl->devdata->pullsel_offset, pctl);
+ else
+ reg_pullsel = CLR_ADDR(mtk_get_port(pctl, pin) +
+ pctl->devdata->pullsel_offset, pctl);
+
+ regmap_write(mtk_get_regmap(pctl, pin), reg_pullen, bit);
+ regmap_write(mtk_get_regmap(pctl, pin), reg_pullsel, bit);
+ return 0;
+}
+
+static int mtk_pconf_parse_conf(struct pinctrl_dev *pctldev,
+ unsigned int pin, enum pin_config_param param,
+ enum pin_config_param arg)
+{
+ struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
+
+ switch (param) {
+ case PIN_CONFIG_BIAS_DISABLE:
+ mtk_pconf_set_pull_select(pctl, pin, false, false, arg);
+ break;
+ case PIN_CONFIG_BIAS_PULL_UP:
+ mtk_pconf_set_pull_select(pctl, pin, true, true, arg);
+ break;
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ mtk_pconf_set_pull_select(pctl, pin, true, false, arg);
+ break;
+ case PIN_CONFIG_INPUT_ENABLE:
+ mtk_pconf_set_ies_smt(pctl, pin, arg, param);
+ break;
+ case PIN_CONFIG_OUTPUT:
+ mtk_gpio_set(pctl->chip, pin, arg);
+ mtk_pmx_gpio_set_direction(pctldev, NULL, pin, false);
+ break;
+ case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
+ mtk_pconf_set_ies_smt(pctl, pin, arg, param);
+ break;
+ case PIN_CONFIG_DRIVE_STRENGTH:
+ mtk_pconf_set_driving(pctl, pin, arg);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int mtk_pconf_group_get(struct pinctrl_dev *pctldev,
+ unsigned group,
+ unsigned long *config)
+{
+ struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
+
+ *config = pctl->groups[group].config;
+
+ return 0;
+}
+
+static int mtk_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group,
+ unsigned long *configs, unsigned num_configs)
+{
+ struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
+ struct mtk_pinctrl_group *g = &pctl->groups[group];
+ int i;
+
+ for (i = 0; i < num_configs; i++) {
+ mtk_pconf_parse_conf(pctldev, g->pin,
+ pinconf_to_config_param(configs[i]),
+ pinconf_to_config_argument(configs[i]));
+
+ g->config = configs[i];
+ }
+
+ return 0;
+}
+
+static const struct pinconf_ops mtk_pconf_ops = {
+ .pin_config_group_get = mtk_pconf_group_get,
+ .pin_config_group_set = mtk_pconf_group_set,
+};
+
+static struct mtk_pinctrl_group *
+mtk_pctrl_find_group_by_pin(struct mtk_pinctrl *pctl, u32 pin)
+{
+ int i;
+
+ for (i = 0; i < pctl->ngroups; i++) {
+ struct mtk_pinctrl_group *grp = pctl->groups + i;
+
+ if (grp->pin == pin)
+ return grp;
+ }
+
+ return NULL;
+}
+
+static const struct mtk_desc_function *mtk_pctrl_find_function_by_pin(
+ struct mtk_pinctrl *pctl, u32 pin_num, u32 fnum)
+{
+ const struct mtk_desc_pin *pin = pctl->devdata->pins + pin_num;
+ const struct mtk_desc_function *func = pin->functions;
+
+ while (func && func->name) {
+ if (func->muxval == fnum)
+ return func;
+ func++;
+ }
+
+ return NULL;
+}
+
+static bool mtk_pctrl_is_function_valid(struct mtk_pinctrl *pctl,
+ u32 pin_num, u32 fnum)
+{
+ int i;
+
+ for (i = 0; i < pctl->devdata->npins; i++) {
+ const struct mtk_desc_pin *pin = pctl->devdata->pins + i;
+
+ if (pin->pin.number == pin_num) {
+ const struct mtk_desc_function *func =
+ pin->functions;
+
+ while (func && func->name) {
+ if (func->muxval == fnum)
+ return true;
+ func++;
+ }
+
+ break;
+ }
+ }
+
+ return false;
+}
+
+static int mtk_pctrl_dt_node_to_map_func(struct mtk_pinctrl *pctl,
+ u32 pin, u32 fnum, struct mtk_pinctrl_group *grp,
+ struct pinctrl_map **map, unsigned *reserved_maps,
+ unsigned *num_maps)
+{
+ bool ret;
+
+ if (*num_maps == *reserved_maps)
+ return -ENOSPC;
+
+ (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
+ (*map)[*num_maps].data.mux.group = grp->name;
+
+ ret = mtk_pctrl_is_function_valid(pctl, pin, fnum);
+ if (!ret) {
+ dev_err(pctl->dev, "invalid function %d on pin %d .\n",
+ fnum, pin);
+ return -EINVAL;
+ }
+
+ (*map)[*num_maps].data.mux.function = mtk_gpio_functions[fnum];
+ (*num_maps)++;
+
+ return 0;
+}
+
+static int mtk_pctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
+ struct device_node *node,
+ struct pinctrl_map **map,
+ unsigned *reserved_maps,
+ unsigned *num_maps)
+{
+ struct property *pins;
+ u32 pinfunc, pin, func;
+ int num_pins, num_funcs, maps_per_pin;
+ unsigned long *configs;
+ unsigned int num_configs;
+ bool has_config = 0;
+ int i, err;
+ unsigned reserve = 0;
+ struct mtk_pinctrl_group *grp;
+ struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
+
+ pins = of_find_property(node, "pinmux", NULL);
+ if (!pins) {
+ dev_err(pctl->dev, "missing pins property in node %s .\n",
+ node->name);
+ return -EINVAL;
+ }
+
+ err = pinconf_generic_parse_dt_config(node, pctldev, &configs,
+ &num_configs);
+ if (num_configs)
+ has_config = 1;
+
+ num_pins = pins->length / sizeof(u32);
+ num_funcs = num_pins;
+ maps_per_pin = 0;
+ if (num_funcs)
+ maps_per_pin++;
+ if (has_config && num_pins >= 1)
+ maps_per_pin++;
+
+ if (!num_pins || !maps_per_pin)
+ return -EINVAL;
+
+ reserve = num_pins * maps_per_pin;
+
+ err = pinctrl_utils_reserve_map(pctldev, map,
+ reserved_maps, num_maps, reserve);
+ if (err < 0)
+ goto fail;
+
+ for (i = 0; i < num_pins; i++) {
+ err = of_property_read_u32_index(node, "pinmux",
+ i, &pinfunc);
+ if (err)
+ goto fail;
+
+ pin = MTK_GET_PIN_NO(pinfunc);
+ func = MTK_GET_PIN_FUNC(pinfunc);
+
+ if (pin >= pctl->devdata->npins ||
+ func >= ARRAY_SIZE(mtk_gpio_functions)) {
+ dev_err(pctl->dev, "invalid pins value.\n");
+ err = -EINVAL;
+ goto fail;
+ }
+
+ grp = mtk_pctrl_find_group_by_pin(pctl, pin);
+ if (!grp) {
+ dev_err(pctl->dev, "unable to match pin %d to group\n",
+ pin);
+ return -EINVAL;
+ }
+
+ err = mtk_pctrl_dt_node_to_map_func(pctl, pin, func, grp, map,
+ reserved_maps, num_maps);
+ if (err < 0)
+ goto fail;
+
+ if (has_config) {
+ err = pinctrl_utils_add_map_configs(pctldev, map,
+ reserved_maps, num_maps, grp->name,
+ configs, num_configs,
+ PIN_MAP_TYPE_CONFIGS_GROUP);
+ if (err < 0)
+ goto fail;
+ }
+ }
+
+ return 0;
+
+fail:
+ return err;
+}
+
+static int mtk_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
+ struct device_node *np_config,
+ struct pinctrl_map **map, unsigned *num_maps)
+{
+ struct device_node *np;
+ unsigned reserved_maps;
+ int ret;
+
+ *map = NULL;
+ *num_maps = 0;
+ reserved_maps = 0;
+
+ for_each_child_of_node(np_config, np) {
+ ret = mtk_pctrl_dt_subnode_to_map(pctldev, np, map,
+ &reserved_maps, num_maps);
+ if (ret < 0) {
+ pinctrl_utils_dt_free_map(pctldev, *map, *num_maps);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static int mtk_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
+{
+ struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
+
+ return pctl->ngroups;
+}
+
+static const char *mtk_pctrl_get_group_name(struct pinctrl_dev *pctldev,
+ unsigned group)
+{
+ struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
+
+ return pctl->groups[group].name;
+}
+
+static int mtk_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
+ unsigned group,
+ const unsigned **pins,
+ unsigned *num_pins)
+{
+ struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
+
+ *pins = (unsigned *)&pctl->groups[group].pin;
+ *num_pins = 1;
+
+ return 0;
+}
+
+static const struct pinctrl_ops mtk_pctrl_ops = {
+ .dt_node_to_map = mtk_pctrl_dt_node_to_map,
+ .dt_free_map = pinctrl_utils_dt_free_map,
+ .get_groups_count = mtk_pctrl_get_groups_count,
+ .get_group_name = mtk_pctrl_get_group_name,
+ .get_group_pins = mtk_pctrl_get_group_pins,
+};
+
+static int mtk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
+{
+ return ARRAY_SIZE(mtk_gpio_functions);
+}
+
+static const char *mtk_pmx_get_func_name(struct pinctrl_dev *pctldev,
+ unsigned selector)
+{
+ return mtk_gpio_functions[selector];
+}
+
+static int mtk_pmx_get_func_groups(struct pinctrl_dev *pctldev,
+ unsigned function,
+ const char * const **groups,
+ unsigned * const num_groups)
+{
+ struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
+
+ *groups = pctl->grp_names;
+ *num_groups = pctl->ngroups;
+
+ return 0;
+}
+
+static int mtk_pmx_set_mode(struct pinctrl_dev *pctldev,
+ unsigned long pin, unsigned long mode)
+{
+ unsigned int reg_addr;
+ unsigned char bit;
+ unsigned int val;
+ unsigned int mask = (1L << GPIO_MODE_BITS) - 1;
+ struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
+
+ reg_addr = ((pin / MAX_GPIO_MODE_PER_REG) << pctl->devdata->port_shf)
+ + pctl->devdata->pinmux_offset;
+
+ bit = pin % MAX_GPIO_MODE_PER_REG;
+ mask <<= (GPIO_MODE_BITS * bit);
+ val = (mode << (GPIO_MODE_BITS * bit));
+ return regmap_update_bits(mtk_get_regmap(pctl, pin),
+ reg_addr, mask, val);
+}
+
+static const struct mtk_desc_pin *
+mtk_find_pin_by_eint_num(struct mtk_pinctrl *pctl, unsigned int eint_num)
+{
+ int i;
+ const struct mtk_desc_pin *pin;
+
+ for (i = 0; i < pctl->devdata->npins; i++) {
+ pin = pctl->devdata->pins + i;
+ if (pin->eint.eintnum == eint_num)
+ return pin;
+ }
+
+ return NULL;
+}
+
+static int mtk_pmx_set_mux(struct pinctrl_dev *pctldev,
+ unsigned function,
+ unsigned group)
+{
+ bool ret;
+ const struct mtk_desc_function *desc;
+ struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
+ struct mtk_pinctrl_group *g = pctl->groups + group;
+
+ ret = mtk_pctrl_is_function_valid(pctl, g->pin, function);
+ if (!ret) {
+ dev_err(pctl->dev, "invaild function %d on group %d .\n",
+ function, group);
+ return -EINVAL;
+ }
+
+ desc = mtk_pctrl_find_function_by_pin(pctl, g->pin, function);
+ if (!desc)
+ return -EINVAL;
+ mtk_pmx_set_mode(pctldev, g->pin, desc->muxval);
+ return 0;
+}
+
+static const struct pinmux_ops mtk_pmx_ops = {
+ .get_functions_count = mtk_pmx_get_funcs_cnt,
+ .get_function_name = mtk_pmx_get_func_name,
+ .get_function_groups = mtk_pmx_get_func_groups,
+ .set_mux = mtk_pmx_set_mux,
+ .gpio_set_direction = mtk_pmx_gpio_set_direction,
+};
+
+static int mtk_gpio_request(struct gpio_chip *chip, unsigned offset)
+{
+ return pinctrl_request_gpio(chip->base + offset);
+}
+
+static void mtk_gpio_free(struct gpio_chip *chip, unsigned offset)
+{
+ pinctrl_free_gpio(chip->base + offset);
+}
+
+static int mtk_gpio_direction_input(struct gpio_chip *chip,
+ unsigned offset)
+{
+ return pinctrl_gpio_direction_input(chip->base + offset);
+}
+
+static int mtk_gpio_direction_output(struct gpio_chip *chip,
+ unsigned offset, int value)
+{
+ mtk_gpio_set(chip, offset, value);
+ return pinctrl_gpio_direction_output(chip->base + offset);
+}
+
+static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
+{
+ unsigned int reg_addr;
+ unsigned int bit;
+ unsigned int read_val = 0;
+
+ struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev);
+
+ reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dir_offset;
+ bit = BIT(offset & 0xf);
+ regmap_read(pctl->regmap1, reg_addr, &read_val);
+ return !!(read_val & bit);
+}
+
+static int mtk_gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+ unsigned int reg_addr;
+ unsigned int bit;
+ unsigned int read_val = 0;
+ struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev);
+
+ if (mtk_gpio_get_direction(chip, offset))
+ reg_addr = mtk_get_port(pctl, offset) +
+ pctl->devdata->dout_offset;
+ else
+ reg_addr = mtk_get_port(pctl, offset) +
+ pctl->devdata->din_offset;
+
+ bit = BIT(offset & 0xf);
+ regmap_read(pctl->regmap1, reg_addr, &read_val);
+ return !!(read_val & bit);
+}
+
+static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
+{
+ const struct mtk_desc_pin *pin;
+ struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev);
+ int irq;
+
+ pin = pctl->devdata->pins + offset;
+ if (pin->eint.eintnum == NO_EINT_SUPPORT)
+ return -EINVAL;
+
+ irq = irq_find_mapping(pctl->domain, pin->eint.eintnum);
+ if (!irq)
+ return -EINVAL;
+
+ return irq;
+}
+
+static int mtk_pinctrl_irq_request_resources(struct irq_data *d)
+{
+ struct mtk_pinctrl *pctl = irq_data_get_irq_chip_data(d);
+ const struct mtk_desc_pin *pin;
+ int ret;
+
+ pin = mtk_find_pin_by_eint_num(pctl, d->hwirq);
+
+ if (!pin) {
+ dev_err(pctl->dev, "Can not find pin\n");
+ return -EINVAL;
+ }
+
+ ret = gpiochip_lock_as_irq(pctl->chip, pin->pin.number);
+ if (ret) {
+ dev_err(pctl->dev, "unable to lock HW IRQ %lu for IRQ\n",
+ irqd_to_hwirq(d));
+ return ret;
+ }
+
+ /* set mux to INT mode */
+ mtk_pmx_set_mode(pctl->pctl_dev, pin->pin.number, pin->eint.eintmux);
+
+ return 0;
+}
+
+static void mtk_pinctrl_irq_release_resources(struct irq_data *d)
+{
+ struct mtk_pinctrl *pctl = irq_data_get_irq_chip_data(d);
+ const struct mtk_desc_pin *pin;
+
+ pin = mtk_find_pin_by_eint_num(pctl, d->hwirq);
+
+ if (!pin) {
+ dev_err(pctl->dev, "Can not find pin\n");
+ return;
+ }
+
+ gpiochip_unlock_as_irq(pctl->chip, pin->pin.number);
+}
+
+static void __iomem *mtk_eint_get_offset(struct mtk_pinctrl *pctl,
+ unsigned int eint_num, unsigned int offset)
+{
+ unsigned int eint_base = 0;
+ void __iomem *reg;
+
+ if (eint_num >= pctl->devdata->ap_num)
+ eint_base = pctl->devdata->ap_num;
+
+ reg = pctl->eint_reg_base + offset + ((eint_num - eint_base) / 32) * 4;
+
+ return reg;
+}
+
+/*
+ * mtk_can_en_debounce: Check the EINT number is able to enable debounce or not
+ * @eint_num: the EINT number to setmtk_pinctrl
+ */
+static unsigned int mtk_eint_can_en_debounce(struct mtk_pinctrl *pctl,
+ unsigned int eint_num)
+{
+ unsigned int sens;
+ unsigned int bit = BIT(eint_num % 32);
+ const struct mtk_eint_offsets *eint_offsets =
+ &pctl->devdata->eint_offsets;
+
+ void __iomem *reg = mtk_eint_get_offset(pctl, eint_num,
+ eint_offsets->sens);
+
+ if (readl(reg) & bit)
+ sens = MT_LEVEL_SENSITIVE;
+ else
+ sens = MT_EDGE_SENSITIVE;
+
+ if ((eint_num < pctl->devdata->db_cnt) && (sens != MT_EDGE_SENSITIVE))
+ return 1;
+ else
+ return 0;
+}
+
+/*
+ * mtk_eint_get_mask: To get the eint mask
+ * @eint_num: the EINT number to get
+ */
+static unsigned int mtk_eint_get_mask(struct mtk_pinctrl *pctl,
+ unsigned int eint_num)
+{
+ unsigned int bit = BIT(eint_num % 32);
+ const struct mtk_eint_offsets *eint_offsets =
+ &pctl->devdata->eint_offsets;
+
+ void __iomem *reg = mtk_eint_get_offset(pctl, eint_num,
+ eint_offsets->mask);
+
+ return !!(readl(reg) & bit);
+}
+
+static int mtk_eint_flip_edge(struct mtk_pinctrl *pctl, int hwirq)
+{
+ int start_level, curr_level;
+ unsigned int reg_offset;
+ const struct mtk_eint_offsets *eint_offsets = &(pctl->devdata->eint_offsets);
+ u32 mask = 1 << (hwirq & 0x1f);
+ u32 port = (hwirq >> 5) & eint_offsets->port_mask;
+ void __iomem *reg = pctl->eint_reg_base + (port << 2);
+ const struct mtk_desc_pin *pin;
+
+ pin = mtk_find_pin_by_eint_num(pctl, hwirq);
+ curr_level = mtk_gpio_get(pctl->chip, pin->pin.number);
+ do {
+ start_level = curr_level;
+ if (start_level)
+ reg_offset = eint_offsets->pol_clr;
+ else
+ reg_offset = eint_offsets->pol_set;
+ writel(mask, reg + reg_offset);
+
+ curr_level = mtk_gpio_get(pctl->chip, pin->pin.number);
+ } while (start_level != curr_level);
+
+ return start_level;
+}
+
+static void mtk_eint_mask(struct irq_data *d)
+{
+ struct mtk_pinctrl *pctl = irq_data_get_irq_chip_data(d);
+ const struct mtk_eint_offsets *eint_offsets =
+ &pctl->devdata->eint_offsets;
+ u32 mask = BIT(d->hwirq & 0x1f);
+ void __iomem *reg = mtk_eint_get_offset(pctl, d->hwirq,
+ eint_offsets->mask_set);
+
+ writel(mask, reg);
+}
+
+static void mtk_eint_unmask(struct irq_data *d)
+{
+ struct mtk_pinctrl *pctl = irq_data_get_irq_chip_data(d);
+ const struct mtk_eint_offsets *eint_offsets =
+ &pctl->devdata->eint_offsets;
+ u32 mask = BIT(d->hwirq & 0x1f);
+ void __iomem *reg = mtk_eint_get_offset(pctl, d->hwirq,
+ eint_offsets->mask_clr);
+
+ writel(mask, reg);
+
+ if (pctl->eint_dual_edges[d->hwirq])
+ mtk_eint_flip_edge(pctl, d->hwirq);
+}
+
+static int mtk_gpio_set_debounce(struct gpio_chip *chip, unsigned offset,
+ unsigned debounce)
+{
+ struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev);
+ int eint_num, virq, eint_offset;
+ unsigned int set_offset, bit, clr_bit, clr_offset, rst, i, unmask, dbnc;
+ static const unsigned int dbnc_arr[] = {0 , 1, 16, 32, 64, 128, 256};
+ const struct mtk_desc_pin *pin;
+ struct irq_data *d;
+
+ pin = pctl->devdata->pins + offset;
+ if (pin->eint.eintnum == NO_EINT_SUPPORT)
+ return -EINVAL;
+
+ eint_num = pin->eint.eintnum;
+ virq = irq_find_mapping(pctl->domain, eint_num);
+ eint_offset = (eint_num % 4) * 8;
+ d = irq_get_irq_data(virq);
+
+ set_offset = (eint_num / 4) * 4 + pctl->devdata->eint_offsets.dbnc_set;
+ clr_offset = (eint_num / 4) * 4 + pctl->devdata->eint_offsets.dbnc_clr;
+ if (!mtk_eint_can_en_debounce(pctl, eint_num))
+ return -ENOSYS;
+
+ dbnc = ARRAY_SIZE(dbnc_arr);
+ for (i = 0; i < ARRAY_SIZE(dbnc_arr); i++) {
+ if (debounce <= dbnc_arr[i]) {
+ dbnc = i;
+ break;
+ }
+ }
+
+ if (!mtk_eint_get_mask(pctl, eint_num)) {
+ mtk_eint_mask(d);
+ unmask = 1;
+ }
+
+ clr_bit = 0xff << eint_offset;
+ writel(clr_bit, pctl->eint_reg_base + clr_offset);
+
+ bit = ((dbnc << EINT_DBNC_SET_DBNC_BITS) | EINT_DBNC_SET_EN) <<
+ eint_offset;
+ rst = EINT_DBNC_RST_BIT << eint_offset;
+ writel(rst | bit, pctl->eint_reg_base + set_offset);
+
+ /* Delay a while (more than 2T) to wait for hw debounce counter reset
+ work correctly */
+ udelay(1);
+ if (unmask == 1)
+ mtk_eint_unmask(d);
+
+ return 0;
+}
+
+static struct gpio_chip mtk_gpio_chip = {
+ .owner = THIS_MODULE,
+ .request = mtk_gpio_request,
+ .free = mtk_gpio_free,
+ .direction_input = mtk_gpio_direction_input,
+ .direction_output = mtk_gpio_direction_output,
+ .get = mtk_gpio_get,
+ .set = mtk_gpio_set,
+ .to_irq = mtk_gpio_to_irq,
+ .set_debounce = mtk_gpio_set_debounce,
+ .of_gpio_n_cells = 2,
+};
+
+static int mtk_eint_set_type(struct irq_data *d,
+ unsigned int type)
+{
+ struct mtk_pinctrl *pctl = irq_data_get_irq_chip_data(d);
+ const struct mtk_eint_offsets *eint_offsets =
+ &pctl->devdata->eint_offsets;
+ u32 mask = BIT(d->hwirq & 0x1f);
+ void __iomem *reg;
+
+ if (((type & IRQ_TYPE_EDGE_BOTH) && (type & IRQ_TYPE_LEVEL_MASK)) ||
+ ((type & IRQ_TYPE_LEVEL_MASK) == IRQ_TYPE_LEVEL_MASK)) {
+ dev_err(pctl->dev, "Can't configure IRQ%d (EINT%lu) for type 0x%X\n",
+ d->irq, d->hwirq, type);
+ return -EINVAL;
+ }
+
+ if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH)
+ pctl->eint_dual_edges[d->hwirq] = 1;
+ else
+ pctl->eint_dual_edges[d->hwirq] = 0;
+
+ if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_EDGE_FALLING)) {
+ reg = mtk_eint_get_offset(pctl, d->hwirq,
+ eint_offsets->pol_clr);
+ writel(mask, reg);
+ } else {
+ reg = mtk_eint_get_offset(pctl, d->hwirq,
+ eint_offsets->pol_set);
+ writel(mask, reg);
+ }
+
+ if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
+ reg = mtk_eint_get_offset(pctl, d->hwirq,
+ eint_offsets->sens_clr);
+ writel(mask, reg);
+ } else {
+ reg = mtk_eint_get_offset(pctl, d->hwirq,
+ eint_offsets->sens_set);
+ writel(mask, reg);
+ }
+
+ if (pctl->eint_dual_edges[d->hwirq])
+ mtk_eint_flip_edge(pctl, d->hwirq);
+
+ return 0;
+}
+
+static void mtk_eint_ack(struct irq_data *d)
+{
+ struct mtk_pinctrl *pctl = irq_data_get_irq_chip_data(d);
+ const struct mtk_eint_offsets *eint_offsets =
+ &pctl->devdata->eint_offsets;
+ u32 mask = BIT(d->hwirq & 0x1f);
+ void __iomem *reg = mtk_eint_get_offset(pctl, d->hwirq,
+ eint_offsets->ack);
+
+ writel(mask, reg);
+}
+
+static struct irq_chip mtk_pinctrl_irq_chip = {
+ .name = "mt-eint",
+ .irq_mask = mtk_eint_mask,
+ .irq_unmask = mtk_eint_unmask,
+ .irq_ack = mtk_eint_ack,
+ .irq_set_type = mtk_eint_set_type,
+ .irq_request_resources = mtk_pinctrl_irq_request_resources,
+ .irq_release_resources = mtk_pinctrl_irq_release_resources,
+};
+
+static unsigned int mtk_eint_init(struct mtk_pinctrl *pctl)
+{
+ const struct mtk_eint_offsets *eint_offsets =
+ &pctl->devdata->eint_offsets;
+ void __iomem *reg = pctl->eint_reg_base + eint_offsets->dom_en;
+ unsigned int i;
+
+ for (i = 0; i < pctl->devdata->ap_num; i += 32) {
+ writel(0xffffffff, reg);
+ reg += 4;
+ }
+ return 0;
+}
+
+static inline void
+mtk_eint_debounce_process(struct mtk_pinctrl *pctl, int index)
+{
+ unsigned int rst, ctrl_offset;
+ unsigned int bit, dbnc;
+ const struct mtk_eint_offsets *eint_offsets =
+ &pctl->devdata->eint_offsets;
+
+ ctrl_offset = (index / 4) * 4 + eint_offsets->dbnc_ctrl;
+ dbnc = readl(pctl->eint_reg_base + ctrl_offset);
+ bit = EINT_DBNC_SET_EN << ((index % 4) * 8);
+ if ((bit & dbnc) > 0) {
+ ctrl_offset = (index / 4) * 4 + eint_offsets->dbnc_set;
+ rst = EINT_DBNC_RST_BIT << ((index % 4) * 8);
+ writel(rst, pctl->eint_reg_base + ctrl_offset);
+ }
+}
+
+static void mtk_eint_irq_handler(unsigned irq, struct irq_desc *desc)
+{
+ struct irq_chip *chip = irq_get_chip(irq);
+ struct mtk_pinctrl *pctl = irq_get_handler_data(irq);
+ unsigned int status, eint_num;
+ int offset, index, virq;
+ const struct mtk_eint_offsets *eint_offsets =
+ &pctl->devdata->eint_offsets;
+ void __iomem *reg = mtk_eint_get_offset(pctl, 0, eint_offsets->stat);
+ int dual_edges, start_level, curr_level;
+ const struct mtk_desc_pin *pin;
+
+ chained_irq_enter(chip, desc);
+ for (eint_num = 0; eint_num < pctl->devdata->ap_num; eint_num += 32) {
+ status = readl(reg);
+ reg += 4;
+ while (status) {
+ offset = __ffs(status);
+ index = eint_num + offset;
+ virq = irq_find_mapping(pctl->domain, index);
+ status &= ~BIT(offset);
+
+ dual_edges = pctl->eint_dual_edges[index];
+ if (dual_edges) {
+ /* Clear soft-irq in case we raised it
+ last time */
+ writel(BIT(offset), reg - eint_offsets->stat +
+ eint_offsets->soft_clr);
+
+ pin = mtk_find_pin_by_eint_num(pctl, index);
+ start_level = mtk_gpio_get(pctl->chip,
+ pin->pin.number);
+ }
+
+ generic_handle_irq(virq);
+
+ if (dual_edges) {
+ curr_level = mtk_eint_flip_edge(pctl, index);
+
+ /* If level changed, we might lost one edge
+ interrupt, raised it through soft-irq */
+ if (start_level != curr_level)
+ writel(BIT(offset), reg -
+ eint_offsets->stat +
+ eint_offsets->soft_set);
+ }
+
+ if (index < pctl->devdata->db_cnt)
+ mtk_eint_debounce_process(pctl , index);
+ }
+ }
+ chained_irq_exit(chip, desc);
+}
+
+static int mtk_pctrl_build_state(struct platform_device *pdev)
+{
+ struct mtk_pinctrl *pctl = platform_get_drvdata(pdev);
+ int i;
+
+ pctl->ngroups = pctl->devdata->npins;
+
+ /* Allocate groups */
+ pctl->groups = devm_kcalloc(&pdev->dev, pctl->ngroups,
+ sizeof(*pctl->groups), GFP_KERNEL);
+ if (!pctl->groups)
+ return -ENOMEM;
+
+ /* We assume that one pin is one group, use pin name as group name. */
+ pctl->grp_names = devm_kcalloc(&pdev->dev, pctl->ngroups,
+ sizeof(*pctl->grp_names), GFP_KERNEL);
+ if (!pctl->grp_names)
+ return -ENOMEM;
+
+ for (i = 0; i < pctl->devdata->npins; i++) {
+ const struct mtk_desc_pin *pin = pctl->devdata->pins + i;
+ struct mtk_pinctrl_group *group = pctl->groups + i;
+
+ group->name = pin->pin.name;
+ group->pin = pin->pin.number;
+
+ pctl->grp_names[i] = pin->pin.name;
+ }
+
+ return 0;
+}
+
+static struct pinctrl_desc mtk_pctrl_desc = {
+ .confops = &mtk_pconf_ops,
+ .pctlops = &mtk_pctrl_ops,
+ .pmxops = &mtk_pmx_ops,
+};
+
+int mtk_pctrl_init(struct platform_device *pdev,
+ const struct mtk_pinctrl_devdata *data)
+{
+ struct pinctrl_pin_desc *pins;
+ struct mtk_pinctrl *pctl;
+ struct device_node *np = pdev->dev.of_node, *node;
+ struct property *prop;
+ struct resource *res;
+ int i, ret, irq;
+
+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
+ if (!pctl)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, pctl);
+
+ prop = of_find_property(np, "pins-are-numbered", NULL);
+ if (!prop) {
+ dev_err(&pdev->dev, "only support pins-are-numbered format\n");
+ return -EINVAL;
+ }
+
+ node = of_parse_phandle(np, "mediatek,pctl-regmap", 0);
+ if (node) {
+ pctl->regmap1 = syscon_node_to_regmap(node);
+ if (IS_ERR(pctl->regmap1))
+ return PTR_ERR(pctl->regmap1);
+ }
+
+ /* Only 8135 has two base addr, other SoCs have only one. */
+ node = of_parse_phandle(np, "mediatek,pctl-regmap", 1);
+ if (node) {
+ pctl->regmap2 = syscon_node_to_regmap(node);
+ if (IS_ERR(pctl->regmap2))
+ return PTR_ERR(pctl->regmap2);
+ }
+
+ pctl->devdata = data;
+ ret = mtk_pctrl_build_state(pdev);
+ if (ret) {
+ dev_err(&pdev->dev, "build state failed: %d\n", ret);
+ return -EINVAL;
+ }
+
+ pins = devm_kcalloc(&pdev->dev, pctl->devdata->npins, sizeof(*pins),
+ GFP_KERNEL);
+ if (!pins)
+ return -ENOMEM;
+
+ for (i = 0; i < pctl->devdata->npins; i++)
+ pins[i] = pctl->devdata->pins[i].pin;
+ mtk_pctrl_desc.name = dev_name(&pdev->dev);
+ mtk_pctrl_desc.owner = THIS_MODULE;
+ mtk_pctrl_desc.pins = pins;
+ mtk_pctrl_desc.npins = pctl->devdata->npins;
+ pctl->dev = &pdev->dev;
+ pctl->pctl_dev = pinctrl_register(&mtk_pctrl_desc, &pdev->dev, pctl);
+ if (!pctl->pctl_dev) {
+ dev_err(&pdev->dev, "couldn't register pinctrl driver\n");
+ return -EINVAL;
+ }
+
+ pctl->chip = devm_kzalloc(&pdev->dev, sizeof(*pctl->chip), GFP_KERNEL);
+ if (!pctl->chip) {
+ ret = -ENOMEM;
+ goto pctrl_error;
+ }
+
+ pctl->chip = &mtk_gpio_chip;
+ pctl->chip->ngpio = pctl->devdata->npins;
+ pctl->chip->label = dev_name(&pdev->dev);
+ pctl->chip->dev = &pdev->dev;
+ pctl->chip->base = 0;
+
+ ret = gpiochip_add(pctl->chip);
+ if (ret) {
+ ret = -EINVAL;
+ goto pctrl_error;
+ }
+
+ /* Register the GPIO to pin mappings. */
+ ret = gpiochip_add_pin_range(pctl->chip, dev_name(&pdev->dev),
+ 0, 0, pctl->devdata->npins);
+ if (ret) {
+ ret = -EINVAL;
+ goto chip_error;
+ }
+
+ /* Get EINT register base from dts. */
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&pdev->dev, "Unable to get Pinctrl resource\n");
+ ret = -EINVAL;
+ goto chip_error;
+ }
+
+ pctl->eint_reg_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(pctl->eint_reg_base)) {
+ ret = -EINVAL;
+ goto chip_error;
+ }
+
+ pctl->eint_dual_edges = devm_kcalloc(&pdev->dev, pctl->devdata->ap_num,
+ sizeof(int), GFP_KERNEL);
+ if (!pctl->eint_dual_edges) {
+ ret = -ENOMEM;
+ goto chip_error;
+ }
+
+ irq = irq_of_parse_and_map(np, 0);
+ if (!irq) {
+ dev_err(&pdev->dev, "couldn't parse and map irq\n");
+ ret = -EINVAL;
+ goto chip_error;
+ }
+
+ pctl->domain = irq_domain_add_linear(np,
+ pctl->devdata->ap_num, &irq_domain_simple_ops, NULL);
+ if (!pctl->domain) {
+ dev_err(&pdev->dev, "Couldn't register IRQ domain\n");
+ ret = -ENOMEM;
+ goto chip_error;
+ }
+
+ mtk_eint_init(pctl);
+ for (i = 0; i < pctl->devdata->ap_num; i++) {
+ int virq = irq_create_mapping(pctl->domain, i);
+
+ irq_set_chip_and_handler(virq, &mtk_pinctrl_irq_chip,
+ handle_level_irq);
+ irq_set_chip_data(virq, pctl);
+ set_irq_flags(virq, IRQF_VALID);
+ };
+
+ irq_set_chained_handler(irq, mtk_eint_irq_handler);
+ irq_set_handler_data(irq, pctl);
+ set_irq_flags(irq, IRQF_VALID);
+ return 0;
+
+chip_error:
+ gpiochip_remove(pctl->chip);
+pctrl_error:
+ pinctrl_unregister(pctl->pctl_dev);
+ return ret;
+}
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("MediaTek Pinctrl Driver");
+MODULE_AUTHOR("Hongzhou Yang <hongzhou.yang@mediatek.com>");
--- /dev/null
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __PINCTRL_MTK_COMMON_H
+#define __PINCTRL_MTK_COMMON_H
+
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/regmap.h>
+
+#define NO_EINT_SUPPORT 255
+#define MTK_CHIP_TYPE_BASE 0
+#define MTK_CHIP_TYPE_PMIC 1
+#define MT_EDGE_SENSITIVE 0
+#define MT_LEVEL_SENSITIVE 1
+#define EINT_DBNC_SET_DBNC_BITS 4
+#define EINT_DBNC_RST_BIT (0x1 << 1)
+#define EINT_DBNC_SET_EN (0x1 << 0)
+
+struct mtk_desc_function {
+ const char *name;
+ unsigned char muxval;
+};
+
+struct mtk_desc_eint {
+ unsigned char eintmux;
+ unsigned char eintnum;
+};
+
+struct mtk_desc_pin {
+ struct pinctrl_pin_desc pin;
+ const char *chip;
+ const struct mtk_desc_eint eint;
+ const struct mtk_desc_function *functions;
+};
+
+#define MTK_PIN(_pin, _pad, _chip, _eint, ...) \
+ { \
+ .pin = _pin, \
+ .chip = _chip, \
+ .eint = _eint, \
+ .functions = (struct mtk_desc_function[]){ \
+ __VA_ARGS__, { } }, \
+ }
+
+#define MTK_EINT_FUNCTION(_eintmux, _eintnum) \
+ { \
+ .eintmux = _eintmux, \
+ .eintnum = _eintnum, \
+ }
+
+#define MTK_FUNCTION(_val, _name) \
+ { \
+ .muxval = _val, \
+ .name = _name, \
+ }
+
+#define SET_ADDR(x, y) (x + (y->devdata->port_align))
+#define CLR_ADDR(x, y) (x + (y->devdata->port_align << 1))
+
+struct mtk_pinctrl_group {
+ const char *name;
+ unsigned long config;
+ unsigned pin;
+};
+
+/**
+ * struct mtk_drv_group_desc - Provide driving group data.
+ * @max_drv: The maximum current of this group.
+ * @min_drv: The minimum current of this group.
+ * @low_bit: The lowest bit of this group.
+ * @high_bit: The highest bit of this group.
+ * @step: The step current of this group.
+ */
+struct mtk_drv_group_desc {
+ unsigned char min_drv;
+ unsigned char max_drv;
+ unsigned char low_bit;
+ unsigned char high_bit;
+ unsigned char step;
+};
+
+#define MTK_DRV_GRP(_min, _max, _low, _high, _step) \
+ { \
+ .min_drv = _min, \
+ .max_drv = _max, \
+ .low_bit = _low, \
+ .high_bit = _high, \
+ .step = _step, \
+ }
+
+/**
+ * struct mtk_pin_drv_grp - Provide each pin driving info.
+ * @pin: The pin number.
+ * @offset: The offset of driving register for this pin.
+ * @bit: The bit of driving register for this pin.
+ * @grp: The group for this pin belongs to.
+ */
+struct mtk_pin_drv_grp {
+ unsigned int pin;
+ unsigned int offset;
+ unsigned char bit;
+ unsigned char grp;
+};
+
+#define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp) \
+ { \
+ .pin = _pin, \
+ .offset = _offset, \
+ .bit = _bit, \
+ .grp = _grp, \
+ }
+
+struct mtk_eint_offsets {
+ const char *name;
+ unsigned int stat;
+ unsigned int ack;
+ unsigned int mask;
+ unsigned int mask_set;
+ unsigned int mask_clr;
+ unsigned int sens;
+ unsigned int sens_set;
+ unsigned int sens_clr;
+ unsigned int soft;
+ unsigned int soft_set;
+ unsigned int soft_clr;
+ unsigned int pol;
+ unsigned int pol_set;
+ unsigned int pol_clr;
+ unsigned int dom_en;
+ unsigned int dbnc_ctrl;
+ unsigned int dbnc_set;
+ unsigned int dbnc_clr;
+ u8 port_mask;
+ u8 ports;
+};
+
+/**
+ * struct mtk_pinctrl_devdata - Provide HW GPIO related data.
+ * @pins: An array describing all pins the pin controller affects.
+ * @npins: The number of entries in @pins.
+ *
+ * @grp_desc: The driving group info.
+ * @pin_drv_grp: The driving group for all pins.
+ * @spec_pull_set: Each SoC may have special pins for pull up/down setting,
+ * these pins' pull setting are very different, they have separate pull
+ * up/down bit, R0 and R1 resistor bit, so they need special pull setting.
+ * If special setting is success, this should return 0, otherwise it should
+ * return non-zero value.
+ * @spec_ies_smt_set: Some pins are irregular, their input enable and smt
+ * control register are discontinuous, but they are mapping together. That
+ * means when user set smt, input enable is set at the same time. So they
+ * also need special control. If special control is success, this should
+ * return 0, otherwise return non-zero value.
+ *
+ * @dir_offset: The direction register offset.
+ * @pullen_offset: The pull-up/pull-down enable register offset.
+ * @pinmux_offset: The pinmux register offset.
+ *
+ * @type1_start: Some chips have two base addresses for pull select register,
+ * that means some pins use the first address and others use the second. This
+ * member record the start of pin number to use the second address.
+ * @type1_end: The end of pin number to use the second address.
+ *
+ * @port_shf: The shift between two registers.
+ * @port_mask: The mask of register.
+ * @port_align: Provide clear register and set register step.
+ */
+struct mtk_pinctrl_devdata {
+ const struct mtk_desc_pin *pins;
+ unsigned int npins;
+ const struct mtk_drv_group_desc *grp_desc;
+ unsigned int n_grp_cls;
+ const struct mtk_pin_drv_grp *pin_drv_grp;
+ unsigned int n_pin_drv_grps;
+ int (*spec_pull_set)(struct regmap *reg, unsigned int pin,
+ unsigned char align, bool isup, unsigned int arg);
+ int (*spec_ies_smt_set)(struct regmap *reg, unsigned int pin,
+ unsigned char align, int value);
+ unsigned int dir_offset;
+ unsigned int ies_offset;
+ unsigned int smt_offset;
+ unsigned int pullen_offset;
+ unsigned int pullsel_offset;
+ unsigned int drv_offset;
+ unsigned int invser_offset;
+ unsigned int dout_offset;
+ unsigned int din_offset;
+ unsigned int pinmux_offset;
+ unsigned short type1_start;
+ unsigned short type1_end;
+ unsigned char port_shf;
+ unsigned char port_mask;
+ unsigned char port_align;
+ unsigned char chip_type;
+ struct mtk_eint_offsets eint_offsets;
+ unsigned int ap_num;
+ unsigned int db_cnt;
+};
+
+struct mtk_pinctrl {
+ struct regmap *regmap1;
+ struct regmap *regmap2;
+ struct device *dev;
+ struct gpio_chip *chip;
+ struct mtk_pinctrl_group *groups;
+ unsigned ngroups;
+ const char **grp_names;
+ struct pinctrl_dev *pctl_dev;
+ const struct mtk_pinctrl_devdata *devdata;
+ void __iomem *eint_reg_base;
+ struct irq_domain *domain;
+ int *eint_dual_edges;
+};
+
+int mtk_pctrl_init(struct platform_device *pdev,
+ const struct mtk_pinctrl_devdata *data);
+
+#endif /* __PINCTRL_MTK_COMMON_H */
--- /dev/null
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __PINCTRL_MTK_MT8135_H
+#define __PINCTRL_MTK_MT8135_H
+
+#include <linux/pinctrl/pinctrl.h>
+#include "pinctrl-mtk-common.h"
+
+static const struct mtk_desc_pin mtk_pins_mt8135[] = {
+ MTK_PIN(
+ PINCTRL_PIN(0, "MSDC0_DAT7"),
+ "D21", "mt8135",
+ MTK_EINT_FUNCTION(2, 49),
+ MTK_FUNCTION(0, "GPIO0"),
+ MTK_FUNCTION(1, "MSDC0_DAT7"),
+ MTK_FUNCTION(2, "EINT49"),
+ MTK_FUNCTION(3, "I2SOUT_DAT"),
+ MTK_FUNCTION(4, "DAC_DAT_OUT"),
+ MTK_FUNCTION(5, "PCM1_DO"),
+ MTK_FUNCTION(6, "SPI1_MO"),
+ MTK_FUNCTION(7, "NALE")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(1, "MSDC0_DAT6"),
+ "D22", "mt8135",
+ MTK_EINT_FUNCTION(2, 48),
+ MTK_FUNCTION(0, "GPIO1"),
+ MTK_FUNCTION(1, "MSDC0_DAT6"),
+ MTK_FUNCTION(2, "EINT48"),
+ MTK_FUNCTION(3, "I2SIN_WS"),
+ MTK_FUNCTION(4, "DAC_WS"),
+ MTK_FUNCTION(5, "PCM1_WS"),
+ MTK_FUNCTION(6, "SPI1_CSN"),
+ MTK_FUNCTION(7, "NCLE")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(2, "MSDC0_DAT5"),
+ "E22", "mt8135",
+ MTK_EINT_FUNCTION(2, 47),
+ MTK_FUNCTION(0, "GPIO2"),
+ MTK_FUNCTION(1, "MSDC0_DAT5"),
+ MTK_FUNCTION(2, "EINT47"),
+ MTK_FUNCTION(3, "I2SIN_CK"),
+ MTK_FUNCTION(4, "DAC_CK"),
+ MTK_FUNCTION(5, "PCM1_CK"),
+ MTK_FUNCTION(6, "SPI1_CLK"),
+ MTK_FUNCTION(7, "NLD4")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(3, "MSDC0_DAT4"),
+ "F21", "mt8135",
+ MTK_EINT_FUNCTION(2, 46),
+ MTK_FUNCTION(0, "GPIO3"),
+ MTK_FUNCTION(1, "MSDC0_DAT4"),
+ MTK_FUNCTION(2, "EINT46"),
+ MTK_FUNCTION(3, "A_FUNC_CK"),
+ MTK_FUNCTION(6, "LSCE1B_2X"),
+ MTK_FUNCTION(7, "NLD5")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(4, "MSDC0_CMD"),
+ "F20", "mt8135",
+ MTK_EINT_FUNCTION(2, 41),
+ MTK_FUNCTION(0, "GPIO4"),
+ MTK_FUNCTION(1, "MSDC0_CMD"),
+ MTK_FUNCTION(2, "EINT41"),
+ MTK_FUNCTION(3, "A_FUNC_DOUT[0]"),
+ MTK_FUNCTION(5, "USB_TEST_IO[0]"),
+ MTK_FUNCTION(6, "LRSTB_2X"),
+ MTK_FUNCTION(7, "NRNB")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(5, "MSDC0_CLK"),
+ "G18", "mt8135",
+ MTK_EINT_FUNCTION(2, 40),
+ MTK_FUNCTION(0, "GPIO5"),
+ MTK_FUNCTION(1, "MSDC0_CLK"),
+ MTK_FUNCTION(2, "EINT40"),
+ MTK_FUNCTION(3, "A_FUNC_DOUT[1]"),
+ MTK_FUNCTION(5, "USB_TEST_IO[1]"),
+ MTK_FUNCTION(6, "LPTE"),
+ MTK_FUNCTION(7, "NREB")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(6, "MSDC0_DAT3"),
+ "G21", "mt8135",
+ MTK_EINT_FUNCTION(2, 45),
+ MTK_FUNCTION(0, "GPIO6"),
+ MTK_FUNCTION(1, "MSDC0_DAT3"),
+ MTK_FUNCTION(2, "EINT45"),
+ MTK_FUNCTION(3, "A_FUNC_DOUT[2]"),
+ MTK_FUNCTION(5, "USB_TEST_IO[2]"),
+ MTK_FUNCTION(6, "LSCE0B_2X"),
+ MTK_FUNCTION(7, "NLD7")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(7, "MSDC0_DAT2"),
+ "E21", "mt8135",
+ MTK_EINT_FUNCTION(2, 44),
+ MTK_FUNCTION(0, "GPIO7"),
+ MTK_FUNCTION(1, "MSDC0_DAT2"),
+ MTK_FUNCTION(2, "EINT44"),
+ MTK_FUNCTION(3, "A_FUNC_DOUT[3]"),
+ MTK_FUNCTION(5, "USB_TEST_IO[3]"),
+ MTK_FUNCTION(6, "LSA0_2X"),
+ MTK_FUNCTION(7, "NLD14")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(8, "MSDC0_DAT1"),
+ "E23", "mt8135",
+ MTK_EINT_FUNCTION(2, 43),
+ MTK_FUNCTION(0, "GPIO8"),
+ MTK_FUNCTION(1, "MSDC0_DAT1"),
+ MTK_FUNCTION(2, "EINT43"),
+ MTK_FUNCTION(5, "USB_TEST_IO[4]"),
+ MTK_FUNCTION(6, "LSCK_2X"),
+ MTK_FUNCTION(7, "NLD11")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(9, "MSDC0_DAT0"),
+ "F22", "mt8135",
+ MTK_EINT_FUNCTION(2, 42),
+ MTK_FUNCTION(0, "GPIO9"),
+ MTK_FUNCTION(1, "MSDC0_DAT0"),
+ MTK_FUNCTION(2, "EINT42"),
+ MTK_FUNCTION(5, "USB_TEST_IO[5]"),
+ MTK_FUNCTION(6, "LSDA_2X")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(10, "NCEB0"),
+ "G20", "mt8135",
+ MTK_EINT_FUNCTION(2, 139),
+ MTK_FUNCTION(0, "GPIO10"),
+ MTK_FUNCTION(1, "NCEB0"),
+ MTK_FUNCTION(2, "EINT139"),
+ MTK_FUNCTION(7, "TESTA_OUT4")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(11, "NCEB1"),
+ "L17", "mt8135",
+ MTK_EINT_FUNCTION(2, 140),
+ MTK_FUNCTION(0, "GPIO11"),
+ MTK_FUNCTION(1, "NCEB1"),
+ MTK_FUNCTION(2, "EINT140"),
+ MTK_FUNCTION(6, "USB_DRVVBUS"),
+ MTK_FUNCTION(7, "TESTA_OUT5")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(12, "NRNB"),
+ "G19", "mt8135",
+ MTK_EINT_FUNCTION(2, 141),
+ MTK_FUNCTION(0, "GPIO12"),
+ MTK_FUNCTION(1, "NRNB"),
+ MTK_FUNCTION(2, "EINT141"),
+ MTK_FUNCTION(3, "A_FUNC_DOUT[4]"),
+ MTK_FUNCTION(7, "TESTA_OUT6")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(13, "NCLE"),
+ "J18", "mt8135",
+ MTK_EINT_FUNCTION(2, 142),
+ MTK_FUNCTION(0, "GPIO13"),
+ MTK_FUNCTION(1, "NCLE"),
+ MTK_FUNCTION(2, "EINT142"),
+ MTK_FUNCTION(3, "A_FUNC_DOUT[5]"),
+ MTK_FUNCTION(4, "CM2PDN_1X"),
+ MTK_FUNCTION(6, "NALE"),
+ MTK_FUNCTION(7, "TESTA_OUT7")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(14, "NALE"),
+ "J19", "mt8135",
+ MTK_EINT_FUNCTION(2, 143),
+ MTK_FUNCTION(0, "GPIO14"),
+ MTK_FUNCTION(1, "NALE"),
+ MTK_FUNCTION(2, "EINT143"),
+ MTK_FUNCTION(3, "A_FUNC_DOUT[6]"),
+ MTK_FUNCTION(4, "CM2MCLK_1X"),
+ MTK_FUNCTION(5, "IRDA_RXD"),
+ MTK_FUNCTION(6, "NCLE"),
+ MTK_FUNCTION(7, "TESTA_OUT8")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(15, "NREB"),
+ "L18", "mt8135",
+ MTK_EINT_FUNCTION(2, 144),
+ MTK_FUNCTION(0, "GPIO15"),
+ MTK_FUNCTION(1, "NREB"),
+ MTK_FUNCTION(2, "EINT144"),
+ MTK_FUNCTION(3, "A_FUNC_DOUT[7]"),
+ MTK_FUNCTION(4, "CM2RST_1X"),
+ MTK_FUNCTION(5, "IRDA_TXD"),
+ MTK_FUNCTION(7, "TESTA_OUT9")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(16, "NWEB"),
+ "J20", "mt8135",
+ MTK_EINT_FUNCTION(2, 145),
+ MTK_FUNCTION(0, "GPIO16"),
+ MTK_FUNCTION(1, "NWEB"),
+ MTK_FUNCTION(2, "EINT145"),
+ MTK_FUNCTION(3, "A_FUNC_DIN[0]"),
+ MTK_FUNCTION(4, "CM2PCLK_1X"),
+ MTK_FUNCTION(5, "IRDA_PDN"),
+ MTK_FUNCTION(7, "TESTA_OUT10")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(17, "NLD0"),
+ "K21", "mt8135",
+ MTK_EINT_FUNCTION(2, 146),
+ MTK_FUNCTION(0, "GPIO17"),
+ MTK_FUNCTION(1, "NLD0"),
+ MTK_FUNCTION(2, "EINT146"),
+ MTK_FUNCTION(3, "A_FUNC_DIN[1]"),
+ MTK_FUNCTION(4, "CM2DAT_1X[0]"),
+ MTK_FUNCTION(5, "I2SIN_CK"),
+ MTK_FUNCTION(6, "DAC_CK"),
+ MTK_FUNCTION(7, "TESTA_OUT11")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(18, "NLD1"),
+ "K22", "mt8135",
+ MTK_EINT_FUNCTION(2, 147),
+ MTK_FUNCTION(0, "GPIO18"),
+ MTK_FUNCTION(1, "NLD1"),
+ MTK_FUNCTION(2, "EINT147"),
+ MTK_FUNCTION(3, "A_FUNC_DIN[2]"),
+ MTK_FUNCTION(4, "CM2DAT_1X[1]"),
+ MTK_FUNCTION(5, "I2SIN_WS"),
+ MTK_FUNCTION(6, "DAC_WS"),
+ MTK_FUNCTION(7, "TESTA_OUT12")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(19, "NLD2"),
+ "J21", "mt8135",
+ MTK_EINT_FUNCTION(2, 148),
+ MTK_FUNCTION(0, "GPIO19"),
+ MTK_FUNCTION(1, "NLD2"),
+ MTK_FUNCTION(2, "EINT148"),
+ MTK_FUNCTION(3, "A_FUNC_DIN[3]"),
+ MTK_FUNCTION(4, "CM2DAT_1X[2]"),
+ MTK_FUNCTION(5, "I2SOUT_DAT"),
+ MTK_FUNCTION(6, "DAC_DAT_OUT"),
+ MTK_FUNCTION(7, "TESTA_OUT13")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(20, "NLD3"),
+ "J23", "mt8135",
+ MTK_EINT_FUNCTION(2, 149),
+ MTK_FUNCTION(0, "GPIO20"),
+ MTK_FUNCTION(1, "NLD3"),
+ MTK_FUNCTION(2, "EINT149"),
+ MTK_FUNCTION(3, "A_FUNC_DIN[4]"),
+ MTK_FUNCTION(4, "CM2DAT_1X[3]"),
+ MTK_FUNCTION(7, "TESTA_OUT14")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(21, "NLD4"),
+ "J22", "mt8135",
+ MTK_EINT_FUNCTION(2, 150),
+ MTK_FUNCTION(0, "GPIO21"),
+ MTK_FUNCTION(1, "NLD4"),
+ MTK_FUNCTION(2, "EINT150"),
+ MTK_FUNCTION(3, "A_FUNC_DIN[5]"),
+ MTK_FUNCTION(4, "CM2DAT_1X[4]"),
+ MTK_FUNCTION(7, "TESTA_OUT15")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(22, "NLD5"),
+ "H21", "mt8135",
+ MTK_EINT_FUNCTION(2, 151),
+ MTK_FUNCTION(0, "GPIO22"),
+ MTK_FUNCTION(1, "NLD5"),
+ MTK_FUNCTION(2, "EINT151"),
+ MTK_FUNCTION(3, "A_FUNC_DIN[6]"),
+ MTK_FUNCTION(4, "CM2DAT_1X[5]"),
+ MTK_FUNCTION(7, "TESTA_OUT16")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(23, "NLD6"),
+ "H22", "mt8135",
+ MTK_EINT_FUNCTION(2, 152),
+ MTK_FUNCTION(0, "GPIO23"),
+ MTK_FUNCTION(1, "NLD6"),
+ MTK_FUNCTION(2, "EINT152"),
+ MTK_FUNCTION(3, "A_FUNC_DIN[7]"),
+ MTK_FUNCTION(4, "CM2DAT_1X[6]"),
+ MTK_FUNCTION(7, "TESTA_OUT17")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(24, "NLD7"),
+ "H20", "mt8135",
+ MTK_EINT_FUNCTION(2, 153),
+ MTK_FUNCTION(0, "GPIO24"),
+ MTK_FUNCTION(1, "NLD7"),
+ MTK_FUNCTION(2, "EINT153"),
+ MTK_FUNCTION(3, "A_FUNC_DIN[8]"),
+ MTK_FUNCTION(4, "CM2DAT_1X[7]"),
+ MTK_FUNCTION(7, "TESTA_OUT18")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(25, "NLD8"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 154),
+ MTK_FUNCTION(0, "GPIO25"),
+ MTK_FUNCTION(1, "NLD8"),
+ MTK_FUNCTION(2, "EINT154"),
+ MTK_FUNCTION(4, "CM2DAT_1X[8]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(26, "NLD9"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 155),
+ MTK_FUNCTION(0, "GPIO26"),
+ MTK_FUNCTION(1, "NLD9"),
+ MTK_FUNCTION(2, "EINT155"),
+ MTK_FUNCTION(4, "CM2DAT_1X[9]"),
+ MTK_FUNCTION(5, "PWM1")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(27, "NLD10"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 156),
+ MTK_FUNCTION(0, "GPIO27"),
+ MTK_FUNCTION(1, "NLD10"),
+ MTK_FUNCTION(2, "EINT156"),
+ MTK_FUNCTION(4, "CM2VSYNC_1X"),
+ MTK_FUNCTION(5, "PWM2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(28, "NLD11"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 157),
+ MTK_FUNCTION(0, "GPIO28"),
+ MTK_FUNCTION(1, "NLD11"),
+ MTK_FUNCTION(2, "EINT157"),
+ MTK_FUNCTION(4, "CM2HSYNC_1X"),
+ MTK_FUNCTION(5, "PWM3")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(29, "NLD12"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 158),
+ MTK_FUNCTION(0, "GPIO29"),
+ MTK_FUNCTION(1, "NLD12"),
+ MTK_FUNCTION(2, "EINT158"),
+ MTK_FUNCTION(3, "I2SIN_CK"),
+ MTK_FUNCTION(4, "DAC_CK"),
+ MTK_FUNCTION(5, "PCM1_CK")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(30, "NLD13"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 159),
+ MTK_FUNCTION(0, "GPIO30"),
+ MTK_FUNCTION(1, "NLD13"),
+ MTK_FUNCTION(2, "EINT159"),
+ MTK_FUNCTION(3, "I2SIN_WS"),
+ MTK_FUNCTION(4, "DAC_WS"),
+ MTK_FUNCTION(5, "PCM1_WS")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(31, "NLD14"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 160),
+ MTK_FUNCTION(0, "GPIO31"),
+ MTK_FUNCTION(1, "NLD14"),
+ MTK_FUNCTION(2, "EINT160"),
+ MTK_FUNCTION(3, "I2SOUT_DAT"),
+ MTK_FUNCTION(4, "DAC_DAT_OUT"),
+ MTK_FUNCTION(5, "PCM1_DO")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(32, "NLD15"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 161),
+ MTK_FUNCTION(0, "GPIO32"),
+ MTK_FUNCTION(1, "NLD15"),
+ MTK_FUNCTION(2, "EINT161"),
+ MTK_FUNCTION(3, "DISP_PWM"),
+ MTK_FUNCTION(4, "PWM4"),
+ MTK_FUNCTION(5, "PCM1_DI")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(33, "MSDC0_RSTB"),
+ "G22", "mt8135",
+ MTK_EINT_FUNCTION(2, 50),
+ MTK_FUNCTION(0, "GPIO33"),
+ MTK_FUNCTION(1, "MSDC0_RSTB"),
+ MTK_FUNCTION(2, "EINT50"),
+ MTK_FUNCTION(3, "I2SIN_DAT"),
+ MTK_FUNCTION(5, "PCM1_DI"),
+ MTK_FUNCTION(6, "SPI1_MI"),
+ MTK_FUNCTION(7, "NLD10")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(34, "IDDIG"),
+ "N17", "mt8135",
+ MTK_EINT_FUNCTION(2, 34),
+ MTK_FUNCTION(0, "GPIO34"),
+ MTK_FUNCTION(1, "IDDIG"),
+ MTK_FUNCTION(2, "EINT34")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(35, "SCL3"),
+ "L19", "mt8135",
+ MTK_EINT_FUNCTION(2, 96),
+ MTK_FUNCTION(0, "GPIO35"),
+ MTK_FUNCTION(1, "SCL3"),
+ MTK_FUNCTION(2, "EINT96"),
+ MTK_FUNCTION(3, "CLKM6"),
+ MTK_FUNCTION(4, "PWM6")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(36, "SDA3"),
+ "L20", "mt8135",
+ MTK_EINT_FUNCTION(2, 97),
+ MTK_FUNCTION(0, "GPIO36"),
+ MTK_FUNCTION(1, "SDA3"),
+ MTK_FUNCTION(2, "EINT97")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(37, "AUD_CLK_MOSI"),
+ "L21", "mt8135",
+ MTK_EINT_FUNCTION(4, 19),
+ MTK_FUNCTION(0, "GPIO37"),
+ MTK_FUNCTION(1, "AUD_CLK"),
+ MTK_FUNCTION(2, "ADC_CK"),
+ MTK_FUNCTION(3, " HDMI_SDATA0"),
+ MTK_FUNCTION(4, "EINT19"),
+ MTK_FUNCTION(5, "USB_TEST_IO[6]"),
+ MTK_FUNCTION(7, "TESTA_OUT19")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(38, "AUD_DAT_MOSI"),
+ "L23", "mt8135",
+ MTK_EINT_FUNCTION(4, 21),
+ MTK_FUNCTION(0, "GPIO38"),
+ MTK_FUNCTION(1, "AUD_DAT_MOSI"),
+ MTK_FUNCTION(2, "ADC_WS"),
+ MTK_FUNCTION(3, "AUD_DAT_MISO"),
+ MTK_FUNCTION(4, "EINT21"),
+ MTK_FUNCTION(5, "USB_TEST_IO[7]"),
+ MTK_FUNCTION(7, "TESTA_OUT20")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(39, "AUD_DAT_MISO"),
+ "L22", "mt8135",
+ MTK_EINT_FUNCTION(4, 20),
+ MTK_FUNCTION(0, "GPIO39"),
+ MTK_FUNCTION(1, "AUD_DAT_MISO"),
+ MTK_FUNCTION(2, "ADC_DAT_IN"),
+ MTK_FUNCTION(3, "AUD_DAT_MOSI"),
+ MTK_FUNCTION(4, "EINT20"),
+ MTK_FUNCTION(5, "USB_TEST_IO[8]"),
+ MTK_FUNCTION(7, "TESTA_OUT21")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(40, "DAC_CLK"),
+ "P21", "mt8135",
+ MTK_EINT_FUNCTION(2, 22),
+ MTK_FUNCTION(0, "GPIO40"),
+ MTK_FUNCTION(1, "DAC_CK"),
+ MTK_FUNCTION(2, "EINT22"),
+ MTK_FUNCTION(3, " HDMI_SDATA1"),
+ MTK_FUNCTION(5, "USB_TEST_IO[9]"),
+ MTK_FUNCTION(7, "TESTA_OUT22")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(41, "DAC_WS"),
+ "N18", "mt8135",
+ MTK_EINT_FUNCTION(2, 24),
+ MTK_FUNCTION(0, "GPIO41"),
+ MTK_FUNCTION(1, "DAC_WS"),
+ MTK_FUNCTION(2, "EINT24"),
+ MTK_FUNCTION(3, " HDMI_SDATA2"),
+ MTK_FUNCTION(5, "USB_TEST_IO[10]"),
+ MTK_FUNCTION(7, "TESTA_OUT23")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(42, "DAC_DAT_OUT"),
+ "N22", "mt8135",
+ MTK_EINT_FUNCTION(2, 23),
+ MTK_FUNCTION(0, "GPIO42"),
+ MTK_FUNCTION(1, "DAC_DAT_OUT"),
+ MTK_FUNCTION(2, "EINT23"),
+ MTK_FUNCTION(3, " HDMI_SDATA3"),
+ MTK_FUNCTION(5, "USB_TEST_IO[11]"),
+ MTK_FUNCTION(7, "TESTA_OUT24")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(43, "PWRAP_SPI0_MO"),
+ "M22", "mt8135",
+ MTK_EINT_FUNCTION(2, 29),
+ MTK_FUNCTION(0, "GPIO43"),
+ MTK_FUNCTION(1, "PWRAP_SPIDI"),
+ MTK_FUNCTION(2, "EINT29")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(44, "PWRAP_SPI0_MI"),
+ "P23", "mt8135",
+ MTK_EINT_FUNCTION(2, 28),
+ MTK_FUNCTION(0, "GPIO44"),
+ MTK_FUNCTION(1, "PWRAP_SPIDO"),
+ MTK_FUNCTION(2, "EINT28")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(45, "PWRAP_SPI0_CSN"),
+ "M21", "mt8135",
+ MTK_EINT_FUNCTION(2, 27),
+ MTK_FUNCTION(0, "GPIO45"),
+ MTK_FUNCTION(1, "PWRAP_SPICS_B_I"),
+ MTK_FUNCTION(2, "EINT27")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(46, "PWRAP_SPI0_CLK"),
+ "P22", "mt8135",
+ MTK_EINT_FUNCTION(2, 26),
+ MTK_FUNCTION(0, "GPIO46"),
+ MTK_FUNCTION(1, "PWRAP_SPICK_I"),
+ MTK_FUNCTION(2, "EINT26")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(47, "PWRAP_EVENT"),
+ "M23", "mt8135",
+ MTK_EINT_FUNCTION(2, 25),
+ MTK_FUNCTION(0, "GPIO47"),
+ MTK_FUNCTION(1, "PWRAP_EVENT_IN"),
+ MTK_FUNCTION(2, "EINT25"),
+ MTK_FUNCTION(7, "TESTA_OUT2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(48, "RTC32K_CK"),
+ "N20", "mt8135",
+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
+ MTK_FUNCTION(0, "GPIO48"),
+ MTK_FUNCTION(1, "RTC32K_CK")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(49, "WATCHDOG"),
+ "R22", "mt8135",
+ MTK_EINT_FUNCTION(2, 36),
+ MTK_FUNCTION(0, "GPIO49"),
+ MTK_FUNCTION(1, "WATCHDOG"),
+ MTK_FUNCTION(2, "EINT36")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(50, "SRCLKENA"),
+ "T22", "mt8135",
+ MTK_EINT_FUNCTION(2, 38),
+ MTK_FUNCTION(0, "GPIO50"),
+ MTK_FUNCTION(1, "SRCLKENA"),
+ MTK_FUNCTION(2, "EINT38")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(51, "SRCVOLTEN"),
+ "T23", "mt8135",
+ MTK_EINT_FUNCTION(2, 37),
+ MTK_FUNCTION(0, "GPIO51"),
+ MTK_FUNCTION(1, "SRCVOLTEN"),
+ MTK_FUNCTION(2, "EINT37")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(52, "EINT0"),
+ "T21", "mt8135",
+ MTK_EINT_FUNCTION(1, 0),
+ MTK_FUNCTION(0, "GPIO52"),
+ MTK_FUNCTION(1, "EINT0"),
+ MTK_FUNCTION(2, "PWM1"),
+ MTK_FUNCTION(3, "CLKM0"),
+ MTK_FUNCTION(4, " SPDIF_OUT"),
+ MTK_FUNCTION(5, "USB_TEST_IO[12]"),
+ MTK_FUNCTION(7, "USB_SCL")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(53, "URXD2"),
+ "R18", "mt8135",
+ MTK_EINT_FUNCTION(2, 83),
+ MTK_FUNCTION(0, "GPIO53"),
+ MTK_FUNCTION(1, "URXD2"),
+ MTK_FUNCTION(2, "EINT83"),
+ MTK_FUNCTION(4, " HDMI_LRCK"),
+ MTK_FUNCTION(5, "CLKM3"),
+ MTK_FUNCTION(7, "UTXD2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(54, "UTXD2"),
+ "R17", "mt8135",
+ MTK_EINT_FUNCTION(2, 82),
+ MTK_FUNCTION(0, "GPIO54"),
+ MTK_FUNCTION(1, "UTXD2"),
+ MTK_FUNCTION(2, "EINT82"),
+ MTK_FUNCTION(4, " HDMI_BCK_OUT"),
+ MTK_FUNCTION(5, "CLKM2"),
+ MTK_FUNCTION(7, "URXD2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(55, "UCTS2"),
+ "R20", "mt8135",
+ MTK_EINT_FUNCTION(2, 84),
+ MTK_FUNCTION(0, "GPIO55"),
+ MTK_FUNCTION(1, "UCTS2"),
+ MTK_FUNCTION(2, "EINT84"),
+ MTK_FUNCTION(5, "PWM1"),
+ MTK_FUNCTION(7, "URTS2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(56, "URTS2"),
+ "R19", "mt8135",
+ MTK_EINT_FUNCTION(2, 85),
+ MTK_FUNCTION(0, "GPIO56"),
+ MTK_FUNCTION(1, "URTS2"),
+ MTK_FUNCTION(2, "EINT85"),
+ MTK_FUNCTION(5, "PWM2"),
+ MTK_FUNCTION(7, "UCTS2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(57, "JTCK"),
+ "V17", "mt8135",
+ MTK_EINT_FUNCTION(2, 188),
+ MTK_FUNCTION(0, "GPIO57"),
+ MTK_FUNCTION(1, "JTCK"),
+ MTK_FUNCTION(2, "EINT188"),
+ MTK_FUNCTION(3, "DSP1_ICK")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(58, "JTDO"),
+ "T16", "mt8135",
+ MTK_EINT_FUNCTION(2, 190),
+ MTK_FUNCTION(0, "GPIO58"),
+ MTK_FUNCTION(1, "JTDO"),
+ MTK_FUNCTION(2, "EINT190"),
+ MTK_FUNCTION(3, "DSP2_IMS")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(59, "JTRST_B"),
+ "T19", "mt8135",
+ MTK_EINT_FUNCTION(2, 0),
+ MTK_FUNCTION(0, "GPIO59"),
+ MTK_FUNCTION(1, "JTRST_B"),
+ MTK_FUNCTION(2, "EINT0"),
+ MTK_FUNCTION(3, "DSP2_ICK")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(60, "JTDI"),
+ "T18", "mt8135",
+ MTK_EINT_FUNCTION(2, 189),
+ MTK_FUNCTION(0, "GPIO60"),
+ MTK_FUNCTION(1, "JTDI"),
+ MTK_FUNCTION(2, "EINT189"),
+ MTK_FUNCTION(3, "DSP1_IMS")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(61, "JRTCK"),
+ "T20", "mt8135",
+ MTK_EINT_FUNCTION(2, 187),
+ MTK_FUNCTION(0, "GPIO61"),
+ MTK_FUNCTION(1, "JRTCK"),
+ MTK_FUNCTION(2, "EINT187"),
+ MTK_FUNCTION(3, "DSP1_ID")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(62, "JTMS"),
+ "T17", "mt8135",
+ MTK_EINT_FUNCTION(2, 191),
+ MTK_FUNCTION(0, "GPIO62"),
+ MTK_FUNCTION(1, "JTMS"),
+ MTK_FUNCTION(2, "EINT191"),
+ MTK_FUNCTION(3, "DSP2_ID")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(63, "MSDC1_INSI"),
+ "V18", "mt8135",
+ MTK_EINT_FUNCTION(1, 15),
+ MTK_FUNCTION(0, "GPIO63"),
+ MTK_FUNCTION(1, "MSDC1_INSI"),
+ MTK_FUNCTION(3, "SCL5"),
+ MTK_FUNCTION(4, "PWM6"),
+ MTK_FUNCTION(5, "CLKM5"),
+ MTK_FUNCTION(7, "TESTB_OUT6")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(64, "MSDC1_SDWPI"),
+ "W18", "mt8135",
+ MTK_EINT_FUNCTION(2, 58),
+ MTK_FUNCTION(0, "GPIO64"),
+ MTK_FUNCTION(1, "MSDC1_SDWPI"),
+ MTK_FUNCTION(2, "EINT58"),
+ MTK_FUNCTION(3, "SDA5"),
+ MTK_FUNCTION(4, "PWM7"),
+ MTK_FUNCTION(5, "CLKM6"),
+ MTK_FUNCTION(7, "TESTB_OUT7")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(65, "MSDC2_INSI"),
+ "U22", "mt8135",
+ MTK_EINT_FUNCTION(1, 14),
+ MTK_FUNCTION(0, "GPIO65"),
+ MTK_FUNCTION(1, "MSDC2_INSI"),
+ MTK_FUNCTION(5, "USB_TEST_IO[27]"),
+ MTK_FUNCTION(7, "TESTA_OUT3")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(66, "MSDC2_SDWPI"),
+ "U21", "mt8135",
+ MTK_EINT_FUNCTION(2, 66),
+ MTK_FUNCTION(0, "GPIO66"),
+ MTK_FUNCTION(1, "MSDC2_SDWPI"),
+ MTK_FUNCTION(2, "EINT66"),
+ MTK_FUNCTION(5, "USB_TEST_IO[28]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(67, "URXD4"),
+ "V23", "mt8135",
+ MTK_EINT_FUNCTION(2, 89),
+ MTK_FUNCTION(0, "GPIO67"),
+ MTK_FUNCTION(1, "URXD4"),
+ MTK_FUNCTION(2, "EINT89"),
+ MTK_FUNCTION(3, "URXD1"),
+ MTK_FUNCTION(6, "UTXD4"),
+ MTK_FUNCTION(7, "TESTB_OUT10")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(68, "UTXD4"),
+ "V22", "mt8135",
+ MTK_EINT_FUNCTION(2, 88),
+ MTK_FUNCTION(0, "GPIO68"),
+ MTK_FUNCTION(1, "UTXD4"),
+ MTK_FUNCTION(2, "EINT88"),
+ MTK_FUNCTION(3, "UTXD1"),
+ MTK_FUNCTION(6, "URXD4"),
+ MTK_FUNCTION(7, "TESTB_OUT11")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(69, "URXD1"),
+ "W22", "mt8135",
+ MTK_EINT_FUNCTION(2, 79),
+ MTK_FUNCTION(0, "GPIO69"),
+ MTK_FUNCTION(1, "URXD1"),
+ MTK_FUNCTION(2, "EINT79"),
+ MTK_FUNCTION(3, "URXD4"),
+ MTK_FUNCTION(6, "UTXD1"),
+ MTK_FUNCTION(7, "TESTB_OUT24")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(70, "UTXD1"),
+ "V21", "mt8135",
+ MTK_EINT_FUNCTION(2, 78),
+ MTK_FUNCTION(0, "GPIO70"),
+ MTK_FUNCTION(1, "UTXD1"),
+ MTK_FUNCTION(2, "EINT78"),
+ MTK_FUNCTION(3, "UTXD4"),
+ MTK_FUNCTION(6, "URXD1"),
+ MTK_FUNCTION(7, "TESTB_OUT25")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(71, "UCTS1"),
+ "V19", "mt8135",
+ MTK_EINT_FUNCTION(2, 80),
+ MTK_FUNCTION(0, "GPIO71"),
+ MTK_FUNCTION(1, "UCTS1"),
+ MTK_FUNCTION(2, "EINT80"),
+ MTK_FUNCTION(5, "CLKM0"),
+ MTK_FUNCTION(6, "URTS1"),
+ MTK_FUNCTION(7, "TESTB_OUT31")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(72, "URTS1"),
+ "V20", "mt8135",
+ MTK_EINT_FUNCTION(2, 81),
+ MTK_FUNCTION(0, "GPIO72"),
+ MTK_FUNCTION(1, "URTS1"),
+ MTK_FUNCTION(2, "EINT81"),
+ MTK_FUNCTION(5, "CLKM1"),
+ MTK_FUNCTION(6, "UCTS1"),
+ MTK_FUNCTION(7, "TESTB_OUT21")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(73, "PWM1"),
+ "W17", "mt8135",
+ MTK_EINT_FUNCTION(2, 73),
+ MTK_FUNCTION(0, "GPIO73"),
+ MTK_FUNCTION(1, "PWM1"),
+ MTK_FUNCTION(2, "EINT73"),
+ MTK_FUNCTION(5, "USB_DRVVBUS"),
+ MTK_FUNCTION(6, "DISP_PWM"),
+ MTK_FUNCTION(7, "TESTB_OUT8")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(74, "PWM2"),
+ "Y17", "mt8135",
+ MTK_EINT_FUNCTION(2, 74),
+ MTK_FUNCTION(0, "GPIO74"),
+ MTK_FUNCTION(1, "PWM2"),
+ MTK_FUNCTION(2, "EINT74"),
+ MTK_FUNCTION(3, "DPI33_CK"),
+ MTK_FUNCTION(4, "PWM5"),
+ MTK_FUNCTION(5, "URXD2"),
+ MTK_FUNCTION(6, "DISP_PWM"),
+ MTK_FUNCTION(7, "TESTB_OUT9")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(75, "PWM3"),
+ "Y19", "mt8135",
+ MTK_EINT_FUNCTION(2, 75),
+ MTK_FUNCTION(0, "GPIO75"),
+ MTK_FUNCTION(1, "PWM3"),
+ MTK_FUNCTION(2, "EINT75"),
+ MTK_FUNCTION(3, "DPI33_D0"),
+ MTK_FUNCTION(4, "PWM6"),
+ MTK_FUNCTION(5, "UTXD2"),
+ MTK_FUNCTION(6, "DISP_PWM"),
+ MTK_FUNCTION(7, "TESTB_OUT12")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(76, "PWM4"),
+ "W19", "mt8135",
+ MTK_EINT_FUNCTION(2, 76),
+ MTK_FUNCTION(0, "GPIO76"),
+ MTK_FUNCTION(1, "PWM4"),
+ MTK_FUNCTION(2, "EINT76"),
+ MTK_FUNCTION(3, "DPI33_D1"),
+ MTK_FUNCTION(4, "PWM7"),
+ MTK_FUNCTION(6, "DISP_PWM"),
+ MTK_FUNCTION(7, "TESTB_OUT13")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(77, "MSDC2_DAT2"),
+ "W21", "mt8135",
+ MTK_EINT_FUNCTION(2, 63),
+ MTK_FUNCTION(0, "GPIO77"),
+ MTK_FUNCTION(1, "MSDC2_DAT2"),
+ MTK_FUNCTION(2, "EINT63"),
+ MTK_FUNCTION(4, "DSP2_IMS"),
+ MTK_FUNCTION(6, "DPI33_D6"),
+ MTK_FUNCTION(7, "TESTA_OUT25")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(78, "MSDC2_DAT3"),
+ "AA23", "mt8135",
+ MTK_EINT_FUNCTION(2, 64),
+ MTK_FUNCTION(0, "GPIO78"),
+ MTK_FUNCTION(1, "MSDC2_DAT3"),
+ MTK_FUNCTION(2, "EINT64"),
+ MTK_FUNCTION(4, "DSP2_ID"),
+ MTK_FUNCTION(6, "DPI33_D7"),
+ MTK_FUNCTION(7, "TESTA_OUT26")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(79, "MSDC2_CMD"),
+ "Y22", "mt8135",
+ MTK_EINT_FUNCTION(2, 60),
+ MTK_FUNCTION(0, "GPIO79"),
+ MTK_FUNCTION(1, "MSDC2_CMD"),
+ MTK_FUNCTION(2, "EINT60"),
+ MTK_FUNCTION(4, "DSP1_IMS"),
+ MTK_FUNCTION(5, "PCM1_WS"),
+ MTK_FUNCTION(6, "DPI33_D3"),
+ MTK_FUNCTION(7, "TESTA_OUT0")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(80, "MSDC2_CLK"),
+ "AA22", "mt8135",
+ MTK_EINT_FUNCTION(2, 59),
+ MTK_FUNCTION(0, "GPIO80"),
+ MTK_FUNCTION(1, "MSDC2_CLK"),
+ MTK_FUNCTION(2, "EINT59"),
+ MTK_FUNCTION(4, "DSP1_ICK"),
+ MTK_FUNCTION(5, "PCM1_CK"),
+ MTK_FUNCTION(6, "DPI33_D2"),
+ MTK_FUNCTION(7, "TESTA_OUT1")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(81, "MSDC2_DAT1"),
+ "Y21", "mt8135",
+ MTK_EINT_FUNCTION(2, 62),
+ MTK_FUNCTION(0, "GPIO81"),
+ MTK_FUNCTION(1, "MSDC2_DAT1"),
+ MTK_FUNCTION(2, "EINT62"),
+ MTK_FUNCTION(4, "DSP2_ICK"),
+ MTK_FUNCTION(5, "PCM1_DO"),
+ MTK_FUNCTION(6, "DPI33_D5")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(82, "MSDC2_DAT0"),
+ "AB22", "mt8135",
+ MTK_EINT_FUNCTION(2, 61),
+ MTK_FUNCTION(0, "GPIO82"),
+ MTK_FUNCTION(1, "MSDC2_DAT0"),
+ MTK_FUNCTION(2, "EINT61"),
+ MTK_FUNCTION(4, "DSP1_ID"),
+ MTK_FUNCTION(5, "PCM1_DI"),
+ MTK_FUNCTION(6, "DPI33_D4")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(83, "MSDC1_DAT0"),
+ "AC19", "mt8135",
+ MTK_EINT_FUNCTION(2, 53),
+ MTK_FUNCTION(0, "GPIO83"),
+ MTK_FUNCTION(1, "MSDC1_DAT0"),
+ MTK_FUNCTION(2, "EINT53"),
+ MTK_FUNCTION(3, "SCL1"),
+ MTK_FUNCTION(4, "PWM2"),
+ MTK_FUNCTION(5, "CLKM1"),
+ MTK_FUNCTION(7, "TESTB_OUT2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(84, "MSDC1_DAT1"),
+ "AA19", "mt8135",
+ MTK_EINT_FUNCTION(2, 54),
+ MTK_FUNCTION(0, "GPIO84"),
+ MTK_FUNCTION(1, "MSDC1_DAT1"),
+ MTK_FUNCTION(2, "EINT54"),
+ MTK_FUNCTION(3, "SDA1"),
+ MTK_FUNCTION(4, "PWM3"),
+ MTK_FUNCTION(5, "CLKM2"),
+ MTK_FUNCTION(7, "TESTB_OUT3")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(85, "MSDC1_CMD"),
+ "AA20", "mt8135",
+ MTK_EINT_FUNCTION(2, 52),
+ MTK_FUNCTION(0, "GPIO85"),
+ MTK_FUNCTION(1, "MSDC1_CMD"),
+ MTK_FUNCTION(2, "EINT52"),
+ MTK_FUNCTION(3, "SDA0"),
+ MTK_FUNCTION(4, "PWM1"),
+ MTK_FUNCTION(5, "CLKM0"),
+ MTK_FUNCTION(7, "TESTB_OUT1")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(86, "MSDC1_CLK"),
+ "AB19", "mt8135",
+ MTK_EINT_FUNCTION(2, 51),
+ MTK_FUNCTION(0, "GPIO86"),
+ MTK_FUNCTION(1, "MSDC1_CLK"),
+ MTK_FUNCTION(2, "EINT51"),
+ MTK_FUNCTION(3, "SCL0"),
+ MTK_FUNCTION(4, "DISP_PWM"),
+ MTK_FUNCTION(7, "TESTB_OUT0")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(87, "MSDC1_DAT2"),
+ "AA21", "mt8135",
+ MTK_EINT_FUNCTION(2, 55),
+ MTK_FUNCTION(0, "GPIO87"),
+ MTK_FUNCTION(1, "MSDC1_DAT2"),
+ MTK_FUNCTION(2, "EINT55"),
+ MTK_FUNCTION(3, "SCL4"),
+ MTK_FUNCTION(4, "PWM4"),
+ MTK_FUNCTION(5, "CLKM3"),
+ MTK_FUNCTION(7, "TESTB_OUT4")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(88, "MSDC1_DAT3"),
+ "AB20", "mt8135",
+ MTK_EINT_FUNCTION(2, 56),
+ MTK_FUNCTION(0, "GPIO88"),
+ MTK_FUNCTION(1, "MSDC1_DAT3"),
+ MTK_FUNCTION(2, "EINT56"),
+ MTK_FUNCTION(3, "SDA4"),
+ MTK_FUNCTION(4, "PWM5"),
+ MTK_FUNCTION(5, "CLKM4"),
+ MTK_FUNCTION(7, "TESTB_OUT5")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(89, "MSDC4_DAT0"),
+ "AB8", "mt8135",
+ MTK_EINT_FUNCTION(2, 133),
+ MTK_FUNCTION(0, "GPIO89"),
+ MTK_FUNCTION(1, "MSDC4_DAT0"),
+ MTK_FUNCTION(2, "EINT133"),
+ MTK_FUNCTION(4, "EXT_FRAME_SYNC"),
+ MTK_FUNCTION(5, "USB_DRVVBUS"),
+ MTK_FUNCTION(6, "A_FUNC_DIN[9]"),
+ MTK_FUNCTION(7, "LPTE")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(90, "MSDC4_DAT1"),
+ "AB7", "mt8135",
+ MTK_EINT_FUNCTION(2, 134),
+ MTK_FUNCTION(0, "GPIO90"),
+ MTK_FUNCTION(1, "MSDC4_DAT1"),
+ MTK_FUNCTION(2, "EINT134"),
+ MTK_FUNCTION(6, "A_FUNC_DIN[10]"),
+ MTK_FUNCTION(7, "LRSTB_1X")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(91, "MSDC4_DAT5"),
+ "AA8", "mt8135",
+ MTK_EINT_FUNCTION(2, 136),
+ MTK_FUNCTION(0, "GPIO91"),
+ MTK_FUNCTION(1, "MSDC4_DAT5"),
+ MTK_FUNCTION(2, "EINT136"),
+ MTK_FUNCTION(3, "I2SIN_WS"),
+ MTK_FUNCTION(4, "DAC_WS"),
+ MTK_FUNCTION(5, "PCM1_WS"),
+ MTK_FUNCTION(6, "A_FUNC_DIN[11]"),
+ MTK_FUNCTION(7, "SPI1_CSN")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(92, "MSDC4_DAT6"),
+ "AC4", "mt8135",
+ MTK_EINT_FUNCTION(2, 137),
+ MTK_FUNCTION(0, "GPIO92"),
+ MTK_FUNCTION(1, "MSDC4_DAT6"),
+ MTK_FUNCTION(2, "EINT137"),
+ MTK_FUNCTION(3, "I2SOUT_DAT"),
+ MTK_FUNCTION(4, "DAC_DAT_OUT"),
+ MTK_FUNCTION(5, "PCM1_DO"),
+ MTK_FUNCTION(6, "A_FUNC_DIN[12]"),
+ MTK_FUNCTION(7, "SPI1_MO")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(93, "MSDC4_DAT7"),
+ "AC6", "mt8135",
+ MTK_EINT_FUNCTION(2, 138),
+ MTK_FUNCTION(0, "GPIO93"),
+ MTK_FUNCTION(1, "MSDC4_DAT7"),
+ MTK_FUNCTION(2, "EINT138"),
+ MTK_FUNCTION(3, "I2SIN_DAT"),
+ MTK_FUNCTION(5, "PCM1_DI"),
+ MTK_FUNCTION(6, "A_FUNC_DIN[13]"),
+ MTK_FUNCTION(7, "SPI1_MI")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(94, "MSDC4_DAT4"),
+ "AA7", "mt8135",
+ MTK_EINT_FUNCTION(2, 135),
+ MTK_FUNCTION(0, "GPIO94"),
+ MTK_FUNCTION(1, "MSDC4_DAT4"),
+ MTK_FUNCTION(2, "EINT135"),
+ MTK_FUNCTION(3, "I2SIN_CK"),
+ MTK_FUNCTION(4, "DAC_CK"),
+ MTK_FUNCTION(5, "PCM1_CK"),
+ MTK_FUNCTION(6, "A_FUNC_DIN[14]"),
+ MTK_FUNCTION(7, "SPI1_CLK")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(95, "MSDC4_DAT2"),
+ "AB6", "mt8135",
+ MTK_EINT_FUNCTION(2, 131),
+ MTK_FUNCTION(0, "GPIO95"),
+ MTK_FUNCTION(1, "MSDC4_DAT2"),
+ MTK_FUNCTION(2, "EINT131"),
+ MTK_FUNCTION(3, "I2SIN_WS"),
+ MTK_FUNCTION(4, "CM2PDN_2X"),
+ MTK_FUNCTION(5, "DAC_WS"),
+ MTK_FUNCTION(6, "PCM1_WS"),
+ MTK_FUNCTION(7, "LSCE0B_1X")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(96, "MSDC4_CLK"),
+ "AB5", "mt8135",
+ MTK_EINT_FUNCTION(2, 129),
+ MTK_FUNCTION(0, "GPIO96"),
+ MTK_FUNCTION(1, "MSDC4_CLK"),
+ MTK_FUNCTION(2, "EINT129"),
+ MTK_FUNCTION(3, "DPI1_CK_2X"),
+ MTK_FUNCTION(4, "CM2PCLK_2X"),
+ MTK_FUNCTION(5, "PWM4"),
+ MTK_FUNCTION(6, "PCM1_DI"),
+ MTK_FUNCTION(7, "LSCK_1X")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(97, "MSDC4_DAT3"),
+ "Y8", "mt8135",
+ MTK_EINT_FUNCTION(2, 132),
+ MTK_FUNCTION(0, "GPIO97"),
+ MTK_FUNCTION(1, "MSDC4_DAT3"),
+ MTK_FUNCTION(2, "EINT132"),
+ MTK_FUNCTION(3, "I2SOUT_DAT"),
+ MTK_FUNCTION(4, "CM2RST_2X"),
+ MTK_FUNCTION(5, "DAC_DAT_OUT"),
+ MTK_FUNCTION(6, "PCM1_DO"),
+ MTK_FUNCTION(7, "LSCE1B_1X")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(98, "MSDC4_CMD"),
+ "AC3", "mt8135",
+ MTK_EINT_FUNCTION(2, 128),
+ MTK_FUNCTION(0, "GPIO98"),
+ MTK_FUNCTION(1, "MSDC4_CMD"),
+ MTK_FUNCTION(2, "EINT128"),
+ MTK_FUNCTION(3, "DPI1_DE_2X"),
+ MTK_FUNCTION(5, "PWM3"),
+ MTK_FUNCTION(7, "LSDA_1X")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(99, "MSDC4_RSTB"),
+ "AB4", "mt8135",
+ MTK_EINT_FUNCTION(2, 130),
+ MTK_FUNCTION(0, "GPIO99"),
+ MTK_FUNCTION(1, "MSDC4_RSTB"),
+ MTK_FUNCTION(2, "EINT130"),
+ MTK_FUNCTION(3, "I2SIN_CK"),
+ MTK_FUNCTION(4, "CM2MCLK_2X"),
+ MTK_FUNCTION(5, "DAC_CK"),
+ MTK_FUNCTION(6, "PCM1_CK"),
+ MTK_FUNCTION(7, "LSA0_1X")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(100, "SDA0"),
+ "W9", "mt8135",
+ MTK_EINT_FUNCTION(2, 91),
+ MTK_FUNCTION(0, "GPIO100"),
+ MTK_FUNCTION(1, "SDA0"),
+ MTK_FUNCTION(2, "EINT91"),
+ MTK_FUNCTION(3, "CLKM1"),
+ MTK_FUNCTION(4, "PWM1"),
+ MTK_FUNCTION(7, "A_FUNC_DIN[15]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(101, "SCL0"),
+ "W11", "mt8135",
+ MTK_EINT_FUNCTION(2, 90),
+ MTK_FUNCTION(0, "GPIO101"),
+ MTK_FUNCTION(1, "SCL0"),
+ MTK_FUNCTION(2, "EINT90"),
+ MTK_FUNCTION(3, "CLKM0"),
+ MTK_FUNCTION(4, "DISP_PWM"),
+ MTK_FUNCTION(7, "A_FUNC_DIN[16]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(102, "EINT10_AUXIN2"),
+ "AA3", "mt8135",
+ MTK_EINT_FUNCTION(1, 10),
+ MTK_FUNCTION(0, "GPIO102"),
+ MTK_FUNCTION(1, "EINT10"),
+ MTK_FUNCTION(5, "USB_TEST_IO[16]"),
+ MTK_FUNCTION(6, "TESTB_OUT16"),
+ MTK_FUNCTION(7, "A_FUNC_DIN[17]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(103, "EINT11_AUXIN3"),
+ "AB2", "mt8135",
+ MTK_EINT_FUNCTION(1, 11),
+ MTK_FUNCTION(0, "GPIO103"),
+ MTK_FUNCTION(1, "EINT11"),
+ MTK_FUNCTION(5, "USB_TEST_IO[17]"),
+ MTK_FUNCTION(6, "TESTB_OUT17"),
+ MTK_FUNCTION(7, "A_FUNC_DIN[18]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(104, "EINT16_AUXIN4"),
+ "AB3", "mt8135",
+ MTK_EINT_FUNCTION(1, 16),
+ MTK_FUNCTION(0, "GPIO104"),
+ MTK_FUNCTION(1, "EINT16"),
+ MTK_FUNCTION(5, "USB_TEST_IO[18]"),
+ MTK_FUNCTION(6, "TESTB_OUT18"),
+ MTK_FUNCTION(7, "A_FUNC_DIN[19]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(105, "I2S_CLK"),
+ "W6", "mt8135",
+ MTK_EINT_FUNCTION(2, 10),
+ MTK_FUNCTION(0, "GPIO105"),
+ MTK_FUNCTION(1, "I2SIN_CK"),
+ MTK_FUNCTION(2, "EINT10"),
+ MTK_FUNCTION(3, "DAC_CK"),
+ MTK_FUNCTION(4, "PCM1_CK"),
+ MTK_FUNCTION(5, "USB_TEST_IO[19]"),
+ MTK_FUNCTION(6, "TESTB_OUT19"),
+ MTK_FUNCTION(7, "A_FUNC_DIN[20]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(106, "I2S_WS"),
+ "AA6", "mt8135",
+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
+ MTK_FUNCTION(0, "GPIO106"),
+ MTK_FUNCTION(1, "I2SIN_WS"),
+ MTK_FUNCTION(3, "DAC_WS"),
+ MTK_FUNCTION(4, "PCM1_WS"),
+ MTK_FUNCTION(5, "USB_TEST_IO[20]"),
+ MTK_FUNCTION(6, "TESTB_OUT20"),
+ MTK_FUNCTION(7, "A_FUNC_DIN[21]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(107, "I2S_DATA_IN"),
+ "AA5", "mt8135",
+ MTK_EINT_FUNCTION(2, 11),
+ MTK_FUNCTION(0, "GPIO107"),
+ MTK_FUNCTION(1, "I2SIN_DAT"),
+ MTK_FUNCTION(2, "EINT11"),
+ MTK_FUNCTION(4, "PCM1_DI"),
+ MTK_FUNCTION(5, "USB_TEST_IO[21]"),
+ MTK_FUNCTION(6, "TESTB_OUT22"),
+ MTK_FUNCTION(7, "A_FUNC_DIN[22]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(108, "I2S_DATA_OUT"),
+ "AA4", "mt8135",
+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
+ MTK_FUNCTION(0, "GPIO108"),
+ MTK_FUNCTION(1, "I2SOUT_DAT"),
+ MTK_FUNCTION(3, "DAC_DAT_OUT"),
+ MTK_FUNCTION(4, "PCM1_DO"),
+ MTK_FUNCTION(5, "USB_TEST_IO[22]"),
+ MTK_FUNCTION(6, "TESTB_OUT23"),
+ MTK_FUNCTION(7, "A_FUNC_DIN[23]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(109, "EINT5"),
+ "W5", "mt8135",
+ MTK_EINT_FUNCTION(1, 5),
+ MTK_FUNCTION(0, "GPIO109"),
+ MTK_FUNCTION(1, "EINT5"),
+ MTK_FUNCTION(2, "PWM5"),
+ MTK_FUNCTION(3, "CLKM3"),
+ MTK_FUNCTION(4, "GPU_JTRSTB"),
+ MTK_FUNCTION(5, "USB_TEST_IO[23]"),
+ MTK_FUNCTION(6, "TESTB_OUT26"),
+ MTK_FUNCTION(7, "A_FUNC_DIN[24]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(110, "EINT6"),
+ "V5", "mt8135",
+ MTK_EINT_FUNCTION(1, 6),
+ MTK_FUNCTION(0, "GPIO110"),
+ MTK_FUNCTION(1, "EINT6"),
+ MTK_FUNCTION(2, "PWM6"),
+ MTK_FUNCTION(3, "CLKM4"),
+ MTK_FUNCTION(4, "GPU_JTMS"),
+ MTK_FUNCTION(5, "USB_TEST_IO[24]"),
+ MTK_FUNCTION(6, "TESTB_OUT27"),
+ MTK_FUNCTION(7, "A_FUNC_DIN[25]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(111, "EINT7"),
+ "W3", "mt8135",
+ MTK_EINT_FUNCTION(1, 7),
+ MTK_FUNCTION(0, "GPIO111"),
+ MTK_FUNCTION(1, "EINT7"),
+ MTK_FUNCTION(2, "PWM7"),
+ MTK_FUNCTION(3, "CLKM5"),
+ MTK_FUNCTION(4, "GPU_JTDO"),
+ MTK_FUNCTION(5, "USB_TEST_IO[25]"),
+ MTK_FUNCTION(6, "TESTB_OUT28"),
+ MTK_FUNCTION(7, "A_FUNC_DIN[26]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(112, "EINT8"),
+ "V6", "mt8135",
+ MTK_EINT_FUNCTION(1, 8),
+ MTK_FUNCTION(0, "GPIO112"),
+ MTK_FUNCTION(1, "EINT8"),
+ MTK_FUNCTION(2, "DISP_PWM"),
+ MTK_FUNCTION(3, "CLKM6"),
+ MTK_FUNCTION(4, "GPU_JTDI"),
+ MTK_FUNCTION(5, "USB_TEST_IO[26]"),
+ MTK_FUNCTION(6, "TESTB_OUT29"),
+ MTK_FUNCTION(7, "EXT_FRAME_SYNC")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(113, "EINT9"),
+ "W8", "mt8135",
+ MTK_EINT_FUNCTION(1, 9),
+ MTK_FUNCTION(0, "GPIO113"),
+ MTK_FUNCTION(1, "EINT9"),
+ MTK_FUNCTION(4, "GPU_JTCK"),
+ MTK_FUNCTION(5, "USB_DRVVBUS"),
+ MTK_FUNCTION(6, "TESTB_OUT30"),
+ MTK_FUNCTION(7, "A_FUNC_DIN[27]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(114, "LPCE1B"),
+ "W4", "mt8135",
+ MTK_EINT_FUNCTION(2, 127),
+ MTK_FUNCTION(0, "GPIO114"),
+ MTK_FUNCTION(1, "LPCE1B"),
+ MTK_FUNCTION(2, "EINT127"),
+ MTK_FUNCTION(5, "PWM2"),
+ MTK_FUNCTION(6, "TESTB_OUT14"),
+ MTK_FUNCTION(7, "A_FUNC_DIN[28]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(115, "LPCE0B"),
+ "T5", "mt8135",
+ MTK_EINT_FUNCTION(2, 126),
+ MTK_FUNCTION(0, "GPIO115"),
+ MTK_FUNCTION(1, "LPCE0B"),
+ MTK_FUNCTION(2, "EINT126"),
+ MTK_FUNCTION(5, "PWM1"),
+ MTK_FUNCTION(6, "TESTB_OUT15"),
+ MTK_FUNCTION(7, "A_FUNC_DIN[29]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(116, "DISP_PWM"),
+ "V4", "mt8135",
+ MTK_EINT_FUNCTION(2, 77),
+ MTK_FUNCTION(0, "GPIO116"),
+ MTK_FUNCTION(1, "DISP_PWM"),
+ MTK_FUNCTION(2, "EINT77"),
+ MTK_FUNCTION(3, "LSDI"),
+ MTK_FUNCTION(4, "PWM1"),
+ MTK_FUNCTION(5, "PWM2"),
+ MTK_FUNCTION(7, "PWM3")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(117, "EINT1"),
+ "T6", "mt8135",
+ MTK_EINT_FUNCTION(1, 1),
+ MTK_FUNCTION(0, "GPIO117"),
+ MTK_FUNCTION(1, "EINT1"),
+ MTK_FUNCTION(2, "PWM2"),
+ MTK_FUNCTION(3, "CLKM1"),
+ MTK_FUNCTION(5, "USB_TEST_IO[13]"),
+ MTK_FUNCTION(7, "USB_SDA")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(118, "EINT2"),
+ "T4", "mt8135",
+ MTK_EINT_FUNCTION(1, 2),
+ MTK_FUNCTION(0, "GPIO118"),
+ MTK_FUNCTION(1, "EINT2"),
+ MTK_FUNCTION(2, "PWM3"),
+ MTK_FUNCTION(3, "CLKM2"),
+ MTK_FUNCTION(5, "USB_TEST_IO[14]"),
+ MTK_FUNCTION(6, "SRCLKENAI2"),
+ MTK_FUNCTION(7, "A_FUNC_DIN[30]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(119, "EINT3"),
+ "R4", "mt8135",
+ MTK_EINT_FUNCTION(1, 3),
+ MTK_FUNCTION(0, "GPIO119"),
+ MTK_FUNCTION(1, "EINT3"),
+ MTK_FUNCTION(5, "USB_TEST_IO[15]"),
+ MTK_FUNCTION(6, "SRCLKENAI1"),
+ MTK_FUNCTION(7, "EXT_26M_CK")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(120, "EINT4"),
+ "R5", "mt8135",
+ MTK_EINT_FUNCTION(1, 4),
+ MTK_FUNCTION(0, "GPIO120"),
+ MTK_FUNCTION(1, "EINT4"),
+ MTK_FUNCTION(2, "PWM4"),
+ MTK_FUNCTION(5, "USB_DRVVBUS"),
+ MTK_FUNCTION(7, "A_FUNC_DIN[31]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(121, "DPIDE"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 100),
+ MTK_FUNCTION(0, "GPIO121"),
+ MTK_FUNCTION(1, "DPI0_DE"),
+ MTK_FUNCTION(2, "EINT100"),
+ MTK_FUNCTION(3, "I2SOUT_DAT"),
+ MTK_FUNCTION(4, "DAC_DAT_OUT"),
+ MTK_FUNCTION(5, "PCM1_DO"),
+ MTK_FUNCTION(6, "IRDA_TXD")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(122, "DPICK"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 101),
+ MTK_FUNCTION(0, "GPIO122"),
+ MTK_FUNCTION(1, "DPI0_CK"),
+ MTK_FUNCTION(2, "EINT101"),
+ MTK_FUNCTION(3, "I2SIN_DAT"),
+ MTK_FUNCTION(5, "PCM1_DI"),
+ MTK_FUNCTION(6, "IRDA_PDN")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(123, "DPIG4"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 114),
+ MTK_FUNCTION(0, "GPIO123"),
+ MTK_FUNCTION(1, "DPI0_G4"),
+ MTK_FUNCTION(2, "EINT114"),
+ MTK_FUNCTION(4, "CM2DAT_2X[0]"),
+ MTK_FUNCTION(5, "DSP2_ID")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(124, "DPIG5"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 115),
+ MTK_FUNCTION(0, "GPIO124"),
+ MTK_FUNCTION(1, "DPI0_G5"),
+ MTK_FUNCTION(2, "EINT115"),
+ MTK_FUNCTION(4, "CM2DAT_2X[1]"),
+ MTK_FUNCTION(5, "DSP2_ICK")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(125, "DPIR3"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 121),
+ MTK_FUNCTION(0, "GPIO125"),
+ MTK_FUNCTION(1, "DPI0_R3"),
+ MTK_FUNCTION(2, "EINT121"),
+ MTK_FUNCTION(4, "CM2DAT_2X[7]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(126, "DPIG1"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 111),
+ MTK_FUNCTION(0, "GPIO126"),
+ MTK_FUNCTION(1, "DPI0_G1"),
+ MTK_FUNCTION(2, "EINT111"),
+ MTK_FUNCTION(5, "DSP1_ICK")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(127, "DPIVSYNC"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 98),
+ MTK_FUNCTION(0, "GPIO127"),
+ MTK_FUNCTION(1, "DPI0_VSYNC"),
+ MTK_FUNCTION(2, "EINT98"),
+ MTK_FUNCTION(3, "I2SIN_CK"),
+ MTK_FUNCTION(4, "DAC_CK"),
+ MTK_FUNCTION(5, "PCM1_CK")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(128, "DPIHSYNC"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 99),
+ MTK_FUNCTION(0, "GPIO128"),
+ MTK_FUNCTION(1, "DPI0_HSYNC"),
+ MTK_FUNCTION(2, "EINT99"),
+ MTK_FUNCTION(3, "I2SIN_WS"),
+ MTK_FUNCTION(4, "DAC_WS"),
+ MTK_FUNCTION(5, "PCM1_WS"),
+ MTK_FUNCTION(6, "IRDA_RXD")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(129, "DPIB0"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 102),
+ MTK_FUNCTION(0, "GPIO129"),
+ MTK_FUNCTION(1, "DPI0_B0"),
+ MTK_FUNCTION(2, "EINT102"),
+ MTK_FUNCTION(4, "SCL0"),
+ MTK_FUNCTION(5, "DISP_PWM")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(130, "DPIB1"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 103),
+ MTK_FUNCTION(0, "GPIO130"),
+ MTK_FUNCTION(1, "DPI0_B1"),
+ MTK_FUNCTION(2, "EINT103"),
+ MTK_FUNCTION(3, "CLKM0"),
+ MTK_FUNCTION(4, "SDA0"),
+ MTK_FUNCTION(5, "PWM1")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(131, "DPIB2"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 104),
+ MTK_FUNCTION(0, "GPIO131"),
+ MTK_FUNCTION(1, "DPI0_B2"),
+ MTK_FUNCTION(2, "EINT104"),
+ MTK_FUNCTION(3, "CLKM1"),
+ MTK_FUNCTION(4, "SCL1"),
+ MTK_FUNCTION(5, "PWM2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(132, "DPIB3"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 105),
+ MTK_FUNCTION(0, "GPIO132"),
+ MTK_FUNCTION(1, "DPI0_B3"),
+ MTK_FUNCTION(2, "EINT105"),
+ MTK_FUNCTION(3, "CLKM2"),
+ MTK_FUNCTION(4, "SDA1"),
+ MTK_FUNCTION(5, "PWM3")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(133, "DPIB4"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 106),
+ MTK_FUNCTION(0, "GPIO133"),
+ MTK_FUNCTION(1, "DPI0_B4"),
+ MTK_FUNCTION(2, "EINT106"),
+ MTK_FUNCTION(3, "CLKM3"),
+ MTK_FUNCTION(4, "SCL2"),
+ MTK_FUNCTION(5, "PWM4")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(134, "DPIB5"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 107),
+ MTK_FUNCTION(0, "GPIO134"),
+ MTK_FUNCTION(1, "DPI0_B5"),
+ MTK_FUNCTION(2, "EINT107"),
+ MTK_FUNCTION(3, "CLKM4"),
+ MTK_FUNCTION(4, "SDA2"),
+ MTK_FUNCTION(5, "PWM5")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(135, "DPIB6"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 108),
+ MTK_FUNCTION(0, "GPIO135"),
+ MTK_FUNCTION(1, "DPI0_B6"),
+ MTK_FUNCTION(2, "EINT108"),
+ MTK_FUNCTION(3, "CLKM5"),
+ MTK_FUNCTION(4, "SCL3"),
+ MTK_FUNCTION(5, "PWM6")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(136, "DPIB7"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 109),
+ MTK_FUNCTION(0, "GPIO136"),
+ MTK_FUNCTION(1, "DPI0_B7"),
+ MTK_FUNCTION(2, "EINT109"),
+ MTK_FUNCTION(3, "CLKM6"),
+ MTK_FUNCTION(4, "SDA3"),
+ MTK_FUNCTION(5, "PWM7")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(137, "DPIG0"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 110),
+ MTK_FUNCTION(0, "GPIO137"),
+ MTK_FUNCTION(1, "DPI0_G0"),
+ MTK_FUNCTION(2, "EINT110"),
+ MTK_FUNCTION(5, "DSP1_ID")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(138, "DPIG2"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 112),
+ MTK_FUNCTION(0, "GPIO138"),
+ MTK_FUNCTION(1, "DPI0_G2"),
+ MTK_FUNCTION(2, "EINT112"),
+ MTK_FUNCTION(5, "DSP1_IMS")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(139, "DPIG3"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 113),
+ MTK_FUNCTION(0, "GPIO139"),
+ MTK_FUNCTION(1, "DPI0_G3"),
+ MTK_FUNCTION(2, "EINT113"),
+ MTK_FUNCTION(5, "DSP2_IMS")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(140, "DPIG6"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 116),
+ MTK_FUNCTION(0, "GPIO140"),
+ MTK_FUNCTION(1, "DPI0_G6"),
+ MTK_FUNCTION(2, "EINT116"),
+ MTK_FUNCTION(4, "CM2DAT_2X[2]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(141, "DPIG7"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 117),
+ MTK_FUNCTION(0, "GPIO141"),
+ MTK_FUNCTION(1, "DPI0_G7"),
+ MTK_FUNCTION(2, "EINT117"),
+ MTK_FUNCTION(4, "CM2DAT_2X[3]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(142, "DPIR0"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 118),
+ MTK_FUNCTION(0, "GPIO142"),
+ MTK_FUNCTION(1, "DPI0_R0"),
+ MTK_FUNCTION(2, "EINT118"),
+ MTK_FUNCTION(4, "CM2DAT_2X[4]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(143, "DPIR1"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 119),
+ MTK_FUNCTION(0, "GPIO143"),
+ MTK_FUNCTION(1, "DPI0_R1"),
+ MTK_FUNCTION(2, "EINT119"),
+ MTK_FUNCTION(4, "CM2DAT_2X[5]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(144, "DPIR2"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 120),
+ MTK_FUNCTION(0, "GPIO144"),
+ MTK_FUNCTION(1, "DPI0_R2"),
+ MTK_FUNCTION(2, "EINT120"),
+ MTK_FUNCTION(4, "CM2DAT_2X[6]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(145, "DPIR4"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 122),
+ MTK_FUNCTION(0, "GPIO145"),
+ MTK_FUNCTION(1, "DPI0_R4"),
+ MTK_FUNCTION(2, "EINT122"),
+ MTK_FUNCTION(4, "CM2DAT_2X[8]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(146, "DPIR5"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 123),
+ MTK_FUNCTION(0, "GPIO146"),
+ MTK_FUNCTION(1, "DPI0_R5"),
+ MTK_FUNCTION(2, "EINT123"),
+ MTK_FUNCTION(4, "CM2DAT_2X[9]")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(147, "DPIR6"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 124),
+ MTK_FUNCTION(0, "GPIO147"),
+ MTK_FUNCTION(1, "DPI0_R6"),
+ MTK_FUNCTION(2, "EINT124"),
+ MTK_FUNCTION(4, "CM2VSYNC_2X")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(148, "DPIR7"),
+ NULL, "mt8135",
+ MTK_EINT_FUNCTION(2, 125),
+ MTK_FUNCTION(0, "GPIO148"),
+ MTK_FUNCTION(1, "DPI0_R7"),
+ MTK_FUNCTION(2, "EINT125"),
+ MTK_FUNCTION(4, "CM2HSYNC_2X")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(149, "TDN3/LVDS(TDN3)"),
+ "AA2", "mt8135",
+ MTK_EINT_FUNCTION(2, 36),
+ MTK_FUNCTION(0, "GPIO149"),
+ MTK_FUNCTION(2, "EINT36")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(150, "TDP3/LVDS(TDP3)"),
+ "AA1", "mt8135",
+ MTK_EINT_FUNCTION(2, 35),
+ MTK_FUNCTION(0, "GPIO150"),
+ MTK_FUNCTION(2, "EINT35")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(151, "TDN2/LVDS(TCN)"),
+ "Y2", "mt8135",
+ MTK_EINT_FUNCTION(2, 169),
+ MTK_FUNCTION(0, "GPIO151"),
+ MTK_FUNCTION(2, "EINT169")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(152, "TDP2/LVDS(TCP)"),
+ "Y1", "mt8135",
+ MTK_EINT_FUNCTION(2, 168),
+ MTK_FUNCTION(0, "GPIO152"),
+ MTK_FUNCTION(2, "EINT168")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(153, "TCN/LVDS(TDN2)"),
+ "W2", "mt8135",
+ MTK_EINT_FUNCTION(2, 163),
+ MTK_FUNCTION(0, "GPIO153"),
+ MTK_FUNCTION(2, "EINT163")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(154, "TCP/LVDS(TDP2)"),
+ "W1", "mt8135",
+ MTK_EINT_FUNCTION(2, 162),
+ MTK_FUNCTION(0, "GPIO154"),
+ MTK_FUNCTION(2, "EINT162")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(155, "TDN1/LVDS(TDN1)"),
+ "V3", "mt8135",
+ MTK_EINT_FUNCTION(2, 167),
+ MTK_FUNCTION(0, "GPIO155"),
+ MTK_FUNCTION(2, "EINT167")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(156, "TDP1/LVDS(TDP1)"),
+ "V2", "mt8135",
+ MTK_EINT_FUNCTION(2, 166),
+ MTK_FUNCTION(0, "GPIO156"),
+ MTK_FUNCTION(2, "EINT166")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(157, "TDN0/LVDS(TDN0)"),
+ "U3", "mt8135",
+ MTK_EINT_FUNCTION(2, 165),
+ MTK_FUNCTION(0, "GPIO157"),
+ MTK_FUNCTION(2, "EINT165")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(158, "TDP0/LVDS(TDP0)"),
+ "U2", "mt8135",
+ MTK_EINT_FUNCTION(2, 164),
+ MTK_FUNCTION(0, "GPIO158"),
+ MTK_FUNCTION(2, "EINT164")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(159, "RDN3"),
+ "N5", "mt8135",
+ MTK_EINT_FUNCTION(2, 18),
+ MTK_FUNCTION(0, "GPIO159"),
+ MTK_FUNCTION(2, "EINT18")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(160, "RDP3"),
+ "N4", "mt8135",
+ MTK_EINT_FUNCTION(2, 30),
+ MTK_FUNCTION(0, "GPIO160"),
+ MTK_FUNCTION(2, "EINT30")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(161, "RDN2"),
+ "T2", "mt8135",
+ MTK_EINT_FUNCTION(2, 31),
+ MTK_FUNCTION(0, "GPIO161"),
+ MTK_FUNCTION(2, "EINT31")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(162, "RDP2"),
+ "T3", "mt8135",
+ MTK_EINT_FUNCTION(2, 32),
+ MTK_FUNCTION(0, "GPIO162"),
+ MTK_FUNCTION(2, "EINT32")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(163, "RCN"),
+ "P2", "mt8135",
+ MTK_EINT_FUNCTION(2, 33),
+ MTK_FUNCTION(0, "GPIO163"),
+ MTK_FUNCTION(2, "EINT33")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(164, "RCP"),
+ "P3", "mt8135",
+ MTK_EINT_FUNCTION(2, 39),
+ MTK_FUNCTION(0, "GPIO164"),
+ MTK_FUNCTION(2, "EINT39")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(165, "RDN1"),
+ "R3", "mt8135",
+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
+ MTK_FUNCTION(0, "GPIO165")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(166, "RDP1"),
+ "R2", "mt8135",
+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
+ MTK_FUNCTION(0, "GPIO166")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(167, "RDN0"),
+ "N3", "mt8135",
+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
+ MTK_FUNCTION(0, "GPIO167")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(168, "RDP0"),
+ "N2", "mt8135",
+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
+ MTK_FUNCTION(0, "GPIO168")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(169, "RDN1_A"),
+ "M4", "mt8135",
+ MTK_EINT_FUNCTION(2, 175),
+ MTK_FUNCTION(0, "GPIO169"),
+ MTK_FUNCTION(1, "CMDAT6"),
+ MTK_FUNCTION(2, "EINT175")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(170, "RDP1_A"),
+ "M3", "mt8135",
+ MTK_EINT_FUNCTION(2, 174),
+ MTK_FUNCTION(0, "GPIO170"),
+ MTK_FUNCTION(1, "CMDAT7"),
+ MTK_FUNCTION(2, "EINT174")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(171, "RCN_A"),
+ "L3", "mt8135",
+ MTK_EINT_FUNCTION(2, 171),
+ MTK_FUNCTION(0, "GPIO171"),
+ MTK_FUNCTION(1, "CMDAT8"),
+ MTK_FUNCTION(2, "EINT171")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(172, "RCP_A"),
+ "L2", "mt8135",
+ MTK_EINT_FUNCTION(2, 170),
+ MTK_FUNCTION(0, "GPIO172"),
+ MTK_FUNCTION(1, "CMDAT9"),
+ MTK_FUNCTION(2, "EINT170")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(173, "RDN0_A"),
+ "M2", "mt8135",
+ MTK_EINT_FUNCTION(2, 173),
+ MTK_FUNCTION(0, "GPIO173"),
+ MTK_FUNCTION(1, "CMHSYNC"),
+ MTK_FUNCTION(2, "EINT173")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(174, "RDP0_A"),
+ "M1", "mt8135",
+ MTK_EINT_FUNCTION(2, 172),
+ MTK_FUNCTION(0, "GPIO174"),
+ MTK_FUNCTION(1, "CMVSYNC"),
+ MTK_FUNCTION(2, "EINT172")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(175, "RDN1_B"),
+ "H2", "mt8135",
+ MTK_EINT_FUNCTION(2, 181),
+ MTK_FUNCTION(0, "GPIO175"),
+ MTK_FUNCTION(1, "CMDAT2"),
+ MTK_FUNCTION(2, "EINT181"),
+ MTK_FUNCTION(3, "CMCSD2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(176, "RDP1_B"),
+ "H1", "mt8135",
+ MTK_EINT_FUNCTION(2, 180),
+ MTK_FUNCTION(0, "GPIO176"),
+ MTK_FUNCTION(1, "CMDAT3"),
+ MTK_FUNCTION(2, "EINT180"),
+ MTK_FUNCTION(3, "CMCSD3")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(177, "RCN_B"),
+ "K3", "mt8135",
+ MTK_EINT_FUNCTION(2, 177),
+ MTK_FUNCTION(0, "GPIO177"),
+ MTK_FUNCTION(1, "CMDAT4"),
+ MTK_FUNCTION(2, "EINT177")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(178, "RCP_B"),
+ "K2", "mt8135",
+ MTK_EINT_FUNCTION(2, 176),
+ MTK_FUNCTION(0, "GPIO178"),
+ MTK_FUNCTION(1, "CMDAT5"),
+ MTK_FUNCTION(2, "EINT176")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(179, "RDN0_B"),
+ "J3", "mt8135",
+ MTK_EINT_FUNCTION(2, 179),
+ MTK_FUNCTION(0, "GPIO179"),
+ MTK_FUNCTION(1, "CMDAT0"),
+ MTK_FUNCTION(2, "EINT179"),
+ MTK_FUNCTION(3, "CMCSD0")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(180, "RDP0_B"),
+ "J2", "mt8135",
+ MTK_EINT_FUNCTION(2, 178),
+ MTK_FUNCTION(0, "GPIO180"),
+ MTK_FUNCTION(1, "CMDAT1"),
+ MTK_FUNCTION(2, "EINT178"),
+ MTK_FUNCTION(3, "CMCSD1")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(181, "CMPCLK"),
+ "K4", "mt8135",
+ MTK_EINT_FUNCTION(2, 182),
+ MTK_FUNCTION(0, "GPIO181"),
+ MTK_FUNCTION(1, "CMPCLK"),
+ MTK_FUNCTION(2, "EINT182"),
+ MTK_FUNCTION(3, "CMCSK"),
+ MTK_FUNCTION(4, "CM2MCLK_4X"),
+ MTK_FUNCTION(5, "TS_AUXADC_SEL[3]"),
+ MTK_FUNCTION(6, "VENC_TEST_CK"),
+ MTK_FUNCTION(7, "TESTA_OUT27")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(182, "CMMCLK"),
+ "J5", "mt8135",
+ MTK_EINT_FUNCTION(2, 183),
+ MTK_FUNCTION(0, "GPIO182"),
+ MTK_FUNCTION(1, "CMMCLK"),
+ MTK_FUNCTION(2, "EINT183"),
+ MTK_FUNCTION(5, "TS_AUXADC_SEL[2]"),
+ MTK_FUNCTION(7, "TESTA_OUT28")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(183, "CMRST"),
+ "J6", "mt8135",
+ MTK_EINT_FUNCTION(2, 185),
+ MTK_FUNCTION(0, "GPIO183"),
+ MTK_FUNCTION(1, "CMRST"),
+ MTK_FUNCTION(2, "EINT185"),
+ MTK_FUNCTION(5, "TS_AUXADC_SEL[1]"),
+ MTK_FUNCTION(7, "TESTA_OUT30")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(184, "CMPDN"),
+ "J4", "mt8135",
+ MTK_EINT_FUNCTION(2, 184),
+ MTK_FUNCTION(0, "GPIO184"),
+ MTK_FUNCTION(1, "CMPDN"),
+ MTK_FUNCTION(2, "EINT184"),
+ MTK_FUNCTION(5, "TS_AUXADC_SEL[0]"),
+ MTK_FUNCTION(7, "TESTA_OUT29")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(185, "CMFLASH"),
+ "G4", "mt8135",
+ MTK_EINT_FUNCTION(2, 186),
+ MTK_FUNCTION(0, "GPIO185"),
+ MTK_FUNCTION(1, "CMFLASH"),
+ MTK_FUNCTION(2, "EINT186"),
+ MTK_FUNCTION(3, "CM2MCLK_3X"),
+ MTK_FUNCTION(6, "MFG_TEST_CK_1"),
+ MTK_FUNCTION(7, "TESTA_OUT31")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(186, "MRG_I2S_PCM_CLK"),
+ "F5", "mt8135",
+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
+ MTK_FUNCTION(0, "GPIO186"),
+ MTK_FUNCTION(1, "MRG_I2S_PCM_CLK"),
+ MTK_FUNCTION(3, "I2SIN_CK"),
+ MTK_FUNCTION(4, "PCM0_CK"),
+ MTK_FUNCTION(5, "DSP2_ICK"),
+ MTK_FUNCTION(6, "IMG_TEST_CK"),
+ MTK_FUNCTION(7, "USB_SCL")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(187, "MRG_I2S_PCM_SYNC"),
+ "G6", "mt8135",
+ MTK_EINT_FUNCTION(2, 16),
+ MTK_FUNCTION(0, "GPIO187"),
+ MTK_FUNCTION(1, "MRG_I2S_PCM_SYNC"),
+ MTK_FUNCTION(2, "EINT16"),
+ MTK_FUNCTION(3, "I2SIN_WS"),
+ MTK_FUNCTION(4, "PCM0_WS"),
+ MTK_FUNCTION(6, "DISP_TEST_CK")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(188, "MRG_I2S_PCM_RX"),
+ "G3", "mt8135",
+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
+ MTK_FUNCTION(0, "GPIO188"),
+ MTK_FUNCTION(1, "MRG_I2S_PCM_RX"),
+ MTK_FUNCTION(3, "I2SIN_DAT"),
+ MTK_FUNCTION(4, "PCM0_DI"),
+ MTK_FUNCTION(5, "DSP2_ID"),
+ MTK_FUNCTION(6, "MFG_TEST_CK"),
+ MTK_FUNCTION(7, "USB_SDA")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(189, "MRG_I2S_PCM_TX"),
+ "G5", "mt8135",
+ MTK_EINT_FUNCTION(2, 17),
+ MTK_FUNCTION(0, "GPIO189"),
+ MTK_FUNCTION(1, "MRG_I2S_PCM_TX"),
+ MTK_FUNCTION(2, "EINT17"),
+ MTK_FUNCTION(3, "I2SOUT_DAT"),
+ MTK_FUNCTION(4, "PCM0_DO"),
+ MTK_FUNCTION(6, "VDEC_TEST_CK")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(190, "SRCLKENAI"),
+ "K5", "mt8135",
+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
+ MTK_FUNCTION(0, "GPIO190"),
+ MTK_FUNCTION(1, "SRCLKENAI")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(191, "URXD3"),
+ "C3", "mt8135",
+ MTK_EINT_FUNCTION(2, 87),
+ MTK_FUNCTION(0, "GPIO191"),
+ MTK_FUNCTION(1, "URXD3"),
+ MTK_FUNCTION(2, "EINT87"),
+ MTK_FUNCTION(3, "UTXD3"),
+ MTK_FUNCTION(5, "TS_AUX_ST"),
+ MTK_FUNCTION(6, "PWM4")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(192, "UTXD3"),
+ "B2", "mt8135",
+ MTK_EINT_FUNCTION(2, 86),
+ MTK_FUNCTION(0, "GPIO192"),
+ MTK_FUNCTION(1, "UTXD3"),
+ MTK_FUNCTION(2, "EINT86"),
+ MTK_FUNCTION(3, "URXD3"),
+ MTK_FUNCTION(5, "TS_AUX_CS_B"),
+ MTK_FUNCTION(6, "PWM3")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(193, "SDA2"),
+ "G2", "mt8135",
+ MTK_EINT_FUNCTION(2, 95),
+ MTK_FUNCTION(0, "GPIO193"),
+ MTK_FUNCTION(1, "SDA2"),
+ MTK_FUNCTION(2, "EINT95"),
+ MTK_FUNCTION(3, "CLKM5"),
+ MTK_FUNCTION(4, "PWM5"),
+ MTK_FUNCTION(5, "TS_AUX_PWDB")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(194, "SCL2"),
+ "F4", "mt8135",
+ MTK_EINT_FUNCTION(2, 94),
+ MTK_FUNCTION(0, "GPIO194"),
+ MTK_FUNCTION(1, "SCL2"),
+ MTK_FUNCTION(2, "EINT94"),
+ MTK_FUNCTION(3, "CLKM4"),
+ MTK_FUNCTION(4, "PWM4"),
+ MTK_FUNCTION(5, "TS_AUXADC_TEST_CK")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(195, "SDA1"),
+ "F2", "mt8135",
+ MTK_EINT_FUNCTION(2, 93),
+ MTK_FUNCTION(0, "GPIO195"),
+ MTK_FUNCTION(1, "SDA1"),
+ MTK_FUNCTION(2, "EINT93"),
+ MTK_FUNCTION(3, "CLKM3"),
+ MTK_FUNCTION(4, "PWM3"),
+ MTK_FUNCTION(5, "TS_AUX_SCLK_PWDB")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(196, "SCL1"),
+ "F3", "mt8135",
+ MTK_EINT_FUNCTION(2, 92),
+ MTK_FUNCTION(0, "GPIO196"),
+ MTK_FUNCTION(1, "SCL1"),
+ MTK_FUNCTION(2, "EINT92"),
+ MTK_FUNCTION(3, "CLKM2"),
+ MTK_FUNCTION(4, "PWM2"),
+ MTK_FUNCTION(5, "TS_AUX_DIN")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(197, "MSDC3_DAT2"),
+ "E1", "mt8135",
+ MTK_EINT_FUNCTION(2, 71),
+ MTK_FUNCTION(0, "GPIO197"),
+ MTK_FUNCTION(1, "MSDC3_DAT2"),
+ MTK_FUNCTION(2, "EINT71"),
+ MTK_FUNCTION(3, "SCL6"),
+ MTK_FUNCTION(4, "PWM5"),
+ MTK_FUNCTION(5, "CLKM4"),
+ MTK_FUNCTION(6, "MFG_TEST_CK_2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(198, "MSDC3_DAT3"),
+ "C2", "mt8135",
+ MTK_EINT_FUNCTION(2, 72),
+ MTK_FUNCTION(0, "GPIO198"),
+ MTK_FUNCTION(1, "MSDC3_DAT3"),
+ MTK_FUNCTION(2, "EINT72"),
+ MTK_FUNCTION(3, "SDA6"),
+ MTK_FUNCTION(4, "PWM6"),
+ MTK_FUNCTION(5, "CLKM5"),
+ MTK_FUNCTION(6, "MFG_TEST_CK_3")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(199, "MSDC3_CMD"),
+ "D2", "mt8135",
+ MTK_EINT_FUNCTION(2, 68),
+ MTK_FUNCTION(0, "GPIO199"),
+ MTK_FUNCTION(1, "MSDC3_CMD"),
+ MTK_FUNCTION(2, "EINT68"),
+ MTK_FUNCTION(3, "SDA2"),
+ MTK_FUNCTION(4, "PWM2"),
+ MTK_FUNCTION(5, "CLKM1"),
+ MTK_FUNCTION(6, "MFG_TEST_CK_4")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(200, "MSDC3_CLK"),
+ "E2", "mt8135",
+ MTK_EINT_FUNCTION(2, 67),
+ MTK_FUNCTION(0, "GPIO200"),
+ MTK_FUNCTION(1, "MSDC3_CLK"),
+ MTK_FUNCTION(2, "EINT67"),
+ MTK_FUNCTION(3, "SCL2"),
+ MTK_FUNCTION(4, "PWM1"),
+ MTK_FUNCTION(5, "CLKM0")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(201, "MSDC3_DAT1"),
+ "D3", "mt8135",
+ MTK_EINT_FUNCTION(2, 70),
+ MTK_FUNCTION(0, "GPIO201"),
+ MTK_FUNCTION(1, "MSDC3_DAT1"),
+ MTK_FUNCTION(2, "EINT70"),
+ MTK_FUNCTION(3, "SDA3"),
+ MTK_FUNCTION(4, "PWM4"),
+ MTK_FUNCTION(5, "CLKM3")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(202, "MSDC3_DAT0"),
+ "E3", "mt8135",
+ MTK_EINT_FUNCTION(2, 69),
+ MTK_FUNCTION(0, "GPIO202"),
+ MTK_FUNCTION(1, "MSDC3_DAT0"),
+ MTK_FUNCTION(2, "EINT69"),
+ MTK_FUNCTION(3, "SCL3"),
+ MTK_FUNCTION(4, "PWM3"),
+ MTK_FUNCTION(5, "CLKM2")
+ ),
+};
+
+#endif /* __PINCTRL_MTK_MT8135_H */
--- /dev/null
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __PINCTRL_MTK_MT8173_H
+#define __PINCTRL_MTK_MT8173_H
+
+#include <linux/pinctrl/pinctrl.h>
+#include "pinctrl-mtk-common.h"
+
+static const struct mtk_desc_pin mtk_pins_mt8173[] = {
+ MTK_PIN(
+ PINCTRL_PIN(0, "EINT0"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 0),
+ MTK_FUNCTION(0, "GPIO0"),
+ MTK_FUNCTION(1, "IRDA_PDN"),
+ MTK_FUNCTION(2, "I2S1_WS"),
+ MTK_FUNCTION(3, "AUD_SPDIF"),
+ MTK_FUNCTION(4, "UTXD0"),
+ MTK_FUNCTION(7, "DBG_MON_A_20_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(1, "EINT1"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 1),
+ MTK_FUNCTION(0, "GPIO1"),
+ MTK_FUNCTION(1, "IRDA_RXD"),
+ MTK_FUNCTION(2, "I2S1_BCK"),
+ MTK_FUNCTION(3, "SDA5"),
+ MTK_FUNCTION(4, "URXD0"),
+ MTK_FUNCTION(7, "DBG_MON_A_21_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(2, "EINT2"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 2),
+ MTK_FUNCTION(0, "GPIO2"),
+ MTK_FUNCTION(1, "IRDA_TXD"),
+ MTK_FUNCTION(2, "I2S1_MCK"),
+ MTK_FUNCTION(3, "SCL5"),
+ MTK_FUNCTION(4, "UTXD3"),
+ MTK_FUNCTION(7, "DBG_MON_A_22_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(3, "EINT3"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 3),
+ MTK_FUNCTION(0, "GPIO3"),
+ MTK_FUNCTION(1, "DSI1_TE"),
+ MTK_FUNCTION(2, "I2S1_DO_1"),
+ MTK_FUNCTION(3, "SDA3"),
+ MTK_FUNCTION(4, "URXD3"),
+ MTK_FUNCTION(7, "DBG_MON_A_23_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(4, "EINT4"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 4),
+ MTK_FUNCTION(0, "GPIO4"),
+ MTK_FUNCTION(1, "DISP_PWM1"),
+ MTK_FUNCTION(2, "I2S1_DO_2"),
+ MTK_FUNCTION(3, "SCL3"),
+ MTK_FUNCTION(4, "UCTS3"),
+ MTK_FUNCTION(6, "SFWP_B")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(5, "EINT5"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 5),
+ MTK_FUNCTION(0, "GPIO5"),
+ MTK_FUNCTION(1, "PCM1_CLK"),
+ MTK_FUNCTION(2, "I2S2_WS"),
+ MTK_FUNCTION(3, "SPI_CK_3_"),
+ MTK_FUNCTION(4, "URTS3"),
+ MTK_FUNCTION(5, "AP_MD32_JTAG_TMS"),
+ MTK_FUNCTION(6, "SFOUT")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(6, "EINT6"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 6),
+ MTK_FUNCTION(0, "GPIO6"),
+ MTK_FUNCTION(1, "PCM1_SYNC"),
+ MTK_FUNCTION(2, "I2S2_BCK"),
+ MTK_FUNCTION(3, "SPI_MI_3_"),
+ MTK_FUNCTION(5, "AP_MD32_JTAG_TCK"),
+ MTK_FUNCTION(6, "SFCS0")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(7, "EINT7"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 7),
+ MTK_FUNCTION(0, "GPIO7"),
+ MTK_FUNCTION(1, "PCM1_DI"),
+ MTK_FUNCTION(2, "I2S2_DI_1"),
+ MTK_FUNCTION(3, "SPI_MO_3_"),
+ MTK_FUNCTION(5, "AP_MD32_JTAG_TDI"),
+ MTK_FUNCTION(6, "SFHOLD")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(8, "EINT8"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 8),
+ MTK_FUNCTION(0, "GPIO8"),
+ MTK_FUNCTION(1, "PCM1_DO"),
+ MTK_FUNCTION(2, "I2S2_DI_2"),
+ MTK_FUNCTION(3, "SPI_CS_3_"),
+ MTK_FUNCTION(4, "AUD_SPDIF"),
+ MTK_FUNCTION(5, "AP_MD32_JTAG_TDO"),
+ MTK_FUNCTION(6, "SFIN")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(9, "EINT9"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 9),
+ MTK_FUNCTION(0, "GPIO9"),
+ MTK_FUNCTION(1, "USB_DRVVBUS_P0"),
+ MTK_FUNCTION(2, "I2S2_MCK"),
+ MTK_FUNCTION(4, "USB_DRVVBUS_P1"),
+ MTK_FUNCTION(5, "AP_MD32_JTAG_TRST"),
+ MTK_FUNCTION(6, "SFCK")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(10, "EINT10"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 10),
+ MTK_FUNCTION(0, "GPIO10"),
+ MTK_FUNCTION(1, "CLKM0"),
+ MTK_FUNCTION(2, "DSI1_TE"),
+ MTK_FUNCTION(3, "DISP_PWM1"),
+ MTK_FUNCTION(4, "PWM4"),
+ MTK_FUNCTION(5, "IRDA_RXD")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(11, "EINT11"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 11),
+ MTK_FUNCTION(0, "GPIO11"),
+ MTK_FUNCTION(1, "CLKM1"),
+ MTK_FUNCTION(2, "I2S3_WS"),
+ MTK_FUNCTION(3, "USB_DRVVBUS_P0"),
+ MTK_FUNCTION(4, "PWM5"),
+ MTK_FUNCTION(5, "IRDA_TXD"),
+ MTK_FUNCTION(6, "USB_DRVVBUS_P1"),
+ MTK_FUNCTION(7, "DBG_MON_B_30_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(12, "EINT12"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 12),
+ MTK_FUNCTION(0, "GPIO12"),
+ MTK_FUNCTION(1, "CLKM2"),
+ MTK_FUNCTION(2, "I2S3_BCK"),
+ MTK_FUNCTION(3, "SRCLKENA0"),
+ MTK_FUNCTION(5, "I2S2_WS"),
+ MTK_FUNCTION(7, "DBG_MON_B_32_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(13, "EINT13"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 13),
+ MTK_FUNCTION(0, "GPIO13"),
+ MTK_FUNCTION(1, "CLKM3"),
+ MTK_FUNCTION(2, "I2S3_MCK"),
+ MTK_FUNCTION(3, "SRCLKENA0"),
+ MTK_FUNCTION(5, "I2S2_BCK"),
+ MTK_FUNCTION(7, "DBG_MON_A_32_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(14, "EINT14"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 14),
+ MTK_FUNCTION(0, "GPIO14"),
+ MTK_FUNCTION(1, "CMDAT0"),
+ MTK_FUNCTION(2, "CMCSD0"),
+ MTK_FUNCTION(4, "CLKM2"),
+ MTK_FUNCTION(7, "DBG_MON_B_6_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(15, "EINT15"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 15),
+ MTK_FUNCTION(0, "GPIO15"),
+ MTK_FUNCTION(1, "CMDAT1"),
+ MTK_FUNCTION(2, "CMCSD1"),
+ MTK_FUNCTION(3, "CMFLASH"),
+ MTK_FUNCTION(4, "CLKM3"),
+ MTK_FUNCTION(7, "DBG_MON_B_29_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(16, "IDDIG"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 16),
+ MTK_FUNCTION(0, "GPIO16"),
+ MTK_FUNCTION(1, "IDDIG"),
+ MTK_FUNCTION(2, "CMFLASH"),
+ MTK_FUNCTION(4, "PWM5")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(17, "WATCHDOG"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 17),
+ MTK_FUNCTION(0, "GPIO17"),
+ MTK_FUNCTION(1, "WATCHDOG_AO")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(18, "CEC"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 18),
+ MTK_FUNCTION(0, "GPIO18"),
+ MTK_FUNCTION(1, "CEC")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(19, "HDMISCK"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 19),
+ MTK_FUNCTION(0, "GPIO19"),
+ MTK_FUNCTION(1, "HDMISCK"),
+ MTK_FUNCTION(2, "HDCP_SCL")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(20, "HDMISD"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 20),
+ MTK_FUNCTION(0, "GPIO20"),
+ MTK_FUNCTION(1, "HDMISD"),
+ MTK_FUNCTION(2, "HDCP_SDA")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(21, "HTPLG"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 21),
+ MTK_FUNCTION(0, "GPIO21"),
+ MTK_FUNCTION(1, "HTPLG")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(22, "MSDC3_DAT0"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 22),
+ MTK_FUNCTION(0, "GPIO22"),
+ MTK_FUNCTION(1, "MSDC3_DAT0")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(23, "MSDC3_DAT1"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 23),
+ MTK_FUNCTION(0, "GPIO23"),
+ MTK_FUNCTION(1, "MSDC3_DAT1")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(24, "MSDC3_DAT2"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 24),
+ MTK_FUNCTION(0, "GPIO24"),
+ MTK_FUNCTION(1, "MSDC3_DAT2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(25, "MSDC3_DAT3"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 25),
+ MTK_FUNCTION(0, "GPIO25"),
+ MTK_FUNCTION(1, "MSDC3_DAT3")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(26, "MSDC3_CLK"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 26),
+ MTK_FUNCTION(0, "GPIO26"),
+ MTK_FUNCTION(1, "MSDC3_CLK")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(27, "MSDC3_CMD"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 27),
+ MTK_FUNCTION(0, "GPIO27"),
+ MTK_FUNCTION(1, "MSDC3_CMD")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(28, "MSDC3_DSL"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 28),
+ MTK_FUNCTION(0, "GPIO28"),
+ MTK_FUNCTION(1, "MSDC3_DSL")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(29, "UCTS2"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 29),
+ MTK_FUNCTION(0, "GPIO29"),
+ MTK_FUNCTION(1, "UCTS2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(30, "URTS2"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 30),
+ MTK_FUNCTION(0, "GPIO30"),
+ MTK_FUNCTION(1, "URTS2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(31, "URXD2"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 31),
+ MTK_FUNCTION(0, "GPIO31"),
+ MTK_FUNCTION(1, "URXD2"),
+ MTK_FUNCTION(2, "UTXD2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(32, "UTXD2"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 32),
+ MTK_FUNCTION(0, "GPIO32"),
+ MTK_FUNCTION(1, "UTXD2"),
+ MTK_FUNCTION(2, "URXD2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(33, "DAICLK"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 33),
+ MTK_FUNCTION(0, "GPIO33"),
+ MTK_FUNCTION(1, " MRG_CLK"),
+ MTK_FUNCTION(2, "PCM0_CLK")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(34, "DAIPCMIN"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 34),
+ MTK_FUNCTION(0, "GPIO34"),
+ MTK_FUNCTION(1, " MRG_DI"),
+ MTK_FUNCTION(2, "PCM0_DI")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(35, "DAIPCMOUT"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 35),
+ MTK_FUNCTION(0, "GPIO35"),
+ MTK_FUNCTION(1, " MRG_DO"),
+ MTK_FUNCTION(2, "PCM0_DO")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(36, "DAISYNC"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 36),
+ MTK_FUNCTION(0, "GPIO36"),
+ MTK_FUNCTION(1, " MRG_SYNC"),
+ MTK_FUNCTION(2, "PCM0_SYNC")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(37, "EINT16"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 37),
+ MTK_FUNCTION(0, "GPIO37"),
+ MTK_FUNCTION(1, "USB_DRVVBUS_P0"),
+ MTK_FUNCTION(2, "USB_DRVVBUS_P1"),
+ MTK_FUNCTION(3, "PWM0"),
+ MTK_FUNCTION(4, "PWM1"),
+ MTK_FUNCTION(5, "PWM2"),
+ MTK_FUNCTION(6, "CLKM0")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(38, "CONN_RST"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 38),
+ MTK_FUNCTION(0, "GPIO38"),
+ MTK_FUNCTION(1, "USB_DRVVBUS_P0"),
+ MTK_FUNCTION(2, "USB_DRVVBUS_P1"),
+ MTK_FUNCTION(6, "CLKM1")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(39, "CM2MCLK"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 39),
+ MTK_FUNCTION(0, "GPIO39"),
+ MTK_FUNCTION(1, "CM2MCLK"),
+ MTK_FUNCTION(2, "CMCSD0"),
+ MTK_FUNCTION(7, "DBG_MON_A_17_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(40, "CMPCLK"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 40),
+ MTK_FUNCTION(0, "GPIO40"),
+ MTK_FUNCTION(1, "CMPCLK"),
+ MTK_FUNCTION(2, "CMCSK"),
+ MTK_FUNCTION(3, "CMCSD2"),
+ MTK_FUNCTION(7, "DBG_MON_A_18_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(41, "CMMCLK"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 41),
+ MTK_FUNCTION(0, "GPIO41"),
+ MTK_FUNCTION(1, "CMMCLK"),
+ MTK_FUNCTION(7, "DBG_MON_A_19_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(42, "DSI_TE"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 42),
+ MTK_FUNCTION(0, "GPIO42"),
+ MTK_FUNCTION(1, "DSI_TE")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(43, "SDA2"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 43),
+ MTK_FUNCTION(0, "GPIO43"),
+ MTK_FUNCTION(1, "SDA2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(44, "SCL2"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 44),
+ MTK_FUNCTION(0, "GPIO44"),
+ MTK_FUNCTION(1, "SCL2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(45, "SDA0"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 45),
+ MTK_FUNCTION(0, "GPIO45"),
+ MTK_FUNCTION(1, "SDA0")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(46, "SCL0"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 46),
+ MTK_FUNCTION(0, "GPIO46"),
+ MTK_FUNCTION(1, "SCL0")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(47, "RDN0_A"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 47),
+ MTK_FUNCTION(0, "GPIO47"),
+ MTK_FUNCTION(1, "CMDAT2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(48, "RDP0_A"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 48),
+ MTK_FUNCTION(0, "GPIO48"),
+ MTK_FUNCTION(1, "CMDAT3")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(49, "RDN1_A"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 49),
+ MTK_FUNCTION(0, "GPIO49"),
+ MTK_FUNCTION(1, "CMDAT4")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(50, "RDP1_A"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 50),
+ MTK_FUNCTION(0, "GPIO50"),
+ MTK_FUNCTION(1, "CMDAT5")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(51, "RCN_A"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 51),
+ MTK_FUNCTION(0, "GPIO51"),
+ MTK_FUNCTION(1, "CMDAT6")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(52, "RCP_A"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 52),
+ MTK_FUNCTION(0, "GPIO52"),
+ MTK_FUNCTION(1, "CMDAT7")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(53, "RDN2_A"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 53),
+ MTK_FUNCTION(0, "GPIO53"),
+ MTK_FUNCTION(1, "CMDAT8"),
+ MTK_FUNCTION(2, "CMCSD3")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(54, "RDP2_A"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 54),
+ MTK_FUNCTION(0, "GPIO54"),
+ MTK_FUNCTION(1, "CMDAT9"),
+ MTK_FUNCTION(2, "CMCSD2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(55, "RDN3_A"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 55),
+ MTK_FUNCTION(0, "GPIO55"),
+ MTK_FUNCTION(1, "CMHSYNC"),
+ MTK_FUNCTION(2, "CMCSD1")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(56, "RDP3_A"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 56),
+ MTK_FUNCTION(0, "GPIO56"),
+ MTK_FUNCTION(1, "CMVSYNC"),
+ MTK_FUNCTION(2, "CMCSD0")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(57, "MSDC0_DAT0"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 57),
+ MTK_FUNCTION(0, "GPIO57"),
+ MTK_FUNCTION(1, "MSDC0_DAT0"),
+ MTK_FUNCTION(2, "I2S1_WS"),
+ MTK_FUNCTION(7, "DBG_MON_B_7_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(58, "MSDC0_DAT1"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 58),
+ MTK_FUNCTION(0, "GPIO58"),
+ MTK_FUNCTION(1, "MSDC0_DAT1"),
+ MTK_FUNCTION(2, "I2S1_BCK"),
+ MTK_FUNCTION(7, "DBG_MON_B_8_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(59, "MSDC0_DAT2"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 59),
+ MTK_FUNCTION(0, "GPIO59"),
+ MTK_FUNCTION(1, "MSDC0_DAT2"),
+ MTK_FUNCTION(2, "I2S1_MCK"),
+ MTK_FUNCTION(7, "DBG_MON_B_9_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(60, "MSDC0_DAT3"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 60),
+ MTK_FUNCTION(0, "GPIO60"),
+ MTK_FUNCTION(1, "MSDC0_DAT3"),
+ MTK_FUNCTION(2, "I2S1_DO_1"),
+ MTK_FUNCTION(7, "DBG_MON_B_10_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(61, "MSDC0_DAT4"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 61),
+ MTK_FUNCTION(0, "GPIO61"),
+ MTK_FUNCTION(1, "MSDC0_DAT4"),
+ MTK_FUNCTION(2, "I2S1_DO_2"),
+ MTK_FUNCTION(7, "DBG_MON_B_11_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(62, "MSDC0_DAT5"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 62),
+ MTK_FUNCTION(0, "GPIO62"),
+ MTK_FUNCTION(1, "MSDC0_DAT5"),
+ MTK_FUNCTION(2, "I2S2_WS"),
+ MTK_FUNCTION(7, "DBG_MON_B_12_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(63, "MSDC0_DAT6"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 63),
+ MTK_FUNCTION(0, "GPIO63"),
+ MTK_FUNCTION(1, "MSDC0_DAT6"),
+ MTK_FUNCTION(2, "I2S2_BCK"),
+ MTK_FUNCTION(7, "DBG_MON_B_13_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(64, "MSDC0_DAT7"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 64),
+ MTK_FUNCTION(0, "GPIO64"),
+ MTK_FUNCTION(1, "MSDC0_DAT7"),
+ MTK_FUNCTION(2, "I2S2_DI_1"),
+ MTK_FUNCTION(7, "DBG_MON_B_14_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(65, "MSDC0_CLK"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 65),
+ MTK_FUNCTION(0, "GPIO65"),
+ MTK_FUNCTION(1, "MSDC0_CLK"),
+ MTK_FUNCTION(7, "DBG_MON_B_16_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(66, "MSDC0_CMD"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 66),
+ MTK_FUNCTION(0, "GPIO66"),
+ MTK_FUNCTION(1, "MSDC0_CMD"),
+ MTK_FUNCTION(2, "I2S2_DI_2"),
+ MTK_FUNCTION(7, "DBG_MON_B_15_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(67, "MSDC0_DSL"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 67),
+ MTK_FUNCTION(0, "GPIO67"),
+ MTK_FUNCTION(1, "MSDC0_DSL"),
+ MTK_FUNCTION(7, "DBG_MON_B_17_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(68, "MSDC0_RST_"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 68),
+ MTK_FUNCTION(0, "GPIO68"),
+ MTK_FUNCTION(1, "MSDC0_RSTB"),
+ MTK_FUNCTION(2, "I2S2_MCK"),
+ MTK_FUNCTION(7, "DBG_MON_B_18_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(69, "SPI_CK"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 69),
+ MTK_FUNCTION(0, "GPIO69"),
+ MTK_FUNCTION(1, "SPI_CK_0_"),
+ MTK_FUNCTION(2, "I2S3_DO_1"),
+ MTK_FUNCTION(3, "PWM0"),
+ MTK_FUNCTION(4, "PWM5"),
+ MTK_FUNCTION(5, "I2S2_MCK"),
+ MTK_FUNCTION(7, "DBG_MON_B_19_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(70, "SPI_MI"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 70),
+ MTK_FUNCTION(0, "GPIO70"),
+ MTK_FUNCTION(1, "SPI_MI_0_"),
+ MTK_FUNCTION(2, "I2S3_DO_2"),
+ MTK_FUNCTION(3, "PWM1"),
+ MTK_FUNCTION(4, "SPI_MO_0_"),
+ MTK_FUNCTION(5, "I2S2_DI_1"),
+ MTK_FUNCTION(6, "DSI1_TE"),
+ MTK_FUNCTION(7, "DBG_MON_B_20_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(71, "SPI_MO"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 71),
+ MTK_FUNCTION(0, "GPIO71"),
+ MTK_FUNCTION(1, "SPI_MO_0_"),
+ MTK_FUNCTION(2, "I2S3_DO_3"),
+ MTK_FUNCTION(3, "PWM2"),
+ MTK_FUNCTION(4, "SPI_MI_0_"),
+ MTK_FUNCTION(5, "I2S2_DI_2"),
+ MTK_FUNCTION(7, "DBG_MON_B_21_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(72, "SPI_CS"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 72),
+ MTK_FUNCTION(0, "GPIO72"),
+ MTK_FUNCTION(1, "SPI_CS_0_"),
+ MTK_FUNCTION(2, "I2S3_DO_4"),
+ MTK_FUNCTION(3, "PWM3"),
+ MTK_FUNCTION(4, "PWM6"),
+ MTK_FUNCTION(5, "DISP_PWM1"),
+ MTK_FUNCTION(7, "DBG_MON_B_22_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(73, "MSDC1_DAT0"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 73),
+ MTK_FUNCTION(0, "GPIO73"),
+ MTK_FUNCTION(1, "MSDC1_DAT0"),
+ MTK_FUNCTION(7, "DBG_MON_B_24_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(74, "MSDC1_DAT1"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 74),
+ MTK_FUNCTION(0, "GPIO74"),
+ MTK_FUNCTION(1, "MSDC1_DAT1"),
+ MTK_FUNCTION(7, "DBG_MON_B_25_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(75, "MSDC1_DAT2"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 75),
+ MTK_FUNCTION(0, "GPIO75"),
+ MTK_FUNCTION(1, "MSDC1_DAT2"),
+ MTK_FUNCTION(7, "DBG_MON_B_26_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(76, "MSDC1_DAT3"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 76),
+ MTK_FUNCTION(0, "GPIO76"),
+ MTK_FUNCTION(1, "MSDC1_DAT3"),
+ MTK_FUNCTION(7, "DBG_MON_B_27_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(77, "MSDC1_CLK"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 77),
+ MTK_FUNCTION(0, "GPIO77"),
+ MTK_FUNCTION(1, "MSDC1_CLK"),
+ MTK_FUNCTION(7, "DBG_MON_B_28_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(78, "MSDC1_CMD"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 78),
+ MTK_FUNCTION(0, "GPIO78"),
+ MTK_FUNCTION(1, "MSDC1_CMD"),
+ MTK_FUNCTION(7, "DBG_MON_B_23_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(79, "PWRAP_SPI0_MI"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 79),
+ MTK_FUNCTION(0, "GPIO79"),
+ MTK_FUNCTION(1, "PWRAP_SPIMI"),
+ MTK_FUNCTION(2, "PWRAP_SPIMO")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(80, "PWRAP_SPI0_MO"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 80),
+ MTK_FUNCTION(0, "GPIO80"),
+ MTK_FUNCTION(1, "PWRAP_SPIMO"),
+ MTK_FUNCTION(2, "PWRAP_SPIMI")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(81, "PWRAP_SPI0_CK"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 81),
+ MTK_FUNCTION(0, "GPIO81"),
+ MTK_FUNCTION(1, "PWRAP_SPICK")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(82, "PWRAP_SPI0_CSN"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 82),
+ MTK_FUNCTION(0, "GPIO82"),
+ MTK_FUNCTION(1, "PWRAP_SPICS")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(83, "AUD_CLK_MOSI"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 83),
+ MTK_FUNCTION(0, "GPIO83"),
+ MTK_FUNCTION(1, "AUD_CLK_MOSI")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(84, "AUD_DAT_MISO"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 84),
+ MTK_FUNCTION(0, "GPIO84"),
+ MTK_FUNCTION(1, "AUD_DAT_MISO"),
+ MTK_FUNCTION(2, "AUD_DAT_MOSI")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(85, "AUD_DAT_MOSI"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 85),
+ MTK_FUNCTION(0, "GPIO85"),
+ MTK_FUNCTION(1, "AUD_DAT_MOSI"),
+ MTK_FUNCTION(2, "AUD_DAT_MISO")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(86, "RTC32K_CK"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 86),
+ MTK_FUNCTION(0, "GPIO86"),
+ MTK_FUNCTION(1, "RTC32K_CK")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(87, "DISP_PWM0"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 87),
+ MTK_FUNCTION(0, "GPIO87"),
+ MTK_FUNCTION(1, "DISP_PWM0"),
+ MTK_FUNCTION(2, "DISP_PWM1"),
+ MTK_FUNCTION(7, "DBG_MON_B_31_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(88, "SRCLKENAI"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 88),
+ MTK_FUNCTION(0, "GPIO88"),
+ MTK_FUNCTION(1, "SRCLKENAI")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(89, "SRCLKENAI2"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 89),
+ MTK_FUNCTION(0, "GPIO89"),
+ MTK_FUNCTION(1, "SRCLKENAI2")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(90, "SRCLKENA0"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 90),
+ MTK_FUNCTION(0, "GPIO90"),
+ MTK_FUNCTION(1, "SRCLKENA0")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(91, "SRCLKENA1"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 91),
+ MTK_FUNCTION(0, "GPIO91"),
+ MTK_FUNCTION(1, "SRCLKENA1")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(92, "PCM_CLK"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 92),
+ MTK_FUNCTION(0, "GPIO92"),
+ MTK_FUNCTION(1, "PCM1_CLK"),
+ MTK_FUNCTION(2, "I2S0_BCK"),
+ MTK_FUNCTION(7, "DBG_MON_A_24_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(93, "PCM_SYNC"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 93),
+ MTK_FUNCTION(0, "GPIO93"),
+ MTK_FUNCTION(1, "PCM1_SYNC"),
+ MTK_FUNCTION(2, "I2S0_WS"),
+ MTK_FUNCTION(7, "DBG_MON_A_25_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(94, "PCM_RX"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 94),
+ MTK_FUNCTION(0, "GPIO94"),
+ MTK_FUNCTION(1, "PCM1_DI"),
+ MTK_FUNCTION(2, "I2S0_DI"),
+ MTK_FUNCTION(7, "DBG_MON_A_26_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(95, "PCM_TX"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 95),
+ MTK_FUNCTION(0, "GPIO95"),
+ MTK_FUNCTION(1, "PCM1_DO"),
+ MTK_FUNCTION(2, "I2S0_DO"),
+ MTK_FUNCTION(7, "DBG_MON_A_27_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(96, "URXD1"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 96),
+ MTK_FUNCTION(0, "GPIO96"),
+ MTK_FUNCTION(1, "URXD1"),
+ MTK_FUNCTION(2, "UTXD1"),
+ MTK_FUNCTION(7, "DBG_MON_A_28_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(97, "UTXD1"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 97),
+ MTK_FUNCTION(0, "GPIO97"),
+ MTK_FUNCTION(1, "UTXD1"),
+ MTK_FUNCTION(2, "URXD1"),
+ MTK_FUNCTION(7, "DBG_MON_A_29_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(98, "URTS1"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 98),
+ MTK_FUNCTION(0, "GPIO98"),
+ MTK_FUNCTION(1, "URTS1"),
+ MTK_FUNCTION(2, "UCTS1"),
+ MTK_FUNCTION(7, "DBG_MON_A_30_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(99, "UCTS1"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 99),
+ MTK_FUNCTION(0, "GPIO99"),
+ MTK_FUNCTION(1, "UCTS1"),
+ MTK_FUNCTION(2, "URTS1"),
+ MTK_FUNCTION(7, "DBG_MON_A_31_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(100, "MSDC2_DAT0"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 100),
+ MTK_FUNCTION(0, "GPIO100"),
+ MTK_FUNCTION(1, "MSDC2_DAT0"),
+ MTK_FUNCTION(3, "USB_DRVVBUS_P0"),
+ MTK_FUNCTION(4, "SDA5"),
+ MTK_FUNCTION(5, "USB_DRVVBUS_P1"),
+ MTK_FUNCTION(7, "DBG_MON_B_0_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(101, "MSDC2_DAT1"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 101),
+ MTK_FUNCTION(0, "GPIO101"),
+ MTK_FUNCTION(1, "MSDC2_DAT1"),
+ MTK_FUNCTION(3, "AUD_SPDIF"),
+ MTK_FUNCTION(4, "SCL5"),
+ MTK_FUNCTION(7, "DBG_MON_B_1_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(102, "MSDC2_DAT2"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 102),
+ MTK_FUNCTION(0, "GPIO102"),
+ MTK_FUNCTION(1, "MSDC2_DAT2"),
+ MTK_FUNCTION(3, "UTXD0"),
+ MTK_FUNCTION(5, "PWM0"),
+ MTK_FUNCTION(6, "SPI_CK_1_"),
+ MTK_FUNCTION(7, "DBG_MON_B_2_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(103, "MSDC2_DAT3"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 103),
+ MTK_FUNCTION(0, "GPIO103"),
+ MTK_FUNCTION(1, "MSDC2_DAT3"),
+ MTK_FUNCTION(3, "URXD0"),
+ MTK_FUNCTION(5, "PWM1"),
+ MTK_FUNCTION(6, "SPI_MI_1_"),
+ MTK_FUNCTION(7, "DBG_MON_B_3_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(104, "MSDC2_CLK"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 104),
+ MTK_FUNCTION(0, "GPIO104"),
+ MTK_FUNCTION(1, "MSDC2_CLK"),
+ MTK_FUNCTION(3, "UTXD3"),
+ MTK_FUNCTION(4, "SDA3"),
+ MTK_FUNCTION(5, "PWM2"),
+ MTK_FUNCTION(6, "SPI_MO_1_"),
+ MTK_FUNCTION(7, "DBG_MON_B_4_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(105, "MSDC2_CMD"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 105),
+ MTK_FUNCTION(0, "GPIO105"),
+ MTK_FUNCTION(1, "MSDC2_CMD"),
+ MTK_FUNCTION(3, "URXD3"),
+ MTK_FUNCTION(4, "SCL3"),
+ MTK_FUNCTION(5, "PWM3"),
+ MTK_FUNCTION(6, "SPI_CS_1_"),
+ MTK_FUNCTION(7, "DBG_MON_B_5_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(106, "SDA3"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 106),
+ MTK_FUNCTION(0, "GPIO106"),
+ MTK_FUNCTION(1, "SDA3")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(107, "SCL3"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 107),
+ MTK_FUNCTION(0, "GPIO107"),
+ MTK_FUNCTION(1, "SCL3")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(108, "JTMS"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 108),
+ MTK_FUNCTION(0, "GPIO108"),
+ MTK_FUNCTION(1, "JTMS"),
+ MTK_FUNCTION(2, " MFG_JTAG_TMS"),
+ MTK_FUNCTION(5, "AP_MD32_JTAG_TMS"),
+ MTK_FUNCTION(6, "DFD_TMS")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(109, "JTCK"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 109),
+ MTK_FUNCTION(0, "GPIO109"),
+ MTK_FUNCTION(1, "JTCK"),
+ MTK_FUNCTION(2, " MFG_JTAG_TCK"),
+ MTK_FUNCTION(5, "AP_MD32_JTAG_TCK"),
+ MTK_FUNCTION(6, "DFD_TCK")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(110, "JTDI"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 110),
+ MTK_FUNCTION(0, "GPIO110"),
+ MTK_FUNCTION(1, "JTDI"),
+ MTK_FUNCTION(2, " MFG_JTAG_TDI"),
+ MTK_FUNCTION(5, "AP_MD32_JTAG_TDI"),
+ MTK_FUNCTION(6, "DFD_TDI")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(111, "JTDO"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 111),
+ MTK_FUNCTION(0, "GPIO111"),
+ MTK_FUNCTION(1, "JTDO"),
+ MTK_FUNCTION(2, "MFG_JTAG_TDO"),
+ MTK_FUNCTION(5, "AP_MD32_JTAG_TDO"),
+ MTK_FUNCTION(6, "DFD_TDO")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(112, "JTRST_B"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 112),
+ MTK_FUNCTION(0, "GPIO112"),
+ MTK_FUNCTION(1, "JTRST_B"),
+ MTK_FUNCTION(2, " MFG_JTAG_TRSTN"),
+ MTK_FUNCTION(5, "AP_MD32_JTAG_TRST"),
+ MTK_FUNCTION(6, "DFD_NTRST")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(113, "URXD0"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 113),
+ MTK_FUNCTION(0, "GPIO113"),
+ MTK_FUNCTION(1, "URXD0"),
+ MTK_FUNCTION(2, "UTXD0"),
+ MTK_FUNCTION(6, "I2S2_WS"),
+ MTK_FUNCTION(7, "DBG_MON_A_0_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(114, "UTXD0"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 114),
+ MTK_FUNCTION(0, "GPIO114"),
+ MTK_FUNCTION(1, "UTXD0"),
+ MTK_FUNCTION(2, "URXD0"),
+ MTK_FUNCTION(6, "I2S2_BCK"),
+ MTK_FUNCTION(7, "DBG_MON_A_1_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(115, "URTS0"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 115),
+ MTK_FUNCTION(0, "GPIO115"),
+ MTK_FUNCTION(1, "URTS0"),
+ MTK_FUNCTION(2, "UCTS0"),
+ MTK_FUNCTION(6, "I2S2_MCK"),
+ MTK_FUNCTION(7, "DBG_MON_A_2_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(116, "UCTS0"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 116),
+ MTK_FUNCTION(0, "GPIO116"),
+ MTK_FUNCTION(1, "UCTS0"),
+ MTK_FUNCTION(2, "URTS0"),
+ MTK_FUNCTION(6, "I2S2_DI_1"),
+ MTK_FUNCTION(7, "DBG_MON_A_3_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(117, "URXD3"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 117),
+ MTK_FUNCTION(0, "GPIO117"),
+ MTK_FUNCTION(1, "URXD3"),
+ MTK_FUNCTION(2, "UTXD3"),
+ MTK_FUNCTION(7, "DBG_MON_A_9_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(118, "UTXD3"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 118),
+ MTK_FUNCTION(0, "GPIO118"),
+ MTK_FUNCTION(1, "UTXD3"),
+ MTK_FUNCTION(2, "URXD3"),
+ MTK_FUNCTION(7, "DBG_MON_A_10_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(119, "KPROW0"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 119),
+ MTK_FUNCTION(0, "GPIO119"),
+ MTK_FUNCTION(1, "KROW0"),
+ MTK_FUNCTION(7, "DBG_MON_A_11_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(120, "KPROW1"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 120),
+ MTK_FUNCTION(0, "GPIO120"),
+ MTK_FUNCTION(1, "KROW1"),
+ MTK_FUNCTION(3, "PWM6"),
+ MTK_FUNCTION(7, "DBG_MON_A_12_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(121, "KPROW2"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 121),
+ MTK_FUNCTION(0, "GPIO121"),
+ MTK_FUNCTION(1, "KROW2"),
+ MTK_FUNCTION(2, "IRDA_PDN"),
+ MTK_FUNCTION(3, "USB_DRVVBUS_P0"),
+ MTK_FUNCTION(4, "PWM4"),
+ MTK_FUNCTION(5, "USB_DRVVBUS_P1"),
+ MTK_FUNCTION(7, "DBG_MON_A_13_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(122, "KPCOL0"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 122),
+ MTK_FUNCTION(0, "GPIO122"),
+ MTK_FUNCTION(1, "KCOL0"),
+ MTK_FUNCTION(7, "DBG_MON_A_14_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(123, "KPCOL1"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 123),
+ MTK_FUNCTION(0, "GPIO123"),
+ MTK_FUNCTION(1, "KCOL1"),
+ MTK_FUNCTION(2, "IRDA_RXD"),
+ MTK_FUNCTION(3, "PWM5"),
+ MTK_FUNCTION(7, "DBG_MON_A_15_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(124, "KPCOL2"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 124),
+ MTK_FUNCTION(0, "GPIO124"),
+ MTK_FUNCTION(1, "KCOL2"),
+ MTK_FUNCTION(2, "IRDA_TXD"),
+ MTK_FUNCTION(3, "USB_DRVVBUS_P0"),
+ MTK_FUNCTION(4, "PWM3"),
+ MTK_FUNCTION(5, "USB_DRVVBUS_P1"),
+ MTK_FUNCTION(7, "DBG_MON_A_16_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(125, "SDA1"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 125),
+ MTK_FUNCTION(0, "GPIO125"),
+ MTK_FUNCTION(1, "SDA1")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(126, "SCL1"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 126),
+ MTK_FUNCTION(0, "GPIO126"),
+ MTK_FUNCTION(1, "SCL1")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(127, "LCM_RST"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 127),
+ MTK_FUNCTION(0, "GPIO127"),
+ MTK_FUNCTION(1, "LCM_RST")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(128, "I2S0_LRCK"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 128),
+ MTK_FUNCTION(0, "GPIO128"),
+ MTK_FUNCTION(1, "I2S0_WS"),
+ MTK_FUNCTION(2, "I2S1_WS"),
+ MTK_FUNCTION(3, "I2S2_WS"),
+ MTK_FUNCTION(5, "SPI_CK_2_"),
+ MTK_FUNCTION(7, "DBG_MON_A_4_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(129, "I2S0_BCK"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 129),
+ MTK_FUNCTION(0, "GPIO129"),
+ MTK_FUNCTION(1, "I2S0_BCK"),
+ MTK_FUNCTION(2, "I2S1_BCK"),
+ MTK_FUNCTION(3, "I2S2_BCK"),
+ MTK_FUNCTION(5, "SPI_MI_2_"),
+ MTK_FUNCTION(7, "DBG_MON_A_5_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(130, "I2S0_MCK"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 130),
+ MTK_FUNCTION(0, "GPIO130"),
+ MTK_FUNCTION(1, "I2S0_MCK"),
+ MTK_FUNCTION(2, "I2S1_MCK"),
+ MTK_FUNCTION(3, "I2S2_MCK"),
+ MTK_FUNCTION(5, "SPI_MO_2_"),
+ MTK_FUNCTION(7, "DBG_MON_A_6_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(131, "I2S0_DATA0"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 131),
+ MTK_FUNCTION(0, "GPIO131"),
+ MTK_FUNCTION(1, "I2S0_DO"),
+ MTK_FUNCTION(2, "I2S1_DO_1"),
+ MTK_FUNCTION(3, "I2S2_DI_1"),
+ MTK_FUNCTION(5, "SPI_CS_2_"),
+ MTK_FUNCTION(7, "DBG_MON_A_7_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(132, "I2S0_DATA1"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 132),
+ MTK_FUNCTION(0, "GPIO132"),
+ MTK_FUNCTION(1, "I2S0_DI"),
+ MTK_FUNCTION(2, "I2S1_DO_2"),
+ MTK_FUNCTION(3, "I2S2_DI_2"),
+ MTK_FUNCTION(7, "DBG_MON_A_8_")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(133, "SDA4"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 133),
+ MTK_FUNCTION(0, "GPIO133"),
+ MTK_FUNCTION(1, "SDA4")
+ ),
+ MTK_PIN(
+ PINCTRL_PIN(134, "SCL4"),
+ NULL, "mt8173",
+ MTK_EINT_FUNCTION(0, 134),
+ MTK_FUNCTION(0, "GPIO134"),
+ MTK_FUNCTION(1, "SCL4")
+ ),
+};
+
+#endif /* __PINCTRL_MTK_MT8173_H */
-obj-y += pinctrl-meson8.o
+obj-y += pinctrl-meson8.o pinctrl-meson8b.o
obj-y += pinctrl-meson.o
/*
* The available pins are organized in banks (A,B,C,D,E,X,Y,Z,AO,
- * BOOT,CARD for meson6 and X,Y,DV,H,Z,AO,BOOT,CARD for meson8) and
- * each bank has a variable number of pins.
+ * BOOT,CARD for meson6, X,Y,DV,H,Z,AO,BOOT,CARD for meson8 and
+ * X,Y,DV,H,AO,BOOT,CARD,DIF for meson8b) and each bank has a
+ * variable number of pins.
*
* The AO bank is special because it belongs to the Always-On power
* domain which can't be powered off; the bank also uses a set of
.compatible = "amlogic,meson8-pinctrl",
.data = &meson8_pinctrl_data,
},
+ {
+ .compatible = "amlogic,meson8b-pinctrl",
+ .data = &meson8b_pinctrl_data,
+ },
{ },
};
MODULE_DEVICE_TABLE(of, meson_pinctrl_dt_match);
struct meson_domain *domains;
};
+#define PIN(x, b) (b + x)
+
#define GROUP(grp, r, b) \
{ \
.name = #grp, \
.domain = 0, \
}
-#define GPIO_GROUP(gpio) \
+#define GPIO_GROUP(gpio, b) \
{ \
.name = #gpio, \
- .pins = (const unsigned int[]){ PIN_ ## gpio}, \
+ .pins = (const unsigned int[]){ PIN(gpio, b) }, \
.num_pins = 1, \
.is_gpio = true, \
}
}, \
}
-#define MESON_PIN(x) PINCTRL_PIN(PIN_ ## x, #x)
+#define MESON_PIN(x, b) PINCTRL_PIN(PIN(x, b), #x)
extern struct meson_pinctrl_data meson8_pinctrl_data;
+extern struct meson_pinctrl_data meson8b_pinctrl_data;
#include <dt-bindings/gpio/meson8-gpio.h>
#include "pinctrl-meson.h"
-#define AO_OFFSET 120
-
-#define PIN_GPIOX_0 GPIOX_0
-#define PIN_GPIOX_1 GPIOX_1
-#define PIN_GPIOX_2 GPIOX_2
-#define PIN_GPIOX_3 GPIOX_3
-#define PIN_GPIOX_4 GPIOX_4
-#define PIN_GPIOX_5 GPIOX_5
-#define PIN_GPIOX_6 GPIOX_6
-#define PIN_GPIOX_7 GPIOX_7
-#define PIN_GPIOX_8 GPIOX_8
-#define PIN_GPIOX_9 GPIOX_9
-#define PIN_GPIOX_10 GPIOX_10
-#define PIN_GPIOX_11 GPIOX_11
-#define PIN_GPIOX_12 GPIOX_12
-#define PIN_GPIOX_13 GPIOX_13
-#define PIN_GPIOX_14 GPIOX_14
-#define PIN_GPIOX_15 GPIOX_15
-#define PIN_GPIOX_16 GPIOX_16
-#define PIN_GPIOX_17 GPIOX_17
-#define PIN_GPIOX_18 GPIOX_18
-#define PIN_GPIOX_19 GPIOX_19
-#define PIN_GPIOX_20 GPIOX_20
-#define PIN_GPIOX_21 GPIOX_21
-#define PIN_GPIOY_0 GPIOY_0
-#define PIN_GPIOY_1 GPIOY_1
-#define PIN_GPIOY_2 GPIOY_2
-#define PIN_GPIOY_3 GPIOY_3
-#define PIN_GPIOY_4 GPIOY_4
-#define PIN_GPIOY_5 GPIOY_5
-#define PIN_GPIOY_6 GPIOY_6
-#define PIN_GPIOY_7 GPIOY_7
-#define PIN_GPIOY_8 GPIOY_8
-#define PIN_GPIOY_9 GPIOY_9
-#define PIN_GPIOY_10 GPIOY_10
-#define PIN_GPIOY_11 GPIOY_11
-#define PIN_GPIOY_12 GPIOY_12
-#define PIN_GPIOY_13 GPIOY_13
-#define PIN_GPIOY_14 GPIOY_14
-#define PIN_GPIOY_15 GPIOY_15
-#define PIN_GPIOY_16 GPIOY_16
-#define PIN_GPIODV_0 GPIODV_0
-#define PIN_GPIODV_1 GPIODV_1
-#define PIN_GPIODV_2 GPIODV_2
-#define PIN_GPIODV_3 GPIODV_3
-#define PIN_GPIODV_4 GPIODV_4
-#define PIN_GPIODV_5 GPIODV_5
-#define PIN_GPIODV_6 GPIODV_6
-#define PIN_GPIODV_7 GPIODV_7
-#define PIN_GPIODV_8 GPIODV_8
-#define PIN_GPIODV_9 GPIODV_9
-#define PIN_GPIODV_10 GPIODV_10
-#define PIN_GPIODV_11 GPIODV_11
-#define PIN_GPIODV_12 GPIODV_12
-#define PIN_GPIODV_13 GPIODV_13
-#define PIN_GPIODV_14 GPIODV_14
-#define PIN_GPIODV_15 GPIODV_15
-#define PIN_GPIODV_16 GPIODV_16
-#define PIN_GPIODV_17 GPIODV_17
-#define PIN_GPIODV_18 GPIODV_18
-#define PIN_GPIODV_19 GPIODV_19
-#define PIN_GPIODV_20 GPIODV_20
-#define PIN_GPIODV_21 GPIODV_21
-#define PIN_GPIODV_22 GPIODV_22
-#define PIN_GPIODV_23 GPIODV_23
-#define PIN_GPIODV_24 GPIODV_24
-#define PIN_GPIODV_25 GPIODV_25
-#define PIN_GPIODV_26 GPIODV_26
-#define PIN_GPIODV_27 GPIODV_27
-#define PIN_GPIODV_28 GPIODV_28
-#define PIN_GPIODV_29 GPIODV_29
-#define PIN_GPIOH_0 GPIOH_0
-#define PIN_GPIOH_1 GPIOH_1
-#define PIN_GPIOH_2 GPIOH_2
-#define PIN_GPIOH_3 GPIOH_3
-#define PIN_GPIOH_4 GPIOH_4
-#define PIN_GPIOH_5 GPIOH_5
-#define PIN_GPIOH_6 GPIOH_6
-#define PIN_GPIOH_7 GPIOH_7
-#define PIN_GPIOH_8 GPIOH_8
-#define PIN_GPIOH_9 GPIOH_9
-#define PIN_GPIOZ_0 GPIOZ_0
-#define PIN_GPIOZ_1 GPIOZ_1
-#define PIN_GPIOZ_2 GPIOZ_2
-#define PIN_GPIOZ_3 GPIOZ_3
-#define PIN_GPIOZ_4 GPIOZ_4
-#define PIN_GPIOZ_5 GPIOZ_5
-#define PIN_GPIOZ_6 GPIOZ_6
-#define PIN_GPIOZ_7 GPIOZ_7
-#define PIN_GPIOZ_8 GPIOZ_8
-#define PIN_GPIOZ_9 GPIOZ_9
-#define PIN_GPIOZ_10 GPIOZ_10
-#define PIN_GPIOZ_11 GPIOZ_11
-#define PIN_GPIOZ_12 GPIOZ_12
-#define PIN_GPIOZ_13 GPIOZ_13
-#define PIN_GPIOZ_14 GPIOZ_14
-#define PIN_CARD_0 CARD_0
-#define PIN_CARD_1 CARD_1
-#define PIN_CARD_2 CARD_2
-#define PIN_CARD_3 CARD_3
-#define PIN_CARD_4 CARD_4
-#define PIN_CARD_5 CARD_5
-#define PIN_CARD_6 CARD_6
-#define PIN_BOOT_0 BOOT_0
-#define PIN_BOOT_1 BOOT_1
-#define PIN_BOOT_2 BOOT_2
-#define PIN_BOOT_3 BOOT_3
-#define PIN_BOOT_4 BOOT_4
-#define PIN_BOOT_5 BOOT_5
-#define PIN_BOOT_6 BOOT_6
-#define PIN_BOOT_7 BOOT_7
-#define PIN_BOOT_8 BOOT_8
-#define PIN_BOOT_9 BOOT_9
-#define PIN_BOOT_10 BOOT_10
-#define PIN_BOOT_11 BOOT_11
-#define PIN_BOOT_12 BOOT_12
-#define PIN_BOOT_13 BOOT_13
-#define PIN_BOOT_14 BOOT_14
-#define PIN_BOOT_15 BOOT_15
-#define PIN_BOOT_16 BOOT_16
-#define PIN_BOOT_17 BOOT_17
-#define PIN_BOOT_18 BOOT_18
-
-#define PIN_GPIOAO_0 (AO_OFFSET + GPIOAO_0)
-#define PIN_GPIOAO_1 (AO_OFFSET + GPIOAO_1)
-#define PIN_GPIOAO_2 (AO_OFFSET + GPIOAO_2)
-#define PIN_GPIOAO_3 (AO_OFFSET + GPIOAO_3)
-#define PIN_GPIOAO_4 (AO_OFFSET + GPIOAO_4)
-#define PIN_GPIOAO_5 (AO_OFFSET + GPIOAO_5)
-#define PIN_GPIOAO_6 (AO_OFFSET + GPIOAO_6)
-#define PIN_GPIOAO_7 (AO_OFFSET + GPIOAO_7)
-#define PIN_GPIOAO_8 (AO_OFFSET + GPIOAO_8)
-#define PIN_GPIOAO_9 (AO_OFFSET + GPIOAO_9)
-#define PIN_GPIOAO_10 (AO_OFFSET + GPIOAO_10)
-#define PIN_GPIOAO_11 (AO_OFFSET + GPIOAO_11)
-#define PIN_GPIOAO_12 (AO_OFFSET + GPIOAO_12)
-#define PIN_GPIOAO_13 (AO_OFFSET + GPIOAO_13)
-#define PIN_GPIO_BSD_EN (AO_OFFSET + GPIO_BSD_EN)
-#define PIN_GPIO_TEST_N (AO_OFFSET + GPIO_TEST_N)
+#define AO_OFF 120
static const struct pinctrl_pin_desc meson8_pins[] = {
- MESON_PIN(GPIOX_0),
- MESON_PIN(GPIOX_1),
- MESON_PIN(GPIOX_2),
- MESON_PIN(GPIOX_3),
- MESON_PIN(GPIOX_4),
- MESON_PIN(GPIOX_5),
- MESON_PIN(GPIOX_6),
- MESON_PIN(GPIOX_7),
- MESON_PIN(GPIOX_8),
- MESON_PIN(GPIOX_9),
- MESON_PIN(GPIOX_10),
- MESON_PIN(GPIOX_11),
- MESON_PIN(GPIOX_12),
- MESON_PIN(GPIOX_13),
- MESON_PIN(GPIOX_14),
- MESON_PIN(GPIOX_15),
- MESON_PIN(GPIOX_16),
- MESON_PIN(GPIOX_17),
- MESON_PIN(GPIOX_18),
- MESON_PIN(GPIOX_19),
- MESON_PIN(GPIOX_20),
- MESON_PIN(GPIOX_21),
- MESON_PIN(GPIOY_0),
- MESON_PIN(GPIOY_1),
- MESON_PIN(GPIOY_2),
- MESON_PIN(GPIOY_3),
- MESON_PIN(GPIOY_4),
- MESON_PIN(GPIOY_5),
- MESON_PIN(GPIOY_6),
- MESON_PIN(GPIOY_7),
- MESON_PIN(GPIOY_8),
- MESON_PIN(GPIOY_9),
- MESON_PIN(GPIOY_10),
- MESON_PIN(GPIOY_11),
- MESON_PIN(GPIOY_12),
- MESON_PIN(GPIOY_13),
- MESON_PIN(GPIOY_14),
- MESON_PIN(GPIOY_15),
- MESON_PIN(GPIOY_16),
- MESON_PIN(GPIODV_0),
- MESON_PIN(GPIODV_1),
- MESON_PIN(GPIODV_2),
- MESON_PIN(GPIODV_3),
- MESON_PIN(GPIODV_4),
- MESON_PIN(GPIODV_5),
- MESON_PIN(GPIODV_6),
- MESON_PIN(GPIODV_7),
- MESON_PIN(GPIODV_8),
- MESON_PIN(GPIODV_9),
- MESON_PIN(GPIODV_10),
- MESON_PIN(GPIODV_11),
- MESON_PIN(GPIODV_12),
- MESON_PIN(GPIODV_13),
- MESON_PIN(GPIODV_14),
- MESON_PIN(GPIODV_15),
- MESON_PIN(GPIODV_16),
- MESON_PIN(GPIODV_17),
- MESON_PIN(GPIODV_18),
- MESON_PIN(GPIODV_19),
- MESON_PIN(GPIODV_20),
- MESON_PIN(GPIODV_21),
- MESON_PIN(GPIODV_22),
- MESON_PIN(GPIODV_23),
- MESON_PIN(GPIODV_24),
- MESON_PIN(GPIODV_25),
- MESON_PIN(GPIODV_26),
- MESON_PIN(GPIODV_27),
- MESON_PIN(GPIODV_28),
- MESON_PIN(GPIODV_29),
- MESON_PIN(GPIOH_0),
- MESON_PIN(GPIOH_1),
- MESON_PIN(GPIOH_2),
- MESON_PIN(GPIOH_3),
- MESON_PIN(GPIOH_4),
- MESON_PIN(GPIOH_5),
- MESON_PIN(GPIOH_6),
- MESON_PIN(GPIOH_7),
- MESON_PIN(GPIOH_8),
- MESON_PIN(GPIOH_9),
- MESON_PIN(GPIOZ_0),
- MESON_PIN(GPIOZ_1),
- MESON_PIN(GPIOZ_2),
- MESON_PIN(GPIOZ_3),
- MESON_PIN(GPIOZ_4),
- MESON_PIN(GPIOZ_5),
- MESON_PIN(GPIOZ_6),
- MESON_PIN(GPIOZ_7),
- MESON_PIN(GPIOZ_8),
- MESON_PIN(GPIOZ_9),
- MESON_PIN(GPIOZ_10),
- MESON_PIN(GPIOZ_11),
- MESON_PIN(GPIOZ_12),
- MESON_PIN(GPIOZ_13),
- MESON_PIN(GPIOZ_14),
- MESON_PIN(CARD_0),
- MESON_PIN(CARD_1),
- MESON_PIN(CARD_2),
- MESON_PIN(CARD_3),
- MESON_PIN(CARD_4),
- MESON_PIN(CARD_5),
- MESON_PIN(CARD_6),
- MESON_PIN(BOOT_0),
- MESON_PIN(BOOT_1),
- MESON_PIN(BOOT_2),
- MESON_PIN(BOOT_3),
- MESON_PIN(BOOT_4),
- MESON_PIN(BOOT_5),
- MESON_PIN(BOOT_6),
- MESON_PIN(BOOT_7),
- MESON_PIN(BOOT_8),
- MESON_PIN(BOOT_9),
- MESON_PIN(BOOT_10),
- MESON_PIN(BOOT_11),
- MESON_PIN(BOOT_12),
- MESON_PIN(BOOT_13),
- MESON_PIN(BOOT_14),
- MESON_PIN(BOOT_15),
- MESON_PIN(BOOT_16),
- MESON_PIN(BOOT_17),
- MESON_PIN(BOOT_18),
- MESON_PIN(GPIOAO_0),
- MESON_PIN(GPIOAO_1),
- MESON_PIN(GPIOAO_2),
- MESON_PIN(GPIOAO_3),
- MESON_PIN(GPIOAO_4),
- MESON_PIN(GPIOAO_5),
- MESON_PIN(GPIOAO_6),
- MESON_PIN(GPIOAO_7),
- MESON_PIN(GPIOAO_8),
- MESON_PIN(GPIOAO_9),
- MESON_PIN(GPIOAO_10),
- MESON_PIN(GPIOAO_11),
- MESON_PIN(GPIOAO_12),
- MESON_PIN(GPIOAO_13),
- MESON_PIN(GPIO_BSD_EN),
- MESON_PIN(GPIO_TEST_N),
+ MESON_PIN(GPIOX_0, 0),
+ MESON_PIN(GPIOX_1, 0),
+ MESON_PIN(GPIOX_2, 0),
+ MESON_PIN(GPIOX_3, 0),
+ MESON_PIN(GPIOX_4, 0),
+ MESON_PIN(GPIOX_5, 0),
+ MESON_PIN(GPIOX_6, 0),
+ MESON_PIN(GPIOX_7, 0),
+ MESON_PIN(GPIOX_8, 0),
+ MESON_PIN(GPIOX_9, 0),
+ MESON_PIN(GPIOX_10, 0),
+ MESON_PIN(GPIOX_11, 0),
+ MESON_PIN(GPIOX_12, 0),
+ MESON_PIN(GPIOX_13, 0),
+ MESON_PIN(GPIOX_14, 0),
+ MESON_PIN(GPIOX_15, 0),
+ MESON_PIN(GPIOX_16, 0),
+ MESON_PIN(GPIOX_17, 0),
+ MESON_PIN(GPIOX_18, 0),
+ MESON_PIN(GPIOX_19, 0),
+ MESON_PIN(GPIOX_20, 0),
+ MESON_PIN(GPIOX_21, 0),
+ MESON_PIN(GPIOY_0, 0),
+ MESON_PIN(GPIOY_1, 0),
+ MESON_PIN(GPIOY_2, 0),
+ MESON_PIN(GPIOY_3, 0),
+ MESON_PIN(GPIOY_4, 0),
+ MESON_PIN(GPIOY_5, 0),
+ MESON_PIN(GPIOY_6, 0),
+ MESON_PIN(GPIOY_7, 0),
+ MESON_PIN(GPIOY_8, 0),
+ MESON_PIN(GPIOY_9, 0),
+ MESON_PIN(GPIOY_10, 0),
+ MESON_PIN(GPIOY_11, 0),
+ MESON_PIN(GPIOY_12, 0),
+ MESON_PIN(GPIOY_13, 0),
+ MESON_PIN(GPIOY_14, 0),
+ MESON_PIN(GPIOY_15, 0),
+ MESON_PIN(GPIOY_16, 0),
+ MESON_PIN(GPIODV_0, 0),
+ MESON_PIN(GPIODV_1, 0),
+ MESON_PIN(GPIODV_2, 0),
+ MESON_PIN(GPIODV_3, 0),
+ MESON_PIN(GPIODV_4, 0),
+ MESON_PIN(GPIODV_5, 0),
+ MESON_PIN(GPIODV_6, 0),
+ MESON_PIN(GPIODV_7, 0),
+ MESON_PIN(GPIODV_8, 0),
+ MESON_PIN(GPIODV_9, 0),
+ MESON_PIN(GPIODV_10, 0),
+ MESON_PIN(GPIODV_11, 0),
+ MESON_PIN(GPIODV_12, 0),
+ MESON_PIN(GPIODV_13, 0),
+ MESON_PIN(GPIODV_14, 0),
+ MESON_PIN(GPIODV_15, 0),
+ MESON_PIN(GPIODV_16, 0),
+ MESON_PIN(GPIODV_17, 0),
+ MESON_PIN(GPIODV_18, 0),
+ MESON_PIN(GPIODV_19, 0),
+ MESON_PIN(GPIODV_20, 0),
+ MESON_PIN(GPIODV_21, 0),
+ MESON_PIN(GPIODV_22, 0),
+ MESON_PIN(GPIODV_23, 0),
+ MESON_PIN(GPIODV_24, 0),
+ MESON_PIN(GPIODV_25, 0),
+ MESON_PIN(GPIODV_26, 0),
+ MESON_PIN(GPIODV_27, 0),
+ MESON_PIN(GPIODV_28, 0),
+ MESON_PIN(GPIODV_29, 0),
+ MESON_PIN(GPIOH_0, 0),
+ MESON_PIN(GPIOH_1, 0),
+ MESON_PIN(GPIOH_2, 0),
+ MESON_PIN(GPIOH_3, 0),
+ MESON_PIN(GPIOH_4, 0),
+ MESON_PIN(GPIOH_5, 0),
+ MESON_PIN(GPIOH_6, 0),
+ MESON_PIN(GPIOH_7, 0),
+ MESON_PIN(GPIOH_8, 0),
+ MESON_PIN(GPIOH_9, 0),
+ MESON_PIN(GPIOZ_0, 0),
+ MESON_PIN(GPIOZ_1, 0),
+ MESON_PIN(GPIOZ_2, 0),
+ MESON_PIN(GPIOZ_3, 0),
+ MESON_PIN(GPIOZ_4, 0),
+ MESON_PIN(GPIOZ_5, 0),
+ MESON_PIN(GPIOZ_6, 0),
+ MESON_PIN(GPIOZ_7, 0),
+ MESON_PIN(GPIOZ_8, 0),
+ MESON_PIN(GPIOZ_9, 0),
+ MESON_PIN(GPIOZ_10, 0),
+ MESON_PIN(GPIOZ_11, 0),
+ MESON_PIN(GPIOZ_12, 0),
+ MESON_PIN(GPIOZ_13, 0),
+ MESON_PIN(GPIOZ_14, 0),
+ MESON_PIN(CARD_0, 0),
+ MESON_PIN(CARD_1, 0),
+ MESON_PIN(CARD_2, 0),
+ MESON_PIN(CARD_3, 0),
+ MESON_PIN(CARD_4, 0),
+ MESON_PIN(CARD_5, 0),
+ MESON_PIN(CARD_6, 0),
+ MESON_PIN(BOOT_0, 0),
+ MESON_PIN(BOOT_1, 0),
+ MESON_PIN(BOOT_2, 0),
+ MESON_PIN(BOOT_3, 0),
+ MESON_PIN(BOOT_4, 0),
+ MESON_PIN(BOOT_5, 0),
+ MESON_PIN(BOOT_6, 0),
+ MESON_PIN(BOOT_7, 0),
+ MESON_PIN(BOOT_8, 0),
+ MESON_PIN(BOOT_9, 0),
+ MESON_PIN(BOOT_10, 0),
+ MESON_PIN(BOOT_11, 0),
+ MESON_PIN(BOOT_12, 0),
+ MESON_PIN(BOOT_13, 0),
+ MESON_PIN(BOOT_14, 0),
+ MESON_PIN(BOOT_15, 0),
+ MESON_PIN(BOOT_16, 0),
+ MESON_PIN(BOOT_17, 0),
+ MESON_PIN(BOOT_18, 0),
+ MESON_PIN(GPIOAO_0, AO_OFF),
+ MESON_PIN(GPIOAO_1, AO_OFF),
+ MESON_PIN(GPIOAO_2, AO_OFF),
+ MESON_PIN(GPIOAO_3, AO_OFF),
+ MESON_PIN(GPIOAO_4, AO_OFF),
+ MESON_PIN(GPIOAO_5, AO_OFF),
+ MESON_PIN(GPIOAO_6, AO_OFF),
+ MESON_PIN(GPIOAO_7, AO_OFF),
+ MESON_PIN(GPIOAO_8, AO_OFF),
+ MESON_PIN(GPIOAO_9, AO_OFF),
+ MESON_PIN(GPIOAO_10, AO_OFF),
+ MESON_PIN(GPIOAO_11, AO_OFF),
+ MESON_PIN(GPIOAO_12, AO_OFF),
+ MESON_PIN(GPIOAO_13, AO_OFF),
+ MESON_PIN(GPIO_BSD_EN, AO_OFF),
+ MESON_PIN(GPIO_TEST_N, AO_OFF),
};
/* bank X */
-static const unsigned int sd_d0_a_pins[] = { PIN_GPIOX_0 };
-static const unsigned int sd_d1_a_pins[] = { PIN_GPIOX_1 };
-static const unsigned int sd_d2_a_pins[] = { PIN_GPIOX_2 };
-static const unsigned int sd_d3_a_pins[] = { PIN_GPIOX_3 };
-static const unsigned int sd_clk_a_pins[] = { PIN_GPIOX_8 };
-static const unsigned int sd_cmd_a_pins[] = { PIN_GPIOX_9 };
-
-static const unsigned int sdxc_d0_a_pins[] = { PIN_GPIOX_0 };
-static const unsigned int sdxc_d13_a_pins[] = { PIN_GPIOX_1, PIN_GPIOX_2,
- PIN_GPIOX_3 };
-static const unsigned int sdxc_d47_a_pins[] = { PIN_GPIOX_4, PIN_GPIOX_5,
- PIN_GPIOX_6, PIN_GPIOX_7 };
-static const unsigned int sdxc_clk_a_pins[] = { PIN_GPIOX_8 };
-static const unsigned int sdxc_cmd_a_pins[] = { PIN_GPIOX_9 };
-
-static const unsigned int pcm_out_a_pins[] = { PIN_GPIOX_4 };
-static const unsigned int pcm_in_a_pins[] = { PIN_GPIOX_5 };
-static const unsigned int pcm_fs_a_pins[] = { PIN_GPIOX_6 };
-static const unsigned int pcm_clk_a_pins[] = { PIN_GPIOX_7 };
-
-static const unsigned int uart_tx_a0_pins[] = { PIN_GPIOX_4 };
-static const unsigned int uart_rx_a0_pins[] = { PIN_GPIOX_5 };
-static const unsigned int uart_cts_a0_pins[] = { PIN_GPIOX_6 };
-static const unsigned int uart_rts_a0_pins[] = { PIN_GPIOX_7 };
-
-static const unsigned int uart_tx_a1_pins[] = { PIN_GPIOX_12 };
-static const unsigned int uart_rx_a1_pins[] = { PIN_GPIOX_13 };
-static const unsigned int uart_cts_a1_pins[] = { PIN_GPIOX_14 };
-static const unsigned int uart_rts_a1_pins[] = { PIN_GPIOX_15 };
-
-static const unsigned int uart_tx_b0_pins[] = { PIN_GPIOX_16 };
-static const unsigned int uart_rx_b0_pins[] = { PIN_GPIOX_17 };
-static const unsigned int uart_cts_b0_pins[] = { PIN_GPIOX_18 };
-static const unsigned int uart_rts_b0_pins[] = { PIN_GPIOX_19 };
-
-static const unsigned int iso7816_det_pins[] = { PIN_GPIOX_16 };
-static const unsigned int iso7816_reset_pins[] = { PIN_GPIOX_17 };
-static const unsigned int iso7816_clk_pins[] = { PIN_GPIOX_18 };
-static const unsigned int iso7816_data_pins[] = { PIN_GPIOX_19 };
-
-static const unsigned int i2c_sda_d0_pins[] = { PIN_GPIOX_16 };
-static const unsigned int i2c_sck_d0_pins[] = { PIN_GPIOX_17 };
-
-static const unsigned int xtal_32k_out_pins[] = { PIN_GPIOX_10 };
-static const unsigned int xtal_24m_out_pins[] = { PIN_GPIOX_11 };
+static const unsigned int sd_d0_a_pins[] = { PIN(GPIOX_0, 0) };
+static const unsigned int sd_d1_a_pins[] = { PIN(GPIOX_1, 0) };
+static const unsigned int sd_d2_a_pins[] = { PIN(GPIOX_2, 0) };
+static const unsigned int sd_d3_a_pins[] = { PIN(GPIOX_3, 0) };
+static const unsigned int sd_clk_a_pins[] = { PIN(GPIOX_8, 0) };
+static const unsigned int sd_cmd_a_pins[] = { PIN(GPIOX_9, 0) };
+
+static const unsigned int sdxc_d0_a_pins[] = { PIN(GPIOX_0, 0) };
+static const unsigned int sdxc_d13_a_pins[] = { PIN(GPIOX_1, 0), PIN(GPIOX_2, 0),
+ PIN(GPIOX_3, 0) };
+static const unsigned int sdxc_d47_a_pins[] = { PIN(GPIOX_4, 0), PIN(GPIOX_5, 0),
+ PIN(GPIOX_6, 0), PIN(GPIOX_7, 0) };
+static const unsigned int sdxc_clk_a_pins[] = { PIN(GPIOX_8, 0) };
+static const unsigned int sdxc_cmd_a_pins[] = { PIN(GPIOX_9, 0) };
+
+static const unsigned int pcm_out_a_pins[] = { PIN(GPIOX_4, 0) };
+static const unsigned int pcm_in_a_pins[] = { PIN(GPIOX_5, 0) };
+static const unsigned int pcm_fs_a_pins[] = { PIN(GPIOX_6, 0) };
+static const unsigned int pcm_clk_a_pins[] = { PIN(GPIOX_7, 0) };
+
+static const unsigned int uart_tx_a0_pins[] = { PIN(GPIOX_4, 0) };
+static const unsigned int uart_rx_a0_pins[] = { PIN(GPIOX_5, 0) };
+static const unsigned int uart_cts_a0_pins[] = { PIN(GPIOX_6, 0) };
+static const unsigned int uart_rts_a0_pins[] = { PIN(GPIOX_7, 0) };
+
+static const unsigned int uart_tx_a1_pins[] = { PIN(GPIOX_12, 0) };
+static const unsigned int uart_rx_a1_pins[] = { PIN(GPIOX_13, 0) };
+static const unsigned int uart_cts_a1_pins[] = { PIN(GPIOX_14, 0) };
+static const unsigned int uart_rts_a1_pins[] = { PIN(GPIOX_15, 0) };
+
+static const unsigned int uart_tx_b0_pins[] = { PIN(GPIOX_16, 0) };
+static const unsigned int uart_rx_b0_pins[] = { PIN(GPIOX_17, 0) };
+static const unsigned int uart_cts_b0_pins[] = { PIN(GPIOX_18, 0) };
+static const unsigned int uart_rts_b0_pins[] = { PIN(GPIOX_19, 0) };
+
+static const unsigned int iso7816_det_pins[] = { PIN(GPIOX_16, 0) };
+static const unsigned int iso7816_reset_pins[] = { PIN(GPIOX_17, 0) };
+static const unsigned int iso7816_clk_pins[] = { PIN(GPIOX_18, 0) };
+static const unsigned int iso7816_data_pins[] = { PIN(GPIOX_19, 0) };
+
+static const unsigned int i2c_sda_d0_pins[] = { PIN(GPIOX_16, 0) };
+static const unsigned int i2c_sck_d0_pins[] = { PIN(GPIOX_17, 0) };
+
+static const unsigned int xtal_32k_out_pins[] = { PIN(GPIOX_10, 0) };
+static const unsigned int xtal_24m_out_pins[] = { PIN(GPIOX_11, 0) };
/* bank Y */
-static const unsigned int uart_tx_c_pins[] = { PIN_GPIOY_0 };
-static const unsigned int uart_rx_c_pins[] = { PIN_GPIOY_1 };
-static const unsigned int uart_cts_c_pins[] = { PIN_GPIOY_2 };
-static const unsigned int uart_rts_c_pins[] = { PIN_GPIOY_3 };
+static const unsigned int uart_tx_c_pins[] = { PIN(GPIOY_0, 0) };
+static const unsigned int uart_rx_c_pins[] = { PIN(GPIOY_1, 0) };
+static const unsigned int uart_cts_c_pins[] = { PIN(GPIOY_2, 0) };
+static const unsigned int uart_rts_c_pins[] = { PIN(GPIOY_3, 0) };
-static const unsigned int pcm_out_b_pins[] = { PIN_GPIOY_4 };
-static const unsigned int pcm_in_b_pins[] = { PIN_GPIOY_5 };
-static const unsigned int pcm_fs_b_pins[] = { PIN_GPIOY_6 };
-static const unsigned int pcm_clk_b_pins[] = { PIN_GPIOY_7 };
+static const unsigned int pcm_out_b_pins[] = { PIN(GPIOY_4, 0) };
+static const unsigned int pcm_in_b_pins[] = { PIN(GPIOY_5, 0) };
+static const unsigned int pcm_fs_b_pins[] = { PIN(GPIOY_6, 0) };
+static const unsigned int pcm_clk_b_pins[] = { PIN(GPIOY_7, 0) };
-static const unsigned int i2c_sda_c0_pins[] = { PIN_GPIOY_0 };
-static const unsigned int i2c_sck_c0_pins[] = { PIN_GPIOY_1 };
+static const unsigned int i2c_sda_c0_pins[] = { PIN(GPIOY_0, 0) };
+static const unsigned int i2c_sck_c0_pins[] = { PIN(GPIOY_1, 0) };
/* bank DV */
-static const unsigned int dvin_rgb_pins[] = { PIN_GPIODV_0, PIN_GPIODV_1,
- PIN_GPIODV_2, PIN_GPIODV_3,
- PIN_GPIODV_4, PIN_GPIODV_5,
- PIN_GPIODV_6, PIN_GPIODV_7,
- PIN_GPIODV_8, PIN_GPIODV_9,
- PIN_GPIODV_10, PIN_GPIODV_11,
- PIN_GPIODV_12, PIN_GPIODV_13,
- PIN_GPIODV_14, PIN_GPIODV_15,
- PIN_GPIODV_16, PIN_GPIODV_17,
- PIN_GPIODV_18, PIN_GPIODV_19,
- PIN_GPIODV_20, PIN_GPIODV_21,
- PIN_GPIODV_22, PIN_GPIODV_23 };
-static const unsigned int dvin_vs_pins[] = { PIN_GPIODV_24 };
-static const unsigned int dvin_hs_pins[] = { PIN_GPIODV_25 };
-static const unsigned int dvin_clk_pins[] = { PIN_GPIODV_26 };
-static const unsigned int dvin_de_pins[] = { PIN_GPIODV_27 };
-
-static const unsigned int enc_0_pins[] = { PIN_GPIODV_0 };
-static const unsigned int enc_1_pins[] = { PIN_GPIODV_1 };
-static const unsigned int enc_2_pins[] = { PIN_GPIODV_2 };
-static const unsigned int enc_3_pins[] = { PIN_GPIODV_3 };
-static const unsigned int enc_4_pins[] = { PIN_GPIODV_4 };
-static const unsigned int enc_5_pins[] = { PIN_GPIODV_5 };
-static const unsigned int enc_6_pins[] = { PIN_GPIODV_6 };
-static const unsigned int enc_7_pins[] = { PIN_GPIODV_7 };
-static const unsigned int enc_8_pins[] = { PIN_GPIODV_8 };
-static const unsigned int enc_9_pins[] = { PIN_GPIODV_9 };
-static const unsigned int enc_10_pins[] = { PIN_GPIODV_10 };
-static const unsigned int enc_11_pins[] = { PIN_GPIODV_11 };
-static const unsigned int enc_12_pins[] = { PIN_GPIODV_12 };
-static const unsigned int enc_13_pins[] = { PIN_GPIODV_13 };
-static const unsigned int enc_14_pins[] = { PIN_GPIODV_14 };
-static const unsigned int enc_15_pins[] = { PIN_GPIODV_15 };
-static const unsigned int enc_16_pins[] = { PIN_GPIODV_16 };
-static const unsigned int enc_17_pins[] = { PIN_GPIODV_17 };
-
-static const unsigned int uart_tx_b1_pins[] = { PIN_GPIODV_24 };
-static const unsigned int uart_rx_b1_pins[] = { PIN_GPIODV_25 };
-static const unsigned int uart_cts_b1_pins[] = { PIN_GPIODV_26 };
-static const unsigned int uart_rts_b1_pins[] = { PIN_GPIODV_27 };
-
-static const unsigned int vga_vs_pins[] = { PIN_GPIODV_24 };
-static const unsigned int vga_hs_pins[] = { PIN_GPIODV_25 };
+static const unsigned int dvin_rgb_pins[] = { PIN(GPIODV_0, 0), PIN(GPIODV_1, 0),
+ PIN(GPIODV_2, 0), PIN(GPIODV_3, 0),
+ PIN(GPIODV_4, 0), PIN(GPIODV_5, 0),
+ PIN(GPIODV_6, 0), PIN(GPIODV_7, 0),
+ PIN(GPIODV_8, 0), PIN(GPIODV_9, 0),
+ PIN(GPIODV_10, 0), PIN(GPIODV_11, 0),
+ PIN(GPIODV_12, 0), PIN(GPIODV_13, 0),
+ PIN(GPIODV_14, 0), PIN(GPIODV_15, 0),
+ PIN(GPIODV_16, 0), PIN(GPIODV_17, 0),
+ PIN(GPIODV_18, 0), PIN(GPIODV_19, 0),
+ PIN(GPIODV_20, 0), PIN(GPIODV_21, 0),
+ PIN(GPIODV_22, 0), PIN(GPIODV_23, 0) };
+static const unsigned int dvin_vs_pins[] = { PIN(GPIODV_24, 0) };
+static const unsigned int dvin_hs_pins[] = { PIN(GPIODV_25, 0) };
+static const unsigned int dvin_clk_pins[] = { PIN(GPIODV_26, 0) };
+static const unsigned int dvin_de_pins[] = { PIN(GPIODV_27, 0) };
+
+static const unsigned int enc_0_pins[] = { PIN(GPIODV_0, 0) };
+static const unsigned int enc_1_pins[] = { PIN(GPIODV_1, 0) };
+static const unsigned int enc_2_pins[] = { PIN(GPIODV_2, 0) };
+static const unsigned int enc_3_pins[] = { PIN(GPIODV_3, 0) };
+static const unsigned int enc_4_pins[] = { PIN(GPIODV_4, 0) };
+static const unsigned int enc_5_pins[] = { PIN(GPIODV_5, 0) };
+static const unsigned int enc_6_pins[] = { PIN(GPIODV_6, 0) };
+static const unsigned int enc_7_pins[] = { PIN(GPIODV_7, 0) };
+static const unsigned int enc_8_pins[] = { PIN(GPIODV_8, 0) };
+static const unsigned int enc_9_pins[] = { PIN(GPIODV_9, 0) };
+static const unsigned int enc_10_pins[] = { PIN(GPIODV_10, 0) };
+static const unsigned int enc_11_pins[] = { PIN(GPIODV_11, 0) };
+static const unsigned int enc_12_pins[] = { PIN(GPIODV_12, 0) };
+static const unsigned int enc_13_pins[] = { PIN(GPIODV_13, 0) };
+static const unsigned int enc_14_pins[] = { PIN(GPIODV_14, 0) };
+static const unsigned int enc_15_pins[] = { PIN(GPIODV_15, 0) };
+static const unsigned int enc_16_pins[] = { PIN(GPIODV_16, 0) };
+static const unsigned int enc_17_pins[] = { PIN(GPIODV_17, 0) };
+
+static const unsigned int uart_tx_b1_pins[] = { PIN(GPIODV_24, 0) };
+static const unsigned int uart_rx_b1_pins[] = { PIN(GPIODV_25, 0) };
+static const unsigned int uart_cts_b1_pins[] = { PIN(GPIODV_26, 0) };
+static const unsigned int uart_rts_b1_pins[] = { PIN(GPIODV_27, 0) };
+
+static const unsigned int vga_vs_pins[] = { PIN(GPIODV_24, 0) };
+static const unsigned int vga_hs_pins[] = { PIN(GPIODV_25, 0) };
/* bank H */
-static const unsigned int hdmi_hpd_pins[] = { PIN_GPIOH_0 };
-static const unsigned int hdmi_sda_pins[] = { PIN_GPIOH_1 };
-static const unsigned int hdmi_scl_pins[] = { PIN_GPIOH_2 };
-static const unsigned int hdmi_cec_pins[] = { PIN_GPIOH_3 };
+static const unsigned int hdmi_hpd_pins[] = { PIN(GPIOH_0, 0) };
+static const unsigned int hdmi_sda_pins[] = { PIN(GPIOH_1, 0) };
+static const unsigned int hdmi_scl_pins[] = { PIN(GPIOH_2, 0) };
+static const unsigned int hdmi_cec_pins[] = { PIN(GPIOH_3, 0) };
-static const unsigned int spi_ss0_0_pins[] = { PIN_GPIOH_3 };
-static const unsigned int spi_miso_0_pins[] = { PIN_GPIOH_4 };
-static const unsigned int spi_mosi_0_pins[] = { PIN_GPIOH_5 };
-static const unsigned int spi_sclk_0_pins[] = { PIN_GPIOH_6 };
+static const unsigned int spi_ss0_0_pins[] = { PIN(GPIOH_3, 0) };
+static const unsigned int spi_miso_0_pins[] = { PIN(GPIOH_4, 0) };
+static const unsigned int spi_mosi_0_pins[] = { PIN(GPIOH_5, 0) };
+static const unsigned int spi_sclk_0_pins[] = { PIN(GPIOH_6, 0) };
-static const unsigned int i2c_sda_d1_pins[] = { PIN_GPIOH_7 };
-static const unsigned int i2c_sck_d1_pins[] = { PIN_GPIOH_8 };
+static const unsigned int i2c_sda_d1_pins[] = { PIN(GPIOH_7, 0) };
+static const unsigned int i2c_sck_d1_pins[] = { PIN(GPIOH_8, 0) };
/* bank Z */
-static const unsigned int spi_ss0_1_pins[] = { PIN_GPIOZ_9 };
-static const unsigned int spi_ss1_1_pins[] = { PIN_GPIOZ_10 };
-static const unsigned int spi_sclk_1_pins[] = { PIN_GPIOZ_11 };
-static const unsigned int spi_mosi_1_pins[] = { PIN_GPIOZ_12 };
-static const unsigned int spi_miso_1_pins[] = { PIN_GPIOZ_13 };
-static const unsigned int spi_ss2_1_pins[] = { PIN_GPIOZ_14 };
-
-static const unsigned int eth_tx_clk_50m_pins[] = { PIN_GPIOZ_4 };
-static const unsigned int eth_tx_en_pins[] = { PIN_GPIOZ_5 };
-static const unsigned int eth_txd1_pins[] = { PIN_GPIOZ_6 };
-static const unsigned int eth_txd0_pins[] = { PIN_GPIOZ_7 };
-static const unsigned int eth_rx_clk_in_pins[] = { PIN_GPIOZ_8 };
-static const unsigned int eth_rx_dv_pins[] = { PIN_GPIOZ_9 };
-static const unsigned int eth_rxd1_pins[] = { PIN_GPIOZ_10 };
-static const unsigned int eth_rxd0_pins[] = { PIN_GPIOZ_11 };
-static const unsigned int eth_mdio_pins[] = { PIN_GPIOZ_12 };
-static const unsigned int eth_mdc_pins[] = { PIN_GPIOZ_13 };
-
-static const unsigned int i2c_sda_a0_pins[] = { PIN_GPIOZ_0 };
-static const unsigned int i2c_sck_a0_pins[] = { PIN_GPIOZ_1 };
-
-static const unsigned int i2c_sda_b_pins[] = { PIN_GPIOZ_2 };
-static const unsigned int i2c_sck_b_pins[] = { PIN_GPIOZ_3 };
-
-static const unsigned int i2c_sda_c1_pins[] = { PIN_GPIOZ_4 };
-static const unsigned int i2c_sck_c1_pins[] = { PIN_GPIOZ_5 };
-
-static const unsigned int i2c_sda_a1_pins[] = { PIN_GPIOZ_0 };
-static const unsigned int i2c_sck_a1_pins[] = { PIN_GPIOZ_1 };
-
-static const unsigned int i2c_sda_a2_pins[] = { PIN_GPIOZ_0 };
-static const unsigned int i2c_sck_a2_pins[] = { PIN_GPIOZ_1 };
+static const unsigned int spi_ss0_1_pins[] = { PIN(GPIOZ_9, 0) };
+static const unsigned int spi_ss1_1_pins[] = { PIN(GPIOZ_10, 0) };
+static const unsigned int spi_sclk_1_pins[] = { PIN(GPIOZ_11, 0) };
+static const unsigned int spi_mosi_1_pins[] = { PIN(GPIOZ_12, 0) };
+static const unsigned int spi_miso_1_pins[] = { PIN(GPIOZ_13, 0) };
+static const unsigned int spi_ss2_1_pins[] = { PIN(GPIOZ_14, 0) };
+
+static const unsigned int eth_tx_clk_50m_pins[] = { PIN(GPIOZ_4, 0) };
+static const unsigned int eth_tx_en_pins[] = { PIN(GPIOZ_5, 0) };
+static const unsigned int eth_txd1_pins[] = { PIN(GPIOZ_6, 0) };
+static const unsigned int eth_txd0_pins[] = { PIN(GPIOZ_7, 0) };
+static const unsigned int eth_rx_clk_in_pins[] = { PIN(GPIOZ_8, 0) };
+static const unsigned int eth_rx_dv_pins[] = { PIN(GPIOZ_9, 0) };
+static const unsigned int eth_rxd1_pins[] = { PIN(GPIOZ_10, 0) };
+static const unsigned int eth_rxd0_pins[] = { PIN(GPIOZ_11, 0) };
+static const unsigned int eth_mdio_pins[] = { PIN(GPIOZ_12, 0) };
+static const unsigned int eth_mdc_pins[] = { PIN(GPIOZ_13, 0) };
+
+static const unsigned int i2c_sda_a0_pins[] = { PIN(GPIOZ_0, 0) };
+static const unsigned int i2c_sck_a0_pins[] = { PIN(GPIOZ_1, 0) };
+
+static const unsigned int i2c_sda_b_pins[] = { PIN(GPIOZ_2, 0) };
+static const unsigned int i2c_sck_b_pins[] = { PIN(GPIOZ_3, 0) };
+
+static const unsigned int i2c_sda_c1_pins[] = { PIN(GPIOZ_4, 0) };
+static const unsigned int i2c_sck_c1_pins[] = { PIN(GPIOZ_5, 0) };
+
+static const unsigned int i2c_sda_a1_pins[] = { PIN(GPIOZ_0, 0) };
+static const unsigned int i2c_sck_a1_pins[] = { PIN(GPIOZ_1, 0) };
+
+static const unsigned int i2c_sda_a2_pins[] = { PIN(GPIOZ_0, 0) };
+static const unsigned int i2c_sck_a2_pins[] = { PIN(GPIOZ_1, 0) };
/* bank BOOT */
-static const unsigned int sd_d0_c_pins[] = { PIN_BOOT_0 };
-static const unsigned int sd_d1_c_pins[] = { PIN_BOOT_1 };
-static const unsigned int sd_d2_c_pins[] = { PIN_BOOT_2 };
-static const unsigned int sd_d3_c_pins[] = { PIN_BOOT_3 };
-static const unsigned int sd_cmd_c_pins[] = { PIN_BOOT_16 };
-static const unsigned int sd_clk_c_pins[] = { PIN_BOOT_17 };
-
-static const unsigned int sdxc_d0_c_pins[] = { PIN_BOOT_0};
-static const unsigned int sdxc_d13_c_pins[] = { PIN_BOOT_1, PIN_BOOT_2,
- PIN_BOOT_3 };
-static const unsigned int sdxc_d47_c_pins[] = { PIN_BOOT_4, PIN_BOOT_5,
- PIN_BOOT_6, PIN_BOOT_7 };
-static const unsigned int sdxc_cmd_c_pins[] = { PIN_BOOT_16 };
-static const unsigned int sdxc_clk_c_pins[] = { PIN_BOOT_17 };
-
-static const unsigned int nand_io_pins[] = { PIN_BOOT_0, PIN_BOOT_1,
- PIN_BOOT_2, PIN_BOOT_3,
- PIN_BOOT_4, PIN_BOOT_5,
- PIN_BOOT_6, PIN_BOOT_7 };
-static const unsigned int nand_io_ce0_pins[] = { PIN_BOOT_8 };
-static const unsigned int nand_io_ce1_pins[] = { PIN_BOOT_9 };
-static const unsigned int nand_io_rb0_pins[] = { PIN_BOOT_10 };
-static const unsigned int nand_ale_pins[] = { PIN_BOOT_11 };
-static const unsigned int nand_cle_pins[] = { PIN_BOOT_12 };
-static const unsigned int nand_wen_clk_pins[] = { PIN_BOOT_13 };
-static const unsigned int nand_ren_clk_pins[] = { PIN_BOOT_14 };
-static const unsigned int nand_dqs_pins[] = { PIN_BOOT_15 };
-static const unsigned int nand_ce2_pins[] = { PIN_BOOT_16 };
-static const unsigned int nand_ce3_pins[] = { PIN_BOOT_17 };
-
-static const unsigned int nor_d_pins[] = { PIN_BOOT_11 };
-static const unsigned int nor_q_pins[] = { PIN_BOOT_12 };
-static const unsigned int nor_c_pins[] = { PIN_BOOT_13 };
-static const unsigned int nor_cs_pins[] = { PIN_BOOT_18 };
+static const unsigned int sd_d0_c_pins[] = { PIN(BOOT_0, 0) };
+static const unsigned int sd_d1_c_pins[] = { PIN(BOOT_1, 0) };
+static const unsigned int sd_d2_c_pins[] = { PIN(BOOT_2, 0) };
+static const unsigned int sd_d3_c_pins[] = { PIN(BOOT_3, 0) };
+static const unsigned int sd_cmd_c_pins[] = { PIN(BOOT_16, 0) };
+static const unsigned int sd_clk_c_pins[] = { PIN(BOOT_17, 0) };
+
+static const unsigned int sdxc_d0_c_pins[] = { PIN(BOOT_0, 0)};
+static const unsigned int sdxc_d13_c_pins[] = { PIN(BOOT_1, 0), PIN(BOOT_2, 0),
+ PIN(BOOT_3, 0) };
+static const unsigned int sdxc_d47_c_pins[] = { PIN(BOOT_4, 0), PIN(BOOT_5, 0),
+ PIN(BOOT_6, 0), PIN(BOOT_7, 0) };
+static const unsigned int sdxc_cmd_c_pins[] = { PIN(BOOT_16, 0) };
+static const unsigned int sdxc_clk_c_pins[] = { PIN(BOOT_17, 0) };
+
+static const unsigned int nand_io_pins[] = { PIN(BOOT_0, 0), PIN(BOOT_1, 0),
+ PIN(BOOT_2, 0), PIN(BOOT_3, 0),
+ PIN(BOOT_4, 0), PIN(BOOT_5, 0),
+ PIN(BOOT_6, 0), PIN(BOOT_7, 0) };
+static const unsigned int nand_io_ce0_pins[] = { PIN(BOOT_8, 0) };
+static const unsigned int nand_io_ce1_pins[] = { PIN(BOOT_9, 0) };
+static const unsigned int nand_io_rb0_pins[] = { PIN(BOOT_10, 0) };
+static const unsigned int nand_ale_pins[] = { PIN(BOOT_11, 0) };
+static const unsigned int nand_cle_pins[] = { PIN(BOOT_12, 0) };
+static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_13, 0) };
+static const unsigned int nand_ren_clk_pins[] = { PIN(BOOT_14, 0) };
+static const unsigned int nand_dqs_pins[] = { PIN(BOOT_15, 0) };
+static const unsigned int nand_ce2_pins[] = { PIN(BOOT_16, 0) };
+static const unsigned int nand_ce3_pins[] = { PIN(BOOT_17, 0) };
+
+static const unsigned int nor_d_pins[] = { PIN(BOOT_11, 0) };
+static const unsigned int nor_q_pins[] = { PIN(BOOT_12, 0) };
+static const unsigned int nor_c_pins[] = { PIN(BOOT_13, 0) };
+static const unsigned int nor_cs_pins[] = { PIN(BOOT_18, 0) };
/* bank CARD */
-static const unsigned int sd_d1_b_pins[] = { PIN_CARD_0 };
-static const unsigned int sd_d0_b_pins[] = { PIN_CARD_1 };
-static const unsigned int sd_clk_b_pins[] = { PIN_CARD_2 };
-static const unsigned int sd_cmd_b_pins[] = { PIN_CARD_3 };
-static const unsigned int sd_d3_b_pins[] = { PIN_CARD_4 };
-static const unsigned int sd_d2_b_pins[] = { PIN_CARD_5 };
-
-static const unsigned int sdxc_d13_b_pins[] = { PIN_CARD_0, PIN_CARD_4,
- PIN_CARD_5 };
-static const unsigned int sdxc_d0_b_pins[] = { PIN_CARD_1 };
-static const unsigned int sdxc_clk_b_pins[] = { PIN_CARD_2 };
-static const unsigned int sdxc_cmd_b_pins[] = { PIN_CARD_3 };
+static const unsigned int sd_d1_b_pins[] = { PIN(CARD_0, 0) };
+static const unsigned int sd_d0_b_pins[] = { PIN(CARD_1, 0) };
+static const unsigned int sd_clk_b_pins[] = { PIN(CARD_2, 0) };
+static const unsigned int sd_cmd_b_pins[] = { PIN(CARD_3, 0) };
+static const unsigned int sd_d3_b_pins[] = { PIN(CARD_4, 0) };
+static const unsigned int sd_d2_b_pins[] = { PIN(CARD_5, 0) };
+
+static const unsigned int sdxc_d13_b_pins[] = { PIN(CARD_0, 0), PIN(CARD_4, 0),
+ PIN(CARD_5, 0) };
+static const unsigned int sdxc_d0_b_pins[] = { PIN(CARD_1, 0) };
+static const unsigned int sdxc_clk_b_pins[] = { PIN(CARD_2, 0) };
+static const unsigned int sdxc_cmd_b_pins[] = { PIN(CARD_3, 0) };
/* bank AO */
-static const unsigned int uart_tx_ao_a_pins[] = { PIN_GPIOAO_0 };
-static const unsigned int uart_rx_ao_a_pins[] = { PIN_GPIOAO_1 };
-static const unsigned int uart_cts_ao_a_pins[] = { PIN_GPIOAO_2 };
-static const unsigned int uart_rts_ao_a_pins[] = { PIN_GPIOAO_3 };
+static const unsigned int uart_tx_ao_a_pins[] = { PIN(GPIOAO_0, AO_OFF) };
+static const unsigned int uart_rx_ao_a_pins[] = { PIN(GPIOAO_1, AO_OFF) };
+static const unsigned int uart_cts_ao_a_pins[] = { PIN(GPIOAO_2, AO_OFF) };
+static const unsigned int uart_rts_ao_a_pins[] = { PIN(GPIOAO_3, AO_OFF) };
-static const unsigned int remote_input_pins[] = { PIN_GPIOAO_7 };
+static const unsigned int remote_input_pins[] = { PIN(GPIOAO_7, AO_OFF) };
-static const unsigned int i2c_slave_sck_ao_pins[] = { PIN_GPIOAO_4 };
-static const unsigned int i2c_slave_sda_ao_pins[] = { PIN_GPIOAO_5 };
+static const unsigned int i2c_slave_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) };
+static const unsigned int i2c_slave_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) };
-static const unsigned int uart_tx_ao_b0_pins[] = { PIN_GPIOAO_0 };
-static const unsigned int uart_rx_ao_b0_pins[] = { PIN_GPIOAO_1 };
+static const unsigned int uart_tx_ao_b0_pins[] = { PIN(GPIOAO_0, AO_OFF) };
+static const unsigned int uart_rx_ao_b0_pins[] = { PIN(GPIOAO_1, AO_OFF) };
-static const unsigned int uart_tx_ao_b1_pins[] = { PIN_GPIOAO_4 };
-static const unsigned int uart_rx_ao_b1_pins[] = { PIN_GPIOAO_5 };
+static const unsigned int uart_tx_ao_b1_pins[] = { PIN(GPIOAO_4, AO_OFF) };
+static const unsigned int uart_rx_ao_b1_pins[] = { PIN(GPIOAO_5, AO_OFF) };
-static const unsigned int i2c_mst_sck_ao_pins[] = { PIN_GPIOAO_4 };
-static const unsigned int i2c_mst_sda_ao_pins[] = { PIN_GPIOAO_5 };
+static const unsigned int i2c_mst_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) };
+static const unsigned int i2c_mst_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) };
static struct meson_pmx_group meson8_groups[] = {
- GPIO_GROUP(GPIOX_0),
- GPIO_GROUP(GPIOX_1),
- GPIO_GROUP(GPIOX_2),
- GPIO_GROUP(GPIOX_3),
- GPIO_GROUP(GPIOX_4),
- GPIO_GROUP(GPIOX_5),
- GPIO_GROUP(GPIOX_6),
- GPIO_GROUP(GPIOX_7),
- GPIO_GROUP(GPIOX_8),
- GPIO_GROUP(GPIOX_9),
- GPIO_GROUP(GPIOX_10),
- GPIO_GROUP(GPIOX_11),
- GPIO_GROUP(GPIOX_12),
- GPIO_GROUP(GPIOX_13),
- GPIO_GROUP(GPIOX_14),
- GPIO_GROUP(GPIOX_15),
- GPIO_GROUP(GPIOX_16),
- GPIO_GROUP(GPIOX_17),
- GPIO_GROUP(GPIOX_18),
- GPIO_GROUP(GPIOX_19),
- GPIO_GROUP(GPIOX_20),
- GPIO_GROUP(GPIOX_21),
- GPIO_GROUP(GPIOY_0),
- GPIO_GROUP(GPIOY_1),
- GPIO_GROUP(GPIOY_2),
- GPIO_GROUP(GPIOY_3),
- GPIO_GROUP(GPIOY_4),
- GPIO_GROUP(GPIOY_5),
- GPIO_GROUP(GPIOY_6),
- GPIO_GROUP(GPIOY_7),
- GPIO_GROUP(GPIOY_8),
- GPIO_GROUP(GPIOY_9),
- GPIO_GROUP(GPIOY_10),
- GPIO_GROUP(GPIOY_11),
- GPIO_GROUP(GPIOY_12),
- GPIO_GROUP(GPIOY_13),
- GPIO_GROUP(GPIOY_14),
- GPIO_GROUP(GPIOY_15),
- GPIO_GROUP(GPIOY_16),
- GPIO_GROUP(GPIODV_0),
- GPIO_GROUP(GPIODV_1),
- GPIO_GROUP(GPIODV_2),
- GPIO_GROUP(GPIODV_3),
- GPIO_GROUP(GPIODV_4),
- GPIO_GROUP(GPIODV_5),
- GPIO_GROUP(GPIODV_6),
- GPIO_GROUP(GPIODV_7),
- GPIO_GROUP(GPIODV_8),
- GPIO_GROUP(GPIODV_9),
- GPIO_GROUP(GPIODV_10),
- GPIO_GROUP(GPIODV_11),
- GPIO_GROUP(GPIODV_12),
- GPIO_GROUP(GPIODV_13),
- GPIO_GROUP(GPIODV_14),
- GPIO_GROUP(GPIODV_15),
- GPIO_GROUP(GPIODV_16),
- GPIO_GROUP(GPIODV_17),
- GPIO_GROUP(GPIODV_18),
- GPIO_GROUP(GPIODV_19),
- GPIO_GROUP(GPIODV_20),
- GPIO_GROUP(GPIODV_21),
- GPIO_GROUP(GPIODV_22),
- GPIO_GROUP(GPIODV_23),
- GPIO_GROUP(GPIODV_24),
- GPIO_GROUP(GPIODV_25),
- GPIO_GROUP(GPIODV_26),
- GPIO_GROUP(GPIODV_27),
- GPIO_GROUP(GPIODV_28),
- GPIO_GROUP(GPIODV_29),
- GPIO_GROUP(GPIOH_0),
- GPIO_GROUP(GPIOH_1),
- GPIO_GROUP(GPIOH_2),
- GPIO_GROUP(GPIOH_3),
- GPIO_GROUP(GPIOH_4),
- GPIO_GROUP(GPIOH_5),
- GPIO_GROUP(GPIOH_6),
- GPIO_GROUP(GPIOH_7),
- GPIO_GROUP(GPIOH_8),
- GPIO_GROUP(GPIOH_9),
- GPIO_GROUP(GPIOZ_0),
- GPIO_GROUP(GPIOZ_1),
- GPIO_GROUP(GPIOZ_2),
- GPIO_GROUP(GPIOZ_3),
- GPIO_GROUP(GPIOZ_4),
- GPIO_GROUP(GPIOZ_5),
- GPIO_GROUP(GPIOZ_6),
- GPIO_GROUP(GPIOZ_7),
- GPIO_GROUP(GPIOZ_8),
- GPIO_GROUP(GPIOZ_9),
- GPIO_GROUP(GPIOZ_10),
- GPIO_GROUP(GPIOZ_11),
- GPIO_GROUP(GPIOZ_12),
- GPIO_GROUP(GPIOZ_13),
- GPIO_GROUP(GPIOZ_14),
- GPIO_GROUP(GPIOAO_0),
- GPIO_GROUP(GPIOAO_1),
- GPIO_GROUP(GPIOAO_2),
- GPIO_GROUP(GPIOAO_3),
- GPIO_GROUP(GPIOAO_4),
- GPIO_GROUP(GPIOAO_5),
- GPIO_GROUP(GPIOAO_6),
- GPIO_GROUP(GPIOAO_7),
- GPIO_GROUP(GPIOAO_8),
- GPIO_GROUP(GPIOAO_9),
- GPIO_GROUP(GPIOAO_10),
- GPIO_GROUP(GPIOAO_11),
- GPIO_GROUP(GPIOAO_12),
- GPIO_GROUP(GPIOAO_13),
- GPIO_GROUP(GPIO_BSD_EN),
- GPIO_GROUP(GPIO_TEST_N),
+ GPIO_GROUP(GPIOX_0, 0),
+ GPIO_GROUP(GPIOX_1, 0),
+ GPIO_GROUP(GPIOX_2, 0),
+ GPIO_GROUP(GPIOX_3, 0),
+ GPIO_GROUP(GPIOX_4, 0),
+ GPIO_GROUP(GPIOX_5, 0),
+ GPIO_GROUP(GPIOX_6, 0),
+ GPIO_GROUP(GPIOX_7, 0),
+ GPIO_GROUP(GPIOX_8, 0),
+ GPIO_GROUP(GPIOX_9, 0),
+ GPIO_GROUP(GPIOX_10, 0),
+ GPIO_GROUP(GPIOX_11, 0),
+ GPIO_GROUP(GPIOX_12, 0),
+ GPIO_GROUP(GPIOX_13, 0),
+ GPIO_GROUP(GPIOX_14, 0),
+ GPIO_GROUP(GPIOX_15, 0),
+ GPIO_GROUP(GPIOX_16, 0),
+ GPIO_GROUP(GPIOX_17, 0),
+ GPIO_GROUP(GPIOX_18, 0),
+ GPIO_GROUP(GPIOX_19, 0),
+ GPIO_GROUP(GPIOX_20, 0),
+ GPIO_GROUP(GPIOX_21, 0),
+ GPIO_GROUP(GPIOY_0, 0),
+ GPIO_GROUP(GPIOY_1, 0),
+ GPIO_GROUP(GPIOY_2, 0),
+ GPIO_GROUP(GPIOY_3, 0),
+ GPIO_GROUP(GPIOY_4, 0),
+ GPIO_GROUP(GPIOY_5, 0),
+ GPIO_GROUP(GPIOY_6, 0),
+ GPIO_GROUP(GPIOY_7, 0),
+ GPIO_GROUP(GPIOY_8, 0),
+ GPIO_GROUP(GPIOY_9, 0),
+ GPIO_GROUP(GPIOY_10, 0),
+ GPIO_GROUP(GPIOY_11, 0),
+ GPIO_GROUP(GPIOY_12, 0),
+ GPIO_GROUP(GPIOY_13, 0),
+ GPIO_GROUP(GPIOY_14, 0),
+ GPIO_GROUP(GPIOY_15, 0),
+ GPIO_GROUP(GPIOY_16, 0),
+ GPIO_GROUP(GPIODV_0, 0),
+ GPIO_GROUP(GPIODV_1, 0),
+ GPIO_GROUP(GPIODV_2, 0),
+ GPIO_GROUP(GPIODV_3, 0),
+ GPIO_GROUP(GPIODV_4, 0),
+ GPIO_GROUP(GPIODV_5, 0),
+ GPIO_GROUP(GPIODV_6, 0),
+ GPIO_GROUP(GPIODV_7, 0),
+ GPIO_GROUP(GPIODV_8, 0),
+ GPIO_GROUP(GPIODV_9, 0),
+ GPIO_GROUP(GPIODV_10, 0),
+ GPIO_GROUP(GPIODV_11, 0),
+ GPIO_GROUP(GPIODV_12, 0),
+ GPIO_GROUP(GPIODV_13, 0),
+ GPIO_GROUP(GPIODV_14, 0),
+ GPIO_GROUP(GPIODV_15, 0),
+ GPIO_GROUP(GPIODV_16, 0),
+ GPIO_GROUP(GPIODV_17, 0),
+ GPIO_GROUP(GPIODV_18, 0),
+ GPIO_GROUP(GPIODV_19, 0),
+ GPIO_GROUP(GPIODV_20, 0),
+ GPIO_GROUP(GPIODV_21, 0),
+ GPIO_GROUP(GPIODV_22, 0),
+ GPIO_GROUP(GPIODV_23, 0),
+ GPIO_GROUP(GPIODV_24, 0),
+ GPIO_GROUP(GPIODV_25, 0),
+ GPIO_GROUP(GPIODV_26, 0),
+ GPIO_GROUP(GPIODV_27, 0),
+ GPIO_GROUP(GPIODV_28, 0),
+ GPIO_GROUP(GPIODV_29, 0),
+ GPIO_GROUP(GPIOH_0, 0),
+ GPIO_GROUP(GPIOH_1, 0),
+ GPIO_GROUP(GPIOH_2, 0),
+ GPIO_GROUP(GPIOH_3, 0),
+ GPIO_GROUP(GPIOH_4, 0),
+ GPIO_GROUP(GPIOH_5, 0),
+ GPIO_GROUP(GPIOH_6, 0),
+ GPIO_GROUP(GPIOH_7, 0),
+ GPIO_GROUP(GPIOH_8, 0),
+ GPIO_GROUP(GPIOH_9, 0),
+ GPIO_GROUP(GPIOZ_0, 0),
+ GPIO_GROUP(GPIOZ_1, 0),
+ GPIO_GROUP(GPIOZ_2, 0),
+ GPIO_GROUP(GPIOZ_3, 0),
+ GPIO_GROUP(GPIOZ_4, 0),
+ GPIO_GROUP(GPIOZ_5, 0),
+ GPIO_GROUP(GPIOZ_6, 0),
+ GPIO_GROUP(GPIOZ_7, 0),
+ GPIO_GROUP(GPIOZ_8, 0),
+ GPIO_GROUP(GPIOZ_9, 0),
+ GPIO_GROUP(GPIOZ_10, 0),
+ GPIO_GROUP(GPIOZ_11, 0),
+ GPIO_GROUP(GPIOZ_12, 0),
+ GPIO_GROUP(GPIOZ_13, 0),
+ GPIO_GROUP(GPIOZ_14, 0),
+ GPIO_GROUP(GPIOAO_0, AO_OFF),
+ GPIO_GROUP(GPIOAO_1, AO_OFF),
+ GPIO_GROUP(GPIOAO_2, AO_OFF),
+ GPIO_GROUP(GPIOAO_3, AO_OFF),
+ GPIO_GROUP(GPIOAO_4, AO_OFF),
+ GPIO_GROUP(GPIOAO_5, AO_OFF),
+ GPIO_GROUP(GPIOAO_6, AO_OFF),
+ GPIO_GROUP(GPIOAO_7, AO_OFF),
+ GPIO_GROUP(GPIOAO_8, AO_OFF),
+ GPIO_GROUP(GPIOAO_9, AO_OFF),
+ GPIO_GROUP(GPIOAO_10, AO_OFF),
+ GPIO_GROUP(GPIOAO_11, AO_OFF),
+ GPIO_GROUP(GPIOAO_12, AO_OFF),
+ GPIO_GROUP(GPIOAO_13, AO_OFF),
+ GPIO_GROUP(GPIO_BSD_EN, AO_OFF),
+ GPIO_GROUP(GPIO_TEST_N, AO_OFF),
/* bank X */
GROUP(sd_d0_a, 8, 5),
};
static struct meson_bank meson8_banks[] = {
- /* name first last pullen pull dir out in */
- BANK("X", PIN_GPIOX_0, PIN_GPIOX_21, 4, 0, 4, 0, 0, 0, 1, 0, 2, 0),
- BANK("Y", PIN_GPIOY_0, PIN_GPIOY_16, 3, 0, 3, 0, 3, 0, 4, 0, 5, 0),
- BANK("DV", PIN_GPIODV_0, PIN_GPIODV_29, 0, 0, 0, 0, 7, 0, 8, 0, 9, 0),
- BANK("H", PIN_GPIOH_0, PIN_GPIOH_9, 1, 16, 1, 16, 9, 19, 10, 19, 11, 19),
- BANK("Z", PIN_GPIOZ_0, PIN_GPIOZ_14, 1, 0, 1, 0, 3, 17, 4, 17, 5, 17),
- BANK("CARD", PIN_CARD_0, PIN_CARD_6, 2, 20, 2, 20, 0, 22, 1, 22, 2, 22),
- BANK("BOOT", PIN_BOOT_0, PIN_BOOT_18, 2, 0, 2, 0, 9, 0, 10, 0, 11, 0),
+ /* name first last pullen pull dir out in */
+ BANK("X", PIN(GPIOX_0, 0), PIN(GPIOX_21, 0), 4, 0, 4, 0, 0, 0, 1, 0, 2, 0),
+ BANK("Y", PIN(GPIOY_0, 0), PIN(GPIOY_16, 0), 3, 0, 3, 0, 3, 0, 4, 0, 5, 0),
+ BANK("DV", PIN(GPIODV_0, 0), PIN(GPIODV_29, 0), 0, 0, 0, 0, 7, 0, 8, 0, 9, 0),
+ BANK("H", PIN(GPIOH_0, 0), PIN(GPIOH_9, 0), 1, 16, 1, 16, 9, 19, 10, 19, 11, 19),
+ BANK("Z", PIN(GPIOZ_0, 0), PIN(GPIOZ_14, 0), 1, 0, 1, 0, 3, 17, 4, 17, 5, 17),
+ BANK("CARD", PIN(CARD_0, 0), PIN(CARD_6, 0), 2, 20, 2, 20, 0, 22, 1, 22, 2, 22),
+ BANK("BOOT", PIN(BOOT_0, 0), PIN(BOOT_18, 0), 2, 0, 2, 0, 9, 0, 10, 0, 11, 0),
};
static struct meson_bank meson8_ao_banks[] = {
- /* name first last pullen pull dir out in */
- BANK("AO", PIN_GPIOAO_0, PIN_GPIO_TEST_N, 0, 0, 0, 16, 0, 0, 0, 16, 1, 0),
+ /* name first last pullen pull dir out in */
+ BANK("AO", PIN(GPIOAO_0, AO_OFF), PIN(GPIO_TEST_N, AO_OFF), 0, 0, 0, 16, 0, 0, 0, 16, 1, 0),
};
static struct meson_domain_data meson8_domain_data[] = {
--- /dev/null
+/*
+ * Pin controller and GPIO driver for Amlogic Meson8b.
+ *
+ * Copyright (C) 2015 Endless Mobile, Inc.
+ * Author: Carlo Caione <carlo@endlessm.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <dt-bindings/gpio/meson8b-gpio.h>
+#include "pinctrl-meson.h"
+
+#define AO_OFF 130
+
+static const struct pinctrl_pin_desc meson8b_pins[] = {
+ MESON_PIN(GPIOX_0, 0),
+ MESON_PIN(GPIOX_1, 0),
+ MESON_PIN(GPIOX_2, 0),
+ MESON_PIN(GPIOX_3, 0),
+ MESON_PIN(GPIOX_4, 0),
+ MESON_PIN(GPIOX_5, 0),
+ MESON_PIN(GPIOX_6, 0),
+ MESON_PIN(GPIOX_7, 0),
+ MESON_PIN(GPIOX_8, 0),
+ MESON_PIN(GPIOX_9, 0),
+ MESON_PIN(GPIOX_10, 0),
+ MESON_PIN(GPIOX_11, 0),
+ MESON_PIN(GPIOX_16, 0),
+ MESON_PIN(GPIOX_17, 0),
+ MESON_PIN(GPIOX_18, 0),
+ MESON_PIN(GPIOX_19, 0),
+ MESON_PIN(GPIOX_20, 0),
+ MESON_PIN(GPIOX_21, 0),
+
+ MESON_PIN(GPIOY_0, 0),
+ MESON_PIN(GPIOY_1, 0),
+ MESON_PIN(GPIOY_3, 0),
+ MESON_PIN(GPIOY_6, 0),
+ MESON_PIN(GPIOY_7, 0),
+ MESON_PIN(GPIOY_8, 0),
+ MESON_PIN(GPIOY_9, 0),
+ MESON_PIN(GPIOY_10, 0),
+ MESON_PIN(GPIOY_11, 0),
+ MESON_PIN(GPIOY_12, 0),
+ MESON_PIN(GPIOY_13, 0),
+ MESON_PIN(GPIOY_14, 0),
+
+ MESON_PIN(GPIODV_9, 0),
+ MESON_PIN(GPIODV_24, 0),
+ MESON_PIN(GPIODV_25, 0),
+ MESON_PIN(GPIODV_26, 0),
+ MESON_PIN(GPIODV_27, 0),
+ MESON_PIN(GPIODV_28, 0),
+ MESON_PIN(GPIODV_29, 0),
+
+ MESON_PIN(GPIOH_0, 0),
+ MESON_PIN(GPIOH_1, 0),
+ MESON_PIN(GPIOH_2, 0),
+ MESON_PIN(GPIOH_3, 0),
+ MESON_PIN(GPIOH_4, 0),
+ MESON_PIN(GPIOH_5, 0),
+ MESON_PIN(GPIOH_6, 0),
+ MESON_PIN(GPIOH_7, 0),
+ MESON_PIN(GPIOH_8, 0),
+ MESON_PIN(GPIOH_9, 0),
+
+ MESON_PIN(CARD_0, 0),
+ MESON_PIN(CARD_1, 0),
+ MESON_PIN(CARD_2, 0),
+ MESON_PIN(CARD_3, 0),
+ MESON_PIN(CARD_4, 0),
+ MESON_PIN(CARD_5, 0),
+ MESON_PIN(CARD_6, 0),
+
+ MESON_PIN(BOOT_0, 0),
+ MESON_PIN(BOOT_1, 0),
+ MESON_PIN(BOOT_2, 0),
+ MESON_PIN(BOOT_3, 0),
+ MESON_PIN(BOOT_4, 0),
+ MESON_PIN(BOOT_5, 0),
+ MESON_PIN(BOOT_6, 0),
+ MESON_PIN(BOOT_7, 0),
+ MESON_PIN(BOOT_8, 0),
+ MESON_PIN(BOOT_9, 0),
+ MESON_PIN(BOOT_10, 0),
+ MESON_PIN(BOOT_11, 0),
+ MESON_PIN(BOOT_12, 0),
+ MESON_PIN(BOOT_13, 0),
+ MESON_PIN(BOOT_14, 0),
+ MESON_PIN(BOOT_15, 0),
+ MESON_PIN(BOOT_16, 0),
+ MESON_PIN(BOOT_17, 0),
+ MESON_PIN(BOOT_18, 0),
+
+ MESON_PIN(DIF_0_P, 0),
+ MESON_PIN(DIF_0_N, 0),
+ MESON_PIN(DIF_1_P, 0),
+ MESON_PIN(DIF_1_N, 0),
+ MESON_PIN(DIF_2_P, 0),
+ MESON_PIN(DIF_2_N, 0),
+ MESON_PIN(DIF_3_P, 0),
+ MESON_PIN(DIF_3_N, 0),
+ MESON_PIN(DIF_4_P, 0),
+ MESON_PIN(DIF_4_N, 0),
+
+ MESON_PIN(GPIOAO_0, AO_OFF),
+ MESON_PIN(GPIOAO_1, AO_OFF),
+ MESON_PIN(GPIOAO_2, AO_OFF),
+ MESON_PIN(GPIOAO_3, AO_OFF),
+ MESON_PIN(GPIOAO_4, AO_OFF),
+ MESON_PIN(GPIOAO_5, AO_OFF),
+ MESON_PIN(GPIOAO_6, AO_OFF),
+ MESON_PIN(GPIOAO_7, AO_OFF),
+ MESON_PIN(GPIOAO_8, AO_OFF),
+ MESON_PIN(GPIOAO_9, AO_OFF),
+ MESON_PIN(GPIOAO_10, AO_OFF),
+ MESON_PIN(GPIOAO_11, AO_OFF),
+ MESON_PIN(GPIOAO_12, AO_OFF),
+ MESON_PIN(GPIOAO_13, AO_OFF),
+ MESON_PIN(GPIO_BSD_EN, AO_OFF),
+ MESON_PIN(GPIO_TEST_N, AO_OFF),
+};
+
+/* bank X */
+static const unsigned int sd_d0_a_pins[] = { PIN(GPIOX_0, 0) };
+static const unsigned int sd_d1_a_pins[] = { PIN(GPIOX_1, 0) };
+static const unsigned int sd_d2_a_pins[] = { PIN(GPIOX_2, 0) };
+static const unsigned int sd_d3_a_pins[] = { PIN(GPIOX_3, 0) };
+static const unsigned int sdxc_d0_0_a_pins[] = { PIN(GPIOX_4, 0) };
+static const unsigned int sdxc_d47_a_pins[] = { PIN(GPIOX_4, 0), PIN(GPIOX_5, 0),
+ PIN(GPIOX_6, 0), PIN(GPIOX_7, 0) };
+static const unsigned int sdxc_d13_0_a_pins[] = { PIN(GPIOX_5, 0), PIN(GPIOX_6, 0),
+ PIN(GPIOX_7, 0) };
+static const unsigned int sd_clk_a_pins[] = { PIN(GPIOX_8, 0) };
+static const unsigned int sd_cmd_a_pins[] = { PIN(GPIOX_9, 0) };
+static const unsigned int xtal_32k_out_pins[] = { PIN(GPIOX_10, 0) };
+static const unsigned int xtal_24m_out_pins[] = { PIN(GPIOX_11, 0) };
+static const unsigned int uart_tx_b0_pins[] = { PIN(GPIOX_16, 0) };
+static const unsigned int uart_rx_b0_pins[] = { PIN(GPIOX_17, 0) };
+static const unsigned int uart_cts_b0_pins[] = { PIN(GPIOX_18, 0) };
+static const unsigned int uart_rts_b0_pins[] = { PIN(GPIOX_19, 0) };
+
+static const unsigned int sdxc_d0_1_a_pins[] = { PIN(GPIOX_0, 0) };
+static const unsigned int sdxc_d13_1_a_pins[] = { PIN(GPIOX_1, 0), PIN(GPIOX_2, 0),
+ PIN(GPIOX_3, 0) };
+static const unsigned int pcm_out_a_pins[] = { PIN(GPIOX_4, 0) };
+static const unsigned int pcm_in_a_pins[] = { PIN(GPIOX_5, 0) };
+static const unsigned int pcm_fs_a_pins[] = { PIN(GPIOX_6, 0) };
+static const unsigned int pcm_clk_a_pins[] = { PIN(GPIOX_7, 0) };
+static const unsigned int sdxc_clk_a_pins[] = { PIN(GPIOX_8, 0) };
+static const unsigned int sdxc_cmd_a_pins[] = { PIN(GPIOX_9, 0) };
+static const unsigned int pwm_vs_0_pins[] = { PIN(GPIOX_10, 0) };
+static const unsigned int pwm_e_pins[] = { PIN(GPIOX_10, 0) };
+static const unsigned int pwm_vs_1_pins[] = { PIN(GPIOX_11, 0) };
+
+static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_4, 0) };
+static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_5, 0) };
+static const unsigned int uart_cts_a_pins[] = { PIN(GPIOX_6, 0) };
+static const unsigned int uart_rts_a_pins[] = { PIN(GPIOX_7, 0) };
+static const unsigned int uart_tx_b1_pins[] = { PIN(GPIOX_8, 0) };
+static const unsigned int uart_rx_b1_pins[] = { PIN(GPIOX_9, 0) };
+static const unsigned int uart_cts_b1_pins[] = { PIN(GPIOX_10, 0) };
+static const unsigned int uart_rts_b1_pins[] = { PIN(GPIOX_20, 0) };
+
+static const unsigned int iso7816_0_clk_pins[] = { PIN(GPIOX_6, 0) };
+static const unsigned int iso7816_0_data_pins[] = { PIN(GPIOX_7, 0) };
+static const unsigned int spi_sclk_0_pins[] = { PIN(GPIOX_8, 0) };
+static const unsigned int spi_miso_0_pins[] = { PIN(GPIOX_9, 0) };
+static const unsigned int spi_mosi_0_pins[] = { PIN(GPIOX_10, 0) };
+static const unsigned int iso7816_det_pins[] = { PIN(GPIOX_16, 0) };
+static const unsigned int iso7816_reset_pins[] = { PIN(GPIOX_17, 0) };
+static const unsigned int iso7816_1_clk_pins[] = { PIN(GPIOX_18, 0) };
+static const unsigned int iso7816_1_data_pins[] = { PIN(GPIOX_19, 0) };
+static const unsigned int spi_ss0_0_pins[] = { PIN(GPIOX_20, 0) };
+
+static const unsigned int tsin_clk_b_pins[] = { PIN(GPIOX_8, 0) };
+static const unsigned int tsin_sop_b_pins[] = { PIN(GPIOX_9, 0) };
+static const unsigned int tsin_d0_b_pins[] = { PIN(GPIOX_10, 0) };
+static const unsigned int pwm_b_pins[] = { PIN(GPIOX_11, 0) };
+static const unsigned int i2c_sda_d0_pins[] = { PIN(GPIOX_16, 0) };
+static const unsigned int i2c_sck_d0_pins[] = { PIN(GPIOX_17, 0) };
+static const unsigned int tsin_d_valid_b_pins[] = { PIN(GPIOX_20, 0) };
+
+/* bank Y */
+static const unsigned int tsin_d_valid_a_pins[] = { PIN(GPIOY_0, 0) };
+static const unsigned int tsin_sop_a_pins[] = { PIN(GPIOY_1, 0) };
+static const unsigned int tsin_d17_a_pins[] = { PIN(GPIOY_6, 0), PIN(GPIOY_7, 0),
+ PIN(GPIOY_10, 0), PIN(GPIOY_11, 0),
+ PIN(GPIOY_12, 0), PIN(GPIOY_13, 0),
+ PIN(GPIOY_14, 0) };
+static const unsigned int tsin_clk_a_pins[] = { PIN(GPIOY_8, 0) };
+static const unsigned int tsin_d0_a_pins[] = { PIN(GPIOY_9, 0) };
+
+static const unsigned int spdif_out_0_pins[] = { PIN(GPIOY_3, 0) };
+
+static const unsigned int xtal_24m_pins[] = { PIN(GPIOY_3, 0) };
+static const unsigned int iso7816_2_clk_pins[] = { PIN(GPIOY_13, 0) };
+static const unsigned int iso7816_2_data_pins[] = { PIN(GPIOY_14, 0) };
+
+/* bank DV */
+static const unsigned int pwm_d_pins[] = { PIN(GPIODV_28, 0) };
+static const unsigned int pwm_c0_pins[] = { PIN(GPIODV_29, 0) };
+
+static const unsigned int pwm_vs_2_pins[] = { PIN(GPIODV_9, 0) };
+static const unsigned int pwm_vs_3_pins[] = { PIN(GPIODV_28, 0) };
+static const unsigned int pwm_vs_4_pins[] = { PIN(GPIODV_29, 0) };
+
+static const unsigned int xtal24_out_pins[] = { PIN(GPIODV_29, 0) };
+
+static const unsigned int uart_tx_c_pins[] = { PIN(GPIODV_24, 0) };
+static const unsigned int uart_rx_c_pins[] = { PIN(GPIODV_25, 0) };
+static const unsigned int uart_cts_c_pins[] = { PIN(GPIODV_26, 0) };
+static const unsigned int uart_rts_c_pins[] = { PIN(GPIODV_27, 0) };
+
+static const unsigned int pwm_c1_pins[] = { PIN(GPIODV_9, 0) };
+
+static const unsigned int i2c_sda_a_pins[] = { PIN(GPIODV_24, 0) };
+static const unsigned int i2c_sck_a_pins[] = { PIN(GPIODV_25, 0) };
+static const unsigned int i2c_sda_b0_pins[] = { PIN(GPIODV_26, 0) };
+static const unsigned int i2c_sck_b0_pins[] = { PIN(GPIODV_27, 0) };
+static const unsigned int i2c_sda_c0_pins[] = { PIN(GPIODV_28, 0) };
+static const unsigned int i2c_sck_c0_pins[] = { PIN(GPIODV_29, 0) };
+
+/* bank H */
+static const unsigned int hdmi_hpd_pins[] = { PIN(GPIOH_0, 0) };
+static const unsigned int hdmi_sda_pins[] = { PIN(GPIOH_1, 0) };
+static const unsigned int hdmi_scl_pins[] = { PIN(GPIOH_2, 0) };
+static const unsigned int hdmi_cec_0_pins[] = { PIN(GPIOH_3, 0) };
+static const unsigned int eth_txd1_0_pins[] = { PIN(GPIOH_5, 0) };
+static const unsigned int eth_txd0_0_pins[] = { PIN(GPIOH_6, 0) };
+static const unsigned int clk_24m_out_pins[] = { PIN(GPIOH_9, 0) };
+
+static const unsigned int spi_ss1_pins[] = { PIN(GPIOH_0, 0) };
+static const unsigned int spi_ss2_pins[] = { PIN(GPIOH_1, 0) };
+static const unsigned int spi_ss0_1_pins[] = { PIN(GPIOH_3, 0) };
+static const unsigned int spi_miso_1_pins[] = { PIN(GPIOH_4, 0) };
+static const unsigned int spi_mosi_1_pins[] = { PIN(GPIOH_5, 0) };
+static const unsigned int spi_sclk_1_pins[] = { PIN(GPIOH_6, 0) };
+
+static const unsigned int eth_txd3_pins[] = { PIN(GPIOH_7, 0) };
+static const unsigned int eth_txd2_pins[] = { PIN(GPIOH_8, 0) };
+static const unsigned int eth_tx_clk_pins[] = { PIN(GPIOH_9, 0) };
+
+static const unsigned int i2c_sda_b1_pins[] = { PIN(GPIOH_3, 0) };
+static const unsigned int i2c_sck_b1_pins[] = { PIN(GPIOH_4, 0) };
+static const unsigned int i2c_sda_c1_pins[] = { PIN(GPIOH_5, 0) };
+static const unsigned int i2c_sck_c1_pins[] = { PIN(GPIOH_6, 0) };
+static const unsigned int i2c_sda_d1_pins[] = { PIN(GPIOH_7, 0) };
+static const unsigned int i2c_sck_d1_pins[] = { PIN(GPIOH_8, 0) };
+
+/* bank BOOT */
+static const unsigned int nand_io_pins[] = { PIN(BOOT_0, 0), PIN(BOOT_1, 0),
+ PIN(BOOT_2, 0), PIN(BOOT_3, 0),
+ PIN(BOOT_4, 0), PIN(BOOT_5, 0),
+ PIN(BOOT_6, 0), PIN(BOOT_7, 0) };
+static const unsigned int nand_io_ce0_pins[] = { PIN(BOOT_8, 0) };
+static const unsigned int nand_io_ce1_pins[] = { PIN(BOOT_9, 0) };
+static const unsigned int nand_io_rb0_pins[] = { PIN(BOOT_10, 0) };
+static const unsigned int nand_ale_pins[] = { PIN(BOOT_11, 0) };
+static const unsigned int nand_cle_pins[] = { PIN(BOOT_12, 0) };
+static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_13, 0) };
+static const unsigned int nand_ren_clk_pins[] = { PIN(BOOT_14, 0) };
+static const unsigned int nand_dqs_0_pins[] = { PIN(BOOT_15, 0) };
+static const unsigned int nand_dqs_1_pins[] = { PIN(BOOT_18, 0) };
+
+static const unsigned int sdxc_d0_c_pins[] = { PIN(BOOT_0, 0)};
+static const unsigned int sdxc_d13_c_pins[] = { PIN(BOOT_1, 0), PIN(BOOT_2, 0),
+ PIN(BOOT_3, 0) };
+static const unsigned int sdxc_d47_c_pins[] = { PIN(BOOT_4, 0), PIN(BOOT_5, 0),
+ PIN(BOOT_6, 0), PIN(BOOT_7, 0) };
+static const unsigned int sdxc_clk_c_pins[] = { PIN(BOOT_8, 0) };
+static const unsigned int sdxc_cmd_c_pins[] = { PIN(BOOT_10, 0) };
+static const unsigned int nor_d_pins[] = { PIN(BOOT_11, 0) };
+static const unsigned int nor_q_pins[] = { PIN(BOOT_12, 0) };
+static const unsigned int nor_c_pins[] = { PIN(BOOT_13, 0) };
+static const unsigned int nor_cs_pins[] = { PIN(BOOT_18, 0) };
+
+static const unsigned int sd_d0_c_pins[] = { PIN(BOOT_0, 0) };
+static const unsigned int sd_d1_c_pins[] = { PIN(BOOT_1, 0) };
+static const unsigned int sd_d2_c_pins[] = { PIN(BOOT_2, 0) };
+static const unsigned int sd_d3_c_pins[] = { PIN(BOOT_3, 0) };
+static const unsigned int sd_cmd_c_pins[] = { PIN(BOOT_8, 0) };
+static const unsigned int sd_clk_c_pins[] = { PIN(BOOT_10, 0) };
+
+/* bank CARD */
+static const unsigned int sd_d1_b_pins[] = { PIN(CARD_0, 0) };
+static const unsigned int sd_d0_b_pins[] = { PIN(CARD_1, 0) };
+static const unsigned int sd_clk_b_pins[] = { PIN(CARD_2, 0) };
+static const unsigned int sd_cmd_b_pins[] = { PIN(CARD_3, 0) };
+static const unsigned int sd_d3_b_pins[] = { PIN(CARD_4, 0) };
+static const unsigned int sd_d2_b_pins[] = { PIN(CARD_5, 0) };
+
+static const unsigned int sdxc_d13_b_pins[] = { PIN(CARD_0, 0), PIN(CARD_4, 0),
+ PIN(CARD_5, 0) };
+static const unsigned int sdxc_d0_b_pins[] = { PIN(CARD_1, 0) };
+static const unsigned int sdxc_clk_b_pins[] = { PIN(CARD_2, 0) };
+static const unsigned int sdxc_cmd_b_pins[] = { PIN(CARD_3, 0) };
+
+/* bank AO */
+static const unsigned int uart_tx_ao_a_pins[] = { PIN(GPIOAO_0, AO_OFF) };
+static const unsigned int uart_rx_ao_a_pins[] = { PIN(GPIOAO_1, AO_OFF) };
+static const unsigned int uart_cts_ao_a_pins[] = { PIN(GPIOAO_2, AO_OFF) };
+static const unsigned int uart_rts_ao_a_pins[] = { PIN(GPIOAO_3, AO_OFF) };
+static const unsigned int i2c_mst_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) };
+static const unsigned int i2c_mst_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) };
+static const unsigned int clk_32k_in_out_pins[] = { PIN(GPIOAO_6, AO_OFF) };
+static const unsigned int remote_input_pins[] = { PIN(GPIOAO_7, AO_OFF) };
+static const unsigned int hdmi_cec_1_pins[] = { PIN(GPIOAO_12, AO_OFF) };
+static const unsigned int ir_blaster_pins[] = { PIN(GPIOAO_13, AO_OFF) };
+
+static const unsigned int pwm_c2_pins[] = { PIN(GPIOAO_3, AO_OFF) };
+static const unsigned int i2c_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) };
+static const unsigned int i2c_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) };
+static const unsigned int ir_remote_out_pins[] = { PIN(GPIOAO_7, AO_OFF) };
+static const unsigned int i2s_am_clk_out_pins[] = { PIN(GPIOAO_8, AO_OFF) };
+static const unsigned int i2s_ao_clk_out_pins[] = { PIN(GPIOAO_9, AO_OFF) };
+static const unsigned int i2s_lr_clk_out_pins[] = { PIN(GPIOAO_10, AO_OFF) };
+static const unsigned int i2s_out_01_pins[] = { PIN(GPIOAO_11, AO_OFF) };
+
+static const unsigned int uart_tx_ao_b0_pins[] = { PIN(GPIOAO_0, AO_OFF) };
+static const unsigned int uart_rx_ao_b0_pins[] = { PIN(GPIOAO_1, AO_OFF) };
+static const unsigned int uart_cts_ao_b_pins[] = { PIN(GPIOAO_2, AO_OFF) };
+static const unsigned int uart_rts_ao_b_pins[] = { PIN(GPIOAO_3, AO_OFF) };
+static const unsigned int uart_tx_ao_b1_pins[] = { PIN(GPIOAO_4, AO_OFF) };
+static const unsigned int uart_rx_ao_b1_pins[] = { PIN(GPIOAO_5, AO_OFF) };
+static const unsigned int spdif_out_1_pins[] = { PIN(GPIOAO_6, AO_OFF) };
+
+static const unsigned int i2s_in_ch01_pins[] = { PIN(GPIOAO_6, AO_OFF) };
+static const unsigned int i2s_ao_clk_in_pins[] = { PIN(GPIOAO_9, AO_OFF) };
+static const unsigned int i2s_lr_clk_in_pins[] = { PIN(GPIOAO_10, AO_OFF) };
+
+/* bank DIF */
+static const unsigned int eth_rxd1_pins[] = { PIN(DIF_0_P, 0) };
+static const unsigned int eth_rxd0_pins[] = { PIN(DIF_0_N, 0) };
+static const unsigned int eth_rx_dv_pins[] = { PIN(DIF_1_P, 0) };
+static const unsigned int eth_rx_clk_pins[] = { PIN(DIF_1_N, 0) };
+static const unsigned int eth_txd0_1_pins[] = { PIN(DIF_2_P, 0) };
+static const unsigned int eth_txd1_1_pins[] = { PIN(DIF_2_N, 0) };
+static const unsigned int eth_tx_en_pins[] = { PIN(DIF_3_P, 0) };
+static const unsigned int eth_ref_clk_pins[] = { PIN(DIF_3_N, 0) };
+static const unsigned int eth_mdc_pins[] = { PIN(DIF_4_P, 0) };
+static const unsigned int eth_mdio_en_pins[] = { PIN(DIF_4_N, 0) };
+
+static struct meson_pmx_group meson8b_groups[] = {
+ GPIO_GROUP(GPIOX_0, 0),
+ GPIO_GROUP(GPIOX_1, 0),
+ GPIO_GROUP(GPIOX_2, 0),
+ GPIO_GROUP(GPIOX_3, 0),
+ GPIO_GROUP(GPIOX_4, 0),
+ GPIO_GROUP(GPIOX_5, 0),
+ GPIO_GROUP(GPIOX_6, 0),
+ GPIO_GROUP(GPIOX_7, 0),
+ GPIO_GROUP(GPIOX_8, 0),
+ GPIO_GROUP(GPIOX_9, 0),
+ GPIO_GROUP(GPIOX_10, 0),
+ GPIO_GROUP(GPIOX_11, 0),
+ GPIO_GROUP(GPIOX_16, 0),
+ GPIO_GROUP(GPIOX_17, 0),
+ GPIO_GROUP(GPIOX_18, 0),
+ GPIO_GROUP(GPIOX_19, 0),
+ GPIO_GROUP(GPIOX_20, 0),
+ GPIO_GROUP(GPIOX_21, 0),
+
+ GPIO_GROUP(GPIOY_0, 0),
+ GPIO_GROUP(GPIOY_1, 0),
+ GPIO_GROUP(GPIOY_3, 0),
+ GPIO_GROUP(GPIOY_6, 0),
+ GPIO_GROUP(GPIOY_7, 0),
+ GPIO_GROUP(GPIOY_8, 0),
+ GPIO_GROUP(GPIOY_9, 0),
+ GPIO_GROUP(GPIOY_10, 0),
+ GPIO_GROUP(GPIOY_11, 0),
+ GPIO_GROUP(GPIOY_12, 0),
+ GPIO_GROUP(GPIOY_13, 0),
+ GPIO_GROUP(GPIOY_14, 0),
+
+ GPIO_GROUP(GPIODV_9, 0),
+ GPIO_GROUP(GPIODV_24, 0),
+ GPIO_GROUP(GPIODV_25, 0),
+ GPIO_GROUP(GPIODV_26, 0),
+ GPIO_GROUP(GPIODV_27, 0),
+ GPIO_GROUP(GPIODV_28, 0),
+ GPIO_GROUP(GPIODV_29, 0),
+
+ GPIO_GROUP(GPIOH_0, 0),
+ GPIO_GROUP(GPIOH_1, 0),
+ GPIO_GROUP(GPIOH_2, 0),
+ GPIO_GROUP(GPIOH_3, 0),
+ GPIO_GROUP(GPIOH_4, 0),
+ GPIO_GROUP(GPIOH_5, 0),
+ GPIO_GROUP(GPIOH_6, 0),
+ GPIO_GROUP(GPIOH_7, 0),
+ GPIO_GROUP(GPIOH_8, 0),
+ GPIO_GROUP(GPIOH_9, 0),
+
+ GPIO_GROUP(DIF_0_P, 0),
+ GPIO_GROUP(DIF_0_N, 0),
+ GPIO_GROUP(DIF_1_P, 0),
+ GPIO_GROUP(DIF_1_N, 0),
+ GPIO_GROUP(DIF_2_P, 0),
+ GPIO_GROUP(DIF_2_N, 0),
+ GPIO_GROUP(DIF_3_P, 0),
+ GPIO_GROUP(DIF_3_N, 0),
+ GPIO_GROUP(DIF_4_P, 0),
+ GPIO_GROUP(DIF_4_N, 0),
+
+ GPIO_GROUP(GPIOAO_0, AO_OFF),
+ GPIO_GROUP(GPIOAO_1, AO_OFF),
+ GPIO_GROUP(GPIOAO_2, AO_OFF),
+ GPIO_GROUP(GPIOAO_3, AO_OFF),
+ GPIO_GROUP(GPIOAO_4, AO_OFF),
+ GPIO_GROUP(GPIOAO_5, AO_OFF),
+ GPIO_GROUP(GPIOAO_6, AO_OFF),
+ GPIO_GROUP(GPIOAO_7, AO_OFF),
+ GPIO_GROUP(GPIOAO_8, AO_OFF),
+ GPIO_GROUP(GPIOAO_9, AO_OFF),
+ GPIO_GROUP(GPIOAO_10, AO_OFF),
+ GPIO_GROUP(GPIOAO_11, AO_OFF),
+ GPIO_GROUP(GPIOAO_12, AO_OFF),
+ GPIO_GROUP(GPIOAO_13, AO_OFF),
+ GPIO_GROUP(GPIO_BSD_EN, AO_OFF),
+ GPIO_GROUP(GPIO_TEST_N, AO_OFF),
+
+ /* bank X */
+ GROUP(sd_d0_a, 8, 5),
+ GROUP(sd_d1_a, 8, 4),
+ GROUP(sd_d2_a, 8, 3),
+ GROUP(sd_d3_a, 8, 2),
+ GROUP(sdxc_d0_0_a, 5, 29),
+ GROUP(sdxc_d47_a, 5, 12),
+ GROUP(sdxc_d13_0_a, 5, 28),
+ GROUP(sd_clk_a, 8, 1),
+ GROUP(sd_cmd_a, 8, 0),
+ GROUP(xtal_32k_out, 3, 22),
+ GROUP(xtal_24m_out, 3, 20),
+ GROUP(uart_tx_b0, 4, 9),
+ GROUP(uart_rx_b0, 4, 8),
+ GROUP(uart_cts_b0, 4, 7),
+ GROUP(uart_rts_b0, 4, 6),
+ GROUP(sdxc_d0_1_a, 5, 14),
+ GROUP(sdxc_d13_1_a, 5, 13),
+ GROUP(pcm_out_a, 3, 30),
+ GROUP(pcm_in_a, 3, 29),
+ GROUP(pcm_fs_a, 3, 28),
+ GROUP(pcm_clk_a, 3, 27),
+ GROUP(sdxc_clk_a, 5, 11),
+ GROUP(sdxc_cmd_a, 5, 10),
+ GROUP(pwm_vs_0, 7, 31),
+ GROUP(pwm_e, 9, 19),
+ GROUP(pwm_vs_1, 7, 30),
+ GROUP(uart_tx_a, 4, 17),
+ GROUP(uart_rx_a, 4, 16),
+ GROUP(uart_cts_a, 4, 15),
+ GROUP(uart_rts_a, 4, 14),
+ GROUP(uart_tx_b1, 6, 19),
+ GROUP(uart_rx_b1, 6, 18),
+ GROUP(uart_cts_b1, 6, 17),
+ GROUP(uart_rts_b1, 6, 16),
+ GROUP(iso7816_0_clk, 5, 9),
+ GROUP(iso7816_0_data, 5, 8),
+ GROUP(spi_sclk_0, 4, 22),
+ GROUP(spi_miso_0, 4, 24),
+ GROUP(spi_mosi_0, 4, 23),
+ GROUP(iso7816_det, 4, 21),
+ GROUP(iso7816_reset, 4, 20),
+ GROUP(iso7816_1_clk, 4, 19),
+ GROUP(iso7816_1_data, 4, 18),
+ GROUP(spi_ss0_0, 4, 25),
+ GROUP(tsin_clk_b, 3, 6),
+ GROUP(tsin_sop_b, 3, 7),
+ GROUP(tsin_d0_b, 3, 8),
+ GROUP(pwm_b, 2, 3),
+ GROUP(i2c_sda_d0, 4, 5),
+ GROUP(i2c_sck_d0, 4, 4),
+ GROUP(tsin_d_valid_b, 3, 9),
+
+ /* bank Y */
+ GROUP(tsin_d_valid_a, 3, 2),
+ GROUP(tsin_sop_a, 3, 1),
+ GROUP(tsin_d17_a, 3, 5),
+ GROUP(tsin_clk_a, 3, 0),
+ GROUP(tsin_d0_a, 3, 4),
+ GROUP(spdif_out_0, 1, 7),
+ GROUP(xtal_24m, 3, 18),
+ GROUP(iso7816_2_clk, 5, 7),
+ GROUP(iso7816_2_data, 5, 6),
+
+ /* bank DV */
+ GROUP(pwm_d, 3, 26),
+ GROUP(pwm_c0, 3, 25),
+ GROUP(pwm_vs_2, 7, 28),
+ GROUP(pwm_vs_3, 7, 27),
+ GROUP(pwm_vs_4, 7, 26),
+ GROUP(xtal24_out, 7, 25),
+ GROUP(uart_tx_c, 6, 23),
+ GROUP(uart_rx_c, 6, 22),
+ GROUP(uart_cts_c, 6, 21),
+ GROUP(uart_rts_c, 6, 20),
+ GROUP(pwm_c1, 3, 24),
+ GROUP(i2c_sda_a, 9, 31),
+ GROUP(i2c_sck_a, 9, 30),
+ GROUP(i2c_sda_b0, 9, 29),
+ GROUP(i2c_sck_b0, 9, 28),
+ GROUP(i2c_sda_c0, 9, 27),
+ GROUP(i2c_sck_c0, 9, 26),
+
+ /* bank H */
+ GROUP(hdmi_hpd, 1, 26),
+ GROUP(hdmi_sda, 1, 25),
+ GROUP(hdmi_scl, 1, 24),
+ GROUP(hdmi_cec_0, 1, 23),
+ GROUP(eth_txd1_0, 7, 21),
+ GROUP(eth_txd0_0, 7, 20),
+ GROUP(clk_24m_out, 4, 1),
+ GROUP(spi_ss1, 8, 11),
+ GROUP(spi_ss2, 8, 12),
+ GROUP(spi_ss0_1, 9, 13),
+ GROUP(spi_miso_1, 9, 12),
+ GROUP(spi_mosi_1, 9, 11),
+ GROUP(spi_sclk_1, 9, 10),
+ GROUP(eth_txd3, 6, 13),
+ GROUP(eth_txd2, 6, 12),
+ GROUP(eth_tx_clk, 6, 11),
+ GROUP(i2c_sda_b1, 5, 27),
+ GROUP(i2c_sck_b1, 5, 26),
+ GROUP(i2c_sda_c1, 5, 25),
+ GROUP(i2c_sck_c1, 5, 24),
+ GROUP(i2c_sda_d1, 4, 3),
+ GROUP(i2c_sck_d1, 4, 2),
+
+ /* bank BOOT */
+ GROUP(nand_io, 2, 26),
+ GROUP(nand_io_ce0, 2, 25),
+ GROUP(nand_io_ce1, 2, 24),
+ GROUP(nand_io_rb0, 2, 17),
+ GROUP(nand_ale, 2, 21),
+ GROUP(nand_cle, 2, 20),
+ GROUP(nand_wen_clk, 2, 19),
+ GROUP(nand_ren_clk, 2, 18),
+ GROUP(nand_dqs_0, 2, 27),
+ GROUP(nand_dqs_1, 2, 28),
+ GROUP(sdxc_d0_c, 4, 30),
+ GROUP(sdxc_d13_c, 4, 29),
+ GROUP(sdxc_d47_c, 4, 28),
+ GROUP(sdxc_clk_c, 7, 19),
+ GROUP(sdxc_cmd_c, 7, 18),
+ GROUP(nor_d, 5, 1),
+ GROUP(nor_q, 5, 3),
+ GROUP(nor_c, 5, 2),
+ GROUP(nor_cs, 5, 0),
+ GROUP(sd_d0_c, 6, 29),
+ GROUP(sd_d1_c, 6, 28),
+ GROUP(sd_d2_c, 6, 27),
+ GROUP(sd_d3_c, 6, 26),
+ GROUP(sd_cmd_c, 6, 30),
+ GROUP(sd_clk_c, 6, 31),
+
+ /* bank CARD */
+ GROUP(sd_d1_b, 2, 14),
+ GROUP(sd_d0_b, 2, 15),
+ GROUP(sd_clk_b, 2, 11),
+ GROUP(sd_cmd_b, 2, 10),
+ GROUP(sd_d3_b, 2, 12),
+ GROUP(sd_d2_b, 2, 13),
+ GROUP(sdxc_d13_b, 2, 6),
+ GROUP(sdxc_d0_b, 2, 7),
+ GROUP(sdxc_clk_b, 2, 5),
+ GROUP(sdxc_cmd_b, 2, 4),
+
+ /* bank AO */
+ GROUP(uart_tx_ao_a, 0, 12),
+ GROUP(uart_rx_ao_a, 0, 11),
+ GROUP(uart_cts_ao_a, 0, 10),
+ GROUP(uart_rts_ao_a, 0, 9),
+ GROUP(i2c_mst_sck_ao, 0, 6),
+ GROUP(i2c_mst_sda_ao, 0, 5),
+ GROUP(clk_32k_in_out, 0, 18),
+ GROUP(remote_input, 0, 0),
+ GROUP(hdmi_cec_1, 0, 17),
+ GROUP(ir_blaster, 0, 31),
+ GROUP(pwm_c2, 0, 22),
+ GROUP(i2c_sck_ao, 0, 2),
+ GROUP(i2c_sda_ao, 0, 1),
+ GROUP(ir_remote_out, 0, 21),
+ GROUP(i2s_am_clk_out, 0, 30),
+ GROUP(i2s_ao_clk_out, 0, 29),
+ GROUP(i2s_lr_clk_out, 0, 28),
+ GROUP(i2s_out_01, 0, 27),
+ GROUP(uart_tx_ao_b0, 0, 26),
+ GROUP(uart_rx_ao_b0, 0, 25),
+ GROUP(uart_cts_ao_b, 0, 8),
+ GROUP(uart_rts_ao_b, 0, 7),
+ GROUP(uart_tx_ao_b1, 0, 24),
+ GROUP(uart_rx_ao_b1, 0, 23),
+ GROUP(spdif_out_1, 0, 16),
+ GROUP(i2s_in_ch01, 0, 13),
+ GROUP(i2s_ao_clk_in, 0, 15),
+ GROUP(i2s_lr_clk_in, 0, 14),
+
+ /* bank DIF */
+ GROUP(eth_rxd1, 6, 0),
+ GROUP(eth_rxd0, 6, 1),
+ GROUP(eth_rx_dv, 6, 2),
+ GROUP(eth_rx_clk, 6, 3),
+ GROUP(eth_txd0_1, 6, 4),
+ GROUP(eth_txd1_1, 6, 5),
+ GROUP(eth_tx_en, 6, 0),
+ GROUP(eth_ref_clk, 6, 8),
+ GROUP(eth_mdc, 6, 9),
+ GROUP(eth_mdio_en, 6, 10),
+};
+
+static const char * const gpio_groups[] = {
+ "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
+ "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
+ "GPIOX_10", "GPIOX_11", "GPIOX_16", "GPIOX_17", "GPIOX_18",
+ "GPIOX_19", "GPIOX_20", "GPIOX_21",
+
+ "GPIOY_0", "GPIOY_1", "GPIOY_3", "GPIOY_6", "GPIOY_7",
+ "GPIOY_8", "GPIOY_9", "GPIOY_10", "GPIOY_11", "GPIOY_12",
+ "GPIOY_13", "GPIOY_14",
+
+ "GPIODV_9", "GPIODV_24", "GPIODV_25", "GPIODV_26",
+ "GPIODV_27", "GPIODV_28", "GPIODV_29",
+
+ "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4",
+ "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9",
+
+ "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4",
+ "CARD_5", "CARD_6",
+
+ "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
+ "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
+ "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
+ "BOOT_15", "BOOT_16", "BOOT_17", "BOOT_18",
+
+ "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3",
+ "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7",
+ "GPIOAO_8", "GPIOAO_9", "GPIOAO_10", "GPIOAO_11",
+ "GPIOAO_12", "GPIOAO_13", "GPIO_BSD_EN", "GPIO_TEST_N",
+
+ "DIF_0_P", "DIF_0_N", "DIF_1_P", "DIF_1_N",
+ "DIF_2_P", "DIF_2_N", "DIF_3_P", "DIF_3_N",
+ "DIF_4_P", "DIF_4_N"
+};
+
+static const char * const sd_a_groups[] = {
+ "sd_d0_a", "sd_d1_a", "sd_d2_a", "sd_d3_a", "sd_clk_a",
+ "sd_cmd_a"
+};
+
+static const char * const sdxc_a_groups[] = {
+ "sdxc_d0_0_a", "sdxc_d13_0_a", "sdxc_d47_a", "sdxc_clk_a",
+ "sdxc_cmd_a", "sdxc_d0_1_a", "sdxc_d0_13_1_a"
+};
+
+static const char * const pcm_a_groups[] = {
+ "pcm_out_a", "pcm_in_a", "pcm_fs_a", "pcm_clk_a"
+};
+
+static const char * const uart_a_groups[] = {
+ "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a"
+};
+
+static const char * const uart_b_groups[] = {
+ "uart_tx_b0", "uart_rx_b0", "uart_cts_b0", "uart_rts_b0",
+ "uart_tx_b1", "uart_rx_b1", "uart_cts_b1", "uart_rts_b1"
+};
+
+static const char * const iso7816_groups[] = {
+ "iso7816_det", "iso7816_reset", "iso7816_0_clk", "iso7816_0_data",
+ "iso7816_1_clk", "iso7816_1_data", "iso7816_2_clk", "iso7816_2_data"
+};
+
+static const char * const i2c_d_groups[] = {
+ "i2c_sda_d0", "i2c_sck_d0", "i2c_sda_d1", "i2c_sck_d1"
+};
+
+static const char * const xtal_groups[] = {
+ "xtal_32k_out", "xtal_24m_out", "xtal_24m", "xtal24_out"
+};
+
+static const char * const uart_c_groups[] = {
+ "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c"
+};
+
+static const char * const i2c_c_groups[] = {
+ "i2c_sda_c0", "i2c_sck_c0", "i2c_sda_c1", "i2c_sck_c1"
+};
+
+static const char * const hdmi_groups[] = {
+ "hdmi_hpd", "hdmi_sda", "hdmi_scl", "hdmi_cec_0",
+ "hdmi_cec_1"
+};
+
+static const char * const spi_groups[] = {
+ "spi_ss0_0", "spi_miso_0", "spi_mosi_0", "spi_sclk_0",
+ "spi_ss0_1", "spi_ss1", "spi_sclk_1", "spi_mosi_1",
+ "spi_miso_1", "spi_ss2"
+};
+
+static const char * const ethernet_groups[] = {
+ "eth_tx_clk", "eth_tx_en", "eth_txd1_0", "eth_txd1_1",
+ "eth_txd0_0", "eth_txd0_1", "eth_rx_clk", "eth_rx_dv",
+ "eth_rxd1", "eth_rxd0", "eth_mdio_en", "eth_mdc", "eth_ref_clk",
+ "eth_txd2", "eth_txd3"
+};
+
+static const char * const i2c_a_groups[] = {
+ "i2c_sda_a", "i2c_sck_a",
+};
+
+static const char * const i2c_b_groups[] = {
+ "i2c_sda_b0", "i2c_sck_b0", "i2c_sda_b1", "i2c_sck_b1"
+};
+
+static const char * const sd_c_groups[] = {
+ "sd_d0_c", "sd_d1_c", "sd_d2_c", "sd_d3_c",
+ "sd_cmd_c", "sd_clk_c"
+};
+
+static const char * const sdxc_c_groups[] = {
+ "sdxc_d0_c", "sdxc_d13_c", "sdxc_d47_c", "sdxc_cmd_c",
+ "sdxc_clk_c"
+};
+
+static const char * const nand_groups[] = {
+ "nand_io", "nand_io_ce0", "nand_io_ce1",
+ "nand_io_rb0", "nand_ale", "nand_cle",
+ "nand_wen_clk", "nand_ren_clk", "nand_dqs0",
+ "nand_dqs1"
+};
+
+static const char * const nor_groups[] = {
+ "nor_d", "nor_q", "nor_c", "nor_cs"
+};
+
+static const char * const sd_b_groups[] = {
+ "sd_d1_b", "sd_d0_b", "sd_clk_b", "sd_cmd_b",
+ "sd_d3_b", "sd_d2_b"
+};
+
+static const char * const sdxc_b_groups[] = {
+ "sdxc_d13_b", "sdxc_d0_b", "sdxc_clk_b", "sdxc_cmd_b"
+};
+
+static const char * const uart_ao_groups[] = {
+ "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a"
+};
+
+static const char * const remote_groups[] = {
+ "remote_input", "ir_blaster", "ir_remote_out"
+};
+
+static const char * const i2c_slave_ao_groups[] = {
+ "i2c_sck_ao", "i2c_sda_ao"
+};
+
+static const char * const uart_ao_b_groups[] = {
+ "uart_tx_ao_b0", "uart_rx_ao_b0", "uart_tx_ao_b1", "uart_rx_ao_b1",
+ "uart_cts_ao_b", "uart_rts_ao_b"
+};
+
+static const char * const i2c_mst_ao_groups[] = {
+ "i2c_mst_sck_ao", "i2c_mst_sda_ao"
+};
+
+static const char * const clk_groups[] = {
+ "clk_24m_out", "clk_32k_in_out"
+};
+
+static const char * const spdif_groups[] = {
+ "spdif_out_1", "spdif_out_0"
+};
+
+static const char * const i2s_groups[] = {
+ "i2s_am_clk_out", "i2s_ao_clk_out", "i2s_lr_clk_out",
+ "i2s_out_01", "i2s_in_ch01", "i2s_ao_clk_in",
+ "i2s_lr_clk_in"
+};
+
+static const char * const pwm_b_groups[] = {
+ "pwm_b"
+};
+
+static const char * const pwm_c_groups[] = {
+ "pwm_c0", "pwm_c1", "pwm_c2"
+};
+
+static const char * const pwm_d_groups[] = {
+ "pwm_d"
+};
+
+static const char * const pwm_e_groups[] = {
+ "pwm_e"
+};
+
+static const char * const pwm_vs_groups[] = {
+ "pwm_vs_0", "pwm_vs_1", "pwm_vs_2",
+ "pwm_vs_3", "pwm_vs_4"
+};
+
+static const char * const tsin_a_groups[] = {
+ "tsin_d0_a", "tsin_d17_a", "tsin_clk_a", "tsin_sop_a",
+ "tsin_d_valid_a"
+};
+
+static const char * const tsin_b_groups[] = {
+ "tsin_d0_b", "tsin_clk_b", "tsin_sop_b", "tsin_d_valid_b"
+};
+
+static struct meson_pmx_func meson8b_functions[] = {
+ FUNCTION(gpio),
+ FUNCTION(sd_a),
+ FUNCTION(sdxc_a),
+ FUNCTION(pcm_a),
+ FUNCTION(uart_a),
+ FUNCTION(uart_b),
+ FUNCTION(iso7816),
+ FUNCTION(i2c_d),
+ FUNCTION(xtal),
+ FUNCTION(uart_c),
+ FUNCTION(i2c_c),
+ FUNCTION(hdmi),
+ FUNCTION(spi),
+ FUNCTION(ethernet),
+ FUNCTION(i2c_a),
+ FUNCTION(i2c_b),
+ FUNCTION(sd_c),
+ FUNCTION(sdxc_c),
+ FUNCTION(nand),
+ FUNCTION(nor),
+ FUNCTION(sd_b),
+ FUNCTION(sdxc_b),
+ FUNCTION(uart_ao),
+ FUNCTION(remote),
+ FUNCTION(i2c_slave_ao),
+ FUNCTION(uart_ao_b),
+ FUNCTION(i2c_mst_ao),
+ FUNCTION(clk),
+ FUNCTION(spdif),
+ FUNCTION(i2s),
+ FUNCTION(pwm_b),
+ FUNCTION(pwm_c),
+ FUNCTION(pwm_d),
+ FUNCTION(pwm_e),
+ FUNCTION(pwm_vs),
+ FUNCTION(tsin_a),
+ FUNCTION(tsin_b),
+};
+
+static struct meson_bank meson8b_banks[] = {
+ /* name first last pullen pull dir out in */
+ BANK("X", PIN(GPIOX_0, 0), PIN(GPIOX_21, 0), 4, 0, 4, 0, 0, 0, 1, 0, 2, 0),
+ BANK("Y", PIN(GPIOY_0, 0), PIN(GPIOY_14, 0), 3, 0, 3, 0, 3, 0, 4, 0, 5, 0),
+ BANK("DV", PIN(GPIODV_9, 0), PIN(GPIODV_29, 0), 0, 0, 0, 0, 7, 0, 8, 0, 9, 0),
+ BANK("H", PIN(GPIOH_0, 0), PIN(GPIOH_9, 0), 1, 16, 1, 16, 9, 19, 10, 19, 11, 19),
+ BANK("CARD", PIN(CARD_0, 0), PIN(CARD_6, 0), 2, 20, 2, 20, 0, 22, 1, 22, 2, 22),
+ BANK("BOOT", PIN(BOOT_0, 0), PIN(BOOT_18, 0), 2, 0, 2, 0, 9, 0, 10, 0, 11, 0),
+ BANK("DIF", PIN(DIF_0_P, 0), PIN(DIF_4_N, 0), 5, 8, 5, 8, 12, 12, 13, 12, 14, 12),
+};
+
+static struct meson_bank meson8b_ao_banks[] = {
+ /* name first last pullen pull dir out in */
+ BANK("AO", PIN(GPIOAO_0, AO_OFF), PIN(GPIO_TEST_N, AO_OFF), 0, 0, 0, 16, 0, 0, 0, 16, 1, 0),
+};
+
+static struct meson_domain_data meson8b_domain_data[] = {
+ {
+ .name = "banks",
+ .banks = meson8b_banks,
+ .num_banks = ARRAY_SIZE(meson8b_banks),
+ .pin_base = 0,
+ .num_pins = 83,
+ },
+ {
+ .name = "ao-bank",
+ .banks = meson8b_ao_banks,
+ .num_banks = ARRAY_SIZE(meson8b_ao_banks),
+ .pin_base = 83,
+ .num_pins = 16,
+ },
+};
+
+struct meson_pinctrl_data meson8b_pinctrl_data = {
+ .pins = meson8b_pins,
+ .groups = meson8b_groups,
+ .funcs = meson8b_functions,
+ .domain_data = meson8b_domain_data,
+ .num_pins = ARRAY_SIZE(meson8b_pins),
+ .num_groups = ARRAY_SIZE(meson8b_groups),
+ .num_funcs = ARRAY_SIZE(meson8b_functions),
+ .num_domains = ARRAY_SIZE(meson8b_domain_data),
+};
bool
select PINCTRL_MVEBU
+config PINCTRL_ARMADA_39X
+ bool
+ select PINCTRL_MVEBU
+
config PINCTRL_ARMADA_XP
bool
select PINCTRL_MVEBU
obj-$(CONFIG_PINCTRL_ARMADA_370) += pinctrl-armada-370.o
obj-$(CONFIG_PINCTRL_ARMADA_375) += pinctrl-armada-375.o
obj-$(CONFIG_PINCTRL_ARMADA_38X) += pinctrl-armada-38x.o
+obj-$(CONFIG_PINCTRL_ARMADA_39X) += pinctrl-armada-39x.o
obj-$(CONFIG_PINCTRL_ARMADA_XP) += pinctrl-armada-xp.o
obj-$(CONFIG_PINCTRL_ORION) += pinctrl-orion.o
static struct mvebu_pinctrl_soc_info armada_370_pinctrl_info;
-static struct of_device_id armada_370_pinctrl_of_match[] = {
+static const struct of_device_id armada_370_pinctrl_of_match[] = {
{ .compatible = "marvell,mv88f6710-pinctrl" },
{ },
};
static struct mvebu_pinctrl_soc_info armada_375_pinctrl_info;
-static struct of_device_id armada_375_pinctrl_of_match[] = {
+static const struct of_device_id armada_375_pinctrl_of_match[] = {
{ .compatible = "marvell,mv88f6720-pinctrl" },
{ },
};
static struct mvebu_pinctrl_soc_info armada_38x_pinctrl_info;
-static struct of_device_id armada_38x_pinctrl_of_match[] = {
+static const struct of_device_id armada_38x_pinctrl_of_match[] = {
{
.compatible = "marvell,mv88f6810-pinctrl",
.data = (void *) V_88F6810,
--- /dev/null
+/*
+ * Marvell Armada 39x pinctrl driver based on mvebu pinctrl core
+ *
+ * Copyright (C) 2015 Marvell
+ *
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/pinctrl/pinctrl.h>
+
+#include "pinctrl-mvebu.h"
+
+static void __iomem *mpp_base;
+
+static int armada_39x_mpp_ctrl_get(unsigned pid, unsigned long *config)
+{
+ return default_mpp_ctrl_get(mpp_base, pid, config);
+}
+
+static int armada_39x_mpp_ctrl_set(unsigned pid, unsigned long config)
+{
+ return default_mpp_ctrl_set(mpp_base, pid, config);
+}
+
+enum {
+ V_88F6920 = BIT(0),
+ V_88F6928 = BIT(1),
+ V_88F6920_PLUS = (V_88F6920 | V_88F6928),
+};
+
+static struct mvebu_mpp_mode armada_39x_mpp_modes[] = {
+ MPP_MODE(0,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ua0", "rxd", V_88F6920_PLUS)),
+ MPP_MODE(1,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ua0", "txd", V_88F6920_PLUS)),
+ MPP_MODE(2,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "i2c0", "sck", V_88F6920_PLUS)),
+ MPP_MODE(3,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "i2c0", "sda", V_88F6920_PLUS)),
+ MPP_MODE(4,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "ua1", "txd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua0", "rts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "smi", "mdc", V_88F6920_PLUS)),
+ MPP_MODE(5,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "ua1", "rxd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua0", "cts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "smi", "mdio", V_88F6920_PLUS)),
+ MPP_MODE(6,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "cs3", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "xsmi", "mdio", V_88F6920_PLUS)),
+ MPP_MODE(7,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad9", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "xsmi", "mdc", V_88F6920_PLUS)),
+ MPP_MODE(8,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad10", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ptp", "trig", V_88F6920_PLUS)),
+ MPP_MODE(9,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad11", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ptp", "clk", V_88F6920_PLUS)),
+ MPP_MODE(10,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad12", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ptp", "event", V_88F6920_PLUS)),
+ MPP_MODE(11,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad13", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "led", "clk", V_88F6920_PLUS)),
+ MPP_MODE(12,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad14", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "led", "stb", V_88F6920_PLUS)),
+ MPP_MODE(13,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad15", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "led", "data", V_88F6920_PLUS)),
+ MPP_MODE(14,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "m", "vtt", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "wen1", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua1", "txd", V_88F6920_PLUS)),
+ MPP_MODE(15,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi0", "mosi", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "i2c1", "sck", V_88F6920_PLUS)),
+ MPP_MODE(16,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "m", "decc", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi0", "miso", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "i2c1", "sda", V_88F6920_PLUS)),
+ MPP_MODE(17,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua1", "rxd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi0", "sck", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "smi", "mdio", V_88F6920_PLUS)),
+ MPP_MODE(18,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua1", "txd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi0", "cs0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "i2c2", "sck", V_88F6920_PLUS)),
+ MPP_MODE(19,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sata1", "present", V_88F6928),
+ MPP_VAR_FUNCTION(5, "ua0", "cts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "i2c2", "sda", V_88F6920_PLUS)),
+ MPP_MODE(20,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(5, "ua0", "rts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "smi", "mdc", V_88F6920_PLUS)),
+ MPP_MODE(21,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "cs1", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(4, "sd", "cmd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "bootcs", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "rxd0", V_88F6920_PLUS)),
+ MPP_MODE(22,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "mosi", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad0", V_88F6920_PLUS)),
+ MPP_MODE(23,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "sck", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad2", V_88F6920_PLUS)),
+ MPP_MODE(24,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "miso", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "ua0", "cts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua1", "rxd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d4", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "readyn", V_88F6920_PLUS)),
+ MPP_MODE(25,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "cs0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "ua0", "rts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua1", "txd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d5", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "cs0", V_88F6920_PLUS)),
+ MPP_MODE(26,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "cs2", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "i2c1", "sck", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d6", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "cs1", V_88F6920_PLUS)),
+ MPP_MODE(27,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "cs3", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "i2c1", "sda", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d7", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "cs2", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "txclkout", V_88F6920_PLUS)),
+ MPP_MODE(28,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "clk", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad5", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "txd0", V_88F6920_PLUS)),
+ MPP_MODE(29,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ale0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "txd1", V_88F6920_PLUS)),
+ MPP_MODE(30,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "oen", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "txd2", V_88F6920_PLUS)),
+ MPP_MODE(31,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ale1", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "txd3", V_88F6920_PLUS)),
+ MPP_MODE(32,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "wen0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "txctl", V_88F6920_PLUS)),
+ MPP_MODE(33,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "m", "decc", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad3", V_88F6920_PLUS)),
+ MPP_MODE(34,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad1", V_88F6920_PLUS)),
+ MPP_MODE(35,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ref", "clk", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "a1", V_88F6920_PLUS)),
+ MPP_MODE(36,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "a0", V_88F6920_PLUS)),
+ MPP_MODE(37,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d3", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad8", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "rxclk", V_88F6920_PLUS)),
+ MPP_MODE(38,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ref", "clk", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad4", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "rxd1", V_88F6920_PLUS)),
+ MPP_MODE(39,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "i2c1", "sck", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua0", "cts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d1", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "a2", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "rxd2", V_88F6920_PLUS)),
+ MPP_MODE(40,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "i2c1", "sda", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua0", "rts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d2", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad6", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "rxd3", V_88F6920_PLUS)),
+ MPP_MODE(41,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ua1", "rxd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua0", "cts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "cs3", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "burstn", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "nd", "rbn0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "rxctl", V_88F6920_PLUS)),
+ MPP_MODE(42,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ua1", "txd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua0", "rts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad7", V_88F6920_PLUS)),
+ MPP_MODE(43,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "pcie0", "clkreq", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "m", "vtt", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "m", "decc", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "cs2", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "clkout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "nd", "rbn1", V_88F6920_PLUS)),
+ MPP_MODE(44,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(2, "sata1", "present", V_88F6928),
+ MPP_VAR_FUNCTION(7, "led", "clk", V_88F6920_PLUS)),
+ MPP_MODE(45,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ref", "clk", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6920_PLUS)),
+ MPP_MODE(46,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ref", "clk", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "led", "stb", V_88F6920_PLUS)),
+ MPP_MODE(47,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(2, "sata1", "present", V_88F6928),
+ MPP_VAR_FUNCTION(7, "led", "data", V_88F6920_PLUS)),
+ MPP_MODE(48,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(2, "m", "vtt", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "tdm", "pclk", V_88F6928),
+ MPP_VAR_FUNCTION(4, "audio", "mclk", V_88F6928),
+ MPP_VAR_FUNCTION(5, "sd", "d4", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "pcie0", "clkreq", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua1", "txd", V_88F6920_PLUS)),
+ MPP_MODE(49,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "tdm", "fsync", V_88F6928),
+ MPP_VAR_FUNCTION(4, "audio", "lrclk", V_88F6928),
+ MPP_VAR_FUNCTION(5, "sd", "d5", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua2", "rxd", V_88F6920_PLUS)),
+ MPP_MODE(50,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "tdm", "drx", V_88F6928),
+ MPP_VAR_FUNCTION(4, "audio", "extclk", V_88F6928),
+ MPP_VAR_FUNCTION(5, "sd", "cmd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua2", "rxd", V_88F6920_PLUS)),
+ MPP_MODE(51,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "tdm", "dtx", V_88F6928),
+ MPP_VAR_FUNCTION(4, "audio", "sdo", V_88F6928),
+ MPP_VAR_FUNCTION(5, "m", "decc", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua2", "txd", V_88F6920_PLUS)),
+ MPP_MODE(52,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "tdm", "intn", V_88F6928),
+ MPP_VAR_FUNCTION(4, "audio", "sdi", V_88F6928),
+ MPP_VAR_FUNCTION(5, "sd", "d6", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "i2c3", "sck", V_88F6920_PLUS)),
+ MPP_MODE(53,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "sata1", "present", V_88F6928),
+ MPP_VAR_FUNCTION(2, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(3, "tdm", "rstn", V_88F6928),
+ MPP_VAR_FUNCTION(4, "audio", "bclk", V_88F6928),
+ MPP_VAR_FUNCTION(5, "sd", "d7", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "i2c3", "sda", V_88F6920_PLUS)),
+ MPP_MODE(54,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(2, "sata1", "present", V_88F6928),
+ MPP_VAR_FUNCTION(3, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "sd", "d3", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua3", "txd", V_88F6920_PLUS)),
+ MPP_MODE(55,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ua1", "cts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "cs1", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "sd", "d0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua3", "rxd", V_88F6920_PLUS)),
+ MPP_MODE(56,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ua1", "rts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "m", "decc", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "mosi", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6920_PLUS)),
+ MPP_MODE(57,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "sck", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "sd", "clk", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6920_PLUS)),
+ MPP_MODE(58,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "i2c1", "sck", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "pcie2", "clkreq", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "miso", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "sd", "d1", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6920_PLUS)),
+ MPP_MODE(59,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "i2c1", "sda", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "cs0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "sd", "d2", V_88F6920_PLUS)),
+};
+
+static struct mvebu_pinctrl_soc_info armada_39x_pinctrl_info;
+
+static const struct of_device_id armada_39x_pinctrl_of_match[] = {
+ {
+ .compatible = "marvell,mv88f6920-pinctrl",
+ .data = (void *) V_88F6920,
+ },
+ {
+ .compatible = "marvell,mv88f6928-pinctrl",
+ .data = (void *) V_88F6928,
+ },
+ { },
+};
+
+static struct mvebu_mpp_ctrl armada_39x_mpp_controls[] = {
+ MPP_FUNC_CTRL(0, 59, NULL, armada_39x_mpp_ctrl),
+};
+
+static struct pinctrl_gpio_range armada_39x_mpp_gpio_ranges[] = {
+ MPP_GPIO_RANGE(0, 0, 0, 32),
+ MPP_GPIO_RANGE(1, 32, 32, 27),
+};
+
+static int armada_39x_pinctrl_probe(struct platform_device *pdev)
+{
+ struct mvebu_pinctrl_soc_info *soc = &armada_39x_pinctrl_info;
+ const struct of_device_id *match =
+ of_match_device(armada_39x_pinctrl_of_match, &pdev->dev);
+ struct resource *res;
+
+ if (!match)
+ return -ENODEV;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mpp_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(mpp_base))
+ return PTR_ERR(mpp_base);
+
+ soc->variant = (unsigned) match->data & 0xff;
+ soc->controls = armada_39x_mpp_controls;
+ soc->ncontrols = ARRAY_SIZE(armada_39x_mpp_controls);
+ soc->gpioranges = armada_39x_mpp_gpio_ranges;
+ soc->ngpioranges = ARRAY_SIZE(armada_39x_mpp_gpio_ranges);
+ soc->modes = armada_39x_mpp_modes;
+ soc->nmodes = armada_39x_mpp_controls[0].npins;
+
+ pdev->dev.platform_data = soc;
+
+ return mvebu_pinctrl_probe(pdev);
+}
+
+static int armada_39x_pinctrl_remove(struct platform_device *pdev)
+{
+ return mvebu_pinctrl_remove(pdev);
+}
+
+static struct platform_driver armada_39x_pinctrl_driver = {
+ .driver = {
+ .name = "armada-39x-pinctrl",
+ .of_match_table = of_match_ptr(armada_39x_pinctrl_of_match),
+ },
+ .probe = armada_39x_pinctrl_probe,
+ .remove = armada_39x_pinctrl_remove,
+};
+
+module_platform_driver(armada_39x_pinctrl_driver);
+
+MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
+MODULE_DESCRIPTION("Marvell Armada 39x pinctrl driver");
+MODULE_LICENSE("GPL v2");
#include "pinctrl-mvebu.h"
static void __iomem *mpp_base;
+static u32 *mpp_saved_regs;
static int armada_xp_mpp_ctrl_get(unsigned pid, unsigned long *config)
{
static struct mvebu_pinctrl_soc_info armada_xp_pinctrl_info;
-static struct of_device_id armada_xp_pinctrl_of_match[] = {
+static const struct of_device_id armada_xp_pinctrl_of_match[] = {
{
.compatible = "marvell,mv78230-pinctrl",
.data = (void *) V_MV78230,
MPP_GPIO_RANGE(2, 64, 64, 3),
};
+static int armada_xp_pinctrl_suspend(struct platform_device *pdev,
+ pm_message_t state)
+{
+ struct mvebu_pinctrl_soc_info *soc =
+ platform_get_drvdata(pdev);
+ int i, nregs;
+
+ nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG);
+
+ for (i = 0; i < nregs; i++)
+ mpp_saved_regs[i] = readl(mpp_base + i * 4);
+
+ return 0;
+}
+
+static int armada_xp_pinctrl_resume(struct platform_device *pdev)
+{
+ struct mvebu_pinctrl_soc_info *soc =
+ platform_get_drvdata(pdev);
+ int i, nregs;
+
+ nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG);
+
+ for (i = 0; i < nregs; i++)
+ writel(mpp_saved_regs[i], mpp_base + i * 4);
+
+ return 0;
+}
+
static int armada_xp_pinctrl_probe(struct platform_device *pdev)
{
struct mvebu_pinctrl_soc_info *soc = &armada_xp_pinctrl_info;
const struct of_device_id *match =
of_match_device(armada_xp_pinctrl_of_match, &pdev->dev);
struct resource *res;
+ int nregs;
if (!match)
return -ENODEV;
break;
}
+ nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG);
+
+ mpp_saved_regs = devm_kmalloc(&pdev->dev, nregs * sizeof(u32),
+ GFP_KERNEL);
+ if (!mpp_saved_regs)
+ return -ENOMEM;
+
pdev->dev.platform_data = soc;
return mvebu_pinctrl_probe(pdev);
},
.probe = armada_xp_pinctrl_probe,
.remove = armada_xp_pinctrl_remove,
+ .suspend = armada_xp_pinctrl_suspend,
+ .resume = armada_xp_pinctrl_resume,
};
module_platform_driver(armada_xp_pinctrl_driver);
.ngpioranges = ARRAY_SIZE(mv88f628x_gpio_ranges),
};
-static struct of_device_id kirkwood_pinctrl_of_match[] = {
+static const struct of_device_id kirkwood_pinctrl_of_match[] = {
{ .compatible = "marvell,88f6180-pinctrl", .data = &mv88f6180_info },
{ .compatible = "marvell,88f6190-pinctrl", .data = &mv88f6190_info },
{ .compatible = "marvell,88f6192-pinctrl", .data = &mv88f6192_info },
* There are multiple variants of the Orion SoCs, but in terms of pin
* muxing, they are identical.
*/
-static struct of_device_id orion_pinctrl_of_match[] = {
+static const struct of_device_id orion_pinctrl_of_match[] = {
{ .compatible = "marvell,88f5181l-pinctrl", .data = &mv88f5181l_info },
{ .compatible = "marvell,88f5182-pinctrl", .data = &mv88f5182_info },
{ .compatible = "marvell,88f5281-pinctrl", .data = &mv88f5281_info },
break;
default:
- dev_dbg(pct->dev, "unknow alt_setting %d\n", alt_setting);
+ dev_dbg(pct->dev, "unknown alt_setting %d\n", alt_setting);
return -EINVAL;
}
struct device *dev = pctldev->dev;
unsigned long *configs = NULL;
unsigned num_configs = 0;
- unsigned reserve;
+ unsigned reserve, strings_count;
struct property *prop;
const char *group;
const char *subnode_target_type = "pins";
+ ret = of_property_count_strings(np, "pins");
+ if (ret < 0) {
+ ret = of_property_count_strings(np, "groups");
+ if (ret < 0)
+ /* skip this node; may contain config child nodes */
+ return 0;
+ if (type == PIN_MAP_TYPE_INVALID)
+ type = PIN_MAP_TYPE_CONFIGS_GROUP;
+ subnode_target_type = "groups";
+ } else {
+ if (type == PIN_MAP_TYPE_INVALID)
+ type = PIN_MAP_TYPE_CONFIGS_PIN;
+ }
+ strings_count = ret;
+
ret = of_property_read_string(np, "function", &function);
if (ret < 0) {
/* EINVAL=missing, which is fine since it's optional */
if (ret != -EINVAL)
- dev_err(dev, "could not parse property function\n");
+ dev_err(dev, "%s: could not parse property function\n",
+ of_node_full_name(np));
function = NULL;
}
ret = pinconf_generic_parse_dt_config(np, pctldev, &configs,
&num_configs);
if (ret < 0) {
- dev_err(dev, "could not parse node property\n");
+ dev_err(dev, "%s: could not parse node property\n",
+ of_node_full_name(np));
return ret;
}
if (num_configs)
reserve++;
- ret = of_property_count_strings(np, "pins");
- if (ret < 0) {
- ret = of_property_count_strings(np, "groups");
- if (ret < 0) {
- dev_err(dev, "could not parse property pins/groups\n");
- goto exit;
- }
- if (type == PIN_MAP_TYPE_INVALID)
- type = PIN_MAP_TYPE_CONFIGS_GROUP;
- subnode_target_type = "groups";
- } else {
- if (type == PIN_MAP_TYPE_INVALID)
- type = PIN_MAP_TYPE_CONFIGS_PIN;
- }
- reserve *= ret;
+ reserve *= strings_count;
ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps,
num_maps, reserve);
*map = NULL;
*num_maps = 0;
+ ret = pinconf_generic_dt_subnode_to_map(pctldev, np_config, map,
+ &reserved_maps, num_maps, type);
+ if (ret < 0)
+ goto exit;
+
for_each_child_of_node(np_config, np) {
ret = pinconf_generic_dt_subnode_to_map(pctldev, np, map,
&reserved_maps, num_maps, type);
- if (ret < 0) {
- pinctrl_utils_dt_free_map(pctldev, *map, *num_maps);
- return ret;
- }
+ if (ret < 0)
+ goto exit;
}
return 0;
+
+exit:
+ pinctrl_utils_dt_free_map(pctldev, *map, *num_maps);
+ return ret;
}
EXPORT_SYMBOL_GPL(pinconf_generic_dt_node_to_map);
--- /dev/null
+/*
+ * GPIO driver for AMD
+ *
+ * Copyright (c) 2014,2015 AMD Corporation.
+ * Authors: Ken Xue <Ken.Xue@amd.com>
+ * Wu, Jeff <Jeff.Wu@amd.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+#include <linux/err.h>
+#include <linux/bug.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/compiler.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/log2.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/slab.h>
+#include <linux/platform_device.h>
+#include <linux/mutex.h>
+#include <linux/acpi.h>
+#include <linux/seq_file.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/bitops.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinconf-generic.h>
+
+#include "pinctrl-utils.h"
+#include "pinctrl-amd.h"
+
+static inline struct amd_gpio *to_amd_gpio(struct gpio_chip *gc)
+{
+ return container_of(gc, struct amd_gpio, gc);
+}
+
+static int amd_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
+{
+ unsigned long flags;
+ u32 pin_reg;
+ struct amd_gpio *gpio_dev = to_amd_gpio(gc);
+
+ spin_lock_irqsave(&gpio_dev->lock, flags);
+ pin_reg = readl(gpio_dev->base + offset * 4);
+ /*
+ * Suppose BIOS or Bootloader sets specific debounce for the
+ * GPIO. if not, set debounce to be 2.75ms and remove glitch.
+ */
+ if ((pin_reg & DB_TMR_OUT_MASK) == 0) {
+ pin_reg |= 0xf;
+ pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);
+ pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
+ pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
+ }
+
+ pin_reg &= ~BIT(OUTPUT_ENABLE_OFF);
+ writel(pin_reg, gpio_dev->base + offset * 4);
+ spin_unlock_irqrestore(&gpio_dev->lock, flags);
+
+ return 0;
+}
+
+static int amd_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
+ int value)
+{
+ u32 pin_reg;
+ unsigned long flags;
+ struct amd_gpio *gpio_dev = to_amd_gpio(gc);
+
+ spin_lock_irqsave(&gpio_dev->lock, flags);
+ pin_reg = readl(gpio_dev->base + offset * 4);
+ pin_reg |= BIT(OUTPUT_ENABLE_OFF);
+ if (value)
+ pin_reg |= BIT(OUTPUT_VALUE_OFF);
+ else
+ pin_reg &= ~BIT(OUTPUT_VALUE_OFF);
+ writel(pin_reg, gpio_dev->base + offset * 4);
+ spin_unlock_irqrestore(&gpio_dev->lock, flags);
+
+ return 0;
+}
+
+static int amd_gpio_get_value(struct gpio_chip *gc, unsigned offset)
+{
+ u32 pin_reg;
+ unsigned long flags;
+ struct amd_gpio *gpio_dev = to_amd_gpio(gc);
+
+ spin_lock_irqsave(&gpio_dev->lock, flags);
+ pin_reg = readl(gpio_dev->base + offset * 4);
+ spin_unlock_irqrestore(&gpio_dev->lock, flags);
+
+ return !!(pin_reg & BIT(PIN_STS_OFF));
+}
+
+static void amd_gpio_set_value(struct gpio_chip *gc, unsigned offset, int value)
+{
+ u32 pin_reg;
+ unsigned long flags;
+ struct amd_gpio *gpio_dev = to_amd_gpio(gc);
+
+ spin_lock_irqsave(&gpio_dev->lock, flags);
+ pin_reg = readl(gpio_dev->base + offset * 4);
+ if (value)
+ pin_reg |= BIT(OUTPUT_VALUE_OFF);
+ else
+ pin_reg &= ~BIT(OUTPUT_VALUE_OFF);
+ writel(pin_reg, gpio_dev->base + offset * 4);
+ spin_unlock_irqrestore(&gpio_dev->lock, flags);
+}
+
+static int amd_gpio_set_debounce(struct gpio_chip *gc, unsigned offset,
+ unsigned debounce)
+{
+ u32 time;
+ u32 pin_reg;
+ int ret = 0;
+ unsigned long flags;
+ struct amd_gpio *gpio_dev = to_amd_gpio(gc);
+
+ spin_lock_irqsave(&gpio_dev->lock, flags);
+ pin_reg = readl(gpio_dev->base + offset * 4);
+
+ if (debounce) {
+ pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
+ pin_reg &= ~DB_TMR_OUT_MASK;
+ /*
+ Debounce Debounce Timer Max
+ TmrLarge TmrOutUnit Unit Debounce
+ Time
+ 0 0 61 usec (2 RtcClk) 976 usec
+ 0 1 244 usec (8 RtcClk) 3.9 msec
+ 1 0 15.6 msec (512 RtcClk) 250 msec
+ 1 1 62.5 msec (2048 RtcClk) 1 sec
+ */
+
+ if (debounce < 61) {
+ pin_reg |= 1;
+ pin_reg &= ~BIT(DB_TMR_OUT_UNIT_OFF);
+ pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
+ } else if (debounce < 976) {
+ time = debounce / 61;
+ pin_reg |= time & DB_TMR_OUT_MASK;
+ pin_reg &= ~BIT(DB_TMR_OUT_UNIT_OFF);
+ pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
+ } else if (debounce < 3900) {
+ time = debounce / 244;
+ pin_reg |= time & DB_TMR_OUT_MASK;
+ pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);
+ pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
+ } else if (debounce < 250000) {
+ time = debounce / 15600;
+ pin_reg |= time & DB_TMR_OUT_MASK;
+ pin_reg &= ~BIT(DB_TMR_OUT_UNIT_OFF);
+ pin_reg |= BIT(DB_TMR_LARGE_OFF);
+ } else if (debounce < 1000000) {
+ time = debounce / 62500;
+ pin_reg |= time & DB_TMR_OUT_MASK;
+ pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);
+ pin_reg |= BIT(DB_TMR_LARGE_OFF);
+ } else {
+ pin_reg &= ~DB_CNTRl_MASK;
+ ret = -EINVAL;
+ }
+ } else {
+ pin_reg &= ~BIT(DB_TMR_OUT_UNIT_OFF);
+ pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
+ pin_reg &= ~DB_TMR_OUT_MASK;
+ pin_reg &= ~DB_CNTRl_MASK;
+ }
+ writel(pin_reg, gpio_dev->base + offset * 4);
+ spin_unlock_irqrestore(&gpio_dev->lock, flags);
+
+ return ret;
+}
+
+#ifdef CONFIG_DEBUG_FS
+static void amd_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc)
+{
+ u32 pin_reg;
+ unsigned long flags;
+ unsigned int bank, i, pin_num;
+ struct amd_gpio *gpio_dev = to_amd_gpio(gc);
+
+ char *level_trig;
+ char *active_level;
+ char *interrupt_enable;
+ char *interrupt_mask;
+ char *wake_cntrl0;
+ char *wake_cntrl1;
+ char *wake_cntrl2;
+ char *pin_sts;
+ char *pull_up_sel;
+ char *pull_up_enable;
+ char *pull_down_enable;
+ char *output_value;
+ char *output_enable;
+
+ for (bank = 0; bank < AMD_GPIO_TOTAL_BANKS; bank++) {
+ seq_printf(s, "GPIO bank%d\t", bank);
+
+ switch (bank) {
+ case 0:
+ i = 0;
+ pin_num = AMD_GPIO_PINS_BANK0;
+ break;
+ case 1:
+ i = 64;
+ pin_num = AMD_GPIO_PINS_BANK1 + i;
+ break;
+ case 2:
+ i = 128;
+ pin_num = AMD_GPIO_PINS_BANK2 + i;
+ break;
+ }
+
+ for (; i < pin_num; i++) {
+ seq_printf(s, "pin%d\t", i);
+ spin_lock_irqsave(&gpio_dev->lock, flags);
+ pin_reg = readl(gpio_dev->base + i * 4);
+ spin_unlock_irqrestore(&gpio_dev->lock, flags);
+
+ if (pin_reg & BIT(INTERRUPT_ENABLE_OFF)) {
+ interrupt_enable = "interrupt is enabled|";
+
+ if (!(pin_reg & BIT(ACTIVE_LEVEL_OFF))
+ && !(pin_reg & BIT(ACTIVE_LEVEL_OFF+1)))
+ active_level = "Active low|";
+ else if (pin_reg & BIT(ACTIVE_LEVEL_OFF)
+ && !(pin_reg & BIT(ACTIVE_LEVEL_OFF+1)))
+ active_level = "Active high|";
+ else if (!(pin_reg & BIT(ACTIVE_LEVEL_OFF))
+ && pin_reg & BIT(ACTIVE_LEVEL_OFF+1))
+ active_level = "Active on both|";
+ else
+ active_level = "Unknow Active level|";
+
+ if (pin_reg & BIT(LEVEL_TRIG_OFF))
+ level_trig = "Level trigger|";
+ else
+ level_trig = "Edge trigger|";
+
+ } else {
+ interrupt_enable =
+ "interrupt is disabled|";
+ active_level = " ";
+ level_trig = " ";
+ }
+
+ if (pin_reg & BIT(INTERRUPT_MASK_OFF))
+ interrupt_mask =
+ "interrupt is unmasked|";
+ else
+ interrupt_mask =
+ "interrupt is masked|";
+
+ if (pin_reg & BIT(WAKE_CNTRL_OFF))
+ wake_cntrl0 = "enable wakeup in S0i3 state|";
+ else
+ wake_cntrl0 = "disable wakeup in S0i3 state|";
+
+ if (pin_reg & BIT(WAKE_CNTRL_OFF))
+ wake_cntrl1 = "enable wakeup in S3 state|";
+ else
+ wake_cntrl1 = "disable wakeup in S3 state|";
+
+ if (pin_reg & BIT(WAKE_CNTRL_OFF))
+ wake_cntrl2 = "enable wakeup in S4/S5 state|";
+ else
+ wake_cntrl2 = "disable wakeup in S4/S5 state|";
+
+ if (pin_reg & BIT(PULL_UP_ENABLE_OFF)) {
+ pull_up_enable = "pull-up is enabled|";
+ if (pin_reg & BIT(PULL_UP_SEL_OFF))
+ pull_up_sel = "8k pull-up|";
+ else
+ pull_up_sel = "4k pull-up|";
+ } else {
+ pull_up_enable = "pull-up is disabled|";
+ pull_up_sel = " ";
+ }
+
+ if (pin_reg & BIT(PULL_DOWN_ENABLE_OFF))
+ pull_down_enable = "pull-down is enabled|";
+ else
+ pull_down_enable = "Pull-down is disabled|";
+
+ if (pin_reg & BIT(OUTPUT_ENABLE_OFF)) {
+ pin_sts = " ";
+ output_enable = "output is enabled|";
+ if (pin_reg & BIT(OUTPUT_VALUE_OFF))
+ output_value = "output is high|";
+ else
+ output_value = "output is low|";
+ } else {
+ output_enable = "output is disabled|";
+ output_value = " ";
+
+ if (pin_reg & BIT(PIN_STS_OFF))
+ pin_sts = "input is high|";
+ else
+ pin_sts = "input is low|";
+ }
+
+ seq_printf(s, "%s %s %s %s %s %s\n"
+ " %s %s %s %s %s %s %s 0x%x\n",
+ level_trig, active_level, interrupt_enable,
+ interrupt_mask, wake_cntrl0, wake_cntrl1,
+ wake_cntrl2, pin_sts, pull_up_sel,
+ pull_up_enable, pull_down_enable,
+ output_value, output_enable, pin_reg);
+ }
+ }
+}
+#else
+#define amd_gpio_dbg_show NULL
+#endif
+
+static void amd_gpio_irq_enable(struct irq_data *d)
+{
+ u32 pin_reg;
+ unsigned long flags;
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct amd_gpio *gpio_dev = to_amd_gpio(gc);
+
+ spin_lock_irqsave(&gpio_dev->lock, flags);
+ pin_reg = readl(gpio_dev->base + (d->hwirq)*4);
+ /*
+ Suppose BIOS or Bootloader sets specific debounce for the
+ GPIO. if not, set debounce to be 2.75ms.
+ */
+ if ((pin_reg & DB_TMR_OUT_MASK) == 0) {
+ pin_reg |= 0xf;
+ pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);
+ pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
+ }
+ pin_reg |= BIT(INTERRUPT_ENABLE_OFF);
+ pin_reg |= BIT(INTERRUPT_MASK_OFF);
+ writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
+ spin_unlock_irqrestore(&gpio_dev->lock, flags);
+}
+
+static void amd_gpio_irq_disable(struct irq_data *d)
+{
+ u32 pin_reg;
+ unsigned long flags;
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct amd_gpio *gpio_dev = to_amd_gpio(gc);
+
+ spin_lock_irqsave(&gpio_dev->lock, flags);
+ pin_reg = readl(gpio_dev->base + (d->hwirq)*4);
+ pin_reg &= ~BIT(INTERRUPT_ENABLE_OFF);
+ pin_reg &= ~BIT(INTERRUPT_MASK_OFF);
+ writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
+ spin_unlock_irqrestore(&gpio_dev->lock, flags);
+}
+
+static void amd_gpio_irq_mask(struct irq_data *d)
+{
+ u32 pin_reg;
+ unsigned long flags;
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct amd_gpio *gpio_dev = to_amd_gpio(gc);
+
+ spin_lock_irqsave(&gpio_dev->lock, flags);
+ pin_reg = readl(gpio_dev->base + (d->hwirq)*4);
+ pin_reg &= ~BIT(INTERRUPT_MASK_OFF);
+ writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
+ spin_unlock_irqrestore(&gpio_dev->lock, flags);
+}
+
+static void amd_gpio_irq_unmask(struct irq_data *d)
+{
+ u32 pin_reg;
+ unsigned long flags;
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct amd_gpio *gpio_dev = to_amd_gpio(gc);
+
+ spin_lock_irqsave(&gpio_dev->lock, flags);
+ pin_reg = readl(gpio_dev->base + (d->hwirq)*4);
+ pin_reg |= BIT(INTERRUPT_MASK_OFF);
+ writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
+ spin_unlock_irqrestore(&gpio_dev->lock, flags);
+}
+
+static void amd_gpio_irq_eoi(struct irq_data *d)
+{
+ u32 reg;
+ unsigned long flags;
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct amd_gpio *gpio_dev = to_amd_gpio(gc);
+
+ spin_lock_irqsave(&gpio_dev->lock, flags);
+ reg = readl(gpio_dev->base + WAKE_INT_MASTER_REG);
+ reg |= EOI_MASK;
+ writel(reg, gpio_dev->base + WAKE_INT_MASTER_REG);
+ spin_unlock_irqrestore(&gpio_dev->lock, flags);
+}
+
+static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
+{
+ int ret = 0;
+ u32 pin_reg;
+ unsigned long flags;
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct amd_gpio *gpio_dev = to_amd_gpio(gc);
+
+ spin_lock_irqsave(&gpio_dev->lock, flags);
+ pin_reg = readl(gpio_dev->base + (d->hwirq)*4);
+
+ switch (type & IRQ_TYPE_SENSE_MASK) {
+ case IRQ_TYPE_EDGE_RISING:
+ pin_reg &= ~BIT(LEVEL_TRIG_OFF);
+ pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
+ pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
+ pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
+ __irq_set_handler_locked(d->irq, handle_edge_irq);
+ break;
+
+ case IRQ_TYPE_EDGE_FALLING:
+ pin_reg &= ~BIT(LEVEL_TRIG_OFF);
+ pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
+ pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
+ pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
+ __irq_set_handler_locked(d->irq, handle_edge_irq);
+ break;
+
+ case IRQ_TYPE_EDGE_BOTH:
+ pin_reg &= ~BIT(LEVEL_TRIG_OFF);
+ pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
+ pin_reg |= BOTH_EADGE << ACTIVE_LEVEL_OFF;
+ pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
+ __irq_set_handler_locked(d->irq, handle_edge_irq);
+ break;
+
+ case IRQ_TYPE_LEVEL_HIGH:
+ pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
+ pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
+ pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
+ pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
+ pin_reg |= DB_TYPE_PRESERVE_LOW_GLITCH << DB_CNTRL_OFF;
+ __irq_set_handler_locked(d->irq, handle_level_irq);
+ break;
+
+ case IRQ_TYPE_LEVEL_LOW:
+ pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
+ pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
+ pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
+ pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
+ pin_reg |= DB_TYPE_PRESERVE_HIGH_GLITCH << DB_CNTRL_OFF;
+ __irq_set_handler_locked(d->irq, handle_level_irq);
+ break;
+
+ case IRQ_TYPE_NONE:
+ break;
+
+ default:
+ dev_err(&gpio_dev->pdev->dev, "Invalid type value\n");
+ ret = -EINVAL;
+ }
+
+ pin_reg |= CLR_INTR_STAT << INTERRUPT_STS_OFF;
+ writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
+ spin_unlock_irqrestore(&gpio_dev->lock, flags);
+
+ return ret;
+}
+
+static void amd_irq_ack(struct irq_data *d)
+{
+ /*
+ * based on HW design,there is no need to ack HW
+ * before handle current irq. But this routine is
+ * necessary for handle_edge_irq
+ */
+}
+
+static struct irq_chip amd_gpio_irqchip = {
+ .name = "amd_gpio",
+ .irq_ack = amd_irq_ack,
+ .irq_enable = amd_gpio_irq_enable,
+ .irq_disable = amd_gpio_irq_disable,
+ .irq_mask = amd_gpio_irq_mask,
+ .irq_unmask = amd_gpio_irq_unmask,
+ .irq_eoi = amd_gpio_irq_eoi,
+ .irq_set_type = amd_gpio_irq_set_type,
+};
+
+static void amd_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
+{
+ u32 i;
+ u32 off;
+ u32 reg;
+ u32 pin_reg;
+ u64 reg64;
+ int handled = 0;
+ unsigned long flags;
+ struct irq_chip *chip = irq_get_chip(irq);
+ struct gpio_chip *gc = irq_desc_get_handler_data(desc);
+ struct amd_gpio *gpio_dev = to_amd_gpio(gc);
+
+ chained_irq_enter(chip, desc);
+ /*enable GPIO interrupt again*/
+ spin_lock_irqsave(&gpio_dev->lock, flags);
+ reg = readl(gpio_dev->base + WAKE_INT_STATUS_REG1);
+ reg64 = reg;
+ reg64 = reg64 << 32;
+
+ reg = readl(gpio_dev->base + WAKE_INT_STATUS_REG0);
+ reg64 |= reg;
+ spin_unlock_irqrestore(&gpio_dev->lock, flags);
+
+ /*
+ * first 46 bits indicates interrupt status.
+ * one bit represents four interrupt sources.
+ */
+ for (off = 0; off < 46 ; off++) {
+ if (reg64 & BIT(off)) {
+ for (i = 0; i < 4; i++) {
+ pin_reg = readl(gpio_dev->base +
+ (off * 4 + i) * 4);
+ if ((pin_reg & BIT(INTERRUPT_STS_OFF)) ||
+ (pin_reg & BIT(WAKE_STS_OFF))) {
+ irq = irq_find_mapping(gc->irqdomain,
+ off * 4 + i);
+ generic_handle_irq(irq);
+ writel(pin_reg,
+ gpio_dev->base
+ + (off * 4 + i) * 4);
+ handled++;
+ }
+ }
+ }
+ }
+
+ if (handled == 0)
+ handle_bad_irq(irq, desc);
+
+ spin_lock_irqsave(&gpio_dev->lock, flags);
+ reg = readl(gpio_dev->base + WAKE_INT_MASTER_REG);
+ reg |= EOI_MASK;
+ writel(reg, gpio_dev->base + WAKE_INT_MASTER_REG);
+ spin_unlock_irqrestore(&gpio_dev->lock, flags);
+
+ chained_irq_exit(chip, desc);
+}
+
+static int amd_get_groups_count(struct pinctrl_dev *pctldev)
+{
+ struct amd_gpio *gpio_dev = pinctrl_dev_get_drvdata(pctldev);
+
+ return gpio_dev->ngroups;
+}
+
+static const char *amd_get_group_name(struct pinctrl_dev *pctldev,
+ unsigned group)
+{
+ struct amd_gpio *gpio_dev = pinctrl_dev_get_drvdata(pctldev);
+
+ return gpio_dev->groups[group].name;
+}
+
+static int amd_get_group_pins(struct pinctrl_dev *pctldev,
+ unsigned group,
+ const unsigned **pins,
+ unsigned *num_pins)
+{
+ struct amd_gpio *gpio_dev = pinctrl_dev_get_drvdata(pctldev);
+
+ *pins = gpio_dev->groups[group].pins;
+ *num_pins = gpio_dev->groups[group].npins;
+ return 0;
+}
+
+static const struct pinctrl_ops amd_pinctrl_ops = {
+ .get_groups_count = amd_get_groups_count,
+ .get_group_name = amd_get_group_name,
+ .get_group_pins = amd_get_group_pins,
+#ifdef CONFIG_OF
+ .dt_node_to_map = pinconf_generic_dt_node_to_map_group,
+ .dt_free_map = pinctrl_utils_dt_free_map,
+#endif
+};
+
+static int amd_pinconf_get(struct pinctrl_dev *pctldev,
+ unsigned int pin,
+ unsigned long *config)
+{
+ u32 pin_reg;
+ unsigned arg;
+ unsigned long flags;
+ struct amd_gpio *gpio_dev = pinctrl_dev_get_drvdata(pctldev);
+ enum pin_config_param param = pinconf_to_config_param(*config);
+
+ spin_lock_irqsave(&gpio_dev->lock, flags);
+ pin_reg = readl(gpio_dev->base + pin*4);
+ spin_unlock_irqrestore(&gpio_dev->lock, flags);
+ switch (param) {
+ case PIN_CONFIG_INPUT_DEBOUNCE:
+ arg = pin_reg & DB_TMR_OUT_MASK;
+ break;
+
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ arg = (pin_reg >> PULL_DOWN_ENABLE_OFF) & BIT(0);
+ break;
+
+ case PIN_CONFIG_BIAS_PULL_UP:
+ arg = (pin_reg >> PULL_UP_SEL_OFF) & (BIT(0) | BIT(1));
+ break;
+
+ case PIN_CONFIG_DRIVE_STRENGTH:
+ arg = (pin_reg >> DRV_STRENGTH_SEL_OFF) & DRV_STRENGTH_SEL_MASK;
+ break;
+
+ default:
+ dev_err(&gpio_dev->pdev->dev, "Invalid config param %04x\n",
+ param);
+ return -ENOTSUPP;
+ }
+
+ *config = pinconf_to_config_packed(param, arg);
+
+ return 0;
+}
+
+static int amd_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
+ unsigned long *configs, unsigned num_configs)
+{
+ int i;
+ u32 arg;
+ int ret = 0;
+ u32 pin_reg;
+ unsigned long flags;
+ enum pin_config_param param;
+ struct amd_gpio *gpio_dev = pinctrl_dev_get_drvdata(pctldev);
+
+ spin_lock_irqsave(&gpio_dev->lock, flags);
+ for (i = 0; i < num_configs; i++) {
+ param = pinconf_to_config_param(configs[i]);
+ arg = pinconf_to_config_argument(configs[i]);
+ pin_reg = readl(gpio_dev->base + pin*4);
+
+ switch (param) {
+ case PIN_CONFIG_INPUT_DEBOUNCE:
+ pin_reg &= ~DB_TMR_OUT_MASK;
+ pin_reg |= arg & DB_TMR_OUT_MASK;
+ break;
+
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ pin_reg &= ~BIT(PULL_DOWN_ENABLE_OFF);
+ pin_reg |= (arg & BIT(0)) << PULL_DOWN_ENABLE_OFF;
+ break;
+
+ case PIN_CONFIG_BIAS_PULL_UP:
+ pin_reg &= ~BIT(PULL_UP_SEL_OFF);
+ pin_reg |= (arg & BIT(0)) << PULL_UP_SEL_OFF;
+ pin_reg &= ~BIT(PULL_UP_ENABLE_OFF);
+ pin_reg |= ((arg>>1) & BIT(0)) << PULL_UP_ENABLE_OFF;
+ break;
+
+ case PIN_CONFIG_DRIVE_STRENGTH:
+ pin_reg &= ~(DRV_STRENGTH_SEL_MASK
+ << DRV_STRENGTH_SEL_OFF);
+ pin_reg |= (arg & DRV_STRENGTH_SEL_MASK)
+ << DRV_STRENGTH_SEL_OFF;
+ break;
+
+ default:
+ dev_err(&gpio_dev->pdev->dev,
+ "Invalid config param %04x\n", param);
+ ret = -ENOTSUPP;
+ }
+
+ writel(pin_reg, gpio_dev->base + pin*4);
+ }
+ spin_unlock_irqrestore(&gpio_dev->lock, flags);
+
+ return ret;
+}
+
+static int amd_pinconf_group_get(struct pinctrl_dev *pctldev,
+ unsigned int group,
+ unsigned long *config)
+{
+ const unsigned *pins;
+ unsigned npins;
+ int ret;
+
+ ret = amd_get_group_pins(pctldev, group, &pins, &npins);
+ if (ret)
+ return ret;
+
+ if (amd_pinconf_get(pctldev, pins[0], config))
+ return -ENOTSUPP;
+
+ return 0;
+}
+
+static int amd_pinconf_group_set(struct pinctrl_dev *pctldev,
+ unsigned group, unsigned long *configs,
+ unsigned num_configs)
+{
+ const unsigned *pins;
+ unsigned npins;
+ int i, ret;
+
+ ret = amd_get_group_pins(pctldev, group, &pins, &npins);
+ if (ret)
+ return ret;
+ for (i = 0; i < npins; i++) {
+ if (amd_pinconf_set(pctldev, pins[i], configs, num_configs))
+ return -ENOTSUPP;
+ }
+ return 0;
+}
+
+static const struct pinconf_ops amd_pinconf_ops = {
+ .pin_config_get = amd_pinconf_get,
+ .pin_config_set = amd_pinconf_set,
+ .pin_config_group_get = amd_pinconf_group_get,
+ .pin_config_group_set = amd_pinconf_group_set,
+};
+
+static struct pinctrl_desc amd_pinctrl_desc = {
+ .pins = kerncz_pins,
+ .npins = ARRAY_SIZE(kerncz_pins),
+ .pctlops = &amd_pinctrl_ops,
+ .confops = &amd_pinconf_ops,
+ .owner = THIS_MODULE,
+};
+
+static int amd_gpio_probe(struct platform_device *pdev)
+{
+ int ret = 0;
+ int irq_base;
+ struct resource *res;
+ struct amd_gpio *gpio_dev;
+
+ gpio_dev = devm_kzalloc(&pdev->dev,
+ sizeof(struct amd_gpio), GFP_KERNEL);
+ if (!gpio_dev)
+ return -ENOMEM;
+
+ spin_lock_init(&gpio_dev->lock);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&pdev->dev, "Failed to get gpio io resource.\n");
+ return -EINVAL;
+ }
+
+ gpio_dev->base = devm_ioremap_nocache(&pdev->dev, res->start,
+ resource_size(res));
+ if (IS_ERR(gpio_dev->base))
+ return PTR_ERR(gpio_dev->base);
+
+ irq_base = platform_get_irq(pdev, 0);
+ if (irq_base < 0) {
+ dev_err(&pdev->dev, "Failed to get gpio IRQ.\n");
+ return -EINVAL;
+ }
+
+ gpio_dev->pdev = pdev;
+ gpio_dev->gc.direction_input = amd_gpio_direction_input;
+ gpio_dev->gc.direction_output = amd_gpio_direction_output;
+ gpio_dev->gc.get = amd_gpio_get_value;
+ gpio_dev->gc.set = amd_gpio_set_value;
+ gpio_dev->gc.set_debounce = amd_gpio_set_debounce;
+ gpio_dev->gc.dbg_show = amd_gpio_dbg_show;
+
+ gpio_dev->gc.base = 0;
+ gpio_dev->gc.label = pdev->name;
+ gpio_dev->gc.owner = THIS_MODULE;
+ gpio_dev->gc.dev = &pdev->dev;
+ gpio_dev->gc.ngpio = TOTAL_NUMBER_OF_PINS;
+#if defined(CONFIG_OF_GPIO)
+ gpio_dev->gc.of_node = pdev->dev.of_node;
+#endif
+
+ gpio_dev->groups = kerncz_groups;
+ gpio_dev->ngroups = ARRAY_SIZE(kerncz_groups);
+
+ amd_pinctrl_desc.name = dev_name(&pdev->dev);
+ gpio_dev->pctrl = pinctrl_register(&amd_pinctrl_desc,
+ &pdev->dev, gpio_dev);
+ if (!gpio_dev->pctrl) {
+ dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");
+ return -ENODEV;
+ }
+
+ ret = gpiochip_add(&gpio_dev->gc);
+ if (ret)
+ goto out1;
+
+ ret = gpiochip_add_pin_range(&gpio_dev->gc, dev_name(&pdev->dev),
+ 0, 0, TOTAL_NUMBER_OF_PINS);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to add pin range\n");
+ goto out2;
+ }
+
+ ret = gpiochip_irqchip_add(&gpio_dev->gc,
+ &amd_gpio_irqchip,
+ 0,
+ handle_simple_irq,
+ IRQ_TYPE_NONE);
+ if (ret) {
+ dev_err(&pdev->dev, "could not add irqchip\n");
+ ret = -ENODEV;
+ goto out2;
+ }
+
+ gpiochip_set_chained_irqchip(&gpio_dev->gc,
+ &amd_gpio_irqchip,
+ irq_base,
+ amd_gpio_irq_handler);
+
+ platform_set_drvdata(pdev, gpio_dev);
+
+ dev_dbg(&pdev->dev, "amd gpio driver loaded\n");
+ return ret;
+
+out2:
+ gpiochip_remove(&gpio_dev->gc);
+
+out1:
+ pinctrl_unregister(gpio_dev->pctrl);
+ return ret;
+}
+
+static int amd_gpio_remove(struct platform_device *pdev)
+{
+ struct amd_gpio *gpio_dev;
+
+ gpio_dev = platform_get_drvdata(pdev);
+
+ gpiochip_remove(&gpio_dev->gc);
+ pinctrl_unregister(gpio_dev->pctrl);
+
+ return 0;
+}
+
+static const struct acpi_device_id amd_gpio_acpi_match[] = {
+ { "AMD0030", 0 },
+ { },
+};
+MODULE_DEVICE_TABLE(acpi, amd_gpio_acpi_match);
+
+static struct platform_driver amd_gpio_driver = {
+ .driver = {
+ .name = "amd_gpio",
+ .owner = THIS_MODULE,
+ .acpi_match_table = ACPI_PTR(amd_gpio_acpi_match),
+ },
+ .probe = amd_gpio_probe,
+ .remove = amd_gpio_remove,
+};
+
+module_platform_driver(amd_gpio_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Ken Xue <Ken.Xue@amd.com>, Jeff Wu <Jeff.Wu@amd.com>");
+MODULE_DESCRIPTION("AMD GPIO pinctrl driver");
--- /dev/null
+/*
+ * GPIO driver for AMD
+ *
+ * Copyright (c) 2014,2015 Ken Xue <Ken.Xue@amd.com>
+ * Jeff Wu <Jeff.Wu@amd.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ */
+
+#ifndef _PINCTRL_AMD_H
+#define _PINCTRL_AMD_H
+
+#define TOTAL_NUMBER_OF_PINS 192
+#define AMD_GPIO_PINS_PER_BANK 64
+#define AMD_GPIO_TOTAL_BANKS 3
+
+#define AMD_GPIO_PINS_BANK0 63
+#define AMD_GPIO_PINS_BANK1 64
+#define AMD_GPIO_PINS_BANK2 56
+
+#define WAKE_INT_MASTER_REG 0xfc
+#define EOI_MASK (1 << 29)
+
+#define WAKE_INT_STATUS_REG0 0x2f8
+#define WAKE_INT_STATUS_REG1 0x2fc
+
+#define DB_TMR_OUT_OFF 0
+#define DB_TMR_OUT_UNIT_OFF 4
+#define DB_CNTRL_OFF 5
+#define DB_TMR_LARGE_OFF 7
+#define LEVEL_TRIG_OFF 8
+#define ACTIVE_LEVEL_OFF 9
+#define INTERRUPT_ENABLE_OFF 11
+#define INTERRUPT_MASK_OFF 12
+#define WAKE_CNTRL_OFF 13
+#define PIN_STS_OFF 16
+#define DRV_STRENGTH_SEL_OFF 17
+#define PULL_UP_SEL_OFF 19
+#define PULL_UP_ENABLE_OFF 20
+#define PULL_DOWN_ENABLE_OFF 21
+#define OUTPUT_VALUE_OFF 22
+#define OUTPUT_ENABLE_OFF 23
+#define SW_CNTRL_IN_OFF 24
+#define SW_CNTRL_EN_OFF 25
+#define INTERRUPT_STS_OFF 28
+#define WAKE_STS_OFF 29
+
+#define DB_TMR_OUT_MASK 0xFUL
+#define DB_CNTRl_MASK 0x3UL
+#define ACTIVE_LEVEL_MASK 0x3UL
+#define DRV_STRENGTH_SEL_MASK 0x3UL
+
+#define DB_TYPE_NO_DEBOUNCE 0x0UL
+#define DB_TYPE_PRESERVE_LOW_GLITCH 0x1UL
+#define DB_TYPE_PRESERVE_HIGH_GLITCH 0x2UL
+#define DB_TYPE_REMOVE_GLITCH 0x3UL
+
+#define EDGE_TRAGGER 0x0UL
+#define LEVEL_TRIGGER 0x1UL
+
+#define ACTIVE_HIGH 0x0UL
+#define ACTIVE_LOW 0x1UL
+#define BOTH_EADGE 0x2UL
+
+#define ENABLE_INTERRUPT 0x1UL
+#define DISABLE_INTERRUPT 0x0UL
+
+#define ENABLE_INTERRUPT_MASK 0x0UL
+#define DISABLE_INTERRUPT_MASK 0x1UL
+
+#define CLR_INTR_STAT 0x1UL
+
+struct amd_pingroup {
+ const char *name;
+ const unsigned *pins;
+ unsigned npins;
+};
+
+struct amd_function {
+ const char *name;
+ const char * const *groups;
+ unsigned ngroups;
+};
+
+struct amd_gpio {
+ spinlock_t lock;
+ void __iomem *base;
+
+ const struct amd_pingroup *groups;
+ u32 ngroups;
+ struct pinctrl_dev *pctrl;
+ struct gpio_chip gc;
+ struct resource *res;
+ struct platform_device *pdev;
+};
+
+/* KERNCZ configuration*/
+static const struct pinctrl_pin_desc kerncz_pins[] = {
+ PINCTRL_PIN(0, "GPIO_0"),
+ PINCTRL_PIN(1, "GPIO_1"),
+ PINCTRL_PIN(2, "GPIO_2"),
+ PINCTRL_PIN(3, "GPIO_3"),
+ PINCTRL_PIN(4, "GPIO_4"),
+ PINCTRL_PIN(5, "GPIO_5"),
+ PINCTRL_PIN(6, "GPIO_6"),
+ PINCTRL_PIN(7, "GPIO_7"),
+ PINCTRL_PIN(8, "GPIO_8"),
+ PINCTRL_PIN(9, "GPIO_9"),
+ PINCTRL_PIN(10, "GPIO_10"),
+ PINCTRL_PIN(11, "GPIO_11"),
+ PINCTRL_PIN(12, "GPIO_12"),
+ PINCTRL_PIN(13, "GPIO_13"),
+ PINCTRL_PIN(14, "GPIO_14"),
+ PINCTRL_PIN(15, "GPIO_15"),
+ PINCTRL_PIN(16, "GPIO_16"),
+ PINCTRL_PIN(17, "GPIO_17"),
+ PINCTRL_PIN(18, "GPIO_18"),
+ PINCTRL_PIN(19, "GPIO_19"),
+ PINCTRL_PIN(20, "GPIO_20"),
+ PINCTRL_PIN(23, "GPIO_23"),
+ PINCTRL_PIN(24, "GPIO_24"),
+ PINCTRL_PIN(25, "GPIO_25"),
+ PINCTRL_PIN(26, "GPIO_26"),
+ PINCTRL_PIN(39, "GPIO_39"),
+ PINCTRL_PIN(40, "GPIO_40"),
+ PINCTRL_PIN(43, "GPIO_42"),
+ PINCTRL_PIN(46, "GPIO_46"),
+ PINCTRL_PIN(47, "GPIO_47"),
+ PINCTRL_PIN(48, "GPIO_48"),
+ PINCTRL_PIN(49, "GPIO_49"),
+ PINCTRL_PIN(50, "GPIO_50"),
+ PINCTRL_PIN(51, "GPIO_51"),
+ PINCTRL_PIN(52, "GPIO_52"),
+ PINCTRL_PIN(53, "GPIO_53"),
+ PINCTRL_PIN(54, "GPIO_54"),
+ PINCTRL_PIN(55, "GPIO_55"),
+ PINCTRL_PIN(56, "GPIO_56"),
+ PINCTRL_PIN(57, "GPIO_57"),
+ PINCTRL_PIN(58, "GPIO_58"),
+ PINCTRL_PIN(59, "GPIO_59"),
+ PINCTRL_PIN(60, "GPIO_60"),
+ PINCTRL_PIN(61, "GPIO_61"),
+ PINCTRL_PIN(62, "GPIO_62"),
+ PINCTRL_PIN(64, "GPIO_64"),
+ PINCTRL_PIN(65, "GPIO_65"),
+ PINCTRL_PIN(66, "GPIO_66"),
+ PINCTRL_PIN(68, "GPIO_68"),
+ PINCTRL_PIN(69, "GPIO_69"),
+ PINCTRL_PIN(70, "GPIO_70"),
+ PINCTRL_PIN(71, "GPIO_71"),
+ PINCTRL_PIN(72, "GPIO_72"),
+ PINCTRL_PIN(74, "GPIO_74"),
+ PINCTRL_PIN(75, "GPIO_75"),
+ PINCTRL_PIN(76, "GPIO_76"),
+ PINCTRL_PIN(84, "GPIO_84"),
+ PINCTRL_PIN(85, "GPIO_85"),
+ PINCTRL_PIN(86, "GPIO_86"),
+ PINCTRL_PIN(87, "GPIO_87"),
+ PINCTRL_PIN(88, "GPIO_88"),
+ PINCTRL_PIN(89, "GPIO_89"),
+ PINCTRL_PIN(90, "GPIO_90"),
+ PINCTRL_PIN(91, "GPIO_91"),
+ PINCTRL_PIN(92, "GPIO_92"),
+ PINCTRL_PIN(93, "GPIO_93"),
+ PINCTRL_PIN(95, "GPIO_95"),
+ PINCTRL_PIN(96, "GPIO_96"),
+ PINCTRL_PIN(97, "GPIO_97"),
+ PINCTRL_PIN(98, "GPIO_98"),
+ PINCTRL_PIN(99, "GPIO_99"),
+ PINCTRL_PIN(100, "GPIO_100"),
+ PINCTRL_PIN(101, "GPIO_101"),
+ PINCTRL_PIN(102, "GPIO_102"),
+ PINCTRL_PIN(113, "GPIO_113"),
+ PINCTRL_PIN(114, "GPIO_114"),
+ PINCTRL_PIN(115, "GPIO_115"),
+ PINCTRL_PIN(116, "GPIO_116"),
+ PINCTRL_PIN(117, "GPIO_117"),
+ PINCTRL_PIN(118, "GPIO_118"),
+ PINCTRL_PIN(119, "GPIO_119"),
+ PINCTRL_PIN(120, "GPIO_120"),
+ PINCTRL_PIN(121, "GPIO_121"),
+ PINCTRL_PIN(122, "GPIO_122"),
+ PINCTRL_PIN(126, "GPIO_126"),
+ PINCTRL_PIN(129, "GPIO_129"),
+ PINCTRL_PIN(130, "GPIO_130"),
+ PINCTRL_PIN(131, "GPIO_131"),
+ PINCTRL_PIN(132, "GPIO_132"),
+ PINCTRL_PIN(133, "GPIO_133"),
+ PINCTRL_PIN(135, "GPIO_135"),
+ PINCTRL_PIN(136, "GPIO_136"),
+ PINCTRL_PIN(137, "GPIO_137"),
+ PINCTRL_PIN(138, "GPIO_138"),
+ PINCTRL_PIN(139, "GPIO_139"),
+ PINCTRL_PIN(140, "GPIO_140"),
+ PINCTRL_PIN(141, "GPIO_141"),
+ PINCTRL_PIN(142, "GPIO_142"),
+ PINCTRL_PIN(143, "GPIO_143"),
+ PINCTRL_PIN(144, "GPIO_144"),
+ PINCTRL_PIN(145, "GPIO_145"),
+ PINCTRL_PIN(146, "GPIO_146"),
+ PINCTRL_PIN(147, "GPIO_147"),
+ PINCTRL_PIN(148, "GPIO_148"),
+ PINCTRL_PIN(166, "GPIO_166"),
+ PINCTRL_PIN(167, "GPIO_167"),
+ PINCTRL_PIN(168, "GPIO_168"),
+ PINCTRL_PIN(169, "GPIO_169"),
+ PINCTRL_PIN(170, "GPIO_170"),
+ PINCTRL_PIN(171, "GPIO_171"),
+ PINCTRL_PIN(172, "GPIO_172"),
+ PINCTRL_PIN(173, "GPIO_173"),
+ PINCTRL_PIN(174, "GPIO_174"),
+ PINCTRL_PIN(175, "GPIO_175"),
+ PINCTRL_PIN(176, "GPIO_176"),
+ PINCTRL_PIN(177, "GPIO_177"),
+};
+
+static const unsigned i2c0_pins[] = {145, 146};
+static const unsigned i2c1_pins[] = {147, 148};
+static const unsigned i2c2_pins[] = {113, 114};
+static const unsigned i2c3_pins[] = {19, 20};
+
+static const unsigned uart0_pins[] = {135, 136, 137, 138, 139};
+static const unsigned uart1_pins[] = {140, 141, 142, 143, 144};
+
+static const struct amd_pingroup kerncz_groups[] = {
+ {
+ .name = "i2c0",
+ .pins = i2c0_pins,
+ .npins = 2,
+ },
+ {
+ .name = "i2c1",
+ .pins = i2c1_pins,
+ .npins = 2,
+ },
+ {
+ .name = "i2c2",
+ .pins = i2c2_pins,
+ .npins = 2,
+ },
+ {
+ .name = "i2c3",
+ .pins = i2c3_pins,
+ .npins = 2,
+ },
+ {
+ .name = "uart0",
+ .pins = uart0_pins,
+ .npins = 9,
+ },
+ {
+ .name = "uart1",
+ .pins = uart1_pins,
+ .npins = 5,
+ },
+};
+
+#endif
return 0;
}
-static struct of_device_id as3722_pinctrl_of_match[] = {
+static const struct of_device_id as3722_pinctrl_of_match[] = {
{ .compatible = "ams,as3722-pinctrl", },
{ },
};
static bool at91_mux_get_deglitch(void __iomem *pio, unsigned pin)
{
- return (__raw_readl(pio + PIO_IFSR) >> pin) & 0x1;
+ return (readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1;
}
static void at91_mux_set_deglitch(void __iomem *pio, unsigned mask, bool is_on)
{
- __raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
+ writel_relaxed(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
}
static bool at91_mux_pio3_get_deglitch(void __iomem *pio, unsigned pin)
{
- if ((__raw_readl(pio + PIO_IFSR) >> pin) & 0x1)
- return !((__raw_readl(pio + PIO_IFSCSR) >> pin) & 0x1);
+ if ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1)
+ return !((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1);
return false;
}
static void at91_mux_pio3_set_deglitch(void __iomem *pio, unsigned mask, bool is_on)
{
if (is_on)
- __raw_writel(mask, pio + PIO_IFSCDR);
+ writel_relaxed(mask, pio + PIO_IFSCDR);
at91_mux_set_deglitch(pio, mask, is_on);
}
static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div)
{
- *div = __raw_readl(pio + PIO_SCDR);
+ *div = readl_relaxed(pio + PIO_SCDR);
- return ((__raw_readl(pio + PIO_IFSR) >> pin) & 0x1) &&
- ((__raw_readl(pio + PIO_IFSCSR) >> pin) & 0x1);
+ return ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1) &&
+ ((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1);
}
static void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask,
bool is_on, u32 div)
{
if (is_on) {
- __raw_writel(mask, pio + PIO_IFSCER);
- __raw_writel(div & PIO_SCDR_DIV, pio + PIO_SCDR);
- __raw_writel(mask, pio + PIO_IFER);
+ writel_relaxed(mask, pio + PIO_IFSCER);
+ writel_relaxed(div & PIO_SCDR_DIV, pio + PIO_SCDR);
+ writel_relaxed(mask, pio + PIO_IFER);
} else
- __raw_writel(mask, pio + PIO_IFSCDR);
+ writel_relaxed(mask, pio + PIO_IFSCDR);
}
static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin)
{
- return !((__raw_readl(pio + PIO_PPDSR) >> pin) & 0x1);
+ return !((readl_relaxed(pio + PIO_PPDSR) >> pin) & 0x1);
}
static void at91_mux_pio3_set_pulldown(void __iomem *pio, unsigned mask, bool is_on)
{
if (is_on)
- __raw_writel(mask, pio + PIO_PUDR);
+ writel_relaxed(mask, pio + PIO_PUDR);
- __raw_writel(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR));
+ writel_relaxed(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR));
}
static void at91_mux_pio3_disable_schmitt_trig(void __iomem *pio, unsigned mask)
{
- __raw_writel(__raw_readl(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT);
+ writel_relaxed(readl_relaxed(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT);
}
static bool at91_mux_pio3_get_schmitt_trig(void __iomem *pio, unsigned pin)
{
- return (__raw_readl(pio + PIO_SCHMITT) >> pin) & 0x1;
+ return (readl_relaxed(pio + PIO_SCHMITT) >> pin) & 0x1;
}
static inline u32 read_drive_strength(void __iomem *reg, unsigned pin)
{
- unsigned tmp = __raw_readl(reg);
+ unsigned tmp = readl_relaxed(reg);
tmp = tmp >> two_bit_pin_value_shift_amount(pin);
static void set_drive_strength(void __iomem *reg, unsigned pin, u32 strength)
{
- unsigned tmp = __raw_readl(reg);
+ unsigned tmp = readl_relaxed(reg);
unsigned shift = two_bit_pin_value_shift_amount(pin);
tmp &= ~(DRIVE_STRENGTH_MASK << shift);
tmp |= strength << shift;
- __raw_writel(tmp, reg);
+ writel_relaxed(tmp, reg);
}
static void at91_mux_sama5d3_set_drivestrength(void __iomem *pio, unsigned pin,
return 0;
}
-static struct of_device_id at91_pinctrl_of_match[] = {
+static const struct of_device_id at91_pinctrl_of_match[] = {
{ .compatible = "atmel,sama5d3-pinctrl", .data = &sama5d3_ops },
{ .compatible = "atmel,at91sam9x5-pinctrl", .data = &at91sam9x5_ops },
{ .compatible = "atmel,at91rm9200-pinctrl", .data = &at91rm9200_ops },
if (!info->pctl) {
dev_err(&pdev->dev, "could not register AT91 pinctrl driver\n");
- ret = -EINVAL;
- goto err;
+ return -EINVAL;
}
/* We will handle a range of GPIO pins */
dev_info(&pdev->dev, "initialized AT91 pinctrl driver\n");
return 0;
-
-err:
- return ret;
}
static int at91_pinctrl_remove(struct platform_device *pdev)
pio = gpio_chips[i]->regbase;
- backups[i] = __raw_readl(pio + PIO_IMR);
- __raw_writel(backups[i], pio + PIO_IDR);
- __raw_writel(wakeups[i], pio + PIO_IER);
+ backups[i] = readl_relaxed(pio + PIO_IMR);
+ writel_relaxed(backups[i], pio + PIO_IDR);
+ writel_relaxed(wakeups[i], pio + PIO_IER);
if (!wakeups[i])
clk_disable_unprepare(gpio_chips[i]->clock);
if (!wakeups[i])
clk_prepare_enable(gpio_chips[i]->clock);
- __raw_writel(wakeups[i], pio + PIO_IDR);
- __raw_writel(backups[i], pio + PIO_IER);
+ writel_relaxed(wakeups[i], pio + PIO_IDR);
+ writel_relaxed(backups[i], pio + PIO_IER);
}
}
.ngpio = MAX_NB_GPIO_PER_BANK,
};
-static struct of_device_id at91_gpio_of_match[] = {
+static const struct of_device_id at91_gpio_of_match[] = {
{ .compatible = "atmel,at91sam9x5-gpio", .data = &at91sam9x5_ops, },
{ .compatible = "atmel,at91rm9200-gpio", .data = &at91rm9200_ops },
{ /* sentinel */ }
+++ /dev/null
-/*
- * Copyright (C) 2013 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/module.h>
-#include <linux/of.h>
-#include <linux/platform_device.h>
-#include <linux/pinctrl/pinctrl.h>
-#include <linux/pinctrl/pinmux.h>
-#include <linux/pinctrl/pinconf.h>
-#include <linux/pinctrl/pinconf-generic.h>
-#include <linux/regmap.h>
-#include <linux/slab.h>
-#include "core.h"
-#include "pinctrl-utils.h"
-
-/* BCM281XX Pin Control Registers Definitions */
-
-/* Function Select bits are the same for all pin control registers */
-#define BCM281XX_PIN_REG_F_SEL_MASK 0x0700
-#define BCM281XX_PIN_REG_F_SEL_SHIFT 8
-
-/* Standard pin register */
-#define BCM281XX_STD_PIN_REG_DRV_STR_MASK 0x0007
-#define BCM281XX_STD_PIN_REG_DRV_STR_SHIFT 0
-#define BCM281XX_STD_PIN_REG_INPUT_DIS_MASK 0x0008
-#define BCM281XX_STD_PIN_REG_INPUT_DIS_SHIFT 3
-#define BCM281XX_STD_PIN_REG_SLEW_MASK 0x0010
-#define BCM281XX_STD_PIN_REG_SLEW_SHIFT 4
-#define BCM281XX_STD_PIN_REG_PULL_UP_MASK 0x0020
-#define BCM281XX_STD_PIN_REG_PULL_UP_SHIFT 5
-#define BCM281XX_STD_PIN_REG_PULL_DN_MASK 0x0040
-#define BCM281XX_STD_PIN_REG_PULL_DN_SHIFT 6
-#define BCM281XX_STD_PIN_REG_HYST_MASK 0x0080
-#define BCM281XX_STD_PIN_REG_HYST_SHIFT 7
-
-/* I2C pin register */
-#define BCM281XX_I2C_PIN_REG_INPUT_DIS_MASK 0x0004
-#define BCM281XX_I2C_PIN_REG_INPUT_DIS_SHIFT 2
-#define BCM281XX_I2C_PIN_REG_SLEW_MASK 0x0008
-#define BCM281XX_I2C_PIN_REG_SLEW_SHIFT 3
-#define BCM281XX_I2C_PIN_REG_PULL_UP_STR_MASK 0x0070
-#define BCM281XX_I2C_PIN_REG_PULL_UP_STR_SHIFT 4
-
-/* HDMI pin register */
-#define BCM281XX_HDMI_PIN_REG_INPUT_DIS_MASK 0x0008
-#define BCM281XX_HDMI_PIN_REG_INPUT_DIS_SHIFT 3
-#define BCM281XX_HDMI_PIN_REG_MODE_MASK 0x0010
-#define BCM281XX_HDMI_PIN_REG_MODE_SHIFT 4
-
-/**
- * bcm281xx_pin_type - types of pin register
- */
-enum bcm281xx_pin_type {
- BCM281XX_PIN_TYPE_UNKNOWN = 0,
- BCM281XX_PIN_TYPE_STD,
- BCM281XX_PIN_TYPE_I2C,
- BCM281XX_PIN_TYPE_HDMI,
-};
-
-static enum bcm281xx_pin_type std_pin = BCM281XX_PIN_TYPE_STD;
-static enum bcm281xx_pin_type i2c_pin = BCM281XX_PIN_TYPE_I2C;
-static enum bcm281xx_pin_type hdmi_pin = BCM281XX_PIN_TYPE_HDMI;
-
-/**
- * bcm281xx_pin_function- define pin function
- */
-struct bcm281xx_pin_function {
- const char *name;
- const char * const *groups;
- const unsigned ngroups;
-};
-
-/**
- * bcm281xx_pinctrl_data - Broadcom-specific pinctrl data
- * @reg_base - base of pinctrl registers
- */
-struct bcm281xx_pinctrl_data {
- void __iomem *reg_base;
-
- /* List of all pins */
- const struct pinctrl_pin_desc *pins;
- const unsigned npins;
-
- const struct bcm281xx_pin_function *functions;
- const unsigned nfunctions;
-
- struct regmap *regmap;
-};
-
-/*
- * Pin number definition. The order here must be the same as defined in the
- * PADCTRLREG block in the RDB.
- */
-#define BCM281XX_PIN_ADCSYNC 0
-#define BCM281XX_PIN_BAT_RM 1
-#define BCM281XX_PIN_BSC1_SCL 2
-#define BCM281XX_PIN_BSC1_SDA 3
-#define BCM281XX_PIN_BSC2_SCL 4
-#define BCM281XX_PIN_BSC2_SDA 5
-#define BCM281XX_PIN_CLASSGPWR 6
-#define BCM281XX_PIN_CLK_CX8 7
-#define BCM281XX_PIN_CLKOUT_0 8
-#define BCM281XX_PIN_CLKOUT_1 9
-#define BCM281XX_PIN_CLKOUT_2 10
-#define BCM281XX_PIN_CLKOUT_3 11
-#define BCM281XX_PIN_CLKREQ_IN_0 12
-#define BCM281XX_PIN_CLKREQ_IN_1 13
-#define BCM281XX_PIN_CWS_SYS_REQ1 14
-#define BCM281XX_PIN_CWS_SYS_REQ2 15
-#define BCM281XX_PIN_CWS_SYS_REQ3 16
-#define BCM281XX_PIN_DIGMIC1_CLK 17
-#define BCM281XX_PIN_DIGMIC1_DQ 18
-#define BCM281XX_PIN_DIGMIC2_CLK 19
-#define BCM281XX_PIN_DIGMIC2_DQ 20
-#define BCM281XX_PIN_GPEN13 21
-#define BCM281XX_PIN_GPEN14 22
-#define BCM281XX_PIN_GPEN15 23
-#define BCM281XX_PIN_GPIO00 24
-#define BCM281XX_PIN_GPIO01 25
-#define BCM281XX_PIN_GPIO02 26
-#define BCM281XX_PIN_GPIO03 27
-#define BCM281XX_PIN_GPIO04 28
-#define BCM281XX_PIN_GPIO05 29
-#define BCM281XX_PIN_GPIO06 30
-#define BCM281XX_PIN_GPIO07 31
-#define BCM281XX_PIN_GPIO08 32
-#define BCM281XX_PIN_GPIO09 33
-#define BCM281XX_PIN_GPIO10 34
-#define BCM281XX_PIN_GPIO11 35
-#define BCM281XX_PIN_GPIO12 36
-#define BCM281XX_PIN_GPIO13 37
-#define BCM281XX_PIN_GPIO14 38
-#define BCM281XX_PIN_GPS_PABLANK 39
-#define BCM281XX_PIN_GPS_TMARK 40
-#define BCM281XX_PIN_HDMI_SCL 41
-#define BCM281XX_PIN_HDMI_SDA 42
-#define BCM281XX_PIN_IC_DM 43
-#define BCM281XX_PIN_IC_DP 44
-#define BCM281XX_PIN_KP_COL_IP_0 45
-#define BCM281XX_PIN_KP_COL_IP_1 46
-#define BCM281XX_PIN_KP_COL_IP_2 47
-#define BCM281XX_PIN_KP_COL_IP_3 48
-#define BCM281XX_PIN_KP_ROW_OP_0 49
-#define BCM281XX_PIN_KP_ROW_OP_1 50
-#define BCM281XX_PIN_KP_ROW_OP_2 51
-#define BCM281XX_PIN_KP_ROW_OP_3 52
-#define BCM281XX_PIN_LCD_B_0 53
-#define BCM281XX_PIN_LCD_B_1 54
-#define BCM281XX_PIN_LCD_B_2 55
-#define BCM281XX_PIN_LCD_B_3 56
-#define BCM281XX_PIN_LCD_B_4 57
-#define BCM281XX_PIN_LCD_B_5 58
-#define BCM281XX_PIN_LCD_B_6 59
-#define BCM281XX_PIN_LCD_B_7 60
-#define BCM281XX_PIN_LCD_G_0 61
-#define BCM281XX_PIN_LCD_G_1 62
-#define BCM281XX_PIN_LCD_G_2 63
-#define BCM281XX_PIN_LCD_G_3 64
-#define BCM281XX_PIN_LCD_G_4 65
-#define BCM281XX_PIN_LCD_G_5 66
-#define BCM281XX_PIN_LCD_G_6 67
-#define BCM281XX_PIN_LCD_G_7 68
-#define BCM281XX_PIN_LCD_HSYNC 69
-#define BCM281XX_PIN_LCD_OE 70
-#define BCM281XX_PIN_LCD_PCLK 71
-#define BCM281XX_PIN_LCD_R_0 72
-#define BCM281XX_PIN_LCD_R_1 73
-#define BCM281XX_PIN_LCD_R_2 74
-#define BCM281XX_PIN_LCD_R_3 75
-#define BCM281XX_PIN_LCD_R_4 76
-#define BCM281XX_PIN_LCD_R_5 77
-#define BCM281XX_PIN_LCD_R_6 78
-#define BCM281XX_PIN_LCD_R_7 79
-#define BCM281XX_PIN_LCD_VSYNC 80
-#define BCM281XX_PIN_MDMGPIO0 81
-#define BCM281XX_PIN_MDMGPIO1 82
-#define BCM281XX_PIN_MDMGPIO2 83
-#define BCM281XX_PIN_MDMGPIO3 84
-#define BCM281XX_PIN_MDMGPIO4 85
-#define BCM281XX_PIN_MDMGPIO5 86
-#define BCM281XX_PIN_MDMGPIO6 87
-#define BCM281XX_PIN_MDMGPIO7 88
-#define BCM281XX_PIN_MDMGPIO8 89
-#define BCM281XX_PIN_MPHI_DATA_0 90
-#define BCM281XX_PIN_MPHI_DATA_1 91
-#define BCM281XX_PIN_MPHI_DATA_2 92
-#define BCM281XX_PIN_MPHI_DATA_3 93
-#define BCM281XX_PIN_MPHI_DATA_4 94
-#define BCM281XX_PIN_MPHI_DATA_5 95
-#define BCM281XX_PIN_MPHI_DATA_6 96
-#define BCM281XX_PIN_MPHI_DATA_7 97
-#define BCM281XX_PIN_MPHI_DATA_8 98
-#define BCM281XX_PIN_MPHI_DATA_9 99
-#define BCM281XX_PIN_MPHI_DATA_10 100
-#define BCM281XX_PIN_MPHI_DATA_11 101
-#define BCM281XX_PIN_MPHI_DATA_12 102
-#define BCM281XX_PIN_MPHI_DATA_13 103
-#define BCM281XX_PIN_MPHI_DATA_14 104
-#define BCM281XX_PIN_MPHI_DATA_15 105
-#define BCM281XX_PIN_MPHI_HA0 106
-#define BCM281XX_PIN_MPHI_HAT0 107
-#define BCM281XX_PIN_MPHI_HAT1 108
-#define BCM281XX_PIN_MPHI_HCE0_N 109
-#define BCM281XX_PIN_MPHI_HCE1_N 110
-#define BCM281XX_PIN_MPHI_HRD_N 111
-#define BCM281XX_PIN_MPHI_HWR_N 112
-#define BCM281XX_PIN_MPHI_RUN0 113
-#define BCM281XX_PIN_MPHI_RUN1 114
-#define BCM281XX_PIN_MTX_SCAN_CLK 115
-#define BCM281XX_PIN_MTX_SCAN_DATA 116
-#define BCM281XX_PIN_NAND_AD_0 117
-#define BCM281XX_PIN_NAND_AD_1 118
-#define BCM281XX_PIN_NAND_AD_2 119
-#define BCM281XX_PIN_NAND_AD_3 120
-#define BCM281XX_PIN_NAND_AD_4 121
-#define BCM281XX_PIN_NAND_AD_5 122
-#define BCM281XX_PIN_NAND_AD_6 123
-#define BCM281XX_PIN_NAND_AD_7 124
-#define BCM281XX_PIN_NAND_ALE 125
-#define BCM281XX_PIN_NAND_CEN_0 126
-#define BCM281XX_PIN_NAND_CEN_1 127
-#define BCM281XX_PIN_NAND_CLE 128
-#define BCM281XX_PIN_NAND_OEN 129
-#define BCM281XX_PIN_NAND_RDY_0 130
-#define BCM281XX_PIN_NAND_RDY_1 131
-#define BCM281XX_PIN_NAND_WEN 132
-#define BCM281XX_PIN_NAND_WP 133
-#define BCM281XX_PIN_PC1 134
-#define BCM281XX_PIN_PC2 135
-#define BCM281XX_PIN_PMU_INT 136
-#define BCM281XX_PIN_PMU_SCL 137
-#define BCM281XX_PIN_PMU_SDA 138
-#define BCM281XX_PIN_RFST2G_MTSLOTEN3G 139
-#define BCM281XX_PIN_RGMII_0_RX_CTL 140
-#define BCM281XX_PIN_RGMII_0_RXC 141
-#define BCM281XX_PIN_RGMII_0_RXD_0 142
-#define BCM281XX_PIN_RGMII_0_RXD_1 143
-#define BCM281XX_PIN_RGMII_0_RXD_2 144
-#define BCM281XX_PIN_RGMII_0_RXD_3 145
-#define BCM281XX_PIN_RGMII_0_TX_CTL 146
-#define BCM281XX_PIN_RGMII_0_TXC 147
-#define BCM281XX_PIN_RGMII_0_TXD_0 148
-#define BCM281XX_PIN_RGMII_0_TXD_1 149
-#define BCM281XX_PIN_RGMII_0_TXD_2 150
-#define BCM281XX_PIN_RGMII_0_TXD_3 151
-#define BCM281XX_PIN_RGMII_1_RX_CTL 152
-#define BCM281XX_PIN_RGMII_1_RXC 153
-#define BCM281XX_PIN_RGMII_1_RXD_0 154
-#define BCM281XX_PIN_RGMII_1_RXD_1 155
-#define BCM281XX_PIN_RGMII_1_RXD_2 156
-#define BCM281XX_PIN_RGMII_1_RXD_3 157
-#define BCM281XX_PIN_RGMII_1_TX_CTL 158
-#define BCM281XX_PIN_RGMII_1_TXC 159
-#define BCM281XX_PIN_RGMII_1_TXD_0 160
-#define BCM281XX_PIN_RGMII_1_TXD_1 161
-#define BCM281XX_PIN_RGMII_1_TXD_2 162
-#define BCM281XX_PIN_RGMII_1_TXD_3 163
-#define BCM281XX_PIN_RGMII_GPIO_0 164
-#define BCM281XX_PIN_RGMII_GPIO_1 165
-#define BCM281XX_PIN_RGMII_GPIO_2 166
-#define BCM281XX_PIN_RGMII_GPIO_3 167
-#define BCM281XX_PIN_RTXDATA2G_TXDATA3G1 168
-#define BCM281XX_PIN_RTXEN2G_TXDATA3G2 169
-#define BCM281XX_PIN_RXDATA3G0 170
-#define BCM281XX_PIN_RXDATA3G1 171
-#define BCM281XX_PIN_RXDATA3G2 172
-#define BCM281XX_PIN_SDIO1_CLK 173
-#define BCM281XX_PIN_SDIO1_CMD 174
-#define BCM281XX_PIN_SDIO1_DATA_0 175
-#define BCM281XX_PIN_SDIO1_DATA_1 176
-#define BCM281XX_PIN_SDIO1_DATA_2 177
-#define BCM281XX_PIN_SDIO1_DATA_3 178
-#define BCM281XX_PIN_SDIO4_CLK 179
-#define BCM281XX_PIN_SDIO4_CMD 180
-#define BCM281XX_PIN_SDIO4_DATA_0 181
-#define BCM281XX_PIN_SDIO4_DATA_1 182
-#define BCM281XX_PIN_SDIO4_DATA_2 183
-#define BCM281XX_PIN_SDIO4_DATA_3 184
-#define BCM281XX_PIN_SIM_CLK 185
-#define BCM281XX_PIN_SIM_DATA 186
-#define BCM281XX_PIN_SIM_DET 187
-#define BCM281XX_PIN_SIM_RESETN 188
-#define BCM281XX_PIN_SIM2_CLK 189
-#define BCM281XX_PIN_SIM2_DATA 190
-#define BCM281XX_PIN_SIM2_DET 191
-#define BCM281XX_PIN_SIM2_RESETN 192
-#define BCM281XX_PIN_SRI_C 193
-#define BCM281XX_PIN_SRI_D 194
-#define BCM281XX_PIN_SRI_E 195
-#define BCM281XX_PIN_SSP_EXTCLK 196
-#define BCM281XX_PIN_SSP0_CLK 197
-#define BCM281XX_PIN_SSP0_FS 198
-#define BCM281XX_PIN_SSP0_RXD 199
-#define BCM281XX_PIN_SSP0_TXD 200
-#define BCM281XX_PIN_SSP2_CLK 201
-#define BCM281XX_PIN_SSP2_FS_0 202
-#define BCM281XX_PIN_SSP2_FS_1 203
-#define BCM281XX_PIN_SSP2_FS_2 204
-#define BCM281XX_PIN_SSP2_FS_3 205
-#define BCM281XX_PIN_SSP2_RXD_0 206
-#define BCM281XX_PIN_SSP2_RXD_1 207
-#define BCM281XX_PIN_SSP2_TXD_0 208
-#define BCM281XX_PIN_SSP2_TXD_1 209
-#define BCM281XX_PIN_SSP3_CLK 210
-#define BCM281XX_PIN_SSP3_FS 211
-#define BCM281XX_PIN_SSP3_RXD 212
-#define BCM281XX_PIN_SSP3_TXD 213
-#define BCM281XX_PIN_SSP4_CLK 214
-#define BCM281XX_PIN_SSP4_FS 215
-#define BCM281XX_PIN_SSP4_RXD 216
-#define BCM281XX_PIN_SSP4_TXD 217
-#define BCM281XX_PIN_SSP5_CLK 218
-#define BCM281XX_PIN_SSP5_FS 219
-#define BCM281XX_PIN_SSP5_RXD 220
-#define BCM281XX_PIN_SSP5_TXD 221
-#define BCM281XX_PIN_SSP6_CLK 222
-#define BCM281XX_PIN_SSP6_FS 223
-#define BCM281XX_PIN_SSP6_RXD 224
-#define BCM281XX_PIN_SSP6_TXD 225
-#define BCM281XX_PIN_STAT_1 226
-#define BCM281XX_PIN_STAT_2 227
-#define BCM281XX_PIN_SYSCLKEN 228
-#define BCM281XX_PIN_TRACECLK 229
-#define BCM281XX_PIN_TRACEDT00 230
-#define BCM281XX_PIN_TRACEDT01 231
-#define BCM281XX_PIN_TRACEDT02 232
-#define BCM281XX_PIN_TRACEDT03 233
-#define BCM281XX_PIN_TRACEDT04 234
-#define BCM281XX_PIN_TRACEDT05 235
-#define BCM281XX_PIN_TRACEDT06 236
-#define BCM281XX_PIN_TRACEDT07 237
-#define BCM281XX_PIN_TRACEDT08 238
-#define BCM281XX_PIN_TRACEDT09 239
-#define BCM281XX_PIN_TRACEDT10 240
-#define BCM281XX_PIN_TRACEDT11 241
-#define BCM281XX_PIN_TRACEDT12 242
-#define BCM281XX_PIN_TRACEDT13 243
-#define BCM281XX_PIN_TRACEDT14 244
-#define BCM281XX_PIN_TRACEDT15 245
-#define BCM281XX_PIN_TXDATA3G0 246
-#define BCM281XX_PIN_TXPWRIND 247
-#define BCM281XX_PIN_UARTB1_UCTS 248
-#define BCM281XX_PIN_UARTB1_URTS 249
-#define BCM281XX_PIN_UARTB1_URXD 250
-#define BCM281XX_PIN_UARTB1_UTXD 251
-#define BCM281XX_PIN_UARTB2_URXD 252
-#define BCM281XX_PIN_UARTB2_UTXD 253
-#define BCM281XX_PIN_UARTB3_UCTS 254
-#define BCM281XX_PIN_UARTB3_URTS 255
-#define BCM281XX_PIN_UARTB3_URXD 256
-#define BCM281XX_PIN_UARTB3_UTXD 257
-#define BCM281XX_PIN_UARTB4_UCTS 258
-#define BCM281XX_PIN_UARTB4_URTS 259
-#define BCM281XX_PIN_UARTB4_URXD 260
-#define BCM281XX_PIN_UARTB4_UTXD 261
-#define BCM281XX_PIN_VC_CAM1_SCL 262
-#define BCM281XX_PIN_VC_CAM1_SDA 263
-#define BCM281XX_PIN_VC_CAM2_SCL 264
-#define BCM281XX_PIN_VC_CAM2_SDA 265
-#define BCM281XX_PIN_VC_CAM3_SCL 266
-#define BCM281XX_PIN_VC_CAM3_SDA 267
-
-#define BCM281XX_PIN_DESC(a, b, c) \
- { .number = a, .name = b, .drv_data = &c##_pin }
-
-/*
- * Pin description definition. The order here must be the same as defined in
- * the PADCTRLREG block in the RDB, since the pin number is used as an index
- * into this array.
- */
-static const struct pinctrl_pin_desc bcm281xx_pinctrl_pins[] = {
- BCM281XX_PIN_DESC(BCM281XX_PIN_ADCSYNC, "adcsync", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_BAT_RM, "bat_rm", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_BSC1_SCL, "bsc1_scl", i2c),
- BCM281XX_PIN_DESC(BCM281XX_PIN_BSC1_SDA, "bsc1_sda", i2c),
- BCM281XX_PIN_DESC(BCM281XX_PIN_BSC2_SCL, "bsc2_scl", i2c),
- BCM281XX_PIN_DESC(BCM281XX_PIN_BSC2_SDA, "bsc2_sda", i2c),
- BCM281XX_PIN_DESC(BCM281XX_PIN_CLASSGPWR, "classgpwr", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_CLK_CX8, "clk_cx8", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_CLKOUT_0, "clkout_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_CLKOUT_1, "clkout_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_CLKOUT_2, "clkout_2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_CLKOUT_3, "clkout_3", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_CLKREQ_IN_0, "clkreq_in_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_CLKREQ_IN_1, "clkreq_in_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_CWS_SYS_REQ1, "cws_sys_req1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_CWS_SYS_REQ2, "cws_sys_req2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_CWS_SYS_REQ3, "cws_sys_req3", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_DIGMIC1_CLK, "digmic1_clk", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_DIGMIC1_DQ, "digmic1_dq", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_DIGMIC2_CLK, "digmic2_clk", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_DIGMIC2_DQ, "digmic2_dq", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPEN13, "gpen13", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPEN14, "gpen14", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPEN15, "gpen15", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO00, "gpio00", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO01, "gpio01", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO02, "gpio02", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO03, "gpio03", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO04, "gpio04", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO05, "gpio05", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO06, "gpio06", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO07, "gpio07", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO08, "gpio08", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO09, "gpio09", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO10, "gpio10", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO11, "gpio11", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO12, "gpio12", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO13, "gpio13", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO14, "gpio14", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPS_PABLANK, "gps_pablank", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_GPS_TMARK, "gps_tmark", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_HDMI_SCL, "hdmi_scl", hdmi),
- BCM281XX_PIN_DESC(BCM281XX_PIN_HDMI_SDA, "hdmi_sda", hdmi),
- BCM281XX_PIN_DESC(BCM281XX_PIN_IC_DM, "ic_dm", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_IC_DP, "ic_dp", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_KP_COL_IP_0, "kp_col_ip_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_KP_COL_IP_1, "kp_col_ip_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_KP_COL_IP_2, "kp_col_ip_2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_KP_COL_IP_3, "kp_col_ip_3", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_KP_ROW_OP_0, "kp_row_op_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_KP_ROW_OP_1, "kp_row_op_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_KP_ROW_OP_2, "kp_row_op_2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_KP_ROW_OP_3, "kp_row_op_3", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_0, "lcd_b_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_1, "lcd_b_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_2, "lcd_b_2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_3, "lcd_b_3", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_4, "lcd_b_4", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_5, "lcd_b_5", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_6, "lcd_b_6", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_7, "lcd_b_7", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_0, "lcd_g_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_1, "lcd_g_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_2, "lcd_g_2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_3, "lcd_g_3", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_4, "lcd_g_4", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_5, "lcd_g_5", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_6, "lcd_g_6", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_7, "lcd_g_7", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_HSYNC, "lcd_hsync", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_OE, "lcd_oe", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_PCLK, "lcd_pclk", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_0, "lcd_r_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_1, "lcd_r_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_2, "lcd_r_2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_3, "lcd_r_3", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_4, "lcd_r_4", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_5, "lcd_r_5", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_6, "lcd_r_6", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_7, "lcd_r_7", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_VSYNC, "lcd_vsync", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO0, "mdmgpio0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO1, "mdmgpio1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO2, "mdmgpio2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO3, "mdmgpio3", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO4, "mdmgpio4", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO5, "mdmgpio5", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO6, "mdmgpio6", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO7, "mdmgpio7", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO8, "mdmgpio8", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_0, "mphi_data_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_1, "mphi_data_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_2, "mphi_data_2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_3, "mphi_data_3", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_4, "mphi_data_4", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_5, "mphi_data_5", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_6, "mphi_data_6", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_7, "mphi_data_7", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_8, "mphi_data_8", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_9, "mphi_data_9", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_10, "mphi_data_10", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_11, "mphi_data_11", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_12, "mphi_data_12", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_13, "mphi_data_13", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_14, "mphi_data_14", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_15, "mphi_data_15", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HA0, "mphi_ha0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HAT0, "mphi_hat0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HAT1, "mphi_hat1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HCE0_N, "mphi_hce0_n", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HCE1_N, "mphi_hce1_n", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HRD_N, "mphi_hrd_n", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HWR_N, "mphi_hwr_n", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_RUN0, "mphi_run0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_RUN1, "mphi_run1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MTX_SCAN_CLK, "mtx_scan_clk", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_MTX_SCAN_DATA, "mtx_scan_data", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_0, "nand_ad_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_1, "nand_ad_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_2, "nand_ad_2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_3, "nand_ad_3", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_4, "nand_ad_4", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_5, "nand_ad_5", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_6, "nand_ad_6", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_7, "nand_ad_7", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_ALE, "nand_ale", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_CEN_0, "nand_cen_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_CEN_1, "nand_cen_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_CLE, "nand_cle", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_OEN, "nand_oen", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_RDY_0, "nand_rdy_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_RDY_1, "nand_rdy_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_WEN, "nand_wen", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_WP, "nand_wp", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_PC1, "pc1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_PC2, "pc2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_PMU_INT, "pmu_int", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_PMU_SCL, "pmu_scl", i2c),
- BCM281XX_PIN_DESC(BCM281XX_PIN_PMU_SDA, "pmu_sda", i2c),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RFST2G_MTSLOTEN3G, "rfst2g_mtsloten3g",
- std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RX_CTL, "rgmii_0_rx_ctl", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXC, "rgmii_0_rxc", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXD_0, "rgmii_0_rxd_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXD_1, "rgmii_0_rxd_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXD_2, "rgmii_0_rxd_2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXD_3, "rgmii_0_rxd_3", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TX_CTL, "rgmii_0_tx_ctl", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXC, "rgmii_0_txc", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXD_0, "rgmii_0_txd_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXD_1, "rgmii_0_txd_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXD_2, "rgmii_0_txd_2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXD_3, "rgmii_0_txd_3", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RX_CTL, "rgmii_1_rx_ctl", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXC, "rgmii_1_rxc", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXD_0, "rgmii_1_rxd_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXD_1, "rgmii_1_rxd_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXD_2, "rgmii_1_rxd_2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXD_3, "rgmii_1_rxd_3", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TX_CTL, "rgmii_1_tx_ctl", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXC, "rgmii_1_txc", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXD_0, "rgmii_1_txd_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXD_1, "rgmii_1_txd_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXD_2, "rgmii_1_txd_2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXD_3, "rgmii_1_txd_3", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_GPIO_0, "rgmii_gpio_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_GPIO_1, "rgmii_gpio_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_GPIO_2, "rgmii_gpio_2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_GPIO_3, "rgmii_gpio_3", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RTXDATA2G_TXDATA3G1,
- "rtxdata2g_txdata3g1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RTXEN2G_TXDATA3G2, "rtxen2g_txdata3g2",
- std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RXDATA3G0, "rxdata3g0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RXDATA3G1, "rxdata3g1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_RXDATA3G2, "rxdata3g2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_CLK, "sdio1_clk", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_CMD, "sdio1_cmd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_DATA_0, "sdio1_data_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_DATA_1, "sdio1_data_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_DATA_2, "sdio1_data_2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_DATA_3, "sdio1_data_3", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_CLK, "sdio4_clk", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_CMD, "sdio4_cmd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_DATA_0, "sdio4_data_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_DATA_1, "sdio4_data_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_DATA_2, "sdio4_data_2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_DATA_3, "sdio4_data_3", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SIM_CLK, "sim_clk", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SIM_DATA, "sim_data", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SIM_DET, "sim_det", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SIM_RESETN, "sim_resetn", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SIM2_CLK, "sim2_clk", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SIM2_DATA, "sim2_data", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SIM2_DET, "sim2_det", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SIM2_RESETN, "sim2_resetn", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SRI_C, "sri_c", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SRI_D, "sri_d", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SRI_E, "sri_e", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP_EXTCLK, "ssp_extclk", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP0_CLK, "ssp0_clk", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP0_FS, "ssp0_fs", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP0_RXD, "ssp0_rxd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP0_TXD, "ssp0_txd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_CLK, "ssp2_clk", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_FS_0, "ssp2_fs_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_FS_1, "ssp2_fs_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_FS_2, "ssp2_fs_2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_FS_3, "ssp2_fs_3", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_RXD_0, "ssp2_rxd_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_RXD_1, "ssp2_rxd_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_TXD_0, "ssp2_txd_0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_TXD_1, "ssp2_txd_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP3_CLK, "ssp3_clk", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP3_FS, "ssp3_fs", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP3_RXD, "ssp3_rxd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP3_TXD, "ssp3_txd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP4_CLK, "ssp4_clk", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP4_FS, "ssp4_fs", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP4_RXD, "ssp4_rxd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP4_TXD, "ssp4_txd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP5_CLK, "ssp5_clk", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP5_FS, "ssp5_fs", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP5_RXD, "ssp5_rxd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP5_TXD, "ssp5_txd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP6_CLK, "ssp6_clk", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP6_FS, "ssp6_fs", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP6_RXD, "ssp6_rxd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SSP6_TXD, "ssp6_txd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_STAT_1, "stat_1", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_STAT_2, "stat_2", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_SYSCLKEN, "sysclken", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TRACECLK, "traceclk", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT00, "tracedt00", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT01, "tracedt01", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT02, "tracedt02", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT03, "tracedt03", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT04, "tracedt04", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT05, "tracedt05", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT06, "tracedt06", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT07, "tracedt07", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT08, "tracedt08", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT09, "tracedt09", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT10, "tracedt10", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT11, "tracedt11", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT12, "tracedt12", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT13, "tracedt13", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT14, "tracedt14", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT15, "tracedt15", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TXDATA3G0, "txdata3g0", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_TXPWRIND, "txpwrind", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB1_UCTS, "uartb1_ucts", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB1_URTS, "uartb1_urts", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB1_URXD, "uartb1_urxd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB1_UTXD, "uartb1_utxd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB2_URXD, "uartb2_urxd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB2_UTXD, "uartb2_utxd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB3_UCTS, "uartb3_ucts", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB3_URTS, "uartb3_urts", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB3_URXD, "uartb3_urxd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB3_UTXD, "uartb3_utxd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB4_UCTS, "uartb4_ucts", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB4_URTS, "uartb4_urts", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB4_URXD, "uartb4_urxd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB4_UTXD, "uartb4_utxd", std),
- BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM1_SCL, "vc_cam1_scl", i2c),
- BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM1_SDA, "vc_cam1_sda", i2c),
- BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM2_SCL, "vc_cam2_scl", i2c),
- BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM2_SDA, "vc_cam2_sda", i2c),
- BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM3_SCL, "vc_cam3_scl", i2c),
- BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM3_SDA, "vc_cam3_sda", i2c),
-};
-
-static const char * const bcm281xx_alt_groups[] = {
- "adcsync",
- "bat_rm",
- "bsc1_scl",
- "bsc1_sda",
- "bsc2_scl",
- "bsc2_sda",
- "classgpwr",
- "clk_cx8",
- "clkout_0",
- "clkout_1",
- "clkout_2",
- "clkout_3",
- "clkreq_in_0",
- "clkreq_in_1",
- "cws_sys_req1",
- "cws_sys_req2",
- "cws_sys_req3",
- "digmic1_clk",
- "digmic1_dq",
- "digmic2_clk",
- "digmic2_dq",
- "gpen13",
- "gpen14",
- "gpen15",
- "gpio00",
- "gpio01",
- "gpio02",
- "gpio03",
- "gpio04",
- "gpio05",
- "gpio06",
- "gpio07",
- "gpio08",
- "gpio09",
- "gpio10",
- "gpio11",
- "gpio12",
- "gpio13",
- "gpio14",
- "gps_pablank",
- "gps_tmark",
- "hdmi_scl",
- "hdmi_sda",
- "ic_dm",
- "ic_dp",
- "kp_col_ip_0",
- "kp_col_ip_1",
- "kp_col_ip_2",
- "kp_col_ip_3",
- "kp_row_op_0",
- "kp_row_op_1",
- "kp_row_op_2",
- "kp_row_op_3",
- "lcd_b_0",
- "lcd_b_1",
- "lcd_b_2",
- "lcd_b_3",
- "lcd_b_4",
- "lcd_b_5",
- "lcd_b_6",
- "lcd_b_7",
- "lcd_g_0",
- "lcd_g_1",
- "lcd_g_2",
- "lcd_g_3",
- "lcd_g_4",
- "lcd_g_5",
- "lcd_g_6",
- "lcd_g_7",
- "lcd_hsync",
- "lcd_oe",
- "lcd_pclk",
- "lcd_r_0",
- "lcd_r_1",
- "lcd_r_2",
- "lcd_r_3",
- "lcd_r_4",
- "lcd_r_5",
- "lcd_r_6",
- "lcd_r_7",
- "lcd_vsync",
- "mdmgpio0",
- "mdmgpio1",
- "mdmgpio2",
- "mdmgpio3",
- "mdmgpio4",
- "mdmgpio5",
- "mdmgpio6",
- "mdmgpio7",
- "mdmgpio8",
- "mphi_data_0",
- "mphi_data_1",
- "mphi_data_2",
- "mphi_data_3",
- "mphi_data_4",
- "mphi_data_5",
- "mphi_data_6",
- "mphi_data_7",
- "mphi_data_8",
- "mphi_data_9",
- "mphi_data_10",
- "mphi_data_11",
- "mphi_data_12",
- "mphi_data_13",
- "mphi_data_14",
- "mphi_data_15",
- "mphi_ha0",
- "mphi_hat0",
- "mphi_hat1",
- "mphi_hce0_n",
- "mphi_hce1_n",
- "mphi_hrd_n",
- "mphi_hwr_n",
- "mphi_run0",
- "mphi_run1",
- "mtx_scan_clk",
- "mtx_scan_data",
- "nand_ad_0",
- "nand_ad_1",
- "nand_ad_2",
- "nand_ad_3",
- "nand_ad_4",
- "nand_ad_5",
- "nand_ad_6",
- "nand_ad_7",
- "nand_ale",
- "nand_cen_0",
- "nand_cen_1",
- "nand_cle",
- "nand_oen",
- "nand_rdy_0",
- "nand_rdy_1",
- "nand_wen",
- "nand_wp",
- "pc1",
- "pc2",
- "pmu_int",
- "pmu_scl",
- "pmu_sda",
- "rfst2g_mtsloten3g",
- "rgmii_0_rx_ctl",
- "rgmii_0_rxc",
- "rgmii_0_rxd_0",
- "rgmii_0_rxd_1",
- "rgmii_0_rxd_2",
- "rgmii_0_rxd_3",
- "rgmii_0_tx_ctl",
- "rgmii_0_txc",
- "rgmii_0_txd_0",
- "rgmii_0_txd_1",
- "rgmii_0_txd_2",
- "rgmii_0_txd_3",
- "rgmii_1_rx_ctl",
- "rgmii_1_rxc",
- "rgmii_1_rxd_0",
- "rgmii_1_rxd_1",
- "rgmii_1_rxd_2",
- "rgmii_1_rxd_3",
- "rgmii_1_tx_ctl",
- "rgmii_1_txc",
- "rgmii_1_txd_0",
- "rgmii_1_txd_1",
- "rgmii_1_txd_2",
- "rgmii_1_txd_3",
- "rgmii_gpio_0",
- "rgmii_gpio_1",
- "rgmii_gpio_2",
- "rgmii_gpio_3",
- "rtxdata2g_txdata3g1",
- "rtxen2g_txdata3g2",
- "rxdata3g0",
- "rxdata3g1",
- "rxdata3g2",
- "sdio1_clk",
- "sdio1_cmd",
- "sdio1_data_0",
- "sdio1_data_1",
- "sdio1_data_2",
- "sdio1_data_3",
- "sdio4_clk",
- "sdio4_cmd",
- "sdio4_data_0",
- "sdio4_data_1",
- "sdio4_data_2",
- "sdio4_data_3",
- "sim_clk",
- "sim_data",
- "sim_det",
- "sim_resetn",
- "sim2_clk",
- "sim2_data",
- "sim2_det",
- "sim2_resetn",
- "sri_c",
- "sri_d",
- "sri_e",
- "ssp_extclk",
- "ssp0_clk",
- "ssp0_fs",
- "ssp0_rxd",
- "ssp0_txd",
- "ssp2_clk",
- "ssp2_fs_0",
- "ssp2_fs_1",
- "ssp2_fs_2",
- "ssp2_fs_3",
- "ssp2_rxd_0",
- "ssp2_rxd_1",
- "ssp2_txd_0",
- "ssp2_txd_1",
- "ssp3_clk",
- "ssp3_fs",
- "ssp3_rxd",
- "ssp3_txd",
- "ssp4_clk",
- "ssp4_fs",
- "ssp4_rxd",
- "ssp4_txd",
- "ssp5_clk",
- "ssp5_fs",
- "ssp5_rxd",
- "ssp5_txd",
- "ssp6_clk",
- "ssp6_fs",
- "ssp6_rxd",
- "ssp6_txd",
- "stat_1",
- "stat_2",
- "sysclken",
- "traceclk",
- "tracedt00",
- "tracedt01",
- "tracedt02",
- "tracedt03",
- "tracedt04",
- "tracedt05",
- "tracedt06",
- "tracedt07",
- "tracedt08",
- "tracedt09",
- "tracedt10",
- "tracedt11",
- "tracedt12",
- "tracedt13",
- "tracedt14",
- "tracedt15",
- "txdata3g0",
- "txpwrind",
- "uartb1_ucts",
- "uartb1_urts",
- "uartb1_urxd",
- "uartb1_utxd",
- "uartb2_urxd",
- "uartb2_utxd",
- "uartb3_ucts",
- "uartb3_urts",
- "uartb3_urxd",
- "uartb3_utxd",
- "uartb4_ucts",
- "uartb4_urts",
- "uartb4_urxd",
- "uartb4_utxd",
- "vc_cam1_scl",
- "vc_cam1_sda",
- "vc_cam2_scl",
- "vc_cam2_sda",
- "vc_cam3_scl",
- "vc_cam3_sda",
-};
-
-/* Every pin can implement all ALT1-ALT4 functions */
-#define BCM281XX_PIN_FUNCTION(fcn_name) \
-{ \
- .name = #fcn_name, \
- .groups = bcm281xx_alt_groups, \
- .ngroups = ARRAY_SIZE(bcm281xx_alt_groups), \
-}
-
-static const struct bcm281xx_pin_function bcm281xx_functions[] = {
- BCM281XX_PIN_FUNCTION(alt1),
- BCM281XX_PIN_FUNCTION(alt2),
- BCM281XX_PIN_FUNCTION(alt3),
- BCM281XX_PIN_FUNCTION(alt4),
-};
-
-static struct bcm281xx_pinctrl_data bcm281xx_pinctrl = {
- .pins = bcm281xx_pinctrl_pins,
- .npins = ARRAY_SIZE(bcm281xx_pinctrl_pins),
- .functions = bcm281xx_functions,
- .nfunctions = ARRAY_SIZE(bcm281xx_functions),
-};
-
-static inline enum bcm281xx_pin_type pin_type_get(struct pinctrl_dev *pctldev,
- unsigned pin)
-{
- struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-
- if (pin >= pdata->npins)
- return BCM281XX_PIN_TYPE_UNKNOWN;
-
- return *(enum bcm281xx_pin_type *)(pdata->pins[pin].drv_data);
-}
-
-#define BCM281XX_PIN_SHIFT(type, param) \
- (BCM281XX_ ## type ## _PIN_REG_ ## param ## _SHIFT)
-
-#define BCM281XX_PIN_MASK(type, param) \
- (BCM281XX_ ## type ## _PIN_REG_ ## param ## _MASK)
-
-/*
- * This helper function is used to build up the value and mask used to write to
- * a pin register, but does not actually write to the register.
- */
-static inline void bcm281xx_pin_update(u32 *reg_val, u32 *reg_mask,
- u32 param_val, u32 param_shift,
- u32 param_mask)
-{
- *reg_val &= ~param_mask;
- *reg_val |= (param_val << param_shift) & param_mask;
- *reg_mask |= param_mask;
-}
-
-static const struct regmap_config bcm281xx_pinctrl_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = BCM281XX_PIN_VC_CAM3_SDA,
-};
-
-static int bcm281xx_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
-{
- struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-
- return pdata->npins;
-}
-
-static const char *bcm281xx_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
- unsigned group)
-{
- struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-
- return pdata->pins[group].name;
-}
-
-static int bcm281xx_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
- unsigned group,
- const unsigned **pins,
- unsigned *num_pins)
-{
- struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-
- *pins = &pdata->pins[group].number;
- *num_pins = 1;
-
- return 0;
-}
-
-static void bcm281xx_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
- struct seq_file *s,
- unsigned offset)
-{
- seq_printf(s, " %s", dev_name(pctldev->dev));
-}
-
-static struct pinctrl_ops bcm281xx_pinctrl_ops = {
- .get_groups_count = bcm281xx_pinctrl_get_groups_count,
- .get_group_name = bcm281xx_pinctrl_get_group_name,
- .get_group_pins = bcm281xx_pinctrl_get_group_pins,
- .pin_dbg_show = bcm281xx_pinctrl_pin_dbg_show,
- .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
- .dt_free_map = pinctrl_utils_dt_free_map,
-};
-
-static int bcm281xx_pinctrl_get_fcns_count(struct pinctrl_dev *pctldev)
-{
- struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-
- return pdata->nfunctions;
-}
-
-static const char *bcm281xx_pinctrl_get_fcn_name(struct pinctrl_dev *pctldev,
- unsigned function)
-{
- struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-
- return pdata->functions[function].name;
-}
-
-static int bcm281xx_pinctrl_get_fcn_groups(struct pinctrl_dev *pctldev,
- unsigned function,
- const char * const **groups,
- unsigned * const num_groups)
-{
- struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-
- *groups = pdata->functions[function].groups;
- *num_groups = pdata->functions[function].ngroups;
-
- return 0;
-}
-
-static int bcm281xx_pinmux_set(struct pinctrl_dev *pctldev,
- unsigned function,
- unsigned group)
-{
- struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
- const struct bcm281xx_pin_function *f = &pdata->functions[function];
- u32 offset = 4 * pdata->pins[group].number;
- int rc = 0;
-
- dev_dbg(pctldev->dev,
- "%s(): Enable function %s (%d) of pin %s (%d) @offset 0x%x.\n",
- __func__, f->name, function, pdata->pins[group].name,
- pdata->pins[group].number, offset);
-
- rc = regmap_update_bits(pdata->regmap, offset,
- BCM281XX_PIN_REG_F_SEL_MASK,
- function << BCM281XX_PIN_REG_F_SEL_SHIFT);
- if (rc)
- dev_err(pctldev->dev,
- "Error updating register for pin %s (%d).\n",
- pdata->pins[group].name, pdata->pins[group].number);
-
- return rc;
-}
-
-static struct pinmux_ops bcm281xx_pinctrl_pinmux_ops = {
- .get_functions_count = bcm281xx_pinctrl_get_fcns_count,
- .get_function_name = bcm281xx_pinctrl_get_fcn_name,
- .get_function_groups = bcm281xx_pinctrl_get_fcn_groups,
- .set_mux = bcm281xx_pinmux_set,
-};
-
-static int bcm281xx_pinctrl_pin_config_get(struct pinctrl_dev *pctldev,
- unsigned pin,
- unsigned long *config)
-{
- return -ENOTSUPP;
-}
-
-
-/* Goes through the configs and update register val/mask */
-static int bcm281xx_std_pin_update(struct pinctrl_dev *pctldev,
- unsigned pin,
- unsigned long *configs,
- unsigned num_configs,
- u32 *val,
- u32 *mask)
-{
- struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
- int i;
- enum pin_config_param param;
- u16 arg;
-
- for (i = 0; i < num_configs; i++) {
- param = pinconf_to_config_param(configs[i]);
- arg = pinconf_to_config_argument(configs[i]);
-
- switch (param) {
- case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
- arg = (arg >= 1 ? 1 : 0);
- bcm281xx_pin_update(val, mask, arg,
- BCM281XX_PIN_SHIFT(STD, HYST),
- BCM281XX_PIN_MASK(STD, HYST));
- break;
- /*
- * The pin bias can only be one of pull-up, pull-down, or
- * disable. The user does not need to specify a value for the
- * property, and the default value from pinconf-generic is
- * ignored.
- */
- case PIN_CONFIG_BIAS_DISABLE:
- bcm281xx_pin_update(val, mask, 0,
- BCM281XX_PIN_SHIFT(STD, PULL_UP),
- BCM281XX_PIN_MASK(STD, PULL_UP));
- bcm281xx_pin_update(val, mask, 0,
- BCM281XX_PIN_SHIFT(STD, PULL_DN),
- BCM281XX_PIN_MASK(STD, PULL_DN));
- break;
-
- case PIN_CONFIG_BIAS_PULL_UP:
- bcm281xx_pin_update(val, mask, 1,
- BCM281XX_PIN_SHIFT(STD, PULL_UP),
- BCM281XX_PIN_MASK(STD, PULL_UP));
- bcm281xx_pin_update(val, mask, 0,
- BCM281XX_PIN_SHIFT(STD, PULL_DN),
- BCM281XX_PIN_MASK(STD, PULL_DN));
- break;
-
- case PIN_CONFIG_BIAS_PULL_DOWN:
- bcm281xx_pin_update(val, mask, 0,
- BCM281XX_PIN_SHIFT(STD, PULL_UP),
- BCM281XX_PIN_MASK(STD, PULL_UP));
- bcm281xx_pin_update(val, mask, 1,
- BCM281XX_PIN_SHIFT(STD, PULL_DN),
- BCM281XX_PIN_MASK(STD, PULL_DN));
- break;
-
- case PIN_CONFIG_SLEW_RATE:
- arg = (arg >= 1 ? 1 : 0);
- bcm281xx_pin_update(val, mask, arg,
- BCM281XX_PIN_SHIFT(STD, SLEW),
- BCM281XX_PIN_MASK(STD, SLEW));
- break;
-
- case PIN_CONFIG_INPUT_ENABLE:
- /* inversed since register is for input _disable_ */
- arg = (arg >= 1 ? 0 : 1);
- bcm281xx_pin_update(val, mask, arg,
- BCM281XX_PIN_SHIFT(STD, INPUT_DIS),
- BCM281XX_PIN_MASK(STD, INPUT_DIS));
- break;
-
- case PIN_CONFIG_DRIVE_STRENGTH:
- /* Valid range is 2-16 mA, even numbers only */
- if ((arg < 2) || (arg > 16) || (arg % 2)) {
- dev_err(pctldev->dev,
- "Invalid Drive Strength value (%d) for "
- "pin %s (%d). Valid values are "
- "(2..16) mA, even numbers only.\n",
- arg, pdata->pins[pin].name, pin);
- return -EINVAL;
- }
- bcm281xx_pin_update(val, mask, (arg/2)-1,
- BCM281XX_PIN_SHIFT(STD, DRV_STR),
- BCM281XX_PIN_MASK(STD, DRV_STR));
- break;
-
- default:
- dev_err(pctldev->dev,
- "Unrecognized pin config %d for pin %s (%d).\n",
- param, pdata->pins[pin].name, pin);
- return -EINVAL;
-
- } /* switch config */
- } /* for each config */
-
- return 0;
-}
-
-/*
- * The pull-up strength for an I2C pin is represented by bits 4-6 in the
- * register with the following mapping:
- * 0b000: No pull-up
- * 0b001: 1200 Ohm
- * 0b010: 1800 Ohm
- * 0b011: 720 Ohm
- * 0b100: 2700 Ohm
- * 0b101: 831 Ohm
- * 0b110: 1080 Ohm
- * 0b111: 568 Ohm
- * This array maps pull-up strength in Ohms to register values (1+index).
- */
-static const u16 bcm281xx_pullup_map[] = {
- 1200, 1800, 720, 2700, 831, 1080, 568
-};
-
-/* Goes through the configs and update register val/mask */
-static int bcm281xx_i2c_pin_update(struct pinctrl_dev *pctldev,
- unsigned pin,
- unsigned long *configs,
- unsigned num_configs,
- u32 *val,
- u32 *mask)
-{
- struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
- int i, j;
- enum pin_config_param param;
- u16 arg;
-
- for (i = 0; i < num_configs; i++) {
- param = pinconf_to_config_param(configs[i]);
- arg = pinconf_to_config_argument(configs[i]);
-
- switch (param) {
- case PIN_CONFIG_BIAS_PULL_UP:
- for (j = 0; j < ARRAY_SIZE(bcm281xx_pullup_map); j++)
- if (bcm281xx_pullup_map[j] == arg)
- break;
-
- if (j == ARRAY_SIZE(bcm281xx_pullup_map)) {
- dev_err(pctldev->dev,
- "Invalid pull-up value (%d) for pin %s "
- "(%d). Valid values are 568, 720, 831, "
- "1080, 1200, 1800, 2700 Ohms.\n",
- arg, pdata->pins[pin].name, pin);
- return -EINVAL;
- }
-
- bcm281xx_pin_update(val, mask, j+1,
- BCM281XX_PIN_SHIFT(I2C, PULL_UP_STR),
- BCM281XX_PIN_MASK(I2C, PULL_UP_STR));
- break;
-
- case PIN_CONFIG_BIAS_DISABLE:
- bcm281xx_pin_update(val, mask, 0,
- BCM281XX_PIN_SHIFT(I2C, PULL_UP_STR),
- BCM281XX_PIN_MASK(I2C, PULL_UP_STR));
- break;
-
- case PIN_CONFIG_SLEW_RATE:
- arg = (arg >= 1 ? 1 : 0);
- bcm281xx_pin_update(val, mask, arg,
- BCM281XX_PIN_SHIFT(I2C, SLEW),
- BCM281XX_PIN_MASK(I2C, SLEW));
- break;
-
- case PIN_CONFIG_INPUT_ENABLE:
- /* inversed since register is for input _disable_ */
- arg = (arg >= 1 ? 0 : 1);
- bcm281xx_pin_update(val, mask, arg,
- BCM281XX_PIN_SHIFT(I2C, INPUT_DIS),
- BCM281XX_PIN_MASK(I2C, INPUT_DIS));
- break;
-
- default:
- dev_err(pctldev->dev,
- "Unrecognized pin config %d for pin %s (%d).\n",
- param, pdata->pins[pin].name, pin);
- return -EINVAL;
-
- } /* switch config */
- } /* for each config */
-
- return 0;
-}
-
-/* Goes through the configs and update register val/mask */
-static int bcm281xx_hdmi_pin_update(struct pinctrl_dev *pctldev,
- unsigned pin,
- unsigned long *configs,
- unsigned num_configs,
- u32 *val,
- u32 *mask)
-{
- struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
- int i;
- enum pin_config_param param;
- u16 arg;
-
- for (i = 0; i < num_configs; i++) {
- param = pinconf_to_config_param(configs[i]);
- arg = pinconf_to_config_argument(configs[i]);
-
- switch (param) {
- case PIN_CONFIG_SLEW_RATE:
- arg = (arg >= 1 ? 1 : 0);
- bcm281xx_pin_update(val, mask, arg,
- BCM281XX_PIN_SHIFT(HDMI, MODE),
- BCM281XX_PIN_MASK(HDMI, MODE));
- break;
-
- case PIN_CONFIG_INPUT_ENABLE:
- /* inversed since register is for input _disable_ */
- arg = (arg >= 1 ? 0 : 1);
- bcm281xx_pin_update(val, mask, arg,
- BCM281XX_PIN_SHIFT(HDMI, INPUT_DIS),
- BCM281XX_PIN_MASK(HDMI, INPUT_DIS));
- break;
-
- default:
- dev_err(pctldev->dev,
- "Unrecognized pin config %d for pin %s (%d).\n",
- param, pdata->pins[pin].name, pin);
- return -EINVAL;
-
- } /* switch config */
- } /* for each config */
-
- return 0;
-}
-
-static int bcm281xx_pinctrl_pin_config_set(struct pinctrl_dev *pctldev,
- unsigned pin,
- unsigned long *configs,
- unsigned num_configs)
-{
- struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
- enum bcm281xx_pin_type pin_type;
- u32 offset = 4 * pin;
- u32 cfg_val, cfg_mask;
- int rc;
-
- cfg_val = 0;
- cfg_mask = 0;
- pin_type = pin_type_get(pctldev, pin);
-
- /* Different pins have different configuration options */
- switch (pin_type) {
- case BCM281XX_PIN_TYPE_STD:
- rc = bcm281xx_std_pin_update(pctldev, pin, configs,
- num_configs, &cfg_val, &cfg_mask);
- break;
-
- case BCM281XX_PIN_TYPE_I2C:
- rc = bcm281xx_i2c_pin_update(pctldev, pin, configs,
- num_configs, &cfg_val, &cfg_mask);
- break;
-
- case BCM281XX_PIN_TYPE_HDMI:
- rc = bcm281xx_hdmi_pin_update(pctldev, pin, configs,
- num_configs, &cfg_val, &cfg_mask);
- break;
-
- default:
- dev_err(pctldev->dev, "Unknown pin type for pin %s (%d).\n",
- pdata->pins[pin].name, pin);
- return -EINVAL;
-
- } /* switch pin type */
-
- if (rc)
- return rc;
-
- dev_dbg(pctldev->dev,
- "%s(): Set pin %s (%d) with config 0x%x, mask 0x%x\n",
- __func__, pdata->pins[pin].name, pin, cfg_val, cfg_mask);
-
- rc = regmap_update_bits(pdata->regmap, offset, cfg_mask, cfg_val);
- if (rc) {
- dev_err(pctldev->dev,
- "Error updating register for pin %s (%d).\n",
- pdata->pins[pin].name, pin);
- return rc;
- }
-
- return 0;
-}
-
-static struct pinconf_ops bcm281xx_pinctrl_pinconf_ops = {
- .pin_config_get = bcm281xx_pinctrl_pin_config_get,
- .pin_config_set = bcm281xx_pinctrl_pin_config_set,
-};
-
-static struct pinctrl_desc bcm281xx_pinctrl_desc = {
- /* name, pins, npins members initialized in probe function */
- .pctlops = &bcm281xx_pinctrl_ops,
- .pmxops = &bcm281xx_pinctrl_pinmux_ops,
- .confops = &bcm281xx_pinctrl_pinconf_ops,
- .owner = THIS_MODULE,
-};
-
-static int __init bcm281xx_pinctrl_probe(struct platform_device *pdev)
-{
- struct bcm281xx_pinctrl_data *pdata = &bcm281xx_pinctrl;
- struct resource *res;
- struct pinctrl_dev *pctl;
-
- /* So far We can assume there is only 1 bank of registers */
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- pdata->reg_base = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(pdata->reg_base)) {
- dev_err(&pdev->dev, "Failed to ioremap MEM resource\n");
- return -ENODEV;
- }
-
- /* Initialize the dynamic part of pinctrl_desc */
- pdata->regmap = devm_regmap_init_mmio(&pdev->dev, pdata->reg_base,
- &bcm281xx_pinctrl_regmap_config);
- if (IS_ERR(pdata->regmap)) {
- dev_err(&pdev->dev, "Regmap MMIO init failed.\n");
- return -ENODEV;
- }
-
- bcm281xx_pinctrl_desc.name = dev_name(&pdev->dev);
- bcm281xx_pinctrl_desc.pins = bcm281xx_pinctrl.pins;
- bcm281xx_pinctrl_desc.npins = bcm281xx_pinctrl.npins;
-
- pctl = pinctrl_register(&bcm281xx_pinctrl_desc,
- &pdev->dev,
- pdata);
- if (!pctl) {
- dev_err(&pdev->dev, "Failed to register pinctrl\n");
- return -ENODEV;
- }
-
- platform_set_drvdata(pdev, pdata);
-
- return 0;
-}
-
-static const struct of_device_id bcm281xx_pinctrl_of_match[] = {
- { .compatible = "brcm,bcm11351-pinctrl", },
- { },
-};
-
-static struct platform_driver bcm281xx_pinctrl_driver = {
- .driver = {
- .name = "bcm281xx-pinctrl",
- .of_match_table = bcm281xx_pinctrl_of_match,
- },
-};
-
-module_platform_driver_probe(bcm281xx_pinctrl_driver, bcm281xx_pinctrl_probe);
-
-MODULE_AUTHOR("Broadcom Corporation <bcm-kernel-feedback-list@broadcom.com>");
-MODULE_AUTHOR("Sherman Yin <syin@broadcom.com>");
-MODULE_DESCRIPTION("Broadcom BCM281xx pinctrl driver");
-MODULE_LICENSE("GPL v2");
+++ /dev/null
-/*
- * Driver for Broadcom BCM2835 GPIO unit (pinctrl + GPIO)
- *
- * Copyright (C) 2012 Chris Boot, Simon Arlott, Stephen Warren
- *
- * This driver is inspired by:
- * pinctrl-nomadik.c, please see original file for copyright information
- * pinctrl-tegra.c, please see original file for copyright information
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <linux/bitmap.h>
-#include <linux/bug.h>
-#include <linux/delay.h>
-#include <linux/device.h>
-#include <linux/err.h>
-#include <linux/gpio.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/irqdesc.h>
-#include <linux/irqdomain.h>
-#include <linux/module.h>
-#include <linux/of_address.h>
-#include <linux/of.h>
-#include <linux/of_irq.h>
-#include <linux/pinctrl/consumer.h>
-#include <linux/pinctrl/machine.h>
-#include <linux/pinctrl/pinconf.h>
-#include <linux/pinctrl/pinctrl.h>
-#include <linux/pinctrl/pinmux.h>
-#include <linux/platform_device.h>
-#include <linux/seq_file.h>
-#include <linux/slab.h>
-#include <linux/spinlock.h>
-#include <linux/types.h>
-
-#define MODULE_NAME "pinctrl-bcm2835"
-#define BCM2835_NUM_GPIOS 54
-#define BCM2835_NUM_BANKS 2
-
-#define BCM2835_PIN_BITMAP_SZ \
- DIV_ROUND_UP(BCM2835_NUM_GPIOS, sizeof(unsigned long) * 8)
-
-/* GPIO register offsets */
-#define GPFSEL0 0x0 /* Function Select */
-#define GPSET0 0x1c /* Pin Output Set */
-#define GPCLR0 0x28 /* Pin Output Clear */
-#define GPLEV0 0x34 /* Pin Level */
-#define GPEDS0 0x40 /* Pin Event Detect Status */
-#define GPREN0 0x4c /* Pin Rising Edge Detect Enable */
-#define GPFEN0 0x58 /* Pin Falling Edge Detect Enable */
-#define GPHEN0 0x64 /* Pin High Detect Enable */
-#define GPLEN0 0x70 /* Pin Low Detect Enable */
-#define GPAREN0 0x7c /* Pin Async Rising Edge Detect */
-#define GPAFEN0 0x88 /* Pin Async Falling Edge Detect */
-#define GPPUD 0x94 /* Pin Pull-up/down Enable */
-#define GPPUDCLK0 0x98 /* Pin Pull-up/down Enable Clock */
-
-#define FSEL_REG(p) (GPFSEL0 + (((p) / 10) * 4))
-#define FSEL_SHIFT(p) (((p) % 10) * 3)
-#define GPIO_REG_OFFSET(p) ((p) / 32)
-#define GPIO_REG_SHIFT(p) ((p) % 32)
-
-enum bcm2835_pinconf_param {
- /* argument: bcm2835_pinconf_pull */
- BCM2835_PINCONF_PARAM_PULL,
-};
-
-enum bcm2835_pinconf_pull {
- BCM2835_PINCONFIG_PULL_NONE,
- BCM2835_PINCONFIG_PULL_DOWN,
- BCM2835_PINCONFIG_PULL_UP,
-};
-
-#define BCM2835_PINCONF_PACK(_param_, _arg_) ((_param_) << 16 | (_arg_))
-#define BCM2835_PINCONF_UNPACK_PARAM(_conf_) ((_conf_) >> 16)
-#define BCM2835_PINCONF_UNPACK_ARG(_conf_) ((_conf_) & 0xffff)
-
-struct bcm2835_gpio_irqdata {
- struct bcm2835_pinctrl *pc;
- int bank;
-};
-
-struct bcm2835_pinctrl {
- struct device *dev;
- void __iomem *base;
- int irq[BCM2835_NUM_BANKS];
-
- /* note: locking assumes each bank will have its own unsigned long */
- unsigned long enabled_irq_map[BCM2835_NUM_BANKS];
- unsigned int irq_type[BCM2835_NUM_GPIOS];
-
- struct pinctrl_dev *pctl_dev;
- struct irq_domain *irq_domain;
- struct gpio_chip gpio_chip;
- struct pinctrl_gpio_range gpio_range;
-
- struct bcm2835_gpio_irqdata irq_data[BCM2835_NUM_BANKS];
- spinlock_t irq_lock[BCM2835_NUM_BANKS];
-};
-
-static struct lock_class_key gpio_lock_class;
-
-/* pins are just named GPIO0..GPIO53 */
-#define BCM2835_GPIO_PIN(a) PINCTRL_PIN(a, "gpio" #a)
-static struct pinctrl_pin_desc bcm2835_gpio_pins[] = {
- BCM2835_GPIO_PIN(0),
- BCM2835_GPIO_PIN(1),
- BCM2835_GPIO_PIN(2),
- BCM2835_GPIO_PIN(3),
- BCM2835_GPIO_PIN(4),
- BCM2835_GPIO_PIN(5),
- BCM2835_GPIO_PIN(6),
- BCM2835_GPIO_PIN(7),
- BCM2835_GPIO_PIN(8),
- BCM2835_GPIO_PIN(9),
- BCM2835_GPIO_PIN(10),
- BCM2835_GPIO_PIN(11),
- BCM2835_GPIO_PIN(12),
- BCM2835_GPIO_PIN(13),
- BCM2835_GPIO_PIN(14),
- BCM2835_GPIO_PIN(15),
- BCM2835_GPIO_PIN(16),
- BCM2835_GPIO_PIN(17),
- BCM2835_GPIO_PIN(18),
- BCM2835_GPIO_PIN(19),
- BCM2835_GPIO_PIN(20),
- BCM2835_GPIO_PIN(21),
- BCM2835_GPIO_PIN(22),
- BCM2835_GPIO_PIN(23),
- BCM2835_GPIO_PIN(24),
- BCM2835_GPIO_PIN(25),
- BCM2835_GPIO_PIN(26),
- BCM2835_GPIO_PIN(27),
- BCM2835_GPIO_PIN(28),
- BCM2835_GPIO_PIN(29),
- BCM2835_GPIO_PIN(30),
- BCM2835_GPIO_PIN(31),
- BCM2835_GPIO_PIN(32),
- BCM2835_GPIO_PIN(33),
- BCM2835_GPIO_PIN(34),
- BCM2835_GPIO_PIN(35),
- BCM2835_GPIO_PIN(36),
- BCM2835_GPIO_PIN(37),
- BCM2835_GPIO_PIN(38),
- BCM2835_GPIO_PIN(39),
- BCM2835_GPIO_PIN(40),
- BCM2835_GPIO_PIN(41),
- BCM2835_GPIO_PIN(42),
- BCM2835_GPIO_PIN(43),
- BCM2835_GPIO_PIN(44),
- BCM2835_GPIO_PIN(45),
- BCM2835_GPIO_PIN(46),
- BCM2835_GPIO_PIN(47),
- BCM2835_GPIO_PIN(48),
- BCM2835_GPIO_PIN(49),
- BCM2835_GPIO_PIN(50),
- BCM2835_GPIO_PIN(51),
- BCM2835_GPIO_PIN(52),
- BCM2835_GPIO_PIN(53),
-};
-
-/* one pin per group */
-static const char * const bcm2835_gpio_groups[] = {
- "gpio0",
- "gpio1",
- "gpio2",
- "gpio3",
- "gpio4",
- "gpio5",
- "gpio6",
- "gpio7",
- "gpio8",
- "gpio9",
- "gpio10",
- "gpio11",
- "gpio12",
- "gpio13",
- "gpio14",
- "gpio15",
- "gpio16",
- "gpio17",
- "gpio18",
- "gpio19",
- "gpio20",
- "gpio21",
- "gpio22",
- "gpio23",
- "gpio24",
- "gpio25",
- "gpio26",
- "gpio27",
- "gpio28",
- "gpio29",
- "gpio30",
- "gpio31",
- "gpio32",
- "gpio33",
- "gpio34",
- "gpio35",
- "gpio36",
- "gpio37",
- "gpio38",
- "gpio39",
- "gpio40",
- "gpio41",
- "gpio42",
- "gpio43",
- "gpio44",
- "gpio45",
- "gpio46",
- "gpio47",
- "gpio48",
- "gpio49",
- "gpio50",
- "gpio51",
- "gpio52",
- "gpio53",
-};
-
-enum bcm2835_fsel {
- BCM2835_FSEL_GPIO_IN = 0,
- BCM2835_FSEL_GPIO_OUT = 1,
- BCM2835_FSEL_ALT0 = 4,
- BCM2835_FSEL_ALT1 = 5,
- BCM2835_FSEL_ALT2 = 6,
- BCM2835_FSEL_ALT3 = 7,
- BCM2835_FSEL_ALT4 = 3,
- BCM2835_FSEL_ALT5 = 2,
- BCM2835_FSEL_COUNT = 8,
- BCM2835_FSEL_MASK = 0x7,
-};
-
-static const char * const bcm2835_functions[BCM2835_FSEL_COUNT] = {
- [BCM2835_FSEL_GPIO_IN] = "gpio_in",
- [BCM2835_FSEL_GPIO_OUT] = "gpio_out",
- [BCM2835_FSEL_ALT0] = "alt0",
- [BCM2835_FSEL_ALT1] = "alt1",
- [BCM2835_FSEL_ALT2] = "alt2",
- [BCM2835_FSEL_ALT3] = "alt3",
- [BCM2835_FSEL_ALT4] = "alt4",
- [BCM2835_FSEL_ALT5] = "alt5",
-};
-
-static const char * const irq_type_names[] = {
- [IRQ_TYPE_NONE] = "none",
- [IRQ_TYPE_EDGE_RISING] = "edge-rising",
- [IRQ_TYPE_EDGE_FALLING] = "edge-falling",
- [IRQ_TYPE_EDGE_BOTH] = "edge-both",
- [IRQ_TYPE_LEVEL_HIGH] = "level-high",
- [IRQ_TYPE_LEVEL_LOW] = "level-low",
-};
-
-static inline u32 bcm2835_gpio_rd(struct bcm2835_pinctrl *pc, unsigned reg)
-{
- return readl(pc->base + reg);
-}
-
-static inline void bcm2835_gpio_wr(struct bcm2835_pinctrl *pc, unsigned reg,
- u32 val)
-{
- writel(val, pc->base + reg);
-}
-
-static inline int bcm2835_gpio_get_bit(struct bcm2835_pinctrl *pc, unsigned reg,
- unsigned bit)
-{
- reg += GPIO_REG_OFFSET(bit) * 4;
- return (bcm2835_gpio_rd(pc, reg) >> GPIO_REG_SHIFT(bit)) & 1;
-}
-
-/* note NOT a read/modify/write cycle */
-static inline void bcm2835_gpio_set_bit(struct bcm2835_pinctrl *pc,
- unsigned reg, unsigned bit)
-{
- reg += GPIO_REG_OFFSET(bit) * 4;
- bcm2835_gpio_wr(pc, reg, BIT(GPIO_REG_SHIFT(bit)));
-}
-
-static inline enum bcm2835_fsel bcm2835_pinctrl_fsel_get(
- struct bcm2835_pinctrl *pc, unsigned pin)
-{
- u32 val = bcm2835_gpio_rd(pc, FSEL_REG(pin));
- enum bcm2835_fsel status = (val >> FSEL_SHIFT(pin)) & BCM2835_FSEL_MASK;
-
- dev_dbg(pc->dev, "get %08x (%u => %s)\n", val, pin,
- bcm2835_functions[status]);
-
- return status;
-}
-
-static inline void bcm2835_pinctrl_fsel_set(
- struct bcm2835_pinctrl *pc, unsigned pin,
- enum bcm2835_fsel fsel)
-{
- u32 val = bcm2835_gpio_rd(pc, FSEL_REG(pin));
- enum bcm2835_fsel cur = (val >> FSEL_SHIFT(pin)) & BCM2835_FSEL_MASK;
-
- dev_dbg(pc->dev, "read %08x (%u => %s)\n", val, pin,
- bcm2835_functions[cur]);
-
- if (cur == fsel)
- return;
-
- if (cur != BCM2835_FSEL_GPIO_IN && fsel != BCM2835_FSEL_GPIO_IN) {
- /* always transition through GPIO_IN */
- val &= ~(BCM2835_FSEL_MASK << FSEL_SHIFT(pin));
- val |= BCM2835_FSEL_GPIO_IN << FSEL_SHIFT(pin);
-
- dev_dbg(pc->dev, "trans %08x (%u <= %s)\n", val, pin,
- bcm2835_functions[BCM2835_FSEL_GPIO_IN]);
- bcm2835_gpio_wr(pc, FSEL_REG(pin), val);
- }
-
- val &= ~(BCM2835_FSEL_MASK << FSEL_SHIFT(pin));
- val |= fsel << FSEL_SHIFT(pin);
-
- dev_dbg(pc->dev, "write %08x (%u <= %s)\n", val, pin,
- bcm2835_functions[fsel]);
- bcm2835_gpio_wr(pc, FSEL_REG(pin), val);
-}
-
-static int bcm2835_gpio_request(struct gpio_chip *chip, unsigned offset)
-{
- return pinctrl_request_gpio(chip->base + offset);
-}
-
-static void bcm2835_gpio_free(struct gpio_chip *chip, unsigned offset)
-{
- pinctrl_free_gpio(chip->base + offset);
-}
-
-static int bcm2835_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
-{
- return pinctrl_gpio_direction_input(chip->base + offset);
-}
-
-static int bcm2835_gpio_get(struct gpio_chip *chip, unsigned offset)
-{
- struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev);
-
- return bcm2835_gpio_get_bit(pc, GPLEV0, offset);
-}
-
-static int bcm2835_gpio_direction_output(struct gpio_chip *chip,
- unsigned offset, int value)
-{
- return pinctrl_gpio_direction_output(chip->base + offset);
-}
-
-static void bcm2835_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
-{
- struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev);
-
- bcm2835_gpio_set_bit(pc, value ? GPSET0 : GPCLR0, offset);
-}
-
-static int bcm2835_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
-{
- struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev);
-
- return irq_linear_revmap(pc->irq_domain, offset);
-}
-
-static struct gpio_chip bcm2835_gpio_chip = {
- .label = MODULE_NAME,
- .owner = THIS_MODULE,
- .request = bcm2835_gpio_request,
- .free = bcm2835_gpio_free,
- .direction_input = bcm2835_gpio_direction_input,
- .direction_output = bcm2835_gpio_direction_output,
- .get = bcm2835_gpio_get,
- .set = bcm2835_gpio_set,
- .to_irq = bcm2835_gpio_to_irq,
- .base = -1,
- .ngpio = BCM2835_NUM_GPIOS,
- .can_sleep = false,
-};
-
-static irqreturn_t bcm2835_gpio_irq_handler(int irq, void *dev_id)
-{
- struct bcm2835_gpio_irqdata *irqdata = dev_id;
- struct bcm2835_pinctrl *pc = irqdata->pc;
- int bank = irqdata->bank;
- unsigned long events;
- unsigned offset;
- unsigned gpio;
- unsigned int type;
-
- events = bcm2835_gpio_rd(pc, GPEDS0 + bank * 4);
- events &= pc->enabled_irq_map[bank];
- for_each_set_bit(offset, &events, 32) {
- gpio = (32 * bank) + offset;
- type = pc->irq_type[gpio];
-
- /* ack edge triggered IRQs immediately */
- if (!(type & IRQ_TYPE_LEVEL_MASK))
- bcm2835_gpio_set_bit(pc, GPEDS0, gpio);
-
- generic_handle_irq(irq_linear_revmap(pc->irq_domain, gpio));
-
- /* ack level triggered IRQ after handling them */
- if (type & IRQ_TYPE_LEVEL_MASK)
- bcm2835_gpio_set_bit(pc, GPEDS0, gpio);
- }
- return events ? IRQ_HANDLED : IRQ_NONE;
-}
-
-static inline void __bcm2835_gpio_irq_config(struct bcm2835_pinctrl *pc,
- unsigned reg, unsigned offset, bool enable)
-{
- u32 value;
- reg += GPIO_REG_OFFSET(offset) * 4;
- value = bcm2835_gpio_rd(pc, reg);
- if (enable)
- value |= BIT(GPIO_REG_SHIFT(offset));
- else
- value &= ~(BIT(GPIO_REG_SHIFT(offset)));
- bcm2835_gpio_wr(pc, reg, value);
-}
-
-/* fast path for IRQ handler */
-static void bcm2835_gpio_irq_config(struct bcm2835_pinctrl *pc,
- unsigned offset, bool enable)
-{
- switch (pc->irq_type[offset]) {
- case IRQ_TYPE_EDGE_RISING:
- __bcm2835_gpio_irq_config(pc, GPREN0, offset, enable);
- break;
-
- case IRQ_TYPE_EDGE_FALLING:
- __bcm2835_gpio_irq_config(pc, GPFEN0, offset, enable);
- break;
-
- case IRQ_TYPE_EDGE_BOTH:
- __bcm2835_gpio_irq_config(pc, GPREN0, offset, enable);
- __bcm2835_gpio_irq_config(pc, GPFEN0, offset, enable);
- break;
-
- case IRQ_TYPE_LEVEL_HIGH:
- __bcm2835_gpio_irq_config(pc, GPHEN0, offset, enable);
- break;
-
- case IRQ_TYPE_LEVEL_LOW:
- __bcm2835_gpio_irq_config(pc, GPLEN0, offset, enable);
- break;
- }
-}
-
-static void bcm2835_gpio_irq_enable(struct irq_data *data)
-{
- struct bcm2835_pinctrl *pc = irq_data_get_irq_chip_data(data);
- unsigned gpio = irqd_to_hwirq(data);
- unsigned offset = GPIO_REG_SHIFT(gpio);
- unsigned bank = GPIO_REG_OFFSET(gpio);
- unsigned long flags;
-
- spin_lock_irqsave(&pc->irq_lock[bank], flags);
- set_bit(offset, &pc->enabled_irq_map[bank]);
- bcm2835_gpio_irq_config(pc, gpio, true);
- spin_unlock_irqrestore(&pc->irq_lock[bank], flags);
-}
-
-static void bcm2835_gpio_irq_disable(struct irq_data *data)
-{
- struct bcm2835_pinctrl *pc = irq_data_get_irq_chip_data(data);
- unsigned gpio = irqd_to_hwirq(data);
- unsigned offset = GPIO_REG_SHIFT(gpio);
- unsigned bank = GPIO_REG_OFFSET(gpio);
- unsigned long flags;
-
- spin_lock_irqsave(&pc->irq_lock[bank], flags);
- bcm2835_gpio_irq_config(pc, gpio, false);
- clear_bit(offset, &pc->enabled_irq_map[bank]);
- spin_unlock_irqrestore(&pc->irq_lock[bank], flags);
-}
-
-static int __bcm2835_gpio_irq_set_type_disabled(struct bcm2835_pinctrl *pc,
- unsigned offset, unsigned int type)
-{
- switch (type) {
- case IRQ_TYPE_NONE:
- case IRQ_TYPE_EDGE_RISING:
- case IRQ_TYPE_EDGE_FALLING:
- case IRQ_TYPE_EDGE_BOTH:
- case IRQ_TYPE_LEVEL_HIGH:
- case IRQ_TYPE_LEVEL_LOW:
- pc->irq_type[offset] = type;
- break;
-
- default:
- return -EINVAL;
- }
- return 0;
-}
-
-/* slower path for reconfiguring IRQ type */
-static int __bcm2835_gpio_irq_set_type_enabled(struct bcm2835_pinctrl *pc,
- unsigned offset, unsigned int type)
-{
- switch (type) {
- case IRQ_TYPE_NONE:
- if (pc->irq_type[offset] != type) {
- bcm2835_gpio_irq_config(pc, offset, false);
- pc->irq_type[offset] = type;
- }
- break;
-
- case IRQ_TYPE_EDGE_RISING:
- if (pc->irq_type[offset] == IRQ_TYPE_EDGE_BOTH) {
- /* RISING already enabled, disable FALLING */
- pc->irq_type[offset] = IRQ_TYPE_EDGE_FALLING;
- bcm2835_gpio_irq_config(pc, offset, false);
- pc->irq_type[offset] = type;
- } else if (pc->irq_type[offset] != type) {
- bcm2835_gpio_irq_config(pc, offset, false);
- pc->irq_type[offset] = type;
- bcm2835_gpio_irq_config(pc, offset, true);
- }
- break;
-
- case IRQ_TYPE_EDGE_FALLING:
- if (pc->irq_type[offset] == IRQ_TYPE_EDGE_BOTH) {
- /* FALLING already enabled, disable RISING */
- pc->irq_type[offset] = IRQ_TYPE_EDGE_RISING;
- bcm2835_gpio_irq_config(pc, offset, false);
- pc->irq_type[offset] = type;
- } else if (pc->irq_type[offset] != type) {
- bcm2835_gpio_irq_config(pc, offset, false);
- pc->irq_type[offset] = type;
- bcm2835_gpio_irq_config(pc, offset, true);
- }
- break;
-
- case IRQ_TYPE_EDGE_BOTH:
- if (pc->irq_type[offset] == IRQ_TYPE_EDGE_RISING) {
- /* RISING already enabled, enable FALLING too */
- pc->irq_type[offset] = IRQ_TYPE_EDGE_FALLING;
- bcm2835_gpio_irq_config(pc, offset, true);
- pc->irq_type[offset] = type;
- } else if (pc->irq_type[offset] == IRQ_TYPE_EDGE_FALLING) {
- /* FALLING already enabled, enable RISING too */
- pc->irq_type[offset] = IRQ_TYPE_EDGE_RISING;
- bcm2835_gpio_irq_config(pc, offset, true);
- pc->irq_type[offset] = type;
- } else if (pc->irq_type[offset] != type) {
- bcm2835_gpio_irq_config(pc, offset, false);
- pc->irq_type[offset] = type;
- bcm2835_gpio_irq_config(pc, offset, true);
- }
- break;
-
- case IRQ_TYPE_LEVEL_HIGH:
- case IRQ_TYPE_LEVEL_LOW:
- if (pc->irq_type[offset] != type) {
- bcm2835_gpio_irq_config(pc, offset, false);
- pc->irq_type[offset] = type;
- bcm2835_gpio_irq_config(pc, offset, true);
- }
- break;
-
- default:
- return -EINVAL;
- }
- return 0;
-}
-
-static int bcm2835_gpio_irq_set_type(struct irq_data *data, unsigned int type)
-{
- struct bcm2835_pinctrl *pc = irq_data_get_irq_chip_data(data);
- unsigned gpio = irqd_to_hwirq(data);
- unsigned offset = GPIO_REG_SHIFT(gpio);
- unsigned bank = GPIO_REG_OFFSET(gpio);
- unsigned long flags;
- int ret;
-
- spin_lock_irqsave(&pc->irq_lock[bank], flags);
-
- if (test_bit(offset, &pc->enabled_irq_map[bank]))
- ret = __bcm2835_gpio_irq_set_type_enabled(pc, gpio, type);
- else
- ret = __bcm2835_gpio_irq_set_type_disabled(pc, gpio, type);
-
- spin_unlock_irqrestore(&pc->irq_lock[bank], flags);
-
- return ret;
-}
-
-static struct irq_chip bcm2835_gpio_irq_chip = {
- .name = MODULE_NAME,
- .irq_enable = bcm2835_gpio_irq_enable,
- .irq_disable = bcm2835_gpio_irq_disable,
- .irq_set_type = bcm2835_gpio_irq_set_type,
-};
-
-static int bcm2835_pctl_get_groups_count(struct pinctrl_dev *pctldev)
-{
- return ARRAY_SIZE(bcm2835_gpio_groups);
-}
-
-static const char *bcm2835_pctl_get_group_name(struct pinctrl_dev *pctldev,
- unsigned selector)
-{
- return bcm2835_gpio_groups[selector];
-}
-
-static int bcm2835_pctl_get_group_pins(struct pinctrl_dev *pctldev,
- unsigned selector,
- const unsigned **pins,
- unsigned *num_pins)
-{
- *pins = &bcm2835_gpio_pins[selector].number;
- *num_pins = 1;
-
- return 0;
-}
-
-static void bcm2835_pctl_pin_dbg_show(struct pinctrl_dev *pctldev,
- struct seq_file *s,
- unsigned offset)
-{
- struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
- enum bcm2835_fsel fsel = bcm2835_pinctrl_fsel_get(pc, offset);
- const char *fname = bcm2835_functions[fsel];
- int value = bcm2835_gpio_get_bit(pc, GPLEV0, offset);
- int irq = irq_find_mapping(pc->irq_domain, offset);
-
- seq_printf(s, "function %s in %s; irq %d (%s)",
- fname, value ? "hi" : "lo",
- irq, irq_type_names[pc->irq_type[offset]]);
-}
-
-static void bcm2835_pctl_dt_free_map(struct pinctrl_dev *pctldev,
- struct pinctrl_map *maps, unsigned num_maps)
-{
- int i;
-
- for (i = 0; i < num_maps; i++)
- if (maps[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
- kfree(maps[i].data.configs.configs);
-
- kfree(maps);
-}
-
-static int bcm2835_pctl_dt_node_to_map_func(struct bcm2835_pinctrl *pc,
- struct device_node *np, u32 pin, u32 fnum,
- struct pinctrl_map **maps)
-{
- struct pinctrl_map *map = *maps;
-
- if (fnum >= ARRAY_SIZE(bcm2835_functions)) {
- dev_err(pc->dev, "%s: invalid brcm,function %d\n",
- of_node_full_name(np), fnum);
- return -EINVAL;
- }
-
- map->type = PIN_MAP_TYPE_MUX_GROUP;
- map->data.mux.group = bcm2835_gpio_groups[pin];
- map->data.mux.function = bcm2835_functions[fnum];
- (*maps)++;
-
- return 0;
-}
-
-static int bcm2835_pctl_dt_node_to_map_pull(struct bcm2835_pinctrl *pc,
- struct device_node *np, u32 pin, u32 pull,
- struct pinctrl_map **maps)
-{
- struct pinctrl_map *map = *maps;
- unsigned long *configs;
-
- if (pull > 2) {
- dev_err(pc->dev, "%s: invalid brcm,pull %d\n",
- of_node_full_name(np), pull);
- return -EINVAL;
- }
-
- configs = kzalloc(sizeof(*configs), GFP_KERNEL);
- if (!configs)
- return -ENOMEM;
- configs[0] = BCM2835_PINCONF_PACK(BCM2835_PINCONF_PARAM_PULL, pull);
-
- map->type = PIN_MAP_TYPE_CONFIGS_PIN;
- map->data.configs.group_or_pin = bcm2835_gpio_pins[pin].name;
- map->data.configs.configs = configs;
- map->data.configs.num_configs = 1;
- (*maps)++;
-
- return 0;
-}
-
-static int bcm2835_pctl_dt_node_to_map(struct pinctrl_dev *pctldev,
- struct device_node *np,
- struct pinctrl_map **map, unsigned *num_maps)
-{
- struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
- struct property *pins, *funcs, *pulls;
- int num_pins, num_funcs, num_pulls, maps_per_pin;
- struct pinctrl_map *maps, *cur_map;
- int i, err;
- u32 pin, func, pull;
-
- pins = of_find_property(np, "brcm,pins", NULL);
- if (!pins) {
- dev_err(pc->dev, "%s: missing brcm,pins property\n",
- of_node_full_name(np));
- return -EINVAL;
- }
-
- funcs = of_find_property(np, "brcm,function", NULL);
- pulls = of_find_property(np, "brcm,pull", NULL);
-
- if (!funcs && !pulls) {
- dev_err(pc->dev,
- "%s: neither brcm,function nor brcm,pull specified\n",
- of_node_full_name(np));
- return -EINVAL;
- }
-
- num_pins = pins->length / 4;
- num_funcs = funcs ? (funcs->length / 4) : 0;
- num_pulls = pulls ? (pulls->length / 4) : 0;
-
- if (num_funcs > 1 && num_funcs != num_pins) {
- dev_err(pc->dev,
- "%s: brcm,function must have 1 or %d entries\n",
- of_node_full_name(np), num_pins);
- return -EINVAL;
- }
-
- if (num_pulls > 1 && num_pulls != num_pins) {
- dev_err(pc->dev,
- "%s: brcm,pull must have 1 or %d entries\n",
- of_node_full_name(np), num_pins);
- return -EINVAL;
- }
-
- maps_per_pin = 0;
- if (num_funcs)
- maps_per_pin++;
- if (num_pulls)
- maps_per_pin++;
- cur_map = maps = kzalloc(num_pins * maps_per_pin * sizeof(*maps),
- GFP_KERNEL);
- if (!maps)
- return -ENOMEM;
-
- for (i = 0; i < num_pins; i++) {
- err = of_property_read_u32_index(np, "brcm,pins", i, &pin);
- if (err)
- goto out;
- if (pin >= ARRAY_SIZE(bcm2835_gpio_pins)) {
- dev_err(pc->dev, "%s: invalid brcm,pins value %d\n",
- of_node_full_name(np), pin);
- err = -EINVAL;
- goto out;
- }
-
- if (num_funcs) {
- err = of_property_read_u32_index(np, "brcm,function",
- (num_funcs > 1) ? i : 0, &func);
- if (err)
- goto out;
- err = bcm2835_pctl_dt_node_to_map_func(pc, np, pin,
- func, &cur_map);
- if (err)
- goto out;
- }
- if (num_pulls) {
- err = of_property_read_u32_index(np, "brcm,pull",
- (num_funcs > 1) ? i : 0, &pull);
- if (err)
- goto out;
- err = bcm2835_pctl_dt_node_to_map_pull(pc, np, pin,
- pull, &cur_map);
- if (err)
- goto out;
- }
- }
-
- *map = maps;
- *num_maps = num_pins * maps_per_pin;
-
- return 0;
-
-out:
- kfree(maps);
- return err;
-}
-
-static const struct pinctrl_ops bcm2835_pctl_ops = {
- .get_groups_count = bcm2835_pctl_get_groups_count,
- .get_group_name = bcm2835_pctl_get_group_name,
- .get_group_pins = bcm2835_pctl_get_group_pins,
- .pin_dbg_show = bcm2835_pctl_pin_dbg_show,
- .dt_node_to_map = bcm2835_pctl_dt_node_to_map,
- .dt_free_map = bcm2835_pctl_dt_free_map,
-};
-
-static int bcm2835_pmx_get_functions_count(struct pinctrl_dev *pctldev)
-{
- return BCM2835_FSEL_COUNT;
-}
-
-static const char *bcm2835_pmx_get_function_name(struct pinctrl_dev *pctldev,
- unsigned selector)
-{
- return bcm2835_functions[selector];
-}
-
-static int bcm2835_pmx_get_function_groups(struct pinctrl_dev *pctldev,
- unsigned selector,
- const char * const **groups,
- unsigned * const num_groups)
-{
- /* every pin can do every function */
- *groups = bcm2835_gpio_groups;
- *num_groups = ARRAY_SIZE(bcm2835_gpio_groups);
-
- return 0;
-}
-
-static int bcm2835_pmx_set(struct pinctrl_dev *pctldev,
- unsigned func_selector,
- unsigned group_selector)
-{
- struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
-
- bcm2835_pinctrl_fsel_set(pc, group_selector, func_selector);
-
- return 0;
-}
-
-static void bcm2835_pmx_gpio_disable_free(struct pinctrl_dev *pctldev,
- struct pinctrl_gpio_range *range,
- unsigned offset)
-{
- struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
-
- /* disable by setting to GPIO_IN */
- bcm2835_pinctrl_fsel_set(pc, offset, BCM2835_FSEL_GPIO_IN);
-}
-
-static int bcm2835_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
- struct pinctrl_gpio_range *range,
- unsigned offset,
- bool input)
-{
- struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
- enum bcm2835_fsel fsel = input ?
- BCM2835_FSEL_GPIO_IN : BCM2835_FSEL_GPIO_OUT;
-
- bcm2835_pinctrl_fsel_set(pc, offset, fsel);
-
- return 0;
-}
-
-static const struct pinmux_ops bcm2835_pmx_ops = {
- .get_functions_count = bcm2835_pmx_get_functions_count,
- .get_function_name = bcm2835_pmx_get_function_name,
- .get_function_groups = bcm2835_pmx_get_function_groups,
- .set_mux = bcm2835_pmx_set,
- .gpio_disable_free = bcm2835_pmx_gpio_disable_free,
- .gpio_set_direction = bcm2835_pmx_gpio_set_direction,
-};
-
-static int bcm2835_pinconf_get(struct pinctrl_dev *pctldev,
- unsigned pin, unsigned long *config)
-{
- /* No way to read back config in HW */
- return -ENOTSUPP;
-}
-
-static int bcm2835_pinconf_set(struct pinctrl_dev *pctldev,
- unsigned pin, unsigned long *configs,
- unsigned num_configs)
-{
- struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
- enum bcm2835_pinconf_param param;
- u16 arg;
- u32 off, bit;
- int i;
-
- for (i = 0; i < num_configs; i++) {
- param = BCM2835_PINCONF_UNPACK_PARAM(configs[i]);
- arg = BCM2835_PINCONF_UNPACK_ARG(configs[i]);
-
- if (param != BCM2835_PINCONF_PARAM_PULL)
- return -EINVAL;
-
- off = GPIO_REG_OFFSET(pin);
- bit = GPIO_REG_SHIFT(pin);
-
- bcm2835_gpio_wr(pc, GPPUD, arg & 3);
- /*
- * Docs say to wait 150 cycles, but not of what. We assume a
- * 1 MHz clock here, which is pretty slow...
- */
- udelay(150);
- bcm2835_gpio_wr(pc, GPPUDCLK0 + (off * 4), BIT(bit));
- udelay(150);
- bcm2835_gpio_wr(pc, GPPUDCLK0 + (off * 4), 0);
- } /* for each config */
-
- return 0;
-}
-
-static const struct pinconf_ops bcm2835_pinconf_ops = {
- .pin_config_get = bcm2835_pinconf_get,
- .pin_config_set = bcm2835_pinconf_set,
-};
-
-static struct pinctrl_desc bcm2835_pinctrl_desc = {
- .name = MODULE_NAME,
- .pins = bcm2835_gpio_pins,
- .npins = ARRAY_SIZE(bcm2835_gpio_pins),
- .pctlops = &bcm2835_pctl_ops,
- .pmxops = &bcm2835_pmx_ops,
- .confops = &bcm2835_pinconf_ops,
- .owner = THIS_MODULE,
-};
-
-static struct pinctrl_gpio_range bcm2835_pinctrl_gpio_range = {
- .name = MODULE_NAME,
- .npins = BCM2835_NUM_GPIOS,
-};
-
-static int bcm2835_pinctrl_probe(struct platform_device *pdev)
-{
- struct device *dev = &pdev->dev;
- struct device_node *np = dev->of_node;
- struct bcm2835_pinctrl *pc;
- struct resource iomem;
- int err, i;
- BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_pins) != BCM2835_NUM_GPIOS);
- BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_groups) != BCM2835_NUM_GPIOS);
-
- pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
- if (!pc)
- return -ENOMEM;
-
- platform_set_drvdata(pdev, pc);
- pc->dev = dev;
-
- err = of_address_to_resource(np, 0, &iomem);
- if (err) {
- dev_err(dev, "could not get IO memory\n");
- return err;
- }
-
- pc->base = devm_ioremap_resource(dev, &iomem);
- if (IS_ERR(pc->base))
- return PTR_ERR(pc->base);
-
- pc->gpio_chip = bcm2835_gpio_chip;
- pc->gpio_chip.dev = dev;
- pc->gpio_chip.of_node = np;
-
- pc->irq_domain = irq_domain_add_linear(np, BCM2835_NUM_GPIOS,
- &irq_domain_simple_ops, NULL);
- if (!pc->irq_domain) {
- dev_err(dev, "could not create IRQ domain\n");
- return -ENOMEM;
- }
-
- for (i = 0; i < BCM2835_NUM_GPIOS; i++) {
- int irq = irq_create_mapping(pc->irq_domain, i);
- irq_set_lockdep_class(irq, &gpio_lock_class);
- irq_set_chip_and_handler(irq, &bcm2835_gpio_irq_chip,
- handle_simple_irq);
- irq_set_chip_data(irq, pc);
- set_irq_flags(irq, IRQF_VALID);
- }
-
- for (i = 0; i < BCM2835_NUM_BANKS; i++) {
- unsigned long events;
- unsigned offset;
- int len;
- char *name;
-
- /* clear event detection flags */
- bcm2835_gpio_wr(pc, GPREN0 + i * 4, 0);
- bcm2835_gpio_wr(pc, GPFEN0 + i * 4, 0);
- bcm2835_gpio_wr(pc, GPHEN0 + i * 4, 0);
- bcm2835_gpio_wr(pc, GPLEN0 + i * 4, 0);
- bcm2835_gpio_wr(pc, GPAREN0 + i * 4, 0);
- bcm2835_gpio_wr(pc, GPAFEN0 + i * 4, 0);
-
- /* clear all the events */
- events = bcm2835_gpio_rd(pc, GPEDS0 + i * 4);
- for_each_set_bit(offset, &events, 32)
- bcm2835_gpio_wr(pc, GPEDS0 + i * 4, BIT(offset));
-
- pc->irq[i] = irq_of_parse_and_map(np, i);
- pc->irq_data[i].pc = pc;
- pc->irq_data[i].bank = i;
- spin_lock_init(&pc->irq_lock[i]);
-
- len = strlen(dev_name(pc->dev)) + 16;
- name = devm_kzalloc(pc->dev, len, GFP_KERNEL);
- if (!name)
- return -ENOMEM;
- snprintf(name, len, "%s:bank%d", dev_name(pc->dev), i);
-
- err = devm_request_irq(dev, pc->irq[i],
- bcm2835_gpio_irq_handler, IRQF_SHARED,
- name, &pc->irq_data[i]);
- if (err) {
- dev_err(dev, "unable to request IRQ %d\n", pc->irq[i]);
- return err;
- }
- }
-
- err = gpiochip_add(&pc->gpio_chip);
- if (err) {
- dev_err(dev, "could not add GPIO chip\n");
- return err;
- }
-
- pc->pctl_dev = pinctrl_register(&bcm2835_pinctrl_desc, dev, pc);
- if (!pc->pctl_dev) {
- gpiochip_remove(&pc->gpio_chip);
- return -EINVAL;
- }
-
- pc->gpio_range = bcm2835_pinctrl_gpio_range;
- pc->gpio_range.base = pc->gpio_chip.base;
- pc->gpio_range.gc = &pc->gpio_chip;
- pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);
-
- return 0;
-}
-
-static int bcm2835_pinctrl_remove(struct platform_device *pdev)
-{
- struct bcm2835_pinctrl *pc = platform_get_drvdata(pdev);
-
- pinctrl_unregister(pc->pctl_dev);
- gpiochip_remove(&pc->gpio_chip);
-
- return 0;
-}
-
-static struct of_device_id bcm2835_pinctrl_match[] = {
- { .compatible = "brcm,bcm2835-gpio" },
- {}
-};
-MODULE_DEVICE_TABLE(of, bcm2835_pinctrl_match);
-
-static struct platform_driver bcm2835_pinctrl_driver = {
- .probe = bcm2835_pinctrl_probe,
- .remove = bcm2835_pinctrl_remove,
- .driver = {
- .name = MODULE_NAME,
- .of_match_table = bcm2835_pinctrl_match,
- },
-};
-module_platform_driver(bcm2835_pinctrl_driver);
-
-MODULE_AUTHOR("Chris Boot, Simon Arlott, Stephen Warren");
-MODULE_DESCRIPTION("BCM2835 Pin control driver");
-MODULE_LICENSE("GPL");
extern int ltq_pinctrl_register(struct platform_device *pdev,
struct ltq_pinmux_info *info);
extern int ltq_pinctrl_unregister(struct platform_device *pdev);
-#endif /* __PINCTRL_PXA3XX_H */
+#endif /* __PINCTRL_LANTIQ_H */
.num_pin_groups = ARRAY_SIZE(tps80036_pingroups),
};
-static struct of_device_id palmas_pinctrl_of_match[] = {
+static const struct of_device_id palmas_pinctrl_of_match[] = {
{ .compatible = "ti,palmas-pinctrl", .data = &tps65913_pinctrl_data},
{ .compatible = "ti,tps65913-pinctrl", .data = &tps65913_pinctrl_data},
{ .compatible = "ti,tps80036-pinctrl", .data = &tps80036_pinctrl_data},
} \
} while (0);
-static struct of_device_id pcs_of_match[];
+static const struct of_device_id pcs_of_match[];
static int pcs_add_gpio_func(struct device_node *node, struct pcs_device *pcs)
{
.flags = PCS_FEAT_PINCONF,
};
-static struct of_device_id pcs_of_match[] = {
+static const struct of_device_id pcs_of_match[] = {
{ .compatible = "ti,omap3-padconf", .data = &pinctrl_single_omap_wkup },
{ .compatible = "ti,omap4-padconf", .data = &pinctrl_single_omap_wkup },
{ .compatible = "ti,omap5-padconf", .data = &pinctrl_single_omap_wkup },
#define gpio_chip_to_bank(chip) \
container_of(chip, struct st_gpio_bank, gpio_chip)
+#define pc_to_bank(pc) \
+ container_of(pc, struct st_gpio_bank, pc)
enum st_retime_style {
st_retime_style_none,
.rt = 100,
};
+static struct st_pio_control *st_get_pio_control(
+ struct pinctrl_dev *pctldev, int pin)
+{
+ struct pinctrl_gpio_range *range =
+ pinctrl_find_gpio_range_from_pin(pctldev, pin);
+ struct st_gpio_bank *bank = gpio_range_to_bank(range);
+
+ return &bank->pc;
+}
+
/* Low level functions.. */
static inline int st_gpio_bank(int gpio)
{
regmap_field_write(alt, val);
}
+static unsigned int st_pctl_get_pin_function(struct st_pio_control *pc, int pin)
+{
+ struct regmap_field *alt = pc->alt;
+ unsigned int val;
+ int offset = pin * 4;
+
+ if (!alt)
+ return 0;
+
+ regmap_field_read(alt, &val);
+
+ return (val >> offset) & 0xf;
+}
+
static unsigned long st_pinconf_delay_to_bit(unsigned int delay,
const struct st_pctl_data *data, unsigned long config)
{
return 0;
}
+static int st_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
+{
+ struct st_gpio_bank *bank = gpio_chip_to_bank(chip);
+ struct st_pio_control pc = bank->pc;
+ unsigned long config;
+ unsigned int direction = 0;
+ unsigned int function;
+ unsigned int value;
+ int i = 0;
+
+ /* Alternate function direction is handled by Pinctrl */
+ function = st_pctl_get_pin_function(&pc, offset);
+ if (function) {
+ st_pinconf_get_direction(&pc, offset, &config);
+ return !ST_PINCONF_UNPACK_OE(config);
+ }
+
+ /*
+ * GPIO direction is handled differently
+ * - See st_gpio_direction() above for an explanation
+ */
+ for (i = 0; i <= 2; i++) {
+ value = readl(bank->base + REG_PIO_PC(i));
+ direction |= ((value >> offset) & 0x1) << i;
+ }
+
+ return (direction == ST_GPIO_DIRECTION_IN);
+}
+
static int st_gpio_xlate(struct gpio_chip *gc,
const struct of_phandle_args *gpiospec, u32 *flags)
{
return 0;
}
-static struct st_pio_control *st_get_pio_control(
- struct pinctrl_dev *pctldev, int pin)
-{
- struct pinctrl_gpio_range *range =
- pinctrl_find_gpio_range_from_pin(pctldev, pin);
- struct st_gpio_bank *bank = gpio_range_to_bank(range);
-
- return &bank->pc;
-}
-
static int st_pmx_set_mux(struct pinctrl_dev *pctldev, unsigned fselector,
unsigned group)
{
static void st_pinconf_dbg_show(struct pinctrl_dev *pctldev,
struct seq_file *s, unsigned pin_id)
{
+ struct st_pio_control *pc;
unsigned long config;
+ unsigned int function;
+ int offset = st_gpio_pin(pin_id);
+ char f[16];
mutex_unlock(&pctldev->mutex);
+ pc = st_get_pio_control(pctldev, pin_id);
st_pinconf_get(pctldev, pin_id, &config);
mutex_lock(&pctldev->mutex);
- seq_printf(s, "[OE:%ld,PU:%ld,OD:%ld]\n"
+
+ function = st_pctl_get_pin_function(pc, offset);
+ if (function)
+ snprintf(f, 10, "Alt Fn %d", function);
+ else
+ snprintf(f, 5, "GPIO");
+
+ seq_printf(s, "[OE:%d,PU:%ld,OD:%ld]\t%s\n"
"\t\t[retime:%ld,invclk:%ld,clknotdat:%ld,"
"de:%ld,rt-clk:%ld,rt-delay:%ld]",
- ST_PINCONF_UNPACK_OE(config),
+ !st_gpio_get_direction(&pc_to_bank(pc)->gpio_chip, offset),
ST_PINCONF_UNPACK_PU(config),
ST_PINCONF_UNPACK_OD(config),
+ f,
ST_PINCONF_UNPACK_RT(config),
ST_PINCONF_UNPACK_RT_INVERTCLK(config),
ST_PINCONF_UNPACK_RT_CLKNOTDATA(config),
.set = st_gpio_set,
.direction_input = st_gpio_direction_input,
.direction_output = st_gpio_direction_output,
+ .get_direction = st_gpio_get_direction,
.ngpio = ST_GPIO_PINS_PER_BANK,
.of_gpio_n_cells = 1,
.of_xlate = st_gpio_xlate,
return 0;
}
-static struct of_device_id st_pctl_of_match[] = {
+static const struct of_device_id st_pctl_of_match[] = {
{ .compatible = "st,stih415-sbc-pinctrl", .data = &stih415_sbc_data },
{ .compatible = "st,stih415-rear-pinctrl", .data = &stih415_rear_data },
{ .compatible = "st,stih415-left-pinctrl", .data = &stih415_left_data },
{"nvidia,lock", TEGRA_PINCONF_PARAM_LOCK},
{"nvidia,io-reset", TEGRA_PINCONF_PARAM_IORESET},
{"nvidia,rcv-sel", TEGRA_PINCONF_PARAM_RCV_SEL},
+ {"nvidia,io-hv", TEGRA_PINCONF_PARAM_RCV_SEL},
{"nvidia,high-speed-mode", TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE},
{"nvidia,schmitt", TEGRA_PINCONF_PARAM_SCHMITT},
{"nvidia,low-power-mode", TEGRA_PINCONF_PARAM_LOW_POWER_MODE},
*width = 1;
break;
case TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE:
- *bank = g->drv_bank;
- *reg = g->drv_reg;
+ if (pmx->soc->hsm_in_mux) {
+ *bank = g->mux_bank;
+ *reg = g->mux_reg;
+ } else {
+ *bank = g->drv_bank;
+ *reg = g->drv_reg;
+ }
*bit = g->hsm_bit;
*width = 1;
break;
case TEGRA_PINCONF_PARAM_SCHMITT:
- *bank = g->drv_bank;
- *reg = g->drv_reg;
+ if (pmx->soc->schmitt_in_mux) {
+ *bank = g->mux_bank;
+ *reg = g->mux_reg;
+ } else {
+ *bank = g->drv_bank;
+ *reg = g->drv_reg;
+ }
*bit = g->schmitt_bit;
*width = 1;
break;
*width = g->slwr_width;
break;
case TEGRA_PINCONF_PARAM_DRIVE_TYPE:
- *bank = g->drv_bank;
- *reg = g->drv_reg;
+ if (pmx->soc->drvtype_in_mux) {
+ *bank = g->mux_bank;
+ *reg = g->mux_reg;
+ } else {
+ *bank = g->drv_bank;
+ *reg = g->drv_reg;
+ }
*bit = g->drvtype_bit;
*width = 2;
break;
u32 pupd_bank:2;
u32 tri_bank:2;
u32 drv_bank:2;
- u32 mux_bit:6;
- u32 pupd_bit:6;
- u32 tri_bit:6;
- u32 einput_bit:6;
- u32 odrain_bit:6;
- u32 lock_bit:6;
- u32 ioreset_bit:6;
- u32 rcv_sel_bit:6;
- u32 hsm_bit:6;
- u32 schmitt_bit:6;
- u32 lpmd_bit:6;
- u32 drvdn_bit:6;
- u32 drvup_bit:6;
- u32 slwr_bit:6;
- u32 slwf_bit:6;
- u32 drvtype_bit:6;
- u32 drvdn_width:6;
- u32 drvup_width:6;
- u32 slwr_width:6;
- u32 slwf_width:6;
+ s32 mux_bit:6;
+ s32 pupd_bit:6;
+ s32 tri_bit:6;
+ s32 einput_bit:6;
+ s32 odrain_bit:6;
+ s32 lock_bit:6;
+ s32 ioreset_bit:6;
+ s32 rcv_sel_bit:6;
+ s32 hsm_bit:6;
+ s32 schmitt_bit:6;
+ s32 lpmd_bit:6;
+ s32 drvdn_bit:6;
+ s32 drvup_bit:6;
+ s32 slwr_bit:6;
+ s32 slwf_bit:6;
+ s32 drvtype_bit:6;
+ s32 drvdn_width:6;
+ s32 drvup_width:6;
+ s32 slwr_width:6;
+ s32 slwf_width:6;
};
/**
unsigned nfunctions;
const struct tegra_pingroup *groups;
unsigned ngroups;
+ bool hsm_in_mux;
+ bool schmitt_in_mux;
+ bool drvtype_in_mux;
};
int tegra_pinctrl_probe(struct platform_device *pdev,
#define DRV_PINGROUP_REG_A 0x868 /* bank 0 */
#define PINGROUP_REG_A 0x3000 /* bank 1 */
+#define DRV_PINGROUP_REG(r) ((r) - DRV_PINGROUP_REG_A)
#define PINGROUP_REG(r) ((r) - PINGROUP_REG_A)
#define PINGROUP_BIT_Y(b) (b)
.tri_reg = PINGROUP_REG(r), \
.tri_bank = 1, \
.tri_bit = 4, \
- .einput_bit = PINGROUP_BIT_Y(5), \
+ .einput_bit = 5, \
.odrain_bit = PINGROUP_BIT_##od(6), \
- .lock_bit = PINGROUP_BIT_Y(7), \
+ .lock_bit = 7, \
.ioreset_bit = PINGROUP_BIT_##ior(8), \
.rcv_sel_bit = PINGROUP_BIT_##rcv_sel(9), \
.drv_reg = -1, \
}
-#define DRV_PINGROUP_REG(r) ((r) - DRV_PINGROUP_REG_A)
-
-#define DRV_PINGROUP(pg_name, r, hsm_b, schmitt_b, lpmd_b, \
- drvdn_b, drvdn_w, drvup_b, drvup_w, \
- slwr_b, slwr_w, slwf_b, slwf_w, \
- drvtype) \
+#define DRV_PINGROUP(pg_name, r, hsm_b, schmitt_b, lpmd_b, drvdn_b, \
+ drvdn_w, drvup_b, drvup_w, slwr_b, slwr_w, \
+ slwf_b, slwf_w, drvtype) \
{ \
.name = "drive_" #pg_name, \
.pins = drive_##pg_name##_pins, \
.nfunctions = ARRAY_SIZE(tegra114_functions),
.groups = tegra114_groups,
.ngroups = ARRAY_SIZE(tegra114_groups),
+ .hsm_in_mux = false,
+ .schmitt_in_mux = false,
+ .drvtype_in_mux = false,
};
static int tegra114_pinctrl_probe(struct platform_device *pdev)
TEGRA_MUX_CLK,
TEGRA_MUX_CLK12,
TEGRA_MUX_CPU,
+ TEGRA_MUX_CSI,
TEGRA_MUX_DAP,
TEGRA_MUX_DAP1,
TEGRA_MUX_DAP2,
TEGRA_MUX_DISPLAYA_ALT,
TEGRA_MUX_DISPLAYB,
TEGRA_MUX_DP,
+ TEGRA_MUX_DSI_B,
TEGRA_MUX_DTV,
TEGRA_MUX_EXTPERIPH1,
TEGRA_MUX_EXTPERIPH2,
TEGRA_MUX_VI_ALT3,
TEGRA_MUX_VIMCLK2,
TEGRA_MUX_VIMCLK2_ALT,
- TEGRA_MUX_CSI,
- TEGRA_MUX_DSI_B,
};
#define FUNCTION(fname) \
FUNCTION(clk),
FUNCTION(clk12),
FUNCTION(cpu),
+ FUNCTION(csi),
FUNCTION(dap),
FUNCTION(dap1),
FUNCTION(dap2),
FUNCTION(displaya_alt),
FUNCTION(displayb),
FUNCTION(dp),
+ FUNCTION(dsi_b),
FUNCTION(dtv),
FUNCTION(extperiph1),
FUNCTION(extperiph2),
FUNCTION(vi_alt3),
FUNCTION(vimclk2),
FUNCTION(vimclk2_alt),
- FUNCTION(csi),
- FUNCTION(dsi_b),
};
#define DRV_PINGROUP_REG_A 0x868 /* bank 0 */
#define PINGROUP_REG_A 0x3000 /* bank 1 */
#define MIPI_PAD_CTRL_PINGROUP_REG_A 0x820 /* bank 2 */
+#define DRV_PINGROUP_REG(r) ((r) - DRV_PINGROUP_REG_A)
#define PINGROUP_REG(r) ((r) - PINGROUP_REG_A)
+#define MIPI_PAD_CTRL_PINGROUP_REG_Y(r) ((r) - MIPI_PAD_CTRL_PINGROUP_REG_A)
#define PINGROUP_BIT_Y(b) (b)
#define PINGROUP_BIT_N(b) (-1)
.tri_reg = PINGROUP_REG(r), \
.tri_bank = 1, \
.tri_bit = 4, \
- .einput_bit = PINGROUP_BIT_Y(5), \
+ .einput_bit = 5, \
.odrain_bit = PINGROUP_BIT_##od(6), \
- .lock_bit = PINGROUP_BIT_Y(7), \
+ .lock_bit = 7, \
.ioreset_bit = PINGROUP_BIT_##ior(8), \
.rcv_sel_bit = PINGROUP_BIT_##rcv_sel(9), \
.drv_reg = -1, \
}
-#define DRV_PINGROUP_REG(r) ((r) - DRV_PINGROUP_REG_A)
-
-#define DRV_PINGROUP(pg_name, r, hsm_b, schmitt_b, lpmd_b, \
- drvdn_b, drvdn_w, drvup_b, drvup_w, \
- slwr_b, slwr_w, slwf_b, slwf_w, \
- drvtype) \
+#define DRV_PINGROUP(pg_name, r, hsm_b, schmitt_b, lpmd_b, drvdn_b, \
+ drvdn_w, drvup_b, drvup_w, slwr_b, slwr_w, \
+ slwf_b, slwf_w, drvtype) \
{ \
.name = "drive_" #pg_name, \
.pins = drive_##pg_name##_pins, \
.drvtype_bit = PINGROUP_BIT_##drvtype(6), \
}
-#define MIPI_PAD_CTRL_PINGROUP_REG_Y(r) ((r) - MIPI_PAD_CTRL_PINGROUP_REG_A)
-
#define MIPI_PAD_CTRL_PINGROUP(pg_name, r, b, f0, f1) \
{ \
.name = "mipi_pad_ctrl_" #pg_name, \
DRV_PINGROUP(sdio4, 0x9c4, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N),
DRV_PINGROUP(ao4, 0x9c8, 2, 3, 4, 12, 7, 20, 7, 28, 2, 30, 2, Y),
- /* pg_name, r b f0, f1 */
- MIPI_PAD_CTRL_PINGROUP(dsi_b, 0x820, 1, CSI, DSI_B)
+ /* pg_name, r, b, f0, f1 */
+ MIPI_PAD_CTRL_PINGROUP(dsi_b, 0x820, 1, CSI, DSI_B),
};
static const struct tegra_pinctrl_soc_data tegra124_pinctrl = {
.nfunctions = ARRAY_SIZE(tegra124_functions),
.groups = tegra124_groups,
.ngroups = ARRAY_SIZE(tegra124_groups),
+ .hsm_in_mux = false,
+ .schmitt_in_mux = false,
+ .drvtype_in_mux = false,
};
static int tegra124_pinctrl_probe(struct platform_device *pdev)
.nfunctions = ARRAY_SIZE(tegra20_functions),
.groups = tegra20_groups,
.ngroups = ARRAY_SIZE(tegra20_groups),
+ .hsm_in_mux = false,
+ .schmitt_in_mux = false,
+ .drvtype_in_mux = false,
};
static int tegra20_pinctrl_probe(struct platform_device *pdev)
--- /dev/null
+/*
+ * Pinctrl data for the NVIDIA Tegra210 pinmux
+ *
+ * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
+
+#include "pinctrl-tegra.h"
+
+/*
+ * Most pins affected by the pinmux can also be GPIOs. Define these first.
+ * These must match how the GPIO driver names/numbers its pins.
+ */
+#define _GPIO(offset) (offset)
+
+#define TEGRA_PIN_PEX_L0_RST_N_PA0 _GPIO(0)
+#define TEGRA_PIN_PEX_L0_CLKREQ_N_PA1 _GPIO(1)
+#define TEGRA_PIN_PEX_WAKE_N_PA2 _GPIO(2)
+#define TEGRA_PIN_PEX_L1_RST_N_PA3 _GPIO(3)
+#define TEGRA_PIN_PEX_L1_CLKREQ_N_PA4 _GPIO(4)
+#define TEGRA_PIN_SATA_LED_ACTIVE_PA5 _GPIO(5)
+#define TEGRA_PIN_PA6 _GPIO(6)
+#define TEGRA_PIN_DAP1_FS_PB0 _GPIO(8)
+#define TEGRA_PIN_DAP1_DIN_PB1 _GPIO(9)
+#define TEGRA_PIN_DAP1_DOUT_PB2 _GPIO(10)
+#define TEGRA_PIN_DAP1_SCLK_PB3 _GPIO(11)
+#define TEGRA_PIN_SPI2_MOSI_PB4 _GPIO(12)
+#define TEGRA_PIN_SPI2_MISO_PB5 _GPIO(13)
+#define TEGRA_PIN_SPI2_SCK_PB6 _GPIO(14)
+#define TEGRA_PIN_SPI2_CS0_PB7 _GPIO(15)
+#define TEGRA_PIN_SPI1_MOSI_PC0 _GPIO(16)
+#define TEGRA_PIN_SPI1_MISO_PC1 _GPIO(17)
+#define TEGRA_PIN_SPI1_SCK_PC2 _GPIO(18)
+#define TEGRA_PIN_SPI1_CS0_PC3 _GPIO(19)
+#define TEGRA_PIN_SPI1_CS1_PC4 _GPIO(20)
+#define TEGRA_PIN_SPI4_SCK_PC5 _GPIO(21)
+#define TEGRA_PIN_SPI4_CS0_PC6 _GPIO(22)
+#define TEGRA_PIN_SPI4_MOSI_PC7 _GPIO(23)
+#define TEGRA_PIN_SPI4_MISO_PD0 _GPIO(24)
+#define TEGRA_PIN_UART3_TX_PD1 _GPIO(25)
+#define TEGRA_PIN_UART3_RX_PD2 _GPIO(26)
+#define TEGRA_PIN_UART3_RTS_PD3 _GPIO(27)
+#define TEGRA_PIN_UART3_CTS_PD4 _GPIO(28)
+#define TEGRA_PIN_DMIC1_CLK_PE0 _GPIO(32)
+#define TEGRA_PIN_DMIC1_DAT_PE1 _GPIO(33)
+#define TEGRA_PIN_DMIC2_CLK_PE2 _GPIO(34)
+#define TEGRA_PIN_DMIC2_DAT_PE3 _GPIO(35)
+#define TEGRA_PIN_DMIC3_CLK_PE4 _GPIO(36)
+#define TEGRA_PIN_DMIC3_DAT_PE5 _GPIO(37)
+#define TEGRA_PIN_PE6 _GPIO(38)
+#define TEGRA_PIN_PE7 _GPIO(39)
+#define TEGRA_PIN_GEN3_I2C_SCL_PF0 _GPIO(40)
+#define TEGRA_PIN_GEN3_I2C_SDA_PF1 _GPIO(41)
+#define TEGRA_PIN_UART2_TX_PG0 _GPIO(48)
+#define TEGRA_PIN_UART2_RX_PG1 _GPIO(49)
+#define TEGRA_PIN_UART2_RTS_PG2 _GPIO(50)
+#define TEGRA_PIN_UART2_CTS_PG3 _GPIO(51)
+#define TEGRA_PIN_WIFI_EN_PH0 _GPIO(56)
+#define TEGRA_PIN_WIFI_RST_PH1 _GPIO(57)
+#define TEGRA_PIN_WIFI_WAKE_AP_PH2 _GPIO(58)
+#define TEGRA_PIN_AP_WAKE_BT_PH3 _GPIO(59)
+#define TEGRA_PIN_BT_RST_PH4 _GPIO(60)
+#define TEGRA_PIN_BT_WAKE_AP_PH5 _GPIO(61)
+#define TEGRA_PIN_PH6 _GPIO(62)
+#define TEGRA_PIN_AP_WAKE_NFC_PH7 _GPIO(63)
+#define TEGRA_PIN_NFC_EN_PI0 _GPIO(64)
+#define TEGRA_PIN_NFC_INT_PI1 _GPIO(65)
+#define TEGRA_PIN_GPS_EN_PI2 _GPIO(66)
+#define TEGRA_PIN_GPS_RST_PI3 _GPIO(67)
+#define TEGRA_PIN_UART4_TX_PI4 _GPIO(68)
+#define TEGRA_PIN_UART4_RX_PI5 _GPIO(69)
+#define TEGRA_PIN_UART4_RTS_PI6 _GPIO(70)
+#define TEGRA_PIN_UART4_CTS_PI7 _GPIO(71)
+#define TEGRA_PIN_GEN1_I2C_SDA_PJ0 _GPIO(72)
+#define TEGRA_PIN_GEN1_I2C_SCL_PJ1 _GPIO(73)
+#define TEGRA_PIN_GEN2_I2C_SCL_PJ2 _GPIO(74)
+#define TEGRA_PIN_GEN2_I2C_SDA_PJ3 _GPIO(75)
+#define TEGRA_PIN_DAP4_FS_PJ4 _GPIO(76)
+#define TEGRA_PIN_DAP4_DIN_PJ5 _GPIO(77)
+#define TEGRA_PIN_DAP4_DOUT_PJ6 _GPIO(78)
+#define TEGRA_PIN_DAP4_SCLK_PJ7 _GPIO(79)
+#define TEGRA_PIN_PK0 _GPIO(80)
+#define TEGRA_PIN_PK1 _GPIO(81)
+#define TEGRA_PIN_PK2 _GPIO(82)
+#define TEGRA_PIN_PK3 _GPIO(83)
+#define TEGRA_PIN_PK4 _GPIO(84)
+#define TEGRA_PIN_PK5 _GPIO(85)
+#define TEGRA_PIN_PK6 _GPIO(86)
+#define TEGRA_PIN_PK7 _GPIO(87)
+#define TEGRA_PIN_PL0 _GPIO(88)
+#define TEGRA_PIN_PL1 _GPIO(89)
+#define TEGRA_PIN_SDMMC1_CLK_PM0 _GPIO(96)
+#define TEGRA_PIN_SDMMC1_CMD_PM1 _GPIO(97)
+#define TEGRA_PIN_SDMMC1_DAT3_PM2 _GPIO(98)
+#define TEGRA_PIN_SDMMC1_DAT2_PM3 _GPIO(99)
+#define TEGRA_PIN_SDMMC1_DAT1_PM4 _GPIO(100)
+#define TEGRA_PIN_SDMMC1_DAT0_PM5 _GPIO(101)
+#define TEGRA_PIN_SDMMC3_CLK_PP0 _GPIO(120)
+#define TEGRA_PIN_SDMMC3_CMD_PP1 _GPIO(121)
+#define TEGRA_PIN_SDMMC3_DAT3_PP2 _GPIO(122)
+#define TEGRA_PIN_SDMMC3_DAT2_PP3 _GPIO(123)
+#define TEGRA_PIN_SDMMC3_DAT1_PP4 _GPIO(124)
+#define TEGRA_PIN_SDMMC3_DAT0_PP5 _GPIO(125)
+#define TEGRA_PIN_CAM1_MCLK_PS0 _GPIO(144)
+#define TEGRA_PIN_CAM2_MCLK_PS1 _GPIO(145)
+#define TEGRA_PIN_CAM_I2C_SCL_PS2 _GPIO(146)
+#define TEGRA_PIN_CAM_I2C_SDA_PS3 _GPIO(147)
+#define TEGRA_PIN_CAM_RST_PS4 _GPIO(148)
+#define TEGRA_PIN_CAM_AF_EN_PS5 _GPIO(149)
+#define TEGRA_PIN_CAM_FLASH_EN_PS6 _GPIO(150)
+#define TEGRA_PIN_CAM1_PWDN_PS7 _GPIO(151)
+#define TEGRA_PIN_CAM2_PWDN_PT0 _GPIO(152)
+#define TEGRA_PIN_CAM1_STROBE_PT1 _GPIO(153)
+#define TEGRA_PIN_UART1_TX_PU0 _GPIO(160)
+#define TEGRA_PIN_UART1_RX_PU1 _GPIO(161)
+#define TEGRA_PIN_UART1_RTS_PU2 _GPIO(162)
+#define TEGRA_PIN_UART1_CTS_PU3 _GPIO(163)
+#define TEGRA_PIN_LCD_BL_PWM_PV0 _GPIO(168)
+#define TEGRA_PIN_LCD_BL_EN_PV1 _GPIO(169)
+#define TEGRA_PIN_LCD_RST_PV2 _GPIO(170)
+#define TEGRA_PIN_LCD_GPIO1_PV3 _GPIO(171)
+#define TEGRA_PIN_LCD_GPIO2_PV4 _GPIO(172)
+#define TEGRA_PIN_AP_READY_PV5 _GPIO(173)
+#define TEGRA_PIN_TOUCH_RST_PV6 _GPIO(174)
+#define TEGRA_PIN_TOUCH_CLK_PV7 _GPIO(175)
+#define TEGRA_PIN_MODEM_WAKE_AP_PX0 _GPIO(184)
+#define TEGRA_PIN_TOUCH_INT_PX1 _GPIO(185)
+#define TEGRA_PIN_MOTION_INT_PX2 _GPIO(186)
+#define TEGRA_PIN_ALS_PROX_INT_PX3 _GPIO(187)
+#define TEGRA_PIN_TEMP_ALERT_PX4 _GPIO(188)
+#define TEGRA_PIN_BUTTON_POWER_ON_PX5 _GPIO(189)
+#define TEGRA_PIN_BUTTON_VOL_UP_PX6 _GPIO(190)
+#define TEGRA_PIN_BUTTON_VOL_DOWN_PX7 _GPIO(191)
+#define TEGRA_PIN_BUTTON_SLIDE_SW_PY0 _GPIO(192)
+#define TEGRA_PIN_BUTTON_HOME_PY1 _GPIO(193)
+#define TEGRA_PIN_LCD_TE_PY2 _GPIO(194)
+#define TEGRA_PIN_PWR_I2C_SCL_PY3 _GPIO(195)
+#define TEGRA_PIN_PWR_I2C_SDA_PY4 _GPIO(196)
+#define TEGRA_PIN_CLK_32K_OUT_PY5 _GPIO(197)
+#define TEGRA_PIN_PZ0 _GPIO(200)
+#define TEGRA_PIN_PZ1 _GPIO(201)
+#define TEGRA_PIN_PZ2 _GPIO(202)
+#define TEGRA_PIN_PZ3 _GPIO(203)
+#define TEGRA_PIN_PZ4 _GPIO(204)
+#define TEGRA_PIN_PZ5 _GPIO(205)
+#define TEGRA_PIN_DAP2_FS_PAA0 _GPIO(208)
+#define TEGRA_PIN_DAP2_SCLK_PAA1 _GPIO(209)
+#define TEGRA_PIN_DAP2_DIN_PAA2 _GPIO(210)
+#define TEGRA_PIN_DAP2_DOUT_PAA3 _GPIO(211)
+#define TEGRA_PIN_AUD_MCLK_PBB0 _GPIO(216)
+#define TEGRA_PIN_DVFS_PWM_PBB1 _GPIO(217)
+#define TEGRA_PIN_DVFS_CLK_PBB2 _GPIO(218)
+#define TEGRA_PIN_GPIO_X1_AUD_PBB3 _GPIO(219)
+#define TEGRA_PIN_GPIO_X3_AUD_PBB4 _GPIO(220)
+#define TEGRA_PIN_HDMI_CEC_PCC0 _GPIO(224)
+#define TEGRA_PIN_HDMI_INT_DP_HPD_PCC1 _GPIO(225)
+#define TEGRA_PIN_SPDIF_OUT_PCC2 _GPIO(226)
+#define TEGRA_PIN_SPDIF_IN_PCC3 _GPIO(227)
+#define TEGRA_PIN_USB_VBUS_EN0_PCC4 _GPIO(228)
+#define TEGRA_PIN_USB_VBUS_EN1_PCC5 _GPIO(229)
+#define TEGRA_PIN_DP_HPD0_PCC6 _GPIO(230)
+#define TEGRA_PIN_PCC7 _GPIO(231)
+#define TEGRA_PIN_SPI2_CS1_PDD0 _GPIO(232)
+#define TEGRA_PIN_QSPI_SCK_PEE0 _GPIO(240)
+#define TEGRA_PIN_QSPI_CS_N_PEE1 _GPIO(241)
+#define TEGRA_PIN_QSPI_IO0_PEE2 _GPIO(242)
+#define TEGRA_PIN_QSPI_IO1_PEE3 _GPIO(243)
+#define TEGRA_PIN_QSPI_IO2_PEE4 _GPIO(244)
+#define TEGRA_PIN_QSPI_IO3_PEE5 _GPIO(245)
+
+/* All non-GPIO pins follow */
+#define NUM_GPIOS (TEGRA_PIN_QSPI_IO3_PEE5 + 1)
+#define _PIN(offset) (NUM_GPIOS + (offset))
+
+/* Non-GPIO pins */
+#define TEGRA_PIN_CORE_PWR_REQ _PIN(0)
+#define TEGRA_PIN_CPU_PWR_REQ _PIN(1)
+#define TEGRA_PIN_PWR_INT_N _PIN(2)
+#define TEGRA_PIN_CLK_32K_IN _PIN(3)
+#define TEGRA_PIN_JTAG_RTCK _PIN(4)
+#define TEGRA_PIN_BATT_BCL _PIN(5)
+#define TEGRA_PIN_CLK_REQ _PIN(6)
+#define TEGRA_PIN_SHUTDOWN _PIN(7)
+
+static const struct pinctrl_pin_desc tegra210_pins[] = {
+ PINCTRL_PIN(TEGRA_PIN_PEX_L0_RST_N_PA0, "PEX_L0_RST_N PA0"),
+ PINCTRL_PIN(TEGRA_PIN_PEX_L0_CLKREQ_N_PA1, "PEX_L0_CLKREQ_N PA1"),
+ PINCTRL_PIN(TEGRA_PIN_PEX_WAKE_N_PA2, "PEX_WAKE_N PA2"),
+ PINCTRL_PIN(TEGRA_PIN_PEX_L1_RST_N_PA3, "PEX_L1_RST_N PA3"),
+ PINCTRL_PIN(TEGRA_PIN_PEX_L1_CLKREQ_N_PA4, "PEX_L1_CLKREQ_N PA4"),
+ PINCTRL_PIN(TEGRA_PIN_SATA_LED_ACTIVE_PA5, "SATA_LED_ACTIVE PA5"),
+ PINCTRL_PIN(TEGRA_PIN_PA6, "PA6"),
+ PINCTRL_PIN(TEGRA_PIN_DAP1_FS_PB0, "DAP1_FS PB0"),
+ PINCTRL_PIN(TEGRA_PIN_DAP1_DIN_PB1, "DAP1_DIN PB1"),
+ PINCTRL_PIN(TEGRA_PIN_DAP1_DOUT_PB2, "DAP1_DOUT PB2"),
+ PINCTRL_PIN(TEGRA_PIN_DAP1_SCLK_PB3, "DAP1_SCLK PB3"),
+ PINCTRL_PIN(TEGRA_PIN_SPI2_MOSI_PB4, "SPI2_MOSI PB4"),
+ PINCTRL_PIN(TEGRA_PIN_SPI2_MISO_PB5, "SPI2_MISO PB5"),
+ PINCTRL_PIN(TEGRA_PIN_SPI2_SCK_PB6, "SPI2_SCK PB6"),
+ PINCTRL_PIN(TEGRA_PIN_SPI2_CS0_PB7, "SPI2_CS0 PB7"),
+ PINCTRL_PIN(TEGRA_PIN_SPI1_MOSI_PC0, "SPI1_MOSI PC0"),
+ PINCTRL_PIN(TEGRA_PIN_SPI1_MISO_PC1, "SPI1_MISO PC1"),
+ PINCTRL_PIN(TEGRA_PIN_SPI1_SCK_PC2, "SPI1_SCK PC2"),
+ PINCTRL_PIN(TEGRA_PIN_SPI1_CS0_PC3, "SPI1_CS0 PC3"),
+ PINCTRL_PIN(TEGRA_PIN_SPI1_CS1_PC4, "SPI1_CS1 PC4"),
+ PINCTRL_PIN(TEGRA_PIN_SPI4_SCK_PC5, "SPI4_SCK PC5"),
+ PINCTRL_PIN(TEGRA_PIN_SPI4_CS0_PC6, "SPI4_CS0 PC6"),
+ PINCTRL_PIN(TEGRA_PIN_SPI4_MOSI_PC7, "SPI4_MOSI PC7"),
+ PINCTRL_PIN(TEGRA_PIN_SPI4_MISO_PD0, "SPI4_MISO PD0"),
+ PINCTRL_PIN(TEGRA_PIN_UART3_TX_PD1, "UART3_TX PD1"),
+ PINCTRL_PIN(TEGRA_PIN_UART3_RX_PD2, "UART3_RX PD2"),
+ PINCTRL_PIN(TEGRA_PIN_UART3_RTS_PD3, "UART3_RTS PD3"),
+ PINCTRL_PIN(TEGRA_PIN_UART3_CTS_PD4, "UART3_CTS PD4"),
+ PINCTRL_PIN(TEGRA_PIN_DMIC1_CLK_PE0, "DMIC1_CLK PE0"),
+ PINCTRL_PIN(TEGRA_PIN_DMIC1_DAT_PE1, "DMIC1_DAT PE1"),
+ PINCTRL_PIN(TEGRA_PIN_DMIC2_CLK_PE2, "DMIC2_CLK PE2"),
+ PINCTRL_PIN(TEGRA_PIN_DMIC2_DAT_PE3, "DMIC2_DAT PE3"),
+ PINCTRL_PIN(TEGRA_PIN_DMIC3_CLK_PE4, "DMIC3_CLK PE4"),
+ PINCTRL_PIN(TEGRA_PIN_DMIC3_DAT_PE5, "DMIC3_DAT PE5"),
+ PINCTRL_PIN(TEGRA_PIN_PE6, "PE6"),
+ PINCTRL_PIN(TEGRA_PIN_PE7, "PE7"),
+ PINCTRL_PIN(TEGRA_PIN_GEN3_I2C_SCL_PF0, "GEN3_I2C_SCL PF0"),
+ PINCTRL_PIN(TEGRA_PIN_GEN3_I2C_SDA_PF1, "GEN3_I2C_SDA PF1"),
+ PINCTRL_PIN(TEGRA_PIN_UART2_TX_PG0, "UART2_TX PG0"),
+ PINCTRL_PIN(TEGRA_PIN_UART2_RX_PG1, "UART2_RX PG1"),
+ PINCTRL_PIN(TEGRA_PIN_UART2_RTS_PG2, "UART2_RTS PG2"),
+ PINCTRL_PIN(TEGRA_PIN_UART2_CTS_PG3, "UART2_CTS PG3"),
+ PINCTRL_PIN(TEGRA_PIN_WIFI_EN_PH0, "WIFI_EN PH0"),
+ PINCTRL_PIN(TEGRA_PIN_WIFI_RST_PH1, "WIFI_RST PH1"),
+ PINCTRL_PIN(TEGRA_PIN_WIFI_WAKE_AP_PH2, "WIFI_WAKE_AP PH2"),
+ PINCTRL_PIN(TEGRA_PIN_AP_WAKE_BT_PH3, "AP_WAKE_BT PH3"),
+ PINCTRL_PIN(TEGRA_PIN_BT_RST_PH4, "BT_RST PH4"),
+ PINCTRL_PIN(TEGRA_PIN_BT_WAKE_AP_PH5, "BT_WAKE_AP PH5"),
+ PINCTRL_PIN(TEGRA_PIN_PH6, "PH6"),
+ PINCTRL_PIN(TEGRA_PIN_AP_WAKE_NFC_PH7, "AP_WAKE_NFC PH7"),
+ PINCTRL_PIN(TEGRA_PIN_NFC_EN_PI0, "NFC_EN PI0"),
+ PINCTRL_PIN(TEGRA_PIN_NFC_INT_PI1, "NFC_INT PI1"),
+ PINCTRL_PIN(TEGRA_PIN_GPS_EN_PI2, "GPS_EN PI2"),
+ PINCTRL_PIN(TEGRA_PIN_GPS_RST_PI3, "GPS_RST PI3"),
+ PINCTRL_PIN(TEGRA_PIN_UART4_TX_PI4, "UART4_TX PI4"),
+ PINCTRL_PIN(TEGRA_PIN_UART4_RX_PI5, "UART4_RX PI5"),
+ PINCTRL_PIN(TEGRA_PIN_UART4_RTS_PI6, "UART4_RTS PI6"),
+ PINCTRL_PIN(TEGRA_PIN_UART4_CTS_PI7, "UART4_CTS PI7"),
+ PINCTRL_PIN(TEGRA_PIN_GEN1_I2C_SDA_PJ0, "GEN1_I2C_SDA PJ0"),
+ PINCTRL_PIN(TEGRA_PIN_GEN1_I2C_SCL_PJ1, "GEN1_I2C_SCL PJ1"),
+ PINCTRL_PIN(TEGRA_PIN_GEN2_I2C_SCL_PJ2, "GEN2_I2C_SCL PJ2"),
+ PINCTRL_PIN(TEGRA_PIN_GEN2_I2C_SDA_PJ3, "GEN2_I2C_SDA PJ3"),
+ PINCTRL_PIN(TEGRA_PIN_DAP4_FS_PJ4, "DAP4_FS PJ4"),
+ PINCTRL_PIN(TEGRA_PIN_DAP4_DIN_PJ5, "DAP4_DIN PJ5"),
+ PINCTRL_PIN(TEGRA_PIN_DAP4_DOUT_PJ6, "DAP4_DOUT PJ6"),
+ PINCTRL_PIN(TEGRA_PIN_DAP4_SCLK_PJ7, "DAP4_SCLK PJ7"),
+ PINCTRL_PIN(TEGRA_PIN_PK0, "PK0"),
+ PINCTRL_PIN(TEGRA_PIN_PK1, "PK1"),
+ PINCTRL_PIN(TEGRA_PIN_PK2, "PK2"),
+ PINCTRL_PIN(TEGRA_PIN_PK3, "PK3"),
+ PINCTRL_PIN(TEGRA_PIN_PK4, "PK4"),
+ PINCTRL_PIN(TEGRA_PIN_PK5, "PK5"),
+ PINCTRL_PIN(TEGRA_PIN_PK6, "PK6"),
+ PINCTRL_PIN(TEGRA_PIN_PK7, "PK7"),
+ PINCTRL_PIN(TEGRA_PIN_PL0, "PL0"),
+ PINCTRL_PIN(TEGRA_PIN_PL1, "PL1"),
+ PINCTRL_PIN(TEGRA_PIN_SDMMC1_CLK_PM0, "SDMMC1_CLK PM0"),
+ PINCTRL_PIN(TEGRA_PIN_SDMMC1_CMD_PM1, "SDMMC1_CMD PM1"),
+ PINCTRL_PIN(TEGRA_PIN_SDMMC1_DAT3_PM2, "SDMMC1_DAT3 PM2"),
+ PINCTRL_PIN(TEGRA_PIN_SDMMC1_DAT2_PM3, "SDMMC1_DAT2 PM3"),
+ PINCTRL_PIN(TEGRA_PIN_SDMMC1_DAT1_PM4, "SDMMC1_DAT1 PM4"),
+ PINCTRL_PIN(TEGRA_PIN_SDMMC1_DAT0_PM5, "SDMMC1_DAT0 PM5"),
+ PINCTRL_PIN(TEGRA_PIN_SDMMC3_CLK_PP0, "SDMMC3_CLK PP0"),
+ PINCTRL_PIN(TEGRA_PIN_SDMMC3_CMD_PP1, "SDMMC3_CMD PP1"),
+ PINCTRL_PIN(TEGRA_PIN_SDMMC3_DAT3_PP2, "SDMMC3_DAT3 PP2"),
+ PINCTRL_PIN(TEGRA_PIN_SDMMC3_DAT2_PP3, "SDMMC3_DAT2 PP3"),
+ PINCTRL_PIN(TEGRA_PIN_SDMMC3_DAT1_PP4, "SDMMC3_DAT1 PP4"),
+ PINCTRL_PIN(TEGRA_PIN_SDMMC3_DAT0_PP5, "SDMMC3_DAT0 PP5"),
+ PINCTRL_PIN(TEGRA_PIN_CAM1_MCLK_PS0, "CAM1_MCLK PS0"),
+ PINCTRL_PIN(TEGRA_PIN_CAM2_MCLK_PS1, "CAM2_MCLK PS1"),
+ PINCTRL_PIN(TEGRA_PIN_CAM_I2C_SCL_PS2, "CAM_I2C_SCL PS2"),
+ PINCTRL_PIN(TEGRA_PIN_CAM_I2C_SDA_PS3, "CAM_I2C_SDA PS3"),
+ PINCTRL_PIN(TEGRA_PIN_CAM_RST_PS4, "CAM_RST PS4"),
+ PINCTRL_PIN(TEGRA_PIN_CAM_AF_EN_PS5, "CAM_AF_EN PS5"),
+ PINCTRL_PIN(TEGRA_PIN_CAM_FLASH_EN_PS6, "CAM_FLASH_EN PS6"),
+ PINCTRL_PIN(TEGRA_PIN_CAM1_PWDN_PS7, "CAM1_PWDN PS7"),
+ PINCTRL_PIN(TEGRA_PIN_CAM2_PWDN_PT0, "CAM2_PWDN PT0"),
+ PINCTRL_PIN(TEGRA_PIN_CAM1_STROBE_PT1, "CAM1_STROBE PT1"),
+ PINCTRL_PIN(TEGRA_PIN_UART1_TX_PU0, "UART1_TX PU0"),
+ PINCTRL_PIN(TEGRA_PIN_UART1_RX_PU1, "UART1_RX PU1"),
+ PINCTRL_PIN(TEGRA_PIN_UART1_RTS_PU2, "UART1_RTS PU2"),
+ PINCTRL_PIN(TEGRA_PIN_UART1_CTS_PU3, "UART1_CTS PU3"),
+ PINCTRL_PIN(TEGRA_PIN_LCD_BL_PWM_PV0, "LCD_BL_PWM PV0"),
+ PINCTRL_PIN(TEGRA_PIN_LCD_BL_EN_PV1, "LCD_BL_EN PV1"),
+ PINCTRL_PIN(TEGRA_PIN_LCD_RST_PV2, "LCD_RST PV2"),
+ PINCTRL_PIN(TEGRA_PIN_LCD_GPIO1_PV3, "LCD_GPIO1 PV3"),
+ PINCTRL_PIN(TEGRA_PIN_LCD_GPIO2_PV4, "LCD_GPIO2 PV4"),
+ PINCTRL_PIN(TEGRA_PIN_AP_READY_PV5, "AP_READY PV5"),
+ PINCTRL_PIN(TEGRA_PIN_TOUCH_RST_PV6, "TOUCH_RST PV6"),
+ PINCTRL_PIN(TEGRA_PIN_TOUCH_CLK_PV7, "TOUCH_CLK PV7"),
+ PINCTRL_PIN(TEGRA_PIN_MODEM_WAKE_AP_PX0, "MODEM_WAKE_AP PX0"),
+ PINCTRL_PIN(TEGRA_PIN_TOUCH_INT_PX1, "TOUCH_INT PX1"),
+ PINCTRL_PIN(TEGRA_PIN_MOTION_INT_PX2, "MOTION_INT PX2"),
+ PINCTRL_PIN(TEGRA_PIN_ALS_PROX_INT_PX3, "ALS_PROX_INT PX3"),
+ PINCTRL_PIN(TEGRA_PIN_TEMP_ALERT_PX4, "TEMP_ALERT PX4"),
+ PINCTRL_PIN(TEGRA_PIN_BUTTON_POWER_ON_PX5, "BUTTON_POWER_ON PX5"),
+ PINCTRL_PIN(TEGRA_PIN_BUTTON_VOL_UP_PX6, "BUTTON_VOL_UP PX6"),
+ PINCTRL_PIN(TEGRA_PIN_BUTTON_VOL_DOWN_PX7, "BUTTON_VOL_DOWN PX7"),
+ PINCTRL_PIN(TEGRA_PIN_BUTTON_SLIDE_SW_PY0, "BUTTON_SLIDE_SW PY0"),
+ PINCTRL_PIN(TEGRA_PIN_BUTTON_HOME_PY1, "BUTTON_HOME PY1"),
+ PINCTRL_PIN(TEGRA_PIN_LCD_TE_PY2, "LCD_TE PY2"),
+ PINCTRL_PIN(TEGRA_PIN_PWR_I2C_SCL_PY3, "PWR_I2C_SCL PY3"),
+ PINCTRL_PIN(TEGRA_PIN_PWR_I2C_SDA_PY4, "PWR_I2C_SDA PY4"),
+ PINCTRL_PIN(TEGRA_PIN_CLK_32K_OUT_PY5, "CLK_32K_OUT PY5"),
+ PINCTRL_PIN(TEGRA_PIN_PZ0, "PZ0"),
+ PINCTRL_PIN(TEGRA_PIN_PZ1, "PZ1"),
+ PINCTRL_PIN(TEGRA_PIN_PZ2, "PZ2"),
+ PINCTRL_PIN(TEGRA_PIN_PZ3, "PZ3"),
+ PINCTRL_PIN(TEGRA_PIN_PZ4, "PZ4"),
+ PINCTRL_PIN(TEGRA_PIN_PZ5, "PZ5"),
+ PINCTRL_PIN(TEGRA_PIN_DAP2_FS_PAA0, "DAP2_FS PAA0"),
+ PINCTRL_PIN(TEGRA_PIN_DAP2_SCLK_PAA1, "DAP2_SCLK PAA1"),
+ PINCTRL_PIN(TEGRA_PIN_DAP2_DIN_PAA2, "DAP2_DIN PAA2"),
+ PINCTRL_PIN(TEGRA_PIN_DAP2_DOUT_PAA3, "DAP2_DOUT PAA3"),
+ PINCTRL_PIN(TEGRA_PIN_AUD_MCLK_PBB0, "AUD_MCLK PBB0"),
+ PINCTRL_PIN(TEGRA_PIN_DVFS_PWM_PBB1, "DVFS_PWM PBB1"),
+ PINCTRL_PIN(TEGRA_PIN_DVFS_CLK_PBB2, "DVFS_CLK PBB2"),
+ PINCTRL_PIN(TEGRA_PIN_GPIO_X1_AUD_PBB3, "GPIO_X1_AUD PBB3"),
+ PINCTRL_PIN(TEGRA_PIN_GPIO_X3_AUD_PBB4, "GPIO_X3_AUD PBB4"),
+ PINCTRL_PIN(TEGRA_PIN_HDMI_CEC_PCC0, "HDMI_CEC PCC0"),
+ PINCTRL_PIN(TEGRA_PIN_HDMI_INT_DP_HPD_PCC1, "HDMI_INT_DP_HPD PCC1"),
+ PINCTRL_PIN(TEGRA_PIN_SPDIF_OUT_PCC2, "SPDIF_OUT PCC2"),
+ PINCTRL_PIN(TEGRA_PIN_SPDIF_IN_PCC3, "SPDIF_IN PCC3"),
+ PINCTRL_PIN(TEGRA_PIN_USB_VBUS_EN0_PCC4, "USB_VBUS_EN0 PCC4"),
+ PINCTRL_PIN(TEGRA_PIN_USB_VBUS_EN1_PCC5, "USB_VBUS_EN1 PCC5"),
+ PINCTRL_PIN(TEGRA_PIN_DP_HPD0_PCC6, "DP_HPD0 PCC6"),
+ PINCTRL_PIN(TEGRA_PIN_PCC7, "PCC7"),
+ PINCTRL_PIN(TEGRA_PIN_SPI2_CS1_PDD0, "SPI2_CS1 PDD0"),
+ PINCTRL_PIN(TEGRA_PIN_QSPI_SCK_PEE0, "QSPI_SCK PEE0"),
+ PINCTRL_PIN(TEGRA_PIN_QSPI_CS_N_PEE1, "QSPI_CS_N PEE1"),
+ PINCTRL_PIN(TEGRA_PIN_QSPI_IO0_PEE2, "QSPI_IO0 PEE2"),
+ PINCTRL_PIN(TEGRA_PIN_QSPI_IO1_PEE3, "QSPI_IO1 PEE3"),
+ PINCTRL_PIN(TEGRA_PIN_QSPI_IO2_PEE4, "QSPI_IO2 PEE4"),
+ PINCTRL_PIN(TEGRA_PIN_QSPI_IO3_PEE5, "QSPI_IO3 PEE5"),
+ PINCTRL_PIN(TEGRA_PIN_CORE_PWR_REQ, "CORE_PWR_REQ"),
+ PINCTRL_PIN(TEGRA_PIN_CPU_PWR_REQ, "CPU_PWR_REQ"),
+ PINCTRL_PIN(TEGRA_PIN_PWR_INT_N, "PWR_INT_N"),
+ PINCTRL_PIN(TEGRA_PIN_CLK_32K_IN, "CLK_32K_IN"),
+ PINCTRL_PIN(TEGRA_PIN_JTAG_RTCK, "JTAG_RTCK"),
+ PINCTRL_PIN(TEGRA_PIN_BATT_BCL, "BATT_BCL"),
+ PINCTRL_PIN(TEGRA_PIN_CLK_REQ, "CLK_REQ"),
+ PINCTRL_PIN(TEGRA_PIN_SHUTDOWN, "SHUTDOWN"),
+};
+
+static const unsigned pex_l0_rst_n_pa0_pins[] = {
+ TEGRA_PIN_PEX_L0_RST_N_PA0,
+};
+
+static const unsigned pex_l0_clkreq_n_pa1_pins[] = {
+ TEGRA_PIN_PEX_L0_CLKREQ_N_PA1,
+};
+
+static const unsigned pex_wake_n_pa2_pins[] = {
+ TEGRA_PIN_PEX_WAKE_N_PA2,
+};
+
+static const unsigned pex_l1_rst_n_pa3_pins[] = {
+ TEGRA_PIN_PEX_L1_RST_N_PA3,
+};
+
+static const unsigned pex_l1_clkreq_n_pa4_pins[] = {
+ TEGRA_PIN_PEX_L1_CLKREQ_N_PA4,
+};
+
+static const unsigned sata_led_active_pa5_pins[] = {
+ TEGRA_PIN_SATA_LED_ACTIVE_PA5,
+};
+
+static const unsigned pa6_pins[] = {
+ TEGRA_PIN_PA6,
+};
+
+static const unsigned dap1_fs_pb0_pins[] = {
+ TEGRA_PIN_DAP1_FS_PB0,
+};
+
+static const unsigned dap1_din_pb1_pins[] = {
+ TEGRA_PIN_DAP1_DIN_PB1,
+};
+
+static const unsigned dap1_dout_pb2_pins[] = {
+ TEGRA_PIN_DAP1_DOUT_PB2,
+};
+
+static const unsigned dap1_sclk_pb3_pins[] = {
+ TEGRA_PIN_DAP1_SCLK_PB3,
+};
+
+static const unsigned spi2_mosi_pb4_pins[] = {
+ TEGRA_PIN_SPI2_MOSI_PB4,
+};
+
+static const unsigned spi2_miso_pb5_pins[] = {
+ TEGRA_PIN_SPI2_MISO_PB5,
+};
+
+static const unsigned spi2_sck_pb6_pins[] = {
+ TEGRA_PIN_SPI2_SCK_PB6,
+};
+
+static const unsigned spi2_cs0_pb7_pins[] = {
+ TEGRA_PIN_SPI2_CS0_PB7,
+};
+
+static const unsigned spi1_mosi_pc0_pins[] = {
+ TEGRA_PIN_SPI1_MOSI_PC0,
+};
+
+static const unsigned spi1_miso_pc1_pins[] = {
+ TEGRA_PIN_SPI1_MISO_PC1,
+};
+
+static const unsigned spi1_sck_pc2_pins[] = {
+ TEGRA_PIN_SPI1_SCK_PC2,
+};
+
+static const unsigned spi1_cs0_pc3_pins[] = {
+ TEGRA_PIN_SPI1_CS0_PC3,
+};
+
+static const unsigned spi1_cs1_pc4_pins[] = {
+ TEGRA_PIN_SPI1_CS1_PC4,
+};
+
+static const unsigned spi4_sck_pc5_pins[] = {
+ TEGRA_PIN_SPI4_SCK_PC5,
+};
+
+static const unsigned spi4_cs0_pc6_pins[] = {
+ TEGRA_PIN_SPI4_CS0_PC6,
+};
+
+static const unsigned spi4_mosi_pc7_pins[] = {
+ TEGRA_PIN_SPI4_MOSI_PC7,
+};
+
+static const unsigned spi4_miso_pd0_pins[] = {
+ TEGRA_PIN_SPI4_MISO_PD0,
+};
+
+static const unsigned uart3_tx_pd1_pins[] = {
+ TEGRA_PIN_UART3_TX_PD1,
+};
+
+static const unsigned uart3_rx_pd2_pins[] = {
+ TEGRA_PIN_UART3_RX_PD2,
+};
+
+static const unsigned uart3_rts_pd3_pins[] = {
+ TEGRA_PIN_UART3_RTS_PD3,
+};
+
+static const unsigned uart3_cts_pd4_pins[] = {
+ TEGRA_PIN_UART3_CTS_PD4,
+};
+
+static const unsigned dmic1_clk_pe0_pins[] = {
+ TEGRA_PIN_DMIC1_CLK_PE0,
+};
+
+static const unsigned dmic1_dat_pe1_pins[] = {
+ TEGRA_PIN_DMIC1_DAT_PE1,
+};
+
+static const unsigned dmic2_clk_pe2_pins[] = {
+ TEGRA_PIN_DMIC2_CLK_PE2,
+};
+
+static const unsigned dmic2_dat_pe3_pins[] = {
+ TEGRA_PIN_DMIC2_DAT_PE3,
+};
+
+static const unsigned dmic3_clk_pe4_pins[] = {
+ TEGRA_PIN_DMIC3_CLK_PE4,
+};
+
+static const unsigned dmic3_dat_pe5_pins[] = {
+ TEGRA_PIN_DMIC3_DAT_PE5,
+};
+
+static const unsigned pe6_pins[] = {
+ TEGRA_PIN_PE6,
+};
+
+static const unsigned pe7_pins[] = {
+ TEGRA_PIN_PE7,
+};
+
+static const unsigned gen3_i2c_scl_pf0_pins[] = {
+ TEGRA_PIN_GEN3_I2C_SCL_PF0,
+};
+
+static const unsigned gen3_i2c_sda_pf1_pins[] = {
+ TEGRA_PIN_GEN3_I2C_SDA_PF1,
+};
+
+static const unsigned uart2_tx_pg0_pins[] = {
+ TEGRA_PIN_UART2_TX_PG0,
+};
+
+static const unsigned uart2_rx_pg1_pins[] = {
+ TEGRA_PIN_UART2_RX_PG1,
+};
+
+static const unsigned uart2_rts_pg2_pins[] = {
+ TEGRA_PIN_UART2_RTS_PG2,
+};
+
+static const unsigned uart2_cts_pg3_pins[] = {
+ TEGRA_PIN_UART2_CTS_PG3,
+};
+
+static const unsigned wifi_en_ph0_pins[] = {
+ TEGRA_PIN_WIFI_EN_PH0,
+};
+
+static const unsigned wifi_rst_ph1_pins[] = {
+ TEGRA_PIN_WIFI_RST_PH1,
+};
+
+static const unsigned wifi_wake_ap_ph2_pins[] = {
+ TEGRA_PIN_WIFI_WAKE_AP_PH2,
+};
+
+static const unsigned ap_wake_bt_ph3_pins[] = {
+ TEGRA_PIN_AP_WAKE_BT_PH3,
+};
+
+static const unsigned bt_rst_ph4_pins[] = {
+ TEGRA_PIN_BT_RST_PH4,
+};
+
+static const unsigned bt_wake_ap_ph5_pins[] = {
+ TEGRA_PIN_BT_WAKE_AP_PH5,
+};
+
+static const unsigned ph6_pins[] = {
+ TEGRA_PIN_PH6,
+};
+
+static const unsigned ap_wake_nfc_ph7_pins[] = {
+ TEGRA_PIN_AP_WAKE_NFC_PH7,
+};
+
+static const unsigned nfc_en_pi0_pins[] = {
+ TEGRA_PIN_NFC_EN_PI0,
+};
+
+static const unsigned nfc_int_pi1_pins[] = {
+ TEGRA_PIN_NFC_INT_PI1,
+};
+
+static const unsigned gps_en_pi2_pins[] = {
+ TEGRA_PIN_GPS_EN_PI2,
+};
+
+static const unsigned gps_rst_pi3_pins[] = {
+ TEGRA_PIN_GPS_RST_PI3,
+};
+
+static const unsigned uart4_tx_pi4_pins[] = {
+ TEGRA_PIN_UART4_TX_PI4,
+};
+
+static const unsigned uart4_rx_pi5_pins[] = {
+ TEGRA_PIN_UART4_RX_PI5,
+};
+
+static const unsigned uart4_rts_pi6_pins[] = {
+ TEGRA_PIN_UART4_RTS_PI6,
+};
+
+static const unsigned uart4_cts_pi7_pins[] = {
+ TEGRA_PIN_UART4_CTS_PI7,
+};
+
+static const unsigned gen1_i2c_sda_pj0_pins[] = {
+ TEGRA_PIN_GEN1_I2C_SDA_PJ0,
+};
+
+static const unsigned gen1_i2c_scl_pj1_pins[] = {
+ TEGRA_PIN_GEN1_I2C_SCL_PJ1,
+};
+
+static const unsigned gen2_i2c_scl_pj2_pins[] = {
+ TEGRA_PIN_GEN2_I2C_SCL_PJ2,
+};
+
+static const unsigned gen2_i2c_sda_pj3_pins[] = {
+ TEGRA_PIN_GEN2_I2C_SDA_PJ3,
+};
+
+static const unsigned dap4_fs_pj4_pins[] = {
+ TEGRA_PIN_DAP4_FS_PJ4,
+};
+
+static const unsigned dap4_din_pj5_pins[] = {
+ TEGRA_PIN_DAP4_DIN_PJ5,
+};
+
+static const unsigned dap4_dout_pj6_pins[] = {
+ TEGRA_PIN_DAP4_DOUT_PJ6,
+};
+
+static const unsigned dap4_sclk_pj7_pins[] = {
+ TEGRA_PIN_DAP4_SCLK_PJ7,
+};
+
+static const unsigned pk0_pins[] = {
+ TEGRA_PIN_PK0,
+};
+
+static const unsigned pk1_pins[] = {
+ TEGRA_PIN_PK1,
+};
+
+static const unsigned pk2_pins[] = {
+ TEGRA_PIN_PK2,
+};
+
+static const unsigned pk3_pins[] = {
+ TEGRA_PIN_PK3,
+};
+
+static const unsigned pk4_pins[] = {
+ TEGRA_PIN_PK4,
+};
+
+static const unsigned pk5_pins[] = {
+ TEGRA_PIN_PK5,
+};
+
+static const unsigned pk6_pins[] = {
+ TEGRA_PIN_PK6,
+};
+
+static const unsigned pk7_pins[] = {
+ TEGRA_PIN_PK7,
+};
+
+static const unsigned pl0_pins[] = {
+ TEGRA_PIN_PL0,
+};
+
+static const unsigned pl1_pins[] = {
+ TEGRA_PIN_PL1,
+};
+
+static const unsigned sdmmc1_clk_pm0_pins[] = {
+ TEGRA_PIN_SDMMC1_CLK_PM0,
+};
+
+static const unsigned sdmmc1_cmd_pm1_pins[] = {
+ TEGRA_PIN_SDMMC1_CMD_PM1,
+};
+
+static const unsigned sdmmc1_dat3_pm2_pins[] = {
+ TEGRA_PIN_SDMMC1_DAT3_PM2,
+};
+
+static const unsigned sdmmc1_dat2_pm3_pins[] = {
+ TEGRA_PIN_SDMMC1_DAT2_PM3,
+};
+
+static const unsigned sdmmc1_dat1_pm4_pins[] = {
+ TEGRA_PIN_SDMMC1_DAT1_PM4,
+};
+
+static const unsigned sdmmc1_dat0_pm5_pins[] = {
+ TEGRA_PIN_SDMMC1_DAT0_PM5,
+};
+
+static const unsigned sdmmc3_clk_pp0_pins[] = {
+ TEGRA_PIN_SDMMC3_CLK_PP0,
+};
+
+static const unsigned sdmmc3_cmd_pp1_pins[] = {
+ TEGRA_PIN_SDMMC3_CMD_PP1,
+};
+
+static const unsigned sdmmc3_dat3_pp2_pins[] = {
+ TEGRA_PIN_SDMMC3_DAT3_PP2,
+};
+
+static const unsigned sdmmc3_dat2_pp3_pins[] = {
+ TEGRA_PIN_SDMMC3_DAT2_PP3,
+};
+
+static const unsigned sdmmc3_dat1_pp4_pins[] = {
+ TEGRA_PIN_SDMMC3_DAT1_PP4,
+};
+
+static const unsigned sdmmc3_dat0_pp5_pins[] = {
+ TEGRA_PIN_SDMMC3_DAT0_PP5,
+};
+
+static const unsigned cam1_mclk_ps0_pins[] = {
+ TEGRA_PIN_CAM1_MCLK_PS0,
+};
+
+static const unsigned cam2_mclk_ps1_pins[] = {
+ TEGRA_PIN_CAM2_MCLK_PS1,
+};
+
+static const unsigned cam_i2c_scl_ps2_pins[] = {
+ TEGRA_PIN_CAM_I2C_SCL_PS2,
+};
+
+static const unsigned cam_i2c_sda_ps3_pins[] = {
+ TEGRA_PIN_CAM_I2C_SDA_PS3,
+};
+
+static const unsigned cam_rst_ps4_pins[] = {
+ TEGRA_PIN_CAM_RST_PS4,
+};
+
+static const unsigned cam_af_en_ps5_pins[] = {
+ TEGRA_PIN_CAM_AF_EN_PS5,
+};
+
+static const unsigned cam_flash_en_ps6_pins[] = {
+ TEGRA_PIN_CAM_FLASH_EN_PS6,
+};
+
+static const unsigned cam1_pwdn_ps7_pins[] = {
+ TEGRA_PIN_CAM1_PWDN_PS7,
+};
+
+static const unsigned cam2_pwdn_pt0_pins[] = {
+ TEGRA_PIN_CAM2_PWDN_PT0,
+};
+
+static const unsigned cam1_strobe_pt1_pins[] = {
+ TEGRA_PIN_CAM1_STROBE_PT1,
+};
+
+static const unsigned uart1_tx_pu0_pins[] = {
+ TEGRA_PIN_UART1_TX_PU0,
+};
+
+static const unsigned uart1_rx_pu1_pins[] = {
+ TEGRA_PIN_UART1_RX_PU1,
+};
+
+static const unsigned uart1_rts_pu2_pins[] = {
+ TEGRA_PIN_UART1_RTS_PU2,
+};
+
+static const unsigned uart1_cts_pu3_pins[] = {
+ TEGRA_PIN_UART1_CTS_PU3,
+};
+
+static const unsigned lcd_bl_pwm_pv0_pins[] = {
+ TEGRA_PIN_LCD_BL_PWM_PV0,
+};
+
+static const unsigned lcd_bl_en_pv1_pins[] = {
+ TEGRA_PIN_LCD_BL_EN_PV1,
+};
+
+static const unsigned lcd_rst_pv2_pins[] = {
+ TEGRA_PIN_LCD_RST_PV2,
+};
+
+static const unsigned lcd_gpio1_pv3_pins[] = {
+ TEGRA_PIN_LCD_GPIO1_PV3,
+};
+
+static const unsigned lcd_gpio2_pv4_pins[] = {
+ TEGRA_PIN_LCD_GPIO2_PV4,
+};
+
+static const unsigned ap_ready_pv5_pins[] = {
+ TEGRA_PIN_AP_READY_PV5,
+};
+
+static const unsigned touch_rst_pv6_pins[] = {
+ TEGRA_PIN_TOUCH_RST_PV6,
+};
+
+static const unsigned touch_clk_pv7_pins[] = {
+ TEGRA_PIN_TOUCH_CLK_PV7,
+};
+
+static const unsigned modem_wake_ap_px0_pins[] = {
+ TEGRA_PIN_MODEM_WAKE_AP_PX0,
+};
+
+static const unsigned touch_int_px1_pins[] = {
+ TEGRA_PIN_TOUCH_INT_PX1,
+};
+
+static const unsigned motion_int_px2_pins[] = {
+ TEGRA_PIN_MOTION_INT_PX2,
+};
+
+static const unsigned als_prox_int_px3_pins[] = {
+ TEGRA_PIN_ALS_PROX_INT_PX3,
+};
+
+static const unsigned temp_alert_px4_pins[] = {
+ TEGRA_PIN_TEMP_ALERT_PX4,
+};
+
+static const unsigned button_power_on_px5_pins[] = {
+ TEGRA_PIN_BUTTON_POWER_ON_PX5,
+};
+
+static const unsigned button_vol_up_px6_pins[] = {
+ TEGRA_PIN_BUTTON_VOL_UP_PX6,
+};
+
+static const unsigned button_vol_down_px7_pins[] = {
+ TEGRA_PIN_BUTTON_VOL_DOWN_PX7,
+};
+
+static const unsigned button_slide_sw_py0_pins[] = {
+ TEGRA_PIN_BUTTON_SLIDE_SW_PY0,
+};
+
+static const unsigned button_home_py1_pins[] = {
+ TEGRA_PIN_BUTTON_HOME_PY1,
+};
+
+static const unsigned lcd_te_py2_pins[] = {
+ TEGRA_PIN_LCD_TE_PY2,
+};
+
+static const unsigned pwr_i2c_scl_py3_pins[] = {
+ TEGRA_PIN_PWR_I2C_SCL_PY3,
+};
+
+static const unsigned pwr_i2c_sda_py4_pins[] = {
+ TEGRA_PIN_PWR_I2C_SDA_PY4,
+};
+
+static const unsigned clk_32k_out_py5_pins[] = {
+ TEGRA_PIN_CLK_32K_OUT_PY5,
+};
+
+static const unsigned pz0_pins[] = {
+ TEGRA_PIN_PZ0,
+};
+
+static const unsigned pz1_pins[] = {
+ TEGRA_PIN_PZ1,
+};
+
+static const unsigned pz2_pins[] = {
+ TEGRA_PIN_PZ2,
+};
+
+static const unsigned pz3_pins[] = {
+ TEGRA_PIN_PZ3,
+};
+
+static const unsigned pz4_pins[] = {
+ TEGRA_PIN_PZ4,
+};
+
+static const unsigned pz5_pins[] = {
+ TEGRA_PIN_PZ5,
+};
+
+static const unsigned dap2_fs_paa0_pins[] = {
+ TEGRA_PIN_DAP2_FS_PAA0,
+};
+
+static const unsigned dap2_sclk_paa1_pins[] = {
+ TEGRA_PIN_DAP2_SCLK_PAA1,
+};
+
+static const unsigned dap2_din_paa2_pins[] = {
+ TEGRA_PIN_DAP2_DIN_PAA2,
+};
+
+static const unsigned dap2_dout_paa3_pins[] = {
+ TEGRA_PIN_DAP2_DOUT_PAA3,
+};
+
+static const unsigned aud_mclk_pbb0_pins[] = {
+ TEGRA_PIN_AUD_MCLK_PBB0,
+};
+
+static const unsigned dvfs_pwm_pbb1_pins[] = {
+ TEGRA_PIN_DVFS_PWM_PBB1,
+};
+
+static const unsigned dvfs_clk_pbb2_pins[] = {
+ TEGRA_PIN_DVFS_CLK_PBB2,
+};
+
+static const unsigned gpio_x1_aud_pbb3_pins[] = {
+ TEGRA_PIN_GPIO_X1_AUD_PBB3,
+};
+
+static const unsigned gpio_x3_aud_pbb4_pins[] = {
+ TEGRA_PIN_GPIO_X3_AUD_PBB4,
+};
+
+static const unsigned hdmi_cec_pcc0_pins[] = {
+ TEGRA_PIN_HDMI_CEC_PCC0,
+};
+
+static const unsigned hdmi_int_dp_hpd_pcc1_pins[] = {
+ TEGRA_PIN_HDMI_INT_DP_HPD_PCC1,
+};
+
+static const unsigned spdif_out_pcc2_pins[] = {
+ TEGRA_PIN_SPDIF_OUT_PCC2,
+};
+
+static const unsigned spdif_in_pcc3_pins[] = {
+ TEGRA_PIN_SPDIF_IN_PCC3,
+};
+
+static const unsigned usb_vbus_en0_pcc4_pins[] = {
+ TEGRA_PIN_USB_VBUS_EN0_PCC4,
+};
+
+static const unsigned usb_vbus_en1_pcc5_pins[] = {
+ TEGRA_PIN_USB_VBUS_EN1_PCC5,
+};
+
+static const unsigned dp_hpd0_pcc6_pins[] = {
+ TEGRA_PIN_DP_HPD0_PCC6,
+};
+
+static const unsigned pcc7_pins[] = {
+ TEGRA_PIN_PCC7,
+};
+
+static const unsigned spi2_cs1_pdd0_pins[] = {
+ TEGRA_PIN_SPI2_CS1_PDD0,
+};
+
+static const unsigned qspi_sck_pee0_pins[] = {
+ TEGRA_PIN_QSPI_SCK_PEE0,
+};
+
+static const unsigned qspi_cs_n_pee1_pins[] = {
+ TEGRA_PIN_QSPI_CS_N_PEE1,
+};
+
+static const unsigned qspi_io0_pee2_pins[] = {
+ TEGRA_PIN_QSPI_IO0_PEE2,
+};
+
+static const unsigned qspi_io1_pee3_pins[] = {
+ TEGRA_PIN_QSPI_IO1_PEE3,
+};
+
+static const unsigned qspi_io2_pee4_pins[] = {
+ TEGRA_PIN_QSPI_IO2_PEE4,
+};
+
+static const unsigned qspi_io3_pee5_pins[] = {
+ TEGRA_PIN_QSPI_IO3_PEE5,
+};
+
+static const unsigned core_pwr_req_pins[] = {
+ TEGRA_PIN_CORE_PWR_REQ,
+};
+
+static const unsigned cpu_pwr_req_pins[] = {
+ TEGRA_PIN_CPU_PWR_REQ,
+};
+
+static const unsigned pwr_int_n_pins[] = {
+ TEGRA_PIN_PWR_INT_N,
+};
+
+static const unsigned clk_32k_in_pins[] = {
+ TEGRA_PIN_CLK_32K_IN,
+};
+
+static const unsigned jtag_rtck_pins[] = {
+ TEGRA_PIN_JTAG_RTCK,
+};
+
+static const unsigned batt_bcl_pins[] = {
+ TEGRA_PIN_BATT_BCL,
+};
+
+static const unsigned clk_req_pins[] = {
+ TEGRA_PIN_CLK_REQ,
+};
+
+static const unsigned shutdown_pins[] = {
+ TEGRA_PIN_SHUTDOWN,
+};
+
+static const unsigned drive_pa6_pins[] = {
+ TEGRA_PIN_PA6,
+};
+
+static const unsigned drive_pcc7_pins[] = {
+ TEGRA_PIN_PCC7,
+};
+
+static const unsigned drive_pe6_pins[] = {
+ TEGRA_PIN_PE6,
+};
+
+static const unsigned drive_pe7_pins[] = {
+ TEGRA_PIN_PE7,
+};
+
+static const unsigned drive_ph6_pins[] = {
+ TEGRA_PIN_PH6,
+};
+
+static const unsigned drive_pk0_pins[] = {
+ TEGRA_PIN_PK0,
+};
+
+static const unsigned drive_pk1_pins[] = {
+ TEGRA_PIN_PK1,
+};
+
+static const unsigned drive_pk2_pins[] = {
+ TEGRA_PIN_PK2,
+};
+
+static const unsigned drive_pk3_pins[] = {
+ TEGRA_PIN_PK3,
+};
+
+static const unsigned drive_pk4_pins[] = {
+ TEGRA_PIN_PK4,
+};
+
+static const unsigned drive_pk5_pins[] = {
+ TEGRA_PIN_PK5,
+};
+
+static const unsigned drive_pk6_pins[] = {
+ TEGRA_PIN_PK6,
+};
+
+static const unsigned drive_pk7_pins[] = {
+ TEGRA_PIN_PK7,
+};
+
+static const unsigned drive_pl0_pins[] = {
+ TEGRA_PIN_PL0,
+};
+
+static const unsigned drive_pl1_pins[] = {
+ TEGRA_PIN_PL1,
+};
+
+static const unsigned drive_pz0_pins[] = {
+ TEGRA_PIN_PZ0,
+};
+
+static const unsigned drive_pz1_pins[] = {
+ TEGRA_PIN_PZ1,
+};
+
+static const unsigned drive_pz2_pins[] = {
+ TEGRA_PIN_PZ2,
+};
+
+static const unsigned drive_pz3_pins[] = {
+ TEGRA_PIN_PZ3,
+};
+
+static const unsigned drive_pz4_pins[] = {
+ TEGRA_PIN_PZ4,
+};
+
+static const unsigned drive_pz5_pins[] = {
+ TEGRA_PIN_PZ5,
+};
+
+static const unsigned drive_sdmmc1_pins[] = {
+ TEGRA_PIN_SDMMC1_CLK_PM0,
+ TEGRA_PIN_SDMMC1_CMD_PM1,
+ TEGRA_PIN_SDMMC1_DAT3_PM2,
+ TEGRA_PIN_SDMMC1_DAT2_PM3,
+ TEGRA_PIN_SDMMC1_DAT1_PM4,
+ TEGRA_PIN_SDMMC1_DAT0_PM5,
+};
+
+static const unsigned drive_sdmmc2_pins[] = {
+};
+
+static const unsigned drive_sdmmc3_pins[] = {
+ TEGRA_PIN_SDMMC3_CLK_PP0,
+ TEGRA_PIN_SDMMC3_CMD_PP1,
+ TEGRA_PIN_SDMMC3_DAT3_PP2,
+ TEGRA_PIN_SDMMC3_DAT2_PP3,
+ TEGRA_PIN_SDMMC3_DAT1_PP4,
+ TEGRA_PIN_SDMMC3_DAT0_PP5,
+};
+
+static const unsigned drive_sdmmc4_pins[] = {
+};
+
+enum tegra_mux {
+ TEGRA_MUX_AUD,
+ TEGRA_MUX_BCL,
+ TEGRA_MUX_BLINK,
+ TEGRA_MUX_CCLA,
+ TEGRA_MUX_CEC,
+ TEGRA_MUX_CLDVFS,
+ TEGRA_MUX_CLK,
+ TEGRA_MUX_CORE,
+ TEGRA_MUX_CPU,
+ TEGRA_MUX_DISPLAYA,
+ TEGRA_MUX_DISPLAYB,
+ TEGRA_MUX_DMIC1,
+ TEGRA_MUX_DMIC2,
+ TEGRA_MUX_DMIC3,
+ TEGRA_MUX_DP,
+ TEGRA_MUX_DTV,
+ TEGRA_MUX_EXTPERIPH3,
+ TEGRA_MUX_I2C1,
+ TEGRA_MUX_I2C2,
+ TEGRA_MUX_I2C3,
+ TEGRA_MUX_I2CPMU,
+ TEGRA_MUX_I2CVI,
+ TEGRA_MUX_I2S1,
+ TEGRA_MUX_I2S2,
+ TEGRA_MUX_I2S3,
+ TEGRA_MUX_I2S4A,
+ TEGRA_MUX_I2S4B,
+ TEGRA_MUX_I2S5A,
+ TEGRA_MUX_I2S5B,
+ TEGRA_MUX_IQC0,
+ TEGRA_MUX_IQC1,
+ TEGRA_MUX_JTAG,
+ TEGRA_MUX_PE,
+ TEGRA_MUX_PE0,
+ TEGRA_MUX_PE1,
+ TEGRA_MUX_PMI,
+ TEGRA_MUX_PWM0,
+ TEGRA_MUX_PWM1,
+ TEGRA_MUX_PWM2,
+ TEGRA_MUX_PWM3,
+ TEGRA_MUX_QSPI,
+ TEGRA_MUX_RSVD0,
+ TEGRA_MUX_RSVD1,
+ TEGRA_MUX_RSVD2,
+ TEGRA_MUX_RSVD3,
+ TEGRA_MUX_SATA,
+ TEGRA_MUX_SDMMC1,
+ TEGRA_MUX_SDMMC3,
+ TEGRA_MUX_SHUTDOWN,
+ TEGRA_MUX_SOC,
+ TEGRA_MUX_SOR0,
+ TEGRA_MUX_SOR1,
+ TEGRA_MUX_SPDIF,
+ TEGRA_MUX_SPI1,
+ TEGRA_MUX_SPI2,
+ TEGRA_MUX_SPI3,
+ TEGRA_MUX_SPI4,
+ TEGRA_MUX_SYS,
+ TEGRA_MUX_TOUCH,
+ TEGRA_MUX_UART,
+ TEGRA_MUX_UARTA,
+ TEGRA_MUX_UARTB,
+ TEGRA_MUX_UARTC,
+ TEGRA_MUX_UARTD,
+ TEGRA_MUX_USB,
+ TEGRA_MUX_VGP1,
+ TEGRA_MUX_VGP2,
+ TEGRA_MUX_VGP3,
+ TEGRA_MUX_VGP4,
+ TEGRA_MUX_VGP5,
+ TEGRA_MUX_VGP6,
+ TEGRA_MUX_VIMCLK,
+ TEGRA_MUX_VIMCLK2,
+};
+
+#define FUNCTION(fname) \
+ { \
+ .name = #fname, \
+ }
+
+static struct tegra_function tegra210_functions[] = {
+ FUNCTION(aud),
+ FUNCTION(bcl),
+ FUNCTION(blink),
+ FUNCTION(ccla),
+ FUNCTION(cec),
+ FUNCTION(cldvfs),
+ FUNCTION(clk),
+ FUNCTION(core),
+ FUNCTION(cpu),
+ FUNCTION(displaya),
+ FUNCTION(displayb),
+ FUNCTION(dmic1),
+ FUNCTION(dmic2),
+ FUNCTION(dmic3),
+ FUNCTION(dp),
+ FUNCTION(dtv),
+ FUNCTION(extperiph3),
+ FUNCTION(i2c1),
+ FUNCTION(i2c2),
+ FUNCTION(i2c3),
+ FUNCTION(i2cpmu),
+ FUNCTION(i2cvi),
+ FUNCTION(i2s1),
+ FUNCTION(i2s2),
+ FUNCTION(i2s3),
+ FUNCTION(i2s4a),
+ FUNCTION(i2s4b),
+ FUNCTION(i2s5a),
+ FUNCTION(i2s5b),
+ FUNCTION(iqc0),
+ FUNCTION(iqc1),
+ FUNCTION(jtag),
+ FUNCTION(pe),
+ FUNCTION(pe0),
+ FUNCTION(pe1),
+ FUNCTION(pmi),
+ FUNCTION(pwm0),
+ FUNCTION(pwm1),
+ FUNCTION(pwm2),
+ FUNCTION(pwm3),
+ FUNCTION(qspi),
+ FUNCTION(rsvd0),
+ FUNCTION(rsvd1),
+ FUNCTION(rsvd2),
+ FUNCTION(rsvd3),
+ FUNCTION(sata),
+ FUNCTION(sdmmc1),
+ FUNCTION(sdmmc3),
+ FUNCTION(shutdown),
+ FUNCTION(soc),
+ FUNCTION(sor0),
+ FUNCTION(sor1),
+ FUNCTION(spdif),
+ FUNCTION(spi1),
+ FUNCTION(spi2),
+ FUNCTION(spi3),
+ FUNCTION(spi4),
+ FUNCTION(sys),
+ FUNCTION(touch),
+ FUNCTION(uart),
+ FUNCTION(uarta),
+ FUNCTION(uartb),
+ FUNCTION(uartc),
+ FUNCTION(uartd),
+ FUNCTION(usb),
+ FUNCTION(vgp1),
+ FUNCTION(vgp2),
+ FUNCTION(vgp3),
+ FUNCTION(vgp4),
+ FUNCTION(vgp5),
+ FUNCTION(vgp6),
+ FUNCTION(vimclk),
+ FUNCTION(vimclk2),
+};
+
+#define DRV_PINGROUP_REG_A 0x8d4 /* bank 0 */
+#define PINGROUP_REG_A 0x3000 /* bank 1 */
+
+#define DRV_PINGROUP_REG(r) ((r) - DRV_PINGROUP_REG_A)
+#define PINGROUP_REG(r) ((r) - PINGROUP_REG_A)
+
+#define PINGROUP_BIT_Y(b) (b)
+#define PINGROUP_BIT_N(b) (-1)
+
+#define PINGROUP(pg_name, f0, f1, f2, f3, r, hsm, drvtype, e_io_hv, \
+ rdrv, drvdn_b, drvdn_w, drvup_b, drvup_w, slwr_b, \
+ slwr_w, slwf_b, slwf_w) \
+ { \
+ .name = #pg_name, \
+ .pins = pg_name##_pins, \
+ .npins = ARRAY_SIZE(pg_name##_pins), \
+ .funcs = { \
+ TEGRA_MUX_##f0, \
+ TEGRA_MUX_##f1, \
+ TEGRA_MUX_##f2, \
+ TEGRA_MUX_##f3, \
+ }, \
+ .mux_reg = PINGROUP_REG(r), \
+ .mux_bank = 1, \
+ .mux_bit = 0, \
+ .pupd_reg = PINGROUP_REG(r), \
+ .pupd_bank = 1, \
+ .pupd_bit = 2, \
+ .tri_reg = PINGROUP_REG(r), \
+ .tri_bank = 1, \
+ .tri_bit = 4, \
+ .einput_bit = 6, \
+ .odrain_bit = 11, \
+ .lock_bit = 7, \
+ .ioreset_bit = -1, \
+ .rcv_sel_bit = PINGROUP_BIT_##e_io_hv(10), \
+ .hsm_bit = PINGROUP_BIT_##hsm(9), \
+ .schmitt_bit = 12, \
+ .drvtype_bit = PINGROUP_BIT_##drvtype(13), \
+ .drv_reg = DRV_PINGROUP_REG(rdrv), \
+ .drv_bank = 0, \
+ .lpmd_bit = -1, \
+ .drvdn_bit = drvdn_b, \
+ .drvdn_width = drvdn_w, \
+ .drvup_bit = drvup_b, \
+ .drvup_width = drvup_w, \
+ .slwr_bit = slwr_b, \
+ .slwr_width = slwr_w, \
+ .slwf_bit = slwf_b, \
+ .slwf_width = slwf_w, \
+ }
+
+#define DRV_PINGROUP(pg_name, r, drvdn_b, drvdn_w, drvup_b, drvup_w, \
+ slwr_b, slwr_w, slwf_b, slwf_w) \
+ { \
+ .name = "drive_" #pg_name, \
+ .pins = drive_##pg_name##_pins, \
+ .npins = ARRAY_SIZE(drive_##pg_name##_pins), \
+ .mux_reg = -1, \
+ .pupd_reg = -1, \
+ .tri_reg = -1, \
+ .einput_bit = -1, \
+ .odrain_bit = -1, \
+ .lock_bit = -1, \
+ .ioreset_bit = -1, \
+ .rcv_sel_bit = -1, \
+ .drv_reg = DRV_PINGROUP_REG(r), \
+ .drv_bank = 0, \
+ .hsm_bit = -1, \
+ .schmitt_bit = -1, \
+ .lpmd_bit = -1, \
+ .drvdn_bit = drvdn_b, \
+ .drvdn_width = drvdn_w, \
+ .drvup_bit = drvup_b, \
+ .drvup_width = drvup_w, \
+ .slwr_bit = slwr_b, \
+ .slwr_width = slwr_w, \
+ .slwf_bit = slwf_b, \
+ .slwf_width = slwf_w, \
+ .drvtype_bit = -1, \
+ }
+
+static const struct tegra_pingroup tegra210_groups[] = {
+ /* pg_name, f0, f1, f2, f3, r, hsm, drvtype, e_io_hv, rdrv, drvdn_b, drvdn_w, drvup_b, drvup_w, slwr_b, slwr_w, slwf_b, slwf_w */
+ PINGROUP(sdmmc1_clk_pm0, SDMMC1, RSVD1, RSVD2, RSVD3, 0x3000, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(sdmmc1_cmd_pm1, SDMMC1, SPI3, RSVD2, RSVD3, 0x3004, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(sdmmc1_dat3_pm2, SDMMC1, SPI3, RSVD2, RSVD3, 0x3008, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(sdmmc1_dat2_pm3, SDMMC1, SPI3, RSVD2, RSVD3, 0x300c, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(sdmmc1_dat1_pm4, SDMMC1, SPI3, RSVD2, RSVD3, 0x3010, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(sdmmc1_dat0_pm5, SDMMC1, RSVD1, RSVD2, RSVD3, 0x3014, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(sdmmc3_clk_pp0, SDMMC3, RSVD1, RSVD2, RSVD3, 0x301c, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(sdmmc3_cmd_pp1, SDMMC3, RSVD1, RSVD2, RSVD3, 0x3020, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(sdmmc3_dat0_pp5, SDMMC3, RSVD1, RSVD2, RSVD3, 0x3024, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(sdmmc3_dat1_pp4, SDMMC3, RSVD1, RSVD2, RSVD3, 0x3028, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(sdmmc3_dat2_pp3, SDMMC3, RSVD1, RSVD2, RSVD3, 0x302c, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(sdmmc3_dat3_pp2, SDMMC3, RSVD1, RSVD2, RSVD3, 0x3030, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pex_l0_rst_n_pa0, PE0, RSVD1, RSVD2, RSVD3, 0x3038, N, N, Y, 0xa5c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(pex_l0_clkreq_n_pa1, PE0, RSVD1, RSVD2, RSVD3, 0x303c, N, N, Y, 0xa58, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(pex_wake_n_pa2, PE, RSVD1, RSVD2, RSVD3, 0x3040, N, N, Y, 0xa68, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(pex_l1_rst_n_pa3, PE1, RSVD1, RSVD2, RSVD3, 0x3044, N, N, Y, 0xa64, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(pex_l1_clkreq_n_pa4, PE1, RSVD1, RSVD2, RSVD3, 0x3048, N, N, Y, 0xa60, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(sata_led_active_pa5, SATA, RSVD1, RSVD2, RSVD3, 0x304c, N, N, N, 0xa94, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(spi1_mosi_pc0, SPI1, RSVD1, RSVD2, RSVD3, 0x3050, Y, Y, N, 0xae0, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(spi1_miso_pc1, SPI1, RSVD1, RSVD2, RSVD3, 0x3054, Y, Y, N, 0xadc, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(spi1_sck_pc2, SPI1, RSVD1, RSVD2, RSVD3, 0x3058, Y, Y, N, 0xae4, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(spi1_cs0_pc3, SPI1, RSVD1, RSVD2, RSVD3, 0x305c, Y, Y, N, 0xad4, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(spi1_cs1_pc4, SPI1, RSVD1, RSVD2, RSVD3, 0x3060, Y, Y, N, 0xad8, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(spi2_mosi_pb4, SPI2, DTV, RSVD2, RSVD3, 0x3064, Y, Y, N, 0xaf4, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(spi2_miso_pb5, SPI2, DTV, RSVD2, RSVD3, 0x3068, Y, Y, N, 0xaf0, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(spi2_sck_pb6, SPI2, DTV, RSVD2, RSVD3, 0x306c, Y, Y, N, 0xaf8, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(spi2_cs0_pb7, SPI2, DTV, RSVD2, RSVD3, 0x3070, Y, Y, N, 0xae8, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(spi2_cs1_pdd0, SPI2, RSVD1, RSVD2, RSVD3, 0x3074, Y, Y, N, 0xaec, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(spi4_mosi_pc7, SPI4, RSVD1, RSVD2, RSVD3, 0x3078, Y, Y, N, 0xb04, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(spi4_miso_pd0, SPI4, RSVD1, RSVD2, RSVD3, 0x307c, Y, Y, N, 0xb00, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(spi4_sck_pc5, SPI4, RSVD1, RSVD2, RSVD3, 0x3080, Y, Y, N, 0xb08, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(spi4_cs0_pc6, SPI4, RSVD1, RSVD2, RSVD3, 0x3084, Y, Y, N, 0xafc, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(qspi_sck_pee0, QSPI, RSVD1, RSVD2, RSVD3, 0x3088, Y, Y, N, 0xa90, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(qspi_cs_n_pee1, QSPI, RSVD1, RSVD2, RSVD3, 0x308c, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(qspi_io0_pee2, QSPI, RSVD1, RSVD2, RSVD3, 0x3090, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(qspi_io1_pee3, QSPI, RSVD1, RSVD2, RSVD3, 0x3094, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(qspi_io2_pee4, QSPI, RSVD1, RSVD2, RSVD3, 0x3098, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(qspi_io3_pee5, QSPI, RSVD1, RSVD2, RSVD3, 0x309c, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(dmic1_clk_pe0, DMIC1, I2S3, RSVD2, RSVD3, 0x30a4, N, N, N, 0x984, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(dmic1_dat_pe1, DMIC1, I2S3, RSVD2, RSVD3, 0x30a8, N, N, N, 0x988, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(dmic2_clk_pe2, DMIC2, I2S3, RSVD2, RSVD3, 0x30ac, N, N, N, 0x98c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(dmic2_dat_pe3, DMIC2, I2S3, RSVD2, RSVD3, 0x30b0, N, N, N, 0x990, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(dmic3_clk_pe4, DMIC3, I2S5A, RSVD2, RSVD3, 0x30b4, N, N, N, 0x994, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(dmic3_dat_pe5, DMIC3, I2S5A, RSVD2, RSVD3, 0x30b8, N, N, N, 0x998, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(gen1_i2c_scl_pj1, I2C1, RSVD1, RSVD2, RSVD3, 0x30bc, N, N, Y, 0x9a8, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(gen1_i2c_sda_pj0, I2C1, RSVD1, RSVD2, RSVD3, 0x30c0, N, N, Y, 0x9ac, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(gen2_i2c_scl_pj2, I2C2, RSVD1, RSVD2, RSVD3, 0x30c4, N, N, Y, 0x9b0, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(gen2_i2c_sda_pj3, I2C2, RSVD1, RSVD2, RSVD3, 0x30c8, N, N, Y, 0x9b4, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(gen3_i2c_scl_pf0, I2C3, RSVD1, RSVD2, RSVD3, 0x30cc, N, N, Y, 0x9b8, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(gen3_i2c_sda_pf1, I2C3, RSVD1, RSVD2, RSVD3, 0x30d0, N, N, Y, 0x9bc, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(cam_i2c_scl_ps2, I2C3, I2CVI, RSVD2, RSVD3, 0x30d4, N, N, Y, 0x934, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(cam_i2c_sda_ps3, I2C3, I2CVI, RSVD2, RSVD3, 0x30d8, N, N, Y, 0x938, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(pwr_i2c_scl_py3, I2CPMU, RSVD1, RSVD2, RSVD3, 0x30dc, N, N, Y, 0xa6c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(pwr_i2c_sda_py4, I2CPMU, RSVD1, RSVD2, RSVD3, 0x30e0, N, N, Y, 0xa70, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(uart1_tx_pu0, UARTA, RSVD1, RSVD2, RSVD3, 0x30e4, N, N, N, 0xb28, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(uart1_rx_pu1, UARTA, RSVD1, RSVD2, RSVD3, 0x30e8, N, N, N, 0xb24, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(uart1_rts_pu2, UARTA, RSVD1, RSVD2, RSVD3, 0x30ec, N, N, N, 0xb20, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(uart1_cts_pu3, UARTA, RSVD1, RSVD2, RSVD3, 0x30f0, N, N, N, 0xb1c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(uart2_tx_pg0, UARTB, I2S4A, SPDIF, UART, 0x30f4, N, N, N, 0xb38, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(uart2_rx_pg1, UARTB, I2S4A, SPDIF, UART, 0x30f8, N, N, N, 0xb34, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(uart2_rts_pg2, UARTB, I2S4A, RSVD2, UART, 0x30fc, N, N, N, 0xb30, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(uart2_cts_pg3, UARTB, I2S4A, RSVD2, UART, 0x3100, N, N, N, 0xb2c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(uart3_tx_pd1, UARTC, SPI4, RSVD2, RSVD3, 0x3104, N, N, N, 0xb48, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(uart3_rx_pd2, UARTC, SPI4, RSVD2, RSVD3, 0x3108, N, N, N, 0xb44, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(uart3_rts_pd3, UARTC, SPI4, RSVD2, RSVD3, 0x310c, N, N, N, 0xb40, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(uart3_cts_pd4, UARTC, SPI4, RSVD2, RSVD3, 0x3110, N, N, N, 0xb3c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(uart4_tx_pi4, UARTD, UART, RSVD2, RSVD3, 0x3114, N, N, N, 0xb58, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(uart4_rx_pi5, UARTD, UART, RSVD2, RSVD3, 0x3118, N, N, N, 0xb54, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(uart4_rts_pi6, UARTD, UART, RSVD2, RSVD3, 0x311c, N, N, N, 0xb50, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(uart4_cts_pi7, UARTD, UART, RSVD2, RSVD3, 0x3120, N, N, N, 0xb4c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(dap1_fs_pb0, I2S1, RSVD1, RSVD2, RSVD3, 0x3124, Y, Y, N, 0x95c, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(dap1_din_pb1, I2S1, RSVD1, RSVD2, RSVD3, 0x3128, Y, Y, N, 0x954, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(dap1_dout_pb2, I2S1, RSVD1, RSVD2, RSVD3, 0x312c, Y, Y, N, 0x958, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(dap1_sclk_pb3, I2S1, RSVD1, RSVD2, RSVD3, 0x3130, Y, Y, N, 0x960, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(dap2_fs_paa0, I2S2, RSVD1, RSVD2, RSVD3, 0x3134, Y, Y, N, 0x96c, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(dap2_din_paa2, I2S2, RSVD1, RSVD2, RSVD3, 0x3138, Y, Y, N, 0x964, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(dap2_dout_paa3, I2S2, RSVD1, RSVD2, RSVD3, 0x313c, Y, Y, N, 0x968, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(dap2_sclk_paa1, I2S2, RSVD1, RSVD2, RSVD3, 0x3140, Y, Y, N, 0x970, -1, -1, -1, -1, 28, 2, 30, 2),
+ PINGROUP(dap4_fs_pj4, I2S4B, RSVD1, RSVD2, RSVD3, 0x3144, N, N, N, 0x97c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(dap4_din_pj5, I2S4B, RSVD1, RSVD2, RSVD3, 0x3148, N, N, N, 0x974, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(dap4_dout_pj6, I2S4B, RSVD1, RSVD2, RSVD3, 0x314c, N, N, N, 0x978, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(dap4_sclk_pj7, I2S4B, RSVD1, RSVD2, RSVD3, 0x3150, N, N, N, 0x980, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(cam1_mclk_ps0, EXTPERIPH3, RSVD1, RSVD2, RSVD3, 0x3154, N, N, N, 0x918, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(cam2_mclk_ps1, EXTPERIPH3, RSVD1, RSVD2, RSVD3, 0x3158, N, N, N, 0x924, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(jtag_rtck, JTAG, RSVD1, RSVD2, RSVD3, 0x315c, N, N, N, 0xa2c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(clk_32k_in, CLK, RSVD1, RSVD2, RSVD3, 0x3160, N, N, N, 0x940, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(clk_32k_out_py5, SOC, BLINK, RSVD2, RSVD3, 0x3164, N, N, N, 0x944, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(batt_bcl, BCL, RSVD1, RSVD2, RSVD3, 0x3168, N, N, Y, 0x8f8, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(clk_req, SYS, RSVD1, RSVD2, RSVD3, 0x316c, N, N, N, 0x948, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(cpu_pwr_req, CPU, RSVD1, RSVD2, RSVD3, 0x3170, N, N, N, 0x950, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(pwr_int_n, PMI, RSVD1, RSVD2, RSVD3, 0x3174, N, N, N, 0xa74, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(shutdown, SHUTDOWN, RSVD1, RSVD2, RSVD3, 0x3178, N, N, N, 0xac8, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(core_pwr_req, CORE, RSVD1, RSVD2, RSVD3, 0x317c, N, N, N, 0x94c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(aud_mclk_pbb0, AUD, RSVD1, RSVD2, RSVD3, 0x3180, N, N, N, 0x8f4, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(dvfs_pwm_pbb1, RSVD0, CLDVFS, SPI3, RSVD3, 0x3184, N, N, N, 0x9a4, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(dvfs_clk_pbb2, RSVD0, CLDVFS, SPI3, RSVD3, 0x3188, N, N, N, 0x9a0, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(gpio_x1_aud_pbb3, RSVD0, RSVD1, SPI3, RSVD3, 0x318c, N, N, N, 0xa14, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(gpio_x3_aud_pbb4, RSVD0, RSVD1, SPI3, RSVD3, 0x3190, N, N, N, 0xa18, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(pcc7, RSVD0, RSVD1, RSVD2, RSVD3, 0x3194, N, N, Y, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(hdmi_cec_pcc0, CEC, RSVD1, RSVD2, RSVD3, 0x3198, N, N, Y, 0xa24, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(hdmi_int_dp_hpd_pcc1, DP, RSVD1, RSVD2, RSVD3, 0x319c, N, N, Y, 0xa28, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(spdif_out_pcc2, SPDIF, RSVD1, RSVD2, RSVD3, 0x31a0, N, N, N, 0xad0, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(spdif_in_pcc3, SPDIF, RSVD1, RSVD2, RSVD3, 0x31a4, N, N, N, 0xacc, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(usb_vbus_en0_pcc4, USB, RSVD1, RSVD2, RSVD3, 0x31a8, N, N, Y, 0xb5c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(usb_vbus_en1_pcc5, USB, RSVD1, RSVD2, RSVD3, 0x31ac, N, N, Y, 0xb60, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(dp_hpd0_pcc6, DP, RSVD1, RSVD2, RSVD3, 0x31b0, N, N, N, 0x99c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(wifi_en_ph0, RSVD0, RSVD1, RSVD2, RSVD3, 0x31b4, N, N, N, 0xb64, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(wifi_rst_ph1, RSVD0, RSVD1, RSVD2, RSVD3, 0x31b8, N, N, N, 0xb68, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(wifi_wake_ap_ph2, RSVD0, RSVD1, RSVD2, RSVD3, 0x31bc, N, N, N, 0xb6c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(ap_wake_bt_ph3, RSVD0, UARTB, SPDIF, RSVD3, 0x31c0, N, N, N, 0x8ec, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(bt_rst_ph4, RSVD0, UARTB, SPDIF, RSVD3, 0x31c4, N, N, N, 0x8fc, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(bt_wake_ap_ph5, RSVD0, RSVD1, RSVD2, RSVD3, 0x31c8, N, N, N, 0x900, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(ap_wake_nfc_ph7, RSVD0, RSVD1, RSVD2, RSVD3, 0x31cc, N, N, N, 0x8f0, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(nfc_en_pi0, RSVD0, RSVD1, RSVD2, RSVD3, 0x31d0, N, N, N, 0xa50, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(nfc_int_pi1, RSVD0, RSVD1, RSVD2, RSVD3, 0x31d4, N, N, N, 0xa54, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(gps_en_pi2, RSVD0, RSVD1, RSVD2, RSVD3, 0x31d8, N, N, N, 0xa1c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(gps_rst_pi3, RSVD0, RSVD1, RSVD2, RSVD3, 0x31dc, N, N, N, 0xa20, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(cam_rst_ps4, VGP1, RSVD1, RSVD2, RSVD3, 0x31e0, N, N, N, 0x93c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(cam_af_en_ps5, VIMCLK, VGP2, RSVD2, RSVD3, 0x31e4, N, N, N, 0x92c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(cam_flash_en_ps6, VIMCLK, VGP3, RSVD2, RSVD3, 0x31e8, N, N, N, 0x930, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(cam1_pwdn_ps7, VGP4, RSVD1, RSVD2, RSVD3, 0x31ec, N, N, N, 0x91c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(cam2_pwdn_pt0, VGP5, RSVD1, RSVD2, RSVD3, 0x31f0, N, N, N, 0x928, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(cam1_strobe_pt1, VGP6, RSVD1, RSVD2, RSVD3, 0x31f4, N, N, N, 0x920, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(lcd_te_py2, DISPLAYA, RSVD1, RSVD2, RSVD3, 0x31f8, N, N, N, 0xa44, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(lcd_bl_pwm_pv0, DISPLAYA, PWM0, SOR0, RSVD3, 0x31fc, N, N, N, 0xa34, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(lcd_bl_en_pv1, RSVD0, RSVD1, RSVD2, RSVD3, 0x3200, N, N, N, 0xa30, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(lcd_rst_pv2, RSVD0, RSVD1, RSVD2, RSVD3, 0x3204, N, N, N, 0xa40, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(lcd_gpio1_pv3, DISPLAYB, RSVD1, RSVD2, RSVD3, 0x3208, N, N, N, 0xa38, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(lcd_gpio2_pv4, DISPLAYB, PWM1, RSVD2, SOR1, 0x320c, N, N, N, 0xa3c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(ap_ready_pv5, RSVD0, RSVD1, RSVD2, RSVD3, 0x3210, N, N, N, 0x8e8, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(touch_rst_pv6, RSVD0, RSVD1, RSVD2, RSVD3, 0x3214, N, N, N, 0xb18, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(touch_clk_pv7, TOUCH, RSVD1, RSVD2, RSVD3, 0x3218, N, N, N, 0xb10, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(modem_wake_ap_px0, RSVD0, RSVD1, RSVD2, RSVD3, 0x321c, N, N, N, 0xa48, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(touch_int_px1, RSVD0, RSVD1, RSVD2, RSVD3, 0x3220, N, N, N, 0xb14, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(motion_int_px2, RSVD0, RSVD1, RSVD2, RSVD3, 0x3224, N, N, N, 0xa4c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(als_prox_int_px3, RSVD0, RSVD1, RSVD2, RSVD3, 0x3228, N, N, N, 0x8e4, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(temp_alert_px4, RSVD0, RSVD1, RSVD2, RSVD3, 0x322c, N, N, N, 0xb0c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(button_power_on_px5, RSVD0, RSVD1, RSVD2, RSVD3, 0x3230, N, N, N, 0x908, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(button_vol_up_px6, RSVD0, RSVD1, RSVD2, RSVD3, 0x3234, N, N, N, 0x914, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(button_vol_down_px7, RSVD0, RSVD1, RSVD2, RSVD3, 0x3238, N, N, N, 0x910, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(button_slide_sw_py0, RSVD0, RSVD1, RSVD2, RSVD3, 0x323c, N, N, N, 0x90c, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(button_home_py1, RSVD0, RSVD1, RSVD2, RSVD3, 0x3240, N, N, N, 0x904, 12, 5, 20, 5, -1, -1, -1, -1),
+ PINGROUP(pa6, SATA, RSVD1, RSVD2, RSVD3, 0x3244, N, N, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pe6, RSVD0, I2S5A, PWM2, RSVD3, 0x3248, N, N, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pe7, RSVD0, I2S5A, PWM3, RSVD3, 0x324c, N, N, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(ph6, RSVD0, RSVD1, RSVD2, RSVD3, 0x3250, N, N, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pk0, IQC0, I2S5B, RSVD2, RSVD3, 0x3254, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pk1, IQC0, I2S5B, RSVD2, RSVD3, 0x3258, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pk2, IQC0, I2S5B, RSVD2, RSVD3, 0x325c, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pk3, IQC0, I2S5B, RSVD2, RSVD3, 0x3260, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pk4, IQC1, RSVD1, RSVD2, RSVD3, 0x3264, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pk5, IQC1, RSVD1, RSVD2, RSVD3, 0x3268, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pk6, IQC1, RSVD1, RSVD2, RSVD3, 0x326c, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pk7, IQC1, RSVD1, RSVD2, RSVD3, 0x3270, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pl0, RSVD0, RSVD1, RSVD2, RSVD3, 0x3274, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pl1, SOC, RSVD1, RSVD2, RSVD3, 0x3278, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pz0, VIMCLK2, RSVD1, RSVD2, RSVD3, 0x327c, N, N, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pz1, VIMCLK2, SDMMC1, RSVD2, RSVD3, 0x3280, N, N, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pz2, SDMMC3, CCLA, RSVD2, RSVD3, 0x3284, N, N, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pz3, SDMMC3, RSVD1, RSVD2, RSVD3, 0x3288, N, N, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pz4, SDMMC1, RSVD1, RSVD2, RSVD3, 0x328c, N, N, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+ PINGROUP(pz5, SOC, RSVD1, RSVD2, RSVD3, 0x3290, N, N, N, -1, -1, -1, -1, -1, -1, -1, -1, -1),
+
+ /* pg_name, r, drvdn_b, drvdn_w, drvup_b, drvup_w, slwr_b, slwr_w, slwf_b, slwf_w */
+ DRV_PINGROUP(pa6, 0x9c0, 12, 5, 20, 5, -1, -1, -1, -1),
+ DRV_PINGROUP(pcc7, 0x9c4, 12, 5, 20, 5, -1, -1, -1, -1),
+ DRV_PINGROUP(pe6, 0x9c8, 12, 5, 20, 5, -1, -1, -1, -1),
+ DRV_PINGROUP(pe7, 0x9cc, 12, 5, 20, 5, -1, -1, -1, -1),
+ DRV_PINGROUP(ph6, 0x9d0, 12, 5, 20, 5, -1, -1, -1, -1),
+ DRV_PINGROUP(pk0, 0x9d4, -1, -1, -1, -1, 28, 2, 30, 2),
+ DRV_PINGROUP(pk1, 0x9d8, -1, -1, -1, -1, 28, 2, 30, 2),
+ DRV_PINGROUP(pk2, 0x9dc, -1, -1, -1, -1, 28, 2, 30, 2),
+ DRV_PINGROUP(pk3, 0x9e0, -1, -1, -1, -1, 28, 2, 30, 2),
+ DRV_PINGROUP(pk4, 0x9e4, -1, -1, -1, -1, 28, 2, 30, 2),
+ DRV_PINGROUP(pk5, 0x9e8, -1, -1, -1, -1, 28, 2, 30, 2),
+ DRV_PINGROUP(pk6, 0x9ec, -1, -1, -1, -1, 28, 2, 30, 2),
+ DRV_PINGROUP(pk7, 0x9f0, -1, -1, -1, -1, 28, 2, 30, 2),
+ DRV_PINGROUP(pl0, 0x9f4, -1, -1, -1, -1, 28, 2, 30, 2),
+ DRV_PINGROUP(pl1, 0x9f8, -1, -1, -1, -1, 28, 2, 30, 2),
+ DRV_PINGROUP(pz0, 0x9fc, 12, 7, 20, 7, -1, -1, -1, -1),
+ DRV_PINGROUP(pz1, 0xa00, 12, 7, 20, 7, -1, -1, -1, -1),
+ DRV_PINGROUP(pz2, 0xa04, 12, 7, 20, 7, -1, -1, -1, -1),
+ DRV_PINGROUP(pz3, 0xa08, 12, 7, 20, 7, -1, -1, -1, -1),
+ DRV_PINGROUP(pz4, 0xa0c, 12, 7, 20, 7, -1, -1, -1, -1),
+ DRV_PINGROUP(pz5, 0xa10, 12, 7, 20, 7, -1, -1, -1, -1),
+ DRV_PINGROUP(sdmmc1, 0xa98, 12, 7, 20, 7, 28, 2, 30, 2),
+ DRV_PINGROUP(sdmmc2, 0xa9c, 2, 6, 8, 6, 28, 2, 30, 2),
+ DRV_PINGROUP(sdmmc3, 0xab0, 12, 7, 20, 7, 28, 2, 30, 2),
+ DRV_PINGROUP(sdmmc4, 0xab4, 2, 6, 8, 6, 28, 2, 30, 2),
+};
+
+static const struct tegra_pinctrl_soc_data tegra210_pinctrl = {
+ .ngpios = NUM_GPIOS,
+ .pins = tegra210_pins,
+ .npins = ARRAY_SIZE(tegra210_pins),
+ .functions = tegra210_functions,
+ .nfunctions = ARRAY_SIZE(tegra210_functions),
+ .groups = tegra210_groups,
+ .ngroups = ARRAY_SIZE(tegra210_groups),
+ .hsm_in_mux = true,
+ .schmitt_in_mux = true,
+ .drvtype_in_mux = true,
+};
+
+static int tegra210_pinctrl_probe(struct platform_device *pdev)
+{
+ return tegra_pinctrl_probe(pdev, &tegra210_pinctrl);
+}
+
+static const struct of_device_id tegra210_pinctrl_of_match[] = {
+ { .compatible = "nvidia,tegra210-pinmux", },
+ { },
+};
+MODULE_DEVICE_TABLE(of, tegra210_pinctrl_of_match);
+
+static struct platform_driver tegra210_pinctrl_driver = {
+ .driver = {
+ .name = "tegra210-pinctrl",
+ .of_match_table = tegra210_pinctrl_of_match,
+ },
+ .probe = tegra210_pinctrl_probe,
+ .remove = tegra_pinctrl_remove,
+};
+module_platform_driver(tegra210_pinctrl_driver);
+
+MODULE_AUTHOR("NVIDIA");
+MODULE_DESCRIPTION("NVIDIA Tegra210 pinctrl driver");
+MODULE_LICENSE("GPL v2");
#define DRV_PINGROUP_REG_A 0x868 /* bank 0 */
#define PINGROUP_REG_A 0x3000 /* bank 1 */
+#define DRV_PINGROUP_REG(r) ((r) - DRV_PINGROUP_REG_A)
#define PINGROUP_REG(r) ((r) - PINGROUP_REG_A)
#define PINGROUP_BIT_Y(b) (b)
#define PINGROUP_BIT_N(b) (-1)
-#define PINGROUP(pg_name, f0, f1, f2, f3, r, od, ior) \
- { \
- .name = #pg_name, \
- .pins = pg_name##_pins, \
- .npins = ARRAY_SIZE(pg_name##_pins), \
- .funcs = { \
- TEGRA_MUX_##f0, \
- TEGRA_MUX_##f1, \
- TEGRA_MUX_##f2, \
- TEGRA_MUX_##f3, \
- }, \
- .mux_reg = PINGROUP_REG(r), \
- .mux_bank = 1, \
- .mux_bit = 0, \
- .pupd_reg = PINGROUP_REG(r), \
- .pupd_bank = 1, \
- .pupd_bit = 2, \
- .tri_reg = PINGROUP_REG(r), \
- .tri_bank = 1, \
- .tri_bit = 4, \
- .einput_bit = PINGROUP_BIT_Y(5), \
- .odrain_bit = PINGROUP_BIT_##od(6), \
- .lock_bit = PINGROUP_BIT_Y(7), \
- .ioreset_bit = PINGROUP_BIT_##ior(8), \
- .rcv_sel_bit = -1, \
- .drv_reg = -1, \
+#define PINGROUP(pg_name, f0, f1, f2, f3, r, od, ior) \
+ { \
+ .name = #pg_name, \
+ .pins = pg_name##_pins, \
+ .npins = ARRAY_SIZE(pg_name##_pins), \
+ .funcs = { \
+ TEGRA_MUX_##f0, \
+ TEGRA_MUX_##f1, \
+ TEGRA_MUX_##f2, \
+ TEGRA_MUX_##f3, \
+ }, \
+ .mux_reg = PINGROUP_REG(r), \
+ .mux_bank = 1, \
+ .mux_bit = 0, \
+ .pupd_reg = PINGROUP_REG(r), \
+ .pupd_bank = 1, \
+ .pupd_bit = 2, \
+ .tri_reg = PINGROUP_REG(r), \
+ .tri_bank = 1, \
+ .tri_bit = 4, \
+ .einput_bit = 5, \
+ .odrain_bit = PINGROUP_BIT_##od(6), \
+ .lock_bit = 7, \
+ .ioreset_bit = PINGROUP_BIT_##ior(8), \
+ .rcv_sel_bit = -1, \
+ .drv_reg = -1, \
}
-#define DRV_PINGROUP_REG(r) ((r) - DRV_PINGROUP_REG_A)
-
-#define DRV_PINGROUP(pg_name, r, hsm_b, schmitt_b, lpmd_b, \
- drvdn_b, drvdn_w, drvup_b, drvup_w, \
- slwr_b, slwr_w, slwf_b, slwf_w) \
- { \
- .name = "drive_" #pg_name, \
- .pins = drive_##pg_name##_pins, \
- .npins = ARRAY_SIZE(drive_##pg_name##_pins), \
- .mux_reg = -1, \
- .pupd_reg = -1, \
- .tri_reg = -1, \
- .einput_bit = -1, \
- .odrain_bit = -1, \
- .lock_bit = -1, \
- .ioreset_bit = -1, \
- .rcv_sel_bit = -1, \
- .drv_reg = DRV_PINGROUP_REG(r), \
- .drv_bank = 0, \
- .hsm_bit = hsm_b, \
- .schmitt_bit = schmitt_b, \
- .lpmd_bit = lpmd_b, \
- .drvdn_bit = drvdn_b, \
- .drvdn_width = drvdn_w, \
- .drvup_bit = drvup_b, \
- .drvup_width = drvup_w, \
- .slwr_bit = slwr_b, \
- .slwr_width = slwr_w, \
- .slwf_bit = slwf_b, \
- .slwf_width = slwf_w, \
- .drvtype_bit = -1, \
+#define DRV_PINGROUP(pg_name, r, hsm_b, schmitt_b, lpmd_b, drvdn_b, \
+ drvdn_w, drvup_b, drvup_w, slwr_b, slwr_w, \
+ slwf_b, slwf_w) \
+ { \
+ .name = "drive_" #pg_name, \
+ .pins = drive_##pg_name##_pins, \
+ .npins = ARRAY_SIZE(drive_##pg_name##_pins), \
+ .mux_reg = -1, \
+ .pupd_reg = -1, \
+ .tri_reg = -1, \
+ .einput_bit = -1, \
+ .odrain_bit = -1, \
+ .lock_bit = -1, \
+ .ioreset_bit = -1, \
+ .rcv_sel_bit = -1, \
+ .drv_reg = DRV_PINGROUP_REG(r), \
+ .drv_bank = 0, \
+ .hsm_bit = hsm_b, \
+ .schmitt_bit = schmitt_b, \
+ .lpmd_bit = lpmd_b, \
+ .drvdn_bit = drvdn_b, \
+ .drvdn_width = drvdn_w, \
+ .drvup_bit = drvup_b, \
+ .drvup_width = drvup_w, \
+ .slwr_bit = slwr_b, \
+ .slwr_width = slwr_w, \
+ .slwf_bit = slwf_b, \
+ .slwf_width = slwf_w, \
+ .drvtype_bit = -1, \
}
static const struct tegra_pingroup tegra30_groups[] = {
.nfunctions = ARRAY_SIZE(tegra30_functions),
.groups = tegra30_groups,
.ngroups = ARRAY_SIZE(tegra30_groups),
+ .hsm_in_mux = false,
+ .schmitt_in_mux = false,
+ .drvtype_in_mux = false,
};
static int tegra30_pinctrl_probe(struct platform_device *pdev)
return 0;
}
-static struct of_device_id tz1090_pdc_pinctrl_of_match[] = {
+static const struct of_device_id tz1090_pdc_pinctrl_of_match[] = {
{ .compatible = "img,tz1090-pdc-pinctrl", },
{ },
};
return 0;
}
-static struct of_device_id tz1090_pinctrl_of_match[] = {
+static const struct of_device_id tz1090_pinctrl_of_match[] = {
{ .compatible = "img,tz1090-pinctrl", },
{ },
};
*mask = 7;
break;
case PIN_CONFIG_OUTPUT:
+ case PIN_CONFIG_INPUT_ENABLE:
*bit = g->oe_bit;
*mask = 1;
break;
default:
- dev_err(pctrl->dev, "Invalid config param %04x\n", param);
return -ENOTSUPP;
}
val = readl(pctrl->regs + g->io_reg);
arg = !!(val & BIT(g->in_bit));
break;
+ case PIN_CONFIG_INPUT_ENABLE:
+ /* Pin is output */
+ if (arg)
+ return -EINVAL;
+ arg = 1;
+ break;
default:
- dev_err(pctrl->dev, "Unsupported config parameter: %x\n",
- param);
- return -EINVAL;
+ return -ENOTSUPP;
}
*config = pinconf_to_config_packed(param, arg);
/* enable output */
arg = 1;
break;
+ case PIN_CONFIG_INPUT_ENABLE:
+ /* disable output */
+ arg = 0;
+ break;
default:
dev_err(pctrl->dev, "Unsupported config parameter: %x\n",
param);
}
static const struct pinconf_ops msm_pinconf_ops = {
+ .is_generic = true,
.pin_config_group_get = msm_config_group_get,
.pin_config_group_set = msm_config_group_set,
};
}
static const struct of_device_id pmic_gpio_of_match[] = {
+ { .compatible = "qcom,pm8916-gpio" }, /* 4 GPIO's */
{ .compatible = "qcom,pm8941-gpio" }, /* 36 GPIO's */
{ .compatible = "qcom,pma8084-gpio" }, /* 22 GPIO's */
{ },
static const struct of_device_id pmic_mpp_of_match[] = {
{ .compatible = "qcom,pm8841-mpp" }, /* 4 MPP's */
+ { .compatible = "qcom,pm8916-mpp" }, /* 4 MPP's */
{ .compatible = "qcom,pm8941-mpp" }, /* 8 MPP's */
{ .compatible = "qcom,pma8084-mpp" }, /* 8 MPP's */
{ },
},
};
+/* pin banks of exynos5433 pin-controller - ALIVE */
+static const struct samsung_pin_bank_data exynos5433_pin_banks0[] = {
+ EXYNOS_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
+ EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
+ EXYNOS_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
+ EXYNOS_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),
+};
+
+/* pin banks of exynos5433 pin-controller - AUD */
+static const struct samsung_pin_bank_data exynos5433_pin_banks1[] = {
+ EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz0", 0x00),
+ EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04),
+};
+
+/* pin banks of exynos5433 pin-controller - CPIF */
+static const struct samsung_pin_bank_data exynos5433_pin_banks2[] = {
+ EXYNOS_PIN_BANK_EINTG(2, 0x000, "gpv6", 0x00),
+};
+
+/* pin banks of exynos5433 pin-controller - eSE */
+static const struct samsung_pin_bank_data exynos5433_pin_banks3[] = {
+ EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj2", 0x00),
+};
+
+/* pin banks of exynos5433 pin-controller - FINGER */
+static const struct samsung_pin_bank_data exynos5433_pin_banks4[] = {
+ EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpd5", 0x00),
+};
+
+/* pin banks of exynos5433 pin-controller - FSYS */
+static const struct samsung_pin_bank_data exynos5433_pin_banks5[] = {
+ EXYNOS_PIN_BANK_EINTG(6, 0x000, "gph1", 0x00),
+ EXYNOS_PIN_BANK_EINTG(7, 0x020, "gpr4", 0x04),
+ EXYNOS_PIN_BANK_EINTG(5, 0x040, "gpr0", 0x08),
+ EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr1", 0x0c),
+ EXYNOS_PIN_BANK_EINTG(2, 0x080, "gpr2", 0x10),
+ EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpr3", 0x14),
+};
+
+/* pin banks of exynos5433 pin-controller - IMEM */
+static const struct samsung_pin_bank_data exynos5433_pin_banks6[] = {
+ EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpf0", 0x00),
+};
+
+/* pin banks of exynos5433 pin-controller - NFC */
+static const struct samsung_pin_bank_data exynos5433_pin_banks7[] = {
+ EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj0", 0x00),
+};
+
+/* pin banks of exynos5433 pin-controller - PERIC */
+static const struct samsung_pin_bank_data exynos5433_pin_banks8[] = {
+ EXYNOS_PIN_BANK_EINTG(6, 0x000, "gpv7", 0x00),
+ EXYNOS_PIN_BANK_EINTG(5, 0x020, "gpb0", 0x04),
+ EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpc0", 0x08),
+ EXYNOS_PIN_BANK_EINTG(2, 0x060, "gpc1", 0x0c),
+ EXYNOS_PIN_BANK_EINTG(6, 0x080, "gpc2", 0x10),
+ EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpc3", 0x14),
+ EXYNOS_PIN_BANK_EINTG(2, 0x0c0, "gpg0", 0x18),
+ EXYNOS_PIN_BANK_EINTG(4, 0x0e0, "gpd0", 0x1c),
+ EXYNOS_PIN_BANK_EINTG(6, 0x100, "gpd1", 0x20),
+ EXYNOS_PIN_BANK_EINTG(8, 0x120, "gpd2", 0x24),
+ EXYNOS_PIN_BANK_EINTG(5, 0x140, "gpd4", 0x28),
+ EXYNOS_PIN_BANK_EINTG(2, 0x160, "gpd8", 0x2c),
+ EXYNOS_PIN_BANK_EINTG(7, 0x180, "gpd6", 0x30),
+ EXYNOS_PIN_BANK_EINTG(3, 0x1a0, "gpd7", 0x34),
+ EXYNOS_PIN_BANK_EINTG(5, 0x1c0, "gpg1", 0x38),
+ EXYNOS_PIN_BANK_EINTG(2, 0x1e0, "gpg2", 0x3c),
+ EXYNOS_PIN_BANK_EINTG(8, 0x200, "gpg3", 0x40),
+};
+
+/* pin banks of exynos5433 pin-controller - TOUCH */
+static const struct samsung_pin_bank_data exynos5433_pin_banks9[] = {
+ EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj1", 0x00),
+};
+
+/*
+ * Samsung pinctrl driver data for Exynos5433 SoC. Exynos5433 SoC includes
+ * ten gpio/pin-mux/pinconfig controllers.
+ */
+const struct samsung_pin_ctrl exynos5433_pin_ctrl[] = {
+ {
+ /* pin-controller instance 0 data */
+ .pin_banks = exynos5433_pin_banks0,
+ .nr_banks = ARRAY_SIZE(exynos5433_pin_banks0),
+ .eint_wkup_init = exynos_eint_wkup_init,
+ .suspend = exynos_pinctrl_suspend,
+ .resume = exynos_pinctrl_resume,
+ }, {
+ /* pin-controller instance 1 data */
+ .pin_banks = exynos5433_pin_banks1,
+ .nr_banks = ARRAY_SIZE(exynos5433_pin_banks1),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ .suspend = exynos_pinctrl_suspend,
+ .resume = exynos_pinctrl_resume,
+ }, {
+ /* pin-controller instance 2 data */
+ .pin_banks = exynos5433_pin_banks2,
+ .nr_banks = ARRAY_SIZE(exynos5433_pin_banks2),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ .suspend = exynos_pinctrl_suspend,
+ .resume = exynos_pinctrl_resume,
+ }, {
+ /* pin-controller instance 3 data */
+ .pin_banks = exynos5433_pin_banks3,
+ .nr_banks = ARRAY_SIZE(exynos5433_pin_banks3),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ .suspend = exynos_pinctrl_suspend,
+ .resume = exynos_pinctrl_resume,
+ }, {
+ /* pin-controller instance 4 data */
+ .pin_banks = exynos5433_pin_banks4,
+ .nr_banks = ARRAY_SIZE(exynos5433_pin_banks4),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ .suspend = exynos_pinctrl_suspend,
+ .resume = exynos_pinctrl_resume,
+ }, {
+ /* pin-controller instance 5 data */
+ .pin_banks = exynos5433_pin_banks5,
+ .nr_banks = ARRAY_SIZE(exynos5433_pin_banks5),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ .suspend = exynos_pinctrl_suspend,
+ .resume = exynos_pinctrl_resume,
+ }, {
+ /* pin-controller instance 6 data */
+ .pin_banks = exynos5433_pin_banks6,
+ .nr_banks = ARRAY_SIZE(exynos5433_pin_banks6),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ .suspend = exynos_pinctrl_suspend,
+ .resume = exynos_pinctrl_resume,
+ }, {
+ /* pin-controller instance 7 data */
+ .pin_banks = exynos5433_pin_banks7,
+ .nr_banks = ARRAY_SIZE(exynos5433_pin_banks7),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ .suspend = exynos_pinctrl_suspend,
+ .resume = exynos_pinctrl_resume,
+ }, {
+ /* pin-controller instance 8 data */
+ .pin_banks = exynos5433_pin_banks8,
+ .nr_banks = ARRAY_SIZE(exynos5433_pin_banks8),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ .suspend = exynos_pinctrl_suspend,
+ .resume = exynos_pinctrl_resume,
+ }, {
+ /* pin-controller instance 9 data */
+ .pin_banks = exynos5433_pin_banks9,
+ .nr_banks = ARRAY_SIZE(exynos5433_pin_banks9),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ .suspend = exynos_pinctrl_suspend,
+ .resume = exynos_pinctrl_resume,
+ },
+};
+
/* pin banks of exynos7 pin-controller - ALIVE */
static const struct samsung_pin_bank_data exynos7_pin_banks0[] __initconst = {
EXYNOS_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
/* pin-controller instance 0 Alive data */
.pin_banks = exynos7_pin_banks0,
.nr_banks = ARRAY_SIZE(exynos7_pin_banks0),
- .eint_gpio_init = exynos_eint_gpio_init,
.eint_wkup_init = exynos_eint_wkup_init,
}, {
/* pin-controller instance 1 BUS0 data */
.data = (void *)exynos5260_pin_ctrl },
{ .compatible = "samsung,exynos5420-pinctrl",
.data = (void *)exynos5420_pin_ctrl },
+ { .compatible = "samsung,exynos5433-pinctrl",
+ .data = (void *)exynos5433_pin_ctrl },
{ .compatible = "samsung,s5pv210-pinctrl",
.data = (void *)s5pv210_pin_ctrl },
{ .compatible = "samsung,exynos7-pinctrl",
extern const struct samsung_pin_ctrl exynos5250_pin_ctrl[];
extern const struct samsung_pin_ctrl exynos5260_pin_ctrl[];
extern const struct samsung_pin_ctrl exynos5420_pin_ctrl[];
+extern const struct samsung_pin_ctrl exynos5433_pin_ctrl[];
extern const struct samsung_pin_ctrl exynos7_pin_ctrl[];
extern const struct samsung_pin_ctrl s3c64xx_pin_ctrl[];
extern const struct samsung_pin_ctrl s3c2412_pin_ctrl[];
return 0;
}
-static void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc,
- unsigned long address)
+static void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc, u32 reg)
{
struct sh_pfc_window *window;
+ phys_addr_t address = reg;
unsigned int i;
/* scan through physical windows and convert address */
return 1;
}
-unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg,
- unsigned long reg_width)
+u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width)
{
switch (reg_width) {
case 8:
return 0;
}
-void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width,
- unsigned long data)
+void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width,
+ u32 data)
{
switch (reg_width) {
case 8:
static void sh_pfc_config_reg_helper(struct sh_pfc *pfc,
const struct pinmux_cfg_reg *crp,
- unsigned long in_pos,
- void __iomem **mapped_regp,
- unsigned long *maskp,
- unsigned long *posp)
+ unsigned int in_pos,
+ void __iomem **mapped_regp, u32 *maskp,
+ unsigned int *posp)
{
unsigned int k;
static void sh_pfc_write_config_reg(struct sh_pfc *pfc,
const struct pinmux_cfg_reg *crp,
- unsigned long field, unsigned long value)
+ unsigned int field, u32 value)
{
void __iomem *mapped_reg;
- unsigned long mask, pos, data;
+ unsigned int pos;
+ u32 mask, data;
sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
- dev_dbg(pfc->dev, "write_reg addr = %lx, value = %ld, field = %ld, "
- "r_width = %ld, f_width = %ld\n",
+ dev_dbg(pfc->dev, "write_reg addr = %x, value = 0x%x, field = %u, "
+ "r_width = %u, f_width = %u\n",
crp->reg, value, field, crp->reg_width, crp->field_width);
mask = ~(mask << pos);
}
static int sh_pfc_get_config_reg(struct sh_pfc *pfc, u16 enum_id,
- const struct pinmux_cfg_reg **crp, int *fieldp,
- int *valuep)
+ const struct pinmux_cfg_reg **crp,
+ unsigned int *fieldp, u32 *valuep)
{
- const struct pinmux_cfg_reg *config_reg;
- unsigned long r_width, f_width, curr_width, ncomb;
- unsigned int k, m, n, pos, bit_pos;
+ unsigned int k = 0;
- k = 0;
while (1) {
- config_reg = pfc->info->cfg_regs + k;
-
- r_width = config_reg->reg_width;
- f_width = config_reg->field_width;
+ const struct pinmux_cfg_reg *config_reg =
+ pfc->info->cfg_regs + k;
+ unsigned int r_width = config_reg->reg_width;
+ unsigned int f_width = config_reg->field_width;
+ unsigned int curr_width;
+ unsigned int bit_pos;
+ unsigned int pos = 0;
+ unsigned int m = 0;
if (!r_width)
break;
- pos = 0;
- m = 0;
for (bit_pos = 0; bit_pos < r_width; bit_pos += curr_width) {
+ u32 ncomb;
+ u32 n;
+
if (f_width)
curr_width = f_width;
else
int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type)
{
- const struct pinmux_cfg_reg *cr = NULL;
- u16 enum_id;
const struct pinmux_range *range;
- int in_range, pos, field, value;
- int ret;
+ int pos = 0;
switch (pinmux_type) {
case PINMUX_TYPE_GPIO:
return -EINVAL;
}
- pos = 0;
- enum_id = 0;
- field = 0;
- value = 0;
-
/* Iterate over all the configuration fields we need to update. */
while (1) {
+ const struct pinmux_cfg_reg *cr;
+ unsigned int field;
+ u16 enum_id;
+ u32 value;
+ int in_range;
+ int ret;
+
pos = sh_pfc_mark_to_enum(pfc, mark, pos, &enum_id);
if (pos < 0)
return pos;
}
static const struct platform_device_id sh_pfc_id_table[] = {
-#ifdef CONFIG_PINCTRL_PFC_EMEV2
- { "pfc-emev2", (kernel_ulong_t)&emev2_pinmux_info },
-#endif
#ifdef CONFIG_PINCTRL_PFC_R8A73A4
{ "pfc-r8a73a4", (kernel_ulong_t)&r8a73a4_pinmux_info },
#endif
#ifdef CONFIG_PINCTRL_PFC_R8A7779
{ "pfc-r8a7779", (kernel_ulong_t)&r8a7779_pinmux_info },
#endif
-#ifdef CONFIG_PINCTRL_PFC_R8A7790
- { "pfc-r8a7790", (kernel_ulong_t)&r8a7790_pinmux_info },
-#endif
-#ifdef CONFIG_PINCTRL_PFC_R8A7791
- { "pfc-r8a7791", (kernel_ulong_t)&r8a7791_pinmux_info },
-#endif
#ifdef CONFIG_PINCTRL_PFC_SH7203
{ "pfc-sh7203", (kernel_ulong_t)&sh7203_pinmux_info },
#endif
int sh_pfc_register_pinctrl(struct sh_pfc *pfc);
int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc);
-unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg,
- unsigned long reg_width);
-void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width,
- unsigned long data);
+u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width);
+void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width,
+ u32 data);
int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin);
int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type);
struct sh_pfc_gpio_data_reg {
const struct pinmux_data_reg *info;
- unsigned long shadow;
+ u32 shadow;
};
struct sh_pfc_gpio_pin {
*bit = gpio_pin->dbit;
}
-static unsigned long gpio_read_data_reg(struct sh_pfc_chip *chip,
- const struct pinmux_data_reg *dreg)
+static u32 gpio_read_data_reg(struct sh_pfc_chip *chip,
+ const struct pinmux_data_reg *dreg)
{
- void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
+ phys_addr_t address = dreg->reg;
+ void __iomem *mem = address - chip->mem->phys + chip->mem->virt;
return sh_pfc_read_raw_reg(mem, dreg->reg_width);
}
static void gpio_write_data_reg(struct sh_pfc_chip *chip,
- const struct pinmux_data_reg *dreg,
- unsigned long value)
+ const struct pinmux_data_reg *dreg, u32 value)
{
- void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
+ phys_addr_t address = dreg->reg;
+ void __iomem *mem = address - chip->mem->phys + chip->mem->virt;
sh_pfc_write_raw_reg(mem, dreg->reg_width, value);
}
unsigned int bit;
unsigned int i;
- for (i = 0, dreg = pfc->info->data_regs; dreg->reg; ++i, ++dreg) {
+ for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) {
for (bit = 0; bit < dreg->reg_width; bit++) {
if (dreg->enum_ids[bit] == pin->enum_id) {
gpio_pin->dreg = i;
int value)
{
struct sh_pfc_gpio_data_reg *reg;
- unsigned long pos;
unsigned int bit;
+ unsigned int pos;
gpio_get_data_reg(chip, offset, ®, &bit);
pos = reg->info->reg_width - (bit + 1);
if (value)
- set_bit(pos, ®->shadow);
+ reg->shadow |= BIT(pos);
else
- clear_bit(pos, ®->shadow);
+ reg->shadow &= ~BIT(pos);
gpio_write_data_reg(chip, reg->info, reg->shadow);
}
{
struct sh_pfc_chip *chip = gpio_to_pfc_chip(gc);
struct sh_pfc_gpio_data_reg *reg;
- unsigned long pos;
unsigned int bit;
+ unsigned int pos;
gpio_get_data_reg(chip, offset, ®, &bit);
int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
{
struct sh_pfc_chip *chip;
+ phys_addr_t address;
unsigned int i;
int ret;
* that covers the data registers. In that case don't try to handle
* GPIOs.
*/
+ address = pfc->info->data_regs[0].reg;
for (i = 0; i < pfc->num_windows; ++i) {
struct sh_pfc_window *window = &pfc->windows[i];
- if (pfc->info->data_regs[0].reg >= window->phys &&
- pfc->info->data_regs[0].reg < window->phys + window->size)
+ if (address >= window->phys &&
+ address < window->phys + window->size)
break;
}
static const unsigned int audio_clkout_d_mux[] = {
AUDIO_CLKOUT_D_MARK,
};
+/* - AVB -------------------------------------------------------------------- */
+static const unsigned int avb_link_pins[] = {
+ RCAR_GP_PIN(3, 11),
+};
+static const unsigned int avb_link_mux[] = {
+ AVB_LINK_MARK,
+};
+static const unsigned int avb_magic_pins[] = {
+ RCAR_GP_PIN(2, 14),
+};
+static const unsigned int avb_magic_mux[] = {
+ AVB_MAGIC_MARK,
+};
+static const unsigned int avb_phy_int_pins[] = {
+ RCAR_GP_PIN(2, 15),
+};
+static const unsigned int avb_phy_int_mux[] = {
+ AVB_PHY_INT_MARK,
+};
+static const unsigned int avb_mdio_pins[] = {
+ RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12),
+};
+static const unsigned int avb_mdio_mux[] = {
+ AVB_MDC_MARK, AVB_MDIO_MARK,
+};
+static const unsigned int avb_mii_pins[] = {
+ RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10),
+ RCAR_GP_PIN(0, 11),
+
+ RCAR_GP_PIN(3, 13), RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
+ RCAR_GP_PIN(2, 2),
+
+ RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9),
+ RCAR_GP_PIN(2, 10), RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 10),
+ RCAR_GP_PIN(3, 12),
+};
+static const unsigned int avb_mii_mux[] = {
+ AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK,
+ AVB_TXD3_MARK,
+
+ AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK,
+ AVB_RXD3_MARK,
+
+ AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK,
+ AVB_CRS_MARK, AVB_TX_EN_MARK, AVB_TX_CLK_MARK,
+ AVB_COL_MARK,
+};
+static const unsigned int avb_gmii_pins[] = {
+ RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10),
+ RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
+ RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
+
+ RCAR_GP_PIN(3, 13), RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
+ RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 4),
+ RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 6),
+
+ RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9),
+ RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 13), RCAR_GP_PIN(2, 16),
+ RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9), RCAR_GP_PIN(3, 10),
+ RCAR_GP_PIN(3, 12),
+};
+static const unsigned int avb_gmii_mux[] = {
+ AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK,
+ AVB_TXD3_MARK, AVB_TXD4_MARK, AVB_TXD5_MARK,
+ AVB_TXD6_MARK, AVB_TXD7_MARK,
+
+ AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK,
+ AVB_RXD3_MARK, AVB_RXD4_MARK, AVB_RXD5_MARK,
+ AVB_RXD6_MARK, AVB_RXD7_MARK,
+
+ AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK,
+ AVB_CRS_MARK, AVB_GTX_CLK_MARK, AVB_GTXREFCLK_MARK,
+ AVB_TX_EN_MARK, AVB_TX_ER_MARK, AVB_TX_CLK_MARK,
+ AVB_COL_MARK,
+};
/* - DU RGB ----------------------------------------------------------------- */
static const unsigned int du_rgb666_pins[] = {
/* R[7:2], G[7:2], B[7:2] */
SH_PFC_PIN_GROUP(audio_clkout_b),
SH_PFC_PIN_GROUP(audio_clkout_c),
SH_PFC_PIN_GROUP(audio_clkout_d),
+ SH_PFC_PIN_GROUP(avb_link),
+ SH_PFC_PIN_GROUP(avb_magic),
+ SH_PFC_PIN_GROUP(avb_phy_int),
+ SH_PFC_PIN_GROUP(avb_mdio),
+ SH_PFC_PIN_GROUP(avb_mii),
+ SH_PFC_PIN_GROUP(avb_gmii),
SH_PFC_PIN_GROUP(du_rgb666),
SH_PFC_PIN_GROUP(du_rgb888),
SH_PFC_PIN_GROUP(du_clk_out_0),
"audio_clkout_d",
};
+static const char * const avb_groups[] = {
+ "avb_link",
+ "avb_magic",
+ "avb_phy_int",
+ "avb_mdio",
+ "avb_mii",
+ "avb_gmii",
+};
+
static const char * const du_groups[] = {
"du_rgb666",
"du_rgb888",
static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(audio_clk),
+ SH_PFC_FUNCTION(avb),
SH_PFC_FUNCTION(du),
SH_PFC_FUNCTION(du0),
SH_PFC_FUNCTION(du1),
};
struct pinmux_cfg_reg {
- unsigned long reg, reg_width, field_width;
+ u32 reg;
+ u8 reg_width, field_width;
const u16 *enum_ids;
- const unsigned long *var_field_width;
+ const u8 *var_field_width;
};
#define PINMUX_CFG_REG(name, r, r_width, f_width) \
#define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
.reg = r, .reg_width = r_width, \
- .var_field_width = (const unsigned long [r_width]) \
+ .var_field_width = (const u8 [r_width]) \
{ var_fw0, var_fwn, 0 }, \
.enum_ids = (const u16 [])
struct pinmux_data_reg {
- unsigned long reg, reg_width;
+ u32 reg;
+ u8 reg_width;
const u16 *enum_ids;
};
const struct pinmux_irq *gpio_irq;
unsigned int gpio_irq_size;
- unsigned long unlock_reg;
+ u32 unlock_reg;
};
/* -----------------------------------------------------------------------------
/*
* PORTnCR macro
*/
-#define _PCRH(in, in_pd, in_pu, out) \
- 0, (out), (in), 0, \
- 0, 0, 0, 0, \
- 0, 0, (in_pd), 0, \
- 0, 0, (in_pu), 0
-
#define PORTCR(nr, reg) \
{ \
- PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
- _PCRH(PORT##nr##_IN, 0, 0, PORT##nr##_OUT), \
- PORT##nr##_FN0, PORT##nr##_FN1, \
- PORT##nr##_FN2, PORT##nr##_FN3, \
- PORT##nr##_FN4, PORT##nr##_FN5, \
- PORT##nr##_FN6, PORT##nr##_FN7 } \
+ PINMUX_CFG_REG_VAR("PORT" nr "CR", reg, 8, 2, 2, 1, 3) {\
+ /* PULMD[1:0], handled by .set_bias() */ \
+ 0, 0, 0, 0, \
+ /* IE and OE */ \
+ 0, PORT##nr##_OUT, PORT##nr##_IN, 0, \
+ /* SEC, not supported */ \
+ 0, 0, \
+ /* PTMD[2:0] */ \
+ PORT##nr##_FN0, PORT##nr##_FN1, \
+ PORT##nr##_FN2, PORT##nr##_FN3, \
+ PORT##nr##_FN4, PORT##nr##_FN5, \
+ PORT##nr##_FN6, PORT##nr##_FN7 \
+ } \
}
#endif /* __SH_PFC_H */
struct sirfsoc_gpio_chip {
struct of_mm_gpio_chip chip;
struct sirfsoc_gpio_bank sgpio_bank[SIRFSOC_GPIO_NO_OF_BANKS];
+ spinlock_t lock;
};
-static DEFINE_SPINLOCK(sgpio_lock);
-
static struct sirfsoc_pin_group *sirfsoc_pin_groups;
static int sirfsoc_pingrp_cnt;
offset = SIRFSOC_GPIO_CTRL(bank->id, idx);
- spin_lock_irqsave(&sgpio_lock, flags);
+ spin_lock_irqsave(&sgpio->lock, flags);
val = readl(sgpio->chip.regs + offset);
writel(val, sgpio->chip.regs + offset);
- spin_unlock_irqrestore(&sgpio_lock, flags);
+ spin_unlock_irqrestore(&sgpio->lock, flags);
}
static void __sirfsoc_gpio_irq_mask(struct sirfsoc_gpio_chip *sgpio,
offset = SIRFSOC_GPIO_CTRL(bank->id, idx);
- spin_lock_irqsave(&sgpio_lock, flags);
+ spin_lock_irqsave(&sgpio->lock, flags);
val = readl(sgpio->chip.regs + offset);
val &= ~SIRFSOC_GPIO_CTL_INTR_EN_MASK;
val &= ~SIRFSOC_GPIO_CTL_INTR_STS_MASK;
writel(val, sgpio->chip.regs + offset);
- spin_unlock_irqrestore(&sgpio_lock, flags);
+ spin_unlock_irqrestore(&sgpio->lock, flags);
}
static void sirfsoc_gpio_irq_mask(struct irq_data *d)
offset = SIRFSOC_GPIO_CTRL(bank->id, idx);
- spin_lock_irqsave(&sgpio_lock, flags);
+ spin_lock_irqsave(&sgpio->lock, flags);
val = readl(sgpio->chip.regs + offset);
val &= ~SIRFSOC_GPIO_CTL_INTR_STS_MASK;
val |= SIRFSOC_GPIO_CTL_INTR_EN_MASK;
writel(val, sgpio->chip.regs + offset);
- spin_unlock_irqrestore(&sgpio_lock, flags);
+ spin_unlock_irqrestore(&sgpio->lock, flags);
}
static int sirfsoc_gpio_irq_type(struct irq_data *d, unsigned type)
offset = SIRFSOC_GPIO_CTRL(bank->id, idx);
- spin_lock_irqsave(&sgpio_lock, flags);
+ spin_lock_irqsave(&sgpio->lock, flags);
val = readl(sgpio->chip.regs + offset);
val &= ~(SIRFSOC_GPIO_CTL_INTR_STS_MASK | SIRFSOC_GPIO_CTL_OUT_EN_MASK);
writel(val, sgpio->chip.regs + offset);
- spin_unlock_irqrestore(&sgpio_lock, flags);
+ spin_unlock_irqrestore(&sgpio->lock, flags);
return 0;
}
status = readl(sgpio->chip.regs + SIRFSOC_GPIO_INT_STATUS(bank->id));
if (!status) {
printk(KERN_WARNING
- "%s: gpio id %d status %#x no interrupt is flaged\n",
+ "%s: gpio id %d status %#x no interrupt is flagged\n",
__func__, bank->id, status);
handle_bad_irq(irq, desc);
return;
offset = SIRFSOC_GPIO_CTRL(bank->id, idx);
- spin_lock_irqsave(&sgpio_lock, flags);
+ spin_lock_irqsave(&sgpio->lock, flags);
sirfsoc_gpio_set_output(sgpio, bank, offset, value);
- spin_unlock_irqrestore(&sgpio_lock, flags);
+ spin_unlock_irqrestore(&sgpio->lock, flags);
return 0;
}
sgpio = devm_kzalloc(&pdev->dev, sizeof(*sgpio), GFP_KERNEL);
if (!sgpio)
return -ENOMEM;
+ spin_lock_init(&sgpio->lock);
regs = of_iomap(np, 0);
if (!regs)
&sun4i_a10_pinctrl_data);
}
-static struct of_device_id sun4i_a10_pinctrl_match[] = {
+static const struct of_device_id sun4i_a10_pinctrl_match[] = {
{ .compatible = "allwinner,sun4i-a10-pinctrl", },
{}
};
&sun5i_a10s_pinctrl_data);
}
-static struct of_device_id sun5i_a10s_pinctrl_match[] = {
+static const struct of_device_id sun5i_a10s_pinctrl_match[] = {
{ .compatible = "allwinner,sun5i-a10s-pinctrl", },
{}
};
&sun5i_a13_pinctrl_data);
}
-static struct of_device_id sun5i_a13_pinctrl_match[] = {
+static const struct of_device_id sun5i_a13_pinctrl_match[] = {
{ .compatible = "allwinner,sun5i-a13-pinctrl", },
{}
};
return ret;
}
-static struct of_device_id sun6i_a31_r_pinctrl_match[] = {
+static const struct of_device_id sun6i_a31_r_pinctrl_match[] = {
{ .compatible = "allwinner,sun6i-a31-r-pinctrl", },
{}
};
&sun6i_a31_pinctrl_data);
}
-static struct of_device_id sun6i_a31_pinctrl_match[] = {
+static const struct of_device_id sun6i_a31_pinctrl_match[] = {
{ .compatible = "allwinner,sun6i-a31-pinctrl", },
{}
};
&sun6i_a31s_pinctrl_data);
}
-static struct of_device_id sun6i_a31s_pinctrl_match[] = {
+static const struct of_device_id sun6i_a31s_pinctrl_match[] = {
{ .compatible = "allwinner,sun6i-a31s-pinctrl", },
{}
};
&sun7i_a20_pinctrl_data);
}
-static struct of_device_id sun7i_a20_pinctrl_match[] = {
+static const struct of_device_id sun7i_a20_pinctrl_match[] = {
{ .compatible = "allwinner,sun7i-a20-pinctrl", },
{}
};
return ret;
}
-static struct of_device_id sun8i_a23_r_pinctrl_match[] = {
+static const struct of_device_id sun8i_a23_r_pinctrl_match[] = {
{ .compatible = "allwinner,sun8i-a23-r-pinctrl", },
{}
};
&sun8i_a23_pinctrl_data);
}
-static struct of_device_id sun8i_a23_pinctrl_match[] = {
+static const struct of_device_id sun8i_a23_pinctrl_match[] = {
{ .compatible = "allwinner,sun8i-a23-pinctrl", },
{}
};
&sun9i_a80_pinctrl_data);
}
-static struct of_device_id sun9i_a80_pinctrl_match[] = {
+static const struct of_device_id sun9i_a80_pinctrl_match[] = {
{ .compatible = "allwinner,sun9i-a80-pinctrl", },
{}
};
return wmt_pinctrl_remove(pdev);
}
-static struct of_device_id wmt_pinctrl_of_match[] = {
+static const struct of_device_id wmt_pinctrl_of_match[] = {
{ .compatible = "via,vt8500-pinctrl" },
{ /* sentinel */ },
};
return wmt_pinctrl_remove(pdev);
}
-static struct of_device_id wmt_pinctrl_of_match[] = {
+static const struct of_device_id wmt_pinctrl_of_match[] = {
{ .compatible = "wm,wm8505-pinctrl" },
{ /* sentinel */ },
};
return wmt_pinctrl_remove(pdev);
}
-static struct of_device_id wmt_pinctrl_of_match[] = {
+static const struct of_device_id wmt_pinctrl_of_match[] = {
{ .compatible = "wm,wm8650-pinctrl" },
{ /* sentinel */ },
};
return wmt_pinctrl_remove(pdev);
}
-static struct of_device_id wmt_pinctrl_of_match[] = {
+static const struct of_device_id wmt_pinctrl_of_match[] = {
{ .compatible = "wm,wm8750-pinctrl" },
{ /* sentinel */ },
};
return wmt_pinctrl_remove(pdev);
}
-static struct of_device_id wmt_pinctrl_of_match[] = {
+static const struct of_device_id wmt_pinctrl_of_match[] = {
{ .compatible = "wm,wm8850-pinctrl" },
{ /* sentinel */ },
};
unsigned char curr_pwm;
/* Power supply */
- struct power_supply psy;
+ struct power_supply *psy;
struct power_supply_info psy_info;
char bat_model_name[BAT_MODEL_NAME_LEN + 1];
char bat_manufacturer_name[BAT_MANUFACTURER_NAME_LEN + 1];
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct compal_data *data;
- data = container_of(psy, struct compal_data, psy);
+ struct compal_data *data = power_supply_get_drvdata(psy);
switch (psp) {
case POWER_SUPPLY_PROP_STATUS:
};
MODULE_DEVICE_TABLE(dmi, compal_dmi_table);
+static const struct power_supply_desc psy_bat_desc = {
+ .name = DRIVER_NAME,
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = compal_bat_properties,
+ .num_properties = ARRAY_SIZE(compal_bat_properties),
+ .get_property = bat_get_property,
+};
+
static void initialize_power_supply_data(struct compal_data *data)
{
- data->psy.name = DRIVER_NAME;
- data->psy.type = POWER_SUPPLY_TYPE_BATTERY;
- data->psy.properties = compal_bat_properties;
- data->psy.num_properties = ARRAY_SIZE(compal_bat_properties);
- data->psy.get_property = bat_get_property;
ec_read_sequence(BAT_MANUFACTURER_NAME_ADDR,
data->bat_manufacturer_name,
int err;
struct compal_data *data;
struct device *hwmon_dev;
+ struct power_supply_config psy_cfg = {};
if (!extra_features)
return 0;
if (err)
return err;
- hwmon_dev = hwmon_device_register_with_groups(&pdev->dev,
- "compal", data,
- compal_hwmon_groups);
+ hwmon_dev = devm_hwmon_device_register_with_groups(&pdev->dev,
+ "compal", data,
+ compal_hwmon_groups);
if (IS_ERR(hwmon_dev)) {
err = PTR_ERR(hwmon_dev);
goto remove;
/* Power supply */
initialize_power_supply_data(data);
- power_supply_register(&compal_device->dev, &data->psy);
+ psy_cfg.drv_data = data;
+ data->psy = power_supply_register(&compal_device->dev, &psy_bat_desc,
+ &psy_cfg);
+ if (IS_ERR(data->psy)) {
+ err = PTR_ERR(data->psy);
+ goto remove;
+ }
platform_set_drvdata(pdev, data);
pwm_disable_control();
data = platform_get_drvdata(pdev);
- power_supply_unregister(&data->psy);
+ power_supply_unregister(data->psy);
sysfs_remove_group(&pdev->dev.kobj, &compal_platform_attr_group);
*/
for_each_pci_dev(pdev) {
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
- unsigned long type;
+ unsigned long flags, type;
- type = pci_resource_flags(pdev, i) &
- (IORESOURCE_IO | IORESOURCE_MEM);
+ flags = pci_resource_flags(pdev, i);
+ type = flags & (IORESOURCE_IO | IORESOURCE_MEM);
if (!type || pci_resource_len(pdev, i) == 0)
continue;
+ if (flags & IORESOURCE_UNSET)
+ continue;
+
pci_start = pci_resource_start(pdev, i);
pci_end = pci_resource_end(pdev, i);
for (j = 0;
struct i2c_client *i2c;
struct device *dev;
- struct power_supply battery;
+ struct power_supply *battery;
struct mutex lock;
int status;
int irq_cc;
static void pm860x_external_power_changed(struct power_supply *psy)
{
- struct pm860x_battery_info *info;
+ struct pm860x_battery_info *info = dev_get_drvdata(psy->dev.parent);
- info = container_of(psy, struct pm860x_battery_info, battery);
calc_resistor(info);
}
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct pm860x_battery_info *info = dev_get_drvdata(psy->dev->parent);
+ struct pm860x_battery_info *info = dev_get_drvdata(psy->dev.parent);
int data;
int ret;
enum power_supply_property psp,
const union power_supply_propval *val)
{
- struct pm860x_battery_info *info = dev_get_drvdata(psy->dev->parent);
+ struct pm860x_battery_info *info = dev_get_drvdata(psy->dev.parent);
switch (psp) {
case POWER_SUPPLY_PROP_CHARGE_FULL:
POWER_SUPPLY_PROP_TEMP,
};
+static const struct power_supply_desc pm860x_battery_desc = {
+ .name = "battery-monitor",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = pm860x_batt_props,
+ .num_properties = ARRAY_SIZE(pm860x_batt_props),
+ .get_property = pm860x_batt_get_prop,
+ .set_property = pm860x_batt_set_prop,
+ .external_power_changed = pm860x_external_power_changed,
+};
+
static int pm860x_battery_probe(struct platform_device *pdev)
{
struct pm860x_chip *chip = dev_get_drvdata(pdev->dev.parent);
pm860x_init_battery(info);
- info->battery.name = "battery-monitor";
- info->battery.type = POWER_SUPPLY_TYPE_BATTERY;
- info->battery.properties = pm860x_batt_props;
- info->battery.num_properties = ARRAY_SIZE(pm860x_batt_props);
- info->battery.get_property = pm860x_batt_get_prop;
- info->battery.set_property = pm860x_batt_set_prop;
- info->battery.external_power_changed = pm860x_external_power_changed;
-
if (pdata && pdata->max_capacity)
info->max_capacity = pdata->max_capacity;
else
else
info->resistor = 300; /* set default internal resistor */
- ret = power_supply_register(&pdev->dev, &info->battery);
- if (ret)
- return ret;
- info->battery.dev->parent = &pdev->dev;
+ info->battery = power_supply_register(&pdev->dev, &pm860x_battery_desc,
+ NULL);
+ if (IS_ERR(info->battery))
+ return PTR_ERR(info->battery);
+ info->battery->dev.parent = &pdev->dev;
ret = request_threaded_irq(info->irq_cc, NULL,
pm860x_coulomb_handler, IRQF_ONESHOT,
out_coulomb:
free_irq(info->irq_cc, info);
out_reg:
- power_supply_unregister(&info->battery);
+ power_supply_unregister(info->battery);
return ret;
}
free_irq(info->irq_batt, info);
free_irq(info->irq_cc, info);
- power_supply_unregister(&info->battery);
+ power_supply_unregister(info->battery);
return 0;
}
struct i2c_client *i2c_8606;
struct device *dev;
- struct power_supply usb;
+ struct power_supply *usb;
struct mutex lock;
int irq_nums;
int irq[7];
psy = power_supply_get_by_name(pm860x_supplied_to[0]);
if (!psy)
return -EINVAL;
- ret = psy->get_property(psy, POWER_SUPPLY_PROP_VOLTAGE_NOW, &data);
- if (ret)
+ ret = power_supply_get_property(psy, POWER_SUPPLY_PROP_VOLTAGE_NOW,
+ &data);
+ if (ret) {
+ power_supply_put(psy);
return ret;
+ }
vbatt = data.intval / 1000;
- ret = psy->get_property(psy, POWER_SUPPLY_PROP_PRESENT, &data);
- if (ret)
+ ret = power_supply_get_property(psy, POWER_SUPPLY_PROP_PRESENT, &data);
+ if (ret) {
+ power_supply_put(psy);
return ret;
+ }
+ power_supply_put(psy);
mutex_lock(&info->lock);
info->present = data.intval;
set_charging_fsm(info);
- power_supply_changed(&info->usb);
+ power_supply_changed(info->usb);
out:
return IRQ_HANDLED;
}
psy = power_supply_get_by_name(pm860x_supplied_to[0]);
if (!psy)
goto out;
- ret = psy->get_property(psy, POWER_SUPPLY_PROP_TEMP, &temp);
+ ret = power_supply_get_property(psy, POWER_SUPPLY_PROP_TEMP, &temp);
if (ret)
goto out;
value = temp.intval / 10;
set_charging_fsm(info);
out:
+ power_supply_put(psy);
return IRQ_HANDLED;
}
psy = power_supply_get_by_name(pm860x_supplied_to[0]);
if (!psy)
goto out;
- ret = psy->get_property(psy, POWER_SUPPLY_PROP_VOLTAGE_NOW, &val);
+ ret = power_supply_get_property(psy, POWER_SUPPLY_PROP_VOLTAGE_NOW,
+ &val);
if (ret)
- goto out;
+ goto out_psy_put;
vbatt = val.intval / 1000;
/*
* CHG_DONE interrupt is faster than CHG_DET interrupt when
*/
ret = pm860x_reg_read(info->i2c, PM8607_STATUS_2);
if (ret < 0)
- goto out;
+ goto out_psy_put;
if (vbatt > CHARGE_THRESHOLD && ret & STATUS2_CHG)
- psy->set_property(psy, POWER_SUPPLY_PROP_CHARGE_FULL, &val);
+ power_supply_set_property(psy, POWER_SUPPLY_PROP_CHARGE_FULL,
+ &val);
+out_psy_put:
+ power_supply_put(psy);
out:
mutex_unlock(&info->lock);
dev_dbg(info->dev, "%s, Allowed: %d\n", __func__, info->allowed);
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct pm860x_charger_info *info =
- dev_get_drvdata(psy->dev->parent);
+ struct pm860x_charger_info *info = power_supply_get_drvdata(psy);
switch (psp) {
case POWER_SUPPLY_PROP_STATUS:
{ "vchg", pm860x_vchg_handler },
};
+static const struct power_supply_desc pm860x_charger_desc = {
+ .name = "usb",
+ .type = POWER_SUPPLY_TYPE_USB,
+ .properties = pm860x_usb_props,
+ .num_properties = ARRAY_SIZE(pm860x_usb_props),
+ .get_property = pm860x_usb_get_prop,
+};
+
static int pm860x_charger_probe(struct platform_device *pdev)
{
struct pm860x_chip *chip = dev_get_drvdata(pdev->dev.parent);
+ struct power_supply_config psy_cfg = {};
struct pm860x_charger_info *info;
int ret;
int count;
mutex_init(&info->lock);
platform_set_drvdata(pdev, info);
- info->usb.name = "usb";
- info->usb.type = POWER_SUPPLY_TYPE_USB;
- info->usb.supplied_to = pm860x_supplied_to;
- info->usb.num_supplicants = ARRAY_SIZE(pm860x_supplied_to);
- info->usb.properties = pm860x_usb_props;
- info->usb.num_properties = ARRAY_SIZE(pm860x_usb_props);
- info->usb.get_property = pm860x_usb_get_prop;
- ret = power_supply_register(&pdev->dev, &info->usb);
- if (ret)
+ psy_cfg.drv_data = info;
+ psy_cfg.supplied_to = pm860x_supplied_to;
+ psy_cfg.num_supplicants = ARRAY_SIZE(pm860x_supplied_to);
+ info->usb = power_supply_register(&pdev->dev, &pm860x_charger_desc,
+ &psy_cfg);
+ if (IS_ERR(info->usb)) {
+ ret = PTR_ERR(info->usb);
goto out;
+ }
pm860x_init_charger(info);
return 0;
out_irq:
- power_supply_unregister(&info->usb);
+ power_supply_unregister(info->usb);
while (--i >= 0)
free_irq(info->irq[i], info);
out:
struct pm860x_charger_info *info = platform_get_drvdata(pdev);
int i;
- power_supply_unregister(&info->usb);
+ power_supply_unregister(info->usb);
free_irq(info->irq[0], info);
for (i = 0; i < info->irq_nums; i++)
free_irq(info->irq[i], info);
Say Y here to enable support for batteries charger integrated into
DA9052 PMIC.
+config CHARGER_DA9150
+ tristate "Dialog Semiconductor DA9150 Charger support"
+ depends on MFD_DA9150
+ depends on DA9150_GPADC
+ depends on IIO
+ help
+ Say Y here to enable support for charger unit of the DA9150
+ Integrated Charger & Fuel-Gauge IC.
+
+ This driver can also be built as a module. If so, the module will be
+ called da9150-charger.
+
+config AXP288_FUEL_GAUGE
+ tristate "X-Powers AXP288 Fuel Gauge"
+ depends on MFD_AXP20X && IIO
+ help
+ Say yes here to have support for X-Power power management IC (PMIC)
+ Fuel Gauge. The device provides battery statistics and status
+ monitoring as well as alerts for battery over/under voltage and
+ over/under temperature.
+
config BATTERY_MAX17040
tristate "Maxim MAX17040 Fuel Gauge"
depends on I2C
-ccflags-$(CONFIG_POWER_SUPPLY_DEBUG) := -DDEBUG
+subdir-ccflags-$(CONFIG_POWER_SUPPLY_DEBUG) := -DDEBUG
power_supply-y := power_supply_core.o
power_supply-$(CONFIG_SYSFS) += power_supply_sysfs.o
obj-$(CONFIG_BATTERY_BQ27x00) += bq27x00_battery.o
obj-$(CONFIG_BATTERY_DA9030) += da9030_battery.o
obj-$(CONFIG_BATTERY_DA9052) += da9052-battery.o
+obj-$(CONFIG_CHARGER_DA9150) += da9150-charger.o
obj-$(CONFIG_BATTERY_MAX17040) += max17040_battery.o
obj-$(CONFIG_BATTERY_MAX17042) += max17042_battery.o
obj-$(CONFIG_BATTERY_Z2) += z2_battery.o
obj-$(CONFIG_CHARGER_SMB347) += smb347-charger.o
obj-$(CONFIG_CHARGER_TPS65090) += tps65090-charger.o
obj-$(CONFIG_POWER_RESET) += reset/
+obj-$(CONFIG_AXP288_FUEL_GAUGE) += axp288_fuel_gauge.o
#define BTEMP_BATCTRL_CURR_SRC_60UA 60
#define BTEMP_BATCTRL_CURR_SRC_120UA 120
-#define to_ab8500_btemp_device_info(x) container_of((x), \
- struct ab8500_btemp, btemp_psy);
-
/**
* struct ab8500_btemp_interrupts - ab8500 interrupts
* @name: name of the interrupt
struct ab8500_gpadc *gpadc;
struct ab8500_fg *fg;
struct abx500_bm_data *bm;
- struct power_supply btemp_psy;
+ struct power_supply *btemp_psy;
struct ab8500_btemp_events events;
struct ab8500_btemp_ranges btemp_ranges;
struct workqueue_struct *btemp_wq;
if ((di->bat_temp != di->prev_bat_temp) || !di->initialized) {
di->initialized = true;
di->bat_temp = bat_temp;
- power_supply_changed(&di->btemp_psy);
+ power_supply_changed(di->btemp_psy);
}
} else if (bat_temp < di->prev_bat_temp) {
di->bat_temp--;
- power_supply_changed(&di->btemp_psy);
+ power_supply_changed(di->btemp_psy);
} else if (bat_temp > di->prev_bat_temp) {
di->bat_temp++;
- power_supply_changed(&di->btemp_psy);
+ power_supply_changed(di->btemp_psy);
}
di->prev_bat_temp = bat_temp;
dev_err(di->dev, "Battery removal detected!\n");
di->events.batt_rem = true;
- power_supply_changed(&di->btemp_psy);
+ power_supply_changed(di->btemp_psy);
return IRQ_HANDLED;
}
di->events.btemp_high = false;
di->events.btemp_medhigh = false;
di->events.btemp_lowmed = false;
- power_supply_changed(&di->btemp_psy);
+ power_supply_changed(di->btemp_psy);
}
return IRQ_HANDLED;
di->events.btemp_medhigh = false;
di->events.btemp_lowmed = false;
di->events.btemp_low = false;
- power_supply_changed(&di->btemp_psy);
+ power_supply_changed(di->btemp_psy);
return IRQ_HANDLED;
}
di->events.btemp_medhigh = false;
di->events.btemp_high = false;
di->events.btemp_low = false;
- power_supply_changed(&di->btemp_psy);
+ power_supply_changed(di->btemp_psy);
return IRQ_HANDLED;
}
di->events.btemp_lowmed = false;
di->events.btemp_high = false;
di->events.btemp_low = false;
- power_supply_changed(&di->btemp_psy);
+ power_supply_changed(di->btemp_psy);
return IRQ_HANDLED;
}
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct ab8500_btemp *di;
-
- di = to_ab8500_btemp_device_info(psy);
+ struct ab8500_btemp *di = power_supply_get_drvdata(psy);
switch (psp) {
case POWER_SUPPLY_PROP_PRESENT:
psy = (struct power_supply *)data;
ext = dev_get_drvdata(dev);
- di = to_ab8500_btemp_device_info(psy);
+ di = power_supply_get_drvdata(psy);
/*
* For all psy where the name of your driver
* appears in any supplied_to
*/
for (i = 0; i < ext->num_supplicants; i++) {
- if (!strcmp(ext->supplied_to[i], psy->name))
+ if (!strcmp(ext->supplied_to[i], psy->desc->name))
psy_found = true;
}
return 0;
/* Go through all properties for the psy */
- for (j = 0; j < ext->num_properties; j++) {
+ for (j = 0; j < ext->desc->num_properties; j++) {
enum power_supply_property prop;
- prop = ext->properties[j];
+ prop = ext->desc->properties[j];
- if (ext->get_property(ext, prop, &ret))
+ if (power_supply_get_property(ext, prop, &ret))
continue;
switch (prop) {
case POWER_SUPPLY_PROP_PRESENT:
- switch (ext->type) {
+ switch (ext->desc->type) {
case POWER_SUPPLY_TYPE_MAINS:
/* AC disconnected */
if (!ret.intval && di->events.ac_conn) {
*/
static void ab8500_btemp_external_power_changed(struct power_supply *psy)
{
- struct ab8500_btemp *di = to_ab8500_btemp_device_info(psy);
+ struct ab8500_btemp *di = power_supply_get_drvdata(psy);
class_for_each_device(power_supply_class, NULL,
- &di->btemp_psy, ab8500_btemp_get_ext_psy_data);
+ di->btemp_psy, ab8500_btemp_get_ext_psy_data);
}
/* ab8500 btemp driver interrupts and their respective isr */
destroy_workqueue(di->btemp_wq);
flush_scheduled_work();
- power_supply_unregister(&di->btemp_psy);
+ power_supply_unregister(di->btemp_psy);
return 0;
}
"ab8500_fg",
};
+static const struct power_supply_desc ab8500_btemp_desc = {
+ .name = "ab8500_btemp",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = ab8500_btemp_props,
+ .num_properties = ARRAY_SIZE(ab8500_btemp_props),
+ .get_property = ab8500_btemp_get_property,
+ .external_power_changed = ab8500_btemp_external_power_changed,
+};
+
static int ab8500_btemp_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
struct abx500_bm_data *plat = pdev->dev.platform_data;
+ struct power_supply_config psy_cfg = {};
struct ab8500_btemp *di;
int irq, i, ret = 0;
u8 val;
di->initialized = false;
- /* BTEMP supply */
- di->btemp_psy.name = "ab8500_btemp";
- di->btemp_psy.type = POWER_SUPPLY_TYPE_BATTERY;
- di->btemp_psy.properties = ab8500_btemp_props;
- di->btemp_psy.num_properties = ARRAY_SIZE(ab8500_btemp_props);
- di->btemp_psy.get_property = ab8500_btemp_get_property;
- di->btemp_psy.supplied_to = supply_interface;
- di->btemp_psy.num_supplicants = ARRAY_SIZE(supply_interface);
- di->btemp_psy.external_power_changed =
- ab8500_btemp_external_power_changed;
-
+ psy_cfg.supplied_to = supply_interface;
+ psy_cfg.num_supplicants = ARRAY_SIZE(supply_interface);
+ psy_cfg.drv_data = di;
/* Create a work queue for the btemp */
di->btemp_wq =
}
/* Register BTEMP power supply class */
- ret = power_supply_register(di->dev, &di->btemp_psy);
- if (ret) {
+ di->btemp_psy = power_supply_register(di->dev, &ab8500_btemp_desc,
+ &psy_cfg);
+ if (IS_ERR(di->btemp_psy)) {
dev_err(di->dev, "failed to register BTEMP psy\n");
+ ret = PTR_ERR(di->btemp_psy);
goto free_btemp_wq;
}
return ret;
free_irq:
- power_supply_unregister(&di->btemp_psy);
+ power_supply_unregister(di->btemp_psy);
/* We also have to free all successfully registered irqs */
for (i = i - 1; i >= 0; i--) {
if (!connected)
di->flags.vbus_drop_end = false;
- sysfs_notify(&di->usb_chg.psy.dev->kobj, NULL, "present");
+ sysfs_notify(&di->usb_chg.psy->dev.kobj, NULL, "present");
if (connected) {
mutex_lock(&di->charger_attached_mutex);
dev_dbg(di->dev, "%s Disabled AC charging\n", __func__);
}
- ab8500_power_supply_changed(di, &di->ac_chg.psy);
+ ab8500_power_supply_changed(di, di->ac_chg.psy);
return ret;
}
cancel_delayed_work(&di->check_vbat_work);
}
- ab8500_power_supply_changed(di, &di->usb_chg.psy);
+ ab8500_power_supply_changed(di, di->usb_chg.psy);
return ret;
}
int ret;
struct ab8500_charger *di;
- if (charger->psy.type == POWER_SUPPLY_TYPE_MAINS)
+ if (charger->psy->desc->type == POWER_SUPPLY_TYPE_MAINS)
di = to_ab8500_charger_ac_device_info(charger);
- else if (charger->psy.type == POWER_SUPPLY_TYPE_USB)
+ else if (charger->psy->desc->type == POWER_SUPPLY_TYPE_USB)
di = to_ab8500_charger_usb_device_info(charger);
else
return -ENXIO;
int ret;
struct ab8500_charger *di;
- if (charger->psy.type == POWER_SUPPLY_TYPE_MAINS)
+ if (charger->psy->desc->type == POWER_SUPPLY_TYPE_MAINS)
di = to_ab8500_charger_ac_device_info(charger);
- else if (charger->psy.type == POWER_SUPPLY_TYPE_USB)
+ else if (charger->psy->desc->type == POWER_SUPPLY_TYPE_USB)
di = to_ab8500_charger_usb_device_info(charger);
else
return -ENXIO;
int ret;
struct ab8500_charger *di;
- if (charger->psy.type == POWER_SUPPLY_TYPE_USB)
+ if (charger->psy->desc->type == POWER_SUPPLY_TYPE_USB)
di = to_ab8500_charger_usb_device_info(charger);
else
return -ENXIO;
int ret;
struct ab8500_charger *di;
- if (charger->psy.type == POWER_SUPPLY_TYPE_USB)
+ if (charger->psy->desc->type == POWER_SUPPLY_TYPE_USB)
di = to_ab8500_charger_usb_device_info(charger);
else
return -ENXIO;
struct ux500_charger *usb_chg;
usb_chg = (struct ux500_charger *)data;
- psy = &usb_chg->psy;
+ psy = usb_chg->psy;
di = to_ab8500_charger_usb_device_info(usb_chg);
/* For all psy where the driver name appears in any supplied_to */
for (i = 0; i < ext->num_supplicants; i++) {
- if (!strcmp(ext->supplied_to[i], psy->name))
+ if (!strcmp(ext->supplied_to[i], psy->desc->name))
psy_found = true;
}
return 0;
/* Go through all properties for the psy */
- for (j = 0; j < ext->num_properties; j++) {
+ for (j = 0; j < ext->desc->num_properties; j++) {
enum power_supply_property prop;
- prop = ext->properties[j];
+ prop = ext->desc->properties[j];
- if (ext->get_property(ext, prop, &ret))
+ if (power_supply_get_property(ext, prop, &ret))
continue;
switch (prop) {
case POWER_SUPPLY_PROP_VOLTAGE_NOW:
- switch (ext->type) {
+ switch (ext->desc->type) {
case POWER_SUPPLY_TYPE_BATTERY:
di->vbat = ret.intval / 1000;
break;
struct ab8500_charger, check_vbat_work.work);
class_for_each_device(power_supply_class, NULL,
- &di->usb_chg.psy, ab8500_charger_get_ext_psy_data);
+ di->usb_chg.psy, ab8500_charger_get_ext_psy_data);
/* First run old_vbat is 0. */
if (di->old_vbat == 0)
di->vbat, di->old_vbat);
ab8500_charger_set_vbus_in_curr(di,
di->max_usb_in_curr.usb_type_max);
- power_supply_changed(&di->usb_chg.psy);
+ power_supply_changed(di->usb_chg.psy);
}
di->old_vbat = di->vbat;
}
if (!(reg_value & MAIN_CH_NOK)) {
di->flags.mainextchnotok = false;
- ab8500_power_supply_changed(di, &di->ac_chg.psy);
+ ab8500_power_supply_changed(di, di->ac_chg.psy);
}
}
if (di->flags.vbus_ovv) {
}
if (!(reg_value & VBUS_OVV_TH)) {
di->flags.vbus_ovv = false;
- ab8500_power_supply_changed(di, &di->usb_chg.psy);
+ ab8500_power_supply_changed(di, di->usb_chg.psy);
}
}
/* If we still have a failure, schedule a new check */
di->ac.charger_connected = 0;
}
- ab8500_power_supply_changed(di, &di->ac_chg.psy);
- sysfs_notify(&di->ac_chg.psy.dev->kobj, NULL, "present");
+ ab8500_power_supply_changed(di, di->ac_chg.psy);
+ sysfs_notify(&di->ac_chg.psy->dev.kobj, NULL, "present");
}
static void ab8500_charger_usb_attached_work(struct work_struct *work)
dev_dbg(di->dev, "%s di->vbus_detected = false\n", __func__);
di->vbus_detected = false;
ab8500_charger_set_usb_connected(di, false);
- ab8500_power_supply_changed(di, &di->usb_chg.psy);
+ ab8500_power_supply_changed(di, di->usb_chg.psy);
} else {
dev_dbg(di->dev, "%s di->vbus_detected = true\n", __func__);
di->vbus_detected = true;
if (!ret) {
ab8500_charger_set_usb_connected(di, true);
ab8500_power_supply_changed(di,
- &di->usb_chg.psy);
+ di->usb_chg.psy);
}
} else {
/*
ab8500_charger_set_usb_connected(di,
true);
ab8500_power_supply_changed(di,
- &di->usb_chg.psy);
+ di->usb_chg.psy);
}
}
}
}
ab8500_charger_set_usb_connected(di, true);
- ab8500_power_supply_changed(di, &di->usb_chg.psy);
+ ab8500_power_supply_changed(di, di->usb_chg.psy);
}
/**
if (!(detected_chargers & USB_PW_CONN)) {
di->vbus_detected = false;
ab8500_charger_set_usb_connected(di, false);
- ab8500_power_supply_changed(di, &di->usb_chg.psy);
+ ab8500_power_supply_changed(di, di->usb_chg.psy);
return;
}
if (ret == -ENXIO) {
/* No valid charger type detected */
ab8500_charger_set_usb_connected(di, false);
- ab8500_power_supply_changed(di, &di->usb_chg.psy);
+ ab8500_power_supply_changed(di, di->usb_chg.psy);
}
return;
}
case AB8500_BM_USB_STATE_SUSPEND:
case AB8500_BM_USB_STATE_MAX:
ab8500_charger_set_usb_connected(di, false);
- ab8500_power_supply_changed(di, &di->usb_chg.psy);
+ ab8500_power_supply_changed(di, di->usb_chg.psy);
break;
case AB8500_BM_USB_STATE_RESUME:
return;
ab8500_charger_set_usb_connected(di, true);
- ab8500_power_supply_changed(di, &di->usb_chg.psy);
+ ab8500_power_supply_changed(di, di->usb_chg.psy);
}
break;
}
if (prev_status != di->flags.usbchargernotok)
- ab8500_power_supply_changed(di, &di->usb_chg.psy);
+ ab8500_power_supply_changed(di, di->usb_chg.psy);
}
/**
else
di->flags.main_thermal_prot = false;
- ab8500_power_supply_changed(di, &di->ac_chg.psy);
+ ab8500_power_supply_changed(di, di->ac_chg.psy);
}
/**
else
di->flags.usb_thermal_prot = false;
- ab8500_power_supply_changed(di, &di->usb_chg.psy);
+ ab8500_power_supply_changed(di, di->usb_chg.psy);
}
/**
dev_dbg(di->dev, "Main charger not ok\n");
di->flags.mainextchnotok = true;
- ab8500_power_supply_changed(di, &di->ac_chg.psy);
+ ab8500_power_supply_changed(di, di->ac_chg.psy);
/* Schedule a new HW failure check */
queue_delayed_work(di->charger_wq, &di->check_hw_failure_work, 0);
*/
if (di->ac.charger_online) {
di->ac.wd_expired = true;
- ab8500_power_supply_changed(di, &di->ac_chg.psy);
+ ab8500_power_supply_changed(di, di->ac_chg.psy);
}
if (di->usb.charger_online) {
di->usb.wd_expired = true;
- ab8500_power_supply_changed(di, &di->usb_chg.psy);
+ ab8500_power_supply_changed(di, di->usb_chg.psy);
}
return IRQ_HANDLED;
dev_dbg(di->dev, "VBUS overvoltage detected\n");
di->flags.vbus_ovv = true;
- ab8500_power_supply_changed(di, &di->usb_chg.psy);
+ ab8500_power_supply_changed(di, di->usb_chg.psy);
/* Schedule a new HW failure check */
queue_delayed_work(di->charger_wq, &di->check_hw_failure_work, 0);
flush_scheduled_work();
if (di->usb_chg.enabled)
- power_supply_unregister(&di->usb_chg.psy);
+ power_supply_unregister(di->usb_chg.psy);
if (di->ac_chg.enabled && !di->ac_chg.external)
- power_supply_unregister(&di->ac_chg.psy);
+ power_supply_unregister(di->ac_chg.psy);
return 0;
}
"ab8500_btemp",
};
+static const struct power_supply_desc ab8500_ac_chg_desc = {
+ .name = "ab8500_ac",
+ .type = POWER_SUPPLY_TYPE_MAINS,
+ .properties = ab8500_charger_ac_props,
+ .num_properties = ARRAY_SIZE(ab8500_charger_ac_props),
+ .get_property = ab8500_charger_ac_get_property,
+};
+
+static const struct power_supply_desc ab8500_usb_chg_desc = {
+ .name = "ab8500_usb",
+ .type = POWER_SUPPLY_TYPE_USB,
+ .properties = ab8500_charger_usb_props,
+ .num_properties = ARRAY_SIZE(ab8500_charger_usb_props),
+ .get_property = ab8500_charger_usb_get_property,
+};
+
static int ab8500_charger_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
struct abx500_bm_data *plat = pdev->dev.platform_data;
+ struct power_supply_config ac_psy_cfg = {}, usb_psy_cfg = {};
struct ab8500_charger *di;
int irq, i, charger_status, ret = 0, ch_stat;
di->autopower = false;
di->invalid_charger_detect_state = 0;
+ /* AC and USB supply config */
+ ac_psy_cfg.supplied_to = supply_interface;
+ ac_psy_cfg.num_supplicants = ARRAY_SIZE(supply_interface);
+ ac_psy_cfg.drv_data = &di->ac_chg;
+ usb_psy_cfg.supplied_to = supply_interface;
+ usb_psy_cfg.num_supplicants = ARRAY_SIZE(supply_interface);
+ usb_psy_cfg.drv_data = &di->usb_chg;
+
/* AC supply */
- /* power_supply base class */
- di->ac_chg.psy.name = "ab8500_ac";
- di->ac_chg.psy.type = POWER_SUPPLY_TYPE_MAINS;
- di->ac_chg.psy.properties = ab8500_charger_ac_props;
- di->ac_chg.psy.num_properties = ARRAY_SIZE(ab8500_charger_ac_props);
- di->ac_chg.psy.get_property = ab8500_charger_ac_get_property;
- di->ac_chg.psy.supplied_to = supply_interface;
- di->ac_chg.psy.num_supplicants = ARRAY_SIZE(supply_interface),
/* ux500_charger sub-class */
di->ac_chg.ops.enable = &ab8500_charger_ac_en;
di->ac_chg.ops.check_enable = &ab8500_charger_ac_check_enable;
&charger_notifier_list, &charger_nb);
/* USB supply */
- /* power_supply base class */
- di->usb_chg.psy.name = "ab8500_usb";
- di->usb_chg.psy.type = POWER_SUPPLY_TYPE_USB;
- di->usb_chg.psy.properties = ab8500_charger_usb_props;
- di->usb_chg.psy.num_properties = ARRAY_SIZE(ab8500_charger_usb_props);
- di->usb_chg.psy.get_property = ab8500_charger_usb_get_property;
- di->usb_chg.psy.supplied_to = supply_interface;
- di->usb_chg.psy.num_supplicants = ARRAY_SIZE(supply_interface),
/* ux500_charger sub-class */
di->usb_chg.ops.enable = &ab8500_charger_usb_en;
di->usb_chg.ops.check_enable = &ab8500_charger_usb_check_enable;
/* Register AC charger class */
if (di->ac_chg.enabled) {
- ret = power_supply_register(di->dev, &di->ac_chg.psy);
- if (ret) {
+ di->ac_chg.psy = power_supply_register(di->dev,
+ &ab8500_ac_chg_desc,
+ &ac_psy_cfg);
+ if (IS_ERR(di->ac_chg.psy)) {
dev_err(di->dev, "failed to register AC charger\n");
+ ret = PTR_ERR(di->ac_chg.psy);
goto free_charger_wq;
}
}
/* Register USB charger class */
if (di->usb_chg.enabled) {
- ret = power_supply_register(di->dev, &di->usb_chg.psy);
- if (ret) {
+ di->usb_chg.psy = power_supply_register(di->dev,
+ &ab8500_usb_chg_desc,
+ &usb_psy_cfg);
+ if (IS_ERR(di->usb_chg.psy)) {
dev_err(di->dev, "failed to register USB charger\n");
+ ret = PTR_ERR(di->usb_chg.psy);
goto free_ac;
}
}
if (charger_status & AC_PW_CONN) {
di->ac.charger_connected = 1;
di->ac_conn = true;
- ab8500_power_supply_changed(di, &di->ac_chg.psy);
- sysfs_notify(&di->ac_chg.psy.dev->kobj, NULL, "present");
+ ab8500_power_supply_changed(di, di->ac_chg.psy);
+ sysfs_notify(&di->ac_chg.psy->dev.kobj, NULL, "present");
}
if (charger_status & USB_PW_CONN) {
usb_put_phy(di->usb_phy);
free_usb:
if (di->usb_chg.enabled)
- power_supply_unregister(&di->usb_chg.psy);
+ power_supply_unregister(di->usb_chg.psy);
free_ac:
if (di->ac_chg.enabled)
- power_supply_unregister(&di->ac_chg.psy);
+ power_supply_unregister(di->ac_chg.psy);
free_charger_wq:
destroy_workqueue(di->charger_wq);
return ret;
#define interpolate(x, x1, y1, x2, y2) \
((y1) + ((((y2) - (y1)) * ((x) - (x1))) / ((x2) - (x1))));
-#define to_ab8500_fg_device_info(x) container_of((x), \
- struct ab8500_fg, fg_psy);
-
/**
* struct ab8500_fg_interrupts - ab8500 fg interupts
* @name: name of the interrupt
struct ab8500 *parent;
struct ab8500_gpadc *gpadc;
struct abx500_bm_data *bm;
- struct power_supply fg_psy;
+ struct power_supply *fg_psy;
struct workqueue_struct *fg_wq;
struct delayed_work fg_periodic_work;
struct delayed_work fg_low_bat_work;
u8 low, high;
int val;
int ret;
- int timeout;
+ unsigned long timeout;
if (!completion_done(&di->ab8500_fg_complete)) {
timeout = wait_for_completion_timeout(
&di->ab8500_fg_complete,
INS_CURR_TIMEOUT);
dev_dbg(di->dev, "Finalize time: %d ms\n",
- ((INS_CURR_TIMEOUT - timeout) * 1000) / HZ);
+ jiffies_to_msecs(INS_CURR_TIMEOUT - timeout));
if (!timeout) {
ret = -ETIME;
disable_irq(di->irq);
int ab8500_fg_inst_curr_blocking(struct ab8500_fg *di)
{
int ret;
- int timeout;
+ unsigned long timeout;
int res = 0;
ret = ab8500_fg_inst_curr_start(di);
&di->ab8500_fg_started,
INS_CURR_TIMEOUT);
dev_dbg(di->dev, "Start time: %d ms\n",
- ((INS_CURR_TIMEOUT - timeout) * 1000) / HZ);
+ jiffies_to_msecs(INS_CURR_TIMEOUT - timeout));
if (!timeout) {
ret = -ETIME;
dev_err(di->dev, "completion timed out [%d]\n",
di->bat_cap.prev_percent,
di->bat_cap.cap_scale.scaled_cap);
}
- power_supply_changed(&di->fg_psy);
+ power_supply_changed(di->fg_psy);
if (di->flags.fully_charged && di->flags.force_full) {
dev_dbg(di->dev, "Battery full, notifying.\n");
di->flags.force_full = false;
if (!di->flags.bat_ovv) {
dev_dbg(di->dev, "Battery OVV\n");
di->flags.bat_ovv = true;
- power_supply_changed(&di->fg_psy);
+ power_supply_changed(di->fg_psy);
}
/* Not yet recovered from ovv, reschedule this test */
queue_delayed_work(di->fg_wq, &di->fg_check_hw_failure_work,
} else {
dev_dbg(di->dev, "Battery recovered from OVV\n");
di->flags.bat_ovv = false;
- power_supply_changed(&di->fg_psy);
+ power_supply_changed(di->fg_psy);
}
}
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct ab8500_fg *di;
-
- di = to_ab8500_fg_device_info(psy);
+ struct ab8500_fg *di = power_supply_get_drvdata(psy);
/*
* If battery is identified as unknown and charging of unknown
psy = (struct power_supply *)data;
ext = dev_get_drvdata(dev);
- di = to_ab8500_fg_device_info(psy);
+ di = power_supply_get_drvdata(psy);
/*
* For all psy where the name of your driver
* appears in any supplied_to
*/
for (i = 0; i < ext->num_supplicants; i++) {
- if (!strcmp(ext->supplied_to[i], psy->name))
+ if (!strcmp(ext->supplied_to[i], psy->desc->name))
psy_found = true;
}
return 0;
/* Go through all properties for the psy */
- for (j = 0; j < ext->num_properties; j++) {
+ for (j = 0; j < ext->desc->num_properties; j++) {
enum power_supply_property prop;
- prop = ext->properties[j];
+ prop = ext->desc->properties[j];
- if (ext->get_property(ext, prop, &ret))
+ if (power_supply_get_property(ext, prop, &ret))
continue;
switch (prop) {
case POWER_SUPPLY_PROP_STATUS:
- switch (ext->type) {
+ switch (ext->desc->type) {
case POWER_SUPPLY_TYPE_BATTERY:
switch (ret.intval) {
case POWER_SUPPLY_STATUS_UNKNOWN:
};
break;
case POWER_SUPPLY_PROP_TECHNOLOGY:
- switch (ext->type) {
+ switch (ext->desc->type) {
case POWER_SUPPLY_TYPE_BATTERY:
if (!di->flags.batt_id_received &&
di->bm->batt_id != BATTERY_UNKNOWN) {
}
break;
case POWER_SUPPLY_PROP_TEMP:
- switch (ext->type) {
+ switch (ext->desc->type) {
case POWER_SUPPLY_TYPE_BATTERY:
if (di->flags.batt_id_received)
di->bat_temp = ret.intval;
*/
static void ab8500_fg_external_power_changed(struct power_supply *psy)
{
- struct ab8500_fg *di = to_ab8500_fg_device_info(psy);
+ struct ab8500_fg *di = power_supply_get_drvdata(psy);
class_for_each_device(power_supply_class, NULL,
- &di->fg_psy, ab8500_fg_get_ext_psy_data);
+ di->fg_psy, ab8500_fg_get_ext_psy_data);
}
/**
int ret;
u8 reg_value;
struct power_supply *psy = dev_get_drvdata(dev);
- struct ab8500_fg *di;
-
- di = to_ab8500_fg_device_info(psy);
+ struct ab8500_fg *di = power_supply_get_drvdata(psy);
ret = abx500_get_register_interruptible(di->dev, AB8500_RTC,
AB8505_RTC_PCUT_FLAG_TIME_REG, ®_value);
int ret;
long unsigned reg_value;
struct power_supply *psy = dev_get_drvdata(dev);
- struct ab8500_fg *di;
-
- di = to_ab8500_fg_device_info(psy);
+ struct ab8500_fg *di = power_supply_get_drvdata(psy);
reg_value = simple_strtoul(buf, NULL, 10);
int ret;
u8 reg_value;
struct power_supply *psy = dev_get_drvdata(dev);
- struct ab8500_fg *di;
-
- di = to_ab8500_fg_device_info(psy);
+ struct ab8500_fg *di = power_supply_get_drvdata(psy);
ret = abx500_get_register_interruptible(di->dev, AB8500_RTC,
AB8505_RTC_PCUT_MAX_TIME_REG, ®_value);
int ret;
int reg_value;
struct power_supply *psy = dev_get_drvdata(dev);
- struct ab8500_fg *di;
-
- di = to_ab8500_fg_device_info(psy);
+ struct ab8500_fg *di = power_supply_get_drvdata(psy);
reg_value = simple_strtoul(buf, NULL, 10);
if (reg_value > 0x7F) {
int ret;
u8 reg_value;
struct power_supply *psy = dev_get_drvdata(dev);
- struct ab8500_fg *di;
-
- di = to_ab8500_fg_device_info(psy);
+ struct ab8500_fg *di = power_supply_get_drvdata(psy);
ret = abx500_get_register_interruptible(di->dev, AB8500_RTC,
AB8505_RTC_PCUT_RESTART_REG, ®_value);
int ret;
int reg_value;
struct power_supply *psy = dev_get_drvdata(dev);
- struct ab8500_fg *di;
-
- di = to_ab8500_fg_device_info(psy);
+ struct ab8500_fg *di = power_supply_get_drvdata(psy);
reg_value = simple_strtoul(buf, NULL, 10);
if (reg_value > 0xF) {
int ret;
u8 reg_value;
struct power_supply *psy = dev_get_drvdata(dev);
- struct ab8500_fg *di;
-
- di = to_ab8500_fg_device_info(psy);
+ struct ab8500_fg *di = power_supply_get_drvdata(psy);
ret = abx500_get_register_interruptible(di->dev, AB8500_RTC,
AB8505_RTC_PCUT_TIME_REG, ®_value);
int ret;
u8 reg_value;
struct power_supply *psy = dev_get_drvdata(dev);
- struct ab8500_fg *di;
-
- di = to_ab8500_fg_device_info(psy);
+ struct ab8500_fg *di = power_supply_get_drvdata(psy);
ret = abx500_get_register_interruptible(di->dev, AB8500_RTC,
AB8505_RTC_PCUT_RESTART_REG, ®_value);
int ret;
u8 reg_value;
struct power_supply *psy = dev_get_drvdata(dev);
- struct ab8500_fg *di;
-
- di = to_ab8500_fg_device_info(psy);
+ struct ab8500_fg *di = power_supply_get_drvdata(psy);
ret = abx500_get_register_interruptible(di->dev, AB8500_RTC,
AB8505_RTC_PCUT_CTL_STATUS_REG, ®_value);
int ret;
int reg_value;
struct power_supply *psy = dev_get_drvdata(dev);
- struct ab8500_fg *di;
-
- di = to_ab8500_fg_device_info(psy);
+ struct ab8500_fg *di = power_supply_get_drvdata(psy);
reg_value = simple_strtoul(buf, NULL, 10);
if (reg_value > 0x1) {
int ret;
u8 reg_value;
struct power_supply *psy = dev_get_drvdata(dev);
- struct ab8500_fg *di;
-
- di = to_ab8500_fg_device_info(psy);
+ struct ab8500_fg *di = power_supply_get_drvdata(psy);
ret = abx500_get_register_interruptible(di->dev, AB8500_RTC,
AB8505_RTC_PCUT_CTL_STATUS_REG, ®_value);
int ret;
u8 reg_value;
struct power_supply *psy = dev_get_drvdata(dev);
- struct ab8500_fg *di;
-
- di = to_ab8500_fg_device_info(psy);
+ struct ab8500_fg *di = power_supply_get_drvdata(psy);
ret = abx500_get_register_interruptible(di->dev, AB8500_RTC,
AB8505_RTC_PCUT_DEBOUNCE_REG, ®_value);
int ret;
int reg_value;
struct power_supply *psy = dev_get_drvdata(dev);
- struct ab8500_fg *di;
-
- di = to_ab8500_fg_device_info(psy);
+ struct ab8500_fg *di = power_supply_get_drvdata(psy);
reg_value = simple_strtoul(buf, NULL, 10);
if (reg_value > 0x7) {
int ret;
u8 reg_value;
struct power_supply *psy = dev_get_drvdata(dev);
- struct ab8500_fg *di;
-
- di = to_ab8500_fg_device_info(psy);
+ struct ab8500_fg *di = power_supply_get_drvdata(psy);
ret = abx500_get_register_interruptible(di->dev, AB8500_RTC,
AB8505_RTC_PCUT_CTL_STATUS_REG, ®_value);
ab8505_powercut_enable_status_read, NULL),
};
-static int ab8500_fg_sysfs_psy_create_attrs(struct device *dev)
+static int ab8500_fg_sysfs_psy_create_attrs(struct ab8500_fg *di)
{
unsigned int i;
- struct power_supply *psy = dev_get_drvdata(dev);
- struct ab8500_fg *di;
-
- di = to_ab8500_fg_device_info(psy);
if (((is_ab8505(di->parent) || is_ab9540(di->parent)) &&
- abx500_get_chip_id(dev->parent) >= AB8500_CUT2P0)
+ abx500_get_chip_id(di->dev) >= AB8500_CUT2P0)
|| is_ab8540(di->parent)) {
for (i = 0; i < ARRAY_SIZE(ab8505_fg_sysfs_psy_attrs); i++)
- if (device_create_file(dev,
+ if (device_create_file(&di->fg_psy->dev,
&ab8505_fg_sysfs_psy_attrs[i]))
goto sysfs_psy_create_attrs_failed_ab8505;
}
return 0;
sysfs_psy_create_attrs_failed_ab8505:
- dev_err(dev, "Failed creating sysfs psy attrs for ab8505.\n");
+ dev_err(&di->fg_psy->dev, "Failed creating sysfs psy attrs for ab8505.\n");
while (i--)
- device_remove_file(dev, &ab8505_fg_sysfs_psy_attrs[i]);
+ device_remove_file(&di->fg_psy->dev,
+ &ab8505_fg_sysfs_psy_attrs[i]);
return -EIO;
}
-static void ab8500_fg_sysfs_psy_remove_attrs(struct device *dev)
+static void ab8500_fg_sysfs_psy_remove_attrs(struct ab8500_fg *di)
{
unsigned int i;
- struct power_supply *psy = dev_get_drvdata(dev);
- struct ab8500_fg *di;
-
- di = to_ab8500_fg_device_info(psy);
if (((is_ab8505(di->parent) || is_ab9540(di->parent)) &&
- abx500_get_chip_id(dev->parent) >= AB8500_CUT2P0)
+ abx500_get_chip_id(di->dev) >= AB8500_CUT2P0)
|| is_ab8540(di->parent)) {
for (i = 0; i < ARRAY_SIZE(ab8505_fg_sysfs_psy_attrs); i++)
- (void)device_remove_file(dev, &ab8505_fg_sysfs_psy_attrs[i]);
+ (void)device_remove_file(&di->fg_psy->dev,
+ &ab8505_fg_sysfs_psy_attrs[i]);
}
}
ab8500_fg_sysfs_exit(di);
flush_scheduled_work();
- ab8500_fg_sysfs_psy_remove_attrs(di->fg_psy.dev);
- power_supply_unregister(&di->fg_psy);
+ ab8500_fg_sysfs_psy_remove_attrs(di);
+ power_supply_unregister(di->fg_psy);
return ret;
}
/* ab8500 fg driver interrupts and their respective isr */
-static struct ab8500_fg_interrupts ab8500_fg_irq[] = {
+static struct ab8500_fg_interrupts ab8500_fg_irq_th[] = {
{"NCONV_ACCU", ab8500_fg_cc_convend_handler},
{"BATT_OVV", ab8500_fg_batt_ovv_handler},
{"LOW_BAT_F", ab8500_fg_lowbatf_handler},
{"CC_INT_CALIB", ab8500_fg_cc_int_calib_handler},
+};
+
+static struct ab8500_fg_interrupts ab8500_fg_irq_bh[] = {
{"CCEOC", ab8500_fg_cc_data_end_handler},
};
"ab8500_usb",
};
+static const struct power_supply_desc ab8500_fg_desc = {
+ .name = "ab8500_fg",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = ab8500_fg_props,
+ .num_properties = ARRAY_SIZE(ab8500_fg_props),
+ .get_property = ab8500_fg_get_property,
+ .external_power_changed = ab8500_fg_external_power_changed,
+};
+
static int ab8500_fg_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
struct abx500_bm_data *plat = pdev->dev.platform_data;
+ struct power_supply_config psy_cfg = {};
struct ab8500_fg *di;
int i, irq;
int ret = 0;
di->parent = dev_get_drvdata(pdev->dev.parent);
di->gpadc = ab8500_gpadc_get("ab8500-gpadc.0");
- di->fg_psy.name = "ab8500_fg";
- di->fg_psy.type = POWER_SUPPLY_TYPE_BATTERY;
- di->fg_psy.properties = ab8500_fg_props;
- di->fg_psy.num_properties = ARRAY_SIZE(ab8500_fg_props);
- di->fg_psy.get_property = ab8500_fg_get_property;
- di->fg_psy.supplied_to = supply_interface;
- di->fg_psy.num_supplicants = ARRAY_SIZE(supply_interface),
- di->fg_psy.external_power_changed = ab8500_fg_external_power_changed;
+ psy_cfg.supplied_to = supply_interface;
+ psy_cfg.num_supplicants = ARRAY_SIZE(supply_interface);
+ psy_cfg.drv_data = di;
di->bat_cap.max_mah_design = MILLI_TO_MICRO *
di->bm->bat_type[di->bm->batt_id].charge_full_design;
di->flags.batt_id_received = false;
/* Register FG power supply class */
- ret = power_supply_register(di->dev, &di->fg_psy);
- if (ret) {
+ di->fg_psy = power_supply_register(di->dev, &ab8500_fg_desc, &psy_cfg);
+ if (IS_ERR(di->fg_psy)) {
dev_err(di->dev, "failed to register FG psy\n");
+ ret = PTR_ERR(di->fg_psy);
goto free_inst_curr_wq;
}
init_completion(&di->ab8500_fg_started);
init_completion(&di->ab8500_fg_complete);
- /* Register interrupts */
- for (i = 0; i < ARRAY_SIZE(ab8500_fg_irq); i++) {
- irq = platform_get_irq_byname(pdev, ab8500_fg_irq[i].name);
- ret = request_threaded_irq(irq, NULL, ab8500_fg_irq[i].isr,
- IRQF_SHARED | IRQF_NO_SUSPEND,
- ab8500_fg_irq[i].name, di);
+ /* Register primary interrupt handlers */
+ for (i = 0; i < ARRAY_SIZE(ab8500_fg_irq_th); i++) {
+ irq = platform_get_irq_byname(pdev, ab8500_fg_irq_th[i].name);
+ ret = request_irq(irq, ab8500_fg_irq_th[i].isr,
+ IRQF_SHARED | IRQF_NO_SUSPEND,
+ ab8500_fg_irq_th[i].name, di);
if (ret != 0) {
- dev_err(di->dev, "failed to request %s IRQ %d: %d\n"
- , ab8500_fg_irq[i].name, irq, ret);
+ dev_err(di->dev, "failed to request %s IRQ %d: %d\n",
+ ab8500_fg_irq_th[i].name, irq, ret);
goto free_irq;
}
dev_dbg(di->dev, "Requested %s IRQ %d: %d\n",
- ab8500_fg_irq[i].name, irq, ret);
+ ab8500_fg_irq_th[i].name, irq, ret);
}
+
+ /* Register threaded interrupt handler */
+ irq = platform_get_irq_byname(pdev, ab8500_fg_irq_bh[0].name);
+ ret = request_threaded_irq(irq, NULL, ab8500_fg_irq_bh[0].isr,
+ IRQF_SHARED | IRQF_NO_SUSPEND | IRQF_ONESHOT,
+ ab8500_fg_irq_bh[0].name, di);
+
+ if (ret != 0) {
+ dev_err(di->dev, "failed to request %s IRQ %d: %d\n",
+ ab8500_fg_irq_bh[0].name, irq, ret);
+ goto free_irq;
+ }
+ dev_dbg(di->dev, "Requested %s IRQ %d: %d\n",
+ ab8500_fg_irq_bh[0].name, irq, ret);
+
di->irq = platform_get_irq_byname(pdev, "CCEOC");
disable_irq(di->irq);
di->nbr_cceoc_irq_cnt = 0;
goto free_irq;
}
- ret = ab8500_fg_sysfs_psy_create_attrs(di->fg_psy.dev);
+ ret = ab8500_fg_sysfs_psy_create_attrs(di);
if (ret) {
dev_err(di->dev, "failed to create FG psy\n");
ab8500_fg_sysfs_exit(di);
return ret;
free_irq:
- power_supply_unregister(&di->fg_psy);
+ power_supply_unregister(di->fg_psy);
- /* We also have to free all successfully registered irqs */
- for (i = i - 1; i >= 0; i--) {
- irq = platform_get_irq_byname(pdev, ab8500_fg_irq[i].name);
+ /* We also have to free all registered irqs */
+ for (i = 0; i < ARRAY_SIZE(ab8500_fg_irq_th); i++) {
+ irq = platform_get_irq_byname(pdev, ab8500_fg_irq_th[i].name);
free_irq(irq, di);
}
+ irq = platform_get_irq_byname(pdev, ab8500_fg_irq_bh[0].name);
+ free_irq(irq, di);
free_inst_curr_wq:
destroy_workqueue(di->fg_wq);
return ret;
#define CHARGALG_CURR_STEP_LOW 0
#define CHARGALG_CURR_STEP_HIGH 100
-#define to_abx500_chargalg_device_info(x) container_of((x), \
- struct abx500_chargalg, chargalg_psy);
-
enum abx500_chargers {
NO_CHG,
AC_CHG,
struct ab8500 *parent;
struct abx500_chargalg_current_step_status curr_status;
struct abx500_bm_data *bm;
- struct power_supply chargalg_psy;
+ struct power_supply *chargalg_psy;
struct ux500_charger *ac_chg;
struct ux500_charger *usb_chg;
struct abx500_chargalg_events events;
di->charge_status = POWER_SUPPLY_STATUS_NOT_CHARGING;
di->maintenance_chg = false;
cancel_delayed_work(&di->chargalg_wd_work);
- power_supply_changed(&di->chargalg_psy);
+ power_supply_changed(di->chargalg_psy);
}
/**
di->charge_status = POWER_SUPPLY_STATUS_CHARGING;
di->maintenance_chg = false;
cancel_delayed_work(&di->chargalg_wd_work);
- power_supply_changed(&di->chargalg_psy);
+ power_supply_changed(di->chargalg_psy);
}
/**
di->charge_status = POWER_SUPPLY_STATUS_FULL;
di->maintenance_chg = true;
dev_dbg(di->dev, "EOC reached!\n");
- power_supply_changed(&di->chargalg_psy);
+ power_supply_changed(di->chargalg_psy);
} else {
dev_dbg(di->dev,
" EOC limit reached for the %d"
psy = (struct power_supply *)data;
ext = dev_get_drvdata(dev);
- di = to_abx500_chargalg_device_info(psy);
+ di = power_supply_get_drvdata(psy);
/* For all psy where the driver name appears in any supplied_to */
for (i = 0; i < ext->num_supplicants; i++) {
- if (!strcmp(ext->supplied_to[i], psy->name))
+ if (!strcmp(ext->supplied_to[i], psy->desc->name))
psy_found = true;
}
if (!psy_found)
* property because of handling that sysfs entry on its own, this is
* the place to get the battery capacity.
*/
- if (!ext->get_property(ext, POWER_SUPPLY_PROP_CAPACITY, &ret)) {
+ if (!power_supply_get_property(ext, POWER_SUPPLY_PROP_CAPACITY, &ret)) {
di->batt_data.percent = ret.intval;
capacity_updated = true;
}
/* Go through all properties for the psy */
- for (j = 0; j < ext->num_properties; j++) {
+ for (j = 0; j < ext->desc->num_properties; j++) {
enum power_supply_property prop;
- prop = ext->properties[j];
+ prop = ext->desc->properties[j];
- /* Initialize chargers if not already done */
+ /*
+ * Initialize chargers if not already done.
+ * The ab8500_charger*/
if (!di->ac_chg &&
- ext->type == POWER_SUPPLY_TYPE_MAINS)
+ ext->desc->type == POWER_SUPPLY_TYPE_MAINS)
di->ac_chg = psy_to_ux500_charger(ext);
else if (!di->usb_chg &&
- ext->type == POWER_SUPPLY_TYPE_USB)
+ ext->desc->type == POWER_SUPPLY_TYPE_USB)
di->usb_chg = psy_to_ux500_charger(ext);
- if (ext->get_property(ext, prop, &ret))
+ if (power_supply_get_property(ext, prop, &ret))
continue;
switch (prop) {
case POWER_SUPPLY_PROP_PRESENT:
- switch (ext->type) {
+ switch (ext->desc->type) {
case POWER_SUPPLY_TYPE_BATTERY:
/* Battery present */
if (ret.intval)
break;
case POWER_SUPPLY_PROP_ONLINE:
- switch (ext->type) {
+ switch (ext->desc->type) {
case POWER_SUPPLY_TYPE_BATTERY:
break;
case POWER_SUPPLY_TYPE_MAINS:
break;
case POWER_SUPPLY_PROP_HEALTH:
- switch (ext->type) {
+ switch (ext->desc->type) {
case POWER_SUPPLY_TYPE_BATTERY:
break;
case POWER_SUPPLY_TYPE_MAINS:
break;
case POWER_SUPPLY_PROP_VOLTAGE_NOW:
- switch (ext->type) {
+ switch (ext->desc->type) {
case POWER_SUPPLY_TYPE_BATTERY:
di->batt_data.volt = ret.intval / 1000;
break;
break;
case POWER_SUPPLY_PROP_VOLTAGE_AVG:
- switch (ext->type) {
+ switch (ext->desc->type) {
case POWER_SUPPLY_TYPE_MAINS:
/* AVG is used to indicate when we are
* in CV mode */
break;
case POWER_SUPPLY_PROP_TECHNOLOGY:
- switch (ext->type) {
+ switch (ext->desc->type) {
case POWER_SUPPLY_TYPE_BATTERY:
if (ret.intval)
di->events.batt_unknown = false;
break;
case POWER_SUPPLY_PROP_CURRENT_NOW:
- switch (ext->type) {
+ switch (ext->desc->type) {
case POWER_SUPPLY_TYPE_MAINS:
di->chg_info.ac_curr =
ret.intval / 1000;
break;
case POWER_SUPPLY_PROP_CURRENT_AVG:
- switch (ext->type) {
+ switch (ext->desc->type) {
case POWER_SUPPLY_TYPE_BATTERY:
di->batt_data.avg_curr = ret.intval / 1000;
break;
*/
static void abx500_chargalg_external_power_changed(struct power_supply *psy)
{
- struct abx500_chargalg *di = to_abx500_chargalg_device_info(psy);
+ struct abx500_chargalg *di = power_supply_get_drvdata(psy);
/*
* Trigger execution of the algorithm instantly and read
/* Collect data from all power_supply class devices */
class_for_each_device(power_supply_class, NULL,
- &di->chargalg_psy, abx500_chargalg_get_ext_psy_data);
+ di->chargalg_psy, abx500_chargalg_get_ext_psy_data);
abx500_chargalg_end_of_charge(di);
abx500_chargalg_check_temp(di);
di->charge_status = POWER_SUPPLY_STATUS_NOT_CHARGING;
di->maintenance_chg = false;
abx500_chargalg_state_to(di, STATE_SUSPENDED);
- power_supply_changed(&di->chargalg_psy);
+ power_supply_changed(di->chargalg_psy);
/* Intentional fallthrough */
case STATE_SUSPENDED:
di->charge_status = POWER_SUPPLY_STATUS_CHARGING;
di->eoc_cnt = 0;
di->maintenance_chg = false;
- power_supply_changed(&di->chargalg_psy);
+ power_supply_changed(di->chargalg_psy);
break;
di->bm->bat_type[
di->bm->batt_id].maint_a_cur_lvl);
abx500_chargalg_state_to(di, STATE_MAINTENANCE_A);
- power_supply_changed(&di->chargalg_psy);
+ power_supply_changed(di->chargalg_psy);
/* Intentional fallthrough*/
case STATE_MAINTENANCE_A:
di->bm->bat_type[
di->bm->batt_id].maint_b_cur_lvl);
abx500_chargalg_state_to(di, STATE_MAINTENANCE_B);
- power_supply_changed(&di->chargalg_psy);
+ power_supply_changed(di->chargalg_psy);
/* Intentional fallthrough*/
case STATE_MAINTENANCE_B:
abx500_chargalg_stop_maintenance_timer(di);
di->charge_status = POWER_SUPPLY_STATUS_CHARGING;
abx500_chargalg_state_to(di, STATE_TEMP_LOWHIGH);
- power_supply_changed(&di->chargalg_psy);
+ power_supply_changed(di->chargalg_psy);
/* Intentional fallthrough */
case STATE_TEMP_LOWHIGH:
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct abx500_chargalg *di;
-
- di = to_abx500_chargalg_device_info(psy);
+ struct abx500_chargalg *di = power_supply_get_drvdata(psy);
switch (psp) {
case POWER_SUPPLY_PROP_STATUS:
/* Delete the work queue */
destroy_workqueue(di->chargalg_wq);
- power_supply_unregister(&di->chargalg_psy);
+ power_supply_unregister(di->chargalg_psy);
return 0;
}
"ab8500_fg",
};
+static const struct power_supply_desc abx500_chargalg_desc = {
+ .name = "abx500_chargalg",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = abx500_chargalg_props,
+ .num_properties = ARRAY_SIZE(abx500_chargalg_props),
+ .get_property = abx500_chargalg_get_property,
+ .external_power_changed = abx500_chargalg_external_power_changed,
+};
+
static int abx500_chargalg_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
struct abx500_bm_data *plat = pdev->dev.platform_data;
+ struct power_supply_config psy_cfg = {};
struct abx500_chargalg *di;
int ret = 0;
di->dev = &pdev->dev;
di->parent = dev_get_drvdata(pdev->dev.parent);
- /* chargalg supply */
- di->chargalg_psy.name = "abx500_chargalg";
- di->chargalg_psy.type = POWER_SUPPLY_TYPE_BATTERY;
- di->chargalg_psy.properties = abx500_chargalg_props;
- di->chargalg_psy.num_properties = ARRAY_SIZE(abx500_chargalg_props);
- di->chargalg_psy.get_property = abx500_chargalg_get_property;
- di->chargalg_psy.supplied_to = supply_interface;
- di->chargalg_psy.num_supplicants = ARRAY_SIZE(supply_interface),
- di->chargalg_psy.external_power_changed =
- abx500_chargalg_external_power_changed;
+ psy_cfg.supplied_to = supply_interface;
+ psy_cfg.num_supplicants = ARRAY_SIZE(supply_interface);
+ psy_cfg.drv_data = di;
/* Initilialize safety timer */
hrtimer_init(&di->safety_timer, CLOCK_REALTIME, HRTIMER_MODE_ABS);
di->chg_info.prev_conn_chg = -1;
/* Register chargalg power supply class */
- ret = power_supply_register(di->dev, &di->chargalg_psy);
- if (ret) {
+ di->chargalg_psy = power_supply_register(di->dev, &abx500_chargalg_desc,
+ &psy_cfg);
+ if (IS_ERR(di->chargalg_psy)) {
dev_err(di->dev, "failed to register chargalg psy\n");
+ ret = PTR_ERR(di->chargalg_psy);
goto free_chargalg_wq;
}
return ret;
free_psy:
- power_supply_unregister(&di->chargalg_psy);
+ power_supply_unregister(di->chargalg_psy);
free_chargalg_wq:
destroy_workqueue(di->chargalg_wq);
return ret;
#include <linux/apm-emulation.h>
-#define PSY_PROP(psy, prop, val) (psy->get_property(psy, \
+#define PSY_PROP(psy, prop, val) (power_supply_get_property(psy, \
POWER_SUPPLY_PROP_##prop, val))
-#define _MPSY_PROP(prop, val) (main_battery->get_property(main_battery, \
+#define _MPSY_PROP(prop, val) (power_supply_get_property(main_battery, \
prop, val))
#define MPSY_PROP(prop, val) _MPSY_PROP(POWER_SUPPLY_PROP_##prop, val)
bp->bat = dev_get_drvdata(dev);
- if (bp->bat->use_for_apm) {
+ if (bp->bat->desc->use_for_apm) {
/* nice, we explicitly asked to report this battery. */
bp->main = bp->bat;
return 1;
--- /dev/null
+/*
+ * axp288_fuel_gauge.c - Xpower AXP288 PMIC Fuel Gauge Driver
+ *
+ * Copyright (C) 2014 Intel Corporation
+ *
+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/regmap.h>
+#include <linux/jiffies.h>
+#include <linux/interrupt.h>
+#include <linux/device.h>
+#include <linux/workqueue.h>
+#include <linux/mfd/axp20x.h>
+#include <linux/platform_device.h>
+#include <linux/power_supply.h>
+#include <linux/iio/consumer.h>
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
+
+#define CHRG_STAT_BAT_SAFE_MODE (1 << 3)
+#define CHRG_STAT_BAT_VALID (1 << 4)
+#define CHRG_STAT_BAT_PRESENT (1 << 5)
+#define CHRG_STAT_CHARGING (1 << 6)
+#define CHRG_STAT_PMIC_OTP (1 << 7)
+
+#define CHRG_CCCV_CC_MASK 0xf /* 4 bits */
+#define CHRG_CCCV_CC_BIT_POS 0
+#define CHRG_CCCV_CC_OFFSET 200 /* 200mA */
+#define CHRG_CCCV_CC_LSB_RES 200 /* 200mA */
+#define CHRG_CCCV_ITERM_20P (1 << 4) /* 20% of CC */
+#define CHRG_CCCV_CV_MASK 0x60 /* 2 bits */
+#define CHRG_CCCV_CV_BIT_POS 5
+#define CHRG_CCCV_CV_4100MV 0x0 /* 4.10V */
+#define CHRG_CCCV_CV_4150MV 0x1 /* 4.15V */
+#define CHRG_CCCV_CV_4200MV 0x2 /* 4.20V */
+#define CHRG_CCCV_CV_4350MV 0x3 /* 4.35V */
+#define CHRG_CCCV_CHG_EN (1 << 7)
+
+#define CV_4100 4100 /* 4100mV */
+#define CV_4150 4150 /* 4150mV */
+#define CV_4200 4200 /* 4200mV */
+#define CV_4350 4350 /* 4350mV */
+
+#define TEMP_IRQ_CFG_QWBTU (1 << 0)
+#define TEMP_IRQ_CFG_WBTU (1 << 1)
+#define TEMP_IRQ_CFG_QWBTO (1 << 2)
+#define TEMP_IRQ_CFG_WBTO (1 << 3)
+#define TEMP_IRQ_CFG_MASK 0xf
+
+#define FG_IRQ_CFG_LOWBATT_WL2 (1 << 0)
+#define FG_IRQ_CFG_LOWBATT_WL1 (1 << 1)
+#define FG_IRQ_CFG_LOWBATT_MASK 0x3
+#define LOWBAT_IRQ_STAT_LOWBATT_WL2 (1 << 0)
+#define LOWBAT_IRQ_STAT_LOWBATT_WL1 (1 << 1)
+
+#define FG_CNTL_OCV_ADJ_STAT (1 << 2)
+#define FG_CNTL_OCV_ADJ_EN (1 << 3)
+#define FG_CNTL_CAP_ADJ_STAT (1 << 4)
+#define FG_CNTL_CAP_ADJ_EN (1 << 5)
+#define FG_CNTL_CC_EN (1 << 6)
+#define FG_CNTL_GAUGE_EN (1 << 7)
+
+#define FG_REP_CAP_VALID (1 << 7)
+#define FG_REP_CAP_VAL_MASK 0x7F
+
+#define FG_DES_CAP1_VALID (1 << 7)
+#define FG_DES_CAP1_VAL_MASK 0x7F
+#define FG_DES_CAP0_VAL_MASK 0xFF
+#define FG_DES_CAP_RES_LSB 1456 /* 1.456mAhr */
+
+#define FG_CC_MTR1_VALID (1 << 7)
+#define FG_CC_MTR1_VAL_MASK 0x7F
+#define FG_CC_MTR0_VAL_MASK 0xFF
+#define FG_DES_CC_RES_LSB 1456 /* 1.456mAhr */
+
+#define FG_OCV_CAP_VALID (1 << 7)
+#define FG_OCV_CAP_VAL_MASK 0x7F
+#define FG_CC_CAP_VALID (1 << 7)
+#define FG_CC_CAP_VAL_MASK 0x7F
+
+#define FG_LOW_CAP_THR1_MASK 0xf0 /* 5% tp 20% */
+#define FG_LOW_CAP_THR1_VAL 0xa0 /* 15 perc */
+#define FG_LOW_CAP_THR2_MASK 0x0f /* 0% to 15% */
+#define FG_LOW_CAP_WARN_THR 14 /* 14 perc */
+#define FG_LOW_CAP_CRIT_THR 4 /* 4 perc */
+#define FG_LOW_CAP_SHDN_THR 0 /* 0 perc */
+
+#define STATUS_MON_DELAY_JIFFIES (HZ * 60) /*60 sec */
+#define NR_RETRY_CNT 3
+#define DEV_NAME "axp288_fuel_gauge"
+
+/* 1.1mV per LSB expressed in uV */
+#define VOLTAGE_FROM_ADC(a) ((a * 11) / 10)
+/* properties converted to tenths of degrees, uV, uA, uW */
+#define PROP_TEMP(a) ((a) * 10)
+#define UNPROP_TEMP(a) ((a) / 10)
+#define PROP_VOLT(a) ((a) * 1000)
+#define PROP_CURR(a) ((a) * 1000)
+
+#define AXP288_FG_INTR_NUM 6
+enum {
+ QWBTU_IRQ = 0,
+ WBTU_IRQ,
+ QWBTO_IRQ,
+ WBTO_IRQ,
+ WL2_IRQ,
+ WL1_IRQ,
+};
+
+struct axp288_fg_info {
+ struct platform_device *pdev;
+ struct axp20x_fg_pdata *pdata;
+ struct regmap *regmap;
+ struct regmap_irq_chip_data *regmap_irqc;
+ int irq[AXP288_FG_INTR_NUM];
+ struct power_supply *bat;
+ struct mutex lock;
+ int status;
+ struct delayed_work status_monitor;
+ struct dentry *debug_file;
+};
+
+static enum power_supply_property fuel_gauge_props[] = {
+ POWER_SUPPLY_PROP_STATUS,
+ POWER_SUPPLY_PROP_PRESENT,
+ POWER_SUPPLY_PROP_HEALTH,
+ POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
+ POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
+ POWER_SUPPLY_PROP_VOLTAGE_NOW,
+ POWER_SUPPLY_PROP_VOLTAGE_OCV,
+ POWER_SUPPLY_PROP_CURRENT_NOW,
+ POWER_SUPPLY_PROP_CAPACITY,
+ POWER_SUPPLY_PROP_CAPACITY_ALERT_MIN,
+ POWER_SUPPLY_PROP_TEMP,
+ POWER_SUPPLY_PROP_TEMP_MAX,
+ POWER_SUPPLY_PROP_TEMP_MIN,
+ POWER_SUPPLY_PROP_TEMP_ALERT_MIN,
+ POWER_SUPPLY_PROP_TEMP_ALERT_MAX,
+ POWER_SUPPLY_PROP_TECHNOLOGY,
+ POWER_SUPPLY_PROP_CHARGE_FULL,
+ POWER_SUPPLY_PROP_CHARGE_NOW,
+ POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
+ POWER_SUPPLY_PROP_MODEL_NAME,
+};
+
+static int fuel_gauge_reg_readb(struct axp288_fg_info *info, int reg)
+{
+ int ret, i;
+ unsigned int val;
+
+ for (i = 0; i < NR_RETRY_CNT; i++) {
+ ret = regmap_read(info->regmap, reg, &val);
+ if (ret == -EBUSY)
+ continue;
+ else
+ break;
+ }
+
+ if (ret < 0)
+ dev_err(&info->pdev->dev, "axp288 reg read err:%d\n", ret);
+
+ return val;
+}
+
+static int fuel_gauge_reg_writeb(struct axp288_fg_info *info, int reg, u8 val)
+{
+ int ret;
+
+ ret = regmap_write(info->regmap, reg, (unsigned int)val);
+
+ if (ret < 0)
+ dev_err(&info->pdev->dev, "axp288 reg write err:%d\n", ret);
+
+ return ret;
+}
+
+static int pmic_read_adc_val(const char *name, int *raw_val,
+ struct axp288_fg_info *info)
+{
+ int ret, val = 0;
+ struct iio_channel *indio_chan;
+
+ indio_chan = iio_channel_get(NULL, name);
+ if (IS_ERR_OR_NULL(indio_chan)) {
+ ret = PTR_ERR(indio_chan);
+ goto exit;
+ }
+ ret = iio_read_channel_raw(indio_chan, &val);
+ if (ret < 0) {
+ dev_err(&info->pdev->dev,
+ "IIO channel read error: %x, %x\n", ret, val);
+ goto err_exit;
+ }
+
+ dev_dbg(&info->pdev->dev, "adc raw val=%x\n", val);
+ *raw_val = val;
+
+err_exit:
+ iio_channel_release(indio_chan);
+exit:
+ return ret;
+}
+
+#ifdef CONFIG_DEBUG_FS
+static int fuel_gauge_debug_show(struct seq_file *s, void *data)
+{
+ struct axp288_fg_info *info = s->private;
+ int raw_val, ret;
+
+ seq_printf(s, " PWR_STATUS[%02x] : %02x\n",
+ AXP20X_PWR_INPUT_STATUS,
+ fuel_gauge_reg_readb(info, AXP20X_PWR_INPUT_STATUS));
+ seq_printf(s, "PWR_OP_MODE[%02x] : %02x\n",
+ AXP20X_PWR_OP_MODE,
+ fuel_gauge_reg_readb(info, AXP20X_PWR_OP_MODE));
+ seq_printf(s, " CHRG_CTRL1[%02x] : %02x\n",
+ AXP20X_CHRG_CTRL1,
+ fuel_gauge_reg_readb(info, AXP20X_CHRG_CTRL1));
+ seq_printf(s, " VLTF[%02x] : %02x\n",
+ AXP20X_V_LTF_DISCHRG,
+ fuel_gauge_reg_readb(info, AXP20X_V_LTF_DISCHRG));
+ seq_printf(s, " VHTF[%02x] : %02x\n",
+ AXP20X_V_HTF_DISCHRG,
+ fuel_gauge_reg_readb(info, AXP20X_V_HTF_DISCHRG));
+ seq_printf(s, " CC_CTRL[%02x] : %02x\n",
+ AXP20X_CC_CTRL,
+ fuel_gauge_reg_readb(info, AXP20X_CC_CTRL));
+ seq_printf(s, "BATTERY CAP[%02x] : %02x\n",
+ AXP20X_FG_RES,
+ fuel_gauge_reg_readb(info, AXP20X_FG_RES));
+ seq_printf(s, " FG_RDC1[%02x] : %02x\n",
+ AXP288_FG_RDC1_REG,
+ fuel_gauge_reg_readb(info, AXP288_FG_RDC1_REG));
+ seq_printf(s, " FG_RDC0[%02x] : %02x\n",
+ AXP288_FG_RDC0_REG,
+ fuel_gauge_reg_readb(info, AXP288_FG_RDC0_REG));
+ seq_printf(s, " FG_OCVH[%02x] : %02x\n",
+ AXP288_FG_OCVH_REG,
+ fuel_gauge_reg_readb(info, AXP288_FG_OCVH_REG));
+ seq_printf(s, " FG_OCVL[%02x] : %02x\n",
+ AXP288_FG_OCVL_REG,
+ fuel_gauge_reg_readb(info, AXP288_FG_OCVL_REG));
+ seq_printf(s, "FG_DES_CAP1[%02x] : %02x\n",
+ AXP288_FG_DES_CAP1_REG,
+ fuel_gauge_reg_readb(info, AXP288_FG_DES_CAP1_REG));
+ seq_printf(s, "FG_DES_CAP0[%02x] : %02x\n",
+ AXP288_FG_DES_CAP0_REG,
+ fuel_gauge_reg_readb(info, AXP288_FG_DES_CAP0_REG));
+ seq_printf(s, " FG_CC_MTR1[%02x] : %02x\n",
+ AXP288_FG_CC_MTR1_REG,
+ fuel_gauge_reg_readb(info, AXP288_FG_CC_MTR1_REG));
+ seq_printf(s, " FG_CC_MTR0[%02x] : %02x\n",
+ AXP288_FG_CC_MTR0_REG,
+ fuel_gauge_reg_readb(info, AXP288_FG_CC_MTR0_REG));
+ seq_printf(s, " FG_OCV_CAP[%02x] : %02x\n",
+ AXP288_FG_OCV_CAP_REG,
+ fuel_gauge_reg_readb(info, AXP288_FG_OCV_CAP_REG));
+ seq_printf(s, " FG_CC_CAP[%02x] : %02x\n",
+ AXP288_FG_CC_CAP_REG,
+ fuel_gauge_reg_readb(info, AXP288_FG_CC_CAP_REG));
+ seq_printf(s, " FG_LOW_CAP[%02x] : %02x\n",
+ AXP288_FG_LOW_CAP_REG,
+ fuel_gauge_reg_readb(info, AXP288_FG_LOW_CAP_REG));
+ seq_printf(s, "TUNING_CTL0[%02x] : %02x\n",
+ AXP288_FG_TUNE0,
+ fuel_gauge_reg_readb(info, AXP288_FG_TUNE0));
+ seq_printf(s, "TUNING_CTL1[%02x] : %02x\n",
+ AXP288_FG_TUNE1,
+ fuel_gauge_reg_readb(info, AXP288_FG_TUNE1));
+ seq_printf(s, "TUNING_CTL2[%02x] : %02x\n",
+ AXP288_FG_TUNE2,
+ fuel_gauge_reg_readb(info, AXP288_FG_TUNE2));
+ seq_printf(s, "TUNING_CTL3[%02x] : %02x\n",
+ AXP288_FG_TUNE3,
+ fuel_gauge_reg_readb(info, AXP288_FG_TUNE3));
+ seq_printf(s, "TUNING_CTL4[%02x] : %02x\n",
+ AXP288_FG_TUNE4,
+ fuel_gauge_reg_readb(info, AXP288_FG_TUNE4));
+ seq_printf(s, "TUNING_CTL5[%02x] : %02x\n",
+ AXP288_FG_TUNE5,
+ fuel_gauge_reg_readb(info, AXP288_FG_TUNE5));
+
+ ret = pmic_read_adc_val("axp288-batt-temp", &raw_val, info);
+ if (ret >= 0)
+ seq_printf(s, "axp288-batttemp : %d\n", raw_val);
+ ret = pmic_read_adc_val("axp288-pmic-temp", &raw_val, info);
+ if (ret >= 0)
+ seq_printf(s, "axp288-pmictemp : %d\n", raw_val);
+ ret = pmic_read_adc_val("axp288-system-temp", &raw_val, info);
+ if (ret >= 0)
+ seq_printf(s, "axp288-systtemp : %d\n", raw_val);
+ ret = pmic_read_adc_val("axp288-chrg-curr", &raw_val, info);
+ if (ret >= 0)
+ seq_printf(s, "axp288-chrgcurr : %d\n", raw_val);
+ ret = pmic_read_adc_val("axp288-chrg-d-curr", &raw_val, info);
+ if (ret >= 0)
+ seq_printf(s, "axp288-dchrgcur : %d\n", raw_val);
+ ret = pmic_read_adc_val("axp288-batt-volt", &raw_val, info);
+ if (ret >= 0)
+ seq_printf(s, "axp288-battvolt : %d\n", raw_val);
+
+ return 0;
+}
+
+static int debug_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, fuel_gauge_debug_show, inode->i_private);
+}
+
+static const struct file_operations fg_debug_fops = {
+ .open = debug_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
+static void fuel_gauge_create_debugfs(struct axp288_fg_info *info)
+{
+ info->debug_file = debugfs_create_file("fuelgauge", 0666, NULL,
+ info, &fg_debug_fops);
+}
+
+static void fuel_gauge_remove_debugfs(struct axp288_fg_info *info)
+{
+ debugfs_remove(info->debug_file);
+}
+#else
+static inline void fuel_gauge_create_debugfs(struct axp288_fg_info *info)
+{
+}
+static inline void fuel_gauge_remove_debugfs(struct axp288_fg_info *info)
+{
+}
+#endif
+
+static void fuel_gauge_get_status(struct axp288_fg_info *info)
+{
+ int pwr_stat, ret;
+ int charge, discharge;
+
+ pwr_stat = fuel_gauge_reg_readb(info, AXP20X_PWR_INPUT_STATUS);
+ if (pwr_stat < 0) {
+ dev_err(&info->pdev->dev,
+ "PWR STAT read failed:%d\n", pwr_stat);
+ return;
+ }
+ ret = pmic_read_adc_val("axp288-chrg-curr", &charge, info);
+ if (ret < 0) {
+ dev_err(&info->pdev->dev,
+ "ADC charge current read failed:%d\n", ret);
+ return;
+ }
+ ret = pmic_read_adc_val("axp288-chrg-d-curr", &discharge, info);
+ if (ret < 0) {
+ dev_err(&info->pdev->dev,
+ "ADC discharge current read failed:%d\n", ret);
+ return;
+ }
+
+ if (charge > 0)
+ info->status = POWER_SUPPLY_STATUS_CHARGING;
+ else if (discharge > 0)
+ info->status = POWER_SUPPLY_STATUS_DISCHARGING;
+ else {
+ if (pwr_stat & CHRG_STAT_BAT_PRESENT)
+ info->status = POWER_SUPPLY_STATUS_FULL;
+ else
+ info->status = POWER_SUPPLY_STATUS_NOT_CHARGING;
+ }
+}
+
+static int fuel_gauge_get_vbatt(struct axp288_fg_info *info, int *vbatt)
+{
+ int ret = 0, raw_val;
+
+ ret = pmic_read_adc_val("axp288-batt-volt", &raw_val, info);
+ if (ret < 0)
+ goto vbatt_read_fail;
+
+ *vbatt = VOLTAGE_FROM_ADC(raw_val);
+vbatt_read_fail:
+ return ret;
+}
+
+static int fuel_gauge_get_current(struct axp288_fg_info *info, int *cur)
+{
+ int ret, value = 0;
+ int charge, discharge;
+
+ ret = pmic_read_adc_val("axp288-chrg-curr", &charge, info);
+ if (ret < 0)
+ goto current_read_fail;
+ ret = pmic_read_adc_val("axp288-chrg-d-curr", &discharge, info);
+ if (ret < 0)
+ goto current_read_fail;
+
+ if (charge > 0)
+ value = charge;
+ else if (discharge > 0)
+ value = -1 * discharge;
+
+ *cur = value;
+current_read_fail:
+ return ret;
+}
+
+static int temp_to_adc(struct axp288_fg_info *info, int tval)
+{
+ int rntc = 0, i, ret, adc_val;
+ int rmin, rmax, tmin, tmax;
+ int tcsz = info->pdata->tcsz;
+
+ /* get the Rntc resitance value for this temp */
+ if (tval > info->pdata->thermistor_curve[0][1]) {
+ rntc = info->pdata->thermistor_curve[0][0];
+ } else if (tval <= info->pdata->thermistor_curve[tcsz-1][1]) {
+ rntc = info->pdata->thermistor_curve[tcsz-1][0];
+ } else {
+ for (i = 1; i < tcsz; i++) {
+ if (tval > info->pdata->thermistor_curve[i][1]) {
+ rmin = info->pdata->thermistor_curve[i-1][0];
+ rmax = info->pdata->thermistor_curve[i][0];
+ tmin = info->pdata->thermistor_curve[i-1][1];
+ tmax = info->pdata->thermistor_curve[i][1];
+ rntc = rmin + ((rmax - rmin) *
+ (tval - tmin) / (tmax - tmin));
+ break;
+ }
+ }
+ }
+
+ /* we need the current to calculate the proper adc voltage */
+ ret = fuel_gauge_reg_readb(info, AXP20X_ADC_RATE);
+ if (ret < 0) {
+ dev_err(&info->pdev->dev, "%s:read err:%d\n", __func__, ret);
+ ret = 0x30;
+ }
+
+ /*
+ * temperature is proportional to NTS thermistor resistance
+ * ADC_RATE[5-4] determines current, 00=20uA,01=40uA,10=60uA,11=80uA
+ * [12-bit ADC VAL] = R_NTC(Ω) * current / 800
+ */
+ adc_val = rntc * (20 + (20 * ((ret >> 4) & 0x3))) / 800;
+
+ return adc_val;
+}
+
+static int adc_to_temp(struct axp288_fg_info *info, int adc_val)
+{
+ int ret, r, i, tval = 0;
+ int rmin, rmax, tmin, tmax;
+ int tcsz = info->pdata->tcsz;
+
+ ret = fuel_gauge_reg_readb(info, AXP20X_ADC_RATE);
+ if (ret < 0) {
+ dev_err(&info->pdev->dev, "%s:read err:%d\n", __func__, ret);
+ ret = 0x30;
+ }
+
+ /*
+ * temperature is proportional to NTS thermistor resistance
+ * ADC_RATE[5-4] determines current, 00=20uA,01=40uA,10=60uA,11=80uA
+ * R_NTC(Ω) = [12-bit ADC VAL] * 800 / current
+ */
+ r = adc_val * 800 / (20 + (20 * ((ret >> 4) & 0x3)));
+
+ if (r < info->pdata->thermistor_curve[0][0]) {
+ tval = info->pdata->thermistor_curve[0][1];
+ } else if (r >= info->pdata->thermistor_curve[tcsz-1][0]) {
+ tval = info->pdata->thermistor_curve[tcsz-1][1];
+ } else {
+ for (i = 1; i < tcsz; i++) {
+ if (r < info->pdata->thermistor_curve[i][0]) {
+ rmin = info->pdata->thermistor_curve[i-1][0];
+ rmax = info->pdata->thermistor_curve[i][0];
+ tmin = info->pdata->thermistor_curve[i-1][1];
+ tmax = info->pdata->thermistor_curve[i][1];
+ tval = tmin + ((tmax - tmin) *
+ (r - rmin) / (rmax - rmin));
+ break;
+ }
+ }
+ }
+
+ return tval;
+}
+
+static int fuel_gauge_get_btemp(struct axp288_fg_info *info, int *btemp)
+{
+ int ret, raw_val = 0;
+
+ ret = pmic_read_adc_val("axp288-batt-temp", &raw_val, info);
+ if (ret < 0)
+ goto temp_read_fail;
+
+ *btemp = adc_to_temp(info, raw_val);
+
+temp_read_fail:
+ return ret;
+}
+
+static int fuel_gauge_get_vocv(struct axp288_fg_info *info, int *vocv)
+{
+ int ret, value;
+
+ /* 12-bit data value, upper 8 in OCVH, lower 4 in OCVL */
+ ret = fuel_gauge_reg_readb(info, AXP288_FG_OCVH_REG);
+ if (ret < 0)
+ goto vocv_read_fail;
+ value = ret << 4;
+
+ ret = fuel_gauge_reg_readb(info, AXP288_FG_OCVL_REG);
+ if (ret < 0)
+ goto vocv_read_fail;
+ value |= (ret & 0xf);
+
+ *vocv = VOLTAGE_FROM_ADC(value);
+vocv_read_fail:
+ return ret;
+}
+
+static int fuel_gauge_battery_health(struct axp288_fg_info *info)
+{
+ int temp, vocv;
+ int ret, health = POWER_SUPPLY_HEALTH_UNKNOWN;
+
+ ret = fuel_gauge_get_btemp(info, &temp);
+ if (ret < 0)
+ goto health_read_fail;
+
+ ret = fuel_gauge_get_vocv(info, &vocv);
+ if (ret < 0)
+ goto health_read_fail;
+
+ if (vocv > info->pdata->max_volt)
+ health = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
+ else if (temp > info->pdata->max_temp)
+ health = POWER_SUPPLY_HEALTH_OVERHEAT;
+ else if (temp < info->pdata->min_temp)
+ health = POWER_SUPPLY_HEALTH_COLD;
+ else if (vocv < info->pdata->min_volt)
+ health = POWER_SUPPLY_HEALTH_DEAD;
+ else
+ health = POWER_SUPPLY_HEALTH_GOOD;
+
+health_read_fail:
+ return health;
+}
+
+static int fuel_gauge_set_high_btemp_alert(struct axp288_fg_info *info)
+{
+ int ret, adc_val;
+
+ /* program temperature threshold as 1/16 ADC value */
+ adc_val = temp_to_adc(info, info->pdata->max_temp);
+ ret = fuel_gauge_reg_writeb(info, AXP20X_V_HTF_DISCHRG, adc_val >> 4);
+
+ return ret;
+}
+
+static int fuel_gauge_set_low_btemp_alert(struct axp288_fg_info *info)
+{
+ int ret, adc_val;
+
+ /* program temperature threshold as 1/16 ADC value */
+ adc_val = temp_to_adc(info, info->pdata->min_temp);
+ ret = fuel_gauge_reg_writeb(info, AXP20X_V_LTF_DISCHRG, adc_val >> 4);
+
+ return ret;
+}
+
+static int fuel_gauge_get_property(struct power_supply *ps,
+ enum power_supply_property prop,
+ union power_supply_propval *val)
+{
+ struct axp288_fg_info *info = power_supply_get_drvdata(ps);
+ int ret = 0, value;
+
+ mutex_lock(&info->lock);
+ switch (prop) {
+ case POWER_SUPPLY_PROP_STATUS:
+ fuel_gauge_get_status(info);
+ val->intval = info->status;
+ break;
+ case POWER_SUPPLY_PROP_HEALTH:
+ val->intval = fuel_gauge_battery_health(info);
+ break;
+ case POWER_SUPPLY_PROP_VOLTAGE_NOW:
+ ret = fuel_gauge_get_vbatt(info, &value);
+ if (ret < 0)
+ goto fuel_gauge_read_err;
+ val->intval = PROP_VOLT(value);
+ break;
+ case POWER_SUPPLY_PROP_VOLTAGE_OCV:
+ ret = fuel_gauge_get_vocv(info, &value);
+ if (ret < 0)
+ goto fuel_gauge_read_err;
+ val->intval = PROP_VOLT(value);
+ break;
+ case POWER_SUPPLY_PROP_CURRENT_NOW:
+ ret = fuel_gauge_get_current(info, &value);
+ if (ret < 0)
+ goto fuel_gauge_read_err;
+ val->intval = PROP_CURR(value);
+ break;
+ case POWER_SUPPLY_PROP_PRESENT:
+ ret = fuel_gauge_reg_readb(info, AXP20X_PWR_OP_MODE);
+ if (ret < 0)
+ goto fuel_gauge_read_err;
+
+ if (ret & CHRG_STAT_BAT_PRESENT)
+ val->intval = 1;
+ else
+ val->intval = 0;
+ break;
+ case POWER_SUPPLY_PROP_CAPACITY:
+ ret = fuel_gauge_reg_readb(info, AXP20X_FG_RES);
+ if (ret < 0)
+ goto fuel_gauge_read_err;
+
+ if (!(ret & FG_REP_CAP_VALID))
+ dev_err(&info->pdev->dev,
+ "capacity measurement not valid\n");
+ val->intval = (ret & FG_REP_CAP_VAL_MASK);
+ break;
+ case POWER_SUPPLY_PROP_CAPACITY_ALERT_MIN:
+ ret = fuel_gauge_reg_readb(info, AXP288_FG_LOW_CAP_REG);
+ if (ret < 0)
+ goto fuel_gauge_read_err;
+ val->intval = (ret & 0x0f);
+ break;
+ case POWER_SUPPLY_PROP_TEMP:
+ ret = fuel_gauge_get_btemp(info, &value);
+ if (ret < 0)
+ goto fuel_gauge_read_err;
+ val->intval = PROP_TEMP(value);
+ break;
+ case POWER_SUPPLY_PROP_TEMP_MAX:
+ case POWER_SUPPLY_PROP_TEMP_ALERT_MAX:
+ val->intval = PROP_TEMP(info->pdata->max_temp);
+ break;
+ case POWER_SUPPLY_PROP_TEMP_MIN:
+ case POWER_SUPPLY_PROP_TEMP_ALERT_MIN:
+ val->intval = PROP_TEMP(info->pdata->min_temp);
+ break;
+ case POWER_SUPPLY_PROP_TECHNOLOGY:
+ val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
+ break;
+ case POWER_SUPPLY_PROP_CHARGE_NOW:
+ ret = fuel_gauge_reg_readb(info, AXP288_FG_CC_MTR1_REG);
+ if (ret < 0)
+ goto fuel_gauge_read_err;
+
+ value = (ret & FG_CC_MTR1_VAL_MASK) << 8;
+ ret = fuel_gauge_reg_readb(info, AXP288_FG_CC_MTR0_REG);
+ if (ret < 0)
+ goto fuel_gauge_read_err;
+ value |= (ret & FG_CC_MTR0_VAL_MASK);
+ val->intval = value * FG_DES_CAP_RES_LSB;
+ break;
+ case POWER_SUPPLY_PROP_CHARGE_FULL:
+ ret = fuel_gauge_reg_readb(info, AXP288_FG_DES_CAP1_REG);
+ if (ret < 0)
+ goto fuel_gauge_read_err;
+
+ value = (ret & FG_DES_CAP1_VAL_MASK) << 8;
+ ret = fuel_gauge_reg_readb(info, AXP288_FG_DES_CAP0_REG);
+ if (ret < 0)
+ goto fuel_gauge_read_err;
+ value |= (ret & FG_DES_CAP0_VAL_MASK);
+ val->intval = value * FG_DES_CAP_RES_LSB;
+ break;
+ case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
+ val->intval = PROP_CURR(info->pdata->design_cap);
+ break;
+ case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN:
+ val->intval = PROP_VOLT(info->pdata->max_volt);
+ break;
+ case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
+ val->intval = PROP_VOLT(info->pdata->min_volt);
+ break;
+ case POWER_SUPPLY_PROP_MODEL_NAME:
+ val->strval = info->pdata->battid;
+ break;
+ default:
+ mutex_unlock(&info->lock);
+ return -EINVAL;
+ }
+
+ mutex_unlock(&info->lock);
+ return 0;
+
+fuel_gauge_read_err:
+ mutex_unlock(&info->lock);
+ return ret;
+}
+
+static int fuel_gauge_set_property(struct power_supply *ps,
+ enum power_supply_property prop,
+ const union power_supply_propval *val)
+{
+ struct axp288_fg_info *info = power_supply_get_drvdata(ps);
+ int ret = 0;
+
+ mutex_lock(&info->lock);
+ switch (prop) {
+ case POWER_SUPPLY_PROP_STATUS:
+ info->status = val->intval;
+ break;
+ case POWER_SUPPLY_PROP_TEMP_MIN:
+ case POWER_SUPPLY_PROP_TEMP_ALERT_MIN:
+ if ((val->intval < PD_DEF_MIN_TEMP) ||
+ (val->intval > PD_DEF_MAX_TEMP)) {
+ ret = -EINVAL;
+ break;
+ }
+ info->pdata->min_temp = UNPROP_TEMP(val->intval);
+ ret = fuel_gauge_set_low_btemp_alert(info);
+ if (ret < 0)
+ dev_err(&info->pdev->dev,
+ "temp alert min set fail:%d\n", ret);
+ break;
+ case POWER_SUPPLY_PROP_TEMP_MAX:
+ case POWER_SUPPLY_PROP_TEMP_ALERT_MAX:
+ if ((val->intval < PD_DEF_MIN_TEMP) ||
+ (val->intval > PD_DEF_MAX_TEMP)) {
+ ret = -EINVAL;
+ break;
+ }
+ info->pdata->max_temp = UNPROP_TEMP(val->intval);
+ ret = fuel_gauge_set_high_btemp_alert(info);
+ if (ret < 0)
+ dev_err(&info->pdev->dev,
+ "temp alert max set fail:%d\n", ret);
+ break;
+ case POWER_SUPPLY_PROP_CAPACITY_ALERT_MIN:
+ if ((val->intval < 0) || (val->intval > 15)) {
+ ret = -EINVAL;
+ break;
+ }
+ ret = fuel_gauge_reg_readb(info, AXP288_FG_LOW_CAP_REG);
+ if (ret < 0)
+ break;
+ ret &= 0xf0;
+ ret |= (val->intval & 0xf);
+ ret = fuel_gauge_reg_writeb(info, AXP288_FG_LOW_CAP_REG, ret);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+
+ mutex_unlock(&info->lock);
+ return ret;
+}
+
+static int fuel_gauge_property_is_writeable(struct power_supply *psy,
+ enum power_supply_property psp)
+{
+ int ret;
+
+ switch (psp) {
+ case POWER_SUPPLY_PROP_STATUS:
+ case POWER_SUPPLY_PROP_TEMP_MIN:
+ case POWER_SUPPLY_PROP_TEMP_ALERT_MIN:
+ case POWER_SUPPLY_PROP_TEMP_MAX:
+ case POWER_SUPPLY_PROP_TEMP_ALERT_MAX:
+ case POWER_SUPPLY_PROP_CAPACITY_ALERT_MIN:
+ ret = 1;
+ break;
+ default:
+ ret = 0;
+ }
+
+ return ret;
+}
+
+static void fuel_gauge_status_monitor(struct work_struct *work)
+{
+ struct axp288_fg_info *info = container_of(work,
+ struct axp288_fg_info, status_monitor.work);
+
+ fuel_gauge_get_status(info);
+ power_supply_changed(info->bat);
+ schedule_delayed_work(&info->status_monitor, STATUS_MON_DELAY_JIFFIES);
+}
+
+static irqreturn_t fuel_gauge_thread_handler(int irq, void *dev)
+{
+ struct axp288_fg_info *info = dev;
+ int i;
+
+ for (i = 0; i < AXP288_FG_INTR_NUM; i++) {
+ if (info->irq[i] == irq)
+ break;
+ }
+
+ if (i >= AXP288_FG_INTR_NUM) {
+ dev_warn(&info->pdev->dev, "spurious interrupt!!\n");
+ return IRQ_NONE;
+ }
+
+ switch (i) {
+ case QWBTU_IRQ:
+ dev_info(&info->pdev->dev,
+ "Quit Battery under temperature in work mode IRQ (QWBTU)\n");
+ break;
+ case WBTU_IRQ:
+ dev_info(&info->pdev->dev,
+ "Battery under temperature in work mode IRQ (WBTU)\n");
+ break;
+ case QWBTO_IRQ:
+ dev_info(&info->pdev->dev,
+ "Quit Battery over temperature in work mode IRQ (QWBTO)\n");
+ break;
+ case WBTO_IRQ:
+ dev_info(&info->pdev->dev,
+ "Battery over temperature in work mode IRQ (WBTO)\n");
+ break;
+ case WL2_IRQ:
+ dev_info(&info->pdev->dev, "Low Batt Warning(2) INTR\n");
+ break;
+ case WL1_IRQ:
+ dev_info(&info->pdev->dev, "Low Batt Warning(1) INTR\n");
+ break;
+ default:
+ dev_warn(&info->pdev->dev, "Spurious Interrupt!!!\n");
+ }
+
+ power_supply_changed(info->bat);
+ return IRQ_HANDLED;
+}
+
+static void fuel_gauge_external_power_changed(struct power_supply *psy)
+{
+ struct axp288_fg_info *info = power_supply_get_drvdata(psy);
+
+ power_supply_changed(info->bat);
+}
+
+static const struct power_supply_desc fuel_gauge_desc = {
+ .name = DEV_NAME,
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = fuel_gauge_props,
+ .num_properties = ARRAY_SIZE(fuel_gauge_props),
+ .get_property = fuel_gauge_get_property,
+ .set_property = fuel_gauge_set_property,
+ .property_is_writeable = fuel_gauge_property_is_writeable,
+ .external_power_changed = fuel_gauge_external_power_changed,
+};
+
+static int fuel_gauge_set_lowbatt_thresholds(struct axp288_fg_info *info)
+{
+ int ret;
+ u8 reg_val;
+
+ ret = fuel_gauge_reg_readb(info, AXP20X_FG_RES);
+ if (ret < 0) {
+ dev_err(&info->pdev->dev, "%s:read err:%d\n", __func__, ret);
+ return ret;
+ }
+ ret = (ret & FG_REP_CAP_VAL_MASK);
+
+ if (ret > FG_LOW_CAP_WARN_THR)
+ reg_val = FG_LOW_CAP_WARN_THR;
+ else if (ret > FG_LOW_CAP_CRIT_THR)
+ reg_val = FG_LOW_CAP_CRIT_THR;
+ else
+ reg_val = FG_LOW_CAP_SHDN_THR;
+
+ reg_val |= FG_LOW_CAP_THR1_VAL;
+ ret = fuel_gauge_reg_writeb(info, AXP288_FG_LOW_CAP_REG, reg_val);
+ if (ret < 0)
+ dev_err(&info->pdev->dev, "%s:write err:%d\n", __func__, ret);
+
+ return ret;
+}
+
+static int fuel_gauge_program_vbatt_full(struct axp288_fg_info *info)
+{
+ int ret;
+ u8 val;
+
+ ret = fuel_gauge_reg_readb(info, AXP20X_CHRG_CTRL1);
+ if (ret < 0)
+ goto fg_prog_ocv_fail;
+ else
+ val = (ret & ~CHRG_CCCV_CV_MASK);
+
+ switch (info->pdata->max_volt) {
+ case CV_4100:
+ val |= (CHRG_CCCV_CV_4100MV << CHRG_CCCV_CV_BIT_POS);
+ break;
+ case CV_4150:
+ val |= (CHRG_CCCV_CV_4150MV << CHRG_CCCV_CV_BIT_POS);
+ break;
+ case CV_4200:
+ val |= (CHRG_CCCV_CV_4200MV << CHRG_CCCV_CV_BIT_POS);
+ break;
+ case CV_4350:
+ val |= (CHRG_CCCV_CV_4350MV << CHRG_CCCV_CV_BIT_POS);
+ break;
+ default:
+ val |= (CHRG_CCCV_CV_4200MV << CHRG_CCCV_CV_BIT_POS);
+ break;
+ }
+
+ ret = fuel_gauge_reg_writeb(info, AXP20X_CHRG_CTRL1, val);
+fg_prog_ocv_fail:
+ return ret;
+}
+
+static int fuel_gauge_program_design_cap(struct axp288_fg_info *info)
+{
+ int ret;
+
+ ret = fuel_gauge_reg_writeb(info,
+ AXP288_FG_DES_CAP1_REG, info->pdata->cap1);
+ if (ret < 0)
+ goto fg_prog_descap_fail;
+
+ ret = fuel_gauge_reg_writeb(info,
+ AXP288_FG_DES_CAP0_REG, info->pdata->cap0);
+
+fg_prog_descap_fail:
+ return ret;
+}
+
+static int fuel_gauge_program_ocv_curve(struct axp288_fg_info *info)
+{
+ int ret = 0, i;
+
+ for (i = 0; i < OCV_CURVE_SIZE; i++) {
+ ret = fuel_gauge_reg_writeb(info,
+ AXP288_FG_OCV_CURVE_REG + i, info->pdata->ocv_curve[i]);
+ if (ret < 0)
+ goto fg_prog_ocv_fail;
+ }
+
+fg_prog_ocv_fail:
+ return ret;
+}
+
+static int fuel_gauge_program_rdc_vals(struct axp288_fg_info *info)
+{
+ int ret;
+
+ ret = fuel_gauge_reg_writeb(info,
+ AXP288_FG_RDC1_REG, info->pdata->rdc1);
+ if (ret < 0)
+ goto fg_prog_ocv_fail;
+
+ ret = fuel_gauge_reg_writeb(info,
+ AXP288_FG_RDC0_REG, info->pdata->rdc0);
+
+fg_prog_ocv_fail:
+ return ret;
+}
+
+static void fuel_gauge_init_config_regs(struct axp288_fg_info *info)
+{
+ int ret;
+
+ /*
+ * check if the config data is already
+ * programmed and if so just return.
+ */
+
+ ret = fuel_gauge_reg_readb(info, AXP288_FG_DES_CAP1_REG);
+ if (ret < 0) {
+ dev_warn(&info->pdev->dev, "CAP1 reg read err!!\n");
+ } else if (!(ret & FG_DES_CAP1_VALID)) {
+ dev_info(&info->pdev->dev, "FG data needs to be initialized\n");
+ } else {
+ dev_info(&info->pdev->dev, "FG data is already initialized\n");
+ return;
+ }
+
+ ret = fuel_gauge_program_vbatt_full(info);
+ if (ret < 0)
+ dev_err(&info->pdev->dev, "set vbatt full fail:%d\n", ret);
+
+ ret = fuel_gauge_program_design_cap(info);
+ if (ret < 0)
+ dev_err(&info->pdev->dev, "set design cap fail:%d\n", ret);
+
+ ret = fuel_gauge_program_rdc_vals(info);
+ if (ret < 0)
+ dev_err(&info->pdev->dev, "set rdc fail:%d\n", ret);
+
+ ret = fuel_gauge_program_ocv_curve(info);
+ if (ret < 0)
+ dev_err(&info->pdev->dev, "set ocv curve fail:%d\n", ret);
+
+ ret = fuel_gauge_set_lowbatt_thresholds(info);
+ if (ret < 0)
+ dev_err(&info->pdev->dev, "lowbatt thr set fail:%d\n", ret);
+
+ ret = fuel_gauge_reg_writeb(info, AXP20X_CC_CTRL, 0xef);
+ if (ret < 0)
+ dev_err(&info->pdev->dev, "gauge cntl set fail:%d\n", ret);
+}
+
+static void fuel_gauge_init_irq(struct axp288_fg_info *info)
+{
+ int ret, i, pirq;
+
+ for (i = 0; i < AXP288_FG_INTR_NUM; i++) {
+ pirq = platform_get_irq(info->pdev, i);
+ info->irq[i] = regmap_irq_get_virq(info->regmap_irqc, pirq);
+ if (info->irq[i] < 0) {
+ dev_warn(&info->pdev->dev,
+ "regmap_irq get virq failed for IRQ %d: %d\n",
+ pirq, info->irq[i]);
+ info->irq[i] = -1;
+ goto intr_failed;
+ }
+ ret = request_threaded_irq(info->irq[i],
+ NULL, fuel_gauge_thread_handler,
+ IRQF_ONESHOT, DEV_NAME, info);
+ if (ret) {
+ dev_warn(&info->pdev->dev,
+ "request irq failed for IRQ %d: %d\n",
+ pirq, info->irq[i]);
+ info->irq[i] = -1;
+ goto intr_failed;
+ } else {
+ dev_info(&info->pdev->dev, "HW IRQ %d -> VIRQ %d\n",
+ pirq, info->irq[i]);
+ }
+ }
+ return;
+
+intr_failed:
+ for (; i > 0; i--) {
+ free_irq(info->irq[i - 1], info);
+ info->irq[i - 1] = -1;
+ }
+}
+
+static void fuel_gauge_init_hw_regs(struct axp288_fg_info *info)
+{
+ int ret;
+ unsigned int val;
+
+ ret = fuel_gauge_set_high_btemp_alert(info);
+ if (ret < 0)
+ dev_err(&info->pdev->dev, "high batt temp set fail:%d\n", ret);
+
+ ret = fuel_gauge_set_low_btemp_alert(info);
+ if (ret < 0)
+ dev_err(&info->pdev->dev, "low batt temp set fail:%d\n", ret);
+
+ /* enable interrupts */
+ val = fuel_gauge_reg_readb(info, AXP20X_IRQ3_EN);
+ val |= TEMP_IRQ_CFG_MASK;
+ fuel_gauge_reg_writeb(info, AXP20X_IRQ3_EN, val);
+
+ val = fuel_gauge_reg_readb(info, AXP20X_IRQ4_EN);
+ val |= FG_IRQ_CFG_LOWBATT_MASK;
+ val = fuel_gauge_reg_writeb(info, AXP20X_IRQ4_EN, val);
+}
+
+static int axp288_fuel_gauge_probe(struct platform_device *pdev)
+{
+ int ret = 0;
+ struct axp288_fg_info *info;
+ struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
+ struct power_supply_config psy_cfg = {};
+
+ info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
+ if (!info)
+ return -ENOMEM;
+
+ info->pdev = pdev;
+ info->regmap = axp20x->regmap;
+ info->regmap_irqc = axp20x->regmap_irqc;
+ info->status = POWER_SUPPLY_STATUS_UNKNOWN;
+ info->pdata = pdev->dev.platform_data;
+ if (!info->pdata)
+ return -ENODEV;
+
+ platform_set_drvdata(pdev, info);
+
+ mutex_init(&info->lock);
+ INIT_DELAYED_WORK(&info->status_monitor, fuel_gauge_status_monitor);
+
+ psy_cfg.drv_data = info;
+ info->bat = power_supply_register(&pdev->dev, &fuel_gauge_desc, &psy_cfg);
+ if (IS_ERR(info->bat)) {
+ ret = PTR_ERR(info->bat);
+ dev_err(&pdev->dev, "failed to register battery: %d\n", ret);
+ return ret;
+ }
+
+ fuel_gauge_create_debugfs(info);
+ fuel_gauge_init_config_regs(info);
+ fuel_gauge_init_irq(info);
+ fuel_gauge_init_hw_regs(info);
+ schedule_delayed_work(&info->status_monitor, STATUS_MON_DELAY_JIFFIES);
+
+ return ret;
+}
+
+static struct platform_device_id axp288_fg_id_table[] = {
+ { .name = DEV_NAME },
+ {},
+};
+
+static int axp288_fuel_gauge_remove(struct platform_device *pdev)
+{
+ struct axp288_fg_info *info = platform_get_drvdata(pdev);
+ int i;
+
+ cancel_delayed_work_sync(&info->status_monitor);
+ power_supply_unregister(info->bat);
+ fuel_gauge_remove_debugfs(info);
+
+ for (i = 0; i < AXP288_FG_INTR_NUM; i++)
+ if (info->irq[i] >= 0)
+ free_irq(info->irq[i], info);
+
+ return 0;
+}
+
+static struct platform_driver axp288_fuel_gauge_driver = {
+ .probe = axp288_fuel_gauge_probe,
+ .remove = axp288_fuel_gauge_remove,
+ .id_table = axp288_fg_id_table,
+ .driver = {
+ .name = DEV_NAME,
+ },
+};
+
+module_platform_driver(axp288_fuel_gauge_driver);
+
+MODULE_AUTHOR("Todd Brandt <todd.e.brandt@linux.intel.com>");
+MODULE_DESCRIPTION("Xpower AXP288 Fuel Gauge Driver");
+MODULE_LICENSE("GPL");
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- */
-
-/*
* Datasheets:
* http://www.ti.com/product/bq24150
* http://www.ti.com/product/bq24150a
* http://www.ti.com/product/bq24153
* http://www.ti.com/product/bq24153a
* http://www.ti.com/product/bq24155
+ * http://www.ti.com/product/bq24157s
+ * http://www.ti.com/product/bq24158
*/
#include <linux/kernel.h>
BQ24155,
BQ24156,
BQ24156A,
+ BQ24157S,
BQ24158,
};
"bq24155",
"bq24156",
"bq24156a",
+ "bq24157s",
"bq24158",
};
struct bq2415x_device {
struct device *dev;
struct bq2415x_platform_data init_data;
- struct power_supply charger;
+ struct power_supply *charger;
+ struct power_supply_desc charger_desc;
struct delayed_work work;
struct power_supply *notify_psy;
struct notifier_block nb;
enum bq2415x_mode reported_mode;/* mode reported by hook function */
- enum bq2415x_mode mode; /* current configured mode */
+ enum bq2415x_mode mode; /* currently configured mode */
enum bq2415x_chip chip;
const char *timer_error;
char *model;
BQ2415X_BIT_CE);
if (ret < 0)
return ret;
- else
- return ret > 0 ? 0 : 1;
+ return ret > 0 ? 0 : 1;
case BQ2415X_CHARGER_ENABLE:
return bq2415x_i2c_write_bit(bq, BQ2415X_REG_CONTROL,
0, BQ2415X_BIT_CE);
case 0:
if (bq->chip == BQ24151A)
return bq->chip;
- else
- return BQ24151;
+ return BQ24151;
case 1:
if (bq->chip == BQ24150A ||
bq->chip == BQ24152 ||
bq->chip == BQ24155)
return bq->chip;
- else
- return BQ24150;
+ return BQ24150;
case 2:
if (bq->chip == BQ24153A)
return bq->chip;
- else
- return BQ24153;
+ return BQ24153;
default:
return BQUNKNOWN;
}
case 0:
if (bq->chip == BQ24156A)
return bq->chip;
- else
- return BQ24156;
+ return BQ24156;
case 2:
+ if (bq->chip == BQ24157S)
+ return bq->chip;
return BQ24158;
default:
return BQUNKNOWN;
case BQ24152:
if (ret >= 0 && ret <= 3)
return ret;
- else
- return -1;
+ return -1;
case BQ24153:
case BQ24153A:
case BQ24156:
case BQ24156A:
+ case BQ24157S:
case BQ24158:
if (ret == 3)
return 0;
else if (ret == 1)
return 1;
- else
- return -1;
+ return -1;
case BQ24155:
if (ret == 3)
return 3;
- else
- return -1;
+ return -1;
case BQUNKNOWN:
return -1;
}
bq2415x_set_default_value(bq, battery_regulation_voltage);
bq->mode = mode;
- sysfs_notify(&bq->charger.dev->kobj, NULL, "mode");
+ sysfs_notify(&bq->charger->dev.kobj, NULL, "mode");
return 0;
dev_dbg(bq->dev, "notifier call was called\n");
- ret = psy->get_property(psy, POWER_SUPPLY_PROP_CURRENT_MAX, &prop);
+ ret = power_supply_get_property(psy, POWER_SUPPLY_PROP_CURRENT_MAX,
+ &prop);
if (ret != 0)
return NOTIFY_OK;
static void bq2415x_timer_error(struct bq2415x_device *bq, const char *msg)
{
bq->timer_error = msg;
- sysfs_notify(&bq->charger.dev->kobj, NULL, "timer");
+ sysfs_notify(&bq->charger->dev.kobj, NULL, "timer");
dev_err(bq->dev, "%s\n", msg);
if (bq->automode > 0)
bq->automode = 0;
int boost;
if (bq->automode > 0 && (bq->reported_mode != bq->mode)) {
- sysfs_notify(&bq->charger.dev->kobj, NULL, "reported_mode");
+ sysfs_notify(&bq->charger->dev.kobj, NULL, "reported_mode");
bq2415x_set_mode(bq, bq->reported_mode);
}
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct bq2415x_device *bq = container_of(psy, struct bq2415x_device,
- charger);
+ struct bq2415x_device *bq = power_supply_get_drvdata(psy);
int ret;
switch (psp) {
int ret;
int chip;
char revstr[8];
+ struct power_supply_config psy_cfg = { .drv_data = bq, };
- bq->charger.name = bq->name;
- bq->charger.type = POWER_SUPPLY_TYPE_USB;
- bq->charger.properties = bq2415x_power_supply_props;
- bq->charger.num_properties = ARRAY_SIZE(bq2415x_power_supply_props);
- bq->charger.get_property = bq2415x_power_supply_get_property;
+ bq->charger_desc.name = bq->name;
+ bq->charger_desc.type = POWER_SUPPLY_TYPE_USB;
+ bq->charger_desc.properties = bq2415x_power_supply_props;
+ bq->charger_desc.num_properties =
+ ARRAY_SIZE(bq2415x_power_supply_props);
+ bq->charger_desc.get_property = bq2415x_power_supply_get_property;
ret = bq2415x_detect_chip(bq);
if (ret < 0)
return -ENOMEM;
}
- ret = power_supply_register(bq->dev, &bq->charger);
- if (ret) {
+ bq->charger = power_supply_register(bq->dev, &bq->charger_desc,
+ &psy_cfg);
+ if (IS_ERR(bq->charger)) {
kfree(bq->model);
- return ret;
+ return PTR_ERR(bq->charger);
}
return 0;
if (bq->automode > 0)
bq->automode = 0;
cancel_delayed_work_sync(&bq->work);
- power_supply_unregister(&bq->charger);
+ power_supply_unregister(bq->charger);
kfree(bq->model);
}
char *buf)
{
struct power_supply *psy = dev_get_drvdata(dev);
- struct bq2415x_device *bq = container_of(psy, struct bq2415x_device,
- charger);
+ struct bq2415x_device *bq = power_supply_get_drvdata(psy);
enum bq2415x_command command;
int ret;
size_t count)
{
struct power_supply *psy = dev_get_drvdata(dev);
- struct bq2415x_device *bq = container_of(psy, struct bq2415x_device,
- charger);
+ struct bq2415x_device *bq = power_supply_get_drvdata(psy);
int ret = 0;
if (strncmp(buf, "auto", 4) == 0)
char *buf)
{
struct power_supply *psy = dev_get_drvdata(dev);
- struct bq2415x_device *bq = container_of(psy, struct bq2415x_device,
- charger);
+ struct bq2415x_device *bq = power_supply_get_drvdata(psy);
if (bq->timer_error)
return sprintf(buf, "%s\n", bq->timer_error);
size_t count)
{
struct power_supply *psy = dev_get_drvdata(dev);
- struct bq2415x_device *bq = container_of(psy, struct bq2415x_device,
- charger);
+ struct bq2415x_device *bq = power_supply_get_drvdata(psy);
enum bq2415x_mode mode;
int ret = 0;
char *buf)
{
struct power_supply *psy = dev_get_drvdata(dev);
- struct bq2415x_device *bq = container_of(psy, struct bq2415x_device,
- charger);
+ struct bq2415x_device *bq = power_supply_get_drvdata(psy);
ssize_t ret = 0;
if (bq->automode > 0)
char *buf)
{
struct power_supply *psy = dev_get_drvdata(dev);
- struct bq2415x_device *bq = container_of(psy, struct bq2415x_device,
- charger);
+ struct bq2415x_device *bq = power_supply_get_drvdata(psy);
if (bq->automode < 0)
return -EINVAL;
size_t count)
{
struct power_supply *psy = dev_get_drvdata(dev);
- struct bq2415x_device *bq = container_of(psy, struct bq2415x_device,
- charger);
+ struct bq2415x_device *bq = power_supply_get_drvdata(psy);
ssize_t ret = 0;
unsigned int reg;
unsigned int val;
char *buf)
{
struct power_supply *psy = dev_get_drvdata(dev);
- struct bq2415x_device *bq = container_of(psy, struct bq2415x_device,
- charger);
+ struct bq2415x_device *bq = power_supply_get_drvdata(psy);
ssize_t ret = 0;
ret += bq2415x_sysfs_print_reg(bq, BQ2415X_REG_STATUS, buf+ret);
size_t count)
{
struct power_supply *psy = dev_get_drvdata(dev);
- struct bq2415x_device *bq = container_of(psy, struct bq2415x_device,
- charger);
+ struct bq2415x_device *bq = power_supply_get_drvdata(psy);
long val;
int ret;
char *buf)
{
struct power_supply *psy = dev_get_drvdata(dev);
- struct bq2415x_device *bq = container_of(psy, struct bq2415x_device,
- charger);
+ struct bq2415x_device *bq = power_supply_get_drvdata(psy);
int ret;
if (strcmp(attr->attr.name, "current_limit") == 0)
size_t count)
{
struct power_supply *psy = dev_get_drvdata(dev);
- struct bq2415x_device *bq = container_of(psy, struct bq2415x_device,
- charger);
+ struct bq2415x_device *bq = power_supply_get_drvdata(psy);
enum bq2415x_command command;
long val;
int ret;
char *buf)
{
struct power_supply *psy = dev_get_drvdata(dev);
- struct bq2415x_device *bq = container_of(psy, struct bq2415x_device,
- charger);
+ struct bq2415x_device *bq = power_supply_get_drvdata(psy);
enum bq2415x_command command;
int ret;
static int bq2415x_sysfs_init(struct bq2415x_device *bq)
{
- return sysfs_create_group(&bq->charger.dev->kobj,
+ return sysfs_create_group(&bq->charger->dev.kobj,
&bq2415x_sysfs_attr_group);
}
static void bq2415x_sysfs_exit(struct bq2415x_device *bq)
{
- sysfs_remove_group(&bq->charger.dev->kobj, &bq2415x_sysfs_attr_group);
+ sysfs_remove_group(&bq->charger->dev.kobj, &bq2415x_sysfs_attr_group);
}
/* main bq2415x probe function */
ret = of_property_read_u32(np, "ti,current-limit",
&bq->init_data.current_limit);
if (ret)
- goto error_2;
+ goto error_3;
ret = of_property_read_u32(np, "ti,weak-battery-voltage",
&bq->init_data.weak_battery_voltage);
if (ret)
- goto error_2;
+ goto error_3;
ret = of_property_read_u32(np, "ti,battery-regulation-voltage",
&bq->init_data.battery_regulation_voltage);
if (ret)
- goto error_2;
+ goto error_3;
ret = of_property_read_u32(np, "ti,charge-current",
&bq->init_data.charge_current);
if (ret)
- goto error_2;
+ goto error_3;
ret = of_property_read_u32(np, "ti,termination-current",
&bq->init_data.termination_current);
if (ret)
- goto error_2;
+ goto error_3;
ret = of_property_read_u32(np, "ti,resistor-sense",
&bq->init_data.resistor_sense);
if (ret)
- goto error_2;
+ goto error_3;
} else {
memcpy(&bq->init_data, pdata, sizeof(bq->init_data));
}
ret = bq2415x_power_supply_init(bq);
if (ret) {
dev_err(bq->dev, "failed to register power supply: %d\n", ret);
- goto error_2;
+ goto error_3;
}
ret = bq2415x_sysfs_init(bq);
if (ret) {
dev_err(bq->dev, "failed to create sysfs entries: %d\n", ret);
- goto error_3;
+ goto error_4;
}
ret = bq2415x_set_defaults(bq);
if (ret) {
dev_err(bq->dev, "failed to set default values: %d\n", ret);
- goto error_4;
+ goto error_5;
}
if (bq->notify_psy) {
ret = power_supply_reg_notifier(&bq->nb);
if (ret) {
dev_err(bq->dev, "failed to reg notifier: %d\n", ret);
- goto error_5;
+ goto error_6;
}
/* Query for initial reported_mode and set it */
dev_info(bq->dev, "driver registered\n");
return 0;
+error_6:
error_5:
-error_4:
bq2415x_sysfs_exit(bq);
-error_3:
+error_4:
bq2415x_power_supply_exit(bq);
+error_3:
+ if (bq->notify_psy)
+ power_supply_put(bq->notify_psy);
error_2:
kfree(name);
error_1:
{
struct bq2415x_device *bq = i2c_get_clientdata(client);
- if (bq->notify_psy)
+ if (bq->notify_psy) {
power_supply_unreg_notifier(&bq->nb);
+ power_supply_put(bq->notify_psy);
+ }
bq2415x_sysfs_exit(bq);
bq2415x_power_supply_exit(bq);
{ "bq24155", BQ24155 },
{ "bq24156", BQ24156 },
{ "bq24156a", BQ24156A },
+ { "bq24157s", BQ24157S },
{ "bq24158", BQ24158 },
{},
};
struct bq24190_dev_info {
struct i2c_client *client;
struct device *dev;
- struct power_supply charger;
- struct power_supply battery;
+ struct power_supply *charger;
+ struct power_supply *battery;
char model_name[I2C_NAME_SIZE];
kernel_ulong_t model;
unsigned int gpio_int;
struct device_attribute *attr, char *buf)
{
struct power_supply *psy = dev_get_drvdata(dev);
- struct bq24190_dev_info *bdi =
- container_of(psy, struct bq24190_dev_info, charger);
+ struct bq24190_dev_info *bdi = power_supply_get_drvdata(psy);
struct bq24190_sysfs_field_info *info;
int ret;
u8 v;
struct device_attribute *attr, const char *buf, size_t count)
{
struct power_supply *psy = dev_get_drvdata(dev);
- struct bq24190_dev_info *bdi =
- container_of(psy, struct bq24190_dev_info, charger);
+ struct bq24190_dev_info *bdi = power_supply_get_drvdata(psy);
struct bq24190_sysfs_field_info *info;
int ret;
u8 v;
{
bq24190_sysfs_init_attrs();
- return sysfs_create_group(&bdi->charger.dev->kobj,
+ return sysfs_create_group(&bdi->charger->dev.kobj,
&bq24190_sysfs_attr_group);
}
static void bq24190_sysfs_remove_group(struct bq24190_dev_info *bdi)
{
- sysfs_remove_group(&bdi->charger.dev->kobj, &bq24190_sysfs_attr_group);
+ sysfs_remove_group(&bdi->charger->dev.kobj, &bq24190_sysfs_attr_group);
}
#else
static int bq24190_sysfs_create_group(struct bq24190_dev_info *bdi)
static int bq24190_charger_get_property(struct power_supply *psy,
enum power_supply_property psp, union power_supply_propval *val)
{
- struct bq24190_dev_info *bdi =
- container_of(psy, struct bq24190_dev_info, charger);
+ struct bq24190_dev_info *bdi = power_supply_get_drvdata(psy);
int ret;
dev_dbg(bdi->dev, "prop: %d\n", psp);
enum power_supply_property psp,
const union power_supply_propval *val)
{
- struct bq24190_dev_info *bdi =
- container_of(psy, struct bq24190_dev_info, charger);
+ struct bq24190_dev_info *bdi = power_supply_get_drvdata(psy);
int ret;
dev_dbg(bdi->dev, "prop: %d\n", psp);
"main-battery",
};
-static void bq24190_charger_init(struct power_supply *charger)
-{
- charger->name = "bq24190-charger";
- charger->type = POWER_SUPPLY_TYPE_USB;
- charger->properties = bq24190_charger_properties;
- charger->num_properties = ARRAY_SIZE(bq24190_charger_properties);
- charger->supplied_to = bq24190_charger_supplied_to;
- charger->num_supplicants = ARRAY_SIZE(bq24190_charger_supplied_to);
- charger->get_property = bq24190_charger_get_property;
- charger->set_property = bq24190_charger_set_property;
- charger->property_is_writeable = bq24190_charger_property_is_writeable;
-}
+static const struct power_supply_desc bq24190_charger_desc = {
+ .name = "bq24190-charger",
+ .type = POWER_SUPPLY_TYPE_USB,
+ .properties = bq24190_charger_properties,
+ .num_properties = ARRAY_SIZE(bq24190_charger_properties),
+ .get_property = bq24190_charger_get_property,
+ .set_property = bq24190_charger_set_property,
+ .property_is_writeable = bq24190_charger_property_is_writeable,
+};
/* Battery power supply property routines */
static int bq24190_battery_get_property(struct power_supply *psy,
enum power_supply_property psp, union power_supply_propval *val)
{
- struct bq24190_dev_info *bdi =
- container_of(psy, struct bq24190_dev_info, battery);
+ struct bq24190_dev_info *bdi = power_supply_get_drvdata(psy);
int ret;
dev_dbg(bdi->dev, "prop: %d\n", psp);
enum power_supply_property psp,
const union power_supply_propval *val)
{
- struct bq24190_dev_info *bdi =
- container_of(psy, struct bq24190_dev_info, battery);
+ struct bq24190_dev_info *bdi = power_supply_get_drvdata(psy);
int ret;
dev_dbg(bdi->dev, "prop: %d\n", psp);
POWER_SUPPLY_PROP_SCOPE,
};
-static void bq24190_battery_init(struct power_supply *battery)
-{
- battery->name = "bq24190-battery";
- battery->type = POWER_SUPPLY_TYPE_BATTERY;
- battery->properties = bq24190_battery_properties;
- battery->num_properties = ARRAY_SIZE(bq24190_battery_properties);
- battery->get_property = bq24190_battery_get_property;
- battery->set_property = bq24190_battery_set_property;
- battery->property_is_writeable = bq24190_battery_property_is_writeable;
-}
+static const struct power_supply_desc bq24190_battery_desc = {
+ .name = "bq24190-battery",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = bq24190_battery_properties,
+ .num_properties = ARRAY_SIZE(bq24190_battery_properties),
+ .get_property = bq24190_battery_get_property,
+ .set_property = bq24190_battery_set_property,
+ .property_is_writeable = bq24190_battery_property_is_writeable,
+};
static irqreturn_t bq24190_irq_handler_thread(int irq, void *data)
{
* interrupt received).
*/
if (alert_userspace && !bdi->first_time) {
- power_supply_changed(&bdi->charger);
- power_supply_changed(&bdi->battery);
+ power_supply_changed(bdi->charger);
+ power_supply_changed(bdi->battery);
bdi->first_time = false;
}
struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
struct device *dev = &client->dev;
struct bq24190_platform_data *pdata = client->dev.platform_data;
+ struct power_supply_config charger_cfg = {}, battery_cfg = {};
struct bq24190_dev_info *bdi;
int ret;
goto out2;
}
- bq24190_charger_init(&bdi->charger);
-
- ret = power_supply_register(dev, &bdi->charger);
- if (ret) {
+ charger_cfg.drv_data = bdi;
+ charger_cfg.supplied_to = bq24190_charger_supplied_to;
+ charger_cfg.num_supplicants = ARRAY_SIZE(bq24190_charger_supplied_to),
+ bdi->charger = power_supply_register(dev, &bq24190_charger_desc,
+ &charger_cfg);
+ if (IS_ERR(bdi->charger)) {
dev_err(dev, "Can't register charger\n");
+ ret = PTR_ERR(bdi->charger);
goto out2;
}
- bq24190_battery_init(&bdi->battery);
-
- ret = power_supply_register(dev, &bdi->battery);
- if (ret) {
+ battery_cfg.drv_data = bdi;
+ bdi->battery = power_supply_register(dev, &bq24190_battery_desc,
+ &battery_cfg);
+ if (IS_ERR(bdi->battery)) {
dev_err(dev, "Can't register battery\n");
+ ret = PTR_ERR(bdi->battery);
goto out3;
}
return 0;
out4:
- power_supply_unregister(&bdi->battery);
+ power_supply_unregister(bdi->battery);
out3:
- power_supply_unregister(&bdi->charger);
+ power_supply_unregister(bdi->charger);
out2:
pm_runtime_disable(dev);
out1:
pm_runtime_put_sync(bdi->dev);
bq24190_sysfs_remove_group(bdi);
- power_supply_unregister(&bdi->battery);
- power_supply_unregister(&bdi->charger);
+ power_supply_unregister(bdi->battery);
+ power_supply_unregister(bdi->charger);
pm_runtime_disable(bdi->dev);
if (bdi->gpio_int)
pm_runtime_put_sync(bdi->dev);
/* Things may have changed while suspended so alert upper layer */
- power_supply_changed(&bdi->charger);
- power_supply_changed(&bdi->battery);
+ power_supply_changed(bdi->charger);
+ power_supply_changed(bdi->battery);
return 0;
}
#define BQ24735_DEVICE_ID 0xff
struct bq24735 {
- struct power_supply charger;
- struct i2c_client *client;
- struct bq24735_platform *pdata;
+ struct power_supply *charger;
+ struct power_supply_desc charger_desc;
+ struct i2c_client *client;
+ struct bq24735_platform *pdata;
};
static inline struct bq24735 *to_bq24735(struct power_supply *psy)
{
- return container_of(psy, struct bq24735, charger);
+ return power_supply_get_drvdata(psy);
}
static enum power_supply_property bq24735_charger_properties[] = {
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct bq24735 *charger;
-
- charger = container_of(psy, struct bq24735, charger);
+ struct bq24735 *charger = to_bq24735(psy);
switch (psp) {
case POWER_SUPPLY_PROP_ONLINE:
{
int ret;
struct bq24735 *charger;
- struct power_supply *supply;
+ struct power_supply_desc *supply_desc;
+ struct power_supply_config psy_cfg = {};
char *name;
charger = devm_kzalloc(&client->dev, sizeof(*charger), GFP_KERNEL);
charger->client = client;
- supply = &charger->charger;
+ supply_desc = &charger->charger_desc;
- supply->name = name;
- supply->type = POWER_SUPPLY_TYPE_MAINS;
- supply->properties = bq24735_charger_properties;
- supply->num_properties = ARRAY_SIZE(bq24735_charger_properties);
- supply->get_property = bq24735_charger_get_property;
- supply->supplied_to = charger->pdata->supplied_to;
- supply->num_supplicants = charger->pdata->num_supplicants;
- supply->of_node = client->dev.of_node;
+ supply_desc->name = name;
+ supply_desc->type = POWER_SUPPLY_TYPE_MAINS;
+ supply_desc->properties = bq24735_charger_properties;
+ supply_desc->num_properties = ARRAY_SIZE(bq24735_charger_properties);
+ supply_desc->get_property = bq24735_charger_get_property;
+
+ psy_cfg.supplied_to = charger->pdata->supplied_to;
+ psy_cfg.num_supplicants = charger->pdata->num_supplicants;
+ psy_cfg.of_node = client->dev.of_node;
+ psy_cfg.drv_data = charger;
i2c_set_clientdata(client, charger);
}
}
- ret = power_supply_register(&client->dev, supply);
- if (ret < 0) {
+ charger->charger = power_supply_register(&client->dev, supply_desc,
+ &psy_cfg);
+ if (IS_ERR(charger->charger)) {
+ ret = PTR_ERR(charger->charger);
dev_err(&client->dev, "Failed to register power supply: %d\n",
ret);
goto err_free_name;
IRQF_TRIGGER_RISING |
IRQF_TRIGGER_FALLING |
IRQF_ONESHOT,
- supply->name, supply);
+ supply_desc->name,
+ charger->charger);
if (ret) {
dev_err(&client->dev,
"Unable to register IRQ %d err %d\n",
return 0;
err_unregister_supply:
- power_supply_unregister(supply);
+ power_supply_unregister(charger->charger);
err_free_name:
if (name != charger->pdata->name)
kfree(name);
devm_free_irq(&charger->client->dev, charger->client->irq,
&charger->charger);
- power_supply_unregister(&charger->charger);
+ power_supply_unregister(charger->charger);
- if (charger->charger.name != charger->pdata->name)
- kfree(charger->charger.name);
+ if (charger->charger_desc.name != charger->pdata->name)
+ kfree(charger->charger_desc.name);
return 0;
}
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*
- */
-
-/*
* Datasheets:
* http://focus.ti.com/docs/prod/folders/print/bq27000.html
* http://focus.ti.com/docs/prod/folders/print/bq27500.html
* http://www.ti.com/product/bq27425-g1
* http://www.ti.com/product/BQ27742-G1
+ * http://www.ti.com/product/BQ27510-G3
*/
#include <linux/device.h>
#define BQ27742_POWER_AVG 0x76
+#define BQ27510_REG_SOC 0x20
+#define BQ27510_REG_DCAP 0x2E /* Design capacity */
+#define BQ27510_REG_CYCT 0x1E /* Cycle count total */
+
/* bq27425 register addresses are same as bq27x00 addresses minus 4 */
#define BQ27425_REG_OFFSET 0x04
#define BQ27425_REG_SOC (0x1C + BQ27425_REG_OFFSET)
int (*read)(struct bq27x00_device_info *di, u8 reg, bool single);
};
-enum bq27x00_chip { BQ27000, BQ27500, BQ27425, BQ27742};
+enum bq27x00_chip { BQ27000, BQ27500, BQ27425, BQ27742, BQ27510};
struct bq27x00_reg_cache {
int temperature;
unsigned long last_update;
struct delayed_work work;
- struct power_supply bat;
+ struct power_supply *bat;
struct bq27x00_access_methods bus;
POWER_SUPPLY_PROP_HEALTH,
};
+static enum power_supply_property bq27510_battery_props[] = {
+ POWER_SUPPLY_PROP_STATUS,
+ POWER_SUPPLY_PROP_PRESENT,
+ POWER_SUPPLY_PROP_VOLTAGE_NOW,
+ POWER_SUPPLY_PROP_CURRENT_NOW,
+ POWER_SUPPLY_PROP_CAPACITY,
+ POWER_SUPPLY_PROP_CAPACITY_LEVEL,
+ POWER_SUPPLY_PROP_TEMP,
+ POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
+ POWER_SUPPLY_PROP_TECHNOLOGY,
+ POWER_SUPPLY_PROP_CHARGE_FULL,
+ POWER_SUPPLY_PROP_CHARGE_NOW,
+ POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
+ POWER_SUPPLY_PROP_CYCLE_COUNT,
+ POWER_SUPPLY_PROP_POWER_AVG,
+ POWER_SUPPLY_PROP_HEALTH,
+};
+
static unsigned int poll_interval = 360;
module_param(poll_interval, uint, 0644);
MODULE_PARM_DESC(poll_interval, "battery poll interval in seconds - " \
*/
static bool bq27xxx_is_chip_version_higher(struct bq27x00_device_info *di)
{
- if (di->chip == BQ27425 || di->chip == BQ27500 || di->chip == BQ27742)
+ if (di->chip == BQ27425 || di->chip == BQ27500 || di->chip == BQ27742
+ || di->chip == BQ27510)
return true;
return false;
}
if (di->chip == BQ27500 || di->chip == BQ27742)
rsoc = bq27x00_read(di, BQ27500_REG_SOC, false);
+ else if (di->chip == BQ27510)
+ rsoc = bq27x00_read(di, BQ27510_REG_SOC, false);
else if (di->chip == BQ27425)
rsoc = bq27x00_read(di, BQ27425_REG_SOC, false);
else
if (bq27xxx_is_chip_version_higher(di)) {
if (di->chip == BQ27425)
ilmd = bq27x00_read(di, BQ27425_REG_DCAP, false);
+ else if (di->chip == BQ27510)
+ ilmd = bq27x00_read(di, BQ27510_REG_DCAP, false);
else
ilmd = bq27x00_read(di, BQ27500_REG_DCAP, false);
} else
{
int cyct;
- cyct = bq27x00_read(di, BQ27x00_REG_CYCT, false);
+ if (di->chip == BQ27510)
+ cyct = bq27x00_read(di, BQ27510_REG_CYCT, false);
+ else
+ cyct = bq27x00_read(di, BQ27x00_REG_CYCT, false);
if (cyct < 0)
dev_err(di->dev, "error reading cycle count total\n");
else
tval = POWER_SUPPLY_HEALTH_GOOD;
return tval;
+ } else if (di->chip == BQ27510) {
+ if (tval & BQ27500_FLAG_OTC)
+ return POWER_SUPPLY_HEALTH_OVERHEAT;
+ return POWER_SUPPLY_HEALTH_GOOD;
} else {
if (tval & BQ27000_FLAG_EDV1)
tval = POWER_SUPPLY_HEALTH_DEAD;
{
struct bq27x00_reg_cache cache = {0, };
bool is_bq27500 = di->chip == BQ27500;
+ bool is_bq27510 = di->chip == BQ27510;
bool is_bq27425 = di->chip == BQ27425;
bool is_bq27742 = di->chip == BQ27742;
bool flags_1b = !(is_bq27500 || is_bq27742);
/* read error */
cache.flags = -1;
if (cache.flags >= 0) {
- if (!is_bq27500 && !is_bq27425 && !is_bq27742
+ if (!is_bq27500 && !is_bq27425 && !is_bq27742 && !is_bq27510
&& (cache.flags & BQ27000_FLAG_CI)) {
dev_info(di->dev, "battery is not calibrated! ignoring capacity values\n");
cache.capacity = -ENODATA;
cache.health = -ENODATA;
} else {
cache.capacity = bq27x00_battery_read_rsoc(di);
- if (is_bq27742)
+ if (is_bq27742 || is_bq27510)
cache.time_to_empty =
bq27x00_battery_read_time(di,
BQ27x00_REG_TTE);
}
if (di->cache.capacity != cache.capacity)
- power_supply_changed(&di->bat);
+ power_supply_changed(di->bat);
if (memcmp(&di->cache, &cache, sizeof(cache)) != 0)
di->cache = cache;
status = POWER_SUPPLY_STATUS_FULL;
else if (di->cache.flags & BQ27000_FLAG_CHGS)
status = POWER_SUPPLY_STATUS_CHARGING;
- else if (power_supply_am_i_supplied(&di->bat))
+ else if (power_supply_am_i_supplied(di->bat))
status = POWER_SUPPLY_STATUS_NOT_CHARGING;
else
status = POWER_SUPPLY_STATUS_DISCHARGING;
return 0;
}
-#define to_bq27x00_device_info(x) container_of((x), \
- struct bq27x00_device_info, bat);
-
static int bq27x00_battery_get_property(struct power_supply *psy,
enum power_supply_property psp,
union power_supply_propval *val)
{
int ret = 0;
- struct bq27x00_device_info *di = to_bq27x00_device_info(psy);
+ struct bq27x00_device_info *di = power_supply_get_drvdata(psy);
mutex_lock(&di->lock);
if (time_is_before_jiffies(di->last_update + 5 * HZ)) {
static void bq27x00_external_power_changed(struct power_supply *psy)
{
- struct bq27x00_device_info *di = to_bq27x00_device_info(psy);
+ struct bq27x00_device_info *di = power_supply_get_drvdata(psy);
cancel_delayed_work_sync(&di->work);
schedule_delayed_work(&di->work, 0);
}
-static int bq27x00_powersupply_init(struct bq27x00_device_info *di)
+static int bq27x00_powersupply_init(struct bq27x00_device_info *di,
+ const char *name)
{
int ret;
+ struct power_supply_desc *psy_desc;
+ struct power_supply_config psy_cfg = { .drv_data = di, };
- di->bat.type = POWER_SUPPLY_TYPE_BATTERY;
+ psy_desc = devm_kzalloc(di->dev, sizeof(*psy_desc), GFP_KERNEL);
+ if (!psy_desc)
+ return -ENOMEM;
+
+ psy_desc->name = name;
+ psy_desc->type = POWER_SUPPLY_TYPE_BATTERY;
if (di->chip == BQ27425) {
- di->bat.properties = bq27425_battery_props;
- di->bat.num_properties = ARRAY_SIZE(bq27425_battery_props);
+ psy_desc->properties = bq27425_battery_props;
+ psy_desc->num_properties = ARRAY_SIZE(bq27425_battery_props);
} else if (di->chip == BQ27742) {
- di->bat.properties = bq27742_battery_props;
- di->bat.num_properties = ARRAY_SIZE(bq27742_battery_props);
+ psy_desc->properties = bq27742_battery_props;
+ psy_desc->num_properties = ARRAY_SIZE(bq27742_battery_props);
+ } else if (di->chip == BQ27510) {
+ psy_desc->properties = bq27510_battery_props;
+ psy_desc->num_properties = ARRAY_SIZE(bq27510_battery_props);
} else {
- di->bat.properties = bq27x00_battery_props;
- di->bat.num_properties = ARRAY_SIZE(bq27x00_battery_props);
+ psy_desc->properties = bq27x00_battery_props;
+ psy_desc->num_properties = ARRAY_SIZE(bq27x00_battery_props);
}
- di->bat.get_property = bq27x00_battery_get_property;
- di->bat.external_power_changed = bq27x00_external_power_changed;
+ psy_desc->get_property = bq27x00_battery_get_property;
+ psy_desc->external_power_changed = bq27x00_external_power_changed;
INIT_DELAYED_WORK(&di->work, bq27x00_battery_poll);
mutex_init(&di->lock);
- ret = power_supply_register(di->dev, &di->bat);
- if (ret) {
+ di->bat = power_supply_register_no_ws(di->dev, psy_desc, &psy_cfg);
+ if (IS_ERR(di->bat)) {
+ ret = PTR_ERR(di->bat);
dev_err(di->dev, "failed to register battery: %d\n", ret);
return ret;
}
cancel_delayed_work_sync(&di->work);
- power_supply_unregister(&di->bat);
+ power_supply_unregister(di->bat);
mutex_destroy(&di->lock);
}
if (num < 0)
return num;
- name = kasprintf(GFP_KERNEL, "%s-%d", id->name, num);
+ name = devm_kasprintf(&client->dev, GFP_KERNEL, "%s-%d", id->name, num);
if (!name) {
dev_err(&client->dev, "failed to allocate device name\n");
retval = -ENOMEM;
- goto batt_failed_1;
+ goto batt_failed;
}
di = devm_kzalloc(&client->dev, sizeof(*di), GFP_KERNEL);
if (!di) {
dev_err(&client->dev, "failed to allocate device info data\n");
retval = -ENOMEM;
- goto batt_failed_2;
+ goto batt_failed;
}
di->id = num;
di->dev = &client->dev;
di->chip = id->driver_data;
- di->bat.name = name;
di->bus.read = &bq27x00_read_i2c;
- retval = bq27x00_powersupply_init(di);
+ retval = bq27x00_powersupply_init(di, name);
if (retval)
- goto batt_failed_2;
+ goto batt_failed;
i2c_set_clientdata(client, di);
return 0;
-batt_failed_2:
- kfree(name);
-batt_failed_1:
+batt_failed:
mutex_lock(&battery_mutex);
idr_remove(&battery_id, num);
mutex_unlock(&battery_mutex);
bq27x00_powersupply_unregister(di);
- kfree(di->bat.name);
-
mutex_lock(&battery_mutex);
idr_remove(&battery_id, di->id);
mutex_unlock(&battery_mutex);
{ "bq27500", BQ27500 },
{ "bq27425", BQ27425 },
{ "bq27742", BQ27742 },
+ { "bq27510", BQ27510 },
{},
};
MODULE_DEVICE_TABLE(i2c, bq27x00_id);
{
struct bq27x00_device_info *di;
struct bq27000_platform_data *pdata = pdev->dev.platform_data;
+ const char *name;
if (!pdata) {
dev_err(&pdev->dev, "no platform_data supplied\n");
di->dev = &pdev->dev;
di->chip = BQ27000;
- di->bat.name = pdata->name ?: dev_name(&pdev->dev);
+ name = pdata->name ?: dev_name(&pdev->dev);
di->bus.read = &bq27000_read_platform;
- return bq27x00_powersupply_init(di);
+ return bq27x00_powersupply_init(di, name);
}
static int bq27000_battery_remove(struct platform_device *pdev)
if (!psy)
break;
- ret = psy->get_property(psy,
- POWER_SUPPLY_PROP_PRESENT, &val);
+ ret = power_supply_get_property(psy, POWER_SUPPLY_PROP_PRESENT,
+ &val);
if (ret == 0 && val.intval)
present = true;
+ power_supply_put(psy);
break;
case CM_CHARGER_STAT:
for (i = 0; cm->desc->psy_charger_stat[i]; i++) {
continue;
}
- ret = psy->get_property(psy, POWER_SUPPLY_PROP_PRESENT,
- &val);
+ ret = power_supply_get_property(psy,
+ POWER_SUPPLY_PROP_PRESENT, &val);
+ power_supply_put(psy);
if (ret == 0 && val.intval) {
present = true;
break;
continue;
}
- ret = psy->get_property(psy, POWER_SUPPLY_PROP_ONLINE, &val);
+ ret = power_supply_get_property(psy, POWER_SUPPLY_PROP_ONLINE,
+ &val);
+ power_supply_put(psy);
if (ret == 0 && val.intval) {
online = true;
break;
if (!fuel_gauge)
return -ENODEV;
- ret = fuel_gauge->get_property(fuel_gauge,
+ ret = power_supply_get_property(fuel_gauge,
POWER_SUPPLY_PROP_VOLTAGE_NOW, &val);
+ power_supply_put(fuel_gauge);
if (ret)
return ret;
}
/* 2. The charger should be online (ext-power) */
- ret = psy->get_property(psy, POWER_SUPPLY_PROP_ONLINE, &val);
+ ret = power_supply_get_property(psy, POWER_SUPPLY_PROP_ONLINE,
+ &val);
if (ret) {
dev_warn(cm->dev, "Cannot read ONLINE value from %s\n",
cm->desc->psy_charger_stat[i]);
+ power_supply_put(psy);
continue;
}
- if (val.intval == 0)
+ if (val.intval == 0) {
+ power_supply_put(psy);
continue;
+ }
/*
* 3. The charger should not be FULL, DISCHARGING,
* or NOT_CHARGING.
*/
- ret = psy->get_property(psy, POWER_SUPPLY_PROP_STATUS, &val);
+ ret = power_supply_get_property(psy, POWER_SUPPLY_PROP_STATUS,
+ &val);
+ power_supply_put(psy);
if (ret) {
dev_warn(cm->dev, "Cannot read STATUS value from %s\n",
cm->desc->psy_charger_stat[i]);
struct charger_desc *desc = cm->desc;
union power_supply_propval val;
struct power_supply *fuel_gauge;
+ bool is_full = false;
int ret = 0;
int uV;
val.intval = 0;
/* Not full if capacity of fuel gauge isn't full */
- ret = fuel_gauge->get_property(fuel_gauge,
+ ret = power_supply_get_property(fuel_gauge,
POWER_SUPPLY_PROP_CHARGE_FULL, &val);
- if (!ret && val.intval > desc->fullbatt_full_capacity)
- return true;
+ if (!ret && val.intval > desc->fullbatt_full_capacity) {
+ is_full = true;
+ goto out;
+ }
}
/* Full, if it's over the fullbatt voltage */
if (desc->fullbatt_uV > 0) {
ret = get_batt_uV(cm, &uV);
- if (!ret && uV >= desc->fullbatt_uV)
- return true;
+ if (!ret && uV >= desc->fullbatt_uV) {
+ is_full = true;
+ goto out;
+ }
}
/* Full, if the capacity is more than fullbatt_soc */
if (desc->fullbatt_soc > 0) {
val.intval = 0;
- ret = fuel_gauge->get_property(fuel_gauge,
+ ret = power_supply_get_property(fuel_gauge,
POWER_SUPPLY_PROP_CAPACITY, &val);
- if (!ret && val.intval >= desc->fullbatt_soc)
- return true;
+ if (!ret && val.intval >= desc->fullbatt_soc) {
+ is_full = true;
+ goto out;
+ }
}
- return false;
+out:
+ power_supply_put(fuel_gauge);
+ return is_full;
}
/**
int *temp)
{
struct power_supply *fuel_gauge;
+ int ret;
fuel_gauge = power_supply_get_by_name(cm->desc->psy_fuel_gauge);
if (!fuel_gauge)
return -ENODEV;
- return fuel_gauge->get_property(fuel_gauge,
+ ret = power_supply_get_property(fuel_gauge,
POWER_SUPPLY_PROP_TEMP,
(union power_supply_propval *)temp);
+ power_supply_put(fuel_gauge);
+
+ return ret;
}
static int cm_get_battery_temperature(struct charger_manager *cm,
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct charger_manager *cm = container_of(psy,
- struct charger_manager, charger_psy);
+ struct charger_manager *cm = power_supply_get_drvdata(psy);
struct charger_desc *desc = cm->desc;
- struct power_supply *fuel_gauge;
+ struct power_supply *fuel_gauge = NULL;
int ret = 0;
int uV;
ret = -ENODEV;
break;
}
- ret = fuel_gauge->get_property(fuel_gauge,
+ ret = power_supply_get_property(fuel_gauge,
POWER_SUPPLY_PROP_CURRENT_NOW, val);
break;
case POWER_SUPPLY_PROP_TEMP:
case POWER_SUPPLY_PROP_TEMP_AMBIENT:
return cm_get_battery_temperature(cm, &val->intval);
case POWER_SUPPLY_PROP_CAPACITY:
- fuel_gauge = power_supply_get_by_name(cm->desc->psy_fuel_gauge);
- if (!fuel_gauge) {
- ret = -ENODEV;
- break;
- }
-
if (!is_batt_present(cm)) {
/* There is no battery. Assume 100% */
val->intval = 100;
break;
}
- ret = fuel_gauge->get_property(fuel_gauge,
+ fuel_gauge = power_supply_get_by_name(cm->desc->psy_fuel_gauge);
+ if (!fuel_gauge) {
+ ret = -ENODEV;
+ break;
+ }
+
+ ret = power_supply_get_property(fuel_gauge,
POWER_SUPPLY_PROP_CAPACITY, val);
if (ret)
break;
break;
}
- ret = fuel_gauge->get_property(fuel_gauge,
+ ret = power_supply_get_property(fuel_gauge,
POWER_SUPPLY_PROP_CHARGE_NOW,
val);
if (ret) {
default:
return -EINVAL;
}
+ if (fuel_gauge)
+ power_supply_put(fuel_gauge);
return ret;
}
*/
};
-static struct power_supply psy_default = {
+static const struct power_supply_desc psy_default = {
.name = "battery",
.type = POWER_SUPPLY_TYPE_BATTERY,
.properties = default_charger_props,
dev_info(cm->dev, "'%s' regulator's externally_control is %d\n",
charger->regulator_name, charger->externally_control);
- ret = sysfs_create_group(&cm->charger_psy.dev->kobj,
+ ret = sysfs_create_group(&cm->charger_psy->dev.kobj,
&charger->attr_g);
if (ret < 0) {
dev_err(cm->dev, "Cannot create sysfs entry of %s regulator\n",
int ret;
/* Verify whether fuel gauge provides battery temperature */
- ret = fuel_gauge->get_property(fuel_gauge,
+ ret = power_supply_get_property(fuel_gauge,
POWER_SUPPLY_PROP_TEMP, &val);
if (!ret) {
- cm->charger_psy.properties[cm->charger_psy.num_properties] =
+ cm->charger_psy_desc.properties[cm->charger_psy_desc.num_properties] =
POWER_SUPPLY_PROP_TEMP;
- cm->charger_psy.num_properties++;
+ cm->charger_psy_desc.num_properties++;
cm->desc->measure_battery_temp = true;
}
#ifdef CONFIG_THERMAL
return PTR_ERR(cm->tzd_batt);
/* Use external thermometer */
- cm->charger_psy.properties[cm->charger_psy.num_properties] =
+ cm->charger_psy_desc.properties[cm->charger_psy_desc.num_properties] =
POWER_SUPPLY_PROP_TEMP_AMBIENT;
- cm->charger_psy.num_properties++;
+ cm->charger_psy_desc.num_properties++;
cm->desc->measure_battery_temp = true;
ret = 0;
}
return ret;
}
-static struct of_device_id charger_manager_match[] = {
+static const struct of_device_id charger_manager_match[] = {
{
.compatible = "charger-manager",
},
int j = 0;
union power_supply_propval val;
struct power_supply *fuel_gauge;
+ struct power_supply_config psy_cfg = {};
if (IS_ERR(desc)) {
dev_err(&pdev->dev, "No platform data (desc) found\n");
/* Basic Values. Unspecified are Null or 0 */
cm->dev = &pdev->dev;
cm->desc = desc;
+ psy_cfg.drv_data = cm;
/* Initialize alarm timer */
if (alarmtimer_get_rtcdev()) {
desc->psy_charger_stat[i]);
return -ENODEV;
}
- }
-
- fuel_gauge = power_supply_get_by_name(desc->psy_fuel_gauge);
- if (!fuel_gauge) {
- dev_err(&pdev->dev, "Cannot find power supply \"%s\"\n",
- desc->psy_fuel_gauge);
- return -ENODEV;
+ power_supply_put(psy);
}
if (desc->polling_interval_ms == 0 ||
platform_set_drvdata(pdev, cm);
- memcpy(&cm->charger_psy, &psy_default, sizeof(psy_default));
+ memcpy(&cm->charger_psy_desc, &psy_default, sizeof(psy_default));
if (!desc->psy_name)
strncpy(cm->psy_name_buf, psy_default.name, PSY_NAME_MAX);
else
strncpy(cm->psy_name_buf, desc->psy_name, PSY_NAME_MAX);
- cm->charger_psy.name = cm->psy_name_buf;
+ cm->charger_psy_desc.name = cm->psy_name_buf;
/* Allocate for psy properties because they may vary */
- cm->charger_psy.properties = devm_kzalloc(&pdev->dev,
+ cm->charger_psy_desc.properties = devm_kzalloc(&pdev->dev,
sizeof(enum power_supply_property)
* (ARRAY_SIZE(default_charger_props) +
NUM_CHARGER_PSY_OPTIONAL), GFP_KERNEL);
- if (!cm->charger_psy.properties)
+ if (!cm->charger_psy_desc.properties)
return -ENOMEM;
- memcpy(cm->charger_psy.properties, default_charger_props,
+ memcpy(cm->charger_psy_desc.properties, default_charger_props,
sizeof(enum power_supply_property) *
ARRAY_SIZE(default_charger_props));
- cm->charger_psy.num_properties = psy_default.num_properties;
+ cm->charger_psy_desc.num_properties = psy_default.num_properties;
/* Find which optional psy-properties are available */
- if (!fuel_gauge->get_property(fuel_gauge,
+ fuel_gauge = power_supply_get_by_name(desc->psy_fuel_gauge);
+ if (!fuel_gauge) {
+ dev_err(&pdev->dev, "Cannot find power supply \"%s\"\n",
+ desc->psy_fuel_gauge);
+ return -ENODEV;
+ }
+ if (!power_supply_get_property(fuel_gauge,
POWER_SUPPLY_PROP_CHARGE_NOW, &val)) {
- cm->charger_psy.properties[cm->charger_psy.num_properties] =
+ cm->charger_psy_desc.properties[cm->charger_psy_desc.num_properties] =
POWER_SUPPLY_PROP_CHARGE_NOW;
- cm->charger_psy.num_properties++;
+ cm->charger_psy_desc.num_properties++;
}
- if (!fuel_gauge->get_property(fuel_gauge,
+ if (!power_supply_get_property(fuel_gauge,
POWER_SUPPLY_PROP_CURRENT_NOW,
&val)) {
- cm->charger_psy.properties[cm->charger_psy.num_properties] =
+ cm->charger_psy_desc.properties[cm->charger_psy_desc.num_properties] =
POWER_SUPPLY_PROP_CURRENT_NOW;
- cm->charger_psy.num_properties++;
+ cm->charger_psy_desc.num_properties++;
}
ret = cm_init_thermal_data(cm, fuel_gauge);
dev_err(&pdev->dev, "Failed to initialize thermal data\n");
cm->desc->measure_battery_temp = false;
}
+ power_supply_put(fuel_gauge);
INIT_DELAYED_WORK(&cm->fullbatt_vchk_work, fullbatt_vchk);
- ret = power_supply_register(NULL, &cm->charger_psy);
- if (ret) {
+ cm->charger_psy = power_supply_register(NULL, &cm->charger_psy_desc,
+ &psy_cfg);
+ if (IS_ERR(cm->charger_psy)) {
dev_err(&pdev->dev, "Cannot register charger-manager with name \"%s\"\n",
- cm->charger_psy.name);
- return ret;
+ cm->charger_psy_desc.name);
+ return PTR_ERR(cm->charger_psy);
}
/* Register extcon device for charger cable */
struct charger_regulator *charger;
charger = &desc->charger_regulators[i];
- sysfs_remove_group(&cm->charger_psy.dev->kobj,
+ sysfs_remove_group(&cm->charger_psy->dev.kobj,
&charger->attr_g);
}
err_reg_extcon:
regulator_put(desc->charger_regulators[i].consumer);
}
- power_supply_unregister(&cm->charger_psy);
+ power_supply_unregister(cm->charger_psy);
return ret;
}
for (i = 0 ; i < desc->num_charger_regulators ; i++)
regulator_put(desc->charger_regulators[i].consumer);
- power_supply_unregister(&cm->charger_psy);
+ power_supply_unregister(cm->charger_psy);
try_charger_enable(cm, false);
bool found = false;
for (i = 0; cm->desc->psy_charger_stat[i]; i++) {
- if (!strcmp(psy->name, cm->desc->psy_charger_stat[i])) {
+ if (!strcmp(psy->desc->name, cm->desc->psy_charger_stat[i])) {
found = true;
break;
}
struct collie_bat {
int status;
- struct power_supply psy;
+ struct power_supply *psy;
int full_chrg;
struct mutex work_lock; /* protects data */
union power_supply_propval *val)
{
int ret = 0;
- struct collie_bat *bat = container_of(psy, struct collie_bat, psy);
+ struct collie_bat *bat = power_supply_get_drvdata(psy);
if (bat->is_present && !bat->is_present(bat)
&& psp != POWER_SUPPLY_PROP_PRESENT) {
static void collie_bat_update(struct collie_bat *bat)
{
int old;
- struct power_supply *psy = &bat->psy;
+ struct power_supply *psy = bat->psy;
mutex_lock(&bat->work_lock);
old = bat->status;
if (bat->is_present && !bat->is_present(bat)) {
- printk(KERN_NOTICE "%s not present\n", psy->name);
+ printk(KERN_NOTICE "%s not present\n", psy->desc->name);
bat->status = POWER_SUPPLY_STATUS_UNKNOWN;
bat->full_chrg = -1;
} else if (power_supply_am_i_supplied(psy)) {
POWER_SUPPLY_PROP_PRESENT,
};
+static const struct power_supply_desc collie_bat_main_desc = {
+ .name = "main-battery",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = collie_bat_main_props,
+ .num_properties = ARRAY_SIZE(collie_bat_main_props),
+ .get_property = collie_bat_get_property,
+ .external_power_changed = collie_bat_external_power_changed,
+ .use_for_apm = 1,
+};
+
static struct collie_bat collie_bat_main = {
.status = POWER_SUPPLY_STATUS_DISCHARGING,
.full_chrg = -1,
- .psy = {
- .name = "main-battery",
- .type = POWER_SUPPLY_TYPE_BATTERY,
- .properties = collie_bat_main_props,
- .num_properties = ARRAY_SIZE(collie_bat_main_props),
- .get_property = collie_bat_get_property,
- .external_power_changed = collie_bat_external_power_changed,
- .use_for_apm = 1,
- },
+ .psy = NULL,
.gpio_full = COLLIE_GPIO_CO,
.gpio_charge_on = COLLIE_GPIO_CHARGE_ON,
.adc_temp_divider = 10000,
};
+static const struct power_supply_desc collie_bat_bu_desc = {
+ .name = "backup-battery",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = collie_bat_bu_props,
+ .num_properties = ARRAY_SIZE(collie_bat_bu_props),
+ .get_property = collie_bat_get_property,
+ .external_power_changed = collie_bat_external_power_changed,
+};
+
static struct collie_bat collie_bat_bu = {
.status = POWER_SUPPLY_STATUS_UNKNOWN,
.full_chrg = -1,
-
- .psy = {
- .name = "backup-battery",
- .type = POWER_SUPPLY_TYPE_BATTERY,
- .properties = collie_bat_bu_props,
- .num_properties = ARRAY_SIZE(collie_bat_bu_props),
- .get_property = collie_bat_get_property,
- .external_power_changed = collie_bat_external_power_changed,
- },
+ .psy = NULL,
.gpio_full = -1,
.gpio_charge_on = -1,
static int collie_bat_probe(struct ucb1x00_dev *dev)
{
int ret;
+ struct power_supply_config psy_main_cfg = {}, psy_bu_cfg = {};
if (!machine_is_collie())
return -ENODEV;
INIT_WORK(&bat_work, collie_bat_work);
- ret = power_supply_register(&dev->ucb->dev, &collie_bat_main.psy);
- if (ret)
+ psy_main_cfg.drv_data = &collie_bat_main;
+ collie_bat_main.psy = power_supply_register(&dev->ucb->dev,
+ &collie_bat_main_desc,
+ &psy_main_cfg);
+ if (IS_ERR(collie_bat_main.psy)) {
+ ret = PTR_ERR(collie_bat_main.psy);
goto err_psy_reg_main;
- ret = power_supply_register(&dev->ucb->dev, &collie_bat_bu.psy);
- if (ret)
+ }
+
+ psy_main_cfg.drv_data = &collie_bat_bu;
+ collie_bat_bu.psy = power_supply_register(&dev->ucb->dev,
+ &collie_bat_bu_desc,
+ &psy_bu_cfg);
+ if (IS_ERR(collie_bat_bu.psy)) {
+ ret = PTR_ERR(collie_bat_bu.psy);
goto err_psy_reg_bu;
+ }
ret = request_irq(gpio_to_irq(COLLIE_GPIO_CO),
collie_bat_gpio_isr,
return 0;
err_irq:
- power_supply_unregister(&collie_bat_bu.psy);
+ power_supply_unregister(collie_bat_bu.psy);
err_psy_reg_bu:
- power_supply_unregister(&collie_bat_main.psy);
+ power_supply_unregister(collie_bat_main.psy);
err_psy_reg_main:
/* see comment in collie_bat_remove */
{
free_irq(gpio_to_irq(COLLIE_GPIO_CO), &collie_bat_main);
- power_supply_unregister(&collie_bat_bu.psy);
- power_supply_unregister(&collie_bat_main.psy);
+ power_supply_unregister(collie_bat_bu.psy);
+ power_supply_unregister(collie_bat_main.psy);
/*
* Now cancel the bat_work. We won't get any more schedules,
};
struct da9030_charger {
- struct power_supply psy;
+ struct power_supply *psy;
+ struct power_supply_desc psy_desc;
struct device *master;
da903x_write(charger->master, DA9030_CHARGE_CONTROL, val);
- power_supply_changed(&charger->psy);
+ power_supply_changed(charger->psy);
}
static void da9030_charger_check_state(struct da9030_charger *charger)
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct da9030_charger *charger;
- charger = container_of(psy, struct da9030_charger, psy);
+ struct da9030_charger *charger = power_supply_get_drvdata(psy);
switch (psp) {
case POWER_SUPPLY_PROP_STATUS:
static void da9030_battery_setup_psy(struct da9030_charger *charger)
{
- struct power_supply *psy = &charger->psy;
+ struct power_supply_desc *psy_desc = &charger->psy_desc;
struct power_supply_info *info = charger->battery_info;
- psy->name = info->name;
- psy->use_for_apm = info->use_for_apm;
- psy->type = POWER_SUPPLY_TYPE_BATTERY;
- psy->get_property = da9030_battery_get_property;
+ psy_desc->name = info->name;
+ psy_desc->use_for_apm = info->use_for_apm;
+ psy_desc->type = POWER_SUPPLY_TYPE_BATTERY;
+ psy_desc->get_property = da9030_battery_get_property;
- psy->properties = da9030_battery_props;
- psy->num_properties = ARRAY_SIZE(da9030_battery_props);
+ psy_desc->properties = da9030_battery_props;
+ psy_desc->num_properties = ARRAY_SIZE(da9030_battery_props);
};
static int da9030_battery_charger_init(struct da9030_charger *charger)
static int da9030_battery_probe(struct platform_device *pdev)
{
struct da9030_charger *charger;
+ struct power_supply_config psy_cfg = {};
struct da9030_battery_info *pdata = pdev->dev.platform_data;
int ret;
goto err_notifier;
da9030_battery_setup_psy(charger);
- ret = power_supply_register(&pdev->dev, &charger->psy);
- if (ret)
+ psy_cfg.drv_data = charger;
+ charger->psy = power_supply_register(&pdev->dev, &charger->psy_desc,
+ &psy_cfg);
+ if (IS_ERR(charger->psy)) {
+ ret = PTR_ERR(charger->psy);
goto err_ps_register;
+ }
charger->debug_file = da9030_bat_create_debugfs(charger);
platform_set_drvdata(pdev, charger);
DA9030_EVENT_CHIOVER | DA9030_EVENT_TBAT);
cancel_delayed_work_sync(&charger->work);
da9030_set_charge(charger, 0);
- power_supply_unregister(&charger->psy);
+ power_supply_unregister(charger->psy);
return 0;
}
struct da9052_battery {
struct da9052 *da9052;
- struct power_supply psy;
+ struct power_supply *psy;
struct notifier_block nb;
int charger_type;
int status;
if (irq == DA9052_IRQ_CHGEND || irq == DA9052_IRQ_DCIN ||
irq == DA9052_IRQ_VBUS || irq == DA9052_IRQ_TBAT) {
- power_supply_changed(&bat->psy);
+ power_supply_changed(bat->psy);
}
return IRQ_HANDLED;
{
int ret;
int illegal;
- struct da9052_battery *bat = container_of(psy, struct da9052_battery,
- psy);
+ struct da9052_battery *bat = power_supply_get_drvdata(psy);
ret = da9052_bat_check_presence(bat, &illegal);
if (ret < 0)
POWER_SUPPLY_PROP_TECHNOLOGY,
};
-static struct power_supply template_battery = {
+static struct power_supply_desc psy_desc = {
.name = "da9052-bat",
.type = POWER_SUPPLY_TYPE_BATTERY,
.properties = da9052_bat_props,
{
struct da9052_pdata *pdata;
struct da9052_battery *bat;
+ struct power_supply_config psy_cfg = {};
int ret;
int i;
if (!bat)
return -ENOMEM;
+ psy_cfg.drv_data = bat;
+
bat->da9052 = dev_get_drvdata(pdev->dev.parent);
- bat->psy = template_battery;
bat->charger_type = DA9052_NOCHARGER;
bat->status = POWER_SUPPLY_STATUS_UNKNOWN;
bat->health = POWER_SUPPLY_HEALTH_UNKNOWN;
pdata = bat->da9052->dev->platform_data;
if (pdata != NULL && pdata->use_for_apm)
- bat->psy.use_for_apm = pdata->use_for_apm;
+ psy_desc.use_for_apm = pdata->use_for_apm;
else
- bat->psy.use_for_apm = 1;
+ psy_desc.use_for_apm = 1;
for (i = 0; i < ARRAY_SIZE(da9052_bat_irqs); i++) {
ret = da9052_request_irq(bat->da9052,
}
}
- ret = power_supply_register(&pdev->dev, &bat->psy);
- if (ret)
+ bat->psy = power_supply_register(&pdev->dev, &psy_desc, &psy_cfg);
+ if (IS_ERR(bat->psy)) {
+ ret = PTR_ERR(bat->psy);
goto err;
+ }
platform_set_drvdata(pdev, bat);
return 0;
for (i = 0; i < ARRAY_SIZE(da9052_bat_irqs); i++)
da9052_free_irq(bat->da9052, da9052_bat_irq_bits[i], bat);
- power_supply_unregister(&bat->psy);
+ power_supply_unregister(bat->psy);
return 0;
}
--- /dev/null
+/*
+ * DA9150 Charger Driver
+ *
+ * Copyright (c) 2014 Dialog Semiconductor
+ *
+ * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/interrupt.h>
+#include <linux/power_supply.h>
+#include <linux/notifier.h>
+#include <linux/usb/phy.h>
+#include <linux/iio/consumer.h>
+#include <linux/mfd/da9150/core.h>
+#include <linux/mfd/da9150/registers.h>
+
+/* Private data */
+struct da9150_charger {
+ struct da9150 *da9150;
+ struct device *dev;
+
+ struct power_supply *usb;
+ struct power_supply *battery;
+ struct power_supply *supply_online;
+
+ struct usb_phy *usb_phy;
+ struct notifier_block otg_nb;
+ struct work_struct otg_work;
+ unsigned long usb_event;
+
+ struct iio_channel *ibus_chan;
+ struct iio_channel *vbus_chan;
+ struct iio_channel *tjunc_chan;
+ struct iio_channel *vbat_chan;
+};
+
+static inline int da9150_charger_supply_online(struct da9150_charger *charger,
+ struct power_supply *psy,
+ union power_supply_propval *val)
+{
+ val->intval = (psy == charger->supply_online) ? 1 : 0;
+
+ return 0;
+}
+
+/* Charger Properties */
+static int da9150_charger_vbus_voltage_now(struct da9150_charger *charger,
+ union power_supply_propval *val)
+{
+ int v_val, ret;
+
+ /* Read processed value - mV units */
+ ret = iio_read_channel_processed(charger->vbus_chan, &v_val);
+ if (ret < 0)
+ return ret;
+
+ /* Convert voltage to expected uV units */
+ val->intval = v_val * 1000;
+
+ return 0;
+}
+
+static int da9150_charger_ibus_current_avg(struct da9150_charger *charger,
+ union power_supply_propval *val)
+{
+ int i_val, ret;
+
+ /* Read processed value - mA units */
+ ret = iio_read_channel_processed(charger->ibus_chan, &i_val);
+ if (ret < 0)
+ return ret;
+
+ /* Convert current to expected uA units */
+ val->intval = i_val * 1000;
+
+ return 0;
+}
+
+static int da9150_charger_tjunc_temp(struct da9150_charger *charger,
+ union power_supply_propval *val)
+{
+ int t_val, ret;
+
+ /* Read processed value - 0.001 degrees C units */
+ ret = iio_read_channel_processed(charger->tjunc_chan, &t_val);
+ if (ret < 0)
+ return ret;
+
+ /* Convert temp to expect 0.1 degrees C units */
+ val->intval = t_val / 100;
+
+ return 0;
+}
+
+static enum power_supply_property da9150_charger_props[] = {
+ POWER_SUPPLY_PROP_ONLINE,
+ POWER_SUPPLY_PROP_VOLTAGE_NOW,
+ POWER_SUPPLY_PROP_CURRENT_AVG,
+ POWER_SUPPLY_PROP_TEMP,
+};
+
+static int da9150_charger_get_prop(struct power_supply *psy,
+ enum power_supply_property psp,
+ union power_supply_propval *val)
+{
+ struct da9150_charger *charger = dev_get_drvdata(psy->dev.parent);
+ int ret;
+
+ switch (psp) {
+ case POWER_SUPPLY_PROP_ONLINE:
+ ret = da9150_charger_supply_online(charger, psy, val);
+ break;
+ case POWER_SUPPLY_PROP_VOLTAGE_NOW:
+ ret = da9150_charger_vbus_voltage_now(charger, val);
+ break;
+ case POWER_SUPPLY_PROP_CURRENT_AVG:
+ ret = da9150_charger_ibus_current_avg(charger, val);
+ break;
+ case POWER_SUPPLY_PROP_TEMP:
+ ret = da9150_charger_tjunc_temp(charger, val);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+
+ return ret;
+}
+
+/* Battery Properties */
+static int da9150_charger_battery_status(struct da9150_charger *charger,
+ union power_supply_propval *val)
+{
+ u8 reg;
+
+ /* Check to see if battery is discharging */
+ reg = da9150_reg_read(charger->da9150, DA9150_STATUS_H);
+
+ if (((reg & DA9150_VBUS_STAT_MASK) == DA9150_VBUS_STAT_OFF) ||
+ ((reg & DA9150_VBUS_STAT_MASK) == DA9150_VBUS_STAT_WAIT)) {
+ val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
+
+ return 0;
+ }
+
+ reg = da9150_reg_read(charger->da9150, DA9150_STATUS_J);
+
+ /* Now check for other states */
+ switch (reg & DA9150_CHG_STAT_MASK) {
+ case DA9150_CHG_STAT_ACT:
+ case DA9150_CHG_STAT_PRE:
+ case DA9150_CHG_STAT_CC:
+ case DA9150_CHG_STAT_CV:
+ val->intval = POWER_SUPPLY_STATUS_CHARGING;
+ break;
+ case DA9150_CHG_STAT_OFF:
+ case DA9150_CHG_STAT_SUSP:
+ case DA9150_CHG_STAT_TEMP:
+ case DA9150_CHG_STAT_TIME:
+ case DA9150_CHG_STAT_BAT:
+ val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
+ break;
+ case DA9150_CHG_STAT_FULL:
+ val->intval = POWER_SUPPLY_STATUS_FULL;
+ break;
+ default:
+ val->intval = POWER_SUPPLY_STATUS_UNKNOWN;
+ break;
+ }
+
+ return 0;
+}
+
+static int da9150_charger_battery_health(struct da9150_charger *charger,
+ union power_supply_propval *val)
+{
+ u8 reg;
+
+ reg = da9150_reg_read(charger->da9150, DA9150_STATUS_J);
+
+ /* Check if temperature limit reached */
+ switch (reg & DA9150_CHG_TEMP_MASK) {
+ case DA9150_CHG_TEMP_UNDER:
+ val->intval = POWER_SUPPLY_HEALTH_COLD;
+ return 0;
+ case DA9150_CHG_TEMP_OVER:
+ val->intval = POWER_SUPPLY_HEALTH_OVERHEAT;
+ return 0;
+ default:
+ break;
+ }
+
+ /* Check for other health states */
+ switch (reg & DA9150_CHG_STAT_MASK) {
+ case DA9150_CHG_STAT_ACT:
+ case DA9150_CHG_STAT_PRE:
+ val->intval = POWER_SUPPLY_HEALTH_DEAD;
+ break;
+ case DA9150_CHG_STAT_TIME:
+ val->intval = POWER_SUPPLY_HEALTH_UNSPEC_FAILURE;
+ break;
+ default:
+ val->intval = POWER_SUPPLY_HEALTH_GOOD;
+ break;
+ }
+
+ return 0;
+}
+
+static int da9150_charger_battery_present(struct da9150_charger *charger,
+ union power_supply_propval *val)
+{
+ u8 reg;
+
+ /* Check if battery present or removed */
+ reg = da9150_reg_read(charger->da9150, DA9150_STATUS_J);
+ if ((reg & DA9150_CHG_STAT_MASK) == DA9150_CHG_STAT_BAT)
+ val->intval = 0;
+ else
+ val->intval = 1;
+
+ return 0;
+}
+
+static int da9150_charger_battery_charge_type(struct da9150_charger *charger,
+ union power_supply_propval *val)
+{
+ u8 reg;
+
+ reg = da9150_reg_read(charger->da9150, DA9150_STATUS_J);
+
+ switch (reg & DA9150_CHG_STAT_MASK) {
+ case DA9150_CHG_STAT_CC:
+ val->intval = POWER_SUPPLY_CHARGE_TYPE_FAST;
+ break;
+ case DA9150_CHG_STAT_ACT:
+ case DA9150_CHG_STAT_PRE:
+ case DA9150_CHG_STAT_CV:
+ val->intval = POWER_SUPPLY_CHARGE_TYPE_TRICKLE;
+ break;
+ default:
+ val->intval = POWER_SUPPLY_CHARGE_TYPE_NONE;
+ break;
+ }
+
+ return 0;
+}
+
+static int da9150_charger_battery_voltage_min(struct da9150_charger *charger,
+ union power_supply_propval *val)
+{
+ u8 reg;
+
+ reg = da9150_reg_read(charger->da9150, DA9150_PPR_CHGCTRL_C);
+
+ /* Value starts at 2500 mV, 50 mV increments, presented in uV */
+ val->intval = ((reg & DA9150_CHG_VFAULT_MASK) * 50000) + 2500000;
+
+ return 0;
+}
+
+static int da9150_charger_battery_voltage_now(struct da9150_charger *charger,
+ union power_supply_propval *val)
+{
+ int v_val, ret;
+
+ /* Read processed value - mV units */
+ ret = iio_read_channel_processed(charger->vbat_chan, &v_val);
+ if (ret < 0)
+ return ret;
+
+ val->intval = v_val * 1000;
+
+ return 0;
+}
+
+static int da9150_charger_battery_current_max(struct da9150_charger *charger,
+ union power_supply_propval *val)
+{
+ int reg;
+
+ reg = da9150_reg_read(charger->da9150, DA9150_PPR_CHGCTRL_D);
+
+ /* 25mA increments */
+ val->intval = reg * 25000;
+
+ return 0;
+}
+
+static int da9150_charger_battery_voltage_max(struct da9150_charger *charger,
+ union power_supply_propval *val)
+{
+ u8 reg;
+
+ reg = da9150_reg_read(charger->da9150, DA9150_PPR_CHGCTRL_B);
+
+ /* Value starts at 3650 mV, 25 mV increments, presented in uV */
+ val->intval = ((reg & DA9150_CHG_VBAT_MASK) * 25000) + 3650000;
+ return 0;
+}
+
+static enum power_supply_property da9150_charger_bat_props[] = {
+ POWER_SUPPLY_PROP_STATUS,
+ POWER_SUPPLY_PROP_ONLINE,
+ POWER_SUPPLY_PROP_HEALTH,
+ POWER_SUPPLY_PROP_PRESENT,
+ POWER_SUPPLY_PROP_CHARGE_TYPE,
+ POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
+ POWER_SUPPLY_PROP_VOLTAGE_NOW,
+ POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX,
+ POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX,
+};
+
+static int da9150_charger_battery_get_prop(struct power_supply *psy,
+ enum power_supply_property psp,
+ union power_supply_propval *val)
+{
+ struct da9150_charger *charger = dev_get_drvdata(psy->dev.parent);
+ int ret;
+
+ switch (psp) {
+ case POWER_SUPPLY_PROP_STATUS:
+ ret = da9150_charger_battery_status(charger, val);
+ break;
+ case POWER_SUPPLY_PROP_ONLINE:
+ ret = da9150_charger_supply_online(charger, psy, val);
+ break;
+ case POWER_SUPPLY_PROP_HEALTH:
+ ret = da9150_charger_battery_health(charger, val);
+ break;
+ case POWER_SUPPLY_PROP_PRESENT:
+ ret = da9150_charger_battery_present(charger, val);
+ break;
+ case POWER_SUPPLY_PROP_CHARGE_TYPE:
+ ret = da9150_charger_battery_charge_type(charger, val);
+ break;
+ case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
+ ret = da9150_charger_battery_voltage_min(charger, val);
+ break;
+ case POWER_SUPPLY_PROP_VOLTAGE_NOW:
+ ret = da9150_charger_battery_voltage_now(charger, val);
+ break;
+ case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX:
+ ret = da9150_charger_battery_current_max(charger, val);
+ break;
+ case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX:
+ ret = da9150_charger_battery_voltage_max(charger, val);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+
+ return ret;
+}
+
+static irqreturn_t da9150_charger_chg_irq(int irq, void *data)
+{
+ struct da9150_charger *charger = data;
+
+ power_supply_changed(charger->battery);
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t da9150_charger_tjunc_irq(int irq, void *data)
+{
+ struct da9150_charger *charger = data;
+
+ /* Nothing we can really do except report this. */
+ dev_crit(charger->dev, "TJunc over temperature!!!\n");
+ power_supply_changed(charger->usb);
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t da9150_charger_vfault_irq(int irq, void *data)
+{
+ struct da9150_charger *charger = data;
+
+ /* Nothing we can really do except report this. */
+ dev_crit(charger->dev, "VSYS under voltage!!!\n");
+ power_supply_changed(charger->usb);
+ power_supply_changed(charger->battery);
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t da9150_charger_vbus_irq(int irq, void *data)
+{
+ struct da9150_charger *charger = data;
+ u8 reg;
+
+ reg = da9150_reg_read(charger->da9150, DA9150_STATUS_H);
+
+ /* Charger plugged in or battery only */
+ switch (reg & DA9150_VBUS_STAT_MASK) {
+ case DA9150_VBUS_STAT_OFF:
+ case DA9150_VBUS_STAT_WAIT:
+ charger->supply_online = charger->battery;
+ break;
+ case DA9150_VBUS_STAT_CHG:
+ charger->supply_online = charger->usb;
+ break;
+ default:
+ dev_warn(charger->dev, "Unknown VBUS state - reg = 0x%x\n",
+ reg);
+ charger->supply_online = NULL;
+ break;
+ }
+
+ power_supply_changed(charger->usb);
+ power_supply_changed(charger->battery);
+
+ return IRQ_HANDLED;
+}
+
+static void da9150_charger_otg_work(struct work_struct *data)
+{
+ struct da9150_charger *charger =
+ container_of(data, struct da9150_charger, otg_work);
+
+ switch (charger->usb_event) {
+ case USB_EVENT_ID:
+ /* Enable OTG Boost */
+ da9150_set_bits(charger->da9150, DA9150_PPR_BKCTRL_A,
+ DA9150_VBUS_MODE_MASK, DA9150_VBUS_MODE_OTG);
+ break;
+ case USB_EVENT_NONE:
+ /* Revert to charge mode */
+ power_supply_changed(charger->usb);
+ power_supply_changed(charger->battery);
+ da9150_set_bits(charger->da9150, DA9150_PPR_BKCTRL_A,
+ DA9150_VBUS_MODE_MASK, DA9150_VBUS_MODE_CHG);
+ break;
+ }
+}
+
+static int da9150_charger_otg_ncb(struct notifier_block *nb, unsigned long val,
+ void *priv)
+{
+ struct da9150_charger *charger =
+ container_of(nb, struct da9150_charger, otg_nb);
+
+ dev_dbg(charger->dev, "DA9150 OTG notify %lu\n", val);
+
+ charger->usb_event = val;
+ schedule_work(&charger->otg_work);
+
+ return NOTIFY_OK;
+}
+
+static int da9150_charger_register_irq(struct platform_device *pdev,
+ irq_handler_t handler,
+ const char *irq_name)
+{
+ struct device *dev = &pdev->dev;
+ struct da9150_charger *charger = platform_get_drvdata(pdev);
+ int irq, ret;
+
+ irq = platform_get_irq_byname(pdev, irq_name);
+ if (irq < 0) {
+ dev_err(dev, "Failed to get IRQ CHG_STATUS: %d\n", irq);
+ return irq;
+ }
+
+ ret = request_threaded_irq(irq, NULL, handler, IRQF_ONESHOT, irq_name,
+ charger);
+ if (ret)
+ dev_err(dev, "Failed to request IRQ %d: %d\n", irq, ret);
+
+ return ret;
+}
+
+static void da9150_charger_unregister_irq(struct platform_device *pdev,
+ const char *irq_name)
+{
+ struct device *dev = &pdev->dev;
+ struct da9150_charger *charger = platform_get_drvdata(pdev);
+ int irq;
+
+ irq = platform_get_irq_byname(pdev, irq_name);
+ if (irq < 0) {
+ dev_err(dev, "Failed to get IRQ CHG_STATUS: %d\n", irq);
+ return;
+ }
+
+ free_irq(irq, charger);
+}
+
+static const struct power_supply_desc usb_desc = {
+ .name = "da9150-usb",
+ .type = POWER_SUPPLY_TYPE_USB,
+ .properties = da9150_charger_props,
+ .num_properties = ARRAY_SIZE(da9150_charger_props),
+ .get_property = da9150_charger_get_prop,
+};
+
+static const struct power_supply_desc battery_desc = {
+ .name = "da9150-battery",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = da9150_charger_bat_props,
+ .num_properties = ARRAY_SIZE(da9150_charger_bat_props),
+ .get_property = da9150_charger_battery_get_prop,
+};
+
+static int da9150_charger_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct da9150 *da9150 = dev_get_drvdata(dev->parent);
+ struct da9150_charger *charger;
+ u8 reg;
+ int ret;
+
+ charger = devm_kzalloc(dev, sizeof(struct da9150_charger), GFP_KERNEL);
+ if (!charger)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, charger);
+ charger->da9150 = da9150;
+ charger->dev = dev;
+
+ /* Acquire ADC channels */
+ charger->ibus_chan = iio_channel_get(dev, "CHAN_IBUS");
+ if (IS_ERR(charger->ibus_chan)) {
+ ret = PTR_ERR(charger->ibus_chan);
+ goto ibus_chan_fail;
+ }
+
+ charger->vbus_chan = iio_channel_get(dev, "CHAN_VBUS");
+ if (IS_ERR(charger->vbus_chan)) {
+ ret = PTR_ERR(charger->vbus_chan);
+ goto vbus_chan_fail;
+ }
+
+ charger->tjunc_chan = iio_channel_get(dev, "CHAN_TJUNC");
+ if (IS_ERR(charger->tjunc_chan)) {
+ ret = PTR_ERR(charger->tjunc_chan);
+ goto tjunc_chan_fail;
+ }
+
+ charger->vbat_chan = iio_channel_get(dev, "CHAN_VBAT");
+ if (IS_ERR(charger->vbat_chan)) {
+ ret = PTR_ERR(charger->vbat_chan);
+ goto vbat_chan_fail;
+ }
+
+ /* Register power supplies */
+ charger->usb = power_supply_register(dev, &usb_desc, NULL);
+ if (IS_ERR(charger->usb)) {
+ ret = PTR_ERR(charger->usb);
+ goto usb_fail;
+ }
+
+ charger->battery = power_supply_register(dev, &battery_desc, NULL);
+ if (IS_ERR(charger->battery)) {
+ ret = PTR_ERR(charger->battery);
+ goto battery_fail;
+ }
+
+ /* Get initial online supply */
+ reg = da9150_reg_read(da9150, DA9150_STATUS_H);
+
+ switch (reg & DA9150_VBUS_STAT_MASK) {
+ case DA9150_VBUS_STAT_OFF:
+ case DA9150_VBUS_STAT_WAIT:
+ charger->supply_online = charger->battery;
+ break;
+ case DA9150_VBUS_STAT_CHG:
+ charger->supply_online = charger->usb;
+ break;
+ default:
+ dev_warn(dev, "Unknown VBUS state - reg = 0x%x\n", reg);
+ charger->supply_online = NULL;
+ break;
+ }
+
+ /* Setup OTG reporting & configuration */
+ charger->usb_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
+ if (!IS_ERR_OR_NULL(charger->usb_phy)) {
+ INIT_WORK(&charger->otg_work, da9150_charger_otg_work);
+ charger->otg_nb.notifier_call = da9150_charger_otg_ncb;
+ usb_register_notifier(charger->usb_phy, &charger->otg_nb);
+ }
+
+ /* Register IRQs */
+ ret = da9150_charger_register_irq(pdev, da9150_charger_chg_irq,
+ "CHG_STATUS");
+ if (ret < 0)
+ goto chg_irq_fail;
+
+ ret = da9150_charger_register_irq(pdev, da9150_charger_tjunc_irq,
+ "CHG_TJUNC");
+ if (ret < 0)
+ goto tjunc_irq_fail;
+
+ ret = da9150_charger_register_irq(pdev, da9150_charger_vfault_irq,
+ "CHG_VFAULT");
+ if (ret < 0)
+ goto vfault_irq_fail;
+
+ ret = da9150_charger_register_irq(pdev, da9150_charger_vbus_irq,
+ "CHG_VBUS");
+ if (ret < 0)
+ goto vbus_irq_fail;
+
+ return 0;
+
+
+vbus_irq_fail:
+ da9150_charger_unregister_irq(pdev, "CHG_VFAULT");
+vfault_irq_fail:
+ da9150_charger_unregister_irq(pdev, "CHG_TJUNC");
+tjunc_irq_fail:
+ da9150_charger_unregister_irq(pdev, "CHG_STATUS");
+chg_irq_fail:
+ if (!IS_ERR_OR_NULL(charger->usb_phy))
+ usb_unregister_notifier(charger->usb_phy, &charger->otg_nb);
+battery_fail:
+ power_supply_unregister(charger->usb);
+
+usb_fail:
+ iio_channel_release(charger->vbat_chan);
+
+vbat_chan_fail:
+ iio_channel_release(charger->tjunc_chan);
+
+tjunc_chan_fail:
+ iio_channel_release(charger->vbus_chan);
+
+vbus_chan_fail:
+ iio_channel_release(charger->ibus_chan);
+
+ibus_chan_fail:
+ return ret;
+}
+
+static int da9150_charger_remove(struct platform_device *pdev)
+{
+ struct da9150_charger *charger = platform_get_drvdata(pdev);
+ int irq;
+
+ /* Make sure IRQs are released before unregistering power supplies */
+ irq = platform_get_irq_byname(pdev, "CHG_VBUS");
+ free_irq(irq, charger);
+
+ irq = platform_get_irq_byname(pdev, "CHG_VFAULT");
+ free_irq(irq, charger);
+
+ irq = platform_get_irq_byname(pdev, "CHG_TJUNC");
+ free_irq(irq, charger);
+
+ irq = platform_get_irq_byname(pdev, "CHG_STATUS");
+ free_irq(irq, charger);
+
+ if (!IS_ERR_OR_NULL(charger->usb_phy))
+ usb_unregister_notifier(charger->usb_phy, &charger->otg_nb);
+
+ power_supply_unregister(charger->battery);
+ power_supply_unregister(charger->usb);
+
+ /* Release ADC channels */
+ iio_channel_release(charger->ibus_chan);
+ iio_channel_release(charger->vbus_chan);
+ iio_channel_release(charger->tjunc_chan);
+ iio_channel_release(charger->vbat_chan);
+
+ return 0;
+}
+
+static struct platform_driver da9150_charger_driver = {
+ .driver = {
+ .name = "da9150-charger",
+ },
+ .probe = da9150_charger_probe,
+ .remove = da9150_charger_remove,
+};
+
+module_platform_driver(da9150_charger_driver);
+
+MODULE_DESCRIPTION("Charger Driver for DA9150");
+MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>");
+MODULE_LICENSE("GPL");
int charge_status; /* POWER_SUPPLY_STATUS_* */
int full_counter;
- struct power_supply bat;
+ struct power_supply *bat;
+ struct power_supply_desc bat_desc;
struct device *w1_dev;
struct workqueue_struct *monitor_wqueue;
struct delayed_work monitor_work;
if (di->charge_status == POWER_SUPPLY_STATUS_UNKNOWN)
di->full_counter = 0;
- if (power_supply_am_i_supplied(&di->bat)) {
+ if (power_supply_am_i_supplied(di->bat)) {
if (di->current_uA > 10000) {
di->charge_status = POWER_SUPPLY_STATUS_CHARGING;
di->full_counter = 0;
}
if (di->charge_status != old_charge_status)
- power_supply_changed(&di->bat);
+ power_supply_changed(di->bat);
}
static void ds2760_battery_write_status(struct ds2760_device_info *di,
queue_delayed_work(di->monitor_wqueue, &di->monitor_work, interval);
}
-#define to_ds2760_device_info(x) container_of((x), struct ds2760_device_info, \
- bat);
-
static void ds2760_battery_external_power_changed(struct power_supply *psy)
{
- struct ds2760_device_info *di = to_ds2760_device_info(psy);
+ struct ds2760_device_info *di = power_supply_get_drvdata(psy);
dev_dbg(di->dev, "%s\n", __func__);
* that error.
*/
- if (!power_supply_am_i_supplied(&di->bat))
+ if (!power_supply_am_i_supplied(di->bat))
return;
bias = (signed char) di->current_raw +
static void ds2760_battery_set_charged(struct power_supply *psy)
{
- struct ds2760_device_info *di = to_ds2760_device_info(psy);
+ struct ds2760_device_info *di = power_supply_get_drvdata(psy);
/* postpone the actual work by 20 secs. This is for debouncing GPIO
* signals and to let the current value settle. See AN4188. */
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct ds2760_device_info *di = to_ds2760_device_info(psy);
+ struct ds2760_device_info *di = power_supply_get_drvdata(psy);
switch (psp) {
case POWER_SUPPLY_PROP_STATUS:
enum power_supply_property psp,
const union power_supply_propval *val)
{
- struct ds2760_device_info *di = to_ds2760_device_info(psy);
+ struct ds2760_device_info *di = power_supply_get_drvdata(psy);
switch (psp) {
case POWER_SUPPLY_PROP_CHARGE_FULL:
static int ds2760_battery_probe(struct platform_device *pdev)
{
+ struct power_supply_config psy_cfg = {};
char status;
int retval = 0;
struct ds2760_device_info *di;
platform_set_drvdata(pdev, di);
- di->dev = &pdev->dev;
- di->w1_dev = pdev->dev.parent;
- di->bat.name = dev_name(&pdev->dev);
- di->bat.type = POWER_SUPPLY_TYPE_BATTERY;
- di->bat.properties = ds2760_battery_props;
- di->bat.num_properties = ARRAY_SIZE(ds2760_battery_props);
- di->bat.get_property = ds2760_battery_get_property;
- di->bat.set_property = ds2760_battery_set_property;
- di->bat.property_is_writeable =
+ di->dev = &pdev->dev;
+ di->w1_dev = pdev->dev.parent;
+ di->bat_desc.name = dev_name(&pdev->dev);
+ di->bat_desc.type = POWER_SUPPLY_TYPE_BATTERY;
+ di->bat_desc.properties = ds2760_battery_props;
+ di->bat_desc.num_properties = ARRAY_SIZE(ds2760_battery_props);
+ di->bat_desc.get_property = ds2760_battery_get_property;
+ di->bat_desc.set_property = ds2760_battery_set_property;
+ di->bat_desc.property_is_writeable =
ds2760_battery_property_is_writeable;
- di->bat.set_charged = ds2760_battery_set_charged;
- di->bat.external_power_changed =
+ di->bat_desc.set_charged = ds2760_battery_set_charged;
+ di->bat_desc.external_power_changed =
ds2760_battery_external_power_changed;
+ psy_cfg.drv_data = di;
+
di->charge_status = POWER_SUPPLY_STATUS_UNKNOWN;
/* enable sleep mode feature */
if (current_accum)
ds2760_battery_set_current_accum(di, current_accum);
- retval = power_supply_register(&pdev->dev, &di->bat);
- if (retval) {
+ di->bat = power_supply_register(&pdev->dev, &di->bat_desc, &psy_cfg);
+ if (IS_ERR(di->bat)) {
dev_err(di->dev, "failed to register battery\n");
+ retval = PTR_ERR(di->bat);
goto batt_failed;
}
goto success;
workqueue_failed:
- power_supply_unregister(&di->bat);
+ power_supply_unregister(di->bat);
batt_failed:
di_alloc_failed:
success:
cancel_delayed_work_sync(&di->monitor_work);
cancel_delayed_work_sync(&di->set_charged_work);
destroy_workqueue(di->monitor_wqueue);
- power_supply_unregister(&di->bat);
+ power_supply_unregister(di->bat);
return 0;
}
struct ds2760_device_info *di = platform_get_drvdata(pdev);
di->charge_status = POWER_SUPPLY_STATUS_UNKNOWN;
- power_supply_changed(&di->bat);
+ power_supply_changed(di->bat);
mod_delayed_work(di->monitor_wqueue, &di->monitor_work, HZ);
struct ds2780_device_info {
struct device *dev;
- struct power_supply bat;
+ struct power_supply *bat;
+ struct power_supply_desc bat_desc;
struct device *w1_dev;
};
static inline struct ds2780_device_info *
to_ds2780_device_info(struct power_supply *psy)
{
- return container_of(psy, struct ds2780_device_info, bat);
+ return power_supply_get_drvdata(psy);
}
static inline struct power_supply *to_power_supply(struct device *dev)
static int ds2780_battery_probe(struct platform_device *pdev)
{
+ struct power_supply_config psy_cfg = {};
int ret = 0;
struct ds2780_device_info *dev_info;
dev_info->dev = &pdev->dev;
dev_info->w1_dev = pdev->dev.parent;
- dev_info->bat.name = dev_name(&pdev->dev);
- dev_info->bat.type = POWER_SUPPLY_TYPE_BATTERY;
- dev_info->bat.properties = ds2780_battery_props;
- dev_info->bat.num_properties = ARRAY_SIZE(ds2780_battery_props);
- dev_info->bat.get_property = ds2780_battery_get_property;
+ dev_info->bat_desc.name = dev_name(&pdev->dev);
+ dev_info->bat_desc.type = POWER_SUPPLY_TYPE_BATTERY;
+ dev_info->bat_desc.properties = ds2780_battery_props;
+ dev_info->bat_desc.num_properties = ARRAY_SIZE(ds2780_battery_props);
+ dev_info->bat_desc.get_property = ds2780_battery_get_property;
- ret = power_supply_register(&pdev->dev, &dev_info->bat);
- if (ret) {
+ psy_cfg.drv_data = dev_info;
+
+ dev_info->bat = power_supply_register(&pdev->dev, &dev_info->bat_desc,
+ &psy_cfg);
+ if (IS_ERR(dev_info->bat)) {
dev_err(dev_info->dev, "failed to register battery\n");
+ ret = PTR_ERR(dev_info->bat);
goto fail;
}
- ret = sysfs_create_group(&dev_info->bat.dev->kobj, &ds2780_attr_group);
+ ret = sysfs_create_group(&dev_info->bat->dev.kobj, &ds2780_attr_group);
if (ret) {
dev_err(dev_info->dev, "failed to create sysfs group\n");
goto fail_unregister;
}
- ret = sysfs_create_bin_file(&dev_info->bat.dev->kobj,
+ ret = sysfs_create_bin_file(&dev_info->bat->dev.kobj,
&ds2780_param_eeprom_bin_attr);
if (ret) {
dev_err(dev_info->dev,
goto fail_remove_group;
}
- ret = sysfs_create_bin_file(&dev_info->bat.dev->kobj,
+ ret = sysfs_create_bin_file(&dev_info->bat->dev.kobj,
&ds2780_user_eeprom_bin_attr);
if (ret) {
dev_err(dev_info->dev,
return 0;
fail_remove_bin_file:
- sysfs_remove_bin_file(&dev_info->bat.dev->kobj,
+ sysfs_remove_bin_file(&dev_info->bat->dev.kobj,
&ds2780_param_eeprom_bin_attr);
fail_remove_group:
- sysfs_remove_group(&dev_info->bat.dev->kobj, &ds2780_attr_group);
+ sysfs_remove_group(&dev_info->bat->dev.kobj, &ds2780_attr_group);
fail_unregister:
- power_supply_unregister(&dev_info->bat);
+ power_supply_unregister(dev_info->bat);
fail:
return ret;
}
{
struct ds2780_device_info *dev_info = platform_get_drvdata(pdev);
- /* remove attributes */
- sysfs_remove_group(&dev_info->bat.dev->kobj, &ds2780_attr_group);
+ /*
+ * Remove attributes before unregistering power supply
+ * because 'bat' will be freed on power_supply_unregister() call.
+ */
+ sysfs_remove_group(&dev_info->bat->dev.kobj, &ds2780_attr_group);
- power_supply_unregister(&dev_info->bat);
+ power_supply_unregister(dev_info->bat);
return 0;
}
struct ds2781_device_info {
struct device *dev;
- struct power_supply bat;
+ struct power_supply *bat;
+ struct power_supply_desc bat_desc;
struct device *w1_dev;
};
static inline struct ds2781_device_info *
to_ds2781_device_info(struct power_supply *psy)
{
- return container_of(psy, struct ds2781_device_info, bat);
+ return power_supply_get_drvdata(psy);
}
static inline struct power_supply *to_power_supply(struct device *dev)
if (ret < 0)
return ret;
- if (power_supply_am_i_supplied(&dev_info->bat)) {
+ if (power_supply_am_i_supplied(dev_info->bat)) {
if (capacity == 100)
*status = POWER_SUPPLY_STATUS_FULL;
else if (current_uA > 50000)
static int ds2781_battery_probe(struct platform_device *pdev)
{
+ struct power_supply_config psy_cfg = {};
int ret = 0;
struct ds2781_device_info *dev_info;
dev_info->dev = &pdev->dev;
dev_info->w1_dev = pdev->dev.parent;
- dev_info->bat.name = dev_name(&pdev->dev);
- dev_info->bat.type = POWER_SUPPLY_TYPE_BATTERY;
- dev_info->bat.properties = ds2781_battery_props;
- dev_info->bat.num_properties = ARRAY_SIZE(ds2781_battery_props);
- dev_info->bat.get_property = ds2781_battery_get_property;
+ dev_info->bat_desc.name = dev_name(&pdev->dev);
+ dev_info->bat_desc.type = POWER_SUPPLY_TYPE_BATTERY;
+ dev_info->bat_desc.properties = ds2781_battery_props;
+ dev_info->bat_desc.num_properties = ARRAY_SIZE(ds2781_battery_props);
+ dev_info->bat_desc.get_property = ds2781_battery_get_property;
- ret = power_supply_register(&pdev->dev, &dev_info->bat);
- if (ret) {
+ psy_cfg.drv_data = dev_info;
+
+ dev_info->bat = power_supply_register(&pdev->dev, &dev_info->bat_desc,
+ &psy_cfg);
+ if (IS_ERR(dev_info->bat)) {
dev_err(dev_info->dev, "failed to register battery\n");
+ ret = PTR_ERR(dev_info->bat);
goto fail;
}
- ret = sysfs_create_group(&dev_info->bat.dev->kobj, &ds2781_attr_group);
+ ret = sysfs_create_group(&dev_info->bat->dev.kobj, &ds2781_attr_group);
if (ret) {
dev_err(dev_info->dev, "failed to create sysfs group\n");
goto fail_unregister;
}
- ret = sysfs_create_bin_file(&dev_info->bat.dev->kobj,
+ ret = sysfs_create_bin_file(&dev_info->bat->dev.kobj,
&ds2781_param_eeprom_bin_attr);
if (ret) {
dev_err(dev_info->dev,
goto fail_remove_group;
}
- ret = sysfs_create_bin_file(&dev_info->bat.dev->kobj,
+ ret = sysfs_create_bin_file(&dev_info->bat->dev.kobj,
&ds2781_user_eeprom_bin_attr);
if (ret) {
dev_err(dev_info->dev,
return 0;
fail_remove_bin_file:
- sysfs_remove_bin_file(&dev_info->bat.dev->kobj,
+ sysfs_remove_bin_file(&dev_info->bat->dev.kobj,
&ds2781_param_eeprom_bin_attr);
fail_remove_group:
- sysfs_remove_group(&dev_info->bat.dev->kobj, &ds2781_attr_group);
+ sysfs_remove_group(&dev_info->bat->dev.kobj, &ds2781_attr_group);
fail_unregister:
- power_supply_unregister(&dev_info->bat);
+ power_supply_unregister(dev_info->bat);
fail:
return ret;
}
{
struct ds2781_device_info *dev_info = platform_get_drvdata(pdev);
- /* remove attributes */
- sysfs_remove_group(&dev_info->bat.dev->kobj, &ds2781_attr_group);
+ /*
+ * Remove attributes before unregistering power supply
+ * because 'bat' will be freed on power_supply_unregister() call.
+ */
+ sysfs_remove_group(&dev_info->bat->dev.kobj, &ds2781_attr_group);
- power_supply_unregister(&dev_info->bat);
+ power_supply_unregister(dev_info->bat);
return 0;
}
int (*get_battery_capacity)(struct ds278x_info *info, int *capacity);
};
-#define to_ds278x_info(x) container_of(x, struct ds278x_info, battery)
+#define to_ds278x_info(x) power_supply_get_drvdata(x)
struct ds278x_info {
struct i2c_client *client;
- struct power_supply battery;
+ struct power_supply *battery;
+ struct power_supply_desc battery_desc;
struct ds278x_battery_ops *ops;
struct delayed_work bat_work;
int id;
ds278x_get_status(info, &info->status);
if ((old_status != info->status) || (old_capacity != info->capacity))
- power_supply_changed(&info->battery);
+ power_supply_changed(info->battery);
}
static void ds278x_bat_work(struct work_struct *work)
POWER_SUPPLY_PROP_TEMP,
};
-static void ds278x_power_supply_init(struct power_supply *battery)
+static void ds278x_power_supply_init(struct power_supply_desc *battery)
{
battery->type = POWER_SUPPLY_TYPE_BATTERY;
battery->properties = ds278x_battery_props;
{
struct ds278x_info *info = i2c_get_clientdata(client);
- power_supply_unregister(&info->battery);
- kfree(info->battery.name);
+ power_supply_unregister(info->battery);
+ kfree(info->battery_desc.name);
mutex_lock(&battery_lock);
idr_remove(&battery_id, info->id);
const struct i2c_device_id *id)
{
struct ds278x_platform_data *pdata = client->dev.platform_data;
+ struct power_supply_config psy_cfg = {};
struct ds278x_info *info;
int ret;
int num;
goto fail_info;
}
- info->battery.name = kasprintf(GFP_KERNEL, "%s-%d", client->name, num);
- if (!info->battery.name) {
+ info->battery_desc.name = kasprintf(GFP_KERNEL, "%s-%d",
+ client->name, num);
+ if (!info->battery_desc.name) {
ret = -ENOMEM;
goto fail_name;
}
info->client = client;
info->id = num;
info->ops = &ds278x_ops[id->driver_data];
- ds278x_power_supply_init(&info->battery);
+ ds278x_power_supply_init(&info->battery_desc);
+ psy_cfg.drv_data = info;
info->capacity = 100;
info->status = POWER_SUPPLY_STATUS_FULL;
INIT_DELAYED_WORK(&info->bat_work, ds278x_bat_work);
- ret = power_supply_register(&client->dev, &info->battery);
- if (ret) {
+ info->battery = power_supply_register(&client->dev,
+ &info->battery_desc, &psy_cfg);
+ if (IS_ERR(info->battery)) {
dev_err(&client->dev, "failed to register battery\n");
+ ret = PTR_ERR(info->battery);
goto fail_register;
} else {
schedule_delayed_work(&info->bat_work, DS278x_DELAY);
return 0;
fail_register:
- kfree(info->battery.name);
+ kfree(info->battery_desc.name);
fail_name:
kfree(info);
fail_info:
};
struct gab {
- struct power_supply psy;
+ struct power_supply *psy;
+ struct power_supply_desc psy_desc;
struct iio_channel *channel[GAB_MAX_CHAN_TYPE];
struct gab_platform_data *pdata;
struct delayed_work bat_work;
static struct gab *to_generic_bat(struct power_supply *psy)
{
- return container_of(psy, struct gab, psy);
+ return power_supply_get_drvdata(psy);
}
static void gab_ext_power_changed(struct power_supply *psy)
adc_bat = to_generic_bat(psy);
if (!adc_bat) {
- dev_err(psy->dev, "no battery infos ?!\n");
+ dev_err(&psy->dev, "no battery infos ?!\n");
return -EINVAL;
}
pdata = adc_bat->pdata;
switch (psp) {
case POWER_SUPPLY_PROP_STATUS:
- gab_get_status(adc_bat);
+ val->intval = gab_get_status(adc_bat);
break;
case POWER_SUPPLY_PROP_CHARGE_EMPTY_DESIGN:
val->intval = 0;
pdata = adc_bat->pdata;
status = adc_bat->status;
- is_plugged = power_supply_am_i_supplied(&adc_bat->psy);
+ is_plugged = power_supply_am_i_supplied(adc_bat->psy);
adc_bat->cable_plugged = is_plugged;
if (!is_plugged)
adc_bat->status = POWER_SUPPLY_STATUS_CHARGING;
if (status != adc_bat->status)
- power_supply_changed(&adc_bat->psy);
+ power_supply_changed(adc_bat->psy);
}
static irqreturn_t gab_charged(int irq, void *dev_id)
static int gab_probe(struct platform_device *pdev)
{
struct gab *adc_bat;
- struct power_supply *psy;
+ struct power_supply_desc *psy_desc;
+ struct power_supply_config psy_cfg = {};
struct gab_platform_data *pdata = pdev->dev.platform_data;
enum power_supply_property *properties;
int ret = 0;
return -ENOMEM;
}
- psy = &adc_bat->psy;
- psy->name = pdata->battery_info.name;
+ psy_cfg.drv_data = adc_bat;
+ psy_desc = &adc_bat->psy_desc;
+ psy_desc->name = pdata->battery_info.name;
/* bootup default values for the battery */
adc_bat->cable_plugged = false;
adc_bat->status = POWER_SUPPLY_STATUS_DISCHARGING;
- psy->type = POWER_SUPPLY_TYPE_BATTERY;
- psy->get_property = gab_get_property;
- psy->external_power_changed = gab_ext_power_changed;
+ psy_desc->type = POWER_SUPPLY_TYPE_BATTERY;
+ psy_desc->get_property = gab_get_property;
+ psy_desc->external_power_changed = gab_ext_power_changed;
adc_bat->pdata = pdata;
/*
* copying the static properties and allocating extra memory for holding
* the extra configurable properties received from platform data.
*/
- psy->properties = kcalloc(ARRAY_SIZE(gab_props) +
+ psy_desc->properties = kcalloc(ARRAY_SIZE(gab_props) +
ARRAY_SIZE(gab_chan_name),
- sizeof(*psy->properties), GFP_KERNEL);
- if (!psy->properties) {
+ sizeof(*psy_desc->properties),
+ GFP_KERNEL);
+ if (!psy_desc->properties) {
ret = -ENOMEM;
goto first_mem_fail;
}
- memcpy(psy->properties, gab_props, sizeof(gab_props));
+ memcpy(psy_desc->properties, gab_props, sizeof(gab_props));
properties = (enum power_supply_property *)
- ((char *)psy->properties + sizeof(gab_props));
+ ((char *)psy_desc->properties + sizeof(gab_props));
/*
* getting channel from iio and copying the battery properties
adc_bat->channel[chan] = NULL;
} else {
/* copying properties for supported channels only */
- memcpy(properties + sizeof(*(psy->properties)) * index,
+ memcpy(properties + sizeof(*(psy_desc->properties)) * index,
&gab_dyn_props[chan],
sizeof(gab_dyn_props[chan]));
index++;
* as come channels may be not be supported by the device.So
* we need to take care of that.
*/
- psy->num_properties = ARRAY_SIZE(gab_props) + index;
+ psy_desc->num_properties = ARRAY_SIZE(gab_props) + index;
- ret = power_supply_register(&pdev->dev, psy);
- if (ret)
+ adc_bat->psy = power_supply_register(&pdev->dev, psy_desc, &psy_cfg);
+ if (IS_ERR(adc_bat->psy)) {
+ ret = PTR_ERR(adc_bat->psy);
goto err_reg_fail;
+ }
INIT_DELAYED_WORK(&adc_bat->bat_work, gab_work);
err_gpio:
gpio_free(pdata->gpio_charge_finished);
gpio_req_fail:
- power_supply_unregister(psy);
+ power_supply_unregister(adc_bat->psy);
err_reg_fail:
for (chan = 0; chan < ARRAY_SIZE(gab_chan_name); chan++) {
if (adc_bat->channel[chan])
iio_channel_release(adc_bat->channel[chan]);
}
second_mem_fail:
- kfree(psy->properties);
+ kfree(psy_desc->properties);
first_mem_fail:
return ret;
}
struct gab *adc_bat = platform_get_drvdata(pdev);
struct gab_platform_data *pdata = adc_bat->pdata;
- power_supply_unregister(&adc_bat->psy);
+ power_supply_unregister(adc_bat->psy);
if (gpio_is_valid(pdata->gpio_charge_finished)) {
free_irq(gpio_to_irq(pdata->gpio_charge_finished), adc_bat);
iio_channel_release(adc_bat->channel[chan]);
}
- kfree(adc_bat->psy.properties);
+ kfree(adc_bat->psy_desc.properties);
cancel_delayed_work(&adc_bat->bat_work);
return 0;
}
int irq;
spinlock_t lock;
- struct power_supply battery;
- struct power_supply ac;
+ struct power_supply *battery;
+ struct power_supply *ac;
};
#define GOLDFISH_BATTERY_READ(data, addr) \
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct goldfish_battery_data *data = container_of(psy,
- struct goldfish_battery_data, ac);
+ struct goldfish_battery_data *data = power_supply_get_drvdata(psy);
int ret = 0;
switch (psp) {
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct goldfish_battery_data *data = container_of(psy,
- struct goldfish_battery_data, battery);
+ struct goldfish_battery_data *data = power_supply_get_drvdata(psy);
int ret = 0;
switch (psp) {
status &= BATTERY_INT_MASK;
if (status & BATTERY_STATUS_CHANGED)
- power_supply_changed(&data->battery);
+ power_supply_changed(data->battery);
if (status & AC_STATUS_CHANGED)
- power_supply_changed(&data->ac);
+ power_supply_changed(data->ac);
spin_unlock_irqrestore(&data->lock, irq_flags);
return status ? IRQ_HANDLED : IRQ_NONE;
}
+static const struct power_supply_desc battery_desc = {
+ .properties = goldfish_battery_props,
+ .num_properties = ARRAY_SIZE(goldfish_battery_props),
+ .get_property = goldfish_battery_get_property,
+ .name = "battery",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+};
+
+static const struct power_supply_desc ac_desc = {
+ .properties = goldfish_ac_props,
+ .num_properties = ARRAY_SIZE(goldfish_ac_props),
+ .get_property = goldfish_ac_get_property,
+ .name = "ac",
+ .type = POWER_SUPPLY_TYPE_MAINS,
+};
static int goldfish_battery_probe(struct platform_device *pdev)
{
int ret;
struct resource *r;
struct goldfish_battery_data *data;
+ struct power_supply_config psy_cfg = {};
data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
if (data == NULL)
spin_lock_init(&data->lock);
- data->battery.properties = goldfish_battery_props;
- data->battery.num_properties = ARRAY_SIZE(goldfish_battery_props);
- data->battery.get_property = goldfish_battery_get_property;
- data->battery.name = "battery";
- data->battery.type = POWER_SUPPLY_TYPE_BATTERY;
-
- data->ac.properties = goldfish_ac_props;
- data->ac.num_properties = ARRAY_SIZE(goldfish_ac_props);
- data->ac.get_property = goldfish_ac_get_property;
- data->ac.name = "ac";
- data->ac.type = POWER_SUPPLY_TYPE_MAINS;
-
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (r == NULL) {
dev_err(&pdev->dev, "platform_get_resource failed\n");
if (ret)
return ret;
- ret = power_supply_register(&pdev->dev, &data->ac);
- if (ret)
- return ret;
+ psy_cfg.drv_data = data;
- ret = power_supply_register(&pdev->dev, &data->battery);
- if (ret) {
- power_supply_unregister(&data->ac);
- return ret;
+ data->ac = power_supply_register(&pdev->dev, &ac_desc, &psy_cfg);
+ if (IS_ERR(data->ac))
+ return PTR_ERR(data->ac);
+
+ data->battery = power_supply_register(&pdev->dev, &battery_desc,
+ &psy_cfg);
+ if (IS_ERR(data->battery)) {
+ power_supply_unregister(data->ac);
+ return PTR_ERR(data->battery);
}
platform_set_drvdata(pdev, data);
{
struct goldfish_battery_data *data = platform_get_drvdata(pdev);
- power_supply_unregister(&data->battery);
- power_supply_unregister(&data->ac);
+ power_supply_unregister(data->battery);
+ power_supply_unregister(data->ac);
battery_data = NULL;
return 0;
}
unsigned int irq;
bool wakeup_enabled;
- struct power_supply charger;
+ struct power_supply *charger;
+ struct power_supply_desc charger_desc;
};
static irqreturn_t gpio_charger_irq(int irq, void *devid)
static inline struct gpio_charger *psy_to_gpio_charger(struct power_supply *psy)
{
- return container_of(psy, struct gpio_charger, charger);
+ return power_supply_get_drvdata(psy);
}
static int gpio_charger_get_property(struct power_supply *psy,
static int gpio_charger_probe(struct platform_device *pdev)
{
const struct gpio_charger_platform_data *pdata = pdev->dev.platform_data;
+ struct power_supply_config psy_cfg = {};
struct gpio_charger *gpio_charger;
- struct power_supply *charger;
+ struct power_supply_desc *charger_desc;
int ret;
int irq;
return -ENOMEM;
}
- charger = &gpio_charger->charger;
+ charger_desc = &gpio_charger->charger_desc;
+
+ charger_desc->name = pdata->name ? pdata->name : "gpio-charger";
+ charger_desc->type = pdata->type;
+ charger_desc->properties = gpio_charger_properties;
+ charger_desc->num_properties = ARRAY_SIZE(gpio_charger_properties);
+ charger_desc->get_property = gpio_charger_get_property;
- charger->name = pdata->name ? pdata->name : "gpio-charger";
- charger->type = pdata->type;
- charger->properties = gpio_charger_properties;
- charger->num_properties = ARRAY_SIZE(gpio_charger_properties);
- charger->get_property = gpio_charger_get_property;
- charger->supplied_to = pdata->supplied_to;
- charger->num_supplicants = pdata->num_supplicants;
- charger->of_node = pdev->dev.of_node;
+ psy_cfg.supplied_to = pdata->supplied_to;
+ psy_cfg.num_supplicants = pdata->num_supplicants;
+ psy_cfg.of_node = pdev->dev.of_node;
+ psy_cfg.drv_data = gpio_charger;
ret = gpio_request(pdata->gpio, dev_name(&pdev->dev));
if (ret) {
gpio_charger->pdata = pdata;
- ret = power_supply_register(&pdev->dev, charger);
- if (ret < 0) {
+ gpio_charger->charger = power_supply_register(&pdev->dev,
+ charger_desc, &psy_cfg);
+ if (IS_ERR(gpio_charger->charger)) {
+ ret = PTR_ERR(gpio_charger->charger);
dev_err(&pdev->dev, "Failed to register power supply: %d\n",
ret);
goto err_gpio_free;
if (irq > 0) {
ret = request_any_context_irq(irq, gpio_charger_irq,
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
- dev_name(&pdev->dev), charger);
+ dev_name(&pdev->dev), gpio_charger->charger);
if (ret < 0)
dev_warn(&pdev->dev, "Failed to request irq: %d\n", ret);
else
struct gpio_charger *gpio_charger = platform_get_drvdata(pdev);
if (gpio_charger->irq)
- free_irq(gpio_charger->irq, &gpio_charger->charger);
+ free_irq(gpio_charger->irq, gpio_charger->charger);
- power_supply_unregister(&gpio_charger->charger);
+ power_supply_unregister(gpio_charger->charger);
gpio_free(gpio_charger->pdata->gpio);
if (device_may_wakeup(dev) && gpio_charger->wakeup_enabled)
disable_irq_wake(gpio_charger->irq);
- power_supply_changed(&gpio_charger->charger);
+ power_supply_changed(gpio_charger->charger);
return 0;
}
unsigned int batt_prev_charge_full; /* in mAS */
unsigned int batt_charge_rate; /* in units per second */
- struct power_supply usb;
- struct power_supply batt;
+ struct power_supply *usb;
+ struct power_supply *batt;
int irq; /* GPE_ID or IRQ# */
struct workqueue_struct *monitor_wqueue;
struct delayed_work monitor_battery;
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct pmic_power_module_info *pbi = container_of(psy,
- struct pmic_power_module_info, usb);
+ struct pmic_power_module_info *pbi = power_supply_get_drvdata(psy);
/* update pmic_power_module_info members */
pmic_battery_read_status(pbi);
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct pmic_power_module_info *pbi = container_of(psy,
- struct pmic_power_module_info, batt);
+ struct pmic_power_module_info *pbi = power_supply_get_drvdata(psy);
/* update pmic_power_module_info members */
pmic_battery_read_status(pbi);
__func__);
}
+/*
+ * Description of power supplies
+ */
+static const struct power_supply_desc pmic_usb_desc = {
+ .name = "pmic-usb",
+ .type = POWER_SUPPLY_TYPE_USB,
+ .properties = pmic_usb_props,
+ .num_properties = ARRAY_SIZE(pmic_usb_props),
+ .get_property = pmic_usb_get_property,
+};
+
+static const struct power_supply_desc pmic_batt_desc = {
+ .name = "pmic-batt",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = pmic_battery_props,
+ .num_properties = ARRAY_SIZE(pmic_battery_props),
+ .get_property = pmic_battery_get_property,
+};
+
/**
* pmic_battery_probe - pmic battery initialize
* @irq: pmic battery device irq
{
int retval = 0;
struct pmic_power_module_info *pbi;
+ struct power_supply_config psy_cfg = {};
dev_dbg(dev, "pmic-battery: found pmic battery device\n");
pbi->dev = dev;
pbi->irq = irq;
dev_set_drvdata(dev, pbi);
+ psy_cfg.drv_data = pbi;
/* initialize all required framework before enabling interrupts */
INIT_WORK(&pbi->handler, pmic_battery_handle_intrpt);
}
/* register pmic-batt with power supply subsystem */
- pbi->batt.name = "pmic-batt";
- pbi->batt.type = POWER_SUPPLY_TYPE_BATTERY;
- pbi->batt.properties = pmic_battery_props;
- pbi->batt.num_properties = ARRAY_SIZE(pmic_battery_props);
- pbi->batt.get_property = pmic_battery_get_property;
- retval = power_supply_register(dev, &pbi->batt);
- if (retval) {
+ pbi->batt = power_supply_register(dev, &pmic_usb_desc, &psy_cfg);
+ if (IS_ERR(pbi->batt)) {
dev_err(dev,
"%s(): failed to register pmic battery device with power supply subsystem\n",
__func__);
+ retval = PTR_ERR(pbi->batt);
goto power_reg_failed;
}
queue_delayed_work(pbi->monitor_wqueue, &pbi->monitor_battery, HZ * 1);
/* register pmic-usb with power supply subsystem */
- pbi->usb.name = "pmic-usb";
- pbi->usb.type = POWER_SUPPLY_TYPE_USB;
- pbi->usb.properties = pmic_usb_props;
- pbi->usb.num_properties = ARRAY_SIZE(pmic_usb_props);
- pbi->usb.get_property = pmic_usb_get_property;
- retval = power_supply_register(dev, &pbi->usb);
- if (retval) {
+ pbi->usb = power_supply_register(dev, &pmic_batt_desc, &psy_cfg);
+ if (IS_ERR(pbi->usb)) {
dev_err(dev,
"%s(): failed to register pmic usb device with power supply subsystem\n",
__func__);
+ retval = PTR_ERR(pbi->usb);
goto power_reg_failed_1;
}
return retval;
power_reg_failed_1:
- power_supply_unregister(&pbi->batt);
+ power_supply_unregister(pbi->batt);
power_reg_failed:
cancel_delayed_work_sync(&pbi->monitor_battery);
requestirq_failed:
cancel_delayed_work_sync(&pbi->monitor_battery);
destroy_workqueue(pbi->monitor_wqueue);
- power_supply_unregister(&pbi->usb);
- power_supply_unregister(&pbi->batt);
+ power_supply_unregister(pbi->usb);
+ power_supply_unregister(pbi->batt);
cancel_work_sync(&pbi->handler);
kfree(pbi);
static int get_capacity(struct power_supply *b)
{
- struct micro_battery *mb = dev_get_drvdata(b->dev->parent);
+ struct micro_battery *mb = dev_get_drvdata(b->dev.parent);
switch (mb->flag & 0x07) {
case MICRO_BATT_STATUS_HIGH:
static int get_status(struct power_supply *b)
{
- struct micro_battery *mb = dev_get_drvdata(b->dev->parent);
+ struct micro_battery *mb = dev_get_drvdata(b->dev.parent);
if (mb->flag == MICRO_BATT_STATUS_UNKNOWN)
return POWER_SUPPLY_STATUS_UNKNOWN;
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct micro_battery *mb = dev_get_drvdata(b->dev->parent);
+ struct micro_battery *mb = dev_get_drvdata(b->dev.parent);
switch (psp) {
case POWER_SUPPLY_PROP_TECHNOLOGY:
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct micro_battery *mb = dev_get_drvdata(b->dev->parent);
+ struct micro_battery *mb = dev_get_drvdata(b->dev.parent);
switch (psp) {
case POWER_SUPPLY_PROP_ONLINE:
POWER_SUPPLY_PROP_VOLTAGE_NOW,
};
-static struct power_supply micro_batt_power = {
+static const struct power_supply_desc micro_batt_power_desc = {
.name = "main-battery",
.type = POWER_SUPPLY_TYPE_BATTERY,
.properties = micro_batt_power_props,
POWER_SUPPLY_PROP_ONLINE,
};
-static struct power_supply micro_ac_power = {
+static const struct power_supply_desc micro_ac_power_desc = {
.name = "ac",
.type = POWER_SUPPLY_TYPE_MAINS,
.properties = micro_ac_power_props,
.get_property = micro_ac_get_property,
};
+static struct power_supply *micro_batt_power, *micro_ac_power;
+
static int micro_batt_probe(struct platform_device *pdev)
{
struct micro_battery *mb;
+ int ret;
mb = devm_kzalloc(&pdev->dev, sizeof(*mb), GFP_KERNEL);
if (!mb)
mb->micro = dev_get_drvdata(pdev->dev.parent);
mb->wq = create_singlethread_workqueue("ipaq-battery-wq");
+ if (!mb->wq)
+ return -ENOMEM;
+
INIT_DELAYED_WORK(&mb->update, micro_battery_work);
platform_set_drvdata(pdev, mb);
queue_delayed_work(mb->wq, &mb->update, 1);
- power_supply_register(&pdev->dev, µ_batt_power);
- power_supply_register(&pdev->dev, µ_ac_power);
+
+ micro_batt_power = power_supply_register(&pdev->dev,
+ µ_batt_power_desc, NULL);
+ if (IS_ERR(micro_batt_power)) {
+ ret = PTR_ERR(micro_batt_power);
+ goto batt_err;
+ }
+
+ micro_ac_power = power_supply_register(&pdev->dev,
+ µ_ac_power_desc, NULL);
+ if (IS_ERR(micro_ac_power)) {
+ ret = PTR_ERR(micro_ac_power);
+ goto ac_err;
+ }
dev_info(&pdev->dev, "iPAQ micro battery driver\n");
return 0;
+
+ac_err:
+ power_supply_unregister(micro_ac_power);
+batt_err:
+ cancel_delayed_work_sync(&mb->update);
+ destroy_workqueue(mb->wq);
+ return ret;
}
static int micro_batt_remove(struct platform_device *pdev)
{
struct micro_battery *mb = platform_get_drvdata(pdev);
- power_supply_unregister(µ_ac_power);
- power_supply_unregister(µ_batt_power);
+ power_supply_unregister(micro_ac_power);
+ power_supply_unregister(micro_batt_power);
cancel_delayed_work_sync(&mb->update);
+ destroy_workqueue(mb->wq);
return 0;
}
};
struct isp1704_charger {
- struct device *dev;
- struct power_supply psy;
- struct usb_phy *phy;
- struct notifier_block nb;
- struct work_struct work;
+ struct device *dev;
+ struct power_supply *psy;
+ struct power_supply_desc psy_desc;
+ struct usb_phy *phy;
+ struct notifier_block nb;
+ struct work_struct work;
/* properties */
char model[8];
/* detect wall charger */
if (isp1704_charger_detect_dcp(isp)) {
- isp->psy.type = POWER_SUPPLY_TYPE_USB_DCP;
+ isp->psy_desc.type = POWER_SUPPLY_TYPE_USB_DCP;
isp->current_max = 1800;
} else {
- isp->psy.type = POWER_SUPPLY_TYPE_USB;
+ isp->psy_desc.type = POWER_SUPPLY_TYPE_USB;
isp->current_max = 500;
}
usb_gadget_connect(isp->phy->otg->gadget);
}
- if (isp->psy.type != POWER_SUPPLY_TYPE_USB_DCP) {
+ if (isp->psy_desc.type != POWER_SUPPLY_TYPE_USB_DCP) {
/*
* Only 500mA here or high speed chirp
* handshaking may break
isp->current_max = 500;
if (isp->current_max > 100)
- isp->psy.type = POWER_SUPPLY_TYPE_USB_CDP;
+ isp->psy_desc.type = POWER_SUPPLY_TYPE_USB_CDP;
}
break;
case USB_EVENT_NONE:
isp->online = false;
isp->present = 0;
isp->current_max = 0;
- isp->psy.type = POWER_SUPPLY_TYPE_USB;
+ isp->psy_desc.type = POWER_SUPPLY_TYPE_USB;
/*
* Disable data pullups. We need to prevent the controller from
goto out;
}
- power_supply_changed(&isp->psy);
+ power_supply_changed(isp->psy);
out:
mutex_unlock(&lock);
}
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct isp1704_charger *isp =
- container_of(psy, struct isp1704_charger, psy);
+ struct isp1704_charger *isp = power_supply_get_drvdata(psy);
switch (psp) {
case POWER_SUPPLY_PROP_PRESENT:
{
struct isp1704_charger *isp;
int ret = -ENODEV;
+ struct power_supply_config psy_cfg = {};
struct isp1704_charger_data *pdata = dev_get_platdata(&pdev->dev);
struct device_node *np = pdev->dev.of_node;
if (ret < 0)
goto fail1;
- isp->psy.name = "isp1704";
- isp->psy.type = POWER_SUPPLY_TYPE_USB;
- isp->psy.properties = power_props;
- isp->psy.num_properties = ARRAY_SIZE(power_props);
- isp->psy.get_property = isp1704_charger_get_property;
+ isp->psy_desc.name = "isp1704";
+ isp->psy_desc.type = POWER_SUPPLY_TYPE_USB;
+ isp->psy_desc.properties = power_props;
+ isp->psy_desc.num_properties = ARRAY_SIZE(power_props);
+ isp->psy_desc.get_property = isp1704_charger_get_property;
- ret = power_supply_register(isp->dev, &isp->psy);
- if (ret)
+ psy_cfg.drv_data = isp;
+
+ isp->psy = power_supply_register(isp->dev, &isp->psy_desc, &psy_cfg);
+ if (IS_ERR(isp->psy)) {
+ ret = PTR_ERR(isp->psy);
goto fail1;
+ }
/*
* REVISIT: using work in order to allow the usb notifications to be
return 0;
fail2:
- power_supply_unregister(&isp->psy);
+ power_supply_unregister(isp->psy);
fail1:
isp1704_charger_set_power(isp, 0);
fail0:
struct isp1704_charger *isp = platform_get_drvdata(pdev);
usb_unregister_notifier(isp->phy, &isp->nb);
- power_supply_unregister(&isp->psy);
+ power_supply_unregister(isp->psy);
isp1704_charger_set_power(isp, 0);
return 0;
struct completion read_completion;
- struct power_supply battery;
+ struct power_supply *battery;
+ struct power_supply_desc battery_desc;
struct delayed_work work;
struct mutex lock;
static inline struct jz_battery *psy_to_jz_battery(struct power_supply *psy)
{
- return container_of(psy, struct jz_battery, battery);
+ return power_supply_get_drvdata(psy);
}
static irqreturn_t jz_battery_irq_handler(int irq, void *devid)
}
if (has_changed)
- power_supply_changed(&jz_battery->battery);
+ power_supply_changed(jz_battery->battery);
}
static enum power_supply_property jz_battery_properties[] = {
{
int ret = 0;
struct jz_battery_platform_data *pdata = pdev->dev.parent->platform_data;
+ struct power_supply_config psy_cfg = {};
struct jz_battery *jz_battery;
- struct power_supply *battery;
+ struct power_supply_desc *battery_desc;
struct resource *mem;
if (!pdata) {
if (IS_ERR(jz_battery->base))
return PTR_ERR(jz_battery->base);
- battery = &jz_battery->battery;
- battery->name = pdata->info.name;
- battery->type = POWER_SUPPLY_TYPE_BATTERY;
- battery->properties = jz_battery_properties;
- battery->num_properties = ARRAY_SIZE(jz_battery_properties);
- battery->get_property = jz_battery_get_property;
- battery->external_power_changed = jz_battery_external_power_changed;
- battery->use_for_apm = 1;
+ battery_desc = &jz_battery->battery_desc;
+ battery_desc->name = pdata->info.name;
+ battery_desc->type = POWER_SUPPLY_TYPE_BATTERY;
+ battery_desc->properties = jz_battery_properties;
+ battery_desc->num_properties = ARRAY_SIZE(jz_battery_properties);
+ battery_desc->get_property = jz_battery_get_property;
+ battery_desc->external_power_changed =
+ jz_battery_external_power_changed;
+ battery_desc->use_for_apm = 1;
+
+ psy_cfg.drv_data = jz_battery;
jz_battery->pdata = pdata;
jz_battery->pdev = pdev;
else
jz4740_adc_set_config(pdev->dev.parent, JZ_ADC_CONFIG_BAT_MB, 0);
- ret = power_supply_register(&pdev->dev, &jz_battery->battery);
- if (ret) {
+ jz_battery->battery = power_supply_register(&pdev->dev, battery_desc,
+ &psy_cfg);
+ if (IS_ERR(jz_battery->battery)) {
dev_err(&pdev->dev, "power supply battery register failed.\n");
+ ret = PTR_ERR(jz_battery->battery);
goto err_free_charge_irq;
}
gpio_free(jz_battery->pdata->gpio_charge);
}
- power_supply_unregister(&jz_battery->battery);
+ power_supply_unregister(jz_battery->battery);
free_irq(jz_battery->irq, jz_battery);
};
struct lp8727_psy {
- struct power_supply ac;
- struct power_supply usb;
- struct power_supply batt;
+ struct power_supply *ac;
+ struct power_supply *usb;
+ struct power_supply *batt;
};
struct lp8727_chg {
lp8727_id_detection(pchg, idno, vbus);
lp8727_enable_chgdet(pchg);
- power_supply_changed(&pchg->psy->ac);
- power_supply_changed(&pchg->psy->usb);
- power_supply_changed(&pchg->psy->batt);
+ power_supply_changed(pchg->psy->ac);
+ power_supply_changed(pchg->psy->usb);
+ power_supply_changed(pchg->psy->batt);
}
static irqreturn_t lp8727_isr_func(int irq, void *ptr)
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct lp8727_chg *pchg = dev_get_drvdata(psy->dev->parent);
+ struct lp8727_chg *pchg = dev_get_drvdata(psy->dev.parent);
if (psp != POWER_SUPPLY_PROP_ONLINE)
return -EINVAL;
- val->intval = lp8727_is_charger_attached(psy->name, pchg->devid);
+ val->intval = lp8727_is_charger_attached(psy->desc->name, pchg->devid);
return 0;
}
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct lp8727_chg *pchg = dev_get_drvdata(psy->dev->parent);
+ struct lp8727_chg *pchg = dev_get_drvdata(psy->dev.parent);
struct lp8727_platform_data *pdata = pchg->pdata;
enum lp8727_die_temp temp;
u8 read;
switch (psp) {
case POWER_SUPPLY_PROP_STATUS:
- if (!lp8727_is_charger_attached(psy->name, pchg->devid)) {
+ if (!lp8727_is_charger_attached(psy->desc->name, pchg->devid)) {
val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
return 0;
}
static void lp8727_charger_changed(struct power_supply *psy)
{
- struct lp8727_chg *pchg = dev_get_drvdata(psy->dev->parent);
+ struct lp8727_chg *pchg = dev_get_drvdata(psy->dev.parent);
u8 eoc_level;
u8 ichg;
u8 val;
/* skip if no charger exists */
- if (!lp8727_is_charger_attached(psy->name, pchg->devid))
+ if (!lp8727_is_charger_attached(psy->desc->name, pchg->devid))
return;
/* update charging parameters */
}
}
+static const struct power_supply_desc lp8727_ac_desc = {
+ .name = "ac",
+ .type = POWER_SUPPLY_TYPE_MAINS,
+ .properties = lp8727_charger_prop,
+ .num_properties = ARRAY_SIZE(lp8727_charger_prop),
+ .get_property = lp8727_charger_get_property,
+};
+
+static const struct power_supply_desc lp8727_usb_desc = {
+ .name = "usb",
+ .type = POWER_SUPPLY_TYPE_USB,
+ .properties = lp8727_charger_prop,
+ .num_properties = ARRAY_SIZE(lp8727_charger_prop),
+ .get_property = lp8727_charger_get_property,
+};
+
+static const struct power_supply_desc lp8727_batt_desc = {
+ .name = "main_batt",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = lp8727_battery_prop,
+ .num_properties = ARRAY_SIZE(lp8727_battery_prop),
+ .get_property = lp8727_battery_get_property,
+ .external_power_changed = lp8727_charger_changed,
+};
+
static int lp8727_register_psy(struct lp8727_chg *pchg)
{
+ struct power_supply_config psy_cfg = {}; /* Only for ac and usb */
struct lp8727_psy *psy;
psy = devm_kzalloc(pchg->dev, sizeof(*psy), GFP_KERNEL);
pchg->psy = psy;
- psy->ac.name = "ac";
- psy->ac.type = POWER_SUPPLY_TYPE_MAINS;
- psy->ac.properties = lp8727_charger_prop;
- psy->ac.num_properties = ARRAY_SIZE(lp8727_charger_prop);
- psy->ac.get_property = lp8727_charger_get_property;
- psy->ac.supplied_to = battery_supplied_to;
- psy->ac.num_supplicants = ARRAY_SIZE(battery_supplied_to);
+ psy_cfg.supplied_to = battery_supplied_to;
+ psy_cfg.num_supplicants = ARRAY_SIZE(battery_supplied_to);
- if (power_supply_register(pchg->dev, &psy->ac))
+ psy->ac = power_supply_register(pchg->dev, &lp8727_ac_desc, &psy_cfg);
+ if (IS_ERR(psy->ac))
goto err_psy_ac;
- psy->usb.name = "usb";
- psy->usb.type = POWER_SUPPLY_TYPE_USB;
- psy->usb.properties = lp8727_charger_prop;
- psy->usb.num_properties = ARRAY_SIZE(lp8727_charger_prop);
- psy->usb.get_property = lp8727_charger_get_property;
- psy->usb.supplied_to = battery_supplied_to;
- psy->usb.num_supplicants = ARRAY_SIZE(battery_supplied_to);
-
- if (power_supply_register(pchg->dev, &psy->usb))
+ psy->usb = power_supply_register(pchg->dev, &lp8727_usb_desc,
+ &psy_cfg);
+ if (IS_ERR(psy->usb))
goto err_psy_usb;
- psy->batt.name = "main_batt";
- psy->batt.type = POWER_SUPPLY_TYPE_BATTERY;
- psy->batt.properties = lp8727_battery_prop;
- psy->batt.num_properties = ARRAY_SIZE(lp8727_battery_prop);
- psy->batt.get_property = lp8727_battery_get_property;
- psy->batt.external_power_changed = lp8727_charger_changed;
-
- if (power_supply_register(pchg->dev, &psy->batt))
+ psy->batt = power_supply_register(pchg->dev, &lp8727_batt_desc, NULL);
+ if (IS_ERR(psy->batt))
goto err_psy_batt;
return 0;
err_psy_batt:
- power_supply_unregister(&psy->usb);
+ power_supply_unregister(psy->usb);
err_psy_usb:
- power_supply_unregister(&psy->ac);
+ power_supply_unregister(psy->ac);
err_psy_ac:
return -EPERM;
}
if (!psy)
return;
- power_supply_unregister(&psy->ac);
- power_supply_unregister(&psy->usb);
- power_supply_unregister(&psy->batt);
+ power_supply_unregister(psy->ac);
+ power_supply_unregister(psy->usb);
+ power_supply_unregister(psy->batt);
}
#ifdef CONFIG_OF
*/
struct lp8788_charger {
struct lp8788 *lp;
- struct power_supply charger;
- struct power_supply battery;
+ struct power_supply *charger;
+ struct power_supply *battery;
struct work_struct charger_work;
struct iio_channel *chan[LP8788_NUM_CHG_ADC];
struct lp8788_chg_irq irqs[LP8788_MAX_CHG_IRQS];
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct lp8788_charger *pchg = dev_get_drvdata(psy->dev->parent);
+ struct lp8788_charger *pchg = dev_get_drvdata(psy->dev.parent);
u8 read;
switch (psp) {
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct lp8788_charger *pchg = dev_get_drvdata(psy->dev->parent);
+ struct lp8788_charger *pchg = dev_get_drvdata(psy->dev.parent);
switch (psp) {
case POWER_SUPPLY_PROP_STATUS:
return 0;
}
+static const struct power_supply_desc lp8788_psy_charger_desc = {
+ .name = LP8788_CHARGER_NAME,
+ .type = POWER_SUPPLY_TYPE_MAINS,
+ .properties = lp8788_charger_prop,
+ .num_properties = ARRAY_SIZE(lp8788_charger_prop),
+ .get_property = lp8788_charger_get_property,
+};
+
+static const struct power_supply_desc lp8788_psy_battery_desc = {
+ .name = LP8788_BATTERY_NAME,
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = lp8788_battery_prop,
+ .num_properties = ARRAY_SIZE(lp8788_battery_prop),
+ .get_property = lp8788_battery_get_property,
+};
+
static int lp8788_psy_register(struct platform_device *pdev,
struct lp8788_charger *pchg)
{
- pchg->charger.name = LP8788_CHARGER_NAME;
- pchg->charger.type = POWER_SUPPLY_TYPE_MAINS;
- pchg->charger.properties = lp8788_charger_prop;
- pchg->charger.num_properties = ARRAY_SIZE(lp8788_charger_prop);
- pchg->charger.get_property = lp8788_charger_get_property;
- pchg->charger.supplied_to = battery_supplied_to;
- pchg->charger.num_supplicants = ARRAY_SIZE(battery_supplied_to);
-
- if (power_supply_register(&pdev->dev, &pchg->charger))
- return -EPERM;
+ struct power_supply_config charger_cfg = {};
+
+ charger_cfg.supplied_to = battery_supplied_to;
+ charger_cfg.num_supplicants = ARRAY_SIZE(battery_supplied_to);
- pchg->battery.name = LP8788_BATTERY_NAME;
- pchg->battery.type = POWER_SUPPLY_TYPE_BATTERY;
- pchg->battery.properties = lp8788_battery_prop;
- pchg->battery.num_properties = ARRAY_SIZE(lp8788_battery_prop);
- pchg->battery.get_property = lp8788_battery_get_property;
+ pchg->charger = power_supply_register(&pdev->dev,
+ &lp8788_psy_charger_desc,
+ &charger_cfg);
+ if (IS_ERR(pchg->charger))
+ return -EPERM;
- if (power_supply_register(&pdev->dev, &pchg->battery))
+ pchg->battery = power_supply_register(&pdev->dev,
+ &lp8788_psy_battery_desc, NULL);
+ if (IS_ERR(pchg->battery)) {
+ power_supply_unregister(pchg->charger);
return -EPERM;
+ }
return 0;
}
static void lp8788_psy_unregister(struct lp8788_charger *pchg)
{
- power_supply_unregister(&pchg->battery);
- power_supply_unregister(&pchg->charger);
+ power_supply_unregister(pchg->battery);
+ power_supply_unregister(pchg->charger);
}
static void lp8788_charger_event(struct work_struct *work)
case LP8788_INT_EOC:
case LP8788_INT_BATT_LOW:
case LP8788_INT_NO_BATT:
- power_supply_changed(&pchg->charger);
- power_supply_changed(&pchg->battery);
+ power_supply_changed(pchg->charger);
+ power_supply_changed(pchg->battery);
break;
default:
break;
struct ltc294x_info {
struct i2c_client *client; /* I2C Client pointer */
- struct power_supply supply; /* Supply pointer */
+ struct power_supply *supply; /* Supply pointer */
+ struct power_supply_desc supply_desc; /* Supply description */
struct delayed_work work; /* Work scheduler */
int num_regs; /* Number of registers (chip type) */
int id; /* Identifier of ltc294x chip */
enum power_supply_property prop,
union power_supply_propval *val)
{
- struct ltc294x_info *info =
- container_of(psy, struct ltc294x_info, supply);
+ struct ltc294x_info *info = power_supply_get_drvdata(psy);
switch (prop) {
case POWER_SUPPLY_PROP_CHARGE_NOW:
enum power_supply_property psp,
const union power_supply_propval *val)
{
- struct ltc294x_info *info =
- container_of(psy, struct ltc294x_info, supply);
+ struct ltc294x_info *info = power_supply_get_drvdata(psy);
switch (psp) {
case POWER_SUPPLY_PROP_CHARGE_NOW:
if (charge != info->charge) {
info->charge = charge;
- power_supply_changed(&info->supply);
+ power_supply_changed(info->supply);
}
}
struct ltc294x_info *info = i2c_get_clientdata(client);
cancel_delayed_work(&info->work);
- power_supply_unregister(&info->supply);
- kfree(info->supply.name);
+ power_supply_unregister(info->supply);
+ kfree(info->supply_desc.name);
mutex_lock(<c294x_lock);
idr_remove(<c294x_id, info->id);
mutex_unlock(<c294x_lock);
static int ltc294x_i2c_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
+ struct power_supply_config psy_cfg = {};
struct ltc294x_info *info;
int ret;
int num;
i2c_set_clientdata(client, info);
info->num_regs = id->driver_data;
- info->supply.name = kasprintf(GFP_KERNEL, "%s-%d", client->name, num);
- if (!info->supply.name) {
+ info->supply_desc.name = kasprintf(GFP_KERNEL, "%s-%d", client->name,
+ num);
+ if (!info->supply_desc.name) {
ret = -ENOMEM;
goto fail_name;
}
} else {
if (prescaler_exp > LTC2941_MAX_PRESCALER_EXP)
prescaler_exp = LTC2941_MAX_PRESCALER_EXP;
- info->Qlsb = ((58 * 50000) / r_sense) /
+ info->Qlsb = ((85 * 50000) / r_sense) /
(128 / (1 << prescaler_exp));
}
info->client = client;
info->id = num;
- info->supply.type = POWER_SUPPLY_TYPE_BATTERY;
- info->supply.properties = ltc294x_properties;
+ info->supply_desc.type = POWER_SUPPLY_TYPE_BATTERY;
+ info->supply_desc.properties = ltc294x_properties;
if (info->num_regs >= LTC294X_REG_TEMPERATURE_LSB)
- info->supply.num_properties =
+ info->supply_desc.num_properties =
ARRAY_SIZE(ltc294x_properties);
else if (info->num_regs >= LTC294X_REG_CURRENT_LSB)
- info->supply.num_properties =
+ info->supply_desc.num_properties =
ARRAY_SIZE(ltc294x_properties) - 1;
else if (info->num_regs >= LTC294X_REG_VOLTAGE_LSB)
- info->supply.num_properties =
+ info->supply_desc.num_properties =
ARRAY_SIZE(ltc294x_properties) - 2;
else
- info->supply.num_properties =
+ info->supply_desc.num_properties =
ARRAY_SIZE(ltc294x_properties) - 3;
- info->supply.get_property = ltc294x_get_property;
- info->supply.set_property = ltc294x_set_property;
- info->supply.property_is_writeable = ltc294x_property_is_writeable;
- info->supply.external_power_changed = NULL;
+ info->supply_desc.get_property = ltc294x_get_property;
+ info->supply_desc.set_property = ltc294x_set_property;
+ info->supply_desc.property_is_writeable = ltc294x_property_is_writeable;
+ info->supply_desc.external_power_changed = NULL;
+
+ psy_cfg.drv_data = info;
INIT_DELAYED_WORK(&info->work, ltc294x_work);
goto fail_comm;
}
- ret = power_supply_register(&client->dev, &info->supply);
- if (ret) {
+ info->supply = power_supply_register(&client->dev, &info->supply_desc,
+ &psy_cfg);
+ if (IS_ERR(info->supply)) {
dev_err(&client->dev, "failed to register ltc2941\n");
+ ret = PTR_ERR(info->supply);
goto fail_register;
} else {
schedule_delayed_work(&info->work, LTC294X_WORK_DELAY * HZ);
return 0;
fail_register:
- kfree(info->supply.name);
+ kfree(info->supply_desc.name);
fail_comm:
fail_name:
fail_info:
#include <linux/mfd/max14577.h>
struct max14577_charger {
- struct device *dev;
- struct max14577 *max14577;
- struct power_supply charger;
-
- unsigned int charging_state;
- unsigned int battery_state;
+ struct device *dev;
+ struct max14577 *max14577;
+ struct power_supply *charger;
struct max14577_charger_platform_data *pdata;
};
}
}
-static int max14577_get_charger_state(struct max14577_charger *chg)
+static int max14577_get_charger_state(struct max14577_charger *chg, int *val)
{
struct regmap *rmap = chg->max14577->regmap;
- int state = POWER_SUPPLY_STATUS_DISCHARGING;
+ int ret;
u8 reg_data;
/*
* - handle properly dead-battery charging (respect timer)
* - handle timers (fast-charge and prequal) /MBCCHGERR/
*/
- max14577_read_reg(rmap, MAX14577_CHG_REG_CHG_CTRL2, ®_data);
- if ((reg_data & CHGCTRL2_MBCHOSTEN_MASK) == 0)
- goto state_set;
+ ret = max14577_read_reg(rmap, MAX14577_CHG_REG_CHG_CTRL2, ®_data);
+ if (ret < 0)
+ goto out;
+
+ if ((reg_data & CHGCTRL2_MBCHOSTEN_MASK) == 0) {
+ *val = POWER_SUPPLY_STATUS_DISCHARGING;
+ goto out;
+ }
+
+ ret = max14577_read_reg(rmap, MAX14577_CHG_REG_STATUS3, ®_data);
+ if (ret < 0)
+ goto out;
- max14577_read_reg(rmap, MAX14577_CHG_REG_STATUS3, ®_data);
if (reg_data & STATUS3_CGMBC_MASK) {
/* Charger or USB-cable is connected */
if (reg_data & STATUS3_EOC_MASK)
- state = POWER_SUPPLY_STATUS_FULL;
+ *val = POWER_SUPPLY_STATUS_FULL;
else
- state = POWER_SUPPLY_STATUS_CHARGING;
- goto state_set;
+ *val = POWER_SUPPLY_STATUS_CHARGING;
+ goto out;
}
-state_set:
- chg->charging_state = state;
- return state;
+ *val = POWER_SUPPLY_STATUS_DISCHARGING;
+
+out:
+ return ret;
}
/*
* - POWER_SUPPLY_CHARGE_TYPE_NONE
* - POWER_SUPPLY_CHARGE_TYPE_FAST
*/
-static int max14577_get_charge_type(struct max14577_charger *chg)
+static int max14577_get_charge_type(struct max14577_charger *chg, int *val)
{
+ int ret, charging;
+
/*
* TODO: CHARGE_TYPE_TRICKLE (VCHGR_RC or EOC)?
* As spec says:
* top-off timer starts. The device continues to trickle
* charge the battery until the top-off timer runs out."
*/
- if (max14577_get_charger_state(chg) == POWER_SUPPLY_STATUS_CHARGING)
- return POWER_SUPPLY_CHARGE_TYPE_FAST;
- return POWER_SUPPLY_CHARGE_TYPE_NONE;
+ ret = max14577_get_charger_state(chg, &charging);
+ if (ret < 0)
+ return ret;
+
+ if (charging == POWER_SUPPLY_STATUS_CHARGING)
+ *val = POWER_SUPPLY_CHARGE_TYPE_FAST;
+ else
+ *val = POWER_SUPPLY_CHARGE_TYPE_NONE;
+
+ return 0;
}
-static int max14577_get_online(struct max14577_charger *chg)
+static int max14577_get_online(struct max14577_charger *chg, int *val)
{
struct regmap *rmap = chg->max14577->regmap;
u8 reg_data;
+ int ret;
enum max14577_muic_charger_type chg_type;
- max14577_read_reg(rmap, MAX14577_MUIC_REG_STATUS2, ®_data);
+ ret = max14577_read_reg(rmap, MAX14577_MUIC_REG_STATUS2, ®_data);
+ if (ret < 0)
+ return ret;
+
reg_data = ((reg_data & STATUS2_CHGTYP_MASK) >> STATUS2_CHGTYP_SHIFT);
chg_type = maxim_get_charger_type(chg->max14577->dev_type, reg_data);
switch (chg_type) {
case MAX14577_CHARGER_TYPE_SPECIAL_1A:
case MAX14577_CHARGER_TYPE_DEAD_BATTERY:
case MAX77836_CHARGER_TYPE_SPECIAL_BIAS:
- return 1;
+ *val = 1;
+ break;
case MAX14577_CHARGER_TYPE_NONE:
case MAX14577_CHARGER_TYPE_DOWNSTREAM_PORT:
case MAX14577_CHARGER_TYPE_RESERVED:
case MAX77836_CHARGER_TYPE_RESERVED:
default:
- return 0;
+ *val = 0;
}
+
+ return 0;
}
/*
* - POWER_SUPPLY_HEALTH_OVERVOLTAGE
* - POWER_SUPPLY_HEALTH_GOOD
*/
-static int max14577_get_battery_health(struct max14577_charger *chg)
+static int max14577_get_battery_health(struct max14577_charger *chg, int *val)
{
struct regmap *rmap = chg->max14577->regmap;
- int state = POWER_SUPPLY_HEALTH_GOOD;
+ int ret;
u8 reg_data;
enum max14577_muic_charger_type chg_type;
- max14577_read_reg(rmap, MAX14577_MUIC_REG_STATUS2, ®_data);
+ ret = max14577_read_reg(rmap, MAX14577_MUIC_REG_STATUS2, ®_data);
+ if (ret < 0)
+ goto out;
+
reg_data = ((reg_data & STATUS2_CHGTYP_MASK) >> STATUS2_CHGTYP_SHIFT);
chg_type = maxim_get_charger_type(chg->max14577->dev_type, reg_data);
if (chg_type == MAX14577_CHARGER_TYPE_DEAD_BATTERY) {
- state = POWER_SUPPLY_HEALTH_DEAD;
- goto state_set;
+ *val = POWER_SUPPLY_HEALTH_DEAD;
+ goto out;
}
- max14577_read_reg(rmap, MAX14577_CHG_REG_STATUS3, ®_data);
+ ret = max14577_read_reg(rmap, MAX14577_CHG_REG_STATUS3, ®_data);
+ if (ret < 0)
+ goto out;
+
if (reg_data & STATUS3_OVP_MASK) {
- state = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
- goto state_set;
+ *val = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
+ goto out;
}
-state_set:
- chg->battery_state = state;
- return state;
+ /* Not dead, not overvoltage */
+ *val = POWER_SUPPLY_HEALTH_GOOD;
+
+out:
+ return ret;
}
/*
* The max14577 chip doesn't report any status of battery presence.
* Lets assume that it will always be used with some battery.
*/
-static int max14577_get_present(struct max14577_charger *chg)
+static int max14577_get_present(struct max14577_charger *chg, int *val)
{
- return 1;
+ *val = 1;
+
+ return 0;
}
static int max14577_set_fast_charge_timer(struct max14577_charger *chg,
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct max14577_charger *chg = container_of(psy,
- struct max14577_charger,
- charger);
+ struct max14577_charger *chg = power_supply_get_drvdata(psy);
int ret = 0;
switch (psp) {
case POWER_SUPPLY_PROP_STATUS:
- val->intval = max14577_get_charger_state(chg);
+ ret = max14577_get_charger_state(chg, &val->intval);
break;
case POWER_SUPPLY_PROP_CHARGE_TYPE:
- val->intval = max14577_get_charge_type(chg);
+ ret = max14577_get_charge_type(chg, &val->intval);
break;
case POWER_SUPPLY_PROP_HEALTH:
- val->intval = max14577_get_battery_health(chg);
+ ret = max14577_get_battery_health(chg, &val->intval);
break;
case POWER_SUPPLY_PROP_PRESENT:
- val->intval = max14577_get_present(chg);
+ ret = max14577_get_present(chg, &val->intval);
break;
case POWER_SUPPLY_PROP_ONLINE:
- val->intval = max14577_get_online(chg);
+ ret = max14577_get_online(chg, &val->intval);
break;
case POWER_SUPPLY_PROP_MODEL_NAME:
BUILD_BUG_ON(ARRAY_SIZE(model_names) != MAXIM_DEVICE_TYPE_NUM);
return ret;
}
+static const struct power_supply_desc max14577_charger_desc = {
+ .name = "max14577-charger",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = max14577_charger_props,
+ .num_properties = ARRAY_SIZE(max14577_charger_props),
+ .get_property = max14577_charger_get_property,
+};
+
#ifdef CONFIG_OF
static struct max14577_charger_platform_data *max14577_charger_dt_init(
struct platform_device *pdev)
static int max14577_charger_probe(struct platform_device *pdev)
{
struct max14577_charger *chg;
+ struct power_supply_config psy_cfg = {};
struct max14577 *max14577 = dev_get_drvdata(pdev->dev.parent);
int ret;
if (ret)
return ret;
- chg->charger.name = "max14577-charger",
- chg->charger.type = POWER_SUPPLY_TYPE_BATTERY,
- chg->charger.properties = max14577_charger_props,
- chg->charger.num_properties = ARRAY_SIZE(max14577_charger_props),
- chg->charger.get_property = max14577_charger_get_property,
-
ret = device_create_file(&pdev->dev, &dev_attr_fast_charge_timer);
if (ret) {
dev_err(&pdev->dev, "failed: create sysfs entry\n");
return ret;
}
- ret = power_supply_register(&pdev->dev, &chg->charger);
- if (ret) {
+ psy_cfg.drv_data = chg;
+ chg->charger = power_supply_register(&pdev->dev, &max14577_charger_desc,
+ &psy_cfg);
+ if (IS_ERR(chg->charger)) {
dev_err(&pdev->dev, "failed: power supply register\n");
+ ret = PTR_ERR(chg->charger);
goto err;
}
struct max14577_charger *chg = platform_get_drvdata(pdev);
device_remove_file(&pdev->dev, &dev_attr_fast_charge_timer);
- power_supply_unregister(&chg->charger);
+ power_supply_unregister(chg->charger);
return 0;
}
struct max17040_chip {
struct i2c_client *client;
struct delayed_work work;
- struct power_supply battery;
+ struct power_supply *battery;
struct max17040_platform_data *pdata;
/* State Of Connect */
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct max17040_chip *chip = container_of(psy,
- struct max17040_chip, battery);
+ struct max17040_chip *chip = power_supply_get_drvdata(psy);
switch (psp) {
case POWER_SUPPLY_PROP_STATUS:
max17040_get_online(chip->client);
max17040_get_status(chip->client);
- schedule_delayed_work(&chip->work, MAX17040_DELAY);
+ queue_delayed_work(system_power_efficient_wq, &chip->work,
+ MAX17040_DELAY);
}
static enum power_supply_property max17040_battery_props[] = {
POWER_SUPPLY_PROP_CAPACITY,
};
+static const struct power_supply_desc max17040_battery_desc = {
+ .name = "battery",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .get_property = max17040_get_property,
+ .properties = max17040_battery_props,
+ .num_properties = ARRAY_SIZE(max17040_battery_props),
+};
+
static int max17040_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
+ struct power_supply_config psy_cfg = {};
struct max17040_chip *chip;
- int ret;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
return -EIO;
chip->pdata = client->dev.platform_data;
i2c_set_clientdata(client, chip);
+ psy_cfg.drv_data = chip;
- chip->battery.name = "battery";
- chip->battery.type = POWER_SUPPLY_TYPE_BATTERY;
- chip->battery.get_property = max17040_get_property;
- chip->battery.properties = max17040_battery_props;
- chip->battery.num_properties = ARRAY_SIZE(max17040_battery_props);
-
- ret = power_supply_register(&client->dev, &chip->battery);
- if (ret) {
+ chip->battery = power_supply_register(&client->dev,
+ &max17040_battery_desc, &psy_cfg);
+ if (IS_ERR(chip->battery)) {
dev_err(&client->dev, "failed: power supply register\n");
- return ret;
+ return PTR_ERR(chip->battery);
}
max17040_reset(client);
max17040_get_version(client);
INIT_DEFERRABLE_WORK(&chip->work, max17040_work);
- schedule_delayed_work(&chip->work, MAX17040_DELAY);
+ queue_delayed_work(system_power_efficient_wq, &chip->work,
+ MAX17040_DELAY);
return 0;
}
{
struct max17040_chip *chip = i2c_get_clientdata(client);
- power_supply_unregister(&chip->battery);
+ power_supply_unregister(chip->battery);
cancel_delayed_work(&chip->work);
return 0;
}
struct i2c_client *client = to_i2c_client(dev);
struct max17040_chip *chip = i2c_get_clientdata(client);
- schedule_delayed_work(&chip->work, MAX17040_DELAY);
+ queue_delayed_work(system_power_efficient_wq, &chip->work,
+ MAX17040_DELAY);
return 0;
}
#define dP_ACC_100 0x1900
#define dP_ACC_200 0x3200
-#define MAX17042_IC_VERSION 0x0092
-#define MAX17047_IC_VERSION 0x00AC /* same for max17050 */
-
struct max17042_chip {
struct i2c_client *client;
struct regmap *regmap;
- struct power_supply battery;
+ struct power_supply *battery;
enum max170xx_chip_type chip_type;
struct max17042_platform_data *pdata;
struct work_struct work;
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct max17042_chip *chip = container_of(psy,
- struct max17042_chip, battery);
+ struct max17042_chip *chip = power_supply_get_drvdata(psy);
struct regmap *map = chip->regmap;
int ret;
u32 data;
val->intval *= 20000; /* Units of LSB = 20mV */
break;
case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
- if (chip->chip_type == MAX17042)
+ if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17042)
ret = regmap_read(map, MAX17042_V_empty, &data);
else
ret = regmap_read(map, MAX17047_V_empty, &data);
static inline void max10742_unlock_model(struct max17042_chip *chip)
{
struct regmap *map = chip->regmap;
+
regmap_write(map, MAX17042_MLOCKReg1, MODEL_UNLOCK1);
regmap_write(map, MAX17042_MLOCKReg2, MODEL_UNLOCK2);
}
{
struct regmap *map = chip->regmap;
int i;
+
for (i = 0; i < size; i++)
regmap_write(map, addr + i,
chip->pdata->config_data->cell_char_tbl[i]);
regmap_write(map, MAX17042_FilterCFG,
config->filter_cfg);
regmap_write(map, MAX17042_RelaxCFG, config->relax_cfg);
- if (chip->chip_type == MAX17047)
+ if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17047 ||
+ chip->chip_type == MAXIM_DEVICE_TYPE_MAX17050)
regmap_write(map, MAX17047_FullSOCThr,
config->full_soc_thresh);
}
max17042_write_verify_reg(map, MAX17042_RCOMP0, config->rcomp0);
max17042_write_verify_reg(map, MAX17042_TempCo, config->tcompc0);
max17042_write_verify_reg(map, MAX17042_ICHGTerm, config->ichgt_term);
- if (chip->chip_type == MAX17042) {
+ if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17042) {
regmap_write(map, MAX17042_EmptyTempCo, config->empty_tempco);
max17042_write_verify_reg(map, MAX17042_K_empty0,
config->kempty0);
max17042_override_por(map, MAX17042_FullCAP, config->fullcap);
max17042_override_por(map, MAX17042_FullCAPNom, config->fullcapnom);
- if (chip->chip_type == MAX17042)
+ if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17042)
max17042_override_por(map, MAX17042_SOC_empty,
config->socempty);
max17042_override_por(map, MAX17042_LAvg_empty, config->lavg_empty);
max17042_override_por(map, MAX17042_dQacc, config->dqacc);
max17042_override_por(map, MAX17042_dPacc, config->dpacc);
- if (chip->chip_type == MAX17042)
+ if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17042)
max17042_override_por(map, MAX17042_V_empty, config->vempty);
else
max17042_override_por(map, MAX17047_V_empty, config->vempty);
{
struct regmap *map = chip->regmap;
int ret;
- int val;
max17042_override_por_values(chip);
/* After Power up, the MAX17042 requires 500mS in order
max17042_load_new_capacity_params(chip);
/* Init complete, Clear the POR bit */
- regmap_read(map, MAX17042_STATUS, &val);
- regmap_write(map, MAX17042_STATUS, val & (~STATUS_POR_BIT));
+ regmap_update_bits(map, MAX17042_STATUS, STATUS_POR_BIT, 0x0);
return 0;
}
max17042_set_soc_threshold(chip, 1);
}
- power_supply_changed(&chip->battery);
+ power_supply_changed(chip->battery);
return IRQ_HANDLED;
}
.val_format_endian = REGMAP_ENDIAN_NATIVE,
};
+static const struct power_supply_desc max17042_psy_desc = {
+ .name = "max170xx_battery",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .get_property = max17042_get_property,
+ .properties = max17042_battery_props,
+ .num_properties = ARRAY_SIZE(max17042_battery_props),
+};
+
+static const struct power_supply_desc max17042_no_current_sense_psy_desc = {
+ .name = "max170xx_battery",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .get_property = max17042_get_property,
+ .properties = max17042_battery_props,
+ .num_properties = ARRAY_SIZE(max17042_battery_props) - 2,
+};
+
static int max17042_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
+ const struct power_supply_desc *max17042_desc = &max17042_psy_desc;
+ struct power_supply_config psy_cfg = {};
struct max17042_chip *chip;
int ret;
int i;
}
i2c_set_clientdata(client, chip);
-
- regmap_read(chip->regmap, MAX17042_DevName, &val);
- if (val == MAX17042_IC_VERSION) {
- dev_dbg(&client->dev, "chip type max17042 detected\n");
- chip->chip_type = MAX17042;
- } else if (val == MAX17047_IC_VERSION) {
- dev_dbg(&client->dev, "chip type max17047/50 detected\n");
- chip->chip_type = MAX17047;
- } else {
- dev_err(&client->dev, "device version mismatch: %x\n", val);
- return -EIO;
- }
-
- chip->battery.name = "max170xx_battery";
- chip->battery.type = POWER_SUPPLY_TYPE_BATTERY;
- chip->battery.get_property = max17042_get_property;
- chip->battery.properties = max17042_battery_props;
- chip->battery.num_properties = ARRAY_SIZE(max17042_battery_props);
+ chip->chip_type = id->driver_data;
+ psy_cfg.drv_data = chip;
/* When current is not measured,
* CURRENT_NOW and CURRENT_AVG properties should be invisible. */
if (!chip->pdata->enable_current_sense)
- chip->battery.num_properties -= 2;
+ max17042_desc = &max17042_no_current_sense_psy_desc;
if (chip->pdata->r_sns == 0)
chip->pdata->r_sns = MAX17042_DEFAULT_SNS_RESISTOR;
regmap_write(chip->regmap, MAX17042_LearnCFG, 0x0007);
}
- ret = power_supply_register(&client->dev, &chip->battery);
- if (ret) {
+ chip->battery = power_supply_register(&client->dev, max17042_desc,
+ &psy_cfg);
+ if (IS_ERR(chip->battery)) {
dev_err(&client->dev, "failed: power supply register\n");
- return ret;
+ return PTR_ERR(chip->battery);
}
if (client->irq) {
ret = request_threaded_irq(client->irq, NULL,
max17042_thread_handler,
IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
- chip->battery.name, chip);
+ chip->battery->desc->name, chip);
if (!ret) {
- regmap_read(chip->regmap, MAX17042_CONFIG, &val);
- val |= CONFIG_ALRT_BIT_ENBL;
- regmap_write(chip->regmap, MAX17042_CONFIG, val);
+ regmap_update_bits(chip->regmap, MAX17042_CONFIG,
+ CONFIG_ALRT_BIT_ENBL,
+ CONFIG_ALRT_BIT_ENBL);
max17042_set_soc_threshold(chip, 1);
} else {
client->irq = 0;
if (client->irq)
free_irq(client->irq, chip);
- power_supply_unregister(&chip->battery);
+ power_supply_unregister(chip->battery);
return 0;
}
#endif
static const struct i2c_device_id max17042_id[] = {
- { "max17042", 0 },
- { "max17047", 1 },
- { "max17050", 2 },
+ { "max17042", MAXIM_DEVICE_TYPE_MAX17042 },
+ { "max17047", MAXIM_DEVICE_TYPE_MAX17047 },
+ { "max17050", MAXIM_DEVICE_TYPE_MAX17050 },
{ }
};
MODULE_DEVICE_TABLE(i2c, max17042_id);
#include <linux/mfd/max77693.h>
#include <linux/mfd/max77693-private.h>
-static const char *max77693_charger_name = "max77693-charger";
+#define MAX77693_CHARGER_NAME "max77693-charger"
static const char *max77693_charger_model = "MAX77693";
static const char *max77693_charger_manufacturer = "Maxim Integrated";
struct max77693_charger {
struct device *dev;
struct max77693_dev *max77693;
- struct power_supply charger;
+ struct power_supply *charger;
u32 constant_volt;
u32 min_system_volt;
u32 charge_input_threshold_volt;
};
-static int max77693_get_charger_state(struct regmap *regmap)
+static int max77693_get_charger_state(struct regmap *regmap, int *val)
{
- int state;
+ int ret;
unsigned int data;
- if (regmap_read(regmap, MAX77693_CHG_REG_CHG_DETAILS_01, &data) < 0)
- return POWER_SUPPLY_STATUS_UNKNOWN;
+ ret = regmap_read(regmap, MAX77693_CHG_REG_CHG_DETAILS_01, &data);
+ if (ret < 0)
+ return ret;
data &= CHG_DETAILS_01_CHG_MASK;
data >>= CHG_DETAILS_01_CHG_SHIFT;
case MAX77693_CHARGING_TOP_OFF:
/* In high temp the charging current is reduced, but still charging */
case MAX77693_CHARGING_HIGH_TEMP:
- state = POWER_SUPPLY_STATUS_CHARGING;
+ *val = POWER_SUPPLY_STATUS_CHARGING;
break;
case MAX77693_CHARGING_DONE:
- state = POWER_SUPPLY_STATUS_FULL;
+ *val = POWER_SUPPLY_STATUS_FULL;
break;
case MAX77693_CHARGING_TIMER_EXPIRED:
case MAX77693_CHARGING_THERMISTOR_SUSPEND:
- state = POWER_SUPPLY_STATUS_NOT_CHARGING;
+ *val = POWER_SUPPLY_STATUS_NOT_CHARGING;
break;
case MAX77693_CHARGING_OFF:
case MAX77693_CHARGING_OVER_TEMP:
case MAX77693_CHARGING_WATCHDOG_EXPIRED:
- state = POWER_SUPPLY_STATUS_DISCHARGING;
+ *val = POWER_SUPPLY_STATUS_DISCHARGING;
break;
case MAX77693_CHARGING_RESERVED:
default:
- state = POWER_SUPPLY_STATUS_UNKNOWN;
+ *val = POWER_SUPPLY_STATUS_UNKNOWN;
}
- return state;
+ return 0;
}
-static int max77693_get_charge_type(struct regmap *regmap)
+static int max77693_get_charge_type(struct regmap *regmap, int *val)
{
- int state;
+ int ret;
unsigned int data;
- if (regmap_read(regmap, MAX77693_CHG_REG_CHG_DETAILS_01, &data) < 0)
- return POWER_SUPPLY_CHARGE_TYPE_UNKNOWN;
+ ret = regmap_read(regmap, MAX77693_CHG_REG_CHG_DETAILS_01, &data);
+ if (ret < 0)
+ return ret;
data &= CHG_DETAILS_01_CHG_MASK;
data >>= CHG_DETAILS_01_CHG_SHIFT;
* 100 and 250 mA. It is higher than prequalification current.
*/
case MAX77693_CHARGING_TOP_OFF:
- state = POWER_SUPPLY_CHARGE_TYPE_TRICKLE;
+ *val = POWER_SUPPLY_CHARGE_TYPE_TRICKLE;
break;
case MAX77693_CHARGING_FAST_CONST_CURRENT:
case MAX77693_CHARGING_FAST_CONST_VOLTAGE:
/* In high temp the charging current is reduced, but still charging */
case MAX77693_CHARGING_HIGH_TEMP:
- state = POWER_SUPPLY_CHARGE_TYPE_FAST;
+ *val = POWER_SUPPLY_CHARGE_TYPE_FAST;
break;
case MAX77693_CHARGING_DONE:
case MAX77693_CHARGING_TIMER_EXPIRED:
case MAX77693_CHARGING_OFF:
case MAX77693_CHARGING_OVER_TEMP:
case MAX77693_CHARGING_WATCHDOG_EXPIRED:
- state = POWER_SUPPLY_CHARGE_TYPE_NONE;
+ *val = POWER_SUPPLY_CHARGE_TYPE_NONE;
break;
case MAX77693_CHARGING_RESERVED:
default:
- state = POWER_SUPPLY_CHARGE_TYPE_UNKNOWN;
+ *val = POWER_SUPPLY_CHARGE_TYPE_UNKNOWN;
}
- return state;
+ return 0;
}
/*
* - POWER_SUPPLY_HEALTH_UNKNOWN
* - POWER_SUPPLY_HEALTH_UNSPEC_FAILURE
*/
-static int max77693_get_battery_health(struct regmap *regmap)
+static int max77693_get_battery_health(struct regmap *regmap, int *val)
{
- int state;
+ int ret;
unsigned int data;
- if (regmap_read(regmap, MAX77693_CHG_REG_CHG_DETAILS_01, &data) < 0)
- return POWER_SUPPLY_HEALTH_UNKNOWN;
+ ret = regmap_read(regmap, MAX77693_CHG_REG_CHG_DETAILS_01, &data);
+ if (ret < 0)
+ return ret;
data &= CHG_DETAILS_01_BAT_MASK;
data >>= CHG_DETAILS_01_BAT_SHIFT;
switch (data) {
case MAX77693_BATTERY_NOBAT:
- state = POWER_SUPPLY_HEALTH_DEAD;
+ *val = POWER_SUPPLY_HEALTH_DEAD;
break;
case MAX77693_BATTERY_PREQUALIFICATION:
case MAX77693_BATTERY_GOOD:
case MAX77693_BATTERY_LOWVOLTAGE:
- state = POWER_SUPPLY_HEALTH_GOOD;
+ *val = POWER_SUPPLY_HEALTH_GOOD;
break;
case MAX77693_BATTERY_TIMER_EXPIRED:
/*
* Took longer to charge than expected, charging suspended.
* Damaged battery?
*/
- state = POWER_SUPPLY_HEALTH_SAFETY_TIMER_EXPIRE;
+ *val = POWER_SUPPLY_HEALTH_SAFETY_TIMER_EXPIRE;
break;
case MAX77693_BATTERY_OVERVOLTAGE:
- state = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
+ *val = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
break;
case MAX77693_BATTERY_OVERCURRENT:
- state = POWER_SUPPLY_HEALTH_UNSPEC_FAILURE;
+ *val = POWER_SUPPLY_HEALTH_UNSPEC_FAILURE;
break;
case MAX77693_BATTERY_RESERVED:
default:
- state = POWER_SUPPLY_HEALTH_UNKNOWN;
+ *val = POWER_SUPPLY_HEALTH_UNKNOWN;
break;
}
- return state;
+ return 0;
}
-static int max77693_get_present(struct regmap *regmap)
+static int max77693_get_present(struct regmap *regmap, int *val)
{
unsigned int data;
+ int ret;
/*
* Read CHG_INT_OK register. High DETBAT bit here should be
* equal to value 0x0 in CHG_DETAILS_01/BAT field.
*/
- regmap_read(regmap, MAX77693_CHG_REG_CHG_INT_OK, &data);
- if (data & CHG_INT_OK_DETBAT_MASK)
- return 0;
- return 1;
+ ret = regmap_read(regmap, MAX77693_CHG_REG_CHG_INT_OK, &data);
+ if (ret < 0)
+ return ret;
+
+ *val = (data & CHG_INT_OK_DETBAT_MASK) ? 0 : 1;
+
+ return 0;
}
-static int max77693_get_online(struct regmap *regmap)
+static int max77693_get_online(struct regmap *regmap, int *val)
{
unsigned int data;
+ int ret;
+
+ ret = regmap_read(regmap, MAX77693_CHG_REG_CHG_INT_OK, &data);
+ if (ret < 0)
+ return ret;
+
+ *val = (data & CHG_INT_OK_CHGIN_MASK) ? 1 : 0;
- regmap_read(regmap, MAX77693_CHG_REG_CHG_INT_OK, &data);
- if (data & CHG_INT_OK_CHGIN_MASK)
- return 1;
return 0;
}
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct max77693_charger *chg = container_of(psy,
- struct max77693_charger,
- charger);
+ struct max77693_charger *chg = power_supply_get_drvdata(psy);
struct regmap *regmap = chg->max77693->regmap;
int ret = 0;
switch (psp) {
case POWER_SUPPLY_PROP_STATUS:
- val->intval = max77693_get_charger_state(regmap);
+ ret = max77693_get_charger_state(regmap, &val->intval);
break;
case POWER_SUPPLY_PROP_CHARGE_TYPE:
- val->intval = max77693_get_charge_type(regmap);
+ ret = max77693_get_charge_type(regmap, &val->intval);
break;
case POWER_SUPPLY_PROP_HEALTH:
- val->intval = max77693_get_battery_health(regmap);
+ ret = max77693_get_battery_health(regmap, &val->intval);
break;
case POWER_SUPPLY_PROP_PRESENT:
- val->intval = max77693_get_present(regmap);
+ ret = max77693_get_present(regmap, &val->intval);
break;
case POWER_SUPPLY_PROP_ONLINE:
- val->intval = max77693_get_online(regmap);
+ ret = max77693_get_online(regmap, &val->intval);
break;
case POWER_SUPPLY_PROP_MODEL_NAME:
val->strval = max77693_charger_model;
return ret;
}
+static const struct power_supply_desc max77693_charger_desc = {
+ .name = MAX77693_CHARGER_NAME,
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = max77693_charger_props,
+ .num_properties = ARRAY_SIZE(max77693_charger_props),
+ .get_property = max77693_charger_get_property,
+};
+
static ssize_t device_attr_store(struct device *dev,
struct device_attribute *attr, const char *buf, size_t count,
int (*fn)(struct max77693_charger *, unsigned long))
static int max77693_charger_probe(struct platform_device *pdev)
{
struct max77693_charger *chg;
+ struct power_supply_config psy_cfg = {};
struct max77693_dev *max77693 = dev_get_drvdata(pdev->dev.parent);
int ret;
if (ret)
return ret;
- chg->charger.name = max77693_charger_name;
- chg->charger.type = POWER_SUPPLY_TYPE_BATTERY;
- chg->charger.properties = max77693_charger_props;
- chg->charger.num_properties = ARRAY_SIZE(max77693_charger_props);
- chg->charger.get_property = max77693_charger_get_property;
+ psy_cfg.drv_data = chg;
ret = device_create_file(&pdev->dev, &dev_attr_fast_charge_timer);
if (ret) {
goto err;
}
- ret = power_supply_register(&pdev->dev, &chg->charger);
- if (ret) {
+ chg->charger = power_supply_register(&pdev->dev,
+ &max77693_charger_desc,
+ &psy_cfg);
+ if (IS_ERR(chg->charger)) {
dev_err(&pdev->dev, "failed: power supply register\n");
+ ret = PTR_ERR(chg->charger);
goto err;
}
device_remove_file(&pdev->dev, &dev_attr_top_off_threshold_current);
device_remove_file(&pdev->dev, &dev_attr_fast_charge_timer);
- power_supply_unregister(&chg->charger);
+ power_supply_unregister(chg->charger);
return 0;
}
struct max8903_data {
struct max8903_pdata pdata;
struct device *dev;
- struct power_supply psy;
+ struct power_supply *psy;
+ struct power_supply_desc psy_desc;
bool fault;
bool usb_in;
bool ta_in;
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct max8903_data *data = container_of(psy,
- struct max8903_data, psy);
+ struct max8903_data *data = power_supply_get_drvdata(psy);
switch (psp) {
case POWER_SUPPLY_PROP_STATUS:
dev_dbg(data->dev, "TA(DC-IN) Charger %s.\n", ta_in ?
"Connected" : "Disconnected");
- old_type = data->psy.type;
+ old_type = data->psy_desc.type;
if (data->ta_in)
- data->psy.type = POWER_SUPPLY_TYPE_MAINS;
+ data->psy_desc.type = POWER_SUPPLY_TYPE_MAINS;
else if (data->usb_in)
- data->psy.type = POWER_SUPPLY_TYPE_USB;
+ data->psy_desc.type = POWER_SUPPLY_TYPE_USB;
else
- data->psy.type = POWER_SUPPLY_TYPE_BATTERY;
+ data->psy_desc.type = POWER_SUPPLY_TYPE_BATTERY;
- if (old_type != data->psy.type)
- power_supply_changed(&data->psy);
+ if (old_type != data->psy_desc.type)
+ power_supply_changed(data->psy);
return IRQ_HANDLED;
}
dev_dbg(data->dev, "USB Charger %s.\n", usb_in ?
"Connected" : "Disconnected");
- old_type = data->psy.type;
+ old_type = data->psy_desc.type;
if (data->ta_in)
- data->psy.type = POWER_SUPPLY_TYPE_MAINS;
+ data->psy_desc.type = POWER_SUPPLY_TYPE_MAINS;
else if (data->usb_in)
- data->psy.type = POWER_SUPPLY_TYPE_USB;
+ data->psy_desc.type = POWER_SUPPLY_TYPE_USB;
else
- data->psy.type = POWER_SUPPLY_TYPE_BATTERY;
+ data->psy_desc.type = POWER_SUPPLY_TYPE_BATTERY;
- if (old_type != data->psy.type)
- power_supply_changed(&data->psy);
+ if (old_type != data->psy_desc.type)
+ power_supply_changed(data->psy);
return IRQ_HANDLED;
}
struct max8903_data *data;
struct device *dev = &pdev->dev;
struct max8903_pdata *pdata = pdev->dev.platform_data;
+ struct power_supply_config psy_cfg = {};
int ret = 0;
int gpio;
int ta_in = 0;
data->ta_in = ta_in;
data->usb_in = usb_in;
- data->psy.name = "max8903_charger";
- data->psy.type = (ta_in) ? POWER_SUPPLY_TYPE_MAINS :
+ data->psy_desc.name = "max8903_charger";
+ data->psy_desc.type = (ta_in) ? POWER_SUPPLY_TYPE_MAINS :
((usb_in) ? POWER_SUPPLY_TYPE_USB :
POWER_SUPPLY_TYPE_BATTERY);
- data->psy.get_property = max8903_get_property;
- data->psy.properties = max8903_charger_props;
- data->psy.num_properties = ARRAY_SIZE(max8903_charger_props);
+ data->psy_desc.get_property = max8903_get_property;
+ data->psy_desc.properties = max8903_charger_props;
+ data->psy_desc.num_properties = ARRAY_SIZE(max8903_charger_props);
- ret = power_supply_register(dev, &data->psy);
- if (ret) {
+ psy_cfg.drv_data = data;
+
+ data->psy = power_supply_register(dev, &data->psy_desc, &psy_cfg);
+ if (IS_ERR(data->psy)) {
dev_err(dev, "failed: power supply register.\n");
+ ret = PTR_ERR(data->psy);
goto err;
}
if (pdata->dc_valid)
free_irq(gpio_to_irq(pdata->dok), data);
err_psy:
- power_supply_unregister(&data->psy);
+ power_supply_unregister(data->psy);
err:
return ret;
}
free_irq(gpio_to_irq(pdata->uok), data);
if (pdata->dc_valid)
free_irq(gpio_to_irq(pdata->dok), data);
- power_supply_unregister(&data->psy);
+ power_supply_unregister(data->psy);
}
return 0;
struct i2c_client *gpm;
struct i2c_client *adc;
- struct power_supply ac;
- struct power_supply usb;
- struct power_supply battery;
+ struct power_supply *ac;
+ struct power_supply *usb;
+ struct power_supply *battery;
int irq_base;
unsigned ac_online:1;
unsigned usb_online:1;
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct max8925_power_info *info = dev_get_drvdata(psy->dev->parent);
+ struct max8925_power_info *info = dev_get_drvdata(psy->dev.parent);
int ret = 0;
switch (psp) {
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct max8925_power_info *info = dev_get_drvdata(psy->dev->parent);
+ struct max8925_power_info *info = dev_get_drvdata(psy->dev.parent);
int ret = 0;
switch (psp) {
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct max8925_power_info *info = dev_get_drvdata(psy->dev->parent);
+ struct max8925_power_info *info = dev_get_drvdata(psy->dev.parent);
int ret = 0;
switch (psp) {
POWER_SUPPLY_PROP_STATUS,
};
+static const struct power_supply_desc ac_desc = {
+ .name = "max8925-ac",
+ .type = POWER_SUPPLY_TYPE_MAINS,
+ .properties = max8925_ac_props,
+ .num_properties = ARRAY_SIZE(max8925_ac_props),
+ .get_property = max8925_ac_get_prop,
+};
+
+static const struct power_supply_desc usb_desc = {
+ .name = "max8925-usb",
+ .type = POWER_SUPPLY_TYPE_USB,
+ .properties = max8925_usb_props,
+ .num_properties = ARRAY_SIZE(max8925_usb_props),
+ .get_property = max8925_usb_get_prop,
+};
+
+static const struct power_supply_desc battery_desc = {
+ .name = "max8925-battery",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = max8925_battery_props,
+ .num_properties = ARRAY_SIZE(max8925_battery_props),
+ .get_property = max8925_bat_get_prop,
+};
+
#define REQUEST_IRQ(_irq, _name) \
do { \
ret = request_threaded_irq(chip->irq_base + _irq, NULL, \
static int max8925_power_probe(struct platform_device *pdev)
{
struct max8925_chip *chip = dev_get_drvdata(pdev->dev.parent);
+ struct power_supply_config psy_cfg = {}; /* Only for ac and usb */
struct max8925_power_pdata *pdata = NULL;
struct max8925_power_info *info;
int ret;
info->adc = chip->adc;
platform_set_drvdata(pdev, info);
- info->ac.name = "max8925-ac";
- info->ac.type = POWER_SUPPLY_TYPE_MAINS;
- info->ac.properties = max8925_ac_props;
- info->ac.num_properties = ARRAY_SIZE(max8925_ac_props);
- info->ac.get_property = max8925_ac_get_prop;
- info->ac.supplied_to = pdata->supplied_to;
- info->ac.num_supplicants = pdata->num_supplicants;
- ret = power_supply_register(&pdev->dev, &info->ac);
- if (ret)
+ psy_cfg.supplied_to = pdata->supplied_to;
+ psy_cfg.num_supplicants = pdata->num_supplicants;
+
+ info->ac = power_supply_register(&pdev->dev, &ac_desc, &psy_cfg);
+ if (IS_ERR(info->ac)) {
+ ret = PTR_ERR(info->ac);
goto out;
- info->ac.dev->parent = &pdev->dev;
-
- info->usb.name = "max8925-usb";
- info->usb.type = POWER_SUPPLY_TYPE_USB;
- info->usb.properties = max8925_usb_props;
- info->usb.num_properties = ARRAY_SIZE(max8925_usb_props);
- info->usb.get_property = max8925_usb_get_prop;
- info->usb.supplied_to = pdata->supplied_to;
- info->usb.num_supplicants = pdata->num_supplicants;
-
- ret = power_supply_register(&pdev->dev, &info->usb);
- if (ret)
+ }
+ info->ac->dev.parent = &pdev->dev;
+
+ info->usb = power_supply_register(&pdev->dev, &usb_desc, &psy_cfg);
+ if (IS_ERR(info->usb)) {
+ ret = PTR_ERR(info->usb);
goto out_usb;
- info->usb.dev->parent = &pdev->dev;
-
- info->battery.name = "max8925-battery";
- info->battery.type = POWER_SUPPLY_TYPE_BATTERY;
- info->battery.properties = max8925_battery_props;
- info->battery.num_properties = ARRAY_SIZE(max8925_battery_props);
- info->battery.get_property = max8925_bat_get_prop;
- ret = power_supply_register(&pdev->dev, &info->battery);
- if (ret)
+ }
+ info->usb->dev.parent = &pdev->dev;
+
+ info->battery = power_supply_register(&pdev->dev, &battery_desc, NULL);
+ if (IS_ERR(info->battery)) {
+ ret = PTR_ERR(info->battery);
goto out_battery;
- info->battery.dev->parent = &pdev->dev;
+ }
+ info->battery->dev.parent = &pdev->dev;
info->batt_detect = pdata->batt_detect;
info->topoff_threshold = pdata->topoff_threshold;
max8925_init_charger(chip, info);
return 0;
out_battery:
- power_supply_unregister(&info->battery);
+ power_supply_unregister(info->battery);
out_usb:
- power_supply_unregister(&info->ac);
+ power_supply_unregister(info->ac);
out:
return ret;
}
struct max8925_power_info *info = platform_get_drvdata(pdev);
if (info) {
- power_supply_unregister(&info->ac);
- power_supply_unregister(&info->usb);
- power_supply_unregister(&info->battery);
+ power_supply_unregister(info->ac);
+ power_supply_unregister(info->usb);
+ power_supply_unregister(info->battery);
max8925_deinit_charger(info);
}
return 0;
struct charger_data {
struct device *dev;
struct max8997_dev *iodev;
- struct power_supply battery;
+ struct power_supply *battery;
};
static enum power_supply_property max8997_battery_props[] = {
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct charger_data *charger = container_of(psy,
- struct charger_data, battery);
+ struct charger_data *charger = power_supply_get_drvdata(psy);
struct i2c_client *i2c = charger->iodev->i2c;
int ret;
u8 reg;
return 0;
}
+static const struct power_supply_desc max8997_battery_desc = {
+ .name = "max8997_pmic",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .get_property = max8997_battery_get_property,
+ .properties = max8997_battery_props,
+ .num_properties = ARRAY_SIZE(max8997_battery_props),
+};
+
static int max8997_battery_probe(struct platform_device *pdev)
{
int ret = 0;
struct charger_data *charger;
struct max8997_dev *iodev = dev_get_drvdata(pdev->dev.parent);
struct max8997_platform_data *pdata = dev_get_platdata(iodev->dev);
+ struct power_supply_config psy_cfg = {};
if (!pdata)
return -EINVAL;
platform_set_drvdata(pdev, charger);
- charger->battery.name = "max8997_pmic";
- charger->battery.type = POWER_SUPPLY_TYPE_BATTERY;
- charger->battery.get_property = max8997_battery_get_property;
- charger->battery.properties = max8997_battery_props;
- charger->battery.num_properties = ARRAY_SIZE(max8997_battery_props);
charger->dev = &pdev->dev;
charger->iodev = iodev;
- ret = power_supply_register(&pdev->dev, &charger->battery);
- if (ret) {
+ psy_cfg.drv_data = charger;
+
+ charger->battery = power_supply_register(&pdev->dev,
+ &max8997_battery_desc,
+ &psy_cfg);
+ if (IS_ERR(charger->battery)) {
dev_err(&pdev->dev, "failed: power supply register\n");
- return ret;
+ return PTR_ERR(charger->battery);
}
return 0;
{
struct charger_data *charger = platform_get_drvdata(pdev);
- power_supply_unregister(&charger->battery);
+ power_supply_unregister(charger->battery);
return 0;
}
struct max8998_battery_data {
struct device *dev;
struct max8998_dev *iodev;
- struct power_supply battery;
+ struct power_supply *battery;
};
static enum power_supply_property max8998_battery_props[] = {
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct max8998_battery_data *max8998 = container_of(psy,
- struct max8998_battery_data, battery);
+ struct max8998_battery_data *max8998 = power_supply_get_drvdata(psy);
struct i2c_client *i2c = max8998->iodev->i2c;
int ret;
u8 reg;
return 0;
}
+static const struct power_supply_desc max8998_battery_desc = {
+ .name = "max8998_pmic",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .get_property = max8998_battery_get_property,
+ .properties = max8998_battery_props,
+ .num_properties = ARRAY_SIZE(max8998_battery_props),
+};
+
static int max8998_battery_probe(struct platform_device *pdev)
{
struct max8998_dev *iodev = dev_get_drvdata(pdev->dev.parent);
struct max8998_platform_data *pdata = dev_get_platdata(iodev->dev);
+ struct power_supply_config psy_cfg = {};
struct max8998_battery_data *max8998;
struct i2c_client *i2c;
int ret = 0;
goto err;
}
- max8998->battery.name = "max8998_pmic";
- max8998->battery.type = POWER_SUPPLY_TYPE_BATTERY;
- max8998->battery.get_property = max8998_battery_get_property;
- max8998->battery.properties = max8998_battery_props;
- max8998->battery.num_properties = ARRAY_SIZE(max8998_battery_props);
+ psy_cfg.drv_data = max8998;
- ret = power_supply_register(max8998->dev, &max8998->battery);
- if (ret) {
- dev_err(max8998->dev, "failed: power supply register\n");
+ max8998->battery = power_supply_register(max8998->dev,
+ &max8998_battery_desc,
+ &psy_cfg);
+ if (IS_ERR(max8998->battery)) {
+ ret = PTR_ERR(max8998->battery);
+ dev_err(max8998->dev, "failed: power supply register: %d\n",
+ ret);
goto err;
}
{
struct max8998_battery_data *max8998 = platform_get_drvdata(pdev);
- power_supply_unregister(&max8998->battery);
+ power_supply_unregister(max8998->battery);
return 0;
}
POWER_SUPPLY_PROP_ONLINE,
};
-static struct power_supply olpc_ac = {
+static const struct power_supply_desc olpc_ac_desc = {
.name = "olpc-ac",
.type = POWER_SUPPLY_TYPE_MAINS,
.properties = olpc_ac_props,
.get_property = olpc_ac_get_prop,
};
+static struct power_supply *olpc_ac;
+
static char bat_serial[17]; /* Ick */
static int olpc_bat_get_status(union power_supply_propval *val, uint8_t ec_byte)
* Initialisation
*********************************************************************/
-static struct power_supply olpc_bat = {
+static struct power_supply_desc olpc_bat_desc = {
.name = "olpc-battery",
.get_property = olpc_bat_get_property,
.use_for_apm = 1,
};
+static struct power_supply *olpc_bat;
+
static int olpc_battery_suspend(struct platform_device *pdev,
pm_message_t state)
{
- if (device_may_wakeup(olpc_ac.dev))
+ if (device_may_wakeup(&olpc_ac->dev))
olpc_ec_wakeup_set(EC_SCI_SRC_ACPWR);
else
olpc_ec_wakeup_clear(EC_SCI_SRC_ACPWR);
- if (device_may_wakeup(olpc_bat.dev))
+ if (device_may_wakeup(&olpc_bat->dev))
olpc_ec_wakeup_set(EC_SCI_SRC_BATTERY | EC_SCI_SRC_BATSOC
| EC_SCI_SRC_BATERR);
else
/* Ignore the status. It doesn't actually matter */
- ret = power_supply_register(&pdev->dev, &olpc_ac);
- if (ret)
- return ret;
+ olpc_ac = power_supply_register(&pdev->dev, &olpc_ac_desc, NULL);
+ if (IS_ERR(olpc_ac))
+ return PTR_ERR(olpc_ac);
if (olpc_board_at_least(olpc_board_pre(0xd0))) { /* XO-1.5 */
- olpc_bat.properties = olpc_xo15_bat_props;
- olpc_bat.num_properties = ARRAY_SIZE(olpc_xo15_bat_props);
+ olpc_bat_desc.properties = olpc_xo15_bat_props;
+ olpc_bat_desc.num_properties = ARRAY_SIZE(olpc_xo15_bat_props);
} else { /* XO-1 */
- olpc_bat.properties = olpc_xo1_bat_props;
- olpc_bat.num_properties = ARRAY_SIZE(olpc_xo1_bat_props);
+ olpc_bat_desc.properties = olpc_xo1_bat_props;
+ olpc_bat_desc.num_properties = ARRAY_SIZE(olpc_xo1_bat_props);
}
- ret = power_supply_register(&pdev->dev, &olpc_bat);
- if (ret)
+ olpc_bat = power_supply_register(&pdev->dev, &olpc_bat_desc, NULL);
+ if (IS_ERR(olpc_bat)) {
+ ret = PTR_ERR(olpc_bat);
goto battery_failed;
+ }
- ret = device_create_bin_file(olpc_bat.dev, &olpc_bat_eeprom);
+ ret = device_create_bin_file(&olpc_bat->dev, &olpc_bat_eeprom);
if (ret)
goto eeprom_failed;
- ret = device_create_file(olpc_bat.dev, &olpc_bat_error);
+ ret = device_create_file(&olpc_bat->dev, &olpc_bat_error);
if (ret)
goto error_failed;
if (olpc_ec_wakeup_available()) {
- device_set_wakeup_capable(olpc_ac.dev, true);
- device_set_wakeup_capable(olpc_bat.dev, true);
+ device_set_wakeup_capable(&olpc_ac->dev, true);
+ device_set_wakeup_capable(&olpc_bat->dev, true);
}
return 0;
error_failed:
- device_remove_bin_file(olpc_bat.dev, &olpc_bat_eeprom);
+ device_remove_bin_file(&olpc_bat->dev, &olpc_bat_eeprom);
eeprom_failed:
- power_supply_unregister(&olpc_bat);
+ power_supply_unregister(olpc_bat);
battery_failed:
- power_supply_unregister(&olpc_ac);
+ power_supply_unregister(olpc_ac);
return ret;
}
static int olpc_battery_remove(struct platform_device *pdev)
{
- device_remove_file(olpc_bat.dev, &olpc_bat_error);
- device_remove_bin_file(olpc_bat.dev, &olpc_bat_eeprom);
- power_supply_unregister(&olpc_bat);
- power_supply_unregister(&olpc_ac);
+ device_remove_file(&olpc_bat->dev, &olpc_bat_error);
+ device_remove_bin_file(&olpc_bat->dev, &olpc_bat_eeprom);
+ power_supply_unregister(olpc_bat);
+ power_supply_unregister(olpc_ac);
return 0;
}
int adapter_online;
int usb_online;
- struct power_supply usb;
- struct power_supply adapter;
- struct power_supply ac;
+ struct power_supply *usb;
+ struct power_supply *adapter;
+ struct power_supply *ac;
};
int pcf50633_mbc_usb_curlim_set(struct pcf50633 *pcf, int ma)
PCF50633_MBCC1_CHGENA, PCF50633_MBCC1_CHGENA);
}
- power_supply_changed(&mbc->usb);
+ power_supply_changed(mbc->usb);
return ret;
}
else if (irq == PCF50633_IRQ_ADPREM)
mbc->adapter_online = 0;
- power_supply_changed(&mbc->ac);
- power_supply_changed(&mbc->usb);
- power_supply_changed(&mbc->adapter);
+ power_supply_changed(mbc->ac);
+ power_supply_changed(mbc->usb);
+ power_supply_changed(mbc->adapter);
if (mbc->pcf->pdata->mbc_event_callback)
mbc->pcf->pdata->mbc_event_callback(mbc->pcf, irq);
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct pcf50633_mbc *mbc = container_of(psy,
- struct pcf50633_mbc, adapter);
+ struct pcf50633_mbc *mbc = power_supply_get_drvdata(psy);
int ret = 0;
switch (psp) {
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct pcf50633_mbc *mbc = container_of(psy, struct pcf50633_mbc, usb);
+ struct pcf50633_mbc *mbc = power_supply_get_drvdata(psy);
int ret = 0;
u8 usblim = pcf50633_reg_read(mbc->pcf, PCF50633_REG_MBCC7) &
PCF50633_MBCC7_USB_MASK;
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct pcf50633_mbc *mbc = container_of(psy, struct pcf50633_mbc, ac);
+ struct pcf50633_mbc *mbc = power_supply_get_drvdata(psy);
int ret = 0;
u8 usblim = pcf50633_reg_read(mbc->pcf, PCF50633_REG_MBCC7) &
PCF50633_MBCC7_USB_MASK;
PCF50633_IRQ_LOWBAT,
};
+static const struct power_supply_desc pcf50633_mbc_adapter_desc = {
+ .name = "adapter",
+ .type = POWER_SUPPLY_TYPE_MAINS,
+ .properties = power_props,
+ .num_properties = ARRAY_SIZE(power_props),
+ .get_property = &adapter_get_property,
+};
+
+static const struct power_supply_desc pcf50633_mbc_usb_desc = {
+ .name = "usb",
+ .type = POWER_SUPPLY_TYPE_USB,
+ .properties = power_props,
+ .num_properties = ARRAY_SIZE(power_props),
+ .get_property = usb_get_property,
+};
+
+static const struct power_supply_desc pcf50633_mbc_ac_desc = {
+ .name = "ac",
+ .type = POWER_SUPPLY_TYPE_MAINS,
+ .properties = power_props,
+ .num_properties = ARRAY_SIZE(power_props),
+ .get_property = ac_get_property,
+};
+
static int pcf50633_mbc_probe(struct platform_device *pdev)
{
+ struct power_supply_config psy_cfg = {};
struct pcf50633_mbc *mbc;
int ret;
int i;
pcf50633_register_irq(mbc->pcf, mbc_irq_handlers[i],
pcf50633_mbc_irq_handler, mbc);
+ psy_cfg.supplied_to = mbc->pcf->pdata->batteries;
+ psy_cfg.num_supplicants = mbc->pcf->pdata->num_batteries;
+ psy_cfg.drv_data = mbc;
+
/* Create power supplies */
- mbc->adapter.name = "adapter";
- mbc->adapter.type = POWER_SUPPLY_TYPE_MAINS;
- mbc->adapter.properties = power_props;
- mbc->adapter.num_properties = ARRAY_SIZE(power_props);
- mbc->adapter.get_property = &adapter_get_property;
- mbc->adapter.supplied_to = mbc->pcf->pdata->batteries;
- mbc->adapter.num_supplicants = mbc->pcf->pdata->num_batteries;
-
- mbc->usb.name = "usb";
- mbc->usb.type = POWER_SUPPLY_TYPE_USB;
- mbc->usb.properties = power_props;
- mbc->usb.num_properties = ARRAY_SIZE(power_props);
- mbc->usb.get_property = usb_get_property;
- mbc->usb.supplied_to = mbc->pcf->pdata->batteries;
- mbc->usb.num_supplicants = mbc->pcf->pdata->num_batteries;
-
- mbc->ac.name = "ac";
- mbc->ac.type = POWER_SUPPLY_TYPE_MAINS;
- mbc->ac.properties = power_props;
- mbc->ac.num_properties = ARRAY_SIZE(power_props);
- mbc->ac.get_property = ac_get_property;
- mbc->ac.supplied_to = mbc->pcf->pdata->batteries;
- mbc->ac.num_supplicants = mbc->pcf->pdata->num_batteries;
-
- ret = power_supply_register(&pdev->dev, &mbc->adapter);
- if (ret) {
+ mbc->adapter = power_supply_register(&pdev->dev,
+ &pcf50633_mbc_adapter_desc,
+ &psy_cfg);
+ if (IS_ERR(mbc->adapter)) {
dev_err(mbc->pcf->dev, "failed to register adapter\n");
+ ret = PTR_ERR(mbc->adapter);
return ret;
}
- ret = power_supply_register(&pdev->dev, &mbc->usb);
- if (ret) {
+ mbc->usb = power_supply_register(&pdev->dev, &pcf50633_mbc_usb_desc,
+ &psy_cfg);
+ if (IS_ERR(mbc->usb)) {
dev_err(mbc->pcf->dev, "failed to register usb\n");
- power_supply_unregister(&mbc->adapter);
+ power_supply_unregister(mbc->adapter);
+ ret = PTR_ERR(mbc->usb);
return ret;
}
- ret = power_supply_register(&pdev->dev, &mbc->ac);
- if (ret) {
+ mbc->ac = power_supply_register(&pdev->dev, &pcf50633_mbc_ac_desc,
+ &psy_cfg);
+ if (IS_ERR(mbc->ac)) {
dev_err(mbc->pcf->dev, "failed to register ac\n");
- power_supply_unregister(&mbc->adapter);
- power_supply_unregister(&mbc->usb);
+ power_supply_unregister(mbc->adapter);
+ power_supply_unregister(mbc->usb);
+ ret = PTR_ERR(mbc->ac);
return ret;
}
pcf50633_free_irq(mbc->pcf, mbc_irq_handlers[i]);
sysfs_remove_group(&pdev->dev.kobj, &mbc_attr_group);
- power_supply_unregister(&mbc->usb);
- power_supply_unregister(&mbc->adapter);
- power_supply_unregister(&mbc->ac);
+ power_supply_unregister(mbc->usb);
+ power_supply_unregister(mbc->adapter);
+ power_supply_unregister(mbc->ac);
return 0;
}
static struct timer_list supply_timer;
static struct timer_list polling_timer;
static int polling;
+static struct power_supply *pda_psy_ac, *pda_psy_usb;
#if IS_ENABLED(CONFIG_USB_PHY)
static struct usb_phy *transceiver;
{
switch (psp) {
case POWER_SUPPLY_PROP_ONLINE:
- if (psy->type == POWER_SUPPLY_TYPE_MAINS)
+ if (psy->desc->type == POWER_SUPPLY_TYPE_MAINS)
val->intval = pdata->is_ac_online ?
pdata->is_ac_online() : 0;
else
"backup-battery",
};
-static struct power_supply pda_psy_ac = {
+static const struct power_supply_desc pda_psy_ac_desc = {
.name = "ac",
.type = POWER_SUPPLY_TYPE_MAINS,
- .supplied_to = pda_power_supplied_to,
- .num_supplicants = ARRAY_SIZE(pda_power_supplied_to),
.properties = pda_power_props,
.num_properties = ARRAY_SIZE(pda_power_props),
.get_property = pda_power_get_property,
};
-static struct power_supply pda_psy_usb = {
+static const struct power_supply_desc pda_psy_usb_desc = {
.name = "usb",
.type = POWER_SUPPLY_TYPE_USB,
- .supplied_to = pda_power_supplied_to,
- .num_supplicants = ARRAY_SIZE(pda_power_supplied_to),
.properties = pda_power_props,
.num_properties = ARRAY_SIZE(pda_power_props),
.get_property = pda_power_get_property,
{
if (ac_status == PDA_PSY_TO_CHANGE) {
ac_status = new_ac_status;
- power_supply_changed(&pda_psy_ac);
+ power_supply_changed(pda_psy_ac);
}
if (usb_status == PDA_PSY_TO_CHANGE) {
usb_status = new_usb_status;
- power_supply_changed(&pda_psy_usb);
+ power_supply_changed(pda_psy_usb);
}
}
static irqreturn_t power_changed_isr(int irq, void *power_supply)
{
- if (power_supply == &pda_psy_ac)
+ if (power_supply == pda_psy_ac)
ac_status = PDA_PSY_TO_CHANGE;
- else if (power_supply == &pda_psy_usb)
+ else if (power_supply == pda_psy_usb)
usb_status = PDA_PSY_TO_CHANGE;
else
return IRQ_NONE;
static int pda_power_probe(struct platform_device *pdev)
{
+ struct power_supply_config psy_cfg = {};
int ret = 0;
dev = &pdev->dev;
usb_irq = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "usb");
if (pdata->supplied_to) {
- pda_psy_ac.supplied_to = pdata->supplied_to;
- pda_psy_ac.num_supplicants = pdata->num_supplicants;
- pda_psy_usb.supplied_to = pdata->supplied_to;
- pda_psy_usb.num_supplicants = pdata->num_supplicants;
+ psy_cfg.supplied_to = pdata->supplied_to;
+ psy_cfg.num_supplicants = pdata->num_supplicants;
+ } else {
+ psy_cfg.supplied_to = pda_power_supplied_to;
+ psy_cfg.num_supplicants = ARRAY_SIZE(pda_power_supplied_to);
}
#if IS_ENABLED(CONFIG_USB_PHY)
#endif
if (pdata->is_ac_online) {
- ret = power_supply_register(&pdev->dev, &pda_psy_ac);
- if (ret) {
+ pda_psy_ac = power_supply_register(&pdev->dev,
+ &pda_psy_ac_desc, &psy_cfg);
+ if (IS_ERR(pda_psy_ac)) {
dev_err(dev, "failed to register %s power supply\n",
- pda_psy_ac.name);
+ pda_psy_ac_desc.name);
+ ret = PTR_ERR(pda_psy_ac);
goto ac_supply_failed;
}
if (ac_irq) {
ret = request_irq(ac_irq->start, power_changed_isr,
get_irq_flags(ac_irq), ac_irq->name,
- &pda_psy_ac);
+ pda_psy_ac);
if (ret) {
dev_err(dev, "request ac irq failed\n");
goto ac_irq_failed;
}
if (pdata->is_usb_online) {
- ret = power_supply_register(&pdev->dev, &pda_psy_usb);
- if (ret) {
+ pda_psy_usb = power_supply_register(&pdev->dev,
+ &pda_psy_usb_desc,
+ &psy_cfg);
+ if (IS_ERR(pda_psy_usb)) {
dev_err(dev, "failed to register %s power supply\n",
- pda_psy_usb.name);
+ pda_psy_usb_desc.name);
+ ret = PTR_ERR(pda_psy_usb);
goto usb_supply_failed;
}
if (usb_irq) {
ret = request_irq(usb_irq->start, power_changed_isr,
get_irq_flags(usb_irq),
- usb_irq->name, &pda_psy_usb);
+ usb_irq->name, pda_psy_usb);
if (ret) {
dev_err(dev, "request usb irq failed\n");
goto usb_irq_failed;
#if IS_ENABLED(CONFIG_USB_PHY)
otg_reg_notifier_failed:
if (pdata->is_usb_online && usb_irq)
- free_irq(usb_irq->start, &pda_psy_usb);
+ free_irq(usb_irq->start, pda_psy_usb);
#endif
usb_irq_failed:
if (pdata->is_usb_online)
- power_supply_unregister(&pda_psy_usb);
+ power_supply_unregister(pda_psy_usb);
usb_supply_failed:
if (pdata->is_ac_online && ac_irq)
- free_irq(ac_irq->start, &pda_psy_ac);
+ free_irq(ac_irq->start, pda_psy_ac);
#if IS_ENABLED(CONFIG_USB_PHY)
if (!IS_ERR_OR_NULL(transceiver))
usb_put_phy(transceiver);
#endif
ac_irq_failed:
if (pdata->is_ac_online)
- power_supply_unregister(&pda_psy_ac);
+ power_supply_unregister(pda_psy_ac);
ac_supply_failed:
if (ac_draw) {
regulator_put(ac_draw);
static int pda_power_remove(struct platform_device *pdev)
{
if (pdata->is_usb_online && usb_irq)
- free_irq(usb_irq->start, &pda_psy_usb);
+ free_irq(usb_irq->start, pda_psy_usb);
if (pdata->is_ac_online && ac_irq)
- free_irq(ac_irq->start, &pda_psy_ac);
+ free_irq(ac_irq->start, pda_psy_ac);
if (polling)
del_timer_sync(&polling_timer);
del_timer_sync(&supply_timer);
if (pdata->is_usb_online)
- power_supply_unregister(&pda_psy_usb);
+ power_supply_unregister(pda_psy_usb);
if (pdata->is_ac_online)
- power_supply_unregister(&pda_psy_ac);
+ power_supply_unregister(pda_psy_ac);
#if IS_ENABLED(CONFIG_USB_PHY)
if (!IS_ERR_OR_NULL(transceiver))
usb_put_phy(transceiver);
{
dev_err(pm2->dev, "Overvoltage detected\n");
pm2->flags.ovv = true;
- power_supply_changed(&pm2->ac_chg.psy);
+ power_supply_changed(pm2->ac_chg.psy);
/* Schedule a new HW failure check */
queue_delayed_work(pm2->charger_wq, &pm2->check_hw_failure_work, 0);
dev_dbg(pm2->dev , "20 minutes watchdog expired\n");
pm2->ac.wd_expired = true;
- power_supply_changed(&pm2->ac_chg.psy);
+ power_supply_changed(pm2->ac_chg.psy);
return 0;
}
struct pm2xxx_charger *pm2;
u8 val;
- if (charger->psy.type == POWER_SUPPLY_TYPE_MAINS)
+ if (charger->psy->desc->type == POWER_SUPPLY_TYPE_MAINS)
pm2 = to_pm2xxx_charger_ac_device_info(charger);
else
return -ENXIO;
dev_dbg(pm2->dev, "PM2301: " "Disabled AC charging\n");
}
- power_supply_changed(&pm2->ac_chg.psy);
+ power_supply_changed(pm2->ac_chg.psy);
error_occured:
return ret;
int ret;
struct pm2xxx_charger *pm2;
- if (charger->psy.type == POWER_SUPPLY_TYPE_MAINS)
+ if (charger->psy->desc->type == POWER_SUPPLY_TYPE_MAINS)
pm2 = to_pm2xxx_charger_ac_device_info(charger);
else
return -ENXIO;
struct pm2xxx_charger, ac_work);
- power_supply_changed(&pm2->ac_chg.psy);
- sysfs_notify(&pm2->ac_chg.psy.dev->kobj, NULL, "present");
+ power_supply_changed(pm2->ac_chg.psy);
+ sysfs_notify(&pm2->ac_chg.psy->dev.kobj, NULL, "present");
};
static void pm2xxx_charger_check_hw_failure_work(struct work_struct *work)
if (!(reg_value & (PM2XXX_INT4_S_ITVPWR1OVV |
PM2XXX_INT4_S_ITVPWR2OVV))) {
pm2->flags.ovv = false;
- power_supply_changed(&pm2->ac_chg.psy);
+ power_supply_changed(pm2->ac_chg.psy);
}
}
| PM2XXX_INT5_S_ITTHERMALSHUTDOWNFALL))
pm2->flags.main_thermal_prot = false;
- power_supply_changed(&pm2->ac_chg.psy);
+ power_supply_changed(pm2->ac_chg.psy);
}
static struct pm2xxx_interrupts pm2xxx_int = {
const struct i2c_device_id *id)
{
struct pm2xxx_platform_data *pl_data = i2c_client->dev.platform_data;
+ struct power_supply_config psy_cfg = {};
struct pm2xxx_charger *pm2;
int ret = 0;
u8 val;
/* AC supply */
/* power_supply base class */
- pm2->ac_chg.psy.name = pm2->pdata->label;
- pm2->ac_chg.psy.type = POWER_SUPPLY_TYPE_MAINS;
- pm2->ac_chg.psy.properties = pm2xxx_charger_ac_props;
- pm2->ac_chg.psy.num_properties = ARRAY_SIZE(pm2xxx_charger_ac_props);
- pm2->ac_chg.psy.get_property = pm2xxx_charger_ac_get_property;
- pm2->ac_chg.psy.supplied_to = pm2->pdata->supplied_to;
- pm2->ac_chg.psy.num_supplicants = pm2->pdata->num_supplicants;
+ pm2->ac_chg_desc.name = pm2->pdata->label;
+ pm2->ac_chg_desc.type = POWER_SUPPLY_TYPE_MAINS;
+ pm2->ac_chg_desc.properties = pm2xxx_charger_ac_props;
+ pm2->ac_chg_desc.num_properties = ARRAY_SIZE(pm2xxx_charger_ac_props);
+ pm2->ac_chg_desc.get_property = pm2xxx_charger_ac_get_property;
+
+ psy_cfg.supplied_to = pm2->pdata->supplied_to;
+ psy_cfg.num_supplicants = pm2->pdata->num_supplicants;
/* pm2xxx_charger sub-class */
pm2->ac_chg.ops.enable = &pm2xxx_charger_ac_en;
pm2->ac_chg.ops.kick_wd = &pm2xxx_charger_watchdog_kick;
}
/* Register AC charger class */
- ret = power_supply_register(pm2->dev, &pm2->ac_chg.psy);
- if (ret) {
+ pm2->ac_chg.psy = power_supply_register(pm2->dev, &pm2->ac_chg_desc,
+ &psy_cfg);
+ if (IS_ERR(pm2->ac_chg.psy)) {
dev_err(pm2->dev, "failed to register AC charger\n");
+ ret = PTR_ERR(pm2->ac_chg.psy);
goto free_regulator;
}
ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON,
AB8500_MAIN_CH_DET);
pm2->ac_conn = true;
- power_supply_changed(&pm2->ac_chg.psy);
- sysfs_notify(&pm2->ac_chg.psy.dev->kobj, NULL, "present");
+ power_supply_changed(pm2->ac_chg.psy);
+ sysfs_notify(&pm2->ac_chg.psy->dev.kobj, NULL, "present");
}
return 0;
free_irq(gpio_to_irq(pm2->pdata->gpio_irq_number), pm2);
unregister_pm2xxx_charger:
/* unregister power supply */
- power_supply_unregister(&pm2->ac_chg.psy);
+ power_supply_unregister(pm2->ac_chg.psy);
free_regulator:
/* disable the regulator */
regulator_put(pm2->regu);
/* disable the regulator */
regulator_put(pm2->regu);
- power_supply_unregister(&pm2->ac_chg.psy);
+ power_supply_unregister(pm2->ac_chg.psy);
if (gpio_is_valid(pm2->lpn_pin))
gpio_free(pm2->lpn_pin);
struct work_struct check_main_thermal_prot_work;
struct delayed_work check_hw_failure_work;
struct ux500_charger ac_chg;
+ struct power_supply_desc ac_chg_desc;
struct pm2xxx_charger_event_flags flags;
};
#include <linux/slab.h>
static struct pmu_battery_dev {
- struct power_supply bat;
+ struct power_supply *bat;
+ struct power_supply_desc bat_desc;
struct pmu_battery_info *pbi;
char name[16];
int propval;
} *pbats[PMU_MAX_BATTERIES];
-#define to_pmu_battery_dev(x) container_of(x, struct pmu_battery_dev, bat)
+#define to_pmu_battery_dev(x) power_supply_get_drvdata(x)
/*********************************************************************
* Power
POWER_SUPPLY_PROP_ONLINE,
};
-static struct power_supply pmu_ac = {
+static const struct power_supply_desc pmu_ac_desc = {
.name = "pmu-ac",
.type = POWER_SUPPLY_TYPE_MAINS,
.properties = pmu_ac_props,
.get_property = pmu_get_ac_prop,
};
+static struct power_supply *pmu_ac;
+
/*********************************************************************
* Battery properties
*********************************************************************/
static int __init pmu_bat_init(void)
{
- int ret;
+ int ret = 0;
int i;
bat_pdev = platform_device_register_simple("pmu-battery",
goto pdev_register_failed;
}
- ret = power_supply_register(&bat_pdev->dev, &pmu_ac);
- if (ret)
+ pmu_ac = power_supply_register(&bat_pdev->dev, &pmu_ac_desc, NULL);
+ if (IS_ERR(pmu_ac)) {
+ ret = PTR_ERR(pmu_ac);
goto ac_register_failed;
+ }
for (i = 0; i < pmu_battery_count; i++) {
+ struct power_supply_config psy_cfg = {};
struct pmu_battery_dev *pbat = kzalloc(sizeof(*pbat),
GFP_KERNEL);
if (!pbat)
break;
sprintf(pbat->name, "PMU_battery_%d", i);
- pbat->bat.name = pbat->name;
- pbat->bat.properties = pmu_bat_props;
- pbat->bat.num_properties = ARRAY_SIZE(pmu_bat_props);
- pbat->bat.get_property = pmu_bat_get_property;
+ pbat->bat_desc.name = pbat->name;
+ pbat->bat_desc.properties = pmu_bat_props;
+ pbat->bat_desc.num_properties = ARRAY_SIZE(pmu_bat_props);
+ pbat->bat_desc.get_property = pmu_bat_get_property;
pbat->pbi = &pmu_batteries[i];
+ psy_cfg.drv_data = pbat;
- ret = power_supply_register(&bat_pdev->dev, &pbat->bat);
- if (ret) {
+ pbat->bat = power_supply_register(&bat_pdev->dev,
+ &pbat->bat_desc,
+ &psy_cfg);
+ if (IS_ERR(pbat->bat)) {
+ ret = PTR_ERR(pbat->bat);
kfree(pbat);
goto battery_register_failed;
}
while (i--) {
if (!pbats[i])
continue;
- power_supply_unregister(&pbats[i]->bat);
+ power_supply_unregister(pbats[i]->bat);
kfree(pbats[i]);
}
- power_supply_unregister(&pmu_ac);
+ power_supply_unregister(pmu_ac);
ac_register_failed:
platform_device_unregister(bat_pdev);
pdev_register_failed:
for (i = 0; i < PMU_MAX_BATTERIES; i++) {
if (!pbats[i])
continue;
- power_supply_unregister(&pbats[i]->bat);
+ power_supply_unregister(pbats[i]->bat);
kfree(pbats[i]);
}
- power_supply_unregister(&pmu_ac);
+ power_supply_unregister(pmu_ac);
platform_device_unregister(bat_pdev);
}
/* Support both supplied_to and supplied_from modes */
if (supply->supplied_from) {
- if (!supplier->name)
+ if (!supplier->desc->name)
return false;
for (i = 0; i < supply->num_supplies; i++)
- if (!strcmp(supplier->name, supply->supplied_from[i]))
+ if (!strcmp(supplier->desc->name, supply->supplied_from[i]))
return true;
} else {
- if (!supply->name)
+ if (!supply->desc->name)
return false;
for (i = 0; i < supplier->num_supplicants; i++)
- if (!strcmp(supplier->supplied_to[i], supply->name))
+ if (!strcmp(supplier->supplied_to[i], supply->desc->name))
return true;
}
struct power_supply *pst = dev_get_drvdata(dev);
if (__power_supply_is_supplied_by(psy, pst)) {
- if (pst->external_power_changed)
- pst->external_power_changed(pst);
+ if (pst->desc->external_power_changed)
+ pst->desc->external_power_changed(pst);
}
return 0;
struct power_supply *psy = container_of(work, struct power_supply,
changed_work);
- dev_dbg(psy->dev, "%s\n", __func__);
+ dev_dbg(&psy->dev, "%s\n", __func__);
spin_lock_irqsave(&psy->changed_lock, flags);
/*
power_supply_update_leds(psy);
atomic_notifier_call_chain(&power_supply_notifier,
PSY_EVENT_PROP_CHANGED, psy);
- kobject_uevent(&psy->dev->kobj, KOBJ_CHANGE);
+ kobject_uevent(&psy->dev.kobj, KOBJ_CHANGE);
spin_lock_irqsave(&psy->changed_lock, flags);
}
* to true.
*/
if (likely(!psy->changed))
- pm_relax(psy->dev);
+ pm_relax(&psy->dev);
spin_unlock_irqrestore(&psy->changed_lock, flags);
}
{
unsigned long flags;
- dev_dbg(psy->dev, "%s\n", __func__);
+ dev_dbg(&psy->dev, "%s\n", __func__);
spin_lock_irqsave(&psy->changed_lock, flags);
psy->changed = true;
- pm_stay_awake(psy->dev);
+ pm_stay_awake(&psy->dev);
spin_unlock_irqrestore(&psy->changed_lock, flags);
schedule_work(&psy->changed_work);
}
break;
if (np == epsy->of_node) {
- dev_info(psy->dev, "%s: Found supply : %s\n",
- psy->name, epsy->name);
- psy->supplied_from[i-1] = (char *)epsy->name;
+ dev_info(&psy->dev, "%s: Found supply : %s\n",
+ psy->desc->name, epsy->desc->name);
+ psy->supplied_from[i-1] = (char *)epsy->desc->name;
psy->num_supplies++;
of_node_put(np);
break;
error = class_for_each_device(power_supply_class, NULL, psy,
__power_supply_populate_supplied_from);
- dev_dbg(psy->dev, "%s %d\n", __func__, error);
+ dev_dbg(&psy->dev, "%s %d\n", __func__, error);
return error;
}
of_node_put(np);
if (ret) {
- dev_dbg(psy->dev, "Failed to find supply!\n");
+ dev_dbg(&psy->dev, "Failed to find supply!\n");
return ret;
}
} while (np);
return 0;
/* All supplies found, allocate char ** array for filling */
- psy->supplied_from = devm_kzalloc(psy->dev, sizeof(psy->supplied_from),
+ psy->supplied_from = devm_kzalloc(&psy->dev, sizeof(psy->supplied_from),
GFP_KERNEL);
if (!psy->supplied_from) {
- dev_err(psy->dev, "Couldn't allocate memory for supply list\n");
+ dev_err(&psy->dev, "Couldn't allocate memory for supply list\n");
return -ENOMEM;
}
- *psy->supplied_from = devm_kzalloc(psy->dev, sizeof(char *) * (cnt - 1),
+ *psy->supplied_from = devm_kzalloc(&psy->dev,
+ sizeof(char *) * (cnt - 1),
GFP_KERNEL);
if (!*psy->supplied_from) {
- dev_err(psy->dev, "Couldn't allocate memory for supply list\n");
+ dev_err(&psy->dev, "Couldn't allocate memory for supply list\n");
return -ENOMEM;
}
struct power_supply *epsy = dev_get_drvdata(dev);
if (__power_supply_is_supplied_by(epsy, psy))
- if (!epsy->get_property(epsy, POWER_SUPPLY_PROP_ONLINE, &ret))
+ if (!epsy->desc->get_property(epsy, POWER_SUPPLY_PROP_ONLINE,
+ &ret))
return ret.intval;
return 0;
error = class_for_each_device(power_supply_class, NULL, psy,
__power_supply_am_i_supplied);
- dev_dbg(psy->dev, "%s %d\n", __func__, error);
+ dev_dbg(&psy->dev, "%s %d\n", __func__, error);
return error;
}
unsigned int *count = data;
(*count)++;
- if (psy->type != POWER_SUPPLY_TYPE_BATTERY)
- if (!psy->get_property(psy, POWER_SUPPLY_PROP_ONLINE, &ret))
+ if (psy->desc->type != POWER_SUPPLY_TYPE_BATTERY)
+ if (!psy->desc->get_property(psy, POWER_SUPPLY_PROP_ONLINE,
+ &ret))
return ret.intval;
return 0;
int power_supply_set_battery_charged(struct power_supply *psy)
{
- if (psy->type == POWER_SUPPLY_TYPE_BATTERY && psy->set_charged) {
- psy->set_charged(psy);
+ if (atomic_read(&psy->use_cnt) >= 0 &&
+ psy->desc->type == POWER_SUPPLY_TYPE_BATTERY &&
+ psy->desc->set_charged) {
+ psy->desc->set_charged(psy);
return 0;
}
const char *name = data;
struct power_supply *psy = dev_get_drvdata(dev);
- return strcmp(psy->name, name) == 0;
+ return strcmp(psy->desc->name, name) == 0;
}
+/**
+ * power_supply_get_by_name() - Search for a power supply and returns its ref
+ * @name: Power supply name to fetch
+ *
+ * If power supply was found, it increases reference count for the
+ * internal power supply's device. The user should power_supply_put()
+ * after usage.
+ *
+ * Return: On success returns a reference to a power supply with
+ * matching name equals to @name, a NULL otherwise.
+ */
struct power_supply *power_supply_get_by_name(const char *name)
{
+ struct power_supply *psy = NULL;
struct device *dev = class_find_device(power_supply_class, NULL, name,
power_supply_match_device_by_name);
- return dev ? dev_get_drvdata(dev) : NULL;
+ if (dev) {
+ psy = dev_get_drvdata(dev);
+ atomic_inc(&psy->use_cnt);
+ }
+
+ return psy;
}
EXPORT_SYMBOL_GPL(power_supply_get_by_name);
+/**
+ * power_supply_put() - Drop reference obtained with power_supply_get_by_name
+ * @psy: Reference to put
+ *
+ * The reference to power supply should be put before unregistering
+ * the power supply.
+ */
+void power_supply_put(struct power_supply *psy)
+{
+ might_sleep();
+
+ atomic_dec(&psy->use_cnt);
+ put_device(&psy->dev);
+}
+EXPORT_SYMBOL_GPL(power_supply_put);
+
#ifdef CONFIG_OF
static int power_supply_match_device_node(struct device *dev, const void *data)
{
return dev->parent && dev->parent->of_node == data;
}
+/**
+ * power_supply_get_by_phandle() - Search for a power supply and returns its ref
+ * @np: Pointer to device node holding phandle property
+ * @phandle_name: Name of property holding a power supply name
+ *
+ * If power supply was found, it increases reference count for the
+ * internal power supply's device. The user should power_supply_put()
+ * after usage.
+ *
+ * Return: On success returns a reference to a power supply with
+ * matching name equals to value under @property, NULL or ERR_PTR otherwise.
+ */
struct power_supply *power_supply_get_by_phandle(struct device_node *np,
const char *property)
{
struct device_node *power_supply_np;
+ struct power_supply *psy = NULL;
struct device *dev;
power_supply_np = of_parse_phandle(np, property, 0);
of_node_put(power_supply_np);
- return dev ? dev_get_drvdata(dev) : NULL;
+ if (dev) {
+ psy = dev_get_drvdata(dev);
+ atomic_inc(&psy->use_cnt);
+ }
+
+ return psy;
}
EXPORT_SYMBOL_GPL(power_supply_get_by_phandle);
#endif /* CONFIG_OF */
+int power_supply_get_property(struct power_supply *psy,
+ enum power_supply_property psp,
+ union power_supply_propval *val)
+{
+ if (atomic_read(&psy->use_cnt) <= 0)
+ return -ENODEV;
+
+ return psy->desc->get_property(psy, psp, val);
+}
+EXPORT_SYMBOL_GPL(power_supply_get_property);
+
+int power_supply_set_property(struct power_supply *psy,
+ enum power_supply_property psp,
+ const union power_supply_propval *val)
+{
+ if (atomic_read(&psy->use_cnt) <= 0 || !psy->desc->set_property)
+ return -ENODEV;
+
+ return psy->desc->set_property(psy, psp, val);
+}
+EXPORT_SYMBOL_GPL(power_supply_set_property);
+
+int power_supply_property_is_writeable(struct power_supply *psy,
+ enum power_supply_property psp)
+{
+ if (atomic_read(&psy->use_cnt) <= 0 ||
+ !psy->desc->property_is_writeable)
+ return -ENODEV;
+
+ return psy->desc->property_is_writeable(psy, psp);
+}
+EXPORT_SYMBOL_GPL(power_supply_property_is_writeable);
+
+void power_supply_external_power_changed(struct power_supply *psy)
+{
+ if (atomic_read(&psy->use_cnt) <= 0 ||
+ !psy->desc->external_power_changed)
+ return;
+
+ psy->desc->external_power_changed(psy);
+}
+EXPORT_SYMBOL_GPL(power_supply_external_power_changed);
+
int power_supply_powers(struct power_supply *psy, struct device *dev)
{
- return sysfs_create_link(&psy->dev->kobj, &dev->kobj, "powers");
+ return sysfs_create_link(&psy->dev.kobj, &dev->kobj, "powers");
}
EXPORT_SYMBOL_GPL(power_supply_powers);
static void power_supply_dev_release(struct device *dev)
{
+ struct power_supply *psy = container_of(dev, struct power_supply, dev);
pr_debug("device: '%s': %s\n", dev_name(dev), __func__);
- kfree(dev);
+ kfree(psy);
}
int power_supply_reg_notifier(struct notifier_block *nb)
WARN_ON(tzd == NULL);
psy = tzd->devdata;
- ret = psy->get_property(psy, POWER_SUPPLY_PROP_TEMP, &val);
+ ret = psy->desc->get_property(psy, POWER_SUPPLY_PROP_TEMP, &val);
/* Convert tenths of degree Celsius to milli degree Celsius. */
if (!ret)
{
int i;
- if (psy->no_thermal)
+ if (psy->desc->no_thermal)
return 0;
/* Register battery zone device psy reports temperature */
- for (i = 0; i < psy->num_properties; i++) {
- if (psy->properties[i] == POWER_SUPPLY_PROP_TEMP) {
- psy->tzd = thermal_zone_device_register(psy->name, 0, 0,
- psy, &psy_tzd_ops, NULL, 0, 0);
+ for (i = 0; i < psy->desc->num_properties; i++) {
+ if (psy->desc->properties[i] == POWER_SUPPLY_PROP_TEMP) {
+ psy->tzd = thermal_zone_device_register(psy->desc->name,
+ 0, 0, psy, &psy_tzd_ops, NULL, 0, 0);
return PTR_ERR_OR_ZERO(psy->tzd);
}
}
int ret;
psy = tcd->devdata;
- ret = psy->get_property(psy,
+ ret = psy->desc->get_property(psy,
POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT_MAX, &val);
if (!ret)
*state = val.intval;
int ret;
psy = tcd->devdata;
- ret = psy->get_property(psy,
+ ret = psy->desc->get_property(psy,
POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT, &val);
if (!ret)
*state = val.intval;
psy = tcd->devdata;
val.intval = state;
- ret = psy->set_property(psy,
+ ret = psy->desc->set_property(psy,
POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT, &val);
return ret;
int i;
/* Register for cooling device if psy can control charging */
- for (i = 0; i < psy->num_properties; i++) {
- if (psy->properties[i] ==
+ for (i = 0; i < psy->desc->num_properties; i++) {
+ if (psy->desc->properties[i] ==
POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT) {
psy->tcd = thermal_cooling_device_register(
- (char *)psy->name,
+ (char *)psy->desc->name,
psy, &psy_tcd_ops);
return PTR_ERR_OR_ZERO(psy->tcd);
}
}
#endif
-static int __power_supply_register(struct device *parent,
- struct power_supply *psy, bool ws)
+static struct power_supply *__must_check
+__power_supply_register(struct device *parent,
+ const struct power_supply_desc *desc,
+ const struct power_supply_config *cfg,
+ bool ws)
{
struct device *dev;
+ struct power_supply *psy;
int rc;
- dev = kzalloc(sizeof(*dev), GFP_KERNEL);
- if (!dev)
- return -ENOMEM;
+ psy = kzalloc(sizeof(*psy), GFP_KERNEL);
+ if (!psy)
+ return ERR_PTR(-ENOMEM);
+
+ dev = &psy->dev;
device_initialize(dev);
dev->parent = parent;
dev->release = power_supply_dev_release;
dev_set_drvdata(dev, psy);
- psy->dev = dev;
+ psy->desc = desc;
+ atomic_inc(&psy->use_cnt);
+ if (cfg) {
+ psy->drv_data = cfg->drv_data;
+ psy->of_node = cfg->of_node;
+ psy->supplied_to = cfg->supplied_to;
+ psy->num_supplicants = cfg->num_supplicants;
+ }
- rc = dev_set_name(dev, "%s", psy->name);
+ rc = dev_set_name(dev, "%s", desc->name);
if (rc)
goto dev_set_name_failed;
power_supply_changed(psy);
- return 0;
+ return psy;
create_triggers_failed:
psy_unregister_cooler(psy);
check_supplies_failed:
dev_set_name_failed:
put_device(dev);
- return rc;
+ return ERR_PTR(rc);
}
-int power_supply_register(struct device *parent, struct power_supply *psy)
+/**
+ * power_supply_register() - Register new power supply
+ * @parent: Device to be a parent of power supply's device
+ * @desc: Description of power supply, must be valid through whole
+ * lifetime of this power supply
+ * @cfg: Run-time specific configuration accessed during registering,
+ * may be NULL
+ *
+ * Return: A pointer to newly allocated power_supply on success
+ * or ERR_PTR otherwise.
+ * Use power_supply_unregister() on returned power_supply pointer to release
+ * resources.
+ */
+struct power_supply *__must_check power_supply_register(struct device *parent,
+ const struct power_supply_desc *desc,
+ const struct power_supply_config *cfg)
{
- return __power_supply_register(parent, psy, true);
+ return __power_supply_register(parent, desc, cfg, true);
}
EXPORT_SYMBOL_GPL(power_supply_register);
-int power_supply_register_no_ws(struct device *parent, struct power_supply *psy)
+/**
+ * power_supply_register() - Register new non-waking-source power supply
+ * @parent: Device to be a parent of power supply's device
+ * @desc: Description of power supply, must be valid through whole
+ * lifetime of this power supply
+ * @cfg: Run-time specific configuration accessed during registering,
+ * may be NULL
+ *
+ * Return: A pointer to newly allocated power_supply on success
+ * or ERR_PTR otherwise.
+ * Use power_supply_unregister() on returned power_supply pointer to release
+ * resources.
+ */
+struct power_supply *__must_check
+power_supply_register_no_ws(struct device *parent,
+ const struct power_supply_desc *desc,
+ const struct power_supply_config *cfg)
{
- return __power_supply_register(parent, psy, false);
+ return __power_supply_register(parent, desc, cfg, false);
}
EXPORT_SYMBOL_GPL(power_supply_register_no_ws);
+static void devm_power_supply_release(struct device *dev, void *res)
+{
+ struct power_supply **psy = res;
+
+ power_supply_unregister(*psy);
+}
+
+/**
+ * power_supply_register() - Register managed power supply
+ * @parent: Device to be a parent of power supply's device
+ * @desc: Description of power supply, must be valid through whole
+ * lifetime of this power supply
+ * @cfg: Run-time specific configuration accessed during registering,
+ * may be NULL
+ *
+ * Return: A pointer to newly allocated power_supply on success
+ * or ERR_PTR otherwise.
+ * The returned power_supply pointer will be automatically unregistered
+ * on driver detach.
+ */
+struct power_supply *__must_check
+devm_power_supply_register(struct device *parent,
+ const struct power_supply_desc *desc,
+ const struct power_supply_config *cfg)
+{
+ struct power_supply **ptr, *psy;
+
+ ptr = devres_alloc(devm_power_supply_release, sizeof(*ptr), GFP_KERNEL);
+
+ if (!ptr)
+ return ERR_PTR(-ENOMEM);
+ psy = __power_supply_register(parent, desc, cfg, true);
+ if (IS_ERR(psy)) {
+ devres_free(ptr);
+ } else {
+ *ptr = psy;
+ devres_add(parent, ptr);
+ }
+ return psy;
+}
+EXPORT_SYMBOL_GPL(devm_power_supply_register);
+
+/**
+ * power_supply_register() - Register managed non-waking-source power supply
+ * @parent: Device to be a parent of power supply's device
+ * @desc: Description of power supply, must be valid through whole
+ * lifetime of this power supply
+ * @cfg: Run-time specific configuration accessed during registering,
+ * may be NULL
+ *
+ * Return: A pointer to newly allocated power_supply on success
+ * or ERR_PTR otherwise.
+ * The returned power_supply pointer will be automatically unregistered
+ * on driver detach.
+ */
+struct power_supply *__must_check
+devm_power_supply_register_no_ws(struct device *parent,
+ const struct power_supply_desc *desc,
+ const struct power_supply_config *cfg)
+{
+ struct power_supply **ptr, *psy;
+
+ ptr = devres_alloc(devm_power_supply_release, sizeof(*ptr), GFP_KERNEL);
+
+ if (!ptr)
+ return ERR_PTR(-ENOMEM);
+ psy = __power_supply_register(parent, desc, cfg, false);
+ if (IS_ERR(psy)) {
+ devres_free(ptr);
+ } else {
+ *ptr = psy;
+ devres_add(parent, ptr);
+ }
+ return psy;
+}
+EXPORT_SYMBOL_GPL(devm_power_supply_register_no_ws);
+
+/**
+ * power_supply_unregister() - Remove this power supply from system
+ * @psy: Pointer to power supply to unregister
+ *
+ * Remove this power supply from the system. The resources of power supply
+ * will be freed here or on last power_supply_put() call.
+ */
void power_supply_unregister(struct power_supply *psy)
{
+ WARN_ON(atomic_dec_return(&psy->use_cnt));
cancel_work_sync(&psy->changed_work);
- sysfs_remove_link(&psy->dev->kobj, "powers");
+ sysfs_remove_link(&psy->dev.kobj, "powers");
power_supply_remove_triggers(psy);
psy_unregister_cooler(psy);
psy_unregister_thermal(psy);
- device_init_wakeup(psy->dev, false);
- device_unregister(psy->dev);
+ device_init_wakeup(&psy->dev, false);
+ device_unregister(&psy->dev);
}
EXPORT_SYMBOL_GPL(power_supply_unregister);
+void *power_supply_get_drvdata(struct power_supply *psy)
+{
+ return psy->drv_data;
+}
+EXPORT_SYMBOL_GPL(power_supply_get_drvdata);
+
static int __init power_supply_class_init(void)
{
power_supply_class = class_create(THIS_MODULE, "power_supply");
unsigned long delay_on = 0;
unsigned long delay_off = 0;
- if (psy->get_property(psy, POWER_SUPPLY_PROP_STATUS, &status))
+ if (psy->desc->get_property(psy, POWER_SUPPLY_PROP_STATUS, &status))
return;
- dev_dbg(psy->dev, "%s %d\n", __func__, status.intval);
+ dev_dbg(&psy->dev, "%s %d\n", __func__, status.intval);
switch (status.intval) {
case POWER_SUPPLY_STATUS_FULL:
static int power_supply_create_bat_triggers(struct power_supply *psy)
{
psy->charging_full_trig_name = kasprintf(GFP_KERNEL,
- "%s-charging-or-full", psy->name);
+ "%s-charging-or-full", psy->desc->name);
if (!psy->charging_full_trig_name)
goto charging_full_failed;
psy->charging_trig_name = kasprintf(GFP_KERNEL,
- "%s-charging", psy->name);
+ "%s-charging", psy->desc->name);
if (!psy->charging_trig_name)
goto charging_failed;
- psy->full_trig_name = kasprintf(GFP_KERNEL, "%s-full", psy->name);
+ psy->full_trig_name = kasprintf(GFP_KERNEL, "%s-full", psy->desc->name);
if (!psy->full_trig_name)
goto full_failed;
psy->charging_blink_full_solid_trig_name = kasprintf(GFP_KERNEL,
- "%s-charging-blink-full-solid", psy->name);
+ "%s-charging-blink-full-solid", psy->desc->name);
if (!psy->charging_blink_full_solid_trig_name)
goto charging_blink_full_solid_failed;
{
union power_supply_propval online;
- if (psy->get_property(psy, POWER_SUPPLY_PROP_ONLINE, &online))
+ if (psy->desc->get_property(psy, POWER_SUPPLY_PROP_ONLINE, &online))
return;
- dev_dbg(psy->dev, "%s %d\n", __func__, online.intval);
+ dev_dbg(&psy->dev, "%s %d\n", __func__, online.intval);
if (online.intval)
led_trigger_event(psy->online_trig, LED_FULL);
static int power_supply_create_gen_triggers(struct power_supply *psy)
{
- psy->online_trig_name = kasprintf(GFP_KERNEL, "%s-online", psy->name);
+ psy->online_trig_name = kasprintf(GFP_KERNEL, "%s-online",
+ psy->desc->name);
if (!psy->online_trig_name)
return -ENOMEM;
void power_supply_update_leds(struct power_supply *psy)
{
- if (psy->type == POWER_SUPPLY_TYPE_BATTERY)
+ if (psy->desc->type == POWER_SUPPLY_TYPE_BATTERY)
power_supply_update_bat_leds(psy);
else
power_supply_update_gen_leds(psy);
int power_supply_create_triggers(struct power_supply *psy)
{
- if (psy->type == POWER_SUPPLY_TYPE_BATTERY)
+ if (psy->desc->type == POWER_SUPPLY_TYPE_BATTERY)
return power_supply_create_bat_triggers(psy);
return power_supply_create_gen_triggers(psy);
}
void power_supply_remove_triggers(struct power_supply *psy)
{
- if (psy->type == POWER_SUPPLY_TYPE_BATTERY)
+ if (psy->desc->type == POWER_SUPPLY_TYPE_BATTERY)
power_supply_remove_bat_triggers(psy);
else
power_supply_remove_gen_triggers(psy);
union power_supply_propval value;
if (off == POWER_SUPPLY_PROP_TYPE) {
- value.intval = psy->type;
+ value.intval = psy->desc->type;
} else {
- ret = psy->get_property(psy, off, &value);
+ ret = power_supply_get_property(psy, off, &value);
if (ret < 0) {
if (ret == -ENODATA)
value.intval = long_val;
- ret = psy->set_property(psy, off, &value);
+ ret = psy->desc->set_property(psy, off, &value);
if (ret < 0)
return ret;
if (attrno == POWER_SUPPLY_PROP_TYPE)
return mode;
- for (i = 0; i < psy->num_properties; i++) {
- int property = psy->properties[i];
+ for (i = 0; i < psy->desc->num_properties; i++) {
+ int property = psy->desc->properties[i];
if (property == attrno) {
- if (psy->property_is_writeable &&
- psy->property_is_writeable(psy, property) > 0)
+ if (psy->desc->property_is_writeable &&
+ power_supply_property_is_writeable(psy, property) > 0)
mode |= S_IWUSR;
return mode;
dev_dbg(dev, "uevent\n");
- if (!psy || !psy->dev) {
+ if (!psy || !psy->desc) {
dev_dbg(dev, "No power supply yet\n");
return ret;
}
- dev_dbg(dev, "POWER_SUPPLY_NAME=%s\n", psy->name);
+ dev_dbg(dev, "POWER_SUPPLY_NAME=%s\n", psy->desc->name);
- ret = add_uevent_var(env, "POWER_SUPPLY_NAME=%s", psy->name);
+ ret = add_uevent_var(env, "POWER_SUPPLY_NAME=%s", psy->desc->name);
if (ret)
return ret;
if (!prop_buf)
return -ENOMEM;
- for (j = 0; j < psy->num_properties; j++) {
+ for (j = 0; j < psy->desc->num_properties; j++) {
struct device_attribute *attr;
char *line;
- attr = &power_supply_attrs[psy->properties[j]];
+ attr = &power_supply_attrs[psy->desc->properties[j]];
ret = power_supply_show_property(dev, attr, prop_buf);
if (ret == -ENODEV || ret == -ENODATA) {
help
Reboot support for generic SYSCON mapped register reset.
+config POWER_RESET_SYSCON_POWEROFF
+ bool "Generic SYSCON regmap poweroff driver"
+ depends on OF
+ select MFD_SYSCON
+ help
+ Poweroff support for generic SYSCON mapped register poweroff.
+
config POWER_RESET_RMOBILE
tristate "Renesas R-Mobile reset driver"
depends on ARCH_RMOBILE || COMPILE_TEST
+ depends on HAS_IOMEM
help
Reboot support for Renesas R-Mobile and SH-Mobile SoCs.
obj-$(CONFIG_POWER_RESET_XGENE) += xgene-reboot.o
obj-$(CONFIG_POWER_RESET_KEYSTONE) += keystone-reset.o
obj-$(CONFIG_POWER_RESET_SYSCON) += syscon-reboot.o
+obj-$(CONFIG_POWER_RESET_SYSCON_POWEROFF) += syscon-poweroff.o
obj-$(CONFIG_POWER_RESET_RMOBILE) += rmobile-reset.o
return 0;
}
-static struct of_device_id at91_poweroff_of_match[] = {
+static const struct of_device_id at91_poweroff_of_match[] = {
{ .compatible = "atmel,at91sam9260-shdwc", },
{ .compatible = "atmel,at91sam9rl-shdwc", },
{ .compatible = "atmel,at91sam9x5-shdwc", },
: "r" (at91_ramc_base[0]),
"r" (at91_rstc_base),
"r" (1),
- "r" (AT91_SDRAMC_LPCB_POWER_DOWN),
- "r" (AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST));
+ "r" cpu_to_le32(AT91_SDRAMC_LPCB_POWER_DOWN),
+ "r" cpu_to_le32(AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST));
return NOTIFY_DONE;
}
"r" (at91_ramc_base[1]),
"r" (at91_rstc_base),
"r" (1),
- "r" (AT91_DDRSDRC_LPCB_POWER_DOWN),
- "r" (AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST)
+ "r" cpu_to_le32(AT91_DDRSDRC_LPCB_POWER_DOWN),
+ "r" cpu_to_le32(AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST)
: "r0");
return NOTIFY_DONE;
pr_info("AT91: Starting after %s\n", reason);
}
-static struct of_device_id at91_ramc_of_match[] = {
+static const struct of_device_id at91_ramc_of_match[] = {
{ .compatible = "atmel,at91sam9260-sdramc", },
{ .compatible = "atmel,at91sam9g45-ddramc", },
{ .compatible = "atmel,sama5d3-ddramc", },
{ /* sentinel */ }
};
-static struct of_device_id at91_reset_of_match[] = {
+static const struct of_device_id at91_reset_of_match[] = {
{ .compatible = "atmel,at91sam9260-rstc", .data = at91sam9260_restart },
{ .compatible = "atmel,at91sam9g45-rstc", .data = at91sam9g45_restart },
{ /* sentinel */ }
return err;
}
-static struct of_device_id hisi_reboot_of_match[] = {
+static const struct of_device_id hisi_reboot_of_match[] = {
{ .compatible = "hisilicon,sysctrl" },
{}
};
.priority = 128,
};
-static struct of_device_id rsctrl_of_match[] = {
+static const struct of_device_id rsctrl_of_match[] = {
{.compatible = "ti,keystone-reset", },
{},
};
.priority = 192,
};
-static struct of_device_id st_reset_of_match[] = {
+static const struct of_device_id st_reset_of_match[] = {
{
.compatible = "st,stih415-restart",
.data = (void *)&stih415_reset,
--- /dev/null
+/*
+ * Generic Syscon Poweroff Driver
+ *
+ * Copyright (c) 2015, National Instruments Corp.
+ * Author: Moritz Fischer <moritz.fischer@ettus.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kallsyms.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/notifier.h>
+#include <linux/mfd/syscon.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/pm.h>
+#include <linux/regmap.h>
+
+static struct regmap *map;
+static u32 offset;
+static u32 mask;
+
+void syscon_poweroff(void)
+{
+ /* Issue the poweroff */
+ regmap_write(map, offset, mask);
+
+ mdelay(1000);
+
+ pr_emerg("Unable to poweroff system\n");
+}
+
+static int syscon_poweroff_probe(struct platform_device *pdev)
+{
+ char symname[KSYM_NAME_LEN];
+
+ map = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "regmap");
+ if (IS_ERR(map)) {
+ dev_err(&pdev->dev, "unable to get syscon");
+ return PTR_ERR(map);
+ }
+
+ if (of_property_read_u32(pdev->dev.of_node, "offset", &offset)) {
+ dev_err(&pdev->dev, "unable to read 'offset'");
+ return -EINVAL;
+ }
+
+ if (of_property_read_u32(pdev->dev.of_node, "mask", &mask)) {
+ dev_err(&pdev->dev, "unable to read 'mask'");
+ return -EINVAL;
+ }
+
+ if (pm_power_off) {
+ lookup_symbol_name((ulong)pm_power_off, symname);
+ dev_err(&pdev->dev,
+ "pm_power_off already claimed %p %s",
+ pm_power_off, symname);
+ return -EBUSY;
+ }
+
+ pm_power_off = syscon_poweroff;
+
+ return 0;
+}
+
+static int syscon_poweroff_remove(struct platform_device *pdev)
+{
+ if (pm_power_off == syscon_poweroff)
+ pm_power_off = NULL;
+
+ return 0;
+}
+
+static const struct of_device_id syscon_poweroff_of_match[] = {
+ { .compatible = "syscon-poweroff" },
+ {}
+};
+
+static struct platform_driver syscon_poweroff_driver = {
+ .probe = syscon_poweroff_probe,
+ .remove = syscon_poweroff_remove,
+ .driver = {
+ .name = "syscon-poweroff",
+ .of_match_table = syscon_poweroff_of_match,
+ },
+};
+
+static int __init syscon_poweroff_register(void)
+{
+ return platform_driver_register(&syscon_poweroff_driver);
+}
+device_initcall(syscon_poweroff_register);
return err;
}
-static struct of_device_id syscon_reboot_of_match[] = {
+static const struct of_device_id syscon_reboot_of_match[] = {
{ .compatible = "syscon-reboot" },
{}
};
enum vexpress_reset_func { FUNC_RESET, FUNC_SHUTDOWN, FUNC_REBOOT };
-static struct of_device_id vexpress_reset_of_match[] = {
+static const struct of_device_id vexpress_reset_of_match[] = {
{
.compatible = "arm,vexpress-reset",
.data = (void *)FUNC_RESET,
return err;
}
-static struct of_device_id xgene_reboot_of_match[] = {
+static const struct of_device_id xgene_reboot_of_match[] = {
{ .compatible = "apm,xgene-reboot" },
{}
};
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct rt5033_battery *battery = container_of(psy,
- struct rt5033_battery, psy);
+ struct rt5033_battery *battery = power_supply_get_drvdata(psy);
switch (psp) {
case POWER_SUPPLY_PROP_VOLTAGE_NOW:
POWER_SUPPLY_PROP_CAPACITY,
};
-static struct regmap_config rt5033_battery_regmap_config = {
+static const struct regmap_config rt5033_battery_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = RT5033_FUEL_REG_END,
};
+static const struct power_supply_desc rt5033_battery_desc = {
+ .name = "rt5033-battery",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .get_property = rt5033_battery_get_property,
+ .properties = rt5033_battery_props,
+ .num_properties = ARRAY_SIZE(rt5033_battery_props),
+};
+
static int rt5033_battery_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
+ struct power_supply_config psy_cfg = {};
struct rt5033_battery *battery;
u32 ret;
}
i2c_set_clientdata(client, battery);
+ psy_cfg.drv_data = battery;
- battery->psy.name = "rt5033-battery";
- battery->psy.type = POWER_SUPPLY_TYPE_BATTERY;
- battery->psy.get_property = rt5033_battery_get_property;
- battery->psy.properties = rt5033_battery_props;
- battery->psy.num_properties = ARRAY_SIZE(rt5033_battery_props);
-
- ret = power_supply_register(&client->dev, &battery->psy);
- if (ret) {
+ battery->psy = power_supply_register(&client->dev,
+ &rt5033_battery_desc, &psy_cfg);
+ if (IS_ERR(battery->psy)) {
dev_err(&client->dev, "Failed to register power supply\n");
+ ret = PTR_ERR(battery->psy);
return ret;
}
{
struct rt5033_battery *battery = i2c_get_clientdata(client);
- power_supply_unregister(&battery->psy);
+ power_supply_unregister(battery->psy);
return 0;
}
struct rx51_device_info {
struct device *dev;
- struct power_supply bat;
+ struct power_supply *bat;
+ struct power_supply_desc bat_desc;
struct iio_channel *channel_temp;
struct iio_channel *channel_bsi;
struct iio_channel *channel_vbat;
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct rx51_device_info *di = container_of((psy),
- struct rx51_device_info, bat);
+ struct rx51_device_info *di = power_supply_get_drvdata(psy);
switch (psp) {
case POWER_SUPPLY_PROP_TECHNOLOGY:
static int rx51_battery_probe(struct platform_device *pdev)
{
+ struct power_supply_config psy_cfg = {};
struct rx51_device_info *di;
int ret;
platform_set_drvdata(pdev, di);
di->dev = &pdev->dev;
- di->bat.name = dev_name(&pdev->dev);
- di->bat.type = POWER_SUPPLY_TYPE_BATTERY;
- di->bat.properties = rx51_battery_props;
- di->bat.num_properties = ARRAY_SIZE(rx51_battery_props);
- di->bat.get_property = rx51_battery_get_property;
+ di->bat_desc.name = dev_name(&pdev->dev);
+ di->bat_desc.type = POWER_SUPPLY_TYPE_BATTERY;
+ di->bat_desc.properties = rx51_battery_props;
+ di->bat_desc.num_properties = ARRAY_SIZE(rx51_battery_props);
+ di->bat_desc.get_property = rx51_battery_get_property;
+
+ psy_cfg.drv_data = di;
di->channel_temp = iio_channel_get(di->dev, "temp");
if (IS_ERR(di->channel_temp)) {
goto error_channel_bsi;
}
- ret = power_supply_register(di->dev, &di->bat);
- if (ret)
+ di->bat = power_supply_register(di->dev, &di->bat_desc, &psy_cfg);
+ if (IS_ERR(di->bat)) {
+ ret = PTR_ERR(di->bat);
goto error_channel_vbat;
+ }
return 0;
{
struct rx51_device_info *di = platform_get_drvdata(pdev);
- power_supply_unregister(&di->bat);
+ power_supply_unregister(di->bat);
iio_channel_release(di->channel_vbat);
iio_channel_release(di->channel_bsi);
#define JITTER_DELAY 500 /* ms */
struct s3c_adc_bat {
- struct power_supply psy;
+ struct power_supply *psy;
struct s3c_adc_client *client;
struct s3c_adc_bat_pdata *pdata;
int volt_value;
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct s3c_adc_bat *bat = container_of(psy, struct s3c_adc_bat, psy);
+ struct s3c_adc_bat *bat = power_supply_get_drvdata(psy);
if (!bat) {
- dev_err(psy->dev, "%s: no battery infos ?!\n", __func__);
+ dev_err(&psy->dev, "%s: no battery infos ?!\n", __func__);
return -EINVAL;
}
}
}
-static struct s3c_adc_bat backup_bat = {
- .psy = {
- .name = "backup-battery",
- .type = POWER_SUPPLY_TYPE_BATTERY,
- .properties = s3c_adc_backup_bat_props,
- .num_properties = ARRAY_SIZE(s3c_adc_backup_bat_props),
- .get_property = s3c_adc_backup_bat_get_property,
- .use_for_apm = 1,
- },
+static const struct power_supply_desc backup_bat_desc = {
+ .name = "backup-battery",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = s3c_adc_backup_bat_props,
+ .num_properties = ARRAY_SIZE(s3c_adc_backup_bat_props),
+ .get_property = s3c_adc_backup_bat_get_property,
+ .use_for_apm = 1,
};
+static struct s3c_adc_bat backup_bat;
+
static enum power_supply_property s3c_adc_main_bat_props[] = {
POWER_SUPPLY_PROP_STATUS,
POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct s3c_adc_bat *bat = container_of(psy, struct s3c_adc_bat, psy);
+ struct s3c_adc_bat *bat = power_supply_get_drvdata(psy);
int new_level;
int full_volt;
unsigned int lut_size;
if (!bat) {
- dev_err(psy->dev, "no battery infos ?!\n");
+ dev_err(&psy->dev, "no battery infos ?!\n");
return -EINVAL;
}
}
}
-static struct s3c_adc_bat main_bat = {
- .psy = {
- .name = "main-battery",
- .type = POWER_SUPPLY_TYPE_BATTERY,
- .properties = s3c_adc_main_bat_props,
- .num_properties = ARRAY_SIZE(s3c_adc_main_bat_props),
- .get_property = s3c_adc_bat_get_property,
- .external_power_changed = s3c_adc_bat_ext_power_changed,
- .use_for_apm = 1,
- },
+static const struct power_supply_desc main_bat_desc = {
+ .name = "main-battery",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = s3c_adc_main_bat_props,
+ .num_properties = ARRAY_SIZE(s3c_adc_main_bat_props),
+ .get_property = s3c_adc_bat_get_property,
+ .external_power_changed = s3c_adc_bat_ext_power_changed,
+ .use_for_apm = 1,
};
+static struct s3c_adc_bat main_bat;
+
static void s3c_adc_bat_work(struct work_struct *work)
{
struct s3c_adc_bat *bat = &main_bat;
int is_plugged;
static int was_plugged;
- is_plugged = power_supply_am_i_supplied(&bat->psy);
+ is_plugged = power_supply_am_i_supplied(bat->psy);
bat->cable_plugged = is_plugged;
if (is_plugged != was_plugged) {
was_plugged = is_plugged;
}
}
- power_supply_changed(&bat->psy);
+ power_supply_changed(bat->psy);
}
static irqreturn_t s3c_adc_bat_charged(int irq, void *dev_id)
main_bat.cable_plugged = 0;
main_bat.status = POWER_SUPPLY_STATUS_DISCHARGING;
- ret = power_supply_register(&pdev->dev, &main_bat.psy);
- if (ret)
+ main_bat.psy = power_supply_register(&pdev->dev, &main_bat_desc, NULL);
+ if (IS_ERR(main_bat.psy)) {
+ ret = PTR_ERR(main_bat.psy);
goto err_reg_main;
+ }
if (pdata->backup_volt_mult) {
+ const struct power_supply_config psy_cfg
+ = { .drv_data = &backup_bat, };
+
backup_bat.client = client;
backup_bat.pdata = pdev->dev.platform_data;
backup_bat.volt_value = -1;
- ret = power_supply_register(&pdev->dev, &backup_bat.psy);
- if (ret)
+ backup_bat.psy = power_supply_register(&pdev->dev,
+ &backup_bat_desc,
+ &psy_cfg);
+ if (IS_ERR(backup_bat.psy)) {
+ ret = PTR_ERR(backup_bat.psy);
goto err_reg_backup;
+ }
}
INIT_DELAYED_WORK(&bat_work, s3c_adc_bat_work);
gpio_free(pdata->gpio_charge_finished);
err_gpio:
if (pdata->backup_volt_mult)
- power_supply_unregister(&backup_bat.psy);
+ power_supply_unregister(backup_bat.psy);
err_reg_backup:
- power_supply_unregister(&main_bat.psy);
+ power_supply_unregister(main_bat.psy);
err_reg_main:
return ret;
}
struct s3c_adc_client *client = platform_get_drvdata(pdev);
struct s3c_adc_bat_pdata *pdata = pdev->dev.platform_data;
- power_supply_unregister(&main_bat.psy);
+ power_supply_unregister(main_bat.psy);
if (pdata->backup_volt_mult)
- power_supply_unregister(&backup_bat.psy);
+ power_supply_unregister(backup_bat.psy);
s3c_adc_release(client);
struct sbs_info {
struct i2c_client *client;
- struct power_supply power_supply;
+ struct power_supply *power_supply;
struct sbs_platform_data *pdata;
bool is_present;
bool gpio_detect;
chip->last_state = val->intval;
else if (chip->last_state != val->intval) {
cancel_delayed_work_sync(&chip->work);
- power_supply_changed(&chip->power_supply);
+ power_supply_changed(chip->power_supply);
chip->poll_time = 0;
}
} else {
union power_supply_propval *val)
{
int ret = 0;
- struct sbs_info *chip = container_of(psy,
- struct sbs_info, power_supply);
+ struct sbs_info *chip = power_supply_get_drvdata(psy);
struct i2c_client *client = chip->client;
switch (psp) {
if (!chip->gpio_detect &&
chip->is_present != (ret >= 0)) {
chip->is_present = (ret >= 0);
- power_supply_changed(&chip->power_supply);
+ power_supply_changed(chip->power_supply);
}
done:
static void sbs_external_power_changed(struct power_supply *psy)
{
- struct sbs_info *chip;
-
- chip = container_of(psy, struct sbs_info, power_supply);
+ struct sbs_info *chip = power_supply_get_drvdata(psy);
if (chip->ignore_changes > 0) {
chip->ignore_changes--;
if (chip->last_state != ret) {
chip->poll_time = 0;
- power_supply_changed(&chip->power_supply);
+ power_supply_changed(chip->power_supply);
return;
}
if (chip->poll_time > 0) {
}
#endif
+static const struct power_supply_desc sbs_default_desc = {
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = sbs_properties,
+ .num_properties = ARRAY_SIZE(sbs_properties),
+ .get_property = sbs_get_property,
+ .external_power_changed = sbs_external_power_changed,
+};
+
static int sbs_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct sbs_info *chip;
+ struct power_supply_desc *sbs_desc;
struct sbs_platform_data *pdata = client->dev.platform_data;
+ struct power_supply_config psy_cfg = {};
int rc;
int irq;
- char *name;
- name = kasprintf(GFP_KERNEL, "sbs-%s", dev_name(&client->dev));
- if (!name) {
- dev_err(&client->dev, "Failed to allocate device name\n");
+ sbs_desc = devm_kmemdup(&client->dev, &sbs_default_desc,
+ sizeof(*sbs_desc), GFP_KERNEL);
+ if (!sbs_desc)
+ return -ENOMEM;
+
+ sbs_desc->name = devm_kasprintf(&client->dev, GFP_KERNEL, "sbs-%s",
+ dev_name(&client->dev));
+ if (!sbs_desc->name)
return -ENOMEM;
- }
chip = kzalloc(sizeof(struct sbs_info), GFP_KERNEL);
- if (!chip) {
- rc = -ENOMEM;
- goto exit_free_name;
- }
+ if (!chip)
+ return -ENOMEM;
chip->client = client;
chip->enable_detection = false;
chip->gpio_detect = false;
- chip->power_supply.name = name;
- chip->power_supply.type = POWER_SUPPLY_TYPE_BATTERY;
- chip->power_supply.properties = sbs_properties;
- chip->power_supply.num_properties = ARRAY_SIZE(sbs_properties);
- chip->power_supply.get_property = sbs_get_property;
- chip->power_supply.of_node = client->dev.of_node;
+ psy_cfg.of_node = client->dev.of_node;
+ psy_cfg.drv_data = chip;
/* ignore first notification of external change, it is generated
* from the power_supply_register call back
*/
chip->ignore_changes = 1;
chip->last_state = POWER_SUPPLY_STATUS_UNKNOWN;
- chip->power_supply.external_power_changed = sbs_external_power_changed;
pdata = sbs_of_populate_pdata(client);
rc = request_irq(irq, sbs_irq,
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
- dev_name(&client->dev), &chip->power_supply);
+ dev_name(&client->dev), chip->power_supply);
if (rc) {
dev_warn(&client->dev, "Failed to request irq: %d\n", rc);
gpio_free(pdata->battery_detect);
goto exit_psupply;
}
- rc = power_supply_register(&client->dev, &chip->power_supply);
- if (rc) {
+ chip->power_supply = power_supply_register(&client->dev, sbs_desc,
+ &psy_cfg);
+ if (IS_ERR(chip->power_supply)) {
dev_err(&client->dev,
"%s: Failed to register power supply\n", __func__);
+ rc = PTR_ERR(chip->power_supply);
goto exit_psupply;
}
exit_psupply:
if (chip->irq)
- free_irq(chip->irq, &chip->power_supply);
+ free_irq(chip->irq, chip->power_supply);
if (chip->gpio_detect)
gpio_free(pdata->battery_detect);
kfree(chip);
-exit_free_name:
- kfree(name);
-
return rc;
}
struct sbs_info *chip = i2c_get_clientdata(client);
if (chip->irq)
- free_irq(chip->irq, &chip->power_supply);
+ free_irq(chip->irq, chip->power_supply);
if (chip->gpio_detect)
gpio_free(chip->pdata->battery_detect);
- power_supply_unregister(&chip->power_supply);
+ power_supply_unregister(chip->power_supply);
cancel_delayed_work_sync(&chip->work);
- kfree(chip->power_supply.name);
kfree(chip);
chip = NULL;
struct mutex lock;
struct device *dev;
struct regmap *regmap;
- struct power_supply mains;
- struct power_supply usb;
- struct power_supply battery;
+ struct power_supply *mains;
+ struct power_supply *usb;
+ struct power_supply *battery;
bool mains_online;
bool usb_online;
bool charging_enabled;
*/
if (stat_c & STAT_C_CHARGER_ERROR) {
dev_err(smb->dev, "charging stopped due to charger error\n");
- power_supply_changed(&smb->battery);
+ power_supply_changed(smb->battery);
handled = true;
}
*/
if (irqstat_c & (IRQSTAT_C_TERMINATION_IRQ | IRQSTAT_C_TAPER_IRQ)) {
if (irqstat_c & IRQSTAT_C_TERMINATION_STAT)
- power_supply_changed(&smb->battery);
+ power_supply_changed(smb->battery);
dev_dbg(smb->dev, "going to HW maintenance mode\n");
handled = true;
}
if (irqstat_d & IRQSTAT_D_CHARGE_TIMEOUT_STAT)
dev_warn(smb->dev, "charging stopped due to timeout\n");
- power_supply_changed(&smb->battery);
+ power_supply_changed(smb->battery);
handled = true;
}
if (smb347_update_ps_status(smb) > 0) {
smb347_start_stop_charging(smb);
if (smb->pdata->use_mains)
- power_supply_changed(&smb->mains);
+ power_supply_changed(smb->mains);
if (smb->pdata->use_usb)
- power_supply_changed(&smb->usb);
+ power_supply_changed(smb->usb);
}
handled = true;
}
goto fail;
ret = request_threaded_irq(irq, NULL, smb347_interrupt,
- IRQF_TRIGGER_FALLING, client->name, smb);
+ IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
+ client->name, smb);
if (ret < 0)
goto fail_gpio;
enum power_supply_property prop,
union power_supply_propval *val)
{
- struct smb347_charger *smb =
- container_of(psy, struct smb347_charger, mains);
+ struct smb347_charger *smb = power_supply_get_drvdata(psy);
int ret;
switch (prop) {
enum power_supply_property prop,
union power_supply_propval *val)
{
- struct smb347_charger *smb =
- container_of(psy, struct smb347_charger, usb);
+ struct smb347_charger *smb = power_supply_get_drvdata(psy);
int ret;
switch (prop) {
enum power_supply_property prop,
union power_supply_propval *val)
{
- struct smb347_charger *smb =
- container_of(psy, struct smb347_charger, battery);
+ struct smb347_charger *smb = power_supply_get_drvdata(psy);
const struct smb347_charger_platform_data *pdata = smb->pdata;
int ret;
.readable_reg = smb347_readable_reg,
};
+static const struct power_supply_desc smb347_mains_desc = {
+ .name = "smb347-mains",
+ .type = POWER_SUPPLY_TYPE_MAINS,
+ .get_property = smb347_mains_get_property,
+ .properties = smb347_mains_properties,
+ .num_properties = ARRAY_SIZE(smb347_mains_properties),
+};
+
+static const struct power_supply_desc smb347_usb_desc = {
+ .name = "smb347-usb",
+ .type = POWER_SUPPLY_TYPE_USB,
+ .get_property = smb347_usb_get_property,
+ .properties = smb347_usb_properties,
+ .num_properties = ARRAY_SIZE(smb347_usb_properties),
+};
+
+static const struct power_supply_desc smb347_battery_desc = {
+ .name = "smb347-battery",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .get_property = smb347_battery_get_property,
+ .properties = smb347_battery_properties,
+ .num_properties = ARRAY_SIZE(smb347_battery_properties),
+};
+
static int smb347_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
static char *battery[] = { "smb347-battery" };
const struct smb347_charger_platform_data *pdata;
+ struct power_supply_config mains_usb_cfg = {}, battery_cfg = {};
struct device *dev = &client->dev;
struct smb347_charger *smb;
int ret;
if (ret < 0)
return ret;
+ mains_usb_cfg.supplied_to = battery;
+ mains_usb_cfg.num_supplicants = ARRAY_SIZE(battery);
+ mains_usb_cfg.drv_data = smb;
if (smb->pdata->use_mains) {
- smb->mains.name = "smb347-mains";
- smb->mains.type = POWER_SUPPLY_TYPE_MAINS;
- smb->mains.get_property = smb347_mains_get_property;
- smb->mains.properties = smb347_mains_properties;
- smb->mains.num_properties = ARRAY_SIZE(smb347_mains_properties);
- smb->mains.supplied_to = battery;
- smb->mains.num_supplicants = ARRAY_SIZE(battery);
- ret = power_supply_register(dev, &smb->mains);
- if (ret < 0)
- return ret;
+ smb->mains = power_supply_register(dev, &smb347_mains_desc,
+ &mains_usb_cfg);
+ if (IS_ERR(smb->mains))
+ return PTR_ERR(smb->mains);
}
if (smb->pdata->use_usb) {
- smb->usb.name = "smb347-usb";
- smb->usb.type = POWER_SUPPLY_TYPE_USB;
- smb->usb.get_property = smb347_usb_get_property;
- smb->usb.properties = smb347_usb_properties;
- smb->usb.num_properties = ARRAY_SIZE(smb347_usb_properties);
- smb->usb.supplied_to = battery;
- smb->usb.num_supplicants = ARRAY_SIZE(battery);
- ret = power_supply_register(dev, &smb->usb);
- if (ret < 0) {
+ smb->usb = power_supply_register(dev, &smb347_usb_desc,
+ &mains_usb_cfg);
+ if (IS_ERR(smb->usb)) {
if (smb->pdata->use_mains)
- power_supply_unregister(&smb->mains);
- return ret;
+ power_supply_unregister(smb->mains);
+ return PTR_ERR(smb->usb);
}
}
- smb->battery.name = "smb347-battery";
- smb->battery.type = POWER_SUPPLY_TYPE_BATTERY;
- smb->battery.get_property = smb347_battery_get_property;
- smb->battery.properties = smb347_battery_properties;
- smb->battery.num_properties = ARRAY_SIZE(smb347_battery_properties);
-
-
- ret = power_supply_register(dev, &smb->battery);
- if (ret < 0) {
+ battery_cfg.drv_data = smb;
+ smb->battery = power_supply_register(dev, &smb347_battery_desc,
+ &battery_cfg);
+ if (IS_ERR(smb->battery)) {
if (smb->pdata->use_usb)
- power_supply_unregister(&smb->usb);
+ power_supply_unregister(smb->usb);
if (smb->pdata->use_mains)
- power_supply_unregister(&smb->mains);
- return ret;
+ power_supply_unregister(smb->mains);
+ return PTR_ERR(smb->battery);
}
/*
gpio_free(smb->pdata->irq_gpio);
}
- power_supply_unregister(&smb->battery);
+ power_supply_unregister(smb->battery);
if (smb->pdata->use_usb)
- power_supply_unregister(&smb->usb);
+ power_supply_unregister(smb->usb);
if (smb->pdata->use_mains)
- power_supply_unregister(&smb->mains);
+ power_supply_unregister(smb->mains);
return 0;
}
"test_battery",
};
-static struct power_supply test_power_supplies[] = {
+static struct power_supply *test_power_supplies[TEST_POWER_NUM];
+
+static const struct power_supply_desc test_power_desc[] = {
[TEST_AC] = {
.name = "test_ac",
.type = POWER_SUPPLY_TYPE_MAINS,
- .supplied_to = test_power_ac_supplied_to,
- .num_supplicants = ARRAY_SIZE(test_power_ac_supplied_to),
.properties = test_power_ac_props,
.num_properties = ARRAY_SIZE(test_power_ac_props),
.get_property = test_power_get_ac_property,
[TEST_USB] = {
.name = "test_usb",
.type = POWER_SUPPLY_TYPE_USB,
- .supplied_to = test_power_ac_supplied_to,
- .num_supplicants = ARRAY_SIZE(test_power_ac_supplied_to),
.properties = test_power_ac_props,
.num_properties = ARRAY_SIZE(test_power_ac_props),
.get_property = test_power_get_usb_property,
},
};
+static const struct power_supply_config test_power_configs[] = {
+ {
+ /* test_ac */
+ .supplied_to = test_power_ac_supplied_to,
+ .num_supplicants = ARRAY_SIZE(test_power_ac_supplied_to),
+ }, {
+ /* test_battery */
+ }, {
+ /* test_usb */
+ .supplied_to = test_power_ac_supplied_to,
+ .num_supplicants = ARRAY_SIZE(test_power_ac_supplied_to),
+ },
+};
static int __init test_power_init(void)
{
int ret;
BUILD_BUG_ON(TEST_POWER_NUM != ARRAY_SIZE(test_power_supplies));
+ BUILD_BUG_ON(TEST_POWER_NUM != ARRAY_SIZE(test_power_configs));
for (i = 0; i < ARRAY_SIZE(test_power_supplies); i++) {
- ret = power_supply_register(NULL, &test_power_supplies[i]);
- if (ret) {
+ test_power_supplies[i] = power_supply_register(NULL,
+ &test_power_desc[i],
+ &test_power_configs[i]);
+ if (IS_ERR(test_power_supplies[i])) {
pr_err("%s: failed to register %s\n", __func__,
- test_power_supplies[i].name);
+ test_power_desc[i].name);
+ ret = PTR_ERR(test_power_supplies[i]);
goto failed;
}
}
return 0;
failed:
while (--i >= 0)
- power_supply_unregister(&test_power_supplies[i]);
+ power_supply_unregister(test_power_supplies[i]);
return ret;
}
module_init(test_power_init);
usb_online = 0;
battery_status = POWER_SUPPLY_STATUS_DISCHARGING;
for (i = 0; i < ARRAY_SIZE(test_power_supplies); i++)
- power_supply_changed(&test_power_supplies[i]);
+ power_supply_changed(test_power_supplies[i]);
pr_info("%s: 'changed' event sent, sleeping for 10 seconds...\n",
__func__);
ssleep(10);
for (i = 0; i < ARRAY_SIZE(test_power_supplies); i++)
- power_supply_unregister(&test_power_supplies[i]);
+ power_supply_unregister(test_power_supplies[i]);
module_initialized = false;
}
static int param_set_ac_online(const char *key, const struct kernel_param *kp)
{
ac_online = map_get_value(map_ac_online, key, ac_online);
- signal_power_supply_changed(&test_power_supplies[TEST_AC]);
+ signal_power_supply_changed(test_power_supplies[TEST_AC]);
return 0;
}
static int param_set_usb_online(const char *key, const struct kernel_param *kp)
{
usb_online = map_get_value(map_ac_online, key, usb_online);
- signal_power_supply_changed(&test_power_supplies[TEST_USB]);
+ signal_power_supply_changed(test_power_supplies[TEST_USB]);
return 0;
}
const struct kernel_param *kp)
{
battery_status = map_get_value(map_status, key, battery_status);
- signal_power_supply_changed(&test_power_supplies[TEST_BATTERY]);
+ signal_power_supply_changed(test_power_supplies[TEST_BATTERY]);
return 0;
}
const struct kernel_param *kp)
{
battery_health = map_get_value(map_health, key, battery_health);
- signal_power_supply_changed(&test_power_supplies[TEST_BATTERY]);
+ signal_power_supply_changed(test_power_supplies[TEST_BATTERY]);
return 0;
}
const struct kernel_param *kp)
{
battery_present = map_get_value(map_present, key, battery_present);
- signal_power_supply_changed(&test_power_supplies[TEST_AC]);
+ signal_power_supply_changed(test_power_supplies[TEST_AC]);
return 0;
}
{
battery_technology = map_get_value(map_technology, key,
battery_technology);
- signal_power_supply_changed(&test_power_supplies[TEST_BATTERY]);
+ signal_power_supply_changed(test_power_supplies[TEST_BATTERY]);
return 0;
}
return -EINVAL;
battery_capacity = tmp;
- signal_power_supply_changed(&test_power_supplies[TEST_BATTERY]);
+ signal_power_supply_changed(test_power_supplies[TEST_BATTERY]);
return 0;
}
return -EINVAL;
battery_voltage = tmp;
- signal_power_supply_changed(&test_power_supplies[TEST_BATTERY]);
+ signal_power_supply_changed(test_power_supplies[TEST_BATTERY]);
return 0;
}
struct tosa_bat {
int status;
- struct power_supply psy;
+ struct power_supply *psy;
int full_chrg;
struct mutex work_lock; /* protects data */
mutex_lock(&bat_lock);
gpio_set_value(bat->gpio_bat, 1);
msleep(5);
- value = wm97xx_read_aux_adc(dev_get_drvdata(bat->psy.dev->parent),
+ value = wm97xx_read_aux_adc(dev_get_drvdata(bat->psy->dev.parent),
bat->adc_bat);
gpio_set_value(bat->gpio_bat, 0);
mutex_unlock(&bat_lock);
mutex_lock(&bat_lock);
gpio_set_value(bat->gpio_temp, 1);
msleep(5);
- value = wm97xx_read_aux_adc(dev_get_drvdata(bat->psy.dev->parent),
+ value = wm97xx_read_aux_adc(dev_get_drvdata(bat->psy->dev.parent),
bat->adc_temp);
gpio_set_value(bat->gpio_temp, 0);
mutex_unlock(&bat_lock);
union power_supply_propval *val)
{
int ret = 0;
- struct tosa_bat *bat = container_of(psy, struct tosa_bat, psy);
+ struct tosa_bat *bat = power_supply_get_drvdata(psy);
if (bat->is_present && !bat->is_present(bat)
&& psp != POWER_SUPPLY_PROP_PRESENT) {
static void tosa_bat_update(struct tosa_bat *bat)
{
int old;
- struct power_supply *psy = &bat->psy;
+ struct power_supply *psy = bat->psy;
mutex_lock(&bat->work_lock);
old = bat->status;
if (bat->is_present && !bat->is_present(bat)) {
- printk(KERN_NOTICE "%s not present\n", psy->name);
+ printk(KERN_NOTICE "%s not present\n", psy->desc->name);
bat->status = POWER_SUPPLY_STATUS_UNKNOWN;
bat->full_chrg = -1;
} else if (power_supply_am_i_supplied(psy)) {
POWER_SUPPLY_PROP_PRESENT,
};
+static const struct power_supply_desc tosa_bat_main_desc = {
+ .name = "main-battery",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = tosa_bat_main_props,
+ .num_properties = ARRAY_SIZE(tosa_bat_main_props),
+ .get_property = tosa_bat_get_property,
+ .external_power_changed = tosa_bat_external_power_changed,
+ .use_for_apm = 1,
+};
+
+static const struct power_supply_desc tosa_bat_jacket_desc = {
+ .name = "jacket-battery",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = tosa_bat_main_props,
+ .num_properties = ARRAY_SIZE(tosa_bat_main_props),
+ .get_property = tosa_bat_get_property,
+ .external_power_changed = tosa_bat_external_power_changed,
+};
+
+static const struct power_supply_desc tosa_bat_bu_desc = {
+ .name = "backup-battery",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = tosa_bat_bu_props,
+ .num_properties = ARRAY_SIZE(tosa_bat_bu_props),
+ .get_property = tosa_bat_get_property,
+ .external_power_changed = tosa_bat_external_power_changed,
+};
+
static struct tosa_bat tosa_bat_main = {
.status = POWER_SUPPLY_STATUS_DISCHARGING,
.full_chrg = -1,
- .psy = {
- .name = "main-battery",
- .type = POWER_SUPPLY_TYPE_BATTERY,
- .properties = tosa_bat_main_props,
- .num_properties = ARRAY_SIZE(tosa_bat_main_props),
- .get_property = tosa_bat_get_property,
- .external_power_changed = tosa_bat_external_power_changed,
- .use_for_apm = 1,
- },
+ .psy = NULL,
.gpio_full = TOSA_GPIO_BAT0_CRG,
.gpio_charge_off = TOSA_GPIO_CHARGE_OFF,
static struct tosa_bat tosa_bat_jacket = {
.status = POWER_SUPPLY_STATUS_DISCHARGING,
.full_chrg = -1,
- .psy = {
- .name = "jacket-battery",
- .type = POWER_SUPPLY_TYPE_BATTERY,
- .properties = tosa_bat_main_props,
- .num_properties = ARRAY_SIZE(tosa_bat_main_props),
- .get_property = tosa_bat_get_property,
- .external_power_changed = tosa_bat_external_power_changed,
- },
+ .psy = NULL,
.is_present = tosa_jacket_bat_is_present,
.gpio_full = TOSA_GPIO_BAT1_CRG,
static struct tosa_bat tosa_bat_bu = {
.status = POWER_SUPPLY_STATUS_UNKNOWN,
.full_chrg = -1,
-
- .psy = {
- .name = "backup-battery",
- .type = POWER_SUPPLY_TYPE_BATTERY,
- .properties = tosa_bat_bu_props,
- .num_properties = ARRAY_SIZE(tosa_bat_bu_props),
- .get_property = tosa_bat_get_property,
- .external_power_changed = tosa_bat_external_power_changed,
- },
+ .psy = NULL,
.gpio_full = -1,
.gpio_charge_off = -1,
static int tosa_bat_probe(struct platform_device *dev)
{
int ret;
+ struct power_supply_config main_psy_cfg = {},
+ jacket_psy_cfg = {},
+ bu_psy_cfg = {};
if (!machine_is_tosa())
return -ENODEV;
INIT_WORK(&bat_work, tosa_bat_work);
- ret = power_supply_register(&dev->dev, &tosa_bat_main.psy);
- if (ret)
+ main_psy_cfg.drv_data = &tosa_bat_main;
+ tosa_bat_main.psy = power_supply_register(&dev->dev,
+ &tosa_bat_main_desc,
+ &main_psy_cfg);
+ if (IS_ERR(tosa_bat_main.psy)) {
+ ret = PTR_ERR(tosa_bat_main.psy);
goto err_psy_reg_main;
- ret = power_supply_register(&dev->dev, &tosa_bat_jacket.psy);
- if (ret)
+ }
+
+ jacket_psy_cfg.drv_data = &tosa_bat_jacket;
+ tosa_bat_jacket.psy = power_supply_register(&dev->dev,
+ &tosa_bat_jacket_desc,
+ &jacket_psy_cfg);
+ if (IS_ERR(tosa_bat_jacket.psy)) {
+ ret = PTR_ERR(tosa_bat_jacket.psy);
goto err_psy_reg_jacket;
- ret = power_supply_register(&dev->dev, &tosa_bat_bu.psy);
- if (ret)
+ }
+
+ bu_psy_cfg.drv_data = &tosa_bat_bu;
+ tosa_bat_bu.psy = power_supply_register(&dev->dev, &tosa_bat_bu_desc,
+ &bu_psy_cfg);
+ if (IS_ERR(tosa_bat_bu.psy)) {
+ ret = PTR_ERR(tosa_bat_bu.psy);
goto err_psy_reg_bu;
+ }
ret = request_irq(gpio_to_irq(TOSA_GPIO_BAT0_CRG),
tosa_bat_gpio_isr,
err_req_jacket:
free_irq(gpio_to_irq(TOSA_GPIO_BAT0_CRG), &tosa_bat_main);
err_req_main:
- power_supply_unregister(&tosa_bat_bu.psy);
+ power_supply_unregister(tosa_bat_bu.psy);
err_psy_reg_bu:
- power_supply_unregister(&tosa_bat_jacket.psy);
+ power_supply_unregister(tosa_bat_jacket.psy);
err_psy_reg_jacket:
- power_supply_unregister(&tosa_bat_main.psy);
+ power_supply_unregister(tosa_bat_main.psy);
err_psy_reg_main:
/* see comment in tosa_bat_remove */
free_irq(gpio_to_irq(TOSA_GPIO_BAT1_CRG), &tosa_bat_jacket);
free_irq(gpio_to_irq(TOSA_GPIO_BAT0_CRG), &tosa_bat_main);
- power_supply_unregister(&tosa_bat_bu.psy);
- power_supply_unregister(&tosa_bat_jacket.psy);
- power_supply_unregister(&tosa_bat_main.psy);
+ power_supply_unregister(tosa_bat_bu.psy);
+ power_supply_unregister(tosa_bat_jacket.psy);
+ power_supply_unregister(tosa_bat_main.psy);
/*
* Now cancel the bat_work. We won't get any more schedules,
int irq;
struct task_struct *poll_task;
bool passive_mode;
- struct power_supply ac;
+ struct power_supply *ac;
struct tps65090_platform_data *pdata;
};
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct tps65090_charger *charger = container_of(psy,
- struct tps65090_charger, ac);
+ struct tps65090_charger *charger = power_supply_get_drvdata(psy);
if (psp == POWER_SUPPLY_PROP_ONLINE) {
val->intval = charger->ac_online;
}
if (charger->prev_ac_online != charger->ac_online)
- power_supply_changed(&charger->ac);
+ power_supply_changed(charger->ac);
return IRQ_HANDLED;
}
return 0;
}
+static const struct power_supply_desc tps65090_charger_desc = {
+ .name = "tps65090-ac",
+ .type = POWER_SUPPLY_TYPE_MAINS,
+ .get_property = tps65090_ac_get_property,
+ .properties = tps65090_ac_props,
+ .num_properties = ARRAY_SIZE(tps65090_ac_props),
+};
+
static int tps65090_charger_probe(struct platform_device *pdev)
{
struct tps65090_charger *cdata;
struct tps65090_platform_data *pdata;
+ struct power_supply_config psy_cfg = {};
uint8_t status1 = 0;
int ret;
int irq;
cdata->dev = &pdev->dev;
cdata->pdata = pdata;
- cdata->ac.name = "tps65090-ac";
- cdata->ac.type = POWER_SUPPLY_TYPE_MAINS;
- cdata->ac.get_property = tps65090_ac_get_property;
- cdata->ac.properties = tps65090_ac_props;
- cdata->ac.num_properties = ARRAY_SIZE(tps65090_ac_props);
- cdata->ac.supplied_to = pdata->supplied_to;
- cdata->ac.num_supplicants = pdata->num_supplicants;
- cdata->ac.of_node = pdev->dev.of_node;
-
- ret = power_supply_register(&pdev->dev, &cdata->ac);
- if (ret) {
+ psy_cfg.supplied_to = pdata->supplied_to;
+ psy_cfg.num_supplicants = pdata->num_supplicants;
+ psy_cfg.of_node = pdev->dev.of_node;
+ psy_cfg.drv_data = cdata;
+
+ cdata->ac = power_supply_register(&pdev->dev, &tps65090_charger_desc,
+ &psy_cfg);
+ if (IS_ERR(cdata->ac)) {
dev_err(&pdev->dev, "failed: power supply register\n");
- return ret;
+ return PTR_ERR(cdata->ac);
}
irq = platform_get_irq(pdev, 0);
goto fail_unregister_supply;
}
cdata->ac_online = 1;
- power_supply_changed(&cdata->ac);
+ power_supply_changed(cdata->ac);
}
if (irq != -ENXIO) {
return 0;
fail_unregister_supply:
- power_supply_unregister(&cdata->ac);
+ power_supply_unregister(cdata->ac);
return ret;
}
if (cdata->irq == -ENXIO)
kthread_stop(cdata->poll_task);
- power_supply_unregister(&cdata->ac);
+ power_supply_unregister(cdata->ac);
return 0;
}
-static struct of_device_id of_tps65090_charger_match[] = {
+static const struct of_device_id of_tps65090_charger_match[] = {
{ .compatible = "ti,tps65090-charger", },
{ /* end */ }
};
struct twl4030_bci {
struct device *dev;
- struct power_supply ac;
- struct power_supply usb;
+ struct power_supply *ac;
+ struct power_supply *usb;
struct usb_phy *transceiver;
struct notifier_block usb_nb;
struct work_struct work;
struct twl4030_bci *bci = arg;
dev_dbg(bci->dev, "CHG_PRES irq\n");
- power_supply_changed(&bci->ac);
- power_supply_changed(&bci->usb);
+ power_supply_changed(bci->ac);
+ power_supply_changed(bci->usb);
return IRQ_HANDLED;
}
if (irqs1 & (TWL4030_ICHGLOW | TWL4030_ICHGEOC)) {
/* charger state change, inform the core */
- power_supply_changed(&bci->ac);
- power_supply_changed(&bci->usb);
+ power_supply_changed(bci->ac);
+ power_supply_changed(bci->usb);
}
/* various monitoring events, for now we just log them here */
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct twl4030_bci *bci = dev_get_drvdata(psy->dev->parent);
+ struct twl4030_bci *bci = dev_get_drvdata(psy->dev.parent);
int is_charging;
int state;
int ret;
if (state < 0)
return state;
- if (psy->type == POWER_SUPPLY_TYPE_USB)
+ if (psy->desc->type == POWER_SUPPLY_TYPE_USB)
is_charging = state & TWL4030_MSTATEC_USB;
else
is_charging = state & TWL4030_MSTATEC_AC;
/* charging must be active for meaningful result */
if (!is_charging)
return -ENODATA;
- if (psy->type == POWER_SUPPLY_TYPE_USB) {
+ if (psy->desc->type == POWER_SUPPLY_TYPE_USB) {
ret = twl4030bci_read_adc_val(TWL4030_BCIVBUS);
if (ret < 0)
return ret;
}
#endif
+static const struct power_supply_desc twl4030_bci_ac_desc = {
+ .name = "twl4030_ac",
+ .type = POWER_SUPPLY_TYPE_MAINS,
+ .properties = twl4030_charger_props,
+ .num_properties = ARRAY_SIZE(twl4030_charger_props),
+ .get_property = twl4030_bci_get_property,
+};
+
+static const struct power_supply_desc twl4030_bci_usb_desc = {
+ .name = "twl4030_usb",
+ .type = POWER_SUPPLY_TYPE_USB,
+ .properties = twl4030_charger_props,
+ .num_properties = ARRAY_SIZE(twl4030_charger_props),
+ .get_property = twl4030_bci_get_property,
+};
+
static int __init twl4030_bci_probe(struct platform_device *pdev)
{
struct twl4030_bci *bci;
}
platform_set_drvdata(pdev, bci);
- bci->ac.name = "twl4030_ac";
- bci->ac.type = POWER_SUPPLY_TYPE_MAINS;
- bci->ac.properties = twl4030_charger_props;
- bci->ac.num_properties = ARRAY_SIZE(twl4030_charger_props);
- bci->ac.get_property = twl4030_bci_get_property;
- ret = power_supply_register(&pdev->dev, &bci->ac);
- if (ret) {
+ bci->ac = power_supply_register(&pdev->dev, &twl4030_bci_ac_desc,
+ NULL);
+ if (IS_ERR(bci->ac)) {
+ ret = PTR_ERR(bci->ac);
dev_err(&pdev->dev, "failed to register ac: %d\n", ret);
goto fail_register_ac;
}
- bci->usb.name = "twl4030_usb";
- bci->usb.type = POWER_SUPPLY_TYPE_USB;
- bci->usb.properties = twl4030_charger_props;
- bci->usb.num_properties = ARRAY_SIZE(twl4030_charger_props);
- bci->usb.get_property = twl4030_bci_get_property;
-
bci->usb_reg = regulator_get(bci->dev, "bci3v1");
- ret = power_supply_register(&pdev->dev, &bci->usb);
- if (ret) {
+ bci->usb = power_supply_register(&pdev->dev, &twl4030_bci_usb_desc,
+ NULL);
+ if (IS_ERR(bci->usb)) {
+ ret = PTR_ERR(bci->usb);
dev_err(&pdev->dev, "failed to register usb: %d\n", ret);
goto fail_register_usb;
}
fail_bci_irq:
free_irq(bci->irq_chg, bci);
fail_chg_irq:
- power_supply_unregister(&bci->usb);
+ power_supply_unregister(bci->usb);
fail_register_usb:
- power_supply_unregister(&bci->ac);
+ power_supply_unregister(bci->ac);
fail_register_ac:
fail_no_battery:
kfree(bci);
}
free_irq(bci->irq_bci, bci);
free_irq(bci->irq_chg, bci);
- power_supply_unregister(&bci->usb);
- power_supply_unregister(&bci->ac);
+ power_supply_unregister(bci->usb);
+ power_supply_unregister(bci->ac);
kfree(bci);
return 0;
#include <linux/sort.h>
#include <linux/i2c/twl4030-madc.h>
#include <linux/power/twl4030_madc_battery.h>
+#include <linux/iio/consumer.h>
struct twl4030_madc_battery {
- struct power_supply psy;
+ struct power_supply *psy;
struct twl4030_madc_bat_platform_data *pdata;
+ struct iio_channel *channel_temp;
+ struct iio_channel *channel_ichg;
+ struct iio_channel *channel_vbat;
};
static enum power_supply_property twl4030_madc_bat_props[] = {
POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
};
-static int madc_read(int index)
+static int madc_read(struct iio_channel *channel)
{
- struct twl4030_madc_request req;
- int val;
+ int val, err;
+ err = iio_read_channel_processed(channel, &val);
+ if (err < 0)
+ return err;
- req.channels = index;
- req.method = TWL4030_MADC_SW2;
- req.type = TWL4030_MADC_WAIT;
- req.do_avg = 0;
- req.raw = false;
- req.func_cb = NULL;
-
- val = twl4030_madc_conversion(&req);
- if (val < 0)
- return val;
-
- return req.rbuf[ffs(index) - 1];
+ return val;
}
-static int twl4030_madc_bat_get_charging_status(void)
+static int twl4030_madc_bat_get_charging_status(struct twl4030_madc_battery *bt)
{
- return (madc_read(TWL4030_MADC_ICHG) > 0) ? 1 : 0;
+ return (madc_read(bt->channel_ichg) > 0) ? 1 : 0;
}
-static int twl4030_madc_bat_get_voltage(void)
+static int twl4030_madc_bat_get_voltage(struct twl4030_madc_battery *bt)
{
- return madc_read(TWL4030_MADC_VBAT);
+ return madc_read(bt->channel_vbat);
}
-static int twl4030_madc_bat_get_current(void)
+static int twl4030_madc_bat_get_current(struct twl4030_madc_battery *bt)
{
- return madc_read(TWL4030_MADC_ICHG) * 1000;
+ return madc_read(bt->channel_ichg) * 1000;
}
-static int twl4030_madc_bat_get_temp(void)
+static int twl4030_madc_bat_get_temp(struct twl4030_madc_battery *bt)
{
- return madc_read(TWL4030_MADC_BTEMP) * 10;
+ return madc_read(bt->channel_temp) * 10;
}
static int twl4030_madc_bat_voltscale(struct twl4030_madc_battery *bat,
int i, res = 0;
/* choose charging curve */
- if (twl4030_madc_bat_get_charging_status())
+ if (twl4030_madc_bat_get_charging_status(bat))
calibration = bat->pdata->charging;
else
calibration = bat->pdata->discharging;
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct twl4030_madc_battery *bat = container_of(psy,
- struct twl4030_madc_battery, psy);
+ struct twl4030_madc_battery *bat = power_supply_get_drvdata(psy);
switch (psp) {
case POWER_SUPPLY_PROP_STATUS:
if (twl4030_madc_bat_voltscale(bat,
- twl4030_madc_bat_get_voltage()) > 95)
+ twl4030_madc_bat_get_voltage(bat)) > 95)
val->intval = POWER_SUPPLY_STATUS_FULL;
else {
- if (twl4030_madc_bat_get_charging_status())
+ if (twl4030_madc_bat_get_charging_status(bat))
val->intval = POWER_SUPPLY_STATUS_CHARGING;
else
val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
}
break;
case POWER_SUPPLY_PROP_VOLTAGE_NOW:
- val->intval = twl4030_madc_bat_get_voltage() * 1000;
+ val->intval = twl4030_madc_bat_get_voltage(bat) * 1000;
break;
case POWER_SUPPLY_PROP_TECHNOLOGY:
val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
break;
case POWER_SUPPLY_PROP_CURRENT_NOW:
- val->intval = twl4030_madc_bat_get_current();
+ val->intval = twl4030_madc_bat_get_current(bat);
break;
case POWER_SUPPLY_PROP_PRESENT:
/* assume battery is always present */
break;
case POWER_SUPPLY_PROP_CHARGE_NOW: {
int percent = twl4030_madc_bat_voltscale(bat,
- twl4030_madc_bat_get_voltage());
+ twl4030_madc_bat_get_voltage(bat));
val->intval = (percent * bat->pdata->capacity) / 100;
break;
}
case POWER_SUPPLY_PROP_CAPACITY:
val->intval = twl4030_madc_bat_voltscale(bat,
- twl4030_madc_bat_get_voltage());
+ twl4030_madc_bat_get_voltage(bat));
break;
case POWER_SUPPLY_PROP_CHARGE_FULL:
val->intval = bat->pdata->capacity;
break;
case POWER_SUPPLY_PROP_TEMP:
- val->intval = twl4030_madc_bat_get_temp();
+ val->intval = twl4030_madc_bat_get_temp(bat);
break;
case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW: {
int percent = twl4030_madc_bat_voltscale(bat,
- twl4030_madc_bat_get_voltage());
+ twl4030_madc_bat_get_voltage(bat));
/* in mAh */
int chg = (percent * (bat->pdata->capacity/1000))/100;
static void twl4030_madc_bat_ext_changed(struct power_supply *psy)
{
- struct twl4030_madc_battery *bat = container_of(psy,
- struct twl4030_madc_battery, psy);
-
- power_supply_changed(&bat->psy);
+ power_supply_changed(psy);
}
+static const struct power_supply_desc twl4030_madc_bat_desc = {
+ .name = "twl4030_battery",
+ .type = POWER_SUPPLY_TYPE_BATTERY,
+ .properties = twl4030_madc_bat_props,
+ .num_properties = ARRAY_SIZE(twl4030_madc_bat_props),
+ .get_property = twl4030_madc_bat_get_property,
+ .external_power_changed = twl4030_madc_bat_ext_changed,
+
+};
+
static int twl4030_cmp(const void *a, const void *b)
{
return ((struct twl4030_madc_bat_calibration *)b)->voltage -
{
struct twl4030_madc_battery *twl4030_madc_bat;
struct twl4030_madc_bat_platform_data *pdata = pdev->dev.platform_data;
+ struct power_supply_config psy_cfg = {};
+ int ret = 0;
- twl4030_madc_bat = kzalloc(sizeof(*twl4030_madc_bat), GFP_KERNEL);
+ twl4030_madc_bat = devm_kzalloc(&pdev->dev, sizeof(*twl4030_madc_bat),
+ GFP_KERNEL);
if (!twl4030_madc_bat)
return -ENOMEM;
- twl4030_madc_bat->psy.name = "twl4030_battery";
- twl4030_madc_bat->psy.type = POWER_SUPPLY_TYPE_BATTERY;
- twl4030_madc_bat->psy.properties = twl4030_madc_bat_props;
- twl4030_madc_bat->psy.num_properties =
- ARRAY_SIZE(twl4030_madc_bat_props);
- twl4030_madc_bat->psy.get_property = twl4030_madc_bat_get_property;
- twl4030_madc_bat->psy.external_power_changed =
- twl4030_madc_bat_ext_changed;
+ twl4030_madc_bat->channel_temp = iio_channel_get(&pdev->dev, "temp");
+ if (IS_ERR(twl4030_madc_bat->channel_temp)) {
+ ret = PTR_ERR(twl4030_madc_bat->channel_temp);
+ goto err;
+ }
+
+ twl4030_madc_bat->channel_ichg = iio_channel_get(&pdev->dev, "ichg");
+ if (IS_ERR(twl4030_madc_bat->channel_ichg)) {
+ ret = PTR_ERR(twl4030_madc_bat->channel_ichg);
+ goto err_temp;
+ }
+
+ twl4030_madc_bat->channel_vbat = iio_channel_get(&pdev->dev, "vbat");
+ if (IS_ERR(twl4030_madc_bat->channel_vbat)) {
+ ret = PTR_ERR(twl4030_madc_bat->channel_vbat);
+ goto err_ichg;
+ }
/* sort charging and discharging calibration data */
sort(pdata->charging, pdata->charging_size,
twl4030_madc_bat->pdata = pdata;
platform_set_drvdata(pdev, twl4030_madc_bat);
- power_supply_register(&pdev->dev, &twl4030_madc_bat->psy);
+ psy_cfg.drv_data = twl4030_madc_bat;
+ twl4030_madc_bat->psy = power_supply_register(&pdev->dev,
+ &twl4030_madc_bat_desc,
+ &psy_cfg);
+ if (IS_ERR(twl4030_madc_bat->psy)) {
+ ret = PTR_ERR(twl4030_madc_bat->psy);
+ goto err_vbat;
+ }
return 0;
+
+err_vbat:
+ iio_channel_release(twl4030_madc_bat->channel_vbat);
+err_ichg:
+ iio_channel_release(twl4030_madc_bat->channel_ichg);
+err_temp:
+ iio_channel_release(twl4030_madc_bat->channel_temp);
+err:
+ return ret;
}
static int twl4030_madc_battery_remove(struct platform_device *pdev)
{
struct twl4030_madc_battery *bat = platform_get_drvdata(pdev);
- power_supply_unregister(&bat->psy);
- kfree(bat);
+ power_supply_unregister(bat->psy);
+
+ iio_channel_release(bat->channel_vbat);
+ iio_channel_release(bat->channel_ichg);
+ iio_channel_release(bat->channel_temp);
return 0;
}
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Lukas Märdian <lukas@goldelico.com>");
MODULE_DESCRIPTION("twl4030_madc battery driver");
+MODULE_ALIAS("platform:twl4030_madc_battery");
struct wm831x_backup {
struct wm831x *wm831x;
- struct power_supply backup;
+ struct power_supply *backup;
+ struct power_supply_desc backup_desc;
char name[20];
};
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct wm831x_backup *devdata = dev_get_drvdata(psy->dev->parent);
+ struct wm831x_backup *devdata = dev_get_drvdata(psy->dev.parent);
struct wm831x *wm831x = devdata->wm831x;
int ret = 0;
struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
struct wm831x_pdata *wm831x_pdata = wm831x->dev->platform_data;
struct wm831x_backup *devdata;
- struct power_supply *backup;
- int ret;
devdata = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_backup),
GFP_KERNEL);
devdata->wm831x = wm831x;
platform_set_drvdata(pdev, devdata);
- backup = &devdata->backup;
-
/* We ignore configuration failures since we can still read
* back the status without enabling the charger (which may
* already be enabled anyway).
snprintf(devdata->name, sizeof(devdata->name),
"wm831x-backup");
- backup->name = devdata->name;
- backup->type = POWER_SUPPLY_TYPE_BATTERY;
- backup->properties = wm831x_backup_props;
- backup->num_properties = ARRAY_SIZE(wm831x_backup_props);
- backup->get_property = wm831x_backup_get_prop;
- ret = power_supply_register(&pdev->dev, backup);
+ devdata->backup_desc.name = devdata->name;
+ devdata->backup_desc.type = POWER_SUPPLY_TYPE_BATTERY;
+ devdata->backup_desc.properties = wm831x_backup_props;
+ devdata->backup_desc.num_properties = ARRAY_SIZE(wm831x_backup_props);
+ devdata->backup_desc.get_property = wm831x_backup_get_prop;
+ devdata->backup = power_supply_register(&pdev->dev,
+ &devdata->backup_desc, NULL);
- return ret;
+ return PTR_ERR_OR_ZERO(devdata->backup);
}
static int wm831x_backup_remove(struct platform_device *pdev)
{
struct wm831x_backup *devdata = platform_get_drvdata(pdev);
- power_supply_unregister(&devdata->backup);
+ power_supply_unregister(devdata->backup);
return 0;
}
struct wm831x_power {
struct wm831x *wm831x;
- struct power_supply wall;
- struct power_supply usb;
- struct power_supply battery;
+ struct power_supply *wall;
+ struct power_supply *usb;
+ struct power_supply *battery;
+ struct power_supply_desc wall_desc;
+ struct power_supply_desc usb_desc;
+ struct power_supply_desc battery_desc;
char wall_name[20];
char usb_name[20];
char battery_name[20];
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct wm831x_power *wm831x_power = dev_get_drvdata(psy->dev->parent);
+ struct wm831x_power *wm831x_power = dev_get_drvdata(psy->dev.parent);
struct wm831x *wm831x = wm831x_power->wm831x;
int ret = 0;
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct wm831x_power *wm831x_power = dev_get_drvdata(psy->dev->parent);
+ struct wm831x_power *wm831x_power = dev_get_drvdata(psy->dev.parent);
struct wm831x *wm831x = wm831x_power->wm831x;
int ret = 0;
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct wm831x_power *wm831x_power = dev_get_drvdata(psy->dev->parent);
+ struct wm831x_power *wm831x_power = dev_get_drvdata(psy->dev.parent);
struct wm831x *wm831x = wm831x_power->wm831x;
int ret = 0;
/* The battery charger is autonomous so we don't need to do
* anything except kick user space */
if (wm831x_power->have_battery)
- power_supply_changed(&wm831x_power->battery);
+ power_supply_changed(wm831x_power->battery);
return IRQ_HANDLED;
}
/* Just notify for everything - little harm in overnotifying. */
if (wm831x_power->have_battery)
- power_supply_changed(&wm831x_power->battery);
- power_supply_changed(&wm831x_power->usb);
- power_supply_changed(&wm831x_power->wall);
+ power_supply_changed(wm831x_power->battery);
+ power_supply_changed(wm831x_power->usb);
+ power_supply_changed(wm831x_power->wall);
return IRQ_HANDLED;
}
struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
struct wm831x_pdata *wm831x_pdata = wm831x->dev->platform_data;
struct wm831x_power *power;
- struct power_supply *usb;
- struct power_supply *battery;
- struct power_supply *wall;
int ret, irq, i;
power = kzalloc(sizeof(struct wm831x_power), GFP_KERNEL);
power->wm831x = wm831x;
platform_set_drvdata(pdev, power);
- usb = &power->usb;
- battery = &power->battery;
- wall = &power->wall;
-
if (wm831x_pdata && wm831x_pdata->wm831x_num) {
snprintf(power->wall_name, sizeof(power->wall_name),
"wm831x-wall.%d", wm831x_pdata->wm831x_num);
*/
wm831x_config_battery(wm831x);
- wall->name = power->wall_name;
- wall->type = POWER_SUPPLY_TYPE_MAINS;
- wall->properties = wm831x_wall_props;
- wall->num_properties = ARRAY_SIZE(wm831x_wall_props);
- wall->get_property = wm831x_wall_get_prop;
- ret = power_supply_register(&pdev->dev, wall);
- if (ret)
+ power->wall_desc.name = power->wall_name;
+ power->wall_desc.type = POWER_SUPPLY_TYPE_MAINS;
+ power->wall_desc.properties = wm831x_wall_props;
+ power->wall_desc.num_properties = ARRAY_SIZE(wm831x_wall_props);
+ power->wall_desc.get_property = wm831x_wall_get_prop;
+ power->wall = power_supply_register(&pdev->dev, &power->wall_desc,
+ NULL);
+ if (IS_ERR(power->wall)) {
+ ret = PTR_ERR(power->wall);
goto err_kmalloc;
+ }
- usb->name = power->usb_name,
- usb->type = POWER_SUPPLY_TYPE_USB;
- usb->properties = wm831x_usb_props;
- usb->num_properties = ARRAY_SIZE(wm831x_usb_props);
- usb->get_property = wm831x_usb_get_prop;
- ret = power_supply_register(&pdev->dev, usb);
- if (ret)
+ power->usb_desc.name = power->usb_name,
+ power->usb_desc.type = POWER_SUPPLY_TYPE_USB;
+ power->usb_desc.properties = wm831x_usb_props;
+ power->usb_desc.num_properties = ARRAY_SIZE(wm831x_usb_props);
+ power->usb_desc.get_property = wm831x_usb_get_prop;
+ power->usb = power_supply_register(&pdev->dev, &power->usb_desc, NULL);
+ if (IS_ERR(power->usb)) {
+ ret = PTR_ERR(power->usb);
goto err_wall;
+ }
ret = wm831x_reg_read(wm831x, WM831X_CHARGER_CONTROL_1);
if (ret < 0)
power->have_battery = ret & WM831X_CHG_ENA;
if (power->have_battery) {
- battery->name = power->battery_name;
- battery->properties = wm831x_bat_props;
- battery->num_properties = ARRAY_SIZE(wm831x_bat_props);
- battery->get_property = wm831x_bat_get_prop;
- battery->use_for_apm = 1;
- ret = power_supply_register(&pdev->dev, battery);
- if (ret)
- goto err_usb;
+ power->battery_desc.name = power->battery_name;
+ power->battery_desc.properties = wm831x_bat_props;
+ power->battery_desc.num_properties = ARRAY_SIZE(wm831x_bat_props);
+ power->battery_desc.get_property = wm831x_bat_get_prop;
+ power->battery_desc.use_for_apm = 1;
+ power->battery = power_supply_register(&pdev->dev,
+ &power->battery_desc,
+ NULL);
+ if (IS_ERR(power->battery)) {
+ ret = PTR_ERR(power->battery);
+ goto err_usb;
+ }
}
irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "SYSLO"));
free_irq(irq, power);
err_battery:
if (power->have_battery)
- power_supply_unregister(battery);
+ power_supply_unregister(power->battery);
err_usb:
- power_supply_unregister(usb);
+ power_supply_unregister(power->usb);
err_wall:
- power_supply_unregister(wall);
+ power_supply_unregister(power->wall);
err_kmalloc:
kfree(power);
return ret;
free_irq(irq, wm831x_power);
if (wm831x_power->have_battery)
- power_supply_unregister(&wm831x_power->battery);
- power_supply_unregister(&wm831x_power->wall);
- power_supply_unregister(&wm831x_power->usb);
+ power_supply_unregister(wm831x_power->battery);
+ power_supply_unregister(wm831x_power->wall);
+ power_supply_unregister(wm831x_power->usb);
kfree(wm831x_power);
return 0;
}
break;
case WM8350_IRQ_CHG_TO:
dev_err(wm8350->dev, "charger timeout\n");
- power_supply_changed(&power->battery);
+ power_supply_changed(power->battery);
break;
case WM8350_IRQ_CHG_BAT_HOT:
case WM8350_IRQ_CHG_BAT_COLD:
case WM8350_IRQ_CHG_START:
case WM8350_IRQ_CHG_END:
- power_supply_changed(&power->battery);
+ power_supply_changed(power->battery);
break;
case WM8350_IRQ_CHG_FAST_RDY:
case WM8350_IRQ_EXT_WALL_FB:
wm8350_charger_config(wm8350, policy);
case WM8350_IRQ_EXT_BAT_FB: /* Fall through */
- power_supply_changed(&power->battery);
- power_supply_changed(&power->usb);
- power_supply_changed(&power->ac);
+ power_supply_changed(power->battery);
+ power_supply_changed(power->usb);
+ power_supply_changed(power->ac);
break;
default:
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct wm8350 *wm8350 = dev_get_drvdata(psy->dev->parent);
+ struct wm8350 *wm8350 = dev_get_drvdata(psy->dev.parent);
int ret = 0;
switch (psp) {
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct wm8350 *wm8350 = dev_get_drvdata(psy->dev->parent);
+ struct wm8350 *wm8350 = dev_get_drvdata(psy->dev.parent);
int ret = 0;
switch (psp) {
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct wm8350 *wm8350 = dev_get_drvdata(psy->dev->parent);
+ struct wm8350 *wm8350 = dev_get_drvdata(psy->dev.parent);
int ret = 0;
switch (psp) {
POWER_SUPPLY_PROP_CHARGE_TYPE,
};
+static const struct power_supply_desc wm8350_ac_desc = {
+ .name = "wm8350-ac",
+ .type = POWER_SUPPLY_TYPE_MAINS,
+ .properties = wm8350_ac_props,
+ .num_properties = ARRAY_SIZE(wm8350_ac_props),
+ .get_property = wm8350_ac_get_prop,
+};
+
+static const struct power_supply_desc wm8350_battery_desc = {
+ .name = "wm8350-battery",
+ .properties = wm8350_bat_props,
+ .num_properties = ARRAY_SIZE(wm8350_bat_props),
+ .get_property = wm8350_bat_get_property,
+ .use_for_apm = 1,
+};
+
+static const struct power_supply_desc wm8350_usb_desc = {
+ .name = "wm8350-usb",
+ .type = POWER_SUPPLY_TYPE_USB,
+ .properties = wm8350_usb_props,
+ .num_properties = ARRAY_SIZE(wm8350_usb_props),
+ .get_property = wm8350_usb_get_prop,
+};
+
/*********************************************************************
* Initialisation
*********************************************************************/
struct wm8350 *wm8350 = platform_get_drvdata(pdev);
struct wm8350_power *power = &wm8350->power;
struct wm8350_charger_policy *policy = power->policy;
- struct power_supply *usb = &power->usb;
- struct power_supply *battery = &power->battery;
- struct power_supply *ac = &power->ac;
int ret;
- ac->name = "wm8350-ac";
- ac->type = POWER_SUPPLY_TYPE_MAINS;
- ac->properties = wm8350_ac_props;
- ac->num_properties = ARRAY_SIZE(wm8350_ac_props);
- ac->get_property = wm8350_ac_get_prop;
- ret = power_supply_register(&pdev->dev, ac);
- if (ret)
- return ret;
-
- battery->name = "wm8350-battery";
- battery->properties = wm8350_bat_props;
- battery->num_properties = ARRAY_SIZE(wm8350_bat_props);
- battery->get_property = wm8350_bat_get_property;
- battery->use_for_apm = 1;
- ret = power_supply_register(&pdev->dev, battery);
- if (ret)
+ power->ac = power_supply_register(&pdev->dev, &wm8350_ac_desc, NULL);
+ if (IS_ERR(power->ac))
+ return PTR_ERR(power->ac);
+
+ power->battery = power_supply_register(&pdev->dev, &wm8350_battery_desc,
+ NULL);
+ if (IS_ERR(power->battery)) {
+ ret = PTR_ERR(power->battery);
goto battery_failed;
+ }
- usb->name = "wm8350-usb",
- usb->type = POWER_SUPPLY_TYPE_USB;
- usb->properties = wm8350_usb_props;
- usb->num_properties = ARRAY_SIZE(wm8350_usb_props);
- usb->get_property = wm8350_usb_get_prop;
- ret = power_supply_register(&pdev->dev, usb);
- if (ret)
+ power->usb = power_supply_register(&pdev->dev, &wm8350_usb_desc, NULL);
+ if (IS_ERR(power->usb)) {
+ ret = PTR_ERR(power->usb);
goto usb_failed;
+ }
ret = device_create_file(&pdev->dev, &dev_attr_charger_state);
if (ret < 0)
return ret;
usb_failed:
- power_supply_unregister(battery);
+ power_supply_unregister(power->battery);
battery_failed:
- power_supply_unregister(ac);
+ power_supply_unregister(power->ac);
return ret;
}
free_charger_irq(wm8350);
device_remove_file(&pdev->dev, &dev_attr_charger_state);
- power_supply_unregister(&power->battery);
- power_supply_unregister(&power->ac);
- power_supply_unregister(&power->usb);
+ power_supply_unregister(power->battery);
+ power_supply_unregister(power->ac);
+ power_supply_unregister(power->usb);
return 0;
}
static unsigned long wm97xx_read_bat(struct power_supply *bat_ps)
{
- struct wm97xx_pdata *wmdata = bat_ps->dev->parent->platform_data;
+ struct wm97xx_pdata *wmdata = bat_ps->dev.parent->platform_data;
struct wm97xx_batt_pdata *pdata = wmdata->batt_pdata;
- return wm97xx_read_aux_adc(dev_get_drvdata(bat_ps->dev->parent),
+ return wm97xx_read_aux_adc(dev_get_drvdata(bat_ps->dev.parent),
pdata->batt_aux) * pdata->batt_mult /
pdata->batt_div;
}
static unsigned long wm97xx_read_temp(struct power_supply *bat_ps)
{
- struct wm97xx_pdata *wmdata = bat_ps->dev->parent->platform_data;
+ struct wm97xx_pdata *wmdata = bat_ps->dev.parent->platform_data;
struct wm97xx_batt_pdata *pdata = wmdata->batt_pdata;
- return wm97xx_read_aux_adc(dev_get_drvdata(bat_ps->dev->parent),
+ return wm97xx_read_aux_adc(dev_get_drvdata(bat_ps->dev.parent),
pdata->temp_aux) * pdata->temp_mult /
pdata->temp_div;
}
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct wm97xx_pdata *wmdata = bat_ps->dev->parent->platform_data;
+ struct wm97xx_pdata *wmdata = bat_ps->dev.parent->platform_data;
struct wm97xx_batt_pdata *pdata = wmdata->batt_pdata;
switch (psp) {
static void wm97xx_bat_update(struct power_supply *bat_ps)
{
int old_status = bat_status;
- struct wm97xx_pdata *wmdata = bat_ps->dev->parent->platform_data;
+ struct wm97xx_pdata *wmdata = bat_ps->dev.parent->platform_data;
struct wm97xx_batt_pdata *pdata = wmdata->batt_pdata;
mutex_lock(&work_lock);
POWER_SUPPLY_STATUS_UNKNOWN;
if (old_status != bat_status) {
- pr_debug("%s: %i -> %i\n", bat_ps->name, old_status,
+ pr_debug("%s: %i -> %i\n", bat_ps->desc->name, old_status,
bat_status);
power_supply_changed(bat_ps);
}
mutex_unlock(&work_lock);
}
-static struct power_supply bat_ps = {
+static struct power_supply *bat_psy;
+static struct power_supply_desc bat_psy_desc = {
.type = POWER_SUPPLY_TYPE_BATTERY,
.get_property = wm97xx_bat_get_property,
.external_power_changed = wm97xx_bat_external_power_changed,
static void wm97xx_bat_work(struct work_struct *work)
{
- wm97xx_bat_update(&bat_ps);
+ wm97xx_bat_update(bat_psy);
}
static irqreturn_t wm97xx_chrg_irq(int irq, void *data)
dev_info(&dev->dev, "Please consider setting proper battery "
"name in platform definition file, falling "
"back to name \"wm97xx-batt\"\n");
- bat_ps.name = "wm97xx-batt";
+ bat_psy_desc.name = "wm97xx-batt";
} else
- bat_ps.name = pdata->batt_name;
+ bat_psy_desc.name = pdata->batt_name;
- bat_ps.properties = prop;
- bat_ps.num_properties = props;
+ bat_psy_desc.properties = prop;
+ bat_psy_desc.num_properties = props;
- ret = power_supply_register(&dev->dev, &bat_ps);
- if (!ret)
+ bat_psy = power_supply_register(&dev->dev, &bat_psy_desc, NULL);
+ if (!IS_ERR(bat_psy)) {
schedule_work(&bat_work);
- else
+ } else {
+ ret = PTR_ERR(bat_psy);
goto err4;
+ }
return 0;
err4:
gpio_free(pdata->charge_gpio);
}
cancel_work_sync(&bat_work);
- power_supply_unregister(&bat_ps);
+ power_supply_unregister(bat_psy);
kfree(prop);
return 0;
}
#define Z2_DEFAULT_NAME "Z2"
struct z2_charger {
- struct z2_battery_info *info;
- int bat_status;
- struct i2c_client *client;
- struct power_supply batt_ps;
- struct mutex work_lock;
- struct work_struct bat_work;
+ struct z2_battery_info *info;
+ int bat_status;
+ struct i2c_client *client;
+ struct power_supply *batt_ps;
+ struct power_supply_desc batt_ps_desc;
+ struct mutex work_lock;
+ struct work_struct bat_work;
};
static unsigned long z2_read_bat(struct z2_charger *charger)
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct z2_charger *charger = container_of(batt_ps, struct z2_charger,
- batt_ps);
+ struct z2_charger *charger = power_supply_get_drvdata(batt_ps);
struct z2_battery_info *info = charger->info;
switch (psp) {
static void z2_batt_ext_power_changed(struct power_supply *batt_ps)
{
- struct z2_charger *charger = container_of(batt_ps, struct z2_charger,
- batt_ps);
+ struct z2_charger *charger = power_supply_get_drvdata(batt_ps);
+
schedule_work(&charger->bat_work);
}
POWER_SUPPLY_STATUS_UNKNOWN;
if (old_status != charger->bat_status) {
- pr_debug("%s: %i -> %i\n", charger->batt_ps.name, old_status,
- charger->bat_status);
- power_supply_changed(&charger->batt_ps);
+ pr_debug("%s: %i -> %i\n", charger->batt_ps->desc->name,
+ old_status,
+ charger->bat_status);
+ power_supply_changed(charger->batt_ps);
}
mutex_unlock(&charger->work_lock);
"Please consider setting proper battery "
"name in platform definition file, falling "
"back to name \" Z2_DEFAULT_NAME \"\n");
- charger->batt_ps.name = Z2_DEFAULT_NAME;
+ charger->batt_ps_desc.name = Z2_DEFAULT_NAME;
} else
- charger->batt_ps.name = info->batt_name;
+ charger->batt_ps_desc.name = info->batt_name;
- charger->batt_ps.properties = prop;
- charger->batt_ps.num_properties = props;
- charger->batt_ps.type = POWER_SUPPLY_TYPE_BATTERY;
- charger->batt_ps.get_property = z2_batt_get_property;
- charger->batt_ps.external_power_changed = z2_batt_ext_power_changed;
- charger->batt_ps.use_for_apm = 1;
+ charger->batt_ps_desc.properties = prop;
+ charger->batt_ps_desc.num_properties = props;
+ charger->batt_ps_desc.type = POWER_SUPPLY_TYPE_BATTERY;
+ charger->batt_ps_desc.get_property = z2_batt_get_property;
+ charger->batt_ps_desc.external_power_changed =
+ z2_batt_ext_power_changed;
+ charger->batt_ps_desc.use_for_apm = 1;
return 0;
}
int props = 1; /* POWER_SUPPLY_PROP_PRESENT */
struct z2_charger *charger;
struct z2_battery_info *info = client->dev.platform_data;
+ struct power_supply_config psy_cfg = {};
if (info == NULL) {
dev_err(&client->dev,
charger->info = info;
charger->client = client;
i2c_set_clientdata(client, charger);
+ psy_cfg.drv_data = charger;
mutex_init(&charger->work_lock);
INIT_WORK(&charger->bat_work, z2_batt_work);
- ret = power_supply_register(&client->dev, &charger->batt_ps);
- if (ret)
+ charger->batt_ps = power_supply_register(&client->dev,
+ &charger->batt_ps_desc,
+ &psy_cfg);
+ if (IS_ERR(charger->batt_ps)) {
+ ret = PTR_ERR(charger->batt_ps);
goto err4;
+ }
schedule_work(&charger->bat_work);
return 0;
err4:
- kfree(charger->batt_ps.properties);
+ kfree(charger->batt_ps_desc.properties);
err3:
if (info->charge_gpio >= 0 && gpio_is_valid(info->charge_gpio))
free_irq(gpio_to_irq(info->charge_gpio), charger);
struct z2_battery_info *info = charger->info;
cancel_work_sync(&charger->bat_work);
- power_supply_unregister(&charger->batt_ps);
+ power_supply_unregister(charger->batt_ps);
- kfree(charger->batt_ps.properties);
+ kfree(charger->batt_ps_desc.properties);
if (info->charge_gpio >= 0 && gpio_is_valid(info->charge_gpio)) {
free_irq(gpio_to_irq(info->charge_gpio), charger);
gpio_free(info->charge_gpio);
#include <linux/regulator/of_regulator.h>
#include <linux/regmap.h>
+/*
+ * ACT8600 Global Register Map.
+ */
+#define ACT8600_SYS_MODE 0x00
+#define ACT8600_SYS_CTRL 0x01
+#define ACT8600_DCDC1_VSET 0x10
+#define ACT8600_DCDC1_CTRL 0x12
+#define ACT8600_DCDC2_VSET 0x20
+#define ACT8600_DCDC2_CTRL 0x22
+#define ACT8600_DCDC3_VSET 0x30
+#define ACT8600_DCDC3_CTRL 0x32
+#define ACT8600_SUDCDC4_VSET 0x40
+#define ACT8600_SUDCDC4_CTRL 0x41
+#define ACT8600_LDO5_VSET 0x50
+#define ACT8600_LDO5_CTRL 0x51
+#define ACT8600_LDO6_VSET 0x60
+#define ACT8600_LDO6_CTRL 0x61
+#define ACT8600_LDO7_VSET 0x70
+#define ACT8600_LDO7_CTRL 0x71
+#define ACT8600_LDO8_VSET 0x80
+#define ACT8600_LDO8_CTRL 0x81
+#define ACT8600_LDO910_CTRL 0x91
+#define ACT8600_APCH0 0xA1
+#define ACT8600_APCH1 0xA8
+#define ACT8600_APCH2 0xA9
+#define ACT8600_APCH_STAT 0xAA
+#define ACT8600_OTG0 0xB0
+#define ACT8600_OTG1 0xB2
+
/*
* ACT8846 Global Register Map.
*/
#define ACT8865_ENA 0x80 /* ON - [7] */
#define ACT8865_VSEL_MASK 0x3F /* VSET - [5:0] */
+
+#define ACT8600_LDO10_ENA 0x40 /* ON - [6] */
+#define ACT8600_SUDCDC_VSEL_MASK 0xFF /* SUDCDC VSET - [7:0] */
+
/*
* ACT8865 voltage number
*/
#define ACT8865_VOLTAGE_NUM 64
+#define ACT8600_SUDCDC_VOLTAGE_NUM 255
struct act8865 {
struct regmap *regmap;
REGULATOR_LINEAR_RANGE(2400000, 48, 63, 100000),
};
+static const struct regulator_linear_range act8600_sudcdc_voltage_ranges[] = {
+ REGULATOR_LINEAR_RANGE(3000000, 0, 63, 0),
+ REGULATOR_LINEAR_RANGE(3000000, 64, 159, 100000),
+ REGULATOR_LINEAR_RANGE(12600000, 160, 191, 200000),
+ REGULATOR_LINEAR_RANGE(19000000, 191, 255, 400000),
+};
+
static struct regulator_ops act8865_ops = {
.list_voltage = regulator_list_voltage_linear_range,
.map_voltage = regulator_map_voltage_linear_range,
.is_enabled = regulator_is_enabled_regmap,
};
-#define ACT88xx_REG(_name, _family, _id, _vsel_reg) \
+static struct regulator_ops act8865_ldo_ops = {
+ .enable = regulator_enable_regmap,
+ .disable = regulator_disable_regmap,
+ .is_enabled = regulator_is_enabled_regmap,
+};
+
+#define ACT88xx_REG(_name, _family, _id, _vsel_reg, _supply) \
[_family##_ID_##_id] = { \
.name = _name, \
+ .supply_name = _supply, \
.id = _family##_ID_##_id, \
.type = REGULATOR_VOLTAGE, \
.ops = &act8865_ops, \
.owner = THIS_MODULE, \
}
+static const struct regulator_desc act8600_regulators[] = {
+ ACT88xx_REG("DCDC1", ACT8600, DCDC1, VSET, "vp1"),
+ ACT88xx_REG("DCDC2", ACT8600, DCDC2, VSET, "vp2"),
+ ACT88xx_REG("DCDC3", ACT8600, DCDC3, VSET, "vp3"),
+ {
+ .name = "SUDCDC_REG4",
+ .id = ACT8600_ID_SUDCDC4,
+ .ops = &act8865_ops,
+ .type = REGULATOR_VOLTAGE,
+ .n_voltages = ACT8600_SUDCDC_VOLTAGE_NUM,
+ .linear_ranges = act8600_sudcdc_voltage_ranges,
+ .n_linear_ranges = ARRAY_SIZE(act8600_sudcdc_voltage_ranges),
+ .vsel_reg = ACT8600_SUDCDC4_VSET,
+ .vsel_mask = ACT8600_SUDCDC_VSEL_MASK,
+ .enable_reg = ACT8600_SUDCDC4_CTRL,
+ .enable_mask = ACT8865_ENA,
+ .owner = THIS_MODULE,
+ },
+ ACT88xx_REG("LDO5", ACT8600, LDO5, VSET, "inl"),
+ ACT88xx_REG("LDO6", ACT8600, LDO6, VSET, "inl"),
+ ACT88xx_REG("LDO7", ACT8600, LDO7, VSET, "inl"),
+ ACT88xx_REG("LDO8", ACT8600, LDO8, VSET, "inl"),
+ {
+ .name = "LDO_REG9",
+ .id = ACT8600_ID_LDO9,
+ .ops = &act8865_ldo_ops,
+ .type = REGULATOR_VOLTAGE,
+ .n_voltages = 1,
+ .fixed_uV = 1800000,
+ .enable_reg = ACT8600_LDO910_CTRL,
+ .enable_mask = ACT8865_ENA,
+ .owner = THIS_MODULE,
+ },
+ {
+ .name = "LDO_REG10",
+ .id = ACT8600_ID_LDO10,
+ .ops = &act8865_ldo_ops,
+ .type = REGULATOR_VOLTAGE,
+ .n_voltages = 1,
+ .fixed_uV = 1200000,
+ .enable_reg = ACT8600_LDO910_CTRL,
+ .enable_mask = ACT8600_LDO10_ENA,
+ .owner = THIS_MODULE,
+ },
+};
+
static const struct regulator_desc act8846_regulators[] = {
- ACT88xx_REG("REG1", ACT8846, REG1, VSET),
- ACT88xx_REG("REG2", ACT8846, REG2, VSET0),
- ACT88xx_REG("REG3", ACT8846, REG3, VSET0),
- ACT88xx_REG("REG4", ACT8846, REG4, VSET0),
- ACT88xx_REG("REG5", ACT8846, REG5, VSET),
- ACT88xx_REG("REG6", ACT8846, REG6, VSET),
- ACT88xx_REG("REG7", ACT8846, REG7, VSET),
- ACT88xx_REG("REG8", ACT8846, REG8, VSET),
- ACT88xx_REG("REG9", ACT8846, REG9, VSET),
- ACT88xx_REG("REG10", ACT8846, REG10, VSET),
- ACT88xx_REG("REG11", ACT8846, REG11, VSET),
- ACT88xx_REG("REG12", ACT8846, REG12, VSET),
+ ACT88xx_REG("REG1", ACT8846, REG1, VSET, "vp1"),
+ ACT88xx_REG("REG2", ACT8846, REG2, VSET0, "vp2"),
+ ACT88xx_REG("REG3", ACT8846, REG3, VSET0, "vp3"),
+ ACT88xx_REG("REG4", ACT8846, REG4, VSET0, "vp4"),
+ ACT88xx_REG("REG5", ACT8846, REG5, VSET, "inl1"),
+ ACT88xx_REG("REG6", ACT8846, REG6, VSET, "inl1"),
+ ACT88xx_REG("REG7", ACT8846, REG7, VSET, "inl1"),
+ ACT88xx_REG("REG8", ACT8846, REG8, VSET, "inl2"),
+ ACT88xx_REG("REG9", ACT8846, REG9, VSET, "inl2"),
+ ACT88xx_REG("REG10", ACT8846, REG10, VSET, "inl3"),
+ ACT88xx_REG("REG11", ACT8846, REG11, VSET, "inl3"),
+ ACT88xx_REG("REG12", ACT8846, REG12, VSET, "inl3"),
};
static const struct regulator_desc act8865_regulators[] = {
- ACT88xx_REG("DCDC_REG1", ACT8865, DCDC1, VSET1),
- ACT88xx_REG("DCDC_REG2", ACT8865, DCDC2, VSET1),
- ACT88xx_REG("DCDC_REG3", ACT8865, DCDC3, VSET1),
- ACT88xx_REG("LDO_REG1", ACT8865, LDO1, VSET),
- ACT88xx_REG("LDO_REG2", ACT8865, LDO2, VSET),
- ACT88xx_REG("LDO_REG3", ACT8865, LDO3, VSET),
- ACT88xx_REG("LDO_REG4", ACT8865, LDO4, VSET),
+ ACT88xx_REG("DCDC_REG1", ACT8865, DCDC1, VSET1, "vp1"),
+ ACT88xx_REG("DCDC_REG2", ACT8865, DCDC2, VSET1, "vp2"),
+ ACT88xx_REG("DCDC_REG3", ACT8865, DCDC3, VSET1, "vp3"),
+ ACT88xx_REG("LDO_REG1", ACT8865, LDO1, VSET, "inl45"),
+ ACT88xx_REG("LDO_REG2", ACT8865, LDO2, VSET, "inl45"),
+ ACT88xx_REG("LDO_REG3", ACT8865, LDO3, VSET, "inl67"),
+ ACT88xx_REG("LDO_REG4", ACT8865, LDO4, VSET, "inl67"),
};
#ifdef CONFIG_OF
static const struct of_device_id act8865_dt_ids[] = {
+ { .compatible = "active-semi,act8600", .data = (void *)ACT8600 },
{ .compatible = "active-semi,act8846", .data = (void *)ACT8846 },
{ .compatible = "active-semi,act8865", .data = (void *)ACT8865 },
{ }
[ACT8865_ID_LDO4] = { .name = "LDO_REG4"},
};
+static struct of_regulator_match act8600_matches[] = {
+ [ACT8600_ID_DCDC1] = { .name = "DCDC_REG1"},
+ [ACT8600_ID_DCDC2] = { .name = "DCDC_REG2"},
+ [ACT8600_ID_DCDC3] = { .name = "DCDC_REG3"},
+ [ACT8600_ID_SUDCDC4] = { .name = "SUDCDC_REG4"},
+ [ACT8600_ID_LDO5] = { .name = "LDO_REG5"},
+ [ACT8600_ID_LDO6] = { .name = "LDO_REG6"},
+ [ACT8600_ID_LDO7] = { .name = "LDO_REG7"},
+ [ACT8600_ID_LDO8] = { .name = "LDO_REG8"},
+ [ACT8600_ID_LDO9] = { .name = "LDO_REG9"},
+ [ACT8600_ID_LDO10] = { .name = "LDO_REG10"},
+};
+
static int act8865_pdata_from_dt(struct device *dev,
struct device_node **of_node,
struct act8865_platform_data *pdata,
}
switch (type) {
+ case ACT8600:
+ matches = act8600_matches;
+ num_matches = ARRAY_SIZE(act8600_matches);
+ break;
case ACT8846:
matches = act8846_matches;
num_matches = ARRAY_SIZE(act8846_matches);
}
switch (type) {
+ case ACT8600:
+ regulators = act8600_regulators;
+ num_regulators = ARRAY_SIZE(act8600_regulators);
+ off_reg = -1;
+ off_mask = -1;
+ break;
case ACT8846:
regulators = act8846_regulators;
num_regulators = ARRAY_SIZE(act8846_regulators);
}
if (of_device_is_system_power_controller(dev->of_node)) {
- if (!pm_power_off) {
+ if (!pm_power_off && (off_reg > 0)) {
act8865_i2c_client = client;
act8865->off_reg = off_reg;
act8865->off_mask = off_mask;
}
static const struct i2c_device_id act8865_ids[] = {
+ { .name = "act8600", .driver_data = ACT8600 },
{ .name = "act8846", .driver_data = ACT8846 },
{ .name = "act8865", .driver_data = ACT8865 },
{ },
arizona->external_dcvdd = true;
ldo1->regulator = devm_regulator_register(&pdev->dev, desc, &config);
+
+ of_node_put(config.of_node);
+
if (IS_ERR(ldo1->regulator)) {
ret = PTR_ERR(ldo1->regulator);
dev_err(arizona->dev, "Failed to register LDO1 supply: %d\n",
return ret;
}
- of_node_put(config.of_node);
-
platform_set_drvdata(pdev, ldo1);
return 0;
*/
switch (arizona->type) {
case WM5110:
+ case WM8280:
desc = &arizona_micsupp_ext;
micsupp->init_data = arizona_micsupp_ext_default;
break;
micsupp->regulator = devm_regulator_register(&pdev->dev,
desc,
&config);
+
+ of_node_put(config.of_node);
+
if (IS_ERR(micsupp->regulator)) {
ret = PTR_ERR(micsupp->regulator);
dev_err(arizona->dev, "Failed to register mic supply: %d\n",
return ret;
}
- of_node_put(config.of_node);
-
platform_set_drvdata(pdev, micsupp);
return 0;
if (err < 0)
return 0;
- if (!rdev->desc->ops->get_optimum_mode)
+ if (!rdev->desc->ops->get_optimum_mode &&
+ !rdev->desc->ops->set_load)
return 0;
- if (!rdev->desc->ops->set_mode)
+ if (!rdev->desc->ops->set_mode &&
+ !rdev->desc->ops->set_load)
return -EINVAL;
/* get output voltage */
list_for_each_entry(sibling, &rdev->consumer_list, list)
current_uA += sibling->uA_load;
- /* now get the optimum mode for our new total regulator load */
- mode = rdev->desc->ops->get_optimum_mode(rdev, input_uV,
- output_uV, current_uA);
+ if (rdev->desc->ops->set_load) {
+ /* set the optimum mode for our new total regulator load */
+ err = rdev->desc->ops->set_load(rdev, current_uA);
+ if (err < 0)
+ rdev_err(rdev, "failed to set load %d\n", current_uA);
+ } else {
+ /* now get the optimum mode for our new total regulator load */
+ mode = rdev->desc->ops->get_optimum_mode(rdev, input_uV,
+ output_uV, current_uA);
+
+ /* check the new mode is allowed */
+ err = regulator_mode_constrain(rdev, &mode);
+ if (err < 0) {
+ rdev_err(rdev, "failed to get optimum mode @ %d uA %d -> %d uV\n",
+ current_uA, input_uV, output_uV);
+ return err;
+ }
- /* check the new mode is allowed */
- err = regulator_mode_constrain(rdev, &mode);
- if (err < 0) {
- rdev_err(rdev, "failed to get optimum mode @ %d uA %d -> %d uV\n",
- current_uA, input_uV, output_uV);
- return err;
+ err = rdev->desc->ops->set_mode(rdev, mode);
+ if (err < 0)
+ rdev_err(rdev, "failed to set optimum mode %x\n", mode);
}
- err = rdev->desc->ops->set_mode(rdev, mode);
- if (err < 0)
- rdev_err(rdev, "failed to set optimum mode %x\n", mode);
-
return err;
}
return NULL;
}
+static int regulator_resolve_supply(struct regulator_dev *rdev)
+{
+ struct regulator_dev *r;
+ struct device *dev = rdev->dev.parent;
+ int ret;
+
+ /* No supply to resovle? */
+ if (!rdev->supply_name)
+ return 0;
+
+ /* Supply already resolved? */
+ if (rdev->supply)
+ return 0;
+
+ r = regulator_dev_lookup(dev, rdev->supply_name, &ret);
+ if (ret == -ENODEV) {
+ /*
+ * No supply was specified for this regulator and
+ * there will never be one.
+ */
+ return 0;
+ }
+
+ if (!r) {
+ dev_err(dev, "Failed to resolve %s-supply for %s\n",
+ rdev->supply_name, rdev->desc->name);
+ return -EPROBE_DEFER;
+ }
+
+ /* Recursively resolve the supply of the supply */
+ ret = regulator_resolve_supply(r);
+ if (ret < 0)
+ return ret;
+
+ ret = set_supply(rdev, r);
+ if (ret < 0)
+ return ret;
+
+ /* Cascade always-on state to supply */
+ if (_regulator_is_enabled(rdev)) {
+ ret = regulator_enable(rdev->supply);
+ if (ret < 0)
+ return ret;
+ }
+
+ return 0;
+}
+
/* Internal regulator request function */
static struct regulator *_regulator_get(struct device *dev, const char *id,
bool exclusive, bool allow_dummy)
goto out;
}
+ ret = regulator_resolve_supply(rdev);
+ if (ret < 0) {
+ regulator = ERR_PTR(ret);
+ goto out;
+ }
+
if (!try_module_get(rdev->owner))
goto out;
EXPORT_SYMBOL_GPL(regulator_get_mode);
/**
- * regulator_set_optimum_mode - set regulator optimum operating mode
+ * regulator_set_load - set regulator load
* @regulator: regulator source
* @uA_load: load current
*
* DRMS will sum the total requested load on the regulator and change
* to the most efficient operating mode if platform constraints allow.
*
- * Returns the new regulator mode or error.
+ * On error a negative errno is returned.
*/
-int regulator_set_optimum_mode(struct regulator *regulator, int uA_load)
+int regulator_set_load(struct regulator *regulator, int uA_load)
{
struct regulator_dev *rdev = regulator->rdev;
int ret;
return ret;
}
-EXPORT_SYMBOL_GPL(regulator_set_optimum_mode);
+EXPORT_SYMBOL_GPL(regulator_set_load);
/**
* regulator_allow_bypass - allow the regulator to go into bypass mode
static void rdev_init_debugfs(struct regulator_dev *rdev)
{
- rdev->debugfs = debugfs_create_dir(rdev_get_name(rdev), debugfs_root);
+ struct device *parent = rdev->dev.parent;
+ const char *rname = rdev_get_name(rdev);
+ char name[NAME_MAX];
+
+ /* Avoid duplicate debugfs directory names */
+ if (parent && rname == rdev->desc->name) {
+ snprintf(name, sizeof(name), "%s-%s", dev_name(parent),
+ rname);
+ rname = name;
+ }
+
+ rdev->debugfs = debugfs_create_dir(rname, debugfs_root);
if (!rdev->debugfs) {
rdev_warn(rdev, "Failed to create debugfs directory\n");
return;
struct regulator_dev *rdev;
struct device *dev;
int ret, i;
- const char *supply = NULL;
if (regulator_desc == NULL || cfg == NULL)
return ERR_PTR(-EINVAL);
goto scrub;
if (init_data && init_data->supply_regulator)
- supply = init_data->supply_regulator;
+ rdev->supply_name = init_data->supply_regulator;
else if (regulator_desc->supply_name)
- supply = regulator_desc->supply_name;
-
- if (supply) {
- struct regulator_dev *r;
+ rdev->supply_name = regulator_desc->supply_name;
- r = regulator_dev_lookup(dev, supply, &ret);
-
- if (ret == -ENODEV) {
- /*
- * No supply was specified for this regulator and
- * there will never be one.
- */
- ret = 0;
- goto add_dev;
- } else if (!r) {
- dev_err(dev, "Failed to find supply %s\n", supply);
- ret = -EPROBE_DEFER;
- goto scrub;
- }
-
- ret = set_supply(rdev, r);
- if (ret < 0)
- goto scrub;
-
- /* Enable supply if rail is enabled */
- if (_regulator_is_enabled(rdev)) {
- ret = regulator_enable(rdev->supply);
- if (ret < 0)
- goto scrub;
- }
- }
-
-add_dev:
/* add consumers devices */
if (init_data) {
for (i = 0; i < init_data->num_consumer_supplies; i++) {
unset_regulator_supplies(rdev);
scrub:
- if (rdev->supply)
- _regulator_put(rdev->supply);
regulator_ena_gpio_free(rdev);
kfree(rdev->constraints);
wash:
#endif
};
+#ifdef CONFIG_DEBUG_FS
+static void regulator_summary_show_subtree(struct seq_file *s,
+ struct regulator_dev *rdev,
+ int level)
+{
+ struct list_head *list = s->private;
+ struct regulator_dev *child;
+ struct regulation_constraints *c;
+ struct regulator *consumer;
+
+ if (!rdev)
+ return;
+
+ seq_printf(s, "%*s%-*s %3d %4d %6d ",
+ level * 3 + 1, "",
+ 30 - level * 3, rdev_get_name(rdev),
+ rdev->use_count, rdev->open_count, rdev->bypass_count);
+
+ seq_printf(s, "%5dmV ", _regulator_get_voltage(rdev) / 1000);
+ seq_printf(s, "%5dmA ", _regulator_get_current_limit(rdev) / 1000);
+
+ c = rdev->constraints;
+ if (c) {
+ switch (rdev->desc->type) {
+ case REGULATOR_VOLTAGE:
+ seq_printf(s, "%5dmV %5dmV ",
+ c->min_uV / 1000, c->max_uV / 1000);
+ break;
+ case REGULATOR_CURRENT:
+ seq_printf(s, "%5dmA %5dmA ",
+ c->min_uA / 1000, c->max_uA / 1000);
+ break;
+ }
+ }
+
+ seq_puts(s, "\n");
+
+ list_for_each_entry(consumer, &rdev->consumer_list, list) {
+ if (consumer->dev->class == ®ulator_class)
+ continue;
+
+ seq_printf(s, "%*s%-*s ",
+ (level + 1) * 3 + 1, "",
+ 30 - (level + 1) * 3, dev_name(consumer->dev));
+
+ switch (rdev->desc->type) {
+ case REGULATOR_VOLTAGE:
+ seq_printf(s, "%37dmV %5dmV",
+ consumer->min_uV / 1000,
+ consumer->max_uV / 1000);
+ break;
+ case REGULATOR_CURRENT:
+ break;
+ }
+
+ seq_puts(s, "\n");
+ }
+
+ list_for_each_entry(child, list, list) {
+ /* handle only non-root regulators supplied by current rdev */
+ if (!child->supply || child->supply->rdev != rdev)
+ continue;
+
+ regulator_summary_show_subtree(s, child, level + 1);
+ }
+}
+
+static int regulator_summary_show(struct seq_file *s, void *data)
+{
+ struct list_head *list = s->private;
+ struct regulator_dev *rdev;
+
+ seq_puts(s, " regulator use open bypass voltage current min max\n");
+ seq_puts(s, "-------------------------------------------------------------------------------\n");
+
+ mutex_lock(®ulator_list_mutex);
+
+ list_for_each_entry(rdev, list, list) {
+ if (rdev->supply)
+ continue;
+
+ regulator_summary_show_subtree(s, rdev, 0);
+ }
+
+ mutex_unlock(®ulator_list_mutex);
+
+ return 0;
+}
+
+static int regulator_summary_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, regulator_summary_show, inode->i_private);
+}
+#endif
+
+static const struct file_operations regulator_summary_fops = {
+#ifdef CONFIG_DEBUG_FS
+ .open = regulator_summary_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+#endif
+};
+
static int __init regulator_init(void)
{
int ret;
debugfs_create_file("supply_map", 0444, debugfs_root, NULL,
&supply_map_fops);
+ debugfs_create_file("regulator_summary", 0444, debugfs_root,
+ ®ulator_list, ®ulator_summary_fops);
+
regulator_dummy_init();
return ret;
if (reg_val & DA9211_E_OV_CURR_A) {
regulator_notifier_call_chain(chip->rdev[0],
- REGULATOR_EVENT_OVER_CURRENT,
- rdev_get_drvdata(chip->rdev[0]));
+ REGULATOR_EVENT_OVER_CURRENT, NULL);
err = regmap_write(chip->regmap, DA9211_REG_EVENT_B,
DA9211_E_OV_CURR_A);
if (reg_val & DA9211_E_OV_CURR_B) {
regulator_notifier_call_chain(chip->rdev[1],
- REGULATOR_EVENT_OVER_CURRENT,
- rdev_get_drvdata(chip->rdev[1]));
+ REGULATOR_EVENT_OVER_CURRENT, NULL);
err = regmap_write(chip->regmap, DA9211_REG_EVENT_B,
DA9211_E_OV_CURR_B);
ret = regmap_read(chip->regmap, DA9211_REG_CONFIG_E, &data);
if (ret < 0) {
- dev_err(chip->dev, "Failed to read CONTROL_E reg: %d\n", ret);
+ dev_err(chip->dev, "Failed to read CONFIG_E reg: %d\n", ret);
return ret;
}
static int ux500_regulator_power_state_cnt_print(struct seq_file *s, void *p)
{
- struct device *dev = s->private;
- int err;
-
/* print power state count */
- err = seq_printf(s, "ux500-regulator power state count: %i\n",
- power_state_active_get());
- if (err < 0)
- dev_err(dev, "seq_printf overflow\n");
+ seq_printf(s, "ux500-regulator power state count: %i\n",
+ power_state_active_get());
return 0;
}
static int ux500_regulator_status_print(struct seq_file *s, void *p)
{
- struct device *dev = s->private;
- int err;
int i;
/* print dump header */
- err = seq_puts(s, "ux500-regulator status:\n");
- if (err < 0)
- dev_err(dev, "seq_puts overflow\n");
-
- err = seq_printf(s, "%31s : %8s : %8s\n", "current",
- "before", "after");
- if (err < 0)
- dev_err(dev, "seq_printf overflow\n");
+ seq_puts(s, "ux500-regulator status:\n");
+ seq_printf(s, "%31s : %8s : %8s\n", "current", "before", "after");
for (i = 0; i < rdebug.num_regulators; i++) {
struct dbx500_regulator_info *info;
info = &rdebug.regulator_array[i];
/* print status */
- err = seq_printf(s, "%20s : %8s : %8s : %8s\n", info->desc.name,
- info->is_enabled ? "enabled" : "disabled",
- rdebug.state_before_suspend[i] ? "enabled" : "disabled",
- rdebug.state_after_suspend[i] ? "enabled" : "disabled");
- if (err < 0)
- dev_err(dev, "seq_printf overflow\n");
+ seq_printf(s, "%20s : %8s : %8s : %8s\n",
+ info->desc.name,
+ info->is_enabled ? "enabled" : "disabled",
+ rdebug.state_before_suspend[i] ? "enabled" : "disabled",
+ rdebug.state_after_suspend[i] ? "enabled" : "disabled");
}
return 0;
devm_regulator_unregister_supply_alias(dev, id[i]);
}
EXPORT_SYMBOL_GPL(devm_regulator_bulk_unregister_supply_alias);
+
+struct regulator_notifier_match {
+ struct regulator *regulator;
+ struct notifier_block *nb;
+};
+
+static int devm_regulator_match_notifier(struct device *dev, void *res,
+ void *data)
+{
+ struct regulator_notifier_match *match = res;
+ struct regulator_notifier_match *target = data;
+
+ return match->regulator == target->regulator && match->nb == target->nb;
+}
+
+static void devm_regulator_destroy_notifier(struct device *dev, void *res)
+{
+ struct regulator_notifier_match *match = res;
+
+ regulator_unregister_notifier(match->regulator, match->nb);
+}
+
+/**
+ * devm_regulator_register_notifier - Resource managed
+ * regulator_register_notifier
+ *
+ * @regulator: regulator source
+ * @nb: notifier block
+ *
+ * The notifier will be registers under the consumer device and be
+ * automatically be unregistered when the source device is unbound.
+ */
+int devm_regulator_register_notifier(struct regulator *regulator,
+ struct notifier_block *nb)
+{
+ struct regulator_notifier_match *match;
+ int ret;
+
+ match = devres_alloc(devm_regulator_destroy_notifier,
+ sizeof(struct regulator_notifier_match),
+ GFP_KERNEL);
+ if (!match)
+ return -ENOMEM;
+
+ match->regulator = regulator;
+ match->nb = nb;
+
+ ret = regulator_register_notifier(regulator, nb);
+ if (ret < 0) {
+ devres_free(match);
+ return ret;
+ }
+
+ devres_add(regulator->dev, match);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(devm_regulator_register_notifier);
+
+/**
+ * devm_regulator_unregister_notifier - Resource managed
+ * regulator_unregister_notifier()
+ *
+ * @regulator: regulator source
+ * @nb: notifier block
+ *
+ * Unregister a notifier registered with devm_regulator_register_notifier().
+ * Normally this function will not need to be called and the resource
+ * management code will ensure that the resource is freed.
+ */
+void devm_regulator_unregister_notifier(struct regulator *regulator,
+ struct notifier_block *nb)
+{
+ struct regulator_notifier_match match;
+ int rc;
+
+ match.regulator = regulator;
+ match.nb = nb;
+
+ rc = devres_release(regulator->dev, devm_regulator_destroy_notifier,
+ devm_regulator_match_notifier, &match);
+ if (rc != 0)
+ WARN_ON(rc);
+}
+EXPORT_SYMBOL_GPL(devm_regulator_unregister_notifier);
#define regulator_desc_esafeout(_num) { \
.name = "ESAFEOUT"#_num, \
.id = MAX77693_ESAFEOUT##_num, \
+ .of_match = of_match_ptr("ESAFEOUT"#_num), \
+ .regulators_node = of_match_ptr("regulators"), \
.n_voltages = 4, \
.ops = &max77693_safeout_ops, \
.type = REGULATOR_VOLTAGE, \
{
.name = "CHARGER",
.id = MAX77693_CHARGER,
+ .of_match = of_match_ptr("CHARGER"),
+ .regulators_node = of_match_ptr("regulators"),
.ops = &max77693_charger_ops,
.type = REGULATOR_CURRENT,
.owner = THIS_MODULE,
},
};
-#ifdef CONFIG_OF
-static int max77693_pmic_dt_parse_rdata(struct device *dev,
- struct max77693_regulator_data **rdata)
-{
- struct device_node *np;
- struct of_regulator_match *rmatch;
- struct max77693_regulator_data *tmp;
- int i, matched = 0;
-
- np = of_get_child_by_name(dev->parent->of_node, "regulators");
- if (!np)
- return -EINVAL;
-
- rmatch = devm_kzalloc(dev,
- sizeof(*rmatch) * ARRAY_SIZE(regulators), GFP_KERNEL);
- if (!rmatch) {
- of_node_put(np);
- return -ENOMEM;
- }
-
- for (i = 0; i < ARRAY_SIZE(regulators); i++)
- rmatch[i].name = regulators[i].name;
-
- matched = of_regulator_match(dev, np, rmatch, ARRAY_SIZE(regulators));
- of_node_put(np);
- if (matched <= 0)
- return matched;
- *rdata = devm_kzalloc(dev, sizeof(**rdata) * matched, GFP_KERNEL);
- if (!(*rdata))
- return -ENOMEM;
-
- tmp = *rdata;
-
- for (i = 0; i < matched; i++) {
- tmp->initdata = rmatch[i].init_data;
- tmp->of_node = rmatch[i].of_node;
- tmp->id = regulators[i].id;
- tmp++;
- }
-
- return matched;
-}
-#else
-static int max77693_pmic_dt_parse_rdata(struct device *dev,
- struct max77693_regulator_data **rdata)
-{
- return 0;
-}
-#endif /* CONFIG_OF */
-
-static int max77693_pmic_init_rdata(struct device *dev,
- struct max77693_regulator_data **rdata)
-{
- struct max77693_platform_data *pdata;
- int num_regulators = 0;
-
- pdata = dev_get_platdata(dev->parent);
- if (pdata) {
- *rdata = pdata->regulators;
- num_regulators = pdata->num_regulators;
- }
-
- if (!(*rdata) && dev->parent->of_node)
- num_regulators = max77693_pmic_dt_parse_rdata(dev, rdata);
-
- return num_regulators;
-}
-
static int max77693_pmic_probe(struct platform_device *pdev)
{
struct max77693_dev *iodev = dev_get_drvdata(pdev->dev.parent);
- struct max77693_regulator_data *rdata = NULL;
- int num_rdata, i;
+ int i;
struct regulator_config config = { };
- num_rdata = max77693_pmic_init_rdata(&pdev->dev, &rdata);
- if (!rdata || num_rdata <= 0) {
- dev_err(&pdev->dev, "No init data supplied.\n");
- return -ENODEV;
- }
-
- config.dev = &pdev->dev;
+ config.dev = iodev->dev;
config.regmap = iodev->regmap;
- for (i = 0; i < num_rdata; i++) {
- int id = rdata[i].id;
+ for (i = 0; i < ARRAY_SIZE(regulators); i++) {
struct regulator_dev *rdev;
- config.init_data = rdata[i].initdata;
- config.of_node = rdata[i].of_node;
-
rdev = devm_regulator_register(&pdev->dev,
- ®ulators[id], &config);
+ ®ulators[i], &config);
if (IS_ERR(rdev)) {
dev_err(&pdev->dev,
- "Failed to initialize regulator-%d\n", id);
+ "Failed to initialize regulator-%d\n", i);
return PTR_ERR(rdev);
}
}
const struct i2c_device_id *i2c_id)
{
struct device *dev = &client->dev;
- struct max8660_platform_data *pdata = dev_get_platdata(dev);
+ struct max8660_platform_data pdata_of, *pdata = dev_get_platdata(dev);
struct regulator_config config = { };
struct max8660 *max8660;
int boot_on, i, id, ret = -EINVAL;
if (dev->of_node && !pdata) {
const struct of_device_id *id;
- struct max8660_platform_data pdata_of;
id = of_match_device(of_match_ptr(max8660_dt_ids), dev);
if (!id)
for (i = 0; i < pdata->num_subdevs; i++) {
if (!pdata->subdevs[i].platform_data)
- return ret;
-
- boot_on = pdata->subdevs[i].platform_data->constraints.boot_on;
+ boot_on = false;
+ else
+ boot_on = pdata->subdevs[i].platform_data->constraints.boot_on;
switch (pdata->subdevs[i].id) {
case MAX8660_V3:
(id == PALMAS_REG_LDO6))
desc->enable_time = 2000;
} else {
+ if (!ddata->has_regen3 && id == PALMAS_REG_REGEN3)
+ continue;
+
desc->n_voltages = 1;
if (reg_init && reg_init->roof_floor)
desc->ops = &palmas_ops_ext_control_extreg;
.ldo_begin = PALMAS_REG_LDO1,
.ldo_end = PALMAS_REG_LDOUSB,
.max_reg = PALMAS_NUM_REGS,
+ .has_regen3 = true,
.palmas_regs_info = palmas_generic_regs_info,
.palmas_matches = palmas_matches,
.sleep_req_info = palma_sleep_req_info,
.ldo_begin = TPS65917_REG_LDO1,
.ldo_end = TPS65917_REG_LDO5,
.max_reg = TPS65917_NUM_REGS,
+ .has_regen3 = true,
.palmas_regs_info = tps65917_regs_info,
.palmas_matches = tps65917_matches,
.sleep_req_info = tps65917_sleep_req_info,
pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
}
-static struct of_device_id of_palmas_match_tbl[] = {
+static const struct of_device_id of_palmas_match_tbl[] = {
{
.compatible = "ti,palmas-pmic",
.data = &palmas_ddata,
if (!pmic)
return -ENOMEM;
- if (of_device_is_compatible(node, "ti,tps659038-pmic"))
+ if (of_device_is_compatible(node, "ti,tps659038-pmic")) {
palmas_generic_regs_info[PALMAS_REG_REGEN2].ctrl_addr =
TPS659038_REGEN2_CTRL;
+ palmas_ddata.has_regen3 = false;
+ }
pmic->dev = &pdev->dev;
pmic->palmas = palmas;
return vreg->is_enabled;
}
+static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
+{
+ struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
+ const struct rpm_reg_parts *parts = vreg->parts;
+ const struct request_member *req = &parts->ia;
+ int load_mA = load_uA / 1000;
+ int max_mA = req->mask >> req->shift;
+ int ret;
+
+ if (req->mask == 0)
+ return -EINVAL;
+
+ if (load_mA > max_mA)
+ load_mA = max_mA;
+
+ mutex_lock(&vreg->lock);
+ ret = rpm_reg_write(vreg, req, load_mA);
+ mutex_unlock(&vreg->lock);
+
+ return ret;
+}
+
static struct regulator_ops uV_ops = {
.list_voltage = regulator_list_voltage_linear_range,
.enable = rpm_reg_uV_enable,
.disable = rpm_reg_uV_disable,
.is_enabled = rpm_reg_is_enabled,
+
+ .set_load = rpm_reg_set_load,
};
static struct regulator_ops mV_ops = {
.enable = rpm_reg_mV_enable,
.disable = rpm_reg_mV_disable,
.is_enabled = rpm_reg_is_enabled,
+
+ .set_load = rpm_reg_set_load,
};
static struct regulator_ops switch_ops = {
.supports_force_mode_bypass = false,
};
-static const struct of_device_id rpm_of_match[] = {
- { .compatible = "qcom,rpm-pm8058-pldo", .data = &pm8058_pldo },
- { .compatible = "qcom,rpm-pm8058-nldo", .data = &pm8058_nldo },
- { .compatible = "qcom,rpm-pm8058-smps", .data = &pm8058_smps },
- { .compatible = "qcom,rpm-pm8058-ncp", .data = &pm8058_ncp },
- { .compatible = "qcom,rpm-pm8058-switch", .data = &pm8058_switch },
-
- { .compatible = "qcom,rpm-pm8901-pldo", .data = &pm8901_pldo },
- { .compatible = "qcom,rpm-pm8901-nldo", .data = &pm8901_nldo },
- { .compatible = "qcom,rpm-pm8901-ftsmps", .data = &pm8901_ftsmps },
- { .compatible = "qcom,rpm-pm8901-switch", .data = &pm8901_switch },
-
- { .compatible = "qcom,rpm-pm8921-pldo", .data = &pm8921_pldo },
- { .compatible = "qcom,rpm-pm8921-nldo", .data = &pm8921_nldo },
- { .compatible = "qcom,rpm-pm8921-nldo1200", .data = &pm8921_nldo1200 },
- { .compatible = "qcom,rpm-pm8921-smps", .data = &pm8921_smps },
- { .compatible = "qcom,rpm-pm8921-ftsmps", .data = &pm8921_ftsmps },
- { .compatible = "qcom,rpm-pm8921-ncp", .data = &pm8921_ncp },
- { .compatible = "qcom,rpm-pm8921-switch", .data = &pm8921_switch },
-
- { .compatible = "qcom,rpm-smb208", .data = &smb208_smps },
- { }
-};
-MODULE_DEVICE_TABLE(of, rpm_of_match);
-
static int rpm_reg_set(struct qcom_rpm_reg *vreg,
const struct request_member *req,
const int value)
return 0;
}
-static int rpm_reg_of_parse_freq(struct device *dev, struct qcom_rpm_reg *vreg)
+static int rpm_reg_of_parse_freq(struct device *dev,
+ struct device_node *node,
+ struct qcom_rpm_reg *vreg)
{
static const int freq_table[] = {
19200000, 9600000, 6400000, 4800000, 3840000, 3200000, 2740000,
int i;
key = "qcom,switch-mode-frequency";
- ret = of_property_read_u32(dev->of_node, key, &freq);
+ ret = of_property_read_u32(node, key, &freq);
if (ret) {
dev_err(dev, "regulator requires %s property\n", key);
return -EINVAL;
return -EINVAL;
}
-static int rpm_reg_probe(struct platform_device *pdev)
+static int rpm_reg_of_parse(struct device_node *node,
+ const struct regulator_desc *desc,
+ struct regulator_config *config)
{
- struct regulator_init_data *initdata;
- const struct qcom_rpm_reg *template;
- const struct of_device_id *match;
- struct regulator_config config = { };
- struct regulator_dev *rdev;
- struct qcom_rpm_reg *vreg;
+ struct qcom_rpm_reg *vreg = config->driver_data;
+ struct device *dev = config->dev;
const char *key;
u32 force_mode;
bool pwm;
u32 val;
int ret;
- match = of_match_device(rpm_of_match, &pdev->dev);
- template = match->data;
-
- vreg = devm_kmalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
- if (!vreg) {
- dev_err(&pdev->dev, "failed to allocate vreg\n");
- return -ENOMEM;
- }
- memcpy(vreg, template, sizeof(*vreg));
- mutex_init(&vreg->lock);
- vreg->dev = &pdev->dev;
- vreg->desc.id = -1;
- vreg->desc.owner = THIS_MODULE;
- vreg->desc.type = REGULATOR_VOLTAGE;
- vreg->desc.name = pdev->dev.of_node->name;
- vreg->desc.supply_name = "vin";
-
- vreg->rpm = dev_get_drvdata(pdev->dev.parent);
- if (!vreg->rpm) {
- dev_err(&pdev->dev, "unable to retrieve handle to rpm\n");
- return -ENODEV;
- }
-
- initdata = of_get_regulator_init_data(&pdev->dev, pdev->dev.of_node,
- &vreg->desc);
- if (!initdata)
- return -EINVAL;
-
- key = "reg";
- ret = of_property_read_u32(pdev->dev.of_node, key, &val);
- if (ret) {
- dev_err(&pdev->dev, "failed to read %s\n", key);
- return ret;
- }
- vreg->resource = val;
-
- if ((vreg->parts->uV.mask || vreg->parts->mV.mask) &&
- (!initdata->constraints.min_uV || !initdata->constraints.max_uV)) {
- dev_err(&pdev->dev, "no voltage specified for regulator\n");
- return -EINVAL;
- }
-
key = "bias-pull-down";
- if (of_property_read_bool(pdev->dev.of_node, key)) {
+ if (of_property_read_bool(node, key)) {
ret = rpm_reg_set(vreg, &vreg->parts->pd, 1);
if (ret) {
- dev_err(&pdev->dev, "%s is invalid", key);
+ dev_err(dev, "%s is invalid", key);
return ret;
}
}
if (vreg->parts->freq.mask) {
- ret = rpm_reg_of_parse_freq(&pdev->dev, vreg);
+ ret = rpm_reg_of_parse_freq(dev, node, vreg);
if (ret < 0)
return ret;
}
if (vreg->parts->pm.mask) {
key = "qcom,power-mode-hysteretic";
- pwm = !of_property_read_bool(pdev->dev.of_node, key);
+ pwm = !of_property_read_bool(node, key);
ret = rpm_reg_set(vreg, &vreg->parts->pm, pwm);
if (ret) {
- dev_err(&pdev->dev, "failed to set power mode\n");
+ dev_err(dev, "failed to set power mode\n");
return ret;
}
}
force_mode = -1;
key = "qcom,force-mode";
- ret = of_property_read_u32(pdev->dev.of_node, key, &val);
+ ret = of_property_read_u32(node, key, &val);
if (ret == -EINVAL) {
val = QCOM_RPM_FORCE_MODE_NONE;
} else if (ret < 0) {
- dev_err(&pdev->dev, "failed to read %s\n", key);
+ dev_err(dev, "failed to read %s\n", key);
return ret;
}
}
if (force_mode == -1) {
- dev_err(&pdev->dev, "invalid force mode\n");
+ dev_err(dev, "invalid force mode\n");
return -EINVAL;
}
ret = rpm_reg_set(vreg, &vreg->parts->fm, force_mode);
if (ret) {
- dev_err(&pdev->dev, "failed to set force mode\n");
+ dev_err(dev, "failed to set force mode\n");
return ret;
}
}
- config.dev = &pdev->dev;
- config.init_data = initdata;
- config.driver_data = vreg;
- config.of_node = pdev->dev.of_node;
- rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config);
- if (IS_ERR(rdev)) {
- dev_err(&pdev->dev, "can't register regulator\n");
- return PTR_ERR(rdev);
+ return 0;
+}
+
+struct rpm_regulator_data {
+ const char *name;
+ int resource;
+ const struct qcom_rpm_reg *template;
+ const char *supply;
+};
+
+static const struct rpm_regulator_data rpm_pm8058_regulators[] = {
+ { "l0", QCOM_RPM_PM8058_LDO0, &pm8058_nldo, "vdd_l0_l1_lvs" },
+ { "l1", QCOM_RPM_PM8058_LDO1, &pm8058_nldo, "vdd_l0_l1_lvs" },
+ { "l2", QCOM_RPM_PM8058_LDO2, &pm8058_pldo, "vdd_l2_l11_l12" },
+ { "l3", QCOM_RPM_PM8058_LDO3, &pm8058_pldo, "vdd_l3_l4_l5" },
+ { "l4", QCOM_RPM_PM8058_LDO4, &pm8058_pldo, "vdd_l3_l4_l5" },
+ { "l5", QCOM_RPM_PM8058_LDO5, &pm8058_pldo, "vdd_l3_l4_l5" },
+ { "l6", QCOM_RPM_PM8058_LDO6, &pm8058_pldo, "vdd_l6_l7" },
+ { "l7", QCOM_RPM_PM8058_LDO7, &pm8058_pldo, "vdd_l6_l7" },
+ { "l8", QCOM_RPM_PM8058_LDO8, &pm8058_pldo, "vdd_l8" },
+ { "l9", QCOM_RPM_PM8058_LDO9, &pm8058_pldo, "vdd_l9" },
+ { "l10", QCOM_RPM_PM8058_LDO10, &pm8058_pldo, "vdd_l10" },
+ { "l11", QCOM_RPM_PM8058_LDO11, &pm8058_pldo, "vdd_l2_l11_l12" },
+ { "l12", QCOM_RPM_PM8058_LDO12, &pm8058_pldo, "vdd_l2_l11_l12" },
+ { "l13", QCOM_RPM_PM8058_LDO13, &pm8058_pldo, "vdd_l13_l16" },
+ { "l14", QCOM_RPM_PM8058_LDO14, &pm8058_pldo, "vdd_l14_l15" },
+ { "l15", QCOM_RPM_PM8058_LDO15, &pm8058_pldo, "vdd_l14_l15" },
+ { "l16", QCOM_RPM_PM8058_LDO16, &pm8058_pldo, "vdd_l13_l16" },
+ { "l17", QCOM_RPM_PM8058_LDO17, &pm8058_pldo, "vdd_l17_l18" },
+ { "l18", QCOM_RPM_PM8058_LDO18, &pm8058_pldo, "vdd_l17_l18" },
+ { "l19", QCOM_RPM_PM8058_LDO19, &pm8058_pldo, "vdd_l19_l20" },
+ { "l20", QCOM_RPM_PM8058_LDO20, &pm8058_pldo, "vdd_l19_l20" },
+ { "l21", QCOM_RPM_PM8058_LDO21, &pm8058_nldo, "vdd_l21" },
+ { "l22", QCOM_RPM_PM8058_LDO22, &pm8058_nldo, "vdd_l22" },
+ { "l23", QCOM_RPM_PM8058_LDO23, &pm8058_nldo, "vdd_l23_l24_l25" },
+ { "l24", QCOM_RPM_PM8058_LDO24, &pm8058_nldo, "vdd_l23_l24_l25" },
+ { "l25", QCOM_RPM_PM8058_LDO25, &pm8058_nldo, "vdd_l23_l24_l25" },
+
+ { "s0", QCOM_RPM_PM8058_SMPS0, &pm8058_smps, "vdd_s0" },
+ { "s1", QCOM_RPM_PM8058_SMPS1, &pm8058_smps, "vdd_s1" },
+ { "s2", QCOM_RPM_PM8058_SMPS2, &pm8058_smps, "vdd_s2" },
+ { "s3", QCOM_RPM_PM8058_SMPS3, &pm8058_smps, "vdd_s3" },
+ { "s4", QCOM_RPM_PM8058_SMPS4, &pm8058_smps, "vdd_s4" },
+
+ { "lvs0", QCOM_RPM_PM8058_LVS0, &pm8058_switch, "vdd_l0_l1_lvs" },
+ { "lvs1", QCOM_RPM_PM8058_LVS1, &pm8058_switch, "vdd_l0_l1_lvs" },
+
+ { "ncp", QCOM_RPM_PM8058_NCP, &pm8058_ncp, "vdd_ncp" },
+ { }
+};
+
+static const struct rpm_regulator_data rpm_pm8901_regulators[] = {
+ { "l0", QCOM_RPM_PM8901_LDO0, &pm8901_nldo, "vdd_l0" },
+ { "l1", QCOM_RPM_PM8901_LDO1, &pm8901_pldo, "vdd_l1" },
+ { "l2", QCOM_RPM_PM8901_LDO2, &pm8901_pldo, "vdd_l2" },
+ { "l3", QCOM_RPM_PM8901_LDO3, &pm8901_pldo, "vdd_l3" },
+ { "l4", QCOM_RPM_PM8901_LDO4, &pm8901_pldo, "vdd_l4" },
+ { "l5", QCOM_RPM_PM8901_LDO5, &pm8901_pldo, "vdd_l5" },
+ { "l6", QCOM_RPM_PM8901_LDO6, &pm8901_pldo, "vdd_l6" },
+
+ { "s0", QCOM_RPM_PM8901_SMPS0, &pm8901_ftsmps, "vdd_s0" },
+ { "s1", QCOM_RPM_PM8901_SMPS1, &pm8901_ftsmps, "vdd_s1" },
+ { "s2", QCOM_RPM_PM8901_SMPS2, &pm8901_ftsmps, "vdd_s2" },
+ { "s3", QCOM_RPM_PM8901_SMPS3, &pm8901_ftsmps, "vdd_s3" },
+ { "s4", QCOM_RPM_PM8901_SMPS4, &pm8901_ftsmps, "vdd_s4" },
+
+ { "lvs0", QCOM_RPM_PM8901_LVS0, &pm8901_switch, "lvs0_in" },
+ { "lvs1", QCOM_RPM_PM8901_LVS1, &pm8901_switch, "lvs1_in" },
+ { "lvs2", QCOM_RPM_PM8901_LVS2, &pm8901_switch, "lvs2_in" },
+ { "lvs3", QCOM_RPM_PM8901_LVS3, &pm8901_switch, "lvs3_in" },
+
+ { "mvs", QCOM_RPM_PM8901_MVS, &pm8901_switch, "mvs_in" },
+ { }
+};
+
+static const struct rpm_regulator_data rpm_pm8921_regulators[] = {
+ { "s1", QCOM_RPM_PM8921_SMPS1, &pm8921_smps, "vdd_s1" },
+ { "s2", QCOM_RPM_PM8921_SMPS2, &pm8921_smps, "vdd_s2" },
+ { "s3", QCOM_RPM_PM8921_SMPS3, &pm8921_smps },
+ { "s4", QCOM_RPM_PM8921_SMPS4, &pm8921_smps, "vdd_s4" },
+ { "s7", QCOM_RPM_PM8921_SMPS7, &pm8921_smps, "vdd_s7" },
+ { "s8", QCOM_RPM_PM8921_SMPS8, &pm8921_smps, "vdd_s8" },
+
+ { "l1", QCOM_RPM_PM8921_LDO1, &pm8921_nldo, "vdd_l1_l2_l12_l18" },
+ { "l2", QCOM_RPM_PM8921_LDO2, &pm8921_nldo, "vdd_l1_l2_l12_l18" },
+ { "l3", QCOM_RPM_PM8921_LDO3, &pm8921_pldo, "vdd_l3_l15_l17" },
+ { "l4", QCOM_RPM_PM8921_LDO4, &pm8921_pldo, "vdd_l4_l14" },
+ { "l5", QCOM_RPM_PM8921_LDO5, &pm8921_pldo, "vdd_l5_l8_l16" },
+ { "l6", QCOM_RPM_PM8921_LDO6, &pm8921_pldo, "vdd_l6_l7" },
+ { "l7", QCOM_RPM_PM8921_LDO7, &pm8921_pldo, "vdd_l6_l7" },
+ { "l8", QCOM_RPM_PM8921_LDO8, &pm8921_pldo, "vdd_l5_l8_l16" },
+ { "l9", QCOM_RPM_PM8921_LDO9, &pm8921_pldo, "vdd_l9_l11" },
+ { "l10", QCOM_RPM_PM8921_LDO10, &pm8921_pldo, "vdd_l10_l22" },
+ { "l11", QCOM_RPM_PM8921_LDO11, &pm8921_pldo, "vdd_l9_l11" },
+ { "l12", QCOM_RPM_PM8921_LDO12, &pm8921_nldo, "vdd_l1_l2_l12_l18" },
+ { "l14", QCOM_RPM_PM8921_LDO14, &pm8921_pldo, "vdd_l4_l14" },
+ { "l15", QCOM_RPM_PM8921_LDO15, &pm8921_pldo, "vdd_l3_l15_l17" },
+ { "l16", QCOM_RPM_PM8921_LDO16, &pm8921_pldo, "vdd_l5_l8_l16" },
+ { "l17", QCOM_RPM_PM8921_LDO17, &pm8921_pldo, "vdd_l3_l15_l17" },
+ { "l18", QCOM_RPM_PM8921_LDO18, &pm8921_nldo, "vdd_l1_l2_l12_l18" },
+ { "l21", QCOM_RPM_PM8921_LDO21, &pm8921_pldo, "vdd_l21_l23_l29" },
+ { "l22", QCOM_RPM_PM8921_LDO22, &pm8921_pldo, "vdd_l10_l22" },
+ { "l23", QCOM_RPM_PM8921_LDO23, &pm8921_pldo, "vdd_l21_l23_l29" },
+ { "l24", QCOM_RPM_PM8921_LDO24, &pm8921_nldo1200, "vdd_l24" },
+ { "l25", QCOM_RPM_PM8921_LDO25, &pm8921_nldo1200, "vdd_l25" },
+ { "l26", QCOM_RPM_PM8921_LDO26, &pm8921_nldo1200, "vdd_l26" },
+ { "l27", QCOM_RPM_PM8921_LDO27, &pm8921_nldo1200, "vdd_l27" },
+ { "l28", QCOM_RPM_PM8921_LDO28, &pm8921_nldo1200, "vdd_l28" },
+ { "l29", QCOM_RPM_PM8921_LDO29, &pm8921_pldo, "vdd_l21_l23_l29" },
+
+ { "lvs1", QCOM_RPM_PM8921_LVS1, &pm8921_switch, "vin_lvs1_3_6" },
+ { "lvs2", QCOM_RPM_PM8921_LVS2, &pm8921_switch, "vin_lvs2" },
+ { "lvs3", QCOM_RPM_PM8921_LVS3, &pm8921_switch, "vin_lvs1_3_6" },
+ { "lvs4", QCOM_RPM_PM8921_LVS4, &pm8921_switch, "vin_lvs4_5_7" },
+ { "lvs5", QCOM_RPM_PM8921_LVS5, &pm8921_switch, "vin_lvs4_5_7" },
+ { "lvs6", QCOM_RPM_PM8921_LVS6, &pm8921_switch, "vin_lvs1_3_6" },
+ { "lvs7", QCOM_RPM_PM8921_LVS7, &pm8921_switch, "vin_lvs4_5_7" },
+
+ { "usb-switch", QCOM_RPM_USB_OTG_SWITCH, &pm8921_switch, "vin_5vs" },
+ { "hdmi-switch", QCOM_RPM_HDMI_SWITCH, &pm8921_switch, "vin_5vs" },
+ { "ncp", QCOM_RPM_PM8921_NCP, &pm8921_ncp, "vdd_ncp" },
+ { }
+};
+
+static const struct of_device_id rpm_of_match[] = {
+ { .compatible = "qcom,rpm-pm8058-regulators", .data = &rpm_pm8058_regulators },
+ { .compatible = "qcom,rpm-pm8901-regulators", .data = &rpm_pm8901_regulators },
+ { .compatible = "qcom,rpm-pm8921-regulators", .data = &rpm_pm8921_regulators },
+ { }
+};
+MODULE_DEVICE_TABLE(of, rpm_of_match);
+
+static int rpm_reg_probe(struct platform_device *pdev)
+{
+ const struct rpm_regulator_data *reg;
+ const struct of_device_id *match;
+ struct regulator_config config = { };
+ struct regulator_dev *rdev;
+ struct qcom_rpm_reg *vreg;
+ struct qcom_rpm *rpm;
+
+ rpm = dev_get_drvdata(pdev->dev.parent);
+ if (!rpm) {
+ dev_err(&pdev->dev, "unable to retrieve handle to rpm\n");
+ return -ENODEV;
+ }
+
+ match = of_match_device(rpm_of_match, &pdev->dev);
+ for (reg = match->data; reg->name; reg++) {
+ vreg = devm_kmalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
+ if (!vreg)
+ return -ENOMEM;
+
+ memcpy(vreg, reg->template, sizeof(*vreg));
+ mutex_init(&vreg->lock);
+
+ vreg->dev = &pdev->dev;
+ vreg->resource = reg->resource;
+ vreg->rpm = rpm;
+
+ vreg->desc.id = -1;
+ vreg->desc.owner = THIS_MODULE;
+ vreg->desc.type = REGULATOR_VOLTAGE;
+ vreg->desc.name = reg->name;
+ vreg->desc.supply_name = reg->supply;
+ vreg->desc.of_match = reg->name;
+ vreg->desc.of_parse_cb = rpm_reg_of_parse;
+
+ config.dev = &pdev->dev;
+ config.driver_data = vreg;
+ rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config);
+ if (IS_ERR(rdev)) {
+ dev_err(&pdev->dev, "failed to register %s\n", reg->name);
+ return PTR_ERR(rdev);
+ }
}
return 0;
{
struct stw481x *stw481x = dev_get_platdata(&pdev->dev);
struct regulator_config config = { };
+ struct regulator_dev *rdev;
int ret;
/* First disable the external VMMC if it's active */
pdev->dev.of_node,
&vmmc_regulator);
- stw481x->vmmc_regulator = devm_regulator_register(&pdev->dev,
- &vmmc_regulator, &config);
- if (IS_ERR(stw481x->vmmc_regulator)) {
+ rdev = devm_regulator_register(&pdev->dev, &vmmc_regulator, &config);
+ if (IS_ERR(rdev)) {
dev_err(&pdev->dev,
"error initializing STw481x VMMC regulator\n");
- return PTR_ERR(stw481x->vmmc_regulator);
+ return PTR_ERR(rdev);
}
dev_info(&pdev->dev, "initialized STw481x VMMC regulator\n");
static irqreturn_t pmic_uv_handler(int irq, void *data)
{
struct regulator_dev *rdev = (struct regulator_dev *)data;
- struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
mutex_lock(&rdev->mutex);
if (irq == WM8350_IRQ_CS1 || irq == WM8350_IRQ_CS2)
regulator_notifier_call_chain(rdev,
REGULATOR_EVENT_REGULATION_OUT,
- wm8350);
+ NULL);
else
regulator_notifier_call_chain(rdev,
REGULATOR_EVENT_UNDER_VOLTAGE,
- wm8350);
+ NULL);
mutex_unlock(&rdev->mutex);
return IRQ_HANDLED;
struct timespec64 delta, delta_delta;
int err;
- if (has_persistent_clock())
+ if (timekeeping_rtc_skipsuspend())
return 0;
if (strcmp(dev_name(&rtc->dev), CONFIG_RTC_HCTOSYS_DEVICE) != 0)
struct timespec64 sleep_time;
int err;
- if (has_persistent_clock())
+ if (timekeeping_rtc_skipresume())
return 0;
rtc_hctosys_ret = -ENODEV;
return 0;
}
- if (rtc_valid_tm(&tm) != 0) {
- pr_debug("%s: bogus resume time\n", dev_name(&rtc->dev));
- return 0;
- }
new_rtc.tv_sec = rtc_tm_to_time64(&tm);
new_rtc.tv_nsec = 0;
err = -ENODEV;
else if (rtc->ops->set_time)
err = rtc->ops->set_time(rtc->dev.parent, tm);
- else if (rtc->ops->set_mmss) {
+ else if (rtc->ops->set_mmss64) {
+ time64_t secs64 = rtc_tm_to_time64(tm);
+
+ err = rtc->ops->set_mmss64(rtc->dev.parent, secs64);
+ } else if (rtc->ops->set_mmss) {
time64_t secs64 = rtc_tm_to_time64(tm);
err = rtc->ops->set_mmss(rtc->dev.parent, secs64);
} else
if (!rtc->ops)
err = -ENODEV;
+ else if (rtc->ops->set_mmss64)
+ err = rtc->ops->set_mmss64(rtc->dev.parent, secs);
else if (rtc->ops->set_mmss)
err = rtc->ops->set_mmss(rtc->dev.parent, secs);
else if (rtc->ops->read_time && rtc->ops->set_time) {
/*
* RTC clock functions and device struct declaration
*/
-static int ab3100_rtc_set_mmss(struct device *dev, unsigned long secs)
+static int ab3100_rtc_set_mmss(struct device *dev, time64_t secs)
{
u8 regs[] = {AB3100_TI0, AB3100_TI1, AB3100_TI2,
AB3100_TI3, AB3100_TI4, AB3100_TI5};
unsigned char buf[6];
- u64 fat_time = (u64) secs * AB3100_RTC_CLOCK_RATE * 2;
+ u64 hw_counter = secs * AB3100_RTC_CLOCK_RATE * 2;
int err = 0;
int i;
- buf[0] = (fat_time) & 0xFF;
- buf[1] = (fat_time >> 8) & 0xFF;
- buf[2] = (fat_time >> 16) & 0xFF;
- buf[3] = (fat_time >> 24) & 0xFF;
- buf[4] = (fat_time >> 32) & 0xFF;
- buf[5] = (fat_time >> 40) & 0xFF;
+ buf[0] = (hw_counter) & 0xFF;
+ buf[1] = (hw_counter >> 8) & 0xFF;
+ buf[2] = (hw_counter >> 16) & 0xFF;
+ buf[3] = (hw_counter >> 24) & 0xFF;
+ buf[4] = (hw_counter >> 32) & 0xFF;
+ buf[5] = (hw_counter >> 40) & 0xFF;
for (i = 0; i < 6; i++) {
err = abx500_set_register_interruptible(dev, 0,
static int ab3100_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
- unsigned long time;
+ time64_t time;
u8 rtcval;
int err;
dev_info(dev, "clock not set (lost power)");
return -EINVAL;
} else {
- u64 fat_time;
+ u64 hw_counter;
u8 buf[6];
/* Read out time registers */
if (err != 0)
return err;
- fat_time = ((u64) buf[5] << 40) | ((u64) buf[4] << 32) |
+ hw_counter = ((u64) buf[5] << 40) | ((u64) buf[4] << 32) |
((u64) buf[3] << 24) | ((u64) buf[2] << 16) |
((u64) buf[1] << 8) | (u64) buf[0];
- time = (unsigned long) (fat_time /
- (u64) (AB3100_RTC_CLOCK_RATE * 2));
+ time = hw_counter / (u64) (AB3100_RTC_CLOCK_RATE * 2);
}
- rtc_time_to_tm(time, tm);
+ rtc_time64_to_tm(time, tm);
return rtc_valid_tm(tm);
}
static int ab3100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
- unsigned long time;
- u64 fat_time;
+ time64_t time;
+ u64 hw_counter;
u8 buf[6];
u8 rtcval;
int err;
AB3100_AL0, buf, 4);
if (err)
return err;
- fat_time = ((u64) buf[3] << 40) | ((u64) buf[2] << 32) |
+ hw_counter = ((u64) buf[3] << 40) | ((u64) buf[2] << 32) |
((u64) buf[1] << 24) | ((u64) buf[0] << 16);
- time = (unsigned long) (fat_time / (u64) (AB3100_RTC_CLOCK_RATE * 2));
+ time = hw_counter / (u64) (AB3100_RTC_CLOCK_RATE * 2);
- rtc_time_to_tm(time, &alarm->time);
+ rtc_time64_to_tm(time, &alarm->time);
return rtc_valid_tm(&alarm->time);
}
{
u8 regs[] = {AB3100_AL0, AB3100_AL1, AB3100_AL2, AB3100_AL3};
unsigned char buf[4];
- unsigned long secs;
- u64 fat_time;
+ time64_t secs;
+ u64 hw_counter;
int err;
int i;
- rtc_tm_to_time(&alarm->time, &secs);
- fat_time = (u64) secs * AB3100_RTC_CLOCK_RATE * 2;
- buf[0] = (fat_time >> 16) & 0xFF;
- buf[1] = (fat_time >> 24) & 0xFF;
- buf[2] = (fat_time >> 32) & 0xFF;
- buf[3] = (fat_time >> 40) & 0xFF;
+ secs = rtc_tm_to_time64(&alarm->time);
+ hw_counter = secs * AB3100_RTC_CLOCK_RATE * 2;
+ buf[0] = (hw_counter >> 16) & 0xFF;
+ buf[1] = (hw_counter >> 24) & 0xFF;
+ buf[2] = (hw_counter >> 32) & 0xFF;
+ buf[3] = (hw_counter >> 40) & 0xFF;
/* Set the alarm */
for (i = 0; i < 4; i++) {
static const struct rtc_class_ops ab3100_rtc_ops = {
.read_time = ab3100_rtc_read_time,
- .set_mmss = ab3100_rtc_set_mmss,
+ .set_mmss64 = ab3100_rtc_set_mmss,
.read_alarm = ab3100_rtc_read_alarm,
.set_alarm = ab3100_rtc_set_alarm,
.alarm_irq_enable = ab3100_rtc_irq_enable,
/* get a report with all values through requesting one value */
sensor_hub_input_attr_get_raw_value(time_state->common_attributes.hsdev,
HID_USAGE_SENSOR_TIME, hid_time_addresses[0],
- time_state->info[0].report_id);
+ time_state->info[0].report_id, SENSOR_HUB_SYNC);
/* wait for all values (event) */
ret = wait_for_completion_killable_timeout(
&time_state->comp_last_time, HZ*6);
return ret;
} while (days1 != days2);
- rtc_time_to_tm(days1 * SEC_PER_DAY + seconds, tm);
+ rtc_time64_to_tm((time64_t)days1 * SEC_PER_DAY + seconds, tm);
return rtc_valid_tm(tm);
}
-static int mc13xxx_rtc_set_mmss(struct device *dev, unsigned long secs)
+static int mc13xxx_rtc_set_mmss(struct device *dev, time64_t secs)
{
struct mc13xxx_rtc *priv = dev_get_drvdata(dev);
unsigned int seconds, days;
unsigned int alarmseconds;
int ret;
- seconds = secs % SEC_PER_DAY;
- days = secs / SEC_PER_DAY;
+ days = div_s64_rem(secs, SEC_PER_DAY, &seconds);
mc13xxx_lock(priv->mc13xxx);
{
struct mc13xxx_rtc *priv = dev_get_drvdata(dev);
unsigned seconds, days;
- unsigned long s1970;
+ time64_t s1970;
int enabled, pending;
int ret;
alarm->enabled = enabled;
alarm->pending = pending;
- s1970 = days * SEC_PER_DAY + seconds;
+ s1970 = (time64_t)days * SEC_PER_DAY + seconds;
- rtc_time_to_tm(s1970, &alarm->time);
- dev_dbg(dev, "%s: %lu\n", __func__, s1970);
+ rtc_time64_to_tm(s1970, &alarm->time);
+ dev_dbg(dev, "%s: %lld\n", __func__, (long long)s1970);
return 0;
}
static int mc13xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
struct mc13xxx_rtc *priv = dev_get_drvdata(dev);
- unsigned long s1970;
- unsigned seconds, days;
+ time64_t s1970;
+ u32 seconds, days;
int ret;
mc13xxx_lock(priv->mc13xxx);
if (unlikely(ret))
goto out;
- ret = rtc_tm_to_time(&alarm->time, &s1970);
- if (unlikely(ret))
- goto out;
+ s1970 = rtc_tm_to_time64(&alarm->time);
- dev_dbg(dev, "%s: o%2.s %lu\n", __func__, alarm->enabled ? "n" : "ff",
- s1970);
+ dev_dbg(dev, "%s: o%2.s %lld\n", __func__, alarm->enabled ? "n" : "ff",
+ (long long)s1970);
ret = mc13xxx_rtc_irq_enable_unlocked(dev, alarm->enabled,
MC13XXX_IRQ_TODA);
if (unlikely(ret))
goto out;
- seconds = s1970 % SEC_PER_DAY;
- days = s1970 / SEC_PER_DAY;
+ days = div_s64_rem(s1970, SEC_PER_DAY, &seconds);
ret = mc13xxx_reg_write(priv->mc13xxx, MC13XXX_RTCDAYA, days);
if (unlikely(ret))
static const struct rtc_class_ops mc13xxx_rtc_ops = {
.read_time = mc13xxx_rtc_read_time,
- .set_mmss = mc13xxx_rtc_set_mmss,
+ .set_mmss64 = mc13xxx_rtc_set_mmss,
.read_alarm = mc13xxx_rtc_read_alarm,
.set_alarm = mc13xxx_rtc_set_alarm,
.alarm_irq_enable = mc13xxx_rtc_alarm_irq_enable,
* This function is used to obtain the RTC time or the alarm value in
* second.
*/
-static u32 get_alarm_or_time(struct device *dev, int time_alarm)
+static time64_t get_alarm_or_time(struct device *dev, int time_alarm)
{
struct platform_device *pdev = to_platform_device(dev);
struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
hr = hr_min >> 8;
min = hr_min & 0xff;
- return (((day * 24 + hr) * 60) + min) * 60 + sec;
+ return ((((time64_t)day * 24 + hr) * 60) + min) * 60 + sec;
}
/*
* This function sets the RTC alarm value or the time value.
*/
-static void set_alarm_or_time(struct device *dev, int time_alarm, u32 time)
+static void set_alarm_or_time(struct device *dev, int time_alarm, time64_t time)
{
- u32 day, hr, min, sec, temp;
+ u32 tod, day, hr, min, sec, temp;
struct platform_device *pdev = to_platform_device(dev);
struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
void __iomem *ioaddr = pdata->ioaddr;
- day = time / 86400;
- time -= day * 86400;
+ day = div_s64_rem(time, 86400, &tod);
/* time is within a day now */
- hr = time / 3600;
- time -= hr * 3600;
+ hr = tod / 3600;
+ tod -= hr * 3600;
/* time is within an hour now */
- min = time / 60;
- sec = time - min * 60;
+ min = tod / 60;
+ sec = tod - min * 60;
temp = (hr << 8) + min;
* This function updates the RTC alarm registers and then clears all the
* interrupt status bits.
*/
-static int rtc_update_alarm(struct device *dev, struct rtc_time *alrm)
+static void rtc_update_alarm(struct device *dev, struct rtc_time *alrm)
{
- struct rtc_time alarm_tm, now_tm;
- unsigned long now, time;
+ time64_t time;
struct platform_device *pdev = to_platform_device(dev);
struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
void __iomem *ioaddr = pdata->ioaddr;
- now = get_alarm_or_time(dev, MXC_RTC_TIME);
- rtc_time_to_tm(now, &now_tm);
- alarm_tm.tm_year = now_tm.tm_year;
- alarm_tm.tm_mon = now_tm.tm_mon;
- alarm_tm.tm_mday = now_tm.tm_mday;
- alarm_tm.tm_hour = alrm->tm_hour;
- alarm_tm.tm_min = alrm->tm_min;
- alarm_tm.tm_sec = alrm->tm_sec;
- rtc_tm_to_time(&alarm_tm, &time);
+ time = rtc_tm_to_time64(alrm);
/* clear all the interrupt status bits */
writew(readw(ioaddr + RTC_RTCISR), ioaddr + RTC_RTCISR);
set_alarm_or_time(dev, MXC_RTC_ALARM, time);
-
- return 0;
}
static void mxc_rtc_irq_enable(struct device *dev, unsigned int bit,
*/
static int mxc_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
- u32 val;
+ time64_t val;
/* Avoid roll-over from reading the different registers */
do {
val = get_alarm_or_time(dev, MXC_RTC_TIME);
} while (val != get_alarm_or_time(dev, MXC_RTC_TIME));
- rtc_time_to_tm(val, tm);
+ rtc_time64_to_tm(val, tm);
return 0;
}
/*
* This function sets the internal RTC time based on tm in Gregorian date.
*/
-static int mxc_rtc_set_mmss(struct device *dev, unsigned long time)
+static int mxc_rtc_set_mmss(struct device *dev, time64_t time)
{
struct platform_device *pdev = to_platform_device(dev);
struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
if (is_imx1_rtc(pdata)) {
struct rtc_time tm;
- rtc_time_to_tm(time, &tm);
+ rtc_time64_to_tm(time, &tm);
tm.tm_year = 70;
- rtc_tm_to_time(&tm, &time);
+ time = rtc_tm_to_time64(&tm);
}
/* Avoid roll-over from reading the different registers */
struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
void __iomem *ioaddr = pdata->ioaddr;
- rtc_time_to_tm(get_alarm_or_time(dev, MXC_RTC_ALARM), &alrm->time);
+ rtc_time64_to_tm(get_alarm_or_time(dev, MXC_RTC_ALARM), &alrm->time);
alrm->pending = ((readw(ioaddr + RTC_RTCISR) & RTC_ALM_BIT)) ? 1 : 0;
return 0;
{
struct platform_device *pdev = to_platform_device(dev);
struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
- int ret;
- ret = rtc_update_alarm(dev, &alrm->time);
- if (ret)
- return ret;
+ rtc_update_alarm(dev, &alrm->time);
memcpy(&pdata->g_rtc_alarm, &alrm->time, sizeof(struct rtc_time));
mxc_rtc_irq_enable(dev, RTC_ALM_BIT, alrm->enabled);
static struct rtc_class_ops mxc_rtc_ops = {
.release = mxc_rtc_release,
.read_time = mxc_rtc_read_time,
- .set_mmss = mxc_rtc_set_mmss,
+ .set_mmss64 = mxc_rtc_set_mmss,
.read_alarm = mxc_rtc_read_alarm,
.set_alarm = mxc_rtc_set_alarm,
.alarm_irq_enable = mxc_rtc_alarm_irq_enable,
unsigned int alarm0;
/* First register for alarm 1, seconds */
unsigned int alarm1;
- /* SMPL/WTSR register */
- unsigned int smpl_wtsr;
/*
* Register for update flag (UDR). Typically setting UDR field to 1
* will enable update of time or alarm register. Then it will be
.ctrl = S5M_ALARM1_CONF,
.alarm0 = S5M_ALARM0_SEC,
.alarm1 = S5M_ALARM1_SEC,
- .smpl_wtsr = S5M_WTSR_SMPL_CNTL,
.rtc_udr_update = S5M_RTC_UDR_CON,
.rtc_udr_mask = S5M_RTC_UDR_MASK,
};
.ctrl = S2MPS_RTC_CTRL,
.alarm0 = S2MPS_ALARM0_SEC,
.alarm1 = S2MPS_ALARM1_SEC,
- .smpl_wtsr = S2MPS_WTSR_SMPL_CNTL,
.rtc_udr_update = S2MPS_RTC_UDR_CON,
.rtc_udr_mask = S2MPS_RTC_WUDR_MASK,
};
int irq;
int device_type;
int rtc_24hr_mode;
- bool wtsr_smpl;
const struct s5m_rtc_reg_config *regs;
};
.alarm_irq_enable = s5m_rtc_alarm_irq_enable,
};
-static void s5m_rtc_enable_wtsr(struct s5m_rtc_info *info, bool enable)
-{
- int ret;
- ret = regmap_update_bits(info->regmap, info->regs->smpl_wtsr,
- WTSR_ENABLE_MASK,
- enable ? WTSR_ENABLE_MASK : 0);
- if (ret < 0)
- dev_err(info->dev, "%s: fail to update WTSR reg(%d)\n",
- __func__, ret);
-}
-
-static void s5m_rtc_enable_smpl(struct s5m_rtc_info *info, bool enable)
-{
- int ret;
- ret = regmap_update_bits(info->regmap, info->regs->smpl_wtsr,
- SMPL_ENABLE_MASK,
- enable ? SMPL_ENABLE_MASK : 0);
- if (ret < 0)
- dev_err(info->dev, "%s: fail to update SMPL reg(%d)\n",
- __func__, ret);
-}
-
static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
{
u8 data[2];
info->dev = &pdev->dev;
info->s5m87xx = s5m87xx;
info->device_type = s5m87xx->device_type;
- info->wtsr_smpl = s5m87xx->wtsr_smpl;
if (s5m87xx->irq_data) {
info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq);
ret = s5m8767_rtc_init_reg(info);
- if (info->wtsr_smpl) {
- s5m_rtc_enable_wtsr(info, true);
- s5m_rtc_enable_smpl(info, true);
- }
-
device_init_wakeup(&pdev->dev, 1);
info->rtc_dev = devm_rtc_device_register(&pdev->dev, "s5m-rtc",
return ret;
}
-static void s5m_rtc_shutdown(struct platform_device *pdev)
-{
- struct s5m_rtc_info *info = platform_get_drvdata(pdev);
- int i;
- unsigned int val = 0;
- if (info->wtsr_smpl) {
- for (i = 0; i < 3; i++) {
- s5m_rtc_enable_wtsr(info, false);
- regmap_read(info->regmap, info->regs->smpl_wtsr, &val);
- pr_debug("%s: WTSR_SMPL reg(0x%02x)\n", __func__, val);
- if (val & WTSR_ENABLE_MASK)
- pr_emerg("%s: fail to disable WTSR\n",
- __func__);
- else {
- pr_info("%s: success to disable WTSR\n",
- __func__);
- break;
- }
- }
- }
- /* Disable SMPL when power off */
- s5m_rtc_enable_smpl(info, false);
-}
-
static int s5m_rtc_remove(struct platform_device *pdev)
{
struct s5m_rtc_info *info = platform_get_drvdata(pdev);
- /* Perform also all shutdown steps when removing */
- s5m_rtc_shutdown(pdev);
i2c_unregister_device(info->i2c);
return 0;
},
.probe = s5m_rtc_probe,
.remove = s5m_rtc_remove,
- .shutdown = s5m_rtc_shutdown,
.id_table = s5m_rtc_id,
};
#include <linux/rtc.h>
#include <linux/platform_device.h>
+static int test_mmss64;
+module_param(test_mmss64, int, 0644);
+MODULE_PARM_DESC(test_mmss64, "Test struct rtc_class_ops.set_mmss64().");
+
static struct platform_device *test0 = NULL, *test1 = NULL;
static int test_rtc_read_alarm(struct device *dev,
static int test_rtc_read_time(struct device *dev,
struct rtc_time *tm)
{
- rtc_time_to_tm(get_seconds(), tm);
+ rtc_time64_to_tm(ktime_get_real_seconds(), tm);
+ return 0;
+}
+
+static int test_rtc_set_mmss64(struct device *dev, time64_t secs)
+{
+ dev_info(dev, "%s, secs = %lld\n", __func__, (long long)secs);
return 0;
}
return 0;
}
-static const struct rtc_class_ops test_rtc_ops = {
+static struct rtc_class_ops test_rtc_ops = {
.proc = test_rtc_proc,
.read_time = test_rtc_read_time,
.read_alarm = test_rtc_read_alarm,
int err;
struct rtc_device *rtc;
+ if (test_mmss64) {
+ test_rtc_ops.set_mmss64 = test_rtc_set_mmss64;
+ test_rtc_ops.set_mmss = NULL;
+ }
+
rtc = devm_rtc_device_register(&plat_dev->dev, "test",
&test_rtc_ops, THIS_MODULE);
if (IS_ERR(rtc)) {
* rtc_set_ntp_time - Save NTP synchronized time to the RTC
* @now: Current time of day
*
- * Replacement for the NTP platform function update_persistent_clock
+ * Replacement for the NTP platform function update_persistent_clock64
* that stores time for later retrieval by rtc_hctosys.
*
* Returns 0 on successful RTC update, -ENODEV if a RTC update is not
if (rtc) {
/* rtc_hctosys exclusively uses UTC, so we call set_time here,
* not set_mmss. */
- if (rtc->ops && (rtc->ops->set_time || rtc->ops->set_mmss))
+ if (rtc->ops &&
+ (rtc->ops->set_time ||
+ rtc->ops->set_mmss64 ||
+ rtc->ops->set_mmss))
err = rtc_set_time(rtc, &tm);
rtc_class_close(rtc);
}
return ZFCP_ERP_FAILED;
if (mempool_resize(act->adapter->pool.sr_data,
- act->adapter->stat_read_buf_num, GFP_KERNEL))
+ act->adapter->stat_read_buf_num))
return ZFCP_ERP_FAILED;
if (mempool_resize(act->adapter->pool.status_read_req,
- act->adapter->stat_read_buf_num, GFP_KERNEL))
+ act->adapter->stat_read_buf_num))
return ZFCP_ERP_FAILED;
atomic_set(&act->adapter->stat_miss, act->adapter->stat_read_buf_num);
beiscsi_log(phba, KERN_WARNING,
BEISCSI_LOG_INIT | BEISCSI_LOG_EH |
BEISCSI_LOG_CONFIG,
- "BC_%d : Insufficent Buffer Error "
+ "BC_%d : Insufficient Buffer Error "
"Resp_Len : %d Actual_Resp_Len : %d\n",
mbx_resp_hdr->response_length,
mbx_resp_hdr->actual_resp_len);
hba_free:
if (phba->msix_enabled)
pci_disable_msix(phba->pcidev);
- iscsi_host_remove(phba->shost);
pci_dev_put(phba->pcidev);
iscsi_host_free(phba->shost);
+ pci_set_drvdata(pcidev, NULL);
disable_pci:
pci_disable_device(pcidev);
return ret;
ch->firsts[CHET_DT],
ch->counts[CHET_DT]);
} else {
- VPRINTK(KERN_INFO, "reading element address assigment page failed!\n");
+ VPRINTK(KERN_INFO, "reading element address assignment page failed!\n");
}
/* vendor specific element types */
if (unlikely(len > sizeof(odi->systemid))) {
OSD_ERR("OSD Target error: OSD_SYSTEM_ID too long(%d). "
- "device idetification might not work\n", len);
+ "device identification might not work\n", len);
len = sizeof(odi->systemid);
}
odi->systemid_len = len;
blob = qla2x00_request_firmware(vha);
if (!blob) {
ql_log(ql_log_info, vha, 0x0083,
- "Fimware image unavailable.\n");
+ "Firmware image unavailable.\n");
ql_log(ql_log_info, vha, 0x0084,
"Firmware images can be retrieved from: "QLA_FW_URL ".\n");
return QLA_FUNCTION_FAILED;
blob = qla2x00_request_firmware(vha);
if (!blob) {
ql_log(ql_log_warn, vha, 0x0090,
- "Fimware image unavailable.\n");
+ "Firmware image unavailable.\n");
ql_log(ql_log_warn, vha, 0x0091,
"Firmware images can be retrieved from: "
QLA_FW_URL ".\n");
rsp->msix = &ha->msix_entries[que_id + 1];
else
ql_log(ql_log_warn, base_vha, 0x00e3,
- "MSIX not enalbled.\n");
+ "MSIX not enabled.\n");
ha->rsp_q_map[que_id] = rsp;
rsp->rid = rid;
if (off == ADDR_ERROR) {
ql_log(ql_log_fatal, vha, 0x0116,
- "Unknow addr: 0x%08lx.\n", buf[i].addr);
+ "Unknown addr: 0x%08lx.\n", buf[i].addr);
continue;
}
}
ha->flags.cpu_affinity_enabled = 1;
ql_dbg(ql_dbg_multiq, vha, 0xc007,
- "CPU affinity mode enalbed, "
+ "CPU affinity mode enabled, "
"no. of response queues:%d no. of request queues:%d.\n",
ha->max_rsp_queues, ha->max_req_queues);
ql_dbg(ql_dbg_init, vha, 0x00e9,
- "CPU affinity mode enalbed, "
+ "CPU affinity mode enabled, "
"no. of response queues:%d no. of request queues:%d.\n",
ha->max_rsp_queues, ha->max_req_queues);
}
break;
default:
ql_log(ql_log_warn, base_vha, 0xb05f,
- "Unknow work-code=0x%x.\n", work_code);
+ "Unknown work-code=0x%x.\n", work_code);
}
return;
break;
default:
ql_log(ql_log_warn, base_vha, 0xb071,
- "Unknow Device State: %x.\n", dev_state);
+ "Unknown Device State: %x.\n", dev_state);
qla83xx_idc_unlock(base_vha, 0);
qla8xxx_dev_failed_handler(base_vha);
rval = QLA_FUNCTION_FAILED;
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/jiffies.h>
+#include <asm/unaligned.h>
#include <scsi/scsi.h>
#include <scsi/scsi_cmnd.h>
}
}
EXPORT_SYMBOL(scsi_build_sense_buffer);
+
+/**
+ * scsi_set_sense_information - set the information field in a
+ * formatted sense data buffer
+ * @buf: Where to build sense data
+ * @info: 64-bit information value to be set
+ *
+ **/
+void scsi_set_sense_information(u8 *buf, u64 info)
+{
+ if ((buf[0] & 0x7f) == 0x72) {
+ u8 *ucp, len;
+
+ len = buf[7];
+ ucp = (char *)scsi_sense_desc_find(buf, len + 8, 0);
+ if (!ucp) {
+ buf[7] = len + 0xa;
+ ucp = buf + 8 + len;
+ }
+ ucp[0] = 0;
+ ucp[1] = 0xa;
+ ucp[2] = 0x80; /* Valid bit */
+ ucp[3] = 0;
+ put_unaligned_be64(info, &ucp[4]);
+ } else if ((buf[0] & 0x7f) == 0x70) {
+ buf[0] |= 0x80;
+ put_unaligned_be64(info, &buf[3]);
+ }
+}
+EXPORT_SYMBOL(scsi_set_sense_information);
"rejecting I/O to dead device\n");
ret = BLKPREP_KILL;
break;
- case SDEV_QUIESCE:
case SDEV_BLOCK:
case SDEV_CREATED_BLOCK:
+ ret = BLKPREP_DEFER;
+ break;
+ case SDEV_QUIESCE:
/*
* If the devices is blocked we defer normal commands.
*/
#include <linux/sched.h>
#include <linux/string.h>
#include <linux/mm.h>
-#include <linux/aio.h>
#include <linux/errno.h>
#include <linux/mtio.h>
#include <linux/ioctl.h>
#include <linux/mutex.h>
#include <linux/atomic.h>
#include <linux/ratelimit.h>
+#include <linux/uio.h>
#include "scsi.h"
#include <scsi/scsi_dbg.h>
}
if (iov_count) {
- int size = sizeof(struct iovec) * iov_count;
- struct iovec *iov;
+ struct iovec *iov = NULL;
struct iov_iter i;
- iov = memdup_user(hp->dxferp, size);
- if (IS_ERR(iov))
- return PTR_ERR(iov);
+ res = import_iovec(rw, hp->dxferp, iov_count, 0, &iov, &i);
+ if (res < 0)
+ return res;
- iov_iter_init(&i, rw, iov, iov_count,
- min_t(size_t, hp->dxfer_len,
- iov_length(iov, iov_count)));
+ iov_iter_truncate(&i, hp->dxfer_len);
res = blk_rq_map_user_iov(q, rq, md, &i, GFP_ATOMIC);
kfree(iov);
static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
int ua)
{
- int ret = 0;
- struct regulator *reg = vreg->reg;
- const char *name = vreg->name;
+ int ret;
- BUG_ON(!vreg);
+ if (!vreg)
+ return 0;
- ret = regulator_set_optimum_mode(reg, ua);
- if (ret >= 0) {
- /*
- * regulator_set_optimum_mode() returns new regulator
- * mode upon success.
- */
- ret = 0;
- } else {
- dev_err(dev, "%s: %s set optimum mode(ua=%d) failed, err=%d\n",
- __func__, name, ua, ret);
+ ret = regulator_set_load(vreg->reg, ua);
+ if (ret < 0) {
+ dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
+ __func__, vreg->name, ua, ret);
}
return ret;
static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
struct ufs_vreg *vreg)
{
- if (!vreg)
- return 0;
-
return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
}
static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
struct ufs_vreg *vreg)
{
- if (!vreg)
- return 0;
-
return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
}
config SPI_CADENCE
tristate "Cadence SPI controller"
- depends on ARM
help
This selects the Cadence SPI controller master driver
- used by Xilinx Zynq.
+ used by Xilinx Zynq and ZynqMP.
config SPI_CLPS711X
tristate "CLPS711X host SPI controller"
config SPI_DW_MID_DMA
bool "DMA support for DW SPI controller on Intel MID platform"
- depends on SPI_DW_PCI && INTEL_MID_DMAC
+ depends on SPI_DW_PCI && DW_DMAC_PCI
config SPI_DW_MMIO
tristate "Memory-mapped io interface driver for DW SPI core"
| SPI_BF(name, value))
/* Register access macros */
+#ifdef CONFIG_AVR32
#define spi_readl(port, reg) \
__raw_readl((port)->regs + SPI_##reg)
#define spi_writel(port, reg, value) \
__raw_writel((value), (port)->regs + SPI_##reg)
-
+#else
+#define spi_readl(port, reg) \
+ readl_relaxed((port)->regs + SPI_##reg)
+#define spi_writel(port, reg, value) \
+ writel_relaxed((value), (port)->regs + SPI_##reg)
+#endif
/* use PIO for small transfers, avoiding DMA setup/teardown overhead and
* cache operations; better heuristics consider wordsize and bitrate.
*/
*
* Copyright (C) 2012 Chris Boot
* Copyright (C) 2013 Stephen Warren
+ * Copyright (C) 2015 Martin Sperl
*
* This driver is inspired by:
* spi-ath79.c, Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_irq.h>
+#include <linux/of_gpio.h>
#include <linux/of_device.h>
#include <linux/spi/spi.h>
#define BCM2835_SPI_CS_CS_10 0x00000002
#define BCM2835_SPI_CS_CS_01 0x00000001
-#define BCM2835_SPI_TIMEOUT_MS 30000
-#define BCM2835_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_NO_CS)
+#define BCM2835_SPI_POLLING_LIMIT_US 30
+#define BCM2835_SPI_TIMEOUT_MS 30000
+#define BCM2835_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH \
+ | SPI_NO_CS | SPI_3WIRE)
#define DRV_NAME "spi-bcm2835"
void __iomem *regs;
struct clk *clk;
int irq;
- struct completion done;
const u8 *tx_buf;
u8 *rx_buf;
- int len;
+ int tx_len;
+ int rx_len;
};
static inline u32 bcm2835_rd(struct bcm2835_spi *bs, unsigned reg)
writel(val, bs->regs + reg);
}
-static inline void bcm2835_rd_fifo(struct bcm2835_spi *bs, int len)
+static inline void bcm2835_rd_fifo(struct bcm2835_spi *bs)
{
u8 byte;
- while (len--) {
+ while ((bs->rx_len) &&
+ (bcm2835_rd(bs, BCM2835_SPI_CS) & BCM2835_SPI_CS_RXD)) {
byte = bcm2835_rd(bs, BCM2835_SPI_FIFO);
if (bs->rx_buf)
*bs->rx_buf++ = byte;
+ bs->rx_len--;
}
}
-static inline void bcm2835_wr_fifo(struct bcm2835_spi *bs, int len)
+static inline void bcm2835_wr_fifo(struct bcm2835_spi *bs)
{
u8 byte;
- if (len > bs->len)
- len = bs->len;
-
- while (len--) {
+ while ((bs->tx_len) &&
+ (bcm2835_rd(bs, BCM2835_SPI_CS) & BCM2835_SPI_CS_TXD)) {
byte = bs->tx_buf ? *bs->tx_buf++ : 0;
bcm2835_wr(bs, BCM2835_SPI_FIFO, byte);
- bs->len--;
+ bs->tx_len--;
}
}
+static void bcm2835_spi_reset_hw(struct spi_master *master)
+{
+ struct bcm2835_spi *bs = spi_master_get_devdata(master);
+ u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS);
+
+ /* Disable SPI interrupts and transfer */
+ cs &= ~(BCM2835_SPI_CS_INTR |
+ BCM2835_SPI_CS_INTD |
+ BCM2835_SPI_CS_TA);
+ /* and reset RX/TX FIFOS */
+ cs |= BCM2835_SPI_CS_CLEAR_RX | BCM2835_SPI_CS_CLEAR_TX;
+
+ /* and reset the SPI_HW */
+ bcm2835_wr(bs, BCM2835_SPI_CS, cs);
+}
+
static irqreturn_t bcm2835_spi_interrupt(int irq, void *dev_id)
{
struct spi_master *master = dev_id;
struct bcm2835_spi *bs = spi_master_get_devdata(master);
- u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS);
- /*
- * RXR - RX needs Reading. This means 12 (or more) bytes have been
- * transmitted and hence 12 (or more) bytes have been received.
- *
- * The FIFO is 16-bytes deep. We check for this interrupt to keep the
- * FIFO full; we have a 4-byte-time buffer for IRQ latency. We check
- * this before DONE (TX empty) just in case we delayed processing this
- * interrupt for some reason.
- *
- * We only check for this case if we have more bytes to TX; at the end
- * of the transfer, we ignore this pipelining optimization, and let
- * bcm2835_spi_finish_transfer() drain the RX FIFO.
+ /* Read as many bytes as possible from FIFO */
+ bcm2835_rd_fifo(bs);
+ /* Write as many bytes as possible to FIFO */
+ bcm2835_wr_fifo(bs);
+
+ /* based on flags decide if we can finish the transfer */
+ if (bcm2835_rd(bs, BCM2835_SPI_CS) & BCM2835_SPI_CS_DONE) {
+ /* Transfer complete - reset SPI HW */
+ bcm2835_spi_reset_hw(master);
+ /* wake up the framework */
+ complete(&master->xfer_completion);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static int bcm2835_spi_transfer_one_poll(struct spi_master *master,
+ struct spi_device *spi,
+ struct spi_transfer *tfr,
+ u32 cs,
+ unsigned long xfer_time_us)
+{
+ struct bcm2835_spi *bs = spi_master_get_devdata(master);
+ unsigned long timeout = jiffies +
+ max(4 * xfer_time_us * HZ / 1000000, 2uL);
+
+ /* enable HW block without interrupts */
+ bcm2835_wr(bs, BCM2835_SPI_CS, cs | BCM2835_SPI_CS_TA);
+
+ /* set timeout to 4x the expected time, or 2 jiffies */
+ /* loop until finished the transfer */
+ while (bs->rx_len) {
+ /* read from fifo as much as possible */
+ bcm2835_rd_fifo(bs);
+ /* fill in tx fifo as much as possible */
+ bcm2835_wr_fifo(bs);
+ /* if we still expect some data after the read,
+ * check for a possible timeout
+ */
+ if (bs->rx_len && time_after(jiffies, timeout)) {
+ /* Transfer complete - reset SPI HW */
+ bcm2835_spi_reset_hw(master);
+ /* and return timeout */
+ return -ETIMEDOUT;
+ }
+ }
+
+ /* Transfer complete - reset SPI HW */
+ bcm2835_spi_reset_hw(master);
+ /* and return without waiting for completion */
+ return 0;
+}
+
+static int bcm2835_spi_transfer_one_irq(struct spi_master *master,
+ struct spi_device *spi,
+ struct spi_transfer *tfr,
+ u32 cs)
+{
+ struct bcm2835_spi *bs = spi_master_get_devdata(master);
+
+ /* fill in fifo if we have gpio-cs
+ * note that there have been rare events where the native-CS
+ * flapped for <1us which may change the behaviour
+ * with gpio-cs this does not happen, so it is implemented
+ * only for this case
*/
- if (bs->len && (cs & BCM2835_SPI_CS_RXR)) {
- /* Read 12 bytes of data */
- bcm2835_rd_fifo(bs, 12);
-
- /* Write up to 12 bytes */
- bcm2835_wr_fifo(bs, 12);
-
- /*
- * We must have written something to the TX FIFO due to the
- * bs->len check above, so cannot be DONE. Hence, return
- * early. Note that DONE could also be set if we serviced an
- * RXR interrupt really late.
+ if (gpio_is_valid(spi->cs_gpio)) {
+ /* enable HW block, but without interrupts enabled
+ * this would triggern an immediate interrupt
*/
- return IRQ_HANDLED;
+ bcm2835_wr(bs, BCM2835_SPI_CS,
+ cs | BCM2835_SPI_CS_TA);
+ /* fill in tx fifo as much as possible */
+ bcm2835_wr_fifo(bs);
}
/*
- * DONE - TX empty. This occurs when we first enable the transfer
- * since we do not pre-fill the TX FIFO. At any other time, given that
- * we refill the TX FIFO above based on RXR, and hence ignore DONE if
- * RXR is set, DONE really does mean end-of-transfer.
+ * Enable the HW block. This will immediately trigger a DONE (TX
+ * empty) interrupt, upon which we will fill the TX FIFO with the
+ * first TX bytes. Pre-filling the TX FIFO here to avoid the
+ * interrupt doesn't work:-(
*/
- if (cs & BCM2835_SPI_CS_DONE) {
- if (bs->len) { /* First interrupt in a transfer */
- bcm2835_wr_fifo(bs, 16);
- } else { /* Transfer complete */
- /* Disable SPI interrupts */
- cs &= ~(BCM2835_SPI_CS_INTR | BCM2835_SPI_CS_INTD);
- bcm2835_wr(bs, BCM2835_SPI_CS, cs);
-
- /*
- * Wake up bcm2835_spi_transfer_one(), which will call
- * bcm2835_spi_finish_transfer(), to drain the RX FIFO.
- */
- complete(&bs->done);
- }
-
- return IRQ_HANDLED;
- }
+ cs |= BCM2835_SPI_CS_INTR | BCM2835_SPI_CS_INTD | BCM2835_SPI_CS_TA;
+ bcm2835_wr(bs, BCM2835_SPI_CS, cs);
- return IRQ_NONE;
+ /* signal that we need to wait for completion */
+ return 1;
}
-static int bcm2835_spi_start_transfer(struct spi_device *spi,
- struct spi_transfer *tfr)
+static int bcm2835_spi_transfer_one(struct spi_master *master,
+ struct spi_device *spi,
+ struct spi_transfer *tfr)
{
- struct bcm2835_spi *bs = spi_master_get_devdata(spi->master);
+ struct bcm2835_spi *bs = spi_master_get_devdata(master);
unsigned long spi_hz, clk_hz, cdiv;
- u32 cs = BCM2835_SPI_CS_INTR | BCM2835_SPI_CS_INTD | BCM2835_SPI_CS_TA;
+ unsigned long spi_used_hz, xfer_time_us;
+ u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS);
+ /* set clock */
spi_hz = tfr->speed_hz;
clk_hz = clk_get_rate(bs->clk);
if (spi_hz >= clk_hz / 2) {
cdiv = 2; /* clk_hz/2 is the fastest we can go */
} else if (spi_hz) {
- /* CDIV must be a power of two */
- cdiv = roundup_pow_of_two(DIV_ROUND_UP(clk_hz, spi_hz));
+ /* CDIV must be a multiple of two */
+ cdiv = DIV_ROUND_UP(clk_hz, spi_hz);
+ cdiv += (cdiv % 2);
if (cdiv >= 65536)
cdiv = 0; /* 0 is the slowest we can go */
- } else
+ } else {
cdiv = 0; /* 0 is the slowest we can go */
+ }
+ spi_used_hz = cdiv ? (clk_hz / cdiv) : (clk_hz / 65536);
+ bcm2835_wr(bs, BCM2835_SPI_CLK, cdiv);
+ /* handle all the modes */
+ if ((spi->mode & SPI_3WIRE) && (tfr->rx_buf))
+ cs |= BCM2835_SPI_CS_REN;
if (spi->mode & SPI_CPOL)
cs |= BCM2835_SPI_CS_CPOL;
if (spi->mode & SPI_CPHA)
cs |= BCM2835_SPI_CS_CPHA;
- if (!(spi->mode & SPI_NO_CS)) {
- if (spi->mode & SPI_CS_HIGH) {
- cs |= BCM2835_SPI_CS_CSPOL;
- cs |= BCM2835_SPI_CS_CSPOL0 << spi->chip_select;
- }
-
- cs |= spi->chip_select;
- }
+ /* for gpio_cs set dummy CS so that no HW-CS get changed
+ * we can not run this in bcm2835_spi_set_cs, as it does
+ * not get called for cs_gpio cases, so we need to do it here
+ */
+ if (gpio_is_valid(spi->cs_gpio) || (spi->mode & SPI_NO_CS))
+ cs |= BCM2835_SPI_CS_CS_10 | BCM2835_SPI_CS_CS_01;
- reinit_completion(&bs->done);
+ /* set transmit buffers and length */
bs->tx_buf = tfr->tx_buf;
bs->rx_buf = tfr->rx_buf;
- bs->len = tfr->len;
+ bs->tx_len = tfr->len;
+ bs->rx_len = tfr->len;
- bcm2835_wr(bs, BCM2835_SPI_CLK, cdiv);
- /*
- * Enable the HW block. This will immediately trigger a DONE (TX
- * empty) interrupt, upon which we will fill the TX FIFO with the
- * first TX bytes. Pre-filling the TX FIFO here to avoid the
- * interrupt doesn't work:-(
- */
- bcm2835_wr(bs, BCM2835_SPI_CS, cs);
+ /* calculate the estimated time in us the transfer runs */
+ xfer_time_us = tfr->len
+ * 9 /* clocks/byte - SPI-HW waits 1 clock after each byte */
+ * 1000000 / spi_used_hz;
- return 0;
+ /* for short requests run polling*/
+ if (xfer_time_us <= BCM2835_SPI_POLLING_LIMIT_US)
+ return bcm2835_spi_transfer_one_poll(master, spi, tfr,
+ cs, xfer_time_us);
+
+ return bcm2835_spi_transfer_one_irq(master, spi, tfr, cs);
}
-static int bcm2835_spi_finish_transfer(struct spi_device *spi,
- struct spi_transfer *tfr, bool cs_change)
+static void bcm2835_spi_handle_err(struct spi_master *master,
+ struct spi_message *msg)
{
- struct bcm2835_spi *bs = spi_master_get_devdata(spi->master);
- u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS);
+ bcm2835_spi_reset_hw(master);
+}
+
+static void bcm2835_spi_set_cs(struct spi_device *spi, bool gpio_level)
+{
+ /*
+ * we can assume that we are "native" as per spi_set_cs
+ * calling us ONLY when cs_gpio is not set
+ * we can also assume that we are CS < 3 as per bcm2835_spi_setup
+ * we would not get called because of error handling there.
+ * the level passed is the electrical level not enabled/disabled
+ * so it has to get translated back to enable/disable
+ * see spi_set_cs in spi.c for the implementation
+ */
- /* Drain RX FIFO */
- while (cs & BCM2835_SPI_CS_RXD) {
- bcm2835_rd_fifo(bs, 1);
- cs = bcm2835_rd(bs, BCM2835_SPI_CS);
+ struct spi_master *master = spi->master;
+ struct bcm2835_spi *bs = spi_master_get_devdata(master);
+ u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS);
+ bool enable;
+
+ /* calculate the enable flag from the passed gpio_level */
+ enable = (spi->mode & SPI_CS_HIGH) ? gpio_level : !gpio_level;
+
+ /* set flags for "reverse" polarity in the registers */
+ if (spi->mode & SPI_CS_HIGH) {
+ /* set the correct CS-bits */
+ cs |= BCM2835_SPI_CS_CSPOL;
+ cs |= BCM2835_SPI_CS_CSPOL0 << spi->chip_select;
+ } else {
+ /* clean the CS-bits */
+ cs &= ~BCM2835_SPI_CS_CSPOL;
+ cs &= ~(BCM2835_SPI_CS_CSPOL0 << spi->chip_select);
}
- if (tfr->delay_usecs)
- udelay(tfr->delay_usecs);
+ /* select the correct chip_select depending on disabled/enabled */
+ if (enable) {
+ /* set cs correctly */
+ if (spi->mode & SPI_NO_CS) {
+ /* use the "undefined" chip-select */
+ cs |= BCM2835_SPI_CS_CS_10 | BCM2835_SPI_CS_CS_01;
+ } else {
+ /* set the chip select */
+ cs &= ~(BCM2835_SPI_CS_CS_10 | BCM2835_SPI_CS_CS_01);
+ cs |= spi->chip_select;
+ }
+ } else {
+ /* disable CSPOL which puts HW-CS into deselected state */
+ cs &= ~BCM2835_SPI_CS_CSPOL;
+ /* use the "undefined" chip-select as precaution */
+ cs |= BCM2835_SPI_CS_CS_10 | BCM2835_SPI_CS_CS_01;
+ }
- if (cs_change)
- /* Clear TA flag */
- bcm2835_wr(bs, BCM2835_SPI_CS, cs & ~BCM2835_SPI_CS_TA);
+ /* finally set the calculated flags in SPI_CS */
+ bcm2835_wr(bs, BCM2835_SPI_CS, cs);
+}
- return 0;
+static int chip_match_name(struct gpio_chip *chip, void *data)
+{
+ return !strcmp(chip->label, data);
}
-static int bcm2835_spi_transfer_one(struct spi_master *master,
- struct spi_message *mesg)
+static int bcm2835_spi_setup(struct spi_device *spi)
{
- struct bcm2835_spi *bs = spi_master_get_devdata(master);
- struct spi_transfer *tfr;
- struct spi_device *spi = mesg->spi;
- int err = 0;
- unsigned int timeout;
- bool cs_change;
-
- list_for_each_entry(tfr, &mesg->transfers, transfer_list) {
- err = bcm2835_spi_start_transfer(spi, tfr);
- if (err)
- goto out;
-
- timeout = wait_for_completion_timeout(&bs->done,
- msecs_to_jiffies(BCM2835_SPI_TIMEOUT_MS));
- if (!timeout) {
- err = -ETIMEDOUT;
- goto out;
- }
+ int err;
+ struct gpio_chip *chip;
+ /*
+ * sanity checking the native-chipselects
+ */
+ if (spi->mode & SPI_NO_CS)
+ return 0;
+ if (gpio_is_valid(spi->cs_gpio))
+ return 0;
+ if (spi->chip_select > 1) {
+ /* error in the case of native CS requested with CS > 1
+ * officially there is a CS2, but it is not documented
+ * which GPIO is connected with that...
+ */
+ dev_err(&spi->dev,
+ "setup: only two native chip-selects are supported\n");
+ return -EINVAL;
+ }
+ /* now translate native cs to GPIO */
- cs_change = tfr->cs_change ||
- list_is_last(&tfr->transfer_list, &mesg->transfers);
+ /* get the gpio chip for the base */
+ chip = gpiochip_find("pinctrl-bcm2835", chip_match_name);
+ if (!chip)
+ return 0;
- err = bcm2835_spi_finish_transfer(spi, tfr, cs_change);
- if (err)
- goto out;
+ /* and calculate the real CS */
+ spi->cs_gpio = chip->base + 8 - spi->chip_select;
- mesg->actual_length += (tfr->len - bs->len);
- }
+ /* and set up the "mode" and level */
+ dev_info(&spi->dev, "setting up native-CS%i as GPIO %i\n",
+ spi->chip_select, spi->cs_gpio);
-out:
- /* Clear FIFOs, and disable the HW block */
- bcm2835_wr(bs, BCM2835_SPI_CS,
- BCM2835_SPI_CS_CLEAR_RX | BCM2835_SPI_CS_CLEAR_TX);
- mesg->status = err;
- spi_finalize_current_message(master);
+ /* set up GPIO as output and pull to the correct level */
+ err = gpio_direction_output(spi->cs_gpio,
+ (spi->mode & SPI_CS_HIGH) ? 0 : 1);
+ if (err) {
+ dev_err(&spi->dev,
+ "could not set CS%i gpio %i as output: %i",
+ spi->chip_select, spi->cs_gpio, err);
+ return err;
+ }
+ /* the implementation of pinctrl-bcm2835 currently does not
+ * set the GPIO value when using gpio_direction_output
+ * so we are setting it here explicitly
+ */
+ gpio_set_value(spi->cs_gpio, (spi->mode & SPI_CS_HIGH) ? 0 : 1);
return 0;
}
master->mode_bits = BCM2835_SPI_MODE_BITS;
master->bits_per_word_mask = SPI_BPW_MASK(8);
master->num_chipselect = 3;
- master->transfer_one_message = bcm2835_spi_transfer_one;
+ master->setup = bcm2835_spi_setup;
+ master->set_cs = bcm2835_spi_set_cs;
+ master->transfer_one = bcm2835_spi_transfer_one;
+ master->handle_err = bcm2835_spi_handle_err;
master->dev.of_node = pdev->dev.of_node;
bs = spi_master_get_devdata(master);
- init_completion(&bs->done);
-
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
bs->regs = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(bs->regs)) {
clk_prepare_enable(bs->clk);
err = devm_request_irq(&pdev->dev, bs->irq, bcm2835_spi_interrupt, 0,
- dev_name(&pdev->dev), master);
+ dev_name(&pdev->dev), master);
if (err) {
dev_err(&pdev->dev, "could not request IRQ: %d\n", err);
goto out_clk_disable;
}
- /* initialise the hardware */
+ /* initialise the hardware with the default polarities */
bcm2835_wr(bs, BCM2835_SPI_CS,
BCM2835_SPI_CS_CLEAR_RX | BCM2835_SPI_CS_CLEAR_TX);
u32 tmp;
/* SPE bit has to be 0 before we read MSPI STATUS */
- deadline = jiffies + BCM53XXSPI_SPE_TIMEOUT_MS * HZ / 1000;
+ deadline = jiffies + msecs_to_jiffies(BCM53XXSPI_SPE_TIMEOUT_MS);
do {
tmp = bcm53xxspi_read(b53spi, B53SPI_MSPI_SPCR2);
if (!(tmp & B53SPI_MSPI_SPCR2_SPE))
goto spi_timeout;
/* Check status */
- deadline = jiffies + timeout_ms * HZ / 1000;
+ deadline = jiffies + msecs_to_jiffies(timeout_ms);
do {
tmp = bcm53xxspi_read(b53spi, B53SPI_MSPI_MSPI_STATUS);
if (tmp & B53SPI_MSPI_MSPI_STATUS_SPIF) {
struct spi_transfer *previous = NULL;
struct bfin_spi_slave_data *chip = NULL;
unsigned int bits_per_word;
- u16 cr, cr_width, dma_width, dma_config;
+ u16 cr, cr_width = 0, dma_width, dma_config;
u32 tranf_success = 1;
u8 full_duplex = 0;
} else if (bits_per_word == 8) {
drv_data->n_bytes = bits_per_word/8;
drv_data->len = transfer->len;
- cr_width = 0;
drv_data->ops = &bfin_bfin_spi_transfer_ops_u8;
}
cr = bfin_read(&drv_data->regs->ctl) & ~(BIT_CTL_TIMOD | BIT_CTL_WORDSIZE);
{
/* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */
+ bool oldbit = !(word & 1);
/* clock starts at inactive polarity */
for (word <<= (32 - bits); likely(bits); bits--) {
/* setup MSB (to slave) on trailing edge */
- if ((flags & SPI_MASTER_NO_TX) == 0)
- setmosi(spi, word & (1 << 31));
+ if ((flags & SPI_MASTER_NO_TX) == 0) {
+ if ((word & (1 << 31)) != oldbit) {
+ setmosi(spi, word & (1 << 31));
+ oldbit = word & (1 << 31);
+ }
+ }
spidelay(nsecs); /* T(setup) */
setsck(spi, !cpol);
{
/* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */
+ bool oldbit = !(word & (1 << 31));
/* clock starts at inactive polarity */
for (word <<= (32 - bits); likely(bits); bits--) {
/* setup MSB (to slave) on leading edge */
setsck(spi, !cpol);
- if ((flags & SPI_MASTER_NO_TX) == 0)
- setmosi(spi, word & (1 << 31));
+ if ((flags & SPI_MASTER_NO_TX) == 0) {
+ if ((word & (1 << 31)) != oldbit) {
+ setmosi(spi, word & (1 << 31));
+ oldbit = word & (1 << 31);
+ }
+ }
spidelay(nsecs); /* T(setup) */
setsck(spi, cpol);
#include "spi-dw.h"
#ifdef CONFIG_SPI_DW_MID_DMA
-#include <linux/intel_mid_dma.h>
#include <linux/pci.h>
+#include <linux/platform_data/dma-dw.h>
#define RX_BUSY 0
#define TX_BUSY 1
-struct mid_dma {
- struct intel_mid_dma_slave dmas_tx;
- struct intel_mid_dma_slave dmas_rx;
-};
+static struct dw_dma_slave mid_dma_tx = { .dst_id = 1 };
+static struct dw_dma_slave mid_dma_rx = { .src_id = 0 };
static bool mid_spi_dma_chan_filter(struct dma_chan *chan, void *param)
{
- struct dw_spi *dws = param;
+ struct dw_dma_slave *s = param;
+
+ if (s->dma_dev != chan->device->dev)
+ return false;
- return dws->dma_dev == chan->device->dev;
+ chan->private = s;
+ return true;
}
static int mid_spi_dma_init(struct dw_spi *dws)
{
- struct mid_dma *dw_dma = dws->dma_priv;
struct pci_dev *dma_dev;
- struct intel_mid_dma_slave *rxs, *txs;
+ struct dw_dma_slave *tx = dws->dma_tx;
+ struct dw_dma_slave *rx = dws->dma_rx;
dma_cap_mask_t mask;
/*
if (!dma_dev)
return -ENODEV;
- dws->dma_dev = &dma_dev->dev;
-
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
/* 1. Init rx channel */
- dws->rxchan = dma_request_channel(mask, mid_spi_dma_chan_filter, dws);
+ rx->dma_dev = &dma_dev->dev;
+ dws->rxchan = dma_request_channel(mask, mid_spi_dma_chan_filter, rx);
if (!dws->rxchan)
goto err_exit;
- rxs = &dw_dma->dmas_rx;
- rxs->hs_mode = LNW_DMA_HW_HS;
- rxs->cfg_mode = LNW_DMA_PER_TO_MEM;
- dws->rxchan->private = rxs;
+ dws->master->dma_rx = dws->rxchan;
/* 2. Init tx channel */
- dws->txchan = dma_request_channel(mask, mid_spi_dma_chan_filter, dws);
+ tx->dma_dev = &dma_dev->dev;
+ dws->txchan = dma_request_channel(mask, mid_spi_dma_chan_filter, tx);
if (!dws->txchan)
goto free_rxchan;
- txs = &dw_dma->dmas_tx;
- txs->hs_mode = LNW_DMA_HW_HS;
- txs->cfg_mode = LNW_DMA_MEM_TO_PER;
- dws->txchan->private = txs;
+ dws->master->dma_tx = dws->txchan;
dws->dma_inited = 1;
return 0;
dma_release_channel(dws->rxchan);
}
+static irqreturn_t dma_transfer(struct dw_spi *dws)
+{
+ u16 irq_status = dw_readl(dws, DW_SPI_ISR);
+
+ if (!irq_status)
+ return IRQ_NONE;
+
+ dw_readl(dws, DW_SPI_ICR);
+ spi_reset_chip(dws);
+
+ dev_err(&dws->master->dev, "%s: FIFO overrun/underrun\n", __func__);
+ dws->master->cur_msg->status = -EIO;
+ spi_finalize_current_transfer(dws->master);
+ return IRQ_HANDLED;
+}
+
+static bool mid_spi_can_dma(struct spi_master *master, struct spi_device *spi,
+ struct spi_transfer *xfer)
+{
+ struct dw_spi *dws = spi_master_get_devdata(master);
+
+ if (!dws->dma_inited)
+ return false;
+
+ return xfer->len > dws->fifo_len;
+}
+
+static enum dma_slave_buswidth convert_dma_width(u32 dma_width) {
+ if (dma_width == 1)
+ return DMA_SLAVE_BUSWIDTH_1_BYTE;
+ else if (dma_width == 2)
+ return DMA_SLAVE_BUSWIDTH_2_BYTES;
+
+ return DMA_SLAVE_BUSWIDTH_UNDEFINED;
+}
+
/*
* dws->dma_chan_busy is set before the dma transfer starts, callback for tx
* channel will clear a corresponding bit.
clear_bit(TX_BUSY, &dws->dma_chan_busy);
if (test_bit(RX_BUSY, &dws->dma_chan_busy))
return;
- dw_spi_xfer_done(dws);
+ spi_finalize_current_transfer(dws->master);
}
-static struct dma_async_tx_descriptor *dw_spi_dma_prepare_tx(struct dw_spi *dws)
+static struct dma_async_tx_descriptor *dw_spi_dma_prepare_tx(struct dw_spi *dws,
+ struct spi_transfer *xfer)
{
struct dma_slave_config txconf;
struct dma_async_tx_descriptor *txdesc;
- if (!dws->tx_dma)
+ if (!xfer->tx_buf)
return NULL;
txconf.direction = DMA_MEM_TO_DEV;
txconf.dst_addr = dws->dma_addr;
- txconf.dst_maxburst = LNW_DMA_MSIZE_16;
+ txconf.dst_maxburst = 16;
txconf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
- txconf.dst_addr_width = dws->dma_width;
+ txconf.dst_addr_width = convert_dma_width(dws->dma_width);
txconf.device_fc = false;
dmaengine_slave_config(dws->txchan, &txconf);
- memset(&dws->tx_sgl, 0, sizeof(dws->tx_sgl));
- dws->tx_sgl.dma_address = dws->tx_dma;
- dws->tx_sgl.length = dws->len;
-
txdesc = dmaengine_prep_slave_sg(dws->txchan,
- &dws->tx_sgl,
- 1,
+ xfer->tx_sg.sgl,
+ xfer->tx_sg.nents,
DMA_MEM_TO_DEV,
DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
if (!txdesc)
clear_bit(RX_BUSY, &dws->dma_chan_busy);
if (test_bit(TX_BUSY, &dws->dma_chan_busy))
return;
- dw_spi_xfer_done(dws);
+ spi_finalize_current_transfer(dws->master);
}
-static struct dma_async_tx_descriptor *dw_spi_dma_prepare_rx(struct dw_spi *dws)
+static struct dma_async_tx_descriptor *dw_spi_dma_prepare_rx(struct dw_spi *dws,
+ struct spi_transfer *xfer)
{
struct dma_slave_config rxconf;
struct dma_async_tx_descriptor *rxdesc;
- if (!dws->rx_dma)
+ if (!xfer->rx_buf)
return NULL;
rxconf.direction = DMA_DEV_TO_MEM;
rxconf.src_addr = dws->dma_addr;
- rxconf.src_maxburst = LNW_DMA_MSIZE_16;
+ rxconf.src_maxburst = 16;
rxconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
- rxconf.src_addr_width = dws->dma_width;
+ rxconf.src_addr_width = convert_dma_width(dws->dma_width);
rxconf.device_fc = false;
dmaengine_slave_config(dws->rxchan, &rxconf);
- memset(&dws->rx_sgl, 0, sizeof(dws->rx_sgl));
- dws->rx_sgl.dma_address = dws->rx_dma;
- dws->rx_sgl.length = dws->len;
-
rxdesc = dmaengine_prep_slave_sg(dws->rxchan,
- &dws->rx_sgl,
- 1,
+ xfer->rx_sg.sgl,
+ xfer->rx_sg.nents,
DMA_DEV_TO_MEM,
DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
if (!rxdesc)
return rxdesc;
}
-static void dw_spi_dma_setup(struct dw_spi *dws)
+static int mid_spi_dma_setup(struct dw_spi *dws, struct spi_transfer *xfer)
{
u16 dma_ctrl = 0;
- spi_enable_chip(dws, 0);
+ dw_writel(dws, DW_SPI_DMARDLR, 0xf);
+ dw_writel(dws, DW_SPI_DMATDLR, 0x10);
- dw_writew(dws, DW_SPI_DMARDLR, 0xf);
- dw_writew(dws, DW_SPI_DMATDLR, 0x10);
-
- if (dws->tx_dma)
+ if (xfer->tx_buf)
dma_ctrl |= SPI_DMA_TDMAE;
- if (dws->rx_dma)
+ if (xfer->rx_buf)
dma_ctrl |= SPI_DMA_RDMAE;
- dw_writew(dws, DW_SPI_DMACR, dma_ctrl);
+ dw_writel(dws, DW_SPI_DMACR, dma_ctrl);
+
+ /* Set the interrupt mask */
+ spi_umask_intr(dws, SPI_INT_TXOI | SPI_INT_RXUI | SPI_INT_RXOI);
- spi_enable_chip(dws, 1);
+ dws->transfer_handler = dma_transfer;
+
+ return 0;
}
-static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change)
+static int mid_spi_dma_transfer(struct dw_spi *dws, struct spi_transfer *xfer)
{
struct dma_async_tx_descriptor *txdesc, *rxdesc;
- /* 1. setup DMA related registers */
- if (cs_change)
- dw_spi_dma_setup(dws);
+ /* Prepare the TX dma transfer */
+ txdesc = dw_spi_dma_prepare_tx(dws, xfer);
- /* 2. Prepare the TX dma transfer */
- txdesc = dw_spi_dma_prepare_tx(dws);
-
- /* 3. Prepare the RX dma transfer */
- rxdesc = dw_spi_dma_prepare_rx(dws);
+ /* Prepare the RX dma transfer */
+ rxdesc = dw_spi_dma_prepare_rx(dws, xfer);
/* rx must be started before tx due to spi instinct */
if (rxdesc) {
return 0;
}
+static void mid_spi_dma_stop(struct dw_spi *dws)
+{
+ if (test_bit(TX_BUSY, &dws->dma_chan_busy)) {
+ dmaengine_terminate_all(dws->txchan);
+ clear_bit(TX_BUSY, &dws->dma_chan_busy);
+ }
+ if (test_bit(RX_BUSY, &dws->dma_chan_busy)) {
+ dmaengine_terminate_all(dws->rxchan);
+ clear_bit(RX_BUSY, &dws->dma_chan_busy);
+ }
+}
+
static struct dw_spi_dma_ops mid_dma_ops = {
.dma_init = mid_spi_dma_init,
.dma_exit = mid_spi_dma_exit,
+ .dma_setup = mid_spi_dma_setup,
+ .can_dma = mid_spi_can_dma,
.dma_transfer = mid_spi_dma_transfer,
+ .dma_stop = mid_spi_dma_stop,
};
#endif
iounmap(clk_reg);
#ifdef CONFIG_SPI_DW_MID_DMA
- dws->dma_priv = kzalloc(sizeof(struct mid_dma), GFP_KERNEL);
- if (!dws->dma_priv)
- return -ENOMEM;
+ dws->dma_tx = &mid_dma_tx;
+ dws->dma_rx = &mid_dma_rx;
dws->dma_ops = &mid_dma_ops;
#endif
return 0;
#include <linux/debugfs.h>
#endif
-#define START_STATE ((void *)0)
-#define RUNNING_STATE ((void *)1)
-#define DONE_STATE ((void *)2)
-#define ERROR_STATE ((void *)-1)
-
/* Slave spi_dev related */
struct chip_data {
u16 cr0;
}
#endif /* CONFIG_DEBUG_FS */
+static void dw_spi_set_cs(struct spi_device *spi, bool enable)
+{
+ struct dw_spi *dws = spi_master_get_devdata(spi->master);
+ struct chip_data *chip = spi_get_ctldata(spi);
+
+ /* Chip select logic is inverted from spi_set_cs() */
+ if (chip && chip->cs_control)
+ chip->cs_control(!enable);
+
+ if (!enable)
+ dw_writel(dws, DW_SPI_SER, BIT(spi->chip_select));
+}
+
/* Return the max entries we can fill into tx fifo */
static inline u32 tx_max(struct dw_spi *dws)
{
u32 tx_left, tx_room, rxtx_gap;
tx_left = (dws->tx_end - dws->tx) / dws->n_bytes;
- tx_room = dws->fifo_len - dw_readw(dws, DW_SPI_TXFLR);
+ tx_room = dws->fifo_len - dw_readl(dws, DW_SPI_TXFLR);
/*
* Another concern is about the tx/rx mismatch, we
{
u32 rx_left = (dws->rx_end - dws->rx) / dws->n_bytes;
- return min_t(u32, rx_left, dw_readw(dws, DW_SPI_RXFLR));
+ return min_t(u32, rx_left, dw_readl(dws, DW_SPI_RXFLR));
}
static void dw_writer(struct dw_spi *dws)
else
txw = *(u16 *)(dws->tx);
}
- dw_writew(dws, DW_SPI_DR, txw);
+ dw_writel(dws, DW_SPI_DR, txw);
dws->tx += dws->n_bytes;
}
}
u16 rxw;
while (max--) {
- rxw = dw_readw(dws, DW_SPI_DR);
+ rxw = dw_readl(dws, DW_SPI_DR);
/* Care rx only if the transfer's original "rx" is not null */
if (dws->rx_end - dws->len) {
if (dws->n_bytes == 1)
}
}
-static void *next_transfer(struct dw_spi *dws)
-{
- struct spi_message *msg = dws->cur_msg;
- struct spi_transfer *trans = dws->cur_transfer;
-
- /* Move to next transfer */
- if (trans->transfer_list.next != &msg->transfers) {
- dws->cur_transfer =
- list_entry(trans->transfer_list.next,
- struct spi_transfer,
- transfer_list);
- return RUNNING_STATE;
- }
-
- return DONE_STATE;
-}
-
-/*
- * Note: first step is the protocol driver prepares
- * a dma-capable memory, and this func just need translate
- * the virt addr to physical
- */
-static int map_dma_buffers(struct dw_spi *dws)
-{
- if (!dws->cur_msg->is_dma_mapped
- || !dws->dma_inited
- || !dws->cur_chip->enable_dma
- || !dws->dma_ops)
- return 0;
-
- if (dws->cur_transfer->tx_dma)
- dws->tx_dma = dws->cur_transfer->tx_dma;
-
- if (dws->cur_transfer->rx_dma)
- dws->rx_dma = dws->cur_transfer->rx_dma;
-
- return 1;
-}
-
-/* Caller already set message->status; dma and pio irqs are blocked */
-static void giveback(struct dw_spi *dws)
-{
- struct spi_transfer *last_transfer;
- struct spi_message *msg;
-
- msg = dws->cur_msg;
- dws->cur_msg = NULL;
- dws->cur_transfer = NULL;
- dws->prev_chip = dws->cur_chip;
- dws->cur_chip = NULL;
- dws->dma_mapped = 0;
-
- last_transfer = list_last_entry(&msg->transfers, struct spi_transfer,
- transfer_list);
-
- if (!last_transfer->cs_change)
- spi_chip_sel(dws, msg->spi, 0);
-
- spi_finalize_current_message(dws->master);
-}
-
static void int_error_stop(struct dw_spi *dws, const char *msg)
{
- /* Stop the hw */
- spi_enable_chip(dws, 0);
+ spi_reset_chip(dws);
dev_err(&dws->master->dev, "%s\n", msg);
- dws->cur_msg->state = ERROR_STATE;
- tasklet_schedule(&dws->pump_transfers);
+ dws->master->cur_msg->status = -EIO;
+ spi_finalize_current_transfer(dws->master);
}
-void dw_spi_xfer_done(struct dw_spi *dws)
-{
- /* Update total byte transferred return count actual bytes read */
- dws->cur_msg->actual_length += dws->len;
-
- /* Move to next transfer */
- dws->cur_msg->state = next_transfer(dws);
-
- /* Handle end of message */
- if (dws->cur_msg->state == DONE_STATE) {
- dws->cur_msg->status = 0;
- giveback(dws);
- } else
- tasklet_schedule(&dws->pump_transfers);
-}
-EXPORT_SYMBOL_GPL(dw_spi_xfer_done);
-
static irqreturn_t interrupt_transfer(struct dw_spi *dws)
{
- u16 irq_status = dw_readw(dws, DW_SPI_ISR);
+ u16 irq_status = dw_readl(dws, DW_SPI_ISR);
/* Error handling */
if (irq_status & (SPI_INT_TXOI | SPI_INT_RXOI | SPI_INT_RXUI)) {
- dw_readw(dws, DW_SPI_TXOICR);
- dw_readw(dws, DW_SPI_RXOICR);
- dw_readw(dws, DW_SPI_RXUICR);
+ dw_readl(dws, DW_SPI_ICR);
int_error_stop(dws, "interrupt_transfer: fifo overrun/underrun");
return IRQ_HANDLED;
}
dw_reader(dws);
if (dws->rx_end == dws->rx) {
spi_mask_intr(dws, SPI_INT_TXEI);
- dw_spi_xfer_done(dws);
+ spi_finalize_current_transfer(dws->master);
return IRQ_HANDLED;
}
if (irq_status & SPI_INT_TXEI) {
static irqreturn_t dw_spi_irq(int irq, void *dev_id)
{
- struct dw_spi *dws = dev_id;
- u16 irq_status = dw_readw(dws, DW_SPI_ISR) & 0x3f;
+ struct spi_master *master = dev_id;
+ struct dw_spi *dws = spi_master_get_devdata(master);
+ u16 irq_status = dw_readl(dws, DW_SPI_ISR) & 0x3f;
if (!irq_status)
return IRQ_NONE;
- if (!dws->cur_msg) {
+ if (!master->cur_msg) {
spi_mask_intr(dws, SPI_INT_TXEI);
return IRQ_HANDLED;
}
}
/* Must be called inside pump_transfers() */
-static void poll_transfer(struct dw_spi *dws)
+static int poll_transfer(struct dw_spi *dws)
{
do {
dw_writer(dws);
cpu_relax();
} while (dws->rx_end > dws->rx);
- dw_spi_xfer_done(dws);
+ return 0;
}
-static void pump_transfers(unsigned long data)
+static int dw_spi_transfer_one(struct spi_master *master,
+ struct spi_device *spi, struct spi_transfer *transfer)
{
- struct dw_spi *dws = (struct dw_spi *)data;
- struct spi_message *message = NULL;
- struct spi_transfer *transfer = NULL;
- struct spi_transfer *previous = NULL;
- struct spi_device *spi = NULL;
- struct chip_data *chip = NULL;
- u8 bits = 0;
+ struct dw_spi *dws = spi_master_get_devdata(master);
+ struct chip_data *chip = spi_get_ctldata(spi);
u8 imask = 0;
- u8 cs_change = 0;
- u16 txint_level = 0;
+ u16 txlevel = 0;
u16 clk_div = 0;
u32 speed = 0;
u32 cr0 = 0;
+ int ret;
- /* Get current state information */
- message = dws->cur_msg;
- transfer = dws->cur_transfer;
- chip = dws->cur_chip;
- spi = message->spi;
-
- if (message->state == ERROR_STATE) {
- message->status = -EIO;
- goto early_exit;
- }
-
- /* Handle end of message */
- if (message->state == DONE_STATE) {
- message->status = 0;
- goto early_exit;
- }
-
- /* Delay if requested at end of transfer */
- if (message->state == RUNNING_STATE) {
- previous = list_entry(transfer->transfer_list.prev,
- struct spi_transfer,
- transfer_list);
- if (previous->delay_usecs)
- udelay(previous->delay_usecs);
- }
-
+ dws->dma_mapped = 0;
dws->n_bytes = chip->n_bytes;
dws->dma_width = chip->dma_width;
- dws->cs_control = chip->cs_control;
- dws->rx_dma = transfer->rx_dma;
- dws->tx_dma = transfer->tx_dma;
dws->tx = (void *)transfer->tx_buf;
dws->tx_end = dws->tx + transfer->len;
dws->rx = transfer->rx_buf;
dws->rx_end = dws->rx + transfer->len;
- dws->len = dws->cur_transfer->len;
- if (chip != dws->prev_chip)
- cs_change = 1;
+ dws->len = transfer->len;
+
+ spi_enable_chip(dws, 0);
cr0 = chip->cr0;
if (transfer->speed_hz) {
speed = chip->speed_hz;
- if ((transfer->speed_hz != speed) || (!chip->clk_div)) {
+ if ((transfer->speed_hz != speed) || !chip->clk_div) {
speed = transfer->speed_hz;
/* clk_div doesn't support odd number */
- clk_div = dws->max_freq / speed;
- clk_div = (clk_div + 1) & 0xfffe;
+ clk_div = (dws->max_freq / speed + 1) & 0xfffe;
chip->speed_hz = speed;
chip->clk_div = clk_div;
+
+ spi_set_clk(dws, chip->clk_div);
}
}
if (transfer->bits_per_word) {
- bits = transfer->bits_per_word;
- dws->n_bytes = dws->dma_width = bits >> 3;
- cr0 = (bits - 1)
+ if (transfer->bits_per_word == 8) {
+ dws->n_bytes = 1;
+ dws->dma_width = 1;
+ } else if (transfer->bits_per_word == 16) {
+ dws->n_bytes = 2;
+ dws->dma_width = 2;
+ }
+ cr0 = (transfer->bits_per_word - 1)
| (chip->type << SPI_FRF_OFFSET)
| (spi->mode << SPI_MODE_OFFSET)
| (chip->tmode << SPI_TMOD_OFFSET);
}
- message->state = RUNNING_STATE;
/*
* Adjust transfer mode if necessary. Requires platform dependent
* chipselect mechanism.
*/
- if (dws->cs_control) {
+ if (chip->cs_control) {
if (dws->rx && dws->tx)
chip->tmode = SPI_TMOD_TR;
else if (dws->rx)
cr0 |= (chip->tmode << SPI_TMOD_OFFSET);
}
+ dw_writel(dws, DW_SPI_CTRL0, cr0);
+
/* Check if current transfer is a DMA transaction */
- dws->dma_mapped = map_dma_buffers(dws);
+ if (master->can_dma && master->can_dma(master, spi, transfer))
+ dws->dma_mapped = master->cur_msg_mapped;
+
+ /* For poll mode just disable all interrupts */
+ spi_mask_intr(dws, 0xff);
/*
* Interrupt mode
* we only need set the TXEI IRQ, as TX/RX always happen syncronizely
*/
- if (!dws->dma_mapped && !chip->poll_mode) {
- int templen = dws->len / dws->n_bytes;
-
- txint_level = dws->fifo_len / 2;
- txint_level = (templen > txint_level) ? txint_level : templen;
+ if (dws->dma_mapped) {
+ ret = dws->dma_ops->dma_setup(dws, transfer);
+ if (ret < 0) {
+ spi_enable_chip(dws, 1);
+ return ret;
+ }
+ } else if (!chip->poll_mode) {
+ txlevel = min_t(u16, dws->fifo_len / 2, dws->len / dws->n_bytes);
+ dw_writel(dws, DW_SPI_TXFLTR, txlevel);
+ /* Set the interrupt mask */
imask |= SPI_INT_TXEI | SPI_INT_TXOI |
SPI_INT_RXUI | SPI_INT_RXOI;
+ spi_umask_intr(dws, imask);
+
dws->transfer_handler = interrupt_transfer;
}
- /*
- * Reprogram registers only if
- * 1. chip select changes
- * 2. clk_div is changed
- * 3. control value changes
- */
- if (dw_readw(dws, DW_SPI_CTRL0) != cr0 || cs_change || clk_div || imask) {
- spi_enable_chip(dws, 0);
-
- if (dw_readw(dws, DW_SPI_CTRL0) != cr0)
- dw_writew(dws, DW_SPI_CTRL0, cr0);
-
- spi_set_clk(dws, clk_div ? clk_div : chip->clk_div);
- spi_chip_sel(dws, spi, 1);
-
- /* Set the interrupt mask, for poll mode just disable all int */
- spi_mask_intr(dws, 0xff);
- if (imask)
- spi_umask_intr(dws, imask);
- if (txint_level)
- dw_writew(dws, DW_SPI_TXFLTR, txint_level);
+ spi_enable_chip(dws, 1);
- spi_enable_chip(dws, 1);
- if (cs_change)
- dws->prev_chip = chip;
+ if (dws->dma_mapped) {
+ ret = dws->dma_ops->dma_transfer(dws, transfer);
+ if (ret < 0)
+ return ret;
}
- if (dws->dma_mapped)
- dws->dma_ops->dma_transfer(dws, cs_change);
-
if (chip->poll_mode)
- poll_transfer(dws);
-
- return;
+ return poll_transfer(dws);
-early_exit:
- giveback(dws);
+ return 1;
}
-static int dw_spi_transfer_one_message(struct spi_master *master,
+static void dw_spi_handle_err(struct spi_master *master,
struct spi_message *msg)
{
struct dw_spi *dws = spi_master_get_devdata(master);
- dws->cur_msg = msg;
- /* Initial message state */
- dws->cur_msg->state = START_STATE;
- dws->cur_transfer = list_entry(dws->cur_msg->transfers.next,
- struct spi_transfer,
- transfer_list);
- dws->cur_chip = spi_get_ctldata(dws->cur_msg->spi);
-
- /* Launch transfers */
- tasklet_schedule(&dws->pump_transfers);
+ if (dws->dma_mapped)
+ dws->dma_ops->dma_stop(dws);
- return 0;
+ spi_reset_chip(dws);
}
/* This may be called twice for each spi dev */
chip->rx_threshold = 0;
chip->tx_threshold = 0;
-
- chip->enable_dma = chip_info->enable_dma;
}
if (spi->bits_per_word == 8) {
/* Restart the controller, disable all interrupts, clean rx fifo */
static void spi_hw_init(struct device *dev, struct dw_spi *dws)
{
- spi_enable_chip(dws, 0);
- spi_mask_intr(dws, 0xff);
- spi_enable_chip(dws, 1);
+ spi_reset_chip(dws);
/*
* Try to detect the FIFO depth if not set by interface driver,
u32 fifo;
for (fifo = 1; fifo < 256; fifo++) {
- dw_writew(dws, DW_SPI_TXFLTR, fifo);
- if (fifo != dw_readw(dws, DW_SPI_TXFLTR))
+ dw_writel(dws, DW_SPI_TXFLTR, fifo);
+ if (fifo != dw_readl(dws, DW_SPI_TXFLTR))
break;
}
- dw_writew(dws, DW_SPI_TXFLTR, 0);
+ dw_writel(dws, DW_SPI_TXFLTR, 0);
dws->fifo_len = (fifo == 1) ? 0 : fifo;
dev_dbg(dev, "Detected FIFO size: %u bytes\n", dws->fifo_len);
dws->master = master;
dws->type = SSI_MOTO_SPI;
- dws->prev_chip = NULL;
dws->dma_inited = 0;
dws->dma_addr = (dma_addr_t)(dws->paddr + 0x60);
snprintf(dws->name, sizeof(dws->name), "dw_spi%d", dws->bus_num);
ret = devm_request_irq(dev, dws->irq, dw_spi_irq, IRQF_SHARED,
- dws->name, dws);
+ dws->name, master);
if (ret < 0) {
dev_err(&master->dev, "can not get IRQ\n");
goto err_free_master;
master->num_chipselect = dws->num_cs;
master->setup = dw_spi_setup;
master->cleanup = dw_spi_cleanup;
- master->transfer_one_message = dw_spi_transfer_one_message;
+ master->set_cs = dw_spi_set_cs;
+ master->transfer_one = dw_spi_transfer_one;
+ master->handle_err = dw_spi_handle_err;
master->max_speed_hz = dws->max_freq;
master->dev.of_node = dev->of_node;
if (ret) {
dev_warn(dev, "DMA init failed\n");
dws->dma_inited = 0;
+ } else {
+ master->can_dma = dws->dma_ops->can_dma;
}
}
- tasklet_init(&dws->pump_transfers, pump_transfers, (unsigned long)dws);
-
spi_master_set_devdata(master, dws);
ret = devm_spi_register_master(dev, master);
if (ret) {
struct dw_spi_dma_ops {
int (*dma_init)(struct dw_spi *dws);
void (*dma_exit)(struct dw_spi *dws);
- int (*dma_transfer)(struct dw_spi *dws, int cs_change);
+ int (*dma_setup)(struct dw_spi *dws, struct spi_transfer *xfer);
+ bool (*can_dma)(struct spi_master *master, struct spi_device *spi,
+ struct spi_transfer *xfer);
+ int (*dma_transfer)(struct dw_spi *dws, struct spi_transfer *xfer);
+ void (*dma_stop)(struct dw_spi *dws);
};
struct dw_spi {
struct spi_master *master;
- struct spi_device *cur_dev;
enum dw_ssi_type type;
char name[16];
u16 bus_num;
u16 num_cs; /* supported slave numbers */
- /* Message Transfer pump */
- struct tasklet_struct pump_transfers;
-
/* Current message transfer state info */
- struct spi_message *cur_msg;
- struct spi_transfer *cur_transfer;
- struct chip_data *cur_chip;
- struct chip_data *prev_chip;
size_t len;
void *tx;
void *tx_end;
void *rx;
void *rx_end;
int dma_mapped;
- dma_addr_t rx_dma;
- dma_addr_t tx_dma;
- size_t rx_map_len;
- size_t tx_map_len;
u8 n_bytes; /* current is a 1/2 bytes op */
- u8 max_bits_per_word; /* maxim is 16b */
u32 dma_width;
irqreturn_t (*transfer_handler)(struct dw_spi *dws);
- void (*cs_control)(u32 command);
- /* Dma info */
+ /* DMA info */
int dma_inited;
struct dma_chan *txchan;
- struct scatterlist tx_sgl;
struct dma_chan *rxchan;
- struct scatterlist rx_sgl;
unsigned long dma_chan_busy;
- struct device *dma_dev;
dma_addr_t dma_addr; /* phy address of the Data register */
struct dw_spi_dma_ops *dma_ops;
- void *dma_priv; /* platform relate info */
+ void *dma_tx;
+ void *dma_rx;
/* Bus interface info */
void *priv;
__raw_writel(val, dws->regs + offset);
}
-static inline u16 dw_readw(struct dw_spi *dws, u32 offset)
-{
- return __raw_readw(dws->regs + offset);
-}
-
-static inline void dw_writew(struct dw_spi *dws, u32 offset, u16 val)
-{
- __raw_writew(val, dws->regs + offset);
-}
-
static inline void spi_enable_chip(struct dw_spi *dws, int enable)
{
dw_writel(dws, DW_SPI_SSIENR, (enable ? 1 : 0));
dw_writel(dws, DW_SPI_BAUDR, div);
}
-static inline void spi_chip_sel(struct dw_spi *dws, struct spi_device *spi,
- int active)
-{
- u16 cs = spi->chip_select;
- int gpio_val = active ? (spi->mode & SPI_CS_HIGH) :
- !(spi->mode & SPI_CS_HIGH);
-
- if (dws->cs_control)
- dws->cs_control(active);
- if (gpio_is_valid(spi->cs_gpio))
- gpio_set_value(spi->cs_gpio, gpio_val);
-
- if (active)
- dw_writel(dws, DW_SPI_SER, 1 << cs);
-}
-
/* Disable IRQ bits */
static inline void spi_mask_intr(struct dw_spi *dws, u32 mask)
{
dw_writel(dws, DW_SPI_IMR, new_mask);
}
+/*
+ * This does disable the SPI controller, interrupts, and re-enable the
+ * controller back. Transmit and receive FIFO buffers are cleared when the
+ * device is disabled.
+ */
+static inline void spi_reset_chip(struct dw_spi *dws)
+{
+ spi_enable_chip(dws, 0);
+ spi_mask_intr(dws, 0xff);
+ spi_enable_chip(dws, 1);
+}
+
/*
* Each SPI slave device to work with dw_api controller should
- * has such a structure claiming its working mode (PIO/DMA etc),
+ * has such a structure claiming its working mode (poll or PIO/DMA),
* which can be save in the "controller_data" member of the
* struct spi_device.
*/
struct dw_spi_chip {
u8 poll_mode; /* 1 for controller polling mode */
u8 type; /* SPI/SSP/MicroWire */
- u8 enable_dma;
void (*cs_control)(u32 command);
};
extern void dw_spi_remove_host(struct dw_spi *dws);
extern int dw_spi_suspend_host(struct dw_spi *dws);
extern int dw_spi_resume_host(struct dw_spi *dws);
-extern void dw_spi_xfer_done(struct dw_spi *dws);
/* platform related setup */
extern int dw_spi_mid_init(struct dw_spi *dws); /* Intel MID platforms */
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
+#include <linux/math64.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/sched.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_bitbang.h>
+#include <linux/time.h>
#define DRIVER_NAME "fsl-dspi"
#define SPI_CTAR_CPOL(x) ((x) << 26)
#define SPI_CTAR_CPHA(x) ((x) << 25)
#define SPI_CTAR_LSBFE(x) ((x) << 24)
-#define SPI_CTAR_PCSSCR(x) (((x) & 0x00000003) << 22)
+#define SPI_CTAR_PCSSCK(x) (((x) & 0x00000003) << 22)
#define SPI_CTAR_PASC(x) (((x) & 0x00000003) << 20)
#define SPI_CTAR_PDT(x) (((x) & 0x00000003) << 18)
#define SPI_CTAR_PBR(x) (((x) & 0x00000003) << 16)
#define SPI_CTAR_ASC(x) (((x) & 0x0000000f) << 8)
#define SPI_CTAR_DT(x) (((x) & 0x0000000f) << 4)
#define SPI_CTAR_BR(x) ((x) & 0x0000000f)
+#define SPI_CTAR_SCALE_BITS 0xf
#define SPI_CTAR0_SLAVE 0x0c
16, 32, 64, 128,
256, 512, 1024, 2048,
4096, 8192, 16384, 32768 };
- int temp, i = 0, j = 0;
+ int scale_needed, scale, minscale = INT_MAX;
+ int i, j;
+
+ scale_needed = clkrate / speed_hz;
+ if (clkrate % speed_hz)
+ scale_needed++;
+
+ for (i = 0; i < ARRAY_SIZE(brs); i++)
+ for (j = 0; j < ARRAY_SIZE(pbr_tbl); j++) {
+ scale = brs[i] * pbr_tbl[j];
+ if (scale >= scale_needed) {
+ if (scale < minscale) {
+ minscale = scale;
+ *br = i;
+ *pbr = j;
+ }
+ break;
+ }
+ }
- temp = clkrate / 2 / speed_hz;
+ if (minscale == INT_MAX) {
+ pr_warn("Can not find valid baud rate,speed_hz is %d,clkrate is %ld, we use the max prescaler value.\n",
+ speed_hz, clkrate);
+ *pbr = ARRAY_SIZE(pbr_tbl) - 1;
+ *br = ARRAY_SIZE(brs) - 1;
+ }
+}
- for (i = 0; i < ARRAY_SIZE(pbr_tbl); i++)
- for (j = 0; j < ARRAY_SIZE(brs); j++) {
- if (pbr_tbl[i] * brs[j] >= temp) {
- *pbr = i;
- *br = j;
- return;
+static void ns_delay_scale(char *psc, char *sc, int delay_ns,
+ unsigned long clkrate)
+{
+ int pscale_tbl[4] = {1, 3, 5, 7};
+ int scale_needed, scale, minscale = INT_MAX;
+ int i, j;
+ u32 remainder;
+
+ scale_needed = div_u64_rem((u64)delay_ns * clkrate, NSEC_PER_SEC,
+ &remainder);
+ if (remainder)
+ scale_needed++;
+
+ for (i = 0; i < ARRAY_SIZE(pscale_tbl); i++)
+ for (j = 0; j <= SPI_CTAR_SCALE_BITS; j++) {
+ scale = pscale_tbl[i] * (2 << j);
+ if (scale >= scale_needed) {
+ if (scale < minscale) {
+ minscale = scale;
+ *psc = i;
+ *sc = j;
+ }
+ break;
}
}
- pr_warn("Can not find valid baud rate,speed_hz is %d,clkrate is %ld\
- ,we use the max prescaler value.\n", speed_hz, clkrate);
- *pbr = ARRAY_SIZE(pbr_tbl) - 1;
- *br = ARRAY_SIZE(brs) - 1;
+ if (minscale == INT_MAX) {
+ pr_warn("Cannot find correct scale values for %dns delay at clkrate %ld, using max prescaler value",
+ delay_ns, clkrate);
+ *psc = ARRAY_SIZE(pscale_tbl) - 1;
+ *sc = SPI_CTAR_SCALE_BITS;
+ }
}
static int dspi_transfer_write(struct fsl_dspi *dspi)
{
struct chip_data *chip;
struct fsl_dspi *dspi = spi_master_get_devdata(spi->master);
- unsigned char br = 0, pbr = 0, fmsz = 0;
+ u32 cs_sck_delay = 0, sck_cs_delay = 0;
+ unsigned char br = 0, pbr = 0, pcssck = 0, cssck = 0;
+ unsigned char pasc = 0, asc = 0, fmsz = 0;
+ unsigned long clkrate;
if ((spi->bits_per_word >= 4) && (spi->bits_per_word <= 16)) {
fmsz = spi->bits_per_word - 1;
return -ENOMEM;
}
+ of_property_read_u32(spi->dev.of_node, "fsl,spi-cs-sck-delay",
+ &cs_sck_delay);
+
+ of_property_read_u32(spi->dev.of_node, "fsl,spi-sck-cs-delay",
+ &sck_cs_delay);
+
chip->mcr_val = SPI_MCR_MASTER | SPI_MCR_PCSIS |
SPI_MCR_CLR_TXF | SPI_MCR_CLR_RXF;
chip->void_write_data = 0;
- hz_to_spi_baud(&pbr, &br,
- spi->max_speed_hz, clk_get_rate(dspi->clk));
+ clkrate = clk_get_rate(dspi->clk);
+ hz_to_spi_baud(&pbr, &br, spi->max_speed_hz, clkrate);
+
+ /* Set PCS to SCK delay scale values */
+ ns_delay_scale(&pcssck, &cssck, cs_sck_delay, clkrate);
+
+ /* Set After SCK delay scale values */
+ ns_delay_scale(&pasc, &asc, sck_cs_delay, clkrate);
chip->ctar_val = SPI_CTAR_FMSZ(fmsz)
| SPI_CTAR_CPOL(spi->mode & SPI_CPOL ? 1 : 0)
| SPI_CTAR_CPHA(spi->mode & SPI_CPHA ? 1 : 0)
| SPI_CTAR_LSBFE(spi->mode & SPI_LSB_FIRST ? 1 : 0)
+ | SPI_CTAR_PCSSCK(pcssck)
+ | SPI_CTAR_CSSCK(cssck)
+ | SPI_CTAR_PASC(pasc)
+ | SPI_CTAR_ASC(asc)
| SPI_CTAR_PBR(pbr)
| SPI_CTAR_BR(br);
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/dmaengine.h>
+#include <linux/gpio.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
spfi_writel(spfi, val, SPFI_CONTROL);
}
-static inline void spfi_stop(struct img_spfi *spfi)
-{
- u32 val;
-
- val = spfi_readl(spfi, SPFI_CONTROL);
- val &= ~SPFI_CONTROL_SPFI_EN;
- spfi_writel(spfi, val, SPFI_CONTROL);
-}
-
static inline void spfi_reset(struct img_spfi *spfi)
{
spfi_writel(spfi, SPFI_CONTROL_SOFT_RESET, SPFI_CONTROL);
- udelay(1);
spfi_writel(spfi, 0, SPFI_CONTROL);
}
-static void spfi_flush_tx_fifo(struct img_spfi *spfi)
+static int spfi_wait_all_done(struct img_spfi *spfi)
{
- unsigned long timeout = jiffies + msecs_to_jiffies(10);
+ unsigned long timeout = jiffies + msecs_to_jiffies(50);
- spfi_writel(spfi, SPFI_INTERRUPT_SDE, SPFI_INTERRUPT_CLEAR);
while (time_before(jiffies, timeout)) {
- if (spfi_readl(spfi, SPFI_INTERRUPT_STATUS) &
- SPFI_INTERRUPT_SDE)
- return;
+ u32 status = spfi_readl(spfi, SPFI_INTERRUPT_STATUS);
+
+ if (status & SPFI_INTERRUPT_ALLDONETRIG) {
+ spfi_writel(spfi, SPFI_INTERRUPT_ALLDONETRIG,
+ SPFI_INTERRUPT_CLEAR);
+ return 0;
+ }
cpu_relax();
}
- dev_err(spfi->dev, "Timed out waiting for FIFO to drain\n");
+ dev_err(spfi->dev, "Timed out waiting for transaction to complete\n");
spfi_reset(spfi);
+
+ return -ETIMEDOUT;
}
static unsigned int spfi_pio_write32(struct img_spfi *spfi, const u32 *buf,
const void *tx_buf = xfer->tx_buf;
void *rx_buf = xfer->rx_buf;
unsigned long timeout;
+ int ret;
if (tx_buf)
tx_bytes = xfer->len;
cpu_relax();
}
+ ret = spfi_wait_all_done(spfi);
+ if (ret < 0)
+ return ret;
+
if (rx_bytes > 0 || tx_bytes > 0) {
dev_err(spfi->dev, "PIO transfer timed out\n");
- spfi_reset(spfi);
return -ETIMEDOUT;
}
- if (tx_buf)
- spfi_flush_tx_fifo(spfi);
- spfi_stop(spfi);
-
return 0;
}
struct img_spfi *spfi = data;
unsigned long flags;
- spin_lock_irqsave(&spfi->lock, flags);
+ spfi_wait_all_done(spfi);
+ spin_lock_irqsave(&spfi->lock, flags);
spfi->rx_dma_busy = false;
- if (!spfi->tx_dma_busy) {
- spfi_stop(spfi);
+ if (!spfi->tx_dma_busy)
spi_finalize_current_transfer(spfi->master);
- }
-
spin_unlock_irqrestore(&spfi->lock, flags);
}
struct img_spfi *spfi = data;
unsigned long flags;
- spfi_flush_tx_fifo(spfi);
+ spfi_wait_all_done(spfi);
spin_lock_irqsave(&spfi->lock, flags);
-
spfi->tx_dma_busy = false;
- if (!spfi->rx_dma_busy) {
- spfi_stop(spfi);
+ if (!spfi->rx_dma_busy)
spi_finalize_current_transfer(spfi->master);
- }
-
spin_unlock_irqrestore(&spfi->lock, flags);
}
return -EIO;
}
+static void img_spfi_handle_err(struct spi_master *master,
+ struct spi_message *msg)
+{
+ struct img_spfi *spfi = spi_master_get_devdata(master);
+ unsigned long flags;
+
+ /*
+ * Stop all DMA and reset the controller if the previous transaction
+ * timed-out and never completed it's DMA.
+ */
+ spin_lock_irqsave(&spfi->lock, flags);
+ if (spfi->tx_dma_busy || spfi->rx_dma_busy) {
+ spfi->tx_dma_busy = false;
+ spfi->rx_dma_busy = false;
+
+ dmaengine_terminate_all(spfi->tx_ch);
+ dmaengine_terminate_all(spfi->rx_ch);
+ }
+ spin_unlock_irqrestore(&spfi->lock, flags);
+}
+
+static int img_spfi_prepare(struct spi_master *master, struct spi_message *msg)
+{
+ struct img_spfi *spfi = spi_master_get_devdata(master);
+ u32 val;
+
+ val = spfi_readl(spfi, SPFI_PORT_STATE);
+ if (msg->spi->mode & SPI_CPHA)
+ val |= SPFI_PORT_STATE_CK_PHASE(msg->spi->chip_select);
+ else
+ val &= ~SPFI_PORT_STATE_CK_PHASE(msg->spi->chip_select);
+ if (msg->spi->mode & SPI_CPOL)
+ val |= SPFI_PORT_STATE_CK_POL(msg->spi->chip_select);
+ else
+ val &= ~SPFI_PORT_STATE_CK_POL(msg->spi->chip_select);
+ spfi_writel(spfi, val, SPFI_PORT_STATE);
+
+ return 0;
+}
+
+static int img_spfi_unprepare(struct spi_master *master,
+ struct spi_message *msg)
+{
+ struct img_spfi *spfi = spi_master_get_devdata(master);
+
+ spfi_reset(spfi);
+
+ return 0;
+}
+
+static int img_spfi_setup(struct spi_device *spi)
+{
+ int ret;
+
+ ret = gpio_request_one(spi->cs_gpio, (spi->mode & SPI_CS_HIGH) ?
+ GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH,
+ dev_name(&spi->dev));
+ if (ret)
+ dev_err(&spi->dev, "can't request chipselect gpio %d\n",
+ spi->cs_gpio);
+
+ return ret;
+}
+
+static void img_spfi_cleanup(struct spi_device *spi)
+{
+ gpio_free(spi->cs_gpio);
+}
+
static void img_spfi_config(struct spi_master *master, struct spi_device *spi,
struct spi_transfer *xfer)
{
/*
* output = spfi_clk * (BITCLK / 512), where BITCLK must be a
- * power of 2 up to 256 (where 255 == 256 since BITCLK is 8 bits)
+ * power of 2 up to 128
*/
- div = DIV_ROUND_UP(master->max_speed_hz, xfer->speed_hz);
- div = clamp(512 / (1 << get_count_order(div)), 1, 255);
+ div = DIV_ROUND_UP(clk_get_rate(spfi->spfi_clk), xfer->speed_hz);
+ div = clamp(512 / (1 << get_count_order(div)), 1, 128);
val = spfi_readl(spfi, SPFI_DEVICE_PARAMETER(spi->chip_select));
val &= ~(SPFI_DEVICE_PARAMETER_BITCLK_MASK <<
val |= div << SPFI_DEVICE_PARAMETER_BITCLK_SHIFT;
spfi_writel(spfi, val, SPFI_DEVICE_PARAMETER(spi->chip_select));
+ spfi_writel(spfi, xfer->len << SPFI_TRANSACTION_TSIZE_SHIFT,
+ SPFI_TRANSACTION);
+
val = spfi_readl(spfi, SPFI_CONTROL);
val &= ~(SPFI_CONTROL_SEND_DMA | SPFI_CONTROL_GET_DMA);
if (xfer->tx_buf)
else if (xfer->tx_nbits == SPI_NBITS_QUAD &&
xfer->rx_nbits == SPI_NBITS_QUAD)
val |= SPFI_CONTROL_TMODE_QUAD << SPFI_CONTROL_TMODE_SHIFT;
- val &= ~SPFI_CONTROL_CONTINUE;
- if (!xfer->cs_change && !list_is_last(&xfer->transfer_list,
- &master->cur_msg->transfers))
- val |= SPFI_CONTROL_CONTINUE;
spfi_writel(spfi, val, SPFI_CONTROL);
-
- val = spfi_readl(spfi, SPFI_PORT_STATE);
- if (spi->mode & SPI_CPHA)
- val |= SPFI_PORT_STATE_CK_PHASE(spi->chip_select);
- else
- val &= ~SPFI_PORT_STATE_CK_PHASE(spi->chip_select);
- if (spi->mode & SPI_CPOL)
- val |= SPFI_PORT_STATE_CK_POL(spi->chip_select);
- else
- val &= ~SPFI_PORT_STATE_CK_POL(spi->chip_select);
- spfi_writel(spfi, val, SPFI_PORT_STATE);
-
- spfi_writel(spfi, xfer->len << SPFI_TRANSACTION_TSIZE_SHIFT,
- SPFI_TRANSACTION);
}
static int img_spfi_transfer_one(struct spi_master *master,
struct spi_transfer *xfer)
{
struct img_spfi *spfi = spi_master_get_devdata(spi->master);
- bool dma_reset = false;
- unsigned long flags;
int ret;
if (xfer->len > SPFI_TRANSACTION_TSIZE_MASK) {
return -EINVAL;
}
- /*
- * Stop all DMA and reset the controller if the previous transaction
- * timed-out and never completed it's DMA.
- */
- spin_lock_irqsave(&spfi->lock, flags);
- if (spfi->tx_dma_busy || spfi->rx_dma_busy) {
- dev_err(spfi->dev, "SPI DMA still busy\n");
- dma_reset = true;
- }
- spin_unlock_irqrestore(&spfi->lock, flags);
-
- if (dma_reset) {
- dmaengine_terminate_all(spfi->tx_ch);
- dmaengine_terminate_all(spfi->rx_ch);
- spfi_reset(spfi);
- }
-
img_spfi_config(master, spi, xfer);
if (master->can_dma && master->can_dma(master, spi, xfer))
ret = img_spfi_start_dma(master, spi, xfer);
return ret;
}
-static void img_spfi_set_cs(struct spi_device *spi, bool enable)
-{
- struct img_spfi *spfi = spi_master_get_devdata(spi->master);
- u32 val;
-
- val = spfi_readl(spfi, SPFI_PORT_STATE);
- val &= ~(SPFI_PORT_STATE_DEV_SEL_MASK << SPFI_PORT_STATE_DEV_SEL_SHIFT);
- val |= spi->chip_select << SPFI_PORT_STATE_DEV_SEL_SHIFT;
- spfi_writel(spfi, val, SPFI_PORT_STATE);
-}
-
static bool img_spfi_can_dma(struct spi_master *master, struct spi_device *spi,
struct spi_transfer *xfer)
{
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_TX_DUAL | SPI_RX_DUAL;
if (of_property_read_bool(spfi->dev->of_node, "img,supports-quad-mode"))
master->mode_bits |= SPI_TX_QUAD | SPI_RX_QUAD;
- master->num_chipselect = 5;
master->dev.of_node = pdev->dev.of_node;
master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(8);
- master->max_speed_hz = clk_get_rate(spfi->spfi_clk);
- master->min_speed_hz = master->max_speed_hz / 512;
+ master->max_speed_hz = clk_get_rate(spfi->spfi_clk) / 4;
+ master->min_speed_hz = clk_get_rate(spfi->spfi_clk) / 512;
- master->set_cs = img_spfi_set_cs;
+ master->setup = img_spfi_setup;
+ master->cleanup = img_spfi_cleanup;
master->transfer_one = img_spfi_transfer_one;
+ master->prepare_message = img_spfi_prepare;
+ master->unprepare_message = img_spfi_unprepare;
+ master->handle_err = img_spfi_handle_err;
spfi->tx_ch = dma_request_slave_channel(spfi->dev, "tx");
spfi->rx_ch = dma_request_slave_channel(spfi->dev, "rx");
if (spi_imx->dma_is_inited) {
dma = readl(spi_imx->base + MX51_ECSPI_DMA);
- spi_imx->tx_wml = spi_imx_get_fifosize(spi_imx) / 2;
- spi_imx->rx_wml = spi_imx_get_fifosize(spi_imx) / 2;
spi_imx->rxt_wml = spi_imx_get_fifosize(spi_imx) / 2;
rx_wml_cfg = spi_imx->rx_wml << MX51_ECSPI_DMA_RX_WML_OFFSET;
tx_wml_cfg = spi_imx->tx_wml << MX51_ECSPI_DMA_TX_WML_OFFSET;
master->max_dma_len = MAX_SDMA_BD_BYTES;
spi_imx->bitbang.master->flags = SPI_MASTER_MUST_RX |
SPI_MASTER_MUST_TX;
+ spi_imx->tx_wml = spi_imx_get_fifosize(spi_imx) / 2;
+ spi_imx->rx_wml = spi_imx_get_fifosize(spi_imx) / 2;
spi_imx->dma_is_inited = 1;
return 0;
if (tx) {
desc_tx = dmaengine_prep_slave_sg(master->dma_tx,
- tx->sgl, tx->nents, DMA_TO_DEVICE,
+ tx->sgl, tx->nents, DMA_MEM_TO_DEV,
DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
if (!desc_tx)
goto no_dma;
if (rx) {
desc_rx = dmaengine_prep_slave_sg(master->dma_rx,
- rx->sgl, rx->nents, DMA_FROM_DEVICE,
+ rx->sgl, rx->nents, DMA_DEV_TO_MEM,
DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
if (!desc_rx)
goto no_dma;
return mpc512x_psc_spi_do_remove(&op->dev);
}
-static struct of_device_id mpc512x_psc_spi_of_match[] = {
+static const struct of_device_id mpc512x_psc_spi_of_match[] = {
{ .compatible = "fsl,mpc5121-psc-spi", },
{},
};
return 0;
}
-static struct of_device_id octeon_spi_match[] = {
+static const struct of_device_id octeon_spi_match[] = {
{ .compatible = "cavium,octeon-3010-spi", },
{},
};
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/io.h>
return ret;
}
-static int omap1_spi100k_prepare_hardware(struct spi_master *master)
-{
- struct omap1_spi100k *spi100k = spi_master_get_devdata(master);
-
- clk_prepare_enable(spi100k->ick);
- clk_prepare_enable(spi100k->fck);
-
- return 0;
-}
-
static int omap1_spi100k_transfer_one_message(struct spi_master *master,
struct spi_message *m)
{
return status;
}
-static int omap1_spi100k_unprepare_hardware(struct spi_master *master)
-{
- struct omap1_spi100k *spi100k = spi_master_get_devdata(master);
-
- clk_disable_unprepare(spi100k->ick);
- clk_disable_unprepare(spi100k->fck);
-
- return 0;
-}
-
static int omap1_spi100k_probe(struct platform_device *pdev)
{
struct spi_master *master;
master->setup = omap1_spi100k_setup;
master->transfer_one_message = omap1_spi100k_transfer_one_message;
- master->prepare_transfer_hardware = omap1_spi100k_prepare_hardware;
- master->unprepare_transfer_hardware = omap1_spi100k_unprepare_hardware;
- master->cleanup = NULL;
master->num_chipselect = 2;
master->mode_bits = MODEBITS;
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
master->min_speed_hz = OMAP1_SPI100K_MAX_FREQ/(1<<16);
master->max_speed_hz = OMAP1_SPI100K_MAX_FREQ;
+ master->auto_runtime_pm = true;
spi100k = spi_master_get_devdata(master);
goto err;
}
+ status = clk_prepare_enable(spi100k->ick);
+ if (status != 0) {
+ dev_err(&pdev->dev, "failed to enable ick: %d\n", status);
+ goto err;
+ }
+
+ status = clk_prepare_enable(spi100k->fck);
+ if (status != 0) {
+ dev_err(&pdev->dev, "failed to enable fck: %d\n", status);
+ goto err_ick;
+ }
+
+ pm_runtime_enable(&pdev->dev);
+ pm_runtime_set_active(&pdev->dev);
+
status = devm_spi_register_master(&pdev->dev, master);
if (status < 0)
- goto err;
+ goto err_fck;
return status;
+err_fck:
+ clk_disable_unprepare(spi100k->fck);
+err_ick:
+ clk_disable_unprepare(spi100k->ick);
err:
spi_master_put(master);
return status;
}
+static int omap1_spi100k_remove(struct platform_device *pdev)
+{
+ struct spi_master *master = spi_master_get(platform_get_drvdata(pdev));
+ struct omap1_spi100k *spi100k = spi_master_get_devdata(master);
+
+ pm_runtime_disable(&pdev->dev);
+
+ clk_disable_unprepare(spi100k->fck);
+ clk_disable_unprepare(spi100k->ick);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int omap1_spi100k_runtime_suspend(struct device *dev)
+{
+ struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct omap1_spi100k *spi100k = spi_master_get_devdata(master);
+
+ clk_disable_unprepare(spi100k->ick);
+ clk_disable_unprepare(spi100k->fck);
+
+ return 0;
+}
+
+static int omap1_spi100k_runtime_resume(struct device *dev)
+{
+ struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct omap1_spi100k *spi100k = spi_master_get_devdata(master);
+ int ret;
+
+ ret = clk_prepare_enable(spi100k->ick);
+ if (ret != 0) {
+ dev_err(dev, "Failed to enable ick: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_prepare_enable(spi100k->fck);
+ if (ret != 0) {
+ dev_err(dev, "Failed to enable fck: %d\n", ret);
+ clk_disable_unprepare(spi100k->ick);
+ return ret;
+ }
+
+ return 0;
+}
+#endif
+
+static const struct dev_pm_ops omap1_spi100k_pm = {
+ SET_RUNTIME_PM_OPS(omap1_spi100k_runtime_suspend,
+ omap1_spi100k_runtime_resume, NULL)
+};
+
static struct platform_driver omap1_spi100k_driver = {
.driver = {
.name = "omap1_spi100k",
+ .pm = &omap1_spi100k_pm,
},
.probe = omap1_spi100k_probe,
+ .remove = omap1_spi100k_remove,
};
module_platform_driver(omap1_spi100k_driver);
#include <linux/module.h>
#include <linux/io.h>
-#include <asm/irq.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
*/
#define DEFAULT_SSP_REG_IMSC 0x0UL
#define DISABLE_ALL_INTERRUPTS DEFAULT_SSP_REG_IMSC
-#define ENABLE_ALL_INTERRUPTS (~DEFAULT_SSP_REG_IMSC)
+#define ENABLE_ALL_INTERRUPTS ( \
+ SSP_IMSC_MASK_RORIM | \
+ SSP_IMSC_MASK_RTIM | \
+ SSP_IMSC_MASK_RXIM | \
+ SSP_IMSC_MASK_TXIM \
+)
#define CLEAR_ALL_INTERRUPTS 0x3
struct pl022 *pl022 = dev_id;
struct spi_message *msg = pl022->cur_msg;
u16 irq_status = 0;
- u16 flag = 0;
if (unlikely(!msg)) {
dev_err(&pl022->adev->dev,
if (readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_RFF)
dev_err(&pl022->adev->dev,
"RXFIFO is full\n");
- if (readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_TNF)
- dev_err(&pl022->adev->dev,
- "TXFIFO is full\n");
/*
* Disable and clear interrupts, disable SSP,
readwriter(pl022);
- if ((pl022->tx == pl022->tx_end) && (flag == 0)) {
- flag = 1;
+ if (pl022->tx == pl022->tx_end) {
/* Disable Transmit interrupt, enable receive interrupt */
writew((readw(SSP_IMSC(pl022->virtbase)) &
~SSP_IMSC_MASK_TXIM) | SSP_IMSC_MASK_RXIM,
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/interrupt.h>
+#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/spi/pxa2xx_spi.h>
#include <linux/spi/spi.h>
#include <linux/pm_runtime.h>
#include <linux/acpi.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/delay.h>
-
#include "spi-pxa2xx.h"
MODULE_AUTHOR("Stephen Street");
#define LPSS_TX_LOTHRESH_DFLT 160
#define LPSS_TX_HITHRESH_DFLT 224
-struct quark_spi_rate {
- u32 bitrate;
- u32 dds_clk_rate;
- u32 clk_div;
-};
-
-/*
- * 'rate', 'dds', 'clk_div' lookup table, which is defined in
- * the Quark SPI datasheet.
- */
-static const struct quark_spi_rate quark_spi_rate_table[] = {
-/* bitrate, dds_clk_rate, clk_div */
- {50000000, 0x800000, 0},
- {40000000, 0x666666, 0},
- {25000000, 0x400000, 0},
- {20000000, 0x666666, 1},
- {16667000, 0x800000, 2},
- {13333000, 0x666666, 2},
- {12500000, 0x200000, 0},
- {10000000, 0x800000, 4},
- {8000000, 0x666666, 4},
- {6250000, 0x400000, 3},
- {5000000, 0x400000, 4},
- {4000000, 0x666666, 9},
- {3125000, 0x80000, 0},
- {2500000, 0x400000, 9},
- {2000000, 0x666666, 19},
- {1563000, 0x40000, 0},
- {1250000, 0x200000, 9},
- {1000000, 0x400000, 24},
- {800000, 0x666666, 49},
- {781250, 0x20000, 0},
- {625000, 0x200000, 19},
- {500000, 0x400000, 49},
- {400000, 0x666666, 99},
- {390625, 0x10000, 0},
- {250000, 0x400000, 99},
- {200000, 0x666666, 199},
- {195313, 0x8000, 0},
- {125000, 0x100000, 49},
- {100000, 0x200000, 124},
- {50000, 0x100000, 124},
- {25000, 0x80000, 124},
- {10016, 0x20000, 77},
- {5040, 0x20000, 154},
- {1002, 0x8000, 194},
-};
-
/* Offset from drv_data->lpss_base */
#define GENERAL_REG 0x08
#define GENERAL_REG_RXTO_HOLDOFF_DISABLE BIT(24)
}
/*
- * The Quark SPI data sheet gives a table, and for the given 'rate',
- * the 'dds' and 'clk_div' can be found in the table.
+ * The Quark SPI has an additional 24 bit register (DDS_CLK_RATE) to multiply
+ * input frequency by fractions of 2^24. It also has a divider by 5.
+ *
+ * There are formulas to get baud rate value for given input frequency and
+ * divider parameters, such as DDS_CLK_RATE and SCR:
+ *
+ * Fsys = 200MHz
+ *
+ * Fssp = Fsys * DDS_CLK_RATE / 2^24 (1)
+ * Baud rate = Fsclk = Fssp / (2 * (SCR + 1)) (2)
+ *
+ * DDS_CLK_RATE either 2^n or 2^n / 5.
+ * SCR is in range 0 .. 255
+ *
+ * Divisor = 5^i * 2^j * 2 * k
+ * i = [0, 1] i = 1 iff j = 0 or j > 3
+ * j = [0, 23] j = 0 iff i = 1
+ * k = [1, 256]
+ * Special case: j = 0, i = 1: Divisor = 2 / 5
+ *
+ * Accordingly to the specification the recommended values for DDS_CLK_RATE
+ * are:
+ * Case 1: 2^n, n = [0, 23]
+ * Case 2: 2^24 * 2 / 5 (0x666666)
+ * Case 3: less than or equal to 2^24 / 5 / 16 (0x33333)
+ *
+ * In all cases the lowest possible value is better.
+ *
+ * The function calculates parameters for all cases and chooses the one closest
+ * to the asked baud rate.
*/
-static u32 quark_x1000_set_clk_regvals(u32 rate, u32 *dds, u32 *clk_div)
+static unsigned int quark_x1000_get_clk_div(int rate, u32 *dds)
{
- unsigned int i;
-
- for (i = 0; i < ARRAY_SIZE(quark_spi_rate_table); i++) {
- if (rate >= quark_spi_rate_table[i].bitrate) {
- *dds = quark_spi_rate_table[i].dds_clk_rate;
- *clk_div = quark_spi_rate_table[i].clk_div;
- return quark_spi_rate_table[i].bitrate;
+ unsigned long xtal = 200000000;
+ unsigned long fref = xtal / 2; /* mandatory division by 2,
+ see (2) */
+ /* case 3 */
+ unsigned long fref1 = fref / 2; /* case 1 */
+ unsigned long fref2 = fref * 2 / 5; /* case 2 */
+ unsigned long scale;
+ unsigned long q, q1, q2;
+ long r, r1, r2;
+ u32 mul;
+
+ /* Case 1 */
+
+ /* Set initial value for DDS_CLK_RATE */
+ mul = (1 << 24) >> 1;
+
+ /* Calculate initial quot */
+ q1 = DIV_ROUND_CLOSEST(fref1, rate);
+
+ /* Scale q1 if it's too big */
+ if (q1 > 256) {
+ /* Scale q1 to range [1, 512] */
+ scale = fls_long(q1 - 1);
+ if (scale > 9) {
+ q1 >>= scale - 9;
+ mul >>= scale - 9;
}
+
+ /* Round the result if we have a remainder */
+ q1 += q1 & 1;
}
- *dds = quark_spi_rate_table[i-1].dds_clk_rate;
- *clk_div = quark_spi_rate_table[i-1].clk_div;
+ /* Decrease DDS_CLK_RATE as much as we can without loss in precision */
+ scale = __ffs(q1);
+ q1 >>= scale;
+ mul >>= scale;
+
+ /* Get the remainder */
+ r1 = abs(fref1 / (1 << (24 - fls_long(mul))) / q1 - rate);
+
+ /* Case 2 */
+
+ q2 = DIV_ROUND_CLOSEST(fref2, rate);
+ r2 = abs(fref2 / q2 - rate);
- return quark_spi_rate_table[i-1].bitrate;
+ /*
+ * Choose the best between two: less remainder we have the better. We
+ * can't go case 2 if q2 is greater than 256 since SCR register can
+ * hold only values 0 .. 255.
+ */
+ if (r2 >= r1 || q2 > 256) {
+ /* case 1 is better */
+ r = r1;
+ q = q1;
+ } else {
+ /* case 2 is better */
+ r = r2;
+ q = q2;
+ mul = (1 << 24) * 2 / 5;
+ }
+
+ /* Check case 3 only If the divisor is big enough */
+ if (fref / rate >= 80) {
+ u64 fssp;
+ u32 m;
+
+ /* Calculate initial quot */
+ q1 = DIV_ROUND_CLOSEST(fref, rate);
+ m = (1 << 24) / q1;
+
+ /* Get the remainder */
+ fssp = (u64)fref * m;
+ do_div(fssp, 1 << 24);
+ r1 = abs(fssp - rate);
+
+ /* Choose this one if it suits better */
+ if (r1 < r) {
+ /* case 3 is better */
+ q = 1;
+ mul = m;
+ }
+ }
+
+ *dds = mul;
+ return q - 1;
}
static unsigned int ssp_get_clk_div(struct driver_data *drv_data, int rate)
rate = min_t(int, ssp_clk, rate);
if (ssp->type == PXA25x_SSP || ssp->type == CE4100_SSP)
- return ((ssp_clk / (2 * rate) - 1) & 0xff) << 8;
+ return (ssp_clk / (2 * rate) - 1) & 0xff;
else
- return ((ssp_clk / rate - 1) & 0xfff) << 8;
+ return (ssp_clk / rate - 1) & 0xfff;
}
static unsigned int pxa2xx_ssp_get_clk_div(struct driver_data *drv_data,
struct chip_data *chip, int rate)
{
- u32 clk_div;
+ unsigned int clk_div;
switch (drv_data->ssp_type) {
case QUARK_X1000_SSP:
- quark_x1000_set_clk_regvals(rate, &chip->dds_rate, &clk_div);
- return clk_div << 8;
+ clk_div = quark_x1000_get_clk_div(rate, &chip->dds_rate);
+ break;
default:
- return ssp_get_clk_div(drv_data, rate);
+ clk_div = ssp_get_clk_div(drv_data, rate);
+ break;
}
+ return clk_div << 8;
}
static void pump_transfers(unsigned long data)
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/spi/spi.h>
+#include <linux/dmaengine.h>
+#include <linux/dma-mapping.h>
#define QUP_CONFIG 0x0000
#define QUP_STATE 0x0004
#define SPI_NUM_CHIPSELECTS 4
+#define SPI_MAX_DMA_XFER (SZ_64K - 64)
+
/* high speed mode is when bus rate is greater then 26MHz */
#define SPI_HS_MIN_RATE 26000000
#define SPI_MAX_RATE 50000000
struct completion done;
int error;
int w_size; /* bytes per SPI word */
+ int n_words;
int tx_bytes;
int rx_bytes;
int qup_v1;
+
+ int use_dma;
+ struct dma_slave_config rx_conf;
+ struct dma_slave_config tx_conf;
};
return 0;
}
-
static void spi_qup_fifo_read(struct spi_qup *controller,
struct spi_transfer *xfer)
{
}
}
+static void spi_qup_dma_done(void *data)
+{
+ struct spi_qup *qup = data;
+
+ complete(&qup->done);
+}
+
+static int spi_qup_prep_sg(struct spi_master *master, struct spi_transfer *xfer,
+ enum dma_transfer_direction dir,
+ dma_async_tx_callback callback)
+{
+ struct spi_qup *qup = spi_master_get_devdata(master);
+ unsigned long flags = DMA_PREP_INTERRUPT | DMA_PREP_FENCE;
+ struct dma_async_tx_descriptor *desc;
+ struct scatterlist *sgl;
+ struct dma_chan *chan;
+ dma_cookie_t cookie;
+ unsigned int nents;
+
+ if (dir == DMA_MEM_TO_DEV) {
+ chan = master->dma_tx;
+ nents = xfer->tx_sg.nents;
+ sgl = xfer->tx_sg.sgl;
+ } else {
+ chan = master->dma_rx;
+ nents = xfer->rx_sg.nents;
+ sgl = xfer->rx_sg.sgl;
+ }
+
+ desc = dmaengine_prep_slave_sg(chan, sgl, nents, dir, flags);
+ if (!desc)
+ return -EINVAL;
+
+ desc->callback = callback;
+ desc->callback_param = qup;
+
+ cookie = dmaengine_submit(desc);
+
+ return dma_submit_error(cookie);
+}
+
+static void spi_qup_dma_terminate(struct spi_master *master,
+ struct spi_transfer *xfer)
+{
+ if (xfer->tx_buf)
+ dmaengine_terminate_all(master->dma_tx);
+ if (xfer->rx_buf)
+ dmaengine_terminate_all(master->dma_rx);
+}
+
+static int spi_qup_do_dma(struct spi_master *master, struct spi_transfer *xfer)
+{
+ dma_async_tx_callback rx_done = NULL, tx_done = NULL;
+ int ret;
+
+ if (xfer->rx_buf)
+ rx_done = spi_qup_dma_done;
+ else if (xfer->tx_buf)
+ tx_done = spi_qup_dma_done;
+
+ if (xfer->rx_buf) {
+ ret = spi_qup_prep_sg(master, xfer, DMA_DEV_TO_MEM, rx_done);
+ if (ret)
+ return ret;
+
+ dma_async_issue_pending(master->dma_rx);
+ }
+
+ if (xfer->tx_buf) {
+ ret = spi_qup_prep_sg(master, xfer, DMA_MEM_TO_DEV, tx_done);
+ if (ret)
+ return ret;
+
+ dma_async_issue_pending(master->dma_tx);
+ }
+
+ return 0;
+}
+
+static int spi_qup_do_pio(struct spi_master *master, struct spi_transfer *xfer)
+{
+ struct spi_qup *qup = spi_master_get_devdata(master);
+ int ret;
+
+ ret = spi_qup_set_state(qup, QUP_STATE_RUN);
+ if (ret) {
+ dev_warn(qup->dev, "cannot set RUN state\n");
+ return ret;
+ }
+
+ ret = spi_qup_set_state(qup, QUP_STATE_PAUSE);
+ if (ret) {
+ dev_warn(qup->dev, "cannot set PAUSE state\n");
+ return ret;
+ }
+
+ spi_qup_fifo_write(qup, xfer);
+
+ return 0;
+}
+
static irqreturn_t spi_qup_qup_irq(int irq, void *dev_id)
{
struct spi_qup *controller = dev_id;
error = -EIO;
}
- if (opflags & QUP_OP_IN_SERVICE_FLAG)
- spi_qup_fifo_read(controller, xfer);
+ if (!controller->use_dma) {
+ if (opflags & QUP_OP_IN_SERVICE_FLAG)
+ spi_qup_fifo_read(controller, xfer);
- if (opflags & QUP_OP_OUT_SERVICE_FLAG)
- spi_qup_fifo_write(controller, xfer);
+ if (opflags & QUP_OP_OUT_SERVICE_FLAG)
+ spi_qup_fifo_write(controller, xfer);
+ }
spin_lock_irqsave(&controller->lock, flags);
controller->error = error;
return IRQ_HANDLED;
}
+static u32
+spi_qup_get_mode(struct spi_master *master, struct spi_transfer *xfer)
+{
+ struct spi_qup *qup = spi_master_get_devdata(master);
+ u32 mode;
+
+ qup->w_size = 4;
+
+ if (xfer->bits_per_word <= 8)
+ qup->w_size = 1;
+ else if (xfer->bits_per_word <= 16)
+ qup->w_size = 2;
+
+ qup->n_words = xfer->len / qup->w_size;
+
+ if (qup->n_words <= (qup->in_fifo_sz / sizeof(u32)))
+ mode = QUP_IO_M_MODE_FIFO;
+ else
+ mode = QUP_IO_M_MODE_BLOCK;
+
+ return mode;
+}
/* set clock freq ... bits per word */
static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer)
{
struct spi_qup *controller = spi_master_get_devdata(spi->master);
u32 config, iomode, mode, control;
- int ret, n_words, w_size;
+ int ret, n_words;
if (spi->mode & SPI_LOOP && xfer->len > controller->in_fifo_sz) {
dev_err(controller->dev, "too big size for loopback %d > %d\n",
return -EIO;
}
- w_size = 4;
- if (xfer->bits_per_word <= 8)
- w_size = 1;
- else if (xfer->bits_per_word <= 16)
- w_size = 2;
-
- n_words = xfer->len / w_size;
- controller->w_size = w_size;
+ mode = spi_qup_get_mode(spi->master, xfer);
+ n_words = controller->n_words;
- if (n_words <= (controller->in_fifo_sz / sizeof(u32))) {
- mode = QUP_IO_M_MODE_FIFO;
+ if (mode == QUP_IO_M_MODE_FIFO) {
writel_relaxed(n_words, controller->base + QUP_MX_READ_CNT);
writel_relaxed(n_words, controller->base + QUP_MX_WRITE_CNT);
/* must be zero for FIFO */
writel_relaxed(0, controller->base + QUP_MX_INPUT_CNT);
writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT);
- } else {
- mode = QUP_IO_M_MODE_BLOCK;
+ } else if (!controller->use_dma) {
writel_relaxed(n_words, controller->base + QUP_MX_INPUT_CNT);
writel_relaxed(n_words, controller->base + QUP_MX_OUTPUT_CNT);
/* must be zero for BLOCK and BAM */
writel_relaxed(0, controller->base + QUP_MX_READ_CNT);
writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT);
+ } else {
+ mode = QUP_IO_M_MODE_BAM;
+ writel_relaxed(0, controller->base + QUP_MX_READ_CNT);
+ writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT);
+
+ if (!controller->qup_v1) {
+ void __iomem *input_cnt;
+
+ input_cnt = controller->base + QUP_MX_INPUT_CNT;
+ /*
+ * for DMA transfers, both QUP_MX_INPUT_CNT and
+ * QUP_MX_OUTPUT_CNT must be zero to all cases but one.
+ * That case is a non-balanced transfer when there is
+ * only a rx_buf.
+ */
+ if (xfer->tx_buf)
+ writel_relaxed(0, input_cnt);
+ else
+ writel_relaxed(n_words, input_cnt);
+
+ writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT);
+ }
}
iomode = readl_relaxed(controller->base + QUP_IO_M_MODES);
/* Set input and output transfer mode */
iomode &= ~(QUP_IO_M_INPUT_MODE_MASK | QUP_IO_M_OUTPUT_MODE_MASK);
- iomode &= ~(QUP_IO_M_PACK_EN | QUP_IO_M_UNPACK_EN);
+
+ if (!controller->use_dma)
+ iomode &= ~(QUP_IO_M_PACK_EN | QUP_IO_M_UNPACK_EN);
+ else
+ iomode |= QUP_IO_M_PACK_EN | QUP_IO_M_UNPACK_EN;
+
iomode |= (mode << QUP_IO_M_OUTPUT_MODE_MASK_SHIFT);
iomode |= (mode << QUP_IO_M_INPUT_MODE_MASK_SHIFT);
config &= ~(QUP_CONFIG_NO_INPUT | QUP_CONFIG_NO_OUTPUT | QUP_CONFIG_N);
config |= xfer->bits_per_word - 1;
config |= QUP_CONFIG_SPI_MODE;
+
+ if (controller->use_dma) {
+ if (!xfer->tx_buf)
+ config |= QUP_CONFIG_NO_OUTPUT;
+ if (!xfer->rx_buf)
+ config |= QUP_CONFIG_NO_INPUT;
+ }
+
writel_relaxed(config, controller->base + QUP_CONFIG);
/* only write to OPERATIONAL_MASK when register is present */
- if (!controller->qup_v1)
- writel_relaxed(0, controller->base + QUP_OPERATIONAL_MASK);
+ if (!controller->qup_v1) {
+ u32 mask = 0;
+
+ /*
+ * mask INPUT and OUTPUT service flags to prevent IRQs on FIFO
+ * status change in BAM mode
+ */
+
+ if (mode == QUP_IO_M_MODE_BAM)
+ mask = QUP_OP_IN_SERVICE_FLAG | QUP_OP_OUT_SERVICE_FLAG;
+
+ writel_relaxed(mask, controller->base + QUP_OPERATIONAL_MASK);
+ }
+
return 0;
}
controller->tx_bytes = 0;
spin_unlock_irqrestore(&controller->lock, flags);
- if (spi_qup_set_state(controller, QUP_STATE_RUN)) {
- dev_warn(controller->dev, "cannot set RUN state\n");
- goto exit;
- }
+ if (controller->use_dma)
+ ret = spi_qup_do_dma(master, xfer);
+ else
+ ret = spi_qup_do_pio(master, xfer);
- if (spi_qup_set_state(controller, QUP_STATE_PAUSE)) {
- dev_warn(controller->dev, "cannot set PAUSE state\n");
+ if (ret)
goto exit;
- }
-
- spi_qup_fifo_write(controller, xfer);
if (spi_qup_set_state(controller, QUP_STATE_RUN)) {
dev_warn(controller->dev, "cannot set EXECUTE state\n");
if (!wait_for_completion_timeout(&controller->done, timeout))
ret = -ETIMEDOUT;
+
exit:
spi_qup_set_state(controller, QUP_STATE_RESET);
spin_lock_irqsave(&controller->lock, flags);
if (!ret)
ret = controller->error;
spin_unlock_irqrestore(&controller->lock, flags);
+
+ if (ret && controller->use_dma)
+ spi_qup_dma_terminate(master, xfer);
+
+ return ret;
+}
+
+static bool spi_qup_can_dma(struct spi_master *master, struct spi_device *spi,
+ struct spi_transfer *xfer)
+{
+ struct spi_qup *qup = spi_master_get_devdata(master);
+ size_t dma_align = dma_get_cache_alignment();
+ u32 mode;
+
+ qup->use_dma = 0;
+
+ if (xfer->rx_buf && (xfer->len % qup->in_blk_sz ||
+ IS_ERR_OR_NULL(master->dma_rx) ||
+ !IS_ALIGNED((size_t)xfer->rx_buf, dma_align)))
+ return false;
+
+ if (xfer->tx_buf && (xfer->len % qup->out_blk_sz ||
+ IS_ERR_OR_NULL(master->dma_tx) ||
+ !IS_ALIGNED((size_t)xfer->tx_buf, dma_align)))
+ return false;
+
+ mode = spi_qup_get_mode(master, xfer);
+ if (mode == QUP_IO_M_MODE_FIFO)
+ return false;
+
+ qup->use_dma = 1;
+
+ return true;
+}
+
+static void spi_qup_release_dma(struct spi_master *master)
+{
+ if (!IS_ERR_OR_NULL(master->dma_rx))
+ dma_release_channel(master->dma_rx);
+ if (!IS_ERR_OR_NULL(master->dma_tx))
+ dma_release_channel(master->dma_tx);
+}
+
+static int spi_qup_init_dma(struct spi_master *master, resource_size_t base)
+{
+ struct spi_qup *spi = spi_master_get_devdata(master);
+ struct dma_slave_config *rx_conf = &spi->rx_conf,
+ *tx_conf = &spi->tx_conf;
+ struct device *dev = spi->dev;
+ int ret;
+
+ /* allocate dma resources, if available */
+ master->dma_rx = dma_request_slave_channel_reason(dev, "rx");
+ if (IS_ERR(master->dma_rx))
+ return PTR_ERR(master->dma_rx);
+
+ master->dma_tx = dma_request_slave_channel_reason(dev, "tx");
+ if (IS_ERR(master->dma_tx)) {
+ ret = PTR_ERR(master->dma_tx);
+ goto err_tx;
+ }
+
+ /* set DMA parameters */
+ rx_conf->direction = DMA_DEV_TO_MEM;
+ rx_conf->device_fc = 1;
+ rx_conf->src_addr = base + QUP_INPUT_FIFO;
+ rx_conf->src_maxburst = spi->in_blk_sz;
+
+ tx_conf->direction = DMA_MEM_TO_DEV;
+ tx_conf->device_fc = 1;
+ tx_conf->dst_addr = base + QUP_OUTPUT_FIFO;
+ tx_conf->dst_maxburst = spi->out_blk_sz;
+
+ ret = dmaengine_slave_config(master->dma_rx, rx_conf);
+ if (ret) {
+ dev_err(dev, "failed to configure RX channel\n");
+ goto err;
+ }
+
+ ret = dmaengine_slave_config(master->dma_tx, tx_conf);
+ if (ret) {
+ dev_err(dev, "failed to configure TX channel\n");
+ goto err;
+ }
+
+ return 0;
+
+err:
+ dma_release_channel(master->dma_tx);
+err_tx:
+ dma_release_channel(master->dma_rx);
return ret;
}
master->transfer_one = spi_qup_transfer_one;
master->dev.of_node = pdev->dev.of_node;
master->auto_runtime_pm = true;
+ master->dma_alignment = dma_get_cache_alignment();
+ master->max_dma_len = SPI_MAX_DMA_XFER;
platform_set_drvdata(pdev, master);
controller->cclk = cclk;
controller->irq = irq;
+ ret = spi_qup_init_dma(master, res->start);
+ if (ret == -EPROBE_DEFER)
+ goto error;
+ else if (!ret)
+ master->can_dma = spi_qup_can_dma;
+
/* set v1 flag if device is version 1 */
if (of_device_is_compatible(dev->of_node, "qcom,spi-qup-v1.1.1"))
controller->qup_v1 = 1;
ret = spi_qup_set_state(controller, QUP_STATE_RESET);
if (ret) {
dev_err(dev, "cannot set RESET state\n");
- goto error;
+ goto error_dma;
}
writel_relaxed(0, base + QUP_OPERATIONAL);
ret = devm_request_irq(dev, irq, spi_qup_qup_irq,
IRQF_TRIGGER_HIGH, pdev->name, controller);
if (ret)
- goto error;
+ goto error_dma;
pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC);
pm_runtime_use_autosuspend(dev);
disable_pm:
pm_runtime_disable(&pdev->dev);
+error_dma:
+ spi_qup_release_dma(master);
error:
clk_disable_unprepare(cclk);
clk_disable_unprepare(iclk);
if (ret)
return ret;
+ spi_qup_release_dma(master);
+
clk_disable_unprepare(controller->cclk);
clk_disable_unprepare(controller->iclk);
u8 tmode;
u8 bpw;
u8 n_bytes;
+ u8 rsd_nsecs;
unsigned len;
u32 speed;
return 0;
}
-static int rockchip_spi_unprepare_message(struct spi_master *master,
- struct spi_message *msg)
+static void rockchip_spi_handle_err(struct spi_master *master,
+ struct spi_message *msg)
{
unsigned long flags;
struct rockchip_spi *rs = spi_master_get_devdata(master);
/*
* For DMA mode, we need terminate DMA channel and flush
* fifo for the next transfer if DMA thansfer timeout.
- * unprepare_message() was called by core if transfer complete
- * or timeout. Maybe it is reasonable for error handling here.
+ * handle_err() was called by core if transfer failed.
+ * Maybe it is reasonable for error handling here.
*/
if (rs->use_dma) {
if (rs->state & RXBUSY) {
}
spin_unlock_irqrestore(&rs->lock, flags);
+}
+
+static int rockchip_spi_unprepare_message(struct spi_master *master,
+ struct spi_message *msg)
+{
+ struct rockchip_spi *rs = spi_master_get_devdata(master);
spi_enable_chip(rs, 0);
{
u32 div = 0;
u32 dmacr = 0;
+ int rsd = 0;
u32 cr0 = (CR0_BHT_8BIT << CR0_BHT_OFFSET)
| (CR0_SSD_ONE << CR0_SSD_OFFSET);
}
/* div doesn't support odd number */
- div = max_t(u32, rs->max_freq / rs->speed, 1);
+ div = DIV_ROUND_UP(rs->max_freq, rs->speed);
div = (div + 1) & 0xfffe;
+ /* Rx sample delay is expressed in parent clock cycles (max 3) */
+ rsd = DIV_ROUND_CLOSEST(rs->rsd_nsecs * (rs->max_freq >> 8),
+ 1000000000 >> 8);
+ if (!rsd && rs->rsd_nsecs) {
+ pr_warn_once("rockchip-spi: %u Hz are too slow to express %u ns delay\n",
+ rs->max_freq, rs->rsd_nsecs);
+ } else if (rsd > 3) {
+ rsd = 3;
+ pr_warn_once("rockchip-spi: %u Hz are too fast to express %u ns delay, clamping at %u ns\n",
+ rs->max_freq, rs->rsd_nsecs,
+ rsd * 1000000000U / rs->max_freq);
+ }
+ cr0 |= rsd << CR0_RSD_OFFSET;
+
writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0);
writel_relaxed(rs->len - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
struct rockchip_spi *rs;
struct spi_master *master;
struct resource *mem;
+ u32 rsd_nsecs;
master = spi_alloc_master(&pdev->dev, sizeof(struct rockchip_spi));
if (!master)
rs->dev = &pdev->dev;
rs->max_freq = clk_get_rate(rs->spiclk);
+ if (!of_property_read_u32(pdev->dev.of_node, "rx-sample-delay-ns",
+ &rsd_nsecs))
+ rs->rsd_nsecs = rsd_nsecs;
+
rs->fifo_len = get_fifo_len(rs);
if (!rs->fifo_len) {
dev_err(&pdev->dev, "Failed to get fifo length\n");
master->prepare_message = rockchip_spi_prepare_message;
master->unprepare_message = rockchip_spi_unprepare_message;
master->transfer_one = rockchip_spi_transfer_one;
+ master->handle_err = rockchip_spi_handle_err;
rs->dma_tx.ch = dma_request_slave_channel(rs->dev, "tx");
if (!rs->dma_tx.ch)
#define SPBFCR_RXRST 0x40 /* Receive Buffer Data Reset */
#define SPBFCR_TXTRG_MASK 0x30 /* Transmit Buffer Data Triggering Number */
#define SPBFCR_RXTRG_MASK 0x07 /* Receive Buffer Data Triggering Number */
+/* QSPI on R-Car Gen2 */
+#define SPBFCR_TXTRG_1B 0x00 /* 31 bytes (1 byte available) */
+#define SPBFCR_TXTRG_32B 0x30 /* 0 byte (32 bytes available) */
+#define SPBFCR_RXTRG_1B 0x00 /* 1 byte (31 bytes available) */
+#define SPBFCR_RXTRG_32B 0x07 /* 32 bytes (0 byte available) */
+
+#define QSPI_BUFFER_SIZE 32u
struct rspi_data {
void __iomem *addr;
return 0;
}
+static void qspi_update(const struct rspi_data *rspi, u8 mask, u8 val, u8 reg)
+{
+ u8 data;
+
+ data = rspi_read8(rspi, reg);
+ data &= ~mask;
+ data |= (val & mask);
+ rspi_write8(rspi, data, reg);
+}
+
+static int qspi_set_send_trigger(struct rspi_data *rspi, unsigned int len)
+{
+ unsigned int n;
+
+ n = min(len, QSPI_BUFFER_SIZE);
+
+ if (len >= QSPI_BUFFER_SIZE) {
+ /* sets triggering number to 32 bytes */
+ qspi_update(rspi, SPBFCR_TXTRG_MASK,
+ SPBFCR_TXTRG_32B, QSPI_SPBFCR);
+ } else {
+ /* sets triggering number to 1 byte */
+ qspi_update(rspi, SPBFCR_TXTRG_MASK,
+ SPBFCR_TXTRG_1B, QSPI_SPBFCR);
+ }
+
+ return n;
+}
+
+static void qspi_set_receive_trigger(struct rspi_data *rspi, unsigned int len)
+{
+ unsigned int n;
+
+ n = min(len, QSPI_BUFFER_SIZE);
+
+ if (len >= QSPI_BUFFER_SIZE) {
+ /* sets triggering number to 32 bytes */
+ qspi_update(rspi, SPBFCR_RXTRG_MASK,
+ SPBFCR_RXTRG_32B, QSPI_SPBFCR);
+ } else {
+ /* sets triggering number to 1 byte */
+ qspi_update(rspi, SPBFCR_RXTRG_MASK,
+ SPBFCR_RXTRG_1B, QSPI_SPBFCR);
+ }
+}
+
#define set_config_register(spi, n) spi->ops->set_config_register(spi, n)
static void rspi_enable_irq(const struct rspi_data *rspi, u8 enable)
return __rspi_can_dma(rspi, xfer);
}
-static int rspi_common_transfer(struct rspi_data *rspi,
- struct spi_transfer *xfer)
+static int rspi_dma_check_then_transfer(struct rspi_data *rspi,
+ struct spi_transfer *xfer)
{
- int ret;
-
if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer)) {
/* rx_buf can be NULL on RSPI on SH in TX-only Mode */
- ret = rspi_dma_transfer(rspi, &xfer->tx_sg,
+ int ret = rspi_dma_transfer(rspi, &xfer->tx_sg,
xfer->rx_buf ? &xfer->rx_sg : NULL);
if (ret != -EAGAIN)
- return ret;
+ return 0;
}
+ return -EAGAIN;
+}
+
+static int rspi_common_transfer(struct rspi_data *rspi,
+ struct spi_transfer *xfer)
+{
+ int ret;
+
+ ret = rspi_dma_check_then_transfer(rspi, xfer);
+ if (ret != -EAGAIN)
+ return ret;
+
ret = rspi_pio_transfer(rspi, xfer->tx_buf, xfer->rx_buf, xfer->len);
if (ret < 0)
return ret;
return rspi_common_transfer(rspi, xfer);
}
+static int qspi_trigger_transfer_out_int(struct rspi_data *rspi, const u8 *tx,
+ u8 *rx, unsigned int len)
+{
+ int i, n, ret;
+ int error;
+
+ while (len > 0) {
+ n = qspi_set_send_trigger(rspi, len);
+ qspi_set_receive_trigger(rspi, len);
+ if (n == QSPI_BUFFER_SIZE) {
+ error = rspi_wait_for_tx_empty(rspi);
+ if (error < 0) {
+ dev_err(&rspi->master->dev, "transmit timeout\n");
+ return error;
+ }
+ for (i = 0; i < n; i++)
+ rspi_write_data(rspi, *tx++);
+
+ error = rspi_wait_for_rx_full(rspi);
+ if (error < 0) {
+ dev_err(&rspi->master->dev, "receive timeout\n");
+ return error;
+ }
+ for (i = 0; i < n; i++)
+ *rx++ = rspi_read_data(rspi);
+ } else {
+ ret = rspi_pio_transfer(rspi, tx, rx, n);
+ if (ret < 0)
+ return ret;
+ }
+ len -= n;
+ }
+
+ return 0;
+}
+
static int qspi_transfer_out_in(struct rspi_data *rspi,
struct spi_transfer *xfer)
{
+ int ret;
+
qspi_receive_init(rspi);
- return rspi_common_transfer(rspi, xfer);
+ ret = rspi_dma_check_then_transfer(rspi, xfer);
+ if (ret != -EAGAIN)
+ return ret;
+
+ ret = qspi_trigger_transfer_out_int(rspi, xfer->tx_buf,
+ xfer->rx_buf, xfer->len);
+ if (ret < 0)
+ return ret;
+
+ return 0;
}
static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer)
/* Acquire DMA channels */
sdd->rx_dma.ch = dma_request_slave_channel_compat(mask, filter,
- (void *)sdd->rx_dma.dmach, dev, "rx");
+ (void *)(long)sdd->rx_dma.dmach, dev, "rx");
if (!sdd->rx_dma.ch) {
dev_err(dev, "Failed to get RX DMA channel\n");
ret = -EBUSY;
spi->dma_rx = sdd->rx_dma.ch;
sdd->tx_dma.ch = dma_request_slave_channel_compat(mask, filter,
- (void *)sdd->tx_dma.dmach, dev, "tx");
+ (void *)(long)sdd->tx_dma.dmach, dev, "tx");
if (!sdd->tx_dma.ch) {
dev_err(dev, "Failed to get TX DMA channel\n");
ret = -EBUSY;
hw->freq = SC18IS602_CLOCK;
break;
}
- master->bus_num = client->adapter->nr;
+ master->bus_num = np ? -1 : client->adapter->nr;
master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST;
master->bits_per_word_mask = SPI_BPW_MASK(8);
master->setup = sc18is602_setup;
SET_RUNTIME_PM_OPS(spi_st_runtime_suspend, spi_st_runtime_resume, NULL)
};
-static struct of_device_id stm_spi_match[] = {
+static const struct of_device_id stm_spi_match[] = {
{ .compatible = "st,comms-ssc4-spi", },
{},
};
*/
#include <linux/kernel.h>
-#include <linux/kmod.h>
#include <linux/device.h>
#include <linux/init.h>
#include <linux/cache.h>
return 0;
}
-#ifdef CONFIG_PM_SLEEP
-static int spi_legacy_suspend(struct device *dev, pm_message_t message)
-{
- int value = 0;
- struct spi_driver *drv = to_spi_driver(dev->driver);
-
- /* suspend will stop irqs and dma; no more i/o */
- if (drv) {
- if (drv->suspend)
- value = drv->suspend(to_spi_device(dev), message);
- else
- dev_dbg(dev, "... can't suspend\n");
- }
- return value;
-}
-
-static int spi_legacy_resume(struct device *dev)
-{
- int value = 0;
- struct spi_driver *drv = to_spi_driver(dev->driver);
-
- /* resume may restart the i/o queue */
- if (drv) {
- if (drv->resume)
- value = drv->resume(to_spi_device(dev));
- else
- dev_dbg(dev, "... can't resume\n");
- }
- return value;
-}
-
-static int spi_pm_suspend(struct device *dev)
-{
- const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
-
- if (pm)
- return pm_generic_suspend(dev);
- else
- return spi_legacy_suspend(dev, PMSG_SUSPEND);
-}
-
-static int spi_pm_resume(struct device *dev)
-{
- const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
-
- if (pm)
- return pm_generic_resume(dev);
- else
- return spi_legacy_resume(dev);
-}
-
-static int spi_pm_freeze(struct device *dev)
-{
- const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
-
- if (pm)
- return pm_generic_freeze(dev);
- else
- return spi_legacy_suspend(dev, PMSG_FREEZE);
-}
-
-static int spi_pm_thaw(struct device *dev)
-{
- const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
-
- if (pm)
- return pm_generic_thaw(dev);
- else
- return spi_legacy_resume(dev);
-}
-
-static int spi_pm_poweroff(struct device *dev)
-{
- const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
-
- if (pm)
- return pm_generic_poweroff(dev);
- else
- return spi_legacy_suspend(dev, PMSG_HIBERNATE);
-}
-
-static int spi_pm_restore(struct device *dev)
-{
- const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
-
- if (pm)
- return pm_generic_restore(dev);
- else
- return spi_legacy_resume(dev);
-}
-#else
-#define spi_pm_suspend NULL
-#define spi_pm_resume NULL
-#define spi_pm_freeze NULL
-#define spi_pm_thaw NULL
-#define spi_pm_poweroff NULL
-#define spi_pm_restore NULL
-#endif
-
-static const struct dev_pm_ops spi_pm = {
- .suspend = spi_pm_suspend,
- .resume = spi_pm_resume,
- .freeze = spi_pm_freeze,
- .thaw = spi_pm_thaw,
- .poweroff = spi_pm_poweroff,
- .restore = spi_pm_restore,
- SET_RUNTIME_PM_OPS(
- pm_generic_runtime_suspend,
- pm_generic_runtime_resume,
- NULL
- )
-};
-
struct bus_type spi_bus_type = {
.name = "spi",
.dev_groups = spi_dev_groups,
.match = spi_match_device,
.uevent = spi_uevent,
- .pm = &spi_pm,
};
EXPORT_SYMBOL_GPL(spi_bus_type);
if (msg->status == -EINPROGRESS)
msg->status = ret;
+ if (msg->status && master->handle_err)
+ master->handle_err(master, msg);
+
spi_finalize_current_message(master);
return ret;
spi->dev.of_node = nc;
/* Register the new device */
- request_module("%s%s", SPI_MODULE_PREFIX, spi->modalias);
rc = spi_add_device(spi);
if (rc) {
dev_err(&master->dev, "spi_device register error %s\n",
if (!spi->max_speed_hz)
spi->max_speed_hz = spi->master->max_speed_hz;
+ spi_set_cs(spi, false);
+
if (spi->master->setup)
status = spi->master->setup(spi);
struct spi_transfer *k_xfers;
struct spi_transfer *k_tmp;
struct spi_ioc_transfer *u_tmp;
- unsigned n, total;
+ unsigned n, total, tx_total, rx_total;
u8 *tx_buf, *rx_buf;
int status = -EFAULT;
tx_buf = spidev->tx_buffer;
rx_buf = spidev->rx_buffer;
total = 0;
+ tx_total = 0;
+ rx_total = 0;
for (n = n_xfers, k_tmp = k_xfers, u_tmp = u_xfers;
n;
n--, k_tmp++, u_tmp++) {
k_tmp->len = u_tmp->len;
total += k_tmp->len;
- if (total > bufsiz) {
+ /* Since the function returns the total length of transfers
+ * on success, restrict the total to positive int values to
+ * avoid the return value looking like an error. Also check
+ * each transfer length to avoid arithmetic overflow.
+ */
+ if (total > INT_MAX || k_tmp->len > INT_MAX) {
status = -EMSGSIZE;
goto done;
}
if (u_tmp->rx_buf) {
+ /* this transfer needs space in RX bounce buffer */
+ rx_total += k_tmp->len;
+ if (rx_total > bufsiz) {
+ status = -EMSGSIZE;
+ goto done;
+ }
k_tmp->rx_buf = rx_buf;
if (!access_ok(VERIFY_WRITE, (u8 __user *)
(uintptr_t) u_tmp->rx_buf,
u_tmp->len))
goto done;
+ rx_buf += k_tmp->len;
}
if (u_tmp->tx_buf) {
+ /* this transfer needs space in TX bounce buffer */
+ tx_total += k_tmp->len;
+ if (tx_total > bufsiz) {
+ status = -EMSGSIZE;
+ goto done;
+ }
k_tmp->tx_buf = tx_buf;
if (copy_from_user(tx_buf, (const u8 __user *)
(uintptr_t) u_tmp->tx_buf,
u_tmp->len))
goto done;
+ tx_buf += k_tmp->len;
}
- tx_buf += k_tmp->len;
- rx_buf += k_tmp->len;
k_tmp->cs_change = !!u_tmp->cs_change;
k_tmp->tx_nbits = u_tmp->tx_nbits;
status = -EFAULT;
goto done;
}
+ rx_buf += u_tmp->len;
}
- rx_buf += u_tmp->len;
}
status = total;
static struct class *spidev_class;
+#ifdef CONFIG_OF
+static const struct of_device_id spidev_dt_ids[] = {
+ { .compatible = "rohm,dh2228fv" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, spidev_dt_ids);
+#endif
+
/*-------------------------------------------------------------------------*/
static int spidev_probe(struct spi_device *spi)
int status;
unsigned long minor;
+ /*
+ * spidev should never be referenced in DT without a specific
+ * compatbile string, it is a Linux implementation thing
+ * rather than a description of the hardware.
+ */
+ if (spi->dev.of_node && !of_match_device(spidev_dt_ids, &spi->dev)) {
+ dev_err(&spi->dev, "buggy DT: spidev listed directly in DT\n");
+ WARN_ON(spi->dev.of_node &&
+ !of_match_device(spidev_dt_ids, &spi->dev));
+ }
+
/* Allocate driver data */
spidev = kzalloc(sizeof(*spidev), GFP_KERNEL);
if (!spidev)
return 0;
}
-static const struct of_device_id spidev_dt_ids[] = {
- { .compatible = "rohm,dh2228fv" },
- {},
-};
-
-MODULE_DEVICE_TABLE(of, spidev_dt_ids);
-
static struct spi_driver spidev_spi_driver = {
.driver = {
.name = "spidev",
source "drivers/staging/sm7xxfb/Kconfig"
+source "drivers/staging/sm750fb/Kconfig"
+
source "drivers/staging/xgifb/Kconfig"
source "drivers/staging/emxx_udc/Kconfig"
source "drivers/staging/i2o/Kconfig"
+source "drivers/staging/fsl-mc/Kconfig"
+
endif # STAGING
obj-$(CONFIG_VME_BUS) += vme/
obj-$(CONFIG_IIO) += iio/
obj-$(CONFIG_FB_SM7XX) += sm7xxfb/
+obj-$(CONFIG_FB_SM7XX) += sm750fb/
obj-$(CONFIG_FB_XGI) += xgifb/
obj-$(CONFIG_USB_EMXX) += emxx_udc/
obj-$(CONFIG_FT1000) += ft1000/
obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD) += clocking-wizard/
obj-$(CONFIG_FB_TFT) += fbtft/
obj-$(CONFIG_I2O) += i2o/
+obj-$(CONFIG_FSL_MC_BUS) += fsl-mc/
buffer = handle->buffer;
if (!buffer->heap->ops->phys) {
- pr_err("%s: ion_phys is not implemented by this heap.\n",
- __func__);
+ pr_err("%s: ion_phys is not implemented by this heap (name=%s, type=%d).\n",
+ __func__, buffer->heap->name, buffer->heap->type);
mutex_unlock(&client->lock);
return -ENODEV;
}
size_t total_size = 0;
size_t total_orphaned_size = 0;
- seq_printf(s, "%16.s %16.s %16.s\n", "client", "pid", "size");
+ seq_printf(s, "%16s %16s %16s\n", "client", "pid", "size");
seq_puts(s, "----------------------------------------------------\n");
for (n = rb_first(&dev->clients); n; n = rb_next(n)) {
char task_comm[TASK_COMM_LEN];
get_task_comm(task_comm, client->task);
- seq_printf(s, "%16.s %16u %16zu\n", task_comm,
+ seq_printf(s, "%16s %16u %16zu\n", task_comm,
client->pid, size);
} else {
- seq_printf(s, "%16.s %16u %16zu\n", client->name,
+ seq_printf(s, "%16s %16u %16zu\n", client->name,
client->pid, size);
}
}
continue;
total_size += buffer->size;
if (!buffer->handle_count) {
- seq_printf(s, "%16.s %16u %16zu %d %d\n",
+ seq_printf(s, "%16s %16u %16zu %d %d\n",
buffer->task_comm, buffer->pid,
buffer->size, buffer->kmap_cnt,
atomic_read(&buffer->ref.refcount));
}
mutex_unlock(&dev->buffer_lock);
seq_puts(s, "----------------------------------------------------\n");
- seq_printf(s, "%16.s %16zu\n", "total orphaned",
+ seq_printf(s, "%16s %16zu\n", "total orphaned",
total_orphaned_size);
- seq_printf(s, "%16.s %16zu\n", "total ", total_size);
+ seq_printf(s, "%16s %16zu\n", "total ", total_size);
if (heap->flags & ION_HEAP_FLAG_DEFER_FREE)
- seq_printf(s, "%16.s %16zu\n", "deferred free",
+ seq_printf(s, "%16s %16zu\n", "deferred free",
heap->free_list_size);
seq_puts(s, "----------------------------------------------------\n");
module_init(ion_test_init);
module_exit(ion_test_exit);
+MODULE_LICENSE("GPL v2");
list_for_each_entry_safe(pt, next, &obj->active_list_head,
active_list) {
if (fence_is_signaled_locked(&pt->base))
- list_del(&pt->active_list);
+ list_del_init(&pt->active_list);
}
spin_unlock_irqrestore(&obj->child_list_lock, flags);
config COMEDI_PCL711
tristate "Advantech PCL-711/711b and ADlink ACL-8112 ISA card support"
+ select COMEDI_8254
---help---
Enable support for Advantech PCL-711 and 711b, ADlink ACL-8112
config COMEDI_PCL812
tristate "Advantech PCL-812/813 and ADlink ACL-8112/8113/8113/8216"
select COMEDI_ISADMA if ISA_DMA_API
+ select COMEDI_8254
---help---
Enable support for Advantech PCL-812/PG, PCL-813/B, ADLink
ACL-8112DG/HG/PG, ACL-8113, ACL-8216, ICP DAS A-821PGH/PGL/PGL-NDA,
config COMEDI_PCL816
tristate "Advantech PCL-814 and PCL-816 ISA card support"
select COMEDI_ISADMA if ISA_DMA_API
+ select COMEDI_8254
---help---
Enable support for Advantech PCL-814 and PCL-816 ISA cards
config COMEDI_PCL818
tristate "Advantech PCL-718 and PCL-818 ISA card support"
select COMEDI_ISADMA if ISA_DMA_API
+ select COMEDI_8254
---help---
Enable support for Advantech PCL-818 ISA cards
PCL-818L, PCL-818H, PCL-818HD, PCL-818HG, PCL-818 and PCL-718
config COMEDI_DAS16M1
tristate "MeasurementComputing CIO-DAS16/M1DAS-16 ISA card support"
+ select COMEDI_8254
select COMEDI_8255
---help---
Enable support for Measurement Computing CIO-DAS16/M1 ISA cards.
config COMEDI_DAS16
tristate "DAS-16 compatible ISA and PC/104 card support"
select COMEDI_ISADMA if ISA_DMA_API
+ select COMEDI_8254
select COMEDI_8255
---help---
Enable support for Keithley Metrabyte/ComputerBoards DAS16
config COMEDI_DAS800
tristate "DAS800 and compatible ISA card support"
+ select COMEDI_8254
---help---
Enable support for Keithley Metrabyte DAS800 and compatible ISA cards
Keithley Metrabyte DAS-800, DAS-801, DAS-802
config COMEDI_DAS1800
tristate "DAS1800 and compatible ISA card support"
select COMEDI_ISADMA if ISA_DMA_API
+ select COMEDI_8254
---help---
Enable support for DAS1800 and compatible ISA cards
Keithley Metrabyte DAS-1701ST, DAS-1701ST-DA, DAS-1701/AO,
config COMEDI_DAS6402
tristate "DAS6402 and compatible ISA card support"
+ select COMEDI_8254
---help---
Enable support for DAS6402 and compatible ISA cards
Computerboards, Keithley Metrabyte DAS6402 and compatibles
config COMEDI_NI_AT_A2150
tristate "NI AT-A2150 ISA card support"
select COMEDI_ISADMA if ISA_DMA_API
+ select COMEDI_8254
---help---
Enable support for National Instruments AT-A2150 cards
config COMEDI_NI_AT_AO
tristate "NI AT-AO-6/10 EISA card support"
+ select COMEDI_8254
---help---
Enable support for National Instruments AT-AO-6/10 cards
config COMEDI_ADL_PCI9111
tristate "ADLink PCI-9111HR support"
+ select COMEDI_8254
---help---
Enable support for ADlink PCI9111 cards
config COMEDI_ADL_PCI9118
tristate "ADLink PCI-9118DG, PCI-9118HG, PCI-9118HR support"
depends on HAS_DMA
+ select COMEDI_8254
---help---
Enable support for ADlink PCI-9118DG, PCI-9118HG, PCI-9118HR cards
config COMEDI_ADV_PCI1710
tristate "Advantech PCI-171x, PCI-1720 and PCI-1731 support"
+ select COMEDI_8254
---help---
Enable support for Advantech PCI-1710, PCI-1710HG, PCI-1711,
PCI-1713, PCI-1720 and PCI-1731
config COMEDI_ADV_PCI_DIO
tristate "Advantech PCI DIO card support"
+ select COMEDI_8254
select COMEDI_8255
---help---
Enable support for Advantech PCI DIO cards
config COMEDI_AMPLC_PCI224
tristate "Amplicon PCI224 and PCI234 support"
+ select COMEDI_8254
---help---
Enable support for Amplicon PCI224 and PCI234 AO boards
config COMEDI_AMPLC_PCI230
tristate "Amplicon PCI230 and PCI260 support"
+ select COMEDI_8254
select COMEDI_8255
---help---
Enable support for Amplicon PCI230 and PCI260 Multifunction I/O
config COMEDI_CB_PCIDAS
tristate "MeasurementComputing PCI-DAS support"
+ select COMEDI_8254
select COMEDI_8255
---help---
Enable support for ComputerBoards/MeasurementComputing PCI-DAS with
config COMEDI_CB_PCIMDAS
tristate "MeasurementComputing PCIM-DAS1602/16, PCIe-DAS1602/16 support"
+ select COMEDI_8254
select COMEDI_8255
---help---
Enable support for ComputerBoards/MeasurementComputing PCI Migration
config COMEDI_ME4000
tristate "Meilhaus ME-4000 support"
+ select COMEDI_8254
---help---
Enable support for Meilhaus PCI data acquisition cards
ME-4650, ME-4670i, ME-4680, ME-4680i and ME-4680is
config COMEDI_CB_DAS16_CS
tristate "CB DAS16 series PCMCIA support"
+ select COMEDI_8254
---help---
Enable support for the ComputerBoards/MeasurementComputing PCMCIA
cards DAS16/16, PCM-DAS16D/12 and PCM-DAS16s/16
endif # COMEDI_USB_DRIVERS
+config COMEDI_8254
+ tristate
+
config COMEDI_8255
tristate "Generic 8255 support"
---help---
called kcomedilib.
config COMEDI_AMPLC_DIO200
+ select COMEDI_8254
tristate
config COMEDI_AMPLC_PC236
config COMEDI_DAS08
tristate
+ select COMEDI_8254
select COMEDI_8255
config COMEDI_ISADMA
config COMEDI_NI_LABPC
tristate
+ select COMEDI_8254
select COMEDI_8255
config COMEDI_NI_LABPC_ISADMA
{
struct module *driver_module = NULL;
- if (dev == NULL)
+ if (!dev)
return;
mutex_lock(&dev->mutex);
if (dev->attached)
if (minor >= COMEDI_NUM_BOARD_MINORS) {
s = comedi_subdevice_from_minor(dev, minor);
- if (s == NULL || (s->subdev_flags & SDF_CMD_READ))
+ if (!s || (s->subdev_flags & SDF_CMD_READ))
return s;
}
return dev->read_subdev;
if (minor >= COMEDI_NUM_BOARD_MINORS) {
s = comedi_subdevice_from_minor(dev, minor);
- if (s == NULL || (s->subdev_flags & SDF_CMD_WRITE))
+ if (!s || (s->subdev_flags & SDF_CMD_WRITE))
return s;
}
return dev->write_subdev;
write_s = dev->write_subdev;
if (minor >= COMEDI_NUM_BOARD_MINORS) {
s = comedi_subdevice_from_minor(dev, minor);
- if (s == NULL || s->subdev_flags & SDF_CMD_READ)
+ if (!s || s->subdev_flags & SDF_CMD_READ)
read_s = s;
- if (s == NULL || s->subdev_flags & SDF_CMD_WRITE)
+ if (!s || s->subdev_flags & SDF_CMD_WRITE)
write_s = s;
}
cfp->last_attached = dev->attached;
};
ATTRIBUTE_GROUPS(comedi_dev);
-static void comedi_set_subdevice_runflags(struct comedi_subdevice *s,
- unsigned mask, unsigned bits)
+static void __comedi_clear_subdevice_runflags(struct comedi_subdevice *s,
+ unsigned bits)
+{
+ s->runflags &= ~bits;
+}
+
+static void __comedi_set_subdevice_runflags(struct comedi_subdevice *s,
+ unsigned bits)
+{
+ s->runflags |= bits;
+}
+
+static void comedi_update_subdevice_runflags(struct comedi_subdevice *s,
+ unsigned mask, unsigned bits)
{
unsigned long flags;
spin_lock_irqsave(&s->spin_lock, flags);
- s->runflags &= ~mask;
- s->runflags |= (bits & mask);
+ __comedi_clear_subdevice_runflags(s, mask);
+ __comedi_set_subdevice_runflags(s, bits & mask);
spin_unlock_irqrestore(&s->spin_lock, flags);
}
+static unsigned __comedi_get_subdevice_runflags(struct comedi_subdevice *s)
+{
+ return s->runflags;
+}
+
static unsigned comedi_get_subdevice_runflags(struct comedi_subdevice *s)
{
unsigned long flags;
unsigned runflags;
spin_lock_irqsave(&s->spin_lock, flags);
- runflags = s->runflags;
+ runflags = __comedi_get_subdevice_runflags(s);
spin_unlock_irqrestore(&s->spin_lock, flags);
return runflags;
}
+static bool comedi_is_runflags_running(unsigned runflags)
+{
+ return runflags & COMEDI_SRF_RUNNING;
+}
+
+static bool comedi_is_runflags_in_error(unsigned runflags)
+{
+ return runflags & COMEDI_SRF_ERROR;
+}
+
/**
* comedi_is_subdevice_running - check if async command running on subdevice
* @s: comedi_subdevice struct
{
unsigned runflags = comedi_get_subdevice_runflags(s);
- return (runflags & COMEDI_SRF_RUNNING) ? true : false;
+ return comedi_is_runflags_running(runflags);
}
EXPORT_SYMBOL_GPL(comedi_is_subdevice_running);
-static bool comedi_is_subdevice_in_error(struct comedi_subdevice *s)
+static bool __comedi_is_subdevice_running(struct comedi_subdevice *s)
{
- unsigned runflags = comedi_get_subdevice_runflags(s);
+ unsigned runflags = __comedi_get_subdevice_runflags(s);
- return (runflags & COMEDI_SRF_ERROR) ? true : false;
+ return comedi_is_runflags_running(runflags);
}
static bool comedi_is_subdevice_idle(struct comedi_subdevice *s)
{
unsigned runflags = comedi_get_subdevice_runflags(s);
- return (runflags & COMEDI_SRF_BUSY_MASK) ? false : true;
+ return !(runflags & COMEDI_SRF_BUSY_MASK);
}
/**
{
struct comedi_async *async = s->async;
- comedi_set_subdevice_runflags(s, COMEDI_SRF_RUNNING, 0);
+ comedi_update_subdevice_runflags(s, COMEDI_SRF_RUNNING, 0);
if (async) {
comedi_buf_reset(s);
async->inttrig = NULL;
kfree(async->cmd.chanlist);
async->cmd.chanlist = NULL;
s->busy = NULL;
- wake_up_interruptible_all(&s->async->wait_head);
+ wake_up_interruptible_all(&async->wait_head);
} else {
dev_err(dev->class_dev,
"BUG: (?) do_become_nonbusy called with async=NULL\n");
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
- if (arg == NULL) {
+ if (!arg) {
if (is_device_busy(dev))
return -EBUSY;
if (dev->attached) {
if (async->cmd.flags & CMDF_WAKE_EOS)
async->cb_mask |= COMEDI_CB_EOS;
- comedi_set_subdevice_runflags(s, COMEDI_SRF_BUSY_MASK,
- COMEDI_SRF_RUNNING);
+ comedi_update_subdevice_runflags(s, COMEDI_SRF_BUSY_MASK,
+ COMEDI_SRF_RUNNING);
/*
* Set s->busy _after_ setting COMEDI_SRF_RUNNING flag to avoid
if (arg >= dev->n_subdevices)
return -EINVAL;
s = &dev->subdevices[arg];
- if (s->async == NULL)
+ if (!s->async)
return -EINVAL;
if (!s->busy)
add_wait_queue(&async->wait_head, &wait);
on_wait_queue = true;
while (nbytes > 0 && !retval) {
+ unsigned runflags;
+
set_current_state(TASK_INTERRUPTIBLE);
- if (!comedi_is_subdevice_running(s)) {
+ runflags = comedi_get_subdevice_runflags(s);
+ if (!comedi_is_runflags_running(runflags)) {
if (count == 0) {
struct comedi_subdevice *new_s;
- if (comedi_is_subdevice_in_error(s))
+ if (comedi_is_runflags_in_error(runflags))
retval = -EPIPE;
else
retval = 0;
n = m;
if (n == 0) {
- if (!comedi_is_subdevice_running(s)) {
- if (comedi_is_subdevice_in_error(s))
+ unsigned runflags = comedi_get_subdevice_runflags(s);
+
+ if (!comedi_is_runflags_running(runflags)) {
+ if (comedi_is_runflags_in_error(runflags))
retval = -EPIPE;
else
retval = 0;
void comedi_event(struct comedi_device *dev, struct comedi_subdevice *s)
{
struct comedi_async *async = s->async;
- unsigned runflags = 0;
- unsigned runflags_mask = 0;
+ unsigned int events;
+ int si_code = 0;
+ unsigned long flags;
- if (!comedi_is_subdevice_running(s))
+ spin_lock_irqsave(&s->spin_lock, flags);
+
+ events = async->events;
+ async->events = 0;
+ if (!__comedi_is_subdevice_running(s)) {
+ spin_unlock_irqrestore(&s->spin_lock, flags);
return;
+ }
- if (s->async->events & COMEDI_CB_CANCEL_MASK)
- runflags_mask |= COMEDI_SRF_RUNNING;
+ if (events & COMEDI_CB_CANCEL_MASK)
+ __comedi_clear_subdevice_runflags(s, COMEDI_SRF_RUNNING);
/*
- * Remember if an error event has occurred, so an error
- * can be returned the next time the user does a read().
+ * Remember if an error event has occurred, so an error can be
+ * returned the next time the user does a read() or write().
*/
- if (s->async->events & COMEDI_CB_ERROR_MASK) {
- runflags_mask |= COMEDI_SRF_ERROR;
- runflags |= COMEDI_SRF_ERROR;
- }
- if (runflags_mask) {
- /*
- * Sets COMEDI_SRF_ERROR and COMEDI_SRF_RUNNING together
- * atomically.
- */
- comedi_set_subdevice_runflags(s, runflags_mask, runflags);
- }
+ if (events & COMEDI_CB_ERROR_MASK)
+ __comedi_set_subdevice_runflags(s, COMEDI_SRF_ERROR);
- if (async->cb_mask & s->async->events) {
+ if (async->cb_mask & events) {
wake_up_interruptible(&async->wait_head);
- if (s->subdev_flags & SDF_CMD_READ)
- kill_fasync(&dev->async_queue, SIGIO, POLL_IN);
- if (s->subdev_flags & SDF_CMD_WRITE)
- kill_fasync(&dev->async_queue, SIGIO, POLL_OUT);
+ si_code = async->cmd.flags & CMDF_WRITE ? POLL_OUT : POLL_IN;
}
- s->async->events = 0;
+
+ spin_unlock_irqrestore(&s->spin_lock, flags);
+
+ if (si_code)
+ kill_fasync(&dev->async_queue, SIGIO, si_code);
}
EXPORT_SYMBOL_GPL(comedi_event);
unsigned i;
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
- if (dev == NULL)
+ if (!dev)
return ERR_PTR(-ENOMEM);
comedi_device_init(dev);
comedi_set_hw_dev(dev, hardware_device);
mutex_lock(&comedi_board_minor_table_lock);
for (i = hardware_device ? comedi_num_legacy_minors : 0;
i < COMEDI_NUM_BOARD_MINORS; ++i) {
- if (comedi_board_minor_table[i] == NULL) {
+ if (!comedi_board_minor_table[i]) {
comedi_board_minor_table[i] = dev;
break;
}
mutex_unlock(&dev->mutex);
comedi_device_cleanup(dev);
comedi_dev_put(dev);
- pr_err("ran out of minor numbers for board device files\n");
+ dev_err(hardware_device,
+ "ran out of minor numbers for board device files\n");
return ERR_PTR(-EBUSY);
}
dev->minor = i;
mutex_lock(&comedi_subdevice_minor_table_lock);
for (i = 0; i < COMEDI_NUM_SUBDEVICE_MINORS; ++i) {
- if (comedi_subdevice_minor_table[i] == NULL) {
+ if (!comedi_subdevice_minor_table[i]) {
comedi_subdevice_minor_table[i] = s;
break;
}
}
mutex_unlock(&comedi_subdevice_minor_table_lock);
if (i == COMEDI_NUM_SUBDEVICE_MINORS) {
- pr_err("ran out of minor numbers for subdevice files\n");
+ dev_err(dev->class_dev,
+ "ran out of minor numbers for subdevice files\n");
return -EBUSY;
}
i += COMEDI_NUM_BOARD_MINORS;
{
unsigned int i;
- if (s == NULL)
+ if (!s)
return;
if (s->minor < 0)
return;
#ifndef _COMEDI_INTERNAL_H
#define _COMEDI_INTERNAL_H
+#include <linux/compiler.h>
#include <linux/types.h>
/*
* various internal comedi stuff
*/
+
+struct comedi_buf_map;
+struct comedi_devconfig;
+struct comedi_device;
+struct comedi_insn;
+struct comedi_rangeinfo;
+struct comedi_subdevice;
+struct device;
+
int do_rangeinfo_ioctl(struct comedi_device *dev,
struct comedi_rangeinfo __user *arg);
struct comedi_device *comedi_alloc_board_minor(struct device *hardware_device);
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "comedidev.h"
+#include "comedi_pci.h"
/**
* comedi_to_pci_dev() - comedi_device pointer to pci_dev pointer.
--- /dev/null
+/*
+ * comedi_pci.h
+ * header file for Comedi PCI drivers
+ *
+ * COMEDI - Linux Control and Measurement Device Interface
+ * Copyright (C) 1997-2000 David A. Schleef <ds@schleef.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _COMEDI_PCI_H
+#define _COMEDI_PCI_H
+
+#include <linux/pci.h>
+
+#include "comedidev.h"
+
+/*
+ * PCI Vendor IDs not in <linux/pci_ids.h>
+ */
+#define PCI_VENDOR_ID_KOLTER 0x1001
+#define PCI_VENDOR_ID_ICP 0x104c
+#define PCI_VENDOR_ID_DT 0x1116
+#define PCI_VENDOR_ID_IOTECH 0x1616
+#define PCI_VENDOR_ID_CONTEC 0x1221
+#define PCI_VENDOR_ID_RTD 0x1435
+#define PCI_VENDOR_ID_HUMUSOFT 0x186c
+
+struct pci_dev *comedi_to_pci_dev(struct comedi_device *);
+
+int comedi_pci_enable(struct comedi_device *);
+void comedi_pci_disable(struct comedi_device *);
+void comedi_pci_detach(struct comedi_device *);
+
+int comedi_pci_auto_config(struct pci_dev *, struct comedi_driver *,
+ unsigned long context);
+void comedi_pci_auto_unconfig(struct pci_dev *);
+
+int comedi_pci_driver_register(struct comedi_driver *, struct pci_driver *);
+void comedi_pci_driver_unregister(struct comedi_driver *, struct pci_driver *);
+
+/**
+ * module_comedi_pci_driver() - Helper macro for registering a comedi PCI driver
+ * @__comedi_driver: comedi_driver struct
+ * @__pci_driver: pci_driver struct
+ *
+ * Helper macro for comedi PCI drivers which do not do anything special
+ * in module init/exit. This eliminates a lot of boilerplate. Each
+ * module may only use this macro once, and calling it replaces
+ * module_init() and module_exit()
+ */
+#define module_comedi_pci_driver(__comedi_driver, __pci_driver) \
+ module_driver(__comedi_driver, comedi_pci_driver_register, \
+ comedi_pci_driver_unregister, &(__pci_driver))
+
+#endif /* _COMEDI_PCI_H */
struct comedi_device {
int use_count;
struct comedi_driver *driver;
+ struct comedi_8254 *pacer;
void *private;
struct device *class_dev;
return nsamples << comedi_sample_shift(s);
}
+/**
+ * comedi_check_trigger_src() - trivially validate a comedi_cmd trigger source
+ * @src: pointer to the trigger source to validate
+ * @flags: bitmask of valid TRIG_* for the trigger
+ *
+ * This is used in "step 1" of the do_cmdtest functions of comedi drivers
+ * to vaildate the comedi_cmd triggers. The mask of the @src against the
+ * @flags allows the userspace comedilib to pass all the comedi_cmd
+ * triggers as TRIG_ANY and get back a bitmask of the valid trigger sources.
+ */
+static inline int comedi_check_trigger_src(unsigned int *src,
+ unsigned int flags)
+{
+ unsigned int orig_src = *src;
+
+ *src = orig_src & flags;
+ if (*src == TRIG_INVALID || *src != orig_src)
+ return -EINVAL;
+ return 0;
+}
+
+/**
+ * comedi_check_trigger_is_unique() - make sure a trigger source is unique
+ * @src: the trigger source to check
+ */
+static inline int comedi_check_trigger_is_unique(unsigned int src)
+{
+ /* this test is true if more than one _src bit is set */
+ if ((src & (src - 1)) != 0)
+ return -EINVAL;
+ return 0;
+}
+
+/**
+ * comedi_check_trigger_arg_is() - trivially validate a trigger argument
+ * @arg: pointer to the trigger arg to validate
+ * @val: the value the argument should be
+ */
+static inline int comedi_check_trigger_arg_is(unsigned int *arg,
+ unsigned int val)
+{
+ if (*arg != val) {
+ *arg = val;
+ return -EINVAL;
+ }
+ return 0;
+}
+
+/**
+ * comedi_check_trigger_arg_min() - trivially validate a trigger argument
+ * @arg: pointer to the trigger arg to validate
+ * @val: the minimum value the argument should be
+ */
+static inline int comedi_check_trigger_arg_min(unsigned int *arg,
+ unsigned int val)
+{
+ if (*arg < val) {
+ *arg = val;
+ return -EINVAL;
+ }
+ return 0;
+}
+
+/**
+ * comedi_check_trigger_arg_max() - trivially validate a trigger argument
+ * @arg: pointer to the trigger arg to validate
+ * @val: the maximum value the argument should be
+ */
+static inline int comedi_check_trigger_arg_max(unsigned int *arg,
+ unsigned int val)
+{
+ if (*arg > val) {
+ *arg = val;
+ return -EINVAL;
+ }
+ return 0;
+}
+
/*
* Must set dev->hw_dev if you wish to dma directly into comedi's buffer.
* Also useful for retrieving a previously configured hardware device of
module_driver(__comedi_driver, comedi_driver_register, \
comedi_driver_unregister)
-/* comedi_pci.c - comedi PCI driver specific functions */
-
-/*
- * PCI Vendor IDs not in <linux/pci_ids.h>
- */
-#define PCI_VENDOR_ID_KOLTER 0x1001
-#define PCI_VENDOR_ID_ICP 0x104c
-#define PCI_VENDOR_ID_DT 0x1116
-#define PCI_VENDOR_ID_IOTECH 0x1616
-#define PCI_VENDOR_ID_CONTEC 0x1221
-#define PCI_VENDOR_ID_RTD 0x1435
-#define PCI_VENDOR_ID_HUMUSOFT 0x186c
-
-struct pci_dev;
-struct pci_driver;
-
-struct pci_dev *comedi_to_pci_dev(struct comedi_device *);
-
-int comedi_pci_enable(struct comedi_device *);
-void comedi_pci_disable(struct comedi_device *);
-void comedi_pci_detach(struct comedi_device *);
-
-int comedi_pci_auto_config(struct pci_dev *, struct comedi_driver *,
- unsigned long context);
-void comedi_pci_auto_unconfig(struct pci_dev *);
-
-int comedi_pci_driver_register(struct comedi_driver *, struct pci_driver *);
-void comedi_pci_driver_unregister(struct comedi_driver *, struct pci_driver *);
-
-/**
- * module_comedi_pci_driver() - Helper macro for registering a comedi PCI driver
- * @__comedi_driver: comedi_driver struct
- * @__pci_driver: pci_driver struct
- *
- * Helper macro for comedi PCI drivers which do not do anything special
- * in module init/exit. This eliminates a lot of boilerplate. Each
- * module may only use this macro once, and calling it replaces
- * module_init() and module_exit()
- */
-#define module_comedi_pci_driver(__comedi_driver, __pci_driver) \
- module_driver(__comedi_driver, comedi_pci_driver_register, \
- comedi_pci_driver_unregister, &(__pci_driver))
-
#endif /* _COMEDIDEV_H */
{
if (hw_dev == dev->hw_dev)
return 0;
- if (dev->hw_dev != NULL)
+ if (dev->hw_dev)
return -EEXIST;
dev->hw_dev = get_device(hw_dev);
return 0;
dev->n_subdevices = 0;
}
kfree(dev->private);
+ kfree(dev->pacer);
dev->private = NULL;
+ dev->pacer = NULL;
dev->driver = NULL;
dev->board_name = NULL;
dev->board_ptr = NULL;
}
module_put(driv->module);
}
- if (driv == NULL) {
+ if (!driv) {
/* recognize has failed if we get here */
/* report valid board names before returning error */
for (driv = comedi_drivers; driv; driv = driv->next) {
ret = -EIO;
goto out;
}
- if (driv->attach == NULL) {
+ if (!driv->attach) {
/* driver does not support manual configuration */
dev_warn(dev->class_dev,
"driver '%s' does not support attach using comedi_config\n",
void comedi_auto_unconfig(struct device *hardware_device)
{
- if (hardware_device == NULL)
+ if (!hardware_device)
return;
comedi_release_hardware_device(hardware_device);
}
+++ /dev/null
-/*
- * comedi/drivers/8253.h
- * Header file for 8253
- *
- * COMEDI - Linux Control and Measurement Device Interface
- * Copyright (C) 2000 David A. Schleef <ds@schleef.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _8253_H
-#define _8253_H
-
-#include "../comedi.h"
-
-/*
- * Common oscillator base values in nanoseconds
- */
-#define I8254_OSC_BASE_10MHZ 100
-#define I8254_OSC_BASE_5MHZ 200
-#define I8254_OSC_BASE_4MHZ 250
-#define I8254_OSC_BASE_2MHZ 500
-#define I8254_OSC_BASE_1MHZ 1000
-
-static inline void i8253_cascade_ns_to_timer(int i8253_osc_base,
- unsigned int *d1,
- unsigned int *d2,
- unsigned int *nanosec,
- unsigned int flags)
-{
- unsigned int divider;
- unsigned int div1, div2;
- unsigned int div1_glb, div2_glb, ns_glb;
- unsigned int div1_lub, div2_lub, ns_lub;
- unsigned int ns;
- unsigned int start;
- unsigned int ns_low, ns_high;
- static const unsigned int max_count = 0x10000;
- /*
- * exit early if everything is already correct (this can save time
- * since this function may be called repeatedly during command tests
- * and execution)
- */
- div1 = *d1 ? *d1 : max_count;
- div2 = *d2 ? *d2 : max_count;
- divider = div1 * div2;
- if (div1 * div2 * i8253_osc_base == *nanosec &&
- div1 > 1 && div1 <= max_count && div2 > 1 && div2 <= max_count &&
- /* check for overflow */
- divider > div1 && divider > div2 &&
- divider * i8253_osc_base > divider &&
- divider * i8253_osc_base > i8253_osc_base) {
- return;
- }
-
- divider = *nanosec / i8253_osc_base;
-
- div1_lub = div2_lub = 0;
- div1_glb = div2_glb = 0;
-
- ns_glb = 0;
- ns_lub = 0xffffffff;
-
- div2 = max_count;
- start = divider / div2;
- if (start < 2)
- start = 2;
- for (div1 = start; div1 <= divider / div1 + 1 && div1 <= max_count;
- div1++) {
- for (div2 = divider / div1;
- div1 * div2 <= divider + div1 + 1 && div2 <= max_count;
- div2++) {
- ns = i8253_osc_base * div1 * div2;
- if (ns <= *nanosec && ns > ns_glb) {
- ns_glb = ns;
- div1_glb = div1;
- div2_glb = div2;
- }
- if (ns >= *nanosec && ns < ns_lub) {
- ns_lub = ns;
- div1_lub = div1;
- div2_lub = div2;
- }
- }
- }
-
- switch (flags & CMDF_ROUND_MASK) {
- case CMDF_ROUND_NEAREST:
- default:
- ns_high = div1_lub * div2_lub * i8253_osc_base;
- ns_low = div1_glb * div2_glb * i8253_osc_base;
- if (ns_high - *nanosec < *nanosec - ns_low) {
- div1 = div1_lub;
- div2 = div2_lub;
- } else {
- div1 = div1_glb;
- div2 = div2_glb;
- }
- break;
- case CMDF_ROUND_UP:
- div1 = div1_lub;
- div2 = div2_lub;
- break;
- case CMDF_ROUND_DOWN:
- div1 = div1_glb;
- div2 = div2_glb;
- break;
- }
-
- *nanosec = div1 * div2 * i8253_osc_base;
- /* masking is done since counter maps zero to 0x10000 */
- *d1 = div1 & 0xffff;
- *d2 = div2 & 0xffff;
-}
-
-#ifndef CMDTEST
-/*
- * i8254_load programs 8254 counter chip. It should also work for the 8253.
- * base_address is the lowest io address
- * for the chip (the address of counter 0).
- * counter_number is the counter you want to load (0,1 or 2)
- * count is the number to load into the counter.
- *
- * You probably want to use mode 2.
- *
- * Use i8254_mm_load() if you board uses memory-mapped io, it is
- * the same as i8254_load() except it uses writeb() instead of outb().
- *
- * Neither i8254_load() or i8254_read() do their loading/reading
- * atomically. The 16 bit read/writes are performed with two successive
- * 8 bit read/writes. So if two parts of your driver do a load/read on
- * the same counter, it may be necessary to protect these functions
- * with a spinlock.
- *
- * FMH
- */
-
-#define i8254_control_reg 3
-
-static inline int i8254_load(unsigned long base_address, unsigned int regshift,
- unsigned int counter_number, unsigned int count,
- unsigned int mode)
-{
- unsigned int byte;
-
- if (counter_number > 2)
- return -1;
- if (count > 0xffff)
- return -1;
- if (mode > 5)
- return -1;
- if ((mode == 2 || mode == 3) && count == 1)
- return -1;
-
- byte = counter_number << 6;
- byte |= 0x30; /* load low then high byte */
- byte |= (mode << 1); /* set counter mode */
- outb(byte, base_address + (i8254_control_reg << regshift));
- byte = count & 0xff; /* lsb of counter value */
- outb(byte, base_address + (counter_number << regshift));
- byte = (count >> 8) & 0xff; /* msb of counter value */
- outb(byte, base_address + (counter_number << regshift));
-
- return 0;
-}
-
-static inline int i8254_mm_load(void __iomem *base_address,
- unsigned int regshift,
- unsigned int counter_number,
- unsigned int count,
- unsigned int mode)
-{
- unsigned int byte;
-
- if (counter_number > 2)
- return -1;
- if (count > 0xffff)
- return -1;
- if (mode > 5)
- return -1;
- if ((mode == 2 || mode == 3) && count == 1)
- return -1;
-
- byte = counter_number << 6;
- byte |= 0x30; /* load low then high byte */
- byte |= (mode << 1); /* set counter mode */
- writeb(byte, base_address + (i8254_control_reg << regshift));
- byte = count & 0xff; /* lsb of counter value */
- writeb(byte, base_address + (counter_number << regshift));
- byte = (count >> 8) & 0xff; /* msb of counter value */
- writeb(byte, base_address + (counter_number << regshift));
-
- return 0;
-}
-
-/* Returns 16 bit counter value, should work for 8253 also. */
-static inline int i8254_read(unsigned long base_address, unsigned int regshift,
- unsigned int counter_number)
-{
- unsigned int byte;
- int ret;
-
- if (counter_number > 2)
- return -1;
-
- /* latch counter */
- byte = counter_number << 6;
- outb(byte, base_address + (i8254_control_reg << regshift));
-
- /* read lsb */
- ret = inb(base_address + (counter_number << regshift));
- /* read msb */
- ret += inb(base_address + (counter_number << regshift)) << 8;
-
- return ret;
-}
-
-static inline int i8254_mm_read(void __iomem *base_address,
- unsigned int regshift,
- unsigned int counter_number)
-{
- unsigned int byte;
- int ret;
-
- if (counter_number > 2)
- return -1;
-
- /* latch counter */
- byte = counter_number << 6;
- writeb(byte, base_address + (i8254_control_reg << regshift));
-
- /* read lsb */
- ret = readb(base_address + (counter_number << regshift));
- /* read msb */
- ret += readb(base_address + (counter_number << regshift)) << 8;
-
- return ret;
-}
-
-/* Loads 16 bit initial counter value, should work for 8253 also. */
-static inline void i8254_write(unsigned long base_address,
- unsigned int regshift,
- unsigned int counter_number, unsigned int count)
-{
- unsigned int byte;
-
- if (counter_number > 2)
- return;
-
- byte = count & 0xff; /* lsb of counter value */
- outb(byte, base_address + (counter_number << regshift));
- byte = (count >> 8) & 0xff; /* msb of counter value */
- outb(byte, base_address + (counter_number << regshift));
-}
-
-static inline void i8254_mm_write(void __iomem *base_address,
- unsigned int regshift,
- unsigned int counter_number,
- unsigned int count)
-{
- unsigned int byte;
-
- if (counter_number > 2)
- return;
-
- byte = count & 0xff; /* lsb of counter value */
- writeb(byte, base_address + (counter_number << regshift));
- byte = (count >> 8) & 0xff; /* msb of counter value */
- writeb(byte, base_address + (counter_number << regshift));
-}
-
-/*
- * Set counter mode, should work for 8253 also.
- * Note: the 'mode' value is different to that for i8254_load() and comes
- * from the INSN_CONFIG_8254_SET_MODE command:
- * I8254_MODE0, I8254_MODE1, ..., I8254_MODE5
- * OR'ed with:
- * I8254_BCD, I8254_BINARY
- */
-static inline int i8254_set_mode(unsigned long base_address,
- unsigned int regshift,
- unsigned int counter_number, unsigned int mode)
-{
- unsigned int byte;
-
- if (counter_number > 2)
- return -1;
- if (mode > (I8254_MODE5 | I8254_BCD))
- return -1;
-
- byte = counter_number << 6;
- byte |= 0x30; /* load low then high byte */
- byte |= mode; /* set counter mode and BCD|binary */
- outb(byte, base_address + (i8254_control_reg << regshift));
-
- return 0;
-}
-
-static inline int i8254_mm_set_mode(void __iomem *base_address,
- unsigned int regshift,
- unsigned int counter_number,
- unsigned int mode)
-{
- unsigned int byte;
-
- if (counter_number > 2)
- return -1;
- if (mode > (I8254_MODE5 | I8254_BCD))
- return -1;
-
- byte = counter_number << 6;
- byte |= 0x30; /* load low then high byte */
- byte |= mode; /* set counter mode and BCD|binary */
- writeb(byte, base_address + (i8254_control_reg << regshift));
-
- return 0;
-}
-
-static inline int i8254_status(unsigned long base_address,
- unsigned int regshift,
- unsigned int counter_number)
-{
- outb(0xE0 | (2 << counter_number),
- base_address + (i8254_control_reg << regshift));
- return inb(base_address + (counter_number << regshift));
-}
-
-static inline int i8254_mm_status(void __iomem *base_address,
- unsigned int regshift,
- unsigned int counter_number)
-{
- writeb(0xE0 | (2 << counter_number),
- base_address + (i8254_control_reg << regshift));
- return readb(base_address + (counter_number << regshift));
-}
-
-#endif
-
-#endif
#include <linux/module.h>
#include "../comedidev.h"
-#include "comedi_fc.h"
#include "8255.h"
struct subdev_8255_private {
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "8255.h"
},
};
-/* ripped from mite.h and mite_setup2() to avoid mite dependancy */
+/* ripped from mite.h and mite_setup2() to avoid mite dependency */
#define MITE_IODWBSR 0xc0 /* IO Device Window Base Size Register */
#define WENAB (1 << 7) /* window enable */
ccflags-$(CONFIG_COMEDI_DEBUG) := -DDEBUG
# Comedi "helper" modules
+obj-$(CONFIG_COMEDI_8254) += comedi_8254.o
obj-$(CONFIG_COMEDI_ISADMA) += comedi_isadma.o
# Comedi misc drivers
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
-#include "comedi_fc.h"
+#include "../comedi_pci.h"
#include "amcc_s5933.h"
/*
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_NONE);
if (err)
return 1;
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
if (!devpriv->ctrl) {
dev_warn(dev->class_dev,
- "Interrupts disabled due to mode configuration!\n");
+ "Interrupts disabled due to mode configuration!\n");
return -EINVAL;
}
}
static int apci1032_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct apci1032_private *devpriv;
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
-#include "comedi_fc.h"
+#include "../comedi_pci.h"
#include "amcc_s5933.h"
#include "z8536.h"
*
* Mask Meaning
* ---------- ------------------------------------------
- * 0x00000001 Event 1 has occured
- * 0x00000010 Event 2 has occured
+ * 0x00000001 Event 1 has occurred
+ * 0x00000010 Event 2 has occurred
* 0x00000100 Counter/timer 1 has run down (not implemented)
* 0x00001000 Counter/timer 2 has run down (not implemented)
* 0x00010000 Counter 3 has run down (not implemented)
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_INT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_INT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_NONE);
if (err)
return 1;
* 3 OR mode for Port A (digital inputs 0-7)
* OR mode for Port B (digital inputs 8-13 and internal signals)
*/
- err |= cfc_check_trigger_arg_max(&cmd->start_arg, 3);
+ err |= comedi_check_trigger_arg_max(&cmd->start_arg, 3);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
src = pt & 0xff;
if (src)
- ret |= cfc_check_trigger_is_unique(src);
+ ret |= comedi_check_trigger_is_unique(src);
src = (pt >> 8) & 0xff;
if (src)
- ret |= cfc_check_trigger_is_unique(src);
+ ret |= comedi_check_trigger_is_unique(src);
if (ret) {
dev_dbg(dev->class_dev,
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "addi_watchdog.h"
-#include "comedi_fc.h"
/*
* PCI bar 1 I/O Register map - Digital input/output
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
-#include "../comedidev.h"
-#include "comedi_fc.h"
+#include "../comedi_pci.h"
#include "addi_tcw.h"
#include "addi_watchdog.h"
#define APCI1564_COUNTER(x) ((x) * 0x20)
struct apci1564_private {
- unsigned long eeprom; /* base address of EEPROM register */
- unsigned long timer; /* base address of 12-bit timer */
- unsigned long counters; /* base address of 32-bit counters */
- unsigned int mode1; /* riding-edge/high level channels */
- unsigned int mode2; /* falling-edge/low level channels */
- unsigned int ctrl; /* interrupt mode OR (edge) . AND (level) */
+ unsigned long eeprom; /* base address of EEPROM register */
+ unsigned long timer; /* base address of 12-bit timer */
+ unsigned long counters; /* base address of 32-bit counters */
+ unsigned int mode1; /* riding-edge/high level channels */
+ unsigned int mode2; /* falling-edge/low level channels */
+ unsigned int ctrl; /* interrupt mode OR (edge) . AND (level) */
struct task_struct *tsk_current;
};
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_NONE);
if (err)
return 1;
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
if (!devpriv->ctrl) {
dev_warn(dev->class_dev,
- "Interrupts disabled due to mode configuration!\n");
+ "Interrupts disabled due to mode configuration!\n");
return -EINVAL;
}
}
static int apci1564_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct apci1564_private *devpriv;
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
/*
* Register I/O map
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "addi_watchdog.h"
-#include "comedi_fc.h"
/*
* PCI bar 1 I/O Register map
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "addi_watchdog.h"
/*
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
-#include "comedi_fc.h"
+#include "../comedi_pci.h"
#include "amcc_s5933.h"
/*
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
TRIG_TIMER | TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
- if (cmd->scan_begin_src == TRIG_TIMER) /* Test Delay timing */
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg, 100000);
+ if (cmd->scan_begin_src == TRIG_TIMER) { /* Test Delay timing */
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ 100000);
+ }
/* minimum conversion time per sample is 10us */
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg, 10000);
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg, 10000);
- err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_min(&cmd->chanlist_len, 1);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
if (cmd->scan_begin_src == TRIG_TIMER) {
/* scan begin must be larger than the scan time */
arg = cmd->convert_arg * cmd->scan_end_arg;
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg, arg);
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg, arg);
}
if (err)
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
-#include "../comedidev.h"
-#include "comedi_fc.h"
+#include "../comedi_pci.h"
#include "amcc_s5933.h"
/*
outb(NVCMD_LOAD_HIGH, iobase + AMCC_OP_REG_MCSR_NVCMD);
apci3501_eeprom_wait(iobase);
outb(((addr + i) >> 8) & 0xff,
- iobase + AMCC_OP_REG_MCSR_NVDATA);
+ iobase + AMCC_OP_REG_MCSR_NVDATA);
apci3501_eeprom_wait(iobase);
/* Read the eeprom data byte */
/* Disable Interrupt */
ul_Command1 = inl(dev->iobase + APCI3501_TIMER_CTRL_REG);
- ul_Command1 = (ul_Command1 & 0xFFFFF9FDul);
+ ul_Command1 = ul_Command1 & 0xFFFFF9FDul;
outl(ul_Command1, dev->iobase + APCI3501_TIMER_CTRL_REG);
ui_Timer_AOWatchdog = inl(dev->iobase + APCI3501_TIMER_IRQ_REG) & 0x1;
/* Enable Interrupt Send a signal to from kernel to user space */
send_sig(SIGIO, devpriv->tsk_Current, 0);
ul_Command1 = inl(dev->iobase + APCI3501_TIMER_CTRL_REG);
- ul_Command1 = ((ul_Command1 & 0xFFFFF9FDul) | 1 << 1);
+ ul_Command1 = (ul_Command1 & 0xFFFFF9FDul) | 1 << 1;
outl(ul_Command1, dev->iobase + APCI3501_TIMER_CTRL_REG);
inl(dev->iobase + APCI3501_TIMER_STATUS_REG);
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
-
-#include "comedi_fc.h"
+#include "../comedi_pci.h"
#define CONV_UNIT_NS (1 << 0)
#define CONV_UNIT_US (1 << 1)
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
- board->ai_min_acq_ns);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
+ board->ai_min_acq_ns);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
arg = cmd->convert_arg;
err |= apci3xxx_ai_ns_to_timer(dev, &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
if (err)
return 4;
/* Time base is 20ms, let the user know the timeout */
dev_info(dev->class_dev, "watchdog enabled, timeout:%dms\n",
- 20 * reload + 20);
+ 20 * reload + 20);
break;
case INSN_CONFIG_DISARM:
spriv->wdog_ctrl = 0;
/*
* Driver: adl_pci6208
* Description: ADLink PCI-6208/6216 Series Multi-channel Analog Output Cards
- * Devices: [ADLink] PCI-6208 (adl_pci6208), PCI-6216 (adl_pci6216)
+ * Devices: [ADLink] PCI-6208 (adl_pci6208), PCI-6216
* Author: nsyeow <nsyeow@pd.jaring.my>
- * Updated: Fri, 30 Jan 2004 14:44:27 +0800
+ * Updated: Wed, 11 Feb 2015 11:37:18 +0000
* Status: untested
*
* Configuration Options: not applicable, uses PCI auto config
+ *
+ * All supported devices share the same PCI device ID and are treated as a
+ * PCI-6216 with 16 analog output channels. On a PCI-6208, the upper 8
+ * channels exist in registers, but don't go to DAC chips.
*/
#include <linux/module.h>
#include <linux/delay.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
/*
* PCI-6208/6216-GL register map
#define PCI6208_DIO_DI_MASK (0xf0)
#define PCI6208_DIO_DI_SHIFT (4)
-enum pci6208_boardid {
- BOARD_PCI6208,
- BOARD_PCI6216,
-};
-
-struct pci6208_board {
- const char *name;
- int ao_chans;
-};
-
-static const struct pci6208_board pci6208_boards[] = {
- [BOARD_PCI6208] = {
- .name = "adl_pci6208",
- .ao_chans = 8,
- },
- [BOARD_PCI6216] = {
- .name = "adl_pci6216",
- .ao_chans = 16,
- },
-};
-
static int pci6208_ao_eoc(struct comedi_device *dev,
struct comedi_subdevice *s,
struct comedi_insn *insn,
}
static int pci6208_auto_attach(struct comedi_device *dev,
- unsigned long context)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
- const struct pci6208_board *boardinfo = NULL;
struct comedi_subdevice *s;
unsigned int val;
int ret;
- if (context < ARRAY_SIZE(pci6208_boards))
- boardinfo = &pci6208_boards[context];
- if (!boardinfo)
- return -ENODEV;
- dev->board_ptr = boardinfo;
- dev->board_name = boardinfo->name;
-
ret = comedi_pci_enable(dev);
if (ret)
return ret;
/* analog output subdevice */
s->type = COMEDI_SUBD_AO;
s->subdev_flags = SDF_WRITABLE;
- s->n_chan = boardinfo->ao_chans;
+ s->n_chan = 16; /* Only 8 usable on PCI-6208 */
s->maxdata = 0xffff;
s->range_table = &range_bipolar10;
s->insn_write = pci6208_ao_insn_write;
}
static const struct pci_device_id adl_pci6208_pci_table[] = {
- { PCI_VDEVICE(ADLINK, 0x6208), BOARD_PCI6208 },
- { PCI_VDEVICE(ADLINK, 0x6216), BOARD_PCI6216 },
+ { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, 0x6208) },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
+ 0x9999, 0x6208) },
{ 0 }
};
MODULE_DEVICE_TABLE(pci, adl_pci6208_pci_table);
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
/*
* Register I/O map (32-bit access only)
#include <linux/kernel.h>
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#define PCI8164_AXIS(x) ((x) * 0x08)
#define PCI8164_CMD_MSTS_REG 0x00
}
static int adl_pci8164_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct comedi_subdevice *s;
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
-#include "8253.h"
#include "plx9052.h"
-#include "comedi_fc.h"
+#include "comedi_8254.h"
#define PCI9111_FIFO_HALF_SIZE 512
unsigned int chunk_counter;
unsigned int chunk_num_samples;
- unsigned int div1;
- unsigned int div2;
-
unsigned short ai_bounce_buffer[2 * PCI9111_FIFO_HALF_SIZE];
};
outb(flags, io_base + PLX9052_INTCSR);
}
-static void pci9111_timer_set(struct comedi_device *dev)
-{
- struct pci9111_private_data *dev_private = dev->private;
- unsigned long timer_base = dev->iobase + PCI9111_8254_BASE_REG;
-
- i8254_set_mode(timer_base, 1, 0, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(timer_base, 1, 1, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 1, 2, I8254_MODE2 | I8254_BINARY);
-
- udelay(1);
-
- i8254_write(timer_base, 1, 2, dev_private->div2);
- i8254_write(timer_base, 1, 1, dev_private->div1);
-}
-
enum pci9111_ISC0_sources {
irq_on_eoc,
irq_on_fifo_half_full
struct comedi_subdevice *s,
struct comedi_cmd *cmd)
{
- struct pci9111_private_data *dev_private = dev->private;
int err = 0;
unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src,
+ err |= comedi_check_trigger_src(&cmd->convert_src,
TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src,
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src,
TRIG_COUNT | TRIG_NONE);
if (err)
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
- if (cmd->convert_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
+ if (cmd->convert_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
PCI9111_AI_ACQUISITION_PERIOD_MIN_NS);
- else /* TRIG_EXT */
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
+ } else { /* TRIG_EXT */
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ }
- if (cmd->scan_begin_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
+ if (cmd->scan_begin_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
PCI9111_AI_ACQUISITION_PERIOD_MIN_NS);
- else /* TRIG_FOLLOW || TRIG_EXT */
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ } else { /* TRIG_FOLLOW || TRIG_EXT */
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ }
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
if (cmd->convert_src == TRIG_TIMER) {
arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ,
- &dev_private->div1,
- &dev_private->div2,
- &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
}
/*
if (arg < cmd->scan_begin_arg)
arg *= (cmd->scan_begin_arg / arg);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
if (err)
return 5;
return 0;
-
}
static int pci9111_ai_do_cmd(struct comedi_device *dev,
/* This is the same gain on every channel */
outb(CR_RANGE(cmd->chanlist[0]) & PCI9111_AI_RANGE_MASK,
- dev->iobase + PCI9111_AI_RANGE_STAT_REG);
+ dev->iobase + PCI9111_AI_RANGE_STAT_REG);
/* Set timer pacer */
dev_private->scan_delay = 0;
if (cmd->convert_src == TRIG_TIMER) {
trig |= PCI9111_AI_TRIG_CTRL_TPST;
- pci9111_timer_set(dev);
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
pci9111_fifo_reset(dev);
pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
irq_on_timer_tick);
status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG);
if ((status & PCI9111_AI_RANGE_MASK) != range) {
outb(range & PCI9111_AI_RANGE_MASK,
- dev->iobase + PCI9111_AI_RANGE_STAT_REG);
+ dev->iobase + PCI9111_AI_RANGE_STAT_REG);
}
pci9111_fifo_reset(dev);
/* disable A/D triggers (software trigger mode) and auto scan off */
outb(0, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
- /* Reset 8254 chip */
- dev_private->div1 = 0;
- dev_private->div2 = 0;
- pci9111_timer_set(dev);
-
return 0;
}
static int pci9111_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct pci9111_private_data *dev_private;
dev->irq = pcidev->irq;
}
+ dev->pacer = comedi_8254_init(dev->iobase + PCI9111_8254_BASE_REG,
+ I8254_OSC_BASE_2MHZ, I8254_IO16, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/gfp.h>
#include <linux/interrupt.h>
#include <linux/io.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "amcc_s5933.h"
-#include "8253.h"
-#include "comedi_fc.h"
+#include "comedi_8254.h"
#define IORANGE_9118 64 /* I hope */
#define PCI9118_CHANLEN 255 /*
/*
* PCI BAR2 Register map (dev->iobase)
*/
-#define PCI9118_TIMER_REG(x) (0x00 + ((x) * 4))
-#define PCI9118_TIMER_CTRL_REG 0x0c
+#define PCI9118_TIMER_BASE 0x00
#define PCI9118_AI_FIFO_REG 0x10
#define PCI9118_AO_REG(x) (0x10 + ((x) * 4))
#define PCI9118_AI_STATUS_REG 0x18
* measure can start/stop
* on external trigger
*/
- unsigned int ai_divisor1, ai_divisor2; /*
- * divisors for start of measure
- * on external start
- */
unsigned int dma_actbuf; /* which buffer is used now */
struct pci9118_dmabuf dmabuf[2];
int softsshdelay; /*
outl(intcsr, devpriv->iobase_a + AMCC_OP_REG_INTCSR);
}
-static void pci9118_timer_write(struct comedi_device *dev,
- unsigned int timer, unsigned int val)
-{
- outl(val & 0xff, dev->iobase + PCI9118_TIMER_REG(timer));
- outl((val >> 8) & 0xff, dev->iobase + PCI9118_TIMER_REG(timer));
-}
-
-static void pci9118_timer_set_mode(struct comedi_device *dev,
- unsigned int timer, unsigned int mode)
-{
- unsigned int val;
-
- val = timer << 6; /* select timer */
- val |= 0x30; /* load low then high byte */
- val |= mode; /* set timer mode and BCD|binary */
- outl(val, dev->iobase + PCI9118_TIMER_CTRL_REG);
-}
-
static void pci9118_ai_reset_fifo(struct comedi_device *dev)
{
/* writing any value resets the A/D FIFO */
devpriv->ai_cfg = PCI9118_AI_CFG_PDTRG | PCI9118_AI_CFG_PETRG |
PCI9118_AI_CFG_AM;
outl(devpriv->ai_cfg, dev->iobase + PCI9118_AI_CFG_REG);
- pci9118_timer_set_mode(dev, 0, I8254_MODE0);
- pci9118_timer_write(dev, 0, dmabuf->hw >> 1);
+ comedi_8254_load(dev->pacer, 0, dmabuf->hw >> 1,
+ I8254_MODE0 | I8254_BINARY);
devpriv->ai_cfg |= PCI9118_AI_CFG_START;
outl(devpriv->ai_cfg, dev->iobase + PCI9118_AI_CFG_REG);
}
unsigned int *div1, unsigned int *div2,
unsigned int chnsshfront)
{
+ struct comedi_8254 *pacer = dev->pacer;
struct comedi_cmd *cmd = &s->async->cmd;
- *div1 = *tim2 / I8254_OSC_BASE_4MHZ; /* convert timer (burst) */
- *div2 = *tim1 / I8254_OSC_BASE_4MHZ; /* scan timer */
+ *div1 = *tim2 / pacer->osc_base; /* convert timer (burst) */
+ *div2 = *tim1 / pacer->osc_base; /* scan timer */
*div2 = *div2 / *div1; /* major timer is c1*c2 */
if (*div2 < chans)
*div2 = chans;
- *tim2 = *div1 * I8254_OSC_BASE_4MHZ; /* real convert timer */
+ *tim2 = *div1 * pacer->osc_base; /* real convert timer */
if (cmd->convert_src == TRIG_NOW && !chnsshfront) {
/* use BSSH signal */
*div2 = chans + 2;
}
- *tim1 = *div1 * *div2 * I8254_OSC_BASE_4MHZ;
+ *tim1 = *div1 * *div2 * pacer->osc_base;
}
static void pci9118_start_pacer(struct comedi_device *dev, int mode)
{
- struct pci9118_private *devpriv = dev->private;
-
- pci9118_timer_set_mode(dev, 1, I8254_MODE2);
- pci9118_timer_set_mode(dev, 2, I8254_MODE2);
- udelay(1);
-
- if ((mode == 1) || (mode == 2) || (mode == 4)) {
- pci9118_timer_write(dev, 2, devpriv->ai_divisor2);
- pci9118_timer_write(dev, 1, devpriv->ai_divisor1);
- }
+ if (mode == 1 || mode == 2 || mode == 4)
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
}
static int pci9118_ai_cancel(struct comedi_device *dev,
if (devpriv->usedma)
pci9118_amcc_dma_ena(dev, false);
pci9118_exttrg_enable(dev, false);
- pci9118_start_pacer(dev, 0); /* stop 8254 counters */
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, false);
/* set default config (disable burst and triggers) */
devpriv->ai_cfg = PCI9118_AI_CFG_PDTRG | PCI9118_AI_CFG_PETRG;
outl(devpriv->ai_cfg, dev->iobase + PCI9118_AI_CFG_REG);
array[i] ^= 0x8000;
else
array[i] = (array[i] >> 4) & 0x0fff;
-
}
}
/* outl(0x02000000|AINT_WRITE_COMPL, devpriv->iobase_a+AMCC_OP_REG_INTCSR); */
pci9118_amcc_dma_ena(dev, true);
outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | EN_A2P_TRANSFERS,
- devpriv->iobase_a + AMCC_OP_REG_INTCSR);
+ devpriv->iobase_a + AMCC_OP_REG_INTCSR);
/* allow bus mastering */
return 0;
static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
{
struct pci9118_private *devpriv = dev->private;
+ struct comedi_8254 *pacer = dev->pacer;
struct comedi_cmd *cmd = &s->async->cmd;
unsigned int addchans = 0;
else
devpriv->ai_do = 1;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_4MHZ,
- &devpriv->ai_divisor1,
- &devpriv->ai_divisor2,
- &cmd->convert_arg,
- devpriv->ai_flags &
- CMDF_ROUND_NEAREST);
+ comedi_8254_cascade_ns_to_timer(pacer, &cmd->convert_arg,
+ devpriv->ai_flags &
+ CMDF_ROUND_NEAREST);
+ comedi_8254_update_divisors(pacer);
devpriv->ai_ctrl |= PCI9118_AI_CTRL_TMRTR;
devpriv->ai_cfg |= PCI9118_AI_CFG_AM;
outl(devpriv->ai_cfg, dev->iobase + PCI9118_AI_CFG_REG);
- pci9118_timer_set_mode(dev, 0, I8254_MODE0);
- pci9118_timer_write(dev, 0, dmabuf->hw >> 1);
+ comedi_8254_load(pacer, 0, dmabuf->hw >> 1,
+ I8254_MODE0 | I8254_BINARY);
devpriv->ai_cfg |= PCI9118_AI_CFG_START;
}
}
&cmd->scan_begin_arg, &cmd->convert_arg,
devpriv->ai_flags,
devpriv->ai_n_realscanlen,
- &devpriv->ai_divisor1,
- &devpriv->ai_divisor2,
+ &pacer->divisor1,
+ &pacer->divisor2,
devpriv->ai_add_front);
devpriv->ai_ctrl |= PCI9118_AI_CTRL_TMRTR;
if (devpriv->usedma)
devpriv->ai_ctrl |= PCI9118_AI_CTRL_DMA;
- pci9118_start_pacer(dev, -1); /* stop pacer */
-
/* set default config (disable burst and triggers) */
devpriv->ai_cfg = PCI9118_AI_CFG_PDTRG | PCI9118_AI_CFG_PETRG;
outl(devpriv->ai_cfg, dev->iobase + PCI9118_AI_CFG_REG);
int err = 0;
unsigned int flags;
unsigned int arg;
- unsigned int divisor1 = 0, divisor2 = 0;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src,
+ err |= comedi_check_trigger_src(&cmd->start_src,
TRIG_NOW | TRIG_EXT | TRIG_INT);
flags = TRIG_FOLLOW;
if (devpriv->master)
flags |= TRIG_TIMER | TRIG_EXT;
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, flags);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, flags);
flags = TRIG_TIMER | TRIG_EXT;
if (devpriv->master)
flags |= TRIG_NOW;
- err |= cfc_check_trigger_src(&cmd->convert_src, flags);
+ err |= comedi_check_trigger_src(&cmd->convert_src, flags);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src,
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src,
TRIG_COUNT | TRIG_NONE | TRIG_EXT);
if (err)
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
switch (cmd->start_src) {
case TRIG_NOW:
case TRIG_EXT:
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
break;
case TRIG_INT:
/* start_arg is the internal trigger (any value) */
}
if (cmd->scan_begin_src & (TRIG_FOLLOW | TRIG_EXT))
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
if ((cmd->scan_begin_src == TRIG_TIMER) &&
(cmd->convert_src == TRIG_TIMER) && (cmd->scan_end_arg == 1)) {
cmd->scan_begin_arg = 0;
}
- if (cmd->scan_begin_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- devpriv->ai_ns_min);
+ if (cmd->scan_begin_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ devpriv->ai_ns_min);
+ }
- if (cmd->scan_begin_src == TRIG_EXT)
+ if (cmd->scan_begin_src == TRIG_EXT) {
if (cmd->scan_begin_arg) {
cmd->scan_begin_arg = 0;
err |= -EINVAL;
- err |= cfc_check_trigger_arg_max(&cmd->scan_end_arg,
- 65535);
+ err |= comedi_check_trigger_arg_max(&cmd->scan_end_arg,
+ 65535);
}
+ }
- if (cmd->convert_src & (TRIG_TIMER | TRIG_NOW))
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
- devpriv->ai_ns_min);
+ if (cmd->convert_src & (TRIG_TIMER | TRIG_NOW)) {
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
+ devpriv->ai_ns_min);
+ }
if (cmd->convert_src == TRIG_EXT)
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
- err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->chanlist_len, 1);
- err |= cfc_check_trigger_arg_min(&cmd->scan_end_arg,
- cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_min(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if ((cmd->scan_end_arg % cmd->chanlist_len)) {
cmd->scan_end_arg =
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->scan_begin_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_4MHZ,
- &divisor1, &divisor2,
- &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
if (cmd->convert_src & (TRIG_TIMER | TRIG_NOW)) {
arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_4MHZ,
- &divisor1, &divisor2,
- &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
if (cmd->scan_begin_src == TRIG_TIMER &&
cmd->convert_src == TRIG_NOW) {
} else {
arg = cmd->convert_arg * cmd->chanlist_len;
}
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- arg);
+ err |= comedi_check_trigger_arg_min(&cmd->
+ scan_begin_arg,
+ arg);
}
}
inl(dev->iobase + PCI9118_INT_CTRL_REG);
inl(dev->iobase + PCI9118_AI_STATUS_REG);
- /* reset and stop counters */
- pci9118_timer_set_mode(dev, 0, I8254_MODE0);
- pci9118_start_pacer(dev, 0);
-
/* reset DMA and scan queue */
outl(0, dev->iobase + PCI9118_AI_BURST_NUM_REG);
outl(1, dev->iobase + PCI9118_AI_AUTOSCAN_MODE_REG);
devpriv->iobase_a = pci_resource_start(pcidev, 0);
dev->iobase = pci_resource_start(pcidev, 2);
+ dev->pacer = comedi_8254_init(dev->iobase + PCI9118_TIMER_BASE,
+ I8254_OSC_BASE_4MHZ, I8254_IO32, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
pci9118_reset(dev);
if (pcidev->irq) {
13-oct-2007
+ first try
-
-
*/
#include <linux/module.h>
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
-
/* only bits 0-4 have information about digital inputs */
data[1] = (inb(dev->iobase + ADQ12B_STINR) & ADQ12B_STINR_IN_MASK);
* Author: Michal Dobes <dobes@tesnet.cz>
*
* Thanks to ZhenGang Shang <ZhenGang.Shang@Advantech.com.cn>
- * for testing and informations.
+ * for testing and information.
*
* hardware driver for Advantech cards:
* card: PCI-1710, PCI-1710HG, PCI-1711, PCI-1713, PCI-1720, PCI-1731
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
-#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
#include "amcc_s5933.h"
#define PCI171x_AD_DATA 0 /* R: A/D data */
#define PCI171X_TIMER_BASE 0x18
-#define PCI171x_CNT0 24 /* R/W: 8254 counter 0 */
-#define PCI171x_CNT1 26 /* R/W: 8254 counter 1 */
-#define PCI171x_CNT2 28 /* R/W: 8254 counter 2 */
-#define PCI171x_CNTCTRL 30 /* W: 8254 counter control */
-
/* upper bits from status register (PCI171x_STATUS) (lower is same with control
* reg) */
#define Status_FE 0x0100 /* 1=FIFO is empty */
#define Control_EXT 0x0004 /* 1=external trigger source */
#define Control_PACER 0x0002 /* 1=enable internal 8254 trigger source */
#define Control_SW 0x0001 /* 1=enable software trigger source */
-/* bits from counter control register (PCI171x_CNTCTRL) */
-#define Counter_BCD 0x0001 /* 0 = binary counter, 1 = BCD counter */
-#define Counter_M0 0x0002 /* M0-M2 select modes 0-5 */
-#define Counter_M1 0x0004 /* 000 = mode 0, 010 = mode 2 ... */
-#define Counter_M2 0x0008
-#define Counter_RW0 0x0010 /* RW0/RW1 select read/write mode */
-#define Counter_RW1 0x0020
-#define Counter_SC0 0x0040 /* Select Counter. Only 00 or 11 may */
-#define Counter_SC1 0x0080 /* be used, 00 for CNT0,
- * 11 for read-back command */
#define PCI1720_DA0 0 /* W: D/A register 0 */
#define PCI1720_DA1 2 /* W: D/A register 1 */
unsigned char ai_et;
unsigned int ai_et_CntrlReg;
unsigned int ai_et_MuxVal;
- unsigned int next_divisor1;
- unsigned int next_divisor2;
- unsigned int divisor1;
- unsigned int divisor2;
unsigned int act_chanlist[32]; /* list of scanned channel */
unsigned char saved_seglen; /* len of the non-repeating chanlist */
unsigned char da_ranges; /* copy of D/A outpit range register */
- unsigned int cnt0_write_wait; /* after a write, wait for update of the
- * internal state */
};
static int pci171x_ai_check_chanlist(struct comedi_device *dev,
return insn->n;
}
-static void pci171x_start_pacer(struct comedi_device *dev,
- bool load_counters)
-{
- struct pci1710_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + PCI171X_TIMER_BASE;
-
- i8254_set_mode(timer_base, 1, 2, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 1, 1, I8254_MODE2 | I8254_BINARY);
-
- if (load_counters) {
- i8254_write(timer_base, 1, 2, devpriv->divisor2);
- i8254_write(timer_base, 1, 1, devpriv->divisor1);
- }
-}
-
-static int pci171x_counter_insn_read(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn,
- unsigned int *data)
-{
- unsigned int msb, lsb, ccntrl;
- int i;
-
- ccntrl = 0xD2; /* count only */
- for (i = 0; i < insn->n; i++) {
- outw(ccntrl, dev->iobase + PCI171x_CNTCTRL);
-
- lsb = inw(dev->iobase + PCI171x_CNT0) & 0xFF;
- msb = inw(dev->iobase + PCI171x_CNT0) & 0xFF;
-
- data[0] = lsb | (msb << 8);
- }
-
- return insn->n;
-}
-
-static int pci171x_counter_insn_write(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn,
- unsigned int *data)
-{
- struct pci1710_private *devpriv = dev->private;
- uint msb, lsb, ccntrl, status;
-
- lsb = data[0] & 0x00FF;
- msb = (data[0] & 0xFF00) >> 8;
-
- /* write lsb, then msb */
- outw(lsb, dev->iobase + PCI171x_CNT0);
- outw(msb, dev->iobase + PCI171x_CNT0);
-
- if (devpriv->cnt0_write_wait) {
- /* wait for the new count to be loaded */
- ccntrl = 0xE2;
- do {
- outw(ccntrl, dev->iobase + PCI171x_CNTCTRL);
- status = inw(dev->iobase + PCI171x_CNT0) & 0xFF;
- } while (status & 0x40);
- }
-
- return insn->n;
-}
-
-static int pci171x_counter_insn_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn,
- unsigned int *data)
-{
-#ifdef unused
- /* This doesn't work like a normal Comedi counter config */
- struct pci1710_private *devpriv = dev->private;
- uint ccntrl = 0;
-
- devpriv->cnt0_write_wait = data[0] & 0x20;
-
- /* internal or external clock? */
- if (!(data[0] & 0x10)) { /* internal */
- devpriv->CntrlReg &= ~Control_CNT0;
- } else {
- devpriv->CntrlReg |= Control_CNT0;
- }
- outw(devpriv->CntrlReg, dev->iobase + PCI171x_CONTROL);
-
- if (data[0] & 0x01)
- ccntrl |= Counter_M0;
- if (data[0] & 0x02)
- ccntrl |= Counter_M1;
- if (data[0] & 0x04)
- ccntrl |= Counter_M2;
- if (data[0] & 0x08)
- ccntrl |= Counter_BCD;
- ccntrl |= Counter_RW0; /* set read/write mode */
- ccntrl |= Counter_RW1;
- outw(ccntrl, dev->iobase + PCI171x_CNTCTRL);
-#endif
-
- return 1;
-}
-
static int pci1720_ao_insn_write(struct comedi_device *dev,
struct comedi_subdevice *s,
struct comedi_insn *insn,
devpriv->CntrlReg |= Control_SW;
/* reset any operations */
outw(devpriv->CntrlReg, dev->iobase + PCI171x_CONTROL);
- pci171x_start_pacer(dev, false);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, false);
outb(0, dev->iobase + PCI171x_CLRFIFO);
outb(0, dev->iobase + PCI171x_CLRINT);
outb(0, dev->iobase + PCI171x_CLRINT);
outw(devpriv->ai_et_MuxVal, dev->iobase + PCI171x_MUX);
outw(devpriv->CntrlReg, dev->iobase + PCI171x_CONTROL);
- pci171x_start_pacer(dev, true);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
return IRQ_HANDLED;
}
struct pci1710_private *devpriv = dev->private;
struct comedi_cmd *cmd = &s->async->cmd;
- pci171x_start_pacer(dev, false);
-
pci171x_ai_setup_chanlist(dev, s, cmd->chanlist, cmd->chanlist_len,
devpriv->saved_seglen);
if ((cmd->flags & CMDF_WAKE_EOS) == 0)
devpriv->CntrlReg |= Control_ONEFH;
- devpriv->divisor1 = devpriv->next_divisor1;
- devpriv->divisor2 = devpriv->next_divisor2;
-
if (cmd->convert_src == TRIG_TIMER) {
+ comedi_8254_update_divisors(dev->pacer);
+
devpriv->CntrlReg |= Control_PACER | Control_IRQEN;
if (cmd->start_src == TRIG_EXT) {
devpriv->ai_et_CntrlReg = devpriv->CntrlReg;
outw(devpriv->CntrlReg, dev->iobase + PCI171x_CONTROL);
if (cmd->start_src == TRIG_NOW)
- pci171x_start_pacer(dev, true);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
} else { /* TRIG_EXT */
devpriv->CntrlReg |= Control_EXT | Control_IRQEN;
outw(devpriv->CntrlReg, dev->iobase + PCI171x_CONTROL);
struct comedi_subdevice *s,
struct comedi_cmd *cmd)
{
- struct pci1710_private *devpriv = dev->private;
int err = 0;
- unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
+ err |= comedi_check_trigger_src(&cmd->convert_src,
+ TRIG_TIMER | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* step 2a: make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* step 2b: and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
if (cmd->convert_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg, 10000);
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg, 10000);
else /* TRIG_FOLLOW */
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
/* step 4: fix up any arguments */
if (cmd->convert_src == TRIG_TIMER) {
- arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
- &devpriv->next_divisor1,
- &devpriv->next_divisor2,
- &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
+ unsigned int arg = cmd->convert_arg;
+
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
}
if (err)
return 0;
}
+static int pci171x_insn_counter_config(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ struct pci1710_private *devpriv = dev->private;
+
+ switch (data[0]) {
+ case INSN_CONFIG_SET_CLOCK_SRC:
+ switch (data[1]) {
+ case 0: /* internal */
+ devpriv->ai_et_CntrlReg &= ~Control_CNT0;
+ break;
+ case 1: /* external */
+ devpriv->ai_et_CntrlReg |= Control_CNT0;
+ break;
+ default:
+ return -EINVAL;
+ }
+ outw(devpriv->ai_et_CntrlReg, dev->iobase + PCI171x_CONTROL);
+ break;
+ case INSN_CONFIG_GET_CLOCK_SRC:
+ if (devpriv->ai_et_CntrlReg & Control_CNT0) {
+ data[1] = 1;
+ data[2] = 0;
+ } else {
+ data[1] = 0;
+ data[2] = I8254_OSC_BASE_10MHZ;
+ }
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return insn->n;
+}
+
static int pci171x_reset(struct comedi_device *dev)
{
const struct boardtype *board = dev->board_ptr;
struct pci1710_private *devpriv = dev->private;
- outw(0x30, dev->iobase + PCI171x_CNTCTRL);
/* Software trigger, CNT0=external */
devpriv->CntrlReg = Control_SW | Control_CNT0;
/* reset any operations */
outw(devpriv->CntrlReg, dev->iobase + PCI171x_CONTROL);
outb(0, dev->iobase + PCI171x_CLRFIFO); /* clear FIFO */
outb(0, dev->iobase + PCI171x_CLRINT); /* clear INT request */
- pci171x_start_pacer(dev, false);
devpriv->da_ranges = 0;
if (board->has_ao) {
/* set DACs to 0..5V */
return ret;
dev->iobase = pci_resource_start(pcidev, 2);
+ dev->pacer = comedi_8254_init(dev->iobase + PCI171X_TIMER_BASE,
+ I8254_OSC_BASE_10MHZ, I8254_IO16, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
n_subdevices = 0;
if (board->n_aichan)
n_subdevices++;
subdev++;
}
+ /* Counter subdevice (8254) */
if (board->has_counter) {
s = &dev->subdevices[subdev];
- s->type = COMEDI_SUBD_COUNTER;
- s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
- s->n_chan = 1;
- s->maxdata = 0xffff;
- s->range_table = &range_unknown;
- s->insn_read = pci171x_counter_insn_read;
- s->insn_write = pci171x_counter_insn_write;
- s->insn_config = pci171x_counter_insn_config;
+ comedi_8254_subdevice_init(s, dev->pacer);
+
+ dev->pacer->insn_config = pci171x_insn_counter_config;
+
+ /* counters 1 and 2 are used internally for the pacer */
+ comedi_8254_set_busy(dev->pacer, 1, true);
+ comedi_8254_set_busy(dev->pacer, 2, true);
+
subdev++;
}
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
/*
* PCI Bar 2 I/O Register map (dev->iobase)
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
/*
* PCI bar 2 Register I/O map (dev->iobase)
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "8255.h"
-#include "8253.h"
+#include "comedi_8254.h"
/* hardware types of the cards */
enum hw_cards_id {
#define MAX_DO_SUBDEVS 2 /* max number of DO subdevices per card */
#define MAX_DIO_SUBDEVG 2 /* max number of DIO subdevices group per
* card */
-#define MAX_8254_SUBDEVS 1 /* max number of 8254 counter subdevs per
- * card */
- /* (could be more than one 8254 per
- * subdevice) */
-
-#define SIZE_8254 4 /* 8254 IO space length */
#define PCIDIO_MAINREG 2 /* main I/O region for all Advantech cards? */
int chans; /* num of chans */
int addr; /* PCI address ofset */
int regs; /* number of registers to read or 8255
- subdevices or 8254 chips */
+ subdevices */
unsigned int specflags; /* addon subdevice flags */
};
struct diosubd_data sdo[MAX_DO_SUBDEVS]; /* DO chans */
struct diosubd_data sdio[MAX_DIO_SUBDEVG]; /* DIO 8255 chans */
struct diosubd_data boardid; /* card supports board ID switch */
- struct diosubd_data s8254[MAX_8254_SUBDEVS]; /* 8254 subdevices */
+ unsigned long timer_regbase;
enum hw_io_access io_access;
};
.sdi[0] = { 32, PCI1735_DI, 4, 0, },
.sdo[0] = { 32, PCI1735_DO, 4, 0, },
.boardid = { 4, PCI1735_BOARDID, 1, SDF_INTERNAL, },
- .s8254[0] = { 3, PCI1735_C8254, 1, 0, },
+ .timer_regbase = PCI1735_C8254,
.io_access = IO_8b,
},
[TYPE_PCI1736] = {
.cardtype = TYPE_PCI1751,
.nsubdevs = 3,
.sdio[0] = { 48, PCI1751_DIO, 2, 0, },
- .s8254[0] = { 3, PCI1751_CNT, 1, 0, },
+ .timer_regbase = PCI1751_CNT,
.io_access = IO_8b,
},
[TYPE_PCI1752] = {
for (i = 0; i < d->regs; i++)
data[1] |= inb(dev->iobase + d->addr + i) << (8 * i);
-
return insn->n;
}
return insn->n;
}
-/*
-==============================================================================
-*/
-static int pci_8254_insn_read(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- const struct diosubd_data *d = (const struct diosubd_data *)s->private;
- unsigned int chan, chip, chipchan;
- unsigned long flags;
-
- chan = CR_CHAN(insn->chanspec); /* channel on subdevice */
- chip = chan / 3; /* chip on subdevice */
- chipchan = chan - (3 * chip); /* channel on chip on subdevice */
- spin_lock_irqsave(&s->spin_lock, flags);
- data[0] = i8254_read(dev->iobase + d->addr + (SIZE_8254 * chip),
- 0, chipchan);
- spin_unlock_irqrestore(&s->spin_lock, flags);
- return 1;
-}
-
-/*
-==============================================================================
-*/
-static int pci_8254_insn_write(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- const struct diosubd_data *d = (const struct diosubd_data *)s->private;
- unsigned int chan, chip, chipchan;
- unsigned long flags;
-
- chan = CR_CHAN(insn->chanspec); /* channel on subdevice */
- chip = chan / 3; /* chip on subdevice */
- chipchan = chan - (3 * chip); /* channel on chip on subdevice */
- spin_lock_irqsave(&s->spin_lock, flags);
- i8254_write(dev->iobase + d->addr + (SIZE_8254 * chip),
- 0, chipchan, data[0]);
- spin_unlock_irqrestore(&s->spin_lock, flags);
- return 1;
-}
-
-/*
-==============================================================================
-*/
-static int pci_8254_insn_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- const struct diosubd_data *d = (const struct diosubd_data *)s->private;
- unsigned int chan, chip, chipchan;
- unsigned long iobase;
- int ret = 0;
- unsigned long flags;
-
- chan = CR_CHAN(insn->chanspec); /* channel on subdevice */
- chip = chan / 3; /* chip on subdevice */
- chipchan = chan - (3 * chip); /* channel on chip on subdevice */
- iobase = dev->iobase + d->addr + (SIZE_8254 * chip);
- spin_lock_irqsave(&s->spin_lock, flags);
- switch (data[0]) {
- case INSN_CONFIG_SET_COUNTER_MODE:
- ret = i8254_set_mode(iobase, 0, chipchan, data[1]);
- if (ret < 0)
- ret = -EINVAL;
- break;
- case INSN_CONFIG_8254_READ_STATUS:
- data[1] = i8254_status(iobase, 0, chipchan);
- break;
- default:
- ret = -EINVAL;
- break;
- }
- spin_unlock_irqrestore(&s->spin_lock, flags);
- return ret < 0 ? ret : insn->n;
-}
-
/*
==============================================================================
*/
outb(0, dev->iobase + PCI1735_DO + 1);
outb(0, dev->iobase + PCI1735_DO + 2);
outb(0, dev->iobase + PCI1735_DO + 3);
- i8254_set_mode(dev->iobase + PCI1735_C8254, 0, 0, I8254_MODE0);
- i8254_set_mode(dev->iobase + PCI1735_C8254, 0, 1, I8254_MODE0);
- i8254_set_mode(dev->iobase + PCI1735_C8254, 0, 2, I8254_MODE0);
break;
case TYPE_PCI1736:
return 0;
}
-/*
-==============================================================================
-*/
-static int pci_dio_add_8254(struct comedi_device *dev,
- struct comedi_subdevice *s,
- const struct diosubd_data *d)
-{
- s->type = COMEDI_SUBD_COUNTER;
- s->subdev_flags = SDF_WRITABLE | SDF_READABLE;
- s->n_chan = d->chans;
- s->maxdata = 65535;
- s->len_chanlist = d->chans;
- s->insn_read = pci_8254_insn_read;
- s->insn_write = pci_8254_insn_write;
- s->insn_config = pci_8254_insn_config;
- s->private = (void *)d;
-
- return 0;
-}
-
static unsigned long pci_dio_override_cardtype(struct pci_dev *pcidev,
unsigned long cardtype)
{
subdev++;
}
- for (i = 0; i < MAX_8254_SUBDEVS; i++)
- if (this_board->s8254[i].chans) {
- s = &dev->subdevices[subdev];
- pci_dio_add_8254(dev, s, &this_board->s8254[i]);
- subdev++;
- }
+ if (this_board->timer_regbase) {
+ s = &dev->subdevices[subdev];
+
+ dev->pacer = comedi_8254_init(dev->iobase +
+ this_board->timer_regbase,
+ 0, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
+ comedi_8254_subdevice_init(s, dev->pacer);
+
+ subdev++;
+ }
if (this_board->cardtype == TYPE_PCI1760)
pci1760_attach(dev);
#include "../comedidev.h"
-#include "comedi_fc.h"
-
#define AIO_IIRO_16_RELAY_0_7 0x00
#define AIO_IIRO_16_INPUT_0_7 0x01
#define AIO_IIRO_16_IRQ 0x02
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_NONE);
if (err)
return 1;
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
#include "../comedidev.h"
#include "amplc_dio200.h"
-#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
#include "8255.h" /* only for register defines */
/* 200 series registers */
#define DIO200_IO_SIZE 0x20
#define DIO200_PCIE_IO_SIZE 0x4000
-#define DIO200_XCLK_SCE 0x18 /* Group X clock selection register */
-#define DIO200_YCLK_SCE 0x19 /* Group Y clock selection register */
-#define DIO200_ZCLK_SCE 0x1a /* Group Z clock selection register */
-#define DIO200_XGAT_SCE 0x1b /* Group X gate selection register */
-#define DIO200_YGAT_SCE 0x1c /* Group Y gate selection register */
-#define DIO200_ZGAT_SCE 0x1d /* Group Z gate selection register */
+#define DIO200_CLK_SCE(x) (0x18 + (x)) /* Group X/Y/Z clock sel reg */
+#define DIO200_GAT_SCE(x) (0x1b + (x)) /* Group X/Y/Z gate sel reg */
#define DIO200_INT_SCE 0x1e /* Interrupt enable/status register */
/* Extra registers for new PCIe boards */
#define DIO200_ENHANCE 0x20 /* 1 to enable enhanced features */
1000000, /* 1 millisecond. */
};
-struct dio200_subdev_8254 {
- unsigned int ofs; /* Counter base offset */
- unsigned int clk_sce_ofs; /* CLK_SCE base address */
- unsigned int gat_sce_ofs; /* GAT_SCE base address */
- int which; /* Bit 5 of CLK_SCE or GAT_SCE */
- unsigned int clock_src[3]; /* Current clock sources */
- unsigned int gate_src[3]; /* Current gate sources */
- spinlock_t spinlock;
-};
-
struct dio200_subdev_8255 {
unsigned int ofs; /* DIO base offset */
};
outl(val, dev->iobase + offset);
}
+static unsigned int dio200_subdev_8254_offset(struct comedi_device *dev,
+ struct comedi_subdevice *s)
+{
+ const struct dio200_board *board = dev->board_ptr;
+ struct comedi_8254 *i8254 = s->private;
+ unsigned int offset;
+
+ /* get the offset that was passed to comedi_8254_*_init() */
+ if (dev->mmio)
+ offset = i8254->mmio - dev->mmio;
+ else
+ offset = i8254->iobase - dev->iobase;
+
+ /* remove the shift that was added for PCIe boards */
+ if (board->is_pcie)
+ offset >>= 3;
+
+ /* this offset now works for the dio200_{read,write} helpers */
+ return offset;
+}
+
static int dio200_subdev_intr_insn_bits(struct comedi_device *dev,
struct comedi_subdevice *s,
struct comedi_insn *insn,
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
return IRQ_RETVAL(handled);
}
-static unsigned int dio200_subdev_8254_read_chan(struct comedi_device *dev,
- struct comedi_subdevice *s,
- unsigned int chan)
-{
- struct dio200_subdev_8254 *subpriv = s->private;
- unsigned int val;
-
- /* latch counter */
- val = chan << 6;
- dio200_write8(dev, subpriv->ofs + i8254_control_reg, val);
- /* read lsb, msb */
- val = dio200_read8(dev, subpriv->ofs + chan);
- val += dio200_read8(dev, subpriv->ofs + chan) << 8;
- return val;
-}
-
-static void dio200_subdev_8254_write_chan(struct comedi_device *dev,
- struct comedi_subdevice *s,
- unsigned int chan,
- unsigned int count)
-{
- struct dio200_subdev_8254 *subpriv = s->private;
-
- /* write lsb, msb */
- dio200_write8(dev, subpriv->ofs + chan, count & 0xff);
- dio200_write8(dev, subpriv->ofs + chan, (count >> 8) & 0xff);
-}
-
-static void dio200_subdev_8254_set_mode(struct comedi_device *dev,
- struct comedi_subdevice *s,
- unsigned int chan,
- unsigned int mode)
-{
- struct dio200_subdev_8254 *subpriv = s->private;
- unsigned int byte;
-
- byte = chan << 6;
- byte |= 0x30; /* access order: lsb, msb */
- byte |= (mode & 0xf); /* counter mode and BCD|binary */
- dio200_write8(dev, subpriv->ofs + i8254_control_reg, byte);
-}
-
-static unsigned int dio200_subdev_8254_status(struct comedi_device *dev,
- struct comedi_subdevice *s,
- unsigned int chan)
-{
- struct dio200_subdev_8254 *subpriv = s->private;
-
- /* latch status */
- dio200_write8(dev, subpriv->ofs + i8254_control_reg,
- 0xe0 | (2 << chan));
- /* read status */
- return dio200_read8(dev, subpriv->ofs + chan);
-}
-
-static int dio200_subdev_8254_read(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn,
- unsigned int *data)
-{
- struct dio200_subdev_8254 *subpriv = s->private;
- int chan = CR_CHAN(insn->chanspec);
- unsigned int n;
- unsigned long flags;
-
- for (n = 0; n < insn->n; n++) {
- spin_lock_irqsave(&subpriv->spinlock, flags);
- data[n] = dio200_subdev_8254_read_chan(dev, s, chan);
- spin_unlock_irqrestore(&subpriv->spinlock, flags);
- }
- return insn->n;
-}
-
-static int dio200_subdev_8254_write(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn,
- unsigned int *data)
-{
- struct dio200_subdev_8254 *subpriv = s->private;
- int chan = CR_CHAN(insn->chanspec);
- unsigned int n;
- unsigned long flags;
-
- for (n = 0; n < insn->n; n++) {
- spin_lock_irqsave(&subpriv->spinlock, flags);
- dio200_subdev_8254_write_chan(dev, s, chan, data[n]);
- spin_unlock_irqrestore(&subpriv->spinlock, flags);
- }
- return insn->n;
-}
-
-static int dio200_subdev_8254_set_gate_src(struct comedi_device *dev,
- struct comedi_subdevice *s,
- unsigned int counter_number,
- unsigned int gate_src)
-{
- const struct dio200_board *board = dev->board_ptr;
- struct dio200_subdev_8254 *subpriv = s->private;
- unsigned char byte;
-
- if (!board->has_clk_gat_sce)
- return -1;
- if (counter_number > 2)
- return -1;
- if (gate_src > (board->is_pcie ? 31 : 7))
- return -1;
-
- subpriv->gate_src[counter_number] = gate_src;
- byte = gat_sce(subpriv->which, counter_number, gate_src);
- dio200_write8(dev, subpriv->gat_sce_ofs, byte);
-
- return 0;
-}
-
-static int dio200_subdev_8254_get_gate_src(struct comedi_device *dev,
- struct comedi_subdevice *s,
- unsigned int counter_number)
-{
- const struct dio200_board *board = dev->board_ptr;
- struct dio200_subdev_8254 *subpriv = s->private;
-
- if (!board->has_clk_gat_sce)
- return -1;
- if (counter_number > 2)
- return -1;
-
- return subpriv->gate_src[counter_number];
-}
-
-static int dio200_subdev_8254_set_clock_src(struct comedi_device *dev,
+static void dio200_subdev_8254_set_gate_src(struct comedi_device *dev,
struct comedi_subdevice *s,
- unsigned int counter_number,
- unsigned int clock_src)
+ unsigned int chan,
+ unsigned int src)
{
- const struct dio200_board *board = dev->board_ptr;
- struct dio200_subdev_8254 *subpriv = s->private;
- unsigned char byte;
-
- if (!board->has_clk_gat_sce)
- return -1;
- if (counter_number > 2)
- return -1;
- if (clock_src > (board->is_pcie ? 31 : 7))
- return -1;
-
- subpriv->clock_src[counter_number] = clock_src;
- byte = clk_sce(subpriv->which, counter_number, clock_src);
- dio200_write8(dev, subpriv->clk_sce_ofs, byte);
+ unsigned int offset = dio200_subdev_8254_offset(dev, s);
- return 0;
+ dio200_write8(dev, DIO200_GAT_SCE(offset >> 3),
+ gat_sce((offset >> 2) & 1, chan, src));
}
-static int dio200_subdev_8254_get_clock_src(struct comedi_device *dev,
- struct comedi_subdevice *s,
- unsigned int counter_number,
- unsigned int *period_ns)
+static void dio200_subdev_8254_set_clock_src(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ unsigned int chan,
+ unsigned int src)
{
- const struct dio200_board *board = dev->board_ptr;
- struct dio200_subdev_8254 *subpriv = s->private;
- unsigned clock_src;
-
- if (!board->has_clk_gat_sce)
- return -1;
- if (counter_number > 2)
- return -1;
+ unsigned int offset = dio200_subdev_8254_offset(dev, s);
- clock_src = subpriv->clock_src[counter_number];
- *period_ns = clock_period[clock_src];
- return clock_src;
+ dio200_write8(dev, DIO200_CLK_SCE(offset >> 3),
+ clk_sce((offset >> 2) & 1, chan, src));
}
static int dio200_subdev_8254_config(struct comedi_device *dev,
struct comedi_insn *insn,
unsigned int *data)
{
- struct dio200_subdev_8254 *subpriv = s->private;
- int ret = 0;
- int chan = CR_CHAN(insn->chanspec);
- unsigned long flags;
+ const struct dio200_board *board = dev->board_ptr;
+ struct comedi_8254 *i8254 = s->private;
+ unsigned int chan = CR_CHAN(insn->chanspec);
+ unsigned int max_src = board->is_pcie ? 31 : 7;
+ unsigned int src;
+
+ if (!board->has_clk_gat_sce)
+ return -EINVAL;
- spin_lock_irqsave(&subpriv->spinlock, flags);
switch (data[0]) {
- case INSN_CONFIG_SET_COUNTER_MODE:
- if (data[1] > (I8254_MODE5 | I8254_BCD))
- ret = -EINVAL;
- else
- dio200_subdev_8254_set_mode(dev, s, chan, data[1]);
- break;
- case INSN_CONFIG_8254_READ_STATUS:
- data[1] = dio200_subdev_8254_status(dev, s, chan);
- break;
case INSN_CONFIG_SET_GATE_SRC:
- ret = dio200_subdev_8254_set_gate_src(dev, s, chan, data[2]);
- if (ret < 0)
- ret = -EINVAL;
+ src = data[2];
+ if (src > max_src)
+ return -EINVAL;
+
+ dio200_subdev_8254_set_gate_src(dev, s, chan, src);
+ i8254->gate_src[chan] = src;
break;
case INSN_CONFIG_GET_GATE_SRC:
- ret = dio200_subdev_8254_get_gate_src(dev, s, chan);
- if (ret < 0) {
- ret = -EINVAL;
- break;
- }
- data[2] = ret;
+ data[2] = i8254->gate_src[chan];
break;
case INSN_CONFIG_SET_CLOCK_SRC:
- ret = dio200_subdev_8254_set_clock_src(dev, s, chan, data[1]);
- if (ret < 0)
- ret = -EINVAL;
+ src = data[1];
+ if (src > max_src)
+ return -EINVAL;
+
+ dio200_subdev_8254_set_clock_src(dev, s, chan, src);
+ i8254->clock_src[chan] = src;
break;
case INSN_CONFIG_GET_CLOCK_SRC:
- ret = dio200_subdev_8254_get_clock_src(dev, s, chan, &data[2]);
- if (ret < 0) {
- ret = -EINVAL;
- break;
- }
- data[1] = ret;
+ data[1] = i8254->clock_src[chan];
+ data[2] = clock_period[i8254->clock_src[chan]];
break;
default:
- ret = -EINVAL;
- break;
+ return -EINVAL;
}
- spin_unlock_irqrestore(&subpriv->spinlock, flags);
- return ret < 0 ? ret : insn->n;
+
+ return insn->n;
}
static int dio200_subdev_8254_init(struct comedi_device *dev,
unsigned int offset)
{
const struct dio200_board *board = dev->board_ptr;
- struct dio200_subdev_8254 *subpriv;
- unsigned int chan;
+ struct comedi_8254 *i8254;
+ unsigned int regshift;
+ int chan;
+
+ /*
+ * PCIe boards need the offset shifted in order to get the
+ * correct base address of the timer.
+ */
+ if (board->is_pcie) {
+ offset <<= 3;
+ regshift = 3;
+ } else {
+ regshift = 0;
+ }
- subpriv = comedi_alloc_spriv(s, sizeof(*subpriv));
- if (!subpriv)
+ if (dev->mmio)
+ i8254 = comedi_8254_mm_init(dev->mmio + offset,
+ 0, I8254_IO8, regshift);
+ else
+ i8254 = comedi_8254_init(dev->iobase + offset,
+ 0, I8254_IO8, regshift);
+ if (!i8254)
return -ENOMEM;
- s->type = COMEDI_SUBD_COUNTER;
- s->subdev_flags = SDF_WRITABLE | SDF_READABLE;
- s->n_chan = 3;
- s->maxdata = 0xFFFF;
- s->insn_read = dio200_subdev_8254_read;
- s->insn_write = dio200_subdev_8254_write;
- s->insn_config = dio200_subdev_8254_config;
+ comedi_8254_subdevice_init(s, i8254);
- spin_lock_init(&subpriv->spinlock);
- subpriv->ofs = offset;
- if (board->has_clk_gat_sce) {
- /* Derive CLK_SCE and GAT_SCE register offsets from
- * 8254 offset. */
- subpriv->clk_sce_ofs = DIO200_XCLK_SCE + (offset >> 3);
- subpriv->gat_sce_ofs = DIO200_XGAT_SCE + (offset >> 3);
- subpriv->which = (offset >> 2) & 1;
- }
+ i8254->insn_config = dio200_subdev_8254_config;
+
+ /*
+ * There could be multiple timers so this driver does not
+ * use dev->pacer to save the i8254 pointer. Instead,
+ * comedi_8254_subdevice_init() saved the i8254 pointer in
+ * s->private. Set the runflag bit so that the core will
+ * automatically free it when the driver is detached.
+ */
+ s->runflags |= COMEDI_SRF_FREE_SPRIV;
/* Initialize channels. */
- for (chan = 0; chan < 3; chan++) {
- dio200_subdev_8254_set_mode(dev, s, chan,
- I8254_MODE0 | I8254_BINARY);
- if (board->has_clk_gat_sce) {
+ if (board->has_clk_gat_sce) {
+ for (chan = 0; chan < 3; chan++) {
/* Gate source 0 is VCC (logic 1). */
dio200_subdev_8254_set_gate_src(dev, s, chan, 0);
/* Clock source 0 is the dedicated clock input. */
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "amplc_dio200.h"
#include "../comedidev.h"
#include "amplc_pc236.h"
-#include "comedi_fc.h"
#include "8255.h"
static void pc236_intr_update(struct comedi_device *dev, bool enable)
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_NONE);
if (err)
return 1;
/* Step 3: check it arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
}
module_exit(amplc_pc236_common_exit);
-
MODULE_AUTHOR("Comedi http://www.comedi.org");
MODULE_DESCRIPTION("Comedi helper for amplc_pc236 and amplc_pci236");
MODULE_LICENSE("GPL");
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
-#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
/*
* PCI224/234 i/o space 1 (PCIBAR2) registers.
*/
-#define PCI224_Z2_CT0 0x14 /* 82C54 counter/timer 0 */
-#define PCI224_Z2_CT1 0x15 /* 82C54 counter/timer 1 */
-#define PCI224_Z2_CT2 0x16 /* 82C54 counter/timer 2 */
-#define PCI224_Z2_CTC 0x17 /* 82C54 counter/timer control word */
+#define PCI224_Z2_BASE 0x14 /* 82C54 counter/timer */
#define PCI224_ZCLK_SCE 0x1A /* Group Z Clock Configuration Register */
#define PCI224_ZGAT_SCE 0x1D /* Group Z Gate Configuration Register */
#define PCI224_INT_SCE 0x1E /* ISR Interrupt source mask register */
int intr_cpuid;
short intr_running;
unsigned short daccon;
- unsigned int cached_div1;
- unsigned int cached_div2;
unsigned short ao_enab; /* max 16 channels so 'short' will do */
unsigned char intsce;
};
if (!test_and_clear_bit(AO_CMD_STARTED, &devpriv->state))
return;
-
spin_lock_irqsave(&devpriv->ao_spinlock, flags);
/* Kill the interrupts. */
devpriv->intsce = 0;
pci224_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
struct comedi_cmd *cmd)
{
- struct pci224_private *devpriv = dev->private;
int err = 0;
unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_INT | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
- TRIG_EXT | TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src,
- TRIG_COUNT | TRIG_EXT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_INT | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
+ TRIG_EXT | TRIG_TIMER);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src,
+ TRIG_COUNT | TRIG_EXT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
switch (cmd->start_src) {
case TRIG_INT:
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
break;
case TRIG_EXT:
/* Force to external trigger 0. */
switch (cmd->scan_begin_src) {
case TRIG_TIMER:
- err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
- MAX_SCAN_PERIOD);
+ err |= comedi_check_trigger_arg_max(&cmd->scan_begin_arg,
+ MAX_SCAN_PERIOD);
arg = cmd->chanlist_len * CONVERT_PERIOD;
if (arg < MIN_SCAN_PERIOD)
arg = MIN_SCAN_PERIOD;
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg, arg);
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg, arg);
break;
case TRIG_EXT:
/* Force to external trigger 0. */
break;
}
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
switch (cmd->stop_src) {
case TRIG_COUNT:
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
break;
case TRIG_EXT:
/* Force to external trigger 0. */
}
break;
case TRIG_NONE:
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
break;
}
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->scan_begin_arg;
/* Use two timers. */
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
- &devpriv->cached_div1,
- &devpriv->cached_div2,
- &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
if (err)
struct comedi_subdevice *s)
{
struct pci224_private *devpriv = dev->private;
- unsigned long timer_base = devpriv->iobase1 + PCI224_Z2_CT0;
/*
* The output of timer Z2-0 will be used as the scan trigger
outb(GAT_CONFIG(2, GAT_VCC), devpriv->iobase1 + PCI224_ZGAT_SCE);
/* Z2-2 needs 10 MHz clock. */
outb(CLK_CONFIG(2, CLK_10MHZ), devpriv->iobase1 + PCI224_ZCLK_SCE);
- /* Load Z2-2 mode (2) and counter (div1). */
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
- i8254_write(timer_base, 0, 2, devpriv->cached_div1);
/* Z2-0 is clocked from Z2-2's output. */
outb(CLK_CONFIG(0, CLK_OUTNM1), devpriv->iobase1 + PCI224_ZCLK_SCE);
- /* Load Z2-0 mode (2) and counter (div2). */
- i8254_set_mode(timer_base, 0, 0, I8254_MODE2 | I8254_BINARY);
- i8254_write(timer_base, 0, 0, devpriv->cached_div2);
+
+ comedi_8254_pacer_enable(dev->pacer, 2, 0, false);
}
static int pci224_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
unsigned long flags;
/* Cannot handle null/empty chanlist. */
- if (cmd->chanlist == NULL || cmd->chanlist_len == 0)
+ if (!cmd->chanlist || cmd->chanlist_len == 0)
return -EINVAL;
-
/* Determine which channels are enabled and their load order. */
devpriv->ao_enab = 0;
outw(devpriv->daccon | PCI224_DACCON_FIFORESET,
dev->iobase + PCI224_DACCON);
- if (cmd->scan_begin_src == TRIG_TIMER)
+ if (cmd->scan_begin_src == TRIG_TIMER) {
+ comedi_8254_update_divisors(dev->pacer);
pci224_ao_start_pacer(dev, s);
+ }
spin_lock_irqsave(&devpriv->ao_spinlock, flags);
if (cmd->start_src == TRIG_INT) {
if (!devpriv->ao_scan_vals)
return -ENOMEM;
-
/* Allocate buffer to hold AO channel scan order. */
devpriv->ao_scan_order = kmalloc(sizeof(devpriv->ao_scan_order[0]) *
thisboard->ao_chans, GFP_KERNEL);
if (!devpriv->ao_scan_order)
return -ENOMEM;
-
/* Disable interrupt sources. */
devpriv->intsce = 0;
outb(0, devpriv->iobase1 + PCI224_INT_SCE);
outw(devpriv->daccon | PCI224_DACCON_FIFORESET,
dev->iobase + PCI224_DACCON);
+ dev->pacer = comedi_8254_init(devpriv->iobase1 + PCI224_Z2_BASE,
+ I8254_OSC_BASE_10MHZ, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 1);
if (ret)
return ret;
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
-#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
#include "8255.h"
/*
#define PCI230_PPI_X_C 0x02 /* User PPI (82C55) port C */
#define PCI230_PPI_X_CMD 0x03 /* User PPI (82C55) control word */
#define PCI230_Z2_CT_BASE 0x14 /* 82C54 counter/timer base */
-#define PCI230_Z2_CT0 0x14 /* 82C54 counter/timer 0 */
-#define PCI230_Z2_CT1 0x15 /* 82C54 counter/timer 1 */
-#define PCI230_Z2_CT2 0x16 /* 82C54 counter/timer 2 */
-#define PCI230_Z2_CTC 0x17 /* 82C54 counter/timer control word */
#define PCI230_ZCLK_SCE 0x1A /* Group Z Clock Configuration */
#define PCI230_ZGAT_SCE 0x1D /* Group Z Gate Configuration */
#define PCI230_INT_SCE 0x1E /* Interrupt source mask (w) */
#define CLK_EXT 7 /* external clock */
/* Macro to construct clock input configuration register value. */
#define CLK_CONFIG(chan, src) ((((chan) & 3) << 3) | ((src) & 7))
-/* Timebases in ns. */
-#define TIMEBASE_10MHZ 100
-#define TIMEBASE_1MHZ 1000
-#define TIMEBASE_100KHZ 10000
-#define TIMEBASE_10KHZ 100000
-#define TIMEBASE_1KHZ 1000000
/*
* Counter/timer gate input configuration sources.
/* PCI230 clock source periods in ns */
static const unsigned int pci230_timebase[8] = {
- [CLK_10MHZ] = TIMEBASE_10MHZ,
- [CLK_1MHZ] = TIMEBASE_1MHZ,
- [CLK_100KHZ] = TIMEBASE_100KHZ,
- [CLK_10KHZ] = TIMEBASE_10KHZ,
- [CLK_1KHZ] = TIMEBASE_1KHZ,
+ [CLK_10MHZ] = I8254_OSC_BASE_10MHZ,
+ [CLK_1MHZ] = I8254_OSC_BASE_1MHZ,
+ [CLK_100KHZ] = I8254_OSC_BASE_100KHZ,
+ [CLK_10KHZ] = I8254_OSC_BASE_10KHZ,
+ [CLK_1KHZ] = I8254_OSC_BASE_1KHZ,
};
/* PCI230 analogue input range table */
unsigned int count;
/* Set mode. */
- i8254_set_mode(dev->iobase + PCI230_Z2_CT_BASE, 0, ct, mode);
+ comedi_8254_set_mode(dev->pacer, ct, mode);
/* Determine clock source and count. */
clk_src = pci230_choose_clk_count(ns, &count, flags);
/* Program clock source. */
if (count >= 65536)
count = 0;
- i8254_write(dev->iobase + PCI230_Z2_CT_BASE, 0, ct, count);
+ comedi_8254_write(dev->pacer, ct, count);
}
static void pci230_cancel_ct(struct comedi_device *dev, unsigned int ct)
{
- i8254_set_mode(dev->iobase + PCI230_Z2_CT_BASE, 0, ct, I8254_MODE1);
/* Counter ct, 8254 mode 1, initial count not written. */
+ comedi_8254_set_mode(dev->pacer, ct, I8254_MODE1);
}
static int pci230_ai_eoc(struct comedi_device *dev,
*/
adccon = PCI230_ADC_TRIG_Z2CT2 | PCI230_ADC_FIFO_EN;
/* Set Z2-CT2 output low to avoid any false triggers. */
- i8254_set_mode(dev->iobase + PCI230_Z2_CT_BASE, 0, 2, I8254_MODE0);
+ comedi_8254_set_mode(dev->pacer, 2, I8254_MODE0);
devpriv->ai_bipolar = comedi_range_is_bipolar(s, range);
if (aref == AREF_DIFF) {
/* Differential. */
* Trigger conversion by toggling Z2-CT2 output
* (finish with output high).
*/
- i8254_set_mode(dev->iobase + PCI230_Z2_CT_BASE, 0,
- 2, I8254_MODE0);
- i8254_set_mode(dev->iobase + PCI230_Z2_CT_BASE, 0,
- 2, I8254_MODE1);
+ comedi_8254_set_mode(dev->pacer, 2, I8254_MODE0);
+ comedi_8254_set_mode(dev->pacer, 2, I8254_MODE1);
/* wait for conversion to end */
ret = comedi_timeout(dev, s, insn, pci230_ai_eoc, 0);
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_INT);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_INT);
tmp = TRIG_TIMER | TRIG_INT;
if (thisboard->min_hwver > 0 && devpriv->hwver >= 2) {
*/
tmp |= TRIG_EXT;
}
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, tmp);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, tmp);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
#define MAX_SPEED_AO 8000 /* 8000 ns => 125 kHz */
/*
switch (cmd->scan_begin_src) {
case TRIG_TIMER:
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- MAX_SPEED_AO);
- err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
- MIN_SPEED_AO);
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ MAX_SPEED_AO);
+ err |= comedi_check_trigger_arg_max(&cmd->scan_begin_arg,
+ MIN_SPEED_AO);
break;
case TRIG_EXT:
/*
}
break;
default:
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
break;
}
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
tmp = TRIG_FOLLOW | TRIG_TIMER | TRIG_INT;
if (thisboard->have_dio || thisboard->min_hwver > 0) {
*/
tmp |= TRIG_EXT;
}
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, tmp);
- err |= cfc_check_trigger_src(&cmd->convert_src,
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, tmp);
+ err |= comedi_check_trigger_src(&cmd->convert_src,
TRIG_TIMER | TRIG_INT | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
#define MAX_SPEED_AI_SE 3200 /* PCI230 SE: 3200 ns => 312.5 kHz */
#define MAX_SPEED_AI_DIFF 8000 /* PCI230 DIFF: 8000 ns => 125 kHz */
max_speed_ai = MAX_SPEED_AI_PLUS;
}
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
- max_speed_ai);
- err |= cfc_check_trigger_arg_max(&cmd->convert_arg,
- MIN_SPEED_AI);
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
+ max_speed_ai);
+ err |= comedi_check_trigger_arg_max(&cmd->convert_arg,
+ MIN_SPEED_AI);
} else if (cmd->convert_src == TRIG_EXT) {
/*
* external trigger
* convert_arg == 0 => trigger on -ve edge.
* convert_arg == 1 => trigger on +ve edge.
*/
- err |= cfc_check_trigger_arg_max(&cmd->convert_arg, 1);
+ err |= comedi_check_trigger_arg_max(&cmd->convert_arg,
+ 1);
}
} else {
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
}
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (cmd->scan_begin_src == TRIG_EXT) {
/*
err |= -EINVAL;
} else {
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
}
if (err)
* Trigger conversion by toggling Z2-CT2 output.
* Finish with output high.
*/
- i8254_set_mode(dev->iobase + PCI230_Z2_CT_BASE, 0, 2, I8254_MODE0);
- i8254_set_mode(dev->iobase + PCI230_Z2_CT_BASE, 0, 2, I8254_MODE1);
+ comedi_8254_set_mode(dev->pacer, 2, I8254_MODE0);
+ comedi_8254_set_mode(dev->pacer, 2, I8254_MODE1);
/*
* Delay. Should driver be responsible for this? An
* alternative would be to wait until conversion is complete,
* Set counter/timer 2 output high for use as the initial start
* conversion source.
*/
- i8254_set_mode(dev->iobase + PCI230_Z2_CT_BASE, 0, 2, I8254_MODE1);
+ comedi_8254_set_mode(dev->pacer, 2, I8254_MODE1);
/*
* Temporarily use CT2 output as conversion trigger source and
spin_lock_init(&devpriv->ao_stop_spinlock);
dev->board_ptr = pci230_find_pci_board(pci_dev);
- if (dev->board_ptr == NULL) {
+ if (!dev->board_ptr) {
dev_err(dev->class_dev,
"amplc_pci230: BUG! cannot determine board type!\n");
return -EINVAL;
dev->irq = pci_dev->irq;
}
+ dev->pacer = comedi_8254_init(dev->iobase + PCI230_Z2_CT_BASE,
+ 0, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
rc = comedi_alloc_subdevices(dev, 3);
if (rc)
return rc;
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "amplc_pc236.h"
#include "plx9052.h"
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
static int pci263_do_insn_bits(struct comedi_device *dev,
struct comedi_subdevice *s,
Author: ds
Updated: Mon, 04 Nov 2002 20:04:21 -0800
Status: experimental
-
-
*/
#include <linux/module.h>
#include "../comedi_pcmcia.h"
-#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
#define DAS16CS_ADC_DATA 0
#define DAS16CS_DIO_MUX 2
#define DAS16CS_MISC1 4
#define DAS16CS_MISC2 6
-#define DAS16CS_CTR0 8
-#define DAS16CS_CTR1 10
-#define DAS16CS_CTR2 12
-#define DAS16CS_CTR_CONTROL 14
+#define DAS16CS_TIMER_BASE 8
#define DAS16CS_DIO 16
struct das16cs_board {
if (!devpriv)
return -ENOMEM;
+ dev->pacer = comedi_8254_init(dev->iobase + DAS16CS_TIMER_BASE,
+ I8254_OSC_BASE_10MHZ, I8254_IO16, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 3);
if (ret)
return ret;
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
-#include "8253.h"
+#include "comedi_8254.h"
#include "8255.h"
#include "amcc_s5933.h"
-#include "comedi_fc.h"
#define AI_BUFFER_SIZE 1024 /* max ai fifo size */
#define AO_BUFFER_SIZE 1024 /* max ao fifo size */
};
struct cb_pcidas_private {
+ struct comedi_8254 *ao_pacer;
/* base addresses */
unsigned long s5933_config;
unsigned long control_status;
unsigned long adc_fifo;
unsigned long ao_registers;
- /* divisors of master clock for analog input pacing */
- unsigned int divisor1;
- unsigned int divisor2;
/* bits to write to registers */
unsigned int adc_fifo_bits;
unsigned int s5933_intcsr_bits;
/* fifo buffers */
unsigned short ai_buffer[AI_BUFFER_SIZE];
unsigned short ao_buffer[AO_BUFFER_SIZE];
- /* divisors of master clock for analog output pacing */
- unsigned int ao_divisor1;
- unsigned int ao_divisor2;
unsigned int calibration_source;
};
}
static int nvram_read(struct comedi_device *dev, unsigned int address,
- uint8_t *data)
+ uint8_t *data)
{
struct cb_pcidas_private *devpriv = dev->private;
unsigned long iobase = devpriv->s5933_config;
struct comedi_cmd *cmd)
{
const struct cb_pcidas_board *thisboard = dev->board_ptr;
- struct cb_pcidas_private *devpriv = dev->private;
int err = 0;
unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
TRIG_FOLLOW | TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src,
+ err |= comedi_check_trigger_src(&cmd->convert_src,
TRIG_TIMER | TRIG_NOW | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
switch (cmd->start_src) {
case TRIG_NOW:
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
break;
case TRIG_EXT:
/* External trigger, only CR_EDGE and CR_INVERT flags allowed */
break;
}
- if (cmd->scan_begin_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- thisboard->ai_speed * cmd->chanlist_len);
+ if (cmd->scan_begin_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ thisboard->ai_speed *
+ cmd->chanlist_len);
+ }
- if (cmd->convert_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
- thisboard->ai_speed);
+ if (cmd->convert_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
+ thisboard->ai_speed);
+ }
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->scan_begin_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
if (cmd->convert_src == TRIG_TIMER) {
arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
}
if (err)
return 0;
}
-static void cb_pcidas_ai_load_counters(struct comedi_device *dev)
-{
- struct cb_pcidas_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + ADC8254;
-
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
-
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
-}
-
static int cb_pcidas_ai_cmd(struct comedi_device *dev,
struct comedi_subdevice *s)
{
outw(bits, devpriv->control_status + ADCMUX_CONT);
/* load counters */
- if (cmd->scan_begin_src == TRIG_TIMER || cmd->convert_src == TRIG_TIMER)
- cb_pcidas_ai_load_counters(dev);
+ if (cmd->scan_begin_src == TRIG_TIMER ||
+ cmd->convert_src == TRIG_TIMER) {
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
+ }
/* enable interrupts */
spin_lock_irqsave(&dev->spinlock, flags);
const struct cb_pcidas_board *thisboard = dev->board_ptr;
struct cb_pcidas_private *devpriv = dev->private;
int err = 0;
- unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_INT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_INT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
- if (cmd->scan_begin_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- thisboard->ao_scan_speed);
+ if (cmd->scan_begin_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ thisboard->ao_scan_speed);
+ }
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
/* step 4: fix up any arguments */
if (cmd->scan_begin_src == TRIG_TIMER) {
- arg = cmd->scan_begin_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
- &devpriv->ao_divisor1,
- &devpriv->ao_divisor2,
- &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
+ unsigned int arg = cmd->scan_begin_arg;
+
+ comedi_8254_cascade_ns_to_timer(devpriv->ao_pacer,
+ &arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
if (err)
return 0;
}
-static void cb_pcidas_ao_load_counters(struct comedi_device *dev)
-{
- struct cb_pcidas_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + DAC8254;
-
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
-
- i8254_write(timer_base, 0, 1, devpriv->ao_divisor1);
- i8254_write(timer_base, 0, 2, devpriv->ao_divisor2);
-}
-
static int cb_pcidas_ao_cmd(struct comedi_device *dev,
struct comedi_subdevice *s)
{
outw(0, devpriv->ao_registers + DACFIFOCLR);
/* load counters */
- if (cmd->scan_begin_src == TRIG_TIMER)
- cb_pcidas_ao_load_counters(dev);
+ if (cmd->scan_begin_src == TRIG_TIMER) {
+ comedi_8254_update_divisors(devpriv->ao_pacer);
+ comedi_8254_pacer_enable(devpriv->ao_pacer, 1, 2, true);
+ }
/* set pacer source */
spin_lock_irqsave(&dev->spinlock, flags);
}
dev->irq = pcidev->irq;
+ dev->pacer = comedi_8254_init(dev->iobase + ADC8254,
+ I8254_OSC_BASE_10MHZ, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
+ devpriv->ao_pacer = comedi_8254_init(dev->iobase + DAC8254,
+ I8254_OSC_BASE_10MHZ,
+ I8254_IO8, 0);
+ if (!devpriv->ao_pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 7);
if (ret)
return ret;
dac08_write(dev, s->maxdata / 2);
s->readback[i] = s->maxdata / 2;
}
- } else
+ } else {
s->type = COMEDI_SUBD_UNUSED;
+ }
/* make sure mailbox 4 is empty */
inl(devpriv->s5933_config + AMCC_OP_REG_IMB4);
{
struct cb_pcidas_private *devpriv = dev->private;
- if (devpriv && devpriv->s5933_config) {
- outl(INTCSR_INBOX_INTR_STATUS,
- devpriv->s5933_config + AMCC_OP_REG_INTCSR);
+ if (devpriv) {
+ if (devpriv->s5933_config)
+ outl(INTCSR_INBOX_INTR_STATUS,
+ devpriv->s5933_config + AMCC_OP_REG_INTCSR);
+ kfree(devpriv->ao_pacer);
}
comedi_pci_detach(dev);
}
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
-#include "8253.h"
#include "8255.h"
#include "plx9080.h"
-#include "comedi_fc.h"
#define TIMER_BASE 25 /* 40MHz master clock */
/* 100kHz 'prescaled' clock for slow acquisition,
devpriv->ai_buffer[i] =
pci_alloc_consistent(pcidev, DMA_BUFFER_SIZE,
&devpriv->ai_buffer_bus_addr[i]);
- if (devpriv->ai_buffer[i] == NULL)
+ if (!devpriv->ai_buffer[i])
return -ENOMEM;
-
}
for (i = 0; i < AO_DMA_RING_COUNT; i++) {
if (ao_cmd_is_supported(thisboard)) {
pci_alloc_consistent(pcidev, DMA_BUFFER_SIZE,
&devpriv->
ao_buffer_bus_addr[i]);
- if (devpriv->ao_buffer[i] == NULL)
+ if (!devpriv->ao_buffer[i])
return -ENOMEM;
-
}
}
/* allocate dma descriptors */
pci_alloc_consistent(pcidev, sizeof(struct plx_dma_desc) *
ai_dma_ring_count(thisboard),
&devpriv->ai_dma_desc_bus_addr);
- if (devpriv->ai_dma_desc == NULL)
+ if (!devpriv->ai_dma_desc)
return -ENOMEM;
if (ao_cmd_is_supported(thisboard)) {
sizeof(struct plx_dma_desc) *
AO_DMA_RING_COUNT,
&devpriv->ao_dma_desc_bus_addr);
- if (devpriv->ao_dma_desc == NULL)
+ if (!devpriv->ao_dma_desc)
return -ENOMEM;
}
/* initialize dma descriptors */
/* get acknowledge */
if (i2c_read_ack(dev) != 0) {
- dev_err(dev->class_dev, "%s failed: no acknowledge\n",
- __func__);
+ dev_err(dev->class_dev, "failed: no acknowledge\n");
i2c_stop(dev);
return;
}
for (i = 0; i < length; i++) {
i2c_write_byte(dev, data[i]);
if (i2c_read_ack(dev) != 0) {
- dev_err(dev->class_dev, "%s failed: no acknowledge\n",
- __func__);
+ dev_err(dev->class_dev, "failed: no acknowledge\n");
i2c_stop(dev);
return;
}
}
for (n = 0; n < insn->n; n++) {
-
/* clear adc buffer (inside loop for 4020 sake) */
writew(0, devpriv->main_iobase + ADC_BUFFER_CLEAR_REG);
retval = set_ai_fifo_size(dev, fifo_size);
if (retval < 0)
return retval;
-
}
block_size = ai_fifo_size(dev) / fifo->num_segments * bytes_in_sample;
static void check_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd)
{
const struct pcidas64_board *thisboard = dev->board_ptr;
- unsigned int convert_divisor = 0, scan_divisor;
+ unsigned long long convert_divisor = 0;
+ unsigned int scan_divisor;
static const int min_convert_divisor = 3;
static const int max_convert_divisor =
max_counter_value + min_convert_divisor;
if (cmd->scan_begin_src == TRIG_TIMER) {
scan_divisor = get_divisor(cmd->scan_begin_arg, cmd->flags);
if (cmd->convert_src == TRIG_TIMER) {
- /* XXX check for integer overflows */
min_scan_divisor = convert_divisor * cmd->chanlist_len;
max_scan_divisor =
(convert_divisor * cmd->chanlist_len - 1) +
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
triggers = TRIG_TIMER;
if (thisboard->layout == LAYOUT_4020)
triggers |= TRIG_OTHER;
else
triggers |= TRIG_FOLLOW;
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, triggers);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, triggers);
triggers = TRIG_TIMER;
if (thisboard->layout == LAYOUT_4020)
triggers |= TRIG_NOW;
else
triggers |= TRIG_EXT;
- err |= cfc_check_trigger_src(&cmd->convert_src, triggers);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src,
- TRIG_COUNT | TRIG_EXT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->convert_src, triggers);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src,
+ TRIG_COUNT | TRIG_EXT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
switch (cmd->start_src) {
case TRIG_NOW:
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
break;
case TRIG_EXT:
/*
if (cmd->convert_src == TRIG_TIMER) {
if (thisboard->layout == LAYOUT_4020) {
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg,
+ 0);
} else {
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
- thisboard->ai_speed);
- /* if scans are timed faster than conversion rate allows */
- if (cmd->scan_begin_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
+ thisboard->
+ ai_speed);
+ /*
+ * if scans are timed faster than conversion rate
+ * allows
+ */
+ if (cmd->scan_begin_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(
&cmd->scan_begin_arg,
cmd->convert_arg *
cmd->chanlist_len);
+ }
}
}
- err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_min(&cmd->chanlist_len, 1);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
switch (cmd->stop_src) {
case TRIG_EXT:
break;
case TRIG_COUNT:
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
break;
case TRIG_NONE:
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
break;
default:
break;
bits |= ADC_START_TRIG_EXT_BITS;
if (cmd->start_arg & CR_INVERT)
bits |= ADC_START_TRIG_FALLING_BIT;
- } else if (cmd->start_src == TRIG_NOW)
+ } else if (cmd->start_src == TRIG_NOW) {
bits |= ADC_START_TRIG_SOFT_BITS;
+ }
if (use_hw_sample_counter(cmd))
bits |= ADC_SAMPLE_COUNTER_EN_BIT;
writew(bits, devpriv->main_iobase + ADC_CONTROL0_REG);
if (devpriv->ai_cmd_running) {
spin_unlock_irqrestore(&dev->spinlock, flags);
pio_drain_ai_fifo(dev);
- } else
+ } else {
spin_unlock_irqrestore(&dev->spinlock, flags);
+ }
}
/* if we are have all the data, then quit */
if ((cmd->stop_src == TRIG_COUNT &&
unsigned long flags;
/* board might not support ao, in which case write_subdev is NULL */
- if (s == NULL)
+ if (!s)
return;
async = s->async;
cmd = &async->cmd;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_INT | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
- TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_INT | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
+ TRIG_TIMER | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
if (cmd->scan_begin_src == TRIG_TIMER) {
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- thisboard->ao_scan_speed);
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ thisboard->ao_scan_speed);
if (get_ao_divisor(cmd->scan_begin_arg, cmd->flags) >
max_counter_value) {
cmd->scan_begin_arg = (max_counter_value + 2) *
}
}
- err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_min(&cmd->chanlist_len, 1);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (err)
return 3;
s->maxdata = 1;
s->range_table = &range_digital;
s->insn_bits = di_rbits;
- } else
+ } else {
s->type = COMEDI_SUBD_UNUSED;
+ }
/* digital output */
if (thisboard->layout == LAYOUT_64XX) {
s->maxdata = 1;
s->range_table = &range_digital;
s->insn_bits = do_wbits;
- } else
+ } else {
s->type = COMEDI_SUBD_UNUSED;
+ }
/* 8255 */
s = &dev->subdevices[4];
s->range_table = &range_digital;
s->insn_config = dio_60xx_config_insn;
s->insn_bits = dio_60xx_wbits;
- } else
+ } else {
s->type = COMEDI_SUBD_UNUSED;
+ }
/* caldac */
s = &dev->subdevices[6];
ad8402_write(dev, i, s->maxdata / 2);
s->readback[i] = s->maxdata / 2;
}
- } else
+ } else {
s->type = COMEDI_SUBD_UNUSED;
+ }
/* serial EEPROM, if present */
s = &dev->subdevices[8];
s->n_chan = 128;
s->maxdata = 0xffff;
s->insn_read = eeprom_read_insn;
- } else
+ } else {
s->type = COMEDI_SUBD_UNUSED;
+ }
/* user counter subd XXX */
s = &dev->subdevices[9];
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
-#include "comedi_fc.h"
#include "8255.h"
#define EEPROM_SIZE 128 /* number of entries in eeprom */
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
+#include "comedi_8254.h"
#include "plx9052.h"
#include "8255.h"
-/* Registers for the PCIM-DAS1602/16 and PCIe-DAS1602/16 */
-
-/* DAC Offsets */
-#define ADC_TRIG 0
-#define DAC0_OFFSET 2
-#define DAC1_OFFSET 4
-
-/* AI and Counter Constants */
-#define MUX_LIMITS 0
-#define MAIN_CONN_DIO 1
-#define ADC_STAT 2
-#define ADC_CONV_STAT 3
-#define ADC_INT 4
-#define ADC_PACER 5
-#define BURST_MODE 6
-#define PROG_GAIN 7
-#define CLK8254_1_DATA 8
-#define CLK8254_2_DATA 9
-#define CLK8254_3_DATA 10
-#define CLK8254_CONTROL 11
-#define USER_COUNTER 12
-#define RESID_COUNT_H 13
-#define RESID_COUNT_L 14
+/*
+ * PCI Bar 1 Register map
+ * see plx9052.h for register and bit defines
+ */
+
+/*
+ * PCI Bar 2 Register map (devpriv->daqio)
+ */
+#define PCIMDAS_AI_REG 0x00
+#define PCIMDAS_AI_SOFTTRIG_REG 0x00
+#define PCIMDAS_AO_REG(x) (0x02 + ((x) * 2))
+
+/*
+ * PCI Bar 3 Register map (devpriv->BADR3)
+ */
+#define PCIMDAS_MUX_REG 0x00
+#define PCIMDAS_MUX(_lo, _hi) ((_lo) | ((_hi) << 4))
+#define PCIMDAS_DI_DO_REG 0x01
+#define PCIMDAS_STATUS_REG 0x02
+#define PCIMDAS_STATUS_EOC BIT(7)
+#define PCIMDAS_STATUS_UB BIT(6)
+#define PCIMDAS_STATUS_MUX BIT(5)
+#define PCIMDAS_STATUS_CLK BIT(4)
+#define PCIMDAS_STATUS_TO_CURR_MUX(x) ((x) & 0xf)
+#define PCIMDAS_CONV_STATUS_REG 0x03
+#define PCIMDAS_CONV_STATUS_EOC BIT(7)
+#define PCIMDAS_CONV_STATUS_EOB BIT(6)
+#define PCIMDAS_CONV_STATUS_EOA BIT(5)
+#define PCIMDAS_CONV_STATUS_FNE BIT(4)
+#define PCIMDAS_CONV_STATUS_FHF BIT(3)
+#define PCIMDAS_CONV_STATUS_OVERRUN BIT(2)
+#define PCIMDAS_IRQ_REG 0x04
+#define PCIMDAS_IRQ_INTE BIT(7)
+#define PCIMDAS_IRQ_INT BIT(6)
+#define PCIMDAS_IRQ_OVERRUN BIT(4)
+#define PCIMDAS_IRQ_EOA BIT(3)
+#define PCIMDAS_IRQ_EOA_INT_SEL BIT(2)
+#define PCIMDAS_IRQ_INTSEL(x) ((x) << 0)
+#define PCIMDAS_IRQ_INTSEL_EOC PCIMDAS_IRQ_INTSEL(0)
+#define PCIMDAS_IRQ_INTSEL_FNE PCIMDAS_IRQ_INTSEL(1)
+#define PCIMDAS_IRQ_INTSEL_EOB PCIMDAS_IRQ_INTSEL(2)
+#define PCIMDAS_IRQ_INTSEL_FHF_EOA PCIMDAS_IRQ_INTSEL(3)
+#define PCIMDAS_PACER_REG 0x05
+#define PCIMDAS_PACER_GATE_STATUS BIT(6)
+#define PCIMDAS_PACER_GATE_POL BIT(5)
+#define PCIMDAS_PACER_GATE_LATCH BIT(4)
+#define PCIMDAS_PACER_GATE_EN BIT(3)
+#define PCIMDAS_PACER_EXT_PACER_POL BIT(2)
+#define PCIMDAS_PACER_SRC(x) ((x) << 0)
+#define PCIMDAS_PACER_SRC_POLLED PCIMDAS_PACER_SRC(0)
+#define PCIMDAS_PACER_SRC_EXT PCIMDAS_PACER_SRC(2)
+#define PCIMDAS_PACER_SRC_INT PCIMDAS_PACER_SRC(3)
+#define PCIMDAS_PACER_SRC_MASK (3 << 0)
+#define PCIMDAS_BURST_REG 0x06
+#define PCIMDAS_BURST_BME BIT(1)
+#define PCIMDAS_BURST_CONV_EN BIT(0)
+#define PCIMDAS_GAIN_REG 0x07
+#define PCIMDAS_8254_BASE 0x08
+#define PCIMDAS_USER_CNTR_REG 0x0c
+#define PCIMDAS_USER_CNTR_CTR1_CLK_SEL BIT(0)
+#define PCIMDAS_RESIDUE_MSB_REG 0x0d
+#define PCIMDAS_RESIDUE_LSB_REG 0x0e
+
+/*
+ * PCI Bar 4 Register map (dev->iobase)
+ */
+#define PCIMDAS_8255_BASE 0x00
+
+static const struct comedi_lrange cb_pcimdas_ai_bip_range = {
+ 4, {
+ BIP_RANGE(10),
+ BIP_RANGE(5),
+ BIP_RANGE(2.5),
+ BIP_RANGE(1.25)
+ }
+};
+
+static const struct comedi_lrange cb_pcimdas_ai_uni_range = {
+ 4, {
+ UNI_RANGE(10),
+ UNI_RANGE(5),
+ UNI_RANGE(2.5),
+ UNI_RANGE(1.25)
+ }
+};
+
+/*
+ * The Analog Output range is not programmable. The DAC ranges are
+ * jumper-settable on the board. The settings are not software-readable.
+ */
+static const struct comedi_lrange cb_pcimdas_ao_range = {
+ 4, {
+ BIP_RANGE(10),
+ BIP_RANGE(5),
+ UNI_RANGE(10),
+ UNI_RANGE(5)
+ }
+};
/*
* this structure is for data unique to this hardware driver. If
struct cb_pcimdas_private *devpriv = dev->private;
unsigned int status;
- status = inb(devpriv->BADR3 + 2);
- if ((status & 0x80) == 0)
+ status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
+ if ((status & PCIMDAS_STATUS_EOC) == 0)
return 0;
return -EBUSY;
}
-static int cb_pcimdas_ai_rinsn(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
+static int cb_pcimdas_ai_insn_read(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
{
struct cb_pcimdas_private *devpriv = dev->private;
+ unsigned int chan = CR_CHAN(insn->chanspec);
+ unsigned int range = CR_RANGE(insn->chanspec);
int n;
unsigned int d;
- int chan = CR_CHAN(insn->chanspec);
- unsigned short chanlims;
- int maxchans;
int ret;
/* only support sw initiated reads from a single channel */
- /* check channel number */
- if ((inb(devpriv->BADR3 + 2) & 0x20) == 0) /* differential mode */
- maxchans = s->n_chan / 2;
- else
- maxchans = s->n_chan;
-
- if (chan > (maxchans - 1))
- return -ETIMEDOUT; /* *** Wrong error code. Fixme. */
-
/* configure for sw initiated read */
- d = inb(devpriv->BADR3 + 5);
- if ((d & 0x03) > 0) { /* only reset if needed. */
- d = d & 0xfd;
- outb(d, devpriv->BADR3 + 5);
+ d = inb(devpriv->BADR3 + PCIMDAS_PACER_REG);
+ if ((d & PCIMDAS_PACER_SRC_MASK) != PCIMDAS_PACER_SRC_POLLED) {
+ d &= ~PCIMDAS_PACER_SRC_MASK;
+ d |= PCIMDAS_PACER_SRC_POLLED;
+ outb(d, devpriv->BADR3 + PCIMDAS_PACER_REG);
}
/* set bursting off, conversions on */
- outb(0x01, devpriv->BADR3 + 6);
+ outb(PCIMDAS_BURST_CONV_EN, devpriv->BADR3 + PCIMDAS_BURST_REG);
- /* set range to 10V. UP/BP is controlled by a switch on the board */
- outb(0x00, devpriv->BADR3 + 7);
+ /* set range */
+ outb(range, devpriv->BADR3 + PCIMDAS_GAIN_REG);
- /*
- * write channel limits to multiplexer, set Low (bits 0-3) and
- * High (bits 4-7) channels to chan.
- */
- chanlims = chan | (chan << 4);
- outb(chanlims, devpriv->BADR3 + 0);
+ /* set mux for single channel scan */
+ outb(PCIMDAS_MUX(chan, chan), devpriv->BADR3 + PCIMDAS_MUX_REG);
/* convert n samples */
for (n = 0; n < insn->n; n++) {
/* trigger conversion */
- outw(0, devpriv->daqio + 0);
+ outw(0, devpriv->daqio + PCIMDAS_AI_SOFTTRIG_REG);
/* wait for conversion to end */
ret = comedi_timeout(dev, s, insn, cb_pcimdas_ai_eoc, 0);
return ret;
/* read data */
- data[n] = inw(devpriv->daqio + 0);
+ data[n] = inw(devpriv->daqio + PCIMDAS_AI_REG);
}
/* return the number of samples read/written */
struct cb_pcimdas_private *devpriv = dev->private;
unsigned int chan = CR_CHAN(insn->chanspec);
unsigned int val = s->readback[chan];
- unsigned int reg = (chan) ? DAC1_OFFSET : DAC0_OFFSET;
int i;
for (i = 0; i < insn->n; i++) {
val = data[i];
- outw(val, devpriv->daqio + reg);
+ outw(val, devpriv->daqio + PCIMDAS_AO_REG(chan));
}
s->readback[chan] = val;
return insn->n;
}
+static int cb_pcimdas_di_insn_read(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ struct cb_pcimdas_private *devpriv = dev->private;
+ unsigned int val;
+
+ val = inb(devpriv->BADR3 + PCIMDAS_DI_DO_REG);
+
+ data[1] = val & 0x0f;
+
+ return insn->n;
+}
+
+static int cb_pcimdas_do_insn_write(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ struct cb_pcimdas_private *devpriv = dev->private;
+
+ if (comedi_dio_update_state(s, data))
+ outb(s->state, devpriv->BADR3 + PCIMDAS_DI_DO_REG);
+
+ data[1] = s->state;
+
+ return insn->n;
+}
+
+static int cb_pcimdas_counter_insn_config(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ struct cb_pcimdas_private *devpriv = dev->private;
+ unsigned int ctrl;
+
+ switch (data[0]) {
+ case INSN_CONFIG_SET_CLOCK_SRC:
+ switch (data[1]) {
+ case 0: /* internal 100 kHz clock */
+ ctrl = PCIMDAS_USER_CNTR_CTR1_CLK_SEL;
+ break;
+ case 1: /* external clk on pin 21 */
+ ctrl = 0;
+ break;
+ default:
+ return -EINVAL;
+ }
+ outb(ctrl, devpriv->BADR3 + PCIMDAS_USER_CNTR_REG);
+ break;
+ case INSN_CONFIG_GET_CLOCK_SRC:
+ ctrl = inb(devpriv->BADR3 + PCIMDAS_USER_CNTR_REG);
+ if (ctrl & PCIMDAS_USER_CNTR_CTR1_CLK_SEL) {
+ data[1] = 0;
+ data[2] = I8254_OSC_BASE_100KHZ;
+ } else {
+ data[1] = 1;
+ data[2] = 0;
+ }
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return insn->n;
+}
+
+static unsigned int cb_pcimdas_pacer_clk(struct comedi_device *dev)
+{
+ struct cb_pcimdas_private *devpriv = dev->private;
+ unsigned int status;
+
+ /* The Pacer Clock jumper selects a 10 MHz or 1 MHz clock */
+ status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
+ if (status & PCIMDAS_STATUS_CLK)
+ return I8254_OSC_BASE_10MHZ;
+ return I8254_OSC_BASE_1MHZ;
+}
+
+static bool cb_pcimdas_is_ai_se(struct comedi_device *dev)
+{
+ struct cb_pcimdas_private *devpriv = dev->private;
+ unsigned int status;
+
+ /*
+ * The number of Analog Input channels is set with the
+ * Analog Input Mode Switch on the board. The board can
+ * have 16 single-ended or 8 differential channels.
+ */
+ status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
+ return status & PCIMDAS_STATUS_MUX;
+}
+
+static bool cb_pcimdas_is_ai_uni(struct comedi_device *dev)
+{
+ struct cb_pcimdas_private *devpriv = dev->private;
+ unsigned int status;
+
+ /*
+ * The Analog Input range polarity is set with the
+ * Analog Input Polarity Switch on the board. The
+ * inputs can be set to Unipolar or Bipolar ranges.
+ */
+ status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
+ return status & PCIMDAS_STATUS_UB;
+}
+
static int cb_pcimdas_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct cb_pcimdas_private *devpriv;
devpriv->BADR3 = pci_resource_start(pcidev, 3);
dev->iobase = pci_resource_start(pcidev, 4);
- ret = comedi_alloc_subdevices(dev, 3);
+ dev->pacer = comedi_8254_init(devpriv->BADR3 + PCIMDAS_8254_BASE,
+ cb_pcimdas_pacer_clk(dev),
+ I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
+ ret = comedi_alloc_subdevices(dev, 6);
if (ret)
return ret;
+ /* Analog Input subdevice */
s = &dev->subdevices[0];
- /* dev->read_subdev=s; */
- /* analog input subdevice */
- s->type = COMEDI_SUBD_AI;
- s->subdev_flags = SDF_READABLE | SDF_GROUND;
- s->n_chan = 16;
- s->maxdata = 0xffff;
- s->range_table = &range_unknown;
- s->len_chanlist = 1; /* This is the maximum chanlist length that */
- /* the board can handle */
- s->insn_read = cb_pcimdas_ai_rinsn;
+ s->type = COMEDI_SUBD_AI;
+ s->subdev_flags = SDF_READABLE;
+ if (cb_pcimdas_is_ai_se(dev)) {
+ s->subdev_flags |= SDF_GROUND;
+ s->n_chan = 16;
+ } else {
+ s->subdev_flags |= SDF_DIFF;
+ s->n_chan = 8;
+ }
+ s->maxdata = 0xffff;
+ s->range_table = cb_pcimdas_is_ai_uni(dev) ? &cb_pcimdas_ai_uni_range
+ : &cb_pcimdas_ai_bip_range;
+ s->insn_read = cb_pcimdas_ai_insn_read;
+ /* Analog Output subdevice */
s = &dev->subdevices[1];
- /* analog output subdevice */
- s->type = COMEDI_SUBD_AO;
- s->subdev_flags = SDF_WRITABLE;
- s->n_chan = 2;
- s->maxdata = 0xfff;
- /* ranges are hardware settable, but not software readable. */
- s->range_table = &range_unknown;
- s->insn_write = cb_pcimdas_ao_insn_write;
+ s->type = COMEDI_SUBD_AO;
+ s->subdev_flags = SDF_WRITABLE;
+ s->n_chan = 2;
+ s->maxdata = 0xfff;
+ s->range_table = &cb_pcimdas_ao_range;
+ s->insn_write = cb_pcimdas_ao_insn_write;
ret = comedi_alloc_subdev_readback(s);
if (ret)
return ret;
+ /* Digital I/O subdevice */
s = &dev->subdevices[2];
- /* digital i/o subdevice */
- ret = subdev_8255_init(dev, s, NULL, 0x00);
+ ret = subdev_8255_init(dev, s, NULL, PCIMDAS_8255_BASE);
if (ret)
return ret;
+ /* Digital Input subdevice (main connector) */
+ s = &dev->subdevices[3];
+ s->type = COMEDI_SUBD_DI;
+ s->subdev_flags = SDF_READABLE;
+ s->n_chan = 4;
+ s->maxdata = 1;
+ s->range_table = &range_digital;
+ s->insn_read = cb_pcimdas_di_insn_read;
+
+ /* Digital Output subdevice (main connector) */
+ s = &dev->subdevices[4];
+ s->type = COMEDI_SUBD_DO;
+ s->subdev_flags = SDF_WRITABLE;
+ s->n_chan = 4;
+ s->maxdata = 1;
+ s->range_table = &range_digital;
+ s->insn_write = cb_pcimdas_do_insn_write;
+
+ /* Counter subdevice (8254) */
+ s = &dev->subdevices[5];
+ comedi_8254_subdevice_init(s, dev->pacer);
+
+ dev->pacer->insn_config = cb_pcimdas_counter_insn_config;
+
+ /* counters 1 and 2 are used internally for the pacer */
+ comedi_8254_set_busy(dev->pacer, 1, true);
+ comedi_8254_set_busy(dev->pacer, 2, true);
+
return 0;
}
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "8255.h"
}
static int cb_pcimdda_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct comedi_subdevice *s;
--- /dev/null
+/*
+ * comedi_8254.c
+ * Generic 8254 timer/counter support
+ * Copyright (C) 2014 H Hartley Sweeten <hsweeten@visionengravers.com>
+ *
+ * Based on 8253.h and various subdevice implementations in comedi drivers.
+ *
+ * COMEDI - Linux Control and Measurement Device Interface
+ * Copyright (C) 2000 David A. Schleef <ds@schleef.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * Module: comedi_8254
+ * Description: Generic 8254 timer/counter support
+ * Author: H Hartley Sweeten <hsweeten@visionengravers.com>
+ * Updated: Thu Jan 8 16:45:45 MST 2015
+ * Status: works
+ *
+ * This module is not used directly by end-users. Rather, it is used by other
+ * drivers to provide support for an 8254 Programmable Interval Timer. These
+ * counters are typically used to generate the pacer clock used for data
+ * acquisition. Some drivers also expose the counters for general purpose use.
+ *
+ * This module provides the following basic functions:
+ *
+ * comedi_8254_init() / comedi_8254_mm_init()
+ * Initializes this module to access the 8254 registers. The _mm version
+ * sets up the module for MMIO register access the other for PIO access.
+ * The pointer returned from these functions is normally stored in the
+ * comedi_device dev->pacer and will be freed by the comedi core during
+ * the driver (*detach). If a driver has multiple 8254 devices, they need
+ * to be stored in the drivers private data and freed when the driver is
+ * detached.
+ *
+ * NOTE: The counters are reset by setting them to I8254_MODE0 as part of
+ * this initialization.
+ *
+ * comedi_8254_set_mode()
+ * Sets a counters operation mode:
+ * I8254_MODE0 Interrupt on terminal count
+ * I8254_MODE1 Hardware retriggerable one-shot
+ * I8254_MODE2 Rate generator
+ * I8254_MODE3 Square wave mode
+ * I8254_MODE4 Software triggered strobe
+ * I8254_MODE5 Hardware triggered strobe (retriggerable)
+ *
+ * In addition I8254_BCD and I8254_BINARY specify the counting mode:
+ * I8254_BCD BCD counting
+ * I8254_BINARY Binary counting
+ *
+ * comedi_8254_write()
+ * Writes an initial value to a counter.
+ *
+ * The largest possible initial count is 0; this is equivalent to 2^16
+ * for binary counting and 10^4 for BCD counting.
+ *
+ * NOTE: The counter does not stop when it reaches zero. In Mode 0, 1, 4,
+ * and 5 the counter "wraps around" to the highest count, either 0xffff
+ * for binary counting or 9999 for BCD counting, and continues counting.
+ * Modes 2 and 3 are periodic; the counter reloads itself with the initial
+ * count and continues counting from there.
+ *
+ * comedi_8254_read()
+ * Reads the current value from a counter.
+ *
+ * comedi_8254_status()
+ * Reads the status of a counter.
+ *
+ * comedi_8254_load()
+ * Sets a counters operation mode and writes the initial value.
+ *
+ * Typically the pacer clock is created by cascading two of the 16-bit counters
+ * to create a 32-bit rate generator (I8254_MODE2). These functions are
+ * provided to handle the cascaded counters:
+ *
+ * comedi_8254_ns_to_timer()
+ * Calculates the divisor value needed for a single counter to generate
+ * ns timing.
+ *
+ * comedi_8254_cascade_ns_to_timer()
+ * Calculates the two divisor values needed to the generate the pacer
+ * clock (in ns).
+ *
+ * comedi_8254_update_divisors()
+ * Transfers the intermediate divisor values to the current divisors.
+ *
+ * comedi_8254_pacer_enable()
+ * Programs the mode of the cascaded counters and writes the current
+ * divisor values.
+ *
+ * To expose the counters as a subdevice for general purpose use the following
+ * functions a provided:
+ *
+ * comedi_8254_subdevice_init()
+ * Initializes a comedi_subdevice to use the 8254 timer.
+ *
+ * comedi_8254_set_busy()
+ * Internally flags a counter as "busy". This is done to protect the
+ * counters that are used for the cascaded 32-bit pacer.
+ *
+ * The subdevice provides (*insn_read) and (*insn_write) operations to read
+ * the current value and write an initial value to a counter. A (*insn_config)
+ * operation is also provided to handle the following comedi instructions:
+ *
+ * INSN_CONFIG_SET_COUNTER_MODE calls comedi_8254_set_mode()
+ * INSN_CONFIG_8254_READ_STATUS calls comedi_8254_status()
+ *
+ * The (*insn_config) member of comedi_8254 can be initialized by the external
+ * driver to handle any additional instructions.
+ *
+ * NOTE: Gate control, clock routing, and any interrupt handling for the
+ * counters is not handled by this module. These features are driver dependent.
+ */
+
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+
+#include "../comedidev.h"
+
+#include "comedi_8254.h"
+
+static unsigned int __i8254_read(struct comedi_8254 *i8254, unsigned int reg)
+{
+ unsigned int reg_offset = (reg * i8254->iosize) << i8254->regshift;
+ unsigned int val;
+
+ switch (i8254->iosize) {
+ default:
+ case I8254_IO8:
+ if (i8254->mmio)
+ val = readb(i8254->mmio + reg_offset);
+ else
+ val = inb(i8254->iobase + reg_offset);
+ break;
+ case I8254_IO16:
+ if (i8254->mmio)
+ val = readw(i8254->mmio + reg_offset);
+ else
+ val = inw(i8254->iobase + reg_offset);
+ break;
+ case I8254_IO32:
+ if (i8254->mmio)
+ val = readl(i8254->mmio + reg_offset);
+ else
+ val = inl(i8254->iobase + reg_offset);
+ break;
+ }
+ return val & 0xff;
+}
+
+static void __i8254_write(struct comedi_8254 *i8254,
+ unsigned int val, unsigned int reg)
+{
+ unsigned int reg_offset = (reg * i8254->iosize) << i8254->regshift;
+
+ switch (i8254->iosize) {
+ default:
+ case I8254_IO8:
+ if (i8254->mmio)
+ writeb(val, i8254->mmio + reg_offset);
+ else
+ outb(val, i8254->iobase + reg_offset);
+ break;
+ case I8254_IO16:
+ if (i8254->mmio)
+ writew(val, i8254->mmio + reg_offset);
+ else
+ outw(val, i8254->iobase + reg_offset);
+ break;
+ case I8254_IO32:
+ if (i8254->mmio)
+ writel(val, i8254->mmio + reg_offset);
+ else
+ outl(val, i8254->iobase + reg_offset);
+ break;
+ }
+}
+
+/**
+ * comedi_8254_status - return the status of a counter
+ * @i8254: comedi_8254 struct for the timer
+ * @counter: the counter number
+ */
+unsigned int comedi_8254_status(struct comedi_8254 *i8254, unsigned int counter)
+{
+ unsigned int cmd;
+
+ if (counter > 2)
+ return 0;
+
+ cmd = I8254_CTRL_READBACK_STATUS | I8254_CTRL_READBACK_SEL_CTR(counter);
+ __i8254_write(i8254, cmd, I8254_CTRL_REG);
+
+ return __i8254_read(i8254, counter);
+}
+EXPORT_SYMBOL_GPL(comedi_8254_status);
+
+/**
+ * comedi_8254_read - read the current counter value
+ * @i8254: comedi_8254 struct for the timer
+ * @counter: the counter number
+ */
+unsigned int comedi_8254_read(struct comedi_8254 *i8254, unsigned int counter)
+{
+ unsigned int val;
+
+ if (counter > 2)
+ return 0;
+
+ /* latch counter */
+ __i8254_write(i8254, I8254_CTRL_SEL_CTR(counter) | I8254_CTRL_LATCH,
+ I8254_CTRL_REG);
+
+ /* read LSB then MSB */
+ val = __i8254_read(i8254, counter);
+ val |= (__i8254_read(i8254, counter) << 8);
+
+ return val;
+}
+EXPORT_SYMBOL_GPL(comedi_8254_read);
+
+/**
+ * comedi_8254_write - load a 16-bit initial counter value
+ * @i8254: comedi_8254 struct for the timer
+ * @counter: the counter number
+ * @val: the initial value
+ */
+void comedi_8254_write(struct comedi_8254 *i8254,
+ unsigned int counter, unsigned int val)
+{
+ unsigned int byte;
+
+ if (counter > 2)
+ return;
+ if (val > 0xffff)
+ return;
+
+ /* load LSB then MSB */
+ byte = val & 0xff;
+ __i8254_write(i8254, byte, counter);
+ byte = (val >> 8) & 0xff;
+ __i8254_write(i8254, byte, counter);
+}
+EXPORT_SYMBOL_GPL(comedi_8254_write);
+
+/**
+ * comedi_8254_set_mode - set the mode of a counter
+ * @i8254: comedi_8254 struct for the timer
+ * @counter: the counter number
+ * @mode: the I8254_MODEx and I8254_BCD|I8254_BINARY
+ */
+int comedi_8254_set_mode(struct comedi_8254 *i8254, unsigned int counter,
+ unsigned int mode)
+{
+ unsigned int byte;
+
+ if (counter > 2)
+ return -EINVAL;
+ if (mode > (I8254_MODE5 | I8254_BCD))
+ return -EINVAL;
+
+ byte = I8254_CTRL_SEL_CTR(counter) | /* select counter */
+ I8254_CTRL_LSB_MSB | /* load LSB then MSB */
+ mode; /* mode and BCD|binary */
+ __i8254_write(i8254, byte, I8254_CTRL_REG);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(comedi_8254_set_mode);
+
+/**
+ * comedi_8254_load - program the mode and initial count of a counter
+ * @i8254: comedi_8254 struct for the timer
+ * @counter: the counter number
+ * @mode: the I8254_MODEx and I8254_BCD|I8254_BINARY
+ * @val: the initial value
+ */
+int comedi_8254_load(struct comedi_8254 *i8254, unsigned int counter,
+ unsigned int val, unsigned int mode)
+{
+ if (counter > 2)
+ return -EINVAL;
+ if (val > 0xffff)
+ return -EINVAL;
+ if (mode > (I8254_MODE5 | I8254_BCD))
+ return -EINVAL;
+
+ comedi_8254_set_mode(i8254, counter, mode);
+ comedi_8254_write(i8254, counter, val);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(comedi_8254_load);
+
+/**
+ * comedi_8254_pacer_enable - set the mode and load the cascaded counters
+ * @i8254: comedi_8254 struct for the timer
+ * @counter1: the counter number for the first divisor
+ * @counter2: the counter number for the second divisor
+ * @enable: flag to enable (load) the counters
+ */
+void comedi_8254_pacer_enable(struct comedi_8254 *i8254,
+ unsigned int counter1,
+ unsigned int counter2,
+ bool enable)
+{
+ unsigned int mode;
+
+ if (counter1 > 2 || counter2 > 2 || counter1 == counter2)
+ return;
+
+ if (enable)
+ mode = I8254_MODE2 | I8254_BINARY;
+ else
+ mode = I8254_MODE0 | I8254_BINARY;
+
+ comedi_8254_set_mode(i8254, counter1, mode);
+ comedi_8254_set_mode(i8254, counter2, mode);
+
+ if (enable) {
+ /*
+ * Divisors are loaded second counter then first counter to
+ * avoid possible issues with the first counter expiring
+ * before the second counter is loaded.
+ */
+ comedi_8254_write(i8254, counter2, i8254->divisor2);
+ comedi_8254_write(i8254, counter1, i8254->divisor1);
+ }
+}
+EXPORT_SYMBOL_GPL(comedi_8254_pacer_enable);
+
+/**
+ * comedi_8254_update_divisors - update the divisors for the cascaded counters
+ * @i8254: comedi_8254 struct for the timer
+ */
+void comedi_8254_update_divisors(struct comedi_8254 *i8254)
+{
+ /* masking is done since counter maps zero to 0x10000 */
+ i8254->divisor = i8254->next_div & 0xffff;
+ i8254->divisor1 = i8254->next_div1 & 0xffff;
+ i8254->divisor2 = i8254->next_div2 & 0xffff;
+}
+EXPORT_SYMBOL_GPL(comedi_8254_update_divisors);
+
+/**
+ * comedi_8254_cascade_ns_to_timer - calculate the cascaded divisor values
+ * @i8254: comedi_8254 struct for the timer
+ * @nanosec: the desired ns time
+ * @flags: comedi_cmd flags
+ */
+void comedi_8254_cascade_ns_to_timer(struct comedi_8254 *i8254,
+ unsigned int *nanosec,
+ unsigned int flags)
+{
+ unsigned int d1 = i8254->next_div1 ? i8254->next_div1 : I8254_MAX_COUNT;
+ unsigned int d2 = i8254->next_div2 ? i8254->next_div2 : I8254_MAX_COUNT;
+ unsigned int div = d1 * d2;
+ unsigned int ns_lub = 0xffffffff;
+ unsigned int ns_glb = 0;
+ unsigned int d1_lub = 0;
+ unsigned int d1_glb = 0;
+ unsigned int d2_lub = 0;
+ unsigned int d2_glb = 0;
+ unsigned int start;
+ unsigned int ns;
+ unsigned int ns_low;
+ unsigned int ns_high;
+
+ /* exit early if everything is already correct */
+ if (div * i8254->osc_base == *nanosec &&
+ d1 > 1 && d1 <= I8254_MAX_COUNT &&
+ d2 > 1 && d2 <= I8254_MAX_COUNT &&
+ /* check for overflow */
+ div > d1 && div > d2 &&
+ div * i8254->osc_base > div &&
+ div * i8254->osc_base > i8254->osc_base)
+ return;
+
+ div = *nanosec / i8254->osc_base;
+ d2 = I8254_MAX_COUNT;
+ start = div / d2;
+ if (start < 2)
+ start = 2;
+ for (d1 = start; d1 <= div / d1 + 1 && d1 <= I8254_MAX_COUNT; d1++) {
+ for (d2 = div / d1;
+ d1 * d2 <= div + d1 + 1 && d2 <= I8254_MAX_COUNT; d2++) {
+ ns = i8254->osc_base * d1 * d2;
+ if (ns <= *nanosec && ns > ns_glb) {
+ ns_glb = ns;
+ d1_glb = d1;
+ d2_glb = d2;
+ }
+ if (ns >= *nanosec && ns < ns_lub) {
+ ns_lub = ns;
+ d1_lub = d1;
+ d2_lub = d2;
+ }
+ }
+ }
+
+ switch (flags & CMDF_ROUND_MASK) {
+ case CMDF_ROUND_NEAREST:
+ default:
+ ns_high = d1_lub * d2_lub * i8254->osc_base;
+ ns_low = d1_glb * d2_glb * i8254->osc_base;
+ if (ns_high - *nanosec < *nanosec - ns_low) {
+ d1 = d1_lub;
+ d2 = d2_lub;
+ } else {
+ d1 = d1_glb;
+ d2 = d2_glb;
+ }
+ break;
+ case CMDF_ROUND_UP:
+ d1 = d1_lub;
+ d2 = d2_lub;
+ break;
+ case CMDF_ROUND_DOWN:
+ d1 = d1_glb;
+ d2 = d2_glb;
+ break;
+ }
+
+ *nanosec = d1 * d2 * i8254->osc_base;
+ i8254->next_div1 = d1;
+ i8254->next_div2 = d2;
+}
+EXPORT_SYMBOL_GPL(comedi_8254_cascade_ns_to_timer);
+
+/**
+ * comedi_8254_ns_to_timer - calculate the divisor value for nanosec timing
+ * @i8254: comedi_8254 struct for the timer
+ * @nanosec: the desired ns time
+ * @flags: comedi_cmd flags
+ */
+void comedi_8254_ns_to_timer(struct comedi_8254 *i8254,
+ unsigned int *nanosec, unsigned int flags)
+{
+ unsigned int divisor;
+
+ switch (flags & CMDF_ROUND_MASK) {
+ default:
+ case CMDF_ROUND_NEAREST:
+ divisor = DIV_ROUND_CLOSEST(*nanosec, i8254->osc_base);
+ break;
+ case CMDF_ROUND_UP:
+ divisor = DIV_ROUND_UP(*nanosec, i8254->osc_base);
+ break;
+ case CMDF_ROUND_DOWN:
+ divisor = *nanosec / i8254->osc_base;
+ break;
+ }
+ if (divisor < 2)
+ divisor = 2;
+ if (divisor > I8254_MAX_COUNT)
+ divisor = I8254_MAX_COUNT;
+
+ *nanosec = divisor * i8254->osc_base;
+ i8254->next_div = divisor;
+}
+EXPORT_SYMBOL_GPL(comedi_8254_ns_to_timer);
+
+/**
+ * comedi_8254_set_busy - set/clear the "busy" flag for a given counter
+ * @i8254: comedi_8254 struct for the timer
+ * @counter: the counter number
+ * @busy: set/clear flag
+ */
+void comedi_8254_set_busy(struct comedi_8254 *i8254,
+ unsigned int counter, bool busy)
+{
+ if (counter < 3)
+ i8254->busy[counter] = busy;
+}
+EXPORT_SYMBOL_GPL(comedi_8254_set_busy);
+
+static int comedi_8254_insn_read(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ struct comedi_8254 *i8254 = s->private;
+ unsigned int chan = CR_CHAN(insn->chanspec);
+ int i;
+
+ if (i8254->busy[chan])
+ return -EBUSY;
+
+ for (i = 0; i < insn->n; i++)
+ data[i] = comedi_8254_read(i8254, chan);
+
+ return insn->n;
+}
+
+static int comedi_8254_insn_write(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ struct comedi_8254 *i8254 = s->private;
+ unsigned int chan = CR_CHAN(insn->chanspec);
+
+ if (i8254->busy[chan])
+ return -EBUSY;
+
+ if (insn->n)
+ comedi_8254_write(i8254, chan, data[insn->n - 1]);
+
+ return insn->n;
+}
+
+static int comedi_8254_insn_config(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ struct comedi_8254 *i8254 = s->private;
+ unsigned int chan = CR_CHAN(insn->chanspec);
+ int ret;
+
+ if (i8254->busy[chan])
+ return -EBUSY;
+
+ switch (data[0]) {
+ case INSN_CONFIG_RESET:
+ ret = comedi_8254_set_mode(i8254, chan,
+ I8254_MODE0 | I8254_BINARY);
+ if (ret)
+ return ret;
+ break;
+ case INSN_CONFIG_SET_COUNTER_MODE:
+ ret = comedi_8254_set_mode(i8254, chan, data[1]);
+ if (ret)
+ return ret;
+ break;
+ case INSN_CONFIG_8254_READ_STATUS:
+ data[1] = comedi_8254_status(i8254, chan);
+ break;
+ default:
+ /*
+ * If available, call the driver provided (*insn_config)
+ * to handle any driver implemented instructions.
+ */
+ if (i8254->insn_config)
+ return i8254->insn_config(dev, s, insn, data);
+
+ return -EINVAL;
+ }
+
+ return insn->n;
+}
+
+/**
+ * comedi_8254_subdevice_init - initialize a comedi_subdevice for the 8254 timer
+ * @s: comedi_subdevice struct
+ */
+void comedi_8254_subdevice_init(struct comedi_subdevice *s,
+ struct comedi_8254 *i8254)
+{
+ s->type = COMEDI_SUBD_COUNTER;
+ s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
+ s->n_chan = 3;
+ s->maxdata = 0xffff;
+ s->range_table = &range_unknown;
+ s->insn_read = comedi_8254_insn_read;
+ s->insn_write = comedi_8254_insn_write;
+ s->insn_config = comedi_8254_insn_config;
+
+ s->private = i8254;
+}
+EXPORT_SYMBOL_GPL(comedi_8254_subdevice_init);
+
+static struct comedi_8254 *__i8254_init(unsigned long iobase,
+ void __iomem *mmio,
+ unsigned int osc_base,
+ unsigned int iosize,
+ unsigned int regshift)
+{
+ struct comedi_8254 *i8254;
+ int i;
+
+ /* sanity check that the iosize is valid */
+ if (!(iosize == I8254_IO8 || iosize == I8254_IO16 ||
+ iosize == I8254_IO32))
+ return NULL;
+
+ i8254 = kzalloc(sizeof(*i8254), GFP_KERNEL);
+ if (!i8254)
+ return NULL;
+
+ i8254->iobase = iobase;
+ i8254->mmio = mmio;
+ i8254->iosize = iosize;
+ i8254->regshift = regshift;
+
+ /* default osc_base to the max speed of a generic 8254 timer */
+ i8254->osc_base = osc_base ? osc_base : I8254_OSC_BASE_10MHZ;
+
+ /* reset all the counters by setting them to I8254_MODE0 */
+ for (i = 0; i < 3; i++)
+ comedi_8254_set_mode(i8254, i, I8254_MODE0 | I8254_BINARY);
+
+ return i8254;
+}
+
+/**
+ * comedi_8254_init - allocate and initialize the 8254 device for pio access
+ * @mmio: port I/O base address
+ * @osc_base: base time of the counter in ns
+ * OPTIONAL - only used by comedi_8254_cascade_ns_to_timer()
+ * @iosize: I/O register size
+ * @regshift: register gap shift
+ */
+struct comedi_8254 *comedi_8254_init(unsigned long iobase,
+ unsigned int osc_base,
+ unsigned int iosize,
+ unsigned int regshift)
+{
+ return __i8254_init(iobase, NULL, osc_base, iosize, regshift);
+}
+EXPORT_SYMBOL_GPL(comedi_8254_init);
+
+/**
+ * comedi_8254_mm_init - allocate and initialize the 8254 device for mmio access
+ * @mmio: memory mapped I/O base address
+ * @osc_base: base time of the counter in ns
+ * OPTIONAL - only used by comedi_8254_cascade_ns_to_timer()
+ * @iosize: I/O register size
+ * @regshift: register gap shift
+ */
+struct comedi_8254 *comedi_8254_mm_init(void __iomem *mmio,
+ unsigned int osc_base,
+ unsigned int iosize,
+ unsigned int regshift)
+{
+ return __i8254_init(0, mmio, osc_base, iosize, regshift);
+}
+EXPORT_SYMBOL_GPL(comedi_8254_mm_init);
+
+static int __init comedi_8254_module_init(void)
+{
+ return 0;
+}
+module_init(comedi_8254_module_init);
+
+static void __exit comedi_8254_module_exit(void)
+{
+}
+module_exit(comedi_8254_module_exit);
+
+MODULE_AUTHOR("H Hartley Sweeten <hsweeten@visionengravers.com>");
+MODULE_DESCRIPTION("Comedi: Generic 8254 timer/counter support");
+MODULE_LICENSE("GPL");
--- /dev/null
+/*
+ * comedi_8254.h
+ * Generic 8254 timer/counter support
+ * Copyright (C) 2014 H Hartley Sweeten <hsweeten@visionengravers.com>
+ *
+ * COMEDI - Linux Control and Measurement Device Interface
+ * Copyright (C) 2000 David A. Schleef <ds@schleef.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _COMEDI_8254_H
+#define _COMEDI_8254_H
+
+/*
+ * Common oscillator base values in nanoseconds
+ */
+#define I8254_OSC_BASE_10MHZ 100
+#define I8254_OSC_BASE_5MHZ 200
+#define I8254_OSC_BASE_4MHZ 250
+#define I8254_OSC_BASE_2MHZ 500
+#define I8254_OSC_BASE_1MHZ 1000
+#define I8254_OSC_BASE_100KHZ 10000
+#define I8254_OSC_BASE_10KHZ 100000
+#define I8254_OSC_BASE_1KHZ 1000000
+
+/*
+ * I/O access size used to read/write registers
+ */
+#define I8254_IO8 1
+#define I8254_IO16 2
+#define I8254_IO32 4
+
+/*
+ * Register map for generic 8254 timer (I8254_IO8 with 0 regshift)
+ */
+#define I8254_COUNTER0_REG 0x00
+#define I8254_COUNTER1_REG 0x01
+#define I8254_COUNTER2_REG 0x02
+#define I8254_CTRL_REG 0x03
+#define I8254_CTRL_SEL_CTR(x) ((x) << 6)
+#define I8254_CTRL_READBACK_COUNT ((3 << 6) | (1 << 4))
+#define I8254_CTRL_READBACK_STATUS ((3 << 6) | (1 << 5))
+#define I8254_CTRL_READBACK_SEL_CTR(x) (2 << (x))
+#define I8254_CTRL_LATCH (0 << 4)
+#define I8254_CTRL_LSB_ONLY (1 << 4)
+#define I8254_CTRL_MSB_ONLY (2 << 4)
+#define I8254_CTRL_LSB_MSB (3 << 4)
+
+/* counter maps zero to 0x10000 */
+#define I8254_MAX_COUNT 0x10000
+
+/**
+ * struct comedi_8254 - private data used by this module
+ * @iobase: PIO base address of the registers (in/out)
+ * @mmio: MMIO base address of the registers (read/write)
+ * @iosize: I/O size used to access the registers (b/w/l)
+ * @regshift: register gap shift
+ * @osc_base: cascaded oscillator speed in ns
+ * @divisor: divisor for single counter
+ * @divisor1: divisor loaded into first cascaded counter
+ * @divisor2: divisor loaded into second cascaded counter
+ * #next_div: next divisor for single counter
+ * @next_div1: next divisor to use for first cascaded counter
+ * @next_div2: next divisor to use for second cascaded counter
+ * @clock_src; current clock source for each counter (driver specific)
+ * @gate_src; current gate source for each counter (driver specific)
+ * @busy: flags used to indicate that a counter is "busy"
+ * @insn_config: driver specific (*insn_config) callback
+ */
+struct comedi_8254 {
+ unsigned long iobase;
+ void __iomem *mmio;
+ unsigned int iosize;
+ unsigned int regshift;
+ unsigned int osc_base;
+ unsigned int divisor;
+ unsigned int divisor1;
+ unsigned int divisor2;
+ unsigned int next_div;
+ unsigned int next_div1;
+ unsigned int next_div2;
+ unsigned int clock_src[3];
+ unsigned int gate_src[3];
+ bool busy[3];
+
+ int (*insn_config)(struct comedi_device *, struct comedi_subdevice *s,
+ struct comedi_insn *, unsigned int *data);
+};
+
+unsigned int comedi_8254_status(struct comedi_8254 *, unsigned int counter);
+unsigned int comedi_8254_read(struct comedi_8254 *, unsigned int counter);
+void comedi_8254_write(struct comedi_8254 *,
+ unsigned int counter, unsigned int val);
+
+int comedi_8254_set_mode(struct comedi_8254 *,
+ unsigned int counter, unsigned int mode);
+int comedi_8254_load(struct comedi_8254 *,
+ unsigned int counter, unsigned int val, unsigned int mode);
+
+void comedi_8254_pacer_enable(struct comedi_8254 *,
+ unsigned int counter1, unsigned int counter2,
+ bool enable);
+void comedi_8254_update_divisors(struct comedi_8254 *);
+void comedi_8254_cascade_ns_to_timer(struct comedi_8254 *,
+ unsigned int *nanosec, unsigned int flags);
+void comedi_8254_ns_to_timer(struct comedi_8254 *,
+ unsigned int *nanosec, unsigned int flags);
+
+void comedi_8254_set_busy(struct comedi_8254 *,
+ unsigned int counter, bool busy);
+
+void comedi_8254_subdevice_init(struct comedi_subdevice *,
+ struct comedi_8254 *);
+
+struct comedi_8254 *comedi_8254_init(unsigned long iobase,
+ unsigned int osc_base,
+ unsigned int iosize,
+ unsigned int regshift);
+struct comedi_8254 *comedi_8254_mm_init(void __iomem *mmio,
+ unsigned int osc_base,
+ unsigned int iosize,
+ unsigned int regshift);
+
+#endif /* _COMEDI_8254_H */
strlcat(devpriv->name, buf,
sizeof(devpriv->name));
}
-
}
}
s->insn_config = bonding_dio_insn_config;
dev_info(dev->class_dev,
- "%s: %s attached, %u channels from %u devices\n",
- dev->driver->driver_name, dev->board_name,
- devpriv->nchans, devpriv->ndevs);
+ "%s: %s attached, %u channels from %u devices\n",
+ dev->driver->driver_name, dev->board_name,
+ devpriv->nchans, devpriv->ndevs);
return 0;
}
+++ /dev/null
-/*
- * comedi_fc.h
- * This is a place for code driver writers wish to share between
- * two or more drivers. These functions are meant to be used only
- * by drivers, they are NOT part of the kcomedilib API!
- *
- * Author: Frank Mori Hess <fmhess@users.sourceforge.net>
- * Copyright (C) 2002 Frank Mori Hess
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _COMEDI_FC_H
-#define _COMEDI_FC_H
-
-#include "../comedidev.h"
-
-/**
- * cfc_check_trigger_src() - trivially validate a comedi_cmd trigger source
- * @src: pointer to the trigger source to validate
- * @flags: bitmask of valid TRIG_* for the trigger
- *
- * This is used in "step 1" of the do_cmdtest functions of comedi drivers
- * to vaildate the comedi_cmd triggers. The mask of the @src against the
- * @flags allows the userspace comedilib to pass all the comedi_cmd
- * triggers as TRIG_ANY and get back a bitmask of the valid trigger sources.
- */
-static inline int cfc_check_trigger_src(unsigned int *src, unsigned int flags)
-{
- unsigned int orig_src = *src;
-
- *src = orig_src & flags;
- if (*src == TRIG_INVALID || *src != orig_src)
- return -EINVAL;
- return 0;
-}
-
-/**
- * cfc_check_trigger_is_unique() - make sure a trigger source is unique
- * @src: the trigger source to check
- */
-static inline int cfc_check_trigger_is_unique(unsigned int src)
-{
- /* this test is true if more than one _src bit is set */
- if ((src & (src - 1)) != 0)
- return -EINVAL;
- return 0;
-}
-
-/**
- * cfc_check_trigger_arg_is() - trivially validate a trigger argument
- * @arg: pointer to the trigger arg to validate
- * @val: the value the argument should be
- */
-static inline int cfc_check_trigger_arg_is(unsigned int *arg, unsigned int val)
-{
- if (*arg != val) {
- *arg = val;
- return -EINVAL;
- }
- return 0;
-}
-
-/**
- * cfc_check_trigger_arg_min() - trivially validate a trigger argument
- * @arg: pointer to the trigger arg to validate
- * @val: the minimum value the argument should be
- */
-static inline int cfc_check_trigger_arg_min(unsigned int *arg,
- unsigned int val)
-{
- if (*arg < val) {
- *arg = val;
- return -EINVAL;
- }
- return 0;
-}
-
-/**
- * cfc_check_trigger_arg_max() - trivially validate a trigger argument
- * @arg: pointer to the trigger arg to validate
- * @val: the maximum value the argument should be
- */
-static inline int cfc_check_trigger_arg_max(unsigned int *arg,
- unsigned int val)
-{
- if (*arg > val) {
- *arg = val;
- return -EINVAL;
- }
- return 0;
-}
-
-#endif /* _COMEDI_FC_H */
desc = &dma->desc[i];
if (desc->virt_addr)
dma_free_coherent(NULL, desc->maxsize,
- desc->virt_addr, desc->hw_addr);
+ desc->virt_addr,
+ desc->hw_addr);
}
kfree(dma->desc);
}
#include "../comedidev.h"
-#include "comedi_fc.h"
-
/*
* Register map
*/
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_NONE);
if (err)
return 1;
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
#include <asm/div64.h>
-#include "comedi_fc.h"
#include <linux/timer.h>
#include <linux/ktime.h>
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW | TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
+ err |= comedi_check_trigger_src(&cmd->convert_src,
+ TRIG_NOW | TRIG_TIMER);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
if (cmd->convert_src == TRIG_NOW)
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
if (cmd->scan_begin_src == TRIG_TIMER) {
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- nano_per_micro);
- if (cmd->convert_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- cmd->convert_arg * cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ nano_per_micro);
+ if (cmd->convert_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->
+ scan_begin_arg,
+ cmd->convert_arg *
+ cmd->chanlist_len);
+ }
}
- err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_min(&cmd->chanlist_len, 1);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
/* round to nearest microsec */
arg = nano_per_micro *
((arg + (nano_per_micro / 2)) / nano_per_micro);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
if (cmd->convert_src == TRIG_TIMER) {
arg = cmd->convert_arg;
/* round to nearest microsec */
arg = nano_per_micro *
((arg + (nano_per_micro / 2)) / nano_per_micro);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
}
if (err)
for (i = 0; i < s->n_chan; i++)
devpriv->ao_loopbacks[i] = s->maxdata / 2;
- init_timer(&devpriv->timer);
- devpriv->timer.function = waveform_ai_interrupt;
- devpriv->timer.data = (unsigned long)dev;
+ setup_timer(&devpriv->timer, waveform_ai_interrupt,
+ (unsigned long)dev);
dev_info(dev->class_dev,
"%s: %i microvolt, %li microsecond waveform attached\n",
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
/*
* Register map
}
static int contec_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct comedi_subdevice *s;
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "8255.h"
}
static int daqboard2000_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
const struct daq200_boardtype *board;
#include "../comedidev.h"
#include "8255.h"
-#include "8253.h"
+#include "comedi_8254.h"
#include "das08.h"
/*
return insn->n;
}
-static void i8254_initialize(struct comedi_device *dev)
-{
- const struct das08_board_struct *thisboard = dev->board_ptr;
- unsigned long i8254_iobase = dev->iobase + thisboard->i8254_offset;
- unsigned int mode = I8254_MODE0 | I8254_BINARY;
- int i;
-
- for (i = 0; i < 3; ++i)
- i8254_set_mode(i8254_iobase, 0, i, mode);
-}
-
-static int das08_counter_read(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- const struct das08_board_struct *thisboard = dev->board_ptr;
- unsigned long i8254_iobase = dev->iobase + thisboard->i8254_offset;
- int chan = insn->chanspec;
-
- data[0] = i8254_read(i8254_iobase, 0, chan);
- return 1;
-}
-
-static int das08_counter_write(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- const struct das08_board_struct *thisboard = dev->board_ptr;
- unsigned long i8254_iobase = dev->iobase + thisboard->i8254_offset;
- int chan = insn->chanspec;
-
- i8254_write(i8254_iobase, 0, chan, data[0]);
- return 1;
-}
-
-static int das08_counter_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- const struct das08_board_struct *thisboard = dev->board_ptr;
- unsigned long i8254_iobase = dev->iobase + thisboard->i8254_offset;
- int chan = insn->chanspec;
-
- switch (data[0]) {
- case INSN_CONFIG_SET_COUNTER_MODE:
- i8254_set_mode(i8254_iobase, 0, chan, data[1]);
- break;
- case INSN_CONFIG_8254_READ_STATUS:
- data[1] = i8254_status(i8254_iobase, 0, chan);
- break;
- default:
- return -EINVAL;
- }
- return 2;
-}
-
int das08_common_attach(struct comedi_device *dev, unsigned long iobase)
{
const struct das08_board_struct *thisboard = dev->board_ptr;
if (ret)
return ret;
- /* intialize all channels to 0V */
+ /* initialize all channels to 0V */
for (i = 0; i < s->n_chan; i++) {
s->readback[i] = s->maxdata / 2;
das08_ao_set_data(dev, i, s->readback[i]);
s->type = COMEDI_SUBD_UNUSED;
}
+ /* Counter subdevice (8254) */
s = &dev->subdevices[5];
- /* 8254 */
- if (thisboard->i8254_offset != 0) {
- s->type = COMEDI_SUBD_COUNTER;
- s->subdev_flags = SDF_WRITABLE | SDF_READABLE;
- s->n_chan = 3;
- s->maxdata = 0xFFFF;
- s->insn_read = das08_counter_read;
- s->insn_write = das08_counter_write;
- s->insn_config = das08_counter_config;
- i8254_initialize(dev);
+ if (thisboard->i8254_offset) {
+ dev->pacer = comedi_8254_init(dev->iobase +
+ thisboard->i8254_offset,
+ 0, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
+ comedi_8254_subdevice_init(s, dev->pacer);
} else {
s->type = COMEDI_SUBD_UNUSED;
}
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "das08.h"
#include "../comedidev.h"
#include "comedi_isadma.h"
-#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
#include "8255.h"
#define DAS16_DMA_SIZE 0xff00 /* size in bytes of allocated dma buffer */
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
trig_mask = TRIG_FOLLOW;
if (devpriv->can_burst)
trig_mask |= TRIG_TIMER | TRIG_EXT;
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, trig_mask);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, trig_mask);
trig_mask = TRIG_TIMER | TRIG_EXT;
if (devpriv->can_burst)
trig_mask |= TRIG_NOW;
- err |= cfc_check_trigger_src(&cmd->convert_src, trig_mask);
+ err |= comedi_check_trigger_src(&cmd->convert_src, trig_mask);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
if (cmd->scan_begin_src == TRIG_FOLLOW) /* internal trigger */
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
/* check against maximum frequency */
- if (cmd->scan_begin_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- board->ai_speed * cmd->chanlist_len);
+ if (cmd->scan_begin_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ board->ai_speed *
+ cmd->chanlist_len);
+ }
- if (cmd->convert_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
- board->ai_speed);
+ if (cmd->convert_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
+ board->ai_speed);
+ }
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
/* step 4: fix up arguments */
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->scan_begin_arg;
- i8253_cascade_ns_to_timer(devpriv->clockbase,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
if (cmd->convert_src == TRIG_TIMER) {
arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(devpriv->clockbase,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
}
if (err)
return 4;
static unsigned int das16_set_pacer(struct comedi_device *dev, unsigned int ns,
unsigned int flags)
{
- struct das16_private_struct *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + DAS16_TIMER_BASE_REG;
-
- i8253_cascade_ns_to_timer(devpriv->clockbase,
- &devpriv->divisor1, &devpriv->divisor2,
- &ns, flags);
-
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &ns, flags);
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
return ns;
}
if (cmd->flags & CMDF_PRIORITY) {
dev_err(dev->class_dev,
- "isa dma transfers cannot be performed with CMDF_PRIORITY, aborting\n");
+ "isa dma transfers cannot be performed with CMDF_PRIORITY, aborting\n");
return -1;
}
outb(0, dev->iobase + DAS16_STATUS_REG);
outb(0, dev->iobase + DAS16_CTRL_REG);
outb(0, dev->iobase + DAS16_PACER_REG);
- outb(0, dev->iobase + DAS16_TIMER_BASE_REG + i8254_control_reg);
}
static void das16_alloc_dma(struct comedi_device *dev, unsigned int dma_chan)
devpriv->dma = comedi_isadma_alloc(dev, 2, dma_chan, dma_chan,
DAS16_DMA_SIZE, COMEDI_ISADMA_READ);
if (devpriv->dma) {
- init_timer(&devpriv->timer);
- devpriv->timer.function = das16_timer_interrupt;
- devpriv->timer.data = (unsigned long)dev;
+ setup_timer(&devpriv->timer, das16_timer_interrupt,
+ (unsigned long)dev);
}
}
const struct das16_board *board = dev->board_ptr;
struct das16_private_struct *devpriv;
struct comedi_subdevice *s;
+ unsigned int osc_base;
unsigned int status;
int ret;
return -EINVAL;
/* get master clock speed */
+ osc_base = I8254_OSC_BASE_1MHZ;
if (devpriv->can_burst) {
status = inb(dev->iobase + DAS1600_STATUS_REG);
-
if (status & DAS1600_STATUS_CLK_10MHZ)
- devpriv->clockbase = I8254_OSC_BASE_10MHZ;
- else
- devpriv->clockbase = I8254_OSC_BASE_1MHZ;
+ osc_base = I8254_OSC_BASE_10MHZ;
} else {
if (it->options[3])
- devpriv->clockbase = I8254_OSC_BASE_1MHZ /
- it->options[3];
- else
- devpriv->clockbase = I8254_OSC_BASE_1MHZ;
+ osc_base = I8254_OSC_BASE_1MHZ / it->options[3];
}
+ dev->pacer = comedi_8254_init(dev->iobase + DAS16_TIMER_BASE_REG,
+ osc_base, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
das16_alloc_dma(dev, it->options[2]);
ret = comedi_alloc_subdevices(dev, 4 + board->has_8255);
*/
#include <linux/module.h>
+#include <linux/slab.h>
#include <linux/interrupt.h>
#include "../comedidev.h"
#include "8255.h"
-#include "8253.h"
-#include "comedi_fc.h"
+#include "comedi_8254.h"
#define DAS16M1_SIZE2 8
#define Q_RANGE(x) (((x) & 0xf) << 4)
#define UNIPOLAR 0x40
#define DAS16M1_8254_FIRST 0x8
-#define DAS16M1_8254_FIRST_CNTRL 0xb
-#define TOTAL_CLEAR 0x30
#define DAS16M1_8254_SECOND 0xc
#define DAS16M1_82C55 0x400
#define DAS16M1_8254_THIRD 0x404
};
struct das16m1_private_struct {
+ struct comedi_8254 *counter;
unsigned int control_state;
unsigned int adc_count; /* number of samples completed */
/* initial value in lower half of hardware conversion counter,
* counter yet (loaded by first sample conversion) */
u16 initial_hw_count;
unsigned short ai_buffer[FIFO_SIZE];
- unsigned int divisor1; /* divides master clock to obtain conversion speed */
- unsigned int divisor2; /* divides master clock to obtain conversion speed */
unsigned long extra_iobase;
};
if ((i % 2) != (chan % 2)) {
dev_dbg(dev->class_dev,
- "even/odd channels must go have even/odd chanlist indices\n");
+ "even/odd channels must go have even/odd chanlist indices\n");
return -EINVAL;
}
}
static int das16m1_cmd_test(struct comedi_device *dev,
struct comedi_subdevice *s, struct comedi_cmd *cmd)
{
- struct das16m1_private_struct *devpriv = dev->private;
int err = 0;
- unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
+ err |= comedi_check_trigger_src(&cmd->convert_src,
+ TRIG_TIMER | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
if (cmd->scan_begin_src == TRIG_FOLLOW) /* internal trigger */
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
if (cmd->convert_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg, 1000);
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg, 1000);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
/* step 4: fix up arguments */
if (cmd->convert_src == TRIG_TIMER) {
- arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
+ unsigned int arg = cmd->convert_arg;
+
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
}
if (err)
return 0;
}
-static void das16m1_set_pacer(struct comedi_device *dev)
-{
- struct das16m1_private_struct *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + DAS16M1_8254_SECOND;
-
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
-
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
-}
-
static int das16m1_cmd_exec(struct comedi_device *dev,
struct comedi_subdevice *s)
{
struct das16m1_private_struct *devpriv = dev->private;
struct comedi_async *async = s->async;
struct comedi_cmd *cmd = &async->cmd;
- unsigned long timer_base = dev->iobase + DAS16M1_8254_FIRST;
unsigned int byte, i;
/* disable interrupts and internal pacer */
/* set software count */
devpriv->adc_count = 0;
- /* Initialize lower half of hardware counter, used to determine how
+
+ /*
+ * Initialize lower half of hardware counter, used to determine how
* many samples are in fifo. Value doesn't actually load into counter
- * until counter's next clock (the next a/d conversion) */
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- i8254_write(timer_base, 0, 1, 0);
- /* remember current reading of counter so we know when counter has
- * actually been loaded */
- devpriv->initial_hw_count = i8254_read(timer_base, 0, 1);
+ * until counter's next clock (the next a/d conversion).
+ */
+ comedi_8254_set_mode(devpriv->counter, 1, I8254_MODE2 | I8254_BINARY);
+ comedi_8254_write(devpriv->counter, 1, 0);
+
+ /*
+ * Remember current reading of counter so we know when counter has
+ * actually been loaded.
+ */
+ devpriv->initial_hw_count = comedi_8254_read(devpriv->counter, 1);
+
/* setup channel/gain queue */
for (i = 0; i < cmd->chanlist_len; i++) {
outb(i, dev->iobase + DAS16M1_QUEUE_ADDR);
/* enable interrupts and set internal pacer counter mode and counts */
devpriv->control_state &= ~PACER_MASK;
if (cmd->convert_src == TRIG_TIMER) {
- das16m1_set_pacer(dev);
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
devpriv->control_state |= INT_PACER;
} else { /* TRIG_EXT */
devpriv->control_state |= EXT_PACER;
async = s->async;
cmd = &async->cmd;
- /* figure out how many samples are in fifo */
- hw_counter = i8254_read(dev->iobase + DAS16M1_8254_FIRST, 0, 1);
+ /* figure out how many samples are in fifo */
+ hw_counter = comedi_8254_read(devpriv->counter, 1);
/* make sure hardware counter reading is not bogus due to initial value
* not having been loaded yet */
if (devpriv->adc_count == 0 && hw_counter == devpriv->initial_hw_count) {
dev->irq = it->options[1];
}
+ dev->pacer = comedi_8254_init(dev->iobase + DAS16M1_8254_SECOND,
+ I8254_OSC_BASE_10MHZ, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
+ devpriv->counter = comedi_8254_init(dev->iobase + DAS16M1_8254_FIRST,
+ 0, I8254_IO8, 0);
+ if (!devpriv->counter)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;
if (ret)
return ret;
- /* disable upper half of hardware conversion counter so it doesn't mess with us */
- outb(TOTAL_CLEAR, dev->iobase + DAS16M1_8254_FIRST_CNTRL);
-
/* initialize digital output lines */
outb(0, dev->iobase + DAS16M1_DIO);
{
struct das16m1_private_struct *devpriv = dev->private;
- if (devpriv && devpriv->extra_iobase)
- release_region(devpriv->extra_iobase, DAS16M1_SIZE2);
+ if (devpriv) {
+ if (devpriv->extra_iobase)
+ release_region(devpriv->extra_iobase, DAS16M1_SIZE2);
+ kfree(devpriv->counter);
+ }
comedi_legacy_detach(dev);
}
#include "../comedidev.h"
#include "comedi_isadma.h"
-#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
/* misc. defines */
#define DAS1800_SIZE 16 /* uses 16 io addresses */
struct das1800_private {
struct comedi_isadma *dma;
- unsigned int divisor1; /* value to load into board's counter 1 for timed conversions */
- unsigned int divisor2; /* value to load into board's counter 2 for timed conversions */
int irq_dma_bits; /* bits for control register b */
/* dma bits for control register b, stored so that dma can be
* turned on and off */
while (inb(dev->iobase + DAS1800_STATUS) & FNE) {
dpnt = inw(dev->iobase + DAS1800_FIFO);
- /* convert to unsigned type if we are in a bipolar mode */
- if (!unipolar)
- ;
+ /* convert to unsigned type */
dpnt = munge_bipolar_sample(dev, dpnt);
comedi_buf_write_samples(s, &dpnt, 1);
struct comedi_cmd *cmd)
{
const struct das1800_board *thisboard = dev->board_ptr;
- struct das1800_private *devpriv = dev->private;
int err = 0;
unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
TRIG_FOLLOW | TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src,
+ err |= comedi_check_trigger_src(&cmd->convert_src,
+ TRIG_TIMER | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src,
TRIG_COUNT | TRIG_EXT | TRIG_NONE);
if (err)
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
- if (cmd->convert_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
- thisboard->ai_speed);
+ if (cmd->convert_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
+ thisboard->ai_speed);
+ }
- err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_min(&cmd->chanlist_len, 1);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
switch (cmd->stop_src) {
case TRIG_COUNT:
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
break;
case TRIG_NONE:
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
break;
default:
break;
cmd->convert_src == TRIG_TIMER) {
/* we are not in burst mode */
arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_5MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &cmd->convert_arg, cmd->flags);
- if (arg != cmd->convert_arg)
- err++;
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
} else if (cmd->convert_src == TRIG_TIMER) {
/* we are in burst mode */
- arg = cmd->convert_arg;
- cmd->convert_arg = burst_convert_arg(cmd->convert_arg,
- cmd->flags);
- if (arg != cmd->convert_arg)
- err++;
+ arg = burst_convert_arg(cmd->convert_arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->convert_arg * cmd->chanlist_len;
- if (arg > cmd->scan_begin_arg) {
- cmd->scan_begin_arg = arg;
- err++;
- }
+ err |= comedi_check_trigger_arg_max(&cmd->
+ scan_begin_arg,
+ arg);
arg = cmd->scan_begin_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_5MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &cmd->scan_begin_arg,
- cmd->flags);
- if (arg != cmd->scan_begin_arg)
- err++;
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg,
+ cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg,
+ arg);
}
}
return control_c;
}
-static void das1800_setup_counters(struct comedi_device *dev,
- const struct comedi_cmd *cmd)
-{
- struct das1800_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + DAS1800_COUNTER;
-
- /* setup cascaded counters for conversion/scan frequency */
- if ((cmd->scan_begin_src == TRIG_FOLLOW ||
- cmd->scan_begin_src == TRIG_TIMER) &&
- cmd->convert_src == TRIG_TIMER) {
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
-
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
- }
-
- /* setup counter 0 for 'about triggering' */
- if (cmd->stop_src == TRIG_EXT) {
- i8254_set_mode(timer_base, 0, 0, I8254_MODE0 | I8254_BINARY);
-
- i8254_write(timer_base, 0, 0, 1);
- }
-}
-
static unsigned int das1800_ai_transfer_size(struct comedi_device *dev,
struct comedi_subdevice *s,
unsigned int maxbytes,
/* setup card and start */
program_chanlist(dev, cmd);
- das1800_setup_counters(dev, cmd);
+
+ /* setup cascaded counters for conversion/scan frequency */
+ if ((cmd->scan_begin_src == TRIG_FOLLOW ||
+ cmd->scan_begin_src == TRIG_TIMER) &&
+ cmd->convert_src == TRIG_TIMER) {
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
+ }
+
+ /* setup counter 0 for 'about triggering' */
+ if (cmd->stop_src == TRIG_EXT)
+ comedi_8254_load(dev->pacer, 0, 1, I8254_MODE0 | I8254_BINARY);
+
das1800_ai_setup_dma(dev, s);
outb(control_c, dev->iobase + DAS1800_CONTROL_C);
/* set conversion rate and length for burst mode */
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
-
data[1] = inb(dev->iobase + DAS1800_DIGITAL) & 0xf;
data[0] = 0;
if (!devpriv->fifo_buf)
return -ENOMEM;
+ dev->pacer = comedi_8254_init(dev->iobase + DAS1800_COUNTER,
+ I8254_OSC_BASE_5MHZ, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;
#include <linux/interrupt.h>
#include "../comedidev.h"
-#include "comedi_fc.h"
-#include "8253.h"
+
+#include "comedi_8254.h"
/*
* Register I/O map
struct das6402_private {
unsigned int irq;
-
- unsigned int count;
- unsigned int divider1;
- unsigned int divider2;
-
unsigned int ao_range;
};
outb(DAS6402_STATUS_W_CLRINT, dev->iobase + DAS6402_STATUS_REG);
}
-static void das6402_enable_counter(struct comedi_device *dev, bool load)
-{
- struct das6402_private *devpriv = dev->private;
- unsigned long timer_iobase = dev->iobase + DAS6402_TIMER_BASE;
-
- if (load) {
- i8254_set_mode(timer_iobase, 0, 0, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(timer_iobase, 0, 1, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_iobase, 0, 2, I8254_MODE2 | I8254_BINARY);
-
- i8254_write(timer_iobase, 0, 0, devpriv->count);
- i8254_write(timer_iobase, 0, 1, devpriv->divider1);
- i8254_write(timer_iobase, 0, 2, devpriv->divider2);
-
- } else {
- i8254_set_mode(timer_iobase, 0, 0, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(timer_iobase, 0, 1, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(timer_iobase, 0, 2, I8254_MODE0 | I8254_BINARY);
- }
-}
-
static unsigned int das6402_ai_read_sample(struct comedi_device *dev,
struct comedi_subdevice *s)
{
outw(DAS6402_AI_MUX_HI(chan_hi) | DAS6402_AI_MUX_LO(chan_lo),
dev->iobase + DAS6402_AI_MUX_REG);
- das6402_enable_counter(dev, true);
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
/* enable interrupt and pacer trigger */
outb(DAS6402_CTRL_INTE |
struct comedi_subdevice *s,
struct comedi_cmd *cmd)
{
- struct das6402_private *devpriv = dev->private;
int err = 0;
unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg, 10000);
- err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg, 10000);
+ err |= comedi_check_trigger_arg_min(&cmd->chanlist_len, 1);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
/* step 4: fix up any arguments */
- if (cmd->convert_src == TRIG_TIMER) {
- arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
- &devpriv->divider1,
- &devpriv->divider2,
- &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
- }
+ arg = cmd->convert_arg;
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
if (err)
return 4;
outw(0, dev->iobase + DAS6402_AO_DATA_REG(0));
inw(dev->iobase + DAS6402_AO_LSB_REG(0));
- das6402_enable_counter(dev, false);
-
/* set all digital outputs low */
outb(0, dev->iobase + DAS6402_DI_DO_REG);
}
}
+ dev->pacer = comedi_8254_init(dev->iobase + DAS6402_TIMER_BASE,
+ I8254_OSC_BASE_10MHZ, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;
The cio-das802/16 does not have a fifo-empty status bit! Therefore
only fifo-half-full transfers are possible with this card.
-*/
-/*
cmd triggers supported:
start_src: TRIG_NOW | TRIG_EXT
scan_end_src: TRIG_COUNT
convert_src: TRIG_TIMER | TRIG_EXT
stop_src: TRIG_NONE | TRIG_COUNT
-
-
*/
#include <linux/module.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
-
#include <linux/delay.h>
-#include "8253.h"
-#include "comedi_fc.h"
+#include "../comedidev.h"
+
+#include "comedi_8254.h"
#define N_CHAN_AI 8 /* number of analog input channels */
};
struct das800_private {
- unsigned int divisor1; /* counter 1 value for timed conversions */
- unsigned int divisor2; /* counter 2 value for timed conversions */
unsigned int do_bits; /* digital output bits */
};
spin_unlock_irqrestore(&dev->spinlock, irq_flags);
}
-static void das800_set_frequency(struct comedi_device *dev)
-{
- struct das800_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + DAS800_8254;
-
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
-}
-
static int das800_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
{
das800_disable(dev);
struct comedi_cmd *cmd)
{
const struct das800_board *thisboard = dev->board_ptr;
- struct das800_private *devpriv = dev->private;
int err = 0;
- unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
+ err |= comedi_check_trigger_src(&cmd->convert_src,
+ TRIG_TIMER | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
- if (cmd->convert_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
- thisboard->ai_speed);
+ if (cmd->convert_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
+ thisboard->ai_speed);
+ }
- err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_min(&cmd->chanlist_len, 1);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
/* step 4: fix up any arguments */
if (cmd->convert_src == TRIG_TIMER) {
- arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_1MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
+ unsigned int arg = cmd->convert_arg;
+
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
}
if (err)
conv_bits |= DTEN;
if (cmd->convert_src == TRIG_TIMER) {
conv_bits |= CASC | ITE;
- /* set conversion frequency */
- das800_set_frequency(dev);
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
}
spin_lock_irqsave(&dev->spinlock, irq_flags);
dev->irq = irq;
}
+ dev->pacer = comedi_8254_init(dev->iobase + DAS800_8254,
+ I8254_OSC_BASE_1MHZ, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 3);
if (ret)
return ret;
* This driver is for the Diamond Systems MM-32-AT board
* http://www.diamondsystems.com/products/diamondmm32at
*
- * It is being used on serveral projects inside NASA, without
+ * It is being used on several projects inside NASA, without
* problems so far. For analog input commands, TRIG_EXT is not
* yet supported.
*/
#include "../comedidev.h"
#include "8255.h"
-#include "comedi_fc.h"
/* Board register addresses */
#define DMM32AT_AI_START_CONV_REG 0x00
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg, 1000000);
- err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg, 1000000000);
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg, 1000000);
+ err |= comedi_check_trigger_arg_max(&cmd->scan_begin_arg, 1000000000);
if (cmd->convert_arg >= 17500)
cmd->convert_arg = 20000;
else
cmd->convert_arg = 5000;
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
/* Step 4: fix up any arguments */
arg = cmd->convert_arg * cmd->scan_end_arg;
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg, arg);
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg, arg);
if (err)
return 4;
/* start the clock and enable the interrupts */
dmm32at_setaitimer(dev, cmd->scan_begin_arg);
} else {
- /* start the interrups and initiate a single scan */
+ /* start the interrupts and initiate a single scan */
outb(DMM32AT_INTCLK_ADINT, dev->iobase + DMM32AT_INTCLK_REG);
outb(0xff, dev->iobase + DMM32AT_AI_START_CONV_REG);
}
return 0;
-
}
static int dmm32at_ai_cancel(struct comedi_device *dev,
};
struct dt2801_board {
-
const char *name;
int boardcode;
int ad_diff;
ret = dt2801_writedata(dev, data & 0xff);
if (ret < 0)
return ret;
- ret = dt2801_writedata(dev, (data >> 8));
+ ret = dt2801_writedata(dev, data >> 8);
if (ret < 0)
return ret;
#define DT2811_ADMODE 0x03
struct dt2811_board {
-
const char *name;
const struct comedi_lrange *bip_5;
const struct comedi_lrange *bip_2_5;
#include <linux/delay.h>
-#include "comedi_fc.h"
-
#define DT2814_CSR 0
#define DT2814_DATA 1
#define DT2814_CHANMASK 0x0f
struct dt2814_private {
-
int ntrig;
int curadchan;
};
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg, 1000000000);
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- DT2814_MAX_SPEED);
+ err |= comedi_check_trigger_arg_max(&cmd->scan_begin_arg, 1000000000);
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ DT2814_MAX_SPEED);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 2);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 2);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
arg = cmd->scan_begin_arg;
dt2814_ns_to_timer(&arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
if (err)
return 4;
outb(chan | DT2814_ENB | (trigvar << 5), dev->iobase + DT2814_CSR);
return 0;
-
}
static irqreturn_t dt2814_interrupt(int irq, void *d)
#define DT2815_STATUS 1
struct dt2815_private {
-
const struct comedi_lrange *range_type_list[8];
unsigned int ao_readback[8];
};
#include "../comedidev.h"
#include "comedi_isadma.h"
-#include "comedi_fc.h"
/*
* Register map
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
TRIG_FOLLOW | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg, 4000);
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg, 4000);
#define SLOWEST_TIMER (250*(1<<15)*255)
- err |= cfc_check_trigger_arg_max(&cmd->convert_arg, SLOWEST_TIMER);
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg, board->ai_speed);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_max(&cmd->convert_arg, SLOWEST_TIMER);
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg, board->ai_speed);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_EXT | TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
arg = cmd->convert_arg;
devpriv->divisor = dt282x_ns_to_timer(&arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
if (err)
return 4;
if (cmd->scan_begin_src == TRIG_FOLLOW) {
outw(devpriv->supcsr | DT2821_SUPCSR_STRIG,
- dev->iobase + DT2821_SUPCSR_REG);
+ dev->iobase + DT2821_SUPCSR_REG);
} else {
devpriv->supcsr |= DT2821_SUPCSR_XTRIG;
outw(devpriv->supcsr, dev->iobase + DT2821_SUPCSR_REG);
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_INT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_INT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg, 5000);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg, 5000);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_EXT | TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
arg = cmd->scan_begin_arg;
devpriv->divisor = dt282x_ns_to_timer(&arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
if (err)
return 4;
return 0;
-
}
static int dt282x_ao_inttrig(struct comedi_device *dev,
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
-
-#include "comedi_fc.h"
+#include "../comedi_pci.h"
static const struct comedi_lrange range_dt3000_ai = {
4, {
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT);
if (err)
return 1;
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
if (cmd->scan_begin_src == TRIG_TIMER) {
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- this_board->ai_speed);
- err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
- 100 * 16 * 65535);
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ this_board->ai_speed);
+ err |= comedi_check_trigger_arg_max(&cmd->scan_begin_arg,
+ 100 * 16 * 65535);
}
if (cmd->convert_src == TRIG_TIMER) {
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
- this_board->ai_speed);
- err |= cfc_check_trigger_arg_max(&cmd->convert_arg,
- 50 * 16 * 65535);
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
+ this_board->ai_speed);
+ err |= comedi_check_trigger_arg_max(&cmd->convert_arg,
+ 50 * 16 * 65535);
}
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_max(&cmd->stop_arg, 0x00ffffff);
+ err |= comedi_check_trigger_arg_max(&cmd->stop_arg, 0x00ffffff);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->scan_begin_arg;
dt3k_ns_to_timer(100, &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
if (cmd->convert_src == TRIG_TIMER) {
arg = cmd->convert_arg;
dt3k_ns_to_timer(50, &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->convert_arg * cmd->scan_end_arg;
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- arg);
+ err |= comedi_check_trigger_arg_min(&cmd->
+ scan_begin_arg,
+ arg);
}
}
#include <linux/module.h>
#include <linux/delay.h>
-#include <linux/pci.h>
#include <linux/mutex.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#define READ_TIMEOUT 50
}
static int dyna_pci10xx_insn_read_ai(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
{
struct dyna_pci10xx_private *devpriv = dev->private;
int n;
/* analog output callback */
static int dyna_pci10xx_insn_write_ao(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
{
struct dyna_pci10xx_private *devpriv = dev->private;
int n;
/* digital input bit interface */
static int dyna_pci10xx_di_insn_bits(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
{
struct dyna_pci10xx_private *devpriv = dev->private;
u16 d = 0;
}
static int dyna_pci10xx_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct dyna_pci10xx_private *devpriv;
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "plx9080.h"
-#include "comedi_fc.h"
/*
* PCI BAR2 Register map (dev->mmio)
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
if (!cmd->chanlist_len || !cmd->chanlist) {
cmd->chanlist_len = 32;
err |= -EINVAL;
}
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
return 5;
return 0;
-
}
/* setup dma descriptors so a link completes every 'len' bytes */
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#define ICP_MULTI_ADC_CSR 0 /* R/W: ADC command/status register */
#define ICP_MULTI_AI 2 /* R: Analogue input data */
break;
default:
break;
-
}
return IRQ_HANDLED;
}
static int icp_multi_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct icp_multi_private *devpriv;
#include <linux/kernel.h>
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/ctype.h>
#include <linux/jiffies.h>
#include <linux/slab.h>
#include <linux/timer.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "jr3_pci.h"
if (!devpriv)
return -ENOMEM;
- init_timer(&devpriv->timer);
-
ret = comedi_pci_enable(dev);
if (ret)
return ret;
spriv->next_time_max = jiffies + msecs_to_jiffies(2000);
}
- devpriv->timer.data = (unsigned long)dev;
- devpriv->timer.function = jr3_pci_poll_dev;
+ setup_timer(&devpriv->timer, jr3_pci_poll_dev, (unsigned long)dev);
devpriv->timer.expires = jiffies + msecs_to_jiffies(1000);
add_timer(&devpriv->timer);
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
/*
* PCI BAR 0 Register I/O map
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
-#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
#include "plx9052.h"
#define ME4000_FIRMWARE "me4000_firmware.bin"
struct me4000_info {
unsigned long plx_regbase;
- unsigned long timer_regbase;
};
enum me4000_boardid {
/* Set both stop bits in the analog input control register */
outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
- dev->iobase + ME4000_AI_CTRL_REG);
+ dev->iobase + ME4000_AI_CTRL_REG);
/* Set both stop bits in the analog output control register */
val = ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP;
/* Set the adustment register for AO demux */
outl(ME4000_AO_DEMUX_ADJUST_VALUE,
- dev->iobase + ME4000_AO_DEMUX_ADJUST_REG);
+ dev->iobase + ME4000_AO_DEMUX_ADJUST_REG);
/*
* Set digital I/O direction for port 0
if (!comedi_range_is_bipolar(s, range)) {
dev_dbg(dev->class_dev,
- "Bipolar is not selected in differential mode\n");
+ "Bipolar is not selected in differential mode\n");
return -EINVAL;
}
}
unsigned int *init_ticks,
unsigned int *scan_ticks, unsigned int *chan_ticks)
{
-
int rest;
*init_ticks = 0;
unsigned int init_ticks,
unsigned int scan_ticks, unsigned int chan_ticks)
{
-
unsigned int tmp = 0;
/* Write timer arguments */
/* Stop triggers */
if (cmd->stop_src == TRIG_COUNT) {
outl(cmd->chanlist_len * cmd->stop_arg,
- dev->iobase + ME4000_AI_SAMPLE_COUNTER_REG);
+ dev->iobase + ME4000_AI_SAMPLE_COUNTER_REG);
tmp |= ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ;
} else if (cmd->stop_src == TRIG_NONE &&
cmd->scan_end_src == TRIG_COUNT) {
outl(cmd->scan_end_arg,
- dev->iobase + ME4000_AI_SAMPLE_COUNTER_REG);
+ dev->iobase + ME4000_AI_SAMPLE_COUNTER_REG);
tmp |= ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ;
} else {
tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
struct comedi_subdevice *s,
struct comedi_cmd *cmd)
{
-
unsigned int init_ticks;
unsigned int chan_ticks;
unsigned int scan_ticks;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
TRIG_FOLLOW | TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_end_src,
+ err |= comedi_check_trigger_src(&cmd->convert_src,
+ TRIG_TIMER | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src,
TRIG_NONE | TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE | TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_NONE | TRIG_COUNT);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->scan_end_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_end_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
if (cmd->chanlist_len < 1) {
cmd->chanlist_len = 1;
}
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
if (cmd->start_src == TRIG_NOW &&
cmd->scan_begin_src == TRIG_TIMER &&
cmd->convert_src == TRIG_TIMER) {
-
/* Check timer arguments */
if (init_ticks < ME4000_AI_MIN_TICKS) {
dev_err(dev->class_dev, "Invalid start arg\n");
} else if (cmd->start_src == TRIG_NOW &&
cmd->scan_begin_src == TRIG_FOLLOW &&
cmd->convert_src == TRIG_TIMER) {
-
/* Check timer arguments */
if (init_ticks < ME4000_AI_MIN_TICKS) {
dev_err(dev->class_dev, "Invalid start arg\n");
} else if (cmd->start_src == TRIG_EXT &&
cmd->scan_begin_src == TRIG_TIMER &&
cmd->convert_src == TRIG_TIMER) {
-
/* Check timer arguments */
if (init_ticks < ME4000_AI_MIN_TICKS) {
dev_err(dev->class_dev, "Invalid start arg\n");
} else if (cmd->start_src == TRIG_EXT &&
cmd->scan_begin_src == TRIG_FOLLOW &&
cmd->convert_src == TRIG_TIMER) {
-
/* Check timer arguments */
if (init_ticks < ME4000_AI_MIN_TICKS) {
dev_err(dev->class_dev, "Invalid start arg\n");
} else if (cmd->start_src == TRIG_EXT &&
cmd->scan_begin_src == TRIG_EXT &&
cmd->convert_src == TRIG_TIMER) {
-
/* Check timer arguments */
if (init_ticks < ME4000_AI_MIN_TICKS) {
dev_err(dev->class_dev, "Invalid start arg\n");
} else if (cmd->start_src == TRIG_EXT &&
cmd->scan_begin_src == TRIG_EXT &&
cmd->convert_src == TRIG_EXT) {
-
/* Check timer arguments */
if (init_ticks < ME4000_AI_MIN_TICKS) {
dev_err(dev->class_dev, "Invalid start arg\n");
{
if (comedi_dio_update_state(s, data)) {
outl((s->state >> 0) & 0xFF,
- dev->iobase + ME4000_DIO_PORT_0_REG);
+ dev->iobase + ME4000_DIO_PORT_0_REG);
outl((s->state >> 8) & 0xFF,
- dev->iobase + ME4000_DIO_PORT_1_REG);
+ dev->iobase + ME4000_DIO_PORT_1_REG);
outl((s->state >> 16) & 0xFF,
- dev->iobase + ME4000_DIO_PORT_2_REG);
+ dev->iobase + ME4000_DIO_PORT_2_REG);
outl((s->state >> 24) & 0xFF,
- dev->iobase + ME4000_DIO_PORT_3_REG);
+ dev->iobase + ME4000_DIO_PORT_3_REG);
}
data[1] = ((inl(dev->iobase + ME4000_DIO_PORT_0_REG) & 0xFF) << 0) |
return insn->n;
}
-/*=============================================================================
- Counter section
- ===========================================================================*/
-
-static int me4000_cnt_insn_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn,
- unsigned int *data)
-{
- struct me4000_info *info = dev->private;
- unsigned int chan = CR_CHAN(insn->chanspec);
- int err;
-
- switch (data[0]) {
- case GPCT_RESET:
- if (insn->n != 1)
- return -EINVAL;
-
- err = i8254_set_mode(info->timer_regbase, 0, chan,
- I8254_MODE0 | I8254_BINARY);
- if (err)
- return err;
- i8254_write(info->timer_regbase, 0, chan, 0);
- break;
- case GPCT_SET_OPERATION:
- if (insn->n != 2)
- return -EINVAL;
-
- err = i8254_set_mode(info->timer_regbase, 0, chan,
- (data[1] << 1) | I8254_BINARY);
- if (err)
- return err;
- break;
- default:
- return -EINVAL;
- }
-
- return insn->n;
-}
-
-static int me4000_cnt_insn_read(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- struct me4000_info *info = dev->private;
-
- if (insn->n == 0)
- return 0;
-
- if (insn->n > 1) {
- dev_err(dev->class_dev, "Invalid instruction length %d\n",
- insn->n);
- return -EINVAL;
- }
-
- data[0] = i8254_read(info->timer_regbase, 0, insn->chanspec);
-
- return 1;
-}
-
-static int me4000_cnt_insn_write(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- struct me4000_info *info = dev->private;
-
- if (insn->n == 0) {
- return 0;
- } else if (insn->n > 1) {
- dev_err(dev->class_dev, "Invalid instruction length %d\n",
- insn->n);
- return -EINVAL;
- }
-
- i8254_write(info->timer_regbase, 0, insn->chanspec, data[0]);
-
- return 1;
-}
-
static int me4000_auto_attach(struct comedi_device *dev,
unsigned long context)
{
info->plx_regbase = pci_resource_start(pcidev, 1);
dev->iobase = pci_resource_start(pcidev, 2);
- info->timer_regbase = pci_resource_start(pcidev, 3);
- if (!info->plx_regbase || !dev->iobase || !info->timer_regbase)
+ if (!info->plx_regbase || !dev->iobase)
return -ENODEV;
result = comedi_load_firmware(dev, &pcidev->dev, ME4000_FIRMWARE,
if (pcidev->irq > 0) {
result = request_irq(pcidev->irq, me4000_ai_isr, IRQF_SHARED,
- dev->board_name, dev);
+ dev->board_name, dev);
if (result == 0)
dev->irq = pcidev->irq;
}
if (!inl(dev->iobase + ME4000_DIO_DIR_REG)) {
s->io_bits |= 0xFF;
outl(ME4000_DIO_CTRL_BIT_MODE_0,
- dev->iobase + ME4000_DIO_DIR_REG);
+ dev->iobase + ME4000_DIO_DIR_REG);
}
- /*=========================================================================
- Counter subdevice
- ========================================================================*/
-
+ /* Counter subdevice (8254) */
s = &dev->subdevices[3];
-
if (thisboard->has_counter) {
- s->type = COMEDI_SUBD_COUNTER;
- s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
- s->n_chan = 3;
- s->maxdata = 0xFFFF; /* 16 bit counters */
- s->insn_read = me4000_cnt_insn_read;
- s->insn_write = me4000_cnt_insn_write;
- s->insn_config = me4000_cnt_insn_config;
+ unsigned long timer_base = pci_resource_start(pcidev, 3);
+
+ if (!timer_base)
+ return -ENODEV;
+
+ dev->pacer = comedi_8254_init(timer_base, 0, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
+ comedi_8254_subdevice_init(s, dev->pacer);
} else {
s->type = COMEDI_SUBD_UNUSED;
}
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "plx9052.h"
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
-#include "../comedidev.h"
+
+#include "../comedi_pci.h"
/* Registers present in BAR0 memory region */
#define MF624_GPIOC_R 0x54
else
devpriv->gpioc_R = devpriv->bar0_mem + MF624_GPIOC_R;
-
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
-#include "comedi_fc.h"
#include "mite.h"
#define TOP_OF_PAGE(x) ((x)|(~(PAGE_MASK)))
struct mite_dma_descriptor_ring *ring =
kmalloc(sizeof(struct mite_dma_descriptor_ring), GFP_KERNEL);
- if (ring == NULL)
- return ring;
+ if (!ring)
+ return NULL;
ring->hw_dev = get_device(&mite->pcidev->dev);
- if (ring->hw_dev == NULL) {
+ if (!ring->hw_dev) {
kfree(ring);
return NULL;
}
#ifndef _MITE_H_
#define _MITE_H_
-#include <linux/pci.h>
#include <linux/log2.h>
#include <linux/slab.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#define PCIMIO_COMPAT
(MPC624_OSR4 | MPC624_OSR3 | MPC624_OSR2 | MPC624_OSR1 | MPC624_OSR0)
/* -------------------------------------------------------------------------- */
struct mpc624_private {
-
/* set by mpc624_attach() from driver's parameters */
unsigned long int ulConvertionRate;
};
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
-
-#include "comedi_fc.h"
+#include "../comedi_pci.h"
/*
* PCI BAR1 - Register memory map
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_OTHER);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_OTHER);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT);
if (err)
return 1;
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
-
-#include "comedi_fc.h"
+#include "../comedi_pci.h"
/*
* PCI BAR1 Register Map
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_OTHER);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_OTHER);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT);
if (err)
return 1;
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
return insn->n;
}
-/* ripped from mite.h and mite_setup2() to avoid mite dependancy */
+/* ripped from mite.h and mite_setup2() to avoid mite dependency */
#define MITE_IODWBSR 0xc0 /* IO Device Window Base Size Register */
#define WENAB (1 << 7) /* window enable */
}
dev_info(dev->class_dev, "board: %s, ID=0x%02x", dev->board_name,
- readb(dev->mmio + NI_65XX_ID_REG));
+ readb(dev->mmio + NI_65XX_ID_REG));
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
-#include "comedi_fc.h"
#include "mite.h"
#include "ni_tio.h"
}
struct NI_660xRegisterData {
-
const char *name; /* Register Name */
int offset; /* Offset from base address from GPCT chip */
enum ni_660x_register_direction direction;
BUG_ON(counter->mite_chan);
mite_chan = mite_request_channel(devpriv->mite,
mite_ring(devpriv, counter));
- if (mite_chan == NULL) {
+ if (!mite_chan) {
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
dev_err(dev->class_dev,
"failed to reserve mite dma channel for counter\n");
for (j = 0; j < counters_per_chip; ++j) {
devpriv->mite_rings[i][j] =
mite_alloc_ring(devpriv->mite);
- if (devpriv->mite_rings[i][j] == NULL)
+ if (!devpriv->mite_rings[i][j])
return -ENOMEM;
}
}
ni_gpct_variant_660x,
ni_660x_num_counters
(dev));
- if (devpriv->counter_dev == NULL)
+ if (!devpriv->counter_dev)
return -ENOMEM;
for (i = 0; i < NI_660X_MAX_NUM_COUNTERS; ++i) {
s = &dev->subdevices[NI_660X_GPCT_SUBDEV(i)];
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#define AO_VALUE_OFFSET 0x00
#define AO_CHAN_OFFSET 0x0c
return insn->n;
}
-/* ripped from mite.h and mite_setup2() to avoid mite dependancy */
+/* ripped from mite.h and mite_setup2() to avoid mite dependency */
#define MITE_IODWBSR 0xc0 /* IO Device Window Base Size Register */
#define WENAB (1 << 7) /* window enable */
#include "../comedidev.h"
#include "comedi_isadma.h"
-#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
#define A2150_DMA_BUFFER_SIZE 0xff00 /* size in bytes of dma buffer */
#define DMA_INTR_EN_BIT 0x800 /* enable interrupt on dma terminal count */
#define DMA_DEM_EN_BIT 0x1000 /* enables demand mode dma */
#define I8253_BASE_REG 0x14
-#define I8253_MODE_REG 0x17
-#define HW_COUNT_DISABLE 0x30 /* disable hardware counting of conversions */
struct a2150_board {
const char *name;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
- if (cmd->convert_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
- thisboard->ai_speed);
+ if (cmd->convert_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
+ thisboard->ai_speed);
+ }
- err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_min(&cmd->chanlist_len, 1);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->scan_begin_arg;
a2150_get_timing(dev, &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
if (err)
struct comedi_isadma_desc *desc = &dma->desc[0];
struct comedi_async *async = s->async;
struct comedi_cmd *cmd = &async->cmd;
- unsigned long timer_base = dev->iobase + I8253_BASE_REG;
unsigned int old_config_bits = devpriv->config_bits;
unsigned int trigger_bits;
outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG);
/* may need to wait 72 sampling periods if timing was changed */
- i8254_set_mode(timer_base, 0, 2, I8254_MODE0 | I8254_BINARY);
- i8254_write(timer_base, 0, 2, 72);
+ comedi_8254_load(dev->pacer, 2, 72, I8254_MODE0 | I8254_BINARY);
/* setup start triggering */
trigger_bits = 0;
/* an IRQ and DMA are required to support async commands */
a2150_alloc_irq_and_dma(dev, it);
+ dev->pacer = comedi_8254_init(dev->iobase + I8253_BASE_REG,
+ 0, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 1);
if (ret)
return ret;
s->cancel = a2150_cancel;
}
- /* need to do this for software counting of completed conversions, to
- * prevent hardware count from stopping acquisition */
- outw(HW_COUNT_DISABLE, dev->iobase + I8253_MODE_REG);
-
/* set card's irq and dma levels */
outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG);
#include "../comedidev.h"
-#include "8253.h"
+#include "comedi_8254.h"
/*
* Register map
static void atao_reset(struct comedi_device *dev)
{
struct atao_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + ATAO_82C53_BASE;
/* This is the reset sequence described in the manual */
outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
/* Put outputs of counter 1 and counter 2 in a high state */
- i8254_set_mode(timer_base, 0, 0, I8254_MODE4 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 1, I8254_MODE4 | I8254_BINARY);
- i8254_write(timer_base, 0, 0, 0x0003);
+ comedi_8254_set_mode(dev->pacer, 0, I8254_MODE4 | I8254_BINARY);
+ comedi_8254_set_mode(dev->pacer, 1, I8254_MODE4 | I8254_BINARY);
+ comedi_8254_write(dev->pacer, 0, 0x0003);
outw(ATAO_CFG2_CALLD_NOP, dev->iobase + ATAO_CFG2_REG);
if (!devpriv)
return -ENOMEM;
+ dev->pacer = comedi_8254_init(dev->iobase + ATAO_82C53_BASE,
+ 0, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;
ISAPNP_FUNCTION(ni_boards[i].
isapnp_id), NULL);
- if (isapnp_dev == NULL || isapnp_dev->card == NULL)
+ if (!isapnp_dev || !isapnp_dev->card)
continue;
if (pnp_device_attach(isapnp_dev) < 0)
for (i = 0; i < ARRAY_SIZE(ni_boards); i++) {
if (ni_boards[i].device_id == device_id)
return i;
-
}
if (device_id == 255)
dev_err(dev->class_dev, "can't find board\n");
if (ret < 0)
return ret;
-
return 0;
}
#include <linux/interrupt.h>
#include "../comedidev.h"
-#include "comedi_fc.h"
#include "8255.h"
/* Configuration and Status Registers */
#define CLOCK_100_HZ 0x8F25
struct atmio16_board_t {
-
const char *name;
int has_8255;
};
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
TRIG_FOLLOW | TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
if (cmd->scan_begin_src == TRIG_FOLLOW) {
/* internal trigger */
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
} else {
#if 0
/* external trigger */
/* should be level/edge, hi/lo specification here */
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
#endif
}
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg, 10000);
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg, 10000);
#if 0
- err |= cfc_check_trigger_arg_max(&cmd->convert_arg, SLOWEST_TIMER);
+ err |= comedi_check_trigger_arg_max(&cmd->convert_arg, SLOWEST_TIMER);
#endif
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
static void labpc_detach(struct comedi_device *dev)
{
labpc_free_dma_chan(dev);
+ labpc_common_detach(dev);
comedi_legacy_detach(dev);
}
struct labpc_private {
struct comedi_isadma *dma;
+ struct comedi_8254 *counter;
/* number of data points left to be taken */
unsigned long long count;
/* store last read of board status registers */
unsigned int stat1;
unsigned int stat2;
- /*
- * value to load into board's counter a0 (conversion pacing) for timed
- * conversions
- */
- unsigned int divisor_a0;
- /*
- * value to load into board's counter b0 (master) for timed conversions
- */
- unsigned int divisor_b0;
- /*
- * value to load into board's counter b1 (scan pacing) for timed
- * conversions
- */
- unsigned int divisor_b1;
/* we are using dma/fifo-half-full/etc. */
enum transfer_type current_transfer;
int labpc_common_attach(struct comedi_device *dev,
unsigned int irq, unsigned long isr_flags);
+void labpc_common_detach(struct comedi_device *dev);
#endif /* _NI_LABPC_H */
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/delay.h>
+#include <linux/slab.h>
#include "../comedidev.h"
-#include "8253.h"
+#include "comedi_8254.h"
#include "8255.h"
-#include "comedi_fc.h"
#include "ni_labpc.h"
#include "ni_labpc_regs.h"
#include "ni_labpc_isadma.h"
writeb(byte, dev->mmio + reg);
}
-static void labpc_counter_load(struct comedi_device *dev,
- unsigned long reg,
- unsigned int counter_number,
- unsigned int count,
- unsigned int mode)
-{
- if (dev->mmio) {
- i8254_mm_set_mode(dev->mmio + reg, 0, counter_number, mode);
- i8254_mm_write(dev->mmio + reg, 0, counter_number, count);
- } else {
- i8254_set_mode(dev->iobase + reg, 0, counter_number, mode);
- i8254_write(dev->iobase + reg, 0, counter_number, count);
- }
-}
-
-static void labpc_counter_set_mode(struct comedi_device *dev,
- unsigned long reg,
- unsigned int counter_number,
- unsigned int mode)
-{
- if (dev->mmio)
- i8254_mm_set_mode(dev->mmio + reg, 0, counter_number, mode);
- else
- i8254_set_mode(dev->iobase + reg, 0, counter_number, mode);
-}
-
static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
{
struct labpc_private *devpriv = dev->private;
devpriv->write_byte(dev, devpriv->cmd4, CMD4_REG);
/* initialize pacer counter to prevent any problems */
- labpc_counter_set_mode(dev, COUNTER_A_BASE_REG, 0, I8254_MODE2);
+ comedi_8254_set_mode(devpriv->counter, 0, I8254_MODE2 | I8254_BINARY);
labpc_clear_adc_fifo(dev);
static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
enum scan_mode mode)
{
- struct labpc_private *devpriv = dev->private;
+ struct comedi_8254 *pacer = dev->pacer;
+ unsigned int convert_period = labpc_ai_convert_period(cmd, mode);
+ unsigned int scan_period = labpc_ai_scan_period(cmd, mode);
unsigned int base_period;
- unsigned int scan_period;
- unsigned int convert_period;
/*
- * if both convert and scan triggers are TRIG_TIMER, then they
- * both rely on counter b0
+ * If both convert and scan triggers are TRIG_TIMER, then they
+ * both rely on counter b0. If only one TRIG_TIMER is used, we
+ * can use the generic cascaded timing functions.
*/
- convert_period = labpc_ai_convert_period(cmd, mode);
- scan_period = labpc_ai_scan_period(cmd, mode);
if (convert_period && scan_period) {
/*
- * pick the lowest b0 divisor value we can (for maximum input
+ * pick the lowest divisor value we can (for maximum input
* clock speed on convert and scan counters)
*/
- devpriv->divisor_b0 = (scan_period - 1) /
- (I8254_OSC_BASE_2MHZ * 0x10000) + 1;
+ pacer->next_div1 = (scan_period - 1) /
+ (pacer->osc_base * I8254_MAX_COUNT) + 1;
- cfc_check_trigger_arg_min(&devpriv->divisor_b0, 2);
- cfc_check_trigger_arg_max(&devpriv->divisor_b0, 0x10000);
+ comedi_check_trigger_arg_min(&pacer->next_div1, 2);
+ comedi_check_trigger_arg_max(&pacer->next_div1,
+ I8254_MAX_COUNT);
- base_period = I8254_OSC_BASE_2MHZ * devpriv->divisor_b0;
+ base_period = pacer->osc_base * pacer->next_div1;
/* set a0 for conversion frequency and b1 for scan frequency */
switch (cmd->flags & CMDF_ROUND_MASK) {
default:
case CMDF_ROUND_NEAREST:
- devpriv->divisor_a0 = DIV_ROUND_CLOSEST(convert_period,
- base_period);
- devpriv->divisor_b1 = DIV_ROUND_CLOSEST(scan_period,
- base_period);
+ pacer->next_div = DIV_ROUND_CLOSEST(convert_period,
+ base_period);
+ pacer->next_div2 = DIV_ROUND_CLOSEST(scan_period,
+ base_period);
break;
case CMDF_ROUND_UP:
- devpriv->divisor_a0 = DIV_ROUND_UP(convert_period,
- base_period);
- devpriv->divisor_b1 = DIV_ROUND_UP(scan_period,
- base_period);
+ pacer->next_div = DIV_ROUND_UP(convert_period,
+ base_period);
+ pacer->next_div2 = DIV_ROUND_UP(scan_period,
+ base_period);
break;
case CMDF_ROUND_DOWN:
- devpriv->divisor_a0 = convert_period / base_period;
- devpriv->divisor_b1 = scan_period / base_period;
+ pacer->next_div = convert_period / base_period;
+ pacer->next_div2 = scan_period / base_period;
break;
}
/* make sure a0 and b1 values are acceptable */
- cfc_check_trigger_arg_min(&devpriv->divisor_a0, 2);
- cfc_check_trigger_arg_max(&devpriv->divisor_a0, 0x10000);
- cfc_check_trigger_arg_min(&devpriv->divisor_b1, 2);
- cfc_check_trigger_arg_max(&devpriv->divisor_b1, 0x10000);
+ comedi_check_trigger_arg_min(&pacer->next_div, 2);
+ comedi_check_trigger_arg_max(&pacer->next_div, I8254_MAX_COUNT);
+ comedi_check_trigger_arg_min(&pacer->next_div2, 2);
+ comedi_check_trigger_arg_max(&pacer->next_div2,
+ I8254_MAX_COUNT);
+
/* write corrected timings to command */
labpc_set_ai_convert_period(cmd, mode,
- base_period * devpriv->divisor_a0);
+ base_period * pacer->next_div);
labpc_set_ai_scan_period(cmd, mode,
- base_period * devpriv->divisor_b1);
- /*
- * if only one TRIG_TIMER is used, we can employ the generic
- * cascaded timing functions
- */
+ base_period * pacer->next_div2);
} else if (scan_period) {
/*
* calculate cascaded counter values
* that give desired scan timing
+ * (pacer->next_div2 / pacer->next_div1)
*/
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ,
- &devpriv->divisor_b1,
- &devpriv->divisor_b0,
- &scan_period, cmd->flags);
+ comedi_8254_cascade_ns_to_timer(pacer, &scan_period,
+ cmd->flags);
labpc_set_ai_scan_period(cmd, mode, scan_period);
} else if (convert_period) {
/*
* calculate cascaded counter values
* that give desired conversion timing
+ * (pacer->next_div / pacer->next_div1)
*/
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ,
- &devpriv->divisor_a0,
- &devpriv->divisor_b0,
- &convert_period, cmd->flags);
+ comedi_8254_cascade_ns_to_timer(pacer, &convert_period,
+ cmd->flags);
+ /* transfer div2 value so correct timer gets updated */
+ pacer->next_div = pacer->next_div2;
labpc_set_ai_convert_period(cmd, mode, convert_period);
}
}
return MODE_SINGLE_CHAN;
/* chanlist may be NULL during cmdtest */
- if (cmd->chanlist == NULL)
+ if (!cmd->chanlist)
return MODE_MULT_CHAN_UP;
chan0 = CR_CHAN(cmd->chanlist[0]);
unsigned int aref0 = CR_AREF(cmd->chanlist[0]);
int i;
- if (mode == MODE_SINGLE_CHAN)
- return 0;
-
for (i = 0; i < cmd->chanlist_len; i++) {
unsigned int chan = CR_CHAN(cmd->chanlist[i]);
unsigned int range = CR_RANGE(cmd->chanlist[i]);
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->convert_src,
+ TRIG_TIMER | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
stop_mask = TRIG_COUNT | TRIG_NONE;
if (board->is_labpc1200)
stop_mask |= TRIG_EXT;
- err |= cfc_check_trigger_src(&cmd->stop_src, stop_mask);
+ err |= comedi_check_trigger_src(&cmd->stop_src, stop_mask);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
switch (cmd->start_src) {
case TRIG_NOW:
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
break;
case TRIG_EXT:
/* start_arg value is ignored */
if (!cmd->chanlist_len)
err |= -EINVAL;
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
- if (cmd->convert_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
- board->ai_speed);
+ if (cmd->convert_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
+ board->ai_speed);
+ }
/* make sure scan timing is not too fast */
if (cmd->scan_begin_src == TRIG_TIMER) {
- if (cmd->convert_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- cmd->convert_arg * cmd->chanlist_len);
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- board->ai_speed * cmd->chanlist_len);
+ if (cmd->convert_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->
+ scan_begin_arg,
+ cmd->convert_arg *
+ cmd->chanlist_len);
+ }
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ board->ai_speed *
+ cmd->chanlist_len);
}
switch (cmd->stop_src) {
case TRIG_COUNT:
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
break;
case TRIG_NONE:
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
break;
/*
* TRIG_EXT doesn't care since it doesn't
* load counter a1 with count of 3
* (pc+ manual says this is minimum allowed) using mode 0
*/
- labpc_counter_load(dev, COUNTER_A_BASE_REG,
- 1, 3, I8254_MODE0);
+ comedi_8254_load(devpriv->counter, 1,
+ 3, I8254_MODE0 | I8254_BINARY);
} else {
/* just put counter a1 in mode 0 to set its output low */
- labpc_counter_set_mode(dev, COUNTER_A_BASE_REG, 1, I8254_MODE0);
+ comedi_8254_set_mode(devpriv->counter, 1,
+ I8254_MODE0 | I8254_BINARY);
}
/* figure out what method we will use to transfer data */
if (cmd->convert_src == TRIG_TIMER ||
cmd->scan_begin_src == TRIG_TIMER) {
- /* set up pacing */
- labpc_adc_timing(dev, cmd, mode);
- /* load counter b0 in mode 3 */
- labpc_counter_load(dev, COUNTER_B_BASE_REG,
- 0, devpriv->divisor_b0, I8254_MODE3);
- }
- /* set up conversion pacing */
- if (labpc_ai_convert_period(cmd, mode)) {
- /* load counter a0 in mode 2 */
- labpc_counter_load(dev, COUNTER_A_BASE_REG,
- 0, devpriv->divisor_a0, I8254_MODE2);
- } else {
- /* initialize pacer counter to prevent any problems */
- labpc_counter_set_mode(dev, COUNTER_A_BASE_REG, 0, I8254_MODE2);
- }
+ struct comedi_8254 *pacer = dev->pacer;
+ struct comedi_8254 *counter = devpriv->counter;
+
+ comedi_8254_update_divisors(pacer);
- /* set up scan pacing */
- if (labpc_ai_scan_period(cmd, mode)) {
- /* load counter b1 in mode 2 */
- labpc_counter_load(dev, COUNTER_B_BASE_REG,
- 1, devpriv->divisor_b1, I8254_MODE2);
+ /* set up pacing */
+ comedi_8254_load(pacer, 0, pacer->divisor1,
+ I8254_MODE3 | I8254_BINARY);
+
+ /* set up conversion pacing */
+ comedi_8254_set_mode(counter, 0, I8254_MODE2 | I8254_BINARY);
+ if (labpc_ai_convert_period(cmd, mode))
+ comedi_8254_write(counter, 0, pacer->divisor);
+
+ /* set up scan pacing */
+ if (labpc_ai_scan_period(cmd, mode))
+ comedi_8254_load(pacer, 1, pacer->divisor2,
+ I8254_MODE2 | I8254_BINARY);
}
labpc_clear_adc_fifo(dev);
dev->irq = irq;
}
+ if (dev->mmio) {
+ dev->pacer = comedi_8254_mm_init(dev->mmio + COUNTER_B_BASE_REG,
+ I8254_OSC_BASE_2MHZ,
+ I8254_IO8, 0);
+ devpriv->counter = comedi_8254_mm_init(dev->mmio +
+ COUNTER_A_BASE_REG,
+ I8254_OSC_BASE_2MHZ,
+ I8254_IO8, 0);
+ } else {
+ dev->pacer = comedi_8254_init(dev->iobase + COUNTER_B_BASE_REG,
+ I8254_OSC_BASE_2MHZ,
+ I8254_IO8, 0);
+ devpriv->counter = comedi_8254_init(dev->iobase +
+ COUNTER_A_BASE_REG,
+ I8254_OSC_BASE_2MHZ,
+ I8254_IO8, 0);
+ }
+ if (!dev->pacer || !devpriv->counter)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 5);
if (ret)
return ret;
}
EXPORT_SYMBOL_GPL(labpc_common_attach);
+void labpc_common_detach(struct comedi_device *dev)
+{
+ struct labpc_private *devpriv = dev->private;
+
+ if (devpriv)
+ kfree(devpriv->counter);
+}
+EXPORT_SYMBOL_GPL(labpc_common_detach);
+
static int __init labpc_common_init(void)
{
return 0;
},
};
-static int labpc_auto_attach(struct comedi_device *dev,
- unsigned long context)
+static int labpc_cs_auto_attach(struct comedi_device *dev,
+ unsigned long context)
{
struct pcmcia_device *link = comedi_to_pcmcia_dev(dev);
int ret;
return labpc_common_attach(dev, link->irq, IRQF_SHARED);
}
+static void labpc_cs_detach(struct comedi_device *dev)
+{
+ labpc_common_detach(dev);
+ comedi_pcmcia_disable(dev);
+}
+
static struct comedi_driver driver_labpc_cs = {
.driver_name = "ni_labpc_cs",
.module = THIS_MODULE,
- .auto_attach = labpc_auto_attach,
- .detach = comedi_pcmcia_disable,
+ .auto_attach = labpc_cs_auto_attach,
+ .detach = labpc_cs_detach,
};
static int labpc_cs_attach(struct pcmcia_device *link)
#include "../comedidev.h"
#include "comedi_isadma.h"
-#include "comedi_fc.h"
#include "ni_labpc.h"
#include "ni_labpc_regs.h"
#include "ni_labpc_isadma.h"
#include <linux/module.h>
#include <linux/interrupt.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "ni_labpc.h"
},
};
-/* ripped from mite.h and mite_setup2() to avoid mite dependancy */
+/* ripped from mite.h and mite_setup2() to avoid mite dependency */
#define MITE_IODWBSR 0xc0 /* IO Device Window Base Size Register */
#define WENAB (1 << 7) /* window enable */
return labpc_common_attach(dev, pcidev->irq, IRQF_SHARED);
}
+static void labpc_pci_detach(struct comedi_device *dev)
+{
+ labpc_common_detach(dev);
+ comedi_pci_detach(dev);
+}
+
static struct comedi_driver labpc_pci_comedi_driver = {
.driver_name = "labpc_pci",
.module = THIS_MODULE,
.auto_attach = labpc_pci_auto_attach,
- .detach = comedi_pci_detach,
+ .detach = labpc_pci_detach,
};
static const struct pci_device_id labpc_pci_table[] = {
#include <linux/delay.h>
#include "8255.h"
#include "mite.h"
-#include "comedi_fc.h"
/* A timeout count */
#define NI_TIMEOUT 1000
ni_writeb(dev, devpriv->g0_g1_select_reg, G0_G1_Select);
break;
default:
- dev_err(dev->class_dev,
- "%s called with invalid register %d\n", __func__, reg);
+ dev_err(dev->class_dev, "called with invalid register %d\n",
+ reg);
break;
}
mmiowb();
BUG_ON(devpriv->ai_mite_chan);
devpriv->ai_mite_chan =
mite_request_channel(devpriv->mite, devpriv->ai_mite_ring);
- if (devpriv->ai_mite_chan == NULL) {
+ if (!devpriv->ai_mite_chan) {
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
dev_err(dev->class_dev,
"failed to reserve mite dma channel for analog input\n");
BUG_ON(devpriv->ao_mite_chan);
devpriv->ao_mite_chan =
mite_request_channel(devpriv->mite, devpriv->ao_mite_ring);
- if (devpriv->ao_mite_chan == NULL) {
+ if (!devpriv->ao_mite_chan) {
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
dev_err(dev->class_dev,
"failed to reserve mite dma channel for analog outut\n");
mite_chan =
mite_request_channel(devpriv->mite,
devpriv->gpct_mite_ring[gpct_index]);
- if (mite_chan == NULL) {
+ if (!mite_chan) {
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
dev_err(dev->class_dev,
"failed to reserve mite dma channel for counter\n");
BUG_ON(devpriv->cdo_mite_chan);
devpriv->cdo_mite_chan =
mite_request_channel(devpriv->mite, devpriv->cdo_mite_ring);
- if (devpriv->cdo_mite_chan == NULL) {
+ if (!devpriv->cdo_mite_chan) {
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
dev_err(dev->class_dev,
"failed to reserve mite dma channel for correlated digital output\n");
udelay(5);
}
if (i == timeout) {
- dev_err(dev->class_dev, "%s timed out\n", __func__);
+ dev_err(dev->class_dev, "timed out\n");
dev_err(dev->class_dev,
"mite_bytes_in_transit=%i, AI_Status1_Register=0x%x\n",
mite_bytes_in_transit(devpriv->ai_mite_chan),
/* Check if there's a single sample stuck in the FIFO */
if (ni_readb(dev, XXX_Status) & 0x80) {
dl = ni_readl(dev, ADC_FIFO_Data_611x);
- data = (dl & 0xffff);
+ data = dl & 0xffff;
comedi_buf_write_samples(s, &data, 1);
}
}
comedi_buf_write_alloc(s, s->async->prealloc_bufsz);
spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
- if (devpriv->ai_mite_chan == NULL) {
+ if (!devpriv->ai_mite_chan) {
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
return -EIO;
}
mite_prep_dma(devpriv->ao_mite_chan, 16, 32);
}
mite_dma_arm(devpriv->ao_mite_chan);
- } else
+ } else {
retval = -EIO;
+ }
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
return retval;
chan = CR_CHAN(list[0]);
range = CR_RANGE(list[0]);
range_code = ni_gainlkup[board->gainlkup][range];
- dither = ((list[0] & CR_ALT_FILTER) != 0);
+ dither = (list[0] & CR_ALT_FILTER) != 0;
bypass_bits = MSeries_AI_Bypass_Config_FIFO_Bit;
bypass_bits |= chan;
bypass_bits |=
chan = CR_CHAN(list[i]);
aref = CR_AREF(list[i]);
range = CR_RANGE(list[i]);
- dither = ((list[i] & CR_ALT_FILTER) != 0);
+ dither = (list[i] & CR_ALT_FILTER) != 0;
range_code = ni_gainlkup[board->gainlkup][range];
devpriv->ai_offset[i] = 0;
chan = CR_CHAN(list[i]);
aref = CR_AREF(list[i]);
range = CR_RANGE(list[i]);
- dither = ((list[i] & CR_ALT_FILTER) != 0);
+ dither = (list[i] & CR_ALT_FILTER) != 0;
/* fix the external/internal range differences */
range = ni_gainlkup[board->gainlkup][range];
}
}
if (i == NI_TIMEOUT) {
- dev_err(dev->class_dev, "%s timeout\n",
- __func__);
+ dev_err(dev->class_dev, "timeout\n");
return -ETIME;
}
d += signbits;
}
}
if (i == NI_TIMEOUT) {
- dev_err(dev->class_dev, "%s timeout\n",
- __func__);
+ dev_err(dev->class_dev, "timeout\n");
return -ETIME;
}
data[n] = (((dl >> 16) & 0xFFFF) + signbits) & 0xFFFF;
break;
}
if (i == NI_TIMEOUT) {
- dev_err(dev->class_dev, "%s timeout\n",
- __func__);
+ dev_err(dev->class_dev, "timeout\n");
return -ETIME;
}
if (devpriv->is_m_series) {
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src,
+ err |= comedi_check_trigger_src(&cmd->start_src,
TRIG_NOW | TRIG_INT | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
TRIG_TIMER | TRIG_EXT);
sources = TRIG_TIMER | TRIG_EXT;
if (devpriv->is_611x || devpriv->is_6143)
sources |= TRIG_NOW;
- err |= cfc_check_trigger_src(&cmd->convert_src, sources);
+ err |= comedi_check_trigger_src(&cmd->convert_src, sources);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
switch (cmd->start_src) {
case TRIG_NOW:
case TRIG_INT:
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
break;
case TRIG_EXT:
tmp = CR_CHAN(cmd->start_arg);
if (tmp > 16)
tmp = 16;
tmp |= (cmd->start_arg & (CR_INVERT | CR_EDGE));
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, tmp);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, tmp);
break;
}
if (cmd->scan_begin_src == TRIG_TIMER) {
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
ni_min_ai_scan_period_ns(dev, cmd->chanlist_len));
- err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
- devpriv->clock_ns * 0xffffff);
+ err |= comedi_check_trigger_arg_max(&cmd->scan_begin_arg,
+ devpriv->clock_ns *
+ 0xffffff);
} else if (cmd->scan_begin_src == TRIG_EXT) {
/* external trigger */
unsigned int tmp = CR_CHAN(cmd->scan_begin_arg);
if (tmp > 16)
tmp = 16;
tmp |= (cmd->scan_begin_arg & (CR_INVERT | CR_EDGE));
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, tmp);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, tmp);
} else { /* TRIG_OTHER */
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
}
if (cmd->convert_src == TRIG_TIMER) {
if (devpriv->is_611x || devpriv->is_6143) {
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg,
+ 0);
} else {
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
- board->ai_speed);
- err |= cfc_check_trigger_arg_max(&cmd->convert_arg,
- devpriv->clock_ns * 0xffff);
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
+ board->ai_speed);
+ err |= comedi_check_trigger_arg_max(&cmd->convert_arg,
+ devpriv->clock_ns *
+ 0xffff);
}
} else if (cmd->convert_src == TRIG_EXT) {
/* external trigger */
if (tmp > 16)
tmp = 16;
tmp |= (cmd->convert_arg & (CR_ALT_FILTER | CR_INVERT));
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, tmp);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, tmp);
} else if (cmd->convert_src == TRIG_NOW) {
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
}
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT) {
unsigned int max_count = 0x01000000;
if (devpriv->is_611x)
max_count -= num_adc_stages_611x;
- err |= cfc_check_trigger_arg_max(&cmd->stop_arg, max_count);
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_max(&cmd->stop_arg, max_count);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
} else {
/* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
}
if (err)
start_stop_select |=
AI_START_Select(1 + CR_CHAN(cmd->scan_begin_arg));
ni_stc_writew(dev, start_stop_select,
- AI_START_STOP_Select_Register);
+ AI_START_STOP_Select_Register);
break;
}
}
if (dev->irq) {
-
/* interrupt on FIFO, errors, SC_TC */
interrupt_a_enable |= AI_Error_Interrupt_Enable |
AI_SC_TC_Interrupt_Enable;
break;
default:
dev_err(dev->class_dev,
- "%s: bug! unhandled ao reference voltage\n",
- __func__);
+ "bug! unhandled ao reference voltage\n");
break;
}
switch (krange->max + krange->min) {
break;
default:
dev_err(dev->class_dev,
- "%s: bug! unhandled ao offset voltage\n",
- __func__);
+ "bug! unhandled ao offset voltage\n");
break;
}
if (timed)
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_INT | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_INT | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
switch (cmd->start_src) {
case TRIG_INT:
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
break;
case TRIG_EXT:
tmp = CR_CHAN(cmd->start_arg);
if (tmp > 18)
tmp = 18;
tmp |= (cmd->start_arg & (CR_INVERT | CR_EDGE));
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, tmp);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, tmp);
break;
}
if (cmd->scan_begin_src == TRIG_TIMER) {
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- board->ao_speed);
- err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
- devpriv->clock_ns * 0xffffff);
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ board->ao_speed);
+ err |= comedi_check_trigger_arg_max(&cmd->scan_begin_arg,
+ devpriv->clock_ns *
+ 0xffffff);
}
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_max(&cmd->stop_arg, 0x00ffffff);
+ err |= comedi_check_trigger_arg_max(&cmd->stop_arg, 0x00ffffff);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_INT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_INT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_NONE);
if (err)
return 1;
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
tmp = cmd->scan_begin_arg;
tmp &= CR_PACK_FLAGS(CDO_Sample_Source_Select_Mask, 0, 0, CR_INVERT);
if (tmp != cmd->scan_begin_arg)
err |= -EINVAL;
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
udelay((devpriv->serial_interval_ns + 999) / 1000);
if (--count < 0) {
dev_err(dev->class_dev,
- "%s: SPI serial I/O didn't finish in time!\n",
- __func__);
+ "SPI serial I/O didn't finish in time!\n");
err = -ETIME;
goto Error;
}
DIO_Serial_IO_In_Progress_St goes high one bit too early. */
udelay((devpriv->serial_interval_ns + 999) / 1000);
- if (data_in != NULL)
+ if (data_in)
*data_in = ni_stc_readw(dev, DIO_Serial_Input_Register);
Error:
Clock_and_FOUT_Register);
return 1;
- break;
-
case INSN_CONFIG_BIDIRECTIONAL_DATA:
if (devpriv->serial_interval_ns == 0)
err = ni_serial_sw_readwrite8(dev, s, byte_out,
&byte_in);
} else {
- dev_err(dev->class_dev, "%s: serial disabled!\n",
- __func__);
+ dev_err(dev->class_dev, "serial disabled!\n");
return -EINVAL;
}
if (err < 0)
default:
return -EINVAL;
}
-
}
static void init_ao_67xx(struct comedi_device *dev, struct comedi_subdevice *s)
case 9:
return NI_PFI_OUTPUT_G_GATE0;
default:
- dev_err(dev->class_dev,
- "%s: bug, unhandled case in switch.\n", __func__);
+ dev_err(dev->class_dev, "bug, unhandled case in switch.\n");
break;
}
return 0;
return -EIO;
}
if (i == timeout) {
- dev_err(dev->class_dev, "%s timeout\n", __func__);
+ dev_err(dev->class_dev, "timeout\n");
return -ETIME;
}
return 0;
&devpriv->clock_ns);
if (retval < 0) {
dev_err(dev->class_dev,
- "%s: bug, failed to find pll parameters\n", __func__);
+ "bug, failed to find pll parameters\n");
return retval;
}
RTSI_Trig_Direction_Register);
if (period_ns == 0) {
dev_err(dev->class_dev,
- "%s: we don't handle an unspecified clock period correctly yet, returning error\n",
- __func__);
+ "we don't handle an unspecified clock period correctly yet, returning error\n");
return -EINVAL;
}
devpriv->clock_ns = period_ns;
devpriv->clock_source = source;
- } else
+ } else {
return -EINVAL;
+ }
}
}
return 3;
} else {
if (chan == old_RTSI_clock_channel)
return NI_RTSI_OUTPUT_RTSI_OSC;
- dev_err(dev->class_dev, "%s: bug! should never get here?\n",
- __func__);
+ dev_err(dev->class_dev, "bug! should never get here?\n");
return 0;
}
}
#include <linux/interrupt.h>
#include <linux/sched.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
-#include "comedi_fc.h"
#include "mite.h"
/* defines for the PCI-DIO-32HS */
devpriv->di_mite_chan =
mite_request_channel_in_range(devpriv->mite,
devpriv->di_mite_ring, 1, 2);
- if (devpriv->di_mite_chan == NULL) {
+ if (!devpriv->di_mite_chan) {
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
dev_err(dev->class_dev, "failed to reserve mite dma channel\n");
return -EBUSY;
if (devpriv->di_mite_chan) {
mite_prep_dma(devpriv->di_mite_chan, 32, 32);
mite_dma_arm(devpriv->di_mite_chan);
- } else
+ } else {
retval = -EIO;
+ }
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
return retval;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
#define MAX_SPEED (TIMER_BASE) /* in nanoseconds */
if (cmd->scan_begin_src == TRIG_TIMER) {
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- MAX_SPEED);
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ MAX_SPEED);
/* no minimum speed */
} else {
/* TRIG_EXT */
}
}
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->scan_begin_arg;
ni_pcidio_ns_to_timer(&arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
if (err)
return ret;
devpriv->di_mite_ring = mite_alloc_ring(devpriv->mite);
- if (devpriv->di_mite_ring == NULL)
+ if (!devpriv->di_mite_ring)
return -ENOMEM;
if (board->uses_firmware) {
#include <linux/module.h>
#include <linux/delay.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include <asm/byteorder.h>
return 0;
}
-
static void m_series_init_eeprom_buffer(struct comedi_device *dev)
{
struct ni_private *devpriv = dev->private;
return ret;
devpriv->ai_mite_ring = mite_alloc_ring(devpriv->mite);
- if (devpriv->ai_mite_ring == NULL)
+ if (!devpriv->ai_mite_ring)
return -ENOMEM;
devpriv->ao_mite_ring = mite_alloc_ring(devpriv->mite);
- if (devpriv->ao_mite_ring == NULL)
+ if (!devpriv->ao_mite_ring)
return -ENOMEM;
devpriv->cdo_mite_ring = mite_alloc_ring(devpriv->mite);
- if (devpriv->cdo_mite_ring == NULL)
+ if (!devpriv->cdo_mite_ring)
return -ENOMEM;
devpriv->gpct_mite_ring[0] = mite_alloc_ring(devpriv->mite);
- if (devpriv->gpct_mite_ring[0] == NULL)
+ if (!devpriv->gpct_mite_ring[0])
return -ENOMEM;
devpriv->gpct_mite_ring[1] = mite_alloc_ring(devpriv->mite);
- if (devpriv->gpct_mite_ring[1] == NULL)
+ if (!devpriv->gpct_mite_ring[1])
return -ENOMEM;
if (devpriv->is_m_series)
*/
#include <linux/module.h>
-#include "comedi_fc.h"
#include "ni_tio_internal.h"
#include "mite.h"
unsigned long flags;
spin_lock_irqsave(&counter->lock, flags);
- if (counter->mite_chan == NULL) {
+ if (!counter->mite_chan) {
dev_err(counter->counter_dev->dev->class_dev,
"commands only supported with DMA. ");
dev_err(counter->counter_dev->dev->class_dev,
sources = TRIG_NOW | TRIG_INT | TRIG_OTHER;
if (ni_tio_counting_mode_registers_present(counter->counter_dev))
sources |= TRIG_EXT;
- err |= cfc_check_trigger_src(&cmd->start_src, sources);
+ err |= comedi_check_trigger_src(&cmd->start_src, sources);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
TRIG_FOLLOW | TRIG_EXT | TRIG_OTHER);
- err |= cfc_check_trigger_src(&cmd->convert_src,
+ err |= comedi_check_trigger_src(&cmd->convert_src,
TRIG_NOW | TRIG_EXT | TRIG_OTHER);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
/* Step 2b : and mutually compatible */
case TRIG_NOW:
case TRIG_INT:
case TRIG_OTHER:
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
break;
case TRIG_EXT:
/* start_arg is the start_trigger passed to ni_tio_arm() */
}
if (cmd->scan_begin_src != TRIG_EXT)
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
if (cmd->convert_src != TRIG_EXT)
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
case ni_gpct_variant_e_series:
spin_lock_irqsave(&counter->lock, flags);
{
- if (counter->mite_chan == NULL ||
+ if (!counter->mite_chan ||
counter->mite_chan->dir != COMEDI_INPUT ||
(mite_done(counter->mite_chan))) {
retval = 1;
if (gxx_status & GI_GATE_ERROR(cidx)) {
ack |= GI_GATE_ERROR_CONFIRM(cidx);
if (gate_error) {
- /*660x don't support automatic acknowledgement
+ /*660x don't support automatic acknowledgment
of gate interrupt via dma read/write
and report bogus gate errors */
if (counter->counter_dev->variant !=
break;
}
spin_lock_irqsave(&counter->lock, flags);
- if (counter->mite_chan == NULL) {
+ if (!counter->mite_chan) {
spin_unlock_irqrestore(&counter->lock, flags);
return;
}
#include "../comedidev.h"
-#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
/*
* I/O port register map
},
};
-struct pcl711_private {
- unsigned int divisor1;
- unsigned int divisor2;
-};
-
static void pcl711_ai_set_mode(struct comedi_device *dev, unsigned int mode)
{
/*
static int pcl711_ai_cmdtest(struct comedi_device *dev,
struct comedi_subdevice *s, struct comedi_cmd *cmd)
{
- struct pcl711_private *devpriv = dev->private;
int err = 0;
- unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
if (cmd->scan_begin_src == TRIG_EXT) {
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
} else {
#define MAX_SPEED 1000
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- MAX_SPEED);
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ MAX_SPEED);
}
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
/* step 4 */
if (cmd->scan_begin_src == TRIG_TIMER) {
- arg = cmd->scan_begin_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
+ unsigned int arg = cmd->scan_begin_arg;
+
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
if (err)
return 0;
}
-static void pcl711_ai_load_counters(struct comedi_device *dev)
-{
- struct pcl711_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + PCL711_TIMER_BASE;
-
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
-
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
-}
-
static int pcl711_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
{
struct comedi_cmd *cmd = &s->async->cmd;
pcl711_set_changain(dev, s, cmd->chanlist[0]);
if (cmd->scan_begin_src == TRIG_TIMER) {
- pcl711_ai_load_counters(dev);
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
outb(PCL711_INT_STAT_CLR, dev->iobase + PCL711_INT_STAT_REG);
pcl711_ai_set_mode(dev, PCL711_MODE_PACER_IRQ);
} else {
static int pcl711_attach(struct comedi_device *dev, struct comedi_devconfig *it)
{
const struct pcl711_board *board = dev->board_ptr;
- struct pcl711_private *devpriv;
struct comedi_subdevice *s;
int ret;
- devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
- if (!devpriv)
- return -ENOMEM;
-
ret = comedi_request_region(dev, it->options[0], 0x10);
if (ret)
return ret;
dev->irq = it->options[1];
}
+ dev->pacer = comedi_8254_init(dev->iobase + PCL711_TIMER_BASE,
+ I8254_OSC_BASE_2MHZ, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;
#include "../comedidev.h"
-#include "comedi_fc.h"
-
#define PCL726_AO_MSB_REG(x) (0x00 + ((x) * 2))
#define PCL726_AO_LSB_REG(x) (0x01 + ((x) * 2))
#define PCL726_DO_MSB_REG 0x0c
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_NONE);
if (err)
return 1;
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
#include "../comedidev.h"
#include "comedi_isadma.h"
-#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
/* hardware types of the cards */
#define boardPCL812PG 0 /* and ACL-8112PG */
unsigned char mode_reg_int; /* there is stored INT number for some card */
unsigned int ai_poll_ptr; /* how many sampes transfer poll */
unsigned int max_812_ai_mode0_rangewait; /* setling time for gain */
- unsigned int divisor1;
- unsigned int divisor2;
unsigned int use_diff:1;
unsigned int use_mpc508:1;
unsigned int use_ext_trg:1;
unsigned int ai_eos:1;
};
-static void pcl812_start_pacer(struct comedi_device *dev, bool load_timers)
-{
- struct pcl812_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + PCL812_TIMER_BASE;
-
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- udelay(1);
-
- if (load_timers) {
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- }
-}
-
static void pcl812_ai_setup_dma(struct comedi_device *dev,
struct comedi_subdevice *s,
unsigned int unread_samples)
struct pcl812_private *devpriv = dev->private;
int err = 0;
unsigned int flags;
- unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
if (devpriv->use_ext_trg)
flags = TRIG_EXT;
else
flags = TRIG_TIMER;
- err |= cfc_check_trigger_src(&cmd->convert_src, flags);
+ err |= comedi_check_trigger_src(&cmd->convert_src, flags);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- if (cmd->convert_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
- board->ai_ns_min);
- else /* TRIG_EXT */
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
+ if (cmd->convert_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
+ board->ai_ns_min);
+ } else { /* TRIG_EXT */
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ }
- err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_min(&cmd->chanlist_len, 1);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
/* step 4: fix up any arguments */
if (cmd->convert_src == TRIG_TIMER) {
- arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
+ unsigned int arg = cmd->convert_arg;
+
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
}
if (err)
unsigned int ctrl = 0;
unsigned int i;
- pcl812_start_pacer(dev, false);
-
pcl812_ai_set_chan_range(dev, cmd->chanlist[0], 1);
if (dma) { /* check if we can use DMA transfer */
switch (cmd->convert_src) {
case TRIG_TIMER:
- pcl812_start_pacer(dev, true);
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
break;
}
outb(devpriv->mode_reg_int | PCL812_CTRL_DISABLE_TRIG,
dev->iobase + PCL812_CTRL_REG);
- pcl812_start_pacer(dev, false);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, false);
pcl812_ai_clear_eoc(dev);
return 0;
}
dev->iobase + PCL812_CTRL_REG);
pcl812_ai_clear_eoc(dev);
- /* stop pacer */
- if (board->IRQbits)
- pcl812_start_pacer(dev, false);
-
/*
* Invalidate last_ai_chanspec then set analog input to
* known channel/range.
if (ret)
return ret;
- if ((1 << it->options[1]) & board->IRQbits) {
- ret = request_irq(it->options[1], pcl812_interrupt, 0,
- dev->board_name, dev);
- if (ret == 0)
- dev->irq = it->options[1];
+ if (board->IRQbits) {
+ dev->pacer = comedi_8254_init(dev->iobase + PCL812_TIMER_BASE,
+ I8254_OSC_BASE_2MHZ,
+ I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
+ if ((1 << it->options[1]) & board->IRQbits) {
+ ret = request_irq(it->options[1], pcl812_interrupt, 0,
+ dev->board_name, dev);
+ if (ret == 0)
+ dev->irq = it->options[1];
+ }
}
/* we need an IRQ to do DMA on channel 3 or 1 */
#include "../comedidev.h"
#include "comedi_isadma.h"
-#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
/*
* Register I/O map
struct pcl816_private {
struct comedi_isadma *dma;
unsigned int ai_poll_ptr; /* how many sampes transfer poll */
- unsigned int divisor1;
- unsigned int divisor2;
unsigned int ai_cmd_running:1;
unsigned int ai_cmd_canceled:1;
};
-static void pcl816_start_pacer(struct comedi_device *dev, bool load_counters)
-{
- struct pcl816_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + PCL816_TIMER_BASE;
-
- i8254_set_mode(timer_base, 0, 0, I8254_MODE1 | I8254_BINARY);
- i8254_write(timer_base, 0, 0, 0x00ff);
- udelay(1);
-
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- udelay(1);
-
- if (load_counters) {
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- }
-}
-
static void pcl816_ai_setup_dma(struct comedi_device *dev,
struct comedi_subdevice *s,
unsigned int unread_samples)
static int pcl816_ai_cmdtest(struct comedi_device *dev,
struct comedi_subdevice *s, struct comedi_cmd *cmd)
{
- struct pcl816_private *devpriv = dev->private;
int err = 0;
- unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_EXT | TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
+ err |= comedi_check_trigger_src(&cmd->convert_src,
+ TRIG_EXT | TRIG_TIMER);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
if (err)
return 2;
-
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
if (cmd->convert_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg, 10000);
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg, 10000);
else /* TRIG_EXT */
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
-
/* step 4: fix up any arguments */
if (cmd->convert_src == TRIG_TIMER) {
- arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
+ unsigned int arg = cmd->convert_arg;
+
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
}
if (err)
return 4;
-
/* step 5: complain about special chanlist considerations */
if (cmd->chanlist) {
if (devpriv->ai_cmd_running)
return -EBUSY;
- pcl816_start_pacer(dev, false);
-
seglen = check_channel_list(dev, s, cmd->chanlist, cmd->chanlist_len);
if (seglen < 1)
return -EINVAL;
dma->cur_dma = 0;
pcl816_ai_setup_dma(dev, s, 0);
- pcl816_start_pacer(dev, true);
+ comedi_8254_set_mode(dev->pacer, 0, I8254_MODE1 | I8254_BINARY);
+ comedi_8254_write(dev->pacer, 0, 0x0ff);
+ udelay(1);
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
ctrl = PCL816_CTRL_INTEN | PCL816_CTRL_DMAEN | PCL816_CTRL_DMASRC_SLOT0;
if (cmd->convert_src == TRIG_TIMER)
outb(PCL816_CTRL_DISABLE_TRIG, dev->iobase + PCL816_CTRL_REG);
pcl816_ai_clear_eoc(dev);
- /* Stop pacer */
- i8254_set_mode(dev->iobase + PCL816_TIMER_BASE, 0,
- 2, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(dev->iobase + PCL816_TIMER_BASE, 0,
- 1, I8254_MODE0 | I8254_BINARY);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, false);
devpriv->ai_cmd_running = 0;
devpriv->ai_cmd_canceled = 1;
static void pcl816_reset(struct comedi_device *dev)
{
- unsigned long timer_base = dev->iobase + PCL816_TIMER_BASE;
-
outb(PCL816_CTRL_DISABLE_TRIG, dev->iobase + PCL816_CTRL_REG);
pcl816_ai_set_chan_range(dev, 0, 0);
pcl816_ai_clear_eoc(dev);
- /* Stop pacer */
- i8254_set_mode(timer_base, 0, 2, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 1, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 0, I8254_MODE0 | I8254_BINARY);
-
/* set all digital outputs low */
outb(0, dev->iobase + PCL816_DO_DI_LSB_REG);
outb(0, dev->iobase + PCL816_DO_DI_MSB_REG);
/* an IRQ and DMA are required to support async commands */
pcl816_alloc_irq_and_dma(dev, it);
+ dev->pacer = comedi_8254_init(dev->iobase + PCL816_TIMER_BASE,
+ I8254_OSC_BASE_10MHZ, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;
#include "../comedidev.h"
#include "comedi_isadma.h"
-#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
/* boards constants */
struct comedi_isadma *dma;
/* manimal allowed delay between samples (in us) for actual card */
unsigned int ns_min;
- int i8253_osc_base; /* 1/frequency of on board oscilator in ns */
/* MUX setting for actual AI operations */
unsigned int act_chanlist[16];
unsigned int act_chanlist_len; /* how long is actual MUX list */
unsigned int act_chanlist_pos; /* actual position in MUX list */
- unsigned int divisor1;
- unsigned int divisor2;
unsigned int usefifo:1;
unsigned int ai_cmd_running:1;
unsigned int ai_cmd_canceled:1;
};
-static void pcl818_start_pacer(struct comedi_device *dev, bool load_counters)
-{
- struct pcl818_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + PCL818_TIMER_BASE;
-
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- udelay(1);
-
- if (load_counters) {
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- }
-}
-
static void pcl818_ai_setup_dma(struct comedi_device *dev,
struct comedi_subdevice *s,
unsigned int unread_samples)
struct comedi_cmd *cmd)
{
const struct pcl818_board *board = dev->board_ptr;
- struct pcl818_private *devpriv = dev->private;
int err = 0;
- unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
+ err |= comedi_check_trigger_src(&cmd->convert_src,
+ TRIG_TIMER | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- if (cmd->convert_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
- board->ns_min);
- else /* TRIG_EXT */
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
+ if (cmd->convert_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
+ board->ns_min);
+ } else { /* TRIG_EXT */
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ }
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
/* step 4: fix up any arguments */
if (cmd->convert_src == TRIG_TIMER) {
- arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(devpriv->i8253_osc_base,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
+ unsigned int arg = cmd->convert_arg;
+
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
}
if (err)
if (devpriv->ai_cmd_running)
return -EBUSY;
- pcl818_start_pacer(dev, false);
-
seglen = check_channel_list(dev, s, cmd->chanlist, cmd->chanlist_len);
if (seglen < 1)
return -EINVAL;
}
outb(ctrl, dev->iobase + PCL818_CTRL_REG);
- if (cmd->convert_src == TRIG_TIMER)
- pcl818_start_pacer(dev, true);
+ if (cmd->convert_src == TRIG_TIMER) {
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
+ }
return 0;
}
}
outb(PCL818_CTRL_DISABLE_TRIG, dev->iobase + PCL818_CTRL_REG);
- pcl818_start_pacer(dev, false);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, false);
pcl818_ai_clear_eoc(dev);
if (devpriv->usefifo) { /* FIFO shutdown */
static void pcl818_reset(struct comedi_device *dev)
{
const struct pcl818_board *board = dev->board_ptr;
- unsigned long timer_base = dev->iobase + PCL818_TIMER_BASE;
unsigned int chan;
/* flush and disable the FIFO */
/* stop pacer */
outb(PCL818_CNTENABLE_PACER_ENA, dev->iobase + PCL818_CNTENABLE_REG);
- i8254_set_mode(timer_base, 0, 2, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 1, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 0, I8254_MODE0 | I8254_BINARY);
/* set analog output channels to 0V */
for (chan = 0; chan < board->n_aochan; chan++) {
const struct pcl818_board *board = dev->board_ptr;
struct pcl818_private *devpriv;
struct comedi_subdevice *s;
+ unsigned int osc_base;
int ret;
devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
if (dev->irq && board->has_dma)
pcl818_alloc_dma(dev, it->options[2]);
+ /* use 1MHz or 10MHz oscilator */
+ if ((it->options[3] == 0) || (it->options[3] == 10))
+ osc_base = I8254_OSC_BASE_10MHZ;
+ else
+ osc_base = I8254_OSC_BASE_1MHZ;
+
+ dev->pacer = comedi_8254_init(dev->iobase + PCL818_TIMER_BASE,
+ osc_base, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
+ /* max sampling speed */
+ devpriv->ns_min = board->ns_min;
+ if (!board->is_818) {
+ /* extended PCL718 to 100kHz DAC */
+ if ((it->options[6] == 1) || (it->options[6] == 100))
+ devpriv->ns_min = 10000;
+ }
+
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;
s->range_table = &range_digital;
s->insn_bits = pcl818_do_insn_bits;
- /* select 1/10MHz oscilator */
- if ((it->options[3] == 0) || (it->options[3] == 10))
- devpriv->i8253_osc_base = I8254_OSC_BASE_10MHZ;
- else
- devpriv->i8253_osc_base = I8254_OSC_BASE_1MHZ;
-
- /* max sampling speed */
- devpriv->ns_min = board->ns_min;
-
- if (!board->is_818) {
- if ((it->options[6] == 1) || (it->options[6] == 100)) {
- /* extended PCL718 to 100kHz DAC */
- devpriv->ns_min = 10000;
- }
- }
-
pcl818_reset(dev);
return 0;
#include "../comedidev.h"
-#include "comedi_fc.h"
-
/*
* Register I/O map
*/
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
#include "../comedidev.h"
-#include "comedi_fc.h"
-
/*
* Register I/O map
*
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
} else if (it->options[2]) {
/* request the irq for the 2nd asic */
ret = request_irq(it->options[2], pcmuio_interrupt, 0,
- dev->board_name, dev);
+ dev->board_name, dev);
if (ret == 0)
devpriv->irq2 = it->options[2];
}
s->insn_bits = pcmuio_dio_insn_bits;
s->insn_config = pcmuio_dio_insn_config;
- /* subdevices 0 and 2 can suppport interrupts */
+ /* subdevices 0 and 2 can support interrupts */
if ((i == 0 && dev->irq) || (i == 2 && devpriv->irq2)) {
/* setup the interrupt subdevice */
dev->read_subdev = s;
#include <linux/completion.h>
#include "../comedi_pcmcia.h"
-#include "comedi_fc.h"
struct daqp_private {
int stop;
devpriv->interrupt_mode = semaphore;
for (i = 0; i < insn->n; i++) {
-
/* Start conversion */
outb(DAQP_COMMAND_ARM | DAQP_COMMAND_FIFO_DATA,
dev->iobase + DAQP_COMMAND);
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
TRIG_TIMER | TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->convert_src,
+ err |= comedi_check_trigger_src(&cmd->convert_src,
TRIG_TIMER | TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
#define MAX_SPEED 10000 /* 100 kHz - in nanoseconds */
- if (cmd->scan_begin_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- MAX_SPEED);
+ if (cmd->scan_begin_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ MAX_SPEED);
+ }
/* If both scan_begin and convert are both timer values, the only
* way that can make sense is if the scan time is the number of
err |= -EINVAL;
}
- if (cmd->convert_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg, MAX_SPEED);
+ if (cmd->convert_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
+ MAX_SPEED);
+ }
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_max(&cmd->stop_arg, 0x00ffffff);
+ err |= comedi_check_trigger_arg_max(&cmd->stop_arg, 0x00ffffff);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->scan_begin_arg;
daqp_ns_to_timer(&arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
if (cmd->convert_src == TRIG_TIMER) {
arg = cmd->convert_arg;
daqp_ns_to_timer(&arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
}
if (err)
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
-#include "comedi_fc.h"
#include "plx9080.h"
/*
/* read data */
d = readw(devpriv->las1 + LAS1_ADC_FIFO);
- d = d >> 3; /* low 3 bits are marker lines */
+ d >>= 3; /* low 3 bits are marker lines */
/* convert bipolar data to comedi unsigned data */
if (comedi_range_is_bipolar(s, range))
}
d = readw(devpriv->las1 + LAS1_ADC_FIFO);
- d = d >> 3; /* low 3 bits are marker lines */
+ d >>= 3; /* low 3 bits are marker lines */
/* convert bipolar data to comedi unsigned data */
if (comedi_range_is_bipolar(s, range))
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->convert_src,
+ TRIG_TIMER | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
if (cmd->scan_begin_src == TRIG_TIMER) {
/* Note: these are time periods, not actual rates */
if (1 == cmd->chanlist_len) { /* no scanning */
- if (cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- RTD_MAX_SPEED_1)) {
+ if (comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ RTD_MAX_SPEED_1)) {
rtd_ns_to_timer(&cmd->scan_begin_arg,
CMDF_ROUND_UP);
err |= -EINVAL;
}
- if (cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
- RTD_MIN_SPEED_1)) {
+ if (comedi_check_trigger_arg_max(&cmd->scan_begin_arg,
+ RTD_MIN_SPEED_1)) {
rtd_ns_to_timer(&cmd->scan_begin_arg,
CMDF_ROUND_DOWN);
err |= -EINVAL;
}
} else {
- if (cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- RTD_MAX_SPEED)) {
+ if (comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ RTD_MAX_SPEED)) {
rtd_ns_to_timer(&cmd->scan_begin_arg,
CMDF_ROUND_UP);
err |= -EINVAL;
}
- if (cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
- RTD_MIN_SPEED)) {
+ if (comedi_check_trigger_arg_max(&cmd->scan_begin_arg,
+ RTD_MIN_SPEED)) {
rtd_ns_to_timer(&cmd->scan_begin_arg,
CMDF_ROUND_DOWN);
err |= -EINVAL;
/* external trigger */
/* should be level/edge, hi/lo specification here */
/* should specify multiple external triggers */
- err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg, 9);
+ err |= comedi_check_trigger_arg_max(&cmd->scan_begin_arg, 9);
}
if (cmd->convert_src == TRIG_TIMER) {
if (1 == cmd->chanlist_len) { /* no scanning */
- if (cfc_check_trigger_arg_min(&cmd->convert_arg,
- RTD_MAX_SPEED_1)) {
+ if (comedi_check_trigger_arg_min(&cmd->convert_arg,
+ RTD_MAX_SPEED_1)) {
rtd_ns_to_timer(&cmd->convert_arg,
CMDF_ROUND_UP);
err |= -EINVAL;
}
- if (cfc_check_trigger_arg_max(&cmd->convert_arg,
- RTD_MIN_SPEED_1)) {
+ if (comedi_check_trigger_arg_max(&cmd->convert_arg,
+ RTD_MIN_SPEED_1)) {
rtd_ns_to_timer(&cmd->convert_arg,
CMDF_ROUND_DOWN);
err |= -EINVAL;
}
} else {
- if (cfc_check_trigger_arg_min(&cmd->convert_arg,
- RTD_MAX_SPEED)) {
+ if (comedi_check_trigger_arg_min(&cmd->convert_arg,
+ RTD_MAX_SPEED)) {
rtd_ns_to_timer(&cmd->convert_arg,
CMDF_ROUND_UP);
err |= -EINVAL;
}
- if (cfc_check_trigger_arg_max(&cmd->convert_arg,
- RTD_MIN_SPEED)) {
+ if (comedi_check_trigger_arg_max(&cmd->convert_arg,
+ RTD_MIN_SPEED)) {
rtd_ns_to_timer(&cmd->convert_arg,
CMDF_ROUND_DOWN);
err |= -EINVAL;
} else {
/* external trigger */
/* see above */
- err |= cfc_check_trigger_arg_max(&cmd->convert_arg, 9);
+ err |= comedi_check_trigger_arg_max(&cmd->convert_arg, 9);
}
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
-
/* step 4: fix up any arguments */
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->scan_begin_arg;
rtd_ns_to_timer(&arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
if (cmd->convert_src == TRIG_TIMER) {
arg = cmd->convert_arg;
rtd_ns_to_timer(&arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->convert_arg * cmd->scan_end_arg;
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- arg);
+ err |= comedi_check_trigger_arg_min(&cmd->
+ scan_begin_arg,
+ arg);
}
}
pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency);
if (pci_latency < 32) {
dev_info(dev->class_dev,
- "PCI latency changed from %d to %d\n",
- pci_latency, 32);
+ "PCI latency changed from %d to %d\n",
+ pci_latency, 32);
pci_write_config_byte(pcidev, PCI_LATENCY_TIMER, 32);
}
}
/* Shut down any board ops by resetting it */
if (dev->mmio && devpriv->lcfg)
rtd_reset(dev);
- if (dev->irq) {
- writel(readl(devpriv->lcfg + PLX_INTRCS_REG) &
- ~(ICS_PLIE | ICS_DMA0_E | ICS_DMA1_E),
- devpriv->lcfg + PLX_INTRCS_REG);
+ if (dev->irq)
free_irq(dev->irq, dev);
- }
if (dev->mmio)
iounmap(dev->mmio);
if (devpriv->las1)
#include <linux/module.h>
#include <linux/delay.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/types.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
-#include "comedi_fc.h"
#include "s626.h"
struct s626_buffer_dma {
/* ************** EEPROM ACCESS FUNCTIONS ************** */
static int s626_i2c_handshake_eoc(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn,
- unsigned long context)
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned long context)
{
bool status;
* Byte0 = Not sent.
*/
if (s626_i2c_handshake(dev, S626_I2C_B2(S626_I2C_ATTRSTART,
- (devpriv->i2c_adrs | 1)) |
+ (devpriv->i2c_adrs | 1)) |
S626_I2C_B1(S626_I2C_ATTRSTOP, 0) |
S626_I2C_B0(S626_I2C_ATTRNOP, 0)))
/* Abort function and declare error if handshake failed. */
/*
* Private helper function: Write setpoint to an application DAC channel.
*/
-static int s626_set_dac(struct comedi_device *dev, uint16_t chan,
- int16_t dacdata)
+static int s626_set_dac(struct comedi_device *dev,
+ uint16_t chan, int16_t dacdata)
{
struct s626_private *devpriv = dev->private;
uint16_t signmask;
return s626_send_dac(dev, val);
}
-static int s626_write_trim_dac(struct comedi_device *dev, uint8_t logical_chan,
- uint8_t dac_data)
+static int s626_write_trim_dac(struct comedi_device *dev,
+ uint8_t logical_chan, uint8_t dac_data)
{
struct s626_private *devpriv = dev->private;
uint32_t chan;
/* Copy TrimDac setpoint values from EEPROM to TrimDacs. */
for (i = 0; i < ARRAY_SIZE(s626_trimchan); i++) {
ret = s626_write_trim_dac(dev, i,
- s626_i2c_read(dev, s626_trimadrs[i]));
+ s626_i2c_read(dev, s626_trimadrs[i]));
if (ret)
return ret;
}
dev->mmio + S626_P_RPSADDR1);
/* Construct RPS program in rps_buf DMA buffer */
- if (cmd != NULL && cmd->scan_begin_src != TRIG_FOLLOW) {
+ if (cmd->scan_begin_src != TRIG_FOLLOW) {
/* Wait for Start trigger. */
*rps++ = S626_RPS_PAUSE | S626_RPS_SIGADC;
*rps++ = S626_RPS_CLRSIGNAL | S626_RPS_SIGADC;
*rps++ = jmp_adrs;
}
- if (cmd != NULL && cmd->convert_src != TRIG_NOW) {
+ if (cmd->convert_src != TRIG_NOW) {
/* Wait for Start trigger. */
*rps++ = S626_RPS_PAUSE | S626_RPS_SIGADC;
*rps++ = S626_RPS_CLRSIGNAL | S626_RPS_SIGADC;
/* reset ai_cmd_running flag */
devpriv->ai_cmd_running = 0;
- /* test if cmd is valid */
- if (cmd == NULL)
- return -EINVAL;
-
s626_ai_load_polllist(ppl, cmd);
devpriv->ai_cmd_running = 1;
devpriv->ai_convert_count = 0;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src,
- TRIG_NOW | TRIG_INT | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
- TRIG_TIMER | TRIG_EXT | TRIG_FOLLOW);
- err |= cfc_check_trigger_src(&cmd->convert_src,
- TRIG_TIMER | TRIG_EXT | TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src,
+ TRIG_NOW | TRIG_INT | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
+ TRIG_TIMER | TRIG_EXT | TRIG_FOLLOW);
+ err |= comedi_check_trigger_src(&cmd->convert_src,
+ TRIG_TIMER | TRIG_EXT | TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
switch (cmd->start_src) {
case TRIG_NOW:
case TRIG_INT:
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
break;
case TRIG_EXT:
- err |= cfc_check_trigger_arg_max(&cmd->start_arg, 39);
+ err |= comedi_check_trigger_arg_max(&cmd->start_arg, 39);
break;
}
if (cmd->scan_begin_src == TRIG_EXT)
- err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg, 39);
+ err |= comedi_check_trigger_arg_max(&cmd->scan_begin_arg, 39);
if (cmd->convert_src == TRIG_EXT)
- err |= cfc_check_trigger_arg_max(&cmd->convert_arg, 39);
+ err |= comedi_check_trigger_arg_max(&cmd->convert_arg, 39);
#define S626_MAX_SPEED 200000 /* in nanoseconds */
#define S626_MIN_SPEED 2000000000 /* in nanoseconds */
if (cmd->scan_begin_src == TRIG_TIMER) {
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- S626_MAX_SPEED);
- err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
- S626_MIN_SPEED);
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ S626_MAX_SPEED);
+ err |= comedi_check_trigger_arg_max(&cmd->scan_begin_arg,
+ S626_MIN_SPEED);
} else {
- /* external trigger */
- /* should be level/edge, hi/lo specification here */
- /* should specify multiple external triggers */
- /* err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg, 9); */
+ /*
+ * external trigger
+ * should be level/edge, hi/lo specification here
+ * should specify multiple external triggers
+ * err |= comedi_check_trigger_arg_max(&cmd->scan_begin_arg, 9);
+ */
}
if (cmd->convert_src == TRIG_TIMER) {
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
- S626_MAX_SPEED);
- err |= cfc_check_trigger_arg_max(&cmd->convert_arg,
- S626_MIN_SPEED);
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
+ S626_MAX_SPEED);
+ err |= comedi_check_trigger_arg_max(&cmd->convert_arg,
+ S626_MIN_SPEED);
} else {
- /* external trigger */
- /* see above */
- /* err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg, 9); */
+ /*
+ * external trigger - see above
+ * err |= comedi_check_trigger_arg_max(&cmd->scan_begin_arg, 9);
+ */
}
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->scan_begin_arg;
s626_ns_to_timer(&arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
if (cmd->convert_src == TRIG_TIMER) {
arg = cmd->convert_arg;
s626_ns_to_timer(&arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->convert_arg * cmd->scan_end_arg;
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- arg);
+ err |= comedi_check_trigger_arg_min(&cmd->
+ scan_begin_arg,
+ arg);
}
}
}
static int s626_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct s626_private *devpriv;
#include <linux/poll.h>
struct serial2002_range_table_t {
-
/* HACK... */
int length;
struct comedi_krange range;
};
struct serial2002_private {
-
int port; /* /dev/ttyS<port> */
int speed; /* baudrate */
struct file *tty;
break;
}
do_gettimeofday(&now);
- elapsed = (1000000 * (now.tv_sec - start.tv_sec) +
- now.tv_usec - start.tv_usec);
+ elapsed = 1000000 * (now.tv_sec - start.tv_sec) +
+ now.tv_usec - start.tv_usec;
if (elapsed > timeout)
break;
set_current_state(TASK_INTERRUPTIBLE);
}
}
return result;
-
}
static void serial2002_write(struct file *f, struct serial_data data)
outb(val, CSCDR);
return insn->n;
-
}
static int dnp_attach(struct comedi_device *dev, struct comedi_devconfig *it)
*/
-
#include <linux/module.h>
#include <linux/delay.h>
#include "../comedidev.h"
static int __unioxx5_define_chan_offset(int chan_num)
{
-
if (chan_num < 0 || chan_num > 23)
return -1;
/* sending for bytes to module(one byte per cycle iteration) */
for (i = 0; i < 4; i++) {
while (!((inb(usp->usp_iobase + 0)) & TxBE))
- ; /* waits while writting will be allowed */
+ ; /* waits while writing will be allowed */
outb(usp->usp_extra_data[module][i], usp->usp_iobase + 6);
}
outb(i + 1, iobase + 5);
outb('H', iobase + 6); /* requests EEPROM world */
while (!(inb(iobase + 0) & TxBE))
- ; /* waits while writting will be allowed */
+ ; /* waits while writing will be allowed */
outb(0, iobase + 6);
/* waits while reading of two bytes will be allowed */
if (ndef_flag) {
usp->usp_module_type[i] = 0;
ndef_flag = 0;
- } else
+ } else {
usp->usp_module_type[i] = inb(iobase + 6);
+ }
udelay(1);
}
#include "../comedi_usb.h"
-#include "comedi_fc.h"
-
/* constants for firmware upload and download */
#define USBDUX_FIRMWARE "usbdux_firmware.bin"
#define USBDUX_FIRMWARE_MAX_LEN 0x2000
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
if (cmd->scan_begin_src == TRIG_FOLLOW) /* internal trigger */
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
if (cmd->scan_begin_src == TRIG_TIMER) {
if (this_usbduxsub->high_speed) {
while (i < (cmd->chanlist_len))
i = i * 2;
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- 1000000 / 8 * i);
+ err |= comedi_check_trigger_arg_min(&cmd->
+ scan_begin_arg,
+ 1000000 / 8 * i);
/* now calc the real sampling rate with all the
* rounding errors */
tmp_timer =
} else {
/* full speed */
/* 1kHz scans every USB frame */
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- 1000000);
+ err |= comedi_check_trigger_arg_min(&cmd->
+ scan_begin_arg,
+ 1000000);
/*
* calc the real sampling rate with the rounding errors
*/
tmp_timer = ((unsigned int)(cmd->scan_begin_arg /
1000000)) * 1000000;
}
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg,
- tmp_timer);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg,
+ tmp_timer);
}
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
for (i = 0; i < RETRIES; i++) {
ret = usb_bulk_msg(usb, usb_rcvbulkpipe(usb, 8),
- devpriv->insn_buf, SIZEINSNBUF,
- &nrec, BULK_TIMEOUT);
+ devpriv->insn_buf, SIZEINSNBUF,
+ &nrec, BULK_TIMEOUT);
if (ret < 0)
return ret;
if (le16_to_cpu(devpriv->insn_buf[0]) == command)
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
if (0) { /* (this_usbduxsub->high_speed) */
/* the sampling rate is set by the coversion rate */
/* start a new scan (output at once) with a timer */
flags = TRIG_TIMER;
}
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, flags);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, flags);
if (0) { /* (this_usbduxsub->high_speed) */
/*
*/
flags = TRIG_NOW;
}
- err |= cfc_check_trigger_src(&cmd->convert_src, flags);
+ err |= comedi_check_trigger_src(&cmd->convert_src, flags);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
if (cmd->scan_begin_src == TRIG_FOLLOW) /* internal trigger */
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- if (cmd->scan_begin_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- 1000000);
+ if (cmd->scan_begin_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ 1000000);
+ }
/* not used now, is for later use */
if (cmd->convert_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg, 125000);
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg, 125000);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
struct comedi_insn *insn,
unsigned int *data)
{
-
struct usbdux_private *devpriv = dev->private;
int ret;
#include <linux/input.h>
#include <linux/fcntl.h>
#include <linux/compiler.h>
-#include "comedi_fc.h"
#include "../comedi_usb.h"
/*
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src,
+ err |= comedi_check_trigger_src(&cmd->start_src,
TRIG_NOW | TRIG_EXT | TRIG_INT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src,
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src,
TRIG_FOLLOW | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->convert_src,
+ TRIG_TIMER | TRIG_EXT);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
- err |= cfc_check_trigger_is_unique(cmd->convert_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
+ err |= comedi_check_trigger_is_unique(cmd->convert_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
if (!cmd->chanlist_len)
err |= -EINVAL;
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->chanlist_len == 1)
min_sample_period = 1;
/* calc arg again */
tmp = steps / 30;
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, tmp);
+ err |= comedi_check_trigger_arg_is(&cmd->convert_arg, tmp);
}
/* stop source */
switch (cmd->stop_src) {
case TRIG_COUNT:
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
break;
case TRIG_NONE:
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
break;
/*
* TRIG_EXT doesn't care since it doesn't trigger
/* step 4: fix up any arguments */
return 0;
-
}
static int usbduxfast_ai_inttrig(struct comedi_device *dev,
#include <linux/compiler.h>
#include <asm/unaligned.h>
-#include "comedi_fc.h"
#include "../comedi_usb.h"
/* timeout for the USB-transfer in ms*/
urb->dev = comedi_to_usb_dev(dev);
ret = usb_submit_urb(urb, GFP_ATOMIC);
if (ret < 0) {
- dev_err(dev->class_dev,
- "%s: urb resubmit failed (%d)\n",
- __func__, ret);
+ dev_err(dev->class_dev, "urb resubmit failed (%d)\n",
+ ret);
if (ret == -EL2NSYNC)
dev_err(dev->class_dev,
"buggy USB host controller or bug in IRQ handler\n");
default:
/* a real error */
- dev_err(dev->class_dev, "%s: non-zero urb status (%d)\n",
- __func__, urb->status);
+ dev_err(dev->class_dev, "non-zero urb status (%d)\n",
+ urb->status);
async->events |= COMEDI_CB_ERROR;
break;
}
urb->iso_frame_desc[0].status = 0;
ret = usb_submit_urb(urb, GFP_ATOMIC);
if (ret < 0) {
- dev_err(dev->class_dev,
- "%s: urb resubmit failed (%d)\n",
- __func__, ret);
+ dev_err(dev->class_dev, "urb resubmit failed (%d)\n",
+ ret);
if (ret == -EL2NSYNC)
dev_err(dev->class_dev,
"buggy USB host controller or bug in IRQ handler\n");
default:
/* a real error */
- dev_err(dev->class_dev, "%s: non-zero urb status (%d)\n",
- __func__, urb->status);
+ dev_err(dev->class_dev, "non-zero urb status (%d)\n",
+ urb->status);
async->events |= COMEDI_CB_ERROR;
break;
}
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
if (cmd->scan_begin_src == TRIG_FOLLOW) /* internal trigger */
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
if (cmd->scan_begin_src == TRIG_TIMER) {
unsigned int tmp;
* sample two channels. Thus, the more channels
* are in the channel list the more time we need.
*/
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- (1000000 / 8 * interval));
+ err |= comedi_check_trigger_arg_min(&cmd->
+ scan_begin_arg,
+ (1000000 / 8 *
+ interval));
tmp = (cmd->scan_begin_arg / 125000) * 125000;
} else {
/* full speed */
/* 1kHz scans every USB frame */
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- 1000000);
+ err |= comedi_check_trigger_arg_min(&cmd->
+ scan_begin_arg,
+ 1000000);
tmp = (cmd->scan_begin_arg / 1000000) * 1000000;
}
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, tmp);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, tmp);
}
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
/* Step 1 : check if triggers are trivially valid */
- err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
+ err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
if (high_speed) {
/*
/* start a new scan (output at once) with a timer */
flags = TRIG_TIMER;
}
- err |= cfc_check_trigger_src(&cmd->scan_begin_src, flags);
+ err |= comedi_check_trigger_src(&cmd->scan_begin_src, flags);
- err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
- err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
- err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
+ err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
+ err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
+ err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
if (err) {
up(&devpriv->sem);
/* Step 2a : make sure trigger sources are unique */
- err |= cfc_check_trigger_is_unique(cmd->start_src);
- err |= cfc_check_trigger_is_unique(cmd->stop_src);
+ err |= comedi_check_trigger_is_unique(cmd->start_src);
+ err |= comedi_check_trigger_is_unique(cmd->stop_src);
/* Step 2b : and mutually compatible */
/* Step 3: check if arguments are trivially valid */
- err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
if (cmd->scan_begin_src == TRIG_FOLLOW) /* internal trigger */
- err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
- if (cmd->scan_begin_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
- 1000000);
+ if (cmd->scan_begin_src == TRIG_TIMER) {
+ err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
+ 1000000);
+ }
/* not used now, is for later use */
if (cmd->convert_src == TRIG_TIMER)
- err |= cfc_check_trigger_arg_min(&cmd->convert_arg, 125000);
+ err |= comedi_check_trigger_arg_min(&cmd->convert_arg, 125000);
- err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
+ err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
+ cmd->chanlist_len);
if (cmd->stop_src == TRIG_COUNT)
- err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
+ err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
else /* TRIG_NONE */
- err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
+ err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
default:
/* a real error */
if (devpriv->pwm_cmd_running) {
- dev_err(dev->class_dev,
- "%s: non-zero urb status (%d)\n",
- __func__, urb->status);
+ dev_err(dev->class_dev, "non-zero urb status (%d)\n",
+ urb->status);
usbduxsigma_pwm_stop(dev, 0); /* w/o unlink */
}
return;
urb->status = 0;
ret = usb_submit_urb(urb, GFP_ATOMIC);
if (ret < 0) {
- dev_err(dev->class_dev, "%s: urb resubmit failed (%d)\n",
- __func__, ret);
+ dev_err(dev->class_dev, "urb resubmit failed (%d)\n", ret);
if (ret == -EL2NSYNC)
dev_err(dev->class_dev,
"buggy USB host controller or bug in IRQ handler\n");
retval = NULL;
up_read(&dev->attach_lock);
- if (retval == NULL)
+ if (!retval)
comedi_dev_put(dev);
return retval;
{
u8 __iomem *vaddr;
ulong offset;
- uint value;
if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
return 0;
offset = (ioread16(vaddr + ECS_SEG) << 4) + (ch->ch_portnum * 0x28)
+ LINE_SPEED;
- value = readw(vaddr + offset);
- return value;
+ return readw(vaddr + offset);
}
/*
* will be mapped into the low 2MB of the 4MB memory space
*/
brd->port = brd->membase + PCI_IO_OFFSET;
- brd->port_end = brd->port + PCI_IO_SIZE;
+ brd->port_end = brd->port + PCI_IO_SIZE_DGAP;
/*
* Special initialization for non-PLX boards
int result;
u8 mstat;
ulong lock_flags;
- int rc;
spin_lock_irqsave(&ch->ch_lock, lock_flags);
if (mstat & D_CD(ch))
result |= TIOCM_CD;
- rc = put_user(result, value);
-
- return rc;
+ return put_user(result, value);
}
/*
/* Start the poller */
spin_lock_irqsave(&dgap_poll_lock, flags);
- init_timer(&dgap_poll_timer);
- dgap_poll_timer.function = dgap_poll_handler;
+ setup_timer(&dgap_poll_timer, dgap_poll_handler, 0);
dgap_poll_timer.data = 0;
dgap_poll_time = jiffies + dgap_jiffies_from_ms(dgap_poll_tick);
dgap_poll_timer.expires = dgap_poll_time;
#define PCI_IO_OFFSET 0x00200000
/* Size of IO (2MB) */
-#define PCI_IO_SIZE 0x00200000
+#define PCI_IO_SIZE_DGAP 0x00200000
/* Number of boards we support at once. */
#define MAXBOARDS 32
-EXTRA_CFLAGS += -DDG_NAME=\"dgnc-1.3-16\" -DDG_PART=\"40002369_F\"
-
obj-$(CONFIG_DGNC) += dgnc.o
dgnc-objs := dgnc_cls.o dgnc_driver.o\
* checkpatch fixes
* remove unecessary comments
-* remove unecessary error messages. Example kzalloc() has its
+* remove unecessary error messages. Example kzalloc() has its
own error message. Adding an extra one is useless.
* use goto statements for error handling when appropriate
-* there is a lot of unecessary code in the driver. It was
+* there is a lot of unecessary code in the driver. It was
originally a standalone driver. Remove uneeded code.
-Please send patches to Greg Kroah-Hartman <greg@kroah.com> and
+Please send patches to Greg Kroah-Hartman <greg@kroah.com> and
Cc: Lidza Louina <lidza.louina@gmail.com>
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- *
- * NOTE TO LINUX KERNEL HACKERS: DO NOT REFORMAT THIS CODE!
- *
- * This is shared code between Digi's CVS archive and the
- * Linux Kernel sources.
- * Changing the source just for reformatting needlessly breaks
- * our CVS diff history.
- *
- * Send any bug fixes/changes to: Eng.Linux at digi dot com.
- * Thank you.
- *
*/
#include <linux/kernel.h>
.send_immediate_char = cls_send_immediate_char
};
-
static inline void cls_set_cts_flow_control(struct channel_t *ch)
{
unsigned char lcrb = readb(&ch->ch_cls_uart->lcr);
unsigned char ier = readb(&ch->ch_cls_uart->ier);
unsigned char isr_fcr = 0;
-
/*
* The Enhanced Register Set may only be accessed when
* the Line Control Register is set to 0xBFh.
}
-
static inline void cls_set_ixon_flow_control(struct channel_t *ch)
{
unsigned char lcrb = readb(&ch->ch_cls_uart->lcr);
unsigned char ier = readb(&ch->ch_cls_uart->ier);
unsigned char isr_fcr = 0;
-
/*
* The Enhanced Register Set may only be accessed when
* the Line Control Register is set to 0xBFh.
}
-
static inline void cls_set_no_output_flow_control(struct channel_t *ch)
{
unsigned char lcrb = readb(&ch->ch_cls_uart->lcr);
unsigned char ier = readb(&ch->ch_cls_uart->ier);
unsigned char isr_fcr = 0;
-
/*
* The Enhanced Register Set may only be accessed when
* the Line Control Register is set to 0xBFh.
}
-
static inline void cls_set_rts_flow_control(struct channel_t *ch)
{
unsigned char lcrb = readb(&ch->ch_cls_uart->lcr);
unsigned char ier = readb(&ch->ch_cls_uart->ier);
unsigned char isr_fcr = 0;
-
/*
* The Enhanced Register Set may only be accessed when
* the Line Control Register is set to 0xBFh.
UART_16654_FCR_TXTRIGGER_16 | UART_FCR_CLEAR_RCVR),
&ch->ch_cls_uart->isr_fcr);
-
ch->ch_r_watermark = 4;
ch->ch_r_tlevel = 8;
}
-
static inline void cls_set_ixoff_flow_control(struct channel_t *ch)
{
unsigned char lcrb = readb(&ch->ch_cls_uart->lcr);
unsigned char ier = readb(&ch->ch_cls_uart->ier);
unsigned char isr_fcr = 0;
-
/*
* The Enhanced Register Set may only be accessed when
* the Line Control Register is set to 0xBFh.
}
-
static inline void cls_set_no_input_flow_control(struct channel_t *ch)
{
unsigned char lcrb = readb(&ch->ch_cls_uart->lcr);
unsigned char ier = readb(&ch->ch_cls_uart->ier);
unsigned char isr_fcr = 0;
-
/*
* The Enhanced Register Set may only be accessed when
* the Line Control Register is set to 0xBFh.
}
-
/*
* cls_clear_break.
* Determines whether its time to shut off break condition.
spin_unlock_irqrestore(&ch->ch_lock, flags);
}
-
/* Parse the ISR register for the specific port */
static inline void cls_parse_isr(struct dgnc_board *brd, uint port)
{
* verified in the interrupt routine.
*/
- if (port > brd->nasync)
+ if (port >= brd->nasync)
return;
ch = brd->channels[port];
}
}
-
/*
* cls_param()
* Send any/all changes to the line to the UART.
cls_parse_modem(ch, readb(&ch->ch_cls_uart->msr));
}
-
/*
* Our board poller function.
*/
}
-
/*
* cls_intr()
*
return IRQ_HANDLED;
}
-
static void cls_disable_receiver(struct channel_t *ch)
{
unsigned char tmp = readb(&ch->ch_cls_uart->ier);
writeb(tmp, &ch->ch_cls_uart->ier);
}
-
static void cls_enable_receiver(struct channel_t *ch)
{
unsigned char tmp = readb(&ch->ch_cls_uart->ier);
writeb(tmp, &ch->ch_cls_uart->ier);
}
-
static void cls_copy_data_from_uart_to_queue(struct channel_t *ch)
{
int qleft = 0;
spin_unlock_irqrestore(&ch->ch_lock, flags);
}
-
/*
* This function basically goes to sleep for secs, or until
* it gets signalled that the port has fully drained.
((un->un_flags & UN_EMPTY) == 0));
}
-
/* Channel lock MUST be held before calling this function! */
static void cls_flush_uart_write(struct channel_t *ch)
{
ch->ch_flags |= (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM);
}
-
/* Channel lock MUST be held before calling this function! */
static void cls_flush_uart_read(struct channel_t *ch)
{
udelay(10);
}
-
static void cls_copy_data_from_queue_to_uart(struct channel_t *ch)
{
ushort head;
spin_lock_irqsave(&ch->ch_lock, flags);
/* No data to write to the UART */
- if (ch->ch_w_tail == ch->ch_w_head) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
- }
+ if (ch->ch_w_tail == ch->ch_w_head)
+ goto exit_unlock;
/* If port is "stopped", don't send any data to the UART */
if ((ch->ch_flags & CH_FORCED_STOP) ||
- (ch->ch_flags & CH_BREAK_SENDING)) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
- }
+ (ch->ch_flags & CH_BREAK_SENDING))
+ goto exit_unlock;
- if (!(ch->ch_flags & (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM))) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
- }
+ if (!(ch->ch_flags & (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM)))
+ goto exit_unlock;
n = 32;
if (len_written > 0)
ch->ch_flags &= ~(CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM);
+exit_unlock:
spin_unlock_irqrestore(&ch->ch_lock, flags);
}
-
static void cls_parse_modem(struct channel_t *ch, unsigned char signals)
{
unsigned char msignals = signals;
spin_unlock_irqrestore(&ch->ch_lock, flags);
}
-
/* Make the UART raise any of the output signals we want up */
static void cls_assert_modem_signals(struct channel_t *ch)
{
udelay(10);
}
-
static void cls_send_start_character(struct channel_t *ch)
{
if (!ch || ch->magic != DGNC_CHANNEL_MAGIC)
}
}
-
static void cls_send_stop_character(struct channel_t *ch)
{
if (!ch || ch->magic != DGNC_CHANNEL_MAGIC)
}
}
-
/* Inits UART */
static void cls_uart_init(struct channel_t *ch)
{
readb(&ch->ch_cls_uart->msr);
}
-
/*
* Turns off UART.
*/
writeb(0, &ch->ch_cls_uart->ier);
}
-
/*
* cls_get_uarts_bytes_left.
* Returns 0 is nothing left in the FIFO, returns 1 otherwise.
return left;
}
-
/*
* cls_send_break.
* Starts sending a break thru the UART.
}
}
-
/*
* cls_send_immediate_char.
* Sends a specific character as soon as possible to the UART,
u8 __iomem *re_map_vpdbase;/* Remapped memory of the card */
int i = 0;
-
vpdbase = pci_resource_start(brd->pdev, 3);
/* No VPD */
if (re_map_vpdbase)
iounmap(re_map_vpdbase);
}
-
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
- *
*/
#ifndef __DGNC_CLS_H
#define __DGNC_CLS_H
-#include "dgnc_types.h"
-
-
/************************************************************************
* Per channel/port Classic UART structure *
************************************************************************
* U = Unused. *
************************************************************************/
+/*
+ * txrx : WR RHR/THR - Holding reg
+ * ier : WR IER - Interrupt Enable Reg
+ * isr_fcr : WR ISR/FCR - Interrupt Status Reg/Fifo Control Reg
+ * lcr : WR LCR - Line Control Reg
+ * mcr : WR MCR - Modem Control Reg
+ * lsr : WR LSR - Line Status Reg
+ * msr : WR MSG - Modem Status Reg
+ * spr : WR SPR - Scratch pad Reg
+ */
struct cls_uart_struct {
- u8 txrx; /* WR RHR/THR - Holding Reg */
- u8 ier; /* WR IER - Interrupt Enable Reg */
- u8 isr_fcr; /* WR ISR/FCR - Interrupt Status Reg/Fifo Control Reg */
- u8 lcr; /* WR LCR - Line Control Reg */
- u8 mcr; /* WR MCR - Modem Control Reg */
- u8 lsr; /* WR LSR - Line Status Reg */
- u8 msr; /* WR MSR - Modem Status Reg */
- u8 spr; /* WR SPR - Scratch Pad Reg */
+ u8 txrx;
+ u8 ier;
+ u8 isr_fcr;
+ u8 lcr;
+ u8 mcr;
+ u8 lsr;
+ u8 msr;
+ u8 spr;
};
/* Where to read the interrupt register (8bits) */
#define UART_EXAR654_ENHANCED_REGISTER_SET 0xBF
-#define UART_16654_FCR_TXTRIGGER_8 0x0
#define UART_16654_FCR_TXTRIGGER_16 0x10
-#define UART_16654_FCR_TXTRIGGER_32 0x20
-#define UART_16654_FCR_TXTRIGGER_56 0x30
-
-#define UART_16654_FCR_RXTRIGGER_8 0x0
#define UART_16654_FCR_RXTRIGGER_16 0x40
#define UART_16654_FCR_RXTRIGGER_56 0x80
-#define UART_16654_FCR_RXTRIGGER_60 0xC0
-#define UART_IIR_CTSRTS 0x20 /* Received CTS/RTS change of state */
-#define UART_IIR_RDI_TIMEOUT 0x0C /* Receiver data TIMEOUT */
+/* Received CTS/RTS change of state */
+#define UART_IIR_CTSRTS 0x20
+
+/* Receiver data TIMEOUT */
+#define UART_IIR_RDI_TIMEOUT 0x0C
/*
* These are the EXTENDED definitions for the Exar 654's Interrupt
#define UART_EXAR654_EFR_IXOFF 0x8 /* Transmit Xon1/Xoff1 */
#define UART_EXAR654_EFR_RTSDTR 0x40 /* Auto RTS/DTR Flow Control Enable */
#define UART_EXAR654_EFR_CTSDSR 0x80 /* Auto CTS/DSR Flow COntrol Enable */
-
-#define UART_EXAR654_XOFF_DETECT 0x1 /* Indicates whether chip saw an incoming XOFF char */
-#define UART_EXAR654_XON_DETECT 0x2 /* Indicates whether chip saw an incoming XON char */
-
#define UART_EXAR654_IER_XOFF 0x20 /* Xoff Interrupt Enable */
#define UART_EXAR654_IER_RTSDTR 0x40 /* Output Interrupt Enable */
#define UART_EXAR654_IER_CTSDSR 0x80 /* Input Interrupt Enable */
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- *
- * NOTE TO LINUX KERNEL HACKERS: DO NOT REFORMAT THIS CODE!
- *
- * This is shared code between Digi's CVS archive and the
- * Linux Kernel sources.
- * Changing the source just for reformatting needlessly breaks
- * our CVS diff history.
- *
- * Send any bug fixes/changes to: Eng.Linux at digi dot com.
- * Thank you.
- *
*/
#include <linux/sched.h>
#include "dgnc_driver.h"
#include "dgnc_pci.h"
-#include "dpacompat.h"
#include "dgnc_mgmt.h"
#include "dgnc_tty.h"
#include "dgnc_cls.h"
static int dgnc_found_board(struct pci_dev *pdev, int id);
static void dgnc_cleanup_board(struct dgnc_board *brd);
static void dgnc_poll_handler(ulong dummy);
-static int dgnc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
+static int dgnc_init_one(struct pci_dev *pdev,
+ const struct pci_device_id *ent);
static void dgnc_do_remap(struct dgnc_board *brd);
/*
* Poller stuff
*/
static DEFINE_SPINLOCK(dgnc_poll_lock); /* Poll scheduling lock */
-static ulong dgnc_poll_time; /* Time of next poll */
-static uint dgnc_poll_stop; /* Used to tell poller to stop */
+static ulong dgnc_poll_time; /* Time of next poll */
+static uint dgnc_poll_stop; /* Used to tell poller to stop */
static struct timer_list dgnc_poll_timer;
.id_table = dgnc_pci_tbl,
};
-
-char *dgnc_state_text[] = {
- "Board Failed",
- "Board Found",
- "Board READY",
-};
-
-
/************************************************************************
*
* Driver load/unload functions
* If something went wrong in the scan, bail out of driver.
*/
if (rc < 0) {
- /* Only unregister the pci driver if it was actually registered. */
+ /* Only unregister if it was actually registered. */
if (dgnc_NumBoards)
pci_unregister_driver(&dgnc_driver);
else
* Register management/dpa devices
*/
rc = register_chrdev(0, "dgnc", &dgnc_BoardFops);
- if (rc <= 0) {
+ if (rc < 0) {
pr_err(DRVSTR ": Can't register dgnc driver device (%d)\n", rc);
- return -ENXIO;
+ return rc;
}
dgnc_Major = rc;
/* Start the poller */
spin_lock_irqsave(&dgnc_poll_lock, flags);
- init_timer(&dgnc_poll_timer);
- dgnc_poll_timer.function = dgnc_poll_handler;
- dgnc_poll_timer.data = 0;
+ setup_timer(&dgnc_poll_timer, dgnc_poll_handler, 0);
dgnc_poll_time = jiffies + dgnc_jiffies_from_ms(dgnc_poll_tick);
dgnc_poll_timer.expires = dgnc_poll_time;
spin_unlock_irqrestore(&dgnc_poll_lock, flags);
spin_lock_irqsave(&dgnc_global_lock, flags);
brd->msgbuf = NULL;
- printk("%s", brd->msgbuf_head);
+ dev_dbg(&brd->pdev->dev, "%s\n", brd->msgbuf_head);
kfree(brd->msgbuf_head);
brd->msgbuf_head = NULL;
spin_unlock_irqrestore(&dgnc_global_lock, flags);
return -ENOMEM;
/* make a temporary message buffer for the boot messages */
- brd->msgbuf_head = kzalloc(sizeof(u8) * 8192, GFP_KERNEL);
+ brd->msgbuf_head = kcalloc(8192, sizeof(u8), GFP_KERNEL);
brd->msgbuf = brd->msgbuf_head;
if (!brd->msgbuf) {
if (brd->re_map_membase) {
- /* After remap is complete, we need to read and store the dvid */
+ /* Read and store the dvid after remapping */
brd->dvid = readb(brd->re_map_membase + 0x8D);
/* Get and store the board VPD, if it exists */
rc = dgnc_tty_register(brd);
if (rc < 0) {
- dgnc_tty_uninit(brd);
pr_err(DRVSTR ": Can't register tty devices (%d)\n", rc);
- brd->state = BOARD_FAILED;
- brd->dpastatus = BD_NOFEP;
goto failed;
}
rc = dgnc_finalize_board_init(brd);
if (rc < 0) {
pr_err(DRVSTR ": Can't finalize board init (%d)\n", rc);
- brd->state = BOARD_FAILED;
- brd->dpastatus = BD_NOFEP;
-
goto failed;
}
rc = dgnc_tty_init(brd);
if (rc < 0) {
- dgnc_tty_uninit(brd);
pr_err(DRVSTR ": Can't init tty devices (%d)\n", rc);
- brd->state = BOARD_FAILED;
- brd->dpastatus = BD_NOFEP;
-
goto failed;
}
dgnc_create_ports_sysfiles(brd);
/* init our poll helper tasklet */
- tasklet_init(&brd->helper_tasklet, brd->bd_ops->tasklet, (unsigned long) brd);
+ tasklet_init(&brd->helper_tasklet,
+ brd->bd_ops->tasklet,
+ (unsigned long) brd);
spin_lock_irqsave(&dgnc_global_lock, flags);
brd->msgbuf = NULL;
- printk("%s", brd->msgbuf_head);
+ dev_dbg(&brd->pdev->dev, "%s\n", brd->msgbuf_head);
kfree(brd->msgbuf_head);
brd->msgbuf_head = NULL;
spin_unlock_irqrestore(&dgnc_global_lock, flags);
return 0;
failed:
+ dgnc_tty_uninit(brd);
+ brd->state = BOARD_FAILED;
+ brd->dpastatus = BD_NOFEP;
return -ENXIO;
spin_lock_irqsave(&brd->bd_lock, flags);
- /* If board is in a failed state, don't bother scheduling a tasklet */
+ /* If board is in a failed state don't schedule a tasklet */
if (brd->state == BOARD_FAILED) {
spin_unlock_irqrestore(&brd->bd_lock, flags);
continue;
new_time = dgnc_poll_time - jiffies;
if ((ulong) new_time >= 2 * dgnc_poll_tick)
- dgnc_poll_time = jiffies + dgnc_jiffies_from_ms(dgnc_poll_tick);
+ dgnc_poll_time = jiffies + dgnc_jiffies_from_ms(dgnc_poll_tick);
- init_timer(&dgnc_poll_timer);
- dgnc_poll_timer.function = dgnc_poll_handler;
- dgnc_poll_timer.data = 0;
+ setup_timer(&dgnc_poll_timer, dgnc_poll_handler, 0);
dgnc_poll_timer.expires = dgnc_poll_time;
spin_unlock_irqrestore(&dgnc_poll_lock, flags);
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
- *
*************************************************************************
*
* Driver includes
#include <linux/tty.h> /* To pick up the various tty structs/defines */
#include <linux/interrupt.h> /* For irqreturn_t type */
-#include "dgnc_types.h" /* Additional types needed by the Digi header files */
#include "digi.h" /* Digi specific ioctl header */
-#include "dgnc_kcompat.h" /* Kernel 2.4/2.6 compat includes */
#include "dgnc_sysfs.h" /* Support for SYSFS */
/*************************************************************************
#define PROCSTR "dgnc" /* /proc entries */
#define DEVSTR "/dev/dg/dgnc" /* /dev entries */
#define DRVSTR "dgnc" /* Driver name string */
+#define DG_PART "40002369_F" /* RPM part number */
#define TRC_TO_CONSOLE 1
struct tty_driver PrintDriver;
char PrintName[200];
- uint dgnc_Major_Serial_Registered;
- uint dgnc_Major_TransparentPrint_Registered;
+ bool dgnc_Major_Serial_Registered;
+ bool dgnc_Major_TransparentPrint_Registered;
uint dgnc_Serial_Major;
uint dgnc_TransparentPrint_Major;
/*
* Our Global Variables.
*/
-extern uint dgnc_Major; /* Our driver/mgmt major */
-extern int dgnc_poll_tick; /* Poll interval - 20 ms */
-extern spinlock_t dgnc_global_lock; /* Driver global spinlock */
-extern uint dgnc_NumBoards; /* Total number of boards */
-extern struct dgnc_board *dgnc_Board[MAXBOARDS]; /* Array of board structs */
-extern char *dgnc_state_text[]; /* Array of state text */
+extern uint dgnc_Major; /* Our driver/mgmt major */
+extern int dgnc_poll_tick; /* Poll interval - 20 ms */
+extern spinlock_t dgnc_global_lock; /* Driver global spinlock */
+extern uint dgnc_NumBoards; /* Total number of boards */
+extern struct dgnc_board *dgnc_Board[MAXBOARDS]; /* Array of board structs */
#endif
+++ /dev/null
-/*
- * Copyright 2004 Digi International (www.digi.com)
- * Scott H Kilau <Scott_Kilau at digi dot com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
- * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
- * PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
- *
- *************************************************************************
- *
- * This file is intended to contain all the kernel "differences" between the
- * various kernels that we support.
- *
- *************************************************************************/
-
-#ifndef __DGNC_KCOMPAT_H
-#define __DGNC_KCOMPAT_H
-
-#if !defined(TTY_FLIPBUF_SIZE)
-# define TTY_FLIPBUF_SIZE 512
-#endif
-
-
-/* Sparse stuff */
-# ifndef __user
-# define __user
-# define __kernel
-# define __safe
-# define __force
-# define __chk_user_ptr(x) (void)0
-# endif
-
-
-#endif /* ! __DGNC_KCOMPAT_H */
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- *
- * NOTE TO LINUX KERNEL HACKERS: DO NOT REFORMAT THIS CODE!
- *
- * This is shared code between Digi's CVS archive and the
- * Linux Kernel sources.
- * Changing the source just for reformatting needlessly breaks
- * our CVS diff history.
- *
- * Send any bug fixes/changes to: Eng.Linux at digi dot com.
- * Thank you.
- *
*/
/************************************************************************
#include "dgnc_driver.h"
#include "dgnc_pci.h"
-#include "dgnc_kcompat.h" /* Kernel 2.4/2.6 compat includes */
#include "dgnc_mgmt.h"
-#include "dpacompat.h"
/* Our "in use" variables, to enforce 1 open only */
if (copy_from_user(&brd, uarg, sizeof(int)))
return -EFAULT;
- if ((brd < 0) || (brd > dgnc_NumBoards) ||
- (dgnc_NumBoards == 0))
+ if (brd < 0 || brd >= dgnc_NumBoards)
return -ENODEV;
memset(&di, 0, sizeof(di));
channel = ni.channel;
/* Verify boundaries on board */
- if ((board > dgnc_NumBoards) || (dgnc_NumBoards == 0))
+ if (board >= dgnc_NumBoards)
return -ENODEV;
/* Verify boundaries on channel */
- if ((channel < 0) || (channel > dgnc_Board[board]->nasync))
+ if (channel >= dgnc_Board[board]->nasync)
return -ENODEV;
ch = dgnc_Board[board]->channels[channel];
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
*/
#ifndef __DGNC_MGMT_H
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- *
- * NOTE TO LINUX KERNEL HACKERS: DO NOT REFORMAT THIS CODE!
- *
- * This is shared code between Digi's CVS archive and the
- * Linux Kernel sources.
- * Changing the source just for reformatting needlessly breaks
- * our CVS diff history.
- *
- * Send any bug fixes/changes to: Eng.Linux at digi dot com.
- * Thank you.
- *
*/
/* Turn on auto CTS flow control */
#if 1
- ier |= (UART_17158_IER_CTSDSR);
+ ier |= UART_17158_IER_CTSDSR;
#else
ier &= ~(UART_17158_IER_CTSDSR);
#endif
efr |= (UART_17158_EFR_ECB | UART_17158_EFR_CTSDSR);
/* Turn off auto Xon flow control */
- efr &= ~(UART_17158_EFR_IXON);
+ efr &= ~UART_17158_EFR_IXON;
/* Why? Becuz Exar's spec says we have to zero it out before setting it */
writeb(0, &ch->ch_neo_uart->efr);
/* Turn on auto RTS flow control */
#if 1
- ier |= (UART_17158_IER_RTSDTR);
+ ier |= UART_17158_IER_RTSDTR;
#else
ier &= ~(UART_17158_IER_RTSDTR);
#endif
efr |= (UART_17158_EFR_ECB | UART_17158_EFR_RTSDTR);
/* Turn off auto Xoff flow control */
- ier &= ~(UART_17158_IER_XOFF);
- efr &= ~(UART_17158_EFR_IXOFF);
+ ier &= ~UART_17158_IER_XOFF;
+ efr &= ~UART_17158_EFR_IXOFF;
/* Why? Becuz Exar's spec says we have to zero it out before setting it */
writeb(0, &ch->ch_neo_uart->efr);
* RTS/DTR# output pin (MCR bit-0 or 1 to logic 1 after
* it is enabled.
*/
- ch->ch_mostat |= (UART_MCR_RTS);
+ ch->ch_mostat |= UART_MCR_RTS;
neo_pci_posting_flush(ch->ch_bd);
}
unsigned char efr = readb(&ch->ch_neo_uart->efr);
/* Turn off auto CTS flow control */
- ier &= ~(UART_17158_IER_CTSDSR);
- efr &= ~(UART_17158_EFR_CTSDSR);
+ ier &= ~UART_17158_IER_CTSDSR;
+ efr &= ~UART_17158_EFR_CTSDSR;
/* Turn on auto Xon flow control */
efr |= (UART_17158_EFR_ECB | UART_17158_EFR_IXON);
unsigned char efr = readb(&ch->ch_neo_uart->efr);
/* Turn off auto RTS flow control */
- ier &= ~(UART_17158_IER_RTSDTR);
- efr &= ~(UART_17158_EFR_RTSDTR);
+ ier &= ~UART_17158_IER_RTSDTR;
+ efr &= ~UART_17158_EFR_RTSDTR;
/* Turn on auto Xoff flow control */
- ier |= (UART_17158_IER_XOFF);
+ ier |= UART_17158_IER_XOFF;
efr |= (UART_17158_EFR_ECB | UART_17158_EFR_IXOFF);
/* Why? Becuz Exar's spec says we have to zero it out before setting it */
unsigned char efr = readb(&ch->ch_neo_uart->efr);
/* Turn off auto RTS flow control */
- ier &= ~(UART_17158_IER_RTSDTR);
- efr &= ~(UART_17158_EFR_RTSDTR);
+ ier &= ~UART_17158_IER_RTSDTR;
+ efr &= ~UART_17158_EFR_RTSDTR;
/* Turn off auto Xoff flow control */
- ier &= ~(UART_17158_IER_XOFF);
+ ier &= ~UART_17158_IER_XOFF;
if (ch->ch_c_iflag & IXON)
efr &= ~(UART_17158_EFR_IXOFF);
else
unsigned char efr = readb(&ch->ch_neo_uart->efr);
/* Turn off auto CTS flow control */
- ier &= ~(UART_17158_IER_CTSDSR);
- efr &= ~(UART_17158_EFR_CTSDSR);
+ ier &= ~UART_17158_IER_CTSDSR;
+ efr &= ~UART_17158_EFR_CTSDSR;
/* Turn off auto Xon flow control */
if (ch->ch_c_iflag & IXOFF)
- efr &= ~(UART_17158_EFR_IXON);
+ efr &= ~UART_17158_EFR_IXON;
else
efr &= ~(UART_17158_EFR_ECB | UART_17158_EFR_IXON);
if (!brd || brd->magic != DGNC_BOARD_MAGIC)
return;
- if (port > brd->maxports)
+ if (port >= brd->maxports)
return;
ch = brd->channels[port];
if (!brd || brd->magic != DGNC_BOARD_MAGIC)
return;
- if (port > brd->maxports)
+ if (port >= brd->maxports)
return;
ch = brd->channels[port];
*/
/* Verify the port is in range. */
- if (port > brd->nasync)
+ if (port >= brd->nasync)
continue;
ch = brd->channels[port];
* IBM pSeries platform.
* 15 bytes max appears to be the magic number.
*/
- n = min((uint) n, (uint) 12);
+ n = min_t(uint, n, 12);
/*
* Since we are grabbing the linestatus register, which
spin_lock_irqsave(&ch->ch_lock, flags);
/* No data to write to the UART */
- if (ch->ch_w_tail == ch->ch_w_head) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
- }
+ if (ch->ch_w_tail == ch->ch_w_head)
+ goto exit_unlock;
/* If port is "stopped", don't send any data to the UART */
- if ((ch->ch_flags & CH_FORCED_STOP) || (ch->ch_flags & CH_BREAK_SENDING)) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
- }
+ if ((ch->ch_flags & CH_FORCED_STOP) ||
+ (ch->ch_flags & CH_BREAK_SENDING))
+ goto exit_unlock;
/*
* If FIFOs are disabled. Send data directly to txrx register
ch->ch_w_tail &= WQUEUEMASK;
ch->ch_txcount++;
}
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
+
+ goto exit_unlock;
}
/*
* We have to do it this way, because of the EXAR TXFIFO count bug.
*/
if ((ch->ch_bd->dvid & 0xf0) < UART_XR17E158_DVID) {
- if (!(ch->ch_flags & (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM))) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
- }
+ if (!(ch->ch_flags & (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM)))
+ goto exit_unlock;
len_written = 0;
n = readb(&ch->ch_neo_uart->tfifo);
- if ((unsigned int) n > ch->ch_t_tlevel) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
- }
+ if ((unsigned int) n > ch->ch_t_tlevel)
+ goto exit_unlock;
n = UART_17158_TX_FIFOSIZE - ch->ch_t_tlevel;
} else {
ch->ch_flags &= ~(CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM);
}
+exit_unlock:
spin_unlock_irqrestore(&ch->ch_lock, flags);
}
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
- *
*/
#ifndef __DGNC_NEO_H
#define __DGNC_NEO_H
-#include "dgnc_types.h"
#include "dgnc_driver.h"
/************************************************************************
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
*/
#ifndef __DGNC_PCI_H
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- *
- * NOTE TO LINUX KERNEL HACKERS: DO NOT REFORMAT THIS CODE!
- *
- * This is shared code between Digi's CVS archive and the
- * Linux Kernel sources.
- * Changing the source just for reformatting needlessly breaks
- * our CVS diff history.
- *
- * Send any bug fixes/changes to: Eng.Linux at digi dot com.
- * Thank you.
- *
*/
rc |= driver_create_file(driverfs, &driver_attr_maxboards);
rc |= driver_create_file(driverfs, &driver_attr_pollrate);
if (rc)
- printk(KERN_ERR "DGNC: sysfs driver_create_file failed!\n");
+ pr_err("DGNC: sysfs driver_create_file failed!\n");
}
rc |= device_create_file(&(bd->pdev->dev), &dev_attr_vpd);
rc |= device_create_file(&(bd->pdev->dev), &dev_attr_serial_number);
if (rc)
- printk(KERN_ERR "DGNC: sysfs device_create_file failed!\n");
+ dev_err(&bd->pdev->dev, "dgnc: sysfs device_create_file failed!\n");
}
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
*/
#ifndef __DGNC_SYSFS_H
#define __DGNC_SYSFS_H
-#include "dgnc_driver.h"
-
#include <linux/device.h>
+#include "dgnc_driver.h"
struct dgnc_board;
struct channel_t;
extern void dgnc_create_tty_sysfs(struct un_t *un, struct device *c);
extern void dgnc_remove_tty_sysfs(struct device *c);
-
-
#endif
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- *
- * NOTE TO LINUX KERNEL HACKERS: DO NOT REFORMAT THIS CODE!
- *
- * This is shared code between Digi's CVS archive and the
- * Linux Kernel sources.
- * Changing the source just for reformatting needlessly breaks
- * our CVS diff history.
- *
- * Send any bug fixes/changes to: Eng.Linux at digi dot com.
- * Thank you.
*/
/************************************************************************
#include <linux/ctype.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
+#include <linux/types.h>
#include <linux/serial_reg.h>
#include <linux/slab.h>
#include <linux/delay.h> /* For udelay */
#include <linux/pci.h>
#include "dgnc_driver.h"
#include "dgnc_tty.h"
-#include "dgnc_types.h"
#include "dgnc_neo.h"
#include "dgnc_cls.h"
-#include "dpacompat.h"
#include "dgnc_sysfs.h"
#include "dgnc_utils.h"
"Can't register tty device (%d)\n", rc);
return rc;
}
- brd->dgnc_Major_Serial_Registered = TRUE;
+ brd->dgnc_Major_Serial_Registered = true;
}
/*
rc);
return rc;
}
- brd->dgnc_Major_TransparentPrint_Registered = TRUE;
+ brd->dgnc_Major_TransparentPrint_Registered = true;
}
dgnc_BoardsByMajor[brd->SerialDriver.major] = brd;
tty_unregister_device(&brd->SerialDriver, i);
}
tty_unregister_driver(&brd->SerialDriver);
- brd->dgnc_Major_Serial_Registered = FALSE;
+ brd->dgnc_Major_Serial_Registered = false;
}
if (brd->dgnc_Major_TransparentPrint_Registered) {
tty_unregister_device(&brd->PrintDriver, i);
}
tty_unregister_driver(&brd->PrintDriver);
- brd->dgnc_Major_TransparentPrint_Registered = FALSE;
+ brd->dgnc_Major_TransparentPrint_Registered = false;
}
kfree(brd->SerialDriver.ttys);
{
struct dgnc_board *bd;
struct tty_struct *tp;
- struct tty_ldisc *ld;
+ struct tty_ldisc *ld = NULL;
uint rmask;
ushort head;
ushort tail;
tail = ch->ch_r_tail & rmask;
data_len = (head - tail) & rmask;
- if (data_len == 0) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
- }
+ if (data_len == 0)
+ goto exit_unlock;
/*
* If the device is not open, or CREAD is off,
/* Force queue flow control to be released, if needed */
dgnc_check_queue_flow_control(ch);
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
+ goto exit_unlock;
}
/*
* If we are throttled, simply don't read any data.
*/
- if (ch->ch_flags & CH_FORCED_STOPI) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
- }
+ if (ch->ch_flags & CH_FORCED_STOPI)
+ goto exit_unlock;
flip_len = TTY_FLIPBUF_SIZE;
}
}
- if (len <= 0) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- if (ld)
- tty_ldisc_deref(ld);
- return;
- }
+ if (len <= 0)
+ goto exit_unlock;
/*
* The tty layer in the kernel has changed in 2.6.16+.
/* Tell the tty layer its okay to "eat" the data now */
tty_flip_buffer_push(tp->port);
+ if (ld)
+ tty_ldisc_deref(ld);
+ return;
+
+exit_unlock:
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
if (ld)
tty_ldisc_deref(ld);
}
ch->ch_stops_sent++;
}
}
- /* No FLOW */
- else {
- /* Empty... Can't do anything about the impending overflow... */
- }
}
/*
spin_lock_irqsave(&brd->bd_lock, flags);
/* If opened device is greater than our number of ports, bail. */
- if (PORT_NUM(minor) > brd->nasync) {
+ if (PORT_NUM(minor) >= brd->nasync) {
spin_unlock_irqrestore(&brd->bd_lock, flags);
return -ENXIO;
}
/*
* Bail if no space left.
*/
- if (count <= 0) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return 0;
- }
+ if (count <= 0)
+ goto exit_retry;
/*
* Output the printer ON string, if we are in terminal mode, but
/*
* If there is nothing left to copy, or I can't handle any more data, leave.
*/
- if (count <= 0) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return 0;
- }
+ if (count <= 0)
+ goto exit_retry;
if (from_user) {
}
return count;
+
+exit_retry:
+
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
+ return 0;
}
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
*/
#ifndef __DGNC_TTY_H
+++ /dev/null
-/*
- * Copyright 2003 Digi International (www.digi.com)
- * Scott H Kilau <Scott_Kilau at digi dot com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
- * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
- * PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
- */
-
-#ifndef __DGNC_TYPES_H
-#define __DGNC_TYPES_H
-
-#ifndef TRUE
-# define TRUE 1
-#endif
-
-#ifndef FALSE
-# define FALSE 0
-#endif
-
-#endif
schedule_timeout((ms * HZ) / 1000);
return signal_pending(current);
}
-
-/*
- * dgnc_ioctl_name() : Returns a text version of each ioctl value.
- */
-char *dgnc_ioctl_name(int cmd)
-{
- switch (cmd) {
-
- case TCGETA: return "TCGETA";
- case TCGETS: return "TCGETS";
- case TCSETA: return "TCSETA";
- case TCSETS: return "TCSETS";
- case TCSETAW: return "TCSETAW";
- case TCSETSW: return "TCSETSW";
- case TCSETAF: return "TCSETAF";
- case TCSETSF: return "TCSETSF";
- case TCSBRK: return "TCSBRK";
- case TCXONC: return "TCXONC";
- case TCFLSH: return "TCFLSH";
- case TIOCGSID: return "TIOCGSID";
-
- case TIOCGETD: return "TIOCGETD";
- case TIOCSETD: return "TIOCSETD";
- case TIOCGWINSZ: return "TIOCGWINSZ";
- case TIOCSWINSZ: return "TIOCSWINSZ";
-
- case TIOCMGET: return "TIOCMGET";
- case TIOCMSET: return "TIOCMSET";
- case TIOCMBIS: return "TIOCMBIS";
- case TIOCMBIC: return "TIOCMBIC";
-
- /* from digi.h */
- case DIGI_SETA: return "DIGI_SETA";
- case DIGI_SETAW: return "DIGI_SETAW";
- case DIGI_SETAF: return "DIGI_SETAF";
- case DIGI_SETFLOW: return "DIGI_SETFLOW";
- case DIGI_SETAFLOW: return "DIGI_SETAFLOW";
- case DIGI_GETFLOW: return "DIGI_GETFLOW";
- case DIGI_GETAFLOW: return "DIGI_GETAFLOW";
- case DIGI_GETA: return "DIGI_GETA";
- case DIGI_GEDELAY: return "DIGI_GEDELAY";
- case DIGI_SEDELAY: return "DIGI_SEDELAY";
- case DIGI_GETCUSTOMBAUD: return "DIGI_GETCUSTOMBAUD";
- case DIGI_SETCUSTOMBAUD: return "DIGI_SETCUSTOMBAUD";
- case TIOCMODG: return "TIOCMODG";
- case TIOCMODS: return "TIOCMODS";
- case TIOCSDTR: return "TIOCSDTR";
- case TIOCCDTR: return "TIOCCDTR";
-
- default: return "unknown";
- }
-}
#define __DGNC_UTILS_H
int dgnc_ms_sleep(ulong ms);
-char *dgnc_ioctl_name(int cmd);
#endif
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
*/
#ifndef __DIGI_H
#define __DIGI_H
-/************************************************************************
- *** Definitions for Digi ditty(1) command.
- ************************************************************************/
-
-
-/*
- * Copyright (c) 1988-96 Digi International Inc., All Rights Reserved.
- */
-
-/************************************************************************
- * This module provides application access to special Digi
- * serial line enhancements which are not standard UNIX(tm) features.
- ************************************************************************/
-
-#if !defined(TIOCMODG)
-
-#define TIOCMODG (('d'<<8) | 250) /* get modem ctrl state */
-#define TIOCMODS (('d'<<8) | 251) /* set modem ctrl state */
-
#ifndef TIOCM_LE
#define TIOCM_LE 0x01 /* line enable */
#define TIOCM_DTR 0x02 /* data terminal ready */
#define TIOCM_CD TIOCM_CAR /* carrier detect (alt) */
#endif
-#endif
-
#if !defined(TIOCMSET)
#define TIOCMSET (('d'<<8) | 252) /* set modem ctrl state */
#define TIOCMGET (('d'<<8) | 253) /* set modem ctrl state */
#define TIOCMBIS (('d'<<8) | 255) /* set modem ctrl state */
#endif
-
-#if !defined(TIOCSDTR)
-#define TIOCSDTR (('e'<<8) | 0) /* set DTR */
-#define TIOCCDTR (('e'<<8) | 1) /* clear DTR */
-#endif
-
-/************************************************************************
- * Ioctl command arguments for DIGI parameters.
- ************************************************************************/
#define DIGI_GETA (('e'<<8) | 94) /* Read params */
-
#define DIGI_SETA (('e'<<8) | 95) /* Set params */
#define DIGI_SETAW (('e'<<8) | 96) /* Drain & set params */
#define DIGI_SETAF (('e'<<8) | 97) /* Drain, flush & set params */
-
-#define DIGI_KME (('e'<<8) | 98) /* Read/Write Host */
- /* Adapter Memory */
-
-#define DIGI_GETFLOW (('e'<<8) | 99) /* Get startc/stopc flow */
- /* control characters */
-#define DIGI_SETFLOW (('e'<<8) | 100) /* Set startc/stopc flow */
- /* control characters */
-#define DIGI_GETAFLOW (('e'<<8) | 101) /* Get Aux. startc/stopc */
- /* flow control chars */
-#define DIGI_SETAFLOW (('e'<<8) | 102) /* Set Aux. startc/stopc */
- /* flow control chars */
-
-#define DIGI_GEDELAY (('d'<<8) | 246) /* Get edelay */
-#define DIGI_SEDELAY (('d'<<8) | 247) /* Set edelay */
-
-struct digiflow_t {
- unsigned char startc; /* flow cntl start char */
- unsigned char stopc; /* flow cntl stop char */
-};
-
-
-#ifdef FLOW_2200
-#define F2200_GETA (('e'<<8) | 104) /* Get 2x36 flow cntl flags */
-#define F2200_SETAW (('e'<<8) | 105) /* Set 2x36 flow cntl flags */
-#define F2200_MASK 0x03 /* 2200 flow cntl bit mask */
-#define FCNTL_2200 0x01 /* 2x36 terminal flow cntl */
-#define PCNTL_2200 0x02 /* 2x36 printer flow cntl */
-#define F2200_XON 0xf8
-#define P2200_XON 0xf9
-#define F2200_XOFF 0xfa
-#define P2200_XOFF 0xfb
-
-#define FXOFF_MASK 0x03 /* 2200 flow status mask */
-#define RCVD_FXOFF 0x01 /* 2x36 Terminal XOFF rcvd */
-#define RCVD_PXOFF 0x02 /* 2x36 Printer XOFF rcvd */
-#endif
-
-/************************************************************************
- * Values for digi_flags
- ************************************************************************/
-#define DIGI_IXON 0x0001 /* Handle IXON in the FEP */
+#define DIGI_GET_NI_INFO (('d'<<8) | 250) /* Non-intelligent state info */
+#define DIGI_LOOPBACK (('d'<<8) | 252) /*
+ * Enable/disable UART
+ * internal loopback
+ */
#define DIGI_FAST 0x0002 /* Fast baud rates */
#define RTSPACE 0x0004 /* RTS input flow control */
#define CTSPACE 0x0008 /* CTS output flow control */
-#define DSRPACE 0x0010 /* DSR output flow control */
-#define DCDPACE 0x0020 /* DCD output flow control */
-#define DTRPACE 0x0040 /* DTR input flow control */
#define DIGI_COOK 0x0080 /* Cooked processing done in FEP */
#define DIGI_FORCEDCD 0x0100 /* Force carrier */
#define DIGI_ALTPIN 0x0200 /* Alternate RJ-45 pin config */
-#define DIGI_AIXON 0x0400 /* Aux flow control in fep */
#define DIGI_PRINTER 0x0800 /* Hold port open for flow cntrl*/
-#define DIGI_PP_INPUT 0x1000 /* Change parallel port to input*/
#define DIGI_DTR_TOGGLE 0x2000 /* Support DTR Toggle */
-#define DIGI_422 0x4000 /* for 422/232 selectable panel */
#define DIGI_RTS_TOGGLE 0x8000 /* Support RTS Toggle */
-
-/************************************************************************
- * These options are not supported on the comxi.
- ************************************************************************/
-#define DIGI_COMXI (DIGI_FAST|DIGI_COOK|DSRPACE|DCDPACE|DTRPACE)
-
#define DIGI_PLEN 28 /* String length */
#define DIGI_TSIZ 10 /* Terminal string len */
char digi_term[DIGI_TSIZ]; /* terminal string */
};
-/************************************************************************
- * KME definitions and structures.
- ************************************************************************/
-#define RW_IDLE 0 /* Operation complete */
-#define RW_READ 1 /* Read Concentrator Memory */
-#define RW_WRITE 2 /* Write Concentrator Memory */
-
-struct rw_t {
- unsigned char rw_req; /* Request type */
- unsigned char rw_board; /* Host Adapter board number */
- unsigned char rw_conc; /* Concentrator number */
- unsigned char rw_reserved; /* Reserved for expansion */
- unsigned int rw_addr; /* Address in concentrator */
- unsigned short rw_size; /* Read/write request length */
- unsigned char rw_data[128]; /* Data to read/write */
-};
-
-/***********************************************************************
- * Shrink Buffer and Board Information definitions and structures.
-
- ************************************************************************/
- /* Board type return codes */
-#define PCXI_TYPE 1 /* Board type at the designated port is a PC/Xi */
-#define PCXM_TYPE 2 /* Board type at the designated port is a PC/Xm */
-#define PCXE_TYPE 3 /* Board type at the designated port is a PC/Xe */
-#define MCXI_TYPE 4 /* Board type at the designated port is a MC/Xi */
-#define COMXI_TYPE 5 /* Board type at the designated port is a COM/Xi */
-
- /* Non-Zero Result codes. */
-#define RESULT_NOBDFND 1 /* A Digi product at that port is not config installed */
-#define RESULT_NODESCT 2 /* A memory descriptor was not obtainable */
-#define RESULT_NOOSSIG 3 /* FEP/OS signature was not detected on the board */
-#define RESULT_TOOSML 4 /* Too small an area to shrink. */
-#define RESULT_NOCHAN 5 /* Channel structure for the board was not found */
-
-struct shrink_buf_struct {
- unsigned int shrink_buf_vaddr; /* Virtual address of board */
- unsigned int shrink_buf_phys; /* Physical address of board */
- unsigned int shrink_buf_bseg; /* Amount of board memory */
- unsigned int shrink_buf_hseg; /* '186 Beginning of Dual-Port */
-
- unsigned int shrink_buf_lseg; /* '186 Beginning of freed memory */
- unsigned int shrink_buf_mseg; /* Linear address from start of
- dual-port were freed memory
- begins, host viewpoint. */
-
- unsigned int shrink_buf_bdparam; /* Parameter for xxmemon and
- xxmemoff */
-
- unsigned int shrink_buf_reserva; /* Reserved */
- unsigned int shrink_buf_reservb; /* Reserved */
- unsigned int shrink_buf_reservc; /* Reserved */
- unsigned int shrink_buf_reservd; /* Reserved */
-
- unsigned char shrink_buf_result; /* Reason for call failing
- Zero is Good return */
- unsigned char shrink_buf_init; /* Non-Zero if it caused an
- xxinit call. */
-
- unsigned char shrink_buf_anports; /* Number of async ports */
- unsigned char shrink_buf_snports; /* Number of sync ports */
- unsigned char shrink_buf_type; /* Board type 1 = PC/Xi,
- 2 = PC/Xm,
- 3 = PC/Xe
- 4 = MC/Xi
- 5 = COMX/i */
- unsigned char shrink_buf_card; /* Card number */
-
-};
-
/************************************************************************
* Structure to get driver status information
************************************************************************/
#define DIGI_GETBD (('d'<<8) | 249) /* get board info */
-struct digi_stat {
- unsigned int info_chan; /* Channel number (0 based) */
- unsigned int info_brd; /* Board number (0 based) */
- unsigned int info_cflag; /* cflag for channel */
- unsigned int info_iflag; /* iflag for channel */
- unsigned int info_oflag; /* oflag for channel */
- unsigned int info_mstat; /* mstat for channel */
- unsigned int info_tx_data; /* tx_data for channel */
- unsigned int info_rx_data; /* rx_data for channel */
- unsigned int info_hflow; /* hflow for channel */
- unsigned int info_reserved[8]; /* for future expansion */
-};
-
-#define DIGI_GETSTAT (('d'<<8) | 244) /* get board info */
-/************************************************************************
- *
- * Structure used with ioctl commands for per-channel information
- *
- ************************************************************************/
-struct digi_ch {
- unsigned int info_bdnum; /* Board number (0 based) */
- unsigned int info_channel; /* Channel index number */
- unsigned int info_ch_cflag; /* Channel cflag */
- unsigned int info_ch_iflag; /* Channel iflag */
- unsigned int info_ch_oflag; /* Channel oflag */
- unsigned int info_chsize; /* Channel structure size */
- unsigned int info_sleep_stat; /* sleep status */
- dev_t info_dev; /* device number */
- unsigned char info_initstate; /* Channel init state */
- unsigned char info_running; /* Channel running state */
- int reserved[8]; /* reserved for future use */
-};
-
-/*
-* This structure is used with the DIGI_FEPCMD ioctl to
-* tell the driver which port to send the command for.
-*/
-struct digi_cmd {
- int cmd;
- int word;
- int ncmds;
- int chan; /* channel index (zero based) */
- int bdid; /* board index (zero based) */
-};
-
-
struct digi_getbuffer /* Struct for holding buffer use counts */
{
unsigned long tIn;
unsigned long tbytes; /* number of bytes transmitted fully */
};
-/*
-* info_sleep_stat defines
-*/
-#define INFO_RUNWAIT 0x0001
-#define INFO_WOPEN 0x0002
-#define INFO_TTIOW 0x0004
-#define INFO_CH_RWAIT 0x0008
-#define INFO_CH_WEMPTY 0x0010
-#define INFO_CH_WLOW 0x0020
-#define INFO_XXBUF_BUSY 0x0040
-
-#define DIGI_GETCH (('d'<<8) | 245) /* get board info */
-
-/* Board type definitions */
-
-#define SUBTYPE 0007
-#define T_PCXI 0000
-#define T_PCXM 0001
-#define T_PCXE 0002
-#define T_PCXR 0003
-#define T_SP 0004
-#define T_SP_PLUS 0005
-# define T_HERC 0000
-# define T_HOU 0001
-# define T_LON 0002
-# define T_CHA 0003
-#define FAMILY 0070
-#define T_COMXI 0000
-#define T_PCXX 0010
-#define T_CX 0020
-#define T_EPC 0030
-#define T_PCLITE 0040
-#define T_SPXX 0050
-#define T_AVXX 0060
-#define T_DXB 0070
-#define T_A2K_4_8 0070
-#define BUSTYPE 0700
-#define T_ISABUS 0000
-#define T_MCBUS 0100
-#define T_EISABUS 0200
-#define T_PCIBUS 0400
-
/* Board State Definitions */
-
#define BD_RUNNING 0x0
-#define BD_REASON 0x7f
-#define BD_NOTFOUND 0x1
-#define BD_NOIOPORT 0x2
-#define BD_NOMEM 0x3
-#define BD_NOBIOS 0x4
#define BD_NOFEP 0x5
-#define BD_FAILED 0x6
-#define BD_ALLOCATED 0x7
-#define BD_TRIBOOT 0x8
-#define BD_BADKME 0x80
-
-#define DIGI_SPOLL (('d'<<8) | 254) /* change poller rate */
#define DIGI_SETCUSTOMBAUD _IOW('e', 106, int) /* Set integer baud rate */
#define DIGI_GETCUSTOMBAUD _IOR('e', 107, int) /* Get integer baud rate */
#define EV_OPU 0x0001 /* !<Output paused by client */
#define EV_OPS 0x0002 /* !<Output paused by reqular sw flowctrl */
-#define EV_OPX 0x0004 /* !<Output paused by extra sw flowctrl */
-#define EV_OPH 0x0008 /* !<Output paused by hw flowctrl */
-#define EV_OPT 0x0800 /* !<Output paused for RTS Toggle predelay */
-
#define EV_IPU 0x0010 /* !<Input paused unconditionally by user */
#define EV_IPS 0x0020 /* !<Input paused by high/low water marks */
-#define EV_IPA 0x0400 /* !<Input paused by pattern alarm module */
-
#define EV_TXB 0x0040 /* !<Transmit break pending */
-#define EV_TXI 0x0080 /* !<Transmit immediate pending */
-#define EV_TXF 0x0100 /* !<Transmit flowctrl char pending */
-#define EV_RXB 0x0200 /* !<Break received */
-#define EV_OPALL 0x080f /* !<Output pause flags */
-#define EV_IPALL 0x0430 /* !<Input pause flags */
+/*
+ * This structure holds data needed for the intelligent <--> nonintelligent
+ * DPA translation
+ */
+struct ni_info {
+ int board;
+ int channel;
+ int dtr;
+ int rts;
+ int cts;
+ int dsr;
+ int ri;
+ int dcd;
+ int curtx;
+ int currx;
+ unsigned short iflag;
+ unsigned short oflag;
+ unsigned short cflag;
+ unsigned short lflag;
+ unsigned int mstat;
+ unsigned char hflow;
+ unsigned char xmit_stopped;
+ unsigned char recv_stopped;
+ unsigned int baud;
+};
+
+#define T_CLASSIC 0002
+#define T_PCIBUS 0400
+#define T_NEO_EXPRESS 0001
+#define T_NEO 0000
+#define TTY_FLIPBUF_SIZE 512
#endif /* DIGI_H */
+++ /dev/null
-/*
- * Copyright 2003 Digi International (www.digi.com)
- * Scott H Kilau <Scott_Kilau at digi dot com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
- * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
- * PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
- */
-
-
-/*
- * This structure holds data needed for the intelligent <--> nonintelligent
- * DPA translation
- */
-struct ni_info {
- int board;
- int channel;
- int dtr;
- int rts;
- int cts;
- int dsr;
- int ri;
- int dcd;
- int curtx;
- int currx;
- unsigned short iflag;
- unsigned short oflag;
- unsigned short cflag;
- unsigned short lflag;
-
- unsigned int mstat;
- unsigned char hflow;
-
- unsigned char xmit_stopped;
- unsigned char recv_stopped;
-
- unsigned int baud;
-};
-
-#define RW_READ 1
-#define RW_WRITE 2
-#define DIGI_KME (('e'<<8) | 98) /* Read/Write Host */
-
-#define SUBTYPE 0007
-#define T_PCXI 0000
-#define T_PCXEM 0001
-#define T_PCXE 0002
-#define T_PCXR 0003
-#define T_SP 0004
-#define T_SP_PLUS 0005
-
-#define T_HERC 0000
-#define T_HOU 0001
-#define T_LON 0002
-#define T_CHA 0003
-
-#define T_NEO 0000
-#define T_NEO_EXPRESS 0001
-#define T_CLASSIC 0002
-
-#define FAMILY 0070
-#define T_COMXI 0000
-#define T_NI 0000
-#define T_PCXX 0010
-#define T_CX 0020
-#define T_EPC 0030
-#define T_PCLITE 0040
-#define T_SPXX 0050
-#define T_AVXX 0060
-#define T_DXB 0070
-#define T_A2K_4_8 0070
-
-#define BUSTYPE 0700
-#define T_ISABUS 0000
-#define T_MCBUS 0100
-#define T_EISABUS 0200
-#define T_PCIBUS 0400
-
-/* Board State Definitions */
-
-#define BD_RUNNING 0x0
-#define BD_REASON 0x7f
-#define BD_NOTFOUND 0x1
-#define BD_NOIOPORT 0x2
-#define BD_NOMEM 0x3
-#define BD_NOBIOS 0x4
-#define BD_NOFEP 0x5
-#define BD_FAILED 0x6
-#define BD_ALLOCATED 0x7
-#define BD_TRIBOOT 0x8
-#define BD_BADKME 0x80
-
-#define DIGI_AIXON 0x0400 /* Aux flow control in fep */
-
-/* Ioctls needed for dpa operation */
-
-#define DIGI_GETDD (('d'<<8) | 248) /* get driver info */
-#define DIGI_GETBD (('d'<<8) | 249) /* get board info */
-#define DIGI_GET_NI_INFO (('d'<<8) | 250) /* nonintelligent state snfo */
-
-/* Other special ioctls */
-#define DIGI_TIMERIRQ (('d'<<8) | 251) /* Enable/disable RS_TIMER use */
-#define DIGI_LOOPBACK (('d'<<8) | 252) /* Enable/disable UART internal loopback */
pr_info("=== %s()\n", __func__);
if (udc == NULL) {
- ERR("%s udc == NULL\n", __func__);
+ pr_err("%s udc == NULL\n", __func__);
return;
}
u32 num, buf_type;
u32 data, last_ram_adr, use_ram_size;
- PT_EP_REGS p_ep_regs;
+ struct ep_regs *p_ep_regs;
last_ram_adr = (D_RAM_SIZE_CTRL / sizeof(u32)) * 2;
use_ram_size = 0;
{
u32 num;
u32 data;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (udc->vbus_active == 0)
return; /* VBUS OFF */
/* Abort DMA */
static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
{
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
_nbu2ss_bitclr(&preg->EP_DCR[ep->epnum-1].EP_DCR1, DCR1_EPn_REQEN);
mdelay(DMA_DISABLE_TIME); /* DCR1_EPn_REQEN Clear */
{
u32 data;
u32 num;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (length >= sizeof(u32))
return;
u32 i;
int nret = 0;
u32 iWordLength = 0;
- USB_REG_ACCESS *pBuf32 = (USB_REG_ACCESS *)pBuf;
+ union usb_reg_access *pBuf32 = (union usb_reg_access *)pBuf;
/*------------------------------------------------------------*/
/* Read Length */
{
u32 i;
u32 iReadSize = 0;
- USB_REG_ACCESS Temp32;
- USB_REG_ACCESS *pBuf32 = (USB_REG_ACCESS *)pBuf;
+ union usb_reg_access Temp32;
+ union usb_reg_access *pBuf32 = (union usb_reg_access *)pBuf;
if ((0 < length) && (length < sizeof(u32))) {
Temp32.dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
u32 iMaxLength = EP0_PACKETSIZE;
u32 iWordLength = 0;
u32 iWriteLength = 0;
- USB_REG_ACCESS *pBuf32 = (USB_REG_ACCESS *)pBuf;
+ union usb_reg_access *pBuf32 = (union usb_reg_access *)pBuf;
/*------------------------------------------------------------*/
/* Transfer Length */
static int EP0_in_OverBytes(struct nbu2ss_udc *udc, u8 *pBuf, u32 iRemainSize)
{
u32 i;
- USB_REG_ACCESS Temp32;
- USB_REG_ACCESS *pBuf32 = (USB_REG_ACCESS *)pBuf;
+ union usb_reg_access Temp32;
+ union usb_reg_access *pBuf32 = (union usb_reg_access *)pBuf;
if ((0 < iRemainSize) && (iRemainSize < sizeof(u32))) {
for (i = 0 ; i < iRemainSize ; i++)
return 0; /* Short Packet Transfer End */
if (req->req.actual > req->req.length) {
- ERR(" *** Overrun Error\n");
+ dev_err(udc->dev, " *** Overrun Error\n");
return -EOVERFLOW;
}
u32 burst = 1;
u32 data;
int result = -EINVAL;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (req->dma_flag)
return 1; /* DMA is forwarded */
u32 i;
u32 data;
u32 iWordLength;
- USB_REG_ACCESS Temp32;
- USB_REG_ACCESS *pBuf32;
+ union usb_reg_access Temp32;
+ union usb_reg_access *pBuf32;
int result = 0;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (req->dma_flag)
return 1; /* DMA is forwarded */
return 0;
pBuffer = (u8 *)req->req.buf;
- pBuf32 = (USB_REG_ACCESS *)(pBuffer + req->req.actual);
+ pBuf32 = (union usb_reg_access *)(pBuffer + req->req.actual);
iWordLength = length / sizeof(u32);
if (iWordLength > 0) {
u32 num;
u32 iRecvLength;
int result = 1;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (ep->epnum == 0)
return -EINVAL;
}
if (req->req.actual > req->req.length) {
- ERR(" *** Overrun Error\n");
- ERR(" *** actual = %d, length = %d\n",
+ dev_err(udc->dev, " Overrun Error\n");
+ dev_err(udc->dev, " actual = %d, length = %d\n",
req->req.actual, req->req.length);
result = -EOVERFLOW;
}
u32 iWriteLength;
u32 data;
int result = -EINVAL;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (req->dma_flag)
return 1; /* DMA is forwarded */
u32 i;
u32 data;
u32 iWordLength;
- USB_REG_ACCESS Temp32;
- USB_REG_ACCESS *pBuf32 = NULL;
+ union usb_reg_access Temp32;
+ union usb_reg_access *pBuf32 = NULL;
int result = 0;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (req->dma_flag)
return 1; /* DMA is forwarded */
if (length > 0) {
pBuffer = (u8 *)req->req.buf;
- pBuf32 = (USB_REG_ACCESS *)(pBuffer + req->req.actual);
+ pBuf32 = (union usb_reg_access *)(pBuffer + req->req.actual);
iWordLength = length / sizeof(u32);
if (iWordLength > 0) {
u8 num, epnum;
u32 data;
struct nbu2ss_ep *ep;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if ((ep_adrs == 0) || (ep_adrs == 0x80)) {
if (bstall) {
if (mode > MAX_TEST_MODE_NUM)
return;
- pr_info("SET FEATURE : test mode = %d\n", mode);
+ dev_info(udc->dev, "SET FEATURE : test mode = %d\n", mode);
data = _nbu2ss_readl(&udc->p_regs->USB_CONTROL);
data &= ~TEST_FORCE_ENABLE;
break;
case USB_DEVICE_TEST_MODE:
- wIndex = wIndex >> 8;
+ wIndex >>= 8;
if (wIndex <= MAX_TEST_MODE_NUM)
result = 0;
break;
{
u8 epnum;
u32 data = 0, bit_data;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
epnum = ep_adrs & ~USB_ENDPOINT_DIR_MASK;
if (epnum == 0) {
u32 regdata;
int limit_cnt = 0;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (ep->direct == USB_DIR_IN) {
for (limit_cnt = 0
_nbu2ss_ep0_in_transfer(udc, &udc->ep[0], &udc->ep0_req);
} else {
- ERR("*** Error GET_STATUS\n");
+ dev_err(udc->dev, " Error GET_STATUS\n");
}
return result;
if (wValue != (wValue & 0x007F))
return -EINVAL;
- wValue = wValue << USB_ADRS_SHIFT;
+ wValue <<= USB_ADRS_SHIFT;
_nbu2ss_writel(&udc->p_regs->USB_ADDRESS, wValue);
_nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
| STG_END_INT | EP0_OUT_NULL_INT);
if (status == 0) {
- pr_info("--- %s Not Decode Interrupt\n", __func__);
- pr_info("--- EP0_STATUS = 0x%08x\n", intr);
+ dev_info(udc->dev, "%s Not Decode Interrupt\n", __func__);
+ dev_info(udc->dev, "EP0_STATUS = 0x%08x\n", intr);
return;
}
int result = 0;
u32 status;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (req->dma_flag)
return; /* DMA is forwarded */
u32 num;
u32 dmacnt, ep_dmacnt;
u32 mpkt;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
num = ep->epnum - 1;
return 0;
/* called with irqs blocked */
- while (!list_empty(&ep->queue)) {
- req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
+ list_for_each_entry(req, &ep->queue, queue) {
_nbu2ss_ep_done(ep, req, status);
}
{
u32 reg_dt;
- if (!udc) {
- ERR("%s, bad param\n", __func__);
- return -EINVAL;
- }
-
if (udc->vbus_active == 0)
return -ESHUTDOWN;
/*-------------------------------------------------------------------------*/
static void _nbu2ss_fifo_flush(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
{
- PT_FC_REGS p = udc->p_regs;
+ struct fc_regs *p = udc->p_regs;
if (udc->vbus_active == 0)
return;
waitcnt++;
udelay(1); /* 1us wait */
if (waitcnt == EPC_PLL_LOCK_COUNT) {
- ERR("*** Reset Cancel failed\n");
+ dev_err(udc->dev, "*** Reset Cancel failed\n");
return -EINVAL;
}
};
udc->linux_suspended = 0;
_nbu2ss_reset_controller(udc);
- pr_info(" ----- VBUS OFF\n");
+ dev_info(udc->dev, " ----- VBUS OFF\n");
if (udc->vbus_active == 1) {
/* VBUS OFF */
if (reg_dt == 0)
return;
- pr_info(" ----- VBUS ON\n");
+ dev_info(udc->dev, " ----- VBUS ON\n");
if (udc->linux_suspended)
return;
u32 epnum, int_bit;
struct nbu2ss_udc *udc = (struct nbu2ss_udc *)_udc;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (gpio_get_value(VBUS_VALUE) == 0) {
_nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
struct nbu2ss_udc *udc;
if ((_ep == NULL) || (desc == NULL)) {
- ERR(" *** %s, bad param\n", __func__);
+ pr_err(" *** %s, bad param\n", __func__);
return -EINVAL;
}
ep = container_of(_ep, struct nbu2ss_ep, ep);
if ((ep == NULL) || (ep->udc == NULL)) {
- ERR(" *** %s, ep == NULL !!\n", __func__);
+ pr_err(" *** %s, ep == NULL !!\n", __func__);
return -EINVAL;
}
if ((ep_type == USB_ENDPOINT_XFER_CONTROL)
|| (ep_type == USB_ENDPOINT_XFER_ISOC)) {
- ERR(" *** %s, bat bmAttributes\n", __func__);
+ pr_err(" *** %s, bat bmAttributes\n", __func__);
return -EINVAL;
}
if ((udc->driver == NULL)
|| (udc->gadget.speed == USB_SPEED_UNKNOWN)) {
- ERR(" *** %s, udc !!\n", __func__);
+ dev_err(ep->udc->dev, " *** %s, udc !!\n", __func__);
return -ESHUTDOWN;
}
unsigned long flags;
if (_ep == NULL) {
- ERR(" *** %s, bad param\n", __func__);
+ pr_err(" *** %s, bad param\n", __func__);
return -EINVAL;
}
ep = container_of(_ep, struct nbu2ss_ep, ep);
if ((ep == NULL) || (ep->udc == NULL)) {
- ERR(" *** %s, ep == NULL !!\n", __func__);
+ pr_err("udc: *** %s, ep == NULL !!\n", __func__);
return -EINVAL;
}
/* catch various bogus parameters */
if ((_ep == NULL) || (_req == NULL)) {
if (_ep == NULL)
- ERR("*** %s --- _ep == NULL\n", __func__);
+ pr_err("udc: %s --- _ep == NULL\n", __func__);
if (_req == NULL)
- ERR("*** %s --- _req == NULL\n", __func__);
+ pr_err("udc: %s --- _req == NULL\n", __func__);
return -EINVAL;
}
|| !list_empty(&req->queue))) {
if (!_req->complete)
- ERR("*** %s --- !_req->complete\n", __func__);
+ pr_err("udc: %s --- !_req->complete\n", __func__);
if (!_req->buf)
- ERR("*** %s --- !_req->buf\n", __func__);
+ pr_err("udc:%s --- !_req->buf\n", __func__);
if (!list_empty(&req->queue))
- ERR("*** %s --- !list_empty(&req->queue)\n", __func__);
+ pr_err("%s --- !list_empty(&req->queue)\n", __func__);
return -EINVAL;
}
/* INFO("=== %s(ep%d), zero=%d\n", __func__, ep->epnum, _req->zero); */
if (udc->vbus_active == 0) {
- pr_info("Can't ep_queue (VBUS OFF)\n");
+ dev_info(udc->dev, "Can't ep_queue (VBUS OFF)\n");
return -ESHUTDOWN;
}
if (unlikely(!udc->driver)) {
- ERR("%s, bogus device state %p\n", __func__, udc->driver);
+ dev_err(udc->dev, "%s, bogus device state %p\n", __func__,
+ udc->driver);
return -ESHUTDOWN;
}
if (ep->virt_buf == NULL)
ep->virt_buf = (u8 *)dma_alloc_coherent(
NULL, PAGE_SIZE,
- &ep->phys_buf, GFP_KERNEL | GFP_DMA);
+ &ep->phys_buf, GFP_ATOMIC | GFP_DMA);
if (ep->epnum > 0) {
if (ep->direct == USB_DIR_IN)
memcpy(ep->virt_buf, req->req.buf,
result = _nbu2ss_start_transfer(udc, ep, req, FALSE);
if (result < 0) {
- ERR(" *** %s, result = %d\n", __func__, result);
+ dev_err(udc->dev, " *** %s, result = %d\n", __func__,
+ result);
list_del(&req->queue);
} else if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT)) {
#ifdef USE_DMA
/* catch various bogus parameters */
if ((_ep == NULL) || (_req == NULL)) {
- /* ERR("%s, bad param(1)\n", __func__); */
+ /* pr_err("%s, bad param(1)\n", __func__); */
return -EINVAL;
}
ep = container_of(_ep, struct nbu2ss_ep, ep);
if (!ep) {
- ERR("%s, ep == NULL !!\n", __func__);
+ pr_err("%s, ep == NULL !!\n", __func__);
return -EINVAL;
}
/* INFO("=== %s()\n", __func__); */
if (!_ep) {
- ERR("%s, bad param\n", __func__);
+ pr_err("%s, bad param\n", __func__);
return -EINVAL;
}
ep = container_of(_ep, struct nbu2ss_ep, ep);
if (!ep) {
- ERR("%s, bad ep\n", __func__);
+ pr_err("%s, bad ep\n", __func__);
return -EINVAL;
}
udc = ep->udc;
if (!udc) {
- ERR(" *** %s, bad udc\n", __func__);
+ dev_err(ep->udc->dev, " *** %s, bad udc\n", __func__);
return -EINVAL;
}
struct nbu2ss_ep *ep;
struct nbu2ss_udc *udc;
unsigned long flags;
- PT_FC_REGS preg;
+ struct fc_regs *preg;
/* INFO("=== %s()\n", __func__); */
if (!_ep) {
- ERR("%s, bad param\n", __func__);
+ pr_err("%s, bad param\n", __func__);
return -EINVAL;
}
ep = container_of(_ep, struct nbu2ss_ep, ep);
if (!ep) {
- ERR("%s, bad ep\n", __func__);
+ pr_err("%s, bad ep\n", __func__);
return -EINVAL;
}
udc = ep->udc;
if (!udc) {
- ERR("%s, bad udc\n", __func__);
+ dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
return -EINVAL;
}
/* INFO("=== %s()\n", __func__); */
if (!_ep) {
- ERR("%s, bad param\n", __func__);
+ pr_err("udc: %s, bad param\n", __func__);
return;
}
ep = container_of(_ep, struct nbu2ss_ep, ep);
if (!_ep) {
- ERR("%s, bad ep\n", __func__);
+ pr_err("udc: %s, bad ep\n", __func__);
return;
}
udc = ep->udc;
if (!udc) {
- ERR("%s, bad udc\n", __func__);
+ dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
return;
}
/* INFO("=== %s()\n", __func__); */
if (pgadget == NULL) {
- ERR("%s, bad param\n", __func__);
+ pr_err("udc: %s, bad param\n", __func__);
return -EINVAL;
}
udc = container_of(pgadget, struct nbu2ss_udc, gadget);
if (udc == NULL) {
- ERR("%s, udc == NULL\n", __func__);
+ dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__);
return -EINVAL;
}
/* INFO("=== %s()\n", __func__); */
if (pgadget == NULL) {
- ERR("%s, bad param\n", __func__);
+ pr_err("%s, bad param\n", __func__);
return -EINVAL;
}
udc = container_of(pgadget, struct nbu2ss_udc, gadget);
if (udc == NULL) {
- ERR("%s, udc == NULL\n", __func__);
+ dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__);
return -EINVAL;
}
data = gpio_get_value(VBUS_VALUE);
if (data == 0) {
- pr_warn("VBUS LEVEL = %d\n", data);
+ dev_warn(&pgadget->dev, "VBUS LEVEL = %d\n", data);
return -EINVAL;
}
/* INFO("=== %s()\n", __func__); */
if (pgadget == NULL) {
- ERR("%s, bad param\n", __func__);
+ pr_err("%s, bad param\n", __func__);
return -EINVAL;
}
/* INFO("=== %s()\n", __func__); */
if (pgadget == NULL) {
- ERR("%s, bad param\n", __func__);
+ pr_err("%s, bad param\n", __func__);
return -EINVAL;
}
/* INFO("=== %s()\n", __func__); */
if (pgadget == NULL) {
- ERR("%s, bad param\n", __func__);
+ pr_err("%s, bad param\n", __func__);
return -EINVAL;
}
0, driver_name, udc);
/* IO Memory */
- udc->p_regs = (PT_FC_REGS)mmio_base;
+ udc->p_regs = (struct fc_regs *)mmio_base;
/* USB Function Controller Interrupt */
if (status != 0) {
- ERR("request_irq(USB_UDC_IRQ_1) failed\n");
+ dev_err(udc->dev, "request_irq(USB_UDC_IRQ_1) failed\n");
goto cleanup1;
}
udc);
if (status != 0) {
- ERR("request_irq(INT_VBUS) failed\n");
+ dev_err(udc->dev, "request_irq(INT_VBUS) failed\n");
goto cleanup1;
}
/*===========================================================================*/
/* Struct */
-/*------- T_EP_REGS */
-typedef struct _T_EP_REGS {
+/*------- ep_regs */
+struct ep_regs {
u32 EP_CONTROL; /* EP Control */
u32 EP_STATUS; /* EP Status */
u32 EP_INT_ENA; /* EP Interrupt Enable */
u32 EP_LEN_DCNT; /* EP Length & DMA count */
u32 EP_READ; /* EP Read */
u32 EP_WRITE; /* EP Write */
-} T_EP_REGS, *PT_EP_REGS;
+};
-/*------- T_EP_DCR */
-typedef struct _T_EP_DCR {
+/*------- ep_dcr */
+struct ep_dcr {
u32 EP_DCR1; /* EP_DCR1 */
u32 EP_DCR2; /* EP_DCR2 */
u32 EP_TADR; /* EP_TADR */
u32 Reserved; /* Reserved */
-} T_EP_DCR, *PT_EP_DCR;
+};
/*------- Function Registers */
-typedef struct _T_FC_REGS {
+struct fc_regs {
u32 USB_CONTROL; /* (0x0000) USB Control */
u32 USB_STATUS; /* (0x0004) USB Status */
u32 USB_ADDRESS; /* (0x0008) USB Address */
u32 EP0_READ; /* (0x0038) EP0 Read */
u32 EP0_WRITE; /* (0x003C) EP0 Write */
- T_EP_REGS EP_REGS[REG_EP_NUM]; /* Endpoint Register */
+ struct ep_regs EP_REGS[REG_EP_NUM]; /* Endpoint Register */
u8 Reserved220[0x1000-0x220]; /* (0x0220:0x0FFF) Reserved */
u8 Reserved1028[0x110-0x28]; /* (0x1028:0x110F) Reserved */
- T_EP_DCR EP_DCR[REG_EP_NUM]; /* */
+ struct ep_dcr EP_DCR[REG_EP_NUM]; /* */
u8 Reserved1200[0x1000-0x200]; /* Reserved */
-
-} __attribute__ ((aligned(32))) T_FC_REGS, *PT_FC_REGS;
+} __aligned(32);
u32 curr_config; /* Current Configuration Number */
- PT_FC_REGS p_regs;
+ struct fc_regs *p_regs;
};
/* USB register access structure */
-typedef volatile union {
+union usb_reg_access {
struct {
unsigned char DATA[4];
} byte;
unsigned int dw;
-} USB_REG_ACCESS;
+};
/*-------------------------------------------------------------------------*/
-#define ERR(stuff...) printk(KERN_ERR "udc: " stuff)
#endif /* _LINUX_EMXX_H */
help
Generic Framebuffer support for HX8353D
+config FB_TFT_ILI9163
+ tristate "FB driver for the ILI9163 LCD Controller"
+ depends on FB_TFT
+ help
+ Generic Framebuffer support for ILI9163
+
config FB_TFT_ILI9320
tristate "FB driver for the ILI9320 LCD Controller"
depends on FB_TFT
obj-$(CONFIG_FB_TFT_HX8340BN) += fb_hx8340bn.o
obj-$(CONFIG_FB_TFT_HX8347D) += fb_hx8347d.o
obj-$(CONFIG_FB_TFT_HX8353D) += fb_hx8353d.o
+obj-$(CONFIG_FB_TFT_ILI9163) += fb_ili9163.o
obj-$(CONFIG_FB_TFT_ILI9320) += fb_ili9320.o
obj-$(CONFIG_FB_TFT_ILI9325) += fb_ili9325.o
obj-$(CONFIG_FB_TFT_ILI9340) += fb_ili9340.o
INSTALLATION
Download kernel sources
- From Linux 3.15
+ From Linux 3.15
cd drivers/video/fbdev/fbtft
git clone https://github.com/notro/fbtft.git
-
+
Add to drivers/video/fbdev/Kconfig: source "drivers/video/fbdev/fbtft/Kconfig"
Add to drivers/video/fbdev/Makefile: obj-y += fbtft/
-
- Before Linux 3.15
+
+ Before Linux 3.15
cd drivers/video
git clone https://github.com/notro/fbtft.git
-
+
Add to drivers/video/Kconfig: source "drivers/video/fbtft/Kconfig"
Add to drivers/video/Makefile: obj-y += fbtft/
-
+
Enable driver(s) in menuconfig and build the kernel
/* This function oses to enter commands
* first byte - destination controller 0 or 1
- * folowing - commands
+ * following - commands
*/
static void write_reg8_bus8(struct fbtft_par *par, int len, ...)
{
if (*buf > 1) {
va_end(args);
- dev_err(par->info->device, "%s: Incorrect chip sellect request (%d)\n",
- __func__, *buf);
+ dev_err(par->info->device,
+ "Incorrect chip select request (%d)\n", *buf);
return;
}
ret = par->fbtftops.write(par, par->buf, len * (sizeof(u8)));
if (ret < 0) {
va_end(args);
- dev_err(par->info->device, "%s: write() failed and returned %d\n",
- __func__, ret);
+ dev_err(par->info->device,
+ "write() failed and returned %d\n", ret);
return;
}
}
int x, y;
int ret = 0;
- /* buffer to convert RGB565 -> grayscale16 -> Ditherd image 1bpp */
+ /* buffer to convert RGB565 -> grayscale16 -> Dithered image 1bpp */
signed short *convert_buf = kmalloc(par->info->var.xres *
par->info->var.yres * sizeof(signed short), GFP_NOIO);
+ if (!convert_buf)
+ return -ENOMEM;
+
fbtft_par_dbg(DEBUG_WRITE_VMEM, par, "%s()\n", __func__);
/* converting to grayscale16 */
ret = par->fbtftops.write(par, buf, len);
if (ret < 0)
dev_err(par->info->device,
- "%s: write failed and returned: %d\n",
- __func__, ret);
+ "write failed and returned: %d\n",
+ ret);
}
/* right half of display */
if (addr_win.xe >= par->info->var.xres / 2) {
/* select right side (sc1)
* set addr
*/
- write_reg(par, 0x01, (1 << 6));
+ write_reg(par, 0x01, 1 << 6);
write_reg(par, 0x01, (0x17 << 3) | (u8)y);
/* write bitmap */
par->fbtftops.write(par, buf, len);
if (ret < 0)
dev_err(par->info->device,
- "%s: write failed and returned: %d\n",
- __func__, ret);
+ "write failed and returned: %d\n",
+ ret);
}
}
kfree(convert_buf);
/* Initialization sequence from Lib_UTFT */
/* oscillator start */
- write_reg(par, 0x000,0x0001); /*oscillator 0: stop, 1: operation */
+ write_reg(par, 0x000, 0x0001); /*oscillator 0: stop, 1: operation */
mdelay(10);
/* Power settings */
- write_reg(par, 0x100, 0x0000 ); /* power supply setup */
- write_reg(par, 0x101, 0x0000 );
- write_reg(par, 0x102, 0x3110 );
- write_reg(par, 0x103, 0xe200 );
- write_reg(par, 0x110, 0x009d );
- write_reg(par, 0x111, 0x0022 );
- write_reg(par, 0x100, 0x0120 );
- mdelay( 20 );
-
- write_reg(par, 0x100, 0x3120 );
- mdelay( 80 );
+ write_reg(par, 0x100, 0x0000); /* power supply setup */
+ write_reg(par, 0x101, 0x0000);
+ write_reg(par, 0x102, 0x3110);
+ write_reg(par, 0x103, 0xe200);
+ write_reg(par, 0x110, 0x009d);
+ write_reg(par, 0x111, 0x0022);
+ write_reg(par, 0x100, 0x0120);
+ mdelay(20);
+
+ write_reg(par, 0x100, 0x3120);
+ mdelay(80);
/* Display control */
- write_reg(par, 0x001, 0x0100 );
- write_reg(par, 0x002, 0x0000 );
- write_reg(par, 0x003, 0x1230 );
- write_reg(par, 0x006, 0x0000 );
- write_reg(par, 0x007, 0x0101 );
- write_reg(par, 0x008, 0x0808 );
- write_reg(par, 0x009, 0x0000 );
- write_reg(par, 0x00b, 0x0000 );
- write_reg(par, 0x00c, 0x0000 );
- write_reg(par, 0x00d, 0x0018 );
+ write_reg(par, 0x001, 0x0100);
+ write_reg(par, 0x002, 0x0000);
+ write_reg(par, 0x003, 0x1230);
+ write_reg(par, 0x006, 0x0000);
+ write_reg(par, 0x007, 0x0101);
+ write_reg(par, 0x008, 0x0808);
+ write_reg(par, 0x009, 0x0000);
+ write_reg(par, 0x00b, 0x0000);
+ write_reg(par, 0x00c, 0x0000);
+ write_reg(par, 0x00d, 0x0018);
/* LTPS control settings */
- write_reg(par, 0x012, 0x0000 );
- write_reg(par, 0x013, 0x0000 );
- write_reg(par, 0x018, 0x0000 );
- write_reg(par, 0x019, 0x0000 );
-
- write_reg(par, 0x203, 0x0000 );
- write_reg(par, 0x204, 0x0000 );
-
- write_reg(par, 0x210, 0x0000 );
- write_reg(par, 0x211, 0x00ef );
- write_reg(par, 0x212, 0x0000 );
- write_reg(par, 0x213, 0x013f );
- write_reg(par, 0x214, 0x0000 );
- write_reg(par, 0x215, 0x0000 );
- write_reg(par, 0x216, 0x0000 );
- write_reg(par, 0x217, 0x0000 );
+ write_reg(par, 0x012, 0x0000);
+ write_reg(par, 0x013, 0x0000);
+ write_reg(par, 0x018, 0x0000);
+ write_reg(par, 0x019, 0x0000);
+
+ write_reg(par, 0x203, 0x0000);
+ write_reg(par, 0x204, 0x0000);
+
+ write_reg(par, 0x210, 0x0000);
+ write_reg(par, 0x211, 0x00ef);
+ write_reg(par, 0x212, 0x0000);
+ write_reg(par, 0x213, 0x013f);
+ write_reg(par, 0x214, 0x0000);
+ write_reg(par, 0x215, 0x0000);
+ write_reg(par, 0x216, 0x0000);
+ write_reg(par, 0x217, 0x0000);
/* Gray scale settings */
write_reg(par, 0x300, 0x5343);
write_reg(par, 0x309, 0x050a);
/* RAM access settings */
- write_reg(par, 0x400, 0x4027 );
- write_reg(par, 0x401, 0x0000 );
- write_reg(par, 0x402, 0x0000 ); /* First screen drive position (1) */
- write_reg(par, 0x403, 0x013f ); /* First screen drive position (2) */
- write_reg(par, 0x404, 0x0000 );
-
- write_reg(par, 0x200, 0x0000 );
- write_reg(par, 0x201, 0x0000 );
- write_reg(par, 0x100, 0x7120 );
- write_reg(par, 0x007, 0x0103 );
- mdelay( 10 );
- write_reg(par, 0x007, 0x0113 );
+ write_reg(par, 0x400, 0x4027);
+ write_reg(par, 0x401, 0x0000);
+ write_reg(par, 0x402, 0x0000); /* First screen drive position (1) */
+ write_reg(par, 0x403, 0x013f); /* First screen drive position (2) */
+ write_reg(par, 0x404, 0x0000);
+
+ write_reg(par, 0x200, 0x0000);
+ write_reg(par, 0x201, 0x0000);
+ write_reg(par, 0x100, 0x7120);
+ write_reg(par, 0x007, 0x0103);
+ mdelay(10);
+ write_reg(par, 0x007, 0x0113);
return 0;
}
* This display uses 9-bit SPI: Data/Command bit + 8 data bits
* For platforms that doesn't support 9-bit, the driver is capable
* of emulating this using 8-bit transfer.
- * This is done by transfering eight 9-bit words in 9 bytes.
+ * This is done by transferring eight 9-bit words in 9 bytes.
*
* Copyright (C) 2013 Noralf Tronnes
*
static int init_display(struct fbtft_par *par)
{
- fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
-
par->fbtftops.reset(par);
/* BTL221722-276L startup sequence, from datasheet */
return 0;
}
-void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
+static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
{
- fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par,
- "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", __func__, xs, ys, xe, ye);
-
write_reg(par, FBTFT_CASET, 0x00, xs, 0x00, xe);
write_reg(par, FBTFT_RASET, 0x00, ys, 0x00, ye);
write_reg(par, FBTFT_RAMWR);
static int set_var(struct fbtft_par *par)
{
- fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
-
/* MADCTL - Memory data access control */
/* RGB/BGR can be set with H/W pin SRGB and MADCTL BGR bit */
#define MY (1 << 7)
#define MV (1 << 5)
switch (par->info->var.rotate) {
case 0:
- write_reg(par, 0x36, (par->bgr << 3));
+ write_reg(par, 0x36, par->bgr << 3);
break;
case 270:
write_reg(par, 0x36, MX | MV | (par->bgr << 3));
static int set_gamma(struct fbtft_par *par, unsigned long *curves)
{
unsigned long mask[] = {
- 0b1111, 0b1111, 0b11111, 0b1111, 0b1111, 0b1111, 0b11111,
- 0b111, 0b111, 0b111, 0b111, 0b111, 0b111, 0b11, 0b11,
- 0b1111, 0b1111, 0b11111, 0b1111, 0b1111, 0b1111, 0b11111,
- 0b111, 0b111, 0b111, 0b111, 0b111, 0b111, 0b0, 0b0 };
+ 0x0f, 0x0f, 0x1f, 0x0f, 0x0f, 0x0f, 0x1f, 0x07, 0x07, 0x07,
+ 0x07, 0x07, 0x07, 0x03, 0x03, 0x0f, 0x0f, 0x1f, 0x0f, 0x0f,
+ 0x0f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x00, 0x00,
+ };
int i, j;
- fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
-
/* apply mask */
for (i = 0; i < par->gamma.num_curves; i++)
for (j = 0; j < par->gamma.num_values; j++)
static int set_gamma(struct fbtft_par *par, unsigned long *curves)
{
unsigned long mask[] = {
- 0b111111, 0b111111, 0b111111, 0b111111, 0b111111, 0b111111,
- 0b1111111, 0b1111111,
- 0b11111, 0b11111, 0b11111, 0b11111, 0b11111,
- 0b1111};
+ 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x7f, 0x7f, 0x1f, 0x1f,
+ 0x1f, 0x1f, 0x1f, 0x0f,
+ };
int i, j;
int acc = 0;
/* column address */
write_reg(par, 0x2a, xs >> 8, xs & 0xff, xe >> 8, xe & 0xff);
- /* row adress */
+ /* Row address */
write_reg(par, 0x2b, ys >> 8, ys & 0xff, ye >> 8, ye & 0xff);
/* memory write */
write_reg(par, 0x36, my | mv | (par->bgr << 3));
break;
case 180:
- write_reg(par, 0x36, (par->bgr << 3));
+ write_reg(par, 0x36, par->bgr << 3);
break;
case 90:
write_reg(par, 0x36, mx | mv | (par->bgr << 3));
--- /dev/null
+/*
+ * FB driver for the ILI9163 LCD Controller
+ *
+ * Copyright (C) 2015 Kozhevnikov Anatoly
+ *
+ * Based on ili9325.c by Noralf Tronnes and
+ * .S.U.M.O.T.O.Y. by Max MC Costa (https://github.com/sumotoy/TFT_ILI9163C).
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+
+#include "fbtft.h"
+
+#define DRVNAME "fb_ili9163"
+#define WIDTH 128
+#define HEIGHT 128
+#define BPP 16
+#define FPS 30
+
+#ifdef GAMMA_ADJ
+#define GAMMA_LEN 15
+#define GAMMA_NUM 1
+#define DEFAULT_GAMMA "36 29 12 22 1C 15 42 B7 2F 13 12 0A 11 0B 06\n"
+#endif
+
+/* ILI9163C commands */
+#define CMD_NOP 0x00 /* Non operation*/
+#define CMD_SWRESET 0x01 /* Soft Reset */
+#define CMD_SLPIN 0x10 /* Sleep ON */
+#define CMD_SLPOUT 0x11 /* Sleep OFF */
+#define CMD_PTLON 0x12 /* Partial Mode ON */
+#define CMD_NORML 0x13 /* Normal Display ON */
+#define CMD_DINVOF 0x20 /* Display Inversion OFF */
+#define CMD_DINVON 0x21 /* Display Inversion ON */
+#define CMD_GAMMASET 0x26 /* Gamma Set (0x01[1],0x02[2],0x04[3],0x08[4]) */
+#define CMD_DISPOFF 0x28 /* Display OFF */
+#define CMD_DISPON 0x29 /* Display ON */
+#define CMD_IDLEON 0x39 /* Idle Mode ON */
+#define CMD_IDLEOF 0x38 /* Idle Mode OFF */
+#define CMD_CLMADRS 0x2A /* Column Address Set */
+#define CMD_PGEADRS 0x2B /* Page Address Set */
+
+#define CMD_RAMWR 0x2C /* Memory Write */
+#define CMD_RAMRD 0x2E /* Memory Read */
+#define CMD_CLRSPACE 0x2D /* Color Space : 4K/65K/262K */
+#define CMD_PARTAREA 0x30 /* Partial Area */
+#define CMD_VSCLLDEF 0x33 /* Vertical Scroll Definition */
+#define CMD_TEFXLON 0x34 /* Tearing Effect Line ON */
+#define CMD_TEFXLOF 0x35 /* Tearing Effect Line OFF */
+#define CMD_MADCTL 0x36 /* Memory Access Control */
+
+#define CMD_PIXFMT 0x3A /* Interface Pixel Format */
+#define CMD_FRMCTR1 0xB1 /* Frame Rate Control
+ (In normal mode/Full colors) */
+#define CMD_FRMCTR2 0xB2 /* Frame Rate Control (In Idle mode/8-colors) */
+#define CMD_FRMCTR3 0xB3 /* Frame Rate Control
+ (In Partial mode/full colors) */
+#define CMD_DINVCTR 0xB4 /* Display Inversion Control */
+#define CMD_RGBBLK 0xB5 /* RGB Interface Blanking Porch setting */
+#define CMD_DFUNCTR 0xB6 /* Display Function set 5 */
+#define CMD_SDRVDIR 0xB7 /* Source Driver Direction Control */
+#define CMD_GDRVDIR 0xB8 /* Gate Driver Direction Control */
+
+#define CMD_PWCTR1 0xC0 /* Power_Control1 */
+#define CMD_PWCTR2 0xC1 /* Power_Control2 */
+#define CMD_PWCTR3 0xC2 /* Power_Control3 */
+#define CMD_PWCTR4 0xC3 /* Power_Control4 */
+#define CMD_PWCTR5 0xC4 /* Power_Control5 */
+#define CMD_VCOMCTR1 0xC5 /* VCOM_Control 1 */
+#define CMD_VCOMCTR2 0xC6 /* VCOM_Control 2 */
+#define CMD_VCOMOFFS 0xC7 /* VCOM Offset Control */
+#define CMD_PGAMMAC 0xE0 /* Positive Gamma Correction Setting */
+#define CMD_NGAMMAC 0xE1 /* Negative Gamma Correction Setting */
+#define CMD_GAMRSEL 0xF2 /* GAM_R_SEL */
+
+/*
+This display:
+http://www.ebay.com/itm/Replace-Nokia-5110-LCD-1-44-Red-Serial-128X128-SPI-Color-TFT-LCD-Display-Module-/271422122271
+This particular display has a design error! The controller has 3 pins to
+configure to constrain the memory and resolution to a fixed dimension (in
+that case 128x128) but they leaved those pins configured for 128x160 so
+there was several pixel memory addressing problems.
+I solved by setup several parameters that dinamically fix the resolution as
+needit so below the parameters for this display. If you have a strain or a
+correct display (can happen with chinese) you can copy those parameters and
+create setup for different displays.
+*/
+
+#ifdef RED
+#define __OFFSET 32 /*see note 2 - this is the red version */
+#else
+#define __OFFSET 0 /*see note 2 - this is the black version */
+#endif
+
+static int init_display(struct fbtft_par *par)
+{
+ fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
+
+ par->fbtftops.reset(par);
+
+ if (par->gpio.cs != -1)
+ gpio_set_value(par->gpio.cs, 0); /* Activate chip */
+
+ write_reg(par, CMD_SWRESET); /* software reset */
+ mdelay(500);
+ write_reg(par, CMD_SLPOUT); /* exit sleep */
+ mdelay(5);
+ write_reg(par, CMD_PIXFMT, 0x05); /* Set Color Format 16bit */
+ write_reg(par, CMD_GAMMASET, 0x02); /* default gamma curve 3 */
+#ifdef GAMMA_ADJ
+ write_reg(par, CMD_GAMRSEL, 0x01); /* Enable Gamma adj */
+#endif
+ write_reg(par, CMD_NORML);
+ write_reg(par, CMD_DFUNCTR, 0xff, 0x06);
+ /* Frame Rate Control (In normal mode/Full colors) */
+ write_reg(par, CMD_FRMCTR1, 0x08, 0x02);
+ write_reg(par, CMD_DINVCTR, 0x07); /* display inversion */
+ /* Set VRH1[4:0] & VC[2:0] for VCI1 & GVDD */
+ write_reg(par, CMD_PWCTR1, 0x0A, 0x02);
+ /* Set BT[2:0] for AVDD & VCL & VGH & VGL */
+ write_reg(par, CMD_PWCTR2, 0x02);
+ /* Set VMH[6:0] & VML[6:0] for VOMH & VCOML */
+ write_reg(par, CMD_VCOMCTR1, 0x50, 0x63);
+ write_reg(par, CMD_VCOMOFFS, 0);
+
+ write_reg(par, CMD_CLMADRS, 0, 0, 0, WIDTH); /* Set Column Address */
+ write_reg(par, CMD_PGEADRS, 0, 0, 0, HEIGHT); /* Set Page Address */
+
+ write_reg(par, CMD_DISPON); /* display ON */
+ write_reg(par, CMD_RAMWR); /* Memory Write */
+
+ return 0;
+}
+
+static void set_addr_win(struct fbtft_par *par, int xs, int ys,
+ int xe, int ye)
+{
+ fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par,
+ "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", __func__, xs, ys, xe, ye);
+
+ switch (par->info->var.rotate) {
+ case 0:
+ write_reg(par, CMD_CLMADRS, xs >> 8, xs & 0xff, xe >> 8,
+ xe & 0xff);
+ write_reg(par, CMD_PGEADRS,
+ (ys + __OFFSET) >> 8, (ys + __OFFSET) & 0xff,
+ (ye + __OFFSET) >> 8, (ye + __OFFSET) & 0xff);
+ break;
+ case 90:
+ write_reg(par, CMD_CLMADRS,
+ (xs + __OFFSET) >> 8, (xs + __OFFSET) & 0xff,
+ (xe + __OFFSET) >> 8, (xe + __OFFSET) & 0xff);
+ write_reg(par, CMD_PGEADRS, ys >> 8, ys & 0xff, ye >> 8,
+ ye & 0xff);
+ break;
+ case 180:
+ case 270:
+ write_reg(par, CMD_CLMADRS, xs >> 8, xs & 0xff, xe >> 8,
+ xe & 0xff);
+ write_reg(par, CMD_PGEADRS, ys >> 8, ys & 0xff, ye >> 8,
+ ye & 0xff);
+ break;
+ default:
+ par->info->var.rotate = 0; /* Fix incorrect setting */
+ }
+ write_reg(par, CMD_RAMWR); /* Write Data to GRAM mode */
+}
+
+/*
+7) MY: 1(bottom to top), 0(top to bottom) Row Address Order
+6) MX: 1(R to L), 0(L to R) Column Address Order
+5) MV: 1(Exchanged), 0(normal) Row/Column exchange
+4) ML: 1(bottom to top), 0(top to bottom) Vertical Refresh Order
+3) RGB: 1(BGR), 0(RGB) Color Space
+2) MH: 1(R to L), 0(L to R) Horizontal Refresh Order
+1)
+0)
+
+ MY, MX, MV, ML,RGB, MH, D1, D0
+ 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 //normal
+ 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 //Y-Mirror
+ 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 //X-Mirror
+ 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 //X-Y-Mirror
+ 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 //X-Y Exchange
+ 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 //X-Y Exchange, Y-Mirror
+ 0 | 1 | 1 | 0 | 1 | 0 | 0 | 0 //XY exchange
+ 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0
+*/
+static int set_var(struct fbtft_par *par)
+{
+ u8 mactrl_data = 0; /* Avoid compiler warning */
+
+ fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
+
+ switch (par->info->var.rotate) {
+ case 0:
+ mactrl_data = 0x08;
+ break;
+ case 180:
+ mactrl_data = 0xC8;
+ break;
+ case 270:
+ mactrl_data = 0xA8;
+ break;
+ case 90:
+ mactrl_data = 0x68;
+ break;
+ }
+
+ /* Colorspcae */
+ if (par->bgr)
+ mactrl_data |= (1 << 2);
+ write_reg(par, CMD_MADCTL, mactrl_data);
+ write_reg(par, CMD_RAMWR); /* Write Data to GRAM mode */
+ return 0;
+}
+
+#ifdef GAMMA_ADJ
+#define CURVE(num, idx) curves[num*par->gamma.num_values + idx]
+static int gamma_adj(struct fbtft_par *par, unsigned long *curves)
+{
+ unsigned long mask[] = {
+ 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
+ 0x1f, 0x3f, 0x0f, 0x0f, 0x7f, 0x1f,
+ 0x3F, 0x3F, 0x3F, 0x3F, 0x3F};
+ int i, j;
+
+ fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
+
+ for (i = 0; i < GAMMA_NUM; i++)
+ for (j = 0; j < GAMMA_LEN; j++)
+ CURVE(i, j) &= mask[i*par->gamma.num_values + j];
+
+ write_reg(par, CMD_PGAMMAC,
+ CURVE(0, 0),
+ CURVE(0, 1),
+ CURVE(0, 2),
+ CURVE(0, 3),
+ CURVE(0, 4),
+ CURVE(0, 5),
+ CURVE(0, 6),
+ (CURVE(0, 7) << 4) | CURVE(0, 8),
+ CURVE(0, 9),
+ CURVE(0, 10),
+ CURVE(0, 11),
+ CURVE(0, 12),
+ CURVE(0, 13),
+ CURVE(0, 14),
+ CURVE(0, 15)
+ );
+
+ write_reg(par, CMD_RAMWR); /* Write Data to GRAM mode */
+
+ return 0;
+}
+#undef CURVE
+#endif
+
+static struct fbtft_display display = {
+ .regwidth = 8,
+ .width = WIDTH,
+ .height = HEIGHT,
+ .bpp = BPP,
+ .fps = FPS,
+#ifdef GAMMA_ADJ
+ .gamma_num = GAMMA_NUM,
+ .gamma_len = GAMMA_LEN,
+ .gamma = DEFAULT_GAMMA,
+#endif
+ .fbtftops = {
+ .init_display = init_display,
+ .set_addr_win = set_addr_win,
+ .set_var = set_var,
+#ifdef GAMMA_ADJ
+ .set_gamma = gamma_adj,
+#endif
+ },
+};
+
+FBTFT_REGISTER_DRIVER(DRVNAME, "ilitek,ili9163", &display);
+
+MODULE_ALIAS("spi:" DRVNAME);
+MODULE_ALIAS("platform:" DRVNAME);
+MODULE_ALIAS("spi:ili9163");
+MODULE_ALIAS("platform:ili9163");
+
+MODULE_DESCRIPTION("FB driver for the ILI9163 LCD Controller");
+MODULE_AUTHOR("Kozhevnikov Anatoly");
+MODULE_LICENSE("GPL");
static int init_display(struct fbtft_par *par)
{
unsigned devcode;
+
fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
par->fbtftops.reset(par);
static int set_gamma(struct fbtft_par *par, unsigned long *curves)
{
unsigned long mask[] = {
- 0b11111, 0b11111, 0b111, 0b111, 0b111,
- 0b111, 0b111, 0b111, 0b111, 0b111,
- 0b11111, 0b11111, 0b111, 0b111, 0b111,
- 0b111, 0b111, 0b111, 0b111, 0b111 };
+ 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
+ 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
+ };
int i, j;
fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
module_param(bt, uint, 0);
MODULE_PARM_DESC(bt, "Sets the factor used in the step-up circuits");
-static unsigned vc = 0b011; /* Vci1=Vci*0.80 */
+static unsigned vc = 0x03; /* Vci1=Vci*0.80 */
module_param(vc, uint, 0);
MODULE_PARM_DESC(vc,
"Sets the ratio factor of Vci to generate the reference voltages Vci1");
-static unsigned vrh = 0b1101; /* VREG1OUT=Vci*1.85 */
+static unsigned vrh = 0x0d; /* VREG1OUT=Vci*1.85 */
module_param(vrh, uint, 0);
MODULE_PARM_DESC(vrh,
"Set the amplifying rate (1.6 ~ 1.9) of Vci applied to output the VREG1OUT");
-static unsigned vdv = 0b10010; /* VCOMH amplitude=VREG1OUT*0.98 */
+static unsigned vdv = 0x12; /* VCOMH amplitude=VREG1OUT*0.98 */
module_param(vdv, uint, 0);
MODULE_PARM_DESC(vdv,
"Select the factor of VREG1OUT to set the amplitude of Vcom");
-static unsigned vcm = 0b001010; /* VCOMH=VREG1OUT*0.735 */
+static unsigned vcm = 0x0a; /* VCOMH=VREG1OUT*0.735 */
module_param(vcm, uint, 0);
MODULE_PARM_DESC(vcm, "Set the internal VcomH voltage");
if (par->gpio.cs != -1)
gpio_set_value(par->gpio.cs, 0); /* Activate chip */
- bt &= 0b111;
- vc &= 0b111;
- vrh &= 0b1111;
- vdv &= 0b11111;
- vcm &= 0b111111;
+ bt &= 0x07;
+ vc &= 0x07;
+ vrh &= 0x0f;
+ vdv &= 0x1f;
+ vcm &= 0x3f;
/* Initialization sequence from ILI9325 Application Notes */
write_reg(par, 0x0013, 0x0000); /* VDV[4:0] for VCOM amplitude */
mdelay(200); /* Dis-charge capacitor power voltage */
write_reg(par, 0x0010, /* SAP, BT[3:0], AP, DSTB, SLP, STB */
- (1 << 12) | (bt << 8) | (1 << 7) | (0b001 << 4));
+ (1 << 12) | (bt << 8) | (1 << 7) | (0x01 << 4));
write_reg(par, 0x0011, 0x220 | vc); /* DC1[2:0], DC0[2:0], VC[2:0] */
mdelay(50); /* Delay 50ms */
write_reg(par, 0x0012, vrh); /* Internal reference voltage= Vci; */
static int set_gamma(struct fbtft_par *par, unsigned long *curves)
{
unsigned long mask[] = {
- 0b11111, 0b11111, 0b111, 0b111, 0b111,
- 0b111, 0b111, 0b111, 0b111, 0b111,
- 0b11111, 0b11111, 0b111, 0b111, 0b111,
- 0b111, 0b111, 0b111, 0b111, 0b111 };
+ 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
+ 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
+ };
int i, j;
fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
par->fbtftops.reset(par);
write_reg(par, 0xEF, 0x03, 0x80, 0x02);
- write_reg(par, 0xCF, 0x00 , 0XC1 , 0X30);
- write_reg(par, 0xED, 0x64 , 0x03 , 0X12 , 0X81);
- write_reg(par, 0xE8, 0x85 , 0x00 , 0x78);
- write_reg(par, 0xCB, 0x39 , 0x2C , 0x00 , 0x34 , 0x02);
+ write_reg(par, 0xCF, 0x00, 0XC1, 0X30);
+ write_reg(par, 0xED, 0x64, 0x03, 0X12, 0X81);
+ write_reg(par, 0xE8, 0x85, 0x00, 0x78);
+ write_reg(par, 0xCB, 0x39, 0x2C, 0x00, 0x34, 0x02);
write_reg(par, 0xF7, 0x20);
- write_reg(par, 0xEA, 0x00 , 0x00);
+ write_reg(par, 0xEA, 0x00, 0x00);
/* Power Control 1 */
write_reg(par, 0xC0, 0x23);
/* Column address */
write_reg(par, 0x2A, xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
- /* Row adress */
+ /* Row address */
write_reg(par, 0x2B, ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
/* Memory write */
* This display uses 9-bit SPI: Data/Command bit + 8 data bits
* For platforms that doesn't support 9-bit, the driver is capable
* of emulating this using 8-bit transfer.
- * This is done by transfering eight 9-bit words in 9 bytes.
+ * This is done by transferring eight 9-bit words in 9 bytes.
*
* Copyright (C) 2013 Christian Vogelgsang
* Based on adafruit22fb.c by Noralf Tronnes
write_reg(par, 0x2A,
(xs >> 8) & 0xFF, xs & 0xFF, (xe >> 8) & 0xFF, xe & 0xFF);
- /* Row adress set */
+ /* Row address set */
write_reg(par, 0x2B,
(ys >> 8) & 0xFF, ys & 0xFF, (ye >> 8) & 0xFF, ye & 0xFF);
/* column address */
write_reg(par, 0x2a, xs >> 8, xs & 0xff, xe >> 8, xe & 0xff);
- /* row adress */
+ /* Row address */
write_reg(par, 0x2b, ys >> 8, ys & 0xff, ye >> 8, ye & 0xff);
/* memory write */
-1, 0xC5, 0x00, 0x00, 0x00, 0x00,
/* PGAMCTRL(Positive Gamma Control) */
-1, 0xE0, 0x0F, 0x1F, 0x1C, 0x0C, 0x0F, 0x08, 0x48, 0x98,
- 0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x00,
+ 0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x00,
/* NGAMCTRL(Negative Gamma Control) */
-1, 0xE1, 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
- 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00,
+ 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00,
/* Digital Gamma Control 1 */
-1, 0xE2, 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
- 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00,
+ 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00,
/* Sleep OUT */
-1, 0x11,
/* Display ON */
/* Column address */
write_reg(par, 0x2A, xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
- /* Row adress */
+ /* Row address */
write_reg(par, 0x2B, ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
/* Memory write */
#define WIDTH 84
#define HEIGHT 48
#define TXBUFLEN (84*6)
-#define DEFAULT_GAMMA "40" /* gamma is used to control contrast in this driver */
+#define DEFAULT_GAMMA "40" /* gamma controls the contrast in this driver */
static unsigned tc;
module_param(tc, uint, 0);
par->fbtftops.reset(par);
- /* Function set */
- write_reg(par, 0x21); /* 5:1 1
- 2:0 PD - Powerdown control: chip is active
- 1:0 V - Entry mode: horizontal addressing
- 0:1 H - Extended instruction set control: extended
- */
-
- /* H=1 Temperature control */
- write_reg(par, 0x04 | (tc & 0x3)); /*
- 2:1 1
- 1:x TC1 - Temperature Coefficient: 0x10
- 0:x TC0
- */
-
- /* H=1 Bias system */
- write_reg(par, 0x10 | (bs & 0x7)); /*
- 4:1 1
- 3:0 0
- 2:x BS2 - Bias System
- 1:x BS1
- 0:x BS0
- */
-
- /* Function set */
- write_reg(par, 0x22); /* 5:1 1
- 2:0 PD - Powerdown control: chip is active
- 1:1 V - Entry mode: vertical addressing
- 0:0 H - Extended instruction set control: basic
- */
-
- /* H=0 Display control */
- write_reg(par, 0x08 | 4); /*
- 3:1 1
- 2:1 D - DE: 10=normal mode
- 1:0 0
- 0:0 E
- */
+ /* Function set
+ *
+ * 5:1 1
+ * 2:0 PD - Powerdown control: chip is active
+ * 1:0 V - Entry mode: horizontal addressing
+ * 0:1 H - Extended instruction set control: extended
+ */
+ write_reg(par, 0x21);
+
+ /* H=1 Temperature control
+ *
+ * 2:1 1
+ * 1:x TC1 - Temperature Coefficient: 0x10
+ * 0:x TC0
+ */
+ write_reg(par, 0x04 | (tc & 0x3));
+
+ /* H=1 Bias system
+ *
+ * 4:1 1
+ * 3:0 0
+ * 2:x BS2 - Bias System
+ * 1:x BS1
+ * 0:x BS0
+ */
+ write_reg(par, 0x10 | (bs & 0x7));
+
+ /* Function set
+ *
+ * 5:1 1
+ * 2:0 PD - Powerdown control: chip is active
+ * 1:1 V - Entry mode: vertical addressing
+ * 0:0 H - Extended instruction set control: basic
+ */
+ write_reg(par, 0x22);
+
+ /* H=0 Display control
+ *
+ * 3:1 1
+ * 2:1 D - DE: 10=normal mode
+ * 1:0 0
+ * 0:0 E
+ */
+ write_reg(par, 0x08 | 4);
return 0;
}
static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
{
- fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par, "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", __func__, xs, ys, xe, ye);
-
- /* H=0 Set X address of RAM */
- write_reg(par, 0x80); /* 7:1 1
- 6-0: X[6:0] - 0x00
- */
-
- /* H=0 Set Y address of RAM */
- write_reg(par, 0x40); /* 7:0 0
- 6:1 1
- 2-0: Y[2:0] - 0x0
- */
+ fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par, "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n",
+ __func__, xs, ys, xe, ye);
+
+ /* H=0 Set X address of RAM
+ *
+ * 7:1 1
+ * 6-0: X[6:0] - 0x00
+ */
+ write_reg(par, 0x80);
+
+ /* H=0 Set Y address of RAM
+ *
+ * 7:0 0
+ * 6:1 1
+ * 2-0: Y[2:0] - 0x0
+ */
+ write_reg(par, 0x40);
}
static int write_vmem(struct fbtft_par *par, size_t offset, size_t len)
for (x = 0; x < 84; x++) {
for (y = 0; y < 6; y++) {
*buf = 0x00;
- for (i = 0; i < 8; i++) {
+ for (i = 0; i < 8; i++)
*buf |= (vmem16[(y*8+i)*84+x] ? 1 : 0) << i;
- }
buf++;
}
}
gpio_set_value(par->gpio.dc, 1);
ret = par->fbtftops.write(par, par->txbuf.buf, 6*84);
if (ret < 0)
- dev_err(par->info->device, "%s: write failed and returned: %d\n", __func__, ret);
+ dev_err(par->info->device, "write failed and returned: %d\n",
+ ret);
return ret;
}
***** * *
Date : 10.06.2014 * *
Version : V1.13 *****
- Revison : 5
+ Revision : 5
*******************************************************************************
* This program is free software; you can redistribute it and/or modify
if ((par->info->var.xres == 320) && (par->info->var.yres == 240)) {
/* PLL clock frequency */
- write_reg(par, 0x88 , 0x0A);
- write_reg(par, 0x89 , 0x02);
+ write_reg(par, 0x88, 0x0A);
+ write_reg(par, 0x89, 0x02);
mdelay(10);
/* color deep / MCU Interface */
- write_reg(par, 0x10 , 0x0C);
+ write_reg(par, 0x10, 0x0C);
/* pixel clock period */
- write_reg(par, 0x04 , 0x03);
+ write_reg(par, 0x04, 0x03);
mdelay(1);
/* horizontal settings */
- write_reg(par, 0x14 , 0x27);
- write_reg(par, 0x15 , 0x00);
- write_reg(par, 0x16 , 0x05);
- write_reg(par, 0x17 , 0x04);
- write_reg(par, 0x18 , 0x03);
+ write_reg(par, 0x14, 0x27);
+ write_reg(par, 0x15, 0x00);
+ write_reg(par, 0x16, 0x05);
+ write_reg(par, 0x17, 0x04);
+ write_reg(par, 0x18, 0x03);
/* vertical settings */
- write_reg(par, 0x19 , 0xEF);
- write_reg(par, 0x1A , 0x00);
- write_reg(par, 0x1B , 0x05);
- write_reg(par, 0x1C , 0x00);
- write_reg(par, 0x1D , 0x0E);
- write_reg(par, 0x1E , 0x00);
- write_reg(par, 0x1F , 0x02);
+ write_reg(par, 0x19, 0xEF);
+ write_reg(par, 0x1A, 0x00);
+ write_reg(par, 0x1B, 0x05);
+ write_reg(par, 0x1C, 0x00);
+ write_reg(par, 0x1D, 0x0E);
+ write_reg(par, 0x1E, 0x00);
+ write_reg(par, 0x1F, 0x02);
} else if ((par->info->var.xres == 480) && (par->info->var.yres == 272)) {
/* PLL clock frequency */
- write_reg(par, 0x88 , 0x0A);
- write_reg(par, 0x89 , 0x02);
+ write_reg(par, 0x88, 0x0A);
+ write_reg(par, 0x89, 0x02);
mdelay(10);
/* color deep / MCU Interface */
- write_reg(par, 0x10 , 0x0C);
+ write_reg(par, 0x10, 0x0C);
/* pixel clock period */
- write_reg(par, 0x04 , 0x82);
+ write_reg(par, 0x04, 0x82);
mdelay(1);
/* horizontal settings */
- write_reg(par, 0x14 , 0x3B);
- write_reg(par, 0x15 , 0x00);
- write_reg(par, 0x16 , 0x01);
- write_reg(par, 0x17 , 0x00);
- write_reg(par, 0x18 , 0x05);
+ write_reg(par, 0x14, 0x3B);
+ write_reg(par, 0x15, 0x00);
+ write_reg(par, 0x16, 0x01);
+ write_reg(par, 0x17, 0x00);
+ write_reg(par, 0x18, 0x05);
/* vertical settings */
- write_reg(par, 0x19 , 0x0F);
- write_reg(par, 0x1A , 0x01);
- write_reg(par, 0x1B , 0x02);
- write_reg(par, 0x1C , 0x00);
- write_reg(par, 0x1D , 0x07);
- write_reg(par, 0x1E , 0x00);
- write_reg(par, 0x1F , 0x09);
+ write_reg(par, 0x19, 0x0F);
+ write_reg(par, 0x1A, 0x01);
+ write_reg(par, 0x1B, 0x02);
+ write_reg(par, 0x1C, 0x00);
+ write_reg(par, 0x1D, 0x07);
+ write_reg(par, 0x1E, 0x00);
+ write_reg(par, 0x1F, 0x09);
} else if ((par->info->var.xres == 640) && (par->info->var.yres == 480)) {
/* PLL clock frequency */
- write_reg(par, 0x88 , 0x0B);
- write_reg(par, 0x89 , 0x02);
+ write_reg(par, 0x88, 0x0B);
+ write_reg(par, 0x89, 0x02);
mdelay(10);
/* color deep / MCU Interface */
- write_reg(par, 0x10 , 0x0C);
+ write_reg(par, 0x10, 0x0C);
/* pixel clock period */
- write_reg(par, 0x04 , 0x01);
+ write_reg(par, 0x04, 0x01);
mdelay(1);
/* horizontal settings */
- write_reg(par, 0x14 , 0x4F);
- write_reg(par, 0x15 , 0x05);
- write_reg(par, 0x16 , 0x0F);
- write_reg(par, 0x17 , 0x01);
- write_reg(par, 0x18 , 0x00);
+ write_reg(par, 0x14, 0x4F);
+ write_reg(par, 0x15, 0x05);
+ write_reg(par, 0x16, 0x0F);
+ write_reg(par, 0x17, 0x01);
+ write_reg(par, 0x18, 0x00);
/* vertical settings */
- write_reg(par, 0x19 , 0xDF);
- write_reg(par, 0x1A , 0x01);
- write_reg(par, 0x1B , 0x0A);
- write_reg(par, 0x1C , 0x00);
- write_reg(par, 0x1D , 0x0E);
- write_reg(par, 0x1E , 0x00);
- write_reg(par, 0x1F , 0x01);
+ write_reg(par, 0x19, 0xDF);
+ write_reg(par, 0x1A, 0x01);
+ write_reg(par, 0x1B, 0x0A);
+ write_reg(par, 0x1C, 0x00);
+ write_reg(par, 0x1D, 0x0E);
+ write_reg(par, 0x1E, 0x00);
+ write_reg(par, 0x1F, 0x01);
} else if ((par->info->var.xres == 800) && (par->info->var.yres == 480)) {
/* PLL clock frequency */
- write_reg(par, 0x88 , 0x0B);
- write_reg(par, 0x89 , 0x02);
+ write_reg(par, 0x88, 0x0B);
+ write_reg(par, 0x89, 0x02);
mdelay(10);
/* color deep / MCU Interface */
- write_reg(par, 0x10 , 0x0C);
+ write_reg(par, 0x10, 0x0C);
/* pixel clock period */
- write_reg(par, 0x04 , 0x81);
+ write_reg(par, 0x04, 0x81);
mdelay(1);
/* horizontal settings */
- write_reg(par, 0x14 , 0x63);
- write_reg(par, 0x15 , 0x03);
- write_reg(par, 0x16 , 0x03);
- write_reg(par, 0x17 , 0x02);
- write_reg(par, 0x18 , 0x00);
+ write_reg(par, 0x14, 0x63);
+ write_reg(par, 0x15, 0x03);
+ write_reg(par, 0x16, 0x03);
+ write_reg(par, 0x17, 0x02);
+ write_reg(par, 0x18, 0x00);
/* vertical settings */
- write_reg(par, 0x19 , 0xDF);
- write_reg(par, 0x1A , 0x01);
- write_reg(par, 0x1B , 0x14);
- write_reg(par, 0x1C , 0x00);
- write_reg(par, 0x1D , 0x06);
- write_reg(par, 0x1E , 0x00);
- write_reg(par, 0x1F , 0x01);
+ write_reg(par, 0x19, 0xDF);
+ write_reg(par, 0x1A, 0x01);
+ write_reg(par, 0x1B, 0x14);
+ write_reg(par, 0x1C, 0x00);
+ write_reg(par, 0x1D, 0x06);
+ write_reg(par, 0x1E, 0x00);
+ write_reg(par, 0x1F, 0x01);
} else {
dev_err(par->info->device, "display size is not supported!!");
return -1;
}
/* PWM clock */
- write_reg(par, 0x8a , 0x81);
- write_reg(par, 0x8b , 0xFF);
+ write_reg(par, 0x8a, 0x81);
+ write_reg(par, 0x8b, 0xFF);
mdelay(10);
/* Display ON */
- write_reg(par, 0x01 , 0x80);
+ write_reg(par, 0x01, 0x80);
mdelay(10);
return 0;
"%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", __func__, xs, ys, xe, ye);
/* Set_Active_Window */
- write_reg(par, 0x30 , xs & 0x00FF);
- write_reg(par, 0x31 , (xs & 0xFF00) >> 8);
- write_reg(par, 0x32 , ys & 0x00FF);
- write_reg(par, 0x33 , (ys & 0xFF00) >> 8);
- write_reg(par, 0x34 , (xs+xe) & 0x00FF);
- write_reg(par, 0x35 , ((xs+xe) & 0xFF00) >> 8);
- write_reg(par, 0x36 , (ys+ye) & 0x00FF);
- write_reg(par, 0x37 , ((ys+ye) & 0xFF00) >> 8);
+ write_reg(par, 0x30, xs & 0x00FF);
+ write_reg(par, 0x31, (xs & 0xFF00) >> 8);
+ write_reg(par, 0x32, ys & 0x00FF);
+ write_reg(par, 0x33, (ys & 0xFF00) >> 8);
+ write_reg(par, 0x34, (xs+xe) & 0x00FF);
+ write_reg(par, 0x35, ((xs+xe) & 0xFF00) >> 8);
+ write_reg(par, 0x36, (ys+ye) & 0x00FF);
+ write_reg(par, 0x37, ((ys+ye) & 0xFF00) >> 8);
/* Set_Memory_Write_Cursor */
write_reg(par, 0x46, xs & 0xff);
ret = par->fbtftops.write(par, par->buf, 2);
if (ret < 0) {
va_end(args);
- dev_err(par->info->device, "%s: write() failed and returned %dn",
- __func__, ret);
+ dev_err(par->info->device, "write() failed and returned %dn",
+ ret);
return;
}
len--;
ret = par->fbtftops.write(par, par->buf, len + 1);
if (ret < 0) {
va_end(args);
- dev_err(par->info->device, "%s: write() failed and returned %dn",
- __func__, ret);
+ dev_err(par->info->device,
+ "write() failed and returned %dn", ret);
return;
}
}
/* Column address */
write_reg(par, 0x2A, xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
- /* Row adress */
+ /* Row address */
write_reg(par, 0x2B, ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
/* Memory write */
write_reg(par, 0x36, MY | MV | (par->bgr << 3));
break;
case 180:
- write_reg(par, 0x36, (par->bgr << 3));
+ write_reg(par, 0x36, par->bgr << 3);
break;
case 90:
write_reg(par, 0x36, MX | MV | (par->bgr << 3));
static int set_gamma(struct fbtft_par *par, unsigned long *curves)
{
unsigned long mask[] = {
- 0b111111, 0b111111, 0b111111, 0b111111, 0b111111, 0b111111,
- 0b111111, 0b111111, 0b111111, 0b111111, 0b111111, 0b111111,
- 0b11111, 0b11111,
- 0b111111, 0b111111, 0b111111, 0b111111, 0b111111, 0b111111,
- 0b111111, 0b111111, 0b111111, 0b111111, 0b111111, 0b111111,
- 0b11111, 0b11111 };
+ 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f,
+ 0x3f, 0x3f, 0x1f, 0x1f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f,
+ 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x1f, 0x1f,
+ };
int i, j;
fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
switch (par->info->var.rotate) {
case 0:
- write_reg(par, 0x11, reg11 | 0b110000);
+ write_reg(par, 0x11, reg11 | 0x30);
break;
case 270:
- write_reg(par, 0x11, reg11 | 0b101000);
+ write_reg(par, 0x11, reg11 | 0x28);
break;
case 180:
- write_reg(par, 0x11, reg11 | 0b000000);
+ write_reg(par, 0x11, reg11 | 0x00);
break;
case 90:
- write_reg(par, 0x11, reg11 | 0b011000);
+ write_reg(par, 0x11, reg11 | 0x18);
break;
}
static int set_gamma(struct fbtft_par *par, unsigned long *curves)
{
unsigned long mask[] = {
- 0b11111, 0b11111, 0b111, 0b111, 0b111,
- 0b111, 0b111, 0b111, 0b111, 0b111,
- 0b11111, 0b11111, 0b111, 0b111, 0b111,
- 0b111, 0b111, 0b111, 0b111, 0b111 };
+ 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
+ 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
+ };
int i, j;
fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
ret = par->fbtftops.write(par, par->txbuf.buf,
par->info->var.xres*par->info->var.yres/8);
if (ret < 0)
- dev_err(par->info->device,
- "%s: write failed and returned: %d\n", __func__, ret);
+ dev_err(par->info->device, "write failed and returned: %d\n",
+ ret);
return ret;
}
write_reg(par, 0xae); /* Display Off */
write_reg(par, 0xa0, 0x70 | (par->bgr << 2)); /* Set Colour Depth */
- write_reg(par, 0x72); // RGB colour
+ write_reg(par, 0x72); /* RGB colour */
write_reg(par, 0xa1, 0x00); /* Set Display Start Line */
write_reg(par, 0xa2, 0x00); /* Set Display Offset */
write_reg(par, 0xa4); /* NORMALDISPLAY */
- write_reg(par, 0xa8, 0x3f); // Set multiplex
- write_reg(par, 0xad, 0x8e); // Set master
- // write_reg(par, 0xb0, 0x0b); // Set power mode
- write_reg(par, 0xb1, 0x31); // Precharge
- write_reg(par, 0xb3, 0xf0); // Clock div
- write_reg(par, 0x8a, 0x64); // Precharge A
- write_reg(par, 0x8b, 0x78); // Precharge B
- write_reg(par, 0x8c, 0x64); // Precharge C
- write_reg(par, 0xbb, 0x3a); // Precharge level
- write_reg(par, 0xbe, 0x3e); // vcomh
- write_reg(par, 0x87, 0x06); // Master current
- write_reg(par, 0x81, 0x91); // Contrast A
- write_reg(par, 0x82, 0x50); // Contrast B
- write_reg(par, 0x83, 0x7d); // Contrast C
+ write_reg(par, 0xa8, 0x3f); /* Set multiplex */
+ write_reg(par, 0xad, 0x8e); /* Set master */
+ /* write_reg(par, 0xb0, 0x0b); Set power mode */
+ write_reg(par, 0xb1, 0x31); /* Precharge */
+ write_reg(par, 0xb3, 0xf0); /* Clock div */
+ write_reg(par, 0x8a, 0x64); /* Precharge A */
+ write_reg(par, 0x8b, 0x78); /* Precharge B */
+ write_reg(par, 0x8c, 0x64); /* Precharge C */
+ write_reg(par, 0xbb, 0x3a); /* Precharge level */
+ write_reg(par, 0xbe, 0x3e); /* vcomh */
+ write_reg(par, 0x87, 0x06); /* Master current */
+ write_reg(par, 0x81, 0x91); /* Contrast A */
+ write_reg(par, 0x82, 0x50); /* Contrast B */
+ write_reg(par, 0x83, 0x7d); /* Contrast C */
write_reg(par, 0xaf); /* Set Sleep Mode Display On */
return 0;
if (unlikely(par->debug & DEBUG_WRITE_REGISTER)) {
va_start(args, len);
- for (i = 0; i < len; i++) {
+ for (i = 0; i < len; i++)
buf[i] = (u8)va_arg(args, unsigned int);
- }
va_end(args);
fbtft_par_dbg_hex(DEBUG_WRITE_REGISTER, par, par->info->device, u8, buf, len, "%s: ", __func__);
}
ret = par->fbtftops.write(par, par->buf, sizeof(u8));
if (ret < 0) {
va_end(args);
- dev_err(par->info->device, "%s: write() failed and returned %d\n", __func__, ret);
+ dev_err(par->info->device,
+ "write() failed and returned %d\n", ret);
return;
}
len--;
if (len) {
i = len;
- while (i--) {
+ while (i--)
*buf++ = (u8)va_arg(args, unsigned int);
- }
ret = par->fbtftops.write(par, par->buf, len * (sizeof(u8)));
if (ret < 0) {
va_end(args);
- dev_err(par->info->device, "%s: write() failed and returned %d\n", __func__, ret);
+ dev_err(par->info->device,
+ "write() failed and returned %d\n", ret);
return;
}
}
static int set_var(struct fbtft_par *par)
{
unsigned remap;
+
fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
if (par->fbtftops.init_display != init_display) {
switch (par->info->var.rotate) {
case 0:
- write_reg(par, 0xA0, remap | 0b00 | 1<<4);
+ write_reg(par, 0xA0, remap | 0x00 | 1<<4);
break;
case 270:
- write_reg(par, 0xA0, remap | 0b11 | 1<<4);
+ write_reg(par, 0xA0, remap | 0x03 | 1<<4);
break;
case 180:
- write_reg(par, 0xA0, remap | 0b10);
+ write_reg(par, 0xA0, remap | 0x02);
break;
case 90:
- write_reg(par, 0xA0, remap | 0b01);
+ write_reg(par, 0xA0, remap | 0x01);
break;
}
bl_ops = devm_kzalloc(par->info->device, sizeof(struct backlight_ops),
GFP_KERNEL);
- if (!bl_ops) {
- dev_err(par->info->device,
- "%s: could not allocate memory for backlight operations.\n",
- __func__);
+ if (!bl_ops)
return;
- }
bl_ops->update_status = update_onboard_backlight;
bl_props.type = BACKLIGHT_RAW;
static int default_init_sequence[] = {
/* SWRESET - Software reset */
- -1, 0x01,
+ -1, 0x01,
-2, 150, /* delay */
/* SLPOUT - Sleep out & booster on */
- -1, 0x11,
+ -1, 0x11,
-2, 500, /* delay */
/* FRMCTR1 - frame rate control: normal mode
frame rate = fosc / (1 x 2 + 40) * (LINE + 2C + 2D) */
- -1, 0xB1, 0x01, 0x2C, 0x2D,
+ -1, 0xB1, 0x01, 0x2C, 0x2D,
/* FRMCTR2 - frame rate control: idle mode
frame rate = fosc / (1 x 2 + 40) * (LINE + 2C + 2D) */
- -1, 0xB2, 0x01, 0x2C, 0x2D,
+ -1, 0xB2, 0x01, 0x2C, 0x2D,
/* FRMCTR3 - frame rate control - partial mode
dot inversion mode, line inversion mode */
/* PWCTR4 - Power Control
BCLK/2, Opamp current small & Medium low */
- -1, 0xC3,0x8A,0x2A,
+ -1, 0xC3, 0x8A, 0x2A,
/* PWCTR5 - Power Control */
-1, 0xC4, 0x8A, 0xEE,
-2, 10, /* delay */
/* end marker */
- -3
+ -3
};
static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
/* Column address */
write_reg(par, 0x2A, xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
- /* Row adress */
+ /* Row address */
write_reg(par, 0x2B, ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
/* Memory write */
write_reg(par, 0x36, MY | MV | (par->bgr << 3));
break;
case 180:
- write_reg(par, 0x36, (par->bgr << 3));
+ write_reg(par, 0x36, par->bgr << 3);
break;
case 90:
write_reg(par, 0x36, MX | MV | (par->bgr << 3));
#define CURVE(num, idx) curves[num*par->gamma.num_values + idx]
static int set_gamma(struct fbtft_par *par, unsigned long *curves)
{
- int i,j;
+ int i, j;
fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
/* apply mask */
for (i = 0; i < par->gamma.num_curves; i++)
for (j = 0; j < par->gamma.num_values; j++)
- CURVE(i,j) &= 0b111111;
+ CURVE(i, j) &= 0x3f;
for (i = 0; i < par->gamma.num_curves; i++)
write_reg(par, 0xE0 + i,
CURVE(i, 0), CURVE(i, 1), CURVE(i, 2), CURVE(i, 3),
CURVE(i, 4), CURVE(i, 5), CURVE(i, 6), CURVE(i, 7),
CURVE(i, 8), CURVE(i, 9), CURVE(i, 10), CURVE(i, 11),
- CURVE(i, 12), CURVE(i, 13), CURVE(i, 14), CURVE(i,15));
+ CURVE(i, 12), CURVE(i, 13), CURVE(i, 14), CURVE(i, 15));
return 0;
}
/* Column address */
write_reg(par, 0x2A, xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
- /* Row adress */
+ /* Row address */
write_reg(par, 0x2B, ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
/* Memory write */
ret = par->fbtftops.write(par, par->txbuf.buf, WIDTH);
if (ret < 0) {
dev_err(par->info->device,
- "%s: write failed and returned: %d\n", __func__, ret);
+ "write failed and returned: %d\n", ret);
break;
}
}
}
if (ret < 0)
- dev_err(par->info->device, "%s: write failed and returned: %d\n", __func__, ret);
+ dev_err(par->info->device, "write failed and returned: %d\n",
+ ret);
return ret;
}
/* Initialization sequence from Lib_UTFT */
/* register reset */
- write_reg(par, 0x0003,0x0001); /* Soft reset */
+ write_reg(par, 0x0003, 0x0001); /* Soft reset */
/* oscillator start */
- write_reg(par, 0x003A,0x0001); /*Oscillator 0: stop, 1: operation */
+ write_reg(par, 0x003A, 0x0001); /*Oscillator 0: stop, 1: operation */
udelay(100);
/* y-setting */
- write_reg(par, 0x0024,0x007B); /* amplitude setting */
+ write_reg(par, 0x0024, 0x007B); /* amplitude setting */
udelay(10);
- write_reg(par, 0x0025,0x003B); /* amplitude setting */
- write_reg(par, 0x0026,0x0034); /* amplitude setting */
+ write_reg(par, 0x0025, 0x003B); /* amplitude setting */
+ write_reg(par, 0x0026, 0x0034); /* amplitude setting */
udelay(10);
- write_reg(par, 0x0027,0x0004); /* amplitude setting */
- write_reg(par, 0x0052,0x0025); /* circuit setting 1 */
+ write_reg(par, 0x0027, 0x0004); /* amplitude setting */
+ write_reg(par, 0x0052, 0x0025); /* circuit setting 1 */
udelay(10);
- write_reg(par, 0x0053,0x0033); /* circuit setting 2 */
- write_reg(par, 0x0061,0x001C); /* adjustment V10 positive polarity */
+ write_reg(par, 0x0053, 0x0033); /* circuit setting 2 */
+ write_reg(par, 0x0061, 0x001C); /* adjustment V10 positive polarity */
udelay(10);
- write_reg(par, 0x0062,0x002C); /* adjustment V9 negative polarity */
- write_reg(par, 0x0063,0x0022); /* adjustment V34 positive polarity */
+ write_reg(par, 0x0062, 0x002C); /* adjustment V9 negative polarity */
+ write_reg(par, 0x0063, 0x0022); /* adjustment V34 positive polarity */
udelay(10);
- write_reg(par, 0x0064,0x0027); /* adjustment V31 negative polarity */
+ write_reg(par, 0x0064, 0x0027); /* adjustment V31 negative polarity */
udelay(10);
- write_reg(par, 0x0065,0x0014); /* adjustment V61 negative polarity */
+ write_reg(par, 0x0065, 0x0014); /* adjustment V61 negative polarity */
udelay(10);
- write_reg(par, 0x0066,0x0010); /* adjustment V61 negative polarity */
-
+ write_reg(par, 0x0066, 0x0010); /* adjustment V61 negative polarity */
+
/* Basical clock for 1 line (BASECOUNT[7:0]) number specified */
- write_reg(par, 0x002E,0x002D);
-
+ write_reg(par, 0x002E, 0x002D);
+
/* Power supply setting */
- write_reg(par, 0x0019,0x0000); /* DC/DC output setting */
+ write_reg(par, 0x0019, 0x0000); /* DC/DC output setting */
udelay(200);
- write_reg(par, 0x001A,0x1000); /* DC/DC frequency setting */
- write_reg(par, 0x001B,0x0023); /* DC/DC rising setting */
- write_reg(par, 0x001C,0x0C01); /* Regulator voltage setting */
- write_reg(par, 0x001D,0x0000); /* Regulator current setting */
- write_reg(par, 0x001E,0x0009); /* VCOM output setting */
- write_reg(par, 0x001F,0x0035); /* VCOM amplitude setting */
- write_reg(par, 0x0020,0x0015); /* VCOMM cencter setting */
- write_reg(par, 0x0018,0x1E7B); /* DC/DC operation setting */
+ write_reg(par, 0x001A, 0x1000); /* DC/DC frequency setting */
+ write_reg(par, 0x001B, 0x0023); /* DC/DC rising setting */
+ write_reg(par, 0x001C, 0x0C01); /* Regulator voltage setting */
+ write_reg(par, 0x001D, 0x0000); /* Regulator current setting */
+ write_reg(par, 0x001E, 0x0009); /* VCOM output setting */
+ write_reg(par, 0x001F, 0x0035); /* VCOM amplitude setting */
+ write_reg(par, 0x0020, 0x0015); /* VCOMM cencter setting */
+ write_reg(par, 0x0018, 0x1E7B); /* DC/DC operation setting */
/* windows setting */
- write_reg(par, 0x0008,0x0000); /* Minimum X address */
- write_reg(par, 0x0009,0x00EF); /* Maximum X address */
- write_reg(par, 0x000a,0x0000); /* Minimum Y address */
- write_reg(par, 0x000b,0x013F); /* Maximum Y address */
+ write_reg(par, 0x0008, 0x0000); /* Minimum X address */
+ write_reg(par, 0x0009, 0x00EF); /* Maximum X address */
+ write_reg(par, 0x000a, 0x0000); /* Minimum Y address */
+ write_reg(par, 0x000b, 0x013F); /* Maximum Y address */
/* LCD display area setting */
- write_reg(par, 0x0029,0x0000); /* [LCDSIZE] X MIN. size set */
- write_reg(par, 0x002A,0x0000); /* [LCDSIZE] Y MIN. size set */
- write_reg(par, 0x002B,0x00EF); /* [LCDSIZE] X MAX. size set */
- write_reg(par, 0x002C,0x013F); /* [LCDSIZE] Y MAX. size set */
+ write_reg(par, 0x0029, 0x0000); /* [LCDSIZE] X MIN. size set */
+ write_reg(par, 0x002A, 0x0000); /* [LCDSIZE] Y MIN. size set */
+ write_reg(par, 0x002B, 0x00EF); /* [LCDSIZE] X MAX. size set */
+ write_reg(par, 0x002C, 0x013F); /* [LCDSIZE] Y MAX. size set */
/* Gate scan setting */
- write_reg(par, 0x0032,0x0002);
-
+ write_reg(par, 0x0032, 0x0002);
+
/* n line inversion line number */
- write_reg(par, 0x0033,0x0000);
+ write_reg(par, 0x0033, 0x0000);
/* Line inversion/frame inversion/interlace setting */
- write_reg(par, 0x0037,0x0000);
-
+ write_reg(par, 0x0037, 0x0000);
+
/* Gate scan operation setting register */
- write_reg(par, 0x003B,0x0001);
-
+ write_reg(par, 0x003B, 0x0001);
+
/* Color mode */
/*GS = 0: 260-k color (64 gray scale), GS = 1: 8 color (2 gray scale) */
- write_reg(par, 0x0004,0x0000);
+ write_reg(par, 0x0004, 0x0000);
/* RAM control register */
- write_reg(par, 0x0005,0x0000); /*Window access 00:Normal, 10:Window */
+ write_reg(par, 0x0005, 0x0000); /*Window access 00:Normal, 10:Window */
/* Display setting register 2 */
- write_reg(par, 0x0001,0x0000);
+ write_reg(par, 0x0001, 0x0000);
/* display setting */
- write_reg(par, 0x0000,0x0000); /* display on */
+ write_reg(par, 0x0000, 0x0000); /* display on */
return 0;
}
ret = par->fbtftops.write(par, par->buf, len);
if (ret < 0) {
dev_err(par->info->device,
- "%s: write() failed and returned %d\n", __func__, ret);
+ "write() failed and returned %d\n", ret);
return;
}
}
ret = par->fbtftops.write(par, par->buf, (len + pad) * sizeof(u16));
if (ret < 0) {
dev_err(par->info->device,
- "%s: write() failed and returned %d\n", __func__, ret);
+ "write() failed and returned %d\n", ret);
return;
}
}
#include <linux/of_gpio.h>
#include "fbtft.h"
-
-extern void fbtft_sysfs_init(struct fbtft_par *par);
-extern void fbtft_sysfs_exit(struct fbtft_par *par);
-extern void fbtft_expand_debug_value(unsigned long *debug);
-extern int fbtft_gamma_parse_str(struct fbtft_par *par, unsigned long *curves,
- const char *str, int size);
+#include "internal.h"
static unsigned long debug;
-module_param(debug, ulong , 0);
+module_param(debug, ulong, 0);
MODULE_PARM_DESC(debug, "override device debug level");
static bool dma = true;
bl_ops = devm_kzalloc(par->info->device, sizeof(struct backlight_ops),
GFP_KERNEL);
- if (!bl_ops) {
- dev_err(par->info->device,
- "%s: could not allocate memeory for backlight operations.\n",
- __func__);
+ if (!bl_ops)
return;
- }
bl_ops->get_brightness = fbtft_backlight_get_brightness;
bl_ops->update_status = fbtft_backlight_update_status;
write_reg(par, 0x2A,
(xs >> 8) & 0xFF, xs & 0xFF, (xe >> 8) & 0xFF, xe & 0xFF);
- /* Row adress set */
+ /* Row address set */
write_reg(par, 0x2B,
(ys >> 8) & 0xFF, ys & 0xFF, (ye >> 8) & 0xFF, ye & 0xFF);
int ret = 0;
if (unlikely(par->debug & (DEBUG_TIME_FIRST_UPDATE | DEBUG_TIME_EACH_UPDATE))) {
- if ((par->debug & DEBUG_TIME_EACH_UPDATE) || \
+ if ((par->debug & DEBUG_TIME_EACH_UPDATE) ||
((par->debug & DEBUG_TIME_FIRST_UPDATE) && !par->first_update_done)) {
getnstimeofday(&ts_start);
timeit = true;
/* sanity check */
if (display->gamma_num * display->gamma_len > FBTFT_GAMMA_MAX_VALUES_TOTAL) {
- dev_err(dev,
- "%s: FBTFT_GAMMA_MAX_VALUES_TOTAL=%d is exceeded\n",
- __func__, FBTFT_GAMMA_MAX_VALUES_TOTAL);
+ dev_err(dev, "FBTFT_GAMMA_MAX_VALUES_TOTAL=%d is exceeded\n",
+ FBTFT_GAMMA_MAX_VALUES_TOTAL);
return NULL;
}
fbtft_sysfs_init(par);
if (par->txbuf.buf)
- sprintf(text1, ", %d KiB %sbuffer memory",
+ sprintf(text1, ", %zu KiB %sbuffer memory",
par->txbuf.len >> 10, par->txbuf.dma ? "DMA " : "");
if (spi)
sprintf(text2, ", spi%d.%d at %d MHz", spi->master->bus_num,
{
struct fbtft_par *par = fb_info->par;
struct spi_device *spi = par->spi;
- int ret;
if (spi)
spi_set_drvdata(spi, NULL);
if (par->fbtftops.unregister_backlight)
par->fbtftops.unregister_backlight(par);
fbtft_sysfs_exit(par);
- ret = unregister_framebuffer(fb_info);
- return ret;
+ return unregister_framebuffer(fb_info);
}
EXPORT_SYMBOL(fbtft_unregister_framebuffer);
fbtft_par_dbg(DEBUG_VERIFY_GPIOS, par, "%s()\n", __func__);
pdata = par->info->device->platform_data;
- if (pdata->display.buswidth != 9 && par->startbyte == 0 && \
+ if (pdata->display.buswidth != 9 && par->startbyte == 0 &&
par->gpio.dc < 0) {
dev_err(par->info->device,
"Missing info about 'dc' gpio. Aborting.\n");
}
if ((len % 8) != 0) {
dev_err(par->info->device,
- "%s: error: len=%d must be divisible by 8\n",
- __func__, len);
+ "error: len=%zu must be divisible by 8\n", len);
return -EINVAL;
}
if (par->startbyte) {
if (len > 32) {
dev_err(par->info->device,
- "%s: len=%d can't be larger than 32 when using 'startbyte'\n",
- __func__, len);
+ "len=%zu can't be larger than 32 when using 'startbyte'\n",
+ len);
return -EINVAL;
}
txbuf[0] = par->startbyte | 0x3;
for (i = 0; i < 8; i++) {
if ((data & 1) != (prev_data & 1))
gpio_set_value(par->gpio.db[i],
- (data & 1));
+ data & 1);
data >>= 1;
prev_data >>= 1;
}
}
#else
for (i = 0; i < 8; i++) {
- gpio_set_value(par->gpio.db[i], (data & 1));
+ gpio_set_value(par->gpio.db[i], data & 1);
data >>= 1;
}
#endif
for (i = 0; i < 16; i++) {
if ((data & 1) != (prev_data & 1))
gpio_set_value(par->gpio.db[i],
- (data & 1));
+ data & 1);
data >>= 1;
prev_data >>= 1;
}
}
#else
for (i = 0; i < 16; i++) {
- gpio_set_value(par->gpio.db[i], (data & 1));
+ gpio_set_value(par->gpio.db[i], data & 1);
data >>= 1;
}
#endif
#include "fbtft.h"
-
+#include "internal.h"
static int get_next_ulong(char **str_p, unsigned long *val, char *sep, int base)
{
fbtft_par_dbg(DEBUG_SYSFS, par, "%s\n", str);
- tmp = kmalloc(size+1, GFP_KERNEL);
+ tmp = kmemdup(str, size + 1, GFP_KERNEL);
if (!tmp)
return -ENOMEM;
- memcpy(tmp, str, size+1);
/* replace optional separators */
str_p = tmp;
void fbtft_expand_debug_value(unsigned long *debug)
{
- switch (*debug & 0b111) {
+ switch (*debug & 0x7) {
case 1:
*debug |= DEBUG_LEVEL_1;
break;
/**
* struct fbtft_platform_data - Passes display specific data to the driver
* @display: Display properties
- * @gpios: Pointer to an array of piname to gpio mappings
+ * @gpios: Pointer to an array of pinname to gpio mappings
* @rotate: Display rotation angle
* @bgr: LCD Controller BGR bit
* @fps: Frames per second (this will go away, use @fps in @fbtft_display)
* @gpio.cs: LCD Chip Select with parallel interface bus
* @gpio.db[16]: Parallel databus
* @gpio.led[16]: Led control signals
- * @gpio.aux[16]: Auxillary signals, not used by core
+ * @gpio.aux[16]: Auxiliary signals, not used by core
* @init_sequence: Pointer to LCD initialization array
* @gamma.lock: Mutex for Gamma curve locking
* @gamma.curves: Pointer to Gamma curve array
#define NUMARGS(...) (sizeof((int[]){__VA_ARGS__})/sizeof(int))
#define write_reg(par, ...) \
-do { \
- par->fbtftops.write_register(par, NUMARGS(__VA_ARGS__), __VA_ARGS__); \
-} while (0)
+ par->fbtftops.write_register(par, NUMARGS(__VA_ARGS__), __VA_ARGS__)
/* fbtft-core.c */
extern void fbtft_dbg_hex(const struct device *dev,
} \
\
static const struct of_device_id dt_ids[] = { \
- { .compatible = _compatible }, \
- {}, \
+ { .compatible = _compatible }, \
+ {}, \
}; \
\
MODULE_DEVICE_TABLE(of, dt_ids); \
.driver = { \
.name = _name, \
.owner = THIS_MODULE, \
- .of_match_table = of_match_ptr(dt_ids), \
+ .of_match_table = of_match_ptr(dt_ids), \
}, \
.probe = fbtft_driver_probe_spi, \
.remove = fbtft_driver_remove_spi, \
.driver = { \
.name = _name, \
.owner = THIS_MODULE, \
- .of_match_table = of_match_ptr(dt_ids), \
+ .of_match_table = of_match_ptr(dt_ids), \
}, \
.probe = fbtft_driver_probe_pdev, \
.remove = fbtft_driver_remove_pdev, \
#define MAX_GPIOS 32
-struct spi_device *spi_device;
-struct platform_device *p_device;
+static struct spi_device *spi_device;
+static struct platform_device *p_device;
static char *name;
module_param(name, charp, 0);
MODULE_PARM_DESC(init, "Init sequence, used with the custom argument");
static unsigned long debug;
-module_param(debug, ulong , 0);
+module_param(debug, ulong, 0);
MODULE_PARM_DESC(debug,
"level: 0-7 (the remaining 29 bits is for advanced usage)");
"03 1d 07 06 2E 2C 29 2D 2E 2E 37 3F 00 00 02 10"
static int hy28b_init_sequence[] = {
- -1,0x00e7,0x0010,-1,0x0000,0x0001,-1,0x0001,0x0100,-1,0x0002,0x0700,
- -1,0x0003,0x1030,-1,0x0004,0x0000,-1,0x0008,0x0207,-1,0x0009,0x0000,
- -1,0x000a,0x0000,-1,0x000c,0x0001,-1,0x000d,0x0000,-1,0x000f,0x0000,
- -1,0x0010,0x0000,-1,0x0011,0x0007,-1,0x0012,0x0000,-1,0x0013,0x0000,
- -2,50,-1,0x0010,0x1590,-1,0x0011,0x0227,-2,50,-1,0x0012,0x009c,-2,50,
- -1,0x0013,0x1900,-1,0x0029,0x0023,-1,0x002b,0x000e,-2,50,
- -1,0x0020,0x0000,-1,0x0021,0x0000,-2,50,-1,0x0050,0x0000,
- -1,0x0051,0x00ef,-1,0x0052,0x0000,-1,0x0053,0x013f,-1,0x0060,0xa700,
- -1,0x0061,0x0001,-1,0x006a,0x0000,-1,0x0080,0x0000,-1,0x0081,0x0000,
- -1,0x0082,0x0000,-1,0x0083,0x0000,-1,0x0084,0x0000,-1,0x0085,0x0000,
- -1,0x0090,0x0010,-1,0x0092,0x0000,-1,0x0093,0x0003,-1,0x0095,0x0110,
- -1,0x0097,0x0000,-1,0x0098,0x0000,-1,0x0007,0x0133,-1,0x0020,0x0000,
- -1,0x0021,0x0000,-2,100,-3 };
+ -1, 0x00e7, 0x0010, -1, 0x0000, 0x0001,
+ -1, 0x0001, 0x0100, -1, 0x0002, 0x0700,
+ -1, 0x0003, 0x1030, -1, 0x0004, 0x0000,
+ -1, 0x0008, 0x0207, -1, 0x0009, 0x0000,
+ -1, 0x000a, 0x0000, -1, 0x000c, 0x0001,
+ -1, 0x000d, 0x0000, -1, 0x000f, 0x0000,
+ -1, 0x0010, 0x0000, -1, 0x0011, 0x0007,
+ -1, 0x0012, 0x0000, -1, 0x0013, 0x0000,
+ -2, 50, -1, 0x0010, 0x1590, -1, 0x0011,
+ 0x0227, -2, 50, -1, 0x0012, 0x009c, -2, 50,
+ -1, 0x0013, 0x1900, -1, 0x0029, 0x0023,
+ -1, 0x002b, 0x000e, -2, 50,
+ -1, 0x0020, 0x0000, -1, 0x0021, 0x0000,
+ -2, 50, -1, 0x0050, 0x0000,
+ -1, 0x0051, 0x00ef, -1, 0x0052, 0x0000,
+ -1, 0x0053, 0x013f, -1, 0x0060, 0xa700,
+ -1, 0x0061, 0x0001, -1, 0x006a, 0x0000,
+ -1, 0x0080, 0x0000, -1, 0x0081, 0x0000,
+ -1, 0x0082, 0x0000, -1, 0x0083, 0x0000,
+ -1, 0x0084, 0x0000, -1, 0x0085, 0x0000,
+ -1, 0x0090, 0x0010, -1, 0x0092, 0x0000,
+ -1, 0x0093, 0x0003, -1, 0x0095, 0x0110,
+ -1, 0x0097, 0x0000, -1, 0x0098, 0x0000,
+ -1, 0x0007, 0x0133, -1, 0x0020, 0x0000,
+ -1, 0x0021, 0x0000, -2, 100, -3 };
#define HY28B_GAMMA \
"04 1F 4 7 7 0 7 7 6 0\n" \
"0F 00 1 7 4 0 0 0 6 7"
static int pitft_init_sequence[] = {
- -1,0x01,-2,5,-1,0x28,-1,0xEF,0x03,0x80,0x02,-1,0xCF,0x00,0xC1,0x30,
- -1,0xED,0x64,0x03,0x12,0x81,-1,0xE8,0x85,0x00,0x78,
- -1,0xCB,0x39,0x2C,0x00,0x34,0x02,-1,0xF7,0x20,-1,0xEA,0x00,0x00,
- -1,0xC0,0x23,-1,0xC1,0x10,-1,0xC5,0x3e,0x28,-1,0xC7,0x86,-1,0x3A,0x55,
- -1,0xB1,0x00,0x18,-1,0xB6,0x08,0x82,0x27,-1,0xF2,0x00,-1,0x26,0x01,
- -1,0xE0,0x0F,0x31,0x2B,0x0C,0x0E,0x08,0x4E,0xF1,0x37,0x07,0x10,0x03,
- 0x0E,0x09,0x00,-1,0xE1,0x00,0x0E,0x14,0x03,0x11,0x07,0x31,0xC1,0x48,
- 0x08,0x0F,0x0C,0x31,0x36,0x0F,-1,0x11,-2,100,-1,0x29,-2,20,-3 };
+ -1, 0x01, -2, 5, -1, 0x28, -1, 0xEF,
+ 0x03, 0x80, 0x02, -1, 0xCF, 0x00, 0xC1, 0x30,
+ -1, 0xED, 0x64, 0x03, 0x12, 0x81,
+ -1, 0xE8, 0x85, 0x00, 0x78,
+ -1, 0xCB, 0x39, 0x2C, 0x00, 0x34, 0x02,
+ -1, 0xF7, 0x20, -1, 0xEA, 0x00, 0x00,
+ -1, 0xC0, 0x23, -1, 0xC1, 0x10, -1, 0xC5,
+ 0x3e, 0x28, -1, 0xC7, 0x86, -1, 0x3A, 0x55,
+ -1, 0xB1, 0x00, 0x18, -1, 0xB6, 0x08, 0x82,
+ 0x27, -1, 0xF2, 0x00, -1, 0x26, 0x01,
+ -1, 0xE0, 0x0F, 0x31, 0x2B, 0x0C, 0x0E, 0x08,
+ 0x4E, 0xF1, 0x37, 0x07, 0x10, 0x03,
+ 0x0E, 0x09, 0x00, -1, 0xE1, 0x00, 0x0E, 0x14,
+ 0x03, 0x11, 0x07, 0x31, 0xC1, 0x48,
+ 0x08, 0x0F, 0x0C, 0x31, 0x36, 0x0F, -1,
+ 0x11, -2, 100, -1, 0x29, -2, 20, -3 };
static int waveshare32b_init_sequence[] = {
- -1,0xCB,0x39,0x2C,0x00,0x34,0x02,-1,0xCF,0x00,0xC1,0x30,
- -1,0xE8,0x85,0x00,0x78,-1,0xEA,0x00,0x00,-1,0xED,0x64,0x03,0x12,0x81,
- -1,0xF7,0x20,-1,0xC0,0x23,-1,0xC1,0x10,-1,0xC5,0x3e,0x28,-1,0xC7,0x86,
- -1,0x36,0x28,-1,0x3A,0x55,-1,0xB1,0x00,0x18,-1,0xB6,0x08,0x82,0x27,
- -1,0xF2,0x00,-1,0x26,0x01,
- -1,0xE0,0x0F,0x31,0x2B,0x0C,0x0E,0x08,0x4E,0xF1,0x37,0x07,0x10,0x03,0x0E,0x09,0x00,
- -1,0xE1,0x00,0x0E,0x14,0x03,0x11,0x07,0x31,0xC1,0x48,0x08,0x0F,0x0C,0x31,0x36,0x0F,
- -1,0x11,-2,120,-1,0x29,-1,0x2c,-3 };
+ -1, 0xCB, 0x39, 0x2C, 0x00, 0x34, 0x02,
+ -1, 0xCF, 0x00, 0xC1, 0x30,
+ -1, 0xE8, 0x85, 0x00, 0x78, -1, 0xEA, 0x00,
+ 0x00, -1, 0xED, 0x64, 0x03, 0x12, 0x81,
+ -1, 0xF7, 0x20, -1, 0xC0, 0x23, -1, 0xC1,
+ 0x10, -1, 0xC5, 0x3e, 0x28, -1, 0xC7, 0x86,
+ -1, 0x36, 0x28, -1, 0x3A, 0x55, -1, 0xB1, 0x00,
+ 0x18, -1, 0xB6, 0x08, 0x82, 0x27,
+ -1, 0xF2, 0x00, -1, 0x26, 0x01,
+ -1, 0xE0, 0x0F, 0x31, 0x2B, 0x0C, 0x0E, 0x08, 0x4E,
+ 0xF1, 0x37, 0x07, 0x10, 0x03, 0x0E, 0x09, 0x00,
+ -1, 0xE1, 0x00, 0x0E, 0x14, 0x03, 0x11, 0x07, 0x31,
+ 0xC1, 0x48, 0x08, 0x0F, 0x0C, 0x31, 0x36, 0x0F,
+ -1, 0x11, -2, 120, -1, 0x29, -1, 0x2c, -3 };
/* Supported displays in alphabetical order */
static struct fbtft_device_display displays[] = {
.buswidth = 8,
.backlight = 1,
},
- .startbyte = 0b01110000,
+ .startbyte = 0x70,
.bgr = true,
.gpios = (const struct fbtft_gpio []) {
{ "reset", 25 },
.backlight = 1,
.init_sequence = hy28b_init_sequence,
},
- .startbyte = 0b01110000,
+ .startbyte = 0x70,
.bgr = true,
- .fps= 50,
+ .fps = 50,
.gpios = (const struct fbtft_gpio []) {
{ "reset", 25 },
{ "led", 18 },
.buswidth = 8,
.backlight = 1,
},
- .startbyte = 0b01110000,
+ .startbyte = 0x70,
.bgr = true,
.gpios = (const struct fbtft_gpio []) {
{ "reset", 25 },
}
}
}, {
+ .name = "nokia5110",
+ .spi = &(struct spi_board_info) {
+ .modalias = "fb_ili9163",
+ .max_speed_hz = 12000000,
+ .mode = SPI_MODE_0,
+ .platform_data = &(struct fbtft_platform_data) {
+ .display = {
+ .buswidth = 8,
+ .backlight = 1,
+ },
+ .bgr = true,
+ .gpios = (const struct fbtft_gpio []) {
+ {},
+ },
+ }
+ }
+ }, {
+
.name = "piscreen",
.spi = &(struct spi_board_info) {
.modalias = "fb_ili9486",
for (i = 0; i < 16; i++) {
if ((data & 1) != (prev_data & 1))
gpio_set_value(par->gpio.db[i],
- (data & 1));
+ data & 1);
data >>= 1;
prev_data >>= 1;
}
}
#else
for (i = 0; i < 16; i++) {
- gpio_set_value(par->gpio.db[i], (data & 1));
+ gpio_set_value(par->gpio.db[i], data & 1);
data >>= 1;
}
#endif
}
par->fbtftops.write_register = fbtft_write_reg8_bus9;
par->fbtftops.write_vmem = fbtft_write_vmem16_bus9;
- sdev->bits_per_word=9;
+ sdev->bits_per_word = 9;
ret = sdev->master->setup(sdev);
if (ret) {
dev_warn(dev,
--- /dev/null
+/*
+ * Copyright (C) 2013 Noralf Tronnes
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __LINUX_FBTFT__INTERNAL_H
+#define __LINUX_FBTFT_INTERNAL_H
+
+void fbtft_sysfs_init(struct fbtft_par *par);
+void fbtft_sysfs_exit(struct fbtft_par *par);
+void fbtft_expand_debug_value(unsigned long *debug);
+int fbtft_gamma_parse_str(struct fbtft_par *par, unsigned long *curves,
+ const char *str, int size);
+
+#endif /* __LINUX_FBTFT_INTERNAL_H */
--- /dev/null
+source "drivers/staging/fsl-mc/bus/Kconfig"
--- /dev/null
+# Freescale Management Complex (MC) bus drivers
+obj-$(CONFIG_FSL_MC_BUS) += bus/
--- /dev/null
+* Add README file (with ASCII art) describing relationships between
+ DPAA2 objects and how combine them to make a NIC, an LS2 switch, etc.
+ Also, define all acronyms used.
+
+* Decide if multiple root fsl-mc buses will be supported per Linux instance,
+ and if so add support for this.
+
+* Add at least one device driver for a DPAA2 object (child device of the
+ fsl-mc bus).
+
+Please send any patches to Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
+german.rivera@freescale.com, devel@driverdev.osuosl.org,
+linux-kernel@vger.kernel.org
--- /dev/null
+#
+# Freescale Management Complex (MC) bus drivers
+#
+# Copyright (C) 2014 Freescale Semiconductor, Inc.
+#
+# This file is released under the GPLv2
+#
+
+config FSL_MC_BUS
+ tristate "Freescale Management Complex (MC) bus driver"
+ depends on OF && ARM64
+ help
+ Driver to enable the bus infrastructure for the Freescale
+ QorIQ Management Complex (fsl-mc). The fsl-mc is a hardware
+ module of the QorIQ LS2 SoCs, that does resource management
+ for hardware building-blocks in the SoC that can be used
+ to dynamically create networking hardware objects such as
+ network interfaces (NICs), crypto accelerator instances,
+ or L2 switches.
+
+ Only enable this option when building the kernel for
+ Freescale QorQIQ LS2xxxx SoCs.
+
+
--- /dev/null
+#
+# Freescale Management Complex (MC) bus drivers
+#
+# Copyright (C) 2014 Freescale Semiconductor, Inc.
+#
+# This file is released under the GPLv2
+#
+obj-$(CONFIG_FSL_MC_BUS) += mc-bus-driver.o
+
+mc-bus-driver-objs := mc-bus.o \
+ mc-sys.o \
+ dprc.o \
+ dpmng.o \
+ dprc-driver.o \
+ mc-allocator.o \
+ dpmcp.o \
+ dpbp.o
--- /dev/null
+/* Copyright 2013-2014 Freescale Semiconductor Inc.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+* * Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* * Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the distribution.
+* * Neither the name of the above-listed copyright holders nor the
+* names of any contributors may be used to endorse or promote products
+* derived from this software without specific prior written permission.
+*
+*
+* ALTERNATIVELY, this software may be distributed under the terms of the
+* GNU General Public License ("GPL") as published by the Free Software
+* Foundation, either version 2 of that License or (at your option) any
+* later version.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+*/
+#include "../include/mc-sys.h"
+#include "../include/mc-cmd.h"
+#include "../include/dpbp.h"
+#include "../include/dpbp-cmd.h"
+
+int dpbp_open(struct fsl_mc_io *mc_io, int dpbp_id, uint16_t *token)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_OPEN,
+ MC_CMD_PRI_LOW, 0);
+ cmd.params[0] |= mc_enc(0, 32, dpbp_id);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+
+ return err;
+}
+EXPORT_SYMBOL(dpbp_open);
+
+int dpbp_close(struct fsl_mc_io *mc_io, uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_CLOSE, MC_CMD_PRI_HIGH,
+ token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+EXPORT_SYMBOL(dpbp_close);
+
+int dpbp_create(struct fsl_mc_io *mc_io,
+ const struct dpbp_cfg *cfg,
+ uint16_t *token)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ (void)(cfg); /* unused */
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_CREATE,
+ MC_CMD_PRI_LOW, 0);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+
+ return 0;
+}
+
+int dpbp_destroy(struct fsl_mc_io *mc_io, uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_DESTROY,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpbp_enable(struct fsl_mc_io *mc_io, uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_ENABLE, MC_CMD_PRI_LOW,
+ token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+EXPORT_SYMBOL(dpbp_enable);
+
+int dpbp_disable(struct fsl_mc_io *mc_io, uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_DISABLE,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+EXPORT_SYMBOL(dpbp_disable);
+
+int dpbp_is_enabled(struct fsl_mc_io *mc_io, uint16_t token, int *en)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_IS_ENABLED, MC_CMD_PRI_LOW,
+ token);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *en = (int)mc_dec(cmd.params[0], 0, 1);
+
+ return 0;
+}
+
+int dpbp_reset(struct fsl_mc_io *mc_io, uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_RESET,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpbp_set_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint64_t irq_paddr,
+ uint32_t irq_val,
+ int user_irq_id)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_SET_IRQ,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 8, irq_index);
+ cmd.params[0] |= mc_enc(32, 32, irq_val);
+ cmd.params[1] |= mc_enc(0, 64, irq_paddr);
+ cmd.params[2] |= mc_enc(0, 32, user_irq_id);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpbp_get_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ int *type,
+ uint64_t *irq_paddr,
+ uint32_t *irq_val,
+ int *user_irq_id)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_IRQ,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *irq_val = (uint32_t)mc_dec(cmd.params[0], 0, 32);
+ *irq_paddr = (uint64_t)mc_dec(cmd.params[1], 0, 64);
+ *user_irq_id = (int)mc_dec(cmd.params[2], 0, 32);
+ *type = (int)mc_dec(cmd.params[2], 32, 32);
+ return 0;
+}
+
+int dpbp_set_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t en)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_SET_IRQ_ENABLE,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 8, en);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpbp_get_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t *en)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_IRQ_ENABLE,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *en = (uint8_t)mc_dec(cmd.params[0], 0, 8);
+ return 0;
+}
+
+int dpbp_set_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t mask)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_SET_IRQ_MASK,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, mask);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpbp_get_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *mask)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_IRQ_MASK,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *mask = (uint32_t)mc_dec(cmd.params[0], 0, 32);
+ return 0;
+}
+
+int dpbp_get_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *status)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_IRQ_STATUS,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *status = (uint32_t)mc_dec(cmd.params[0], 0, 32);
+ return 0;
+}
+
+int dpbp_clear_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t status)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_CLEAR_IRQ_STATUS,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, status);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpbp_get_attributes(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ struct dpbp_attr *attr)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_ATTR,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ attr->bpid = (uint16_t)mc_dec(cmd.params[0], 16, 16);
+ attr->id = (int)mc_dec(cmd.params[0], 32, 32);
+ attr->version.major = (uint16_t)mc_dec(cmd.params[1], 0, 16);
+ attr->version.minor = (uint16_t)mc_dec(cmd.params[1], 16, 16);
+ return 0;
+}
+EXPORT_SYMBOL(dpbp_get_attributes);
--- /dev/null
+/* Copyright 2013-2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef _FSL_DPMCP_CMD_H
+#define _FSL_DPMCP_CMD_H
+
+/* DPMCP Version */
+#define DPMCP_VER_MAJOR 2
+#define DPMCP_VER_MINOR 0
+
+/* Command IDs */
+#define DPMCP_CMDID_CLOSE 0x800
+#define DPMCP_CMDID_OPEN 0x80b
+#define DPMCP_CMDID_CREATE 0x90b
+#define DPMCP_CMDID_DESTROY 0x900
+
+#define DPMCP_CMDID_GET_ATTR 0x004
+#define DPMCP_CMDID_RESET 0x005
+
+#define DPMCP_CMDID_SET_IRQ 0x010
+#define DPMCP_CMDID_GET_IRQ 0x011
+#define DPMCP_CMDID_SET_IRQ_ENABLE 0x012
+#define DPMCP_CMDID_GET_IRQ_ENABLE 0x013
+#define DPMCP_CMDID_SET_IRQ_MASK 0x014
+#define DPMCP_CMDID_GET_IRQ_MASK 0x015
+#define DPMCP_CMDID_GET_IRQ_STATUS 0x016
+#define DPMCP_CMDID_CLEAR_IRQ_STATUS 0x017
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_CMD_CREATE(cmd, cfg) \
+ MC_CMD_OP(cmd, 0, 0, 32, int, cfg->portal_id)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_CMD_SET_IRQ(cmd, irq_index, irq_addr, irq_val, user_irq_id) \
+do { \
+ MC_CMD_OP(cmd, 0, 0, 8, uint8_t, irq_index);\
+ MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_val);\
+ MC_CMD_OP(cmd, 1, 0, 64, uint64_t, irq_addr); \
+ MC_CMD_OP(cmd, 2, 0, 32, int, user_irq_id); \
+} while (0)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_CMD_GET_IRQ(cmd, irq_index) \
+ MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_RSP_GET_IRQ(cmd, type, irq_addr, irq_val, user_irq_id) \
+do { \
+ MC_RSP_OP(cmd, 0, 0, 32, uint32_t, irq_val); \
+ MC_RSP_OP(cmd, 1, 0, 64, uint64_t, irq_addr); \
+ MC_RSP_OP(cmd, 2, 0, 32, int, user_irq_id); \
+ MC_RSP_OP(cmd, 2, 32, 32, int, type); \
+} while (0)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_CMD_SET_IRQ_ENABLE(cmd, irq_index, en) \
+do { \
+ MC_CMD_OP(cmd, 0, 0, 8, uint8_t, en); \
+ MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index);\
+} while (0)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
+ MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_RSP_GET_IRQ_ENABLE(cmd, en) \
+ MC_RSP_OP(cmd, 0, 0, 8, uint8_t, en)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
+do { \
+ MC_CMD_OP(cmd, 0, 0, 32, uint32_t, mask);\
+ MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index);\
+} while (0)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_CMD_GET_IRQ_MASK(cmd, irq_index) \
+ MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_RSP_GET_IRQ_MASK(cmd, mask) \
+ MC_RSP_OP(cmd, 0, 0, 32, uint32_t, mask)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_CMD_GET_IRQ_STATUS(cmd, irq_index) \
+ MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_RSP_GET_IRQ_STATUS(cmd, status) \
+ MC_RSP_OP(cmd, 0, 0, 32, uint32_t, status)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
+do { \
+ MC_CMD_OP(cmd, 0, 0, 32, uint32_t, status); \
+ MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index);\
+} while (0)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_RSP_GET_ATTRIBUTES(cmd, attr) \
+do { \
+ MC_RSP_OP(cmd, 0, 32, 32, int, attr->id);\
+ MC_RSP_OP(cmd, 1, 0, 16, uint16_t, attr->version.major);\
+ MC_RSP_OP(cmd, 1, 16, 16, uint16_t, attr->version.minor);\
+} while (0)
+
+#endif /* _FSL_DPMCP_CMD_H */
--- /dev/null
+/* Copyright 2013-2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "../include/mc-sys.h"
+#include "../include/mc-cmd.h"
+#include "dpmcp.h"
+#include "dpmcp-cmd.h"
+
+int dpmcp_open(struct fsl_mc_io *mc_io, int dpmcp_id, uint16_t *token)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_OPEN,
+ MC_CMD_PRI_LOW, 0);
+ cmd.params[0] |= mc_enc(0, 32, dpmcp_id);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+
+ return err;
+}
+
+int dpmcp_close(struct fsl_mc_io *mc_io, uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_CLOSE, MC_CMD_PRI_HIGH,
+ token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpmcp_create(struct fsl_mc_io *mc_io,
+ const struct dpmcp_cfg *cfg,
+ uint16_t *token)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_CREATE,
+ MC_CMD_PRI_LOW, 0);
+ cmd.params[0] |= mc_enc(0, 32, cfg->portal_id);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+
+ return 0;
+}
+
+int dpmcp_destroy(struct fsl_mc_io *mc_io, uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_DESTROY,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpmcp_reset(struct fsl_mc_io *mc_io, uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_RESET,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpmcp_set_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint64_t irq_addr,
+ uint32_t irq_val,
+ int user_irq_id)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_SET_IRQ,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 8, irq_index);
+ cmd.params[0] |= mc_enc(32, 32, irq_val);
+ cmd.params[1] |= mc_enc(0, 64, irq_addr);
+ cmd.params[2] |= mc_enc(0, 32, user_irq_id);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpmcp_get_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ int *type,
+ uint64_t *irq_addr,
+ uint32_t *irq_val,
+ int *user_irq_id)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_IRQ,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *irq_val = (uint32_t)mc_dec(cmd.params[0], 0, 32);
+ *irq_addr = (uint64_t)mc_dec(cmd.params[1], 0, 64);
+ *user_irq_id = (int)mc_dec(cmd.params[2], 0, 32);
+ *type = (int)mc_dec(cmd.params[2], 32, 32);
+ return 0;
+}
+
+int dpmcp_set_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t en)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_SET_IRQ_ENABLE,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 8, en);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpmcp_get_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t *en)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_IRQ_ENABLE,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *en = (uint8_t)mc_dec(cmd.params[0], 0, 8);
+ return 0;
+}
+
+int dpmcp_set_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t mask)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_SET_IRQ_MASK,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, mask);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpmcp_get_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *mask)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_IRQ_MASK,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *mask = (uint32_t)mc_dec(cmd.params[0], 0, 32);
+ return 0;
+}
+
+int dpmcp_get_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *status)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_IRQ_STATUS,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *status = (uint32_t)mc_dec(cmd.params[0], 0, 32);
+ return 0;
+}
+
+int dpmcp_clear_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t status)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_CLEAR_IRQ_STATUS,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, status);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpmcp_get_attributes(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ struct dpmcp_attr *attr)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_ATTR,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ attr->id = (int)mc_dec(cmd.params[0], 32, 32);
+ attr->version.major = (uint16_t)mc_dec(cmd.params[1], 0, 16);
+ attr->version.minor = (uint16_t)mc_dec(cmd.params[1], 16, 16);
+ return 0;
+}
--- /dev/null
+/* Copyright 2013-2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __FSL_DPMCP_H
+#define __FSL_DPMCP_H
+
+/* Data Path Management Command Portal API
+ * Contains initialization APIs and runtime control APIs for DPMCP
+ */
+
+struct fsl_mc_io;
+
+/**
+ * dpmcp_open() - Open a control session for the specified object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dpmcp_id: DPMCP unique ID
+ * @token: Returned token; use in subsequent API calls
+ *
+ * This function can be used to open a control session for an
+ * already created object; an object may have been declared in
+ * the DPL or by calling the dpmcp_create function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent commands for
+ * this specific object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_open(struct fsl_mc_io *mc_io, int dpmcp_id, uint16_t *token);
+
+/* Get portal ID from pool */
+#define DPMCP_GET_PORTAL_ID_FROM_POOL (-1)
+
+/**
+ * dpmcp_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_close(struct fsl_mc_io *mc_io, uint16_t token);
+
+/**
+ * struct dpmcp_cfg() - Structure representing DPMCP configuration
+ * @portal_id: Portal ID; 'DPMCP_GET_PORTAL_ID_FROM_POOL' to get the portal ID
+ * from pool
+ */
+struct dpmcp_cfg {
+ int portal_id;
+};
+
+/**
+ * dpmcp_create() - Create the DPMCP object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cfg: Configuration structure
+ * @token: Returned token; use in subsequent API calls
+ *
+ * Create the DPMCP object, allocate required resources and
+ * perform required initialization.
+ *
+ * The object can be created either by declaring it in the
+ * DPL file, or by calling this function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent calls to
+ * this specific object. For objects that are created using the
+ * DPL file, call dpmcp_open function to get an authentication
+ * token first.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_create(struct fsl_mc_io *mc_io,
+ const struct dpmcp_cfg *cfg,
+ uint16_t *token);
+
+/**
+ * dpmcp_destroy() - Destroy the DPMCP object and release all its resources.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ *
+ * Return: '0' on Success; error code otherwise.
+ */
+int dpmcp_destroy(struct fsl_mc_io *mc_io, uint16_t token);
+
+/**
+ * dpmcp_reset() - Reset the DPMCP, returns the object to initial state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_reset(struct fsl_mc_io *mc_io, uint16_t token);
+
+/* IRQ */
+/*!
+ * @name dpmcp IRQ Index and Events
+ */
+#define DPMCP_IRQ_INDEX 0
+/*!< Irq index */
+#define DPMCP_IRQ_EVENT_CMD_DONE 0x00000001
+/*!< irq event - Indicates that the link state changed */
+/* @} */
+
+/**
+ * dpmcp_set_irq() - Set IRQ information for the DPMCP to trigger an interrupt.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ * @irq_index: Identifies the interrupt index to configure
+ * @irq_addr: Address that must be written to
+ * signal a message-based interrupt
+ * @irq_val: Value to write into irq_addr address
+ * @user_irq_id: A user defined number associated with this IRQ
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_set_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint64_t irq_addr,
+ uint32_t irq_val,
+ int user_irq_id);
+
+/**
+ * dpmcp_get_irq() - Get IRQ information from the DPMCP.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ * @irq_index: The interrupt index to configure
+ * @type: Interrupt type: 0 represents message interrupt
+ * type (both irq_addr and irq_val are valid)
+ * @irq_addr: Returned address that must be written to
+ * signal the message-based interrupt
+ * @irq_val: Value to write into irq_addr address
+ * @user_irq_id: A user defined number associated with this IRQ
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_get_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ int *type,
+ uint64_t *irq_addr,
+ uint32_t *irq_val,
+ int *user_irq_id);
+
+/**
+ * dpmcp_set_irq_enable() - Set overall interrupt state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ * @irq_index: The interrupt index to configure
+ * @en: Interrupt state - enable = 1, disable = 0
+ *
+ * Allows GPP software to control when interrupts are generated.
+ * Each interrupt can have up to 32 causes. The enable/disable control's the
+ * overall interrupt state. if the interrupt is disabled no causes will cause
+ * an interrupt.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_set_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t en);
+
+/**
+ * dpmcp_get_irq_enable() - Get overall interrupt state
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ * @irq_index: The interrupt index to configure
+ * @en: Returned interrupt state - enable = 1, disable = 0
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_get_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t *en);
+
+/**
+ * dpmcp_set_irq_mask() - Set interrupt mask.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ * @irq_index: The interrupt index to configure
+ * @mask: Event mask to trigger interrupt;
+ * each bit:
+ * 0 = ignore event
+ * 1 = consider event for asserting IRQ
+ *
+ * Every interrupt can have up to 32 causes and the interrupt model supports
+ * masking/unmasking each cause independently
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_set_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t mask);
+
+/**
+ * dpmcp_get_irq_mask() - Get interrupt mask.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ * @irq_index: The interrupt index to configure
+ * @mask: Returned event mask to trigger interrupt
+ *
+ * Every interrupt can have up to 32 causes and the interrupt model supports
+ * masking/unmasking each cause independently
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_get_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *mask);
+
+/**
+ * dpmcp_get_irq_status() - Get the current status of any pending interrupts.
+ *
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ * @irq_index: The interrupt index to configure
+ * @status: Returned interrupts status - one bit per cause:
+ * 0 = no interrupt pending
+ * 1 = interrupt pending
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_get_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *status);
+
+/**
+ * dpmcp_clear_irq_status() - Clear a pending interrupt's status
+ *
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ * @irq_index: The interrupt index to configure
+ * @status: Bits to clear (W1C) - one bit per cause:
+ * 0 = don't change
+ * 1 = clear status bit
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_clear_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t status);
+
+/**
+ * struct dpmcp_attr - Structure representing DPMCP attributes
+ * @id: DPMCP object ID
+ * @version: DPMCP version
+ */
+struct dpmcp_attr {
+ int id;
+ /**
+ * struct version - Structure representing DPMCP version
+ * @major: DPMCP major version
+ * @minor: DPMCP minor version
+ */
+ struct {
+ uint16_t major;
+ uint16_t minor;
+ } version;
+};
+
+/**
+ * dpmcp_get_attributes - Retrieve DPMCP attributes.
+ *
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ * @attr: Returned object's attributes
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_get_attributes(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ struct dpmcp_attr *attr);
+
+#endif /* __FSL_DPMCP_H */
--- /dev/null
+/* Copyright 2013-2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*************************************************************************//*
+ dpmng-cmd.h
+
+ defines portal commands
+
+ *//**************************************************************************/
+
+#ifndef __FSL_DPMNG_CMD_H
+#define __FSL_DPMNG_CMD_H
+
+/* Command IDs */
+#define DPMNG_CMDID_GET_CONT_ID 0x830
+#define DPMNG_CMDID_GET_VERSION 0x831
+
+#endif /* __FSL_DPMNG_CMD_H */
--- /dev/null
+/* Copyright 2013-2014 Freescale Semiconductor Inc.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+* * Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* * Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the distribution.
+* * Neither the name of the above-listed copyright holders nor the
+* names of any contributors may be used to endorse or promote products
+* derived from this software without specific prior written permission.
+*
+*
+* ALTERNATIVELY, this software may be distributed under the terms of the
+* GNU General Public License ("GPL") as published by the Free Software
+* Foundation, either version 2 of that License or (at your option) any
+* later version.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+*/
+#include "../include/mc-sys.h"
+#include "../include/mc-cmd.h"
+#include "../include/dpmng.h"
+#include "dpmng-cmd.h"
+
+int mc_get_version(struct fsl_mc_io *mc_io, struct mc_version *mc_ver_info)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMNG_CMDID_GET_VERSION,
+ MC_CMD_PRI_LOW, 0);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ mc_ver_info->revision = mc_dec(cmd.params[0], 0, 32);
+ mc_ver_info->major = mc_dec(cmd.params[0], 32, 32);
+ mc_ver_info->minor = mc_dec(cmd.params[1], 0, 32);
+
+ return 0;
+}
+
+int dpmng_get_container_id(struct fsl_mc_io *mc_io, int *container_id)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMNG_CMDID_GET_CONT_ID,
+ MC_CMD_PRI_LOW, 0);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *container_id = mc_dec(cmd.params[0], 0, 32);
+
+ return 0;
+}
+
--- /dev/null
+/* Copyright 2013-2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*************************************************************************//*
+ dprc-cmd.h
+
+ defines dprc portal commands
+
+ *//**************************************************************************/
+
+#ifndef _FSL_DPRC_CMD_H
+#define _FSL_DPRC_CMD_H
+
+/* DPRC Version */
+#define DPRC_VER_MAJOR 3
+#define DPRC_VER_MINOR 0
+
+/* Command IDs */
+#define DPRC_CMDID_CLOSE 0x800
+#define DPRC_CMDID_OPEN 0x805
+#define DPRC_CMDID_CREATE 0x905
+
+#define DPRC_CMDID_GET_ATTR 0x004
+#define DPRC_CMDID_RESET_CONT 0x005
+
+#define DPRC_CMDID_SET_IRQ 0x010
+#define DPRC_CMDID_GET_IRQ 0x011
+#define DPRC_CMDID_SET_IRQ_ENABLE 0x012
+#define DPRC_CMDID_GET_IRQ_ENABLE 0x013
+#define DPRC_CMDID_SET_IRQ_MASK 0x014
+#define DPRC_CMDID_GET_IRQ_MASK 0x015
+#define DPRC_CMDID_GET_IRQ_STATUS 0x016
+#define DPRC_CMDID_CLEAR_IRQ_STATUS 0x017
+
+#define DPRC_CMDID_CREATE_CONT 0x151
+#define DPRC_CMDID_DESTROY_CONT 0x152
+#define DPRC_CMDID_SET_RES_QUOTA 0x155
+#define DPRC_CMDID_GET_RES_QUOTA 0x156
+#define DPRC_CMDID_ASSIGN 0x157
+#define DPRC_CMDID_UNASSIGN 0x158
+#define DPRC_CMDID_GET_OBJ_COUNT 0x159
+#define DPRC_CMDID_GET_OBJ 0x15A
+#define DPRC_CMDID_GET_RES_COUNT 0x15B
+#define DPRC_CMDID_GET_RES_IDS 0x15C
+#define DPRC_CMDID_GET_OBJ_REG 0x15E
+
+#define DPRC_CMDID_CONNECT 0x167
+#define DPRC_CMDID_DISCONNECT 0x168
+#define DPRC_CMDID_GET_POOL 0x169
+#define DPRC_CMDID_GET_POOL_COUNT 0x16A
+#define DPRC_CMDID_GET_PORTAL_PADDR 0x16B
+
+#define DPRC_CMDID_GET_CONNECTION 0x16C
+
+#endif /* _FSL_DPRC_CMD_H */
--- /dev/null
+/*
+ * Freescale data path resource container (DPRC) driver
+ *
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ * Author: German Rivera <German.Rivera@freescale.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include "../include/mc-private.h"
+#include "../include/mc-sys.h"
+#include <linux/module.h>
+#include <linux/slab.h>
+#include "dprc-cmd.h"
+
+struct dprc_child_objs {
+ int child_count;
+ struct dprc_obj_desc *child_array;
+};
+
+static int __fsl_mc_device_remove_if_not_in_mc(struct device *dev, void *data)
+{
+ int i;
+ struct dprc_child_objs *objs;
+ struct fsl_mc_device *mc_dev;
+
+ WARN_ON(!dev);
+ WARN_ON(!data);
+ mc_dev = to_fsl_mc_device(dev);
+ objs = data;
+
+ for (i = 0; i < objs->child_count; i++) {
+ struct dprc_obj_desc *obj_desc = &objs->child_array[i];
+
+ if (strlen(obj_desc->type) != 0 &&
+ FSL_MC_DEVICE_MATCH(mc_dev, obj_desc))
+ break;
+ }
+
+ if (i == objs->child_count)
+ fsl_mc_device_remove(mc_dev);
+
+ return 0;
+}
+
+static int __fsl_mc_device_remove(struct device *dev, void *data)
+{
+ WARN_ON(!dev);
+ WARN_ON(data);
+ fsl_mc_device_remove(to_fsl_mc_device(dev));
+ return 0;
+}
+
+/**
+ * dprc_remove_devices - Removes devices for objects removed from a DPRC
+ *
+ * @mc_bus_dev: pointer to the fsl-mc device that represents a DPRC object
+ * @obj_desc_array: array of object descriptors for child objects currently
+ * present in the DPRC in the MC.
+ * @num_child_objects_in_mc: number of entries in obj_desc_array
+ *
+ * Synchronizes the state of the Linux bus driver with the actual state of
+ * the MC by removing devices that represent MC objects that have
+ * been dynamically removed in the physical DPRC.
+ */
+static void dprc_remove_devices(struct fsl_mc_device *mc_bus_dev,
+ struct dprc_obj_desc *obj_desc_array,
+ int num_child_objects_in_mc)
+{
+ if (num_child_objects_in_mc != 0) {
+ /*
+ * Remove child objects that are in the DPRC in Linux,
+ * but not in the MC:
+ */
+ struct dprc_child_objs objs;
+
+ objs.child_count = num_child_objects_in_mc;
+ objs.child_array = obj_desc_array;
+ device_for_each_child(&mc_bus_dev->dev, &objs,
+ __fsl_mc_device_remove_if_not_in_mc);
+ } else {
+ /*
+ * There are no child objects for this DPRC in the MC.
+ * So, remove all the child devices from Linux:
+ */
+ device_for_each_child(&mc_bus_dev->dev, NULL,
+ __fsl_mc_device_remove);
+ }
+}
+
+static int __fsl_mc_device_match(struct device *dev, void *data)
+{
+ struct dprc_obj_desc *obj_desc = data;
+ struct fsl_mc_device *mc_dev = to_fsl_mc_device(dev);
+
+ return FSL_MC_DEVICE_MATCH(mc_dev, obj_desc);
+}
+
+static struct fsl_mc_device *fsl_mc_device_lookup(struct dprc_obj_desc
+ *obj_desc,
+ struct fsl_mc_device
+ *mc_bus_dev)
+{
+ struct device *dev;
+
+ dev = device_find_child(&mc_bus_dev->dev, obj_desc,
+ __fsl_mc_device_match);
+
+ return dev ? to_fsl_mc_device(dev) : NULL;
+}
+
+/**
+ * check_plugged_state_change - Check change in an MC object's plugged state
+ *
+ * @mc_dev: pointer to the fsl-mc device for a given MC object
+ * @obj_desc: pointer to the MC object's descriptor in the MC
+ *
+ * If the plugged state has changed from unplugged to plugged, the fsl-mc
+ * device is bound to the corresponding device driver.
+ * If the plugged state has changed from plugged to unplugged, the fsl-mc
+ * device is unbound from the corresponding device driver.
+ */
+static void check_plugged_state_change(struct fsl_mc_device *mc_dev,
+ struct dprc_obj_desc *obj_desc)
+{
+ int error;
+ uint32_t plugged_flag_at_mc =
+ (obj_desc->state & DPRC_OBJ_STATE_PLUGGED);
+
+ if (plugged_flag_at_mc !=
+ (mc_dev->obj_desc.state & DPRC_OBJ_STATE_PLUGGED)) {
+ if (plugged_flag_at_mc) {
+ mc_dev->obj_desc.state |= DPRC_OBJ_STATE_PLUGGED;
+ error = device_attach(&mc_dev->dev);
+ if (error < 0) {
+ dev_err(&mc_dev->dev,
+ "device_attach() failed: %d\n",
+ error);
+ }
+ } else {
+ mc_dev->obj_desc.state &= ~DPRC_OBJ_STATE_PLUGGED;
+ device_release_driver(&mc_dev->dev);
+ }
+ }
+}
+
+/**
+ * dprc_add_new_devices - Adds devices to the logical bus for a DPRC
+ *
+ * @mc_bus_dev: pointer to the fsl-mc device that represents a DPRC object
+ * @obj_desc_array: array of device descriptors for child devices currently
+ * present in the physical DPRC.
+ * @num_child_objects_in_mc: number of entries in obj_desc_array
+ *
+ * Synchronizes the state of the Linux bus driver with the actual
+ * state of the MC by adding objects that have been newly discovered
+ * in the physical DPRC.
+ */
+static void dprc_add_new_devices(struct fsl_mc_device *mc_bus_dev,
+ struct dprc_obj_desc *obj_desc_array,
+ int num_child_objects_in_mc)
+{
+ int error;
+ int i;
+
+ for (i = 0; i < num_child_objects_in_mc; i++) {
+ struct fsl_mc_device *child_dev;
+ struct dprc_obj_desc *obj_desc = &obj_desc_array[i];
+
+ if (strlen(obj_desc->type) == 0)
+ continue;
+
+ /*
+ * Check if device is already known to Linux:
+ */
+ child_dev = fsl_mc_device_lookup(obj_desc, mc_bus_dev);
+ if (child_dev) {
+ check_plugged_state_change(child_dev, obj_desc);
+ continue;
+ }
+
+ error = fsl_mc_device_add(obj_desc, NULL, &mc_bus_dev->dev,
+ &child_dev);
+ if (error < 0)
+ continue;
+ }
+}
+
+static void dprc_init_all_resource_pools(struct fsl_mc_device *mc_bus_dev)
+{
+ int pool_type;
+ struct fsl_mc_bus *mc_bus = to_fsl_mc_bus(mc_bus_dev);
+
+ for (pool_type = 0; pool_type < FSL_MC_NUM_POOL_TYPES; pool_type++) {
+ struct fsl_mc_resource_pool *res_pool =
+ &mc_bus->resource_pools[pool_type];
+
+ res_pool->type = pool_type;
+ res_pool->max_count = 0;
+ res_pool->free_count = 0;
+ res_pool->mc_bus = mc_bus;
+ INIT_LIST_HEAD(&res_pool->free_list);
+ mutex_init(&res_pool->mutex);
+ }
+}
+
+static void dprc_cleanup_resource_pool(struct fsl_mc_device *mc_bus_dev,
+ enum fsl_mc_pool_type pool_type)
+{
+ struct fsl_mc_resource *resource;
+ struct fsl_mc_resource *next;
+ struct fsl_mc_bus *mc_bus = to_fsl_mc_bus(mc_bus_dev);
+ struct fsl_mc_resource_pool *res_pool =
+ &mc_bus->resource_pools[pool_type];
+ int free_count = 0;
+
+ WARN_ON(res_pool->type != pool_type);
+ WARN_ON(res_pool->free_count != res_pool->max_count);
+
+ list_for_each_entry_safe(resource, next, &res_pool->free_list, node) {
+ free_count++;
+ WARN_ON(resource->type != res_pool->type);
+ WARN_ON(resource->parent_pool != res_pool);
+ devm_kfree(&mc_bus_dev->dev, resource);
+ }
+
+ WARN_ON(free_count != res_pool->free_count);
+}
+
+static void dprc_cleanup_all_resource_pools(struct fsl_mc_device *mc_bus_dev)
+{
+ int pool_type;
+
+ for (pool_type = 0; pool_type < FSL_MC_NUM_POOL_TYPES; pool_type++)
+ dprc_cleanup_resource_pool(mc_bus_dev, pool_type);
+}
+
+/**
+ * dprc_scan_objects - Discover objects in a DPRC
+ *
+ * @mc_bus_dev: pointer to the fsl-mc device that represents a DPRC object
+ *
+ * Detects objects added and removed from a DPRC and synchronizes the
+ * state of the Linux bus driver, MC by adding and removing
+ * devices accordingly.
+ * Two types of devices can be found in a DPRC: allocatable objects (e.g.,
+ * dpbp, dpmcp) and non-allocatable devices (e.g., dprc, dpni).
+ * All allocatable devices needed to be probed before all non-allocatable
+ * devices, to ensure that device drivers for non-allocatable
+ * devices can allocate any type of allocatable devices.
+ * That is, we need to ensure that the corresponding resource pools are
+ * populated before they can get allocation requests from probe callbacks
+ * of the device drivers for the non-allocatable devices.
+ */
+int dprc_scan_objects(struct fsl_mc_device *mc_bus_dev)
+{
+ int num_child_objects;
+ int dprc_get_obj_failures;
+ int error;
+ struct dprc_obj_desc *child_obj_desc_array = NULL;
+
+ error = dprc_get_obj_count(mc_bus_dev->mc_io,
+ mc_bus_dev->mc_handle,
+ &num_child_objects);
+ if (error < 0) {
+ dev_err(&mc_bus_dev->dev, "dprc_get_obj_count() failed: %d\n",
+ error);
+ return error;
+ }
+
+ if (num_child_objects != 0) {
+ int i;
+
+ child_obj_desc_array =
+ devm_kmalloc_array(&mc_bus_dev->dev, num_child_objects,
+ sizeof(*child_obj_desc_array),
+ GFP_KERNEL);
+ if (!child_obj_desc_array)
+ return -ENOMEM;
+
+ /*
+ * Discover objects currently present in the physical DPRC:
+ */
+ dprc_get_obj_failures = 0;
+ for (i = 0; i < num_child_objects; i++) {
+ struct dprc_obj_desc *obj_desc =
+ &child_obj_desc_array[i];
+
+ error = dprc_get_obj(mc_bus_dev->mc_io,
+ mc_bus_dev->mc_handle,
+ i, obj_desc);
+ if (error < 0) {
+ dev_err(&mc_bus_dev->dev,
+ "dprc_get_obj(i=%d) failed: %d\n",
+ i, error);
+ /*
+ * Mark the obj entry as "invalid", by using the
+ * empty string as obj type:
+ */
+ obj_desc->type[0] = '\0';
+ obj_desc->id = error;
+ dprc_get_obj_failures++;
+ continue;
+ }
+
+ dev_dbg(&mc_bus_dev->dev,
+ "Discovered object: type %s, id %d\n",
+ obj_desc->type, obj_desc->id);
+ }
+
+ if (dprc_get_obj_failures != 0) {
+ dev_err(&mc_bus_dev->dev,
+ "%d out of %d devices could not be retrieved\n",
+ dprc_get_obj_failures, num_child_objects);
+ }
+ }
+
+ dprc_remove_devices(mc_bus_dev, child_obj_desc_array,
+ num_child_objects);
+
+ dprc_add_new_devices(mc_bus_dev, child_obj_desc_array,
+ num_child_objects);
+
+ if (child_obj_desc_array)
+ devm_kfree(&mc_bus_dev->dev, child_obj_desc_array);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(dprc_scan_objects);
+
+/**
+ * dprc_scan_container - Scans a physical DPRC and synchronizes Linux bus state
+ *
+ * @mc_bus_dev: pointer to the fsl-mc device that represents a DPRC object
+ *
+ * Scans the physical DPRC and synchronizes the state of the Linux
+ * bus driver with the actual state of the MC by adding and removing
+ * devices as appropriate.
+ */
+int dprc_scan_container(struct fsl_mc_device *mc_bus_dev)
+{
+ int error;
+ struct fsl_mc_bus *mc_bus = to_fsl_mc_bus(mc_bus_dev);
+
+ dprc_init_all_resource_pools(mc_bus_dev);
+
+ /*
+ * Discover objects in the DPRC:
+ */
+ mutex_lock(&mc_bus->scan_mutex);
+ error = dprc_scan_objects(mc_bus_dev);
+ mutex_unlock(&mc_bus->scan_mutex);
+ if (error < 0)
+ goto error;
+
+ return 0;
+error:
+ dprc_cleanup_all_resource_pools(mc_bus_dev);
+ return error;
+}
+EXPORT_SYMBOL_GPL(dprc_scan_container);
+
+/**
+ * dprc_probe - callback invoked when a DPRC is being bound to this driver
+ *
+ * @mc_dev: Pointer to fsl-mc device representing a DPRC
+ *
+ * It opens the physical DPRC in the MC.
+ * It scans the DPRC to discover the MC objects contained in it.
+ * It creates the interrupt pool for the MC bus associated with the DPRC.
+ * It configures the interrupts for the DPRC device itself.
+ */
+static int dprc_probe(struct fsl_mc_device *mc_dev)
+{
+ int error;
+ size_t region_size;
+ struct fsl_mc_bus *mc_bus = to_fsl_mc_bus(mc_dev);
+
+ if (WARN_ON(strcmp(mc_dev->obj_desc.type, "dprc") != 0))
+ return -EINVAL;
+
+ if (!mc_dev->mc_io) {
+ /*
+ * This is a child DPRC:
+ */
+ if (WARN_ON(mc_dev->obj_desc.region_count == 0))
+ return -EINVAL;
+
+ region_size = mc_dev->regions[0].end -
+ mc_dev->regions[0].start + 1;
+
+ error = fsl_create_mc_io(&mc_dev->dev,
+ mc_dev->regions[0].start,
+ region_size,
+ NULL, 0, &mc_dev->mc_io);
+ if (error < 0)
+ return error;
+ }
+
+ error = dprc_open(mc_dev->mc_io, mc_dev->obj_desc.id,
+ &mc_dev->mc_handle);
+ if (error < 0) {
+ dev_err(&mc_dev->dev, "dprc_open() failed: %d\n", error);
+ goto error_cleanup_mc_io;
+ }
+
+ mutex_init(&mc_bus->scan_mutex);
+
+ /*
+ * Discover MC objects in DPRC object:
+ */
+ error = dprc_scan_container(mc_dev);
+ if (error < 0)
+ goto error_cleanup_open;
+
+ dev_info(&mc_dev->dev, "DPRC device bound to driver");
+ return 0;
+
+error_cleanup_open:
+ (void)dprc_close(mc_dev->mc_io, mc_dev->mc_handle);
+
+error_cleanup_mc_io:
+ fsl_destroy_mc_io(mc_dev->mc_io);
+ return error;
+}
+
+/**
+ * dprc_remove - callback invoked when a DPRC is being unbound from this driver
+ *
+ * @mc_dev: Pointer to fsl-mc device representing the DPRC
+ *
+ * It removes the DPRC's child objects from Linux (not from the MC) and
+ * closes the DPRC device in the MC.
+ * It tears down the interrupts that were configured for the DPRC device.
+ * It destroys the interrupt pool associated with this MC bus.
+ */
+static int dprc_remove(struct fsl_mc_device *mc_dev)
+{
+ int error;
+
+ if (WARN_ON(strcmp(mc_dev->obj_desc.type, "dprc") != 0))
+ return -EINVAL;
+ if (WARN_ON(!mc_dev->mc_io))
+ return -EINVAL;
+
+ device_for_each_child(&mc_dev->dev, NULL, __fsl_mc_device_remove);
+ dprc_cleanup_all_resource_pools(mc_dev);
+ error = dprc_close(mc_dev->mc_io, mc_dev->mc_handle);
+ if (error < 0)
+ dev_err(&mc_dev->dev, "dprc_close() failed: %d\n", error);
+
+ dev_info(&mc_dev->dev, "DPRC device unbound from driver");
+ return 0;
+}
+
+static const struct fsl_mc_device_match_id match_id_table[] = {
+ {
+ .vendor = FSL_MC_VENDOR_FREESCALE,
+ .obj_type = "dprc",
+ .ver_major = DPRC_VER_MAJOR,
+ .ver_minor = DPRC_VER_MINOR},
+ {.vendor = 0x0},
+};
+
+static struct fsl_mc_driver dprc_driver = {
+ .driver = {
+ .name = FSL_MC_DPRC_DRIVER_NAME,
+ .owner = THIS_MODULE,
+ .pm = NULL,
+ },
+ .match_id_table = match_id_table,
+ .probe = dprc_probe,
+ .remove = dprc_remove,
+};
+
+int __init dprc_driver_init(void)
+{
+ return fsl_mc_driver_register(&dprc_driver);
+}
+
+void __exit dprc_driver_exit(void)
+{
+ fsl_mc_driver_unregister(&dprc_driver);
+}
--- /dev/null
+/* Copyright 2013-2014 Freescale Semiconductor Inc.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+* * Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* * Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the distribution.
+* * Neither the name of the above-listed copyright holders nor the
+* names of any contributors may be used to endorse or promote products
+* derived from this software without specific prior written permission.
+*
+*
+* ALTERNATIVELY, this software may be distributed under the terms of the
+* GNU General Public License ("GPL") as published by the Free Software
+* Foundation, either version 2 of that License or (at your option) any
+* later version.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+*/
+#include "../include/mc-sys.h"
+#include "../include/mc-cmd.h"
+#include "../include/dprc.h"
+#include "dprc-cmd.h"
+
+int dprc_open(struct fsl_mc_io *mc_io, int container_id, uint16_t *token)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_OPEN, MC_CMD_PRI_LOW,
+ 0);
+ cmd.params[0] |= mc_enc(0, 32, container_id);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+
+ return 0;
+}
+EXPORT_SYMBOL(dprc_open);
+
+int dprc_close(struct fsl_mc_io *mc_io, uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_CLOSE, MC_CMD_PRI_HIGH,
+ token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+EXPORT_SYMBOL(dprc_close);
+
+int dprc_create_container(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ struct dprc_cfg *cfg,
+ int *child_container_id,
+ uint64_t *child_portal_paddr)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.params[0] |= mc_enc(32, 16, cfg->icid);
+ cmd.params[0] |= mc_enc(0, 32, cfg->options);
+ cmd.params[1] |= mc_enc(32, 32, cfg->portal_id);
+
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_CREATE_CONT,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *child_container_id = mc_dec(cmd.params[1], 0, 32);
+ *child_portal_paddr = mc_dec(cmd.params[2], 0, 64);
+
+ return 0;
+}
+
+int dprc_destroy_container(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_DESTROY_CONT,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, child_container_id);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_reset_container(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_RESET_CONT,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, child_container_id);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_get_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ int *type,
+ uint64_t *irq_paddr,
+ uint32_t *irq_val,
+ int *user_irq_id)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_IRQ,
+ MC_CMD_PRI_LOW,
+ token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *irq_val = mc_dec(cmd.params[0], 0, 32);
+ *irq_paddr = mc_dec(cmd.params[1], 0, 64);
+ *user_irq_id = mc_dec(cmd.params[2], 0, 32);
+ *type = mc_dec(cmd.params[2], 32, 32);
+
+ return 0;
+}
+
+int dprc_set_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint64_t irq_paddr,
+ uint32_t irq_val,
+ int user_irq_id)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_IRQ,
+ MC_CMD_PRI_LOW,
+ token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+ cmd.params[0] |= mc_enc(0, 32, irq_val);
+ cmd.params[1] |= mc_enc(0, 64, irq_paddr);
+ cmd.params[2] |= mc_enc(0, 32, user_irq_id);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_get_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t *en)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_IRQ_ENABLE,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *en = mc_dec(cmd.params[0], 0, 8);
+
+ return 0;
+}
+
+int dprc_set_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t en)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_IRQ_ENABLE,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 8, en);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_get_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *mask)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_IRQ_MASK,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *mask = mc_dec(cmd.params[0], 0, 32);
+
+ return 0;
+}
+
+int dprc_set_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t mask)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_IRQ_MASK,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, mask);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_get_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *status)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_IRQ_STATUS,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *status = mc_dec(cmd.params[0], 0, 32);
+
+ return 0;
+}
+
+int dprc_clear_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t status)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_CLEAR_IRQ_STATUS,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, status);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_get_attributes(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ struct dprc_attributes *attr)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_ATTR,
+ MC_CMD_PRI_LOW,
+ token);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ attr->container_id = mc_dec(cmd.params[0], 0, 32);
+ attr->icid = mc_dec(cmd.params[0], 32, 16);
+ attr->options = mc_dec(cmd.params[1], 0, 32);
+ attr->portal_id = mc_dec(cmd.params[1], 32, 32);
+ attr->version.major = mc_dec(cmd.params[2], 0, 16);
+ attr->version.minor = mc_dec(cmd.params[2], 16, 16);
+
+ return 0;
+}
+
+int dprc_set_res_quota(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id,
+ char *type,
+ uint16_t quota)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_RES_QUOTA,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, child_container_id);
+ cmd.params[0] |= mc_enc(32, 16, quota);
+ cmd.params[1] |= mc_enc(0, 8, type[0]);
+ cmd.params[1] |= mc_enc(8, 8, type[1]);
+ cmd.params[1] |= mc_enc(16, 8, type[2]);
+ cmd.params[1] |= mc_enc(24, 8, type[3]);
+ cmd.params[1] |= mc_enc(32, 8, type[4]);
+ cmd.params[1] |= mc_enc(40, 8, type[5]);
+ cmd.params[1] |= mc_enc(48, 8, type[6]);
+ cmd.params[1] |= mc_enc(56, 8, type[7]);
+ cmd.params[2] |= mc_enc(0, 8, type[8]);
+ cmd.params[2] |= mc_enc(8, 8, type[9]);
+ cmd.params[2] |= mc_enc(16, 8, type[10]);
+ cmd.params[2] |= mc_enc(24, 8, type[11]);
+ cmd.params[2] |= mc_enc(32, 8, type[12]);
+ cmd.params[2] |= mc_enc(40, 8, type[13]);
+ cmd.params[2] |= mc_enc(48, 8, type[14]);
+ cmd.params[2] |= mc_enc(56, 8, '\0');
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_get_res_quota(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id,
+ char *type,
+ uint16_t *quota)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_RES_QUOTA,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, child_container_id);
+ cmd.params[1] |= mc_enc(0, 8, type[0]);
+ cmd.params[1] |= mc_enc(8, 8, type[1]);
+ cmd.params[1] |= mc_enc(16, 8, type[2]);
+ cmd.params[1] |= mc_enc(24, 8, type[3]);
+ cmd.params[1] |= mc_enc(32, 8, type[4]);
+ cmd.params[1] |= mc_enc(40, 8, type[5]);
+ cmd.params[1] |= mc_enc(48, 8, type[6]);
+ cmd.params[1] |= mc_enc(56, 8, type[7]);
+ cmd.params[2] |= mc_enc(0, 8, type[8]);
+ cmd.params[2] |= mc_enc(8, 8, type[9]);
+ cmd.params[2] |= mc_enc(16, 8, type[10]);
+ cmd.params[2] |= mc_enc(24, 8, type[11]);
+ cmd.params[2] |= mc_enc(32, 8, type[12]);
+ cmd.params[2] |= mc_enc(40, 8, type[13]);
+ cmd.params[2] |= mc_enc(48, 8, type[14]);
+ cmd.params[2] |= mc_enc(56, 8, '\0');
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *quota = mc_dec(cmd.params[0], 32, 16);
+
+ return 0;
+}
+
+int dprc_assign(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int container_id,
+ struct dprc_res_req *res_req)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_ASSIGN,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, container_id);
+ cmd.params[0] |= mc_enc(32, 32, res_req->options);
+ cmd.params[1] |= mc_enc(0, 32, res_req->num);
+ cmd.params[1] |= mc_enc(32, 32, res_req->id_base_align);
+ cmd.params[2] |= mc_enc(0, 8, res_req->type[0]);
+ cmd.params[2] |= mc_enc(8, 8, res_req->type[1]);
+ cmd.params[2] |= mc_enc(16, 8, res_req->type[2]);
+ cmd.params[2] |= mc_enc(24, 8, res_req->type[3]);
+ cmd.params[2] |= mc_enc(32, 8, res_req->type[4]);
+ cmd.params[2] |= mc_enc(40, 8, res_req->type[5]);
+ cmd.params[2] |= mc_enc(48, 8, res_req->type[6]);
+ cmd.params[2] |= mc_enc(56, 8, res_req->type[7]);
+ cmd.params[3] |= mc_enc(0, 8, res_req->type[8]);
+ cmd.params[3] |= mc_enc(8, 8, res_req->type[9]);
+ cmd.params[3] |= mc_enc(16, 8, res_req->type[10]);
+ cmd.params[3] |= mc_enc(24, 8, res_req->type[11]);
+ cmd.params[3] |= mc_enc(32, 8, res_req->type[12]);
+ cmd.params[3] |= mc_enc(40, 8, res_req->type[13]);
+ cmd.params[3] |= mc_enc(48, 8, res_req->type[14]);
+ cmd.params[3] |= mc_enc(56, 8, res_req->type[15]);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_unassign(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id,
+ struct dprc_res_req *res_req)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_UNASSIGN,
+ MC_CMD_PRI_LOW,
+ token);
+ cmd.params[0] |= mc_enc(0, 32, child_container_id);
+ cmd.params[0] |= mc_enc(32, 32, res_req->options);
+ cmd.params[1] |= mc_enc(0, 32, res_req->num);
+ cmd.params[1] |= mc_enc(32, 32, res_req->id_base_align);
+ cmd.params[2] |= mc_enc(0, 8, res_req->type[0]);
+ cmd.params[2] |= mc_enc(8, 8, res_req->type[1]);
+ cmd.params[2] |= mc_enc(16, 8, res_req->type[2]);
+ cmd.params[2] |= mc_enc(24, 8, res_req->type[3]);
+ cmd.params[2] |= mc_enc(32, 8, res_req->type[4]);
+ cmd.params[2] |= mc_enc(40, 8, res_req->type[5]);
+ cmd.params[2] |= mc_enc(48, 8, res_req->type[6]);
+ cmd.params[2] |= mc_enc(56, 8, res_req->type[7]);
+ cmd.params[3] |= mc_enc(0, 8, res_req->type[8]);
+ cmd.params[3] |= mc_enc(8, 8, res_req->type[9]);
+ cmd.params[3] |= mc_enc(16, 8, res_req->type[10]);
+ cmd.params[3] |= mc_enc(24, 8, res_req->type[11]);
+ cmd.params[3] |= mc_enc(32, 8, res_req->type[12]);
+ cmd.params[3] |= mc_enc(40, 8, res_req->type[13]);
+ cmd.params[3] |= mc_enc(48, 8, res_req->type[14]);
+ cmd.params[3] |= mc_enc(56, 8, res_req->type[15]);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_get_pool_count(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int *pool_count)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_POOL_COUNT,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *pool_count = mc_dec(cmd.params[0], 0, 32);
+
+ return 0;
+}
+
+int dprc_get_pool(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int pool_index,
+ char *type)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_POOL,
+ MC_CMD_PRI_LOW,
+ token);
+ cmd.params[0] |= mc_enc(0, 32, pool_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ type[0] = mc_dec(cmd.params[1], 0, 8);
+ type[1] = mc_dec(cmd.params[1], 8, 8);
+ type[2] = mc_dec(cmd.params[1], 16, 8);
+ type[3] = mc_dec(cmd.params[1], 24, 8);
+ type[4] = mc_dec(cmd.params[1], 32, 8);
+ type[5] = mc_dec(cmd.params[1], 40, 8);
+ type[6] = mc_dec(cmd.params[1], 48, 8);
+ type[7] = mc_dec(cmd.params[1], 56, 8);
+ type[8] = mc_dec(cmd.params[2], 0, 8);
+ type[9] = mc_dec(cmd.params[2], 8, 8);
+ type[10] = mc_dec(cmd.params[2], 16, 8);
+ type[11] = mc_dec(cmd.params[2], 24, 8);
+ type[12] = mc_dec(cmd.params[2], 32, 8);
+ type[13] = mc_dec(cmd.params[2], 40, 8);
+ type[14] = mc_dec(cmd.params[2], 48, 8);
+ type[15] = '\0';
+
+ return 0;
+}
+
+int dprc_get_obj_count(struct fsl_mc_io *mc_io, uint16_t token, int *obj_count)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_COUNT,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *obj_count = mc_dec(cmd.params[0], 32, 32);
+
+ return 0;
+}
+EXPORT_SYMBOL(dprc_get_obj_count);
+
+int dprc_get_obj(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int obj_index,
+ struct dprc_obj_desc *obj_desc)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ,
+ MC_CMD_PRI_LOW,
+ token);
+ cmd.params[0] |= mc_enc(0, 32, obj_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ obj_desc->id = mc_dec(cmd.params[0], 32, 32);
+ obj_desc->vendor = mc_dec(cmd.params[1], 0, 16);
+ obj_desc->irq_count = mc_dec(cmd.params[1], 16, 8);
+ obj_desc->region_count = mc_dec(cmd.params[1], 24, 8);
+ obj_desc->state = mc_dec(cmd.params[1], 32, 32);
+ obj_desc->ver_major = mc_dec(cmd.params[2], 0, 16);
+ obj_desc->ver_minor = mc_dec(cmd.params[2], 16, 16);
+ obj_desc->type[0] = mc_dec(cmd.params[3], 0, 8);
+ obj_desc->type[1] = mc_dec(cmd.params[3], 8, 8);
+ obj_desc->type[2] = mc_dec(cmd.params[3], 16, 8);
+ obj_desc->type[3] = mc_dec(cmd.params[3], 24, 8);
+ obj_desc->type[4] = mc_dec(cmd.params[3], 32, 8);
+ obj_desc->type[5] = mc_dec(cmd.params[3], 40, 8);
+ obj_desc->type[6] = mc_dec(cmd.params[3], 48, 8);
+ obj_desc->type[7] = mc_dec(cmd.params[3], 56, 8);
+ obj_desc->type[8] = mc_dec(cmd.params[4], 0, 8);
+ obj_desc->type[9] = mc_dec(cmd.params[4], 8, 8);
+ obj_desc->type[10] = mc_dec(cmd.params[4], 16, 8);
+ obj_desc->type[11] = mc_dec(cmd.params[4], 24, 8);
+ obj_desc->type[12] = mc_dec(cmd.params[4], 32, 8);
+ obj_desc->type[13] = mc_dec(cmd.params[4], 40, 8);
+ obj_desc->type[14] = mc_dec(cmd.params[4], 48, 8);
+ obj_desc->type[15] = '\0';
+
+ return 0;
+}
+EXPORT_SYMBOL(dprc_get_obj);
+
+int dprc_get_res_count(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ char *type,
+ int *res_count)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ *res_count = 0;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_RES_COUNT,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[1] |= mc_enc(0, 8, type[0]);
+ cmd.params[1] |= mc_enc(8, 8, type[1]);
+ cmd.params[1] |= mc_enc(16, 8, type[2]);
+ cmd.params[1] |= mc_enc(24, 8, type[3]);
+ cmd.params[1] |= mc_enc(32, 8, type[4]);
+ cmd.params[1] |= mc_enc(40, 8, type[5]);
+ cmd.params[1] |= mc_enc(48, 8, type[6]);
+ cmd.params[1] |= mc_enc(56, 8, type[7]);
+ cmd.params[2] |= mc_enc(0, 8, type[8]);
+ cmd.params[2] |= mc_enc(8, 8, type[9]);
+ cmd.params[2] |= mc_enc(16, 8, type[10]);
+ cmd.params[2] |= mc_enc(24, 8, type[11]);
+ cmd.params[2] |= mc_enc(32, 8, type[12]);
+ cmd.params[2] |= mc_enc(40, 8, type[13]);
+ cmd.params[2] |= mc_enc(48, 8, type[14]);
+ cmd.params[2] |= mc_enc(56, 8, '\0');
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *res_count = mc_dec(cmd.params[0], 0, 32);
+
+ return 0;
+}
+EXPORT_SYMBOL(dprc_get_res_count);
+
+int dprc_get_res_ids(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ char *type,
+ struct dprc_res_ids_range_desc *range_desc)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_RES_IDS,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(42, 7, range_desc->iter_status);
+ cmd.params[1] |= mc_enc(0, 32, range_desc->base_id);
+ cmd.params[1] |= mc_enc(32, 32, range_desc->last_id);
+ cmd.params[2] |= mc_enc(0, 8, type[0]);
+ cmd.params[2] |= mc_enc(8, 8, type[1]);
+ cmd.params[2] |= mc_enc(16, 8, type[2]);
+ cmd.params[2] |= mc_enc(24, 8, type[3]);
+ cmd.params[2] |= mc_enc(32, 8, type[4]);
+ cmd.params[2] |= mc_enc(40, 8, type[5]);
+ cmd.params[2] |= mc_enc(48, 8, type[6]);
+ cmd.params[2] |= mc_enc(56, 8, type[7]);
+ cmd.params[3] |= mc_enc(0, 8, type[8]);
+ cmd.params[3] |= mc_enc(8, 8, type[9]);
+ cmd.params[3] |= mc_enc(16, 8, type[10]);
+ cmd.params[3] |= mc_enc(24, 8, type[11]);
+ cmd.params[3] |= mc_enc(32, 8, type[12]);
+ cmd.params[3] |= mc_enc(40, 8, type[13]);
+ cmd.params[3] |= mc_enc(48, 8, type[14]);
+ cmd.params[3] |= mc_enc(56, 8, '\0');
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ range_desc->iter_status = mc_dec(cmd.params[0], 42, 7);
+ range_desc->base_id = mc_dec(cmd.params[1], 0, 32);
+ range_desc->last_id = mc_dec(cmd.params[1], 32, 32);
+
+ return 0;
+}
+EXPORT_SYMBOL(dprc_get_res_ids);
+
+int dprc_get_portal_paddr(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int portal_id,
+ uint64_t *portal_addr)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_PORTAL_PADDR,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, portal_id);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *portal_addr = mc_dec(cmd.params[1], 0, 64);
+
+ return 0;
+}
+EXPORT_SYMBOL(dprc_get_portal_paddr);
+
+int dprc_get_obj_region(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ char *obj_type,
+ int obj_id,
+ uint8_t region_index,
+ struct dprc_region_desc *region_desc)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_REG,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, obj_id);
+ cmd.params[0] |= mc_enc(48, 8, region_index);
+ cmd.params[3] |= mc_enc(0, 8, obj_type[0]);
+ cmd.params[3] |= mc_enc(8, 8, obj_type[1]);
+ cmd.params[3] |= mc_enc(16, 8, obj_type[2]);
+ cmd.params[3] |= mc_enc(24, 8, obj_type[3]);
+ cmd.params[3] |= mc_enc(32, 8, obj_type[4]);
+ cmd.params[3] |= mc_enc(40, 8, obj_type[5]);
+ cmd.params[3] |= mc_enc(48, 8, obj_type[6]);
+ cmd.params[3] |= mc_enc(56, 8, obj_type[7]);
+ cmd.params[4] |= mc_enc(0, 8, obj_type[8]);
+ cmd.params[4] |= mc_enc(8, 8, obj_type[9]);
+ cmd.params[4] |= mc_enc(16, 8, obj_type[10]);
+ cmd.params[4] |= mc_enc(24, 8, obj_type[11]);
+ cmd.params[4] |= mc_enc(32, 8, obj_type[12]);
+ cmd.params[4] |= mc_enc(40, 8, obj_type[13]);
+ cmd.params[4] |= mc_enc(48, 8, obj_type[14]);
+ cmd.params[4] |= mc_enc(56, 8, '\0');
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ region_desc->base_paddr = mc_dec(cmd.params[1], 0, 64);
+ region_desc->size = mc_dec(cmd.params[2], 0, 32);
+
+ return 0;
+}
+EXPORT_SYMBOL(dprc_get_obj_region);
+
+int dprc_connect(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ const struct dprc_endpoint *endpoint1,
+ const struct dprc_endpoint *endpoint2)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_CONNECT,
+ MC_CMD_PRI_LOW,
+ token);
+ cmd.params[0] |= mc_enc(0, 32, endpoint1->id);
+ cmd.params[0] |= mc_enc(32, 32, endpoint1->interface_id);
+ cmd.params[1] |= mc_enc(0, 32, endpoint2->id);
+ cmd.params[1] |= mc_enc(32, 32, endpoint2->interface_id);
+ cmd.params[2] |= mc_enc(0, 8, endpoint1->type[0]);
+ cmd.params[2] |= mc_enc(8, 8, endpoint1->type[1]);
+ cmd.params[2] |= mc_enc(16, 8, endpoint1->type[2]);
+ cmd.params[2] |= mc_enc(24, 8, endpoint1->type[3]);
+ cmd.params[2] |= mc_enc(32, 8, endpoint1->type[4]);
+ cmd.params[2] |= mc_enc(40, 8, endpoint1->type[5]);
+ cmd.params[2] |= mc_enc(48, 8, endpoint1->type[6]);
+ cmd.params[2] |= mc_enc(56, 8, endpoint1->type[7]);
+ cmd.params[3] |= mc_enc(0, 8, endpoint1->type[8]);
+ cmd.params[3] |= mc_enc(8, 8, endpoint1->type[9]);
+ cmd.params[3] |= mc_enc(16, 8, endpoint1->type[10]);
+ cmd.params[3] |= mc_enc(24, 8, endpoint1->type[11]);
+ cmd.params[3] |= mc_enc(32, 8, endpoint1->type[12]);
+ cmd.params[3] |= mc_enc(40, 8, endpoint1->type[13]);
+ cmd.params[3] |= mc_enc(48, 8, endpoint1->type[14]);
+ cmd.params[3] |= mc_enc(56, 8, endpoint1->type[15]);
+ cmd.params[5] |= mc_enc(0, 8, endpoint2->type[0]);
+ cmd.params[5] |= mc_enc(8, 8, endpoint2->type[1]);
+ cmd.params[5] |= mc_enc(16, 8, endpoint2->type[2]);
+ cmd.params[5] |= mc_enc(24, 8, endpoint2->type[3]);
+ cmd.params[5] |= mc_enc(32, 8, endpoint2->type[4]);
+ cmd.params[5] |= mc_enc(40, 8, endpoint2->type[5]);
+ cmd.params[5] |= mc_enc(48, 8, endpoint2->type[6]);
+ cmd.params[5] |= mc_enc(56, 8, endpoint2->type[7]);
+ cmd.params[6] |= mc_enc(0, 8, endpoint2->type[8]);
+ cmd.params[6] |= mc_enc(8, 8, endpoint2->type[9]);
+ cmd.params[6] |= mc_enc(16, 8, endpoint2->type[10]);
+ cmd.params[6] |= mc_enc(24, 8, endpoint2->type[11]);
+ cmd.params[6] |= mc_enc(32, 8, endpoint2->type[12]);
+ cmd.params[6] |= mc_enc(40, 8, endpoint2->type[13]);
+ cmd.params[6] |= mc_enc(48, 8, endpoint2->type[14]);
+ cmd.params[6] |= mc_enc(56, 8, endpoint2->type[15]);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_disconnect(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ const struct dprc_endpoint *endpoint)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_DISCONNECT,
+ MC_CMD_PRI_LOW,
+ token);
+ cmd.params[0] |= mc_enc(0, 32, endpoint->id);
+ cmd.params[0] |= mc_enc(32, 32, endpoint->interface_id);
+ cmd.params[1] |= mc_enc(0, 8, endpoint->type[0]);
+ cmd.params[1] |= mc_enc(8, 8, endpoint->type[1]);
+ cmd.params[1] |= mc_enc(16, 8, endpoint->type[2]);
+ cmd.params[1] |= mc_enc(24, 8, endpoint->type[3]);
+ cmd.params[1] |= mc_enc(32, 8, endpoint->type[4]);
+ cmd.params[1] |= mc_enc(40, 8, endpoint->type[5]);
+ cmd.params[1] |= mc_enc(48, 8, endpoint->type[6]);
+ cmd.params[1] |= mc_enc(56, 8, endpoint->type[7]);
+ cmd.params[2] |= mc_enc(0, 8, endpoint->type[8]);
+ cmd.params[2] |= mc_enc(8, 8, endpoint->type[9]);
+ cmd.params[2] |= mc_enc(16, 8, endpoint->type[10]);
+ cmd.params[2] |= mc_enc(24, 8, endpoint->type[11]);
+ cmd.params[2] |= mc_enc(32, 8, endpoint->type[12]);
+ cmd.params[2] |= mc_enc(40, 8, endpoint->type[13]);
+ cmd.params[2] |= mc_enc(48, 8, endpoint->type[14]);
+ cmd.params[2] |= mc_enc(56, 8, endpoint->type[15]);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_get_connection(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ const struct dprc_endpoint *endpoint1,
+ struct dprc_endpoint *endpoint2,
+ int *state)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_CONNECTION,
+ MC_CMD_PRI_LOW,
+ token);
+ cmd.params[0] |= mc_enc(0, 32, endpoint1->id);
+ cmd.params[0] |= mc_enc(32, 32, endpoint1->interface_id);
+ cmd.params[1] |= mc_enc(0, 8, endpoint1->type[0]);
+ cmd.params[1] |= mc_enc(8, 8, endpoint1->type[1]);
+ cmd.params[1] |= mc_enc(16, 8, endpoint1->type[2]);
+ cmd.params[1] |= mc_enc(24, 8, endpoint1->type[3]);
+ cmd.params[1] |= mc_enc(32, 8, endpoint1->type[4]);
+ cmd.params[1] |= mc_enc(40, 8, endpoint1->type[5]);
+ cmd.params[1] |= mc_enc(48, 8, endpoint1->type[6]);
+ cmd.params[1] |= mc_enc(56, 8, endpoint1->type[7]);
+ cmd.params[2] |= mc_enc(0, 8, endpoint1->type[8]);
+ cmd.params[2] |= mc_enc(8, 8, endpoint1->type[9]);
+ cmd.params[2] |= mc_enc(16, 8, endpoint1->type[10]);
+ cmd.params[2] |= mc_enc(24, 8, endpoint1->type[11]);
+ cmd.params[2] |= mc_enc(32, 8, endpoint1->type[12]);
+ cmd.params[2] |= mc_enc(40, 8, endpoint1->type[13]);
+ cmd.params[2] |= mc_enc(48, 8, endpoint1->type[14]);
+ cmd.params[2] |= mc_enc(56, 8, endpoint1->type[15]);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ endpoint2->id = mc_dec(cmd.params[3], 0, 32);
+ endpoint2->interface_id = mc_dec(cmd.params[3], 32, 32);
+ endpoint2->type[0] = mc_dec(cmd.params[4], 0, 8);
+ endpoint2->type[1] = mc_dec(cmd.params[4], 8, 8);
+ endpoint2->type[2] = mc_dec(cmd.params[4], 16, 8);
+ endpoint2->type[3] = mc_dec(cmd.params[4], 24, 8);
+ endpoint2->type[4] = mc_dec(cmd.params[4], 32, 8);
+ endpoint2->type[5] = mc_dec(cmd.params[4], 40, 8);
+ endpoint2->type[6] = mc_dec(cmd.params[4], 48, 8);
+ endpoint2->type[7] = mc_dec(cmd.params[4], 56, 8);
+ endpoint2->type[8] = mc_dec(cmd.params[5], 0, 8);
+ endpoint2->type[9] = mc_dec(cmd.params[5], 8, 8);
+ endpoint2->type[10] = mc_dec(cmd.params[5], 16, 8);
+ endpoint2->type[11] = mc_dec(cmd.params[5], 24, 8);
+ endpoint2->type[12] = mc_dec(cmd.params[5], 32, 8);
+ endpoint2->type[13] = mc_dec(cmd.params[5], 40, 8);
+ endpoint2->type[14] = mc_dec(cmd.params[5], 48, 8);
+ endpoint2->type[15] = mc_dec(cmd.params[5], 56, 8);
+ *state = mc_dec(cmd.params[6], 0, 32);
+
+ return 0;
+}
--- /dev/null
+/*
+ * Freescale MC object device allocator driver
+ *
+ * Copyright (C) 2013 Freescale Semiconductor, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include "../include/mc-private.h"
+#include "../include/mc-sys.h"
+#include <linux/module.h>
+#include "../include/dpbp-cmd.h"
+#include "../include/dpcon-cmd.h"
+#include "dpmcp-cmd.h"
+#include "dpmcp.h"
+
+/**
+ * fsl_mc_resource_pool_add_device - add allocatable device to a resource
+ * pool of a given MC bus
+ *
+ * @mc_bus: pointer to the MC bus
+ * @pool_type: MC bus pool type
+ * @mc_dev: Pointer to allocatable MC object device
+ *
+ * It adds an allocatable MC object device to a container's resource pool of
+ * the given resource type
+ */
+static int __must_check fsl_mc_resource_pool_add_device(struct fsl_mc_bus
+ *mc_bus,
+ enum fsl_mc_pool_type
+ pool_type,
+ struct fsl_mc_device
+ *mc_dev)
+{
+ struct fsl_mc_resource_pool *res_pool;
+ struct fsl_mc_resource *resource;
+ struct fsl_mc_device *mc_bus_dev = &mc_bus->mc_dev;
+ int error = -EINVAL;
+ bool mutex_locked = false;
+
+ if (WARN_ON(pool_type < 0 || pool_type >= FSL_MC_NUM_POOL_TYPES))
+ goto out;
+ if (WARN_ON(!FSL_MC_IS_ALLOCATABLE(mc_dev->obj_desc.type)))
+ goto out;
+ if (WARN_ON(mc_dev->resource))
+ goto out;
+
+ res_pool = &mc_bus->resource_pools[pool_type];
+ if (WARN_ON(res_pool->type != pool_type))
+ goto out;
+ if (WARN_ON(res_pool->mc_bus != mc_bus))
+ goto out;
+
+ mutex_lock(&res_pool->mutex);
+ mutex_locked = true;
+
+ if (WARN_ON(res_pool->max_count < 0))
+ goto out;
+ if (WARN_ON(res_pool->free_count < 0 ||
+ res_pool->free_count > res_pool->max_count))
+ goto out;
+
+ resource = devm_kzalloc(&mc_bus_dev->dev, sizeof(*resource),
+ GFP_KERNEL);
+ if (!resource) {
+ error = -ENOMEM;
+ dev_err(&mc_bus_dev->dev,
+ "Failed to allocate memory for fsl_mc_resource\n");
+ goto out;
+ }
+
+ resource->type = pool_type;
+ resource->id = mc_dev->obj_desc.id;
+ resource->data = mc_dev;
+ resource->parent_pool = res_pool;
+ INIT_LIST_HEAD(&resource->node);
+ list_add_tail(&resource->node, &res_pool->free_list);
+ mc_dev->resource = resource;
+ res_pool->free_count++;
+ res_pool->max_count++;
+ error = 0;
+out:
+ if (mutex_locked)
+ mutex_unlock(&res_pool->mutex);
+
+ return error;
+}
+
+/**
+ * fsl_mc_resource_pool_remove_device - remove an allocatable device from a
+ * resource pool
+ *
+ * @mc_dev: Pointer to allocatable MC object device
+ *
+ * It permanently removes an allocatable MC object device from the resource
+ * pool, the device is currently in, as long as it is in the pool's free list.
+ */
+static int __must_check fsl_mc_resource_pool_remove_device(struct fsl_mc_device
+ *mc_dev)
+{
+ struct fsl_mc_device *mc_bus_dev;
+ struct fsl_mc_bus *mc_bus;
+ struct fsl_mc_resource_pool *res_pool;
+ struct fsl_mc_resource *resource;
+ int error = -EINVAL;
+ bool mutex_locked = false;
+
+ if (WARN_ON(!FSL_MC_IS_ALLOCATABLE(mc_dev->obj_desc.type)))
+ goto out;
+
+ resource = mc_dev->resource;
+ if (WARN_ON(resource->data != mc_dev))
+ goto out;
+
+ mc_bus_dev = to_fsl_mc_device(mc_dev->dev.parent);
+ mc_bus = to_fsl_mc_bus(mc_bus_dev);
+ res_pool = resource->parent_pool;
+ if (WARN_ON(res_pool != &mc_bus->resource_pools[resource->type]))
+ goto out;
+
+ mutex_lock(&res_pool->mutex);
+ mutex_locked = true;
+
+ if (WARN_ON(res_pool->max_count <= 0))
+ goto out;
+ if (WARN_ON(res_pool->free_count <= 0 ||
+ res_pool->free_count > res_pool->max_count))
+ goto out;
+
+ /*
+ * If the device is currently allocated, its resource is not
+ * in the free list and thus, the device cannot be removed.
+ */
+ if (list_empty(&resource->node)) {
+ error = -EBUSY;
+ dev_err(&mc_bus_dev->dev,
+ "Device %s cannot be removed from resource pool\n",
+ dev_name(&mc_dev->dev));
+ goto out;
+ }
+
+ list_del(&resource->node);
+ INIT_LIST_HEAD(&resource->node);
+ res_pool->free_count--;
+ res_pool->max_count--;
+
+ devm_kfree(&mc_bus_dev->dev, resource);
+ mc_dev->resource = NULL;
+ error = 0;
+out:
+ if (mutex_locked)
+ mutex_unlock(&res_pool->mutex);
+
+ return error;
+}
+
+static const char *const fsl_mc_pool_type_strings[] = {
+ [FSL_MC_POOL_DPMCP] = "dpmcp",
+ [FSL_MC_POOL_DPBP] = "dpbp",
+ [FSL_MC_POOL_DPCON] = "dpcon",
+};
+
+static int __must_check object_type_to_pool_type(const char *object_type,
+ enum fsl_mc_pool_type
+ *pool_type)
+{
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(fsl_mc_pool_type_strings); i++) {
+ if (strcmp(object_type, fsl_mc_pool_type_strings[i]) == 0) {
+ *pool_type = i;
+ return 0;
+ }
+ }
+
+ return -EINVAL;
+}
+
+int __must_check fsl_mc_resource_allocate(struct fsl_mc_bus *mc_bus,
+ enum fsl_mc_pool_type pool_type,
+ struct fsl_mc_resource **new_resource)
+{
+ struct fsl_mc_resource_pool *res_pool;
+ struct fsl_mc_resource *resource;
+ struct fsl_mc_device *mc_bus_dev = &mc_bus->mc_dev;
+ int error = -EINVAL;
+ bool mutex_locked = false;
+
+ BUILD_BUG_ON(ARRAY_SIZE(fsl_mc_pool_type_strings) !=
+ FSL_MC_NUM_POOL_TYPES);
+
+ *new_resource = NULL;
+ if (WARN_ON(pool_type < 0 || pool_type >= FSL_MC_NUM_POOL_TYPES))
+ goto error;
+
+ res_pool = &mc_bus->resource_pools[pool_type];
+ if (WARN_ON(res_pool->mc_bus != mc_bus))
+ goto error;
+
+ mutex_lock(&res_pool->mutex);
+ mutex_locked = true;
+ resource = list_first_entry_or_null(&res_pool->free_list,
+ struct fsl_mc_resource, node);
+
+ if (!resource) {
+ WARN_ON(res_pool->free_count != 0);
+ error = -ENXIO;
+ dev_err(&mc_bus_dev->dev,
+ "No more resources of type %s left\n",
+ fsl_mc_pool_type_strings[pool_type]);
+ goto error;
+ }
+
+ if (WARN_ON(resource->type != pool_type))
+ goto error;
+ if (WARN_ON(resource->parent_pool != res_pool))
+ goto error;
+ if (WARN_ON(res_pool->free_count <= 0 ||
+ res_pool->free_count > res_pool->max_count))
+ goto error;
+
+ list_del(&resource->node);
+ INIT_LIST_HEAD(&resource->node);
+
+ res_pool->free_count--;
+ mutex_unlock(&res_pool->mutex);
+ *new_resource = resource;
+ return 0;
+error:
+ if (mutex_locked)
+ mutex_unlock(&res_pool->mutex);
+
+ return error;
+}
+EXPORT_SYMBOL_GPL(fsl_mc_resource_allocate);
+
+void fsl_mc_resource_free(struct fsl_mc_resource *resource)
+{
+ struct fsl_mc_resource_pool *res_pool;
+ bool mutex_locked = false;
+
+ res_pool = resource->parent_pool;
+ if (WARN_ON(resource->type != res_pool->type))
+ goto out;
+
+ mutex_lock(&res_pool->mutex);
+ mutex_locked = true;
+ if (WARN_ON(res_pool->free_count < 0 ||
+ res_pool->free_count >= res_pool->max_count))
+ goto out;
+
+ if (WARN_ON(!list_empty(&resource->node)))
+ goto out;
+
+ list_add_tail(&resource->node, &res_pool->free_list);
+ res_pool->free_count++;
+out:
+ if (mutex_locked)
+ mutex_unlock(&res_pool->mutex);
+}
+EXPORT_SYMBOL_GPL(fsl_mc_resource_free);
+
+/**
+ * fsl_mc_portal_allocate - Allocates an MC portal
+ *
+ * @mc_dev: MC device for which the MC portal is to be allocated
+ * @mc_io_flags: Flags for the fsl_mc_io object that wraps the allocated
+ * MC portal.
+ * @new_mc_io: Pointer to area where the pointer to the fsl_mc_io object
+ * that wraps the allocated MC portal is to be returned
+ *
+ * This function allocates an MC portal from the device's parent DPRC,
+ * from the corresponding MC bus' pool of MC portals and wraps
+ * it in a new fsl_mc_io object. If 'mc_dev' is a DPRC itself, the
+ * portal is allocated from its own MC bus.
+ */
+int __must_check fsl_mc_portal_allocate(struct fsl_mc_device *mc_dev,
+ uint16_t mc_io_flags,
+ struct fsl_mc_io **new_mc_io)
+{
+ struct fsl_mc_device *mc_bus_dev;
+ struct fsl_mc_bus *mc_bus;
+ phys_addr_t mc_portal_phys_addr;
+ size_t mc_portal_size;
+ struct fsl_mc_device *mc_adev;
+ int error = -EINVAL;
+ struct fsl_mc_resource *resource = NULL;
+ struct fsl_mc_io *mc_io = NULL;
+
+ if (mc_dev->flags & FSL_MC_IS_DPRC) {
+ mc_bus_dev = mc_dev;
+ } else {
+ if (WARN_ON(mc_dev->dev.parent->bus != &fsl_mc_bus_type))
+ return error;
+
+ mc_bus_dev = to_fsl_mc_device(mc_dev->dev.parent);
+ }
+
+ mc_bus = to_fsl_mc_bus(mc_bus_dev);
+ *new_mc_io = NULL;
+ error = fsl_mc_resource_allocate(mc_bus, FSL_MC_POOL_DPMCP, &resource);
+ if (error < 0)
+ return error;
+
+ mc_adev = resource->data;
+ if (WARN_ON(!mc_adev))
+ goto error_cleanup_resource;
+
+ if (WARN_ON(mc_adev->obj_desc.region_count == 0))
+ goto error_cleanup_resource;
+
+ mc_portal_phys_addr = mc_adev->regions[0].start;
+ mc_portal_size = mc_adev->regions[0].end -
+ mc_adev->regions[0].start + 1;
+
+ if (WARN_ON(mc_portal_size != mc_bus_dev->mc_io->portal_size))
+ goto error_cleanup_resource;
+
+ error = fsl_create_mc_io(&mc_bus_dev->dev,
+ mc_portal_phys_addr,
+ mc_portal_size, resource,
+ mc_io_flags, &mc_io);
+ if (error < 0)
+ goto error_cleanup_resource;
+
+ *new_mc_io = mc_io;
+ return 0;
+
+error_cleanup_resource:
+ fsl_mc_resource_free(resource);
+ return error;
+}
+EXPORT_SYMBOL_GPL(fsl_mc_portal_allocate);
+
+/**
+ * fsl_mc_portal_free - Returns an MC portal to the pool of free MC portals
+ * of a given MC bus
+ *
+ * @mc_io: Pointer to the fsl_mc_io object that wraps the MC portal to free
+ */
+void fsl_mc_portal_free(struct fsl_mc_io *mc_io)
+{
+ struct fsl_mc_resource *resource;
+
+ resource = mc_io->resource;
+ if (WARN_ON(resource->type != FSL_MC_POOL_DPMCP))
+ return;
+ if (WARN_ON(!resource->data))
+ return;
+
+ fsl_destroy_mc_io(mc_io);
+ fsl_mc_resource_free(resource);
+}
+EXPORT_SYMBOL_GPL(fsl_mc_portal_free);
+
+/**
+ * fsl_mc_portal_reset - Resets the dpmcp object for a given fsl_mc_io object
+ *
+ * @mc_io: Pointer to the fsl_mc_io object that wraps the MC portal to free
+ */
+int fsl_mc_portal_reset(struct fsl_mc_io *mc_io)
+{
+ int error;
+ uint16_t token;
+ struct fsl_mc_resource *resource = mc_io->resource;
+ struct fsl_mc_device *mc_dev = resource->data;
+
+ if (WARN_ON(resource->type != FSL_MC_POOL_DPMCP))
+ return -EINVAL;
+
+ if (WARN_ON(!mc_dev))
+ return -EINVAL;
+
+ error = dpmcp_open(mc_io, mc_dev->obj_desc.id, &token);
+ if (error < 0) {
+ dev_err(&mc_dev->dev, "dpmcp_open() failed: %d\n", error);
+ return error;
+ }
+
+ error = dpmcp_reset(mc_io, token);
+ if (error < 0) {
+ dev_err(&mc_dev->dev, "dpmcp_reset() failed: %d\n", error);
+ return error;
+ }
+
+ error = dpmcp_close(mc_io, token);
+ if (error < 0) {
+ dev_err(&mc_dev->dev, "dpmcp_close() failed: %d\n", error);
+ return error;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(fsl_mc_portal_reset);
+
+/**
+ * fsl_mc_object_allocate - Allocates a MC object device of the given
+ * pool type from a given MC bus
+ *
+ * @mc_dev: MC device for which the MC object device is to be allocated
+ * @pool_type: MC bus resource pool type
+ * @new_mc_dev: Pointer to area where the pointer to the allocated
+ * MC object device is to be returned
+ *
+ * This function allocates a MC object device from the device's parent DPRC,
+ * from the corresponding MC bus' pool of allocatable MC object devices of
+ * the given resource type. mc_dev cannot be a DPRC itself.
+ *
+ * NOTE: pool_type must be different from FSL_MC_POOL_MCP, since MC
+ * portals are allocated using fsl_mc_portal_allocate(), instead of
+ * this function.
+ */
+int __must_check fsl_mc_object_allocate(struct fsl_mc_device *mc_dev,
+ enum fsl_mc_pool_type pool_type,
+ struct fsl_mc_device **new_mc_adev)
+{
+ struct fsl_mc_device *mc_bus_dev;
+ struct fsl_mc_bus *mc_bus;
+ struct fsl_mc_device *mc_adev;
+ int error = -EINVAL;
+ struct fsl_mc_resource *resource = NULL;
+
+ *new_mc_adev = NULL;
+ if (WARN_ON(mc_dev->flags & FSL_MC_IS_DPRC))
+ goto error;
+
+ if (WARN_ON(mc_dev->dev.parent->bus != &fsl_mc_bus_type))
+ goto error;
+
+ if (WARN_ON(pool_type == FSL_MC_POOL_DPMCP))
+ goto error;
+
+ mc_bus_dev = to_fsl_mc_device(mc_dev->dev.parent);
+ mc_bus = to_fsl_mc_bus(mc_bus_dev);
+ error = fsl_mc_resource_allocate(mc_bus, pool_type, &resource);
+ if (error < 0)
+ goto error;
+
+ mc_adev = resource->data;
+ if (WARN_ON(!mc_adev))
+ goto error;
+
+ *new_mc_adev = mc_adev;
+ return 0;
+error:
+ if (resource)
+ fsl_mc_resource_free(resource);
+
+ return error;
+}
+EXPORT_SYMBOL_GPL(fsl_mc_object_allocate);
+
+/**
+ * fsl_mc_object_free - Returns an allocatable MC object device to the
+ * corresponding resource pool of a given MC bus.
+ *
+ * @mc_adev: Pointer to the MC object device
+ */
+void fsl_mc_object_free(struct fsl_mc_device *mc_adev)
+{
+ struct fsl_mc_resource *resource;
+
+ resource = mc_adev->resource;
+ if (WARN_ON(resource->type == FSL_MC_POOL_DPMCP))
+ return;
+ if (WARN_ON(resource->data != mc_adev))
+ return;
+
+ fsl_mc_resource_free(resource);
+}
+EXPORT_SYMBOL_GPL(fsl_mc_object_free);
+
+/**
+ * fsl_mc_allocator_probe - callback invoked when an allocatable device is
+ * being added to the system
+ */
+static int fsl_mc_allocator_probe(struct fsl_mc_device *mc_dev)
+{
+ enum fsl_mc_pool_type pool_type;
+ struct fsl_mc_device *mc_bus_dev;
+ struct fsl_mc_bus *mc_bus;
+ int error = -EINVAL;
+
+ if (WARN_ON(!FSL_MC_IS_ALLOCATABLE(mc_dev->obj_desc.type)))
+ goto error;
+
+ mc_bus_dev = to_fsl_mc_device(mc_dev->dev.parent);
+ if (WARN_ON(mc_bus_dev->dev.bus != &fsl_mc_bus_type))
+ goto error;
+
+ mc_bus = to_fsl_mc_bus(mc_bus_dev);
+ error = object_type_to_pool_type(mc_dev->obj_desc.type, &pool_type);
+ if (error < 0)
+ goto error;
+
+ error = fsl_mc_resource_pool_add_device(mc_bus, pool_type, mc_dev);
+ if (error < 0)
+ goto error;
+
+ dev_info(&mc_dev->dev,
+ "Allocatable MC object device bound to fsl_mc_allocator driver");
+ return 0;
+error:
+
+ return error;
+}
+
+/**
+ * fsl_mc_allocator_remove - callback invoked when an allocatable device is
+ * being removed from the system
+ */
+static int fsl_mc_allocator_remove(struct fsl_mc_device *mc_dev)
+{
+ int error = -EINVAL;
+
+ if (WARN_ON(!FSL_MC_IS_ALLOCATABLE(mc_dev->obj_desc.type)))
+ goto out;
+
+ error = fsl_mc_resource_pool_remove_device(mc_dev);
+ if (error < 0)
+ goto out;
+
+ dev_info(&mc_dev->dev,
+ "Allocatable MC object device unbound from fsl_mc_allocator driver");
+ error = 0;
+out:
+ return error;
+}
+
+static const struct fsl_mc_device_match_id match_id_table[] = {
+ {
+ .vendor = FSL_MC_VENDOR_FREESCALE,
+ .obj_type = "dpbp",
+ .ver_major = DPBP_VER_MAJOR,
+ .ver_minor = DPBP_VER_MINOR
+ },
+ {
+ .vendor = FSL_MC_VENDOR_FREESCALE,
+ .obj_type = "dpmcp",
+ .ver_major = DPMCP_VER_MAJOR,
+ .ver_minor = DPMCP_VER_MINOR
+ },
+ {
+ .vendor = FSL_MC_VENDOR_FREESCALE,
+ .obj_type = "dpcon",
+ .ver_major = DPCON_VER_MAJOR,
+ .ver_minor = DPCON_VER_MINOR
+ },
+ {.vendor = 0x0},
+};
+
+static struct fsl_mc_driver fsl_mc_allocator_driver = {
+ .driver = {
+ .name = "fsl_mc_allocator",
+ .owner = THIS_MODULE,
+ .pm = NULL,
+ },
+ .match_id_table = match_id_table,
+ .probe = fsl_mc_allocator_probe,
+ .remove = fsl_mc_allocator_remove,
+};
+
+int __init fsl_mc_allocator_driver_init(void)
+{
+ return fsl_mc_driver_register(&fsl_mc_allocator_driver);
+}
+
+void __exit fsl_mc_allocator_driver_exit(void)
+{
+ fsl_mc_driver_unregister(&fsl_mc_allocator_driver);
+}
--- /dev/null
+/*
+ * Freescale Management Complex (MC) bus driver
+ *
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ * Author: German Rivera <German.Rivera@freescale.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include "../include/mc-private.h"
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/of_address.h>
+#include <linux/ioport.h>
+#include <linux/slab.h>
+#include <linux/limits.h>
+#include "../include/dpmng.h"
+#include "../include/mc-sys.h"
+#include "dprc-cmd.h"
+
+static struct kmem_cache *mc_dev_cache;
+
+/**
+ * fsl_mc_bus_match - device to driver matching callback
+ * @dev: the MC object device structure to match against
+ * @drv: the device driver to search for matching MC object device id
+ * structures
+ *
+ * Returns 1 on success, 0 otherwise.
+ */
+static int fsl_mc_bus_match(struct device *dev, struct device_driver *drv)
+{
+ const struct fsl_mc_device_match_id *id;
+ struct fsl_mc_device *mc_dev = to_fsl_mc_device(dev);
+ struct fsl_mc_driver *mc_drv = to_fsl_mc_driver(drv);
+ bool found = false;
+ bool major_version_mismatch = false;
+ bool minor_version_mismatch = false;
+
+ if (WARN_ON(!fsl_mc_bus_type.dev_root))
+ goto out;
+
+ if (!mc_drv->match_id_table)
+ goto out;
+
+ /*
+ * If the object is not 'plugged' don't match.
+ * Only exception is the root DPRC, which is a special case.
+ */
+ if ((mc_dev->obj_desc.state & DPRC_OBJ_STATE_PLUGGED) == 0 &&
+ &mc_dev->dev != fsl_mc_bus_type.dev_root)
+ goto out;
+
+ /*
+ * Traverse the match_id table of the given driver, trying to find
+ * a matching for the given MC object device.
+ */
+ for (id = mc_drv->match_id_table; id->vendor != 0x0; id++) {
+ if (id->vendor == mc_dev->obj_desc.vendor &&
+ strcmp(id->obj_type, mc_dev->obj_desc.type) == 0) {
+ if (id->ver_major == mc_dev->obj_desc.ver_major) {
+ found = true;
+ if (id->ver_minor != mc_dev->obj_desc.ver_minor)
+ minor_version_mismatch = true;
+ } else {
+ major_version_mismatch = true;
+ }
+
+ break;
+ }
+ }
+
+ if (major_version_mismatch) {
+ dev_warn(dev,
+ "Major version mismatch: driver version %u.%u, MC object version %u.%u\n",
+ id->ver_major, id->ver_minor,
+ mc_dev->obj_desc.ver_major,
+ mc_dev->obj_desc.ver_minor);
+ } else if (minor_version_mismatch) {
+ dev_warn(dev,
+ "Minor version mismatch: driver version %u.%u, MC object version %u.%u\n",
+ id->ver_major, id->ver_minor,
+ mc_dev->obj_desc.ver_major,
+ mc_dev->obj_desc.ver_minor);
+ }
+
+out:
+ dev_dbg(dev, "%smatched\n", found ? "" : "not ");
+ return found;
+}
+
+/**
+ * fsl_mc_bus_uevent - callback invoked when a device is added
+ */
+static int fsl_mc_bus_uevent(struct device *dev, struct kobj_uevent_env *env)
+{
+ pr_debug("%s invoked\n", __func__);
+ return 0;
+}
+
+struct bus_type fsl_mc_bus_type = {
+ .name = "fsl-mc",
+ .match = fsl_mc_bus_match,
+ .uevent = fsl_mc_bus_uevent,
+};
+EXPORT_SYMBOL_GPL(fsl_mc_bus_type);
+
+static int fsl_mc_driver_probe(struct device *dev)
+{
+ struct fsl_mc_driver *mc_drv;
+ struct fsl_mc_device *mc_dev = to_fsl_mc_device(dev);
+ int error;
+
+ if (WARN_ON(!dev->driver))
+ return -EINVAL;
+
+ mc_drv = to_fsl_mc_driver(dev->driver);
+ if (WARN_ON(!mc_drv->probe))
+ return -EINVAL;
+
+ error = mc_drv->probe(mc_dev);
+ if (error < 0) {
+ dev_err(dev, "MC object device probe callback failed: %d\n",
+ error);
+ return error;
+ }
+
+ return 0;
+}
+
+static int fsl_mc_driver_remove(struct device *dev)
+{
+ struct fsl_mc_driver *mc_drv = to_fsl_mc_driver(dev->driver);
+ struct fsl_mc_device *mc_dev = to_fsl_mc_device(dev);
+ int error;
+
+ if (WARN_ON(!dev->driver))
+ return -EINVAL;
+
+ error = mc_drv->remove(mc_dev);
+ if (error < 0) {
+ dev_err(dev,
+ "MC object device remove callback failed: %d\n",
+ error);
+ return error;
+ }
+
+ return 0;
+}
+
+static void fsl_mc_driver_shutdown(struct device *dev)
+{
+ struct fsl_mc_driver *mc_drv = to_fsl_mc_driver(dev->driver);
+ struct fsl_mc_device *mc_dev = to_fsl_mc_device(dev);
+
+ mc_drv->shutdown(mc_dev);
+}
+
+/**
+ * __fsl_mc_driver_register - registers a child device driver with the
+ * MC bus
+ *
+ * This function is implicitly invoked from the registration function of
+ * fsl_mc device drivers, which is generated by the
+ * module_fsl_mc_driver() macro.
+ */
+int __fsl_mc_driver_register(struct fsl_mc_driver *mc_driver,
+ struct module *owner)
+{
+ int error;
+
+ mc_driver->driver.owner = owner;
+ mc_driver->driver.bus = &fsl_mc_bus_type;
+
+ if (mc_driver->probe)
+ mc_driver->driver.probe = fsl_mc_driver_probe;
+
+ if (mc_driver->remove)
+ mc_driver->driver.remove = fsl_mc_driver_remove;
+
+ if (mc_driver->shutdown)
+ mc_driver->driver.shutdown = fsl_mc_driver_shutdown;
+
+ error = driver_register(&mc_driver->driver);
+ if (error < 0) {
+ pr_err("driver_register() failed for %s: %d\n",
+ mc_driver->driver.name, error);
+ return error;
+ }
+
+ pr_info("MC object device driver %s registered\n",
+ mc_driver->driver.name);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(__fsl_mc_driver_register);
+
+/**
+ * fsl_mc_driver_unregister - unregisters a device driver from the
+ * MC bus
+ */
+void fsl_mc_driver_unregister(struct fsl_mc_driver *mc_driver)
+{
+ driver_unregister(&mc_driver->driver);
+}
+EXPORT_SYMBOL_GPL(fsl_mc_driver_unregister);
+
+static int get_dprc_icid(struct fsl_mc_io *mc_io,
+ int container_id, uint16_t *icid)
+{
+ uint16_t dprc_handle;
+ struct dprc_attributes attr;
+ int error;
+
+ error = dprc_open(mc_io, container_id, &dprc_handle);
+ if (error < 0) {
+ pr_err("dprc_open() failed: %d\n", error);
+ return error;
+ }
+
+ memset(&attr, 0, sizeof(attr));
+ error = dprc_get_attributes(mc_io, dprc_handle, &attr);
+ if (error < 0) {
+ pr_err("dprc_get_attributes() failed: %d\n", error);
+ goto common_cleanup;
+ }
+
+ *icid = attr.icid;
+ error = 0;
+
+common_cleanup:
+ (void)dprc_close(mc_io, dprc_handle);
+ return error;
+}
+
+static int translate_mc_addr(uint64_t mc_addr, phys_addr_t *phys_addr)
+{
+ int i;
+ struct fsl_mc *mc = dev_get_drvdata(fsl_mc_bus_type.dev_root->parent);
+
+ if (mc->num_translation_ranges == 0) {
+ /*
+ * Do identity mapping:
+ */
+ *phys_addr = mc_addr;
+ return 0;
+ }
+
+ for (i = 0; i < mc->num_translation_ranges; i++) {
+ struct fsl_mc_addr_translation_range *range =
+ &mc->translation_ranges[i];
+
+ if (mc_addr >= range->start_mc_addr &&
+ mc_addr < range->end_mc_addr) {
+ *phys_addr = range->start_phys_addr +
+ (mc_addr - range->start_mc_addr);
+ return 0;
+ }
+ }
+
+ return -EFAULT;
+}
+
+static int fsl_mc_device_get_mmio_regions(struct fsl_mc_device *mc_dev,
+ struct fsl_mc_device *mc_bus_dev)
+{
+ int i;
+ int error;
+ struct resource *regions;
+ struct dprc_obj_desc *obj_desc = &mc_dev->obj_desc;
+ struct device *parent_dev = mc_dev->dev.parent;
+
+ regions = kmalloc_array(obj_desc->region_count,
+ sizeof(regions[0]), GFP_KERNEL);
+ if (!regions)
+ return -ENOMEM;
+
+ for (i = 0; i < obj_desc->region_count; i++) {
+ struct dprc_region_desc region_desc;
+
+ error = dprc_get_obj_region(mc_bus_dev->mc_io,
+ mc_bus_dev->mc_handle,
+ obj_desc->type,
+ obj_desc->id, i, ®ion_desc);
+ if (error < 0) {
+ dev_err(parent_dev,
+ "dprc_get_obj_region() failed: %d\n", error);
+ goto error_cleanup_regions;
+ }
+
+ WARN_ON(region_desc.base_paddr == 0x0);
+ WARN_ON(region_desc.size == 0);
+ error = translate_mc_addr(region_desc.base_paddr,
+ ®ions[i].start);
+ if (error < 0) {
+ dev_err(parent_dev,
+ "Invalid MC address: %#llx\n",
+ region_desc.base_paddr);
+ goto error_cleanup_regions;
+ }
+
+ regions[i].end = regions[i].start + region_desc.size - 1;
+ regions[i].name = "fsl-mc object MMIO region";
+ regions[i].flags = IORESOURCE_IO;
+ }
+
+ mc_dev->regions = regions;
+ return 0;
+
+error_cleanup_regions:
+ kfree(regions);
+ return error;
+}
+
+/**
+ * Add a newly discovered MC object device to be visible in Linux
+ */
+int fsl_mc_device_add(struct dprc_obj_desc *obj_desc,
+ struct fsl_mc_io *mc_io,
+ struct device *parent_dev,
+ struct fsl_mc_device **new_mc_dev)
+{
+ int error;
+ struct fsl_mc_device *mc_dev = NULL;
+ struct fsl_mc_bus *mc_bus = NULL;
+ struct fsl_mc_device *parent_mc_dev;
+
+ if (parent_dev->bus == &fsl_mc_bus_type)
+ parent_mc_dev = to_fsl_mc_device(parent_dev);
+ else
+ parent_mc_dev = NULL;
+
+ if (strcmp(obj_desc->type, "dprc") == 0) {
+ /*
+ * Allocate an MC bus device object:
+ */
+ mc_bus = devm_kzalloc(parent_dev, sizeof(*mc_bus), GFP_KERNEL);
+ if (!mc_bus)
+ return -ENOMEM;
+
+ mc_dev = &mc_bus->mc_dev;
+ } else {
+ /*
+ * Allocate a regular fsl_mc_device object:
+ */
+ mc_dev = kmem_cache_zalloc(mc_dev_cache, GFP_KERNEL);
+ if (!mc_dev)
+ return -ENOMEM;
+ }
+
+ mc_dev->obj_desc = *obj_desc;
+ mc_dev->mc_io = mc_io;
+ device_initialize(&mc_dev->dev);
+ mc_dev->dev.parent = parent_dev;
+ mc_dev->dev.bus = &fsl_mc_bus_type;
+ dev_set_name(&mc_dev->dev, "%s.%d", obj_desc->type, obj_desc->id);
+
+ if (strcmp(obj_desc->type, "dprc") == 0) {
+ struct fsl_mc_io *mc_io2;
+
+ mc_dev->flags |= FSL_MC_IS_DPRC;
+
+ /*
+ * To get the DPRC's ICID, we need to open the DPRC
+ * in get_dprc_icid(). For child DPRCs, we do so using the
+ * parent DPRC's MC portal instead of the child DPRC's MC
+ * portal, in case the child DPRC is already opened with
+ * its own portal (e.g., the DPRC used by AIOP).
+ *
+ * NOTE: There cannot be more than one active open for a
+ * given MC object, using the same MC portal.
+ */
+ if (parent_mc_dev) {
+ /*
+ * device being added is a child DPRC device
+ */
+ mc_io2 = parent_mc_dev->mc_io;
+ } else {
+ /*
+ * device being added is the root DPRC device
+ */
+ if (WARN_ON(!mc_io)) {
+ error = -EINVAL;
+ goto error_cleanup_dev;
+ }
+
+ mc_io2 = mc_io;
+
+ if (!fsl_mc_bus_type.dev_root)
+ fsl_mc_bus_type.dev_root = &mc_dev->dev;
+ }
+
+ error = get_dprc_icid(mc_io2, obj_desc->id, &mc_dev->icid);
+ if (error < 0)
+ goto error_cleanup_dev;
+ } else {
+ /*
+ * A non-DPRC MC object device has to be a child of another
+ * MC object (specifically a DPRC object)
+ */
+ mc_dev->icid = parent_mc_dev->icid;
+ mc_dev->dma_mask = FSL_MC_DEFAULT_DMA_MASK;
+ mc_dev->dev.dma_mask = &mc_dev->dma_mask;
+ }
+
+ /*
+ * Get MMIO regions for the device from the MC:
+ *
+ * NOTE: the root DPRC is a special case as its MMIO region is
+ * obtained from the device tree
+ */
+ if (parent_mc_dev && obj_desc->region_count != 0) {
+ error = fsl_mc_device_get_mmio_regions(mc_dev,
+ parent_mc_dev);
+ if (error < 0)
+ goto error_cleanup_dev;
+ }
+
+ /*
+ * The device-specific probe callback will get invoked by device_add()
+ */
+ error = device_add(&mc_dev->dev);
+ if (error < 0) {
+ dev_err(parent_dev,
+ "device_add() failed for device %s: %d\n",
+ dev_name(&mc_dev->dev), error);
+ goto error_cleanup_dev;
+ }
+
+ (void)get_device(&mc_dev->dev);
+ dev_dbg(parent_dev, "Added MC object device %s\n",
+ dev_name(&mc_dev->dev));
+
+ *new_mc_dev = mc_dev;
+ return 0;
+
+error_cleanup_dev:
+ kfree(mc_dev->regions);
+ if (mc_bus)
+ devm_kfree(parent_dev, mc_bus);
+ else
+ kmem_cache_free(mc_dev_cache, mc_dev);
+
+ return error;
+}
+EXPORT_SYMBOL_GPL(fsl_mc_device_add);
+
+/**
+ * fsl_mc_device_remove - Remove a MC object device from being visible to
+ * Linux
+ *
+ * @mc_dev: Pointer to a MC object device object
+ */
+void fsl_mc_device_remove(struct fsl_mc_device *mc_dev)
+{
+ struct fsl_mc_bus *mc_bus = NULL;
+
+ kfree(mc_dev->regions);
+
+ /*
+ * The device-specific remove callback will get invoked by device_del()
+ */
+ device_del(&mc_dev->dev);
+ put_device(&mc_dev->dev);
+
+ if (strcmp(mc_dev->obj_desc.type, "dprc") == 0) {
+ mc_bus = to_fsl_mc_bus(mc_dev);
+ if (mc_dev->mc_io) {
+ fsl_destroy_mc_io(mc_dev->mc_io);
+ mc_dev->mc_io = NULL;
+ }
+
+ if (&mc_dev->dev == fsl_mc_bus_type.dev_root)
+ fsl_mc_bus_type.dev_root = NULL;
+ }
+
+ if (mc_bus)
+ devm_kfree(mc_dev->dev.parent, mc_bus);
+ else
+ kmem_cache_free(mc_dev_cache, mc_dev);
+}
+EXPORT_SYMBOL_GPL(fsl_mc_device_remove);
+
+static int parse_mc_ranges(struct device *dev,
+ int *paddr_cells,
+ int *mc_addr_cells,
+ int *mc_size_cells,
+ const __be32 **ranges_start,
+ uint8_t *num_ranges)
+{
+ const __be32 *prop;
+ int range_tuple_cell_count;
+ int ranges_len;
+ int tuple_len;
+ struct device_node *mc_node = dev->of_node;
+
+ *ranges_start = of_get_property(mc_node, "ranges", &ranges_len);
+ if (!(*ranges_start) || !ranges_len) {
+ dev_warn(dev,
+ "missing or empty ranges property for device tree node '%s'\n",
+ mc_node->name);
+
+ *num_ranges = 0;
+ return 0;
+ }
+
+ *paddr_cells = of_n_addr_cells(mc_node);
+
+ prop = of_get_property(mc_node, "#address-cells", NULL);
+ if (prop)
+ *mc_addr_cells = be32_to_cpup(prop);
+ else
+ *mc_addr_cells = *paddr_cells;
+
+ prop = of_get_property(mc_node, "#size-cells", NULL);
+ if (prop)
+ *mc_size_cells = be32_to_cpup(prop);
+ else
+ *mc_size_cells = of_n_size_cells(mc_node);
+
+ range_tuple_cell_count = *paddr_cells + *mc_addr_cells +
+ *mc_size_cells;
+
+ tuple_len = range_tuple_cell_count * sizeof(__be32);
+ if (ranges_len % tuple_len != 0) {
+ dev_err(dev, "malformed ranges property '%s'\n", mc_node->name);
+ return -EINVAL;
+ }
+
+ *num_ranges = ranges_len / tuple_len;
+ return 0;
+}
+
+static int get_mc_addr_translation_ranges(struct device *dev,
+ struct fsl_mc_addr_translation_range
+ **ranges,
+ uint8_t *num_ranges)
+{
+ int error;
+ int paddr_cells;
+ int mc_addr_cells;
+ int mc_size_cells;
+ int i;
+ const __be32 *ranges_start;
+ const __be32 *cell;
+
+ error = parse_mc_ranges(dev,
+ &paddr_cells,
+ &mc_addr_cells,
+ &mc_size_cells,
+ &ranges_start,
+ num_ranges);
+ if (error < 0)
+ return error;
+
+ if (!(*num_ranges)) {
+ /*
+ * Missing or empty ranges property ("ranges;") for the
+ * 'fsl,qoriq-mc' node. In this case, identity mapping
+ * will be used.
+ */
+ *ranges = NULL;
+ return 0;
+ }
+
+ *ranges = devm_kcalloc(dev, *num_ranges,
+ sizeof(struct fsl_mc_addr_translation_range),
+ GFP_KERNEL);
+ if (!(*ranges))
+ return -ENOMEM;
+
+ cell = ranges_start;
+ for (i = 0; i < *num_ranges; ++i) {
+ struct fsl_mc_addr_translation_range *range = &(*ranges)[i];
+
+ range->start_mc_addr = of_read_number(cell, mc_addr_cells);
+ cell += mc_addr_cells;
+ range->start_phys_addr = of_read_number(cell, paddr_cells);
+ cell += paddr_cells;
+ range->end_mc_addr = range->start_mc_addr +
+ of_read_number(cell, mc_size_cells);
+
+ cell += mc_size_cells;
+ }
+
+ return 0;
+}
+
+/**
+ * fsl_mc_bus_probe - callback invoked when the root MC bus is being
+ * added
+ */
+static int fsl_mc_bus_probe(struct platform_device *pdev)
+{
+ struct dprc_obj_desc obj_desc;
+ int error;
+ struct fsl_mc *mc;
+ struct fsl_mc_device *mc_bus_dev = NULL;
+ struct fsl_mc_io *mc_io = NULL;
+ int container_id;
+ phys_addr_t mc_portal_phys_addr;
+ uint32_t mc_portal_size;
+ struct mc_version mc_version;
+ struct resource res;
+
+ dev_info(&pdev->dev, "Root MC bus device probed");
+
+ mc = devm_kzalloc(&pdev->dev, sizeof(*mc), GFP_KERNEL);
+ if (!mc)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, mc);
+
+ /*
+ * Get physical address of MC portal for the root DPRC:
+ */
+ error = of_address_to_resource(pdev->dev.of_node, 0, &res);
+ if (error < 0) {
+ dev_err(&pdev->dev,
+ "of_address_to_resource() failed for %s\n",
+ pdev->dev.of_node->full_name);
+ return error;
+ }
+
+ mc_portal_phys_addr = res.start;
+ mc_portal_size = resource_size(&res);
+ error = fsl_create_mc_io(&pdev->dev, mc_portal_phys_addr,
+ mc_portal_size, NULL, 0, &mc_io);
+ if (error < 0)
+ return error;
+
+ error = mc_get_version(mc_io, &mc_version);
+ if (error != 0) {
+ dev_err(&pdev->dev,
+ "mc_get_version() failed with error %d\n", error);
+ goto error_cleanup_mc_io;
+ }
+
+ dev_info(&pdev->dev,
+ "Freescale Management Complex Firmware version: %u.%u.%u\n",
+ mc_version.major, mc_version.minor, mc_version.revision);
+
+ if (mc_version.major < MC_VER_MAJOR) {
+ dev_err(&pdev->dev,
+ "ERROR: MC firmware version not supported by driver (driver version: %u.%u)\n",
+ MC_VER_MAJOR, MC_VER_MINOR);
+ error = -ENOTSUPP;
+ goto error_cleanup_mc_io;
+ }
+
+ if (mc_version.major > MC_VER_MAJOR) {
+ dev_warn(&pdev->dev,
+ "WARNING: driver may not support newer MC firmware features (driver version: %u.%u)\n",
+ MC_VER_MAJOR, MC_VER_MINOR);
+ }
+
+ error = get_mc_addr_translation_ranges(&pdev->dev,
+ &mc->translation_ranges,
+ &mc->num_translation_ranges);
+ if (error < 0)
+ goto error_cleanup_mc_io;
+
+ error = dpmng_get_container_id(mc_io, &container_id);
+ if (error < 0) {
+ dev_err(&pdev->dev,
+ "dpmng_get_container_id() failed: %d\n", error);
+ goto error_cleanup_mc_io;
+ }
+
+ obj_desc.vendor = FSL_MC_VENDOR_FREESCALE;
+ strcpy(obj_desc.type, "dprc");
+ obj_desc.id = container_id;
+ obj_desc.ver_major = DPRC_VER_MAJOR;
+ obj_desc.ver_minor = DPRC_VER_MINOR;
+ obj_desc.region_count = 0;
+
+ error = fsl_mc_device_add(&obj_desc, mc_io, &pdev->dev, &mc_bus_dev);
+ if (error < 0)
+ goto error_cleanup_mc_io;
+
+ mc->root_mc_bus_dev = mc_bus_dev;
+ return 0;
+
+error_cleanup_mc_io:
+ fsl_destroy_mc_io(mc_io);
+ return error;
+}
+
+/**
+ * fsl_mc_bus_remove - callback invoked when the root MC bus is being
+ * removed
+ */
+static int fsl_mc_bus_remove(struct platform_device *pdev)
+{
+ struct fsl_mc *mc = platform_get_drvdata(pdev);
+
+ if (WARN_ON(&mc->root_mc_bus_dev->dev != fsl_mc_bus_type.dev_root))
+ return -EINVAL;
+
+ fsl_mc_device_remove(mc->root_mc_bus_dev);
+ dev_info(&pdev->dev, "Root MC bus device removed");
+ return 0;
+}
+
+static const struct of_device_id fsl_mc_bus_match_table[] = {
+ {.compatible = "fsl,qoriq-mc",},
+ {},
+};
+
+MODULE_DEVICE_TABLE(of, fsl_mc_bus_match_table);
+
+static struct platform_driver fsl_mc_bus_driver = {
+ .driver = {
+ .name = "fsl_mc_bus",
+ .owner = THIS_MODULE,
+ .pm = NULL,
+ .of_match_table = fsl_mc_bus_match_table,
+ },
+ .probe = fsl_mc_bus_probe,
+ .remove = fsl_mc_bus_remove,
+};
+
+static int __init fsl_mc_bus_driver_init(void)
+{
+ int error;
+
+ mc_dev_cache = kmem_cache_create("fsl_mc_device",
+ sizeof(struct fsl_mc_device), 0, 0,
+ NULL);
+ if (!mc_dev_cache) {
+ pr_err("Could not create fsl_mc_device cache\n");
+ return -ENOMEM;
+ }
+
+ error = bus_register(&fsl_mc_bus_type);
+ if (error < 0) {
+ pr_err("fsl-mc bus type registration failed: %d\n", error);
+ goto error_cleanup_cache;
+ }
+
+ pr_info("fsl-mc bus type registered\n");
+
+ error = platform_driver_register(&fsl_mc_bus_driver);
+ if (error < 0) {
+ pr_err("platform_driver_register() failed: %d\n", error);
+ goto error_cleanup_bus;
+ }
+
+ error = dprc_driver_init();
+ if (error < 0)
+ goto error_cleanup_driver;
+
+ error = fsl_mc_allocator_driver_init();
+ if (error < 0)
+ goto error_cleanup_dprc_driver;
+
+ return 0;
+
+error_cleanup_dprc_driver:
+ dprc_driver_exit();
+
+error_cleanup_driver:
+ platform_driver_unregister(&fsl_mc_bus_driver);
+
+error_cleanup_bus:
+ bus_unregister(&fsl_mc_bus_type);
+
+error_cleanup_cache:
+ kmem_cache_destroy(mc_dev_cache);
+ return error;
+}
+
+postcore_initcall(fsl_mc_bus_driver_init);
+
+static void __exit fsl_mc_bus_driver_exit(void)
+{
+ if (WARN_ON(!mc_dev_cache))
+ return;
+
+ fsl_mc_allocator_driver_exit();
+ dprc_driver_exit();
+ platform_driver_unregister(&fsl_mc_bus_driver);
+ bus_unregister(&fsl_mc_bus_type);
+ kmem_cache_destroy(mc_dev_cache);
+ pr_info("MC bus unregistered\n");
+}
+
+module_exit(fsl_mc_bus_driver_exit);
+
+MODULE_AUTHOR("Freescale Semiconductor Inc.");
+MODULE_DESCRIPTION("Freescale Management Complex (MC) bus driver");
+MODULE_LICENSE("GPL");
--- /dev/null
+/* Copyright 2013-2014 Freescale Semiconductor Inc.
+ *
+ * I/O services to send MC commands to the MC hardware
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "../include/mc-sys.h"
+#include "../include/mc-cmd.h"
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/ioport.h>
+#include <linux/device.h>
+
+/**
+ * Timeout in jiffies to wait for the completion of an MC command
+ */
+#define MC_CMD_COMPLETION_TIMEOUT_JIFFIES (HZ / 2) /* 500 ms */
+
+/*
+ * usleep_range() min and max values used to throttle down polling
+ * iterations while waiting for MC command completion
+ */
+#define MC_CMD_COMPLETION_POLLING_MIN_SLEEP_USECS 10
+#define MC_CMD_COMPLETION_POLLING_MAX_SLEEP_USECS 500
+
+#define MC_CMD_HDR_READ_CMDID(_hdr) \
+ ((uint16_t)mc_dec((_hdr), MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S))
+
+/**
+ * Creates an MC I/O object
+ *
+ * @dev: device to be associated with the MC I/O object
+ * @mc_portal_phys_addr: physical address of the MC portal to use
+ * @mc_portal_size: size in bytes of the MC portal
+ * @resource: Pointer to MC bus object allocator resource associated
+ * with this MC I/O object or NULL if none.
+ * @flags: flags for the new MC I/O object
+ * @new_mc_io: Area to return pointer to newly created MC I/O object
+ *
+ * Returns '0' on Success; Error code otherwise.
+ */
+int __must_check fsl_create_mc_io(struct device *dev,
+ phys_addr_t mc_portal_phys_addr,
+ uint32_t mc_portal_size,
+ struct fsl_mc_resource *resource,
+ uint32_t flags, struct fsl_mc_io **new_mc_io)
+{
+ struct fsl_mc_io *mc_io;
+ void __iomem *mc_portal_virt_addr;
+ struct resource *res;
+
+ mc_io = devm_kzalloc(dev, sizeof(*mc_io), GFP_KERNEL);
+ if (!mc_io)
+ return -ENOMEM;
+
+ mc_io->dev = dev;
+ mc_io->flags = flags;
+ mc_io->portal_phys_addr = mc_portal_phys_addr;
+ mc_io->portal_size = mc_portal_size;
+ mc_io->resource = resource;
+ res = devm_request_mem_region(dev,
+ mc_portal_phys_addr,
+ mc_portal_size,
+ "mc_portal");
+ if (!res) {
+ dev_err(dev,
+ "devm_request_mem_region failed for MC portal %#llx\n",
+ mc_portal_phys_addr);
+ return -EBUSY;
+ }
+
+ mc_portal_virt_addr = devm_ioremap_nocache(dev,
+ mc_portal_phys_addr,
+ mc_portal_size);
+ if (!mc_portal_virt_addr) {
+ dev_err(dev,
+ "devm_ioremap_nocache failed for MC portal %#llx\n",
+ mc_portal_phys_addr);
+ return -ENXIO;
+ }
+
+ mc_io->portal_virt_addr = mc_portal_virt_addr;
+ *new_mc_io = mc_io;
+ return 0;
+}
+EXPORT_SYMBOL_GPL(fsl_create_mc_io);
+
+/**
+ * Destroys an MC I/O object
+ *
+ * @mc_io: MC I/O object to destroy
+ */
+void fsl_destroy_mc_io(struct fsl_mc_io *mc_io)
+{
+ devm_iounmap(mc_io->dev, mc_io->portal_virt_addr);
+ devm_release_mem_region(mc_io->dev,
+ mc_io->portal_phys_addr,
+ mc_io->portal_size);
+
+ mc_io->portal_virt_addr = NULL;
+ devm_kfree(mc_io->dev, mc_io);
+}
+EXPORT_SYMBOL_GPL(fsl_destroy_mc_io);
+
+static int mc_status_to_error(enum mc_cmd_status status)
+{
+ static const int mc_status_to_error_map[] = {
+ [MC_CMD_STATUS_OK] = 0,
+ [MC_CMD_STATUS_AUTH_ERR] = -EACCES,
+ [MC_CMD_STATUS_NO_PRIVILEGE] = -EPERM,
+ [MC_CMD_STATUS_DMA_ERR] = -EIO,
+ [MC_CMD_STATUS_CONFIG_ERR] = -ENXIO,
+ [MC_CMD_STATUS_TIMEOUT] = -ETIMEDOUT,
+ [MC_CMD_STATUS_NO_RESOURCE] = -ENAVAIL,
+ [MC_CMD_STATUS_NO_MEMORY] = -ENOMEM,
+ [MC_CMD_STATUS_BUSY] = -EBUSY,
+ [MC_CMD_STATUS_UNSUPPORTED_OP] = -ENOTSUPP,
+ [MC_CMD_STATUS_INVALID_STATE] = -ENODEV,
+ };
+
+ if (WARN_ON((u32)status >= ARRAY_SIZE(mc_status_to_error_map)))
+ return -EINVAL;
+
+ return mc_status_to_error_map[status];
+}
+
+static const char *mc_status_to_string(enum mc_cmd_status status)
+{
+ static const char *const status_strings[] = {
+ [MC_CMD_STATUS_OK] = "Command completed successfully",
+ [MC_CMD_STATUS_READY] = "Command ready to be processed",
+ [MC_CMD_STATUS_AUTH_ERR] = "Authentication error",
+ [MC_CMD_STATUS_NO_PRIVILEGE] = "No privilege",
+ [MC_CMD_STATUS_DMA_ERR] = "DMA or I/O error",
+ [MC_CMD_STATUS_CONFIG_ERR] = "Configuration error",
+ [MC_CMD_STATUS_TIMEOUT] = "Operation timed out",
+ [MC_CMD_STATUS_NO_RESOURCE] = "No resources",
+ [MC_CMD_STATUS_NO_MEMORY] = "No memory available",
+ [MC_CMD_STATUS_BUSY] = "Device is busy",
+ [MC_CMD_STATUS_UNSUPPORTED_OP] = "Unsupported operation",
+ [MC_CMD_STATUS_INVALID_STATE] = "Invalid state"
+ };
+
+ if ((unsigned int)status >= ARRAY_SIZE(status_strings))
+ return "Unknown MC error";
+
+ return status_strings[status];
+}
+
+/**
+ * mc_write_command - writes a command to a Management Complex (MC) portal
+ *
+ * @portal: pointer to an MC portal
+ * @cmd: pointer to a filled command
+ */
+static inline void mc_write_command(struct mc_command __iomem *portal,
+ struct mc_command *cmd)
+{
+ int i;
+
+ /* copy command parameters into the portal */
+ for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++)
+ writeq(cmd->params[i], &portal->params[i]);
+
+ /* submit the command by writing the header */
+ writeq(cmd->header, &portal->header);
+}
+
+/**
+ * mc_read_response - reads the response for the last MC command from a
+ * Management Complex (MC) portal
+ *
+ * @portal: pointer to an MC portal
+ * @resp: pointer to command response buffer
+ *
+ * Returns MC_CMD_STATUS_OK on Success; Error code otherwise.
+ */
+static inline enum mc_cmd_status mc_read_response(struct mc_command __iomem *
+ portal,
+ struct mc_command *resp)
+{
+ int i;
+ enum mc_cmd_status status;
+
+ /* Copy command response header from MC portal: */
+ resp->header = readq(&portal->header);
+ status = MC_CMD_HDR_READ_STATUS(resp->header);
+ if (status != MC_CMD_STATUS_OK)
+ return status;
+
+ /* Copy command response data from MC portal: */
+ for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++)
+ resp->params[i] = readq(&portal->params[i]);
+
+ return status;
+}
+
+/**
+ * Sends an command to the MC device using the given MC I/O object
+ *
+ * @mc_io: MC I/O object to be used
+ * @cmd: command to be sent
+ *
+ * Returns '0' on Success; Error code otherwise.
+ *
+ * NOTE: This function cannot be invoked from from atomic contexts.
+ */
+int mc_send_command(struct fsl_mc_io *mc_io, struct mc_command *cmd)
+{
+ enum mc_cmd_status status;
+ unsigned long jiffies_until_timeout =
+ jiffies + MC_CMD_COMPLETION_TIMEOUT_JIFFIES;
+
+ /*
+ * Send command to the MC hardware:
+ */
+ mc_write_command(mc_io->portal_virt_addr, cmd);
+
+ /*
+ * Wait for response from the MC hardware:
+ */
+ for (;;) {
+ status = mc_read_response(mc_io->portal_virt_addr, cmd);
+ if (status != MC_CMD_STATUS_READY)
+ break;
+
+ /*
+ * TODO: When MC command completion interrupts are supported
+ * call wait function here instead of usleep_range()
+ */
+ usleep_range(MC_CMD_COMPLETION_POLLING_MIN_SLEEP_USECS,
+ MC_CMD_COMPLETION_POLLING_MAX_SLEEP_USECS);
+
+ if (time_after_eq(jiffies, jiffies_until_timeout)) {
+ pr_debug("MC command timed out (portal: %#llx, obj handle: %#x, command: %#x)\n",
+ mc_io->portal_phys_addr,
+ (unsigned int)
+ MC_CMD_HDR_READ_TOKEN(cmd->header),
+ (unsigned int)
+ MC_CMD_HDR_READ_CMDID(cmd->header));
+
+ return -ETIMEDOUT;
+ }
+ }
+
+ if (status != MC_CMD_STATUS_OK) {
+ pr_debug("MC command failed: portal: %#llx, obj handle: %#x, command: %#x, status: %s (%#x)\n",
+ mc_io->portal_phys_addr,
+ (unsigned int)MC_CMD_HDR_READ_TOKEN(cmd->header),
+ (unsigned int)MC_CMD_HDR_READ_CMDID(cmd->header),
+ mc_status_to_string(status),
+ (unsigned int)status);
+
+ return mc_status_to_error(status);
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(mc_send_command);
--- /dev/null
+/* Copyright 2013-2014 Freescale Semiconductor Inc.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+* * Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* * Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the distribution.
+* * Neither the name of the above-listed copyright holders nor the
+* names of any contributors may be used to endorse or promote products
+* derived from this software without specific prior written permission.
+*
+*
+* ALTERNATIVELY, this software may be distributed under the terms of the
+* GNU General Public License ("GPL") as published by the Free Software
+* Foundation, either version 2 of that License or (at your option) any
+* later version.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+*/
+#ifndef _FSL_DPBP_CMD_H
+#define _FSL_DPBP_CMD_H
+
+/* DPBP Version */
+#define DPBP_VER_MAJOR 2
+#define DPBP_VER_MINOR 0
+
+/* Command IDs */
+#define DPBP_CMDID_CLOSE 0x800
+#define DPBP_CMDID_OPEN 0x804
+#define DPBP_CMDID_CREATE 0x904
+#define DPBP_CMDID_DESTROY 0x900
+
+#define DPBP_CMDID_ENABLE 0x002
+#define DPBP_CMDID_DISABLE 0x003
+#define DPBP_CMDID_GET_ATTR 0x004
+#define DPBP_CMDID_RESET 0x005
+#define DPBP_CMDID_IS_ENABLED 0x006
+
+#define DPBP_CMDID_SET_IRQ 0x010
+#define DPBP_CMDID_GET_IRQ 0x011
+#define DPBP_CMDID_SET_IRQ_ENABLE 0x012
+#define DPBP_CMDID_GET_IRQ_ENABLE 0x013
+#define DPBP_CMDID_SET_IRQ_MASK 0x014
+#define DPBP_CMDID_GET_IRQ_MASK 0x015
+#define DPBP_CMDID_GET_IRQ_STATUS 0x016
+#define DPBP_CMDID_CLEAR_IRQ_STATUS 0x017
+
+#endif /* _FSL_DPBP_CMD_H */
--- /dev/null
+/* Copyright 2013-2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __FSL_DPBP_H
+#define __FSL_DPBP_H
+
+/* Data Path Buffer Pool API
+ * Contains initialization APIs and runtime control APIs for DPBP
+ */
+
+struct fsl_mc_io;
+
+/**
+ * dpbp_open() - Open a control session for the specified object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dpbp_id: DPBP unique ID
+ * @token: Returned token; use in subsequent API calls
+ *
+ * This function can be used to open a control session for an
+ * already created object; an object may have been declared in
+ * the DPL or by calling the dpbp_create function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent commands for
+ * this specific object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_open(struct fsl_mc_io *mc_io, int dpbp_id, uint16_t *token);
+
+/**
+ * dpbp_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_close(struct fsl_mc_io *mc_io, uint16_t token);
+
+/**
+ * struct dpbp_cfg() - Structure representing DPBP configuration
+ * @options: place holder
+ */
+struct dpbp_cfg {
+ uint32_t options;
+};
+
+/**
+ * dpbp_create() - Create the DPBP object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cfg: Configuration structure
+ * @token: Returned token; use in subsequent API calls
+ *
+ * Create the DPBP object, allocate required resources and
+ * perform required initialization.
+ *
+ * The object can be created either by declaring it in the
+ * DPL file, or by calling this function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent calls to
+ * this specific object. For objects that are created using the
+ * DPL file, call dpbp_open function to get an authentication
+ * token first.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_create(struct fsl_mc_io *mc_io,
+ const struct dpbp_cfg *cfg,
+ uint16_t *token);
+
+/**
+ * dpbp_destroy() - Destroy the DPBP object and release all its resources.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ *
+ * Return: '0' on Success; error code otherwise.
+ */
+int dpbp_destroy(struct fsl_mc_io *mc_io, uint16_t token);
+
+/**
+ * dpbp_enable() - Enable the DPBP.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_enable(struct fsl_mc_io *mc_io, uint16_t token);
+
+/**
+ * dpbp_disable() - Disable the DPBP.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_disable(struct fsl_mc_io *mc_io, uint16_t token);
+
+/**
+ * dpbp_is_enabled() - Check if the DPBP is enabled.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @en: Returns '1' if object is enabled; '0' otherwise
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_is_enabled(struct fsl_mc_io *mc_io, uint16_t token, int *en);
+
+/**
+ * dpbp_reset() - Reset the DPBP, returns the object to initial state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_reset(struct fsl_mc_io *mc_io, uint16_t token);
+
+/**
+ * dpbp_set_irq() - Set IRQ information for the DPBP to trigger an interrupt.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @irq_index: Identifies the interrupt index to configure
+ * @irq_addr: Address that must be written to
+ * signal a message-based interrupt
+ * @irq_val: Value to write into irq_addr address
+ * @user_irq_id: A user defined number associated with this IRQ
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_set_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint64_t irq_addr,
+ uint32_t irq_val,
+ int user_irq_id);
+
+/**
+ * dpbp_get_irq() - Get IRQ information from the DPBP.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @irq_index: The interrupt index to configure
+ * @type: Interrupt type: 0 represents message interrupt
+ * type (both irq_addr and irq_val are valid)
+ * @irq_addr: Returned address that must be written to
+ * signal the message-based interrupt
+ * @irq_val: Value to write into irq_addr address
+ * @user_irq_id: A user defined number associated with this IRQ
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_get_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ int *type,
+ uint64_t *irq_addr,
+ uint32_t *irq_val,
+ int *user_irq_id);
+
+/**
+ * dpbp_set_irq_enable() - Set overall interrupt state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @irq_index: The interrupt index to configure
+ * @en: Interrupt state - enable = 1, disable = 0
+ *
+ * Allows GPP software to control when interrupts are generated.
+ * Each interrupt can have up to 32 causes. The enable/disable control's the
+ * overall interrupt state. if the interrupt is disabled no causes will cause
+ * an interrupt.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_set_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t en);
+
+/**
+ * dpbp_get_irq_enable() - Get overall interrupt state
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @irq_index: The interrupt index to configure
+ * @en: Returned interrupt state - enable = 1, disable = 0
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_get_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t *en);
+
+/**
+ * dpbp_set_irq_mask() - Set interrupt mask.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @irq_index: The interrupt index to configure
+ * @mask: Event mask to trigger interrupt;
+ * each bit:
+ * 0 = ignore event
+ * 1 = consider event for asserting IRQ
+ *
+ * Every interrupt can have up to 32 causes and the interrupt model supports
+ * masking/unmasking each cause independently
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_set_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t mask);
+
+/**
+ * dpbp_get_irq_mask() - Get interrupt mask.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @irq_index: The interrupt index to configure
+ * @mask: Returned event mask to trigger interrupt
+ *
+ * Every interrupt can have up to 32 causes and the interrupt model supports
+ * masking/unmasking each cause independently
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_get_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *mask);
+
+/**
+ * dpbp_get_irq_status() - Get the current status of any pending interrupts.
+ *
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @irq_index: The interrupt index to configure
+ * @status: Returned interrupts status - one bit per cause:
+ * 0 = no interrupt pending
+ * 1 = interrupt pending
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_get_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *status);
+
+/**
+ * dpbp_clear_irq_status() - Clear a pending interrupt's status
+ *
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @irq_index: The interrupt index to configure
+ * @status: Bits to clear (W1C) - one bit per cause:
+ * 0 = don't change
+ * 1 = clear status bit
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_clear_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t status);
+
+/**
+ * struct dpbp_attr - Structure representing DPBP attributes
+ * @id: DPBP object ID
+ * @version: DPBP version
+ * @bpid: Hardware buffer pool ID; should be used as an argument in
+ * acquire/release operations on buffers
+ */
+struct dpbp_attr {
+ int id;
+ /**
+ * struct version - Structure representing DPBP version
+ * @major: DPBP major version
+ * @minor: DPBP minor version
+ */
+ struct {
+ uint16_t major;
+ uint16_t minor;
+ } version;
+ uint16_t bpid;
+};
+
+/**
+ * dpbp_get_attributes - Retrieve DPBP attributes.
+ *
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @attr: Returned object's attributes
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_get_attributes(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ struct dpbp_attr *attr);
+
+/** @} */
+
+#endif /* __FSL_DPBP_H */
--- /dev/null
+/* Copyright 2013-2015 Freescale Semiconductor Inc.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+* * Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* * Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the distribution.
+* * Neither the name of the above-listed copyright holders nor the
+* names of any contributors may be used to endorse or promote products
+* derived from this software without specific prior written permission.
+*
+*
+* ALTERNATIVELY, this software may be distributed under the terms of the
+* GNU General Public License ("GPL") as published by the Free Software
+* Foundation, either version 2 of that License or (at your option) any
+* later version.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+*/
+#ifndef _FSL_DPCON_CMD_H
+#define _FSL_DPCON_CMD_H
+
+/* DPCON Version */
+#define DPCON_VER_MAJOR 2
+#define DPCON_VER_MINOR 0
+
+/* Command IDs */
+#define DPCON_CMDID_CLOSE 0x800
+#define DPCON_CMDID_OPEN 0x808
+#define DPCON_CMDID_CREATE 0x908
+#define DPCON_CMDID_DESTROY 0x900
+
+#define DPCON_CMDID_ENABLE 0x002
+#define DPCON_CMDID_DISABLE 0x003
+#define DPCON_CMDID_GET_ATTR 0x004
+#define DPCON_CMDID_RESET 0x005
+#define DPCON_CMDID_IS_ENABLED 0x006
+
+#define DPCON_CMDID_SET_IRQ 0x010
+#define DPCON_CMDID_GET_IRQ 0x011
+#define DPCON_CMDID_SET_IRQ_ENABLE 0x012
+#define DPCON_CMDID_GET_IRQ_ENABLE 0x013
+#define DPCON_CMDID_SET_IRQ_MASK 0x014
+#define DPCON_CMDID_GET_IRQ_MASK 0x015
+#define DPCON_CMDID_GET_IRQ_STATUS 0x016
+#define DPCON_CMDID_CLEAR_IRQ_STATUS 0x017
+
+#define DPCON_CMDID_SET_NOTIFICATION 0x100
+
+#endif /* _FSL_DPCON_CMD_H */
--- /dev/null
+/* Copyright 2013-2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __FSL_DPMNG_H
+#define __FSL_DPMNG_H
+
+/* Management Complex General API
+ * Contains general API for the Management Complex firmware
+ */
+
+struct fsl_mc_io;
+
+/**
+ * Management Complex firmware version information
+ */
+#define MC_VER_MAJOR 6
+#define MC_VER_MINOR 0
+
+/**
+ * struct mc_versoin
+ * @major: Major version number: incremented on API compatibility changes
+ * @minor: Minor version number: incremented on API additions (that are
+ * backward compatible); reset when major version is incremented
+ * @revision: Internal revision number: incremented on implementation changes
+ * and/or bug fixes that have no impact on API
+ */
+struct mc_version {
+ uint32_t major;
+ uint32_t minor;
+ uint32_t revision;
+};
+
+/**
+ * mc_get_version() - Retrieves the Management Complex firmware
+ * version information
+ * @mc_io: Pointer to opaque I/O object
+ * @mc_ver_info: Returned version information structure
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int mc_get_version(struct fsl_mc_io *mc_io, struct mc_version *mc_ver_info);
+
+/**
+ * dpmng_get_container_id() - Get container ID associated with a given portal.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @container_id: Requested container ID
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmng_get_container_id(struct fsl_mc_io *mc_io, int *container_id);
+
+#endif /* __FSL_DPMNG_H */
--- /dev/null
+/* Copyright 2013-2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef _FSL_DPRC_H
+#define _FSL_DPRC_H
+
+/* Data Path Resource Container API
+ * Contains DPRC API for managing and querying DPAA resources
+ */
+
+struct fsl_mc_io;
+
+/**
+ * Set this value as the icid value in dprc_cfg structure when creating a
+ * container, in case the ICID is not selected by the user and should be
+ * allocated by the DPRC from the pool of ICIDs.
+ */
+#define DPRC_GET_ICID_FROM_POOL (uint16_t)(~(0))
+
+/**
+ * Set this value as the portal_id value in dprc_cfg structure when creating a
+ * container, in case the portal ID is not specifically selected by the
+ * user and should be allocated by the DPRC from the pool of portal ids.
+ */
+#define DPRC_GET_PORTAL_ID_FROM_POOL (int)(~(0))
+
+/**
+ * dprc_open() - Open DPRC object for use
+ * @mc_io: Pointer to MC portal's I/O object
+ * @container_id: Container ID to open
+ * @token: Returned token of DPRC object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ *
+ * @warning Required before any operation on the object.
+ */
+int dprc_open(struct fsl_mc_io *mc_io, int container_id, uint16_t *token);
+
+/**
+ * dprc_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_close(struct fsl_mc_io *mc_io, uint16_t token);
+
+/**
+ * Container general options
+ *
+ * These options may be selected at container creation by the container creator
+ * and can be retrieved using dprc_get_attributes()
+ */
+
+/* Spawn Policy Option allowed - Indicates that the new container is allowed
+ * to spawn and have its own child containers.
+ */
+#define DPRC_CFG_OPT_SPAWN_ALLOWED 0x00000001
+
+/* General Container allocation policy - Indicates that the new container is
+ * allowed to allocate requested resources from its parent container; if not
+ * set, the container is only allowed to use resources in its own pools; Note
+ * that this is a container's global policy, but the parent container may
+ * override it and set specific quota per resource type.
+ */
+#define DPRC_CFG_OPT_ALLOC_ALLOWED 0x00000002
+
+/* Object initialization allowed - software context associated with this
+ * container is allowed to invoke object initialization operations.
+ */
+#define DPRC_CFG_OPT_OBJ_CREATE_ALLOWED 0x00000004
+
+/* Topology change allowed - software context associated with this
+ * container is allowed to invoke topology operations, such as attach/detach
+ * of network objects.
+ */
+#define DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED 0x00000008
+
+/* IOMMU bypass - indicates whether objects of this container are permitted
+ * to bypass the IOMMU.
+ */
+#define DPRC_CFG_OPT_IOMMU_BYPASS 0x00000010
+
+/* AIOP - Indicates that container belongs to AIOP. */
+#define DPRC_CFG_OPT_AIOP 0x00000020
+
+/**
+ * struct dprc_cfg - Container configuration options
+ * @icid: Container's ICID; if set to 'DPRC_GET_ICID_FROM_POOL', a free
+ * ICID value is allocated by the DPRC
+ * @portal_id: Portal ID; if set to 'DPRC_GET_PORTAL_ID_FROM_POOL', a free
+ * portal ID is allocated by the DPRC
+ * @options: Combination of 'DPRC_CFG_OPT_<X>' options
+ */
+struct dprc_cfg {
+ uint16_t icid;
+ int portal_id;
+ uint64_t options;
+};
+
+/**
+ * dprc_create_container() - Create child container
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @cfg: Child container configuration
+ * @child_container_id: Returned child container ID
+ * @child_portal_paddr: Returned base physical address of the
+ * child portal
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_create_container(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ struct dprc_cfg *cfg,
+ int *child_container_id,
+ uint64_t *child_portal_paddr);
+
+/**
+ * dprc_destroy_container() - Destroy child container.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @child_container_id: ID of the container to destroy
+ *
+ * This function terminates the child container, so following this call the
+ * child container ID becomes invalid.
+ *
+ * Notes:
+ * - All resources and objects of the destroyed container are returned to the
+ * parent container or destroyed if were created be the destroyed container.
+ * - This function destroy all the child containers of the specified
+ * container prior to destroying the container itself.
+ *
+ * warning: Only the parent container is allowed to destroy a child policy
+ * Container 0 can't be destroyed
+ *
+ * Return: '0' on Success; Error code otherwise.
+ *
+ */
+int dprc_destroy_container(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id);
+
+/**
+ * dprc_reset_container - Reset child container.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @child_container_id: ID of the container to reset
+ *
+ * In case a software context crashes or becomes non-responsive, the parent
+ * may wish to reset its resources container before the software context is
+ * restarted.
+ *
+ * This routine informs all objects assigned to the child container that the
+ * container is being reset, so they may perform any cleanup operations that are
+ * needed. All objects handles that were owned by the child container shall be
+ * closed.
+ *
+ * Note that such request may be submitted even if the child software context
+ * has not crashed, but the resulting object cleanup operations will not be
+ * aware of that.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_reset_container(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id);
+
+/* IRQ */
+
+/* Number of dprc's IRQs */
+#define DPRC_NUM_OF_IRQS 1
+
+/* Object irq events */
+
+/* IRQ event - Indicates that a new object assigned to the container */
+#define DPRC_IRQ_EVENT_OBJ_ADDED 0x00000001
+/* IRQ event - Indicates that an object was unassigned from the container */
+#define DPRC_IRQ_EVENT_OBJ_REMOVED 0x00000002
+/* IRQ event - Indicates that resources assigned to the container */
+#define DPRC_IRQ_EVENT_RES_ADDED 0x00000004
+/* IRQ event - Indicates that resources unassigned from the container */
+#define DPRC_IRQ_EVENT_RES_REMOVED 0x00000008
+/* IRQ event - Indicates that one of the descendant containers that opened by
+ * this container is destroyed
+ */
+#define DPRC_IRQ_EVENT_CONTAINER_DESTROYED 0x00000010
+
+/* IRQ event - Indicates that on one of the container's opened object is
+ * destroyed
+ */
+#define DPRC_IRQ_EVENT_OBJ_DESTROYED 0x00000020
+
+/* Irq event - Indicates that object is created at the container */
+#define DPRC_IRQ_EVENT_OBJ_CREATED 0x00000040
+
+/**
+ * dprc_set_irq() - Set IRQ information for the DPRC to trigger an interrupt.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @irq_index: Identifies the interrupt index to configure
+ * @irq_addr: Address that must be written to
+ * signal a message-based interrupt
+ * @irq_val: Value to write into irq_addr address
+ * @user_irq_id: Returned a user defined number associated with this IRQ
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_set_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint64_t irq_addr,
+ uint32_t irq_val,
+ int user_irq_id);
+
+/**
+ * dprc_get_irq() - Get IRQ information from the DPRC.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @irq_index: The interrupt index to configure
+ * @type: Returned interrupt type: 0 represents message interrupt
+ * type (both irq_addr and irq_val are valid)
+ * @irq_addr: Returned address that must be written to
+ * signal the message-based interrupt
+ * @irq_val: Value to write into irq_addr address
+ * @user_irq_id: A user defined number associated with this IRQ
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ int *type,
+ uint64_t *irq_addr,
+ uint32_t *irq_val,
+ int *user_irq_id);
+
+/**
+ * dprc_set_irq_enable() - Set overall interrupt state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @irq_index: The interrupt index to configure
+ * @en: Interrupt state - enable = 1, disable = 0
+ *
+ * Allows GPP software to control when interrupts are generated.
+ * Each interrupt can have up to 32 causes. The enable/disable control's the
+ * overall interrupt state. if the interrupt is disabled no causes will cause
+ * an interrupt.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_set_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t en);
+
+/**
+ * dprc_get_irq_enable() - Get overall interrupt state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @irq_index: The interrupt index to configure
+ * @en: Returned interrupt state - enable = 1, disable = 0
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t *en);
+
+/**
+ * dprc_set_irq_mask() - Set interrupt mask.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @irq_index: The interrupt index to configure
+ * @mask: event mask to trigger interrupt;
+ * each bit:
+ * 0 = ignore event
+ * 1 = consider event for asserting irq
+ *
+ * Every interrupt can have up to 32 causes and the interrupt model supports
+ * masking/unmasking each cause independently
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_set_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t mask);
+
+/**
+ * dprc_get_irq_mask() - Get interrupt mask.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @irq_index: The interrupt index to configure
+ * @mask: Returned event mask to trigger interrupt
+ *
+ * Every interrupt can have up to 32 causes and the interrupt model supports
+ * masking/unmasking each cause independently
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *mask);
+
+/**
+ * dprc_get_irq_status() - Get the current status of any pending interrupts.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @irq_index: The interrupt index to configure
+ * @status: Returned interrupts status - one bit per cause:
+ * 0 = no interrupt pending
+ * 1 = interrupt pending
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *status);
+
+/**
+ * dprc_clear_irq_status() - Clear a pending interrupt's status
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @irq_index: The interrupt index to configure
+ * @status: bits to clear (W1C) - one bit per cause:
+ * 0 = don't change
+ * 1 = clear status bit
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_clear_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t status);
+
+/**
+ * struct dprc_attributes - Container attributes
+ * @container_id: Container's ID
+ * @icid: Container's ICID
+ * @portal_id: Container's portal ID
+ * @options: Container's options as set at container's creation
+ * @version: DPRC version
+ */
+struct dprc_attributes {
+ int container_id;
+ uint16_t icid;
+ int portal_id;
+ uint64_t options;
+ /**
+ * struct version - DPRC version
+ * @major: DPRC major version
+ * @minor: DPRC minor version
+ */
+ struct {
+ uint16_t major;
+ uint16_t minor;
+ } version;
+};
+
+/**
+ * dprc_get_attributes() - Obtains container attributes
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @attributes Returned container attributes
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_attributes(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ struct dprc_attributes *attributes);
+
+/**
+ * dprc_set_res_quota() - Set allocation policy for a specific resource/object
+ * type in a child container
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @child_container_id: ID of the child container
+ * @type: Resource/object type
+ * @quota: Sets the maximum number of resources of the selected type
+ * that the child container is allowed to allocate from its parent;
+ * when quota is set to -1, the policy is the same as container's
+ * general policy.
+ *
+ * Allocation policy determines whether or not a container may allocate
+ * resources from its parent. Each container has a 'global' allocation policy
+ * that is set when the container is created.
+ *
+ * This function sets allocation policy for a specific resource type.
+ * The default policy for all resource types matches the container's 'global'
+ * allocation policy.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ *
+ * @warning Only the parent container is allowed to change a child policy.
+ */
+int dprc_set_res_quota(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id,
+ char *type,
+ uint16_t quota);
+
+/**
+ * dprc_get_res_quota() - Gets the allocation policy of a specific
+ * resource/object type in a child container
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @child_container_id; ID of the child container
+ * @type: resource/object type
+ * @quota: Returnes the maximum number of resources of the selected type
+ * that the child container is allowed to allocate from the parent;
+ * when quota is set to -1, the policy is the same as container's
+ * general policy.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_res_quota(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id,
+ char *type,
+ uint16_t *quota);
+
+/* Resource request options */
+
+/* Explicit resource ID request - The requested objects/resources
+ * are explicit and sequential (in case of resources).
+ * The base ID is given at res_req at base_align field
+ */
+#define DPRC_RES_REQ_OPT_EXPLICIT 0x00000001
+
+/* Aligned resources request - Relevant only for resources
+ * request (and not objects). Indicates that resources base ID should be
+ * sequential and aligned to the value given at dprc_res_req base_align field
+ */
+#define DPRC_RES_REQ_OPT_ALIGNED 0x00000002
+
+/* Plugged Flag - Relevant only for object assignment request.
+ * Indicates that after all objects assigned. An interrupt will be invoked at
+ * the relevant GPP. The assigned object will be marked as plugged.
+ * plugged objects can't be assigned from their container
+ */
+#define DPRC_RES_REQ_OPT_PLUGGED 0x00000004
+
+/**
+ * struct dprc_res_req - Resource request descriptor, to be used in assignment
+ * or un-assignment of resources and objects.
+ * @type: Resource/object type: Represent as a NULL terminated string.
+ * This string may received by using dprc_get_pool() to get resource
+ * type and dprc_get_obj() to get object type;
+ * Note: it is not possible to assign/un-assign DPRC objects
+ * @num: Number of resources
+ * @options: Request options: combination of DPRC_RES_REQ_OPT_ options
+ * @id_base_align: In case of explicit assignment (DPRC_RES_REQ_OPT_EXPLICIT
+ * is set at option), this field represents the required base ID
+ * for resource allocation; In case of aligned assignment
+ * (DPRC_RES_REQ_OPT_ALIGNED is set at option), this field
+ * indicates the required alignment for the resource ID(s) -
+ * use 0 if there is no alignment or explicit ID requirements
+ */
+struct dprc_res_req {
+ char type[16];
+ uint32_t num;
+ uint32_t options;
+ int id_base_align;
+};
+
+/**
+ * dprc_assign() - Assigns objects or resource to a child container.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @container_id: ID of the child container
+ * @res_req: Describes the type and amount of resources to
+ * assign to the given container
+ *
+ * Assignment is usually done by a parent (this DPRC) to one of its child
+ * containers.
+ *
+ * According to the DPRC allocation policy, the assigned resources may be taken
+ * (allocated) from the container's ancestors, if not enough resources are
+ * available in the container itself.
+ *
+ * The type of assignment depends on the dprc_res_req options, as follows:
+ * - DPRC_RES_REQ_OPT_EXPLICIT: indicates that assigned resources should have
+ * the explicit base ID specified at the id_base_align field of res_req.
+ * - DPRC_RES_REQ_OPT_ALIGNED: indicates that the assigned resources should be
+ * aligned to the value given at id_base_align field of res_req.
+ * - DPRC_RES_REQ_OPT_PLUGGED: Relevant only for object assignment,
+ * and indicates that the object must be set to the plugged state.
+ *
+ * A container may use this function with its own ID in order to change a
+ * object state to plugged or unplugged.
+ *
+ * If IRQ information has been set in the child DPRC, it will signal an
+ * interrupt following every change in its object assignment.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_assign(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int container_id,
+ struct dprc_res_req *res_req);
+
+/**
+ * dprc_unassign() - Un-assigns objects or resources from a child container
+ * and moves them into this (parent) DPRC.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @child_container_id: ID of the child container
+ * @res_req: Describes the type and amount of resources to un-assign from
+ * the child container
+ *
+ * Un-assignment of objects can succeed only if the object is not in the
+ * plugged or opened state.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_unassign(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id,
+ struct dprc_res_req *res_req);
+
+/**
+ * dprc_get_pool_count() - Get the number of dprc's pools
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @pool_count: Returned number of resource pools in the dprc
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_pool_count(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int *pool_count);
+
+/**
+ * dprc_get_pool() - Get the type (string) of a certain dprc's pool
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @pool_index; Index of the pool to be queried (< pool_count)
+ * @type: The type of the pool
+ *
+ * The pool types retrieved one by one by incrementing
+ * pool_index up to (not including) the value of pool_count returned
+ * from dprc_get_pool_count(). dprc_get_pool_count() must
+ * be called prior to dprc_get_pool().
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_pool(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int pool_index,
+ char *type);
+
+/**
+ * dprc_get_obj_count() - Obtains the number of objects in the DPRC
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @obj_count: Number of objects assigned to the DPRC
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_obj_count(struct fsl_mc_io *mc_io, uint16_t token, int *obj_count);
+
+/* Objects Attributes Flags */
+
+/* Opened state - Indicates that an object is open by at least one owner */
+#define DPRC_OBJ_STATE_OPEN 0x00000001
+/* Plugged state - Indicates that the object is plugged */
+#define DPRC_OBJ_STATE_PLUGGED 0x00000002
+
+/**
+ * struct dprc_obj_desc - Object descriptor, returned from dprc_get_obj()
+ * @type: Type of object: NULL terminated string
+ * @id: ID of logical object resource
+ * @vendor: Object vendor identifier
+ * @ver_major: Major version number
+ * @ver_minor: Minor version number
+ * @irq_count: Number of interrupts supported by the object
+ * @region_count: Number of mappable regions supported by the object
+ * @state: Object state: combination of DPRC_OBJ_STATE_ states
+ */
+struct dprc_obj_desc {
+ char type[16];
+ int id;
+ uint16_t vendor;
+ uint16_t ver_major;
+ uint16_t ver_minor;
+ uint8_t irq_count;
+ uint8_t region_count;
+ uint32_t state;
+};
+
+/**
+ * dprc_get_obj() - Get general information on an object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @obj_index: Index of the object to be queried (< obj_count)
+ * @obj_desc: Returns the requested object descriptor
+ *
+ * The object descriptors are retrieved one by one by incrementing
+ * obj_index up to (not including) the value of obj_count returned
+ * from dprc_get_obj_count(). dprc_get_obj_count() must
+ * be called prior to dprc_get_obj().
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_obj(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int obj_index,
+ struct dprc_obj_desc *obj_desc);
+
+/**
+ * dprc_get_res_count() - Obtains the number of free resources that are assigned
+ * to this container, by pool type
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @type: pool type
+ * @res_count: Returned number of free resources of the given
+ * resource type that are assigned to this DPRC
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_res_count(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ char *type,
+ int *res_count);
+
+/**
+ * enum dprc_iter_status - Iteration status
+ * @DPRC_ITER_STATUS_FIRST: Perform first iteration
+ * @DPRC_ITER_STATUS_MORE: Indicates more/next iteration is needed
+ * @DPRC_ITER_STATUS_LAST: Indicates last iteration
+ */
+enum dprc_iter_status {
+ DPRC_ITER_STATUS_FIRST = 0,
+ DPRC_ITER_STATUS_MORE = 1,
+ DPRC_ITER_STATUS_LAST = 2
+};
+
+/**
+ * struct dprc_res_ids_range_desc - Resource ID range descriptor
+ * @base_id: Base resource ID of this range
+ * @last_id: Last resource ID of this range
+ * @iter_status: Iteration status - should be set to DPRC_ITER_STATUS_FIRST at
+ * first iteration; while the returned marker is DPRC_ITER_STATUS_MORE,
+ * additional iterations are needed, until the returned marker is
+ * DPRC_ITER_STATUS_LAST
+ */
+struct dprc_res_ids_range_desc {
+ int base_id;
+ int last_id;
+ enum dprc_iter_status iter_status;
+};
+
+/**
+ * dprc_get_res_ids() - Obtains IDs of free resources in the container
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @type: pool type
+ * @range_desc: range descriptor
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_res_ids(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ char *type,
+ struct dprc_res_ids_range_desc *range_desc);
+
+/**
+ * dprc_get_portal_paddr() - Get the physical address of MC portals
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @portal_id: MC portal ID
+ * @portal_addr: The physical address of the MC portal ID
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_portal_paddr(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int portal_id,
+ uint64_t *portal_addr);
+
+/**
+ * struct dprc_region_desc - Mappable region descriptor
+ * @base_paddr: Region base physical address
+ * @size: Region size (in bytes)
+ */
+struct dprc_region_desc {
+ uint64_t base_paddr;
+ uint32_t size;
+};
+
+/**
+ * dprc_get_obj_region() - Get region information for a specified object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @obj_type; Object type as returned in dprc_get_obj()
+ * @obj_id: Unique object instance as returned in dprc_get_obj()
+ * @region_index: The specific region to query
+ * @region_desc: Returns the requested region descriptor
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_obj_region(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ char *obj_type,
+ int obj_id,
+ uint8_t region_index,
+ struct dprc_region_desc *region_desc);
+
+/**
+ * struct dprc_endpoint - Endpoint description for link connect/disconnect
+ * operations
+ * @type: Endpoint object type: NULL terminated string
+ * @id: Endpoint object ID
+ * @interface_id: Interface ID; should be set for endpoints with multiple
+ * interfaces ("dpsw", "dpdmux"); for others, always set to 0
+ */
+struct dprc_endpoint {
+ char type[16];
+ int id;
+ int interface_id;
+};
+
+/**
+ * dprc_connect() - Connect two endpoints to create a network link between them
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @endpoint1: Endpoint 1 configuration parameters
+ * @endpoint2: Endpoint 2 configuration parameters
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_connect(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ const struct dprc_endpoint *endpoint1,
+ const struct dprc_endpoint *endpoint2);
+
+/**
+ * dprc_disconnect() - Disconnect one endpoint to remove its network connection
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @endpoint: Endpoint configuration parameters
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_disconnect(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ const struct dprc_endpoint *endpoint);
+
+/**
+* dprc_get_connection() - Get connected endpoint and link status if connection
+* exists.
+* @mc_io Pointer to MC portal's I/O object
+* @token Token of DPRC object
+* @endpoint1 Endpoint 1 configuration parameters
+* @endpoint2 Returned endpoint 2 configuration parameters
+* @state: Returned link state: 1 - link is up, 0 - link is down
+*
+* Return: '0' on Success; -ENAVAIL if connection does not exist.
+*/
+int dprc_get_connection(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ const struct dprc_endpoint *endpoint1,
+ struct dprc_endpoint *endpoint2,
+ int *state);
+
+#endif /* _FSL_DPRC_H */
+
--- /dev/null
+/* Copyright 2013-2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __FSL_MC_CMD_H
+#define __FSL_MC_CMD_H
+
+#define MC_CMD_NUM_OF_PARAMS 7
+
+#define MAKE_UMASK64(_width) \
+ ((uint64_t)((_width) < 64 ? ((uint64_t)1 << (_width)) - 1 : -1))
+
+static inline uint64_t mc_enc(int lsoffset, int width, uint64_t val)
+{
+ return (uint64_t)(((uint64_t)val & MAKE_UMASK64(width)) << lsoffset);
+}
+
+static inline uint64_t mc_dec(uint64_t val, int lsoffset, int width)
+{
+ return (uint64_t)((val >> lsoffset) & MAKE_UMASK64(width));
+}
+
+struct mc_command {
+ uint64_t header;
+ uint64_t params[MC_CMD_NUM_OF_PARAMS];
+};
+
+enum mc_cmd_status {
+ MC_CMD_STATUS_OK = 0x0, /* Completed successfully */
+ MC_CMD_STATUS_READY = 0x1, /* Ready to be processed */
+ MC_CMD_STATUS_AUTH_ERR = 0x3, /* Authentication error */
+ MC_CMD_STATUS_NO_PRIVILEGE = 0x4, /* No privilege */
+ MC_CMD_STATUS_DMA_ERR = 0x5, /* DMA or I/O error */
+ MC_CMD_STATUS_CONFIG_ERR = 0x6, /* Configuration error */
+ MC_CMD_STATUS_TIMEOUT = 0x7, /* Operation timed out */
+ MC_CMD_STATUS_NO_RESOURCE = 0x8, /* No resources */
+ MC_CMD_STATUS_NO_MEMORY = 0x9, /* No memory available */
+ MC_CMD_STATUS_BUSY = 0xA, /* Device is busy */
+ MC_CMD_STATUS_UNSUPPORTED_OP = 0xB, /* Unsupported operation */
+ MC_CMD_STATUS_INVALID_STATE = 0xC /* Invalid state */
+};
+
+#define MC_CMD_HDR_CMDID_O 52 /* Command ID field offset */
+#define MC_CMD_HDR_CMDID_S 12 /* Command ID field size */
+#define MC_CMD_HDR_TOKEN_O 38 /* Token field offset */
+#define MC_CMD_HDR_TOKEN_S 10 /* Token field size */
+#define MC_CMD_HDR_STATUS_O 16 /* Status field offset */
+#define MC_CMD_HDR_STATUS_S 8 /* Status field size*/
+#define MC_CMD_HDR_PRI_O 15 /* Priority field offset */
+#define MC_CMD_HDR_PRI_S 1 /* Priority field size */
+
+#define MC_CMD_HDR_READ_STATUS(_hdr) \
+ ((enum mc_cmd_status)mc_dec((_hdr), \
+ MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S))
+
+#define MC_CMD_HDR_READ_TOKEN(_hdr) \
+ ((uint16_t)mc_dec((_hdr), MC_CMD_HDR_TOKEN_O, MC_CMD_HDR_TOKEN_S))
+
+#define MC_CMD_PRI_LOW 0 /* Low Priority command indication */
+#define MC_CMD_PRI_HIGH 1 /* High Priority command indication */
+
+#define MC_EXT_OP(_ext, _param, _offset, _width, _type, _arg) \
+ ((_ext)[_param] |= mc_enc((_offset), (_width), _arg))
+
+#define MC_CMD_OP(_cmd, _param, _offset, _width, _type, _arg) \
+ ((_cmd).params[_param] |= mc_enc((_offset), (_width), _arg))
+
+#define MC_RSP_OP(_cmd, _param, _offset, _width, _type, _arg) \
+ (_arg = (_type)mc_dec(_cmd.params[_param], (_offset), (_width)))
+
+static inline uint64_t mc_encode_cmd_header(uint16_t cmd_id,
+ uint8_t priority,
+ uint16_t token)
+{
+ uint64_t hdr;
+
+ hdr = mc_enc(MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S, cmd_id);
+ hdr |= mc_enc(MC_CMD_HDR_TOKEN_O, MC_CMD_HDR_TOKEN_S, token);
+ hdr |= mc_enc(MC_CMD_HDR_PRI_O, MC_CMD_HDR_PRI_S, priority);
+ hdr |= mc_enc(MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S,
+ MC_CMD_STATUS_READY);
+
+ return hdr;
+}
+
+#endif /* __FSL_MC_CMD_H */
--- /dev/null
+/*
+ * Freescale Management Complex (MC) bus private declarations
+ *
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ * Author: German Rivera <German.Rivera@freescale.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#ifndef _FSL_MC_PRIVATE_H_
+#define _FSL_MC_PRIVATE_H_
+
+#include "../include/mc.h"
+#include <linux/mutex.h>
+#include <linux/stringify.h>
+
+#define FSL_MC_DPRC_DRIVER_NAME "fsl_mc_dprc"
+
+#define FSL_MC_DEVICE_MATCH(_mc_dev, _obj_desc) \
+ (strcmp((_mc_dev)->obj_desc.type, (_obj_desc)->type) == 0 && \
+ (_mc_dev)->obj_desc.id == (_obj_desc)->id)
+
+#define FSL_MC_IS_ALLOCATABLE(_obj_type) \
+ (strcmp(_obj_type, "dpbp") == 0 || \
+ strcmp(_obj_type, "dpmcp") == 0 || \
+ strcmp(_obj_type, "dpcon") == 0)
+
+/**
+ * struct fsl_mc - Private data of a "fsl,qoriq-mc" platform device
+ * @root_mc_bus_dev: MC object device representing the root DPRC
+ * @addr_translation_ranges: array of bus to system address translation ranges
+ */
+struct fsl_mc {
+ struct fsl_mc_device *root_mc_bus_dev;
+ uint8_t num_translation_ranges;
+ struct fsl_mc_addr_translation_range *translation_ranges;
+};
+
+/**
+ * struct fsl_mc_addr_translation_range - bus to system address translation
+ * range
+ * @start_mc_addr: Start MC address of the range being translated
+ * @end_mc_addr: MC address of the first byte after the range (last MC
+ * address of the range is end_mc_addr - 1)
+ * @start_phys_addr: system physical address corresponding to start_mc_addr
+ */
+struct fsl_mc_addr_translation_range {
+ uint64_t start_mc_addr;
+ uint64_t end_mc_addr;
+ phys_addr_t start_phys_addr;
+};
+
+/**
+ * struct fsl_mc_resource_pool - Pool of MC resources of a given
+ * type
+ * @type: type of resources in the pool
+ * @max_count: maximum number of resources in the pool
+ * @free_count: number of free resources in the pool
+ * @mutex: mutex to serialize access to the pool's free list
+ * @free_list: anchor node of list of free resources in the pool
+ * @mc_bus: pointer to the MC bus that owns this resource pool
+ */
+struct fsl_mc_resource_pool {
+ enum fsl_mc_pool_type type;
+ int16_t max_count;
+ int16_t free_count;
+ struct mutex mutex; /* serializes access to free_list */
+ struct list_head free_list;
+ struct fsl_mc_bus *mc_bus;
+};
+
+/**
+ * struct fsl_mc_bus - logical bus that corresponds to a physical DPRC
+ * @mc_dev: fsl-mc device for the bus device itself.
+ * @resource_pools: array of resource pools (one pool per resource type)
+ * for this MC bus. These resources represent allocatable entities
+ * from the physical DPRC.
+ * @scan_mutex: Serializes bus scanning
+ */
+struct fsl_mc_bus {
+ struct fsl_mc_device mc_dev;
+ struct fsl_mc_resource_pool resource_pools[FSL_MC_NUM_POOL_TYPES];
+ struct mutex scan_mutex; /* serializes bus scanning */
+};
+
+#define to_fsl_mc_bus(_mc_dev) \
+ container_of(_mc_dev, struct fsl_mc_bus, mc_dev)
+
+int __must_check fsl_mc_device_add(struct dprc_obj_desc *obj_desc,
+ struct fsl_mc_io *mc_io,
+ struct device *parent_dev,
+ struct fsl_mc_device **new_mc_dev);
+
+void fsl_mc_device_remove(struct fsl_mc_device *mc_dev);
+
+int dprc_scan_container(struct fsl_mc_device *mc_bus_dev);
+
+int dprc_scan_objects(struct fsl_mc_device *mc_bus_dev);
+
+int __init dprc_driver_init(void);
+
+void __exit dprc_driver_exit(void);
+
+int __init fsl_mc_allocator_driver_init(void);
+
+void __exit fsl_mc_allocator_driver_exit(void);
+
+int __must_check fsl_mc_resource_allocate(struct fsl_mc_bus *mc_bus,
+ enum fsl_mc_pool_type pool_type,
+ struct fsl_mc_resource
+ **new_resource);
+
+void fsl_mc_resource_free(struct fsl_mc_resource *resource);
+
+#endif /* _FSL_MC_PRIVATE_H_ */
--- /dev/null
+/* Copyright 2013-2014 Freescale Semiconductor Inc.
+ *
+ * Interface of the I/O services to send MC commands to the MC hardware
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _FSL_MC_SYS_H
+#define _FSL_MC_SYS_H
+
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/dma-mapping.h>
+
+struct fsl_mc_resource;
+struct mc_command;
+
+/**
+ * struct fsl_mc_io - MC I/O object to be passed-in to mc_send_command()
+ * @dev: device associated with this Mc I/O object
+ * @flags: flags for mc_send_command()
+ * @portal_size: MC command portal size in bytes
+ * @portal_phys_addr: MC command portal physical address
+ * @portal_virt_addr: MC command portal virtual address
+ * @resource: generic resource associated with the MC portal if
+ * the MC portal came from a resource pool, or NULL if the MC portal
+ * is permanently bound to a device (e.g., a DPRC)
+ */
+struct fsl_mc_io {
+ struct device *dev;
+ uint32_t flags;
+ uint32_t portal_size;
+ phys_addr_t portal_phys_addr;
+ void __iomem *portal_virt_addr;
+ struct fsl_mc_resource *resource;
+};
+
+int __must_check fsl_create_mc_io(struct device *dev,
+ phys_addr_t mc_portal_phys_addr,
+ uint32_t mc_portal_size,
+ struct fsl_mc_resource *resource,
+ uint32_t flags, struct fsl_mc_io **new_mc_io);
+
+void fsl_destroy_mc_io(struct fsl_mc_io *mc_io);
+
+int mc_send_command(struct fsl_mc_io *mc_io, struct mc_command *cmd);
+
+#endif /* _FSL_MC_SYS_H */
--- /dev/null
+/*
+ * Freescale Management Complex (MC) bus public interface
+ *
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ * Author: German Rivera <German.Rivera@freescale.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#ifndef _FSL_MC_H_
+#define _FSL_MC_H_
+
+#include <linux/device.h>
+#include <linux/mod_devicetable.h>
+#include <linux/list.h>
+#include "../include/dprc.h"
+
+#define FSL_MC_VENDOR_FREESCALE 0x1957
+
+struct fsl_mc_device;
+struct fsl_mc_io;
+
+/**
+ * struct fsl_mc_driver - MC object device driver object
+ * @driver: Generic device driver
+ * @match_id_table: table of supported device matching Ids
+ * @probe: Function called when a device is added
+ * @remove: Function called when a device is removed
+ * @shutdown: Function called at shutdown time to quiesce the device
+ * @suspend: Function called when a device is stopped
+ * @resume: Function called when a device is resumed
+ *
+ * Generic DPAA device driver object for device drivers that are registered
+ * with a DPRC bus. This structure is to be embedded in each device-specific
+ * driver structure.
+ */
+struct fsl_mc_driver {
+ struct device_driver driver;
+ const struct fsl_mc_device_match_id *match_id_table;
+ int (*probe)(struct fsl_mc_device *dev);
+ int (*remove)(struct fsl_mc_device *dev);
+ void (*shutdown)(struct fsl_mc_device *dev);
+ int (*suspend)(struct fsl_mc_device *dev, pm_message_t state);
+ int (*resume)(struct fsl_mc_device *dev);
+};
+
+#define to_fsl_mc_driver(_drv) \
+ container_of(_drv, struct fsl_mc_driver, driver)
+
+/**
+ * struct fsl_mc_device_match_id - MC object device Id entry for driver matching
+ * @vendor: vendor ID
+ * @obj_type: MC object type
+ * @ver_major: MC object version major number
+ * @ver_minor: MC object version minor number
+ *
+ * Type of entries in the "device Id" table for MC object devices supported by
+ * a MC object device driver. The last entry of the table has vendor set to 0x0
+ */
+struct fsl_mc_device_match_id {
+ uint16_t vendor;
+ const char obj_type[16];
+ uint32_t ver_major;
+ uint32_t ver_minor;
+};
+
+/**
+ * enum fsl_mc_pool_type - Types of allocatable MC bus resources
+ *
+ * Entries in these enum are used as indices in the array of resource
+ * pools of an fsl_mc_bus object.
+ */
+enum fsl_mc_pool_type {
+ FSL_MC_POOL_DPMCP = 0x0, /* corresponds to "dpmcp" in the MC */
+ FSL_MC_POOL_DPBP, /* corresponds to "dpbp" in the MC */
+ FSL_MC_POOL_DPCON, /* corresponds to "dpcon" in the MC */
+
+ /*
+ * NOTE: New resource pool types must be added before this entry
+ */
+ FSL_MC_NUM_POOL_TYPES
+};
+
+/**
+ * struct fsl_mc_resource - MC generic resource
+ * @type: type of resource
+ * @id: unique MC resource Id within the resources of the same type
+ * @data: pointer to resource-specific data if the resource is currently
+ * allocated, or NULL if the resource is not currently allocated.
+ * @parent_pool: pointer to the parent resource pool from which this
+ * resource is allocated from.
+ * @node: Node in the free list of the corresponding resource pool
+ *
+ * NOTE: This structure is to be embedded as a field of specific
+ * MC resource structures.
+ */
+struct fsl_mc_resource {
+ enum fsl_mc_pool_type type;
+ int32_t id;
+ void *data;
+ struct fsl_mc_resource_pool *parent_pool;
+ struct list_head node;
+};
+
+/**
+ * Bit masks for a MC object device (struct fsl_mc_device) flags
+ */
+#define FSL_MC_IS_DPRC 0x0001
+
+/**
+ * Default DMA mask for devices on a fsl-mc bus
+ */
+#define FSL_MC_DEFAULT_DMA_MASK (~0ULL)
+
+/**
+ * struct fsl_mc_device - MC object device object
+ * @dev: Linux driver model device object
+ * @dma_mask: Default DMA mask
+ * @flags: MC object device flags
+ * @icid: Isolation context ID for the device
+ * @mc_handle: MC handle for the corresponding MC object opened
+ * @mc_io: Pointer to MC IO object assigned to this device or
+ * NULL if none.
+ * @obj_desc: MC description of the DPAA device
+ * @regions: pointer to array of MMIO region entries
+ * @resource: generic resource associated with this MC object device, if any.
+ *
+ * Generic device object for MC object devices that are "attached" to a
+ * MC bus.
+ *
+ * NOTES:
+ * - For a non-DPRC object its icid is the same as its parent DPRC's icid.
+ * - The SMMU notifier callback gets invoked after device_add() has been
+ * called for an MC object device, but before the device-specific probe
+ * callback gets called.
+ * - DP_OBJ_DPRC objects are the only MC objects that have built-in MC
+ * portals. For all other MC objects, their device drivers are responsible for
+ * allocating MC portals for them by calling fsl_mc_portal_allocate().
+ * - Some types of MC objects (e.g., DP_OBJ_DPBP, DP_OBJ_DPCON) are
+ * treated as resources that can be allocated/deallocated from the
+ * corresponding resource pool in the object's parent DPRC, using the
+ * fsl_mc_object_allocate()/fsl_mc_object_free() functions. These MC objects
+ * are known as "allocatable" objects. For them, the corresponding
+ * fsl_mc_device's 'resource' points to the associated resource object.
+ * For MC objects that are not allocatable (e.g., DP_OBJ_DPRC, DP_OBJ_DPNI),
+ * 'resource' is NULL.
+ */
+struct fsl_mc_device {
+ struct device dev;
+ uint64_t dma_mask;
+ uint16_t flags;
+ uint16_t icid;
+ uint16_t mc_handle;
+ struct fsl_mc_io *mc_io;
+ struct dprc_obj_desc obj_desc;
+ struct resource *regions;
+ struct fsl_mc_resource *resource;
+};
+
+#define to_fsl_mc_device(_dev) \
+ container_of(_dev, struct fsl_mc_device, dev)
+
+/*
+ * module_fsl_mc_driver() - Helper macro for drivers that don't do
+ * anything special in module init/exit. This eliminates a lot of
+ * boilerplate. Each module may only use this macro once, and
+ * calling it replaces module_init() and module_exit()
+ */
+#define module_fsl_mc_driver(__fsl_mc_driver) \
+ module_driver(__fsl_mc_driver, fsl_mc_driver_register, \
+ fsl_mc_driver_unregister)
+
+/*
+ * Macro to avoid include chaining to get THIS_MODULE
+ */
+#define fsl_mc_driver_register(drv) \
+ __fsl_mc_driver_register(drv, THIS_MODULE)
+
+int __must_check __fsl_mc_driver_register(struct fsl_mc_driver *fsl_mc_driver,
+ struct module *owner);
+
+void fsl_mc_driver_unregister(struct fsl_mc_driver *driver);
+
+int __must_check fsl_mc_portal_allocate(struct fsl_mc_device *mc_dev,
+ uint16_t mc_io_flags,
+ struct fsl_mc_io **new_mc_io);
+
+void fsl_mc_portal_free(struct fsl_mc_io *mc_io);
+
+int fsl_mc_portal_reset(struct fsl_mc_io *mc_io);
+
+int __must_check fsl_mc_object_allocate(struct fsl_mc_device *mc_dev,
+ enum fsl_mc_pool_type pool_type,
+ struct fsl_mc_device **new_mc_adev);
+
+void fsl_mc_object_free(struct fsl_mc_device *mc_adev);
+
+extern struct bus_type fsl_mc_bus_type;
+
+#endif /* _FSL_MC_H_ */
.resume = ft1000_resume,
};
-static int __init init_ft1000_cs(void)
-{
- return pcmcia_register_driver(&ft1000_cs_driver);
-}
-
-static void __exit exit_ft1000_cs(void)
-{
- pcmcia_unregister_driver(&ft1000_cs_driver);
-}
-
-module_init(init_ft1000_cs);
-module_exit(exit_ft1000_cs);
+module_pcmcia_driver(ft1000_cs_driver);
void card_bootload(struct net_device *dev)
{
- struct ft1000_info *info = (struct ft1000_info *)netdev_priv(dev);
+ struct ft1000_info *info = netdev_priv(dev);
unsigned long flags;
u32 *pdata;
u32 size;
u16 get_handshake(struct net_device *dev, u16 expected_value)
{
- struct ft1000_info *info = (struct ft1000_info *)netdev_priv(dev);
+ struct ft1000_info *info = netdev_priv(dev);
u16 handshake;
u32 tempx;
int loopcnt;
void put_handshake(struct net_device *dev, u16 handshake_value)
{
- struct ft1000_info *info = (struct ft1000_info *)netdev_priv(dev);
+ struct ft1000_info *info = netdev_priv(dev);
u32 tempx;
if (info->AsicID == ELECTRABUZZ_ID) {
u16 get_request_type(struct net_device *dev)
{
- struct ft1000_info *info = (struct ft1000_info *)netdev_priv(dev);
+ struct ft1000_info *info = netdev_priv(dev);
u16 request_type;
u32 tempx;
long get_request_value(struct net_device *dev)
{
- struct ft1000_info *info = (struct ft1000_info *)netdev_priv(dev);
+ struct ft1000_info *info = netdev_priv(dev);
long value;
u16 w_val;
void put_request_value(struct net_device *dev, long lvalue)
{
- struct ft1000_info *info = (struct ft1000_info *)netdev_priv(dev);
+ struct ft1000_info *info = netdev_priv(dev);
u16 size;
u32 tempx;
u16 *usPtr = (u16 *)pHdr;
u16 chksum;
- chksum = ((((((usPtr[0] ^ usPtr[1]) ^ usPtr[2]) ^ usPtr[3]) ^
- usPtr[4]) ^ usPtr[5]) ^ usPtr[6]);
+ chksum = (((((usPtr[0] ^ usPtr[1]) ^ usPtr[2]) ^ usPtr[3]) ^
+ usPtr[4]) ^ usPtr[5]) ^ usPtr[6];
return chksum;
}
int card_download(struct net_device *dev, const u8 *pFileStart,
size_t FileLength)
{
- struct ft1000_info *info = (struct ft1000_info *)netdev_priv(dev);
+ struct ft1000_info *info = netdev_priv(dev);
int Status = SUCCESS;
u32 uiState;
u16 handshake;
/* Get buffer for provisioning data */
pbuffer =
- kmalloc((usHdrLength + sizeof(struct pseudo_hdr)),
+ kmalloc(usHdrLength + sizeof(struct pseudo_hdr),
GFP_ATOMIC);
if (pbuffer) {
- memcpy(pbuffer, (void *)pUcFile,
+ memcpy(pbuffer, pUcFile,
(u32) (usHdrLength +
sizeof(struct pseudo_hdr)));
/* link provisioning data */
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/in.h>
-#include <asm/io.h>
-#include <asm/bitops.h>
+#include <linux/io.h>
+#include <linux/bitops.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
/* new kernel */
MODULE_AUTHOR("");
-MODULE_DESCRIPTION
-("Support for Flarion Flash OFDM NIC Device. Support for PCMCIA when used with ft1000_cs.");
+MODULE_DESCRIPTION("Support for Flarion Flash OFDM NIC Device. Support for PCMCIA when used with ft1000_cs.");
MODULE_LICENSE("GPL");
MODULE_SUPPORTED_DEVICE("FT1000");
/*---------------------------------------------------------------------------
Function: ft1000_enable_interrupts
- Description: This function will enable interrupts base on the current interrupt mask.
+ Description: This function will enable interrupts base on the current
+ interrupt mask.
Input:
dev - device structure
Output:
pr_debug("current interrupt enable mask = 0x%x\n", tempword);
}
+/*---------------------------------------------------------------------------
+ Function: ft1000_read_dsp_timer
+ Description: This function reads the DSP timer and stores its value in the
+ DSP_TIME field of the ft1000_info struct passed as argument
+ Input:
+ dev - device structure
+ info - ft1000_info structure
+ Output:
+ None.
+
+ -------------------------------------------------------------------------*/
+static void ft1000_read_dsp_timer(struct net_device *dev,
+ struct ft1000_info *info)
+{
+ if (info->AsicID == ELECTRABUZZ_ID) {
+ info->DSP_TIME[0] = ft1000_read_dpram(dev, FT1000_DSP_TIMER0);
+ info->DSP_TIME[1] = ft1000_read_dpram(dev, FT1000_DSP_TIMER1);
+ info->DSP_TIME[2] = ft1000_read_dpram(dev, FT1000_DSP_TIMER2);
+ info->DSP_TIME[3] = ft1000_read_dpram(dev, FT1000_DSP_TIMER3);
+ } else {
+ info->DSP_TIME[0] =
+ ft1000_read_dpram_mag_16(dev, FT1000_MAG_DSP_TIMER0,
+ FT1000_MAG_DSP_TIMER0_INDX);
+ info->DSP_TIME[1] =
+ ft1000_read_dpram_mag_16(dev, FT1000_MAG_DSP_TIMER1,
+ FT1000_MAG_DSP_TIMER1_INDX);
+ info->DSP_TIME[2] =
+ ft1000_read_dpram_mag_16(dev, FT1000_MAG_DSP_TIMER2,
+ FT1000_MAG_DSP_TIMER2_INDX);
+ info->DSP_TIME[3] =
+ ft1000_read_dpram_mag_16(dev, FT1000_MAG_DSP_TIMER3,
+ FT1000_MAG_DSP_TIMER3_INDX);
+ }
+}
+
/*---------------------------------------------------------------------------
Function: ft1000_reset_asic
*/
if (info->AsicID == MAGNEMITE_ID) {
ft1000_write_reg(dev, FT1000_REG_RESET,
- (DSP_RESET_BIT | ASIC_RESET_BIT));
+ DSP_RESET_BIT | ASIC_RESET_BIT);
}
mdelay(1);
if (info->AsicID == ELECTRABUZZ_ID) {
int i;
unsigned long flags;
struct prov_record *ptr;
+ struct prov_record *tmp;
info->CardReady = 0;
info->ProgConStat = 0;
/* del_timer(&poll_timer); */
/* Make sure we free any memory reserve for provisioning */
- while (list_empty(&info->prov_list) == 0) {
+ list_for_each_entry_safe(ptr, tmp, &info->prov_list, list) {
pr_debug("deleting provisioning record\n");
- ptr = list_entry(info->prov_list.next, struct prov_record, list);
list_del(&ptr->list);
kfree(ptr->pprov_data);
kfree(ptr);
} else {
pr_debug("resetting ASIC and DSP\n");
ft1000_write_reg(dev, FT1000_REG_RESET,
- (DSP_RESET_BIT | ASIC_RESET_BIT));
+ DSP_RESET_BIT | ASIC_RESET_BIT);
}
/* Copy DSP session record into info block if this is not a coldstart */
FT1000_DPRAM_MAG_RX_BASE);
for (i = 0; i < MAX_DSP_SESS_REC / 2; i++) {
info->DSPSess.MagRec[i] =
- inl(dev->base_addr + FT1000_REG_MAG_DPDATA);
+ inl(dev->base_addr
+ + FT1000_REG_MAG_DPDATA);
}
}
spin_unlock_irqrestore(&info->dpram_lock, flags);
mdelay(10);
pr_debug("Take DSP out of reset\n");
- /* Wait for 0xfefe indicating dsp ready before starting download */
+ /*
+ * Wait for 0xfefe indicating dsp ready before starting
+ * download
+ */
for (i = 0; i < 50; i++) {
- tempword =
- ft1000_read_dpram_mag_16(dev, FT1000_MAG_DPRAM_FEFE,
- FT1000_MAG_DPRAM_FEFE_INDX);
+ tempword = ft1000_read_dpram_mag_16(dev,
+ FT1000_MAG_DPRAM_FEFE,
+ FT1000_MAG_DPRAM_FEFE_INDX);
if (tempword == 0xfefe)
break;
mdelay(20);
if (card_download(dev, fw_entry->data, fw_entry->size)) {
pr_debug("card download unsuccessful\n");
return false;
- } else {
- pr_debug("card download successful\n");
}
+ pr_debug("card download successful\n");
mdelay(10);
if (info->AsicID == ELECTRABUZZ_ID) {
/*
- * Need to initialize the FIFO length counter to zero in order to sync up
- * with the DSP
+ * Need to initialize the FIFO length counter to zero in order
+ * to sync up with the DSP
*/
info->fifo_cnt = 0;
ft1000_write_dpram(dev, FT1000_FIFO_LEN, info->fifo_cnt);
}
if (tempword != ho) {
pr_info("heartbeat failed - no ho detected\n");
- if (info->AsicID == ELECTRABUZZ_ID) {
- info->DSP_TIME[0] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER0);
- info->DSP_TIME[1] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER1);
- info->DSP_TIME[2] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER2);
- info->DSP_TIME[3] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER3);
- } else {
- info->DSP_TIME[0] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER0,
- FT1000_MAG_DSP_TIMER0_INDX);
- info->DSP_TIME[1] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER1,
- FT1000_MAG_DSP_TIMER1_INDX);
- info->DSP_TIME[2] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER2,
- FT1000_MAG_DSP_TIMER2_INDX);
- info->DSP_TIME[3] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER3,
- FT1000_MAG_DSP_TIMER3_INDX);
- }
+ ft1000_read_dsp_timer(dev, info);
info->DrvErrNum = DSP_HB_INFO;
if (ft1000_reset_card(dev) == 0) {
pr_info("Hardware Failure Detected - PC Card disabled\n");
if (tempword & FT1000_DB_HB) {
pr_info("heartbeat doorbell not clear by firmware\n");
- if (info->AsicID == ELECTRABUZZ_ID) {
- info->DSP_TIME[0] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER0);
- info->DSP_TIME[1] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER1);
- info->DSP_TIME[2] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER2);
- info->DSP_TIME[3] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER3);
- } else {
- info->DSP_TIME[0] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER0,
- FT1000_MAG_DSP_TIMER0_INDX);
- info->DSP_TIME[1] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER1,
- FT1000_MAG_DSP_TIMER1_INDX);
- info->DSP_TIME[2] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER2,
- FT1000_MAG_DSP_TIMER2_INDX);
- info->DSP_TIME[3] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER3,
- FT1000_MAG_DSP_TIMER3_INDX);
- }
+ ft1000_read_dsp_timer(dev, info);
info->DrvErrNum = DSP_HB_INFO;
if (ft1000_reset_card(dev) == 0) {
pr_info("Hardware Failure Detected - PC Card disabled\n");
return;
}
/*
- * Set dedicated area to hi and ring appropriate doorbell according
- * to hi/ho heartbeat protocol
+ * Set dedicated area to hi and ring appropriate doorbell
+ * according to hi/ho heartbeat protocol
*/
if (info->AsicID == ELECTRABUZZ_ID) {
ft1000_write_dpram(dev, FT1000_HI_HO, hi);
if (info->AsicID == ELECTRABUZZ_ID)
ft1000_write_dpram(dev, FT1000_HI_HO, hi);
else
- ft1000_write_dpram_mag_16(dev, FT1000_MAG_HI_HO, hi_mag, FT1000_MAG_HI_HO_INDX);
+ ft1000_write_dpram_mag_16(dev, FT1000_MAG_HI_HO,
+ hi_mag, FT1000_MAG_HI_HO_INDX);
if (info->AsicID == ELECTRABUZZ_ID)
tempword = ft1000_read_dpram(dev, FT1000_HI_HO);
else
- tempword = ntohs(ft1000_read_dpram_mag_16(dev, FT1000_MAG_HI_HO, FT1000_MAG_HI_HO_INDX));
-
+ tempword = ntohs(ft1000_read_dpram_mag_16(dev,
+ FT1000_MAG_HI_HO,
+ FT1000_MAG_HI_HO_INDX));
}
if (tempword != hi) {
pr_info("heartbeat failed - cannot write hi into DPRAM\n");
- if (info->AsicID == ELECTRABUZZ_ID) {
- info->DSP_TIME[0] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER0);
- info->DSP_TIME[1] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER1);
- info->DSP_TIME[2] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER2);
- info->DSP_TIME[3] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER3);
- } else {
- info->DSP_TIME[0] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER0,
- FT1000_MAG_DSP_TIMER0_INDX);
- info->DSP_TIME[1] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER1,
- FT1000_MAG_DSP_TIMER1_INDX);
- info->DSP_TIME[2] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER2,
- FT1000_MAG_DSP_TIMER2_INDX);
- info->DSP_TIME[3] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER3,
- FT1000_MAG_DSP_TIMER3_INDX);
- }
+ ft1000_read_dsp_timer(dev, info);
info->DrvErrNum = DSP_HB_INFO;
if (ft1000_reset_card(dev) == 0) {
pr_info("Hardware Failure Detected - PC Card disabled\n");
Output:
-------------------------------------------------------------------------*/
-static void ft1000_send_cmd(struct net_device *dev, u16 *ptempbuffer, int size, u16 qtype)
+static void ft1000_send_cmd(struct net_device *dev, u16 *ptempbuffer, int size,
+ u16 qtype)
{
struct ft1000_info *info = netdev_priv(dev);
int i;
unsigned long flags;
if (info->AsicID == ELECTRABUZZ_ID) {
- size = (ft1000_read_dpram(dev, *pnxtph)) + sizeof(struct pseudo_hdr);
+ size = ft1000_read_dpram(dev, *pnxtph)
+ + sizeof(struct pseudo_hdr);
} else {
- size =
- ntohs(ft1000_read_dpram_mag_16
- (dev, FT1000_MAG_PH_LEN,
- FT1000_MAG_PH_LEN_INDX)) + sizeof(struct pseudo_hdr);
+ size = ntohs(ft1000_read_dpram_mag_16(dev, FT1000_MAG_PH_LEN,
+ FT1000_MAG_PH_LEN_INDX))
+ + sizeof(struct pseudo_hdr);
}
if (size > maxsz) {
pr_debug("Invalid command length = %d\n", size);
return false;
+ }
+ ppseudohdr = (u16 *)pbuffer;
+ spin_lock_irqsave(&info->dpram_lock, flags);
+ if (info->AsicID == ELECTRABUZZ_ID) {
+ ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR,
+ FT1000_DPRAM_RX_BASE + 2);
+ for (i = 0; i <= (size >> 1); i++) {
+ tempword =
+ ft1000_read_reg(dev, FT1000_REG_DPRAM_DATA);
+ *pbuffer++ = ntohs(tempword);
+ }
} else {
- ppseudohdr = (u16 *)pbuffer;
- spin_lock_irqsave(&info->dpram_lock, flags);
- if (info->AsicID == ELECTRABUZZ_ID) {
- ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR,
- FT1000_DPRAM_RX_BASE + 2);
- for (i = 0; i <= (size >> 1); i++) {
- tempword =
- ft1000_read_reg(dev, FT1000_REG_DPRAM_DATA);
- *pbuffer++ = ntohs(tempword);
- }
- } else {
- ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR,
- FT1000_DPRAM_MAG_RX_BASE);
- *pbuffer = inw(dev->base_addr + FT1000_REG_MAG_DPDATAH);
- pr_debug("received data = 0x%x\n", *pbuffer);
- pbuffer++;
- ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR,
- FT1000_DPRAM_MAG_RX_BASE + 1);
- for (i = 0; i <= (size >> 2); i++) {
- *pbuffer =
- inw(dev->base_addr +
- FT1000_REG_MAG_DPDATAL);
- pbuffer++;
- *pbuffer =
- inw(dev->base_addr +
- FT1000_REG_MAG_DPDATAH);
- pbuffer++;
- }
- /* copy odd aligned word */
- *pbuffer = inw(dev->base_addr + FT1000_REG_MAG_DPDATAL);
- pr_debug("received data = 0x%x\n", *pbuffer);
+ ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR,
+ FT1000_DPRAM_MAG_RX_BASE);
+ *pbuffer = inw(dev->base_addr + FT1000_REG_MAG_DPDATAH);
+ pr_debug("received data = 0x%x\n", *pbuffer);
+ pbuffer++;
+ ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR,
+ FT1000_DPRAM_MAG_RX_BASE + 1);
+ for (i = 0; i <= (size >> 2); i++) {
+ *pbuffer =
+ inw(dev->base_addr +
+ FT1000_REG_MAG_DPDATAL);
pbuffer++;
- *pbuffer = inw(dev->base_addr + FT1000_REG_MAG_DPDATAH);
- pr_debug("received data = 0x%x\n", *pbuffer);
+ *pbuffer =
+ inw(dev->base_addr +
+ FT1000_REG_MAG_DPDATAH);
pbuffer++;
}
- if (size & 0x0001) {
- /* copy odd byte from fifo */
- tempword = ft1000_read_reg(dev, FT1000_REG_DPRAM_DATA);
- *pbuffer = ntohs(tempword);
- }
- spin_unlock_irqrestore(&info->dpram_lock, flags);
+ /* copy odd aligned word */
+ *pbuffer = inw(dev->base_addr + FT1000_REG_MAG_DPDATAL);
+ pr_debug("received data = 0x%x\n", *pbuffer);
+ pbuffer++;
+ *pbuffer = inw(dev->base_addr + FT1000_REG_MAG_DPDATAH);
+ pr_debug("received data = 0x%x\n", *pbuffer);
+ pbuffer++;
+ }
+ if (size & 0x0001) {
+ /* copy odd byte from fifo */
+ tempword = ft1000_read_reg(dev, FT1000_REG_DPRAM_DATA);
+ *pbuffer = ntohs(tempword);
+ }
+ spin_unlock_irqrestore(&info->dpram_lock, flags);
- /*
- * Check if pseudo header checksum is good
- * Calculate pseudo header checksum
- */
- tempword = *ppseudohdr++;
- for (i = 1; i < 7; i++)
- tempword ^= *ppseudohdr++;
- if ((tempword != *ppseudohdr)) {
- pr_debug("Pseudo header checksum mismatch\n");
- /* Drop this message */
- return false;
- }
- return true;
+ /*
+ * Check if pseudo header checksum is good
+ * Calculate pseudo header checksum
+ */
+ tempword = *ppseudohdr++;
+ for (i = 1; i < 7; i++)
+ tempword ^= *ppseudohdr++;
+ if (tempword != *ppseudohdr) {
+ pr_debug("Pseudo header checksum mismatch\n");
+ /* Drop this message */
+ return false;
}
+ return true;
}
/*---------------------------------------------------------------------------
if (ft1000_receive_cmd(dev, &cmdbuffer[0], MAX_CMD_SQSIZE, &tempword)) {
- /* Get the message type which is total_len + PSEUDO header + msgtype + message body */
+ /*
+ * Get the message type which is total_len + PSEUDO header
+ * + msgtype + message body
+ */
pdrvmsg = (struct drv_msg *)&cmdbuffer[0];
msgtype = ntohs(pdrvmsg->type);
pr_debug("Command message type = 0x%x\n", msgtype);
while (list_empty(&info->prov_list) == 0) {
pr_debug("Sending a provisioning message\n");
/* Make sure SLOWQ doorbell is clear */
- tempword =
- ft1000_read_reg(dev, FT1000_REG_DOORBELL);
+ tempword = ft1000_read_reg(dev,
+ FT1000_REG_DOORBELL);
i = 0;
while (tempword & FT1000_DB_DPRAM_TX) {
mdelay(5);
if (i == 10)
break;
}
- ptr =
- list_entry(info->prov_list.next,
- struct prov_record, list);
+ ptr = list_entry(info->prov_list.next,
+ struct prov_record, list);
len = *(u16 *)ptr->pprov_data;
len = htons(len);
ppseudo_hdr->checksum);
}
- ft1000_send_cmd(dev, (u16 *)ptr->pprov_data, len, SLOWQ_TYPE);
+ ft1000_send_cmd(dev, (u16 *)ptr->pprov_data,
+ len, SLOWQ_TYPE);
list_del(&ptr->list);
kfree(ptr->pprov_data);
kfree(ptr);
}
/*
- * Indicate adapter is ready to take application messages after all
- * provisioning messages are sent
+ * Indicate adapter is ready to take application
+ * messages after all provisioning messages are sent
*/
info->CardReady = 1;
break;
tempword = ft1000_read_reg(dev, FT1000_REG_DOORBELL);
if (tempword & FT1000_DB_DPRAM_TX) {
mdelay(10);
- tempword =
- ft1000_read_reg(dev, FT1000_REG_DOORBELL);
+ tempword = ft1000_read_reg(dev,
+ FT1000_REG_DOORBELL);
if (tempword & FT1000_DB_DPRAM_TX)
mdelay(10);
}
info->DSPInfoBlk[8] = 0x7200;
info->DSPInfoBlk[9] =
htons(info->DSPInfoBlklen);
- ft1000_send_cmd(dev, (u16 *)info->DSPInfoBlk, (u16)(info->DSPInfoBlklen+4), 0);
+ ft1000_send_cmd(dev, info->DSPInfoBlk,
+ (u16)(info->DSPInfoBlklen+4),
+ 0);
}
break;
tempword = ft1000_read_reg(dev, FT1000_REG_DOORBELL);
if (tempword & FT1000_DB_DPRAM_TX) {
mdelay(10);
- tempword =
- ft1000_read_reg(dev, FT1000_REG_DOORBELL);
+ tempword = ft1000_read_reg(dev,
+ FT1000_REG_DOORBELL);
if (tempword & FT1000_DB_DPRAM_TX)
mdelay(10);
}
*pmsg++ = convert.wrd;
*pmsg++ = htons(info->DrvErrNum);
- ft1000_send_cmd(dev, (u16 *)&tempbuffer[0], (u16)(0x0012), 0);
+ ft1000_send_cmd(dev, (u16 *)&tempbuffer[0],
+ (u16)(0x0012), 0);
info->DrvErrNum = 0;
}
FT1000_MAG_TOTAL_LEN_INDX));
}
pr_debug("total length = %d\n", total_len);
- if ((total_len < MAX_CMD_SQSIZE) && (total_len > sizeof(struct pseudo_hdr))) {
+ if ((total_len < MAX_CMD_SQSIZE)
+ && (total_len > sizeof(struct pseudo_hdr))) {
total_len += nxtph;
/*
- * ft1000_read_reg will return a value that needs to be byteswap
- * in order to get DSP_QID_OFFSET.
+ * ft1000_read_reg will return a value that needs to be
+ * byteswap in order to get DSP_QID_OFFSET.
*/
if (info->AsicID == ELECTRABUZZ_ID) {
- portid =
- (ft1000_read_dpram
- (dev,
- DSP_QID_OFFSET + FT1000_DPRAM_RX_BASE +
- 2) >> 8) & 0xff;
+ portid = (ft1000_read_dpram(dev, DSP_QID_OFFSET
+ + FT1000_DPRAM_RX_BASE + 2)
+ >> 8) & 0xff;
} else {
portid =
- (ft1000_read_dpram_mag_16
+ ft1000_read_dpram_mag_16
(dev, FT1000_MAG_PORT_ID,
- FT1000_MAG_PORT_ID_INDX) & 0xff);
+ FT1000_MAG_PORT_ID_INDX) & 0xff;
}
pr_debug("DSP_QID = 0x%x\n", portid);
if (portid == DRIVERID) {
- /* We are assumming one driver message from the DSP at a time. */
+ /*
+ * We are assumming one driver message from the
+ * DSP at a time.
+ */
ft1000_proc_drvmsg(dev);
}
}
if (doorbell & FT1000_DB_COND_RESET) {
/* Reset ASIC and DSP */
- if (info->AsicID == ELECTRABUZZ_ID) {
- info->DSP_TIME[0] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER0);
- info->DSP_TIME[1] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER1);
- info->DSP_TIME[2] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER2);
- info->DSP_TIME[3] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER3);
- } else {
- info->DSP_TIME[0] =
- ft1000_read_dpram_mag_16(dev, FT1000_MAG_DSP_TIMER0,
- FT1000_MAG_DSP_TIMER0_INDX);
- info->DSP_TIME[1] =
- ft1000_read_dpram_mag_16(dev, FT1000_MAG_DSP_TIMER1,
- FT1000_MAG_DSP_TIMER1_INDX);
- info->DSP_TIME[2] =
- ft1000_read_dpram_mag_16(dev, FT1000_MAG_DSP_TIMER2,
- FT1000_MAG_DSP_TIMER2_INDX);
- info->DSP_TIME[3] =
- ft1000_read_dpram_mag_16(dev, FT1000_MAG_DSP_TIMER3,
- FT1000_MAG_DSP_TIMER3_INDX);
- }
+ ft1000_read_dsp_timer(dev, info);
info->DrvErrNum = DSP_CONDRESET_INFO;
pr_debug("DSP conditional reset requested\n");
ft1000_reset_card(dev);
u16 tempword;
if (pcmcia->PktIntfErr > MAX_PH_ERR) {
- if (info->AsicID == ELECTRABUZZ_ID) {
- info->DSP_TIME[0] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER0);
- info->DSP_TIME[1] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER1);
- info->DSP_TIME[2] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER2);
- info->DSP_TIME[3] =
- ft1000_read_dpram(dev, FT1000_DSP_TIMER3);
- } else {
- info->DSP_TIME[0] =
- ft1000_read_dpram_mag_16(dev, FT1000_MAG_DSP_TIMER0,
- FT1000_MAG_DSP_TIMER0_INDX);
- info->DSP_TIME[1] =
- ft1000_read_dpram_mag_16(dev, FT1000_MAG_DSP_TIMER1,
- FT1000_MAG_DSP_TIMER1_INDX);
- info->DSP_TIME[2] =
- ft1000_read_dpram_mag_16(dev, FT1000_MAG_DSP_TIMER2,
- FT1000_MAG_DSP_TIMER2_INDX);
- info->DSP_TIME[3] =
- ft1000_read_dpram_mag_16(dev, FT1000_MAG_DSP_TIMER3,
- FT1000_MAG_DSP_TIMER3_INDX);
- }
+ ft1000_read_dsp_timer(dev, info);
info->DrvErrNum = DrvErrNum;
ft1000_reset_card(dev);
return;
- } else {
- /* Flush corrupted pkt from FIFO */
- i = 0;
- do {
- if (info->AsicID == ELECTRABUZZ_ID) {
- tempword =
- ft1000_read_reg(dev, FT1000_REG_DFIFO);
- tempword =
- ft1000_read_reg(dev, FT1000_REG_DFIFO_STAT);
- } else {
- templong =
- inl(dev->base_addr + FT1000_REG_MAG_DFR);
+ }
+ /* Flush corrupted pkt from FIFO */
+ i = 0;
+ do {
+ if (info->AsicID == ELECTRABUZZ_ID) {
+ tempword =
+ ft1000_read_reg(dev, FT1000_REG_DFIFO);
+ tempword =
+ ft1000_read_reg(dev, FT1000_REG_DFIFO_STAT);
+ } else {
+ templong =
+ inl(dev->base_addr + FT1000_REG_MAG_DFR);
+ tempword =
+ inw(dev->base_addr + FT1000_REG_MAG_DFSR);
+ }
+ i++;
+ /*
+ * This should never happen unless the ASIC is broken.
+ * We must reset to recover.
+ */
+ if ((i > 2048) || (tempword == 0)) {
+ ft1000_read_dsp_timer(dev, info);
+ if (tempword == 0) {
+ /*
+ * Let's check if ASIC reads are still ok by
+ * reading the Mask register which is never zero
+ * at this point of the code.
+ */
tempword =
- inw(dev->base_addr + FT1000_REG_MAG_DFSR);
- }
- i++;
- /*
- * This should never happen unless the ASIC is broken.
- * We must reset to recover.
- */
- if ((i > 2048) || (tempword == 0)) {
- if (info->AsicID == ELECTRABUZZ_ID) {
- info->DSP_TIME[0] =
- ft1000_read_dpram(dev,
- FT1000_DSP_TIMER0);
- info->DSP_TIME[1] =
- ft1000_read_dpram(dev,
- FT1000_DSP_TIMER1);
- info->DSP_TIME[2] =
- ft1000_read_dpram(dev,
- FT1000_DSP_TIMER2);
- info->DSP_TIME[3] =
- ft1000_read_dpram(dev,
- FT1000_DSP_TIMER3);
- } else {
- info->DSP_TIME[0] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER0,
- FT1000_MAG_DSP_TIMER0_INDX);
- info->DSP_TIME[1] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER1,
- FT1000_MAG_DSP_TIMER1_INDX);
- info->DSP_TIME[2] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER2,
- FT1000_MAG_DSP_TIMER2_INDX);
- info->DSP_TIME[3] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER3,
- FT1000_MAG_DSP_TIMER3_INDX);
- }
+ inw(dev->base_addr +
+ FT1000_REG_SUP_IMASK);
if (tempword == 0) {
/*
- * Let's check if ASIC reads are still ok by reading the Mask register
- * which is never zero at this point of the code.
+ * This indicates that we can not
+ * communicate with the ASIC
*/
- tempword =
- inw(dev->base_addr +
- FT1000_REG_SUP_IMASK);
- if (tempword == 0) {
- /* This indicates that we can not communicate with the ASIC */
- info->DrvErrNum =
- FIFO_FLUSH_BADCNT;
- } else {
- /* Let's assume that we really flush the FIFO */
- pcmcia->PktIntfErr++;
- return;
- }
+ info->DrvErrNum = FIFO_FLUSH_BADCNT;
} else {
- info->DrvErrNum = FIFO_FLUSH_MAXLIMIT;
+ /*
+ * Let's assume that we really flush
+ * the FIFO
+ */
+ pcmcia->PktIntfErr++;
+ return;
}
- return;
+ } else {
+ info->DrvErrNum = FIFO_FLUSH_MAXLIMIT;
}
- tempword = inw(dev->base_addr + FT1000_REG_SUP_STAT);
- } while ((tempword & 0x03) != 0x03);
- if (info->AsicID == ELECTRABUZZ_ID) {
- i++;
- pr_debug("Flushing FIFO complete = %x\n", tempword);
- /* Flush last word in FIFO. */
- tempword = ft1000_read_reg(dev, FT1000_REG_DFIFO);
- /* Update FIFO counter for DSP */
- i = i * 2;
- pr_debug("Flush Data byte count to dsp = %d\n", i);
- info->fifo_cnt += i;
- ft1000_write_dpram(dev, FT1000_FIFO_LEN,
- info->fifo_cnt);
- } else {
- pr_debug("Flushing FIFO complete = %x\n", tempword);
- /* Flush last word in FIFO */
- templong = inl(dev->base_addr + FT1000_REG_MAG_DFR);
- tempword = inw(dev->base_addr + FT1000_REG_SUP_STAT);
- pr_debug("FT1000_REG_SUP_STAT = 0x%x\n", tempword);
- tempword = inw(dev->base_addr + FT1000_REG_MAG_DFSR);
- pr_debug("FT1000_REG_MAG_DFSR = 0x%x\n", tempword);
+ return;
}
- if (DrvErrNum)
- pcmcia->PktIntfErr++;
+ tempword = inw(dev->base_addr + FT1000_REG_SUP_STAT);
+ } while ((tempword & 0x03) != 0x03);
+ if (info->AsicID == ELECTRABUZZ_ID) {
+ i++;
+ pr_debug("Flushing FIFO complete = %x\n", tempword);
+ /* Flush last word in FIFO. */
+ tempword = ft1000_read_reg(dev, FT1000_REG_DFIFO);
+ /* Update FIFO counter for DSP */
+ i = i * 2;
+ pr_debug("Flush Data byte count to dsp = %d\n", i);
+ info->fifo_cnt += i;
+ ft1000_write_dpram(dev, FT1000_FIFO_LEN,
+ info->fifo_cnt);
+ } else {
+ pr_debug("Flushing FIFO complete = %x\n", tempword);
+ /* Flush last word in FIFO */
+ templong = inl(dev->base_addr + FT1000_REG_MAG_DFR);
+ tempword = inw(dev->base_addr + FT1000_REG_SUP_STAT);
+ pr_debug("FT1000_REG_SUP_STAT = 0x%x\n", tempword);
+ tempword = inw(dev->base_addr + FT1000_REG_MAG_DFSR);
+ pr_debug("FT1000_REG_MAG_DFSR = 0x%x\n", tempword);
}
+ if (DrvErrNum)
+ pcmcia->PktIntfErr++;
}
/*---------------------------------------------------------------------------
skb = dev_alloc_skb(len + 12 + 2);
if (skb == NULL) {
- pr_debug("No Network buffers available\n");
/* Read High word to complete 32 bit access */
if (info->AsicID == MAGNEMITE_ID)
tempword = ft1000_read_reg(dev, FT1000_REG_MAG_DFRH);
info->stats.rx_bytes += (len + 12);
if (info->AsicID == ELECTRABUZZ_ID) {
- /* track how many bytes have been read from FIFO - round up to 16 bit word */
+ /* track how many bytes have been read from FIFO - round up to
+ * 16 bit word */
tempword = len + 16;
if (tempword & 0x01)
tempword++;
else
pseudo.blk.length = ntohs(len);
- pseudo.blk.source = DSPID; /* Need to swap to get in correct order */
+ pseudo.blk.source = DSPID; /* Need to swap to get in correct
+ order */
pseudo.blk.destination = HOSTID;
- pseudo.blk.portdest = NETWORKID; /* Need to swap to get in correct order */
+ pseudo.blk.portdest = NETWORKID; /* Need to swap to get in
+ correct order */
pseudo.blk.portsrc = DSPAIRID;
pseudo.blk.sh_str_id = 0;
pseudo.blk.control = 0;
{
ft1000_reset_card(dev);
- /* schedule ft1000_hbchk to perform periodic heartbeat checks on DSP and ASIC */
+ /* schedule ft1000_hbchk to perform periodic heartbeat checks on DSP
+ * and ASIC */
init_timer(&poll_timer);
poll_timer.expires = jiffies + (2 * HZ);
poll_timer.data = (u_long)dev;
/* Read interrupt type */
inttype = ft1000_read_reg(dev, FT1000_REG_SUP_ISR);
- /* Make sure we process all interrupt before leaving the ISR due to the edge trigger interrupt type */
+ /* Make sure we process all interrupt before leaving the ISR due to the
+ * edge trigger interrupt type */
while (inttype) {
if (inttype & ISR_DOORBELL_PEND)
ft1000_parse_dpram_msg(dev);
cnt = 0;
do {
- /* Check if we have packets in the Downlink FIFO */
+ /* Check if we have packets in the Downlink
+ * FIFO */
if (info->AsicID == ELECTRABUZZ_ID) {
- tempword =
- ft1000_read_reg(dev,
- FT1000_REG_DFIFO_STAT);
+ tempword = ft1000_read_reg(dev,
+ FT1000_REG_DFIFO_STAT);
} else {
- tempword =
- ft1000_read_reg(dev,
- FT1000_REG_MAG_DFSR);
+ tempword = ft1000_read_reg(dev,
+ FT1000_REG_MAG_DFSR);
}
- if (tempword & 0x1f) {
- ft1000_copy_up_pkt(dev);
- } else {
+ if (!(tempword & 0x1f))
break;
- }
+ ft1000_copy_up_pkt(dev);
cnt++;
} while (cnt < MAX_RCV_LOOP);
{
struct ft1000_info *info = netdev_priv(dev);
struct prov_record *ptr;
+ struct prov_record *tmp;
/* int cnt; */
info->CardReady = 0;
ft1000_disable_interrupts(dev);
/* Make sure we free any memory reserve for provisioning */
- while (list_empty(&info->prov_list) == 0) {
- ptr = list_entry(info->prov_list.next, struct prov_record, list);
+ list_for_each_entry_safe(ptr, tmp, &info->prov_list, list) {
list_del(&ptr->list);
kfree(ptr->pprov_data);
kfree(ptr);
struct ethtool_drvinfo *info)
{
struct ft1000_info *ft_info;
+
ft_info = netdev_priv(dev);
strlcpy(info->driver, "ft1000", sizeof(info->driver));
struct ft1000_pcmcia *pcmcia;
struct net_device *dev;
- static const struct net_device_ops ft1000ops = /* Slavius 21.10.2009 due to kernel changes */
- {
+ static const struct net_device_ops ft1000ops = {
.ndo_open = &ft1000_open,
.ndo_stop = &ft1000_close,
.ndo_start_xmit = &ft1000_start_xmit,
/* dev->open = &ft1000_open; */
/* dev->stop = &ft1000_close; */
- dev->netdev_ops = &ft1000ops; /* Slavius 21.10.2009 due to kernel changes */
+ dev->netdev_ops = &ft1000ops;
pr_debug("device name = %s\n", dev->name);
goto err_dev;
}
- if (request_irq(dev->irq, ft1000_interrupt, IRQF_SHARED, dev->name, dev)) {
+ if (request_irq(dev->irq, ft1000_interrupt, IRQF_SHARED, dev->name,
+ dev)) {
netdev_err(dev, "Could not request_irq\n");
goto err_dev;
}
goto err_irq;
}
- if (register_netdev(dev) != 0) {
+ if (register_netdev(dev)) {
pr_debug("Could not register netdev\n");
goto err_reg;
}
info->AsicID = ft1000_read_reg(dev, FT1000_REG_ASIC_ID);
if (info->AsicID == ELECTRABUZZ_ID) {
pr_debug("ELECTRABUZZ ASIC\n");
- if (request_firmware(&fw_entry, "ft1000.img", &link->dev) != 0) {
+ if (request_firmware(&fw_entry, "ft1000.img",
+ &link->dev) != 0) {
pr_info("Could not open ft1000.img\n");
goto err_unreg;
}
} else {
pr_debug("MAGNEMITE ASIC\n");
- if (request_firmware(&fw_entry, "ft2000.img", &link->dev) != 0) {
+ if (request_firmware(&fw_entry, "ft2000.img",
+ &link->dev) != 0) {
pr_info("Could not open ft2000.img\n");
goto err_unreg;
}
tmp->dent = dir;
tmp->file = file;
tmp->int_number = dev->CardNumber;
- list_add(&(tmp->list), &(dev->nodes.list));
+ list_add(&tmp->list, &dev->nodes.list);
pr_debug("registered debugfs directory \"%s\"\n", dev->DeviceName);
struct ft1000_usb *dev = (struct ft1000_usb *)inode->i_private;
int i, num;
- num = (MINOR(inode->i_rdev) & 0xf);
+ num = MINOR(inode->i_rdev) & 0xf;
pr_debug("minor number=%d\n", num);
info = file->private_data = netdev_priv(dev->net);
/* Search for available application info block */
for (i = 0; i < MAX_NUM_APP; i++) {
- if ((dev->app_info[i].fileobject == NULL)) {
+ if ((dev->app_info[i].fileobject == NULL))
break;
- }
}
/* Fail due to lack of application info block */
/* Connect Message */
pr_debug("IOCTL_FT1000_CONNECT\n");
ConnectionMsg[79] = 0xfc;
- result = card_send_command(ft1000dev, (unsigned short *)ConnectionMsg, 0x4c);
+ result = card_send_command(ft1000dev, ConnectionMsg, 0x4c);
break;
case IOCTL_DISCONNECT:
/* Disconnect Message */
pr_debug("IOCTL_FT1000_DISCONNECT\n");
ConnectionMsg[79] = 0xfd;
- result = card_send_command(ft1000dev, (unsigned short *)ConnectionMsg, 0x4c);
+ result = card_send_command(ft1000dev, ConnectionMsg, 0x4c);
break;
case IOCTL_GET_DSP_STAT_CMD:
/* pr_debug("IOCTL_FT1000_GET_DSP_STAT\n"); */
if (ft1000dev->fProvComplete == 0)
return -EACCES;
- ft1000dev->fAppMsgPend = 1;
+ ft1000dev->fAppMsgPend = true;
if (info->CardReady) {
} else {
/* Check if this message came from a registered application */
for (i = 0; i < MAX_NUM_APP; i++) {
- if (ft1000dev->app_info[i].fileobject == &file->f_owner) {
+ if (ft1000dev->app_info[i].fileobject == &file->f_owner)
break;
- }
}
if (i == MAX_NUM_APP) {
pr_debug("No matching application fileobject\n");
pmsg = (u16 *)&dpram_data->pseudohdr;
ppseudo_hdr = (struct pseudo_hdr *)pmsg;
total_len = msgsz+2;
- if (total_len & 0x1) {
+ if (total_len & 0x1)
total_len++;
- }
/* Insert slow queue sequence number */
ppseudo_hdr->seq_num = info->squeseqnum++;
}
pmsg++;
ppseudo_hdr = (struct pseudo_hdr *)pmsg;
- result = card_send_command(ft1000dev, (unsigned short *)dpram_data, total_len+2);
+ result = card_send_command(ft1000dev, dpram_data, total_len+2);
ft1000dev->app_info[app_index].nTxMsg++;
result = -ENOTTY;
break;
}
- ft1000dev->fAppMsgPend = 0;
+ ft1000dev->fAppMsgPend = false;
return result;
}
struct ft1000_usb *ft1000dev;
int i;
struct dpram_blk *pdpram_blk;
+ struct dpram_blk *tmp;
dev = file->private_data;
info = netdev_priv(dev);
if (i == MAX_NUM_APP)
return 0;
- while (list_empty(&ft1000dev->app_info[i].app_sqlist) == 0) {
+ list_for_each_entry_safe(pdpram_blk, tmp, &ft1000dev->app_info[i].app_sqlist, list) {
pr_debug("Remove and free memory queue up on slow queue\n");
- pdpram_blk = list_entry(ft1000dev->app_info[i].app_sqlist.next, struct dpram_blk, list);
list_del(&pdpram_blk->list);
ft1000_free_buffer(pdpram_blk, &freercvpool);
}
while (loopcnt < 100) {
if (ft1000dev->usbboot == 2) {
status = ft1000_read_dpram32(ft1000dev, 0,
- (u8 *)&(ft1000dev->tempbuf[0]), 64);
+ (u8 *)&ft1000dev->tempbuf[0], 64);
for (temp = 0; temp < 16; temp++) {
pr_debug("tempbuf %d = 0x%x\n",
temp, ft1000dev->tempbuf[temp]);
u16 chksum;
- chksum = ((((((usPtr[0] ^ usPtr[1]) ^ usPtr[2]) ^ usPtr[3]) ^
- usPtr[4]) ^ usPtr[5]) ^ usPtr[6]);
+ chksum = (((((usPtr[0] ^ usPtr[1]) ^ usPtr[2]) ^ usPtr[3]) ^
+ usPtr[4]) ^ usPtr[5]) ^ usPtr[6];
return chksum;
}
usb_sndbulkpipe(ft1000dev->dev,
ft1000dev->bulk_out_endpointAddr),
ft1000dev->tx_buf, byte_length, usb_dnld_complete,
- (void *)ft1000dev);
+ ft1000dev);
usb_submit_urb(ft1000dev->tx_urb, GFP_ATOMIC);
case REQUEST_CODE_SEGMENT:
status = request_code_segment(ft1000dev,
&s_file, &c_file,
- (const u8 *)boot_end,
+ boot_end,
true);
break;
default:
status = request_code_segment(ft1000dev,
&s_file, &c_file,
- (const u8 *)code_end,
+ code_end,
false);
break;
/* Get buffer for provisioning data */
pbuffer =
- kmalloc((pseudo_header_len +
- sizeof(struct pseudo_hdr)),
+ kmalloc(pseudo_header_len +
+ sizeof(struct pseudo_hdr),
GFP_ATOMIC);
if (pbuffer) {
- memcpy(pbuffer, (void *)c_file,
+ memcpy(pbuffer, c_file,
(u32) (pseudo_header_len +
sizeof(struct
pseudo_hdr)));
commandbuf = kmalloc(size + 2, GFP_KERNEL);
if (!commandbuf)
return -ENOMEM;
- memcpy((void *)commandbuf + 2, (void *)ptempbuffer, size);
+ memcpy((void *)commandbuf + 2, ptempbuffer, size);
if (temp & 0x0100)
usleep_range(900, 1100);
/* Let's use the register provided by the Magnemite ASIC to reset the
* ASIC and DSP.
*/
- ft1000_write_register(ft1000dev, (DSP_RESET_BIT | ASIC_RESET_BIT),
+ ft1000_write_register(ft1000dev, DSP_RESET_BIT | ASIC_RESET_BIT,
FT1000_REG_RESET);
mdelay(1);
struct ft1000_usb *ft1000dev = info->priv;
u16 tempword;
struct prov_record *ptr;
+ struct prov_record *tmp;
ft1000dev->fCondResetPend = true;
info->CardReady = 0;
ft1000dev->fProvComplete = false;
/* Make sure we free any memory reserve for provisioning */
- while (list_empty(&info->prov_list) == 0) {
+ list_for_each_entry_safe(ptr, tmp, &info->prov_list, list) {
pr_debug("deleting provisioning record\n");
- ptr =
- list_entry(info->prov_list.next, struct prov_record, list);
list_del(&ptr->list);
kfree(ptr->pprov_data);
kfree(ptr);
hdr.portdest ^ hdr.portsrc ^ hdr.sh_str_id ^ hdr.control;
memcpy(&pFt1000Dev->tx_buf[0], &hdr, sizeof(hdr));
- memcpy(&(pFt1000Dev->tx_buf[sizeof(struct pseudo_hdr)]), packet, len);
+ memcpy(&pFt1000Dev->tx_buf[sizeof(struct pseudo_hdr)], packet, len);
netif_stop_queue(netdev);
usb_sndbulkpipe(pFt1000Dev->dev,
pFt1000Dev->bulk_out_endpointAddr),
pFt1000Dev->tx_buf, count,
- ft1000_usb_transmit_complete, (void *)pFt1000Dev);
+ ft1000_usb_transmit_complete, pFt1000Dev);
t = (u8 *)pFt1000Dev->tx_urb->transfer_buffer;
goto err;
}
- ft1000_copy_down_pkt(dev, (pdata + ENET_HEADER_SIZE - 2),
+ ft1000_copy_down_pkt(dev, pdata + ENET_HEADER_SIZE - 2,
skb->len - ENET_HEADER_SIZE + 2);
err:
/* Reset ASIC and DSP */
status = ft1000_read_dpram16(dev,
FT1000_MAG_DSP_TIMER0,
- (u8 *)&(info->DSP_TIME[0]),
+ (u8 *)&info->DSP_TIME[0],
FT1000_MAG_DSP_TIMER0_INDX);
status = ft1000_read_dpram16(dev,
FT1000_MAG_DSP_TIMER1,
- (u8 *)&(info->DSP_TIME[1]),
+ (u8 *)&info->DSP_TIME[1],
FT1000_MAG_DSP_TIMER1_INDX);
status = ft1000_read_dpram16(dev,
FT1000_MAG_DSP_TIMER2,
- (u8 *)&(info->DSP_TIME[2]),
+ (u8 *)&info->DSP_TIME[2],
FT1000_MAG_DSP_TIMER2_INDX);
status = ft1000_read_dpram16(dev,
FT1000_MAG_DSP_TIMER3,
- (u8 *)&(info->DSP_TIME[3]),
+ (u8 *)&info->DSP_TIME[3],
FT1000_MAG_DSP_TIMER3_INDX);
info->CardReady = 0;
info->DrvErrNum = DSP_CONDRESET_INFO;
ret = request_firmware(&dsp_fw, "ft3000.img", &dev->dev);
if (ret < 0) {
- pr_err("Error request_firmware()\n");
+ dev_err(interface->usb_dev, "Error request_firmware()\n");
goto err_fw;
}
pr_debug("pft1000info=%p\n", pft1000info);
ret = dsp_reload(ft1000dev);
if (ret) {
- pr_err("Problem with DSP image loading\n");
+ dev_err(interface->usb_dev,
+ "Problem with DSP image loading\n");
goto err_load;
}
{
struct fwtty_port *port = tty->driver_data;
- fwtty_dbg(port, "CRTSCTS: %d\n", (C_CRTSCTS(tty) != 0));
+ fwtty_dbg(port, "CRTSCTS: %d\n", C_CRTSCTS(tty) != 0);
fwtty_profile_fifo(port, port->stats.unthrottle);
/* Allocate netdev */
net = alloc_netdev(sizeof(struct nic), pdn_dev_name,
NET_NAME_UNKNOWN, ether_setup);
- if (net == NULL) {
+ if (!net) {
pr_err("alloc_netdev failed\n");
ret = -ENOMEM;
goto err;
if (urb->status) {
if (mux_dev->usb_state == PM_NORMAL)
- pr_err("%s: urb status error %d\n",
+ dev_err(&urb->dev->dev, "%s: urb status error %d\n",
__func__, urb->status);
put_rx_struct(rx, r);
} else {
struct mux_tx *t = urb->context;
if (urb->status == -ECONNRESET) {
- pr_info("CONNRESET\n");
+ dev_info(&urb->dev->dev, "CONNRESET\n");
free_mux_tx(t);
return;
}
rx = &mux_dev->rx;
if (mux_dev->usb_state != PM_NORMAL) {
- pr_err("usb suspend - invalid state\n");
+ dev_err(intf->usb_dev, "usb suspend - invalid state\n");
return -1;
}
mux_dev = tty_dev->priv_dev;
if (mux_dev->usb_state != PM_SUSPEND) {
- pr_err("usb resume - invalid state\n");
+ dev_err(intf->usb_dev, "usb resume - invalid state\n");
return -1;
}
spin_unlock_irqrestore(&rx->to_host_lock, flags);
} else {
if (urb->status && udev->usb_state == PM_NORMAL)
- pr_err("%s: urb status error %d\n",
+ dev_err(&urb->dev->dev, "%s: urb status error %d\n",
__func__, urb->status);
put_rx_struct(rx, r);
unsigned long flags;
if (urb->status == -ECONNRESET) {
- pr_info("CONNRESET\n");
+ dev_info(&urb->dev->dev, "CONNRESET\n");
return;
}
ret = usb_submit_urb(t->urb, GFP_ATOMIC);
if (ret)
- pr_err("usb_submit_urb failed: %d\n", ret);
+ dev_err(&usbdev->dev, "usb_submit_urb failed: %d\n",
+ ret);
usb_mark_last_busy(usbdev);
udev->usbdev = usbdev;
ret = init_usb(udev);
if (ret < 0) {
- pr_err("init_usb func failed\n");
+ dev_err(intf->usb_dev, "init_usb func failed\n");
goto err_init_usb;
}
udev->intf = intf;
ret = request_mac_address(udev);
if (ret < 0) {
- pr_err("request Mac address failed\n");
+ dev_err(intf->usb_dev, "request Mac address failed\n");
goto err_mac_address;
}
udev = phy_dev->priv_dev;
rx = &udev->rx;
if (udev->usb_state != PM_NORMAL) {
- pr_err("usb suspend - invalid state\n");
+ dev_err(intf->usb_dev, "usb suspend - invalid state\n");
return -1;
}
rx = &udev->rx;
if (udev->usb_state != PM_SUSPEND) {
- pr_err("usb resume - invalid state\n");
+ dev_err(intf->usb_dev, "usb resume - invalid state\n");
return -1;
}
udev->usb_state = PM_NORMAL;
}
spin_unlock_irqrestore(&qos_free_list.lock, flags);
- entry = kmalloc(sizeof(*entry), GFP_ATOMIC);
- return entry;
+ return kmalloc(sizeof(*entry), GFP_ATOMIC);
}
static void free_qos_entry(void *entry)
if (ret < 0) {
if (ret != -ENOMEDIUM)
dev_err(&func->dev,
- "gdmwms: %s error: ret = %d\n",
- __func__, ret);
+ "gdmwms: error: ret = %d\n", ret);
goto end_io;
}
}
if (ret < 0) {
if (ret != -ENOMEDIUM)
dev_err(&func->dev,
- "gdmwms: %s error: ret = %d\n",
- __func__, ret);
+ "gdmwms: error: ret = %d\n", ret);
goto end_io;
}
}
int idx;
unsigned long flags;
struct evt_entry *e;
+ struct evt_entry *tmp;
spin_lock_irqsave(&wm_event.evt_lock, flags);
- while (!list_empty(&wm_event.evtq)) {
- e = list_entry(wm_event.evtq.next, struct evt_entry, list);
+ list_for_each_entry_safe(e, tmp, &wm_event.evtq, list) {
spin_unlock_irqrestore(&wm_event.evt_lock, flags);
if (sscanf(e->dev->name, "wm%d", &idx) == 1)
dev = alloc_netdev(sizeof(*nic), "wm%d", NET_NAME_UNKNOWN,
ether_setup);
- if (dev == NULL) {
+ if (!dev) {
pr_err("alloc_etherdev failed\n");
return -ENOMEM;
}
spinlock_t lock;
wait_queue_head_t wait;
- char __iomem *buffer_virt; /* combined buffer virtual address */
+ char *buffer_virt; /* combined buffer virtual address */
unsigned long buffer_phys; /* combined buffer physical address */
- char __iomem *write_buffer1; /* write buffer 1 virtual address */
- char __iomem *write_buffer2; /* write buffer 2 virtual address */
- char __iomem *read_buffer; /* read buffer virtual address */
+ char *write_buffer1; /* write buffer 1 virtual address */
+ char *write_buffer2; /* write buffer 2 virtual address */
+ char *read_buffer; /* read buffer virtual address */
int buffer_status;
int read_supported; /* true if we have audio input support */
};
length = (count > READ_BUFFER_SIZE ? READ_BUFFER_SIZE : count);
AUDIO_WRITE(data, AUDIO_START_READ, length);
- wait_event_interruptible(data->wait, (data->buffer_status &
- AUDIO_INT_READ_BUFFER_FULL));
+ wait_event_interruptible(data->wait, data->buffer_status &
+ AUDIO_INT_READ_BUFFER_FULL);
length = AUDIO_READ(data, AUDIO_READ_BUFFER_AVAILABLE);
struct goldfish_audio *data = fp->private_data;
unsigned long irq_flags;
ssize_t result = 0;
- char __iomem *kbuf;
+ char *kbuf;
while (count > 0) {
ssize_t copy = count;
if (copy > WRITE_BUFFER_SIZE)
copy = WRITE_BUFFER_SIZE;
- wait_event_interruptible(data->wait, (data->buffer_status &
+ wait_event_interruptible(data->wait, data->buffer_status &
(AUDIO_INT_WRITE_BUFFER_1_EMPTY |
- AUDIO_INT_WRITE_BUFFER_2_EMPTY)));
+ AUDIO_INT_WRITE_BUFFER_2_EMPTY));
if ((data->buffer_status & AUDIO_INT_WRITE_BUFFER_1_EMPTY) != 0)
kbuf = data->write_buffer1;
dma_addr_t buf_addr;
data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
- if (data == NULL)
+ if (!data)
return -ENOMEM;
spin_lock_init(&data->lock);
init_waitqueue_head(&data->wait);
mtd->priv = nand;
name = devm_kzalloc(&pdev->dev, name_len + 1, GFP_KERNEL);
- if (name == NULL)
+ if (!name)
return -ENOMEM;
mtd->name = name;
return -ENODEV;
base = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE);
- if (base == NULL)
+ if (!base)
return -ENOMEM;
version = readl(base + NAND_VERSION);
nand = devm_kzalloc(&pdev->dev, sizeof(*nand) +
sizeof(struct mtd_info) * num_dev, GFP_KERNEL);
- if (nand == NULL)
+ if (!nand)
return -ENOMEM;
mutex_init(&nand->lock);
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
-#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/device.h>
#include <linux/string.h>
struct i2o_device *i2o_dev = to_i2o_device(d);
int rc;
- if ((rc = i2o_bus_scan(i2o_dev)))
+ rc = i2o_bus_scan(i2o_dev);
+ if (rc)
osm_warn("bus scan failed %d\n", rc);
return count;
#include <linux/namei.h>
#include <linux/fs.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#define OSM_NAME "config-osm"
#define OSM_VERSION "1.323"
static void i2o_report_util_cmd(u8 cmd);
static void i2o_report_exec_cmd(u8 cmd);
-static void i2o_report_fail_status(u8 req_status, u32 * msg);
+static void i2o_report_fail_status(u8 req_status, u32 *msg);
static void i2o_report_common_status(u8 req_status);
static void i2o_report_common_dsc(u16 detailed_status);
u16 detailed_status = msg[4] & 0xFFFF;
if (cmd == I2O_CMD_UTIL_EVT_REGISTER)
- return; // No status in this reply
+ return; /* No status in this reply */
printk("%s%s: ", severity, str);
#ifdef DEBUG
u32 *msg = (u32 *) m;
int i;
+
printk(KERN_INFO "Dumping I2O message size %d @ %p\n",
msg[0] >> 16 & 0xffff, msg);
for (i = 0; i < ((msg[0] >> 16) & 0xffff); i++)
* Following fail status are common to all classes.
* The preserved message must be handled in the reply handler.
*/
-static void i2o_report_fail_status(u8 req_status, u32 * msg)
+static void i2o_report_fail_status(u8 req_status, u32 *msg)
{
static char *FAIL_STATUS[] = {
"0x80", /* not used */
size += 4 - size % 4;
opblk = kmalloc(size, GFP_KERNEL);
- if (opblk == NULL) {
- printk(KERN_ERR "i2o: no memory for query buffer.\n");
+ if (opblk == NULL)
return -ENOMEM;
- }
opblk[0] = 1; /* operation count */
opblk[1] = 0; /* pad */
for (i = 0; i2o_drivers[i]; i++)
if (i >= i2o_max_drivers) {
- osm_err("too many drivers registered, increase "
- "max_drivers\n");
+ osm_err("too many drivers registered, increase max_drivers\n");
spin_unlock_irqrestore(&i2o_drivers_lock, flags);
rc = -EFAULT;
goto out;
}
if (unlikely(!drv->reply)) {
- osm_debug("%s: Reply to driver %s, but no reply function"
- " defined!\n", c->name, drv->name);
+ osm_debug("%s: Reply to driver %s, but no reply function defined!\n",
+ c->name, drv->name);
return -EIO;
}
* to aid in debugging.
*
*/
- printk(KERN_WARNING "%s: Unsolicited message reply sent to core!"
- "Message dumped to syslog\n", c->name);
+ printk(KERN_WARNING "%s: Unsolicited message reply sent to core! Message dumped to syslog\n",
+ c->name);
i2o_dump_message(msg);
return -EFAULT;
return 0;
- context_remove:
+context_remove:
i2o_cntxt_list_remove(c, req);
- nop_msg:
+nop_msg:
i2o_msg_nop(c, msg);
- exit:
+exit:
return rc;
};
return dev;
- cleanup_queue:
+cleanup_queue:
put_disk(gd);
- cleanup_dev:
+cleanup_dev:
kfree(dev);
- exit:
+exit:
return ERR_PTR(rc);
};
struct i2o_block_device *i2o_blk_dev;
struct gendisk *gd;
struct request_queue *queue;
- static int unit = 0;
+ static int unit;
int rc;
u64 size;
u32 blocksize;
return 0;
- claim_release:
+claim_release:
i2o_device_claim_release(i2o_dev);
- exit:
+exit:
return rc;
};
return 0;
- unregister_blkdev:
+unregister_blkdev:
unregister_blkdev(I2O_MAJOR, "i2o_block");
- free_mempool:
+free_mempool:
mempool_destroy(i2o_blk_req_pool.pool);
- free_slab:
+free_slab:
kmem_cache_destroy(i2o_blk_req_pool.slab);
- exit:
+exit:
return rc;
};
#include <linux/mutex.h>
#include <linux/compat.h>
#include <linux/slab.h>
-
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#include "core.h"
struct i2o_cfg_info *next;
};
static struct i2o_cfg_info *open_files = NULL;
-static ulong i2o_cfg_info_id = 0;
+static ulong i2o_cfg_info_id;
static int i2o_cfg_getiops(unsigned long arg)
{
#include <linux/errno.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>
+#include <linux/uaccess.h>
#include <asm/io.h>
-#include <asm/uaccess.h>
#include <asm/byteorder.h>
/* Structure used to define /proc entries */
switch (serialno[0]) {
case I2O_SNFORMAT_BINARY: /* Binary */
seq_printf(seq, "0x");
- for (i = 0; i < serialno[1]; i++) {
+ for (i = 0; i < serialno[1]; i++)
seq_printf(seq, "%02X", serialno[2 + i]);
- }
break;
case I2O_SNFORMAT_ASCII: /* ASCII */
seq_printf(seq, "%s", &serialno[2]);
} else {
/* print chars for specified length */
- for (i = 0; i < serialno[1]; i++) {
+ for (i = 0; i < serialno[1]; i++)
seq_printf(seq, "%c", serialno[2 + i]);
- }
}
break;
{
switch (block_status) {
case -ETIMEDOUT:
- return seq_printf(seq, "Timeout reading group %s.\n", group);
+ seq_printf(seq, "Timeout reading group %s.\n", group);
+ break;
case -ENOMEM:
- return seq_printf(seq, "No free memory to read the table.\n");
+ seq_puts(seq, "No free memory to read the table.\n");
+ break;
case -I2O_PARAMS_STATUS_INVALID_GROUP_ID:
- return seq_printf(seq, "Group %s not supported.\n", group);
+ seq_printf(seq, "Group %s not supported.\n", group);
+ break;
default:
- return seq_printf(seq,
- "Error reading group %s. BlockStatus 0x%02X\n",
- group, -block_status);
+ seq_printf(seq,
+ "Error reading group %s. BlockStatus 0x%02X\n",
+ group, -block_status);
+ break;
}
+
+ return 0;
}
static char *bus_strings[] = {
*/
struct i2o_controller *i2o_iop_alloc(void)
{
- static int unit = 0; /* 0 and 1 are NULL IOP and Local Host */
+ static int unit; /* 0 and 1 are NULL IOP and Local Host */
struct i2o_controller *c;
char poolname[32];
{
int rc;
- if ((rc = device_add(&c->device))) {
+ rc = device_add(&c->device);
+ if (rc) {
osm_err("%s: could not add controller\n", c->name);
goto iop_reset;
}
osm_info("%s: This may take a few minutes if there are many devices\n",
c->name);
- if ((rc = i2o_iop_activate(c))) {
+ rc = i2o_iop_activate(c);
+ if (rc) {
osm_err("%s: could not activate controller\n", c->name);
goto device_del;
}
osm_debug("%s: building sys table...\n", c->name);
- if ((rc = i2o_systab_build()))
+ rc = i2o_systab_build();
+ if (rc)
goto device_del;
osm_debug("%s: online controller...\n", c->name);
- if ((rc = i2o_iop_online(c)))
+ rc = i2o_iop_online(c);
+ if (rc)
goto device_del;
osm_debug("%s: getting LCT...\n", c->name);
- if ((rc = i2o_exec_lct_get(c)))
+ rc = i2o_exec_lct_get(c);
+ if (rc)
goto device_del;
list_add(&c->list, &i2o_controllers);
printk(KERN_INFO OSM_DESCRIPTION " v" OSM_VERSION "\n");
- if ((rc = i2o_driver_init()))
+ rc = i2o_driver_init();
+ if (rc)
goto exit;
- if ((rc = i2o_exec_init()))
+ rc = i2o_exec_init();
+ if (rc)
goto driver_exit;
- if ((rc = i2o_pci_init()))
+ rc = i2o_pci_init();
+ if (rc)
goto exec_exit;
return 0;
int i2o_pool_alloc(struct i2o_pool *pool, const char *name,
size_t size, int min_nr)
{
- pool->name = kmalloc(strlen(name) + 1, GFP_KERNEL);
+ pool->name = kstrdup(name, GFP_KERNEL);
if (!pool->name)
goto exit;
- strcpy(pool->name, name);
pool->slab =
kmem_cache_create(pool->name, size, 0, SLAB_HWCACHE_ALIGN, NULL);
return -ENODEV;
}
- if ((rc = pci_enable_device(pdev))) {
+ rc = pci_enable_device(pdev);
+ if (rc) {
printk(KERN_WARNING "i2o: couldn't enable device %s\n",
pci_name(pdev));
return rc;
#endif
}
- if ((rc = i2o_pci_alloc(c))) {
+ rc = i2o_pci_alloc(c);
+ if (rc) {
printk(KERN_ERR "%s: DMA / IO allocation for I2O controller "
"failed\n", c->name);
goto free_controller;
goto free_pci;
}
- if ((rc = i2o_iop_add(c)))
+ rc = i2o_iop_add(c);
+ if (rc)
goto uninstall;
if (i960)
+++ /dev/null
-/* Industrialio buffer test code.
- *
- * Copyright (c) 2008 Jonathan Cameron
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- *
- * This program is primarily intended as an example application.
- * Reads the current buffer setup from sysfs and starts a short capture
- * from the specified device, pretty printing the result after appropriate
- * conversion.
- *
- * Command line parameters
- * generic_buffer -n <device_name> -t <trigger_name>
- * If trigger name is not specified the program assumes you want a dataready
- * trigger associated with the device and goes looking for it.
- *
- */
-
-#define _GNU_SOURCE
-
-#include <unistd.h>
-#include <dirent.h>
-#include <fcntl.h>
-#include <stdio.h>
-#include <errno.h>
-#include <sys/stat.h>
-#include <sys/dir.h>
-#include <linux/types.h>
-#include <string.h>
-#include <poll.h>
-#include <endian.h>
-#include <getopt.h>
-#include <inttypes.h>
-#include "iio_utils.h"
-
-/**
- * size_from_channelarray() - calculate the storage size of a scan
- * @channels: the channel info array
- * @num_channels: number of channels
- *
- * Has the side effect of filling the channels[i].location values used
- * in processing the buffer output.
- **/
-int size_from_channelarray(struct iio_channel_info *channels, int num_channels)
-{
- int bytes = 0;
- int i = 0;
-
- while (i < num_channels) {
- if (bytes % channels[i].bytes == 0)
- channels[i].location = bytes;
- else
- channels[i].location = bytes - bytes%channels[i].bytes
- + channels[i].bytes;
- bytes = channels[i].location + channels[i].bytes;
- i++;
- }
- return bytes;
-}
-
-void print2byte(int input, struct iio_channel_info *info)
-{
- /* First swap if incorrect endian */
- if (info->be)
- input = be16toh((uint16_t)input);
- else
- input = le16toh((uint16_t)input);
-
- /*
- * Shift before conversion to avoid sign extension
- * of left aligned data
- */
- input = input >> info->shift;
- if (info->is_signed) {
- int16_t val = input;
-
- val &= (1 << info->bits_used) - 1;
- val = (int16_t)(val << (16 - info->bits_used)) >>
- (16 - info->bits_used);
- printf("%05f ", ((float)val + info->offset)*info->scale);
- } else {
- uint16_t val = input;
-
- val &= (1 << info->bits_used) - 1;
- printf("%05f ", ((float)val + info->offset)*info->scale);
- }
-}
-/**
- * process_scan() - print out the values in SI units
- * @data: pointer to the start of the scan
- * @channels: information about the channels. Note
- * size_from_channelarray must have been called first to fill the
- * location offsets.
- * @num_channels: number of channels
- **/
-void process_scan(char *data,
- struct iio_channel_info *channels,
- int num_channels)
-{
- int k;
-
- for (k = 0; k < num_channels; k++)
- switch (channels[k].bytes) {
- /* only a few cases implemented so far */
- case 2:
- print2byte(*(uint16_t *)(data + channels[k].location),
- &channels[k]);
- break;
- case 4:
- if (!channels[k].is_signed) {
- uint32_t val = *(uint32_t *)
- (data + channels[k].location);
- printf("%05f ", ((float)val +
- channels[k].offset)*
- channels[k].scale);
-
- }
- break;
- case 8:
- if (channels[k].is_signed) {
- int64_t val = *(int64_t *)
- (data +
- channels[k].location);
- if ((val >> channels[k].bits_used) & 1)
- val = (val & channels[k].mask) |
- ~channels[k].mask;
- /* special case for timestamp */
- if (channels[k].scale == 1.0f &&
- channels[k].offset == 0.0f)
- printf("%" PRId64 " ", val);
- else
- printf("%05f ", ((float)val +
- channels[k].offset)*
- channels[k].scale);
- }
- break;
- default:
- break;
- }
- printf("\n");
-}
-
-int main(int argc, char **argv)
-{
- unsigned long num_loops = 2;
- unsigned long timedelay = 1000000;
- unsigned long buf_len = 128;
-
- int ret, c, i, j, toread;
- int fp;
-
- int num_channels;
- char *trigger_name = NULL, *device_name = NULL;
- char *dev_dir_name, *buf_dir_name;
-
- int datardytrigger = 1;
- char *data;
- ssize_t read_size;
- int dev_num, trig_num;
- char *buffer_access;
- int scan_size;
- int noevents = 0;
- int notrigger = 0;
- char *dummy;
-
- struct iio_channel_info *channels;
-
- while ((c = getopt(argc, argv, "l:w:c:et:n:g")) != -1) {
- switch (c) {
- case 'n':
- device_name = optarg;
- break;
- case 't':
- trigger_name = optarg;
- datardytrigger = 0;
- break;
- case 'e':
- noevents = 1;
- break;
- case 'c':
- num_loops = strtoul(optarg, &dummy, 10);
- break;
- case 'w':
- timedelay = strtoul(optarg, &dummy, 10);
- break;
- case 'l':
- buf_len = strtoul(optarg, &dummy, 10);
- break;
- case 'g':
- notrigger = 1;
- break;
- case '?':
- return -1;
- }
- }
-
- if (device_name == NULL)
- return -1;
-
- /* Find the device requested */
- dev_num = find_type_by_name(device_name, "iio:device");
- if (dev_num < 0) {
- printf("Failed to find the %s\n", device_name);
- ret = -ENODEV;
- goto error_ret;
- }
- printf("iio device number being used is %d\n", dev_num);
-
- asprintf(&dev_dir_name, "%siio:device%d", iio_dir, dev_num);
-
- if (!notrigger) {
- if (trigger_name == NULL) {
- /*
- * Build the trigger name. If it is device associated
- * its name is <device_name>_dev[n] where n matches
- * the device number found above.
- */
- ret = asprintf(&trigger_name,
- "%s-dev%d", device_name, dev_num);
- if (ret < 0) {
- ret = -ENOMEM;
- goto error_ret;
- }
- }
-
- /* Verify the trigger exists */
- trig_num = find_type_by_name(trigger_name, "trigger");
- if (trig_num < 0) {
- printf("Failed to find the trigger %s\n", trigger_name);
- ret = -ENODEV;
- goto error_free_triggername;
- }
- printf("iio trigger number being used is %d\n", trig_num);
- } else
- printf("trigger-less mode selected\n");
-
- /*
- * Parse the files in scan_elements to identify what channels are
- * present
- */
- ret = build_channel_array(dev_dir_name, &channels, &num_channels);
- if (ret) {
- printf("Problem reading scan element information\n");
- printf("diag %s\n", dev_dir_name);
- goto error_free_triggername;
- }
-
- /*
- * Construct the directory name for the associated buffer.
- * As we know that the lis3l02dq has only one buffer this may
- * be built rather than found.
- */
- ret = asprintf(&buf_dir_name,
- "%siio:device%d/buffer", iio_dir, dev_num);
- if (ret < 0) {
- ret = -ENOMEM;
- goto error_free_triggername;
- }
-
- if (!notrigger) {
- printf("%s %s\n", dev_dir_name, trigger_name);
- /* Set the device trigger to be the data ready trigger found
- * above */
- ret = write_sysfs_string_and_verify("trigger/current_trigger",
- dev_dir_name,
- trigger_name);
- if (ret < 0) {
- printf("Failed to write current_trigger file\n");
- goto error_free_buf_dir_name;
- }
- }
-
- /* Setup ring buffer parameters */
- ret = write_sysfs_int("length", buf_dir_name, buf_len);
- if (ret < 0)
- goto error_free_buf_dir_name;
-
- /* Enable the buffer */
- ret = write_sysfs_int("enable", buf_dir_name, 1);
- if (ret < 0)
- goto error_free_buf_dir_name;
- scan_size = size_from_channelarray(channels, num_channels);
- data = malloc(scan_size*buf_len);
- if (!data) {
- ret = -ENOMEM;
- goto error_free_buf_dir_name;
- }
-
- ret = asprintf(&buffer_access, "/dev/iio:device%d", dev_num);
- if (ret < 0) {
- ret = -ENOMEM;
- goto error_free_data;
- }
-
- /* Attempt to open non blocking the access dev */
- fp = open(buffer_access, O_RDONLY | O_NONBLOCK);
- if (fp == -1) { /* If it isn't there make the node */
- printf("Failed to open %s\n", buffer_access);
- ret = -errno;
- goto error_free_buffer_access;
- }
-
- /* Wait for events 10 times */
- for (j = 0; j < num_loops; j++) {
- if (!noevents) {
- struct pollfd pfd = {
- .fd = fp,
- .events = POLLIN,
- };
-
- poll(&pfd, 1, -1);
- toread = buf_len;
-
- } else {
- usleep(timedelay);
- toread = 64;
- }
-
- read_size = read(fp,
- data,
- toread*scan_size);
- if (read_size < 0) {
- if (errno == -EAGAIN) {
- printf("nothing available\n");
- continue;
- } else
- break;
- }
- for (i = 0; i < read_size/scan_size; i++)
- process_scan(data + scan_size*i,
- channels,
- num_channels);
- }
-
- /* Stop the buffer */
- ret = write_sysfs_int("enable", buf_dir_name, 0);
- if (ret < 0)
- goto error_close_buffer_access;
-
- if (!notrigger)
- /* Disconnect the trigger - just write a dummy name. */
- write_sysfs_string("trigger/current_trigger",
- dev_dir_name, "NULL");
-
-error_close_buffer_access:
- close(fp);
-error_free_data:
- free(data);
-error_free_buffer_access:
- free(buffer_access);
-error_free_buf_dir_name:
- free(buf_dir_name);
-error_free_triggername:
- if (datardytrigger)
- free(trigger_name);
-error_ret:
- return ret;
-}
+++ /dev/null
-/* Industrialio event test code.
- *
- * Copyright (c) 2011-2012 Lars-Peter Clausen <lars@metafoo.de>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- *
- * This program is primarily intended as an example application.
- * Reads the current buffer setup from sysfs and starts a short capture
- * from the specified device, pretty printing the result after appropriate
- * conversion.
- *
- * Usage:
- * iio_event_monitor <device_name>
- *
- */
-
-#define _GNU_SOURCE
-
-#include <unistd.h>
-#include <stdbool.h>
-#include <stdio.h>
-#include <errno.h>
-#include <string.h>
-#include <poll.h>
-#include <fcntl.h>
-#include <sys/ioctl.h>
-#include "iio_utils.h"
-#include <linux/iio/events.h>
-
-static const char * const iio_chan_type_name_spec[] = {
- [IIO_VOLTAGE] = "voltage",
- [IIO_CURRENT] = "current",
- [IIO_POWER] = "power",
- [IIO_ACCEL] = "accel",
- [IIO_ANGL_VEL] = "anglvel",
- [IIO_MAGN] = "magn",
- [IIO_LIGHT] = "illuminance",
- [IIO_INTENSITY] = "intensity",
- [IIO_PROXIMITY] = "proximity",
- [IIO_TEMP] = "temp",
- [IIO_INCLI] = "incli",
- [IIO_ROT] = "rot",
- [IIO_ANGL] = "angl",
- [IIO_TIMESTAMP] = "timestamp",
- [IIO_CAPACITANCE] = "capacitance",
- [IIO_ALTVOLTAGE] = "altvoltage",
- [IIO_CCT] = "cct",
- [IIO_PRESSURE] = "pressure",
- [IIO_HUMIDITYRELATIVE] = "humidityrelative",
- [IIO_ACTIVITY] = "activity",
- [IIO_STEPS] = "steps",
-};
-
-static const char * const iio_ev_type_text[] = {
- [IIO_EV_TYPE_THRESH] = "thresh",
- [IIO_EV_TYPE_MAG] = "mag",
- [IIO_EV_TYPE_ROC] = "roc",
- [IIO_EV_TYPE_THRESH_ADAPTIVE] = "thresh_adaptive",
- [IIO_EV_TYPE_MAG_ADAPTIVE] = "mag_adaptive",
- [IIO_EV_TYPE_CHANGE] = "change",
-};
-
-static const char * const iio_ev_dir_text[] = {
- [IIO_EV_DIR_EITHER] = "either",
- [IIO_EV_DIR_RISING] = "rising",
- [IIO_EV_DIR_FALLING] = "falling"
-};
-
-static const char * const iio_modifier_names[] = {
- [IIO_MOD_X] = "x",
- [IIO_MOD_Y] = "y",
- [IIO_MOD_Z] = "z",
- [IIO_MOD_X_AND_Y] = "x&y",
- [IIO_MOD_X_AND_Z] = "x&z",
- [IIO_MOD_Y_AND_Z] = "y&z",
- [IIO_MOD_X_AND_Y_AND_Z] = "x&y&z",
- [IIO_MOD_X_OR_Y] = "x|y",
- [IIO_MOD_X_OR_Z] = "x|z",
- [IIO_MOD_Y_OR_Z] = "y|z",
- [IIO_MOD_X_OR_Y_OR_Z] = "x|y|z",
- [IIO_MOD_LIGHT_BOTH] = "both",
- [IIO_MOD_LIGHT_IR] = "ir",
- [IIO_MOD_ROOT_SUM_SQUARED_X_Y] = "sqrt(x^2+y^2)",
- [IIO_MOD_SUM_SQUARED_X_Y_Z] = "x^2+y^2+z^2",
- [IIO_MOD_LIGHT_CLEAR] = "clear",
- [IIO_MOD_LIGHT_RED] = "red",
- [IIO_MOD_LIGHT_GREEN] = "green",
- [IIO_MOD_LIGHT_BLUE] = "blue",
- [IIO_MOD_QUATERNION] = "quaternion",
- [IIO_MOD_TEMP_AMBIENT] = "ambient",
- [IIO_MOD_TEMP_OBJECT] = "object",
- [IIO_MOD_NORTH_MAGN] = "from_north_magnetic",
- [IIO_MOD_NORTH_TRUE] = "from_north_true",
- [IIO_MOD_NORTH_MAGN_TILT_COMP] = "from_north_magnetic_tilt_comp",
- [IIO_MOD_NORTH_TRUE_TILT_COMP] = "from_north_true_tilt_comp",
- [IIO_MOD_RUNNING] = "running",
- [IIO_MOD_JOGGING] = "jogging",
- [IIO_MOD_WALKING] = "walking",
- [IIO_MOD_STILL] = "still",
-};
-
-static bool event_is_known(struct iio_event_data *event)
-{
- enum iio_chan_type type = IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event->id);
- enum iio_modifier mod = IIO_EVENT_CODE_EXTRACT_MODIFIER(event->id);
- enum iio_event_type ev_type = IIO_EVENT_CODE_EXTRACT_TYPE(event->id);
- enum iio_event_direction dir = IIO_EVENT_CODE_EXTRACT_DIR(event->id);
-
- switch (type) {
- case IIO_VOLTAGE:
- case IIO_CURRENT:
- case IIO_POWER:
- case IIO_ACCEL:
- case IIO_ANGL_VEL:
- case IIO_MAGN:
- case IIO_LIGHT:
- case IIO_INTENSITY:
- case IIO_PROXIMITY:
- case IIO_TEMP:
- case IIO_INCLI:
- case IIO_ROT:
- case IIO_ANGL:
- case IIO_TIMESTAMP:
- case IIO_CAPACITANCE:
- case IIO_ALTVOLTAGE:
- case IIO_CCT:
- case IIO_PRESSURE:
- case IIO_HUMIDITYRELATIVE:
- case IIO_ACTIVITY:
- case IIO_STEPS:
- break;
- default:
- return false;
- }
-
- switch (mod) {
- case IIO_NO_MOD:
- case IIO_MOD_X:
- case IIO_MOD_Y:
- case IIO_MOD_Z:
- case IIO_MOD_X_AND_Y:
- case IIO_MOD_X_AND_Z:
- case IIO_MOD_Y_AND_Z:
- case IIO_MOD_X_AND_Y_AND_Z:
- case IIO_MOD_X_OR_Y:
- case IIO_MOD_X_OR_Z:
- case IIO_MOD_Y_OR_Z:
- case IIO_MOD_X_OR_Y_OR_Z:
- case IIO_MOD_LIGHT_BOTH:
- case IIO_MOD_LIGHT_IR:
- case IIO_MOD_ROOT_SUM_SQUARED_X_Y:
- case IIO_MOD_SUM_SQUARED_X_Y_Z:
- case IIO_MOD_LIGHT_CLEAR:
- case IIO_MOD_LIGHT_RED:
- case IIO_MOD_LIGHT_GREEN:
- case IIO_MOD_LIGHT_BLUE:
- case IIO_MOD_QUATERNION:
- case IIO_MOD_TEMP_AMBIENT:
- case IIO_MOD_TEMP_OBJECT:
- case IIO_MOD_NORTH_MAGN:
- case IIO_MOD_NORTH_TRUE:
- case IIO_MOD_NORTH_MAGN_TILT_COMP:
- case IIO_MOD_NORTH_TRUE_TILT_COMP:
- case IIO_MOD_RUNNING:
- case IIO_MOD_JOGGING:
- case IIO_MOD_WALKING:
- case IIO_MOD_STILL:
- break;
- default:
- return false;
- }
-
- switch (ev_type) {
- case IIO_EV_TYPE_THRESH:
- case IIO_EV_TYPE_MAG:
- case IIO_EV_TYPE_ROC:
- case IIO_EV_TYPE_THRESH_ADAPTIVE:
- case IIO_EV_TYPE_MAG_ADAPTIVE:
- case IIO_EV_TYPE_CHANGE:
- break;
- default:
- return false;
- }
-
- switch (dir) {
- case IIO_EV_DIR_EITHER:
- case IIO_EV_DIR_RISING:
- case IIO_EV_DIR_FALLING:
- case IIO_EV_DIR_NONE:
- break;
- default:
- return false;
- }
-
- return true;
-}
-
-static void print_event(struct iio_event_data *event)
-{
- enum iio_chan_type type = IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event->id);
- enum iio_modifier mod = IIO_EVENT_CODE_EXTRACT_MODIFIER(event->id);
- enum iio_event_type ev_type = IIO_EVENT_CODE_EXTRACT_TYPE(event->id);
- enum iio_event_direction dir = IIO_EVENT_CODE_EXTRACT_DIR(event->id);
- int chan = IIO_EVENT_CODE_EXTRACT_CHAN(event->id);
- int chan2 = IIO_EVENT_CODE_EXTRACT_CHAN2(event->id);
- bool diff = IIO_EVENT_CODE_EXTRACT_DIFF(event->id);
-
- if (!event_is_known(event)) {
- printf("Unknown event: time: %lld, id: %llx\n",
- event->timestamp, event->id);
- return;
- }
-
- printf("Event: time: %lld, ", event->timestamp);
-
- if (mod != IIO_NO_MOD) {
- printf("type: %s(%s), ",
- iio_chan_type_name_spec[type],
- iio_modifier_names[mod]);
- } else {
- printf("type: %s, ",
- iio_chan_type_name_spec[type]);
- }
-
- if (diff && chan >= 0 && chan2 >= 0)
- printf("channel: %d-%d, ", chan, chan2);
- else if (chan >= 0)
- printf("channel: %d, ", chan);
-
- printf("evtype: %s", iio_ev_type_text[ev_type]);
-
- if (dir != IIO_EV_DIR_NONE)
- printf(", direction: %s", iio_ev_dir_text[dir]);
- printf("\n");
-}
-
-int main(int argc, char **argv)
-{
- struct iio_event_data event;
- const char *device_name;
- char *chrdev_name;
- int ret;
- int dev_num;
- int fd, event_fd;
-
- if (argc <= 1) {
- printf("Usage: %s <device_name>\n", argv[0]);
- return -1;
- }
-
- device_name = argv[1];
-
- dev_num = find_type_by_name(device_name, "iio:device");
- if (dev_num >= 0) {
- printf("Found IIO device with name %s with device number %d\n",
- device_name, dev_num);
- ret = asprintf(&chrdev_name, "/dev/iio:device%d", dev_num);
- if (ret < 0) {
- ret = -ENOMEM;
- goto error_ret;
- }
- } else {
- /* If we can't find a IIO device by name assume device_name is a
- IIO chrdev */
- chrdev_name = strdup(device_name);
- }
-
- fd = open(chrdev_name, 0);
- if (fd == -1) {
- fprintf(stdout, "Failed to open %s\n", chrdev_name);
- ret = -errno;
- goto error_free_chrdev_name;
- }
-
- ret = ioctl(fd, IIO_GET_EVENT_FD_IOCTL, &event_fd);
-
- close(fd);
-
- if (ret == -1 || event_fd == -1) {
- fprintf(stdout, "Failed to retrieve event fd\n");
- ret = -errno;
- goto error_free_chrdev_name;
- }
-
- while (true) {
- ret = read(event_fd, &event, sizeof(event));
- if (ret == -1) {
- if (errno == EAGAIN) {
- printf("nothing available\n");
- continue;
- } else {
- perror("Failed to read event from device");
- ret = -errno;
- break;
- }
- }
-
- print_event(&event);
- }
-
- close(event_fd);
-error_free_chrdev_name:
- free(chrdev_name);
-error_ret:
- return ret;
-}
+++ /dev/null
-/* IIO - useful set of util functionality
- *
- * Copyright (c) 2008 Jonathan Cameron
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-
-#include <string.h>
-#include <stdlib.h>
-#include <ctype.h>
-#include <stdio.h>
-#include <stdint.h>
-#include <dirent.h>
-#include <errno.h>
-
-/* Made up value to limit allocation sizes */
-#define IIO_MAX_NAME_LENGTH 30
-
-#define FORMAT_SCAN_ELEMENTS_DIR "%s/scan_elements"
-#define FORMAT_TYPE_FILE "%s_type"
-
-const char *iio_dir = "/sys/bus/iio/devices/";
-
-/**
- * iioutils_break_up_name() - extract generic name from full channel name
- * @full_name: the full channel name
- * @generic_name: the output generic channel name
- **/
-inline int iioutils_break_up_name(const char *full_name,
- char **generic_name)
-{
- char *current;
- char *w, *r;
- char *working;
-
- current = strdup(full_name);
- working = strtok(current, "_\0");
- w = working;
- r = working;
-
- while (*r != '\0') {
- if (!isdigit(*r)) {
- *w = *r;
- w++;
- }
- r++;
- }
- *w = '\0';
- *generic_name = strdup(working);
- free(current);
-
- return 0;
-}
-
-/**
- * struct iio_channel_info - information about a given channel
- * @name: channel name
- * @generic_name: general name for channel type
- * @scale: scale factor to be applied for conversion to si units
- * @offset: offset to be applied for conversion to si units
- * @index: the channel index in the buffer output
- * @bytes: number of bytes occupied in buffer output
- * @mask: a bit mask for the raw output
- * @is_signed: is the raw value stored signed
- * @enabled: is this channel enabled
- **/
-struct iio_channel_info {
- char *name;
- char *generic_name;
- float scale;
- float offset;
- unsigned index;
- unsigned bytes;
- unsigned bits_used;
- unsigned shift;
- uint64_t mask;
- unsigned be;
- unsigned is_signed;
- unsigned location;
-};
-
-/**
- * iioutils_get_type() - find and process _type attribute data
- * @is_signed: output whether channel is signed
- * @bytes: output how many bytes the channel storage occupies
- * @mask: output a bit mask for the raw data
- * @be: big endian
- * @device_dir: the iio device directory
- * @name: the channel name
- * @generic_name: the channel type name
- **/
-inline int iioutils_get_type(unsigned *is_signed,
- unsigned *bytes,
- unsigned *bits_used,
- unsigned *shift,
- uint64_t *mask,
- unsigned *be,
- const char *device_dir,
- const char *name,
- const char *generic_name)
-{
- FILE *sysfsfp;
- int ret;
- DIR *dp;
- char *scan_el_dir, *builtname, *builtname_generic, *filename = 0;
- char signchar, endianchar;
- unsigned padint;
- const struct dirent *ent;
-
- ret = asprintf(&scan_el_dir, FORMAT_SCAN_ELEMENTS_DIR, device_dir);
- if (ret < 0) {
- ret = -ENOMEM;
- goto error_ret;
- }
- ret = asprintf(&builtname, FORMAT_TYPE_FILE, name);
- if (ret < 0) {
- ret = -ENOMEM;
- goto error_free_scan_el_dir;
- }
- ret = asprintf(&builtname_generic, FORMAT_TYPE_FILE, generic_name);
- if (ret < 0) {
- ret = -ENOMEM;
- goto error_free_builtname;
- }
-
- dp = opendir(scan_el_dir);
- if (dp == NULL) {
- ret = -errno;
- goto error_free_builtname_generic;
- }
- while (ent = readdir(dp), ent != NULL)
- /*
- * Do we allow devices to override a generic name with
- * a specific one?
- */
- if ((strcmp(builtname, ent->d_name) == 0) ||
- (strcmp(builtname_generic, ent->d_name) == 0)) {
- ret = asprintf(&filename,
- "%s/%s", scan_el_dir, ent->d_name);
- if (ret < 0) {
- ret = -ENOMEM;
- goto error_closedir;
- }
- sysfsfp = fopen(filename, "r");
- if (sysfsfp == NULL) {
- printf("failed to open %s\n", filename);
- ret = -errno;
- goto error_free_filename;
- }
-
- ret = fscanf(sysfsfp,
- "%ce:%c%u/%u>>%u",
- &endianchar,
- &signchar,
- bits_used,
- &padint, shift);
- if (ret < 0) {
- printf("failed to pass scan type description\n");
- ret = -errno;
- goto error_close_sysfsfp;
- }
- *be = (endianchar == 'b');
- *bytes = padint / 8;
- if (*bits_used == 64)
- *mask = ~0;
- else
- *mask = (1 << *bits_used) - 1;
- if (signchar == 's')
- *is_signed = 1;
- else
- *is_signed = 0;
- fclose(sysfsfp);
- free(filename);
-
- filename = 0;
- sysfsfp = 0;
- }
-error_close_sysfsfp:
- if (sysfsfp)
- fclose(sysfsfp);
-error_free_filename:
- if (filename)
- free(filename);
-error_closedir:
- closedir(dp);
-error_free_builtname_generic:
- free(builtname_generic);
-error_free_builtname:
- free(builtname);
-error_free_scan_el_dir:
- free(scan_el_dir);
-error_ret:
- return ret;
-}
-
-inline int iioutils_get_param_float(float *output,
- const char *param_name,
- const char *device_dir,
- const char *name,
- const char *generic_name)
-{
- FILE *sysfsfp;
- int ret;
- DIR *dp;
- char *builtname, *builtname_generic;
- char *filename = NULL;
- const struct dirent *ent;
-
- ret = asprintf(&builtname, "%s_%s", name, param_name);
- if (ret < 0) {
- ret = -ENOMEM;
- goto error_ret;
- }
- ret = asprintf(&builtname_generic,
- "%s_%s", generic_name, param_name);
- if (ret < 0) {
- ret = -ENOMEM;
- goto error_free_builtname;
- }
- dp = opendir(device_dir);
- if (dp == NULL) {
- ret = -errno;
- goto error_free_builtname_generic;
- }
- while (ent = readdir(dp), ent != NULL)
- if ((strcmp(builtname, ent->d_name) == 0) ||
- (strcmp(builtname_generic, ent->d_name) == 0)) {
- ret = asprintf(&filename,
- "%s/%s", device_dir, ent->d_name);
- if (ret < 0) {
- ret = -ENOMEM;
- goto error_closedir;
- }
- sysfsfp = fopen(filename, "r");
- if (!sysfsfp) {
- ret = -errno;
- goto error_free_filename;
- }
- fscanf(sysfsfp, "%f", output);
- break;
- }
-error_free_filename:
- if (filename)
- free(filename);
-error_closedir:
- closedir(dp);
-error_free_builtname_generic:
- free(builtname_generic);
-error_free_builtname:
- free(builtname);
-error_ret:
- return ret;
-}
-
-/**
- * bsort_channel_array_by_index() - reorder so that the array is in index order
- *
- **/
-
-inline void bsort_channel_array_by_index(struct iio_channel_info **ci_array,
- int cnt)
-{
-
- struct iio_channel_info temp;
- int x, y;
-
- for (x = 0; x < cnt; x++)
- for (y = 0; y < (cnt - 1); y++)
- if ((*ci_array)[y].index > (*ci_array)[y+1].index) {
- temp = (*ci_array)[y + 1];
- (*ci_array)[y + 1] = (*ci_array)[y];
- (*ci_array)[y] = temp;
- }
-}
-
-/**
- * build_channel_array() - function to figure out what channels are present
- * @device_dir: the IIO device directory in sysfs
- * @
- **/
-inline int build_channel_array(const char *device_dir,
- struct iio_channel_info **ci_array,
- int *counter)
-{
- DIR *dp;
- FILE *sysfsfp;
- int count, i;
- struct iio_channel_info *current;
- int ret;
- const struct dirent *ent;
- char *scan_el_dir;
- char *filename;
-
- *counter = 0;
- ret = asprintf(&scan_el_dir, FORMAT_SCAN_ELEMENTS_DIR, device_dir);
- if (ret < 0) {
- ret = -ENOMEM;
- goto error_ret;
- }
- dp = opendir(scan_el_dir);
- if (dp == NULL) {
- ret = -errno;
- goto error_free_name;
- }
- while (ent = readdir(dp), ent != NULL)
- if (strcmp(ent->d_name + strlen(ent->d_name) - strlen("_en"),
- "_en") == 0) {
- ret = asprintf(&filename,
- "%s/%s", scan_el_dir, ent->d_name);
- if (ret < 0) {
- ret = -ENOMEM;
- goto error_close_dir;
- }
- sysfsfp = fopen(filename, "r");
- if (sysfsfp == NULL) {
- ret = -errno;
- free(filename);
- goto error_close_dir;
- }
- fscanf(sysfsfp, "%i", &ret);
- if (ret == 1)
- (*counter)++;
- fclose(sysfsfp);
- free(filename);
- }
- *ci_array = malloc(sizeof(**ci_array) * (*counter));
- if (*ci_array == NULL) {
- ret = -ENOMEM;
- goto error_close_dir;
- }
- seekdir(dp, 0);
- count = 0;
- while (ent = readdir(dp), ent != NULL) {
- if (strcmp(ent->d_name + strlen(ent->d_name) - strlen("_en"),
- "_en") == 0) {
- int current_enabled = 0;
-
- current = &(*ci_array)[count++];
- ret = asprintf(&filename,
- "%s/%s", scan_el_dir, ent->d_name);
- if (ret < 0) {
- ret = -ENOMEM;
- /* decrement count to avoid freeing name */
- count--;
- goto error_cleanup_array;
- }
- sysfsfp = fopen(filename, "r");
- if (sysfsfp == NULL) {
- free(filename);
- ret = -errno;
- goto error_cleanup_array;
- }
- fscanf(sysfsfp, "%i", ¤t_enabled);
- fclose(sysfsfp);
-
- if (!current_enabled) {
- free(filename);
- count--;
- continue;
- }
-
- current->scale = 1.0;
- current->offset = 0;
- current->name = strndup(ent->d_name,
- strlen(ent->d_name) -
- strlen("_en"));
- if (current->name == NULL) {
- free(filename);
- ret = -ENOMEM;
- goto error_cleanup_array;
- }
- /* Get the generic and specific name elements */
- ret = iioutils_break_up_name(current->name,
- ¤t->generic_name);
- if (ret) {
- free(filename);
- goto error_cleanup_array;
- }
- ret = asprintf(&filename,
- "%s/%s_index",
- scan_el_dir,
- current->name);
- if (ret < 0) {
- free(filename);
- ret = -ENOMEM;
- goto error_cleanup_array;
- }
- sysfsfp = fopen(filename, "r");
- fscanf(sysfsfp, "%u", ¤t->index);
- fclose(sysfsfp);
- free(filename);
- /* Find the scale */
- ret = iioutils_get_param_float(¤t->scale,
- "scale",
- device_dir,
- current->name,
- current->generic_name);
- if (ret < 0)
- goto error_cleanup_array;
- ret = iioutils_get_param_float(¤t->offset,
- "offset",
- device_dir,
- current->name,
- current->generic_name);
- if (ret < 0)
- goto error_cleanup_array;
- ret = iioutils_get_type(¤t->is_signed,
- ¤t->bytes,
- ¤t->bits_used,
- ¤t->shift,
- ¤t->mask,
- ¤t->be,
- device_dir,
- current->name,
- current->generic_name);
- }
- }
-
- closedir(dp);
- /* reorder so that the array is in index order */
- bsort_channel_array_by_index(ci_array, *counter);
-
- return 0;
-
-error_cleanup_array:
- for (i = count - 1; i >= 0; i--)
- free((*ci_array)[i].name);
- free(*ci_array);
-error_close_dir:
- closedir(dp);
-error_free_name:
- free(scan_el_dir);
-error_ret:
- return ret;
-}
-
-/**
- * find_type_by_name() - function to match top level types by name
- * @name: top level type instance name
- * @type: the type of top level instance being sort
- *
- * Typical types this is used for are device and trigger.
- **/
-inline int find_type_by_name(const char *name, const char *type)
-{
- const struct dirent *ent;
- int number, numstrlen;
-
- FILE *nameFile;
- DIR *dp;
- char thisname[IIO_MAX_NAME_LENGTH];
- char *filename;
-
- dp = opendir(iio_dir);
- if (dp == NULL) {
- printf("No industrialio devices available\n");
- return -ENODEV;
- }
-
- while (ent = readdir(dp), ent != NULL) {
- if (strcmp(ent->d_name, ".") != 0 &&
- strcmp(ent->d_name, "..") != 0 &&
- strlen(ent->d_name) > strlen(type) &&
- strncmp(ent->d_name, type, strlen(type)) == 0) {
- numstrlen = sscanf(ent->d_name + strlen(type),
- "%d",
- &number);
- /* verify the next character is not a colon */
- if (strncmp(ent->d_name + strlen(type) + numstrlen,
- ":",
- 1) != 0) {
- filename = malloc(strlen(iio_dir)
- + strlen(type)
- + numstrlen
- + 6);
- if (filename == NULL) {
- closedir(dp);
- return -ENOMEM;
- }
- sprintf(filename, "%s%s%d/name",
- iio_dir,
- type,
- number);
- nameFile = fopen(filename, "r");
- if (!nameFile) {
- free(filename);
- continue;
- }
- free(filename);
- fscanf(nameFile, "%s", thisname);
- fclose(nameFile);
- if (strcmp(name, thisname) == 0) {
- closedir(dp);
- return number;
- }
- }
- }
- }
- closedir(dp);
- return -ENODEV;
-}
-
-inline int _write_sysfs_int(char *filename, char *basedir, int val, int verify)
-{
- int ret = 0;
- FILE *sysfsfp;
- int test;
- char *temp = malloc(strlen(basedir) + strlen(filename) + 2);
-
- if (temp == NULL)
- return -ENOMEM;
- sprintf(temp, "%s/%s", basedir, filename);
- sysfsfp = fopen(temp, "w");
- if (sysfsfp == NULL) {
- printf("failed to open %s\n", temp);
- ret = -errno;
- goto error_free;
- }
- fprintf(sysfsfp, "%d", val);
- fclose(sysfsfp);
- if (verify) {
- sysfsfp = fopen(temp, "r");
- if (sysfsfp == NULL) {
- printf("failed to open %s\n", temp);
- ret = -errno;
- goto error_free;
- }
- fscanf(sysfsfp, "%d", &test);
- fclose(sysfsfp);
- if (test != val) {
- printf("Possible failure in int write %d to %s%s\n",
- val,
- basedir,
- filename);
- ret = -1;
- }
- }
-error_free:
- free(temp);
- return ret;
-}
-
-int write_sysfs_int(char *filename, char *basedir, int val)
-{
- return _write_sysfs_int(filename, basedir, val, 0);
-}
-
-int write_sysfs_int_and_verify(char *filename, char *basedir, int val)
-{
- return _write_sysfs_int(filename, basedir, val, 1);
-}
-
-int _write_sysfs_string(char *filename, char *basedir, char *val, int verify)
-{
- int ret = 0;
- FILE *sysfsfp;
- char *temp = malloc(strlen(basedir) + strlen(filename) + 2);
-
- if (temp == NULL) {
- printf("Memory allocation failed\n");
- return -ENOMEM;
- }
- sprintf(temp, "%s/%s", basedir, filename);
- sysfsfp = fopen(temp, "w");
- if (sysfsfp == NULL) {
- printf("Could not open %s\n", temp);
- ret = -errno;
- goto error_free;
- }
- fprintf(sysfsfp, "%s", val);
- fclose(sysfsfp);
- if (verify) {
- sysfsfp = fopen(temp, "r");
- if (sysfsfp == NULL) {
- printf("could not open file to verify\n");
- ret = -errno;
- goto error_free;
- }
- fscanf(sysfsfp, "%s", temp);
- fclose(sysfsfp);
- if (strcmp(temp, val) != 0) {
- printf("Possible failure in string write of %s "
- "Should be %s "
- "written to %s\%s\n",
- temp,
- val,
- basedir,
- filename);
- ret = -1;
- }
- }
-error_free:
- free(temp);
-
- return ret;
-}
-
-/**
- * write_sysfs_string_and_verify() - string write, readback and verify
- * @filename: name of file to write to
- * @basedir: the sysfs directory in which the file is to be found
- * @val: the string to write
- **/
-int write_sysfs_string_and_verify(char *filename, char *basedir, char *val)
-{
- return _write_sysfs_string(filename, basedir, val, 1);
-}
-
-int write_sysfs_string(char *filename, char *basedir, char *val)
-{
- return _write_sysfs_string(filename, basedir, val, 0);
-}
-
-int read_sysfs_posint(char *filename, char *basedir)
-{
- int ret;
- FILE *sysfsfp;
- char *temp = malloc(strlen(basedir) + strlen(filename) + 2);
-
- if (temp == NULL) {
- printf("Memory allocation failed");
- return -ENOMEM;
- }
- sprintf(temp, "%s/%s", basedir, filename);
- sysfsfp = fopen(temp, "r");
- if (sysfsfp == NULL) {
- ret = -errno;
- goto error_free;
- }
- fscanf(sysfsfp, "%d\n", &ret);
- fclose(sysfsfp);
-error_free:
- free(temp);
- return ret;
-}
-
-int read_sysfs_float(char *filename, char *basedir, float *val)
-{
- int ret = 0;
- FILE *sysfsfp;
- char *temp = malloc(strlen(basedir) + strlen(filename) + 2);
-
- if (temp == NULL) {
- printf("Memory allocation failed");
- return -ENOMEM;
- }
- sprintf(temp, "%s/%s", basedir, filename);
- sysfsfp = fopen(temp, "r");
- if (sysfsfp == NULL) {
- ret = -errno;
- goto error_free;
- }
- fscanf(sysfsfp, "%f\n", val);
- fclose(sysfsfp);
-error_free:
- free(temp);
- return ret;
-}
-
-int read_sysfs_string(const char *filename, const char *basedir, char *str)
-{
- int ret = 0;
- FILE *sysfsfp;
- char *temp = malloc(strlen(basedir) + strlen(filename) + 2);
-
- if (temp == NULL) {
- printf("Memory allocation failed");
- return -ENOMEM;
- }
- sprintf(temp, "%s/%s", basedir, filename);
- sysfsfp = fopen(temp, "r");
- if (sysfsfp == NULL) {
- ret = -errno;
- goto error_free;
- }
- fscanf(sysfsfp, "%s\n", str);
- fclose(sysfsfp);
-error_free:
- free(temp);
- return ret;
-}
+++ /dev/null
-/*
- * Industrial I/O utilities - lsiio.c
- *
- * Copyright (c) 2010 Manuel Stahl <manuel.stahl@iis.fraunhofer.de>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-
-#include <string.h>
-#include <dirent.h>
-#include <stdio.h>
-#include <errno.h>
-#include <stdint.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <sys/dir.h>
-#include "iio_utils.h"
-
-
-static enum verbosity {
- VERBLEVEL_DEFAULT, /* 0 gives lspci behaviour */
- VERBLEVEL_SENSORS, /* 1 lists sensors */
-} verblevel = VERBLEVEL_DEFAULT;
-
-const char *type_device = "iio:device";
-const char *type_trigger = "trigger";
-
-
-static inline int check_prefix(const char *str, const char *prefix)
-{
- return strlen(str) > strlen(prefix) &&
- strncmp(str, prefix, strlen(prefix)) == 0;
-}
-
-static inline int check_postfix(const char *str, const char *postfix)
-{
- return strlen(str) > strlen(postfix) &&
- strcmp(str + strlen(str) - strlen(postfix), postfix) == 0;
-}
-
-static int dump_channels(const char *dev_dir_name)
-{
- DIR *dp;
- const struct dirent *ent;
-
- dp = opendir(dev_dir_name);
- if (dp == NULL)
- return -errno;
- while (ent = readdir(dp), ent != NULL)
- if (check_prefix(ent->d_name, "in_") &&
- check_postfix(ent->d_name, "_raw")) {
- printf(" %-10s\n", ent->d_name);
- }
-
- return 0;
-}
-
-static int dump_one_device(const char *dev_dir_name)
-{
- char name[IIO_MAX_NAME_LENGTH];
- int dev_idx;
- int retval;
-
- retval = sscanf(dev_dir_name + strlen(iio_dir) + strlen(type_device),
- "%i", &dev_idx);
- if (retval != 1)
- return -EINVAL;
- read_sysfs_string("name", dev_dir_name, name);
- printf("Device %03d: %s\n", dev_idx, name);
-
- if (verblevel >= VERBLEVEL_SENSORS)
- return dump_channels(dev_dir_name);
- return 0;
-}
-
-static int dump_one_trigger(const char *dev_dir_name)
-{
- char name[IIO_MAX_NAME_LENGTH];
- int dev_idx;
- int retval;
-
- retval = sscanf(dev_dir_name + strlen(iio_dir) + strlen(type_trigger),
- "%i", &dev_idx);
- if (retval != 1)
- return -EINVAL;
- read_sysfs_string("name", dev_dir_name, name);
- printf("Trigger %03d: %s\n", dev_idx, name);
- return 0;
-}
-
-static void dump_devices(void)
-{
- const struct dirent *ent;
- int number, numstrlen;
-
- FILE *nameFile;
- DIR *dp;
- char thisname[IIO_MAX_NAME_LENGTH];
- char *filename;
-
- dp = opendir(iio_dir);
- if (dp == NULL) {
- printf("No industrial I/O devices available\n");
- return;
- }
-
- while (ent = readdir(dp), ent != NULL) {
- if (check_prefix(ent->d_name, type_device)) {
- char *dev_dir_name;
-
- asprintf(&dev_dir_name, "%s%s", iio_dir, ent->d_name);
- dump_one_device(dev_dir_name);
- free(dev_dir_name);
- if (verblevel >= VERBLEVEL_SENSORS)
- printf("\n");
- }
- }
- rewinddir(dp);
- while (ent = readdir(dp), ent != NULL) {
- if (check_prefix(ent->d_name, type_trigger)) {
- char *dev_dir_name;
-
- asprintf(&dev_dir_name, "%s%s", iio_dir, ent->d_name);
- dump_one_trigger(dev_dir_name);
- free(dev_dir_name);
- }
- }
- closedir(dp);
-}
-
-int main(int argc, char **argv)
-{
- int c, err = 0;
-
- while ((c = getopt(argc, argv, "d:D:v")) != EOF) {
- switch (c) {
- case 'v':
- verblevel++;
- break;
-
- case '?':
- default:
- err++;
- break;
- }
- }
- if (err || argc > optind) {
- fprintf(stderr, "Usage: lsiio [options]...\n"
- "List industrial I/O devices\n"
- " -v, --verbose\n"
- " Increase verbosity (may be given multiple times)\n"
- );
- exit(1);
- }
-
- dump_devices();
-
- return 0;
-}
#define ADIS16201_GLOB_CMD 0x3E /* Operation, system command register */
/* MSC_CTRL */
-#define ADIS16201_MSC_CTRL_SELF_TEST_EN (1 << 8) /* Self-test enable */
-#define ADIS16201_MSC_CTRL_DATA_RDY_EN (1 << 2) /* Data-ready enable: 1 = enabled, 0 = disabled */
-#define ADIS16201_MSC_CTRL_ACTIVE_HIGH (1 << 1) /* Data-ready polarity: 1 = active high, 0 = active low */
-#define ADIS16201_MSC_CTRL_DATA_RDY_DIO1 (1 << 0) /* Data-ready line selection: 1 = DIO1, 0 = DIO0 */
+#define ADIS16201_MSC_CTRL_SELF_TEST_EN BIT(8) /* Self-test enable */
+#define ADIS16201_MSC_CTRL_DATA_RDY_EN BIT(2) /* Data-ready enable: 1 = enabled, 0 = disabled */
+#define ADIS16201_MSC_CTRL_ACTIVE_HIGH BIT(1) /* Data-ready polarity: 1 = active high, 0 = active low */
+#define ADIS16201_MSC_CTRL_DATA_RDY_DIO1 BIT(0) /* Data-ready line selection: 1 = DIO1, 0 = DIO0 */
/* DIAG_STAT */
-#define ADIS16201_DIAG_STAT_ALARM2 (1<<9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
-#define ADIS16201_DIAG_STAT_ALARM1 (1<<8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
+#define ADIS16201_DIAG_STAT_ALARM2 BIT(9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
+#define ADIS16201_DIAG_STAT_ALARM1 BIT(8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
#define ADIS16201_DIAG_STAT_SPI_FAIL_BIT 3 /* SPI communications failure */
#define ADIS16201_DIAG_STAT_FLASH_UPT_BIT 2 /* Flash update failure */
#define ADIS16201_DIAG_STAT_POWER_HIGH_BIT 1 /* Power supply above 3.625 V */
#define ADIS16201_DIAG_STAT_POWER_LOW_BIT 0 /* Power supply below 3.15 V */
/* GLOB_CMD */
-#define ADIS16201_GLOB_CMD_SW_RESET (1<<7)
-#define ADIS16201_GLOB_CMD_FACTORY_CAL (1<<1)
+#define ADIS16201_GLOB_CMD_SW_RESET BIT(7)
+#define ADIS16201_GLOB_CMD_FACTORY_CAL BIT(1)
-#define ADIS16201_ERROR_ACTIVE (1<<14)
+#define ADIS16201_ERROR_ACTIVE BIT(14)
enum adis16201_scan {
ADIS16201_SCAN_ACC_X,
ADIS_SUPPLY_CHAN(ADIS16201_SUPPLY_OUT, ADIS16201_SCAN_SUPPLY, 0, 12),
ADIS_TEMP_CHAN(ADIS16201_TEMP_OUT, ADIS16201_SCAN_TEMP, 0, 12),
ADIS_ACCEL_CHAN(X, ADIS16201_XACCL_OUT, ADIS16201_SCAN_ACC_X,
- BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
+ BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
ADIS_ACCEL_CHAN(Y, ADIS16201_YACCL_OUT, ADIS16201_SCAN_ACC_Y,
- BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
+ BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
ADIS_AUX_ADC_CHAN(ADIS16201_AUX_ADC, ADIS16201_SCAN_AUX_ADC, 0, 12),
ADIS_INCLI_CHAN(X, ADIS16201_XINCL_OUT, ADIS16201_SCAN_INCLI_X,
- BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
+ BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
ADIS_INCLI_CHAN(X, ADIS16201_YINCL_OUT, ADIS16201_SCAN_INCLI_Y,
- BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
+ BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
IIO_CHAN_SOFT_TIMESTAMP(7)
};
#define ADIS16203_GLOB_CMD 0x3E /* Operation, system command register */
/* MSC_CTRL */
-#define ADIS16203_MSC_CTRL_PWRUP_SELF_TEST (1 << 10) /* Self-test at power-on: 1 = disabled, 0 = enabled */
-#define ADIS16203_MSC_CTRL_REVERSE_ROT_EN (1 << 9) /* Reverses rotation of both inclination outputs */
-#define ADIS16203_MSC_CTRL_SELF_TEST_EN (1 << 8) /* Self-test enable */
-#define ADIS16203_MSC_CTRL_DATA_RDY_EN (1 << 2) /* Data-ready enable: 1 = enabled, 0 = disabled */
-#define ADIS16203_MSC_CTRL_ACTIVE_HIGH (1 << 1) /* Data-ready polarity: 1 = active high, 0 = active low */
-#define ADIS16203_MSC_CTRL_DATA_RDY_DIO1 (1 << 0) /* Data-ready line selection: 1 = DIO1, 0 = DIO0 */
+#define ADIS16203_MSC_CTRL_PWRUP_SELF_TEST BIT(10) /* Self-test at power-on: 1 = disabled, 0 = enabled */
+#define ADIS16203_MSC_CTRL_REVERSE_ROT_EN BIT(9) /* Reverses rotation of both inclination outputs */
+#define ADIS16203_MSC_CTRL_SELF_TEST_EN BIT(8) /* Self-test enable */
+#define ADIS16203_MSC_CTRL_DATA_RDY_EN BIT(2) /* Data-ready enable: 1 = enabled, 0 = disabled */
+#define ADIS16203_MSC_CTRL_ACTIVE_HIGH BIT(1) /* Data-ready polarity: 1 = active high, 0 = active low */
+#define ADIS16203_MSC_CTRL_DATA_RDY_DIO1 BIT(0) /* Data-ready line selection: 1 = DIO1, 0 = DIO0 */
/* DIAG_STAT */
-#define ADIS16203_DIAG_STAT_ALARM2 (1<<9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
-#define ADIS16203_DIAG_STAT_ALARM1 (1<<8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
+#define ADIS16203_DIAG_STAT_ALARM2 BIT(9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
+#define ADIS16203_DIAG_STAT_ALARM1 BIT(8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
#define ADIS16203_DIAG_STAT_SELFTEST_FAIL_BIT 5 /* Self-test diagnostic error flag */
#define ADIS16203_DIAG_STAT_SPI_FAIL_BIT 3 /* SPI communications failure */
#define ADIS16203_DIAG_STAT_FLASH_UPT_BIT 2 /* Flash update failure */
#define ADIS16203_DIAG_STAT_POWER_LOW_BIT 0 /* Power supply below 3.15 V */
/* GLOB_CMD */
-#define ADIS16203_GLOB_CMD_SW_RESET (1<<7)
-#define ADIS16203_GLOB_CMD_CLEAR_STAT (1<<4)
-#define ADIS16203_GLOB_CMD_FACTORY_CAL (1<<1)
+#define ADIS16203_GLOB_CMD_SW_RESET BIT(7)
+#define ADIS16203_GLOB_CMD_CLEAR_STAT BIT(4)
+#define ADIS16203_GLOB_CMD_FACTORY_CAL BIT(1)
-#define ADIS16203_ERROR_ACTIVE (1<<14)
+#define ADIS16203_ERROR_ACTIVE BIT(14)
enum adis16203_scan {
ADIS16203_SCAN_INCLI_X,
ADIS_SUPPLY_CHAN(ADIS16203_SUPPLY_OUT, ADIS16203_SCAN_SUPPLY, 0, 12),
ADIS_AUX_ADC_CHAN(ADIS16203_AUX_ADC, ADIS16203_SCAN_AUX_ADC, 0, 12),
ADIS_INCLI_CHAN(X, ADIS16203_XINCL_OUT, ADIS16203_SCAN_INCLI_X,
- BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
+ BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
/* Fixme: Not what it appears to be - see data sheet */
ADIS_INCLI_CHAN(Y, ADIS16203_YINCL_OUT, ADIS16203_SCAN_INCLI_Y,
- 0, 0, 14),
+ 0, 0, 14),
ADIS_TEMP_CHAN(ADIS16203_TEMP_OUT, ADIS16203_SCAN_TEMP, 0, 12),
IIO_CHAN_SOFT_TIMESTAMP(5),
};
#define ADIS16204_GLOB_CMD 0x3E /* Operation, system command register */
/* MSC_CTRL */
-#define ADIS16204_MSC_CTRL_PWRUP_SELF_TEST (1 << 10) /* Self-test at power-on: 1 = disabled, 0 = enabled */
-#define ADIS16204_MSC_CTRL_SELF_TEST_EN (1 << 8) /* Self-test enable */
-#define ADIS16204_MSC_CTRL_DATA_RDY_EN (1 << 2) /* Data-ready enable: 1 = enabled, 0 = disabled */
-#define ADIS16204_MSC_CTRL_ACTIVE_HIGH (1 << 1) /* Data-ready polarity: 1 = active high, 0 = active low */
-#define ADIS16204_MSC_CTRL_DATA_RDY_DIO2 (1 << 0) /* Data-ready line selection: 1 = DIO2, 0 = DIO1 */
+#define ADIS16204_MSC_CTRL_PWRUP_SELF_TEST BIT(10) /* Self-test at power-on: 1 = disabled, 0 = enabled */
+#define ADIS16204_MSC_CTRL_SELF_TEST_EN BIT(8) /* Self-test enable */
+#define ADIS16204_MSC_CTRL_DATA_RDY_EN BIT(2) /* Data-ready enable: 1 = enabled, 0 = disabled */
+#define ADIS16204_MSC_CTRL_ACTIVE_HIGH BIT(1) /* Data-ready polarity: 1 = active high, 0 = active low */
+#define ADIS16204_MSC_CTRL_DATA_RDY_DIO2 BIT(0) /* Data-ready line selection: 1 = DIO2, 0 = DIO1 */
/* DIAG_STAT */
-#define ADIS16204_DIAG_STAT_ALARM2 (1<<9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
-#define ADIS16204_DIAG_STAT_ALARM1 (1<<8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
+#define ADIS16204_DIAG_STAT_ALARM2 BIT(9) /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
+#define ADIS16204_DIAG_STAT_ALARM1 BIT(8) /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
#define ADIS16204_DIAG_STAT_SELFTEST_FAIL_BIT 5 /* Self-test diagnostic error flag: 1 = error condition,
0 = normal operation */
#define ADIS16204_DIAG_STAT_SPI_FAIL_BIT 3 /* SPI communications failure */
#define ADIS16204_DIAG_STAT_POWER_LOW_BIT 0 /* Power supply below 2.975 V */
/* GLOB_CMD */
-#define ADIS16204_GLOB_CMD_SW_RESET (1<<7)
-#define ADIS16204_GLOB_CMD_CLEAR_STAT (1<<4)
-#define ADIS16204_GLOB_CMD_FACTORY_CAL (1<<1)
+#define ADIS16204_GLOB_CMD_SW_RESET BIT(7)
+#define ADIS16204_GLOB_CMD_CLEAR_STAT BIT(4)
+#define ADIS16204_GLOB_CMD_FACTORY_CAL BIT(1)
-#define ADIS16204_ERROR_ACTIVE (1<<14)
+#define ADIS16204_ERROR_ACTIVE BIT(14)
enum adis16204_scan {
ADIS16204_SCAN_ACC_X,
ADIS_AUX_ADC_CHAN(ADIS16204_AUX_ADC, ADIS16204_SCAN_AUX_ADC, 0, 12),
ADIS_TEMP_CHAN(ADIS16204_TEMP_OUT, ADIS16204_SCAN_TEMP, 0, 12),
ADIS_ACCEL_CHAN(X, ADIS16204_XACCL_OUT, ADIS16204_SCAN_ACC_X,
- BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK), 0, 14),
+ BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK),
+ 0, 14),
ADIS_ACCEL_CHAN(Y, ADIS16204_YACCL_OUT, ADIS16204_SCAN_ACC_Y,
- BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK), 0, 14),
+ BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK),
+ 0, 14),
ADIS_ACCEL_CHAN(ROOT_SUM_SQUARED_X_Y, ADIS16204_XY_RSS_OUT,
- ADIS16204_SCAN_ACC_XY, BIT(IIO_CHAN_INFO_PEAK), 0, 14),
+ ADIS16204_SCAN_ACC_XY, BIT(IIO_CHAN_INFO_PEAK), 0, 14),
IIO_CHAN_SOFT_TIMESTAMP(5),
};
/* MSC_CTRL */
/* Self-test at power-on: 1 = disabled, 0 = enabled */
-#define ADIS16209_MSC_CTRL_PWRUP_SELF_TEST (1 << 10)
+#define ADIS16209_MSC_CTRL_PWRUP_SELF_TEST BIT(10)
/* Self-test enable */
-#define ADIS16209_MSC_CTRL_SELF_TEST_EN (1 << 8)
+#define ADIS16209_MSC_CTRL_SELF_TEST_EN BIT(8)
/* Data-ready enable: 1 = enabled, 0 = disabled */
-#define ADIS16209_MSC_CTRL_DATA_RDY_EN (1 << 2)
+#define ADIS16209_MSC_CTRL_DATA_RDY_EN BIT(2)
/* Data-ready polarity: 1 = active high, 0 = active low */
-#define ADIS16209_MSC_CTRL_ACTIVE_HIGH (1 << 1)
+#define ADIS16209_MSC_CTRL_ACTIVE_HIGH BIT(1)
/* Data-ready line selection: 1 = DIO2, 0 = DIO1 */
-#define ADIS16209_MSC_CTRL_DATA_RDY_DIO2 (1 << 0)
+#define ADIS16209_MSC_CTRL_DATA_RDY_DIO2 BIT(0)
/* DIAG_STAT */
/* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
-#define ADIS16209_DIAG_STAT_ALARM2 (1<<9)
+#define ADIS16209_DIAG_STAT_ALARM2 BIT(9)
/* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
-#define ADIS16209_DIAG_STAT_ALARM1 (1<<8)
+#define ADIS16209_DIAG_STAT_ALARM1 BIT(8)
/* Self-test diagnostic error flag: 1 = error condition, 0 = normal operation */
#define ADIS16209_DIAG_STAT_SELFTEST_FAIL_BIT 5
/* SPI communications failure */
#define ADIS16209_DIAG_STAT_POWER_LOW_BIT 0
/* GLOB_CMD */
-#define ADIS16209_GLOB_CMD_SW_RESET (1<<7)
-#define ADIS16209_GLOB_CMD_CLEAR_STAT (1<<4)
-#define ADIS16209_GLOB_CMD_FACTORY_CAL (1<<1)
+#define ADIS16209_GLOB_CMD_SW_RESET BIT(7)
+#define ADIS16209_GLOB_CMD_CLEAR_STAT BIT(4)
+#define ADIS16209_GLOB_CMD_FACTORY_CAL BIT(1)
-#define ADIS16209_ERROR_ACTIVE (1<<14)
+#define ADIS16209_ERROR_ACTIVE BIT(14)
#define ADIS16209_SCAN_SUPPLY 0
#define ADIS16209_SCAN_ACC_X 1
ADIS_SUPPLY_CHAN(ADIS16209_SUPPLY_OUT, ADIS16209_SCAN_SUPPLY, 0, 14),
ADIS_TEMP_CHAN(ADIS16209_TEMP_OUT, ADIS16209_SCAN_TEMP, 0, 12),
ADIS_ACCEL_CHAN(X, ADIS16209_XACCL_OUT, ADIS16209_SCAN_ACC_X,
- BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
+ BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
ADIS_ACCEL_CHAN(Y, ADIS16209_YACCL_OUT, ADIS16209_SCAN_ACC_Y,
- BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
+ BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
ADIS_AUX_ADC_CHAN(ADIS16209_AUX_ADC, ADIS16209_SCAN_AUX_ADC, 0, 12),
ADIS_INCLI_CHAN(X, ADIS16209_XINCL_OUT, ADIS16209_SCAN_INCLI_X,
- 0, 0, 14),
+ 0, 0, 14),
ADIS_INCLI_CHAN(Y, ADIS16209_YINCL_OUT, ADIS16209_SCAN_INCLI_Y,
- 0, 0, 14),
+ 0, 0, 14),
ADIS_ROT_CHAN(X, ADIS16209_ROT_OUT, ADIS16209_SCAN_ROT, 0, 0, 14),
IIO_CHAN_SOFT_TIMESTAMP(8)
};
BIT(ADIS16209_DIAG_STAT_POWER_LOW_BIT),
};
-
static int adis16209_probe(struct spi_device *spi)
{
int ret;
#define ADIS16220_CAPTURE_SIZE 2048
/* MSC_CTRL */
-#define ADIS16220_MSC_CTRL_SELF_TEST_EN (1 << 8)
-#define ADIS16220_MSC_CTRL_POWER_SUP_COM_AIN1 (1 << 1)
-#define ADIS16220_MSC_CTRL_POWER_SUP_COM_AIN2 (1 << 0)
+#define ADIS16220_MSC_CTRL_SELF_TEST_EN BIT(8)
+#define ADIS16220_MSC_CTRL_POWER_SUP_COM_AIN1 BIT(1)
+#define ADIS16220_MSC_CTRL_POWER_SUP_COM_AIN2 BIT(0)
/* DIO_CTRL */
-#define ADIS16220_MSC_CTRL_DIO2_BUSY_IND (3<<4)
-#define ADIS16220_MSC_CTRL_DIO1_BUSY_IND (3<<2)
-#define ADIS16220_MSC_CTRL_DIO2_ACT_HIGH (1<<1)
-#define ADIS16220_MSC_CTRL_DIO1_ACT_HIGH (1<<0)
+#define ADIS16220_MSC_CTRL_DIO2_BUSY_IND (BIT(5) | BIT(4))
+#define ADIS16220_MSC_CTRL_DIO1_BUSY_IND (BIT(3) | BIT(2))
+#define ADIS16220_MSC_CTRL_DIO2_ACT_HIGH BIT(1)
+#define ADIS16220_MSC_CTRL_DIO1_ACT_HIGH BIT(0)
/* DIAG_STAT */
/* AIN2 sample > ALM_MAG2 */
-#define ADIS16220_DIAG_STAT_ALM_MAG2 (1<<14)
+#define ADIS16220_DIAG_STAT_ALM_MAG2 BIT(14)
/* AIN1 sample > ALM_MAG1 */
-#define ADIS16220_DIAG_STAT_ALM_MAG1 (1<<13)
+#define ADIS16220_DIAG_STAT_ALM_MAG1 BIT(13)
/* Acceleration sample > ALM_MAGA */
-#define ADIS16220_DIAG_STAT_ALM_MAGA (1<<12)
+#define ADIS16220_DIAG_STAT_ALM_MAGA BIT(12)
/* Error condition programmed into ALM_MAGS[11:0] and ALM_CTRL[5:4] is true */
-#define ADIS16220_DIAG_STAT_ALM_MAGS (1<<11)
+#define ADIS16220_DIAG_STAT_ALM_MAGS BIT(11)
/* |Peak value in AIN2 data capture| > ALM_MAG2 */
-#define ADIS16220_DIAG_STAT_PEAK_AIN2 (1<<10)
+#define ADIS16220_DIAG_STAT_PEAK_AIN2 BIT(10)
/* |Peak value in AIN1 data capture| > ALM_MAG1 */
-#define ADIS16220_DIAG_STAT_PEAK_AIN1 (1<<9)
+#define ADIS16220_DIAG_STAT_PEAK_AIN1 BIT(9)
/* |Peak value in acceleration data capture| > ALM_MAGA */
-#define ADIS16220_DIAG_STAT_PEAK_ACCEL (1<<8)
+#define ADIS16220_DIAG_STAT_PEAK_ACCEL BIT(8)
/* Data ready, capture complete */
-#define ADIS16220_DIAG_STAT_DATA_RDY (1<<7)
-#define ADIS16220_DIAG_STAT_FLASH_CHK (1<<6)
-#define ADIS16220_DIAG_STAT_SELF_TEST (1<<5)
+#define ADIS16220_DIAG_STAT_DATA_RDY BIT(7)
+#define ADIS16220_DIAG_STAT_FLASH_CHK BIT(6)
+#define ADIS16220_DIAG_STAT_SELF_TEST BIT(5)
/* Capture period violation/interruption */
#define ADIS16220_DIAG_STAT_VIOLATION_BIT 4
/* SPI communications failure */
#define ADIS16220_DIAG_STAT_POWER_LOW_BIT 0
/* GLOB_CMD */
-#define ADIS16220_GLOB_CMD_SW_RESET (1<<7)
-#define ADIS16220_GLOB_CMD_SELF_TEST (1<<2)
-#define ADIS16220_GLOB_CMD_PWR_DOWN (1<<1)
+#define ADIS16220_GLOB_CMD_SW_RESET BIT(7)
+#define ADIS16220_GLOB_CMD_SELF_TEST BIT(2)
+#define ADIS16220_GLOB_CMD_PWR_DOWN BIT(1)
#define ADIS16220_MAX_TX 2048
#define ADIS16220_MAX_RX 2048
#include "adis16220.h"
static ssize_t adis16220_read_16bit(struct device *dev,
- struct device_attribute *attr,
- char *buf)
+ struct device_attribute *attr,
+ char *buf)
{
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct adis16220_state *st = iio_priv(indio_dev);
ssize_t ret;
- s16 val = 0;
+ u16 val;
/* Take the iio_dev status lock */
mutex_lock(&indio_dev->mlock);
- ret = adis_read_reg_16(&st->adis, this_attr->address,
- (u16 *)&val);
+ ret = adis_read_reg_16(&st->adis, this_attr->address, &val);
mutex_unlock(&indio_dev->mlock);
if (ret)
return ret;
- return sprintf(buf, "%d\n", val);
+ return sprintf(buf, "%u\n", val);
}
static ssize_t adis16220_write_16bit(struct device *dev,
- struct device_attribute *attr,
- const char *buf,
- size_t len)
+ struct device_attribute *attr,
+ const char *buf,
+ size_t len)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
}
static ssize_t adis16220_write_capture(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t len)
+ struct device_attribute *attr,
+ const char *buf, size_t len)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
bool val;
}
static ssize_t adis16220_capture_buffer_read(struct iio_dev *indio_dev,
- char *buf,
- loff_t off,
- size_t count,
- int addr)
+ char *buf,
+ loff_t off,
+ size_t count,
+ int addr)
{
struct adis16220_state *st = iio_priv(indio_dev);
struct spi_transfer xfers[] = {
/* write the begin position of capture buffer */
ret = adis_write_reg_16(&st->adis,
- ADIS16220_CAPT_PNTR,
- off > 1);
+ ADIS16220_CAPT_PNTR,
+ off > 1);
if (ret)
return -EIO;
/* read count/2 values from capture buffer */
mutex_lock(&st->buf_lock);
-
for (i = 0; i < count; i += 2) {
st->tx[i] = ADIS_READ_REG(addr);
st->tx[i + 1] = 0;
ret = spi_sync_transfer(st->adis.spi, xfers, ARRAY_SIZE(xfers));
if (ret) {
-
mutex_unlock(&st->buf_lock);
return -EIO;
}
};
static ssize_t adis16220_adc1_bin_read(struct file *filp, struct kobject *kobj,
- struct bin_attribute *attr,
- char *buf, loff_t off,
- size_t count)
+ struct bin_attribute *attr,
+ char *buf, loff_t off,
+ size_t count)
{
struct iio_dev *indio_dev = dev_to_iio_dev(kobj_to_dev(kobj));
};
static ssize_t adis16220_adc2_bin_read(struct file *filp, struct kobject *kobj,
- struct bin_attribute *attr,
- char *buf, loff_t off,
- size_t count)
+ struct bin_attribute *attr,
+ char *buf, loff_t off,
+ size_t count)
{
struct iio_dev *indio_dev = dev_to_iio_dev(kobj_to_dev(kobj));
ADIS16220_CAPT_BUF2);
}
-
static struct bin_attribute adc2_bin = {
.attr = {
.name = "in1_bin",
/* MSC_CTRL */
/* Enables sum-of-squares output (XYZPEAK_OUT) */
-#define ADIS16240_MSC_CTRL_XYZPEAK_OUT_EN (1 << 15)
+#define ADIS16240_MSC_CTRL_XYZPEAK_OUT_EN BIT(15)
/* Enables peak tracking output (XPEAK_OUT, YPEAK_OUT, and ZPEAK_OUT) */
-#define ADIS16240_MSC_CTRL_X_Y_ZPEAK_OUT_EN (1 << 14)
+#define ADIS16240_MSC_CTRL_X_Y_ZPEAK_OUT_EN BIT(14)
/* Self-test enable: 1 = apply electrostatic force, 0 = disabled */
-#define ADIS16240_MSC_CTRL_SELF_TEST_EN (1 << 8)
+#define ADIS16240_MSC_CTRL_SELF_TEST_EN BIT(8)
/* Data-ready enable: 1 = enabled, 0 = disabled */
-#define ADIS16240_MSC_CTRL_DATA_RDY_EN (1 << 2)
+#define ADIS16240_MSC_CTRL_DATA_RDY_EN BIT(2)
/* Data-ready polarity: 1 = active high, 0 = active low */
-#define ADIS16240_MSC_CTRL_ACTIVE_HIGH (1 << 1)
+#define ADIS16240_MSC_CTRL_ACTIVE_HIGH BIT(1)
/* Data-ready line selection: 1 = DIO2, 0 = DIO1 */
-#define ADIS16240_MSC_CTRL_DATA_RDY_DIO2 (1 << 0)
+#define ADIS16240_MSC_CTRL_DATA_RDY_DIO2 BIT(0)
/* DIAG_STAT */
/* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
-#define ADIS16240_DIAG_STAT_ALARM2 (1<<9)
+#define ADIS16240_DIAG_STAT_ALARM2 BIT(9)
/* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
-#define ADIS16240_DIAG_STAT_ALARM1 (1<<8)
+#define ADIS16240_DIAG_STAT_ALARM1 BIT(8)
/* Capture buffer full: 1 = capture buffer is full */
-#define ADIS16240_DIAG_STAT_CPT_BUF_FUL (1<<7)
+#define ADIS16240_DIAG_STAT_CPT_BUF_FUL BIT(7)
/* Flash test, checksum flag: 1 = mismatch, 0 = match */
-#define ADIS16240_DIAG_STAT_CHKSUM (1<<6)
+#define ADIS16240_DIAG_STAT_CHKSUM BIT(6)
/* Power-on, self-test flag: 1 = failure, 0 = pass */
#define ADIS16240_DIAG_STAT_PWRON_FAIL_BIT 5
/* Power-on self-test: 1 = in-progress, 0 = complete */
-#define ADIS16240_DIAG_STAT_PWRON_BUSY (1<<4)
+#define ADIS16240_DIAG_STAT_PWRON_BUSY BIT(4)
/* SPI communications failure */
#define ADIS16240_DIAG_STAT_SPI_FAIL_BIT 3
/* Flash update failure */
#define ADIS16240_DIAG_STAT_POWER_LOW_BIT 0
/* GLOB_CMD */
-#define ADIS16240_GLOB_CMD_RESUME (1<<8)
-#define ADIS16240_GLOB_CMD_SW_RESET (1<<7)
-#define ADIS16240_GLOB_CMD_STANDBY (1<<2)
+#define ADIS16240_GLOB_CMD_RESUME BIT(8)
+#define ADIS16240_GLOB_CMD_SW_RESET BIT(7)
+#define ADIS16240_GLOB_CMD_STANDBY BIT(2)
-#define ADIS16240_ERROR_ACTIVE (1<<14)
+#define ADIS16240_ERROR_ACTIVE BIT(14)
/* At the moment triggers are only used for ring buffer
* filling. This may change!
#include "adis16240.h"
static ssize_t adis16240_spi_read_signed(struct device *dev,
- struct device_attribute *attr,
- char *buf,
- unsigned bits)
+ struct device_attribute *attr,
+ char *buf,
+ unsigned bits)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct adis *st = iio_priv(indio_dev);
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
ret = adis_read_reg_16(st,
- this_attr->address, (u16 *)&val);
+ this_attr->address, (u16 *)&val);
if (ret)
return ret;
if (val & ADIS16240_ERROR_ACTIVE)
adis_check_status(st);
- val = ((s16)(val << shift) >> shift);
+ val = (s16)(val << shift) >> shift;
return sprintf(buf, "%d\n", val);
}
static ssize_t adis16240_read_12bit_signed(struct device *dev,
- struct device_attribute *attr,
- char *buf)
+ struct device_attribute *attr,
+ char *buf)
{
ssize_t ret;
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
ADIS_SUPPLY_CHAN(ADIS16240_SUPPLY_OUT, ADIS16240_SCAN_SUPPLY, 0, 10),
ADIS_AUX_ADC_CHAN(ADIS16240_AUX_ADC, ADIS16240_SCAN_AUX_ADC, 0, 10),
ADIS_ACCEL_CHAN(X, ADIS16240_XACCL_OUT, ADIS16240_SCAN_ACC_X,
- BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK), 0, 10),
+ BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK),
+ 0, 10),
ADIS_ACCEL_CHAN(Y, ADIS16240_YACCL_OUT, ADIS16240_SCAN_ACC_Y,
- BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK), 0, 10),
+ BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK),
+ 0, 10),
ADIS_ACCEL_CHAN(Z, ADIS16240_ZACCL_OUT, ADIS16240_SCAN_ACC_Z,
- BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK), 0, 10),
+ BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK),
+ 0, 10),
ADIS_TEMP_CHAN(ADIS16240_TEMP_OUT, ADIS16240_SCAN_TEMP, 0, 10),
IIO_CHAN_SOFT_TIMESTAMP(6)
};
static inline void lis3l02dq_remove_trigger(struct iio_dev *indio_dev)
{
}
+
static inline int lis3l02dq_probe_trigger(struct iio_dev *indio_dev)
{
return 0;
{
return 0;
}
+
static inline void lis3l02dq_unconfigure_buffer(struct iio_dev *indio_dev)
{
}
IIO_CHAN_SOFT_TIMESTAMP(3)
};
-
static int lis3l02dq_read_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir)
{
-
u8 val;
int ret;
u8 mask = (1 << (chan->channel2*2 + (dir == IIO_EV_DIR_RISING)));
(control | LIS3L02DQ_REG_CTRL_2_ENABLE_INTERRUPT) :
(control & ~LIS3L02DQ_REG_CTRL_2_ENABLE_INTERRUPT);
ret = lis3l02dq_spi_write_reg_8(indio_dev,
- LIS3L02DQ_REG_CTRL_2_ADDR,
- control);
+ LIS3L02DQ_REG_CTRL_2_ADDR,
+ control);
if (ret)
goto error_ret;
}
}
static int lis3l02dq_get_buffer_element(struct iio_dev *indio_dev,
- u8 *buf)
+ u8 *buf)
{
int ret, i;
u8 *rx_array;
int scan_count = bitmap_weight(indio_dev->active_scan_mask,
indio_dev->masklength);
- rx_array = kzalloc(4 * scan_count, GFP_KERNEL);
- if (rx_array == NULL)
+ rx_array = kcalloc(4, scan_count, GFP_KERNEL);
+ if (!rx_array)
return -ENOMEM;
ret = lis3l02dq_read_all(indio_dev, rx_array);
if (ret < 0) {
char *data;
data = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
- if (data == NULL)
+ if (!data)
goto done;
if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
if (test_bit(0, indio_dev->active_scan_mask)) {
t |= LIS3L02DQ_REG_CTRL_1_AXES_X_ENABLE;
oneenabled = true;
- } else
+ } else {
t &= ~LIS3L02DQ_REG_CTRL_1_AXES_X_ENABLE;
+ }
if (test_bit(1, indio_dev->active_scan_mask)) {
t |= LIS3L02DQ_REG_CTRL_1_AXES_Y_ENABLE;
oneenabled = true;
- } else
+ } else {
t &= ~LIS3L02DQ_REG_CTRL_1_AXES_Y_ENABLE;
+ }
if (test_bit(2, indio_dev->active_scan_mask)) {
t |= LIS3L02DQ_REG_CTRL_1_AXES_Z_ENABLE;
oneenabled = true;
- } else
+ } else {
t &= ~LIS3L02DQ_REG_CTRL_1_AXES_Z_ENABLE;
-
+ }
if (!oneenabled) /* what happens in this case is unknown */
return -EINVAL;
ret = lis3l02dq_spi_write_reg_8(indio_dev,
"lis3l02dq_consumer%d",
indio_dev->id);
- if (indio_dev->pollfunc == NULL) {
+ if (!indio_dev->pollfunc) {
ret = -ENOMEM;
goto error_iio_sw_rb_free;
}
* Can probably alleviate this by reading the interrupt register on start, but
* that is really just brushing the problem under the carpet.
*/
+#ifndef _SCA3000
+#define _SCA3000
+
#define SCA3000_WRITE_REG(a) (((a) << 2) | 0x02)
#define SCA3000_READ_REG(a) ((a) << 2)
}
#endif
-
+#endif /* _SCA3000 */
struct device_attribute *attr,
char *buf)
{
- int ret, len;
+ int ret;
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct sca3000_state *st = iio_priv(indio_dev);
int val;
mutex_unlock(&st->lock);
if (ret < 0)
return ret;
- len = sprintf(buf, "%d\n",
- !!(val & SCA3000_FREE_FALL_DETECT));
- return len;
+ return sprintf(buf, "%d\n", !!(val & SCA3000_FREE_FALL_DETECT));
}
/**
return ret ? ret : num_read;
}
-static bool sca3000_ring_buf_data_available(struct iio_buffer *r)
+static size_t sca3000_ring_buf_data_available(struct iio_buffer *r)
{
- return r->stufftoread;
+ return r->stufftoread ? r->watermark : 0;
}
/**
* (RW, 16-bit (AD7792)/24-bit (AD7192)) */
/* Communications Register Bit Designations (AD7192_REG_COMM) */
-#define AD7192_COMM_WEN (1 << 7) /* Write Enable */
-#define AD7192_COMM_WRITE (0 << 6) /* Write Operation */
-#define AD7192_COMM_READ (1 << 6) /* Read Operation */
+#define AD7192_COMM_WEN BIT(7) /* Write Enable */
+#define AD7192_COMM_WRITE 0 /* Write Operation */
+#define AD7192_COMM_READ BIT(6) /* Read Operation */
#define AD7192_COMM_ADDR(x) (((x) & 0x7) << 3) /* Register Address */
-#define AD7192_COMM_CREAD (1 << 2) /* Continuous Read of Data Register */
+#define AD7192_COMM_CREAD BIT(2) /* Continuous Read of Data Register */
/* Status Register Bit Designations (AD7192_REG_STAT) */
-#define AD7192_STAT_RDY (1 << 7) /* Ready */
-#define AD7192_STAT_ERR (1 << 6) /* Error (Overrange, Underrange) */
-#define AD7192_STAT_NOREF (1 << 5) /* Error no external reference */
-#define AD7192_STAT_PARITY (1 << 4) /* Parity */
-#define AD7192_STAT_CH3 (1 << 2) /* Channel 3 */
-#define AD7192_STAT_CH2 (1 << 1) /* Channel 2 */
-#define AD7192_STAT_CH1 (1 << 0) /* Channel 1 */
+#define AD7192_STAT_RDY BIT(7) /* Ready */
+#define AD7192_STAT_ERR BIT(6) /* Error (Overrange, Underrange) */
+#define AD7192_STAT_NOREF BIT(5) /* Error no external reference */
+#define AD7192_STAT_PARITY BIT(4) /* Parity */
+#define AD7192_STAT_CH3 BIT(2) /* Channel 3 */
+#define AD7192_STAT_CH2 BIT(1) /* Channel 2 */
+#define AD7192_STAT_CH1 BIT(0) /* Channel 1 */
/* Mode Register Bit Designations (AD7192_REG_MODE) */
#define AD7192_MODE_SEL(x) (((x) & 0x7) << 21) /* Operation Mode Select */
#define AD7192_MODE_SEL_MASK (0x7 << 21) /* Operation Mode Select Mask */
-#define AD7192_MODE_DAT_STA (1 << 20) /* Status Register transmission */
+#define AD7192_MODE_DAT_STA BIT(20) /* Status Register transmission */
#define AD7192_MODE_CLKSRC(x) (((x) & 0x3) << 18) /* Clock Source Select */
-#define AD7192_MODE_SINC3 (1 << 15) /* SINC3 Filter Select */
-#define AD7192_MODE_ACX (1 << 14) /* AC excitation enable(AD7195 only)*/
-#define AD7192_MODE_ENPAR (1 << 13) /* Parity Enable */
-#define AD7192_MODE_CLKDIV (1 << 12) /* Clock divide by 2 (AD7190/2 only)*/
-#define AD7192_MODE_SCYCLE (1 << 11) /* Single cycle conversion */
-#define AD7192_MODE_REJ60 (1 << 10) /* 50/60Hz notch filter */
+#define AD7192_MODE_SINC3 BIT(15) /* SINC3 Filter Select */
+#define AD7192_MODE_ACX BIT(14) /* AC excitation enable(AD7195 only)*/
+#define AD7192_MODE_ENPAR BIT(13) /* Parity Enable */
+#define AD7192_MODE_CLKDIV BIT(12) /* Clock divide by 2 (AD7190/2 only)*/
+#define AD7192_MODE_SCYCLE BIT(11) /* Single cycle conversion */
+#define AD7192_MODE_REJ60 BIT(10) /* 50/60Hz notch filter */
#define AD7192_MODE_RATE(x) ((x) & 0x3FF) /* Filter Update Rate Select */
/* Mode Register: AD7192_MODE_SEL options */
/* Configuration Register Bit Designations (AD7192_REG_CONF) */
-#define AD7192_CONF_CHOP (1 << 23) /* CHOP enable */
-#define AD7192_CONF_REFSEL (1 << 20) /* REFIN1/REFIN2 Reference Select */
+#define AD7192_CONF_CHOP BIT(23) /* CHOP enable */
+#define AD7192_CONF_REFSEL BIT(20) /* REFIN1/REFIN2 Reference Select */
#define AD7192_CONF_CHAN(x) (((1 << (x)) & 0xFF) << 8) /* Channel select */
#define AD7192_CONF_CHAN_MASK (0xFF << 8) /* Channel select mask */
-#define AD7192_CONF_BURN (1 << 7) /* Burnout current enable */
-#define AD7192_CONF_REFDET (1 << 6) /* Reference detect enable */
-#define AD7192_CONF_BUF (1 << 4) /* Buffered Mode Enable */
-#define AD7192_CONF_UNIPOLAR (1 << 3) /* Unipolar/Bipolar Enable */
+#define AD7192_CONF_BURN BIT(7) /* Burnout current enable */
+#define AD7192_CONF_REFDET BIT(6) /* Reference detect enable */
+#define AD7192_CONF_BUF BIT(4) /* Buffered Mode Enable */
+#define AD7192_CONF_UNIPOLAR BIT(3) /* Unipolar/Bipolar Enable */
#define AD7192_CONF_GAIN(x) ((x) & 0x7) /* Gain Select */
#define AD7192_CH_AIN1P_AIN2M 0 /* AIN1(+) - AIN2(-) */
#define AD7192_ID_MASK 0x0F
/* GPOCON Register Bit Designations (AD7192_REG_GPOCON) */
-#define AD7192_GPOCON_BPDSW (1 << 6) /* Bridge power-down switch enable */
-#define AD7192_GPOCON_GP32EN (1 << 5) /* Digital Output P3 and P2 enable */
-#define AD7192_GPOCON_GP10EN (1 << 4) /* Digital Output P1 and P0 enable */
-#define AD7192_GPOCON_P3DAT (1 << 3) /* P3 state */
-#define AD7192_GPOCON_P2DAT (1 << 2) /* P2 state */
-#define AD7192_GPOCON_P1DAT (1 << 1) /* P1 state */
-#define AD7192_GPOCON_P0DAT (1 << 0) /* P0 state */
+#define AD7192_GPOCON_BPDSW BIT(6) /* Bridge power-down switch enable */
+#define AD7192_GPOCON_GP32EN BIT(5) /* Digital Output P3 and P2 enable */
+#define AD7192_GPOCON_GP10EN BIT(4) /* Digital Output P1 and P0 enable */
+#define AD7192_GPOCON_P3DAT BIT(3) /* P3 state */
+#define AD7192_GPOCON_P2DAT BIT(2) /* P2 state */
+#define AD7192_GPOCON_P1DAT BIT(1) /* P1 state */
+#define AD7192_GPOCON_P0DAT BIT(0) /* P0 state */
#define AD7192_INT_FREQ_MHz 4915200
#define AD7280A_CNVST_CONTROL 0x1D /* D7 to D0, Read/write */
/* Bits and Masks */
-#define AD7280A_CTRL_HB_CONV_INPUT_ALL (0 << 6)
-#define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_4 (1 << 6)
-#define AD7280A_CTRL_HB_CONV_INPUT_6CELL (2 << 6)
-#define AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST (3 << 6)
-#define AD7280A_CTRL_HB_CONV_RES_READ_ALL (0 << 4)
-#define AD7280A_CTRL_HB_CONV_RES_READ_6CELL_AUX1_3_4 (1 << 4)
-#define AD7280A_CTRL_HB_CONV_RES_READ_6CELL (2 << 4)
-#define AD7280A_CTRL_HB_CONV_RES_READ_NO (3 << 4)
-#define AD7280A_CTRL_HB_CONV_START_CNVST (0 << 3)
-#define AD7280A_CTRL_HB_CONV_START_CS (1 << 3)
-#define AD7280A_CTRL_HB_CONV_AVG_DIS (0 << 1)
-#define AD7280A_CTRL_HB_CONV_AVG_2 (1 << 1)
-#define AD7280A_CTRL_HB_CONV_AVG_4 (2 << 1)
-#define AD7280A_CTRL_HB_CONV_AVG_8 (3 << 1)
+#define AD7280A_CTRL_HB_CONV_INPUT_ALL 0
+#define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_4 BIT(6)
+#define AD7280A_CTRL_HB_CONV_INPUT_6CELL BIT(7)
+#define AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST (BIT(7) | BIT(6))
+#define AD7280A_CTRL_HB_CONV_RES_READ_ALL 0
+#define AD7280A_CTRL_HB_CONV_RES_READ_6CELL_AUX1_3_4 BIT(4)
+#define AD7280A_CTRL_HB_CONV_RES_READ_6CELL BIT(5)
+#define AD7280A_CTRL_HB_CONV_RES_READ_NO (BIT(5) | BIT(4))
+#define AD7280A_CTRL_HB_CONV_START_CNVST 0
+#define AD7280A_CTRL_HB_CONV_START_CS BIT(3)
+#define AD7280A_CTRL_HB_CONV_AVG_DIS 0
+#define AD7280A_CTRL_HB_CONV_AVG_2 BIT(1)
+#define AD7280A_CTRL_HB_CONV_AVG_4 BIT(2)
+#define AD7280A_CTRL_HB_CONV_AVG_8 (BIT(2) | BIT(1))
#define AD7280A_CTRL_HB_CONV_AVG(x) ((x) << 1)
-#define AD7280A_CTRL_HB_PWRDN_SW (1 << 0)
+#define AD7280A_CTRL_HB_PWRDN_SW BIT(0)
-#define AD7280A_CTRL_LB_SWRST (1 << 7)
-#define AD7280A_CTRL_LB_ACQ_TIME_400ns (0 << 5)
-#define AD7280A_CTRL_LB_ACQ_TIME_800ns (1 << 5)
-#define AD7280A_CTRL_LB_ACQ_TIME_1200ns (2 << 5)
-#define AD7280A_CTRL_LB_ACQ_TIME_1600ns (3 << 5)
+#define AD7280A_CTRL_LB_SWRST BIT(7)
+#define AD7280A_CTRL_LB_ACQ_TIME_400ns 0
+#define AD7280A_CTRL_LB_ACQ_TIME_800ns BIT(5)
+#define AD7280A_CTRL_LB_ACQ_TIME_1200ns BIT(6)
+#define AD7280A_CTRL_LB_ACQ_TIME_1600ns (BIT(6) | BIT(5))
#define AD7280A_CTRL_LB_ACQ_TIME(x) ((x) << 5)
-#define AD7280A_CTRL_LB_MUST_SET (1 << 4)
-#define AD7280A_CTRL_LB_THERMISTOR_EN (1 << 3)
-#define AD7280A_CTRL_LB_LOCK_DEV_ADDR (1 << 2)
-#define AD7280A_CTRL_LB_INC_DEV_ADDR (1 << 1)
-#define AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN (1 << 0)
+#define AD7280A_CTRL_LB_MUST_SET BIT(4)
+#define AD7280A_CTRL_LB_THERMISTOR_EN BIT(3)
+#define AD7280A_CTRL_LB_LOCK_DEV_ADDR BIT(2)
+#define AD7280A_CTRL_LB_INC_DEV_ADDR BIT(1)
+#define AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN BIT(0)
-#define AD7280A_ALERT_GEN_STATIC_HIGH (1 << 6)
-#define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN (3 << 6)
+#define AD7280A_ALERT_GEN_STATIC_HIGH BIT(6)
+#define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN (BIT(7) | BIT(6))
#define AD7280A_ALL_CELLS (0xAD << 16)
{
int dev, ch, cnt;
- st->iio_attr = kzalloc(sizeof(*st->iio_attr) * (st->slave_num + 1) *
- AD7280A_CELLS_PER_DEV * 2, GFP_KERNEL);
+ st->iio_attr = kcalloc(2, sizeof(*st->iio_attr) *
+ (st->slave_num + 1) * AD7280A_CELLS_PER_DEV,
+ GFP_KERNEL);
if (st->iio_attr == NULL)
return -ENOMEM;
#define AD7280A_CONV_AVG_4 2
#define AD7280A_CONV_AVG_8 3
-#define AD7280A_ALERT_REMOVE_VIN5 (1 << 2)
-#define AD7280A_ALERT_REMOVE_VIN4_VIN5 (2 << 2)
-#define AD7280A_ALERT_REMOVE_AUX5 (1 << 0)
-#define AD7280A_ALERT_REMOVE_AUX4_AUX5 (2 << 0)
+#define AD7280A_ALERT_REMOVE_VIN5 BIT(2)
+#define AD7280A_ALERT_REMOVE_VIN4_VIN5 BIT(3)
+#define AD7280A_ALERT_REMOVE_AUX5 BIT(0)
+#define AD7280A_ALERT_REMOVE_AUX4_AUX5 BIT(1)
struct ad7280_platform_data {
unsigned acquisition_time;
int ret;
buf = kzalloc(indio_dev->scan_bytes, GFP_KERNEL);
- if (buf == NULL)
+ if (!buf)
return;
if (gpio_is_valid(st->pdata->gpio_frstdata)) {
#include "ad7780.h"
-#define AD7780_RDY (1 << 7)
-#define AD7780_FILTER (1 << 6)
-#define AD7780_ERR (1 << 5)
-#define AD7780_ID1 (1 << 4)
-#define AD7780_ID0 (1 << 3)
-#define AD7780_GAIN (1 << 2)
-#define AD7780_PAT1 (1 << 1)
-#define AD7780_PAT0 (1 << 0)
+#define AD7780_RDY BIT(7)
+#define AD7780_FILTER BIT(6)
+#define AD7780_ERR BIT(5)
+#define AD7780_ID1 BIT(4)
+#define AD7780_ID0 BIT(3)
+#define AD7780_GAIN BIT(2)
+#define AD7780_PAT1 BIT(1)
+#define AD7780_PAT0 BIT(0)
struct ad7780_chip_info {
struct iio_chan_spec channel;
int ret, voltage_uv = 0;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
- if (indio_dev == NULL)
+ if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
* be sampled as regular LRADC channels. The driver will refuse any
* attempt to sample these channels.
*/
-#define CHAN_MASK_TOUCHBUTTON (0x3 << 0)
+#define CHAN_MASK_TOUCHBUTTON (BIT(1) | BIT(0))
#define CHAN_MASK_TOUCHSCREEN_4WIRE (0xf << 2)
#define CHAN_MASK_TOUCHSCREEN_5WIRE (0x1f << 2)
enum mxs_lradc_ts use_touchscreen;
};
#define LRADC_CTRL0 0x00
-# define LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE (1 << 23)
-# define LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE (1 << 22)
-# define LRADC_CTRL0_MX28_YNNSW /* YM */ (1 << 21)
-# define LRADC_CTRL0_MX28_YPNSW /* YP */ (1 << 20)
-# define LRADC_CTRL0_MX28_YPPSW /* YP */ (1 << 19)
-# define LRADC_CTRL0_MX28_XNNSW /* XM */ (1 << 18)
-# define LRADC_CTRL0_MX28_XNPSW /* XM */ (1 << 17)
-# define LRADC_CTRL0_MX28_XPPSW /* XP */ (1 << 16)
-
-# define LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE (1 << 20)
-# define LRADC_CTRL0_MX23_YM (1 << 19)
-# define LRADC_CTRL0_MX23_XM (1 << 18)
-# define LRADC_CTRL0_MX23_YP (1 << 17)
-# define LRADC_CTRL0_MX23_XP (1 << 16)
+# define LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE BIT(23)
+# define LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE BIT(22)
+# define LRADC_CTRL0_MX28_YNNSW /* YM */ BIT(21)
+# define LRADC_CTRL0_MX28_YPNSW /* YP */ BIT(20)
+# define LRADC_CTRL0_MX28_YPPSW /* YP */ BIT(19)
+# define LRADC_CTRL0_MX28_XNNSW /* XM */ BIT(18)
+# define LRADC_CTRL0_MX28_XNPSW /* XM */ BIT(17)
+# define LRADC_CTRL0_MX28_XPPSW /* XP */ BIT(16)
+
+# define LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE BIT(20)
+# define LRADC_CTRL0_MX23_YM BIT(19)
+# define LRADC_CTRL0_MX23_XM BIT(18)
+# define LRADC_CTRL0_MX23_YP BIT(17)
+# define LRADC_CTRL0_MX23_XP BIT(16)
# define LRADC_CTRL0_MX28_PLATE_MASK \
(LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE | \
LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XP)
#define LRADC_CTRL1 0x10
-#define LRADC_CTRL1_TOUCH_DETECT_IRQ_EN (1 << 24)
+#define LRADC_CTRL1_TOUCH_DETECT_IRQ_EN BIT(24)
#define LRADC_CTRL1_LRADC_IRQ_EN(n) (1 << ((n) + 16))
#define LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK (0x1fff << 16)
#define LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK (0x01ff << 16)
#define LRADC_CTRL1_LRADC_IRQ_EN_OFFSET 16
-#define LRADC_CTRL1_TOUCH_DETECT_IRQ (1 << 8)
+#define LRADC_CTRL1_TOUCH_DETECT_IRQ BIT(8)
#define LRADC_CTRL1_LRADC_IRQ(n) (1 << (n))
#define LRADC_CTRL1_MX28_LRADC_IRQ_MASK 0x1fff
#define LRADC_CTRL1_MX23_LRADC_IRQ_MASK 0x01ff
#define LRADC_CTRL2 0x20
#define LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET 24
-#define LRADC_CTRL2_TEMPSENSE_PWD (1 << 15)
+#define LRADC_CTRL2_TEMPSENSE_PWD BIT(15)
#define LRADC_STATUS 0x40
-#define LRADC_STATUS_TOUCH_DETECT_RAW (1 << 0)
+#define LRADC_STATUS_TOUCH_DETECT_RAW BIT(0)
#define LRADC_CH(n) (0x50 + (0x10 * (n)))
-#define LRADC_CH_ACCUMULATE (1 << 29)
+#define LRADC_CH_ACCUMULATE BIT(29)
#define LRADC_CH_NUM_SAMPLES_MASK (0x1f << 24)
#define LRADC_CH_NUM_SAMPLES_OFFSET 24
#define LRADC_CH_NUM_SAMPLES(x) \
*/
mxs_lradc_reg_wrt(lradc,
LRADC_DELAY_TRIGGER(0) | /* don't trigger ADC */
- LRADC_DELAY_TRIGGER_DELAYS(1 << 3) | /* trigger DELAY unit#3 */
+ LRADC_DELAY_TRIGGER_DELAYS(BIT(3)) | /* trigger DELAY unit#3 */
LRADC_DELAY_KICK |
LRADC_DELAY_DELAY(lradc->settling_delay),
LRADC_DELAY(2));
*/
mxs_lradc_reg_wrt(lradc,
LRADC_DELAY_TRIGGER(0) | /* don't trigger ADC */
- LRADC_DELAY_TRIGGER_DELAYS(1 << 3) | /* trigger DELAY unit#3 */
+ LRADC_DELAY_TRIGGER_DELAYS(BIT(3)) | /* trigger DELAY unit#3 */
LRADC_DELAY_KICK |
LRADC_DELAY_DELAY(lradc->settling_delay), LRADC_DELAY(2));
}
/* Enable the IRQ and start sampling the channel. */
mxs_lradc_reg_set(lradc, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1);
- mxs_lradc_reg_set(lradc, 1 << 0, LRADC_CTRL0);
+ mxs_lradc_reg_set(lradc, BIT(0), LRADC_CTRL0);
/* Wait for completion on the channel, 1 second max. */
ret = wait_for_completion_killable_timeout(&lradc->completion, HZ);
int i, len = 0;
for (i = 0; i < ARRAY_SIZE(lradc->scale_avail[ch]); i++)
- len += sprintf(buf + len, "%d.%09u ",
+ len += sprintf(buf + len, "%u.%09u ",
lradc->scale_avail[ch][i].integer,
lradc->scale_avail[ch][i].nano);
#define SPEAR_ADC_CLK_HIGH(x) (((x) & 0xf) << 4)
/* Bit definitions for SPEAR_ADC_STATUS */
-#define SPEAR_ADC_STATUS_START_CONVERSION (1 << 0)
+#define SPEAR_ADC_STATUS_START_CONVERSION BIT(0)
#define SPEAR_ADC_STATUS_CHANNEL_NUM(x) ((x) << 1)
-#define SPEAR_ADC_STATUS_ADC_ENABLE (1 << 4)
+#define SPEAR_ADC_STATUS_ADC_ENABLE BIT(4)
#define SPEAR_ADC_STATUS_AVG_SAMPLE(x) ((x) << 5)
-#define SPEAR_ADC_STATUS_VREF_INTERNAL (1 << 9)
+#define SPEAR_ADC_STATUS_VREF_INTERNAL BIT(9)
#define SPEAR_ADC_DATA_MASK 0x03ff
#define SPEAR_ADC_DATA_BITS 10
static unsigned long ad9832_calc_freqreg(unsigned long mclk, unsigned long fout)
{
- unsigned long long freqreg = (u64) fout *
- (u64) ((u64) 1L << AD9832_FREQ_BITS);
+ unsigned long long freqreg = (u64)fout *
+ (u64)((u64)1L << AD9832_FREQ_BITS);
do_div(freqreg, mclk);
return freqreg;
}
static int ad9832_write_phase(struct ad9832_state *st,
unsigned long addr, unsigned long phase)
{
- if (phase > (1 << AD9832_PHASE_BITS))
+ if (phase > BIT(AD9832_PHASE_BITS))
return -EINVAL;
st->phase_data[0] = cpu_to_be16((AD9832_CMD_PHA8BITSW << CMD_SHIFT) |
goto error_ret;
mutex_lock(&indio_dev->mlock);
- switch ((u32) this_attr->address) {
+ switch ((u32)this_attr->address) {
case AD9832_FREQ0HM:
case AD9832_FREQ1HM:
ret = ad9832_write_frequency(st, this_attr->address, val);
}
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
- if (indio_dev == NULL) {
+ if (!indio_dev) {
ret = -ENOMEM;
goto error_disable_reg;
}
#define AD9832_CMD_SYNCSELSRC 0x8
#define AD9832_CMD_SLEEPRESCLR 0xC
-#define AD9832_FREQ (1 << 11)
+#define AD9832_FREQ BIT(11)
#define AD9832_PHASE(x) (((x) & 3) << 9)
-#define AD9832_SYNC (1 << 13)
-#define AD9832_SELSRC (1 << 12)
-#define AD9832_SLEEP (1 << 13)
-#define AD9832_RESET (1 << 12)
-#define AD9832_CLR (1 << 11)
+#define AD9832_SYNC BIT(13)
+#define AD9832_SELSRC BIT(12)
+#define AD9832_SLEEP BIT(13)
+#define AD9832_RESET BIT(12)
+#define AD9832_CLR BIT(11)
#define CMD_SHIFT 12
#define ADD_SHIFT 8
#define AD9832_FREQ_BITS 32
static unsigned int ad9834_calc_freqreg(unsigned long mclk, unsigned long fout)
{
- unsigned long long freqreg = (u64) fout * (u64) (1 << AD9834_FREQ_BITS);
+ unsigned long long freqreg = (u64)fout * (u64)BIT(AD9834_FREQ_BITS);
do_div(freqreg, mclk);
return freqreg;
}
static int ad9834_write_phase(struct ad9834_state *st,
- unsigned long addr, unsigned long phase)
+ unsigned long addr, unsigned long phase)
{
- if (phase > (1 << AD9834_PHASE_BITS))
+ if (phase > BIT(AD9834_PHASE_BITS))
return -EINVAL;
st->data = cpu_to_be16(addr | phase);
}
static ssize_t ad9834_write(struct device *dev,
- struct device_attribute *attr,
- const char *buf,
- size_t len)
+ struct device_attribute *attr,
+ const char *buf,
+ size_t len)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ad9834_state *st = iio_priv(indio_dev);
goto error_ret;
mutex_lock(&indio_dev->mlock);
- switch ((u32) this_attr->address) {
+ switch ((u32)this_attr->address) {
case AD9834_REG_FREQ0:
case AD9834_REG_FREQ1:
ret = ad9834_write_frequency(st, this_attr->address, val);
break;
case AD9834_FSEL:
case AD9834_PSEL:
- if (val == 0)
+ if (val == 0) {
st->control &= ~(this_attr->address | AD9834_PIN_SW);
- else if (val == 1) {
+ } else if (val == 1) {
st->control |= this_attr->address;
st->control &= ~AD9834_PIN_SW;
} else {
}
static ssize_t ad9834_store_wavetype(struct device *dev,
- struct device_attribute *attr,
- const char *buf,
- size_t len)
+ struct device_attribute *attr,
+ const char *buf,
+ size_t len)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ad9834_state *st = iio_priv(indio_dev);
mutex_lock(&indio_dev->mlock);
- switch ((u32) this_attr->address) {
+ switch ((u32)this_attr->address) {
case 0:
if (sysfs_streq(buf, "sine")) {
st->control &= ~AD9834_MODE;
break;
case 1:
if (sysfs_streq(buf, "square") &&
- !(st->control & AD9834_MODE)) {
+ !(st->control & AD9834_MODE)) {
st->control &= ~AD9834_MODE;
st->control |= AD9834_OPBITEN;
} else {
return ret ? ret : len;
}
-static ssize_t ad9834_show_out0_wavetype_available(struct device *dev,
- struct device_attribute *attr,
- char *buf)
+static
+ssize_t ad9834_show_out0_wavetype_available(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ad9834_state *st = iio_priv(indio_dev);
return sprintf(buf, "%s\n", str);
}
-
static IIO_DEVICE_ATTR(out_altvoltage0_out0_wavetype_available, S_IRUGO,
ad9834_show_out0_wavetype_available, NULL, 0);
-static ssize_t ad9834_show_out1_wavetype_available(struct device *dev,
- struct device_attribute *attr,
- char *buf)
+static
+ssize_t ad9834_show_out1_wavetype_available(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ad9834_state *st = iio_priv(indio_dev);
}
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
- if (indio_dev == NULL) {
+ if (!indio_dev) {
ret = -ENOMEM;
goto error_disable_reg;
}
/* Registers */
-#define AD9834_REG_CMD (0 << 14)
-#define AD9834_REG_FREQ0 (1 << 14)
-#define AD9834_REG_FREQ1 (2 << 14)
-#define AD9834_REG_PHASE0 (6 << 13)
-#define AD9834_REG_PHASE1 (7 << 13)
+#define AD9834_REG_CMD 0
+#define AD9834_REG_FREQ0 BIT(14)
+#define AD9834_REG_FREQ1 BIT(15)
+#define AD9834_REG_PHASE0 (BIT(15) | BIT(14))
+#define AD9834_REG_PHASE1 (BIT(15) | BIT(14) | BIT(13))
/* Command Control Bits */
-#define AD9834_B28 (1 << 13)
-#define AD9834_HLB (1 << 12)
-#define AD9834_FSEL (1 << 11)
-#define AD9834_PSEL (1 << 10)
-#define AD9834_PIN_SW (1 << 9)
-#define AD9834_RESET (1 << 8)
-#define AD9834_SLEEP1 (1 << 7)
-#define AD9834_SLEEP12 (1 << 6)
-#define AD9834_OPBITEN (1 << 5)
-#define AD9834_SIGN_PIB (1 << 4)
-#define AD9834_DIV2 (1 << 3)
-#define AD9834_MODE (1 << 1)
+#define AD9834_B28 BIT(13)
+#define AD9834_HLB BIT(12)
+#define AD9834_FSEL BIT(11)
+#define AD9834_PSEL BIT(10)
+#define AD9834_PIN_SW BIT(9)
+#define AD9834_RESET BIT(8)
+#define AD9834_SLEEP1 BIT(7)
+#define AD9834_SLEEP12 BIT(6)
+#define AD9834_OPBITEN BIT(5)
+#define AD9834_SIGN_PIB BIT(4)
+#define AD9834_DIV2 BIT(3)
+#define AD9834_MODE BIT(1)
#define AD9834_FREQ_BITS 28
#define AD9834_PHASE_BITS 12
-#define RES_MASK(bits) ((1 << (bits)) - 1)
+#define RES_MASK(bits) (BIT(bits) - 1)
/**
* struct ad9834_state - driver instance specific data
__be16 freq_data[2];
};
-
/*
* TODO: struct ad7887_platform_data needs to go into include/linux/iio
*/
*
* Licensed under the GPL-2 or later.
*/
+#ifndef IIO_DDS_H_
+#define IIO_DDS_H_
/**
* /sys/bus/iio/devices/.../out_altvoltageX_frequencyY
#define IIO_CONST_ATTR_OUT_WAVETYPES_AVAILABLE(_channel, _output, _modes)\
IIO_CONST_ATTR( \
out_altvoltage##_channel##_out##_output##_wavetype_available, _modes)
+
+#endif /* IIO_DDS_H_ */
int ret, i;
iio_evgen = kzalloc(sizeof(*iio_evgen), GFP_KERNEL);
- if (iio_evgen == NULL)
+ if (!iio_evgen)
return -ENOMEM;
iio_evgen->base = irq_alloc_descs(-1, 0, IIO_EVENTGEN_NO, 0);
{
int i, ret = 0;
- if (iio_evgen == NULL)
+ if (!iio_evgen)
return -ENODEV;
mutex_lock(&iio_evgen->lock);
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/module.h>
-#include <linux/moduleparam.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
* for chip specific state information.
*/
indio_dev = iio_device_alloc(sizeof(*st));
- if (indio_dev == NULL) {
+ if (!indio_dev) {
ret = -ENOMEM;
goto error_ret;
}
u16 *data;
data = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
- if (data == NULL)
+ if (!data)
goto done;
if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength)) {
/* Allocate a buffer to use - here a kfifo */
buffer = iio_kfifo_allocate();
- if (buffer == NULL) {
+ if (!buffer) {
ret = -ENOMEM;
goto error_ret;
}
"iio_simple_dummy_consumer%d",
indio_dev->id);
- if (indio_dev->pollfunc == NULL) {
+ if (!indio_dev->pollfunc) {
ret = -ENOMEM;
goto error_free_buffer;
}
struct iio_dev *indio_dev;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
- if (indio_dev == NULL)
+ if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
ret = isl29028_set_proxim_sampling(chip, chip->prox_sampling);
if (ret < 0) {
- dev_err(chip->dev, "%s(): setting the proximity, err = %d\n",
- __func__, ret);
+ dev_err(chip->dev, "setting the proximity, err = %d\n",
+ ret);
return ret;
}
ret = isl29028_set_als_scale(chip, chip->lux_scale);
if (ret < 0)
- dev_err(chip->dev, "%s(): setting als scale failed, err = %d\n",
- __func__, ret);
+ dev_err(chip->dev,
+ "setting als scale failed, err = %d\n", ret);
return ret;
}
static int taos_chip_off(struct iio_dev *indio_dev)
{
struct tsl2583_chip *chip = iio_priv(indio_dev);
- int ret;
/* turn device off */
chip->taos_chip_status = TSL258X_CHIP_SUSPENDED;
- ret = i2c_smbus_write_byte_data(chip->client,
+ return i2c_smbus_write_byte_data(chip->client,
TSL258X_CMD_REG | TSL258X_CNTRL,
0x00);
- return ret;
}
/* Sysfs Interface Functions */
/* select register to write */
ret = i2c_smbus_write_byte(client, (TSL2X7X_CMD_REG | reg));
if (ret < 0) {
- dev_err(&client->dev, "%s: failed to write register %x\n"
- , __func__, reg);
+ dev_err(&client->dev, "failed to write register %x\n", reg);
return ret;
}
if (ret >= 0)
*val = (u8)ret;
else
- dev_err(&client->dev, "%s: failed to read register %x\n"
- , __func__, reg);
+ dev_err(&client->dev, "failed to read register %x\n", reg);
return ret;
}
&buf[i]);
if (ret < 0) {
dev_err(&chip->client->dev,
- "%s: failed to read. err=%x\n", __func__, ret);
+ "failed to read. err=%x\n", ret);
goto out_unlock;
}
}
TSL2X7X_CMD_ALS_INT_CLR));
if (ret < 0) {
dev_err(&chip->client->dev,
- "%s: i2c_write_command failed - err = %d\n",
- __func__, ret);
+ "i2c_write_command failed - err = %d\n", ret);
goto out_unlock; /* have no data, so return failure */
}
ret = tsl2x7x_i2c_read(chip->client,
(TSL2X7X_CMD_REG | TSL2X7X_STATUS), &status);
if (ret < 0) {
- dev_err(&chip->client->dev,
- "%s: i2c err=%d\n", __func__, ret);
+ dev_err(&chip->client->dev, "i2c err=%d\n", ret);
goto prox_poll_err;
}
(TSL2X7X_CMD_REG | TSL2X7X_CNTRL));
if (ret < 0) {
dev_err(&chip->client->dev,
- "%s: failed to write CNTRL register, ret=%d\n",
- __func__, ret);
+ "failed to write CNTRL register, ret=%d\n", ret);
return ret;
}
(TSL2X7X_CMD_REG | TSL2X7X_CNTRL));
if (ret < 0) {
dev_err(&chip->client->dev,
- "%s: failed to write ctrl reg: ret=%d\n",
- __func__, ret);
+ "failed to write ctrl reg: ret=%d\n", ret);
return ret;
}
return lux_val;
}
- gain_trim_val = (((chip->tsl2x7x_settings.als_cal_target)
- * chip->tsl2x7x_settings.als_gain_trim) / lux_val);
+ gain_trim_val = ((chip->tsl2x7x_settings.als_cal_target)
+ * chip->tsl2x7x_settings.als_gain_trim) / lux_val;
if ((gain_trim_val < 250) || (gain_trim_val > 4000))
return -ERANGE;
TSL2X7X_CMD_REG + i, *dev_reg++);
if (ret < 0) {
dev_err(&chip->client->dev,
- "%s: failed on write to reg %d.\n", __func__, i);
+ "failed on write to reg %d.\n", i);
return ret;
}
}
if (chip->tsl2x7x_settings.prox_max_samples_cal > MAX_SAMPLES_CAL) {
dev_err(&chip->client->dev,
- "%s: max prox samples cal is too big: %d\n",
- __func__, chip->tsl2x7x_settings.prox_max_samples_cal);
+ "max prox samples cal is too big: %d\n",
+ chip->tsl2x7x_settings.prox_max_samples_cal);
chip->tsl2x7x_settings.prox_max_samples_cal = MAX_SAMPLES_CAL;
}
TSL2X7X_CMD_PROXALS_INT_CLR);
if (ret < 0)
dev_err(&chip->client->dev,
- "%s: Failed to clear irq from event handler. err = %d\n",
- __func__, ret);
+ "Failed to clear irq from event handler. err = %d\n",
+ ret);
return IRQ_HANDLED;
}
ret = i2c_smbus_write_byte(clientp, (TSL2X7X_CMD_REG | TSL2X7X_CNTRL));
if (ret < 0) {
- dev_err(&clientp->dev, "%s: write to cmd reg failed. err = %d\n",
- __func__, ret);
+ dev_err(&clientp->dev, "write to cmd reg failed. err = %d\n",
+ ret);
return ret;
}
*
* */
-
#ifndef HMC5843_CORE_H
#define HMC5843_CORE_H
HMC5983_ID,
};
+/**
+ * struct hcm5843_data - device specific data
+ * @dev: actual device
+ * @lock: update and read regmap data
+ * @regmap: hardware access register maps
+ * @variant: describe chip variants
+ * @buffer: 3x 16-bit channels + padding + 64-bit timestamp
+ **/
struct hmc5843_data {
struct device *dev;
struct mutex lock;
struct regmap *regmap;
const struct hmc5843_chip_info *variant;
- __be16 buffer[8]; /* 3x 16-bit channels + padding + 64-bit timestamp */
+ __be16 buffer[8];
};
int hmc5843_common_probe(struct device *dev, struct regmap *regmap,
- enum hmc5843_ids id);
+ enum hmc5843_ids id);
int hmc5843_common_remove(struct device *dev);
int hmc5843_common_suspend(struct device *dev);
-/* Copyright (C) 2010 Texas Instruments
- Author: Shubhrajyoti Datta <shubhrajyoti@ti.com>
- Acknowledgement: Jonathan Cameron <jic23@kernel.org> for valuable inputs.
-
- Support for HMC5883 and HMC5883L by Peter Meerwald <pmeerw@pmeerw.net>.
-
- Split to multiple files by Josef Gajdusek <atx@atx.name> - 2014
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-*/
+/*
+ * Device driver for the the HMC5843 multi-chip module designed
+ * for low field magnetic sensing.
+ *
+ * Copyright (C) 2010 Texas Instruments
+ *
+ * Author: Shubhrajyoti Datta <shubhrajyoti@ti.com>
+ * Acknowledgment: Jonathan Cameron <jic23@kernel.org> for valuable inputs.
+ * Support for HMC5883 and HMC5883L by Peter Meerwald <pmeerw@pmeerw.net>.
+ * Split to multiple files by Josef Gajdusek <atx@atx.name> - 2014
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
#include <linux/module.h>
#include <linux/regmap.h>
mutex_lock(&data->lock);
ret = regmap_update_bits(data->regmap, HMC5843_MODE_REG,
- HMC5843_MODE_MASK, operating_mode);
+ HMC5843_MODE_MASK, operating_mode);
mutex_unlock(&data->lock);
return ret;
return ret;
}
ret = regmap_bulk_read(data->regmap, HMC5843_DATA_OUT_MSB_REGS,
- values, sizeof(values));
+ values, sizeof(values));
mutex_unlock(&data->lock);
if (ret < 0)
return ret;
mutex_lock(&data->lock);
ret = regmap_update_bits(data->regmap, HMC5843_CONFIG_REG_A,
- HMC5843_MEAS_CONF_MASK, meas_conf);
+ HMC5843_MEAS_CONF_MASK, meas_conf);
mutex_unlock(&data->lock);
return ret;
}
-static ssize_t hmc5843_show_measurement_configuration(struct device *dev,
- struct device_attribute *attr,
- char *buf)
+static
+ssize_t hmc5843_show_measurement_configuration(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
{
struct hmc5843_data *data = iio_priv(dev_to_iio_dev(dev));
unsigned int val;
return sprintf(buf, "%d\n", val);
}
-static ssize_t hmc5843_set_measurement_configuration(struct device *dev,
- struct device_attribute *attr,
- const char *buf,
- size_t count)
+static
+ssize_t hmc5843_set_measurement_configuration(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t count)
{
struct hmc5843_data *data = iio_priv(dev_to_iio_dev(dev));
unsigned long meas_conf = 0;
hmc5843_set_measurement_configuration,
0);
-static ssize_t hmc5843_show_samp_freq_avail(struct device *dev,
- struct device_attribute *attr, char *buf)
+static
+ssize_t hmc5843_show_samp_freq_avail(struct device *dev,
+ struct device_attribute *attr, char *buf)
{
struct hmc5843_data *data = iio_priv(dev_to_iio_dev(dev));
size_t len = 0;
mutex_lock(&data->lock);
ret = regmap_update_bits(data->regmap, HMC5843_CONFIG_REG_A,
- HMC5843_RATE_MASK, rate << HMC5843_RATE_OFFSET);
+ HMC5843_RATE_MASK,
+ rate << HMC5843_RATE_OFFSET);
mutex_unlock(&data->lock);
return ret;
}
static int hmc5843_get_samp_freq_index(struct hmc5843_data *data,
- int val, int val2)
+ int val, int val2)
{
int i;
for (i = 0; i < data->variant->n_regval_to_samp_freq; i++)
if (val == data->variant->regval_to_samp_freq[i][0] &&
- val2 == data->variant->regval_to_samp_freq[i][1])
+ val2 == data->variant->regval_to_samp_freq[i][1])
return i;
return -EINVAL;
mutex_lock(&data->lock);
ret = regmap_update_bits(data->regmap, HMC5843_CONFIG_REG_B,
- HMC5843_RANGE_GAIN_MASK,
- range << HMC5843_RANGE_GAIN_OFFSET);
+ HMC5843_RANGE_GAIN_MASK,
+ range << HMC5843_RANGE_GAIN_OFFSET);
mutex_unlock(&data->lock);
return ret;
}
static ssize_t hmc5843_show_scale_avail(struct device *dev,
- struct device_attribute *attr, char *buf)
+ struct device_attribute *attr,
+ char *buf)
{
struct hmc5843_data *data = iio_priv(dev_to_iio_dev(dev));
}
static int hmc5843_write_raw_get_fmt(struct iio_dev *indio_dev,
- struct iio_chan_spec const *chan, long mask)
+ struct iio_chan_spec const *chan,
+ long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
}
ret = regmap_bulk_read(data->regmap, HMC5843_DATA_OUT_MSB_REGS,
- data->buffer, 3 * sizeof(__be16));
+ data->buffer, 3 * sizeof(__be16));
mutex_unlock(&data->lock);
if (ret < 0)
goto done;
iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
- iio_get_time_ns());
+ iio_get_time_ns());
done:
iio_trigger_notify_done(indio_dev->trig);
u8 id[3];
ret = regmap_bulk_read(data->regmap, HMC5843_ID_REG,
- id, ARRAY_SIZE(id));
+ id, ARRAY_SIZE(id));
if (ret < 0)
return ret;
if (id[0] != 'H' || id[1] != '4' || id[2] != '3') {
static const unsigned long hmc5843_scan_masks[] = {0x7, 0};
-
int hmc5843_common_suspend(struct device *dev)
{
return hmc5843_set_mode(iio_priv(dev_get_drvdata(dev)),
int hmc5843_common_resume(struct device *dev)
{
return hmc5843_set_mode(iio_priv(dev_get_drvdata(dev)),
- HMC5843_MODE_SLEEP);
+ HMC5843_MODE_SLEEP);
}
EXPORT_SYMBOL(hmc5843_common_resume);
int hmc5843_common_probe(struct device *dev, struct regmap *regmap,
- enum hmc5843_ids id)
+ enum hmc5843_ids id)
{
struct hmc5843_data *data;
struct iio_dev *indio_dev;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
- if (indio_dev == NULL)
+ if (!indio_dev)
return -ENOMEM;
dev_set_drvdata(dev, indio_dev);
return ret;
ret = iio_triggered_buffer_setup(indio_dev, NULL,
- hmc5843_trigger_handler, NULL);
+ hmc5843_trigger_handler, NULL);
if (ret < 0)
- return ret;
+ goto buffer_setup_err;
ret = iio_device_register(indio_dev);
if (ret < 0)
buffer_cleanup:
iio_triggered_buffer_cleanup(indio_dev);
+buffer_setup_err:
+ hmc5843_set_mode(iio_priv(indio_dev), HMC5843_MODE_SLEEP);
return ret;
}
EXPORT_SYMBOL(hmc5843_common_probe);
#include "hmc5843.h"
static const struct regmap_range hmc5843_readable_ranges[] = {
- regmap_reg_range(0, HMC5843_ID_END),
+ regmap_reg_range(0, HMC5843_ID_END),
};
-static struct regmap_access_table hmc5843_readable_table = {
- .yes_ranges = hmc5843_readable_ranges,
- .n_yes_ranges = ARRAY_SIZE(hmc5843_readable_ranges),
+static const struct regmap_access_table hmc5843_readable_table = {
+ .yes_ranges = hmc5843_readable_ranges,
+ .n_yes_ranges = ARRAY_SIZE(hmc5843_readable_ranges),
};
static const struct regmap_range hmc5843_writable_ranges[] = {
- regmap_reg_range(0, HMC5843_MODE_REG),
+ regmap_reg_range(0, HMC5843_MODE_REG),
};
-static struct regmap_access_table hmc5843_writable_table = {
- .yes_ranges = hmc5843_writable_ranges,
- .n_yes_ranges = ARRAY_SIZE(hmc5843_writable_ranges),
+static const struct regmap_access_table hmc5843_writable_table = {
+ .yes_ranges = hmc5843_writable_ranges,
+ .n_yes_ranges = ARRAY_SIZE(hmc5843_writable_ranges),
};
static const struct regmap_range hmc5843_volatile_ranges[] = {
- regmap_reg_range(HMC5843_DATA_OUT_MSB_REGS, HMC5843_STATUS_REG),
+ regmap_reg_range(HMC5843_DATA_OUT_MSB_REGS, HMC5843_STATUS_REG),
};
-static struct regmap_access_table hmc5843_volatile_table = {
- .yes_ranges = hmc5843_volatile_ranges,
- .n_yes_ranges = ARRAY_SIZE(hmc5843_volatile_ranges),
+static const struct regmap_access_table hmc5843_volatile_table = {
+ .yes_ranges = hmc5843_volatile_ranges,
+ .n_yes_ranges = ARRAY_SIZE(hmc5843_volatile_ranges),
};
-static struct regmap_config hmc5843_i2c_regmap_config = {
- .reg_bits = 8,
- .val_bits = 8,
+static const struct regmap_config hmc5843_i2c_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
- .rd_table = &hmc5843_readable_table,
- .wr_table = &hmc5843_writable_table,
- .volatile_table = &hmc5843_volatile_table,
+ .rd_table = &hmc5843_readable_table,
+ .wr_table = &hmc5843_writable_table,
+ .volatile_table = &hmc5843_volatile_table,
- .cache_type = REGCACHE_RBTREE,
+ .cache_type = REGCACHE_RBTREE,
};
-static int hmc5843_i2c_probe(struct i2c_client *client,
- const struct i2c_device_id *id)
+static int hmc5843_i2c_probe(struct i2c_client *cli,
+ const struct i2c_device_id *id)
{
- return hmc5843_common_probe(&client->dev,
- devm_regmap_init_i2c(client, &hmc5843_i2c_regmap_config),
+ return hmc5843_common_probe(&cli->dev,
+ devm_regmap_init_i2c(cli, &hmc5843_i2c_regmap_config),
id->driver_data);
}
regmap_reg_range(0, HMC5843_ID_END),
};
-static struct regmap_access_table hmc5843_readable_table = {
+static const struct regmap_access_table hmc5843_readable_table = {
.yes_ranges = hmc5843_readable_ranges,
.n_yes_ranges = ARRAY_SIZE(hmc5843_readable_ranges),
};
regmap_reg_range(0, HMC5843_MODE_REG),
};
-static struct regmap_access_table hmc5843_writable_table = {
+static const struct regmap_access_table hmc5843_writable_table = {
.yes_ranges = hmc5843_writable_ranges,
.n_yes_ranges = ARRAY_SIZE(hmc5843_writable_ranges),
};
regmap_reg_range(HMC5843_DATA_OUT_MSB_REGS, HMC5843_STATUS_REG),
};
-static struct regmap_access_table hmc5843_volatile_table = {
+static const struct regmap_access_table hmc5843_volatile_table = {
.yes_ranges = hmc5843_volatile_ranges,
.n_yes_ranges = ARRAY_SIZE(hmc5843_volatile_ranges),
};
-static struct regmap_config hmc5843_spi_regmap_config = {
+static const struct regmap_config hmc5843_spi_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
mutex_lock(&indio_dev->mlock);
- t = (27900 / val);
+ t = 27900 / val;
if (t > 0)
t--;
if (ret)
return ret;
- ret = iio_device_register(indio_dev);
- if (ret)
- return ret;
-
- return 0;
+ return iio_device_register(indio_dev);
}
/* fixme, confirm ordering in this function */
static int ade7754_reset(struct device *dev)
{
+ int ret;
u8 val;
- ade7754_spi_read_reg_8(dev, ADE7754_OPMODE, &val);
+ ret = ade7754_spi_read_reg_8(dev, ADE7754_OPMODE, &val);
+ if (ret < 0)
+ return ret;
+
val |= 1 << 6; /* Software Chip Reset */
return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
}
/* Power down the device */
static int ade7754_stop_device(struct device *dev)
{
+ int ret;
u8 val;
- ade7754_spi_read_reg_8(dev, ADE7754_OPMODE, &val);
+ ret = ade7754_spi_read_reg_8(dev, ADE7754_OPMODE, &val);
+ if (ret < 0) {
+ dev_err(dev, "unable to power down the device, error: %d",
+ ret);
+ return ret;
+ }
+
val |= 7 << 3; /* ADE7754 powered down */
return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
}
mutex_lock(&indio_dev->mlock);
- t = (26000 / val);
+ t = 26000 / val;
if (t > 0)
t--;
/* Get the device into a sane initial state */
ret = ade7754_initial_setup(indio_dev);
if (ret)
- return ret;
+ goto powerdown_on_error;
ret = iio_device_register(indio_dev);
if (ret)
- return ret;
+ goto powerdown_on_error;
+ return ret;
- return 0;
+powerdown_on_error:
+ ade7754_stop_device(&indio_dev->dev);
+ return ret;
}
/* fixme, confirm ordering in this function */
int ret;
u8 val;
- ade7758_spi_read_reg_8(dev,
- ADE7758_OPMODE,
- &val);
+ ret = ade7758_spi_read_reg_8(dev, ADE7758_OPMODE, &val);
+ if (ret < 0) {
+ dev_err(dev, "Failed to read opmode reg\n");
+ return ret;
+ }
val |= 1 << 6; /* Software Chip Reset */
- ret = ade7758_spi_write_reg_8(dev,
- ADE7758_OPMODE,
- val);
-
+ ret = ade7758_spi_write_reg_8(dev, ADE7758_OPMODE, val);
+ if (ret < 0)
+ dev_err(dev, "Failed to write opmode reg\n");
return ret;
}
int ret;
u8 val;
- ade7758_spi_read_reg_8(dev,
- ADE7758_OPMODE,
- &val);
+ ret = ade7758_spi_read_reg_8(dev, ADE7758_OPMODE, &val);
+ if (ret < 0) {
+ dev_err(dev, "Failed to read opmode reg\n");
+ return ret;
+ }
val |= 7 << 3; /* ADE7758 powered down */
- ret = ade7758_spi_write_reg_8(dev,
- ADE7758_OPMODE,
- val);
-
+ ret = ade7758_spi_write_reg_8(dev, ADE7758_OPMODE, val);
+ if (ret < 0)
+ dev_err(dev, "Failed to write opmode reg\n");
return ret;
}
struct device_attribute *attr,
char *buf)
{
- int ret, len = 0;
+ int ret;
u8 t;
int sps;
t = (t >> 5) & 0x3;
sps = 26040 / (1 << t);
- len = sprintf(buf, "%d SPS\n", sps);
- return len;
+ return sprintf(buf, "%d SPS\n", sps);
}
static ssize_t ade7758_write_frequency(struct device *dev,
if (!st->rx)
return -ENOMEM;
st->tx = kcalloc(ADE7758_MAX_TX, sizeof(*st->tx), GFP_KERNEL);
- if (st->tx == NULL) {
+ if (!st->tx) {
ret = -ENOMEM;
goto error_free_rx;
}
int ret = 0;
buffer = iio_kfifo_allocate();
- if (!buffer) {
- ret = -ENOMEM;
- return ret;
- }
+ if (!buffer)
+ return -ENOMEM;
iio_device_attach_buffer(indio_dev, buffer);
indio_dev,
"ade7759_consumer%d",
indio_dev->id);
- if (indio_dev->pollfunc == NULL) {
+ if (!indio_dev->pollfunc) {
ret = -ENOMEM;
goto error_iio_kfifo_free;
}
st->trig = iio_trigger_alloc("%s-dev%d",
spi_get_device_id(st->us)->name,
indio_dev->id);
- if (st->trig == NULL) {
+ if (!st->trig) {
ret = -ENOMEM;
goto error_ret;
}
int ret;
u16 val;
- ade7759_spi_read_reg_16(dev,
+ ret = ade7759_spi_read_reg_16(dev,
ADE7759_MODE,
&val);
+ if (ret < 0)
+ return ret;
+
val |= 1 << 6; /* Software Chip Reset */
- ret = ade7759_spi_write_reg_16(dev,
+ return ade7759_spi_write_reg_16(dev,
ADE7759_MODE,
val);
-
- return ret;
}
static IIO_DEV_ATTR_AENERGY(ade7759_read_40bit, ADE7759_AENERGY);
/* Power down the device */
static int ade7759_stop_device(struct device *dev)
{
+ int ret;
u16 val;
- ade7759_spi_read_reg_16(dev,
+ ret = ade7759_spi_read_reg_16(dev,
ADE7759_MODE,
&val);
+ if (ret < 0) {
+ dev_err(dev, "unable to power down the device, error: %d\n",
+ ret);
+ return ret;
+ }
+
val |= 1 << 4; /* AD converters can be turned off */
return ade7759_spi_write_reg_16(dev, ADE7759_MODE, val);
mutex_lock(&indio_dev->mlock);
- t = (27900 / val);
+ t = 27900 / val;
if (t > 0)
t--;
if (ret)
return ret;
- ret = iio_device_register(indio_dev);
- if (ret)
- return ret;
-
- return 0;
+ return iio_device_register(indio_dev);
}
/* fixme, confirm ordering in this function */
#include "ade7854.h"
static int ade7854_i2c_write_reg_8(struct device *dev,
- u16 reg_address,
- u8 value)
+ u16 reg_address,
+ u8 value)
{
int ret;
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
}
static int ade7854_i2c_write_reg_16(struct device *dev,
- u16 reg_address,
- u16 value)
+ u16 reg_address,
+ u16 value)
{
int ret;
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
}
static int ade7854_i2c_write_reg_24(struct device *dev,
- u16 reg_address,
- u32 value)
+ u16 reg_address,
+ u32 value)
{
int ret;
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
}
static int ade7854_i2c_write_reg_32(struct device *dev,
- u16 reg_address,
- u32 value)
+ u16 reg_address,
+ u32 value)
{
int ret;
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
}
static int ade7854_i2c_read_reg_8(struct device *dev,
- u16 reg_address,
- u8 *val)
+ u16 reg_address,
+ u8 *val)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ade7854_state *st = iio_priv(indio_dev);
}
static int ade7854_i2c_read_reg_16(struct device *dev,
- u16 reg_address,
- u16 *val)
+ u16 reg_address,
+ u16 *val)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ade7854_state *st = iio_priv(indio_dev);
}
static int ade7854_i2c_read_reg_24(struct device *dev,
- u16 reg_address,
- u32 *val)
+ u16 reg_address,
+ u32 *val)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ade7854_state *st = iio_priv(indio_dev);
}
static int ade7854_i2c_read_reg_32(struct device *dev,
- u16 reg_address,
- u32 *val)
+ u16 reg_address,
+ u32 *val)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ade7854_state *st = iio_priv(indio_dev);
if (ret)
goto out;
- *val = (st->rx[0] << 24) | (st->rx[1] << 16) | (st->rx[2] << 8) | st->rx[3];
+ *val = (st->rx[0] << 24) | (st->rx[1] << 16) |
+ (st->rx[2] << 8) | st->rx[3];
out:
mutex_unlock(&st->buf_lock);
return ret;
}
static int ade7854_i2c_probe(struct i2c_client *client,
- const struct i2c_device_id *id)
+ const struct i2c_device_id *id)
{
- int ret;
struct ade7854_state *st;
struct iio_dev *indio_dev;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
- if (indio_dev == NULL)
+ if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
st->i2c = client;
st->irq = client->irq;
- ret = ade7854_probe(indio_dev, &client->dev);
-
- return ret;
+ return ade7854_probe(indio_dev, &client->dev);
}
static int ade7854_i2c_remove(struct i2c_client *client)
static int ade7854_spi_probe(struct spi_device *spi)
{
- int ret;
struct ade7854_state *st;
struct iio_dev *indio_dev;
st->irq = spi->irq;
st->spi = spi;
-
- ret = ade7854_probe(indio_dev, &spi->dev);
-
- return ret;
+ return ade7854_probe(indio_dev, &spi->dev);
}
static int ade7854_spi_remove(struct spi_device *spi)
+#ifndef _METER_H
+#define _METER_H
+
#include <linux/iio/sysfs.h>
/* metering ic types of attribute */
#define IIO_EVENT_ATTR_VPKLVL_EXC(_evlist, _show, _store, _mask) \
IIO_EVENT_ATTR_SH(vpklvl_exc, _evlist, _show, _store, _mask)
+#endif /* _METER_H */
fcw = (unsigned char)(st->fexcit * (1 << 15) / st->fclkin);
if (fcw < AD2S1210_MIN_FCW || fcw > AD2S1210_MAX_FCW) {
- pr_err("ad2s1210: FCW out of range\n");
+ dev_err(&st->sdev->dev, "ad2s1210: FCW out of range\n");
return -ERANGE;
}
{
struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
- return sprintf(buf, "%d\n", st->fclkin);
+ return sprintf(buf, "%u\n", st->fclkin);
}
static ssize_t ad2s1210_store_fclkin(struct device *dev,
if (ret)
return ret;
if (fclkin < AD2S1210_MIN_CLKIN || fclkin > AD2S1210_MAX_CLKIN) {
- pr_err("ad2s1210: fclkin out of range\n");
+ dev_err(dev, "ad2s1210: fclkin out of range\n");
return -EINVAL;
}
{
struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
- return sprintf(buf, "%d\n", st->fexcit);
+ return sprintf(buf, "%u\n", st->fexcit);
}
static ssize_t ad2s1210_store_fexcit(struct device *dev,
if (ret < 0)
return ret;
if (fexcit < AD2S1210_MIN_EXCIT || fexcit > AD2S1210_MAX_EXCIT) {
- pr_err("ad2s1210: excitation frequency out of range\n");
+ dev_err(dev,
+ "ad2s1210: excitation frequency out of range\n");
return -EINVAL;
}
mutex_lock(&st->lock);
goto error_ret;
if (ret & AD2S1210_MSB_IS_HIGH) {
ret = -EIO;
- pr_err("ad2s1210: write control register fail\n");
+ dev_err(dev,
+ "ad2s1210: write control register fail\n");
goto error_ret;
}
st->resolution
if (st->pdata->gpioin) {
data = ad2s1210_read_resolution_pin(st);
if (data != st->resolution)
- pr_warn("ad2s1210: resolution settings not match\n");
+ dev_warn(dev, "ad2s1210: resolution settings not match\n");
} else
ad2s1210_set_resolution_pin(st);
ret = kstrtou8(buf, 10, &udata);
if (ret || udata < 10 || udata > 16) {
- pr_err("ad2s1210: resolution out of range\n");
+ dev_err(dev, "ad2s1210: resolution out of range\n");
return -EINVAL;
}
mutex_lock(&st->lock);
data = ret;
if (data & AD2S1210_MSB_IS_HIGH) {
ret = -EIO;
- pr_err("ad2s1210: setting resolution fail\n");
+ dev_err(dev, "ad2s1210: setting resolution fail\n");
goto error_ret;
}
st->resolution
if (st->pdata->gpioin) {
data = ad2s1210_read_resolution_pin(st);
if (data != st->resolution)
- pr_warn("ad2s1210: resolution settings not match\n");
+ dev_warn(dev, "ad2s1210: resolution settings not match\n");
} else
ad2s1210_set_resolution_pin(st);
ret = len;
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
+#ifndef _AD2S1210_H
+#define _AD2S1210_H
struct ad2s1210_platform_data {
unsigned sample;
unsigned res[2];
bool gpioin;
};
+#endif /* _AD2S1210_H */
int ret;
st = devm_kzalloc(&pdev->dev, sizeof(*st), GFP_KERNEL);
- if (st == NULL)
+ if (!st)
return -ENOMEM;
st->irq = platform_get_irq(pdev, 0);
struct iio_prtc_trigger_info {
struct rtc_device *rtc;
- int frequency;
+ unsigned int frequency;
struct rtc_task task;
bool state;
};
if (trig_info->frequency == 0 && state)
return -EINVAL;
- dev_dbg(&trig_info->rtc->dev, "trigger frequency is %d\n",
+ dev_dbg(&trig_info->rtc->dev, "trigger frequency is %u\n",
trig_info->frequency);
ret = rtc_irq_set_state(trig_info->rtc, &trig_info->task, state);
if (ret == 0)
{
struct iio_trigger *trig = to_iio_trigger(dev);
struct iio_prtc_trigger_info *trig_info = iio_trigger_get_drvdata(trig);
- int val;
+ unsigned int val;
int ret;
- ret = kstrtoint(buf, 10, &val);
+ ret = kstrtouint(buf, 10, &val);
if (ret)
goto error_ret;
if (ret == 0 && trig_info->state && trig_info->frequency == 0)
ret = rtc_irq_set_state(trig_info->rtc,
&trig_info->task, 1);
- } else if (val == 0) {
- ret = rtc_irq_set_state(trig_info->rtc, &trig_info->task, 0);
} else
- ret = -EINVAL;
+ ret = rtc_irq_set_state(trig_info->rtc, &trig_info->task, 0);
if (ret)
goto error_ret;
int i, ret;
for (i = 0;; i++) {
- if (pdata[i] == NULL)
+ if (!pdata[i])
break;
trig = iio_trigger_alloc("periodic%s", pdata[i]);
if (!trig) {
trig->ops = &iio_prtc_trigger_ops;
/* RTC access */
trig_info->rtc = rtc_class_open(pdata[i]);
- if (trig_info->rtc == NULL) {
+ if (!trig_info->rtc) {
ret = -EINVAL;
goto error_free_trig_info;
}
.msg_fn = __func__, \
.msg_line = __LINE__, \
.msg_cdls = (cdls) }; \
- dataname.msg_mask = (mask);
+ dataname.msg_mask = (mask)
/**
* Filters out logging messages based on mask and subsystem.
int libcfs_debug_msg(struct libcfs_debug_msg_data *msgdata,
const char *format1, ...)
- __attribute__ ((format (printf, 2, 3)));
+ __printf(2, 3);
int libcfs_debug_vmsg2(struct libcfs_debug_msg_data *msgdata,
const char *format1,
va_list args, const char *format2, ...)
- __attribute__ ((format (printf, 4, 5)));
+ __printf(4, 5);
/* other external symbols that tracefile provides: */
int cfs_trace_copyin_string(char *knl_buffer, int knl_buffer_nob,
static inline void
cfs_hash_keycpy(struct cfs_hash *hs, struct hlist_node *hnode, void *key)
{
- if (hs->hs_ops->hs_keycpy)
+ if (hs->hs_ops->hs_keycpy)
hs->hs_ops->hs_keycpy(hnode, key);
}
/* Generic debug formatting routines mainly for proc handler */
struct seq_file;
-int cfs_hash_debug_header(struct seq_file *m);
-int cfs_hash_debug_str(struct cfs_hash *hs, struct seq_file *m);
+void cfs_hash_debug_header(struct seq_file *m);
+void cfs_hash_debug_str(struct cfs_hash *hs, struct seq_file *m);
/*
* Generic djb2 hash algorithm for character arrays.
__u8 kuc_flags;
__u16 kuc_msgtype; /* Message type or opcode, transport-specific */
__u16 kuc_msglen; /* Including header */
-} __attribute__((aligned(sizeof(__u64))));
+} __aligned(sizeof(__u64));
#define KUC_CHANGELOG_MSG_MAXSIZE (sizeof(struct kuc_hdr)+CR_MAXSIZE)
__u32 lk_group;
__u32 lk_data;
__u32 lk_flags;
-} __attribute__((packed)) lustre_kernelcomm;
+} __packed lustre_kernelcomm;
/* Userspace methods */
int libcfs_ukuc_start(lustre_kernelcomm *l, int groups);
#define LASSERT_ATOMIC_ZERO(a) LASSERT_ATOMIC_EQ(a, 0)
#define LASSERT_ATOMIC_POS(a) LASSERT_ATOMIC_GT(a, 0)
-#define CFS_ALLOC_PTR(ptr) LIBCFS_ALLOC(ptr, sizeof(*(ptr)));
-#define CFS_FREE_PTR(ptr) LIBCFS_FREE(ptr, sizeof(*(ptr)));
+#define CFS_ALLOC_PTR(ptr) LIBCFS_ALLOC(ptr, sizeof(*(ptr)))
+#define CFS_FREE_PTR(ptr) LIBCFS_FREE(ptr, sizeof(*(ptr)))
/*
* percpu partition lock
kib_data_t kiblnd_data;
-static __u32
-kiblnd_cksum(void *ptr, int nob)
+static __u32 kiblnd_cksum(void *ptr, int nob)
{
char *c = ptr;
__u32 sum = 0;
return (sum == 0) ? 1 : sum;
}
-static char *
-kiblnd_msgtype2str(int type)
+static char *kiblnd_msgtype2str(int type)
{
switch (type) {
case IBLND_MSG_CONNREQ:
}
}
-static int
-kiblnd_msgtype2size(int type)
+static int kiblnd_msgtype2size(int type)
{
const int hdr_size = offsetof(kib_msg_t, ibm_u);
}
}
-static int
-kiblnd_unpack_rd(kib_msg_t *msg, int flip)
+static int kiblnd_unpack_rd(kib_msg_t *msg, int flip)
{
kib_rdma_desc_t *rd;
int nob;
int n;
int i;
- LASSERT (msg->ibm_type == IBLND_MSG_GET_REQ ||
+ LASSERT(msg->ibm_type == IBLND_MSG_GET_REQ ||
msg->ibm_type == IBLND_MSG_PUT_ACK);
rd = msg->ibm_type == IBLND_MSG_GET_REQ ?
return 1;
}
- nob = offsetof (kib_msg_t, ibm_u) +
+ nob = offsetof(kib_msg_t, ibm_u) +
kiblnd_rd_msg_size(rd, msg->ibm_type, n);
if (msg->ibm_nob < nob) {
return 0;
}
-void
-kiblnd_pack_msg (lnet_ni_t *ni, kib_msg_t *msg, int version,
- int credits, lnet_nid_t dstnid, __u64 dststamp)
+void kiblnd_pack_msg(lnet_ni_t *ni, kib_msg_t *msg, int version,
+ int credits, lnet_nid_t dstnid, __u64 dststamp)
{
kib_net_t *net = ni->ni_data;
}
}
-int
-kiblnd_unpack_msg(kib_msg_t *msg, int nob)
+int kiblnd_unpack_msg(kib_msg_t *msg, int nob)
{
const int hdr_size = offsetof(kib_msg_t, ibm_u);
__u32 msg_cksum;
if (flip) {
/* leave magic unflipped as a clue to peer endianness */
msg->ibm_version = version;
- CLASSERT (sizeof(msg->ibm_type) == 1);
- CLASSERT (sizeof(msg->ibm_credits) == 1);
+ CLASSERT(sizeof(msg->ibm_type) == 1);
+ CLASSERT(sizeof(msg->ibm_credits) == 1);
msg->ibm_nob = msg_nob;
__swab64s(&msg->ibm_srcnid);
__swab64s(&msg->ibm_srcstamp);
return 0;
}
-int
-kiblnd_create_peer(lnet_ni_t *ni, kib_peer_t **peerp, lnet_nid_t nid)
+int kiblnd_create_peer(lnet_ni_t *ni, kib_peer_t **peerp, lnet_nid_t nid)
{
kib_peer_t *peer;
kib_net_t *net = ni->ni_data;
write_lock_irqsave(&kiblnd_data.kib_global_lock, flags);
/* always called with a ref on ni, which prevents ni being shutdown */
- LASSERT (net->ibn_shutdown == 0);
+ LASSERT(net->ibn_shutdown == 0);
/* npeers only grows with the global lock held */
atomic_inc(&net->ibn_npeers);
return 0;
}
-void
-kiblnd_destroy_peer (kib_peer_t *peer)
+void kiblnd_destroy_peer(kib_peer_t *peer)
{
kib_net_t *net = peer->ibp_ni->ni_data;
- LASSERT (net != NULL);
- LASSERT (atomic_read(&peer->ibp_refcount) == 0);
- LASSERT (!kiblnd_peer_active(peer));
- LASSERT (peer->ibp_connecting == 0);
- LASSERT (peer->ibp_accepting == 0);
- LASSERT (list_empty(&peer->ibp_conns));
- LASSERT (list_empty(&peer->ibp_tx_queue));
+ LASSERT(net != NULL);
+ LASSERT(atomic_read(&peer->ibp_refcount) == 0);
+ LASSERT(!kiblnd_peer_active(peer));
+ LASSERT(peer->ibp_connecting == 0);
+ LASSERT(peer->ibp_accepting == 0);
+ LASSERT(list_empty(&peer->ibp_conns));
+ LASSERT(list_empty(&peer->ibp_tx_queue));
LIBCFS_FREE(peer, sizeof(*peer));
atomic_dec(&net->ibn_npeers);
}
-kib_peer_t *
-kiblnd_find_peer_locked (lnet_nid_t nid)
+kib_peer_t *kiblnd_find_peer_locked(lnet_nid_t nid)
{
/* the caller is responsible for accounting the additional reference
* that this creates */
struct list_head *tmp;
kib_peer_t *peer;
- list_for_each (tmp, peer_list) {
+ list_for_each(tmp, peer_list) {
peer = list_entry(tmp, kib_peer_t, ibp_list);
- LASSERT (peer->ibp_connecting > 0 || /* creating conns */
+ LASSERT(peer->ibp_connecting > 0 || /* creating conns */
peer->ibp_accepting > 0 ||
!list_empty(&peer->ibp_conns)); /* active conn */
return NULL;
}
-void
-kiblnd_unlink_peer_locked (kib_peer_t *peer)
+void kiblnd_unlink_peer_locked(kib_peer_t *peer)
{
- LASSERT (list_empty(&peer->ibp_conns));
+ LASSERT(list_empty(&peer->ibp_conns));
- LASSERT (kiblnd_peer_active(peer));
+ LASSERT(kiblnd_peer_active(peer));
list_del_init(&peer->ibp_list);
/* lose peerlist's ref */
kiblnd_peer_decref(peer);
}
-static int
-kiblnd_get_peer_info(lnet_ni_t *ni, int index,
- lnet_nid_t *nidp, int *count)
+static int kiblnd_get_peer_info(lnet_ni_t *ni, int index,
+ lnet_nid_t *nidp, int *count)
{
kib_peer_t *peer;
struct list_head *ptmp;
for (i = 0; i < kiblnd_data.kib_peer_hash_size; i++) {
- list_for_each (ptmp, &kiblnd_data.kib_peers[i]) {
+ list_for_each(ptmp, &kiblnd_data.kib_peers[i]) {
peer = list_entry(ptmp, kib_peer_t, ibp_list);
- LASSERT (peer->ibp_connecting > 0 ||
+ LASSERT(peer->ibp_connecting > 0 ||
peer->ibp_accepting > 0 ||
!list_empty(&peer->ibp_conns));
return -ENOENT;
}
-static void
-kiblnd_del_peer_locked(kib_peer_t *peer)
+static void kiblnd_del_peer_locked(kib_peer_t *peer)
{
struct list_head *ctmp;
struct list_head *cnxt;
if (list_empty(&peer->ibp_conns)) {
kiblnd_unlink_peer_locked(peer);
} else {
- list_for_each_safe (ctmp, cnxt, &peer->ibp_conns) {
+ list_for_each_safe(ctmp, cnxt, &peer->ibp_conns) {
conn = list_entry(ctmp, kib_conn_t, ibc_list);
kiblnd_close_conn_locked(conn, 0);
* last ref on it. */
}
-static int
-kiblnd_del_peer(lnet_ni_t *ni, lnet_nid_t nid)
+static int kiblnd_del_peer(lnet_ni_t *ni, lnet_nid_t nid)
{
- LIST_HEAD (zombies);
+ LIST_HEAD(zombies);
struct list_head *ptmp;
struct list_head *pnxt;
kib_peer_t *peer;
}
for (i = lo; i <= hi; i++) {
- list_for_each_safe (ptmp, pnxt, &kiblnd_data.kib_peers[i]) {
+ list_for_each_safe(ptmp, pnxt, &kiblnd_data.kib_peers[i]) {
peer = list_entry(ptmp, kib_peer_t, ibp_list);
- LASSERT (peer->ibp_connecting > 0 ||
+ LASSERT(peer->ibp_connecting > 0 ||
peer->ibp_accepting > 0 ||
!list_empty(&peer->ibp_conns));
continue;
if (!list_empty(&peer->ibp_tx_queue)) {
- LASSERT (list_empty(&peer->ibp_conns));
+ LASSERT(list_empty(&peer->ibp_conns));
list_splice_init(&peer->ibp_tx_queue,
&zombies);
return rc;
}
-static kib_conn_t *
-kiblnd_get_conn_by_idx(lnet_ni_t *ni, int index)
+static kib_conn_t *kiblnd_get_conn_by_idx(lnet_ni_t *ni, int index)
{
kib_peer_t *peer;
struct list_head *ptmp;
read_lock_irqsave(&kiblnd_data.kib_global_lock, flags);
for (i = 0; i < kiblnd_data.kib_peer_hash_size; i++) {
- list_for_each (ptmp, &kiblnd_data.kib_peers[i]) {
+ list_for_each(ptmp, &kiblnd_data.kib_peers[i]) {
peer = list_entry(ptmp, kib_peer_t, ibp_list);
- LASSERT (peer->ibp_connecting > 0 ||
+ LASSERT(peer->ibp_connecting > 0 ||
peer->ibp_accepting > 0 ||
!list_empty(&peer->ibp_conns));
if (peer->ibp_ni != ni)
continue;
- list_for_each (ctmp, &peer->ibp_conns) {
+ list_for_each(ctmp, &peer->ibp_conns) {
if (index-- > 0)
continue;
conn = list_entry(ctmp, kib_conn_t,
ibc_list);
kiblnd_conn_addref(conn);
- read_unlock_irqrestore(&kiblnd_data.kib_global_lock,
- flags);
+ read_unlock_irqrestore(
+ &kiblnd_data.kib_global_lock,
+ flags);
return conn;
}
}
return NULL;
}
-int
-kiblnd_translate_mtu(int value)
+int kiblnd_translate_mtu(int value)
{
switch (value) {
default:
}
}
-static void
-kiblnd_setup_mtu_locked(struct rdma_cm_id *cmid)
+static void kiblnd_setup_mtu_locked(struct rdma_cm_id *cmid)
{
int mtu;
return;
mtu = kiblnd_translate_mtu(*kiblnd_tunables.kib_ib_mtu);
- LASSERT (mtu >= 0);
+ LASSERT(mtu >= 0);
if (mtu != 0)
cmid->route.path_rec->mtu = mtu;
}
-static int
-kiblnd_get_completion_vector(kib_conn_t *conn, int cpt)
+static int kiblnd_get_completion_vector(kib_conn_t *conn, int cpt)
{
cpumask_t *mask;
int vectors;
return 0;
/* hash NID to CPU id in this partition... */
- off = do_div(nid, cpus_weight(*mask));
- for_each_cpu_mask(i, *mask) {
+ off = do_div(nid, cpumask_weight(mask));
+ for_each_cpu(i, mask) {
if (off-- == 0)
return i % vectors;
}
return 1;
}
-kib_conn_t *
-kiblnd_create_conn(kib_peer_t *peer, struct rdma_cm_id *cmid,
- int state, int version)
+kib_conn_t *kiblnd_create_conn(kib_peer_t *peer, struct rdma_cm_id *cmid,
+ int state, int version)
{
/* CAVEAT EMPTOR:
* If the new conn is created successfully it takes over the caller's
}
/* Init successful! */
- LASSERT (state == IBLND_CONN_ACTIVE_CONNECT ||
+ LASSERT(state == IBLND_CONN_ACTIVE_CONNECT ||
state == IBLND_CONN_PASSIVE_WAIT);
conn->ibc_state = state;
return NULL;
}
-void
-kiblnd_destroy_conn (kib_conn_t *conn)
+void kiblnd_destroy_conn(kib_conn_t *conn)
{
struct rdma_cm_id *cmid = conn->ibc_cmid;
kib_peer_t *peer = conn->ibc_peer;
int rc;
- LASSERT (!in_interrupt());
- LASSERT (atomic_read(&conn->ibc_refcount) == 0);
- LASSERT (list_empty(&conn->ibc_early_rxs));
- LASSERT (list_empty(&conn->ibc_tx_noops));
- LASSERT (list_empty(&conn->ibc_tx_queue));
- LASSERT (list_empty(&conn->ibc_tx_queue_rsrvd));
- LASSERT (list_empty(&conn->ibc_tx_queue_nocred));
- LASSERT (list_empty(&conn->ibc_active_txs));
- LASSERT (conn->ibc_noops_posted == 0);
- LASSERT (conn->ibc_nsends_posted == 0);
+ LASSERT(!in_interrupt());
+ LASSERT(atomic_read(&conn->ibc_refcount) == 0);
+ LASSERT(list_empty(&conn->ibc_early_rxs));
+ LASSERT(list_empty(&conn->ibc_tx_noops));
+ LASSERT(list_empty(&conn->ibc_tx_queue));
+ LASSERT(list_empty(&conn->ibc_tx_queue_rsrvd));
+ LASSERT(list_empty(&conn->ibc_tx_queue_nocred));
+ LASSERT(list_empty(&conn->ibc_active_txs));
+ LASSERT(conn->ibc_noops_posted == 0);
+ LASSERT(conn->ibc_nsends_posted == 0);
switch (conn->ibc_state) {
default:
case IBLND_CONN_DISCONNECTED:
/* connvars should have been freed already */
- LASSERT (conn->ibc_connvars == NULL);
+ LASSERT(conn->ibc_connvars == NULL);
break;
case IBLND_CONN_INIT:
if (conn->ibc_rxs != NULL) {
LIBCFS_FREE(conn->ibc_rxs,
- IBLND_RX_MSGS(conn->ibc_version) * sizeof(kib_rx_t));
+ IBLND_RX_MSGS(conn->ibc_version)
+ * sizeof(kib_rx_t));
}
if (conn->ibc_connvars != NULL)
LIBCFS_FREE(conn, sizeof(*conn));
}
-int
-kiblnd_close_peer_conns_locked (kib_peer_t *peer, int why)
+int kiblnd_close_peer_conns_locked(kib_peer_t *peer, int why)
{
kib_conn_t *conn;
struct list_head *ctmp;
struct list_head *cnxt;
int count = 0;
- list_for_each_safe (ctmp, cnxt, &peer->ibp_conns) {
+ list_for_each_safe(ctmp, cnxt, &peer->ibp_conns) {
conn = list_entry(ctmp, kib_conn_t, ibc_list);
CDEBUG(D_NET, "Closing conn -> %s, version: %x, reason: %d\n",
return count;
}
-int
-kiblnd_close_stale_conns_locked (kib_peer_t *peer,
- int version, __u64 incarnation)
+int kiblnd_close_stale_conns_locked(kib_peer_t *peer,
+ int version, __u64 incarnation)
{
kib_conn_t *conn;
struct list_head *ctmp;
struct list_head *cnxt;
int count = 0;
- list_for_each_safe (ctmp, cnxt, &peer->ibp_conns) {
+ list_for_each_safe(ctmp, cnxt, &peer->ibp_conns) {
conn = list_entry(ctmp, kib_conn_t, ibc_list);
if (conn->ibc_version == version &&
conn->ibc_incarnation == incarnation)
continue;
- CDEBUG(D_NET, "Closing stale conn -> %s version: %x, incarnation:%#llx(%x, %#llx)\n",
+ CDEBUG(D_NET,
+ "Closing stale conn -> %s version: %x, incarnation:%#llx(%x, %#llx)\n",
libcfs_nid2str(peer->ibp_nid),
conn->ibc_version, conn->ibc_incarnation,
version, incarnation);
return count;
}
-static int
-kiblnd_close_matching_conns(lnet_ni_t *ni, lnet_nid_t nid)
+static int kiblnd_close_matching_conns(lnet_ni_t *ni, lnet_nid_t nid)
{
kib_peer_t *peer;
struct list_head *ptmp;
}
for (i = lo; i <= hi; i++) {
- list_for_each_safe (ptmp, pnxt, &kiblnd_data.kib_peers[i]) {
+ list_for_each_safe(ptmp, pnxt, &kiblnd_data.kib_peers[i]) {
peer = list_entry(ptmp, kib_peer_t, ibp_list);
- LASSERT (peer->ibp_connecting > 0 ||
+ LASSERT(peer->ibp_connecting > 0 ||
peer->ibp_accepting > 0 ||
!list_empty(&peer->ibp_conns));
return (count == 0) ? -ENOENT : 0;
}
-int
-kiblnd_ctl(lnet_ni_t *ni, unsigned int cmd, void *arg)
+int kiblnd_ctl(lnet_ni_t *ni, unsigned int cmd, void *arg)
{
struct libcfs_ioctl_data *data = arg;
int rc = -EINVAL;
break;
}
- LASSERT (conn->ibc_cmid != NULL);
+ LASSERT(conn->ibc_cmid != NULL);
data->ioc_nid = conn->ibc_peer->ibp_nid;
if (conn->ibc_cmid->route.path_rec == NULL)
data->ioc_u32[0] = 0; /* iWarp has no path MTU */
return rc;
}
-void
-kiblnd_query (lnet_ni_t *ni, lnet_nid_t nid, unsigned long *when)
+void kiblnd_query(lnet_ni_t *ni, lnet_nid_t nid, unsigned long *when)
{
unsigned long last_alive = 0;
unsigned long now = cfs_time_current();
peer = kiblnd_find_peer_locked(nid);
if (peer != NULL) {
- LASSERT (peer->ibp_connecting > 0 || /* creating conns */
+ LASSERT(peer->ibp_connecting > 0 || /* creating conns */
peer->ibp_accepting > 0 ||
!list_empty(&peer->ibp_conns)); /* active conn */
last_alive = peer->ibp_last_alive;
CDEBUG(D_NET, "Peer %s %p, alive %ld secs ago\n",
libcfs_nid2str(nid), peer,
last_alive ? cfs_duration_sec(now - last_alive) : -1);
- return;
}
-void
-kiblnd_free_pages(kib_pages_t *p)
+void kiblnd_free_pages(kib_pages_t *p)
{
int npages = p->ibp_npages;
int i;
LIBCFS_FREE(p, offsetof(kib_pages_t, ibp_pages[npages]));
}
-int
-kiblnd_alloc_pages(kib_pages_t **pp, int cpt, int npages)
+int kiblnd_alloc_pages(kib_pages_t **pp, int cpt, int npages)
{
kib_pages_t *p;
int i;
return 0;
}
-void
-kiblnd_unmap_rx_descs(kib_conn_t *conn)
+void kiblnd_unmap_rx_descs(kib_conn_t *conn)
{
kib_rx_t *rx;
int i;
- LASSERT (conn->ibc_rxs != NULL);
- LASSERT (conn->ibc_hdev != NULL);
+ LASSERT(conn->ibc_rxs != NULL);
+ LASSERT(conn->ibc_hdev != NULL);
for (i = 0; i < IBLND_RX_MSGS(conn->ibc_version); i++) {
rx = &conn->ibc_rxs[i];
- LASSERT (rx->rx_nob >= 0); /* not posted */
+ LASSERT(rx->rx_nob >= 0); /* not posted */
kiblnd_dma_unmap_single(conn->ibc_hdev->ibh_ibdev,
KIBLND_UNMAP_ADDR(rx, rx_msgunmap,
conn->ibc_rx_pages = NULL;
}
-void
-kiblnd_map_rx_descs(kib_conn_t *conn)
+void kiblnd_map_rx_descs(kib_conn_t *conn)
{
kib_rx_t *rx;
struct page *pg;
rx->rx_msg = (kib_msg_t *)(((char *)page_address(pg)) + pg_off);
rx->rx_msgaddr = kiblnd_dma_map_single(conn->ibc_hdev->ibh_ibdev,
- rx->rx_msg, IBLND_MSG_SIZE,
+ rx->rx_msg,
+ IBLND_MSG_SIZE,
DMA_FROM_DEVICE);
- LASSERT (!kiblnd_dma_mapping_error(conn->ibc_hdev->ibh_ibdev,
+ LASSERT(!kiblnd_dma_mapping_error(conn->ibc_hdev->ibh_ibdev,
rx->rx_msgaddr));
KIBLND_UNMAP_ADDR_SET(rx, rx_msgunmap, rx->rx_msgaddr);
lnet_page2phys(pg) + pg_off);
pg_off += IBLND_MSG_SIZE;
- LASSERT (pg_off <= PAGE_SIZE);
+ LASSERT(pg_off <= PAGE_SIZE);
if (pg_off == PAGE_SIZE) {
pg_off = 0;
ipg++;
- LASSERT (ipg <= IBLND_RX_MSG_PAGES(conn->ibc_version));
+ LASSERT(ipg <= IBLND_RX_MSG_PAGES(conn->ibc_version));
}
}
}
-static void
-kiblnd_unmap_tx_pool(kib_tx_pool_t *tpo)
+static void kiblnd_unmap_tx_pool(kib_tx_pool_t *tpo)
{
kib_hca_dev_t *hdev = tpo->tpo_hdev;
kib_tx_t *tx;
int i;
- LASSERT (tpo->tpo_pool.po_allocated == 0);
+ LASSERT(tpo->tpo_pool.po_allocated == 0);
if (hdev == NULL)
return;
tpo->tpo_hdev = NULL;
}
-static kib_hca_dev_t *
-kiblnd_current_hdev(kib_dev_t *dev)
+static kib_hca_dev_t *kiblnd_current_hdev(kib_dev_t *dev)
{
kib_hca_dev_t *hdev;
unsigned long flags;
return hdev;
}
-static void
-kiblnd_map_tx_pool(kib_tx_pool_t *tpo)
+static void kiblnd_map_tx_pool(kib_tx_pool_t *tpo)
{
kib_pages_t *txpgs = tpo->tpo_tx_pages;
kib_pool_t *pool = &tpo->tpo_pool;
int ipage;
int i;
- LASSERT (net != NULL);
+ LASSERT(net != NULL);
dev = net->ibn_dev;
/* pre-mapped messages are not bigger than 1 page */
- CLASSERT (IBLND_MSG_SIZE <= PAGE_SIZE);
+ CLASSERT(IBLND_MSG_SIZE <= PAGE_SIZE);
/* No fancy arithmetic when we do the buffer calculations */
- CLASSERT (PAGE_SIZE % IBLND_MSG_SIZE == 0);
+ CLASSERT(PAGE_SIZE % IBLND_MSG_SIZE == 0);
tpo->tpo_hdev = kiblnd_current_hdev(dev);
tx->tx_msgaddr = kiblnd_dma_map_single(
tpo->tpo_hdev->ibh_ibdev, tx->tx_msg,
IBLND_MSG_SIZE, DMA_TO_DEVICE);
- LASSERT (!kiblnd_dma_mapping_error(tpo->tpo_hdev->ibh_ibdev,
+ LASSERT(!kiblnd_dma_mapping_error(tpo->tpo_hdev->ibh_ibdev,
tx->tx_msgaddr));
KIBLND_UNMAP_ADDR_SET(tx, tx_msgunmap, tx->tx_msgaddr);
list_add(&tx->tx_list, &pool->po_free_list);
page_offset += IBLND_MSG_SIZE;
- LASSERT (page_offset <= PAGE_SIZE);
+ LASSERT(page_offset <= PAGE_SIZE);
if (page_offset == PAGE_SIZE) {
page_offset = 0;
ipage++;
- LASSERT (ipage <= txpgs->ibp_npages);
+ LASSERT(ipage <= txpgs->ibp_npages);
}
}
}
-struct ib_mr *
-kiblnd_find_dma_mr(kib_hca_dev_t *hdev, __u64 addr, __u64 size)
+struct ib_mr *kiblnd_find_dma_mr(kib_hca_dev_t *hdev, __u64 addr, __u64 size)
{
__u64 index;
- LASSERT (hdev->ibh_mrs[0] != NULL);
+ LASSERT(hdev->ibh_mrs[0] != NULL);
if (hdev->ibh_nmrs == 1)
return hdev->ibh_mrs[0];
return NULL;
}
-struct ib_mr *
-kiblnd_find_rd_dma_mr(kib_hca_dev_t *hdev, kib_rdma_desc_t *rd)
+struct ib_mr *kiblnd_find_rd_dma_mr(kib_hca_dev_t *hdev, kib_rdma_desc_t *rd)
{
struct ib_mr *prev_mr;
struct ib_mr *mr;
int i;
- LASSERT (hdev->ibh_mrs[0] != NULL);
+ LASSERT(hdev->ibh_mrs[0] != NULL);
if (*kiblnd_tunables.kib_map_on_demand > 0 &&
*kiblnd_tunables.kib_map_on_demand <= rd->rd_nfrags)
return mr;
}
-static void
-kiblnd_destroy_fmr_pool(kib_fmr_pool_t *pool)
+static void kiblnd_destroy_fmr_pool(kib_fmr_pool_t *pool)
{
- LASSERT (pool->fpo_map_count == 0);
+ LASSERT(pool->fpo_map_count == 0);
if (pool->fpo_fmr_pool != NULL)
ib_destroy_fmr_pool(pool->fpo_fmr_pool);
LIBCFS_FREE(pool, sizeof(kib_fmr_pool_t));
}
-static void
-kiblnd_destroy_fmr_pool_list(struct list_head *head)
+static void kiblnd_destroy_fmr_pool_list(struct list_head *head)
{
kib_fmr_pool_t *pool;
return max(IBLND_FMR_POOL_FLUSH, size);
}
-static int
-kiblnd_create_fmr_pool(kib_fmr_poolset_t *fps, kib_fmr_pool_t **pp_fpo)
+static int kiblnd_create_fmr_pool(kib_fmr_poolset_t *fps,
+ kib_fmr_pool_t **pp_fpo)
{
/* FMR pool for RDMA */
kib_dev_t *dev = fps->fps_net->ibn_dev;
return 0;
}
-static void
-kiblnd_fail_fmr_poolset(kib_fmr_poolset_t *fps, struct list_head *zombies)
+static void kiblnd_fail_fmr_poolset(kib_fmr_poolset_t *fps,
+ struct list_head *zombies)
{
if (fps->fps_net == NULL) /* intialized? */
return;
spin_unlock(&fps->fps_lock);
}
-static void
-kiblnd_fini_fmr_poolset(kib_fmr_poolset_t *fps)
+static void kiblnd_fini_fmr_poolset(kib_fmr_poolset_t *fps)
{
if (fps->fps_net != NULL) { /* initialized? */
kiblnd_destroy_fmr_pool_list(&fps->fps_failed_pool_list);
}
}
-static int
-kiblnd_init_fmr_poolset(kib_fmr_poolset_t *fps, int cpt, kib_net_t *net,
- int pool_size, int flush_trigger)
+static int kiblnd_init_fmr_poolset(kib_fmr_poolset_t *fps, int cpt,
+ kib_net_t *net, int pool_size,
+ int flush_trigger)
{
kib_fmr_pool_t *fpo;
int rc;
return rc;
}
-static int
-kiblnd_fmr_pool_is_idle(kib_fmr_pool_t *fpo, unsigned long now)
+static int kiblnd_fmr_pool_is_idle(kib_fmr_pool_t *fpo, unsigned long now)
{
if (fpo->fpo_map_count != 0) /* still in use */
return 0;
return cfs_time_aftereq(now, fpo->fpo_deadline);
}
-void
-kiblnd_fmr_pool_unmap(kib_fmr_t *fmr, int status)
+void kiblnd_fmr_pool_unmap(kib_fmr_t *fmr, int status)
{
- LIST_HEAD (zombies);
+ LIST_HEAD(zombies);
kib_fmr_pool_t *fpo = fmr->fmr_pool;
kib_fmr_poolset_t *fps = fpo->fpo_owner;
unsigned long now = cfs_time_current();
int rc;
rc = ib_fmr_pool_unmap(fmr->fmr_pfmr);
- LASSERT (rc == 0);
+ LASSERT(rc == 0);
if (status != 0) {
rc = ib_flush_fmr_pool(fpo->fpo_fmr_pool);
- LASSERT (rc == 0);
+ LASSERT(rc == 0);
}
fmr->fmr_pool = NULL;
kiblnd_destroy_fmr_pool_list(&zombies);
}
-int
-kiblnd_fmr_pool_map(kib_fmr_poolset_t *fps, __u64 *pages, int npages,
- __u64 iov, kib_fmr_t *fmr)
+int kiblnd_fmr_pool_map(kib_fmr_poolset_t *fps, __u64 *pages, int npages,
+ __u64 iov, kib_fmr_t *fmr)
{
struct ib_pool_fmr *pfmr;
kib_fmr_pool_t *fpo;
if (fps->fps_increasing) {
spin_unlock(&fps->fps_lock);
- CDEBUG(D_NET, "Another thread is allocating new FMR pool, waiting for her to complete\n");
+ CDEBUG(D_NET,
+ "Another thread is allocating new FMR pool, waiting for her to complete\n");
schedule();
goto again;
goto again;
}
-static void
-kiblnd_fini_pool(kib_pool_t *pool)
+static void kiblnd_fini_pool(kib_pool_t *pool)
{
- LASSERT (list_empty(&pool->po_free_list));
- LASSERT (pool->po_allocated == 0);
+ LASSERT(list_empty(&pool->po_free_list));
+ LASSERT(pool->po_allocated == 0);
CDEBUG(D_NET, "Finalize %s pool\n", pool->po_owner->ps_name);
}
-static void
-kiblnd_init_pool(kib_poolset_t *ps, kib_pool_t *pool, int size)
+static void kiblnd_init_pool(kib_poolset_t *ps, kib_pool_t *pool, int size)
{
CDEBUG(D_NET, "Initialize %s pool\n", ps->ps_name);
pool->po_size = size;
}
-static void
-kiblnd_destroy_pool_list(struct list_head *head)
+static void kiblnd_destroy_pool_list(struct list_head *head)
{
kib_pool_t *pool;
pool = list_entry(head->next, kib_pool_t, po_list);
list_del(&pool->po_list);
- LASSERT (pool->po_owner != NULL);
+ LASSERT(pool->po_owner != NULL);
pool->po_owner->ps_pool_destroy(pool);
}
}
-static void
-kiblnd_fail_poolset(kib_poolset_t *ps, struct list_head *zombies)
+static void kiblnd_fail_poolset(kib_poolset_t *ps, struct list_head *zombies)
{
if (ps->ps_net == NULL) /* intialized? */
return;
spin_unlock(&ps->ps_lock);
}
-static void
-kiblnd_fini_poolset(kib_poolset_t *ps)
+static void kiblnd_fini_poolset(kib_poolset_t *ps)
{
if (ps->ps_net != NULL) { /* initialized? */
kiblnd_destroy_pool_list(&ps->ps_failed_pool_list);
}
}
-static int
-kiblnd_init_poolset(kib_poolset_t *ps, int cpt,
- kib_net_t *net, char *name, int size,
- kib_ps_pool_create_t po_create,
- kib_ps_pool_destroy_t po_destroy,
- kib_ps_node_init_t nd_init,
- kib_ps_node_fini_t nd_fini)
+static int kiblnd_init_poolset(kib_poolset_t *ps, int cpt,
+ kib_net_t *net, char *name, int size,
+ kib_ps_pool_create_t po_create,
+ kib_ps_pool_destroy_t po_destroy,
+ kib_ps_node_init_t nd_init,
+ kib_ps_node_fini_t nd_fini)
{
kib_pool_t *pool;
int rc;
return rc;
}
-static int
-kiblnd_pool_is_idle(kib_pool_t *pool, unsigned long now)
+static int kiblnd_pool_is_idle(kib_pool_t *pool, unsigned long now)
{
if (pool->po_allocated != 0) /* still in use */
return 0;
return cfs_time_aftereq(now, pool->po_deadline);
}
-void
-kiblnd_pool_free_node(kib_pool_t *pool, struct list_head *node)
+void kiblnd_pool_free_node(kib_pool_t *pool, struct list_head *node)
{
- LIST_HEAD (zombies);
+ LIST_HEAD(zombies);
kib_poolset_t *ps = pool->po_owner;
kib_pool_t *tmp;
unsigned long now = cfs_time_current();
if (ps->ps_node_fini != NULL)
ps->ps_node_fini(pool, node);
- LASSERT (pool->po_allocated > 0);
+ LASSERT(pool->po_allocated > 0);
list_add(node, &pool->po_free_list);
pool->po_allocated--;
kiblnd_destroy_pool_list(&zombies);
}
-struct list_head *
-kiblnd_pool_alloc_node(kib_poolset_t *ps)
+struct list_head *kiblnd_pool_alloc_node(kib_poolset_t *ps)
{
struct list_head *node;
kib_pool_t *pool;
goto again;
}
-void
-kiblnd_pmr_pool_unmap(kib_phys_mr_t *pmr)
+void kiblnd_pmr_pool_unmap(kib_phys_mr_t *pmr)
{
kib_pmr_pool_t *ppo = pmr->pmr_pool;
struct ib_mr *mr = pmr->pmr_mr;
ib_dereg_mr(mr);
}
-int
-kiblnd_pmr_pool_map(kib_pmr_poolset_t *pps, kib_hca_dev_t *hdev,
+int kiblnd_pmr_pool_map(kib_pmr_poolset_t *pps, kib_hca_dev_t *hdev,
kib_rdma_desc_t *rd, __u64 *iova, kib_phys_mr_t **pp_pmr)
{
kib_phys_mr_t *pmr;
return rc;
}
-static void
-kiblnd_destroy_pmr_pool(kib_pool_t *pool)
+static void kiblnd_destroy_pmr_pool(kib_pool_t *pool)
{
kib_pmr_pool_t *ppo = container_of(pool, kib_pmr_pool_t, ppo_pool);
kib_phys_mr_t *pmr;
+ kib_phys_mr_t *tmp;
- LASSERT (pool->po_allocated == 0);
-
- while (!list_empty(&pool->po_free_list)) {
- pmr = list_entry(pool->po_free_list.next,
- kib_phys_mr_t, pmr_list);
+ LASSERT(pool->po_allocated == 0);
- LASSERT (pmr->pmr_mr == NULL);
+ list_for_each_entry_safe(pmr, tmp, &pool->po_free_list, pmr_list) {
+ LASSERT(pmr->pmr_mr == NULL);
list_del(&pmr->pmr_list);
if (pmr->pmr_ipb != NULL) {
return max(IBLND_PMR_POOL, size);
}
-static int
-kiblnd_create_pmr_pool(kib_poolset_t *ps, int size, kib_pool_t **pp_po)
+static int kiblnd_create_pmr_pool(kib_poolset_t *ps, int size,
+ kib_pool_t **pp_po)
{
struct kib_pmr_pool *ppo;
struct kib_pool *pool;
return 0;
}
-static void
-kiblnd_destroy_tx_pool(kib_pool_t *pool)
+static void kiblnd_destroy_tx_pool(kib_pool_t *pool)
{
kib_tx_pool_t *tpo = container_of(pool, kib_tx_pool_t, tpo_pool);
int i;
- LASSERT (pool->po_allocated == 0);
+ LASSERT(pool->po_allocated == 0);
if (tpo->tpo_tx_pages != NULL) {
kiblnd_unmap_tx_pool(tpo);
return max(IBLND_TX_POOL, ntx);
}
-static int
-kiblnd_create_tx_pool(kib_poolset_t *ps, int size, kib_pool_t **pp_po)
+static int kiblnd_create_tx_pool(kib_poolset_t *ps, int size,
+ kib_pool_t **pp_po)
{
int i;
int npg;
return -ENOMEM;
}
-static void
-kiblnd_tx_init(kib_pool_t *pool, struct list_head *node)
+static void kiblnd_tx_init(kib_pool_t *pool, struct list_head *node)
{
kib_tx_poolset_t *tps = container_of(pool->po_owner, kib_tx_poolset_t,
tps_poolset);
tx->tx_cookie = tps->tps_next_tx_cookie++;
}
-static void
-kiblnd_net_fini_pools(kib_net_t *net)
+static void kiblnd_net_fini_pools(kib_net_t *net)
{
int i;
}
}
-static int
-kiblnd_net_init_pools(kib_net_t *net, __u32 *cpts, int ncpts)
+static int kiblnd_net_init_pools(kib_net_t *net, __u32 *cpts, int ncpts)
{
unsigned long flags;
int cpt;
return rc;
}
-static int
-kiblnd_hdev_get_attr(kib_hca_dev_t *hdev)
+static int kiblnd_hdev_get_attr(kib_hca_dev_t *hdev)
{
struct ib_device_attr *attr;
int rc;
return -EINVAL;
}
-static void
-kiblnd_hdev_cleanup_mrs(kib_hca_dev_t *hdev)
+static void kiblnd_hdev_cleanup_mrs(kib_hca_dev_t *hdev)
{
int i;
hdev->ibh_nmrs = 0;
}
-void
-kiblnd_hdev_destroy(kib_hca_dev_t *hdev)
+void kiblnd_hdev_destroy(kib_hca_dev_t *hdev)
{
kiblnd_hdev_cleanup_mrs(hdev);
LIBCFS_FREE(hdev, sizeof(*hdev));
}
-static int
-kiblnd_hdev_setup_mrs(kib_hca_dev_t *hdev)
+static int kiblnd_hdev_setup_mrs(kib_hca_dev_t *hdev)
{
struct ib_mr *mr;
int i;
return PTR_ERR(mr);
}
- LASSERT (iova == ipb.addr);
+ LASSERT(iova == ipb.addr);
hdev->ibh_mrs[i] = mr;
}
return 0;
}
-static int
-kiblnd_dummy_callback(struct rdma_cm_id *cmid, struct rdma_cm_event *event)
-{ /* DUMMY */
+/* DUMMY */
+static int kiblnd_dummy_callback(struct rdma_cm_id *cmid,
+ struct rdma_cm_event *event)
+{
return 0;
}
-static int
-kiblnd_dev_need_failover(kib_dev_t *dev)
+static int kiblnd_dev_need_failover(kib_dev_t *dev)
{
struct rdma_cm_id *cmid;
struct sockaddr_in srcaddr;
return 1;
}
-int
-kiblnd_dev_failover(kib_dev_t *dev)
+int kiblnd_dev_failover(kib_dev_t *dev)
{
- LIST_HEAD (zombie_tpo);
- LIST_HEAD (zombie_ppo);
- LIST_HEAD (zombie_fpo);
+ LIST_HEAD(zombie_tpo);
+ LIST_HEAD(zombie_ppo);
+ LIST_HEAD(zombie_fpo);
struct rdma_cm_id *cmid = NULL;
kib_hca_dev_t *hdev = NULL;
kib_hca_dev_t *old;
int rc = 0;
int i;
- LASSERT (*kiblnd_tunables.kib_dev_failover > 1 ||
+ LASSERT(*kiblnd_tunables.kib_dev_failover > 1 ||
dev->ibd_can_failover ||
dev->ibd_hdev == NULL);
return rc;
}
-void
-kiblnd_destroy_dev (kib_dev_t *dev)
+void kiblnd_destroy_dev(kib_dev_t *dev)
{
- LASSERT (dev->ibd_nnets == 0);
- LASSERT (list_empty(&dev->ibd_nets));
+ LASSERT(dev->ibd_nnets == 0);
+ LASSERT(list_empty(&dev->ibd_nets));
list_del(&dev->ibd_fail_list);
list_del(&dev->ibd_list);
LIBCFS_FREE(dev, sizeof(*dev));
}
-static kib_dev_t *
-kiblnd_create_dev(char *ifname)
+static kib_dev_t *kiblnd_create_dev(char *ifname)
{
struct net_device *netdev;
kib_dev_t *dev;
return dev;
}
-static void
-kiblnd_base_shutdown(void)
+static void kiblnd_base_shutdown(void)
{
struct kib_sched_info *sched;
int i;
- LASSERT (list_empty(&kiblnd_data.kib_devs));
+ LASSERT(list_empty(&kiblnd_data.kib_devs));
CDEBUG(D_MALLOC, "before LND base cleanup: kmem %d\n",
atomic_read(&libcfs_kmemory));
case IBLND_INIT_ALL:
case IBLND_INIT_DATA:
- LASSERT (kiblnd_data.kib_peers != NULL);
- for (i = 0; i < kiblnd_data.kib_peer_hash_size; i++) {
- LASSERT (list_empty(&kiblnd_data.kib_peers[i]));
- }
- LASSERT (list_empty(&kiblnd_data.kib_connd_zombies));
- LASSERT (list_empty(&kiblnd_data.kib_connd_conns));
+ LASSERT(kiblnd_data.kib_peers != NULL);
+ for (i = 0; i < kiblnd_data.kib_peer_hash_size; i++)
+ LASSERT(list_empty(&kiblnd_data.kib_peers[i]));
+ LASSERT(list_empty(&kiblnd_data.kib_connd_zombies));
+ LASSERT(list_empty(&kiblnd_data.kib_connd_conns));
/* flag threads to terminate; wake and wait for them to die */
kiblnd_data.kib_shutdown = 1;
i = 2;
while (atomic_read(&kiblnd_data.kib_nthreads) != 0) {
i++;
- CDEBUG(((i & (-i)) == i) ? D_WARNING : D_NET, /* power of 2? */
+ /* power of 2 ? */
+ CDEBUG(((i & (-i)) == i) ? D_WARNING : D_NET,
"Waiting for %d threads to terminate\n",
atomic_read(&kiblnd_data.kib_nthreads));
set_current_state(TASK_UNINTERRUPTIBLE);
module_put(THIS_MODULE);
}
-void
-kiblnd_shutdown (lnet_ni_t *ni)
+void kiblnd_shutdown(lnet_ni_t *ni)
{
kib_net_t *net = ni->ni_data;
rwlock_t *g_lock = &kiblnd_data.kib_global_lock;
/* fall through */
case IBLND_INIT_NOTHING:
- LASSERT (atomic_read(&net->ibn_nconns) == 0);
+ LASSERT(atomic_read(&net->ibn_nconns) == 0);
if (net->ibn_dev != NULL &&
net->ibn_dev->ibd_nnets == 0)
out:
if (list_empty(&kiblnd_data.kib_devs))
kiblnd_base_shutdown();
- return;
}
-static int
-kiblnd_base_startup(void)
+static int kiblnd_base_startup(void)
{
struct kib_sched_info *sched;
int rc;
int i;
- LASSERT (kiblnd_data.kib_init == IBLND_INIT_NOTHING);
+ LASSERT(kiblnd_data.kib_init == IBLND_INIT_NOTHING);
try_module_get(THIS_MODULE);
- memset(&kiblnd_data, 0, sizeof(kiblnd_data)); /* zero pointers, flags etc */
+ /* zero pointers, flags etc */
+ memset(&kiblnd_data, 0, sizeof(kiblnd_data));
rwlock_init(&kiblnd_data.kib_global_lock);
LIBCFS_ALLOC(kiblnd_data.kib_peers,
sizeof(struct list_head) *
kiblnd_data.kib_peer_hash_size);
- if (kiblnd_data.kib_peers == NULL) {
+ if (kiblnd_data.kib_peers == NULL)
goto failed;
- }
for (i = 0; i < kiblnd_data.kib_peer_hash_size; i++)
INIT_LIST_HEAD(&kiblnd_data.kib_peers[i]);
return -ENETDOWN;
}
-static int
-kiblnd_start_schedulers(struct kib_sched_info *sched)
+static int kiblnd_start_schedulers(struct kib_sched_info *sched)
{
int rc = 0;
int nthrs;
} else {
LASSERT(sched->ibs_nthreads <= sched->ibs_nthreads_max);
/* increase one thread if there is new interface */
- nthrs = (sched->ibs_nthreads < sched->ibs_nthreads_max);
+ nthrs = sched->ibs_nthreads < sched->ibs_nthreads_max;
}
for (i = 0; i < nthrs; i++) {
long id;
char name[20];
+
id = KIB_THREAD_ID(sched->ibs_cpt, sched->ibs_nthreads + i);
snprintf(name, sizeof(name), "kiblnd_sd_%02ld_%02ld",
KIB_THREAD_CPT(id), KIB_THREAD_TID(id));
return rc;
}
-static int
-kiblnd_dev_start_threads(kib_dev_t *dev, int newdev, __u32 *cpts, int ncpts)
+static int kiblnd_dev_start_threads(kib_dev_t *dev, int newdev, __u32 *cpts,
+ int ncpts)
{
int cpt;
int rc;
return 0;
}
-static kib_dev_t *
-kiblnd_dev_search(char *ifname)
+static kib_dev_t *kiblnd_dev_search(char *ifname)
{
kib_dev_t *alias = NULL;
kib_dev_t *dev;
return alias;
}
-int
-kiblnd_startup (lnet_ni_t *ni)
+int kiblnd_startup(lnet_ni_t *ni)
{
char *ifname;
kib_dev_t *ibdev = NULL;
int rc;
int newdev;
- LASSERT (ni->ni_lnd == &the_o2iblnd);
+ LASSERT(ni->ni_lnd == &the_o2iblnd);
if (kiblnd_data.kib_init == IBLND_INIT_NOTHING) {
rc = kiblnd_base_startup();
if (ni->ni_interfaces[0] != NULL) {
/* Use the IPoIB interface specified in 'networks=' */
- CLASSERT (LNET_MAX_INTERFACES > 1);
+ CLASSERT(LNET_MAX_INTERFACES > 1);
if (ni->ni_interfaces[1] != NULL) {
CERROR("Multiple interfaces not supported\n");
goto failed;
return -ENETDOWN;
}
-static void __exit
-kiblnd_module_fini (void)
+static void __exit kiblnd_module_fini(void)
{
lnet_unregister_lnd(&the_o2iblnd);
}
-static int __init
-kiblnd_module_init (void)
+static int __init kiblnd_module_init(void)
{
int rc;
- CLASSERT (sizeof(kib_msg_t) <= IBLND_MSG_SIZE);
- CLASSERT (offsetof(kib_msg_t, ibm_u.get.ibgm_rd.rd_frags[IBLND_MAX_RDMA_FRAGS])
- <= IBLND_MSG_SIZE);
- CLASSERT (offsetof(kib_msg_t, ibm_u.putack.ibpam_rd.rd_frags[IBLND_MAX_RDMA_FRAGS])
- <= IBLND_MSG_SIZE);
+ CLASSERT(sizeof(kib_msg_t) <= IBLND_MSG_SIZE);
+ CLASSERT(offsetof(kib_msg_t,
+ ibm_u.get.ibgm_rd.rd_frags[IBLND_MAX_RDMA_FRAGS])
+ <= IBLND_MSG_SIZE);
+ CLASSERT(offsetof(kib_msg_t,
+ ibm_u.putack.ibpam_rd.rd_frags[IBLND_MAX_RDMA_FRAGS])
+ <= IBLND_MSG_SIZE);
rc = kiblnd_tunables_init();
if (rc != 0)
#include <linux/errno.h>
#include <linux/unistd.h>
#include <linux/uio.h>
+#include <linux/uaccess.h>
-#include <asm/uaccess.h>
#include <asm/io.h>
#include <linux/fs.h>
#include "o2iblnd.h"
static void
-kiblnd_tx_done (lnet_ni_t *ni, kib_tx_t *tx)
+kiblnd_tx_done(lnet_ni_t *ni, kib_tx_t *tx)
{
lnet_msg_t *lntmsg[2];
kib_net_t *net = ni->ni_data;
int rc;
int i;
- LASSERT (net != NULL);
- LASSERT (!in_interrupt());
- LASSERT (!tx->tx_queued); /* mustn't be queued for sending */
- LASSERT (tx->tx_sending == 0); /* mustn't be awaiting sent callback */
- LASSERT (!tx->tx_waiting); /* mustn't be awaiting peer response */
- LASSERT (tx->tx_pool != NULL);
+ LASSERT(net != NULL);
+ LASSERT(!in_interrupt());
+ LASSERT(!tx->tx_queued); /* mustn't be queued for sending */
+ LASSERT(tx->tx_sending == 0); /* mustn't be awaiting sent callback */
+ LASSERT(!tx->tx_waiting); /* mustn't be awaiting peer response */
+ LASSERT(tx->tx_pool != NULL);
kiblnd_unmap_tx(ni, tx);
rc = tx->tx_status;
if (tx->tx_conn != NULL) {
- LASSERT (ni == tx->tx_conn->ibc_peer->ibp_ni);
+ LASSERT(ni == tx->tx_conn->ibc_peer->ibp_ni);
kiblnd_conn_decref(tx->tx_conn);
tx->tx_conn = NULL;
}
void
-kiblnd_txlist_done (lnet_ni_t *ni, struct list_head *txlist, int status)
+kiblnd_txlist_done(lnet_ni_t *ni, struct list_head *txlist, int status)
{
kib_tx_t *tx;
- while (!list_empty (txlist)) {
- tx = list_entry (txlist->next, kib_tx_t, tx_list);
+ while (!list_empty(txlist)) {
+ tx = list_entry(txlist->next, kib_tx_t, tx_list);
list_del(&tx->tx_list);
/* complete now */
return NULL;
tx = container_of(node, kib_tx_t, tx_list);
- LASSERT (tx->tx_nwrq == 0);
- LASSERT (!tx->tx_queued);
- LASSERT (tx->tx_sending == 0);
- LASSERT (!tx->tx_waiting);
- LASSERT (tx->tx_status == 0);
- LASSERT (tx->tx_conn == NULL);
- LASSERT (tx->tx_lntmsg[0] == NULL);
- LASSERT (tx->tx_lntmsg[1] == NULL);
- LASSERT (tx->tx_u.pmr == NULL);
- LASSERT (tx->tx_nfrags == 0);
+ LASSERT(tx->tx_nwrq == 0);
+ LASSERT(!tx->tx_queued);
+ LASSERT(tx->tx_sending == 0);
+ LASSERT(!tx->tx_waiting);
+ LASSERT(tx->tx_status == 0);
+ LASSERT(tx->tx_conn == NULL);
+ LASSERT(tx->tx_lntmsg[0] == NULL);
+ LASSERT(tx->tx_lntmsg[1] == NULL);
+ LASSERT(tx->tx_u.pmr == NULL);
+ LASSERT(tx->tx_nfrags == 0);
return tx;
}
}
int
-kiblnd_post_rx (kib_rx_t *rx, int credit)
+kiblnd_post_rx(kib_rx_t *rx, int credit)
{
kib_conn_t *conn = rx->rx_conn;
kib_net_t *net = conn->ibc_peer->ibp_ni->ni_data;
struct ib_mr *mr;
int rc;
- LASSERT (net != NULL);
- LASSERT (!in_interrupt());
- LASSERT (credit == IBLND_POSTRX_NO_CREDIT ||
- credit == IBLND_POSTRX_PEER_CREDIT ||
- credit == IBLND_POSTRX_RSRVD_CREDIT);
+ LASSERT(net != NULL);
+ LASSERT(!in_interrupt());
+ LASSERT(credit == IBLND_POSTRX_NO_CREDIT ||
+ credit == IBLND_POSTRX_PEER_CREDIT ||
+ credit == IBLND_POSTRX_RSRVD_CREDIT);
mr = kiblnd_find_dma_mr(conn->ibc_hdev, rx->rx_msgaddr, IBLND_MSG_SIZE);
- LASSERT (mr != NULL);
+ LASSERT(mr != NULL);
rx->rx_sge.lkey = mr->lkey;
rx->rx_sge.addr = rx->rx_msgaddr;
rx->rx_wrq.num_sge = 1;
rx->rx_wrq.wr_id = kiblnd_ptr2wreqid(rx, IBLND_WID_RX);
- LASSERT (conn->ibc_state >= IBLND_CONN_INIT);
- LASSERT (rx->rx_nob >= 0); /* not posted */
+ LASSERT(conn->ibc_state >= IBLND_CONN_INIT);
+ LASSERT(rx->rx_nob >= 0); /* not posted */
if (conn->ibc_state > IBLND_CONN_ESTABLISHED) {
kiblnd_drop_rx(rx); /* No more posts for this rx */
list_for_each(tmp, &conn->ibc_active_txs) {
kib_tx_t *tx = list_entry(tmp, kib_tx_t, tx_list);
- LASSERT (!tx->tx_queued);
- LASSERT (tx->tx_sending != 0 || tx->tx_waiting);
+ LASSERT(!tx->tx_queued);
+ LASSERT(tx->tx_sending != 0 || tx->tx_waiting);
if (tx->tx_cookie != cookie)
continue;
}
static void
-kiblnd_handle_rx (kib_rx_t *rx)
+kiblnd_handle_rx(kib_rx_t *rx)
{
kib_msg_t *msg = rx->rx_msg;
kib_conn_t *conn = rx->rx_conn;
int rc2;
int post_credit;
- LASSERT (conn->ibc_state >= IBLND_CONN_ESTABLISHED);
+ LASSERT(conn->ibc_state >= IBLND_CONN_ESTABLISHED);
- CDEBUG (D_NET, "Received %x[%d] from %s\n",
- msg->ibm_type, credits,
- libcfs_nid2str(conn->ibc_peer->ibp_nid));
+ CDEBUG(D_NET, "Received %x[%d] from %s\n",
+ msg->ibm_type, credits,
+ libcfs_nid2str(conn->ibc_peer->ibp_nid));
if (credits != 0) {
/* Have I received credits that will let me send? */
break;
case IBLND_MSG_PUT_NAK:
- CWARN ("PUT_NACK from %s\n",
- libcfs_nid2str(conn->ibc_peer->ibp_nid));
+ CWARN("PUT_NACK from %s\n",
+ libcfs_nid2str(conn->ibc_peer->ibp_nid));
post_credit = IBLND_POSTRX_RSRVD_CREDIT;
kiblnd_handle_completion(conn, IBLND_MSG_PUT_REQ,
msg->ibm_u.completion.ibcm_status,
break;
}
- LASSERT (tx->tx_waiting);
+ LASSERT(tx->tx_waiting);
/* CAVEAT EMPTOR: I could be racing with tx_complete, but...
* (a) I can overwrite tx_msg since my peer has received it!
* (b) tx_waiting set tells tx_complete() it's not done. */
}
static void
-kiblnd_rx_complete (kib_rx_t *rx, int status, int nob)
+kiblnd_rx_complete(kib_rx_t *rx, int status, int nob)
{
kib_msg_t *msg = rx->rx_msg;
kib_conn_t *conn = rx->rx_conn;
int rc;
int err = -EIO;
- LASSERT (net != NULL);
- LASSERT (rx->rx_nob < 0); /* was posted */
+ LASSERT(net != NULL);
+ LASSERT(rx->rx_nob < 0); /* was posted */
rx->rx_nob = 0; /* isn't now */
if (conn->ibc_state > IBLND_CONN_ESTABLISHED)
goto failed;
}
- LASSERT (nob >= 0);
+ LASSERT(nob >= 0);
rx->rx_nob = nob;
rc = kiblnd_unpack_msg(msg, rx->rx_nob);
if (rc != 0) {
- CERROR ("Error %d unpacking rx from %s\n",
+ CERROR("Error %d unpacking rx from %s\n",
rc, libcfs_nid2str(conn->ibc_peer->ibp_nid));
goto failed;
}
msg->ibm_dstnid != ni->ni_nid ||
msg->ibm_srcstamp != conn->ibc_incarnation ||
msg->ibm_dststamp != net->ibn_incarnation) {
- CERROR ("Stale rx from %s\n",
+ CERROR("Stale rx from %s\n",
libcfs_nid2str(conn->ibc_peer->ibp_nid));
err = -ESTALE;
goto failed;
}
static struct page *
-kiblnd_kvaddr_to_page (unsigned long vaddr)
+kiblnd_kvaddr_to_page(unsigned long vaddr)
{
struct page *page;
if (is_vmalloc_addr((void *)vaddr)) {
- page = vmalloc_to_page ((void *)vaddr);
- LASSERT (page != NULL);
+ page = vmalloc_to_page((void *)vaddr);
+ LASSERT(page != NULL);
return page;
}
#ifdef CONFIG_HIGHMEM
LBUG();
}
#endif
- page = virt_to_page (vaddr);
- LASSERT (page != NULL);
+ page = virt_to_page(vaddr);
+ LASSERT(page != NULL);
return page;
}
for (i = 0, npages = 0; i < rd->rd_nfrags; i++) {
for (size = 0; size < rd->rd_frags[i].rf_nob;
size += hdev->ibh_page_size) {
- pages[npages ++] = (rd->rd_frags[i].rf_addr &
+ pages[npages++] = (rd->rd_frags[i].rf_addr &
hdev->ibh_page_mask) + size;
}
}
fps = net->ibn_fmr_ps[cpt];
rc = kiblnd_fmr_pool_map(fps, pages, npages, 0, &tx->tx_u.fmr);
if (rc != 0) {
- CERROR ("Can't map %d pages: %d\n", npages, rc);
+ CERROR("Can't map %d pages: %d\n", npages, rc);
return rc;
}
int fragnob;
int page_offset;
- LASSERT (nob > 0);
- LASSERT (niov > 0);
- LASSERT (net != NULL);
+ LASSERT(nob > 0);
+ LASSERT(niov > 0);
+ LASSERT(net != NULL);
while (offset >= iov->iov_len) {
offset -= iov->iov_len;
niov--;
iov++;
- LASSERT (niov > 0);
+ LASSERT(niov > 0);
}
sg = tx->tx_frags;
do {
- LASSERT (niov > 0);
+ LASSERT(niov > 0);
vaddr = ((unsigned long)iov->iov_base) + offset;
page_offset = vaddr & (PAGE_SIZE - 1);
page = kiblnd_kvaddr_to_page(vaddr);
if (page == NULL) {
- CERROR ("Can't find page\n");
+ CERROR("Can't find page\n");
return -EFAULT;
}
}
static int
-kiblnd_setup_rd_kiov (lnet_ni_t *ni, kib_tx_t *tx, kib_rdma_desc_t *rd,
+kiblnd_setup_rd_kiov(lnet_ni_t *ni, kib_tx_t *tx, kib_rdma_desc_t *rd,
int nkiov, lnet_kiov_t *kiov, int offset, int nob)
{
kib_net_t *net = ni->ni_data;
CDEBUG(D_NET, "niov %d offset %d nob %d\n", nkiov, offset, nob);
- LASSERT (nob > 0);
- LASSERT (nkiov > 0);
- LASSERT (net != NULL);
+ LASSERT(nob > 0);
+ LASSERT(nkiov > 0);
+ LASSERT(net != NULL);
while (offset >= kiov->kiov_len) {
offset -= kiov->kiov_len;
nkiov--;
kiov++;
- LASSERT (nkiov > 0);
+ LASSERT(nkiov > 0);
}
sg = tx->tx_frags;
do {
- LASSERT (nkiov > 0);
+ LASSERT(nkiov > 0);
fragnob = min((int)(kiov->kiov_len - offset), nob);
}
static int
-kiblnd_post_tx_locked (kib_conn_t *conn, kib_tx_t *tx, int credit)
+kiblnd_post_tx_locked(kib_conn_t *conn, kib_tx_t *tx, int credit)
__releases(conn->ibc_lock)
__acquires(conn->ibc_lock)
{
int done;
struct ib_send_wr *bad_wrq;
- LASSERT (tx->tx_queued);
+ LASSERT(tx->tx_queued);
/* We rely on this for QP sizing */
- LASSERT (tx->tx_nwrq > 0);
- LASSERT (tx->tx_nwrq <= 1 + IBLND_RDMA_FRAGS(ver));
+ LASSERT(tx->tx_nwrq > 0);
+ LASSERT(tx->tx_nwrq <= 1 + IBLND_RDMA_FRAGS(ver));
- LASSERT (credit == 0 || credit == 1);
- LASSERT (conn->ibc_outstanding_credits >= 0);
- LASSERT (conn->ibc_outstanding_credits <= IBLND_MSG_QUEUE_SIZE(ver));
- LASSERT (conn->ibc_credits >= 0);
- LASSERT (conn->ibc_credits <= IBLND_MSG_QUEUE_SIZE(ver));
+ LASSERT(credit == 0 || credit == 1);
+ LASSERT(conn->ibc_outstanding_credits >= 0);
+ LASSERT(conn->ibc_outstanding_credits <= IBLND_MSG_QUEUE_SIZE(ver));
+ LASSERT(conn->ibc_credits >= 0);
+ LASSERT(conn->ibc_credits <= IBLND_MSG_QUEUE_SIZE(ver));
if (conn->ibc_nsends_posted == IBLND_CONCURRENT_SENDS(ver)) {
/* tx completions outstanding... */
}
void
-kiblnd_check_sends (kib_conn_t *conn)
+kiblnd_check_sends(kib_conn_t *conn)
{
int ver = conn->ibc_version;
lnet_ni_t *ni = conn->ibc_peer->ibp_ni;
spin_lock(&conn->ibc_lock);
- LASSERT (conn->ibc_nsends_posted <= IBLND_CONCURRENT_SENDS(ver));
- LASSERT (!IBLND_OOB_CAPABLE(ver) ||
+ LASSERT(conn->ibc_nsends_posted <= IBLND_CONCURRENT_SENDS(ver));
+ LASSERT(!IBLND_OOB_CAPABLE(ver) ||
conn->ibc_noops_posted <= IBLND_OOB_MSGS(ver));
- LASSERT (conn->ibc_reserved_credits >= 0);
+ LASSERT(conn->ibc_reserved_credits >= 0);
while (conn->ibc_reserved_credits > 0 &&
!list_empty(&conn->ibc_tx_queue_rsrvd)) {
tx = list_entry(conn->ibc_tx_queue_nocred.next,
kib_tx_t, tx_list);
} else if (!list_empty(&conn->ibc_tx_noops)) {
- LASSERT (!IBLND_OOB_CAPABLE(ver));
+ LASSERT(!IBLND_OOB_CAPABLE(ver));
credit = 1;
tx = list_entry(conn->ibc_tx_noops.next,
kib_tx_t, tx_list);
}
static void
-kiblnd_tx_complete (kib_tx_t *tx, int status)
+kiblnd_tx_complete(kib_tx_t *tx, int status)
{
int failed = (status != IB_WC_SUCCESS);
kib_conn_t *conn = tx->tx_conn;
int idle;
- LASSERT (tx->tx_sending > 0);
+ LASSERT(tx->tx_sending > 0);
if (failed) {
if (conn->ibc_state == IBLND_CONN_ESTABLISHED)
}
void
-kiblnd_init_tx_msg (lnet_ni_t *ni, kib_tx_t *tx, int type, int body_nob)
+kiblnd_init_tx_msg(lnet_ni_t *ni, kib_tx_t *tx, int type, int body_nob)
{
kib_hca_dev_t *hdev = tx->tx_pool->tpo_hdev;
struct ib_sge *sge = &tx->tx_sge[tx->tx_nwrq];
struct ib_send_wr *wrq = &tx->tx_wrq[tx->tx_nwrq];
- int nob = offsetof (kib_msg_t, ibm_u) + body_nob;
+ int nob = offsetof(kib_msg_t, ibm_u) + body_nob;
struct ib_mr *mr;
- LASSERT (tx->tx_nwrq >= 0);
- LASSERT (tx->tx_nwrq < IBLND_MAX_RDMA_FRAGS + 1);
- LASSERT (nob <= IBLND_MSG_SIZE);
+ LASSERT(tx->tx_nwrq >= 0);
+ LASSERT(tx->tx_nwrq < IBLND_MAX_RDMA_FRAGS + 1);
+ LASSERT(nob <= IBLND_MSG_SIZE);
kiblnd_init_msg(tx->tx_msg, type, body_nob);
mr = kiblnd_find_dma_mr(hdev, tx->tx_msgaddr, nob);
- LASSERT (mr != NULL);
+ LASSERT(mr != NULL);
sge->lkey = mr->lkey;
sge->addr = tx->tx_msgaddr;
}
int
-kiblnd_init_rdma (kib_conn_t *conn, kib_tx_t *tx, int type,
+kiblnd_init_rdma(kib_conn_t *conn, kib_tx_t *tx, int type,
int resid, kib_rdma_desc_t *dstrd, __u64 dstcookie)
{
kib_msg_t *ibmsg = tx->tx_msg;
int dstidx;
int wrknob;
- LASSERT (!in_interrupt());
- LASSERT (tx->tx_nwrq == 0);
- LASSERT (type == IBLND_MSG_GET_DONE ||
+ LASSERT(!in_interrupt());
+ LASSERT(tx->tx_nwrq == 0);
+ LASSERT(type == IBLND_MSG_GET_DONE ||
type == IBLND_MSG_PUT_DONE);
srcidx = dstidx = 0;
ibmsg->ibm_u.completion.ibcm_status = rc;
ibmsg->ibm_u.completion.ibcm_cookie = dstcookie;
kiblnd_init_tx_msg(conn->ibc_peer->ibp_ni, tx,
- type, sizeof (kib_completion_msg_t));
+ type, sizeof(kib_completion_msg_t));
return rc;
}
void
-kiblnd_queue_tx_locked (kib_tx_t *tx, kib_conn_t *conn)
+kiblnd_queue_tx_locked(kib_tx_t *tx, kib_conn_t *conn)
{
struct list_head *q;
- LASSERT (tx->tx_nwrq > 0); /* work items set up */
- LASSERT (!tx->tx_queued); /* not queued for sending already */
- LASSERT (conn->ibc_state >= IBLND_CONN_ESTABLISHED);
+ LASSERT(tx->tx_nwrq > 0); /* work items set up */
+ LASSERT(!tx->tx_queued); /* not queued for sending already */
+ LASSERT(conn->ibc_state >= IBLND_CONN_ESTABLISHED);
tx->tx_queued = 1;
tx->tx_deadline = jiffies + (*kiblnd_tunables.kib_timeout * HZ);
if (tx->tx_conn == NULL) {
kiblnd_conn_addref(conn);
tx->tx_conn = conn;
- LASSERT (tx->tx_msg->ibm_type != IBLND_MSG_PUT_DONE);
+ LASSERT(tx->tx_msg->ibm_type != IBLND_MSG_PUT_DONE);
} else {
/* PUT_DONE first attached to conn as a PUT_REQ */
- LASSERT (tx->tx_conn == conn);
- LASSERT (tx->tx_msg->ibm_type == IBLND_MSG_PUT_DONE);
+ LASSERT(tx->tx_conn == conn);
+ LASSERT(tx->tx_msg->ibm_type == IBLND_MSG_PUT_DONE);
}
switch (tx->tx_msg->ibm_type) {
}
void
-kiblnd_queue_tx (kib_tx_t *tx, kib_conn_t *conn)
+kiblnd_queue_tx(kib_tx_t *tx, kib_conn_t *conn)
{
spin_lock(&conn->ibc_lock);
kiblnd_queue_tx_locked(tx, conn);
}
static void
-kiblnd_connect_peer (kib_peer_t *peer)
+kiblnd_connect_peer(kib_peer_t *peer)
{
struct rdma_cm_id *cmid;
kib_dev_t *dev;
struct sockaddr_in dstaddr;
int rc;
- LASSERT (net != NULL);
- LASSERT (peer->ibp_connecting > 0);
+ LASSERT(net != NULL);
+ LASSERT(peer->ibp_connecting > 0);
cmid = kiblnd_rdma_create_id(kiblnd_cm_callback, peer, RDMA_PS_TCP,
IB_QPT_RC);
goto failed2;
}
- LASSERT (cmid->device != NULL);
+ LASSERT(cmid->device != NULL);
CDEBUG(D_NET, "%s: connection bound to %s:%pI4h:%s\n",
libcfs_nid2str(peer->ibp_nid), dev->ibd_ifname,
&dev->ibd_ifip, cmid->device->name);
}
void
-kiblnd_launch_tx (lnet_ni_t *ni, kib_tx_t *tx, lnet_nid_t nid)
+kiblnd_launch_tx(lnet_ni_t *ni, kib_tx_t *tx, lnet_nid_t nid)
{
kib_peer_t *peer;
kib_peer_t *peer2;
/* If I get here, I've committed to send, so I complete the tx with
* failure on any problems */
- LASSERT (tx == NULL || tx->tx_conn == NULL); /* only set when assigned a conn */
- LASSERT (tx == NULL || tx->tx_nwrq > 0); /* work items have been set up */
+ LASSERT(tx == NULL || tx->tx_conn == NULL); /* only set when assigned a conn */
+ LASSERT(tx == NULL || tx->tx_nwrq > 0); /* work items have been set up */
/* First time, just use a read lock since I expect to find my peer
* connected */
if (peer != NULL) {
if (list_empty(&peer->ibp_conns)) {
/* found a peer, but it's still connecting... */
- LASSERT (peer->ibp_connecting != 0 ||
+ LASSERT(peer->ibp_connecting != 0 ||
peer->ibp_accepting != 0);
if (tx != NULL)
list_add_tail(&tx->tx_list,
if (peer2 != NULL) {
if (list_empty(&peer2->ibp_conns)) {
/* found a peer, but it's still connecting... */
- LASSERT (peer2->ibp_connecting != 0 ||
+ LASSERT(peer2->ibp_connecting != 0 ||
peer2->ibp_accepting != 0);
if (tx != NULL)
list_add_tail(&tx->tx_list,
}
/* Brand new peer */
- LASSERT (peer->ibp_connecting == 0);
+ LASSERT(peer->ibp_connecting == 0);
peer->ibp_connecting = 1;
/* always called with a ref on ni, which prevents ni being shutdown */
- LASSERT (((kib_net_t *)ni->ni_data)->ibn_shutdown == 0);
+ LASSERT(((kib_net_t *)ni->ni_data)->ibn_shutdown == 0);
if (tx != NULL)
list_add_tail(&tx->tx_list, &peer->ibp_tx_queue);
}
int
-kiblnd_send (lnet_ni_t *ni, void *private, lnet_msg_t *lntmsg)
+kiblnd_send(lnet_ni_t *ni, void *private, lnet_msg_t *lntmsg)
{
lnet_hdr_t *hdr = &lntmsg->msg_hdr;
int type = lntmsg->msg_type;
CDEBUG(D_NET, "sending %d bytes in %d frags to %s\n",
payload_nob, payload_niov, libcfs_id2str(target));
- LASSERT (payload_nob == 0 || payload_niov > 0);
- LASSERT (payload_niov <= LNET_MAX_IOV);
+ LASSERT(payload_nob == 0 || payload_niov > 0);
+ LASSERT(payload_niov <= LNET_MAX_IOV);
/* Thread context */
- LASSERT (!in_interrupt());
+ LASSERT(!in_interrupt());
/* payload is either all vaddrs or all pages */
- LASSERT (!(payload_kiov != NULL && payload_iov != NULL));
+ LASSERT(!(payload_kiov != NULL && payload_iov != NULL));
switch (type) {
default:
return -EIO;
case LNET_MSG_ACK:
- LASSERT (payload_nob == 0);
+ LASSERT(payload_nob == 0);
break;
case LNET_MSG_GET:
/* send IMMEDIATE */
- LASSERT (offsetof(kib_msg_t, ibm_u.immediate.ibim_payload[payload_nob])
+ LASSERT(offsetof(kib_msg_t, ibm_u.immediate.ibim_payload[payload_nob])
<= IBLND_MSG_SIZE);
tx = kiblnd_get_idle_tx(ni, target.nid);
if (tx == NULL) {
- CERROR ("Can't send %d to %s: tx descs exhausted\n",
+ CERROR("Can't send %d to %s: tx descs exhausted\n",
type, libcfs_nid2str(target.nid));
return -ENOMEM;
}
}
static void
-kiblnd_reply (lnet_ni_t *ni, kib_rx_t *rx, lnet_msg_t *lntmsg)
+kiblnd_reply(lnet_ni_t *ni, kib_rx_t *rx, lnet_msg_t *lntmsg)
{
lnet_process_id_t target = lntmsg->msg_target;
unsigned int niov = lntmsg->msg_niov;
}
int
-kiblnd_recv (lnet_ni_t *ni, void *private, lnet_msg_t *lntmsg, int delayed,
+kiblnd_recv(lnet_ni_t *ni, void *private, lnet_msg_t *lntmsg, int delayed,
unsigned int niov, struct kvec *iov, lnet_kiov_t *kiov,
unsigned int offset, unsigned int mlen, unsigned int rlen)
{
int post_credit = IBLND_POSTRX_PEER_CREDIT;
int rc = 0;
- LASSERT (mlen <= rlen);
- LASSERT (!in_interrupt());
+ LASSERT(mlen <= rlen);
+ LASSERT(!in_interrupt());
/* Either all pages or all vaddrs */
- LASSERT (!(kiov != NULL && iov != NULL));
+ LASSERT(!(kiov != NULL && iov != NULL));
switch (rxmsg->ibm_type) {
default:
case IBLND_MSG_IMMEDIATE:
nob = offsetof(kib_msg_t, ibm_u.immediate.ibim_payload[rlen]);
if (nob > rx->rx_nob) {
- CERROR ("Immediate message from %s too big: %d(%d)\n",
+ CERROR("Immediate message from %s too big: %d(%d)\n",
libcfs_nid2str(rxmsg->ibm_u.immediate.ibim_hdr.src_nid),
nob, rx->rx_nob);
rc = -EPROTO;
IBLND_MSG_SIZE, rxmsg,
offsetof(kib_msg_t, ibm_u.immediate.ibim_payload),
mlen);
- lnet_finalize (ni, lntmsg, 0);
+ lnet_finalize(ni, lntmsg, 0);
break;
case IBLND_MSG_PUT_REQ:
}
static void
-kiblnd_thread_fini (void)
+kiblnd_thread_fini(void)
{
- atomic_dec (&kiblnd_data.kib_nthreads);
+ atomic_dec(&kiblnd_data.kib_nthreads);
}
void
-kiblnd_peer_alive (kib_peer_t *peer)
+kiblnd_peer_alive(kib_peer_t *peer)
{
/* This is racy, but everyone's only writing cfs_time_current() */
peer->ibp_last_alive = cfs_time_current();
}
static void
-kiblnd_peer_notify (kib_peer_t *peer)
+kiblnd_peer_notify(kib_peer_t *peer)
{
int error = 0;
unsigned long last_alive = 0;
}
void
-kiblnd_close_conn_locked (kib_conn_t *conn, int error)
+kiblnd_close_conn_locked(kib_conn_t *conn, int error)
{
/* This just does the immediate housekeeping. 'error' is zero for a
* normal shutdown which can happen only after the connection has been
kib_dev_t *dev;
unsigned long flags;
- LASSERT (error != 0 || conn->ibc_state >= IBLND_CONN_ESTABLISHED);
+ LASSERT(error != 0 || conn->ibc_state >= IBLND_CONN_ESTABLISHED);
if (error != 0 && conn->ibc_comms_error == 0)
conn->ibc_comms_error = error;
list_del(&conn->ibc_list);
/* connd (see below) takes over ibc_list's ref */
- if (list_empty (&peer->ibp_conns) && /* no more conns */
+ if (list_empty(&peer->ibp_conns) && /* no more conns */
kiblnd_peer_active(peer)) { /* still in peer table */
kiblnd_unlink_peer_locked(peer);
{
unsigned long flags;
kib_rx_t *rx;
+ kib_rx_t *tmp;
LASSERT(!in_interrupt());
LASSERT(conn->ibc_state >= IBLND_CONN_ESTABLISHED);
write_lock_irqsave(&kiblnd_data.kib_global_lock, flags);
- while (!list_empty(&conn->ibc_early_rxs)) {
- rx = list_entry(conn->ibc_early_rxs.next,
- kib_rx_t, rx_list);
+ list_for_each_entry_safe(rx, tmp, &conn->ibc_early_rxs, rx_list) {
list_del(&rx->rx_list);
write_unlock_irqrestore(&kiblnd_data.kib_global_lock, flags);
static void
kiblnd_abort_txs(kib_conn_t *conn, struct list_head *txs)
{
- LIST_HEAD (zombies);
+ LIST_HEAD(zombies);
struct list_head *tmp;
struct list_head *nxt;
kib_tx_t *tx;
spin_lock(&conn->ibc_lock);
- list_for_each_safe (tmp, nxt, txs) {
- tx = list_entry (tmp, kib_tx_t, tx_list);
+ list_for_each_safe(tmp, nxt, txs) {
+ tx = list_entry(tmp, kib_tx_t, tx_list);
if (txs == &conn->ibc_active_txs) {
- LASSERT (!tx->tx_queued);
- LASSERT (tx->tx_waiting ||
+ LASSERT(!tx->tx_queued);
+ LASSERT(tx->tx_waiting ||
tx->tx_sending != 0);
} else {
- LASSERT (tx->tx_queued);
+ LASSERT(tx->tx_queued);
}
tx->tx_status = -ECONNABORTED;
if (tx->tx_sending == 0) {
tx->tx_queued = 0;
- list_del (&tx->tx_list);
- list_add (&tx->tx_list, &zombies);
+ list_del(&tx->tx_list);
+ list_add(&tx->tx_list, &zombies);
}
}
}
static void
-kiblnd_finalise_conn (kib_conn_t *conn)
+kiblnd_finalise_conn(kib_conn_t *conn)
{
- LASSERT (!in_interrupt());
- LASSERT (conn->ibc_state > IBLND_CONN_INIT);
+ LASSERT(!in_interrupt());
+ LASSERT(conn->ibc_state > IBLND_CONN_INIT);
kiblnd_set_conn_state(conn, IBLND_CONN_DISCONNECTED);
}
void
-kiblnd_peer_connect_failed (kib_peer_t *peer, int active, int error)
+kiblnd_peer_connect_failed(kib_peer_t *peer, int active, int error)
{
- LIST_HEAD (zombies);
+ LIST_HEAD(zombies);
unsigned long flags;
- LASSERT (error != 0);
- LASSERT (!in_interrupt());
+ LASSERT(error != 0);
+ LASSERT(!in_interrupt());
write_lock_irqsave(&kiblnd_data.kib_global_lock, flags);
if (active) {
- LASSERT (peer->ibp_connecting > 0);
+ LASSERT(peer->ibp_connecting > 0);
peer->ibp_connecting--;
} else {
- LASSERT (peer->ibp_accepting > 0);
+ LASSERT(peer->ibp_accepting > 0);
peer->ibp_accepting--;
}
peer->ibp_error = error;
} else {
/* Can't have blocked transmits if there are connections */
- LASSERT (list_empty(&peer->ibp_tx_queue));
+ LASSERT(list_empty(&peer->ibp_tx_queue));
}
write_unlock_irqrestore(&kiblnd_data.kib_global_lock, flags);
kiblnd_peer_notify(peer);
- if (list_empty (&zombies))
+ if (list_empty(&zombies))
return;
CNETERR("Deleting messages for %s: connection failed\n",
{
kib_peer_t *peer = conn->ibc_peer;
kib_tx_t *tx;
+ kib_tx_t *tmp;
struct list_head txs;
unsigned long flags;
int active;
libcfs_nid2str(peer->ibp_nid), active,
conn->ibc_version, status);
- LASSERT (!in_interrupt());
- LASSERT ((conn->ibc_state == IBLND_CONN_ACTIVE_CONNECT &&
+ LASSERT(!in_interrupt());
+ LASSERT((conn->ibc_state == IBLND_CONN_ACTIVE_CONNECT &&
peer->ibp_connecting > 0) ||
(conn->ibc_state == IBLND_CONN_PASSIVE_WAIT &&
peer->ibp_accepting > 0));
/* Schedule blocked txs */
spin_lock(&conn->ibc_lock);
- while (!list_empty(&txs)) {
- tx = list_entry(txs.next, kib_tx_t, tx_list);
+ list_for_each_entry_safe(tx, tmp, &txs, tx_list) {
list_del(&tx->tx_list);
kiblnd_queue_tx_locked(tx, conn);
}
static int
-kiblnd_passive_connect (struct rdma_cm_id *cmid, void *priv, int priv_nob)
+kiblnd_passive_connect(struct rdma_cm_id *cmid, void *priv, int priv_nob)
{
rwlock_t *g_lock = &kiblnd_data.kib_global_lock;
kib_msg_t *reqmsg = priv;
unsigned long flags;
int rc;
struct sockaddr_in *peer_addr;
- LASSERT (!in_interrupt());
+ LASSERT(!in_interrupt());
/* cmid inherits 'context' from the corresponding listener id */
ibdev = (kib_dev_t *)cmid->context;
- LASSERT (ibdev != NULL);
+ LASSERT(ibdev != NULL);
memset(&rej, 0, sizeof(rej));
rej.ibr_magic = IBLND_MSG_MAGIC;
peer = peer2;
} else {
/* Brand new peer */
- LASSERT (peer->ibp_accepting == 0);
- LASSERT (peer->ibp_version == 0 &&
+ LASSERT(peer->ibp_accepting == 0);
+ LASSERT(peer->ibp_version == 0 &&
peer->ibp_incarnation == 0);
peer->ibp_accepting = 1;
peer->ibp_incarnation = reqmsg->ibm_srcstamp;
/* I have a ref on ni that prevents it being shutdown */
- LASSERT (net->ibn_shutdown == 0);
+ LASSERT(net->ibn_shutdown == 0);
kiblnd_peer_addref(peer);
list_add_tail(&peer->ibp_list, kiblnd_nid2peerlist(nid));
conn->ibc_incarnation = reqmsg->ibm_srcstamp;
conn->ibc_credits = IBLND_MSG_QUEUE_SIZE(version);
conn->ibc_reserved_credits = IBLND_MSG_QUEUE_SIZE(version);
- LASSERT (conn->ibc_credits + conn->ibc_reserved_credits + IBLND_OOB_MSGS(version)
+ LASSERT(conn->ibc_credits + conn->ibc_reserved_credits + IBLND_OOB_MSGS(version)
<= IBLND_RX_MSGS(version));
ackmsg = &conn->ibc_connvars->cv_msg;
}
static void
-kiblnd_reconnect (kib_conn_t *conn, int version,
+kiblnd_reconnect(kib_conn_t *conn, int version,
__u64 incarnation, int why, kib_connparams_t *cp)
{
kib_peer_t *peer = conn->ibc_peer;
int retry = 0;
unsigned long flags;
- LASSERT (conn->ibc_state == IBLND_CONN_ACTIVE_CONNECT);
- LASSERT (peer->ibp_connecting > 0); /* 'conn' at least */
+ LASSERT(conn->ibc_state == IBLND_CONN_ACTIVE_CONNECT);
+ LASSERT(peer->ibp_connecting > 0); /* 'conn' at least */
write_lock_irqsave(&kiblnd_data.kib_global_lock, flags);
CNETERR("%s: retrying (%s), %x, %x, queue_dep: %d, max_frag: %d, msg_size: %d\n",
libcfs_nid2str(peer->ibp_nid),
reason, IBLND_MSG_VERSION, version,
- cp != NULL? cp->ibcp_queue_depth :IBLND_MSG_QUEUE_SIZE(version),
- cp != NULL? cp->ibcp_max_frags : IBLND_RDMA_FRAGS(version),
- cp != NULL? cp->ibcp_max_msg_size: IBLND_MSG_SIZE);
+ cp != NULL ? cp->ibcp_queue_depth : IBLND_MSG_QUEUE_SIZE(version),
+ cp != NULL ? cp->ibcp_max_frags : IBLND_RDMA_FRAGS(version),
+ cp != NULL ? cp->ibcp_max_msg_size : IBLND_MSG_SIZE);
kiblnd_connect_peer(peer);
}
static void
-kiblnd_rejected (kib_conn_t *conn, int reason, void *priv, int priv_nob)
+kiblnd_rejected(kib_conn_t *conn, int reason, void *priv, int priv_nob)
{
kib_peer_t *peer = conn->ibc_peer;
- LASSERT (!in_interrupt());
- LASSERT (conn->ibc_state == IBLND_CONN_ACTIVE_CONNECT);
+ LASSERT(!in_interrupt());
+ LASSERT(conn->ibc_state == IBLND_CONN_ACTIVE_CONNECT);
switch (reason) {
case IB_CM_REJ_STALE_CONN:
}
static void
-kiblnd_check_connreply (kib_conn_t *conn, void *priv, int priv_nob)
+kiblnd_check_connreply(kib_conn_t *conn, void *priv, int priv_nob)
{
kib_peer_t *peer = conn->ibc_peer;
lnet_ni_t *ni = peer->ibp_ni;
int rc = kiblnd_unpack_msg(msg, priv_nob);
unsigned long flags;
- LASSERT (net != NULL);
+ LASSERT(net != NULL);
if (rc != 0) {
CERROR("Can't unpack connack from %s: %d\n",
conn->ibc_incarnation = msg->ibm_srcstamp;
conn->ibc_credits =
conn->ibc_reserved_credits = IBLND_MSG_QUEUE_SIZE(ver);
- LASSERT (conn->ibc_credits + conn->ibc_reserved_credits + IBLND_OOB_MSGS(ver)
+ LASSERT(conn->ibc_credits + conn->ibc_reserved_credits + IBLND_OOB_MSGS(ver)
<= IBLND_RX_MSGS(ver));
kiblnd_connreq_done(conn, 0);
* kiblnd_connreq_done(0) moves the conn state to ESTABLISHED, but then
* immediately tears it down. */
- LASSERT (rc != 0);
+ LASSERT(rc != 0);
conn->ibc_comms_error = rc;
kiblnd_connreq_done(conn, 0);
}
static int
-kiblnd_active_connect (struct rdma_cm_id *cmid)
+kiblnd_active_connect(struct rdma_cm_id *cmid)
{
kib_peer_t *peer = (kib_peer_t *)cmid->context;
kib_conn_t *conn;
LBUG();
case IBLND_CONN_PASSIVE_WAIT:
- CERROR ("%s: REJECTED %d\n",
+ CERROR("%s: REJECTED %d\n",
libcfs_nid2str(conn->ibc_peer->ibp_nid),
event->status);
kiblnd_connreq_done(conn, -ECONNRESET);
kib_tx_t *tx;
struct list_head *ttmp;
- list_for_each (ttmp, txs) {
- tx = list_entry (ttmp, kib_tx_t, tx_list);
+ list_for_each(ttmp, txs) {
+ tx = list_entry(ttmp, kib_tx_t, tx_list);
if (txs != &conn->ibc_active_txs) {
- LASSERT (tx->tx_queued);
+ LASSERT(tx->tx_queued);
} else {
- LASSERT (!tx->tx_queued);
- LASSERT (tx->tx_waiting || tx->tx_sending != 0);
+ LASSERT(!tx->tx_queued);
+ LASSERT(tx->tx_waiting || tx->tx_sending != 0);
}
- if (cfs_time_aftereq (jiffies, tx->tx_deadline)) {
+ if (cfs_time_aftereq(jiffies, tx->tx_deadline)) {
CERROR("Timed out tx: %s, %lu seconds\n",
kiblnd_queue2str(conn, txs),
cfs_duration_sec(jiffies - tx->tx_deadline));
}
static void
-kiblnd_check_conns (int idx)
+kiblnd_check_conns(int idx)
{
- LIST_HEAD (closes);
- LIST_HEAD (checksends);
+ LIST_HEAD(closes);
+ LIST_HEAD(checksends);
struct list_head *peers = &kiblnd_data.kib_peers[idx];
struct list_head *ptmp;
kib_peer_t *peer;
kib_conn_t *conn;
+ kib_conn_t *tmp;
struct list_head *ctmp;
unsigned long flags;
* take a look... */
read_lock_irqsave(&kiblnd_data.kib_global_lock, flags);
- list_for_each (ptmp, peers) {
- peer = list_entry (ptmp, kib_peer_t, ibp_list);
+ list_for_each(ptmp, peers) {
+ peer = list_entry(ptmp, kib_peer_t, ibp_list);
- list_for_each (ctmp, &peer->ibp_conns) {
+ list_for_each(ctmp, &peer->ibp_conns) {
int timedout;
int sendnoop;
conn = list_entry(ctmp, kib_conn_t, ibc_list);
- LASSERT (conn->ibc_state == IBLND_CONN_ESTABLISHED);
+ LASSERT(conn->ibc_state == IBLND_CONN_ESTABLISHED);
spin_lock(&conn->ibc_lock);
/* Handle timeout by closing the whole
* connection. We can only be sure RDMA activity
* has ceased once the QP has been modified. */
- while (!list_empty(&closes)) {
- conn = list_entry(closes.next,
- kib_conn_t, ibc_connd_list);
+ list_for_each_entry_safe(conn, tmp, &closes, ibc_connd_list) {
list_del(&conn->ibc_connd_list);
kiblnd_close_conn(conn, -ETIMEDOUT);
kiblnd_conn_decref(conn);
}
static void
-kiblnd_disconnect_conn (kib_conn_t *conn)
+kiblnd_disconnect_conn(kib_conn_t *conn)
{
- LASSERT (!in_interrupt());
- LASSERT (current == kiblnd_data.kib_connd);
- LASSERT (conn->ibc_state == IBLND_CONN_CLOSING);
+ LASSERT(!in_interrupt());
+ LASSERT(current == kiblnd_data.kib_connd);
+ LASSERT(conn->ibc_state == IBLND_CONN_CLOSING);
rdma_disconnect(conn->ibc_cmid);
kiblnd_finalise_conn(conn);
}
int
-kiblnd_connd (void *arg)
+kiblnd_connd(void *arg)
{
wait_queue_t wait;
unsigned long flags;
int peer_index = 0;
unsigned long deadline = jiffies;
- cfs_block_allsigs ();
+ cfs_block_allsigs();
init_waitqueue_entry(&wait, current);
kiblnd_data.kib_connd = current;
dropped_lock = 0;
- if (!list_empty (&kiblnd_data.kib_connd_zombies)) {
+ if (!list_empty(&kiblnd_data.kib_connd_zombies)) {
conn = list_entry(kiblnd_data. \
kib_connd_zombies.next,
kib_conn_t, ibc_list);
}
static void
-kiblnd_complete (struct ib_wc *wc)
+kiblnd_complete(struct ib_wc *wc)
{
switch (kiblnd_wreqid2type(wc->wr_id)) {
default:
unsigned long flags;
int rc;
- LASSERT (*kiblnd_tunables.kib_dev_failover != 0);
+ LASSERT(*kiblnd_tunables.kib_dev_failover != 0);
- cfs_block_allsigs ();
+ cfs_block_allsigs();
init_waitqueue_entry(&wait, current);
write_lock_irqsave(glock, flags);
write_lock_irqsave(glock, flags);
- LASSERT (dev->ibd_failover);
+ LASSERT(dev->ibd_failover);
dev->ibd_failover = 0;
if (rc >= 0) { /* Device is OK or failover succeed */
dev->ibd_next_failover = cfs_time_shift(3);
module_param(service, int, 0444);
MODULE_PARM_DESC(service, "service number (within RDMA_PS_TCP)");
-static int cksum = 0;
+static int cksum;
module_param(cksum, int, 0644);
MODULE_PARM_DESC(cksum, "set non-zero to enable message (not RDMA) checksums");
module_param(peer_credits, int, 0444);
MODULE_PARM_DESC(peer_credits, "# concurrent sends to 1 peer");
-static int peer_credits_hiw = 0;
+static int peer_credits_hiw;
module_param(peer_credits_hiw, int, 0444);
MODULE_PARM_DESC(peer_credits_hiw, "when eagerly to return credits");
-static int peer_buffer_credits = 0;
+static int peer_buffer_credits;
module_param(peer_buffer_credits, int, 0444);
MODULE_PARM_DESC(peer_buffer_credits, "# per-peer router buffer credits");
module_param(keepalive, int, 0644);
MODULE_PARM_DESC(keepalive, "Idle time in seconds before sending a keepalive");
-static int ib_mtu = 0;
+static int ib_mtu;
module_param(ib_mtu, int, 0444);
MODULE_PARM_DESC(ib_mtu, "IB MTU 256/512/1024/2048/4096");
-static int concurrent_sends = 0;
+static int concurrent_sends;
module_param(concurrent_sends, int, 0444);
MODULE_PARM_DESC(concurrent_sends, "send work-queue sizing");
-static int map_on_demand = 0;
+static int map_on_demand;
module_param(map_on_demand, int, 0444);
MODULE_PARM_DESC(map_on_demand, "map on demand");
* 1: enable failover if necessary
* 2: force to failover (for debug)
*/
-static int dev_failover = 0;
+static int dev_failover;
module_param(dev_failover, int, 0444);
MODULE_PARM_DESC(dev_failover, "HCA failover for bonding (0 off, 1 on, other values reserved)");
-static int require_privileged_port = 0;
+static int require_privileged_port;
module_param(require_privileged_port, int, 0644);
MODULE_PARM_DESC(require_privileged_port, "require privileged port when accepting connection");
};
int
-kiblnd_tunables_init (void)
+kiblnd_tunables_init(void)
{
if (kiblnd_translate_mtu(*kiblnd_tunables.kib_ib_mtu) < 0) {
CERROR("Invalid ib_mtu %d, expected 256/512/1024/2048/4096\n",
}
static ksock_route_t *
-ksocknal_create_route (__u32 ipaddr, int port)
+ksocknal_create_route(__u32 ipaddr, int port)
{
ksock_route_t *route;
- LIBCFS_ALLOC (route, sizeof (*route));
+ LIBCFS_ALLOC(route, sizeof(*route));
if (route == NULL)
return NULL;
- atomic_set (&route->ksnr_refcount, 1);
+ atomic_set(&route->ksnr_refcount, 1);
route->ksnr_peer = NULL;
route->ksnr_retry_interval = 0; /* OK to connect at any time */
route->ksnr_ipaddr = ipaddr;
}
void
-ksocknal_destroy_route (ksock_route_t *route)
+ksocknal_destroy_route(ksock_route_t *route)
{
- LASSERT (atomic_read(&route->ksnr_refcount) == 0);
+ LASSERT(atomic_read(&route->ksnr_refcount) == 0);
if (route->ksnr_peer != NULL)
ksocknal_peer_decref(route->ksnr_peer);
- LIBCFS_FREE (route, sizeof (*route));
+ LIBCFS_FREE(route, sizeof(*route));
}
static int
-ksocknal_create_peer (ksock_peer_t **peerp, lnet_ni_t *ni, lnet_process_id_t id)
+ksocknal_create_peer(ksock_peer_t **peerp, lnet_ni_t *ni, lnet_process_id_t id)
{
ksock_net_t *net = ni->ni_data;
ksock_peer_t *peer;
- LASSERT (id.nid != LNET_NID_ANY);
- LASSERT (id.pid != LNET_PID_ANY);
- LASSERT (!in_interrupt());
+ LASSERT(id.nid != LNET_NID_ANY);
+ LASSERT(id.pid != LNET_PID_ANY);
+ LASSERT(!in_interrupt());
- LIBCFS_ALLOC (peer, sizeof (*peer));
+ LIBCFS_ALLOC(peer, sizeof(*peer));
if (peer == NULL)
return -ENOMEM;
peer->ksnp_ni = ni;
peer->ksnp_id = id;
- atomic_set (&peer->ksnp_refcount, 1); /* 1 ref for caller */
+ atomic_set(&peer->ksnp_refcount, 1); /* 1 ref for caller */
peer->ksnp_closing = 0;
peer->ksnp_accepting = 0;
peer->ksnp_proto = NULL;
peer->ksnp_last_alive = 0;
peer->ksnp_zc_next_cookie = SOCKNAL_KEEPALIVE_PING + 1;
- INIT_LIST_HEAD (&peer->ksnp_conns);
- INIT_LIST_HEAD (&peer->ksnp_routes);
- INIT_LIST_HEAD (&peer->ksnp_tx_queue);
- INIT_LIST_HEAD (&peer->ksnp_zc_req_list);
+ INIT_LIST_HEAD(&peer->ksnp_conns);
+ INIT_LIST_HEAD(&peer->ksnp_routes);
+ INIT_LIST_HEAD(&peer->ksnp_tx_queue);
+ INIT_LIST_HEAD(&peer->ksnp_zc_req_list);
spin_lock_init(&peer->ksnp_lock);
spin_lock_bh(&net->ksnn_lock);
}
void
-ksocknal_destroy_peer (ksock_peer_t *peer)
+ksocknal_destroy_peer(ksock_peer_t *peer)
{
ksock_net_t *net = peer->ksnp_ni->ni_data;
- CDEBUG (D_NET, "peer %s %p deleted\n",
+ CDEBUG(D_NET, "peer %s %p deleted\n",
libcfs_id2str(peer->ksnp_id), peer);
- LASSERT (atomic_read (&peer->ksnp_refcount) == 0);
- LASSERT (peer->ksnp_accepting == 0);
- LASSERT (list_empty (&peer->ksnp_conns));
- LASSERT (list_empty (&peer->ksnp_routes));
- LASSERT (list_empty (&peer->ksnp_tx_queue));
- LASSERT (list_empty (&peer->ksnp_zc_req_list));
+ LASSERT(atomic_read(&peer->ksnp_refcount) == 0);
+ LASSERT(peer->ksnp_accepting == 0);
+ LASSERT(list_empty(&peer->ksnp_conns));
+ LASSERT(list_empty(&peer->ksnp_routes));
+ LASSERT(list_empty(&peer->ksnp_tx_queue));
+ LASSERT(list_empty(&peer->ksnp_zc_req_list));
- LIBCFS_FREE (peer, sizeof (*peer));
+ LIBCFS_FREE(peer, sizeof(*peer));
/* NB a peer's connections and routes keep a reference on their peer
* until they are destroyed, so we can be assured that _all_ state to
}
ksock_peer_t *
-ksocknal_find_peer_locked (lnet_ni_t *ni, lnet_process_id_t id)
+ksocknal_find_peer_locked(lnet_ni_t *ni, lnet_process_id_t id)
{
struct list_head *peer_list = ksocknal_nid2peerlist(id.nid);
struct list_head *tmp;
ksock_peer_t *peer;
- list_for_each (tmp, peer_list) {
+ list_for_each(tmp, peer_list) {
- peer = list_entry (tmp, ksock_peer_t, ksnp_list);
+ peer = list_entry(tmp, ksock_peer_t, ksnp_list);
- LASSERT (!peer->ksnp_closing);
+ LASSERT(!peer->ksnp_closing);
if (peer->ksnp_ni != ni)
continue;
}
ksock_peer_t *
-ksocknal_find_peer (lnet_ni_t *ni, lnet_process_id_t id)
+ksocknal_find_peer(lnet_ni_t *ni, lnet_process_id_t id)
{
ksock_peer_t *peer;
}
static void
-ksocknal_unlink_peer_locked (ksock_peer_t *peer)
+ksocknal_unlink_peer_locked(ksock_peer_t *peer)
{
int i;
__u32 ip;
ksock_interface_t *iface;
for (i = 0; i < peer->ksnp_n_passive_ips; i++) {
- LASSERT (i < LNET_MAX_INTERFACES);
+ LASSERT(i < LNET_MAX_INTERFACES);
ip = peer->ksnp_passive_ips[i];
iface = ksocknal_ip2iface(peer->ksnp_ni, ip);
/* All IPs in peer->ksnp_passive_ips[] come from the
* interface list, therefore the call must succeed. */
- LASSERT (iface != NULL);
+ LASSERT(iface != NULL);
CDEBUG(D_NET, "peer=%p iface=%p ksni_nroutes=%d\n",
peer, iface, iface->ksni_nroutes);
iface->ksni_npeers--;
}
- LASSERT (list_empty(&peer->ksnp_conns));
- LASSERT (list_empty(&peer->ksnp_routes));
- LASSERT (!peer->ksnp_closing);
+ LASSERT(list_empty(&peer->ksnp_conns));
+ LASSERT(list_empty(&peer->ksnp_routes));
+ LASSERT(!peer->ksnp_closing);
peer->ksnp_closing = 1;
- list_del (&peer->ksnp_list);
+ list_del(&peer->ksnp_list);
/* lose peerlist's ref */
ksocknal_peer_decref(peer);
}
static int
-ksocknal_get_peer_info (lnet_ni_t *ni, int index,
+ksocknal_get_peer_info(lnet_ni_t *ni, int index,
lnet_process_id_t *id, __u32 *myip, __u32 *peer_ip,
int *port, int *conn_count, int *share_count)
{
for (i = 0; i < ksocknal_data.ksnd_peer_hash_size; i++) {
- list_for_each (ptmp, &ksocknal_data.ksnd_peers[i]) {
- peer = list_entry (ptmp, ksock_peer_t, ksnp_list);
+ list_for_each(ptmp, &ksocknal_data.ksnd_peers[i]) {
+ peer = list_entry(ptmp, ksock_peer_t, ksnp_list);
if (peer->ksnp_ni != ni)
continue;
goto out;
}
- list_for_each (rtmp, &peer->ksnp_routes) {
+ list_for_each(rtmp, &peer->ksnp_routes) {
if (index-- > 0)
continue;
}
static void
-ksocknal_add_route_locked (ksock_peer_t *peer, ksock_route_t *route)
+ksocknal_add_route_locked(ksock_peer_t *peer, ksock_route_t *route)
{
struct list_head *tmp;
ksock_conn_t *conn;
ksock_route_t *route2;
- LASSERT (!peer->ksnp_closing);
- LASSERT (route->ksnr_peer == NULL);
- LASSERT (!route->ksnr_scheduled);
- LASSERT (!route->ksnr_connecting);
- LASSERT (route->ksnr_connected == 0);
+ LASSERT(!peer->ksnp_closing);
+ LASSERT(route->ksnr_peer == NULL);
+ LASSERT(!route->ksnr_scheduled);
+ LASSERT(!route->ksnr_connecting);
+ LASSERT(route->ksnr_connected == 0);
/* LASSERT(unique) */
list_for_each(tmp, &peer->ksnp_routes) {
}
static void
-ksocknal_del_route_locked (ksock_route_t *route)
+ksocknal_del_route_locked(ksock_route_t *route)
{
ksock_peer_t *peer = route->ksnr_peer;
ksock_interface_t *iface;
struct list_head *ctmp;
struct list_head *cnxt;
- LASSERT (!route->ksnr_deleted);
+ LASSERT(!route->ksnr_deleted);
/* Close associated conns */
- list_for_each_safe (ctmp, cnxt, &peer->ksnp_conns) {
+ list_for_each_safe(ctmp, cnxt, &peer->ksnp_conns) {
conn = list_entry(ctmp, ksock_conn_t, ksnc_list);
if (conn->ksnc_route != route)
continue;
- ksocknal_close_conn_locked (conn, 0);
+ ksocknal_close_conn_locked(conn, 0);
}
if (route->ksnr_myipaddr != 0) {
}
route->ksnr_deleted = 1;
- list_del (&route->ksnr_list);
+ list_del(&route->ksnr_list);
ksocknal_route_decref(route); /* drop peer's ref */
- if (list_empty (&peer->ksnp_routes) &&
- list_empty (&peer->ksnp_conns)) {
+ if (list_empty(&peer->ksnp_routes) &&
+ list_empty(&peer->ksnp_conns)) {
/* I've just removed the last route to a peer with no active
* connections */
- ksocknal_unlink_peer_locked (peer);
+ ksocknal_unlink_peer_locked(peer);
}
}
int
-ksocknal_add_peer (lnet_ni_t *ni, lnet_process_id_t id, __u32 ipaddr, int port)
+ksocknal_add_peer(lnet_ni_t *ni, lnet_process_id_t id, __u32 ipaddr, int port)
{
struct list_head *tmp;
ksock_peer_t *peer;
if (rc != 0)
return rc;
- route = ksocknal_create_route (ipaddr, port);
+ route = ksocknal_create_route(ipaddr, port);
if (route == NULL) {
ksocknal_peer_decref(peer);
return -ENOMEM;
write_lock_bh(&ksocknal_data.ksnd_global_lock);
/* always called with a ref on ni, so shutdown can't have started */
- LASSERT (((ksock_net_t *) ni->ni_data)->ksnn_shutdown == 0);
+ LASSERT(((ksock_net_t *) ni->ni_data)->ksnn_shutdown == 0);
- peer2 = ksocknal_find_peer_locked (ni, id);
+ peer2 = ksocknal_find_peer_locked(ni, id);
if (peer2 != NULL) {
ksocknal_peer_decref(peer);
peer = peer2;
} else {
/* peer table takes my ref on peer */
- list_add_tail (&peer->ksnp_list,
- ksocknal_nid2peerlist (id.nid));
+ list_add_tail(&peer->ksnp_list,
+ ksocknal_nid2peerlist(id.nid));
}
route2 = NULL;
- list_for_each (tmp, &peer->ksnp_routes) {
+ list_for_each(tmp, &peer->ksnp_routes) {
route2 = list_entry(tmp, ksock_route_t, ksnr_list);
if (route2->ksnr_ipaddr == ipaddr)
}
static void
-ksocknal_del_peer_locked (ksock_peer_t *peer, __u32 ip)
+ksocknal_del_peer_locked(ksock_peer_t *peer, __u32 ip)
{
ksock_conn_t *conn;
ksock_route_t *route;
struct list_head *nxt;
int nshared;
- LASSERT (!peer->ksnp_closing);
+ LASSERT(!peer->ksnp_closing);
/* Extra ref prevents peer disappearing until I'm done with it */
ksocknal_peer_addref(peer);
- list_for_each_safe (tmp, nxt, &peer->ksnp_routes) {
+ list_for_each_safe(tmp, nxt, &peer->ksnp_routes) {
route = list_entry(tmp, ksock_route_t, ksnr_list);
/* no match */
route->ksnr_share_count = 0;
/* This deletes associated conns too */
- ksocknal_del_route_locked (route);
+ ksocknal_del_route_locked(route);
}
nshared = 0;
- list_for_each_safe (tmp, nxt, &peer->ksnp_routes) {
+ list_for_each_safe(tmp, nxt, &peer->ksnp_routes) {
route = list_entry(tmp, ksock_route_t, ksnr_list);
nshared += route->ksnr_share_count;
}
/* remove everything else if there are no explicit entries
* left */
- list_for_each_safe (tmp, nxt, &peer->ksnp_routes) {
+ list_for_each_safe(tmp, nxt, &peer->ksnp_routes) {
route = list_entry(tmp, ksock_route_t, ksnr_list);
/* we should only be removing auto-entries */
LASSERT(route->ksnr_share_count == 0);
- ksocknal_del_route_locked (route);
+ ksocknal_del_route_locked(route);
}
- list_for_each_safe (tmp, nxt, &peer->ksnp_conns) {
+ list_for_each_safe(tmp, nxt, &peer->ksnp_conns) {
conn = list_entry(tmp, ksock_conn_t, ksnc_list);
ksocknal_close_conn_locked(conn, 0);
}
static int
-ksocknal_del_peer (lnet_ni_t *ni, lnet_process_id_t id, __u32 ip)
+ksocknal_del_peer(lnet_ni_t *ni, lnet_process_id_t id, __u32 ip)
{
- LIST_HEAD (zombies);
+ LIST_HEAD(zombies);
struct list_head *ptmp;
struct list_head *pnxt;
ksock_peer_t *peer;
}
for (i = lo; i <= hi; i++) {
- list_for_each_safe (ptmp, pnxt,
+ list_for_each_safe(ptmp, pnxt,
&ksocknal_data.ksnd_peers[i]) {
- peer = list_entry (ptmp, ksock_peer_t, ksnp_list);
+ peer = list_entry(ptmp, ksock_peer_t, ksnp_list);
if (peer->ksnp_ni != ni)
continue;
ksocknal_peer_addref(peer); /* a ref for me... */
- ksocknal_del_peer_locked (peer, ip);
+ ksocknal_del_peer_locked(peer, ip);
if (peer->ksnp_closing &&
!list_empty(&peer->ksnp_tx_queue)) {
- LASSERT (list_empty(&peer->ksnp_conns));
- LASSERT (list_empty(&peer->ksnp_routes));
+ LASSERT(list_empty(&peer->ksnp_conns));
+ LASSERT(list_empty(&peer->ksnp_routes));
list_splice_init(&peer->ksnp_tx_queue,
&zombies);
}
static ksock_conn_t *
-ksocknal_get_conn_by_idx (lnet_ni_t *ni, int index)
+ksocknal_get_conn_by_idx(lnet_ni_t *ni, int index)
{
ksock_peer_t *peer;
struct list_head *ptmp;
read_lock(&ksocknal_data.ksnd_global_lock);
for (i = 0; i < ksocknal_data.ksnd_peer_hash_size; i++) {
- list_for_each (ptmp, &ksocknal_data.ksnd_peers[i]) {
- peer = list_entry (ptmp, ksock_peer_t, ksnp_list);
+ list_for_each(ptmp, &ksocknal_data.ksnd_peers[i]) {
+ peer = list_entry(ptmp, ksock_peer_t, ksnp_list);
- LASSERT (!peer->ksnp_closing);
+ LASSERT(!peer->ksnp_closing);
if (peer->ksnp_ni != ni)
continue;
- list_for_each (ctmp, &peer->ksnp_conns) {
+ list_for_each(ctmp, &peer->ksnp_conns) {
if (index-- > 0)
continue;
- conn = list_entry (ctmp, ksock_conn_t,
+ conn = list_entry(ctmp, ksock_conn_t,
ksnc_list);
ksocknal_conn_addref(conn);
read_unlock(&ksocknal_data.ksnd_global_lock);
}
static int
-ksocknal_local_ipvec (lnet_ni_t *ni, __u32 *ipaddrs)
+ksocknal_local_ipvec(lnet_ni_t *ni, __u32 *ipaddrs)
{
ksock_net_t *net = ni->ni_data;
int i;
read_lock(&ksocknal_data.ksnd_global_lock);
nip = net->ksnn_ninterfaces;
- LASSERT (nip <= LNET_MAX_INTERFACES);
+ LASSERT(nip <= LNET_MAX_INTERFACES);
/* Only offer interfaces for additional connections if I have
* more than one. */
for (i = 0; i < nip; i++) {
ipaddrs[i] = net->ksnn_interfaces[i].ksni_ipaddr;
- LASSERT (ipaddrs[i] != 0);
+ LASSERT(ipaddrs[i] != 0);
}
read_unlock(&ksocknal_data.ksnd_global_lock);
}
static int
-ksocknal_match_peerip (ksock_interface_t *iface, __u32 *ips, int nips)
+ksocknal_match_peerip(ksock_interface_t *iface, __u32 *ips, int nips)
{
int best_netmatch = 0;
int best_xor = 0;
if (ips[i] == 0)
continue;
- this_xor = (ips[i] ^ iface->ksni_ipaddr);
+ this_xor = ips[i] ^ iface->ksni_ipaddr;
this_netmatch = ((this_xor & iface->ksni_netmask) == 0) ? 1 : 0;
if (!(best < 0 ||
best_xor = this_xor;
}
- LASSERT (best >= 0);
+ LASSERT(best >= 0);
return best;
}
write_lock_bh(global_lock);
- LASSERT (n_peerips <= LNET_MAX_INTERFACES);
- LASSERT (net->ksnn_ninterfaces <= LNET_MAX_INTERFACES);
+ LASSERT(n_peerips <= LNET_MAX_INTERFACES);
+ LASSERT(net->ksnn_ninterfaces <= LNET_MAX_INTERFACES);
/* Only match interfaces for additional connections
* if I have > 1 interface */
} else {
/* choose a new interface */
- LASSERT (i == peer->ksnp_n_passive_ips);
+ LASSERT(i == peer->ksnp_n_passive_ips);
best_iface = NULL;
best_netmatch = 0;
continue;
k = ksocknal_match_peerip(iface, peerips, n_peerips);
- xor = (ip ^ peerips[k]);
+ xor = ip ^ peerips[k];
this_netmatch = ((xor & iface->ksni_netmask) == 0) ? 1 : 0;
if (!(best_iface == NULL ||
return;
}
- LASSERT (npeer_ipaddrs <= LNET_MAX_INTERFACES);
+ LASSERT(npeer_ipaddrs <= LNET_MAX_INTERFACES);
for (i = 0; i < npeer_ipaddrs; i++) {
if (newroute != NULL) {
best_nroutes = 0;
best_netmatch = 0;
- LASSERT (net->ksnn_ninterfaces <= LNET_MAX_INTERFACES);
+ LASSERT(net->ksnn_ninterfaces <= LNET_MAX_INTERFACES);
/* Select interface to connect from */
for (j = 0; j < net->ksnn_ninterfaces; j++) {
}
int
-ksocknal_accept (lnet_ni_t *ni, struct socket *sock)
+ksocknal_accept(lnet_ni_t *ni, struct socket *sock)
{
ksock_connreq_t *cr;
int rc;
int peer_port;
rc = libcfs_sock_getaddr(sock, 1, &peer_ip, &peer_port);
- LASSERT (rc == 0); /* we succeeded before */
+ LASSERT(rc == 0); /* we succeeded before */
LIBCFS_ALLOC(cr, sizeof(*cr));
if (cr == NULL) {
}
static int
-ksocknal_connecting (ksock_peer_t *peer, __u32 ipaddr)
+ksocknal_connecting(ksock_peer_t *peer, __u32 ipaddr)
{
ksock_route_t *route;
- list_for_each_entry (route, &peer->ksnp_routes, ksnr_list) {
+ list_for_each_entry(route, &peer->ksnp_routes, ksnr_list) {
if (route->ksnr_ipaddr == ipaddr)
return route->ksnr_connecting;
}
int
-ksocknal_create_conn (lnet_ni_t *ni, ksock_route_t *route,
+ksocknal_create_conn(lnet_ni_t *ni, ksock_route_t *route,
struct socket *sock, int type)
{
rwlock_t *global_lock = &ksocknal_data.ksnd_global_lock;
- LIST_HEAD (zombies);
+ LIST_HEAD(zombies);
lnet_process_id_t peerid;
struct list_head *tmp;
__u64 incarnation;
active = (route != NULL);
- LASSERT (active == (type != SOCKLND_CONN_NONE));
+ LASSERT(active == (type != SOCKLND_CONN_NONE));
LIBCFS_ALLOC(conn, sizeof(*conn));
if (conn == NULL) {
conn->ksnc_sock = sock;
/* 2 ref, 1 for conn, another extra ref prevents socket
* being closed before establishment of connection */
- atomic_set (&conn->ksnc_sock_refcount, 2);
+ atomic_set(&conn->ksnc_sock_refcount, 2);
conn->ksnc_type = type;
ksocknal_lib_save_callback(sock, conn);
- atomic_set (&conn->ksnc_conn_refcount, 1); /* 1 ref for me */
+ atomic_set(&conn->ksnc_conn_refcount, 1); /* 1 ref for me */
conn->ksnc_rx_ready = 0;
conn->ksnc_rx_scheduled = 0;
- INIT_LIST_HEAD (&conn->ksnc_tx_queue);
+ INIT_LIST_HEAD(&conn->ksnc_tx_queue);
conn->ksnc_tx_ready = 0;
conn->ksnc_tx_scheduled = 0;
conn->ksnc_tx_carrier = NULL;
- atomic_set (&conn->ksnc_tx_nob, 0);
+ atomic_set(&conn->ksnc_tx_nob, 0);
LIBCFS_ALLOC(hello, offsetof(ksock_hello_msg_t,
kshm_ips[LNET_MAX_INTERFACES]));
}
/* stash conn's local and remote addrs */
- rc = ksocknal_lib_get_conn_addrs (conn);
+ rc = ksocknal_lib_get_conn_addrs(conn);
if (rc != 0)
goto failed_1;
#endif
}
- rc = ksocknal_send_hello (ni, conn, peerid.nid, hello);
+ rc = ksocknal_send_hello(ni, conn, peerid.nid, hello);
if (rc != 0)
goto failed_1;
} else {
conn->ksnc_proto = NULL;
}
- rc = ksocknal_recv_hello (ni, conn, hello, &peerid, &incarnation);
+ rc = ksocknal_recv_hello(ni, conn, hello, &peerid, &incarnation);
if (rc < 0)
goto failed_1;
- LASSERT (rc == 0 || active);
- LASSERT (conn->ksnc_proto != NULL);
- LASSERT (peerid.nid != LNET_NID_ANY);
+ LASSERT(rc == 0 || active);
+ LASSERT(conn->ksnc_proto != NULL);
+ LASSERT(peerid.nid != LNET_NID_ANY);
cpt = lnet_cpt_of_nid(peerid.nid);
write_lock_bh(global_lock);
/* called with a ref on ni, so shutdown can't have started */
- LASSERT (((ksock_net_t *) ni->ni_data)->ksnn_shutdown == 0);
+ LASSERT(((ksock_net_t *) ni->ni_data)->ksnn_shutdown == 0);
peer2 = ksocknal_find_peer_locked(ni, peerid);
if (peer2 == NULL) {
* NB recv_hello may have returned EPROTO to signal my peer
* wants a different protocol than the one I asked for.
*/
- LASSERT (list_empty(&peer->ksnp_conns));
+ LASSERT(list_empty(&peer->ksnp_conns));
peer->ksnp_proto = conn->ksnc_proto;
peer->ksnp_incarnation = incarnation;
/* Reply on a passive connection attempt so the peer
* realises we're connected. */
- LASSERT (rc == 0);
+ LASSERT(rc == 0);
if (!active)
rc = EALREADY;
* create an association. This allows incoming connections created
* by routes in my peer to match my own route entries so I don't
* continually create duplicate routes. */
- list_for_each (tmp, &peer->ksnp_routes) {
+ list_for_each(tmp, &peer->ksnp_routes) {
route = list_entry(tmp, ksock_route_t, ksnr_list);
if (route->ksnr_ipaddr != conn->ksnc_ipaddr)
conn->ksnc_tx_deadline = cfs_time_shift(*ksocknal_tunables.ksnd_timeout);
mb(); /* order with adding to peer's conn list */
- list_add (&conn->ksnc_list, &peer->ksnp_conns);
+ list_add(&conn->ksnc_list, &peer->ksnp_conns);
ksocknal_conn_addref(conn);
ksocknal_new_packet(conn, 0);
if (conn->ksnc_proto->pro_match_tx(conn, tx, tx->tx_nonblk) == SOCKNAL_MATCH_NO)
continue;
- list_del (&tx->tx_list);
- ksocknal_queue_tx_locked (tx, conn);
+ list_del(&tx->tx_list);
+ ksocknal_queue_tx_locked(tx, conn);
}
write_unlock_bh(global_lock);
failed_2:
if (!peer->ksnp_closing &&
- list_empty (&peer->ksnp_conns) &&
- list_empty (&peer->ksnp_routes)) {
+ list_empty(&peer->ksnp_conns) &&
+ list_empty(&peer->ksnp_routes)) {
list_add(&zombies, &peer->ksnp_tx_queue);
list_del_init(&peer->ksnp_tx_queue);
ksocknal_unlink_peer_locked(peer);
LIBCFS_FREE(hello, offsetof(ksock_hello_msg_t,
kshm_ips[LNET_MAX_INTERFACES]));
- LIBCFS_FREE (conn, sizeof(*conn));
+ LIBCFS_FREE(conn, sizeof(*conn));
failed_0:
libcfs_sock_release(sock);
}
void
-ksocknal_close_conn_locked (ksock_conn_t *conn, int error)
+ksocknal_close_conn_locked(ksock_conn_t *conn, int error)
{
/* This just does the immmediate housekeeping, and queues the
* connection for the reaper to terminate.
ksock_conn_t *conn2;
struct list_head *tmp;
- LASSERT (peer->ksnp_error == 0);
- LASSERT (!conn->ksnc_closing);
+ LASSERT(peer->ksnp_error == 0);
+ LASSERT(!conn->ksnc_closing);
conn->ksnc_closing = 1;
/* ksnd_deathrow_conns takes over peer's ref */
- list_del (&conn->ksnc_list);
+ list_del(&conn->ksnc_list);
route = conn->ksnc_route;
if (route != NULL) {
/* dissociate conn from route... */
- LASSERT (!route->ksnr_deleted);
- LASSERT ((route->ksnr_connected & (1 << conn->ksnc_type)) != 0);
+ LASSERT(!route->ksnr_deleted);
+ LASSERT((route->ksnr_connected & (1 << conn->ksnc_type)) != 0);
conn2 = NULL;
list_for_each(tmp, &peer->ksnp_conns) {
#if 0 /* irrelevant with only eager routes */
/* make route least favourite */
- list_del (&route->ksnr_list);
- list_add_tail (&route->ksnr_list, &peer->ksnp_routes);
+ list_del(&route->ksnr_list);
+ list_add_tail(&route->ksnr_list, &peer->ksnp_routes);
#endif
ksocknal_route_decref(route); /* drop conn's ref on route */
}
- if (list_empty (&peer->ksnp_conns)) {
+ if (list_empty(&peer->ksnp_conns)) {
/* No more connections to this peer */
if (!list_empty(&peer->ksnp_tx_queue)) {
ksock_tx_t *tx;
- LASSERT (conn->ksnc_proto == &ksocknal_protocol_v3x);
+ LASSERT(conn->ksnc_proto == &ksocknal_protocol_v3x);
/* throw them to the last connection...,
* these TXs will be send to /dev/null by scheduler */
peer->ksnp_proto = NULL; /* renegotiate protocol version */
peer->ksnp_error = error; /* stash last conn close reason */
- if (list_empty (&peer->ksnp_routes)) {
+ if (list_empty(&peer->ksnp_routes)) {
/* I've just closed last conn belonging to a
* peer with no routes to it */
- ksocknal_unlink_peer_locked (peer);
+ ksocknal_unlink_peer_locked(peer);
}
}
}
void
-ksocknal_peer_failed (ksock_peer_t *peer)
+ksocknal_peer_failed(ksock_peer_t *peer)
{
int notify = 0;
unsigned long last_alive = 0;
read_unlock(&ksocknal_data.ksnd_global_lock);
if (notify)
- lnet_notify (peer->ksnp_ni, peer->ksnp_id.nid, 0,
+ lnet_notify(peer->ksnp_ni, peer->ksnp_id.nid, 0,
last_alive);
}
ksock_peer_t *peer = conn->ksnc_peer;
ksock_tx_t *tx;
ksock_tx_t *tmp;
- LIST_HEAD (zlist);
+ LIST_HEAD(zlist);
/* NB safe to finalize TXs because closing of socket will
* abort all buffered data */
- LASSERT (conn->ksnc_sock == NULL);
+ LASSERT(conn->ksnc_sock == NULL);
spin_lock(&peer->ksnp_lock);
if (tx->tx_conn != conn)
continue;
- LASSERT (tx->tx_msg.ksm_zc_cookies[0] != 0);
+ LASSERT(tx->tx_msg.ksm_zc_cookies[0] != 0);
tx->tx_msg.ksm_zc_cookies[0] = 0;
tx->tx_zc_aborted = 1; /* mark it as not-acked */
}
void
-ksocknal_terminate_conn (ksock_conn_t *conn)
+ksocknal_terminate_conn(ksock_conn_t *conn)
{
/* This gets called by the reaper (guaranteed thread context) to
* disengage the socket from its callbacks and close it.
if (!conn->ksnc_tx_scheduled &&
!list_empty(&conn->ksnc_tx_queue)) {
- list_add_tail (&conn->ksnc_tx_list,
+ list_add_tail(&conn->ksnc_tx_list,
&sched->kss_tx_conns);
conn->ksnc_tx_scheduled = 1;
/* extra ref for scheduler */
ksocknal_conn_addref(conn);
- wake_up (&sched->kss_waitq);
+ wake_up(&sched->kss_waitq);
}
spin_unlock_bh(&sched->kss_lock);
if (peer->ksnp_error != 0) {
/* peer's last conn closed in error */
- LASSERT (list_empty (&peer->ksnp_conns));
+ LASSERT(list_empty(&peer->ksnp_conns));
failed = 1;
peer->ksnp_error = 0; /* avoid multiple notifications */
}
}
void
-ksocknal_queue_zombie_conn (ksock_conn_t *conn)
+ksocknal_queue_zombie_conn(ksock_conn_t *conn)
{
/* Queue the conn for the reaper to destroy */
}
void
-ksocknal_destroy_conn (ksock_conn_t *conn)
+ksocknal_destroy_conn(ksock_conn_t *conn)
{
unsigned long last_rcv;
/* Final coup-de-grace of the reaper */
- CDEBUG (D_NET, "connection %p\n", conn);
+ CDEBUG(D_NET, "connection %p\n", conn);
- LASSERT (atomic_read (&conn->ksnc_conn_refcount) == 0);
- LASSERT (atomic_read (&conn->ksnc_sock_refcount) == 0);
- LASSERT (conn->ksnc_sock == NULL);
- LASSERT (conn->ksnc_route == NULL);
- LASSERT (!conn->ksnc_tx_scheduled);
- LASSERT (!conn->ksnc_rx_scheduled);
- LASSERT (list_empty(&conn->ksnc_tx_queue));
+ LASSERT(atomic_read(&conn->ksnc_conn_refcount) == 0);
+ LASSERT(atomic_read(&conn->ksnc_sock_refcount) == 0);
+ LASSERT(conn->ksnc_sock == NULL);
+ LASSERT(conn->ksnc_route == NULL);
+ LASSERT(!conn->ksnc_tx_scheduled);
+ LASSERT(!conn->ksnc_rx_scheduled);
+ LASSERT(list_empty(&conn->ksnc_tx_queue));
/* complete current receive if any */
switch (conn->ksnc_rx_state) {
conn->ksnc_rx_nob_wanted, conn->ksnc_rx_nob_left,
cfs_duration_sec(cfs_time_sub(cfs_time_current(),
last_rcv)));
- lnet_finalize (conn->ksnc_peer->ksnp_ni,
+ lnet_finalize(conn->ksnc_peer->ksnp_ni,
conn->ksnc_cookie, -EIO);
break;
case SOCKNAL_RX_LNET_HEADER:
&conn->ksnc_ipaddr, conn->ksnc_port);
break;
default:
- LBUG ();
+ LBUG();
break;
}
ksocknal_peer_decref(conn->ksnc_peer);
- LIBCFS_FREE (conn, sizeof (*conn));
+ LIBCFS_FREE(conn, sizeof(*conn));
}
int
-ksocknal_close_peer_conns_locked (ksock_peer_t *peer, __u32 ipaddr, int why)
+ksocknal_close_peer_conns_locked(ksock_peer_t *peer, __u32 ipaddr, int why)
{
ksock_conn_t *conn;
struct list_head *ctmp;
struct list_head *cnxt;
int count = 0;
- list_for_each_safe (ctmp, cnxt, &peer->ksnp_conns) {
- conn = list_entry (ctmp, ksock_conn_t, ksnc_list);
+ list_for_each_safe(ctmp, cnxt, &peer->ksnp_conns) {
+ conn = list_entry(ctmp, ksock_conn_t, ksnc_list);
if (ipaddr == 0 ||
conn->ksnc_ipaddr == ipaddr) {
count++;
- ksocknal_close_conn_locked (conn, why);
+ ksocknal_close_conn_locked(conn, why);
}
}
}
int
-ksocknal_close_conn_and_siblings (ksock_conn_t *conn, int why)
+ksocknal_close_conn_and_siblings(ksock_conn_t *conn, int why)
{
ksock_peer_t *peer = conn->ksnc_peer;
__u32 ipaddr = conn->ksnc_ipaddr;
write_lock_bh(&ksocknal_data.ksnd_global_lock);
- count = ksocknal_close_peer_conns_locked (peer, ipaddr, why);
+ count = ksocknal_close_peer_conns_locked(peer, ipaddr, why);
write_unlock_bh(&ksocknal_data.ksnd_global_lock);
}
int
-ksocknal_close_matching_conns (lnet_process_id_t id, __u32 ipaddr)
+ksocknal_close_matching_conns(lnet_process_id_t id, __u32 ipaddr)
{
ksock_peer_t *peer;
struct list_head *ptmp;
}
for (i = lo; i <= hi; i++) {
- list_for_each_safe (ptmp, pnxt,
+ list_for_each_safe(ptmp, pnxt,
&ksocknal_data.ksnd_peers[i]) {
- peer = list_entry (ptmp, ksock_peer_t, ksnp_list);
+ peer = list_entry(ptmp, ksock_peer_t, ksnp_list);
if (!((id.nid == LNET_NID_ANY || id.nid == peer->ksnp_id.nid) &&
(id.pid == LNET_PID_ANY || id.pid == peer->ksnp_id.pid)))
continue;
- count += ksocknal_close_peer_conns_locked (peer, ipaddr, 0);
+ count += ksocknal_close_peer_conns_locked(peer, ipaddr, 0);
}
}
}
void
-ksocknal_notify (lnet_ni_t *ni, lnet_nid_t gw_nid, int alive)
+ksocknal_notify(lnet_ni_t *ni, lnet_nid_t gw_nid, int alive)
{
/* The router is telling me she's been notified of a change in
* gateway state.... */
id.nid = gw_nid;
id.pid = LNET_PID_ANY;
- CDEBUG (D_NET, "gw %s %s\n", libcfs_nid2str(gw_nid),
+ CDEBUG(D_NET, "gw %s %s\n", libcfs_nid2str(gw_nid),
alive ? "up" : "down");
if (!alive) {
/* If the gateway crashed, close all open connections... */
- ksocknal_close_matching_conns (id, 0);
+ ksocknal_close_matching_conns(id, 0);
return;
}
}
void
-ksocknal_query (lnet_ni_t *ni, lnet_nid_t nid, unsigned long *when)
+ksocknal_query(lnet_ni_t *ni, lnet_nid_t nid, unsigned long *when)
{
int connect = 1;
unsigned long last_alive = 0;
ksock_conn_t *conn;
int bufnob;
- list_for_each (tmp, &peer->ksnp_conns) {
+ list_for_each(tmp, &peer->ksnp_conns) {
conn = list_entry(tmp, ksock_conn_t, ksnc_list);
bufnob = conn->ksnc_sock->sk->sk_wmem_queued;
}
static void
-ksocknal_push_peer (ksock_peer_t *peer)
+ksocknal_push_peer(ksock_peer_t *peer)
{
int index;
int i;
i = 0;
conn = NULL;
- list_for_each (tmp, &peer->ksnp_conns) {
+ list_for_each(tmp, &peer->ksnp_conns) {
if (i++ == index) {
- conn = list_entry (tmp, ksock_conn_t,
+ conn = list_entry(tmp, ksock_conn_t,
ksnc_list);
ksocknal_conn_addref(conn);
break;
if (conn == NULL)
break;
- ksocknal_lib_push_conn (conn);
+ ksocknal_lib_push_conn(conn);
ksocknal_conn_decref(conn);
}
}
static int
-ksocknal_push (lnet_ni_t *ni, lnet_process_id_t id)
+ksocknal_push(lnet_ni_t *ni, lnet_process_id_t id)
{
ksock_peer_t *peer;
struct list_head *tmp;
index = 0;
peer = NULL;
- list_for_each (tmp, &ksocknal_data.ksnd_peers[i]) {
+ list_for_each(tmp, &ksocknal_data.ksnd_peers[i]) {
peer = list_entry(tmp, ksock_peer_t,
ksnp_list);
if (peer != NULL) {
rc = 0;
- ksocknal_push_peer (peer);
+ ksocknal_push_peer(peer);
ksocknal_peer_decref(peer);
}
}
}
list_for_each_safe(tmp, nxt, &peer->ksnp_routes) {
- route = list_entry (tmp, ksock_route_t, ksnr_list);
+ route = list_entry(tmp, ksock_route_t, ksnr_list);
if (route->ksnr_myipaddr != ipaddr)
continue;
conn = list_entry(tmp, ksock_conn_t, ksnc_list);
if (conn->ksnc_myipaddr == ipaddr)
- ksocknal_close_conn_locked (conn, 0);
+ ksocknal_close_conn_locked(conn, 0);
}
}
case IOC_LIBCFS_ADD_PEER:
id.nid = data->ioc_nid;
id.pid = LUSTRE_SRV_LNET_PID;
- return ksocknal_add_peer (ni, id,
+ return ksocknal_add_peer(ni, id,
data->ioc_u32[0], /* IP */
data->ioc_u32[1]); /* port */
case IOC_LIBCFS_DEL_PEER:
id.nid = data->ioc_nid;
id.pid = LNET_PID_ANY;
- return ksocknal_del_peer (ni, id,
+ return ksocknal_del_peer(ni, id,
data->ioc_u32[0]); /* IP */
case IOC_LIBCFS_GET_CONN: {
int txmem;
int rxmem;
int nagle;
- ksock_conn_t *conn = ksocknal_get_conn_by_idx (ni, data->ioc_count);
+ ksock_conn_t *conn = ksocknal_get_conn_by_idx(ni, data->ioc_count);
if (conn == NULL)
return -ENOENT;
case IOC_LIBCFS_CLOSE_CONNECTION:
id.nid = data->ioc_nid;
id.pid = LNET_PID_ANY;
- return ksocknal_close_matching_conns (id,
+ return ksocknal_close_matching_conns(id,
data->ioc_u32[0]);
case IOC_LIBCFS_REGISTER_MYNID:
}
static void
-ksocknal_free_buffers (void)
+ksocknal_free_buffers(void)
{
- LASSERT (atomic_read(&ksocknal_data.ksnd_nactive_txs) == 0);
+ LASSERT(atomic_read(&ksocknal_data.ksnd_nactive_txs) == 0);
if (ksocknal_data.ksnd_sched_info != NULL) {
struct ksock_sched_info *info;
cfs_percpt_free(ksocknal_data.ksnd_sched_info);
}
- LIBCFS_FREE (ksocknal_data.ksnd_peers,
- sizeof (struct list_head) *
+ LIBCFS_FREE(ksocknal_data.ksnd_peers,
+ sizeof(struct list_head) *
ksocknal_data.ksnd_peer_hash_size);
spin_lock(&ksocknal_data.ksnd_tx_lock);
int j;
CDEBUG(D_MALLOC, "before NAL cleanup: kmem %d\n",
- atomic_read (&libcfs_kmemory));
- LASSERT (ksocknal_data.ksnd_nnets == 0);
+ atomic_read(&libcfs_kmemory));
+ LASSERT(ksocknal_data.ksnd_nnets == 0);
switch (ksocknal_data.ksnd_init) {
default:
- LASSERT (0);
+ LASSERT(0);
case SOCKNAL_INIT_ALL:
case SOCKNAL_INIT_DATA:
- LASSERT (ksocknal_data.ksnd_peers != NULL);
+ LASSERT(ksocknal_data.ksnd_peers != NULL);
for (i = 0; i < ksocknal_data.ksnd_peer_hash_size; i++) {
- LASSERT (list_empty (&ksocknal_data.ksnd_peers[i]));
+ LASSERT(list_empty(&ksocknal_data.ksnd_peers[i]));
}
LASSERT(list_empty(&ksocknal_data.ksnd_nets));
- LASSERT (list_empty (&ksocknal_data.ksnd_enomem_conns));
- LASSERT (list_empty (&ksocknal_data.ksnd_zombie_conns));
- LASSERT (list_empty (&ksocknal_data.ksnd_connd_connreqs));
- LASSERT (list_empty (&ksocknal_data.ksnd_connd_routes));
+ LASSERT(list_empty(&ksocknal_data.ksnd_enomem_conns));
+ LASSERT(list_empty(&ksocknal_data.ksnd_zombie_conns));
+ LASSERT(list_empty(&ksocknal_data.ksnd_connd_connreqs));
+ LASSERT(list_empty(&ksocknal_data.ksnd_connd_routes));
if (ksocknal_data.ksnd_sched_info != NULL) {
cfs_percpt_for_each(info, i,
}
CDEBUG(D_MALLOC, "after NAL cleanup: kmem %d\n",
- atomic_read (&libcfs_kmemory));
+ atomic_read(&libcfs_kmemory));
module_put(THIS_MODULE);
}
static __u64
-ksocknal_new_incarnation (void)
+ksocknal_new_incarnation(void)
{
/* The incarnation number is the time this module loaded and it
int rc;
int i;
- LASSERT (ksocknal_data.ksnd_init == SOCKNAL_INIT_NOTHING);
- LASSERT (ksocknal_data.ksnd_nnets == 0);
+ LASSERT(ksocknal_data.ksnd_init == SOCKNAL_INIT_NOTHING);
+ LASSERT(ksocknal_data.ksnd_nnets == 0);
- memset (&ksocknal_data, 0, sizeof (ksocknal_data)); /* zero pointers */
+ memset(&ksocknal_data, 0, sizeof(ksocknal_data)); /* zero pointers */
ksocknal_data.ksnd_peer_hash_size = SOCKNAL_PEER_HASH_SIZE;
- LIBCFS_ALLOC (ksocknal_data.ksnd_peers,
- sizeof (struct list_head) *
+ LIBCFS_ALLOC(ksocknal_data.ksnd_peers,
+ sizeof(struct list_head) *
ksocknal_data.ksnd_peer_hash_size);
if (ksocknal_data.ksnd_peers == NULL)
return -ENOMEM;
INIT_LIST_HEAD(&ksocknal_data.ksnd_nets);
spin_lock_init(&ksocknal_data.ksnd_reaper_lock);
- INIT_LIST_HEAD (&ksocknal_data.ksnd_enomem_conns);
- INIT_LIST_HEAD (&ksocknal_data.ksnd_zombie_conns);
- INIT_LIST_HEAD (&ksocknal_data.ksnd_deathrow_conns);
+ INIT_LIST_HEAD(&ksocknal_data.ksnd_enomem_conns);
+ INIT_LIST_HEAD(&ksocknal_data.ksnd_zombie_conns);
+ INIT_LIST_HEAD(&ksocknal_data.ksnd_deathrow_conns);
init_waitqueue_head(&ksocknal_data.ksnd_reaper_waitq);
spin_lock_init(&ksocknal_data.ksnd_connd_lock);
- INIT_LIST_HEAD (&ksocknal_data.ksnd_connd_connreqs);
- INIT_LIST_HEAD (&ksocknal_data.ksnd_connd_routes);
+ INIT_LIST_HEAD(&ksocknal_data.ksnd_connd_connreqs);
+ INIT_LIST_HEAD(&ksocknal_data.ksnd_connd_routes);
init_waitqueue_head(&ksocknal_data.ksnd_connd_waitq);
spin_lock_init(&ksocknal_data.ksnd_tx_lock);
- INIT_LIST_HEAD (&ksocknal_data.ksnd_idle_noop_txs);
+ INIT_LIST_HEAD(&ksocknal_data.ksnd_idle_noop_txs);
/* NB memset above zeros whole of ksocknal_data */
rc = ksocknal_thread_start(ksocknal_reaper, NULL, "socknal_reaper");
if (rc != 0) {
- CERROR ("Can't spawn socknal reaper: %d\n", rc);
+ CERROR("Can't spawn socknal reaper: %d\n", rc);
goto failed;
}
}
static void
-ksocknal_debug_peerhash (lnet_ni_t *ni)
+ksocknal_debug_peerhash(lnet_ni_t *ni)
{
ksock_peer_t *peer = NULL;
struct list_head *tmp;
read_lock(&ksocknal_data.ksnd_global_lock);
for (i = 0; i < ksocknal_data.ksnd_peer_hash_size; i++) {
- list_for_each (tmp, &ksocknal_data.ksnd_peers[i]) {
- peer = list_entry (tmp, ksock_peer_t, ksnp_list);
+ list_for_each(tmp, &ksocknal_data.ksnd_peers[i]) {
+ peer = list_entry(tmp, ksock_peer_t, ksnp_list);
if (peer->ksnp_ni == ni)
break;
!list_empty(&peer->ksnp_tx_queue),
!list_empty(&peer->ksnp_zc_req_list));
- list_for_each (tmp, &peer->ksnp_routes) {
+ list_for_each(tmp, &peer->ksnp_routes) {
route = list_entry(tmp, ksock_route_t, ksnr_list);
CWARN("Route: ref %d, schd %d, conn %d, cnted %d, del %d\n",
atomic_read(&route->ksnr_refcount),
route->ksnr_connected, route->ksnr_deleted);
}
- list_for_each (tmp, &peer->ksnp_conns) {
+ list_for_each(tmp, &peer->ksnp_conns) {
conn = list_entry(tmp, ksock_conn_t, ksnc_list);
- CWARN ("Conn: ref %d, sref %d, t %d, c %d\n",
+ CWARN("Conn: ref %d, sref %d, t %d, c %d\n",
atomic_read(&conn->ksnc_conn_refcount),
atomic_read(&conn->ksnc_sock_refcount),
conn->ksnc_type, conn->ksnc_closing);
}
void
-ksocknal_shutdown (lnet_ni_t *ni)
+ksocknal_shutdown(lnet_ni_t *ni)
{
ksock_net_t *net = ni->ni_data;
int i;
spin_unlock_bh(&net->ksnn_lock);
for (i = 0; i < net->ksnn_ninterfaces; i++) {
- LASSERT (net->ksnn_interfaces[i].ksni_npeers == 0);
- LASSERT (net->ksnn_interfaces[i].ksni_nroutes == 0);
+ LASSERT(net->ksnn_interfaces[i].ksni_npeers == 0);
+ LASSERT(net->ksnn_interfaces[i].ksni_nroutes == 0);
}
list_del(&net->ksnn_list);
}
int
-ksocknal_startup (lnet_ni_t *ni)
+ksocknal_startup(lnet_ni_t *ni)
{
ksock_net_t *net;
int rc;
int i;
- LASSERT (ni->ni_lnd == &the_ksocklnd);
+ LASSERT(ni->ni_lnd == &the_ksocklnd);
if (ksocknal_data.ksnd_init == SOCKNAL_INIT_NOTHING) {
rc = ksocknal_base_startup();
static void __exit
-ksocknal_module_fini (void)
+ksocknal_module_fini(void)
{
lnet_unregister_lnd(&the_ksocklnd);
}
static int __init
-ksocknal_module_init (void)
+ksocknal_module_init(void)
{
int rc;
/* check ksnr_connected/connecting field large enough */
- CLASSERT (SOCKLND_CONN_NTYPES <= 4);
- CLASSERT (SOCKLND_CONN_ACK == SOCKLND_CONN_BULK_IN);
+ CLASSERT(SOCKLND_CONN_NTYPES <= 4);
+ CLASSERT(SOCKLND_CONN_ACK == SOCKLND_CONN_BULK_IN);
/* initialize the_ksocklnd */
the_ksocklnd.lnd_type = SOCKLND;
}
static inline struct list_head *
-ksocknal_nid2peerlist (lnet_nid_t nid)
+ksocknal_nid2peerlist(lnet_nid_t nid)
{
unsigned int hash = ((unsigned int)nid) % ksocknal_data.ksnd_peer_hash_size;
}
static inline void
-ksocknal_conn_addref (ksock_conn_t *conn)
+ksocknal_conn_addref(ksock_conn_t *conn)
{
- LASSERT (atomic_read(&conn->ksnc_conn_refcount) > 0);
+ LASSERT(atomic_read(&conn->ksnc_conn_refcount) > 0);
atomic_inc(&conn->ksnc_conn_refcount);
}
-extern void ksocknal_queue_zombie_conn (ksock_conn_t *conn);
+extern void ksocknal_queue_zombie_conn(ksock_conn_t *conn);
extern void ksocknal_finalize_zcreq(ksock_conn_t *conn);
static inline void
-ksocknal_conn_decref (ksock_conn_t *conn)
+ksocknal_conn_decref(ksock_conn_t *conn)
{
- LASSERT (atomic_read(&conn->ksnc_conn_refcount) > 0);
+ LASSERT(atomic_read(&conn->ksnc_conn_refcount) > 0);
if (atomic_dec_and_test(&conn->ksnc_conn_refcount))
ksocknal_queue_zombie_conn(conn);
}
static inline int
-ksocknal_connsock_addref (ksock_conn_t *conn)
+ksocknal_connsock_addref(ksock_conn_t *conn)
{
int rc = -ESHUTDOWN;
}
static inline void
-ksocknal_connsock_decref (ksock_conn_t *conn)
+ksocknal_connsock_decref(ksock_conn_t *conn)
{
- LASSERT (atomic_read(&conn->ksnc_sock_refcount) > 0);
+ LASSERT(atomic_read(&conn->ksnc_sock_refcount) > 0);
if (atomic_dec_and_test(&conn->ksnc_sock_refcount)) {
- LASSERT (conn->ksnc_closing);
+ LASSERT(conn->ksnc_closing);
libcfs_sock_release(conn->ksnc_sock);
conn->ksnc_sock = NULL;
ksocknal_finalize_zcreq(conn);
}
static inline void
-ksocknal_tx_addref (ksock_tx_t *tx)
+ksocknal_tx_addref(ksock_tx_t *tx)
{
- LASSERT (atomic_read(&tx->tx_refcount) > 0);
+ LASSERT(atomic_read(&tx->tx_refcount) > 0);
atomic_inc(&tx->tx_refcount);
}
-extern void ksocknal_tx_prep (ksock_conn_t *, ksock_tx_t *tx);
-extern void ksocknal_tx_done (lnet_ni_t *ni, ksock_tx_t *tx);
+extern void ksocknal_tx_prep(ksock_conn_t *, ksock_tx_t *tx);
+extern void ksocknal_tx_done(lnet_ni_t *ni, ksock_tx_t *tx);
static inline void
-ksocknal_tx_decref (ksock_tx_t *tx)
+ksocknal_tx_decref(ksock_tx_t *tx)
{
- LASSERT (atomic_read(&tx->tx_refcount) > 0);
+ LASSERT(atomic_read(&tx->tx_refcount) > 0);
if (atomic_dec_and_test(&tx->tx_refcount))
ksocknal_tx_done(NULL, tx);
}
static inline void
-ksocknal_route_addref (ksock_route_t *route)
+ksocknal_route_addref(ksock_route_t *route)
{
- LASSERT (atomic_read(&route->ksnr_refcount) > 0);
+ LASSERT(atomic_read(&route->ksnr_refcount) > 0);
atomic_inc(&route->ksnr_refcount);
}
-extern void ksocknal_destroy_route (ksock_route_t *route);
+extern void ksocknal_destroy_route(ksock_route_t *route);
static inline void
-ksocknal_route_decref (ksock_route_t *route)
+ksocknal_route_decref(ksock_route_t *route)
{
- LASSERT (atomic_read (&route->ksnr_refcount) > 0);
+ LASSERT(atomic_read(&route->ksnr_refcount) > 0);
if (atomic_dec_and_test(&route->ksnr_refcount))
- ksocknal_destroy_route (route);
+ ksocknal_destroy_route(route);
}
static inline void
-ksocknal_peer_addref (ksock_peer_t *peer)
+ksocknal_peer_addref(ksock_peer_t *peer)
{
- LASSERT (atomic_read (&peer->ksnp_refcount) > 0);
+ LASSERT(atomic_read(&peer->ksnp_refcount) > 0);
atomic_inc(&peer->ksnp_refcount);
}
-extern void ksocknal_destroy_peer (ksock_peer_t *peer);
+extern void ksocknal_destroy_peer(ksock_peer_t *peer);
static inline void
-ksocknal_peer_decref (ksock_peer_t *peer)
+ksocknal_peer_decref(ksock_peer_t *peer)
{
- LASSERT (atomic_read (&peer->ksnp_refcount) > 0);
+ LASSERT(atomic_read(&peer->ksnp_refcount) > 0);
if (atomic_dec_and_test(&peer->ksnp_refcount))
- ksocknal_destroy_peer (peer);
+ ksocknal_destroy_peer(peer);
}
-int ksocknal_startup (lnet_ni_t *ni);
-void ksocknal_shutdown (lnet_ni_t *ni);
+int ksocknal_startup(lnet_ni_t *ni);
+void ksocknal_shutdown(lnet_ni_t *ni);
int ksocknal_ctl(lnet_ni_t *ni, unsigned int cmd, void *arg);
-int ksocknal_send (lnet_ni_t *ni, void *private, lnet_msg_t *lntmsg);
+int ksocknal_send(lnet_ni_t *ni, void *private, lnet_msg_t *lntmsg);
int ksocknal_recv(lnet_ni_t *ni, void *private, lnet_msg_t *lntmsg,
int delayed, unsigned int niov,
struct kvec *iov, lnet_kiov_t *kiov,
int ksocknal_accept(lnet_ni_t *ni, struct socket *sock);
extern int ksocknal_add_peer(lnet_ni_t *ni, lnet_process_id_t id, __u32 ip, int port);
-extern ksock_peer_t *ksocknal_find_peer_locked (lnet_ni_t *ni, lnet_process_id_t id);
-extern ksock_peer_t *ksocknal_find_peer (lnet_ni_t *ni, lnet_process_id_t id);
-extern void ksocknal_peer_failed (ksock_peer_t *peer);
-extern int ksocknal_create_conn (lnet_ni_t *ni, ksock_route_t *route,
+extern ksock_peer_t *ksocknal_find_peer_locked(lnet_ni_t *ni, lnet_process_id_t id);
+extern ksock_peer_t *ksocknal_find_peer(lnet_ni_t *ni, lnet_process_id_t id);
+extern void ksocknal_peer_failed(ksock_peer_t *peer);
+extern int ksocknal_create_conn(lnet_ni_t *ni, ksock_route_t *route,
struct socket *sock, int type);
-extern void ksocknal_close_conn_locked (ksock_conn_t *conn, int why);
-extern void ksocknal_terminate_conn (ksock_conn_t *conn);
-extern void ksocknal_destroy_conn (ksock_conn_t *conn);
-extern int ksocknal_close_peer_conns_locked (ksock_peer_t *peer,
+extern void ksocknal_close_conn_locked(ksock_conn_t *conn, int why);
+extern void ksocknal_terminate_conn(ksock_conn_t *conn);
+extern void ksocknal_destroy_conn(ksock_conn_t *conn);
+extern int ksocknal_close_peer_conns_locked(ksock_peer_t *peer,
__u32 ipaddr, int why);
-extern int ksocknal_close_conn_and_siblings (ksock_conn_t *conn, int why);
-extern int ksocknal_close_matching_conns (lnet_process_id_t id, __u32 ipaddr);
+extern int ksocknal_close_conn_and_siblings(ksock_conn_t *conn, int why);
+extern int ksocknal_close_matching_conns(lnet_process_id_t id, __u32 ipaddr);
extern ksock_conn_t *ksocknal_find_conn_locked(ksock_peer_t *peer,
ksock_tx_t *tx, int nonblk);
extern int ksocknal_launch_packet(lnet_ni_t *ni, ksock_tx_t *tx,
lnet_process_id_t id);
extern ksock_tx_t *ksocknal_alloc_tx(int type, int size);
-extern void ksocknal_free_tx (ksock_tx_t *tx);
+extern void ksocknal_free_tx(ksock_tx_t *tx);
extern ksock_tx_t *ksocknal_alloc_tx_noop(__u64 cookie, int nonblk);
extern void ksocknal_next_tx_carrier(ksock_conn_t *conn);
-extern void ksocknal_queue_tx_locked (ksock_tx_t *tx, ksock_conn_t *conn);
-extern void ksocknal_txlist_done (lnet_ni_t *ni, struct list_head *txlist,
+extern void ksocknal_queue_tx_locked(ksock_tx_t *tx, ksock_conn_t *conn);
+extern void ksocknal_txlist_done(lnet_ni_t *ni, struct list_head *txlist,
int error);
-extern void ksocknal_notify (lnet_ni_t *ni, lnet_nid_t gw_nid, int alive);
-extern void ksocknal_query (struct lnet_ni *ni, lnet_nid_t nid, unsigned long *when);
+extern void ksocknal_notify(lnet_ni_t *ni, lnet_nid_t gw_nid, int alive);
+extern void ksocknal_query(struct lnet_ni *ni, lnet_nid_t nid, unsigned long *when);
extern int ksocknal_thread_start(int (*fn)(void *arg), void *arg, char *name);
-extern void ksocknal_thread_fini (void);
-extern void ksocknal_launch_all_connections_locked (ksock_peer_t *peer);
-extern ksock_route_t *ksocknal_find_connectable_route_locked (ksock_peer_t *peer);
-extern ksock_route_t *ksocknal_find_connecting_route_locked (ksock_peer_t *peer);
-extern int ksocknal_new_packet (ksock_conn_t *conn, int skip);
-extern int ksocknal_scheduler (void *arg);
-extern int ksocknal_connd (void *arg);
-extern int ksocknal_reaper (void *arg);
-extern int ksocknal_send_hello (lnet_ni_t *ni, ksock_conn_t *conn,
+extern void ksocknal_thread_fini(void);
+extern void ksocknal_launch_all_connections_locked(ksock_peer_t *peer);
+extern ksock_route_t *ksocknal_find_connectable_route_locked(ksock_peer_t *peer);
+extern ksock_route_t *ksocknal_find_connecting_route_locked(ksock_peer_t *peer);
+extern int ksocknal_new_packet(ksock_conn_t *conn, int skip);
+extern int ksocknal_scheduler(void *arg);
+extern int ksocknal_connd(void *arg);
+extern int ksocknal_reaper(void *arg);
+extern int ksocknal_send_hello(lnet_ni_t *ni, ksock_conn_t *conn,
lnet_nid_t peer_nid, ksock_hello_msg_t *hello);
-extern int ksocknal_recv_hello (lnet_ni_t *ni, ksock_conn_t *conn,
+extern int ksocknal_recv_hello(lnet_ni_t *ni, ksock_conn_t *conn,
ksock_hello_msg_t *hello, lnet_process_id_t *id,
__u64 *incarnation);
extern void ksocknal_read_callback(ksock_conn_t *conn);
extern void ksocknal_lib_save_callback(struct socket *sock, ksock_conn_t *conn);
extern void ksocknal_lib_set_callback(struct socket *sock, ksock_conn_t *conn);
extern void ksocknal_lib_reset_callback(struct socket *sock, ksock_conn_t *conn);
-extern void ksocknal_lib_push_conn (ksock_conn_t *conn);
-extern int ksocknal_lib_get_conn_addrs (ksock_conn_t *conn);
-extern int ksocknal_lib_setup_sock (struct socket *so);
-extern int ksocknal_lib_send_iov (ksock_conn_t *conn, ksock_tx_t *tx);
-extern int ksocknal_lib_send_kiov (ksock_conn_t *conn, ksock_tx_t *tx);
-extern void ksocknal_lib_eager_ack (ksock_conn_t *conn);
-extern int ksocknal_lib_recv_iov (ksock_conn_t *conn);
-extern int ksocknal_lib_recv_kiov (ksock_conn_t *conn);
-extern int ksocknal_lib_get_conn_tunables (ksock_conn_t *conn, int *txmem,
+extern void ksocknal_lib_push_conn(ksock_conn_t *conn);
+extern int ksocknal_lib_get_conn_addrs(ksock_conn_t *conn);
+extern int ksocknal_lib_setup_sock(struct socket *so);
+extern int ksocknal_lib_send_iov(ksock_conn_t *conn, ksock_tx_t *tx);
+extern int ksocknal_lib_send_kiov(ksock_conn_t *conn, ksock_tx_t *tx);
+extern void ksocknal_lib_eager_ack(ksock_conn_t *conn);
+extern int ksocknal_lib_recv_iov(ksock_conn_t *conn);
+extern int ksocknal_lib_recv_kiov(ksock_conn_t *conn);
+extern int ksocknal_lib_get_conn_tunables(ksock_conn_t *conn, int *txmem,
int *rxmem, int *nagle);
extern int ksocknal_tunables_init(void);
spin_lock_bh(&sched->kss_lock);
- rc = (!ksocknal_data.ksnd_shuttingdown &&
+ rc = !ksocknal_data.ksnd_shuttingdown &&
list_empty(&sched->kss_rx_conns) &&
- list_empty(&sched->kss_tx_conns));
+ list_empty(&sched->kss_tx_conns);
spin_unlock_bh(&sched->kss_lock);
return rc;
#include "socklnd.h"
int
-ksocknal_lib_get_conn_addrs (ksock_conn_t *conn)
+ksocknal_lib_get_conn_addrs(ksock_conn_t *conn)
{
int rc = libcfs_sock_getaddr(conn->ksnc_sock, 1,
&conn->ksnc_ipaddr,
&conn->ksnc_port);
/* Didn't need the {get,put}connsock dance to deref ksnc_sock... */
- LASSERT (!conn->ksnc_closing);
+ LASSERT(!conn->ksnc_closing);
if (rc != 0) {
- CERROR ("Error %d getting sock peer IP\n", rc);
+ CERROR("Error %d getting sock peer IP\n", rc);
return rc;
}
rc = libcfs_sock_getaddr(conn->ksnc_sock, 0,
&conn->ksnc_myipaddr, NULL);
if (rc != 0) {
- CERROR ("Error %d getting sock local IP\n", rc);
+ CERROR("Error %d getting sock local IP\n", rc);
return rc;
}
}
int
-ksocknal_lib_send_iov (ksock_conn_t *conn, ksock_tx_t *tx)
+ksocknal_lib_send_iov(ksock_conn_t *conn, ksock_tx_t *tx)
{
struct socket *sock = conn->ksnc_sock;
int nob;
}
int
-ksocknal_lib_send_kiov (ksock_conn_t *conn, ksock_tx_t *tx)
+ksocknal_lib_send_kiov(ksock_conn_t *conn, ksock_tx_t *tx)
{
struct socket *sock = conn->ksnc_sock;
lnet_kiov_t *kiov = tx->tx_kiov;
int nob;
/* Not NOOP message */
- LASSERT (tx->tx_lnetmsg != NULL);
+ LASSERT(tx->tx_lnetmsg != NULL);
/* NB we can't trust socket ops to either consume our iovs
* or leave them alone. */
}
void
-ksocknal_lib_eager_ack (ksock_conn_t *conn)
+ksocknal_lib_eager_ack(ksock_conn_t *conn)
{
int opt = 1;
struct socket *sock = conn->ksnc_sock;
* peer. */
kernel_setsockopt(sock, SOL_TCP, TCP_QUICKACK,
- (char *)&opt, sizeof (opt));
+ (char *)&opt, sizeof(opt));
}
int
-ksocknal_lib_recv_iov (ksock_conn_t *conn)
+ksocknal_lib_recv_iov(ksock_conn_t *conn)
{
#if SOCKNAL_SINGLE_FRAG_RX
struct kvec scratch;
/* NB we can't trust socket ops to either consume our iovs
* or leave them alone. */
- LASSERT (niov > 0);
+ LASSERT(niov > 0);
for (nob = i = 0; i < niov; i++) {
scratchiov[i] = iov[i];
nob += scratchiov[i].iov_len;
}
- LASSERT (nob <= conn->ksnc_rx_nob_wanted);
+ LASSERT(nob <= conn->ksnc_rx_nob_wanted);
rc = kernel_recvmsg(conn->ksnc_sock, &msg,
scratchiov, niov, nob, MSG_DONTWAIT);
if (saved_csum != 0) {
/* accumulate checksum */
for (i = 0, sum = rc; sum > 0; i++, sum -= fragnob) {
- LASSERT (i < niov);
+ LASSERT(i < niov);
fragnob = iov[i].iov_len;
if (fragnob > sum)
if (!*ksocknal_tunables.ksnd_zc_recv || pages == NULL)
return NULL;
- LASSERT (niov <= LNET_MAX_IOV);
+ LASSERT(niov <= LNET_MAX_IOV);
if (niov < 2 ||
niov < *ksocknal_tunables.ksnd_zc_recv_min_nfrags)
}
int
-ksocknal_lib_recv_kiov (ksock_conn_t *conn)
+ksocknal_lib_recv_kiov(ksock_conn_t *conn)
{
#if SOCKNAL_SINGLE_FRAG_RX || !SOCKNAL_RISK_KMAP_DEADLOCK
struct kvec scratch;
n = niov;
}
- LASSERT (nob <= conn->ksnc_rx_nob_wanted);
+ LASSERT(nob <= conn->ksnc_rx_nob_wanted);
rc = kernel_recvmsg(conn->ksnc_sock, &msg,
(struct kvec *)scratchiov, n, nob, MSG_DONTWAIT);
if (conn->ksnc_msg.ksm_csum != 0) {
for (i = 0, sum = rc; sum > 0; i++, sum -= fragnob) {
- LASSERT (i < niov);
+ LASSERT(i < niov);
/* Dang! have to kmap again because I have nowhere to stash the
* mapped address. But by doing it while the page is still
}
int
-ksocknal_lib_get_conn_tunables (ksock_conn_t *conn, int *txmem, int *rxmem, int *nagle)
+ksocknal_lib_get_conn_tunables(ksock_conn_t *conn, int *txmem, int *rxmem, int *nagle)
{
struct socket *sock = conn->ksnc_sock;
int len;
rc = ksocknal_connsock_addref(conn);
if (rc != 0) {
- LASSERT (conn->ksnc_closing);
+ LASSERT(conn->ksnc_closing);
*txmem = *rxmem = *nagle = 0;
return -ESHUTDOWN;
}
}
int
-ksocknal_lib_setup_sock (struct socket *sock)
+ksocknal_lib_setup_sock(struct socket *sock)
{
int rc;
int option;
linger.l_linger = 0;
rc = kernel_setsockopt(sock, SOL_SOCKET, SO_LINGER,
- (char *)&linger, sizeof (linger));
+ (char *)&linger, sizeof(linger));
if (rc != 0) {
- CERROR ("Can't set SO_LINGER: %d\n", rc);
+ CERROR("Can't set SO_LINGER: %d\n", rc);
return rc;
}
option = -1;
rc = kernel_setsockopt(sock, SOL_TCP, TCP_LINGER2,
- (char *)&option, sizeof (option));
+ (char *)&option, sizeof(option));
if (rc != 0) {
- CERROR ("Can't set SO_LINGER2: %d\n", rc);
+ CERROR("Can't set SO_LINGER2: %d\n", rc);
return rc;
}
option = 1;
rc = kernel_setsockopt(sock, SOL_TCP, TCP_NODELAY,
- (char *)&option, sizeof (option));
+ (char *)&option, sizeof(option));
if (rc != 0) {
- CERROR ("Can't disable nagle: %d\n", rc);
+ CERROR("Can't disable nagle: %d\n", rc);
return rc;
}
}
*ksocknal_tunables.ksnd_tx_buffer_size,
*ksocknal_tunables.ksnd_rx_buffer_size);
if (rc != 0) {
- CERROR ("Can't set buffer tx %d, rx %d buffers: %d\n",
+ CERROR("Can't set buffer tx %d, rx %d buffers: %d\n",
*ksocknal_tunables.ksnd_tx_buffer_size,
*ksocknal_tunables.ksnd_rx_buffer_size, rc);
return rc;
option = (do_keepalive ? 1 : 0);
rc = kernel_setsockopt(sock, SOL_SOCKET, SO_KEEPALIVE,
- (char *)&option, sizeof (option));
+ (char *)&option, sizeof(option));
if (rc != 0) {
- CERROR ("Can't set SO_KEEPALIVE: %d\n", rc);
+ CERROR("Can't set SO_KEEPALIVE: %d\n", rc);
return rc;
}
return 0;
rc = kernel_setsockopt(sock, SOL_TCP, TCP_KEEPIDLE,
- (char *)&keep_idle, sizeof (keep_idle));
+ (char *)&keep_idle, sizeof(keep_idle));
if (rc != 0) {
- CERROR ("Can't set TCP_KEEPIDLE: %d\n", rc);
+ CERROR("Can't set TCP_KEEPIDLE: %d\n", rc);
return rc;
}
rc = kernel_setsockopt(sock, SOL_TCP, TCP_KEEPINTVL,
- (char *)&keep_intvl, sizeof (keep_intvl));
+ (char *)&keep_intvl, sizeof(keep_intvl));
if (rc != 0) {
- CERROR ("Can't set TCP_KEEPINTVL: %d\n", rc);
+ CERROR("Can't set TCP_KEEPINTVL: %d\n", rc);
return rc;
}
rc = kernel_setsockopt(sock, SOL_TCP, TCP_KEEPCNT,
- (char *)&keep_count, sizeof (keep_count));
+ (char *)&keep_count, sizeof(keep_count));
if (rc != 0) {
- CERROR ("Can't set TCP_KEEPCNT: %d\n", rc);
+ CERROR("Can't set TCP_KEEPCNT: %d\n", rc);
return rc;
}
}
void
-ksocknal_lib_push_conn (ksock_conn_t *conn)
+ksocknal_lib_push_conn(ksock_conn_t *conn)
{
struct sock *sk;
struct tcp_sock *tp;
sk = conn->ksnc_sock->sk;
tp = tcp_sk(sk);
- lock_sock (sk);
+ lock_sock(sk);
nonagle = tp->nonagle;
tp->nonagle = 1;
- release_sock (sk);
+ release_sock(sk);
rc = kernel_setsockopt(conn->ksnc_sock, SOL_TCP, TCP_NODELAY,
- (char *)&val, sizeof (val));
- LASSERT (rc == 0);
+ (char *)&val, sizeof(val));
+ LASSERT(rc == 0);
- lock_sock (sk);
+ lock_sock(sk);
tp->nonagle = nonagle;
- release_sock (sk);
+ release_sock(sk);
ksocknal_connsock_decref(conn);
}
-extern void ksocknal_read_callback (ksock_conn_t *conn);
-extern void ksocknal_write_callback (ksock_conn_t *conn);
+extern void ksocknal_read_callback(ksock_conn_t *conn);
+extern void ksocknal_write_callback(ksock_conn_t *conn);
/*
* socket call back in Linux
*/
static void
-ksocknal_data_ready (struct sock *sk)
+ksocknal_data_ready(struct sock *sk)
{
ksock_conn_t *conn;
conn = sk->sk_user_data;
if (conn == NULL) { /* raced with ksocknal_terminate_conn */
- LASSERT (sk->sk_data_ready != &ksocknal_data_ready);
- sk->sk_data_ready (sk);
+ LASSERT(sk->sk_data_ready != &ksocknal_data_ready);
+ sk->sk_data_ready(sk);
} else
ksocknal_read_callback(conn);
}
static void
-ksocknal_write_space (struct sock *sk)
+ksocknal_write_space(struct sock *sk)
{
ksock_conn_t *conn;
int wspace;
" ready" : " blocked"),
(conn == NULL) ? "" : (conn->ksnc_tx_scheduled ?
" scheduled" : " idle"),
- (conn == NULL) ? "" : (list_empty (&conn->ksnc_tx_queue) ?
+ (conn == NULL) ? "" : (list_empty(&conn->ksnc_tx_queue) ?
" empty" : " queued"));
if (conn == NULL) { /* raced with ksocknal_terminate_conn */
- LASSERT (sk->sk_write_space != &ksocknal_write_space);
- sk->sk_write_space (sk);
+ LASSERT(sk->sk_write_space != &ksocknal_write_space);
+ sk->sk_write_space(sk);
read_unlock(&ksocknal_data.ksnd_global_lock);
return;
* ENOMEM check in ksocknal_transmit is race-free (think about
* it). */
- clear_bit (SOCK_NOSPACE, &sk->sk_socket->flags);
+ clear_bit(SOCK_NOSPACE, &sk->sk_socket->flags);
}
read_unlock(&ksocknal_data.ksnd_global_lock);
#include <net/tcp.h>
#include <linux/uio.h>
#include <linux/if.h>
+#include <linux/uaccess.h>
-#include <asm/uaccess.h>
#include <asm/irq.h>
#include <linux/fs.h>
module_param(typed_conns, int, 0444);
MODULE_PARM_DESC(typed_conns, "use different sockets for bulk");
-static int min_bulk = (1<<10);
+static int min_bulk = 1<<10;
module_param(min_bulk, int, 0644);
MODULE_PARM_DESC(min_bulk, "smallest 'large' message");
module_param(nonblk_zcack, int, 0644);
MODULE_PARM_DESC(nonblk_zcack, "always send ZC-ACK on non-blocking connection");
-static unsigned int zc_min_payload = (16 << 10);
+static unsigned int zc_min_payload = 16 << 10;
module_param(zc_min_payload, int, 0644);
MODULE_PARM_DESC(zc_min_payload, "minimum payload size to zero copy");
#endif
if (*ksocknal_tunables.ksnd_zc_min_payload < (2 << 10))
- *ksocknal_tunables.ksnd_zc_min_payload = (2 << 10);
+ *ksocknal_tunables.ksnd_zc_min_payload = 2 << 10;
return 0;
};
ksock_tx_t *tx = conn->ksnc_tx_carrier;
/* Called holding BH lock: conn->ksnc_scheduler->kss_lock */
- LASSERT (!list_empty(&conn->ksnc_tx_queue));
- LASSERT (tx != NULL);
+ LASSERT(!list_empty(&conn->ksnc_tx_queue));
+ LASSERT(tx != NULL);
/* Next TX that can carry ZC-ACK or LNet message */
if (tx->tx_list.next == &conn->ksnc_tx_queue) {
} else {
conn->ksnc_tx_carrier = list_entry(tx->tx_list.next,
ksock_tx_t, tx_list);
- LASSERT (conn->ksnc_tx_carrier->tx_msg.ksm_type == tx->tx_msg.ksm_type);
+ LASSERT(conn->ksnc_tx_carrier->tx_msg.ksm_type == tx->tx_msg.ksm_type);
}
}
{
ksock_tx_t *tx = conn->ksnc_tx_carrier;
- LASSERT (tx_ack == NULL ||
+ LASSERT(tx_ack == NULL ||
tx_ack->tx_msg.ksm_type == KSOCK_MSG_NOOP);
/*
return NULL;
}
- LASSERT (tx->tx_msg.ksm_type == KSOCK_MSG_NOOP);
+ LASSERT(tx->tx_msg.ksm_type == KSOCK_MSG_NOOP);
/* There is a noop zc-ack can be piggybacked */
tx_msg->tx_msg.ksm_zc_cookies[1] = tx->tx_msg.ksm_zc_cookies[1];
return ksocknal_queue_tx_zcack_v2(conn, tx_ack, cookie);
/* non-blocking ZC-ACK (to router) */
- LASSERT (tx_ack == NULL ||
+ LASSERT(tx_ack == NULL ||
tx_ack->tx_msg.ksm_type == KSOCK_MSG_NOOP);
tx = conn->ksnc_tx_carrier;
if (tx->tx_msg.ksm_zc_cookies[1] == SOCKNAL_KEEPALIVE_PING) {
/* replace the keepalive PING with a real ACK */
- LASSERT (tx->tx_msg.ksm_zc_cookies[0] == 0);
+ LASSERT(tx->tx_msg.ksm_zc_cookies[0] == 0);
tx->tx_msg.ksm_zc_cookies[1] = cookie;
return 1;
}
__u64 tmp = 0;
/* two separated cookies: (a+2, a) or (a+1, a) */
- LASSERT (tx->tx_msg.ksm_zc_cookies[0] -
+ LASSERT(tx->tx_msg.ksm_zc_cookies[0] -
tx->tx_msg.ksm_zc_cookies[1] <= 2);
if (tx->tx_msg.ksm_zc_cookies[0] -
ksock_peer_t *peer = conn->ksnc_peer;
ksock_tx_t *tx;
ksock_tx_t *tmp;
- LIST_HEAD (zlist);
+ LIST_HEAD(zlist);
int count;
if (cookie1 == 0)
}
static int
-ksocknal_send_hello_v1 (ksock_conn_t *conn, ksock_hello_msg_t *hello)
+ksocknal_send_hello_v1(ksock_conn_t *conn, ksock_hello_msg_t *hello)
{
struct socket *sock = conn->ksnc_sock;
lnet_hdr_t *hdr;
}
static int
-ksocknal_send_hello_v2 (ksock_conn_t *conn, ksock_hello_msg_t *hello)
+ksocknal_send_hello_v2(ksock_conn_t *conn, ksock_hello_msg_t *hello)
{
struct socket *sock = conn->ksnc_sock;
int rc;
}
rc = libcfs_sock_read(sock, &hdr->src_nid,
- sizeof (*hdr) - offsetof (lnet_hdr_t, src_nid),
+ sizeof(*hdr) - offsetof(lnet_hdr_t, src_nid),
timeout);
if (rc != 0) {
CERROR("Error %d reading rest of HELLO hdr from %pI4h\n",
rc, &conn->ksnc_ipaddr);
- LASSERT (rc < 0 && rc != -EALREADY);
+ LASSERT(rc < 0 && rc != -EALREADY);
goto out;
}
goto out;
}
- hello->kshm_src_nid = le64_to_cpu (hdr->src_nid);
- hello->kshm_src_pid = le32_to_cpu (hdr->src_pid);
- hello->kshm_src_incarnation = le64_to_cpu (hdr->msg.hello.incarnation);
- hello->kshm_ctype = le32_to_cpu (hdr->msg.hello.type);
- hello->kshm_nips = le32_to_cpu (hdr->payload_length) /
- sizeof (__u32);
+ hello->kshm_src_nid = le64_to_cpu(hdr->src_nid);
+ hello->kshm_src_pid = le32_to_cpu(hdr->src_pid);
+ hello->kshm_src_incarnation = le64_to_cpu(hdr->msg.hello.incarnation);
+ hello->kshm_ctype = le32_to_cpu(hdr->msg.hello.type);
+ hello->kshm_nips = le32_to_cpu(hdr->payload_length) /
+ sizeof(__u32);
if (hello->kshm_nips > LNET_MAX_INTERFACES) {
CERROR("Bad nips %d from ip %pI4h\n",
}
static int
-ksocknal_recv_hello_v2 (ksock_conn_t *conn, ksock_hello_msg_t *hello, int timeout)
+ksocknal_recv_hello_v2(ksock_conn_t *conn, ksock_hello_msg_t *hello, int timeout)
{
struct socket *sock = conn->ksnc_sock;
int rc;
recs = lnet_res_containers_create(LNET_COOKIE_TYPE_ME, LNET_FL_MAX_MES,
sizeof(lnet_me_t));
- if (recs == NULL)
+ if (recs == NULL) {
+ rc = -ENOMEM;
goto failed;
+ }
the_lnet.ln_me_containers = recs;
recs = lnet_res_containers_create(LNET_COOKIE_TYPE_MD, LNET_FL_MAX_MDS,
sizeof(lnet_libmd_t));
- if (recs == NULL)
+ if (recs == NULL) {
+ rc = -ENOMEM;
goto failed;
+ }
the_lnet.ln_md_containers = recs;
#define DEBUG_SUBSYSTEM S_LNET
#include "../../include/linux/lnet/lib-lnet.h"
-typedef struct { /* tmp struct for parsing routes */
+struct lnet_text_buf_t { /* tmp struct for parsing routes */
struct list_head ltb_list; /* stash on lists */
int ltb_size; /* allocated size */
char ltb_text[0]; /* text buffer */
-} lnet_text_buf_t;
+};
static int lnet_tbnob; /* track text buf allocation */
#define LNET_MAX_TEXTBUF_NOB (64<<10) /* bound allocation */
return -EINVAL;
}
-static lnet_text_buf_t *
+static struct lnet_text_buf_t *
lnet_new_text_buf(int str_len)
{
- lnet_text_buf_t *ltb;
+ struct lnet_text_buf_t *ltb;
int nob;
/* NB allocate space for the terminating 0 */
- nob = offsetof(lnet_text_buf_t, ltb_text[str_len + 1]);
+ nob = offsetof(struct lnet_text_buf_t, ltb_text[str_len + 1]);
if (nob > LNET_SINGLE_TEXTBUF_NOB) {
/* _way_ conservative for "route net gateway..." */
CERROR("text buffer too big\n");
}
static void
-lnet_free_text_buf(lnet_text_buf_t *ltb)
+lnet_free_text_buf(struct lnet_text_buf_t *ltb)
{
lnet_tbnob -= ltb->ltb_size;
LIBCFS_FREE(ltb, ltb->ltb_size);
static void
lnet_free_text_bufs(struct list_head *tbs)
{
- lnet_text_buf_t *ltb;
+ struct lnet_text_buf_t *ltb;
while (!list_empty(tbs)) {
- ltb = list_entry(tbs->next, lnet_text_buf_t, ltb_list);
+ ltb = list_entry(tbs->next, struct lnet_text_buf_t, ltb_list);
list_del(<b->ltb_list);
lnet_free_text_buf(ltb);
char *sep;
int nob;
int i;
- lnet_text_buf_t *ltb;
+ struct lnet_text_buf_t *ltb;
INIT_LIST_HEAD(&pending);
{
int len1 = (int)(sep1 - str);
int len2 = strlen(sep2 + 1);
- lnet_text_buf_t *ltb;
+ struct lnet_text_buf_t *ltb;
LASSERT(*sep1 == '[');
LASSERT(*sep2 == ']');
if (enditem == parsed) /* no empty items */
goto failed;
- if (sscanf(parsed, "%d-%d/%d%n", &lo, &hi, &stride, &scanned) < 3) {
+ if (sscanf(parsed, "%d-%d/%d%n", &lo, &hi,
+ &stride, &scanned) < 3) {
if (sscanf(parsed, "%d-%d%n", &lo, &hi, &scanned) < 2) {
/* simple string enumeration */
- if (lnet_expand1tb(&pending, str, sep, sep2,
- parsed, (int)(enditem - parsed)) != 0)
+ if (lnet_expand1tb(
+ &pending, str, sep, sep2,
+ parsed,
+ (int)(enditem - parsed)) != 0) {
goto failed;
+ }
continue;
}
struct list_head *tmp2;
__u32 net;
lnet_nid_t nid;
- lnet_text_buf_t *ltb;
+ struct lnet_text_buf_t *ltb;
int rc;
char *sep;
char *token = str;
list_add_tail(tmp1, tmp2);
while (tmp1 != tmp2) {
- ltb = list_entry(tmp1, lnet_text_buf_t, ltb_list);
+ ltb = list_entry(tmp1, struct lnet_text_buf_t,
+ ltb_list);
rc = lnet_str2tbs_expand(tmp1->next, ltb->ltb_text);
if (rc < 0)
LASSERT(!list_empty(&gateways));
list_for_each(tmp1, &nets) {
- ltb = list_entry(tmp1, lnet_text_buf_t, ltb_list);
+ ltb = list_entry(tmp1, struct lnet_text_buf_t, ltb_list);
net = libcfs_str2net(ltb->ltb_text);
LASSERT(net != LNET_NIDNET(LNET_NID_ANY));
list_for_each(tmp2, &gateways) {
- ltb = list_entry(tmp2, lnet_text_buf_t, ltb_list);
+ ltb = list_entry(tmp2, struct lnet_text_buf_t,
+ ltb_list);
nid = libcfs_str2nid(ltb->ltb_text);
LASSERT(nid != LNET_NID_ANY);
static int
lnet_parse_route_tbs(struct list_head *tbs, int *im_a_router)
{
- lnet_text_buf_t *ltb;
+ struct lnet_text_buf_t *ltb;
while (!list_empty(tbs)) {
- ltb = list_entry(tbs->next, lnet_text_buf_t, ltb_list);
+ ltb = list_entry(tbs->next, struct lnet_text_buf_t, ltb_list);
if (lnet_parse_route(ltb->ltb_text, im_a_router) < 0) {
lnet_free_text_bufs(tbs);
int offset = 0;
int offset2;
int len;
- lnet_text_buf_t *tb;
- lnet_text_buf_t *tb2;
+ struct lnet_text_buf_t *tb;
+ struct lnet_text_buf_t *tb2;
struct list_head *t;
char *sep;
char *bracket;
LASSERT(!list_empty(nets));
LASSERT(nets->next == nets->prev); /* single entry */
- tb = list_entry(nets->next, lnet_text_buf_t, ltb_list);
+ tb = list_entry(nets->next, struct lnet_text_buf_t, ltb_list);
for (;;) {
sep = strchr(tb->ltb_text, ',');
}
list_for_each(t, nets) {
- tb2 = list_entry(t, lnet_text_buf_t, ltb_list);
+ tb2 = list_entry(t, struct lnet_text_buf_t, ltb_list);
if (tb2 == tb)
continue;
struct list_head current_nets;
struct list_head *t;
struct list_head *t2;
- lnet_text_buf_t *tb;
- lnet_text_buf_t *tb2;
+ struct lnet_text_buf_t *tb;
+ struct lnet_text_buf_t *tb2;
__u32 net1;
__u32 net2;
int len;
rc = 0;
while (!list_empty(&raw_entries)) {
- tb = list_entry(raw_entries.next, lnet_text_buf_t,
+ tb = list_entry(raw_entries.next, struct lnet_text_buf_t,
ltb_list);
strncpy(source, tb->ltb_text, sizeof(source)-1);
dup = 0;
list_for_each(t, ¤t_nets) {
- tb = list_entry(t, lnet_text_buf_t, ltb_list);
+ tb = list_entry(t, struct lnet_text_buf_t, ltb_list);
net1 = lnet_netspec2net(tb->ltb_text);
LASSERT(net1 != LNET_NIDNET(LNET_NID_ANY));
list_for_each(t2, &matched_nets) {
- tb2 = list_entry(t2, lnet_text_buf_t,
+ tb2 = list_entry(t2, struct lnet_text_buf_t,
ltb_list);
net2 = lnet_netspec2net(tb2->ltb_text);
LASSERT(net2 != LNET_NIDNET(LNET_NID_ANY));
}
list_for_each_safe(t, t2, ¤t_nets) {
- tb = list_entry(t, lnet_text_buf_t, ltb_list);
+ tb = list_entry(t, struct lnet_text_buf_t, ltb_list);
list_del(&tb->ltb_list);
list_add_tail(&tb->ltb_list, &matched_nets);
count = cfs_power2_roundup(count);
- if (callback != LNET_EQ_HANDLER_NONE && count != 0) {
+ if (callback != LNET_EQ_HANDLER_NONE && count != 0)
CWARN("EQ callback is guaranteed to get every event, do you still want to set eqcount %d for polling event which will have locking overhead? Please contact with developer to confirm\n", count);
- }
/* count can be 0 if only need callback, we can eliminate
* overhead of enqueue event */
lmd->md_length = total_length;
- if ((umd->options & LNET_MD_MAX_SIZE) != 0 && /* max size used */
+ if ((umd->options & LNET_MD_MAX_SIZE) != 0 && /* use max size */
(umd->max_size < 0 ||
umd->max_size > total_length)) /* illegal max_size */
return -EINVAL;
LASSERT(md->md_offset == 0);
rlength = hdr->payload_length;
- mlength = min_t(int, rlength, md->md_length);
+ mlength = min_t(uint, rlength, md->md_length);
if (mlength < rlength &&
(md->md_options & LNET_MD_TRUNCATE) == 0) {
cfs_percpt_for_each(ptable, i, the_lnet.ln_peer_tables) {
hash = ptable->pt_hash;
- if (hash == NULL) /* not intialized */
+ if (hash == NULL) /* not initialized */
break;
LASSERT(list_empty(&ptable->pt_deathrow));
}
cfs_percpt_for_each(ptable, i, the_lnet.ln_peer_tables) {
- LIST_HEAD (deathrow);
+ LIST_HEAD(deathrow);
lnet_peer_t *lp;
lnet_net_lock(i);
}
void
-lnet_notify_locked(lnet_peer_t *lp, int notifylnd, int alive, unsigned long when)
+lnet_notify_locked(lnet_peer_t *lp, int notifylnd, int alive,
+ unsigned long when)
{
if (time_before(when, lp->lp_timestamp)) { /* out of date information */
CDEBUG(D_NET, "Out of date\n");
}
lnet_remotenet_t *
-lnet_find_net_locked (__u32 net)
+lnet_find_net_locked(__u32 net)
{
lnet_remotenet_t *rnet;
struct list_head *tmp;
do_gettimeofday(&tv);
cfs_srand(tv.tv_sec ^ seed[0], tv.tv_usec ^ seed[1]);
seeded = 1;
- return;
}
/* NB expects LNET_LOCK held */
static void
-lnet_add_route_to_rnet (lnet_remotenet_t *rnet, lnet_route_t *route)
+lnet_add_route_to_rnet(lnet_remotenet_t *rnet, lnet_route_t *route)
{
unsigned int len = 0;
unsigned int offset = 0;
lnet_shuffle_seed();
- list_for_each (e, &rnet->lrn_routes) {
+ list_for_each(e, &rnet->lrn_routes) {
len++;
}
/* len+1 positions to add a new entry, also prevents division by 0 */
offset = cfs_rand() % (len + 1);
- list_for_each (e, &rnet->lrn_routes) {
+ list_for_each(e, &rnet->lrn_routes) {
if (offset == 0)
break;
offset--;
LIBCFS_FREE(route, sizeof(*route));
LIBCFS_FREE(rnet, sizeof(*rnet));
- if (rc == -EHOSTUNREACH) { /* gateway is not on a local net */
+ if (rc == -EHOSTUNREACH) /* gateway is not on a local net */
return 0; /* ignore the route entry */
- } else {
- CERROR("Error %d creating route %s %d %s\n", rc,
- libcfs_net2str(net), hops,
- libcfs_nid2str(gateway));
- }
+ CERROR("Error %d creating route %s %d %s\n", rc,
+ libcfs_net2str(net), hops,
+ libcfs_nid2str(gateway));
+
return rc;
}
- LASSERT (!the_lnet.ln_shutdown);
+ LASSERT(!the_lnet.ln_shutdown);
rnet2 = lnet_find_net_locked(net);
if (rnet2 == NULL) {
/* Search for a duplicate route (it's a NOOP if it is) */
add_route = 1;
- list_for_each (e, &rnet2->lrn_routes) {
+ list_for_each(e, &rnet2->lrn_routes) {
lnet_route_t *route2 = list_entry(e, lnet_route_t, lr_list);
if (route2->lr_gateway == route->lr_gateway) {
}
/* our lookups must be true */
- LASSERT (route2->lr_gateway->lp_nid != gateway);
+ LASSERT(route2->lr_gateway->lp_nid != gateway);
}
if (add_route) {
}
void
-lnet_destroy_routes (void)
+lnet_destroy_routes(void)
{
lnet_del_route(LNET_NIDNET(LNET_NID_ANY), LNET_NID_ANY);
}
__swab64s(&stat->ns_nid);
__swab32s(&stat->ns_status);
}
- return;
}
/**
struct list_head *entry;
int all_known;
- LASSERT (the_lnet.ln_rc_state == LNET_RC_STATE_RUNNING);
+ LASSERT(the_lnet.ln_rc_state == LNET_RC_STATE_RUNNING);
for (;;) {
int cpt = lnet_net_lock_current();
all_known = 1;
- list_for_each (entry, &the_lnet.ln_routers) {
+ list_for_each(entry, &the_lnet.ln_routers) {
rtr = list_entry(entry, lnet_peer_t, lp_rtr_list);
if (rtr->lp_alive_count == 0) {
}
rcd->rcd_pinginfo = pi;
- LASSERT (!LNetHandleIsInvalid(the_lnet.ln_rc_eqh));
+ LASSERT(!LNetHandleIsInvalid(the_lnet.ln_rc_eqh));
rc = LNetMDBind((lnet_md_t){.start = pi,
.user_ptr = rcd,
.length = LNET_PINGINFO_SIZE,
}
static int
-lnet_router_check_interval (lnet_peer_t *rtr)
+lnet_router_check_interval(lnet_peer_t *rtr)
{
int secs;
}
static void
-lnet_ping_router_locked (lnet_peer_t *rtr)
+lnet_ping_router_locked(lnet_peer_t *rtr)
{
lnet_rc_data_t *rcd = NULL;
unsigned long now = cfs_time_current();
}
lnet_peer_decref_locked(rtr);
- return;
}
int
int rc;
int eqsz;
- LASSERT (the_lnet.ln_rc_state == LNET_RC_STATE_SHUTDOWN);
+ LASSERT(the_lnet.ln_rc_state == LNET_RC_STATE_SHUTDOWN);
if (check_routers_before_use &&
dead_router_check_interval <= 0) {
}
void
-lnet_router_checker_stop (void)
+lnet_router_checker_stop(void)
{
int rc;
if (the_lnet.ln_rc_state == LNET_RC_STATE_SHUTDOWN)
return;
- LASSERT (the_lnet.ln_rc_state == LNET_RC_STATE_RUNNING);
+ LASSERT(the_lnet.ln_rc_state == LNET_RC_STATE_RUNNING);
the_lnet.ln_rc_state = LNET_RC_STATE_STOPPING;
/* block until event callback signals exit */
LASSERT(the_lnet.ln_rc_state == LNET_RC_STATE_SHUTDOWN);
rc = LNetEQFree(the_lnet.ln_rc_eqh);
- LASSERT (rc == 0);
- return;
+ LASSERT(rc == 0);
}
static void
cfs_block_allsigs();
- LASSERT (the_lnet.ln_rc_state == LNET_RC_STATE_RUNNING);
+ LASSERT(the_lnet.ln_rc_state == LNET_RC_STATE_RUNNING);
while (the_lnet.ln_rc_state == LNET_RC_STATE_RUNNING) {
__u64 version;
if (rbp->rbp_nbuffers == 0) /* not initialized or already freed */
return;
- LASSERT (list_empty(&rbp->rbp_msgs));
- LASSERT (rbp->rbp_credits == rbp->rbp_nbuffers);
+ LASSERT(list_empty(&rbp->rbp_msgs));
+ LASSERT(rbp->rbp_credits == rbp->rbp_nbuffers);
while (!list_empty(&rbp->rbp_bufs)) {
- LASSERT (rbp->rbp_credits > 0);
+ LASSERT(rbp->rbp_credits > 0);
rb = list_entry(rbp->rbp_bufs.next,
lnet_rtrbuf_t, rb_list);
nbuffers++;
}
- LASSERT (rbp->rbp_nbuffers == nbuffers);
- LASSERT (rbp->rbp_credits == nbuffers);
+ LASSERT(rbp->rbp_nbuffers == nbuffers);
+ LASSERT(rbp->rbp_credits == nbuffers);
rbp->rbp_nbuffers = rbp->rbp_credits = 0;
}
int i;
if (rbp->rbp_nbuffers != 0) {
- LASSERT (rbp->rbp_nbuffers == nbufs);
+ LASSERT(rbp->rbp_nbuffers == nbufs);
return 0;
}
/* No allocation "under fire" */
/* Otherwise we'd need code to schedule blocked msgs etc */
- LASSERT (!the_lnet.ln_routing);
+ LASSERT(!the_lnet.ln_routing);
}
- LASSERT (rbp->rbp_credits == nbufs);
+ LASSERT(rbp->rbp_credits == nbufs);
return 0;
}
lnet_rtrpools_alloc(int im_a_router)
{
lnet_rtrbufpool_t *rtrp;
- int large_pages = (LNET_MTU + PAGE_CACHE_SIZE - 1) >> PAGE_CACHE_SHIFT;
+ int large_pages;
int small_pages = 1;
int nrb_tiny;
int nrb_small;
int rc;
int i;
+ large_pages = (LNET_MTU + PAGE_CACHE_SIZE - 1) >> PAGE_CACHE_SHIFT;
+
if (!strcmp(forwarding, "")) {
/* not set either way */
if (!im_a_router)
unsigned long now = cfs_time_current();
int cpt = lnet_cpt_of_nid(nid);
- LASSERT (!in_interrupt ());
+ LASSERT(!in_interrupt ());
- CDEBUG (D_NET, "%s notifying %s: %s\n",
+ CDEBUG(D_NET, "%s notifying %s: %s\n",
(ni == NULL) ? "userspace" : libcfs_nid2str(ni->ni_nid),
libcfs_nid2str(nid),
alive ? "up" : "down");
if (ni != NULL &&
LNET_NIDNET(ni->ni_nid) != LNET_NIDNET(nid)) {
- CWARN ("Ignoring notification of %s %s by %s (different net)\n",
+ CWARN("Ignoring notification of %s %s by %s (different net)\n",
libcfs_nid2str(nid), alive ? "birth" : "death",
libcfs_nid2str(ni->ni_nid));
return -EINVAL;
EXPORT_SYMBOL(lnet_notify);
void
-lnet_get_tunables (void)
+lnet_get_tunables(void)
{
- return;
}
#else
int
-lnet_notify (lnet_ni_t *ni, lnet_nid_t nid, int alive, unsigned long when)
+lnet_notify(lnet_ni_t *ni, lnet_nid_t nid, int alive, unsigned long when)
{
return -EOPNOTSUPP;
}
void
-lnet_router_checker (void)
+lnet_router_checker(void)
{
static time_t last;
static int running;
abort();
}
- LASSERT (rc == 1);
+ LASSERT(rc == 1);
lnet_router_checker_event(&ev);
}
return;
}
- LASSERT (the_lnet.ln_rc_state == LNET_RC_STATE_RUNNING);
+ LASSERT(the_lnet.ln_rc_state == LNET_RC_STATE_RUNNING);
lnet_net_lock(0);
version = the_lnet.ln_routers_version;
- list_for_each_entry (rtr, &the_lnet.ln_routers, lp_rtr_list) {
+ list_for_each_entry(rtr, &the_lnet.ln_routers, lp_rtr_list) {
lnet_ping_router_locked(rtr);
- LASSERT (version == the_lnet.ln_routers_version);
+ LASSERT(version == the_lnet.ln_routers_version);
}
lnet_net_unlock(0);
running = 0; /* lock only needed for the recursion check */
- return;
}
/* NB lnet_peers_start_down depends on me,
* so must be called before any peer creation */
void
-lnet_get_tunables (void)
+lnet_get_tunables(void)
{
char *s;
}
LBUG();
- return;
}
static int
if (args->lstio_grp_key != console_session.ses_key)
return -EACCES;
- if (args->lstio_grp_namep == NULL||
+ if (args->lstio_grp_namep == NULL ||
args->lstio_grp_nmlen <= 0 ||
args->lstio_grp_nmlen > LST_NAME_SIZE)
return -EINVAL;
memset(&console_session.ses_trans_stat, 0, sizeof(lstcon_trans_stat_t));
switch (opc) {
- case LSTIO_SESSION_NEW:
- rc = lst_session_new_ioctl((lstio_session_new_args_t *)buf);
- break;
- case LSTIO_SESSION_END:
- rc = lst_session_end_ioctl((lstio_session_end_args_t *)buf);
- break;
- case LSTIO_SESSION_INFO:
- rc = lst_session_info_ioctl((lstio_session_info_args_t *)buf);
- break;
- case LSTIO_DEBUG:
- rc = lst_debug_ioctl((lstio_debug_args_t *)buf);
- break;
- case LSTIO_GROUP_ADD:
- rc = lst_group_add_ioctl((lstio_group_add_args_t *)buf);
- break;
- case LSTIO_GROUP_DEL:
- rc = lst_group_del_ioctl((lstio_group_del_args_t *)buf);
- break;
- case LSTIO_GROUP_UPDATE:
- rc = lst_group_update_ioctl((lstio_group_update_args_t *)buf);
- break;
- case LSTIO_NODES_ADD:
- rc = lst_nodes_add_ioctl((lstio_group_nodes_args_t *)buf);
- break;
- case LSTIO_GROUP_LIST:
- rc = lst_group_list_ioctl((lstio_group_list_args_t *)buf);
- break;
- case LSTIO_GROUP_INFO:
- rc = lst_group_info_ioctl((lstio_group_info_args_t *)buf);
- break;
- case LSTIO_BATCH_ADD:
- rc = lst_batch_add_ioctl((lstio_batch_add_args_t *)buf);
- break;
- case LSTIO_BATCH_START:
- rc = lst_batch_run_ioctl((lstio_batch_run_args_t *)buf);
- break;
- case LSTIO_BATCH_STOP:
- rc = lst_batch_stop_ioctl((lstio_batch_stop_args_t *)buf);
- break;
- case LSTIO_BATCH_QUERY:
- rc = lst_batch_query_ioctl((lstio_batch_query_args_t *)buf);
- break;
- case LSTIO_BATCH_LIST:
- rc = lst_batch_list_ioctl((lstio_batch_list_args_t *)buf);
- break;
- case LSTIO_BATCH_INFO:
- rc = lst_batch_info_ioctl((lstio_batch_info_args_t *)buf);
- break;
- case LSTIO_TEST_ADD:
- rc = lst_test_add_ioctl((lstio_test_args_t *)buf);
- break;
- case LSTIO_STAT_QUERY:
- rc = lst_stat_query_ioctl((lstio_stat_args_t *)buf);
- break;
- default:
- rc = -EINVAL;
+ case LSTIO_SESSION_NEW:
+ rc = lst_session_new_ioctl((lstio_session_new_args_t *)buf);
+ break;
+ case LSTIO_SESSION_END:
+ rc = lst_session_end_ioctl((lstio_session_end_args_t *)buf);
+ break;
+ case LSTIO_SESSION_INFO:
+ rc = lst_session_info_ioctl((lstio_session_info_args_t *)buf);
+ break;
+ case LSTIO_DEBUG:
+ rc = lst_debug_ioctl((lstio_debug_args_t *)buf);
+ break;
+ case LSTIO_GROUP_ADD:
+ rc = lst_group_add_ioctl((lstio_group_add_args_t *)buf);
+ break;
+ case LSTIO_GROUP_DEL:
+ rc = lst_group_del_ioctl((lstio_group_del_args_t *)buf);
+ break;
+ case LSTIO_GROUP_UPDATE:
+ rc = lst_group_update_ioctl((lstio_group_update_args_t *)buf);
+ break;
+ case LSTIO_NODES_ADD:
+ rc = lst_nodes_add_ioctl((lstio_group_nodes_args_t *)buf);
+ break;
+ case LSTIO_GROUP_LIST:
+ rc = lst_group_list_ioctl((lstio_group_list_args_t *)buf);
+ break;
+ case LSTIO_GROUP_INFO:
+ rc = lst_group_info_ioctl((lstio_group_info_args_t *)buf);
+ break;
+ case LSTIO_BATCH_ADD:
+ rc = lst_batch_add_ioctl((lstio_batch_add_args_t *)buf);
+ break;
+ case LSTIO_BATCH_START:
+ rc = lst_batch_run_ioctl((lstio_batch_run_args_t *)buf);
+ break;
+ case LSTIO_BATCH_STOP:
+ rc = lst_batch_stop_ioctl((lstio_batch_stop_args_t *)buf);
+ break;
+ case LSTIO_BATCH_QUERY:
+ rc = lst_batch_query_ioctl((lstio_batch_query_args_t *)buf);
+ break;
+ case LSTIO_BATCH_LIST:
+ rc = lst_batch_list_ioctl((lstio_batch_list_args_t *)buf);
+ break;
+ case LSTIO_BATCH_INFO:
+ rc = lst_batch_info_ioctl((lstio_batch_info_args_t *)buf);
+ break;
+ case LSTIO_TEST_ADD:
+ rc = lst_test_add_ioctl((lstio_test_args_t *)buf);
+ break;
+ case LSTIO_STAT_QUERY:
+ rc = lst_stat_query_ioctl((lstio_stat_args_t *)buf);
+ break;
+ default:
+ rc = -EINVAL;
}
if (copy_to_user(data->ioc_pbuf2, &console_session.ses_trans_stat,
static void
lstcon_node_get(lstcon_node_t *nd)
{
- LASSERT (nd->nd_ref >= 1);
+ LASSERT(nd->nd_ref >= 1);
nd->nd_ref++;
}
lstcon_ndlink_t *ndl;
unsigned int idx = LNET_NIDADDR(id.nid) % LST_GLOBAL_HASHSIZE;
- LASSERT (id.nid != LNET_NID_ANY);
+ LASSERT(id.nid != LNET_NID_ANY);
list_for_each_entry(ndl, &console_session.ses_ndl_hash[idx], ndl_hlink) {
if (ndl->ndl_node->nd_id.nid != id.nid ||
{
lstcon_ndlink_t *ndl;
- LASSERT (nd->nd_ref > 0);
+ LASSERT(nd->nd_ref > 0);
if (--nd->nd_ref > 0)
return;
ndl = (lstcon_ndlink_t *)(nd + 1);
- LASSERT (!list_empty(&ndl->ndl_link));
- LASSERT (!list_empty(&ndl->ndl_hlink));
+ LASSERT(!list_empty(&ndl->ndl_link));
+ LASSERT(!list_empty(&ndl->ndl_hlink));
/* remove from session */
list_del(&ndl->ndl_link);
static void
lstcon_ndlink_release(lstcon_ndlink_t *ndl)
{
- LASSERT (list_empty(&ndl->ndl_link));
- LASSERT (!list_empty(&ndl->ndl_hlink));
+ LASSERT(list_empty(&ndl->ndl_link));
+ LASSERT(!list_empty(&ndl->ndl_hlink));
list_del(&ndl->ndl_hlink); /* delete from hash */
lstcon_node_put(ndl->ndl_node);
lstcon_group_drain(grp, 0);
for (i = 0; i < LST_NODE_HASHSIZE; i++) {
- LASSERT (list_empty(&grp->grp_ndl_hash[i]));
+ LASSERT(list_empty(&grp->grp_ndl_hash[i]));
}
LIBCFS_FREE(grp, offsetof(lstcon_group_t,
lstcon_group_t *grp;
int rc;
- LASSERT (count > 0);
- LASSERT (ids_up != NULL);
+ LASSERT(count > 0);
+ LASSERT(ids_up != NULL);
rc = lstcon_group_find(name, &grp);
if (rc != 0) {
{
lstcon_group_t *grp;
- LASSERT (index >= 0);
- LASSERT (name_up != NULL);
+ LASSERT(index >= 0);
+ LASSERT(name_up != NULL);
list_for_each_entry(grp, &console_session.ses_grp_list, grp_link) {
if (index-- == 0) {
int count = 0;
int index = 0;
- LASSERT (index_p != NULL && count_p != NULL);
- LASSERT (dents_up != NULL);
- LASSERT (*index_p >= 0);
- LASSERT (*count_p > 0);
+ LASSERT(index_p != NULL && count_p != NULL);
+ LASSERT(dents_up != NULL);
+ LASSERT(*index_p >= 0);
+ LASSERT(*count_p > 0);
list_for_each_entry(ndl, head, ndl_link) {
if (index++ < *index_p)
{
lstcon_batch_t *bat;
- LASSERT (name_up != NULL);
- LASSERT (index >= 0);
+ LASSERT(name_up != NULL);
+ LASSERT(index >= 0);
list_for_each_entry(bat, &console_session.ses_bat_list, bat_link) {
if (index-- == 0) {
while (!list_empty(&bat->bat_test_list)) {
test = list_entry(bat->bat_test_list.next,
lstcon_test_t, tes_link);
- LASSERT (list_empty(&test->tes_trans_list));
+ LASSERT(list_empty(&test->tes_trans_list));
list_del(&test->tes_link);
tes_param[test->tes_paramlen]));
}
- LASSERT (list_empty(&bat->bat_trans_list));
+ LASSERT(list_empty(&bat->bat_trans_list));
while (!list_empty(&bat->bat_cli_list)) {
ndl = list_entry(bat->bat_cli_list.next,
}
for (i = 0; i < LST_NODE_HASHSIZE; i++) {
- LASSERT (list_empty(&bat->bat_cli_hash[i]));
- LASSERT (list_empty(&bat->bat_srv_hash[i]));
+ LASSERT(list_empty(&bat->bat_cli_hash[i]));
+ LASSERT(list_empty(&bat->bat_srv_hash[i]));
}
LIBCFS_FREE(bat->bat_cli_hash,
struct list_head *head;
test = (lstcon_test_t *)arg;
- LASSERT (test != NULL);
+ LASSERT(test != NULL);
batch = test->tes_batch;
- LASSERT (batch != NULL);
+ LASSERT(batch != NULL);
if (test->tes_oneside &&
transop == LST_TRANS_TSBSRVADD)
head = &batch->bat_cli_list;
} else {
- LASSERT (transop == LST_TRANS_TSBSRVADD);
+ LASSERT(transop == LST_TRANS_TSBSRVADD);
hash = batch->bat_srv_hash;
head = &batch->bat_srv_list;
}
- LASSERT (nd->nd_id.nid != LNET_NID_ANY);
+ LASSERT(nd->nd_id.nid != LNET_NID_ANY);
if (lstcon_ndlink_find(hash, nd->nd_id, &ndl, 1) != 0)
return -ENOMEM;
int transop;
int rc;
- LASSERT (test->tes_src_grp != NULL);
- LASSERT (test->tes_dst_grp != NULL);
+ LASSERT(test->tes_src_grp != NULL);
+ LASSERT(test->tes_dst_grp != NULL);
transop = LST_TRANS_TSBSRVADD;
grp = test->tes_dst_grp;
{
srpc_batch_reply_t *rep = &msg->msg_body.bat_reply;
- LASSERT (transop == LST_TRANS_TSBCLIQRY ||
+ LASSERT(transop == LST_TRANS_TSBCLIQRY ||
transop == LST_TRANS_TSBSRVQRY);
/* positive errno, framework error code */
{
lnet_process_id_t id;
- LASSERT (console_session.ses_state == LST_SESSION_NONE);
+ LASSERT(console_session.ses_state == LST_SESSION_NONE);
LNetGetId(1, &id);
sid->ses_nid = id.nid;
lstcon_batch_t *bat;
int rc = 0;
- LASSERT (console_session.ses_state == LST_SESSION_ACTIVE);
+ LASSERT(console_session.ses_state == LST_SESSION_ACTIVE);
rc = lstcon_rpc_trans_ndlist(&console_session.ses_ndl_list,
NULL, LST_TRANS_SESEND, NULL,
while (!list_empty(&console_session.ses_grp_list)) {
grp = list_entry(console_session.ses_grp_list.next,
lstcon_group_t, grp_link);
- LASSERT (grp->grp_ref == 1);
+ LASSERT(grp->grp_ref == 1);
lstcon_group_put(grp);
}
/* all nodes should be released */
- LASSERT (list_empty(&console_session.ses_ndl_list));
+ LASSERT(list_empty(&console_session.ses_ndl_list));
console_session.ses_shutdown = 0;
console_session.ses_expired = 0;
}
static int
-lstcon_acceptor_handle (srpc_server_rpc_t *rpc)
+lstcon_acceptor_handle(srpc_server_rpc_t *rpc)
{
srpc_msg_t *rep = &rpc->srpc_replymsg;
srpc_msg_t *req = &rpc->srpc_reqstbuf->buf_msg;
lstcon_init_acceptor_service();
rc = srpc_add_service(&lstcon_acceptor_service);
- LASSERT (rc != -EBUSY);
+ LASSERT(rc != -EBUSY);
if (rc != 0) {
LIBCFS_FREE(console_session.ses_ndl_hash,
sizeof(struct list_head) * LST_GLOBAL_HASHSIZE);
mutex_unlock(&console_session.ses_mutex);
- LASSERT (list_empty(&console_session.ses_ndl_list));
- LASSERT (list_empty(&console_session.ses_grp_list));
- LASSERT (list_empty(&console_session.ses_bat_list));
- LASSERT (list_empty(&console_session.ses_trans_list));
+ LASSERT(list_empty(&console_session.ses_ndl_list));
+ LASSERT(list_empty(&console_session.ses_grp_list));
+ LASSERT(list_empty(&console_session.ses_bat_list));
+ LASSERT(list_empty(&console_session.ses_trans_list));
for (i = 0; i < LST_NODE_HASHSIZE; i++) {
- LASSERT (list_empty(&console_session.ses_ndl_hash[i]));
+ LASSERT(list_empty(&console_session.ses_ndl_hash[i]));
}
LIBCFS_FREE(console_session.ses_ndl_hash,
return &hash[idx];
}
+int lstcon_console_init(void);
+int lstcon_ioctl_entry(unsigned int cmd, struct libcfs_ioctl_data *data);
+int lstcon_console_fini(void);
extern int lstcon_session_match(lst_sid_t sid);
extern int lstcon_session_new(char *name, int key, unsigned version,
int timeout, int flags, lst_sid_t *sid_up);
} sfw_data;
/* forward ref's */
-int sfw_stop_batch (sfw_batch_t *tsb, int force);
-void sfw_destroy_session (sfw_session_t *sn);
+int sfw_stop_batch(sfw_batch_t *tsb, int force);
+void sfw_destroy_session(sfw_session_t *sn);
static inline sfw_test_case_t *
sfw_find_test_case(int id)
{
sfw_test_case_t *tsc;
- LASSERT (id <= SRPC_SERVICE_MAX_ID);
- LASSERT (id > SRPC_FRAMEWORK_SERVICE_MAX_ID);
+ LASSERT(id <= SRPC_SERVICE_MAX_ID);
+ LASSERT(id > SRPC_FRAMEWORK_SERVICE_MAX_ID);
- list_for_each_entry (tsc, &sfw_data.fw_tests, tsc_list) {
+ list_for_each_entry(tsc, &sfw_data.fw_tests, tsc_list) {
if (tsc->tsc_srv_service->sv_id == id)
return tsc;
}
}
static int
-sfw_register_test (srpc_service_t *service, sfw_test_client_ops_t *cliops)
+sfw_register_test(srpc_service_t *service, sfw_test_client_ops_t *cliops)
{
sfw_test_case_t *tsc;
if (sfw_find_test_case(service->sv_id) != NULL) {
- CERROR ("Failed to register test %s (%d)\n",
+ CERROR("Failed to register test %s (%d)\n",
service->sv_name, service->sv_id);
return -EEXIST;
}
}
static void
-sfw_add_session_timer (void)
+sfw_add_session_timer(void)
{
sfw_session_t *sn = sfw_data.fw_session;
stt_timer_t *timer = &sn->sn_timer;
- LASSERT (!sfw_data.fw_shuttingdown);
+ LASSERT(!sfw_data.fw_shuttingdown);
if (sn == NULL || sn->sn_timeout == 0)
return;
- LASSERT (!sn->sn_timer_active);
+ LASSERT(!sn->sn_timer_active);
sn->sn_timer_active = 1;
timer->stt_expires = cfs_time_add(sn->sn_timeout,
}
static int
-sfw_del_session_timer (void)
+sfw_del_session_timer(void)
{
sfw_session_t *sn = sfw_data.fw_session;
if (sn == NULL || !sn->sn_timer_active)
return 0;
- LASSERT (sn->sn_timeout != 0);
+ LASSERT(sn->sn_timeout != 0);
if (stt_del_timer(&sn->sn_timer)) { /* timer defused */
sn->sn_timer_active = 0;
}
static void
-sfw_deactivate_session (void)
+sfw_deactivate_session(void)
__must_hold(&sfw_data.fw_lock)
{
sfw_session_t *sn = sfw_data.fw_session;
if (sn == NULL) return;
- LASSERT (!sn->sn_timer_active);
+ LASSERT(!sn->sn_timer_active);
sfw_data.fw_session = NULL;
atomic_inc(&sfw_data.fw_nzombies);
spin_lock(&sfw_data.fw_lock);
- list_for_each_entry (tsb, &sn->sn_batches, bat_list) {
+ list_for_each_entry(tsb, &sn->sn_batches, bat_list) {
if (sfw_batch_active(tsb)) {
nactive++;
sfw_stop_batch(tsb, 1);
static void
-sfw_session_expired (void *data)
+sfw_session_expired(void *data)
{
sfw_session_t *sn = data;
spin_lock(&sfw_data.fw_lock);
- LASSERT (sn->sn_timer_active);
- LASSERT (sn == sfw_data.fw_session);
+ LASSERT(sn->sn_timer_active);
+ LASSERT(sn == sfw_data.fw_session);
- CWARN ("Session expired! sid: %s-%llu, name: %s\n",
+ CWARN("Session expired! sid: %s-%llu, name: %s\n",
libcfs_nid2str(sn->sn_id.ses_nid),
sn->sn_id.ses_stamp, &sn->sn_name[0]);
struct srpc_service *sv = rpc->srpc_scd->scd_svc;
int status = rpc->srpc_status;
- CDEBUG (D_NET,
+ CDEBUG(D_NET,
"Incoming framework RPC done: service %s, peer %s, status %s:%d\n",
sv->sv_name, libcfs_id2str(rpc->srpc_peer),
swi_state2str(rpc->srpc_wi.swi_state),
}
static void
-sfw_client_rpc_fini (srpc_client_rpc_t *rpc)
+sfw_client_rpc_fini(srpc_client_rpc_t *rpc)
{
- LASSERT (rpc->crpc_bulk.bk_niov == 0);
- LASSERT (list_empty(&rpc->crpc_list));
- LASSERT (atomic_read(&rpc->crpc_refcount) == 0);
+ LASSERT(rpc->crpc_bulk.bk_niov == 0);
+ LASSERT(list_empty(&rpc->crpc_list));
+ LASSERT(atomic_read(&rpc->crpc_refcount) == 0);
- CDEBUG (D_NET,
+ CDEBUG(D_NET,
"Outgoing framework RPC done: service %d, peer %s, status %s:%d:%d\n",
rpc->crpc_service, libcfs_id2str(rpc->crpc_dest),
swi_state2str(rpc->crpc_wi.swi_state),
}
static sfw_batch_t *
-sfw_find_batch (lst_bid_t bid)
+sfw_find_batch(lst_bid_t bid)
{
sfw_session_t *sn = sfw_data.fw_session;
sfw_batch_t *bat;
- LASSERT (sn != NULL);
+ LASSERT(sn != NULL);
- list_for_each_entry (bat, &sn->sn_batches, bat_list) {
+ list_for_each_entry(bat, &sn->sn_batches, bat_list) {
if (bat->bat_id.bat_id == bid.bat_id)
return bat;
}
}
static sfw_batch_t *
-sfw_bid2batch (lst_bid_t bid)
+sfw_bid2batch(lst_bid_t bid)
{
sfw_session_t *sn = sfw_data.fw_session;
sfw_batch_t *bat;
- LASSERT (sn != NULL);
+ LASSERT(sn != NULL);
bat = sfw_find_batch(bid);
if (bat != NULL)
}
static int
-sfw_get_stats (srpc_stat_reqst_t *request, srpc_stat_reply_t *reply)
+sfw_get_stats(srpc_stat_reqst_t *request, srpc_stat_reply_t *reply)
{
sfw_session_t *sn = sfw_data.fw_session;
sfw_counters_t *cnt = &reply->str_fw;
cnt->zombie_sessions = atomic_read(&sfw_data.fw_nzombies);
cnt->active_batches = 0;
- list_for_each_entry (bat, &sn->sn_batches, bat_list) {
+ list_for_each_entry(bat, &sn->sn_batches, bat_list) {
if (atomic_read(&bat->bat_nactive) > 0)
cnt->active_batches++;
}
/* brand new or create by force */
LIBCFS_ALLOC(sn, sizeof(sfw_session_t));
if (sn == NULL) {
- CERROR ("Dropping RPC (mksn) under memory pressure.\n");
+ CERROR("Dropping RPC (mksn) under memory pressure.\n");
return -ENOMEM;
}
}
static int
-sfw_remove_session (srpc_rmsn_reqst_t *request, srpc_rmsn_reply_t *reply)
+sfw_remove_session(srpc_rmsn_reqst_t *request, srpc_rmsn_reply_t *reply)
{
sfw_session_t *sn = sfw_data.fw_session;
}
static int
-sfw_debug_session (srpc_debug_reqst_t *request, srpc_debug_reply_t *reply)
+sfw_debug_session(srpc_debug_reqst_t *request, srpc_debug_reply_t *reply)
{
sfw_session_t *sn = sfw_data.fw_session;
}
static void
-sfw_test_rpc_fini (srpc_client_rpc_t *rpc)
+sfw_test_rpc_fini(srpc_client_rpc_t *rpc)
{
sfw_test_unit_t *tsu = rpc->crpc_priv;
sfw_test_instance_t *tsi = tsu->tsu_instance;
/* Called with hold of tsi->tsi_lock */
- LASSERT (list_empty(&rpc->crpc_list));
+ LASSERT(list_empty(&rpc->crpc_list));
list_add(&rpc->crpc_list, &tsi->tsi_free_rpcs);
}
}
static void
-sfw_destroy_test_instance (sfw_test_instance_t *tsi)
+sfw_destroy_test_instance(sfw_test_instance_t *tsi)
{
srpc_client_rpc_t *rpc;
sfw_test_unit_t *tsu;
tsi->tsi_ops->tso_fini(tsi);
- LASSERT (!tsi->tsi_stopping);
- LASSERT (list_empty(&tsi->tsi_active_rpcs));
- LASSERT (!sfw_test_active(tsi));
+ LASSERT(!tsi->tsi_stopping);
+ LASSERT(list_empty(&tsi->tsi_active_rpcs));
+ LASSERT(!sfw_test_active(tsi));
while (!list_empty(&tsi->tsi_units)) {
tsu = list_entry(tsi->tsi_units.next,
}
static void
-sfw_destroy_batch (sfw_batch_t *tsb)
+sfw_destroy_batch(sfw_batch_t *tsb)
{
sfw_test_instance_t *tsi;
- LASSERT (!sfw_batch_active(tsb));
- LASSERT (list_empty(&tsb->bat_list));
+ LASSERT(!sfw_batch_active(tsb));
+ LASSERT(list_empty(&tsb->bat_list));
while (!list_empty(&tsb->bat_tests)) {
tsi = list_entry(tsb->bat_tests.next,
}
void
-sfw_destroy_session (sfw_session_t *sn)
+sfw_destroy_session(sfw_session_t *sn)
{
sfw_batch_t *batch;
- LASSERT (list_empty(&sn->sn_list));
- LASSERT (sn != sfw_data.fw_session);
+ LASSERT(list_empty(&sn->sn_list));
+ LASSERT(sn != sfw_data.fw_session);
while (!list_empty(&sn->sn_batches)) {
batch = list_entry(sn->sn_batches.next,
{
srpc_test_reqst_t *req = &msg->msg_body.tes_reqst;
- LASSERT (msg->msg_type == SRPC_MSG_TEST_REQST);
- LASSERT (req->tsr_is_client);
+ LASSERT(msg->msg_type == SRPC_MSG_TEST_REQST);
+ LASSERT(req->tsr_is_client);
if (msg->msg_magic == SRPC_MSG_MAGIC)
return; /* no flipping needed */
- LASSERT (msg->msg_magic == __swab32(SRPC_MSG_MAGIC));
+ LASSERT(msg->msg_magic == __swab32(SRPC_MSG_MAGIC));
if (req->tsr_service == SRPC_SERVICE_BRW) {
if ((msg->msg_ses_feats & LST_FEAT_BULK_LEN) == 0) {
return;
}
- LBUG ();
+ LBUG();
return;
}
static int
-sfw_add_test_instance (sfw_batch_t *tsb, srpc_server_rpc_t *rpc)
+sfw_add_test_instance(sfw_batch_t *tsb, srpc_server_rpc_t *rpc)
{
srpc_msg_t *msg = &rpc->srpc_reqstbuf->buf_msg;
srpc_test_reqst_t *req = &msg->msg_body.tes_reqst;
LIBCFS_ALLOC(tsi, sizeof(*tsi));
if (tsi == NULL) {
- CERROR ("Can't allocate test instance for batch: %llu\n",
+ CERROR("Can't allocate test instance for batch: %llu\n",
tsb->bat_id.bat_id);
return -ENOMEM;
}
return rc;
}
- LASSERT (!sfw_batch_active(tsb));
+ LASSERT(!sfw_batch_active(tsb));
if (!tsi->tsi_is_client) {
/* it's test server, just add it to tsb */
return 0;
}
- LASSERT (bk != NULL);
- LASSERT (bk->bk_niov * SFW_ID_PER_PAGE >= (unsigned int)ndest);
+ LASSERT(bk != NULL);
+ LASSERT(bk->bk_niov * SFW_ID_PER_PAGE >= (unsigned int)ndest);
LASSERT((unsigned int)bk->bk_len >=
sizeof(lnet_process_id_packed_t) * ndest);
int j;
dests = page_address(bk->bk_iovs[i / SFW_ID_PER_PAGE].kiov_page);
- LASSERT (dests != NULL); /* my pages are within KVM always */
+ LASSERT(dests != NULL); /* my pages are within KVM always */
id = dests[i % SFW_ID_PER_PAGE];
if (msg->msg_magic != SRPC_MSG_MAGIC)
sfw_unpack_id(id);
LIBCFS_ALLOC(tsu, sizeof(sfw_test_unit_t));
if (tsu == NULL) {
rc = -ENOMEM;
- CERROR ("Can't allocate tsu for %d\n",
+ CERROR("Can't allocate tsu for %d\n",
tsi->tsi_service);
goto error;
}
}
error:
- LASSERT (rc != 0);
+ LASSERT(rc != 0);
sfw_destroy_test_instance(tsi);
return rc;
}
static void
-sfw_test_unit_done (sfw_test_unit_t *tsu)
+sfw_test_unit_done(sfw_test_unit_t *tsu)
{
sfw_test_instance_t *tsi = tsu->tsu_instance;
sfw_batch_t *tsb = tsi->tsi_batch;
sfw_session_t *sn = tsb->bat_session;
- LASSERT (sfw_test_active(tsi));
+ LASSERT(sfw_test_active(tsi));
if (!atomic_dec_and_test(&tsi->tsi_nactive))
return;
return;
}
- LASSERT (!list_empty(&sn->sn_list)); /* I'm a zombie! */
+ LASSERT(!list_empty(&sn->sn_list)); /* I'm a zombie! */
- list_for_each_entry (tsb, &sn->sn_batches, bat_list) {
+ list_for_each_entry(tsb, &sn->sn_batches, bat_list) {
if (sfw_batch_active(tsb)) {
spin_unlock(&sfw_data.fw_lock);
return;
}
static void
-sfw_test_rpc_done (srpc_client_rpc_t *rpc)
+sfw_test_rpc_done(srpc_client_rpc_t *rpc)
{
sfw_test_unit_t *tsu = rpc->crpc_priv;
sfw_test_instance_t *tsi = tsu->tsu_instance;
spin_lock(&tsi->tsi_lock);
- LASSERT (sfw_test_active(tsi));
- LASSERT (!list_empty(&rpc->crpc_list));
+ LASSERT(sfw_test_active(tsi));
+ LASSERT(!list_empty(&rpc->crpc_list));
list_del_init(&rpc->crpc_list);
spin_lock(&tsi->tsi_lock);
- LASSERT (sfw_test_active(tsi));
+ LASSERT(sfw_test_active(tsi));
if (!list_empty(&tsi->tsi_free_rpcs)) {
/* pick request from buffer */
rpc = list_entry(tsi->tsi_free_rpcs.next,
srpc_client_rpc_t, crpc_list);
- LASSERT (nblk == rpc->crpc_bulk.bk_niov);
+ LASSERT(nblk == rpc->crpc_bulk.bk_niov);
list_del_init(&rpc->crpc_list);
}
}
static int
-sfw_run_test (swi_workitem_t *wi)
+sfw_run_test(swi_workitem_t *wi)
{
sfw_test_unit_t *tsu = wi->swi_workitem.wi_data;
sfw_test_instance_t *tsi = tsu->tsu_instance;
srpc_client_rpc_t *rpc = NULL;
- LASSERT (wi == &tsu->tsu_worker);
+ LASSERT(wi == &tsu->tsu_worker);
if (tsi->tsi_ops->tso_prep_rpc(tsu, tsu->tsu_dest, &rpc) != 0) {
- LASSERT (rpc == NULL);
+ LASSERT(rpc == NULL);
goto test_done;
}
- LASSERT (rpc != NULL);
+ LASSERT(rpc != NULL);
spin_lock(&tsi->tsi_lock);
}
static int
-sfw_run_batch (sfw_batch_t *tsb)
+sfw_run_batch(sfw_batch_t *tsb)
{
swi_workitem_t *wi;
sfw_test_unit_t *tsu;
return 0;
}
- list_for_each_entry (tsi, &tsb->bat_tests, tsi_list) {
+ list_for_each_entry(tsi, &tsb->bat_tests, tsi_list) {
if (!tsi->tsi_is_client) /* skip server instances */
continue;
- LASSERT (!tsi->tsi_stopping);
- LASSERT (!sfw_test_active(tsi));
+ LASSERT(!tsi->tsi_stopping);
+ LASSERT(!sfw_test_active(tsi));
atomic_inc(&tsb->bat_nactive);
- list_for_each_entry (tsu, &tsi->tsi_units, tsu_list) {
+ list_for_each_entry(tsu, &tsi->tsi_units, tsu_list) {
atomic_inc(&tsi->tsi_nactive);
tsu->tsu_loop = tsi->tsi_loop;
wi = &tsu->tsu_worker;
}
int
-sfw_stop_batch (sfw_batch_t *tsb, int force)
+sfw_stop_batch(sfw_batch_t *tsb, int force)
{
sfw_test_instance_t *tsi;
srpc_client_rpc_t *rpc;
return 0;
}
- list_for_each_entry (tsi, &tsb->bat_tests, tsi_list) {
+ list_for_each_entry(tsi, &tsb->bat_tests, tsi_list) {
spin_lock(&tsi->tsi_lock);
if (!tsi->tsi_is_client ||
}
static int
-sfw_query_batch (sfw_batch_t *tsb, int testidx, srpc_batch_reply_t *reply)
+sfw_query_batch(sfw_batch_t *tsb, int testidx, srpc_batch_reply_t *reply)
{
sfw_test_instance_t *tsi;
return 0;
}
- list_for_each_entry (tsi, &tsb->bat_tests, tsi_list) {
+ list_for_each_entry(tsi, &tsb->bat_tests, tsi_list) {
if (testidx-- > 1)
continue;
}
void
-sfw_free_pages (srpc_server_rpc_t *rpc)
+sfw_free_pages(srpc_server_rpc_t *rpc)
{
srpc_free_bulk(rpc->srpc_bulk);
rpc->srpc_bulk = NULL;
}
static int
-sfw_add_test (srpc_server_rpc_t *rpc)
+sfw_add_test(srpc_server_rpc_t *rpc)
{
sfw_session_t *sn = sfw_data.fw_session;
srpc_test_reply_t *reply = &rpc->srpc_replymsg.msg_body.tes_reply;
bat = sfw_bid2batch(request->tsr_bid);
if (bat == NULL) {
- CERROR ("Dropping RPC (%s) from %s under memory pressure.\n",
+ CERROR("Dropping RPC (%s) from %s under memory pressure.\n",
rpc->srpc_scd->scd_svc->sv_name,
libcfs_id2str(rpc->srpc_peer));
return -ENOMEM;
}
rc = sfw_add_test_instance(bat, rpc);
- CDEBUG (rc == 0 ? D_NET : D_WARNING,
+ CDEBUG(rc == 0 ? D_NET : D_WARNING,
"%s test: sv %d %s, loop %d, concur %d, ndest %d\n",
rc == 0 ? "Added" : "Failed to add", request->tsr_service,
request->tsr_is_client ? "client" : "server",
}
static int
-sfw_control_batch (srpc_batch_reqst_t *request, srpc_batch_reply_t *reply)
+sfw_control_batch(srpc_batch_reqst_t *request, srpc_batch_reply_t *reply)
{
sfw_session_t *sn = sfw_data.fw_session;
int rc = 0;
switch (sv->sv_id) {
default:
- LBUG ();
+ LBUG();
case SRPC_SERVICE_TEST:
rc = sfw_add_test(rpc);
break;
spin_lock(&sfw_data.fw_lock);
- LASSERT (!sfw_data.fw_shuttingdown);
- LASSERT (service <= SRPC_FRAMEWORK_SERVICE_MAX_ID);
+ LASSERT(!sfw_data.fw_shuttingdown);
+ LASSERT(service <= SRPC_FRAMEWORK_SERVICE_MAX_ID);
if (nbulkiov == 0 && !list_empty(&sfw_data.fw_zombie_rpcs)) {
rpc = list_entry(sfw_data.fw_zombie_rpcs.next,
}
void
-sfw_unpack_message (srpc_msg_t *msg)
+sfw_unpack_message(srpc_msg_t *msg)
{
if (msg->msg_magic == SRPC_MSG_MAGIC)
return; /* no flipping needed */
/* srpc module should guarantee I wouldn't get crap */
- LASSERT (msg->msg_magic == __swab32(SRPC_MSG_MAGIC));
+ LASSERT(msg->msg_magic == __swab32(SRPC_MSG_MAGIC));
if (msg->msg_type == SRPC_MSG_STAT_REQST) {
srpc_stat_reqst_t *req = &msg->msg_body.stat_reqst;
return;
}
- LBUG ();
+ LBUG();
return;
}
void
-sfw_abort_rpc (srpc_client_rpc_t *rpc)
+sfw_abort_rpc(srpc_client_rpc_t *rpc)
{
LASSERT(atomic_read(&rpc->crpc_refcount) > 0);
LASSERT(rpc->crpc_service <= SRPC_FRAMEWORK_SERVICE_MAX_ID);
}
void
-sfw_post_rpc (srpc_client_rpc_t *rpc)
+sfw_post_rpc(srpc_client_rpc_t *rpc)
{
spin_lock(&rpc->crpc_lock);
- LASSERT (!rpc->crpc_closed);
- LASSERT (!rpc->crpc_aborted);
- LASSERT (list_empty(&rpc->crpc_list));
- LASSERT (!sfw_data.fw_shuttingdown);
+ LASSERT(!rpc->crpc_closed);
+ LASSERT(!rpc->crpc_aborted);
+ LASSERT(list_empty(&rpc->crpc_list));
+ LASSERT(!sfw_data.fw_shuttingdown);
rpc->crpc_timeout = rpc_timeout;
srpc_post_rpc(rpc);
int
-sfw_startup (void)
+sfw_startup(void)
{
int i;
int rc;
if (session_timeout < 0) {
- CERROR ("Session timeout must be non-negative: %d\n",
+ CERROR("Session timeout must be non-negative: %d\n",
session_timeout);
return -EINVAL;
}
if (rpc_timeout < 0) {
- CERROR ("RPC timeout must be non-negative: %d\n",
+ CERROR("RPC timeout must be non-negative: %d\n",
rpc_timeout);
return -EINVAL;
}
brw_init_test_client();
brw_init_test_service();
rc = sfw_register_test(&brw_test_service, &brw_test_client);
- LASSERT (rc == 0);
+ LASSERT(rc == 0);
ping_init_test_client();
ping_init_test_service();
rc = sfw_register_test(&ping_test_service, &ping_test_client);
- LASSERT (rc == 0);
+ LASSERT(rc == 0);
error = 0;
- list_for_each_entry (tsc, &sfw_data.fw_tests, tsc_list) {
+ list_for_each_entry(tsc, &sfw_data.fw_tests, tsc_list) {
sv = tsc->tsc_srv_service;
rc = srpc_add_service(sv);
- LASSERT (rc != -EBUSY);
+ LASSERT(rc != -EBUSY);
if (rc != 0) {
- CWARN ("Failed to add %s service: %d\n",
+ CWARN("Failed to add %s service: %d\n",
sv->sv_name, rc);
error = rc;
}
sv->sv_bulk_ready = sfw_bulk_ready;
rc = srpc_add_service(sv);
- LASSERT (rc != -EBUSY);
+ LASSERT(rc != -EBUSY);
if (rc != 0) {
- CWARN ("Failed to add %s service: %d\n",
+ CWARN("Failed to add %s service: %d\n",
sv->sv_name, rc);
error = rc;
}
}
void
-sfw_shutdown (void)
+sfw_shutdown(void)
{
srpc_service_t *sv;
sfw_test_case_t *tsc;
srpc_remove_service(sv);
}
- list_for_each_entry (tsc, &sfw_data.fw_tests, tsc_list) {
+ list_for_each_entry(tsc, &sfw_data.fw_tests, tsc_list) {
sv = tsc->tsc_srv_service;
srpc_shutdown_service(sv);
srpc_remove_service(sv);
default:
LBUG();
}
- return;
}
static int
}
static void
-ping_client_fini (sfw_test_instance_t *tsi)
+ping_client_fini(sfw_test_instance_t *tsi)
{
sfw_session_t *sn = tsi->tsi_batch->bat_session;
int errors;
- LASSERT (sn != NULL);
- LASSERT (tsi->tsi_is_client);
+ LASSERT(sn != NULL);
+ LASSERT(tsi->tsi_is_client);
errors = atomic_read(&sn->sn_ping_errors);
if (errors)
- CWARN ("%d pings have failed.\n", errors);
+ CWARN("%d pings have failed.\n", errors);
else
- CDEBUG (D_NET, "Ping test finished OK.\n");
+ CDEBUG(D_NET, "Ping test finished OK.\n");
}
static int
}
static void
-ping_client_done_rpc (sfw_test_unit_t *tsu, srpc_client_rpc_t *rpc)
+ping_client_done_rpc(sfw_test_unit_t *tsu, srpc_client_rpc_t *rpc)
{
sfw_test_instance_t *tsi = tsu->tsu_instance;
sfw_session_t *sn = tsi->tsi_batch->bat_session;
srpc_ping_reply_t *reply = &rpc->crpc_replymsg.msg_body.ping_reply;
struct timeval tv;
- LASSERT (sn != NULL);
+ LASSERT(sn != NULL);
if (rpc->crpc_status != 0) {
if (!tsi->tsi_stopping) /* rpc could have been aborted */
atomic_inc(&sn->sn_ping_errors);
- CERROR ("Unable to ping %s (%d): %d\n",
+ CERROR("Unable to ping %s (%d): %d\n",
libcfs_id2str(rpc->crpc_dest),
reqst->pnr_seq, rpc->crpc_status);
return;
if (reply->pnr_magic != LST_PING_TEST_MAGIC) {
rpc->crpc_status = -EBADMSG;
atomic_inc(&sn->sn_ping_errors);
- CERROR ("Bad magic %u from %s, %u expected.\n",
+ CERROR("Bad magic %u from %s, %u expected.\n",
reply->pnr_magic, libcfs_id2str(rpc->crpc_dest),
LST_PING_TEST_MAGIC);
return;
if (reply->pnr_seq != reqst->pnr_seq) {
rpc->crpc_status = -EBADMSG;
atomic_inc(&sn->sn_ping_errors);
- CERROR ("Bad seq %u from %s, %u expected.\n",
+ CERROR("Bad seq %u from %s, %u expected.\n",
reply->pnr_seq, libcfs_id2str(rpc->crpc_dest),
reqst->pnr_seq);
return;
}
cfs_fs_timeval(&tv);
- CDEBUG (D_NET, "%d reply in %u usec\n", reply->pnr_seq,
+ CDEBUG(D_NET, "%d reply in %u usec\n", reply->pnr_seq,
(unsigned)((tv.tv_sec - (unsigned)reqst->pnr_time_sec) * 1000000
+ (tv.tv_usec - reqst->pnr_time_usec)));
return;
srpc_ping_reqst_t *req = &reqstmsg->msg_body.ping_reqst;
srpc_ping_reply_t *rep = &rpc->srpc_replymsg.msg_body.ping_reply;
- LASSERT (sv->sv_id == SRPC_SERVICE_PING);
+ LASSERT(sv->sv_id == SRPC_SERVICE_PING);
if (reqstmsg->msg_magic != SRPC_MSG_MAGIC) {
- LASSERT (reqstmsg->msg_magic == __swab32(SRPC_MSG_MAGIC));
+ LASSERT(reqstmsg->msg_magic == __swab32(SRPC_MSG_MAGIC));
__swab32s(&req->pnr_seq);
__swab32s(&req->pnr_magic);
__swab64s(&req->pnr_time_sec);
__swab64s(&req->pnr_time_usec);
}
- LASSERT (reqstmsg->msg_type == srpc_service2request(sv->sv_id));
+ LASSERT(reqstmsg->msg_type == srpc_service2request(sv->sv_id));
if (req->pnr_magic != LST_PING_TEST_MAGIC) {
- CERROR ("Unexpected magic %08x from %s\n",
+ CERROR("Unexpected magic %08x from %s\n",
req->pnr_magic, libcfs_id2str(rpc->srpc_peer));
return -EINVAL;
}
}
/* forward ref's */
-int srpc_handle_rpc (swi_workitem_t *wi);
+int srpc_handle_rpc(swi_workitem_t *wi);
-void srpc_get_counters (srpc_counters_t *cnt)
+void srpc_get_counters(srpc_counters_t *cnt)
{
spin_lock(&srpc_data.rpc_glock);
*cnt = srpc_data.rpc_counters;
spin_unlock(&srpc_data.rpc_glock);
}
-void srpc_set_counters (const srpc_counters_t *cnt)
+void srpc_set_counters(const srpc_counters_t *cnt)
{
spin_lock(&srpc_data.rpc_glock);
srpc_data.rpc_counters = *cnt;
}
void
-srpc_free_bulk (srpc_bulk_t *bk)
+srpc_free_bulk(srpc_bulk_t *bk)
{
int i;
struct page *pg;
- LASSERT (bk != NULL);
+ LASSERT(bk != NULL);
for (i = 0; i < bk->bk_niov; i++) {
pg = bk->bk_iovs[i].kiov_page;
- if (pg == NULL) break;
+ if (pg == NULL)
+ break;
__free_page(pg);
}
}
static inline __u64
-srpc_next_id (void)
+srpc_next_id(void)
{
__u64 id;
}
int
-srpc_remove_service (srpc_service_t *sv)
+srpc_remove_service(srpc_service_t *sv)
{
int id = sv->sv_id;
rc = LNetMEAttach(portal, peer, matchbits, 0, LNET_UNLINK,
local ? LNET_INS_LOCAL : LNET_INS_AFTER, &meh);
if (rc != 0) {
- CERROR ("LNetMEAttach failed: %d\n", rc);
- LASSERT (rc == -ENOMEM);
+ CERROR("LNetMEAttach failed: %d\n", rc);
+ LASSERT(rc == -ENOMEM);
return -ENOMEM;
}
rc = LNetMDAttach(meh, md, LNET_UNLINK, mdh);
if (rc != 0) {
- CERROR ("LNetMDAttach failed: %d\n", rc);
- LASSERT (rc == -ENOMEM);
+ CERROR("LNetMDAttach failed: %d\n", rc);
+ LASSERT(rc == -ENOMEM);
rc = LNetMEUnlink(meh);
- LASSERT (rc == 0);
+ LASSERT(rc == 0);
return -ENOMEM;
}
- CDEBUG (D_NET,
+ CDEBUG(D_NET,
"Posted passive RDMA: peer %s, portal %d, matchbits %#llx\n",
libcfs_id2str(peer), portal, matchbits);
return 0;
rc = LNetMDBind(md, LNET_UNLINK, mdh);
if (rc != 0) {
- CERROR ("LNetMDBind failed: %d\n", rc);
- LASSERT (rc == -ENOMEM);
+ CERROR("LNetMDBind failed: %d\n", rc);
+ LASSERT(rc == -ENOMEM);
return -ENOMEM;
}
rc = LNetPut(self, *mdh, LNET_NOACK_REQ, peer,
portal, matchbits, 0, 0);
} else {
- LASSERT ((options & LNET_MD_OP_GET) != 0);
+ LASSERT((options & LNET_MD_OP_GET) != 0);
rc = LNetGet(self, *mdh, peer, portal, matchbits, 0);
}
if (rc != 0) {
- CERROR ("LNet%s(%s, %d, %lld) failed: %d\n",
+ CERROR("LNet%s(%s, %d, %lld) failed: %d\n",
((options & LNET_MD_OP_PUT) != 0) ? "Put" : "Get",
libcfs_id2str(peer), portal, matchbits, rc);
* with failure, so fall through and return success here.
*/
rc = LNetMDUnlink(*mdh);
- LASSERT (rc == 0);
+ LASSERT(rc == 0);
} else {
- CDEBUG (D_NET,
+ CDEBUG(D_NET,
"Posted active RDMA: peer %s, portal %u, matchbits %#llx\n",
libcfs_id2str(peer), portal, matchbits);
}
}
static int
-srpc_send_request (srpc_client_rpc_t *rpc)
+srpc_send_request(srpc_client_rpc_t *rpc)
{
srpc_event_t *ev = &rpc->crpc_reqstev;
int rc;
&rpc->crpc_reqstmsg, sizeof(srpc_msg_t),
&rpc->crpc_reqstmdh, ev);
if (rc != 0) {
- LASSERT (rc == -ENOMEM);
+ LASSERT(rc == -ENOMEM);
ev->ev_fired = 1; /* no more event expected */
}
return rc;
}
static int
-srpc_prepare_reply (srpc_client_rpc_t *rpc)
+srpc_prepare_reply(srpc_client_rpc_t *rpc)
{
srpc_event_t *ev = &rpc->crpc_replyev;
__u64 *id = &rpc->crpc_reqstmsg.msg_body.reqst.rpyid;
LNET_MD_OP_PUT, rpc->crpc_dest,
&rpc->crpc_replymdh, ev);
if (rc != 0) {
- LASSERT (rc == -ENOMEM);
+ LASSERT(rc == -ENOMEM);
ev->ev_fired = 1; /* no more event expected */
}
return rc;
}
static int
-srpc_prepare_bulk (srpc_client_rpc_t *rpc)
+srpc_prepare_bulk(srpc_client_rpc_t *rpc)
{
srpc_bulk_t *bk = &rpc->crpc_bulk;
srpc_event_t *ev = &rpc->crpc_bulkev;
int rc;
int opt;
- LASSERT (bk->bk_niov <= LNET_MAX_IOV);
+ LASSERT(bk->bk_niov <= LNET_MAX_IOV);
- if (bk->bk_niov == 0) return 0; /* nothing to do */
+ if (bk->bk_niov == 0)
+ return 0; /* nothing to do */
opt = bk->bk_sink ? LNET_MD_OP_PUT : LNET_MD_OP_GET;
opt |= LNET_MD_KIOV;
&bk->bk_iovs[0], bk->bk_niov, opt,
rpc->crpc_dest, &bk->bk_mdh, ev);
if (rc != 0) {
- LASSERT (rc == -ENOMEM);
+ LASSERT(rc == -ENOMEM);
ev->ev_fired = 1; /* no more event expected */
}
return rc;
}
static int
-srpc_do_bulk (srpc_server_rpc_t *rpc)
+srpc_do_bulk(srpc_server_rpc_t *rpc)
{
srpc_event_t *ev = &rpc->srpc_ev;
srpc_bulk_t *bk = rpc->srpc_bulk;
int rc;
int opt;
- LASSERT (bk != NULL);
+ LASSERT(bk != NULL);
opt = bk->bk_sink ? LNET_MD_OP_GET : LNET_MD_OP_PUT;
opt |= LNET_MD_KIOV;
struct srpc_service *sv = scd->scd_svc;
srpc_buffer_t *buffer;
- LASSERT (status != 0 || rpc->srpc_wi.swi_state == SWI_STATE_DONE);
+ LASSERT(status != 0 || rpc->srpc_wi.swi_state == SWI_STATE_DONE);
rpc->srpc_status = status;
- CDEBUG_LIMIT (status == 0 ? D_NET : D_NETERROR,
+ CDEBUG_LIMIT(status == 0 ? D_NET : D_NETERROR,
"Server RPC %p done: service %s, peer %s, status %s:%d\n",
rpc, sv->sv_name, libcfs_id2str(rpc->srpc_peer),
swi_state2str(rpc->srpc_wi.swi_state), status);
switch (wi->swi_state) {
default:
- LBUG ();
+ LBUG();
case SWI_STATE_NEWBORN: {
srpc_msg_t *msg;
srpc_generic_reply_t *reply;
if (rc == 0)
return 0; /* wait for bulk */
- LASSERT (ev->ev_fired);
+ LASSERT(ev->ev_fired);
ev->ev_status = rc;
}
}
case SWI_STATE_BULK_STARTED:
- LASSERT (rpc->srpc_bulk == NULL || ev->ev_fired);
+ LASSERT(rpc->srpc_bulk == NULL || ev->ev_fired);
if (rpc->srpc_bulk != NULL) {
rc = ev->ev_status;
rpc, rpc->srpc_bulk, sv->sv_id);
CERROR("Event: status %d, type %d, lnet %d\n",
ev->ev_status, ev->ev_type, ev->ev_lnet);
- LASSERT (ev->ev_fired);
+ LASSERT(ev->ev_fired);
}
wi->swi_state = SWI_STATE_DONE;
}
static void
-srpc_client_rpc_expired (void *data)
+srpc_client_rpc_expired(void *data)
{
srpc_client_rpc_t *rpc = data;
- CWARN ("Client RPC expired: service %d, peer %s, timeout %d.\n",
+ CWARN("Client RPC expired: service %d, peer %s, timeout %d.\n",
rpc->crpc_service, libcfs_id2str(rpc->crpc_dest),
rpc->crpc_timeout);
}
inline void
-srpc_add_client_rpc_timer (srpc_client_rpc_t *rpc)
+srpc_add_client_rpc_timer(srpc_client_rpc_t *rpc)
{
stt_timer_t *timer = &rpc->crpc_timer;
- if (rpc->crpc_timeout == 0) return;
+ if (rpc->crpc_timeout == 0)
+ return;
INIT_LIST_HEAD(&timer->stt_list);
timer->stt_data = rpc;
* Upon exit the RPC expiry timer is not queued and the handler is not
* running on any CPU. */
static void
-srpc_del_client_rpc_timer (srpc_client_rpc_t *rpc)
+srpc_del_client_rpc_timer(srpc_client_rpc_t *rpc)
{
/* timer not planted or already exploded */
if (rpc->crpc_timeout == 0)
}
static void
-srpc_client_rpc_done (srpc_client_rpc_t *rpc, int status)
+srpc_client_rpc_done(srpc_client_rpc_t *rpc, int status)
{
swi_workitem_t *wi = &rpc->crpc_wi;
srpc_del_client_rpc_timer(rpc);
- CDEBUG_LIMIT ((status == 0) ? D_NET : D_NETERROR,
+ CDEBUG_LIMIT((status == 0) ? D_NET : D_NETERROR,
"Client RPC done: service %d, peer %s, status %s:%d:%d\n",
rpc->crpc_service, libcfs_id2str(rpc->crpc_dest),
swi_state2str(wi->swi_state), rpc->crpc_aborted, status);
* scheduling me.
* Cancel pending schedules and prevent future schedule attempts:
*/
- LASSERT (!srpc_event_pending(rpc));
+ LASSERT(!srpc_event_pending(rpc));
swi_exit_workitem(wi);
spin_unlock(&rpc->crpc_lock);
/* sends an outgoing RPC */
int
-srpc_send_rpc (swi_workitem_t *wi)
+srpc_send_rpc(swi_workitem_t *wi)
{
int rc = 0;
srpc_client_rpc_t *rpc;
rpc = wi->swi_workitem.wi_data;
- LASSERT (rpc != NULL);
- LASSERT (wi == &rpc->crpc_wi);
+ LASSERT(rpc != NULL);
+ LASSERT(wi == &rpc->crpc_wi);
reply = &rpc->crpc_replymsg;
do_bulk = rpc->crpc_bulk.bk_niov > 0;
switch (wi->swi_state) {
default:
- LBUG ();
+ LBUG();
case SWI_STATE_NEWBORN:
- LASSERT (!srpc_event_pending(rpc));
+ LASSERT(!srpc_event_pending(rpc));
rc = srpc_prepare_reply(rpc);
if (rc != 0) {
}
rc = srpc_prepare_bulk(rpc);
- if (rc != 0) break;
+ if (rc != 0)
+ break;
wi->swi_state = SWI_STATE_REQUEST_SUBMITTED;
rc = srpc_send_request(rpc);
/* CAVEAT EMPTOR: rqtev, rpyev, and bulkev may come in any
* order; however, they're processed in a strict order:
* rqt, rpy, and bulk. */
- if (!rpc->crpc_reqstev.ev_fired) break;
+ if (!rpc->crpc_reqstev.ev_fired)
+ break;
rc = rpc->crpc_reqstev.ev_status;
- if (rc != 0) break;
+ if (rc != 0)
+ break;
wi->swi_state = SWI_STATE_REQUEST_SENT;
/* perhaps more events, fall thru */
case SWI_STATE_REQUEST_SENT: {
srpc_msg_type_t type = srpc_service2reply(rpc->crpc_service);
- if (!rpc->crpc_replyev.ev_fired) break;
+ if (!rpc->crpc_replyev.ev_fired)
+ break;
rc = rpc->crpc_replyev.ev_status;
- if (rc != 0) break;
+ if (rc != 0)
+ break;
srpc_unpack_msg_hdr(reply);
if (reply->msg_type != type ||
wi->swi_state = SWI_STATE_REPLY_RECEIVED;
}
case SWI_STATE_REPLY_RECEIVED:
- if (do_bulk && !rpc->crpc_bulkev.ev_fired) break;
+ if (do_bulk && !rpc->crpc_bulkev.ev_fired)
+ break;
rc = do_bulk ? rpc->crpc_bulkev.ev_status : 0;
}
srpc_client_rpc_t *
-srpc_create_client_rpc (lnet_process_id_t peer, int service,
+srpc_create_client_rpc(lnet_process_id_t peer, int service,
int nbulkiov, int bulklen,
void (*rpc_done)(srpc_client_rpc_t *),
void (*rpc_fini)(srpc_client_rpc_t *), void *priv)
/* called with rpc->crpc_lock held */
void
-srpc_abort_rpc (srpc_client_rpc_t *rpc, int why)
+srpc_abort_rpc(srpc_client_rpc_t *rpc, int why)
{
- LASSERT (why != 0);
+ LASSERT(why != 0);
if (rpc->crpc_aborted || /* already aborted */
rpc->crpc_closed) /* callback imminent */
return;
- CDEBUG (D_NET,
+ CDEBUG(D_NET,
"Aborting RPC: service %d, peer %s, state %s, why %d\n",
rpc->crpc_service, libcfs_id2str(rpc->crpc_dest),
swi_state2str(rpc->crpc_wi.swi_state), why);
/* called with rpc->crpc_lock held */
void
-srpc_post_rpc (srpc_client_rpc_t *rpc)
+srpc_post_rpc(srpc_client_rpc_t *rpc)
{
- LASSERT (!rpc->crpc_aborted);
- LASSERT (srpc_data.rpc_state == SRPC_STATE_RUNNING);
+ LASSERT(!rpc->crpc_aborted);
+ LASSERT(srpc_data.rpc_state == SRPC_STATE_RUNNING);
- CDEBUG (D_NET, "Posting RPC: peer %s, service %d, timeout %d\n",
+ CDEBUG(D_NET, "Posting RPC: peer %s, service %d, timeout %d\n",
libcfs_id2str(rpc->crpc_dest), rpc->crpc_service,
rpc->crpc_timeout);
srpc_msg_t *msg;
srpc_msg_type_t type;
- LASSERT (!in_interrupt());
+ LASSERT(!in_interrupt());
if (ev->status != 0) {
spin_lock(&srpc_data.rpc_glock);
default:
CERROR("Unknown event: status %d, type %d, lnet %d\n",
rpcev->ev_status, rpcev->ev_type, rpcev->ev_lnet);
- LBUG ();
+ LBUG();
case SRPC_REQUEST_SENT:
if (ev->status == 0 && ev->type != LNET_EVENT_UNLINK) {
spin_lock(&srpc_data.rpc_glock);
&crpc->crpc_replyev, &crpc->crpc_bulkev);
CERROR("Bad event: status %d, type %d, lnet %d\n",
rpcev->ev_status, rpcev->ev_type, rpcev->ev_lnet);
- LBUG ();
+ LBUG();
}
spin_lock(&crpc->crpc_lock);
spin_lock(&scd->scd_lock);
- LASSERT (ev->unlinked);
- LASSERT (ev->type == LNET_EVENT_PUT ||
+ LASSERT(ev->unlinked);
+ LASSERT(ev->type == LNET_EVENT_PUT ||
ev->type == LNET_EVENT_UNLINK);
- LASSERT (ev->type != LNET_EVENT_UNLINK ||
+ LASSERT(ev->type != LNET_EVENT_UNLINK ||
sv->sv_shuttingdown);
buffer = container_of(ev->md.start, srpc_buffer_t, buf_msg);
break;
case SRPC_BULK_GET_RPLD:
- LASSERT (ev->type == LNET_EVENT_SEND ||
+ LASSERT(ev->type == LNET_EVENT_SEND ||
ev->type == LNET_EVENT_REPLY ||
ev->type == LNET_EVENT_UNLINK);
int
-srpc_startup (void)
+srpc_startup(void)
{
int rc;
rc = LNetNIInit(LUSTRE_SRV_LNET_PID);
if (rc < 0) {
- CERROR ("LNetNIInit() has failed: %d\n", rc);
+ CERROR("LNetNIInit() has failed: %d\n", rc);
return rc;
}
}
void
-srpc_shutdown (void)
+srpc_shutdown(void)
{
int i;
int rc;
switch (state) {
default:
- LBUG ();
+ LBUG();
case SRPC_STATE_RUNNING:
spin_lock(&srpc_data.rpc_glock);
for (i = 0; i <= SRPC_SERVICE_MAX_ID; i++) {
srpc_service_t *sv = srpc_data.rpc_services[i];
- LASSERTF (sv == NULL,
+ LASSERTF(sv == NULL,
"service not empty: id %d, name %s\n",
i, sv->sv_name);
}
case SRPC_STATE_EQ_INIT:
rc = LNetClearLazyPortal(SRPC_FRAMEWORK_REQUEST_PORTAL);
rc = LNetClearLazyPortal(SRPC_REQUEST_PORTAL);
- LASSERT (rc == 0);
+ LASSERT(rc == 0);
rc = LNetEQFree(srpc_data.rpc_lnet_eq);
- LASSERT (rc == 0); /* the EQ should have no user by now */
+ LASSERT(rc == 0); /* the EQ should have no user by now */
case SRPC_STATE_NI_INIT:
LNetNIFini();
lprocfs_fid_space_seq_show(struct seq_file *m, void *unused)
{
struct lu_client_seq *seq = (struct lu_client_seq *)m->private;
- int rc;
LASSERT(seq != NULL);
mutex_lock(&seq->lcs_mutex);
- rc = seq_printf(m, "[%#llx - %#llx]:%x:%s\n", PRANGE(&seq->lcs_space));
+ seq_printf(m, "[%#llx - %#llx]:%x:%s\n", PRANGE(&seq->lcs_space));
mutex_unlock(&seq->lcs_mutex);
- return rc;
+ return 0;
}
static ssize_t lprocfs_fid_width_seq_write(struct file *file,
lprocfs_fid_width_seq_show(struct seq_file *m, void *unused)
{
struct lu_client_seq *seq = (struct lu_client_seq *)m->private;
- int rc;
LASSERT(seq != NULL);
mutex_lock(&seq->lcs_mutex);
- rc = seq_printf(m, "%llu\n", seq->lcs_width);
+ seq_printf(m, "%llu\n", seq->lcs_width);
mutex_unlock(&seq->lcs_mutex);
- return rc;
+ return 0;
}
static int
lprocfs_fid_fid_seq_show(struct seq_file *m, void *unused)
{
struct lu_client_seq *seq = (struct lu_client_seq *)m->private;
- int rc;
LASSERT(seq != NULL);
mutex_lock(&seq->lcs_mutex);
- rc = seq_printf(m, DFID"\n", PFID(&seq->lcs_fid));
+ seq_printf(m, DFID "\n", PFID(&seq->lcs_fid));
mutex_unlock(&seq->lcs_mutex);
- return rc;
+ return 0;
}
static int
{
struct lu_client_seq *seq = (struct lu_client_seq *)m->private;
struct client_obd *cli;
- int rc;
LASSERT(seq != NULL);
if (seq->lcs_exp != NULL) {
cli = &seq->lcs_exp->exp_obd->u.cli;
- rc = seq_printf(m, "%s\n", cli->cl_target_uuid.uuid);
+ seq_printf(m, "%s\n", cli->cl_target_uuid.uuid);
} else {
- rc = seq_printf(m, "%s\n", seq->lcs_srv->lss_name);
+ seq_printf(m, "%s\n", seq->lcs_srv->lss_name);
}
- return rc;
+
+ return 0;
}
LPROC_SEQ_FOPS(lprocfs_fid_space);
int fld_client_rpc(struct obd_export *exp,
struct lu_seq_range *range, __u32 fld_op);
-#if defined (CONFIG_PROC_FS)
+#if defined(CONFIG_PROC_FS)
extern struct lprocfs_vars fld_client_proc_list[];
#endif
CERROR("%s: Attempt to add target %s (idx %llu) on fly - skip it\n",
fld->lcf_name, name, tar->ft_idx);
return 0;
- } else {
- CDEBUG(D_INFO, "%s: Adding target %s (idx %llu)\n",
- fld->lcf_name, name, tar->ft_idx);
}
+ CDEBUG(D_INFO, "%s: Adding target %s (idx %llu)\n",
+ fld->lcf_name, name, tar->ft_idx);
OBD_ALLOC_PTR(target);
if (target == NULL)
static struct proc_dir_entry *fld_type_proc_dir;
-#if defined (CONFIG_PROC_FS)
+#if defined(CONFIG_PROC_FS)
static int fld_client_proc_init(struct lu_client_fld *fld)
{
int rc;
void fld_client_proc_fini(struct lu_client_fld *fld)
{
- return;
}
#endif
EXPORT_SYMBOL(fld_client_proc_fini);
{ "targets", &fld_proc_targets_fops },
{ "hash", &fld_proc_hash_fops },
{ "cache_flush", &fld_proc_cache_flush_fops },
- { NULL }};
+ { NULL }
+};
if (PagePrivate(page))
page->mapping->a_ops->invalidatepage(page, 0, PAGE_CACHE_SIZE);
- cancel_dirty_page(page, PAGE_SIZE);
+ if (TestClearPageDirty(page))
+ account_page_cleaned(page, mapping);
+
ClearPageMappedToDisk(page);
ll_delete_from_page_cache(page);
}
} \
} while (0)
#define LPROCFS_CLIMP_EXIT(obd) \
- up_read(&(obd)->u.cli.cl_sem);
+ up_read(&(obd)->u.cli.cl_sem)
/* write the name##_seq_show function, call LPROC_SEQ_FOPS_RO for read-only
return lprocfs_wr_##type(file, buffer, \
count, seq->private); \
} \
- LPROC_SEQ_FOPS(name##_##type);
+ LPROC_SEQ_FOPS(name##_##type)
#define LPROC_SEQ_FOPS_WR_ONLY(name, type) \
static ssize_t name##_##type##_write(struct file *file, \
.open = name##_##type##_open, \
.write = name##_##type##_write, \
.release = lprocfs_single_release, \
- };
+ }
/* lproc_ptlrpc.c */
struct ptlrpc_request;
*/
typedef int (*lu_printer_t)(const struct lu_env *env,
void *cookie, const char *format, ...)
- __attribute__ ((format (printf, 3, 4)));
+ __printf(3, 4);
/**
* Operations specific for particular lu_object.
void _ldlm_lock_debug(struct ldlm_lock *lock,
struct libcfs_debug_msg_data *data,
const char *fmt, ...)
- __attribute__ ((format (printf, 3, 4)));
+ __printf(3, 4);
/**
* Rate-limited version of lock printing function.
atomic_t imp_timeouts;
/** Current import state */
enum lustre_imp_state imp_state;
+ /** Last replay state */
+ enum lustre_imp_state imp_replay_state;
/** History of import states */
struct import_state_hist imp_state_hist[IMP_STATE_HIST_LEN];
int imp_state_hist_idx;
void _debug_req(struct ptlrpc_request *req,
struct libcfs_debug_msg_data *data, const char *fmt, ...)
- __attribute__ ((format (printf, 3, 4)));
+ __printf(3, 4);
/**
* Helper that decides if we need to print request according to current debug
struct lu_device_type;
/* genops.c */
+extern struct list_head obd_types;
struct obd_export *class_conn2export(struct lustre_handle *);
int class_register_type(struct obd_ops *, struct md_ops *,
struct lprocfs_vars *, const char *nm,
#endif
-#define class_export_rpc_inc(exp) \
-({ \
- atomic_inc(&(exp)->exp_rpc_count); \
- CDEBUG(D_INFO, "RPC GETting export %p : new rpc_count %d\n", \
- (exp), atomic_read(&(exp)->exp_rpc_count)); \
-})
+static inline void class_export_rpc_inc(struct obd_export *exp)
+{
+ atomic_inc(&(exp)->exp_rpc_count);
+ CDEBUG(D_INFO, "RPC GETting export %p : new rpc_count %d\n",
+ (exp), atomic_read(&(exp)->exp_rpc_count));
+}
-#define class_export_rpc_dec(exp) \
-({ \
- LASSERT_ATOMIC_POS(&exp->exp_rpc_count); \
- atomic_dec(&(exp)->exp_rpc_count); \
- CDEBUG(D_INFO, "RPC PUTting export %p : new rpc_count %d\n", \
- (exp), atomic_read(&(exp)->exp_rpc_count)); \
-})
+static inline void class_export_rpc_dec(struct obd_export *exp)
+{
+ LASSERT_ATOMIC_POS(&exp->exp_rpc_count);
+ atomic_dec(&(exp)->exp_rpc_count);
+ CDEBUG(D_INFO, "RPC PUTting export %p : new rpc_count %d\n",
+ (exp), atomic_read(&(exp)->exp_rpc_count));
+}
#define class_export_lock_get(exp, lock) \
({ \
/* Ensure obd_setup: used for cleanup which must be called
while obd is stopping */
-#define OBD_CHECK_DEV(obd) \
-do { \
- if (!(obd)) { \
- CERROR("NULL device\n"); \
- return -ENODEV; \
- } \
-} while (0)
+static inline int obd_check_dev(struct obd_device *obd)
+{
+ if (!obd) {
+ CERROR("NULL device\n");
+ return -ENODEV;
+ }
+ return 0;
+}
/* ensure obd_setup and !obd_stopping */
-#define OBD_CHECK_DEV_ACTIVE(obd) \
-do { \
- OBD_CHECK_DEV(obd); \
- if (!(obd)->obd_set_up || (obd)->obd_stopping) { \
- CERROR("Device %d not setup\n", \
- (obd)->obd_minor); \
- return -ENODEV; \
- } \
-} while (0)
+static inline int obd_check_dev_active(struct obd_device *obd)
+{
+ int rc;
+ rc = obd_check_dev(obd);
+ if (rc)
+ return rc;
+ if (!obd->obd_set_up || obd->obd_stopping) {
+ CERROR("Device %d not setup\n", obd->obd_minor);
+ return -ENODEV;
+ }
+ return rc;
+}
#if defined (CONFIG_PROC_FS)
#define OBD_COUNTER_OFFSET(op) \
int rc;
DECLARE_LU_VARS(ldt, d);
- OBD_CHECK_DEV(obd);
+ rc = obd_check_dev(obd);
+ if (rc)
+ return rc;
ldt = obd->obd_type->typ_lu;
d = obd->obd_lu_dev;
if (ldt != NULL && d != NULL) {
int rc;
DECLARE_LU_VARS(ldt, d);
- OBD_CHECK_DEV(obd);
+ rc = obd_check_dev(obd);
+ if (rc)
+ return rc;
ldt = obd->obd_type->typ_lu;
d = obd->obd_lu_dev;
int rc;
DECLARE_LU_VARS(ldt, d);
- OBD_CHECK_DEV(obd);
+ rc = obd_check_dev(obd);
+ if (rc)
+ return rc;
obd->obd_process_conf = 1;
ldt = obd->obd_type->typ_lu;
struct obd_device *obd = imp->imp_obd;
int rc;
- OBD_CHECK_DEV_ACTIVE(obd);
+ rc = obd_check_dev_active(obd);
+ if (rc)
+ return rc;
OBD_CHECK_DT_OP(obd, add_conn, -EOPNOTSUPP);
OBD_COUNTER_INCREMENT(obd, add_conn);
struct obd_device *obd = imp->imp_obd;
int rc;
- OBD_CHECK_DEV_ACTIVE(obd);
+ rc = obd_check_dev_active(obd);
+ if (rc)
+ return rc;
OBD_CHECK_DT_OP(obd, del_conn, -EOPNOTSUPP);
OBD_COUNTER_INCREMENT(obd, del_conn);
__u64 ocf = data ? data->ocd_connect_flags : 0; /* for post-condition
* check */
- OBD_CHECK_DEV_ACTIVE(obd);
+ rc = obd_check_dev_active(obd);
+ if (rc)
+ return rc;
OBD_CHECK_DT_OP(obd, connect, -EOPNOTSUPP);
OBD_COUNTER_INCREMENT(obd, connect);
__u64 ocf = d ? d->ocd_connect_flags : 0; /* for post-condition
* check */
- OBD_CHECK_DEV_ACTIVE(obd);
+ rc = obd_check_dev_active(obd);
+ if (rc)
+ return rc;
OBD_CHECK_DT_OP(obd, reconnect, 0);
OBD_COUNTER_INCREMENT(obd, reconnect);
{
int rc;
- OBD_CHECK_DEV(obd);
+ rc = obd_check_dev(obd);
+ if (rc)
+ return rc;
/* the check for async_recov is a complete hack - I'm hereby
overloading the meaning to also mean "this was called from
static inline int obd_register_observer(struct obd_device *obd,
struct obd_device *observer)
{
- OBD_CHECK_DEV(obd);
+ int rc;
+
+ rc = obd_check_dev(obd);
+ if (rc)
+ return rc;
down_write(&obd->obd_observer_link_sem);
if (obd->obd_observer && observer) {
up_write(&obd->obd_observer_link_sem);
/* class_obd.c */
extern char obd_jobid_node[];
+extern struct miscdevice obd_psdev;
+extern spinlock_t obd_types_lock;
/* prng.c */
#define ll_generate_random_uuid(uuid_out) cfs_get_random_bytes(uuid_out, sizeof(class_uuid_t))
* --bug 17336 */
loff_t size = cl_isize_read(inode);
loff_t cur_index = start >> PAGE_CACHE_SHIFT;
- loff_t size_index = ((size - 1) >> PAGE_CACHE_SHIFT);
+ loff_t size_index = (size - 1) >>
+ PAGE_CACHE_SHIFT;
if ((size == 0 && cur_index != 0) ||
size_index < cur_index)
return gen;
}
- gen = (fid_flatten(fid) >> 32);
+ gen = fid_flatten(fid) >> 32;
return gen;
}
LASSERT(mode != 0);
LASSERT(IS_PO2(mode));
- for (index = -1; mode; index++, mode >>= 1) ;
+ for (index = -1; mode; index++)
+ mode >>= 1;
LASSERT(index < LCK_MODE_NUM);
return index;
}
union ldlm_gl_desc *gl_desc; /* glimpse AST descriptor */
};
-typedef enum {
+enum ldlm_desc_ast_t {
LDLM_WORK_BL_AST,
LDLM_WORK_CP_AST,
LDLM_WORK_REVOKE_AST,
LDLM_WORK_GL_AST
-} ldlm_desc_ast_t;
+};
void ldlm_grant_lock(struct ldlm_lock *lock, struct list_head *work_list);
int ldlm_fill_lvb(struct ldlm_lock *lock, struct req_capsule *pill,
void ldlm_add_ast_work_item(struct ldlm_lock *lock, struct ldlm_lock *new,
struct list_head *work_list);
int ldlm_run_ast_work(struct ldlm_namespace *ns, struct list_head *rpc_list,
- ldlm_desc_ast_t ast_type);
+ enum ldlm_desc_ast_t ast_type);
int ldlm_work_gl_ast_lock(struct ptlrpc_request_set *rqset, void *opaq);
int ldlm_lock_remove_from_lru(struct ldlm_lock *lock);
int ldlm_lock_remove_from_lru_nolock(struct ldlm_lock *lock);
void ldlm_handle_bl_callback(struct ldlm_namespace *ns,
struct ldlm_lock_desc *ld, struct ldlm_lock *lock);
+extern struct kmem_cache *ldlm_resource_slab;
+
+/* ldlm_lockd.c & ldlm_lock.c */
+extern struct kmem_cache *ldlm_lock_slab;
/* ldlm_extent.c */
void ldlm_extent_add_lock(struct ldlm_resource *res, struct ldlm_lock *lock);
/* interval tree, for LDLM_EXTENT. */
extern struct kmem_cache *ldlm_interval_slab; /* slab cache for ldlm_interval */
extern void ldlm_interval_attach(struct ldlm_interval *n, struct ldlm_lock *l);
-extern struct ldlm_interval *ldlm_interval_detach(struct ldlm_lock *l);
-extern struct ldlm_interval *ldlm_interval_alloc(struct ldlm_lock *lock);
-extern void ldlm_interval_free(struct ldlm_interval *node);
+struct ldlm_interval *ldlm_interval_detach(struct ldlm_lock *l);
+struct ldlm_interval *ldlm_interval_alloc(struct ldlm_lock *lock);
+void ldlm_interval_free(struct ldlm_interval *node);
/* this function must be called with res lock held */
static inline struct ldlm_extent *
ldlm_interval_extent(struct ldlm_interval *node)
}
EXPORT_SYMBOL(ldlm_it2str);
-extern struct kmem_cache *ldlm_lock_slab;
-
void ldlm_register_intent(struct ldlm_namespace *ns, ldlm_res_policy arg)
{
* one.
*/
int ldlm_run_ast_work(struct ldlm_namespace *ns, struct list_head *rpc_list,
- ldlm_desc_ast_t ast_type)
+ enum ldlm_desc_ast_t ast_type)
{
struct ldlm_cb_set_arg *arg;
set_producer_func work_ast_lock;
module_param(ldlm_cpts, charp, 0444);
MODULE_PARM_DESC(ldlm_cpts, "CPU partitions ldlm threads should run on");
-extern struct kmem_cache *ldlm_resource_slab;
-extern struct kmem_cache *ldlm_lock_slab;
static struct mutex ldlm_ref_mutex;
static int ldlm_refcount;
if (lock->l_flags & LDLM_FL_CANCEL_ON_BLOCK)
lock->l_flags |= LDLM_FL_CANCEL;
- do_ast = (!lock->l_readers && !lock->l_writers);
+ do_ast = !lock->l_readers && !lock->l_writers;
unlock_res_and_lock(lock);
if (do_ast) {
*/
#define LDLM_POOL_SLV_SHIFT (10)
-extern struct proc_dir_entry *ldlm_ns_proc_dir;
-
static inline __u64 dru(__u64 val, __u32 shift, int round_up)
{
return (val + (round_up ? (1 << shift) - 1 : 0)) >> shift;
" GP: %d\n",
grant_step, grant_plan);
}
- seq_printf(m, " GR: %d\n" " CR: %d\n" " GS: %d\n"
- " G: %d\n" " L: %d\n",
+ seq_printf(m, " GR: %d\n CR: %d\n GS: %d\n"
+ " G: %d\n L: %d\n",
grant_rate, cancel_rate, grant_speed,
granted, limit);
int do_ast;
lock->l_flags |= LDLM_FL_CBPENDING;
- do_ast = (!lock->l_readers && !lock->l_writers);
+ do_ast = !lock->l_readers && !lock->l_writers;
unlock_res_and_lock(lock);
if (do_ast) {
if (opaque != NULL && lock->l_ast_data != opaque) {
LDLM_ERROR(lock, "data %p doesn't match opaque %p",
lock->l_ast_data, opaque);
- //LBUG();
continue;
}
LIST_HEAD(ldlm_cli_inactive_namespace_list);
struct proc_dir_entry *ldlm_type_proc_dir = NULL;
-struct proc_dir_entry *ldlm_ns_proc_dir = NULL;
+static struct proc_dir_entry *ldlm_ns_proc_dir = NULL;
struct proc_dir_entry *ldlm_svc_proc_dir = NULL;
extern unsigned int ldlm_cancel_unused_locks_before_replay;
libcfs-linux-objs := linux-tracefile.o linux-debug.o
libcfs-linux-objs += linux-prim.o linux-cpu.o
libcfs-linux-objs += linux-tcpip.o
-libcfs-linux-objs += linux-proc.o linux-curproc.o
+libcfs-linux-objs += linux-curproc.o
libcfs-linux-objs += linux-module.o
libcfs-linux-objs += linux-crypto.o
libcfs-linux-objs += linux-crypto-adler.o
if (max > cfs_trace_max_debug_mb() || max < num_possible_cpus()) {
max = TCD_MAX_PAGES;
} else {
- max = (max / num_possible_cpus());
- max = max << (20 - PAGE_CACHE_SHIFT);
+ max = max / num_possible_cpus();
+ max <<= (20 - PAGE_CACHE_SHIFT);
}
rc = cfs_tracefile_init(max);
}
EXPORT_SYMBOL(cfs_hash_rehash_key);
-int cfs_hash_debug_header(struct seq_file *m)
+void cfs_hash_debug_header(struct seq_file *m)
{
- return seq_printf(m, "%-*s%6s%6s%6s%6s%6s%6s%6s%7s%8s%8s%8s%s\n",
- CFS_HASH_BIGNAME_LEN,
- "name", "cur", "min", "max", "theta", "t-min", "t-max",
- "flags", "rehash", "count", "maxdep", "maxdepb",
- " distribution");
+ seq_printf(m, "%-*s cur min max theta t-min t-max flags rehash count maxdep maxdepb distribution\n",
+ CFS_HASH_BIGNAME_LEN, "name");
}
EXPORT_SYMBOL(cfs_hash_debug_header);
CFS_HASH_RH_NBKT(hs) : CFS_HASH_NBKT(hs);
}
-int cfs_hash_debug_str(struct cfs_hash *hs, struct seq_file *m)
+void cfs_hash_debug_str(struct cfs_hash *hs, struct seq_file *m)
{
int dist[8] = { 0, };
int maxdep = -1;
seq_printf(m, "%d%c", dist[i], (i == 7) ? '\n' : '/');
cfs_hash_unlock(hs, 0);
-
- return 0;
}
EXPORT_SYMBOL(cfs_hash_debug_str);
}
tmp += rc;
- for_each_cpu_mask(j, *cptab->ctb_parts[i].cpt_cpumask) {
+ for_each_cpu(j, cptab->ctb_parts[i].cpt_cpumask) {
rc = snprintf(tmp, len, "%d ", j);
len -= rc;
if (len <= 0) {
LASSERT(cpt == CFS_CPT_ANY || (cpt >= 0 && cpt < cptab->ctb_nparts));
return cpt == CFS_CPT_ANY ?
- cpus_weight(*cptab->ctb_cpumask) :
- cpus_weight(*cptab->ctb_parts[cpt].cpt_cpumask);
+ cpumask_weight(cptab->ctb_cpumask) :
+ cpumask_weight(cptab->ctb_parts[cpt].cpt_cpumask);
}
EXPORT_SYMBOL(cfs_cpt_weight);
LASSERT(cpt == CFS_CPT_ANY || (cpt >= 0 && cpt < cptab->ctb_nparts));
return cpt == CFS_CPT_ANY ?
- any_online_cpu(*cptab->ctb_cpumask) != NR_CPUS :
- any_online_cpu(*cptab->ctb_parts[cpt].cpt_cpumask) != NR_CPUS;
+ cpumask_any_and(cptab->ctb_cpumask,
+ cpu_online_mask) < nr_cpu_ids :
+ cpumask_any_and(cptab->ctb_parts[cpt].cpt_cpumask,
+ cpu_online_mask) < nr_cpu_ids;
}
EXPORT_SYMBOL(cfs_cpt_online);
LASSERT(cpt >= 0 && cpt < cptab->ctb_nparts);
- if (cpu < 0 || cpu >= NR_CPUS || !cpu_online(cpu)) {
+ if (cpu < 0 || cpu >= nr_cpu_ids || !cpu_online(cpu)) {
CDEBUG(D_INFO, "CPU %d is invalid or it's offline\n", cpu);
return 0;
}
cptab->ctb_cpu2cpt[cpu] = cpt;
- LASSERT(!cpu_isset(cpu, *cptab->ctb_cpumask));
- LASSERT(!cpu_isset(cpu, *cptab->ctb_parts[cpt].cpt_cpumask));
+ LASSERT(!cpumask_test_cpu(cpu, cptab->ctb_cpumask));
+ LASSERT(!cpumask_test_cpu(cpu, cptab->ctb_parts[cpt].cpt_cpumask));
- cpu_set(cpu, *cptab->ctb_cpumask);
- cpu_set(cpu, *cptab->ctb_parts[cpt].cpt_cpumask);
+ cpumask_set_cpu(cpu, cptab->ctb_cpumask);
+ cpumask_set_cpu(cpu, cptab->ctb_parts[cpt].cpt_cpumask);
node = cpu_to_node(cpu);
LASSERT(cpt == CFS_CPT_ANY || (cpt >= 0 && cpt < cptab->ctb_nparts));
- if (cpu < 0 || cpu >= NR_CPUS) {
+ if (cpu < 0 || cpu >= nr_cpu_ids) {
CDEBUG(D_INFO, "Invalid CPU id %d\n", cpu);
return;
}
return;
}
- LASSERT(cpu_isset(cpu, *cptab->ctb_parts[cpt].cpt_cpumask));
- LASSERT(cpu_isset(cpu, *cptab->ctb_cpumask));
+ LASSERT(cpumask_test_cpu(cpu, cptab->ctb_parts[cpt].cpt_cpumask));
+ LASSERT(cpumask_test_cpu(cpu, cptab->ctb_cpumask));
- cpu_clear(cpu, *cptab->ctb_parts[cpt].cpt_cpumask);
- cpu_clear(cpu, *cptab->ctb_cpumask);
+ cpumask_clear_cpu(cpu, cptab->ctb_parts[cpt].cpt_cpumask);
+ cpumask_clear_cpu(cpu, cptab->ctb_cpumask);
cptab->ctb_cpu2cpt[cpu] = -1;
node = cpu_to_node(cpu);
LASSERT(node_isset(node, *cptab->ctb_parts[cpt].cpt_nodemask));
LASSERT(node_isset(node, *cptab->ctb_nodemask));
- for_each_cpu_mask(i, *cptab->ctb_parts[cpt].cpt_cpumask) {
+ for_each_cpu(i, cptab->ctb_parts[cpt].cpt_cpumask) {
/* this CPT has other CPU belonging to this node? */
if (cpu_to_node(i) == node)
break;
}
- if (i == NR_CPUS)
+ if (i >= nr_cpu_ids)
node_clear(node, *cptab->ctb_parts[cpt].cpt_nodemask);
- for_each_cpu_mask(i, *cptab->ctb_cpumask) {
+ for_each_cpu(i, cptab->ctb_cpumask) {
/* this CPT-table has other CPU belonging to this node? */
if (cpu_to_node(i) == node)
break;
}
- if (i == NR_CPUS)
+ if (i >= nr_cpu_ids)
node_clear(node, *cptab->ctb_nodemask);
return;
{
int i;
- if (cpus_weight(*mask) == 0 || any_online_cpu(*mask) == NR_CPUS) {
+ if (cpumask_weight(mask) == 0 ||
+ cpumask_any_and(mask, cpu_online_mask) >= nr_cpu_ids) {
CDEBUG(D_INFO, "No online CPU is found in the CPU mask for CPU partition %d\n",
cpt);
return 0;
}
- for_each_cpu_mask(i, *mask) {
+ for_each_cpu(i, mask) {
if (!cfs_cpt_set_cpu(cptab, cpt, i))
return 0;
}
{
int i;
- for_each_cpu_mask(i, *mask)
+ for_each_cpu(i, mask)
cfs_cpt_unset_cpu(cptab, cpt, i);
}
EXPORT_SYMBOL(cfs_cpt_unset_cpumask);
}
for (; cpt <= last; cpt++) {
- for_each_cpu_mask(i, *cptab->ctb_parts[cpt].cpt_cpumask)
+ for_each_cpu(i, cptab->ctb_parts[cpt].cpt_cpumask)
cfs_cpt_unset_cpu(cptab, cpt, i);
}
}
int
cfs_cpt_of_cpu(struct cfs_cpt_table *cptab, int cpu)
{
- LASSERT(cpu >= 0 && cpu < NR_CPUS);
+ LASSERT(cpu >= 0 && cpu < nr_cpu_ids);
return cptab->ctb_cpu2cpt[cpu];
}
nodemask = cptab->ctb_parts[cpt].cpt_nodemask;
}
- if (any_online_cpu(*cpumask) == NR_CPUS) {
+ if (cpumask_any_and(cpumask, cpu_online_mask) >= nr_cpu_ids) {
CERROR("No online CPU found in CPU partition %d, did someone do CPU hotplug on system? You might need to reload Lustre modules to keep system working well.\n",
cpt);
return -EINVAL;
}
for_each_online_cpu(i) {
- if (cpu_isset(i, *cpumask))
+ if (cpumask_test_cpu(i, cpumask))
continue;
rc = set_cpus_allowed_ptr(current, cpumask);
LASSERT(number > 0);
- if (number >= cpus_weight(*node)) {
- while (!cpus_empty(*node)) {
- cpu = first_cpu(*node);
+ if (number >= cpumask_weight(node)) {
+ while (!cpumask_empty(node)) {
+ cpu = cpumask_first(node);
rc = cfs_cpt_set_cpu(cptab, cpt, cpu);
if (!rc)
return -EINVAL;
- cpu_clear(cpu, *node);
+ cpumask_clear_cpu(cpu, node);
}
return 0;
}
goto out;
}
- while (!cpus_empty(*node)) {
- cpu = first_cpu(*node);
+ while (!cpumask_empty(node)) {
+ cpu = cpumask_first(node);
/* get cpumask for cores in the same socket */
cfs_cpu_core_siblings(cpu, socket);
- cpus_and(*socket, *socket, *node);
+ cpumask_and(socket, socket, node);
- LASSERT(!cpus_empty(*socket));
+ LASSERT(!cpumask_empty(socket));
- while (!cpus_empty(*socket)) {
+ while (!cpumask_empty(socket)) {
int i;
/* get cpumask for hts in the same core */
cfs_cpu_ht_siblings(cpu, core);
- cpus_and(*core, *core, *node);
+ cpumask_and(core, core, node);
- LASSERT(!cpus_empty(*core));
+ LASSERT(!cpumask_empty(core));
- for_each_cpu_mask(i, *core) {
- cpu_clear(i, *socket);
- cpu_clear(i, *node);
+ for_each_cpu(i, core) {
+ cpumask_clear_cpu(i, socket);
+ cpumask_clear_cpu(i, node);
rc = cfs_cpt_set_cpu(cptab, cpt, i);
if (!rc) {
if (--number == 0)
goto out;
}
- cpu = first_cpu(*socket);
+ cpu = cpumask_first(socket);
}
}
for_each_online_node(i) {
cfs_node_to_cpumask(i, mask);
- while (!cpus_empty(*mask)) {
+ while (!cpumask_empty(mask)) {
struct cfs_cpu_partition *part;
int n;
part = &cptab->ctb_parts[cpt];
- n = num - cpus_weight(*part->cpt_cpumask);
+ n = num - cpumask_weight(part->cpt_cpumask);
LASSERT(n > 0);
rc = cfs_cpt_choose_ncpus(cptab, cpt, mask, n);
if (rc < 0)
goto failed;
- LASSERT(num >= cpus_weight(*part->cpt_cpumask));
- if (num == cpus_weight(*part->cpt_cpumask))
+ LASSERT(num >= cpumask_weight(part->cpt_cpumask));
+ if (num == cpumask_weight(part->cpt_cpumask))
cpt++;
}
}
if (cpt != ncpt ||
- num != cpus_weight(*cptab->ctb_parts[ncpt - 1].cpt_cpumask)) {
+ num != cpumask_weight(cptab->ctb_parts[ncpt - 1].cpt_cpumask)) {
CERROR("Expect %d(%d) CPU partitions but got %d(%d), CPU hotplug/unplug while setting?\n",
cptab->ctb_nparts, num, cpt,
- cpus_weight(*cptab->ctb_parts[ncpt - 1].cpt_cpumask));
+ cpumask_weight(cptab->ctb_parts[ncpt - 1].cpt_cpumask));
goto failed;
}
return NULL;
}
- high = node ? MAX_NUMNODES - 1 : NR_CPUS - 1;
+ high = node ? MAX_NUMNODES - 1 : nr_cpu_ids - 1;
cptab = cfs_cpt_table_alloc(ncpt);
if (cptab == NULL) {
mutex_lock(&cpt_data.cpt_mutex);
/* if all HTs in a core are offline, it may break affinity */
cfs_cpu_ht_siblings(cpu, cpt_data.cpt_cpumask);
- warn = any_online_cpu(*cpt_data.cpt_cpumask) >= nr_cpu_ids;
+ warn = cpumask_any_and(cpt_data.cpt_cpumask,
+ cpu_online_mask) >= nr_cpu_ids;
mutex_unlock(&cpt_data.cpt_mutex);
CDEBUG(warn ? D_WARNING : D_INFO,
"Lustre: can't support CPU plug-out well now, performance and stability could be impacted [CPU %u action: %lx]\n",
#include <linux/interrupt.h>
#include <linux/completion.h>
#include <linux/fs.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#include <linux/miscdevice.h>
# define DEBUG_SUBSYSTEM S_LNET
return -EINVAL;
}
- if (hdr->ioc_len + buf >= end) {
+ if (hdr->ioc_len >= end - buf) {
CERROR("PORTALS: user buffer exceeds kernel buffer\n");
return -EINVAL;
}
#include "../../../include/linux/libcfs/libcfs.h"
#if defined(CONFIG_KGDB)
-#include <asm/kgdb.h>
+#include <linux/kgdb.h>
#endif
/**
void cfs_enter_debugger(void)
{
#if defined(CONFIG_KGDB)
-// BREAKPOINT();
+ /* BREAKPOINT(); */
#else
/* nothing */
#endif
}
+EXPORT_SYMBOL(cfs_enter_debugger);
sigset_t
return old;
}
+EXPORT_SYMBOL(cfs_block_allsigs);
sigset_t cfs_block_sigs(unsigned long sigs)
{
spin_unlock_irqrestore(¤t->sighand->siglock, flags);
return old;
}
+EXPORT_SYMBOL(cfs_block_sigs);
/* Block all signals except for the @sigs */
sigset_t cfs_block_sigsinv(unsigned long sigs)
return old;
}
+EXPORT_SYMBOL(cfs_block_sigsinv);
void
-cfs_restore_sigs (sigset_t old)
+cfs_restore_sigs(sigset_t old)
{
unsigned long flags;
recalc_sigpending();
spin_unlock_irqrestore(¤t->sighand->siglock, flags);
}
+EXPORT_SYMBOL(cfs_restore_sigs);
int
cfs_signal_pending(void)
{
return signal_pending(current);
}
+EXPORT_SYMBOL(cfs_signal_pending);
void
cfs_clear_sigpending(void)
clear_tsk_thread_flag(current, TIF_SIGPENDING);
spin_unlock_irqrestore(¤t->sighand->siglock, flags);
}
+EXPORT_SYMBOL(cfs_clear_sigpending);
int
libcfs_arch_init(void)
{
return 0;
}
+EXPORT_SYMBOL(libcfs_arch_init);
void
libcfs_arch_cleanup(void)
{
return;
}
-
-EXPORT_SYMBOL(libcfs_arch_init);
EXPORT_SYMBOL(libcfs_arch_cleanup);
-EXPORT_SYMBOL(cfs_enter_debugger);
-EXPORT_SYMBOL(cfs_block_allsigs);
-EXPORT_SYMBOL(cfs_block_sigs);
-EXPORT_SYMBOL(cfs_block_sigsinv);
-EXPORT_SYMBOL(cfs_restore_sigs);
-EXPORT_SYMBOL(cfs_signal_pending);
-EXPORT_SYMBOL(cfs_clear_sigpending);
+
+++ /dev/null
-/*
- * GPL HEADER START
- *
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 only,
- * as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License version 2 for more details (a copy is included
- * in the LICENSE file that accompanied this code).
- *
- * You should have received a copy of the GNU General Public License
- * version 2 along with this program; If not, see
- * http://www.sun.com/software/products/lustre/docs/GPLv2.pdf
- *
- * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
- * CA 95054 USA or visit www.sun.com if you need additional information or
- * have any questions.
- *
- * GPL HEADER END
- */
-/*
- * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
- * Use is subject to license terms.
- *
- * Copyright (c) 2011, 2012, Intel Corporation.
- */
-/*
- * This file is part of Lustre, http://www.lustre.org/
- * Lustre is a trademark of Sun Microsystems, Inc.
- *
- * libcfs/libcfs/linux/linux-proc.c
- *
- * Author: Zach Brown <zab@zabbo.net>
- * Author: Peter J. Braam <braam@clusterfs.com>
- * Author: Phil Schwan <phil@clusterfs.com>
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/string.h>
-#include <linux/stat.h>
-#include <linux/errno.h>
-#include <linux/unistd.h>
-#include <net/sock.h>
-#include <linux/uio.h>
-
-#include <asm/uaccess.h>
-
-#include <linux/fs.h>
-#include <linux/file.h>
-#include <linux/list.h>
-
-#include <linux/proc_fs.h>
-#include <linux/sysctl.h>
-
-# define DEBUG_SUBSYSTEM S_LNET
-
-#include "../../../include/linux/libcfs/libcfs.h"
-#include <asm/div64.h>
-#include "../tracefile.h"
-
-static struct ctl_table_header *lnet_table_header = NULL;
-extern char lnet_upcall[1024];
-/**
- * The path of debug log dump upcall script.
- */
-extern char lnet_debug_log_upcall[1024];
-
-#define CTL_LNET (0x100)
-enum {
- PSDEV_DEBUG = 1, /* control debugging */
- PSDEV_SUBSYSTEM_DEBUG, /* control debugging */
- PSDEV_PRINTK, /* force all messages to console */
- PSDEV_CONSOLE_RATELIMIT, /* ratelimit console messages */
- PSDEV_CONSOLE_MAX_DELAY_CS, /* maximum delay over which we skip messages */
- PSDEV_CONSOLE_MIN_DELAY_CS, /* initial delay over which we skip messages */
- PSDEV_CONSOLE_BACKOFF, /* delay increase factor */
- PSDEV_DEBUG_PATH, /* crashdump log location */
- PSDEV_DEBUG_DUMP_PATH, /* crashdump tracelog location */
- PSDEV_CPT_TABLE, /* information about cpu partitions */
- PSDEV_LNET_UPCALL, /* User mode upcall script */
- PSDEV_LNET_MEMUSED, /* bytes currently PORTAL_ALLOCated */
- PSDEV_LNET_CATASTROPHE, /* if we have LBUGged or panic'd */
- PSDEV_LNET_PANIC_ON_LBUG, /* flag to panic on LBUG */
- PSDEV_LNET_DUMP_KERNEL, /* snapshot kernel debug buffer to file */
- PSDEV_LNET_DAEMON_FILE, /* spool kernel debug buffer to file */
- PSDEV_LNET_DEBUG_MB, /* size of debug buffer */
- PSDEV_LNET_DEBUG_LOG_UPCALL, /* debug log upcall script */
- PSDEV_LNET_WATCHDOG_RATELIMIT, /* ratelimit watchdog messages */
- PSDEV_LNET_FORCE_LBUG, /* hook to force an LBUG */
- PSDEV_LNET_FAIL_LOC, /* control test failures instrumentation */
- PSDEV_LNET_FAIL_VAL, /* userdata for fail loc */
-};
-
-static int proc_call_handler(void *data, int write, loff_t *ppos,
- void __user *buffer, size_t *lenp,
- int (*handler)(void *data, int write,
- loff_t pos, void __user *buffer, int len))
-{
- int rc = handler(data, write, *ppos, buffer, *lenp);
-
- if (rc < 0)
- return rc;
-
- if (write) {
- *ppos += *lenp;
- } else {
- *lenp = rc;
- *ppos += rc;
- }
- return 0;
-}
-
-static int __proc_dobitmasks(void *data, int write,
- loff_t pos, void __user *buffer, int nob)
-{
- const int tmpstrlen = 512;
- char *tmpstr;
- int rc;
- unsigned int *mask = data;
- int is_subsys = (mask == &libcfs_subsystem_debug) ? 1 : 0;
- int is_printk = (mask == &libcfs_printk) ? 1 : 0;
-
- rc = cfs_trace_allocate_string_buffer(&tmpstr, tmpstrlen);
- if (rc < 0)
- return rc;
-
- if (!write) {
- libcfs_debug_mask2str(tmpstr, tmpstrlen, *mask, is_subsys);
- rc = strlen(tmpstr);
-
- if (pos >= rc) {
- rc = 0;
- } else {
- rc = cfs_trace_copyout_string(buffer, nob,
- tmpstr + pos, "\n");
- }
- } else {
- rc = cfs_trace_copyin_string(tmpstr, tmpstrlen, buffer, nob);
- if (rc < 0) {
- cfs_trace_free_string_buffer(tmpstr, tmpstrlen);
- return rc;
- }
-
- rc = libcfs_debug_str2mask(mask, tmpstr, is_subsys);
- /* Always print LBUG/LASSERT to console, so keep this mask */
- if (is_printk)
- *mask |= D_EMERG;
- }
-
- cfs_trace_free_string_buffer(tmpstr, tmpstrlen);
- return rc;
-}
-
-static int proc_dobitmasks(struct ctl_table *table, int write,
- void __user *buffer, size_t *lenp, loff_t *ppos)
-{
- return proc_call_handler(table->data, write, ppos, buffer, lenp,
- __proc_dobitmasks);
-}
-
-static int min_watchdog_ratelimit = 0; /* disable ratelimiting */
-static int max_watchdog_ratelimit = (24*60*60); /* limit to once per day */
-
-static int __proc_dump_kernel(void *data, int write,
- loff_t pos, void __user *buffer, int nob)
-{
- if (!write)
- return 0;
-
- return cfs_trace_dump_debug_buffer_usrstr(buffer, nob);
-}
-
-static int proc_dump_kernel(struct ctl_table *table, int write,
- void __user *buffer, size_t *lenp, loff_t *ppos)
-{
- return proc_call_handler(table->data, write, ppos, buffer, lenp,
- __proc_dump_kernel);
-}
-
-static int __proc_daemon_file(void *data, int write,
- loff_t pos, void __user *buffer, int nob)
-{
- if (!write) {
- int len = strlen(cfs_tracefile);
-
- if (pos >= len)
- return 0;
-
- return cfs_trace_copyout_string(buffer, nob,
- cfs_tracefile + pos, "\n");
- }
-
- return cfs_trace_daemon_command_usrstr(buffer, nob);
-}
-
-static int proc_daemon_file(struct ctl_table *table, int write,
- void __user *buffer, size_t *lenp, loff_t *ppos)
-{
- return proc_call_handler(table->data, write, ppos, buffer, lenp,
- __proc_daemon_file);
-}
-
-static int __proc_debug_mb(void *data, int write,
- loff_t pos, void __user *buffer, int nob)
-{
- if (!write) {
- char tmpstr[32];
- int len = snprintf(tmpstr, sizeof(tmpstr), "%d",
- cfs_trace_get_debug_mb());
-
- if (pos >= len)
- return 0;
-
- return cfs_trace_copyout_string(buffer, nob, tmpstr + pos,
- "\n");
- }
-
- return cfs_trace_set_debug_mb_usrstr(buffer, nob);
-}
-
-static int proc_debug_mb(struct ctl_table *table, int write,
- void __user *buffer, size_t *lenp, loff_t *ppos)
-{
- return proc_call_handler(table->data, write, ppos, buffer, lenp,
- __proc_debug_mb);
-}
-
-static int proc_console_max_delay_cs(struct ctl_table *table, int write,
- void __user *buffer, size_t *lenp,
- loff_t *ppos)
-{
- int rc, max_delay_cs;
- struct ctl_table dummy = *table;
- long d;
-
- dummy.data = &max_delay_cs;
- dummy.proc_handler = &proc_dointvec;
-
- if (!write) { /* read */
- max_delay_cs = cfs_duration_sec(libcfs_console_max_delay * 100);
- rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
- return rc;
- }
-
- /* write */
- max_delay_cs = 0;
- rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
- if (rc < 0)
- return rc;
- if (max_delay_cs <= 0)
- return -EINVAL;
-
- d = cfs_time_seconds(max_delay_cs) / 100;
- if (d == 0 || d < libcfs_console_min_delay)
- return -EINVAL;
- libcfs_console_max_delay = d;
-
- return rc;
-}
-
-static int proc_console_min_delay_cs(struct ctl_table *table, int write,
- void __user *buffer, size_t *lenp,
- loff_t *ppos)
-{
- int rc, min_delay_cs;
- struct ctl_table dummy = *table;
- long d;
-
- dummy.data = &min_delay_cs;
- dummy.proc_handler = &proc_dointvec;
-
- if (!write) { /* read */
- min_delay_cs = cfs_duration_sec(libcfs_console_min_delay * 100);
- rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
- return rc;
- }
-
- /* write */
- min_delay_cs = 0;
- rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
- if (rc < 0)
- return rc;
- if (min_delay_cs <= 0)
- return -EINVAL;
-
- d = cfs_time_seconds(min_delay_cs) / 100;
- if (d == 0 || d > libcfs_console_max_delay)
- return -EINVAL;
- libcfs_console_min_delay = d;
-
- return rc;
-}
-
-static int proc_console_backoff(struct ctl_table *table, int write,
- void __user *buffer, size_t *lenp, loff_t *ppos)
-{
- int rc, backoff;
- struct ctl_table dummy = *table;
-
- dummy.data = &backoff;
- dummy.proc_handler = &proc_dointvec;
-
- if (!write) { /* read */
- backoff= libcfs_console_backoff;
- rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
- return rc;
- }
-
- /* write */
- backoff = 0;
- rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
- if (rc < 0)
- return rc;
- if (backoff <= 0)
- return -EINVAL;
-
- libcfs_console_backoff = backoff;
-
- return rc;
-}
-
-static int libcfs_force_lbug(struct ctl_table *table, int write,
- void __user *buffer,
- size_t *lenp, loff_t *ppos)
-{
- if (write)
- LBUG();
- return 0;
-}
-
-static int proc_fail_loc(struct ctl_table *table, int write,
- void __user *buffer,
- size_t *lenp, loff_t *ppos)
-{
- int rc;
- long old_fail_loc = cfs_fail_loc;
-
- rc = proc_doulongvec_minmax(table, write, buffer, lenp, ppos);
- if (old_fail_loc != cfs_fail_loc)
- wake_up(&cfs_race_waitq);
- return rc;
-}
-
-static int __proc_cpt_table(void *data, int write,
- loff_t pos, void __user *buffer, int nob)
-{
- char *buf = NULL;
- int len = 4096;
- int rc = 0;
-
- if (write)
- return -EPERM;
-
- LASSERT(cfs_cpt_table != NULL);
-
- while (1) {
- LIBCFS_ALLOC(buf, len);
- if (buf == NULL)
- return -ENOMEM;
-
- rc = cfs_cpt_table_print(cfs_cpt_table, buf, len);
- if (rc >= 0)
- break;
-
- if (rc == -EFBIG) {
- LIBCFS_FREE(buf, len);
- len <<= 1;
- continue;
- }
- goto out;
- }
-
- if (pos >= rc) {
- rc = 0;
- goto out;
- }
-
- rc = cfs_trace_copyout_string(buffer, nob, buf + pos, NULL);
- out:
- if (buf != NULL)
- LIBCFS_FREE(buf, len);
- return rc;
-}
-
-static int proc_cpt_table(struct ctl_table *table, int write,
- void __user *buffer, size_t *lenp, loff_t *ppos)
-{
- return proc_call_handler(table->data, write, ppos, buffer, lenp,
- __proc_cpt_table);
-}
-
-static struct ctl_table lnet_table[] = {
- /*
- * NB No .strategy entries have been provided since sysctl(8) prefers
- * to go via /proc for portability.
- */
- {
- .procname = "debug",
- .data = &libcfs_debug,
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_dobitmasks,
- },
- {
- .procname = "subsystem_debug",
- .data = &libcfs_subsystem_debug,
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_dobitmasks,
- },
- {
- .procname = "printk",
- .data = &libcfs_printk,
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_dobitmasks,
- },
- {
- .procname = "console_ratelimit",
- .data = &libcfs_console_ratelimit,
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_dointvec
- },
- {
- .procname = "console_max_delay_centisecs",
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_console_max_delay_cs
- },
- {
- .procname = "console_min_delay_centisecs",
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_console_min_delay_cs
- },
- {
- .procname = "console_backoff",
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_console_backoff
- },
-
- {
- .procname = "debug_path",
- .data = libcfs_debug_file_path_arr,
- .maxlen = sizeof(libcfs_debug_file_path_arr),
- .mode = 0644,
- .proc_handler = &proc_dostring,
- },
-
- {
- .procname = "cpu_partition_table",
- .maxlen = 128,
- .mode = 0444,
- .proc_handler = &proc_cpt_table,
- },
-
- {
- .procname = "upcall",
- .data = lnet_upcall,
- .maxlen = sizeof(lnet_upcall),
- .mode = 0644,
- .proc_handler = &proc_dostring,
- },
- {
- .procname = "debug_log_upcall",
- .data = lnet_debug_log_upcall,
- .maxlen = sizeof(lnet_debug_log_upcall),
- .mode = 0644,
- .proc_handler = &proc_dostring,
- },
- {
- .procname = "lnet_memused",
- .data = (int *)&libcfs_kmemory.counter,
- .maxlen = sizeof(int),
- .mode = 0444,
- .proc_handler = &proc_dointvec,
- },
- {
- .procname = "catastrophe",
- .data = &libcfs_catastrophe,
- .maxlen = sizeof(int),
- .mode = 0444,
- .proc_handler = &proc_dointvec,
- },
- {
- .procname = "panic_on_lbug",
- .data = &libcfs_panic_on_lbug,
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_dointvec,
- },
- {
- .procname = "dump_kernel",
- .maxlen = 256,
- .mode = 0200,
- .proc_handler = &proc_dump_kernel,
- },
- {
- .procname = "daemon_file",
- .mode = 0644,
- .maxlen = 256,
- .proc_handler = &proc_daemon_file,
- },
- {
- .procname = "debug_mb",
- .mode = 0644,
- .proc_handler = &proc_debug_mb,
- },
- {
- .procname = "watchdog_ratelimit",
- .data = &libcfs_watchdog_ratelimit,
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_dointvec_minmax,
- .extra1 = &min_watchdog_ratelimit,
- .extra2 = &max_watchdog_ratelimit,
- },
- {
- .procname = "force_lbug",
- .data = NULL,
- .maxlen = 0,
- .mode = 0200,
- .proc_handler = &libcfs_force_lbug
- },
- {
- .procname = "fail_loc",
- .data = &cfs_fail_loc,
- .maxlen = sizeof(cfs_fail_loc),
- .mode = 0644,
- .proc_handler = &proc_fail_loc
- },
- {
- .procname = "fail_val",
- .data = &cfs_fail_val,
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_dointvec
- },
- {
- }
-};
-
-static struct ctl_table top_table[] = {
- {
- .procname = "lnet",
- .mode = 0555,
- .data = NULL,
- .maxlen = 0,
- .child = lnet_table,
- },
- {
- }
-};
-
-int insert_proc(void)
-{
- if (lnet_table_header == NULL)
- lnet_table_header = register_sysctl_table(top_table);
- return 0;
-}
-
-void remove_proc(void)
-{
- if (lnet_table_header != NULL)
- unregister_sysctl_table(lnet_table_header);
-
- lnet_table_header = NULL;
-}
newsock->ops = sock->ops;
- set_current_state(TASK_INTERRUPTIBLE);
- add_wait_queue(sk_sleep(sock->sk), &wait);
-
rc = sock->ops->accept(sock, newsock, O_NONBLOCK);
if (rc == -EAGAIN) {
/* Nothing ready, so wait for activity */
+ set_current_state(TASK_INTERRUPTIBLE);
+ add_wait_queue(sk_sleep(sock->sk), &wait);
schedule();
+ remove_wait_queue(sk_sleep(sock->sk), &wait);
+ set_current_state(TASK_RUNNING);
rc = sock->ops->accept(sock, newsock, O_NONBLOCK);
}
- remove_wait_queue(sk_sleep(sock->sk), &wait);
- set_current_state(TASK_RUNNING);
-
if (rc != 0)
goto failed;
* This file is part of Lustre, http://www.lustre.org/
* Lustre is a trademark of Sun Microsystems, Inc.
*/
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/string.h>
+#include <linux/stat.h>
+#include <linux/errno.h>
+#include <linux/unistd.h>
+#include <net/sock.h>
+#include <linux/uio.h>
-#define DEBUG_SUBSYSTEM S_LNET
+#include <linux/uaccess.h>
+
+#include <linux/fs.h>
+#include <linux/file.h>
+#include <linux/list.h>
+
+#include <linux/proc_fs.h>
+#include <linux/sysctl.h>
+
+# define DEBUG_SUBSYSTEM S_LNET
#include "../../include/linux/libcfs/libcfs.h"
+#include <asm/div64.h>
+
#include "../../include/linux/libcfs/libcfs_crypto.h"
#include "../../include/linux/lnet/lib-lnet.h"
#include "../../include/linux/lnet/lnet.h"
#include "tracefile.h"
+MODULE_AUTHOR("Peter J. Braam <braam@clusterfs.com>");
+MODULE_DESCRIPTION("Portals v3.1");
+MODULE_LICENSE("GPL");
+
+extern struct miscdevice libcfs_dev;
+extern struct rw_semaphore cfs_tracefile_sem;
+extern struct mutex cfs_trace_thread_mutex;
+extern struct cfs_wi_sched *cfs_sched_rehash;
+extern void libcfs_init_nidstrings(void);
+
+static int insert_proc(void);
+static void remove_proc(void);
+
+static struct ctl_table_header *lnet_table_header;
+extern char lnet_upcall[1024];
+/**
+ * The path of debug log dump upcall script.
+ */
+extern char lnet_debug_log_upcall[1024];
+
+#define CTL_LNET (0x100)
+
+enum {
+ PSDEV_DEBUG = 1, /* control debugging */
+ PSDEV_SUBSYSTEM_DEBUG, /* control debugging */
+ PSDEV_PRINTK, /* force all messages to console */
+ PSDEV_CONSOLE_RATELIMIT, /* ratelimit console messages */
+ PSDEV_CONSOLE_MAX_DELAY_CS, /* maximum delay over which we skip messages */
+ PSDEV_CONSOLE_MIN_DELAY_CS, /* initial delay over which we skip messages */
+ PSDEV_CONSOLE_BACKOFF, /* delay increase factor */
+ PSDEV_DEBUG_PATH, /* crashdump log location */
+ PSDEV_DEBUG_DUMP_PATH, /* crashdump tracelog location */
+ PSDEV_CPT_TABLE, /* information about cpu partitions */
+ PSDEV_LNET_UPCALL, /* User mode upcall script */
+ PSDEV_LNET_MEMUSED, /* bytes currently PORTAL_ALLOCated */
+ PSDEV_LNET_CATASTROPHE, /* if we have LBUGged or panic'd */
+ PSDEV_LNET_PANIC_ON_LBUG, /* flag to panic on LBUG */
+ PSDEV_LNET_DUMP_KERNEL, /* snapshot kernel debug buffer to file */
+ PSDEV_LNET_DAEMON_FILE, /* spool kernel debug buffer to file */
+ PSDEV_LNET_DEBUG_MB, /* size of debug buffer */
+ PSDEV_LNET_DEBUG_LOG_UPCALL, /* debug log upcall script */
+ PSDEV_LNET_WATCHDOG_RATELIMIT, /* ratelimit watchdog messages */
+ PSDEV_LNET_FORCE_LBUG, /* hook to force an LBUG */
+ PSDEV_LNET_FAIL_LOC, /* control test failures instrumentation */
+ PSDEV_LNET_FAIL_VAL, /* userdata for fail loc */
+};
+
static void kportal_memhog_free (struct libcfs_device_userstate *ldu)
{
struct page **level0p = &ldu->ldu_memhog_root_page;
libcfs_ioctl
};
-extern int insert_proc(void);
-extern void remove_proc(void);
-MODULE_AUTHOR("Peter J. Braam <braam@clusterfs.com>");
-MODULE_DESCRIPTION("Portals v3.1");
-MODULE_LICENSE("GPL");
-
-extern struct miscdevice libcfs_dev;
-extern struct rw_semaphore cfs_tracefile_sem;
-extern struct mutex cfs_trace_thread_mutex;
-extern struct cfs_wi_sched *cfs_sched_rehash;
-
-extern void libcfs_init_nidstrings(void);
-
static int init_libcfs_module(void)
{
int rc;
rc = libcfs_debug_init(5 * 1024 * 1024);
if (rc < 0) {
- printk(KERN_ERR "LustreError: libcfs_debug_init: %d\n", rc);
+ pr_err("LustreError: libcfs_debug_init: %d\n", rc);
return rc;
}
rc = libcfs_debug_cleanup();
if (rc)
- printk(KERN_ERR "LustreError: libcfs_debug_cleanup: %d\n",
- rc);
+ pr_err("LustreError: libcfs_debug_cleanup: %d\n", rc);
libcfs_arch_cleanup();
}
+static int proc_call_handler(void *data, int write, loff_t *ppos,
+ void __user *buffer, size_t *lenp,
+ int (*handler)(void *data, int write,
+ loff_t pos, void __user *buffer, int len))
+{
+ int rc = handler(data, write, *ppos, buffer, *lenp);
+
+ if (rc < 0)
+ return rc;
+
+ if (write) {
+ *ppos += *lenp;
+ } else {
+ *lenp = rc;
+ *ppos += rc;
+ }
+ return 0;
+}
+
+static int __proc_dobitmasks(void *data, int write,
+ loff_t pos, void __user *buffer, int nob)
+{
+ const int tmpstrlen = 512;
+ char *tmpstr;
+ int rc;
+ unsigned int *mask = data;
+ int is_subsys = (mask == &libcfs_subsystem_debug) ? 1 : 0;
+ int is_printk = (mask == &libcfs_printk) ? 1 : 0;
+
+ rc = cfs_trace_allocate_string_buffer(&tmpstr, tmpstrlen);
+ if (rc < 0)
+ return rc;
+
+ if (!write) {
+ libcfs_debug_mask2str(tmpstr, tmpstrlen, *mask, is_subsys);
+ rc = strlen(tmpstr);
+
+ if (pos >= rc) {
+ rc = 0;
+ } else {
+ rc = cfs_trace_copyout_string(buffer, nob,
+ tmpstr + pos, "\n");
+ }
+ } else {
+ rc = cfs_trace_copyin_string(tmpstr, tmpstrlen, buffer, nob);
+ if (rc < 0) {
+ cfs_trace_free_string_buffer(tmpstr, tmpstrlen);
+ return rc;
+ }
+
+ rc = libcfs_debug_str2mask(mask, tmpstr, is_subsys);
+ /* Always print LBUG/LASSERT to console, so keep this mask */
+ if (is_printk)
+ *mask |= D_EMERG;
+ }
+
+ cfs_trace_free_string_buffer(tmpstr, tmpstrlen);
+ return rc;
+}
+
+static int proc_dobitmasks(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp, loff_t *ppos)
+{
+ return proc_call_handler(table->data, write, ppos, buffer, lenp,
+ __proc_dobitmasks);
+}
+
+static int min_watchdog_ratelimit; /* disable ratelimiting */
+static int max_watchdog_ratelimit = (24*60*60); /* limit to once per day */
+
+static int __proc_dump_kernel(void *data, int write,
+ loff_t pos, void __user *buffer, int nob)
+{
+ if (!write)
+ return 0;
+
+ return cfs_trace_dump_debug_buffer_usrstr(buffer, nob);
+}
+
+static int proc_dump_kernel(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp, loff_t *ppos)
+{
+ return proc_call_handler(table->data, write, ppos, buffer, lenp,
+ __proc_dump_kernel);
+}
+
+static int __proc_daemon_file(void *data, int write,
+ loff_t pos, void __user *buffer, int nob)
+{
+ if (!write) {
+ int len = strlen(cfs_tracefile);
+
+ if (pos >= len)
+ return 0;
+
+ return cfs_trace_copyout_string(buffer, nob,
+ cfs_tracefile + pos, "\n");
+ }
+
+ return cfs_trace_daemon_command_usrstr(buffer, nob);
+}
+
+static int proc_daemon_file(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp, loff_t *ppos)
+{
+ return proc_call_handler(table->data, write, ppos, buffer, lenp,
+ __proc_daemon_file);
+}
+
+static int __proc_debug_mb(void *data, int write,
+ loff_t pos, void __user *buffer, int nob)
+{
+ if (!write) {
+ char tmpstr[32];
+ int len = snprintf(tmpstr, sizeof(tmpstr), "%d",
+ cfs_trace_get_debug_mb());
+
+ if (pos >= len)
+ return 0;
+
+ return cfs_trace_copyout_string(buffer, nob, tmpstr + pos,
+ "\n");
+ }
+
+ return cfs_trace_set_debug_mb_usrstr(buffer, nob);
+}
+
+static int proc_debug_mb(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp, loff_t *ppos)
+{
+ return proc_call_handler(table->data, write, ppos, buffer, lenp,
+ __proc_debug_mb);
+}
+
+static int proc_console_max_delay_cs(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp,
+ loff_t *ppos)
+{
+ int rc, max_delay_cs;
+ struct ctl_table dummy = *table;
+ long d;
+
+ dummy.data = &max_delay_cs;
+ dummy.proc_handler = &proc_dointvec;
+
+ if (!write) { /* read */
+ max_delay_cs = cfs_duration_sec(libcfs_console_max_delay * 100);
+ rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
+ return rc;
+ }
+
+ /* write */
+ max_delay_cs = 0;
+ rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
+ if (rc < 0)
+ return rc;
+ if (max_delay_cs <= 0)
+ return -EINVAL;
+
+ d = cfs_time_seconds(max_delay_cs) / 100;
+ if (d == 0 || d < libcfs_console_min_delay)
+ return -EINVAL;
+ libcfs_console_max_delay = d;
+
+ return rc;
+}
+
+static int proc_console_min_delay_cs(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp,
+ loff_t *ppos)
+{
+ int rc, min_delay_cs;
+ struct ctl_table dummy = *table;
+ long d;
+
+ dummy.data = &min_delay_cs;
+ dummy.proc_handler = &proc_dointvec;
+
+ if (!write) { /* read */
+ min_delay_cs = cfs_duration_sec(libcfs_console_min_delay * 100);
+ rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
+ return rc;
+ }
+
+ /* write */
+ min_delay_cs = 0;
+ rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
+ if (rc < 0)
+ return rc;
+ if (min_delay_cs <= 0)
+ return -EINVAL;
+
+ d = cfs_time_seconds(min_delay_cs) / 100;
+ if (d == 0 || d > libcfs_console_max_delay)
+ return -EINVAL;
+ libcfs_console_min_delay = d;
+
+ return rc;
+}
+
+static int proc_console_backoff(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp, loff_t *ppos)
+{
+ int rc, backoff;
+ struct ctl_table dummy = *table;
+
+ dummy.data = &backoff;
+ dummy.proc_handler = &proc_dointvec;
+
+ if (!write) { /* read */
+ backoff = libcfs_console_backoff;
+ rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
+ return rc;
+ }
+
+ /* write */
+ backoff = 0;
+ rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
+ if (rc < 0)
+ return rc;
+ if (backoff <= 0)
+ return -EINVAL;
+
+ libcfs_console_backoff = backoff;
+
+ return rc;
+}
+
+static int libcfs_force_lbug(struct ctl_table *table, int write,
+ void __user *buffer,
+ size_t *lenp, loff_t *ppos)
+{
+ if (write)
+ LBUG();
+ return 0;
+}
+
+static int proc_fail_loc(struct ctl_table *table, int write,
+ void __user *buffer,
+ size_t *lenp, loff_t *ppos)
+{
+ int rc;
+ long old_fail_loc = cfs_fail_loc;
+
+ rc = proc_doulongvec_minmax(table, write, buffer, lenp, ppos);
+ if (old_fail_loc != cfs_fail_loc)
+ wake_up(&cfs_race_waitq);
+ return rc;
+}
+
+static int __proc_cpt_table(void *data, int write,
+ loff_t pos, void __user *buffer, int nob)
+{
+ char *buf = NULL;
+ int len = 4096;
+ int rc = 0;
+
+ if (write)
+ return -EPERM;
+
+ LASSERT(cfs_cpt_table != NULL);
+
+ while (1) {
+ LIBCFS_ALLOC(buf, len);
+ if (buf == NULL)
+ return -ENOMEM;
+
+ rc = cfs_cpt_table_print(cfs_cpt_table, buf, len);
+ if (rc >= 0)
+ break;
+
+ if (rc == -EFBIG) {
+ LIBCFS_FREE(buf, len);
+ len <<= 1;
+ continue;
+ }
+ goto out;
+ }
+
+ if (pos >= rc) {
+ rc = 0;
+ goto out;
+ }
+
+ rc = cfs_trace_copyout_string(buffer, nob, buf + pos, NULL);
+ out:
+ if (buf != NULL)
+ LIBCFS_FREE(buf, len);
+ return rc;
+}
+
+static int proc_cpt_table(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp, loff_t *ppos)
+{
+ return proc_call_handler(table->data, write, ppos, buffer, lenp,
+ __proc_cpt_table);
+}
+
+static struct ctl_table lnet_table[] = {
+ /*
+ * NB No .strategy entries have been provided since sysctl(8) prefers
+ * to go via /proc for portability.
+ */
+ {
+ .procname = "debug",
+ .data = &libcfs_debug,
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_dobitmasks,
+ },
+ {
+ .procname = "subsystem_debug",
+ .data = &libcfs_subsystem_debug,
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_dobitmasks,
+ },
+ {
+ .procname = "printk",
+ .data = &libcfs_printk,
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_dobitmasks,
+ },
+ {
+ .procname = "console_ratelimit",
+ .data = &libcfs_console_ratelimit,
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_dointvec
+ },
+ {
+ .procname = "console_max_delay_centisecs",
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_console_max_delay_cs
+ },
+ {
+ .procname = "console_min_delay_centisecs",
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_console_min_delay_cs
+ },
+ {
+ .procname = "console_backoff",
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_console_backoff
+ },
+
+ {
+ .procname = "debug_path",
+ .data = libcfs_debug_file_path_arr,
+ .maxlen = sizeof(libcfs_debug_file_path_arr),
+ .mode = 0644,
+ .proc_handler = &proc_dostring,
+ },
+
+ {
+ .procname = "cpu_partition_table",
+ .maxlen = 128,
+ .mode = 0444,
+ .proc_handler = &proc_cpt_table,
+ },
+
+ {
+ .procname = "upcall",
+ .data = lnet_upcall,
+ .maxlen = sizeof(lnet_upcall),
+ .mode = 0644,
+ .proc_handler = &proc_dostring,
+ },
+ {
+ .procname = "debug_log_upcall",
+ .data = lnet_debug_log_upcall,
+ .maxlen = sizeof(lnet_debug_log_upcall),
+ .mode = 0644,
+ .proc_handler = &proc_dostring,
+ },
+ {
+ .procname = "lnet_memused",
+ .data = (int *)&libcfs_kmemory.counter,
+ .maxlen = sizeof(int),
+ .mode = 0444,
+ .proc_handler = &proc_dointvec,
+ },
+ {
+ .procname = "catastrophe",
+ .data = &libcfs_catastrophe,
+ .maxlen = sizeof(int),
+ .mode = 0444,
+ .proc_handler = &proc_dointvec,
+ },
+ {
+ .procname = "panic_on_lbug",
+ .data = &libcfs_panic_on_lbug,
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_dointvec,
+ },
+ {
+ .procname = "dump_kernel",
+ .maxlen = 256,
+ .mode = 0200,
+ .proc_handler = &proc_dump_kernel,
+ },
+ {
+ .procname = "daemon_file",
+ .mode = 0644,
+ .maxlen = 256,
+ .proc_handler = &proc_daemon_file,
+ },
+ {
+ .procname = "debug_mb",
+ .mode = 0644,
+ .proc_handler = &proc_debug_mb,
+ },
+ {
+ .procname = "watchdog_ratelimit",
+ .data = &libcfs_watchdog_ratelimit,
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_dointvec_minmax,
+ .extra1 = &min_watchdog_ratelimit,
+ .extra2 = &max_watchdog_ratelimit,
+ },
+ {
+ .procname = "force_lbug",
+ .data = NULL,
+ .maxlen = 0,
+ .mode = 0200,
+ .proc_handler = &libcfs_force_lbug
+ },
+ {
+ .procname = "fail_loc",
+ .data = &cfs_fail_loc,
+ .maxlen = sizeof(cfs_fail_loc),
+ .mode = 0644,
+ .proc_handler = &proc_fail_loc
+ },
+ {
+ .procname = "fail_val",
+ .data = &cfs_fail_val,
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_dointvec
+ },
+ {
+ }
+};
+
+static struct ctl_table top_table[] = {
+ {
+ .procname = "lnet",
+ .mode = 0555,
+ .data = NULL,
+ .maxlen = 0,
+ .child = lnet_table,
+ },
+ {
+ }
+};
+
+static int insert_proc(void)
+{
+ if (lnet_table_header == NULL)
+ lnet_table_header = register_sysctl_table(top_table);
+ return 0;
+}
+
+static void remove_proc(void)
+{
+ if (lnet_table_header != NULL)
+ unregister_sysctl_table(lnet_table_header);
+
+ lnet_table_header = NULL;
+}
+
MODULE_VERSION("1.0.0");
+
module_init(init_libcfs_module);
module_exit(exit_libcfs_module);
long long cfs_tracefile_size = CFS_TRACEFILE_SIZE;
static struct tracefiled_ctl trace_tctl;
struct mutex cfs_trace_thread_mutex;
-static int thread_running = 0;
+static int thread_running;
static atomic_t cfs_tage_allocated = ATOMIC_INIT(0);
*/
if (len > PAGE_CACHE_SIZE) {
- printk(KERN_ERR
- "cowardly refusing to write %lu bytes in a page\n", len);
+ pr_err("cowardly refusing to write %lu bytes in a page\n", len);
return NULL;
}
if (IS_ERR(filp)) {
rc = PTR_ERR(filp);
filp = NULL;
- printk(KERN_ERR "LustreError: can't open %s for dump: rc %d\n",
- filename, rc);
+ pr_err("LustreError: can't open %s for dump: rc %d\n",
+ filename, rc);
goto out;
}
MMSPACE_CLOSE;
rc = vfs_fsync(filp, 1);
if (rc)
- printk(KERN_ERR "sync returns %d\n", rc);
+ pr_err("sync returns %d\n", rc);
close:
filp_close(filp, NULL);
out:
int i;
printk(KERN_ALERT "Lustre: trace pages aren't empty\n");
- printk(KERN_ERR "total cpus(%d): ",
- num_possible_cpus());
+ pr_err("total cpus(%d): ",
+ num_possible_cpus());
for (i = 0; i < num_possible_cpus(); i++)
if (cpu_online(i))
- printk(KERN_ERR "%d(on) ", i);
+ pr_cont("%d(on) ", i);
else
- printk(KERN_ERR "%d(off) ", i);
- printk(KERN_ERR "\n");
+ pr_cont("%d(off) ", i);
+ pr_cont("\n");
i = 0;
list_for_each_entry_safe(tage, tmp, &pc.pc_pages,
linkage)
- printk(KERN_ERR "page %d belongs to cpu %d\n",
- ++i, tage->cpu);
- printk(KERN_ERR "There are %d pages unwritten\n",
- i);
+ pr_err("page %d belongs to cpu %d\n",
+ ++i, tage->cpu);
+ pr_err("There are %d pages unwritten\n", i);
}
__LASSERT(list_empty(&pc.pc_pages));
end_loop:
}
void
-cfs_wi_shutdown (void)
+cfs_wi_shutdown(void)
{
struct cfs_wi_sched *sched;
rc = md_find_cbdata(sbi->ll_md_exp, ll_inode2fid(inode),
return_if_equal, NULL);
if (rc != 0)
- return rc;
+ return rc;
lsm = ccc_inode_lsm_get(inode);
if (lsm == NULL)
*/
static int ll_revalidate_nd(struct dentry *dentry, unsigned int flags)
{
- int rc;
-
CDEBUG(D_VFSTRACE, "VFS Op:name=%pd, flags=%u\n",
dentry, flags);
- rc = ll_revalidate_dentry(dentry, flags);
- return rc;
+ return ll_revalidate_dentry(dentry, flags);
}
#include <linux/fs.h>
#include <linux/pagemap.h>
#include <linux/mm.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#include <linux/buffer_head.h> /* for wait_on_buffer */
#include <linux/pagevec.h>
#include <linux/prefetch.h>
lump = (struct lov_user_md *)arg;
} else {
struct lov_user_mds_data *lmdp;
+
lmdp = (struct lov_user_mds_data *)arg;
lump = &lmdp->lmd_lmm;
}
mutex_lock(&inode->i_mutex);
switch (origin) {
- case SEEK_SET:
- break;
- case SEEK_CUR:
- offset += file->f_pos;
- break;
- case SEEK_END:
- if (offset > 0)
- goto out;
- if (api32)
- offset += LL_DIR_END_OFF_32BIT;
- else
- offset += LL_DIR_END_OFF;
- break;
- default:
+ case SEEK_SET:
+ break;
+ case SEEK_CUR:
+ offset += file->f_pos;
+ break;
+ case SEEK_END:
+ if (offset > 0)
goto out;
+ if (api32)
+ offset += LL_DIR_END_OFF_32BIT;
+ else
+ offset += LL_DIR_END_OFF;
+ break;
+ default:
+ goto out;
}
if (offset >= 0 &&
op_data->op_lease_handle = och->och_lease_handle;
op_data->op_attr.ia_valid |= ATTR_SIZE | ATTR_BLOCKS;
}
- epoch_close = (op_data->op_flags & MF_EPOCH_CLOSE);
+ epoch_close = op_data->op_flags & MF_EPOCH_CLOSE;
rc = md_close(md_exp, op_data, och->och_mod, &req);
if (rc == -EAGAIN) {
/* This close must have the epoch closed. */
}
if (rc == 0 && op_data->op_bias & MDS_HSM_RELEASE) {
struct mdt_body *body;
+
body = req_capsule_server_get(&req->rq_pill, &RMF_MDT_BODY);
if (!(body->valid & OBD_MD_FLRELEASED))
rc = -EBUSY;
int lockmode;
__u64 flags = LDLM_FL_BLOCK_GRANTED | LDLM_FL_TEST_LOCK;
struct lustre_handle lockh;
- ldlm_policy_data_t policy = {.l_inodebits={MDS_INODELOCK_OPEN}};
+ ldlm_policy_data_t policy = {.l_inodebits = {MDS_INODELOCK_OPEN}};
int rc = 0;
/* clear group lock, if present */
out_och_free:
if (rc) {
if (och_p && *och_p) {
- OBD_FREE(*och_p, sizeof (struct obd_client_handle));
+ OBD_FREE(*och_p, sizeof(struct obd_client_handle));
*och_p = NULL; /* OBD_FREE writes some magic there */
(*och_usecount)--;
}
fm_key.oa.o_oi = lsm->lsm_oi;
fm_key.oa.o_valid = OBD_MD_FLID | OBD_MD_FLGROUP;
+ if (i_size_read(inode) == 0) {
+ rc = ll_glimpse_size(inode);
+ if (rc)
+ goto out;
+ }
+
obdo_from_inode(&fm_key.oa, inode, OBD_MD_FLSIZE);
obdo_set_parent_fid(&fm_key.oa, &ll_i2info(inode)->lli_fid);
/* If filesize is 0, then there would be no objects for mapping */
int i;
if (!inode)
- return 0;
+ return 0;
fid = &ll_i2info(inode)->lli_fid;
CDEBUG(D_INFO, "trying to match res "DFID" mode %s\n", PFID(fid),
return in_data;
}
+EXPORT_SYMBOL(ll_iocontrol_register);
void ll_iocontrol_unregister(void *magic)
{
CWARN("didn't find iocontrol register block with magic: %p\n", magic);
}
-
-EXPORT_SYMBOL(ll_iocontrol_register);
EXPORT_SYMBOL(ll_iocontrol_unregister);
static enum llioc_iter
LASSERT(exp_connect_som(ll_i2mdexp(inode)));
op_data = kzalloc(sizeof(*op_data), GFP_NOFS);
- if (!op_data) {
- CERROR("can't allocate op_data\n");
+ if (!op_data)
return;
- }
ll_prepare_done_writing(inode, op_data, &och);
/* If there is no @och, we do not do D_W yet. */
si_meminfo(&si);
pages = si.totalram - si.totalhigh;
- if (pages >> (20 - PAGE_CACHE_SHIFT) < 512) {
+ if (pages >> (20 - PAGE_CACHE_SHIFT) < 512)
lru_page_max = pages / 2;
- } else {
+ else
lru_page_max = (pages / 4) * 3;
- }
/* initialize lru data */
atomic_set(&sbi->ll_cache.ccc_users, 0);
rc = obd_get_info(NULL, sbi->ll_md_exp, sizeof(KEY_MAX_EASIZE),
KEY_MAX_EASIZE, &size, lmmsize, NULL);
if (rc)
- CERROR("Get max mdsize error rc %d \n", rc);
+ CERROR("Get max mdsize error rc %d\n", rc);
return rc;
}
CDEBUG(D_CONFIG, "Found profile %s: mdc=%s osc=%s\n", profilenm,
lprof->lp_md, lprof->lp_dt);
- dt = kzalloc(strlen(lprof->lp_dt) + instlen + 2, GFP_NOFS);
+ dt = kasprintf(GFP_NOFS, "%s-%p", lprof->lp_dt, cfg->cfg_instance);
if (!dt) {
err = -ENOMEM;
goto out_free;
}
- sprintf(dt, "%s-%p", lprof->lp_dt, cfg->cfg_instance);
- md = kzalloc(strlen(lprof->lp_md) + instlen + 2, GFP_NOFS);
+ md = kasprintf(GFP_NOFS, "%s-%p", lprof->lp_md, cfg->cfg_instance);
if (!md) {
err = -ENOMEM;
goto out_free;
}
- sprintf(md, "%s-%p", lprof->lp_md, cfg->cfg_instance);
/* connections, registrations, sb setup */
err = client_common_fill_super(sb, md, dt, mnt);
if (attr->ia_valid & (ATTR_SIZE |
ATTR_ATIME | ATTR_ATIME_SET |
- ATTR_MTIME | ATTR_MTIME_SET))
+ ATTR_MTIME | ATTR_MTIME_SET)) {
/* For truncate and utimes sending attributes to OSTs, setting
* mtime/atime to the past will be performed under PW [0:EOF]
* extent lock (new_size:EOF for truncate). It may seem
rc = ll_setattr_ost(inode, attr);
if (attr->ia_valid & ATTR_SIZE)
up_write(&lli->lli_trunc_sem);
+ }
out:
if (op_data) {
if (op_data->op_ioepoch) {
struct lov_stripe_md *lsm = md->lsm;
struct ll_sb_info *sbi = ll_i2sbi(inode);
- LASSERT ((lsm != NULL) == ((body->valid & OBD_MD_FLEASIZE) != 0));
+ LASSERT((lsm != NULL) == ((body->valid & OBD_MD_FLEASIZE) != 0));
if (lsm != NULL) {
if (!lli->lli_has_smd &&
!(sbi->ll_flags & LL_SBI_LAYOUT_LOCK))
ptr = strrchr(lustre_cfg_string(lcfg, 0), '-');
if (!ptr || !*(++ptr))
return -EINVAL;
- if (sscanf(ptr, "%lx", &x) != 1)
+ rc = kstrtoul(ptr, 16, &x);
+ if (rc != 0)
return -EINVAL;
sb = (void *)x;
/* This better be a real Lustre superblock! */
#include <linux/stat.h>
#include <linux/errno.h>
#include <linux/unistd.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#include <linux/fs.h>
#include <linux/pagemap.h>
vio->u.fault.ft_vmpage = NULL;
vio->u.fault.fault.ft_vmf = vmf;
vio->u.fault.fault.ft_flags = 0;
- vio->u.fault.fault.ft_flags_valid = 0;
+ vio->u.fault.fault.ft_flags_valid = false;
result = cl_io_loop(env, io);
#include <linux/highmem.h>
#include <linux/gfp.h>
#include <linux/pagevec.h>
-
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#include "../include/lustre_lib.h"
#include "../include/lustre_lite.h"
old_bio->bi_iter.bi_size);
spin_lock_irq(&lo->lo_lock);
- inactive = (lo->lo_state != LLOOP_BOUND);
+ inactive = lo->lo_state != LLOOP_BOUND;
spin_unlock_irq(&lo->lo_lock);
if (inactive)
goto err;
cfs_time_shift_64(-OBD_STATFS_CACHE_SECONDS),
OBD_STATFS_NODELAY);
if (!rc)
- rc = seq_printf(m, "%u\n", osfs.os_bsize);
+ seq_printf(m, "%u\n", osfs.os_bsize);
return rc;
}
while (blk_size >>= 1)
result <<= 1;
- rc = seq_printf(m, "%llu\n", result);
+ seq_printf(m, "%llu\n", result);
}
+
return rc;
}
LPROC_SEQ_FOPS_RO(ll_kbytestotal);
while (blk_size >>= 1)
result <<= 1;
- rc = seq_printf(m, "%llu\n", result);
+ seq_printf(m, "%llu\n", result);
}
+
return rc;
}
LPROC_SEQ_FOPS_RO(ll_kbytesfree);
while (blk_size >>= 1)
result <<= 1;
- rc = seq_printf(m, "%llu\n", result);
+ seq_printf(m, "%llu\n", result);
}
+
return rc;
}
LPROC_SEQ_FOPS_RO(ll_kbytesavail);
cfs_time_shift_64(-OBD_STATFS_CACHE_SECONDS),
OBD_STATFS_NODELAY);
if (!rc)
- rc = seq_printf(m, "%llu\n", osfs.os_files);
+ seq_printf(m, "%llu\n", osfs.os_files);
+
return rc;
}
LPROC_SEQ_FOPS_RO(ll_filestotal);
cfs_time_shift_64(-OBD_STATFS_CACHE_SECONDS),
OBD_STATFS_NODELAY);
if (!rc)
- rc = seq_printf(m, "%llu\n", osfs.os_ffree);
+ seq_printf(m, "%llu\n", osfs.os_ffree);
+
return rc;
}
LPROC_SEQ_FOPS_RO(ll_filesfree);
static int ll_client_type_seq_show(struct seq_file *m, void *v)
{
struct ll_sb_info *sbi = ll_s2sbi((struct super_block *)m->private);
- int rc;
LASSERT(sbi != NULL);
if (sbi->ll_flags & LL_SBI_RMT_CLIENT)
- rc = seq_printf(m, "remote client\n");
+ seq_puts(m, "remote client\n");
else
- rc = seq_printf(m, "local client\n");
+ seq_puts(m, "local client\n");
- return rc;
+ return 0;
}
LPROC_SEQ_FOPS_RO(ll_client_type);
struct super_block *sb = (struct super_block *)m->private;
LASSERT(sb != NULL);
- return seq_printf(m, "%s\n", sb->s_type->name);
+ seq_printf(m, "%s\n", sb->s_type->name);
+ return 0;
}
LPROC_SEQ_FOPS_RO(ll_fstype);
struct super_block *sb = (struct super_block *)m->private;
LASSERT(sb != NULL);
- return seq_printf(m, "%s\n", ll_s2sbi(sb)->ll_sb_uuid.uuid);
+ seq_printf(m, "%s\n", ll_s2sbi(sb)->ll_sb_uuid.uuid);
+ return 0;
}
LPROC_SEQ_FOPS_RO(ll_sb_uuid);
max_cached_mb = cache->ccc_lru_max >> shift;
unused_mb = atomic_read(&cache->ccc_lru_left) >> shift;
- return seq_printf(m,
- "users: %d\n"
- "max_cached_mb: %d\n"
- "used_mb: %d\n"
- "unused_mb: %d\n"
- "reclaim_count: %u\n",
- atomic_read(&cache->ccc_users),
- max_cached_mb,
- max_cached_mb - unused_mb,
- unused_mb,
- cache->ccc_lru_shrinkers);
+ seq_printf(m,
+ "users: %d\n"
+ "max_cached_mb: %d\n"
+ "used_mb: %d\n"
+ "unused_mb: %d\n"
+ "reclaim_count: %u\n",
+ atomic_read(&cache->ccc_users),
+ max_cached_mb,
+ max_cached_mb - unused_mb,
+ unused_mb,
+ cache->ccc_lru_shrinkers);
+ return 0;
}
static ssize_t ll_max_cached_mb_seq_write(struct file *file,
struct super_block *sb = m->private;
struct ll_sb_info *sbi = ll_s2sbi(sb);
- return seq_printf(m, "%u\n", (sbi->ll_flags & LL_SBI_CHECKSUM) ? 1 : 0);
+ seq_printf(m, "%u\n", (sbi->ll_flags & LL_SBI_CHECKSUM) ? 1 : 0);
+ return 0;
}
static ssize_t ll_checksum_seq_write(struct file *file,
{
struct super_block *sb = m->private;
- return seq_printf(m, "%lu\n", ll_s2sbi(sb)->ll_max_rw_chunk);
+ seq_printf(m, "%lu\n", ll_s2sbi(sb)->ll_max_rw_chunk);
+ return 0;
}
static ssize_t ll_max_rw_chunk_seq_write(struct file *file,
{
struct super_block *sb = m->private;
- if (ll_s2sbi(sb)->ll_stats_track_type == type) {
- return seq_printf(m, "%d\n",
- ll_s2sbi(sb)->ll_stats_track_id);
+ if (ll_s2sbi(sb)->ll_stats_track_type == type)
+ seq_printf(m, "%d\n", ll_s2sbi(sb)->ll_stats_track_id);
+ else if (ll_s2sbi(sb)->ll_stats_track_type == STATS_TRACK_ALL)
+ seq_puts(m, "0 (all)\n");
+ else
+ seq_puts(m, "untracked\n");
- } else if (ll_s2sbi(sb)->ll_stats_track_type == STATS_TRACK_ALL) {
- return seq_printf(m, "0 (all)\n");
- } else {
- return seq_printf(m, "untracked\n");
- }
+ return 0;
}
static int ll_wr_track_id(const char __user *buffer, unsigned long count,
struct super_block *sb = m->private;
struct ll_sb_info *sbi = ll_s2sbi(sb);
- return seq_printf(m, "%u\n", sbi->ll_sa_max);
+ seq_printf(m, "%u\n", sbi->ll_sa_max);
+ return 0;
}
static ssize_t ll_statahead_max_seq_write(struct file *file,
struct super_block *sb = m->private;
struct ll_sb_info *sbi = ll_s2sbi(sb);
- return seq_printf(m, "%u\n",
- sbi->ll_flags & LL_SBI_AGL_ENABLED ? 1 : 0);
+ seq_printf(m, "%u\n", sbi->ll_flags & LL_SBI_AGL_ENABLED ? 1 : 0);
+ return 0;
}
static ssize_t ll_statahead_agl_seq_write(struct file *file,
struct super_block *sb = m->private;
struct ll_sb_info *sbi = ll_s2sbi(sb);
- return seq_printf(m,
- "statahead total: %u\n"
- "statahead wrong: %u\n"
- "agl total: %u\n",
- atomic_read(&sbi->ll_sa_total),
- atomic_read(&sbi->ll_sa_wrong),
- atomic_read(&sbi->ll_agl_total));
+ seq_printf(m,
+ "statahead total: %u\n"
+ "statahead wrong: %u\n"
+ "agl total: %u\n",
+ atomic_read(&sbi->ll_sa_total),
+ atomic_read(&sbi->ll_sa_wrong),
+ atomic_read(&sbi->ll_agl_total));
+ return 0;
}
LPROC_SEQ_FOPS_RO(ll_statahead_stats);
struct super_block *sb = m->private;
struct ll_sb_info *sbi = ll_s2sbi(sb);
- return seq_printf(m, "%u\n",
- (sbi->ll_flags & LL_SBI_LAZYSTATFS) ? 1 : 0);
+ seq_printf(m, "%u\n", sbi->ll_flags & LL_SBI_LAZYSTATFS ? 1 : 0);
+ return 0;
}
static ssize_t ll_lazystatfs_seq_write(struct file *file,
if (rc)
return rc;
- return seq_printf(m, "%u\n", ealen);
+ seq_printf(m, "%u\n", ealen);
+ return 0;
}
LPROC_SEQ_FOPS_RO(ll_max_easize);
-static int ll_defult_easize_seq_show(struct seq_file *m, void *v)
+static int ll_default_easize_seq_show(struct seq_file *m, void *v)
{
struct super_block *sb = m->private;
struct ll_sb_info *sbi = ll_s2sbi(sb);
if (rc)
return rc;
- return seq_printf(m, "%u\n", ealen);
+ seq_printf(m, "%u\n", ealen);
+ return 0;
}
-LPROC_SEQ_FOPS_RO(ll_defult_easize);
+LPROC_SEQ_FOPS_RO(ll_default_easize);
static int ll_max_cookiesize_seq_show(struct seq_file *m, void *v)
{
if (rc)
return rc;
- return seq_printf(m, "%u\n", cookielen);
+ seq_printf(m, "%u\n", cookielen);
+ return 0;
}
LPROC_SEQ_FOPS_RO(ll_max_cookiesize);
-static int ll_defult_cookiesize_seq_show(struct seq_file *m, void *v)
+static int ll_default_cookiesize_seq_show(struct seq_file *m, void *v)
{
struct super_block *sb = m->private;
struct ll_sb_info *sbi = ll_s2sbi(sb);
if (rc)
return rc;
- return seq_printf(m, "%u\n", cookielen);
+ seq_printf(m, "%u\n", cookielen);
+ return 0;
}
-LPROC_SEQ_FOPS_RO(ll_defult_cookiesize);
+LPROC_SEQ_FOPS_RO(ll_default_cookiesize);
static int ll_sbi_flags_seq_show(struct seq_file *m, void *v)
{
{
struct super_block *sb = m->private;
struct ll_sb_info *sbi = ll_s2sbi(sb);
- int rc;
- rc = seq_printf(m, "%u\n", sbi->ll_xattr_cache_enabled);
+ seq_printf(m, "%u\n", sbi->ll_xattr_cache_enabled);
- return rc;
+ return 0;
}
static ssize_t ll_xattr_cache_seq_write(struct file *file,
{ "statahead_stats", &ll_statahead_stats_fops, NULL, 0 },
{ "lazystatfs", &ll_lazystatfs_fops, NULL },
{ "max_easize", &ll_max_easize_fops, NULL, 0 },
- { "default_easize", &ll_defult_easize_fops, NULL, 0 },
+ { "default_easize", &ll_default_easize_fops, NULL, 0 },
{ "max_cookiesize", &ll_max_cookiesize_fops, NULL, 0 },
- { "default_cookiesize", &ll_defult_cookiesize_fops, NULL, 0 },
+ { "default_cookiesize", &ll_default_cookiesize_fops, NULL, 0 },
{ "sbi_flags", &ll_sbi_flags_fops, NULL, 0 },
{ "xattr_cache", &ll_xattr_cache_fops, NULL, 0 },
{ NULL }
lli->lli_fid = body->fid1;
if (unlikely(!(body->valid & OBD_MD_FLTYPE))) {
- CERROR("Can not initialize inode " DFID " without object type: valid = %#llx\n",
+ CERROR("Can not initialize inode " DFID
+ " without object type: valid = %#llx\n",
PFID(&lli->lli_fid), body->valid);
return -EINVAL;
}
long long lookup_flags = LOOKUP_OPEN;
int rc = 0;
- CDEBUG(D_VFSTRACE, "VFS Op:name=%pd,dir=%lu/%u(%p),file %p,open_flags %x,mode %x opened %d\n",
+ CDEBUG(D_VFSTRACE,
+ "VFS Op:name=%pd,dir=%lu/%u(%p),file %p,open_flags %x,mode %x opened %d\n",
dentry, dir->i_ino,
dir->i_generation, dir, file, open_flags, mode, *opened);
* Instead, ll_ddelete() and ll_d_iput() will update it based upon if there
* is any lock existing. They will recycle dentries and inodes based upon locks
* too. b=20433 */
-static int ll_unlink(struct inode * dir, struct dentry *dentry)
+static int ll_unlink(struct inode *dir, struct dentry *dentry)
{
struct ptlrpc_request *request = NULL;
struct md_op_data *op_data;
int rc;
+
CDEBUG(D_VFSTRACE, "VFS Op:name=%pd,dir=%lu/%u(%p)\n",
dentry, dir->i_ino, dir->i_generation, dir);
dentry, dir->i_ino, dir->i_generation, dir);
op_data = ll_prep_md_op_data(NULL, dir, NULL,
- dentry->d_name.name,
+ dentry->d_name.name,
dentry->d_name.len,
S_IFDIR, LUSTRE_OPC_ANY, NULL);
if (IS_ERR(op_data))
int err;
CDEBUG(D_VFSTRACE,
- "VFS Op:oldname=%pd,src_dir=%lu/%u(%p),newname=%pd,"
- "tgt_dir=%lu/%u(%p)\n", old_dentry,
- old_dir->i_ino, old_dir->i_generation, old_dir, new_dentry,
- new_dir->i_ino, new_dir->i_generation, new_dir);
+ "VFS Op:oldname=%pd,src_dir=%lu/%u(%p),newname=%pd,tgt_dir=%lu/%u(%p)\n",
+ old_dentry, old_dir->i_ino, old_dir->i_generation, old_dir,
+ new_dentry, new_dir->i_ino, new_dir->i_generation, new_dir);
op_data = ll_prep_md_op_data(NULL, old_dir, new_dir, NULL, 0, 0,
LUSTRE_OPC_ANY, NULL);
#include <linux/errno.h>
#include <linux/unistd.h>
#include <linux/writeback.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#include <linux/fs.h>
#include <linux/pagemap.h>
/* Note: we only trim the RPC, instead of extending the RPC
* to the boundary, so to avoid reading too much pages during
* random reading. */
- rpc_boundary = ((end + 1) & (~(PTLRPC_MAX_BRW_PAGES - 1)));
+ rpc_boundary = (end + 1) & (~(PTLRPC_MAX_BRW_PAGES - 1));
if (rpc_boundary > 0)
rpc_boundary--;
#include <linux/stat.h>
#include <linux/errno.h>
#include <linux/unistd.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#include <linux/migrate.h>
#include <linux/fs.h>
struct qstr se_qstr;
};
-static unsigned int sai_generation = 0;
+static unsigned int sai_generation;
static DEFINE_SPINLOCK(sai_generation_lock);
static inline int ll_sa_entry_unhashed(struct ll_sa_entry *entry)
struct ll_inode_info *lli = ll_i2info(dir);
struct ll_statahead_info *sai = NULL;
struct ll_sa_entry *entry;
+ __u64 handle = 0;
int wakeup;
if (it_disposition(it, DISP_LOOKUP_NEG))
rc = -ENOENT;
+ if (rc == 0) {
+ /* release ibits lock ASAP to avoid deadlock when statahead
+ * thread enqueues lock on parent in readdir and another
+ * process enqueues lock on child with parent lock held, eg.
+ * unlink. */
+ handle = it->d.lustre.it_lock_handle;
+ ll_intent_drop_lock(it);
+ }
+
spin_lock(&lli->lli_sa_lock);
/* stale entry */
if (unlikely(lli->lli_sai == NULL ||
* when statahead thread tries to enqueue lock on parent
* for readpage and other tries to enqueue lock on child
* with parent's lock held, for example: unlink. */
- entry->se_handle = it->d.lustre.it_lock_handle;
- ll_intent_drop_lock(it);
+ entry->se_handle = handle;
wakeup = sa_received_empty(sai);
list_add_tail(&entry->se_list,
&sai->sai_entries_received);
do_gettimeofday(&tv);
cfs_srand(tv.tv_sec ^ seed[0], tv.tv_usec ^ seed[1]);
-
- init_timer(&ll_capa_timer);
- ll_capa_timer.function = ll_capa_timer_callback;
+ setup_timer(&ll_capa_timer, ll_capa_timer_callback, 0);
rc = ll_capa_thread_start();
if (rc != 0)
goto out_proc;
{
.ckd_cache = &vvp_thread_kmem,
.ckd_name = "vvp_thread_kmem",
- .ckd_size = sizeof (struct vvp_thread_info),
+ .ckd_size = sizeof(struct vvp_thread_info),
},
{
.ckd_cache = &vvp_session_kmem,
.ckd_name = "vvp_session_kmem",
- .ckd_size = sizeof (struct vvp_session)
+ .ckd_size = sizeof(struct vvp_session)
},
{
.ckd_cache = NULL
struct lu_context_key *key, void *data)
{
struct vvp_thread_info *info = data;
+
OBD_SLAB_FREE_PTR(info, vvp_thread_kmem);
}
struct lu_context_key *key, void *data)
{
struct vvp_session *session = data;
+
OBD_SLAB_FREE_PTR(session, vvp_session_kmem);
}
id->vpi_index = pos & 0xffffffff;
id->vpi_depth = (pos >> PGC_DEPTH_SHIFT) & 0xf;
- id->vpi_bucket = ((unsigned long long)pos >> PGC_OBJ_SHIFT);
+ id->vpi_bucket = (unsigned long long)pos >> PGC_OBJ_SHIFT;
}
static loff_t vvp_pgcache_id_pack(struct vvp_pgcache_id *id)
xattr->xe_namelen);
goto err_name;
}
- xattr->xe_value = kzalloc(xattr_val_len, GFP_NOFS);
- if (!xattr->xe_value) {
- CDEBUG(D_CACHE, "failed to alloc xattr value %d\n",
- xattr_val_len);
+ xattr->xe_value = kmemdup(xattr_val, xattr_val_len, GFP_NOFS);
+ if (!xattr->xe_value)
goto err_value;
- }
- memcpy(xattr->xe_value, xattr_val, xattr_val_len);
xattr->xe_vallen = xattr_val_len;
list_add(&xattr->xe_list, cache);
mutex_lock(&lli->lli_xattrs_enq_lock);
- /* Try matching first. */
- mode = ll_take_md_lock(inode, MDS_INODELOCK_XATTR, &lockh, 0, LCK_PR);
- if (mode != 0) {
- /* fake oit in mdc_revalidate_lock() manner */
- oit->d.lustre.it_lock_handle = lockh.cookie;
- oit->d.lustre.it_lock_mode = mode;
- goto out;
+ /* inode may have been shrunk and recreated, so data is gone, match lock
+ * only when data exists. */
+ if (ll_xattr_cache_valid(lli)) {
+ /* Try matching first. */
+ mode = ll_take_md_lock(inode, MDS_INODELOCK_XATTR, &lockh, 0,
+ LCK_PR);
+ if (mode != 0) {
+ /* fake oit in mdc_revalidate_lock() manner */
+ oit->d.lustre.it_lock_handle = lockh.cookie;
+ oit->d.lustre.it_lock_mode = mode;
+ goto out;
+ }
}
/* Enqueue if the lock isn't cached locally. */
#include <asm/div64.h>
#include <linux/seq_file.h>
#include <linux/namei.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#include "../include/lustre/lustre_idl.h"
#include "../include/obd_support.h"
__u32 oldsize = 0;
while (newsize < index + 1)
- newsize = newsize << 1;
+ newsize <<= 1;
OBD_ALLOC(newtgts, sizeof(*newtgts) * newsize);
if (newtgts == NULL) {
lmv_init_unlock(lmv);
#include <linux/statfs.h>
#include "../include/lprocfs_status.h"
#include "../include/obd_class.h"
+#include "lmv_internal.h"
static int lmv_numobd_seq_show(struct seq_file *m, void *v)
{
LASSERT(dev != NULL);
desc = &dev->u.lmv.desc;
- return seq_printf(m, "%u\n", desc->ld_tgt_count);
+ seq_printf(m, "%u\n", desc->ld_tgt_count);
+ return 0;
}
LPROC_SEQ_FOPS_RO(lmv_numobd);
LASSERT(dev != NULL);
lmv = &dev->u.lmv;
- return seq_printf(m, "%s\n", placement_policy2name(lmv->lmv_placement));
+ seq_printf(m, "%s\n", placement_policy2name(lmv->lmv_placement));
+ return 0;
}
#define MAX_POLICY_STRING_SIZE 64
LASSERT(dev != NULL);
desc = &dev->u.lmv.desc;
- return seq_printf(m, "%u\n", desc->ld_active_tgt_count);
+ seq_printf(m, "%u\n", desc->ld_active_tgt_count);
+ return 0;
}
LPROC_SEQ_FOPS_RO(lmv_activeobd);
LASSERT(dev != NULL);
lmv = &dev->u.lmv;
- return seq_printf(m, "%s\n", lmv->desc.ld_uuid.uuid);
+ seq_printf(m, "%s\n", lmv->desc.ld_uuid.uuid);
+ return 0;
}
LPROC_SEQ_FOPS_RO(lmv_desc_uuid);
if (tgt == NULL)
return 0;
- return seq_printf(p, "%d: %s %sACTIVE\n", tgt->ltd_idx,
- tgt->ltd_uuid.uuid, tgt->ltd_active ? "" : "IN");
+ seq_printf(p, "%d: %s %sACTIVE\n",
+ tgt->ltd_idx, tgt->ltd_uuid.uuid,
+ tgt->ltd_active ? "" : "IN");
+ return 0;
}
static struct seq_operations lmv_tgt_sops = {
struct kmem_cache *lov_lock_link_kmem;
/** Lock class of lov_device::ld_mutex. */
-struct lock_class_key cl_lov_device_mutex_class;
+static struct lock_class_key cl_lov_device_mutex_class;
struct lu_kmem_descr lov_caches[] = {
{
return lsm_lmm_verify_common(lmm, lmm_bytes, *stripe_count);
}
-int lsm_unpackmd_v1(struct lov_obd *lov, struct lov_stripe_md *lsm,
- struct lov_mds_md_v1 *lmm)
+static int lsm_unpackmd_v1(struct lov_obd *lov, struct lov_stripe_md *lsm,
+ struct lov_mds_md_v1 *lmm)
{
struct lov_oinfo *loi;
int i;
ostid_le_to_cpu(&lmm->lmm_objects[i].l_ost_oi, &loi->loi_oi);
loi->loi_ost_idx = le32_to_cpu(lmm->lmm_objects[i].l_ost_idx);
loi->loi_ost_gen = le32_to_cpu(lmm->lmm_objects[i].l_ost_gen);
+ if (lov_oinfo_is_dummy(loi))
+ continue;
+
if (loi->loi_ost_idx >= lov->desc.ld_tgt_count) {
CERROR("OST index %d more than OST count %d\n",
loi->loi_ost_idx, lov->desc.ld_tgt_count);
*stripe_count);
}
-int lsm_unpackmd_v3(struct lov_obd *lov, struct lov_stripe_md *lsm,
- struct lov_mds_md *lmmv1)
+static int lsm_unpackmd_v3(struct lov_obd *lov, struct lov_stripe_md *lsm,
+ struct lov_mds_md *lmmv1)
{
struct lov_mds_md_v3 *lmm;
struct lov_oinfo *loi;
ostid_le_to_cpu(&lmm->lmm_objects[i].l_ost_oi, &loi->loi_oi);
loi->loi_ost_idx = le32_to_cpu(lmm->lmm_objects[i].l_ost_idx);
loi->loi_ost_gen = le32_to_cpu(lmm->lmm_objects[i].l_ost_gen);
+ if (lov_oinfo_is_dummy(loi))
+ continue;
+
if (loi->loi_ost_idx >= lov->desc.ld_tgt_count) {
CERROR("OST index %d more than OST count %d\n",
loi->loi_ost_idx, lov->desc.ld_tgt_count);
return lsm;
}
+static inline bool lov_oinfo_is_dummy(const struct lov_oinfo *loi)
+{
+ if (unlikely(loi->loi_oi.oi.oi_id == 0 &&
+ loi->loi_oi.oi.oi_seq == 0 &&
+ loi->loi_ost_idx == 0 &&
+ loi->loi_ost_gen == 0))
+ return true;
+
+ return false;
+}
+
+
#endif
LASSERT(sub->sub_env == NULL);
LASSERT(sub->sub_stripe < lio->lis_stripe_count);
+ if (unlikely(lov_r0(lov)->lo_sub[stripe] == NULL))
+ return -EIO;
+
result = 0;
sub->sub_io_initialized = 0;
sub->sub_borrowed = 0;
endpos, &start, &end))
continue;
- end = lov_offset_mod(end, +1);
+ if (unlikely(lov_r0(lio->lis_object)->lo_sub[stripe] == NULL)) {
+ if (ios->cis_io->ci_type == CIT_READ ||
+ ios->cis_io->ci_type == CIT_WRITE ||
+ ios->cis_io->ci_type == CIT_FAULT)
+ return -EIO;
+
+ continue;
+ }
+
+ end = lov_offset_mod(end, 1);
sub = lov_sub_get(env, lio, stripe);
if (!IS_ERR(sub)) {
lov_io_sub_inherit(sub->sub_io, lio, stripe,
break;
case CIT_FSYNC:
case CIT_SETATTR:
- result = +1;
+ result = 1;
break;
case CIT_WRITE:
result = -EBADF;
* XXX for wide striping smarter algorithm is desirable,
* breaking out of the loop, early.
*/
- if (lov_stripe_intersects(loo->lo_lsm, i,
+ if (likely(r0->lo_sub[i] != NULL) &&
+ lov_stripe_intersects(loo->lo_lsm, i,
file_start, file_end, &start, &end))
nr++;
}
* top-lock.
*/
for (i = 0, nr = 0; i < r0->lo_nr; ++i) {
- if (lov_stripe_intersects(loo->lo_lsm, i,
+ if (likely(r0->lo_sub[i] != NULL) &&
+ lov_stripe_intersects(loo->lo_lsm, i,
file_start, file_end, &start, &end)) {
struct cl_lock_descr *descr;
*/
start = cl_offset(&lov->lo_cl, descr->cld_start);
end = cl_offset(&lov->lo_cl, descr->cld_end + 1) - 1;
- result = end - start <= lsm->lsm_stripe_size &&
- stripe == lov_stripe_number(lsm, start) &&
- stripe == lov_stripe_number(lsm, end);
- if (result) {
+ result = 0;
+ /* glimpse should work on the object with LOV EA hole. */
+ if (end - start <= lsm->lsm_stripe_size) {
+ int idx;
+
+ idx = lov_stripe_number(lsm, start);
+ if (idx == stripe ||
+ unlikely(lov_r0(lov)->lo_sub[idx] == NULL)) {
+ idx = lov_stripe_number(lsm, end);
+ if (idx == stripe ||
+ unlikely(lov_r0(lov)->lo_sub[idx] == NULL))
+ result = 1;
+ }
+ }
+
+ if (result != 0) {
struct cl_lock_descr *subd = &lov_env_info(env)->lti_ldescr;
u64 sub_start;
u64 sub_end;
newsize = max_t(__u32, lov->lov_tgt_size, 2);
while (newsize < index + 1)
- newsize = newsize << 1;
+ newsize <<= 1;
OBD_ALLOC(newtgts, sizeof(*newtgts) * newsize);
if (newtgts == NULL) {
mutex_unlock(&lov->lov_lock);
}
for (i = 0; i < lsm->lsm_stripe_count; i++) {
- if (lsm->lsm_oinfo[i]->loi_ost_idx == ost_idx) {
- if (ostid_id(&lsm->lsm_oinfo[i]->loi_oi) !=
- ostid_id(&src_oa->o_oi)) {
+ struct lov_oinfo *loi = lsm->lsm_oinfo[i];
+
+ if (lov_oinfo_is_dummy(loi))
+ continue;
+
+ if (loi->loi_ost_idx == ost_idx) {
+ if (ostid_id(&loi->loi_oi) != ostid_id(&src_oa->o_oi)) {
rc = -EINVAL;
goto out;
}
struct lov_stripe_md submd;
struct lov_oinfo *loi = lsm->lsm_oinfo[i];
+ if (lov_oinfo_is_dummy(loi))
+ continue;
+
if (!lov->lov_tgts[loi->loi_ost_idx]) {
- CDEBUG(D_HA, "lov idx %d NULL \n", loi->loi_ost_idx);
+ CDEBUG(D_HA, "lov idx %d NULL\n", loi->loi_ost_idx);
continue;
}
+
submd.lsm_oi = loi->loi_oi;
submd.lsm_stripe_count = 0;
rc = obd_find_cbdata(lov->lov_tgts[loi->loi_ost_idx]->ltd_exp,
* \param fm_end logical end of mapping
* \param start_stripe starting stripe will be returned in this
*/
-u64 fiemap_calc_fm_end_offset(struct ll_user_fiemap *fiemap,
- struct lov_stripe_md *lsm, u64 fm_start,
- u64 fm_end, int *start_stripe)
+static u64 fiemap_calc_fm_end_offset(struct ll_user_fiemap *fiemap,
+ struct lov_stripe_md *lsm, u64 fm_start,
+ u64 fm_end, int *start_stripe)
{
u64 local_end = fiemap->fm_extents[0].fe_logical;
u64 lun_start, lun_end;
/* Find out stripe_no from ost_index saved in the fe_device */
for (i = 0; i < lsm->lsm_stripe_count; i++) {
- if (lsm->lsm_oinfo[i]->loi_ost_idx ==
- fiemap->fm_extents[0].fe_device) {
+ struct lov_oinfo *oinfo = lsm->lsm_oinfo[i];
+
+ if (lov_oinfo_is_dummy(oinfo))
+ continue;
+
+ if (oinfo->loi_ost_idx == fiemap->fm_extents[0].fe_device) {
stripe_no = i;
break;
}
*
* \retval last_stripe return the last stripe of the mapping
*/
-int fiemap_calc_last_stripe(struct lov_stripe_md *lsm, u64 fm_start,
- u64 fm_end, int start_stripe,
- int *stripe_count)
+static int fiemap_calc_last_stripe(struct lov_stripe_md *lsm, u64 fm_start,
+ u64 fm_end, int start_stripe,
+ int *stripe_count)
{
int last_stripe;
u64 obd_start, obd_end;
int i, j;
if (fm_end - fm_start > lsm->lsm_stripe_size * lsm->lsm_stripe_count) {
- last_stripe = (start_stripe < 1 ? lsm->lsm_stripe_count - 1 :
- start_stripe - 1);
+ last_stripe = start_stripe < 1 ? lsm->lsm_stripe_count - 1 :
+ start_stripe - 1;
*stripe_count = lsm->lsm_stripe_count;
} else {
for (j = 0, i = start_stripe; j < lsm->lsm_stripe_count;
* \param ext_count number of extents to be copied
* \param current_extent where to start copying in main extent array
*/
-void fiemap_prepare_and_copy_exts(struct ll_user_fiemap *fiemap,
- struct ll_fiemap_extent *lcl_fm_ext,
- int ost_index, unsigned int ext_count,
- int current_extent)
+static void fiemap_prepare_and_copy_exts(struct ll_user_fiemap *fiemap,
+ struct ll_fiemap_extent *lcl_fm_ext,
+ int ost_index, unsigned int ext_count,
+ int current_extent)
{
char *to;
int ext;
&lun_start, &obd_object_end)) == 0)
continue;
+ if (lov_oinfo_is_dummy(lsm->lsm_oinfo[cur_stripe])) {
+ rc = -EIO;
+ goto out;
+ }
+
/* If this is a continuation FIEMAP call and we are on
* starting stripe then lun_start needs to be set to
* fm_end_offset */
* be NULL and won't match the lock's export. */
for (i = 0; i < lsm->lsm_stripe_count; i++) {
loi = lsm->lsm_oinfo[i];
+ if (lov_oinfo_is_dummy(loi))
+ continue;
+
if (!lov->lov_tgts[loi->loi_ost_idx])
continue;
if (lov->lov_tgts[loi->loi_ost_idx]->ltd_exp ==
return rc;
}
-struct obd_ops lov_obd_ops = {
+static struct obd_ops lov_obd_ops = {
.o_owner = THIS_MODULE,
.o_setup = lov_setup,
.o_precleanup = lov_precleanup,
struct kmem_cache *lov_oinfo_slab;
-int __init lov_init(void)
+static int __init lov_init(void)
{
struct lprocfs_static_vars lvars = { NULL };
int rc;
#define DEBUG_SUBSYSTEM S_LOV
#include "lov_cl_internal.h"
+#include "../include/lclient.h"
/** \addtogroup lov
* @{
struct lov_oinfo *oinfo = lsm->lsm_oinfo[i];
int ost_idx = oinfo->loi_ost_idx;
+ if (lov_oinfo_is_dummy(oinfo))
+ continue;
+
result = ostid_to_fid(ofid, &oinfo->loi_oi,
oinfo->loi_ost_idx);
if (result != 0)
/**
* Return lov_layout_type associated with a given lsm
*/
-enum lov_layout_type lov_type(struct lov_stripe_md *lsm)
+static enum lov_layout_type lov_type(struct lov_stripe_md *lsm)
{
if (lsm == NULL)
return LLT_EMPTY;
LASSERT(lsm != NULL);
for (i = 0; i < lsm->lsm_stripe_count; i++) {
struct lov_oinfo *loi = lsm->lsm_oinfo[i];
+
+ if (lov_oinfo_is_dummy(loi))
+ continue;
+
if (loi->loi_ar.ar_rc && !rc)
rc = loi->loi_ar.ar_rc;
loi->loi_ar.ar_rc = 0;
}
}
-void lov_pool_putref_locked(struct pool_desc *pool)
+static void lov_pool_putref_locked(struct pool_desc *pool)
{
CDEBUG(D_INFO, "pool %p\n", pool);
LASSERT(atomic_read(&pool->pool_refcount) > 1);
struct lov_request *req;
loi = oinfo->oi_md->lsm_oinfo[i];
+ if (lov_oinfo_is_dummy(loi))
+ continue;
+
if (!lov_check_and_wait_active(lov, loi->loi_ost_idx)) {
CDEBUG(D_HA, "lov idx %d inactive\n", loi->loi_ost_idx);
if (oinfo->oi_oa->o_valid & OBD_MD_FLEPOCH) {
struct lov_request *req;
loi = lsm->lsm_oinfo[i];
+ if (lov_oinfo_is_dummy(loi))
+ continue;
+
if (!lov_check_and_wait_active(lov, loi->loi_ost_idx)) {
CDEBUG(D_HA, "lov idx %d inactive\n", loi->loi_ost_idx);
continue;
struct lov_oinfo *loi = oinfo->oi_md->lsm_oinfo[i];
struct lov_request *req;
+ if (lov_oinfo_is_dummy(loi))
+ continue;
+
if (!lov_check_and_wait_active(lov, loi->loi_ost_idx)) {
CDEBUG(D_HA, "lov idx %d inactive\n", loi->loi_ost_idx);
continue;
*/
#define DEBUG_SUBSYSTEM S_CLASS
-#include <asm/statfs.h>
+#include <linux/statfs.h>
#include "../include/lprocfs_status.h"
#include "../include/obd_class.h"
#include <linux/seq_file.h>
LASSERT(dev != NULL);
desc = &dev->u.lov.desc;
- return seq_printf(m, "%llu\n", desc->ld_default_stripe_size);
+ seq_printf(m, "%llu\n", desc->ld_default_stripe_size);
+ return 0;
}
static ssize_t lov_stripesize_seq_write(struct file *file,
LASSERT(dev != NULL);
desc = &dev->u.lov.desc;
- return seq_printf(m, "%llu\n", desc->ld_default_stripe_offset);
+ seq_printf(m, "%llu\n", desc->ld_default_stripe_offset);
+ return 0;
}
static ssize_t lov_stripeoffset_seq_write(struct file *file,
LASSERT(dev != NULL);
desc = &dev->u.lov.desc;
- return seq_printf(m, "%u\n", desc->ld_pattern);
+ seq_printf(m, "%u\n", desc->ld_pattern);
+ return 0;
}
static ssize_t lov_stripetype_seq_write(struct file *file,
LASSERT(dev != NULL);
desc = &dev->u.lov.desc;
- return seq_printf(m, "%d\n",
- (__s16)(desc->ld_default_stripe_count + 1) - 1);
+ seq_printf(m, "%d\n", (__s16)(desc->ld_default_stripe_count + 1) - 1);
+ return 0;
}
static ssize_t lov_stripecount_seq_write(struct file *file,
LASSERT(dev != NULL);
desc = &dev->u.lov.desc;
- return seq_printf(m, "%u\n", desc->ld_tgt_count);
+ seq_printf(m, "%u\n", desc->ld_tgt_count);
+ return 0;
}
LPROC_SEQ_FOPS_RO(lov_numobd);
LASSERT(dev != NULL);
desc = &dev->u.lov.desc;
- return seq_printf(m, "%u\n", desc->ld_active_tgt_count);
+ seq_printf(m, "%u\n", desc->ld_active_tgt_count);
+ return 0;
}
LPROC_SEQ_FOPS_RO(lov_activeobd);
LASSERT(dev != NULL);
lov = &dev->u.lov;
- return seq_printf(m, "%s\n", lov->desc.ld_uuid.uuid);
+ seq_printf(m, "%s\n", lov->desc.ld_uuid.uuid);
+ return 0;
}
LPROC_SEQ_FOPS_RO(lov_desc_uuid);
static int lov_tgt_seq_show(struct seq_file *p, void *v)
{
struct lov_tgt_desc *tgt = v;
- return seq_printf(p, "%d: %s %sACTIVE\n", tgt->ltd_index,
- obd_uuid2str(&tgt->ltd_uuid),
- tgt->ltd_active ? "" : "IN");
+
+ seq_printf(p, "%d: %s %sACTIVE\n",
+ tgt->ltd_index, obd_uuid2str(&tgt->ltd_uuid),
+ tgt->ltd_active ? "" : "IN");
+ return 0;
}
-struct seq_operations lov_tgt_sops = {
+static const struct seq_operations lov_tgt_sops = {
.start = lov_tgt_seq_start,
.stop = lov_tgt_seq_stop,
.next = lov_tgt_seq_next,
LPROC_SEQ_FOPS_RO_TYPE(lov, kbytesfree);
LPROC_SEQ_FOPS_RO_TYPE(lov, kbytesavail);
-struct lprocfs_vars lprocfs_lov_obd_vars[] = {
+static struct lprocfs_vars lprocfs_lov_obd_vars[] = {
{ "uuid", &lov_uuid_fops, NULL, 0 },
{ "stripesize", &lov_stripesize_fops, NULL },
{ "stripeoffset", &lov_stripeoffset_fops, NULL },
#include <linux/vfs.h>
#include "../include/obd_class.h"
#include "../include/lprocfs_status.h"
+#include "mdc_internal.h"
static int mdc_max_rpcs_in_flight_seq_show(struct seq_file *m, void *v)
{
struct obd_device *dev = m->private;
struct client_obd *cli = &dev->u.cli;
- int rc;
client_obd_list_lock(&cli->cl_loi_list_lock);
- rc = seq_printf(m, "%u\n", cli->cl_max_rpcs_in_flight);
+ seq_printf(m, "%u\n", cli->cl_max_rpcs_in_flight);
client_obd_list_unlock(&cli->cl_loi_list_lock);
- return rc;
+
+ return 0;
}
static ssize_t mdc_max_rpcs_in_flight_seq_write(struct file *file,
return -EPROTO;
acl = posix_acl_from_xattr(&init_user_ns, buf, body->aclsize);
+ if (acl == NULL)
+ return 0;
+
if (IS_ERR(acl)) {
rc = PTR_ERR(acl);
CERROR("convert xattr to acl: %d\n", rc);
static int __init mdc_init(void)
{
- int rc;
struct lprocfs_static_vars lvars = { NULL };
lprocfs_mdc_init_vars(&lvars);
- rc = class_register_type(&mdc_obd_ops, &mdc_md_ops, lvars.module_vars,
+ return class_register_type(&mdc_obd_ops, &mdc_md_ops, lvars.module_vars,
LUSTRE_MDC_NAME, NULL);
- return rc;
}
static void /*__exit*/ mdc_exit(void)
}
EXPORT_SYMBOL(mgc_fsname2resid);
-int mgc_logname2resid(char *logname, struct ldlm_res_id *res_id, int type)
+static int mgc_logname2resid(char *logname, struct ldlm_res_id *res_id, int type)
{
char *name_end;
int len;
{
struct config_llog_data *cld;
struct config_llog_data *found = NULL;
- void * instance;
+ void *instance;
LASSERT(logname != NULL);
int lprocfs_mgc_rd_ir_state(struct seq_file *m, void *data)
{
struct obd_device *obd = data;
- struct obd_import *imp = obd->u.cli.cl_import;
- struct obd_connect_data *ocd = &imp->imp_connect_data;
+ struct obd_import *imp;
+ struct obd_connect_data *ocd;
struct config_llog_data *cld;
+ LPROCFS_CLIMP_CHECK(obd);
+ imp = obd->u.cli.cl_import;
+ ocd = &imp->imp_connect_data;
+
seq_printf(m, "imperative_recovery: %s\n",
OCD_HAS_FLAG(ocd, IMP_RECOV) ? "ENABLED" : "DISABLED");
seq_printf(m, "client_state:\n");
}
spin_unlock(&config_list_lock);
+ LPROCFS_CLIMP_EXIT(obd);
return 0;
}
#endif
#define RQ_NOW 0x2
#define RQ_LATER 0x4
#define RQ_STOP 0x8
-static int rq_state = 0;
+#define RQ_PRECLEANUP 0x10
+static int rq_state;
static wait_queue_head_t rq_waitq;
static DECLARE_COMPLETION(rq_exit);
+static DECLARE_COMPLETION(rq_start);
static void do_requeue(struct config_llog_data *cld)
{
static int mgc_requeue_thread(void *data)
{
+ bool first = true;
+
CDEBUG(D_MGC, "Starting requeue thread\n");
/* Keep trying failed locks periodically */
rq_state &= ~(RQ_NOW | RQ_LATER);
spin_unlock(&config_list_lock);
+ if (first) {
+ first = false;
+ complete(&rq_start);
+ }
+
/* Always wait a few seconds to allow the server who
caused the lock revocation to finish its setup, plus some
random so everyone doesn't try to reconnect at once. */
to = MGC_TIMEOUT_MIN_SECONDS * HZ;
to += rand * HZ / 100; /* rand is centi-seconds */
lwi = LWI_TIMEOUT(to, NULL, NULL);
- l_wait_event(rq_waitq, rq_state & RQ_STOP, &lwi);
+ l_wait_event(rq_waitq, rq_state & (RQ_STOP | RQ_PRECLEANUP),
+ &lwi);
/*
* iterate & processing through the list. for each cld, process
cld_prev = NULL;
spin_lock(&config_list_lock);
+ rq_state &= ~RQ_PRECLEANUP;
list_for_each_entry(cld, &config_llog_list,
cld_list_chain) {
if (!cld->cld_lostlock)
static int mgc_precleanup(struct obd_device *obd, enum obd_cleanup_stage stage)
{
int rc = 0;
+ int temp;
switch (stage) {
case OBD_CLEANUP_EARLY:
break;
case OBD_CLEANUP_EXPORTS:
if (atomic_dec_and_test(&mgc_count)) {
- int running;
+ LASSERT(rq_state & RQ_RUNNING);
/* stop requeue thread */
- spin_lock(&config_list_lock);
- running = rq_state & RQ_RUNNING;
- if (running)
- rq_state |= RQ_STOP;
- spin_unlock(&config_list_lock);
- if (running) {
- wake_up(&rq_waitq);
- wait_for_completion(&rq_exit);
- }
+ temp = RQ_STOP;
+ } else {
+ /* wakeup requeue thread to clean our cld */
+ temp = RQ_NOW | RQ_PRECLEANUP;
}
+ spin_lock(&config_list_lock);
+ rq_state |= temp;
+ spin_unlock(&config_list_lock);
+ wake_up(&rq_waitq);
+ if (temp & RQ_STOP)
+ wait_for_completion(&rq_exit);
obd_cleanup_client_import(obd);
rc = mgc_llog_fini(NULL, obd);
if (rc != 0)
static int mgc_cleanup(struct obd_device *obd)
{
- int rc;
-
/* COMPAT_146 - old config logs may have added profiles we don't
know about */
if (obd->obd_type->typ_refcnt <= 1)
lprocfs_obd_cleanup(obd);
ptlrpcd_decref();
- rc = client_obd_cleanup(obd);
- return rc;
+ return client_obd_cleanup(obd);
}
static int mgc_setup(struct obd_device *obd, struct lustre_cfg *lcfg)
}
/* rc is the task_struct pointer of mgc_requeue_thread. */
rc = 0;
+ wait_for_completion(&rq_start);
}
return rc;
return rc;
}
-int mgc_set_info_async(const struct lu_env *env, struct obd_export *exp,
+static int mgc_set_info_async(const struct lu_env *env, struct obd_export *exp,
u32 keylen, void *key, u32 vallen,
void *val, struct ptlrpc_request_set *set)
{
.o_process_config = mgc_process_config,
};
-int __init mgc_init(void)
+static int __init mgc_init(void)
{
return class_register_type(&mgc_obd_ops, NULL, NULL,
LUSTRE_MGC_NAME, NULL);
return err;
} /* class_handle_ioctl */
-extern struct miscdevice obd_psdev;
-
#define OBD_INIT_CHECK
int obd_init_checks(void)
{
return ret;
}
-extern spinlock_t obd_types_lock;
#if defined (CONFIG_PROC_FS)
extern int class_procfs_init(void);
extern int class_procfs_clean(void);
/* dt class init function. */
int dt_global_init(void)
{
- int result;
-
LU_CONTEXT_KEY_INIT(&dt_key);
- result = lu_context_key_register(&dt_key);
- return result;
+ return lu_context_key_register(&dt_key);
}
void dt_global_fini(void)
#include "../include/obd_class.h"
#include "../include/lprocfs_status.h"
-extern struct list_head obd_types;
spinlock_t obd_types_lock;
struct kmem_cache *obd_device_cachep;
struct kmem_cache *obdo_cachep;
EXPORT_SYMBOL(obdo_cachep);
-struct kmem_cache *import_cachep;
+static struct kmem_cache *import_cachep;
-struct list_head obd_zombie_imports;
-struct list_head obd_zombie_exports;
-spinlock_t obd_zombie_impexp_lock;
+static struct list_head obd_zombie_imports;
+static struct list_head obd_zombie_exports;
+static spinlock_t obd_zombie_impexp_lock;
static void obd_zombie_impexp_notify(void);
static void obd_zombie_export_add(struct obd_export *exp);
static void obd_zombie_import_add(struct obd_import *imp);
EXPORT_SYMBOL(class_unlink_export);
/* Import management functions */
-void class_import_destroy(struct obd_import *imp)
+static void class_import_destroy(struct obd_import *imp)
{
CDEBUG(D_IOCTL, "destroying import %p for %s\n", imp,
imp->imp_obd->obd_name);
EXPORT_SYMBOL(class_connect);
/* if export is involved in recovery then clean up related things */
-void class_export_recovery_cleanup(struct obd_export *exp)
+static void class_export_recovery_cleanup(struct obd_export *exp)
{
struct obd_device *obd = exp->exp_obd;
if (exp) {
int connected;
spin_lock(&exp->exp_lock);
- connected = (exp->exp_conn_cnt > 0);
+ connected = exp->exp_conn_cnt > 0;
spin_unlock(&exp->exp_lock);
return connected;
}
EXPORT_SYMBOL(obd_exports_barrier);
/* Total amount of zombies to be destroyed */
-static int zombies_count = 0;
+static int zombies_count;
/**
* kill zombie imports and exports
#if defined (CONFIG_PROC_FS)
-int obd_proc_version_seq_show(struct seq_file *m, void *v)
+static int obd_proc_version_seq_show(struct seq_file *m, void *v)
{
- return seq_printf(m, "lustre: %s\nkernel: %s\nbuild: %s\n",
- LUSTRE_VERSION_STRING, "patchless_client",
- BUILD_VERSION);
+ seq_printf(m, "lustre: %s\nkernel: %s\nbuild: %s\n",
+ LUSTRE_VERSION_STRING, "patchless_client", BUILD_VERSION);
+ return 0;
}
LPROC_SEQ_FOPS_RO(obd_proc_version);
int obd_proc_pinger_seq_show(struct seq_file *m, void *v)
{
- return seq_printf(m, "%s\n", "on");
+ seq_printf(m, "%s\n", "on");
+ return 0;
}
LPROC_SEQ_FOPS_RO(obd_proc_pinger);
static int obd_proc_health_seq_show(struct seq_file *m, void *v)
{
- int rc = 0, i;
+ bool healthy = true;
+ int i;
if (libcfs_catastrophe)
seq_printf(m, "LBUG\n");
if (obd_health_check(NULL, obd)) {
seq_printf(m, "device %s reported unhealthy\n",
- obd->obd_name);
- rc++;
+ obd->obd_name);
+ healthy = false;
}
class_decref(obd, __func__, current);
read_lock(&obd_dev_lock);
}
read_unlock(&obd_dev_lock);
- if (rc == 0)
- return seq_printf(m, "healthy\n");
+ if (healthy)
+ seq_puts(m, "healthy\n");
+ else
+ seq_puts(m, "NOT HEALTHY\n");
- seq_printf(m, "NOT HEALTHY\n");
return 0;
}
LPROC_SEQ_FOPS_RO(obd_proc_health);
static int obd_proc_jobid_var_seq_show(struct seq_file *m, void *v)
{
- return seq_printf(m, "%s\n", obd_jobid_var);
+ seq_printf(m, "%s\n", obd_jobid_var);
+ return 0;
}
static ssize_t obd_proc_jobid_var_seq_write(struct file *file,
static int obd_proc_jobid_name_seq_show(struct seq_file *m, void *v)
{
- return seq_printf(m, "%s\n", obd_jobid_var);
+ seq_printf(m, "%s\n", obd_jobid_var);
+ return 0;
}
static ssize_t obd_proc_jobid_name_seq_write(struct file *file,
else
status = "--";
- return seq_printf(p, "%3d %s %s %s %s %d\n",
- (int)index, status, obd->obd_type->typ_name,
- obd->obd_name, obd->obd_uuid.uuid,
- atomic_read(&obd->obd_refcount));
+ seq_printf(p, "%3d %s %s %s %s %d\n",
+ (int)index, status, obd->obd_type->typ_name,
+ obd->obd_name, obd->obd_uuid.uuid,
+ atomic_read(&obd->obd_refcount));
+ return 0;
}
struct seq_operations obd_device_list_sops = {
};
+#ifdef CONFIG_SYSCTL
static int proc_set_timeout(struct ctl_table *table, int write,
void __user *buffer, size_t *lenp, loff_t *ppos)
{
CERROR("Refusing to set max dirty pages to %u, which is more than 90%% of available RAM; setting to %lu\n",
obd_max_dirty_pages,
((totalram_pages / 10) * 9));
- obd_max_dirty_pages = ((totalram_pages / 10) * 9);
+ obd_max_dirty_pages = (totalram_pages / 10) * 9;
} else if (obd_max_dirty_pages < 4 << (20 - PAGE_CACHE_SHIFT)) {
obd_max_dirty_pages = 4 << (20 - PAGE_CACHE_SHIFT);
}
return rc;
}
-#ifdef CONFIG_SYSCTL
static struct ctl_table obd_table[] = {
{
.procname = "timeout",
}
EXPORT_SYMBOL(llog_cat_cancel_records);
-int llog_cat_process_cb(const struct lu_env *env, struct llog_handle *cat_llh,
- struct llog_rec_hdr *rec, void *data)
+static int llog_cat_process_cb(const struct lu_env *env,
+ struct llog_handle *cat_llh,
+ struct llog_rec_hdr *rec, void *data)
{
struct llog_process_data *d = data;
struct llog_logid_rec *lir = (struct llog_logid_rec *)rec;
}
EXPORT_SYMBOL(llog_cat_reverse_process);
-int llog_cat_set_first_idx(struct llog_handle *cathandle, int index)
+static int llog_cat_set_first_idx(struct llog_handle *cathandle, int index)
{
struct llog_log_hdr *llh = cathandle->lgh_hdr;
int i, bitmap_size, idx;
return rc;
}
-int cat_cancel_cb(const struct lu_env *env, struct llog_handle *cathandle,
+static int cat_cancel_cb(const struct lu_env *env, struct llog_handle *cathandle,
struct llog_rec_hdr *rec, void *data)
{
struct llog_logid_rec *lir = (struct llog_logid_rec *)rec;
return rc;
}
-EXPORT_SYMBOL(cat_cancel_cb);
/* helper to initialize catalog llog and process it to cancel */
int llog_cat_init_and_process(const struct lu_env *env,
#if defined (CONFIG_PROC_FS)
-static int lprocfs_no_percpu_stats = 0;
+static int lprocfs_no_percpu_stats;
module_param(lprocfs_no_percpu_stats, int, 0644);
MODULE_PARM_DESC(lprocfs_no_percpu_stats, "Do not alloc percpu data for lprocfs stats");
/* Generic callbacks */
int lprocfs_rd_uint(struct seq_file *m, void *data)
{
- return seq_printf(m, "%u\n", *(unsigned int *)data);
+ seq_printf(m, "%u\n", *(unsigned int *)data);
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_uint);
int lprocfs_rd_u64(struct seq_file *m, void *data)
{
- return seq_printf(m, "%llu\n", *(__u64 *)data);
+ seq_printf(m, "%llu\n", *(__u64 *)data);
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_u64);
{
atomic_t *atom = data;
LASSERT(atom != NULL);
- return seq_printf(m, "%d\n", atomic_read(atom));
+ seq_printf(m, "%d\n", atomic_read(atom));
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_atomic);
struct obd_device *obd = data;
LASSERT(obd != NULL);
- return seq_printf(m, "%s\n", obd->obd_uuid.uuid);
+ seq_printf(m, "%s\n", obd->obd_uuid.uuid);
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_uuid);
struct obd_device *dev = data;
LASSERT(dev != NULL);
- return seq_printf(m, "%s\n", dev->obd_name);
+ seq_printf(m, "%s\n", dev->obd_name);
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_name);
cfs_time_shift_64(-OBD_STATFS_CACHE_SECONDS),
OBD_STATFS_NODELAY);
if (!rc)
- rc = seq_printf(m, "%u\n", osfs.os_bsize);
+ seq_printf(m, "%u\n", osfs.os_bsize);
+
return rc;
}
EXPORT_SYMBOL(lprocfs_rd_blksize);
while (blk_size >>= 1)
result <<= 1;
- rc = seq_printf(m, "%llu\n", result);
+ seq_printf(m, "%llu\n", result);
}
+
return rc;
}
EXPORT_SYMBOL(lprocfs_rd_kbytestotal);
while (blk_size >>= 1)
result <<= 1;
- rc = seq_printf(m, "%llu\n", result);
+ seq_printf(m, "%llu\n", result);
}
+
return rc;
}
EXPORT_SYMBOL(lprocfs_rd_kbytesfree);
while (blk_size >>= 1)
result <<= 1;
- rc = seq_printf(m, "%llu\n", result);
+ seq_printf(m, "%llu\n", result);
}
+
return rc;
}
EXPORT_SYMBOL(lprocfs_rd_kbytesavail);
cfs_time_shift_64(-OBD_STATFS_CACHE_SECONDS),
OBD_STATFS_NODELAY);
if (!rc)
- rc = seq_printf(m, "%llu\n", osfs.os_files);
+ seq_printf(m, "%llu\n", osfs.os_files);
return rc;
}
cfs_time_shift_64(-OBD_STATFS_CACHE_SECONDS),
OBD_STATFS_NODELAY);
if (!rc)
- rc = seq_printf(m, "%llu\n", osfs.os_ffree);
+ seq_printf(m, "%llu\n", osfs.os_ffree);
+
return rc;
}
EXPORT_SYMBOL(lprocfs_rd_filesfree);
struct obd_device *obd = data;
struct obd_import *imp;
char *imp_state_name = NULL;
- int rc = 0;
LASSERT(obd != NULL);
LPROCFS_CLIMP_CHECK(obd);
imp = obd->u.cli.cl_import;
imp_state_name = ptlrpc_import_state_name(imp->imp_state);
- rc = seq_printf(m, "%s\t%s%s\n", obd2cli_tgt(obd), imp_state_name,
- imp->imp_deactive ? "\tDEACTIVATED" : "");
+ seq_printf(m, "%s\t%s%s\n",
+ obd2cli_tgt(obd), imp_state_name,
+ imp->imp_deactive ? "\tDEACTIVATED" : "");
LPROCFS_CLIMP_EXIT(obd);
- return rc;
+
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_server_uuid);
{
struct obd_device *obd = data;
struct ptlrpc_connection *conn;
- int rc = 0;
LASSERT(obd != NULL);
LPROCFS_CLIMP_CHECK(obd);
conn = obd->u.cli.cl_import->imp_connection;
if (conn && obd->u.cli.cl_import)
- rc = seq_printf(m, "%s\n", conn->c_remote_uuid.uuid);
+ seq_printf(m, "%s\n", conn->c_remote_uuid.uuid);
else
- rc = seq_printf(m, "%s\n", "<none>");
+ seq_puts(m, "<none>\n");
LPROCFS_CLIMP_EXIT(obd);
- return rc;
+
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_conn_uuid);
struct obd_device *obd = data;
LASSERT(obd != NULL);
- return seq_printf(m, "%u\n", obd->obd_num_exports);
+ seq_printf(m, "%u\n", obd->obd_num_exports);
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_num_exports);
struct obd_type *class = (struct obd_type *) data;
LASSERT(class != NULL);
- return seq_printf(m, "%d\n", class->typ_refcnt);
+ seq_printf(m, "%d\n", class->typ_refcnt);
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_numrefs);
struct lprocfs_counter_header *hdr;
struct lprocfs_counter ctr;
int idx = *(loff_t *)v;
- int rc = 0;
if (idx == 0) {
struct timeval now;
do_gettimeofday(&now);
- rc = seq_printf(p, "%-25s %lu.%lu secs.usecs\n",
- "snapshot_time", now.tv_sec, (unsigned long)now.tv_usec);
- if (rc < 0)
- return rc;
+ seq_printf(p, "%-25s %lu.%lu secs.usecs\n",
+ "snapshot_time",
+ now.tv_sec, (unsigned long)now.tv_usec);
}
+
hdr = &stats->ls_cnt_header[idx];
lprocfs_stats_collect(stats, idx, &ctr);
- if (ctr.lc_count == 0)
- goto out;
-
- rc = seq_printf(p, "%-25s %lld samples [%s]", hdr->lc_name,
- ctr.lc_count, hdr->lc_units);
+ if (ctr.lc_count != 0) {
+ seq_printf(p, "%-25s %lld samples [%s]",
+ hdr->lc_name, ctr.lc_count, hdr->lc_units);
- if (rc < 0)
- goto out;
-
- if ((hdr->lc_config & LPROCFS_CNTR_AVGMINMAX) && (ctr.lc_count > 0)) {
- rc = seq_printf(p, " %lld %lld %lld",
- ctr.lc_min, ctr.lc_max, ctr.lc_sum);
- if (rc < 0)
- goto out;
- if (hdr->lc_config & LPROCFS_CNTR_STDDEV)
- rc = seq_printf(p, " %lld", ctr.lc_sumsquare);
- if (rc < 0)
- goto out;
+ if ((hdr->lc_config & LPROCFS_CNTR_AVGMINMAX) &&
+ (ctr.lc_count > 0)) {
+ seq_printf(p, " %lld %lld %lld",
+ ctr.lc_min, ctr.lc_max, ctr.lc_sum);
+ if (hdr->lc_config & LPROCFS_CNTR_STDDEV)
+ seq_printf(p, " %lld", ctr.lc_sumsquare);
+ }
+ seq_putc(p, '\n');
}
- rc = seq_printf(p, "\n");
-out:
- return (rc < 0) ? rc : 0;
+
+ return 0;
}
static const struct seq_operations lprocfs_stats_seq_sops = {
int lprocfs_nid_stats_clear_read(struct seq_file *m, void *data)
{
- return seq_printf(m, "%s\n",
- "Write into this file to clear all nid stats and stale nid entries");
+ seq_printf(m, "%s\n",
+ "Write into this file to clear all nid stats and stale nid entries");
+ return 0;
}
EXPORT_SYMBOL(lprocfs_nid_stats_clear_read);
{
struct obd_device *dev = data;
struct client_obd *cli = &dev->u.cli;
- int rc;
client_obd_list_lock(&cli->cl_loi_list_lock);
- rc = seq_printf(m, "%d\n", cli->cl_max_pages_per_rpc);
+ seq_printf(m, "%d\n", cli->cl_max_pages_per_rpc);
client_obd_list_unlock(&cli->cl_loi_list_lock);
- return rc;
+
+ return 0;
}
EXPORT_SYMBOL(lprocfs_obd_rd_max_pages_per_rpc);
* lu_context_refill(). No locking is provided, as initialization and shutdown
* are supposed to be externally serialized.
*/
-static unsigned key_set_version = 0;
+static unsigned key_set_version;
/**
* Register new key.
int lu_env_refill_by_tags(struct lu_env *env, __u32 ctags,
__u32 stags)
{
- int result;
-
if ((env->le_ctx.lc_tags & ctags) != ctags) {
env->le_ctx.lc_version = 0;
env->le_ctx.lc_tags |= ctags;
env->le_ses->lc_tags |= stags;
}
- result = lu_env_refill(env);
-
- return result;
+ return lu_env_refill(env);
}
EXPORT_SYMBOL(lu_env_refill_by_tags);
memset(&stats, 0, sizeof(stats));
lu_site_stats_get(s->ls_obj_hash, &stats, 1);
- return seq_printf(m, "%d/%d %d/%d %d %d %d %d %d %d %d\n",
- stats.lss_busy,
- stats.lss_total,
- stats.lss_populated,
- CFS_HASH_NHLIST(s->ls_obj_hash),
- stats.lss_max_search,
- ls_stats_read(s->ls_stats, LU_SS_CREATED),
- ls_stats_read(s->ls_stats, LU_SS_CACHE_HIT),
- ls_stats_read(s->ls_stats, LU_SS_CACHE_MISS),
- ls_stats_read(s->ls_stats, LU_SS_CACHE_RACE),
- ls_stats_read(s->ls_stats, LU_SS_CACHE_DEATH_RACE),
- ls_stats_read(s->ls_stats, LU_SS_LRU_PURGED));
+ seq_printf(m, "%d/%d %d/%d %d %d %d %d %d %d %d\n",
+ stats.lss_busy,
+ stats.lss_total,
+ stats.lss_populated,
+ CFS_HASH_NHLIST(s->ls_obj_hash),
+ stats.lss_max_search,
+ ls_stats_read(s->ls_stats, LU_SS_CREATED),
+ ls_stats_read(s->ls_stats, LU_SS_CACHE_HIT),
+ ls_stats_read(s->ls_stats, LU_SS_CACHE_MISS),
+ ls_stats_read(s->ls_stats, LU_SS_CACHE_RACE),
+ ls_stats_read(s->ls_stats, LU_SS_CACHE_DEATH_RACE),
+ ls_stats_read(s->ls_stats, LU_SS_LRU_PURGED));
+ return 0;
}
EXPORT_SYMBOL(lu_site_stats_print);
}
/*** SERVER NAME ***
- * <FSNAME><SEPERATOR><TYPE><INDEX>
+ * <FSNAME><SEPARATOR><TYPE><INDEX>
* FSNAME is between 1 and 8 characters (inclusive).
* Excluded characters are '/' and ':'
- * SEPERATOR is either ':' or '-'
+ * SEPARATOR is either ':' or '-'
* TYPE: "OST", "MDT", etc.
* INDEX: Hex representation of the index
*/
return mount_nodev(fs_type, flags, &lmd2, lustre_fill_super);
}
-void lustre_kill_super(struct super_block *sb)
+static void lustre_kill_super(struct super_block *sb)
{
struct lustre_sb_info *lsi = s2lsi(sb);
static inline struct echo_thread_info *echo_env_info(const struct lu_env *env)
{
struct echo_thread_info *info;
+
info = lu_context_key_get(&env->le_ctx, &echo_thread_key);
LASSERT(info != NULL);
return info;
{
.ckd_cache = &echo_lock_kmem,
.ckd_name = "echo_lock_kmem",
- .ckd_size = sizeof (struct echo_lock)
+ .ckd_size = sizeof(struct echo_lock)
},
{
.ckd_cache = &echo_object_kmem,
.ckd_name = "echo_object_kmem",
- .ckd_size = sizeof (struct echo_object)
+ .ckd_size = sizeof(struct echo_object)
},
{
.ckd_cache = &echo_thread_kmem,
.ckd_name = "echo_thread_kmem",
- .ckd_size = sizeof (struct echo_thread_info)
+ .ckd_size = sizeof(struct echo_thread_info)
},
{
.ckd_cache = &echo_session_kmem,
.ckd_name = "echo_session_kmem",
- .ckd_size = sizeof (struct echo_session_info)
+ .ckd_size = sizeof(struct echo_session_info)
},
{
.ckd_cache = NULL
struct lu_context_key *key, void *data)
{
struct echo_thread_info *info = data;
+
OBD_SLAB_FREE_PTR(info, echo_thread_kmem);
}
struct lu_context_key *key, void *data)
{
struct echo_session_info *session = data;
+
OBD_SLAB_FREE_PTR(session, echo_session_kmem);
}
switch (cleanup) {
case 4: {
int rc2;
+
rc2 = echo_client_cleanup(obd);
if (rc2)
CERROR("Cleanup obd device %s error(%d)\n",
if (d->ed_next) {
if (!d->ed_next_islov) {
struct lov_oinfo *oinfo = lsm->lsm_oinfo[0];
+
LASSERT(oinfo != NULL);
oinfo->loi_oi = lsm->lsm_oi;
conf->eoc_cl.u.coc_oinfo = oinfo;
} else {
struct lustre_md *md;
+
md = &info->eti_md;
memset(md, 0, sizeof(*md));
md->lsm = lsm;
/* an external function to kill an object? */
if (eco->eo_deleted) {
struct lu_object_header *loh = obj->co_lu.lo_header;
+
LASSERT(&eco->eo_hdr == luh2coh(loh));
set_bit(LU_OBJECT_HEARD_BANSHEE, &loh->loh_flags);
}
static int cl_echo_enqueue0(struct lu_env *env, struct echo_object *eco,
u64 start, u64 end, int mode,
- __u64 *cookie , __u32 enqflags)
+ __u64 *cookie, __u32 enqflags)
{
struct cl_io *io;
struct cl_lock *lck;
LASSERT(ec != NULL);
spin_lock(&ec->ec_lock);
- list_for_each (el, &ec->ec_locks) {
- ecl = list_entry (el, struct echo_lock, el_chain);
+ list_for_each(el, &ec->ec_locks) {
+ ecl = list_entry(el, struct echo_lock, el_chain);
CDEBUG(D_INFO, "ecl: %p, cookie: %#llx\n", ecl, ecl->el_cookie);
found = (ecl->el_cookie == cookie);
if (found) {
cl_page_list_for_each_safe(clp, temp, &queue->c2_qin) {
int rc;
+
rc = cl_page_cache_add(env, io, clp, CRT_WRITE);
if (rc == 0)
continue;
static u64 last_object_id;
static int
-echo_copyout_lsm (struct lov_stripe_md *lsm, void *_ulsm, int ulsm_nob)
+echo_copyout_lsm(struct lov_stripe_md *lsm, void *_ulsm, int ulsm_nob)
{
struct lov_stripe_md *ulsm = _ulsm;
int nob, i;
- nob = offsetof (struct lov_stripe_md, lsm_oinfo[lsm->lsm_stripe_count]);
+ nob = offsetof(struct lov_stripe_md, lsm_oinfo[lsm->lsm_stripe_count]);
if (nob > ulsm_nob)
return -EINVAL;
- if (copy_to_user (ulsm, lsm, sizeof(*ulsm)))
+ if (copy_to_user(ulsm, lsm, sizeof(*ulsm)))
return -EFAULT;
for (i = 0; i < lsm->lsm_stripe_count; i++) {
- if (copy_to_user (ulsm->lsm_oinfo[i], lsm->lsm_oinfo[i],
+ if (copy_to_user(ulsm->lsm_oinfo[i], lsm->lsm_oinfo[i],
sizeof(lsm->lsm_oinfo[0])))
return -EFAULT;
}
}
static int
-echo_copyin_lsm (struct echo_device *ed, struct lov_stripe_md *lsm,
+echo_copyin_lsm(struct echo_device *ed, struct lov_stripe_md *lsm,
void *ulsm, int ulsm_nob)
{
struct echo_client_obd *ec = ed->ed_ec;
int i;
- if (ulsm_nob < sizeof (*lsm))
+ if (ulsm_nob < sizeof(*lsm))
return -EINVAL;
- if (copy_from_user (lsm, ulsm, sizeof (*lsm)))
+ if (copy_from_user(lsm, ulsm, sizeof(*lsm)))
return -EFAULT;
if (lsm->lsm_stripe_count > ec->ec_nstripes ||
if ((oa->o_valid & OBD_MD_FLID) == 0 && /* no obj id */
(on_target || /* set_stripe */
ec->ec_nstripes != 0)) { /* LOV */
- CERROR ("No valid oid\n");
+ CERROR("No valid oid\n");
return -EINVAL;
}
if (ulsm != NULL) {
int i, idx;
- rc = echo_copyin_lsm (ed, lsm, ulsm, ulsm_nob);
+ rc = echo_copyin_lsm(ed, lsm, ulsm, ulsm_nob);
if (rc != 0)
goto failed;
if ((oa->o_valid & OBD_MD_FLID) == 0 || ostid_id(&oa->o_oi) == 0) {
/* disallow use of object id 0 */
- CERROR ("No valid oid\n");
+ CERROR("No valid oid\n");
return -EINVAL;
}
width = stripe_size * stripe_count;
/* woffset = offset within a width; offset = whole number of widths */
- woffset = do_div (offset, width);
+ woffset = do_div(offset, width);
stripe_index = woffset / stripe_size;
for (rc = delta = 0; delta < PAGE_CACHE_SIZE; delta += OBD_ECHO_BLOCK_SIZE) {
stripe_off = offset + delta;
stripe_id = id;
- echo_get_stripe_off_id (lsm, &stripe_off, &stripe_id);
+ echo_get_stripe_off_id(lsm, &stripe_off, &stripe_id);
rc2 = block_debug_check("test_brw",
addr + delta, OBD_ECHO_BLOCK_SIZE,
stripe_off, stripe_id);
if (rc2 != 0) {
- CERROR ("Error in echo object %#llx\n", id);
+ CERROR("Error in echo object %#llx\n", id);
rc = rc2;
}
}
i < npages;
i++, pgp++, off += PAGE_CACHE_SIZE) {
- LASSERT (pgp->pg == NULL); /* for cleanup */
+ LASSERT(pgp->pg == NULL); /* for cleanup */
rc = -ENOMEM;
OBD_PAGE_ALLOC(pgp->pg, gfp_mask);
if (verify) {
int vrc;
+
vrc = echo_client_page_debug_check(lsm, pgp->pg,
ostid_id(&oa->o_oi),
pgp->off, pgp->count);
(nob & (~CFS_PAGE_MASK)) != 0)
return -EINVAL;
- rc = echo_get_object (&eco, ed, oa);
+ rc = echo_get_object(&eco, ed, oa);
if (rc != 0)
return rc;
rc = echo_get_object(&eco, ed, oa);
if (rc == 0) {
struct obd_info oinfo = { { { 0 } } };
+
oinfo.oi_md = eco->eo_lsm;
oinfo.oi_oa = oa;
rc = obd_getattr(env, ec->ec_exp, &oinfo);
rc = echo_get_object(&eco, ed, oa);
if (rc == 0) {
struct obd_info oinfo = { { { 0 } } };
+
oinfo.oi_oa = oa;
oinfo.oi_md = eco->eo_lsm;
goto out;
default:
- CERROR ("echo_ioctl(): unrecognised ioctl %#x\n", cmd);
+ CERROR("echo_ioctl(): unrecognised ioctl %#x\n", cmd);
rc = -ENOTTY;
goto out;
}
}
spin_lock_init(&ec->ec_lock);
- INIT_LIST_HEAD (&ec->ec_objects);
- INIT_LIST_HEAD (&ec->ec_locks);
+ INIT_LIST_HEAD(&ec->ec_objects);
+ INIT_LIST_HEAD(&ec->ec_locks);
ec->ec_unique = 0;
ec->ec_nstripes = 0;
static int __init obdecho_init(void)
{
struct lprocfs_static_vars lvars;
- int rc;
LCONSOLE_INFO("Echo OBD driver; http://www.lustre.org/\n");
lprocfs_echo_init_vars(&lvars);
- rc = echo_client_init();
-
- return rc;
+ return echo_client_init();
}
static void /*__exit*/ obdecho_exit(void)
#include "../include/lprocfs_status.h"
#include "../include/obd_class.h"
-#if defined (CONFIG_PROC_FS)
+#if defined(CONFIG_PROC_FS)
LPROC_SEQ_FOPS_RO_TYPE(echo, uuid);
static struct lprocfs_vars lprocfs_echo_obd_vars[] = {
{ "uuid", &echo_uuid_fops, NULL, 0 },
*/
#define DEBUG_SUBSYSTEM S_CLASS
-#include <asm/statfs.h>
+#include <linux/statfs.h>
#include "../include/obd_cksum.h"
#include "../include/obd_class.h"
#include "../include/lprocfs_status.h"
static int osc_active_seq_show(struct seq_file *m, void *v)
{
struct obd_device *dev = m->private;
- int rc;
LPROCFS_CLIMP_CHECK(dev);
- rc = seq_printf(m, "%d\n", !dev->u.cli.cl_import->imp_deactive);
+ seq_printf(m, "%d\n", !dev->u.cli.cl_import->imp_deactive);
LPROCFS_CLIMP_EXIT(dev);
- return rc;
+
+ return 0;
}
static ssize_t osc_active_seq_write(struct file *file,
{
struct obd_device *dev = m->private;
struct client_obd *cli = &dev->u.cli;
- int rc;
client_obd_list_lock(&cli->cl_loi_list_lock);
- rc = seq_printf(m, "%u\n", cli->cl_max_rpcs_in_flight);
+ seq_printf(m, "%u\n", cli->cl_max_rpcs_in_flight);
client_obd_list_unlock(&cli->cl_loi_list_lock);
- return rc;
+
+ return 0;
}
static ssize_t osc_max_rpcs_in_flight_seq_write(struct file *file,
struct obd_device *dev = m->private;
struct client_obd *cli = &dev->u.cli;
int shift = 20 - PAGE_CACHE_SHIFT;
- int rc;
- rc = seq_printf(m,
- "used_mb: %d\n"
- "busy_cnt: %d\n",
- (atomic_read(&cli->cl_lru_in_list) +
- atomic_read(&cli->cl_lru_busy)) >> shift,
- atomic_read(&cli->cl_lru_busy));
+ seq_printf(m,
+ "used_mb: %d\n"
+ "busy_cnt: %d\n",
+ (atomic_read(&cli->cl_lru_in_list) +
+ atomic_read(&cli->cl_lru_busy)) >> shift,
+ atomic_read(&cli->cl_lru_busy));
- return rc;
+ return 0;
}
/* shrink the number of caching pages to a specific number */
{
struct obd_device *dev = m->private;
struct client_obd *cli = &dev->u.cli;
- int rc;
client_obd_list_lock(&cli->cl_loi_list_lock);
- rc = seq_printf(m, "%lu\n", cli->cl_dirty);
+ seq_printf(m, "%lu\n", cli->cl_dirty);
client_obd_list_unlock(&cli->cl_loi_list_lock);
- return rc;
+
+ return 0;
}
LPROC_SEQ_FOPS_RO(osc_cur_dirty_bytes);
{
struct obd_device *dev = m->private;
struct client_obd *cli = &dev->u.cli;
- int rc;
client_obd_list_lock(&cli->cl_loi_list_lock);
- rc = seq_printf(m, "%lu\n", cli->cl_avail_grant);
+ seq_printf(m, "%lu\n", cli->cl_avail_grant);
client_obd_list_unlock(&cli->cl_loi_list_lock);
- return rc;
+
+ return 0;
}
static ssize_t osc_cur_grant_bytes_seq_write(struct file *file,
{
struct obd_device *dev = m->private;
struct client_obd *cli = &dev->u.cli;
- int rc;
client_obd_list_lock(&cli->cl_loi_list_lock);
- rc = seq_printf(m, "%lu\n", cli->cl_lost_grant);
+ seq_printf(m, "%lu\n", cli->cl_lost_grant);
client_obd_list_unlock(&cli->cl_loi_list_lock);
- return rc;
+
+ return 0;
}
LPROC_SEQ_FOPS_RO(osc_cur_lost_grant_bytes);
if (obd == NULL)
return 0;
- return seq_printf(m, "%d\n",
- obd->u.cli.cl_grant_shrink_interval);
+ seq_printf(m, "%d\n", obd->u.cli.cl_grant_shrink_interval);
+ return 0;
}
static ssize_t osc_grant_shrink_interval_seq_write(struct file *file,
if (obd == NULL)
return 0;
- return seq_printf(m, "%d\n",
- obd->u.cli.cl_checksum ? 1 : 0);
+ seq_printf(m, "%d\n", obd->u.cli.cl_checksum ? 1 : 0);
+ return 0;
}
static ssize_t osc_checksum_seq_write(struct file *file,
{
struct obd_device *obd = m->private;
- return seq_printf(m, "%u\n", atomic_read(&obd->u.cli.cl_resends));
+ seq_printf(m, "%u\n", atomic_read(&obd->u.cli.cl_resends));
+ return 0;
}
static ssize_t osc_resend_count_seq_write(struct file *file,
struct obd_device *obd = m->private;
struct osc_device *od = obd2osc_dev(obd);
- return seq_printf(m, "%u\n", od->od_contention_time);
+ seq_printf(m, "%u\n", od->od_contention_time);
+ return 0;
}
static ssize_t osc_contention_seconds_seq_write(struct file *file,
struct obd_device *obd = m->private;
struct osc_device *od = obd2osc_dev(obd);
- return seq_printf(m, "%u\n", od->od_lockless_truncate);
+ seq_printf(m, "%u\n", od->od_lockless_truncate);
+ return 0;
}
static ssize_t osc_lockless_truncate_seq_write(struct file *file,
static int osc_destroys_in_flight_seq_show(struct seq_file *m, void *v)
{
struct obd_device *obd = m->private;
- return seq_printf(m, "%u\n",
- atomic_read(&obd->u.cli.cl_destroy_in_flight));
+
+ seq_printf(m, "%u\n", atomic_read(&obd->u.cli.cl_destroy_in_flight));
+ return 0;
}
LPROC_SEQ_FOPS_RO(osc_destroys_in_flight);
}
osc_object_unlock(obj);
- osc_io_unplug(env, cli, obj, PDL_POLICY_ROUND);
+ osc_io_unplug_async(env, cli, obj);
return 0;
}
if (ia_valid & ATTR_SIZE) {
attr->cat_size = attr->cat_kms = size;
- cl_valid = (CAT_SIZE | CAT_KMS);
+ cl_valid = CAT_SIZE | CAT_KMS;
}
if (ia_valid & ATTR_MTIME_SET) {
attr->cat_mtime = lvb->lvb_mtime;
struct cl_lock_descr *descr = &lock->cll_descr;
struct cl_object_header *hdr = cl_object_header(descr->cld_obj);
struct cl_lock *scan;
- struct cl_lock *conflict= NULL;
+ struct cl_lock *conflict = NULL;
int lockless = osc_lock_is_lockless(olck);
int rc = 0;
static inline int can_merge_pages(struct brw_page *p1, struct brw_page *p2)
{
if (p1->flag != p2->flag) {
- unsigned mask = ~(OBD_BRW_FROM_GRANT| OBD_BRW_NOCACHE|
- OBD_BRW_SYNC|OBD_BRW_ASYNC|OBD_BRW_NOQUOTA);
+ unsigned mask = ~(OBD_BRW_FROM_GRANT | OBD_BRW_NOCACHE |
+ OBD_BRW_SYNC | OBD_BRW_ASYNC|OBD_BRW_NOQUOTA);
/* warn if we try to combine flags that we don't know to be
* safe to combine */
int page_count = 0;
int i;
int rc;
+ struct ost_body *body;
LIST_HEAD(rpc_list);
LASSERT(!list_empty(ext_list));
* later setattr before earlier BRW (as determined by the request xid),
* the OST will not use BRW timestamps. Sadly, there is no obvious
* way to do this in a single call. bug 10150 */
+ body = req_capsule_client_get(&req->rq_pill, &RMF_OST_BODY);
+ crattr->cra_oa = &body->oa;
cl_req_attr_set(env, clerq, crattr,
OBD_MD_FLMTIME|OBD_MD_FLCTIME|OBD_MD_FLATIME);
time_t now = get_seconds();
LASSERT(req->rq_import);
- at = &req->rq_import->imp_at;
+
+ if (service_time > now - req->rq_sent + 3) {
+ /* bz16408, however, this can also happen if early reply
+ * is lost and client RPC is expired and resent, early reply
+ * or reply of original RPC can still be fit in reply buffer
+ * of resent RPC, now client is measuring time from the
+ * resent time, but server sent back service time of original
+ * RPC.
+ */
+ CDEBUG((lustre_msg_get_flags(req->rq_reqmsg) & MSG_RESENT) ?
+ D_ADAPTTO : D_WARNING,
+ "Reported service time %u > total measured time "
+ CFS_DURATION_T"\n", service_time,
+ cfs_time_sub(now, req->rq_sent));
+ return;
+ }
/* Network latency is total time less server processing time */
- nl = max_t(int, now - req->rq_sent - service_time, 0) + 1/*st rounding*/;
- if (service_time > now - req->rq_sent + 3 /* bz16408 */)
- CWARN("Reported service time %u > total measured time "
- CFS_DURATION_T"\n", service_time,
- cfs_time_sub(now, req->rq_sent));
+ nl = max_t(int, now - req->rq_sent -
+ service_time, 0) + 1; /* st rounding */
+ at = &req->rq_import->imp_at;
oldnl = at_measured(&at->iat_net_latency, nl);
if (oldnl != 0)
list_add_tail(&req->rq_list, &pool->prp_req_list);
}
spin_unlock(&pool->prp_lock);
- return;
}
EXPORT_SYMBOL(ptlrpc_add_rqs_to_pool);
if (req->rq_err) {
req->rq_status = rc;
return 1;
- } else {
- spin_lock(&req->rq_lock);
- req->rq_wait_ctx = 1;
- spin_unlock(&req->rq_lock);
- return 0;
}
+ spin_lock(&req->rq_lock);
+ req->rq_wait_ctx = 1;
+ spin_unlock(&req->rq_lock);
+ return 0;
}
CDEBUG(D_RPCTRACE, "Sending RPC pname:cluuid:pid:xid:nid:opc %s:%s:%d:%llu:%s:%d\n",
if (set->set_interpret != NULL) {
int (*interpreter)(struct ptlrpc_request_set *set, void *, int) =
set->set_interpret;
- rc = interpreter (set, set->set_arg, rc);
+ rc = interpreter(set, set->set_arg, rc);
} else {
struct ptlrpc_set_cbdata *cbdata, *n;
int err;
conn_key(struct hlist_node *hnode)
{
struct ptlrpc_connection *conn;
+
conn = hlist_entry(hnode, struct ptlrpc_connection, c_hash);
return &conn->c_peer;
}
static void __import_set_state(struct obd_import *imp,
enum lustre_imp_state state)
{
+ switch (state) {
+ case LUSTRE_IMP_CLOSED:
+ case LUSTRE_IMP_NEW:
+ case LUSTRE_IMP_DISCON:
+ case LUSTRE_IMP_CONNECTING:
+ break;
+ case LUSTRE_IMP_REPLAY_WAIT:
+ imp->imp_replay_state = LUSTRE_IMP_REPLAY_LOCKS;
+ break;
+ default:
+ imp->imp_replay_state = LUSTRE_IMP_REPLAY;
+ }
+
imp->imp_state = state;
imp->imp_state_hist[imp->imp_state_hist_idx].ish_state = state;
imp->imp_state_hist[imp->imp_state_hist_idx].ish_time =
imp->imp_resend_replay = 1;
spin_unlock(&imp->imp_lock);
- IMPORT_SET_STATE(imp, LUSTRE_IMP_REPLAY);
+ IMPORT_SET_STATE(imp, imp->imp_replay_state);
} else {
IMPORT_SET_STATE(imp, LUSTRE_IMP_RECOVER);
}
.rmf_name = (name), \
.rmf_flags = (flags), \
.rmf_size = (size), \
- .rmf_swabber = (void (*)(void*))(swabber), \
- .rmf_dumper = (void (*)(void*))(dumper) \
+ .rmf_swabber = (void (*)(void *))(swabber), \
+ .rmf_dumper = (void (*)(void *))(dumper) \
}
struct req_msg_field RMF_GENERIC_DATA =
LASSERTF(offset > 0, "%s:%s, off=%d, loc=%d\n",
pill->rc_fmt->rf_name,
field->rmf_name, offset, loc);
- offset --;
+ offset--;
LASSERT(0 <= offset && offset < REQ_MAX_FIELD_NR);
return offset;
return ll_eopcode_table[opcode].opname;
}
-#if defined (CONFIG_PROC_FS)
+#if defined(CONFIG_PROC_FS)
static void ptlrpc_lprocfs_register(struct proc_dir_entry *root, char *dir,
char *name,
struct proc_dir_entry **procroot_ret,
ptlrpc_service_for_each_part(svcpt, i, svc)
total += svcpt->scp_hist_nrqbds;
- return seq_printf(m, "%d\n", total);
+ seq_printf(m, "%d\n", total);
+ return 0;
}
LPROC_SEQ_FOPS_RO(ptlrpc_lprocfs_req_history_len);
ptlrpc_service_for_each_part(svcpt, i, svc)
total += svc->srv_hist_nrqbds_cpt_max;
- return seq_printf(m, "%d\n", total);
+ seq_printf(m, "%d\n", total);
+ return 0;
}
static ssize_t
{
struct ptlrpc_service *svc = m->private;
- return seq_printf(m, "%d\n",
- svc->srv_nthrs_cpt_init * svc->srv_ncpts);
+ seq_printf(m, "%d\n", svc->srv_nthrs_cpt_init * svc->srv_ncpts);
+ return 0;
}
static ssize_t
ptlrpc_service_for_each_part(svcpt, i, svc)
total += svcpt->scp_nthrs_running;
- return seq_printf(m, "%d\n", total);
+ seq_printf(m, "%d\n", total);
+ return 0;
}
LPROC_SEQ_FOPS_RO(ptlrpc_lprocfs_threads_started);
{
struct ptlrpc_service *svc = m->private;
- return seq_printf(m, "%d\n",
- svc->srv_nthrs_cpt_limit * svc->srv_ncpts);
+ seq_printf(m, "%d\n", svc->srv_nthrs_cpt_limit * svc->srv_ncpts);
+ return 0;
}
static ssize_t
static int ptlrpc_lprocfs_hp_ratio_seq_show(struct seq_file *m, void *v)
{
struct ptlrpc_service *svc = m->private;
- return seq_printf(m, "%d", svc->srv_hpreq_ratio);
+ seq_printf(m, "%d", svc->srv_hpreq_ratio);
+ return 0;
}
static ssize_t ptlrpc_lprocfs_hp_ratio_seq_write(struct file *file,
.data = svc},
{NULL}
};
- static struct file_operations req_history_fops = {
+ static const struct file_operations req_history_fops = {
.owner = THIS_MODULE,
.open = ptlrpc_lprocfs_svc_req_history_open,
.read = seq_read,
{
struct obd_device *obd = m->private;
struct obd_import *imp = obd->u.cli.cl_import;
- int rc;
LPROCFS_CLIMP_CHECK(obd);
- rc = seq_printf(m, "%d\n", !imp->imp_no_pinger_recover);
+ seq_printf(m, "%d\n", !imp->imp_no_pinger_recover);
LPROCFS_CLIMP_EXIT(obd);
- return rc;
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_pinger_recov);
req->rq_export->exp_obd->obd_minor);
}
- /* In order to keep interoprability with the client (< 2.3) which
+ /* In order to keep interoperability with the client (< 2.3) which
* doesn't have pb_jobid in ptlrpc_body, We have to shrink the
* ptlrpc_body in reply buffer to ptlrpc_body_v2, otherwise, the
* reply buffer on client will be overflow.
*
- * XXX Remove this whenever we drop the interoprability with such client.
+ * XXX Remove this whenever we drop the interoperability with
+ * such client.
*/
req->rq_replen = lustre_shrink_msg(req->rq_repmsg, 0,
sizeof(struct ptlrpc_body_v2), 1);
{
struct ptlrpc_nrs_policy *tmp = nrs->nrs_policy_primary;
- if (tmp == NULL) {
+ if (tmp == NULL)
return;
- }
nrs->nrs_policy_primary = NULL;
static int nrs_svcpt_setup_locked0(struct ptlrpc_nrs *nrs,
struct ptlrpc_service_part *svcpt)
{
- int rc;
enum ptlrpc_nrs_queue_type queue;
LASSERT(mutex_is_locked(&nrs_core.nrs_mutex));
INIT_LIST_HEAD(&nrs->nrs_policy_list);
INIT_LIST_HEAD(&nrs->nrs_policy_queued);
- rc = nrs_register_policies_locked(nrs);
-
- return rc;
+ return nrs_register_policies_locked(nrs);
}
/**
/* early reply size */
int lustre_msg_early_size(void)
{
- static int size = 0;
+ static int size;
if (!size) {
- /* Always reply old ptlrpc_body_v2 to keep interoprability
+ /* Always reply old ptlrpc_body_v2 to keep interoperability
* with the old client (< 2.3) which doesn't have pb_jobid
* in the ptlrpc_body.
*
- * XXX Remove this whenever we drop interoprability with such
+ * XXX Remove this whenever we drop interoperability with such
* client.
*/
__u32 pblen = sizeof(struct ptlrpc_body_v2);
#define PET_READY 1
#define PET_TERMINATE 2
-static int pet_refcount = 0;
+static int pet_refcount;
static int pet_state;
static wait_queue_head_t pet_waitq;
LIST_HEAD(pet_list);
int lustre_unpack_req_ptlrpc_body(struct ptlrpc_request *req, int offset);
int lustre_unpack_rep_ptlrpc_body(struct ptlrpc_request *req, int offset);
-#if defined (CONFIG_PROC_FS)
+#if defined(CONFIG_PROC_FS)
void ptlrpc_lprocfs_register_service(struct proc_dir_entry *proc_entry,
struct ptlrpc_service *svc);
void ptlrpc_lprocfs_unregister_service(struct ptlrpc_service *svc);
int sptlrpc_proc_enc_pool_seq_show(struct seq_file *m, void *v);
/* sec_lproc.c */
-#if defined (CONFIG_PROC_FS)
+#if defined(CONFIG_PROC_FS)
int sptlrpc_lproc_init(void);
void sptlrpc_lproc_fini(void);
#else
static struct ptlrpcd *ptlrpcds;
struct mutex ptlrpcd_mutex;
-static int ptlrpcd_users = 0;
+static int ptlrpcd_users;
void ptlrpcd_wake(struct ptlrpc_request *req)
{
#if defined(CONFIG_NUMA)
{
int i;
- mask = *cpumask_of_node(cpu_to_node(index));
+ cpumask_copy(&mask, cpumask_of_node(cpu_to_node(index)));
for (i = max; i < num_online_cpus(); i++)
- cpu_clear(i, mask);
- pc->pc_npartners = cpus_weight(mask) - 1;
+ cpumask_clear_cpu(i, &mask);
+ pc->pc_npartners = cpumask_weight(&mask) - 1;
set_bit(LIOD_BIND, &pc->pc_flags);
}
#else
* that are already initialized
*/
for (pidx = 0, i = 0; i < index; i++) {
- if (cpu_isset(i, mask)) {
+ if (cpumask_test_cpu(i, &mask)) {
ppc = &ptlrpcds->pd_threads[i];
pc->pc_partners[pidx++] = ppc;
ppc->pc_partners[ppc->
*/
int sptlrpc_proc_enc_pool_seq_show(struct seq_file *m, void *v)
{
- int rc;
-
spin_lock(&page_pools.epp_lock);
- rc = seq_printf(m,
- "physical pages: %lu\n"
- "pages per pool: %lu\n"
- "max pages: %lu\n"
- "max pools: %u\n"
- "total pages: %lu\n"
- "total free: %lu\n"
- "idle index: %lu/100\n"
- "last shrink: %lds\n"
- "last access: %lds\n"
- "max pages reached: %lu\n"
- "grows: %u\n"
- "grows failure: %u\n"
- "shrinks: %u\n"
- "cache access: %lu\n"
- "cache missing: %lu\n"
- "low free mark: %lu\n"
- "max waitqueue depth: %u\n"
- "max wait time: "CFS_TIME_T"/%u\n"
- ,
- totalram_pages,
- PAGES_PER_POOL,
- page_pools.epp_max_pages,
- page_pools.epp_max_pools,
- page_pools.epp_total_pages,
- page_pools.epp_free_pages,
- page_pools.epp_idle_idx,
- get_seconds() - page_pools.epp_last_shrink,
- get_seconds() - page_pools.epp_last_access,
- page_pools.epp_st_max_pages,
- page_pools.epp_st_grows,
- page_pools.epp_st_grow_fails,
- page_pools.epp_st_shrinks,
- page_pools.epp_st_access,
- page_pools.epp_st_missings,
- page_pools.epp_st_lowfree,
- page_pools.epp_st_max_wqlen,
- page_pools.epp_st_max_wait, HZ
- );
+ seq_printf(m,
+ "physical pages: %lu\n"
+ "pages per pool: %lu\n"
+ "max pages: %lu\n"
+ "max pools: %u\n"
+ "total pages: %lu\n"
+ "total free: %lu\n"
+ "idle index: %lu/100\n"
+ "last shrink: %lds\n"
+ "last access: %lds\n"
+ "max pages reached: %lu\n"
+ "grows: %u\n"
+ "grows failure: %u\n"
+ "shrinks: %u\n"
+ "cache access: %lu\n"
+ "cache missing: %lu\n"
+ "low free mark: %lu\n"
+ "max waitqueue depth: %u\n"
+ "max wait time: " CFS_TIME_T "/%u\n",
+ totalram_pages,
+ PAGES_PER_POOL,
+ page_pools.epp_max_pages,
+ page_pools.epp_max_pools,
+ page_pools.epp_total_pages,
+ page_pools.epp_free_pages,
+ page_pools.epp_idle_idx,
+ get_seconds() - page_pools.epp_last_shrink,
+ get_seconds() - page_pools.epp_last_access,
+ page_pools.epp_st_max_pages,
+ page_pools.epp_st_grows,
+ page_pools.epp_st_grow_fails,
+ page_pools.epp_st_shrinks,
+ page_pools.epp_st_access,
+ page_pools.epp_st_missings,
+ page_pools.epp_st_lowfree,
+ page_pools.epp_st_max_wqlen,
+ page_pools.epp_st_max_wait,
+ HZ);
spin_unlock(&page_pools.epp_lock);
- return rc;
+
+ return 0;
}
static void enc_pools_release_free_pages(long npages)
*/
cur_npools = (page_pools.epp_total_pages + PAGES_PER_POOL - 1) /
PAGES_PER_POOL;
- end_npools = (page_pools.epp_total_pages + npages + PAGES_PER_POOL - 1) /
- PAGES_PER_POOL;
+ end_npools = (page_pools.epp_total_pages + npages + PAGES_PER_POOL - 1)
+ / PAGES_PER_POOL;
LASSERT(end_npools <= page_pools.epp_max_pools);
np_idx = 0;
return -EINVAL;
}
- if (swabbed) {
+ if (swabbed)
__swab32s(&bsd->bsd_nob);
- }
if (unlikely(bsd->bsd_version != 0)) {
CERROR("Unexpected version %u\n", bsd->bsd_version);
if (tc->tc_thr_factor != 0) {
int factor = tc->tc_thr_factor;
const int fade = 4;
- cpumask_t mask;
/*
* User wants to increase number of threads with for
* have too many threads no matter how many cores/HTs
* there are.
*/
- cpumask_copy(&mask, topology_thread_cpumask(0));
- if (cpus_weight(mask) > 1) { /* weight is # of HTs */
+ /* weight is # of HTs */
+ if (cpumask_weight(topology_thread_cpumask(0)) > 1) {
/* depress thread factor for hyper-thread */
factor = factor - (factor >> 1) + (factor >> 3);
}
int ptlrpc_hr_init(void)
{
- cpumask_t mask;
struct ptlrpc_hr_partition *hrp;
struct ptlrpc_hr_thread *hrt;
int rc;
init_waitqueue_head(&ptlrpc_hr.hr_waitq);
- cpumask_copy(&mask, topology_thread_cpumask(0));
- weight = cpus_weight(mask);
+ weight = cpumask_weight(topology_thread_cpumask(0));
cfs_percpt_for_each(hrp, i, ptlrpc_hr.hr_partitions) {
hrp->hrp_cpt = i;
/* Block A match, only data without crc errors taken */
if (bdev->rds_info.radio_text[i] == BCM2048_RDS_BLOCK_A) {
- pi = ((bdev->rds_info.radio_text[i+1] << 8) +
- bdev->rds_info.radio_text[i+2]);
+ pi = (bdev->rds_info.radio_text[i+1] << 8) +
+ bdev->rds_info.radio_text[i+2];
if (!bdev->rds_info.rds_pi) {
bdev->rds_info.rds_pi = pi;
if ((bdev->rds_info.radio_text[i] & BCM2048_RDS_BLOCK_MASK) ==
BCM2048_RDS_BLOCK_B) {
- rt_id = (bdev->rds_info.radio_text[i+1] &
- BCM2048_RDS_BLOCK_MASK);
+ rt_id = bdev->rds_info.radio_text[i+1] &
+ BCM2048_RDS_BLOCK_MASK;
rt_group_b = bdev->rds_info.radio_text[i+1] &
BCM2048_RDS_GROUP_AB_MASK;
rt_ab = bdev->rds_info.radio_text[i+2] &
goto unlock;
}
- data_buffer = kzalloc(BCM2048_MAX_RDS_RADIO_TEXT*5, GFP_KERNEL);
+ data_buffer = kcalloc(BCM2048_MAX_RDS_RADIO_TEXT, 5, GFP_KERNEL);
if (!data_buffer) {
err = -ENOMEM;
goto unlock;
tmpbuf[i] = bdev->rds_info.radio_text[bdev->rd_index+i+2];
tmpbuf[i+1] = bdev->rds_info.radio_text[bdev->rd_index+i+1];
- tmpbuf[i+2] = ((bdev->rds_info.radio_text[bdev->rd_index+i]
- & 0xf0) >> 4);
+ tmpbuf[i+2] = (bdev->rds_info.radio_text[bdev->rd_index + i] & 0xf0) >> 4;
if ((bdev->rds_info.radio_text[bdev->rd_index+i] &
BCM2048_RDS_CRC_MASK) == BCM2048_RDS_CRC_UNRECOVARABLE)
tmpbuf[i+2] |= 0x80;
.id_table = bcm2048_id,
};
-/*
- * Module Interface
- */
-static int __init bcm2048_module_init(void)
-{
- pr_info(BCM2048_DRIVER_DESC "\n");
-
- return i2c_add_driver(&bcm2048_i2c_driver);
-}
-module_init(bcm2048_module_init);
-
-static void __exit bcm2048_module_exit(void)
-{
- i2c_del_driver(&bcm2048_i2c_driver);
-}
-module_exit(bcm2048_module_exit);
+module_i2c_driver(bcm2048_i2c_driver);
MODULE_LICENSE("GPL");
MODULE_AUTHOR(BCM2048_DRIVER_AUTHOR);
#include <linux/slab.h>
#include <linux/kernel.h>
#include <linux/module.h>
-#include <linux/moduleparam.h>
#include <linux/i2c.h>
#include <linux/wait.h>
#include <linux/delay.h>
/* Combine all the fields to make CFG1 register of IPIPEIF */
tmp = val = get_oneshot_mode(ipipeif->input);
if (tmp < 0) {
- pr_err("ipipeif: links setup required");
+ dev_err(&sd->devnode->dev, "ipipeif: links setup required");
return -EINVAL;
}
- val = val << ONESHOT_SHIFT;
+ val <<= ONESHOT_SHIFT;
ipipeif_source = ipipeif_get_source(ipipeif);
val |= ipipeif_source << INPSRC_SHIFT;
.clip = 4095,
},
};
- memset(&ipipeif->config, 0, sizeof(struct ipipeif_params));
memcpy(&ipipeif->config, &ipipeif_defaults,
sizeof(struct ipipeif_params));
}
.out_chr_pos = VPFE_IPIPE_YUV422_CHR_POS_COSITE,
},
};
- memset(&resizer->config, 0, sizeof(struct resizer_params));
memcpy(&resizer->config, &rsz_default_config,
sizeof(struct resizer_params));
}
if (!vpfe_cfg->num_clocks)
return 0;
- vpfe_dev->clks = kzalloc(vpfe_cfg->num_clocks *
- sizeof(struct clock *), GFP_KERNEL);
+ vpfe_dev->clks = kcalloc(vpfe_cfg->num_clocks,
+ sizeof(struct clock *), GFP_KERNEL);
if (vpfe_dev->clks == NULL)
return -ENOMEM;
i2c_adap = i2c_get_adapter(1);
num_subdevs = vpfe_cfg->num_subdevs;
vpfe_dev->sd =
- kzalloc(sizeof(struct v4l2_subdev *)*num_subdevs, GFP_KERNEL);
+ kcalloc(num_subdevs, sizeof(struct v4l2_subdev *),
+ GFP_KERNEL);
if (vpfe_dev->sd == NULL)
return -ENOMEM;
retval = lirc_unregister_driver(minor);
if (retval)
dev_err(&context->usbdev->dev,
- ": %s: unable to deregister from lirc(%d)",
- __func__, retval);
+ "unable to deregister from lirc(%d)", retval);
else
dev_info(&context->usbdev->dev,
"Deregistered iMON driver (minor:%d)\n", minor);
context = usb_get_intfdata(interface);
if (!context) {
- dev_err(&interface->dev,
- "%s: no context found for minor %d\n",
- __func__, subminor);
+ dev_err(&interface->dev, "no context found for minor %d\n",
+ subminor);
retval = -ENODEV;
goto exit;
}
context->tx_urb->actual_length = 0;
init_completion(&context->tx.finished);
- atomic_set(&(context->tx.busy), 1);
+ atomic_set(&context->tx.busy, 1);
retval = usb_submit_urb(context->tx_urb, GFP_KERNEL);
if (retval) {
- atomic_set(&(context->tx.busy), 0);
- dev_err(&context->usbdev->dev,
- "%s: error submitting urb(%d)\n", __func__, retval);
+ atomic_set(&context->tx.busy, 0);
+ dev_err(&context->usbdev->dev, "error submitting urb(%d)\n",
+ retval);
} else {
/* Wait for transmission to complete (or abort) */
mutex_unlock(&context->ctx_lock);
retval = context->tx.status;
if (retval)
dev_err(&context->usbdev->dev,
- "%s: packet tx failed (%d)\n",
- __func__, retval);
+ "packet tx failed (%d)\n", retval);
}
return retval;
retval = send_packet(context);
if (retval) {
dev_err(&context->usbdev->dev,
- "%s: send packet failed for packet #%d\n",
- __func__, seq/2);
+ "send packet failed for packet #%d\n",
+ seq / 2);
goto exit;
} else {
seq += 2;
retval = send_packet(context);
if (retval)
dev_err(&context->usbdev->dev,
- "%s: send packet failed for packet #%d\n",
- __func__, seq/2);
+ "send packet failed for packet #%d\n",
+ seq / 2);
}
exit:
retval = usb_submit_urb(context->rx_urb, GFP_KERNEL);
if (retval) {
- dev_err(dev, "%s: usb_submit_urb failed for intf0 (%d)\n",
- __func__, retval);
+ dev_err(dev, "usb_submit_urb failed for intf0 (%d)\n", retval);
alloc_status = 8;
goto unlock;
}
|| (now.tv_sec == tv.tv_sec
&& now.tv_usec < tv.tv_usec)));
- timeelapsed = ((now.tv_sec + 1 - tv.tv_sec)*1000000
- + (now.tv_usec - tv.tv_usec));
+ timeelapsed = (now.tv_sec + 1 - tv.tv_sec)*1000000
+ + (now.tv_usec - tv.tv_usec);
if (count >= 1000 && timeelapsed > 0) {
if (default_timer == 0) {
/* autodetect timer */
set_current_state(TASK_INTERRUPTIBLE);
while (count < n) {
if (rptr != wptr) {
- if (copy_to_user(buf+count, (char *) &rbuf[rptr],
+ if (copy_to_user(buf+count, &rbuf[rptr],
sizeof(int))) {
result = -EFAULT;
break;
kfree(context->driver->rbuf);
kfree(context->driver);
kfree(context);
-
- if (debug)
- pr_info("%s: context deleted\n", __func__);
}
static void deregister_from_lirc(struct sasem_context *context)
retval = lirc_unregister_driver(minor);
if (retval)
- pr_err("%s: unable to deregister from lirc (%d)\n",
+ dev_err(&context->dev->dev,
+ "%s: unable to deregister from lirc (%d)\n",
__func__, retval);
else
- pr_info("Deregistered Sasem driver (minor:%d)\n", minor);
+ dev_info(&context->dev->dev,
+ "Deregistered Sasem driver (minor:%d)\n", minor);
}
context = usb_get_intfdata(interface);
if (!context) {
- dev_err(&interface->dev,
- "%s: no context found for minor %d\n",
- __func__, subminor);
+ dev_err(&interface->dev, "no context found for minor %d\n",
+ subminor);
retval = -ENODEV;
goto exit;
}
context->tx_urb->actual_length = 0;
init_completion(&context->tx.finished);
- atomic_set(&(context->tx.busy), 1);
+ atomic_set(&context->tx.busy, 1);
retval = usb_submit_urb(context->tx_urb, GFP_KERNEL);
if (retval) {
- atomic_set(&(context->tx.busy), 0);
- dev_err(&context->dev->dev, "%s: error submitting urb (%d)\n",
- __func__, retval);
+ atomic_set(&context->tx.busy, 0);
+ dev_err(&context->dev->dev, "error submitting urb (%d)\n",
+ retval);
} else {
/* Wait for transmission to complete (or abort) */
mutex_unlock(&context->ctx_lock);
retval = context->tx.status;
if (retval)
dev_err(&context->dev->dev,
- "%s: packet tx failed (%d)\n",
- __func__, retval);
+ "packet tx failed (%d)\n", retval);
}
return retval;
goto exit;
}
- data_buf = memdup_user((void const __user *)buf, n_bytes);
+ data_buf = memdup_user(buf, n_bytes);
if (IS_ERR(data_buf)) {
retval = PTR_ERR(data_buf);
data_buf = NULL;
retval = send_packet(context);
if (retval) {
dev_err(&context->dev->dev,
- "%s: send packet failed for packet #%d\n",
- __func__, i);
+ "send packet failed for packet #%d\n", i);
goto exit;
}
}
if (retval)
dev_err(&context->dev->dev,
- "%s: usb_submit_urb failed for ir_open (%d)\n",
- __func__, retval);
+ "usb_submit_urb failed for ir_open (%d)\n", retval);
else {
context->ir_isopen = 1;
dev_info(&context->dev->dev, "IR port opened\n");
/* How many clocks in a microsecond?, avoiding long long divide */
work = loops_per_sec;
work *= 4295; /* 4295 = 2^32 / 1e6 */
- conv_us_to_clocks = (work >> 32);
+ conv_us_to_clocks = work >> 32;
/*
* Carrier period in clocks, approach good up to 32GHz clock,
result = devm_request_irq(&dev->dev, irq, lirc_irq_handler,
(share_irq ? IRQF_SHARED : 0),
- LIRC_DRIVER_NAME, (void *)&hardware);
+ LIRC_DRIVER_NAME, &hardware);
if (result < 0) {
if (result == -EBUSY)
dev_err(&dev->dev, "IRQ %d busy\n", irq);
nhigh++;
msleep(40);
}
- sense = (nlow >= nhigh ? 1 : 0);
+ sense = nlow >= nhigh ? 1 : 0;
dev_info(&dev->dev, "auto-detected active %s receiver\n",
sense ? "low" : "high");
} else
}
pr_info("I/O port 0x%.4x, IRQ %d.\n", io, irq);
- init_timer(&timerlist);
- timerlist.function = sir_timeout;
- timerlist.data = 0xabadcafe;
+ setup_timer(&timerlist, sir_timeout, 0);
return 0;
}
struct IR *ir = filep->private_data;
if (ir == NULL) {
- dev_err(ir->l.dev,
- "close: no private_data attached to the file!\n");
+ pr_err("ir: close: no private_data attached to the file!\n");
return -ENODEV;
}
remaining -= (dev->i2c_wr_max - 1)) {
len = remaining;
if (len > (dev->i2c_wr_max - 1))
- len = (dev->i2c_wr_max - 1);
+ len = dev->i2c_wr_max - 1;
ret = regmap_bulk_write(dev->regmap[0], 0xf6,
&fw->data[fw->size - remaining], len);
#include "mn88473_priv.h"
static int mn88473_get_tune_settings(struct dvb_frontend *fe,
- struct dvb_frontend_tune_settings *s)
+ struct dvb_frontend_tune_settings *s)
{
s->min_delay_ms = 1000;
return 0;
u8 delivery_system_val, if_val[3], bw_val[7];
dev_dbg(&client->dev,
- "delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n",
- c->delivery_system, c->modulation,
- c->frequency, c->bandwidth_hz, c->symbol_rate,
- c->inversion, c->stream_id);
+ "delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n",
+ c->delivery_system,
+ c->modulation,
+ c->frequency,
+ c->bandwidth_hz,
+ c->symbol_rate,
+ c->inversion,
+ c->stream_id);
if (!dev->warm) {
ret = -EAGAIN;
break;
default:
dev_err(&client->dev, "IF frequency %d not supported\n",
- if_frequency);
+ if_frequency);
ret = -EINVAL;
goto err;
}
}
dev_info(&client->dev, "downloading firmware from file '%s'\n",
- fw_file);
+ fw_file);
ret = regmap_write(dev->regmap[0], 0xf5, 0x03);
if (ret)
remaining -= (dev->i2c_wr_max - 1)) {
len = remaining;
if (len > (dev->i2c_wr_max - 1))
- len = (dev->i2c_wr_max - 1);
+ len = dev->i2c_wr_max - 1;
ret = regmap_bulk_write(dev->regmap[0], 0xf6,
- &fw->data[fw->size - remaining], len);
+ &fw->data[fw->size - remaining], len);
if (ret) {
dev_err(&client->dev, "firmware download failed=%d\n",
- ret);
+ ret);
goto err;
}
}
};
static int mn88473_probe(struct i2c_client *client,
- const struct i2c_device_id *id)
+ const struct i2c_device_id *id)
{
struct mn88473_config *config = client->dev.platform_data;
struct mn88473_dev *dev;
subdev = v4l2_i2c_new_subdev_board(&iss->v4l2_dev, adapter,
board_info->board_info, NULL);
if (subdev == NULL) {
- dev_err(iss->dev, "%s: Unable to register subdev %s\n",
- __func__, board_info->board_info->type);
+ dev_err(iss->dev, "Unable to register subdev %s\n",
+ board_info->board_info->type);
continue;
}
iss->media_dev.link_notify = iss_pipeline_link_notify;
ret = media_device_register(&iss->media_dev);
if (ret < 0) {
- dev_err(iss->dev, "%s: Media device registration failed (%d)\n",
- __func__, ret);
+ dev_err(iss->dev, "Media device registration failed (%d)\n",
+ ret);
return ret;
}
iss->v4l2_dev.mdev = &iss->media_dev;
ret = v4l2_device_register(iss->dev, &iss->v4l2_dev);
if (ret < 0) {
- dev_err(iss->dev, "%s: V4L2 device registration failed (%d)\n",
- __func__, ret);
+ dev_err(iss->dev, "V4L2 device registration failed (%d)\n",
+ ret);
goto done;
}
break;
default:
- dev_err(iss->dev, "%s: invalid interface type %u\n",
- __func__, subdevs->interface);
+ dev_err(iss->dev, "invalid interface type %u\n",
+ subdevs->interface);
ret = -EINVAL;
goto done;
}
ret = video_register_device(&video->video, VFL_TYPE_GRABBER, -1);
if (ret < 0)
dev_err(video->iss->dev,
- "%s: could not register video device (%d)\n",
- __func__, ret);
+ "could not register video device (%d)\n", ret);
return ret;
}
break;
case NAND_CMD_READID:
state->buf_ptr = 0;
- spinand_read_id(info->spi, (u8 *)state->buf);
+ spinand_read_id(info->spi, state->buf);
break;
case NAND_CMD_PARAM:
state->buf_ptr = 0;
* Allocate our adapter data structure and attach it to the device.
*/
adapter = (struct xlr_adapter *)
- devm_kzalloc(&pdev->dev, sizeof(adapter), GFP_KERNEL);
+ devm_kzalloc(&pdev->dev, sizeof(*adapter), GFP_KERNEL);
if (!adapter) {
err = -ENOMEM;
return err;
Say Y here to enable support for a nVidia compliant embedded
controller.
+ To compile this driver as a module, say M here: the module will be
+ called mfd-nvec
+
config KEYBOARD_NVEC
tristate "Keyboard on nVidia compliant EC"
depends on MFD_NVEC && INPUT
Say Y here to enable support for a keyboard connected to
a nVidia compliant embedded controller.
+ To compile this driver as a module, say M here: the module will be
+ called keyboard-nvec
+
config SERIO_NVEC_PS2
tristate "PS2 on nVidia EC"
depends on MFD_NVEC && SERIO
Say Y here to enable support for a Touchpad / Mouse connected
to a nVidia compliant embedded controller.
+ To compile this driver as a module, say M here: the module will be
+ called serio-nvec-ps2
+
+
config NVEC_POWER
tristate "NVEC charger and battery"
depends on MFD_NVEC && POWER_SUPPLY
Say Y to enable support for battery and charger interface for
nVidia compliant embedded controllers.
+ To compile this driver as a module, say M here: the module will be
+ called nvec-power
+
+
config NVEC_PAZ00
tristate "Support for OEM specific functions on Compal PAZ00 based devices"
depends on MFD_NVEC && LEDS_CLASS
help
Say Y to enable control of the yellow side leds on Compal PAZ00 based
devices, e.g. Toshbia AC100 and Dynabooks AZ netbooks.
+
+ To compile this driver as a module, say M here: the module will be
+ called nvec-paz00
+
}
nvec = devm_kzalloc(&pdev->dev, sizeof(struct nvec_chip), GFP_KERNEL);
- if (nvec == NULL)
+ if (!nvec)
return -ENOMEM;
platform_set_drvdata(pdev, nvec);
int ret = 0;
led = devm_kzalloc(&pdev->dev, sizeof(*led), GFP_KERNEL);
- if (led == NULL)
+ if (!led)
return -ENOMEM;
led->cdev.max_brightness = NVEC_LED_MAX;
};
};
-static struct power_supply nvec_bat_psy;
-static struct power_supply nvec_psy;
+static struct power_supply *nvec_bat_psy;
+static struct power_supply *nvec_psy;
static int nvec_power_notifier(struct notifier_block *nb,
unsigned long event_type, void *data)
if (res->sub_type == 0) {
if (power->on != res->plu) {
power->on = res->plu;
- power_supply_changed(&nvec_psy);
+ power_supply_changed(nvec_psy);
}
return NOTIFY_STOP;
}
}
power->bat_cap = res->plc[1];
if (status_changed)
- power_supply_changed(&nvec_bat_psy);
+ power_supply_changed(nvec_bat_psy);
break;
case VOLTAGE:
power->bat_voltage_now = res->plu * 1000;
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct nvec_power *power = dev_get_drvdata(psy->dev->parent);
+ struct nvec_power *power = dev_get_drvdata(psy->dev.parent);
switch (psp) {
case POWER_SUPPLY_PROP_ONLINE:
enum power_supply_property psp,
union power_supply_propval *val)
{
- struct nvec_power *power = dev_get_drvdata(psy->dev->parent);
+ struct nvec_power *power = dev_get_drvdata(psy->dev.parent);
switch (psp) {
case POWER_SUPPLY_PROP_STATUS:
"battery",
};
-static struct power_supply nvec_bat_psy = {
+static const struct power_supply_desc nvec_bat_psy_desc = {
.name = "battery",
.type = POWER_SUPPLY_TYPE_BATTERY,
.properties = nvec_battery_props,
.get_property = nvec_battery_get_property,
};
-static struct power_supply nvec_psy = {
+static const struct power_supply_desc nvec_psy_desc = {
.name = "ac",
.type = POWER_SUPPLY_TYPE_MAINS,
- .supplied_to = nvec_power_supplied_to,
- .num_supplicants = ARRAY_SIZE(nvec_power_supplied_to),
.properties = nvec_power_props,
.num_properties = ARRAY_SIZE(nvec_power_props),
.get_property = nvec_power_get_property,
static int nvec_power_probe(struct platform_device *pdev)
{
- struct power_supply *psy;
+ struct power_supply **psy;
+ const struct power_supply_desc *psy_desc;
struct nvec_power *power;
struct nvec_chip *nvec = dev_get_drvdata(pdev->dev.parent);
+ struct power_supply_config psy_cfg = {};
power = devm_kzalloc(&pdev->dev, sizeof(struct nvec_power), GFP_NOWAIT);
- if (power == NULL)
+ if (!power)
return -ENOMEM;
dev_set_drvdata(&pdev->dev, power);
switch (pdev->id) {
case AC:
psy = &nvec_psy;
+ psy_desc = &nvec_psy_desc;
+ psy_cfg.supplied_to = nvec_power_supplied_to;
+ psy_cfg.num_supplicants = ARRAY_SIZE(nvec_power_supplied_to);
power->notifier.notifier_call = nvec_power_notifier;
break;
case BAT:
psy = &nvec_bat_psy;
+ psy_desc = &nvec_bat_psy_desc;
power->notifier.notifier_call = nvec_power_bat_notifier;
break;
if (pdev->id == BAT)
get_bat_mfg_data(power);
- return power_supply_register(&pdev->dev, psy);
+ *psy = power_supply_register(&pdev->dev, psy_desc, &psy_cfg);
+
+ return PTR_ERR_OR_ZERO(*psy);
}
static int nvec_power_remove(struct platform_device *pdev)
nvec_unregister_notifier(power->nvec, &power->notifier);
switch (pdev->id) {
case AC:
- power_supply_unregister(&nvec_psy);
+ power_supply_unregister(nvec_psy);
break;
case BAT:
- power_supply_unregister(&nvec_bat_psy);
+ power_supply_unregister(nvec_bat_psy);
}
return 0;
char mouse_reset[] = { NVEC_PS2, SEND_COMMAND, PSMOUSE_RST, 3 };
ser_dev = devm_kzalloc(&pdev->dev, sizeof(struct serio), GFP_KERNEL);
- if (ser_dev == NULL)
+ if (!ser_dev)
return -ENOMEM;
ser_dev->id.type = SERIO_PS_PSTHRU;
/**
* enum cvmx_usb_pipe_flags - internal flags for a pipe.
*
- * @__CVMX_USB_PIPE_FLAGS_SCHEDULED: Used internally to determine if a pipe is
- * actively using hardware. Do not use.
- * @__CVMX_USB_PIPE_FLAGS_NEED_PING: Used internally to determine if a high
- * speed pipe is in the ping state. Do not
- * use.
+ * @CVMX_USB_PIPE_FLAGS_SCHEDULED: Used internally to determine if a pipe is
+ * actively using hardware.
+ * @CVMX_USB_PIPE_FLAGS_NEED_PING: Used internally to determine if a high speed
+ * pipe is in the ping state.
*/
enum cvmx_usb_pipe_flags {
- __CVMX_USB_PIPE_FLAGS_SCHEDULED = 1 << 17,
- __CVMX_USB_PIPE_FLAGS_NEED_PING = 1 << 18,
+ CVMX_USB_PIPE_FLAGS_SCHEDULED = 1 << 17,
+ CVMX_USB_PIPE_FLAGS_NEED_PING = 1 << 18,
};
/* Maximum number of times to retry failed transactions */
/* Maximum number of hardware channels supported by the USB block */
#define MAX_CHANNELS 8
-/* The highest valid USB device address */
-#define MAX_USB_ADDRESS 127
-
-/* The highest valid USB endpoint number */
-#define MAX_USB_ENDPOINT 15
-
-/* The highest valid port number on a hub */
-#define MAX_USB_HUB_PORT 15
-
/*
* The low level hardware can transfer a maximum of this number of bytes in each
* transfer. The field is 19 bits wide
struct cvmx_usb_state usb;
};
-/* This macro spins on a field waiting for it to reach a value */
-#define CVMX_WAIT_FOR_FIELD32(address, type, field, op, value, timeout_usec)\
+/* This macro spins on a register waiting for it to reach a condition. */
+#define CVMX_WAIT_FOR_FIELD32(address, _union, cond, timeout_usec) \
({int result; \
do { \
uint64_t done = cvmx_get_cycle() + (uint64_t)timeout_usec * \
octeon_get_clock_rate() / 1000000; \
- type c; \
+ union _union c; \
+ \
while (1) { \
- c.u32 = __cvmx_usb_read_csr32(usb, address); \
- if (c.s.field op (value)) { \
+ c.u32 = cvmx_usb_read_csr32(usb, address); \
+ \
+ if (cond) { \
result = 0; \
break; \
} else if (cvmx_get_cycle() > done) { \
* This macro logically sets a single field in a CSR. It does the sequence
* read, modify, and write
*/
-#define USB_SET_FIELD32(address, type, field, value) \
+#define USB_SET_FIELD32(address, _union, field, value) \
do { \
- type c; \
- c.u32 = __cvmx_usb_read_csr32(usb, address); \
+ union _union c; \
+ \
+ c.u32 = cvmx_usb_read_csr32(usb, address); \
c.s.field = value; \
- __cvmx_usb_write_csr32(usb, address, c.u32); \
+ cvmx_usb_write_csr32(usb, address, c.u32); \
} while (0)
/* Returns the IO address to push/pop stuff data from the FIFOs */
/**
* struct octeon_temp_buffer - a bounce buffer for USB transfers
- * @temp_buffer: the newly allocated temporary buffer (including meta-data)
* @orig_buffer: the original buffer passed by the USB stack
* @data: the newly allocated temporary buffer (excluding meta-data)
*
* represents it.
*/
struct octeon_temp_buffer {
- void *temp_buffer;
void *orig_buffer;
u8 data[0];
};
if (!temp)
return -ENOMEM;
- temp->temp_buffer = temp;
temp->orig_buffer = urb->transfer_buffer;
if (usb_urb_dir_out(urb))
memcpy(temp->data, urb->transfer_buffer,
urb->actual_length);
urb->transfer_buffer = temp->orig_buffer;
urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
- kfree(temp->temp_buffer);
+ kfree(temp);
}
/**
*
* Returns: Result of the read
*/
-static inline uint32_t __cvmx_usb_read_csr32(struct cvmx_usb_state *usb,
- uint64_t address)
+static inline uint32_t cvmx_usb_read_csr32(struct cvmx_usb_state *usb,
+ uint64_t address)
{
uint32_t result = cvmx_read64_uint32(address ^ 4);
return result;
* @address: 64bit address to write
* @value: Value to write
*/
-static inline void __cvmx_usb_write_csr32(struct cvmx_usb_state *usb,
- uint64_t address, uint32_t value)
+static inline void cvmx_usb_write_csr32(struct cvmx_usb_state *usb,
+ uint64_t address, uint32_t value)
{
cvmx_write64_uint32(address ^ 4, value);
cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index));
}
-
-/**
- * Read a USB 64bit CSR. It logs the value in a readable format if
- * debugging is on.
- *
- * @usb: USB block this access is for
- * @address: 64bit address to read
- *
- * Returns: Result of the read
- */
-static inline uint64_t __cvmx_usb_read_csr64(struct cvmx_usb_state *usb,
- uint64_t address)
-{
- uint64_t result = cvmx_read64_uint64(address);
- return result;
-}
-
-
-/**
- * Write a USB 64bit CSR. It logs the value in a readable format
- * if debugging is on.
- *
- * @usb: USB block this access is for
- * @address: 64bit address to write
- * @value: Value to write
- */
-static inline void __cvmx_usb_write_csr64(struct cvmx_usb_state *usb,
- uint64_t address, uint64_t value)
-{
- cvmx_write64_uint64(address, value);
-}
-
/**
* Return non zero if this pipe connects to a non HIGH speed
* device through a high speed hub.
*
* Returns: Non zero if we need to do split transactions
*/
-static inline int __cvmx_usb_pipe_needs_split(struct cvmx_usb_state *usb,
- struct cvmx_usb_pipe *pipe)
+static inline int cvmx_usb_pipe_needs_split(struct cvmx_usb_state *usb,
+ struct cvmx_usb_pipe *pipe)
{
return pipe->device_speed != CVMX_USB_SPEED_HIGH &&
usb->usbcx_hprt.s.prtspd == CVMX_USB_SPEED_HIGH;
*
* Returns: PID for pipe
*/
-static inline int __cvmx_usb_get_data_pid(struct cvmx_usb_pipe *pipe)
+static inline int cvmx_usb_get_data_pid(struct cvmx_usb_pipe *pipe)
{
if (pipe->pid_toggle)
return 2; /* Data1 */
return 0; /* Data0 */
}
+static void cvmx_fifo_setup(struct cvmx_usb_state *usb)
+{
+ union cvmx_usbcx_ghwcfg3 usbcx_ghwcfg3;
+ union cvmx_usbcx_gnptxfsiz npsiz;
+ union cvmx_usbcx_hptxfsiz psiz;
+
+ usbcx_ghwcfg3.u32 = cvmx_usb_read_csr32(usb,
+ CVMX_USBCX_GHWCFG3(usb->index));
+
+ /*
+ * Program the USBC_GRXFSIZ register to select the size of the receive
+ * FIFO (25%).
+ */
+ USB_SET_FIELD32(CVMX_USBCX_GRXFSIZ(usb->index), cvmx_usbcx_grxfsiz,
+ rxfdep, usbcx_ghwcfg3.s.dfifodepth / 4);
+
+ /*
+ * Program the USBC_GNPTXFSIZ register to select the size and the start
+ * address of the non-periodic transmit FIFO for nonperiodic
+ * transactions (50%).
+ */
+ npsiz.u32 = cvmx_usb_read_csr32(usb, CVMX_USBCX_GNPTXFSIZ(usb->index));
+ npsiz.s.nptxfdep = usbcx_ghwcfg3.s.dfifodepth / 2;
+ npsiz.s.nptxfstaddr = usbcx_ghwcfg3.s.dfifodepth / 4;
+ cvmx_usb_write_csr32(usb, CVMX_USBCX_GNPTXFSIZ(usb->index), npsiz.u32);
+
+ /*
+ * Program the USBC_HPTXFSIZ register to select the size and start
+ * address of the periodic transmit FIFO for periodic transactions
+ * (25%).
+ */
+ psiz.u32 = cvmx_usb_read_csr32(usb, CVMX_USBCX_HPTXFSIZ(usb->index));
+ psiz.s.ptxfsize = usbcx_ghwcfg3.s.dfifodepth / 4;
+ psiz.s.ptxfstaddr = 3 * usbcx_ghwcfg3.s.dfifodepth / 4;
+ cvmx_usb_write_csr32(usb, CVMX_USBCX_HPTXFSIZ(usb->index), psiz.u32);
+
+ /* Flush all FIFOs */
+ USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index),
+ cvmx_usbcx_grstctl, txfnum, 0x10);
+ USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index),
+ cvmx_usbcx_grstctl, txfflsh, 1);
+ CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_GRSTCTL(usb->index),
+ cvmx_usbcx_grstctl, c.s.txfflsh == 0, 100);
+ USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index),
+ cvmx_usbcx_grstctl, rxfflsh, 1);
+ CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_GRSTCTL(usb->index),
+ cvmx_usbcx_grstctl, c.s.rxfflsh == 0, 100);
+}
+
+/**
+ * Shutdown a USB port after a call to cvmx_usb_initialize().
+ * The port should be disabled with all pipes closed when this
+ * function is called.
+ *
+ * @usb: USB device state populated by cvmx_usb_initialize().
+ *
+ * Returns: 0 or a negative error code.
+ */
+static int cvmx_usb_shutdown(struct cvmx_usb_state *usb)
+{
+ union cvmx_usbnx_clk_ctl usbn_clk_ctl;
+
+ /* Make sure all pipes are closed */
+ if (!list_empty(&usb->idle_pipes) ||
+ !list_empty(&usb->active_pipes[CVMX_USB_TRANSFER_ISOCHRONOUS]) ||
+ !list_empty(&usb->active_pipes[CVMX_USB_TRANSFER_INTERRUPT]) ||
+ !list_empty(&usb->active_pipes[CVMX_USB_TRANSFER_CONTROL]) ||
+ !list_empty(&usb->active_pipes[CVMX_USB_TRANSFER_BULK]))
+ return -EBUSY;
+
+ /* Disable the clocks and put them in power on reset */
+ usbn_clk_ctl.u64 = cvmx_read64_uint64(CVMX_USBNX_CLK_CTL(usb->index));
+ usbn_clk_ctl.s.enable = 1;
+ usbn_clk_ctl.s.por = 1;
+ usbn_clk_ctl.s.hclk_rst = 1;
+ usbn_clk_ctl.s.prst = 0;
+ usbn_clk_ctl.s.hrst = 0;
+ cvmx_write64_uint64(CVMX_USBNX_CLK_CTL(usb->index), usbn_clk_ctl.u64);
+ return 0;
+}
+
/**
* Initialize a USB port for use. This must be called before any
* other access to the Octeon USB port is made. The port starts
* off in the disabled state.
*
- * @usb: Pointer to an empty struct cvmx_usb_state
- * that will be populated by the initialize call.
- * This structure is then passed to all other USB
- * functions.
- * @usb_port_number:
- * Which Octeon USB port to initialize.
+ * @dev: Pointer to struct device for logging purposes.
+ * @usb: Pointer to struct cvmx_usb_state.
*
* Returns: 0 or a negative error code.
*/
-static int cvmx_usb_initialize(struct cvmx_usb_state *usb,
- int usb_port_number,
- enum cvmx_usb_initialize_flags flags)
+static int cvmx_usb_initialize(struct device *dev,
+ struct cvmx_usb_state *usb)
{
+ int channel;
+ int divisor;
+ int retries = 0;
+ union cvmx_usbcx_hcfg usbcx_hcfg;
union cvmx_usbnx_clk_ctl usbn_clk_ctl;
+ union cvmx_usbcx_gintsts usbc_gintsts;
+ union cvmx_usbcx_gahbcfg usbcx_gahbcfg;
+ union cvmx_usbcx_gintmsk usbcx_gintmsk;
+ union cvmx_usbcx_gusbcfg usbcx_gusbcfg;
union cvmx_usbnx_usbp_ctl_status usbn_usbp_ctl_status;
- int i;
-
- /* At first allow 0-1 for the usb port number */
- if ((usb_port_number < 0) || (usb_port_number > 1))
- return -EINVAL;
-
- memset(usb, 0, sizeof(*usb));
- usb->init_flags = flags;
-
- /* Initialize the USB state structure */
- usb->index = usb_port_number;
- INIT_LIST_HEAD(&usb->idle_pipes);
- for (i = 0; i < ARRAY_SIZE(usb->active_pipes); i++)
- INIT_LIST_HEAD(&usb->active_pipes[i]);
+retry:
/*
* Power On Reset and PHY Initialization
*
* 2a. Write USBN0/1_CLK_CTL[POR] = 1 and
* USBN0/1_CLK_CTL[HRST,PRST,HCLK_RST] = 0
*/
- usbn_clk_ctl.u64 =
- __cvmx_usb_read_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index));
+ usbn_clk_ctl.u64 = cvmx_read64_uint64(CVMX_USBNX_CLK_CTL(usb->index));
usbn_clk_ctl.s.por = 1;
usbn_clk_ctl.s.hrst = 0;
usbn_clk_ctl.s.prst = 0;
/* From CN52XX manual */
usbn_clk_ctl.s.p_rtype = 1;
- switch (flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK) {
+ switch (usb->init_flags &
+ CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK) {
case CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ:
usbn_clk_ctl.s.p_c_sel = 0;
break;
* setting USBN0/1_CLK_CTL[ENABLE] = 1. Divide the core clock down
* such that USB is as close as possible to 125Mhz
*/
- {
- int divisor = DIV_ROUND_UP(octeon_get_clock_rate(), 125000000);
- /* Lower than 4 doesn't seem to work properly */
- if (divisor < 4)
- divisor = 4;
- usbn_clk_ctl.s.divide = divisor;
- usbn_clk_ctl.s.divide2 = 0;
- }
- __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
- usbn_clk_ctl.u64);
+ divisor = DIV_ROUND_UP(octeon_get_clock_rate(), 125000000);
+ /* Lower than 4 doesn't seem to work properly */
+ if (divisor < 4)
+ divisor = 4;
+ usbn_clk_ctl.s.divide = divisor;
+ usbn_clk_ctl.s.divide2 = 0;
+ cvmx_write64_uint64(CVMX_USBNX_CLK_CTL(usb->index), usbn_clk_ctl.u64);
+
/* 2d. Write USBN0/1_CLK_CTL[HCLK_RST] = 1 */
usbn_clk_ctl.s.hclk_rst = 1;
- __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
- usbn_clk_ctl.u64);
+ cvmx_write64_uint64(CVMX_USBNX_CLK_CTL(usb->index), usbn_clk_ctl.u64);
/* 2e. Wait 64 core-clock cycles for HCLK to stabilize */
cvmx_wait(64);
/*
* USBN_CLK_CTL[POR] = 0
*/
usbn_clk_ctl.s.por = 0;
- __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
- usbn_clk_ctl.u64);
+ cvmx_write64_uint64(CVMX_USBNX_CLK_CTL(usb->index), usbn_clk_ctl.u64);
/* 4. Wait 1 ms for PHY clock to start */
mdelay(1);
/*
* USBP control and status register:
* USBN_USBP_CTL_STATUS[ATE_RESET] = 1
*/
- usbn_usbp_ctl_status.u64 = __cvmx_usb_read_csr64(usb,
- CVMX_USBNX_USBP_CTL_STATUS(usb->index));
+ usbn_usbp_ctl_status.u64 =
+ cvmx_read64_uint64(CVMX_USBNX_USBP_CTL_STATUS(usb->index));
usbn_usbp_ctl_status.s.ate_reset = 1;
- __cvmx_usb_write_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index),
- usbn_usbp_ctl_status.u64);
+ cvmx_write64_uint64(CVMX_USBNX_USBP_CTL_STATUS(usb->index),
+ usbn_usbp_ctl_status.u64);
/* 6. Wait 10 cycles */
cvmx_wait(10);
/*
* USBN_USBP_CTL_STATUS[ATE_RESET] = 0
*/
usbn_usbp_ctl_status.s.ate_reset = 0;
- __cvmx_usb_write_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index),
- usbn_usbp_ctl_status.u64);
+ cvmx_write64_uint64(CVMX_USBNX_USBP_CTL_STATUS(usb->index),
+ usbn_usbp_ctl_status.u64);
/*
* 8. Program the PHY reset field in the USBN clock-control register:
* USBN_CLK_CTL[PRST] = 1
*/
usbn_clk_ctl.s.prst = 1;
- __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
- usbn_clk_ctl.u64);
+ cvmx_write64_uint64(CVMX_USBNX_CLK_CTL(usb->index), usbn_clk_ctl.u64);
/*
* 9. Program the USBP control and status register to select host or
* device mode. USBN_USBP_CTL_STATUS[HST_MODE] = 0 for host, = 1 for
* device
*/
usbn_usbp_ctl_status.s.hst_mode = 0;
- __cvmx_usb_write_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index),
- usbn_usbp_ctl_status.u64);
+ cvmx_write64_uint64(CVMX_USBNX_USBP_CTL_STATUS(usb->index),
+ usbn_usbp_ctl_status.u64);
/* 10. Wait 1 us */
udelay(1);
/*
* USBN_CLK_CTL[HRST] = 1
*/
usbn_clk_ctl.s.hrst = 1;
- __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
- usbn_clk_ctl.u64);
+ cvmx_write64_uint64(CVMX_USBNX_CLK_CTL(usb->index), usbn_clk_ctl.u64);
/* 12. Proceed to USB core initialization */
usbn_clk_ctl.s.enable = 1;
- __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
- usbn_clk_ctl.u64);
+ cvmx_write64_uint64(CVMX_USBNX_CLK_CTL(usb->index), usbn_clk_ctl.u64);
udelay(1);
/*
* USBC_GAHBCFG[PTXFEMPLVL]
* Global interrupt mask, USBC_GAHBCFG[GLBLINTRMSK] = 1
*/
- {
- union cvmx_usbcx_gahbcfg usbcx_gahbcfg;
- /* Due to an errata, CN31XX doesn't support DMA */
- if (OCTEON_IS_MODEL(OCTEON_CN31XX))
- usb->init_flags |= CVMX_USB_INITIALIZE_FLAGS_NO_DMA;
- usbcx_gahbcfg.u32 = 0;
- usbcx_gahbcfg.s.dmaen = !(usb->init_flags &
- CVMX_USB_INITIALIZE_FLAGS_NO_DMA);
- if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
- /* Only use one channel with non DMA */
- usb->idle_hardware_channels = 0x1;
- else if (OCTEON_IS_MODEL(OCTEON_CN5XXX))
- /* CN5XXX have an errata with channel 3 */
- usb->idle_hardware_channels = 0xf7;
- else
- usb->idle_hardware_channels = 0xff;
- usbcx_gahbcfg.s.hbstlen = 0;
- usbcx_gahbcfg.s.nptxfemplvl = 1;
- usbcx_gahbcfg.s.ptxfemplvl = 1;
- usbcx_gahbcfg.s.glblintrmsk = 1;
- __cvmx_usb_write_csr32(usb, CVMX_USBCX_GAHBCFG(usb->index),
- usbcx_gahbcfg.u32);
- }
+ usbcx_gahbcfg.u32 = 0;
+ usbcx_gahbcfg.s.dmaen = !(usb->init_flags &
+ CVMX_USB_INITIALIZE_FLAGS_NO_DMA);
+ usbcx_gahbcfg.s.hbstlen = 0;
+ usbcx_gahbcfg.s.nptxfemplvl = 1;
+ usbcx_gahbcfg.s.ptxfemplvl = 1;
+ usbcx_gahbcfg.s.glblintrmsk = 1;
+ cvmx_usb_write_csr32(usb, CVMX_USBCX_GAHBCFG(usb->index),
+ usbcx_gahbcfg.u32);
+
/*
* 3. Program the following fields in USBC_GUSBCFG register.
* HS/FS timeout calibration, USBC_GUSBCFG[TOUTCAL] = 0
* USB turnaround time, USBC_GUSBCFG[USBTRDTIM] = 0x5
* PHY low-power clock select, USBC_GUSBCFG[PHYLPWRCLKSEL] = 0
*/
- {
- union cvmx_usbcx_gusbcfg usbcx_gusbcfg;
-
- usbcx_gusbcfg.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_GUSBCFG(usb->index));
- usbcx_gusbcfg.s.toutcal = 0;
- usbcx_gusbcfg.s.ddrsel = 0;
- usbcx_gusbcfg.s.usbtrdtim = 0x5;
- usbcx_gusbcfg.s.phylpwrclksel = 0;
- __cvmx_usb_write_csr32(usb, CVMX_USBCX_GUSBCFG(usb->index),
- usbcx_gusbcfg.u32);
- }
+ usbcx_gusbcfg.u32 = cvmx_usb_read_csr32(usb,
+ CVMX_USBCX_GUSBCFG(usb->index));
+ usbcx_gusbcfg.s.toutcal = 0;
+ usbcx_gusbcfg.s.ddrsel = 0;
+ usbcx_gusbcfg.s.usbtrdtim = 0x5;
+ usbcx_gusbcfg.s.phylpwrclksel = 0;
+ cvmx_usb_write_csr32(usb, CVMX_USBCX_GUSBCFG(usb->index),
+ usbcx_gusbcfg.u32);
+
/*
* 4. The software must unmask the following bits in the USBC_GINTMSK
* register.
* OTG interrupt mask, USBC_GINTMSK[OTGINTMSK] = 1
* Mode mismatch interrupt mask, USBC_GINTMSK[MODEMISMSK] = 1
*/
- {
- union cvmx_usbcx_gintmsk usbcx_gintmsk;
- int channel;
-
- usbcx_gintmsk.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_GINTMSK(usb->index));
- usbcx_gintmsk.s.otgintmsk = 1;
- usbcx_gintmsk.s.modemismsk = 1;
- usbcx_gintmsk.s.hchintmsk = 1;
- usbcx_gintmsk.s.sofmsk = 0;
- /* We need RX FIFO interrupts if we don't have DMA */
- if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
- usbcx_gintmsk.s.rxflvlmsk = 1;
- __cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTMSK(usb->index),
- usbcx_gintmsk.u32);
-
- /*
- * Disable all channel interrupts. We'll enable them per channel
- * later.
- */
- for (channel = 0; channel < 8; channel++)
- __cvmx_usb_write_csr32(usb,
- CVMX_USBCX_HCINTMSKX(channel, usb->index), 0);
- }
-
- {
- /*
- * Host Port Initialization
- *
- * 1. Program the host-port interrupt-mask field to unmask,
- * USBC_GINTMSK[PRTINT] = 1
- */
- USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
- union cvmx_usbcx_gintmsk, prtintmsk, 1);
- USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
- union cvmx_usbcx_gintmsk, disconnintmsk, 1);
- /*
- * 2. Program the USBC_HCFG register to select full-speed host
- * or high-speed host.
- */
- {
- union cvmx_usbcx_hcfg usbcx_hcfg;
-
- usbcx_hcfg.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_HCFG(usb->index));
- usbcx_hcfg.s.fslssupp = 0;
- usbcx_hcfg.s.fslspclksel = 0;
- __cvmx_usb_write_csr32(usb,
- CVMX_USBCX_HCFG(usb->index),
- usbcx_hcfg.u32);
- }
- /*
- * 3. Program the port power bit to drive VBUS on the USB,
- * USBC_HPRT[PRTPWR] = 1
- */
- USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index),
- union cvmx_usbcx_hprt, prtpwr, 1);
-
- /*
- * Steps 4-15 from the manual are done later in the port enable
- */
- }
+ usbcx_gintmsk.u32 = cvmx_usb_read_csr32(usb,
+ CVMX_USBCX_GINTMSK(usb->index));
+ usbcx_gintmsk.s.otgintmsk = 1;
+ usbcx_gintmsk.s.modemismsk = 1;
+ usbcx_gintmsk.s.hchintmsk = 1;
+ usbcx_gintmsk.s.sofmsk = 0;
+ /* We need RX FIFO interrupts if we don't have DMA */
+ if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
+ usbcx_gintmsk.s.rxflvlmsk = 1;
+ cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTMSK(usb->index),
+ usbcx_gintmsk.u32);
- return 0;
-}
+ /*
+ * Disable all channel interrupts. We'll enable them per channel later.
+ */
+ for (channel = 0; channel < 8; channel++)
+ cvmx_usb_write_csr32(usb,
+ CVMX_USBCX_HCINTMSKX(channel, usb->index),
+ 0);
+ /*
+ * Host Port Initialization
+ *
+ * 1. Program the host-port interrupt-mask field to unmask,
+ * USBC_GINTMSK[PRTINT] = 1
+ */
+ USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
+ cvmx_usbcx_gintmsk, prtintmsk, 1);
+ USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
+ cvmx_usbcx_gintmsk, disconnintmsk, 1);
-/**
- * Shutdown a USB port after a call to cvmx_usb_initialize().
- * The port should be disabled with all pipes closed when this
- * function is called.
- *
- * @usb: USB device state populated by cvmx_usb_initialize().
- *
- * Returns: 0 or a negative error code.
- */
-static int cvmx_usb_shutdown(struct cvmx_usb_state *usb)
-{
- union cvmx_usbnx_clk_ctl usbn_clk_ctl;
+ /*
+ * 2. Program the USBC_HCFG register to select full-speed host
+ * or high-speed host.
+ */
+ usbcx_hcfg.u32 = cvmx_usb_read_csr32(usb, CVMX_USBCX_HCFG(usb->index));
+ usbcx_hcfg.s.fslssupp = 0;
+ usbcx_hcfg.s.fslspclksel = 0;
+ cvmx_usb_write_csr32(usb, CVMX_USBCX_HCFG(usb->index), usbcx_hcfg.u32);
- /* Make sure all pipes are closed */
- if (!list_empty(&usb->idle_pipes) ||
- !list_empty(&usb->active_pipes[CVMX_USB_TRANSFER_ISOCHRONOUS]) ||
- !list_empty(&usb->active_pipes[CVMX_USB_TRANSFER_INTERRUPT]) ||
- !list_empty(&usb->active_pipes[CVMX_USB_TRANSFER_CONTROL]) ||
- !list_empty(&usb->active_pipes[CVMX_USB_TRANSFER_BULK]))
- return -EBUSY;
+ cvmx_fifo_setup(usb);
- /* Disable the clocks and put them in power on reset */
- usbn_clk_ctl.u64 = __cvmx_usb_read_csr64(usb,
- CVMX_USBNX_CLK_CTL(usb->index));
- usbn_clk_ctl.s.enable = 1;
- usbn_clk_ctl.s.por = 1;
- usbn_clk_ctl.s.hclk_rst = 1;
- usbn_clk_ctl.s.prst = 0;
- usbn_clk_ctl.s.hrst = 0;
- __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index),
- usbn_clk_ctl.u64);
- return 0;
+ /*
+ * If the controller is getting port events right after the reset, it
+ * means the initialization failed. Try resetting the controller again
+ * in such case. This is seen to happen after cold boot on DSR-1000N.
+ */
+ usbc_gintsts.u32 = cvmx_usb_read_csr32(usb,
+ CVMX_USBCX_GINTSTS(usb->index));
+ cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTSTS(usb->index),
+ usbc_gintsts.u32);
+ dev_dbg(dev, "gintsts after reset: 0x%x\n", (int)usbc_gintsts.u32);
+ if (!usbc_gintsts.s.disconnint && !usbc_gintsts.s.prtint)
+ return 0;
+ if (retries++ >= 5)
+ return -EAGAIN;
+ dev_info(dev, "controller reset failed (gintsts=0x%x) - retrying\n",
+ (int)usbc_gintsts.u32);
+ msleep(50);
+ cvmx_usb_shutdown(usb);
+ msleep(50);
+ goto retry;
}
-
/**
- * Enable a USB port. After this call succeeds, the USB port is
+ * Reset a USB port. After this call succeeds, the USB port is
* online and servicing requests.
*
* @usb: USB device state populated by cvmx_usb_initialize().
- *
- * Returns: 0 or a negative error code.
*/
-static int cvmx_usb_enable(struct cvmx_usb_state *usb)
+static void cvmx_usb_reset_port(struct cvmx_usb_state *usb)
{
- union cvmx_usbcx_ghwcfg3 usbcx_ghwcfg3;
-
- usb->usbcx_hprt.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_HPRT(usb->index));
-
- /*
- * If the port is already enabled the just return. We don't need to do
- * anything
- */
- if (usb->usbcx_hprt.s.prtena)
- return 0;
-
- /* If there is nothing plugged into the port then fail immediately */
- if (!usb->usbcx_hprt.s.prtconnsts)
- return -ETIMEDOUT;
+ usb->usbcx_hprt.u32 = cvmx_usb_read_csr32(usb,
+ CVMX_USBCX_HPRT(usb->index));
/* Program the port reset bit to start the reset process */
- USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), union cvmx_usbcx_hprt,
+ USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), cvmx_usbcx_hprt,
prtrst, 1);
/*
mdelay(50);
/* Program the port reset bit to 0, USBC_HPRT[PRTRST] = 0 */
- USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), union cvmx_usbcx_hprt,
+ USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), cvmx_usbcx_hprt,
prtrst, 0);
- /* Wait for the USBC_HPRT[PRTENA]. */
- if (CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_HPRT(usb->index),
- union cvmx_usbcx_hprt, prtena, ==, 1, 100000))
- return -ETIMEDOUT;
-
/*
* Read the port speed field to get the enumerated speed,
* USBC_HPRT[PRTSPD].
*/
- usb->usbcx_hprt.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_HPRT(usb->index));
- usbcx_ghwcfg3.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_GHWCFG3(usb->index));
-
- /*
- * 13. Program the USBC_GRXFSIZ register to select the size of the
- * receive FIFO (25%).
- */
- USB_SET_FIELD32(CVMX_USBCX_GRXFSIZ(usb->index),
- union cvmx_usbcx_grxfsiz, rxfdep,
- usbcx_ghwcfg3.s.dfifodepth / 4);
- /*
- * 14. Program the USBC_GNPTXFSIZ register to select the size and the
- * start address of the non- periodic transmit FIFO for nonperiodic
- * transactions (50%).
- */
- {
- union cvmx_usbcx_gnptxfsiz siz;
-
- siz.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_GNPTXFSIZ(usb->index));
- siz.s.nptxfdep = usbcx_ghwcfg3.s.dfifodepth / 2;
- siz.s.nptxfstaddr = usbcx_ghwcfg3.s.dfifodepth / 4;
- __cvmx_usb_write_csr32(usb, CVMX_USBCX_GNPTXFSIZ(usb->index),
- siz.u32);
- }
- /*
- * 15. Program the USBC_HPTXFSIZ register to select the size and start
- * address of the periodic transmit FIFO for periodic transactions
- * (25%).
- */
- {
- union cvmx_usbcx_hptxfsiz siz;
-
- siz.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_HPTXFSIZ(usb->index));
- siz.s.ptxfsize = usbcx_ghwcfg3.s.dfifodepth / 4;
- siz.s.ptxfstaddr = 3 * usbcx_ghwcfg3.s.dfifodepth / 4;
- __cvmx_usb_write_csr32(usb, CVMX_USBCX_HPTXFSIZ(usb->index),
- siz.u32);
- }
- /* Flush all FIFOs */
- USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index),
- union cvmx_usbcx_grstctl, txfnum, 0x10);
- USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index),
- union cvmx_usbcx_grstctl, txfflsh, 1);
- CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_GRSTCTL(usb->index),
- union cvmx_usbcx_grstctl,
- txfflsh, ==, 0, 100);
- USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index),
- union cvmx_usbcx_grstctl, rxfflsh, 1);
- CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_GRSTCTL(usb->index),
- union cvmx_usbcx_grstctl,
- rxfflsh, ==, 0, 100);
-
- return 0;
+ usb->usbcx_hprt.u32 = cvmx_usb_read_csr32(usb,
+ CVMX_USBCX_HPRT(usb->index));
}
static int cvmx_usb_disable(struct cvmx_usb_state *usb)
{
/* Disable the port */
- USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), union cvmx_usbcx_hprt,
+ USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), cvmx_usbcx_hprt,
prtena, 1);
return 0;
}
memset(&result, 0, sizeof(result));
- usbc_hprt.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_HPRT(usb->index));
+ usbc_hprt.u32 = cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index));
result.port_enabled = usbc_hprt.s.prtena;
result.port_over_current = usbc_hprt.s.prtovrcurract;
result.port_powered = usbc_hprt.s.prtpwr;
{
struct cvmx_usb_pipe *pipe;
- if (unlikely((device_addr < 0) || (device_addr > MAX_USB_ADDRESS)))
- return NULL;
- if (unlikely((endpoint_num < 0) || (endpoint_num > MAX_USB_ENDPOINT)))
- return NULL;
- if (unlikely(device_speed > CVMX_USB_SPEED_LOW))
- return NULL;
- if (unlikely((max_packet <= 0) || (max_packet > 1024)))
- return NULL;
- if (unlikely(transfer_type > CVMX_USB_TRANSFER_INTERRUPT))
- return NULL;
- if (unlikely((transfer_dir != CVMX_USB_DIRECTION_OUT) &&
- (transfer_dir != CVMX_USB_DIRECTION_IN)))
- return NULL;
- if (unlikely(interval < 0))
- return NULL;
- if (unlikely((transfer_type == CVMX_USB_TRANSFER_CONTROL) && interval))
- return NULL;
- if (unlikely(multi_count < 0))
- return NULL;
- if (unlikely((device_speed != CVMX_USB_SPEED_HIGH) &&
- (multi_count != 0)))
- return NULL;
- if (unlikely((hub_device_addr < 0) ||
- (hub_device_addr > MAX_USB_ADDRESS)))
- return NULL;
- if (unlikely((hub_port < 0) || (hub_port > MAX_USB_HUB_PORT)))
- return NULL;
-
pipe = kzalloc(sizeof(*pipe), GFP_ATOMIC);
if (!pipe)
return NULL;
if ((device_speed == CVMX_USB_SPEED_HIGH) &&
(transfer_dir == CVMX_USB_DIRECTION_OUT) &&
(transfer_type == CVMX_USB_TRANSFER_BULK))
- pipe->flags |= __CVMX_USB_PIPE_FLAGS_NEED_PING;
+ pipe->flags |= CVMX_USB_PIPE_FLAGS_NEED_PING;
pipe->device_addr = device_addr;
pipe->endpoint_num = endpoint_num;
pipe->device_speed = device_speed;
*/
if (!interval)
interval = 1;
- if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
+ if (cvmx_usb_pipe_needs_split(usb, pipe)) {
pipe->interval = interval*8;
/* Force start splits to be schedule on uFrame 0 */
pipe->next_tx_frame = ((usb->frame_number+7)&~7) +
*
* @usb: USB device state populated by cvmx_usb_initialize().
*/
-static void __cvmx_usb_poll_rx_fifo(struct cvmx_usb_state *usb)
+static void cvmx_usb_poll_rx_fifo(struct cvmx_usb_state *usb)
{
union cvmx_usbcx_grxstsph rx_status;
int channel;
uint64_t address;
uint32_t *ptr;
- rx_status.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_GRXSTSPH(usb->index));
+ rx_status.u32 = cvmx_usb_read_csr32(usb,
+ CVMX_USBCX_GRXSTSPH(usb->index));
/* Only read data if IN data is there */
if (rx_status.s.pktsts != 2)
return;
return;
/* Get where the DMA engine would have written this data */
- address = __cvmx_usb_read_csr64(usb,
- CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8);
+ address = cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index) +
+ channel * 8);
ptr = cvmx_phys_to_ptr(address);
- __cvmx_usb_write_csr64(usb,
- CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8,
- address + bytes);
+ cvmx_write64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel * 8,
+ address + bytes);
/* Loop writing the FIFO data for this packet into memory */
while (bytes > 0) {
- *ptr++ = __cvmx_usb_read_csr32(usb,
- USB_FIFO_ADDRESS(channel, usb->index));
+ *ptr++ = cvmx_usb_read_csr32(usb,
+ USB_FIFO_ADDRESS(channel, usb->index));
bytes -= 4;
}
CVMX_SYNCW;
* Returns: Non zero if the hardware fifo was too small and needs
* to be serviced again.
*/
-static int __cvmx_usb_fill_tx_hw(struct cvmx_usb_state *usb,
- struct cvmx_usb_tx_fifo *fifo, int available)
+static int cvmx_usb_fill_tx_hw(struct cvmx_usb_state *usb,
+ struct cvmx_usb_tx_fifo *fifo, int available)
{
/*
* We're done either when there isn't anymore space or the software FIFO
*
* @usb: USB device state populated by cvmx_usb_initialize().
*/
-static void __cvmx_usb_poll_tx_fifo(struct cvmx_usb_state *usb)
+static void cvmx_usb_poll_tx_fifo(struct cvmx_usb_state *usb)
{
if (usb->periodic.head != usb->periodic.tail) {
union cvmx_usbcx_hptxsts tx_status;
- tx_status.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_HPTXSTS(usb->index));
- if (__cvmx_usb_fill_tx_hw(usb, &usb->periodic,
- tx_status.s.ptxfspcavail))
+ tx_status.u32 = cvmx_usb_read_csr32(usb,
+ CVMX_USBCX_HPTXSTS(usb->index));
+ if (cvmx_usb_fill_tx_hw(usb, &usb->periodic,
+ tx_status.s.ptxfspcavail))
USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
- union cvmx_usbcx_gintmsk,
- ptxfempmsk, 1);
+ cvmx_usbcx_gintmsk, ptxfempmsk, 1);
else
USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
- union cvmx_usbcx_gintmsk,
- ptxfempmsk, 0);
+ cvmx_usbcx_gintmsk, ptxfempmsk, 0);
}
if (usb->nonperiodic.head != usb->nonperiodic.tail) {
union cvmx_usbcx_gnptxsts tx_status;
- tx_status.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_GNPTXSTS(usb->index));
- if (__cvmx_usb_fill_tx_hw(usb, &usb->nonperiodic,
- tx_status.s.nptxfspcavail))
+ tx_status.u32 = cvmx_usb_read_csr32(usb,
+ CVMX_USBCX_GNPTXSTS(usb->index));
+ if (cvmx_usb_fill_tx_hw(usb, &usb->nonperiodic,
+ tx_status.s.nptxfspcavail))
USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
- union cvmx_usbcx_gintmsk,
- nptxfempmsk, 1);
+ cvmx_usbcx_gintmsk, nptxfempmsk, 1);
else
USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
- union cvmx_usbcx_gintmsk,
- nptxfempmsk, 0);
+ cvmx_usbcx_gintmsk, nptxfempmsk, 0);
}
}
* @usb: USB device state populated by cvmx_usb_initialize().
* @channel: Channel number to get packet from
*/
-static void __cvmx_usb_fill_tx_fifo(struct cvmx_usb_state *usb, int channel)
+static void cvmx_usb_fill_tx_fifo(struct cvmx_usb_state *usb, int channel)
{
union cvmx_usbcx_hccharx hcchar;
union cvmx_usbcx_hcspltx usbc_hcsplt;
struct cvmx_usb_tx_fifo *fifo;
/* We only need to fill data on outbound channels */
- hcchar.u32 = __cvmx_usb_read_csr32(usb,
+ hcchar.u32 = cvmx_usb_read_csr32(usb,
CVMX_USBCX_HCCHARX(channel, usb->index));
if (hcchar.s.epdir != CVMX_USB_DIRECTION_OUT)
return;
/* OUT Splits only have data on the start and not the complete */
- usbc_hcsplt.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_HCSPLTX(channel, usb->index));
+ usbc_hcsplt.u32 = cvmx_usb_read_csr32(usb,
+ CVMX_USBCX_HCSPLTX(channel, usb->index));
if (usbc_hcsplt.s.spltena && usbc_hcsplt.s.compsplt)
return;
* Find out how many bytes we need to fill and convert it into 32bit
* words.
*/
- usbc_hctsiz.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_HCTSIZX(channel, usb->index));
+ usbc_hctsiz.u32 = cvmx_usb_read_csr32(usb,
+ CVMX_USBCX_HCTSIZX(channel, usb->index));
if (!usbc_hctsiz.s.xfersize)
return;
fifo = &usb->nonperiodic;
fifo->entry[fifo->head].channel = channel;
- fifo->entry[fifo->head].address = __cvmx_usb_read_csr64(usb,
- CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8);
+ fifo->entry[fifo->head].address =
+ cvmx_read64_uint64(CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) +
+ channel * 8);
fifo->entry[fifo->head].size = (usbc_hctsiz.s.xfersize+3)>>2;
fifo->head++;
if (fifo->head > MAX_CHANNELS)
fifo->head = 0;
- __cvmx_usb_poll_tx_fifo(usb);
+ cvmx_usb_poll_tx_fifo(usb);
}
/**
* Perform channel specific setup for Control transactions. All
- * the generic stuff will already have been done in
- * __cvmx_usb_start_channel()
+ * the generic stuff will already have been done in cvmx_usb_start_channel().
*
* @usb: USB device state populated by cvmx_usb_initialize().
* @channel: Channel to setup
* @pipe: Pipe for control transaction
*/
-static void __cvmx_usb_start_channel_control(struct cvmx_usb_state *usb,
- int channel,
- struct cvmx_usb_pipe *pipe)
+static void cvmx_usb_start_channel_control(struct cvmx_usb_state *usb,
+ int channel,
+ struct cvmx_usb_pipe *pipe)
{
struct octeon_hcd *priv = cvmx_usb_to_octeon(usb);
struct usb_hcd *hcd = octeon_to_hcd(priv);
int packets_to_transfer;
union cvmx_usbcx_hctsizx usbc_hctsiz;
- usbc_hctsiz.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_HCTSIZX(channel, usb->index));
+ usbc_hctsiz.u32 = cvmx_usb_read_csr32(usb,
+ CVMX_USBCX_HCTSIZX(channel, usb->index));
switch (transaction->stage) {
case CVMX_USB_STAGE_NON_CONTROL:
bytes_to_transfer = sizeof(*header);
/* All Control operations start with a setup going OUT */
USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
- union cvmx_usbcx_hccharx, epdir,
+ cvmx_usbcx_hccharx, epdir,
CVMX_USB_DIRECTION_OUT);
/*
* Setup send the control header instead of the buffer data. The
* buffer data will be used in the next stage
*/
- __cvmx_usb_write_csr64(usb,
- CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8,
- transaction->control_header);
+ cvmx_write64_uint64(CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) +
+ channel * 8,
+ transaction->control_header);
break;
case CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE:
usbc_hctsiz.s.pid = 3; /* Setup */
bytes_to_transfer = 0;
/* All Control operations start with a setup going OUT */
USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
- union cvmx_usbcx_hccharx, epdir,
+ cvmx_usbcx_hccharx, epdir,
CVMX_USB_DIRECTION_OUT);
USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index),
- union cvmx_usbcx_hcspltx, compsplt, 1);
+ cvmx_usbcx_hcspltx, compsplt, 1);
break;
case CVMX_USB_STAGE_DATA:
- usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
- if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
+ usbc_hctsiz.s.pid = cvmx_usb_get_data_pid(pipe);
+ if (cvmx_usb_pipe_needs_split(usb, pipe)) {
if (header->bRequestType & USB_DIR_IN)
bytes_to_transfer = 0;
else if (bytes_to_transfer > pipe->max_packet)
bytes_to_transfer = pipe->max_packet;
}
USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
- union cvmx_usbcx_hccharx, epdir,
+ cvmx_usbcx_hccharx, epdir,
((header->bRequestType & USB_DIR_IN) ?
CVMX_USB_DIRECTION_IN :
CVMX_USB_DIRECTION_OUT));
break;
case CVMX_USB_STAGE_DATA_SPLIT_COMPLETE:
- usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
+ usbc_hctsiz.s.pid = cvmx_usb_get_data_pid(pipe);
if (!(header->bRequestType & USB_DIR_IN))
bytes_to_transfer = 0;
USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
- union cvmx_usbcx_hccharx, epdir,
+ cvmx_usbcx_hccharx, epdir,
((header->bRequestType & USB_DIR_IN) ?
CVMX_USB_DIRECTION_IN :
CVMX_USB_DIRECTION_OUT));
USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index),
- union cvmx_usbcx_hcspltx, compsplt, 1);
+ cvmx_usbcx_hcspltx, compsplt, 1);
break;
case CVMX_USB_STAGE_STATUS:
- usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
+ usbc_hctsiz.s.pid = cvmx_usb_get_data_pid(pipe);
bytes_to_transfer = 0;
USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
- union cvmx_usbcx_hccharx, epdir,
+ cvmx_usbcx_hccharx, epdir,
((header->bRequestType & USB_DIR_IN) ?
CVMX_USB_DIRECTION_OUT :
CVMX_USB_DIRECTION_IN));
break;
case CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE:
- usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
+ usbc_hctsiz.s.pid = cvmx_usb_get_data_pid(pipe);
bytes_to_transfer = 0;
USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
- union cvmx_usbcx_hccharx, epdir,
+ cvmx_usbcx_hccharx, epdir,
((header->bRequestType & USB_DIR_IN) ?
CVMX_USB_DIRECTION_OUT :
CVMX_USB_DIRECTION_IN));
USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index),
- union cvmx_usbcx_hcspltx, compsplt, 1);
+ cvmx_usbcx_hcspltx, compsplt, 1);
break;
}
usbc_hctsiz.s.xfersize = bytes_to_transfer;
usbc_hctsiz.s.pktcnt = packets_to_transfer;
- __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index),
- usbc_hctsiz.u32);
+ cvmx_usb_write_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index),
+ usbc_hctsiz.u32);
}
* @channel: Channel to setup
* @pipe: Pipe to start
*/
-static void __cvmx_usb_start_channel(struct cvmx_usb_state *usb,
- int channel,
- struct cvmx_usb_pipe *pipe)
+static void cvmx_usb_start_channel(struct cvmx_usb_state *usb, int channel,
+ struct cvmx_usb_pipe *pipe)
{
struct cvmx_usb_transaction *transaction =
list_first_entry(&pipe->transactions, typeof(*transaction),
/* Attach the channel to the pipe */
usb->pipe_for_channel[channel] = pipe;
pipe->channel = channel;
- pipe->flags |= __CVMX_USB_PIPE_FLAGS_SCHEDULED;
+ pipe->flags |= CVMX_USB_PIPE_FLAGS_SCHEDULED;
/* Mark this channel as in use */
usb->idle_hardware_channels &= ~(1<<channel);
union cvmx_usbcx_haintmsk usbc_haintmsk;
/* Clear all channel status bits */
- usbc_hcint.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_HCINTX(channel, usb->index));
+ usbc_hcint.u32 = cvmx_usb_read_csr32(usb,
+ CVMX_USBCX_HCINTX(channel, usb->index));
- __cvmx_usb_write_csr32(usb,
- CVMX_USBCX_HCINTX(channel, usb->index),
- usbc_hcint.u32);
+ cvmx_usb_write_csr32(usb,
+ CVMX_USBCX_HCINTX(channel, usb->index),
+ usbc_hcint.u32);
usbc_hcintmsk.u32 = 0;
usbc_hcintmsk.s.chhltdmsk = 1;
usbc_hcintmsk.s.frmovrunmsk = 1;
usbc_hcintmsk.s.bblerrmsk = 1;
usbc_hcintmsk.s.xacterrmsk = 1;
- if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
+ if (cvmx_usb_pipe_needs_split(usb, pipe)) {
/*
* Splits don't generate xfercompl, so we need
* ACK and NYET.
usbc_hcintmsk.s.stallmsk = 1;
usbc_hcintmsk.s.xfercomplmsk = 1;
}
- __cvmx_usb_write_csr32(usb,
+ cvmx_usb_write_csr32(usb,
CVMX_USBCX_HCINTMSKX(channel, usb->index),
usbc_hcintmsk.u32);
/* Enable the channel interrupt to propagate */
- usbc_haintmsk.u32 = __cvmx_usb_read_csr32(usb,
+ usbc_haintmsk.u32 = cvmx_usb_read_csr32(usb,
CVMX_USBCX_HAINTMSK(usb->index));
usbc_haintmsk.s.haintmsk |= 1<<channel;
- __cvmx_usb_write_csr32(usb,
- CVMX_USBCX_HAINTMSK(usb->index),
- usbc_haintmsk.u32);
+ cvmx_usb_write_csr32(usb, CVMX_USBCX_HAINTMSK(usb->index),
+ usbc_haintmsk.u32);
}
- /* Setup the locations the DMA engines use */
+ /* Setup the location the DMA engine uses. */
{
+ uint64_t reg;
uint64_t dma_address = transaction->buffer +
transaction->actual_bytes;
transaction->iso_packets[0].offset +
transaction->actual_bytes;
- __cvmx_usb_write_csr64(usb,
- CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8,
- dma_address);
-
- __cvmx_usb_write_csr64(usb,
- CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8,
- dma_address);
+ if (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT)
+ reg = CVMX_USBNX_DMA0_OUTB_CHN0(usb->index);
+ else
+ reg = CVMX_USBNX_DMA0_INB_CHN0(usb->index);
+ cvmx_write64_uint64(reg + channel * 8, dma_address);
}
/* Setup both the size of the transfer and the SPLIT characteristics */
* We need to do split transactions when we are talking to non
* high speed devices that are behind a high speed hub
*/
- if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
+ if (cvmx_usb_pipe_needs_split(usb, pipe)) {
/*
* On the start split phase (stage is even) record the
* frame number we will need to send the split complete.
usbc_hctsiz.s.pktcnt = packets_to_transfer;
/* Update the DATA0/DATA1 toggle */
- usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
+ usbc_hctsiz.s.pid = cvmx_usb_get_data_pid(pipe);
/*
* High speed pipes may need a hardware ping before they start
*/
- if (pipe->flags & __CVMX_USB_PIPE_FLAGS_NEED_PING)
+ if (pipe->flags & CVMX_USB_PIPE_FLAGS_NEED_PING)
usbc_hctsiz.s.dopng = 1;
- __cvmx_usb_write_csr32(usb,
- CVMX_USBCX_HCSPLTX(channel, usb->index),
- usbc_hcsplt.u32);
- __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCTSIZX(channel,
- usb->index), usbc_hctsiz.u32);
+ cvmx_usb_write_csr32(usb,
+ CVMX_USBCX_HCSPLTX(channel, usb->index),
+ usbc_hcsplt.u32);
+ cvmx_usb_write_csr32(usb,
+ CVMX_USBCX_HCTSIZX(channel, usb->index),
+ usbc_hctsiz.u32);
}
/* Setup the Host Channel Characteristics Register */
* immediate retries of failure. These retries happen too
* quickly, so we disable these entirely for splits
*/
- if (__cvmx_usb_pipe_needs_split(usb, pipe))
+ if (cvmx_usb_pipe_needs_split(usb, pipe))
usbc_hcchar.s.ec = 1;
else if (pipe->multi_count < 1)
usbc_hcchar.s.ec = 1;
usbc_hcchar.s.epdir = pipe->transfer_dir;
usbc_hcchar.s.epnum = pipe->endpoint_num;
usbc_hcchar.s.mps = pipe->max_packet;
- __cvmx_usb_write_csr32(usb,
- CVMX_USBCX_HCCHARX(channel, usb->index),
- usbc_hcchar.u32);
+ cvmx_usb_write_csr32(usb,
+ CVMX_USBCX_HCCHARX(channel, usb->index),
+ usbc_hcchar.u32);
}
/* Do transaction type specific fixups as needed */
switch (transaction->type) {
case CVMX_USB_TRANSFER_CONTROL:
- __cvmx_usb_start_channel_control(usb, channel, pipe);
+ cvmx_usb_start_channel_control(usb, channel, pipe);
break;
case CVMX_USB_TRANSFER_BULK:
case CVMX_USB_TRANSFER_INTERRUPT:
break;
case CVMX_USB_TRANSFER_ISOCHRONOUS:
- if (!__cvmx_usb_pipe_needs_split(usb, pipe)) {
+ if (!cvmx_usb_pipe_needs_split(usb, pipe)) {
/*
* ISO transactions require different PIDs depending on
* direction and how many packets are needed
USB_SET_FIELD32(
CVMX_USBCX_HCTSIZX(channel,
usb->index),
- union cvmx_usbcx_hctsizx,
- pid, 0);
+ cvmx_usbcx_hctsizx, pid, 0);
else /* Need MDATA */
USB_SET_FIELD32(
CVMX_USBCX_HCTSIZX(channel,
usb->index),
- union cvmx_usbcx_hctsizx,
- pid, 3);
+ cvmx_usbcx_hctsizx, pid, 3);
}
}
break;
}
{
union cvmx_usbcx_hctsizx usbc_hctsiz = {.u32 =
- __cvmx_usb_read_csr32(usb,
+ cvmx_usb_read_csr32(usb,
CVMX_USBCX_HCTSIZX(channel, usb->index))};
transaction->xfersize = usbc_hctsiz.s.xfersize;
transaction->pktcnt = usbc_hctsiz.s.pktcnt;
}
/* Remeber when we start a split transaction */
- if (__cvmx_usb_pipe_needs_split(usb, pipe))
+ if (cvmx_usb_pipe_needs_split(usb, pipe))
usb->active_split = transaction;
USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
- union cvmx_usbcx_hccharx, chena, 1);
+ cvmx_usbcx_hccharx, chena, 1);
if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
- __cvmx_usb_fill_tx_fifo(usb, channel);
+ cvmx_usb_fill_tx_fifo(usb, channel);
}
*
* Returns: Pipe or NULL if none are ready
*/
-static struct cvmx_usb_pipe *__cvmx_usb_find_ready_pipe(
+static struct cvmx_usb_pipe *cvmx_usb_find_ready_pipe(
struct cvmx_usb_state *usb,
struct list_head *list,
uint64_t current_frame)
struct cvmx_usb_transaction *t =
list_first_entry(&pipe->transactions, typeof(*t),
node);
- if (!(pipe->flags & __CVMX_USB_PIPE_FLAGS_SCHEDULED) && t &&
+ if (!(pipe->flags & CVMX_USB_PIPE_FLAGS_SCHEDULED) && t &&
(pipe->next_tx_frame <= current_frame) &&
((pipe->split_sc_frame == -1) ||
((((int)current_frame - (int)pipe->split_sc_frame)
* @usb: USB device state populated by cvmx_usb_initialize().
* @is_sof: True if this schedule was called on a SOF interrupt.
*/
-static void __cvmx_usb_schedule(struct cvmx_usb_state *usb, int is_sof)
+static void cvmx_usb_schedule(struct cvmx_usb_state *usb, int is_sof)
{
int channel;
struct cvmx_usb_pipe *pipe;
* at the end of a frame and cause an overrun.
*/
union cvmx_usbcx_hfnum hfnum = {
- .u32 = __cvmx_usb_read_csr32(usb,
+ .u32 = cvmx_usb_read_csr32(usb,
CVMX_USBCX_HFNUM(usb->index))
};
union cvmx_usbcx_hfir hfir = {
- .u32 = __cvmx_usb_read_csr32(usb,
+ .u32 = cvmx_usb_read_csr32(usb,
CVMX_USBCX_HFIR(usb->index))
};
* way we are sure that the periodic data is sent in the
* beginning of the frame
*/
- pipe = __cvmx_usb_find_ready_pipe(usb,
+ pipe = cvmx_usb_find_ready_pipe(usb,
usb->active_pipes +
CVMX_USB_TRANSFER_ISOCHRONOUS,
usb->frame_number);
if (likely(!pipe))
- pipe = __cvmx_usb_find_ready_pipe(usb,
+ pipe = cvmx_usb_find_ready_pipe(usb,
usb->active_pipes +
CVMX_USB_TRANSFER_INTERRUPT,
usb->frame_number);
}
if (likely(!pipe)) {
- pipe = __cvmx_usb_find_ready_pipe(usb,
+ pipe = cvmx_usb_find_ready_pipe(usb,
usb->active_pipes +
CVMX_USB_TRANSFER_CONTROL,
usb->frame_number);
if (likely(!pipe))
- pipe = __cvmx_usb_find_ready_pipe(usb,
+ pipe = cvmx_usb_find_ready_pipe(usb,
usb->active_pipes +
CVMX_USB_TRANSFER_BULK,
usb->frame_number);
if (!pipe)
break;
- __cvmx_usb_start_channel(usb, channel, pipe);
+ cvmx_usb_start_channel(usb, channel, pipe);
}
done:
}
}
USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
- union cvmx_usbcx_gintmsk, sofmsk, need_sof);
+ cvmx_usbcx_gintmsk, sofmsk, need_sof);
}
static void octeon_usb_urb_complete_callback(struct cvmx_usb_state *usb,
* @complete_code:
* Completion code
*/
-static void __cvmx_usb_perform_complete(
- struct cvmx_usb_state *usb,
- struct cvmx_usb_pipe *pipe,
- struct cvmx_usb_transaction *transaction,
- enum cvmx_usb_complete complete_code)
+static void cvmx_usb_perform_complete(struct cvmx_usb_state *usb,
+ struct cvmx_usb_pipe *pipe,
+ struct cvmx_usb_transaction *transaction,
+ enum cvmx_usb_complete complete_code)
{
/* If this was a split then clear our split in progress marker */
if (usb->active_split == transaction)
*
* Returns: Transaction or NULL on failure.
*/
-static struct cvmx_usb_transaction *__cvmx_usb_submit_transaction(
+static struct cvmx_usb_transaction *cvmx_usb_submit_transaction(
struct cvmx_usb_state *usb,
struct cvmx_usb_pipe *pipe,
enum cvmx_usb_transfer type,
* We may need to schedule the pipe if this was the head of the
* pipe.
*/
- __cvmx_usb_schedule(usb, 0);
+ cvmx_usb_schedule(usb, 0);
}
return transaction;
struct cvmx_usb_pipe *pipe,
struct urb *urb)
{
- return __cvmx_usb_submit_transaction(usb, pipe, CVMX_USB_TRANSFER_BULK,
- urb->transfer_dma,
- urb->transfer_buffer_length,
- 0, /* control_header */
- 0, /* iso_start_frame */
- 0, /* iso_number_packets */
- NULL, /* iso_packets */
- urb);
+ return cvmx_usb_submit_transaction(usb, pipe, CVMX_USB_TRANSFER_BULK,
+ urb->transfer_dma,
+ urb->transfer_buffer_length,
+ 0, /* control_header */
+ 0, /* iso_start_frame */
+ 0, /* iso_number_packets */
+ NULL, /* iso_packets */
+ urb);
}
struct cvmx_usb_pipe *pipe,
struct urb *urb)
{
- return __cvmx_usb_submit_transaction(usb, pipe,
- CVMX_USB_TRANSFER_INTERRUPT,
- urb->transfer_dma,
- urb->transfer_buffer_length,
- 0, /* control_header */
- 0, /* iso_start_frame */
- 0, /* iso_number_packets */
- NULL, /* iso_packets */
- urb);
+ return cvmx_usb_submit_transaction(usb, pipe,
+ CVMX_USB_TRANSFER_INTERRUPT,
+ urb->transfer_dma,
+ urb->transfer_buffer_length,
+ 0, /* control_header */
+ 0, /* iso_start_frame */
+ 0, /* iso_number_packets */
+ NULL, /* iso_packets */
+ urb);
}
if ((header->bRequestType & USB_DIR_IN) == 0)
buffer_length = le16_to_cpu(header->wLength);
- return __cvmx_usb_submit_transaction(usb, pipe,
- CVMX_USB_TRANSFER_CONTROL,
- urb->transfer_dma, buffer_length,
- control_header,
- 0, /* iso_start_frame */
- 0, /* iso_number_packets */
- NULL, /* iso_packets */
- urb);
+ return cvmx_usb_submit_transaction(usb, pipe,
+ CVMX_USB_TRANSFER_CONTROL,
+ urb->transfer_dma, buffer_length,
+ control_header,
+ 0, /* iso_start_frame */
+ 0, /* iso_number_packets */
+ NULL, /* iso_packets */
+ urb);
}
struct cvmx_usb_iso_packet *packets;
packets = (struct cvmx_usb_iso_packet *) urb->setup_packet;
- return __cvmx_usb_submit_transaction(usb, pipe,
- CVMX_USB_TRANSFER_ISOCHRONOUS,
- urb->transfer_dma,
- urb->transfer_buffer_length,
- 0, /* control_header */
- urb->start_frame,
- urb->number_of_packets,
- packets, urb);
+ return cvmx_usb_submit_transaction(usb, pipe,
+ CVMX_USB_TRANSFER_ISOCHRONOUS,
+ urb->transfer_dma,
+ urb->transfer_buffer_length,
+ 0, /* control_header */
+ urb->start_frame,
+ urb->number_of_packets,
+ packets, urb);
}
* treat it special
*/
if (list_first_entry(&pipe->transactions, typeof(*transaction), node) ==
- transaction && (pipe->flags & __CVMX_USB_PIPE_FLAGS_SCHEDULED)) {
+ transaction && (pipe->flags & CVMX_USB_PIPE_FLAGS_SCHEDULED)) {
union cvmx_usbcx_hccharx usbc_hcchar;
usb->pipe_for_channel[pipe->channel] = NULL;
- pipe->flags &= ~__CVMX_USB_PIPE_FLAGS_SCHEDULED;
+ pipe->flags &= ~CVMX_USB_PIPE_FLAGS_SCHEDULED;
CVMX_SYNCW;
- usbc_hcchar.u32 = __cvmx_usb_read_csr32(usb,
+ usbc_hcchar.u32 = cvmx_usb_read_csr32(usb,
CVMX_USBCX_HCCHARX(pipe->channel, usb->index));
/*
* If the channel isn't enabled then the transaction already
*/
if (usbc_hcchar.s.chena) {
usbc_hcchar.s.chdis = 1;
- __cvmx_usb_write_csr32(usb,
+ cvmx_usb_write_csr32(usb,
CVMX_USBCX_HCCHARX(pipe->channel,
usb->index),
usbc_hcchar.u32);
}
}
- __cvmx_usb_perform_complete(usb, pipe, transaction,
- CVMX_USB_COMPLETE_CANCEL);
+ cvmx_usb_perform_complete(usb, pipe, transaction,
+ CVMX_USB_COMPLETE_CANCEL);
return 0;
}
int frame_number;
union cvmx_usbcx_hfnum usbc_hfnum;
- usbc_hfnum.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_HFNUM(usb->index));
+ usbc_hfnum.u32 = cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index));
frame_number = usbc_hfnum.s.frnum;
return frame_number;
*
* Returns: Zero on success
*/
-static int __cvmx_usb_poll_channel(struct cvmx_usb_state *usb, int channel)
+static int cvmx_usb_poll_channel(struct cvmx_usb_state *usb, int channel)
{
struct octeon_hcd *priv = cvmx_usb_to_octeon(usb);
struct usb_hcd *hcd = octeon_to_hcd(priv);
int buffer_space_left;
/* Read the interrupt status bits for the channel */
- usbc_hcint.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_HCINTX(channel, usb->index));
+ usbc_hcint.u32 = cvmx_usb_read_csr32(usb,
+ CVMX_USBCX_HCINTX(channel, usb->index));
if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) {
- usbc_hcchar.u32 = __cvmx_usb_read_csr32(usb,
+ usbc_hcchar.u32 = cvmx_usb_read_csr32(usb,
CVMX_USBCX_HCCHARX(channel, usb->index));
if (usbc_hcchar.s.chena && usbc_hcchar.s.chdis) {
* interrupt IN transfers to get stuck until we do a
* write of HCCHARX without changing things
*/
- __cvmx_usb_write_csr32(usb,
+ cvmx_usb_write_csr32(usb,
CVMX_USBCX_HCCHARX(channel,
usb->index),
usbc_hcchar.u32);
/* Disable all interrupts except CHHLTD */
hcintmsk.u32 = 0;
hcintmsk.s.chhltdmsk = 1;
- __cvmx_usb_write_csr32(usb,
+ cvmx_usb_write_csr32(usb,
CVMX_USBCX_HCINTMSKX(channel,
usb->index),
hcintmsk.u32);
usbc_hcchar.s.chdis = 1;
- __cvmx_usb_write_csr32(usb,
+ cvmx_usb_write_csr32(usb,
CVMX_USBCX_HCCHARX(channel,
usb->index),
usbc_hcchar.u32);
}
/* Disable the channel interrupts now that it is done */
- __cvmx_usb_write_csr32(usb,
- CVMX_USBCX_HCINTMSKX(channel, usb->index),
- 0);
+ cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), 0);
usb->idle_hardware_channels |= (1<<channel);
/* Make sure this channel is tied to a valid pipe */
* function will figure out which pipe needs to go
*/
usb->pipe_for_channel[channel] = NULL;
- pipe->flags &= ~__CVMX_USB_PIPE_FLAGS_SCHEDULED;
+ pipe->flags &= ~CVMX_USB_PIPE_FLAGS_SCHEDULED;
/*
* Read the channel config info so we can figure out how much data
* transferred
*/
- usbc_hcchar.u32 = __cvmx_usb_read_csr32(usb,
+ usbc_hcchar.u32 = cvmx_usb_read_csr32(usb,
CVMX_USBCX_HCCHARX(channel, usb->index));
- usbc_hctsiz.u32 = __cvmx_usb_read_csr32(usb,
+ usbc_hctsiz.u32 = cvmx_usb_read_csr32(usb,
CVMX_USBCX_HCTSIZX(channel, usb->index));
/*
if ((pipe->device_speed == CVMX_USB_SPEED_HIGH) &&
(pipe->transfer_type == CVMX_USB_TRANSFER_BULK) &&
(pipe->transfer_dir == CVMX_USB_DIRECTION_OUT))
- pipe->flags |= __CVMX_USB_PIPE_FLAGS_NEED_PING;
+ pipe->flags |= CVMX_USB_PIPE_FLAGS_NEED_PING;
+
+ if (unlikely(WARN_ON_ONCE(bytes_this_transfer < 0))) {
+ /*
+ * In some rare cases the DMA engine seems to get stuck and
+ * keeps substracting same byte count over and over again. In
+ * such case we just need to fail every transaction.
+ */
+ cvmx_usb_perform_complete(usb, pipe, transaction,
+ CVMX_USB_COMPLETE_ERROR);
+ return 0;
+ }
if (usbc_hcint.s.stall) {
/*
* the actual bytes transferred
*/
pipe->pid_toggle = 0;
- __cvmx_usb_perform_complete(usb, pipe, transaction,
- CVMX_USB_COMPLETE_STALL);
+ cvmx_usb_perform_complete(usb, pipe, transaction,
+ CVMX_USB_COMPLETE_STALL);
} else if (usbc_hcint.s.xacterr) {
/*
- * We know at least one packet worked if we get a ACK or NAK.
- * Reset the retry counter
+ * XactErr as a response means the device signaled
+ * something wrong with the transfer. For example, PID
+ * toggle errors cause these.
*/
- if (usbc_hcint.s.nak || usbc_hcint.s.ack)
- transaction->retries = 0;
- transaction->retries++;
- if (transaction->retries > MAX_RETRIES) {
- /*
- * XactErr as a response means the device signaled
- * something wrong with the transfer. For example, PID
- * toggle errors cause these
- */
- __cvmx_usb_perform_complete(usb, pipe, transaction,
- CVMX_USB_COMPLETE_XACTERR);
- } else {
- /*
- * If this was a split then clear our split in progress
- * marker
- */
- if (usb->active_split == transaction)
- usb->active_split = NULL;
- /*
- * Rewind to the beginning of the transaction by anding
- * off the split complete bit
- */
- transaction->stage &= ~1;
- pipe->split_sc_frame = -1;
- pipe->next_tx_frame += pipe->interval;
- if (pipe->next_tx_frame < usb->frame_number)
- pipe->next_tx_frame =
- usb->frame_number + pipe->interval -
- (usb->frame_number -
- pipe->next_tx_frame) % pipe->interval;
- }
+ cvmx_usb_perform_complete(usb, pipe, transaction,
+ CVMX_USB_COMPLETE_XACTERR);
} else if (usbc_hcint.s.bblerr) {
/* Babble Error (BblErr) */
- __cvmx_usb_perform_complete(usb, pipe, transaction,
- CVMX_USB_COMPLETE_BABBLEERR);
+ cvmx_usb_perform_complete(usb, pipe, transaction,
+ CVMX_USB_COMPLETE_BABBLEERR);
} else if (usbc_hcint.s.datatglerr) {
/* Data toggle error */
- __cvmx_usb_perform_complete(usb, pipe, transaction,
- CVMX_USB_COMPLETE_DATATGLERR);
+ cvmx_usb_perform_complete(usb, pipe, transaction,
+ CVMX_USB_COMPLETE_DATATGLERR);
} else if (usbc_hcint.s.nyet) {
/*
* NYET as a response is only allowed in three cases: as a
* as a response to a bulk out. The ping case is handled by
* hardware, so we only have splits and bulk out
*/
- if (!__cvmx_usb_pipe_needs_split(usb, pipe)) {
+ if (!cvmx_usb_pipe_needs_split(usb, pipe)) {
transaction->retries = 0;
/*
* If there is more data to go then we need to try
*/
if ((buffer_space_left == 0) ||
(bytes_in_last_packet < pipe->max_packet))
- __cvmx_usb_perform_complete(usb, pipe,
+ cvmx_usb_perform_complete(usb, pipe,
transaction,
CVMX_USB_COMPLETE_SUCCESS);
} else {
* Since we got an ACK, we know we don't need to do a ping on
* this pipe
*/
- pipe->flags &= ~__CVMX_USB_PIPE_FLAGS_NEED_PING;
+ pipe->flags &= ~CVMX_USB_PIPE_FLAGS_NEED_PING;
switch (transaction->type) {
case CVMX_USB_TRANSFER_CONTROL:
case CVMX_USB_STAGE_NON_CONTROL:
case CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE:
/* This should be impossible */
- __cvmx_usb_perform_complete(usb, pipe,
+ cvmx_usb_perform_complete(usb, pipe,
transaction, CVMX_USB_COMPLETE_ERROR);
break;
case CVMX_USB_STAGE_SETUP:
pipe->pid_toggle = 1;
- if (__cvmx_usb_pipe_needs_split(usb, pipe))
+ if (cvmx_usb_pipe_needs_split(usb, pipe))
transaction->stage =
CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE;
else {
}
break;
case CVMX_USB_STAGE_DATA:
- if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
+ if (cvmx_usb_pipe_needs_split(usb, pipe)) {
transaction->stage =
CVMX_USB_STAGE_DATA_SPLIT_COMPLETE;
/*
}
break;
case CVMX_USB_STAGE_STATUS:
- if (__cvmx_usb_pipe_needs_split(usb, pipe))
+ if (cvmx_usb_pipe_needs_split(usb, pipe))
transaction->stage =
CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE;
else
- __cvmx_usb_perform_complete(usb, pipe,
+ cvmx_usb_perform_complete(usb, pipe,
transaction,
CVMX_USB_COMPLETE_SUCCESS);
break;
case CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE:
- __cvmx_usb_perform_complete(usb, pipe,
+ cvmx_usb_perform_complete(usb, pipe,
transaction,
CVMX_USB_COMPLETE_SUCCESS);
break;
* For splits we need to continue the transfer if more
* data is needed
*/
- if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
+ if (cvmx_usb_pipe_needs_split(usb, pipe)) {
if (transaction->stage ==
CVMX_USB_STAGE_NON_CONTROL)
transaction->stage =
CVMX_USB_TRANSFER_INTERRUPT)
pipe->next_tx_frame +=
pipe->interval;
- __cvmx_usb_perform_complete(
+ cvmx_usb_perform_complete(
usb,
pipe,
transaction,
CVMX_USB_DIRECTION_OUT) &&
(usbc_hcint.s.nak))
pipe->flags |=
- __CVMX_USB_PIPE_FLAGS_NEED_PING;
+ CVMX_USB_PIPE_FLAGS_NEED_PING;
if (!buffer_space_left ||
(bytes_in_last_packet <
pipe->max_packet)) {
CVMX_USB_TRANSFER_INTERRUPT)
pipe->next_tx_frame +=
pipe->interval;
- __cvmx_usb_perform_complete(usb,
- pipe,
+ cvmx_usb_perform_complete(usb, pipe,
transaction,
CVMX_USB_COMPLETE_SUCCESS);
}
}
break;
case CVMX_USB_TRANSFER_ISOCHRONOUS:
- if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
+ if (cvmx_usb_pipe_needs_split(usb, pipe)) {
/*
* ISOCHRONOUS OUT splits don't require a
* complete split stage. Instead they use a
(bytes_this_transfer < 188)) {
pipe->next_tx_frame +=
pipe->interval;
- __cvmx_usb_perform_complete(
- usb,
- pipe,
- transaction,
+ cvmx_usb_perform_complete(usb,
+ pipe, transaction,
CVMX_USB_COMPLETE_SUCCESS);
}
} else {
pipe->max_packet)) {
pipe->next_tx_frame +=
pipe->interval;
- __cvmx_usb_perform_complete(
+ cvmx_usb_perform_complete(
usb,
pipe,
transaction,
}
} else {
pipe->next_tx_frame += pipe->interval;
- __cvmx_usb_perform_complete(usb,
- pipe,
+ cvmx_usb_perform_complete(usb, pipe,
transaction,
CVMX_USB_COMPLETE_SUCCESS);
}
* We get channel halted interrupts with no result bits
* sets when the cable is unplugged
*/
- __cvmx_usb_perform_complete(usb, pipe, transaction,
+ cvmx_usb_perform_complete(usb, pipe, transaction,
CVMX_USB_COMPLETE_ERROR);
}
}
prefetch_range(usb, sizeof(*usb));
/* Update the frame counter */
- usbc_hfnum.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_HFNUM(usb->index));
+ usbc_hfnum.u32 = cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index));
if ((usb->frame_number&0x3fff) > usbc_hfnum.s.frnum)
usb->frame_number += 0x4000;
usb->frame_number &= ~0x3fffull;
usb->frame_number |= usbc_hfnum.s.frnum;
/* Read the pending interrupts */
- usbc_gintsts.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_GINTSTS(usb->index));
+ usbc_gintsts.u32 = cvmx_usb_read_csr32(usb,
+ CVMX_USBCX_GINTSTS(usb->index));
/* Clear the interrupts now that we know about them */
- __cvmx_usb_write_csr32(usb,
- CVMX_USBCX_GINTSTS(usb->index),
- usbc_gintsts.u32);
+ cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTSTS(usb->index),
+ usbc_gintsts.u32);
if (usbc_gintsts.s.rxflvl) {
/*
* In DMA mode this is handled by hardware
*/
if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
- __cvmx_usb_poll_rx_fifo(usb);
+ cvmx_usb_poll_rx_fifo(usb);
}
if (usbc_gintsts.s.ptxfemp || usbc_gintsts.s.nptxfemp) {
/* Fill the Tx FIFOs when not in DMA mode */
if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
- __cvmx_usb_poll_tx_fifo(usb);
+ cvmx_usb_poll_tx_fifo(usb);
}
if (usbc_gintsts.s.disconnint || usbc_gintsts.s.prtint) {
union cvmx_usbcx_hprt usbc_hprt;
*/
octeon_usb_port_callback(usb);
/* Clear the port change bits */
- usbc_hprt.u32 = __cvmx_usb_read_csr32(usb,
- CVMX_USBCX_HPRT(usb->index));
+ usbc_hprt.u32 = cvmx_usb_read_csr32(usb,
+ CVMX_USBCX_HPRT(usb->index));
usbc_hprt.s.prtena = 0;
- __cvmx_usb_write_csr32(usb, CVMX_USBCX_HPRT(usb->index),
- usbc_hprt.u32);
+ cvmx_usb_write_csr32(usb, CVMX_USBCX_HPRT(usb->index),
+ usbc_hprt.u32);
}
if (usbc_gintsts.s.hchint) {
/*
*/
union cvmx_usbcx_haint usbc_haint;
- usbc_haint.u32 = __cvmx_usb_read_csr32(usb,
+ usbc_haint.u32 = cvmx_usb_read_csr32(usb,
CVMX_USBCX_HAINT(usb->index));
while (usbc_haint.u32) {
int channel;
channel = __fls(usbc_haint.u32);
- __cvmx_usb_poll_channel(usb, channel);
+ cvmx_usb_poll_channel(usb, channel);
usbc_haint.u32 ^= 1<<channel;
}
}
- __cvmx_usb_schedule(usb, usbc_gintsts.s.sof);
+ cvmx_usb_schedule(usb, usbc_gintsts.s.sof);
return 0;
}
struct octeon_hcd *priv = hcd_to_octeon(hcd);
struct device *dev = hcd->self.controller;
struct cvmx_usb_port_status usb_port_status;
+ struct cvmx_usb_state *usb = &priv->usb;
int port_status;
struct usb_hub_descriptor *desc;
unsigned long flags;
return -EINVAL;
case USB_PORT_FEAT_POWER:
dev_dbg(dev, " POWER\n");
- return -EINVAL;
+ /*
+ * Program the port power bit to drive VBUS on the USB.
+ */
+ spin_lock_irqsave(&priv->lock, flags);
+ USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index),
+ cvmx_usbcx_hprt, prtpwr, 1);
+ spin_unlock_irqrestore(&priv->lock, flags);
+ return 0;
case USB_PORT_FEAT_RESET:
dev_dbg(dev, " RESET\n");
spin_lock_irqsave(&priv->lock, flags);
- cvmx_usb_disable(&priv->usb);
- if (cvmx_usb_enable(&priv->usb))
- dev_dbg(dev, "Failed to enable the port\n");
+ cvmx_usb_reset_port(&priv->usb);
spin_unlock_irqrestore(&priv->lock, flags);
return 0;
case USB_PORT_FEAT_INDICATOR:
struct device *dev = &pdev->dev;
struct octeon_hcd *priv;
struct usb_hcd *hcd;
- unsigned long flags;
u32 clock_rate = 48000000;
bool is_crystal_clock = false;
const char *clock_type;
spin_lock_init(&priv->lock);
- status = cvmx_usb_initialize(&priv->usb, usb_num, initialize_flags);
+ priv->usb.init_flags = initialize_flags;
+
+ /* Initialize the USB state structure */
+ priv->usb.index = usb_num;
+ INIT_LIST_HEAD(&priv->usb.idle_pipes);
+ for (i = 0; i < ARRAY_SIZE(priv->usb.active_pipes); i++)
+ INIT_LIST_HEAD(&priv->usb.active_pipes[i]);
+
+ /* Due to an errata, CN31XX doesn't support DMA */
+ if (OCTEON_IS_MODEL(OCTEON_CN31XX)) {
+ priv->usb.init_flags |= CVMX_USB_INITIALIZE_FLAGS_NO_DMA;
+ /* Only use one channel with non DMA */
+ priv->usb.idle_hardware_channels = 0x1;
+ } else if (OCTEON_IS_MODEL(OCTEON_CN5XXX)) {
+ /* CN5XXX have an errata with channel 3 */
+ priv->usb.idle_hardware_channels = 0xf7;
+ } else {
+ priv->usb.idle_hardware_channels = 0xff;
+ }
+
+ status = cvmx_usb_initialize(dev, &priv->usb);
if (status) {
dev_dbg(dev, "USB initialization failed with %d\n", status);
kfree(hcd);
return -1;
}
- /* This delay is needed for CN3010, but I don't know why... */
- mdelay(10);
-
- spin_lock_irqsave(&priv->lock, flags);
- cvmx_usb_poll(&priv->usb);
- spin_unlock_irqrestore(&priv->lock, flags);
-
status = usb_add_hcd(hcd, irq, 0);
if (status) {
dev_dbg(dev, "USB add HCD failed with %d\n", status);
return 0;
}
-static struct of_device_id octeon_usb_match[] = {
+static const struct of_device_id octeon_usb_match[] = {
{
.compatible = "cavium,octeon-5750-usbc",
},
#ifndef __OCTEON_HCD_H__
#define __OCTEON_HCD_H__
+#include <asm/bitfield.h>
+
#define CVMX_USBCXBASE 0x00016F0010000000ull
#define CVMX_USBCXREG1(reg, bid) \
(CVMX_ADD_IO_SEG(CVMX_USBCXBASE | reg) + \
* * 1'b1: Unmask the interrupt assertion to the application.
*/
struct cvmx_usbcx_gahbcfg_s {
- uint32_t reserved_9_31 : 23;
- uint32_t ptxfemplvl : 1;
- uint32_t nptxfemplvl : 1;
- uint32_t reserved_6_6 : 1;
- uint32_t dmaen : 1;
- uint32_t hbstlen : 4;
- uint32_t glblintrmsk : 1;
+ __BITFIELD_FIELD(uint32_t reserved_9_31 : 23,
+ __BITFIELD_FIELD(uint32_t ptxfemplvl : 1,
+ __BITFIELD_FIELD(uint32_t nptxfemplvl : 1,
+ __BITFIELD_FIELD(uint32_t reserved_6_6 : 1,
+ __BITFIELD_FIELD(uint32_t dmaen : 1,
+ __BITFIELD_FIELD(uint32_t hbstlen : 4,
+ __BITFIELD_FIELD(uint32_t glblintrmsk : 1,
+ ;)))))))
} s;
};
* * Others: Reserved
*/
struct cvmx_usbcx_ghwcfg3_s {
- uint32_t dfifodepth : 16;
- uint32_t reserved_13_15 : 3;
- uint32_t ahbphysync : 1;
- uint32_t rsttype : 1;
- uint32_t optfeature : 1;
- uint32_t vendor_control_interface_support : 1;
- uint32_t i2c_selection : 1;
- uint32_t otgen : 1;
- uint32_t pktsizewidth : 3;
- uint32_t xfersizewidth : 4;
+ __BITFIELD_FIELD(uint32_t dfifodepth : 16,
+ __BITFIELD_FIELD(uint32_t reserved_13_15 : 3,
+ __BITFIELD_FIELD(uint32_t ahbphysync : 1,
+ __BITFIELD_FIELD(uint32_t rsttype : 1,
+ __BITFIELD_FIELD(uint32_t optfeature : 1,
+ __BITFIELD_FIELD(uint32_t vendor_control_interface_support : 1,
+ __BITFIELD_FIELD(uint32_t i2c_selection : 1,
+ __BITFIELD_FIELD(uint32_t otgen : 1,
+ __BITFIELD_FIELD(uint32_t pktsizewidth : 3,
+ __BITFIELD_FIELD(uint32_t xfersizewidth : 4,
+ ;))))))))))
} s;
};
* @modemismsk: Mode Mismatch Interrupt Mask (ModeMisMsk)
*/
struct cvmx_usbcx_gintmsk_s {
- uint32_t wkupintmsk : 1;
- uint32_t sessreqintmsk : 1;
- uint32_t disconnintmsk : 1;
- uint32_t conidstschngmsk : 1;
- uint32_t reserved_27_27 : 1;
- uint32_t ptxfempmsk : 1;
- uint32_t hchintmsk : 1;
- uint32_t prtintmsk : 1;
- uint32_t reserved_23_23 : 1;
- uint32_t fetsuspmsk : 1;
- uint32_t incomplpmsk : 1;
- uint32_t incompisoinmsk : 1;
- uint32_t oepintmsk : 1;
- uint32_t inepintmsk : 1;
- uint32_t epmismsk : 1;
- uint32_t reserved_16_16 : 1;
- uint32_t eopfmsk : 1;
- uint32_t isooutdropmsk : 1;
- uint32_t enumdonemsk : 1;
- uint32_t usbrstmsk : 1;
- uint32_t usbsuspmsk : 1;
- uint32_t erlysuspmsk : 1;
- uint32_t i2cint : 1;
- uint32_t ulpickintmsk : 1;
- uint32_t goutnakeffmsk : 1;
- uint32_t ginnakeffmsk : 1;
- uint32_t nptxfempmsk : 1;
- uint32_t rxflvlmsk : 1;
- uint32_t sofmsk : 1;
- uint32_t otgintmsk : 1;
- uint32_t modemismsk : 1;
- uint32_t reserved_0_0 : 1;
+ __BITFIELD_FIELD(uint32_t wkupintmsk : 1,
+ __BITFIELD_FIELD(uint32_t sessreqintmsk : 1,
+ __BITFIELD_FIELD(uint32_t disconnintmsk : 1,
+ __BITFIELD_FIELD(uint32_t conidstschngmsk : 1,
+ __BITFIELD_FIELD(uint32_t reserved_27_27 : 1,
+ __BITFIELD_FIELD(uint32_t ptxfempmsk : 1,
+ __BITFIELD_FIELD(uint32_t hchintmsk : 1,
+ __BITFIELD_FIELD(uint32_t prtintmsk : 1,
+ __BITFIELD_FIELD(uint32_t reserved_23_23 : 1,
+ __BITFIELD_FIELD(uint32_t fetsuspmsk : 1,
+ __BITFIELD_FIELD(uint32_t incomplpmsk : 1,
+ __BITFIELD_FIELD(uint32_t incompisoinmsk : 1,
+ __BITFIELD_FIELD(uint32_t oepintmsk : 1,
+ __BITFIELD_FIELD(uint32_t inepintmsk : 1,
+ __BITFIELD_FIELD(uint32_t epmismsk : 1,
+ __BITFIELD_FIELD(uint32_t reserved_16_16 : 1,
+ __BITFIELD_FIELD(uint32_t eopfmsk : 1,
+ __BITFIELD_FIELD(uint32_t isooutdropmsk : 1,
+ __BITFIELD_FIELD(uint32_t enumdonemsk : 1,
+ __BITFIELD_FIELD(uint32_t usbrstmsk : 1,
+ __BITFIELD_FIELD(uint32_t usbsuspmsk : 1,
+ __BITFIELD_FIELD(uint32_t erlysuspmsk : 1,
+ __BITFIELD_FIELD(uint32_t i2cint : 1,
+ __BITFIELD_FIELD(uint32_t ulpickintmsk : 1,
+ __BITFIELD_FIELD(uint32_t goutnakeffmsk : 1,
+ __BITFIELD_FIELD(uint32_t ginnakeffmsk : 1,
+ __BITFIELD_FIELD(uint32_t nptxfempmsk : 1,
+ __BITFIELD_FIELD(uint32_t rxflvlmsk : 1,
+ __BITFIELD_FIELD(uint32_t sofmsk : 1,
+ __BITFIELD_FIELD(uint32_t otgintmsk : 1,
+ __BITFIELD_FIELD(uint32_t modemismsk : 1,
+ __BITFIELD_FIELD(uint32_t reserved_0_0 : 1,
+ ;))))))))))))))))))))))))))))))))
} s;
};
* * 1'b1: Host mode
*/
struct cvmx_usbcx_gintsts_s {
- uint32_t wkupint : 1;
- uint32_t sessreqint : 1;
- uint32_t disconnint : 1;
- uint32_t conidstschng : 1;
- uint32_t reserved_27_27 : 1;
- uint32_t ptxfemp : 1;
- uint32_t hchint : 1;
- uint32_t prtint : 1;
- uint32_t reserved_23_23 : 1;
- uint32_t fetsusp : 1;
- uint32_t incomplp : 1;
- uint32_t incompisoin : 1;
- uint32_t oepint : 1;
- uint32_t iepint : 1;
- uint32_t epmis : 1;
- uint32_t reserved_16_16 : 1;
- uint32_t eopf : 1;
- uint32_t isooutdrop : 1;
- uint32_t enumdone : 1;
- uint32_t usbrst : 1;
- uint32_t usbsusp : 1;
- uint32_t erlysusp : 1;
- uint32_t i2cint : 1;
- uint32_t ulpickint : 1;
- uint32_t goutnakeff : 1;
- uint32_t ginnakeff : 1;
- uint32_t nptxfemp : 1;
- uint32_t rxflvl : 1;
- uint32_t sof : 1;
- uint32_t otgint : 1;
- uint32_t modemis : 1;
- uint32_t curmod : 1;
+ __BITFIELD_FIELD(uint32_t wkupint : 1,
+ __BITFIELD_FIELD(uint32_t sessreqint : 1,
+ __BITFIELD_FIELD(uint32_t disconnint : 1,
+ __BITFIELD_FIELD(uint32_t conidstschng : 1,
+ __BITFIELD_FIELD(uint32_t reserved_27_27 : 1,
+ __BITFIELD_FIELD(uint32_t ptxfemp : 1,
+ __BITFIELD_FIELD(uint32_t hchint : 1,
+ __BITFIELD_FIELD(uint32_t prtint : 1,
+ __BITFIELD_FIELD(uint32_t reserved_23_23 : 1,
+ __BITFIELD_FIELD(uint32_t fetsusp : 1,
+ __BITFIELD_FIELD(uint32_t incomplp : 1,
+ __BITFIELD_FIELD(uint32_t incompisoin : 1,
+ __BITFIELD_FIELD(uint32_t oepint : 1,
+ __BITFIELD_FIELD(uint32_t iepint : 1,
+ __BITFIELD_FIELD(uint32_t epmis : 1,
+ __BITFIELD_FIELD(uint32_t reserved_16_16 : 1,
+ __BITFIELD_FIELD(uint32_t eopf : 1,
+ __BITFIELD_FIELD(uint32_t isooutdrop : 1,
+ __BITFIELD_FIELD(uint32_t enumdone : 1,
+ __BITFIELD_FIELD(uint32_t usbrst : 1,
+ __BITFIELD_FIELD(uint32_t usbsusp : 1,
+ __BITFIELD_FIELD(uint32_t erlysusp : 1,
+ __BITFIELD_FIELD(uint32_t i2cint : 1,
+ __BITFIELD_FIELD(uint32_t ulpickint : 1,
+ __BITFIELD_FIELD(uint32_t goutnakeff : 1,
+ __BITFIELD_FIELD(uint32_t ginnakeff : 1,
+ __BITFIELD_FIELD(uint32_t nptxfemp : 1,
+ __BITFIELD_FIELD(uint32_t rxflvl : 1,
+ __BITFIELD_FIELD(uint32_t sof : 1,
+ __BITFIELD_FIELD(uint32_t otgint : 1,
+ __BITFIELD_FIELD(uint32_t modemis : 1,
+ __BITFIELD_FIELD(uint32_t curmod : 1,
+ ;))))))))))))))))))))))))))))))))
} s;
};
* Transmit FIFO RAM.
*/
struct cvmx_usbcx_gnptxfsiz_s {
- uint32_t nptxfdep : 16;
- uint32_t nptxfstaddr : 16;
+ __BITFIELD_FIELD(uint32_t nptxfdep : 16,
+ __BITFIELD_FIELD(uint32_t nptxfstaddr : 16,
+ ;))
} s;
};
* * Others: Reserved
*/
struct cvmx_usbcx_gnptxsts_s {
- uint32_t reserved_31_31 : 1;
- uint32_t nptxqtop : 7;
- uint32_t nptxqspcavail : 8;
- uint32_t nptxfspcavail : 16;
+ __BITFIELD_FIELD(uint32_t reserved_31_31 : 1,
+ __BITFIELD_FIELD(uint32_t nptxqtop : 7,
+ __BITFIELD_FIELD(uint32_t nptxqspcavail : 8,
+ __BITFIELD_FIELD(uint32_t nptxfspcavail : 16,
+ ;))))
} s;
};
* selected, the PHY domain has to be reset for proper operation.
*/
struct cvmx_usbcx_grstctl_s {
- uint32_t ahbidle : 1;
- uint32_t dmareq : 1;
- uint32_t reserved_11_29 : 19;
- uint32_t txfnum : 5;
- uint32_t txfflsh : 1;
- uint32_t rxfflsh : 1;
- uint32_t intknqflsh : 1;
- uint32_t frmcntrrst : 1;
- uint32_t hsftrst : 1;
- uint32_t csftrst : 1;
+ __BITFIELD_FIELD(uint32_t ahbidle : 1,
+ __BITFIELD_FIELD(uint32_t dmareq : 1,
+ __BITFIELD_FIELD(uint32_t reserved_11_29 : 19,
+ __BITFIELD_FIELD(uint32_t txfnum : 5,
+ __BITFIELD_FIELD(uint32_t txfflsh : 1,
+ __BITFIELD_FIELD(uint32_t rxfflsh : 1,
+ __BITFIELD_FIELD(uint32_t intknqflsh : 1,
+ __BITFIELD_FIELD(uint32_t frmcntrrst : 1,
+ __BITFIELD_FIELD(uint32_t hsftrst : 1,
+ __BITFIELD_FIELD(uint32_t csftrst : 1,
+ ;))))))))))
} s;
};
* * Maximum value is 32768
*/
struct cvmx_usbcx_grxfsiz_s {
- uint32_t reserved_16_31 : 16;
- uint32_t rxfdep : 16;
+ __BITFIELD_FIELD(uint32_t reserved_16_31 : 16,
+ __BITFIELD_FIELD(uint32_t rxfdep : 16,
+ ;))
} s;
};
* packet belongs.
*/
struct cvmx_usbcx_grxstsph_s {
- uint32_t reserved_21_31 : 11;
- uint32_t pktsts : 4;
- uint32_t dpid : 2;
- uint32_t bcnt : 11;
- uint32_t chnum : 4;
+ __BITFIELD_FIELD(uint32_t reserved_21_31 : 11,
+ __BITFIELD_FIELD(uint32_t pktsts : 4,
+ __BITFIELD_FIELD(uint32_t dpid : 2,
+ __BITFIELD_FIELD(uint32_t bcnt : 11,
+ __BITFIELD_FIELD(uint32_t chnum : 4,
+ ;)))))
} s;
};
* * One 48-MHz PHY clock = 0.25 bit times
*/
struct cvmx_usbcx_gusbcfg_s {
- uint32_t reserved_17_31 : 15;
- uint32_t otgi2csel : 1;
- uint32_t phylpwrclksel : 1;
- uint32_t reserved_14_14 : 1;
- uint32_t usbtrdtim : 4;
- uint32_t hnpcap : 1;
- uint32_t srpcap : 1;
- uint32_t ddrsel : 1;
- uint32_t physel : 1;
- uint32_t fsintf : 1;
- uint32_t ulpi_utmi_sel : 1;
- uint32_t phyif : 1;
- uint32_t toutcal : 3;
+ __BITFIELD_FIELD(uint32_t reserved_17_31 : 15,
+ __BITFIELD_FIELD(uint32_t otgi2csel : 1,
+ __BITFIELD_FIELD(uint32_t phylpwrclksel : 1,
+ __BITFIELD_FIELD(uint32_t reserved_14_14 : 1,
+ __BITFIELD_FIELD(uint32_t usbtrdtim : 4,
+ __BITFIELD_FIELD(uint32_t hnpcap : 1,
+ __BITFIELD_FIELD(uint32_t srpcap : 1,
+ __BITFIELD_FIELD(uint32_t ddrsel : 1,
+ __BITFIELD_FIELD(uint32_t physel : 1,
+ __BITFIELD_FIELD(uint32_t fsintf : 1,
+ __BITFIELD_FIELD(uint32_t ulpi_utmi_sel : 1,
+ __BITFIELD_FIELD(uint32_t phyif : 1,
+ __BITFIELD_FIELD(uint32_t toutcal : 3,
+ ;)))))))))))))
} s;
};
* One bit per channel: Bit 0 for Channel 0, bit 15 for Channel 15
*/
struct cvmx_usbcx_haint_s {
- uint32_t reserved_16_31 : 16;
- uint32_t haint : 16;
+ __BITFIELD_FIELD(uint32_t reserved_16_31 : 16,
+ __BITFIELD_FIELD(uint32_t haint : 16,
+ ;))
} s;
};
* One bit per channel: Bit 0 for channel 0, bit 15 for channel 15
*/
struct cvmx_usbcx_haintmsk_s {
- uint32_t reserved_16_31 : 16;
- uint32_t haintmsk : 16;
+ __BITFIELD_FIELD(uint32_t reserved_16_31 : 16,
+ __BITFIELD_FIELD(uint32_t haintmsk : 16,
+ ;))
} s;
};
* Indicates the maximum packet size of the associated endpoint.
*/
struct cvmx_usbcx_hccharx_s {
- uint32_t chena : 1;
- uint32_t chdis : 1;
- uint32_t oddfrm : 1;
- uint32_t devaddr : 7;
- uint32_t ec : 2;
- uint32_t eptype : 2;
- uint32_t lspddev : 1;
- uint32_t reserved_16_16 : 1;
- uint32_t epdir : 1;
- uint32_t epnum : 4;
- uint32_t mps : 11;
+ __BITFIELD_FIELD(uint32_t chena : 1,
+ __BITFIELD_FIELD(uint32_t chdis : 1,
+ __BITFIELD_FIELD(uint32_t oddfrm : 1,
+ __BITFIELD_FIELD(uint32_t devaddr : 7,
+ __BITFIELD_FIELD(uint32_t ec : 2,
+ __BITFIELD_FIELD(uint32_t eptype : 2,
+ __BITFIELD_FIELD(uint32_t lspddev : 1,
+ __BITFIELD_FIELD(uint32_t reserved_16_16 : 1,
+ __BITFIELD_FIELD(uint32_t epdir : 1,
+ __BITFIELD_FIELD(uint32_t epnum : 4,
+ __BITFIELD_FIELD(uint32_t mps : 11,
+ ;)))))))))))
} s;
};
* * 2'b11: Reserved
*/
struct cvmx_usbcx_hcfg_s {
- uint32_t reserved_3_31 : 29;
- uint32_t fslssupp : 1;
- uint32_t fslspclksel : 2;
+ __BITFIELD_FIELD(uint32_t reserved_3_31 : 29,
+ __BITFIELD_FIELD(uint32_t fslssupp : 1,
+ __BITFIELD_FIELD(uint32_t fslspclksel : 2,
+ ;)))
} s;
};
* Transfer completed normally without any errors.
*/
struct cvmx_usbcx_hcintx_s {
- uint32_t reserved_11_31 : 21;
- uint32_t datatglerr : 1;
- uint32_t frmovrun : 1;
- uint32_t bblerr : 1;
- uint32_t xacterr : 1;
- uint32_t nyet : 1;
- uint32_t ack : 1;
- uint32_t nak : 1;
- uint32_t stall : 1;
- uint32_t ahberr : 1;
- uint32_t chhltd : 1;
- uint32_t xfercompl : 1;
+ __BITFIELD_FIELD(uint32_t reserved_11_31 : 21,
+ __BITFIELD_FIELD(uint32_t datatglerr : 1,
+ __BITFIELD_FIELD(uint32_t frmovrun : 1,
+ __BITFIELD_FIELD(uint32_t bblerr : 1,
+ __BITFIELD_FIELD(uint32_t xacterr : 1,
+ __BITFIELD_FIELD(uint32_t nyet : 1,
+ __BITFIELD_FIELD(uint32_t ack : 1,
+ __BITFIELD_FIELD(uint32_t nak : 1,
+ __BITFIELD_FIELD(uint32_t stall : 1,
+ __BITFIELD_FIELD(uint32_t ahberr : 1,
+ __BITFIELD_FIELD(uint32_t chhltd : 1,
+ __BITFIELD_FIELD(uint32_t xfercompl : 1,
+ ;))))))))))))
} s;
};
* @xfercomplmsk: Transfer Completed Mask (XferComplMsk)
*/
struct cvmx_usbcx_hcintmskx_s {
- uint32_t reserved_11_31 : 21;
- uint32_t datatglerrmsk : 1;
- uint32_t frmovrunmsk : 1;
- uint32_t bblerrmsk : 1;
- uint32_t xacterrmsk : 1;
- uint32_t nyetmsk : 1;
- uint32_t ackmsk : 1;
- uint32_t nakmsk : 1;
- uint32_t stallmsk : 1;
- uint32_t ahberrmsk : 1;
- uint32_t chhltdmsk : 1;
- uint32_t xfercomplmsk : 1;
+ __BITFIELD_FIELD(uint32_t reserved_11_31 : 21,
+ __BITFIELD_FIELD(uint32_t datatglerrmsk : 1,
+ __BITFIELD_FIELD(uint32_t frmovrunmsk : 1,
+ __BITFIELD_FIELD(uint32_t bblerrmsk : 1,
+ __BITFIELD_FIELD(uint32_t xacterrmsk : 1,
+ __BITFIELD_FIELD(uint32_t nyetmsk : 1,
+ __BITFIELD_FIELD(uint32_t ackmsk : 1,
+ __BITFIELD_FIELD(uint32_t nakmsk : 1,
+ __BITFIELD_FIELD(uint32_t stallmsk : 1,
+ __BITFIELD_FIELD(uint32_t ahberrmsk : 1,
+ __BITFIELD_FIELD(uint32_t chhltdmsk : 1,
+ __BITFIELD_FIELD(uint32_t xfercomplmsk : 1,
+ ;))))))))))))
} s;
};
* translator.
*/
struct cvmx_usbcx_hcspltx_s {
- uint32_t spltena : 1;
- uint32_t reserved_17_30 : 14;
- uint32_t compsplt : 1;
- uint32_t xactpos : 2;
- uint32_t hubaddr : 7;
- uint32_t prtaddr : 7;
+ __BITFIELD_FIELD(uint32_t spltena : 1,
+ __BITFIELD_FIELD(uint32_t reserved_17_30 : 14,
+ __BITFIELD_FIELD(uint32_t compsplt : 1,
+ __BITFIELD_FIELD(uint32_t xactpos : 2,
+ __BITFIELD_FIELD(uint32_t hubaddr : 7,
+ __BITFIELD_FIELD(uint32_t prtaddr : 7,
+ ;))))))
} s;
};
* size for IN transactions (periodic and non-periodic).
*/
struct cvmx_usbcx_hctsizx_s {
- uint32_t dopng : 1;
- uint32_t pid : 2;
- uint32_t pktcnt : 10;
- uint32_t xfersize : 19;
+ __BITFIELD_FIELD(uint32_t dopng : 1,
+ __BITFIELD_FIELD(uint32_t pid : 2,
+ __BITFIELD_FIELD(uint32_t pktcnt : 10,
+ __BITFIELD_FIELD(uint32_t xfersize : 19,
+ ;))))
} s;
};
* * 1 ms (PHY clock frequency for FS/LS)
*/
struct cvmx_usbcx_hfir_s {
- uint32_t reserved_16_31 : 16;
- uint32_t frint : 16;
+ __BITFIELD_FIELD(uint32_t reserved_16_31 : 16,
+ __BITFIELD_FIELD(uint32_t frint : 16,
+ ;))
} s;
};
* USB, and is reset to 0 when it reaches 16'h3FFF.
*/
struct cvmx_usbcx_hfnum_s {
- uint32_t frrem : 16;
- uint32_t frnum : 16;
+ __BITFIELD_FIELD(uint32_t frrem : 16,
+ __BITFIELD_FIELD(uint32_t frnum : 16,
+ ;))
} s;
};
* * 1: A device is attached to the port.
*/
struct cvmx_usbcx_hprt_s {
- uint32_t reserved_19_31 : 13;
- uint32_t prtspd : 2;
- uint32_t prttstctl : 4;
- uint32_t prtpwr : 1;
- uint32_t prtlnsts : 2;
- uint32_t reserved_9_9 : 1;
- uint32_t prtrst : 1;
- uint32_t prtsusp : 1;
- uint32_t prtres : 1;
- uint32_t prtovrcurrchng : 1;
- uint32_t prtovrcurract : 1;
- uint32_t prtenchng : 1;
- uint32_t prtena : 1;
- uint32_t prtconndet : 1;
- uint32_t prtconnsts : 1;
+ __BITFIELD_FIELD(uint32_t reserved_19_31 : 13,
+ __BITFIELD_FIELD(uint32_t prtspd : 2,
+ __BITFIELD_FIELD(uint32_t prttstctl : 4,
+ __BITFIELD_FIELD(uint32_t prtpwr : 1,
+ __BITFIELD_FIELD(uint32_t prtlnsts : 2,
+ __BITFIELD_FIELD(uint32_t reserved_9_9 : 1,
+ __BITFIELD_FIELD(uint32_t prtrst : 1,
+ __BITFIELD_FIELD(uint32_t prtsusp : 1,
+ __BITFIELD_FIELD(uint32_t prtres : 1,
+ __BITFIELD_FIELD(uint32_t prtovrcurrchng : 1,
+ __BITFIELD_FIELD(uint32_t prtovrcurract : 1,
+ __BITFIELD_FIELD(uint32_t prtenchng : 1,
+ __BITFIELD_FIELD(uint32_t prtena : 1,
+ __BITFIELD_FIELD(uint32_t prtconndet : 1,
+ __BITFIELD_FIELD(uint32_t prtconnsts : 1,
+ ;)))))))))))))))
} s;
};
* @ptxfstaddr: Host Periodic TxFIFO Start Address (PTxFStAddr)
*/
struct cvmx_usbcx_hptxfsiz_s {
- uint32_t ptxfsize : 16;
- uint32_t ptxfstaddr : 16;
+ __BITFIELD_FIELD(uint32_t ptxfsize : 16,
+ __BITFIELD_FIELD(uint32_t ptxfstaddr : 16,
+ ;))
} s;
};
* * Others: Reserved
*/
struct cvmx_usbcx_hptxsts_s {
- uint32_t ptxqtop : 8;
- uint32_t ptxqspcavail : 8;
- uint32_t ptxfspcavail : 16;
+ __BITFIELD_FIELD(uint32_t ptxqtop : 8,
+ __BITFIELD_FIELD(uint32_t ptxqspcavail : 8,
+ __BITFIELD_FIELD(uint32_t ptxfspcavail : 16,
+ ;)))
} s;
};
* until AFTER this field is set and then read.
*/
struct cvmx_usbnx_clk_ctl_s {
- uint64_t reserved_20_63 : 44;
- uint64_t divide2 : 2;
- uint64_t hclk_rst : 1;
- uint64_t p_x_on : 1;
- uint64_t p_rtype : 2;
- uint64_t p_com_on : 1;
- uint64_t p_c_sel : 2;
- uint64_t cdiv_byp : 1;
- uint64_t sd_mode : 2;
- uint64_t s_bist : 1;
- uint64_t por : 1;
- uint64_t enable : 1;
- uint64_t prst : 1;
- uint64_t hrst : 1;
- uint64_t divide : 3;
+ __BITFIELD_FIELD(uint64_t reserved_20_63 : 44,
+ __BITFIELD_FIELD(uint64_t divide2 : 2,
+ __BITFIELD_FIELD(uint64_t hclk_rst : 1,
+ __BITFIELD_FIELD(uint64_t p_x_on : 1,
+ __BITFIELD_FIELD(uint64_t p_rtype : 2,
+ __BITFIELD_FIELD(uint64_t p_com_on : 1,
+ __BITFIELD_FIELD(uint64_t p_c_sel : 2,
+ __BITFIELD_FIELD(uint64_t cdiv_byp : 1,
+ __BITFIELD_FIELD(uint64_t sd_mode : 2,
+ __BITFIELD_FIELD(uint64_t s_bist : 1,
+ __BITFIELD_FIELD(uint64_t por : 1,
+ __BITFIELD_FIELD(uint64_t enable : 1,
+ __BITFIELD_FIELD(uint64_t prst : 1,
+ __BITFIELD_FIELD(uint64_t hrst : 1,
+ __BITFIELD_FIELD(uint64_t divide : 3,
+ ;)))))))))))))))
} s;
};
* de-assertion.
*/
struct cvmx_usbnx_usbp_ctl_status_s {
- uint64_t txrisetune : 1;
- uint64_t txvreftune : 4;
- uint64_t txfslstune : 4;
- uint64_t txhsxvtune : 2;
- uint64_t sqrxtune : 3;
- uint64_t compdistune : 3;
- uint64_t otgtune : 3;
- uint64_t otgdisable : 1;
- uint64_t portreset : 1;
- uint64_t drvvbus : 1;
- uint64_t lsbist : 1;
- uint64_t fsbist : 1;
- uint64_t hsbist : 1;
- uint64_t bist_done : 1;
- uint64_t bist_err : 1;
- uint64_t tdata_out : 4;
- uint64_t siddq : 1;
- uint64_t txpreemphasistune : 1;
- uint64_t dma_bmode : 1;
- uint64_t usbc_end : 1;
- uint64_t usbp_bist : 1;
- uint64_t tclk : 1;
- uint64_t dp_pulld : 1;
- uint64_t dm_pulld : 1;
- uint64_t hst_mode : 1;
- uint64_t tuning : 4;
- uint64_t tx_bs_enh : 1;
- uint64_t tx_bs_en : 1;
- uint64_t loop_enb : 1;
- uint64_t vtest_enb : 1;
- uint64_t bist_enb : 1;
- uint64_t tdata_sel : 1;
- uint64_t taddr_in : 4;
- uint64_t tdata_in : 8;
- uint64_t ate_reset : 1;
+ __BITFIELD_FIELD(uint64_t txrisetune : 1,
+ __BITFIELD_FIELD(uint64_t txvreftune : 4,
+ __BITFIELD_FIELD(uint64_t txfslstune : 4,
+ __BITFIELD_FIELD(uint64_t txhsxvtune : 2,
+ __BITFIELD_FIELD(uint64_t sqrxtune : 3,
+ __BITFIELD_FIELD(uint64_t compdistune : 3,
+ __BITFIELD_FIELD(uint64_t otgtune : 3,
+ __BITFIELD_FIELD(uint64_t otgdisable : 1,
+ __BITFIELD_FIELD(uint64_t portreset : 1,
+ __BITFIELD_FIELD(uint64_t drvvbus : 1,
+ __BITFIELD_FIELD(uint64_t lsbist : 1,
+ __BITFIELD_FIELD(uint64_t fsbist : 1,
+ __BITFIELD_FIELD(uint64_t hsbist : 1,
+ __BITFIELD_FIELD(uint64_t bist_done : 1,
+ __BITFIELD_FIELD(uint64_t bist_err : 1,
+ __BITFIELD_FIELD(uint64_t tdata_out : 4,
+ __BITFIELD_FIELD(uint64_t siddq : 1,
+ __BITFIELD_FIELD(uint64_t txpreemphasistune : 1,
+ __BITFIELD_FIELD(uint64_t dma_bmode : 1,
+ __BITFIELD_FIELD(uint64_t usbc_end : 1,
+ __BITFIELD_FIELD(uint64_t usbp_bist : 1,
+ __BITFIELD_FIELD(uint64_t tclk : 1,
+ __BITFIELD_FIELD(uint64_t dp_pulld : 1,
+ __BITFIELD_FIELD(uint64_t dm_pulld : 1,
+ __BITFIELD_FIELD(uint64_t hst_mode : 1,
+ __BITFIELD_FIELD(uint64_t tuning : 4,
+ __BITFIELD_FIELD(uint64_t tx_bs_enh : 1,
+ __BITFIELD_FIELD(uint64_t tx_bs_en : 1,
+ __BITFIELD_FIELD(uint64_t loop_enb : 1,
+ __BITFIELD_FIELD(uint64_t vtest_enb : 1,
+ __BITFIELD_FIELD(uint64_t bist_enb : 1,
+ __BITFIELD_FIELD(uint64_t tdata_sel : 1,
+ __BITFIELD_FIELD(uint64_t taddr_in : 4,
+ __BITFIELD_FIELD(uint64_t tdata_in : 8,
+ __BITFIELD_FIELD(uint64_t ate_reset : 1,
+ ;)))))))))))))))))))))))))))))))))))
} s;
};
}
}
-void cvm_oct_set_carrier(struct octeon_ethernet *priv,
- cvmx_helper_link_info_t link_info)
-{
- cvm_oct_note_carrier(priv, link_info);
- if (link_info.s.link_up) {
- if (!netif_carrier_ok(priv->netdev))
- netif_carrier_on(priv->netdev);
- } else {
- if (netif_carrier_ok(priv->netdev))
- netif_carrier_off(priv->netdev);
- }
-}
-
void cvm_oct_adjust_link(struct net_device *dev)
{
struct octeon_ethernet *priv = netdev_priv(dev);
#endif /* CONFIG_XFRM */
extern const struct ethtool_ops cvm_oct_ethtool_ops;
+
+extern void octeon_mdiobus_force_mod_depencency(void);
+
int cvm_oct_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
int cvm_oct_phy_setup_device(struct net_device *dev);
#endif
};
-extern void octeon_mdiobus_force_mod_depencency(void);
-
static struct device_node *cvm_oct_of_get_child(
const struct device_node *parent, int reg_val)
{
return 0;
}
-static struct of_device_id cvm_oct_match[] = {
+static const struct of_device_id cvm_oct_match[] = {
{
.compatible = "cavium,octeon-3860-pip",
},
#include <linux/console.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
-#include <linux/pci.h>
-#include <linux/pci_ids.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/module.h>
*/
static struct oz_endpoint *oz_ep_alloc(int buffer_size, gfp_t mem_flags)
{
- struct oz_endpoint *ep =
- kzalloc(sizeof(struct oz_endpoint)+buffer_size, mem_flags);
- if (ep) {
- INIT_LIST_HEAD(&ep->urb_list);
- INIT_LIST_HEAD(&ep->link);
- ep->credit = -1;
- if (buffer_size) {
- ep->buffer_size = buffer_size;
- ep->buffer = (u8 *)(ep+1);
- }
+ struct oz_endpoint *ep;
+
+ ep = kzalloc(sizeof(struct oz_endpoint)+buffer_size, mem_flags);
+ if (!ep)
+ return NULL;
+
+ INIT_LIST_HEAD(&ep->urb_list);
+ INIT_LIST_HEAD(&ep->link);
+ ep->credit = -1;
+ if (buffer_size) {
+ ep->buffer_size = buffer_size;
+ ep->buffer = (u8 *)(ep+1);
}
+
return ep;
}
*/
static int __init ozwpan_init(void)
{
- oz_cdev_register();
- oz_protocol_init(g_net_dev);
+ int err;
+
+ err = oz_cdev_register();
+ if (err)
+ return err;
+ err = oz_protocol_init(g_net_dev);
+ if (err)
+ goto err_protocol;
oz_app_enable(OZ_APPID_USB, 1);
oz_apps_init();
return 0;
+
+err_protocol:
+ oz_cdev_deregister();
+ return err;
}
/*
*/
struct oz_pd *oz_pd_alloc(const u8 *mac_addr)
{
- struct oz_pd *pd = kzalloc(sizeof(struct oz_pd), GFP_ATOMIC);
-
- if (pd) {
- int i;
-
- atomic_set(&pd->ref_count, 2);
- for (i = 0; i < OZ_NB_APPS; i++)
- spin_lock_init(&pd->app_lock[i]);
- pd->last_rx_pkt_num = 0xffffffff;
- oz_pd_set_state(pd, OZ_PD_S_IDLE);
- pd->max_tx_size = OZ_MAX_TX_SIZE;
- ether_addr_copy(pd->mac_addr, mac_addr);
- oz_elt_buf_init(&pd->elt_buff);
- spin_lock_init(&pd->tx_frame_lock);
- INIT_LIST_HEAD(&pd->tx_queue);
- INIT_LIST_HEAD(&pd->farewell_list);
- pd->last_sent_frame = &pd->tx_queue;
- spin_lock_init(&pd->stream_lock);
- INIT_LIST_HEAD(&pd->stream_list);
- tasklet_init(&pd->heartbeat_tasklet, oz_pd_heartbeat_handler,
- (unsigned long)pd);
- tasklet_init(&pd->timeout_tasklet, oz_pd_timeout_handler,
- (unsigned long)pd);
- hrtimer_init(&pd->heartbeat, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
- hrtimer_init(&pd->timeout, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
- pd->heartbeat.function = oz_pd_heartbeat_event;
- pd->timeout.function = oz_pd_timeout_event;
- }
+ struct oz_pd *pd;
+ int i;
+
+ pd = kzalloc(sizeof(struct oz_pd), GFP_ATOMIC);
+ if (!pd)
+ return NULL;
+
+ atomic_set(&pd->ref_count, 2);
+ for (i = 0; i < OZ_NB_APPS; i++)
+ spin_lock_init(&pd->app_lock[i]);
+ pd->last_rx_pkt_num = 0xffffffff;
+ oz_pd_set_state(pd, OZ_PD_S_IDLE);
+ pd->max_tx_size = OZ_MAX_TX_SIZE;
+ ether_addr_copy(pd->mac_addr, mac_addr);
+ oz_elt_buf_init(&pd->elt_buff);
+ spin_lock_init(&pd->tx_frame_lock);
+ INIT_LIST_HEAD(&pd->tx_queue);
+ INIT_LIST_HEAD(&pd->farewell_list);
+ pd->last_sent_frame = &pd->tx_queue;
+ spin_lock_init(&pd->stream_lock);
+ INIT_LIST_HEAD(&pd->stream_list);
+ tasklet_init(&pd->heartbeat_tasklet, oz_pd_heartbeat_handler,
+ (unsigned long)pd);
+ tasklet_init(&pd->timeout_tasklet, oz_pd_timeout_handler,
+ (unsigned long)pd);
+ hrtimer_init(&pd->heartbeat, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+ hrtimer_init(&pd->timeout, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+ pd->heartbeat.function = oz_pd_heartbeat_event;
+ pd->timeout.function = oz_pd_timeout_event;
+
return pd;
}
*/
int oz_isoc_stream_create(struct oz_pd *pd, u8 ep_num)
{
- struct oz_isoc_stream *st =
- kzalloc(sizeof(struct oz_isoc_stream), GFP_ATOMIC);
+ struct oz_isoc_stream *st;
+
+ st = kzalloc(sizeof(struct oz_isoc_stream), GFP_ATOMIC);
if (!st)
return -ENOMEM;
st->ep_num = ep_num;
kfree_skb(skb);
return;
}
- oz_hdr->control = (OZ_PROTOCOL_VERSION<<OZ_VERSION_SHIFT);
+ oz_hdr->control = OZ_PROTOCOL_VERSION<<OZ_VERSION_SHIFT;
oz_hdr->last_pkt_num = 0;
put_unaligned(0, &oz_hdr->pkt_num);
elt->type = OZ_ELT_CONNECT_RSP;
* LCD types
*/
#define LCD_TYPE_NONE 0
-#define LCD_TYPE_OLD 1
-#define LCD_TYPE_KS0074 2
-#define LCD_TYPE_HANTRONIX 3
-#define LCD_TYPE_NEXCOM 4
-#define LCD_TYPE_CUSTOM 5
+#define LCD_TYPE_CUSTOM 1
+#define LCD_TYPE_OLD 2
+#define LCD_TYPE_KS0074 3
+#define LCD_TYPE_HANTRONIX 4
+#define LCD_TYPE_NEXCOM 5
/*
* keypad types
static int keypad_initialized;
-static char init_in_progress;
-
static void (*lcd_write_cmd)(int);
static void (*lcd_write_data)(int);
static void (*lcd_clear_fast)(void);
static int lcd_type = NOT_SET;
module_param(lcd_type, int, 0000);
MODULE_PARM_DESC(lcd_type,
- "LCD type: 0=none, 1=old //, 2=serial ks0074, 3=hantronix //, 4=nexcom //, 5=compiled-in");
+ "LCD type: 0=none, 1=compiled-in, 2=old, 3=serial ks0074, 4=hantronix, 5=nexcom");
static int lcd_height = NOT_SET;
module_param(lcd_height, int, 0000);
static void keypad_send_key(const char *string, int max_len)
{
- if (init_in_progress)
- return;
-
/* send the key to the device only if a process is attached to it. */
if (!atomic_read(&keypad_available)) {
while (max_len-- && keypad_buflen < KEYPAD_BUFFER && *string) {
if (scan_timer.function != NULL)
return; /* already started */
- init_timer(&scan_timer);
+ setup_timer(&scan_timer, (void *)&panel_scan_timer, 0);
scan_timer.expires = jiffies + INPUT_POLL_TIME;
- scan_timer.data = 0;
- scan_timer.function = (void *)&panel_scan_timer;
add_timer(&scan_timer);
}
if (misc_register(&keypad_dev))
goto err_lcd_unreg;
}
+ register_reboot_notifier(&panel_notifier);
return;
err_lcd_unreg:
return;
}
+ unregister_reboot_notifier(&panel_notifier);
+
if (keypad.enabled && keypad_initialized) {
misc_deregister(&keypad_dev);
keypad_initialized = 0;
/* init function */
static int __init panel_init_module(void)
{
- int selected_keypad_type = NOT_SET;
+ int selected_keypad_type = NOT_SET, err;
/* take care of an eventual profile */
switch (profile) {
break;
}
- /*
- * Init lcd struct with load-time values to preserve exact current
- * functionality (at least for now).
- */
- lcd.height = lcd_height;
- lcd.width = lcd_width;
- lcd.bwidth = lcd_bwidth;
- lcd.hwidth = lcd_hwidth;
- lcd.charset = lcd_charset;
- lcd.proto = lcd_proto;
- lcd.pins.e = lcd_e_pin;
- lcd.pins.rs = lcd_rs_pin;
- lcd.pins.rw = lcd_rw_pin;
- lcd.pins.cl = lcd_cl_pin;
- lcd.pins.da = lcd_da_pin;
- lcd.pins.bl = lcd_bl_pin;
-
- /* Leave it for now, just in case */
- lcd.esc_seq.len = -1;
-
/*
* Overwrite selection with module param values (both keypad and lcd),
* where the deprecated params have lower prio.
lcd.enabled = (selected_lcd_type > 0);
+ if (lcd.enabled) {
+ /*
+ * Init lcd struct with load-time values to preserve exact
+ * current functionality (at least for now).
+ */
+ lcd.height = lcd_height;
+ lcd.width = lcd_width;
+ lcd.bwidth = lcd_bwidth;
+ lcd.hwidth = lcd_hwidth;
+ lcd.charset = lcd_charset;
+ lcd.proto = lcd_proto;
+ lcd.pins.e = lcd_e_pin;
+ lcd.pins.rs = lcd_rs_pin;
+ lcd.pins.rw = lcd_rw_pin;
+ lcd.pins.cl = lcd_cl_pin;
+ lcd.pins.da = lcd_da_pin;
+ lcd.pins.bl = lcd_bl_pin;
+
+ /* Leave it for now, just in case */
+ lcd.esc_seq.len = -1;
+ }
+
switch (selected_keypad_type) {
case KEYPAD_TYPE_OLD:
keypad_profile = old_keypad_profile;
break;
}
- /* tells various subsystems about the fact that we are initializing */
- init_in_progress = 1;
-
- if (parport_register_driver(&panel_driver)) {
- pr_err("could not register with parport. Aborting.\n");
- return -EIO;
- }
-
if (!lcd.enabled && !keypad.enabled) {
- /* no device enabled, let's release the parport */
- if (pprt) {
- parport_release(pprt);
- parport_unregister_device(pprt);
- pprt = NULL;
- }
- parport_unregister_driver(&panel_driver);
+ /* no device enabled, let's exit */
pr_err("driver version " PANEL_VERSION " disabled.\n");
return -ENODEV;
}
- register_reboot_notifier(&panel_notifier);
+ err = parport_register_driver(&panel_driver);
+ if (err) {
+ pr_err("could not register with parport. Aborting.\n");
+ return err;
+ }
if (pprt)
pr_info("driver version " PANEL_VERSION
else
pr_info("driver version " PANEL_VERSION
" not yet registered\n");
- /* tells various subsystems about the fact that initialization
- is finished */
- init_in_progress = 0;
return 0;
}
static void __exit panel_cleanup_module(void)
{
- unregister_reboot_notifier(&panel_notifier);
if (scan_timer.function != NULL)
del_timer_sync(&scan_timer);
#include <drv_types.h>
#include <wifi.h>
#include <ieee80211.h>
+#include <asm/unaligned.h>
#ifdef CONFIG_88EU_AP_MODE
if (true) {
u8 *p, *dst_ie, *premainder_ie = NULL;
u8 *pbackup_remainder_ie = NULL;
- __le16 tim_bitmap_le;
uint offset, tmp_len, tim_ielen, tim_ie_offset, remainder_ielen;
- tim_bitmap_le = cpu_to_le16(pstapriv->tim_bitmap);
-
p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, _TIM_IE_, &tim_ielen, pnetwork_mlmeext->IELength - _FIXED_IE_LENGTH_);
if (p != NULL && tim_ielen > 0) {
tim_ielen += 2;
*dst_ie++ = 0;
if (tim_ielen == 4) {
- *dst_ie++ = *(u8 *)&tim_bitmap_le;
+ *dst_ie++ = pstapriv->tim_bitmap & 0xff;
} else if (tim_ielen == 5) {
- memcpy(dst_ie, &tim_bitmap_le, 2);
+ put_unaligned_le16(pstapriv->tim_bitmap, dst_ie);
dst_ie += 2;
}
if (res == _SUCCESS) {
pmlmepriv->scan_start_time = jiffies;
- _set_timer(&pmlmepriv->scan_to_timer, SCANNING_TIMEOUT);
+ mod_timer(&pmlmepriv->scan_to_timer,
+ jiffies + msecs_to_jiffies(SCANNING_TIMEOUT));
rtw_led_control(padapter, LED_CTL_SITE_SURVEY);
if (pcmd->res == H2C_DROPPED) {
/* TODO: cancel timer and do timeout handler directly... */
/* need to make timeout handlerOS independent */
- _set_timer(&pmlmepriv->scan_to_timer, 1);
+ mod_timer(&pmlmepriv->scan_to_timer,
+ jiffies + msecs_to_jiffies(1));
} else if (pcmd->res != H2C_SUCCESS) {
- _set_timer(&pmlmepriv->scan_to_timer, 1);
+ mod_timer(&pmlmepriv->scan_to_timer,
+ jiffies + msecs_to_jiffies(1));
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("\n ********Error: MgntActrtw_set_802_11_bssid_LIST_SCAN Fail ************\n\n."));
}
if (pcmd->res == H2C_DROPPED) {
/* TODO: cancel timer and do timeout handler directly... */
/* need to make timeout handlerOS independent */
- _set_timer(&pmlmepriv->assoc_timer, 1);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(1));
} else if (pcmd->res != H2C_SUCCESS) {
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("********Error:rtw_select_and_join_from_scanned_queue Wait Sema Fail ************\n"));
- _set_timer(&pmlmepriv->assoc_timer, 1);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(1));
}
rtw_free_cmd_obj(pcmd);
if (pcmd->res != H2C_SUCCESS) {
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("\n ********Error: rtw_createbss_cmd_callback Fail ************\n\n."));
- _set_timer(&pmlmepriv->assoc_timer, 1);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(1));
}
del_timer_sync(&pmlmepriv->assoc_timer);
while ((rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
/* Check PG header for section num. */
if ((rtemp8 & 0x1F) == 0x0F) { /* extended header */
- u1temp = ((rtemp8 & 0xE0) >> 5);
+ u1temp = (rtemp8 & 0xE0) >> 5;
rtemp8 = *(phymap+eFuse_Addr);
if ((rtemp8 & 0x0F) == 0x0F) {
eFuse_Addr++;
continue;
} else {
offset = ((rtemp8 & 0xF0) >> 1) | u1temp;
- wren = (rtemp8 & 0x0F);
+ wren = rtemp8 & 0x0F;
eFuse_Addr++;
}
} else {
- offset = ((rtemp8 >> 4) & 0x0f);
- wren = (rtemp8 & 0x0f);
+ offset = (rtemp8 >> 4) & 0x0f;
+ wren = rtemp8 & 0x0f;
}
if (offset < EFUSE_MAX_SECTION_88E) {
#include <wlan_bssdef.h>
u8 RTW_WPA_OUI_TYPE[] = { 0x00, 0x50, 0xf2, 1 };
-u16 RTW_WPA_VERSION = 1;
u8 WPA_AUTH_KEY_MGMT_NONE[] = { 0x00, 0x50, 0xf2, 0 };
u8 WPA_AUTH_KEY_MGMT_UNSPEC_802_1X[] = { 0x00, 0x50, 0xf2, 1 };
u8 WPA_AUTH_KEY_MGMT_PSK_OVER_802_1X[] = { 0x00, 0x50, 0xf2, 2 };
/* Search required WPA or WPA2 IE and copy to sec_ie[] */
- cnt = (_TIMESTAMP_ + _BEACON_ITERVAL_ + _CAPABILITY_);
+ cnt = _TIMESTAMP_ + _BEACON_ITERVAL_ + _CAPABILITY_;
sec_idx = 0;
*
* Returns: the address of the specific WPS attribute found, or NULL
*/
-u8 *rtw_get_wps_attr(u8 *wps_ie, uint wps_ielen, u16 target_attr_id , u8 *buf_attr, u32 *len_attr)
+u8 *rtw_get_wps_attr(u8 *wps_ie, uint wps_ielen, u16 target_attr_id, u8 *buf_attr, u32 *len_attr)
{
u8 *attr_ptr = NULL;
u8 *target_attr_ptr = NULL;
*len_attr = 0;
if ((wps_ie[0] != _VENDOR_SPECIFIC_IE_) ||
- (memcmp(wps_ie + 2, wps_oui , 4)))
+ (memcmp(wps_ie + 2, wps_oui, 4)))
return attr_ptr;
/* 6 = 1(Element ID) + 1(Length) + 4(WPS OUI) */
*
* Returns: the address of the specific WPS attribute content found, or NULL
*/
-u8 *rtw_get_wps_attr_content(u8 *wps_ie, uint wps_ielen, u16 target_attr_id , u8 *buf_content, uint *len_content)
+u8 *rtw_get_wps_attr_content(u8 *wps_ie, uint wps_ielen, u16 target_attr_id, u8 *buf_content, uint *len_content)
{
u8 *attr_ptr;
u32 attr_len;
} else {
pnetwork->BcnInfo.encryp_protocol = ENCRYP_PROTOCOL_OPENSYS;
}
- rtw_get_sec_ie(pnetwork->network.IEs , pnetwork->network.IELength, NULL, &rsn_len, NULL, &wpa_len);
+ rtw_get_sec_ie(pnetwork->network.IEs, pnetwork->network.IELength, NULL, &rsn_len, NULL, &wpa_len);
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("rtw_get_bcn_info: ssid =%s\n", pnetwork->network.Ssid.Ssid));
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("rtw_get_bcn_info: wpa_len =%d rsn_len =%d\n", wpa_len, rsn_len));
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("rtw_get_bcn_info: ssid =%s\n", pnetwork->network.Ssid.Ssid));
select_ret = rtw_select_and_join_from_scanned_queue(pmlmepriv);
if (select_ret == _SUCCESS) {
pmlmepriv->to_join = false;
- _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(MAX_JOIN_TIMEOUT));
} else {
if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true) {
/* submit createbss_cmd to change to a ADHOC_MASTER */
/* Callback function of LED BlinkTimer, */
/* it just schedules to corresponding BlinkWorkItem/led_blink_hdl */
/* */
-void BlinkTimerCallback(void *data)
+void BlinkTimerCallback(unsigned long data)
{
- struct LED_871x *pLed = data;
+ struct LED_871x *pLed = (struct LED_871x *)data;
struct adapter *padapter = pLed->padapter;
if ((padapter->bSurpriseRemoved) || (padapter->bDriverStopped))
ResetLedStatus(pLed);
- _init_timer(&(pLed->BlinkTimer), padapter->pnetdev, BlinkTimerCallback, pLed);
+ setup_timer(&(pLed->BlinkTimer), BlinkTimerCallback,
+ (unsigned long)pLed);
INIT_WORK(&(pLed->BlinkWorkItem), BlinkWorkItemCallback);
}
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
break;
case LED_BLINK_NORMAL:
if (pLed->bLedOn)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
break;
case LED_BLINK_SCAN:
pLed->BlinkTimes--;
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
RT_TRACE(_module_rtl8712_led_c_, _drv_info_, ("CurrLedState %d\n", pLed->CurrLedState));
} else if (!check_fwstate(pmlmepriv, _FW_LINKED)) {
pLed->bLedNoLinkBlinkInProgress = true;
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
RT_TRACE(_module_rtl8712_led_c_, _drv_info_, ("CurrLedState %d\n", pLed->CurrLedState));
}
pLed->bLedScanBlinkInProgress = false;
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_BLINK_TXRX:
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
RT_TRACE(_module_rtl8712_led_c_, _drv_info_, ("CurrLedState %d\n", pLed->CurrLedState));
} else if (!check_fwstate(pmlmepriv, _FW_LINKED)) {
pLed->bLedNoLinkBlinkInProgress = true;
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
RT_TRACE(_module_rtl8712_led_c_, _drv_info_, ("CurrLedState %d\n", pLed->CurrLedState));
}
pLed->BlinkTimes = 0;
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_BLINK_WPS:
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
break;
case LED_BLINK_WPS_STOP: /* WPS success */
if (pLed->BlinkingLedState == RTW_LED_ON)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
RT_TRACE(_module_rtl8712_led_c_, _drv_info_, ("CurrLedState %d\n", pLed->CurrLedState));
pLed->bLedWPSBlinkInProgress = false;
} else {
pLed->BlinkingLedState = RTW_LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_WPS_SUCCESS_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_WPS_SUCCESS_INTERVAL_ALPHA));
}
break;
default:
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
}
break;
case LED_CTL_LINK:
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
}
break;
case LED_CTL_SITE_SURVEY:
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_CTL_TX:
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_CTL_START_WPS: /* wait until xinpin finish */
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_CTL_STOP_WPS:
pLed->CurrLedState = LED_BLINK_WPS_STOP;
if (pLed->bLedOn) {
pLed->BlinkingLedState = RTW_LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_WPS_SUCCESS_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_WPS_SUCCESS_INTERVAL_ALPHA));
} else {
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
}
break;
case LED_CTL_STOP_WPS_FAIL:
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
break;
case LED_CTL_POWER_OFF:
pLed->CurrLedState = RTW_LED_OFF;
set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
if (rtw_select_and_join_from_scanned_queue(pmlmepriv) == _SUCCESS) {
- _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(MAX_JOIN_TIMEOUT));
} else {
struct wlan_bssid_ex *pdev_network = &(adapter->registrypriv.dev_network);
u8 *pibss = adapter->registrypriv.dev_network.MacAddress;
pmlmepriv->to_join = false;
s_ret = rtw_select_and_join_from_scanned_queue(pmlmepriv);
if (_SUCCESS == s_ret) {
- _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(MAX_JOIN_TIMEOUT));
} else if (s_ret == 2) { /* there is no need to wait for join */
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
rtw_indicate_connect(adapter);
} else if (pnetwork->join_res == -4) {
rtw_reset_securitypriv(adapter);
- _set_timer(&pmlmepriv->assoc_timer, 1);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(1));
if ((check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) == true) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("fail! clear _FW_UNDER_LINKING ^^^fw_state=%x\n", get_fwstate(pmlmepriv)));
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
}
} else { /* if join_res < 0 (join fails), then try again */
- _set_timer(&pmlmepriv->assoc_timer, 1);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(1));
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
}
* _rtw_join_timeout_handler - Timeout/faliure handler for CMD JoinBss
* @adapter: pointer to struct adapter structure
*/
-void _rtw_join_timeout_handler (void *function_context)
+void _rtw_join_timeout_handler (unsigned long data)
{
- struct adapter *adapter = function_context;
+ struct adapter *adapter = (struct adapter *)data;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
int do_join_r;
* rtw_scan_timeout_handler - Timeout/Faliure handler for CMD SiteSurvey
* @adapter: pointer to struct adapter structure
*/
-void rtw_scan_timeout_handler (void *function_context)
+void rtw_scan_timeout_handler (unsigned long data)
{
- struct adapter *adapter = function_context;
+ struct adapter *adapter = (struct adapter *)data;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
DBG_88E(FUNC_ADPT_FMT" fw_state=%x\n", FUNC_ADPT_ARG(adapter), get_fwstate(pmlmepriv));
}
}
-void rtw_dynamic_check_timer_handlder(void *function_context)
+void rtw_dynamic_check_timer_handlder(unsigned long data)
{
- struct adapter *adapter = (struct adapter *)function_context;
+ struct adapter *adapter = (struct adapter *)data;
struct registry_priv *pregistrypriv = &adapter->registrypriv;
if (!adapter)
rtw_auto_scan_handler(adapter);
}
exit:
- _set_timer(&adapter->mlmepriv.dynamic_chk_timer, 2000);
+ mod_timer(&adapter->mlmepriv.dynamic_chk_timer,
+ jiffies + msecs_to_jiffies(2000));
}
#define RTW_SCAN_RESULT_EXPIRE 2000
p = rtw_get_ie(pie+sizeof(struct ndis_802_11_fixed_ie), _HT_CAPABILITY_IE_, &len, ie_len-sizeof(struct ndis_802_11_fixed_ie));
if (p && len > 0) {
pht_capie = (struct rtw_ieee80211_ht_cap *)(p+2);
- max_ampdu_sz = (pht_capie->ampdu_params_info & IEEE80211_HT_CAP_AMPDU_FACTOR);
+ max_ampdu_sz = pht_capie->ampdu_params_info & IEEE80211_HT_CAP_AMPDU_FACTOR;
max_ampdu_sz = 1 << (max_ampdu_sz+3); /* max_ampdu_sz (kbytes); */
phtpriv->rx_ampdu_maxlen = max_ampdu_sz;
}
break;
case RTW_WLAN_ACTION_ADDBA_RESP: /* ADDBA response */
status = get_unaligned_le16(&frame_body[3]);
- tid = ((frame_body[5] >> 2) & 0x7);
+ tid = (frame_body[5] >> 2) & 0x7;
if (status == 0) { /* successful */
DBG_88E("agg_enable for TID=%d\n", tid);
psta->htpriv.agg_enable_bitmap |= 1 << tid;
/* setting IV for auth seq #3 */
if ((pmlmeinfo->auth_seq == 3) && (pmlmeinfo->state & WIFI_FW_AUTH_STATE) && (use_shared_key == 1)) {
- val32 = ((pmlmeinfo->iv++) | (pmlmeinfo->key_index << 30));
+ val32 = (pmlmeinfo->iv++) | (pmlmeinfo->key_index << 30);
le_tmp32 = cpu_to_le32(val32);
pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *)&le_tmp32, &(pattrib->pktlen));
} while (pmlmeinfo->dialogToken == 0);
pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->dialogToken), &(pattrib->pktlen));
- BA_para_set = (0x1002 | ((status & 0xf) << 2)); /* immediate ack & 64 buffer size */
+ BA_para_set = 0x1002 | ((status & 0xf) << 2); /* immediate ack & 64 buffer size */
le_tmp = cpu_to_le16(BA_para_set);
pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(le_tmp)), &(pattrib->pktlen));
/* and enable a timer */
beacon_timeout = decide_wait_for_beacon_timeout(pmlmeinfo->bcn_interval);
set_link_timer(pmlmeext, beacon_timeout);
- _set_timer(&padapter->mlmepriv.assoc_timer,
- (REAUTH_TO * REAUTH_LIMIT) + (REASSOC_TO*REASSOC_LIMIT) + beacon_timeout);
+ mod_timer(&padapter->mlmepriv.assoc_timer, jiffies +
+ msecs_to_jiffies((REAUTH_TO * REAUTH_LIMIT) + (REASSOC_TO * REASSOC_LIMIT) + beacon_timeout));
pmlmeinfo->state = WIFI_FW_AUTH_NULL | WIFI_FW_STATION_STATE;
} else if (caps&cap_IBSS) { /* adhoc client */
if (pcmd_obj == NULL)
return;
- cmdsz = (sizeof(struct survey_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct survey_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_ATOMIC);
if (pevtcmd == NULL) {
kfree(pcmd_obj);
if (pcmd_obj == NULL)
return;
- cmdsz = (sizeof(struct surveydone_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct surveydone_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_KERNEL);
if (pevtcmd == NULL) {
kfree(pcmd_obj);
if (pcmd_obj == NULL)
return;
- cmdsz = (sizeof(struct joinbss_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct joinbss_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_ATOMIC);
if (pevtcmd == NULL) {
kfree(pcmd_obj);
if (pcmd_obj == NULL)
return;
- cmdsz = (sizeof(struct stadel_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct stadel_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_KERNEL);
if (pevtcmd == NULL) {
kfree(pcmd_obj);
if (psta)
mac_id = (int)psta->mac_id;
else
- mac_id = (-1);
+ mac_id = -1;
pdel_sta_evt->mac_id = mac_id;
if (pcmd_obj == NULL)
return;
- cmdsz = (sizeof(struct stassoc_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct stassoc_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_KERNEL);
if (pevtcmd == NULL) {
kfree(pcmd_obj);
}
}
-void survey_timer_hdl(void *function_context)
+void survey_timer_hdl(unsigned long data)
{
- struct adapter *padapter = function_context;
+ struct adapter *padapter = (struct adapter *)data;
struct cmd_obj *ph2c;
struct sitesurvey_parm *psurveyPara;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
return;
}
-void link_timer_hdl(void *function_context)
+void link_timer_hdl(unsigned long data)
{
- struct adapter *padapter = (struct adapter *)function_context;
+ struct adapter *padapter = (struct adapter *)data;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
return;
}
-void addba_timer_hdl(void *function_context)
+void addba_timer_hdl(unsigned long data)
{
- struct sta_info *psta = function_context;
+ struct sta_info *psta = (struct sta_info *)data;
struct ht_priv *phtpriv;
if (!psta)
psta = rtw_get_stainfo(pstapriv, pparm->addr);
if (psta) {
- ctrl = (BIT(15) | ((pparm->algorithm) << 2));
+ ctrl = BIT(15) | ((pparm->algorithm) << 2);
DBG_88E("r871x_set_stakey_hdl(): enc_algorithm=%d\n", pparm->algorithm);
return H2C_REJECTED;
}
- cam_id = (psta->mac_id + 3);/* 0~3 for default key, cmd_id = macid + 3, macid = aid+1; */
+ cam_id = psta->mac_id + 3;/* 0~3 for default key, cmd_id = macid + 3, macid = aid+1; */
DBG_88E("Write CAM, mac_addr =%x:%x:%x:%x:%x:%x, cam_entry=%d\n", pparm->addr[0],
pparm->addr[1], pparm->addr[2], pparm->addr[3], pparm->addr[4],
if (((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && (pmlmeinfo->HT_enable)) ||
((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) {
issue_action_BA(padapter, pparm->addr, RTW_WLAN_ACTION_ADDBA_REQ, (u16)pparm->tid);
- _set_timer(&psta->addba_retry_timer, ADDBA_TO);
+ mod_timer(&psta->addba_retry_timer,
+ jiffies + msecs_to_jiffies(ADDBA_TO));
} else {
psta->htpriv.candidate_tid_bitmap &= ~BIT(pparm->tid);
}
goto exit;
}
- ptxBeacon_parm = kzalloc(sizeof(struct wlan_bssid_ex), GFP_KERNEL);
+ ptxBeacon_parm = kmemdup(&(pmlmeinfo->network),
+ sizeof(struct wlan_bssid_ex), GFP_KERNEL);
if (ptxBeacon_parm == NULL) {
kfree(ph2c);
res = _FAIL;
goto exit;
}
- memcpy(ptxBeacon_parm, &(pmlmeinfo->network), sizeof(struct wlan_bssid_ex));
-
len_diff = update_hidden_ssid(ptxBeacon_parm->IEs+_BEACON_IE_OFFSET_,
ptxBeacon_parm->IELength-_BEACON_IE_OFFSET_,
pmlmeinfo->hidden_ssid_mode);
pwrpriv->ps_processing = false;
}
-static void pwr_state_check_handler(void *FunctionContext)
+static void pwr_state_check_handler(unsigned long data)
{
- struct adapter *padapter = FunctionContext;
+ struct adapter *padapter = (struct adapter *)data;
rtw_ps_cmd(padapter);
}
pwrctrlpriv->btcoex_rfon = false;
- _init_timer(&(pwrctrlpriv->pwr_state_check_timer), padapter->pnetdev, pwr_state_check_handler, (u8 *)padapter);
+ setup_timer(&pwrctrlpriv->pwr_state_check_timer,
+ pwr_state_check_handler,
+ (unsigned long)padapter);
}
inline void rtw_set_ips_deny(struct adapter *padapter, u32 ms)
0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00
};
-void rtw_signal_stat_timer_hdl(RTW_TIMER_HDL_ARGS);
+void rtw_signal_stat_timer_hdl(unsigned long data);
void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv)
{
res = rtw_hal_init_recv_priv(padapter);
- _init_timer(&precvpriv->signal_stat_timer, padapter->pnetdev, RTW_TIMER_HDL_NAME(signal_stat), padapter);
+ setup_timer(&precvpriv->signal_stat_timer,
+ rtw_signal_stat_timer_hdl,
+ (unsigned long)padapter);
precvpriv->signal_stat_sampling_interval = 1000; /* ms */
/* recv_indicatepkts_in_order(padapter, preorder_ctrl, true); */
if (recv_indicatepkts_in_order(padapter, preorder_ctrl, false)) {
- _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME);
+ mod_timer(&preorder_ctrl->reordering_ctrl_timer,
+ jiffies + msecs_to_jiffies(REORDER_WAIT_TIME));
spin_unlock_bh(&ppending_recvframe_queue->lock);
} else {
spin_unlock_bh(&ppending_recvframe_queue->lock);
return _FAIL;
}
-void rtw_reordering_ctrl_timeout_handler(void *pcontext)
+void rtw_reordering_ctrl_timeout_handler(unsigned long data)
{
- struct recv_reorder_ctrl *preorder_ctrl = pcontext;
+ struct recv_reorder_ctrl *preorder_ctrl = (struct recv_reorder_ctrl *)data;
struct adapter *padapter = preorder_ctrl->padapter;
struct __queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue;
spin_lock_bh(&ppending_recvframe_queue->lock);
if (recv_indicatepkts_in_order(padapter, preorder_ctrl, true) == true)
- _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME);
+ mod_timer(&preorder_ctrl->reordering_ctrl_timer,
+ jiffies + msecs_to_jiffies(REORDER_WAIT_TIME));
spin_unlock_bh(&ppending_recvframe_queue->lock);
}
return ret;
}
-void rtw_signal_stat_timer_hdl(RTW_TIMER_HDL_ARGS)
+void rtw_signal_stat_timer_hdl(unsigned long data)
{
- struct adapter *adapter = (struct adapter *)FunctionContext;
+ struct adapter *adapter = (struct adapter *)data;
struct recv_priv *recvpriv = &adapter->recvpriv;
u32 tmp_s, tmp_q;
/* update value of signal_strength, rssi, signal_qual */
if (check_fwstate(&adapter->mlmepriv, _FW_UNDER_SURVEY) == false) {
- tmp_s = (avg_signal_strength+(_alpha-1)*recvpriv->signal_strength);
+ tmp_s = avg_signal_strength+(_alpha-1)*recvpriv->signal_strength;
if (tmp_s % _alpha)
tmp_s = tmp_s/_alpha + 1;
else
if (tmp_s > 100)
tmp_s = 100;
- tmp_q = (avg_signal_qual+(_alpha-1)*recvpriv->signal_qual);
+ tmp_q = avg_signal_qual+(_alpha-1)*recvpriv->signal_qual;
if (tmp_q % _alpha)
tmp_q = tmp_q/_alpha + 1;
else
u8 add1b[4];
u8 add1bf7[4];
u8 rotl[4];
- u8 swap_halfs[4];
+ u8 swap_halves[4];
u8 andf7[4];
u8 rotr[4];
u8 temp[4];
add1b[i] = 0x00;
}
- swap_halfs[0] = in[2]; /* Swap halves */
- swap_halfs[1] = in[3];
- swap_halfs[2] = in[0];
- swap_halfs[3] = in[1];
+ swap_halves[0] = in[2]; /* Swap halves */
+ swap_halves[1] = in[3];
+ swap_halves[2] = in[0];
+ swap_halves[3] = in[1];
rotl[0] = in[3]; /* Rotate left 8 bits */
rotl[1] = in[0];
rotr[3] = temp[0];
xor_32(add1bf7, rotr, temp);
- xor_32(swap_halfs, rotl, tempb);
+ xor_32(swap_halves, rotl, tempb);
xor_32(temp, tempb, out);
}
uint frtype = GetFrameType(pframe);
uint frsubtype = GetFrameSubType(pframe);
- frsubtype = frsubtype>>4;
+ frsubtype >>= 4;
memset((void *)mic_iv, 0, 16);
memset((void *)mic_header1, 0, 16);
num_blocks = plen / 16;
/* Find start of payload */
- payload_index = (hdrlen + 8);
+ payload_index = hdrlen + 8;
/* Calculate MIC */
aes128k128d(key, mic_iv, aes_out);
/* uint offset = 0; */
uint frtype = GetFrameType(pframe);
uint frsubtype = GetFrameSubType(pframe);
- frsubtype = frsubtype>>4;
+ frsubtype >>= 4;
memset((void *)mic_iv, 0, 16);
memset((void *)mic_header1, 0, 16);
num_blocks = (plen-8) / 16;
/* Find start of payload */
- payload_index = (hdrlen + 8);
+ payload_index = hdrlen + 8;
/* Calculate MIC */
aes128k128d(key, mic_iv, aes_out);
if (WIFI_STATUS_SUCCESS != psrtpriv->Wifi_Error_Status) {
DBG_88E("==>%s error_status(0x%x)\n", __func__, psrtpriv->Wifi_Error_Status);
- status = (psrtpriv->Wifi_Error_Status & (~(USB_READ_PORT_FAIL|USB_WRITE_PORT_FAIL)));
+ status = psrtpriv->Wifi_Error_Status & (~(USB_READ_PORT_FAIL|USB_WRITE_PORT_FAIL));
}
DBG_88E("==> %s wifi_status(0x%x)\n", __func__, status);
unsigned char networktype_to_raid(unsigned char network_type)
{
- unsigned char raid;
-
switch (network_type) {
case WIRELESS_11B:
- raid = RATR_INX_WIRELESS_B;
- break;
+ return RATR_INX_WIRELESS_B;
case WIRELESS_11A:
case WIRELESS_11G:
- raid = RATR_INX_WIRELESS_G;
- break;
+ return RATR_INX_WIRELESS_G;
case WIRELESS_11BG:
- raid = RATR_INX_WIRELESS_GB;
- break;
+ return RATR_INX_WIRELESS_GB;
case WIRELESS_11_24N:
case WIRELESS_11_5N:
- raid = RATR_INX_WIRELESS_N;
- break;
+ return RATR_INX_WIRELESS_N;
case WIRELESS_11A_5N:
case WIRELESS_11G_24N:
- raid = RATR_INX_WIRELESS_NG;
- break;
+ return RATR_INX_WIRELESS_NG;
case WIRELESS_11BG_24N:
- raid = RATR_INX_WIRELESS_NGB;
- break;
+ return RATR_INX_WIRELESS_NGB;
default:
- raid = RATR_INX_WIRELESS_GB;
- break;
+ return RATR_INX_WIRELESS_GB;
}
- return raid;
}
u8 judge_network_type(struct adapter *padapter, unsigned char *rate, int ratelen)
static unsigned char ratetbl_val_2wifirate(unsigned char rate)
{
- unsigned char val = 0;
-
switch (rate & 0x7f) {
case 0:
- val = IEEE80211_CCK_RATE_1MB;
- break;
+ return IEEE80211_CCK_RATE_1MB;
case 1:
- val = IEEE80211_CCK_RATE_2MB;
- break;
+ return IEEE80211_CCK_RATE_2MB;
case 2:
- val = IEEE80211_CCK_RATE_5MB;
- break;
+ return IEEE80211_CCK_RATE_5MB;
case 3:
- val = IEEE80211_CCK_RATE_11MB;
- break;
+ return IEEE80211_CCK_RATE_11MB;
case 4:
- val = IEEE80211_OFDM_RATE_6MB;
- break;
+ return IEEE80211_OFDM_RATE_6MB;
case 5:
- val = IEEE80211_OFDM_RATE_9MB;
- break;
+ return IEEE80211_OFDM_RATE_9MB;
case 6:
- val = IEEE80211_OFDM_RATE_12MB;
- break;
+ return IEEE80211_OFDM_RATE_12MB;
case 7:
- val = IEEE80211_OFDM_RATE_18MB;
- break;
+ return IEEE80211_OFDM_RATE_18MB;
case 8:
- val = IEEE80211_OFDM_RATE_24MB;
- break;
+ return IEEE80211_OFDM_RATE_24MB;
case 9:
- val = IEEE80211_OFDM_RATE_36MB;
- break;
+ return IEEE80211_OFDM_RATE_36MB;
case 10:
- val = IEEE80211_OFDM_RATE_48MB;
- break;
+ return IEEE80211_OFDM_RATE_48MB;
case 11:
- val = IEEE80211_OFDM_RATE_54MB;
- break;
+ return IEEE80211_OFDM_RATE_54MB;
+ default:
+ return 0;
}
- return val;
}
static int is_basicrate(struct adapter *padapter, unsigned char rate)
for (j = 5; j >= 0; j--) {
switch (j) {
case 0:
- val = (ctrl | (mac[0] << 16) | (mac[1] << 24));
+ val = ctrl | (mac[0] << 16) | (mac[1] << 24);
break;
case 1:
- val = (mac[2] | (mac[3] << 8) | (mac[4] << 16) | (mac[5] << 24));
+ val = mac[2] | (mac[3] << 8) | (mac[4] << 16) | (mac[5] << 24);
break;
default:
i = (j - 2) << 2;
- val = (key[i] | (key[i+1] << 8) | (key[i+2] << 16) | (key[i+3] << 24));
+ val = key[i] | (key[i+1] << 8) | (key[i+2] << 16) | (key[i+3] << 24);
break;
}
/* AIFS = AIFSN * slot time + SIFS - r2t phy delay */
AIFS = (pmlmeinfo->WMM_param.ac_param[i].ACI_AIFSN & 0x0f) * pmlmeinfo->slotTime + aSifsTime;
- ECWMin = (pmlmeinfo->WMM_param.ac_param[i].CW & 0x0f);
+ ECWMin = pmlmeinfo->WMM_param.ac_param[i].CW & 0x0f;
ECWMax = (pmlmeinfo->WMM_param.ac_param[i].CW & 0xf0) >> 4;
TXOP = le16_to_cpu(pmlmeinfo->WMM_param.ac_param[i].TXOP_limit);
pxmitpriv->wmm_para_seq[i] = inx[i];
DBG_88E("wmm_para_seq(%d): %d\n", i, pxmitpriv->wmm_para_seq[i]);
}
-
- return;
}
static void bwmode_update_check(struct adapter *padapter, struct ndis_802_11_var_ie *pIE)
} else {
/* modify from fw by Thomas 2010/11/17 */
if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3) > (pIE->data[i] & 0x3))
- max_AMPDU_len = (pIE->data[i] & 0x3);
+ max_AMPDU_len = pIE->data[i] & 0x3;
else
- max_AMPDU_len = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3);
+ max_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3;
if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) > (pIE->data[i] & 0x1c))
- min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c);
+ min_MPDU_spacing = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c;
else
- min_MPDU_spacing = (pIE->data[i] & 0x1c);
+ min_MPDU_spacing = pIE->data[i] & 0x1c;
pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para = max_AMPDU_len | min_MPDU_spacing;
}
else
pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R[i];
}
- return;
}
void HT_info_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE)
pmlmeinfo->HT_info_enable = 1;
memcpy(&(pmlmeinfo->HT_info), pIE->data, pIE->Length);
- return;
}
void HTOnAssocRsp(struct adapter *padapter)
static int wifirate2_ratetbl_inx(unsigned char rate)
{
- int inx = 0;
rate = rate & 0x7f;
switch (rate) {
case 54*2:
- inx = 11;
- break;
+ return 11;
case 48*2:
- inx = 10;
- break;
+ return 10;
case 36*2:
- inx = 9;
- break;
+ return 9;
case 24*2:
- inx = 8;
- break;
+ return 8;
case 18*2:
- inx = 7;
- break;
+ return 7;
case 12*2:
- inx = 6;
- break;
+ return 6;
case 9*2:
- inx = 5;
- break;
+ return 5;
case 6*2:
- inx = 4;
- break;
+ return 4;
case 11*2:
- inx = 3;
- break;
+ return 3;
case 11:
- inx = 2;
- break;
+ return 2;
case 2*2:
- inx = 1;
- break;
+ return 1;
case 1*2:
- inx = 0;
- break;
+ return 0;
+ default:
+ return 0;
}
- return inx;
}
unsigned int update_basic_rate(unsigned char *ptn, unsigned int ptn_sz)
{
unsigned int mask = 0;
- mask = ((pHT_caps->u.HT_cap_element.MCS_rate[0] << 12) | (pHT_caps->u.HT_cap_element.MCS_rate[1] << 20));
+ mask = (pHT_caps->u.HT_cap_element.MCS_rate[0] << 12) | (pHT_caps->u.HT_cap_element.MCS_rate[1] << 20);
return mask;
}
if (!(pmlmeinfo->HT_enable))
return _FAIL;
- if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_RALINK))
+ if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_RALINK)
return _FAIL;
bit_offset = (pmlmeext->cur_bwmode & HT_CHANNEL_WIDTH_40) ? 6 : 5;
pxmitpriv->hwxmit_entry = HWXMIT_ENTRY;
- pxmitpriv->hwxmits = kzalloc(sizeof(struct hw_xmit) * pxmitpriv->hwxmit_entry, GFP_KERNEL);
+ pxmitpriv->hwxmits = kcalloc(pxmitpriv->hwxmit_entry,
+ sizeof(struct hw_xmit), GFP_KERNEL);
hwxmits = pxmitpriv->hwxmits;
- if (pxmitpriv->hwxmit_entry == 5) {
- hwxmits[0] .sta_queue = &pxmitpriv->bm_pending;
- hwxmits[1] .sta_queue = &pxmitpriv->vo_pending;
- hwxmits[2] .sta_queue = &pxmitpriv->vi_pending;
- hwxmits[3] .sta_queue = &pxmitpriv->bk_pending;
- hwxmits[4] .sta_queue = &pxmitpriv->be_pending;
- } else if (pxmitpriv->hwxmit_entry == 4) {
- hwxmits[0] .sta_queue = &pxmitpriv->vo_pending;
- hwxmits[1] .sta_queue = &pxmitpriv->vi_pending;
- hwxmits[2] .sta_queue = &pxmitpriv->be_pending;
- hwxmits[3] .sta_queue = &pxmitpriv->bk_pending;
- } else {
- }
+ hwxmits[0] .sta_queue = &pxmitpriv->vo_pending;
+ hwxmits[1] .sta_queue = &pxmitpriv->vi_pending;
+ hwxmits[2] .sta_queue = &pxmitpriv->be_pending;
+ hwxmits[3] .sta_queue = &pxmitpriv->bk_pending;
}
void rtw_free_hwxmits(struct adapter *padapter)
}
pRaInfo->RptTime = DynamicTxRPTTiming[idx];
- ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("pRaInfo->RptTime = 0x%x\n", pRaInfo->RptTime));
+ ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
+ ("pRaInfo->RptTime = 0x%x\n", pRaInfo->RptTime));
}
-static int odm_RateDown_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_info *pRaInfo)
+static int odm_RateDown_8188E(struct odm_dm_struct *dm_odm,
+ struct odm_ra_info *pRaInfo)
{
u8 RateID, LowestRate, HighestRate;
u8 i;
- ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDown_8188E()\n"));
+ ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE,
+ ODM_DBG_TRACE, ("=====>odm_RateDown_8188E()\n"));
if (NULL == pRaInfo) {
- ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateDown_8188E(): pRaInfo is NULL\n"));
+ ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
+ ("odm_RateDown_8188E(): pRaInfo is NULL\n"));
return -1;
}
RateID = pRaInfo->PreRate;
pRaInfo->DecisionRate = RateID;
odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 2);
- ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down, RPT Timing default\n"));
- ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("RAWaitingCounter %d, RAPendingCounter %d", pRaInfo->RAWaitingCounter, pRaInfo->RAPendingCounter));
- ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down to RateID %d RateSGI %d\n", RateID, pRaInfo->RateSGI));
- ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<===== odm_RateDown_8188E()\n"));
+ ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE,
+ ODM_DBG_LOUD, ("Rate down, RPT Timing default\n"));
+ ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
+ ("RAWaitingCounter %d, RAPendingCounter %d",
+ pRaInfo->RAWaitingCounter, pRaInfo->RAPendingCounter));
+ ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
+ ("Rate down to RateID %d RateSGI %d\n", RateID, pRaInfo->RateSGI));
+ ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
+ ("<===== odm_RateDown_8188E()\n"));
return 0;
}
u8 RateID, HighestRate;
u8 i;
- ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateUp_8188E()\n"));
+ ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE,
+ ODM_DBG_TRACE, ("=====>odm_RateUp_8188E()\n"));
if (NULL == pRaInfo) {
- ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E(): pRaInfo is NULL\n"));
+ ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
+ ("odm_RateUp_8188E(): pRaInfo is NULL\n"));
return -1;
}
RateID = pRaInfo->PreRate;
goto RateUpfinish;
}
odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 0);
- ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E():Decrease RPT Timing\n"));
+ ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
+ ("odm_RateUp_8188E():Decrease RPT Timing\n"));
if (RateID < HighestRate) {
for (i = RateID+1; i <= HighestRate; i++) {
RateID = HighestRate;
}
RateUpfinish:
- if (pRaInfo->RAWaitingCounter == (4+PendingForRateUpFail[pRaInfo->RAPendingCounter]))
+ if (pRaInfo->RAWaitingCounter ==
+ (4+PendingForRateUpFail[pRaInfo->RAPendingCounter]))
pRaInfo->RAWaitingCounter = 0;
else
pRaInfo->RAWaitingCounter++;
pRaInfo->DecisionRate = RateID;
- ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate up to RateID %d\n", RateID));
- ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("RAWaitingCounter %d, RAPendingCounter %d", pRaInfo->RAWaitingCounter, pRaInfo->RAPendingCounter));
- ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<===== odm_RateUp_8188E()\n"));
+ ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
+ ("Rate up to RateID %d\n", RateID));
+ ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
+ ("RAWaitingCounter %d, RAPendingCounter %d",
+ pRaInfo->RAWaitingCounter, pRaInfo->RAPendingCounter));
+ ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE,
+ ODM_DBG_TRACE, ("<===== odm_RateUp_8188E()\n"));
return 0;
}
struct odm_ra_info *pRaInfo
)
{
- u8 RateID = 0, RtyPtID = 0, PenaltyID1 = 0, PenaltyID2 = 0;
+ u8 RateID = 0, RtyPtID = 0, PenaltyID1 = 0, PenaltyID2 = 0, i = 0;
/* u32 pool_retry; */
static u8 DynamicTxRPTTimingCounter;
- ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDecision_8188E()\n"));
+ ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
+ ("=====>odm_RateDecision_8188E()\n"));
if (pRaInfo->Active && (pRaInfo->TOTAL > 0)) { /* STA used and data packet exits */
if ((pRaInfo->RssiStaRA < (pRaInfo->PreRssiStaRA - 3)) ||
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" NscDown init is %d\n", pRaInfo->NscDown));
- pRaInfo->NscDown += pRaInfo->RTY[0] * RETRY_PENALTY[PenaltyID1][0];
- pRaInfo->NscDown += pRaInfo->RTY[1] * RETRY_PENALTY[PenaltyID1][1];
- pRaInfo->NscDown += pRaInfo->RTY[2] * RETRY_PENALTY[PenaltyID1][2];
- pRaInfo->NscDown += pRaInfo->RTY[3] * RETRY_PENALTY[PenaltyID1][3];
- pRaInfo->NscDown += pRaInfo->RTY[4] * RETRY_PENALTY[PenaltyID1][4];
+
+ for (i = 0 ; i <= 4 ; i++)
+ pRaInfo->NscDown += pRaInfo->RTY[i] * RETRY_PENALTY[PenaltyID1][i];
+
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
- (" NscDown is %d, total*penalty[5] is %d\n",
- pRaInfo->NscDown, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5])));
+ (" NscDown is %d, total*penalty[5] is %d\n", pRaInfo->NscDown,
+ (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5])));
+
if (pRaInfo->NscDown > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5]))
pRaInfo->NscDown -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5];
else
PenaltyID2 = RETRY_PENALTY_UP_IDX[RateID];
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" NscUp init is %d\n", pRaInfo->NscUp));
- pRaInfo->NscUp += pRaInfo->RTY[0] * RETRY_PENALTY[PenaltyID2][0];
- pRaInfo->NscUp += pRaInfo->RTY[1] * RETRY_PENALTY[PenaltyID2][1];
- pRaInfo->NscUp += pRaInfo->RTY[2] * RETRY_PENALTY[PenaltyID2][2];
- pRaInfo->NscUp += pRaInfo->RTY[3] * RETRY_PENALTY[PenaltyID2][3];
- pRaInfo->NscUp += pRaInfo->RTY[4] * RETRY_PENALTY[PenaltyID2][4];
+
+ for (i = 0 ; i <= 4 ; i++)
+ pRaInfo->NscUp += pRaInfo->RTY[i] * RETRY_PENALTY[PenaltyID2][i];
+
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
("NscUp is %d, total*up[5] is %d\n",
pRaInfo->NscUp, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5])));
+
if (pRaInfo->NscUp > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5]))
pRaInfo->NscUp -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5];
else
break;
}
- j = j >> 1;
+ j >>= 1;
temp_stage = (pRaInfo->PTStage + 1) >> 1;
if (temp_stage > j)
stage_id = temp_stage-j;
struct odm_ra_info *pRaInfo = &dm_odm->RAInfo[macid];
u8 WirelessMode = 0xFF; /* invalid value */
u8 max_rate_idx = 0x13; /* MCS7 */
+
if (dm_odm->pWirelessMode != NULL)
WirelessMode = *(dm_odm->pWirelessMode);
if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
return 0;
- DecisionRate = (dm_odm->RAInfo[macid].DecisionRate);
+ DecisionRate = dm_odm->RAInfo[macid].DecisionRate;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" macid =%d DecisionRate = 0x%x\n", macid, DecisionRate));
return DecisionRate;
if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
return 0;
- PTStage = (dm_odm->RAInfo[macid].PTStage);
+ PTStage = dm_odm->RAInfo[macid].PTStage;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
("macid =%d PTStage = 0x%x\n", macid, PTStage));
return PTStage;
static void store_pwrindex_offset(struct adapter *Adapter, u32 regaddr, u32 bitmask, u32 data)
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
+ u8 pwrGrpCnt = hal_data->pwrGroupCnt;
if (regaddr == rTxAGC_A_Rate18_06)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][0] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][0] = data;
if (regaddr == rTxAGC_A_Rate54_24)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][1] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][1] = data;
if (regaddr == rTxAGC_A_CCK1_Mcs32)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][6] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][6] = data;
if (regaddr == rTxAGC_B_CCK11_A_CCK2_11 && bitmask == 0xffffff00)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][7] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][7] = data;
if (regaddr == rTxAGC_A_Mcs03_Mcs00)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][2] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][2] = data;
if (regaddr == rTxAGC_A_Mcs07_Mcs04)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][3] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][3] = data;
if (regaddr == rTxAGC_A_Mcs11_Mcs08)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][4] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][4] = data;
if (regaddr == rTxAGC_A_Mcs15_Mcs12) {
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][5] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][5] = data;
if (hal_data->rf_type == RF_1T1R)
hal_data->pwrGroupCnt++;
}
if (regaddr == rTxAGC_B_Rate18_06)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][8] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][8] = data;
if (regaddr == rTxAGC_B_Rate54_24)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][9] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][9] = data;
if (regaddr == rTxAGC_B_CCK1_55_Mcs32)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][14] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][14] = data;
if (regaddr == rTxAGC_B_CCK11_A_CCK2_11 && bitmask == 0x000000ff)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][15] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][15] = data;
if (regaddr == rTxAGC_B_Mcs03_Mcs00)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][10] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][10] = data;
if (regaddr == rTxAGC_B_Mcs07_Mcs04)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][11] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][11] = data;
if (regaddr == rTxAGC_B_Mcs11_Mcs08)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][12] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][12] = data;
if (regaddr == rTxAGC_B_Mcs15_Mcs12) {
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][13] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][13] = data;
if (hal_data->rf_type != RF_1T1R)
hal_data->pwrGroupCnt++;
}
}
-static void rtl_addr_delay(struct adapter *adapt, u32 addr, u32 bit_mask, u32 data)
+static void rtl_addr_delay(struct adapter *adapt,
+ u32 addr, u32 bit_mask, u32 data)
{
- if (addr == 0xfe) {
+ switch (addr) {
+ case 0xfe:
msleep(50);
- } else if (addr == 0xfd) {
+ break;
+ case 0xfd:
mdelay(5);
- } else if (addr == 0xfc) {
+ break;
+ case 0xfc:
mdelay(1);
- } else if (addr == 0xfb) {
+ break;
+ case 0xfb:
udelay(50);
- } else if (addr == 0xfa) {
+ break;
+ case 0xfa:
udelay(5);
- } else if (addr == 0xf9) {
+ break;
+ case 0xf9:
udelay(1);
- } else{
+ break;
+ default:
store_pwrindex_offset(adapt, addr, bit_mask, data);
}
}
static void rtl88e_phy_init_bb_rf_register_definition(struct adapter *Adapter)
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
-
- hal_data->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW;
- hal_data->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW;
- hal_data->PHYRegDef[RF_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;
- hal_data->PHYRegDef[RF_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;
-
- hal_data->PHYRegDef[RF_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB;
- hal_data->PHYRegDef[RF_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;
- hal_data->PHYRegDef[RF_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB;
- hal_data->PHYRegDef[RF_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;
-
- hal_data->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE;
- hal_data->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE;
-
- hal_data->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE;
- hal_data->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE;
-
- hal_data->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter;
- hal_data->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter;
-
- hal_data->PHYRegDef[RF_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter;
- hal_data->PHYRegDef[RF_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter;
- hal_data->PHYRegDef[RF_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter;
- hal_data->PHYRegDef[RF_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter;
-
- hal_data->PHYRegDef[RF_PATH_A].rfTxGainStage = rFPGA0_TxGainStage;
- hal_data->PHYRegDef[RF_PATH_B].rfTxGainStage = rFPGA0_TxGainStage;
- hal_data->PHYRegDef[RF_PATH_C].rfTxGainStage = rFPGA0_TxGainStage;
- hal_data->PHYRegDef[RF_PATH_D].rfTxGainStage = rFPGA0_TxGainStage;
-
- hal_data->PHYRegDef[RF_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1;
- hal_data->PHYRegDef[RF_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1;
-
- hal_data->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2;
- hal_data->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2;
-
- hal_data->PHYRegDef[RF_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl;
- hal_data->PHYRegDef[RF_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl;
- hal_data->PHYRegDef[RF_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl;
- hal_data->PHYRegDef[RF_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl;
-
- hal_data->PHYRegDef[RF_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1;
- hal_data->PHYRegDef[RF_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1;
- hal_data->PHYRegDef[RF_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1;
- hal_data->PHYRegDef[RF_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1;
-
- hal_data->PHYRegDef[RF_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2;
- hal_data->PHYRegDef[RF_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2;
- hal_data->PHYRegDef[RF_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2;
- hal_data->PHYRegDef[RF_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2;
-
- hal_data->PHYRegDef[RF_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance;
- hal_data->PHYRegDef[RF_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance;
- hal_data->PHYRegDef[RF_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance;
- hal_data->PHYRegDef[RF_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance;
-
- hal_data->PHYRegDef[RF_PATH_A].rfRxAFE = rOFDM0_XARxAFE;
- hal_data->PHYRegDef[RF_PATH_B].rfRxAFE = rOFDM0_XBRxAFE;
- hal_data->PHYRegDef[RF_PATH_C].rfRxAFE = rOFDM0_XCRxAFE;
- hal_data->PHYRegDef[RF_PATH_D].rfRxAFE = rOFDM0_XDRxAFE;
-
- hal_data->PHYRegDef[RF_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance;
- hal_data->PHYRegDef[RF_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance;
- hal_data->PHYRegDef[RF_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance;
- hal_data->PHYRegDef[RF_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance;
-
- hal_data->PHYRegDef[RF_PATH_A].rfTxAFE = rOFDM0_XATxAFE;
- hal_data->PHYRegDef[RF_PATH_B].rfTxAFE = rOFDM0_XBTxAFE;
- hal_data->PHYRegDef[RF_PATH_C].rfTxAFE = rOFDM0_XCTxAFE;
- hal_data->PHYRegDef[RF_PATH_D].rfTxAFE = rOFDM0_XDTxAFE;
-
- hal_data->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
- hal_data->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
- hal_data->PHYRegDef[RF_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack;
- hal_data->PHYRegDef[RF_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack;
-
- hal_data->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
- hal_data->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
+ struct bb_reg_def *reg[4];
+
+ reg[RF_PATH_A] = &(hal_data->PHYRegDef[RF_PATH_A]);
+ reg[RF_PATH_B] = &(hal_data->PHYRegDef[RF_PATH_B]);
+ reg[RF_PATH_C] = &(hal_data->PHYRegDef[RF_PATH_C]);
+ reg[RF_PATH_D] = &(hal_data->PHYRegDef[RF_PATH_D]);
+
+ reg[RF_PATH_A]->rfintfs = rFPGA0_XAB_RFInterfaceSW;
+ reg[RF_PATH_B]->rfintfs = rFPGA0_XAB_RFInterfaceSW;
+ reg[RF_PATH_C]->rfintfs = rFPGA0_XCD_RFInterfaceSW;
+ reg[RF_PATH_D]->rfintfs = rFPGA0_XCD_RFInterfaceSW;
+
+ reg[RF_PATH_A]->rfintfi = rFPGA0_XAB_RFInterfaceRB;
+ reg[RF_PATH_B]->rfintfi = rFPGA0_XAB_RFInterfaceRB;
+ reg[RF_PATH_C]->rfintfi = rFPGA0_XCD_RFInterfaceRB;
+ reg[RF_PATH_D]->rfintfi = rFPGA0_XCD_RFInterfaceRB;
+
+ reg[RF_PATH_A]->rfintfo = rFPGA0_XA_RFInterfaceOE;
+ reg[RF_PATH_B]->rfintfo = rFPGA0_XB_RFInterfaceOE;
+
+ reg[RF_PATH_A]->rfintfe = rFPGA0_XA_RFInterfaceOE;
+ reg[RF_PATH_B]->rfintfe = rFPGA0_XB_RFInterfaceOE;
+
+ reg[RF_PATH_A]->rf3wireOffset = rFPGA0_XA_LSSIParameter;
+ reg[RF_PATH_B]->rf3wireOffset = rFPGA0_XB_LSSIParameter;
+
+ reg[RF_PATH_A]->rfLSSI_Select = rFPGA0_XAB_RFParameter;
+ reg[RF_PATH_B]->rfLSSI_Select = rFPGA0_XAB_RFParameter;
+ reg[RF_PATH_C]->rfLSSI_Select = rFPGA0_XCD_RFParameter;
+ reg[RF_PATH_D]->rfLSSI_Select = rFPGA0_XCD_RFParameter;
+
+ reg[RF_PATH_A]->rfTxGainStage = rFPGA0_TxGainStage;
+ reg[RF_PATH_B]->rfTxGainStage = rFPGA0_TxGainStage;
+ reg[RF_PATH_C]->rfTxGainStage = rFPGA0_TxGainStage;
+ reg[RF_PATH_D]->rfTxGainStage = rFPGA0_TxGainStage;
+
+ reg[RF_PATH_A]->rfHSSIPara1 = rFPGA0_XA_HSSIParameter1;
+ reg[RF_PATH_B]->rfHSSIPara1 = rFPGA0_XB_HSSIParameter1;
+
+ reg[RF_PATH_A]->rfHSSIPara2 = rFPGA0_XA_HSSIParameter2;
+ reg[RF_PATH_B]->rfHSSIPara2 = rFPGA0_XB_HSSIParameter2;
+
+ reg[RF_PATH_A]->rfSwitchControl = rFPGA0_XAB_SwitchControl;
+ reg[RF_PATH_B]->rfSwitchControl = rFPGA0_XAB_SwitchControl;
+ reg[RF_PATH_C]->rfSwitchControl = rFPGA0_XCD_SwitchControl;
+ reg[RF_PATH_D]->rfSwitchControl = rFPGA0_XCD_SwitchControl;
+
+ reg[RF_PATH_A]->rfAGCControl1 = rOFDM0_XAAGCCore1;
+ reg[RF_PATH_B]->rfAGCControl1 = rOFDM0_XBAGCCore1;
+ reg[RF_PATH_C]->rfAGCControl1 = rOFDM0_XCAGCCore1;
+ reg[RF_PATH_D]->rfAGCControl1 = rOFDM0_XDAGCCore1;
+
+ reg[RF_PATH_A]->rfAGCControl2 = rOFDM0_XAAGCCore2;
+ reg[RF_PATH_B]->rfAGCControl2 = rOFDM0_XBAGCCore2;
+ reg[RF_PATH_C]->rfAGCControl2 = rOFDM0_XCAGCCore2;
+ reg[RF_PATH_D]->rfAGCControl2 = rOFDM0_XDAGCCore2;
+
+ reg[RF_PATH_A]->rfRxIQImbalance = rOFDM0_XARxIQImbalance;
+ reg[RF_PATH_B]->rfRxIQImbalance = rOFDM0_XBRxIQImbalance;
+ reg[RF_PATH_C]->rfRxIQImbalance = rOFDM0_XCRxIQImbalance;
+ reg[RF_PATH_D]->rfRxIQImbalance = rOFDM0_XDRxIQImbalance;
+
+ reg[RF_PATH_A]->rfRxAFE = rOFDM0_XARxAFE;
+ reg[RF_PATH_B]->rfRxAFE = rOFDM0_XBRxAFE;
+ reg[RF_PATH_C]->rfRxAFE = rOFDM0_XCRxAFE;
+ reg[RF_PATH_D]->rfRxAFE = rOFDM0_XDRxAFE;
+
+ reg[RF_PATH_A]->rfTxIQImbalance = rOFDM0_XATxIQImbalance;
+ reg[RF_PATH_B]->rfTxIQImbalance = rOFDM0_XBTxIQImbalance;
+ reg[RF_PATH_C]->rfTxIQImbalance = rOFDM0_XCTxIQImbalance;
+ reg[RF_PATH_D]->rfTxIQImbalance = rOFDM0_XDTxIQImbalance;
+
+ reg[RF_PATH_A]->rfTxAFE = rOFDM0_XATxAFE;
+ reg[RF_PATH_B]->rfTxAFE = rOFDM0_XBTxAFE;
+ reg[RF_PATH_C]->rfTxAFE = rOFDM0_XCTxAFE;
+ reg[RF_PATH_D]->rfTxAFE = rOFDM0_XDTxAFE;
+
+ reg[RF_PATH_A]->rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
+ reg[RF_PATH_B]->rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
+ reg[RF_PATH_C]->rfLSSIReadBack = rFPGA0_XC_LSSIReadBack;
+ reg[RF_PATH_D]->rfLSSIReadBack = rFPGA0_XD_LSSIReadBack;
+
+ reg[RF_PATH_A]->rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
+ reg[RF_PATH_B]->rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
}
static bool config_parafile(struct adapter *adapt)
break;
} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
- if (counter >= POLLING_READY_TIMEOUT_COUNT) {
+ if (counter >= POLLING_READY_TIMEOUT_COUNT)
goto exit;
- }
value32 = usb_read32(adapt, REG_MCUFWDL);
value32 |= MCUFWDL_RDY;
ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord);
FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff);
- FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16);
+ FalseAlmCnt->Cnt_SB_Search_fail = (ret_value & 0xffff0000)>>16;
ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord);
FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff);
- FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16);
+ FalseAlmCnt->Cnt_Parity_Fail = (ret_value & 0xffff0000)>>16;
ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord);
FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff);
- FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16);
+ FalseAlmCnt->Cnt_Crc8_fail = (ret_value & 0xffff0000)>>16;
ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord);
FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff);
ret_value = phy_query_bb_reg(adapter, ODM_REG_SC_CNT_11N, bMaskDWord);
FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff);
- FalseAlmCnt->Cnt_BW_USC = ((ret_value&0xffff0000)>>16);
+ FalseAlmCnt->Cnt_BW_USC = (ret_value & 0xffff0000)>>16;
/* hold cck counter */
phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT12, 1);
/* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */
/* The RSSI formula should be modified according to the gain table */
/* In 88E, cck_highpwr is always set to 1 */
- LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);
- VGA_idx = (cck_agc_rpt & 0x1F);
+ LNA_idx = (cck_agc_rpt & 0xE0) >> 5;
+ VGA_idx = cck_agc_rpt & 0x1F;
switch (LNA_idx) {
case 7:
if (VGA_idx <= 27)
if (bitmask != bMaskDWord) { /* if not "double word" write */
original_value = usb_read32(adapt, regaddr);
bit_shift = cal_bit_shift(bitmask);
- data = ((original_value & (~bitmask)) | (data << bit_shift));
+ data = (original_value & (~bitmask)) | (data << bit_shift);
}
usb_write32(adapt, regaddr, data);
u32 ret = 0;
struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
struct bb_reg_def *phyreg = &hal_data->PHYRegDef[rfpath];
- u32 newoffset;
u32 tmplong, tmplong2;
u8 rfpi_enable = 0;
offset &= 0xff;
- newoffset = offset;
tmplong = phy_query_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord);
if (rfpath == RF_PATH_A)
bMaskDWord);
tmplong2 = (tmplong2 & (~bLSSIReadAddress)) |
- (newoffset<<23) | bLSSIReadEdge;
+ (offset<<23) | bLSSIReadEdge;
phy_set_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord,
tmplong&(~bLSSIReadEdge));
u32 data_and_addr = 0;
struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
struct bb_reg_def *phyreg = &hal_data->PHYRegDef[rfpath];
- u32 newoffset;
- newoffset = offset & 0xff;
- data_and_addr = ((newoffset<<20) | (data&0x000fffff)) & 0x0fffffff;
+ offset &= 0xff;
+ data_and_addr = ((offset<<20) | (data&0x000fffff)) & 0x0fffffff;
phy_set_bb_reg(adapt, phyreg->rf3wireOffset, bMaskDWord, data_and_addr);
}
if (bit_mask != bRFRegOffsetMask) {
original_value = rf_serial_read(adapt, rf_path, reg_addr);
bit_shift = cal_bit_shift(bit_mask);
- data = ((original_value & (~bit_mask)) | (data << bit_shift));
+ data = (original_value & (~bit_mask)) | (data << bit_shift);
}
rf_serial_write(adapt, rf_path, reg_addr, data);
}
/* Set RF related register */
- switch (hal_data->rf_chip) {
- case RF_8225:
- break;
- case RF_8256:
- break;
- case RF_8258:
- break;
- case RF_PSEUDO_11N:
- break;
- case RF_6052:
+ if (hal_data->rf_chip == RF_6052)
rtl88eu_phy_rf6052_set_bandwidth(adapt, hal_data->CurrentChannelBW);
- break;
- default:
- break;
- }
}
void phy_set_bw_mode(struct adapter *adapt, enum ht_channel_width bandwidth,
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
u8 tmpchannel = hal_data->CurrentChannel;
- bool result = true;
if (hal_data->rf_chip == RF_PSEUDO_11N)
return;
hal_data->CurrentChannel = channel;
- if ((!adapt->bDriverStopped) && (!adapt->bSurpriseRemoved)) {
+ if ((!adapt->bDriverStopped) && (!adapt->bSurpriseRemoved))
phy_sw_chnl_callback(adapt, channel);
-
- if (!result)
- hal_data->CurrentChannel = tmpchannel;
-
- } else {
+ else
hal_data->CurrentChannel = tmpchannel;
- }
}
#define ODM_TXPWRTRACK_MAX_IDX_88E 6
static u8 get_right_chnl_for_iqk(u8 chnl)
{
+ u8 place;
u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = {
- 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64,
100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122,
124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153,
155, 157, 159, 161, 163, 165
};
- u8 place = chnl;
if (chnl > 14) {
- for (place = 14; place < sizeof(channel_all); place++) {
+ for (place = 0; place < sizeof(channel_all); place++) {
if (channel_all[place] == chnl)
- return place-13;
+ return ++place;
}
}
return 0;
if (dm_odm->BbSwingIdxOfdm <= dm_odm->BbSwingIdxOfdmBase) {
*direction = 1;
- pwr_value = (dm_odm->BbSwingIdxOfdmBase -
- dm_odm->BbSwingIdxOfdm);
+ pwr_value = dm_odm->BbSwingIdxOfdmBase -
+ dm_odm->BbSwingIdxOfdm;
} else {
*direction = 2;
- pwr_value = (dm_odm->BbSwingIdxOfdm -
- dm_odm->BbSwingIdxOfdmBase);
+ pwr_value = dm_odm->BbSwingIdxOfdm -
+ dm_odm->BbSwingIdxOfdmBase;
}
} else if (type == 1) { /* For CCK adjust. */
if (dm_odm->BbSwingIdxCck <= dm_odm->BbSwingIdxCckBase) {
*direction = 1;
- pwr_value = (dm_odm->BbSwingIdxCckBase -
- dm_odm->BbSwingIdxCck);
+ pwr_value = dm_odm->BbSwingIdxCckBase -
+ dm_odm->BbSwingIdxCck;
} else {
*direction = 2;
- pwr_value = (dm_odm->BbSwingIdxCck -
- dm_odm->BbSwingIdxCckBase);
+ pwr_value = dm_odm->BbSwingIdxCck -
+ dm_odm->BbSwingIdxCckBase;
}
}
u8 thermal_val = 0, delta, delta_lck, delta_iqk, offset;
u8 thermal_avg_count = 0;
u32 thermal_avg = 0;
- s32 ele_a = 0, ele_d, temp_cck, x, value32;
- s32 y, ele_c = 0;
+ s32 ele_d, temp_cck;
s8 ofdm_index[2], cck_index = 0;
s8 ofdm_index_old[2] = {0, 0}, cck_index_old = 0;
u32 i = 0, j = 0;
bool is2t = false;
u8 ofdm_min_index = 6, rf; /* OFDM BB Swing should be less than +3.0dB */
- u8 indexforchannel = 0;
s8 ofdm_index_mapping[2][index_mapping_NUM_88E] = {
/* 2.4G, decrease power */
{0, 0, 2, 3, 4, 4, 5, 6, 7, 7, 8, 9, 10, 10, 11},
temp_cck = dm_odm->RFCalibrateInfo.RegA24;
for (i = 0; i < CCK_TABLE_SIZE; i++) {
- if (dm_odm->RFCalibrateInfo.bCCKinCH14) {
- if (memcmp(&temp_cck, &CCKSwingTable_Ch14[i][2], 4)) {
- cck_index_old = (u8)i;
- dm_odm->BbSwingIdxCckBase = (u8)i;
- break;
- }
- } else {
- if (memcmp(&temp_cck, &CCKSwingTable_Ch1_Ch13[i][2], 4)) {
+ if ((dm_odm->RFCalibrateInfo.bCCKinCH14 &&
+ memcmp(&temp_cck, &CCKSwingTable_Ch14[i][2], 4)) ||
+ memcmp(&temp_cck, &CCKSwingTable_Ch1_Ch13[i][2], 4)) {
cck_index_old = (u8)i;
dm_odm->BbSwingIdxCckBase = (u8)i;
break;
- }
}
}
if (thermal_avg_count)
thermal_val = (u8)(thermal_avg / thermal_avg_count);
- if (dm_odm->RFCalibrateInfo.bReloadtxpowerindex) {
- delta = thermal_val > hal_data->EEPROMThermalMeter ?
- (thermal_val - hal_data->EEPROMThermalMeter) :
- (hal_data->EEPROMThermalMeter - thermal_val);
- dm_odm->RFCalibrateInfo.bReloadtxpowerindex = false;
- dm_odm->RFCalibrateInfo.bDoneTxpower = false;
- } else if (dm_odm->RFCalibrateInfo.bDoneTxpower) {
- delta = (thermal_val > dm_odm->RFCalibrateInfo.ThermalValue) ?
- (thermal_val - dm_odm->RFCalibrateInfo.ThermalValue) :
- (dm_odm->RFCalibrateInfo.ThermalValue - thermal_val);
- } else {
- delta = thermal_val > hal_data->EEPROMThermalMeter ?
- (thermal_val - hal_data->EEPROMThermalMeter) :
- (hal_data->EEPROMThermalMeter - thermal_val);
+ if (dm_odm->RFCalibrateInfo.bDoneTxpower &&
+ !dm_odm->RFCalibrateInfo.bReloadtxpowerindex)
+ delta = abs(thermal_val - dm_odm->RFCalibrateInfo.ThermalValue);
+ else {
+ delta = abs(thermal_val - hal_data->EEPROMThermalMeter);
+ if (dm_odm->RFCalibrateInfo.bReloadtxpowerindex) {
+ dm_odm->RFCalibrateInfo.bReloadtxpowerindex = false;
+ dm_odm->RFCalibrateInfo.bDoneTxpower = false;
+ }
}
- delta_lck = (thermal_val > dm_odm->RFCalibrateInfo.ThermalValue_LCK) ?
- (thermal_val - dm_odm->RFCalibrateInfo.ThermalValue_LCK) :
- (dm_odm->RFCalibrateInfo.ThermalValue_LCK - thermal_val);
- delta_iqk = (thermal_val > dm_odm->RFCalibrateInfo.ThermalValue_IQK) ?
- (thermal_val - dm_odm->RFCalibrateInfo.ThermalValue_IQK) :
- (dm_odm->RFCalibrateInfo.ThermalValue_IQK - thermal_val);
+
+ delta_lck = abs(dm_odm->RFCalibrateInfo.ThermalValue_LCK - thermal_val);
+ delta_iqk = abs(dm_odm->RFCalibrateInfo.ThermalValue_IQK - thermal_val);
/* Delta temperature is equal to or larger than 20 centigrade.*/
if ((delta_lck >= 8)) {
}
if (delta > 0 && dm_odm->RFCalibrateInfo.TxPowerTrackControl) {
- delta = thermal_val > hal_data->EEPROMThermalMeter ?
- (thermal_val - hal_data->EEPROMThermalMeter) :
- (hal_data->EEPROMThermalMeter - thermal_val);
+ delta = abs(hal_data->EEPROMThermalMeter - thermal_val);
+
/* calculate new OFDM / CCK offset */
if (thermal_val > hal_data->EEPROMThermalMeter)
j = 1;
}
if (offset >= index_mapping_NUM_88E)
offset = index_mapping_NUM_88E-1;
- for (i = 0; i < rf; i++)
- ofdm_index[i] = dm_odm->RFCalibrateInfo.OFDM_index[i] + ofdm_index_mapping[j][offset];
- cck_index = dm_odm->RFCalibrateInfo.CCK_index + ofdm_index_mapping[j][offset];
+ /* Updating ofdm_index values with new OFDM / CCK offset */
for (i = 0; i < rf; i++) {
+ ofdm_index[i] = dm_odm->RFCalibrateInfo.OFDM_index[i] + ofdm_index_mapping[j][offset];
if (ofdm_index[i] > OFDM_TABLE_SIZE_92D-1)
ofdm_index[i] = OFDM_TABLE_SIZE_92D-1;
else if (ofdm_index[i] < ofdm_min_index)
ofdm_index[i] = ofdm_min_index;
}
+ cck_index = dm_odm->RFCalibrateInfo.CCK_index + ofdm_index_mapping[j][offset];
if (cck_index > CCK_TABLE_SIZE-1)
cck_index = CCK_TABLE_SIZE-1;
else if (cck_index < 0)
if (dm_odm->RFCalibrateInfo.TxPowerTrackControl) {
dm_odm->RFCalibrateInfo.bDoneTxpower = true;
- /* Adujst OFDM Ant_A according to IQK result */
- ele_d = (OFDMSwingTable[(u8)ofdm_index[0]] & 0xFFC00000)>>22;
- x = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[indexforchannel].Value[0][0];
- y = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[indexforchannel].Value[0][1];
-
/* Revse TX power table. */
dm_odm->BbSwingIdxOfdm = (u8)ofdm_index[0];
dm_odm->BbSwingIdxCck = (u8)cck_index;
dm_odm->BbSwingIdxCckCurrent = dm_odm->BbSwingIdxCck;
dm_odm->BbSwingFlagCck = true;
}
-
- if (x != 0) {
- if ((x & 0x00000200) != 0)
- x = x | 0xFFFFFC00;
- ele_a = ((x * ele_d)>>8)&0x000003FF;
-
- /* new element C = element D x Y */
- if ((y & 0x00000200) != 0)
- y = y | 0xFFFFFC00;
- ele_c = ((y * ele_d)>>8)&0x000003FF;
-
- }
-
- if (is2t) {
- ele_d = (OFDMSwingTable[(u8)ofdm_index[1]] & 0xFFC00000)>>22;
-
- /* new element A = element D x X */
- x = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[indexforchannel].Value[0][4];
- y = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[indexforchannel].Value[0][5];
-
- if ((x != 0) && (*(dm_odm->pBandType) == ODM_BAND_2_4G)) {
- if ((x & 0x00000200) != 0) /* consider minus */
- x = x | 0xFFFFFC00;
- ele_a = ((x * ele_d)>>8)&0x000003FF;
-
- /* new element C = element D x Y */
- if ((y & 0x00000200) != 0)
- y = y | 0xFFFFFC00;
- ele_c = ((y * ele_d)>>8)&0x00003FF;
-
- /* wtite new elements A, C, D to regC88 and regC9C, element B is always 0 */
- value32 = (ele_d<<22) | ((ele_c&0x3F)<<16) | ele_a;
- phy_set_bb_reg(adapt, rOFDM0_XBTxIQImbalance, bMaskDWord, value32);
-
- value32 = (ele_c&0x000003C0)>>6;
- phy_set_bb_reg(adapt, rOFDM0_XDTxAFE, bMaskH4Bits, value32);
-
- value32 = ((x * ele_d)>>7)&0x01;
- phy_set_bb_reg(adapt, rOFDM0_ECCAThreshold, BIT28, value32);
- } else {
- phy_set_bb_reg(adapt, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[(u8)ofdm_index[1]]);
- phy_set_bb_reg(adapt, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00);
- phy_set_bb_reg(adapt, rOFDM0_ECCAThreshold, BIT28, 0x00);
- }
-
- }
-
}
}
u32 path_on;
u32 i;
- path_on = is_path_a_on ? 0x04db25a4 : 0x0b1b25a4;
if (!is2t) {
path_on = 0x0bdb25a0;
phy_set_bb_reg(adapt, adda_reg[0], bMaskDWord, 0x0b1b25a0);
} else {
+ path_on = is_path_a_on ? 0x04db25a4 : 0x0b1b25a4;
phy_set_bb_reg(adapt, adda_reg[0], bMaskDWord, path_on);
}
static bool simularity_compare(struct adapter *adapt, s32 resulta[][8],
u8 c1, u8 c2)
{
- u32 i, j, diff, sim_bitmap, bound = 0;
+ u32 i, j, diff, sim_bitmap = 0, bound;
struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
struct odm_dm_struct *dm_odm = &hal_data->odmpriv;
u8 final_candidate[2] = {0xFF, 0xFF}; /* for path A and path B */
bool result = true;
- bool is2t;
s32 tmp1 = 0, tmp2 = 0;
if ((dm_odm->RFType == ODM_2T2R) || (dm_odm->RFType == ODM_2T3R) ||
(dm_odm->RFType == ODM_2T4R))
- is2t = true;
- else
- is2t = false;
-
- if (is2t)
bound = 8;
else
bound = 4;
- sim_bitmap = 0;
-
for (i = 0; i < bound; i++) {
if ((i == 1) || (i == 3) || (i == 5) || (i == 7)) {
if ((resulta[c1][i] & 0x00000200) != 0)
RT_TRACE(_module_hal_init_c_, _drv_info_,
("rtl88eu_pwrseqcmdparsing: PWR_CMD_END\n"));
return true;
- break;
default:
RT_TRACE(_module_hal_init_c_, _drv_err_,
("rtl88eu_pwrseqcmdparsing: Unknown CMD!!\n"));
break;
case 2: /* Better regulatory */
/* don't increase any power diff */
- write_val = ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
+ write_val = (index < 2) ? powerbase0[rf] : powerbase1[rf];
break;
case 3: /* Customer defined power diff. */
/* increase power diff defined by customer. */
return false;
cond = condition & 0x0000FF00;
- cond = cond >> 8;
+ cond >>= 8;
if ((_interface & cond) == 0 && cond != 0x07)
return false;
cond = condition & 0x00FF0000;
- cond = cond >> 16;
+ cond >>= 16;
if ((_platform & cond) == 0 && cond != 0x0F)
return false;
return true;
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
if (!AutoLoadFail)
- pHalData->BoardType = ((hwinfo[EEPROM_RF_BOARD_OPTION_88E]&0xE0)>>5);
+ pHalData->BoardType = (hwinfo[EEPROM_RF_BOARD_OPTION_88E]
+ & 0xE0) >> 5;
else
pHalData->BoardType = 0;
DBG_88E("Board Type: 0x%2x\n", pHalData->BoardType);
_rtw_init_queue(&precvpriv->free_recv_buf_queue);
precvpriv->pallocated_recv_buf =
- kzalloc(NR_RECVBUFF * sizeof(struct recv_buf), GFP_KERNEL);
+ kcalloc(NR_RECVBUFF, sizeof(struct recv_buf), GFP_KERNEL);
if (precvpriv->pallocated_recv_buf == NULL) {
res = _FAIL;
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN);
}
RT_TRACE(_module_hci_hal_init_c_, _drv_notice_,
- ("Hal_EfuseParseMACAddr_8188EU: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
- eeprom->mac_addr[0], eeprom->mac_addr[1],
- eeprom->mac_addr[2], eeprom->mac_addr[3],
- eeprom->mac_addr[4], eeprom->mac_addr[5]));
+ ("Hal_EfuseParseMACAddr_8188EU: Permanent Address = %pM\n",
+ eeprom->mac_addr));
}
static void
/* Set RTS initial rate */
while (BrateCfg > 0x1) {
- BrateCfg = (BrateCfg >> 1);
+ BrateCfg >>= 1;
RateIndex++;
}
/* Ziv - Check */
#define WPA_SELECTOR_LEN 4
extern u8 RTW_WPA_OUI_TYPE[];
-extern u16 RTW_WPA_VERSION;
extern u8 WPA_AUTH_KEY_MGMT_NONE[];
extern u8 WPA_AUTH_KEY_MGMT_UNSPEC_802_1X[];
extern u8 WPA_AUTH_KEY_MGMT_PSK_OVER_802_1X[];
return ret;
}
-static inline void _init_timer(struct timer_list *ptimer,
- struct net_device *nic_hdl,
- void *pfunc, void *cntx)
-{
- ptimer->function = pfunc;
- ptimer->data = (unsigned long)cntx;
- init_timer(ptimer);
-}
-
-static inline void _set_timer(struct timer_list *ptimer, u32 delay_time)
-{
- mod_timer(ptimer , (jiffies+msecs_to_jiffies(delay_time)));
-}
-
-#define RTW_TIMER_HDL_ARGS void *FunctionContext
-#define RTW_TIMER_HDL_NAME(name) rtw_##name##_timer_hdl
-#define RTW_DECLARE_TIMER_HDL(name) \
- void RTW_TIMER_HDL_NAME(name)(RTW_TIMER_HDL_ARGS)
-
static inline int rtw_netif_queue_stopped(struct net_device *pnetdev)
{
return netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 0)) &&
(adapt)->ledpriv.LedControlHandler((adapt), (action)); \
} while (0)
-void BlinkTimerCallback(void *data);
+void BlinkTimerCallback(unsigned long data);
void BlinkWorkItemCallback(struct work_struct *work);
void ResetLedStatus(struct LED_871x *pLed);
void rtw_get_encrypt_decrypt_from_registrypriv(struct adapter *adapter);
-void _rtw_join_timeout_handler(void *function_context);
-void rtw_scan_timeout_handler(void *function_context);
+void _rtw_join_timeout_handler(unsigned long data);
+void rtw_scan_timeout_handler(unsigned long data);
-void rtw_dynamic_check_timer_handlder(void *function_context);
+void rtw_dynamic_check_timer_handlder(unsigned long data);
#define rtw_is_scan_deny(adapter) false
#define rtw_clear_scan_deny(adapter) do {} while (0)
#define rtw_set_scan_deny_timer_hdl(adapter) do {} while (0)
void linked_status_chk(struct adapter *padapter);
-void survey_timer_hdl(void *function_context);
-void link_timer_hdl(void *funtion_context);
-void addba_timer_hdl(void *function_context);
+void survey_timer_hdl(unsigned long data);
+void link_timer_hdl(unsigned long data);
+void addba_timer_hdl(unsigned long data);
#define set_survey_timer(mlmeext, ms) \
- do { \
- _set_timer(&(mlmeext)->survey_timer, (ms)); \
- } while (0)
+ mod_timer(&mlmeext->survey_timer, jiffies + \
+ msecs_to_jiffies(ms))
#define set_link_timer(mlmeext, ms) \
- do { \
- _set_timer(&(mlmeext)->link_timer, (ms)); \
- } while (0)
+ mod_timer(&mlmeext->link_timer, jiffies + \
+ msecs_to_jiffies(ms))
int cckrates_included(unsigned char *rate, int ratelen);
int cckratesonly_included(unsigned char *rate, int ratelen);
#define RTW_PWR_STATE_CHK_INTERVAL 2000
#define _rtw_set_pwr_state_check_timer(pwrctrlpriv, ms) \
- do { \
- _set_timer(&(pwrctrlpriv)->pwr_state_check_timer, (ms)); \
- } while (0)
+ mod_timer(&pwrctrlpriv->pwr_state_check_timer, \
+ jiffies + msecs_to_jiffies(ms))
#define rtw_set_pwr_state_check_timer(pwrctrl) \
_rtw_set_pwr_state_check_timer((pwrctrl), \
};
#define rtw_set_signal_stat_timer(recvpriv) \
- _set_timer(&(recvpriv)->signal_stat_timer, \
- (recvpriv)->signal_stat_sampling_interval)
+ mod_timer(&(recvpriv)->signal_stat_timer, jiffies + \
+ msecs_to_jiffies((recvpriv)->signal_stat_sampling_interval))
struct sta_recv_priv {
spinlock_t lock;
struct __queue *pfree_recv_queue);
u32 rtw_free_uc_swdec_pending_queue(struct adapter *adapter);
-void rtw_reordering_ctrl_timeout_handler(void *pcontext);
+void rtw_reordering_ctrl_timeout_handler(unsigned long data);
static inline u8 *get_rxmem(struct recv_frame *precvframe)
{
};
extern const u32 Te0[256];
-extern const u32 Te1[256];
-extern const u32 Te2[256];
-extern const u32 Te3[256];
-extern const u32 Te4[256];
extern const u32 Td0[256];
extern const u32 Td1[256];
extern const u32 Td2[256];
#define TE1(i) rotr(Te0[((i) >> 16) & 0xff], 8)
#define TE2(i) rotr(Te0[((i) >> 8) & 0xff], 16)
#define TE3(i) rotr(Te0[(i) & 0xff], 24)
-#define TE41(i) ((Te0[((i) >> 24) & 0xff] << 8) & 0xff000000)
-#define TE42(i) (Te0[((i) >> 16) & 0xff] & 0x00ff0000)
-#define TE43(i) (Te0[((i) >> 8) & 0xff] & 0x0000ff00)
-#define TE44(i) ((Te0[(i) & 0xff] >> 8) & 0x000000ff)
-#define TE421(i) ((Te0[((i) >> 16) & 0xff] << 8) & 0xff000000)
-#define TE432(i) (Te0[((i) >> 8) & 0xff] & 0x00ff0000)
-#define TE443(i) (Te0[(i) & 0xff] & 0x0000ff00)
-#define TE414(i) ((Te0[((i) >> 24) & 0xff] >> 8) & 0x000000ff)
-#define TE4(i) ((Te0[(i)] >> 8) & 0x000000ff)
-
-#define TD0(i) Td0[((i) >> 24) & 0xff]
-#define TD1(i) rotr(Td0[((i) >> 16) & 0xff], 8)
-#define TD2(i) rotr(Td0[((i) >> 8) & 0xff], 16)
-#define TD3(i) rotr(Td0[(i) & 0xff], 24)
-#define TD41(i) (Td4s[((i) >> 24) & 0xff] << 24)
-#define TD42(i) (Td4s[((i) >> 16) & 0xff] << 16)
-#define TD43(i) (Td4s[((i) >> 8) & 0xff] << 8)
-#define TD44(i) (Td4s[(i) & 0xff])
-#define TD0_(i) Td0[(i) & 0xff]
-#define TD1_(i) rotr(Td0[(i) & 0xff], 8)
-#define TD2_(i) rotr(Td0[(i) & 0xff], 16)
-#define TD3_(i) rotr(Td0[(i) & 0xff], 24)
#define GETU32(pt) (((u32)(pt)[0] << 24) ^ ((u32)(pt)[1] << 16) ^ \
((u32)(pt)[2] << 8) ^ ((u32)(pt)[3]))
#define GetPrivacy(pbuf) \
(((*(__le16 *)(pbuf)) & cpu_to_le16(_PRIVACY_)) != 0)
-#define ClearPrivacy(pbuf) \
- *(__le16 *)(pbuf) &= (~cpu_to_le16(_PRIVACY_))
-
-
#define GetOrder(pbuf) \
(((*(__le16 *)(pbuf)) & cpu_to_le16(_ORDER_)) != 0)
#define GetFrameType(pbuf) \
(le16_to_cpu(*(__le16 *)(pbuf)) & (BIT(3) | BIT(2)))
-#define SetFrameType(pbuf, type) \
- do { \
- *(unsigned short *)(pbuf) &= __constant_cpu_to_le16(~(BIT(3) | BIT(2))); \
- *(unsigned short *)(pbuf) |= __constant_cpu_to_le16(type); \
- } while (0)
-
#define GetFrameSubType(pbuf) (le16_to_cpu(*(__le16 *)(pbuf)) & (BIT(7) |\
BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2)))
#define GetFragNum(pbuf) \
(le16_to_cpu(*(__le16 *)((size_t)(pbuf) + 22)) & 0x0f)
-#define GetTupleCache(pbuf) \
- (cpu_to_le16(*(unsigned short *)((size_t)(pbuf) + 22)))
-
-#define SetFragNum(pbuf, num) \
- do { \
- *(unsigned short *)((size_t)(pbuf) + 22) = \
- ((*(unsigned short *)((size_t)(pbuf) + 22)) & \
- le16_to_cpu(~(0x000f))) | \
- cpu_to_le16(0x0f & (num)); \
- } while (0)
-
#define SetSeqNum(pbuf, num) \
do { \
*(__le16 *)((size_t)(pbuf) + 22) = \
#define GetAMsdu(pbuf) (((le16_to_cpu(*(__le16 *)pbuf)) >> 7) & 0x1)
-#define SetAMsdu(pbuf, amsdu) \
- *(__le16 *)(pbuf) |= cpu_to_le16((amsdu & 1) << 7)
-
#define GetAid(pbuf) (le16_to_cpu(*(__le16 *)((size_t)(pbuf) + 2)) & 0x3fff)
-#define GetTid(pbuf) (le16_to_cpu(*(__le16 *)((size_t)(pbuf) + \
- (((GetToDs(pbuf)<<1) | GetFrDs(pbuf)) == 3 ? \
- 30 : 24))) & 0x000f)
-
#define GetAddr1Ptr(pbuf) ((unsigned char *)((size_t)(pbuf) + 4))
#define GetAddr2Ptr(pbuf) ((unsigned char *)((size_t)(pbuf) + 10))
#define P2P_STATUS_FAIL_INCOMPATIBLE_PROVSION 0x0A
#define P2P_STATUS_FAIL_USER_REJECT 0x0B
-/* Value of Inviation Flags Attribute */
+/* Value of Invitation Flags Attribute */
#define P2P_INVITATION_FLAGS_PERSISTENT BIT(0)
#define DMP_P2P_DEVCAP_SUPPORT (P2P_DEVCAP_SERVICE_DISCOVERY | \
#define P2P_WILDCARD_SSID_LEN 7
-/* default value, used when: (1)p2p disabed or (2)p2p enabled
+/* default value, used when: (1)p2p disabled or (2)p2p enabled
* but only do 1 scan phase */
#define P2P_FINDPHASE_EX_NONE 0
/* used when p2p enabled and want to do 1 scan phase and
P2P_STATE_TX_PROVISION_DIS_REQ = 6,
P2P_STATE_RX_PROVISION_DIS_RSP = 7,
P2P_STATE_RX_PROVISION_DIS_REQ = 8,
- /* Doing the group owner negoitation handshake */
+ /* Doing the group owner negotiation handshake */
P2P_STATE_GONEGO_ING = 9,
- /* finish the group negoitation handshake with success */
+ /* finish the group negotiation handshake with success */
P2P_STATE_GONEGO_OK = 10,
- /* finish the group negoitation handshake with failure */
+ /* finish the group negotiation handshake with failure */
P2P_STATE_GONEGO_FAIL = 11,
- /* receiving the P2P Inviation request and match with the profile. */
+ /* receiving the P2P Invitation request and match with the profile. */
P2P_STATE_RECV_INVITE_REQ_MATCH = 12,
/* Doing the P2P WPS */
P2P_STATE_PROVISIONING_ING = 13,
P2P_STATE_TX_INVITE_REQ = 15,
/* Receiving the P2P Invitation response */
P2P_STATE_RX_INVITE_RESP_OK = 16,
- /* receiving the P2P Inviation request and dismatch with the profile. */
+ /* receiving the P2P Invitation request and dismatch with the profile. */
P2P_STATE_RECV_INVITE_REQ_DISMATCH = 17,
- /* receiving the P2P Inviation request and this wifi is GO. */
+ /* receiving the P2P Invitation request and this wifi is GO. */
P2P_STATE_RECV_INVITE_REQ_GO = 18,
- /* receiving the P2P Inviation request to join an existing P2P Group. */
+ /* receiving the P2P Invitation request to join an existing P2P Group. */
P2P_STATE_RECV_INVITE_REQ_JOIN = 19,
- /* recveing the P2P Inviation response with failure */
+ /* receiving the P2P Invitation response with failure */
P2P_STATE_RX_INVITE_RESP_FAIL = 20,
- /* receiving p2p negoitation response with information is not available */
+ /* receiving p2p negotiation response with information is not available */
P2P_STATE_RX_INFOR_NOREADY = 21,
- /* sending p2p negoitation response with information is not available */
+ /* sending p2p negotiation response with information is not available */
P2P_STATE_TX_INFOR_NOREADY = 22,
};
Ndis802_11ReloadWEPKeys
};
-/* Key mapping keys require a BSSID */
-struct ndis_802_11_key {
- u32 Length; /* Length of this structure */
- u32 KeyIndex;
- u32 KeyLength; /* length of key in bytes */
- unsigned char BSSID[ETH_ALEN];
- unsigned long long KeyRSC;
- u8 KeyMaterial[32]; /* var len depending on above field */
-};
-
struct ndis_802_11_remove_key {
u32 Length; /* Length */
u32 KeyIndex;
#include <rtw_iol.h>
#include <linux/vmalloc.h>
+#include <linux/etherdevice.h>
+
#include "osdep_intf.h"
#define RTL_IOCTL_WPA_SUPPLICANT (SIOCIWFIRSTPRIV + 30)
memset(&wrqu, 0, sizeof(union iwreq_data));
wrqu.ap_addr.sa_family = ARPHRD_ETHER;
- memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
+ eth_zero_addr(wrqu.ap_addr.sa_data);
DBG_88E_LEVEL(_drv_always_, "indicate disassoc\n");
wireless_send_event(padapter->pnetdev, SIOCGIWAP, &wrqu, NULL);
for (j = 0; j < NUM_PMKID_CACHE; j++) {
if (!memcmp(psecuritypriv->PMKIDList[j].Bssid, strIssueBssid, ETH_ALEN)) {
/* BSSID is matched, the same AP => Remove this PMKID information and reset it. */
- memset(psecuritypriv->PMKIDList[j].Bssid, 0x00, ETH_ALEN);
+ eth_zero_addr(psecuritypriv->PMKIDList[j].Bssid);
psecuritypriv->PMKIDList[j].bUsed = false;
break;
}
wrqu->ap_addr.sa_family = ARPHRD_ETHER;
- memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
+ eth_zero_addr(wrqu->ap_addr.sa_data);
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("rtw_wx_get_wap\n"));
((check_fwstate(pmlmepriv, WIFI_AP_STATE)) == true))
memcpy(wrqu->ap_addr.sa_data, pcur_bss->MacAddress, ETH_ALEN);
else
- memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
+ eth_zero_addr(wrqu->ap_addr.sa_data);
return 0;
}
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
- int ret;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
- ret = rtw_set_wpa_ie(padapter, extra, wrqu->data.length);
- return ret;
+ return rtw_set_wpa_ie(padapter, extra, wrqu->data.length);
}
static int rtw_wx_set_auth(struct net_device *dev,
{
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
- _init_timer(&(pmlmepriv->assoc_timer), padapter->pnetdev, _rtw_join_timeout_handler, padapter);
- _init_timer(&(pmlmepriv->scan_to_timer), padapter->pnetdev, rtw_scan_timeout_handler, padapter);
- _init_timer(&(pmlmepriv->dynamic_chk_timer), padapter->pnetdev, rtw_dynamic_check_timer_handlder, padapter);
+ setup_timer(&pmlmepriv->assoc_timer, _rtw_join_timeout_handler,
+ (unsigned long)padapter);
+ setup_timer(&pmlmepriv->scan_to_timer, rtw_scan_timeout_handler,
+ (unsigned long)padapter);
+ setup_timer(&pmlmepriv->dynamic_chk_timer,
+ rtw_dynamic_check_timer_handlder, (unsigned long)padapter);
}
void rtw_os_indicate_connect(struct adapter *adapter)
/* We have to backup the PMK information for WiFi PMK Caching test item. */
/* Backup the btkip_countermeasure information. */
/* When the countermeasure is trigger, the driver have to disconnect with AP for 60 seconds. */
- memset(&backup_pmkid[0], 0x00, sizeof(struct rt_pmkid_list) * NUM_PMKID_CACHE);
memcpy(&backup_pmkid[0], &adapter->securitypriv.PMKIDList[0], sizeof(struct rt_pmkid_list) * NUM_PMKID_CACHE);
backup_index = adapter->securitypriv.PMKIDIndex;
backup_counter = adapter->securitypriv.btkip_countermeasure;
void init_addba_retry_timer(struct adapter *padapter, struct sta_info *psta)
{
- _init_timer(&psta->addba_retry_timer, padapter->pnetdev, addba_timer_hdl, psta);
+ setup_timer(&psta->addba_retry_timer, addba_timer_hdl,
+ (unsigned long)psta);
}
void init_mlme_ext_timer(struct adapter *padapter)
{
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
- _init_timer(&pmlmeext->survey_timer, padapter->pnetdev, survey_timer_hdl, padapter);
- _init_timer(&pmlmeext->link_timer, padapter->pnetdev, link_timer_hdl, padapter);
+ setup_timer(&pmlmeext->survey_timer, survey_timer_hdl,
+ (unsigned long)padapter);
+ setup_timer(&pmlmeext->link_timer, link_timer_hdl,
+ (unsigned long)padapter);
}
#ifdef CONFIG_88EU_AP_MODE
#define RTW_NOTCH_FILTER 0 /* 0:Disable, 1:Enable, */
/* module param defaults */
-static int rtw_chip_version = 0x00;
+static int rtw_chip_version;
static int rtw_rfintfs = HWPI;
static int rtw_lbkmode;/* RTL8712_AIR_TRX; */
static int rtw_network_mode = Ndis802_11IBSS;/* Ndis802_11Infrastructure; infra, ad-hoc, auto */
}
padapter->net_closed = false;
- _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000);
+ mod_timer(&padapter->mlmepriv.dynamic_chk_timer,
+ jiffies + msecs_to_jiffies(2000));
padapter->pwrctrlpriv.bips_processing = false;
rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv);
padapter->intf_start(padapter);
rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv);
- _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 5000);
+ mod_timer(&padapter->mlmepriv.dynamic_chk_timer,
+ jiffies + msecs_to_jiffies(5000));
return _SUCCESS;
void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl)
{
- struct adapter *padapter = preorder_ctrl->padapter;
- _init_timer(&(preorder_ctrl->reordering_ctrl_timer), padapter->pnetdev, rtw_reordering_ctrl_timeout_handler, preorder_ctrl);
+ setup_timer(&preorder_ctrl->reordering_ctrl_timer,
+ rtw_reordering_ctrl_timeout_handler,
+ (unsigned long)preorder_ctrl);
}
{
RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+usb_intf_stop\n"));
- /* disabel_hw_interrupt */
+ /* disable_hw_interrupt */
if (!padapter->bSurpriseRemoved) {
/* device still exists, so driver can do i/o operation */
/* TODO: */
{
int i;
struct recv_buf *precvbuf;
+
precvbuf = (struct recv_buf *)padapter->recvpriv.precv_buf;
DBG_88E("%s\n", __func__);
u16 index;
u16 len;
u8 data;
- int ret;
request = 0x05;
requesttype = 0x00;/* write_out */
wvalue = (u16)(addr&0x0000ffff);
len = 1;
data = val;
- ret = usbctrl_vendorreq(adapter, request, wvalue, index, &data, len, requesttype);
- return ret;
+ return usbctrl_vendorreq(adapter, request, wvalue,
+ index, &data, len, requesttype);
}
int usb_write16(struct adapter *adapter, u32 addr, u16 val)
u16 index;
u16 len;
__le32 data;
- int ret;
request = 0x05;
data = cpu_to_le32(val & 0x0000ffff);
- ret = usbctrl_vendorreq(adapter, request, wvalue, index, &data, len, requesttype);
+ return usbctrl_vendorreq(adapter, request, wvalue,
+ index, &data, len, requesttype);
- return ret;
}
int usb_write32(struct adapter *adapter, u32 addr, u32 val)
u16 index;
u16 len;
__le32 data;
- int ret;
request = 0x05;
len = 4;
data = cpu_to_le32(val);
- ret = usbctrl_vendorreq(adapter, request, wvalue, index, &data, len, requesttype);
+ return usbctrl_vendorreq(adapter, request, wvalue,
+ index, &data, len, requesttype);
- return ret;
}
static void usb_write_port_complete(struct urb *purb, struct pt_regs *regs)
(GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0)
#define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) \
- eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
+ ether_addr_equal_unaligned(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, \
+ __pTa)
#define UPDATE_CIE_SRC(__pIeeeDev, __pTa) \
cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
-#define IS_COUNTRY_IE_CHANGED(__pIeeeDev, __Ie) \
- (((__Ie).Length == 0 || (__Ie).Length != \
- GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen) ? \
- false : (!memcmp(GET_DOT11D_INFO(__pIeeeDev)->CountryIeBuf, \
- (__Ie).Octet, (__Ie).Length)))
-
#define CIE_WATCHDOG_TH 1
#define GET_CIE_WATCHDOG(__pIeeeDev) \
(GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog)
0x0e, bMask12Bits, 0x021);
} else {
- RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): "
- "unknown hardware version\n");
+ RT_TRACE(COMP_ERR,
+ "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
}
break;
0x0e, bMask12Bits, 0x0e1);
} else {
- RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): "
- "unknown hardware version\n");
+ RT_TRACE(COMP_ERR,
+ "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
}
break;
default:
- RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown "
- "Bandwidth: %#X\n", Bandwidth);
+ RT_TRACE(COMP_ERR,
+ "PHY_SetRF8256Bandwidth(): unknown Bandwidth: %#X\n",
+ Bandwidth);
break;
}
rtStatus = rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF,
(enum rf90_radio_path)eRFPath);
if (!rtStatus) {
- RT_TRACE(COMP_ERR, "PHY_RF8256_Config():Check "
- "Radio[%d] Fail!!\n", eRFPath);
+ RT_TRACE(COMP_ERR,
+ "PHY_RF8256_Config():Check Radio[%d] Fail!!\n",
+ eRFPath);
goto phy_RF8256_Config_ParaFile_Fail;
}
(enum rf90_radio_path)eRFPath,
RegOffSetToBeCheck,
bMask12Bits);
- RT_TRACE(COMP_RF, "RF %d %d register final "
- "value: %x\n", eRFPath,
- RegOffSetToBeCheck, RF3_Final_Value);
+ RT_TRACE(COMP_RF,
+ "RF %d %d register final value: %x\n",
+ eRFPath, RegOffSetToBeCheck,
+ RF3_Final_Value);
RetryTimes--;
}
break;
(enum rf90_radio_path)eRFPath,
RegOffSetToBeCheck,
bMask12Bits);
- RT_TRACE(COMP_RF, "RF %d %d register final "
- "value: %x\n", eRFPath,
- RegOffSetToBeCheck, RF3_Final_Value);
+ RT_TRACE(COMP_RF,
+ "RF %d %d register final value: %x\n",
+ eRFPath, RegOffSetToBeCheck,
+ RF3_Final_Value);
RetryTimes--;
}
break;
(enum rf90_radio_path)eRFPath,
RegOffSetToBeCheck,
bMask12Bits);
- RT_TRACE(COMP_RF, "RF %d %d register final "
- "value: %x\n", eRFPath,
- RegOffSetToBeCheck, RF3_Final_Value);
+ RT_TRACE(COMP_RF,
+ "RF %d %d register final value: %x\n",
+ eRFPath, RegOffSetToBeCheck,
+ RF3_Final_Value);
RetryTimes--;
}
break;
RF3_Final_Value = rtl8192_phy_QueryRFReg(dev,
(enum rf90_radio_path)eRFPath,
RegOffSetToBeCheck, bMask12Bits);
- RT_TRACE(COMP_RF, "RF %d %d register final "
- "value: %x\n", eRFPath,
- RegOffSetToBeCheck, RF3_Final_Value);
+ RT_TRACE(COMP_RF,
+ "RF %d %d register final value: %x\n",
+ eRFPath, RegOffSetToBeCheck,
+ RF3_Final_Value);
RetryTimes--;
}
break;
}
if (ret) {
- RT_TRACE(COMP_ERR, "phy_RF8256_Config_ParaFile():"
- "Radio[%d] Fail!!", eRFPath);
+ RT_TRACE(COMP_ERR,
+ "phy_RF8256_Config_ParaFile():Radio[%d] Fail!!",
+ eRFPath);
goto phy_RF8256_Config_ParaFile_Fail;
}
do {
if ((buffer_len - frag_offset) > frag_threshold) {
- frag_length = frag_threshold ;
+ frag_length = frag_threshold;
bLastIniPkt = 0;
} else {
static void cmpk_handle_interrupt_status(struct net_device *dev, u8 *pmsg)
{
- struct cmpk_intr_sta rx_intr_status; /* */
+ struct cmpk_intr_sta rx_intr_status;
struct r8192_priv *priv = rtllib_priv(dev);
DMESG("---> cmpk_Handle_Interrupt_Status()\n");
switch (element_id) {
case RX_TX_FEEDBACK:
- RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
- "RX_TX_FEEDBACK\n");
+ RT_TRACE(COMP_CMDPKT,
+ "---->cmpk_message_handle_rx():RX_TX_FEEDBACK\n");
cmpk_handle_tx_feedback(dev, pcmd_buff);
cmd_length = CMPK_RX_TX_FB_SIZE;
break;
case RX_INTERRUPT_STATUS:
- RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
- "RX_INTERRUPT_STATUS\n");
+ RT_TRACE(COMP_CMDPKT,
+ "---->cmpk_message_handle_rx():RX_INTERRUPT_STATUS\n");
cmpk_handle_interrupt_status(dev, pcmd_buff);
cmd_length = sizeof(struct cmpk_intr_sta);
break;
case BOTH_QUERY_CONFIG:
- RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
- "BOTH_QUERY_CONFIG\n");
+ RT_TRACE(COMP_CMDPKT,
+ "---->cmpk_message_handle_rx():BOTH_QUERY_CONFIG\n");
cmpk_handle_query_config_rx(dev, pcmd_buff);
cmd_length = CMPK_BOTH_QUERY_CONFIG_SIZE;
break;
case RX_TX_STATUS:
- RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
- "RX_TX_STATUS\n");
+ RT_TRACE(COMP_CMDPKT,
+ "---->cmpk_message_handle_rx():RX_TX_STATUS\n");
cmpk_handle_tx_status(dev, pcmd_buff);
cmd_length = CMPK_RX_TX_STS_SIZE;
break;
case RX_TX_PER_PKT_FEEDBACK:
- RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
- "RX_TX_PER_PKT_FEEDBACK\n");
+ RT_TRACE(COMP_CMDPKT,
+ "---->cmpk_message_handle_rx():RX_TX_PER_PKT_FEEDBACK\n");
cmd_length = CMPK_RX_TX_FB_SIZE;
break;
case RX_TX_RATE_HISTORY:
- RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
- "RX_TX_HISTORY\n");
+ RT_TRACE(COMP_CMDPKT,
+ "---->cmpk_message_handle_rx():RX_TX_HISTORY\n");
cmpk_handle_tx_rate_history(dev, pcmd_buff);
cmd_length = CMPK_TX_RAHIS_SIZE;
break;
default:
- RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
- "unknown CMD Element\n");
+ RT_TRACE(COMP_CMDPKT,
+ "---->cmpk_message_handle_rx():unknown CMD Element\n");
return 1;
}
struct cmpk_txfb {
u8 element_id;
u8 length;
- u8 TID:4; /* */
- u8 fail_reason:3; /* */
+ u8 TID:4;
+ u8 fail_reason:3;
u8 tok:1;
- u8 reserve1:4; /* */
- u8 pkt_type:2; /* */
- u8 bandwidth:1; /* */
- u8 qos_pkt:1; /* */
+ u8 reserve1:4;
+ u8 pkt_type:2;
+ u8 bandwidth:1;
+ u8 qos_pkt:1;
- u8 reserve2; /* */
- u8 retry_cnt; /* */
- u16 pkt_id; /* */
+ u8 reserve2;
+ u8 retry_cnt;
+ u16 pkt_id;
- u16 seq_num; /* */
+ u16 seq_num;
u8 s_rate;
u8 f_rate;
- u8 s_rts_rate; /* */
- u8 f_rts_rate; /* */
- u16 pkt_length; /* */
+ u8 s_rts_rate;
+ u8 f_rts_rate;
+ u16 pkt_length;
- u16 reserve3; /* */
- u16 duration; /* */
+ u16 reserve3;
+ u16 duration;
};
struct cmpk_intr_sta {
break;
default:
- printk(KERN_INFO "SetHwReg8185(): invalid ACI: %d !\n",
- eACI);
+ netdev_info(dev, "SetHwReg8185(): invalid ACI: %d !\n",
+ eACI);
break;
}
priv->rtllib->SetHwRegHandler(dev, HW_VAR_ACM_CTRL,
break;
default:
- RT_TRACE(COMP_QOS, "SetHwReg8185(): [HW_VAR_"
- "ACM_CTRL] acm set failed: eACI is "
- "%d\n", eACI);
+ RT_TRACE(COMP_QOS,
+ "SetHwReg8185(): [HW_VAR_ACM_CTRL] acm set failed: eACI is %d\n",
+ eACI);
break;
}
} else {
}
}
- RT_TRACE(COMP_QOS, "SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write"
- " 0x%X\n", AcmCtrl);
+ RT_TRACE(COMP_QOS,
+ "SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n",
+ AcmCtrl);
write_nic_byte(dev, AcmHwCtrl, AcmCtrl);
break;
}
}
if (!priv->AutoloadFailFlag) {
- priv->eeprom_vid = eprom_read(dev, (EEPROM_VID >> 1));
- priv->eeprom_did = eprom_read(dev, (EEPROM_DID >> 1));
+ priv->eeprom_vid = eprom_read(dev, EEPROM_VID >> 1);
+ priv->eeprom_did = eprom_read(dev, EEPROM_DID >> 1);
usValue = eprom_read(dev, (u16)(EEPROM_Customer_ID>>1)) >> 8;
priv->eeprom_CustomerID = (u8)(usValue & 0xff);
- usValue = eprom_read(dev, (EEPROM_ICVersion_ChannelPlan>>1));
+ usValue = eprom_read(dev, EEPROM_ICVersion_ChannelPlan>>1);
priv->eeprom_ChannelPlan = usValue&0xff;
- IC_Version = ((usValue&0xff00)>>8);
+ IC_Version = (usValue & 0xff00)>>8;
ICVer8192 = (IC_Version&0xf);
- ICVer8256 = ((IC_Version&0xf0)>>4);
+ ICVer8256 = (IC_Version & 0xf0)>>4;
RT_TRACE(COMP_INIT, "\nICVer8192 = 0x%x\n", ICVer8192);
RT_TRACE(COMP_INIT, "\nICVer8256 = 0x%x\n", ICVer8256);
if (ICVer8192 == 0x2) {
if (priv->epromtype == EEPROM_93C46) {
if (!priv->AutoloadFailFlag) {
usValue = eprom_read(dev,
- (EEPROM_TxPwDiff_CrystalCap >> 1));
+ EEPROM_TxPwDiff_CrystalCap >> 1);
priv->EEPROMAntPwDiff = (usValue&0x0fff);
priv->EEPROMCrystalCap = (u8)((usValue & 0xf000)
>> 12);
usValue = EEPROM_Default_TxPower;
*((u16 *)(&priv->EEPROMTxPowerLevelCCK[i])) =
usValue;
- RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index"
- " %d = 0x%02x\n", i,
- priv->EEPROMTxPowerLevelCCK[i]);
- RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index"
- " %d = 0x%02x\n", i+1,
- priv->EEPROMTxPowerLevelCCK[i+1]);
+ RT_TRACE(COMP_INIT,
+ "CCK Tx Power Level, Index %d = 0x%02x\n",
+ i, priv->EEPROMTxPowerLevelCCK[i]);
+ RT_TRACE(COMP_INIT,
+ "CCK Tx Power Level, Index %d = 0x%02x\n",
+ i+1, priv->EEPROMTxPowerLevelCCK[i+1]);
}
for (i = 0; i < 14; i += 2) {
if (!priv->AutoloadFailFlag)
usValue = EEPROM_Default_TxPower;
*((u16 *)(&priv->EEPROMTxPowerLevelOFDM24G[i]))
= usValue;
- RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level,"
- " Index %d = 0x%02x\n", i,
- priv->EEPROMTxPowerLevelOFDM24G[i]);
- RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level,"
- " Index %d = 0x%02x\n", i + 1,
+ RT_TRACE(COMP_INIT,
+ "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n",
+ i, priv->EEPROMTxPowerLevelOFDM24G[i]);
+ RT_TRACE(COMP_INIT,
+ "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n",
+ i + 1,
priv->EEPROMTxPowerLevelOFDM24G[i+1]);
}
}
priv->EEPROMLegacyHTTxPowerDiff;
priv->AntennaTxPwDiff[0] = (priv->EEPROMAntPwDiff &
0xf);
- priv->AntennaTxPwDiff[1] = ((priv->EEPROMAntPwDiff &
- 0xf0)>>4);
- priv->AntennaTxPwDiff[2] = ((priv->EEPROMAntPwDiff &
- 0xf00)>>8);
+ priv->AntennaTxPwDiff[1] = (priv->EEPROMAntPwDiff &
+ 0xf0) >> 4;
+ priv->AntennaTxPwDiff[2] = (priv->EEPROMAntPwDiff &
+ 0xf00) >> 8;
priv->CrystalCap = priv->EEPROMCrystalCap;
priv->ThermalMeter[0] = (priv->EEPROMThermalMeter &
0xf);
- priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter &
- 0xf0)>>4);
+ priv->ThermalMeter[1] = (priv->EEPROMThermalMeter &
+ 0xf0) >> 4;
} else if (priv->epromtype == EEPROM_93C56) {
for (i = 0; i < 3; i++) {
priv->EEPROMRfCOfdmChnlTxPwLevel[2];
}
for (i = 0; i < 14; i++)
- RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_A"
- "[%d] = 0x%x\n", i,
- priv->TxPowerLevelCCK_A[i]);
+ RT_TRACE(COMP_INIT,
+ "priv->TxPowerLevelCCK_A[%d] = 0x%x\n",
+ i, priv->TxPowerLevelCCK_A[i]);
for (i = 0; i < 14; i++)
- RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM"
- "24G_A[%d] = 0x%x\n", i,
- priv->TxPowerLevelOFDM24G_A[i]);
+ RT_TRACE(COMP_INIT,
+ "priv->TxPowerLevelOFDM24G_A[%d] = 0x%x\n",
+ i, priv->TxPowerLevelOFDM24G_A[i]);
for (i = 0; i < 14; i++)
- RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_C"
- "[%d] = 0x%x\n", i,
- priv->TxPowerLevelCCK_C[i]);
+ RT_TRACE(COMP_INIT,
+ "priv->TxPowerLevelCCK_C[%d] = 0x%x\n",
+ i, priv->TxPowerLevelCCK_C[i]);
for (i = 0; i < 14; i++)
- RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM"
- "24G_C[%d] = 0x%x\n", i,
- priv->TxPowerLevelOFDM24G_C[i]);
+ RT_TRACE(COMP_INIT,
+ "priv->TxPowerLevelOFDM24G_C[%d] = 0x%x\n",
+ i, priv->TxPowerLevelOFDM24G_C[i]);
priv->LegacyHTTxPowerDiff =
priv->EEPROMLegacyHTTxPowerDiff;
priv->AntennaTxPwDiff[0] = 0;
priv->CrystalCap = priv->EEPROMCrystalCap;
priv->ThermalMeter[0] = (priv->EEPROMThermalMeter &
0xf);
- priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter &
- 0xf0)>>4);
+ priv->ThermalMeter[1] = (priv->EEPROMThermalMeter &
+ 0xf0) >> 4;
}
}
else if (priv->pFirmware->firmware_status == FW_STATUS_5_READY)
ulRegRead |= CPU_GEN_FIRMWARE_RESET;
else
- RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)"
- "\n", __func__, priv->pFirmware->firmware_status);
+ RT_TRACE(COMP_ERR,
+ "ERROR in %s(): undefined firmware state(%d)\n",
+ __func__, priv->pFirmware->firmware_status);
write_nic_dword(dev, CPU_GEN, ulRegRead);
else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK)
ulRegRead |= CPU_CCK_LOOPBACK;
else
- RT_TRACE(COMP_ERR, "Serious error: wrong loopback"
- " mode setting\n");
+ RT_TRACE(COMP_ERR,
+ "Serious error: wrong loopback mode setting\n");
write_nic_dword(dev, CPU_GEN, ulRegRead);
__func__);
MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW, true);
} else if (priv->rtllib->RfOffReason > RF_CHANGE_BY_PS) {
- RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for"
- " RfOffReason(%d) ----------\n", __func__,
- priv->rtllib->RfOffReason);
+ RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER),
+ "%s(): Turn off RF for RfOffReason(%d) ----------\n",
+ __func__, priv->rtllib->RfOffReason);
MgntActSet_RF_State(dev, eRfOff, priv->rtllib->RfOffReason,
true);
} else if (priv->rtllib->RfOffReason >= RF_CHANGE_BY_IPS) {
- RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for"
- " RfOffReason(%d) ----------\n", __func__,
- priv->rtllib->RfOffReason);
+ RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER),
+ "%s(): Turn off RF for RfOffReason(%d) ----------\n",
+ __func__, priv->rtllib->RfOffReason);
MgntActSet_RF_State(dev, eRfOff, priv->rtllib->RfOffReason,
true);
} else {
priv->CCKPresentAttentuation_difference = 0;
priv->CCKPresentAttentuation =
priv->CCKPresentAttentuation_20Mdefault;
- RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpower"
- "trackingindex_initial = %d\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "priv->rfa_txpowertrackingindex_initial = %d\n",
priv->rfa_txpowertrackingindex);
- RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpower"
- "trackingindex_real__initial = %d\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "priv->rfa_txpowertrackingindex_real__initial = %d\n",
priv->rfa_txpowertrackingindex_real);
- RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresent"
- "Attentuation_difference_initial = %d\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "priv->CCKPresentAttentuation_difference_initial = %d\n",
priv->CCKPresentAttentuation_difference);
- RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresent"
- "Attentuation_initial = %d\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "priv->CCKPresentAttentuation_initial = %d\n",
priv->CCKPresentAttentuation);
priv->btxpower_tracking = false;
}
QueueSelect = QSLT_HIGH;
break;
default:
- RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection:"
- " %d\n", QueueID);
+ RT_TRACE(COMP_ERR,
+ "TransmitTCB(): Impossible Queue Selection: %d\n",
+ QueueID);
break;
}
return QueueSelect;
break;
default:
- RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported"
- "Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
- break;
+ RT_TRACE(COMP_RECV,
+ "HwRateToMRate90(): Non supportedRate [%x], bIsHT = %d!!!\n",
+ rate, bIsHT);
+ break;
}
} else {
break;
default:
- RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported "
- "Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
+ RT_TRACE(COMP_RECV,
+ "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",
+ rate, bIsHT);
break;
}
}
priv->stats.numqry_phystatusCCK++;
if (!reg824_bit9) {
report = pcck_buf->cck_agc_rpt & 0xc0;
- report = report>>6;
+ report >>= 6;
switch (report) {
case 0x3:
rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt &
}
} else {
report = pcck_buf->cck_agc_rpt & 0x60;
- report = report>>5;
+ report >>= 5;
switch (report) {
case 0x3:
rx_pwr_all = -35 -
if (!rtl8192_phy_CheckIsLegalRFPath(priv->rtllib->dev,
rfpath))
continue;
- RT_TRACE(COMP_DBG, "Jacken -> pPreviousstats->RxMIMO"
- "SignalStrength[rfpath] = %d\n",
+ RT_TRACE(COMP_DBG,
+ "Jacken -> pPreviousstats->RxMIMOSignalStrength[rfpath] = %d\n",
prev_st->RxMIMOSignalStrength[rfpath]);
if (priv->stats.rx_rssi_percentage[rfpath] == 0) {
priv->stats.rx_rssi_percentage[rfpath] =
(prev_st->RxMIMOSignalStrength[rfpath])) /
(RX_SMOOTH);
}
- RT_TRACE(COMP_DBG, "Jacken -> priv->RxStats.RxRSSI"
- "Percentage[rfPath] = %d\n",
+ RT_TRACE(COMP_DBG,
+ "Jacken -> priv->RxStats.RxRSSIPercentage[rfPath] = %d\n",
priv->stats.rx_rssi_percentage[rfpath]);
}
}
struct sk_buff *skb)
{
struct r8192_priv *priv = rtllib_priv(dev);
+ struct rx_fwinfo *pDrvInfo = NULL;
stats->bICV = pdesc->ICV;
stats->bCRC = pdesc->CRC32;
priv->stats.rxcrcerrmid++;
}
return false;
- } else {
- struct rx_fwinfo *pDrvInfo = NULL;
+ }
- stats->RxDrvInfoSize = pdesc->RxDrvInfoSize;
- stats->RxBufShift = ((pdesc->Shift)&0x03);
- stats->Decrypted = !pdesc->SWDec;
+ stats->RxDrvInfoSize = pdesc->RxDrvInfoSize;
+ stats->RxBufShift = ((pdesc->Shift)&0x03);
+ stats->Decrypted = !pdesc->SWDec;
- pDrvInfo = (struct rx_fwinfo *)(skb->data + stats->RxBufShift);
+ pDrvInfo = (struct rx_fwinfo *)(skb->data + stats->RxBufShift);
- stats->rate = HwRateToMRate90((bool)pDrvInfo->RxHT,
- (u8)pDrvInfo->RxRate);
- stats->bShortPreamble = pDrvInfo->SPLCP;
+ stats->rate = HwRateToMRate90((bool)pDrvInfo->RxHT,
+ (u8)pDrvInfo->RxRate);
+ stats->bShortPreamble = pDrvInfo->SPLCP;
- rtl8192_UpdateReceivedRateHistogramStatistics(dev, stats);
+ rtl8192_UpdateReceivedRateHistogramStatistics(dev, stats);
- stats->bIsAMPDU = (pDrvInfo->PartAggr == 1);
- stats->bFirstMPDU = (pDrvInfo->PartAggr == 1) &&
- (pDrvInfo->FirstAGGR == 1);
+ stats->bIsAMPDU = (pDrvInfo->PartAggr == 1);
+ stats->bFirstMPDU = (pDrvInfo->PartAggr == 1) &&
+ (pDrvInfo->FirstAGGR == 1);
- stats->TimeStampLow = pDrvInfo->TSFL;
- stats->TimeStampHigh = read_nic_dword(dev, TSFR+4);
+ stats->TimeStampLow = pDrvInfo->TSFL;
+ stats->TimeStampHigh = read_nic_dword(dev, TSFR+4);
- rtl819x_UpdateRxPktTimeStamp(dev, stats);
+ rtl819x_UpdateRxPktTimeStamp(dev, stats);
- if ((stats->RxBufShift + stats->RxDrvInfoSize) > 0)
- stats->bShift = 1;
+ if ((stats->RxBufShift + stats->RxDrvInfoSize) > 0)
+ stats->bShift = 1;
- stats->RxIs40MHzPacket = pDrvInfo->BW;
+ stats->RxIs40MHzPacket = pDrvInfo->BW;
- rtl8192_TranslateRxSignalStuff(dev, skb, stats, pdesc,
- pDrvInfo);
+ rtl8192_TranslateRxSignalStuff(dev, skb, stats, pdesc,
+ pDrvInfo);
- if (pDrvInfo->FirstAGGR == 1 || pDrvInfo->PartAggr == 1)
- RT_TRACE(COMP_RXDESC, "pDrvInfo->FirstAGGR = %d,"
- " pDrvInfo->PartAggr = %d\n",
- pDrvInfo->FirstAGGR, pDrvInfo->PartAggr);
- skb_trim(skb, skb->len - 4/*sCrcLng*/);
+ if (pDrvInfo->FirstAGGR == 1 || pDrvInfo->PartAggr == 1)
+ RT_TRACE(COMP_RXDESC,
+ "pDrvInfo->FirstAGGR = %d, pDrvInfo->PartAggr = %d\n",
+ pDrvInfo->FirstAGGR, pDrvInfo->PartAggr);
+ skb_trim(skb, skb->len - 4/*sCrcLng*/);
- stats->packetlength = stats->Length-4;
- stats->fraglength = stats->packetlength;
- stats->fragoffset = 0;
- stats->ntotalfrag = 1;
- return true;
- }
+ stats->packetlength = stats->Length-4;
+ stats->fraglength = stats->packetlength;
+ stats->fragoffset = 0;
+ stats->ntotalfrag = 1;
+ return true;
}
void rtl8192_halt_adapter(struct net_device *dev, bool reset)
skb_queue_purge(&priv->rtllib->skb_aggQ[i]);
skb_queue_purge(&priv->skb_queue);
- return;
}
void rtl8192_update_ratr_table(struct net_device *dev)
priv->rtllib->softmac_features = IEEE_SOFTMAC_SCAN |
IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
- IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE /* |
- IEEE_SOFTMAC_BEACONS*/;
+ IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
priv->rtllib->tx_headroom = sizeof(struct tx_fwinfo_8190pci);
(priv->undecorated_smoothed_pwdb >= RateAdaptiveTH_Low_20M)))) {
if (rx_chk_cnt < 2)
return bStuck;
- else
- rx_chk_cnt = 0;
+ rx_chk_cnt = 0;
} else if ((((priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) &&
(priv->undecorated_smoothed_pwdb < RateAdaptiveTH_Low_40M)) ||
((priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20) &&
priv->undecorated_smoothed_pwdb >= VeryLowRSSI) {
if (rx_chk_cnt < 4)
return bStuck;
- else
- rx_chk_cnt = 0;
+ rx_chk_cnt = 0;
} else {
if (rx_chk_cnt < 8)
return bStuck;
- else
- rx_chk_cnt = 0;
+ rx_chk_cnt = 0;
}
enum wireless_mode WirelessMode,
struct channel_access_setting *ChnlAccessSetting)
{
- return;
}
u32 buffer_len)
{
struct r8192_priv *priv = rtllib_priv(dev);
- bool rt_status = true;
u16 frag_threshold;
u16 frag_length, frag_offset = 0;
int i;
frag_threshold = pfirmware->cmdpacket_frag_thresold;
do {
if ((buffer_len - frag_offset) > frag_threshold) {
- frag_length = frag_threshold ;
+ frag_length = frag_threshold;
bLastIniPkt = 0;
} else {
if (!priv->rtllib->check_nic_enough_desc(dev, tcb_desc->queue_index) ||
(!skb_queue_empty(&priv->rtllib->skb_waitQ[tcb_desc->queue_index])) ||
(priv->rtllib->queue_stop)) {
- RT_TRACE(COMP_FIRMWARE, "===================> tx "
- "full!\n");
+ RT_TRACE(COMP_FIRMWARE,
+ "===================> tx full!\n");
skb_queue_tail(&priv->rtllib->skb_waitQ
[tcb_desc->queue_index], skb);
} else {
write_nic_byte(dev, TPPoll, TPPoll_CQ);
- return rt_status;
+ return true;
}
static bool CPUcheck_maincodeok_turnonCPU(struct net_device *dev)
u32 CPU_status = 0;
unsigned long timeout;
- timeout = jiffies + MSECS(200);
+ timeout = jiffies + msecs_to_jiffies(200);
while (time_before(jiffies, timeout)) {
CPU_status = read_nic_dword(dev, CPU_GEN);
if (CPU_status & CPU_GEN_PUT_CODE_OK)
(u8)((CPU_status|CPU_GEN_PWR_STB_CPU)&0xff));
mdelay(1);
- timeout = jiffies + MSECS(200);
+ timeout = jiffies + msecs_to_jiffies(200);
while (time_before(jiffies, timeout)) {
CPU_status = read_nic_dword(dev, CPU_GEN);
if (CPU_status&CPU_GEN_BOOT_RDY)
u32 CPU_status = 0;
unsigned long timeout;
- timeout = jiffies + MSECS(20);
+ timeout = jiffies + msecs_to_jiffies(20);
while (time_before(jiffies, timeout)) {
CPU_status = read_nic_dword(dev, CPU_GEN);
if (CPU_status&CPU_GEN_FIRM_RDY)
if (rt_status)
pfirmware->firmware_status = FW_STATUS_3_TURNON_CPU;
else
- RT_TRACE(COMP_FIRMWARE, "CPUcheck_maincodeok_turnon"
- "CPU fail!\n");
+ RT_TRACE(COMP_FIRMWARE,
+ "CPUcheck_maincodeok_turnonCPU fail!\n");
break;
if (rt_status)
pfirmware->firmware_status = FW_STATUS_5_READY;
else
- RT_TRACE(COMP_FIRMWARE, "CPUcheck_firmware_ready fail"
- "(%d)!\n", rt_status);
+ RT_TRACE(COMP_FIRMWARE,
+ "CPUcheck_firmware_ready fail(%d)!\n",
+ rt_status);
break;
default:
rst_opt = OPT_FIRMWARE_RESET;
starting_state = FW_INIT_STEP2_DATA;
} else {
- RT_TRACE(COMP_FIRMWARE, "PlatformInitFirmware: undefined"
- " firmware state\n");
+ RT_TRACE(COMP_FIRMWARE,
+ "PlatformInitFirmware: undefined firmware state\n");
}
for (init_step = starting_state; init_step <= FW_INIT_STEP2_DATA;
fw_name[init_step],
&priv->pdev->dev);
if (rc < 0) {
- RT_TRACE(COMP_FIRMWARE, "request firmware fail!\n");
+ RT_TRACE(COMP_FIRMWARE,
+ "request firmware fail!\n");
goto download_firmware_fail;
}
if (fw_entry->size >
sizeof(pfirmware->firmware_buf[init_step])) {
- RT_TRACE(COMP_FIRMWARE, "img file size "
- "exceed the container struct "
- "buffer fail!\n");
+ RT_TRACE(COMP_FIRMWARE,
+ "img file size exceed the container struct buffer fail!\n");
goto download_firmware_fail;
}
file_length = pfirmware->firmware_buf_size[init_step];
rt_status = fw_download_code(dev, mapped_file, file_length);
- if (!rt_status) {
+ if (!rt_status)
goto download_firmware_fail;
- }
- if (!firmware_check_ready(dev, init_step)) {
+ if (!firmware_check_ready(dev, init_step))
goto download_firmware_fail;
- }
}
RT_TRACE(COMP_FIRMWARE, "Firmware Download Success\n");
#define PHY_REG_1T2RArrayLengthPciE 296
extern u32 Rtl8192PciEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLengthPciE];
#define RadioA_ArrayLengthPciE 246
-extern u32 Rtl8192PciERadioA_Array[RadioA_ArrayLengthPciE] ;
+extern u32 Rtl8192PciERadioA_Array[RadioA_ArrayLengthPciE];
#define RadioB_ArrayLengthPciE 78
-extern u32 Rtl8192PciERadioB_Array[RadioB_ArrayLengthPciE] ;
+extern u32 Rtl8192PciERadioB_Array[RadioB_ArrayLengthPciE];
#define RadioC_ArrayLengthPciE 2
-extern u32 Rtl8192PciERadioC_Array[RadioC_ArrayLengthPciE] ;
+extern u32 Rtl8192PciERadioC_Array[RadioC_ArrayLengthPciE];
#define RadioD_ArrayLengthPciE 2
-extern u32 Rtl8192PciERadioD_Array[RadioD_ArrayLengthPciE] ;
+extern u32 Rtl8192PciERadioD_Array[RadioD_ArrayLengthPciE];
#define MACPHY_ArrayLengthPciE 18
-extern u32 Rtl8192PciEMACPHY_Array[MACPHY_ArrayLengthPciE] ;
+extern u32 Rtl8192PciEMACPHY_Array[MACPHY_ArrayLengthPciE];
#define MACPHY_Array_PGLengthPciE 30
-extern u32 Rtl8192PciEMACPHY_Array_PG[MACPHY_Array_PGLengthPciE] ;
+extern u32 Rtl8192PciEMACPHY_Array_PG[MACPHY_Array_PGLengthPciE];
#define AGCTAB_ArrayLengthPciE 384
-extern u32 Rtl8192PciEAGCTAB_Array[AGCTAB_ArrayLengthPciE] ;
+extern u32 Rtl8192PciEAGCTAB_Array[AGCTAB_ArrayLengthPciE];
#endif
write_nic_dword(dev, dwRegAddr, NewValue);
} else
write_nic_dword(dev, dwRegAddr, dwData);
- return;
}
u32 rtl8192_QueryBBReg(struct net_device *dev, u32 dwRegAddr, u32 dwBitMask)
} else
NewOffset = Offset;
} else {
- RT_TRACE((COMP_PHY|COMP_ERR), "check RF type here, need"
- " to be 8256\n");
+ RT_TRACE((COMP_PHY|COMP_ERR),
+ "check RF type here, need to be 8256\n");
NewOffset = Offset;
}
rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadAddress,
} else
NewOffset = Offset;
} else {
- RT_TRACE((COMP_PHY|COMP_ERR), "check RF type here, need to be"
- " 8256\n");
+ RT_TRACE((COMP_PHY|COMP_ERR),
+ "check RF type here, need to be 8256\n");
NewOffset = Offset;
}
}
rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);
}
- return;
}
void rtl8192_phy_SetRFReg(struct net_device *dev, enum rf90_radio_path eRFPath,
} else
rtl8192_phy_RFSerialWrite(dev, eRFPath, RegAddr, Data);
}
- return;
}
u32 rtl8192_phy_QueryRFReg(struct net_device *dev, enum rf90_radio_path eRFPath,
}
return read_nic_dword(dev, RF_DATA);
-} /* phy_FwRFSerialRead */
+}
static void phy_FwRFSerialWrite(struct net_device *dev,
enum rf90_radio_path eRFPath,
}
write_nic_dword(dev, QPNR, Data);
-} /* phy_FwRFSerialWrite */
+}
void rtl8192_phy_configmac(struct net_device *dev)
pdwArray = Rtl819XMACPHY_Array;
}
for (i = 0; i < dwArrayLen; i += 3) {
- RT_TRACE(COMP_DBG, "The Rtl8190MACPHY_Array[0] is %x Rtl8190MAC"
- "PHY_Array[1] is %x Rtl8190MACPHY_Array[2] is %x\n",
+ RT_TRACE(COMP_DBG,
+ "The Rtl8190MACPHY_Array[0] is %x Rtl8190MACPHY_Array[1] is %x Rtl8190MACPHY_Array[2] is %x\n",
pdwArray[i], pdwArray[i+1], pdwArray[i+2]);
if (pdwArray[i] == 0x318)
pdwArray[i+2] = 0x00000800;
rtl8192_setBBreg(dev, Rtl819XPHY_REGArray_Table[i],
bMaskDWord,
Rtl819XPHY_REGArray_Table[i+1]);
- RT_TRACE(COMP_DBG, "i: %x, The Rtl819xUsbPHY_REGArray"
- "[0] is %x Rtl819xUsbPHY_REGArray[1] is %x\n",
+ RT_TRACE(COMP_DBG,
+ "i: %x, The Rtl819xUsbPHY_REGArray[0] is %x Rtl819xUsbPHY_REGArray[1] is %x\n",
i, Rtl819XPHY_REGArray_Table[i],
Rtl819XPHY_REGArray_Table[i+1]);
}
rtl8192_setBBreg(dev, Rtl819XAGCTAB_Array_Table[i],
bMaskDWord,
Rtl819XAGCTAB_Array_Table[i+1]);
- RT_TRACE(COMP_DBG, "i:%x, The rtl819XAGCTAB_Array[0] "
- "is %x rtl819XAGCTAB_Array[1] is %x\n", i,
- Rtl819XAGCTAB_Array_Table[i],
+ RT_TRACE(COMP_DBG,
+ "i:%x, The rtl819XAGCTAB_Array[0] is %x rtl819XAGCTAB_Array[1] is %x\n",
+ i, Rtl819XAGCTAB_Array_Table[i],
Rtl819XAGCTAB_Array_Table[i+1]);
}
}
- return;
}
static void rtl8192_InitBBRFRegDef(struct net_device *dev)
for (i = 0; i < CheckTimes; i++) {
switch (CheckBlock) {
case HW90_BLOCK_MAC:
- RT_TRACE(COMP_ERR, "PHY_CheckBBRFOK(): Never Write "
- "0x100 here!");
+ RT_TRACE(COMP_ERR,
+ "PHY_CheckBBRFOK(): Never Write 0x100 here!");
break;
case HW90_BLOCK_PHY0:
if (dwRegRead != WriteData[i]) {
- RT_TRACE(COMP_ERR, "====>error=====dwRegRead: %x, "
- "WriteData: %x\n", dwRegRead, WriteData[i]);
+ RT_TRACE(COMP_ERR,
+ "====>error=====dwRegRead: %x, WriteData: %x\n",
+ dwRegRead, WriteData[i]);
ret = false;
break;
}
(enum hw90_block)eCheckItem,
(enum rf90_radio_path)0);
if (!rtStatus) {
- RT_TRACE((COMP_ERR | COMP_PHY), "PHY_RF8256_Config():"
- "Check PHY%d Fail!!\n", eCheckItem-1);
+ RT_TRACE((COMP_ERR | COMP_PHY),
+ "PHY_RF8256_Config():Check PHY%d Fail!!\n",
+ eCheckItem-1);
return rtStatus;
}
}
priv->DefaultInitialGain[1] = read_nic_byte(dev, rOFDM0_XBAGCCore1);
priv->DefaultInitialGain[2] = read_nic_byte(dev, rOFDM0_XCAGCCore1);
priv->DefaultInitialGain[3] = read_nic_byte(dev, rOFDM0_XDAGCCore1);
- RT_TRACE(COMP_INIT, "Default initial gain (c50=0x%x, c58=0x%x, "
- "c60=0x%x, c68=0x%x)\n",
+ RT_TRACE(COMP_INIT,
+ "Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x)\n",
priv->DefaultInitialGain[0], priv->DefaultInitialGain[1],
priv->DefaultInitialGain[2], priv->DefaultInitialGain[3]);
RT_TRACE(COMP_INIT, "Default framesync (0x%x) = 0x%x\n",
rOFDM0_RxDetector3, priv->framesync);
priv->SifsTime = read_nic_word(dev, SIFS);
- return;
}
void rtl8192_phy_setTxPower(struct net_device *dev, u8 channel)
__func__);
break;
}
- return;
}
bool rtl8192_phy_RFConfig(struct net_device *dev)
void rtl8192_phy_updateInitGain(struct net_device *dev)
{
- return;
}
u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device *dev,
case RF_8258:
break;
default:
- RT_TRACE(COMP_ERR, "unknown rf chip ID in rtl8192_SetTxPower"
- "Level()\n");
+ RT_TRACE(COMP_ERR,
+ "unknown rf chip ID in rtl8192_SetTxPowerLevel()\n");
break;
}
- return;
}
static u8 rtl8192_phy_SetSwChnlCmdArray(struct sw_chnl_cmd *CmdTable,
struct sw_chnl_cmd *pCmd;
if (CmdTable == NULL) {
- RT_TRACE(COMP_ERR, "phy_SetSwChnlCmdArray(): CmdTable cannot "
- "be NULL.\n");
+ RT_TRACE(COMP_ERR,
+ "phy_SetSwChnlCmdArray(): CmdTable cannot be NULL.\n");
return false;
}
if (CmdTableIdx >= CmdTableSz) {
- RT_TRACE(COMP_ERR, "phy_SetSwChnlCmdArray(): Access invalid"
- " index, please check size of the table, CmdTableIdx:"
- "%d, CmdTableSz:%d\n",
- CmdTableIdx, CmdTableSz);
+ RT_TRACE(COMP_ERR,
+ "phy_SetSwChnlCmdArray(): Access invalid index, please check size of the table, CmdTableIdx:%d, CmdTableSz:%d\n",
+ CmdTableIdx, CmdTableSz);
return false;
}
switch (priv->rf_chip) {
case RF_8225:
if (!(channel >= 1 && channel <= 14)) {
- RT_TRACE(COMP_ERR, "illegal channel for Zebra "
- "8225: %d\n", channel);
+ RT_TRACE(COMP_ERR,
+ "illegal channel for Zebra 8225: %d\n",
+ channel);
return false;
}
rtl8192_phy_SetSwChnlCmdArray(ieee->RfDependCmd,
case RF_8256:
if (!(channel >= 1 && channel <= 14)) {
- RT_TRACE(COMP_ERR, "illegal channel for Zebra"
- " 8256: %d\n", channel);
+ RT_TRACE(COMP_ERR,
+ "illegal channel for Zebra 8256: %d\n",
+ channel);
return false;
}
rtl8192_phy_SetSwChnlCmdArray(ieee->RfDependCmd,
RT_TRACE(COMP_ERR, "Unknown RFChipID: %d\n",
priv->rf_chip);
return false;
- break;
}
}
if (CurrentCmd && CurrentCmd->CmdID == CmdID_End) {
- if ((*stage) == 2) {
+ if ((*stage) == 2)
return true;
- } else {
- (*stage)++;
- (*step) = 0;
- continue;
- }
+ (*stage)++;
+ (*step) = 0;
+ continue;
}
if (!CurrentCmd)
&priv->SwChnlStep, &delay)) {
if (delay > 0)
msleep(delay);
- if (IS_NIC_DOWN(priv))
+ if (!priv->up)
break;
}
}
struct r8192_priv *priv = rtllib_priv(dev);
RT_TRACE(COMP_PHY, "=====>%s()\n", __func__);
- if (IS_NIC_DOWN(priv)) {
+ if (!priv->up) {
RT_TRACE(COMP_ERR, "%s(): ERR !! driver is not up\n", __func__);
return false;
}
priv->SwChnlStage = 0;
priv->SwChnlStep = 0;
- if (!IS_NIC_DOWN(priv))
+ if (priv->up)
rtl8192_SwChnl_WorkItem(dev);
priv->SwChnlInProgress = false;
return true;
if (priv->CCKPresentAttentuation < 0)
priv->CCKPresentAttentuation = 0;
- RT_TRACE(COMP_POWER_TRACKING, "20M, priv->CCKPresent"
- "Attentuation = %d\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "20M, priv->CCKPresentAttentuation = %d\n",
priv->CCKPresentAttentuation);
if (priv->rtllib->current_network.channel == 14 &&
priv->CCKPresentAttentuation_40Mdefault +
priv->CCKPresentAttentuation_difference;
- RT_TRACE(COMP_POWER_TRACKING, "40M, priv->CCKPresent"
- "Attentuation = %d\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "40M, priv->CCKPresentAttentuation = %d\n",
priv->CCKPresentAttentuation);
if (priv->CCKPresentAttentuation >
(CCKTxBBGainTableLength - 1))
if (priv->Record_CCK_20Mindex == 0)
priv->Record_CCK_20Mindex = 6;
priv->CCK_index = priv->Record_CCK_20Mindex;
- RT_TRACE(COMP_POWER_TRACKING, "20MHz, CCK_Tx_Power_Track_BW_"
- "Switch_ThermalMeter(),CCK_index = %d\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "20MHz, CCK_Tx_Power_Track_BW_Switch_ThermalMeter(),CCK_index = %d\n",
priv->CCK_index);
break;
case HT_CHANNEL_WIDTH_20_40:
priv->CCK_index = priv->Record_CCK_40Mindex;
- RT_TRACE(COMP_POWER_TRACKING, "40MHz, CCK_Tx_Power_Track_BW_"
- "Switch_ThermalMeter(), CCK_index = %d\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "40MHz, CCK_Tx_Power_Track_BW_Switch_ThermalMeter(), CCK_index = %d\n",
priv->CCK_index);
break;
}
struct r8192_priv *priv = rtllib_priv(dev);
u8 regBwOpMode;
- RT_TRACE(COMP_SWBW, "==>rtl8192_SetBWModeWorkItem() Switch to %s "
- "bandwidth\n", priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20 ?
- "20MHz" : "40MHz");
+ RT_TRACE(COMP_SWBW,
+ "==>rtl8192_SetBWModeWorkItem() Switch to %s bandwidth\n",
+ priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20 ?
+ "20MHz" : "40MHz");
if (priv->rf_chip == RF_PSEUDO_11N) {
priv->SetBWModeInProgress = false;
return;
}
- if (IS_NIC_DOWN(priv)) {
+ if (!priv->up) {
RT_TRACE(COMP_ERR, "%s(): ERR!! driver is not up\n", __func__);
return;
}
break;
default:
- RT_TRACE(COMP_ERR, "SetChannelBandwidth819xUsb(): unknown "
- "Bandwidth: %#X\n", priv->CurrentChannelBW);
+ RT_TRACE(COMP_ERR,
+ "SetChannelBandwidth819xUsb(): unknown Bandwidth: %#X\n",
+ priv->CurrentChannelBW);
break;
}
rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 0);
break;
default:
- RT_TRACE(COMP_ERR, "SetChannelBandwidth819xUsb(): unknown "
- "Bandwidth: %#X\n", priv->CurrentChannelBW);
+ RT_TRACE(COMP_ERR,
+ "SetChannelBandwidth819xUsb(): unknown Bandwidth: %#X\n",
+ priv->CurrentChannelBW);
break;
}
u32 BitMask;
u8 initial_gain;
- if (!IS_NIC_DOWN(priv)) {
+ if (priv->up) {
switch (Operation) {
case IG_Backup:
- RT_TRACE(COMP_SCAN, "IG_Backup, backup the initial"
- " gain.\n");
+ RT_TRACE(COMP_SCAN,
+ "IG_Backup, backup the initial gain.\n");
initial_gain = SCAN_RX_INITIAL_GAIN;
BitMask = bMaskByte0;
if (dm_digtable.dig_algorithm ==
priv->initgain_backup.cca = (u8)rtl8192_QueryBBReg(dev,
rCCK0_CCA, BitMask);
- RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc50 is"
- " %x\n", priv->initgain_backup.xaagccore1);
- RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc58 is"
- " %x\n", priv->initgain_backup.xbagccore1);
- RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc60 is"
- " %x\n", priv->initgain_backup.xcagccore1);
- RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc68 is"
- " %x\n", priv->initgain_backup.xdagccore1);
- RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xa0a is"
- " %x\n", priv->initgain_backup.cca);
+ RT_TRACE(COMP_SCAN,
+ "Scan InitialGainBackup 0xc50 is %x\n",
+ priv->initgain_backup.xaagccore1);
+ RT_TRACE(COMP_SCAN,
+ "Scan InitialGainBackup 0xc58 is %x\n",
+ priv->initgain_backup.xbagccore1);
+ RT_TRACE(COMP_SCAN,
+ "Scan InitialGainBackup 0xc60 is %x\n",
+ priv->initgain_backup.xcagccore1);
+ RT_TRACE(COMP_SCAN,
+ "Scan InitialGainBackup 0xc68 is %x\n",
+ priv->initgain_backup.xdagccore1);
+ RT_TRACE(COMP_SCAN,
+ "Scan InitialGainBackup 0xa0a is %x\n",
+ priv->initgain_backup.cca);
RT_TRACE(COMP_SCAN, "Write scan initial gain = 0x%x\n",
initial_gain);
write_nic_byte(dev, 0xa0a, POWER_DETECTION_TH);
break;
case IG_Restore:
- RT_TRACE(COMP_SCAN, "IG_Restore, restore the initial "
- "gain.\n");
+ RT_TRACE(COMP_SCAN,
+ "IG_Restore, restore the initial gain.\n");
BitMask = 0x7f;
if (dm_digtable.dig_algorithm ==
DIG_ALGO_BY_FALSE_ALARM)
rtl8192_setBBreg(dev, rCCK0_CCA, BitMask,
(u32)priv->initgain_backup.cca);
- RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc50"
- " is %x\n", priv->initgain_backup.xaagccore1);
- RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc58"
- " is %x\n", priv->initgain_backup.xbagccore1);
- RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc60"
- " is %x\n", priv->initgain_backup.xcagccore1);
- RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc68"
- " is %x\n", priv->initgain_backup.xdagccore1);
- RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xa0a"
- " is %x\n", priv->initgain_backup.cca);
+ RT_TRACE(COMP_SCAN,
+ "Scan BBInitialGainRestore 0xc50 is %x\n",
+ priv->initgain_backup.xaagccore1);
+ RT_TRACE(COMP_SCAN,
+ "Scan BBInitialGainRestore 0xc58 is %x\n",
+ priv->initgain_backup.xbagccore1);
+ RT_TRACE(COMP_SCAN,
+ "Scan BBInitialGainRestore 0xc60 is %x\n",
+ priv->initgain_backup.xcagccore1);
+ RT_TRACE(COMP_SCAN,
+ "Scan BBInitialGainRestore 0xc68 is %x\n",
+ priv->initgain_backup.xdagccore1);
+ RT_TRACE(COMP_SCAN,
+ "Scan BBInitialGainRestore 0xa0a is %x\n",
+ priv->initgain_backup.cca);
rtl8192_phy_setTxPower(dev,
priv->rtllib->current_network.channel);
} while (!rtstatus && (InitilizeCount > 0));
if (!rtstatus) {
- RT_TRACE(COMP_ERR, "%s():Initialize Ada"
- "pter fail,return\n",
+ RT_TRACE(COMP_ERR,
+ "%s():Initialize Adapter fail,return\n",
__func__);
priv->SetRFPowerStateInProgress = false;
return false;
QueueID++;
continue;
} else {
- RT_TRACE((COMP_POWER|COMP_RF), "eRf Off"
- "/Sleep: %d times TcbBusyQueue"
- "[%d] !=0 before doze!\n",
+ RT_TRACE((COMP_POWER|COMP_RF),
+ "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n",
(i+1), QueueID);
udelay(10);
i++;
}
if (i >= MAX_DOZE_WAITING_TIMES_9x) {
- RT_TRACE(COMP_POWER, "\n\n\n TimeOut!! "
- "SetRFPowerState8190(): eRfOff"
- ": %d times TcbBusyQueue[%d] "
- "!= 0 !!!\n",
+ RT_TRACE(COMP_POWER,
+ "\n\n\n TimeOut!! SetRFPowerState8190(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n",
MAX_DOZE_WAITING_TIMES_9x,
QueueID);
break;
break;
case eRfOff:
- RT_TRACE(COMP_PS, "SetRFPowerState8190() eRfOff/"
- "Sleep !\n");
+ RT_TRACE(COMP_PS,
+ "SetRFPowerState8190() eRfOff/Sleep !\n");
for (QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; ) {
ring = &priv->tx_ring[QueueID];
QueueID++;
continue;
} else {
- RT_TRACE(COMP_POWER, "eRf Off/Sleep: %d"
- " times TcbBusyQueue[%d] !=0 b"
- "efore doze!\n", (i+1),
- QueueID);
+ RT_TRACE(COMP_POWER,
+ "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n",
+ (i+1), QueueID);
udelay(10);
i++;
}
if (i >= MAX_DOZE_WAITING_TIMES_9x) {
- RT_TRACE(COMP_POWER, "\n\n\n SetZebra: "
- "RFPowerState8185B(): eRfOff:"
- " %d times TcbBusyQueue[%d] "
- "!= 0 !!!\n",
+ RT_TRACE(COMP_POWER,
+ "\n\n\n SetZebra: RFPowerState8185B(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n",
MAX_DOZE_WAITING_TIMES_9x,
QueueID);
break;
default:
bResult = false;
- RT_TRACE(COMP_ERR, "SetRFPowerState8190(): unknown state"
- " to set: 0x%X!!!\n", eRFPowerState);
+ RT_TRACE(COMP_ERR,
+ "SetRFPowerState8190(): unknown state to set: 0x%X!!!\n",
+ eRFPowerState);
break;
}
break;
default:
- RT_TRACE(COMP_ERR, "SetRFPowerState8190(): Unknown "
- "RF type\n");
+ RT_TRACE(COMP_ERR,
+ "SetRFPowerState8190(): Unknown RF type\n");
break;
}
}
eRFPowerState);
if (eRFPowerState == priv->rtllib->eRFPowerState &&
priv->bHwRfOffAction == 0) {
- RT_TRACE(COMP_PS, "<--------- SetRFPowerState(): discard the "
- "request for eRFPowerState(%d) is the same.\n",
+ RT_TRACE(COMP_PS,
+ "<--------- SetRFPowerState(): discard the request for eRFPowerState(%d) is the same.\n",
eRFPowerState);
return bResult;
}
#define bOFDMPHY0_End 0xcff
#define bOFDMPHY1_End 0xdff
-/*#define max debug item in each debug page
-#define bMaxItem_FPGA_PHY0 0x9
-#define bMaxItem_FPGA_PHY1 0x3
-#define bMaxItem_PHY_11B 0x16
-#define bMaxItem_OFDM_PHY0 0x29
-#define bMaxItem_OFDM_PHY1 0x0 */
-
#define bPMACControl 0x0
#define bWMACControl 0x1
#define bWNICControl 0x2
struct r8192_priv *priv = rtllib_priv(dev);
struct rtllib_device *ieee = priv->rtllib;
- RT_TRACE(COMP_DBG, "===========>%s():EntryNo is %d,KeyIndex is "
- "%d,KeyType is %d,is_mesh is %d\n", __func__, EntryNo,
- KeyIndex, KeyType, is_mesh);
+ RT_TRACE(COMP_DBG,
+ "===========>%s():EntryNo is %d,KeyIndex is %d,KeyType is %d,is_mesh is %d\n",
+ __func__, EntryNo, KeyIndex, KeyType, is_mesh);
if (!is_mesh) {
ieee->swcamtable[EntryNo].bused = true;
ieee->swcamtable[EntryNo].key_index = KeyIndex;
if (priv->rtllib->RfOffReason > RF_CHANGE_BY_IPS) {
RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",
__func__);
- return ;
- } else {
- down(&priv->rtllib->ips_sem);
- IPSLeave(dev);
- up(&priv->rtllib->ips_sem);
+ return;
}
+ down(&priv->rtllib->ips_sem);
+ IPSLeave(dev);
+ up(&priv->rtllib->ips_sem);
}
}
priv->rtllib->is_set_key = true;
if (EntryNo >= TOTAL_CAM_ENTRY)
RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
- RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d,"
- "KeyType:%d, MacAddr %pM\n", dev, EntryNo, KeyIndex,
- KeyType, MacAddr);
+ RT_TRACE(COMP_SEC,
+ "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d,KeyType:%d, MacAddr %pM\n",
+ dev, EntryNo, KeyIndex, KeyType, MacAddr);
if (DefaultKey)
usConfig |= BIT15 | (KeyType<<2);
for (EntryId = 0; EntryId < 4; EntryId++) {
MacAddr = CAM_CONST_ADDR[EntryId];
if (priv->rtllib->swcamtable[EntryId].bused) {
- setKey(dev, EntryId , EntryId,
+ setKey(dev, EntryId, EntryId,
priv->rtllib->pairwise_key_type, MacAddr,
0, (u32 *)(&priv->rtllib->swcamtable
[EntryId].key_buf[0]));
(u32 *)(&priv->rtllib->swcamtable[0].key_buf[0])
);
} else {
- RT_TRACE(COMP_ERR, "===>%s():ERR!! ADHOC TKIP "
- ",but 0 entry is have no data\n",
+ RT_TRACE(COMP_ERR,
+ "===>%s():ERR!! ADHOC TKIP ,but 0 entry is have no data\n",
__func__);
return;
}
MacAddr = CAM_CONST_BROAD;
for (EntryId = 1; EntryId < 4; EntryId++) {
if (priv->rtllib->swcamtable[EntryId].bused) {
- setKey(dev, EntryId , EntryId,
+ setKey(dev, EntryId, EntryId,
priv->rtllib->group_key_type,
MacAddr, 0,
(u32 *)(&priv->rtllib->swcamtable[EntryId].key_buf[0]));
if (priv->rtllib->iw_mode == IW_MODE_ADHOC) {
if (priv->rtllib->swcamtable[0].bused) {
- setKey(dev, 0 , 0,
+ setKey(dev, 0, 0,
priv->rtllib->group_key_type,
CAM_CONST_ADDR[0], 0,
(u32 *)(&priv->rtllib->swcamtable[0].key_buf[0]));
} else {
- RT_TRACE(COMP_ERR, "===>%s():ERR!! ADHOC CCMP ,"
- "but 0 entry is have no data\n",
+ RT_TRACE(COMP_ERR,
+ "===>%s():ERR!! ADHOC CCMP ,but 0 entry is have no data\n",
__func__);
return;
}
void write_nic_io_byte(struct net_device *dev, int x, u8 y)
{
- u32 u4bPage = (x >> 8);
+ u32 u4bPage = x >> 8;
u8 u1PageMask = 0;
bool bIsLegalPage = false;
void write_nic_io_word(struct net_device *dev, int x, u16 y)
{
- u32 u4bPage = (x >> 8);
+ u32 u4bPage = x >> 8;
u8 u1PageMask = 0;
bool bIsLegalPage = false;
void write_nic_io_dword(struct net_device *dev, int x, u32 y)
{
- u32 u4bPage = (x >> 8);
+ u32 u4bPage = x >> 8;
u8 u1PageMask = 0;
bool bIsLegalPage = false;
u8 read_nic_io_byte(struct net_device *dev, int x)
{
- u32 u4bPage = (x >> 8);
+ u32 u4bPage = x >> 8;
u8 u1PageMask = 0;
bool bIsLegalPage = false;
u8 Data = 0;
- if (u4bPage == 0) {
+ if (u4bPage == 0)
return 0xff&inb(dev->base_addr + x);
- } else {
- bIsLegalPage = PlatformIOCheckPageLegalAndGetRegMask(u4bPage,
- &u1PageMask);
- if (bIsLegalPage) {
- u8 u1bPsr = read_nic_io_byte(dev, PSR);
- write_nic_io_byte(dev, PSR, ((u1bPsr & u1PageMask) |
- (u8)u4bPage));
- Data = read_nic_io_byte(dev, (x & 0xff));
- write_nic_io_byte(dev, PSR, (u1bPsr & u1PageMask));
- }
+ bIsLegalPage = PlatformIOCheckPageLegalAndGetRegMask(u4bPage,
+ &u1PageMask);
+ if (bIsLegalPage) {
+ u8 u1bPsr = read_nic_io_byte(dev, PSR);
+
+ write_nic_io_byte(dev, PSR, ((u1bPsr & u1PageMask) |
+ (u8)u4bPage));
+ Data = read_nic_io_byte(dev, (x & 0xff));
+ write_nic_io_byte(dev, PSR, (u1bPsr & u1PageMask));
}
return Data;
u16 read_nic_io_word(struct net_device *dev, int x)
{
- u32 u4bPage = (x >> 8);
+ u32 u4bPage = x >> 8;
u8 u1PageMask = 0;
bool bIsLegalPage = false;
u16 Data = 0;
- if (u4bPage == 0) {
+ if (u4bPage == 0)
return inw(dev->base_addr + x);
- } else {
- bIsLegalPage = PlatformIOCheckPageLegalAndGetRegMask(u4bPage,
- &u1PageMask);
- if (bIsLegalPage) {
- u8 u1bPsr = read_nic_io_byte(dev, PSR);
+ bIsLegalPage = PlatformIOCheckPageLegalAndGetRegMask(u4bPage,
+ &u1PageMask);
+ if (bIsLegalPage) {
+ u8 u1bPsr = read_nic_io_byte(dev, PSR);
- write_nic_io_byte(dev, PSR, ((u1bPsr & u1PageMask) |
- (u8)u4bPage));
- Data = read_nic_io_word(dev, (x & 0xff));
- write_nic_io_byte(dev, PSR, (u1bPsr & u1PageMask));
-
- }
+ write_nic_io_byte(dev, PSR, ((u1bPsr & u1PageMask) |
+ (u8)u4bPage));
+ Data = read_nic_io_word(dev, (x & 0xff));
+ write_nic_io_byte(dev, PSR, (u1bPsr & u1PageMask));
}
return Data;
u32 read_nic_io_dword(struct net_device *dev, int x)
{
- u32 u4bPage = (x >> 8);
+ u32 u4bPage = x >> 8;
u8 u1PageMask = 0;
bool bIsLegalPage = false;
u32 Data = 0;
- if (u4bPage == 0) {
+ if (u4bPage == 0)
return inl(dev->base_addr + x);
- } else {
- bIsLegalPage = PlatformIOCheckPageLegalAndGetRegMask(u4bPage,
- &u1PageMask);
- if (bIsLegalPage) {
- u8 u1bPsr = read_nic_io_byte(dev, PSR);
-
- write_nic_io_byte(dev, PSR, ((u1bPsr & u1PageMask) |
- (u8)u4bPage));
- Data = read_nic_io_dword(dev, (x & 0xff));
- write_nic_io_byte(dev, PSR, (u1bPsr & u1PageMask));
+ bIsLegalPage = PlatformIOCheckPageLegalAndGetRegMask(u4bPage,
+ &u1PageMask);
+ if (bIsLegalPage) {
+ u8 u1bPsr = read_nic_io_byte(dev, PSR);
- }
+ write_nic_io_byte(dev, PSR, ((u1bPsr & u1PageMask) |
+ (u8)u4bPage));
+ Data = read_nic_io_dword(dev, (x & 0xff));
+ write_nic_io_byte(dev, PSR, (u1bPsr & u1PageMask));
}
return Data;
u16 RFWaitCounter = 0;
unsigned long flag;
- RT_TRACE((COMP_PS | COMP_RF), "===>MgntActSet_RF_State(): "
- "StateToSet(%d)\n", StateToSet);
+ RT_TRACE((COMP_PS | COMP_RF),
+ "===>MgntActSet_RF_State(): StateToSet(%d)\n", StateToSet);
ProtectOrNot = false;
if (priv->RFChangeInProgress) {
spin_unlock_irqrestore(&priv->rf_ps_lock, flag);
RT_TRACE((COMP_PS | COMP_RF),
- "MgntActSet_RF_State(): RF Change in "
- "progress! Wait to set..StateToSet"
- "(%d).\n", StateToSet);
+ "MgntActSet_RF_State(): RF Change in progress! Wait to set..StateToSet(%d).\n",
+ StateToSet);
while (priv->RFChangeInProgress) {
RFWaitCounter++;
RT_TRACE((COMP_PS | COMP_RF),
- "MgntActSet_RF_State(): Wait 1"
- " ms (%d times)...\n",
+ "MgntActSet_RF_State(): Wait 1 ms (%d times)...\n",
RFWaitCounter);
mdelay(1);
if (RFWaitCounter > 100) {
- RT_TRACE(COMP_ERR, "MgntActSet_"
- "RF_State(): Wait too "
- "logn to set RF\n");
+ RT_TRACE(COMP_ERR,
+ "MgntActSet_RF_State(): Wait too logn to set RF\n");
return false;
}
}
ChangeSource >= RF_CHANGE_BY_HW)
bConnectBySSID = true;
} else {
- RT_TRACE((COMP_PS | COMP_RF), "MgntActSet_RF_State - "
- "eRfon reject pMgntInfo->RfOffReason= 0x%x,"
- " ChangeSource=0x%X\n",
+ RT_TRACE((COMP_PS | COMP_RF),
+ "MgntActSet_RF_State - eRfon reject pMgntInfo->RfOffReason= 0x%x, ChangeSource=0x%X\n",
priv->rtllib->RfOffReason, ChangeSource);
}
}
if (bActionAllowed) {
- RT_TRACE((COMP_PS | COMP_RF), "MgntActSet_RF_State(): Action is"
- " allowed.... StateToSet(%d), RfOffReason(%#X)\n",
+ RT_TRACE((COMP_PS | COMP_RF),
+ "MgntActSet_RF_State(): Action is allowed.... StateToSet(%d), RfOffReason(%#X)\n",
StateToSet, priv->rtllib->RfOffReason);
PHY_SetRFPowerState(dev, StateToSet);
if (StateToSet == eRfOn) {
}
}
} else {
- RT_TRACE((COMP_PS | COMP_RF), "MgntActSet_RF_State(): "
- "Action is rejected.... StateToSet(%d), ChangeSource"
- "(%#X), RfOffReason(%#X)\n", StateToSet, ChangeSource,
- priv->rtllib->RfOffReason);
+ RT_TRACE((COMP_PS | COMP_RF),
+ "MgntActSet_RF_State(): Action is rejected.... StateToSet(%d), ChangeSource(%#X), RfOffReason(%#X)\n",
+ StateToSet, ChangeSource, priv->rtllib->RfOffReason);
}
if (!ProtectOrNot) {
* between the tail and the head
*/
if ((prio == MGNT_QUEUE) && (skb_queue_len(&ring->queue) > 10))
- RT_TRACE(COMP_DBG, "-----[%d]---------ring->idx=%d "
- "queue_len=%d---------\n", prio, ring->idx,
- skb_queue_len(&ring->queue));
+ RT_TRACE(COMP_DBG,
+ "-----[%d]---------ring->idx=%d queue_len=%d---------\n",
+ prio, ring->idx, skb_queue_len(&ring->queue));
return skb_queue_len(&ring->queue);
}
struct r8192_priv *priv = rtllib_priv(dev);
schedule_work(&priv->reset_wq);
- printk(KERN_INFO "TXTIMEOUT");
+ netdev_info(dev, "TXTIMEOUT");
}
void rtl8192_irq_enable(struct net_device *dev)
if (priv->dot11CurrentPreambleMode != PREAMBLE_SHORT) {
ShortPreamble = true;
priv->dot11CurrentPreambleMode = PREAMBLE_SHORT;
- RT_TRACE(COMP_DBG, "%s(): WLAN_CAPABILITY_SHORT_"
- "PREAMBLE\n", __func__);
+ RT_TRACE(COMP_DBG,
+ "%s(): WLAN_CAPABILITY_SHORT_PREAMBLE\n",
+ __func__);
priv->rtllib->SetHwRegHandler(dev, HW_VAR_ACK_PREAMBLE,
(unsigned char *)&ShortPreamble);
}
if (priv->dot11CurrentPreambleMode != PREAMBLE_LONG) {
ShortPreamble = false;
priv->dot11CurrentPreambleMode = PREAMBLE_LONG;
- RT_TRACE(COMP_DBG, "%s(): WLAN_CAPABILITY_LONG_"
- "PREAMBLE\n", __func__);
+ RT_TRACE(COMP_DBG,
+ "%s(): WLAN_CAPABILITY_LONG_PREAMBLE\n",
+ __func__);
priv->rtllib->SetHwRegHandler(dev, HW_VAR_ACK_PREAMBLE,
(unsigned char *)&ShortPreamble);
}
mutex_lock(&priv->mutex);
if (priv->rtllib->state != RTLLIB_LINKED)
goto success;
- RT_TRACE(COMP_QOS, "qos active process with associate response "
- "received\n");
+ RT_TRACE(COMP_QOS,
+ "qos active process with associate response received\n");
for (i = 0; i < QOS_QUEUE_NUM; i++)
priv->rtllib->SetHwRegHandler(dev, HW_VAR_AC_PARAM, (u8 *)(&i));
if (priv->rtllib->state != RTLLIB_LINKED)
return ret;
- if ((priv->rtllib->iw_mode != IW_MODE_INFRA))
+ if (priv->rtllib->iw_mode != IW_MODE_INFRA)
return ret;
if (network->flags & NETWORK_HAS_QOS_MASK) {
network->qos_data.param_count;
priv->rtllib->wmm_acm = network->qos_data.wmm_acm;
queue_work_rsl(priv->priv_wq, &priv->qos_activate);
- RT_TRACE(COMP_QOS, "QoS parameters change call "
- "qos_activate\n");
+ RT_TRACE(COMP_QOS,
+ "QoS parameters change call qos_activate\n");
}
} else {
memcpy(&priv->rtllib->current_network.qos_data.parameters,
if ((network->qos_data.active == 1) && (active_network == 1)) {
queue_work_rsl(priv->priv_wq, &priv->qos_activate);
- RT_TRACE(COMP_QOS, "QoS was disabled call qos_"
- "activate\n");
+ RT_TRACE(COMP_QOS,
+ "QoS was disabled call qos_activate\n");
}
network->qos_data.active = 0;
network->qos_data.supported = 0;
if (priv->rtllib->state != RTLLIB_LINKED)
return 0;
- if ((priv->rtllib->iw_mode != IW_MODE_INFRA))
+ if (priv->rtllib->iw_mode != IW_MODE_INFRA)
return 0;
spin_lock_irqsave(&priv->rtllib->lock, flags);
priv->ops->tx_fill_descriptor(dev, pdesc, tcb_desc, pnewskb);
__skb_queue_tail(&ring->queue, pnewskb);
pdesc->OWN = 1;
-
- return;
}
static void rtl8192_stop_beacon(struct net_device *dev)
} else {
memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
}
- return;
}
static u8 rtl8192_getSupportedWireleeMode(struct net_device *dev)
} else if ((bSupportMode & WIRELESS_MODE_B)) {
wireless_mode = WIRELESS_MODE_B;
} else {
- RT_TRACE(COMP_ERR, "%s(), No valid wireless mode "
- "supported (%x)!!!\n", __func__, bSupportMode);
+ RT_TRACE(COMP_ERR,
+ "%s(), No valid wireless mode supported (%x)!!!\n",
+ __func__, bSupportMode);
wireless_mode = WIRELESS_MODE_B;
}
}
spin_lock_irqsave(&priv->rf_ps_lock, flags);
break;
}
- RT_TRACE(COMP_DBG, "===>%s():RF is in progress, need to wait "
- "until rf change is done.\n", __func__);
+ RT_TRACE(COMP_DBG,
+ "===>%s():RF is in progress, need to wait until rf change is done.\n",
+ __func__);
mdelay(1);
RFInProgressTimeOut++;
spin_lock_irqsave(&priv->rf_ps_lock, flags);
priv->AcmControl = 0;
priv->pFirmware = vzalloc(sizeof(struct rt_firmware));
if (!priv->pFirmware)
- printk(KERN_ERR "rtl8192e: Unable to allocate space "
- "for firmware\n");
+ netdev_err(dev,
+ "rtl8192e: Unable to allocate space for firmware\n");
skb_queue_head_init(&priv->rx_queue);
skb_queue_head_init(&priv->skb_queue);
if ((priv->rf_chip != RF_8225) && (priv->rf_chip != RF_8256)
&& (priv->rf_chip != RF_6052)) {
- RT_TRACE(COMP_ERR, "%s: unknown rf chip, can't set channel "
- "map\n", __func__);
+ RT_TRACE(COMP_ERR,
+ "%s: unknown rf chip, can't set channel map\n",
+ __func__);
return -1;
}
if (priv->ChannelPlan >= COUNTRY_CODE_MAX) {
- printk(KERN_INFO "rtl819x_init:Error channel plan! Set to "
- "default.\n");
+ netdev_info(dev,
+ "rtl819x_init:Error channel plan! Set to default.\n");
priv->ChannelPlan = COUNTRY_CODE_FCC;
}
RT_TRACE(COMP_INIT, "Channel plan is %d\n", priv->ChannelPlan);
rtl8192_irq_disable(dev);
if (request_irq(dev->irq, rtl8192_interrupt, IRQF_SHARED,
dev->name, dev)) {
- printk(KERN_ERR "Error allocating IRQ %d", dev->irq);
+ netdev_err(dev, "Error allocating IRQ %d", dev->irq);
return -1;
- } else {
- priv->irq = dev->irq;
- RT_TRACE(COMP_INIT, "IRQ %d\n", dev->irq);
}
+ priv->irq = dev->irq;
+ RT_TRACE(COMP_INIT, "IRQ %d\n", dev->irq);
+
if (rtl8192_pci_initdescring(dev) != 0) {
- printk(KERN_ERR "Endopoints initialization failed");
+ netdev_err(dev, "Endopoints initialization failed");
free_irq(dev->irq, dev);
return -1;
}
if ((i == TXCMD_QUEUE) || (i == HCCA_QUEUE))
continue;
if (skb_queue_len(&(&priv->tx_ring[i])->queue) > 0) {
- printk(KERN_INFO "===>tx queue is not empty:%d, %d\n",
+ netdev_info(dev, "===>tx queue is not empty:%d, %d\n",
i, skb_queue_len(&(&priv->tx_ring[i])->queue));
return 0;
}
tcb_desc->nStuckCount++;
bCheckFwTxCnt = true;
if (tcb_desc->nStuckCount > 1)
- printk(KERN_INFO "%s: QueueID=%d tcb_desc->n"
- "StuckCount=%d\n", __func__, QueueID,
- tcb_desc->nStuckCount);
+ netdev_info(dev,
+ "%s: QueueID=%d tcb_desc->nStuckCount=%d\n",
+ __func__, QueueID,
+ tcb_desc->nStuckCount);
}
}
spin_unlock_irqrestore(&priv->irq_th_lock, flags);
if (bCheckFwTxCnt) {
if (priv->ops->TxCheckStuckHandler(dev)) {
- RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no"
- " Tx condition!\n");
+ RT_TRACE(COMP_RESET,
+ "TxCheckStuck(): Fw indicates no Tx condition!\n");
return RESET_TYPE_SILENT;
}
}
if (TxResetType == RESET_TYPE_NORMAL ||
RxResetType == RESET_TYPE_NORMAL) {
- printk(KERN_INFO "%s(): TxResetType is %d, RxResetType is %d\n",
- __func__, TxResetType, RxResetType);
+ netdev_info(dev, "%s(): TxResetType is %d, RxResetType is %d\n",
+ __func__, TxResetType, RxResetType);
return RESET_TYPE_NORMAL;
} else if (TxResetType == RESET_TYPE_SILENT ||
RxResetType == RESET_TYPE_SILENT) {
- printk(KERN_INFO "%s(): TxResetType is %d, RxResetType is %d\n",
- __func__, TxResetType, RxResetType);
+ netdev_info(dev, "%s(): TxResetType is %d, RxResetType is %d\n",
+ __func__, TxResetType, RxResetType);
return RESET_TYPE_SILENT;
} else {
return RESET_TYPE_NORESET;
if (priv->rtllib->state == RTLLIB_LINKED)
LeisurePSLeave(dev);
- if (IS_NIC_DOWN(priv)) {
- RT_TRACE(COMP_ERR, "%s():the driver is not up! "
- "return\n", __func__);
+ if (priv->up) {
+ RT_TRACE(COMP_ERR,
+ "%s():the driver is not up! return\n",
+ __func__);
up(&priv->wx_sem);
return;
}
RT_TRACE(COMP_RESET, "%s():======>start to down the driver\n",
__func__);
mdelay(1000);
- RT_TRACE(COMP_RESET, "%s():111111111111111111111111======>start"
- " to down the driver\n", __func__);
+ RT_TRACE(COMP_RESET,
+ "%s():111111111111111111111111======>start to down the driver\n",
+ __func__);
if (!netif_queue_stopped(dev))
netif_stop_queue(dev);
if (ieee->state == RTLLIB_LINKED) {
SEM_DOWN_IEEE_WX(&ieee->wx_sem);
- printk(KERN_INFO "ieee->state is RTLLIB_LINKED\n");
+ netdev_info(dev, "ieee->state is RTLLIB_LINKED\n");
rtllib_stop_send_beacons(priv->rtllib);
del_timer_sync(&ieee->associate_timer);
cancel_delayed_work(&ieee->associate_retry_wq);
netif_carrier_off(dev);
SEM_UP_IEEE_WX(&ieee->wx_sem);
} else {
- printk(KERN_INFO "ieee->state is NOT LINKED\n");
+ netdev_info(dev, "ieee->state is NOT LINKED\n");
rtllib_softmac_stop_protocol(priv->rtllib, 0 , true);
}
dm_backup_dynamic_mechanism_state(dev);
up(&priv->wx_sem);
- RT_TRACE(COMP_RESET, "%s():<==========down process is "
- "finished\n", __func__);
+ RT_TRACE(COMP_RESET,
+ "%s():<==========down process is finished\n",
+ __func__);
RT_TRACE(COMP_RESET, "%s():<===========up process start\n",
__func__);
reset_status = _rtl8192_up(dev, true);
- RT_TRACE(COMP_RESET, "%s():<===========up process is "
- "finished\n", __func__);
+ RT_TRACE(COMP_RESET,
+ "%s():<===========up process is finished\n", __func__);
if (reset_status == -1) {
if (reset_times < 3) {
reset_times++;
goto RESET_START;
} else {
- RT_TRACE(COMP_ERR, " ERR!!! %s(): Reset "
- "Failed!!\n", __func__);
+ RT_TRACE(COMP_ERR,
+ " ERR!!! %s(): Reset Failed!!\n",
+ __func__);
}
}
bool bHigherBusyRxTraffic = false;
bool bEnterPS = false;
- if (IS_NIC_DOWN(priv) || priv->bHwRadioOff)
+ if (!priv->up || priv->bHwRadioOff)
return;
if (priv->rtllib->state >= RTLLIB_LINKED) {
if ((ieee->PowerSaveControl.ReturnPoint ==
IPS_CALLBACK_NONE) &&
(!ieee->bNetPromiscuousMode)) {
- RT_TRACE(COMP_PS, "====================>haha: "
- "IPSEnter()\n");
+ RT_TRACE(COMP_PS,
+ "====================>haha: IPSEnter()\n");
IPSEnter(dev);
}
}
if (ieee->eRFPowerState == eRfOff)
RT_TRACE(COMP_ERR, "========>%s()\n", __func__);
- printk(KERN_INFO "===>%s(): AP is power off, chan:%d,"
- " connect another one\n", __func__, priv->chan);
+ netdev_info(dev,
+ "===>%s(): AP is power off, chan:%d, connect another one\n",
+ __func__, priv->chan);
ieee->state = RTLLIB_ASSOCIATING;
queue_delayed_work_rsl(priv->priv_wq, &priv->watch_dog_wq, 0);
mod_timer(&priv->watch_dog_timer, jiffies +
- MSECS(RTLLIB_WATCH_DOG_TIME));
+ msecs_to_jiffies(RTLLIB_WATCH_DOG_TIME));
}
/****************************************************************************
MAX_DEV_ADDR_SIZE);
u8 queue_index = tcb_desc->queue_index;
- if ((priv->rtllib->eRFPowerState == eRfOff) || IS_NIC_DOWN(priv) ||
+ if ((priv->rtllib->eRFPowerState == eRfOff) || !priv->up ||
priv->bResetInProgress) {
kfree_skb(skb);
return;
priv->rtllib->tx_headroom);
priv->rtllib->stats.tx_packets++;
}
-
- return;
}
int rtl8192_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
if (queue_index != TXCMD_QUEUE) {
if ((priv->rtllib->eRFPowerState == eRfOff) ||
- IS_NIC_DOWN(priv) || priv->bResetInProgress) {
+ !priv->up || priv->bResetInProgress) {
kfree_skb(skb);
return 0;
}
if (queue_index == TXCMD_QUEUE) {
rtl8192_tx_cmd(dev, skb);
return 0;
- } else {
- tcb_desc->RATRIndex = 7;
- tcb_desc->bTxDisableRateFallBack = 1;
- tcb_desc->bTxUseDriverAssingedRate = 1;
- tcb_desc->bTxEnableFwCalcDur = 1;
- skb_push(skb, priv->rtllib->tx_headroom);
- ret = rtl8192_tx(dev, skb);
- if (ret != 0)
- kfree_skb(skb);
}
+ tcb_desc->RATRIndex = 7;
+ tcb_desc->bTxDisableRateFallBack = 1;
+ tcb_desc->bTxUseDriverAssingedRate = 1;
+ tcb_desc->bTxEnableFwCalcDur = 1;
+ skb_push(skb, priv->rtllib->tx_headroom);
+ ret = rtl8192_tx(dev, skb);
+ if (ret != 0)
+ kfree_skb(skb);
return ret;
}
__skb_queue_tail(&ring->queue, skb);
spin_unlock_irqrestore(&priv->irq_th_lock, flags);
-
- return;
}
short rtl8192_tx(struct net_device *dev, struct sk_buff *skb)
u32 fwinfo_size = 0;
if (priv->bdisable_nic) {
- RT_TRACE(COMP_ERR, "%s: ERR!! Nic is disabled! Can't tx packet"
- " len=%d qidx=%d!!!\n", __func__, skb->len,
- tcb_desc->queue_index);
+ RT_TRACE(COMP_ERR,
+ "%s: ERR!! Nic is disabled! Can't tx packet len=%d qidx=%d!!!\n",
+ __func__, skb->len, tcb_desc->queue_index);
return skb->len;
}
pdesc = &ring->desc[idx];
if ((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) {
- RT_TRACE(COMP_ERR, "No more TX desc@%d, ring->idx = %d, idx = "
- "%d, skblen = 0x%x queuelen=%d",
+ RT_TRACE(COMP_ERR,
+ "No more TX desc@%d, ring->idx = %d, idx = %d, skblen = 0x%x queuelen=%d",
tcb_desc->queue_index, ring->idx, idx, skb->len,
skb_queue_len(&ring->queue));
spin_unlock_irqrestore(&priv->irq_th_lock, flags);
[priv->rx_idx[rx_queue_idx]];
struct sk_buff *skb = priv->rx_buf[rx_queue_idx]
[priv->rx_idx[rx_queue_idx]];
+ struct sk_buff *new_skb;
- if (pdesc->OWN) {
+ if (pdesc->OWN)
return;
- } else {
- struct sk_buff *new_skb;
-
- if (!priv->ops->rx_query_status_descriptor(dev, &stats,
- pdesc, skb))
- goto done;
- new_skb = dev_alloc_skb(priv->rxbuffersize);
- /* if allocation of new skb failed - drop current packet
- * and reuse skb */
- if (unlikely(!new_skb))
- goto done;
-
- pci_unmap_single(priv->pdev,
- *((dma_addr_t *)skb->cb),
- priv->rxbuffersize,
- PCI_DMA_FROMDEVICE);
-
- skb_put(skb, pdesc->Length);
- skb_reserve(skb, stats.RxDrvInfoSize +
- stats.RxBufShift);
- skb_trim(skb, skb->len - 4/*sCrcLng*/);
- rtllib_hdr = (struct rtllib_hdr_1addr *)skb->data;
- if (!is_multicast_ether_addr(rtllib_hdr->addr1)) {
- /* unicast packet */
- unicast_packet = true;
- }
- fc = le16_to_cpu(rtllib_hdr->frame_ctl);
- type = WLAN_FC_GET_TYPE(fc);
- if (type == RTLLIB_FTYPE_MGMT)
- bLedBlinking = false;
-
- if (bLedBlinking)
- if (priv->rtllib->LedControlHandler)
- priv->rtllib->LedControlHandler(dev,
- LED_CTL_RX);
-
- if (stats.bCRC) {
- if (type != RTLLIB_FTYPE_MGMT)
- priv->stats.rxdatacrcerr++;
- else
- priv->stats.rxmgmtcrcerr++;
- }
-
- skb_len = skb->len;
+ if (!priv->ops->rx_query_status_descriptor(dev, &stats,
+ pdesc, skb))
+ goto done;
+ new_skb = dev_alloc_skb(priv->rxbuffersize);
+ /* if allocation of new skb failed - drop current packet
+ * and reuse skb
+ */
+ if (unlikely(!new_skb))
+ goto done;
+
+ pci_unmap_single(priv->pdev,
+ *((dma_addr_t *)skb->cb),
+ priv->rxbuffersize,
+ PCI_DMA_FROMDEVICE);
+
+ skb_put(skb, pdesc->Length);
+ skb_reserve(skb, stats.RxDrvInfoSize +
+ stats.RxBufShift);
+ skb_trim(skb, skb->len - 4/*sCrcLng*/);
+ rtllib_hdr = (struct rtllib_hdr_1addr *)skb->data;
+ if (!is_multicast_ether_addr(rtllib_hdr->addr1)) {
+ /* unicast packet */
+ unicast_packet = true;
+ }
+ fc = le16_to_cpu(rtllib_hdr->frame_ctl);
+ type = WLAN_FC_GET_TYPE(fc);
+ if (type == RTLLIB_FTYPE_MGMT)
+ bLedBlinking = false;
+
+ if (bLedBlinking)
+ if (priv->rtllib->LedControlHandler)
+ priv->rtllib->LedControlHandler(dev,
+ LED_CTL_RX);
+
+ if (stats.bCRC) {
+ if (type != RTLLIB_FTYPE_MGMT)
+ priv->stats.rxdatacrcerr++;
+ else
+ priv->stats.rxmgmtcrcerr++;
+ }
- if (!rtllib_rx(priv->rtllib, skb, &stats)) {
- dev_kfree_skb_any(skb);
- } else {
- priv->stats.rxok++;
- if (unicast_packet)
- priv->stats.rxbytesunicast += skb_len;
- }
+ skb_len = skb->len;
- skb = new_skb;
- skb->dev = dev;
+ if (!rtllib_rx(priv->rtllib, skb, &stats)) {
+ dev_kfree_skb_any(skb);
+ } else {
+ priv->stats.rxok++;
+ if (unicast_packet)
+ priv->stats.rxbytesunicast += skb_len;
+ }
- priv->rx_buf[rx_queue_idx][priv->rx_idx[rx_queue_idx]] =
- skb;
- *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev,
- skb_tail_pointer_rsl(skb),
- priv->rxbuffersize,
- PCI_DMA_FROMDEVICE);
- if (pci_dma_mapping_error(priv->pdev,
- *((dma_addr_t *)skb->cb))) {
- dev_kfree_skb_any(skb);
- return;
- }
+ skb = new_skb;
+ skb->dev = dev;
+
+ priv->rx_buf[rx_queue_idx][priv->rx_idx[rx_queue_idx]] =
+ skb;
+ *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev,
+ skb_tail_pointer_rsl(skb),
+ priv->rxbuffersize,
+ PCI_DMA_FROMDEVICE);
+ if (pci_dma_mapping_error(priv->pdev,
+ *((dma_addr_t *)skb->cb))) {
+ dev_kfree_skb_any(skb);
+ return;
}
done:
pdesc->BufferAddress = *((dma_addr_t *)skb->cb);
down(&priv->wx_sem);
- memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
+ ether_addr_copy(dev->dev_addr, addr->sa_data);
schedule_work(&priv->reset_wq);
up(&priv->wx_sem);
if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
- printk(KERN_INFO "Unable to obtain 32bit DMA for consistent allocations\n");
+ dev_info(&pdev->dev,
+ "Unable to obtain 32bit DMA for consistent allocations\n");
goto err_pci_disable;
}
}
goto err_rel_rtllib;
}
- printk(KERN_INFO "Memory mapped space start: 0x%08lx\n", pmem_start);
+ dev_info(&pdev->dev, "Memory mapped space start: 0x%08lx\n",
+ pmem_start);
if (!request_mem_region(pmem_start, pmem_len, DRV_NAME)) {
RT_TRACE(COMP_ERR, "request_mem_region failed!");
goto err_rel_rtllib;
dev->watchdog_timeo = HZ * 3;
if (dev_alloc_name(dev, ifname) < 0) {
- RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying "
- "wlan%%d...\n");
+ RT_TRACE(COMP_INIT,
+ "Oops: devname already taken! Trying wlan%%d...\n");
dev_alloc_name(dev, ifname);
}
static void rtl8192_pci_disconnect(struct pci_dev *pdev)
{
struct net_device *dev = pci_get_drvdata(pdev);
- struct r8192_priv *priv ;
+ struct r8192_priv *priv;
u32 i;
if (dev) {
rtl8192_free_tx_ring(dev, i);
if (priv->irq) {
- printk(KERN_INFO "Freeing irq %d\n", dev->irq);
+ dev_info(&pdev->dev, "Freeing irq %d\n", dev->irq);
free_irq(dev->irq, dev);
priv->irq = 0;
}
struct rt_pwr_save_ctrl *pPSC = (struct rt_pwr_save_ctrl *)
(&(priv->rtllib->PowerSaveControl));
- if (IS_NIC_DOWN(priv)) {
+ if (!priv->up) {
RT_TRACE(COMP_ERR, "ERR!!! %s(): Driver is already down!\n",
__func__);
priv->bdisable_nic = false;
}
bool NicIFDisableNIC(struct net_device *dev)
{
- bool status = true;
struct r8192_priv *priv = rtllib_priv(dev);
u8 tmp_state = 0;
priv->ops->stop_adapter(dev, false);
RT_TRACE(COMP_PS, "<=========%s()\n", __func__);
- return status;
+ return true;
}
static int __init rtl8192_pci_module_init(void)
{
- printk(KERN_INFO "\nLinux kernel driver for RTL8192E WLAN cards\n");
- printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan Driver\n");
+ pr_info("\nLinux kernel driver for RTL8192E WLAN cards\n");
+ pr_info("Copyright (c) 2007-2008, Realsil Wlan Driver\n");
if (0 != pci_register_driver(&rtl8192_pci_driver)) {
DMESG("No device found");
queue_delayed_work_rsl(priv->priv_wq, &priv->gpio_change_rf_wq, 0);
mod_timer(&priv->gpio_polling_timer, jiffies +
- MSECS(RTLLIB_WATCH_DOG_TIME));
+ msecs_to_jiffies(RTLLIB_WATCH_DOG_TIME));
}
/***************************************************************************
#define BIT(_i) (1<<(_i))
#endif
-#define IS_NIC_DOWN(priv) (!(priv)->up)
-
#define IS_ADAPTER_SENDS_BEACON(dev) 0
-#define IS_UNDER_11N_AES_MODE(_rtllib) \
- ((_rtllib->pHTInfo->bCurrentHTSupport == true) && \
- (_rtllib->pairwise_key_type == KEY_TYPE_CCMP))
-
#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000
#define HAL_HW_PCI_REVISION_ID_8190PCI 0x00
#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000
u8 read_nic_io_byte(struct net_device *dev, int x);
u32 read_nic_io_dword(struct net_device *dev, int x);
-u16 read_nic_io_word(struct net_device *dev, int x) ;
+u16 read_nic_io_word(struct net_device *dev, int x);
void write_nic_io_byte(struct net_device *dev, int x, u8 y);
void write_nic_io_word(struct net_device *dev, int x, u16 y);
void write_nic_io_dword(struct net_device *dev, int x, u32 y);
u8 read_nic_byte(struct net_device *dev, int x);
u32 read_nic_dword(struct net_device *dev, int x);
-u16 read_nic_word(struct net_device *dev, int x) ;
+u16 read_nic_word(struct net_device *dev, int x);
void write_nic_byte(struct net_device *dev, int x, u8 y);
void write_nic_word(struct net_device *dev, int x, u16 y);
void write_nic_dword(struct net_device *dev, int x, u32 y);
bool bshort_gi_enabled = false;
static u8 ping_rssi_state;
- if (IS_NIC_DOWN(priv)) {
+ if (!priv->up) {
RT_TRACE(COMP_RATE, "<---- dm_check_rate_adaptive(): driver is going to unload\n");
return;
}
struct r8192_priv *priv = rtllib_priv(dev);
if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20 ||
- !priv->rtllib->bandwidth_auto_switch.bautoswitch_enable) {
+ !priv->rtllib->bandwidth_auto_switch.bautoswitch_enable)
return;
+ if (priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz == false) {
+ if (priv->undecorated_smoothed_pwdb <=
+ priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz)
+ priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = true;
} else {
- if (priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz == false) {
- if (priv->undecorated_smoothed_pwdb <=
- priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz)
- priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = true;
- } else {
- if (priv->undecorated_smoothed_pwdb >=
- priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz)
- priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = false;
-
- }
+ if (priv->undecorated_smoothed_pwdb >=
+ priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz)
+ priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = false;
}
}
write_nic_byte(dev, FW_Busy_Flag, 0);
return;
}
- if ((priv->rtllib->eRFPowerState != eRfOn)) {
+ if (priv->rtllib->eRFPowerState != eRfOn) {
RT_TRACE(COMP_POWER_TRACKING,
"we are in power save, so return\n");
write_nic_byte(dev, Pw_Track_Flag, 0);
"priv->CCKPresentAttentuation = %d\n",
priv->CCKPresentAttentuation);
return;
- } else {
- if (Avg_TSSI_Meas_from_driver < TSSI_13dBm - E_FOR_TX_POWER_TRACK) {
- if (RF_Type == RF_2T4R) {
-
- if ((priv->rfa_txpowertrackingindex > 0) &&
- (priv->rfc_txpowertrackingindex > 0)) {
- priv->rfa_txpowertrackingindex--;
- if (priv->rfa_txpowertrackingindex_real > 4) {
- priv->rfa_txpowertrackingindex_real--;
- rtl8192_setBBreg(dev,
- rOFDM0_XATxIQImbalance,
- bMaskDWord,
- priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
- }
-
- priv->rfc_txpowertrackingindex--;
- if (priv->rfc_txpowertrackingindex_real > 4) {
- priv->rfc_txpowertrackingindex_real--;
- rtl8192_setBBreg(dev,
- rOFDM0_XCTxIQImbalance,
- bMaskDWord,
- priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
- }
- } else {
- rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance,
- bMaskDWord,
- priv->txbbgain_table[4].txbbgain_value);
- rtl8192_setBBreg(dev,
- rOFDM0_XCTxIQImbalance,
- bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
- }
- } else {
- if (priv->rfa_txpowertrackingindex > 0) {
- priv->rfa_txpowertrackingindex--;
- if (priv->rfa_txpowertrackingindex_real > 4) {
- priv->rfa_txpowertrackingindex_real--;
- rtl8192_setBBreg(dev,
- rOFDM0_XATxIQImbalance,
- bMaskDWord,
- priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
- }
- } else
- rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance,
- bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
+ }
+ if (Avg_TSSI_Meas_from_driver < TSSI_13dBm - E_FOR_TX_POWER_TRACK) {
+ if (RF_Type == RF_2T4R) {
- }
- } else {
- if (RF_Type == RF_2T4R) {
- if ((priv->rfa_txpowertrackingindex <
- TxBBGainTableLength - 1) &&
- (priv->rfc_txpowertrackingindex <
- TxBBGainTableLength - 1)) {
- priv->rfa_txpowertrackingindex++;
- priv->rfa_txpowertrackingindex_real++;
+ if ((priv->rfa_txpowertrackingindex > 0) &&
+ (priv->rfc_txpowertrackingindex > 0)) {
+ priv->rfa_txpowertrackingindex--;
+ if (priv->rfa_txpowertrackingindex_real > 4) {
+ priv->rfa_txpowertrackingindex_real--;
rtl8192_setBBreg(dev,
rOFDM0_XATxIQImbalance,
bMaskDWord,
- priv->txbbgain_table
- [priv->rfa_txpowertrackingindex_real].txbbgain_value);
- priv->rfc_txpowertrackingindex++;
- priv->rfc_txpowertrackingindex_real++;
+ priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
+ }
+
+ priv->rfc_txpowertrackingindex--;
+ if (priv->rfc_txpowertrackingindex_real > 4) {
+ priv->rfc_txpowertrackingindex_real--;
rtl8192_setBBreg(dev,
rOFDM0_XCTxIQImbalance,
bMaskDWord,
priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
- } else {
- rtl8192_setBBreg(dev,
- rOFDM0_XATxIQImbalance,
- bMaskDWord,
- priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
- rtl8192_setBBreg(dev,
- rOFDM0_XCTxIQImbalance,
- bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
}
} else {
- if (priv->rfa_txpowertrackingindex < (TxBBGainTableLength - 1)) {
- priv->rfa_txpowertrackingindex++;
- priv->rfa_txpowertrackingindex_real++;
- rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance,
+ rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance,
+ bMaskDWord,
+ priv->txbbgain_table[4].txbbgain_value);
+ rtl8192_setBBreg(dev,
+ rOFDM0_XCTxIQImbalance,
+ bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
+ }
+ } else {
+ if (priv->rfa_txpowertrackingindex > 0) {
+ priv->rfa_txpowertrackingindex--;
+ if (priv->rfa_txpowertrackingindex_real > 4) {
+ priv->rfa_txpowertrackingindex_real--;
+ rtl8192_setBBreg(dev,
+ rOFDM0_XATxIQImbalance,
bMaskDWord,
priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
- } else
- rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance,
- bMaskDWord,
- priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
- }
+ }
+ } else
+ rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance,
+ bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
+
}
+ } else {
if (RF_Type == RF_2T4R) {
- priv->CCKPresentAttentuation_difference
- = priv->rfa_txpowertrackingindex - priv->rfa_txpowertracking_default;
+ if ((priv->rfa_txpowertrackingindex <
+ TxBBGainTableLength - 1) &&
+ (priv->rfc_txpowertrackingindex <
+ TxBBGainTableLength - 1)) {
+ priv->rfa_txpowertrackingindex++;
+ priv->rfa_txpowertrackingindex_real++;
+ rtl8192_setBBreg(dev,
+ rOFDM0_XATxIQImbalance,
+ bMaskDWord,
+ priv->txbbgain_table
+ [priv->rfa_txpowertrackingindex_real].txbbgain_value);
+ priv->rfc_txpowertrackingindex++;
+ priv->rfc_txpowertrackingindex_real++;
+ rtl8192_setBBreg(dev,
+ rOFDM0_XCTxIQImbalance,
+ bMaskDWord,
+ priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
+ } else {
+ rtl8192_setBBreg(dev,
+ rOFDM0_XATxIQImbalance,
+ bMaskDWord,
+ priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
+ rtl8192_setBBreg(dev,
+ rOFDM0_XCTxIQImbalance,
+ bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
+ }
} else {
- priv->CCKPresentAttentuation_difference
- = priv->rfa_txpowertrackingindex_real - priv->rfa_txpowertracking_default;
- }
-
- if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
- priv->CCKPresentAttentuation =
- priv->CCKPresentAttentuation_20Mdefault +
- priv->CCKPresentAttentuation_difference;
- else
- priv->CCKPresentAttentuation =
- priv->CCKPresentAttentuation_40Mdefault +
- priv->CCKPresentAttentuation_difference;
-
- if (priv->CCKPresentAttentuation > (CCKTxBBGainTableLength-1))
- priv->CCKPresentAttentuation = CCKTxBBGainTableLength-1;
- if (priv->CCKPresentAttentuation < 0)
- priv->CCKPresentAttentuation = 0;
-
- if (priv->CCKPresentAttentuation > -1 &&
- priv->CCKPresentAttentuation < CCKTxBBGainTableLength) {
- if (priv->rtllib->current_network.channel == 14 &&
- !priv->bcck_in_ch14) {
- priv->bcck_in_ch14 = true;
- dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
- } else if (priv->rtllib->current_network.channel != 14 && priv->bcck_in_ch14) {
- priv->bcck_in_ch14 = false;
- dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
+ if (priv->rfa_txpowertrackingindex < (TxBBGainTableLength - 1)) {
+ priv->rfa_txpowertrackingindex++;
+ priv->rfa_txpowertrackingindex_real++;
+ rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance,
+ bMaskDWord,
+ priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
} else
- dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
+ rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance,
+ bMaskDWord,
+ priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
}
- RT_TRACE(COMP_POWER_TRACKING,
- "priv->rfa_txpowertrackingindex = %d\n",
- priv->rfa_txpowertrackingindex);
- RT_TRACE(COMP_POWER_TRACKING,
- "priv->rfa_txpowertrackingindex_real = %d\n",
- priv->rfa_txpowertrackingindex_real);
- RT_TRACE(COMP_POWER_TRACKING,
- "priv->CCKPresentAttentuation_difference = %d\n",
- priv->CCKPresentAttentuation_difference);
- RT_TRACE(COMP_POWER_TRACKING,
- "priv->CCKPresentAttentuation = %d\n",
- priv->CCKPresentAttentuation);
+ }
+ if (RF_Type == RF_2T4R) {
+ priv->CCKPresentAttentuation_difference
+ = priv->rfa_txpowertrackingindex - priv->rfa_txpowertracking_default;
+ } else {
+ priv->CCKPresentAttentuation_difference
+ = priv->rfa_txpowertrackingindex_real - priv->rfa_txpowertracking_default;
+ }
- if (priv->CCKPresentAttentuation_difference <= -12 || priv->CCKPresentAttentuation_difference >= 24) {
- priv->rtllib->bdynamic_txpower_enable = true;
- write_nic_byte(dev, Pw_Track_Flag, 0);
- write_nic_byte(dev, FW_Busy_Flag, 0);
- RT_TRACE(COMP_POWER_TRACKING, "tx power track--->limited\n");
- return;
- }
+ if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
+ priv->CCKPresentAttentuation =
+ priv->CCKPresentAttentuation_20Mdefault +
+ priv->CCKPresentAttentuation_difference;
+ else
+ priv->CCKPresentAttentuation =
+ priv->CCKPresentAttentuation_40Mdefault +
+ priv->CCKPresentAttentuation_difference;
+
+ if (priv->CCKPresentAttentuation > (CCKTxBBGainTableLength-1))
+ priv->CCKPresentAttentuation = CCKTxBBGainTableLength-1;
+ if (priv->CCKPresentAttentuation < 0)
+ priv->CCKPresentAttentuation = 0;
+
+ if (priv->CCKPresentAttentuation > -1 &&
+ priv->CCKPresentAttentuation < CCKTxBBGainTableLength) {
+ if (priv->rtllib->current_network.channel == 14 &&
+ !priv->bcck_in_ch14) {
+ priv->bcck_in_ch14 = true;
+ dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
+ } else if (priv->rtllib->current_network.channel != 14 && priv->bcck_in_ch14) {
+ priv->bcck_in_ch14 = false;
+ dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
+ } else
+ dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
+ }
+ RT_TRACE(COMP_POWER_TRACKING,
+ "priv->rfa_txpowertrackingindex = %d\n",
+ priv->rfa_txpowertrackingindex);
+ RT_TRACE(COMP_POWER_TRACKING,
+ "priv->rfa_txpowertrackingindex_real = %d\n",
+ priv->rfa_txpowertrackingindex_real);
+ RT_TRACE(COMP_POWER_TRACKING,
+ "priv->CCKPresentAttentuation_difference = %d\n",
+ priv->CCKPresentAttentuation_difference);
+ RT_TRACE(COMP_POWER_TRACKING,
+ "priv->CCKPresentAttentuation = %d\n",
+ priv->CCKPresentAttentuation);
+
+ if (priv->CCKPresentAttentuation_difference <= -12 || priv->CCKPresentAttentuation_difference >= 24) {
+ priv->rtllib->bdynamic_txpower_enable = true;
+ write_nic_byte(dev, Pw_Track_Flag, 0);
+ write_nic_byte(dev, FW_Busy_Flag, 0);
+ RT_TRACE(COMP_POWER_TRACKING, "tx power track--->limited\n");
+ return;
}
+
write_nic_byte(dev, Pw_Track_Flag, 0);
Avg_TSSI_Meas_from_driver = 0;
for (k = 0; k < 5; k++)
for (i = 0; i < CCK_Table_length; i++) {
if (TempCCk == (u32)CCKSwingTable_Ch1_Ch13[i][0]) {
priv->CCK_index = (u8) i;
- RT_TRACE(COMP_POWER_TRACKING, "Initial reg0x%x"
- " = 0x%x, CCK_index = 0x%x\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "Initial reg0x%x = 0x%x, CCK_index = 0x%x\n",
rCCK0_TxFilter1, TempCCk,
priv->CCK_index);
break;
priv->Record_CCK_20Mindex = tmpCCK20Mindex;
priv->Record_CCK_40Mindex = tmpCCK40Mindex;
- RT_TRACE(COMP_POWER_TRACKING, "Record_CCK_20Mindex / Record_CCK_40"
- "Mindex = %d / %d.\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "Record_CCK_20Mindex / Record_CCK_40Mindex = %d / %d.\n",
priv->Record_CCK_20Mindex, priv->Record_CCK_40Mindex);
if (priv->rtllib->current_network.channel == 14 &&
TxPowerCheckCnt = 5;
else
TxPowerCheckCnt = 2;
- if (!priv->btxpower_tracking) {
+ if (!priv->btxpower_tracking)
+ return;
+
+ if (priv->txpower_count <= TxPowerCheckCnt) {
+ priv->txpower_count++;
return;
- } else {
- if (priv->txpower_count <= TxPowerCheckCnt) {
- priv->txpower_count++;
- return;
- }
}
if (!TM_Trigger) {
}
TM_Trigger = 1;
return;
- } else {
- printk(KERN_INFO "===============>Schedule TxPowerTrackingWorkItem\n");
-
- queue_delayed_work_rsl(priv->priv_wq, &priv->txpower_tracking_wq, 0);
- TM_Trigger = 0;
- }
-
}
+ netdev_info(dev, "===============>Schedule TxPowerTrackingWorkItem\n");
+ queue_delayed_work_rsl(priv->priv_wq, &priv->txpower_tracking_wq, 0);
+ TM_Trigger = 0;
+
+}
static void dm_check_txpower_tracking(struct net_device *dev)
{
TempVal = 0;
if (!bInCH14) {
TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[0] +
- (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8)) ;
+ (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8));
rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[2] +
(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[5]<<24));
rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[6] +
- (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8)) ;
+ (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8));
rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
} else {
TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[0] +
- (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8)) ;
+ (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8));
rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[2] +
(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[5]<<24));
rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[6] +
- (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8)) ;
+ (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8));
rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
}
TempVal = 0;
if (!bInCH14) {
TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][0] +
- (CCKSwingTable_Ch1_Ch13[priv->CCK_index][1]<<8) ;
+ (CCKSwingTable_Ch1_Ch13[priv->CCK_index][1]<<8);
rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
rCCK0_TxFilter1, TempVal);
RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
rCCK0_TxFilter2, TempVal);
TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][6] +
- (CCKSwingTable_Ch1_Ch13[priv->CCK_index][7]<<8) ;
+ (CCKSwingTable_Ch1_Ch13[priv->CCK_index][7]<<8);
rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
rCCK0_DebugPort, TempVal);
} else {
TempVal = CCKSwingTable_Ch14[priv->CCK_index][0] +
- (CCKSwingTable_Ch14[priv->CCK_index][1]<<8) ;
+ (CCKSwingTable_Ch14[priv->CCK_index][1]<<8);
rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
rCCK0_TxFilter2, TempVal);
TempVal = CCKSwingTable_Ch14[priv->CCK_index][6] +
- (CCKSwingTable_Ch14[priv->CCK_index][7]<<8) ;
+ (CCKSwingTable_Ch14[priv->CCK_index][7]<<8);
rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
u32 reg_ratr = priv->rate_adaptive.last_ratr;
u32 ratr_value;
- if (IS_NIC_DOWN(priv)) {
+ if (!priv->up) {
RT_TRACE(COMP_RATE, "<---- dm_restore_dynamic_mechanism_state(): driver is going to unload\n");
return;
}
if ((priv->undecorated_smoothed_pwdb > dm_digtable.rssi_low_thresh) &&
(priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_thresh))
return;
- if ((priv->undecorated_smoothed_pwdb <= dm_digtable.rssi_low_thresh)) {
+ if (priv->undecorated_smoothed_pwdb <= dm_digtable.rssi_low_thresh) {
if (dm_digtable.dig_state == DM_STA_DIG_OFF &&
(priv->reset_count == reset_cnt))
return;
- else
- reset_cnt = priv->reset_count;
+ reset_cnt = priv->reset_count;
dm_digtable.dig_highpwr_state = DM_STA_DIG_MAX;
dm_digtable.dig_state = DM_STA_DIG_OFF;
return;
}
- if ((priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_thresh)) {
+ if (priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_thresh) {
u8 reset_flag = 0;
if (dm_digtable.dig_state == DM_STA_DIG_ON &&
(priv->reset_count == reset_cnt)) {
dm_ctrl_initgain_byrssi_highpwr(dev);
return;
- } else {
- if (priv->reset_count != reset_cnt)
- reset_flag = 1;
-
- reset_cnt = priv->reset_count;
}
+ if (priv->reset_count != reset_cnt)
+ reset_flag = 1;
+
+ reset_cnt = priv->reset_count;
dm_digtable.dig_state = DM_STA_DIG_ON;
if (dm_digtable.dig_highpwr_state == DM_STA_DIG_ON &&
(priv->reset_count == reset_cnt_highpwr))
return;
- else
- dm_digtable.dig_highpwr_state = DM_STA_DIG_ON;
+ dm_digtable.dig_highpwr_state = DM_STA_DIG_ON;
if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x10);
if (dm_digtable.dig_highpwr_state == DM_STA_DIG_OFF &&
(priv->reset_count == reset_cnt_highpwr))
return;
- else
- dm_digtable.dig_highpwr_state = DM_STA_DIG_OFF;
+ dm_digtable.dig_highpwr_state = DM_STA_DIG_OFF;
if (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_power_lowthresh &&
priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_thresh) {
if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT) {
if (dm_digtable.rssi_val >= dm_digtable.rssi_high_power_highthresh)
dm_digtable.curpd_thstate = DIG_PD_AT_HIGH_POWER;
- else if ((dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh))
+ else if (dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh)
dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
else if ((dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh) &&
(dm_digtable.rssi_val < dm_digtable.rssi_high_power_lowthresh))
if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) {
if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT) {
- if ((dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh))
+ if (dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh)
dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
- else if ((dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh))
+ else if (dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh)
dm_digtable.curcs_ratio_state = DIG_CS_RATIO_HIGHER;
else
dm_digtable.curcs_ratio_state = dm_digtable.precs_ratio_state;
static int wb_tmp;
if (wb_tmp == 0) {
- printk(KERN_INFO "%s():iot peer is %s, bssid:"
- " %pM\n", __func__,
- peername[pHTInfo->IOTPeer],
- priv->rtllib->current_network.bssid);
+ netdev_info(dev,
+ "%s():iot peer is %s, bssid: %pM\n",
+ __func__, peername[pHTInfo->IOTPeer],
+ priv->rtllib->current_network.bssid);
wb_tmp = 1;
}
}
}
priv->rate_record = rate_count;
priv->rateCountDiffRecord = rate_count_diff;
- RT_TRACE(COMP_HALDM, "rateRecord %d rateCount %d, rate"
- "Countdiff %d bSwitchFsync %d\n", priv->rate_record,
- rate_count, rate_count_diff, priv->bswitch_fsync);
+ RT_TRACE(COMP_HALDM,
+ "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n",
+ priv->rate_record, rate_count, rate_count_diff,
+ priv->bswitch_fsync);
if (priv->undecorated_smoothed_pwdb >
priv->rtllib->fsync_rssi_threshold &&
bSwitchFromCountDiff) {
if (timer_pending(&priv->fsync_timer))
del_timer_sync(&priv->fsync_timer);
priv->fsync_timer.expires = jiffies +
- MSECS(priv->rtllib->fsync_time_interval *
+ msecs_to_jiffies(priv->rtllib->fsync_time_interval *
priv->rtllib->fsync_multiple_timeinterval);
add_timer(&priv->fsync_timer);
} else {
if (timer_pending(&priv->fsync_timer))
del_timer_sync(&priv->fsync_timer);
priv->fsync_timer.expires = jiffies +
- MSECS(priv->rtllib->fsync_time_interval);
+ msecs_to_jiffies(priv->rtllib->fsync_time_interval);
add_timer(&priv->fsync_timer);
}
} else {
write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
}
RT_TRACE(COMP_HALDM, "ContinueDiffCount %d\n", priv->ContinueDiffCount);
- RT_TRACE(COMP_HALDM, "rateRecord %d rateCount %d, rateCountdiff %d "
- "bSwitchFsync %d\n", priv->rate_record, rate_count,
- rate_count_diff, priv->bswitch_fsync);
+ RT_TRACE(COMP_HALDM,
+ "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n",
+ priv->rate_record, rate_count, rate_count_diff,
+ priv->bswitch_fsync);
}
static void dm_StartHWFsync(struct net_device *dev)
if (timer_pending(&priv->fsync_timer))
del_timer_sync(&priv->fsync_timer);
priv->fsync_timer.expires = jiffies +
- MSECS(priv->rtllib->fsync_time_interval);
+ msecs_to_jiffies(priv->rtllib->fsync_time_interval);
add_timer(&priv->fsync_timer);
write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cd);
static u8 reg_c38_State = RegC38_Default;
static u32 reset_cnt;
- RT_TRACE(COMP_HALDM, "RSSI %d TimeInterval %d MultipleTimeInterval "
- "%d\n", priv->rtllib->fsync_rssi_threshold,
+ RT_TRACE(COMP_HALDM,
+ "RSSI %d TimeInterval %d MultipleTimeInterval %d\n",
+ priv->rtllib->fsync_rssi_threshold,
priv->rtllib->fsync_time_interval,
priv->rtllib->fsync_multiple_timeinterval);
- RT_TRACE(COMP_HALDM, "RateBitmap 0x%x FirstDiffRateThreshold %d Second"
- "DiffRateThreshold %d\n", priv->rtllib->fsync_rate_bitmap,
+ RT_TRACE(COMP_HALDM,
+ "RateBitmap 0x%x FirstDiffRateThreshold %d SecondDiffRateThreshold %d\n",
+ priv->rtllib->fsync_rate_bitmap,
priv->rtllib->fsync_firstdiff_ratethreshold,
priv->rtllib->fsync_seconddiff_ratethreshold);
/*------------------------Export global variable----------------------------*/
-/*------------------------Export Marco Definition---------------------------*/
-#define DM_APInitGainChangeNotify(Event) \
- { \
- dm_digtable.CurAPConnectState = Event; \
- }
-/*------------------------Export Marco Definition---------------------------*/
-
-
/*--------------------------Exported Function prototype---------------------*/
/*--------------------------Exported Function prototype---------------------*/
extern void init_hal_dm(struct net_device *dev);
if (DeviceID == 0x8172) {
switch (RevisionID) {
case HAL_HW_PCI_REVISION_ID_8192PCIE:
- printk(KERN_INFO "Adapter(8192 PCI-E) is found - "
- "DeviceID=%x\n", DeviceID);
+ dev_info(&pdev->dev,
+ "Adapter(8192 PCI-E) is found - DeviceID=%x\n",
+ DeviceID);
priv->card_8192 = NIC_8192E;
break;
case HAL_HW_PCI_REVISION_ID_8192SE:
- printk(KERN_INFO "Adapter(8192SE) is found - "
- "DeviceID=%x\n", DeviceID);
+ dev_info(&pdev->dev,
+ "Adapter(8192SE) is found - DeviceID=%x\n",
+ DeviceID);
priv->card_8192 = NIC_8192SE;
break;
default:
- printk(KERN_INFO "UNKNOWN nic type(%4x:%4x)\n",
- pdev->vendor, pdev->device);
+ dev_info(&pdev->dev,
+ "UNKNOWN nic type(%4x:%4x)\n",
+ pdev->vendor, pdev->device);
priv->card_8192 = NIC_UNKNOWN;
return false;
}
}
if (priv->ops->nic_type != priv->card_8192) {
- printk(KERN_INFO "Detect info(%x) and hardware info(%x) not match!\n",
- priv->ops->nic_type, priv->card_8192);
- printk(KERN_INFO "Please select proper driver before install!!!!\n");
+ dev_info(&pdev->dev,
+ "Detect info(%x) and hardware info(%x) not match!\n",
+ priv->ops->nic_type, priv->card_8192);
+ dev_info(&pdev->dev,
+ "Please select proper driver before install!!!!\n");
return false;
}
struct r8192_priv *priv = rtllib_priv(dev);
u32 ulRegRead;
- printk(KERN_INFO "============> r8192E suspend call.\n");
+ netdev_info(dev, "============> r8192E suspend call.\n");
del_timer_sync(&priv->gpio_polling_timer);
cancel_delayed_work(&priv->gpio_change_rf_wq);
priv->polling_timer_on = 0;
if (!netif_running(dev)) {
- printk(KERN_INFO "RTL819XE:UI is open out of suspend "
- "function\n");
+ netdev_info(dev,
+ "RTL819XE:UI is open out of suspend function\n");
goto out_pci_suspend;
}
write_nic_byte(dev, MacBlkCtrl, 0xa);
}
out_pci_suspend:
- printk("r8192E support WOL call??????????????????????\n");
+ netdev_info(dev, "r8192E support WOL call??????????????????????\n");
if (priv->rtllib->bSupportRemoteWakeUp)
- RT_TRACE(COMP_POWER, "r8192E support WOL call!!!!!!!"
- "!!!!!!!!!!!.\n");
+ RT_TRACE(COMP_POWER,
+ "r8192E support WOL call!!!!!!!!!!!!!!!!!!.\n");
pci_save_state(pdev);
pci_disable_device(pdev);
pci_enable_wake(pdev, pci_choose_state(pdev, state),
int err;
u32 val;
- printk(KERN_INFO "================>r8192E resume call.\n");
+ netdev_info(dev, "================>r8192E resume call.\n");
pci_set_power_state(pdev, PCI_D0);
err = pci_enable_device(pdev);
if (err) {
- printk(KERN_ERR "%s: pci_enable_device failed on resume\n",
- dev->name);
+ netdev_err(dev, "pci_enable_device failed on resume\n");
return err;
}
pci_restore_state(pdev);
check_rfctrl_gpio_timer((unsigned long)dev);
if (!netif_running(dev)) {
- printk(KERN_INFO "RTL819XE:UI is open out of resume "
- "function\n");
+ netdev_info(dev,
+ "RTL819XE:UI is open out of resume function\n");
goto out;
}
spin_lock_irqsave(&priv->rf_ps_lock, flags);
if (priv->RFChangeInProgress) {
spin_unlock_irqrestore(&priv->rf_ps_lock, flags);
- RT_TRACE(COMP_DBG, "rtl8192_hw_sleep_down(): RF Change in "
- "progress!\n");
+ RT_TRACE(COMP_DBG,
+ "rtl8192_hw_sleep_down(): RF Change in progress!\n");
return;
}
spin_unlock_irqrestore(&priv->rf_ps_lock, flags);
spin_lock_irqsave(&priv->rf_ps_lock, flags);
if (priv->RFChangeInProgress) {
spin_unlock_irqrestore(&priv->rf_ps_lock, flags);
- RT_TRACE(COMP_DBG, "rtl8192_hw_wakeup(): RF Change in "
- "progress!\n");
+ RT_TRACE(COMP_DBG,
+ "rtl8192_hw_wakeup(): RF Change in progress!\n");
queue_delayed_work_rsl(priv->rtllib->wq,
- &priv->rtllib->hw_wakeup_wq, MSECS(10));
+ &priv->rtllib->hw_wakeup_wq,
+ msecs_to_jiffies(10));
return;
}
spin_unlock_irqrestore(&priv->rf_ps_lock, flags);
spin_lock_irqsave(&priv->ps_lock, flags);
- time -= MSECS(8+16+7);
+ time -= msecs_to_jiffies(8 + 16 + 7);
- if ((time - jiffies) <= MSECS(MIN_SLEEP_TIME)) {
+ if ((time - jiffies) <= msecs_to_jiffies(MIN_SLEEP_TIME)) {
spin_unlock_irqrestore(&priv->ps_lock, flags);
- printk(KERN_INFO "too short to sleep::%lld < %ld\n",
- time - jiffies, MSECS(MIN_SLEEP_TIME));
+ netdev_info(dev, "too short to sleep::%lld < %ld\n",
+ time - jiffies, msecs_to_jiffies(MIN_SLEEP_TIME));
return;
}
- if ((time - jiffies) > MSECS(MAX_SLEEP_TIME)) {
- printk(KERN_INFO "========>too long to sleep:%lld > %ld\n",
- time - jiffies, MSECS(MAX_SLEEP_TIME));
+ if ((time - jiffies) > msecs_to_jiffies(MAX_SLEEP_TIME)) {
+ netdev_info(dev, "========>too long to sleep:%lld > %ld\n",
+ time - jiffies, msecs_to_jiffies(MAX_SLEEP_TIME));
spin_unlock_irqrestore(&priv->ps_lock, flags);
return;
}
RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",
__func__);
return;
- } else {
- printk(KERN_INFO "=========>%s(): IPSLeave\n",
- __func__);
- queue_work_rsl(priv->rtllib->wq,
- &priv->rtllib->ips_leave_wq);
}
+ netdev_info(dev, "=========>%s(): IPSLeave\n",
+ __func__);
+ queue_work_rsl(priv->rtllib->wq,
+ &priv->rtllib->ips_leave_wq);
}
}
}
priv->rtllib->sta_sleep = LPS_IS_WAKE;
spin_lock_irqsave(&(priv->rtllib->mgmt_tx_lock), flags);
- RT_TRACE(COMP_DBG, "LPS leave: notify AP we are awaked"
- " ++++++++++ SendNullFunctionData\n");
+ RT_TRACE(COMP_DBG,
+ "LPS leave: notify AP we are awaked ++++++++++ SendNullFunctionData\n");
rtllib_sta_ps_send_null_frame(priv->rtllib, 0);
spin_unlock_irqrestore(&(priv->rtllib->mgmt_tx_lock), flags);
}
&(priv->rtllib->PowerSaveControl);
RT_TRACE(COMP_PS, "LeisurePSEnter()...\n");
- RT_TRACE(COMP_PS, "pPSC->bLeisurePs = %d, ieee->ps = %d,pPSC->LpsIdle"
- "Count is %d,RT_CHECK_FOR_HANG_PERIOD is %d\n",
+ RT_TRACE(COMP_PS,
+ "pPSC->bLeisurePs = %d, ieee->ps = %d,pPSC->LpsIdleCount is %d,RT_CHECK_FOR_HANG_PERIOD is %d\n",
pPSC->bLeisurePs, priv->rtllib->ps, pPSC->LpsIdleCount,
RT_CHECK_FOR_HANG_PERIOD);
if (priv->rtllib->ps == RTLLIB_PS_DISABLED) {
- RT_TRACE(COMP_LPS, "LeisurePSEnter(): Enter "
- "802.11 power save mode...\n");
+ RT_TRACE(COMP_LPS,
+ "LeisurePSEnter(): Enter 802.11 power save mode...\n");
if (!pPSC->bFwCtrlLPS) {
if (priv->rtllib->SetFwCmdHandler)
if (pPSC->bLeisurePs) {
if (priv->rtllib->ps != RTLLIB_PS_DISABLED) {
- RT_TRACE(COMP_LPS, "LeisurePSLeave(): Busy Traffic , "
- "Leave 802.11 power save..\n");
+ RT_TRACE(COMP_LPS,
+ "LeisurePSLeave(): Busy Traffic , Leave 802.11 power save..\n");
MgntActSet_802_11_PowerSaveMode(dev,
RTLLIB_PS_DISABLED);
int ret;
struct r8192_priv *priv = rtllib_priv(dev);
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
int ret;
struct r8192_priv *priv = rtllib_priv(dev);
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
int ret;
struct r8192_priv *priv = rtllib_priv(dev);
- if (priv->bHwRadioOff == true) {
- RT_TRACE(COMP_ERR, "%s():Hw is Radio Off, we can't set "
- "Power,return\n", __func__);
+ if (priv->bHwRadioOff) {
+ RT_TRACE(COMP_ERR,
+ "%s():Hw is Radio Off, we can't set Power,return\n",
+ __func__);
return 0;
}
down(&priv->wx_sem);
struct r8192_priv *priv = rtllib_priv(dev);
int ret;
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
down(&priv->wx_sem);
- printk(KERN_INFO "%s(): set radio ! extra is %d\n", __func__, *extra);
+ netdev_info(dev, "%s(): set radio ! extra is %d\n", __func__, *extra);
if ((*extra != 0) && (*extra != 1)) {
- RT_TRACE(COMP_ERR, "%s(): set radio an err value,must 0(radio "
- "off) or 1(radio on)\n", __func__);
+ RT_TRACE(COMP_ERR,
+ "%s(): set radio an err value,must 0(radio off) or 1(radio on)\n",
+ __func__);
up(&priv->wx_sem);
return -1;
}
down(&priv->wx_sem);
- printk(KERN_INFO "%s(): set lps awake interval ! extra is %d\n",
- __func__, *extra);
+ netdev_info(dev, "%s(): set lps awake interval ! extra is %d\n",
+ __func__, *extra);
pPSC->RegMaxLPSAwakeIntvl = *extra;
up(&priv->wx_sem);
down(&priv->wx_sem);
- printk(KERN_INFO "%s(): force LPS ! extra is %d (1 is open 0 is "
- "close)\n", __func__, *extra);
+ netdev_info(dev,
+ "%s(): force LPS ! extra is %d (1 is open 0 is close)\n",
+ __func__, *extra);
priv->force_lps = *extra;
up(&priv->wx_sem);
return 0;
struct r8192_priv *priv = rtllib_priv(dev);
u8 c = *extra;
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
- printk(KERN_INFO "=====>%s(), *extra:%x, debugflag:%x\n", __func__,
- *extra, rt_global_debug_component);
+ netdev_info(dev, "=====>%s(), *extra:%x, debugflag:%x\n", __func__,
+ *extra, rt_global_debug_component);
if (c > 0)
rt_global_debug_component |= (1<<c);
else
enum rt_rf_power_state rtState;
int ret;
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
rtState = priv->rtllib->eRFPowerState;
down(&priv->wx_sem);
__func__);
up(&priv->wx_sem);
return -1;
- } else {
- printk(KERN_INFO "=========>%s(): "
- "IPSLeave\n", __func__);
- down(&priv->rtllib->ips_sem);
- IPSLeave(dev);
- up(&priv->rtllib->ips_sem);
}
+ netdev_info(dev, "=========>%s(): IPSLeave\n",
+ __func__);
+ down(&priv->rtllib->ips_sem);
+ IPSLeave(dev);
+ up(&priv->rtllib->ips_sem);
}
}
}
return 0;
}
- if (priv->bHwRadioOff == true) {
- printk(KERN_INFO "================>%s(): hwradio off\n",
- __func__);
+ if (priv->bHwRadioOff) {
+ netdev_info(dev, "================>%s(): hwradio off\n",
+ __func__);
return 0;
}
rtState = priv->rtllib->eRFPowerState;
if (rtState == eRfOff) {
if (priv->rtllib->RfOffReason >
RF_CHANGE_BY_IPS) {
- RT_TRACE(COMP_ERR, "%s(): RF is "
- "OFF.\n", __func__);
+ RT_TRACE(COMP_ERR,
+ "%s(): RF is OFF.\n",
+ __func__);
up(&priv->wx_sem);
return -1;
- } else {
- RT_TRACE(COMP_PS, "=========>%s(): "
- "IPSLeave\n", __func__);
- down(&priv->rtllib->ips_sem);
- IPSLeave(dev);
- up(&priv->rtllib->ips_sem);
}
+ RT_TRACE(COMP_PS, "=========>%s(): IPSLeave\n",
+ __func__);
+ down(&priv->rtllib->ips_sem);
+ IPSLeave(dev);
+ up(&priv->rtllib->ips_sem);
}
}
rtllib_stop_scan(priv->rtllib);
if (!priv->up)
return -ENETDOWN;
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
struct r8192_priv *priv = rtllib_priv(dev);
int ret;
- if ((rtllib_act_scanning(priv->rtllib, false)) &&
- !(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN)) {
- ; /* TODO - get rid of if */
- }
- if (priv->bHwRadioOff == true) {
- printk(KERN_INFO "=========>%s():hw radio off,or Rf state is "
- "eRfOff, return\n", __func__);
+ if (priv->bHwRadioOff) {
+ netdev_info(dev,
+ "=========>%s():hw radio off,or Rf state is eRfOff, return\n",
+ __func__);
return 0;
}
down(&priv->wx_sem);
int ret;
struct r8192_priv *priv = rtllib_priv(dev);
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
{
struct r8192_priv *priv = rtllib_priv(dev);
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
if (wrqu->frag.disabled)
int ret;
struct r8192_priv *priv = rtllib_priv(dev);
- if ((rtllib_act_scanning(priv->rtllib, false)) &&
- !(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN)) {
- ; /* TODO - get rid of if */
- }
-
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
{0x00, 0x00, 0x00, 0x00, 0x00, 0x03} };
int i;
- if ((rtllib_act_scanning(priv->rtllib, false)) &&
- !(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN))
- ; /* TODO - get rid of if */
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
if (!priv->up)
set_swcam(dev, key_idx, key_idx, KEY_TYPE_WEP104,
zero_addr[key_idx], 0, hwkey, 0);
} else {
- printk(KERN_INFO "wrong type in WEP, not WEP40 and WEP104\n");
+ netdev_info(dev,
+ "wrong type in WEP, not WEP40 and WEP104\n");
}
}
int *parms = (int *)p;
int mode = parms[0];
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
priv->rtllib->active_scan = mode;
struct r8192_priv *priv = rtllib_priv(dev);
int err = 0;
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
short err = 0;
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
struct r8192_priv *priv = rtllib_priv(dev);
struct rtllib_device *ieee = priv->rtllib;
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
struct r8192_priv *priv = rtllib_priv(dev);
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
struct r8192_priv *priv = rtllib_priv(dev);
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
struct r8192_priv *priv = rtllib_priv(dev);
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
(rtllib_EnableIntelPromiscuousMode(dev, false)) :
(rtllib_DisableIntelPromiscuousMode(dev, false));
- printk(KERN_INFO "=======>%s(), on = %d, filter src sta = %d\n",
- __func__, bPromiscuousOn, bFilterSourceStationFrame);
+ netdev_info(dev,
+ "=======>%s(), on = %d, filter src sta = %d\n",
+ __func__, bPromiscuousOn,
+ bFilterSourceStationFrame);
} else {
return -1;
}
IW_IOCTL(SIOCSIWENCODEEXT) = r8192_wx_set_enc_ext,
};
-/*
- * the following rule need to be following,
+/* the following rule need to be following,
* Odd : get (world access),
* even : set (root access)
- * */
+ */
static const struct iw_priv_args r8192_private_args[] = {
{
SIOCIWFIRSTPRIV + 0x0,
{
pBA->bValid = true;
if (Time != 0)
- mod_timer(&pBA->Timer, jiffies + MSECS(Time));
+ mod_timer(&pBA->Timer, jiffies + msecs_to_jiffies(Time));
}
static void DeActivateBAEntry(struct rtllib_device *ieee, struct ba_record *pBA)
u8 *tag = NULL;
u16 len = ieee->tx_headroom + 9;
- RTLLIB_DEBUG(RTLLIB_DL_TRACE | RTLLIB_DL_BA, "========>%s(), frame(%d)"
- " sentd to: %pM, ieee->dev:%p\n", __func__,
- type, Dst, ieee->dev);
+ RTLLIB_DEBUG(RTLLIB_DL_TRACE | RTLLIB_DL_BA,
+ "========>%s(), frame(%d) sentd to: %pM, ieee->dev:%p\n",
+ __func__, type, Dst, ieee->dev);
if (pBA == NULL) {
RTLLIB_DEBUG(RTLLIB_DL_ERR, "pBA is NULL\n");
return NULL;
if (net_ratelimit())
RTLLIB_DEBUG(RTLLIB_DL_TRACE | RTLLIB_DL_BA,
- "========>%s(), Reason"
- "Code(%d) sentd to: %pM\n", __func__,
- ReasonCode, dst);
+ "========>%s(), ReasonCode(%d) sentd to: %pM\n",
+ __func__, ReasonCode, dst);
memset(&DelbaParamSet, 0, 2);
RT_TRACE(COMP_DBG, "====>to send ADDBAREQ!!!!!\n");
softmac_mgmt_xmit(skb, ieee);
} else {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "alloc skb error in function"
- " %s()\n", __func__);
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "alloc skb error in function %s()\n", __func__);
}
}
if (skb)
softmac_mgmt_xmit(skb, ieee);
else
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "alloc skb error in function"
- " %s()\n", __func__);
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "alloc skb error in function %s()\n", __func__);
}
static void rtllib_send_DELBA(struct rtllib_device *ieee, u8 *dst,
if (skb)
softmac_mgmt_xmit(skb, ieee);
else
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "alloc skb error in function"
- " %s()\n", __func__);
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "alloc skb error in function %s()\n", __func__);
}
int rtllib_rx_ADDBAReq(struct rtllib_device *ieee, struct sk_buff *skb)
struct rx_ts_record *pTS = NULL;
if (skb->len < sizeof(struct rtllib_hdr_3addr) + 9) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, " Invalid skb len in BAREQ(%d / "
- "%d)\n", (int)skb->len,
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ " Invalid skb len in BAREQ(%d / %d)\n",
+ (int)skb->len,
(int)(sizeof(struct rtllib_hdr_3addr) + 9));
return -1;
}
(ieee->pHTInfo->bCurrentHTSupport == false) ||
(ieee->pHTInfo->IOTAction & HT_IOT_ACT_REJECT_ADDBA_REQ)) {
rc = ADDBA_STATUS_REFUSED;
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "Failed to reply on ADDBA_REQ as "
- "some capability is not ready(%d, %d)\n",
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "Failed to reply on ADDBA_REQ as some capability is not ready(%d, %d)\n",
ieee->current_network.qos_data.active,
ieee->pHTInfo->bCurrentHTSupport);
goto OnADDBAReq_Fail;
if (pBaParamSet->field.BAPolicy == BA_POLICY_DELAYED) {
rc = ADDBA_STATUS_INVALID_PARAM;
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "BA Policy is not correct in "
- "%s()\n", __func__);
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "BA Policy is not correct in %s()\n", __func__);
goto OnADDBAReq_Fail;
}
u16 ReasonCode;
if (skb->len < sizeof(struct rtllib_hdr_3addr) + 9) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, " Invalid skb len in BARSP(%d / "
- "%d)\n", (int)skb->len,
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "Invalid skb len in BARSP(%d / %d)\n",
+ (int)skb->len,
(int)(sizeof(struct rtllib_hdr_3addr) + 9));
return -1;
}
if (ieee->current_network.qos_data.active == 0 ||
ieee->pHTInfo->bCurrentHTSupport == false ||
ieee->pHTInfo->bCurrentAMPDUEnable == false) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "reject to ADDBA_RSP as some capab"
- "ility is not ready(%d, %d, %d)\n",
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "reject to ADDBA_RSP as some capability is not ready(%d, %d, %d)\n",
ieee->current_network.qos_data.active,
ieee->pHTInfo->bCurrentHTSupport,
ieee->pHTInfo->bCurrentAMPDUEnable);
if (pAdmittedBA->bValid == true) {
- RTLLIB_DEBUG(RTLLIB_DL_BA, "OnADDBARsp(): Recv ADDBA Rsp."
- " Drop because already admit it!\n");
+ RTLLIB_DEBUG(RTLLIB_DL_BA,
+ "OnADDBARsp(): Recv ADDBA Rsp. Drop because already admit it!\n");
return -1;
} else if ((pPendingBA->bValid == false) ||
(*pDialogToken != pPendingBA->DialogToken)) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "OnADDBARsp(): Recv ADDBA Rsp. "
- "BA invalid, DELBA!\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "OnADDBARsp(): Recv ADDBA Rsp. BA invalid, DELBA!\n");
ReasonCode = DELBA_REASON_UNKNOWN_BA;
goto OnADDBARsp_Reject;
} else {
- RTLLIB_DEBUG(RTLLIB_DL_BA, "OnADDBARsp(): Recv ADDBA Rsp. BA "
- "is admitted! Status code:%X\n", *pStatusCode);
+ RTLLIB_DEBUG(RTLLIB_DL_BA,
+ "OnADDBARsp(): Recv ADDBA Rsp. BA is admitted! Status code:%X\n",
+ *pStatusCode);
DeActivateBAEntry(ieee, pPendingBA);
}
u8 *dst = NULL;
if (skb->len < sizeof(struct rtllib_hdr_3addr) + 6) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, " Invalid skb len in DELBA(%d /"
- " %d)\n", (int)skb->len,
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "Invalid skb len in DELBA(%d / %d)\n",
+ (int)skb->len,
(int)(sizeof(struct rtllib_hdr_3addr) + 6));
return -1;
}
if (ieee->current_network.qos_data.active == 0 ||
ieee->pHTInfo->bCurrentHTSupport == false) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "received DELBA while QOS or HT "
- "is not supported(%d, %d)\n",
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "received DELBA while QOS or HT is not supported(%d, %d)\n",
ieee->current_network. qos_data.active,
ieee->pHTInfo->bCurrentHTSupport);
return -1;
if (!GetTs(ieee, (struct ts_common_info **)&pRxTs, dst,
(u8)pDelBaParamSet->field.TID, RX_DIR, false)) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't get TS for RXTS in "
- "%s().dst: %pM TID:%d\n", __func__, dst,
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "can't get TS for RXTS in %s().dst: %pM TID:%d\n",
+ __func__, dst,
(u8)pDelBaParamSet->field.TID);
return -1;
}
if (!GetTs(ieee, (struct ts_common_info **)&pTxTs, dst,
(u8)pDelBaParamSet->field.TID, TX_DIR, false)) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't get TS for TXTS in "
- "%s()\n", __func__);
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "can't get TS for TXTS in %s()\n",
+ __func__);
return -1;
}
CHNLOP_SWCHNL = 3,
};
-#define CHHLOP_IN_PROGRESS(_pHTInfo) \
- ((_pHTInfo)->ChnlOp > CHNLOP_NONE) ? true : false
-
-/*
-union ht_capability {
- u16 ShortData;
- u8 CharData[2];
- struct
- {
- u16 AdvCoding:1;
- u16 ChlWidth:1;
- u16 MimoPwrSave:2;
- u16 GreenField:1;
- u16 ShortGI20Mhz:1;
- u16 ShortGI40Mhz:1;
- u16 STBC:1;
- u16 BeamForm:1;
- u16 DelayBA:1;
- u16 MaxAMSDUSize:1;
- u16 DssCCk:1;
- u16 PSMP:1;
- u16 Rsvd:3;
- }Field;
-};
-
-union ht_capability_macpara {
- u8 ShortData;
- u8 CharData[1];
- struct
- {
- u8 MaxRxAMPDU:2;
- u8 MPDUDensity:2;
- u8 Rsvd:4;
- }Field;
-};
-*/
-
enum ht_action {
ACT_RECOMMAND_WIDTH = 0,
ACT_MIMO_PWR_SAVE = 1,
extern u8 MCS_FILTER_ALL[16];
extern u8 MCS_FILTER_1SS[16];
-#define PICK_RATE(_nLegacyRate, _nMcsRate) \
- ((_nMcsRate == 0) ? (_nLegacyRate&0x7f) : (_nMcsRate))
-#define LEGACY_WIRELESS_MODE IEEE_MODE_MASK
-
-#define CURRENT_RATE(WirelessMode, LegacyRate, HTRate) \
- ((WirelessMode & (LEGACY_WIRELESS_MODE)) != 0) ? \
- (LegacyRate) : (PICK_RATE(LegacyRate, HTRate))
-
-
-
#define RATE_ADPT_1SS_MASK 0xFF
#define RATE_ADPT_2SS_MASK 0xF0
#define RATE_ADPT_MCS32_MASK 0x01
pHTInfo->RxReorderPendingTime = 30;
}
-void HTDebugHTCapability(u8 *CapIE, u8 *TitleString)
-{
-
- static u8 EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33};
- struct ht_capab_ele *pCapELE;
-
- if (!memcmp(CapIE, EWC11NHTCap, sizeof(EWC11NHTCap))) {
- RTLLIB_DEBUG(RTLLIB_DL_HT, "EWC IE in %s()\n", __func__);
- pCapELE = (struct ht_capab_ele *)(&CapIE[4]);
- } else
- pCapELE = (struct ht_capab_ele *)(&CapIE[0]);
-
- RTLLIB_DEBUG(RTLLIB_DL_HT, "<Log HT Capability>. Called by %s\n",
- TitleString);
-
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSupported Channel Width = %s\n",
- (pCapELE->ChlWidth) ? "20MHz" : "20/40MHz");
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSupport Short GI for 20M = %s\n",
- (pCapELE->ShortGI20Mhz) ? "YES" : "NO");
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSupport Short GI for 40M = %s\n",
- (pCapELE->ShortGI40Mhz) ? "YES" : "NO");
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSupport TX STBC = %s\n",
- (pCapELE->TxSTBC) ? "YES" : "NO");
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tMax AMSDU Size = %s\n",
- (pCapELE->MaxAMSDUSize) ? "3839" : "7935");
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSupport CCK in 20/40 mode = %s\n",
- (pCapELE->DssCCk) ? "YES" : "NO");
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tMax AMPDU Factor = %d\n",
- pCapELE->MaxRxAMPDUFactor);
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tMPDU Density = %d\n",
- pCapELE->MPDUDensity);
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tMCS Rate Set = [%x][%x][%x][%x][%x]\n",
- pCapELE->MCS[0], pCapELE->MCS[1], pCapELE->MCS[2],
- pCapELE->MCS[3], pCapELE->MCS[4]);
- return;
-
-}
-
-void HTDebugHTInfo(u8 *InfoIE, u8 *TitleString)
-{
-
- static u8 EWC11NHTInfo[] = {0x00, 0x90, 0x4c, 0x34};
- struct ht_info_ele *pHTInfoEle;
-
- if (!memcmp(InfoIE, EWC11NHTInfo, sizeof(EWC11NHTInfo))) {
- RTLLIB_DEBUG(RTLLIB_DL_HT, "EWC IE in %s()\n", __func__);
- pHTInfoEle = (struct ht_info_ele *)(&InfoIE[4]);
- } else
- pHTInfoEle = (struct ht_info_ele *)(&InfoIE[0]);
-
-
- RTLLIB_DEBUG(RTLLIB_DL_HT, "<Log HT Information Element>. "
- "Called by %s\n", TitleString);
-
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tPrimary channel = %d\n",
- pHTInfoEle->ControlChl);
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSenondary channel =");
- switch (pHTInfoEle->ExtChlOffset) {
- case 0:
- RTLLIB_DEBUG(RTLLIB_DL_HT, "Not Present\n");
- break;
- case 1:
- RTLLIB_DEBUG(RTLLIB_DL_HT, "Upper channel\n");
- break;
- case 2:
- RTLLIB_DEBUG(RTLLIB_DL_HT, "Reserved. Eooro!!!\n");
- break;
- case 3:
- RTLLIB_DEBUG(RTLLIB_DL_HT, "Lower Channel\n");
- break;
- }
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tRecommended channel width = %s\n",
- (pHTInfoEle->RecommemdedTxWidth) ? "20Mhz" : "40Mhz");
-
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tOperation mode for protection = ");
- switch (pHTInfoEle->OptMode) {
- case 0:
- RTLLIB_DEBUG(RTLLIB_DL_HT, "No Protection\n");
- break;
- case 1:
- RTLLIB_DEBUG(RTLLIB_DL_HT, "HT non-member protection mode\n");
- break;
- case 2:
- RTLLIB_DEBUG(RTLLIB_DL_HT, "Suggest to open protection\n");
- break;
- case 3:
- RTLLIB_DEBUG(RTLLIB_DL_HT, "HT mixed mode\n");
- break;
- }
-
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tBasic MCS Rate Set = [%x][%x][%x][%x]"
- "[%x]\n", pHTInfoEle->BasicMSC[0], pHTInfoEle->BasicMSC[1],
- pHTInfoEle->BasicMSC[2], pHTInfoEle->BasicMSC[3],
- pHTInfoEle->BasicMSC[4]);
-}
-
-static bool IsHTHalfNmode40Bandwidth(struct rtllib_device *ieee)
-{
- bool retValue = false;
- struct rt_hi_throughput *pHTInfo = ieee->pHTInfo;
-
- if (pHTInfo->bCurrentHTSupport == false)
- retValue = false;
- else if (pHTInfo->bRegBW40MHz == false)
- retValue = false;
- else if (!ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
- retValue = false;
- else if (((struct ht_capab_ele *)(pHTInfo->PeerHTCapBuf))->ChlWidth)
- retValue = true;
- else
- retValue = false;
-
- return retValue;
-}
-
-static bool IsHTHalfNmodeSGI(struct rtllib_device *ieee, bool is40MHz)
-{
- bool retValue = false;
- struct rt_hi_throughput *pHTInfo = ieee->pHTInfo;
-
- if (pHTInfo->bCurrentHTSupport == false)
- retValue = false;
- else if (!ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
- retValue = false;
- else if (is40MHz) {
- if (((struct ht_capab_ele *)
- (pHTInfo->PeerHTCapBuf))->ShortGI40Mhz)
- retValue = true;
- else
- retValue = false;
- } else {
- if (((struct ht_capab_ele *)
- (pHTInfo->PeerHTCapBuf))->ShortGI20Mhz)
- retValue = true;
- else
- retValue = false;
- }
-
- return retValue;
-}
-
-u16 HTHalfMcsToDataRate(struct rtllib_device *ieee, u8 nMcsRate)
-{
-
- u8 is40MHz;
- u8 isShortGI;
-
- is40MHz = (IsHTHalfNmode40Bandwidth(ieee)) ? 1 : 0;
- isShortGI = (IsHTHalfNmodeSGI(ieee, is40MHz)) ? 1 : 0;
-
- return MCS_DATA_RATE[is40MHz][isShortGI][(nMcsRate & 0x7f)];
-}
-
-
u16 HTMcsToDataRate(struct rtllib_device *ieee, u8 nMcsRate)
{
struct rt_hi_throughput *pHTInfo = ieee->pHTInfo;
u8 is40MHz = 0;
u8 isShortGI = 0;
- if (nDataRate < 12) {
+ if (nDataRate < 12)
return CCKOFDMRate[nDataRate];
- } else {
- if (nDataRate >= 0x10 && nDataRate <= 0x1f) {
- is40MHz = 0;
- isShortGI = 0;
- } else if (nDataRate >= 0x20 && nDataRate <= 0x2f) {
- is40MHz = 1;
- isShortGI = 0;
-
- } else if (nDataRate >= 0x30 && nDataRate <= 0x3f) {
- is40MHz = 0;
- isShortGI = 1;
- } else if (nDataRate >= 0x40 && nDataRate <= 0x4f) {
- is40MHz = 1;
- isShortGI = 1;
- }
- return MCS_DATA_RATE[is40MHz][isShortGI][nDataRate&0xf];
+ if (nDataRate >= 0x10 && nDataRate <= 0x1f) {
+ is40MHz = 0;
+ isShortGI = 0;
+ } else if (nDataRate >= 0x20 && nDataRate <= 0x2f) {
+ is40MHz = 1;
+ isShortGI = 0;
+ } else if (nDataRate >= 0x30 && nDataRate <= 0x3f) {
+ is40MHz = 0;
+ isShortGI = 1;
+ } else if (nDataRate >= 0x40 && nDataRate <= 0x4f) {
+ is40MHz = 1;
+ isShortGI = 1;
}
+ return MCS_DATA_RATE[is40MHz][isShortGI][nDataRate&0xf];
}
bool IsHTHalfNmodeAPs(struct rtllib_device *ieee)
static bool HTIOTActIsDisableMCS15(struct rtllib_device *ieee)
{
- bool retValue = false;
-
- return retValue;
+ return false;
}
static bool HTIOTActIsDisableMCSTwoSpatialStream(struct rtllib_device *ieee)
struct ht_capab_ele *pCapELE = NULL;
if ((posHTCap == NULL) || (pHT == NULL)) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "posHTCap or pHTInfo can't be "
- "null in HTConstructCapabilityElement()\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "posHTCap or pHTInfo can't be null in HTConstructCapabilityElement()\n");
return;
}
memset(posHTCap, 0, *len);
pCapELE->LSigTxopProtect = 0;
- RTLLIB_DEBUG(RTLLIB_DL_HT, "TX HT cap/info ele BW=%d MaxAMSDUSize:%d "
- "DssCCk:%d\n", pCapELE->ChlWidth, pCapELE->MaxAMSDUSize,
- pCapELE->DssCCk);
+ RTLLIB_DEBUG(RTLLIB_DL_HT,
+ "TX HT cap/info ele BW=%d MaxAMSDUSize:%d DssCCk:%d\n",
+ pCapELE->ChlWidth, pCapELE->MaxAMSDUSize, pCapELE->DssCCk);
if (IsEncrypt) {
pCapELE->MPDUDensity = 7;
struct ht_info_ele *pHTInfoEle = (struct ht_info_ele *)posHTInfo;
if ((posHTInfo == NULL) || (pHTInfoEle == NULL)) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "posHTInfo or pHTInfoEle can't be "
- "null in HTConstructInfoElement()\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "posHTInfo or pHTInfoEle can't be null in HTConstructInfoElement()\n");
return;
}
u8 *len)
{
if (posRT2RTAgg == NULL) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "posRT2RTAgg can't be null in "
- "HTConstructRT2RTAggElement()\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "posRT2RTAgg can't be null in HTConstructRT2RTAggElement()\n");
return;
}
memset(posRT2RTAgg, 0, *len);
u8 i;
if (pOperateMCS == NULL) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "pOperateMCS can't be null"
- " in HT_PickMCSRate()\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "pOperateMCS can't be null in HT_PickMCSRate()\n");
return false;
}
u8 availableMcsRate[16];
if (pMCSRateSet == NULL || pMCSFilter == NULL) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "pMCSRateSet or pMCSFilter can't "
- "be null in HTGetHighestMCSRate()\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "pMCSRateSet or pMCSFilter can't be null in HTGetHighestMCSRate()\n");
return false;
}
for (i = 0; i < 16; i++)
HTMcsToDataRate(ieee, mcsRate))
mcsRate = (8*i+j);
}
- bitMap = bitMap>>1;
+ bitMap >>= 1;
}
}
}
static u8 EWC11NHTInfo[] = {0x00, 0x90, 0x4c, 0x34};
if (pHTInfo->bCurrentHTSupport == false) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "<=== HTOnAssocRsp(): "
- "HT_DISABLE\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "<=== HTOnAssocRsp(): HT_DISABLE\n");
return;
}
RTLLIB_DEBUG(RTLLIB_DL_HT, "===> HTOnAssocRsp_wq(): HT_ENABLE\n");
RTLLIB_DEBUG(RTLLIB_DL_HT, "==============>%s()\n", __func__);
/* unmark bEnableHT flag here is the same reason why unmarked in
- * function rtllib_softmac_new_net. WB 2008.09.10*/
+ * function rtllib_softmac_new_net. WB 2008.09.10
+ */
if (pNetwork->bssht.bdSupportHT) {
pHTInfo->bCurrentHTSupport = true;
pHTInfo->ePeerHTSpecVer = pNetwork->bssht.bdHTSpecVer;
{
if (ieee->pHTInfo->bCurrentHTSupport) {
if ((IsQoSDataFrame(pFrame) && Frame_Order(pFrame)) == 1) {
- RTLLIB_DEBUG(RTLLIB_DL_HT, "HT CONTROL FILED "
- "EXIST!!\n");
+ RTLLIB_DEBUG(RTLLIB_DL_HT,
+ "HT CONTROL FILED EXIST!!\n");
return true;
}
}
#ifndef __INC_QOS_TYPE_H
#define __INC_QOS_TYPE_H
-#include "rtllib_endianfree.h"
-
#define BIT0 0x00000001
#define BIT1 0x00000002
#define BIT2 0x00000004
};
#define QBSS_LOAD_SIZE 5
-#define GET_QBSS_LOAD_STA_COUNT(__pStart) \
- ReadEF2Byte(__pStart)
-#define SET_QBSS_LOAD_STA_COUNT(__pStart, __Value) \
- WriteEF2Byte(__pStart, __Value)
-#define GET_QBSS_LOAD_CHNL_UTILIZATION(__pStart) \
- ReadEF1Byte((u8 *)(__pStart) + 2)
-#define SET_QBSS_LOAD_CHNL_UTILIZATION(__pStart, __Value) \
- WriteEF1Byte((u8 *)(__pStart) + 2, __Value)
-#define GET_QBSS_LOAD_AVAILABLE_CAPACITY(__pStart) \
- ReadEF2Byte((u8 *)(__pStart) + 3)
-#define SET_QBSS_LOAD_AVAILABLE_CAPACITY(__pStart, __Value) \
- WriteEF2Byte((u8 *)(__pStart) + 3, __Value)
struct bss_qos {
QOS_MODE bdQoSMode;
bool bQBssLoadValid;
};
-#define sQoSCtlLng 2
-#define QOS_CTRL_LEN(_QosMode) ((_QosMode > QOS_DISABLE) ? sQoSCtlLng : 0)
-
-
#define IsACValid(ac) ((ac >= 0 && ac <= 7) ? true : false)
pRxTs->RxIndicateSeq =
(pRxTs->RxIndicateSeq + 1) % 4096;
- RTLLIB_DEBUG(RTLLIB_DL_REORDER, "%s(): Indicate"
- " SeqNum: %d\n", __func__,
- pReorderEntry->SeqNum);
+ RTLLIB_DEBUG(RTLLIB_DL_REORDER,
+ "%s(): Indicate SeqNum: %d\n",
+ __func__, pReorderEntry->SeqNum);
ieee->stats_IndicateArray[index] =
pReorderEntry->prxb;
index++;
pRxTs->RxTimeoutIndicateSeq = 0xffff;
if (index > REORDER_WIN_SIZE) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "RxReorderIndicatePacket():"
- " Rx Reorder struct buffer full!!\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "RxReorderIndicatePacket(): Rx Reorder struct buffer full!!\n");
spin_unlock_irqrestore(&(ieee->reorder_spinlock),
flags);
return;
if (bPktInBuf && (pRxTs->RxTimeoutIndicateSeq == 0xffff)) {
pRxTs->RxTimeoutIndicateSeq = pRxTs->RxIndicateSeq;
mod_timer(&pRxTs->RxPktPendingTimer, jiffies +
- MSECS(ieee->pHTInfo->RxReorderPendingTime));
+ msecs_to_jiffies(ieee->pHTInfo->RxReorderPendingTime));
}
spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
}
TxTsRecord[num]);
TsInitAddBA(ieee, pTxTs, BA_POLICY_IMMEDIATE, false);
- RTLLIB_DEBUG(RTLLIB_DL_BA, "TsAddBaProcess(): ADDBA Req is "
- "started!!\n");
+ RTLLIB_DEBUG(RTLLIB_DL_BA,
+ "TsAddBaProcess(): ADDBA Req is started!!\n");
}
static void ResetTsCommonInfo(struct ts_common_info *pTsCommonInfo)
if (InactTime != 0)
mod_timer(&pTsCommonInfo->InactTimer, jiffies +
- MSECS(InactTime));
+ msecs_to_jiffies(InactTime));
}
static struct ts_common_info *SearchAdmitTRStream(struct rtllib_device *ieee,
u8 *Addr, u8 TID, enum tr_select TxRxSelect, bool bAddNewTs)
{
u8 UP = 0;
+ union tspec_body TSpec;
+ union qos_tsinfo *pTSInfo = &TSpec.f.TSInfo;
+ struct list_head *pUnusedList;
+ struct list_head *pAddmitList;
+ enum direction_value Dir;
if (is_multicast_ether_addr(Addr)) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "ERR! get TS for Broadcast or "
- "Multicast\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "ERR! get TS for Broadcast or Multicast\n");
return false;
}
if (ieee->current_network.qos_data.supported == 0) {
UP = 0;
} else {
if (!IsACValid(TID)) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "ERR! in %s(), TID(%d) is "
- "not valid\n", __func__, TID);
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "ERR! in %s(), TID(%d) is not valid\n",
+ __func__, TID);
return false;
}
}
*ppTS = SearchAdmitTRStream(ieee, Addr, UP, TxRxSelect);
- if (*ppTS != NULL) {
+ if (*ppTS != NULL)
return true;
- } else {
- if (!bAddNewTs) {
- RTLLIB_DEBUG(RTLLIB_DL_TS, "add new TS failed"
- "(tid:%d)\n", UP);
- return false;
- } else {
- union tspec_body TSpec;
- union qos_tsinfo *pTSInfo = &TSpec.f.TSInfo;
- struct list_head *pUnusedList =
- (TxRxSelect == TX_DIR) ?
+
+ if (!bAddNewTs) {
+ RTLLIB_DEBUG(RTLLIB_DL_TS,
+ "add new TS failed(tid:%d)\n", UP);
+ return false;
+ }
+
+ pUnusedList = (TxRxSelect == TX_DIR) ?
(&ieee->Tx_TS_Unused_List) :
(&ieee->Rx_TS_Unused_List);
- struct list_head *pAddmitList =
- (TxRxSelect == TX_DIR) ?
+ pAddmitList = (TxRxSelect == TX_DIR) ?
(&ieee->Tx_TS_Admit_List) :
(&ieee->Rx_TS_Admit_List);
- enum direction_value Dir =
- (ieee->iw_mode == IW_MODE_MASTER) ?
- ((TxRxSelect == TX_DIR) ? DIR_DOWN : DIR_UP) :
- ((TxRxSelect == TX_DIR) ? DIR_UP : DIR_DOWN);
- RTLLIB_DEBUG(RTLLIB_DL_TS, "to add Ts\n");
- if (!list_empty(pUnusedList)) {
- (*ppTS) = list_entry(pUnusedList->next,
- struct ts_common_info, List);
- list_del_init(&(*ppTS)->List);
- if (TxRxSelect == TX_DIR) {
- struct tx_ts_record *tmp =
- container_of(*ppTS,
- struct tx_ts_record,
- TsCommonInfo);
- ResetTxTsEntry(tmp);
- } else {
- struct rx_ts_record *tmp =
- container_of(*ppTS,
- struct rx_ts_record,
- TsCommonInfo);
- ResetRxTsEntry(tmp);
- }
-
- RTLLIB_DEBUG(RTLLIB_DL_TS, "to init current TS"
- ", UP:%d, Dir:%d, addr: %pM"
- " ppTs=%p\n", UP, Dir,
- Addr, *ppTS);
- pTSInfo->field.ucTrafficType = 0;
- pTSInfo->field.ucTSID = UP;
- pTSInfo->field.ucDirection = Dir;
- pTSInfo->field.ucAccessPolicy = 1;
- pTSInfo->field.ucAggregation = 0;
- pTSInfo->field.ucPSB = 0;
- pTSInfo->field.ucUP = UP;
- pTSInfo->field.ucTSInfoAckPolicy = 0;
- pTSInfo->field.ucSchedule = 0;
-
- MakeTSEntry(*ppTS, Addr, &TSpec, NULL, 0, 0);
- AdmitTS(ieee, *ppTS, 0);
- list_add_tail(&((*ppTS)->List), pAddmitList);
-
- return true;
- } else {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "ERR!!in function "
- "%s() There is not enough dir=%d"
- "(0=up down=1) TS record to be "
- "used!!", __func__, Dir);
- return false;
- }
+ Dir = (ieee->iw_mode == IW_MODE_MASTER) ?
+ ((TxRxSelect == TX_DIR) ? DIR_DOWN : DIR_UP) :
+ ((TxRxSelect == TX_DIR) ? DIR_UP : DIR_DOWN);
+
+ RTLLIB_DEBUG(RTLLIB_DL_TS, "to add Ts\n");
+ if (!list_empty(pUnusedList)) {
+ (*ppTS) = list_entry(pUnusedList->next,
+ struct ts_common_info, List);
+ list_del_init(&(*ppTS)->List);
+ if (TxRxSelect == TX_DIR) {
+ struct tx_ts_record *tmp =
+ container_of(*ppTS,
+ struct tx_ts_record,
+ TsCommonInfo);
+ ResetTxTsEntry(tmp);
+ } else {
+ struct rx_ts_record *tmp =
+ container_of(*ppTS,
+ struct rx_ts_record,
+ TsCommonInfo);
+ ResetRxTsEntry(tmp);
}
+
+ RTLLIB_DEBUG(RTLLIB_DL_TS,
+ "to init current TS, UP:%d, Dir:%d, addr: %pM ppTs=%p\n",
+ UP, Dir, Addr, *ppTS);
+ pTSInfo->field.ucTrafficType = 0;
+ pTSInfo->field.ucTSID = UP;
+ pTSInfo->field.ucDirection = Dir;
+ pTSInfo->field.ucAccessPolicy = 1;
+ pTSInfo->field.ucAggregation = 0;
+ pTSInfo->field.ucPSB = 0;
+ pTSInfo->field.ucUP = UP;
+ pTSInfo->field.ucTSInfoAckPolicy = 0;
+ pTSInfo->field.ucSchedule = 0;
+
+ MakeTSEntry(*ppTS, Addr, &TSpec, NULL, 0, 0);
+ AdmitTS(ieee, *ppTS, 0);
+ list_add_tail(&((*ppTS)->List), pAddmitList);
+
+ return true;
}
+
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "ERR!!in function %s() There is not enough dir=%d(0=up down=1) TS record to be used!!",
+ __func__, Dir);
+ return false;
}
static void RemoveTsEntry(struct rtllib_device *ieee, struct ts_common_info *pTs,
pRxReorderEntry = (struct rx_reorder_entry *)
list_entry(pRxTS->RxPendingPktList.prev,
struct rx_reorder_entry, List);
- RTLLIB_DEBUG(RTLLIB_DL_REORDER, "%s(): Delete SeqNum "
- "%d!\n", __func__,
+ RTLLIB_DEBUG(RTLLIB_DL_REORDER,
+ "%s(): Delete SeqNum %d!\n", __func__,
pRxReorderEntry->SeqNum);
list_del_init(&pRxReorderEntry->List);
{
{
struct ts_common_info *pTS, *pTmpTS;
- printk(KERN_INFO "===========>RemovePeerTS, %pM\n", Addr);
+ netdev_info(ieee->dev, "===========>RemovePeerTS, %pM\n", Addr);
list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List) {
if (memcmp(pTS->Addr, Addr, 6) == 0) {
list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Admit_List, List) {
if (memcmp(pTS->Addr, Addr, 6) == 0) {
- printk(KERN_INFO "====>remove Tx_TS_admin_list\n");
+ netdev_info(ieee->dev,
+ "====>remove Tx_TS_admin_list\n");
RemoveTsEntry(ieee, pTS, TX_DIR);
list_del_init(&pTS->List);
list_add_tail(&pTS->List, &ieee->Tx_TS_Unused_List);
pTxTS->bAddBaReqInProgress = true;
if (pTxTS->bAddBaReqDelayed) {
- RTLLIB_DEBUG(RTLLIB_DL_BA, "TsStartAddBaProcess(): "
- "Delayed Start ADDBA after 60 sec!!\n");
+ RTLLIB_DEBUG(RTLLIB_DL_BA,
+ "TsStartAddBaProcess(): Delayed Start ADDBA after 60 sec!!\n");
mod_timer(&pTxTS->TsAddBaTimer, jiffies +
- MSECS(TS_ADDBA_DELAY));
+ msecs_to_jiffies(TS_ADDBA_DELAY));
} else {
- RTLLIB_DEBUG(RTLLIB_DL_BA, "TsStartAddBaProcess(): "
- "Immediately Start ADDBA now!!\n");
+ RTLLIB_DEBUG(RTLLIB_DL_BA,
+ "TsStartAddBaProcess(): Immediately Start ADDBA now!!\n");
mod_timer(&pTxTS->TsAddBaTimer, jiffies+10);
}
} else
#define IW_CUSTOM_MAX 256 /* In bytes */
#endif
-#ifndef container_of
-/**
- * container_of - cast a member of a structure out to the containing structure
- *
- * @ptr: the pointer to the member.
- * @type: the type of the container struct this is embedded in.
- * @member: the name of the member within the struct.
- *
- */
-#define container_of(ptr, type, member) ({ \
- const typeof(((type *)0)->member)*__mptr = (ptr); \
- (type *)((char *)__mptr - offsetof(type, member)); })
-#endif
-
#define skb_tail_pointer_rsl(skb) skb_tail_pointer(skb)
-#define EXPORT_SYMBOL_RSL(x) EXPORT_SYMBOL(x)
-
-
#define queue_delayed_work_rsl(x, y, z) queue_delayed_work(x, y, z)
#define INIT_DELAYED_WORK_RSL(x, y, z) INIT_DELAYED_WORK(x, y)
#define IEEE_CRYPT_ALG_NAME_LEN 16
#define MAX_IE_LEN 0xff
-#define RT_ASSERT_RET(_Exp) do {} while (0)
-#define RT_ASSERT_RET_VALUE(_Exp, Ret) \
- do {} while (0)
struct ieee_param {
u32 cmd;
#define IW_QUAL_NOISE_UPDATED 0x4
#endif
-#define MSECS(t) msecs_to_jiffies(t)
#define msleep_interruptible_rsl msleep_interruptible
#define RTLLIB_DATA_LEN 2304
/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
- 6.2.1.1.2.
-
- The figure in section 7.1.2 suggests a body size of up to 2312
- bytes is allowed, which is a bit confusing, I suspect this
- represents the 2304 bytes of real data, plus a possible 8 bytes of
- WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */
+ * 6.2.1.1.2.
+ *
+ * The figure in section 7.1.2 suggests a body size of up to 2312
+ * bytes is allowed, which is a bit confusing, I suspect this
+ * represents the 2304 bytes of real data, plus a possible 8 bytes of
+ * WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro)
+ */
#define RTLLIB_1ADDR_LEN 10
#define RTLLIB_2ADDR_LEN 16
#define RTLLIB_3ADDR_LEN 24
#define RTLLIB_DEBUG_DATA(level, data, datalen) \
do { \
if ((rtllib_debug_level & (level)) == (level)) { \
- int i; \
- u8 *pdata = (u8 *)data; \
printk(KERN_DEBUG "rtllib: %s()\n", __func__); \
- for (i = 0; i < (int)(datalen); i++) { \
- printk("%2.2x ", pdata[i]); \
- if ((i+1)%16 == 0) \
- printk("\n"); \
- } \
- printk("\n"); \
+ print_hex_dump_bytes(KERN_DEBUG, DUMP_PREFIX_NONE, \
+ data, datalen); \
} \
} while (0)
-/*
- * To use the debug system;
+/* To use the debug system;
*
* If you are defining a new debug classification, simply add it to the #define
* list here in the form of:
* % cat /proc/net/ipw/debug_level
*
* you simply need to add your entry to the ipw_debug_levels array.
- *
- *
*/
#define RTLLIB_DL_INFO (1<<0)
#define RTLLIB_DL_TRACE (1<<29)
#define RTLLIB_DL_DATA (1<<30)
#define RTLLIB_DL_ERR (1<<31)
-#define RTLLIB_ERROR(f, a...) printk(KERN_ERR "rtllib: " f, ## a)
-#define RTLLIB_WARNING(f, a...) printk(KERN_WARNING "rtllib: " f, ## a)
+#define RTLLIB_ERROR(f, a...) pr_err("rtllib: " f, ## a)
+#define RTLLIB_WARNING(f, a...) pr_warn("rtllib: " f, ## a)
#define RTLLIB_DEBUG_INFO(f, a...) RTLLIB_DEBUG(RTLLIB_DL_INFO, f, ## a)
#define RTLLIB_DEBUG_WX(f, a...) RTLLIB_DEBUG(RTLLIB_DL_WX, f, ## a)
#define RTLLIB_DEBUG_RX(f, a...) RTLLIB_DEBUG(RTLLIB_DL_RX, f, ## a)
#define RTLLIB_DEBUG_QOS(f, a...) RTLLIB_DEBUG(RTLLIB_DL_QOS, f, ## a)
-/* Added by Annie, 2005-11-22. */
-#define MAX_STR_LEN 64
-/* I want to see ASCII 33 to 126 only. Otherwise, I print '?'. */
-#define PRINTABLE(_ch) (_ch > '!' && _ch < '~')
-#define RTLLIB_PRINT_STR(_Comp, _TitleString, _Ptr, _Len) \
- if ((_Comp) & level) { \
- int __i; \
- u8 struct buffer[MAX_STR_LEN]; \
- int length = (_Len < MAX_STR_LEN) ? _Len : (MAX_STR_LEN-1) ;\
- memset(struct buffer, 0, MAX_STR_LEN); \
- memcpy(struct buffer, (u8 *)_Ptr, length); \
- for (__i = 0; __i < MAX_STR_LEN; __i++) { \
- if (!PRINTABLE(struct buffer[__i])) \
- struct buffer[__i] = '?'; \
- } \
- struct buffer[length] = '\0'; \
- printk(KERN_INFO "Rtl819x: "); \
- printk(_TitleString); \
- printk(": %d, <%s>\n", _Len, struct buffer); \
- }
#ifndef ETH_P_PAE
#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
#define ETH_P_IP 0x0800 /* Internet Protocol packet */
/* IEEE 802.11 requires that STA supports concurrent reception of at least
* three fragmented frames. This define can be increased to support more
* concurrent frames, but it should be noted that each entry can consume about
- * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
+ * 2 kB of RAM and increasing cache size will slow down frame reassembly.
+ */
#define RTLLIB_FRAG_CACHE_LEN 4
struct rtllib_frag_entry {
} __packed;
-/*
- 802.11 data frame from AP
- ,-------------------------------------------------------------------.
-Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 |
- |------|------|---------|---------|---------|------|---------|------|
-Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs |
- | | tion | (BSSID) | | | ence | data | |
- `-------------------------------------------------------------------'
-Total: 28-2340 bytes
-*/
+/* 802.11 data frame from AP
+ * ,-------------------------------------------------------------------.
+ * Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 |
+ * |------|------|---------|---------|---------|------|---------|------|
+ * Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs |
+ * | | tion | (BSSID) | | | ence | data | |
+ * `-------------------------------------------------------------------'
+ * Total: 28-2340 bytes
+ */
/* Management Frame Information Element Types */
enum rtllib_mfie {
/* Minimal header; can be used for passing 802.11 frames with sufficient
* information to determine what type of underlying data type is actually
- * stored in the data. */
+ * stored in the data.
+ */
struct rtllib_pspoll_hdr {
__le16 frame_ctl;
__le16 aid;
__le16 beacon_interval;
__le16 capability;
/* SSID, supported rates, FH params, DS params,
- * CF params, IBSS params, TIM (if beacon), RSN */
+ * CF params, IBSS params, TIM (if beacon), RSN
+ */
struct rtllib_info_element info_element[0];
} __packed;
/* MAX_RATES_LENGTH needs to be 12. The spec says 8, and many APs
* only use 8, and then use extended rates for the remaining supported
* rates. Other APs, however, stick all of their supported rates on the
- * main rates information element... */
+ * main rates information element...
+ */
#define MAX_RATES_LENGTH ((u8)12)
#define MAX_RATES_EX_LENGTH ((u8)16)
#define MAX_NETWORK_COUNT 96
u8 len;
} __packed;
-/*
- * These are the data types that can make up management packets
+/* These are the data types that can make up management packets
*
- u16 auth_algorithm;
- u16 auth_sequence;
- u16 beacon_interval;
- u16 capability;
- u8 current_ap[ETH_ALEN];
- u16 listen_interval;
- struct {
- u16 association_id:14, reserved:2;
- } __packed;
- u32 time_stamp[2];
- u16 reason;
- u16 status;
-*/
+ * u16 auth_algorithm;
+ * u16 auth_sequence;
+ * u16 beacon_interval;
+ * u16 capability;
+ * u8 current_ap[ETH_ALEN];
+ * u16 listen_interval;
+ * struct {
+ * u16 association_id:14, reserved:2;
+ * } __packed;
+ * u32 time_stamp[2];
+ * u16 reason;
+ * u16 status;
+ */
#define RTLLIB_DEFAULT_TX_ESSID "Penguin"
#define RTLLIB_DEFAULT_BASIC_RATE 2
struct list_head list;
};
-#if 1
enum rtllib_state {
/* the card is not linked at all */
*/
RTLLIB_LINKED_SCANNING,
};
-#else
-enum rtllib_state {
- RTLLIB_UNINITIALIZED = 0,
- RTLLIB_INITIALIZED,
- RTLLIB_ASSOCIATING,
- RTLLIB_ASSOCIATED,
- RTLLIB_AUTHENTICATING,
- RTLLIB_AUTHENTICATED,
- RTLLIB_SHUTDOWN
-};
-#endif
#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
#define DEFAULT_FTS 2346
#define RTLLIB_52GHZ_MAX_CHANNEL 165
#define RTLLIB_52GHZ_CHANNELS (RTLLIB_52GHZ_MAX_CHANNEL - \
RTLLIB_52GHZ_MIN_CHANNEL + 1)
-#ifndef eqMacAddr
-#define eqMacAddr(a, b) \
- (((a)[0] == (b)[0] && (a)[1] == (b)[1] && (a)[2] == (b)[2] && \
- (a)[3] == (b)[3] && (a)[4] == (b)[4] && (a)[5] == (b)[5]) ? 1 : 0)
-#endif
struct tx_pending {
int frag;
struct rtllib_txb *txb;
spinlock_t wpax_suitlist_lock;
int tx_headroom; /* Set to size of any additional room needed at front
- * of allocated Tx SKBs */
+ * of allocated Tx SKBs
+ */
u32 config;
/* WEP and other encryption related settings at the device level */
int open_wep; /* Set to 1 to allow unencrypted frames */
int auth_mode;
int reset_on_keychange; /* Set to 1 if the HW needs to be reset on
- * WEP key changes */
+ * WEP key changes
+ */
/* If the host performs {en,de}cryption, then set to 1 */
int host_encrypt;
short raw_tx;
/* used if IEEE_SOFTMAC_TX_QUEUE is set */
short queue_stop;
- short scanning_continue ;
+ short scanning_continue;
short proto_started;
short proto_stoppping;
/* OK this is complementing to data_poll_hard_stop */
void (*data_hard_resume)(struct net_device *dev);
- /* ask to the driver to retune the radio .
+ /* ask to the driver to retune the radio.
* This function can sleep. the driver should ensure
* the radio has been switched before return.
*/
void (*rtllib_rfkill_poll)(struct net_device *dev);
/* This must be the last item so that it points to the data
- * allocated beyond this structure by alloc_rtllib */
+ * allocated beyond this structure by alloc_rtllib
+ */
u8 priv[0];
};
/* The ieee802.11 stack will manage the netif queue
* wake/stop for the driver, taking care of 802.11
- * fragmentation. See softmac.c for details. */
+ * fragmentation. See softmac.c for details.
+ */
#define IEEE_SOFTMAC_TX_QUEUE (1<<7)
/* Uses only the softmac_data_hard_start_xmit
static inline int rtllib_is_valid_mode(struct rtllib_device *ieee, int mode)
{
- /*
- * It is possible for both access points and our device to support
+ /* It is possible for both access points and our device to support
* combinations of modes, so as long as there is one valid combination
* of ap/device supported modes, then return success
- *
*/
if ((mode & IEEE_A) &&
(ieee->modulation & RTLLIB_OFDM_MODULATION) &&
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
#define MAX_RECEIVE_BUFFER_SIZE 9100
-extern void HTDebugHTCapability(u8 *CapIE, u8 *TitleString);
-extern void HTDebugHTInfo(u8 *InfoIE, u8 *TitleString);
void HTSetConnectBwMode(struct rtllib_device *ieee,
enum ht_channel_width Bandwidth,
extern u8 HTGetHighestMCSRate(struct rtllib_device *ieee, u8 *pMCSRateSet,
u8 *pMCSFilter);
extern u8 MCS_FILTER_ALL[];
-extern u16 MCS_DATA_RATE[2][2][77] ;
+extern u16 MCS_DATA_RATE[2][2][77];
extern u8 HTCCheck(struct rtllib_device *ieee, u8 *pFrame);
extern void HTResetIOTSetting(struct rt_hi_throughput *pHTInfo);
extern bool IsHTHalfNmodeAPs(struct rtllib_device *ieee);
-extern u16 HTHalfMcsToDataRate(struct rtllib_device *ieee, u8 nMcsRate);
extern u16 HTMcsToDataRate(struct rtllib_device *ieee, u8 nMcsRate);
extern u16 TxCountToDataRate(struct rtllib_device *ieee, u8 nDataRate);
extern int rtllib_rx_ADDBAReq(struct rtllib_device *ieee, struct sk_buff *skb);
spin_lock_irqsave(info->lock, flags);
rtllib_crypt_deinit_entries(info, 0);
if (!list_empty(&info->crypt_deinit_list)) {
- printk(KERN_DEBUG "%s: entries remaining in delayed crypt "
- "deletion list\n", info->name);
+ printk(KERN_DEBUG
+ "%s: entries remaining in delayed crypt deletion list\n",
+ info->name);
info->crypt_deinit_timer.expires = jiffies + HZ;
add_timer(&info->crypt_deinit_timer);
}
/* must not run ops->deinit() while there may be pending encrypt or
* decrypt operations. Use a list of delayed deinits to avoid needing
- * locking. */
+ * locking.
+ */
spin_lock_irqsave(info->lock, flags);
list_add(&tmp->list, &info->crypt_deinit_list);
spin_unlock_irqrestore(&hcrypt->lock, flags);
if (del_alg) {
- printk(KERN_DEBUG "rtllib_crypt: unregistered algorithm "
- "'%s'\n", ops->name);
+ printk(KERN_DEBUG "rtllib_crypt: unregistered algorithm '%s'\n",
+ ops->name);
kfree(del_alg);
}
struct rtllib_crypto_alg *alg =
(struct rtllib_crypto_alg *) ptr;
list_del(ptr);
- printk(KERN_DEBUG "rtllib_crypt: unregistered algorithm "
- "'%s' (deinit)\n", alg->ops->name);
+ printk(KERN_DEBUG
+ "rtllib_crypt: unregistered algorithm '%s' (deinit)\n",
+ alg->ops->name);
kfree(alg);
}
* more details.
*/
-/*
- * This file defines the interface to the rtllib crypto module.
+/* This file defines the interface to the rtllib crypto module.
*/
#ifndef RTLLIB_CRYPT_H
#define RTLLIB_CRYPT_H
priv->tfm = (void *)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->tfm)) {
- pr_debug("rtllib_crypt_ccmp: could not allocate "
- "crypto API aes\n");
+ pr_debug("rtllib_crypt_ccmp: could not allocate crypto API aes\n");
priv->tfm = NULL;
goto fail;
}
fc = le16_to_cpu(hdr->frame_ctl);
a4_included = ((fc & (RTLLIB_FCTL_TODS | RTLLIB_FCTL_FROMDS)) ==
(RTLLIB_FCTL_TODS | RTLLIB_FCTL_FROMDS));
- /*
- qc_included = ((WLAN_FC_GET_TYPE(fc) == RTLLIB_FTYPE_DATA) &&
- (WLAN_FC_GET_STYPE(fc) & 0x08));
- */
+
qc_included = ((WLAN_FC_GET_TYPE(fc) == RTLLIB_FTYPE_DATA) &&
(WLAN_FC_GET_STYPE(fc) & 0x80));
aad_len = 22;
* Flag (Include authentication header, M=3 (8-octet MIC),
* L=1 (2-octet Dlen))
* Nonce: 0x00 | A2 | PN
- * Dlen */
+ * Dlen
+ */
b0[0] = 0x59;
b0[1] = qc;
memcpy(b0 + 2, hdr->addr2, ETH_ALEN);
keyidx = pos[3];
if (!(keyidx & (1 << 5))) {
if (net_ratelimit()) {
- pr_debug("CCMP: received packet without ExtIV"
- " flag from %pM\n", hdr->addr2);
+ pr_debug("CCMP: received packet without ExtIV flag from %pM\n",
+ hdr->addr2);
}
key->dot11RSNAStatsCCMPFormatErrors++;
return -2;
}
keyidx >>= 6;
if (key->key_idx != keyidx) {
- pr_debug("CCMP: RX tkey->key_idx=%d frame "
- "keyidx=%d priv=%p\n", key->key_idx, keyidx, priv);
+ pr_debug("CCMP: RX tkey->key_idx=%d frame keyidx=%d priv=%p\n",
+ key->key_idx, keyidx, priv);
return -6;
}
if (!key->key_set) {
if (net_ratelimit()) {
- pr_debug("CCMP: received packet from %pM"
- " with keyid=%d that does not have a configured"
- " key\n", hdr->addr2, keyidx);
+ pr_debug("CCMP: received packet from %pM with keyid=%d that does not have a configured key\n",
+ hdr->addr2, keyidx);
}
return -3;
}
if (memcmp(mic, a, CCMP_MIC_LEN) != 0) {
if (net_ratelimit()) {
- pr_debug("CCMP: decrypt failed: STA="
- " %pM\n", hdr->addr2);
+ pr_debug("CCMP: decrypt failed: STA= %pM\n",
+ hdr->addr2);
}
key->dot11RSNAStatsCCMPDecryptErrors++;
return -5;
struct rtllib_ccmp_data *ccmp = priv;
seq_printf(m,
- "key[%d] alg=CCMP key_set=%d "
- "tx_pn=%pM rx_pn=%pM "
- "format_errors=%d replays=%d decrypt_errors=%d\n",
+ "key[%d] alg=CCMP key_set=%d tx_pn=%pM rx_pn=%pM format_errors=%d replays=%d decrypt_errors=%d\n",
ccmp->key_idx, ccmp->key_set,
ccmp->tx_pn, ccmp->rx_pn,
ccmp->dot11RSNAStatsCCMPFormatErrors,
priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->tx_tfm_arc4)) {
- printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
- "crypto API arc4\n");
+ printk(KERN_DEBUG
+ "rtllib_crypt_tkip: could not allocate crypto API arc4\n");
priv->tx_tfm_arc4 = NULL;
goto fail;
}
priv->tx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->tx_tfm_michael)) {
- printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
- "crypto API michael_mic\n");
+ printk(KERN_DEBUG
+ "rtllib_crypt_tkip: could not allocate crypto API michael_mic\n");
priv->tx_tfm_michael = NULL;
goto fail;
}
priv->rx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->rx_tfm_arc4)) {
- printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
- "crypto API arc4\n");
+ printk(KERN_DEBUG
+ "rtllib_crypt_tkip: could not allocate crypto API arc4\n");
priv->rx_tfm_arc4 = NULL;
goto fail;
}
priv->rx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->rx_tfm_michael)) {
- printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
- "crypto API michael_mic\n");
+ printk(KERN_DEBUG
+ "rtllib_crypt_tkip: could not allocate crypto API michael_mic\n");
priv->rx_tfm_michael = NULL;
goto fail;
}
u16 IV16)
{
/* Make temporary area overlap WEP seed so that the final copy can be
- * avoided on little endian hosts. */
+ * avoided on little endian hosts.
+ */
u16 *PPK = (u16 *) &WEPSeed[4];
/* Step 1 - make copy of TTAK and bring in TSC */
PPK[5] += RotR1(PPK[4]);
/* Step 3 - bring in last of TK bits, assign 24-bit WEP IV value
- * WEPSeed[0..2] is transmitted as WEP IV */
+ * WEPSeed[0..2] is transmitted as WEP IV
+ */
WEPSeed[0] = Hi8(IV16);
WEPSeed[1] = (Hi8(IV16) | 0x20) & 0x7F;
WEPSeed[2] = Lo8(IV16);
keyidx = pos[3];
if (!(keyidx & (1 << 5))) {
if (net_ratelimit()) {
- printk(KERN_DEBUG "TKIP: received packet without ExtIV"
- " flag from %pM\n", hdr->addr2);
+ printk(KERN_DEBUG
+ "TKIP: received packet without ExtIV flag from %pM\n",
+ hdr->addr2);
}
return -2;
}
keyidx >>= 6;
if (tkey->key_idx != keyidx) {
- printk(KERN_DEBUG "TKIP: RX tkey->key_idx=%d frame "
- "keyidx=%d priv=%p\n", tkey->key_idx, keyidx, priv);
+ printk(KERN_DEBUG
+ "TKIP: RX tkey->key_idx=%d frame keyidx=%d priv=%p\n",
+ tkey->key_idx, keyidx, priv);
return -6;
}
if (!tkey->key_set) {
if (net_ratelimit()) {
- printk(KERN_DEBUG "TKIP: received packet from %pM"
- " with keyid=%d that does not have a configured"
- " key\n", hdr->addr2, keyidx);
+ printk(KERN_DEBUG
+ "TKIP: received packet from %pM with keyid=%d that does not have a configured key\n",
+ hdr->addr2, keyidx);
}
return -3;
}
(iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) &&
tkey->initialized) {
if (net_ratelimit()) {
- printk(KERN_DEBUG "TKIP: replay detected: STA="
- " %pM previous TSC %08x%04x received "
- "TSC %08x%04x\n", hdr->addr2,
- tkey->rx_iv32, tkey->rx_iv16, iv32, iv16);
+ printk(KERN_DEBUG
+ "TKIP: replay detected: STA= %pM previous TSC %08x%04x received TSC %08x%04x\n",
+ hdr->addr2, tkey->rx_iv32, tkey->rx_iv16,
+ iv32, iv16);
}
tkey->dot11RSNAStatsTKIPReplays++;
return -4;
crypto_blkcipher_setkey(tkey->rx_tfm_arc4, rc4key, 16);
if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) {
if (net_ratelimit()) {
- printk(KERN_DEBUG ": TKIP: failed to decrypt "
- "received packet from %pM\n",
+ printk(KERN_DEBUG
+ ": TKIP: failed to decrypt received packet from %pM\n",
hdr->addr2);
}
return -7;
if (iv32 != tkey->rx_iv32) {
/* Previously cached Phase1 result was already
* lost, so it needs to be recalculated for the
- * next packet. */
+ * next packet.
+ */
tkey->rx_phase1_done = 0;
}
if (net_ratelimit()) {
- printk(KERN_DEBUG "TKIP: ICV error detected: STA="
- " %pM\n", hdr->addr2);
+ printk(KERN_DEBUG
+ "TKIP: ICV error detected: STA= %pM\n",
+ hdr->addr2);
}
tkey->dot11RSNAStatsTKIPICVErrors++;
return -5;
}
/* Update real counters only after Michael MIC verification has
- * completed */
+ * completed
+ */
tkey->rx_iv32_new = iv32;
tkey->rx_iv16_new = iv16;
struct scatterlist sg[2];
if (tfm_michael == NULL) {
- printk(KERN_WARNING "michael_mic: tfm_michael == NULL\n");
+ pr_warn("michael_mic: tfm_michael == NULL\n");
return -1;
}
sg_init_table(sg, 2);
hdr = (struct rtllib_hdr_4addr *) skb->data;
if (skb_tailroom(skb) < 8 || skb->len < hdr_len) {
- printk(KERN_DEBUG "Invalid packet for Michael MIC add "
- "(tailroom=%d hdr_len=%d skb->len=%d)\n",
+ printk(KERN_DEBUG
+ "Invalid packet for Michael MIC add (tailroom=%d hdr_len=%d skb->len=%d)\n",
skb_tailroom(skb), hdr_len, skb->len);
return -1;
}
struct rtllib_hdr_4addr *hdr;
hdr = (struct rtllib_hdr_4addr *) skb->data;
- printk(KERN_DEBUG "%s: Michael MIC verification failed for "
- "MSDU from %pM keyidx=%d\n",
+ printk(KERN_DEBUG
+ "%s: Michael MIC verification failed for MSDU from %pM keyidx=%d\n",
skb->dev ? skb->dev->name : "N/A", hdr->addr2,
keyidx);
printk(KERN_DEBUG "%d\n",
memcmp(mic, skb->data + skb->len - 8, 8) != 0);
if (skb->dev) {
- printk(KERN_INFO "skb->dev != NULL\n");
+ pr_info("skb->dev != NULL\n");
rtllib_michael_mic_failure(skb->dev, hdr, keyidx);
}
tkey->dot11RSNAStatsTKIPLocalMICFailures++;
}
/* Update TSC counters for RX now that the packet verification has
- * completed. */
+ * completed.
+ */
tkey->rx_iv32 = tkey->rx_iv32_new;
tkey->rx_iv16 = tkey->rx_iv16_new;
struct rtllib_tkip_data *tkip = priv;
seq_printf(m,
- "key[%d] alg=TKIP key_set=%d "
- "tx_pn=%02x%02x%02x%02x%02x%02x "
- "rx_pn=%02x%02x%02x%02x%02x%02x "
- "replays=%d icv_errors=%d local_mic_failures=%d\n",
+ "key[%d] alg=TKIP key_set=%d tx_pn=%02x%02x%02x%02x%02x%02x rx_pn=%02x%02x%02x%02x%02x%02x replays=%d icv_errors=%d local_mic_failures=%d\n",
tkip->key_idx, tkip->key_set,
(tkip->tx_iv32 >> 24) & 0xff,
(tkip->tx_iv32 >> 16) & 0xff,
priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->tx_tfm)) {
- pr_debug("rtllib_crypt_wep: could not allocate "
- "crypto API arc4\n");
+ pr_debug("rtllib_crypt_wep: could not allocate crypto API arc4\n");
priv->tx_tfm = NULL;
goto fail;
}
priv->rx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->rx_tfm)) {
- pr_debug("rtllib_crypt_wep: could not allocate "
- "crypto API arc4\n");
+ pr_debug("rtllib_crypt_wep: could not allocate crypto API arc4\n");
priv->rx_tfm = NULL;
goto fail;
}
if (skb_headroom(skb) < 4 || skb_tailroom(skb) < 4 ||
skb->len < hdr_len){
- printk(KERN_ERR "Error!!! headroom=%d tailroom=%d skblen=%d"
- " hdr_len=%d\n", skb_headroom(skb), skb_tailroom(skb),
- skb->len, hdr_len);
+ pr_err("Error!!! headroom=%d tailroom=%d skblen=%d hdr_len=%d\n",
+ skb_headroom(skb), skb_tailroom(skb), skb->len, hdr_len);
return -1;
}
len = skb->len - hdr_len;
/* Fluhrer, Mantin, and Shamir have reported weaknesses in the key
* scheduling algorithm of RC4. At least IVs (KeyByte + 3, 0xff, N)
- * can be used to speedup attacks, so avoid using them. */
+ * can be used to speedup attacks, so avoid using them.
+ */
if ((wep->iv & 0xff00) == 0xff00) {
u8 B = (wep->iv >> 16) & 0xff;
#define assert(expr) \
do { \
if (!(expr)) { \
- printk(KERN_INFO "Assertion failed! %s,%s,%s,line=%d\n", \
+ pr_info("Assertion failed! %s,%s,%s,line=%d\n", \
#expr, __FILE__, __func__, __LINE__); \
} \
-} while (0);
+} while (0)
#endif
+++ /dev/null
-#ifndef __INC_ENDIANFREE_H
-#define __INC_ENDIANFREE_H
-
-/*
- * Call endian free function when
- * 1. Read/write packet content.
- * 2. Before write integer to IO.
- * 3. After read integer from IO.
- */
-
-#define __MACHINE_LITTLE_ENDIAN 1234 /* LSB first: i386, vax */
-#define __MACHINE_BIG_ENDIAN 4321 /* MSB first: 68000, ibm, net, ppc */
-
-#define BYTE_ORDER __MACHINE_LITTLE_ENDIAN
-
-#if BYTE_ORDER == __MACHINE_LITTLE_ENDIAN
-#define EF1Byte(_val) ((u8)(_val))
-#define EF2Byte(_val) ((u16)(_val))
-#define EF4Byte(_val) ((u32)(_val))
-
-#else
-#define EF1Byte(_val) ((u8)(_val))
-#define EF2Byte(_val) \
- (((((u16)(_val))&0x00ff)<<8)|((((u16)(_val))&0xff00)>>8))
-#define EF4Byte(_val) \
- (((((u32)(_val))&0x000000ff)<<24)|\
- ((((u32)(_val))&0x0000ff00)<<8)|\
- ((((u32)(_val))&0x00ff0000)>>8)|\
- ((((u32)(_val))&0xff000000)>>24))
-#endif
-
-#define ReadEF1Byte(_ptr) EF1Byte(*((u8 *)(_ptr)))
-#define ReadEF2Byte(_ptr) EF2Byte(*((u16 *)(_ptr)))
-#define ReadEF4Byte(_ptr) EF4Byte(*((u32 *)(_ptr)))
-
-#define WriteEF1Byte(_ptr, _val) ((*((u8 *)(_ptr))) = EF1Byte(_val))
-#define WriteEF2Byte(_ptr, _val) ((*((u16 *)(_ptr))) = EF2Byte(_val))
-#define WriteEF4Byte(_ptr, _val) ((*((u32 *)(_ptr))) = EF4Byte(_val))
-#if BYTE_ORDER == __MACHINE_LITTLE_ENDIAN
-#define H2N1BYTE(_val) ((u8)(_val))
-#define H2N2BYTE(_val) (((((u16)(_val))&0x00ff)<<8)|\
- ((((u16)(_val))&0xff00)>>8))
-#define H2N4BYTE(_val) (((((u32)(_val))&0x000000ff)<<24)|\
- ((((u32)(_val))&0x0000ff00)<<8) |\
- ((((u32)(_val))&0x00ff0000)>>8) |\
- ((((u32)(_val))&0xff000000)>>24))
-#else
-#define H2N1BYTE(_val) ((u8)(_val))
-#define H2N2BYTE(_val) ((u16)(_val))
-#define H2N4BYTE(_val) ((u32)(_val))
-#endif
-
-#if BYTE_ORDER == __MACHINE_LITTLE_ENDIAN
-#define N2H1BYTE(_val) ((u8)(_val))
-#define N2H2BYTE(_val) (((((u16)(_val))&0x00ff)<<8)|\
- ((((u16)(_val))&0xff00)>>8))
-#define N2H4BYTE(_val) (((((u32)(_val))&0x000000ff)<<24)|\
- ((((u32)(_val))&0x0000ff00)<<8) |\
- ((((u32)(_val))&0x00ff0000)>>8) |\
- ((((u32)(_val))&0xff000000)>>24))
-#else
-#define N2H1BYTE(_val) ((u8)(_val))
-#define N2H2BYTE(_val) ((u16)(_val))
-#define N2H4BYTE(_val) ((u32)(_val))
-#endif
-
-#define BIT_LEN_MASK_32(__BitLen) (0xFFFFFFFF >> (32 - (__BitLen)))
-#define BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) \
- (BIT_LEN_MASK_32(__BitLen) << (__BitOffset))
-
-#define LE_P4BYTE_TO_HOST_4BYTE(__pStart) (EF4Byte(*((u32 *)(__pStart))))
-
-#define LE_BITS_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
- ( \
- (LE_P4BYTE_TO_HOST_4BYTE(__pStart) >> (__BitOffset)) \
- & \
- BIT_LEN_MASK_32(__BitLen) \
- )
-
-#define LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
- ( \
- LE_P4BYTE_TO_HOST_4BYTE(__pStart) \
- & \
- (~BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen)) \
- )
-
-#define BIT_LEN_MASK_16(__BitLen) \
- (0xFFFF >> (16 - (__BitLen)))
-
-#define BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) \
- (BIT_LEN_MASK_16(__BitLen) << (__BitOffset))
-
-#define LE_P2BYTE_TO_HOST_2BYTE(__pStart) \
- (EF2Byte(*((u16 *)(__pStart))))
-
-#define LE_BITS_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
- ( \
- (LE_P2BYTE_TO_HOST_2BYTE(__pStart) >> (__BitOffset)) \
- & \
- BIT_LEN_MASK_16(__BitLen) \
- )
-
-#define BIT_LEN_MASK_8(__BitLen) \
- (0xFF >> (8 - (__BitLen)))
-
-#define BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) \
- (BIT_LEN_MASK_8(__BitLen) << (__BitOffset))
-
-#define LE_P1BYTE_TO_HOST_1BYTE(__pStart) \
- (EF1Byte(*((u8 *)(__pStart))))
-
-#define LE_BITS_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
- ( \
- (LE_P1BYTE_TO_HOST_1BYTE(__pStart) >> (__BitOffset)) \
- & \
- BIT_LEN_MASK_8(__BitLen) \
- )
-
-#define N_BYTE_ALIGMENT(__Value, __Aligment) \
- ((__Aligment == 1) ? (__Value) : (((__Value + __Aligment - 1) / \
- __Aligment) * __Aligment))
-#endif
ieee->networks = kzalloc(
MAX_NETWORK_COUNT * sizeof(struct rtllib_network),
GFP_KERNEL);
- if (!ieee->networks) {
- printk(KERN_WARNING "%s: Out of memory allocating beacons\n",
- ieee->dev->name);
+ if (!ieee->networks)
return -ENOMEM;
- }
return 0;
}
rtllib_softmac_init(ieee);
ieee->pHTInfo = kzalloc(sizeof(struct rt_hi_throughput), GFP_KERNEL);
- if (ieee->pHTInfo == NULL) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't alloc memory for HTInfo\n");
+ if (ieee->pHTInfo == NULL)
return NULL;
- }
+
HTUpdateDefaultSetting(ieee);
HTInitializeHTInfo(ieee);
TSInitialize(ieee);
static int show_debug_level(struct seq_file *m, void *v)
{
- return seq_printf(m, "0x%08X\n", rtllib_debug_level);
+ seq_printf(m, "0x%08X\n", rtllib_debug_level);
+
+ return 0;
}
static ssize_t write_debug_level(struct file *file, const char __user *buffer,
memcpy(entry->dst_addr, hdr->addr1, ETH_ALEN);
} else {
/* received a fragment of a frame for which the head fragment
- * should have already been received */
+ * should have already been received
+ */
entry = rtllib_frag_cache_find(ieee, seq, frag, tid, hdr->addr2,
hdr->addr1);
if (entry != NULL) {
*
* Responsible for handling management control frames
*
- * Called by rtllib_rx */
+ * Called by rtllib_rx
+ */
static inline int
rtllib_rx_frame_mgmt(struct rtllib_device *ieee, struct sk_buff *skb,
struct rtllib_rx_stats *rx_stats, u16 type,
return 0;
}
-/* See IEEE 802.1H for LLC/SNAP encapsulation/decapsulation */
-/* Ethernet-II snap header (RFC1042 for most EtherTypes) */
+/* See IEEE 802.1H for LLC/SNAP encapsulation/decapsulation
+ * Ethernet-II snap header (RFC1042 for most EtherTypes)
+ */
static unsigned char rfc1042_header[] = {
0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00
};
}
if (p == &ieee->ibss_mac_hash[index]) {
entry = kmalloc(sizeof(struct ieee_ibss_seq), GFP_ATOMIC);
- if (!entry) {
- printk(KERN_WARNING "Cannot malloc new mac entry\n");
+ if (!entry)
return 0;
- }
+
memcpy(entry->mac, mac, ETH_ALEN);
entry->seq_num[tid] = seq;
entry->frag_num[tid] = frag;
ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
memcmp(sub_skb->data, bridge_tunnel_header, SNAP_SIZE) == 0)) {
/* remove RFC1042 or Bridge-Tunnel encapsulation
- * and replace EtherType */
+ * and replace EtherType
+ */
skb_pull(sub_skb, SNAP_SIZE);
memcpy(skb_push(sub_skb, ETH_ALEN), prxb->src, ETH_ALEN);
memcpy(skb_push(sub_skb, ETH_ALEN), prxb->dst, ETH_ALEN);
del_timer_sync(&pTS->RxPktPendingTimer);
while (!list_empty(&pTS->RxPendingPktList)) {
if (RfdCnt >= REORDER_WIN_SIZE) {
- printk(KERN_INFO "-------------->%s() error! RfdCnt >= REORDER_WIN_SIZE\n", __func__);
+ netdev_info(ieee->dev,
+ "-------------->%s() error! RfdCnt >= REORDER_WIN_SIZE\n",
+ __func__);
break;
}
return;
}
- /*
- * Sliding window manipulation. Conditions includes:
+ /* Sliding window manipulation. Conditions includes:
* 1. Incoming SeqNum is equal to WinStart =>Window shift 1
* 2. Incoming SeqNum is larger than the WinEnd => Window shift N
*/
RTLLIB_DEBUG(RTLLIB_DL_REORDER, "Window Shift! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, SeqNum);
}
- /*
- * Indication process.
+ /* Indication process.
* After Packet dropping and Sliding Window shifting as above, we can
* now just indicate the packets with the SeqNum smaller than latest
* WinStart and struct buffer other packets.
- */
- /* For Rx Reorder condition:
+ *
+ * For Rx Reorder condition:
* 1. All packets with SeqNum smaller than WinStart => Indicate
* 2. All packets with SeqNum larger than or equal to
* WinStart => Buffer it.
pTS->RxIndicateSeq, SeqNum);
}
} else {
- /*
- * Packets are dropped if there are not enough reorder
+ /* Packets are dropped if there are not enough reorder
* entries. This part should be modified!! We can just
* indicate all the packets in struct buffer and get
* reorder entries.
}
/* Handling pending timer. Set this timer to prevent from long time
- * Rx buffering.*/
+ * Rx buffering.
+ */
if (index > 0) {
if (timer_pending(&pTS->RxPktPendingTimer))
del_timer_sync(&pTS->RxPktPendingTimer);
__func__);
pTS->RxTimeoutIndicateSeq = pTS->RxIndicateSeq;
mod_timer(&pTS->RxPktPendingTimer, jiffies +
- MSECS(pHTInfo->RxReorderPendingTime));
+ msecs_to_jiffies(pHTInfo->RxReorderPendingTime));
}
spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
}
memcpy(rxb->dst, dst, ETH_ALEN);
rxb->subframes[0]->dev = ieee->dev;
return 1;
- } else {
- rxb->nr_subframes = 0;
- memcpy(rxb->src, src, ETH_ALEN);
- memcpy(rxb->dst, dst, ETH_ALEN);
- while (skb->len > ETHERNET_HEADER_SIZE) {
- /* Offset 12 denote 2 mac address */
- nSubframe_Length = *((u16 *)(skb->data + 12));
- nSubframe_Length = (nSubframe_Length >> 8) +
- (nSubframe_Length << 8);
-
- if (skb->len < (ETHERNET_HEADER_SIZE + nSubframe_Length)) {
- printk(KERN_INFO "%s: A-MSDU parse error!! pRfd->nTotalSubframe : %d\n",\
- __func__, rxb->nr_subframes);
- printk(KERN_INFO "%s: A-MSDU parse error!! Subframe Length: %d\n", __func__,
- nSubframe_Length);
- printk(KERN_INFO "nRemain_Length is %d and nSubframe_Length is : %d\n", skb->len,
- nSubframe_Length);
- printk(KERN_INFO "The Packet SeqNum is %d\n", SeqNum);
- return 0;
- }
+ }
- /* move the data point to data content */
- skb_pull(skb, ETHERNET_HEADER_SIZE);
+ rxb->nr_subframes = 0;
+ memcpy(rxb->src, src, ETH_ALEN);
+ memcpy(rxb->dst, dst, ETH_ALEN);
+ while (skb->len > ETHERNET_HEADER_SIZE) {
+ /* Offset 12 denote 2 mac address */
+ nSubframe_Length = *((u16 *)(skb->data + 12));
+ nSubframe_Length = (nSubframe_Length >> 8) +
+ (nSubframe_Length << 8);
+
+ if (skb->len < (ETHERNET_HEADER_SIZE + nSubframe_Length)) {
+ netdev_info(ieee->dev,
+ "%s: A-MSDU parse error!! pRfd->nTotalSubframe : %d\n",
+ __func__, rxb->nr_subframes);
+ netdev_info(ieee->dev,
+ "%s: A-MSDU parse error!! Subframe Length: %d\n",
+ __func__, nSubframe_Length);
+ netdev_info(ieee->dev,
+ "nRemain_Length is %d and nSubframe_Length is : %d\n",
+ skb->len, nSubframe_Length);
+ netdev_info(ieee->dev,
+ "The Packet SeqNum is %d\n",
+ SeqNum);
+ return 0;
+ }
- /* altered by clark 3/30/2010
- * The struct buffer size of the skb indicated to upper layer
- * must be less than 5000, or the defraged IP datagram
- * in the IP layer will exceed "ipfrag_high_tresh" and be
- * discarded. so there must not use the function
- * "skb_copy" and "skb_clone" for "skb".
- */
+ /* move the data point to data content */
+ skb_pull(skb, ETHERNET_HEADER_SIZE);
- /* Allocate new skb for releasing to upper layer */
- sub_skb = dev_alloc_skb(nSubframe_Length + 12);
- if (!sub_skb)
- return 0;
- skb_reserve(sub_skb, 12);
- data_ptr = (u8 *)skb_put(sub_skb, nSubframe_Length);
- memcpy(data_ptr, skb->data, nSubframe_Length);
-
- sub_skb->dev = ieee->dev;
- rxb->subframes[rxb->nr_subframes++] = sub_skb;
- if (rxb->nr_subframes >= MAX_SUBFRAME_COUNT) {
- RTLLIB_DEBUG_RX("ParseSubframe(): Too many Subframes! Packets dropped!\n");
- break;
- }
- skb_pull(skb, nSubframe_Length);
-
- if (skb->len != 0) {
- nPadding_Length = 4 - ((nSubframe_Length +
- ETHERNET_HEADER_SIZE) % 4);
- if (nPadding_Length == 4)
- nPadding_Length = 0;
+ /* altered by clark 3/30/2010
+ * The struct buffer size of the skb indicated to upper layer
+ * must be less than 5000, or the defraged IP datagram
+ * in the IP layer will exceed "ipfrag_high_tresh" and be
+ * discarded. so there must not use the function
+ * "skb_copy" and "skb_clone" for "skb".
+ */
- if (skb->len < nPadding_Length)
- return 0;
+ /* Allocate new skb for releasing to upper layer */
+ sub_skb = dev_alloc_skb(nSubframe_Length + 12);
+ if (!sub_skb)
+ return 0;
+ skb_reserve(sub_skb, 12);
+ data_ptr = (u8 *)skb_put(sub_skb, nSubframe_Length);
+ memcpy(data_ptr, skb->data, nSubframe_Length);
- skb_pull(skb, nPadding_Length);
- }
+ sub_skb->dev = ieee->dev;
+ rxb->subframes[rxb->nr_subframes++] = sub_skb;
+ if (rxb->nr_subframes >= MAX_SUBFRAME_COUNT) {
+ RTLLIB_DEBUG_RX("ParseSubframe(): Too many Subframes! Packets dropped!\n");
+ break;
}
+ skb_pull(skb, nSubframe_Length);
- return rxb->nr_subframes;
+ if (skb->len != 0) {
+ nPadding_Length = 4 - ((nSubframe_Length +
+ ETHERNET_HEADER_SIZE) % 4);
+ if (nPadding_Length == 4)
+ nPadding_Length = 0;
+
+ if (skb->len < nPadding_Length)
+ return 0;
+
+ skb_pull(skb, nPadding_Length);
+ }
}
+
+ return rxb->nr_subframes;
}
hdrlen = rtllib_get_hdrlen(fc);
if (HTCCheck(ieee, skb->data)) {
if (net_ratelimit())
- printk(KERN_INFO "%s: find HTCControl!\n", __func__);
+ netdev_info(ieee->dev, "%s: find HTCControl!\n",
+ __func__);
hdrlen += 4;
rx_stats->bContainHTC = true;
}
}
/* Nullfunc frames may have PS-bit set, so they must be passed to
- * hostap_handle_sta_rx() before being dropped here. */
+ * hostap_handle_sta_rx() before being dropped here.
+ */
if (!ieee->IntelPromiscuousModeInfo.bPromiscuousOn) {
if (stype != RTLLIB_STYPE_DATA &&
stype != RTLLIB_STYPE_DATA_CFACK &&
*crypt = ieee->crypt_info.crypt[idx];
/* allow NULL decrypt to indicate an station specific override
- * for default encryption */
+ * for default encryption
+ */
if (*crypt && ((*crypt)->ops == NULL ||
(*crypt)->ops->decrypt_mpdu == NULL))
*crypt = NULL;
/* This seems to be triggered by some (multicast?)
* frames from other than current BSS, so just drop the
* frames silently instead of filling system log with
- * these reports. */
+ * these reports.
+ */
RTLLIB_DEBUG_DROP("Decryption failed (not set) (SA= %pM)\n",
hdr->addr2);
ieee->ieee_stats.rx_discards_undecryptable++;
keyidx = rtllib_rx_frame_decrypt(ieee, skb, crypt);
if (ieee->host_decrypt && (fc & RTLLIB_FCTL_WEP) && (keyidx < 0)) {
- printk(KERN_INFO "%s: decrypt frame error\n", __func__);
+ netdev_info(ieee->dev, "%s: decrypt frame error\n", __func__);
return -1;
}
flen -= hdrlen;
if (frag_skb->tail + flen > frag_skb->end) {
- printk(KERN_WARNING "%s: host decrypted and reassembled frame did not fit skb\n",
- __func__);
+ netdev_warn(ieee->dev,
+ "%s: host decrypted and reassembled frame did not fit skb\n",
+ __func__);
rtllib_frag_cache_invalidate(ieee, hdr);
return -1;
}
if (frag == 0) {
/* copy first fragment (including full headers) into
- * beginning of the fragment cache skb */
+ * beginning of the fragment cache skb
+ */
memcpy(skb_put(frag_skb, flen), skb->data, flen);
} else {
/* append frame payload to the end of the fragment
- * cache skb */
+ * cache skb
+ */
memcpy(skb_put(frag_skb, flen), skb->data + hdrlen,
flen);
}
if (fc & RTLLIB_FCTL_MOREFRAGS) {
/* more fragments expected - leave the skb in fragment
* cache for now; it will be delivered to upper layers
- * after all fragments have been received */
+ * after all fragments have been received
+ */
return -2;
}
/* this was the last fragment and the frame will be
- * delivered, so remove skb from fragment cache */
+ * delivered, so remove skb from fragment cache
+ */
skb = frag_skb;
hdr = (struct rtllib_hdr_4addr *) skb->data;
rtllib_frag_cache_invalidate(ieee, hdr);
}
/* skb: hdr + (possible reassembled) full MSDU payload; possibly still
- * encrypted/authenticated */
+ * encrypted/authenticated
+ */
if (ieee->host_decrypt && (fc & RTLLIB_FCTL_WEP) &&
rtllib_rx_frame_decrypt_msdu(ieee, skb, keyidx, crypt)) {
- printk(KERN_INFO "%s: ==>decrypt msdu error\n", __func__);
+ netdev_info(ieee->dev, "%s: ==>decrypt msdu error\n", __func__);
return -1;
}
rtllib_is_eapol_frame(ieee, skb, hdrlen)) {
/* pass unencrypted EAPOL frames even if encryption is
- * configured */
+ * configured
+ */
struct eapol *eap = (struct eapol *)(skb->data +
24);
RTLLIB_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
}
if (rtllib_is_eapol_frame(ieee, skb, hdrlen))
- printk(KERN_WARNING "RX: IEEE802.1X EAPOL frame!\n");
+ netdev_warn(ieee->dev, "RX: IEEE802.1X EAPOL frame!\n");
return 0;
}
{
if (unicast) {
- if ((ieee->state == RTLLIB_LINKED)) {
+ if (ieee->state == RTLLIB_LINKED) {
if (((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod +
ieee->LinkDetectInfo.NumTxOkInPeriod) > 8) ||
(ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2)) {
int i = 0;
if (rxb == NULL) {
- printk(KERN_INFO "%s: rxb is NULL!!\n", __func__);
- return ;
+ netdev_info(dev, "%s: rxb is NULL!!\n", __func__);
+ return;
}
for (i = 0; i < rxb->nr_subframes; i++) {
ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
memcmp(sub_skb->data, bridge_tunnel_header, SNAP_SIZE) == 0)) {
/* remove RFC1042 or Bridge-Tunnel encapsulation and
- * replace EtherType */
+ * replace EtherType
+ */
skb_pull(sub_skb, SNAP_SIZE);
memcpy(skb_push(sub_skb, ETH_ALEN), src, ETH_ALEN);
memcpy(skb_push(sub_skb, ETH_ALEN), dst, ETH_ALEN);
}
}
kfree(rxb);
- rxb = NULL;
}
static int rtllib_rx_InfraAdhoc(struct rtllib_device *ieee, struct sk_buff *skb,
/*Filter pkt has too small length */
hdrlen = rtllib_rx_get_hdrlen(ieee, skb, rx_stats);
if (skb->len < hdrlen) {
- printk(KERN_INFO "%s():ERR!!! skb->len is smaller than hdrlen\n", __func__);
+ netdev_info(dev, "%s():ERR!!! skb->len is smaller than hdrlen\n",
+ __func__);
goto rx_dropped;
}
/* skb: hdr + (possible reassembled) full plaintext payload */
payload = skb->data + hdrlen;
rxb = kmalloc(sizeof(struct rtllib_rxb), GFP_ATOMIC);
- if (rxb == NULL) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR,
- "%s(): kmalloc rxb error\n", __func__);
+ if (rxb == NULL)
goto rx_dropped;
- }
+
/* to parse amsdu packets */
/* qos data packets & reserved bit is 1 */
if (parse_subframe(ieee, skb, rx_stats, rxb, src, dst) == 0) {
/* Returning 0 indicates to caller that we have not handled the SKB--
* so it is still allocated and can be used again by underlying
- * hardware as a DMA target */
+ * hardware as a DMA target
+ */
return 0;
}
size_t hdrlen = rtllib_get_hdrlen(fc);
if (skb->len < hdrlen) {
- printk(KERN_INFO "%s():ERR!!! skb->len is smaller than hdrlen\n", __func__);
+ netdev_info(ieee->dev,
+ "%s():ERR!!! skb->len is smaller than hdrlen\n",
+ __func__);
return 0;
}
if (HTCCheck(ieee, skb->data)) {
if (net_ratelimit())
- printk(KERN_INFO "%s: Find HTCControl!\n", __func__);
+ netdev_info(ieee->dev, "%s: Find HTCControl!\n",
+ __func__);
hdrlen += 4;
}
/* All received frames are sent to this function. @skb contains the frame in
* IEEE 802.11 format, i.e., in the format it was sent over air.
- * This function is called only as a tasklet (software IRQ). */
+ * This function is called only as a tasklet (software IRQ).
+ */
int rtllib_rx(struct rtllib_device *ieee, struct sk_buff *skb,
struct rtllib_rx_stats *rx_stats)
{
int ret = 0;
if ((NULL == ieee) || (NULL == skb) || (NULL == rx_stats)) {
- printk(KERN_INFO "%s: Input parameters NULL!\n", __func__);
+ pr_info("%s: Input parameters NULL!\n", __func__);
goto rx_dropped;
}
if (skb->len < 10) {
- printk(KERN_INFO "%s: SKB length < 10\n", __func__);
+ netdev_info(ieee->dev, "%s: SKB length < 10\n", __func__);
goto rx_dropped;
}
ret = rtllib_rx_Mesh(ieee, skb, rx_stats);
break;
default:
- printk(KERN_INFO"%s: ERR iw mode!!!\n", __func__);
+ netdev_info(ieee->dev, "%s: ERR iw mode!!!\n", __func__);
break;
}
static u8 qos_oui[QOS_OUI_LEN] = { 0x00, 0x50, 0xF2 };
-/*
-* Make ther structure we read from the beacon packet has
-* the right values
-*/
+/* Make ther structure we read from the beacon packet has the right values */
static int rtllib_verify_qos_info(struct rtllib_qos_information_element
*info_element, int sub_type)
{
}
-/*
- * Parse a QoS parameter element
- */
+/* Parse a QoS parameter element */
static int rtllib_read_qos_param_element(struct rtllib_qos_parameter_info
*element_param, struct rtllib_info_element
*info_element)
return ret;
}
-/*
- * Parse a QoS information element
- */
+/* Parse a QoS information element */
static int rtllib_read_qos_info_element(struct
rtllib_qos_information_element
*element_info, struct rtllib_info_element
}
-/*
- * Write QoS parameters from the ac parameters.
- */
+/* Write QoS parameters from the ac parameters. */
static int rtllib_qos_convert_ac_to_parameters(struct rtllib_qos_parameter_info *param_elm,
struct rtllib_qos_data *qos_data)
{
return 0;
}
-/*
- * we have a generic data element which it may contain QoS information or
+/* we have a generic data element which it may contain QoS information or
* parameters element. check the information element length to decide
* which type to read
*/
if (!IS_COUNTRY_IE_VALID(ieee)) {
if (rtllib_act_scanning(ieee, false) && ieee->FirstIe_InScan)
- printk(KERN_INFO "Received beacon ContryIE, SSID: <%s>\n", network->ssid);
+ netdev_info(ieee->dev,
+ "Received beacon ContryIE, SSID: <%s>\n",
+ network->ssid);
Dot11d_UpdateCountryIe(ieee, addr2, info_element->len, info_element->data);
}
}
length, info_element->id);
/* We stop processing but don't return an error here
* because some misbehaviour APs break this rule. ie.
- * Orinoco AP1000. */
+ * Orinoco AP1000.
+ */
break;
}
info_element->data[2] == 0x4c &&
info_element->data[3] == 0x033) {
- tmp_htcap_len = min(info_element->len, (u8)MAX_IE_LEN);
+ tmp_htcap_len = min_t(u8, info_element->len, MAX_IE_LEN);
if (tmp_htcap_len != 0) {
network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC;
network->bssht.bdHTCapLen = tmp_htcap_len > sizeof(network->bssht.bdHTCapBuf) ?
info_element->data[1] == 0x90 &&
info_element->data[2] == 0x4c &&
info_element->data[3] == 0x034) {
- tmp_htinfo_len = min(info_element->len, (u8)MAX_IE_LEN);
+ tmp_htinfo_len = min_t(u8, info_element->len, MAX_IE_LEN);
if (tmp_htinfo_len != 0) {
network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC;
if (tmp_htinfo_len) {
info_element->data[1] == 0xe0 &&
info_element->data[2] == 0x4c &&
info_element->data[3] == 0x02) {
- ht_realtek_agg_len = min(info_element->len, (u8)MAX_IE_LEN);
+ ht_realtek_agg_len = min_t(u8, info_element->len, MAX_IE_LEN);
memcpy(ht_realtek_agg_buf, info_element->data, info_element->len);
}
if (ht_realtek_agg_len >= 5) {
case MFIE_TYPE_HT_CAP:
RTLLIB_DEBUG_SCAN("MFIE_TYPE_HT_CAP: %d bytes\n",
info_element->len);
- tmp_htcap_len = min(info_element->len, (u8)MAX_IE_LEN);
+ tmp_htcap_len = min_t(u8, info_element->len, MAX_IE_LEN);
if (tmp_htcap_len != 0) {
network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC;
network->bssht.bdHTCapLen = tmp_htcap_len > sizeof(network->bssht.bdHTCapBuf) ?
case MFIE_TYPE_HT_INFO:
RTLLIB_DEBUG_SCAN("MFIE_TYPE_HT_INFO: %d bytes\n",
info_element->len);
- tmp_htinfo_len = min(info_element->len, (u8)MAX_IE_LEN);
+ tmp_htinfo_len = min_t(u8, info_element->len, MAX_IE_LEN);
if (tmp_htinfo_len) {
network->bssht.bdHTSpecVer = HT_SPEC_VER_IEEE;
network->bssht.bdHTInfoLen = tmp_htinfo_len >
}
break;
case MFIE_TYPE_QOS_PARAMETER:
- printk(KERN_ERR
- "QoS Error need to parse QOS_PARAMETER IE\n");
+ netdev_err(ieee->dev,
+ "QoS Error need to parse QOS_PARAMETER IE\n");
break;
case MFIE_TYPE_COUNTRY:
struct rtllib_network *network,
struct rtllib_rx_stats *stats)
{
-
- /*
- network->qos_data.active = 0;
- network->qos_data.supported = 0;
- network->qos_data.param_count = 0;
- network->qos_data.old_param_count = 0;
- */
memset(&network->qos_data, 0, sizeof(struct rtllib_qos_data));
/* Pull out fixed field data */
/* A network is only a duplicate if the channel, BSSID, ESSID
* and the capability field (in particular IBSS and BSS) all match.
* We treat all <hidden> with the same BSSID and channel
- * as one network */
+ * as one network
+ */
return (((src->ssid_len == dst->ssid_len) || (!ssidbroad)) &&
(src->channel == dst->channel) &&
!memcmp(src->bssid, dst->bssid, ETH_ALEN) &&
static int IsPassiveChannel(struct rtllib_device *rtllib, u8 channel)
{
if (MAX_CHANNEL_NUMBER < channel) {
- printk(KERN_INFO "%s(): Invalid Channel\n", __func__);
+ netdev_info(rtllib->dev, "%s(): Invalid Channel\n", __func__);
return 0;
}
int rtllib_legal_channel(struct rtllib_device *rtllib, u8 channel)
{
if (MAX_CHANNEL_NUMBER < channel) {
- printk(KERN_INFO "%s(): Invalid Channel\n", __func__);
+ netdev_info(rtllib->dev, "%s(): Invalid Channel\n", __func__);
return 0;
}
if (rtllib->active_channel_map[channel] > 0)
if (WLAN_FC_GET_STYPE(le16_to_cpu(beacon->header.frame_ctl)) ==
RTLLIB_STYPE_PROBE_RESP) {
if (IsPassiveChannel(ieee, network->channel)) {
- printk(KERN_INFO "GetScanInfo(): For Global Domain, filter probe response at channel(%d).\n",
- network->channel);
+ netdev_info(ieee->dev,
+ "GetScanInfo(): For Global Domain, filter probe response at channel(%d).\n",
+ network->channel);
goto free_network;
}
}
*
* NOTE: This search is definitely not optimized. Once its doing
* the "right thing" we'll optimize it for efficiency if
- * necessary */
+ * necessary
+ */
/* Search for this entry in the list and update it if it is
- * already there. */
+ * already there.
+ */
spin_lock_irqsave(&ieee->lock, flags);
if (is_same_network(&ieee->current_network, network,
}
/* If we didn't find a match, then get a new network slot to initialize
- * with this beacon's information */
+ * with this beacon's information
+ */
if (&target->list == &ieee->network_list) {
if (list_empty(&ieee->network_free_list)) {
/* If there are no more slots, expire the oldest */
}
free_network:
kfree(network);
- return;
}
void rtllib_rx_mgt(struct rtllib_device *ieee,
}
/* We may add an option for custom rates that specific HW
- * might support */
+ * might support
+ */
*tag_p = tag;
}
*tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_54MB;
}
/* We may add an option for custom rates that specific HW might
- * support */
+ * support
+ */
*tag_p = tag;
}
*tag++ = 0x00;
*tag_p = tag;
- printk(KERN_ALERT "This is enable turbo mode IE process\n");
+ netdev_alert(ieee->dev, "This is enable turbo mode IE process\n");
}
static void enqueue_mgmt(struct rtllib_device *ieee, struct sk_buff *skb)
nh = (ieee->mgmt_queue_head + 1) % MGMT_QUEUE_NUM;
-/*
- * if the queue is full but we have newer frames then
+/* if the queue is full but we have newer frames then
* just overwrites the oldest.
*
* if (nh == ieee->mgmt_queue_tail)
if (QueryRate == 0) {
QueryRate = 12;
- printk(KERN_INFO "No BasicRate found!!\n");
+ netdev_info(ieee->dev, "No BasicRate found!!\n");
}
return QueryRate;
}
if (!ieee->check_nic_enough_desc(ieee->dev, tcb_desc->queue_index) ||
(skb_queue_len(&ieee->skb_waitQ[tcb_desc->queue_index]) != 0) ||
(ieee->queue_stop)) {
- /* insert the skb packet to the management queue */
- /* as for the completion function, it does not need
+ /* insert the skb packet to the management queue
+ *
+ * as for the completion function, it does not need
* to check it any more.
- * */
- printk(KERN_INFO "%s():insert to waitqueue, queue_index"
- ":%d!\n", __func__, tcb_desc->queue_index);
+ */
+ netdev_info(ieee->dev,
+ "%s():insert to waitqueue, queue_index:%d!\n",
+ __func__, tcb_desc->queue_index);
skb_queue_tail(&ieee->skb_waitQ[tcb_desc->queue_index],
skb);
} else {
if (ieee->beacon_txing && ieee->ieee_up)
mod_timer(&ieee->beacon_timer, jiffies +
- (MSECS(ieee->current_network.beacon_interval - 5)));
+ (msecs_to_jiffies(ieee->current_network.beacon_interval - 5)));
}
spin_unlock_irqrestore(&ieee->beacon_lock, flags);
}
-/*
- * Description:
- * Enable network monitor mode, all rx packets will be received.
- */
+/* Enables network monitor mode, all rx packets will be received. */
void rtllib_EnableNetMonitorMode(struct net_device *dev,
bool bInitState)
{
struct rtllib_device *ieee = netdev_priv_rsl(dev);
- printk(KERN_INFO "========>Enter Monitor Mode\n");
+ netdev_info(dev, "========>Enter Monitor Mode\n");
ieee->AllowAllDestAddrHandler(dev, true, !bInitState);
}
-/*
- * Description:
- * Disable network network monitor mode, only packets destinated to
- * us will be received.
+/* Disables network monitor mode. Only packets destinated to
+ * us will be received.
*/
void rtllib_DisableNetMonitorMode(struct net_device *dev,
bool bInitState)
{
struct rtllib_device *ieee = netdev_priv_rsl(dev);
- printk(KERN_INFO "========>Exit Monitor Mode\n");
+ netdev_info(dev, "========>Exit Monitor Mode\n");
ieee->AllowAllDestAddrHandler(dev, false, !bInitState);
}
-/*
- * Description:
- * This enables the specialized promiscuous mode required by Intel.
+/* Enables the specialized promiscuous mode required by Intel.
* In this mode, Intel intends to hear traffics from/to other STAs in the
* same BSS. Therefore we don't have to disable checking BSSID and we only need
* to allow all dest. BUT: if we enable checking BSSID then we can't recv
struct rtllib_device *ieee = netdev_priv_rsl(dev);
- printk(KERN_INFO "========>Enter Intel Promiscuous Mode\n");
+ netdev_info(dev, "========>Enter Intel Promiscuous Mode\n");
ieee->AllowAllDestAddrHandler(dev, true, !bInitState);
ieee->SetHwRegHandler(dev, HW_VAR_CECHK_BSSID,
EXPORT_SYMBOL(rtllib_EnableIntelPromiscuousMode);
-/*
- * Description:
- * This disables the specialized promiscuous mode required by Intel.
- * See MgntEnableIntelPromiscuousMode for detail.
+/* Disables the specialized promiscuous mode required by Intel.
+ * See MgntEnableIntelPromiscuousMode for detail.
*/
void rtllib_DisableIntelPromiscuousMode(struct net_device *dev,
bool bInitState)
struct rtllib_device *ieee = netdev_priv_rsl(dev);
- printk(KERN_INFO "========>Exit Intel Promiscuous Mode\n");
+ netdev_info(dev, "========>Exit Intel Promiscuous Mode\n");
ieee->AllowAllDestAddrHandler(dev, false, !bInitState);
ieee->SetHwRegHandler(dev, HW_VAR_CECHK_BSSID,
if (ieee->state == RTLLIB_LINKED)
goto out;
if (ieee->sync_scan_hurryup) {
- printk(KERN_INFO "============>sync_scan_hurryup out\n");
+ netdev_info(ieee->dev,
+ "============>sync_scan_hurryup out\n");
goto out;
}
down(&ieee->scan_sem);
if (ieee->eRFPowerState == eRfOff) {
- printk(KERN_INFO "======>%s():rf state is eRfOff, return\n",
- __func__);
+ netdev_info(ieee->dev,
+ "======>%s():rf state is eRfOff, return\n",
+ __func__);
goto out1;
}
rtllib_send_probe_requests(ieee, 0);
queue_delayed_work_rsl(ieee->wq, &ieee->softmac_scan_wq,
- MSECS(RTLLIB_SOFTMAC_SCAN_TIME));
+ msecs_to_jiffies(RTLLIB_SOFTMAC_SCAN_TIME));
up(&ieee->scan_sem);
return;
PMKCacheIdx = SecIsInPMKIDList(ieee, ieee->current_network.bssid);
if (PMKCacheIdx >= 0) {
wpa_ie_len += 18;
- printk(KERN_INFO "[PMK cache]: WPA2 IE length: %x\n",
- wpa_ie_len);
+ netdev_info(ieee->dev, "[PMK cache]: WPA2 IE length: %x\n",
+ wpa_ie_len);
}
len = sizeof(struct rtllib_assoc_request_frame) + 2
+ beacon->ssid_len
if (ieee->assocreq_ies)
memcpy(ieee->assocreq_ies, ies, ieee->assocreq_ies_len);
else {
- printk(KERN_INFO "%s()Warning: can't alloc memory for assocreq"
- "_ies\n", __func__);
+ netdev_info(ieee->dev,
+ "%s()Warning: can't alloc memory for assocreq_ies\n",
+ __func__);
ieee->assocreq_ies_len = 0;
}
return skb;
if (!skb)
rtllib_associate_abort(ieee);
else {
- ieee->state = RTLLIB_ASSOCIATING_AUTHENTICATING ;
+ ieee->state = RTLLIB_ASSOCIATING_AUTHENTICATING;
RTLLIB_DEBUG_MGMT("Sending authentication request\n");
softmac_mgmt_xmit(skb, ieee);
if (!timer_pending(&ieee->associate_timer)) {
*(c++) = chlen;
memcpy(c, challenge, chlen);
- RTLLIB_DEBUG_MGMT("Sending authentication challenge "
- "response\n");
+ RTLLIB_DEBUG_MGMT("Sending authentication challenge response\n");
rtllib_encrypt_fragment(ieee, skb,
sizeof(struct rtllib_hdr_3addr));
associate_complete_wq);
struct rt_pwr_save_ctrl *pPSC = (struct rt_pwr_save_ctrl *)
(&(ieee->PowerSaveControl));
- printk(KERN_INFO "Associated successfully\n");
+ netdev_info(ieee->dev, "Associated successfully\n");
if (!ieee->is_silent_reset) {
- printk(KERN_INFO "normal associate\n");
+ netdev_info(ieee->dev, "normal associate\n");
notify_wx_assoc_event(ieee);
}
if (rtllib_is_54g(&ieee->current_network) &&
(ieee->modulation & RTLLIB_OFDM_MODULATION)) {
ieee->rate = 108;
- printk(KERN_INFO"Using G rates:%d\n", ieee->rate);
+ netdev_info(ieee->dev, "Using G rates:%d\n", ieee->rate);
} else {
ieee->rate = 22;
ieee->SetWirelessMode(ieee->dev, IEEE_B);
- printk(KERN_INFO"Using B rates:%d\n", ieee->rate);
+ netdev_info(ieee->dev, "Using B rates:%d\n", ieee->rate);
}
if (ieee->pHTInfo->bCurrentHTSupport && ieee->pHTInfo->bEnableHT) {
- printk(KERN_INFO "Successfully associated, ht enabled\n");
+ netdev_info(ieee->dev, "Successfully associated, ht enabled\n");
HTOnAssocRsp(ieee);
} else {
- printk(KERN_INFO "Successfully associated, ht not "
- "enabled(%d, %d)\n",
- ieee->pHTInfo->bCurrentHTSupport,
- ieee->pHTInfo->bEnableHT);
+ netdev_info(ieee->dev,
+ "Successfully associated, ht not enabled(%d, %d)\n",
+ ieee->pHTInfo->bCurrentHTSupport,
+ ieee->pHTInfo->bEnableHT);
memset(ieee->dot11HTOperationalRateSet, 0, 16);
}
ieee->LinkDetectInfo.SlotNum = 2 * (1 +
ieee->link_change(ieee->dev);
if (ieee->is_silent_reset) {
- printk(KERN_INFO "silent reset associate\n");
+ netdev_info(ieee->dev, "silent reset associate\n");
ieee->is_silent_reset = false;
}
ieee->current_network.channel);
HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
if (ieee->eRFPowerState == eRfOff) {
- RT_TRACE(COMP_DBG, "=============>%s():Rf state is eRfOff,"
- " schedule ipsleave wq again,return\n", __func__);
+ RT_TRACE(COMP_DBG,
+ "=============>%s():Rf state is eRfOff, schedule ipsleave wq again,return\n",
+ __func__);
if (ieee->rtllib_ips_leave_wq != NULL)
ieee->rtllib_ips_leave_wq(ieee->dev);
up(&ieee->wx_sem);
(!apset && ssidset && ssidbroad && ssidmatch) ||
(ieee->is_roaming && ssidset && ssidbroad && ssidmatch)) {
/* if the essid is hidden replace it with the
- * essid provided by the user.
- */
+ * essid provided by the user.
+ */
if (!ssidbroad) {
strncpy(tmp_ssid, ieee->current_network.ssid,
IW_ESSID_MAX_SIZE);
IW_ESSID_MAX_SIZE);
ieee->current_network.ssid_len = tmp_ssid_len;
}
- printk(KERN_INFO"Linking with %s,channel:%d, qos:%d, "
- "myHT:%d, networkHT:%d, mode:%x cur_net.flags"
- ":0x%x\n", ieee->current_network.ssid,
- ieee->current_network.channel,
- ieee->current_network.qos_data.supported,
- ieee->pHTInfo->bEnableHT,
- ieee->current_network.bssht.bdSupportHT,
- ieee->current_network.mode,
- ieee->current_network.flags);
+ netdev_info(ieee->dev,
+ "Linking with %s,channel:%d, qos:%d, myHT:%d, networkHT:%d, mode:%x cur_net.flags:0x%x\n",
+ ieee->current_network.ssid,
+ ieee->current_network.channel,
+ ieee->current_network.qos_data.supported,
+ ieee->pHTInfo->bEnableHT,
+ ieee->current_network.bssht.bdSupportHT,
+ ieee->current_network.mode,
+ ieee->current_network.flags);
if ((rtllib_act_scanning(ieee, false)) &&
!(ieee->softmac_features & IEEE_SOFTMAC_SCAN))
(ieee->modulation & RTLLIB_OFDM_MODULATION)) {
ieee->rate = 108;
ieee->SetWirelessMode(ieee->dev, IEEE_G);
- printk(KERN_INFO"Using G rates\n");
+ netdev_info(ieee->dev, "Using G rates\n");
} else {
ieee->rate = 22;
ieee->SetWirelessMode(ieee->dev, IEEE_B);
- printk(KERN_INFO"Using B rates\n");
+ netdev_info(ieee->dev, "Using B rates\n");
}
memset(ieee->dot11HTOperationalRateSet, 0, 16);
ieee->state = RTLLIB_LINKED;
if (assoc_rq_parse(skb, dest) != -1)
rtllib_resp_to_assoc_rq(ieee, dest);
- printk(KERN_INFO"New client associated: %pM\n", dest);
+ netdev_info(ieee->dev, "New client associated: %pM\n", dest);
}
void rtllib_sta_ps_send_null_frame(struct rtllib_device *ieee, short pwr)
timeout = ieee->current_network.beacon_interval;
ieee->current_network.dtim_data = RTLLIB_DTIM_INVALID;
/* there's no need to nofity AP that I find you buffered
- * with broadcast packet */
+ * with broadcast packet
+ */
if (dtim & (RTLLIB_DTIM_UCAST & ieee->ps))
return 2;
- if (!time_after(jiffies, ieee->dev->trans_start + MSECS(timeout)))
+ if (!time_after(jiffies,
+ ieee->dev->trans_start + msecs_to_jiffies(timeout)))
return 0;
- if (!time_after(jiffies, ieee->last_rx_ps_time + MSECS(timeout)))
+ if (!time_after(jiffies,
+ ieee->last_rx_ps_time + msecs_to_jiffies(timeout)))
return 0;
if ((ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE) &&
(ieee->mgmt_queue_tail != ieee->mgmt_queue_head))
}
*time = ieee->current_network.last_dtim_sta_time
- + MSECS(ieee->current_network.beacon_interval *
+ + msecs_to_jiffies(ieee->current_network.beacon_interval *
LPSAwakeIntvl_tmp);
}
}
if ((ieee->ps == RTLLIB_PS_DISABLED ||
ieee->iw_mode != IW_MODE_INFRA ||
ieee->state != RTLLIB_LINKED)) {
- RT_TRACE(COMP_DBG, "=====>%s(): no need to ps,wake up!! "
- "ieee->ps is %d, ieee->iw_mode is %d, ieee->state"
- " is %d\n", __func__, ieee->ps, ieee->iw_mode,
- ieee->state);
+ RT_TRACE(COMP_DBG,
+ "=====>%s(): no need to ps,wake up!! ieee->ps is %d, ieee->iw_mode is %d, ieee->state is %d\n",
+ __func__, ieee->ps, ieee->iw_mode, ieee->state);
spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
rtllib_sta_wakeup(ieee, 1);
u8 category = 0;
if (act == NULL) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "error to get payload of "
- "action frame\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "error to get payload of action frame\n");
return;
}
default:
break;
}
- return;
}
inline int rtllib_rx_assoc_resp(struct rtllib_device *ieee, struct sk_buff *skb,
memcpy(ieee->assocresp_ies, ies,
ieee->assocresp_ies_len);
else {
- printk(KERN_INFO "%s()Warning: can't alloc "
- "memory for assocresp_ies\n", __func__);
+ netdev_info(ieee->dev,
+ "%s()Warning: can't alloc memory for assocresp_ies\n",
+ __func__);
ieee->assocresp_ies_len = 0;
}
rtllib_associate_complete(ieee);
} else {
/* aid could not been allocated */
ieee->softmac_stats.rx_ass_err++;
- printk(KERN_INFO "Association response status code 0x%x\n",
- errcode);
+ netdev_info(ieee->dev,
+ "Association response status code 0x%x\n",
+ errcode);
RTLLIB_DEBUG_MGMT(
"Association response status code 0x%x\n",
errcode);
return 0;
}
-inline int rtllib_rx_auth(struct rtllib_device *ieee, struct sk_buff *skb,
- struct rtllib_rx_stats *rx_stats)
+static void rtllib_rx_auth_resp(struct rtllib_device *ieee, struct sk_buff *skb)
{
u16 errcode;
u8 *challenge;
int chlen = 0;
bool bSupportNmode = true, bHalfSupportNmode = false;
- if (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) {
- if (ieee->state == RTLLIB_ASSOCIATING_AUTHENTICATING &&
- (ieee->iw_mode == IW_MODE_INFRA)) {
- RTLLIB_DEBUG_MGMT("Received authentication response");
+ errcode = auth_parse(skb, &challenge, &chlen);
- errcode = auth_parse(skb, &challenge, &chlen);
- if (0 == errcode) {
- if (ieee->open_wep || !challenge) {
- ieee->state = RTLLIB_ASSOCIATING_AUTHENTICATED;
- ieee->softmac_stats.rx_auth_rs_ok++;
- if (!(ieee->pHTInfo->IOTAction &
- HT_IOT_ACT_PURE_N_MODE)) {
- if (!ieee->GetNmodeSupportBySecCfg(ieee->dev)) {
- if (IsHTHalfNmodeAPs(ieee)) {
- bSupportNmode = true;
- bHalfSupportNmode = true;
- } else {
- bSupportNmode = false;
- bHalfSupportNmode = false;
- }
- }
- }
- /* Dummy wirless mode setting to avoid
- * encryption issue */
- if (bSupportNmode) {
- ieee->SetWirelessMode(ieee->dev,
- ieee->current_network.mode);
- } else {
- /*TODO*/
- ieee->SetWirelessMode(ieee->dev,
- IEEE_G);
- }
-
- if (ieee->current_network.mode ==
- IEEE_N_24G && bHalfSupportNmode) {
- printk(KERN_INFO "======>enter "
- "half N mode\n");
- ieee->bHalfWirelessN24GMode =
- true;
- } else
- ieee->bHalfWirelessN24GMode =
- false;
-
- rtllib_associate_step2(ieee);
+ if (errcode) {
+ ieee->softmac_stats.rx_auth_rs_err++;
+ RTLLIB_DEBUG_MGMT("Authentication respose status code 0x%x",
+ errcode);
+
+ netdev_info(ieee->dev,
+ "Authentication respose status code 0x%x", errcode);
+ rtllib_associate_abort(ieee);
+ return;
+ }
+
+ if (ieee->open_wep || !challenge) {
+ ieee->state = RTLLIB_ASSOCIATING_AUTHENTICATED;
+ ieee->softmac_stats.rx_auth_rs_ok++;
+ if (!(ieee->pHTInfo->IOTAction & HT_IOT_ACT_PURE_N_MODE)) {
+ if (!ieee->GetNmodeSupportBySecCfg(ieee->dev)) {
+ if (IsHTHalfNmodeAPs(ieee)) {
+ bSupportNmode = true;
+ bHalfSupportNmode = true;
} else {
- rtllib_auth_challenge(ieee, challenge,
- chlen);
+ bSupportNmode = false;
+ bHalfSupportNmode = false;
}
- } else {
- ieee->softmac_stats.rx_auth_rs_err++;
- RTLLIB_DEBUG_MGMT("Authentication respose"
- " status code 0x%x", errcode);
-
- printk(KERN_INFO "Authentication respose "
- "status code 0x%x", errcode);
- rtllib_associate_abort(ieee);
}
+ }
+ /* Dummy wirless mode setting to avoid encryption issue */
+ if (bSupportNmode) {
+ ieee->SetWirelessMode(ieee->dev,
+ ieee->current_network.mode);
+ } else {
+ /*TODO*/
+ ieee->SetWirelessMode(ieee->dev, IEEE_G);
+ }
+ if ((ieee->current_network.mode == IEEE_N_24G) &&
+ bHalfSupportNmode) {
+ netdev_info(ieee->dev, "======>enter half N mode\n");
+ ieee->bHalfWirelessN24GMode = true;
+ } else {
+ ieee->bHalfWirelessN24GMode = false;
+ }
+ rtllib_associate_step2(ieee);
+ } else {
+ rtllib_auth_challenge(ieee, challenge, chlen);
+ }
+}
+
+inline int rtllib_rx_auth(struct rtllib_device *ieee, struct sk_buff *skb,
+ struct rtllib_rx_stats *rx_stats)
+{
+
+ if (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) {
+ if (ieee->state == RTLLIB_ASSOCIATING_AUTHENTICATING &&
+ (ieee->iw_mode == IW_MODE_INFRA)) {
+ RTLLIB_DEBUG_MGMT("Received authentication response");
+ rtllib_rx_auth_resp(ieee, skb);
} else if (ieee->iw_mode == IW_MODE_MASTER) {
rtllib_rx_auth_rq(ieee, skb);
}
return 0;
/* FIXME for now repeat all the association procedure
- * both for disassociation and deauthentication
- */
+ * both for disassociation and deauthentication
+ */
if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
ieee->state == RTLLIB_LINKED &&
(ieee->iw_mode == IW_MODE_INFRA)) {
- printk(KERN_INFO "==========>received disassoc/deauth(%x) "
- "frame, reason code:%x\n",
- WLAN_FC_GET_STYPE(header->frame_ctl),
- ((struct rtllib_disassoc *)skb->data)->reason);
+ netdev_info(ieee->dev,
+ "==========>received disassoc/deauth(%x) frame, reason code:%x\n",
+ WLAN_FC_GET_STYPE(header->frame_ctl),
+ ((struct rtllib_disassoc *)skb->data)->reason);
ieee->state = RTLLIB_ASSOCIATING;
ieee->softmac_stats.reassoc++;
ieee->is_roaming = true;
break;
default:
return -1;
- break;
}
return 0;
}
ieee->stats.multicast++;
/* if xmit available, just xmit it immediately, else just insert it to
- * the wait queue */
+ * the wait queue
+ */
for (i = 0; i < txb->nr_frags; i++) {
queue_len = skb_queue_len(&ieee->skb_waitQ[queue_index]);
- if ((queue_len != 0) ||\
+ if ((queue_len != 0) ||
(!ieee->check_nic_enough_desc(ieee->dev, queue_index)) ||
(ieee->queue_stop)) {
- /* insert the skb packet to the wait queue */
- /* as for the completion function, it does not need
+ /* insert the skb packet to the wait queue
+ * as for the completion function, it does not need
* to check it any more.
- * */
+ */
if (queue_len < 200)
skb_queue_tail(&ieee->skb_waitQ[queue_index],
txb->fragments[i]);
if (ieee->queue_stop) {
ieee->tx_pending.frag = i;
return;
- } else {
-
- ieee->softmac_data_hard_start_xmit(
- ieee->tx_pending.txb->fragments[i],
- ieee->dev, ieee->rate);
- ieee->stats.tx_packets++;
}
+
+ ieee->softmac_data_hard_start_xmit(
+ ieee->tx_pending.txb->fragments[i],
+ ieee->dev, ieee->rate);
+ ieee->stats.tx_packets++;
}
rtllib_txb_free(ieee->tx_pending.txb);
* on the semaphore
*/
if (!ieee->proto_started) {
- printk(KERN_INFO "==========oh driver down return\n");
+ netdev_info(ieee->dev, "==========oh driver down return\n");
return;
}
down(&ieee->wx_sem);
/* the network definitively is not here.. create a new cell */
if (ieee->state == RTLLIB_NOLINK) {
- printk(KERN_INFO "creating new IBSS cell\n");
+ netdev_info(ieee->dev, "creating new IBSS cell\n");
ieee->current_network.channel = ieee->IbssStartChnl;
if (!ieee->wap_set)
rtllib_randomize_cell(ieee);
ieee->current_network.capability = WLAN_CAPABILITY_IBSS;
}
- printk(KERN_INFO "%s(): ieee->mode = %d\n", __func__, ieee->mode);
+ netdev_info(ieee->dev, "%s(): ieee->mode = %d\n", __func__, ieee->mode);
if ((ieee->mode == IEEE_N_24G) || (ieee->mode == IEEE_N_5G))
HTUseDefaultSetting(ieee);
else
inline void rtllib_start_ibss(struct rtllib_device *ieee)
{
- queue_delayed_work_rsl(ieee->wq, &ieee->start_ibss_wq, MSECS(150));
+ queue_delayed_work_rsl(ieee->wq, &ieee->start_ibss_wq,
+ msecs_to_jiffies(150));
}
/* this is called only in user context, with wx_sem held */
goto exit;
/* until we do not set the state to RTLLIB_NOLINK
- * there are no possibility to have someone else trying
- * to start an association procedure (we get here with
- * ieee->state = RTLLIB_ASSOCIATING).
- * When we set the state to RTLLIB_NOLINK it is possible
- * that the RX path run an attempt to associate, but
- * both rtllib_softmac_check_all_nets and the
- * RX path works with ieee->lock held so there are no
- * problems. If we are still disassociated then start a scan.
- * the lock here is necessary to ensure no one try to start
- * an association procedure when we have just checked the
- * state and we are going to start the scan.
- */
+ * there are no possibility to have someone else trying
+ * to start an association procedure (we get here with
+ * ieee->state = RTLLIB_ASSOCIATING).
+ * When we set the state to RTLLIB_NOLINK it is possible
+ * that the RX path run an attempt to associate, but
+ * both rtllib_softmac_check_all_nets and the
+ * RX path works with ieee->lock held so there are no
+ * problems. If we are still disassociated then start a scan.
+ * the lock here is necessary to ensure no one try to start
+ * an association procedure when we have just checked the
+ * state and we are going to start the scan.
+ */
ieee->beinretry = true;
ieee->state = RTLLIB_NOLINK;
static int rtllib_wpa_enable(struct rtllib_device *ieee, int value)
{
/* This is called when wpa_supplicant loads and closes the driver
- * interface. */
- printk(KERN_INFO "%s WPA\n", value ? "enabling" : "disabling");
+ * interface.
+ */
+ netdev_info(ieee->dev, "%s WPA\n", value ? "enabling" : "disabling");
ieee->wpa_enabled = value;
memset(ieee->ap_mac_addr, 0, 6);
return 0;
break;
default:
- printk(KERN_INFO "Unknown MLME request: %d\n", command);
+ netdev_info(ieee->dev, "Unknown MLME request: %d\n", command);
ret = -EOPNOTSUPP;
}
break;
default:
- printk(KERN_INFO "Unknown WPA param: %d\n", name);
+ netdev_info(ieee->dev, "Unknown WPA param: %d\n", name);
ret = -EOPNOTSUPP;
}
if (param_len !=
(int) ((char *) param->u.crypt.key - (char *) param) +
param->u.crypt.key_len) {
- printk(KERN_INFO "Len mismatch %d, %d\n", param_len,
- param->u.crypt.key_len);
+ netdev_info(ieee->dev, "Len mismatch %d, %d\n", param_len,
+ param->u.crypt.key_len);
return -EINVAL;
}
if (is_broadcast_ether_addr(param->sta_addr)) {
ops = lib80211_get_crypto_ops(param->u.crypt.alg);
}
if (ops == NULL) {
- printk(KERN_INFO "unknown crypto alg '%s'\n",
- param->u.crypt.alg);
+ netdev_info(ieee->dev, "unknown crypto alg '%s'\n",
+ param->u.crypt.alg);
param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG;
ret = -EINVAL;
goto done;
lib80211_crypt_delayed_deinit(&ieee->crypt_info, crypt);
- new_crypt = kmalloc(sizeof(*new_crypt), GFP_KERNEL);
+ new_crypt = kzalloc(sizeof(*new_crypt), GFP_KERNEL);
if (new_crypt == NULL) {
ret = -ENOMEM;
goto done;
}
- memset(new_crypt, 0, sizeof(struct lib80211_crypt_data));
new_crypt->ops = ops;
if (new_crypt->ops)
new_crypt->priv =
(*crypt)->ops->set_key(param->u.crypt.key,
param->u.crypt.key_len, param->u.crypt.seq,
(*crypt)->priv) < 0) {
- printk(KERN_INFO "key setting failed\n");
+ netdev_info(ieee->dev, "key setting failed\n");
param->u.crypt.err = IEEE_CRYPT_ERR_KEY_SET_FAILED;
ret = -EINVAL;
goto done;
* generate new IEEE 802.11 authentication which may end up in looping
* with IEEE 802.1X. If your hardware requires a reset after WEP
* configuration (for example... Prism2), implement the reset_port in
- * the callbacks structures used to initialize the 802.11 stack. */
+ * the callbacks structures used to initialize the 802.11 stack.
+ */
if (ieee->reset_on_keychange &&
ieee->iw_mode != IW_MODE_INFRA &&
ieee->reset_port &&
ieee->reset_port(ieee->dev)) {
- printk(KERN_INFO "reset_port failed\n");
+ netdev_info(ieee->dev, "reset_port failed\n");
param->u.crypt.err = IEEE_CRYPT_ERR_CARD_CONF_FAILED;
return -EINVAL;
}
break;
default:
- printk(KERN_INFO "Unknown WPA supplicant request: %d\n",
- param->cmd);
+ netdev_info(ieee->dev, "Unknown WPA supplicant request: %d\n",
+ param->cmd);
ret = -EOPNOTSUPP;
break;
}
ETH_ALEN);
else {
- printk(KERN_INFO "%s(): Tell user space disconnected\n",
- __func__);
- memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
+ netdev_info(ieee->dev, "%s(): Tell user space disconnected\n",
+ __func__);
+ eth_zero_addr(wrqu.ap_addr.sa_data);
}
wireless_send_event(ieee->dev, SIOCGIWAP, &wrqu, NULL);
}
ieee->state != RTLLIB_LINKED_SCANNING &&
ieee->wap_set == 0)
- memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
+ eth_zero_addr(wrqu->ap_addr.sa_data);
else
memcpy(wrqu->ap_addr.sa_data,
ieee->current_network.bssid, ETH_ALEN);
else
ieee->raw_tx = 0;
- printk(KERN_INFO"raw TX is %s\n",
- ieee->raw_tx ? "enabled" : "disabled");
+ netdev_info(ieee->dev, "raw TX is %s\n",
+ ieee->raw_tx ? "enabled" : "disabled");
if (ieee->iw_mode == IW_MODE_MONITOR) {
if (prev == 0 && ieee->raw_tx) {
if ((!ieee->sta_wake_up) ||
(!ieee->enter_sleep_state) ||
(!ieee->ps_is_queue_empty)) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "%s(): PS mode is tried to be use "
- "but driver missed a callback\n\n", __func__);
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "%s(): PS mode is tried to be use but driver missed a callback\n\n",
+ __func__);
return -1;
}
#include "rtllib.h"
-/*
-
-
-802.11 Data Frame
-
-
-802.11 frame_control for data frames - 2 bytes
- ,-----------------------------------------------------------------------------------------.
-bits | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | a | b | c | d | e |
- |----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|------|
-val | 0 | 0 | 0 | 1 | x | 0 | 0 | 0 | 1 | 0 | x | x | x | x | x |
- |----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|------|
-desc | ^-ver-^ | ^type-^ | ^-----subtype-----^ | to |from |more |retry| pwr |more |wep |
- | | | x=0 data,x=1 data+ack | DS | DS |frag | | mgm |data | |
- '-----------------------------------------------------------------------------------------'
- /\
- |
-802.11 Data Frame |
- ,--------- 'ctrl' expands to >-----------'
- |
- ,--'---,-------------------------------------------------------------.
-Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 |
- |------|------|---------|---------|---------|------|---------|------|
-Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | Frame | fcs |
- | | tion | (BSSID) | | | ence | data | |
- `--------------------------------------------------| |------'
-Total: 28 non-data bytes `----.----'
- |
- .- 'Frame data' expands to <---------------------------'
- |
- V
- ,---------------------------------------------------.
-Bytes | 1 | 1 | 1 | 3 | 2 | 0-2304 |
- |------|------|---------|----------|------|---------|
-Desc. | SNAP | SNAP | Control |Eth Tunnel| Type | IP |
- | DSAP | SSAP | | | | Packet |
- | 0xAA | 0xAA |0x03 (UI)|0x00-00-F8| | |
- `-----------------------------------------| |
-Total: 8 non-data bytes `----.----'
- |
- .- 'IP Packet' expands, if WEP enabled, to <--'
- |
- V
- ,-----------------------.
-Bytes | 4 | 0-2296 | 4 |
- |-----|-----------|-----|
-Desc. | IV | Encrypted | ICV |
- | | IP Packet | |
- `-----------------------'
-Total: 8 non-data bytes
-
-
-802.3 Ethernet Data Frame
-
- ,-----------------------------------------.
-Bytes | 6 | 6 | 2 | Variable | 4 |
- |-------|-------|------|-----------|------|
-Desc. | Dest. | Source| Type | IP Packet | fcs |
- | MAC | MAC | | | |
- `-----------------------------------------'
-Total: 18 non-data bytes
-
-In the event that fragmentation is required, the incoming payload is split into
-N parts of size ieee->fts. The first fragment contains the SNAP header and the
-remaining packets are just data.
-
-If encryption is enabled, each fragment payload size is reduced by enough space
-to add the prefix and postfix (IV and ICV totalling 8 bytes in the case of WEP)
-So if you have 1500 bytes of payload with ieee->fts set to 500 without
-encryption it will take 3 frames. With WEP it will take 4 frames as the
-payload of each frame is reduced to 492 bytes.
-
-* SKB visualization
-*
-* ,- skb->data
-* |
-* | ETHERNET HEADER ,-<-- PAYLOAD
-* | | 14 bytes from skb->data
-* | 2 bytes for Type --> ,T. | (sizeof ethhdr)
-* | | | |
-* |,-Dest.--. ,--Src.---. | | |
-* | 6 bytes| | 6 bytes | | | |
-* v | | | | | |
-* 0 | v 1 | v | v 2
-* 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
-* ^ | ^ | ^ |
-* | | | | | |
-* | | | | `T' <---- 2 bytes for Type
-* | | | |
-* | | '---SNAP--' <-------- 6 bytes for SNAP
-* | |
-* `-IV--' <-------------------- 4 bytes for IV (WEP)
-*
-* SNAP HEADER
-*
-*/
+/* 802.11 Data Frame
+ *
+ *
+ * 802.11 frame_control for data frames - 2 bytes
+ * ,-----------------------------------------------------------------------------------------.
+ * bits | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | a | b | c | d | e |
+ * |----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|------|
+ * val | 0 | 0 | 0 | 1 | x | 0 | 0 | 0 | 1 | 0 | x | x | x | x | x |
+ * |----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|------|
+ * desc | ^-ver-^ | ^type-^ | ^-----subtype-----^ | to |from |more |retry| pwr |more |wep |
+ * | | | x=0 data,x=1 data+ack | DS | DS |frag | | mgm |data | |
+ * '-----------------------------------------------------------------------------------------'
+ * /\
+ * |
+ * 802.11 Data Frame |
+ * ,--------- 'ctrl' expands to >-----------'
+ * |
+ * ,--'---,-------------------------------------------------------------.
+ * Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 |
+ * |------|------|---------|---------|---------|------|---------|------|
+ * Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | Frame | fcs |
+ * | | tion | (BSSID) | | | ence | data | |
+ * `--------------------------------------------------| |------'
+ * Total: 28 non-data bytes `----.----'
+ * |
+ * .- 'Frame data' expands to <---------------------------'
+ * |
+ * V
+ * ,---------------------------------------------------.
+ * Bytes | 1 | 1 | 1 | 3 | 2 | 0-2304 |
+ * |------|------|---------|----------|------|---------|
+ * Desc. | SNAP | SNAP | Control |Eth Tunnel| Type | IP |
+ * | DSAP | SSAP | | | | Packet |
+ * | 0xAA | 0xAA |0x03 (UI)|0x00-00-F8| | |
+ * `-----------------------------------------| |
+ * Total: 8 non-data bytes `----.----'
+ * |
+ * .- 'IP Packet' expands, if WEP enabled, to <--'
+ * |
+ * V
+ * ,-----------------------.
+ * Bytes | 4 | 0-2296 | 4 |
+ * |-----|-----------|-----|
+ * Desc. | IV | Encrypted | ICV |
+ * | | IP Packet | |
+ * `-----------------------'
+ * Total: 8 non-data bytes
+ *
+ *
+ * 802.3 Ethernet Data Frame
+ *
+ * ,-----------------------------------------.
+ * Bytes | 6 | 6 | 2 | Variable | 4 |
+ * |-------|-------|------|-----------|------|
+ * Desc. | Dest. | Source| Type | IP Packet | fcs |
+ * | MAC | MAC | | | |
+ * `-----------------------------------------'
+ * Total: 18 non-data bytes
+ *
+ * In the event that fragmentation is required, the incoming payload is split into
+ * N parts of size ieee->fts. The first fragment contains the SNAP header and the
+ * remaining packets are just data.
+ *
+ * If encryption is enabled, each fragment payload size is reduced by enough space
+ * to add the prefix and postfix (IV and ICV totalling 8 bytes in the case of WEP)
+ * So if you have 1500 bytes of payload with ieee->fts set to 500 without
+ * encryption it will take 3 frames. With WEP it will take 4 frames as the
+ * payload of each frame is reduced to 492 bytes.
+ *
+ * SKB visualization
+ *
+ * ,- skb->data
+ * |
+ * | ETHERNET HEADER ,-<-- PAYLOAD
+ * | | 14 bytes from skb->data
+ * | 2 bytes for Type --> ,T. | (sizeof ethhdr)
+ * | | | |
+ * |,-Dest.--. ,--Src.---. | | |
+ * | 6 bytes| | 6 bytes | | | |
+ * v | | | | | |
+ * 0 | v 1 | v | v 2
+ * 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
+ * ^ | ^ | ^ |
+ * | | | | | |
+ * | | | | `T' <---- 2 bytes for Type
+ * | | | |
+ * | | '---SNAP--' <-------- 6 bytes for SNAP
+ * | |
+ * `-IV--' <-------------------- 4 bytes for IV (WEP)
+ *
+ * SNAP HEADER
+ *
+ */
static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 };
static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 };
crypt = ieee->crypt_info.crypt[ieee->crypt_info.tx_keyidx];
if (!(crypt && crypt->ops)) {
- printk(KERN_INFO "=========>%s(), crypt is null\n", __func__);
+ netdev_info(ieee->dev, "=========>%s(), crypt is null\n",
+ __func__);
return -1;
}
/* To encrypt, frame format is:
- * IV (4 bytes), clear payload (including SNAP), ICV (4 bytes) */
+ * IV (4 bytes), clear payload (including SNAP), ICV (4 bytes)
+ */
/* Host-based IEEE 802.11 fragmentation for TX is not yet supported, so
- * call both MSDU and MPDU encryption functions from here. */
+ * call both MSDU and MPDU encryption functions from here.
+ */
atomic_inc(&crypt->refcnt);
res = 0;
if (crypt->ops->encrypt_msdu)
atomic_dec(&crypt->refcnt);
if (res < 0) {
- printk(KERN_INFO "%s: Encryption failed: len=%d.\n",
- ieee->dev->name, frag->len);
+ netdev_info(ieee->dev, "%s: Encryption failed: len=%d.\n",
+ ieee->dev->name, frag->len);
ieee->ieee_stats.tx_discards++;
return -1;
}
if (pHTInfo->bCurrentAMPDUEnable) {
if (!GetTs(ieee, (struct ts_common_info **)(&pTxTs), hdr->addr1,
skb->priority, TX_DIR, true)) {
- printk(KERN_INFO "%s: can't get TS\n", __func__);
+ netdev_info(ieee->dev, "%s: can't get TS\n", __func__);
return;
}
if (pTxTs->TxAdmittedBARecord.bValid == false) {
struct cb_desc *tcb_desc,
struct sk_buff *skb)
{
+ struct rt_hi_throughput *pHTInfo;
+
tcb_desc->bRTSSTBC = false;
tcb_desc->bRTSUseShortGI = false;
tcb_desc->bCTSEnable = false;
tcb_desc->rts_rate = MGN_24M;
}
return;
- } else {
- struct rt_hi_throughput *pHTInfo = ieee->pHTInfo;
+ }
- while (true) {
- if (pHTInfo->IOTAction & HT_IOT_ACT_FORCED_CTS2SELF) {
- tcb_desc->bCTSEnable = true;
- tcb_desc->rts_rate = MGN_24M;
- tcb_desc->bRTSEnable = true;
- break;
- } else if (pHTInfo->IOTAction & (HT_IOT_ACT_FORCED_RTS |
- HT_IOT_ACT_PURE_N_MODE)) {
- tcb_desc->bRTSEnable = true;
- tcb_desc->rts_rate = MGN_24M;
- break;
- }
- if (ieee->current_network.buseprotection) {
- tcb_desc->bRTSEnable = true;
- tcb_desc->bCTSEnable = true;
- tcb_desc->rts_rate = MGN_24M;
- break;
- }
- if (pHTInfo->bCurrentHTSupport && pHTInfo->bEnableHT) {
- u8 HTOpMode = pHTInfo->CurrentOpMode;
-
- if ((pHTInfo->bCurBW40MHz && (HTOpMode == 2 ||
- HTOpMode == 3)) ||
- (!pHTInfo->bCurBW40MHz && HTOpMode == 3)) {
- tcb_desc->rts_rate = MGN_24M;
- tcb_desc->bRTSEnable = true;
- break;
- }
- }
- if (skb->len > ieee->rts) {
+ pHTInfo = ieee->pHTInfo;
+
+ while (true) {
+ if (pHTInfo->IOTAction & HT_IOT_ACT_FORCED_CTS2SELF) {
+ tcb_desc->bCTSEnable = true;
+ tcb_desc->rts_rate = MGN_24M;
+ tcb_desc->bRTSEnable = true;
+ break;
+ } else if (pHTInfo->IOTAction & (HT_IOT_ACT_FORCED_RTS |
+ HT_IOT_ACT_PURE_N_MODE)) {
+ tcb_desc->bRTSEnable = true;
+ tcb_desc->rts_rate = MGN_24M;
+ break;
+ }
+ if (ieee->current_network.buseprotection) {
+ tcb_desc->bRTSEnable = true;
+ tcb_desc->bCTSEnable = true;
+ tcb_desc->rts_rate = MGN_24M;
+ break;
+ }
+ if (pHTInfo->bCurrentHTSupport && pHTInfo->bEnableHT) {
+ u8 HTOpMode = pHTInfo->CurrentOpMode;
+
+ if ((pHTInfo->bCurBW40MHz && (HTOpMode == 2 ||
+ HTOpMode == 3)) ||
+ (!pHTInfo->bCurBW40MHz && HTOpMode == 3)) {
tcb_desc->rts_rate = MGN_24M;
tcb_desc->bRTSEnable = true;
break;
}
- if (tcb_desc->bAMPDUEnable) {
- tcb_desc->rts_rate = MGN_24M;
- tcb_desc->bRTSEnable = false;
- break;
- }
- goto NO_PROTECTION;
}
+ if (skb->len > ieee->rts) {
+ tcb_desc->rts_rate = MGN_24M;
+ tcb_desc->bRTSEnable = true;
+ break;
+ }
+ if (tcb_desc->bAMPDUEnable) {
+ tcb_desc->rts_rate = MGN_24M;
+ tcb_desc->bRTSEnable = false;
+ break;
+ }
+ goto NO_PROTECTION;
}
if (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
tcb_desc->bUseShortPreamble = true;
}
}
+static u8 rtllib_current_rate(struct rtllib_device *ieee)
+{
+ if (ieee->mode & IEEE_MODE_MASK)
+ return ieee->rate;
+
+ if (ieee->HTCurrentOperaRate)
+ return ieee->HTCurrentOperaRate;
+ else
+ return ieee->rate & 0x7F;
+}
+
int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev)
{
struct rtllib_device *ieee = (struct rtllib_device *)
spin_lock_irqsave(&ieee->lock, flags);
/* If there is no driver handler to take the TXB, don't bother
- * creating it... */
+ * creating it...
+ */
if ((!ieee->hard_start_xmit && !(ieee->softmac_features &
IEEE_SOFTMAC_TX_QUEUE)) ||
((!ieee->softmac_data_hard_start_xmit &&
(ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)))) {
- printk(KERN_WARNING "%s: No xmit handler.\n",
- ieee->dev->name);
+ netdev_warn(ieee->dev, "No xmit handler.\n");
goto success;
}
if (likely(ieee->raw_tx == 0)) {
if (unlikely(skb->len < SNAP_SIZE + sizeof(u16))) {
- printk(KERN_WARNING "%s: skb too small (%d).\n",
- ieee->dev->name, skb->len);
+ netdev_warn(ieee->dev, "skb too small (%d).\n",
+ skb->len);
goto success;
}
/* Save source and destination addresses */
if (ieee->iw_mode == IW_MODE_MONITOR) {
txb = rtllib_alloc_txb(1, skb->len, GFP_ATOMIC);
if (unlikely(!txb)) {
- printk(KERN_WARNING "%s: Could not allocate "
- "TXB\n",
- ieee->dev->name);
+ netdev_warn(ieee->dev,
+ "Could not allocate TXB\n");
goto failed;
}
}
}
} else if (ETH_P_ARP == ether_type) {
- printk(KERN_INFO "=================>DHCP "
- "Protocol start tx ARP pkt!!\n");
+ netdev_info(ieee->dev,
+ "=================>DHCP Protocol start tx ARP pkt!!\n");
bdhcp = true;
ieee->LPSDelayCnt =
ieee->current_network.tim.tim_count;
if (ieee->iw_mode == IW_MODE_INFRA) {
fc |= RTLLIB_FCTL_TODS;
/* To DS: Addr1 = BSSID, Addr2 = SA,
- Addr3 = DA */
+ * Addr3 = DA
+ */
memcpy(&header.addr1, ieee->current_network.bssid,
ETH_ALEN);
memcpy(&header.addr2, &src, ETH_ALEN);
memcpy(&header.addr3, &dest, ETH_ALEN);
} else if (ieee->iw_mode == IW_MODE_ADHOC) {
/* not From/To DS: Addr1 = DA, Addr2 = SA,
- Addr3 = BSSID */
+ * Addr3 = BSSID
+ */
memcpy(&header.addr1, dest, ETH_ALEN);
memcpy(&header.addr2, src, ETH_ALEN);
memcpy(&header.addr3, ieee->current_network.bssid,
header.frame_ctl = cpu_to_le16(fc);
/* Determine fragmentation size based on destination (multicast
- * and broadcast are not fragmented) */
+ * and broadcast are not fragmented)
+ */
if (bIsMulticast) {
frag_size = MAX_FRAG_THRESHOLD;
qos_ctl |= QOS_CTL_NOTCONTAIN_ACK;
/* in case we are a client verify acm is not set for this ac */
while (unlikely(ieee->wmm_acm & (0x01 << skb->priority))) {
- printk(KERN_INFO "skb->priority = %x\n", skb->priority);
+ netdev_info(ieee->dev, "skb->priority = %x\n",
+ skb->priority);
if (wme_downgrade_ac(skb))
break;
- printk(KERN_INFO "converted skb->priority = %x\n",
+ netdev_info(ieee->dev, "converted skb->priority = %x\n",
skb->priority);
}
qos_ctl |= skb->priority;
/* Determine amount of payload per fragment. Regardless of if
* this stack is providing the full 802.11 header, one will
* eventually be affixed to this fragment -- so we must account
- * for it when determining the amount of payload space. */
+ * for it when determining the amount of payload space.
+ */
bytes_per_frag = frag_size - hdr_len;
if (ieee->config &
(CFG_RTLLIB_COMPUTE_FCS | CFG_RTLLIB_RESERVE_FCS))
bytes_per_frag -= RTLLIB_FCS_LEN;
/* Each fragment may need to have room for encrypting
- * pre/postfix */
+ * pre/postfix
+ */
if (encrypt) {
bytes_per_frag -= crypt->ops->extra_mpdu_prefix_len +
crypt->ops->extra_mpdu_postfix_len +
crypt->ops->extra_msdu_postfix_len;
}
/* Number of fragments is the total bytes_per_frag /
- * payload_per_fragment */
+ * payload_per_fragment
+ */
nr_frags = bytes / bytes_per_frag;
bytes_last_frag = bytes % bytes_per_frag;
if (bytes_last_frag)
/* When we allocate the TXB we allocate enough space for the
* reserve and full fragment bytes (bytes_per_frag doesn't
- * include prefix, postfix, header, FCS, etc.) */
+ * include prefix, postfix, header, FCS, etc.)
+ */
txb = rtllib_alloc_txb(nr_frags, frag_size +
ieee->tx_headroom, GFP_ATOMIC);
if (unlikely(!txb)) {
- printk(KERN_WARNING "%s: Could not allocate TXB\n",
- ieee->dev->name);
+ netdev_warn(ieee->dev, "Could not allocate TXB\n");
goto failed;
}
txb->encrypted = encrypt;
memcpy(frag_hdr, &header, hdr_len);
/* If this is not the last fragment, then add the
- * MOREFRAGS bit to the frame control */
+ * MOREFRAGS bit to the frame control
+ */
if (i != nr_frags - 1) {
frag_hdr->frame_ctl = cpu_to_le16(
fc | RTLLIB_FCTL_MOREFRAGS);
/* Encryption routine will move the header forward in
* order to insert the IV between the header and the
- * payload */
+ * payload
+ */
if (encrypt)
rtllib_encrypt_fragment(ieee, skb_frag,
hdr_len);
}
} else {
if (unlikely(skb->len < sizeof(struct rtllib_hdr_3addr))) {
- printk(KERN_WARNING "%s: skb too small (%d).\n",
- ieee->dev->name, skb->len);
+ netdev_warn(ieee->dev, "skb too small (%d).\n",
+ skb->len);
goto success;
}
txb = rtllib_alloc_txb(1, skb->len, GFP_ATOMIC);
if (!txb) {
- printk(KERN_WARNING "%s: Could not allocate TXB\n",
- ieee->dev->name);
+ netdev_warn(ieee->dev, "Could not allocate TXB\n");
goto failed;
}
if (tcb_desc->bMulticast || tcb_desc->bBroadcast)
tcb_desc->data_rate = ieee->basic_rate;
else
- tcb_desc->data_rate = CURRENT_RATE(ieee->mode,
- ieee->rate, ieee->HTCurrentOperaRate);
+ tcb_desc->data_rate = rtllib_current_rate(ieee);
if (bdhcp) {
if (ieee->pHTInfo->IOTAction &
#include <linux/wireless.h>
#include <linux/kmod.h>
#include <linux/module.h>
-
+#include <linux/etherdevice.h>
#include "rtllib.h"
struct modes_unit {
char *mode_string;
/* First entry *MUST* be the AP MAC address */
iwe.cmd = SIOCGIWAP;
iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
- memcpy(iwe.u.ap_addr.sa_data, network->bssid, ETH_ALEN);
+ ether_addr_copy(iwe.u.ap_addr.sa_data, network->bssid);
start = iwe_stream_add_event_rsl(info, start, stop,
&iwe, IW_EV_ADDR_LEN);
/* Remaining entries will be displayed in the order we provide them */
iwe.cmd = SIOCGIWESSID;
iwe.u.data.flags = 1;
if (network->ssid_len > 0) {
- iwe.u.data.length = min(network->ssid_len, (u8)32);
+ iwe.u.data.length = min_t(u8, network->ssid_len, 32);
start = iwe_stream_add_point_rsl(info, start, stop, &iwe,
network->ssid);
} else if (network->hidden_ssid_len == 0) {
start = iwe_stream_add_point_rsl(info, start, stop,
&iwe, "<hidden>");
} else {
- iwe.u.data.length = min(network->hidden_ssid_len, (u8)32);
+ iwe.u.data.length = min_t(u8, network->hidden_ssid_len, 32);
start = iwe_stream_add_point_rsl(info, start, stop, &iwe,
network->hidden_ssid);
}
/* Add frequency/channel */
iwe.cmd = SIOCGIWFREQ;
-/* iwe.u.freq.m = rtllib_frequency(network->channel, network->mode);
- iwe.u.freq.e = 3; */
iwe.u.freq.m = network->channel;
iwe.u.freq.e = 0;
iwe.u.freq.i = 0;
}
/* Add EXTRA: Age to display seconds since last beacon/probe response
- * for given network. */
+ * for given network.
+ */
iwe.cmd = IWEVCUSTOM;
p = custom;
p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
ev = rtl819x_translate_scan(ieee, ev, stop, network,
info);
else
- RTLLIB_DEBUG_SCAN("Not showing network '%s ("
- " %pM)' due to age (%lums).\n",
+ RTLLIB_DEBUG_SCAN("Not showing network '%s ( %pM)' due to age (%lums).\n",
escape_essid(network->ssid,
network->ssid_len),
network->bssid,
RTLLIB_DEBUG_WX("Disabling encryption.\n");
/* Check all the keys to see if any are still configured,
- * and if no key index was provided, de-init them all */
+ * and if no key index was provided, de-init them all
+ */
for (i = 0; i < NUM_WEP_KEYS; i++) {
if (ieee->crypt_info.crypt[i] != NULL) {
if (key_provided)
break;
lib80211_crypt_delayed_deinit(&ieee->crypt_info,
- &ieee->crypt_info.crypt[i]);
+ &ieee->crypt_info.crypt[i]);
}
}
if (*crypt != NULL && (*crypt)->ops != NULL &&
strcmp((*crypt)->ops->name, "R-WEP") != 0) {
/* changing to use WEP; deinit previously used algorithm
- * on this key */
+ * on this key
+ */
lib80211_crypt_delayed_deinit(&ieee->crypt_info, crypt);
}
kfree(new_crypt);
new_crypt = NULL;
- printk(KERN_WARNING "%s: could not initialize WEP: "
- "load module rtllib_crypt_wep\n",
- dev->name);
+ netdev_warn(dev,
+ "%s: could not initialize WEP: load module rtllib_crypt_wep\n",
+ dev->name);
return -EOPNOTSUPP;
}
*crypt = new_crypt;
(*crypt)->priv);
sec.flags |= (1 << key);
/* This ensures a key will be activated if no key is
- * explicitly set */
+ * explicitly set
+ */
if (key == sec.active_key)
sec.flags |= SEC_ACTIVE_KEY;
ieee->crypt_info.tx_keyidx = key;
NULL, (*crypt)->priv);
if (len == 0) {
/* Set a default key of all 0 */
- printk(KERN_INFO "Setting key %d to all zero.\n",
+ netdev_info(ieee->dev, "Setting key %d to all zero.\n",
key);
- RTLLIB_DEBUG_WX("Setting key %d to all zero.\n",
- key);
memset(sec.keys[key], 0, 13);
(*crypt)->ops->set_key(sec.keys[key], 13, NULL,
(*crypt)->priv);
/* No key data - just set the default TX key index */
if (key_provided) {
- RTLLIB_DEBUG_WX(
- "Setting key %d to default Tx key.\n", key);
+ RTLLIB_DEBUG_WX("Setting key %d to default Tx key.\n",
+ key);
ieee->crypt_info.tx_keyidx = key;
sec.active_key = key;
sec.flags |= SEC_ACTIVE_KEY;
"OPEN" : "SHARED KEY");
/* For now we just support WEP, so only set that security level...
- * TODO: When WPA is added this is one place that needs to change */
+ * TODO: When WPA is added this is one place that needs to change
+ */
sec.flags |= SEC_LEVEL;
sec.level = SEC_LEVEL_1; /* 40 and 104 bit WEP */
* generate new IEEE 802.11 authentication which may end up in looping
* with IEEE 802.1X. If your hardware requires a reset after WEP
* configuration (for example... Prism2), implement the reset_port in
- * the callbacks structures used to initialize the 802.11 stack. */
+ * the callbacks structures used to initialize the 802.11 stack.
+ */
if (ieee->reset_on_keychange &&
ieee->iw_mode != IW_MODE_INFRA &&
ieee->reset_port && ieee->reset_port(dev)) {
- printk(KERN_DEBUG "%s: reset_port failed\n", dev->name);
+ netdev_dbg(dev, "%s: reset_port failed\n", dev->name);
return -EINVAL;
}
return 0;
ret = -EINVAL;
goto done;
}
- printk(KERN_INFO "alg name:%s\n", alg);
+ netdev_info(dev, "alg name:%s\n", alg);
ops = lib80211_get_crypto_ops(alg);
if (ops == NULL) {
ops = lib80211_get_crypto_ops(alg);
}
if (ops == NULL) {
- RTLLIB_DEBUG_WX("%s: unknown crypto alg %d\n",
- dev->name, ext->alg);
- printk(KERN_INFO "========>unknown crypto alg %d\n", ext->alg);
+ netdev_info(dev, "========>unknown crypto alg %d\n", ext->alg);
ret = -EINVAL;
goto done;
}
if (ext->key_len > 0 && (*crypt)->ops->set_key &&
(*crypt)->ops->set_key(ext->key, ext->key_len, ext->rx_seq,
(*crypt)->priv) < 0) {
- RTLLIB_DEBUG_WX("%s: key setting failed\n", dev->name);
- printk(KERN_INFO "key setting failed\n");
+ netdev_info(dev, "key setting failed\n");
ret = -EINVAL;
goto done;
}
case IW_MLME_DISASSOC:
if (deauth)
- printk(KERN_INFO "disauth packet !\n");
+ netdev_info(ieee->dev, "disauth packet !\n");
else
- printk(KERN_INFO "dis associate packet!\n");
+ netdev_info(ieee->dev, "dis associate packet!\n");
ieee->cannot_notify = true;
case IW_AUTH_CIPHER_PAIRWISE:
case IW_AUTH_CIPHER_GROUP:
case IW_AUTH_KEY_MGMT:
- /*
- * Host AP driver does not use these parameters and allows
+ /* Host AP driver does not use these parameters and allows
* wpa_supplicant to control them internally.
*/
break;
{
PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(ieee);
- pDot11dInfo->bEnabled = 0;
+ pDot11dInfo->bEnabled = false;
pDot11dInfo->State = DOT11D_STATE_NONE;
pDot11dInfo->CountryIeLen = 0;
#define CIE_WATCHDOG_TH 1
#define GET_CIE_WATCHDOG(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog)
-#define RESET_CIE_WATCHDOG(__pIeeeDev) GET_CIE_WATCHDOG(__pIeeeDev) = 0
+#define RESET_CIE_WATCHDOG(__pIeeeDev) (GET_CIE_WATCHDOG(__pIeeeDev) = 0)
#define UPDATE_CIE_WATCHDOG(__pIeeeDev) (++GET_CIE_WATCHDOG(__pIeeeDev))
#define IS_DOT11D_STATE_DONE(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE)
#define IEEE80211_DEBUG_RX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_RX, f, ## a)
#define IEEE80211_DEBUG_QOS(f, a...) IEEE80211_DEBUG(IEEE80211_DL_QOS, f, ## a)
-#ifdef CONFIG_IEEE80211_DEBUG
-/* Added by Annie, 2005-11-22. */
-#define MAX_STR_LEN 64
-/* I want to see ASCII 33 to 126 only. Otherwise, I print '?'. Annie, 2005-11-22.*/
-#define PRINTABLE(_ch) (_ch>'!' && _ch<'~')
-#define IEEE80211_PRINT_STR(_Comp, _TitleString, _Ptr, _Len) \
- if((_Comp) & level) \
- { \
- int __i; \
- u8 buffer[MAX_STR_LEN]; \
- int length = (_Len<MAX_STR_LEN)? _Len : (MAX_STR_LEN-1) ; \
- memset(buffer, 0, MAX_STR_LEN); \
- memcpy(buffer, (u8 *)_Ptr, length ); \
- for( __i=0; __i<MAX_STR_LEN; __i++ ) \
- { \
- if( !PRINTABLE(buffer[__i]) ) buffer[__i] = '?'; \
- } \
- buffer[length] = '\0'; \
- printk("Rtl819x: "); \
- printk(_TitleString); \
- printk(": %d, <%s>\n", _Len, buffer); \
- }
-#else
-#define IEEE80211_PRINT_STR(_Comp, _TitleString, _Ptr, _Len) do {} while (0)
-#endif
-
-#include <linux/netdevice.h>
#include <linux/if_arp.h> /* ARPHRD_ETHER */
#ifndef WIRELESS_SPY
u8 ctrl; /* always 0x03 */
u8 oui[P80211_OUI_LEN]; /* organizational universal id */
-} __attribute__ ((packed));
+} __packed;
#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
u8 keys[WEP_KEYS][SCM_KEY_LEN];
u8 level;
u16 flags;
-} __attribute__ ((packed));
+} __packed;
/*
__le16 frame_ctl;
__le16 duration_id;
u8 payload[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_hdr_1addr {
__le16 frame_ctl;
__le16 duration_id;
u8 addr1[ETH_ALEN];
u8 payload[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_hdr_2addr {
__le16 frame_ctl;
u8 addr1[ETH_ALEN];
u8 addr2[ETH_ALEN];
u8 payload[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_hdr_3addr {
__le16 frame_ctl;
u8 addr3[ETH_ALEN];
__le16 seq_ctl;
u8 payload[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_hdr_4addr {
__le16 frame_ctl;
__le16 seq_ctl;
u8 addr4[ETH_ALEN];
u8 payload[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_hdr_3addrqos {
__le16 frame_ctl;
__le16 seq_ctl;
u8 payload[0];
__le16 qos_ctl;
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_hdr_4addrqos {
__le16 frame_ctl;
u8 addr4[ETH_ALEN];
u8 payload[0];
__le16 qos_ctl;
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_info_element {
u8 id;
u8 len;
u8 data[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_authentication {
struct ieee80211_hdr_3addr header;
__le16 status;
/*challenge*/
struct ieee80211_info_element info_element[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_disassoc {
struct ieee80211_hdr_3addr header;
__le16 reason;
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_probe_request {
struct ieee80211_hdr_3addr header;
/* SSID, supported rates */
struct ieee80211_info_element info_element[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_probe_response {
struct ieee80211_hdr_3addr header;
/* SSID, supported rates, FH params, DS params,
* CF params, IBSS params, TIM (if beacon), RSN */
struct ieee80211_info_element info_element[0];
-} __attribute__ ((packed));
+} __packed;
/* Alias beacon for probe_response */
#define ieee80211_beacon ieee80211_probe_response
__le16 listen_interval;
/* SSID, supported rates, RSN */
struct ieee80211_info_element info_element[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_reassoc_request_frame {
struct ieee80211_hdr_3addr header;
u8 current_ap[ETH_ALEN];
/* SSID, supported rates, RSN */
struct ieee80211_info_element info_element[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_assoc_response_frame {
struct ieee80211_hdr_3addr header;
__le16 status;
__le16 aid;
struct ieee80211_info_element info_element[0]; /* supported rates */
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_txb {
u8 nr_frags;
struct ieee80211_drv_agg_txb {
u8 nr_drv_agg_frames;
struct sk_buff *tx_agg_frames[MAX_TX_AGG_COUNT];
-}__attribute__((packed));
+} __packed;
#define MAX_SUBFRAME_COUNT 64
struct ieee80211_rxb {
struct sk_buff *subframes[MAX_SUBFRAME_COUNT];
u8 dst[ETH_ALEN];
u8 src[ETH_ALEN];
-}__attribute__((packed));
+} __packed;
typedef union _frameqos {
u16 shortdata;
u8 qui_subtype;
u8 version;
u8 ac_info;
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_qos_ac_parameter {
u8 aci_aifsn;
u8 ecw_min_max;
__le16 tx_op_limit;
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_qos_parameter_info {
struct ieee80211_qos_information_element info_element;
u8 reserved;
struct ieee80211_qos_ac_parameter ac_params_record[QOS_QUEUE_NUM];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_qos_parameters {
__le16 cw_min[QOS_QUEUE_NUM];
u8 aifs[QOS_QUEUE_NUM];
u8 flag[QOS_QUEUE_NUM];
__le16 tx_op_limit[QOS_QUEUE_NUM];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_qos_data {
struct ieee80211_qos_parameters parameters;
struct ieee80211_tim_parameters {
u8 tim_count;
u8 tim_period;
-} __attribute__ ((packed));
+} __packed;
//#else
struct ieee80211_wmm_ac_param {
u8 ac_dir_tid;
u8 ac_up_psb;
u8 reserved;
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_wmm_tspec_elem {
struct ieee80211_wmm_ts_info ts_info;
u32 min_phy_rate;
u16 surp_band_allow;
u16 medium_time;
-}__attribute__((packed));
+} __packed;
enum eap_type {
EAP_PACKET = 0,
EAPOL_START,
u8 version;
u8 type;
u16 length;
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_softmac_stats{
unsigned int rx_ass_ok;
struct ieee80211_info_element_hdr {
u8 id;
u8 len;
-} __attribute__ ((packed));
+} __packed;
/*
* These are the data types that can make up management packets
u16 listen_interval;
struct {
u16 association_id:14, reserved:2;
- } __attribute__ ((packed));
+ } __packed;
u32 time_stamp[2];
u16 reason;
u16 status;
u8 ether_dhost[ETHER_ADDR_LEN];
u8 ether_shost[ETHER_ADDR_LEN];
u16 ether_type;
-} __attribute__((packed));
+} __packed;
#ifndef ETHERTYPE_PAE
#define ETHERTYPE_PAE 0x888e /* EAPOL PAE/802.1x */
#define ETHERTYPE_IP 0x0800 /* IP protocol */
#endif
-typedef struct _bss_ht{
-
- bool support_ht;
-
- // HT related elements
- u8 ht_cap_buf[32];
- u16 ht_cap_len;
- u8 ht_info_buf[32];
- u16 ht_info_len;
-
- HT_SPEC_VER ht_spec_ver;
- //HT_CAPABILITY_ELE bdHTCapEle;
- //HT_INFORMATION_ELE bdHTInfoEle;
-
- bool aggregation;
- bool long_slot_time;
-}bss_ht, *pbss_ht;
-
typedef enum _erp_t{
ERP_NonERPpresent = 0x01,
ERP_UseProtection = 0x02,
*
*/
-//#include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
-#include <asm/string.h>
-#include <asm/errno.h>
+#include <linux/string.h>
+#include <linux/errno.h>
#include "ieee80211.h"
spin_lock_irqsave(&ieee->lock, flags);
ieee80211_crypt_deinit_entries(ieee, 0);
if (!list_empty(&ieee->crypt_deinit_list)) {
- printk(KERN_DEBUG "%s: entries remaining in delayed crypt "
- "deletion list\n", ieee->dev->name);
+ netdev_dbg(ieee->dev, "%s: entries remaining in delayed crypt deletion list\n",
+ ieee->dev->name);
ieee->crypt_deinit_timer.expires = jiffies + HZ;
add_timer(&ieee->crypt_deinit_timer);
}
list_add(&alg->list, &hcrypt->algs);
spin_unlock_irqrestore(&hcrypt->lock, flags);
- printk(KERN_DEBUG "ieee80211_crypt: registered algorithm '%s'\n",
+ pr_debug("ieee80211_crypt: registered algorithm '%s'\n",
ops->name);
return 0;
spin_unlock_irqrestore(&hcrypt->lock, flags);
if (del_alg) {
- printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm "
- "'%s'\n", ops->name);
+ pr_debug("ieee80211_crypt: unregistered algorithm '%s'\n",
+ ops->name);
kfree(del_alg);
}
struct ieee80211_crypto_alg *alg =
(struct ieee80211_crypto_alg *) ptr;
list_del(ptr);
- printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm "
- "'%s' (deinit)\n", alg->ops->name);
+ pr_debug("ieee80211_crypt: unregistered algorithm '%s' (deinit)\n",
+ alg->ops->name);
kfree(alg);
}
* more details.
*/
-//#include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/netdevice.h>
#include <linux/if_ether.h>
#include <linux/if_arp.h>
-#include <asm/string.h>
+#include <linux/string.h>
#include <linux/wireless.h>
#include "ieee80211.h"
qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
(WLAN_FC_GET_STYPE(fc) & 0x08));
*/
- // fixed by David :2006.9.6
- qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
- (WLAN_FC_GET_STYPE(fc) & 0x80));
+ /* fixed by David :2006.9.6 */
+ qc_included = (WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
+ (WLAN_FC_GET_STYPE(fc) & 0x80);
aad_len = 22;
if (a4_included)
aad_len += 6;
pos = skb_push(skb, CCMP_HDR_LEN);
memmove(pos, pos + CCMP_HDR_LEN, hdr_len);
pos += hdr_len;
-// mic = skb_put(skb, CCMP_MIC_LEN);
+ /* mic = skb_put(skb, CCMP_MIC_LEN); */
i = CCMP_PN_LEN - 1;
while (i >= 0) {
u8 *e = key->tx_e;
u8 *s0 = key->tx_s0;
- //mic is moved to here by john
+ /* mic is moved to here by john */
mic = skb_put(skb, CCMP_MIC_LEN);
ccmp_init_blocks(key->tfm, hdr, key->tx_pn, data_len, b0, b, s0);
void ieee80211_ccmp_null(void)
{
-// printk("============>%s()\n", __func__);
+ /* printk("============>%s()\n", __func__); */
return;
}
* more details.
*/
-//#include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/netdevice.h>
#include <linux/if_ether.h>
#include <linux/if_arp.h>
-#include <asm/string.h>
+#include <linux/string.h>
#include "ieee80211.h"
* more details.
*/
-//#include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/skbuff.h>
-#include <asm/string.h>
+#include <linux/string.h>
#include "ieee80211.h"
priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->tx_tfm)) {
- printk(KERN_DEBUG "ieee80211_crypt_wep: could not allocate "
+ pr_debug("ieee80211_crypt_wep: could not allocate "
"crypto API arc4\n");
priv->tx_tfm = NULL;
goto fail;
}
priv->rx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->rx_tfm)) {
- printk(KERN_DEBUG "ieee80211_crypt_wep: could not allocate "
+ pr_debug("ieee80211_crypt_wep: could not allocate "
"crypto API arc4\n");
priv->rx_tfm = NULL;
goto fail;
u32 crc;
u8 *icv;
struct scatterlist sg;
+
if (skb_headroom(skb) < 4 || skb_tailroom(skb) < 4 ||
skb->len < hdr_len)
return -1;
* can be used to speedup attacks, so avoid using them. */
if ((wep->iv & 0xff00) == 0xff00) {
u8 B = (wep->iv >> 16) & 0xff;
+
if (B >= 3 && B < klen)
wep->iv += 0x0100;
}
u32 crc;
u8 icv[4];
struct scatterlist sg;
+
if (skb->len < hdr_len + 8)
return -1;
static char *prism2_wep_print_stats(char *p, void *priv)
{
struct prism2_wep_data *wep = priv;
+
p += sprintf(p, "key[%d] alg=WEP len=%d\n",
wep->key_idx, wep->key_len);
return p;
*******************************************************************************/
#include <linux/compiler.h>
-//#include <linux/config.h>
+/* #include <linux/config.h> */
#include <linux/errno.h>
#include <linux/if_arp.h>
#include <linux/in6.h>
ieee->ieee802_1x = 1; /* Default to supporting 802.1x */
INIT_LIST_HEAD(&ieee->crypt_deinit_list);
- init_timer(&ieee->crypt_deinit_timer);
- ieee->crypt_deinit_timer.data = (unsigned long)ieee;
- ieee->crypt_deinit_timer.function = ieee80211_crypt_deinit_handler;
+ setup_timer(&ieee->crypt_deinit_timer,
+ ieee80211_crypt_deinit_handler, (unsigned long)ieee);
spin_lock_init(&ieee->lock);
spin_lock_init(&ieee->wpax_suitlist_lock);
spin_lock_init(&ieee->bw_spinlock);
spin_lock_init(&ieee->reorder_spinlock);
- //added by WB
+ /* added by WB */
atomic_set(&(ieee->atm_chnlop), 0);
atomic_set(&(ieee->atm_swbw), 0);
ieee->ieee802_1x = 1;
ieee->raw_tx = 0;
//ieee->hwsec_support = 1; //defalt support hw security. //use module_param instead.
- ieee->hwsec_active = 0; //disable hwsec, switch it on when necessary.
+ ieee->hwsec_active = 0; /* disable hwsec, switch it on when necessary. */
ieee80211_softmac_init(ieee);
goto failed;
}
HTUpdateDefaultSetting(ieee);
- HTInitializeHTInfo(ieee); //may move to other place.
+ HTInitializeHTInfo(ieee); /* may move to other place. */
TSInitialize(ieee);
for (i = 0; i < IEEE_IBSS_MAC_HASH_SIZE; i++)
ieee->last_packet_time[i] = 0;
}
-//These function were added to load crypte module autoly
+/* These function were added to load crypte module autoly */
ieee80211_tkip_null();
ieee80211_wep_null();
ieee80211_ccmp_null();
{
struct ieee80211_device *ieee = netdev_priv(dev);
int i;
- //struct list_head *p, *q;
+ /* struct list_head *p, *q; */
// del_timer_sync(&ieee->SwBwTimer);
kfree(ieee->pHTInfo);
ieee->pHTInfo = NULL;
// IEEE80211_DL_REORDER|
// IEEE80211_DL_TRACE |
//IEEE80211_DL_DATA |
- IEEE80211_DL_ERR //awayls open this flags to show error out
+ IEEE80211_DL_ERR /* awayls open this flags to show error out */
;
static struct proc_dir_entry *ieee80211_proc;
static int show_debug_level(struct seq_file *m, void *v)
{
- return seq_printf(m, "0x%08X\n", ieee80211_debug_level);
+ seq_printf(m, "0x%08X\n", ieee80211_debug_level);
+
+ return 0;
}
static ssize_t write_debug_level(struct file *file, const char __user *buffer,
" proc directory\n");
return -EIO;
}
- e = proc_create("debug_level", S_IRUGO | S_IWUSR,
+ e = proc_create("debug_level", S_IRUGO | S_IWUSR,
ieee80211_proc, &fops);
if (!e) {
remove_proc_entry(DRV_NAME, init_net.proc_net);
}
}
-#include <linux/moduleparam.h>
module_param(debug, int, 0444);
MODULE_PARM_DESC(debug, "debug output mask");
#endif
#include <linux/compiler.h>
-//#include <linux/config.h>
#include <linux/errno.h>
#include <linux/if_arp.h>
#include <linux/in6.h>
#include <linux/types.h>
#include <linux/wireless.h>
#include <linux/etherdevice.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#include <linux/ctype.h>
#include "ieee80211.h"
skb_pull(skb, ieee80211_get_hdrlen(fc));
skb->pkt_type = PACKET_OTHERHOST;
- skb->protocol = __constant_htons(ETH_P_80211_RAW);
+ skb->protocol = htons(ETH_P_80211_RAW);
memset(skb->cb, 0, sizeof(skb->cb));
netif_rx(skb);
}
rx_stats->len = skb->len;
ieee80211_rx_mgt(ieee,(struct ieee80211_hdr_4addr *)skb->data,rx_stats);
- //if ((ieee->state == IEEE80211_LINKED) && (memcmp(hdr->addr3, ieee->current_network.bssid, ETH_ALEN)))
- if ((memcmp(hdr->addr1, ieee->dev->dev_addr, ETH_ALEN)))//use ADDR1 to perform address matching for Management frames
+ /* if ((ieee->state == IEEE80211_LINKED) && (memcmp(hdr->addr3, ieee->current_network.bssid, ETH_ALEN))) */
+ if ((memcmp(hdr->addr1, ieee->dev->dev_addr, ETH_ALEN)))/* use ADDR1 to perform address matching for Management frames */
{
dev_kfree_skb_any(skb);
return 0;
bool bMatchWinStart = false, bPktInBuf = false;
IEEE80211_DEBUG(IEEE80211_DL_REORDER,"%s(): Seq is %d,pTS->RxIndicateSeq is %d, WinSize is %d\n",__func__,SeqNum,pTS->RxIndicateSeq,WinSize);
/* Rx Reorder initialize condition.*/
- if(pTS->RxIndicateSeq == 0xffff) {
+ if (pTS->RxIndicateSeq == 0xffff) {
pTS->RxIndicateSeq = SeqNum;
}
/* Drop out the packet which SeqNum is smaller than WinStart */
- if(SN_LESS(SeqNum, pTS->RxIndicateSeq)) {
+ if (SN_LESS(SeqNum, pTS->RxIndicateSeq)) {
IEEE80211_DEBUG(IEEE80211_DL_REORDER,"Packet Drop! IndicateSeq: %d, NewSeq: %d\n",
pTS->RxIndicateSeq, SeqNum);
pHTInfo->RxReorderDropCounter++;
SN_EQUAL(pReorderEntry->SeqNum, pTS->RxIndicateSeq))
{
/* This protect buffer from overflow. */
- if(index >= REORDER_WIN_SIZE) {
+ if (index >= REORDER_WIN_SIZE) {
IEEE80211_DEBUG(IEEE80211_DL_ERR, "RxReorderIndicatePacket(): Buffer overflow!! \n");
bPktInBuf = true;
break;
}
/* Handling pending timer. Set this timer to prevent from long time Rx buffering.*/
- if(index>0) {
+ if (index>0) {
// Cancel previous pending timer.
// del_timer_sync(&pTS->RxPktPendingTimer);
pTS->RxTimeoutIndicateSeq = 0xffff;
ieee80211_indicate_packets(ieee, prxbIndicateArray, index);
}
- if(bPktInBuf && pTS->RxTimeoutIndicateSeq==0xffff) {
+ if (bPktInBuf && pTS->RxTimeoutIndicateSeq==0xffff) {
// Set new pending timer.
IEEE80211_DEBUG(IEEE80211_DL_REORDER,"%s(): SET rx timeout timer\n", __func__);
pTS->RxTimeoutIndicateSeq = pTS->RxIndicateSeq;
/* just for debug purpose */
SeqNum = WLAN_GET_SEQ_SEQ(le16_to_cpu(hdr->seq_ctl));
- if((IEEE80211_QOS_HAS_SEQ(fc))&&\
+ if ((IEEE80211_QOS_HAS_SEQ(fc))&&\
(((frameqos *)(skb->data + IEEE80211_3ADDR_LEN))->field.reserved)) {
bIsAggregateFrame = true;
}
- if(IEEE80211_QOS_HAS_SEQ(fc)) {
+ if (IEEE80211_QOS_HAS_SEQ(fc)) {
LLCOffset += 2;
}
- if(rx_stats->bContainHTC) {
+ if (rx_stats->bContainHTC) {
LLCOffset += sHTCLng;
}
//printk("ChkLength = %d\n", LLCOffset);
//==m==>change the length order
nSubframe_Length = (nSubframe_Length>>8) + (nSubframe_Length<<8);
- if(skb->len<(ETHERNET_HEADER_SIZE + nSubframe_Length)) {
+ if (skb->len<(ETHERNET_HEADER_SIZE + nSubframe_Length)) {
printk("%s: A-MSDU parse error!! pRfd->nTotalSubframe : %d\n",\
__func__, rxb->nr_subframes);
printk("%s: A-MSDU parse error!! Subframe Length: %d\n",__func__, nSubframe_Length);
memcpy(data_ptr, skb->data, nSubframe_Length);
#endif
rxb->subframes[rxb->nr_subframes++] = sub_skb;
- if(rxb->nr_subframes >= MAX_SUBFRAME_COUNT) {
+ if (rxb->nr_subframes >= MAX_SUBFRAME_COUNT) {
IEEE80211_DEBUG_RX("ParseSubframe(): Too many Subframes! Packets dropped!\n");
break;
}
skb_pull(skb, nSubframe_Length);
- if(skb->len != 0) {
+ if (skb->len != 0) {
nPadding_Length = 4 - ((nSubframe_Length + ETHERNET_HEADER_SIZE) % 4);
- if(nPadding_Length == 4) {
+ if (nPadding_Length == 4) {
nPadding_Length = 0;
}
- if(skb->len < nPadding_Length) {
+ if (skb->len < nPadding_Length) {
return 0;
}
frag = WLAN_GET_SEQ_FRAG(sc);
hdrlen = ieee80211_get_hdrlen(fc);
- if(HTCCheck(ieee, skb->data))
+ if (HTCCheck(ieee, skb->data))
{
if(net_ratelimit())
printk("find HTCControl\n");
hdrlen += 4;
- rx_stats->bContainHTC = 1;
+ rx_stats->bContainHTC = true;
}
//IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA, skb->data, skb->len);
}
*/
//added by amy for reorder
- if(ieee->current_network.qos_data.active && IsQoSDataFrame(skb->data)
+ if (ieee->current_network.qos_data.active && IsQoSDataFrame(skb->data)
&& !is_multicast_ether_addr(hdr->addr1))
{
TID = Frame_QoSTID(skb->data);
SeqNum = WLAN_GET_SEQ_SEQ(sc);
GetTs(ieee,(PTS_COMMON_INFO *) &pTS,hdr->addr2,TID,RX_DIR,true);
- if(TID !=0 && TID !=3)
+ if (TID !=0 && TID !=3)
{
ieee->bis_any_nonbepkts = true;
}
payload = skb->data + hdrlen;
//ethertype = (payload[6] << 8) | payload[7];
rxb = kmalloc(sizeof(struct ieee80211_rxb), GFP_ATOMIC);
- if(rxb == NULL)
+ if (rxb == NULL)
{
IEEE80211_DEBUG(IEEE80211_DL_ERR,"%s(): kmalloc rxb error\n",__func__);
goto rx_dropped;
stats->rx_packets++;
stats->rx_bytes += sub_skb->len;
- if(is_multicast_ether_addr(dst)) {
+ if (is_multicast_ether_addr(dst)) {
stats->multicast++;
}
u8 *addr2
)
{
- if(IS_DOT11D_ENABLE(ieee))
+ if (IS_DOT11D_ENABLE(ieee))
{
- if(info_element->len!= 0)
+ if (info_element->len!= 0)
{
memcpy(network->CountryIeBuf, info_element->data, info_element->len);
network->CountryIeLen = info_element->len;
- if(!IS_COUNTRY_IE_VALID(ieee))
+ if (!IS_COUNTRY_IE_VALID(ieee))
{
Dot11d_UpdateCountryIe(ieee, addr2, info_element->len, info_element->data);
}
// some AP (e.g. Cisco 1242) don't include country IE in their
// probe response frame.
//
- if(IS_EQUAL_CIE_SRC(ieee, addr2) )
+ if (IS_EQUAL_CIE_SRC(ieee, addr2) )
{
UPDATE_CIE_WATCHDOG(ieee);
}
#ifdef CONFIG_IEEE80211_DEBUG
p += snprintf(p, sizeof(rates_str) -
(p - rates_str), "%02X ",
- network->rates[i]);
+ network->rates_ex[i]);
#endif
if (ieee80211_is_ofdm_rate
(info_element->data[i])) {
//if(tmp_htcap_len !=0 || tmp_htinfo_len != 0)
{
- if((info_element->len >= 3 &&
+ if ((info_element->len >= 3 &&
info_element->data[0] == 0x00 &&
info_element->data[1] == 0x05 &&
info_element->data[2] == 0xb5) ||
else
network->cisco_cap_exist = false;
//added by amy for LEAP of cisco
- if(info_element->len > 4 &&
+ if (info_element->len > 4 &&
info_element->data[0] == 0x00 &&
info_element->data[1] == 0x40 &&
info_element->data[2] == 0x96 &&
network->bCcxRmEnable = false;
}
}
- if(info_element->len > 4 &&
+ if (info_element->len > 4 &&
info_element->data[0] == 0x00 &&
info_element->data[1] == 0x40 &&
info_element->data[2] == 0x96 &&
dst->rates_len = src->rates_len;
memcpy(dst->rates_ex, src->rates_ex, src->rates_ex_len);
dst->rates_ex_len = src->rates_ex_len;
- if(src->ssid_len > 0)
+ if (src->ssid_len > 0)
{
memset(dst->ssid, 0, dst->ssid_len);
dst->ssid_len = src->ssid_len;
dst->qos_data.param_count = src->qos_data.param_count;
}
- if(dst->qos_data.supported == 1) {
+ if (dst->qos_data.supported == 1) {
dst->QoS_Enable = 1;
if(dst->ssid_len)
IEEE80211_DEBUG_QOS
/* dst->last_associate is not overwritten */
dst->wmm_info = src->wmm_info; //sure to exist in beacon or probe response frame.
- if(src->wmm_param[0].ac_aci_acm_aifsn|| \
+ if (src->wmm_param[0].ac_aci_acm_aifsn|| \
src->wmm_param[1].ac_aci_acm_aifsn|| \
src->wmm_param[2].ac_aci_acm_aifsn|| \
src->wmm_param[3].ac_aci_acm_aifsn) {
if (!IsLegalChannel(ieee, network.channel))
return;
- if(ieee->bGlobalDomain)
+ if (ieee->bGlobalDomain)
{
if (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == IEEE80211_STYPE_PROBE_RESP)
{
else
{
// Filter over channel ch12~14
- if(network.channel > 11)
+ if (network.channel > 11)
{
printk("GetScanInfo(): For Global Domain, filter probe response at channel(%d).\n", network.channel);
return;
else
{
// Filter over channel ch12~14
- if(network.channel > 14)
+ if (network.channel > 14)
{
printk("GetScanInfo(): For Global Domain, filter beacon at channel(%d).\n",network.channel);
return;
spin_lock_irqsave(&ieee->lock, flags);
- if(is_same_network(&ieee->current_network, &network, ieee)) {
+ if (is_same_network(&ieee->current_network, &network, ieee)) {
update_network(&ieee->current_network, &network);
- if((ieee->current_network.mode == IEEE_N_24G || ieee->current_network.mode == IEEE_G)
+ if ((ieee->current_network.mode == IEEE_N_24G || ieee->current_network.mode == IEEE_G)
&& ieee->current_network.berp_info_valid){
if(ieee->current_network.erp_value& ERP_UseProtection)
ieee->current_network.buseprotection = true;
spin_unlock_irqrestore(&ieee->lock, flags);
if (is_beacon(beacon->header.frame_ctl)&&is_same_network(&ieee->current_network, &network, ieee)&&\
(ieee->state == IEEE80211_LINKED)) {
- if(ieee->handle_beacon != NULL) {
+ if (ieee->handle_beacon != NULL) {
ieee->handle_beacon(ieee->dev,beacon,&ieee->current_network);
}
}
{
u8 *tag = *tag_p;
- if (ieee->modulation & IEEE80211_CCK_MODULATION){
+ if (ieee->modulation & IEEE80211_CCK_MODULATION) {
*tag++ = MFIE_TYPE_RATES;
*tag++ = 4;
*tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB;
{
u8 *tag = *tag_p;
- if (ieee->modulation & IEEE80211_OFDM_MODULATION){
+ if (ieee->modulation & IEEE80211_OFDM_MODULATION) {
*tag++ = MFIE_TYPE_RATES_EX;
*tag++ = 8;
else
rate = ieee->basic_rate & 0x7f;
- if(rate == 0){
+ if (rate == 0) {
// 2005.01.26, by rcnjko.
if(ieee->mode == IEEE_A||
ieee->mode== IEEE_N_5G||
//unsigned long flags;
skb = ieee80211_get_beacon_(ieee);
- if (skb){
+ if (skb) {
softmac_mgmt_xmit(skb, ieee);
ieee->softmac_stats.tx_beacons++;
//dev_kfree_skb_any(skb);//edit by thomas
// (MSECS( ieee->current_network.beacon_interval -5));
//spin_lock_irqsave(&ieee->beacon_lock,flags);
- if(ieee->beacon_txing && ieee->ieee_up){
+ if (ieee->beacon_txing && ieee->ieee_up) {
// if(!timer_pending(&ieee->beacon_timer))
// add_timer(&ieee->beacon_timer);
mod_timer(&ieee->beacon_timer,jiffies+(MSECS(ieee->current_network.beacon_interval-5)));
struct sk_buff *skb;
skb = ieee80211_probe_req(ieee);
- if (skb){
+ if (skb) {
softmac_mgmt_xmit(skb, ieee);
ieee->softmac_stats.tx_probe_rq++;
//dev_kfree_skb_any(skb);//edit by thomas
static void ieee80211_send_probe_requests(struct ieee80211_device *ieee)
{
- if (ieee->active_scan && (ieee->softmac_features & IEEE_SOFTMAC_PROBERQ)){
+ if (ieee->active_scan && (ieee->softmac_features & IEEE_SOFTMAC_PROBERQ)) {
ieee80211_send_probe(ieee);
ieee80211_send_probe(ieee);
}
down(&ieee->scan_sem);
// spin_lock_irqsave(&ieee->lock, flags);
- if (ieee->scanning == 1){
+ if (ieee->scanning == 1) {
ieee->scanning = 0;
cancel_delayed_work(&ieee->softmac_scan_wq);
/* called with ieee->lock held */
static void ieee80211_start_scan(struct ieee80211_device *ieee)
{
- if(IS_DOT11D_ENABLE(ieee) )
+ if (IS_DOT11D_ENABLE(ieee) )
{
- if(IS_COUNTRY_IE_VALID(ieee))
+ if (IS_COUNTRY_IE_VALID(ieee))
{
RESET_CIE_WATCHDOG(ieee);
}
}
if (ieee->softmac_features & IEEE_SOFTMAC_SCAN){
- if (ieee->scanning == 0){
+ if (ieee->scanning == 0) {
ieee->scanning = 1;
queue_delayed_work(ieee->wq, &ieee->softmac_scan_wq, 0);
}
/* called with wx_sem held */
void ieee80211_start_scan_syncro(struct ieee80211_device *ieee)
{
- if(IS_DOT11D_ENABLE(ieee) )
+ if (IS_DOT11D_ENABLE(ieee) )
{
- if(IS_COUNTRY_IE_VALID(ieee))
+ if (IS_COUNTRY_IE_VALID(ieee))
{
RESET_CIE_WATCHDOG(ieee);
}
HTConstructInfoElement(ieee,tmp_ht_info_buf,&tmp_ht_info_len, encrypt);
- if(pHTInfo->bRegRT2RTAggregation)
+ if (pHTInfo->bRegRT2RTAggregation)
{
tmp_generic_ie_buf = ieee->pHTInfo->szRT2RTAggBuffer;
tmp_generic_ie_len = sizeof(ieee->pHTInfo->szRT2RTAggBuffer);
*(tag++) = 1;
*(tag++) = ieee->current_network.channel;
- if(atim_len){
+ if (atim_len) {
*(tag++) = MFIE_TYPE_IBSS_SET;
*(tag++) = 2;
tag+=2;
}
- if(erp_len){
+ if (erp_len) {
*(tag++) = MFIE_TYPE_ERP;
*(tag++) = 1;
*(tag++) = erpinfo_content;
}
- if(rate_ex_len){
+ if (rate_ex_len) {
*(tag++) = MFIE_TYPE_RATES_EX;
*(tag++) = rate_ex_len-2;
memcpy(tag, ieee->current_network.rates_ex, rate_ex_len-2);
crypt = ieee->crypt[ieee->tx_keyidx];
else crypt = NULL;
- encrypt = (crypt && crypt->ops);
+ encrypt = crypt && crypt->ops;
if (encrypt)
assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
encrypt = ieee->host_encrypt && crypt && crypt->ops && ((0 == strcmp(crypt->ops->name,"WEP") || wpa_ie_len));
//Include High Throuput capability && Realtek proprietary
- if(ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT)
+ if (ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT)
{
ht_cap_buf = (u8 *)&(ieee->pHTInfo->SelfHTCap);
ht_cap_len = sizeof(ieee->pHTInfo->SelfHTCap);
HTConstructCapabilityElement(ieee, ht_cap_buf, &ht_cap_len, encrypt);
- if(ieee->pHTInfo->bCurrentRT2RTAggregation)
+ if (ieee->pHTInfo->bCurrentRT2RTAggregation)
{
realtek_ie_buf = ieee->pHTInfo->szRT2RTAggBuffer;
realtek_ie_len = sizeof( ieee->pHTInfo->szRT2RTAggBuffer);
}
}
- if(ieee->qos_support){
+ if (ieee->qos_support) {
wmm_info_len = beacon->qos_data.supported?9:0;
}
- if(beacon->bCkipSupported)
+ if (beacon->bCkipSupported)
{
ckip_ie_len = 30+2;
}
- if(beacon->bCcxRmEnable)
+ if (beacon->bCcxRmEnable)
{
ccxrm_ie_len = 6+2;
}
tag += osCcxAironetIE.Length;
}
- if(beacon->bCcxRmEnable)
+ if (beacon->bCcxRmEnable)
{
static u8 CcxRmCapBuf[] = {0x00, 0x40, 0x96, 0x01, 0x01, 0x00};
OCTET_STRING osCcxRmCap;
tag += osCcxVerNum.Length;
}
//HT cap element
- if(ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT){
- if(ieee->pHTInfo->ePeerHTSpecVer != HT_SPEC_VER_EWC)
+ if (ieee->pHTInfo->bCurrentHTSupport && ieee->pHTInfo->bEnableHT) {
+ if (ieee->pHTInfo->ePeerHTSpecVer != HT_SPEC_VER_EWC)
{
tag = skb_put(skb, ht_cap_len);
*tag++ = MFIE_TYPE_HT_CAP;
//choose what wpa_supplicant gives to associate.
tag = skb_put(skb, wpa_ie_len);
- if (wpa_ie_len){
+ if (wpa_ie_len) {
memcpy(tag, ieee->wpa_ie, ieee->wpa_ie_len);
}
tag = skb_put(skb, wmm_info_len);
- if(wmm_info_len) {
+ if (wmm_info_len) {
ieee80211_WMM_Info(ieee, &tag);
}
#ifdef THOMAS_TURBO
tag = skb_put(skb, turbo_info_len);
- if(turbo_info_len) {
+ if (turbo_info_len) {
ieee80211_TURBO_Info(ieee, &tag);
}
#endif
- if(ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT){
+ if (ieee->pHTInfo->bCurrentHTSupport && ieee->pHTInfo->bEnableHT) {
if(ieee->pHTInfo->ePeerHTSpecVer == HT_SPEC_VER_EWC)
{
tag = skb_put(skb, ht_cap_len);
tag += ht_cap_len -2;
}
- if(ieee->pHTInfo->bCurrentRT2RTAggregation){
+ if (ieee->pHTInfo->bCurrentRT2RTAggregation) {
tag = skb_put(skb, realtek_ie_len);
*tag++ = MFIE_TYPE_GENERIC;
*tag++ = realtek_ie_len - 2;
//printk(KERN_WARNING "Sending authentication request\n");
softmac_mgmt_xmit(skb, ieee);
//BUGON when you try to add_timer twice, using mod_timer may be better, john0709
- if(!timer_pending(&ieee->associate_timer)){
+ if (!timer_pending(&ieee->associate_timer)) {
ieee->associate_timer.expires = jiffies + (HZ / 2);
add_timer(&ieee->associate_timer);
}
}
ieee->LinkDetectInfo.SlotNum = 2 * (1 + ieee->current_network.beacon_interval/500);
// To prevent the immediately calling watch_dog after association.
- if(ieee->LinkDetectInfo.NumRecvBcnInPeriod==0||ieee->LinkDetectInfo.NumRecvDataInPeriod==0 )
+ if (ieee->LinkDetectInfo.NumRecvBcnInPeriod==0||ieee->LinkDetectInfo.NumRecvDataInPeriod==0 )
{
ieee->LinkDetectInfo.NumRecvBcnInPeriod = 1;
ieee->LinkDetectInfo.NumRecvDataInPeriod= 1;
else if(ieee->is_silent_reset == 1)
{
printk("==================>silent reset associate\n");
- ieee->is_silent_reset = 0;
+ ieee->is_silent_reset = false;
}
if (ieee->data_hard_resume)
return;
- if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC){
+ if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC) {
/* if the user specified the AP MAC, we need also the essid
* This could be obtained by beacons or, if the network does not
* broadcast it, it can be put manually.
/* if the essid is hidden replace it with the
* essid provided by the user.
*/
- if (!ssidbroad){
+ if (!ssidbroad) {
strncpy(tmp_ssid, ieee->current_network.ssid, IW_ESSID_MAX_SIZE);
tmp_ssid_len = ieee->current_network.ssid_len;
}
memcpy(&ieee->current_network, net, sizeof(struct ieee80211_network));
- if (!ssidbroad){
+ if (!ssidbroad) {
strncpy(ieee->current_network.ssid, tmp_ssid, IW_ESSID_MAX_SIZE);
ieee->current_network.ssid_len = tmp_ssid_len;
}
{
struct ieee80211_authentication *a;
u8 *t;
- if (skb->len < (sizeof(struct ieee80211_authentication)-sizeof(struct ieee80211_info_element))){
+ if (skb->len < (sizeof(struct ieee80211_authentication) - sizeof(struct ieee80211_info_element))) {
IEEE80211_DEBUG_MGMT("invalid len in auth resp: %d\n",skb->len);
return 0xcafe;
}
*challenge = NULL;
a = (struct ieee80211_authentication *) skb->data;
- if(skb->len > (sizeof(struct ieee80211_authentication) +3)){
+ if (skb->len > (sizeof(struct ieee80211_authentication) + 3)) {
t = skb->data + sizeof(struct ieee80211_authentication);
- if(*(t++) == MFIE_TYPE_CHALLENGE){
+ if (*(t++) == MFIE_TYPE_CHALLENGE) {
*chlen = *(t++);
*challenge = kmemdup(t, *chlen, GFP_ATOMIC);
if (!*challenge)
{
struct ieee80211_authentication *a;
- if (skb->len < (sizeof(struct ieee80211_authentication)-sizeof(struct ieee80211_info_element))){
+ if (skb->len < (sizeof(struct ieee80211_authentication) - sizeof(struct ieee80211_info_element))) {
IEEE80211_DEBUG_MGMT("invalid len in auth request: %d\n",skb->len);
return -1;
}
tag = skb->data + sizeof (struct ieee80211_hdr_3addr );
while (tag+1 < skbend){
- if (*tag == 0){
+ if (*tag == 0) {
ssid = tag+2;
ssidlen = *(tag+1);
break;
struct ieee80211_assoc_response_frame *response_head;
u16 status_code;
- if (skb->len < sizeof(struct ieee80211_assoc_response_frame)){
+ if (skb->len < sizeof(struct ieee80211_assoc_response_frame)) {
IEEE80211_DEBUG_MGMT("invalid len in auth resp: %d\n", skb->len);
return 0xcafe;
}
//IEEE80211DMESG("Rx probe");
ieee->softmac_stats.rx_probe_rq++;
//DMESG("Dest is "MACSTR, MAC2STR(dest));
- if (probe_rq_parse(ieee, skb, dest)){
+ if (probe_rq_parse(ieee, skb, dest)) {
//IEEE80211DMESG("Was for me!");
ieee->softmac_stats.tx_probe_rs++;
ieee80211_resp_to_probe(ieee, dest);
//unsigned long flags;
ieee->softmac_stats.rx_ass_rq++;
- if (assoc_rq_parse(skb,dest) != -1){
+ if (assoc_rq_parse(skb, dest) != -1) {
ieee80211_resp_to_assoc_rq(ieee, dest);
}
(ieee->mgmt_queue_tail != ieee->mgmt_queue_head))
return 0;
- if(time_l){
+ if (time_l) {
*time_l = ieee->current_network.last_dtim_sta_time[0]
+ (ieee->current_network.beacon_interval
* ieee->current_network.dtim_period) * 1000;
}
- if(time_h){
+ if (time_h) {
*time_h = ieee->current_network.last_dtim_sta_time[1];
if(time_l && *time_l < ieee->current_network.last_dtim_sta_time[0])
*time_h += 1;
spin_lock_irqsave(&ieee->lock, flags);
- if((ieee->ps == IEEE80211_PS_DISABLED ||
+ if ((ieee->ps == IEEE80211_PS_DISABLED ||
ieee->iw_mode != IW_MODE_INFRA ||
ieee->state != IEEE80211_LINKED)){
void ieee80211_sta_wakeup(struct ieee80211_device *ieee, short nl)
{
- if(ieee->sta_sleep == 0){
- if(nl){
+ if (ieee->sta_sleep == 0) {
+ if (nl) {
printk("Warning: driver is probably failing to report TX ps error\n");
ieee->ps_request_tx_ack(ieee->dev);
ieee80211_sta_ps_send_null_frame(ieee, 0);
ieee->sta_sleep = 0;
- if(nl){
+ if (nl) {
ieee->ps_request_tx_ack(ieee->dev);
ieee80211_sta_ps_send_null_frame(ieee, 0);
}
if(ieee->sta_sleep == 2){
/* Null frame with PS bit set */
- if(success){
+ if (success) {
ieee->sta_sleep = 1;
ieee->enter_sleep_state(ieee->dev,ieee->ps_th,ieee->ps_tl);
}
/* 21112005 - tx again null without PS bit if lost */
else {
- if((ieee->sta_sleep == 0) && !success){
+ if ((ieee->sta_sleep == 0) && !success) {
spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
ieee80211_sta_ps_send_null_frame(ieee, 0);
spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
return;
}
+
+static void ieee80211_check_auth_response(struct ieee80211_device *ieee,
+ struct sk_buff *skb)
+{
+ /* default support N mode, disable halfNmode */
+ bool bSupportNmode = true, bHalfSupportNmode = false;
+ u16 errcode;
+ u8 *challenge;
+ int chlen = 0;
+ u32 iotAction;
+
+ errcode = auth_parse(skb, &challenge, &chlen);
+ if (!errcode) {
+ if (ieee->open_wep || !challenge) {
+ ieee->state = IEEE80211_ASSOCIATING_AUTHENTICATED;
+ ieee->softmac_stats.rx_auth_rs_ok++;
+ iotAction = ieee->pHTInfo->IOTAction;
+ if (!(iotAction & HT_IOT_ACT_PURE_N_MODE)) {
+ if (!ieee->GetNmodeSupportBySecCfg(ieee->dev)) {
+ /* WEP or TKIP encryption */
+ if (IsHTHalfNmodeAPs(ieee)) {
+ bSupportNmode = true;
+ bHalfSupportNmode = true;
+ } else {
+ bSupportNmode = false;
+ bHalfSupportNmode = false;
+ }
+ netdev_dbg(ieee->dev, "SEC(%d, %d)\n",
+ bSupportNmode,
+ bHalfSupportNmode);
+ }
+ }
+ /* Dummy wirless mode setting- avoid encryption issue */
+ if (bSupportNmode) {
+ /* N mode setting */
+ ieee->SetWirelessMode(ieee->dev,
+ ieee->current_network.mode);
+ } else {
+ /* b/g mode setting - TODO */
+ ieee->SetWirelessMode(ieee->dev, IEEE_G);
+ }
+
+ if (ieee->current_network.mode == IEEE_N_24G &&
+ bHalfSupportNmode == true) {
+ netdev_dbg(ieee->dev, "enter half N mode\n");
+ ieee->bHalfWirelessN24GMode = true;
+ } else
+ ieee->bHalfWirelessN24GMode = false;
+
+ ieee80211_associate_step2(ieee);
+ } else {
+ ieee80211_auth_challenge(ieee, challenge, chlen);
+ }
+ } else {
+ ieee->softmac_stats.rx_auth_rs_err++;
+ IEEE80211_DEBUG_MGMT("Auth response status code 0x%x", errcode);
+ ieee80211_associate_abort(ieee);
+ }
+}
+
inline int
ieee80211_rx_frame_softmac(struct ieee80211_device *ieee, struct sk_buff *skb,
struct ieee80211_rx_stats *rx_stats, u16 type,
{
struct ieee80211_hdr_3addr *header = (struct ieee80211_hdr_3addr *) skb->data;
u16 errcode;
- u8 *challenge;
- int chlen=0;
int aid;
struct ieee80211_assoc_response_frame *assoc_resp;
// struct ieee80211_info_element *info_element;
- bool bSupportNmode = true, bHalfSupportNmode = false; //default support N mode, disable halfNmode
if(!ieee->proto_started)
return 0;
ieee->softmac_stats.rx_ass_ok++;
/* station support qos */
/* Let the register setting defaultly with Legacy station */
- if(ieee->qos_support) {
+ if (ieee->qos_support) {
assoc_resp = (struct ieee80211_assoc_response_frame *)skb->data;
memset(network, 0, sizeof(*network));
if (ieee80211_parse_info_param(ieee,assoc_resp->info_element,\
case IEEE80211_STYPE_AUTH:
- if (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE){
- if (ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATING &&
- ieee->iw_mode == IW_MODE_INFRA){
+ if (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) {
+ if (ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATING
+ && ieee->iw_mode == IW_MODE_INFRA) {
- IEEE80211_DEBUG_MGMT("Received authentication response");
-
- errcode = auth_parse(skb, &challenge, &chlen);
- if (!errcode) {
- if(ieee->open_wep || !challenge){
- ieee->state = IEEE80211_ASSOCIATING_AUTHENTICATED;
- ieee->softmac_stats.rx_auth_rs_ok++;
- if(!(ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE))
- {
- if (!ieee->GetNmodeSupportBySecCfg(ieee->dev))
- {
- // WEP or TKIP encryption
- if(IsHTHalfNmodeAPs(ieee))
- {
- bSupportNmode = true;
- bHalfSupportNmode = true;
- }
- else
- {
- bSupportNmode = false;
- bHalfSupportNmode = false;
- }
- printk("==========>to link with AP using SEC(%d, %d)", bSupportNmode, bHalfSupportNmode);
- }
- }
- /* Dummy wirless mode setting to avoid encryption issue */
- if(bSupportNmode) {
- //N mode setting
- ieee->SetWirelessMode(ieee->dev, \
- ieee->current_network.mode);
- }else{
- //b/g mode setting
- /*TODO*/
- ieee->SetWirelessMode(ieee->dev, IEEE_G);
- }
-
- if (ieee->current_network.mode == IEEE_N_24G && bHalfSupportNmode == true)
- {
- printk("===============>entern half N mode\n");
- ieee->bHalfWirelessN24GMode = true;
- }
- else
- ieee->bHalfWirelessN24GMode = false;
-
- ieee80211_associate_step2(ieee);
- }else{
- ieee80211_auth_challenge(ieee, challenge, chlen);
- }
- }else{
- ieee->softmac_stats.rx_auth_rs_err++;
- IEEE80211_DEBUG_MGMT("Authentication response status code 0x%x",errcode);
- ieee80211_associate_abort(ieee);
- }
-
- }else if (ieee->iw_mode == IW_MODE_MASTER){
- ieee80211_rx_auth_rq(ieee, skb);
- }
+ IEEE80211_DEBUG_MGMT("Received auth response");
+ ieee80211_check_auth_response(ieee, skb);
+ } else if (ieee->iw_mode == IW_MODE_MASTER) {
+ ieee80211_rx_auth_rq(ieee, skb);
}
+ }
break;
case IEEE80211_STYPE_PROBE_REQ:
break;
default:
return -1;
- break;
}
//dev_kfree_skb_any(skb);
return 0;
}
-/* following are for a simpler TX queue management.
- * Instead of using netif_[stop/wake]_queue the driver
- * will uses these two function (plus a reset one), that
- * will internally uses the kernel netif_* and takes
- * care of the ieee802.11 fragmentation.
- * So the driver receives a fragment per time and might
- * call the stop function when it want without take care
- * to have enought room to TX an entire packet.
- * This might be useful if each fragment need it's own
- * descriptor, thus just keep a total free memory > than
- * the max fragmentation treshold is not enought.. If the
- * ieee802.11 stack passed a TXB struct then you needed
+/* The following are for a simpler TX queue management.
+ * Instead of using netif_[stop/wake]_queue, the driver
+ * will use these two functions (plus a reset one) that
+ * will internally call the kernel netif_* and take care
+ * of the ieee802.11 fragmentation.
+ * So, the driver receives a fragment at a time and might
+ * call the stop function when it wants, without taking
+ * care to have enough room to TX an entire packet.
+ * This might be useful if each fragment needs its own
+ * descriptor. Thus, just keeping a total free memory > than
+ * the max fragmentation threshold is not enough. If the
+ * ieee802.11 stack passed a TXB struct, then you would need
* to keep N free descriptors where
- * N = MAX_PACKET_SIZE / MIN_FRAG_TRESHOLD
+ * N = MAX_PACKET_SIZE / MIN_FRAG_THRESHOLD.
* In this way you need just one and the 802.11 stack
* will take care of buffering fragments and pass them to
* to the driver later, when it wakes the queue.
ieee->stats.tx_bytes += txb->payload_size;
ieee->stats.tx_packets++;
tcb_desc = (cb_desc *)(txb->fragments[0]->cb + MAX_DEV_ADDR_SIZE);
- if(tcb_desc->bMulticast) {
+ if (tcb_desc->bMulticast) {
ieee->stats.multicast++;
}
/* if xmit available, just xmit it immediately, else just insert it to the wait queue */
spin_lock_irqsave(&ieee->lock, flags);
init_mgmt_queue(ieee);
- if (ieee->tx_pending.txb){
+ if (ieee->tx_pending.txb) {
ieee80211_txb_free(ieee->tx_pending.txb);
ieee->tx_pending.txb = NULL;
}
ieee->queue_stop = 0;
- if(ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE){
+ if (ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE) {
while (!ieee->queue_stop && (skb = dequeue_mgmt(ieee))){
header = (struct ieee80211_hdr_3addr *) skb->data;
if (!ieee->queue_stop && ieee->tx_pending.txb)
ieee80211_resume_tx(ieee);
- if (!ieee->queue_stop && netif_queue_stopped(ieee->dev)){
+ if (!ieee->queue_stop && netif_queue_stopped(ieee->dev)) {
ieee->softmac_stats.swtxawake++;
netif_wake_queue(ieee->dev);
}
//unsigned long flags;
//spin_lock_irqsave(&ieee->lock,flags);
- if (! netif_queue_stopped(ieee->dev)){
+ if (!netif_queue_stopped(ieee->dev)) {
netif_stop_queue(ieee->dev);
ieee->softmac_stats.swtxstop++;
}
{
ieee->assoc_id = 1;
- if (ieee->current_network.ssid_len == 0){
+ if (ieee->current_network.ssid_len == 0) {
strncpy(ieee->current_network.ssid,
IEEE80211_DEFAULT_TX_ESSID,
IW_ESSID_MAX_SIZE);
static void ieee80211_start_monitor_mode(struct ieee80211_device *ieee)
{
- if(ieee->raw_tx){
+ if (ieee->raw_tx) {
if (ieee->data_hard_resume)
ieee->data_hard_resume(ieee->dev);
* (abort) this wq (when syncro scanning) before sleeping
* on the semaphore
*/
- if(!ieee->proto_started){
+ if (!ieee->proto_started) {
printk("==========oh driver down return\n");
return;
}
down(&ieee->wx_sem);
- if (ieee->current_network.ssid_len == 0){
+ if (ieee->current_network.ssid_len == 0) {
strcpy(ieee->current_network.ssid, IEEE80211_DEFAULT_TX_ESSID);
ieee->current_network.ssid_len = strlen(IEEE80211_DEFAULT_TX_ESSID);
ieee->ssid_set = 1;
ieee80211_start_scan_syncro(ieee);
/* the network definitively is not here.. create a new cell */
- if (ieee->state == IEEE80211_NOLINK){
+ if (ieee->state == IEEE80211_NOLINK) {
printk("creating new IBSS cell\n");
if(!ieee->wap_set)
ieee80211_randomize_cell(ieee);
// Ref: 802.11d 11.1.3.3
// STA shall not start a BSS unless properly formed Beacon frame including a Country IE.
//
- if(IS_DOT11D_ENABLE(ieee) && !IS_COUNTRY_IE_VALID(ieee))
+ if (IS_DOT11D_ENABLE(ieee) && !IS_COUNTRY_IE_VALID(ieee))
{
- if(! ieee->bGlobalDomain)
+ if (! ieee->bGlobalDomain)
{
return;
}
*/
spin_lock_irqsave(&ieee->lock, flags);
- if (ieee->state == IEEE80211_NOLINK){
+ if (ieee->state == IEEE80211_NOLINK) {
ieee->actscanning = true;
ieee80211_start_scan(ieee);
}
ieee->proto_started = 1;
- if (ieee->current_network.channel == 0){
+ if (ieee->current_network.channel == 0) {
do{
ch++;
if (ch > MAX_CHANNEL_NUMBER)
ieee->sta_edca_param[2] = 0x005E4342;
ieee->sta_edca_param[3] = 0x002F3262;
ieee->aggregation = true;
- ieee->enable_rx_imm_BA = 1;
+ ieee->enable_rx_imm_BA = true;
ieee->tx_pending.txb = NULL;
- init_timer(&ieee->associate_timer);
- ieee->associate_timer.data = (unsigned long)ieee;
- ieee->associate_timer.function = ieee80211_associate_abort_cb;
+ setup_timer(&ieee->associate_timer, ieee80211_associate_abort_cb,
+ (unsigned long)ieee);
- init_timer(&ieee->beacon_timer);
- ieee->beacon_timer.data = (unsigned long) ieee;
- ieee->beacon_timer.function = ieee80211_send_beacon_cb;
+ setup_timer(&ieee->beacon_timer, ieee80211_send_beacon_cb,
+ (unsigned long)ieee);
ieee->wq = create_workqueue(DRV_NAME);
ieee80211_crypt_delayed_deinit(ieee, crypt);
- new_crypt = kmalloc(sizeof(*new_crypt), GFP_KERNEL);
+ new_crypt = kzalloc(sizeof(*new_crypt), GFP_KERNEL);
if (new_crypt == NULL) {
ret = -ENOMEM;
goto done;
}
- memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
new_crypt->ops = ops;
if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
new_crypt->priv =
struct ieee80211_network *beacon = &ieee->current_network;
struct sk_buff *skb;
skb = ieee80211_disassociate_skb(beacon,ieee,asRsn);
- if (skb){
+ if (skb) {
softmac_mgmt_xmit(skb, ieee);
//dev_kfree_skb_any(skb);//edit by thomas
}
down(&ieee->wx_sem);
//IEEE_DEBUG_INFO("wpa_supplicant: len=%d\n", p->length);
- if (p->length < sizeof(struct ieee_param) || !p->pointer){
+ if (p->length < sizeof(struct ieee_param) || !p->pointer) {
ret = -EINVAL;
goto out;
}
if (ieee->state == IEEE80211_LINKED)
memcpy(wrqu.ap_addr.sa_data, ieee->current_network.bssid, ETH_ALEN);
else
- memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
+ eth_zero_addr(wrqu.ap_addr.sa_data);
wireless_send_event(ieee->dev, SIOCGIWAP, &wrqu, NULL);
}
EXPORT_SYMBOL(notify_wx_assoc_event);
down(&ieee->wx_sem);
- if(ieee->iw_mode == IW_MODE_INFRA){
+ if (ieee->iw_mode == IW_MODE_INFRA) {
ret = -EOPNOTSUPP;
goto out;
}
ieee->state != IEEE80211_LINKED_SCANNING &&
ieee->wap_set == 0)
- memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
+ eth_zero_addr(wrqu->ap_addr.sa_data);
else
memcpy(wrqu->ap_addr.sa_data,
ieee->current_network.bssid, ETH_ALEN);
down(&ieee->wx_sem);
/* use ifconfig hw ether */
- if (ieee->iw_mode == IW_MODE_MASTER){
+ if (ieee->iw_mode == IW_MODE_MASTER) {
ret = -1;
goto out;
}
- if (temp->sa_family != ARPHRD_ETHER){
+ if (temp->sa_family != ARPHRD_ETHER) {
ret = -EINVAL;
goto out;
}
ieee->state = IEEE80211_LINKED;
ieee->link_change(ieee->dev);
// To prevent the immediately calling watch_dog after scan.
- if(ieee->LinkDetectInfo.NumRecvBcnInPeriod==0||ieee->LinkDetectInfo.NumRecvDataInPeriod==0 )
+ if (ieee->LinkDetectInfo.NumRecvBcnInPeriod==0||ieee->LinkDetectInfo.NumRecvDataInPeriod==0 )
{
ieee->LinkDetectInfo.NumRecvBcnInPeriod = 1;
ieee->LinkDetectInfo.NumRecvDataInPeriod= 1;
down(&ieee->wx_sem);
- if (ieee->iw_mode == IW_MODE_MONITOR || !(ieee->proto_started)){
+ if (ieee->iw_mode == IW_MODE_MONITOR || !(ieee->proto_started)) {
ret = -1;
goto out;
}
proto_started = ieee->proto_started;
- if (wrqu->essid.length > IW_ESSID_MAX_SIZE){
+ if (wrqu->essid.length > IW_ESSID_MAX_SIZE) {
ret= -E2BIG;
goto out;
}
- if (ieee->iw_mode == IW_MODE_MONITOR){
+ if (ieee->iw_mode == IW_MODE_MONITOR) {
ret= -1;
goto out;
}
printk(KERN_INFO"raw TX is %s\n",
ieee->raw_tx ? "enabled" : "disabled");
- if(ieee->iw_mode == IW_MODE_MONITOR)
+ if (ieee->iw_mode == IW_MODE_MONITOR)
{
- if(prev == 0 && ieee->raw_tx){
+ if (prev == 0 && ieee->raw_tx) {
if (ieee->data_hard_resume)
ieee->data_hard_resume(ieee->dev);
int ret = 0;
down(&ieee->wx_sem);
- if (wrqu->power.disabled){
+ if (wrqu->power.disabled) {
ieee->ps = IEEE80211_PS_DISABLED;
goto exit;
}
{
down(&ieee->wx_sem);
- if(ieee->ps == IEEE80211_PS_DISABLED){
+ if (ieee->ps == IEEE80211_PS_DISABLED) {
wrqu->power.disabled = 1;
goto exit;
}
******************************************************************************/
#include <linux/compiler.h>
-//#include <linux/config.h>
#include <linux/errno.h>
#include <linux/if_arp.h>
#include <linux/in6.h>
#ifdef TO_DO_LIST
if(!IsDataFrame(pFrame))
{
- pTcb->bTxDisableRateFallBack = TRUE;
- pTcb->bTxUseDriverAssingedRate = TRUE;
+ pTcb->bTxDisableRateFallBack = true;
+ pTcb->bTxUseDriverAssingedRate = true;
pTcb->RATRIndex = 7;
return;
}
if(pMgntInfo->ForcedDataRate!= 0)
{
- pTcb->bTxDisableRateFallBack = TRUE;
- pTcb->bTxUseDriverAssingedRate = TRUE;
+ pTcb->bTxDisableRateFallBack = true;
+ pTcb->bTxUseDriverAssingedRate = true;
return;
}
#endif
u8 bSendDELBA = false;
// Delete pending BA
- if(pPendingBa->bValid)
+ if (pPendingBa->bValid)
{
DeActivateBAEntry(ieee, pPendingBa);
bSendDELBA = true;
}
// Delete admitted BA
- if(pAdmittedBa->bValid)
+ if (pAdmittedBa->bValid)
{
DeActivateBAEntry(ieee, pAdmittedBa);
bSendDELBA = true;
PBA_RECORD pBa = &pRxTs->RxAdmittedBARecord;
u8 bSendDELBA = false;
- if(pBa->bValid)
+ if (pBa->bValid)
{
DeActivateBAEntry(ieee, pBa);
bSendDELBA = true;
printk("====================>rx ADDBAREQ from :%pM\n", dst);
//some other capability is not ready now.
- if( (ieee->current_network.qos_data.active == 0) ||
+ if ((ieee->current_network.qos_data.active == 0) ||
(ieee->pHTInfo->bCurrentHTSupport == false)) //||
// (ieee->pStaQos->bEnableRxImmBA == false) )
{
}
// Search for related traffic stream.
// If there is no matched TS, reject the ADDBA request.
- if( !GetTs(
+ if (!GetTs(
ieee,
(PTS_COMMON_INFO *)(&pTS),
dst,
// We can do much more check here, including BufferSize, AMSDU_Support, Policy, StartSeqCtrl...
// I want to check StartSeqCtrl to make sure when we start aggregation!!!
//
- if(pBaParamSet->field.BAPolicy == BA_POLICY_DELAYED)
+ if (pBaParamSet->field.BAPolicy == BA_POLICY_DELAYED)
{
rc = ADDBA_STATUS_INVALID_PARAM;
IEEE80211_DEBUG(IEEE80211_DL_ERR, "BA Policy is not correct in %s()\n", __func__);
// We can compare the value of BA parameter set that Peer returned and Self sent.
// If it is OK, then admitted. Or we can send DELBA to cancel BA mechanism.
//
- if(pBaParamSet->field.BAPolicy == BA_POLICY_DELAYED)
+ if (pBaParamSet->field.BAPolicy == BA_POLICY_DELAYED)
{
// Since this is a kind of ADDBA failed, we delay next ADDBA process.
pTS->bAddBaReqDelayed = true;
return -1;
}
- if(ieee->current_network.qos_data.active == 0 ||
+ if (ieee->current_network.qos_data.active == 0 ||
ieee->pHTInfo->bCurrentHTSupport == false )
{
IEEE80211_DEBUG(IEEE80211_DL_ERR, "received DELBA while QOS or HT is not supported(%d, %d)\n",ieee->current_network.qos_data.active, ieee->pHTInfo->bCurrentHTSupport);
{
PRX_TS_RECORD pRxTs;
- if( !GetTs(
+ if (!GetTs(
ieee,
(PTS_COMMON_INFO *)&pRxTs,
dst,
{
PTX_TS_RECORD pTxTs;
- if(!GetTs(
+ if (!GetTs(
ieee,
(PTS_COMMON_INFO *)&pTxTs,
dst,
static bool HTIOTActIsDisableMCSTwoSpatialStream(struct ieee80211_device *ieee,
u8 *PeerMacAddr)
{
- bool retValue = false;
-
#ifdef TODO
// Apply for 819u only
#endif
- return retValue;
+ return false;
}
/********************************************************************************************************************
* *****************************************************************************************************************/
static u8 HTIOTActIsDisableEDCATurbo(struct ieee80211_device *ieee,
u8 *PeerMacAddr)
-{
- u8 retValue = false; // default enable EDCA Turbo mode.
- // Set specific EDCA parameter for different AP in DM handler.
-
- return retValue;
+{ /* default enable EDCA Turbo mode. */
+ return false;
}
/********************************************************************************************************************
// 2008/01/25 MH Judeg if we need to use OFDM to sned MGNT frame for broadcom AP.
// 2008/01/28 MH We must prevent that we select null bssid to link.
- if(network->broadcom_cap_exist)
+ if (network->broadcom_cap_exist)
{
retValue = 1;
}
// 2008.06.12
// For RTL819X, if pairwisekey = wep/tkip, ap is ralink, we support only MCS0~7.
- if(ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
+ if (ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
{
int i;
for(i = 1; i< 16; i++)
*posRT2RTAgg++ = 0x01;
*posRT2RTAgg = 0x10;//*posRT2RTAgg = 0x02;
- if(ieee->bSupportRemoteWakeUp) {
+ if (ieee->bSupportRemoteWakeUp) {
*posRT2RTAgg |= 0x08;//RT_HT_CAP_USE_WOW;
}
for(i = 0; i < 16; i++)
{
- if(availableMcsRate[i] != 0)
+ if (availableMcsRate[i] != 0)
{
bitMap = availableMcsRate[i];
for(j = 0; j < 8; j++)
{
- if((bitMap%2) != 0)
+ if ((bitMap%2) != 0)
{
if(HTMcsToDataRate(ieee, (8*i+j)) > HTMcsToDataRate(ieee, mcsRate))
mcsRate = (8*i+j);
}
- bitMap = bitMap>>1;
+ bitMap >>= 1;
}
}
}
// Lanhsin: mark for tmp to avoid deauth by ap from s3
//if(memcmp(pMgntInfo->Bssid, NETGEAR834Bv2_BROADCOM, 3)==0)
- if(0)
+ if (0)
{
pHTInfo->bCurrentAMPDUEnable = false;
// PHT_CAPABILITY_ELE pPeerHTCap = (PHT_CAPABILITY_ELE)pNetwork->bssht.bdHTCapBuf;
PHT_INFORMATION_ELE pPeerHTInfo = (PHT_INFORMATION_ELE)pNetwork->bssht.bdHTInfoBuf;
- if(pHTInfo->bCurrentHTSupport)
+ if (pHTInfo->bCurrentHTSupport)
{
//
// Config current operation mode.
********************************************************************************************************************/
u8 HTCCheck(struct ieee80211_device *ieee, u8 *pFrame)
{
- if(ieee->pHTInfo->bCurrentHTSupport)
+ if (ieee->pHTInfo->bCurrentHTSupport)
{
if ((IsQoSDataFrame(pFrame) && Frame_Order(pFrame)) == 1) {
IEEE80211_DEBUG(IEEE80211_DL_HT, "HT CONTROL FILED EXIST!!\n");
// return;
// spin_lock_irqsave(&(ieee->bw_spinlock), flags);
- if(pHTInfo->bSwBwInProgress) {
+ if (pHTInfo->bSwBwInProgress) {
// spin_unlock_irqrestore(&(ieee->bw_spinlock), flags);
return;
}
#ifndef _TSTYPE_H_
#define _TSTYPE_H_
#include "rtl819x_Qos.h"
-#define TS_SETUP_TIMEOUT 60 // In millisecond
+#define TS_SETUP_TIMEOUT 60 /* In millisecond */
#define TS_INACT_TIMEOUT 60
#define TS_ADDBA_DELAY 60
#define TOTAL_TS_NUM 16
#define TCLAS_NUM 4
-// This define the Tx/Rx directions
+/* This define the Tx/Rx directions */
typedef enum _TR_SELECT {
TX_DIR = 0,
RX_DIR = 1,
typedef struct _TX_TS_RECORD{
TS_COMMON_INFO TsCommonInfo;
u16 TxCurSeq;
- BA_RECORD TxPendingBARecord; // For BA Originator
- BA_RECORD TxAdmittedBARecord; // For BA Originator
-// QOS_DL_RECORD DLRecord;
+ BA_RECORD TxPendingBARecord; /* For BA Originator */
+ BA_RECORD TxAdmittedBARecord; /* For BA Originator */
+/* QOS_DL_RECORD DLRecord; */
u8 bAddBaReqInProgress;
u8 bAddBaReqDelayed;
u8 bUsingBa;
u16 RxTimeoutIndicateSeq;
struct list_head RxPendingPktList;
struct timer_list RxPktPendingTimer;
- BA_RECORD RxAdmittedBARecord; // For BA Recipient
+ BA_RECORD RxAdmittedBARecord; /* For BA Recipient */
u16 RxLastSeqNum;
u8 RxLastFragNum;
u8 num;
-// QOS_DL_RECORD DLRecord;
+/* QOS_DL_RECORD DLRecord; */
} RX_TS_RECORD, *PRX_TS_RECORD;
pTxTS->num = count;
// The timers for the operation of Traffic Stream and Block Ack.
// DLS related timer will be add here in the future!!
- init_timer(&pTxTS->TsCommonInfo.SetupTimer);
- pTxTS->TsCommonInfo.SetupTimer.data = (unsigned long)pTxTS;
- pTxTS->TsCommonInfo.SetupTimer.function = TsSetupTimeOut;
-
- init_timer(&pTxTS->TsCommonInfo.InactTimer);
- pTxTS->TsCommonInfo.InactTimer.data = (unsigned long)pTxTS;
- pTxTS->TsCommonInfo.InactTimer.function = TsInactTimeout;
-
- init_timer(&pTxTS->TsAddBaTimer);
- pTxTS->TsAddBaTimer.data = (unsigned long)pTxTS;
- pTxTS->TsAddBaTimer.function = TsAddBaProcess;
-
- init_timer(&pTxTS->TxPendingBARecord.Timer);
- pTxTS->TxPendingBARecord.Timer.data = (unsigned long)pTxTS;
- pTxTS->TxPendingBARecord.Timer.function = BaSetupTimeOut;
-
- init_timer(&pTxTS->TxAdmittedBARecord.Timer);
- pTxTS->TxAdmittedBARecord.Timer.data = (unsigned long)pTxTS;
- pTxTS->TxAdmittedBARecord.Timer.function = TxBaInactTimeout;
-
+ setup_timer(&pTxTS->TsCommonInfo.SetupTimer, TsSetupTimeOut,
+ (unsigned long)pTxTS);
+ setup_timer(&pTxTS->TsCommonInfo.InactTimer, TsInactTimeout,
+ (unsigned long)pTxTS);
+ setup_timer(&pTxTS->TsAddBaTimer, TsAddBaProcess,
+ (unsigned long)pTxTS);
+ setup_timer(&pTxTS->TxPendingBARecord.Timer, BaSetupTimeOut,
+ (unsigned long)pTxTS);
+ setup_timer(&pTxTS->TxAdmittedBARecord.Timer,
+ TxBaInactTimeout, (unsigned long)pTxTS);
ResetTxTsEntry(pTxTS);
list_add_tail(&pTxTS->TsCommonInfo.List, &ieee->Tx_TS_Unused_List);
pTxTS++;
{
pRxTS->num = count;
INIT_LIST_HEAD(&pRxTS->RxPendingPktList);
-
- init_timer(&pRxTS->TsCommonInfo.SetupTimer);
- pRxTS->TsCommonInfo.SetupTimer.data = (unsigned long)pRxTS;
- pRxTS->TsCommonInfo.SetupTimer.function = TsSetupTimeOut;
-
- init_timer(&pRxTS->TsCommonInfo.InactTimer);
- pRxTS->TsCommonInfo.InactTimer.data = (unsigned long)pRxTS;
- pRxTS->TsCommonInfo.InactTimer.function = TsInactTimeout;
-
- init_timer(&pRxTS->RxAdmittedBARecord.Timer);
- pRxTS->RxAdmittedBARecord.Timer.data = (unsigned long)pRxTS;
- pRxTS->RxAdmittedBARecord.Timer.function = RxBaInactTimeout;
-
- init_timer(&pRxTS->RxPktPendingTimer);
- pRxTS->RxPktPendingTimer.data = (unsigned long)pRxTS;
- pRxTS->RxPktPendingTimer.function = RxPktPendingTimeout;
-
+ setup_timer(&pRxTS->TsCommonInfo.SetupTimer, TsSetupTimeOut,
+ (unsigned long)pRxTS);
+ setup_timer(&pRxTS->TsCommonInfo.InactTimer, TsInactTimeout,
+ (unsigned long)pRxTS);
+ setup_timer(&pRxTS->RxAdmittedBARecord.Timer,
+ RxBaInactTimeout, (unsigned long)pRxTS);
+ setup_timer(&pRxTS->RxPktPendingTimer, RxPktPendingTimeout,
+ (unsigned long)pRxTS);
ResetRxTsEntry(pRxTS);
list_add_tail(&pRxTS->TsCommonInfo.List, &ieee->Rx_TS_Unused_List);
pRxTS++;
//for(dir = DIR_UP; dir <= DIR_BI_DIR; dir++)
for(dir = 0; dir <= DIR_BI_DIR; dir++)
{
- if(search_dir[dir] ==false )
+ if (!search_dir[dir])
continue;
list_for_each_entry(pRet, psearch_list, List){
// IEEE80211_DEBUG(IEEE80211_DL_TS, "ADD:%pM, TID:%d, dir:%d\n", pRet->Addr, pRet->TSpec.f.TSInfo.field.ucTSID, pRet->TSpec.f.TSInfo.field.ucDirection);
}
else
{
- if(bAddNewTs == false)
- {
+ if (!bAddNewTs) {
IEEE80211_DEBUG(IEEE80211_DL_TS, "add new TS failed(tid:%d)\n", UP);
return false;
}
struct r8192_priv *priv = ieee80211_priv(dev);
TxAGC = powerlevel;
- if (priv->bDynamicTxLowPower == TRUE) {
+ if (priv->bDynamicTxLowPower) {
if (priv->CustomerID == RT_CID_819x_Netcore)
TxAGC = 0x22;
else
priv->Pwr_Track = writeVal_tmp;
}
- if (priv->bDynamicTxHighPower == TRUE) {
+ if (priv->bDynamicTxHighPower) {
/*Add by Jacken 2008/03/06
*Emily, 20080613. Set low tx power for both MCS and legacy OFDM
*/
#ifndef RTL8225H
#define RTL8225H
-#define RTL819X_TOTAL_RF_PATH 2 //for 8192U
-extern void PHY_SetRF8256Bandwidth(struct net_device *dev , HT_CHANNEL_WIDTH Bandwidth);
+#define RTL819X_TOTAL_RF_PATH 2 /* for 8192U */
+extern void PHY_SetRF8256Bandwidth(struct net_device *dev,
+ HT_CHANNEL_WIDTH Bandwidth);
extern void PHY_RF8256_Config(struct net_device *dev);
extern void phy_RF8256_Config_ParaFile(struct net_device *dev);
extern void PHY_SetRF8256CCKTxPower(struct net_device *dev, u8 powerlevel);
#define RTL8192U
#define RTL819xU_MODULE_NAME "rtl819xU"
/* HW security */
-#define FALSE 0
-#define TRUE 1
#define MAX_KEY_LEN 61
#define KEY_BUF_SIZE 5
}
static struct net_device_stats *rtl8192_stats(struct net_device *dev);
-void rtl8192_commit(struct net_device *dev);
-void rtl8192_restart(struct work_struct *work);
-void watch_dog_timer_callback(unsigned long data);
+static void rtl8192_restart(struct work_struct *work);
+static void watch_dog_timer_callback(unsigned long data);
/****************************************************************************
* -----------------------------PROCFS STUFF-------------------------
netdev_warn(dev, "skb_queue not empty\n");
skb_queue_purge(&priv->skb_queue);
- return;
}
inline u16 ieeerate2rtlrate(int rate)
ret = rtl8192_tx(dev, skb);
spin_unlock_irqrestore(&priv->tx_lock, flags);
-
- return;
}
/* This is a rough attempt to TX a frame
}
#endif
-extern void rtl8192_update_ratr_table(struct net_device *dev);
+static void rtl8192_update_ratr_table(struct net_device *dev);
static void rtl8192_link_change(struct net_device *dev)
{
struct r8192_priv *priv = ieee80211_priv(dev);
}
-void rtl8192_update_ratr_table(struct net_device *dev)
+static void rtl8192_update_ratr_table(struct net_device *dev)
{
struct r8192_priv *priv = ieee80211_priv(dev);
struct ieee80211_device *ieee = priv->ieee80211;
memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
else
memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
- return;
}
static u8 rtl8192_getSupportedWireleeMode(struct net_device *dev)
case RF_8225:
case RF_8256:
case RF_PSEUDO_11N:
- ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
+ ret = WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B;
break;
case RF_8258:
- ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G);
+ ret = WIRELESS_MODE_A|WIRELESS_MODE_N_5G;
break;
default:
ret = WIRELESS_MODE_B;
//for silent reset
priv->IrpPendingCount = 1;
priv->ResetProgress = RESET_TYPE_NORESET;
- priv->bForcedSilentReset = 0;
+ priv->bForcedSilentReset = false;
priv->bDisableNormalResetCheck = false;
priv->force_reset = false;
mutex_init(&priv->mutex);
}
-extern void rtl819x_watchdog_wqcallback(struct work_struct *work);
+static void rtl819x_watchdog_wqcallback(struct work_struct *work);
-void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
+static void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
//init tasklet and wait_queue here. only 2.6 above kernel is considered
#define DRV_NAME "wlan0"
static void rtl8192_init_priv_task(struct net_device *dev)
}
if (bLoad_From_EEPOM) {
- tmpValue = eprom_read(dev, (EEPROM_VID>>1));
+ tmpValue = eprom_read(dev, EEPROM_VID>>1);
priv->eeprom_vid = endian_swap(&tmpValue);
- priv->eeprom_pid = eprom_read(dev, (EEPROM_PID>>1));
- tmpValue = eprom_read(dev, (EEPROM_ChannelPlan>>1));
- priv->eeprom_ChannelPlan = ((tmpValue&0xff00)>>8);
+ priv->eeprom_pid = eprom_read(dev, EEPROM_PID>>1);
+ tmpValue = eprom_read(dev, EEPROM_ChannelPlan>>1);
+ priv->eeprom_ChannelPlan = (tmpValue & 0xff00)>>8;
priv->btxpowerdata_readfromEEPORM = true;
priv->eeprom_CustomerID = eprom_read(dev, (EEPROM_Customer_ID>>1)) >>8;
} else {
}
} else if (priv->EEPROM_Def_Ver == 1) {
if (bLoad_From_EEPOM) {
- tmpValue = eprom_read(dev, (EEPROM_TxPwIndex_CCK_V1>>1));
+ tmpValue = eprom_read(dev,
+ EEPROM_TxPwIndex_CCK_V1 >> 1);
tmpValue = (tmpValue & 0xff00) >> 8;
} else {
tmpValue = 0x10;
tmpValue = 0x1010;
*((u16 *)(&priv->EEPROMTxPowerLevelCCK_V1[1])) = tmpValue;
if (bLoad_From_EEPOM)
- tmpValue = eprom_read(dev, (EEPROM_TxPwIndex_OFDM_24G_V1>>1));
+ tmpValue = eprom_read(dev,
+ EEPROM_TxPwIndex_OFDM_24G_V1 >> 1);
else
tmpValue = 0x1010;
*((u16 *)(&priv->EEPROMTxPowerLevelOFDM24G[0])) = tmpValue;
// Antenna B gain offset to antenna A, bit0~3
priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);
// Antenna C gain offset to antenna A, bit4~7
- priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);
+ priv->AntennaTxPwDiff[1] = (priv->EEPROMTxPowerDiff & 0xf0)>>4;
// CrystalCap, bit12~15
priv->CrystalCap = priv->EEPROMCrystalCap;
// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
//we need init DIG RATR table here again.
RT_TRACE(COMP_EPROM, "<===========%s()\n", __func__);
- return;
}
static short rtl8192_get_channel_map(struct net_device *dev)
rtl8192_read_eeprom_info(dev);
rtl8192_get_channel_map(dev);
init_hal_dm(dev);
- init_timer(&priv->watch_dog_timer);
- priv->watch_dog_timer.data = (unsigned long)dev;
- priv->watch_dog_timer.function = watch_dog_timer_callback;
+ setup_timer(&priv->watch_dog_timer, watch_dog_timer_callback,
+ (unsigned long)dev);
if (rtl8192_usb_initendpoints(dev) != 0) {
DMESG("Endopoints initialization failed");
return -ENOMEM;
read_nic_dword(dev, CPU_GEN, &dwRegRead);
if (priv->LoopbackMode == RTL819xU_NO_LOOPBACK)
- dwRegRead = ((dwRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
+ dwRegRead = (dwRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET;
else if (priv->LoopbackMode == RTL819xU_MAC_LOOPBACK)
dwRegRead |= CPU_CCK_LOOPBACK;
else
//
#ifdef TO_DO_LIST
if (Adapter->ResetProgress == RESET_TYPE_NORESET) {
- if (pMgntInfo->RegRfOff == TRUE) { /* User disable RF via registry. */
+ if (pMgntInfo->RegRfOff == true) { /* User disable RF via registry. */
RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter819xUsb(): Turn off RF for RegRfOff ----------\n"));
MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_SW);
// Those actions will be discard in MgntActSet_RF_State because of the same state
u8 tmpvalue;
read_nic_byte(dev, 0x301, &tmpvalue);
if (tmpvalue == 0x03) {
- priv->bDcut = TRUE;
+ priv->bDcut = true;
RT_TRACE(COMP_POWER_TRACKING, "D-cut\n");
} else {
- priv->bDcut = FALSE;
+ priv->bDcut = false;
RT_TRACE(COMP_POWER_TRACKING, "C-cut\n");
}
dm_initialize_txpower_tracking(dev);
- if (priv->bDcut == TRUE) {
+ if (priv->bDcut) {
u32 i, TempCCk;
u32 tmpRegA = rtl8192_QueryBBReg(dev, rOFDM0_XATxIQImbalance, bMaskDWord);
for (i = 0; i < TxBBGainTableLength; i++) {
{
struct r8192_priv *priv = ieee80211_priv(dev);
u16 RegTxCounter;
- bool bStuck = FALSE;
+ bool bStuck = false;
read_nic_word(dev, 0x128, &RegTxCounter);
RT_TRACE(COMP_RESET, "%s():RegTxCounter is %d,TxCounter is %d\n", __func__, RegTxCounter, priv->TxCounter);
if (priv->TxCounter == RegTxCounter)
- bStuck = TRUE;
+ bStuck = true;
priv->TxCounter = RegTxCounter;
{
u16 RegRxCounter;
struct r8192_priv *priv = ieee80211_priv(dev);
- bool bStuck = FALSE;
+ bool bStuck = false;
static u8 rx_chk_cnt;
read_nic_word(dev, 0x130, &RegRxCounter);
RT_TRACE(COMP_RESET, "%s(): RegRxCounter is %d,RxCounter is %d\n", __func__, RegRxCounter, priv->RxCounter);
}
if (priv->RxCounter == RegRxCounter)
- bStuck = TRUE;
+ bStuck = true;
priv->RxCounter = RegRxCounter;
static RESET_TYPE RxCheckStuck(struct net_device *dev)
{
struct r8192_priv *priv = ieee80211_priv(dev);
- bool bRxCheck = FALSE;
+ bool bRxCheck = false;
if (priv->IrpPendingCount > 1)
- bRxCheck = TRUE;
+ bRxCheck = true;
if (bRxCheck) {
if (HalRxCheckStuck819xUsb(dev)) {
}
-void rtl8192_cancel_deferred_work(struct r8192_priv *priv);
-int _rtl8192_up(struct net_device *dev);
-int rtl8192_close(struct net_device *dev);
+static void rtl8192_cancel_deferred_work(struct r8192_priv *priv);
+static int _rtl8192_up(struct net_device *dev);
+static int rtl8192_close(struct net_device *dev);
ret_rate = MGN_MCS15;
break;
case DESC90_RATEMCS32:
- ret_rate = (0x80|0x20);
+ ret_rate = 0x80|0x20;
break;
default:
if (!priv->bCckHighPower) {
report = pcck_buf->cck_agc_rpt & 0xc0;
- report = report>>6;
+ report >>= 6;
switch (report) {
//Fixed by Jacken from Bryant 2008-03-20
//Original value is -38 , -26 , -14 , -2
}
} else {
report = pcck_buf->cck_agc_rpt & 0x60;
- report = report>>5;
+ report >>= 5;
switch (report) {
case 0x3:
rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
struct net_device *dev = info->dev;
struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
bool bpacket_match_bssid, bpacket_toself;
- bool bPacketBeacon = FALSE, bToSelfBA = FALSE;
+ bool bPacketBeacon = false, bToSelfBA = false;
static struct ieee80211_rx_stats previous_stats;
struct ieee80211_hdr_3addr *hdr;//by amy
u16 fc, type;
praddr = hdr->addr1;
/* Check if the received packet is acceptable. */
- bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
+ bpacket_match_bssid = (IEEE80211_FTYPE_CTL != type) &&
(eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS) ? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 : hdr->addr3))
- && (!pstats->bHwError) && (!pstats->bCRC) && (!pstats->bICV));
+ && (!pstats->bHwError) && (!pstats->bCRC) && (!pstats->bICV);
bpacket_toself = bpacket_match_bssid & (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr));
if (WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BEACON)
skb_pull(skb, stats->RxBufShift + stats->RxDrvInfoSize);
}
- /* for debug 2008.5.29 */
-
- //added by vivi, for MP, 20080108
- stats->RxIs40MHzPacket = driver_info->BW;
- if (stats->RxDrvInfoSize != 0)
+ if (driver_info) {
+ stats->RxIs40MHzPacket = driver_info->BW;
TranslateRxSignalStuff819xUsb(skb, stats, driver_info);
-
+ }
}
static void rtl8192_rx_nomal(struct sk_buff *skb)
/*------------------------Define global variable-----------------------------*/
/* Debug variable ? */
-dig_t dm_digtable;
+struct dig dm_digtable;
/* Store current software write register content for MAC PHY. */
u8 dm_shadow[16][256] = { {0} };
/* For Dynamic Rx Path Selection by Signal Strength */
-DRxPathSel DM_RxPathSelTable;
+struct dynamic_rx_path_sel DM_RxPathSelTable;
+
/*------------------------Define global variable-----------------------------*/
static void dm_TXPowerTrackingCallback_TSSI(struct net_device *dev)
{
struct r8192_priv *priv = ieee80211_priv(dev);
- bool bHighpowerstate, viviflag = FALSE;
+ bool bHighpowerstate, viviflag = false;
DCMD_TXCMD_T tx_cmd;
u8 powerlevelOFDM24G;
int i = 0, j = 0, k = 0;
/* check if the report value is right */
for (k = 0; k < 5; k++) {
if (tmp_report[k] <= 20) {
- viviflag = TRUE;
+ viviflag = true;
break;
}
}
- if (viviflag == TRUE) {
+ if (viviflag == true) {
write_nic_byte(dev, 0x1ba, 0);
- viviflag = FALSE;
+ viviflag = false;
RT_TRACE(COMP_POWER_TRACKING, "we filtered the data\n");
for (k = 0; k < 5; k++)
tmp_report[k] = 0;
delta = TSSI_13dBm - Avg_TSSI_Meas_from_driver;
if (delta <= E_FOR_TX_POWER_TRACK) {
- priv->ieee80211->bdynamic_txpower_enable = TRUE;
+ priv->ieee80211->bdynamic_txpower_enable = true;
write_nic_byte(dev, 0x1ba, 0);
RT_TRACE(COMP_POWER_TRACKING, "tx power track is done\n");
RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex = %d\n", priv->rfa_txpowertrackingindex);
if (priv->cck_present_attentuation > -1 && priv->cck_present_attentuation < 23) {
if (priv->ieee80211->current_network.channel == 14 && !priv->bcck_in_ch14) {
- priv->bcck_in_ch14 = TRUE;
+ priv->bcck_in_ch14 = true;
dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
} else if (priv->ieee80211->current_network.channel != 14 && priv->bcck_in_ch14) {
- priv->bcck_in_ch14 = FALSE;
+ priv->bcck_in_ch14 = false;
dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
} else
dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
RT_TRACE(COMP_POWER_TRACKING, "priv->cck_present_attentuation = %d\n", priv->cck_present_attentuation);
if (priv->cck_present_attentuation_difference <= -12 || priv->cck_present_attentuation_difference >= 24) {
- priv->ieee80211->bdynamic_txpower_enable = TRUE;
+ priv->ieee80211->bdynamic_txpower_enable = true;
write_nic_byte(dev, 0x1ba, 0);
RT_TRACE(COMP_POWER_TRACKING, "tx power track--->limited\n");
return;
break;
}
}
- priv->ieee80211->bdynamic_txpower_enable = TRUE;
+ priv->ieee80211->bdynamic_txpower_enable = true;
write_nic_byte(dev, 0x1ba, 0);
}
break;
}
}
- priv->btxpower_trackingInit = TRUE;
+ priv->btxpower_trackingInit = true;
/*pHalData->TXPowercount = 0;*/
return;
}
if (tmpCCK40Mindex >= CCK_Table_length)
tmpCCK40Mindex = CCK_Table_length-1;
} else {
- tmpval = ((u8)tmpRegA - priv->ThermalMeter[0]);
+ tmpval = (u8)tmpRegA - priv->ThermalMeter[0];
if (tmpval >= 6) /* higher temperature */
tmpOFDMindex = tmpCCK20Mindex = 0; /* max to +6dB */
tmpCCKindex = tmpCCK20Mindex;
if (priv->ieee80211->current_network.channel == 14 && !priv->bcck_in_ch14) {
- priv->bcck_in_ch14 = TRUE;
+ priv->bcck_in_ch14 = true;
CCKSwingNeedUpdate = 1;
} else if (priv->ieee80211->current_network.channel != 14 && priv->bcck_in_ch14) {
- priv->bcck_in_ch14 = FALSE;
+ priv->bcck_in_ch14 = false;
CCKSwingNeedUpdate = 1;
}
struct r8192_priv *priv = container_of(dwork, struct r8192_priv, txpower_tracking_wq);
struct net_device *dev = priv->ieee80211->dev;
- if (priv->bDcut == TRUE)
+ if (priv->bDcut == true)
dm_TXPowerTrackingCallback_TSSI(dev);
else
dm_TXPowerTrackingCallback_ThermalMeter(dev);
priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[6] = 0x00;
priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[7] = 0x00;
- priv->btxpower_tracking = TRUE;
+ priv->btxpower_tracking = true;
priv->txpower_count = 0;
- priv->btxpower_trackingInit = FALSE;
+ priv->btxpower_trackingInit = false;
}
* 3-wire by driver causes RF to go into a wrong state.
*/
if (priv->ieee80211->FwRWRF)
- priv->btxpower_tracking = TRUE;
+ priv->btxpower_tracking = true;
else
- priv->btxpower_tracking = FALSE;
+ priv->btxpower_tracking = false;
priv->txpower_count = 0;
- priv->btxpower_trackingInit = FALSE;
+ priv->btxpower_trackingInit = false;
}
void dm_initialize_txpower_tracking(struct net_device *dev)
{
struct r8192_priv *priv = ieee80211_priv(dev);
- if (priv->bDcut == TRUE)
+ if (priv->bDcut == true)
dm_InitializeTXPowerTracking_TSSI(dev);
else
dm_InitializeTXPowerTracking_ThermalMeter(dev);
#ifdef RTL8190P
dm_CheckTXPowerTracking_TSSI(dev);
#else
- if (priv->bDcut == TRUE)
+ if (priv->bDcut == true)
dm_CheckTXPowerTracking_TSSI(dev);
else
dm_CheckTXPowerTracking_ThermalMeter(dev);
{ /* dm_CCKTxPowerAdjust */
struct r8192_priv *priv = ieee80211_priv(dev);
- if (priv->bDcut == TRUE)
+ if (priv->bDcut == true)
dm_CCKTxPowerAdjust_TSSI(dev, binch14);
else
dm_CCKTxPowerAdjust_ThermalMeter(dev, binch14);
dm_digtable.rssi_low_thresh = dm_value;
} else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH) {
dm_digtable.rssi_high_power_highthresh = dm_value;
- } else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH) {
- dm_digtable.rssi_high_power_highthresh = dm_value;
+ } else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_LOW) {
+ dm_digtable.rssi_high_power_lowthresh = dm_value;
} else if (dm_type == DIG_TYPE_ENABLE) {
dm_digtable.dig_state = DM_STA_DIG_MAX;
dm_digtable.dig_enable_flag = true;
/* For Each time updating EDCA parameter, reset EDCA turbo mode status. */
dm_init_edca_turbo(dev);
u1bAIFS = qos_parameters->aifs[0] * ((mode&(IEEE_G|IEEE_N_24G)) ? 9 : 20) + aSifsTime;
- u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[0])) << AC_PARAM_TXOP_LIMIT_OFFSET)|
+ u4bAcParam = (((u32)(qos_parameters->tx_op_limit[0])) << AC_PARAM_TXOP_LIMIT_OFFSET)|
(((u32)(qos_parameters->cw_max[0])) << AC_PARAM_ECW_MAX_OFFSET)|
(((u32)(qos_parameters->cw_min[0])) << AC_PARAM_ECW_MIN_OFFSET)|
- ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
+ ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET);
/*write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);*/
write_nic_dword(dev, EDCAPARA_BE, u4bAcParam);
{
struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
- priv->ieee80211->bCTSToSelfEnable = TRUE;
+ priv->ieee80211->bCTSToSelfEnable = true;
priv->ieee80211->CTSToSelfTH = CTSToSelfTHVal;
}
unsigned long curTxOkCnt = 0;
unsigned long curRxOkCnt = 0;
- if (priv->ieee80211->bCTSToSelfEnable != TRUE) {
+ if (priv->ieee80211->bCTSToSelfEnable != true) {
pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
return;
}
/* Check Bit 0-3, it means if RF A-D is enabled. */
for (i = 0; i < RF90_PATH_MAX; i++) {
if (rfpath & (0x01<<i))
- priv->brfpath_rxenable[i] = 1;
+ priv->brfpath_rxenable[i] = true;
else
- priv->brfpath_rxenable[i] = 0;
+ priv->brfpath_rxenable[i] = false;
}
if (!DM_RxPathSelTable.Enable)
return;
priv->ieee80211->fsync_seconddiff_ratethreshold = 200;
priv->ieee80211->fsync_state = Default_Fsync;
priv->framesyncMonitor = 1; /* current default 0xc38 monitor on */
-
- init_timer(&priv->fsync_timer);
- priv->fsync_timer.data = (unsigned long)dev;
- priv->fsync_timer.function = dm_fsync_timer_callback;
+ setup_timer(&priv->fsync_timer, dm_fsync_timer_callback,
+ (unsigned long)dev);
}
static void dm_deInit_fsync(struct net_device *dev)
/*------------------------------Define structure----------------------------*/
/* 2007/10/04 MH Define upper and lower threshold of DIG enable or disable. */
-typedef struct _dynamic_initial_gain_threshold_ {
+struct dig {
u8 dig_enable_flag;
u8 dig_algorithm;
u8 dbg_mode;
bool initialgain_lowerbound_state;
long rssi_val;
-} dig_t;
+};
typedef enum tag_dynamic_init_gain_state_definition {
DM_STA_DIG_OFF = 0,
DIG_CS_RATIO_HIGHER = 1,
DIG_CS_MAX
} dm_dig_cs_ratio_e;
-typedef struct _Dynamic_Rx_Path_Selection_ {
+struct dynamic_rx_path_sel {
u8 Enable;
u8 DbgMode;
u8 cck_method;
u8 rf_rssi[4];
u8 rf_enable_rssi_th[4];
long cck_pwdb_sta[4];
-} DRxPathSel;
+};
typedef enum tag_CCK_Rx_Path_Method_Definition {
CCK_Rx_Version_1 = 0,
/*------------------------Export global variable----------------------------*/
-extern dig_t dm_digtable;
+extern struct dig dm_digtable;
extern u8 dm_shadow[16][256];
-extern DRxPathSel DM_RxPathSelTable;
+extern struct dynamic_rx_path_sel DM_RxPathSelTable;
/*------------------------Export global variable----------------------------*/
down(&priv->wx_sem);
- printk("%s(): force reset ! extra is %d\n", __func__, *extra);
+ netdev_dbg(dev, "%s(): force reset ! extra is %d\n", __func__, *extra);
priv->force_reset = *extra;
up(&priv->wx_sem);
return 0;
if (!priv->up)
return -ENETDOWN;
- if (priv->ieee80211->LinkDetectInfo.bBusyTraffic == true)
+ if (priv->ieee80211->LinkDetectInfo.bBusyTraffic)
return -EAGAIN;
if (wrqu->data.flags & IW_SCAN_THIS_ESSID) {
struct iw_scan_req *req = (struct iw_scan_req *)b;
/*
- This is part of rtl8180 OpenSource driver - v 0.3
- Copyright (C) Andrea Merello 2004 <andrea.merello@gmail.com>
- Released under the terms of GPL (General Public Licence)
+ * This is part of rtl8180 OpenSource driver - v 0.3
+ * Copyright (C) Andrea Merello 2004 <andrea.merello@gmail.com>
+ * Released under the terms of GPL (General Public Licence)
+ *
+ * Parts of this driver are based on the GPL part of the official realtek driver
+ * Parts of this driver are based on the rtl8180 driver skeleton from Patric
+ * Schenke & Andres Salomon
+ * Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
+ *
+ * We want to thank the Authors of such projects and the Ndiswrapper project
+ * Authors.
+ */
- Parts of this driver are based on the GPL part of the official realtek driver
- Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
- Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
-
- We want to thank the Authors of such projects and the Ndiswrapper project Authors.
-*/
-
-/* this file (will) contains wireless extension handlers*/
+/* this file (will) contains wireless extension handlers */
#ifndef R8180_WX_H
#define R8180_WX_H
-//#include <linux/wireless.h>
extern struct iw_handler_def r8192_wx_handlers_def;
/* Enable the rtl819x_core.c to share this function, david 2008.9.22 */
bool rt_status = true;
u16 frag_threshold;
u16 frag_length, frag_offset = 0;
- //u16 total_size;
int i;
rt_firmware *pfirmware = priv->pFirmware;
u8 index;
firmware_init_param(dev);
- //Fragmentation might be required
+ /* Fragmentation might be required */
frag_threshold = pfirmware->cmdpacket_frag_thresold;
do {
if ((buffer_len - frag_offset) > frag_threshold) {
}
-//-----------------------------------------------------------------------------
-// Procedure: Check whether main code is download OK. If OK, turn on CPU
-//
-// Description: CPU register locates in different page against general register.
-// Switch to CPU register in the begin and switch back before return
-//
-//
-// Arguments: The pointer of the adapter
-//
-// Returns:
-// NDIS_STATUS_FAILURE - the following initialization process should be terminated
-// NDIS_STATUS_SUCCESS - if firmware initialization process success
-//-----------------------------------------------------------------------------
+/*
+ * Procedure: Check whether main code is download OK. If OK, turn on CPU
+ *
+ * Description: CPU register locates in different page against general register.
+ * Switch to CPU register in the begin and switch back before return
+ *
+ *
+ * Arguments: The pointer of the adapter
+ *
+ * Returns:
+ * NDIS_STATUS_FAILURE - the following initialization process should
+ * be terminated
+ * NDIS_STATUS_SUCCESS - if firmware initialization process success
+ */
static bool CPUcheck_maincodeok_turnonCPU(struct net_device *dev)
{
bool rt_status = true;
CPUCheckMainCodeOKAndTurnOnCPU_Fail:
RT_TRACE(COMP_ERR, "ERR in %s()\n", __func__);
- rt_status = FALSE;
+ rt_status = false;
return rt_status;
}
bool init_firmware(struct net_device *dev)
{
struct r8192_priv *priv = ieee80211_priv(dev);
- bool rt_status = TRUE;
+ bool rt_status = true;
u32 file_length = 0;
u8 *mapped_file = NULL;
/* it is called by reset */
rst_opt = OPT_SYSTEM_RESET;
starting_state = FW_INIT_STEP0_BOOT;
- // TODO: system reset
+ /* TODO: system reset */
} else if (pfirmware->firmware_status == FW_STATUS_5_READY) {
/* it is called by Initialize */
if (rst_opt == OPT_SYSTEM_RESET)
release_firmware(fw_entry);
- if (rt_status != TRUE)
+ if (!rt_status)
goto download_firmware_fail;
switch (init_step) {
* will set polling bit when firmware code is also configured
*/
pfirmware->firmware_status = FW_STATUS_1_MOVE_BOOT_CODE;
- //mdelay(1000);
+ /* mdelay(1000); */
/*
* To initialize IMEM, CPU move code from 0x80000080,
* hence, we send 0x80 byte packet
/* Check Put Code OK and Turn On CPU */
rt_status = CPUcheck_maincodeok_turnonCPU(dev);
- if (rt_status != TRUE) {
+ if (!rt_status) {
RT_TRACE(COMP_ERR, "CPUcheck_maincodeok_turnonCPU fail!\n");
goto download_firmware_fail;
}
mdelay(1);
rt_status = CPUcheck_firmware_ready(dev);
- if (rt_status != TRUE) {
+ if (!rt_status) {
RT_TRACE(COMP_ERR, "CPUcheck_firmware_ready fail(%d)!\n",rt_status);
goto download_firmware_fail;
}
}
RT_TRACE(COMP_FIRMWARE, "Firmware Download Success\n");
- //assert(pfirmware->firmware_status == FW_STATUS_5_READY, ("Firmware Download Fail\n"));
-
return rt_status;
download_firmware_fail:
RT_TRACE(COMP_ERR, "ERR in %s()\n", __func__);
- rt_status = FALSE;
+ rt_status = false;
return rt_status;
}
/******************************************************************************
* function: This function reads specific bits from BB register
* input: net_device *dev
- * u32 reg_addr //target addr to be readback
- * u32 bitmask //taget bit pos to be readback
+ * u32 reg_addr //target addr to be readback
+ * u32 bitmask //taget bit pos to be readback
* output: none
- * return: u32 data //the readback register value
+ * return: u32 data //the readback register value
* notice:
******************************************************************************/
u32 rtl8192_QueryBBReg(struct net_device *dev, u32 reg_addr, u32 bitmask)
return 0;
if (priv->Rf_Mode == RF_OP_By_FW) {
reg = phy_FwRFSerialRead(dev, eRFPath, reg_addr);
- bitshift = rtl8192_CalculateBitShift(bitmask);
- reg = (reg & bitmask) >> bitshift;
udelay(200);
- return reg;
} else {
reg = rtl8192_phy_RFSerialRead(dev, eRFPath, reg_addr);
- bitshift = rtl8192_CalculateBitShift(bitmask);
- reg = (reg & bitmask) >> bitshift;
- return reg;
}
+ bitshift = rtl8192_CalculateBitShift(bitmask);
+ reg = (reg & bitmask) >> bitshift;
+ return reg;
+
}
/******************************************************************************
/******************************************************************************
* function: This function reads BB parameters from header file we generate,
* and do register read/write
- * input: net_device *dev
+ * input: net_device *dev
* output: none
* return: none
* notice: BB parameters may change all the time, so please make
write_nic_byte_E(dev, 0x5e, 0x00);
if (priv->card_8192_version == (u8)VERSION_819xU_A) {
/* Antenna gain offset from B/C/D to A */
- reg_u32 = (priv->AntennaTxPwDiff[1]<<4 |
- priv->AntennaTxPwDiff[0]);
+ reg_u32 = priv->AntennaTxPwDiff[1]<<4 |
+ priv->AntennaTxPwDiff[0];
rtl8192_setBBreg(dev, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC),
reg_u32);
read_nic_byte(dev, rOFDM0_RxDetector3, &priv->framesync);
read_nic_byte(dev, rOFDM0_RxDetector2, &tmp);
priv->framesyncC34 = tmp;
- RT_TRACE(COMP_INIT, "Default framesync (0x%x) = 0x%x \n",
+ RT_TRACE(COMP_INIT, "Default framesync (0x%x) = 0x%x\n",
rOFDM0_RxDetector3, priv->framesync);
/* Read SIFS (save the value read fome MACPHY_REG.txt) */
if (eRFPowerState == priv->ieee80211->eRFPowerState)
return false;
- if (priv->SetRFPowerStateInProgress == true)
+ if (priv->SetRFPowerStateInProgress)
return false;
priv->SetRFPowerStateInProgress = true;
/* Turn on RF we are still linked, which might
happen when we quickly turn off and on HW RF.
*/
- if (pMgntInfo->bMediaConnect == TRUE)
+ if (pMgntInfo->bMediaConnect)
Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_LINK);
else
/* Turn off LED if RF is not ON. */
default:
RT_TRACE(COMP_ERR, "Unknown RFChipID: %d\n", priv->rf_chip);
return true;
- break;
}
if ((*stage) == 2) {
(*delay) = CurrentCmd->msDelay;
return true;
- } else {
- (*stage)++;
- (*step) = 0;
- continue;
}
+ (*stage)++;
+ (*step) = 0;
+ continue;
}
switch (CurrentCmd->CmdID) {
priv->cck_present_attentuation);
if (priv->chan == 14 && !priv->bcck_in_ch14) {
- priv->bcck_in_ch14 = TRUE;
+ priv->bcck_in_ch14 = true;
dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
} else if (priv->chan != 14 && priv->bcck_in_ch14) {
- priv->bcck_in_ch14 = FALSE;
+ priv->bcck_in_ch14 = false;
dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
} else {
dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xa0a is %x\n",
priv->initgain_backup.cca);
- RT_TRACE(COMP_SCAN, "Write scan initial gain = 0x%x \n",
+ RT_TRACE(COMP_SCAN, "Write scan initial gain = 0x%x\n",
initial_gain);
write_nic_byte(dev, rOFDM0_XAAGCCore1, initial_gain);
write_nic_byte(dev, rOFDM0_XBAGCCore1, initial_gain);
write_nic_byte(dev, rOFDM0_XCAGCCore1, initial_gain);
write_nic_byte(dev, rOFDM0_XDAGCCore1, initial_gain);
- RT_TRACE(COMP_SCAN, "Write scan 0xa0a = 0x%x \n",
+ RT_TRACE(COMP_SCAN, "Write scan 0xa0a = 0x%x\n",
POWER_DETECTION_TH);
write_nic_byte(dev, 0xa0a, POWER_DETECTION_TH);
break;
rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);
break;
default:
- RT_TRACE(COMP_SCAN, "Unknown IG Operation. \n");
+ RT_TRACE(COMP_SCAN, "Unknown IG Operation.\n");
break;
}
}
static void fill_fwpriv(struct _adapter *padapter, struct fw_priv *pfwpriv)
{
- struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv;
+ struct dvobj_priv *pdvobj = &padapter->dvobjpriv;
struct registry_priv *pregpriv = &padapter->registrypriv;
memset(pfwpriv, 0, sizeof(struct fw_priv));
#include "drv_types.h"
#include "mlme_osdep.h"
-static void sitesurvey_ctrl_handler(void *FunctionContext)
+static void sitesurvey_ctrl_handler(unsigned long data)
{
- struct _adapter *adapter = (struct _adapter *)FunctionContext;
+ struct _adapter *adapter = (struct _adapter *)data;
_r8712_sitesurvey_ctrl_handler(adapter);
- _set_timer(&adapter->mlmepriv.sitesurveyctrl.sitesurvey_ctrl_timer,
- 3000);
+ mod_timer(&adapter->mlmepriv.sitesurveyctrl.sitesurvey_ctrl_timer,
+ jiffies + msecs_to_jiffies(3000));
}
-static void join_timeout_handler (void *FunctionContext)
+static void join_timeout_handler (unsigned long data)
{
- struct _adapter *adapter = (struct _adapter *)FunctionContext;
+ struct _adapter *adapter = (struct _adapter *)data;
_r8712_join_timeout_handler(adapter);
}
-static void _scan_timeout_handler (void *FunctionContext)
+static void _scan_timeout_handler (unsigned long data)
{
- struct _adapter *adapter = (struct _adapter *)FunctionContext;
+ struct _adapter *adapter = (struct _adapter *)data;
r8712_scan_timeout_handler(adapter);
}
-static void dhcp_timeout_handler (void *FunctionContext)
+static void dhcp_timeout_handler (unsigned long data)
{
- struct _adapter *adapter = (struct _adapter *)FunctionContext;
+ struct _adapter *adapter = (struct _adapter *)data;
_r8712_dhcp_timeout_handler(adapter);
}
-static void wdg_timeout_handler (void *FunctionContext)
+static void wdg_timeout_handler (unsigned long data)
{
- struct _adapter *adapter = (struct _adapter *)FunctionContext;
+ struct _adapter *adapter = (struct _adapter *)data;
_r8712_wdg_timeout_handler(adapter);
- _set_timer(&adapter->mlmepriv.wdg_timer, 2000);
+ mod_timer(&adapter->mlmepriv.wdg_timer,
+ jiffies + msecs_to_jiffies(2000));
}
void r8712_init_mlme_timer(struct _adapter *padapter)
{
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
- _init_timer(&(pmlmepriv->assoc_timer), padapter->pnetdev,
- join_timeout_handler, (pmlmepriv->nic_hdl));
- _init_timer(&(pmlmepriv->sitesurveyctrl.sitesurvey_ctrl_timer),
- padapter->pnetdev, sitesurvey_ctrl_handler,
- (u8 *)(pmlmepriv->nic_hdl));
- _init_timer(&(pmlmepriv->scan_to_timer), padapter->pnetdev,
- _scan_timeout_handler, (pmlmepriv->nic_hdl));
- _init_timer(&(pmlmepriv->dhcp_timer), padapter->pnetdev,
- dhcp_timeout_handler, (u8 *)(pmlmepriv->nic_hdl));
- _init_timer(&(pmlmepriv->wdg_timer), padapter->pnetdev,
- wdg_timeout_handler, (u8 *)(pmlmepriv->nic_hdl));
+ setup_timer(&pmlmepriv->assoc_timer, join_timeout_handler,
+ (unsigned long)padapter);
+ setup_timer(&pmlmepriv->sitesurveyctrl.sitesurvey_ctrl_timer,
+ sitesurvey_ctrl_handler,
+ (unsigned long)padapter);
+ setup_timer(&pmlmepriv->scan_to_timer, _scan_timeout_handler,
+ (unsigned long)padapter);
+ setup_timer(&pmlmepriv->dhcp_timer, dhcp_timeout_handler,
+ (unsigned long)padapter);
+ setup_timer(&pmlmepriv->wdg_timer, wdg_timeout_handler,
+ (unsigned long)padapter);
}
void r8712_os_indicate_connect(struct _adapter *adapter)
btkip_countermeasure;
memset((unsigned char *)&adapter->securitypriv, 0,
sizeof(struct security_priv));
- _init_timer(&(adapter->securitypriv.tkip_timer),
- adapter->pnetdev, r8712_use_tkipkey_handler,
- adapter);
+ setup_timer(&adapter->securitypriv.tkip_timer,
+ r8712_use_tkipkey_handler,
+ (unsigned long)adapter);
/* Restore the PMK information to securitypriv structure
* for the following connection. */
memcpy(&adapter->securitypriv.PMKIDList[0],
static int r871x_net_set_mac_address(struct net_device *pnetdev, void *p)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(pnetdev);
+ struct _adapter *padapter = netdev_priv(pnetdev);
struct sockaddr *addr = p;
if (padapter->bup == false)
static struct net_device_stats *r871x_net_get_stats(struct net_device *pnetdev)
{
- struct _adapter *padapter = (struct _adapter *) netdev_priv(pnetdev);
+ struct _adapter *padapter = netdev_priv(pnetdev);
struct xmit_priv *pxmitpriv = &(padapter->xmitpriv);
struct recv_priv *precvpriv = &(padapter->recvpriv);
strcpy(ifname, "wlan%d");
dev_alloc_name(pnetdev, ifname);
}
- padapter = (struct _adapter *) netdev_priv(pnetdev);
+ padapter = netdev_priv(pnetdev);
padapter->pnetdev = pnetdev;
pr_info("r8712u: register rtl8712_netdev_ops to netdev_ops\n");
pnetdev->netdev_ops = &rtl8712_netdev_ops;
static void start_drv_timers(struct _adapter *padapter)
{
- _set_timer(&padapter->mlmepriv.sitesurveyctrl.sitesurvey_ctrl_timer,
- 5000);
- _set_timer(&padapter->mlmepriv.wdg_timer, 2000);
+ mod_timer(&padapter->mlmepriv.sitesurveyctrl.sitesurvey_ctrl_timer,
+ jiffies + msecs_to_jiffies(5000));
+ mod_timer(&padapter->mlmepriv.wdg_timer,
+ jiffies + msecs_to_jiffies(2000));
}
void r8712_stop_drv_timers(struct _adapter *padapter)
{
- _cancel_timer_ex(&padapter->mlmepriv.assoc_timer);
- _cancel_timer_ex(&padapter->securitypriv.tkip_timer);
- _cancel_timer_ex(&padapter->mlmepriv.scan_to_timer);
- _cancel_timer_ex(&padapter->mlmepriv.dhcp_timer);
- _cancel_timer_ex(&padapter->mlmepriv.wdg_timer);
- _cancel_timer_ex(&padapter->mlmepriv.sitesurveyctrl.
- sitesurvey_ctrl_timer);
+ del_timer_sync(&padapter->mlmepriv.assoc_timer);
+ del_timer_sync(&padapter->securitypriv.tkip_timer);
+ del_timer_sync(&padapter->mlmepriv.scan_to_timer);
+ del_timer_sync(&padapter->mlmepriv.dhcp_timer);
+ del_timer_sync(&padapter->mlmepriv.wdg_timer);
+ del_timer_sync(&padapter->mlmepriv.sitesurveyctrl.sitesurvey_ctrl_timer);
}
static u8 init_default_value(struct _adapter *padapter)
_r8712_init_recv_priv(&padapter->recvpriv, padapter);
memset((unsigned char *)&padapter->securitypriv, 0,
sizeof(struct security_priv));
- _init_timer(&(padapter->securitypriv.tkip_timer), padapter->pnetdev,
- r8712_use_tkipkey_handler, padapter);
+ setup_timer(&padapter->securitypriv.tkip_timer,
+ r8712_use_tkipkey_handler, (unsigned long)padapter);
_r8712_init_sta_priv(&padapter->stapriv);
padapter->stapriv.padapter = padapter;
r8712_init_bcmc_stainfo(padapter);
*/
static int netdev_open(struct net_device *pnetdev)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(pnetdev);
+ struct _adapter *padapter = netdev_priv(pnetdev);
mutex_lock(&padapter->mutex_start);
if (padapter->bup == false) {
*/
static int netdev_close(struct net_device *pnetdev)
{
- struct _adapter *padapter = (struct _adapter *) netdev_priv(pnetdev);
+ struct _adapter *padapter = netdev_priv(pnetdev);
/* Close LED*/
padapter->ledpriv.LedControlHandler(padapter, LED_CTL_POWER_OFF);
#define LIST_CONTAINOR(ptr, type, member) \
((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member)))
-static inline void _init_timer(struct timer_list *ptimer,
- struct net_device *padapter,
- void *pfunc, void *cntx)
-{
- ptimer->function = pfunc;
- ptimer->data = (addr_t)cntx;
- init_timer(ptimer);
-}
-
-static inline void _set_timer(struct timer_list *ptimer, u32 delay_time)
-{
- mod_timer(ptimer, (jiffies+msecs_to_jiffies(delay_time)));
-}
-
-static inline void _cancel_timer(struct timer_list *ptimer, u8 *bcancelled)
-{
- del_timer(ptimer);
- *bcancelled = true; /*true ==1; false==0*/
-}
-
#ifndef BIT
#define BIT(x) (1 << (x))
#endif
schedule_timeout(delta);
}
-static inline unsigned char _cancel_timer_ex(struct timer_list *ptimer)
-{
- return del_timer(ptimer);
-}
-
static inline void flush_signals_thread(void)
{
if (signal_pending(current))
else
ev.flags |= IW_MICFAILURE_PAIRWISE;
ev.src_addr.sa_family = ARPHRD_ETHER;
- memcpy(ev.src_addr.sa_data, &pmlmepriv->assoc_bssid[0], ETH_ALEN);
+ ether_addr_copy(ev.src_addr.sa_data, &pmlmepriv->assoc_bssid[0]);
memset(&wrqu, 0x00, sizeof(wrqu));
wrqu.data.length = sizeof(ev);
wireless_send_event(padapter->pnetdev, IWEVMICHAELMICFAILURE, &wrqu,
precvpriv->rx_drop++;
}
-static void _r8712_reordering_ctrl_timeout_handler (void *FunctionContext)
+static void _r8712_reordering_ctrl_timeout_handler (unsigned long data)
{
struct recv_reorder_ctrl *preorder_ctrl =
- (struct recv_reorder_ctrl *)FunctionContext;
+ (struct recv_reorder_ctrl *)data;
r8712_reordering_ctrl_timeout_handler(preorder_ctrl);
}
void r8712_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl)
{
- struct _adapter *padapter = preorder_ctrl->padapter;
-
- _init_timer(&(preorder_ctrl->reordering_ctrl_timer), padapter->pnetdev,
- _r8712_reordering_ctrl_timeout_handler, preorder_ctrl);
+ setup_timer(&preorder_ctrl->reordering_ctrl_timer,
+ _r8712_reordering_ctrl_timeout_handler,
+ (unsigned long)preorder_ctrl);
}
val32 = r8712_read32(padapter, IOCMD_DATA_REG);
else /* time out */
val32 = 0;
- val32 = val32 >> 4;
+ val32 >>= 4;
padapter->recvpriv.fw_rssi =
(u8)r8712_signal_scale_mapping(val32);
}
pLed->bLedBlinkInProgress = false;
pLed->BlinkTimes = 0;
pLed->BlinkingLedState = LED_UNKNOWN;
- _init_timer(&(pLed->BlinkTimer), nic, BlinkTimerCallback, pLed);
+ setup_timer(&pLed->BlinkTimer, BlinkTimerCallback,
+ (unsigned long)pLed);
INIT_WORK(&pLed->BlinkWorkItem, BlinkWorkItemCallback);
}
*/
static void DeInitLed871x(struct LED_871x *pLed)
{
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
/* We should reset bLedBlinkInProgress if we cancel
* the LedControlTimer, */
pLed->bLedBlinkInProgress = false;
/* Schedule a timer to toggle LED state. */
switch (pLed->CurrLedState) {
case LED_BLINK_NORMAL:
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NORMAL_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NORMAL_INTERVAL));
break;
case LED_BLINK_SLOWLY:
case LED_BLINK_StartToBlink:
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SLOWLY_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SLOWLY_INTERVAL));
break;
case LED_BLINK_WPS:
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_LONG_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LONG_INTERVAL));
break;
default:
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SLOWLY_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SLOWLY_INTERVAL));
break;
}
}
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
break;
case LED_BLINK_NORMAL:
if (pLed->bLedOn)
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
break;
case LED_SCAN_BLINK:
pLed->BlinkTimes--;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
} else if (!check_fwstate(pmlmepriv, _FW_LINKED)) {
pLed->bLedNoLinkBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_SLOWLY;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
}
pLed->bLedScanBlinkInProgress = false;
} else {
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_TXRX_BLINK:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
} else if (!check_fwstate(pmlmepriv, _FW_LINKED)) {
pLed->bLedNoLinkBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_SLOWLY;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
}
pLed->BlinkTimes = 0;
pLed->bLedBlinkInProgress = false;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_BLINK_WPS:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
break;
case LED_BLINK_WPS_STOP: /* WPS success */
if (pLed->BlinkingLedState == LED_ON) {
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA));
bStopBlinking = false;
} else
bStopBlinking = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
}
pLed->bLedWPSBlinkInProgress = false;
break;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_TXRX_BLINK:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
default:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_TXRX_BLINK:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_BLINK_WPS:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
break;
case LED_BLINK_WPS_STOP: /*WPS success*/
if (pLed->BlinkingLedState == LED_ON) {
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA));
bStopBlinking = false;
} else
bStopBlinking = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
break;
case LED_BLINK_StartToBlink:
if (pLed->bLedOn) {
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SLOWLY_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SLOWLY_INTERVAL));
} else {
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NORMAL_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NORMAL_INTERVAL));
}
break;
case LED_SCAN_BLINK:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
pLed->bLedScanBlinkInProgress = false;
} else {
if (pLed->bLedOn)
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_TXRX_BLINK:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
pLed->bLedBlinkInProgress = false;
} else {
if (pLed->bLedOn)
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_BLINK_WPS:
if (pLed->bLedOn) {
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SLOWLY_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SLOWLY_INTERVAL));
} else {
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NORMAL_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NORMAL_INTERVAL));
}
break;
case LED_BLINK_WPS_STOP: /*WPS authentication fail*/
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NORMAL_INTERVAL));
break;
case LED_BLINK_WPS_STOP_OVERLAP: /*WPS session overlap */
pLed->BlinkTimes--;
if (bStopBlinking) {
pLed->BlinkTimes = 10;
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
} else {
if (pLed->bLedOn)
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NORMAL_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NORMAL_INTERVAL));
}
break;
default:
pLed->CurrLedState = LED_ON;
pLed->BlinkingLedState = LED_ON;
if (!pLed->bLedOn)
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
pLed->bLedScanBlinkInProgress = false;
} else {
if (pLed->bLedOn)
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_TXRX_BLINK:
pLed->CurrLedState = LED_ON;
pLed->BlinkingLedState = LED_ON;
if (!pLed->bLedOn)
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
pLed->bLedBlinkInProgress = false;
} else {
if (pLed->bLedOn)
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
default:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_BLINK_WPS:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
break;
default:
IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedNoLinkBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
}
break;
case LED_CTL_LINK:
IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedNoLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedLinkBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
}
break;
case LED_CTL_SITE_SURVEY:
if (IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedNoLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedScanBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_CTL_TX:
IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedNoLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
pLed->bLedBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_CTL_START_WPS_BOTTON:
if (pLed->bLedWPSBlinkInProgress == false) {
if (pLed->bLedNoLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
pLed->bLedWPSBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_CTL_STOP_WPS:
if (pLed->bLedNoLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
if (pLed->bLedWPSBlinkInProgress)
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
else
pLed->bLedWPSBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_WPS_STOP;
if (pLed->bLedOn) {
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA));
} else {
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
}
break;
case LED_CTL_STOP_WPS_FAIL:
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
pLed->bLedNoLinkBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
break;
case LED_CTL_POWER_OFF:
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
if (pLed->bLedNoLinkBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedLinkBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
default:
break;
return;
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedScanBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
pLed->CurrLedState = LED_ON;
pLed->BlinkingLedState = LED_ON;
if (pLed->bLedBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
case LED_CTL_START_WPS: /*wait until xinpin finish*/
case LED_CTL_START_WPS_BOTTON:
if (pLed->bLedWPSBlinkInProgress == false) {
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
pLed->bLedWPSBlinkInProgress = true;
pLed->CurrLedState = LED_ON;
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
}
break;
pLed->bLedWPSBlinkInProgress = false;
pLed->CurrLedState = LED_ON;
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
case LED_CTL_STOP_WPS_FAIL:
pLed->bLedWPSBlinkInProgress = false;
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
case LED_CTL_START_TO_LINK:
if (!IS_LED_BLINKING(pLed)) {
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
}
break;
case LED_CTL_POWER_OFF:
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
if (pLed->bLedBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
default:
break;
if (IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedScanBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_CTL_TX:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_CTL_LINK:
pLed->CurrLedState = LED_ON;
pLed->BlinkingLedState = LED_ON;
if (pLed->bLedBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
case LED_CTL_START_WPS: /* wait until xinpin finish */
case LED_CTL_START_WPS_BOTTON:
if (pLed->bLedWPSBlinkInProgress == false) {
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
pLed->bLedWPSBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_CTL_STOP_WPS:
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&(pLed->BlinkTimer));
pLed->bLedWPSBlinkInProgress = false;
} else
pLed->bLedWPSBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_WPS_STOP;
if (pLed->bLedOn) {
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA));
} else {
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
}
break;
case LED_CTL_STOP_WPS_FAIL:
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
case LED_CTL_START_TO_LINK:
case LED_CTL_NO_LINK:
if (!IS_LED_BLINKING(pLed)) {
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
}
break;
case LED_CTL_POWER_OFF:
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
if (pLed->bLedBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
default:
break;
case LED_CTL_START_TO_LINK:
if (pLed1->bLedWPSBlinkInProgress) {
pLed1->bLedWPSBlinkInProgress = false;
- _cancel_timer_ex(&(pLed1->BlinkTimer));
+ del_timer_sync(&pLed1->BlinkTimer);
pLed1->BlinkingLedState = LED_OFF;
pLed1->CurrLedState = LED_OFF;
if (pLed1->bLedOn)
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
}
if (pLed->bLedStartToLinkBlinkInProgress == false) {
if (pLed->CurrLedState == LED_SCAN_BLINK ||
IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedNoLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
pLed->bLedStartToLinkBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_StartToBlink;
if (pLed->bLedOn) {
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SLOWLY_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SLOWLY_INTERVAL));
} else {
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NORMAL_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NORMAL_INTERVAL));
}
}
break;
if (LedAction == LED_CTL_LINK) {
if (pLed1->bLedWPSBlinkInProgress) {
pLed1->bLedWPSBlinkInProgress = false;
- _cancel_timer_ex(&(pLed1->BlinkTimer));
+ del_timer_sync(&pLed1->BlinkTimer);
pLed1->BlinkingLedState = LED_OFF;
pLed1->CurrLedState = LED_OFF;
if (pLed1->bLedOn)
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
}
}
if (pLed->bLedNoLinkBlinkInProgress == false) {
IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedNoLinkBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
}
break;
case LED_CTL_SITE_SURVEY:
if (IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedNoLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedScanBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_CTL_TX:
IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedNoLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
pLed->bLedBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_CTL_START_WPS: /*wait until xinpin finish*/
case LED_CTL_START_WPS_BOTTON:
if (pLed1->bLedWPSBlinkInProgress) {
pLed1->bLedWPSBlinkInProgress = false;
- _cancel_timer_ex(&(pLed1->BlinkTimer));
+ del_timer_sync(&(pLed1->BlinkTimer));
pLed1->BlinkingLedState = LED_OFF;
pLed1->CurrLedState = LED_OFF;
if (pLed1->bLedOn)
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
}
if (pLed->bLedWPSBlinkInProgress == false) {
if (pLed->bLedNoLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
pLed->bLedWPSBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_WPS;
if (pLed->bLedOn) {
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SLOWLY_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SLOWLY_INTERVAL));
} else {
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NORMAL_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NORMAL_INTERVAL));
}
}
break;
case LED_CTL_STOP_WPS: /*WPS connect success*/
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
pLed->bLedNoLinkBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
break;
case LED_CTL_STOP_WPS_FAIL: /*WPS authentication fail*/
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
pLed->bLedNoLinkBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
/*LED1 settings*/
if (pLed1->bLedWPSBlinkInProgress)
- _cancel_timer_ex(&(pLed1->BlinkTimer));
+ del_timer_sync(&pLed1->BlinkTimer);
else
pLed1->bLedWPSBlinkInProgress = true;
pLed1->CurrLedState = LED_BLINK_WPS_STOP;
pLed1->BlinkingLedState = LED_OFF;
else
pLed1->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NORMAL_INTERVAL));
break;
case LED_CTL_STOP_WPS_FAIL_OVERLAP: /*WPS session overlap*/
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
pLed->bLedNoLinkBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
/*LED1 settings*/
if (pLed1->bLedWPSBlinkInProgress)
- _cancel_timer_ex(&(pLed1->BlinkTimer));
+ del_timer_sync(&pLed1->BlinkTimer);
else
pLed1->bLedWPSBlinkInProgress = true;
pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP;
pLed1->BlinkingLedState = LED_OFF;
else
pLed1->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NORMAL_INTERVAL));
break;
case LED_CTL_POWER_OFF:
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
if (pLed->bLedNoLinkBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedLinkBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
if (pLed->bLedStartToLinkBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedStartToLinkBlinkInProgress = false;
}
if (pLed1->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed1->BlinkTimer));
+ del_timer_sync(&pLed1->BlinkTimer);
pLed1->bLedWPSBlinkInProgress = false;
}
pLed1->BlinkingLedState = LED_UNKNOWN;
pLed->CurrLedState = LED_ON;
pLed->BlinkingLedState = LED_ON;
pLed->bLedBlinkInProgress = false;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
case LED_CTL_SITE_SURVEY:
if ((pmlmepriv->sitesurveyctrl.traffic_busy) &&
; /* dummy branch */
else if (pLed->bLedScanBlinkInProgress == false) {
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedScanBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_CTL_TX:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_CTL_POWER_OFF:
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
if (pLed->bLedBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
SwLedOff(padapter, pLed);
pLed->CurrLedState = LED_ON;
pLed->BlinkingLedState = LED_ON;
pLed->bLedBlinkInProgress = false;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&(pLed->BlinkTimer), jiffies + msecs_to_jiffies(0));
break;
case LED_CTL_TX:
case LED_CTL_RX:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_CTL_START_WPS: /*wait until xinpin finish*/
case LED_CTL_START_WPS_BOTTON:
if (pLed->bLedWPSBlinkInProgress == false) {
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedWPSBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_CTL_STOP_WPS_FAIL:
case LED_CTL_STOP_WPS:
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
pLed->CurrLedState = LED_ON;
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
case LED_CTL_POWER_OFF:
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
if (pLed->bLedBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
SwLedOff(padapter, pLed);
u16 drvinfo_sz = 0;
drvinfo_sz = (le32_to_cpu(prxstat->rxdw0)&0x000f0000)>>16;
- drvinfo_sz = drvinfo_sz<<3;
+ drvinfo_sz <<= 3;
/*TODO:
* Offset 0 */
pattrib->bdecrypted = ((le32_to_cpu(prxstat->rxdw0) & BIT(27)) >> 27)
? 0 : 1;
- pattrib->crc_err = ((le32_to_cpu(prxstat->rxdw0) & BIT(14)) >> 14);
+ pattrib->crc_err = (le32_to_cpu(prxstat->rxdw0) & BIT(14)) >> 14;
/*Offset 4*/
/*Offset 8*/
/*Offset 12*/
poffset = (u8 *)prxcmdbuf;
voffset = *(uint *)poffset;
prxstat = (struct recv_stat *)prxcmdbuf;
- drvinfo_sz = ((le32_to_cpu(prxstat->rxdw0) & 0x000f0000) >> 16);
- drvinfo_sz = drvinfo_sz << 3;
+ drvinfo_sz = (le32_to_cpu(prxstat->rxdw0) & 0x000f0000) >> 16;
+ drvinfo_sz <<= 3;
poffset += RXDESC_SIZE + drvinfo_sz;
do {
voffset = *(uint *)poffset;
*/
if (r8712_recv_indicatepkts_in_order(padapter, preorder_ctrl, false) ==
true) {
- _set_timer(&preorder_ctrl->reordering_ctrl_timer,
- REORDER_WAIT_TIME);
+ mod_timer(&preorder_ctrl->reordering_ctrl_timer,
+ jiffies + msecs_to_jiffies(REORDER_WAIT_TIME));
spin_unlock_irqrestore(&ppending_recvframe_queue->lock, irql);
} else {
spin_unlock_irqrestore(&ppending_recvframe_queue->lock, irql);
- _cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer);
+ del_timer(&preorder_ctrl->reordering_ctrl_timer);
}
return _SUCCESS;
_err_exit:
*/
if (!cck_highpwr) {
report = pcck_buf->cck_agc_rpt & 0xc0;
- report = report >> 6;
+ report >>= 6;
switch (report) {
/* Modify the RF RNA gain value to -40, -20,
* -2, 14 by Jenyu's suggestion
} else {
report = ((u8)(le32_to_cpu(pphy_stat->phydw1) >> 8)) &
0x60;
- report = report >> 5;
+ report >>= 5;
switch (report) {
case 0x3:
rx_pwr_all = -40 - ((pcck_buf->cck_agc_rpt &
frag = (le32_to_cpu(prxstat->rxdw2) >> 12) & 0xf;
/* uint 2^3 = 8 bytes */
drvinfo_sz = (le32_to_cpu(prxstat->rxdw0) & 0x000f0000) >> 16;
- drvinfo_sz = drvinfo_sz<<3;
+ drvinfo_sz <<= 3;
if (pkt_len <= 0)
goto _exit_recvbuf2recvframe;
/* Qos data, wireless lan header length is 26 */
}
set_fwstate(pmlmepriv, _FW_UNDER_SURVEY);
r8712_enqueue_cmd(pcmdpriv, ph2c);
- _set_timer(&pmlmepriv->scan_to_timer, SCANNING_TIMEOUT);
+ mod_timer(&pmlmepriv->scan_to_timer,
+ jiffies + msecs_to_jiffies(SCANNING_TIMEOUT));
padapter->ledpriv.LedControlHandler(padapter, LED_CTL_SITE_SURVEY);
padapter->blnEnableRxFF0Filter = 0;
return _SUCCESS;
* the driver just has the bssid information for PMKIDList searching.
*/
if (pmlmepriv->assoc_by_bssid == false)
- memcpy(&pmlmepriv->assoc_bssid[0],
- &pnetwork->network.MacAddress[0], ETH_ALEN);
+ ether_addr_copy(&pmlmepriv->assoc_bssid[0],
+ &pnetwork->network.MacAddress[0]);
psecnetwork->IELength = r8712_restruct_sec_ie(padapter,
&pnetwork->network.IEs[0],
&psecnetwork->IEs[0],
init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_);
ph2c->rsp = (u8 *) psetstakey_rsp;
ph2c->rspsz = sizeof(struct set_stakey_rsp);
- memcpy(psetstakey_para->addr, sta->hwaddr, ETH_ALEN);
+ ether_addr_copy(psetstakey_para->addr, sta->hwaddr);
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE))
psetstakey_para->algorithm = (unsigned char)
psecuritypriv->PrivacyAlgrthm;
}
init_h2fwcmd_w_parm_no_rsp(ph2c, psetMacAddr_para,
_SetMacAddress_CMD_);
- memcpy(psetMacAddr_para->MacAddr, mac_addr, ETH_ALEN);
+ ether_addr_copy(psetMacAddr_para->MacAddr, mac_addr);
r8712_enqueue_cmd(pcmdpriv, ph2c);
return _SUCCESS;
}
init_h2fwcmd_w_parm_no_rsp(ph2c, psetassocsta_para, _SetAssocSta_CMD_);
ph2c->rsp = (u8 *) psetassocsta_rsp;
ph2c->rspsz = sizeof(struct set_assocsta_rsp);
- memcpy(psetassocsta_para->addr, mac_addr, ETH_ALEN);
+ ether_addr_copy(psetassocsta_para->addr, mac_addr);
r8712_enqueue_cmd(pcmdpriv, ph2c);
return _SUCCESS;
}
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
if (pcmd->res != H2C_SUCCESS)
- _set_timer(&pmlmepriv->assoc_timer, 1);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(1));
r8712_free_cmd_obj(pcmd);
}
struct cmd_obj *pcmd)
{
unsigned long irqL;
- u8 timer_cancelled;
struct sta_info *psta = NULL;
struct wlan_network *pwlan = NULL;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_network *tgt_network = &(pmlmepriv->cur_network);
if (pcmd->res != H2C_SUCCESS)
- _set_timer(&pmlmepriv->assoc_timer, 1);
- _cancel_timer(&pmlmepriv->assoc_timer, &timer_cancelled);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(1));
+ del_timer_sync(&pmlmepriv->assoc_timer);
#ifdef __BIG_ENDIAN
/* endian_convert */
pnetwork->Length = le32_to_cpu(pnetwork->Length);
udelay(CLOCK_RATE);
up_clk(padapter, &x);
down_clk(padapter, &x);
- mask = mask >> 1;
+ mask >>= 1;
} while (mask);
if (padapter->bSurpriseRemoved == true)
goto out;
x &= ~(_EEDO | _EEDI);
d = 0;
for (i = 0; i < 16; i++) {
- d = d << 1;
+ d <<= 1;
up_clk(padapter, &x);
if (padapter->bSurpriseRemoved == true)
goto out;
#include <linux/semaphore.h>
#include <net/iw_handler.h>
#include <linux/if_arp.h>
+#include <linux/etherdevice.h>
+
#define RTL_IOCTL_WPA_SUPPLICANT (SIOCIWFIRSTPRIV + 0x1E)
union iwreq_data wrqu;
wrqu.ap_addr.sa_family = ARPHRD_ETHER;
- memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
+ eth_zero_addr(wrqu.ap_addr.sa_data);
wireless_send_event(padapter->pnetdev, SIOCGIWAP, &wrqu, NULL);
}
memcpy(psta->tkiprxmickey. skey, &(param->u.crypt.
key[24]), 8);
padapter->securitypriv. busetkipkey = false;
- _set_timer(&padapter->securitypriv.tkip_timer, 50);
+ mod_timer(&padapter->securitypriv.tkip_timer,
+ jiffies + msecs_to_jiffies(50));
}
r8712_setstakey_cmd(padapter, (unsigned char *)psta, true);
}
if (padapter->registrypriv.power_mgnt > PS_MODE_ACTIVE) {
if (padapter->registrypriv.power_mgnt != padapter->
pwrctrlpriv.pwr_mode)
- _set_timer(&(padapter->mlmepriv.dhcp_timer),
- 60000);
+ mod_timer(&padapter->mlmepriv.dhcp_timer,
+ jiffies + msecs_to_jiffies(60000));
}
}
}
/* AP MAC address */
iwe.cmd = SIOCGIWAP;
iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
- memcpy(iwe.u.ap_addr.sa_data, pnetwork->network.MacAddress, ETH_ALEN);
+ ether_addr_copy(iwe.u.ap_addr.sa_data, pnetwork->network.MacAddress);
start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_ADDR_LEN);
/* Add the ESSID */
iwe.cmd = SIOCGIWESSID;
static int wpa_set_auth_algs(struct net_device *dev, u32 value)
{
- struct _adapter *padapter = (struct _adapter *) netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
int ret = 0;
if ((value & AUTH_ALG_SHARED_KEY) && (value & AUTH_ALG_OPEN_SYSTEM)) {
int ret = 0;
u32 wep_key_idx, wep_key_len = 0;
struct NDIS_802_11_WEP *pwep = NULL;
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
u32 ht_ielen = 0;
char *p;
u8 ht_cap = false;
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct iw_freq *fwrq = &wrqu->freq;
int rc = 0;
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct ndis_wlan_bssid_ex *pcur_bss = &pmlmepriv->cur_network.network;
struct iw_request_info *a,
union iwreq_data *wrqu, char *b)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
enum NDIS_802_11_NETWORK_INFRASTRUCTURE networkType;
switch (wrqu->mode) {
static int r8711_wx_get_mode(struct net_device *dev, struct iw_request_info *a,
union iwreq_data *wrqu, char *b)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true)
struct iw_request_info *a,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct iw_pmksa *pPMK = (struct iw_pmksa *) extra;
u8 strZeroMacAddress[ETH_ALEN] = {0x00};
strIssueBssid, ETH_ALEN)) {
/* BSSID is matched, the same AP => Remove
* this PMKID information and reset it. */
- memset(psecuritypriv->PMKIDList[j].Bssid,
- 0x00, ETH_ALEN);
+ eth_zero_addr(psecuritypriv->PMKIDList[j].Bssid);
psecuritypriv->PMKIDList[j].bUsed = false;
break;
}
char *extra)
{
int ret = -EINPROGRESS;
- struct _adapter *padapter = (struct _adapter *) netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct __queue *queue = &pmlmepriv->scanned_queue;
struct sockaddr *temp = (struct sockaddr *)awrq;
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct ndis_wlan_bssid_ex *pcur_bss = &pmlmepriv->cur_network.network;
wrqu->ap_addr.sa_family = ARPHRD_ETHER;
if (check_fwstate(pmlmepriv, _FW_LINKED | WIFI_ADHOC_MASTER_STATE |
WIFI_AP_STATE))
- memcpy(wrqu->ap_addr.sa_data, pcur_bss->MacAddress, ETH_ALEN);
+ ether_addr_copy(wrqu->ap_addr.sa_data, pcur_bss->MacAddress);
else
- memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
+ eth_zero_addr(wrqu->ap_addr.sa_data);
return 0;
}
union iwreq_data *wrqu, char *extra)
{
int ret = 0;
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct iw_mlme *mlme = (struct iw_mlme *) extra;
if (mlme == NULL)
struct iw_request_info *a,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
u8 status = true;
struct iw_request_info *a,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct __queue *queue = &pmlmepriv->scanned_queue;
struct wlan_network *pnetwork = NULL;
struct iw_request_info *a,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct __queue *queue = &pmlmepriv->scanned_queue;
struct wlan_network *pnetwork = NULL;
struct iw_request_info *a,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct ndis_wlan_bssid_ex *pcur_bss = &pmlmepriv->cur_network.network;
u32 len, ret = 0;
struct iw_request_info *a,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
u32 target_rate = wrqu->bitrate.value;
u32 fixed = wrqu->bitrate.fixed;
u32 ratevalue = 0;
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct ndis_wlan_bssid_ex *pcur_bss = &pmlmepriv->cur_network.network;
struct ieee80211_ht_cap *pht_capie;
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
wrqu->rts.value = padapter->registrypriv.rts_thresh;
wrqu->rts.fixed = 0; /* no auto select */
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
if (wrqu->frag.disabled)
padapter->xmitpriv.frag_len = MAX_FRAG_THRESHOLD;
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *) netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
wrqu->frag.value = padapter->xmitpriv.frag_len;
wrqu->frag.fixed = 0; /* no auto select */
struct NDIS_802_11_WEP wep;
enum NDIS_802_11_AUTHENTICATION_MODE authmode;
struct iw_point *erq = &(wrqu->encoding);
- struct _adapter *padapter = (struct _adapter *) netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
key = erq->flags & IW_ENCODE_INDEX;
memset(&wep, 0, sizeof(struct NDIS_802_11_WEP));
union iwreq_data *wrqu, char *keybuf)
{
uint key, ret = 0;
- struct _adapter *padapter = (struct _adapter *) netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct iw_point *erq = &(wrqu->encoding);
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
return r871x_set_wpa_ie(padapter, extra, wrqu->data.length);
}
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct iw_param *param = (struct iw_param *)&(wrqu->param);
int paramid;
int paramval;
struct iw_request_info *info,
union iwreq_data *wrqu, char *keybuf)
{
- struct _adapter *padapter = (struct _adapter *) netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
u32 addr;
u32 data32;
struct iw_request_info *info,
union iwreq_data *wrqu, char *keybuf)
{
- struct _adapter *padapter = (struct _adapter *) netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
u32 addr;
u32 data32;
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct iw_point *p = &wrqu->data;
struct oid_par_priv oid_par;
struct mp_ioctl_handler *phandler;
bset = (u8)(p->flags & 0xFFFF);
len = p->length;
pparmbuf = NULL;
- pparmbuf = kmalloc(len, GFP_ATOMIC);
- if (pparmbuf == NULL) {
- ret = -ENOMEM;
- goto _r871x_mp_ioctl_hdl_exit;
- }
- if (copy_from_user(pparmbuf, p->pointer, len)) {
- ret = -EFAULT;
+ pparmbuf = memdup_user(p->pointer, len);
+ if (IS_ERR(pparmbuf)) {
+ ret = PTR_ERR(pparmbuf);
goto _r871x_mp_ioctl_hdl_exit;
}
poidparam = (struct mp_ioctl_param *)pparmbuf;
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct __queue *queue = &pmlmepriv->scanned_queue;
struct iw_point *pdata = &wrqu->data;
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *) netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct iw_point *pdata = &wrqu->data;
if ((padapter->bDriverStopped) || (pdata == NULL))
union iwreq_data *wrqu, char *extra)
{
int ret = 0;
- struct _adapter *padapter = (struct _adapter *) netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct iw_point *pdata = &wrqu->data;
int ch_plan = -1;
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
- struct _adapter *padapter = (struct _adapter *)netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct iw_point *pdata = &wrqu->data;
u32 u32wps_start = 0;
static int wpa_set_param(struct net_device *dev, u8 name, u32 value)
{
- struct _adapter *padapter = (struct _adapter *) netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
switch (name) {
case IEEE_PARAM_WPA_ENABLED:
static int wpa_mlme(struct net_device *dev, u32 command, u32 reason)
{
- struct _adapter *padapter = (struct _adapter *) netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
switch (command) {
case IEEE_MLME_STA_DEAUTH:
{
struct ieee_param *param;
int ret = 0;
- struct _adapter *padapter = (struct _adapter *) netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
if (p->length < sizeof(struct ieee_param) || !p->pointer)
return -EINVAL;
static struct iw_statistics *r871x_get_wireless_stats(struct net_device *dev)
{
- struct _adapter *padapter = (struct _adapter *) netdev_priv(dev);
+ struct _adapter *padapter = netdev_priv(dev);
struct iw_statistics *piwstats = &padapter->iwstats;
int tmp_level = 0;
int tmp_qual = 0;
ret = r8712_select_and_join_from_scan(pmlmepriv);
if (ret == _SUCCESS)
- _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(MAX_JOIN_TIMEOUT));
else {
if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) {
/* submit r8712_createbss_cmd to change to an
/* clear WIFI_STATION_STATE; WIFI_AP_STATE; WIFI_ADHOC_STATE;
* WIFI_ADHOC_MASTER_STATE */
_clr_fwstate_(pmlmepriv, WIFI_STATION_STATE | WIFI_AP_STATE |
- WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE |
- WIFI_AP_STATE);
+ WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE);
switch (networktype) {
case Ndis802_11IBSS:
set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
spin_lock_irqsave(&pmlmepriv->lock, irqL);
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == true) {
- u8 timer_cancelled;
-
- _cancel_timer(&pmlmepriv->scan_to_timer, &timer_cancelled);
+ del_timer_sync(&pmlmepriv->scan_to_timer);
_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY);
}
if (r8712_select_and_join_from_scan(pmlmepriv)
== _SUCCESS)
- _set_timer(&pmlmepriv->assoc_timer,
- MAX_JOIN_TIMEOUT);
+ mod_timer(&pmlmepriv->assoc_timer, jiffies +
+ msecs_to_jiffies(MAX_JOIN_TIMEOUT));
else {
struct wlan_bssid_ex *pdev_network =
&(adapter->registrypriv.dev_network);
set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
if (r8712_select_and_join_from_scan(pmlmepriv) ==
_SUCCESS)
- _set_timer(&pmlmepriv->assoc_timer,
- MAX_JOIN_TIMEOUT);
+ mod_timer(&pmlmepriv->assoc_timer, jiffies +
+ msecs_to_jiffies(MAX_JOIN_TIMEOUT));
else
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
}
padapter->ledpriv.LedControlHandler(padapter, LED_CTL_LINK);
r8712_os_indicate_connect(padapter);
if (padapter->registrypriv.power_mgnt > PS_MODE_ACTIVE)
- _set_timer(&pmlmepriv->dhcp_timer, 60000);
+ mod_timer(&pmlmepriv->dhcp_timer,
+ jiffies + msecs_to_jiffies(60000));
}
}
if (padapter->pwrctrlpriv.pwr_mode !=
padapter->registrypriv.power_mgnt) {
- _cancel_timer_ex(&pmlmepriv->dhcp_timer);
+ del_timer_sync(&pmlmepriv->dhcp_timer);
r8712_set_ps_mode(padapter, padapter->registrypriv.power_mgnt,
padapter->registrypriv.smart_ps);
}
void r8712_joinbss_event_callback(struct _adapter *adapter, u8 *pbuf)
{
unsigned long irqL = 0, irqL2;
- u8 timer_cancelled;
struct sta_info *ptarget_sta = NULL, *pcur_sta = NULL;
struct sta_priv *pstapriv = &adapter->stapriv;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
if (sizeof(struct list_head) == 4 * sizeof(u32)) {
pnetwork = kmalloc(sizeof(struct wlan_network), GFP_ATOMIC);
+ if (!pnetwork)
+ return;
memcpy((u8 *)pnetwork+16, (u8 *)pbuf + 8,
sizeof(struct wlan_network) - 16);
} else
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)
== true)
r8712_indicate_connect(adapter);
- _cancel_timer(&pmlmepriv->assoc_timer,
- &timer_cancelled);
+ del_timer_sync(&pmlmepriv->assoc_timer);
} else
goto ignore_joinbss_callback;
} else {
if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == true) {
- _set_timer(&pmlmepriv->assoc_timer, 1);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(1));
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
}
}
iEntry = SecIsInPMKIDList(adapter, pmlmepriv->assoc_bssid);
if (iEntry < 0)
return ielength;
- else {
- if (authmode == _WPA2_IE_ID_) {
- out_ie[ielength] = 1;
- ielength++;
- out_ie[ielength] = 0; /*PMKID count = 0x0100*/
- ielength++;
- memcpy(&out_ie[ielength],
- &psecuritypriv->PMKIDList[iEntry].PMKID, 16);
- ielength += 16;
- out_ie[13] += 18;/*PMKID length = 2+16*/
- }
+ if (authmode == _WPA2_IE_ID_) {
+ out_ie[ielength] = 1;
+ ielength++;
+ out_ie[ielength] = 0; /*PMKID count = 0x0100*/
+ ielength++;
+ memcpy(&out_ie[ielength],
+ &psecuritypriv->PMKIDList[iEntry].PMKID, 16);
+ ielength += 16;
+ out_ie[13] += 18;/*PMKID length = 2+16*/
}
return ielength;
}
u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D, tmpAGC;
TxAGCOffset_B = (ulTxAGCOffset&0x000000ff);
- TxAGCOffset_C = ((ulTxAGCOffset&0x0000ff00)>>8);
- TxAGCOffset_D = ((ulTxAGCOffset&0x00ff0000)>>16);
+ TxAGCOffset_C = (ulTxAGCOffset & 0x0000ff00)>>8;
+ TxAGCOffset_D = (ulTxAGCOffset & 0x00ff0000)>>16;
tmpAGC = (TxAGCOffset_D<<8 | TxAGCOffset_C<<4 | TxAGCOffset_B);
set_bb_reg(pAdapter, rFPGA0_TxGainStage,
(bXBTxAGC|bXCTxAGC|bXDTxAGC), tmpAGC);
if (pwrpriv->cpwm_tog == ((preportpwrstate->state) & 0x80))
return;
- _cancel_timer_ex(&padapter->pwrctrlpriv. rpwm_check_timer);
+ del_timer_sync(&padapter->pwrctrlpriv.rpwm_check_timer);
_enter_pwrlock(&pwrpriv->lock);
pwrpriv->cpwm = (preportpwrstate->state) & 0xf;
if (pwrpriv->cpwm >= PS_STATE_S2) {
}
}
-static void rpwm_check_handler (void *FunctionContext)
+static void rpwm_check_handler (unsigned long data)
{
- struct _adapter *adapter = (struct _adapter *)FunctionContext;
+ struct _adapter *adapter = (struct _adapter *)data;
_rpwm_check_handler(adapter);
}
r8712_write8(padapter, 0x1025FE58, 0);
INIT_WORK(&pwrctrlpriv->SetPSModeWorkItem, SetPSModeWorkItemCallback);
INIT_WORK(&pwrctrlpriv->rpwm_workitem, rpwm_workitem_callback);
- _init_timer(&(pwrctrlpriv->rpwm_check_timer),
- padapter->pnetdev, rpwm_check_handler, (u8 *)padapter);
+ setup_timer(&pwrctrlpriv->rpwm_check_timer, rpwm_check_handler,
+ (unsigned long)padapter);
}
/*
return _FAIL;
if (psta == NULL)
return _FAIL;
- else
- precv_frame->u.hdr.psta = psta;
+ precv_frame->u.hdr.psta = psta;
pattrib->amsdu = 0;
/* parsing QC field */
if (pattrib->qos == 1) {
u8 *p;
u32 crc;
- if (bcrc32initialized == 0)
+ if (!bcrc32initialized)
crc32_init();
crc = 0xffffffff; /* preload shift register, per CRC-32 spec */
for (p = buf; len > 0; ++p, --len)
uint frtype = GetFrameType(pframe);
uint frsubtype = GetFrameSubType(pframe);
- frsubtype = frsubtype >> 4;
+ frsubtype >>= 4;
memset((void *)mic_iv, 0, 16);
memset((void *)mic_header1, 0, 16);
memset((void *)mic_header2, 0, 16);
payload_remainder = plen % 16;
num_blocks = plen / 16;
/* Find start of payload */
- payload_index = (hdrlen + 8);
+ payload_index = hdrlen + 8;
/* Calculate MIC */
aes128k128d(key, mic_iv, aes_out);
bitwise_xor(aes_out, mic_header1, chain_buffer);
uint frtype = GetFrameType(pframe);
uint frsubtype = GetFrameSubType(pframe);
- frsubtype = frsubtype >> 4;
+ frsubtype >>= 4;
memset((void *)mic_iv, 0, 16);
memset((void *)mic_header1, 0, 16);
memset((void *)mic_header2, 0, 16);
payload_remainder = (plen - 8) % 16;
num_blocks = (plen - 8) / 16;
/* Find start of payload */
- payload_index = (hdrlen + 8);
+ payload_index = hdrlen + 8;
/* Calculate MIC */
aes128k128d(key, mic_iv, aes_out);
bitwise_xor(aes_out, mic_header1, chain_buffer);
return _SUCCESS;
}
-void r8712_use_tkipkey_handler(void *FunctionContext)
+void r8712_use_tkipkey_handler(unsigned long data)
{
- struct _adapter *padapter = (struct _adapter *)FunctionContext;
+ struct _adapter *padapter = (struct _adapter *)data;
padapter->securitypriv.busetkipkey = true;
}
u32 r8712_aes_decrypt(struct _adapter *padapter, u8 *precvframe);
u32 r8712_tkip_decrypt(struct _adapter *padapter, u8 *precvframe);
void r8712_wep_decrypt(struct _adapter *padapter, u8 *precvframe);
-void r8712_use_tkipkey_handler(void *FunctionContext);
+void r8712_use_tkipkey_handler(unsigned long data);
#endif /*__RTL871X_SECURITY_H_ */
* cancel reordering_ctrl_timer */
for (i = 0; i < 16; i++) {
preorder_ctrl = &psta->recvreorder_ctrl[i];
- _cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer);
+ del_timer_sync(&preorder_ctrl->reordering_ctrl_timer);
}
spin_lock(&(pfree_sta_queue->lock));
/* insert into free_sta_queue; 20061114 */
pattrib->ether_type = ntohs(etherhdr.h_proto);
{
- u8 bool;
/*If driver xmit ARP packet, driver can set ps mode to initial
* setting. It stands for getting DHCP or fix IP.*/
if (pattrib->ether_type == 0x0806) {
if (padapter->pwrctrlpriv.pwr_mode !=
padapter->registrypriv.power_mgnt) {
- _cancel_timer(&(pmlmepriv->dhcp_timer), &bool);
+ del_timer_sync(&pmlmepriv->dhcp_timer);
r8712_set_ps_mode(padapter, padapter->registrypriv.
power_mgnt, padapter->registrypriv.smart_ps);
}
#define GetPrivacy(pbuf) (((*(unsigned short *)(pbuf)) & \
le16_to_cpu(_PRIVACY_)) != 0)
-#define ClearPrivacy(pbuf) ({ \
- *(unsigned short *)(pbuf) &= (~cpu_to_le16(_PRIVACY_)); \
-})
-
-
#define GetOrder(pbuf) (((*(unsigned short *)(pbuf)) & \
le16_to_cpu(_ORDER_)) != 0)
#define SetFrameType(pbuf, type) \
do { \
- *(unsigned short *)(pbuf) &= __constant_cpu_to_le16(~(BIT(3) | \
+ *(unsigned short *)(pbuf) &= cpu_to_le16(~(BIT(3) | \
BIT(2))); \
- *(unsigned short *)(pbuf) |= __constant_cpu_to_le16(type); \
+ *(unsigned short *)(pbuf) |= cpu_to_le16(type); \
} while (0)
#define GetFrameSubType(pbuf) (cpu_to_le16(*(unsigned short *)(pbuf)) & \
#define GetFragNum(pbuf) (cpu_to_le16(*(unsigned short *)((addr_t)\
(pbuf) + 22)) & 0x0f)
-#define GetTupleCache(pbuf) (cpu_to_le16(*(unsigned short *)\
- ((addr_t)(pbuf) + 22)))
-
-#define SetFragNum(pbuf, num) ({ \
- *(unsigned short *)((addr_t)(pbuf) + 22) = \
- ((*(unsigned short *)((addr_t)(pbuf) + 22)) & \
- le16_to_cpu(~(0x000f))) | \
- cpu_to_le16(0x0f & (num)); \
-})
-
#define SetSeqNum(pbuf, num) ({ \
*(unsigned short *)((addr_t)(pbuf) + 22) = \
((*(unsigned short *)((addr_t)(pbuf) + 22)) & \
#define GetAMsdu(pbuf) (((le16_to_cpu(*(unsigned short *)pbuf)) >> 7) & 0x1)
-#define SetAMsdu(pbuf, amsdu) ({ \
- *(unsigned short *)(pbuf) |= cpu_to_le16((amsdu & 1) << 7); \
-})
-
#define GetAid(pbuf) (cpu_to_le16(*(unsigned short *)((addr_t)(pbuf) + 2)) \
& 0x3fff)
-#define GetTid(pbuf) (cpu_to_le16(*(unsigned short *)((addr_t)(pbuf) + \
- (((GetToDs(pbuf) << 1)|GetFrDs(pbuf)) == 3 ? \
- 30 : 24))) & 0x000f)
-
#define GetAddr1Ptr(pbuf) ((unsigned char *)((addr_t)(pbuf) + 4))
#define GetAddr2Ptr(pbuf) ((unsigned char *)((addr_t)(pbuf) + 10))
int r8712_xmit_entry(_pkt *pkt, struct net_device *pnetdev)
{
struct xmit_frame *pxmitframe = NULL;
- struct _adapter *padapter = (struct _adapter *)netdev_priv(pnetdev);
+ struct _adapter *padapter = netdev_priv(pnetdev);
struct xmit_priv *pxmitpriv = &(padapter->xmitpriv);
int ret = 0;
#include <wifi.h>
#include <rtl8723a_cmd.h>
#include <rtl8723a_hal.h>
+#include <asm/unaligned.h>
extern unsigned char WMM_OUI23A[];
extern unsigned char WPS_OUI23A[];
struct wlan_bssid_ex *pnetwork_mlmeext = &pmlmeinfo->network;
unsigned char *pie = pnetwork_mlmeext->IEs;
u8 *p, *dst_ie, *premainder_ie = NULL, *pbackup_remainder_ie = NULL;
- __le16 tim_bitmap_le;
uint offset, tmp_len, tim_ielen, tim_ie_offset, remainder_ielen;
- tim_bitmap_le = cpu_to_le16(pstapriv->tim_bitmap);
-
p = rtw_get_ie23a(pie, WLAN_EID_TIM, &tim_ielen,
pnetwork_mlmeext->IELength);
if (p != NULL && tim_ielen > 0) {
*dst_ie++ = 0;
if (tim_ielen == 4) {
- *dst_ie++ = *(u8 *)&tim_bitmap_le;
+ *dst_ie++ = pstapriv->tim_bitmap & 0xff;
} else if (tim_ielen == 5) {
- memcpy(dst_ie, &tim_bitmap_le, 2);
+ put_unaligned_le16(pstapriv->tim_bitmap, dst_ie);
dst_ie += 2;
}
list_del_init(&psta->asoc_list);
pstapriv->asoc_list_cnt--;
- DBG_8723A("asoc expire "MAC_FMT", state = 0x%x\n", MAC_ARG(psta->hwaddr), psta->state);
+ DBG_8723A("asoc expire %pM, state = 0x%x\n",
+ psta->hwaddr, psta->state);
updated = ap_free_sta23a(padapter, psta, false, WLAN_REASON_DEAUTH_LEAVING);
} else {
/* TODO: Aging mechanism to digest frames in sleep_q to avoid running out of xmitframe */
if (psta->sleepq_len > (NR_XMITFRAME/pstapriv->asoc_list_cnt)
&& padapter->xmitpriv.free_xmitframe_cnt < ((NR_XMITFRAME/pstapriv->asoc_list_cnt)/2)
) {
- DBG_8723A("%s sta:"MAC_FMT", sleepq_len:%u, free_xmitframe_cnt:%u, asoc_list_cnt:%u, clear sleep_q\n", __func__,
- MAC_ARG(psta->hwaddr),
+ DBG_8723A("%s sta:%pM, sleepq_len:%u, free_xmitframe_cnt:%u, asoc_list_cnt:%u, clear sleep_q\n",
+ __func__,
+ psta->hwaddr,
psta->sleepq_len,
padapter->xmitpriv.free_xmitframe_cnt,
pstapriv->asoc_list_cnt);
psta->keep_alive_trycnt++;
if (ret == _SUCCESS) {
- DBG_8723A("asoc check, sta(" MAC_FMT ") is alive\n", MAC_ARG(psta->hwaddr));
+ DBG_8723A("asoc check, sta(%pM) is alive\n",
+ psta->hwaddr);
psta->expire_to = pstapriv->expire_to;
psta->keep_alive_trycnt = 0;
continue;
psta->keep_alive_trycnt = 0;
- DBG_8723A("asoc expire "MAC_FMT", state = 0x%x\n", MAC_ARG(psta->hwaddr), psta->state);
+ DBG_8723A("asoc expire %pM, state = 0x%x\n",
+ psta->hwaddr, psta->state);
spin_lock_bh(&pstapriv->asoc_list_lock);
if (!list_empty(&psta->asoc_list)) {
list_del_init(&psta->asoc_list);
struct wlan_bssid_ex *pbss_network = &pmlmepriv->cur_network.network;
u8 *ie = pbss_network->IEs;
u8 *pbuf = mgmt->u.beacon.variable;
+
len -= offsetof(struct ieee80211_mgmt, u.beacon.variable);
/* SSID */
/* Supported rates */
struct wlan_acl_pool *pacl_list = &pstapriv->acl_list;
struct rtw_queue *pacl_node_q = &pacl_list->acl_node_q;
- DBG_8723A("%s(acl_num =%d) =" MAC_FMT "\n", __func__, pacl_list->num, MAC_ARG(addr));
+ DBG_8723A("%s(acl_num =%d) =%pM\n", __func__, pacl_list->num, addr);
if ((NUM_ACL-1) < pacl_list->num)
return -1;
if (psta->flags & WLAN_STA_HT) {
u16 ht_capab = le16_to_cpu(psta->htpriv.ht_cap.cap_info);
- DBG_8723A("HT: STA " MAC_FMT " HT Capabilities "
- "Info: 0x%04x\n", MAC_ARG(psta->hwaddr), ht_capab);
+ DBG_8723A("HT: STA %pM HT Capabilities Info: 0x%04x\n",
+ psta->hwaddr, ht_capab);
if (psta->no_ht_set) {
psta->no_ht_set = 0;
psta->no_ht_gf_set = 1;
pmlmepriv->num_sta_ht_no_gf++;
}
- DBG_8723A("%s STA " MAC_FMT " - no "
- "greenfield, num of non-gf stations %d\n",
- __func__, MAC_ARG(psta->hwaddr),
- pmlmepriv->num_sta_ht_no_gf);
+ DBG_8723A("%s STA %pM - no greenfield, num of non-gf stations %d\n",
+ __func__, psta->hwaddr,
+ pmlmepriv->num_sta_ht_no_gf);
}
if ((ht_capab & IEEE80211_HT_CAP_SUP_WIDTH_20_40) == 0) {
psta->ht_20mhz_set = 1;
pmlmepriv->num_sta_ht_20mhz++;
}
- DBG_8723A("%s STA " MAC_FMT " - 20 MHz HT, "
- "num of 20MHz HT STAs %d\n",
- __func__, MAC_ARG(psta->hwaddr),
- pmlmepriv->num_sta_ht_20mhz);
+ DBG_8723A("%s STA %pM - 20 MHz HT, num of 20MHz HT STAs %d\n",
+ __func__, psta->hwaddr,
+ pmlmepriv->num_sta_ht_20mhz);
}
} else {
pmlmepriv->num_sta_no_ht++;
}
if (pmlmepriv->htpriv.ht_option) {
- DBG_8723A("%s STA " MAC_FMT
- " - no HT, num of non-HT stations %d\n",
- __func__, MAC_ARG(psta->hwaddr),
- pmlmepriv->num_sta_no_ht);
+ DBG_8723A("%s STA %pM - no HT, num of non-HT stations %d\n",
+ __func__, psta->hwaddr,
+ pmlmepriv->num_sta_no_ht);
}
}
pcmd_callback = rtw_cmd_callback[pcmd->cmdcode].callback;
if (!pcmd_callback) {
RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_,
- ("mlme_cmd_hdl(): pcmd_callback = 0x%p, "
- "cmdcode = 0x%x\n",
- pcmd_callback, pcmd->cmdcode));
+ "mlme_cmd_hdl(): pcmd_callback = 0x%p, cmdcode = 0x%x\n",
+ pcmd_callback, pcmd->cmdcode);
rtw_free_cmd_obj23a(pcmd);
} else {
/* need consider that free cmd_obj in
}
} else {
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
- ("%s: cmdcode = 0x%x callback not defined!\n",
- __func__, pcmd->cmdcode));
+ "%s: cmdcode = 0x%x callback not defined!\n",
+ __func__, pcmd->cmdcode);
rtw_free_cmd_obj23a(pcmd);
}
}
rtw_free_network_queue23a(padapter);
RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_,
- ("%s: flush network queue\n", __func__));
+ "%s: flush network queue\n", __func__);
init_h2fwcmd_w_parm_no_rsp(ph2c, psurveyPara,
GEN_CMD_CODE(_SiteSurvey));
if (pmlmepriv->assoc_ssid.ssid_len == 0) {
RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_,
- (" createbss for Any SSid:%s\n",
- pmlmepriv->assoc_ssid.ssid));
+ "createbss for Any SSid:%s\n",
+ pmlmepriv->assoc_ssid.ssid);
} else {
RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_,
- (" createbss for SSid:%s\n",
- pmlmepriv->assoc_ssid.ssid));
+ "createbss for SSid:%s\n",
+ pmlmepriv->assoc_ssid.ssid);
}
pcmd = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (pmlmepriv->assoc_ssid.ssid_len == 0) {
RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_,
- ("+Join cmd: Any SSid\n"));
+ "+Join cmd: Any SSid\n");
} else {
RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_,
- ("+Join cmd: SSid =[%s]\n",
- pmlmepriv->assoc_ssid.ssid));
+ "+Join cmd: SSid =[%s]\n",
+ pmlmepriv->assoc_ssid.ssid);
}
pcmd = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!pcmd) {
res = _FAIL;
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
- ("rtw_joinbss_cmd23a: memory allocate for cmd_obj "
- "fail!!!\n"));
+ "rtw_joinbss_cmd23a: memory allocate for cmd_obj fail!!!\n");
goto exit;
}
res = _FAIL;
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
- ("rtw_joinbss_cmd23a :psecnetwork == NULL!!!\n"));
+ "rtw_joinbss_cmd23a :psecnetwork == NULL!!!\n");
goto exit;
}
int res = _SUCCESS;
RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_,
- ("+rtw_disassoc_cmd23a\n"));
+ "+rtw_disassoc_cmd23a\n");
/* prepare cmd parameter */
param = kzalloc(sizeof(*param), GFP_ATOMIC);
mod_timer(&pmlmepriv->scan_to_timer,
jiffies + msecs_to_jiffies(1));
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
- ("\n ********Error: MgntActrtw_set_802_11_bssid23a_"
- "LIST_SCAN Fail ************\n\n."));
+ "********Error: MgntActrtw_set_802_11_bssid23a_LIST_SCAN Fail ************\n");
}
/* free cmd */
set_fwstate(pmlmepriv, _FW_LINKED);
spin_unlock_bh(&pmlmepriv->lock);
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
- ("\n ***Error: disconnect_cmd_callback Fail ***\n."));
+ "***Error: disconnect_cmd_callback Fail ***\n");
return;
}
jiffies + msecs_to_jiffies(1));
} else if (pcmd->res != H2C_SUCCESS) {
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
- ("********Error:rtw_select_and_join_from_scanned_"
- "queue Wait Sema Fail ************\n"));
+ "********Error:rtw_select_and_join_from_scanned_queue Wait Sema Fail ************\n");
mod_timer(&pmlmepriv->assoc_timer,
jiffies + msecs_to_jiffies(1));
}
if (pcmd->res != H2C_SUCCESS) {
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
- ("\n ********Error: rtw_createbss_cmd23a_callback "
- "Fail ************\n\n."));
+ "********Error: rtw_createbss_cmd23a_callback Fail ************\n");
mod_timer(&pmlmepriv->assoc_timer,
jiffies + msecs_to_jiffies(1));
}
GFP_KERNEL);
if (!psta) {
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
- ("\nCan't alloc sta_info when "
- "createbss_cmd_callback\n"));
- goto createbss_cmd_fail ;
+ "Can't alloc sta_info when createbss_cmd_callback\n");
+ goto createbss_cmd_fail;
}
}
pwlan = rtw_get_oldest_wlan_network23a(&pmlmepriv->scanned_queue);
if (!pwlan) {
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
- ("\n Error: can't get pwlan in "
- "rtw23a_joinbss_event_cb\n"));
+ "Error: can't get pwlan in rtw23a_joinbss_event_cb\n");
spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
goto createbss_cmd_fail;
}
if (!psta) {
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
- ("\nERROR: rtw_setstaKey_cmdrsp_callback23a => "
- "can't get sta_info\n\n"));
+ "ERROR: rtw_setstaKey_cmdrsp_callback23a => can't get sta_info\n");
goto exit;
}
if (psta == NULL) {
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
- ("\nERROR: setassocsta_cmdrsp_callbac => can't "
- "get sta_info\n\n"));
+ "ERROR: setassocsta_cmdrsp_callbac => can't get sta_info\n");
goto exit;
}
}
data = rtl8723au_read8(Adapter, EFUSE_CTRL);
return data;
- }
- else
+ } else
return 0xFF;
}/* EFUSE_Read1Byte23a */
u32 k = 0;
u16 contentLen = 0;
- /* RT_TRACE(COMP_EFUSE, DBG_LOUD, ("Addr =%x Data =%x\n", Address, Value)); */
EFUSE_GetEfuseDefinition23a(Adapter, EFUSE_WIFI,
TYPE_EFUSE_REAL_CONTENT_LEN,
(void *)&contentLen);
u8 tmpidx = 0;
int bResult;
- /* RT_TRACE(COMP_EFUSE, DBG_LOUD, ("Addr = %x Data =%x\n", addr, data)); */
-
/* return 0; */
/* -----------------e-fuse reg ctrl --------------------------------- */
left -= WPA_SELECTOR_LEN;
} else if (left > 0) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("%s: ie length mismatch, %u too much",
- __func__, left));
+ "%s: ie length mismatch, %u too much\n",
+ __func__, left);
return _FAIL;
}
if (count == 0 || left < count * WPA_SELECTOR_LEN) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("%s: ie count botch (pairwise), "
- "count %u left %u", __func__,
- count, left));
+ "%s: ie count botch (pairwise), count %u left %u\n",
+ __func__, count, left);
return _FAIL;
}
}
} else if (left == 1) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("%s: ie too short (for key mgmt)", __func__));
+ "%s: ie too short (for key mgmt)\n", __func__);
return _FAIL;
}
pos += 2;
if (!memcmp(pos, RTW_WPA_OUI23A_TYPE, 4)) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("%s : there has 802.1x auth\n",
- __func__));
+ "%s : there has 802.1x auth\n",
+ __func__);
*is_8021x = 1;
}
}
left -= RSN_SELECTOR_LEN;
} else if (left > 0) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("%s: ie length mismatch, %u too much",
- __func__, left));
+ "%s: ie length mismatch, %u too much\n",
+ __func__, left);
return _FAIL;
}
if (count == 0 || left < count * RSN_SELECTOR_LEN) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("%s: ie count botch (pairwise), "
- "count %u left %u",
- __func__, count, left));
+ "%s: ie count botch (pairwise), count %u left %u\n",
+ __func__, count, left);
return _FAIL;
}
}
} else if (left == 1) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("%s: ie too short (for key mgmt)", __func__));
+ "%s: ie too short (for key mgmt)\n", __func__);
return _FAIL;
}
pos += 2;
if (!memcmp(pos, SUITE_1X, 4)) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("%s (): there has 802.1x auth\n",
- __func__));
+ "%s (): there has 802.1x auth\n",
+ __func__);
*is_8021x = 1;
}
}
if (pbuf && pbuf[1] > 0) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("rtw_get_cipher_info: wpa_ielen: %d", pbuf[1]));
+ "rtw_get_cipher_info: wpa_ielen: %d\n", pbuf[1]);
r = rtw_parse_wpa_ie23a(pbuf, pbuf[1] + 2, &group_cipher,
&pairwise_cipher, &is8021x);
if (r == _SUCCESS) {
pnetwork->BcnInfo.group_cipher = group_cipher;
pnetwork->BcnInfo.is_8021x = is8021x;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("%s: pnetwork->pairwise_cipher: %d, is_"
- "8021x is %d", __func__,
- pnetwork->BcnInfo.pairwise_cipher,
- pnetwork->BcnInfo.is_8021x));
+ "%s: pnetwork->pairwise_cipher: %d, is_8021x is %d\n",
+ __func__, pnetwork->BcnInfo.pairwise_cipher,
+ pnetwork->BcnInfo.is_8021x);
ret = _SUCCESS;
}
} else {
if (pbuf && pbuf[1] > 0) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("get RSN IE\n"));
+ "get RSN IE\n");
r = rtw_parse_wpa2_ie23a(pbuf, pbuf[1] + 2,
&group_cipher, &pairwise_cipher,
&is8021x);
if (r == _SUCCESS) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("get RSN IE OK!!!\n"));
+ "get RSN IE OK!!!\n");
pnetwork->BcnInfo.pairwise_cipher =
pairwise_cipher;
pnetwork->BcnInfo.group_cipher = group_cipher;
pnetwork->BcnInfo.is_8021x = is8021x;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("%s: pnetwork->pairwise_cipher: %d,"
- "pnetwork->group_cipher is %d, "
- "is_8021x is %d", __func__,
- pnetwork->BcnInfo.pairwise_cipher,
- pnetwork->BcnInfo.group_cipher,
- pnetwork->BcnInfo.is_8021x));
+ "%s: pnetwork->pairwise_cipher: %d,pnetwork->group_cipher is %d, is_8021x is %d\n",
+ __func__,
+ pnetwork->BcnInfo.pairwise_cipher,
+ pnetwork->BcnInfo.group_cipher,
+ pnetwork->BcnInfo.is_8021x);
ret = _SUCCESS;
}
}
pnetwork->BcnInfo.encryp_protocol = ENCRYP_PROTOCOL_OPENSYS;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("%s: ssid =%s\n", __func__, pnetwork->network.Ssid.ssid));
+ "%s: ssid =%s\n", __func__, pnetwork->network.Ssid.ssid);
pie = pnetwork->network.IEs;
pie_len = pnetwork->network.IELength;
pnetwork->BcnInfo.encryp_protocol = ENCRYP_PROTOCOL_WEP;
}
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("%s: pnetwork->encryp_protocol is %x\n", __func__,
- pnetwork->BcnInfo.encryp_protocol));
+ "%s: pnetwork->encryp_protocol is %x\n", __func__,
+ pnetwork->BcnInfo.encryp_protocol);
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("%s: pnetwork->encryp_protocol is %x\n", __func__,
- pnetwork->BcnInfo.encryp_protocol));
+ "%s: pnetwork->encryp_protocol is %x\n", __func__,
+ pnetwork->BcnInfo.encryp_protocol);
rtw_get_cipher_info(pnetwork);
/* get bwmode and ch_offset */
void rtw_free_mlme_priv23a(struct mlme_priv *pmlmepriv)
{
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("rtw_free_mlme_priv23a\n"));
+ "rtw_free_mlme_priv23a\n");
rtw23a_free_mlme_priv_ie_data(pmlmepriv);
}
if (padapter->bDriverStopped || padapter->bSurpriseRemoved ||
!check_fwstate(&padapter->mlmepriv, _FW_LINKED)) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("rtw_if_up23a:bDriverStopped(%d) OR "
- "bSurpriseRemoved(%d)", padapter->bDriverStopped,
- padapter->bSurpriseRemoved));
+ "rtw_if_up23a:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n",
+ padapter->bDriverStopped, padapter->bSurpriseRemoved);
res = false;
} else
res = true;
pnetwork = &pmlmepriv->cur_network;
if (padapter->mlmepriv.to_roaming > 0) {
- DBG_8723A("roaming from %s("MAC_FMT"), length:%d\n",
+ DBG_8723A("roaming from %s(%pM), length:%d\n",
pnetwork->network.Ssid.ssid,
- MAC_ARG(pnetwork->network.MacAddress),
+ pnetwork->network.MacAddress,
pnetwork->network.Ssid.ssid_len);
memcpy(&pmlmepriv->assoc_ssid, &pnetwork->network.Ssid,
sizeof(struct cfg80211_ssid));
if (!pnetwork) {
if (!oldest) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("\n\n\nsomething wrong here\n\n\n"));
+ "something wrong here\n");
goto exit;
}
pnetwork = oldest;
return bselected;
}
-/* TODO: Perry : For Power Management */
-void rtw_atimdone_event_callback23a(struct rtw_adapter *adapter, const u8 *pbuf)
-{
- RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("receive atimdone_evet\n"));
-}
-
void rtw_survey_event_cb23a(struct rtw_adapter *adapter, const u8 *pbuf)
{
u32 len;
pnetwork = survey->bss;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("rtw_survey_event_cb23a, ssid=%s\n", pnetwork->Ssid.ssid));
+ "rtw_survey_event_cb23a, ssid=%s\n", pnetwork->Ssid.ssid);
len = get_wlan_bssid_ex_sz(pnetwork);
if (len > (sizeof(struct wlan_bssid_ex))) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("\n ****rtw_survey_event_cb23a: return a wrong "
- "bss ***\n"));
+ "****rtw_survey_event_cb23a: return a wrong bss ***\n");
return;
}
/* update IBSS_network 's timestamp */
if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) {
- /* RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- "rtw_survey_event_cb23a : WIFI_ADHOC_MASTER_STATE\n\n"); */
if (ether_addr_equal(pmlmepriv->cur_network.network.MacAddress,
pnetwork->MacAddress)) {
struct wlan_network *ibss_wlan;
}
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("rtw_surveydone_event_callback23a: fw_state:%x\n\n",
- get_fwstate(pmlmepriv)));
+ "rtw_surveydone_event_callback23a: fw_state:%x\n",
+ get_fwstate(pmlmepriv));
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) {
del_timer_sync(&pmlmepriv->scan_to_timer);
_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY);
} else {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("nic status =%x, survey done event comes too late!\n",
- get_fwstate(pmlmepriv)));
+ "nic status =%x, survey done event comes too late!\n",
+ get_fwstate(pmlmepriv));
}
rtw_set_signal_stat_timer(&adapter->recvpriv);
struct rtw_queue *scan_queue = &pmlmepriv->scanned_queue;
struct list_head *plist, *phead, *ptemp;
- RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+free_scanqueue\n"));
+ RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, "+free_scanqueue\n");
spin_lock_bh(&scan_queue->lock);
phead = get_list_head(scan_queue);
struct sta_info *psta;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_,
- ("+rtw_free_assoc_resources23a\n"));
+ "+rtw_free_assoc_resources23a\n");
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("tgt_network->network.MacAddress="MAC_FMT" ssid=%s\n",
- MAC_ARG(tgt_network->network.MacAddress),
- tgt_network->network.Ssid.ssid));
+ "tgt_network->network.MacAddress=%pM ssid=%s\n",
+ tgt_network->network.MacAddress,
+ tgt_network->network.Ssid.ssid);
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_AP_STATE)) {
psta = rtw_get_stainfo23a(&adapter->stapriv,
pwlan->fixed = false;
else
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("rtw_free_assoc_resources23a : pwlan== NULL\n"));
+ "rtw_free_assoc_resources23a : pwlan== NULL\n");
if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) &&
adapter->stapriv.asoc_sta_count == 1)
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("+rtw_indicate_connect23a\n"));
+ "+rtw_indicate_connect23a\n");
pmlmepriv->to_join = false;
rtw_set_scan_deny(padapter, 3000);
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("-rtw_indicate_connect23a: fw_state=0x%08x\n",
- get_fwstate(pmlmepriv)));
+ "-rtw_indicate_connect23a: fw_state=0x%08x\n",
+ get_fwstate(pmlmepriv));
}
/*
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("+rtw_indicate_disconnect23a\n"));
+ "+rtw_indicate_disconnect23a\n");
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING|WIFI_UNDER_WPS);
DBG_8723A("%s\n", __func__);
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("\nfw_state:%x, BSSID:"MAC_FMT"\n", get_fwstate(pmlmepriv),
- MAC_ARG(pnetwork->network.MacAddress)));
+ "fw_state:%x, BSSID:%pM\n",
+ get_fwstate(pmlmepriv),
+ pnetwork->network.MacAddress);
/* why not use ptarget_wlan?? */
memcpy(&cur_network->network, &pnetwork->network,
default:
pmlmepriv->fw_state = WIFI_NULL_STATE;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("Invalid network_mode\n"));
+ "Invalid network_mode\n");
break;
}
bool the_same_macaddr;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("joinbss event call back received with res=%d\n",
- pnetwork->join_res));
+ "joinbss event call back received with res=%d\n",
+ pnetwork->join_res);
if (pmlmepriv->assoc_ssid.ssid_len == 0) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("@@@@@ joinbss event call back for Any SSid\n"));
+ "@@@@@ joinbss event call back for Any SSid\n");
} else {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("@@@@@ rtw23a_joinbss_event_cb for SSid:%s\n",
- pmlmepriv->assoc_ssid.ssid));
+ "@@@@@ rtw23a_joinbss_event_cb for SSid:%s\n",
+ pmlmepriv->assoc_ssid.ssid);
}
if (ether_addr_equal(pnetwork->network.MacAddress,
pnetwork->network.Length = get_wlan_bssid_ex_sz(&pnetwork->network);
if (pnetwork->network.Length > sizeof(struct wlan_bssid_ex)) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("\n\n ***joinbss_evt_callback return a wrong bss "
- "***\n\n"));
+ "***joinbss_evt_callback return a wrong bss ***\n");
return;
}
spin_lock_bh(&pmlmepriv->lock);
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("\n rtw23a_joinbss_event_cb !! _enter_critical\n"));
+ "rtw23a_joinbss_event_cb !! _enter_critical\n");
if (pnetwork->join_res > 0) {
spin_lock_bh(&pmlmepriv->scanned_queue.lock);
pnetwork);
else {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("Can't find ptarget_wlan when "
- "joinbss_event callback\n"));
+ "Can't find ptarget_wlan when joinbss_event callback\n");
spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
goto ignore_joinbss_callback;
}
if (!ptarget_sta) {
RT_TRACE(_module_rtl871x_mlme_c_,
_drv_err_,
- ("Can't update stainfo when "
- "joinbss_event callback\n"));
+ "Can't update stainfo when joinbss_event callback\n");
spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
goto ignore_joinbss_callback;
}
/* adhoc mode will rtw_indicate_connect23a
when rtw_stassoc_event_callback23a */
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("adhoc mode, fw_state:%x",
- get_fwstate(pmlmepriv)));
+ "adhoc mode, fw_state:%x\n",
+ get_fwstate(pmlmepriv));
}
/* s5. Cancle assoc_timer */
del_timer_sync(&pmlmepriv->assoc_timer);
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("Cancle assoc_timer\n"));
+ "Cancle assoc_timer\n");
} else {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("rtw23a_joinbss_event_cb err: fw_state:%x",
- get_fwstate(pmlmepriv)));
+ "rtw23a_joinbss_event_cb err: fw_state:%x\n",
+ get_fwstate(pmlmepriv));
spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
goto ignore_joinbss_callback;
}
if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("fail! clear _FW_UNDER_LINKING ^^^fw_state="
- "%x\n", get_fwstate(pmlmepriv)));
+ "fail! clear _FW_UNDER_LINKING ^^^fw_state=%x\n",
+ get_fwstate(pmlmepriv));
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
}
} else {
if (psta != NULL) {
/* the sta have been in sta_info_queue => do nothing */
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("Error: rtw_stassoc_event_callback23a: sta has "
- "been in sta_hash_queue\n"));
+ "Error: rtw_stassoc_event_callback23a: sta has been in sta_hash_queue\n");
/* between drv has received this event before and
fw have not yet to set key to CAM_ENTRY) */
return;
GFP_KERNEL);
if (!psta) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("Can't alloc sta_info when "
- "rtw_stassoc_event_callback23a\n"));
+ "Can't alloc sta_info when rtw_stassoc_event_callback23a\n");
return;
}
else
mac_id = pstadel->mac_id;
- DBG_8723A("%s(mac_id=%d)=" MAC_FMT "\n", __func__, mac_id,
- MAC_ARG(pstadel->macaddr));
+ DBG_8723A("%s(mac_id=%d)=%pM\n", __func__, mac_id, pstadel->macaddr);
if (check_fwstate(pmlmepriv, WIFI_AP_STATE))
return;
}
if (updated) {
- DBG_8723A("[by_bssid:%u][assoc_ssid:%s][to_roaming:%u] "
- "new candidate: %s("MAC_FMT") rssi:%d\n",
+ DBG_8723A("[by_bssid:%u][assoc_ssid:%s][to_roaming:%u] new candidate: %s(%pM) rssi:%d\n",
pmlmepriv->assoc_by_bssid,
pmlmepriv->assoc_ssid.ssid,
adapter->mlmepriv.to_roaming,
(*candidate)->network.Ssid.ssid,
- MAC_ARG((*candidate)->network.MacAddress),
+ (*candidate)->network.MacAddress,
(int)(*candidate)->network.Rssi);
}
pnetwork = container_of(plist, struct wlan_network, list);
if (!pnetwork) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("%s: return _FAIL:(pnetwork == NULL)\n",
- __func__));
+ "%s: return _FAIL:(pnetwork == NULL)\n",
+ __func__);
goto exit;
}
_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY);
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("switching to adhoc master\n"));
+ "switching to adhoc master\n");
memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid,
sizeof(struct cfg80211_ssid));
ret = rtw_createbss_cmd23a(adapter);
if (ret != _SUCCESS) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("Error =>rtw_createbss_cmd23a status FAIL\n"));
+ "Error =>rtw_createbss_cmd23a status FAIL\n");
} else {
pmlmepriv->to_join = false;
}
ret = _FAIL;
goto exit;
} else {
- DBG_8723A("%s: candidate: %s("MAC_FMT", ch:%u)\n", __func__,
+ DBG_8723A("%s: candidate: %s(%pM, ch:%u)\n",
+ __func__,
candidate->network.Ssid.ssid,
- MAC_ARG(candidate->network.MacAddress),
+ candidate->network.MacAddress,
candidate->network.DSConfig);
}
pcmd->rspsz = 0;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("after enqueue set_auth_cmd, auth_mode=%x\n",
- psecuritypriv->dot11AuthAlgrthm));
+ "after enqueue set_auth_cmd, auth_mode=%x\n",
+ psecuritypriv->dot11AuthAlgrthm);
res = rtw_enqueue_cmd23a(pcmdpriv, pcmd);
psetkeyparm->algorithm = (unsigned char)
psecuritypriv->dot118021XGrpPrivacy;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("\n rtw_set_key23a: psetkeyparm->algorithm = "
- "(unsigned char)psecuritypriv->dot118021XGrpPrivacy "
- "=%d\n", psetkeyparm->algorithm));
+ "rtw_set_key23a: psetkeyparm->algorithm = (unsigned char)psecuritypriv->dot118021XGrpPrivacy =%d\n",
+ psetkeyparm->algorithm);
} else {
psetkeyparm->algorithm = (u8)psecuritypriv->dot11PrivacyAlgrthm;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("\n rtw_set_key23a: psetkeyparm->algorithm = (u8)"
- "psecuritypriv->dot11PrivacyAlgrthm =%d\n",
- psetkeyparm->algorithm));
+ "rtw_set_key23a: psetkeyparm->algorithm = (u8)psecuritypriv->dot11PrivacyAlgrthm =%d\n",
+ psetkeyparm->algorithm);
}
psetkeyparm->keyid = keyid;/* 0~3 */
psetkeyparm->set_tx = set_tx;
psetkeyparm->algorithm, psetkeyparm->keyid,
pmlmepriv->key_mask);
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("\n rtw_set_key23a: psetkeyparm->algorithm =%d psetkeyparm->"
- "keyid = (u8)keyid =%d\n", psetkeyparm->algorithm, keyid));
+ "rtw_set_key23a: psetkeyparm->algorithm =%d psetkeyparm->keyid = (u8)keyid =%d\n",
+ psetkeyparm->algorithm, keyid);
switch (psetkeyparm->algorithm) {
case WLAN_CIPHER_SUITE_WEP40:
break;
default:
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("\n rtw_set_key23a:psecuritypriv->dot11PrivacyAlgrthm"
- " = %x (must be 1 or 2 or 4 or 5)\n",
- psecuritypriv->dot11PrivacyAlgrthm));
+ "rtw_set_key23a:psecuritypriv->dot11PrivacyAlgrthm = %x (must be 1 or 2 or 4 or 5)\n",
+ psecuritypriv->dot11PrivacyAlgrthm);
res = _FAIL;
kfree(pcmd);
kfree(psetkeyparm);
uint ndissecuritytype = psecuritypriv->ndisencryptstatus;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_,
- ("+rtw_restruct_sec_ie23a: ndisauthmode=%d "
- "ndissecuritytype=%d\n", ndisauthmode, ndissecuritytype));
+ "+rtw_restruct_sec_ie23a: ndisauthmode=%d ndissecuritytype=%d\n",
+ ndisauthmode, ndissecuritytype);
ielength = 0;
if (ndisauthmode == Ndis802_11AuthModeWPA ||
pdev_network->DSConfig = pregistrypriv->channel;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("pregistrypriv->channel =%d, pdev_network->DSConfig = 0x%x\n",
- pregistrypriv->channel, pdev_network->DSConfig));
+ "pregistrypriv->channel =%d, pdev_network->DSConfig = 0x%x\n",
+ pregistrypriv->channel, pdev_network->DSConfig);
if (cur_network->network.ifmode == NL80211_IFTYPE_ADHOC)
pdev_network->ATIMWindow = 0;
if (index > 13) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("Currently we do not support reserved sub-fr-type ="
- "%d\n", index));
+ "Currently we do not support reserved sub-fr-type =%d\n",
+ index);
return;
}
ptable += index;
pstat = rtw_get_stainfo23a(pstapriv, sa);
if (!pstat) {
/* allocate a new one */
- DBG_8723A("going to alloc stainfo for sa ="MAC_FMT"\n",
- MAC_ARG(sa));
+ DBG_8723A("going to alloc stainfo for sa =%pM\n", sa);
pstat = rtw_alloc_stainfo23a(pstapriv, sa, GFP_ATOMIC);
if (!pstat) {
DBG_8723A(" Exceed the upper limit of supported "
/* now parse all ieee802_11 ie to point to elems */
if (rtw_validate_frame_ies(pos, left)) {
- DBG_8723A("STA " MAC_FMT " sent invalid association request\n",
- MAC_ARG(pstat->hwaddr));
+ DBG_8723A("STA %pM sent invalid association request\n",
+ pstat->hwaddr);
status = WLAN_STATUS_UNSPECIFIED_FAILURE;
goto OnAssocReq23aFail;
}
p = cfg80211_find_ie(WLAN_EID_SSID, pos, left);
if (!p || p[1] == 0) {
/* broadcast ssid, however it is not allowed in assocreq */
- DBG_8723A("STA " MAC_FMT " sent invalid association request "
- "lacking an SSID\n", MAC_ARG(pstat->hwaddr));
+ DBG_8723A("STA %pM sent invalid association request lacking an SSID\n",
+ pstat->hwaddr);
status = WLAN_STATUS_UNSPECIFIED_FAILURE;
goto OnAssocReq23aFail;
} else {
int copy_len;
if (psecuritypriv->wpa_psk == 0) {
- DBG_8723A("STA " MAC_FMT ": WPA/RSN IE in association "
- "request, but AP don't support WPA/RSN\n",
- MAC_ARG(pstat->hwaddr));
+ DBG_8723A("STA %pM: WPA/RSN IE in association request, but AP don't support WPA/RSN\n",
+ pstat->hwaddr);
status = WLAN_STATUS_INVALID_IE;
else
pstat->uapsd_be = 0;
+ break;
}
- break;
} else {
break;
}
if (pstat->flags & WLAN_STA_HT &&
(pstat->wpa2_pairwise_cipher & WPA_CIPHER_TKIP ||
pstat->wpa_pairwise_cipher & WPA_CIPHER_TKIP)) {
- DBG_8723A("HT: " MAC_FMT " tried to use TKIP with HT "
- "association\n", MAC_ARG(pstat->hwaddr));
+ DBG_8723A("HT: %pM tried to use TKIP with HT association\n",
+ pstat->hwaddr);
/* status = WLAN_STATUS_CIPHER_REJECTED_PER_POLICY; */
/* goto OnAssocReq23aFail; */
u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_,
- ("+%s\n", __func__));
+ "+%s\n", __func__);
pmgntframe = alloc_mgtxmitframe23a(pxmitpriv);
if (!pmgntframe)
pattrib->last_txcmdsz = pattrib->pktlen;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_,
- ("issuing probe_req, tx_len =%d\n", pattrib->last_txcmdsz));
+ "issuing probe_req, tx_len =%d\n", pattrib->last_txcmdsz);
if (wait_ack) {
ret = dump_mgntframe23a_and_wait_ack23a(padapter, pmgntframe);
if (try_cnt && wait_ms) {
if (da)
- DBG_8723A("%s(%s): to "MAC_FMT", ch:%u%s, %d/%d "
- "in %u ms\n", __func__,
- padapter->pnetdev->name,
- MAC_ARG(da), rtw_get_oper_ch23a(padapter),
- ret == _SUCCESS?", acked":"", i, try_cnt,
+ DBG_8723A("%s(%s): to %pM, ch:%u%s, %d/%d in %u ms\n",
+ __func__, padapter->pnetdev->name,
+ da, rtw_get_oper_ch23a(padapter),
+ ret == _SUCCESS ? ", acked" : "", i, try_cnt,
jiffies_to_msecs(jiffies - start));
else
DBG_8723A("%s(%s):, ch:%u%s, %d/%d in %u ms\n",
__func__, padapter->pnetdev->name,
rtw_get_oper_ch23a(padapter),
- ret == _SUCCESS?", acked":"", i, try_cnt,
+ ret == _SUCCESS ? ", acked" : "", i, try_cnt,
jiffies_to_msecs(jiffies - start));
}
exit:
if (try_cnt && wait_ms) {
if (da)
- DBG_8723A("%s(%s): to "MAC_FMT", ch:%u%s, %d/%d "
- "in %u ms\n", __func__,
- padapter->pnetdev->name,
- MAC_ARG(da), rtw_get_oper_ch23a(padapter),
- ret == _SUCCESS?", acked":"", i, try_cnt,
+ DBG_8723A("%s(%s): to %pM, ch:%u%s, %d/%d in %u ms\n",
+ __func__, padapter->pnetdev->name,
+ da, rtw_get_oper_ch23a(padapter),
+ ret == _SUCCESS ? ", acked" : "", i, try_cnt,
jiffies_to_msecs(jiffies - start));
else
DBG_8723A("%s(%s):, ch:%u%s, %d/%d in %u ms\n",
__func__, padapter->pnetdev->name,
rtw_get_oper_ch23a(padapter),
- ret == _SUCCESS?", acked":"", i, try_cnt,
+ ret == _SUCCESS ? ", acked" : "", i, try_cnt,
jiffies_to_msecs(jiffies - start));
}
exit:
if (try_cnt && wait_ms) {
if (da)
- DBG_8723A("%s(%s): to "MAC_FMT", ch:%u%s, %d/%d "
- "in %u ms\n", __func__,
- padapter->pnetdev->name,
- MAC_ARG(da), rtw_get_oper_ch23a(padapter),
- ret == _SUCCESS?", acked":"", i, try_cnt,
+ DBG_8723A("%s(%s): to %pM, ch:%u%s, %d/%d in %u ms\n",
+ __func__, padapter->pnetdev->name,
+ da, rtw_get_oper_ch23a(padapter),
+ ret == _SUCCESS ? ", acked" : "", i, try_cnt,
jiffies_to_msecs(jiffies - start));
else
DBG_8723A("%s(%s):, ch:%u%s, %d/%d in %u ms\n",
__func__, padapter->pnetdev->name,
rtw_get_oper_ch23a(padapter),
- ret == _SUCCESS?", acked":"", i, try_cnt,
+ ret == _SUCCESS ? ", acked" : "", i, try_cnt,
jiffies_to_msecs(jiffies - start));
}
exit:
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
int ret = _FAIL;
- /* DBG_8723A("%s to "MAC_FMT"\n", __func__, MAC_ARG(da)); */
+ /* DBG_8723A("%s to %pM\n", __func__, da); */
pmgntframe = alloc_mgtxmitframe23a(pxmitpriv);
if (!pmgntframe)
int issue_deauth23a(struct rtw_adapter *padapter, unsigned char *da,
unsigned short reason)
{
- DBG_8723A("%s to "MAC_FMT"\n", __func__, MAC_ARG(da));
+ DBG_8723A("%s to %pM\n", __func__, da);
return _issue_deauth(padapter, da, reason, false);
}
if (try_cnt && wait_ms) {
if (da)
- DBG_8723A("%s(%s): to "MAC_FMT", ch:%u%s, %d/%d "
- "in %u ms\n", __func__,
- padapter->pnetdev->name,
- MAC_ARG(da), rtw_get_oper_ch23a(padapter),
- ret == _SUCCESS?", acked":"", i, try_cnt,
+ DBG_8723A("%s(%s): to %pM, ch:%u%s, %d/%d in %u ms\n",
+ __func__, padapter->pnetdev->name,
+ da, rtw_get_oper_ch23a(padapter),
+ ret == _SUCCESS ? ", acked" : "", i, try_cnt,
jiffies_to_msecs(jiffies - start));
else
DBG_8723A("%s(%s):, ch:%u%s, %d/%d in %u ms\n",
__func__, padapter->pnetdev->name,
rtw_get_oper_ch23a(padapter),
- ret == _SUCCESS?", acked":"", i, try_cnt,
+ ret == _SUCCESS ? ", acked" : "", i, try_cnt,
jiffies_to_msecs(jiffies - start));
}
exit:
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
- DBG_8723A("%s(%s): ra ="MAC_FMT", ch:%u, offset:%u\n", __func__,
- padapter->pnetdev->name, MAC_ARG(ra), new_ch, ch_offset);
+ DBG_8723A("%s(%s): ra=%pM, ch:%u, offset:%u\n",
+ __func__, padapter->pnetdev->name, ra, new_ch, ch_offset);
pmgntframe = alloc_mgtxmitframe23a(pxmitpriv);
if (!pmgntframe)
{
u16 start_seq;
u16 BA_para_set;
- u16 BA_timeout_value;
u16 BA_starting_seqctrl;
u16 BA_para;
int max_rx_ampdu_factor;
IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK;
} else {
/* immediate ack & 64 buffer size */
- BA_para_set = (0x1002 | ((status & 0xf) << 2));
+ BA_para_set = 0x1002 | ((status & 0xf) << 2);
}
put_unaligned_le16(BA_para_set,
&mgmt->u.action.u.addba_req.capab);
- BA_timeout_value = 5000;/* 5ms */
- BA_timeout_value = cpu_to_le16(BA_timeout_value);
- put_unaligned_le16(BA_timeout_value,
- &mgmt->u.action.u.addba_req.timeout);
+ /* 5ms */
+ put_unaligned_le16(5000, &mgmt->u.action.u.addba_req.timeout);
psta = rtw_get_stainfo23a(pstapriv, raddr);
if (psta) {
/* issue beacon */
if (send_beacon23a(padapter) == _FAIL) {
- RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("issuing beacon frame fail....\n"));
+ RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
+ "issuing beacon frame fail....\n");
report_join_res23a(padapter, -1);
pmlmeinfo->state = MSR_NOLINK;
p += 3;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_,
- ("%s: 802.11d country =%s\n", __func__, country));
+ "%s: 802.11d country =%s\n", __func__, country);
i = 0;
while ((ie - p) >= 3) {
chplan_new[i].ScanType = SCAN_ACTIVE;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_,
- ("%s: change channel %d scan type "
- "from passive to active\n",
- __func__, channel));
+ "%s: change channel %d scan type from passive to active\n",
+ __func__, channel);
}
break;
}
if (!pcmd_obj)
return;
- cmdsz = (sizeof(struct survey_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct survey_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_ATOMIC);
if (!pevtcmd) {
kfree(pcmd_obj);
if (!pcmd_obj)
return;
- cmdsz = (sizeof(struct surveydone_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct surveydone_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_ATOMIC);
if (!pevtcmd) {
kfree(pcmd_obj);
if (!pcmd_obj)
return;
- cmdsz = (sizeof(struct joinbss_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct joinbss_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_ATOMIC);
if (!pevtcmd) {
kfree(pcmd_obj);
if (!pcmd_obj)
return;
- cmdsz = (sizeof(struct stadel_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct stadel_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_ATOMIC);
if (!pevtcmd) {
kfree(pcmd_obj);
if (psta)
mac_id = (int)psta->mac_id;
else
- mac_id = (-1);
+ mac_id = -1;
pdel_sta_evt->mac_id = mac_id;
if (!pcmd_obj)
return;
- cmdsz = (sizeof(struct stassoc_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct stassoc_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_ATOMIC);
if (!pevtcmd) {
kfree(pcmd_obj);
/* 0~3 for default key, cmd_id = macid + 3,
macid = aid+1; */
- cam_id = (psta->mac_id + 3);
+ cam_id = psta->mac_id + 3;
DBG_8723A("Write CAM, mac_addr =%x:%x:%x:%x:%x:%x, "
"cam_entry =%d\n", pparm->addr[0],
/* checking if event code is valid */
if (evt_code >= MAX_C2HEVT) {
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
- ("\nEvent Code(%d) mismatch!\n", evt_code));
+ "Event Code(%d) mismatch!\n", evt_code);
goto _abort_event_;
}
if (wlanevents[evt_code].parmsize != 0 &&
wlanevents[evt_code].parmsize != evt_sz) {
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
- ("\nEvent(%d) Parm Size mismatch (%d vs %d)!\n",
- evt_code, wlanevents[evt_code].parmsize, evt_sz));
+ "Event(%d) Parm Size mismatch (%d vs %d)!\n",
+ evt_code, wlanevents[evt_code].parmsize, evt_sz);
goto _abort_event_;
}
if (pwrpriv->rpwm == pslv) {
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
- ("%s: Already set rpwm[0x%02X], new = 0x%02X!\n",
- __func__, pwrpriv->rpwm, pslv));
+ "%s: Already set rpwm[0x%02X], new = 0x%02X!\n",
+ __func__, pwrpriv->rpwm, pslv);
return;
}
if (padapter->bSurpriseRemoved == true ||
padapter->hw_init_completed == false) {
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
- ("%s: SurpriseRemoved(%d) hw_init_completed(%d)\n",
- __func__, padapter->bSurpriseRemoved,
- padapter->hw_init_completed));
+ "%s: SurpriseRemoved(%d) hw_init_completed(%d)\n",
+ __func__, padapter->bSurpriseRemoved,
+ padapter->hw_init_completed);
pwrpriv->cpwm = PS_STATE_S4;
if (padapter->bDriverStopped == true) {
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
- ("%s: change power state(0x%02X) when DriverStopped\n",
- __func__, pslv));
+ "%s: change power state(0x%02X) when DriverStopped\n",
+ __func__, pslv);
if (pslv < PS_STATE_S2) {
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
- ("%s: Reject to enter PS_STATE(0x%02X) lower "
- "than S2 when DriverStopped!!\n",
- __func__, pslv));
+ "%s: Reject to enter PS_STATE(0x%02X) lower than S2 when DriverStopped!!\n",
+ __func__, pslv);
return;
}
}
rpwm = pslv | pwrpriv->tog;
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_,
- ("rtw_set_rpwm23a: rpwm = 0x%02x cpwm = 0x%02x\n",
- rpwm, pwrpriv->cpwm));
+ "rtw_set_rpwm23a: rpwm = 0x%02x cpwm = 0x%02x\n",
+ rpwm, pwrpriv->cpwm);
pwrpriv->rpwm = pslv;
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_,
- ("%s: PowerMode =%d Smart_PS =%d\n",
- __func__, ps_mode, smart_ps));
+ "%s: PowerMode =%d Smart_PS =%d\n",
+ __func__, ps_mode, smart_ps);
if (ps_mode > PM_Card_Disable) {
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
- ("ps_mode:%d error\n", ps_mode));
+ "ps_mode:%d error\n", ps_mode);
return;
}
if (prxattrib->encrypt == WLAN_CIPHER_SUITE_TKIP) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("\n recvframe_chkmic:prxattrib->encrypt == WLAN_CIPHER_SUITE_TKIP\n"));
+ "recvframe_chkmic:prxattrib->encrypt == WLAN_CIPHER_SUITE_TKIP\n");
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("\n recvframe_chkmic:da = 0x%02x:0x%02x:0x%02x:0x%02x:"
- "0x%02x:0x%02x\n", prxattrib->ra[0],
- prxattrib->ra[1], prxattrib->ra[2], prxattrib->ra[3],
- prxattrib->ra[4], prxattrib->ra[5]));
+ "recvframe_chkmic:da = %pM\n", prxattrib->ra);
/* calculate mic code */
if (stainfo != NULL) {
mickey = &psecuritypriv->dot118021XGrprxmickey[prxattrib->key_index].skey[0];
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("\n recvframe_chkmic: bcmc key\n"));
+ "recvframe_chkmic: bcmc key\n");
if (!psecuritypriv->binstallGrpkey) {
res = _FAIL;
RT_TRACE(_module_rtl871x_recv_c_,
_drv_err_,
- ("\n recvframe_chkmic:didn't "
- "install group key!!!!!!\n"));
+ "recvframe_chkmic:didn't install group key!\n");
DBG_8723A("\n recvframe_chkmic:didn't "
"install group key!!!!!!\n");
goto exit;
} else {
mickey = &stainfo->dot11tkiprxmickey.skey[0];
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("\n recvframe_chkmic: unicast "
- "key\n"));
+ "recvframe_chkmic: unicast key\n");
}
/* icv_len included the mic code */
prxattrib->iv_len;
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("\n prxattrib->iv_len =%d prxattrib->icv_len ="
- "%d\n", prxattrib->iv_len,
- prxattrib->icv_len));
+ "prxattrib->iv_len =%d prxattrib->icv_len =%d\n",
+ prxattrib->iv_len, prxattrib->icv_len);
/* care the length of the data */
rtw_seccalctkipmic23a(mickey, pframe, payload,
if (miccode[i] != *(pframemic + i)) {
RT_TRACE(_module_rtl871x_recv_c_,
_drv_err_,
- ("recvframe_chkmic:miccode"
- "[%d](%02x) != *(pframemic+"
- "%d)(%02x) ", i, miccode[i],
- i, *(pframemic + i)));
+ "recvframe_chkmic:miccode[%d](%02x) != *(pframemic+%d)(%02x)\n",
+ i, miccode[i],
+ i, *(pframemic + i));
bmic_err = true;
}
}
int i;
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("\n *(pframemic-8)-*(pframemic-1) ="
- "0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:"
- "0x%02x:0x%02x:0x%02x\n",
- *(pframemic - 8), *(pframemic - 7),
- *(pframemic - 6), *(pframemic - 5),
- *(pframemic - 4), *(pframemic - 3),
- *(pframemic - 2), *(pframemic - 1)));
+ "*(pframemic-8)-*(pframemic-1) =0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n",
+ *(pframemic - 8), *(pframemic - 7),
+ *(pframemic - 6), *(pframemic - 5),
+ *(pframemic - 4), *(pframemic - 3),
+ *(pframemic - 2), *(pframemic - 1));
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("\n *(pframemic-16)-*(pframemic-9) ="
- "0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:"
- "0x%02x:0x%02x:0x%02x\n",
- *(pframemic - 16), *(pframemic - 15),
- *(pframemic - 14), *(pframemic - 13),
- *(pframemic - 12), *(pframemic - 11),
- *(pframemic - 10), *(pframemic - 9)));
+ "*(pframemic-16)-*(pframemic-9) =0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n",
+ *(pframemic - 16), *(pframemic - 15),
+ *(pframemic - 14), *(pframemic - 13),
+ *(pframemic - 12), *(pframemic - 11),
+ *(pframemic - 10), *(pframemic - 9));
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("\n ====== demp packet (len =%d) ======"
- "\n", precvframe->pkt->len));
+ "====== demp packet (len =%d) ======\n",
+ precvframe->pkt->len);
for (i = 0; i < precvframe->pkt->len; i = i + 8) {
RT_TRACE(_module_rtl871x_recv_c_,
- _drv_err_, ("0x%02x:0x%02x:0x"
- "%02x:0x%02x:0x%0"
- "2x:0x%02x:0x%02x"
- ":0x%02x",
- *(precvframe->pkt->data+i),*(precvframe->pkt->data+i+1),
- *(precvframe->pkt->data+i+2),*(precvframe->pkt->data+i+3),
- *(precvframe->pkt->data+i+4),*(precvframe->pkt->data+i+5),
- *(precvframe->pkt->data+i+6),*(precvframe->pkt->data+i+7)));
+ _drv_err_,
+ "0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n",
+ *(precvframe->pkt->data+i),
+ *(precvframe->pkt->data+i+1),
+ *(precvframe->pkt->data+i+2),
+ *(precvframe->pkt->data+i+3),
+ *(precvframe->pkt->data+i+4),
+ *(precvframe->pkt->data+i+5),
+ *(precvframe->pkt->data+i+6),
+ *(precvframe->pkt->data+i+7));
}
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("\n ====== demp packet end [len =%d]"
- "======\n", precvframe->pkt->len));
+ "====== demp packet end [len =%d]======\n",
+ precvframe->pkt->len);
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("\n hrdlen =%d,\n",
- prxattrib->hdrlen));
+ "hrdlen =%d\n", prxattrib->hdrlen);
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("ra = 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%."
- "2x 0x%.2x psecuritypriv->"
- "binstallGrpkey =%d ",
- prxattrib->ra[0], prxattrib->ra[1],
- prxattrib->ra[2], prxattrib->ra[3],
- prxattrib->ra[4], prxattrib->ra[5],
- psecuritypriv->binstallGrpkey));
+ "ra = %pM psecuritypriv->binstallGrpkey =%d\n",
+ prxattrib->ra,
+ psecuritypriv->binstallGrpkey);
/* double check key_index for some timing
issue, cannot compare with
if ((prxattrib->bdecrypted == true) &&
(brpt_micerror == true)) {
rtw_handle_tkip_mic_err23a(adapter, (u8)is_multicast_ether_addr(prxattrib->ra));
- RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, (" mic error :prxattrib->bdecrypted =%d ", prxattrib->bdecrypted));
+ RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
+ "mic error :prxattrib->bdecrypted =%d\n",
+ prxattrib->bdecrypted);
DBG_8723A(" mic error :prxattrib->"
"bdecrypted =%d\n",
prxattrib->bdecrypted);
} else {
RT_TRACE(_module_rtl871x_recv_c_,
_drv_err_,
- (" mic error :prxattrib->"
- "bdecrypted =%d ",
- prxattrib->bdecrypted));
+ "mic error :prxattrib->bdecrypted =%d\n",
+ prxattrib->bdecrypted);
DBG_8723A(" mic error :prxattrib->"
"bdecrypted =%d\n",
prxattrib->bdecrypted);
psecuritypriv->bcheck_grpkey = 1;
RT_TRACE(_module_rtl871x_recv_c_,
_drv_err_,
- ("psecuritypriv->bcheck_grp"
- "key = true"));
+ "psecuritypriv->bcheck_grpkey = true\n");
}
}
} else {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("recvframe_chkmic: rtw_get_stainfo23a =="
- "NULL!!!\n"));
+ "recvframe_chkmic: rtw_get_stainfo23a ==NULL!!!\n");
}
skb_trim(precvframe->pkt, precvframe->pkt->len - 8);
int res = _SUCCESS;
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("prxstat->decrypted =%x prxattrib->encrypt = 0x%03x\n",
- prxattrib->bdecrypted, prxattrib->encrypt));
+ "prxstat->decrypted =%x prxattrib->encrypt = 0x%03x\n",
+ prxattrib->bdecrypted, prxattrib->encrypt);
if (prxattrib->encrypt > 0) {
u8 *iv = precv_frame->pkt->data + prxattrib->hdrlen;
psta = rtw_get_stainfo23a(pstapriv, psta_addr);
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("########portctrl:adapter->securitypriv.dot11AuthAlgrthm ="
- "%d\n", adapter->securitypriv.dot11AuthAlgrthm));
+ "########portctrl:adapter->securitypriv.dot11AuthAlgrthm =%d\n",
+ adapter->securitypriv.dot11AuthAlgrthm);
prtnframe = precv_frame;
/* blocked */
/* only accept EAPOL frame */
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("########portctrl:psta->ieee8021x_blocked =="
- "1\n"));
+ "########portctrl:psta->ieee8021x_blocked ==1\n");
if (ether_type != eapol_type) {
/* free this frame */
if (tid > 15) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_,
- ("recv_decache, (tid>15)! seq_ctrl = 0x%x, tid = 0x%x\n",
- seq_ctrl, tid));
+ "recv_decache, (tid>15)! seq_ctrl = 0x%x, tid = 0x%x\n",
+ seq_ctrl, tid);
return _FAIL;
}
if (1) { /* if (bretry) */
if (seq_ctrl == prxcache->tid_rxseq[tid]) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_,
- ("recv_decache, seq_ctrl = 0x%x, tid = 0x%x, "
- "tid_rxseq = 0x%x\n",
- seq_ctrl, tid, prxcache->tid_rxseq[tid]));
+ "recv_decache, seq_ctrl = 0x%x, tid = 0x%x, tid_rxseq = 0x%x\n",
+ seq_ctrl, tid, prxcache->tid_rxseq[tid]);
return _FAIL;
}
/* filter packets that SA is myself or multicast or broadcast */
if (ether_addr_equal(myhwaddr, pattrib->src)) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- (" SA == myself\n"));
+ "SA == myself\n");
ret = _FAIL;
goto exit;
}
and DA is my mac-address */
if (!ether_addr_equal(pattrib->bssid, pattrib->src)) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("bssid != TA under STATION_MODE; drop "
- "pkt\n"));
+ "bssid != TA under STATION_MODE; drop pkt\n");
ret = _FAIL;
goto exit;
}
*psta = rtw_get_stainfo23a(pstapriv, sta_addr); /* get ap_info */
if (*psta == NULL) {
- RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("can't get psta under sta2sta_data_frame ; drop pkt\n"));
+ RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
+ "can't get psta under sta2sta_data_frame ; drop pkt\n");
ret = _FAIL;
goto exit;
}
/* filter packets that SA is myself or multicast or broadcast */
if (ether_addr_equal(myhwaddr, pattrib->src)) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- (" SA == myself\n"));
+ "SA == myself\n");
ret = _FAIL;
goto exit;
}
/* da should be for me */
if (!ether_addr_equal(myhwaddr, pattrib->dst) && !bmcast) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- (" ap2sta_data_frame: compare DA fail; DA ="
- MAC_FMT"\n", MAC_ARG(pattrib->dst)));
+ "ap2sta_data_frame: compare DA failed; DA=%pM\n",
+ pattrib->dst);
ret = _FAIL;
goto exit;
}
ether_addr_equal(mybssid, "\x0\x0\x0\x0\x0\x0") ||
!ether_addr_equal(pattrib->bssid, mybssid)) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- (" ap2sta_data_frame: compare BSSID fail ; "
- "BSSID ="MAC_FMT"\n", MAC_ARG(pattrib->bssid)));
+ "ap2sta_data_frame: compare BSSID failed; BSSID=%pM\n",
+ pattrib->bssid);
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("mybssid ="MAC_FMT"\n", MAC_ARG(mybssid)));
+ "mybssid=%pM\n", mybssid);
if (!bmcast) {
- DBG_8723A("issue_deauth23a to the nonassociated "
- "ap =" MAC_FMT " for the reason(7)\n",
- MAC_ARG(pattrib->bssid));
+ DBG_8723A("issue_deauth23a to the nonassociated ap=%pM for the reason(7)\n",
+ pattrib->bssid);
issue_deauth23a(adapter, pattrib->bssid,
WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA);
}
if (*psta == NULL) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("ap2sta: can't get psta under STATION_MODE ;"
- " drop pkt\n"));
+ "ap2sta: can't get psta under STATION_MODE; drop pkt\n");
ret = _FAIL;
goto exit;
}
*psta = rtw_get_stainfo23a(pstapriv, pattrib->bssid);
if (*psta == NULL) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("can't get psta under MP_MODE ; drop pkt\n"));
+ "can't get psta under MP_MODE ; drop pkt\n");
ret = _FAIL;
goto exit;
}
if (ether_addr_equal(myhwaddr, pattrib->dst) && !bmcast) {
*psta = rtw_get_stainfo23a(pstapriv, pattrib->bssid);
if (*psta == NULL) {
- DBG_8723A("issue_deauth23a to the ap =" MAC_FMT
- " for the reason(7)\n",
- MAC_ARG(pattrib->bssid));
+ DBG_8723A("issue_deauth23a to the ap=%pM for the reason(7)\n",
+ pattrib->bssid);
issue_deauth23a(adapter, pattrib->bssid,
WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA);
*psta = rtw_get_stainfo23a(pstapriv, pattrib->src);
if (*psta == NULL) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("can't get psta under AP_MODE; drop pkt\n"));
- DBG_8723A("issue_deauth23a to sta =" MAC_FMT
- " for the reason(7)\n",
- MAC_ARG(pattrib->src));
+ "can't get psta under AP_MODE; drop pkt\n");
+ DBG_8723A("issue_deauth23a to sta=%pM for the reason(7)\n",
+ pattrib->src);
issue_deauth23a(adapter, pattrib->src,
WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA);
ret = RTW_RX_HANDLED;
goto exit;
}
- DBG_8723A("issue_deauth23a to sta =" MAC_FMT " for the reason(7)\n",
- MAC_ARG(pattrib->src));
+ DBG_8723A("issue_deauth23a to sta=%pM for the reason(7)\n",
+ pattrib->src);
issue_deauth23a(adapter, pattrib->src,
WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA);
ret = RTW_RX_HANDLED;
/* struct mlme_priv *pmlmepriv = &adapter->mlmepriv; */
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("+validate_recv_mgnt_frame\n"));
+ "+validate_recv_mgnt_frame\n");
precv_frame = recvframe_chk_defrag23a(padapter, precv_frame);
if (precv_frame == NULL) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_,
- ("%s: fragment packet\n", __func__));
+ "%s: fragment packet\n", __func__);
return _SUCCESS;
}
ether_addr_copy(pattrib->ra, hdr->addr1);
ether_addr_copy(pattrib->ta, hdr->addr2);
ret = _FAIL;
- RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, (" case 3\n"));
+ RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, "case 3\n");
break;
}
if (!psta) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- (" after to_fr_ds_chk; psta == NULL\n"));
+ "after to_fr_ds_chk; psta == NULL\n");
ret = _FAIL;
goto exit;
}
if (recv_decache(precv_frame, bretry, &psta->sta_recvpriv.rxcache) ==
_FAIL) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("decache : drop pkt\n"));
+ "decache : drop pkt\n");
ret = _FAIL;
goto exit;
}
if (pattrib->privacy) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("validate_recv_data_frame:pattrib->privacy =%x\n",
- pattrib->privacy));
+ "validate_recv_data_frame:pattrib->privacy =%x\n",
+ pattrib->privacy);
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("\n ^^^^^^^^^^^is_multicast_ether_addr"
- "(pattrib->ra(0x%02x)) =%d^^^^^^^^^^^^^^^6\n",
- pattrib->ra[0],
- is_multicast_ether_addr(pattrib->ra)));
+ "^^^^^^^^^^^is_multicast_ether_addr(pattrib->ra(0x%02x)) =%d^^^^^^^^^^^^^^^6\n",
+ pattrib->ra[0],
+ is_multicast_ether_addr(pattrib->ra));
GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt,
is_multicast_ether_addr(pattrib->ra));
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("\n pattrib->encrypt =%d\n", pattrib->encrypt));
+ "pattrib->encrypt =%d\n", pattrib->encrypt);
switch (pattrib->encrypt) {
case WLAN_CIPHER_SUITE_WEP40:
/* add version chk */
if (ver != 0) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("validate_recv_data_frame fail! (ver!= 0)\n"));
+ "validate_recv_data_frame fail! (ver!= 0)\n");
retval = _FAIL;
goto exit;
}
retval = validate_recv_mgnt_frame(adapter, precv_frame);
if (retval == _FAIL) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("validate_recv_mgnt_frame fail\n"));
+ "validate_recv_mgnt_frame fail\n");
}
retval = _FAIL; /* only data frame return _SUCCESS */
break;
retval = validate_recv_ctrl_frame(adapter, precv_frame);
if (retval == _FAIL) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("validate_recv_ctrl_frame fail\n"));
+ "validate_recv_ctrl_frame fail\n");
}
retval = _FAIL; /* only data frame return _SUCCESS */
break;
retval = validate_recv_data_frame(adapter, precv_frame);
if (retval == _FAIL) {
struct recv_priv *precvpriv = &adapter->recvpriv;
- /* RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("validate_recv_data_frame fail\n")); */
+
precvpriv->rx_drop++;
}
break;
default:
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("validate_recv_data_frame fail! type = 0x%x\n", type));
+ "validate_recv_data_frame fail! type = 0x%x\n", type);
retval = _FAIL;
break;
}
len = skb->len - hdrlen;
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("\n === pattrib->hdrlen: %x, pattrib->iv_len:%x ===\n\n",
- pattrib->hdrlen, pattrib->iv_len));
+ "=== pattrib->hdrlen: %x, pattrib->iv_len:%x ===\n",
+ pattrib->hdrlen, pattrib->iv_len);
pattrib->eth_type = eth_type;
if (check_fwstate(pmlmepriv, WIFI_MP_STATE)) {
rtw_free_recvframe23a_queue(defrag_q);
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("Performance defrag!!!!!\n"));
+ "Performance defrag!!!!!\n");
/* spin_unlock(&pdefrag_q->lock); */
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("Enqueuq: ismfrag = %d, fragnum = %d\n",
- ismfrag, fragnum));
+ "Enqueuq: ismfrag = %d, fragnum = %d\n",
+ ismfrag, fragnum);
prtnframe = NULL;
rtw_free_recvframe23a(precv_frame);
prtnframe = NULL;
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("Free because pdefrag_q == NULL: ismfrag = "
- "%d, fragnum = %d\n", ismfrag, fragnum));
+ "Free because pdefrag_q == NULL: ismfrag = %d, fragnum = %d\n",
+ ismfrag, fragnum);
}
}
/* call recvframe_defrag to defrag */
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("defrag: ismfrag = %d, fragnum = %d\n",
- ismfrag, fragnum));
+ "defrag: ismfrag = %d, fragnum = %d\n",
+ ismfrag, fragnum);
precv_frame = recvframe_defrag(padapter, pdefrag_q);
prtnframe = precv_frame;
} else {
rtw_free_recvframe23a(precv_frame);
prtnframe = NULL;
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("Free because pdefrag_q == NULL: ismfrag = "
- "%d, fragnum = %d\n", ismfrag, fragnum));
+ "Free because pdefrag_q == NULL: ismfrag = %d, fragnum = %d\n",
+ ismfrag, fragnum);
}
}
/* after defrag we must check tkip mic code */
if (recvframe_chkmic(padapter, prtnframe) == _FAIL) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("recvframe_chkmic(padapter, prtnframe) =="
- "_FAIL\n"));
+ "recvframe_chkmic(padapter, prtnframe) ==_FAIL\n");
rtw_free_recvframe23a(prtnframe);
prtnframe = NULL;
}
continue;
} else if (SN_EQUAL(pnextattrib->seq_num, pattrib->seq_num)) {
/* Duplicate entry is found!! Do not insert current entry. */
- /* RT_TRACE(COMP_RX_REORDER, DBG_TRACE, ("InsertRxReorderList(): Duplicate packet is dropped!! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, SeqNum)); */
/* spin_unlock_irqrestore(&ppending_recvframe_queue->lock); */
return false;
/* spin_unlock_ex(&ppending_recvframe_queue->lock); */
/* spin_unlock_irqrestore(&ppending_recvframe_queue->lock); */
- /* RT_TRACE(COMP_RX_REORDER, DBG_TRACE, ("InsertRxReorderList(): Pkt insert into buffer!! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, SeqNum)); */
return true;
}
if (!SN_LESS(preorder_ctrl->indicate_seq, pattrib->seq_num)) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_,
- ("recv_indicatepkts_in_order: indicate =%d "
- "seq =%d amsdu =%d\n",
- preorder_ctrl->indicate_seq,
- pattrib->seq_num, pattrib->amsdu));
+ "recv_indicatepkts_in_order: indicate =%d seq =%d amsdu =%d\n",
+ preorder_ctrl->indicate_seq,
+ pattrib->seq_num, pattrib->amsdu);
plist = plist->next;
list_del_init(&prframe->list);
if ((padapter->bDriverStopped == false) &&
(padapter->bSurpriseRemoved == false)) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_,
- ("@@@@ recv_indicatepkt_reorder -"
- "recv_func recv_indicatepkt\n"));
+ "@@@@ recv_indicatepkt_reorder -recv_func recv_indicatepkt\n");
rtw_recv_indicatepkt23a(padapter, prframe);
return _SUCCESS;
spin_lock_bh(&ppending_recvframe_queue->lock);
RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_,
- ("recv_indicatepkt_reorder: indicate =%d seq =%d\n",
- preorder_ctrl->indicate_seq, pattrib->seq_num));
+ "recv_indicatepkt_reorder: indicate =%d seq =%d\n",
+ preorder_ctrl->indicate_seq, pattrib->seq_num);
/* s2. check if winstart_b(indicate_seq) needs to been updated */
if (!check_indicate_seq(preorder_ctrl, pattrib->seq_num)) {
retval = wlanhdr_to_ethhdr(prframe);
if (retval != _SUCCESS) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("wlanhdr_to_ethhdr: drop pkt\n"));
+ "wlanhdr_to_ethhdr: drop pkt\n");
return retval;
}
(padapter->bSurpriseRemoved == false)) {
/* indicate this recv_frame */
RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_,
- ("@@@@ process_recv_indicatepkts- "
- "recv_func recv_indicatepkt\n"));
+ "@@@@ process_recv_indicatepkts- recv_func recv_indicatepkt\n");
rtw_recv_indicatepkt23a(padapter, prframe);
} else {
RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_,
- ("@@@@ process_recv_indicatepkts- "
- "recv_func free_indicatepkt\n"));
+ "@@@@ process_recv_indicatepkts- recv_func free_indicatepkt\n");
RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_,
- ("recv_func:bDriverStopped(%d) OR "
- "bSurpriseRemoved(%d)",
- padapter->bDriverStopped,
- padapter->bSurpriseRemoved));
+ "recv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n",
+ padapter->bDriverStopped,
+ padapter->bSurpriseRemoved);
retval = _FAIL;
return retval;
}
ret = validate_recv_frame(padapter, rframe);
if (ret != _SUCCESS) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("recv_func: validate_recv_frame fail! drop pkt\n"));
+ "recv_func: validate_recv_frame fail! drop pkt\n");
rtw_free_recvframe23a(rframe);
goto exit;
}
prframe = decryptor(padapter, prframe);
if (prframe == NULL) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("decryptor: drop pkt\n"));
+ "decryptor: drop pkt\n");
ret = _FAIL;
goto _recv_data_drop;
}
prframe = recvframe_chk_defrag23a(padapter, prframe);
if (!prframe) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("recvframe_chk_defrag23a: drop pkt\n"));
+ "recvframe_chk_defrag23a: drop pkt\n");
goto _recv_data_drop;
}
prframe = portctrl(padapter, prframe);
if (!prframe) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("portctrl: drop pkt\n"));
+ "portctrl: drop pkt\n");
ret = _FAIL;
goto _recv_data_drop;
}
ret = process_recv_indicatepkts(padapter, prframe);
if (ret != _SUCCESS) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("recv_func: process_recv_indicatepkts fail!\n"));
+ "recv_func: process_recv_indicatepkts fail!\n");
rtw_free_recvframe23a(orig_prframe);/* free this recv_frame */
goto _recv_data_drop;
}
/* update value of signal_strength, rssi, signal_qual */
if (!check_fwstate(&adapter->mlmepriv, _FW_UNDER_SURVEY)) {
- tmp_s = (avg_signal_strength + (_alpha - 1) *
- recvpriv->signal_strength);
+ tmp_s = avg_signal_strength + (_alpha - 1) *
+ recvpriv->signal_strength;
if (tmp_s %_alpha)
tmp_s = tmp_s / _alpha + 1;
else
static void arcfour_init(struct arc4context *parc4ctx, u8 *key, u32 key_len)
{
- u32 t, u;
- u32 keyindex;
- u32 stateindex;
+ u32 t, u;
+ u32 keyindex;
+ u32 stateindex;
u8 *state;
- u32 counter;
+ u32 counter;
state = parc4ctx->state;
parc4ctx->x = 0;
}
}
-static u32 arcfour_byte( struct arc4context *parc4ctx)
+
+static u32 arcfour_byte(struct arc4context *parc4ctx)
{
u32 x;
u32 y;
return state[(sx + sy) & 0xff];
}
-static void arcfour_encrypt( struct arc4context *parc4ctx,
- u8 *dest,
- u8 *src,
- u32 len)
+static void arcfour_encrypt(struct arc4context *parc4ctx, u8 *dest,
+ u8 *src, u32 len)
{
- u32 i;
+ u32 i;
for (i = 0; i < len; i++)
dest[i] = src[i] ^ (unsigned char)arcfour_byte(parc4ctx);
-
}
-static int bcrc32initialized = 0;
+static int bcrc32initialized;
static u32 crc32_table[256];
static u8 crc32_reverseBit(u8 data)
static void crc32_init(void)
{
+ int i, j;
+ u32 c;
+ u8 *p, *p1;
+ u8 k;
if (bcrc32initialized == 1)
return;
- else{
- int i, j;
- u32 c;
- u8 *p = (u8 *)&c, *p1;
- u8 k;
-
- c = 0x12340000;
-
- for (i = 0; i < 256; ++i) {
- k = crc32_reverseBit((u8)i);
- for (c = ((u32)k) << 24, j = 8; j > 0; --j) {
- c = c & 0x80000000 ? (c << 1) ^ CRC32_POLY : (c << 1);
- }
- p1 = (u8 *)&crc32_table[i];
-
- p1[0] = crc32_reverseBit(p[3]);
- p1[1] = crc32_reverseBit(p[2]);
- p1[2] = crc32_reverseBit(p[1]);
- p1[3] = crc32_reverseBit(p[0]);
- }
- bcrc32initialized = 1;
+
+ p = (u8 *) &c;
+ c = 0x12340000;
+
+ for (i = 0; i < 256; ++i) {
+ k = crc32_reverseBit((u8)i);
+
+ for (c = ((u32)k) << 24, j = 8; j > 0; --j)
+ c = c & 0x80000000 ? (c << 1) ^ CRC32_POLY : (c << 1);
+
+ p1 = (u8 *)&crc32_table[i];
+
+ p1[0] = crc32_reverseBit(p[3]);
+ p1[1] = crc32_reverseBit(p[2]);
+ p1[2] = crc32_reverseBit(p[1]);
+ p1[3] = crc32_reverseBit(p[0]);
}
+
+ bcrc32initialized = 1;
}
static u32 getcrc32(u8 *buf, int len)
{
u8 *p;
- u32 crc;
+ u32 crc;
- if (bcrc32initialized == 0) crc32_init();
+ if (bcrc32initialized == 0)
+ crc32_init();
- crc = 0xffffffff; /* preload shift register, per CRC-32 spec */
+ crc = 0xffffffff; /* preload shift register, per CRC-32 spec */
for (p = buf; len > 0; ++p, --len)
- crc = crc32_table[ (crc ^ *p) & 0xff] ^ (crc >> 8);
+ crc = crc32_table[(crc ^ *p) & 0xff] ^ (crc >> 8);
- return ~crc; /* transmit complement, per CRC-32 spec */
+ return ~crc; /* transmit complement, per CRC-32 spec */
}
/* Need to consider the fragment situation */
struct arc4context mycontext;
int curfragnum, length, index;
u32 keylength;
- u8 *pframe, *payload, *iv; /* wepkey */
+ u8 *pframe, *payload, *iv; /* wepkey */
u8 wepkey[16];
u8 hw_hdr_offset = 0;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
if ((curfragnum + 1) == pattrib->nr_frags) {
/* the last fragment */
length = pattrib->last_txcmdsz - pattrib->hdrlen -
- pattrib->iv_len- pattrib->icv_len;
+ pattrib->iv_len - pattrib->icv_len;
*((u32 *)crc) = cpu_to_le32(getcrc32(payload, length));
struct recv_frame *precvframe)
{
/* exclude ICV */
- u8 crc[4];
+ u32 actual_crc, expected_crc;
struct arc4context mycontext;
int length;
u32 keylength;
arcfour_encrypt(&mycontext, payload, payload, length);
/* calculate icv and compare the icv */
- *((u32 *)crc) = le32_to_cpu(getcrc32(payload, length - 4));
+ actual_crc = le32_to_cpu(getcrc32(payload, length - 4));
+ expected_crc = le32_to_cpu(get_unaligned_le32(&payload[length - 4]));
- if (crc[3] != payload[length - 1] || crc[2] != payload[length - 2] ||
- crc[1] != payload[length - 3] || crc[0] != payload[length - 4]) {
+ if (actual_crc != expected_crc) {
RT_TRACE(_module_rtl871x_security_c_, _drv_err_,
- ("rtw_wep_decrypt23a:icv error crc[3](%x)!= payload"
- "[length-1](%x) || crc[2](%x)!= payload[length-2](%x)"
- " || crc[1](%x)!= payload[length-3](%x) || crc[0](%x)"
- "!= payload[length-4](%x)\n",
- crc[3], payload[length - 1],
- crc[2], payload[length - 2],
- crc[1], payload[length - 3],
- crc[0], payload[length - 4]));
+ "%s:icv CRC mismatch: "
+ "actual: %08x, expected: %08x\n",
+ __func__, actual_crc, expected_crc);
}
}
s32 i;
u32 res = 0;
- for (i = 0; i<4; i++) {
- res |= ((u32)(*p++)) << (8*i);
- }
+ for (i = 0; i < 4; i++)
+ res |= ((u32)(*p++)) << (8 * i);
return res;
}
{
long i;
- for (i = 0; i<4; i++) {
+ for (i = 0; i < 4; i++) {
*p++ = (u8) (val & 0xff);
val >>= 8;
}
{
/* Append the byte to our word-sized buffer */
- pmicdata->M |= ((unsigned long)b) << (8*pmicdata->nBytesInM);
+ pmicdata->M |= ((unsigned long)b) << (8 * pmicdata->nBytesInM);
pmicdata->nBytesInM++;
/* Process the word if it is full. */
if (pmicdata->nBytesInM >= 4) {
{
/* This is simple */
- while(nbytes > 0) {
+ while (nbytes > 0) {
rtw_secmicappend23abyte23a(pmicdata, *src++);
nbytes--;
}
rtw_secmicappend23abyte23a(pmicdata, 0);
rtw_secmicappend23abyte23a(pmicdata, 0);
/* and then zeroes until the length is a multiple of 4 */
- while(pmicdata->nBytesInM != 0) {
+ while (pmicdata->nBytesInM != 0)
rtw_secmicappend23abyte23a(pmicdata, 0);
- }
/* The appendByte function has already computed the result. */
secmicputuint32(dst, pmicdata->L);
- secmicputuint32(dst+4, pmicdata->R);
+ secmicputuint32(dst + 4, pmicdata->R);
/* Reset to the empty message. */
secmicclear(pmicdata);
u8 *mic_code, u8 pri)
{
- struct mic_data micdata;
- u8 priority[4]={0x0, 0x0, 0x0, 0x0};
+ struct mic_data micdata;
+ u8 priority[4] = {0x0, 0x0, 0x0, 0x0};
rtw_secmicsetkey23a(&micdata, key);
- priority[0]= pri;
+ priority[0] = pri;
/* Michael MIC pseudo header: DA, SA, 3 x 0, Priority */
- if (header[1]&1) { /* ToDS == 1 */
- rtw_secmicappend23a(&micdata, &header[16], 6); /* DA */
- if (header[1]&2) /* From Ds == 1 */
+ if (header[1]&1) { /* ToDS == 1 */
+ rtw_secmicappend23a(&micdata, &header[16], 6); /* DA */
+ if (header[1]&2) /* From Ds == 1 */
rtw_secmicappend23a(&micdata, &header[24], 6);
else
rtw_secmicappend23a(&micdata, &header[10], 6);
- }
- else{ /* ToDS == 0 */
- rtw_secmicappend23a(&micdata, &header[4], 6); /* DA */
- if (header[1]&2) /* From Ds == 1 */
+ } else { /* ToDS == 0 */
+ rtw_secmicappend23a(&micdata, &header[4], 6); /* DA */
+ if (header[1]&2) /* From Ds == 1 */
rtw_secmicappend23a(&micdata, &header[16], 6);
else
rtw_secmicappend23a(&micdata, &header[10], 6);
#define Lo8(v16) ((u8)((v16) & 0x00FF))
#define Hi8(v16) ((u8)(((v16) >> 8) & 0x00FF))
#define Lo16(v32) ((u16)((v32) & 0xFFFF))
-#define Hi16(v32) ((u16)(((v32) >>16) & 0xFFFF))
+#define Hi16(v32) ((u16)(((v32) >> 16) & 0xFFFF))
#define Mk16(hi, lo) ((lo) ^ (((u16)(hi)) << 8))
-/* select the Nth 16-bit word of the temporal key unsigned char array TK[] */
-#define TK16(N) Mk16(tk[2*(N)+1], tk[2*(N)])
+/* select the Nth 16-bit word of the temporal key unsigned char array TK[] */
+#define TK16(N) Mk16(tk[2 * (N) + 1], tk[2 * (N)])
/* S-box lookup: 16 bits --> 16 bits */
#define _S_(v16) (Sbox1[0][Lo8(v16)] ^ Sbox1[1][Hi8(v16)])
#define RC4_KEY_SIZE 16 /* 128-bit RC4KEY (104 bits unknown) */
/* 2-unsigned char by 2-unsigned char subset of the full AES S-box table */
-static const unsigned short Sbox1[2][256]= /* Sbox for hash (can be in ROM) */
-{ {
- 0xC6A5, 0xF884, 0xEE99, 0xF68D, 0xFF0D, 0xD6BD, 0xDEB1, 0x9154,
- 0x6050, 0x0203, 0xCEA9, 0x567D, 0xE719, 0xB562, 0x4DE6, 0xEC9A,
- 0x8F45, 0x1F9D, 0x8940, 0xFA87, 0xEF15, 0xB2EB, 0x8EC9, 0xFB0B,
- 0x41EC, 0xB367, 0x5FFD, 0x45EA, 0x23BF, 0x53F7, 0xE496, 0x9B5B,
- 0x75C2, 0xE11C, 0x3DAE, 0x4C6A, 0x6C5A, 0x7E41, 0xF502, 0x834F,
- 0x685C, 0x51F4, 0xD134, 0xF908, 0xE293, 0xAB73, 0x6253, 0x2A3F,
- 0x080C, 0x9552, 0x4665, 0x9D5E, 0x3028, 0x37A1, 0x0A0F, 0x2FB5,
- 0x0E09, 0x2436, 0x1B9B, 0xDF3D, 0xCD26, 0x4E69, 0x7FCD, 0xEA9F,
- 0x121B, 0x1D9E, 0x5874, 0x342E, 0x362D, 0xDCB2, 0xB4EE, 0x5BFB,
- 0xA4F6, 0x764D, 0xB761, 0x7DCE, 0x527B, 0xDD3E, 0x5E71, 0x1397,
- 0xA6F5, 0xB968, 0x0000, 0xC12C, 0x4060, 0xE31F, 0x79C8, 0xB6ED,
- 0xD4BE, 0x8D46, 0x67D9, 0x724B, 0x94DE, 0x98D4, 0xB0E8, 0x854A,
- 0xBB6B, 0xC52A, 0x4FE5, 0xED16, 0x86C5, 0x9AD7, 0x6655, 0x1194,
- 0x8ACF, 0xE910, 0x0406, 0xFE81, 0xA0F0, 0x7844, 0x25BA, 0x4BE3,
- 0xA2F3, 0x5DFE, 0x80C0, 0x058A, 0x3FAD, 0x21BC, 0x7048, 0xF104,
- 0x63DF, 0x77C1, 0xAF75, 0x4263, 0x2030, 0xE51A, 0xFD0E, 0xBF6D,
- 0x814C, 0x1814, 0x2635, 0xC32F, 0xBEE1, 0x35A2, 0x88CC, 0x2E39,
- 0x9357, 0x55F2, 0xFC82, 0x7A47, 0xC8AC, 0xBAE7, 0x322B, 0xE695,
- 0xC0A0, 0x1998, 0x9ED1, 0xA37F, 0x4466, 0x547E, 0x3BAB, 0x0B83,
- 0x8CCA, 0xC729, 0x6BD3, 0x283C, 0xA779, 0xBCE2, 0x161D, 0xAD76,
- 0xDB3B, 0x6456, 0x744E, 0x141E, 0x92DB, 0x0C0A, 0x486C, 0xB8E4,
- 0x9F5D, 0xBD6E, 0x43EF, 0xC4A6, 0x39A8, 0x31A4, 0xD337, 0xF28B,
- 0xD532, 0x8B43, 0x6E59, 0xDAB7, 0x018C, 0xB164, 0x9CD2, 0x49E0,
- 0xD8B4, 0xACFA, 0xF307, 0xCF25, 0xCAAF, 0xF48E, 0x47E9, 0x1018,
- 0x6FD5, 0xF088, 0x4A6F, 0x5C72, 0x3824, 0x57F1, 0x73C7, 0x9751,
- 0xCB23, 0xA17C, 0xE89C, 0x3E21, 0x96DD, 0x61DC, 0x0D86, 0x0F85,
- 0xE090, 0x7C42, 0x71C4, 0xCCAA, 0x90D8, 0x0605, 0xF701, 0x1C12,
- 0xC2A3, 0x6A5F, 0xAEF9, 0x69D0, 0x1791, 0x9958, 0x3A27, 0x27B9,
- 0xD938, 0xEB13, 0x2BB3, 0x2233, 0xD2BB, 0xA970, 0x0789, 0x33A7,
- 0x2DB6, 0x3C22, 0x1592, 0xC920, 0x8749, 0xAAFF, 0x5078, 0xA57A,
- 0x038F, 0x59F8, 0x0980, 0x1A17, 0x65DA, 0xD731, 0x84C6, 0xD0B8,
- 0x82C3, 0x29B0, 0x5A77, 0x1E11, 0x7BCB, 0xA8FC, 0x6DD6, 0x2C3A,
- },
-
- { /* second half of table is unsigned char-reversed version of first! */
- 0xA5C6, 0x84F8, 0x99EE, 0x8DF6, 0x0DFF, 0xBDD6, 0xB1DE, 0x5491,
- 0x5060, 0x0302, 0xA9CE, 0x7D56, 0x19E7, 0x62B5, 0xE64D, 0x9AEC,
- 0x458F, 0x9D1F, 0x4089, 0x87FA, 0x15EF, 0xEBB2, 0xC98E, 0x0BFB,
- 0xEC41, 0x67B3, 0xFD5F, 0xEA45, 0xBF23, 0xF753, 0x96E4, 0x5B9B,
- 0xC275, 0x1CE1, 0xAE3D, 0x6A4C, 0x5A6C, 0x417E, 0x02F5, 0x4F83,
- 0x5C68, 0xF451, 0x34D1, 0x08F9, 0x93E2, 0x73AB, 0x5362, 0x3F2A,
- 0x0C08, 0x5295, 0x6546, 0x5E9D, 0x2830, 0xA137, 0x0F0A, 0xB52F,
- 0x090E, 0x3624, 0x9B1B, 0x3DDF, 0x26CD, 0x694E, 0xCD7F, 0x9FEA,
- 0x1B12, 0x9E1D, 0x7458, 0x2E34, 0x2D36, 0xB2DC, 0xEEB4, 0xFB5B,
- 0xF6A4, 0x4D76, 0x61B7, 0xCE7D, 0x7B52, 0x3EDD, 0x715E, 0x9713,
- 0xF5A6, 0x68B9, 0x0000, 0x2CC1, 0x6040, 0x1FE3, 0xC879, 0xEDB6,
- 0xBED4, 0x468D, 0xD967, 0x4B72, 0xDE94, 0xD498, 0xE8B0, 0x4A85,
- 0x6BBB, 0x2AC5, 0xE54F, 0x16ED, 0xC586, 0xD79A, 0x5566, 0x9411,
- 0xCF8A, 0x10E9, 0x0604, 0x81FE, 0xF0A0, 0x4478, 0xBA25, 0xE34B,
- 0xF3A2, 0xFE5D, 0xC080, 0x8A05, 0xAD3F, 0xBC21, 0x4870, 0x04F1,
- 0xDF63, 0xC177, 0x75AF, 0x6342, 0x3020, 0x1AE5, 0x0EFD, 0x6DBF,
- 0x4C81, 0x1418, 0x3526, 0x2FC3, 0xE1BE, 0xA235, 0xCC88, 0x392E,
- 0x5793, 0xF255, 0x82FC, 0x477A, 0xACC8, 0xE7BA, 0x2B32, 0x95E6,
- 0xA0C0, 0x9819, 0xD19E, 0x7FA3, 0x6644, 0x7E54, 0xAB3B, 0x830B,
- 0xCA8C, 0x29C7, 0xD36B, 0x3C28, 0x79A7, 0xE2BC, 0x1D16, 0x76AD,
- 0x3BDB, 0x5664, 0x4E74, 0x1E14, 0xDB92, 0x0A0C, 0x6C48, 0xE4B8,
- 0x5D9F, 0x6EBD, 0xEF43, 0xA6C4, 0xA839, 0xA431, 0x37D3, 0x8BF2,
- 0x32D5, 0x438B, 0x596E, 0xB7DA, 0x8C01, 0x64B1, 0xD29C, 0xE049,
- 0xB4D8, 0xFAAC, 0x07F3, 0x25CF, 0xAFCA, 0x8EF4, 0xE947, 0x1810,
- 0xD56F, 0x88F0, 0x6F4A, 0x725C, 0x2438, 0xF157, 0xC773, 0x5197,
- 0x23CB, 0x7CA1, 0x9CE8, 0x213E, 0xDD96, 0xDC61, 0x860D, 0x850F,
- 0x90E0, 0x427C, 0xC471, 0xAACC, 0xD890, 0x0506, 0x01F7, 0x121C,
- 0xA3C2, 0x5F6A, 0xF9AE, 0xD069, 0x9117, 0x5899, 0x273A, 0xB927,
- 0x38D9, 0x13EB, 0xB32B, 0x3322, 0xBBD2, 0x70A9, 0x8907, 0xA733,
- 0xB62D, 0x223C, 0x9215, 0x20C9, 0x4987, 0xFFAA, 0x7850, 0x7AA5,
- 0x8F03, 0xF859, 0x8009, 0x171A, 0xDA65, 0x31D7, 0xC684, 0xB8D0,
- 0xC382, 0xB029, 0x775A, 0x111E, 0xCB7B, 0xFCA8, 0xD66D, 0x3A2C,
- }
+static const unsigned short Sbox1[2][256] = {
+ /* Sbox for hash (can be in ROM) */
+ {
+ 0xC6A5, 0xF884, 0xEE99, 0xF68D, 0xFF0D, 0xD6BD, 0xDEB1, 0x9154,
+ 0x6050, 0x0203, 0xCEA9, 0x567D, 0xE719, 0xB562, 0x4DE6, 0xEC9A,
+ 0x8F45, 0x1F9D, 0x8940, 0xFA87, 0xEF15, 0xB2EB, 0x8EC9, 0xFB0B,
+ 0x41EC, 0xB367, 0x5FFD, 0x45EA, 0x23BF, 0x53F7, 0xE496, 0x9B5B,
+ 0x75C2, 0xE11C, 0x3DAE, 0x4C6A, 0x6C5A, 0x7E41, 0xF502, 0x834F,
+ 0x685C, 0x51F4, 0xD134, 0xF908, 0xE293, 0xAB73, 0x6253, 0x2A3F,
+ 0x080C, 0x9552, 0x4665, 0x9D5E, 0x3028, 0x37A1, 0x0A0F, 0x2FB5,
+ 0x0E09, 0x2436, 0x1B9B, 0xDF3D, 0xCD26, 0x4E69, 0x7FCD, 0xEA9F,
+ 0x121B, 0x1D9E, 0x5874, 0x342E, 0x362D, 0xDCB2, 0xB4EE, 0x5BFB,
+ 0xA4F6, 0x764D, 0xB761, 0x7DCE, 0x527B, 0xDD3E, 0x5E71, 0x1397,
+ 0xA6F5, 0xB968, 0x0000, 0xC12C, 0x4060, 0xE31F, 0x79C8, 0xB6ED,
+ 0xD4BE, 0x8D46, 0x67D9, 0x724B, 0x94DE, 0x98D4, 0xB0E8, 0x854A,
+ 0xBB6B, 0xC52A, 0x4FE5, 0xED16, 0x86C5, 0x9AD7, 0x6655, 0x1194,
+ 0x8ACF, 0xE910, 0x0406, 0xFE81, 0xA0F0, 0x7844, 0x25BA, 0x4BE3,
+ 0xA2F3, 0x5DFE, 0x80C0, 0x058A, 0x3FAD, 0x21BC, 0x7048, 0xF104,
+ 0x63DF, 0x77C1, 0xAF75, 0x4263, 0x2030, 0xE51A, 0xFD0E, 0xBF6D,
+ 0x814C, 0x1814, 0x2635, 0xC32F, 0xBEE1, 0x35A2, 0x88CC, 0x2E39,
+ 0x9357, 0x55F2, 0xFC82, 0x7A47, 0xC8AC, 0xBAE7, 0x322B, 0xE695,
+ 0xC0A0, 0x1998, 0x9ED1, 0xA37F, 0x4466, 0x547E, 0x3BAB, 0x0B83,
+ 0x8CCA, 0xC729, 0x6BD3, 0x283C, 0xA779, 0xBCE2, 0x161D, 0xAD76,
+ 0xDB3B, 0x6456, 0x744E, 0x141E, 0x92DB, 0x0C0A, 0x486C, 0xB8E4,
+ 0x9F5D, 0xBD6E, 0x43EF, 0xC4A6, 0x39A8, 0x31A4, 0xD337, 0xF28B,
+ 0xD532, 0x8B43, 0x6E59, 0xDAB7, 0x018C, 0xB164, 0x9CD2, 0x49E0,
+ 0xD8B4, 0xACFA, 0xF307, 0xCF25, 0xCAAF, 0xF48E, 0x47E9, 0x1018,
+ 0x6FD5, 0xF088, 0x4A6F, 0x5C72, 0x3824, 0x57F1, 0x73C7, 0x9751,
+ 0xCB23, 0xA17C, 0xE89C, 0x3E21, 0x96DD, 0x61DC, 0x0D86, 0x0F85,
+ 0xE090, 0x7C42, 0x71C4, 0xCCAA, 0x90D8, 0x0605, 0xF701, 0x1C12,
+ 0xC2A3, 0x6A5F, 0xAEF9, 0x69D0, 0x1791, 0x9958, 0x3A27, 0x27B9,
+ 0xD938, 0xEB13, 0x2BB3, 0x2233, 0xD2BB, 0xA970, 0x0789, 0x33A7,
+ 0x2DB6, 0x3C22, 0x1592, 0xC920, 0x8749, 0xAAFF, 0x5078, 0xA57A,
+ 0x038F, 0x59F8, 0x0980, 0x1A17, 0x65DA, 0xD731, 0x84C6, 0xD0B8,
+ 0x82C3, 0x29B0, 0x5A77, 0x1E11, 0x7BCB, 0xA8FC, 0x6DD6, 0x2C3A,
+ },
+ { /* second half of table is unsigned char-reversed version of first! */
+ 0xA5C6, 0x84F8, 0x99EE, 0x8DF6, 0x0DFF, 0xBDD6, 0xB1DE, 0x5491,
+ 0x5060, 0x0302, 0xA9CE, 0x7D56, 0x19E7, 0x62B5, 0xE64D, 0x9AEC,
+ 0x458F, 0x9D1F, 0x4089, 0x87FA, 0x15EF, 0xEBB2, 0xC98E, 0x0BFB,
+ 0xEC41, 0x67B3, 0xFD5F, 0xEA45, 0xBF23, 0xF753, 0x96E4, 0x5B9B,
+ 0xC275, 0x1CE1, 0xAE3D, 0x6A4C, 0x5A6C, 0x417E, 0x02F5, 0x4F83,
+ 0x5C68, 0xF451, 0x34D1, 0x08F9, 0x93E2, 0x73AB, 0x5362, 0x3F2A,
+ 0x0C08, 0x5295, 0x6546, 0x5E9D, 0x2830, 0xA137, 0x0F0A, 0xB52F,
+ 0x090E, 0x3624, 0x9B1B, 0x3DDF, 0x26CD, 0x694E, 0xCD7F, 0x9FEA,
+ 0x1B12, 0x9E1D, 0x7458, 0x2E34, 0x2D36, 0xB2DC, 0xEEB4, 0xFB5B,
+ 0xF6A4, 0x4D76, 0x61B7, 0xCE7D, 0x7B52, 0x3EDD, 0x715E, 0x9713,
+ 0xF5A6, 0x68B9, 0x0000, 0x2CC1, 0x6040, 0x1FE3, 0xC879, 0xEDB6,
+ 0xBED4, 0x468D, 0xD967, 0x4B72, 0xDE94, 0xD498, 0xE8B0, 0x4A85,
+ 0x6BBB, 0x2AC5, 0xE54F, 0x16ED, 0xC586, 0xD79A, 0x5566, 0x9411,
+ 0xCF8A, 0x10E9, 0x0604, 0x81FE, 0xF0A0, 0x4478, 0xBA25, 0xE34B,
+ 0xF3A2, 0xFE5D, 0xC080, 0x8A05, 0xAD3F, 0xBC21, 0x4870, 0x04F1,
+ 0xDF63, 0xC177, 0x75AF, 0x6342, 0x3020, 0x1AE5, 0x0EFD, 0x6DBF,
+ 0x4C81, 0x1418, 0x3526, 0x2FC3, 0xE1BE, 0xA235, 0xCC88, 0x392E,
+ 0x5793, 0xF255, 0x82FC, 0x477A, 0xACC8, 0xE7BA, 0x2B32, 0x95E6,
+ 0xA0C0, 0x9819, 0xD19E, 0x7FA3, 0x6644, 0x7E54, 0xAB3B, 0x830B,
+ 0xCA8C, 0x29C7, 0xD36B, 0x3C28, 0x79A7, 0xE2BC, 0x1D16, 0x76AD,
+ 0x3BDB, 0x5664, 0x4E74, 0x1E14, 0xDB92, 0x0A0C, 0x6C48, 0xE4B8,
+ 0x5D9F, 0x6EBD, 0xEF43, 0xA6C4, 0xA839, 0xA431, 0x37D3, 0x8BF2,
+ 0x32D5, 0x438B, 0x596E, 0xB7DA, 0x8C01, 0x64B1, 0xD29C, 0xE049,
+ 0xB4D8, 0xFAAC, 0x07F3, 0x25CF, 0xAFCA, 0x8EF4, 0xE947, 0x1810,
+ 0xD56F, 0x88F0, 0x6F4A, 0x725C, 0x2438, 0xF157, 0xC773, 0x5197,
+ 0x23CB, 0x7CA1, 0x9CE8, 0x213E, 0xDD96, 0xDC61, 0x860D, 0x850F,
+ 0x90E0, 0x427C, 0xC471, 0xAACC, 0xD890, 0x0506, 0x01F7, 0x121C,
+ 0xA3C2, 0x5F6A, 0xF9AE, 0xD069, 0x9117, 0x5899, 0x273A, 0xB927,
+ 0x38D9, 0x13EB, 0xB32B, 0x3322, 0xBBD2, 0x70A9, 0x8907, 0xA733,
+ 0xB62D, 0x223C, 0x9215, 0x20C9, 0x4987, 0xFFAA, 0x7850, 0x7AA5,
+ 0x8F03, 0xF859, 0x8009, 0x171A, 0xDA65, 0x31D7, 0xC684, 0xB8D0,
+ 0xC382, 0xB029, 0x775A, 0x111E, 0xCB7B, 0xFCA8, 0xD66D, 0x3A2C,
+ }
};
/*
{
int i;
- /* Initialize the 80 bits of P1K[] from IV32 and TA[0..5] */
+ /* Initialize the 80 bits of P1K[] from IV32 and TA[0..5] */
p1k[0] = Lo16(iv32);
p1k[1] = Hi16(iv32);
p1k[2] = Mk16(ta[1], ta[0]); /* use TA[] as little-endian */
/* Now compute an unbalanced Feistel cipher with 80-bit block */
/* size on the 80-bit block P1K[], using the 128-bit key TK[] */
- for (i = 0; i < PHASE1_LOOP_CNT ;i++) {
+ for (i = 0; i < PHASE1_LOOP_CNT; i++) {
/* Each add operation here is mod 2**16 */
- p1k[0] += _S_(p1k[4] ^ TK16((i&1)+0));
- p1k[1] += _S_(p1k[0] ^ TK16((i&1)+2));
- p1k[2] += _S_(p1k[1] ^ TK16((i&1)+4));
- p1k[3] += _S_(p1k[2] ^ TK16((i&1)+6));
- p1k[4] += _S_(p1k[3] ^ TK16((i&1)+0));
- p1k[4] += (unsigned short)i; /* avoid "slide attacks" */
+ p1k[0] += _S_(p1k[4] ^ TK16((i & 1) + 0));
+ p1k[1] += _S_(p1k[0] ^ TK16((i & 1) + 2));
+ p1k[2] += _S_(p1k[1] ^ TK16((i & 1) + 4));
+ p1k[3] += _S_(p1k[2] ^ TK16((i & 1) + 6));
+ p1k[4] += _S_(p1k[3] ^ TK16((i & 1) + 0));
+ p1k[4] += (unsigned short) i; /* avoid "slide attacks" */
}
}
static void phase2(u8 *rc4key, const u8 *tk, const u16 *p1k, u16 iv16)
{
int i;
- u16 PPK[6]; /* temporary key for mixing */
+ u16 PPK[6]; /* temporary key for mixing */
+
+ /* Note: all adds in the PPK[] equations below are mod 2**16 */
+ for (i = 0; i < 5; i++)
+ PPK[i] = p1k[i]; /* first, copy P1K to PPK */
- /* Note: all adds in the PPK[] equations below are mod 2**16 */
- for (i = 0;i<5;i++) PPK[i]= p1k[i]; /* first, copy P1K to PPK */
- PPK[5] = p1k[4] +iv16; /* next, add in IV16 */
+ PPK[5] = p1k[4] + iv16; /* next, add in IV16 */
- /* Bijective non-linear mixing of the 96 bits of PPK[0..5] */
- PPK[0] += _S_(PPK[5] ^ TK16(0)); /* Mix key in each "round" */
- PPK[1] += _S_(PPK[0] ^ TK16(1));
- PPK[2] += _S_(PPK[1] ^ TK16(2));
- PPK[3] += _S_(PPK[2] ^ TK16(3));
- PPK[4] += _S_(PPK[3] ^ TK16(4));
- PPK[5] += _S_(PPK[4] ^ TK16(5)); /* Total # S-box lookups == 6 */
+ /* Bijective non-linear mixing of the 96 bits of PPK[0..5] */
+ PPK[0] += _S_(PPK[5] ^ TK16(0)); /* Mix key in each "round" */
+ PPK[1] += _S_(PPK[0] ^ TK16(1));
+ PPK[2] += _S_(PPK[1] ^ TK16(2));
+ PPK[3] += _S_(PPK[2] ^ TK16(3));
+ PPK[4] += _S_(PPK[3] ^ TK16(4));
+ PPK[5] += _S_(PPK[4] ^ TK16(5)); /* Total # S-box lookups == 6 */
- /* Final sweep: bijective, "linear". Rotates kill LSB correlations */
+ /* Final sweep: bijective, "linear". Rotates kill LSB correlations */
PPK[0] += RotR1(PPK[5] ^ TK16(6));
- PPK[1] += RotR1(PPK[0] ^ TK16(7)); /* Use all of TK[] in Phase2 */
+ PPK[1] += RotR1(PPK[0] ^ TK16(7)); /* Use all of TK[] in Phase2 */
PPK[2] += RotR1(PPK[1]);
PPK[3] += RotR1(PPK[2]);
PPK[4] += RotR1(PPK[3]);
PPK[5] += RotR1(PPK[4]);
/* Note: At this point, for a given key TK[0..15], the 96-bit output */
/* value PPK[0..5] is guaranteed to be unique, as a function */
- /* of the 96-bit "input" value {TA, IV32, IV16}. That is, P1K */
- /* is now a keyed permutation of {TA, IV32, IV16}. */
+ /* of the 96-bit "input" value {TA, IV32, IV16}. That is, */
+ /* P1K is now a keyed permutation of {TA, IV32, IV16}. */
/* Set RC4KEY[0..3], which includes "cleartext" portion of RC4 key */
- rc4key[0] = Hi8(iv16); /* RC4KEY[0..2] is the WEP IV */
- rc4key[1] = (Hi8(iv16) | 0x20) & 0x7F; /* Help avoid weak (FMS) keys */
+ rc4key[0] = Hi8(iv16); /* RC4KEY[0..2] is the WEP IV */
+ rc4key[1] = (Hi8(iv16) | 0x20) & 0x7F; /* Help avoid weak (FMS) keys */
rc4key[2] = Lo8(iv16);
rc4key[3] = Lo8((PPK[5] ^ TK16(0)) >> 1);
- /* Copy 96 bits of PPK[0..5] to RC4KEY[4..15] (little-endian) */
- for (i = 0;i<6;i++) {
- rc4key[4+2*i] = Lo8(PPK[i]);
- rc4key[5+2*i] = Hi8(PPK[i]);
+ /* Copy 96 bits of PPK[0..5] to RC4KEY[4..15] (little-endian) */
+ for (i = 0; i < 6; i++) {
+ rc4key[4 + 2 * i] = Lo8(PPK[i]);
+ rc4key[5 + 2 * i] = Hi8(PPK[i]);
}
}
int rtw_tkip_encrypt23a(struct rtw_adapter *padapter,
struct xmit_frame *pxmitframe)
{
- u16 pnl;
- u32 pnh;
- u8 rc4key[16];
- u8 ttkey[16];
- u8 crc[4];
- u8 hw_hdr_offset = 0;
+ u16 pnl;
+ u32 pnh;
+ u8 rc4key[16];
+ u8 ttkey[16];
+ u8 crc[4];
+ u8 hw_hdr_offset = 0;
struct arc4context mycontext;
- int curfragnum, length;
- u32 prwskeylen;
- u8 *pframe, *payload, *iv, *prwskey;
+ int curfragnum, length;
+ u32 prwskeylen;
+ u8 *pframe, *payload, *iv, *prwskey;
union pn48 dot11txpn;
- struct sta_info *stainfo;
- struct pkt_attrib *pattrib = &pxmitframe->attrib;
- struct security_priv *psecuritypriv = &padapter->securitypriv;
- struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
+ struct sta_info *stainfo;
+ struct pkt_attrib *pattrib = &pxmitframe->attrib;
+ struct security_priv *psecuritypriv = &padapter->securitypriv;
+ struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
int res = _SUCCESS;
+ if (pattrib->encrypt != WLAN_CIPHER_SUITE_TKIP)
+ return _FAIL;
+
if (!pxmitframe->buf_addr)
return _FAIL;
hw_hdr_offset = TXDESC_OFFSET;
pframe = pxmitframe->buf_addr + hw_hdr_offset;
- /* 4 start to encrypt each fragment */
- if (pattrib->encrypt == WLAN_CIPHER_SUITE_TKIP) {
- if (pattrib->psta)
- stainfo = pattrib->psta;
- else {
- DBG_8723A("%s, call rtw_get_stainfo()\n", __func__);
- stainfo = rtw_get_stainfo23a(&padapter->stapriv,
- &pattrib->ra[0]);
- }
- if (stainfo!= NULL) {
+ if (pattrib->psta)
+ stainfo = pattrib->psta;
+ else {
+ DBG_8723A("%s, call rtw_get_stainfo()\n", __func__);
+ stainfo = rtw_get_stainfo23a(&padapter->stapriv,
+ &pattrib->ra[0]);
+ }
- if (!(stainfo->state &_FW_LINKED)) {
- DBG_8723A("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, stainfo->state);
- return _FAIL;
- }
+ if (stainfo == NULL) {
+ RT_TRACE(_module_rtl871x_security_c_, _drv_err_,
+ "%s: stainfo == NULL!!!\n", __func__);
+ DBG_8723A("%s, psta == NUL\n", __func__);
+ return _FAIL;
+ }
- RT_TRACE(_module_rtl871x_security_c_, _drv_err_, ("rtw_tkip_encrypt23a: stainfo!= NULL!!!\n"));
+ RT_TRACE(_module_rtl871x_security_c_, _drv_err_,
+ "%s: stainfo!= NULL!!!\n", __func__);
- if (is_multicast_ether_addr(pattrib->ra))
- prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey;
- else
- prwskey = &stainfo->dot118021x_UncstKey.skey[0];
+ if (!(stainfo->state & _FW_LINKED)) {
+ DBG_8723A("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, stainfo->state);
+ return _FAIL;
+ }
- prwskeylen = 16;
+ if (is_multicast_ether_addr(pattrib->ra))
+ prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey;
+ else
+ prwskey = &stainfo->dot118021x_UncstKey.skey[0];
- for (curfragnum = 0;curfragnum<pattrib->nr_frags;curfragnum++) {
- iv = pframe+pattrib->hdrlen;
- payload = pframe+pattrib->iv_len+pattrib->hdrlen;
+ prwskeylen = 16;
- GET_TKIP_PN(iv, dot11txpn);
+ /* 4 start to encrypt each fragment */
+ for (curfragnum = 0; curfragnum < pattrib->nr_frags; curfragnum++) {
+ iv = pframe + pattrib->hdrlen;
+ payload = pframe + pattrib->iv_len + pattrib->hdrlen;
- pnl = (u16)(dot11txpn.val);
- pnh = (u32)(dot11txpn.val>>16);
+ GET_TKIP_PN(iv, dot11txpn);
- phase1((u16 *)&ttkey[0], prwskey,&pattrib->ta[0], pnh);
+ pnl = (u16)(dot11txpn.val);
+ pnh = (u32)(dot11txpn.val>>16);
- phase2(&rc4key[0], prwskey, (u16 *)&ttkey[0], pnl);
+ phase1((u16 *)&ttkey[0], prwskey, &pattrib->ta[0], pnh);
- if ((curfragnum+1) == pattrib->nr_frags) { /* 4 the last fragment */
- length = pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len- pattrib->icv_len;
- RT_TRACE(_module_rtl871x_security_c_, _drv_info_, ("pattrib->iv_len =%x, pattrib->icv_len =%x\n", pattrib->iv_len, pattrib->icv_len));
- *((u32 *)crc) = cpu_to_le32(getcrc32(payload, length));/* modified by Amy*/
+ phase2(&rc4key[0], prwskey, (u16 *)&ttkey[0], pnl);
- arcfour_init(&mycontext, rc4key, 16);
- arcfour_encrypt(&mycontext, payload, payload, length);
- arcfour_encrypt(&mycontext, payload+length, crc, 4);
+ if ((curfragnum + 1) == pattrib->nr_frags) { /* 4 the last fragment */
+ length = (pattrib->last_txcmdsz -
+ pattrib->hdrlen -
+ pattrib->iv_len -
+ pattrib->icv_len);
- }
- else{
- length = pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len ;
- *((u32 *)crc) = cpu_to_le32(getcrc32(payload, length));/* modified by Amy*/
- arcfour_init(&mycontext, rc4key, 16);
- arcfour_encrypt(&mycontext, payload, payload, length);
- arcfour_encrypt(&mycontext, payload+length, crc, 4);
+ RT_TRACE(_module_rtl871x_security_c_, _drv_info_,
+ "pattrib->iv_len =%x, pattrib->icv_len =%x\n",
+ pattrib->iv_len,
+ pattrib->icv_len);
+ *((u32 *)crc) = cpu_to_le32(getcrc32(payload, length));
- pframe+= pxmitpriv->frag_len;
- pframe = PTR_ALIGN(pframe, 4);
- }
- }
+ arcfour_init(&mycontext, rc4key, 16);
+ arcfour_encrypt(&mycontext, payload, payload, length);
+ arcfour_encrypt(&mycontext, payload + length, crc, 4);
- }
- else{
- RT_TRACE(_module_rtl871x_security_c_, _drv_err_, ("rtw_tkip_encrypt23a: stainfo == NULL!!!\n"));
- DBG_8723A("%s, psta == NUL\n", __func__);
- res = _FAIL;
- }
+ } else {
+ length = (pxmitpriv->frag_len -
+ pattrib->hdrlen -
+ pattrib->iv_len -
+ pattrib->icv_len);
+ *((u32 *)crc) = cpu_to_le32(getcrc32(payload, length));
+ arcfour_init(&mycontext, rc4key, 16);
+ arcfour_encrypt(&mycontext, payload, payload, length);
+ arcfour_encrypt(&mycontext, payload + length, crc, 4);
+
+ pframe += pxmitpriv->frag_len;
+ pframe = PTR_ALIGN(pframe, 4);
+ }
}
return res;
{
u16 pnl;
u32 pnh;
- u8 rc4key[16];
- u8 ttkey[16];
- u8 crc[4];
+ u8 rc4key[16];
+ u8 ttkey[16];
+ u32 actual_crc, expected_crc;
struct arc4context mycontext;
- int length;
- u32 prwskeylen;
- u8 *pframe, *payload, *iv, *prwskey;
+ int length;
+ u32 prwskeylen;
+ u8 *pframe, *payload, *iv, *prwskey;
union pn48 dot11txpn;
- struct sta_info *stainfo;
- struct rx_pkt_attrib *prxattrib = &precvframe->attrib;
- struct security_priv *psecuritypriv = &padapter->securitypriv;
+ struct sta_info *stainfo;
+ struct rx_pkt_attrib *prxattrib = &precvframe->attrib;
+ struct security_priv *psecuritypriv = &padapter->securitypriv;
struct sk_buff *skb = precvframe->pkt;
int res = _SUCCESS;
+ if (prxattrib->encrypt != WLAN_CIPHER_SUITE_TKIP)
+ return _FAIL;
+
pframe = skb->data;
+ stainfo = rtw_get_stainfo23a(&padapter->stapriv,
+ &prxattrib->ta[0]);
+ if (stainfo == NULL) {
+ RT_TRACE(_module_rtl871x_security_c_, _drv_err_,
+ "%s: stainfo == NULL!!!\n", __func__);
+ return _FAIL;
+ }
+
/* 4 start to decrypt recvframe */
- if (prxattrib->encrypt == WLAN_CIPHER_SUITE_TKIP) {
+ if (is_multicast_ether_addr(prxattrib->ra)) {
+ if (psecuritypriv->binstallGrpkey == 0) {
+ res = _FAIL;
+ DBG_8723A("%s:rx bc/mc packets, but didn't install group key!!!!!!!!!!\n", __func__);
+ goto exit;
+ }
+ prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey;
+ prwskeylen = 16;
+ } else {
+ RT_TRACE(_module_rtl871x_security_c_, _drv_err_,
+ "%s: stainfo!= NULL!!!\n", __func__);
+ prwskey = &stainfo->dot118021x_UncstKey.skey[0];
+ prwskeylen = 16;
+ }
- stainfo = rtw_get_stainfo23a(&padapter->stapriv,
- &prxattrib->ta[0]);
- if (stainfo!= NULL) {
-
- if (is_multicast_ether_addr(prxattrib->ra)) {
- if (psecuritypriv->binstallGrpkey == 0) {
- res = _FAIL;
- DBG_8723A("%s:rx bc/mc packets, but didn't install group key!!!!!!!!!!\n", __func__);
- goto exit;
- }
- prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey;
- prwskeylen = 16;
- } else {
- RT_TRACE(_module_rtl871x_security_c_, _drv_err_, ("rtw_tkip_decrypt23a: stainfo!= NULL!!!\n"));
- prwskey = &stainfo->dot118021x_UncstKey.skey[0];
- prwskeylen = 16;
- }
-
- iv = pframe+prxattrib->hdrlen;
- payload = pframe+prxattrib->iv_len+prxattrib->hdrlen;
- length = skb->len - prxattrib->hdrlen-prxattrib->iv_len;
-
- GET_TKIP_PN(iv, dot11txpn);
-
- pnl = (u16)(dot11txpn.val);
- pnh = (u32)(dot11txpn.val>>16);
-
- phase1((u16 *)&ttkey[0], prwskey,&prxattrib->ta[0], pnh);
- phase2(&rc4key[0], prwskey, (unsigned short *)&ttkey[0], pnl);
-
- /* 4 decrypt payload include icv */
- arcfour_init(&mycontext, rc4key, 16);
- arcfour_encrypt(&mycontext, payload, payload, length);
+ iv = pframe + prxattrib->hdrlen;
+ payload = pframe + prxattrib->iv_len + prxattrib->hdrlen;
+ length = skb->len - prxattrib->hdrlen - prxattrib->iv_len;
- *((u32 *)crc) = le32_to_cpu(getcrc32(payload, length-4));
+ GET_TKIP_PN(iv, dot11txpn);
- if (crc[3]!= payload[length-1] || crc[2]!= payload[length-2] || crc[1]!= payload[length-3] || crc[0]!= payload[length-4])
- {
- RT_TRACE(_module_rtl871x_security_c_, _drv_err_, ("rtw_wep_decrypt23a:icv error crc[3](%x)!= payload[length-1](%x) || crc[2](%x)!= payload[length-2](%x) || crc[1](%x)!= payload[length-3](%x) || crc[0](%x)!= payload[length-4](%x)\n",
- crc[3], payload[length-1], crc[2], payload[length-2], crc[1], payload[length-3], crc[0], payload[length-4]));
- res = _FAIL;
- }
- } else {
- RT_TRACE(_module_rtl871x_security_c_, _drv_err_, ("rtw_tkip_decrypt23a: stainfo == NULL!!!\n"));
- res = _FAIL;
- }
+ pnl = (u16)(dot11txpn.val);
+ pnh = (u32)(dot11txpn.val>>16);
+
+ phase1((u16 *)&ttkey[0], prwskey, &prxattrib->ta[0], pnh);
+ phase2(&rc4key[0], prwskey, (unsigned short *)&ttkey[0], pnl);
+
+ /* 4 decrypt payload include icv */
+ arcfour_init(&mycontext, rc4key, 16);
+ arcfour_encrypt(&mycontext, payload, payload, length);
+
+ actual_crc = le32_to_cpu(getcrc32(payload, length - 4));
+ expected_crc = le32_to_cpu(get_unaligned_le32(&payload[length - 4]));
+
+ if (actual_crc != expected_crc) {
+ RT_TRACE(_module_rtl871x_security_c_, _drv_err_,
+ "%s:icv CRC mismatch: "
+ "actual: %08x, expected: %08x\n",
+ __func__, actual_crc, expected_crc);
+ res = _FAIL;
}
+
exit:
return res;
}
{
int i;
- for (i = 0;i<16; i++)
+ for (i = 0; i < 16; i++)
out[i] = a[i] ^ b[i];
}
{
u8 rcon;
u8 sbox_key[4];
- u8 rcon_table[12] =
- {
+ u8 rcon_table[12] = {
0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,
0x1b, 0x36, 0x36, 0x36
};
{
int i;
- for (i = 0; i< 16; i++) {
+ for (i = 0; i < 16; i++)
out[i] = sbox(in[i]);
- }
-
}
static void shift_row(u8 *in, u8 *out)
u8 temp[4];
u8 tempb[4];
- for (i = 0 ; i<4; i++) {
+ for (i = 0; i < 4; i++) {
if ((in[i] & 0x80) == 0x80)
- add1b[i] = 0x1b;
+ add1b[i] = 0x1b;
else
- add1b[i] = 0x00;
+ add1b[i] = 0x00;
}
- swap_halfs[0] = in[2]; /* Swap halfs */
+ swap_halfs[0] = in[2]; /* Swap halfs */
swap_halfs[1] = in[3];
swap_halfs[2] = in[0];
swap_halfs[3] = in[1];
- rotl[0] = in[3]; /* Rotate left 8 bits */
+ rotl[0] = in[3]; /* Rotate left 8 bits */
rotl[1] = in[0];
rotl[2] = in[1];
rotl[3] = in[2];
andf7[2] = in[2] & 0x7f;
andf7[3] = in[3] & 0x7f;
- for (i = 3; i>0; i--) { /* logical shift left 1 bit */
+ for (i = 3; i > 0; i--) { /* logical shift left 1 bit */
andf7[i] = andf7[i] << 1;
- if ((andf7[i-1] & 0x80) == 0x80) {
- andf7[i] = (andf7[i] | 0x01);
- }
+ if ((andf7[i - 1] & 0x80) == 0x80)
+ andf7[i] = (andf7[i] | 0x01);
}
andf7[0] = andf7[0] << 1;
andf7[0] = andf7[0] & 0xfe;
xor_32(in, add1bf7, rotr);
- temp[0] = rotr[0]; /* Rotate right 8 bits */
+ temp[0] = rotr[0]; /* Rotate right 8 bits */
rotr[0] = rotr[1];
rotr[1] = rotr[2];
rotr[2] = rotr[3];
u8 intermediateb[16];
u8 round_key[16];
- for (i = 0; i<16; i++) round_key[i] = key[i];
+ for (i = 0; i < 16; i++)
+ round_key[i] = key[i];
for (round = 0; round < 11; round++) {
if (round == 0) {
- xor_128(round_key, data, ciphertext);
- next_key(round_key, round);
+ xor_128(round_key, data, ciphertext);
+ next_key(round_key, round);
} else if (round == 10) {
- byte_sub(ciphertext, intermediatea);
- shift_row(intermediatea, intermediateb);
- xor_128(intermediateb, round_key, ciphertext);
+ byte_sub(ciphertext, intermediatea);
+ shift_row(intermediatea, intermediateb);
+ xor_128(intermediateb, round_key, ciphertext);
} else { /* 1 - 9 */
- byte_sub(ciphertext, intermediatea);
- shift_row(intermediatea, intermediateb);
- mix_column(&intermediateb[0], &intermediatea[0]);
- mix_column(&intermediateb[4], &intermediatea[4]);
- mix_column(&intermediateb[8], &intermediatea[8]);
- mix_column(&intermediateb[12], &intermediatea[12]);
- xor_128(intermediatea, round_key, ciphertext);
- next_key(round_key, round);
+ byte_sub(ciphertext, intermediatea);
+ shift_row(intermediatea, intermediateb);
+ mix_column(&intermediateb[0], &intermediatea[0]);
+ mix_column(&intermediateb[4], &intermediatea[4]);
+ mix_column(&intermediateb[8], &intermediatea[8]);
+ mix_column(&intermediateb[12], &intermediatea[12]);
+ xor_128(intermediatea, round_key, ciphertext);
+ next_key(round_key, round);
}
}
mic_iv[0] = 0x59;
if (qc_exists && a4_exists)
- mic_iv[1] = mpdu[30] & 0x0f; /* QoS_TC */
+ mic_iv[1] = mpdu[30] & 0x0f; /* QoS_TC */
if (qc_exists && !a4_exists)
- mic_iv[1] = mpdu[24] & 0x0f; /* mute bits 7-4 */
+ mic_iv[1] = mpdu[24] & 0x0f; /* mute bits 7-4 */
if (!qc_exists)
mic_iv[1] = 0x00;
for (i = 2; i < 8; i++)
{
mic_header1[0] = (u8)((header_length - 2) / 256);
mic_header1[1] = (u8)((header_length - 2) % 256);
- mic_header1[2] = mpdu[0] & 0xcf; /* Mute CF poll & CF ack bits */
- mic_header1[3] = mpdu[1] & 0xc7; /* Mute retry, more data and pwr mgt bits */
- mic_header1[4] = mpdu[4]; /* A1 */
+ mic_header1[2] = mpdu[0] & 0xcf; /* Mute CF poll & CF ack bits */
+ mic_header1[3] = mpdu[1] & 0xc7; /* Mute retry, more data and pwr mgt bits */
+ mic_header1[4] = mpdu[4]; /* A1 */
mic_header1[5] = mpdu[5];
mic_header1[6] = mpdu[6];
mic_header1[7] = mpdu[7];
mic_header1[8] = mpdu[8];
mic_header1[9] = mpdu[9];
- mic_header1[10] = mpdu[10]; /* A2 */
+ mic_header1[10] = mpdu[10]; /* A2 */
mic_header1[11] = mpdu[11];
mic_header1[12] = mpdu[12];
mic_header1[13] = mpdu[13];
}
/************************************************/
- /* construct_mic_header2() */
+/* construct_mic_header2() */
/* Builds the last MIC header block from */
/* header fields. */
/************************************************/
{
int i;
- for (i = 0; i<16; i++) mic_header2[i]= 0x00;
+ for (i = 0; i < 16; i++)
+ mic_header2[i] = 0x00;
- mic_header2[0] = mpdu[16]; /* A3 */
+ mic_header2[0] = mpdu[16]; /* A3 */
mic_header2[1] = mpdu[17];
mic_header2[2] = mpdu[18];
mic_header2[3] = mpdu[19];
mic_header2[7] = 0x00; /* mpdu[23]; */
if (!qc_exists && a4_exists) {
- for (i = 0;i<6;i++) mic_header2[8+i] = mpdu[24+i]; /* A4 */
-
+ for (i = 0; i < 6; i++)
+ mic_header2[8+i] = mpdu[24+i]; /* A4 */
}
if (qc_exists && !a4_exists) {
}
if (qc_exists && a4_exists) {
- for (i = 0;i<6;i++) mic_header2[8+i] = mpdu[24+i]; /* A4 */
+ for (i = 0; i < 6; i++)
+ mic_header2[8+i] = mpdu[24+i]; /* A4 */
mic_header2[14] = mpdu[30] & 0x0f;
mic_header2[15] = mpdu[31] & 0x00;
{
int i = 0;
- for (i = 0; i<16; i++) ctr_preload[i] = 0x00;
+ for (i = 0; i < 16; i++)
+ ctr_preload[i] = 0x00;
+
i = 0;
- ctr_preload[0] = 0x01; /* flag */
+ ctr_preload[0] = 0x01; /* flag */
if (qc_exists && a4_exists)
- ctr_preload[1] = mpdu[30] & 0x0f; /* QoC_Control */
+ ctr_preload[1] = mpdu[30] & 0x0f; /* QoC_Control */
if (qc_exists && !a4_exists)
ctr_preload[1] = mpdu[24] & 0x0f;
for (i = 2; i < 8; i++)
- ctr_preload[i] = mpdu[i + 8]; /* ctr_preload[2:7] = A2[0:5] = mpdu[10:15] */
+ ctr_preload[i] = mpdu[i + 8]; /* ctr_preload[2:7] = A2[0:5] = mpdu[10:15] */
for (i = 8; i < 14; i++)
- ctr_preload[i] = pn_vector[13 - i]; /* ctr_preload[8:13] = PN[5:0] */
+ ctr_preload[i] = pn_vector[13 - i]; /* ctr_preload[8:13] = PN[5:0] */
ctr_preload[14] = (unsigned char) (c / 256); /* Ctr */
ctr_preload[15] = (unsigned char) (c % 256);
static int aes_cipher(u8 *key, uint hdrlen, u8 *pframe, uint plen)
{
- uint qc_exists, a4_exists, i, j, payload_remainder,
- num_blocks, payload_index;
+ uint qc_exists, a4_exists, i, j, payload_remainder,
+ num_blocks, payload_index;
u8 pn_vector[6];
u8 mic_iv[16];
u8 mic_header1[16];
} else {
qc_exists = 0;
}
- pn_vector[0]= pframe[hdrlen];
- pn_vector[1]= pframe[hdrlen+1];
- pn_vector[2]= pframe[hdrlen+4];
- pn_vector[3]= pframe[hdrlen+5];
- pn_vector[4]= pframe[hdrlen+6];
- pn_vector[5]= pframe[hdrlen+7];
+ pn_vector[0] = pframe[hdrlen];
+ pn_vector[1] = pframe[hdrlen + 1];
+ pn_vector[2] = pframe[hdrlen + 4];
+ pn_vector[3] = pframe[hdrlen + 5];
+ pn_vector[4] = pframe[hdrlen + 6];
+ pn_vector[5] = pframe[hdrlen + 7];
construct_mic_iv(mic_iv, qc_exists, a4_exists, pframe, plen, pn_vector);
num_blocks = plen / 16;
/* Find start of payload */
- payload_index = (hdrlen + 8);
+ payload_index = hdrlen + 8;
/* Calculate MIC */
aes128k128d(key, mic_iv, aes_out);
/* Insert MIC into payload */
for (j = 0; j < 8; j++)
- pframe[payload_index+j] = mic[j];
+ pframe[payload_index + j] = mic[j];
payload_index = hdrlen + 8;
for (i = 0; i < num_blocks; i++) {
construct_ctr_preload(ctr_preload, a4_exists, qc_exists,
- pframe, pn_vector, i+1);
+ pframe, pn_vector, i + 1);
aes128k128d(key, ctr_preload, aes_out);
bitwise_xor(aes_out, &pframe[payload_index], chain_buffer);
for (j = 0; j < 16; j++)
* encrypt it and copy the unpadded part back
*/
construct_ctr_preload(ctr_preload, a4_exists, qc_exists, pframe,
- pn_vector, num_blocks+1);
+ pn_vector, num_blocks + 1);
for (j = 0; j < 16; j++)
padded_buffer[j] = 0x00;
for (j = 0; j < payload_remainder; j++)
- padded_buffer[j] = pframe[payload_index+j];
+ padded_buffer[j] = pframe[payload_index + j];
aes128k128d(key, ctr_preload, aes_out);
bitwise_xor(aes_out, padded_buffer, chain_buffer);
- for (j = 0; j < payload_remainder;j++)
+ for (j = 0; j < payload_remainder; j++)
pframe[payload_index++] = chain_buffer[j];
}
for (j = 0; j < 16; j++)
padded_buffer[j] = 0x00;
for (j = 0; j < 8; j++)
- padded_buffer[j] = pframe[j+hdrlen+8+plen];
+ padded_buffer[j] = pframe[j + hdrlen + 8 + plen];
aes128k128d(key, ctr_preload, aes_out);
bitwise_xor(aes_out, padded_buffer, chain_buffer);
- for (j = 0; j < 8;j++)
+ for (j = 0; j < 8; j++)
pframe[payload_index++] = chain_buffer[j];
return _SUCCESS;
int rtw_aes_encrypt23a(struct rtw_adapter *padapter,
struct xmit_frame *pxmitframe)
-{ /* exclude ICV */
+{ /* exclude ICV */
/* Intermediate Buffers */
int curfragnum, length;
u32 prwskeylen;
- u8 *pframe, *prwskey; /* *payload,*iv */
+ u8 *pframe, *prwskey;
u8 hw_hdr_offset = 0;
struct sta_info *stainfo;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
if (!stainfo) {
RT_TRACE(_module_rtl871x_security_c_, _drv_err_,
- ("rtw_aes_encrypt23a: stainfo == NULL!!!\n"));
+ "%s: stainfo == NULL!!!\n", __func__);
DBG_8723A("%s, psta == NUL\n", __func__);
res = _FAIL;
goto out;
}
- if (!(stainfo->state &_FW_LINKED)) {
+ if (!(stainfo->state & _FW_LINKED)) {
DBG_8723A("%s, psta->state(0x%x) != _FW_LINKED\n",
__func__, stainfo->state);
return _FAIL;
}
RT_TRACE(_module_rtl871x_security_c_, _drv_err_,
- ("rtw_aes_encrypt23a: stainfo!= NULL!!!\n"));
+ "%s: stainfo!= NULL!!!\n", __func__);
if (is_multicast_ether_addr(pattrib->ra))
prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey;
return res;
}
-static int aes_decipher(u8 *key, uint hdrlen,
- u8 *pframe, uint plen)
+static int aes_decipher(u8 *key, uint hdrlen, u8 *pframe, uint plen)
{
- static u8 message[MAX_MSG_SIZE];
- uint qc_exists, a4_exists, i, j, payload_remainder,
- num_blocks, payload_index;
+ static u8 message[MAX_MSG_SIZE];
+ uint qc_exists, a4_exists, i, j, payload_remainder,
+ num_blocks, payload_index;
int res = _SUCCESS;
u8 pn_vector[6];
u8 mic_iv[16];
/* start to decrypt the payload */
- num_blocks = (plen-8) / 16; /* plen including llc, payload_length and mic) */
+ num_blocks = (plen - 8) / 16; /* plen including llc, payload_length and mic) */
- payload_remainder = (plen-8) % 16;
+ payload_remainder = (plen - 8) % 16;
pn_vector[0] = pframe[hdrlen];
- pn_vector[1] = pframe[hdrlen+1];
- pn_vector[2] = pframe[hdrlen+4];
- pn_vector[3] = pframe[hdrlen+5];
- pn_vector[4] = pframe[hdrlen+6];
- pn_vector[5] = pframe[hdrlen+7];
+ pn_vector[1] = pframe[hdrlen + 1];
+ pn_vector[2] = pframe[hdrlen + 4];
+ pn_vector[3] = pframe[hdrlen + 5];
+ pn_vector[4] = pframe[hdrlen + 6];
+ pn_vector[5] = pframe[hdrlen + 7];
if ((hdrlen == sizeof(struct ieee80211_hdr_3addr) ||
(hdrlen == sizeof(struct ieee80211_qos_hdr))))
qc_exists = 0;
}
- /* now, decrypt pframe with hdrlen offset and plen long */
+ /* now, decrypt pframe with hdrlen offset and plen long */
payload_index = hdrlen + 8; /* 8 is for extiv */
for (i = 0; i < num_blocks; i++) {
construct_ctr_preload(ctr_preload, a4_exists, qc_exists,
- pframe, pn_vector, i+1);
+ pframe, pn_vector, i + 1);
aes128k128d(key, ctr_preload, aes_out);
bitwise_xor(aes_out, &pframe[payload_index], chain_buffer);
* encrypt it and copy the unpadded part back
*/
construct_ctr_preload(ctr_preload, a4_exists, qc_exists, pframe,
- pn_vector, num_blocks+1);
+ pn_vector, num_blocks + 1);
for (j = 0; j < 16; j++)
padded_buffer[j] = 0x00;
for (j = 0; j < payload_remainder; j++)
- padded_buffer[j] = pframe[payload_index+j];
+ padded_buffer[j] = pframe[payload_index + j];
aes128k128d(key, ctr_preload, aes_out);
bitwise_xor(aes_out, padded_buffer, chain_buffer);
for (j = 0; j < payload_remainder; j++)
}
/* start to calculate the mic */
- if ((hdrlen +plen+8) <= MAX_MSG_SIZE)
- memcpy(message, pframe, (hdrlen+plen+8)); /* 8 is for ext iv len */
+ if ((hdrlen + plen + 8) <= MAX_MSG_SIZE)
+ memcpy(message, pframe, (hdrlen + plen + 8)); /* 8 is for ext iv len */
pn_vector[0] = pframe[hdrlen];
- pn_vector[1] = pframe[hdrlen+1];
- pn_vector[2] = pframe[hdrlen+4];
- pn_vector[3] = pframe[hdrlen+5];
- pn_vector[4] = pframe[hdrlen+6];
- pn_vector[5] = pframe[hdrlen+7];
+ pn_vector[1] = pframe[hdrlen + 1];
+ pn_vector[2] = pframe[hdrlen + 4];
+ pn_vector[3] = pframe[hdrlen + 5];
+ pn_vector[4] = pframe[hdrlen + 6];
+ pn_vector[5] = pframe[hdrlen + 7];
construct_mic_iv(mic_iv, qc_exists, a4_exists, message,
- plen-8, pn_vector);
+ plen - 8, pn_vector);
construct_mic_header1(mic_header1, hdrlen, message);
construct_mic_header2(mic_header2, message, a4_exists, qc_exists);
- payload_remainder = (plen-8) % 16;
- num_blocks = (plen-8) / 16;
+ payload_remainder = (plen - 8) % 16;
+ num_blocks = (plen - 8) / 16;
/* Find start of payload */
- payload_index = (hdrlen + 8);
+ payload_index = hdrlen + 8;
/* Calculate MIC */
aes128k128d(key, mic_iv, aes_out);
for (j = 0; j < 16; j++)
padded_buffer[j] = 0x00;
for (j = 0; j < payload_remainder; j++)
- padded_buffer[j] = message[payload_index++];
+ padded_buffer[j] = message[payload_index++];
bitwise_xor(aes_out, padded_buffer, chain_buffer);
aes128k128d(key, chain_buffer, aes_out);
}
/* Insert MIC into payload */
for (j = 0; j < 8; j++)
- message[payload_index+j] = mic[j];
+ message[payload_index + j] = mic[j];
payload_index = hdrlen + 8;
- for (i = 0; i< num_blocks; i++) {
+ for (i = 0; i < num_blocks; i++) {
construct_ctr_preload(ctr_preload, a4_exists, qc_exists,
- message, pn_vector, i+1);
+ message, pn_vector, i + 1);
aes128k128d(key, ctr_preload, aes_out);
bitwise_xor(aes_out, &message[payload_index], chain_buffer);
for (j = 0; j < 16; j++)
* encrypt it and copy the unpadded part back
*/
construct_ctr_preload(ctr_preload, a4_exists, qc_exists,
- message, pn_vector, num_blocks+1);
+ message, pn_vector, num_blocks + 1);
for (j = 0; j < 16; j++)
- padded_buffer[j] = 0x00;
+ padded_buffer[j] = 0x00;
for (j = 0; j < payload_remainder; j++)
- padded_buffer[j] = message[payload_index+j];
+ padded_buffer[j] = message[payload_index + j];
aes128k128d(key, ctr_preload, aes_out);
bitwise_xor(aes_out, padded_buffer, chain_buffer);
for (j = 0; j < payload_remainder; j++)
for (j = 0; j < 16; j++)
padded_buffer[j] = 0x00;
for (j = 0; j < 8; j++)
- padded_buffer[j] = message[j+hdrlen+8+plen-8];
+ padded_buffer[j] = message[j + hdrlen + 8 + plen - 8];
aes128k128d(key, ctr_preload, aes_out);
bitwise_xor(aes_out, padded_buffer, chain_buffer);
/* compare the mic */
for (i = 0; i < 8; i++) {
- if (pframe[hdrlen+8+plen-8+i] != message[hdrlen+8+plen-8+i]) {
+ if (pframe[hdrlen + 8 + plen - 8 + i] != message[hdrlen + 8 + plen - 8 + i]) {
RT_TRACE(_module_rtl871x_security_c_, _drv_err_,
- ("aes_decipher:mic check error mic[%d]: pframe(%x) != message(%x)\n",
- i, pframe[hdrlen+8+plen-8+i], message[hdrlen+8+plen-8+i]));
- DBG_8723A("aes_decipher:mic check error mic[%d]: pframe(%x) != message(%x)\n",
- i, pframe[hdrlen+8+plen-8+i], message[hdrlen+8+plen-8+i]);
+ "%s:mic check error mic[%d]: pframe(%x) != message(%x)\n",
+ __func__, i,
+ pframe[hdrlen + 8 + plen - 8 + i],
+ message[hdrlen + 8 + plen - 8 + i]);
+ DBG_8723A("%s:mic check error mic[%d]: pframe(%x) != message(%x)\n",
+ __func__, i,
+ pframe[hdrlen + 8 + plen - 8 + i],
+ message[hdrlen + 8 + plen - 8 + i]);
res = _FAIL;
}
}
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct sk_buff *skb = precvframe->pkt;
int length;
- u8 *pframe, *prwskey; /* *payload,*iv */
+ u8 *pframe, *prwskey;
int res = _SUCCESS;
pframe = skb->data;
stainfo = rtw_get_stainfo23a(&padapter->stapriv, &prxattrib->ta[0]);
if (!stainfo) {
RT_TRACE(_module_rtl871x_security_c_, _drv_err_,
- ("rtw_aes_encrypt23a: stainfo == NULL!!!\n"));
+ "%s: stainfo == NULL!!!\n", __func__);
res = _FAIL;
goto exit;
}
RT_TRACE(_module_rtl871x_security_c_, _drv_err_,
- ("rtw_aes_decrypt23a: stainfo!= NULL!!!\n"));
+ "%s: stainfo!= NULL!!!\n", __func__);
if (is_multicast_ether_addr(prxattrib->ra)) {
- /* in concurrent we should use sw decrypt in group key,
- so we remove this message */
+ /* in concurrent we should use sw decrypt in
+ * group key, so we remove this message
+ */
if (!psecuritypriv->binstallGrpkey) {
res = _FAIL;
DBG_8723A("%s:rx bc/mc packets, but didn't install "
{
struct rtw_adapter *padapter = (struct rtw_adapter *)FunctionContext;
- RT_TRACE(_module_rtl871x_security_c_, _drv_err_, ("^^^rtw_use_tkipkey_handler23a ^^^\n"));
+ RT_TRACE(_module_rtl871x_security_c_, _drv_err_,
+ "^^^%s ^^^\n", __func__);
padapter->securitypriv.busetkipkey = 1;
RT_TRACE(_module_rtl871x_security_c_, _drv_err_,
- ("^^^rtw_use_tkipkey_handler23a padapter->securitypriv.busetkipkey =%d^^^\n",
- padapter->securitypriv.busetkipkey));
+ "^^^%s padapter->securitypriv.busetkipkey =%d^^^\n",
+ __func__, padapter->securitypriv.busetkipkey);
}
index = wifi_mac_hash(hwaddr);
RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_info_,
- ("rtw_alloc_stainfo23a: index = %x", index));
+ "rtw_alloc_stainfo23a: index = %x\n", index);
if (index >= NUM_STA) {
RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_err_,
- ("ERROR => rtw_alloc_stainfo23a: index >= NUM_STA"));
+ "ERROR => rtw_alloc_stainfo23a: index >= NUM_STA\n");
psta = NULL;
goto exit;
}
&wRxSeqInitialValue, 2);
RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_info_,
- ("alloc number_%d stainfo with hwaddr = %pM\n",
- pstapriv->asoc_sta_count, hwaddr));
+ "alloc number_%d stainfo with hwaddr = %pM\n",
+ pstapriv->asoc_sta_count, hwaddr);
init_addba_retry_timer23a(psta);
list_del_init(&psta->hash_list);
RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_err_,
- ("\n free number_%d stainfo with hwaddr = 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x\n",
- pstapriv->asoc_sta_count, psta->hwaddr[0],
- psta->hwaddr[1], psta->hwaddr[2], psta->hwaddr[3],
- psta->hwaddr[4], psta->hwaddr[5]));
+ "free number_%d stainfo with hwaddr = %pM\n",
+ pstapriv->asoc_sta_count, psta->hwaddr);
pstapriv->asoc_sta_count--;
/* re-init sta_info; 20061114 will be init in alloc_stainfo */
if (psta == NULL) {
res = _FAIL;
RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_err_,
- ("rtw_alloc_stainfo23a fail"));
+ "rtw_alloc_stainfo23a fail\n");
return res;
}
/* default broadcast & multicast use macid 1 */
}
if (!ether_addr_equal(cur_network->network.MacAddress, mgmt->bssid)) {
- DBG_8723A("%s: linked but recv other bssid bcn"
- MAC_FMT MAC_FMT "\n", __func__, MAC_ARG(mgmt->bssid),
- MAC_ARG(cur_network->network.MacAddress));
+ DBG_8723A("%s: linked but recv other bssid bcn %pM %pM\n",
+ __func__, mgmt->bssid,
+ cur_network->network.MacAddress);
return _FAIL;
}
}
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("%s bssid.Ssid.Ssid:%s bssid.Ssid.SsidLength:%d "
- "cur_network->network.Ssid.Ssid:%s len:%d\n", __func__,
- ssid, ssid_len, cur_network->network.Ssid.ssid,
- cur_network->network.Ssid.ssid_len));
+ "%s bssid.Ssid.Ssid:%s bssid.Ssid.SsidLength:%d cur_network->network.Ssid.Ssid:%s len:%d\n",
+ __func__, ssid, ssid_len, cur_network->network.Ssid.ssid,
+ cur_network->network.Ssid.ssid_len);
if (ssid_len != cur_network->network.Ssid.ssid_len || ssid_len > 32 ||
(ssid_len &&
privacy = 0;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("%s(): cur_network->network.Privacy is %d, bssid.Privacy "
- "is %d\n", __func__, cur_network->network.Privacy, privacy));
+ "%s(): cur_network->network.Privacy is %d, bssid.Privacy is %d\n",
+ __func__, cur_network->network.Privacy, privacy);
if (cur_network->network.Privacy != privacy) {
DBG_8723A("%s(), privacy is not match return FAIL\n", __func__);
goto _mismatch;
&pairwise_cipher, &is_8021x);
if (r == _SUCCESS)
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("%s pnetwork->pairwise_cipher: %d, "
- "pnetwork->group_cipher: %d, is_802x "
- ": %d\n", __func__, pairwise_cipher,
- group_cipher, is_8021x));
+ "%s pnetwork->pairwise_cipher: %d, pnetwork->group_cipher: %d, is_802x : %d\n",
+ __func__, pairwise_cipher,
+ group_cipher, is_8021x);
}
} else {
p = cfg80211_find_vendor_ie(WLAN_OUI_MICROSOFT,
&pairwise_cipher, &is_8021x);
if (r == _SUCCESS)
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("%s pnetwork->pairwise_cipher: %d, "
- "group_cipher is %d, is_8021x is "
- "%d\n", __func__, pairwise_cipher,
- group_cipher, is_8021x));
+ "%s pnetwork->pairwise_cipher: %d, group_cipher is %d, is_8021x is %d\n",
+ __func__, pairwise_cipher,
+ group_cipher, is_8021x);
} else {
if (privacy)
crypto = ENCRYP_PROTOCOL_WEP;
if (crypto == ENCRYP_PROTOCOL_WPA || crypto == ENCRYP_PROTOCOL_WPA2) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("%s cur_network->group_cipher is %d: %d\n", __func__,
- cur_network->BcnInfo.group_cipher, group_cipher));
+ "%s cur_network->group_cipher is %d: %d\n", __func__,
+ cur_network->BcnInfo.group_cipher, group_cipher);
if (pairwise_cipher != cur_network->BcnInfo.pairwise_cipher ||
group_cipher != cur_network->BcnInfo.group_cipher) {
DBG_8723A("%s pairwise_cipher(%x:%x) or group_cipher "
/* 67 : UDP BOOTP server */
RT_TRACE(_module_rtl871x_xmit_c_,
_drv_err_,
- ("======================"
- "update_attrib: get DHCP "
- "Packet\n"));
+ "======================update_attrib: get DHCP Packet\n");
pattrib->dhcp_pkt = 1;
}
}
psta = rtw_get_stainfo23a(pstapriv, pattrib->ra);
if (psta == NULL) { /* if we cannot get psta => drrp the pkt */
RT_TRACE(_module_rtl871x_xmit_c_, _drv_alert_,
- ("\nupdate_attrib => get sta_info fail, ra:"
- MAC_FMT"\n", MAC_ARG(pattrib->ra)));
+ "update_attrib => get sta_info fail, ra:%pM\n",
+ pattrib->ra);
res = _FAIL;
goto exit;
} else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) &&
} else {
/* if we cannot get psta => drop the pkt */
RT_TRACE(_module_rtl871x_xmit_c_, _drv_alert_,
- ("\nupdate_attrib => get sta_info fail, ra:" MAC_FMT
- "\n", MAC_ARG(pattrib->ra)));
+ "update_attrib => get sta_info fail, ra:%pM\n",
+ pattrib->ra);
res = _FAIL;
goto exit;
}
if (psta->ieee8021x_blocked == true) {
RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
- ("\n psta->ieee8021x_blocked == true\n"));
+ "psta->ieee8021x_blocked == true\n");
pattrib->encrypt = 0;
if ((pattrib->ether_type != ETH_P_PAE) &&
!check_fwstate(pmlmepriv, WIFI_MP_STATE)) {
RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
- ("\npsta->ieee8021x_blocked == true, "
- "pattrib->ether_type(%.4x) != 0x888e\n",
- pattrib->ether_type));
+ "psta->ieee8021x_blocked == true, pattrib->ether_type(%.4x) != 0x888e\n",
+ pattrib->ether_type);
res = _FAIL;
goto exit;
}
if (!padapter->securitypriv.busetkipkey) {
RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
- ("\npadapter->securitypriv.busetkip"
- "key(%d) == false drop packet\n",
- padapter->securitypriv.busetkipkey));
+ "padapter->securitypriv.busetkipkey(%d) == false drop packet\n",
+ padapter->securitypriv.busetkipkey);
res = _FAIL;
goto exit;
}
break;
case WLAN_CIPHER_SUITE_CCMP:
RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
- ("pattrib->encrypt =%d (WLAN_CIPHER_SUITE_CCMP)\n",
- pattrib->encrypt));
+ "pattrib->encrypt =%d (WLAN_CIPHER_SUITE_CCMP)\n",
+ pattrib->encrypt);
pattrib->iv_len = IEEE80211_CCMP_HDR_LEN;
pattrib->icv_len = IEEE80211_CCMP_MIC_LEN;
break;
}
RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
- ("update_attrib: encrypt =%d\n", pattrib->encrypt));
+ "update_attrib: encrypt =%d\n", pattrib->encrypt);
if (pattrib->encrypt && !psecuritypriv->hw_decrypted) {
pattrib->bswenc = true;
RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
- ("update_attrib: encrypt =%d bswenc = true\n",
- pattrib->encrypt));
+ "update_attrib: encrypt =%d bswenc = true\n",
+ pattrib->encrypt);
} else {
pattrib->bswenc = false;
RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
- ("update_attrib: bswenc = false\n"));
+ "update_attrib: bswenc = false\n");
}
update_attrib_phy_info(pattrib, psta);
curfragnum++) {
payload = PTR_ALIGN(payload, 4);
RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
- ("=== curfragnum =%d, pframe = 0x%.2x, "
- "0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x"
- "%.2x, 0x%.2x, 0x%.2x,!!!\n",
- curfragnum, *payload, *(payload + 1),
- *(payload + 2), *(payload + 3),
- *(payload + 4), *(payload + 5),
- *(payload + 6), *(payload + 7)));
+ "=== curfragnum =%d, pframe = 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x,!!!\n",
+ curfragnum, *payload, *(payload + 1),
+ *(payload + 2), *(payload + 3),
+ *(payload + 4), *(payload + 5),
+ *(payload + 6), *(payload + 7));
payload = payload + pattrib->hdrlen +
pattrib->iv_len;
RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
- ("curfragnum =%d pattrib->hdrlen =%d "
- "pattrib->iv_len =%d", curfragnum,
- pattrib->hdrlen, pattrib->iv_len));
+ "curfragnum =%d pattrib->hdrlen =%d pattrib->iv_len =%d\n",
+ curfragnum,
+ pattrib->hdrlen, pattrib->iv_len);
if ((curfragnum + 1) == pattrib->nr_frags) {
length = pattrib->last_txcmdsz -
pattrib->hdrlen -
pattrib->icv_len;
RT_TRACE(_module_rtl871x_xmit_c_,
_drv_err_,
- ("curfragnum =%d length =%d "
- "pattrib->icv_len =%d",
- curfragnum, length,
- pattrib->icv_len));
+ "curfragnum =%d length =%d pattrib->icv_len =%d\n",
+ curfragnum, length,
+ pattrib->icv_len);
}
}
rtw_secgetmic23a(&micdata, &mic[0]);
RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
- ("xmitframe_addmic: before add mic code!!\n"));
+ "xmitframe_addmic: before add mic code!!\n");
RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
- ("xmitframe_addmic: pattrib->last_txcmdsz ="
- "%d!!!\n", pattrib->last_txcmdsz));
+ "xmitframe_addmic: pattrib->last_txcmdsz =%d!!!\n",
+ pattrib->last_txcmdsz);
RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
- ("xmitframe_addmic: mic[0]= 0x%.2x , mic[1]="
- "0x%.2x , mic[2]= 0x%.2x , mic[3]= 0x%.2x\n"
- "mic[4]= 0x%.2x , mic[5]= 0x%.2x , mic[6]= 0x%.2x "
- ", mic[7]= 0x%.2x !!!!\n", mic[0], mic[1],
- mic[2], mic[3], mic[4], mic[5], mic[6],
- mic[7]));
+ "xmitframe_addmic: mic[0]= 0x%.2x , mic[1]=0x%.2x , mic[2]= 0x%.2x , mic[3]= 0x%.2x\nmic[4]= 0x%.2x , mic[5]= 0x%.2x , mic[6]= 0x%.2x , mic[7]= 0x%.2x !!!!\n",
+ mic[0], mic[1], mic[2], mic[3],
+ mic[4], mic[5], mic[6], mic[7]);
/* add mic code and add the mic code length
in last_txcmdsz */
pattrib->last_txcmdsz += 8;
RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
- ("\n ======== last pkt ========\n"));
+ "======== last pkt ========\n");
payload = payload - pattrib->last_txcmdsz + 8;
for (curfragnum = 0; curfragnum < pattrib->last_txcmdsz;
- curfragnum = curfragnum + 8)
+ curfragnum = curfragnum + 8) {
RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
- (" %.2x, %.2x, %.2x, %.2x, %.2x, "
- " %.2x, %.2x, %.2x ",
- *(payload + curfragnum),
- *(payload + curfragnum + 1),
- *(payload + curfragnum + 2),
- *(payload + curfragnum + 3),
- *(payload + curfragnum + 4),
- *(payload + curfragnum + 5),
- *(payload + curfragnum + 6),
- *(payload + curfragnum + 7)));
- } else {
- RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
- ("xmitframe_addmic: rtw_get_stainfo23a =="
- "NULL!!!\n"));
+ "%.2x, %.2x, %.2x, %.2x, %.2x, %.2x, %.2x, %.2x\n",
+ *(payload + curfragnum),
+ *(payload + curfragnum + 1),
+ *(payload + curfragnum + 2),
+ *(payload + curfragnum + 3),
+ *(payload + curfragnum + 4),
+ *(payload + curfragnum + 5),
+ *(payload + curfragnum + 6),
+ *(payload + curfragnum + 7));
+ }
+ } else {
+ RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
+ "xmitframe_addmic: rtw_get_stainfo23a ==NULL!!!\n");
}
}
if (pattrib->bswenc) {
/* DBG_8723A("start xmitframe_swencrypt\n"); */
RT_TRACE(_module_rtl871x_xmit_c_, _drv_alert_,
- ("### xmitframe_swencrypt\n"));
+ "### xmitframe_swencrypt\n");
switch (pattrib->encrypt) {
case WLAN_CIPHER_SUITE_WEP40:
case WLAN_CIPHER_SUITE_WEP104:
} else {
RT_TRACE(_module_rtl871x_xmit_c_, _drv_notice_,
- ("### xmitframe_hwencrypt\n"));
+ "### xmitframe_hwencrypt\n");
}
return _SUCCESS;
qos_option = true;
}
else {
- RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("fw_state:%x is not allowed to xmit frame\n", get_fwstate(pmlmepriv)));
+ RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
+ "fw_state:%x is not allowed to xmit frame\n",
+ get_fwstate(pmlmepriv));
res = _FAIL;
goto exit;
}
if (rtw_make_wlanhdr(padapter, mem_start, pattrib) == _FAIL) {
RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
- ("%s: rtw_make_wlanhdr fail; drop pkt\n", __func__));
+ "%s: rtw_make_wlanhdr fail; drop pkt\n", __func__);
res = _FAIL;
goto exit;
}
memcpy(pframe, pattrib->iv, pattrib->iv_len);
RT_TRACE(_module_rtl871x_xmit_c_, _drv_notice_,
- ("rtw_xmiaframe_coalesce23a: keyid =%d pattrib"
- "->iv[3]=%.2x pframe =%.2x %.2x %.2x %.2x\n",
- padapter->securitypriv.dot11PrivacyKeyIndex,
- pattrib->iv[3], *pframe, *(pframe+1),
- *(pframe+2), *(pframe+3)));
+ "rtw_xmiaframe_coalesce23a: keyid =%d pattrib->iv[3]=%.2x pframe =%.2x %.2x %.2x %.2x\n",
+ padapter->securitypriv.dot11PrivacyKeyIndex,
+ pattrib->iv[3], *pframe, *(pframe+1),
+ *(pframe+2), *(pframe+3));
pframe += pattrib->iv_len;
mpdu_len -= pattrib->iv_len;
}
break;
} else {
RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
- ("%s: There're still something in packet!\n",
- __func__));
+ "%s: There're still something in packet!\n",
+ __func__);
}
hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREFRAGS);
if (xmitframe_addmic(padapter, pxmitframe) == _FAIL) {
RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
- ("xmitframe_addmic(padapter, pxmitframe) == _FAIL\n"));
+ "xmitframe_addmic(padapter, pxmitframe) == _FAIL\n");
DBG_8723A("xmitframe_addmic(padapter, pxmitframe) == _FAIL\n");
res = _FAIL;
goto exit;
if (list_empty(&pfree_xmit_queue->queue)) {
RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
- ("rtw_alloc_xmitframe:%d\n",
- pxmitpriv->free_xmitframe_cnt));
+ "rtw_alloc_xmitframe:%d\n",
+ pxmitpriv->free_xmitframe_cnt);
pxframe = NULL;
} else {
phead = get_list_head(pfree_xmit_queue);
list_del_init(&pxframe->list);
pxmitpriv->free_xmitframe_cnt--;
RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
- ("rtw_alloc_xmitframe():free_xmitframe_cnt =%d\n",
- pxmitpriv->free_xmitframe_cnt));
+ "rtw_alloc_xmitframe():free_xmitframe_cnt =%d\n",
+ pxmitpriv->free_xmitframe_cnt);
}
spin_unlock_bh(&pfree_xmit_queue->lock);
spin_lock_bh(&queue->lock);
if (list_empty(&queue->queue)) {
- RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_alloc_xmitframe23a_ext:%d\n", pxmitpriv->free_xframe_ext_cnt));
+ RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
+ "rtw_alloc_xmitframe23a_ext:%d\n",
+ pxmitpriv->free_xframe_ext_cnt);
pxframe = NULL;
} else {
phead = get_list_head(queue);
list_del_init(&pxframe->list);
pxmitpriv->free_xframe_ext_cnt--;
- RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_alloc_xmitframe23a_ext():free_xmitframe_cnt =%d\n", pxmitpriv->free_xframe_ext_cnt));
+ RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
+ "rtw_alloc_xmitframe23a_ext():free_xmitframe_cnt =%d\n",
+ pxmitpriv->free_xframe_ext_cnt);
}
spin_unlock_bh(&queue->lock);
struct sk_buff *pndis_pkt = NULL;
if (pxmitframe == NULL) {
- RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("====== rtw_free_xmitframe23a():pxmitframe == NULL!!!!!!!!!!\n"));
+ RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
+ "====== rtw_free_xmitframe23a():pxmitframe == NULL!!!!!!!!!!\n");
goto exit;
}
list_add_tail(&pxmitframe->list, get_list_head(queue));
if (pxmitframe->ext_tag == 0) {
pxmitpriv->free_xmitframe_cnt++;
- RT_TRACE(_module_rtl871x_xmit_c_, _drv_debug_, ("rtw_free_xmitframe23a():free_xmitframe_cnt =%d\n", pxmitpriv->free_xmitframe_cnt));
+ RT_TRACE(_module_rtl871x_xmit_c_, _drv_debug_,
+ "rtw_free_xmitframe23a():free_xmitframe_cnt =%d\n",
+ pxmitpriv->free_xmitframe_cnt);
} else if (pxmitframe->ext_tag == 1) {
pxmitpriv->free_xframe_ext_cnt++;
- RT_TRACE(_module_rtl871x_xmit_c_, _drv_debug_, ("rtw_free_xmitframe23a():free_xframe_ext_cnt =%d\n", pxmitpriv->free_xframe_ext_cnt));
+ RT_TRACE(_module_rtl871x_xmit_c_, _drv_debug_,
+ "rtw_free_xmitframe23a():free_xframe_ext_cnt =%d\n",
+ pxmitpriv->free_xframe_ext_cnt);
}
spin_unlock_bh(&queue->lock);
{
if (rtw_xmit23a_classifier(padapter, pxmitframe) == _FAIL) {
RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
- ("rtw_xmitframe_enqueue23a: drop xmit pkt for "
- "classifier fail\n"));
+ "rtw_xmitframe_enqueue23a: drop xmit pkt for classifier fail\n");
return _FAIL;
}
case 2:
ptxservq = &psta->sta_xmitpriv.bk_q;
*(ac) = 3;
- RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_get_sta_pending23a : BK\n"));
+ RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
+ "rtw_get_sta_pending23a : BK\n");
break;
case 4:
case 5:
ptxservq = &psta->sta_xmitpriv.vi_q;
*(ac) = 1;
- RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_get_sta_pending23a : VI\n"));
+ RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
+ "rtw_get_sta_pending23a : VI\n");
break;
case 6:
case 7:
ptxservq = &psta->sta_xmitpriv.vo_q;
*(ac) = 0;
- RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_get_sta_pending23a : VO\n"));
+ RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
+ "rtw_get_sta_pending23a : VO\n");
break;
case 0:
case 3:
default:
ptxservq = &psta->sta_xmitpriv.be_q;
*(ac) = 2;
- RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_get_sta_pending23a : BE\n"));
+ RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
+ "rtw_get_sta_pending23a : BE\n");
break;
}
return ptxservq;
res = _FAIL;
DBG_8723A("rtw_xmit23a_classifier: psta == NULL\n");
RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
- ("rtw_xmit23a_classifier: psta == NULL\n"));
+ "rtw_xmit23a_classifier: psta == NULL\n");
goto exit;
}
if (!(psta->state & _FW_LINKED)) {
if (pxmitframe == NULL) {
RT_TRACE(_module_xmit_osdep_c_, _drv_err_,
- ("rtw_xmit23a: no more pxmitframe\n"));
+ "rtw_xmit23a: no more pxmitframe\n");
return -1;
}
res = update_attrib(padapter, skb, &pxmitframe->attrib);
if (res == _FAIL) {
- RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("rtw_xmit23a: update attrib fail\n"));
+ RT_TRACE(_module_xmit_osdep_c_, _drv_err_,
+ "rtw_xmit23a: update attrib fail\n");
rtw_free_xmitframe23a(pxmitpriv, pxmitframe);
return -1;
}
#define DPK_DELTA_MAPPING_NUM 13
#define index_mapping_HP_NUM 15
/* 091212 chiyokolin */
-static void
-odm_TXPowerTrackingCallback_ThermalMeter_92C(
- struct rtw_adapter *Adapter)
+static void
+odm_TXPowerTrackingCallback_ThermalMeter_92C(struct rtw_adapter *Adapter)
{
struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
s8 OFDM_index[2], CCK_index = 0, OFDM_index_old[2] = {0};
s8 CCK_index_old = 0;
int i = 0;
- bool is2T = IS_92C_SERIAL(pHalData->VersionID);
u8 OFDM_min_index = 6, rf; /* OFDM BB Swing should be less than +3.0dB*/
u8 ThermalValue_HP_count = 0;
u32 ThermalValue_HP = 0;
rtl8723a_phy_ap_calibrate(Adapter, (ThermalValue -
pHalData->EEPROMThermalMeter));
- if (is2T)
+ if (pHalData->rf_type == RF_2T2R)
rf = 2;
else
rf = 1;
if (ThermalValue) {
/* Query OFDM path A default setting */
- ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance,
- bMaskDWord)&bMaskOFDM_D;
+ ele_D = rtl8723au_read32(Adapter, rOFDM0_XATxIQImbalance) &
+ bMaskOFDM_D;
for (i = 0; i < OFDM_TABLE_SIZE_92C; i++) {
/* find the index */
if (ele_D == (OFDMSwingTable23A[i]&bMaskOFDM_D)) {
}
/* Query OFDM path B default setting */
- if (is2T) {
- ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XBTxIQImbalance,
- bMaskDWord)&bMaskOFDM_D;
+ if (pHalData->rf_type == RF_2T2R) {
+ ele_D = rtl8723au_read32(Adapter,
+ rOFDM0_XBTxIQImbalance);
+ ele_D &= bMaskOFDM_D;
for (i = 0; i < OFDM_TABLE_SIZE_92C; i++) { /* find the index */
if (ele_D == (OFDMSwingTable23A[i]&bMaskOFDM_D)) {
OFDM_index_old[1] = (u8)i;
}
/* Query CCK default setting From 0xa24 */
- TempCCk = PHY_QueryBBReg(Adapter, rCCK0_TxFilter2,
- bMaskDWord)&bMaskCCK;
+ TempCCk = rtl8723au_read32(Adapter, rCCK0_TxFilter2) & bMaskCCK;
for (i = 0 ; i < CCK_TABLE_SIZE ; i++) {
if (pdmpriv->bCCKinCH14) {
if (!memcmp(&TempCCk,
}
if (CCK_index > (CCK_TABLE_SIZE-1))
- CCK_index = (CCK_TABLE_SIZE-1);
+ CCK_index = CCK_TABLE_SIZE-1;
else if (CCK_index < 0)
CCK_index = 0;
}
- if (pdmpriv->TxPowerTrackControl && (delta != 0 || delta_HP != 0)) {
+ if (pdmpriv->TxPowerTrackControl &&
+ (delta != 0 || delta_HP != 0)) {
/* Adujst OFDM Ant_A according to IQK result */
ele_D = (OFDMSwingTable23A[OFDM_index[0]] & 0xFFC00000)>>22;
X = pdmpriv->RegE94;
/* write new elements A, C, D to regC80 and regC94, element B is always 0 */
value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A;
- PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, value32);
+ rtl8723au_write32(Adapter,
+ rOFDM0_XATxIQImbalance,
+ value32);
value32 = (ele_C&0x000003C0)>>6;
PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, value32);
PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold,
BIT(29), value32);
} else {
- PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance,
- bMaskDWord,
- OFDMSwingTable23A[OFDM_index[0]]);
+ rtl8723au_write32(Adapter,
+ rOFDM0_XATxIQImbalance,
+ OFDMSwingTable23A[OFDM_index[0]]);
PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE,
bMaskH4Bits, 0x00);
PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold,
rtl8723au_write8(Adapter, 0xa29, CCKSwingTable_Ch1423A[CCK_index][7]);
}
- if (is2T) {
+ if (pHalData->rf_type == RF_2T2R) {
ele_D = (OFDMSwingTable23A[(u8)OFDM_index[1]] & 0xFFC00000)>>22;
/* new element A = element D x X */
/* write new elements A, C, D to regC88 and regC9C, element B is always 0 */
value32 = (ele_D<<22)|((ele_C&0x3F)<<16) | ele_A;
- PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32);
+ rtl8723au_write32(Adapter, rOFDM0_XBTxIQImbalance, value32);
value32 = (ele_C&0x000003C0)>>6;
PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32);
rOFDM0_ECCAThreshold,
BIT(25), value32);
} else {
- PHY_SetBBReg(Adapter,
- rOFDM0_XBTxIQImbalance,
- bMaskDWord,
- OFDMSwingTable23A[OFDM_index[1]]);
+ rtl8723au_write32(Adapter,
+ rOFDM0_XBTxIQImbalance,
+ OFDMSwingTable23A[OFDM_index[1]]);
PHY_SetBBReg(Adapter,
rOFDM0_XDTxAFE,
bMaskH4Bits, 0x00);
odm_TXPowerTrackingCallback_ThermalMeter_92C(Adapter);
}
-static void odm_CheckTXPowerTracking_ThermalMeter(struct rtw_adapter *Adapter)
+void rtl8723a_odm_check_tx_power_tracking(struct rtw_adapter *Adapter)
{
struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
- struct dm_odm_t *podmpriv = &pHalData->odmpriv;
-
- if (!(podmpriv->SupportAbility & ODM_RF_TX_PWR_TRACK))
- return;
if (!pdmpriv->TM_Trigger) { /* at least delay 1 sec */
PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60);
}
}
-void rtl8723a_odm_check_tx_power_tracking(struct rtw_adapter *Adapter)
-{
- odm_CheckTXPowerTracking_ThermalMeter(Adapter);
-}
-
/* IQK */
#define MAX_TOLERANCE 5
#define IQK_DELAY_TIME 1 /* ms */
struct hal_data_8723a *pHalData = GET_HAL_DATA(pAdapter);
/* path-A IQK setting */
- PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1f);
- PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f);
- PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82140102);
+ rtl8723au_write32(pAdapter, rTx_IQK_Tone_A, 0x10008c1f);
+ rtl8723au_write32(pAdapter, rRx_IQK_Tone_A, 0x10008c1f);
+ rtl8723au_write32(pAdapter, rTx_IQK_PI_A, 0x82140102);
- PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, configPathB ? 0x28160202 :
+ rtl8723au_write32(pAdapter, rRx_IQK_PI_A, configPathB ? 0x28160202 :
IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)?0x28160202:0x28160502);
/* path-B IQK setting */
if (configPathB) {
- PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x10008c22);
- PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x10008c22);
- PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82140102);
- PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160202);
+ rtl8723au_write32(pAdapter, rTx_IQK_Tone_B, 0x10008c22);
+ rtl8723au_write32(pAdapter, rRx_IQK_Tone_B, 0x10008c22);
+ rtl8723au_write32(pAdapter, rTx_IQK_PI_B, 0x82140102);
+ rtl8723au_write32(pAdapter, rRx_IQK_PI_B, 0x28160202);
}
/* LO calibration setting */
- PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x001028d1);
+ rtl8723au_write32(pAdapter, rIQK_AGC_Rsp, 0x001028d1);
/* One shot, path A LOK & IQK */
- PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
- PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
+ rtl8723au_write32(pAdapter, rIQK_AGC_Pts, 0xf9000000);
+ rtl8723au_write32(pAdapter, rIQK_AGC_Pts, 0xf8000000);
/* delay x ms */
- udelay(IQK_DELAY_TIME*1000);/* PlatformStallExecution(IQK_DELAY_TIME*1000); */
+ /* PlatformStallExecution(IQK_DELAY_TIME*1000); */
+ udelay(IQK_DELAY_TIME*1000);
/* Check failed */
- regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord);
- regE94 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord);
- regE9C = PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord);
- regEA4 = PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord);
+ regEAC = rtl8723au_read32(pAdapter, rRx_Power_After_IQK_A_2);
+ regE94 = rtl8723au_read32(pAdapter, rTx_Power_Before_IQK_A);
+ regE9C = rtl8723au_read32(pAdapter, rTx_Power_After_IQK_A);
+ regEA4 = rtl8723au_read32(pAdapter, rRx_Power_Before_IQK_A_2);
if (!(regEAC & BIT(28)) &&
(((regE94 & 0x03FF0000)>>16) != 0x142) &&
else /* if Tx not OK, ignore Rx */
return result;
- if (!(regEAC & BIT(27)) && /* if Tx is OK, check whether Rx is OK */
+ if (!(regEAC & BIT(27)) && /* if Tx is OK, check whether Rx is OK */
(((regEA4 & 0x03FF0000)>>16) != 0x132) &&
(((regEAC & 0x03FF0000)>>16) != 0x36))
result |= 0x02;
u8 result = 0x00;
/* One shot, path B LOK & IQK */
- PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000002);
- PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000000);
+ rtl8723au_write32(pAdapter, rIQK_AGC_Cont, 0x00000002);
+ rtl8723au_write32(pAdapter, rIQK_AGC_Cont, 0x00000000);
/* delay x ms */
udelay(IQK_DELAY_TIME*1000);
/* Check failed */
- regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord);
- regEB4 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord);
- regEBC = PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord);
- regEC4 = PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord);
- regECC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord);
+ regEAC = rtl8723au_read32(pAdapter, rRx_Power_After_IQK_A_2);
+ regEB4 = rtl8723au_read32(pAdapter, rTx_Power_Before_IQK_B);
+ regEBC = rtl8723au_read32(pAdapter, rTx_Power_After_IQK_B);
+ regEC4 = rtl8723au_read32(pAdapter, rRx_Power_Before_IQK_B_2);
+ regECC = rtl8723au_read32(pAdapter, rRx_Power_After_IQK_B_2);
if (!(regEAC & BIT(31)) &&
(((regEB4 & 0x03FF0000)>>16) != 0x142) &&
if (final_candidate == 0xFF) {
return;
} else if (bIQKOK) {
- Oldval_0 = (PHY_QueryBBReg(pAdapter, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF;
+ Oldval_0 = rtl8723au_read32(pAdapter, rOFDM0_XATxIQImbalance);
+ Oldval_0 = (Oldval_0 >> 22) & 0x3FF;
X = result[final_candidate][0];
if ((X & 0x00000200) != 0)
X = X | 0xFFFFFC00;
TX0_A = (X * Oldval_0) >> 8;
PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A);
- PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), ((X * Oldval_0>>7) & 0x1));
+ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31),
+ ((X * Oldval_0>>7) & 0x1));
Y = result[final_candidate][1];
if ((Y & 0x00000200) != 0)
Y = Y | 0xFFFFFC00;
TX0_C = (Y * Oldval_0) >> 8;
- PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6));
- PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F));
- PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), ((Y * Oldval_0>>7) & 0x1));
+ PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000,
+ ((TX0_C&0x3C0)>>6));
+ PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000,
+ (TX0_C&0x3F));
+ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29),
+ ((Y * Oldval_0>>7) & 0x1));
if (bTxOnly) {
DBG_8723A("_PHY_PathAFillIQKMatrix only Tx OK\n");
if (final_candidate == 0xFF) {
return;
} else if (bIQKOK) {
- Oldval_1 = (PHY_QueryBBReg(pAdapter, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF;
+ Oldval_1 = rtl8723au_read32(pAdapter, rOFDM0_XBTxIQImbalance);
+ Oldval_1 = (Oldval_1 >> 22) & 0x3FF;
X = result[final_candidate][4];
if ((X & 0x00000200) != 0)
X = X | 0xFFFFFC00;
TX1_A = (X * Oldval_1) >> 8;
PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A);
- PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), ((X * Oldval_1>>7) & 0x1));
+ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27),
+ ((X * Oldval_1 >> 7) & 0x1));
Y = result[final_candidate][5];
if ((Y & 0x00000200) != 0)
Y = Y | 0xFFFFFC00;
TX1_C = (Y * Oldval_1) >> 8;
- PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6));
- PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F));
- PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), ((Y * Oldval_1>>7) & 0x1));
+ PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000,
+ ((TX1_C & 0x3C0) >> 6));
+ PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000,
+ (TX1_C & 0x3F));
+ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25),
+ ((Y * Oldval_1 >> 7) & 0x1));
if (bTxOnly)
return;
u32 i;
for (i = 0 ; i < RegisterNum ; i++) {
- ADDABackup[i] = PHY_QueryBBReg(pAdapter, ADDAReg[i], bMaskDWord);
+ ADDABackup[i] = rtl8723au_read32(pAdapter, ADDAReg[i]);
}
}
-static void _PHY_SaveMACRegisters(struct rtw_adapter *pAdapter, u32 *MACReg, u32 *MACBackup)
+static void _PHY_SaveMACRegisters(struct rtw_adapter *pAdapter, u32 *MACReg,
+ u32 *MACBackup)
{
u32 i;
MACBackup[i] = rtl8723au_read32(pAdapter, MACReg[i]);
}
-static void _PHY_ReloadADDARegisters(struct rtw_adapter *pAdapter, u32 *ADDAReg, u32 *ADDABackup, u32 RegiesterNum)
+static void _PHY_ReloadADDARegisters(struct rtw_adapter *pAdapter,
+ u32 *ADDAReg, u32 *ADDABackup,
+ u32 RegiesterNum)
{
u32 i;
for (i = 0 ; i < RegiesterNum ; i++) {
- PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, ADDABackup[i]);
+ rtl8723au_write32(pAdapter, ADDAReg[i], ADDABackup[i]);
}
}
-static void _PHY_ReloadMACRegisters(struct rtw_adapter *pAdapter, u32 *MACReg, u32 *MACBackup)
+static void _PHY_ReloadMACRegisters(struct rtw_adapter *pAdapter,
+ u32 *MACReg, u32 *MACBackup)
{
u32 i;
rtl8723au_write32(pAdapter, MACReg[i], MACBackup[i]);
}
-static void _PHY_PathADDAOn(struct rtw_adapter *pAdapter, u32 *ADDAReg, bool isPathAOn, bool is2T)
+static void _PHY_PathADDAOn(struct rtw_adapter *pAdapter, u32 *ADDAReg,
+ bool isPathAOn, bool is2T)
{
u32 pathOn;
u32 i;
pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4;
if (!is2T) {
pathOn = 0x0bdb25a0;
- PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, 0x0b1b25a0);
+ rtl8723au_write32(pAdapter, ADDAReg[0], 0x0b1b25a0);
} else {
- PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, pathOn);
+ rtl8723au_write32(pAdapter, ADDAReg[0], pathOn);
}
for (i = 1 ; i < IQK_ADDA_REG_NUM ; i++)
- PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, pathOn);
+ rtl8723au_write32(pAdapter, ADDAReg[i], pathOn);
}
-static void _PHY_MACSettingCalibration(struct rtw_adapter *pAdapter, u32 *MACReg, u32 *MACBackup)
+static void _PHY_MACSettingCalibration(struct rtw_adapter *pAdapter,
+ u32 *MACReg, u32 *MACBackup)
{
u32 i = 0;
static void _PHY_PathAStandBy(struct rtw_adapter *pAdapter)
{
- PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x0);
- PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000);
- PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000);
+ rtl8723au_write32(pAdapter, rFPGA0_IQK, 0x0);
+ rtl8723au_write32(pAdapter, 0x840, 0x00010000);
+ rtl8723au_write32(pAdapter, rFPGA0_IQK, 0x80800000);
}
static void _PHY_PIModeSwitch(struct rtw_adapter *pAdapter, bool PIMode)
u32 mode;
mode = PIMode ? 0x01000100 : 0x01000000;
- PHY_SetBBReg(pAdapter, 0x820, bMaskDWord, mode);
- PHY_SetBBReg(pAdapter, 0x828, bMaskDWord, mode);
+ rtl8723au_write32(pAdapter, 0x820, mode);
+ rtl8723au_write32(pAdapter, 0x828, mode);
}
/*
u32 i, j, diff, SimularityBitMap, bound = 0;
struct hal_data_8723a *pHalData = GET_HAL_DATA(pAdapter);
u8 final_candidate[2] = {0xFF, 0xFF}; /* for path A and path B */
- bool bResult = true, is2T = IS_92C_SERIAL(pHalData->VersionID);
+ bool bResult = true;
- if (is2T)
+ if (pHalData->rf_type == RF_2T2R)
bound = 8;
else
bound = 4;
for (i = 0; i < 4; i++)
result[3][i] = result[c1][i];
return false;
- } else if (!(SimularityBitMap & 0xF0) && is2T) {
+ } else if (!(SimularityBitMap & 0xF0) && pHalData->rf_type == RF_2T2R) {
/* path B OK */
for (i = 4; i < 8; i++)
result[3][i] = result[c1][i];
u32 bbvalue;
if (t == 0) {
- bbvalue = PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bMaskDWord);
+ bbvalue = rtl8723au_read32(pAdapter, rFPGA0_RFMOD);
/* Save ADDA parameters, turn Path A ADDA on */
_PHY_SaveADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup, IQK_ADDA_REG_NUM);
}
PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, BIT(24), 0x00);
- PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600);
- PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4);
- PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000);
+ rtl8723au_write32(pAdapter, rOFDM0_TRxPathEnable, 0x03a05600);
+ rtl8723au_write32(pAdapter, rOFDM0_TRMuxPar, 0x000800e4);
+ rtl8723au_write32(pAdapter, rFPGA0_XCD_RFInterfaceSW, 0x22204000);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(10), 0x01);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(26), 0x01);
PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT(10), 0x00);
PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT(10), 0x00);
if (is2T) {
- PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000);
- PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000);
+ rtl8723au_write32(pAdapter,
+ rFPGA0_XA_LSSIParameter, 0x00010000);
+ rtl8723au_write32(pAdapter,
+ rFPGA0_XB_LSSIParameter, 0x00010000);
}
/* MAC settings */
_PHY_MACSettingCalibration(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);
/* Page B init */
- PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x00080000);
+ rtl8723au_write32(pAdapter, rConfig_AntA, 0x00080000);
if (is2T)
- PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x00080000);
+ rtl8723au_write32(pAdapter, rConfig_AntB, 0x00080000);
/* IQ calibration setting */
- PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000);
- PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, 0x01007c00);
- PHY_SetBBReg(pAdapter, rRx_IQK, bMaskDWord, 0x01004800);
+ rtl8723au_write32(pAdapter, rFPGA0_IQK, 0x80800000);
+ rtl8723au_write32(pAdapter, rTx_IQK, 0x01007c00);
+ rtl8723au_write32(pAdapter, rRx_IQK, 0x01004800);
for (i = 0 ; i < retryCount ; i++) {
PathAOK = _PHY_PathA_IQK(pAdapter, is2T);
if (PathAOK == 0x03) {
DBG_8723A("Path A IQK Success!!\n");
- result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16;
- result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16;
- result[t][2] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16;
- result[t][3] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16;
+ result[t][0] = (rtl8723au_read32(pAdapter, rTx_Power_Before_IQK_A)&0x3FF0000)>>16;
+ result[t][1] = (rtl8723au_read32(pAdapter, rTx_Power_After_IQK_A)&0x3FF0000)>>16;
+ result[t][2] = (rtl8723au_read32(pAdapter, rRx_Power_Before_IQK_A_2)&0x3FF0000)>>16;
+ result[t][3] = (rtl8723au_read32(pAdapter, rRx_Power_After_IQK_A_2)&0x3FF0000)>>16;
break;
} else if (i == (retryCount-1) && PathAOK == 0x01) {
/* Tx IQK OK */
DBG_8723A("Path A IQK Only Tx Success!!\n");
- result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16;
- result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16;
+ result[t][0] = (rtl8723au_read32(pAdapter, rTx_Power_Before_IQK_A)&0x3FF0000)>>16;
+ result[t][1] = (rtl8723au_read32(pAdapter, rTx_Power_After_IQK_A)&0x3FF0000)>>16;
}
}
PathBOK = _PHY_PathB_IQK(pAdapter);
if (PathBOK == 0x03) {
DBG_8723A("Path B IQK Success!!\n");
- result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16;
- result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16;
- result[t][6] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16;
- result[t][7] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16;
+ result[t][4] = (rtl8723au_read32(pAdapter, rTx_Power_Before_IQK_B)&0x3FF0000)>>16;
+ result[t][5] = (rtl8723au_read32(pAdapter, rTx_Power_After_IQK_B)&0x3FF0000)>>16;
+ result[t][6] = (rtl8723au_read32(pAdapter, rRx_Power_Before_IQK_B_2)&0x3FF0000)>>16;
+ result[t][7] = (rtl8723au_read32(pAdapter, rRx_Power_After_IQK_B_2)&0x3FF0000)>>16;
break;
} else if (i == (retryCount - 1) && PathBOK == 0x01) {
/* Tx IQK OK */
DBG_8723A("Path B Only Tx IQK Success!!\n");
- result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16;
- result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16;
+ result[t][4] = (rtl8723au_read32(pAdapter, rTx_Power_Before_IQK_B)&0x3FF0000)>>16;
+ result[t][5] = (rtl8723au_read32(pAdapter, rTx_Power_After_IQK_B)&0x3FF0000)>>16;
}
}
}
/* Back to BB mode, load original value */
- PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0);
+ rtl8723au_write32(pAdapter, rFPGA0_IQK, 0);
if (t != 0) {
if (!pdmpriv->bRfPiEnable) {
_PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM);
/* Restore RX initial gain */
- PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3);
+ rtl8723au_write32(pAdapter,
+ rFPGA0_XA_LSSIParameter, 0x00032ed3);
if (is2T) {
- PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3);
+ rtl8723au_write32(pAdapter,
+ rFPGA0_XB_LSSIParameter, 0x00032ed3);
}
/* load 0xe30 IQC default value */
- PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00);
- PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00);
+ rtl8723au_write32(pAdapter, rTx_IQK_Tone_A, 0x01008c00);
+ rtl8723au_write32(pAdapter, rRx_IQK_Tone_A, 0x01008c00);
}
}
is13simular = false;
for (i = 0; i < 3; i++) {
- if (IS_92C_SERIAL(pHalData->VersionID)) {
- _PHY_IQCalibrate(pAdapter, result, i, true);
- } else {
- /* For 88C 1T1R */
+ if (pHalData->rf_type == RF_2T2R)
+ _PHY_IQCalibrate(pAdapter, result, i, true);
+ else /* For 88C 1T1R */
_PHY_IQCalibrate(pAdapter, result, i, false);
- }
if (i == 1) {
is12simular = _PHY_SimularityCompare(pAdapter, result, 0, 1);
if ((RegE94 != 0)/*&&(RegEA4 != 0)*/)
_PHY_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0));
- if (IS_92C_SERIAL(pHalData->VersionID)) {
+ if (pHalData->rf_type == RF_2T2R) {
if ((RegEB4 != 0)/*&&(RegEC4 != 0)*/)
- _PHY_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0));
+ _PHY_PathBFillIQKMatrix(pAdapter, bPathBOK, result,
+ final_candidate, (RegEC4 == 0));
}
_PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup_recover, 9);
if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS)
return;
- if (IS_92C_SERIAL(pHalData->VersionID)) {
+ if (pHalData->rf_type == RF_2T2R)
_PHY_LCCalibrate(pAdapter, true);
- } else {
- /* For 88C 1T1R */
+ else /* For 88C 1T1R */
_PHY_LCCalibrate(pAdapter, false);
- }
}
void
return false;
cond = Condition & 0x0000FF00;
- cond = cond >> 8;
+ cond >>= 8;
if ((_interface & cond) == 0 && cond != 0x07)
return false;
cond = Condition & 0x00FF0000;
- cond = cond >> 16;
+ cond >>= 16;
if ((_platform & cond) == 0 && cond != 0x0F)
return false;
return true;
void ODM_ReadAndConfig_AGC_TAB_1T_8723A(struct dm_odm_t *pDM_Odm)
{
-
u32 hex;
u32 i;
u8 platform = 0x04;
- u8 interfaceValue = pDM_Odm->SupportInterface;
u8 board = pDM_Odm->BoardType;
u32 ArrayLen = sizeof(Array_AGC_TAB_1T_8723A)/sizeof(u32);
u32 *Array = Array_AGC_TAB_1T_8723A;
hex = board;
- hex += interfaceValue << 8;
+ hex += ODM_ITRF_USB << 8;
hex += platform << 16;
hex += 0xFF000000;
for (i = 0; i < ArrayLen; i += 2) {
/* This (offset, data) pair meets the condition. */
if (v1 < 0xCDCDCDCD) {
- odm_ConfigBB_AGC_8723A(pDM_Odm, v1, bMaskDWord, v2);
+ odm_ConfigBB_AGC_8723A(pDM_Odm, v1, v2);
continue;
} else {
if (!CheckCondition(Array[i], hex)) {
- /* Discard the following (offset, data) pairs. */
+ /* Discard the following (offset, data) pairs */
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
READ_NEXT_PAIR(v1, v2, i);
i -= 2; /* prevent from for-loop += 2 */
} else {
- /* Configure matched pairs and skip to end of if-else. */
+ /* Configure matched pairs and skip to
+ end of if-else. */
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen - 2) {
- odm_ConfigBB_AGC_8723A(pDM_Odm, v1, bMaskDWord, v2);
+ odm_ConfigBB_AGC_8723A(pDM_Odm, v1, v2);
READ_NEXT_PAIR(v1, v2, i);
}
while (v2 != 0xDEAD && i < ArrayLen - 2)
u32 hex = 0;
u32 i = 0;
u8 platform = 0x04;
- u8 interfaceValue = pDM_Odm->SupportInterface;
u8 board = pDM_Odm->BoardType;
u32 ArrayLen = sizeof(Array_PHY_REG_1T_8723A)/sizeof(u32);
u32 *Array = Array_PHY_REG_1T_8723A;
hex += board;
- hex += interfaceValue << 8;
+ hex += ODM_ITRF_USB << 8;
hex += platform << 16;
hex += 0xFF000000;
for (i = 0; i < ArrayLen; i += 2) {
/* This (offset, data) pair meets the condition. */
if (v1 < 0xCDCDCDCD) {
- odm_ConfigBB_PHY_8723A(pDM_Odm, v1, bMaskDWord, v2);
+ odm_ConfigBB_PHY_8723A(pDM_Odm, v1, v2);
continue;
} else {
if (!CheckCondition(Array[i], hex)) {
- /* Discard the following (offset, data) pairs. */
+ /* Discard the following (offset, data) pairs */
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
READ_NEXT_PAIR(v1, v2, i);
i -= 2; /* prevent from for-loop += 2 */
} else {
- /* Configure matched pairs and skip to end of if-else. */
+ /* Configure matched pairs and skip to
+ end of if-else. */
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen - 2) {
- odm_ConfigBB_PHY_8723A(pDM_Odm, v1, bMaskDWord, v2);
+ odm_ConfigBB_PHY_8723A(pDM_Odm, v1, v2);
READ_NEXT_PAIR(v1, v2, i);
}
while (v2 != 0xDEAD && i < ArrayLen - 2)
void ODM_ReadAndConfig_PHY_REG_MP_8723A(struct dm_odm_t *pDM_Odm)
{
- u32 hex = 0;
- u32 i = 0;
- u8 platform = 0x04;
- u8 interfaceValue = pDM_Odm->SupportInterface;
- u8 board = pDM_Odm->BoardType;
- u32 ArrayLen = sizeof(Array_PHY_REG_MP_8723A)/sizeof(u32);
- u32 *Array = Array_PHY_REG_MP_8723A;
+ u32 hex = 0;
+ u32 i;
+ u8 platform = 0x04;
+ u8 board = pDM_Odm->BoardType;
+ u32 ArrayLen = sizeof(Array_PHY_REG_MP_8723A)/sizeof(u32);
+ u32 *Array = Array_PHY_REG_MP_8723A;
hex += board;
- hex += interfaceValue << 8;
+ hex += ODM_ITRF_USB << 8;
hex += platform << 16;
hex += 0xFF000000;
for (i = 0; i < ArrayLen; i += 2) {
/* This (offset, data) pair meets the condition. */
if (v1 < 0xCDCDCDCD) {
- odm_ConfigBB_PHY_8723A(pDM_Odm, v1, bMaskDWord, v2);
+ odm_ConfigBB_PHY_8723A(pDM_Odm, v1, v2);
continue;
} else {
if (!CheckCondition(Array[i], hex)) {
- /* Discard the following (offset, data) pairs. */
+ /* Discard the following (offset, data) pairs */
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
READ_NEXT_PAIR(v1, v2, i);
i -= 2; /* prevent from for-loop += 2 */
} else {
- /* Configure matched pairs and skip to end of if-else. */
+ /* Configure matched pairs and skip to
+ end of if-else. */
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen - 2) {
- odm_ConfigBB_PHY_8723A(pDM_Odm, v1, bMaskDWord, v2);
+ odm_ConfigBB_PHY_8723A(pDM_Odm, v1, v2);
READ_NEXT_PAIR(v1, v2, i);
}
while (v2 != 0xDEAD && i < ArrayLen - 2)
return false;
cond = Condition & 0x0000FF00;
- cond = cond >> 8;
+ cond >>= 8;
if ((_interface & cond) == 0 && cond != 0x07)
return false;
cond = Condition & 0x00FF0000;
- cond = cond >> 16;
+ cond >>= 16;
if ((_platform & cond) == 0 && cond != 0x0F)
return false;
return true;
u32 hex = 0;
u32 i = 0;
u8 platform = 0x04;
- u8 interfaceValue = pDM_Odm->SupportInterface;
u8 board = pDM_Odm->BoardType;
u32 ArrayLen = sizeof(Array_MAC_REG_8723A)/sizeof(u32);
u32 *Array = Array_MAC_REG_8723A;
hex += board;
- hex += interfaceValue << 8;
+ hex += ODM_ITRF_USB << 8;
hex += platform << 16;
hex += 0xFF000000;
for (i = 0; i < ArrayLen; i += 2) {
return false;
cond = Condition & 0x0000FF00;
- cond = cond >> 8;
+ cond >>= 8;
if ((_interface & cond) == 0 && cond != 0x07)
return false;
cond = Condition & 0x00FF0000;
- cond = cond >> 16;
+ cond >>= 16;
if ((_platform & cond) == 0 && cond != 0x0F)
return false;
return true;
u32 hex = 0;
u32 i = 0;
u8 platform = 0x04;
- u8 interfaceValue = pDM_Odm->SupportInterface;
u8 board = pDM_Odm->BoardType;
u32 ArrayLen = sizeof(Array_RadioA_1T_8723A)/sizeof(u32);
u32 *Array = Array_RadioA_1T_8723A;
hex += board;
- hex += interfaceValue << 8;
+ hex += ODM_ITRF_USB << 8;
hex += platform << 16;
hex += 0xFF000000;
PwrCfgCmd = PwrSeqCmd[AryIdx];
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("HalPwrSeqCmdParsing23a: offset(%#x) cut_msk(%#x) "
- "fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) "
- "msk(%#x) value(%#x)\n",
- GET_PWR_CFG_OFFSET(PwrCfgCmd),
- GET_PWR_CFG_CUT_MASK(PwrCfgCmd),
- GET_PWR_CFG_FAB_MASK(PwrCfgCmd),
- GET_PWR_CFG_INTF_MASK(PwrCfgCmd),
- GET_PWR_CFG_BASE(PwrCfgCmd),
- GET_PWR_CFG_CMD(PwrCfgCmd),
- GET_PWR_CFG_MASK(PwrCfgCmd),
- GET_PWR_CFG_VALUE(PwrCfgCmd)));
+ "HalPwrSeqCmdParsing23a: offset(%#x) cut_msk(%#x) fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) msk(%#x) value(%#x)\n",
+ GET_PWR_CFG_OFFSET(PwrCfgCmd),
+ GET_PWR_CFG_CUT_MASK(PwrCfgCmd),
+ GET_PWR_CFG_FAB_MASK(PwrCfgCmd),
+ GET_PWR_CFG_INTF_MASK(PwrCfgCmd),
+ GET_PWR_CFG_BASE(PwrCfgCmd),
+ GET_PWR_CFG_CMD(PwrCfgCmd),
+ GET_PWR_CFG_MASK(PwrCfgCmd),
+ GET_PWR_CFG_VALUE(PwrCfgCmd));
/* 2 Only Handle the command whose FAB, CUT, and Interface are
matched */
switch (GET_PWR_CFG_CMD(PwrCfgCmd)) {
case PWR_CMD_READ:
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("HalPwrSeqCmdParsing23a: "
- "PWR_CMD_READ\n"));
+ "HalPwrSeqCmdParsing23a: PWR_CMD_READ\n");
break;
case PWR_CMD_WRITE:
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("HalPwrSeqCmdParsing23a: "
- "PWR_CMD_WRITE\n"));
+ "HalPwrSeqCmdParsing23a: PWR_CMD_WRITE\n");
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
/* Read the value from system register */
case PWR_CMD_POLLING:
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("HalPwrSeqCmdParsing23a: "
- "PWR_CMD_POLLING\n"));
+ "HalPwrSeqCmdParsing23a: PWR_CMD_POLLING\n");
bPollingBit = false;
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
case PWR_CMD_DELAY:
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("HalPwrSeqCmdParsing23a: "
- "PWR_CMD_DELAY\n"));
+ "HalPwrSeqCmdParsing23a: PWR_CMD_DELAY\n");
if (GET_PWR_CFG_VALUE(PwrCfgCmd) ==
PWRSEQ_DELAY_US)
udelay(GET_PWR_CFG_OFFSET(PwrCfgCmd));
/* When this command is parsed, end
the process */
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("HalPwrSeqCmdParsing23a: "
- "PWR_CMD_END\n"));
+ "HalPwrSeqCmdParsing23a: PWR_CMD_END\n");
return true;
- break;
default:
RT_TRACE(_module_hal_init_c_, _drv_err_,
- ("HalPwrSeqCmdParsing23a: "
- "Unknown CMD!!\n"));
+ "HalPwrSeqCmdParsing23a: Unknown CMD!!\n");
break;
}
}
#define _HAL_INIT_C_
-void dump_chip_info23a(struct hal_version ChipVersion)
-{
- int cnt = 0;
- u8 buf[128];
-
- cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8723A_");
-
- cnt += sprintf((buf + cnt), "%s_", IS_NORMAL_CHIP(ChipVersion) ?
- "Normal_Chip" : "Test_Chip");
- cnt += sprintf((buf + cnt), "%s_",
- IS_CHIP_VENDOR_TSMC(ChipVersion) ? "TSMC" : "UMC");
- if (IS_A_CUT(ChipVersion))
- cnt += sprintf((buf + cnt), "A_CUT_");
- else if (IS_B_CUT(ChipVersion))
- cnt += sprintf((buf + cnt), "B_CUT_");
- else if (IS_C_CUT(ChipVersion))
- cnt += sprintf((buf + cnt), "C_CUT_");
- else if (IS_D_CUT(ChipVersion))
- cnt += sprintf((buf + cnt), "D_CUT_");
- else if (IS_E_CUT(ChipVersion))
- cnt += sprintf((buf + cnt), "E_CUT_");
- else
- cnt += sprintf((buf + cnt), "UNKNOWN_CUT(%d)_",
- ChipVersion.CUTVersion);
-
- if (IS_1T1R(ChipVersion))
- cnt += sprintf((buf + cnt), "1T1R_");
- else if (IS_1T2R(ChipVersion))
- cnt += sprintf((buf + cnt), "1T2R_");
- else if (IS_2T2R(ChipVersion))
- cnt += sprintf((buf + cnt), "2T2R_");
- else
- cnt += sprintf((buf + cnt), "UNKNOWN_RFTYPE(%d)_",
- ChipVersion.RFType);
-
- cnt += sprintf((buf + cnt), "RomVer(%d)\n", ChipVersion.ROMVer);
-
- DBG_8723A("%s", buf);
-}
-
#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80
/* return the final channel plan decision */
rate_index = 0;
/* Set RTS initial rate */
while (brate_cfg > 0x1) {
- brate_cfg = (brate_cfg >> 1);
+ brate_cfg >>= 1;
rate_index++;
}
/* Ziv - Check */
rtl8723au_write8(padapter, REG_INIRTS_RATE_SEL, rate_index);
-
- return;
}
static void _OneOutPipeMapping(struct rtw_adapter *pAdapter)
if (MinSpacingToSet < SecMinSpace)
MinSpacingToSet = SecMinSpace;
- /* RT_TRACE(COMP_MLME, DBG_LOUD,
- ("Set HW_VAR_AMPDU_MIN_SPACE: %#x\n",
- padapter->MgntInfo.MinSpaceCfg)); */
MinSpacingToSet |=
rtl8723au_read8(padapter, REG_AMPDU_MIN_SPACE) & 0xf8;
rtl8723au_write8(padapter, REG_AMPDU_MIN_SPACE,
rtl8723au_write8(padapter, REG_AGGLEN_LMT + index,
pRegToSet[index]);
}
-
- /* RT_TRACE(COMP_MLME, DBG_LOUD,
- ("Set HW_VAR_AMPDU_FACTOR: %#x\n", FactorToSet)); */
}
}
/* write content 0 is equall to mark invalid */
/* delay_ms(40); */
rtl8723au_write32(padapter, WCAMI, ulContent);
- /* RT_TRACE(COMP_SEC, DBG_LOUD,
- ("rtl8723a_cam_empty_entry(): WRITE A4: %lx\n",
- ulContent));*/
/* delay_ms(40); */
rtl8723au_write32(padapter, REG_CAMCMD, ulCommand);
- /* RT_TRACE(COMP_SEC, DBG_LOUD,
- ("rtl8723a_cam_empty_entry(): WRITE A0: %lx\n",
- ulCommand));*/
}
}
/* END---------BB POWER SAVE----------------------- */
-void odm_RefreshRateAdaptiveMask23aCE23a(struct dm_odm_t *pDM_Odm);
-
void odm_DynamicTxPower23aInit(struct dm_odm_t *pDM_Odm);
-void odm_RSSIMonitorCheck23aCE(struct dm_odm_t *pDM_Odm);
-void odm_RSSIMonitorCheck23a(struct dm_odm_t *pDM_Odm);
+static void odm_RSSIMonitorCheck(struct dm_odm_t *pDM_Odm);
void odm_DynamicTxPower23a(struct dm_odm_t *pDM_Odm);
-void odm_RefreshRateAdaptiveMask23a(struct dm_odm_t *pDM_Odm);
-
-void ODM_TXPowerTrackingCheck23a(struct dm_odm_t *pDM_Odm);
+static void odm_RefreshRateAdaptiveMask(struct dm_odm_t *pDM_Odm);
void odm_RateAdaptiveMaskInit23a(struct dm_odm_t *pDM_Odm);
-void odm_TXPowerTrackingThermalMeterInit23a(struct dm_odm_t *pDM_Odm);
-
-void odm_TXPowerTrackingInit23a(struct dm_odm_t *pDM_Odm);
-
-void odm_TXPowerTrackingCheckCE23a(struct dm_odm_t *pDM_Odm);
+static void odm_TXPowerTrackingInit(struct dm_odm_t *pDM_Odm);
static void odm_EdcaTurboCheck23a(struct dm_odm_t *pDM_Odm);
static void ODM_EdcaTurboInit23a(struct dm_odm_t *pDM_Odm);
#define RxDefaultAnt2 0x569a
bool odm_StaDefAntSel(struct dm_odm_t *pDM_Odm,
- u32 OFDM_Ant1_Cnt,
- u32 OFDM_Ant2_Cnt,
- u32 CCK_Ant1_Cnt,
- u32 CCK_Ant2_Cnt,
- u8 *pDefAnt
+ u32 OFDM_Ant1_Cnt,
+ u32 OFDM_Ant2_Cnt,
+ u32 CCK_Ant1_Cnt,
+ u32 CCK_Ant2_Cnt,
+ u8 *pDefAnt
);
void odm_SetRxIdleAnt(struct dm_odm_t *pDM_Odm,
u8 Ant,
- bool bDualPath
+ bool bDualPath
);
/* 3 Export Interface */
odm23a_DynBBPSInit(pDM_Odm);
odm_DynamicTxPower23aInit(pDM_Odm);
- odm_TXPowerTrackingInit23a(pDM_Odm);
+ odm_TXPowerTrackingInit(pDM_Odm);
ODM_EdcaTurboInit23a(pDM_Odm);
}
odm_CmnInfoUpdate_Debug23a(pDM_Odm);
odm_CommonInfoSelfUpdate(pHalData);
odm_FalseAlarmCounterStatistics23a(pDM_Odm);
- odm_RSSIMonitorCheck23a(pDM_Odm);
+ odm_RSSIMonitorCheck(pDM_Odm);
/* 8723A or 8189ES platform */
/* NeilChen--2012--08--24-- */
if (pwrctrlpriv->bpower_saving)
return;
- odm_RefreshRateAdaptiveMask23a(pDM_Odm);
+ odm_RefreshRateAdaptiveMask(pDM_Odm);
odm_DynamicBBPowerSaving23a(pDM_Odm);
- ODM_TXPowerTrackingCheck23a(pDM_Odm);
odm_EdcaTurboCheck23a(pDM_Odm);
-
- odm_dtc(pDM_Odm);
}
/* */
/* */
switch (CmnInfo) {
/* Fixed ODM value. */
- case ODM_CMNINFO_PLATFORM:
- break;
- case ODM_CMNINFO_INTERFACE:
- pDM_Odm->SupportInterface = (u8)Value;
- break;
case ODM_CMNINFO_MP_TEST_CHIP:
pDM_Odm->bIsMPChip = (u8)Value;
break;
case ODM_CMNINFO_FAB_VER:
pDM_Odm->FabVersion = (u8)Value;
break;
- case ODM_CMNINFO_RF_TYPE:
- pDM_Odm->RFType = (u8)Value;
- break;
case ODM_CMNINFO_BOARD_TYPE:
pDM_Odm->BoardType = (u8)Value;
break;
case ODM_CMNINFO_EXT_TRSW:
pDM_Odm->ExtTRSW = (u8)Value;
break;
- case ODM_CMNINFO_PATCH_ID:
- pDM_Odm->PatchID = (u8)Value;
- break;
case ODM_CMNINFO_BINHCT_TEST:
pDM_Odm->bInHctTest = (bool)Value;
break;
/* do nothing */
break;
}
-
- /* */
- /* Tx power tracking BB swing table. */
- /* The base index = 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB */
- /* */
- pDM_Odm->BbSwingIdxOfdm = 12; /* Set defalut value as index 12. */
- pDM_Odm->BbSwingIdxOfdmCurrent = 12;
- pDM_Odm->BbSwingFlagOfdm = false;
-
}
void ODM_CmnInfoPtrArrayHook23a(struct dm_odm_t *pDM_Odm, enum odm_cmninfo CmnInfo,
{
/* This init variable may be changed in run time. */
switch (CmnInfo) {
- case ODM_CMNINFO_RF_TYPE:
- pDM_Odm->RFType = (u8)Value;
- break;
case ODM_CMNINFO_WIFI_DIRECT:
pDM_Odm->bWIFI_Direct = (bool)Value;
break;
}
-void odm_CommonInfoSelfInit23a(struct dm_odm_t *pDM_Odm
- )
+void odm_CommonInfoSelfInit23a(struct dm_odm_t *pDM_Odm)
{
- pDM_Odm->bCckHighPower =
- (bool) ODM_GetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter2, BIT(9));
+ u32 val32;
+
+ val32 = rtl8723au_read32(pDM_Odm->Adapter, rFPGA0_XA_HSSIParameter2);
+ if (val32 & BIT(9))
+ pDM_Odm->bCckHighPower = true;
+ else
+ pDM_Odm->bCckHighPower = false;
+
pDM_Odm->RFPathRxEnable =
- (u8) ODM_GetBBReg(pDM_Odm, rOFDM0_TRxPathEnable, 0x0F);
+ rtl8723au_read32(pDM_Odm->Adapter, rOFDM0_TRxPathEnable) & 0x0F;
ODM_InitDebugSetting23a(pDM_Odm);
}
u8 EntryCnt = 0;
u8 i;
- if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) {
- if (pHalData->nCur40MhzPrimeSC == 1)
- pDM_Odm->ControlChannel = pHalData->CurrentChannel - 2;
- else if (pHalData->nCur40MhzPrimeSC == 2)
- pDM_Odm->ControlChannel = pHalData->CurrentChannel + 2;
- } else {
- pDM_Odm->ControlChannel = pHalData->CurrentChannel;
- }
-
for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
pEntry = pDM_Odm->pODM_StaInfo[i];
if (pEntry)
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoInit_Debug23a ==>\n"));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportAbility = 0x%x\n", pDM_Odm->SupportAbility));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportInterface =%d\n", pDM_Odm->SupportInterface));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportICType = 0x%x\n", pDM_Odm->SupportICType));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("CutVersion =%d\n", pDM_Odm->CutVersion));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("FabVersion =%d\n", pDM_Odm->FabVersion));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RFType =%d\n", pDM_Odm->RFType));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("BoardType =%d\n", pDM_Odm->BoardType));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtLNA =%d\n", pDM_Odm->ExtLNA));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtPA =%d\n", pDM_Odm->ExtPA));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtTRSW =%d\n", pDM_Odm->ExtTRSW));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("PatchID =%d\n", pDM_Odm->PatchID));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bInHctTest =%d\n", pDM_Odm->bInHctTest));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFITest =%d\n", pDM_Odm->bWIFITest));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bDualMacSmartConcurrent =%d\n", pDM_Odm->bDualMacSmartConcurrent));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_Min =%d\n", pDM_Odm->RSSI_Min));
}
-void ODM_Write_DIG23a(struct dm_odm_t *pDM_Odm,
- u8 CurrentIGI
- )
+void ODM_Write_DIG23a(struct dm_odm_t *pDM_Odm, u8 CurrentIGI)
{
+ struct rtw_adapter *adapter = pDM_Odm->Adapter;
struct dig_t *pDM_DigTable = &pDM_Odm->DM_DigTable;
-
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_REG(IGI_A, pDM_Odm) = 0x%x, ODM_BIT(IGI, pDM_Odm) = 0x%x \n",
- ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm)));
+ u32 val32;
if (pDM_DigTable->CurIGValue != CurrentIGI) {
- ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI);
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("CurrentIGI(0x%02x). \n", CurrentIGI));
+ val32 = rtl8723au_read32(adapter, ODM_REG_IGI_A_11N);
+ val32 &= ~ODM_BIT_IGI_11N;
+ val32 |= CurrentIGI;
+ rtl8723au_write32(adapter, ODM_REG_IGI_A_11N, val32);
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
+ ("CurrentIGI(0x%02x). \n", CurrentIGI));
pDM_DigTable->CurIGValue = CurrentIGI;
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
CurrentIGI = CurrentIGI+RSSI_OFFSET_DIG;
bFwCurrentInPSMode = pAdapter->pwrctrlpriv.bFwCurrentInPSMode;
- /* ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG_LPS, ODM_DBG_LOUD, ("odm_DIG23a() ==>\n")); */
-
/* Using FW PS mode to make IGI */
if (bFwCurrentInPSMode) {
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("---Neil---odm_DIG23a is in LPS mode\n"));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
+ ("---Neil---odm_DIG23a is in LPS mode\n"));
/* Adjust by FA in LPS MODE */
if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2_LPS)
CurrentIGI = CurrentIGI+2;
else if (CurrentIGI < RSSI_Lower)
CurrentIGI = RSSI_Lower;
- ODM_Write_DIG23a(pDM_Odm, CurrentIGI);/* ODM_Write_DIG23a(pDM_Odm, pDM_DigTable->CurIGValue); */
-
+ ODM_Write_DIG23a(pDM_Odm, CurrentIGI);
}
void odm_DIG23aInit(struct dm_odm_t *pDM_Odm)
{
struct dig_t *pDM_DigTable = &pDM_Odm->DM_DigTable;
+ u32 val32;
+
+ val32 = rtl8723au_read32(pDM_Odm->Adapter, ODM_REG_IGI_A_11N);
+ pDM_DigTable->CurIGValue = val32 & ODM_BIT_IGI_11N;
- pDM_DigTable->CurIGValue = (u8) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm));
pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW;
pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH;
pDM_DigTable->FALowThresh = DM_FALSEALARM_THRESH_LOW;
u8 dm_dig_max, dm_dig_min;
u8 CurrentIGI = pDM_DigTable->CurIGValue;
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG23a() ==>\n"));
- /* if (!(pDM_Odm->SupportAbility & (ODM_BB_DIG|ODM_BB_FA_CNT))) */
- if ((!(pDM_Odm->SupportAbility&ODM_BB_DIG)) || (!(pDM_Odm->SupportAbility&ODM_BB_FA_CNT))) {
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
- ("odm_DIG23a() Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n"));
- return;
- }
-
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
+ ("odm_DIG23a() ==>\n"));
if (adapter->mlmepriv.bScanInProcess) {
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG23a() Return: In Scan Progress \n"));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
+ ("odm_DIG23a() Return: In Scan Progress \n"));
return;
}
DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0;
FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0);
- FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0);
+ FirstDisConnect = (!pDM_Odm->bLinked) &&
+ (pDM_DigTable->bMediaConnect_0);
/* 1 Boundary Decision */
if ((pDM_Odm->SupportICType & ODM_RTL8723A) &&
- ((pDM_Odm->BoardType == ODM_BOARD_HIGHPWR) || pDM_Odm->ExtLNA)) {
+ (pDM_Odm->BoardType == ODM_BOARD_HIGHPWR || pDM_Odm->ExtLNA)) {
dm_dig_max = DM_DIG_MAX_NIC_HP;
dm_dig_min = DM_DIG_MIN_NIC_HP;
DIG_MaxOfMin = DM_DIG_MAX_AP_HP;
void odm_FalseAlarmCounterStatistics23a(struct dm_odm_t *pDM_Odm)
{
- u32 ret_value;
+ struct rtw_adapter *adapter = pDM_Odm->Adapter;
struct false_alarm_stats *FalseAlmCnt = &pDM_Odm->FalseAlmCnt;
-
- if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))
- return;
+ u32 ret_value, val32;
/* hold ofdm counter */
- /* hold page C counter */
- ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 1);
+ /* hold page C counter */
+ val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_HOLDC_11N);
+ val32 |= BIT(31);
+ rtl8723au_write32(adapter, ODM_REG_OFDM_FA_HOLDC_11N, val32);
/* hold page D counter */
- ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 1);
- ret_value =
- ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord);
+ val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_RSTD_11N);
+ val32 |= BIT(31);
+ rtl8723au_write32(adapter, ODM_REG_OFDM_FA_RSTD_11N, val32);
+ ret_value = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_TYPE1_11N);
FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff);
- FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16);
- ret_value =
- ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord);
+ FalseAlmCnt->Cnt_SB_Search_fail = (ret_value & 0xffff0000)>>16;
+ ret_value = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_TYPE2_11N);
FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff);
- FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16);
- ret_value =
- ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord);
+ FalseAlmCnt->Cnt_Parity_Fail = (ret_value & 0xffff0000)>>16;
+ ret_value = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_TYPE3_11N);
FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff);
- FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16);
- ret_value =
- ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord);
+ FalseAlmCnt->Cnt_Crc8_fail = (ret_value & 0xffff0000)>>16;
+ ret_value = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_TYPE4_11N);
FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff);
FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail +
FalseAlmCnt->Cnt_Fast_Fsync +
FalseAlmCnt->Cnt_SB_Search_fail;
/* hold cck counter */
- ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(12), 1);
- ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(14), 1);
+ val32 = rtl8723au_read32(adapter, ODM_REG_CCK_FA_RST_11N);
+ val32 |= (BIT(12) | BIT(14));
+ rtl8723au_write32(adapter, ODM_REG_CCK_FA_RST_11N, val32);
- ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0);
+ ret_value = rtl8723au_read32(adapter, ODM_REG_CCK_FA_LSB_11N) & 0xff;
FalseAlmCnt->Cnt_Cck_fail = ret_value;
- ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_MSB_11N, bMaskByte3);
- FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff) << 8;
+ ret_value = rtl8723au_read32(adapter, ODM_REG_CCK_FA_MSB_11N) >> 16;
+ FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff00);
- ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord);
+ ret_value = rtl8723au_read32(adapter, ODM_REG_CCK_CCA_CNT_11N);
FalseAlmCnt->Cnt_CCK_CCA =
((ret_value&0xFF)<<8) | ((ret_value&0xFF00)>>8);
if (pDM_Odm->SupportICType >= ODM_RTL8723A) {
/* reset false alarm counter registers */
- ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT(31), 1);
- ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT(31), 0);
- ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(27), 1);
- ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(27), 0);
+ val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_RSTC_11N);
+ val32 |= BIT(31);
+ rtl8723au_write32(adapter, ODM_REG_OFDM_FA_RSTC_11N, val32);
+ val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_RSTC_11N);
+ val32 &= ~BIT(31);
+ rtl8723au_write32(adapter, ODM_REG_OFDM_FA_RSTC_11N, val32);
+
+ val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_RSTD_11N);
+ val32 |= BIT(27);
+ rtl8723au_write32(adapter, ODM_REG_OFDM_FA_RSTD_11N, val32);
+ val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_RSTD_11N);
+ val32 &= ~BIT(27);
+ rtl8723au_write32(adapter, ODM_REG_OFDM_FA_RSTD_11N, val32);
+
/* update ofdm counter */
/* update page C counter */
- ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 0);
+ val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_HOLDC_11N);
+ val32 &= ~BIT(31);
+ rtl8723au_write32(adapter, ODM_REG_OFDM_FA_HOLDC_11N, val32);
+
/* update page D counter */
- ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 0);
+ val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_RSTD_11N);
+ val32 &= ~BIT(31);
+ rtl8723au_write32(adapter, ODM_REG_OFDM_FA_RSTD_11N, val32);
/* reset CCK CCA counter */
- ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N,
- BIT(13) | BIT(12), 0);
- ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N,
- BIT(13) | BIT(12), 2);
- /* reset CCK FA counter */
- ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N,
- BIT(15) | BIT(14), 0);
- ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N,
- BIT(15) | BIT(14), 2);
+ val32 = rtl8723au_read32(adapter, ODM_REG_CCK_FA_RST_11N);
+ val32 &= ~(BIT(12) | BIT(13) | BIT(14) | BIT(15));
+ rtl8723au_write32(adapter, ODM_REG_CCK_FA_RST_11N, val32);
+
+ val32 = rtl8723au_read32(adapter, ODM_REG_CCK_FA_RST_11N);
+ val32 |= (BIT(13) | BIT(15));
+ rtl8723au_write32(adapter, ODM_REG_CCK_FA_RST_11N, val32);
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
("Cnt_Crc8_fail =%d, Cnt_Mcs_fail =%d\n",
FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Cck_fail =%d\n", FalseAlmCnt->Cnt_Cck_fail));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail =%d\n", FalseAlmCnt->Cnt_Ofdm_fail));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Total False Alarm =%d\n", FalseAlmCnt->Cnt_all));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
+ ("Cnt_Cck_fail =%d\n", FalseAlmCnt->Cnt_Cck_fail));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
+ ("Cnt_Ofdm_fail =%d\n", FalseAlmCnt->Cnt_Ofdm_fail));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
+ ("Total False Alarm =%d\n", FalseAlmCnt->Cnt_all));
}
/* 3 ============================================================ */
struct false_alarm_stats *FalseAlmCnt = &pDM_Odm->FalseAlmCnt;
u8 CurCCK_CCAThres;
- if (!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD|ODM_BB_FA_CNT)))
- return;
-
if (pDM_Odm->ExtLNA)
return;
if (pDM_Odm->bLinked) {
if (pDM_Odm->RSSI_Min > 25) {
CurCCK_CCAThres = 0xcd;
- } else if ((pDM_Odm->RSSI_Min <= 25) && (pDM_Odm->RSSI_Min > 10)) {
+ } else if (pDM_Odm->RSSI_Min <= 25 && pDM_Odm->RSSI_Min > 10) {
CurCCK_CCAThres = 0x83;
} else {
if (FalseAlmCnt->Cnt_Cck_fail > 1000)
struct dig_t *pDM_DigTable = &pDM_Odm->DM_DigTable;
if (pDM_DigTable->CurCCK_CCAThres != CurCCK_CCAThres)
- ODM_Write1Byte(pDM_Odm, ODM_REG(CCK_CCA, pDM_Odm), CurCCK_CCAThres);
+ rtl8723au_write8(pDM_Odm->Adapter, ODM_REG(CCK_CCA, pDM_Odm),
+ CurCCK_CCAThres);
pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres;
pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres;
-
}
/* 3 ============================================================ */
void ODM_RF_Saving23a(struct dm_odm_t *pDM_Odm, u8 bForceInNormal)
{
struct dynamic_pwr_sav *pDM_PSTable = &pDM_Odm->DM_PSTable;
+ struct rtw_adapter *adapter = pDM_Odm->Adapter;
+ u32 val32;
u8 Rssi_Up_bound = 30;
u8 Rssi_Low_bound = 25;
- if (pDM_Odm->PatchID == 40) { /* RT_CID_819x_FUNAI_TV */
- Rssi_Up_bound = 50;
- Rssi_Low_bound = 45;
- }
if (pDM_PSTable->initialize == 0) {
- pDM_PSTable->Reg874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord)&0x1CC000)>>14;
+ pDM_PSTable->Reg874 =
+ rtl8723au_read32(adapter, 0x874) & 0x1CC000;
pDM_PSTable->RegC70 =
- (ODM_GetBBReg(pDM_Odm, 0xc70, bMaskDWord) & BIT(3)) >>3;
- pDM_PSTable->Reg85C = (ODM_GetBBReg(pDM_Odm, 0x85c, bMaskDWord)&0xFF000000)>>24;
- pDM_PSTable->RegA74 = (ODM_GetBBReg(pDM_Odm, 0xa74, bMaskDWord)&0xF000)>>12;
- /* Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord); */
+ rtl8723au_read32(adapter, 0xc70) & BIT(3);
+ pDM_PSTable->Reg85C =
+ rtl8723au_read32(adapter, 0x85c) & 0xFF000000;
+ pDM_PSTable->RegA74 = rtl8723au_read32(adapter, 0xa74) & 0xF000;
pDM_PSTable->initialize = 1;
}
if (pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) {
if (pDM_PSTable->CurRFState == RF_Save) {
- /* <tynli_note> 8723 RSSI report will be wrong. Set 0x874[5]= 1 when enter BB power saving mode. */
+ /* <tynli_note> 8723 RSSI report will be wrong.
+ * Set 0x874[5]= 1 when enter BB power saving mode. */
/* Suggested by SD3 Yu-Nan. 2011.01.20. */
- if (pDM_Odm->SupportICType == ODM_RTL8723A)
- ODM_SetBBReg(pDM_Odm, 0x874, BIT(5), 0x1); /* Reg874[5]= 1b'1 */
- ODM_SetBBReg(pDM_Odm, 0x874, 0x1C0000, 0x2); /* Reg874[20:18]= 3'b010 */
- ODM_SetBBReg(pDM_Odm, 0xc70, BIT(3), 0); /* RegC70[3]= 1'b0 */
- ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]= 0x63 */
- ODM_SetBBReg(pDM_Odm, 0x874, 0xC000, 0x2); /* Reg874[15:14]= 2'b10 */
- ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, 0x3); /* RegA75[7:4]= 0x3 */
- ODM_SetBBReg(pDM_Odm, 0x818, BIT(28), 0x0); /* Reg818[28]= 1'b0 */
- ODM_SetBBReg(pDM_Odm, 0x818, BIT(28), 0x1); /* Reg818[28]= 1'b1 */
+ /* Reg874[5]= 1b'1 */
+ if (pDM_Odm->SupportICType == ODM_RTL8723A) {
+ val32 = rtl8723au_read32(adapter, 0x874);
+ val32 |= BIT(5);
+ rtl8723au_write32(adapter, 0x874, val32);
+ }
+ /* Reg874[20:18]= 3'b010 */
+ val32 = rtl8723au_read32(adapter, 0x874);
+ val32 &= ~(BIT(18) | BIT(20));
+ val32 |= BIT(19);
+ rtl8723au_write32(adapter, 0x874, val32);
+ /* RegC70[3]= 1'b0 */
+ val32 = rtl8723au_read32(adapter, 0xc70);
+ val32 &= ~BIT(3);
+ rtl8723au_write32(adapter, 0xc70, val32);
+ /* Reg85C[31:24]= 0x63 */
+ val32 = rtl8723au_read32(adapter, 0x85c);
+ val32 &= 0x00ffffff;
+ val32 |= 0x63000000;
+ rtl8723au_write32(adapter, 0x85c, val32);
+ /* Reg874[15:14]= 2'b10 */
+ val32 = rtl8723au_read32(adapter, 0x874);
+ val32 &= ~BIT(14);
+ val32 |= BIT(15);
+ rtl8723au_write32(adapter, 0x874, val32);
+ /* RegA75[7:4]= 0x3 */
+ val32 = rtl8723au_read32(adapter, 0xa74);
+ val32 &= ~(BIT(14) | BIT(15));
+ val32 |= (BIT(12) | BIT(13));
+ rtl8723au_write32(adapter, 0xa74, val32);
+ /* Reg818[28]= 1'b0 */
+ val32 = rtl8723au_read32(adapter, 0x818);
+ val32 &= ~BIT(28);
+ rtl8723au_write32(adapter, 0x818, val32);
+ /* Reg818[28]= 1'b1 */
+ val32 = rtl8723au_read32(adapter, 0x818);
+ val32 |= BIT(28);
+ rtl8723au_write32(adapter, 0x818, val32);
} else {
- ODM_SetBBReg(pDM_Odm, 0x874, 0x1CC000, pDM_PSTable->Reg874);
- ODM_SetBBReg(pDM_Odm, 0xc70, BIT(3), pDM_PSTable->RegC70);
- ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, pDM_PSTable->Reg85C);
- ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, pDM_PSTable->RegA74);
- ODM_SetBBReg(pDM_Odm, 0x818, BIT(28), 0x0);
-
- if (pDM_Odm->SupportICType == ODM_RTL8723A)
- ODM_SetBBReg(pDM_Odm, 0x874, BIT(5), 0x0); /* Reg874[5]= 1b'0 */
+ val32 = rtl8723au_read32(adapter, 0x874);
+ val32 |= pDM_PSTable->Reg874;
+ rtl8723au_write32(adapter, 0x874, val32);
+
+ val32 = rtl8723au_read32(adapter, 0xc70);
+ val32 |= pDM_PSTable->RegC70;
+ rtl8723au_write32(adapter, 0xc70, val32);
+
+ val32 = rtl8723au_read32(adapter, 0x85c);
+ val32 |= pDM_PSTable->Reg85C;
+ rtl8723au_write32(adapter, 0x85c, val32);
+
+ val32 = rtl8723au_read32(adapter, 0xa74);
+ val32 |= pDM_PSTable->RegA74;
+ rtl8723au_write32(adapter, 0xa74, val32);
+
+ val32 = rtl8723au_read32(adapter, 0x818);
+ val32 &= ~BIT(28);
+ rtl8723au_write32(adapter, 0x818, val32);
+
+ /* Reg874[5]= 1b'0 */
+ if (pDM_Odm->SupportICType == ODM_RTL8723A) {
+ val32 = rtl8723au_read32(adapter, 0x874);
+ val32 &= ~BIT(5);
+ rtl8723au_write32(adapter, 0x874, val32);
+ }
}
pDM_PSTable->PreRFState = pDM_PSTable->CurRFState;
}
struct odm_rate_adapt *pOdmRA = &pDM_Odm->RateAdaptive;
pOdmRA->Type = DM_Type_ByDriver;
- if (pOdmRA->Type == DM_Type_ByDriver)
- pDM_Odm->bUseRAMask = true;
- else
- pDM_Odm->bUseRAMask = false;
pOdmRA->RATRState = DM_RATR_STA_INIT;
pOdmRA->HighRSSIThresh = 50;
break;
case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G):
case (ODM_WM_A|ODM_WM_B|ODM_WM_G|ODM_WM_N24G):
- if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) {
+ if (pHalData->rf_type == RF_1T2R ||
+ pHalData->rf_type == RF_1T1R) {
if (rssi_level == DM_RATR_STA_HIGH) {
rate_bitmap = 0x000f0000;
} else if (rssi_level == DM_RATR_STA_MIDDLE) {
default:
/* case WIRELESS_11_24N: */
/* case WIRELESS_11_5N: */
- if (pDM_Odm->RFType == RF_1T2R)
+ if (pHalData->rf_type == RF_1T2R)
rate_bitmap = 0x000fffff;
else
rate_bitmap = 0x0fffffff;
break;
}
- /* printk("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n", __func__, rssi_level, WirelessMode, rate_bitmap); */
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n", rssi_level, WirelessMode, rate_bitmap));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD,
+ (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n",
+ rssi_level, WirelessMode, rate_bitmap));
return rate_bitmap;
-
}
/*-----------------------------------------------------------------------------
- * Function: odm_RefreshRateAdaptiveMask23a()
+ * Function: odm_RefreshRateAdaptiveMask()
*
* Overview: Update rate table mask according to rssi
*
*05/27/2009 hpfan Create Version 0.
*
*---------------------------------------------------------------------------*/
-void odm_RefreshRateAdaptiveMask23a(struct dm_odm_t *pDM_Odm)
-{
- if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK))
- return;
- /* */
- /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
- /* at the same time. In the stage2/3, we need to prive universal interface and merge all */
- /* HW dynamic mechanism. */
- /* */
- odm_RefreshRateAdaptiveMask23aCE23a(pDM_Odm);
-}
-
-void odm_RefreshRateAdaptiveMask23aCE23a(struct dm_odm_t *pDM_Odm)
+static void odm_RefreshRateAdaptiveMask(struct dm_odm_t *pDM_Odm)
{
+ struct rtw_adapter *pAdapter = pDM_Odm->Adapter;
+ u32 smoothed;
u8 i;
- struct rtw_adapter *pAdapter = pDM_Odm->Adapter;
if (pAdapter->bDriverStopped) {
ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE,
- ("<---- odm_RefreshRateAdaptiveMask23a(): driver is going to unload\n"));
+ ("<---- %s: driver is going to unload\n",
+ __func__));
return;
}
- if (!pDM_Odm->bUseRAMask) {
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD,
- ("<---- odm_RefreshRateAdaptiveMask23a(): driver does not control rate adaptive mask\n"));
- return;
- }
-
- /* printk("==> %s \n", __func__); */
-
for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
struct sta_info *pstat = pDM_Odm->pODM_StaInfo[i];
if (pstat) {
- if (ODM_RAStateCheck23a(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, false, &pstat->rssi_level)) {
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD,
+ smoothed = pstat->rssi_stat.UndecoratedSmoothedPWDB;
+ if (ODM_RAStateCheck23a(pDM_Odm, smoothed, false,
+ &pstat->rssi_level)) {
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK,
+ ODM_DBG_LOUD,
("RSSI:%d, RSSI_LEVEL:%d\n",
- pstat->rssi_stat.UndecoratedSmoothedPWDB,
- pstat->rssi_level));
- rtw_hal_update_ra_mask23a(pstat, pstat->rssi_level);
+ smoothed,
+ pstat->rssi_level));
+ rtw_hal_update_ra_mask23a(pstat,
+ pstat->rssi_level);
}
-
}
}
-
}
/* Return Value: bool */
LowRSSIThreshForRA += GoUpGap;
break;
default:
- ODM_RT_ASSERT(pDM_Odm, false, ("wrong rssi level setting %d !", *pRATRState));
+ ODM_RT_ASSERT(pDM_Odm, false, ("wrong rssi level setting %d !",
+ *pRATRState));
break;
}
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
}
-void odm_RSSIMonitorCheck23a(struct dm_odm_t *pDM_Odm)
-{
- /* For AP/ADSL use struct rtl8723a_priv * */
- /* For CE/NIC use struct rtw_adapter * */
-
- if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR))
- return;
-
- /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
- /* at the same time. In the stage2/3, we need to prive universal interface and merge all */
- /* HW dynamic mechanism. */
- odm_RSSIMonitorCheck23aCE(pDM_Odm);
-} /* odm_RSSIMonitorCheck23a */
-
static void
-FindMinimumRSSI(
- struct rtw_adapter *pAdapter
- )
+FindMinimumRSSI(struct rtw_adapter *pAdapter)
{
struct hal_data_8723a *pHalData = GET_HAL_DATA(pAdapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
/* 1 1.Determine the minimum RSSI */
- if ((!pDM_Odm->bLinked) &&
- (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0))
+ if (!pDM_Odm->bLinked && !pdmpriv->EntryMinUndecoratedSmoothedPWDB)
pdmpriv->MinUndecoratedPWDBForDM = 0;
else
- pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+ pdmpriv->MinUndecoratedPWDBForDM =
+ pdmpriv->EntryMinUndecoratedSmoothedPWDB;
}
-void odm_RSSIMonitorCheck23aCE(struct dm_odm_t *pDM_Odm)
+static void odm_RSSIMonitorCheck(struct dm_odm_t *pDM_Odm)
{
struct rtw_adapter *Adapter = pDM_Odm->Adapter;
struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
- int i;
- int tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff;
+ int i;
+ int MaxDB = 0, MinDB = 0xff;
u8 sta_cnt = 0;
+ u32 tmpdb;
u32 PWDB_rssi[NUM_STA] = {0};/* 0~15]:MACID, [16~31]:PWDB_rssi */
struct sta_info *psta;
for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
psta = pDM_Odm->pODM_StaInfo[i];
if (psta) {
- if (psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB)
- tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
+ if (psta->rssi_stat.UndecoratedSmoothedPWDB < MinDB)
+ MinDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
- if (psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB)
- tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
+ if (psta->rssi_stat.UndecoratedSmoothedPWDB > MaxDB)
+ MaxDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
- if (psta->rssi_stat.UndecoratedSmoothedPWDB != (-1))
- PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16));
+ if (psta->rssi_stat.UndecoratedSmoothedPWDB != -1) {
+ tmpdb = psta->rssi_stat.UndecoratedSmoothedPWDB;
+ PWDB_rssi[sta_cnt++] = psta->mac_id |
+ (tmpdb << 16);
+ }
}
}
for (i = 0; i < sta_cnt; i++) {
- if (PWDB_rssi[i] != (0)) {
- if (pHalData->fw_ractrl) /* Report every sta's RSSI to FW */
- rtl8723a_set_rssi_cmd(Adapter, (u8 *)&PWDB_rssi[i]);
- }
+ if (PWDB_rssi[i] != (0))
+ rtl8723a_set_rssi_cmd(Adapter, (u8 *)&PWDB_rssi[i]);
}
- if (tmpEntryMaxPWDB != 0) /* If associated entry is found */
- pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;
- else
- pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0;
+ pdmpriv->EntryMaxUndecoratedSmoothedPWDB = MaxDB;
- if (tmpEntryMinPWDB != 0xff) /* If associated entry is found */
- pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB;
+ if (MinDB != 0xff) /* If associated entry is found */
+ pdmpriv->EntryMinUndecoratedSmoothedPWDB = MinDB;
else
pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0;
FindMinimumRSSI(Adapter);/* get pdmpriv->MinUndecoratedPWDBForDM */
- ODM_CmnInfoUpdate23a(&pHalData->odmpriv, ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM);
+ ODM_CmnInfoUpdate23a(&pHalData->odmpriv, ODM_CMNINFO_RSSI_MIN,
+ pdmpriv->MinUndecoratedPWDBForDM);
}
/* endif */
/* 3 Tx Power Tracking */
/* 3 ============================================================ */
-void odm_TXPowerTrackingInit23a(struct dm_odm_t *pDM_Odm)
-{
- odm_TXPowerTrackingThermalMeterInit23a(pDM_Odm);
-}
-
-void odm_TXPowerTrackingThermalMeterInit23a(struct dm_odm_t *pDM_Odm)
+static void odm_TXPowerTrackingInit(struct dm_odm_t *pDM_Odm)
{
struct rtw_adapter *Adapter = pDM_Odm->Adapter;
struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
pdmpriv->TXPowercount = 0;
pdmpriv->bTXPowerTrackingInit = false;
pdmpriv->TxPowerTrackControl = true;
- MSG_8723A("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl);
+ MSG_8723A("pdmpriv->TxPowerTrackControl = %d\n",
+ pdmpriv->TxPowerTrackControl);
pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true;
}
-void ODM_TXPowerTrackingCheck23a(struct dm_odm_t *pDM_Odm)
-{
- /* For AP/ADSL use struct rtl8723a_priv * */
- /* For CE/NIC use struct rtw_adapter * */
-
- /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
- /* at the same time. In the stage2/3, we need to prive universal interface and merge all */
- /* HW dynamic mechanism. */
- odm_TXPowerTrackingCheckCE23a(pDM_Odm);
-}
-
-void odm_TXPowerTrackingCheckCE23a(struct dm_odm_t *pDM_Odm)
-{
-}
-
/* EDCA Turbo */
static void ODM_EdcaTurboInit23a(struct dm_odm_t *pDM_Odm)
{
-
struct rtw_adapter *Adapter = pDM_Odm->Adapter;
pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false;
- pDM_Odm->DM_EDCA_Table.bIsCurRDLState = false;
Adapter->recvpriv.bIsAnyNonBEPkts = false;
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VO PARAM: 0x%x\n", ODM_Read4Byte(pDM_Odm, ODM_EDCA_VO_PARAM)));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VI PARAM: 0x%x\n", ODM_Read4Byte(pDM_Odm, ODM_EDCA_VI_PARAM)));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BE PARAM: 0x%x\n", ODM_Read4Byte(pDM_Odm, ODM_EDCA_BE_PARAM)));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BK PARAM: 0x%x\n", ODM_Read4Byte(pDM_Odm, ODM_EDCA_BK_PARAM)));
-
-} /* ODM_InitEdcaTurbo */
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD,
+ ("Orginial VO PARAM: 0x%x\n",
+ rtl8723au_read32(Adapter, ODM_EDCA_VO_PARAM)));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD,
+ ("Orginial VI PARAM: 0x%x\n",
+ rtl8723au_read32(Adapter, ODM_EDCA_VI_PARAM)));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD,
+ ("Orginial BE PARAM: 0x%x\n",
+ rtl8723au_read32(Adapter, ODM_EDCA_BE_PARAM)));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD,
+ ("Orginial BK PARAM: 0x%x\n",
+ rtl8723au_read32(Adapter, ODM_EDCA_BK_PARAM)));
+}
static void odm_EdcaTurboCheck23a(struct dm_odm_t *pDM_Odm)
{
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
u32 trafficIndex;
u32 edca_param;
- u64 cur_tx_bytes = 0;
- u64 cur_rx_bytes = 0;
- u8 bbtchange = false;
+ u64 cur_tx_bytes;
+ u64 cur_rx_bytes;
/* For AP/ADSL use struct rtl8723a_priv * */
/* For CE/NIC use struct rtw_adapter * */
- /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
- /* at the same time. In the stage2/3, we need to prive universal interface and merge all */
- /* HW dynamic mechanism. */
-
- if (!(pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO))
- return;
+ /*
+ * 2011/09/29 MH In HW integration first stage, we provide 4
+ * different handle to operate at the same time. In the stage2/3,
+ * we need to prive universal interface and merge all HW dynamic
+ * mechanism.
+ */
if ((pregpriv->wifi_spec == 1))/* (pmlmeinfo->HT_enable == 0)) */
goto dm_CheckEdcaTurbo_EXIT;
goto dm_CheckEdcaTurbo_EXIT;
/* Check if the status needs to be changed. */
- if ((bbtchange) || (!precvpriv->bIsAnyNonBEPkts)) {
+ if (!precvpriv->bIsAnyNonBEPkts) {
cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes;
cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes;
precvpriv->last_rx_bytes = precvpriv->rx_bytes;
}
-u32 GetPSDData(struct dm_odm_t *pDM_Odm, unsigned int point, u8 initial_gain_psd)
+u32 GetPSDData(struct dm_odm_t *pDM_Odm, unsigned int point,
+ u8 initial_gain_psd)
{
- u32 psd_report;
+ struct rtw_adapter *adapter = pDM_Odm->Adapter;
+ u32 psd_report, val32;
/* Set DCO frequency index, offset = (40MHz/SamplePts)*point */
- ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point);
+ val32 = rtl8723au_read32(adapter, 0x808);
+ val32 &= ~0x3ff;
+ val32 |= (point & 0x3ff);
+ rtl8723au_write32(adapter, 0x808, val32);
/* Start PSD calculation, Reg808[22]= 0->1 */
- ODM_SetBBReg(pDM_Odm, 0x808, BIT(22), 1);
+ val32 = rtl8723au_read32(adapter, 0x808);
+ val32 |= BIT(22);
+ rtl8723au_write32(adapter, 0x808, val32);
/* Need to wait for HW PSD report */
udelay(30);
- ODM_SetBBReg(pDM_Odm, 0x808, BIT(22), 0);
+ val32 = rtl8723au_read32(adapter, 0x808);
+ val32 &= ~BIT(22);
+ rtl8723au_write32(adapter, 0x808, val32);
/* Read PSD report, Reg8B4[15:0] */
- psd_report = ODM_GetBBReg(pDM_Odm, 0x8B4, bMaskDWord) & 0x0000FFFF;
+ psd_report = rtl8723au_read32(adapter, 0x8B4) & 0x0000FFFF;
- psd_report = (u32)(ConvertTo_dB23a(psd_report))+(u32)(initial_gain_psd-0x1c);
+ psd_report = (u32)(ConvertTo_dB23a(psd_report)) +
+ (u32)(initial_gain_psd-0x1c);
return psd_report;
}
-u32
-ConvertTo_dB23a(
- u32 Value)
+u32 ConvertTo_dB23a(u32 Value)
{
u8 i;
u8 j;
/* */
/* Description: */
-/*Set Single/Dual Antenna default setting for products that do not do detection in advance. */
+/* Set Single/Dual Antenna default setting for products that do not
+ * do detection in advance. */
/* */
/* Added by Joseph, 2012.03.22 */
/* */
/* 2 8723A ANT DETECT */
-static void odm_PHY_SaveAFERegisters(
- struct dm_odm_t *pDM_Odm,
- u32 *AFEReg,
- u32 *AFEBackup,
- u32 RegisterNum
- )
+static void odm_PHY_SaveAFERegisters(struct dm_odm_t *pDM_Odm, u32 *AFEReg,
+ u32 *AFEBackup, u32 RegisterNum)
{
u32 i;
- /* RTPRINT(FINIT, INIT_IQK, ("Save ADDA parameters.\n")); */
for (i = 0 ; i < RegisterNum ; i++)
- AFEBackup[i] = ODM_GetBBReg(pDM_Odm, AFEReg[i], bMaskDWord);
+ AFEBackup[i] = rtl8723au_read32(pDM_Odm->Adapter, AFEReg[i]);
}
static void odm_PHY_ReloadAFERegisters(struct dm_odm_t *pDM_Odm, u32 *AFEReg,
u32 i;
for (i = 0 ; i < RegiesterNum; i++)
- ODM_SetBBReg(pDM_Odm, AFEReg[i], bMaskDWord, AFEBackup[i]);
+ rtl8723au_write32(pDM_Odm->Adapter, AFEReg[i], AFEBackup[i]);
}
/* 2 8723A ANT DETECT */
bool ODM_SingleDualAntennaDetection(struct dm_odm_t *pDM_Odm, u8 mode)
{
struct sw_ant_sw *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
+ struct rtw_adapter *adapter = pDM_Odm->Adapter;
u32 CurrentChannel, RfLoopReg;
u8 n;
- u32 Reg88c, Regc08, Reg874, Regc50;
+ u32 Reg88c, Regc08, Reg874, Regc50, val32;
u8 initial_gain = 0x5a;
u32 PSD_report_tmp;
u32 AntA_report = 0x0, AntB_report = 0x0, AntO_report = 0x0;
return bResult;
/* 1 Backup Current RF/BB Settings */
- CurrentChannel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask);
+ CurrentChannel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL,
+ bRFRegOffsetMask);
RfLoopReg = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x00, bRFRegOffsetMask);
- ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A); /* change to Antenna A */
+ /* change to Antenna A */
+ val32 = rtl8723au_read32(adapter, rFPGA0_XA_RFInterfaceOE);
+ val32 &= ~0x300;
+ val32 |= 0x100; /* Enable antenna A */
+ rtl8723au_write32(adapter, rFPGA0_XA_RFInterfaceOE, val32);
+
/* Step 1: USE IQK to transmitter single tone */
udelay(10);
/* Store A Path Register 88c, c08, 874, c50 */
- Reg88c = ODM_GetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord);
- Regc08 = ODM_GetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord);
- Reg874 = ODM_GetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord);
- Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord);
+ Reg88c = rtl8723au_read32(adapter, rFPGA0_AnalogParameter4);
+ Regc08 = rtl8723au_read32(adapter, rOFDM0_TRMuxPar);
+ Reg874 = rtl8723au_read32(adapter, rFPGA0_XCD_RFInterfaceSW);
+ Regc50 = rtl8723au_read32(adapter, rOFDM0_XAAGCCore1);
/* Store AFE Registers */
odm_PHY_SaveAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16);
/* Set PSD 128 pts */
- ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT(14) | BIT(15), 0x0);
+ val32 = rtl8723au_read32(adapter, rFPGA0_PSDFunction);
+ val32 &= ~(BIT(14) | BIT(15));
+ rtl8723au_write32(adapter, rFPGA0_PSDFunction, val32);
/* To SET CH1 to do */
- ODM_SetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x01); /* Channel 1 */
+ ODM_SetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x01);
/* AFE all on step */
- ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rTx_CCK_RFON, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rTx_CCK_BBON, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rTx_OFDM_RFON, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rTx_OFDM_BBON, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rTx_To_Rx, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rTx_To_Tx, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rRx_CCK, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rRx_OFDM, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rRx_Wait_RIFS, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rRx_TO_Rx, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rStandby, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rSleep, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rPMPD_ANAEN, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_SwitchControl, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rBlue_Tooth, bMaskDWord, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rRx_Wait_CCA, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rTx_CCK_RFON, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rTx_CCK_BBON, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rTx_OFDM_RFON, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rTx_OFDM_BBON, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rTx_To_Rx, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rTx_To_Tx, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rRx_CCK, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rRx_OFDM, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rRx_Wait_RIFS, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rRx_TO_Rx, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rStandby, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rSleep, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rPMPD_ANAEN, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rFPGA0_XCD_SwitchControl, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rBlue_Tooth, 0x6FDB25A4);
/* 3 wire Disable */
- ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, 0xCCF000C0);
+ rtl8723au_write32(adapter, rFPGA0_AnalogParameter4, 0xCCF000C0);
/* BB IQK Setting */
- ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800E4);
- ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000);
+ rtl8723au_write32(adapter, rOFDM0_TRMuxPar, 0x000800E4);
+ rtl8723au_write32(adapter, rFPGA0_XCD_RFInterfaceSW, 0x22208000);
/* IQK setting tone@ 4.34Mhz */
- ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008C1C);
- ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00);
+ rtl8723au_write32(adapter, rTx_IQK_Tone_A, 0x10008C1C);
+ rtl8723au_write32(adapter, rTx_IQK, 0x01007c00);
/* Page B init */
- ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00080000);
- ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000);
- ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800);
- ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f);
- ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82150008);
- ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28150008);
- ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x001028d0);
+ rtl8723au_write32(adapter, rConfig_AntA, 0x00080000);
+ rtl8723au_write32(adapter, rConfig_AntA, 0x0f600000);
+ rtl8723au_write32(adapter, rRx_IQK, 0x01004800);
+ rtl8723au_write32(adapter, rRx_IQK_Tone_A, 0x10008c1f);
+ rtl8723au_write32(adapter, rTx_IQK_PI_A, 0x82150008);
+ rtl8723au_write32(adapter, rRx_IQK_PI_A, 0x28150008);
+ rtl8723au_write32(adapter, rIQK_AGC_Rsp, 0x001028d0);
/* RF loop Setting */
ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x0, 0xFFFFF, 0x50008);
/* IQK Single tone start */
- ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000);
- ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
+ rtl8723au_write32(adapter, rFPGA0_IQK, 0x80800000);
+ rtl8723au_write32(adapter, rIQK_AGC_Pts, 0xf8000000);
udelay(1000);
PSD_report_tmp = 0x0;
PSD_report_tmp = 0x0;
- ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B); /* change to Antenna B */
+ val32 = rtl8723au_read32(adapter, rFPGA0_XA_RFInterfaceOE);
+ val32 &= ~0x300;
+ val32 |= 0x200; /* Enable antenna B */
+ rtl8723au_write32(adapter, rFPGA0_XA_RFInterfaceOE, val32);
udelay(10);
for (n = 0; n < 2; n++) {
}
/* change to open case */
- ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, 0); /* change to Ant A and B all open case */
+ /* change to Ant A and B all open case */
+ val32 = rtl8723au_read32(adapter, rFPGA0_XA_RFInterfaceOE);
+ val32 &= ~0x300;
+ rtl8723au_write32(adapter, rFPGA0_XA_RFInterfaceOE, val32);
udelay(10);
for (n = 0; n < 2; n++) {
}
/* Close IQK Single Tone function */
- ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000);
+ rtl8723au_write32(adapter, rFPGA0_IQK, 0x00000000);
PSD_report_tmp = 0x0;
/* 1 Return to antanna A */
- ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A);
- ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, Reg88c);
- ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, Regc08);
- ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, Reg874);
- ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7F, 0x40);
- ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord, Regc50);
- ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel);
+ val32 = rtl8723au_read32(adapter, rFPGA0_XA_RFInterfaceOE);
+ val32 &= ~0x300;
+ val32 |= 0x100; /* Enable antenna A */
+ rtl8723au_write32(adapter, rFPGA0_XA_RFInterfaceOE, val32);
+ rtl8723au_write32(adapter, rFPGA0_AnalogParameter4, Reg88c);
+ rtl8723au_write32(adapter, rOFDM0_TRMuxPar, Regc08);
+ rtl8723au_write32(adapter, rFPGA0_XCD_RFInterfaceSW, Reg874);
+ val32 = rtl8723au_read32(adapter, rOFDM0_XAAGCCore1);
+ val32 &= ~0x7f;
+ val32 |= 0x40;
+ rtl8723au_write32(adapter, rOFDM0_XAAGCCore1, val32);
+
+ rtl8723au_write32(adapter, rOFDM0_XAAGCCore1, Regc50);
+ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
+ CurrentChannel);
ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x00, bRFRegOffsetMask, RfLoopReg);
/* Reload AFE Registers */
odm_PHY_ReloadAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16);
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d \n", 2416, AntA_report));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d \n", 2416, AntB_report));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_O[%d]= %d \n", 2416, AntO_report));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
+ ("psd_report_A[%d]= %d \n", 2416, AntA_report));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
+ ("psd_report_B[%d]= %d \n", 2416, AntB_report));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
+ ("psd_report_O[%d]= %d \n", 2416, AntO_report));
/* 2 Test Ant B based on Ant A is ON */
if (mode == ANTTESTB) {
if ((AntO_report >= 100) & (AntO_report < 118)) {
if (AntA_report > (AntO_report+1)) {
pDM_SWAT_Table->ANTA_ON = false;
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant A is OFF"));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,
+ ODM_DBG_LOUD, ("Ant A is OFF"));
} else {
pDM_SWAT_Table->ANTA_ON = true;
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant A is ON"));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,
+ ODM_DBG_LOUD, ("Ant A is ON"));
}
if (AntB_report > (AntO_report+2)) {
pDM_SWAT_Table->ANTB_ON = false;
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant B is OFF"));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,
+ ODM_DBG_LOUD, ("Ant B is OFF"));
} else {
pDM_SWAT_Table->ANTB_ON = true;
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant B is ON"));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,
+ ODM_DBG_LOUD, ("Ant B is ON"));
}
}
} else {
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
- pDM_SWAT_Table->ANTA_ON = true; /* Set Antenna A on as default */
- pDM_SWAT_Table->ANTB_ON = false; /* Set Antenna B off as default */
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
+ ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
+ /* Set Antenna A on as default */
+ pDM_SWAT_Table->ANTA_ON = true;
+ /* Set Antenna B off as default */
+ pDM_SWAT_Table->ANTB_ON = false;
bResult = false;
}
- return bResult;
-}
-/* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */
-void odm_dtc(struct dm_odm_t *pDM_Odm)
-{
+ return bResult;
}
{
s32 RetSig = 0;
- if ((pDM_Odm->SupportInterface == ODM_ITRF_USB) || (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)) {
- if (CurrSig >= 51 && CurrSig <= 100)
- RetSig = 100;
- else if (CurrSig >= 41 && CurrSig <= 50)
- RetSig = 80 + ((CurrSig - 40)*2);
- else if (CurrSig >= 31 && CurrSig <= 40)
- RetSig = 66 + (CurrSig - 30);
- else if (CurrSig >= 21 && CurrSig <= 30)
- RetSig = 54 + (CurrSig - 20);
- else if (CurrSig >= 10 && CurrSig <= 20)
- RetSig = 42 + (((CurrSig - 10) * 2) / 3);
- else if (CurrSig >= 5 && CurrSig <= 9)
- RetSig = 22 + (((CurrSig - 5) * 3) / 2);
- else if (CurrSig >= 1 && CurrSig <= 4)
- RetSig = 6 + (((CurrSig - 1) * 3) / 2);
- else
- RetSig = CurrSig;
- }
+ if (CurrSig >= 51 && CurrSig <= 100)
+ RetSig = 100;
+ else if (CurrSig >= 41 && CurrSig <= 50)
+ RetSig = 80 + ((CurrSig - 40)*2);
+ else if (CurrSig >= 31 && CurrSig <= 40)
+ RetSig = 66 + (CurrSig - 30);
+ else if (CurrSig >= 21 && CurrSig <= 30)
+ RetSig = 54 + (CurrSig - 20);
+ else if (CurrSig >= 10 && CurrSig <= 20)
+ RetSig = 42 + (((CurrSig - 10) * 2) / 3);
+ else if (CurrSig >= 5 && CurrSig <= 9)
+ RetSig = 22 + (((CurrSig - 5) * 3) / 2);
+ else if (CurrSig >= 1 && CurrSig <= 4)
+ RetSig = 6 + (((CurrSig - 1) * 3) / 2);
+ else
+ RetSig = CurrSig;
+
return RetSig;
}
******************************************************************************/
#include "odm_precomp.h"
+#include "usb_ops_linux.h"
void
odm_ConfigRFReg_8723A(
}
}
-void odm_ConfigMAC_8723A(struct dm_odm_t *pDM_Odm,
- u32 Addr,
- u8 Data
- )
+void odm_ConfigMAC_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u8 data)
{
- ODM_Write1Byte(pDM_Odm, Addr, Data);
+ rtl8723au_write8(pDM_Odm->Adapter, addr, data);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
- ("===> ODM_ConfigMACWithHeaderFile23a: [MAC_REG] %08X %08X\n",
- Addr, Data));
+ ("===> %s: [MAC_REG] %08X %08X\n", __func__, addr, data));
}
-void
-odm_ConfigBB_AGC_8723A(
- struct dm_odm_t *pDM_Odm,
- u32 Addr,
- u32 Bitmask,
- u32 Data
- )
+void odm_ConfigBB_AGC_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u32 data)
{
- ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
+ rtl8723au_write32(pDM_Odm->Adapter, addr, data);
/* Add 1us delay between BB/RF register setting. */
udelay(1);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
- ("===> ODM_ConfigBBWithHeaderFile23a: [AGC_TAB] %08X %08X\n",
- Addr, Data));
+ ("===> %s: [AGC_TAB] %08X %08X\n", __func__, addr, data));
}
void
-odm_ConfigBB_PHY_8723A(
- struct dm_odm_t *pDM_Odm,
- u32 Addr,
- u32 Bitmask,
- u32 Data
- )
+odm_ConfigBB_PHY_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u32 data)
{
- if (Addr == 0xfe)
+ if (addr == 0xfe)
msleep(50);
- else if (Addr == 0xfd)
+ else if (addr == 0xfd)
mdelay(5);
- else if (Addr == 0xfc)
+ else if (addr == 0xfc)
mdelay(1);
- else if (Addr == 0xfb)
+ else if (addr == 0xfb)
udelay(50);
- else if (Addr == 0xfa)
+ else if (addr == 0xfa)
udelay(5);
- else if (Addr == 0xf9)
+ else if (addr == 0xf9)
udelay(1);
- else if (Addr == 0xa24)
- pDM_Odm->RFCalibrateInfo.RegA24 = Data;
- ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
+ else if (addr == 0xa24)
+ pDM_Odm->RFCalibrateInfo.RegA24 = data;
+ rtl8723au_write32(pDM_Odm->Adapter, addr, data);
/* Add 1us delay between BB/RF register setting. */
udelay(1);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
- ("===> ODM_ConfigBBWithHeaderFile23a: [PHY_REG] %08X %08X\n",
- Addr, Data));
+ ("===> %s: [PHY_REG] %08X %08X\n", __func__, addr, data));
}
}
u32 GlobalDebugLevel23A;
+
+void rt_trace(int comp, int level, const char *fmt, ...)
+{
+ struct va_format vaf;
+ va_list args;
+
+ va_start(args, fmt);
+
+ vaf.fmt = fmt;
+ vaf.va = &args;
+
+ pr_info(DRIVER_PREFIX " [0x%08x,%d] %pV", comp, level, &vaf);
+
+ va_end(args);
+}
/* */
#include <usb_ops_linux.h>
-u8 ODM_Read1Byte(struct dm_odm_t *pDM_Odm,
- u32 RegAddr
- )
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- return rtl8723au_read8(Adapter, RegAddr);
-}
-
-u16 ODM_Read2Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr)
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- return rtl8723au_read16(Adapter, RegAddr);
-}
-
-u32 ODM_Read4Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr)
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- return rtl8723au_read32(Adapter, RegAddr);
-}
-
-void ODM_Write1Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr, u8 Data)
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- rtl8723au_write8(Adapter, RegAddr, Data);
-}
-
-void ODM_Write2Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr, u16 Data)
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- rtl8723au_write16(Adapter, RegAddr, Data);
-}
-
-void ODM_Write4Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr, u32 Data)
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- rtl8723au_write32(Adapter, RegAddr, Data);
-}
-
-void ODM_SetMACReg(
- struct dm_odm_t *pDM_Odm,
- u32 RegAddr,
- u32 BitMask,
- u32 Data
- )
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
-}
-
-u32 ODM_GetMACReg(
- struct dm_odm_t *pDM_Odm,
- u32 RegAddr,
- u32 BitMask
- )
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
-}
-
-void ODM_SetBBReg(
- struct dm_odm_t *pDM_Odm,
- u32 RegAddr,
- u32 BitMask,
- u32 Data
- )
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
-}
-
-u32 ODM_GetBBReg(
- struct dm_odm_t *pDM_Odm,
- u32 RegAddr,
- u32 BitMask
- )
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
-}
-
void ODM_SetRFReg(
struct dm_odm_t *pDM_Odm,
enum RF_RADIO_PATH eRFPath,
pBtSec->bUsedHwEncrypt = true;
else
pBtSec->bUsedHwEncrypt = false;
- RT_TRACE(_module_rtl871x_security_c_, _drv_info_, ("%s: bUsedHwEncrypt =%d\n", __func__, pBtSec->bUsedHwEncrypt));
+ RT_TRACE(_module_rtl871x_security_c_, _drv_info_,
+ "%s: bUsedHwEncrypt =%d\n", __func__, pBtSec->bUsedHwEncrypt);
pBtSec->RSNIE.Octet = pBtSec->RSNIEBuf;
}
pBtDbg->dbgHciInfo.hciCmdCntDisconnectPhyLink++;
PLH = *((u8 *)pHciCmd->Data);
- PhysLinkDisconnectReason = (*((u8 *)pHciCmd->Data+1));
+ PhysLinkDisconnectReason = *((u8 *)pHciCmd->Data+1);
RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_DISCONNECT_PHYSICAL_LINK PhyHandle = 0x%x, Reason = 0x%x\n",
PLH, PhysLinkDisconnectReason));
RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_MAC_CONNECT_COMPLETE\n"));
if (pBTInfo->BtAsocEntry[EntryNum].AMPRole == AMP_BTAP_JOINER) {
- RT_TRACE(_module_rtl871x_security_c_,
- _drv_info_, ("StateConnecting \n"));
+ RT_TRACE(_module_rtl871x_security_c_, _drv_info_,
+ "StateConnecting\n");
}
break;
case STATE_CMD_DISCONNECT_PHY_LINK:
btdm_1AntUpdateHalRAMask(struct rtw_adapter *padapter, u32 mac_id, u32 filter)
{
u8 init_rate = 0;
- u8 raid;
+ u8 raid, arg;
u32 mask;
u8 shortGIrate = false;
int supportRateNum = 0;
mask &= ~filter;
init_rate = get_highest_rate_idx23a(mask)&0x3f;
- if (pHalData->fw_ractrl) {
- u8 arg = 0;
+ arg = mac_id&0x1f;/* MACID */
+ arg |= BIT(7);
+ if (true == shortGIrate)
+ arg |= BIT(5);
- arg = mac_id&0x1f;/* MACID */
- arg |= BIT(7);
- if (true == shortGIrate)
- arg |= BIT(5);
-
- RTPRINT(FBT, BT_TRACE,
- ("[BTCoex], Update FW RAID entry, MASK = 0x%08x, "
- "arg = 0x%02x\n", mask, arg));
-
- rtl8723a_set_raid_cmd(padapter, mask, arg);
- } else {
- if (shortGIrate)
- init_rate |= BIT(6);
+ RTPRINT(FBT, BT_TRACE,
+ ("[BTCoex], Update FW RAID entry, MASK = 0x%08x, "
+ "arg = 0x%02x\n", mask, arg));
- rtl8723au_write8(padapter, REG_INIDATA_RATE_SEL + mac_id,
- init_rate);
- }
+ rtl8723a_set_raid_cmd(padapter, mask, arg);
psta->init_rate = init_rate;
pdmpriv->INIDATA_RATE[mac_id] = init_rate;
pHalData->bt_coexist.bt_radiosharedtype = pHalData->EEPROMBluetoothRadioShared;
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("BT Coexistance = 0x%x\n", rtl8723a_BT_coexist(padapter)));
+ "BT Coexistance = 0x%x\n", rtl8723a_BT_coexist(padapter));
if (rtl8723a_BT_coexist(padapter)) {
if (pHalData->bt_coexist.BT_Ant_Num == Ant_x2) {
BTDM_SetBtCoexCurrAntNum(padapter, 2);
- RT_TRACE(_module_hal_init_c_, _drv_info_, ("BlueTooth BT_Ant_Num = Antx2\n"));
+ RT_TRACE(_module_hal_init_c_, _drv_info_,
+ "BlueTooth BT_Ant_Num = Antx2\n");
} else if (pHalData->bt_coexist.BT_Ant_Num == Ant_x1) {
BTDM_SetBtCoexCurrAntNum(padapter, 1);
- RT_TRACE(_module_hal_init_c_, _drv_info_, ("BlueTooth BT_Ant_Num = Antx1\n"));
+ RT_TRACE(_module_hal_init_c_, _drv_info_,
+ "BlueTooth BT_Ant_Num = Antx1\n");
}
pHalData->bt_coexist.bBTBusyTraffic = false;
pHalData->bt_coexist.bBTTrafficModeSet = false;
pHalData->bt_coexist.PreviousState = 0;
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("bt_radiosharedType = 0x%x\n",
- pHalData->bt_coexist.bt_radiosharedtype));
+ "bt_radiosharedType = 0x%x\n",
+ pHalData->bt_coexist.bt_radiosharedtype);
}
}
/* arg[5] = Short GI */
void rtl8723a_add_rateatid(struct rtw_adapter *pAdapter, u32 bitmap, u8 arg, u8 rssi_level)
{
- struct hal_data_8723a *pHalData = GET_HAL_DATA(pAdapter);
- u8 macid = arg&0x1f;
- u8 raid = (bitmap>>28) & 0x0f;
+ struct hal_data_8723a *pHalData = GET_HAL_DATA(pAdapter);
+ u8 macid = arg & 0x1f;
+ u32 raid = bitmap & 0xf0000000;
bitmap &= 0x0fffffff;
if (rssi_level != DM_RATR_STA_INIT)
bitmap = ODM_Get_Rate_Bitmap23a(pHalData, macid, bitmap,
rssi_level);
- bitmap |= ((raid<<28)&0xf0000000);
+ bitmap |= raid;
- if (pHalData->fw_ractrl == true) {
- rtl8723a_set_raid_cmd(pAdapter, bitmap, arg);
- } else {
- u8 init_rate, shortGIrate = false;
-
- init_rate = get_highest_rate_idx23a(bitmap&0x0fffffff)&0x3f;
-
- shortGIrate = (arg&BIT(5)) ? true:false;
-
- if (shortGIrate == true)
- init_rate |= BIT(6);
-
- rtl8723au_write8(pAdapter, REG_INIDATA_RATE_SEL + macid,
- init_rate);
- }
+ rtl8723a_set_raid_cmd(pAdapter, bitmap, arg);
}
void rtl8723a_set_FwPwrMode_cmd(struct rtw_adapter *padapter, u8 Mode)
prevent conficting setting in Fw power */
/* saving sequence. 2010.06.07. Added by tynli.
Suggested by SD3 yschang. */
- if ((Mode != PS_MODE_ACTIVE) &&
- (!IS_92C_SERIAL(pHalData->VersionID))) {
+ if (Mode != PS_MODE_ACTIVE && pHalData->rf_type != RF_2T2R)
ODM_RF_Saving23a(&pHalData->odmpriv, true);
- }
H2CSetPwrMode.Mode = Mode;
H2CSetPwrMode.SmartPS = pwrpriv->smart_ps;
memset(pDM_Odm, 0, sizeof(*pDM_Odm));
pDM_Odm->Adapter = Adapter;
- ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_PLATFORM, 0x04);
- ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_INTERFACE, RTW_USB);/* RTL871X_HCI_TYPE */
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_IC_TYPE, ODM_RTL8723A);
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_EXT_LNA, true);
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_EXT_PA, true);
}
- ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_PATCH_ID, pHalData->CustomerID);
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_BWIFI_TEST, Adapter->registrypriv.wifi_spec);
-
- if (pHalData->rf_type == RF_1T1R)
- ODM_CmnInfoUpdate23a(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R);
- else if (pHalData->rf_type == RF_2T2R)
- ODM_CmnInfoUpdate23a(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R);
- else if (pHalData->rf_type == RF_1T2R)
- ODM_CmnInfoUpdate23a(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R);
}
static void Update_ODM_ComInfo_8723a(struct rtw_adapter *Adapter)
struct dm_odm_t *pDM_Odm = &pHalData->odmpriv;
struct dm_priv *pdmpriv = &pHalData->dmpriv;
int i;
- pdmpriv->InitODMFlag = ODM_BB_DIG |
- ODM_BB_RA_MASK |
- ODM_BB_DYNAMIC_TXPWR |
- ODM_BB_FA_CNT |
- ODM_BB_RSSI_MONITOR |
- ODM_BB_CCK_PD |
- ODM_BB_PWR_SAVE |
- ODM_MAC_EDCA_TURBO |
- ODM_RF_TX_PWR_TRACK |
- ODM_RF_CALIBRATION;
+ pdmpriv->InitODMFlag = 0;
/* Pointer reference */
rtl8723a_odm_support_ability_set(Adapter, DYNAMIC_ALL_FUNC_ENABLE);
goto exit;
}
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("_WriteFW Done- for Normal chip.\n"));
+ "_WriteFW Done- for Normal chip.\n");
exit:
return ret;
if (counter >= POLLING_READY_TIMEOUT_COUNT) {
RT_TRACE(_module_hal_init_c_, _drv_err_,
- ("%s: chksum report fail! REG_MCUFWDL:0x%08x\n",
- __func__, value32));
+ "%s: chksum report fail! REG_MCUFWDL:0x%08x\n",
+ __func__, value32);
return _FAIL;
}
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("%s: Checksum report OK! REG_MCUFWDL:0x%08x\n", __func__,
- value32));
+ "%s: Checksum report OK! REG_MCUFWDL:0x%08x\n", __func__,
+ value32);
value32 = rtl8723au_read32(padapter, REG_MCUFWDL);
value32 |= MCUFWDL_RDY;
value32 = rtl8723au_read32(padapter, REG_MCUFWDL);
if (value32 & WINTINI_RDY) {
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("%s: Polling FW ready success!! "
- "REG_MCUFWDL:0x%08x\n",
- __func__, value32));
+ "%s: Polling FW ready success!! REG_MCUFWDL:0x%08x\n",
+ __func__, value32);
return _SUCCESS;
}
udelay(5);
} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
RT_TRACE(_module_hal_init_c_, _drv_err_,
- ("%s: Polling FW ready fail!! REG_MCUFWDL:0x%08x\n",
- __func__, value32));
+ "%s: Polling FW ready fail!! REG_MCUFWDL:0x%08x\n",
+ __func__, value32);
return _FAIL;
}
u1bTmp = rtl8723au_read8(padapter, REG_SYS_FUNC_EN + 1);
}
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("-%s: 8051 reset success (%d)\n", __func__,
- Delay));
+ "-%s: 8051 reset success (%d)\n", __func__,
+ Delay);
if ((Delay == 0)) {
/* force firmware reset */
int fw_size;
static int log_version;
- RT_TRACE(_module_hal_init_c_, _drv_info_, ("+%s\n", __func__));
+ RT_TRACE(_module_hal_init_c_, _drv_info_, "+%s\n", __func__);
if (IS_8723A_A_CUT(pHalData->VersionID)) {
fw_name = "rtlwifi/rtl8723aufw_A.bin";
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("rtl8723a_FirmwareDownload: R8723FwImageArray_UMC "
- "for RTL8723A A CUT\n"));
+ "rtl8723a_FirmwareDownload: R8723FwImageArray_UMC for RTL8723A A CUT\n");
} else if (IS_8723A_B_CUT(pHalData->VersionID)) {
/* WLAN Fw. */
if (padapter->registrypriv.wifi_spec == 1) {
/* <Roger_TODO> We should download proper RAM Code here
to match the ROM code. */
RT_TRACE(_module_hal_init_c_, _drv_err_,
- ("%s: unknow version!\n", __func__));
+ "%s: unknown version!\n", __func__);
rtStatus = _FAIL;
goto Exit;
}
rtStatus = _FWFreeToGo(padapter);
if (_SUCCESS != rtStatus) {
RT_TRACE(_module_hal_init_c_, _drv_err_,
- ("DL Firmware failed!\n"));
+ "DL Firmware failed!\n");
goto Exit;
}
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("Firmware is ready to run!\n"));
+ "Firmware is ready to run!\n");
Exit:
kfree(firmware_buf);
offset = GET_HDR_OFFSET_2_0(efuseHeader);
ReadEFuseByte23a(padapter, eFuse_Addr++, &efuseExtHdr);
- if (ALL_WORDS_DISABLED(efuseExtHdr)) {
+ if (ALL_WORDS_DISABLED(efuseExtHdr))
continue;
- }
offset |= ((efuseExtHdr & 0xF0) >> 1);
- wden = (efuseExtHdr & 0x0F);
+ wden = efuseExtHdr & 0x0F;
} else {
- offset = ((efuseHeader >> 4) & 0x0f);
- wden = (efuseHeader & 0x0f);
+ offset = (efuseHeader >> 4) & 0x0f;
+ wden = efuseHeader & 0x0f;
}
if (offset < EFUSE_MAX_SECTION_8723A) {
ReadEFuseByte23a(padapter, eFuse_Addr++,
&efuseExtHdr);
- if (ALL_WORDS_DISABLED(efuseExtHdr)) {
+ if (ALL_WORDS_DISABLED(efuseExtHdr))
continue;
- }
offset |= ((efuseExtHdr & 0xF0) >> 1);
- wden = (efuseExtHdr & 0x0F);
+ wden = efuseExtHdr & 0x0F;
} else {
- offset = ((efuseHeader >> 4) & 0x0f);
- wden = (efuseHeader & 0x0f);
+ offset = (efuseHeader >> 4) & 0x0f;
+ wden = efuseHeader & 0x0f;
}
if (offset < EFUSE_BT_MAX_SECTION) {
hoffset = GET_HDR_OFFSET_2_0(efuse_data);
efuse_addr++;
efuse_OneByteRead23a(padapter, efuse_addr, &efuse_data);
- if (ALL_WORDS_DISABLED(efuse_data)) {
+ if (ALL_WORDS_DISABLED(efuse_data))
continue;
- }
hoffset |= ((efuse_data & 0xF0) >> 1);
hworden = efuse_data & 0x0F;
}
/* Check if we need to check next bank efuse */
- if (efuse_addr < retU2) {
+ if (efuse_addr < retU2)
break; /* don't need to check next bank. */
- }
}
retU2 = ((bank - 1) * EFUSE_BT_REAL_BANK_CONTENT_LEN) + efuse_addr;
value32 = rtl8723au_read32(padapter, REG_SYS_CFG);
ChipVersion.ICType = CHIP_8723A;
ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
- ChipVersion.RFType = RF_TYPE_1T1R;
+ pHalData->rf_type = RF_1T1R;
ChipVersion.VendorType =
((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC);
ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK) >> CHIP_VER_RTL_SHIFT; /* IC version (CUT) */
value32 = rtl8723au_read32(padapter, REG_GPIO_OUTSTS);
/* ROM code version. */
- ChipVersion.ROMVer = ((value32 & RF_RL_ID) >> 20);
+ ChipVersion.ROMVer = (value32 & RF_RL_ID) >> 20;
/* For multi-function consideration. Added by Roger, 2010.10.06. */
pHalData->MultiFunc = RT_MULTI_FUNC_NONE;
pHalData->PolarityCtl =
((value32 & WL_HWPDN_SL) ? RT_POLARITY_HIGH_ACT :
RT_POLARITY_LOW_ACT);
- dump_chip_info23a(ChipVersion);
pHalData->VersionID = ChipVersion;
- if (IS_1T2R(ChipVersion))
- pHalData->rf_type = RF_1T2R;
- else if (IS_2T2R(ChipVersion))
- pHalData->rf_type = RF_2T2R;
- else
- pHalData->rf_type = RF_1T1R;
-
MSG_8723A("RF_Type is %x!!\n", pHalData->rf_type);
}
we record the value */
/* which should be read from register to a global variable. */
- RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("+ResumeTxBeacon\n"));
+ RT_TRACE(_module_hci_hal_init_c_, _drv_info_, "+ResumeTxBeacon\n");
pHalData->RegFwHwTxQCtrl |= BIT(6);
rtl8723au_write8(padapter, REG_FWHW_TXQ_CTRL + 2,
we record the value */
/* which should be read from register to a global variable. */
- RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("+StopTxBeacon\n"));
+ RT_TRACE(_module_hci_hal_init_c_, _drv_info_, "+StopTxBeacon\n");
pHalData->RegFwHwTxQCtrl &= ~BIT(6);
rtl8723au_write8(padapter, REG_FWHW_TXQ_CTRL + 2,
switch (c2h_evt->id) {
case C2H_DBG:
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("C2HCommandHandler: %s\n", c2h_evt->payload));
+ "C2HCommandHandler: %s\n", c2h_evt->payload);
break;
case C2H_CCX_TX_RPT:
break;
case C2H_HW_INFO_EXCH:
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("[BT], C2H_HW_INFO_EXCH\n"));
+ "[BT], C2H_HW_INFO_EXCH\n");
for (i = 0; i < c2h_evt->plen; i++) {
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("[BT], tmpBuf[%d]= 0x%x\n", i,
- c2h_evt->payload[i]));
+ "[BT], tmpBuf[%d]= 0x%x\n", i,
+ c2h_evt->payload[i]);
}
break;
case C2H_C2H_H2C_TEST:
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("[BT], C2H_H2C_TEST\n"));
+ "[BT], C2H_H2C_TEST\n");
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("[BT], tmpBuf[0]/[1]/[2]/[3]/[4]= 0x%x/ 0x%x/ "
- "0x%x/ 0x%x/ 0x%x\n", c2h_evt->payload[0],
- c2h_evt->payload[1], c2h_evt->payload[2],
- c2h_evt->payload[3], c2h_evt->payload[4]));
+ "[BT], tmpBuf[0]/[1]/[2]/[3]/[4]= 0x%x/ 0x%x/ 0x%x/ 0x%x/ 0x%x\n",
+ c2h_evt->payload[0],
+ c2h_evt->payload[1], c2h_evt->payload[2],
+ c2h_evt->payload[3], c2h_evt->payload[4]);
break;
case C2H_BT_INFO:
pdmpriv = &pHalData->dmpriv;
/* init default value */
- pHalData->fw_ractrl = false;
pHalData->bIQKInitialized = false;
if (!padapter->pwrctrlpriv.bkeepfwalive)
pHalData->LastHMEBoxNum = 0;
/* polling */
do {
value = rtl8723au_read32(padapter, LLTReg);
- if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) {
+ if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
break;
- }
if (count > POLLING_LLT_THRESHOLD) {
RT_TRACE(_module_hal_init_c_, _drv_err_,
- ("Failed to polling write LLT done at "
- "address %d!\n", address));
+ "Failed to polling write LLT done at address %d!\n",
+ address);
status = _FAIL;
break;
}
for (i = 0; i < (txpktbuf_bndy - 1); i++) {
status = _LLTWrite(padapter, i, i + 1);
- if (status != _SUCCESS) {
+ if (status != _SUCCESS)
return status;
- }
}
/* end of list */
status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF);
- if (status != _SUCCESS) {
+ if (status != _SUCCESS)
return status;
- }
/* Make the other pages as ring buffer */
/* This ring buffer is used as beacon buffer if we config this
/* Otherwise used as local loopback buffer. */
for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) {
status = _LLTWrite(padapter, i, (i + 1));
- if (_SUCCESS != status) {
+ if (_SUCCESS != status)
return status;
- }
}
/* Let last entry point to the start entry of ring buffer */
status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy);
- if (status != _SUCCESS) {
+ if (status != _SUCCESS)
return status;
- }
return status;
}
/* 2010/08/12 MH We need to set BB/GLBAL reset to save power
for SS mode. */
-
-/* RT_TRACE(COMP_INIT, DBG_LOUD, ("======> RF off and reset BB.\n")); */
}
static void _ResetDigitalProcedure1_92C(struct rtw_adapter *padapter,
value8 = rtl8723au_read8(padapter, REG_LDOV12D_CTRL);
value8 &= ~LDV12_EN;
rtl8723au_write8(padapter, REG_LDOV12D_CTRL, value8);
-/* RT_TRACE(COMP_INIT, DBG_LOUD,
- (" REG_LDOV12D_CTRL Reg0x21:0x%02x.\n", value8)); */
}
/*****************************
/* HW Auto state machine */
int CardDisableHWSM(struct rtw_adapter *padapter, u8 resetMCU)
{
- if (padapter->bSurpriseRemoved) {
+ if (padapter->bSurpriseRemoved)
return _SUCCESS;
- }
+
/* RF Off Sequence ==== */
_DisableRFAFEAndResetBB8192C(padapter);
_DisableAnalog(padapter, false);
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
- ("======> Card disable finished.\n"));
+ "======> Card disable finished.\n");
return _SUCCESS;
}
/* without HW Auto state machine */
int CardDisableWithoutHWSM(struct rtw_adapter *padapter)
{
- if (padapter->bSurpriseRemoved) {
+ if (padapter->bSurpriseRemoved)
return _SUCCESS;
- }
/* RF Off Sequence ==== */
_DisableRFAFEAndResetBB8192C(padapter);
/* ==== Disable analog sequence === */
_DisableAnalog(padapter, true);
- /* RT_TRACE(COMP_INIT, DBG_LOUD,
- ("<====== Card Disable Without HWSM .\n")); */
return _SUCCESS;
}
}
} else {
RT_TRACE(_module_hci_hal_init_c_, _drv_notice_,
- ("AutoLoad Fail reported from CR9346!!\n"));
+ "AutoLoad Fail reported from CR9346!!\n");
/* update to default value 0xFF */
if (!pEEPROM->EepromOrEfuse)
EFUSE_ShadowMapUpdate23a(padapter, EFUSE_WIFI);
}
RT_TRACE(_module_hal_init_c_, _drv_info_,
- ("EEPROM ID = 0x%04x\n", EEPROMId));
+ "EEPROM ID = 0x%04x\n", EEPROMId);
}
static void Hal_EEValueCheck(u8 EEType, void *pInValue, void *pOutValue)
*pOut = *pIn;
else {
RT_TRACE(_module_hci_hal_init_c_, _drv_err_,
- ("EETYPE_TX_PWR, value =%d is invalid, set "
- "to default = 0x%x\n",
- *pIn, EEPROM_Default_TxPowerLevel));
+ "EETYPE_TX_PWR, value =%d is invalid, set to default = 0x%x\n",
+ *pIn, EEPROM_Default_TxPowerLevel);
*pOut = EEPROM_Default_TxPowerLevel;
}
}
for (rfPath = 0; rfPath < RF_PATH_MAX; rfPath++) {
for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
- ("RF(%u)-Ch(%u) [CCK / HT40_1S / HT40_2S] = "
- "[0x%x / 0x%x / 0x%x]\n",
- rfPath, ch,
- pHalData->TxPwrLevelCck[rfPath][ch],
- pHalData->TxPwrLevelHT40_1S[rfPath][ch],
- pHalData->TxPwrLevelHT40_2S[rfPath][ch]));
+ "RF(%u)-Ch(%u) [CCK / HT40_1S / HT40_2S] = [0x%x / 0x%x / 0x%x]\n",
+ rfPath, ch,
+ pHalData->TxPwrLevelCck[rfPath][ch],
+ pHalData->TxPwrLevelHT40_1S[rfPath][ch],
+ pHalData->TxPwrLevelHT40_2S[rfPath][ch]);
}
}
for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
- ("RF-A Ht20 to HT40 Diff[%u] = 0x%x(%d)\n", ch,
- pHalData->TxPwrHt20Diff[RF_PATH_A][ch],
- pHalData->TxPwrHt20Diff[RF_PATH_A][ch]));
+ "RF-A Ht20 to HT40 Diff[%u] = 0x%x(%d)\n", ch,
+ pHalData->TxPwrHt20Diff[RF_PATH_A][ch],
+ pHalData->TxPwrHt20Diff[RF_PATH_A][ch]);
}
for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++)
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
- ("RF-A Legacy to Ht40 Diff[%u] = 0x%x\n", ch,
- pHalData->TxPwrLegacyHtDiff[RF_PATH_A][ch]));
+ "RF-A Legacy to Ht40 Diff[%u] = 0x%x\n", ch,
+ pHalData->TxPwrLegacyHtDiff[RF_PATH_A][ch]);
for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
- ("RF-B Ht20 to HT40 Diff[%u] = 0x%x(%d)\n", ch,
- pHalData->TxPwrHt20Diff[RF_PATH_B][ch],
- pHalData->TxPwrHt20Diff[RF_PATH_B][ch]));
+ "RF-B Ht20 to HT40 Diff[%u] = 0x%x(%d)\n", ch,
+ pHalData->TxPwrHt20Diff[RF_PATH_B][ch],
+ pHalData->TxPwrHt20Diff[RF_PATH_B][ch]);
}
for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++)
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
- ("RF-B Legacy to HT40 Diff[%u] = 0x%x\n", ch,
- pHalData->TxPwrLegacyHtDiff[RF_PATH_B][ch]));
+ "RF-B Legacy to HT40 Diff[%u] = 0x%x\n", ch,
+ pHalData->TxPwrLegacyHtDiff[RF_PATH_B][ch]);
if (!AutoLoadFail) {
struct registry_priv *registry_par = &padapter->registrypriv;
if (registry_par->regulatory_tid == 0xff) {
pHalData->EEPROMRegulatory = 0;
}
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
- ("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory));
+ "EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory);
if (!AutoLoadFail)
pHalData->bTXPowerDataReadFromEEPORM = true;
/* eeprom spec */
tempval = hwinfo[RF_OPTION4_8723A];
pHalData->EEPROMBluetoothAntNum = (tempval & 0x1);
- pHalData->EEPROMBluetoothAntIsolation = ((tempval & 0x10) >> 4);
- pHalData->EEPROMBluetoothRadioShared = ((tempval & 0x20) >> 5);
+ pHalData->EEPROMBluetoothAntIsolation = (tempval & 0x10) >> 4;
+ pHalData->EEPROMBluetoothRadioShared = (tempval & 0x20) >> 5;
} else {
pHalData->EEPROMBluetoothCoexist = 0;
pHalData->EEPROMBluetoothType = BT_RTL8723A;
else
pHalData->EEPROMVersion = 1;
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
- ("Hal_EfuseParseEEPROMVer(), EEVer = %d\n",
- pHalData->EEPROMVersion));
+ "Hal_EfuseParseEEPROMVer(), EEVer = %d\n",
+ pHalData->EEPROMVersion);
}
void
pHalData->EEPROMSubCustomerID = 0;
}
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
- ("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID));
+ "EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID);
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
- ("EEPROM SubCustomer ID: 0x%02x\n",
- pHalData->EEPROMSubCustomerID));
+ "EEPROM SubCustomer ID: 0x%02x\n",
+ pHalData->EEPROMSubCustomerID);
}
void
pHalData->CrystalCap = EEPROM_Default_CrystalCap_8723A;
}
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
- ("%s: CrystalCap = 0x%2x\n", __func__,
- pHalData->CrystalCap));
+ "%s: CrystalCap = 0x%2x\n", __func__,
+ pHalData->CrystalCap);
}
void
/* Clear first */
ptxdesc->txdw7 &= cpu_to_le32(0xffff0000);
- for (index = 0; index < count; index++) {
+ for (index = 0; index < count; index++)
checksum ^= le16_to_cpu(*(usPtr + index));
- }
ptxdesc->txdw7 |= cpu_to_le32(checksum & 0x0000ffff);
}
ptxdesc->txdw3 |= cpu_to_le32((8 << 28));
}
- if (true == IsBTQosNull) {
+ if (true == IsBTQosNull)
ptxdesc->txdw2 |= cpu_to_le32(BIT(23)); /* BT NULL */
- }
/* offset 16 */
ptxdesc->txdw4 |= cpu_to_le32(BIT(8)); /* driver uses rate */
{
u32 OriginalValue, BitShift;
- /* RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); */
-
if (BitMask != bMaskDWord) {/* if not "double word" write */
OriginalValue = rtl8723au_read32(Adapter, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
- Data = ((OriginalValue & (~BitMask)) | (Data << BitShift));
+ Data = (OriginalValue & (~BitMask)) | (Data << BitShift);
}
rtl8723au_write32(Adapter, RegAddr, Data);
/* RTPRINT(FPHY, PHY_BBW, ("BBW MASK = 0x%lx Addr[0x%lx]= 0x%lx\n", BitMask, RegAddr, Data)); */
- /* RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); */
}
/* */
/* For 92S LSSI Read RFLSSIRead */
/* For RF A/B write 0x824/82c(does not work in the future) */
/* We must use 0x824 for RF A and B to execute read trigger */
- tmplong = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord);
+ tmplong = rtl8723au_read32(Adapter, rFPGA0_XA_HSSIParameter2);
if (eRFPath == RF_PATH_A)
tmplong2 = tmplong;
else
- tmplong2 = PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2,
- bMaskDWord);
+ tmplong2 = rtl8723au_read32(Adapter, pPhyReg->rfHSSIPara2);
tmplong2 = (tmplong2 & ~bLSSIReadAddress) |
(NewOffset << 23) | bLSSIReadEdge; /* T65 RF */
- PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2,
- bMaskDWord, tmplong & (~bLSSIReadEdge));
+ rtl8723au_write32(Adapter, rFPGA0_XA_HSSIParameter2,
+ tmplong & (~bLSSIReadEdge));
udelay(10);/* PlatformStallExecution(10); */
- PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2);
+ rtl8723au_write32(Adapter, pPhyReg->rfHSSIPara2, tmplong2);
udelay(100);/* PlatformStallExecution(100); */
- PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord,
- tmplong | bLSSIReadEdge);
+ rtl8723au_write32(Adapter, rFPGA0_XA_HSSIParameter2,
+ tmplong | bLSSIReadEdge);
udelay(10);/* PlatformStallExecution(10); */
if (eRFPath == RF_PATH_A)
/* */
/* Write Operation */
/* */
- PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
- /* RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]= 0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); */
-
+ rtl8723au_write32(Adapter, pPhyReg->rf3wireOffset, DataAndAddr);
}
/**
if (BitMask != bRFRegOffsetMask) {
Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
- Data = ((Original_Value & (~BitMask)) | (Data << BitShift));
+ Data = (Original_Value & (~BitMask)) | (Data << BitShift);
}
phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data);
int PHY_MACConfig8723A(struct rtw_adapter *Adapter)
{
struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
- bool is92C = IS_92C_SERIAL(pHalData->VersionID);
/* */
/* Config MAC */
ODM_ReadAndConfig_MAC_REG_8723A(&pHalData->odmpriv);
/* 2010.07.13 AMPDU aggregation number 9 */
- /* rtw_write16(Adapter, REG_MAX_AGGR_NUM, MAX_AGGR_NUM); */
rtl8723au_write8(Adapter, REG_MAX_AGGR_NUM, 0x0A);
- if (is92C && (BOARD_USB_DONGLE == pHalData->BoardType))
+ if (pHalData->rf_type == RF_2T2R &&
+ BOARD_USB_DONGLE == pHalData->BoardType)
rtl8723au_write8(Adapter, 0x40, 0x04);
return _SUCCESS;
if (RegAddr == rTxAGC_A_Rate18_06) {
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0] = Data;
- /* RT_TRACE(COMP_INIT, DBG_TRACE,
- ("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%lx\n",
- pHalData->pwrGroupCnt, */
- /* pHalData->MCSTxPowerLevelOriginalOffset[
- pHalData->pwrGroupCnt][0])); */
}
if (RegAddr == rTxAGC_A_Rate54_24) {
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1] = Data;
- /* RT_TRACE(COMP_INIT, DBG_TRACE,
- ("MCSTxPowerLevelOriginalOffset[%d][1] = 0x%lx\n",
- pHalData->pwrGroupCnt, */
- /* pHalData->MCSTxPowerLevelOriginalOffset[
- pHalData->pwrGroupCnt][1])); */
}
if (RegAddr == rTxAGC_A_CCK1_Mcs32) {
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6] = Data;
- /* RT_TRACE(COMP_INIT, DBG_TRACE,
- ("MCSTxPowerLevelOriginalOffset[%d][6] = 0x%lx\n",
- pHalData->pwrGroupCnt, */
- /* pHalData->MCSTxPowerLevelOriginalOffset[
- pHalData->pwrGroupCnt][6])); */
}
if (RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0xffffff00) {
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7] = Data;
- /* RT_TRACE(COMP_INIT, DBG_TRACE,
- ("MCSTxPowerLevelOriginalOffset[%d][7] = 0x%lx\n",
- pHalData->pwrGroupCnt, */
- /* pHalData->MCSTxPowerLevelOriginalOffset[
- pHalData->pwrGroupCnt][7])); */
}
if (RegAddr == rTxAGC_A_Mcs03_Mcs00) {
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2] = Data;
- /* RT_TRACE(COMP_INIT, DBG_TRACE,
- ("MCSTxPowerLevelOriginalOffset[%d][2] = 0x%lx\n",
- pHalData->pwrGroupCnt, */
- /* pHalData->MCSTxPowerLevelOriginalOffset[
- pHalData->pwrGroupCnt][2])); */
}
if (RegAddr == rTxAGC_A_Mcs07_Mcs04) {
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3] = Data;
- /* RT_TRACE(COMP_INIT, DBG_TRACE,
- ("MCSTxPowerLevelOriginalOffset[%d][3] = 0x%lx\n",
- pHalData->pwrGroupCnt, */
- /* pHalData->MCSTxPowerLevelOriginalOffset[
- pHalData->pwrGroupCnt][3])); */
}
if (RegAddr == rTxAGC_A_Mcs11_Mcs08) {
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4] = Data;
- /* RT_TRACE(COMP_INIT, DBG_TRACE,
- ("MCSTxPowerLevelOriginalOffset[%d][4] = 0x%lx\n",
- pHalData->pwrGroupCnt, */
- /* pHalData->MCSTxPowerLevelOriginalOffset[
- pHalData->pwrGroupCnt][4])); */
}
if (RegAddr == rTxAGC_A_Mcs15_Mcs12) {
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5] = Data;
- /* RT_TRACE(COMP_INIT, DBG_TRACE,
- ("MCSTxPowerLevelOriginalOffset[%d][5] = 0x%lx\n",
- pHalData->pwrGroupCnt, */
- /* pHalData->MCSTxPowerLevelOriginalOffset[
- pHalData->pwrGroupCnt][5])); */
}
if (RegAddr == rTxAGC_B_Rate18_06) {
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8] = Data;
- /* RT_TRACE(COMP_INIT, DBG_TRACE,
- ("MCSTxPowerLevelOriginalOffset[%d][8] = 0x%lx\n",
- pHalData->pwrGroupCnt, */
- /* pHalData->MCSTxPowerLevelOriginalOffset[
- pHalData->pwrGroupCnt][8])); */
}
if (RegAddr == rTxAGC_B_Rate54_24) {
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9] = Data;
- /* RT_TRACE(COMP_INIT, DBG_TRACE,
- ("MCSTxPowerLevelOriginalOffset[%d][9] = 0x%lx\n",
- pHalData->pwrGroupCnt, */
- /* pHalData->MCSTxPowerLevelOriginalOffset[
- pHalData->pwrGroupCnt][9])); */
}
if (RegAddr == rTxAGC_B_CCK1_55_Mcs32) {
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14] = Data;
- /* RT_TRACE(COMP_INIT, DBG_TRACE,
- ("MCSTxPowerLevelOriginalOffset[%d][14] = 0x%lx\n",
- pHalData->pwrGroupCnt, */
- /* pHalData->MCSTxPowerLevelOriginalOffset[
- pHalData->pwrGroupCnt][14])); */
}
if (RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0x000000ff) {
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15] = Data;
- /* RT_TRACE(COMP_INIT, DBG_TRACE,
- ("MCSTxPowerLevelOriginalOffset[%d][15] = 0x%lx\n",
- pHalData->pwrGroupCnt, */
- /* pHalData->MCSTxPowerLevelOriginalOffset[
- pHalData->pwrGroupCnt][15])); */
}
if (RegAddr == rTxAGC_B_Mcs03_Mcs00) {
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10] = Data;
- /* RT_TRACE(COMP_INIT, DBG_TRACE,
- ("MCSTxPowerLevelOriginalOffset[%d][10] = 0x%lx\n",
- pHalData->pwrGroupCnt, */
- /* pHalData->MCSTxPowerLevelOriginalOffset[
- pHalData->pwrGroupCnt][10])); */
}
if (RegAddr == rTxAGC_B_Mcs07_Mcs04) {
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11] = Data;
- /* RT_TRACE(COMP_INIT, DBG_TRACE,
- ("MCSTxPowerLevelOriginalOffset[%d][11] = 0x%lx\n",
- pHalData->pwrGroupCnt, */
- /* pHalData->MCSTxPowerLevelOriginalOffset[
- pHalData->pwrGroupCnt][11])); */
}
if (RegAddr == rTxAGC_B_Mcs11_Mcs08) {
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12] = Data;
- /* RT_TRACE(COMP_INIT, DBG_TRACE,
- ("MCSTxPowerLevelOriginalOffset[%d][12] = 0x%lx\n",
- pHalData->pwrGroupCnt, */
- /* pHalData->MCSTxPowerLevelOriginalOffset[
- pHalData->pwrGroupCnt][12])); */
}
if (RegAddr == rTxAGC_B_Mcs15_Mcs12) {
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13] = Data;
- /* RT_TRACE(COMP_INIT, DBG_TRACE,
- ("MCSTxPowerLevelOriginalOffset[%d][13] = 0x%lx\n",
- pHalData->pwrGroupCnt, */
- /* pHalData->MCSTxPowerLevelOriginalOffset[
- pHalData->pwrGroupCnt][13])); */
pHalData->pwrGroupCnt++;
}
}
(CrystalCap | (CrystalCap << 6)));
}
- PHY_SetBBReg(Adapter, REG_LDOA15_CTRL, bMaskDWord, 0x01572505);
+ rtl8723au_write32(Adapter, REG_LDOA15_CTRL, 0x01572505);
return rtStatus;
}
u8 regBwOpMode;
u8 regRRSR_RSC;
- /* There is no 40MHz mode in RF_8225. */
- if (pHalData->rf_chip == RF_8225)
- return;
-
if (Adapter->bDriverStopped)
return;
break;
default:
- /*RT_TRACE(COMP_DBG, DBG_LOUD,
- ("PHY_SetBWMode23aCallback8192C(): unknown Bandwidth: %#X\n" \
- , pHalData->CurrentChannelBW));*/
- break;
+ break;
}
/* Skip over setting of J-mode in BB register here. Default value
is "None J mode". Emily 20070315 */
/* NowL = PlatformEFIORead4Byte(Adapter, TSFR); */
/* NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); */
/* EndTime = ((u64)NowH << 32) + NowL; */
- /* RT_TRACE(COMP_SCAN, DBG_LOUD, ("SetBWMode23aCallback8190Pci: time
- of SetBWMode23a = %I64d us!\n", (EndTime - BeginTime))); */
-
- /* 3<3>Set RF related register */
- switch (pHalData->rf_chip) {
- case RF_8225:
- /* PHY_SetRF8225Bandwidth(Adapter,
- pHalData->CurrentChannelBW); */
- break;
-
- case RF_8256:
- /* Please implement this function in Hal8190PciPhy8256.c */
- /* PHY_SetRF8256Bandwidth(Adapter,
- pHalData->CurrentChannelBW); */
- break;
-
- case RF_8258:
- /* Please implement this function in Hal8190PciPhy8258.c */
- /* PHY_SetRF8258Bandwidth(); */
- break;
-
- case RF_6052:
- rtl8723a_phy_rf6052set_bw(Adapter, pHalData->CurrentChannelBW);
- break;
-
- default:
- /* RT_ASSERT(false, ("Unknown RFChipID: %d\n",
- pHalData->RFChipID)); */
- break;
- }
-
- /* pHalData->SetBWMode23aInProgress = false; */
- /* RT_TRACE(COMP_SCAN, DBG_LOUD,
- ("<== PHY_SetBWMode23aCallback8192C() \n")); */
+ rtl8723a_phy_rf6052set_bw(Adapter, pHalData->CurrentChannelBW);
}
/*-----------------------------------------------------------------------------
break;
case 2: /* Better regulatory */
/* don't increase any power diff */
- writeVal = ((index < 2) ? powerBase0[rf] :
- powerBase1[rf]);
+ writeVal = (index < 2) ? powerBase0[rf] :
+ powerBase1[rf];
break;
case 3: /* Customer defined power diff. */
chnlGroup = 0;
else
RegOffset = RegOffset_B[index];
- PHY_SetBBReg(Adapter, RegOffset, bMaskDWord, writeVal);
+ rtl8723au_write32(Adapter, RegOffset, writeVal);
/* 201005115 Joseph: Set Tx Power diff for Tx power
training mechanism. */
if (!precvpriv->precv_buf) {
res = _FAIL;
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("alloc recv_buf fail!\n"));
+ "alloc recv_buf fail!\n");
goto exit;
}
bool matchbssid = false;
u8 *bssid;
- matchbssid = (!ieee80211_is_ctl(hdr->frame_control) &&
- !pattrib->icv_err && !pattrib->crc_err);
+ matchbssid = !ieee80211_is_ctl(hdr->frame_control) &&
+ !pattrib->icv_err && !pattrib->crc_err;
if (matchbssid) {
switch (hdr->frame_control &
static void rtl8192cu_cal_txdesc_chksum(struct tx_desc *ptxdesc)
{
- u16 *usPtr = (u16 *)ptxdesc;
+ __le16 *usPtr = (__le16 *)ptxdesc;
u32 count = 16; /* (32 bytes / 2 bytes per XOR) => 16 times */
u32 index;
u16 checksum = 0;
}
}
-static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bagg_pkt)
+static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz)
{
int pull = 0;
uint qsel;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
int bmcst = is_multicast_ether_addr(pattrib->ra);
- if ((!bagg_pkt) && (urb_zero_packet_chk(padapter, sz) == 0)) {
+ if (urb_zero_packet_chk(padapter, sz) == 0) {
ptxdesc = (struct tx_desc *)(pmem+PACKET_OFFSET_SZ);
pull = 1;
pxmitframe->pkt_offset--;
if (bmcst)
ptxdesc->txdw0 |= cpu_to_le32(BIT(24));
- RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("offset0-txdesc = 0x%x\n", ptxdesc->txdw0));
+ RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
+ "offset0-txdesc = 0x%x\n", ptxdesc->txdw0);
/* offset 4 */
/* pkt_offset, unit:8 bytes padding */
mem_addr = pxmitframe->buf_addr;
- RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_dump_xframe()\n"));
+ RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, "rtw_dump_xframe()\n");
for (t = 0; t < pattrib->nr_frags; t++) {
if (inner_ret != _SUCCESS && ret == _SUCCESS)
if (t != (pattrib->nr_frags - 1)) {
RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_,
- ("pattrib->nr_frags =%d\n", pattrib->nr_frags));
+ "pattrib->nr_frags =%d\n", pattrib->nr_frags);
sz = pxmitpriv->frag_len;
sz = sz - 4 - pattrib->icv_len;
sz = pattrib->last_txcmdsz;
}
- pull = update_txdesc(pxmitframe, mem_addr, sz, false);
+ pull = update_txdesc(pxmitframe, mem_addr, sz);
if (pull) {
mem_addr += PACKET_OFFSET_SZ; /* pull txdesc head */
rtw_count_tx_stats23a(padapter, pxmitframe, sz);
RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
- ("rtw_write_port, w_sz =%d\n", w_sz));
+ "rtw_write_port, w_sz =%d\n", w_sz);
mem_addr += w_sz;
phwxmits = pxmitpriv->hwxmits;
hwentry = pxmitpriv->hwxmit_entry;
- RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("xmitframe_complete()\n"));
+ RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, "xmitframe_complete()\n");
if (pxmitbuf == NULL) {
pxmitbuf = rtw_alloc_xmitbuf23a(pxmitpriv);
rtw_os_xmit_complete23a(padapter, pxmitframe);/* always return ndis_packet after rtw_xmitframe_coalesce23a */
}
- RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("xmitframe_complete(): rtw_dump_xframe\n"));
+ RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_,
+ "xmitframe_complete(): rtw_dump_xframe\n");
if (res == _SUCCESS) {
rtw_dump_xframe(padapter, pxmitframe);
if (res != _SUCCESS) {
RT_TRACE(_module_xmit_osdep_c_, _drv_err_,
- ("pre_xmitframe: enqueue xmitframe fail\n"));
+ "pre_xmitframe: enqueue xmitframe fail\n");
rtw_free_xmitframe23a(pxmitpriv, pxmitframe);
/* Trick, make the statistics correct */
static void _InitRFType(struct rtw_adapter *Adapter)
{
struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
- bool is92CU = IS_92C_SERIAL(pHalData->VersionID);
- pHalData->rf_chip = RF_6052;
-
- if (!is92CU) {
- pHalData->rf_type = RF_1T1R;
- DBG_8723A("Set RF Chip ID to RF_6052 and RF type to 1T1R.\n");
- return;
- }
-
- /* TODO: Consider that EEPROM set 92CU to 1T1R later. */
- /* Force to overwrite setting according to chip version. Ignore
- EEPROM setting. */
- /* pHalData->RF_Type = is92CU ? RF_2T2R : RF_1T1R; */
- MSG_8723A("Set RF Chip ID to RF_6052 and RF type to %d.\n",
- pHalData->rf_type);
+ pHalData->rf_type = RF_1T1R;
}
/* Set CCK and OFDM Block "ON" */
/* Check if MAC has already power on. by tynli. 2011.05.27. */
val8 = rtl8723au_read8(Adapter, REG_CR);
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
- ("%s: REG_CR 0x100 = 0x%02x\n", __func__, val8));
+ "%s: REG_CR 0x100 = 0x%02x\n", __func__, val8);
/* Fix 92DU-VC S3 hang with the reason is that secondary mac is not
initialized. */
/* 0x100 value of first mac is 0xEA while 0x100 value of secondary
} else {
mac_on = true;
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
- ("%s: MAC has already power on\n", __func__));
+ "%s: MAC has already power on\n", __func__);
}
status = _InitPowerOn(Adapter);
if (status == _FAIL) {
RT_TRACE(_module_hci_hal_init_c_, _drv_err_,
- ("Failed to init power on!\n"));
+ "Failed to init power on!\n");
goto exit;
}
status = InitLLTTable23a(Adapter, boundary);
if (status == _FAIL) {
RT_TRACE(_module_hci_hal_init_c_, _drv_err_,
- ("Failed to init LLT table\n"));
+ "Failed to init LLT table\n");
goto exit;
}
}
status = rtl8723a_FirmwareDownload(Adapter);
if (status != _SUCCESS) {
Adapter->bFWReady = false;
- pHalData->fw_ractrl = false;
DBG_8723A("fw download fail!\n");
goto exit;
} else {
Adapter->bFWReady = true;
- pHalData->fw_ractrl = true;
DBG_8723A("fw download ok!\n");
}
}
/* reducing 80M spur */
- PHY_SetBBReg(Adapter, REG_AFE_XTAL_CTRL, bMaskDWord, 0x0381808d);
- PHY_SetBBReg(Adapter, REG_AFE_PLL_CTRL, bMaskDWord, 0xf0ffff83);
- PHY_SetBBReg(Adapter, REG_AFE_PLL_CTRL, bMaskDWord, 0xf0ffff82);
- PHY_SetBBReg(Adapter, REG_AFE_PLL_CTRL, bMaskDWord, 0xf0ffff83);
+ rtl8723au_write32(Adapter, REG_AFE_XTAL_CTRL, 0x0381808d);
+ rtl8723au_write32(Adapter, REG_AFE_PLL_CTRL, 0xf0ffff83);
+ rtl8723au_write32(Adapter, REG_AFE_PLL_CTRL, 0xf0ffff82);
+ rtl8723au_write32(Adapter, REG_AFE_PLL_CTRL, 0xf0ffff83);
/* RFSW Control */
- PHY_SetBBReg(Adapter, rFPGA0_TxInfo, bMaskDWord, 0x00000003); /* 0x804[14]= 0 */
- PHY_SetBBReg(Adapter, rFPGA0_XAB_RFInterfaceSW, bMaskDWord, 0x07000760); /* 0x870[6:5]= b'11 */
- PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, 0x66F60210); /* 0x860[6:5]= b'00 */
+ /* 0x804[14]= 0 */
+ rtl8723au_write32(Adapter, rFPGA0_TxInfo, 0x00000003);
+ /* 0x870[6:5]= b'11 */
+ rtl8723au_write32(Adapter, rFPGA0_XAB_RFInterfaceSW, 0x07000760);
+ /* 0x860[6:5]= b'00 */
+ rtl8723au_write32(Adapter, rFPGA0_XA_RFInterfaceOE, 0x66F60210);
- RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("%s: 0x870 = value 0x%x\n", __func__, PHY_QueryBBReg(Adapter, 0x870, bMaskDWord)));
+ RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
+ "%s: 0x870 = value 0x%x\n", __func__,
+ rtl8723au_read32(Adapter, 0x870));
/* */
/* Joseph Note: Keep RfRegChnlVal for later use. */
rtl8723a_InitHalDm(Adapter);
- val8 = ((WiFiNavUpperUs + HAL_8723A_NAV_UPPER_UNIT - 1) /
- HAL_8723A_NAV_UPPER_UNIT);
+ val8 = (WiFiNavUpperUs + HAL_8723A_NAV_UPPER_UNIT - 1) /
+ HAL_8723A_NAV_UPPER_UNIT;
rtl8723au_write8(Adapter, REG_NAV_UPPER, val8);
/* 2011/03/09 MH debug only, UMC-B cut pass 2500 S5 test, but we need to fin root cause. */
if (((rtl8723au_read32(Adapter, rFPGA0_RFMOD) & 0xFF000000) !=
0x83000000)) {
PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT(24), 1);
- RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("%s: IQK fail recorver\n", __func__));
+ RT_TRACE(_module_hci_hal_init_c_, _drv_err_,
+ "%s: IQK fail recover\n", __func__);
}
/* ack for xmit mgmt frames. */
/* AFE */
if (pHalData->rf_type == RF_2T2R)
- PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord,
- 0x63DB25A0);
+ rtl8723au_write32(Adapter, rRx_Wait_CCA, 0x63DB25A0);
else if (pHalData->rf_type == RF_1T1R)
- PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord,
- 0x631B25A0);
+ rtl8723au_write32(Adapter, rRx_Wait_CCA, 0x631B25A0);
/* 4. issue 3-wire command that RF set to Rx idle
mode. This is used to re-write the RX idle mode. */
/* We can only prvide a usual value instead and then
HW will modify the value by itself. */
- PHY_SetRFReg(Adapter, RF_PATH_A, 0, bRFRegOffsetMask, 0x32D95);
+ PHY_SetRFReg(Adapter, RF_PATH_A, RF_AC,
+ bRFRegOffsetMask, 0x32D95);
if (pHalData->rf_type == RF_2T2R) {
- PHY_SetRFReg(Adapter, RF_PATH_B, 0,
+ PHY_SetRFReg(Adapter, RF_PATH_B, RF_AC,
bRFRegOffsetMask, 0x32D95);
}
break;
else
sps0 &= ~(BIT(0) | BIT(3));
- RT_TRACE(_module_hal_init_c_, _drv_err_, ("SS LVL1\n"));
+ RT_TRACE(_module_hal_init_c_, _drv_err_, "SS LVL1\n");
/* Disable RF and BB only for SelectSuspend. */
/* 1. Set BB/RF to shutdown. */
for packet detection */
/* (4) Reg800[1] = 1 enable preamble power saving */
Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF0] =
- PHY_QueryBBReg(Adapter, rFPGA0_XAB_RFParameter,
- bMaskDWord);
+ rtl8723au_read32(Adapter, rFPGA0_XAB_RFParameter);
Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF1] =
- PHY_QueryBBReg(Adapter, rOFDM0_TRxPathEnable,
- bMaskDWord);
+ rtl8723au_read32(Adapter, rOFDM0_TRxPathEnable);
Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF2] =
- PHY_QueryBBReg(Adapter, rFPGA0_RFMOD, bMaskDWord);
+ rtl8723au_read32(Adapter, rFPGA0_RFMOD);
if (pHalData->rf_type == RF_2T2R) {
PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter,
0x380038, 0);
/* 2 .AFE control register to power down. bit[30:22] */
Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_AFE0] =
- PHY_QueryBBReg(Adapter, rRx_Wait_CCA, bMaskDWord);
+ rtl8723au_read32(Adapter, rRx_Wait_CCA);
if (pHalData->rf_type == RF_2T2R)
- PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord,
- 0x00DB25A0);
+ rtl8723au_write32(Adapter, rRx_Wait_CCA, 0x00DB25A0);
else if (pHalData->rf_type == RF_1T1R)
- PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord,
- 0x001B25A0);
+ rtl8723au_write32(Adapter, rRx_Wait_CCA, 0x001B25A0);
/* 3. issue 3-wire command that RF set to power down.*/
- PHY_SetRFReg(Adapter, RF_PATH_A, 0, bRFRegOffsetMask, 0);
+ PHY_SetRFReg(Adapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0);
if (pHalData->rf_type == RF_2T2R)
- PHY_SetRFReg(Adapter, RF_PATH_B, 0,
+ PHY_SetRFReg(Adapter, RF_PATH_B, RF_AC,
bRFRegOffsetMask, 0);
/* 4. Force PFM , disable SPS18_LDO_Marco_Block */
status = _SUCCESS;
- RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("===> usb_inirp_init\n"));
+ RT_TRACE(_module_hci_hal_init_c_, _drv_info_, "===> usb_inirp_init\n");
/* issue Rx irp to receive data */
precvbuf = (struct recv_buf *)precvpriv->precv_buf;
for (i = 0; i < NR_RECVBUFF; i++) {
if (rtl8723au_read_port(Adapter, 0, precvbuf) == _FAIL) {
RT_TRACE(_module_hci_hal_init_c_, _drv_err_,
- ("usb_rx_init: usb_read_port error\n"));
+ "usb_rx_init: usb_read_port error\n");
status = _FAIL;
goto exit;
}
}
if (rtl8723au_read_interrupt(Adapter) == _FAIL) {
RT_TRACE(_module_hci_hal_init_c_, _drv_err_,
- ("%s: usb_read_interrupt error\n", __func__));
+ "%s: usb_read_interrupt error\n", __func__);
status = _FAIL;
}
pHalData->IntrMask[0] = rtl8723au_read32(Adapter, REG_USB_HIMR);
rtl8723au_write32(Adapter, REG_USB_HIMR, pHalData->IntrMask[0]);
exit:
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
- ("<=== usb_inirp_init\n"));
+ "<=== usb_inirp_init\n");
return status;
}
struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
- ("\n ===> usb_rx_deinit\n"));
+ "===> usb_rx_deinit\n");
rtl8723au_read_port_cancel(Adapter);
pHalData->IntrMask[0] = rtl8723au_read32(Adapter, REG_USB_HIMR);
MSG_8723A("%s pHalData->IntrMask = 0x%04x\n", __func__,
pHalData->IntrMask[0] = 0x0;
rtl8723au_write32(Adapter, REG_USB_HIMR, pHalData->IntrMask[0]);
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
- ("\n <=== usb_rx_deinit\n"));
+ "<=== usb_rx_deinit\n");
return _SUCCESS;
}
}
RT_TRACE(_module_hci_hal_init_c_, _drv_notice_,
- ("Hal_EfuseParseMACAddr_8723AU: Permanent Address =%02x:%02x:"
- "%02x:%02x:%02x:%02x\n",
- pEEPROM->mac_addr[0], pEEPROM->mac_addr[1],
- pEEPROM->mac_addr[2], pEEPROM->mac_addr[3],
- pEEPROM->mac_addr[4], pEEPROM->mac_addr[5]));
+ "Hal_EfuseParseMACAddr_8723AU: Permanent Address =%02x:%02x:%02x:%02x:%02x:%02x\n",
+ pEEPROM->mac_addr[0], pEEPROM->mac_addr[1],
+ pEEPROM->mac_addr[2], pEEPROM->mac_addr[3],
+ pEEPROM->mac_addr[4], pEEPROM->mac_addr[5]);
}
static void readAdapterInfo(struct rtw_adapter *padapter)
readAdapterInfo(Adapter);
}
-static void _ReadRFType(struct rtw_adapter *Adapter)
-{
- struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
-
- pHalData->rf_chip = RF_6052;
-}
-
/* */
/* Description: */
/* We should set Efuse cell selection to WiFi cell in default. */
hal_EfuseCellSel(Adapter);
- _ReadRFType(Adapter);/* rf_chip -> _InitRFType() */
_ReadPROMContent(Adapter);
- /* MSG_8723A("%s()(done), rf_chip = 0x%x, rf_type = 0x%x\n",
- __func__, pHalData->rf_chip, pHalData->rf_type); */
-
MSG_8723A("<==== _ReadAdapterInfo8723AU in %d ms\n",
jiffies_to_msecs(jiffies - start));
}
}
break;
default:
- /* RT_TRACE(COMP_INIT, DBG_WARNING, ("GetHalDefVar8192CUsb(): "
- "Unkown variable: %d!\n", eVariable)); */
bResult = _FAIL;
break;
}
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *cur_network = &pmlmeinfo->network;
- u8 init_rate, networkType, raid;
+ u8 init_rate, networkType, raid, arg;
u32 mask, rate_bitmap;
u8 shortGIrate = false;
int supportRateNum;
init_rate = get_highest_rate_idx23a(mask) & 0x3f;
- if (pHalData->fw_ractrl == true) {
- u8 arg = 0;
-
- arg = mac_id & 0x1f;/* MACID */
+ arg = mac_id & 0x1f;/* MACID */
+ arg |= BIT(7);
- arg |= BIT(7);
+ if (shortGIrate == true)
+ arg |= BIT(5);
- if (shortGIrate == true)
- arg |= BIT(5);
+ DBG_8723A("update raid entry, mask = 0x%x, arg = 0x%x\n", mask, arg);
- DBG_8723A("update raid entry, mask = 0x%x, arg = 0x%x\n",
- mask, arg);
-
- rtl8723a_set_raid_cmd(padapter, mask, arg);
- } else {
- if (shortGIrate == true)
- init_rate |= BIT(6);
-
- rtl8723au_write8(padapter, (REG_INIDATA_RATE_SEL + mac_id),
- init_rate);
- }
+ rtl8723a_set_raid_cmd(padapter, mask, arg);
/* set ra_id */
psta->raid = raid;
case -ENODEV:
case -ESHUTDOWN:
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("usb_read_port_complete:bSurpriseRemoved ="
- "true\n"));
+ "usb_read_port_complete:bSurpriseRemoved =true\n");
/* Fall Through here */
case -ENOENT:
padapter->bDriverStopped = true;
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("usb_read_port_complete:bDriverStopped ="
- "true\n"));
+ "usb_read_port_complete:bDriverStopped =true\n");
break;
case -EPROTO:
break;
do {
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("recvbuf2recvframe: rxdesc = offsset 0:0x%08x, "
- "4:0x%08x, 8:0x%08x, C:0x%08x\n", prxstat->rxdw0,
- prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4));
+ "recvbuf2recvframe: rxdesc = offsset 0:0x%08x, 4:0x%08x, 8:0x%08x, C:0x%08x\n",
+ prxstat->rxdw0, prxstat->rxdw1,
+ prxstat->rxdw2, prxstat->rxdw4);
prxstat = (struct recv_stat *)pbuf;
precvframe = rtw_alloc_recvframe23a(pfree_recv_queue);
if (!precvframe) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("recvbuf2recvframe: precvframe == NULL\n"));
+ "recvbuf2recvframe: precvframe == NULL\n");
DBG_8723A("%s()-%d: rtw_alloc_recvframe23a() failed! RX "
"Drop!\n", __func__, __LINE__);
goto _exit_recvbuf2recvframe;
if (pattrib->pkt_len <= 0 || pkt_offset > transfer_len) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
- ("recvbuf2recvframe: pkt_len<= 0\n"));
+ "recvbuf2recvframe: pkt_len<= 0\n");
DBG_8723A("%s()-%d: RX Warning!\n",
__func__, __LINE__);
rtw_free_recvframe23a(precvframe);
if (rtw_recv_entry23a(precvframe) != _SUCCESS)
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
- ("recvbuf2recvframe: rtw_recv_entry23a"
- "(precvframe) != _SUCCESS\n"));
+ "recvbuf2recvframe: rtw_recv_entry23a(precvframe) != _SUCCESS\n");
pkt_cnt--;
transfer_len -= pkt_offset;
struct recv_priv *precvpriv = &padapter->recvpriv;
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("usb_read_port_complete!!!\n"));
+ "usb_read_port_complete!!!\n");
precvpriv->rx_pending_cnt--;
if (padapter->bSurpriseRemoved || padapter->bDriverStopped ||
padapter->bReadPortCancel) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("usb_read_port_complete:bDriverStopped(%d) OR "
- "bSurpriseRemoved(%d)\n", padapter->bDriverStopped,
- padapter->bSurpriseRemoved));
+ "usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n",
+ padapter->bDriverStopped, padapter->bSurpriseRemoved);
DBG_8723A("%s()-%d: RX Warning! bDriverStopped(%d) OR "
"bSurpriseRemoved(%d) bReadPortCancel(%d)\n",
if (purb->actual_length > MAX_RECVBUF_SZ ||
purb->actual_length < RXDESC_SIZE) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("usb_read_port_complete: (purb->actual_"
- "length > MAX_RECVBUF_SZ) || (purb->actual_"
- "length < RXDESC_SIZE)\n"));
+ "usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n");
rtl8723au_read_port(padapter, 0, precvbuf);
DBG_8723A("%s()-%d: RX Warning!\n",
__func__, __LINE__);
}
} else {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("usb_read_port_complete : purb->status(%d) != 0 \n",
- purb->status));
+ "usb_read_port_complete : purb->status(%d) != 0\n",
+ purb->status);
skb_put(precvbuf->pskb, purb->actual_length);
precvbuf->pskb = NULL;
case -ENODEV:
case -ESHUTDOWN:
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("usb_read_port_complete:bSurprise"
- "Removed = true\n"));
+ "usb_read_port_complete:bSurpriseRemoved = true\n");
/* Intentional fall through here */
case -ENOENT:
padapter->bDriverStopped = true;
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("usb_read_port_complete:"
- "bDriverStopped = true\n"));
+ "usb_read_port_complete:bDriverStopped = true\n");
break;
case -EPROTO:
case -EOVERFLOW:
if (adapter->bDriverStopped || adapter->bSurpriseRemoved) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("usb_read_port:(padapter->bDriverStopped ||"
- "padapter->bSurpriseRemoved)!!!\n"));
+ "usb_read_port:(padapter->bDriverStopped ||padapter->bSurpriseRemoved)!!!\n");
return _FAIL;
}
if (!precvbuf) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("usb_read_port:precvbuf == NULL\n"));
+ "usb_read_port:precvbuf == NULL\n");
return _FAIL;
}
if (!precvbuf->pskb) {
precvbuf->pskb = netdev_alloc_skb(adapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
if (precvbuf->pskb == NULL) {
- RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("init_recvbuf(): alloc_skb fail!\n"));
+ RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
+ "init_recvbuf(): alloc_skb fail!\n");
return _FAIL;
}
err = usb_submit_urb(purb, GFP_ATOMIC);
if ((err) && (err != -EPERM)) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("cannot submit rx in-token(err = 0x%.8x), URB_STATUS "
- "= 0x%.8x", err, purb->status));
+ "cannot submit rx in-token(err = 0x%.8x), URB_STATUS = 0x%.8x\n",
+ err, purb->status);
DBG_8723A("cannot submit rx in-token(err = 0x%08x), urb_status "
"= %d\n", err, purb->status);
ret = _FAIL;
#ifndef __INC_HAL8723PHYCFG_H__
#define __INC_HAL8723PHYCFG_H__
-/*--------------------------Define Parameters-------------------------------*/
-#define MAX_AGGR_NUM 0x0909
-
/*------------------------------Define structure----------------------------*/
enum RF_RADIO_PATH {
RF_PATH_A = 0, /* Radio Path A */
WIRELESS_MODE_AC = BIT(6)
};
-/* BB/RF related */
-enum rf_type_8190p {
- RF_TYPE_MIN, /* 0 */
- RF_8225 = 1, /* 1 11b/g RF for verification only */
- RF_8256 = 2, /* 2 11b/g/n */
- RF_8258 = 3, /* 3 11a/b/g/n RF */
- RF_6052 = 4, /* 4 11b/g/n RF */
-};
-
struct bb_reg_define {
u32 rfintfs; /* set software control: */
/* 0x870~0x877[8 bytes] */
CHIP_VENDOR_UMC = 1,
};
-enum hal_rf_type {
- RF_TYPE_1T1R = 0,
- RF_TYPE_1T2R = 1,
- RF_TYPE_2T2R = 2,
- RF_TYPE_2T3R = 3,
- RF_TYPE_2T4R = 4,
- RF_TYPE_3T3R = 5,
- RF_TYPE_3T4R = 6,
- RF_TYPE_4T4R = 7,
-};
-
struct hal_version {
enum hal_ic_type ICType;
enum hal_chip_type ChipType;
enum hal_cut_version CUTVersion;
enum hal_vendor VendorType;
- enum hal_rf_type RFType;
u8 ROMVer;
};
/* Get element */
#define GET_CVID_IC_TYPE(version) ((version).ICType)
#define GET_CVID_CHIP_TYPE(version) ((version).ChipType)
-#define GET_CVID_RF_TYPE(version) ((version).RFType)
#define GET_CVID_MANUFACTUER(version) ((version).VendorType)
#define GET_CVID_CUT_VERSION(version) ((version).CUTVersion)
#define GET_CVID_ROM_VERSION(version) (((version).ROMVer) & ROM_VERSION_MASK)
#define IS_CHIP_VENDOR_UMC(version) \
((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_UMC) ? true : false)
-#define IS_1T1R(version) \
- ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T1R) ? true : false)
-#define IS_1T2R(version) \
- ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R) ? true : false)
-#define IS_2T2R(version) \
- ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R) ? true : false)
-
/* Chip version Macro. -- */
-#define IS_92C_SERIAL(version) \
- ((IS_81XXC(version) && IS_2T2R(version)) ? true : false)
#define IS_81xxC_VENDOR_UMC_A_CUT(version) \
(IS_81XXC(version)?(IS_CHIP_VENDOR_UMC(version) ? \
(IS_A_CUT(version) ? true : false) : false) : false)
#define RATE_36M BIT(9)
#define RATE_48M BIT(10)
#define RATE_54M BIT(11)
-/* MCS 1 Spatial Stream */
-#define RATE_MCS0 BIT(12)
-#define RATE_MCS1 BIT(13)
-#define RATE_MCS2 BIT(14)
-#define RATE_MCS3 BIT(15)
-#define RATE_MCS4 BIT(16)
-#define RATE_MCS5 BIT(17)
-#define RATE_MCS6 BIT(18)
-#define RATE_MCS7 BIT(19)
-/* MCS 2 Spatial Stream */
-#define RATE_MCS8 BIT(20)
-#define RATE_MCS9 BIT(21)
-#define RATE_MCS10 BIT(22)
-#define RATE_MCS11 BIT(23)
-#define RATE_MCS12 BIT(24)
-#define RATE_MCS13 BIT(25)
-#define RATE_MCS14 BIT(26)
-#define RATE_MCS15 BIT(27)
-
-/* ALL CCK Rate */
-#define RATE_ALL_CCK (RATR_1M | RATR_2M | RATR_55M | RATR_11M)
-#define RATE_ALL_OFDM_AG \
- (RATR_6M | RATR_9M | RATR_12M | RATR_18M | RATR_24M| \
- RATR_36M|RATR_48M|RATR_54M)
-#define RATE_ALL_OFDM_1SS \
- (RATR_MCS0 | RATR_MCS1 | RATR_MCS2 | RATR_MCS3 | \
- RATR_MCS4 | RATR_MCS5 | RATR_MCS6 | RATR_MCS7)
-#define RATE_ALL_OFDM_2SS \
- (RATR_MCS8 | RATR_MCS9 | RATR_MCS10 | RATR_MCS11| \
- RATR_MCS12 | RATR_MCS13 | RATR_MCS14 | RATR_MCS15)
/*------------------------------ Tx Desc definition Macro ------------------------*/
/* pragma mark -- Tx Desc related definition. -- */
#define REG_NOA_DESC_COUNT 0x05EC
#include "HalVerDef.h"
-void dump_chip_info23a(struct hal_version ChipVersion);
u8 /* return the final channel plan decision */
#include <osdep_service.h>
#include <drv_types.h>
-enum RTL871X_HCI_TYPE {
- RTW_PCIE = BIT(0),
- RTW_USB = BIT(1),
- RTW_SDIO = BIT(2),
- RTW_GSPI = BIT(3),
-};
-
enum _CHIP_TYPE {
NULL_CHIP_TYPE,
RTL8712_8188S_8191S_8192S,
#define WLAN_REASON_JOIN_WRONG_CHANNEL 65534
#define WLAN_REASON_EXPIRATION_CHK 65535
-
-#define IEEE80211_STATMASK_SIGNAL (1<<0)
-#define IEEE80211_STATMASK_RSSI (1<<1)
-#define IEEE80211_STATMASK_NOISE (1<<2)
-#define IEEE80211_STATMASK_RATE (1<<3)
-#define IEEE80211_STATMASK_WEMASK 0x7
-
-
-#define IEEE80211_CCK_MODULATION (1<<0)
-#define IEEE80211_OFDM_MODULATION (1<<1)
-
-#define IEEE80211_24GHZ_BAND (1<<0)
-#define IEEE80211_52GHZ_BAND (1<<1)
-
#define IEEE80211_CCK_RATE_LEN 4
#define IEEE80211_NUM_OFDM_RATESLEN 8
> 0: TID
*/
-#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
-#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5]
-
#define MAXTID 16
#define WME_OUI_TYPE 2
u32 Cnt_BW_LSC; /* Gary */
};
-struct pri_cca {
- u8 PriCCA_flag;
- u8 intf_flag;
- u8 intf_type;
- u8 DupRTS_flag;
- u8 Monitor_flag;
-};
-
-struct rx_hp {
- u8 RXHP_flag;
- u8 PSD_func_trigger;
- u8 PSD_bitmap_RXHP[80];
- u8 Pre_IGI;
- u8 Cur_IGI;
- u8 Pre_pw_th;
- u8 Cur_pw_th;
- bool First_time_enter;
- bool RXHP_enable;
- u8 TP_Mode;
-};
-
#define ASSOCIATE_ENTRY_NUM 32 /* Max size of AsocEntry[]. */
#define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM
struct edca_turbo {
bool bCurrentTurboEDCA;
- bool bIsCurRDLState;
u32 prv_traffic_idx; /* edca turbo */
};
/* Fixed value: */
/* */
- ODM_CMNINFO_PLATFORM = 0,
- ODM_CMNINFO_INTERFACE, /* enum odm_interface_def */
- ODM_CMNINFO_MP_TEST_CHIP,
- ODM_CMNINFO_IC_TYPE, /* enum odm_ic_type_def */
- ODM_CMNINFO_CUT_VER, /* enum odm_cut_version */
- ODM_CMNINFO_FAB_VER, /* enum odm_fab_version */
- ODM_CMNINFO_RF_TYPE, /* enum rf_path_def or enum odm_rf_type? */
- ODM_CMNINFO_BOARD_TYPE, /* enum odm_board_type */
- ODM_CMNINFO_EXT_LNA, /* true */
+ ODM_CMNINFO_MP_TEST_CHIP = 2,
+ ODM_CMNINFO_IC_TYPE, /* enum odm_ic_type_def */
+ ODM_CMNINFO_CUT_VER, /* enum odm_cut_version */
+ ODM_CMNINFO_FAB_VER, /* enum odm_fab_version */
+ ODM_CMNINFO_BOARD_TYPE, /* enum odm_board_type */
+ ODM_CMNINFO_EXT_LNA, /* true */
ODM_CMNINFO_EXT_PA,
ODM_CMNINFO_EXT_TRSW,
- ODM_CMNINFO_PATCH_ID, /* CUSTOMER ID */
ODM_CMNINFO_BINHCT_TEST,
ODM_CMNINFO_BWIFI_TEST,
ODM_CMNINFO_SMART_CONCURRENT,
/* Define ODM support ability. ODM_CMNINFO_ABILITY */
enum {
/* BB ODM section BIT 0-15 */
- ODM_BB_DIG = BIT(0),
- ODM_BB_RA_MASK = BIT(1),
- ODM_BB_DYNAMIC_TXPWR = BIT(2),
- ODM_BB_FA_CNT = BIT(3),
- ODM_BB_RSSI_MONITOR = BIT(4),
- ODM_BB_CCK_PD = BIT(5),
ODM_BB_ANT_DIV = BIT(6),
- ODM_BB_PWR_SAVE = BIT(7),
- ODM_BB_PWR_TRAIN = BIT(8),
- ODM_BB_RATE_ADAPTIVE = BIT(9),
- ODM_BB_PATH_DIV = BIT(10),
- ODM_BB_PSD = BIT(11),
- ODM_BB_RXHP = BIT(12),
-
- /* MAC DM section BIT 16-23 */
- ODM_MAC_EDCA_TURBO = BIT(16),
- ODM_MAC_EARLY_MODE = BIT(17),
-
- /* RF ODM section BIT 24-31 */
- ODM_RF_TX_PWR_TRACK = BIT(24),
- ODM_RF_RX_GAIN_TRACK = BIT(25),
- ODM_RF_CALIBRATION = BIT(26),
-
};
/* ODM_CMNINFO_INTERFACE */
ODM_UMC = 1,
};
-/* ODM_CMNINFO_RF_TYPE */
/* For example 1T2R (A+AB = BIT0|BIT4|BIT5) */
enum rf_path_def {
ODM_RF_TX_A = BIT(0),
ODM_RF_RX_D = BIT(7),
};
-
-enum odm_rf_type {
- ODM_1T1R = 0,
- ODM_1T2R = 1,
- ODM_2T2R = 2,
- ODM_2T3R = 3,
- ODM_2T4R = 4,
- ODM_3T3R = 5,
- ODM_3T4R = 6,
- ODM_4T4R = 7,
-};
-
/* ODM Dynamic common info value definition */
enum odm_mac_phy_mode {
u8 bDPPathBOK;
};
-/* ODM Dynamic common info value definition */
-struct odm_fat_t {
- u8 Bssid[6];
- u8 antsel_rx_keep_0;
- u8 antsel_rx_keep_1;
- u8 antsel_rx_keep_2;
- u32 antSumRSSI[7];
- u32 antRSSIcnt[7];
- u32 antAveRSSI[7];
- u8 FAT_State;
- u32 TrainIdx;
- u8 antsel_a[ODM_ASSOCIATE_ENTRY_NUM];
- u8 antsel_b[ODM_ASSOCIATE_ENTRY_NUM];
- u8 antsel_c[ODM_ASSOCIATE_ENTRY_NUM];
- u32 MainAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM];
- u32 AuxAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM];
- u32 MainAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
- u32 AuxAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
- u8 RxIdleAnt;
- bool bBecomeLinked;
-};
-
-enum fat_state {
- FAT_NORMAL_STATE = 0,
- FAT_TRAINING_STATE = 1,
-};
-
enum ant_dif_type {
NO_ANTDIV = 0xFF,
CG_TRX_HW_ANTDIV = 0x01,
/* ODM HANDLE, DRIVER NEEDS NOT TO HOOK------ */
bool bCckHighPower;
u8 RFPathRxEnable; /* ODM_CMNINFO_RFPATH_ENABLE */
- u8 ControlChannel;
/* ODM HANDLE, DRIVER NEEDS NOT TO HOOK------ */
/* 1 COMMON INFORMATION */
/* HOOK BEFORE REG INIT----------- */
/* ODM Support Ability DIG/RATR/TX_PWR_TRACK/ ¡K¡K = 1/2/3/¡K */
u32 SupportAbility;
- /* ODM PCIE/USB/SDIO/GSPI = 0/1/2/3 */
- u8 SupportInterface;
/* ODM composite or independent. Bit oriented/ 92C+92D+ .... or any other type = 1/2/3/... */
u32 SupportICType;
/* Cut Version TestChip/A-cut/B-cut... = 0/1/2/3/... */
u8 CutVersion;
/* Fab Version TSMC/UMC = 0/1 */
u8 FabVersion;
- /* RF Type 4T4R/3T3R/2T2R/1T2R/1T1R/... */
- u8 RFType;
/* Board Type Normal/HighPower/MiniCard/SLIM/Combo/... = 0/1/2/3/4/... */
u8 BoardType;
/* with external LNA NO/Yes = 0/1 */
u8 ExtPA;
/* with external TRSW NO/Yes = 0/1 */
u8 ExtTRSW;
- u8 PatchID; /* Customer ID */
bool bInHctTest;
bool bWIFITest;
/* 2012/01/12 MH For MP, we need to reduce one array pointer for default port.?? */
struct sta_info * pODM_StaInfo[ODM_ASSOCIATE_ENTRY_NUM];
- /* */
- /* 2012/02/14 MH Add to share 88E ra with other SW team. */
- /* We need to colelct all support abilit to a proper area. */
- /* */
- bool RaSupport88E;
-
- /* Define ........... */
-
/* Latest packet phy info (ODM write) */
struct odm_phy_dbg_info PhyDbgInfo;
/* PHY_INFO_88E PhyInfo; */
/* */
/* ODM Structure */
/* */
- struct odm_fat_t DM_FatTable;
struct dig_t DM_DigTable;
struct dynamic_pwr_sav DM_PSTable;
- struct pri_cca DM_PriCCA;
- struct rx_hp DM_RXHP_Table;
struct false_alarm_stats FalseAlmCnt;
struct false_alarm_stats FlaseAlmCntBuddyAdapter;
struct sw_ant_sw DM_SWAT_Table;
/* */
/* PSD */
- bool bUserAssignLevel;
- u8 RSSI_BT; /* come from BT */
- bool bPSDinProcess;
-
- /* for rate adaptive, in fact, 88c/92c fw will handle this */
- u8 bUseRAMask;
-
+ u8 RSSI_BT; /* come from BT */
struct odm_rate_adapt RateAdaptive;
struct odm_rf_cal_t RFCalibrateInfo;
-
- /* */
- /* TX power tracking */
- /* */
- u8 BbSwingIdxOfdm;
- u8 BbSwingIdxOfdmCurrent;
- u8 BbSwingIdxOfdmBase;
- bool BbSwingFlagOfdm;
- u8 BbSwingIdxCck;
- u8 BbSwingIdxCckCurrent;
- u8 BbSwingIdxCckBase;
- bool BbSwingFlagCck;
- /* */
- /* ODM system resource. */
- /* */
}; /* DM_Dynamic_Mechanism_Structure */
enum odm_rf_content {
bool ODM_SingleDualAntennaDetection(struct dm_odm_t *pDM_Odm, u8 mode);
-void odm_dtc(struct dm_odm_t *pDM_Odm);
-
#endif
void odm_ConfigMAC_8723A(struct dm_odm_t *pDM_Odm, u32 Addr, u8 Data);
-void odm_ConfigBB_AGC_8723A(struct dm_odm_t *pDM_Odm, u32 Addr,
- u32 Bitmask, u32 Data);
+void odm_ConfigBB_AGC_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u32 data);
-void odm_ConfigBB_PHY_8723A(struct dm_odm_t *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data);
+void odm_ConfigBB_PHY_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u32 data);
#endif /* end of SUPPORT */
/* =========== EXtern Function Prototype */
/* */
-
-u8 ODM_Read1Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr);
-u16 ODM_Read2Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr);
-u32 ODM_Read4Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr);
-void ODM_Write1Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr, u8 Data);
-void ODM_Write2Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr, u16 Data);
-void ODM_Write4Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr, u32 Data);
-void ODM_SetMACReg(struct dm_odm_t *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data);
-u32 ODM_GetMACReg(struct dm_odm_t *pDM_Odm, u32 RegAddr, u32 BitMask);
-void ODM_SetBBReg(struct dm_odm_t *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data);
-u32 ODM_GetBBReg(struct dm_odm_t *pDM_Odm, u32 RegAddr, u32 BitMask);
void ODM_SetRFReg(struct dm_odm_t *pDM_Odm, enum RF_RADIO_PATH eRFPath,
u32 RegAddr, u32 BitMask, u32 Data);
u32 ODM_GetRFReg(struct dm_odm_t *pDM_Odm, enum RF_RADIO_PATH eRFPath,
u16 BasicRateSet;
/* rf_ctrl */
- u8 rf_chip;
u8 rf_type;
u8 NumTotalRFPath;
/* for host message to fw */
u8 LastHMEBoxNum;
- u8 fw_ractrl;
u8 RegTxPause;
/* Beacon function related global variable. */
u8 RegFwHwTxQCtrl;
extern u32 GlobalDebugLevel23A;
+__printf(3, 4)
+void rt_trace(int comp, int level, const char *fmt, ...);
-#define RT_TRACE(_Comp, _Level, Fmt) \
+#define RT_TRACE(_Comp, _Level, Fmt, ...) \
do { \
- if (_Level <= GlobalDebugLevel23A) { \
- pr_info("%s [0x%08x,%d]", DRIVER_PREFIX, \
- (unsigned int)_Comp, _Level); \
- pr_info Fmt; \
- } \
+ if (_Level <= GlobalDebugLevel23A) \
+ rt_trace(_Comp, _Level, Fmt, ##__VA_ARGS__); \
} while (0)
#define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, \
if (keyparms->cipher == WLAN_CIPHER_SUITE_WEP40 ||
keyparms->cipher == WLAN_CIPHER_SUITE_WEP104) {
RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_err_,
- ("wpa_set_encryption, crypt.alg = WEP\n"));
+ "wpa_set_encryption, crypt.alg = WEP\n");
DBG_8723A("wpa_set_encryption, crypt.alg = WEP\n");
if (psecuritypriv->bWepDefaultKeyIdxSet == 0) {
ret = -ENOENT;
goto exit;
}
- DBG_8723A("%s(%s): mac =" MAC_FMT "\n", __func__, ndev->name,
- MAC_ARG(mac));
+ DBG_8723A("%s(%s): mac=%pM\n", __func__, ndev->name, mac);
/* for infra./P2PClient mode */
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) &&
struct wlan_network *cur_network = &pmlmepriv->cur_network;
if (!ether_addr_equal(mac, cur_network->network.MacAddress)) {
- DBG_8723A("%s, mismatch bssid =" MAC_FMT "\n", __func__,
- MAC_ARG(cur_network->network.MacAddress));
+ DBG_8723A("%s, mismatch bssid=%pM\n",
+ __func__, cur_network->network.MacAddress);
ret = -ENOENT;
goto exit;
}
old_mode = cur_network->network.ifmode;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_notice_,
- ("+%s: old =%d new =%d fw_state = 0x%08x\n", __func__,
- old_mode, ifmode, get_fwstate(pmlmepriv)));
+ "+%s: old =%d new =%d fw_state = 0x%08x\n", __func__,
+ old_mode, ifmode, get_fwstate(pmlmepriv));
if (old_mode != ifmode) {
spin_lock_bh(&pmlmepriv->lock);
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
- (" change mode!"));
+ "change mode!\n");
if (old_mode == NL80211_IFTYPE_AP ||
old_mode == NL80211_IFTYPE_P2P_GO) {
/* SecClearAllKeys(adapter); */
- /* RT_TRACE(COMP_OID_SET, DBG_LOUD,
- ("set_infrastructure: fw_state:%x after changing mode\n", */
- /* get_fwstate(pmlmepriv))); */
-
spin_unlock_bh(&pmlmepriv->lock);
}
pie[i + 4], pie[i + 5], pie[i + 6], pie[i + 7]);
if (ielen < RSN_HEADER_LEN) {
RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_err_,
- ("Ie len too short %d\n", (int)ielen));
+ "Ie len too short %d\n", (int)ielen);
ret = -1;
goto exit;
}
rtl8723a_off_rcr_am(padapter);
RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_,
- ("rtw_set_wpa_ie: pairwise_cipher = 0x%08x padapter->"
- "securitypriv.ndisencryptstatus =%d padapter->"
- "securitypriv.ndisauthtype =%d\n", pairwise_cipher,
- padapter->securitypriv.ndisencryptstatus,
- padapter->securitypriv.ndisauthtype));
+ "rtw_set_wpa_ie: pairwise_cipher = 0x%08x padapter->securitypriv.ndisencryptstatus =%d padapter->securitypriv.ndisauthtype =%d\n",
+ pairwise_cipher,
+ padapter->securitypriv.ndisencryptstatus,
+ padapter->securitypriv.ndisauthtype);
exit:
if (ret)
if (keyid >= NUM_WEP_KEYS) {
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
- ("%s:keyid>4 =>fail\n", __func__));
+ "%s:keyid>4 =>fail\n", __func__);
res = _FAIL;
goto exit;
}
case WLAN_KEY_LEN_WEP40:
psecuritypriv->dot11PrivacyAlgrthm = WLAN_CIPHER_SUITE_WEP40;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
- ("%s:wep->KeyLength = 5\n", __func__));
+ "%s:wep->KeyLength = 5\n", __func__);
break;
case WLAN_KEY_LEN_WEP104:
psecuritypriv->dot11PrivacyAlgrthm = WLAN_CIPHER_SUITE_WEP104;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
- ("%s:wep->KeyLength = 13\n", __func__));
+ "%s:wep->KeyLength = 13\n", __func__);
break;
default:
psecuritypriv->dot11PrivacyAlgrthm = 0;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
- ("%s:wep->KeyLength!= 5 or 13\n", __func__));
+ "%s:wep->KeyLength!= 5 or 13\n", __func__);
res = _FAIL;
goto exit;
}
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
- ("%s:before memcpy, wep->KeyLength = 0x%x keyid =%x\n",
- __func__, wep->keylen, keyid));
+ "%s:before memcpy, wep->KeyLength = 0x%x keyid =%x\n",
+ __func__, wep->keylen, keyid);
memcpy(&psecuritypriv->wep_key[keyid], wep, sizeof(struct rtw_wep_key));
psecuritypriv->dot11PrivacyKeyIndex = keyid;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
- ("%s:security key material : "
- "%x %x %x %x %x %x %x %x %x %x %x %x %x\n", __func__,
- psecuritypriv->wep_key[keyid].key[0],
- psecuritypriv->wep_key[keyid].key[1],
- psecuritypriv->wep_key[keyid].key[2],
- psecuritypriv->wep_key[keyid].key[3],
- psecuritypriv->wep_key[keyid].key[4],
- psecuritypriv->wep_key[keyid].key[5],
- psecuritypriv->wep_key[keyid].key[6],
- psecuritypriv->wep_key[keyid].key[7],
- psecuritypriv->wep_key[keyid].key[8],
- psecuritypriv->wep_key[keyid].key[9],
- psecuritypriv->wep_key[keyid].key[10],
- psecuritypriv->wep_key[keyid].key[11],
- psecuritypriv->wep_key[keyid].key[12]));
+ "%s:security key material : %x %x %x %x %x %x %x %x %x %x %x %x %x\n",
+ __func__,
+ psecuritypriv->wep_key[keyid].key[0],
+ psecuritypriv->wep_key[keyid].key[1],
+ psecuritypriv->wep_key[keyid].key[2],
+ psecuritypriv->wep_key[keyid].key[3],
+ psecuritypriv->wep_key[keyid].key[4],
+ psecuritypriv->wep_key[keyid].key[5],
+ psecuritypriv->wep_key[keyid].key[6],
+ psecuritypriv->wep_key[keyid].key[7],
+ psecuritypriv->wep_key[keyid].key[8],
+ psecuritypriv->wep_key[keyid].key[9],
+ psecuritypriv->wep_key[keyid].key[10],
+ psecuritypriv->wep_key[keyid].key[11],
+ psecuritypriv->wep_key[keyid].key[12]);
res = rtw_set_key23a(padapter, psecuritypriv, keyid, 1);
if (padapter->hw_init_completed == false) {
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
- ("set_ssid: hw_init_completed == false =>exit!!!\n"));
+ "set_ssid: hw_init_completed == false =>exit!!!\n");
status = _FAIL;
goto exit;
}
if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE)) {
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
- ("set_ssid: _FW_LINKED||WIFI_ADHOC_MASTER_STATE\n"));
+ "set_ssid: _FW_LINKED||WIFI_ADHOC_MASTER_STATE\n");
if (pmlmepriv->assoc_ssid.ssid_len ==
newnetwork->network.Ssid.ssid_len &&
newnetwork->network.Ssid.ssid_len)) {
if (!check_fwstate(pmlmepriv, WIFI_STATION_STATE)) {
RT_TRACE(_module_rtl871x_ioctl_set_c_,
- _drv_err_, ("New SSID is same SSID, "
- "fw_state = 0x%08x\n",
- get_fwstate(pmlmepriv)));
+ _drv_err_,
+ "New SSID is same SSID, fw_state = 0x%08x\n",
+ get_fwstate(pmlmepriv));
if (rtw_is_same_ibss23a(padapter, pnetwork)) {
/*
}
} else {
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
- ("Set SSID not the same ssid\n"));
+ "Set SSID not the same ssid\n");
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
- ("set_ssid =[%s] len = 0x%x\n",
- newnetwork->network.Ssid.ssid,
- newnetwork->network.Ssid.ssid_len));
+ "set_ssid =[%s] len = 0x%x\n",
+ newnetwork->network.Ssid.ssid,
+ newnetwork->network.Ssid.ssid_len);
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
- ("assoc_ssid =[%s] len = 0x%x\n",
- pmlmepriv->assoc_ssid.ssid,
- pmlmepriv->assoc_ssid.ssid_len));
+ "assoc_ssid =[%s] len = 0x%x\n",
+ pmlmepriv->assoc_ssid.ssid,
+ pmlmepriv->assoc_ssid.ssid_len);
rtw_disassoc_cmd23a(padapter, 0, true);
exit:
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
- ("-%s: status =%d\n", __func__, status));
+ "-%s: status =%d\n", __func__, status);
return status;
}
DBG_8723A("ssid =%s, len =%zu\n", sme->ssid, sme->ssid_len);
if (sme->bssid)
- DBG_8723A("bssid =" MAC_FMT "\n", MAC_ARG(sme->bssid));
+ DBG_8723A("bssid=%pM\n", sme->bssid);
if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) {
ret = -EBUSY;
mgmt = (struct ieee80211_mgmt *)dot11_hdr;
- DBG_8723A("RTW_Tx:da =" MAC_FMT " via %s(%s)\n",
- MAC_ARG(mgmt->da), __func__, ndev->name);
+ DBG_8723A("RTW_Tx:da=%pM via %s(%s)\n",
+ mgmt->da, __func__, ndev->name);
category = mgmt->u.action.category;
action = mgmt->u.action.u.wme_action.action_code;
DBG_8723A("RTW_Tx:category(%u), action(%u)\n",
return ret;
}
- DBG_8723A("free sta macaddr =" MAC_FMT "\n", MAC_ARG(mac));
+ DBG_8723A("free sta macaddr=%pM\n", mac);
if (is_broadcast_ether_addr(mac))
return -EINVAL;
cfg80211_mgmt_tx_status(padapter->rtw_wdev, *cookie, buf, len, ack,
GFP_KERNEL);
- DBG_8723A("RTW_Tx:tx_ch =%d, da =" MAC_FMT "\n", tx_ch,
- MAC_ARG(hdr->da));
+ DBG_8723A("RTW_Tx:tx_ch =%d, da =%pM\n", tx_ch, hdr->da);
category = hdr->u.action.category;
action = hdr->u.action.u.wme_action.action_code;
DBG_8723A("RTW_Tx:category(%u), action(%u)\n", category, action);
MODULE_FIRMWARE("rtlwifi/rtl8723aufw_B_NoBT.bin");
/* module param defaults */
-static int rtw_chip_version = 0x00;
+static int rtw_chip_version;
static int rtw_rfintfs = HWPI;
static int rtw_debug = 1;
{
if (dev_alloc_name(pnetdev, ifname) < 0) {
RT_TRACE(_module_os_intfs_c_, _drv_err_,
- ("dev_alloc_name, fail!\n"));
+ "dev_alloc_name, fail!\n");
}
netif_carrier_off(pnetdev);
return 0;
struct rtw_adapter *padapter;
struct net_device *pnetdev;
- RT_TRACE(_module_os_intfs_c_, _drv_info_, ("+init_net_dev\n"));
+ RT_TRACE(_module_os_intfs_c_, _drv_info_, "+init_net_dev\n");
pnetdev = alloc_etherdev_mq(sizeof(struct rtw_adapter), 4);
if (!pnetdev)
{
int ret8 = _SUCCESS;
- RT_TRACE(_module_os_intfs_c_, _drv_info_, ("+rtw_init_drv_sw23a\n"));
+ RT_TRACE(_module_os_intfs_c_, _drv_info_, "+rtw_init_drv_sw23a\n");
if (rtw_init_cmd_priv23a(&padapter->cmdpriv) == _FAIL) {
RT_TRACE(_module_os_intfs_c_, _drv_err_,
- ("\n Can't init cmd_priv\n"));
+ "Can't init cmd_priv\n");
ret8 = _FAIL;
goto exit;
}
if (rtw_init_evt_priv23a(&padapter->evtpriv) == _FAIL) {
RT_TRACE(_module_os_intfs_c_, _drv_err_,
- ("\n Can't init evt_priv\n"));
+ "Can't init evt_priv\n");
ret8 = _FAIL;
goto exit;
}
if (rtw_init_mlme_priv23a(padapter) == _FAIL) {
RT_TRACE(_module_os_intfs_c_, _drv_err_,
- ("\n Can't init mlme_priv\n"));
+ "Can't init mlme_priv\n");
ret8 = _FAIL;
goto exit;
}
if (init_mlme_ext_priv23a(padapter) == _FAIL) {
RT_TRACE(_module_os_intfs_c_, _drv_err_,
- ("\n Can't init mlme_ext_priv\n"));
+ "Can't init mlme_ext_priv\n");
ret8 = _FAIL;
goto exit;
}
exit:
- RT_TRACE(_module_os_intfs_c_, _drv_info_, ("-rtw_init_drv_sw23a\n"));
+ RT_TRACE(_module_os_intfs_c_, _drv_info_, "-rtw_init_drv_sw23a\n");
return ret8;
}
void rtw_cancel_all_timer23a(struct rtw_adapter *padapter)
{
RT_TRACE(_module_os_intfs_c_, _drv_info_,
- ("+rtw_cancel_all_timer23a\n"));
+ "+rtw_cancel_all_timer23a\n");
del_timer_sync(&padapter->mlmepriv.assoc_timer);
RT_TRACE(_module_os_intfs_c_, _drv_info_,
- ("%s:cancel association timer complete!\n", __func__));
+ "%s:cancel association timer complete!\n", __func__);
del_timer_sync(&padapter->mlmepriv.scan_to_timer);
RT_TRACE(_module_os_intfs_c_, _drv_info_,
- ("%s:cancel scan_to_timer!\n", __func__));
+ "%s:cancel scan_to_timer!\n", __func__);
del_timer_sync(&padapter->mlmepriv.dynamic_chk_timer);
RT_TRACE(_module_os_intfs_c_, _drv_info_,
- ("%s:cancel dynamic_chk_timer!\n", __func__));
+ "%s:cancel dynamic_chk_timer!\n", __func__);
del_timer_sync(&padapter->pwrctrlpriv.pwr_state_check_timer);
del_timer_sync(&padapter->mlmepriv.set_scan_deny_timer);
rtw_clear_scan_deny(padapter);
RT_TRACE(_module_os_intfs_c_, _drv_info_,
- ("%s:cancel set_scan_deny_timer!\n", __func__));
+ "%s:cancel set_scan_deny_timer!\n", __func__);
del_timer_sync(&padapter->recvpriv.signal_stat_timer);
}
int rtw_free_drv_sw23a(struct rtw_adapter *padapter)
{
- RT_TRACE(_module_os_intfs_c_, _drv_info_, ("==>rtw_free_drv_sw23a"));
+ RT_TRACE(_module_os_intfs_c_, _drv_info_, "==>rtw_free_drv_sw23a\n");
free_mlme_ext_priv23a(&padapter->mlmeextpriv);
kfree(padapter->HalData);
padapter->HalData = NULL;
- RT_TRACE(_module_os_intfs_c_, _drv_info_, ("-rtw_free_drv_sw23a\n"));
+ RT_TRACE(_module_os_intfs_c_, _drv_info_, "-rtw_free_drv_sw23a\n");
return _SUCCESS;
}
ret = _FAIL;
goto error_register_netdev;
}
- DBG_8723A("%s, MAC Address (if%d) = " MAC_FMT "\n", __func__,
- (padapter->iface_id + 1), MAC_ARG(pnetdev->dev_addr));
+ DBG_8723A("%s, MAC Address (if%d) = %pM\n",
+ __func__, padapter->iface_id + 1, pnetdev->dev_addr);
return ret;
error_register_netdev:
int ret = 0;
int status;
- RT_TRACE(_module_os_intfs_c_, _drv_info_, ("+871x_drv - dev_open\n"));
+ RT_TRACE(_module_os_intfs_c_, _drv_info_, "+871x_drv - dev_open\n");
DBG_8723A("+871x_drv - drv_open, bup =%d\n", padapter->bup);
mutex_lock(&adapter_to_dvobj(padapter)->hw_init_mutex);
status = rtl8723au_hal_init(padapter);
if (status == _FAIL) {
RT_TRACE(_module_os_intfs_c_, _drv_err_,
- ("rtl871x_hal_init(): Can't init h/w!\n"));
+ "rtl871x_hal_init(): Can't init h/w!\n");
goto netdev_open23a_error;
}
- DBG_8723A("MAC Address = "MAC_FMT"\n",
- MAC_ARG(pnetdev->dev_addr));
+ DBG_8723A("MAC Address = %pM\n", pnetdev->dev_addr);
if (init_hw_mlme_ext23a(padapter) == _FAIL) {
DBG_8723A("can't init mlme_ext_priv\n");
else
netif_tx_wake_all_queues(pnetdev);
- RT_TRACE(_module_os_intfs_c_, _drv_info_, ("-871x_drv - dev_open\n"));
+ RT_TRACE(_module_os_intfs_c_, _drv_info_, "-871x_drv - dev_open\n");
DBG_8723A("-871x_drv - drv_open, bup =%d\n", padapter->bup);
exit:
mutex_unlock(&adapter_to_dvobj(padapter)->hw_init_mutex);
netif_tx_stop_all_queues(pnetdev);
RT_TRACE(_module_os_intfs_c_, _drv_err_,
- ("-871x_drv - dev_open, fail!\n"));
+ "-871x_drv - dev_open, fail!\n");
DBG_8723A("-871x_drv - drv_open fail, bup =%d\n", padapter->bup);
ret = -1;
status = rtl8723au_hal_init(padapter);
if (status == _FAIL) {
RT_TRACE(_module_os_intfs_c_, _drv_err_,
- ("ips_netdrv_open(): Can't init h/w!\n"));
+ "ips_netdrv_open(): Can't init h/w!\n");
goto netdev_open23a_error;
}
{
struct rtw_adapter *padapter = netdev_priv(pnetdev);
- RT_TRACE(_module_os_intfs_c_, _drv_info_, ("+871x_drv - drv_close\n"));
+ RT_TRACE(_module_os_intfs_c_, _drv_info_, "+871x_drv - drv_close\n");
padapter->net_closed = true;
rtw_scan_abort23a(padapter);
- RT_TRACE(_module_os_intfs_c_, _drv_info_, ("-871x_drv - drv_close\n"));
+ RT_TRACE(_module_os_intfs_c_, _drv_info_, "-871x_drv - drv_close\n");
DBG_8723A("-871x_drv - drv_close, bup =%d\n", padapter->bup);
return 0;
skb = precv_frame->pkt;
if (!skb) {
RT_TRACE(_module_recv_osdep_c_, _drv_err_,
- ("rtw_recv_indicatepkt23a():skb == NULL!!!!\n"));
+ "rtw_recv_indicatepkt23a():skb == NULL!!!!\n");
goto _recv_indicatepkt_drop;
}
RT_TRACE(_module_recv_osdep_c_, _drv_info_,
- ("rtw_recv_indicatepkt23a():skb != NULL !!!\n"));
+ "rtw_recv_indicatepkt23a():skb != NULL !!!\n");
RT_TRACE(_module_recv_osdep_c_, _drv_info_,
- ("rtw_recv_indicatepkt23a():precv_frame->hdr.rx_data =%p\n",
- precv_frame->pkt->data));
+ "rtw_recv_indicatepkt23a():precv_frame->hdr.rx_data =%p\n",
+ precv_frame->pkt->data);
RT_TRACE(_module_recv_osdep_c_, _drv_info_,
- ("\n skb->head =%p skb->data =%p skb->tail =%p skb->end =%p skb->len =%d\n",
- skb->head, skb->data,
- skb_tail_pointer(skb), skb_end_pointer(skb), skb->len));
+ "skb->head =%p skb->data =%p skb->tail =%p skb->end =%p skb->len =%d\n",
+ skb->head, skb->data,
+ skb_tail_pointer(skb), skb_end_pointer(skb), skb->len);
if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true) {
struct sk_buff *pskb2 = NULL;
rtw_free_recvframe23a(precv_frame);
RT_TRACE(_module_recv_osdep_c_, _drv_info_,
- ("\n rtw_recv_indicatepkt23a :after netif_rx!!!!\n"));
+ "rtw_recv_indicatepkt23a :after netif_rx!!!!\n");
return _SUCCESS;
_recv_indicatepkt_drop:
if (rtw_init_intf_priv(pdvobjpriv) == _FAIL) {
RT_TRACE(_module_os_intfs_c_, _drv_err_,
- ("\n Can't INIT rtw_init_intf_priv\n"));
+ "Can't INIT rtw_init_intf_priv\n");
goto free_dvobj;
}
/* 3 misc */
void rtl8723a_usb_intf_stop(struct rtw_adapter *padapter)
{
- RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+usb_intf_stop\n"));
+ RT_TRACE(_module_hci_intfs_c_, _drv_err_, "+usb_intf_stop\n");
/* disable_hw_interrupt */
if (!padapter->bSurpriseRemoved) {
* TODO:
*/
RT_TRACE(_module_hci_intfs_c_, _drv_err_,
- ("SurpriseRemoved == false\n"));
+ "SurpriseRemoved == false\n");
}
/* cancel in irp */
rtl8723au_write_port_cancel(padapter);
/* todo:cancel other irps */
- RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("-usb_intf_stop\n"));
+ RT_TRACE(_module_hci_intfs_c_, _drv_err_, "-usb_intf_stop\n");
}
static void rtw_dev_unload(struct rtw_adapter *padapter)
{
struct submit_ctx *pack_tx_ops = &padapter->xmitpriv.ack_tx_ops;
- RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+rtw_dev_unload\n"));
+
+ RT_TRACE(_module_hci_intfs_c_, _drv_err_, "+rtw_dev_unload\n");
if (padapter->bup) {
DBG_8723A("===> rtw_dev_unload\n");
padapter->bup = false;
} else {
RT_TRACE(_module_hci_intfs_c_, _drv_err_,
- ("r871x_dev_unload():padapter->bup == false\n"));
+ "r871x_dev_unload():padapter->bup == false\n");
}
DBG_8723A("<=== rtw_dev_unload\n");
- RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("-rtw_dev_unload\n"));
+ RT_TRACE(_module_hci_intfs_c_, _drv_err_, "-rtw_dev_unload\n");
}
static int rtw_suspend(struct usb_interface *pusb_intf, pm_message_t message)
/* step 5. */
if (rtw_init_drv_sw23a(padapter) == _FAIL) {
RT_TRACE(_module_hci_intfs_c_, _drv_err_,
- ("Initialize driver software resource Failed!\n"));
+ "Initialize driver software resource Failed!\n");
goto free_hal_data;
}
struct dvobj_priv *dvobj;
int status = _FAIL;
- RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+rtw_drv_init\n"));
+ RT_TRACE(_module_hci_intfs_c_, _drv_err_, "+rtw_drv_init\n");
/* Initialize dvobj_priv */
dvobj = usb_dvobj_init(pusb_intf);
if (!dvobj) {
RT_TRACE(_module_hci_intfs_c_, _drv_err_,
- ("initialize device object priv Failed!\n"));
+ "initialize device object priv Failed!\n");
goto exit;
}
if (status != _SUCCESS)
goto free_if1;
RT_TRACE(_module_hci_intfs_c_, _drv_err_,
- ("-871x_drv - drv_init, success!\n"));
+ "-871x_drv - drv_init, success!\n");
status = _SUCCESS;
usb_set_intfdata(pusb_intf, NULL);
- RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+dev_remove()\n"));
+ RT_TRACE(_module_hci_intfs_c_, _drv_err_, "+dev_remove()\n");
rtw_pm_set_ips23a(padapter, IPS_NONE);
rtw_pm_set_lps23a(padapter, PS_MODE_ACTIVE);
usb_dvobj_deinit(pusb_intf);
- RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("-dev_remove()\n"));
+ RT_TRACE(_module_hci_intfs_c_, _drv_err_, "-dev_remove()\n");
DBG_8723A("-r871xu_dev_remove, done\n");
-
- return;
}
static int __init rtw_drv_entry(void)
{
- RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+rtw_drv_entry\n"));
+ RT_TRACE(_module_hci_intfs_c_, _drv_err_, "+rtw_drv_entry\n");
return usb_register(usb_drv);
}
static void __exit rtw_drv_halt(void)
{
- RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+rtw_drv_halt\n"));
+ RT_TRACE(_module_hci_intfs_c_, _drv_err_, "+rtw_drv_halt\n");
DBG_8723A("+rtw_drv_halt\n");
usb_deregister(usb_drv);
if (padapter->bSurpriseRemoved || padapter->bDriverStopped ||
padapter->bWritePortCancel) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("usb_write_port23a_complete:bDriverStopped(%d) OR "
- "bSurpriseRemoved(%d)", padapter->bDriverStopped,
- padapter->bSurpriseRemoved));
+ "usb_write_port23a_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n",
+ padapter->bDriverStopped, padapter->bSurpriseRemoved);
DBG_8723A("%s(): TX Warning! bDriverStopped(%d) OR "
"bSurpriseRemoved(%d) bWritePortCancel(%d) "
"pxmitbuf->ext_tag(%x)\n", __func__,
if (purb->status) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("usb_write_port23a_complete : purb->status(%d) "
- "!= 0\n", purb->status));
+ "usb_write_port23a_complete : purb->status(%d) != 0\n",
+ purb->status);
DBG_8723A("###=> urb_write_port_complete status(%d)\n",
purb->status);
if (purb->status == -EPIPE || purb->status == -EPROTO) {
} else if (purb->status == -EINPROGRESS) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("usb_write_port23a_complete: EINPROGESS\n"));
+ "usb_write_port23a_complete: EINPROGESS\n");
goto check_completion;
} else if (purb->status == -ENOENT) {
DBG_8723A("%s: -ENOENT\n", __func__);
goto check_completion;
} else if (purb->status == -ESHUTDOWN) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("usb_write_port23a_complete: ESHUTDOWN\n"));
+ "usb_write_port23a_complete: ESHUTDOWN\n");
padapter->bDriverStopped = true;
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("usb_write_port23a_complete:bDriverStopped "
- "= true\n"));
+ "usb_write_port23a_complete:bDriverStopped = true\n");
goto check_completion;
} else {
padapter->bSurpriseRemoved = true;
DBG_8723A("bSurpriseRemoved = true\n");
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("usb_write_port23a_complete:bSurpriseRemoved "
- "= true\n"));
+ "usb_write_port23a_complete:bSurpriseRemoved = true\n");
goto check_completion;
}
}
int status;
int ret = _FAIL;
- RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("+usb_write_port23a\n"));
+ RT_TRACE(_module_hci_ops_os_c_, _drv_err_, "+usb_write_port23a\n");
if (padapter->bDriverStopped || padapter->bSurpriseRemoved) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("%s:(padapter->bDriverStopped || "
- "padapter->bSurpriseRemoved)!!!\n", __func__));
+ "%s:(padapter->bDriverStopped || padapter->bSurpriseRemoved)!!!\n",
+ __func__);
rtw23a_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_TX_DENY);
goto exit;
}
RTW_SCTX_DONE_WRITE_PORT_ERR);
DBG_8723A("usb_write_port23a, status =%d\n", status);
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
- ("usb_write_port23a(): usb_submit_urb, status =%x\n",
- status));
+ "usb_write_port23a(): usb_submit_urb, status =%x\n",
+ status);
switch (status) {
case -ENODEV:
goto exit;
}
ret = _SUCCESS;
- RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("-usb_write_port23a\n"));
+ RT_TRACE(_module_hci_ops_os_c_, _drv_err_, "-usb_write_port23a\n");
exit:
if (ret != _SUCCESS)
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
int res = 0;
- RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("+xmit_enry\n"));
+ RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, "+xmit_enry\n");
if (!rtw_if_up23a(padapter)) {
RT_TRACE(_module_xmit_osdep_c_, _drv_err_,
- ("rtw_xmit23a_entry23a: rtw_if_up23a fail\n"));
+ "rtw_xmit23a_entry23a: rtw_if_up23a fail\n");
goto drop_packet;
}
pxmitpriv->tx_pkts++;
RT_TRACE(_module_xmit_osdep_c_, _drv_info_,
- ("rtw_xmit23a_entry23a: tx_pkts=%d\n",
- (u32)pxmitpriv->tx_pkts));
+ "rtw_xmit23a_entry23a: tx_pkts=%d\n",
+ (u32)pxmitpriv->tx_pkts);
goto exit;
drop_packet:
pxmitpriv->tx_drop++;
dev_kfree_skb_any(skb);
RT_TRACE(_module_xmit_osdep_c_, _drv_notice_,
- ("rtw_xmit23a_entry23a: drop, tx_drop=%d\n",
- (u32)pxmitpriv->tx_drop));
+ "rtw_xmit23a_entry23a: drop, tx_drop=%d\n",
+ (u32)pxmitpriv->tx_drop);
exit:
return 0;
}
ccflags-y := -Idrivers/scsi
rts5208-y := rtsx.o rtsx_chip.o rtsx_transport.o rtsx_scsi.o \
- rtsx_card.o general.o sd.o xd.o ms.o spi.o
+ rtsx_card.o general.o sd.o xd.o ms.o spi.o trace.o
#include <linux/vmalloc.h>
#include "rtsx.h"
-#include "rtsx_transport.h"
-#include "rtsx_scsi.h"
-#include "rtsx_card.h"
#include "ms.h"
static inline void ms_set_err_code(struct rtsx_chip *chip, u8 err_code)
static int ms_parse_err_code(struct rtsx_chip *chip)
{
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
static int ms_transfer_tpc(struct rtsx_chip *chip, u8 trans_mode,
if (retval < 0) {
rtsx_clear_ms_error(chip);
ms_set_err_code(chip, MS_TO_ERROR);
- TRACE_RET(chip, ms_parse_err_code(chip));
+ rtsx_trace(chip);
+ return ms_parse_err_code(chip);
}
ptr = rtsx_get_cmd_data(chip) + 1;
if (!(tpc & 0x08)) { /* Read Packet */
if (*ptr & MS_CRC16_ERR) {
ms_set_err_code(chip, MS_CRC16_ERROR);
- TRACE_RET(chip, ms_parse_err_code(chip));
+ rtsx_trace(chip);
+ return ms_parse_err_code(chip);
}
} else { /* Write Packet */
if (CHK_MSPRO(ms_card) && !(*ptr & 0x80)) {
if (*ptr & (MS_INT_ERR | MS_INT_CMDNK)) {
ms_set_err_code(chip, MS_CMD_NK);
- TRACE_RET(chip, ms_parse_err_code(chip));
+ rtsx_trace(chip);
+ return ms_parse_err_code(chip);
}
}
}
if (*ptr & MS_RDY_TIMEOUT) {
rtsx_clear_ms_error(chip);
ms_set_err_code(chip, MS_TO_ERROR);
- TRACE_RET(chip, ms_parse_err_code(chip));
+ rtsx_trace(chip);
+ return ms_parse_err_code(chip);
}
return STATUS_SUCCESS;
}
static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode,
- u8 tpc, u16 sec_cnt, u8 cfg, int mode_2k,
+ u8 tpc, u16 sec_cnt, u8 cfg, bool mode_2k,
int use_sg, void *buf, int buf_len)
{
int retval;
u8 val, err_code = 0;
enum dma_data_direction dir;
- if (!buf || !buf_len)
- TRACE_RET(chip, STATUS_FAIL);
+ if (!buf || !buf_len) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (trans_mode == MS_TM_AUTO_READ) {
dir = DMA_FROM_DEVICE;
dir = DMA_TO_DEVICE;
err_code = MS_FLASH_WRITE_ERROR;
} else {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
rtsx_init_cmd(chip);
else
retval = STATUS_FAIL;
- TRACE_RET(chip, retval);
+ rtsx_trace(chip);
+ return retval;
}
- RTSX_READ_REG(chip, MS_TRANS_CFG, &val);
- if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT))
- TRACE_RET(chip, STATUS_FAIL);
+ retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
struct ms_info *ms_card = &(chip->ms_card);
int retval, i;
- if (!data || (data_len < cnt))
- TRACE_RET(chip, STATUS_ERROR);
+ if (!data || (data_len < cnt)) {
+ rtsx_trace(chip);
+ return STATUS_ERROR;
+ }
rtsx_init_cmd(chip);
if (!(tpc & 0x08)) {
if (val & MS_CRC16_ERR) {
ms_set_err_code(chip, MS_CRC16_ERROR);
- TRACE_RET(chip, ms_parse_err_code(chip));
+ rtsx_trace(chip);
+ return ms_parse_err_code(chip);
}
} else {
if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
ms_set_err_code(chip, MS_CMD_NK);
- TRACE_RET(chip,
- ms_parse_err_code(chip));
+ rtsx_trace(chip);
+ return ms_parse_err_code(chip);
}
}
}
if (val & MS_RDY_TIMEOUT) {
ms_set_err_code(chip, MS_TO_ERROR);
- TRACE_RET(chip, ms_parse_err_code(chip));
+ rtsx_trace(chip);
+ return ms_parse_err_code(chip);
}
ms_set_err_code(chip, MS_TO_ERROR);
- TRACE_RET(chip, ms_parse_err_code(chip));
+ rtsx_trace(chip);
+ return ms_parse_err_code(chip);
}
return STATUS_SUCCESS;
int retval, i;
u8 *ptr;
- if (!data)
- TRACE_RET(chip, STATUS_ERROR);
+ if (!data) {
+ rtsx_trace(chip);
+ return STATUS_ERROR;
+ }
rtsx_init_cmd(chip);
if (!(tpc & 0x08)) {
if (val & MS_CRC16_ERR) {
ms_set_err_code(chip, MS_CRC16_ERROR);
- TRACE_RET(chip, ms_parse_err_code(chip));
+ rtsx_trace(chip);
+ return ms_parse_err_code(chip);
}
} else {
if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
ms_set_err_code(chip, MS_CMD_NK);
- TRACE_RET(chip,
- ms_parse_err_code(chip));
+ rtsx_trace(chip);
+ return ms_parse_err_code(chip);
}
}
}
if (val & MS_RDY_TIMEOUT) {
ms_set_err_code(chip, MS_TO_ERROR);
- TRACE_RET(chip, ms_parse_err_code(chip));
+ rtsx_trace(chip);
+ return ms_parse_err_code(chip);
}
ms_set_err_code(chip, MS_TO_ERROR);
- TRACE_RET(chip, ms_parse_err_code(chip));
+ rtsx_trace(chip);
+ return ms_parse_err_code(chip);
}
ptr = rtsx_get_cmd_data(chip) + 1;
rtsx_clear_ms_error(chip);
}
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
static int ms_send_cmd(struct rtsx_chip *chip, u8 cmd, u8 cfg)
}
retval = switch_clock(chip, ms_card->ms_clock);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = select_card(chip, MS_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
int retval;
retval = select_card(chip, MS_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = switch_clock(chip, ms_card->ms_clock);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
static int ms_pull_ctl_disable(struct rtsx_chip *chip)
{
+ int retval;
+
if (CHECK_PID(chip, 0x5208)) {
- RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF,
- MS_D1_PD | MS_D2_PD | MS_CLK_PD | MS_D6_PD);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF,
- MS_D3_PD | MS_D0_PD | MS_BS_PD | XD_D4_PD);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF,
- MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF,
- XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF,
- MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL6, 0xFF,
- MS_D5_PD | MS_D4_PD);
+ retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,
+ MS_D1_PD | MS_D2_PD | MS_CLK_PD | MS_D6_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,
+ MS_D3_PD | MS_D0_PD | MS_BS_PD | XD_D4_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,
+ MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,
+ XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,
+ MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF,
+ MS_D5_PD | MS_D4_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
} else if (CHECK_PID(chip, 0x5288)) {
if (CHECK_BARO_PKG(chip, QFN)) {
- RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF, 0x55);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF, 0x55);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF, 0x4B);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF, 0x69);
+ retval = rtsx_write_register(chip, CARD_PULL_CTL1,
+ 0xFF, 0x55);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL2,
+ 0xFF, 0x55);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL3,
+ 0xFF, 0x4B);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL4,
+ 0xFF, 0x69);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
}
}
retval = rtsx_send_cmd(chip, MS_CARD, 100);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
ms_card->pro_under_formatting = 0;
retval = ms_power_off_card3v3(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (!chip->ft2_fast_mode)
wait_timeout(250);
retval = enable_card_clock(chip, MS_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (chip->asic_code) {
retval = ms_pull_ctl_enable(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else {
- RTSX_WRITE_REG(chip, FPGA_PULL_CTL,
- FPGA_MS_PULL_CTL_BIT | 0x20, 0);
+ retval = rtsx_write_register(chip, FPGA_PULL_CTL,
+ FPGA_MS_PULL_CTL_BIT | 0x20, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
if (!chip->ft2_fast_mode) {
retval = card_power_on(chip, MS_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
wait_timeout(150);
if (chip->ocp_stat & oc_mask) {
dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
chip->ocp_stat);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
#endif
}
- RTSX_WRITE_REG(chip, CARD_OE, MS_OUTPUT_EN, MS_OUTPUT_EN);
+ retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN,
+ MS_OUTPUT_EN);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (chip->asic_code) {
- RTSX_WRITE_REG(chip, MS_CFG, 0xFF,
- SAMPLE_TIME_RISING | PUSH_TIME_DEFAULT |
- NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
+ retval = rtsx_write_register(chip, MS_CFG, 0xFF,
+ SAMPLE_TIME_RISING | PUSH_TIME_DEFAULT | NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
} else {
- RTSX_WRITE_REG(chip, MS_CFG, 0xFF,
- SAMPLE_TIME_FALLING | PUSH_TIME_DEFAULT |
- NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
+ retval = rtsx_write_register(chip, MS_CFG, 0xFF,
+ SAMPLE_TIME_FALLING | PUSH_TIME_DEFAULT | NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ }
+ retval = rtsx_write_register(chip, MS_TRANS_CFG, 0xFF,
+ NO_WAIT_INT | NO_AUTO_READ_INT_REG);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR,
+ MS_STOP | MS_CLR_ERR);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
}
- RTSX_WRITE_REG(chip, MS_TRANS_CFG,
- 0xFF, NO_WAIT_INT | NO_AUTO_READ_INT_REG);
- RTSX_WRITE_REG(chip, CARD_STOP,
- MS_STOP | MS_CLR_ERR, MS_STOP | MS_CLR_ERR);
retval = ms_set_init_para(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
u8 val;
retval = ms_set_rw_reg_addr(chip, Pro_StatusReg, 6, SystemParm, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG,
if (retval == STATUS_SUCCESS)
break;
}
- if (i == MS_MAX_RETRY_COUNT)
- TRACE_RET(chip, STATUS_FAIL);
+ if (i == MS_MAX_RETRY_COUNT) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_READ_REG(chip, PPBUF_BASE2 + 2, &val);
+ retval = rtsx_read_register(chip, PPBUF_BASE2 + 2, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
dev_dbg(rtsx_dev(chip), "Type register: 0x%x\n", val);
if (val != 0x01) {
if (val != 0x02)
ms_card->check_ms_flow = 1;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
- RTSX_READ_REG(chip, PPBUF_BASE2 + 4, &val);
+ retval = rtsx_read_register(chip, PPBUF_BASE2 + 4, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
dev_dbg(rtsx_dev(chip), "Category register: 0x%x\n", val);
if (val != 0) {
ms_card->check_ms_flow = 1;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
- RTSX_READ_REG(chip, PPBUF_BASE2 + 5, &val);
+ retval = rtsx_read_register(chip, PPBUF_BASE2 + 5, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
dev_dbg(rtsx_dev(chip), "Class register: 0x%x\n", val);
if (val == 0) {
- RTSX_READ_REG(chip, PPBUF_BASE2, &val);
+ retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (val & WRT_PRTCT)
chip->card_wp |= MS_CARD;
else
chip->card_wp |= MS_CARD;
} else {
ms_card->check_ms_flow = 1;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
ms_card->ms_type |= TYPE_MSPRO;
- RTSX_READ_REG(chip, PPBUF_BASE2 + 3, &val);
+ retval = rtsx_read_register(chip, PPBUF_BASE2 + 3, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
dev_dbg(rtsx_dev(chip), "IF Mode register: 0x%x\n", val);
if (val == 0) {
ms_card->ms_type &= 0x0F;
ms_card->ms_type &= 0x0F;
} else {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
do {
if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
ms_set_err_code(chip, MS_NO_CARD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
if (retval == STATUS_SUCCESS)
break;
}
- if (i == MS_MAX_RETRY_COUNT)
- TRACE_RET(chip, STATUS_FAIL);
+ if (i == MS_MAX_RETRY_COUNT) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- if (k > 100)
- TRACE_RET(chip, STATUS_FAIL);
+ if (k > 100) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
k++;
wait_timeout(100);
if (retval == STATUS_SUCCESS)
break;
}
- if (i == MS_MAX_RETRY_COUNT)
- TRACE_RET(chip, STATUS_FAIL);
+ if (i == MS_MAX_RETRY_COUNT) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (val & INT_REG_ERR) {
if (val & INT_REG_CMDNK)
chip->card_wp |= (MS_CARD);
- else
- TRACE_RET(chip, STATUS_FAIL);
+ else {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
/* -- end confirm CPU startup */
if (retval == STATUS_SUCCESS)
break;
}
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
if (retval == STATUS_SUCCESS)
break;
}
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_WRITE_REG(chip, MS_CFG, 0x98,
- MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
+ retval = rtsx_write_register(chip, MS_CFG, 0x98,
+ MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
ms_card->ms_type |= MS_8BIT;
retval = ms_set_init_para(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT,
1, NO_WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
return STATUS_SUCCESS;
for (i = 0; i < 3; i++) {
retval = ms_prepare_reset(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_identify_media_type(chip, switch_8bit_bus);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_confirm_cpu_startup(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_switch_parallel_bus(chip);
if (retval != STATUS_SUCCESS) {
if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
ms_set_err_code(chip, MS_NO_CARD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
continue;
} else {
}
}
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
/* Switch MS-PRO into Parallel mode */
- RTSX_WRITE_REG(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
- RTSX_WRITE_REG(chip, MS_CFG, PUSH_TIME_ODD, PUSH_TIME_ODD);
+ retval = rtsx_write_register(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, MS_CFG, PUSH_TIME_ODD,
+ PUSH_TIME_ODD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
retval = ms_set_init_para(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
/* If MSPro HG Card, We shall try to switch to 8-bit bus */
if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) {
retval = ms_switch_8bit_bus(chip);
if (retval != STATUS_SUCCESS) {
ms_card->switch_8bit_fail = 1;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
ms_cleanup_work(chip);
retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
buf[0] = 0;
buf[1] = mode;
buf[5] = 0;
retval = ms_write_bytes(chip, PRO_WRITE_REG, 6, NO_WAIT_INT, buf, 6);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_READ_REG(chip, MS_TRANS_CFG, buf);
- if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR))
- TRACE_RET(chip, STATUS_FAIL);
+ retval = rtsx_read_register(chip, MS_TRANS_CFG, buf);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR)) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
#endif
retval = ms_set_rw_reg_addr(chip, Pro_IntReg, 2, Pro_SystemParm, 7);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (CHK_MS8BIT(ms_card))
data[0] = PARALLEL_8BIT_IF;
if (retval == STATUS_SUCCESS)
break;
}
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
buf = kmalloc(64 * 512, GFP_KERNEL);
- if (buf == NULL)
- TRACE_RET(chip, STATUS_ERROR);
+ if (buf == NULL) {
+ rtsx_trace(chip);
+ return STATUS_ERROR;
+ }
for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT);
retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
if (retval != STATUS_SUCCESS) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (!(val & MS_INT_BREQ)) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = ms_transfer_data(chip, MS_TM_AUTO_READ,
PRO_READ_LONG_DATA, 0x40, WAIT_INT,
}
if (retval != STATUS_SUCCESS) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
i = 0;
retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
if (retval != STATUS_SUCCESS) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if ((val & MS_INT_CED) || !(val & MS_INT_BREQ))
PRO_READ_LONG_DATA, 0, WAIT_INT);
if (retval != STATUS_SUCCESS) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
i++;
if (retval != STATUS_SUCCESS) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if ((buf[0] != 0xa5) && (buf[1] != 0xc3)) {
/* Signature code is wrong */
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if ((buf[4] < 1) || (buf[4] > 12)) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
for (i = 0; i < buf[4]; i++) {
sys_info_addr, sys_info_size);
if (sys_info_size != 96) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (sys_info_addr < 0x1A0) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if ((sys_info_size + sys_info_addr) > 0x8000) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
#ifdef SUPPORT_MSXC
model_name_addr, model_name_size);
if (model_name_size != 48) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (model_name_addr < 0x1A0) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if ((model_name_size + model_name_addr) > 0x8000) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
found_model_name = 1;
if (i == buf[4]) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
class_code = buf[sys_info_addr + 0];
#ifdef SUPPORT_MSXC
if (CHK_MSXC(ms_card)) {
- if (class_code != 0x03)
- TRACE_RET(chip, STATUS_FAIL);
+ if (class_code != 0x03) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else {
- if (class_code != 0x02)
- TRACE_RET(chip, STATUS_FAIL);
+ if (class_code != 0x02) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
#else
- if (class_code != 0x02)
- TRACE_RET(chip, STATUS_FAIL);
+ if (class_code != 0x02) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
#endif
if (device_type != 0x00) {
(device_type == 0x03)) {
chip->card_wp |= MS_CARD;
} else {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
- if (sub_class & 0xC0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (sub_class & 0xC0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
dev_dbg(rtsx_dev(chip), "class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n",
class_code, device_type, sub_class);
if (retval != STATUS_SUCCESS) {
if (ms_card->switch_8bit_fail) {
retval = ms_pro_reset_flow(chip, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
retval = ms_read_attribute_info(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
#ifdef XC_POWERCLASS
if (CHK_HG8BIT(ms_card))
#ifdef SUPPORT_MAGIC_GATE
retval = mg_set_tpc_para_sub(chip, 0, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
#endif
if (CHK_HG8BIT(ms_card))
u8 val[2];
retval = ms_set_rw_reg_addr(chip, StatusReg0, 2, 0, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) {
ms_set_err_code(chip, MS_FLASH_READ_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
SystemParm, 6);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (CHK_MS4BIT(ms_card)) {
/* Parallel interface */
if (retval == STATUS_SUCCESS)
break;
}
- if (i == MS_MAX_RETRY_COUNT)
- TRACE_RET(chip, STATUS_FAIL);
+ if (i == MS_MAX_RETRY_COUNT) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ms_set_err_code(chip, MS_NO_ERROR);
if (retval == STATUS_SUCCESS)
break;
}
- if (i == MS_MAX_RETRY_COUNT)
- TRACE_RET(chip, STATUS_FAIL);
+ if (i == MS_MAX_RETRY_COUNT) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ms_set_err_code(chip, MS_NO_ERROR);
retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (val & INT_REG_CMDNK) {
ms_set_err_code(chip, MS_CMD_NK);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (val & INT_REG_CED) {
if (val & INT_REG_ERR) {
retval = ms_read_status_reg(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
MS_EXTRA_SIZE, SystemParm, 6);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
}
retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT,
data, MS_EXTRA_SIZE);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (buf && buf_len) {
if (buf_len > MS_EXTRA_SIZE)
int retval, i;
u8 val, data[16];
- if (!buf || (buf_len < MS_EXTRA_SIZE))
- TRACE_RET(chip, STATUS_FAIL);
+ if (!buf || (buf_len < MS_EXTRA_SIZE)) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
SystemParm, 6 + MS_EXTRA_SIZE);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (CHK_MS4BIT(ms_card))
data[0] = 0x88;
retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
NO_WAIT_INT, data, 16);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ms_set_err_code(chip, MS_NO_ERROR);
retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (val & INT_REG_CMDNK) {
ms_set_err_code(chip, MS_CMD_NK);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (val & INT_REG_CED) {
if (val & INT_REG_ERR) {
ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
SystemParm, 6);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (CHK_MS4BIT(ms_card))
data[0] = 0x88;
data[5] = page_num;
retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ms_set_err_code(chip, MS_NO_ERROR);
retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (val & INT_REG_CMDNK) {
ms_set_err_code(chip, MS_CMD_NK);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (val & INT_REG_CED) {
if (val & INT_REG_ERR) {
if (!(val & INT_REG_BREQ)) {
ms_set_err_code(chip, MS_FLASH_READ_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = ms_read_status_reg(chip);
if (retval != STATUS_SUCCESS)
} else {
if (!(val & INT_REG_BREQ)) {
ms_set_err_code(chip, MS_BREQ_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
}
retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA,
0, NO_WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR))
- TRACE_RET(chip, STATUS_FAIL);
+ if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
u8 val, data[8], extra[MS_EXTRA_SIZE];
retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
SystemParm, 7);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ms_set_err_code(chip, MS_NO_ERROR);
data[7] = 0xFF;
retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 7);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ms_set_err_code(chip, MS_NO_ERROR);
retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (val & INT_REG_CMDNK) {
ms_set_err_code(chip, MS_CMD_NK);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (val & INT_REG_CED) {
if (val & INT_REG_ERR) {
ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
SystemParm, 6);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ms_set_err_code(chip, MS_NO_ERROR);
data[5] = 0;
retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ERASE_RTY:
retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ms_set_err_code(chip, MS_NO_ERROR);
retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (val & INT_REG_CMDNK) {
if (i < 3) {
ms_set_err_code(chip, MS_CMD_NK);
ms_set_bad_block(chip, phy_blk);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (val & INT_REG_CED) {
if (val & INT_REG_ERR) {
ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
for (i = start_page; i < end_page; i++) {
if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
ms_set_err_code(chip, MS_NO_CARD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = ms_write_extra_data(chip, phy_blk, i,
extra, MS_EXTRA_SIZE);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
return STATUS_SUCCESS;
u16 log_blk, u8 start_page, u8 end_page)
{
struct ms_info *ms_card = &(chip->ms_card);
- int retval, rty_cnt, uncorrect_flag = 0;
+ bool uncorrect_flag = false;
+ int retval, rty_cnt;
u8 extra[MS_EXTRA_SIZE], val, i, j, data[16];
dev_dbg(rtsx_dev(chip), "Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
start_page, end_page);
retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_read_status_reg(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_READ_REG(chip, PPBUF_BASE2, &val);
+ retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (val & BUF_FULL) {
retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (!(val & INT_REG_CED)) {
ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
for (i = start_page; i < end_page; i++) {
if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
ms_set_err_code(chip, MS_NO_CARD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
ms_read_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE);
retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
MS_EXTRA_SIZE, SystemParm, 6);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ms_set_err_code(chip, MS_NO_ERROR);
retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
data, 6);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ms_set_err_code(chip, MS_NO_ERROR);
retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (val & INT_REG_CMDNK) {
ms_set_err_code(chip, MS_CMD_NK);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (val & INT_REG_CED) {
if (val & INT_REG_ERR) {
retval = ms_read_status_reg(chip);
if (retval != STATUS_SUCCESS) {
- uncorrect_flag = 1;
+ uncorrect_flag = true;
dev_dbg(rtsx_dev(chip), "Uncorrectable error\n");
} else {
- uncorrect_flag = 0;
+ uncorrect_flag = false;
}
retval = ms_transfer_tpc(chip,
MS_TM_NORMAL_READ,
READ_PAGE_DATA,
0, NO_WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (uncorrect_flag) {
ms_set_page_status(log_blk, setPS_NG,
if (retval == STATUS_SUCCESS)
break;
}
- if (rty_cnt == MS_MAX_RETRY_COUNT)
- TRACE_RET(chip, STATUS_FAIL);
+ if (rty_cnt == MS_MAX_RETRY_COUNT) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
if (!(val & INT_REG_BREQ)) {
ms_set_err_code(chip, MS_BREQ_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
NO_WAIT_INT, data, 16);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ms_set_err_code(chip, MS_NO_ERROR);
retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (val & INT_REG_CMDNK) {
ms_set_err_code(chip, MS_CMD_NK);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (val & INT_REG_CED) {
if (val & INT_REG_ERR) {
ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
if (i == 0) {
retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
MS_EXTRA_SIZE, SystemParm, 7);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ms_set_err_code(chip, MS_NO_ERROR);
retval = ms_write_bytes(chip, WRITE_REG, 7,
NO_WAIT_INT, data, 8);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ms_set_err_code(chip, MS_NO_ERROR);
retval = ms_read_bytes(chip, GET_INT, 1,
NO_WAIT_INT, &val, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (val & INT_REG_CMDNK) {
ms_set_err_code(chip, MS_CMD_NK);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (val & INT_REG_CED) {
if (val & INT_REG_ERR) {
ms_set_err_code(chip,
MS_FLASH_WRITE_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
}
#endif
retval = ms_prepare_reset(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ms_card->ms_type |= TYPE_MS;
retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_read_status_reg(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_READ_REG(chip, PPBUF_BASE2, &val);
+ retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (val & WRT_PRTCT)
chip->card_wp |= MS_CARD;
else
while (i < (MAX_DEFECTIVE_BLOCK + 2)) {
if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
ms_set_err_code(chip, MS_NO_CARD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = ms_read_extra_data(chip, i, 0, extra, MS_EXTRA_SIZE);
if (i == (MAX_DEFECTIVE_BLOCK + 2)) {
dev_dbg(rtsx_dev(chip), "No boot block found!");
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
for (j = 0; j < 3; j++) {
}
retval = ms_read_page(chip, ms_card->boot_block, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
/* Read MS system information as sys_info */
rtsx_init_cmd(chip);
rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0);
retval = rtsx_send_cmd(chip, MS_CARD, 100);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ptr = rtsx_get_cmd_data(chip);
memcpy(ms_card->raw_sys_info, ptr, 96);
rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_Support, 0, 0);
retval = rtsx_send_cmd(chip, MS_CARD, 100);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ptr = rtsx_get_cmd_data(chip);
/* Switch I/F Mode */
if (ptr[15]) {
retval = ms_set_rw_reg_addr(chip, 0, 0, SystemParm, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_WRITE_REG(chip, PPBUF_BASE2, 0xFF, 0x88);
- RTSX_WRITE_REG(chip, PPBUF_BASE2 + 1, 0xFF, 0);
+ retval = rtsx_write_register(chip, PPBUF_BASE2, 0xFF, 0x88);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, PPBUF_BASE2 + 1, 0xFF, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG, 1,
NO_WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_WRITE_REG(chip, MS_CFG, 0x58 | MS_NO_CHECK_INT,
- MS_BUS_WIDTH_4 | PUSH_TIME_ODD | MS_NO_CHECK_INT);
+ retval = rtsx_write_register(chip, MS_CFG,
+ 0x58 | MS_NO_CHECK_INT,
+ MS_BUS_WIDTH_4 | PUSH_TIME_ODD | MS_NO_CHECK_INT);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
ms_card->ms_type |= MS_4BIT;
}
size = ms_card->segment_cnt * sizeof(struct zone_entry);
ms_card->segment = vzalloc(size);
- if (ms_card->segment == NULL)
- TRACE_RET(chip, STATUS_FAIL);
+ if (ms_card->segment == NULL) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_read_page(chip, ms_card->boot_block, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, INIT_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto INIT_FAIL;
+ }
reg_addr = PPBUF_BASE2;
for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) {
+ int block_no;
+
retval = rtsx_read_register(chip, reg_addr++, &val1);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, INIT_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto INIT_FAIL;
+ }
retval = rtsx_read_register(chip, reg_addr++, &val2);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, INIT_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto INIT_FAIL;
+ }
defect_block = ((u16)val1 << 8) | val2;
if (defect_block == 0xFFFF)
break;
seg_no = defect_block / 512;
- ms_card->segment[seg_no].defect_list[ms_card->segment[seg_no].disable_count++] = defect_block;
+
+ block_no = ms_card->segment[seg_no].disable_count++;
+ ms_card->segment[seg_no].defect_list[block_no] = defect_block;
}
for (i = 0; i < ms_card->segment_cnt; i++) {
{
struct ms_info *ms_card = &(chip->ms_card);
struct zone_entry *segment;
- int retval, table_size, disable_cnt, defect_flag, i;
- u16 start, end, phy_blk, log_blk, tmp_blk;
+ bool defect_flag;
+ int retval, table_size, disable_cnt, i;
+ u16 start, end, phy_blk, log_blk, tmp_blk, idx;
u8 extra[MS_EXTRA_SIZE], us1, us2;
dev_dbg(rtsx_dev(chip), "ms_build_l2p_tbl: %d\n", seg_no);
if (ms_card->segment == NULL) {
retval = ms_init_l2p_tbl(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, retval);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
if (ms_card->segment[seg_no].build_flag) {
if (segment->l2p_table == NULL) {
segment->l2p_table = vmalloc(table_size * 2);
- if (segment->l2p_table == NULL)
- TRACE_GOTO(chip, BUILD_FAIL);
+ if (segment->l2p_table == NULL) {
+ rtsx_trace(chip);
+ goto BUILD_FAIL;
+ }
}
memset((u8 *)(segment->l2p_table), 0xff, table_size * 2);
if (segment->free_table == NULL) {
segment->free_table = vmalloc(MS_FREE_TABLE_CNT * 2);
- if (segment->free_table == NULL)
- TRACE_GOTO(chip, BUILD_FAIL);
+ if (segment->free_table == NULL) {
+ rtsx_trace(chip);
+ goto BUILD_FAIL;
+ }
}
memset((u8 *)(segment->free_table), 0xff, MS_FREE_TABLE_CNT * 2);
for (phy_blk = start; phy_blk < end; phy_blk++) {
if (disable_cnt) {
- defect_flag = 0;
+ defect_flag = false;
for (i = 0; i < segment->disable_count; i++) {
if (phy_blk == segment->defect_list[i]) {
- defect_flag = 1;
+ defect_flag = true;
break;
}
}
continue;
}
- if (segment->l2p_table[log_blk - ms_start_idx[seg_no]] == 0xFFFF) {
- segment->l2p_table[log_blk - ms_start_idx[seg_no]] = phy_blk;
+ idx = log_blk - ms_start_idx[seg_no];
+
+ if (segment->l2p_table[idx] == 0xFFFF) {
+ segment->l2p_table[idx] = phy_blk;
continue;
}
us1 = extra[0] & 0x10;
- tmp_blk = segment->l2p_table[log_blk - ms_start_idx[seg_no]];
+ tmp_blk = segment->l2p_table[idx];
retval = ms_read_extra_data(chip, tmp_blk, 0,
extra, MS_EXTRA_SIZE);
if (retval != STATUS_SUCCESS)
for (log_blk = ms_start_idx[seg_no];
log_blk < ms_start_idx[seg_no + 1]; log_blk++) {
- if (segment->l2p_table[log_blk-ms_start_idx[seg_no]] == 0xFFFF) {
+ idx = log_blk - ms_start_idx[seg_no];
+ if (segment->l2p_table[idx] == 0xFFFF) {
phy_blk = ms_get_unused_block(chip, seg_no);
if (phy_blk == 0xFFFF) {
chip->card_wp |= MS_CARD;
return STATUS_SUCCESS;
}
retval = ms_init_page(chip, phy_blk, log_blk, 0, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, BUILD_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto BUILD_FAIL;
+ }
- segment->l2p_table[log_blk-ms_start_idx[seg_no]] = phy_blk;
+ segment->l2p_table[idx] = phy_blk;
if (seg_no == ms_card->segment_cnt - 1) {
if (segment->unused_blk_cnt < 2) {
chip->card_wp |= MS_CARD;
phy_blk = ms_get_unused_block(chip, 0);
retval = ms_copy_page(chip, tmp_blk, phy_blk,
log_blk, 0, ms_card->page_off + 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
segment->l2p_table[log_blk] = phy_blk;
retval = ms_set_bad_block(chip, tmp_blk);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
}
}
memset(ms_card, 0, sizeof(struct ms_info));
retval = enable_card_clock(chip, MS_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = select_card(chip, MS_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ms_card->ms_type = 0;
if (retval != STATUS_SUCCESS) {
if (ms_card->check_ms_flow) {
retval = reset_ms(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
retval = ms_set_init_para(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (!CHK_MSPRO(ms_card)) {
/* Build table for the last segment,
* to check if L2P table block exists, erasing it
*/
retval = ms_build_l2p_tbl(chip, ms_card->total_block / 512 - 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
dev_dbg(rtsx_dev(chip), "ms_card->ms_type = 0x%x\n", ms_card->ms_type);
if (retval == STATUS_SUCCESS)
break;
}
- if (i == MS_MAX_RETRY_COUNT)
- TRACE_RET(chip, STATUS_FAIL);
+ if (i == MS_MAX_RETRY_COUNT) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
}
retval = ms_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
u16 sector_cnt)
{
struct ms_info *ms_card = &(chip->ms_card);
- int retval, mode_2k = 0;
+ bool mode_2k = false;
+ int retval;
u16 count;
u8 val, trans_mode, rw_tpc, rw_cmd;
rw_tpc = PRO_WRITE_QUAD_DATA;
rw_cmd = PRO_WRITE_2K_DATA;
}
- mode_2k = 1;
+ mode_2k = true;
}
} else {
if (srb->sc_data_direction == DMA_FROM_DEVICE) {
}
retval = ms_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (srb->sc_data_direction == DMA_FROM_DEVICE)
trans_mode = MS_TM_AUTO_READ;
else
trans_mode = MS_TM_AUTO_WRITE;
- RTSX_READ_REG(chip, MS_TRANS_CFG, &val);
+ retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (ms_card->seq_mode) {
if ((ms_card->pre_dir != srb->sc_data_direction)
ms_card->total_sec_cnt = 0;
if (val & MS_INT_BREQ) {
retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
}
retval = mspro_set_rw_cmd(chip, start_sector, count, rw_cmd);
if (retval != STATUS_SUCCESS) {
ms_card->seq_mode = 0;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
chip->rw_need_retry = 0;
dev_dbg(rtsx_dev(chip), "No card exist, exit mspro_rw_multi_sector\n");
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (val & MS_INT_BREQ)
ms_auto_tune_clock(chip);
}
- TRACE_RET(chip, retval);
+ rtsx_trace(chip);
+ return retval;
}
if (ms_card->seq_mode) {
retval = ms_switch_clock(chip);
if (retval != STATUS_SUCCESS) {
ms_card->format_status = FORMAT_FAIL;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
if (retval != STATUS_SUCCESS) {
ms_card->format_status = FORMAT_FAIL;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (!(tmp & MS_INT_BREQ)) {
return STATUS_SUCCESS;
}
ms_card->format_status = FORMAT_FAIL;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (short_data_len >= 256)
MS_NO_CHECK_INT);
if (retval != STATUS_SUCCESS) {
ms_card->format_status = FORMAT_FAIL;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, cnt, WAIT_INT,
data, 8);
if (retval != STATUS_SUCCESS) {
ms_card->format_status = FORMAT_FAIL;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
total_progress = (data[0] << 24) | (data[1] << 16) |
retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
if (retval != STATUS_SUCCESS) {
ms_card->format_status = FORMAT_FAIL;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (tmp & (MS_INT_CED | MS_INT_CMDNK |
MS_INT_BREQ | MS_INT_ERR))
retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, 0);
if (retval != STATUS_SUCCESS) {
ms_card->format_status = FORMAT_FAIL;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (i == 5000) {
ms_card->format_status = FORMAT_FAIL;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
ms_card->format_status = FORMAT_FAIL;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (tmp & MS_INT_CED) {
} else {
ms_card->format_status = FORMAT_FAIL;
ms_card->pro_under_formatting = 0;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
}
int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip,
- int short_data_len, int quick_format)
+ int short_data_len, bool quick_format)
{
struct ms_info *ms_card = &(chip->ms_card);
int retval, i;
u16 para;
retval = ms_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, Pro_TPCParm, 0x01);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
memset(buf, 0, 2);
switch (short_data_len) {
if (retval == STATUS_SUCCESS)
break;
}
- if (i == MS_MAX_RETRY_COUNT)
- TRACE_RET(chip, STATUS_FAIL);
+ if (i == MS_MAX_RETRY_COUNT) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (quick_format)
para = 0x0000;
para = 0x0001;
retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_READ_REG(chip, MS_TRANS_CFG, &tmp);
+ retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
- if (tmp & (MS_INT_CMDNK | MS_INT_ERR))
- TRACE_RET(chip, STATUS_FAIL);
+ if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) {
ms_card->pro_under_formatting = 1;
return STATUS_SUCCESS;
}
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (retval == STATUS_SUCCESS) {
if ((extra[1] & 0x30) != 0x30) {
ms_set_err_code(chip, MS_FLASH_READ_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
SystemParm, 6);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (CHK_MS4BIT(ms_card))
data[0] = 0x88;
if (retval == STATUS_SUCCESS)
break;
}
- if (i == MS_MAX_RETRY_COUNT)
- TRACE_RET(chip, STATUS_FAIL);
+ if (i == MS_MAX_RETRY_COUNT) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ms_set_err_code(chip, MS_NO_ERROR);
retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ptr = buf;
if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
ms_set_err_code(chip, MS_NO_CARD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (val & INT_REG_CMDNK) {
ms_set_err_code(chip, MS_CMD_NK);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (val & INT_REG_ERR) {
if (val & INT_REG_BREQ) {
page_addr, extra, MS_EXTRA_SIZE);
}
ms_set_err_code(chip, MS_FLASH_READ_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
} else {
ms_set_err_code(chip, MS_FLASH_READ_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
} else {
if (!(val & INT_REG_BREQ)) {
ms_set_err_code(chip, MS_BREQ_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
if (page_addr == (end_page - 1)) {
if (!(val & INT_REG_CED)) {
retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT,
&val, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (!(val & INT_REG_CED)) {
ms_set_err_code(chip, MS_FLASH_READ_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
trans_cfg = NO_WAIT_INT;
if (retval == -ETIMEDOUT) {
ms_set_err_code(chip, MS_TO_ERROR);
rtsx_clear_ms_error(chip);
- TRACE_RET(chip, STATUS_TIMEDOUT);
+ rtsx_trace(chip);
+ return STATUS_TIMEDOUT;
}
retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
if (retval != STATUS_SUCCESS) {
ms_set_err_code(chip, MS_TO_ERROR);
rtsx_clear_ms_error(chip);
- TRACE_RET(chip, STATUS_TIMEDOUT);
+ rtsx_trace(chip);
+ return STATUS_TIMEDOUT;
}
if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
ms_set_err_code(chip, MS_CRC16_ERROR);
rtsx_clear_ms_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
if (!start_page) {
retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
SystemParm, 7);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (CHK_MS4BIT(ms_card))
data[0] = 0x88;
retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT,
data, 8);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ms_set_err_code(chip, MS_NO_ERROR);
retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1,
NO_WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
SystemParm, (6 + MS_EXTRA_SIZE));
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ms_set_err_code(chip, MS_NO_ERROR);
if (retval == STATUS_SUCCESS)
break;
}
- if (i == MS_MAX_RETRY_COUNT)
- TRACE_RET(chip, STATUS_FAIL);
+ if (i == MS_MAX_RETRY_COUNT) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
if (retval == STATUS_SUCCESS)
break;
}
- if (i == MS_MAX_RETRY_COUNT)
- TRACE_RET(chip, STATUS_FAIL);
+ if (i == MS_MAX_RETRY_COUNT) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ptr = buf;
for (page_addr = start_page; page_addr < end_page; page_addr++) {
if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
ms_set_err_code(chip, MS_NO_CARD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (val & INT_REG_CMDNK) {
ms_set_err_code(chip, MS_CMD_NK);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (val & INT_REG_ERR) {
ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (!(val & INT_REG_BREQ)) {
ms_set_err_code(chip, MS_BREQ_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
udelay(30);
ms_set_err_code(chip, MS_TO_ERROR);
rtsx_clear_ms_error(chip);
- if (retval == -ETIMEDOUT)
- TRACE_RET(chip, STATUS_TIMEDOUT);
- else
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval == -ETIMEDOUT) {
+ rtsx_trace(chip);
+ return STATUS_TIMEDOUT;
+ }
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if ((end_page - start_page) == 1) {
if (!(val & INT_REG_CED)) {
ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
} else {
if (page_addr == (end_page - 1)) {
if (!(val & INT_REG_CED)) {
retval = ms_send_cmd(chip, BLOCK_END,
WAIT_INT);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
retval = ms_read_bytes(chip, GET_INT, 1,
NO_WAIT_INT, &val, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
if ((page_addr == (end_page - 1)) ||
if (!(val & INT_REG_CED)) {
ms_set_err_code(chip,
MS_FLASH_WRITE_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
}
retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
page_off, ms_card->page_off + 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
seg_no = old_blk >> 9;
if (start_page) {
retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
0, start_page);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
return STATUS_SUCCESS;
if (delay_write->delay_write_flag) {
retval = ms_set_init_para(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
delay_write->delay_write_flag = 0;
retval = ms_finish_write(chip,
delay_write->new_phyblock,
delay_write->logblock,
delay_write->pageoff);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
return STATUS_SUCCESS;
retval = ms_switch_clock(chip);
if (retval != STATUS_SUCCESS) {
ms_rw_fail(srb, chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
log_blk = (u16)(start_sector >> ms_card->block_shift);
if (retval != STATUS_SUCCESS) {
chip->card_fail |= MS_CARD;
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
old_blk = delay_write->old_phyblock;
new_blk = delay_write->new_phyblock;
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
#endif
old_blk = ms_get_l2p_tbl(chip, seg_no,
if ((old_blk == 0xFFFF) || (new_blk == 0xFFFF)) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = ms_prepare_write(chip, old_blk, new_blk,
if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
#ifdef MS_DELAY_WRITE
}
if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
#endif
old_blk = ms_get_l2p_tbl(chip, seg_no,
if (old_blk == 0xFFFF) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
ms_rw_fail(srb, chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (srb->sc_data_direction == DMA_TO_DEVICE) {
chip->card_fail |= MS_CARD;
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
log_blk - ms_start_idx[seg_no]);
if (old_blk == 0xFFFF) {
ms_rw_fail(srb, chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (srb->sc_data_direction == DMA_TO_DEVICE) {
new_blk = ms_get_unused_block(chip, seg_no);
if (new_blk == 0xFFFF) {
ms_rw_fail(srb, chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
ms_rw_fail(srb, chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
#endif
}
rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED);
retval = rtsx_send_cmd(chip, MS_CARD, 5000);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
val = *rtsx_get_cmd_data(chip);
- if (val & MS_INT_ERR)
- TRACE_RET(chip, STATUS_FAIL);
+ if (val & MS_INT_ERR) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
if (retval == STATUS_SUCCESS)
break;
}
- if (i == MS_MAX_RETRY_COUNT)
- TRACE_RET(chip, STATUS_FAIL);
+ if (i == MS_MAX_RETRY_COUNT) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (check_ms_err(chip)) {
rtsx_clear_ms_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
else
retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
buf[0] = 0;
buf[1] = 0;
}
retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6,
NO_WAIT_INT, buf, 6);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
if (scsi_bufflen(srb) < 12) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
ms_cleanup_work(chip);
retval = ms_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = mg_send_ex_cmd(chip, MG_SET_LID, 0);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
memset(buf1, 0, 32);
buf1, 32);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (check_ms_err(chip)) {
set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
rtsx_clear_ms_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
ms_cleanup_work(chip);
retval = ms_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
buf = kmalloc(1540, GFP_KERNEL);
- if (!buf)
- TRACE_RET(chip, STATUS_ERROR);
+ if (!buf) {
+ rtsx_trace(chip);
+ return STATUS_ERROR;
+ }
buf[0] = 0x04;
buf[1] = 0x1A;
retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
- TRACE_GOTO(chip, GetEKBFinish);
+ rtsx_trace(chip);
+ goto GetEKBFinish;
}
retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
rtsx_clear_ms_error(chip);
- TRACE_GOTO(chip, GetEKBFinish);
+ rtsx_trace(chip);
+ goto GetEKBFinish;
}
if (check_ms_err(chip)) {
set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
rtsx_clear_ms_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
bufflen = min_t(int, 1052, scsi_bufflen(srb));
ms_cleanup_work(chip);
retval = ms_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = mg_send_ex_cmd(chip, MG_GET_ID, 0);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
buf, 32);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (check_ms_err(chip)) {
set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
rtsx_clear_ms_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
memcpy(ms_card->magic_gate_id, buf, 16);
retval = ms_poll_int(chip);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
#endif
retval = mg_send_ex_cmd(chip, MG_SET_RD, 0);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
bufflen = min_t(int, 12, scsi_bufflen(srb));
32, WAIT_INT, buf, 32);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (check_ms_err(chip)) {
set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
rtsx_clear_ms_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
ms_card->mg_auth = 0;
ms_cleanup_work(chip);
retval = ms_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
buf1, 32);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (check_ms_err(chip)) {
set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
rtsx_clear_ms_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
buf2[0] = 0x00;
retval = ms_poll_int(chip);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
#endif
ms_cleanup_work(chip);
retval = ms_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
bufflen = min_t(int, 12, scsi_bufflen(srb));
buf, 32);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (check_ms_err(chip)) {
set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
rtsx_clear_ms_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
ms_card->mg_auth = 1;
ms_cleanup_work(chip);
retval = ms_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
buf = kmalloc(1028, GFP_KERNEL);
- if (!buf)
- TRACE_RET(chip, STATUS_ERROR);
+ if (!buf) {
+ rtsx_trace(chip);
+ return STATUS_ERROR;
+ }
buf[0] = 0x04;
buf[1] = 0x02;
retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
- TRACE_GOTO(chip, GetICVFinish);
+ rtsx_trace(chip);
+ goto GetICVFinish;
}
retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
rtsx_clear_ms_error(chip);
- TRACE_GOTO(chip, GetICVFinish);
+ rtsx_trace(chip);
+ goto GetICVFinish;
}
if (check_ms_err(chip)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
rtsx_clear_ms_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
bufflen = min_t(int, 1028, scsi_bufflen(srb));
ms_cleanup_work(chip);
retval = ms_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
buf = kmalloc(1028, GFP_KERNEL);
- if (!buf)
- TRACE_RET(chip, STATUS_ERROR);
+ if (!buf) {
+ rtsx_trace(chip);
+ return STATUS_ERROR;
+ }
bufflen = min_t(int, 1028, scsi_bufflen(srb));
rtsx_stor_get_xfer_buf(buf, bufflen, srb);
} else {
set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
}
- TRACE_GOTO(chip, SetICVFinish);
+ rtsx_trace(chip);
+ goto SetICVFinish;
}
#ifdef MG_SET_ICV_SLOW
SENSE_TYPE_MG_WRITE_ERR);
}
retval = STATUS_FAIL;
- TRACE_GOTO(chip, SetICVFinish);
+ rtsx_trace(chip);
+ goto SetICVFinish;
}
}
#else
} else {
set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
}
- TRACE_GOTO(chip, SetICVFinish);
+ rtsx_trace(chip);
+ goto SetICVFinish;
}
#endif
int retval;
retval = disable_card_clock(chip, MS_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (chip->asic_code) {
retval = ms_pull_ctl_disable(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else {
- RTSX_WRITE_REG(chip, FPGA_PULL_CTL,
- FPGA_MS_PULL_CTL_BIT | 0x20, FPGA_MS_PULL_CTL_BIT);
+ retval = rtsx_write_register(chip, FPGA_PULL_CTL,
+ FPGA_MS_PULL_CTL_BIT | 0x20,
+ FPGA_MS_PULL_CTL_BIT);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ }
+ retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
}
- RTSX_WRITE_REG(chip, CARD_OE, MS_OUTPUT_EN, 0);
if (!chip->ft2_fast_mode) {
retval = card_power_off(chip, MS_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
return STATUS_SUCCESS;
#endif
retval = ms_power_off_card3v3(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
u32 start_sector, u16 sector_cnt);
int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip,
- int short_data_len, int quick_format);
+ int short_data_len, bool quick_format);
void ms_free_l2p_tbl(struct rtsx_chip *chip);
void ms_cleanup_work(struct rtsx_chip *chip);
int ms_power_off_card3v3(struct rtsx_chip *chip);
#include <linux/workqueue.h>
#include "rtsx.h"
-#include "rtsx_chip.h"
-#include "rtsx_transport.h"
-#include "rtsx_scsi.h"
-#include "rtsx_card.h"
-#include "general.h"
-
#include "ms.h"
#include "sd.h"
#include "xd.h"
/* check for state-transition errors */
if (chip->srb != NULL) {
- dev_err(&dev->pci->dev, "Error in %s: chip->srb = %p\n",
- __func__, chip->srb);
+ dev_err(&dev->pci->dev, "Error: chip->srb = %p\n",
+ chip->srb);
return SCSI_MLQUEUE_HOST_BUSY;
}
MODULE_DEVICE_TABLE(pci, rtsx_ids);
/* pci_driver definition */
-static struct pci_driver driver = {
+static struct pci_driver rtsx_driver = {
.name = CR_DRIVER_NAME,
.id_table = rtsx_ids,
.probe = rtsx_probe,
.shutdown = rtsx_shutdown,
};
-static int __init rtsx_init(void)
-{
- pr_info("Initializing Realtek PCIE storage driver...\n");
-
- return pci_register_driver(&driver);
-}
-
-static void __exit rtsx_exit(void)
-{
- pr_info("rtsx_exit() called\n");
-
- pci_unregister_driver(&driver);
-
- pr_info("%s module exit\n", CR_DRIVER_NAME);
-}
-
-module_init(rtsx_init)
-module_exit(rtsx_exit)
+module_pci_driver(rtsx_driver);
#include <scsi/scsi_eh.h>
#include <scsi/scsi_host.h>
-#include "trace.h"
-#include "general.h"
-
#define CR_DRIVER_NAME "rts5208"
#define pci_get_bus_and_slot(bus, devfn) \
int rtsx_read_pci_cfg_byte(u8 bus, u8 dev, u8 func, u8 offset, u8 *val);
+#define _MSG_TRACE
+
+#include "trace.h"
+#include "rtsx_chip.h"
+#include "rtsx_transport.h"
+#include "rtsx_scsi.h"
+#include "rtsx_card.h"
+#include "rtsx_sys.h"
+#include "general.h"
+
#endif /* __REALTEK_RTSX_H */
#include <linux/kernel.h>
#include "rtsx.h"
-#include "rtsx_transport.h"
-#include "rtsx_scsi.h"
-#include "rtsx_card.h"
-
-#include "rtsx_sys.h"
-#include "general.h"
-
#include "sd.h"
#include "xd.h"
#include "ms.h"
dev_dbg(rtsx_dev(chip), "Switch SSC clock to %dMHz (cur_clk = %d)\n",
clk, chip->cur_clk);
- if ((clk <= 2) || (N > max_N))
- TRACE_RET(chip, STATUS_FAIL);
+ if ((clk <= 2) || (N > max_N)) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
mcu_cnt = (u8)(125/clk + 3);
if (mcu_cnt > 7)
}
retval = rtsx_send_cmd(chip, 0, WAIT_TIME);
- if (retval < 0)
- TRACE_RET(chip, STATUS_ERROR);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_ERROR;
+ }
udelay(10);
- RTSX_WRITE_REG(chip, CLK_CTL, CLK_LOW_FREQ, 0);
+ retval = rtsx_write_register(chip, CLK_CTL, CLK_LOW_FREQ, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
chip->cur_clk = clk;
int switch_normal_clock(struct rtsx_chip *chip, int clk)
{
+ int retval;
u8 sel, div, mcu_cnt;
int sd_vpclk_phase_reset = 0;
default:
dev_dbg(rtsx_dev(chip), "Try to switch to an illegal clock (%d)\n",
clk);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
- RTSX_WRITE_REG(chip, CLK_CTL, 0xFF, CLK_LOW_FREQ);
+ retval = rtsx_write_register(chip, CLK_CTL, 0xFF, CLK_LOW_FREQ);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (sd_vpclk_phase_reset) {
- RTSX_WRITE_REG(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
- RTSX_WRITE_REG(chip, SD_VPCLK1_CTL, PHASE_NOT_RESET, 0);
+ retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
+ PHASE_NOT_RESET, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, SD_VPCLK1_CTL,
+ PHASE_NOT_RESET, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ }
+ retval = rtsx_write_register(chip, CLK_DIV, 0xFF,
+ (div << 4) | mcu_cnt);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CLK_SEL, 0xFF, sel);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
}
- RTSX_WRITE_REG(chip, CLK_DIV, 0xFF, (div << 4) | mcu_cnt);
- RTSX_WRITE_REG(chip, CLK_SEL, 0xFF, sel);
if (sd_vpclk_phase_reset) {
udelay(200);
- RTSX_WRITE_REG(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET,
- PHASE_NOT_RESET);
- RTSX_WRITE_REG(chip, SD_VPCLK1_CTL, PHASE_NOT_RESET,
- PHASE_NOT_RESET);
+ retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
+ PHASE_NOT_RESET, PHASE_NOT_RESET);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, SD_VPCLK1_CTL,
+ PHASE_NOT_RESET, PHASE_NOT_RESET);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
udelay(200);
}
- RTSX_WRITE_REG(chip, CLK_CTL, 0xFF, 0);
+ retval = rtsx_write_register(chip, CLK_CTL, 0xFF, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
chip->cur_clk = clk;
int enable_card_clock(struct rtsx_chip *chip, u8 card)
{
+ int retval;
u8 clk_en = 0;
if (card & XD_CARD)
if (card & MS_CARD)
clk_en |= MS_CLK_EN;
- RTSX_WRITE_REG(chip, CARD_CLK_EN, clk_en, clk_en);
+ retval = rtsx_write_register(chip, CARD_CLK_EN, clk_en, clk_en);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
return STATUS_SUCCESS;
}
int disable_card_clock(struct rtsx_chip *chip, u8 card)
{
+ int retval;
u8 clk_en = 0;
if (card & XD_CARD)
if (card & MS_CARD)
clk_en |= MS_CLK_EN;
- RTSX_WRITE_REG(chip, CARD_CLK_EN, clk_en, 0);
+ retval = rtsx_write_register(chip, CARD_CLK_EN, clk_en, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
return STATUS_SUCCESS;
}
rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val1);
retval = rtsx_send_cmd(chip, 0, 100);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
udelay(chip->pmos_pwr_on_interval);
rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val2);
retval = rtsx_send_cmd(chip, 0, 100);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
int card_power_off(struct rtsx_chip *chip, u8 card)
{
+ int retval;
u8 mask, val;
if (CHECK_LUN_MODE(chip, SD_MS_2LUN) && (card == MS_CARD)) {
val = SD_POWER_OFF;
}
- RTSX_WRITE_REG(chip, CARD_PWR_CTL, mask, val);
+ retval = rtsx_write_register(chip, CARD_PWR_CTL, mask, val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
return STATUS_SUCCESS;
}
unsigned int lun = SCSI_LUN(srb);
int i;
- if (chip->rw_card[lun] == NULL)
- TRACE_RET(chip, STATUS_FAIL);
+ if (chip->rw_card[lun] == NULL) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
for (i = 0; i < 3; i++) {
chip->rw_need_retry = 0;
if (retval != STATUS_SUCCESS) {
if (rtsx_check_chip_exist(chip) != STATUS_SUCCESS) {
rtsx_release_chip(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (detect_card_cd(chip, chip->cur_card) !=
- STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (!chip->rw_need_retry) {
dev_dbg(rtsx_dev(chip), "RW fail, but no need to retry\n");
int card_share_mode(struct rtsx_chip *chip, int card)
{
+ int retval;
u8 mask, value;
if (CHECK_PID(chip, 0x5208)) {
value = CARD_SHARE_48_MS;
else if (card == XD_CARD)
value = CARD_SHARE_48_XD;
- else
- TRACE_RET(chip, STATUS_FAIL);
+ else {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else if (CHECK_PID(chip, 0x5288)) {
mask = 0x03;
value = CARD_SHARE_BAROSSA_MS;
else if (card == XD_CARD)
value = CARD_SHARE_BAROSSA_XD;
- else
- TRACE_RET(chip, STATUS_FAIL);
+ else {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
- RTSX_WRITE_REG(chip, CARD_SHARE_MODE, mask, value);
+ retval = rtsx_write_register(chip, CARD_SHARE_MODE, mask, value);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
return STATUS_SUCCESS;
}
mod = XD_MOD_SEL;
else if (card == SPI_CARD)
mod = SPI_MOD_SEL;
- else
- TRACE_RET(chip, STATUS_FAIL);
+ else {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_WRITE_REG(chip, CARD_SELECT, 0x07, mod);
+ retval = rtsx_write_register(chip, CARD_SELECT, 0x07, mod);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
chip->cur_card = card;
retval = card_share_mode(chip, card);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
return STATUS_SUCCESS;
card_cd = XD_EXIST;
} else {
dev_dbg(rtsx_dev(chip), "Wrong card type: 0x%x\n", card);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
status = rtsx_readl(chip, RTSX_BIPR);
- if (!(status & card_cd))
- TRACE_RET(chip, STATUS_FAIL);
+ if (!(status & card_cd)) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
static inline int card_power_off_all(struct rtsx_chip *chip)
{
- RTSX_WRITE_REG(chip, CARD_PWR_CTL, 0x0F, 0x0F);
+ int retval;
+
+ retval = rtsx_write_register(chip, CARD_PWR_CTL, 0x0F, 0x0F);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
return STATUS_SUCCESS;
}
#include <linux/vmalloc.h>
#include "rtsx.h"
-#include "rtsx_transport.h"
-#include "rtsx_scsi.h"
-#include "rtsx_card.h"
-#include "rtsx_chip.h"
-#include "rtsx_sys.h"
-#include "general.h"
-
#include "sd.h"
#include "xd.h"
#include "ms.h"
static int rtsx_pre_handle_sdio_old(struct rtsx_chip *chip)
{
+ int retval;
+
if (chip->ignore_sd && CHK_SDIO_EXIST(chip)) {
if (chip->asic_code) {
- RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF,
- MS_INS_PU | SD_WP_PU |
- SD_CD_PU | SD_CMD_PU);
+ retval = rtsx_write_register(chip, CARD_PULL_CTL5,
+ 0xFF,
+ MS_INS_PU | SD_WP_PU | SD_CD_PU | SD_CMD_PU);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
} else {
- RTSX_WRITE_REG(chip, FPGA_PULL_CTL, 0xFF,
- FPGA_SD_PULL_CTL_EN);
+ retval = rtsx_write_register(chip, FPGA_PULL_CTL,
+ 0xFF,
+ FPGA_SD_PULL_CTL_EN);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ }
+ retval = rtsx_write_register(chip, CARD_SHARE_MODE, 0xFF,
+ CARD_SHARE_48_SD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
}
- RTSX_WRITE_REG(chip, CARD_SHARE_MODE, 0xFF, CARD_SHARE_48_SD);
/* Enable SDIO internal clock */
- RTSX_WRITE_REG(chip, 0xFF2C, 0x01, 0x01);
+ retval = rtsx_write_register(chip, 0xFF2C, 0x01, 0x01);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
- RTSX_WRITE_REG(chip, SDIO_CTRL, 0xFF,
- SDIO_BUS_CTRL | SDIO_CD_CTRL);
+ retval = rtsx_write_register(chip, SDIO_CTRL, 0xFF,
+ SDIO_BUS_CTRL | SDIO_CD_CTRL);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
chip->sd_int = 1;
chip->sd_io = 1;
static int rtsx_pre_handle_sdio_new(struct rtsx_chip *chip)
{
u8 tmp;
- int sw_bypass_sd = 0;
+ bool sw_bypass_sd = false;
int retval;
if (chip->driver_first_load) {
if (CHECK_PID(chip, 0x5288)) {
- RTSX_READ_REG(chip, 0xFE5A, &tmp);
+ retval = rtsx_read_register(chip, 0xFE5A, &tmp);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (tmp & 0x08)
- sw_bypass_sd = 1;
+ sw_bypass_sd = true;
} else if (CHECK_PID(chip, 0x5208)) {
- RTSX_READ_REG(chip, 0xFE70, &tmp);
+ retval = rtsx_read_register(chip, 0xFE70, &tmp);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (tmp & 0x80)
- sw_bypass_sd = 1;
+ sw_bypass_sd = true;
}
} else {
if (chip->sdio_in_charge)
- sw_bypass_sd = 1;
+ sw_bypass_sd = true;
}
dev_dbg(rtsx_dev(chip), "chip->sdio_in_charge = %d\n",
chip->sdio_in_charge);
if (sw_bypass_sd) {
u8 cd_toggle_mask = 0;
- RTSX_READ_REG(chip, TLPTISTAT, &tmp);
+ retval = rtsx_read_register(chip, TLPTISTAT, &tmp);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
cd_toggle_mask = 0x08;
if (tmp & cd_toggle_mask) {
/* Disable sdio_bus_auto_switch */
- if (CHECK_PID(chip, 0x5288))
- RTSX_WRITE_REG(chip, 0xFE5A, 0x08, 0x00);
- else if (CHECK_PID(chip, 0x5208))
- RTSX_WRITE_REG(chip, 0xFE70, 0x80, 0x00);
+ if (CHECK_PID(chip, 0x5288)) {
+ retval = rtsx_write_register(chip, 0xFE5A,
+ 0x08, 0x00);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ } else if (CHECK_PID(chip, 0x5208)) {
+ retval = rtsx_write_register(chip, 0xFE70,
+ 0x80, 0x00);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ }
- RTSX_WRITE_REG(chip, TLPTISTAT, 0xFF, tmp);
+ retval = rtsx_write_register(chip, TLPTISTAT, 0xFF,
+ tmp);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
chip->need_reset |= SD_CARD;
} else {
if (chip->asic_code) {
retval = sd_pull_ctl_enable(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else {
- RTSX_WRITE_REG(chip, FPGA_PULL_CTL,
- FPGA_SD_PULL_CTL_BIT | 0x20, 0);
+ retval = rtsx_write_register(chip,
+ FPGA_PULL_CTL,
+ FPGA_SD_PULL_CTL_BIT | 0x20,
+ 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
retval = card_share_mode(chip, SD_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
/* Enable sdio_bus_auto_switch */
- if (CHECK_PID(chip, 0x5288))
- RTSX_WRITE_REG(chip, 0xFE5A, 0x08, 0x08);
- else if (CHECK_PID(chip, 0x5208))
- RTSX_WRITE_REG(chip, 0xFE70, 0x80, 0x80);
+ if (CHECK_PID(chip, 0x5288)) {
+ retval = rtsx_write_register(chip, 0xFE5A,
+ 0x08, 0x08);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ } else if (CHECK_PID(chip, 0x5208)) {
+ retval = rtsx_write_register(chip, 0xFE70,
+ 0x80, 0x80);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ }
chip->chip_insert_with_sdio = 1;
chip->sd_io = 1;
}
} else {
- RTSX_WRITE_REG(chip, TLPTISTAT, 0x08, 0x08);
+ retval = rtsx_write_register(chip, TLPTISTAT, 0x08, 0x08);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
chip->need_reset |= SD_CARD;
}
ret = rtsx_write_cfg_dw(chip, 2, 0xC0, 0xFF,
chip->aspm_l0s_l1_en);
- if (ret != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (ret != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
- if (CHECK_PID(chip, 0x5208))
- RTSX_WRITE_REG(chip, ASPM_FORCE_CTL, 0xFF, 0x3F);
+ if (CHECK_PID(chip, 0x5208)) {
+ ret = rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFF, 0x3F);
+ if (ret) {
+ rtsx_trace(chip);
+ return ret;
+ }
+ }
ret = rtsx_write_config_byte(chip, LCTLR, chip->aspm_l0s_l1_en);
- if (ret != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (ret != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
chip->aspm_level[0] = chip->aspm_l0s_l1_en;
if (CHK_SDIO_EXIST(chip)) {
chip->aspm_level[1] = chip->aspm_l0s_l1_en;
ret = rtsx_write_cfg_dw(chip, CHECK_PID(chip, 0x5288) ? 2 : 1,
0xC0, 0xFF, chip->aspm_l0s_l1_en);
- if (ret != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (ret != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
chip->aspm_enabled = 1;
}
if (chip->phy_debug_mode) {
- RTSX_WRITE_REG(chip, CDRESUMECTL, 0x77, 0);
+ ret = rtsx_write_register(chip, CDRESUMECTL, 0x77, 0);
+ if (ret) {
+ rtsx_trace(chip);
+ return ret;
+ }
rtsx_disable_bus_int(chip);
} else {
rtsx_enable_bus_int(chip);
u16 reg;
ret = rtsx_read_phy_register(chip, 0x00, ®);
- if (ret != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (ret != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
reg &= 0xFE7F;
reg |= 0x80;
ret = rtsx_write_phy_register(chip, 0x00, reg);
- if (ret != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (ret != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ret = rtsx_read_phy_register(chip, 0x1C, ®);
- if (ret != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (ret != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
reg &= 0xFFF7;
ret = rtsx_write_phy_register(chip, 0x1C, reg);
- if (ret != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (ret != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
if (chip->driver_first_load && (chip->ic_version < IC_VER_C))
rtsx_disable_aspm(chip);
- RTSX_WRITE_REG(chip, HOST_SLEEP_STATE, 0x03, 0x00);
+ retval = rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03, 0x00);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
/* Disable card clock */
- RTSX_WRITE_REG(chip, CARD_CLK_EN, 0x1E, 0);
+ retval = rtsx_write_register(chip, CARD_CLK_EN, 0x1E, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
#ifdef SUPPORT_OCP
/* SSC power on, OCD power on */
- if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
- RTSX_WRITE_REG(chip, FPDCTL, OC_POWER_DOWN, 0);
- else
- RTSX_WRITE_REG(chip, FPDCTL, OC_POWER_DOWN, MS_OC_POWER_DOWN);
+ if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) {
+ retval = rtsx_write_register(chip, FPDCTL, OC_POWER_DOWN, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ } else {
+ retval = rtsx_write_register(chip, FPDCTL, OC_POWER_DOWN,
+ MS_OC_POWER_DOWN);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ }
- RTSX_WRITE_REG(chip, OCPPARA1, OCP_TIME_MASK, OCP_TIME_800);
- RTSX_WRITE_REG(chip, OCPPARA2, OCP_THD_MASK, OCP_THD_244_946);
- RTSX_WRITE_REG(chip, OCPCTL, 0xFF, CARD_OC_INT_EN | CARD_DETECT_EN);
+ retval = rtsx_write_register(chip, OCPPARA1, OCP_TIME_MASK,
+ OCP_TIME_800);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, OCPPARA2, OCP_THD_MASK,
+ OCP_THD_244_946);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, OCPCTL, 0xFF,
+ CARD_OC_INT_EN | CARD_DETECT_EN);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
#else
/* OC power down */
- RTSX_WRITE_REG(chip, FPDCTL, OC_POWER_DOWN, OC_POWER_DOWN);
+ retval = rtsx_write_register(chip, FPDCTL, OC_POWER_DOWN,
+ OC_POWER_DOWN);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
#endif
- if (!CHECK_PID(chip, 0x5288))
- RTSX_WRITE_REG(chip, CARD_GPIO_DIR, 0xFF, 0x03);
+ if (!CHECK_PID(chip, 0x5288)) {
+ retval = rtsx_write_register(chip, CARD_GPIO_DIR, 0xFF, 0x03);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ }
/* Turn off LED */
- RTSX_WRITE_REG(chip, CARD_GPIO, 0xFF, 0x03);
+ retval = rtsx_write_register(chip, CARD_GPIO, 0xFF, 0x03);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
/* Reset delink mode */
- RTSX_WRITE_REG(chip, CHANGE_LINK_STATE, 0x0A, 0);
+ retval = rtsx_write_register(chip, CHANGE_LINK_STATE, 0x0A, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
/* Card driving select */
- RTSX_WRITE_REG(chip, CARD_DRIVE_SEL, 0xFF, chip->card_drive_sel);
+ retval = rtsx_write_register(chip, CARD_DRIVE_SEL, 0xFF,
+ chip->card_drive_sel);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
#ifdef LED_AUTO_BLINK
- RTSX_WRITE_REG(chip, CARD_AUTO_BLINK, 0xFF,
- LED_BLINK_SPEED | BLINK_EN | LED_GPIO0);
+ retval = rtsx_write_register(chip, CARD_AUTO_BLINK, 0xFF,
+ LED_BLINK_SPEED | BLINK_EN | LED_GPIO0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
#endif
if (chip->asic_code) {
/* Enable SSC Clock */
- RTSX_WRITE_REG(chip, SSC_CTL1, 0xFF, SSC_8X_EN | SSC_SEL_4M);
- RTSX_WRITE_REG(chip, SSC_CTL2, 0xFF, 0x12);
+ retval = rtsx_write_register(chip, SSC_CTL1, 0xFF,
+ SSC_8X_EN | SSC_SEL_4M);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, SSC_CTL2, 0xFF, 0x12);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
/* Disable cd_pwr_save (u_force_rst_core_en=0, u_cd_rst_core_en=0)
bit[5] u_mac_phy_rst_n_dbg rst_value = 1
bit[4] u_non_sticky_rst_n_dbg rst_value = 0
*/
- RTSX_WRITE_REG(chip, CHANGE_LINK_STATE, 0x16, 0x10);
+ retval = rtsx_write_register(chip, CHANGE_LINK_STATE, 0x16, 0x10);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
/* Enable ASPM */
if (chip->aspm_l0s_l1_en) {
retval = rtsx_reset_aspm(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else {
if (chip->asic_code && CHECK_PID(chip, 0x5208)) {
retval = rtsx_write_phy_register(chip, 0x07, 0x0129);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
retval = rtsx_write_config_byte(chip, LCTLR,
chip->aspm_l0s_l1_en);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
retval = rtsx_write_config_byte(chip, 0x81, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (CHK_SDIO_EXIST(chip)) {
retval = rtsx_write_cfg_dw(chip,
CHECK_PID(chip, 0x5288) ? 2 : 1,
0xC0, 0xFF00, 0x0100);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
if (CHECK_PID(chip, 0x5288) && !CHK_SDIO_EXIST(chip)) {
retval = rtsx_write_cfg_dw(chip, 2, 0xC0, 0xFFFF, 0x0103);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = rtsx_write_cfg_dw(chip, 2, 0x84, 0xFF, 0x03);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
- RTSX_WRITE_REG(chip, IRQSTAT0, LINK_RDY_INT, LINK_RDY_INT);
+ retval = rtsx_write_register(chip, IRQSTAT0, LINK_RDY_INT,
+ LINK_RDY_INT);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
- RTSX_WRITE_REG(chip, PERST_GLITCH_WIDTH, 0xFF, 0x80);
+ retval = rtsx_write_register(chip, PERST_GLITCH_WIDTH, 0xFF, 0x80);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
retval = rtsx_enable_pcie_intr(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
chip->need_reset = 0;
#else /* HW_AUTO_SWITCH_SD_BUS */
retval = rtsx_pre_handle_sdio_old(chip);
#endif /* HW_AUTO_SWITCH_SD_BUS */
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else {
chip->sd_io = 0;
- RTSX_WRITE_REG(chip, SDIO_CTRL, SDIO_BUS_CTRL | SDIO_CD_CTRL,
- 0);
+ retval = rtsx_write_register(chip, SDIO_CTRL,
+ SDIO_BUS_CTRL | SDIO_CD_CTRL, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
nextcard:
chip->need_reset |= XD_CARD;
if (chip->int_reg & MS_EXIST)
chip->need_reset |= MS_CARD;
- if (chip->int_reg & CARD_EXIST)
- RTSX_WRITE_REG(chip, SSC_CTL1, SSC_RSTB, SSC_RSTB);
+ if (chip->int_reg & CARD_EXIST) {
+ retval = rtsx_write_register(chip, SSC_CTL1, SSC_RSTB,
+ SSC_RSTB);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ }
dev_dbg(rtsx_dev(chip), "In %s, chip->need_reset = 0x%x\n", __func__,
(unsigned int)(chip->need_reset));
- RTSX_WRITE_REG(chip, RCCTL, 0x01, 0x00);
+ retval = rtsx_write_register(chip, RCCTL, 0x01, 0x00);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (CHECK_PID(chip, 0x5208) || CHECK_PID(chip, 0x5288)) {
/* Turn off main power when entering S3/S4 state */
- RTSX_WRITE_REG(chip, MAIN_PWR_OFF_CTL, 0x03, 0x03);
+ retval = rtsx_write_register(chip, MAIN_PWR_OFF_CTL, 0x03,
+ 0x03);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
if (chip->remote_wakeup_en && !chip->auto_delink_en) {
- RTSX_WRITE_REG(chip, WAKE_SEL_CTL, 0x07, 0x07);
- if (chip->aux_pwr_exist)
- RTSX_WRITE_REG(chip, PME_FORCE_CTL, 0xFF, 0x33);
+ retval = rtsx_write_register(chip, WAKE_SEL_CTL, 0x07, 0x07);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ if (chip->aux_pwr_exist) {
+ retval = rtsx_write_register(chip, PME_FORCE_CTL,
+ 0xFF, 0x33);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ }
} else {
- RTSX_WRITE_REG(chip, WAKE_SEL_CTL, 0x07, 0x04);
- RTSX_WRITE_REG(chip, PME_FORCE_CTL, 0xFF, 0x30);
+ retval = rtsx_write_register(chip, WAKE_SEL_CTL, 0x07, 0x04);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, PME_FORCE_CTL, 0xFF, 0x30);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
- if (CHECK_PID(chip, 0x5208) && (chip->ic_version >= IC_VER_D))
- RTSX_WRITE_REG(chip, PETXCFG, 0x1C, 0x14);
+ if (CHECK_PID(chip, 0x5208) && (chip->ic_version >= IC_VER_D)) {
+ retval = rtsx_write_register(chip, PETXCFG, 0x1C, 0x14);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ }
if (chip->asic_code && CHECK_PID(chip, 0x5208)) {
retval = rtsx_clr_phy_reg_bit(chip, 0x1C, 2);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
if (chip->ft2_fast_mode) {
- RTSX_WRITE_REG(chip, CARD_PWR_CTL, 0xFF,
- MS_PARTIAL_POWER_ON | SD_PARTIAL_POWER_ON);
+ retval = rtsx_write_register(chip, CARD_PWR_CTL, 0xFF,
+ MS_PARTIAL_POWER_ON | SD_PARTIAL_POWER_ON);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
udelay(chip->pmos_pwr_on_interval);
- RTSX_WRITE_REG(chip, CARD_PWR_CTL, 0xFF,
- MS_POWER_ON | SD_POWER_ON);
+ retval = rtsx_write_register(chip, CARD_PWR_CTL, 0xFF,
+ MS_POWER_ON | SD_POWER_ON);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
wait_timeout(200);
}
static inline int check_sd_speed_prior(u32 sd_speed_prior)
{
- int i, fake_para = 0;
+ bool fake_para = false;
+ int i;
for (i = 0; i < 4; i++) {
u8 tmp = (u8)(sd_speed_prior >> (i*8));
if ((tmp < 0x01) || (tmp > 0x04)) {
- fake_para = 1;
+ fake_para = true;
break;
}
}
static inline int check_sd_current_prior(u32 sd_current_prior)
{
- int i, fake_para = 0;
+ bool fake_para = false;
+ int i;
for (i = 0; i < 4; i++) {
u8 tmp = (u8)(sd_current_prior >> (i*8));
if (tmp > 0x03) {
- fake_para = 1;
+ fake_para = true;
break;
}
}
u16 reg = 0;
u8 val = 0;
- RTSX_WRITE_REG(chip, CLK_SEL, 0x03, 0x03);
- RTSX_READ_REG(chip, CLK_SEL, &val);
+ retval = rtsx_write_register(chip, CLK_SEL, 0x03, 0x03);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_read_register(chip, CLK_SEL, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
chip->asic_code = val == 0 ? 1 : 0;
if (chip->asic_code) {
retval = rtsx_read_phy_register(chip, 0x1C, ®);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
dev_dbg(rtsx_dev(chip), "Value of phy register 0x1C is 0x%x\n",
reg);
chip->phy_debug_mode = reg & PHY_DEBUG_MODE ? 1 : 0;
} else {
- RTSX_READ_REG(chip, 0xFE80, &val);
+ retval = rtsx_read_register(chip, 0xFE80, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
chip->ic_version = val;
chip->phy_debug_mode = 0;
}
- RTSX_READ_REG(chip, PDINFO, &val);
+ retval = rtsx_read_register(chip, PDINFO, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
dev_dbg(rtsx_dev(chip), "PDINFO: 0x%x\n", val);
chip->aux_pwr_exist = val & AUX_PWR_DETECTED ? 1 : 0;
- RTSX_READ_REG(chip, 0xFE50, &val);
+ retval = rtsx_read_register(chip, 0xFE50, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
chip->hw_bypass_sd = val & 0x01 ? 1 : 0;
rtsx_read_config_byte(chip, 0x0E, &val);
CLR_SDIO_EXIST(chip);
if (chip->use_hw_setting) {
- RTSX_READ_REG(chip, CHANGE_LINK_STATE, &val);
+ retval = rtsx_read_register(chip, CHANGE_LINK_STATE, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
chip->auto_delink_en = val & 0x80 ? 1 : 0;
}
u8 val = 0, max_func;
u32 lval = 0;
- RTSX_WRITE_REG(chip, CLK_SEL, 0x03, 0x03);
- RTSX_READ_REG(chip, CLK_SEL, &val);
+ retval = rtsx_write_register(chip, CLK_SEL, 0x03, 0x03);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_read_register(chip, CLK_SEL, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
chip->asic_code = val == 0 ? 1 : 0;
chip->ic_version = 0;
chip->phy_debug_mode = 0;
- RTSX_READ_REG(chip, PDINFO, &val);
+ retval = rtsx_read_register(chip, PDINFO, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
dev_dbg(rtsx_dev(chip), "PDINFO: 0x%x\n", val);
chip->aux_pwr_exist = val & AUX_PWR_DETECTED ? 1 : 0;
- RTSX_READ_REG(chip, CARD_SHARE_MODE, &val);
+ retval = rtsx_read_register(chip, CARD_SHARE_MODE, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
dev_dbg(rtsx_dev(chip), "CARD_SHARE_MODE: 0x%x\n", val);
chip->baro_pkg = val & 0x04 ? QFN : LQFP;
- RTSX_READ_REG(chip, 0xFE5A, &val);
+ retval = rtsx_read_register(chip, 0xFE5A, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
chip->hw_bypass_sd = val & 0x10 ? 1 : 0;
retval = rtsx_read_cfg_dw(chip, 0, 0x718, &lval);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
max_func = (u8)((lval >> 29) & 0x07);
dev_dbg(rtsx_dev(chip), "Max function number: %d\n", max_func);
CLR_SDIO_EXIST(chip);
if (chip->use_hw_setting) {
- RTSX_READ_REG(chip, CHANGE_LINK_STATE, &val);
+ retval = rtsx_read_register(chip, CHANGE_LINK_STATE, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
chip->auto_delink_en = val & 0x80 ? 1 : 0;
if (CHECK_BARO_PKG(chip, LQFP))
if ((chip->mmc_ddr_tx_phase > 31) || (chip->mmc_ddr_tx_phase < 0))
chip->mmc_ddr_tx_phase = 0;
- RTSX_WRITE_REG(chip, FPDCTL, SSC_POWER_DOWN, 0);
+ retval = rtsx_write_register(chip, FPDCTL, SSC_POWER_DOWN, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
wait_timeout(200);
- RTSX_WRITE_REG(chip, CLK_DIV, 0x07, 0x07);
+ retval = rtsx_write_register(chip, CLK_DIV, 0x07, 0x07);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
dev_dbg(rtsx_dev(chip), "chip->use_hw_setting = %d\n",
chip->use_hw_setting);
if (CHECK_PID(chip, 0x5208)) {
retval = rts5208_init(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else if (CHECK_PID(chip, 0x5288)) {
retval = rts5288_init(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
if (chip->ss_en == 2)
}
retval = rtsx_reset_chip(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
static void rtsx_monitor_aspm_config(struct rtsx_chip *chip)
{
- int maybe_support_aspm, reg_changed;
+ bool reg_changed, maybe_support_aspm;
u32 tmp = 0;
u8 reg0 = 0, reg1 = 0;
- maybe_support_aspm = 0;
- reg_changed = 0;
+ maybe_support_aspm = false;
+ reg_changed = false;
rtsx_read_config_byte(chip, LCTLR, ®0);
if (chip->aspm_level[0] != reg0) {
- reg_changed = 1;
+ reg_changed = true;
chip->aspm_level[0] = reg0;
}
if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) {
rtsx_read_cfg_dw(chip, 1, 0xC0, &tmp);
reg1 = (u8)tmp;
if (chip->aspm_level[1] != reg1) {
- reg_changed = 1;
+ reg_changed = true;
chip->aspm_level[1] = reg1;
}
if ((reg0 & 0x03) && (reg1 & 0x03))
- maybe_support_aspm = 1;
+ maybe_support_aspm = true;
} else {
if (reg0 & 0x03)
- maybe_support_aspm = 1;
+ maybe_support_aspm = true;
}
if (reg_changed) {
#ifdef SUPPORT_SD_LOCK
struct sd_info *sd_card = &chip->sd_card;
#endif
- int ss_allowed;
+ bool ss_allowed;
if (rtsx_chk_stat(chip, RTSX_STAT_SUSPEND))
return;
rtsx_init_cards(chip);
if (chip->ss_en) {
- ss_allowed = 1;
+ ss_allowed = true;
if (CHECK_PID(chip, 0x5288)) {
- ss_allowed = 0;
+ ss_allowed = false;
} else {
if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) {
u32 val;
rtsx_read_cfg_dw(chip, 1, 0x04, &val);
if (val & 0x07)
- ss_allowed = 0;
+ ss_allowed = false;
}
}
} else {
- ss_allowed = 0;
+ ss_allowed = false;
}
if (ss_allowed && !chip->sd_io) {
for (i = 0; i < MAX_RW_REG_CNT; i++) {
val = rtsx_readl(chip, RTSX_HAIMR);
if ((val & (1 << 31)) == 0) {
- if (data != (u8)val)
- TRACE_RET(chip, STATUS_FAIL);
+ if (data != (u8)val) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
}
- TRACE_RET(chip, STATUS_TIMEDOUT);
+ rtsx_trace(chip);
+ return STATUS_TIMEDOUT;
}
int rtsx_read_register(struct rtsx_chip *chip, u16 addr, u8 *data)
break;
}
- if (i >= MAX_RW_REG_CNT)
- TRACE_RET(chip, STATUS_TIMEDOUT);
+ if (i >= MAX_RW_REG_CNT) {
+ rtsx_trace(chip);
+ return STATUS_TIMEDOUT;
+ }
if (data)
*data = (u8)(val & 0xFF);
int rtsx_write_cfg_dw(struct rtsx_chip *chip, u8 func_no, u16 addr, u32 mask,
u32 val)
{
+ int retval;
u8 mode = 0, tmp;
int i;
for (i = 0; i < 4; i++) {
if (mask & 0xFF) {
- RTSX_WRITE_REG(chip, CFGDATA0 + i,
- 0xFF, (u8)(val & mask & 0xFF));
+ retval = rtsx_write_register(chip, CFGDATA0 + i,
+ 0xFF,
+ (u8)(val & mask & 0xFF));
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
mode |= (1 << i);
}
mask >>= 8;
}
if (mode) {
- RTSX_WRITE_REG(chip, CFGADDR0, 0xFF, (u8)addr);
- RTSX_WRITE_REG(chip, CFGADDR1, 0xFF, (u8)(addr >> 8));
+ retval = rtsx_write_register(chip, CFGADDR0, 0xFF, (u8)addr);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CFGADDR1, 0xFF,
+ (u8)(addr >> 8));
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
- RTSX_WRITE_REG(chip, CFGRWCTL, 0xFF,
- 0x80 | mode | ((func_no & 0x03) << 4));
+ retval = rtsx_write_register(chip, CFGRWCTL, 0xFF,
+ 0x80 | mode | ((func_no & 0x03) << 4));
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
for (i = 0; i < MAX_RW_REG_CNT; i++) {
- RTSX_READ_REG(chip, CFGRWCTL, &tmp);
+ retval = rtsx_read_register(chip, CFGRWCTL, &tmp);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if ((tmp & 0x80) == 0)
break;
}
int rtsx_read_cfg_dw(struct rtsx_chip *chip, u8 func_no, u16 addr, u32 *val)
{
+ int retval;
int i;
u8 tmp;
u32 data = 0;
- RTSX_WRITE_REG(chip, CFGADDR0, 0xFF, (u8)addr);
- RTSX_WRITE_REG(chip, CFGADDR1, 0xFF, (u8)(addr >> 8));
- RTSX_WRITE_REG(chip, CFGRWCTL, 0xFF, 0x80 | ((func_no & 0x03) << 4));
+ retval = rtsx_write_register(chip, CFGADDR0, 0xFF, (u8)addr);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CFGADDR1, 0xFF, (u8)(addr >> 8));
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CFGRWCTL, 0xFF,
+ 0x80 | ((func_no & 0x03) << 4));
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
for (i = 0; i < MAX_RW_REG_CNT; i++) {
- RTSX_READ_REG(chip, CFGRWCTL, &tmp);
+ retval = rtsx_read_register(chip, CFGRWCTL, &tmp);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if ((tmp & 0x80) == 0)
break;
}
for (i = 0; i < 4; i++) {
- RTSX_READ_REG(chip, CFGDATA0 + i, &tmp);
+ retval = rtsx_read_register(chip, CFGDATA0 + i, &tmp);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
data |= (u32)tmp << (i * 8);
}
int dw_len, i, j;
int retval;
- if (!buf)
- TRACE_RET(chip, STATUS_NOMEM);
+ if (!buf) {
+ rtsx_trace(chip);
+ return STATUS_NOMEM;
+ }
if ((len + offset) % 4)
dw_len = (len + offset) / 4 + 1;
dev_dbg(rtsx_dev(chip), "dw_len = %d\n", dw_len);
data = vzalloc(dw_len * 4);
- if (!data)
- TRACE_RET(chip, STATUS_NOMEM);
+ if (!data) {
+ rtsx_trace(chip);
+ return STATUS_NOMEM;
+ }
mask = vzalloc(dw_len * 4);
if (!mask) {
vfree(data);
- TRACE_RET(chip, STATUS_NOMEM);
+ rtsx_trace(chip);
+ return STATUS_NOMEM;
}
j = 0;
if (retval != STATUS_SUCCESS) {
vfree(data);
vfree(mask);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
dev_dbg(rtsx_dev(chip), "dw_len = %d\n", dw_len);
data = vmalloc(dw_len * 4);
- if (!data)
- TRACE_RET(chip, STATUS_NOMEM);
+ if (!data) {
+ rtsx_trace(chip);
+ return STATUS_NOMEM;
+ }
for (i = 0; i < dw_len; i++) {
retval = rtsx_read_cfg_dw(chip, func, aligned_addr + i * 4,
data + i);
if (retval != STATUS_SUCCESS) {
vfree(data);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
int rtsx_write_phy_register(struct rtsx_chip *chip, u8 addr, u16 val)
{
- int i, finished = 0;
+ int retval;
+ bool finished = false;
+ int i;
u8 tmp;
- RTSX_WRITE_REG(chip, PHYDATA0, 0xFF, (u8)val);
- RTSX_WRITE_REG(chip, PHYDATA1, 0xFF, (u8)(val >> 8));
- RTSX_WRITE_REG(chip, PHYADDR, 0xFF, addr);
- RTSX_WRITE_REG(chip, PHYRWCTL, 0xFF, 0x81);
+ retval = rtsx_write_register(chip, PHYDATA0, 0xFF, (u8)val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, PHYDATA1, 0xFF, (u8)(val >> 8));
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, PHYADDR, 0xFF, addr);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, PHYRWCTL, 0xFF, 0x81);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
for (i = 0; i < 100000; i++) {
- RTSX_READ_REG(chip, PHYRWCTL, &tmp);
+ retval = rtsx_read_register(chip, PHYRWCTL, &tmp);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (!(tmp & 0x80)) {
- finished = 1;
+ finished = true;
break;
}
}
- if (!finished)
- TRACE_RET(chip, STATUS_FAIL);
+ if (!finished) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
int rtsx_read_phy_register(struct rtsx_chip *chip, u8 addr, u16 *val)
{
- int i, finished = 0;
+ int retval;
+ bool finished = false;
+ int i;
u16 data = 0;
u8 tmp;
- RTSX_WRITE_REG(chip, PHYADDR, 0xFF, addr);
- RTSX_WRITE_REG(chip, PHYRWCTL, 0xFF, 0x80);
+ retval = rtsx_write_register(chip, PHYADDR, 0xFF, addr);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, PHYRWCTL, 0xFF, 0x80);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
for (i = 0; i < 100000; i++) {
- RTSX_READ_REG(chip, PHYRWCTL, &tmp);
+ retval = rtsx_read_register(chip, PHYRWCTL, &tmp);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (!(tmp & 0x80)) {
- finished = 1;
+ finished = true;
break;
}
}
- if (!finished)
- TRACE_RET(chip, STATUS_FAIL);
+ if (!finished) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_READ_REG(chip, PHYDATA0, &tmp);
+ retval = rtsx_read_register(chip, PHYDATA0, &tmp);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
data = tmp;
- RTSX_READ_REG(chip, PHYDATA1, &tmp);
+ retval = rtsx_read_register(chip, PHYDATA1, &tmp);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
data |= (u16)tmp << 8;
if (val)
int rtsx_read_efuse(struct rtsx_chip *chip, u8 addr, u8 *val)
{
+ int retval;
int i;
u8 data = 0;
- RTSX_WRITE_REG(chip, EFUSE_CTRL, 0xFF, 0x80|addr);
+ retval = rtsx_write_register(chip, EFUSE_CTRL, 0xFF, 0x80 | addr);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
for (i = 0; i < 100; i++) {
- RTSX_READ_REG(chip, EFUSE_CTRL, &data);
+ retval = rtsx_read_register(chip, EFUSE_CTRL, &data);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (!(data & 0x80))
break;
udelay(1);
}
- if (data & 0x80)
- TRACE_RET(chip, STATUS_TIMEDOUT);
+ if (data & 0x80) {
+ rtsx_trace(chip);
+ return STATUS_TIMEDOUT;
+ }
- RTSX_READ_REG(chip, EFUSE_DATA, &data);
+ retval = rtsx_read_register(chip, EFUSE_DATA, &data);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (val)
*val = data;
int rtsx_write_efuse(struct rtsx_chip *chip, u8 addr, u8 val)
{
+ int retval;
int i, j;
u8 data = 0, tmp = 0xFF;
tmp &= (~(u8)(1 << i));
dev_dbg(rtsx_dev(chip), "Write 0x%x to 0x%x\n", tmp, addr);
- RTSX_WRITE_REG(chip, EFUSE_DATA, 0xFF, tmp);
- RTSX_WRITE_REG(chip, EFUSE_CTRL, 0xFF, 0xA0|addr);
+ retval = rtsx_write_register(chip, EFUSE_DATA, 0xFF, tmp);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, EFUSE_CTRL, 0xFF,
+ 0xA0 | addr);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
for (j = 0; j < 100; j++) {
- RTSX_READ_REG(chip, EFUSE_CTRL, &data);
+ retval = rtsx_read_register(chip, EFUSE_CTRL, &data);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (!(data & 0x80))
break;
wait_timeout(3);
}
- if (data & 0x80)
- TRACE_RET(chip, STATUS_TIMEDOUT);
+ if (data & 0x80) {
+ rtsx_trace(chip);
+ return STATUS_TIMEDOUT;
+ }
wait_timeout(5);
}
u16 value;
retval = rtsx_read_phy_register(chip, reg, &value);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (value & (1 << bit)) {
value &= ~(1 << bit);
retval = rtsx_write_phy_register(chip, reg, value);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
return STATUS_SUCCESS;
u16 value;
retval = rtsx_read_phy_register(chip, reg, &value);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if ((value & (1 << bit)) == 0) {
value |= (1 << bit);
retval = rtsx_write_phy_register(chip, reg, value);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
return STATUS_SUCCESS;
int rtsx_check_link_ready(struct rtsx_chip *chip)
{
+ int retval;
u8 val;
- RTSX_READ_REG(chip, IRQSTAT0, &val);
+ retval = rtsx_read_register(chip, IRQSTAT0, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
dev_dbg(rtsx_dev(chip), "IRQSTAT0: 0x%x\n", val);
if (val & LINK_RDY_INT) {
int rtsx_pre_handle_interrupt(struct rtsx_chip *chip)
{
u32 status, int_enable;
- int exit_ss = 0;
+ bool exit_ss = false;
#ifdef SUPPORT_OCP
u32 ocp_int = 0;
if (chip->ss_en) {
chip->ss_counter = 0;
if (rtsx_get_stat(chip) == RTSX_STAT_SS) {
- exit_ss = 1;
+ exit_ss = true;
rtsx_exit_L1(chip);
rtsx_set_stat(chip, RTSX_STAT_RUN);
}
u16 reg_addr;
u8 *ptr;
- if (!buf)
- TRACE_RET(chip, STATUS_ERROR);
+ if (!buf) {
+ rtsx_trace(chip);
+ return STATUS_ERROR;
+ }
ptr = buf;
reg_addr = PPBUF_BASE2;
rtsx_add_cmd(chip, READ_REG_CMD, reg_addr++, 0, 0);
retval = rtsx_send_cmd(chip, 0, 250);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
memcpy(ptr, rtsx_get_cmd_data(chip), 256);
ptr += 256;
rtsx_add_cmd(chip, READ_REG_CMD, reg_addr++, 0, 0);
retval = rtsx_send_cmd(chip, 0, 250);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
memcpy(ptr, rtsx_get_cmd_data(chip), buf_len%256);
u16 reg_addr;
u8 *ptr;
- if (!buf)
- TRACE_RET(chip, STATUS_ERROR);
+ if (!buf) {
+ rtsx_trace(chip);
+ return STATUS_ERROR;
+ }
ptr = buf;
reg_addr = PPBUF_BASE2;
}
retval = rtsx_send_cmd(chip, 0, 250);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
if (buf_len%256) {
}
retval = rtsx_send_cmd(chip, 0, 250);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
return STATUS_SUCCESS;
int rtsx_check_chip_exist(struct rtsx_chip *chip)
{
- if (rtsx_readl(chip, 0) == 0xFFFFFFFF)
- TRACE_RET(chip, STATUS_FAIL);
+ if (rtsx_readl(chip, 0) == 0xFFFFFFFF) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
if (mask) {
retval = rtsx_write_register(chip, FPDCTL, mask, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (CHECK_PID(chip, 0x5288))
wait_timeout(200);
if (mask) {
val = mask;
retval = rtsx_write_register(chip, FPDCTL, mask, val);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
return STATUS_SUCCESS;
int rtsx_write_ppbuf(struct rtsx_chip *chip, u8 *buf, int buf_len);
int rtsx_check_chip_exist(struct rtsx_chip *chip);
-#define RTSX_WRITE_REG(chip, addr, mask, data) \
- do { \
- int retval = rtsx_write_register((chip), (addr), (mask), (data)); \
- if (retval != STATUS_SUCCESS) { \
- TRACE_RET((chip), retval); \
- } \
- } while (0)
-
-#define RTSX_READ_REG(chip, addr, data) \
- do { \
- int retval = rtsx_read_register((chip), (addr), (data)); \
- if (retval != STATUS_SUCCESS) { \
- TRACE_RET((chip), retval); \
- } \
- } while (0)
-
#endif /* __REALTEK_RTSX_CHIP_H */
#include <linux/vmalloc.h>
#include "rtsx.h"
-#include "rtsx_transport.h"
-#include "rtsx_sys.h"
-#include "rtsx_card.h"
-#include "rtsx_chip.h"
-#include "rtsx_scsi.h"
#include "sd.h"
#include "ms.h"
#include "spi.h"
{
struct scsi_cmnd *srb = chip->srb;
char *what = NULL;
- int unknown_cmd = 0, len;
+ bool unknown_cmd = false;
+ int len;
switch (srb->cmnd[0]) {
case TEST_UNIT_READY:
what = "Realtek's vendor command";
break;
default:
- what = "(unknown command)"; unknown_cmd = 1;
+ what = "(unknown command)";
+ unknown_cmd = true;
break;
}
unsigned char sendbytes;
unsigned char *buf;
u8 card = get_lun_card(chip, lun);
- int pro_formatter_flag = 0;
+ bool pro_formatter_flag = false;
unsigned char inquiry_buf[] = {
QULIFIRE|DRCT_ACCESS_DEV,
RMB_DISC|0x0D,
}
buf = vmalloc(scsi_bufflen(srb));
- if (buf == NULL)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (buf == NULL) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
#ifdef SUPPORT_MAGIC_GATE
if ((chip->mspro_formatter_enable) &&
#else
if (chip->mspro_formatter_enable)
#endif
- {
if (!card || (card == MS_CARD))
- pro_formatter_flag = 1;
- }
+ pro_formatter_flag = true;
if (pro_formatter_flag) {
if (scsi_bufflen(srb) < 56)
if (check_card_ready(chip, lun))
return TRANSPORT_GOOD;
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
break;
}
- TRACE_RET(chip, TRANSPORT_ERROR);
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
}
if (prevent) {
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
return TRANSPORT_GOOD;
}
buf = vmalloc(scsi_bufflen(srb));
- if (buf == NULL)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (buf == NULL) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
tmp = (unsigned char *)sense;
memcpy(buf, tmp, scsi_bufflen(srb));
struct ms_info *ms_card = &(chip->ms_card);
int sys_info_offset;
int data_size = buf_len;
- int support_format = 0;
+ bool support_format = false;
int i = 0;
if (cmd == MODE_SENSE) {
/* Medium Type Code */
if (check_card_ready(chip, lun)) {
if (CHK_MSXC(ms_card)) {
- support_format = 1;
+ support_format = true;
buf[i++] = 0x40;
} else if (CHK_MSPRO(ms_card)) {
- support_format = 1;
+ support_format = true;
buf[i++] = 0x20;
} else {
buf[i++] = 0x10;
unsigned int lun = SCSI_LUN(srb);
unsigned int dataSize;
int status;
- int pro_formatter_flag;
+ bool pro_formatter_flag;
unsigned char pageCode, *buf;
u8 card = get_lun_card(chip, lun);
if (!check_card_ready(chip, lun)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
scsi_set_resid(srb, scsi_bufflen(srb));
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
#endif
- pro_formatter_flag = 0;
+ pro_formatter_flag = false;
dataSize = 8;
#ifdef SUPPORT_MAGIC_GATE
if ((chip->lun2card[lun] & MS_CARD)) {
if (!card || (card == MS_CARD)) {
dataSize = 108;
if (chip->mspro_formatter_enable)
- pro_formatter_flag = 1;
+ pro_formatter_flag = true;
}
}
#else
if (card == MS_CARD) {
if (chip->mspro_formatter_enable) {
- pro_formatter_flag = 1;
+ pro_formatter_flag = true;
dataSize = 108;
}
}
#endif
buf = kmalloc(dataSize, GFP_KERNEL);
- if (buf == NULL)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (buf == NULL) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
pageCode = srb->cmnd[2] & 0x3f;
if (!check_card_ready(chip, lun) || (get_card_size(chip, lun) == 0)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (!(CHK_BIT(chip->lun_mc, lun))) {
*/
dev_dbg(rtsx_dev(chip), "SD card being erased!\n");
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_READ_FORBIDDEN);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (get_lun_card(chip, lun) == SD_CARD) {
dev_dbg(rtsx_dev(chip), "SD card locked!\n");
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_READ_FORBIDDEN);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
}
#endif
sec_cnt = ((u16)(srb->cmnd[9]) << 8) | srb->cmnd[10];
} else {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
/* In some test, we will receive a start_sec like 0xFFFFFFFF.
if ((start_sec > get_card_size(chip, lun)) ||
((start_sec + sec_cnt) > get_card_size(chip, lun))) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LBA_OVER_RANGE);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (sec_cnt == 0) {
else
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (srb->sc_data_direction == DMA_TO_DEVICE) {
dev_dbg(rtsx_dev(chip), "Write protected card!\n");
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_WRITE_PROTECT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
}
SENSE_TYPE_MEDIA_WRITE_ERR);
}
retval = TRANSPORT_FAILED;
- TRACE_GOTO(chip, Exit);
+ rtsx_trace(chip);
+ goto Exit;
} else {
chip->rw_fail_cnt[lun] = 0;
retval = TRANSPORT_GOOD;
if (!check_card_ready(chip, lun)) {
if (!chip->mspro_formatter_enable) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
}
buf_len = (scsi_bufflen(srb) > 12) ? 0x14 : 12;
buf = kmalloc(buf_len, GFP_KERNEL);
- if (buf == NULL)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (buf == NULL) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
buf[i++] = 0;
buf[i++] = 0;
if (!check_card_ready(chip, lun)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (!(CHK_BIT(chip->lun_mc, lun))) {
}
buf = kmalloc(8, GFP_KERNEL);
- if (buf == NULL)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (buf == NULL) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
card_size = get_card_size(chip, lun);
buf[0] = (unsigned char)((card_size - 1) >> 24);
len = ((u16)srb->cmnd[4] << 8) | srb->cmnd[5];
buf = vmalloc(len);
- if (!buf)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (!buf) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
retval = rtsx_force_power_on(chip, SSC_PDCTL);
if (retval != STATUS_SUCCESS) {
vfree(buf);
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
for (i = 0; i < len; i++) {
vfree(buf);
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
}
retval = rtsx_force_power_on(chip, SSC_PDCTL);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (len == 511) {
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
} else {
len = (unsigned short)min_t(unsigned int, scsi_bufflen(srb),
len);
buf = vmalloc(len);
- if (buf == NULL)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (buf == NULL) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
rtsx_stor_get_xfer_buf(buf, len, srb);
scsi_set_resid(srb, scsi_bufflen(srb) - len);
vfree(buf);
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
}
if (addr < 0xFC00) {
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
buf = vmalloc(len);
- if (!buf)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (!buf) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
retval = rtsx_force_power_on(chip, SSC_PDCTL);
if (retval != STATUS_SUCCESS) {
vfree(buf);
set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
for (i = 0; i < len; i++) {
vfree(buf);
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
}
if (addr < 0xFC00) {
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
len = (unsigned short)min_t(unsigned int, scsi_bufflen(srb), len);
buf = vmalloc(len);
- if (buf == NULL)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (buf == NULL) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
rtsx_stor_get_xfer_buf(buf, len, srb);
scsi_set_resid(srb, scsi_bufflen(srb) - len);
if (retval != STATUS_SUCCESS) {
vfree(buf);
set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
for (i = 0; i < len; i++) {
vfree(buf);
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
}
if (!check_card_ready(chip, lun)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (get_lun_card(chip, lun) != SD_CARD) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
scsi_set_resid(srb, 0);
if ((scsi_bufflen(srb) < buf_len) || (scsi_sglist(srb) == NULL)) {
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
clear = srb->cmnd[2];
buf = vmalloc(scsi_bufflen(srb));
- if (buf == NULL)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (buf == NULL) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
ptr = buf;
if (chip->trace_msg[chip->msg_idx].valid)
default:
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
} else if (srb->cmnd[3] == 2) {
if (srb->cmnd[4]) {
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
turn_off_led(chip, LED_GPIO);
}
} else {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
return TRANSPORT_GOOD;
default:
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
rtsx_stor_set_xfer_buf(&tmp, 1, srb);
rtsx_stor_set_xfer_buf(&tmp, 1, srb);
} else {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
return TRANSPORT_GOOD;
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
scsi_set_resid(srb, 0);
if (!CHECK_PID(chip, 0x5208)) {
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
phy_debug_mode = (int)(srb->cmnd[3]);
if (phy_debug_mode) {
chip->phy_debug_mode = 1;
retval = rtsx_write_register(chip, CDRESUMECTL, 0x77, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
rtsx_disable_bus_int(chip);
retval = rtsx_read_phy_register(chip, 0x1C, ®);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
reg |= 0x0001;
retval = rtsx_write_phy_register(chip, 0x1C, reg);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
} else {
chip->phy_debug_mode = 0;
retval = rtsx_write_register(chip, CDRESUMECTL, 0x77, 0x77);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
rtsx_enable_bus_int(chip);
retval = rtsx_read_phy_register(chip, 0x1C, ®);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
reg &= 0xFFFE;
retval = rtsx_write_phy_register(chip, 0x1C, reg);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
}
return TRANSPORT_GOOD;
if (cmd_type > 2) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
addr = (srb->cmnd[5] << 8) | srb->cmnd[6];
mask = srb->cmnd[7];
if (scsi_bufflen(srb) < 1) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
rtsx_stor_set_xfer_buf(&value, 1, srb);
scsi_set_resid(srb, 0);
default:
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
return TRANSPORT_GOOD;
if (len) {
buf = vmalloc(len);
- if (!buf)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (!buf) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
retval = rtsx_force_power_on(chip, SSC_PDCTL);
if (retval != STATUS_SUCCESS) {
vfree(buf);
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
for (i = 0; i < len / 2; i++) {
vfree(buf);
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
buf[2*i] = (u8)(val >> 8);
len);
buf = vmalloc(len);
- if (buf == NULL)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (buf == NULL) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
rtsx_stor_get_xfer_buf(buf, len, srb);
scsi_set_resid(srb, scsi_bufflen(srb) - len);
vfree(buf);
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
for (i = 0; i < len / 2; i++) {
vfree(buf);
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
}
retval = rtsx_force_power_on(chip, SSC_PDCTL);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
mode = srb->cmnd[3];
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
} else if (mode == 1) {
retval = spi_erase_eeprom_byte(chip, addr);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
} else {
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
return TRANSPORT_GOOD;
len = ((u16)srb->cmnd[6] << 8) | srb->cmnd[7];
buf = vmalloc(len);
- if (!buf)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (!buf) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
retval = rtsx_force_power_on(chip, SSC_PDCTL);
if (retval != STATUS_SUCCESS) {
vfree(buf);
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
for (i = 0; i < len; i++) {
vfree(buf);
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
}
len = (unsigned short)min_t(unsigned int, scsi_bufflen(srb), len);
buf = vmalloc(len);
- if (buf == NULL)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (buf == NULL) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
rtsx_stor_get_xfer_buf(buf, len, srb);
scsi_set_resid(srb, scsi_bufflen(srb) - len);
if (retval != STATUS_SUCCESS) {
vfree(buf);
set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
for (i = 0; i < len; i++) {
vfree(buf);
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
}
len = srb->cmnd[5];
buf = vmalloc(len);
- if (!buf)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (!buf) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
retval = rtsx_force_power_on(chip, SSC_PDCTL);
if (retval != STATUS_SUCCESS) {
vfree(buf);
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
for (i = 0; i < len; i++) {
vfree(buf);
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
}
len = (u8)min_t(unsigned int, scsi_bufflen(srb), len);
buf = vmalloc(len);
- if (buf == NULL)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (buf == NULL) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
rtsx_stor_get_xfer_buf(buf, len, srb);
scsi_set_resid(srb, scsi_bufflen(srb) - len);
retval = rtsx_force_power_on(chip, SSC_PDCTL);
if (retval != STATUS_SUCCESS) {
vfree(buf);
- TRACE_RET(chip, TRANSPORT_ERROR);
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
}
if (chip->asic_code) {
retval = rtsx_read_phy_register(chip, 0x08, &val);
if (retval != STATUS_SUCCESS) {
vfree(buf);
- TRACE_RET(chip, TRANSPORT_ERROR);
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
}
retval = rtsx_write_register(chip, PWR_GATE_CTRL,
LDO3318_PWR_MASK, LDO_OFF);
if (retval != STATUS_SUCCESS) {
vfree(buf);
- TRACE_RET(chip, TRANSPORT_ERROR);
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
}
wait_timeout(600);
0x4C00 | chip->phy_voltage);
if (retval != STATUS_SUCCESS) {
vfree(buf);
- TRACE_RET(chip, TRANSPORT_ERROR);
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
}
retval = rtsx_write_register(chip, PWR_GATE_CTRL,
LDO3318_PWR_MASK, LDO_ON);
if (retval != STATUS_SUCCESS) {
vfree(buf);
- TRACE_RET(chip, TRANSPORT_ERROR);
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
}
wait_timeout(600);
retval = card_power_on(chip, SPI_CARD);
if (retval != STATUS_SUCCESS) {
vfree(buf);
- TRACE_RET(chip, TRANSPORT_ERROR);
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
}
wait_timeout(50);
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_WRITE_ERR);
result = TRANSPORT_FAILED;
- TRACE_GOTO(chip, Exit);
+ rtsx_trace(chip);
+ goto Exit;
}
}
vfree(buf);
retval = card_power_off(chip, SPI_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
if (chip->asic_code) {
retval = rtsx_write_register(chip, PWR_GATE_CTRL,
LDO3318_PWR_MASK, LDO_OFF);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
wait_timeout(600);
retval = rtsx_write_phy_register(chip, 0x08, val);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
retval = rtsx_write_register(chip, PWR_GATE_CTRL,
LDO3318_PWR_MASK, LDO_ON);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
}
return result;
static int read_cfg_byte(struct scsi_cmnd *srb, struct rtsx_chip *chip)
{
int retval;
- u8 func, func_max;
+ bool func_max;
+ u8 func;
u16 addr, len;
u8 *buf;
__func__, func, addr, len);
if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip))
- func_max = 1;
+ func_max = true;
else
- func_max = 0;
+ func_max = false;
if (func > func_max) {
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
buf = vmalloc(len);
- if (!buf)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (!buf) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
retval = rtsx_read_cfg_seq(chip, func, addr, buf, len);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
vfree(buf);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
len = (u16)min_t(unsigned int, scsi_bufflen(srb), len);
static int write_cfg_byte(struct scsi_cmnd *srb, struct rtsx_chip *chip)
{
int retval;
- u8 func, func_max;
+ bool func_max;
+ u8 func;
u16 addr, len;
u8 *buf;
__func__, func, addr);
if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip))
- func_max = 1;
+ func_max = true;
else
- func_max = 0;
+ func_max = false;
if (func > func_max) {
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
len = (unsigned short)min_t(unsigned int, scsi_bufflen(srb), len);
buf = vmalloc(len);
- if (!buf)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (!buf) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
rtsx_stor_get_xfer_buf(buf, len, srb);
scsi_set_resid(srb, scsi_bufflen(srb) - len);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
vfree(buf);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
vfree(buf);
default:
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
return result;
if (!check_card_ready(chip, lun)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
card = get_lun_card(chip, lun);
bus_width = chip->card_bus_width[lun];
} else {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
scsi_set_resid(srb, 0);
if (CHECK_PID(chip, 0x5208) || CHECK_PID(chip, 0x5288)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
rtsx_disable_aspm(chip);
rtsx_write_register(chip, CARD_GPIO_DIR, 0x07, gpio_dir);
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
rtsx_write_register(chip, CARD_GPIO_DIR, 0x07, gpio_dir);
- if (result != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (result != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
return TRANSPORT_GOOD;
}
default:
set_sense_type(chip, SCSI_LUN(srb),
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
return result;
{
struct ms_info *ms_card = &(chip->ms_card);
unsigned int lun = SCSI_LUN(srb);
- int retval, quick_format;
+ bool quick_format;
+ int retval;
if (get_lun_card(chip, lun) != MS_CARD) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if ((srb->cmnd[3] != 0x4D) || (srb->cmnd[4] != 0x47) ||
(srb->cmnd[5] != 0x66) || (srb->cmnd[6] != 0x6D) ||
(srb->cmnd[7] != 0x74)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
rtsx_disable_aspm(chip);
if (!check_card_ready(chip, lun) ||
(get_card_size(chip, lun) == 0)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
}
rtsx_set_stat(chip, RTSX_STAT_RUN);
if (srb->cmnd[8] & 0x01)
- quick_format = 0;
+ quick_format = false;
else
- quick_format = 1;
+ quick_format = true;
if (!(chip->card_ready & MS_CARD)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (chip->card_wp & MS_CARD) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_PROTECT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (!CHK_MSPRO(ms_card)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
retval = mspro_format(srb, chip, MS_SHORT_DATA_LEN, quick_format);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_FORMAT_CMD_FAILED);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
scsi_set_resid(srb, 0);
if (!check_card_ready(chip, lun)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (get_lun_card(chip, lun) != MS_CARD) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if ((srb->cmnd[2] != 0xB0) || (srb->cmnd[4] != 0x4D) ||
(srb->cmnd[5] != 0x53) || (srb->cmnd[6] != 0x49) ||
(srb->cmnd[7] != 0x44)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
dev_info_id = srb->cmnd[3];
(!CHK_MSXC(ms_card) && (dev_info_id == 0x13)) ||
!CHK_MSPRO(ms_card)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (dev_info_id == 0x15)
buf_len = data_len = 0x6A;
buf = kmalloc(buf_len, GFP_KERNEL);
- if (!buf)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (!buf) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
i = 0;
/* GET Memory Stick Media Information Response Header */
if (!check_card_ready(chip, lun)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (get_lun_card(chip, lun) != SD_CARD) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
switch (srb->cmnd[0]) {
default:
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
return result;
if (!check_card_ready(chip, lun)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (get_lun_card(chip, lun) != MS_CARD) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (srb->cmnd[7] != KC_MG_R_PRO) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (!CHK_MSPRO(ms_card)) {
set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
key_format = srb->cmnd[10] & 0x3F;
(srb->cmnd[8] == 0x04) &&
(srb->cmnd[9] == 0x1C)) {
retval = mg_get_local_EKB(srb, chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
} else {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
break;
(srb->cmnd[8] == 0x00) &&
(srb->cmnd[9] == 0x24)) {
retval = mg_get_rsp_chg(srb, chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
} else {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
break;
(srb->cmnd[4] == 0x00) &&
(srb->cmnd[5] < 32)) {
retval = mg_get_ICV(srb, chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
} else {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
break;
default:
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
scsi_set_resid(srb, 0);
if (!check_card_ready(chip, lun)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (check_card_wp(chip, lun)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_PROTECT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (get_lun_card(chip, lun) != MS_CARD) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (srb->cmnd[7] != KC_MG_R_PRO) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (!CHK_MSPRO(ms_card)) {
set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
key_format = srb->cmnd[10] & 0x3F;
(srb->cmnd[8] == 0x00) &&
(srb->cmnd[9] == 0x0C)) {
retval = mg_set_leaf_id(srb, chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
} else {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
break;
(srb->cmnd[8] == 0x00) &&
(srb->cmnd[9] == 0x0C)) {
retval = mg_chg(srb, chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
} else {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
break;
(srb->cmnd[8] == 0x00) &&
(srb->cmnd[9] == 0x0C)) {
retval = mg_rsp(srb, chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
} else {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
break;
(srb->cmnd[4] == 0x00) &&
(srb->cmnd[5] < 32)) {
retval = mg_set_ICV(srb, chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
} else {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
break;
default:
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
scsi_set_resid(srb, 0);
/* Logical Unit Not Ready Format in Progress */
set_sense_data(chip, lun, CUR_ERR,
0x02, 0, 0x04, 0x04, 0, 0);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
}
#endif
/* Logical Unit Not Ready Format in Progress */
set_sense_data(chip, lun, CUR_ERR, 0x02, 0, 0x04, 0x04,
0, (u16)(ms_card->progress));
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
}
#include <linux/sched.h>
#include "rtsx.h"
-#include "rtsx_scsi.h"
-#include "rtsx_transport.h"
-#include "rtsx_chip.h"
-#include "rtsx_card.h"
/***********************************************************************
* Scatter-gather transfer buffer access routines
dev_dbg(rtsx_dev(chip), "chip->int_reg = 0x%x\n",
chip->int_reg);
err = -ETIMEDOUT;
- TRACE_GOTO(chip, finish_send_cmd);
+ rtsx_trace(chip);
+ goto finish_send_cmd;
}
spin_lock_irq(&rtsx->reg_lock);
dma_addr_t addr;
u8 dir;
int err = 0;
- u32 val = (1 << 31);
+ u32 val = 1 << 31;
long timeleft;
if ((buf == NULL) || (len <= 0))
#include <linux/sched.h>
#include "rtsx.h"
-#include "rtsx_transport.h"
-#include "rtsx_scsi.h"
-#include "rtsx_card.h"
#include "sd.h"
#define SD_MAX_RETRY_COUNT 3
static int sd_check_data0_status(struct rtsx_chip *chip)
{
+ int retval;
u8 stat;
- RTSX_READ_REG(chip, REG_SD_STAT1, &stat);
+ retval = rtsx_read_register(chip, REG_SD_STAT1, &stat);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (!(stat & SD_DAT0_STATUS)) {
sd_set_err_code(chip, SD_BUSY);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
retval = sd_check_data0_status(chip);
if (retval != STATUS_SUCCESS) {
rtsx_clear_sd_error(chip);
- TRACE_RET(chip, retval);
+ rtsx_trace(chip);
+ return retval;
}
} else {
sd_set_err_code(chip, SD_TO_ERR);
}
rtsx_clear_sd_error(chip);
- TRACE_RET(chip, retval);
+ rtsx_trace(chip);
+ return retval;
}
if (rsp_type == SD_RSP_TYPE_R0)
if ((ptr[0] & 0xC0) != 0) {
sd_set_err_code(chip, SD_STS_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (!(rsp_type & SD_NO_CHECK_CRC7)) {
if (ptr[stat_idx] & SD_CRC7_ERR) {
if (cmd_idx == WRITE_MULTIPLE_BLOCK) {
sd_set_err_code(chip, SD_CRC_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (rty_cnt < SD_MAX_RETRY_COUNT) {
wait_timeout(20);
goto RTY_SEND_CMD;
} else {
sd_set_err_code(chip, SD_CRC_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
}
if ((cmd_idx != SEND_RELATIVE_ADDR) &&
(cmd_idx != SEND_IF_COND)) {
if (cmd_idx != STOP_TRANSMISSION) {
- if (ptr[1] & 0x80)
- TRACE_RET(chip, STATUS_FAIL);
+ if (ptr[1] & 0x80) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
#ifdef SUPPORT_SD_LOCK
if (ptr[1] & 0x7D)
{
dev_dbg(rtsx_dev(chip), "ptr[1]: 0x%02x\n",
ptr[1]);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (ptr[2] & 0xFF) {
dev_dbg(rtsx_dev(chip), "ptr[2]: 0x%02x\n",
ptr[2]);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (ptr[3] & 0x80) {
dev_dbg(rtsx_dev(chip), "ptr[3]: 0x%02x\n",
ptr[3]);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (ptr[3] & 0x01)
sd_card->sd_data_buf_ready = 1;
if (!buf)
buf_len = 0;
- if (buf_len > 512)
- TRACE_RET(chip, STATUS_FAIL);
+ if (buf_len > 512) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
rtsx_init_cmd(chip);
SD_RSP_TYPE_R1, NULL, 0);
}
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (buf && buf_len) {
retval = rtsx_read_ppbuf(chip, buf, buf_len);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
return STATUS_SUCCESS;
if (buf_len > 512) {
/* This function can't write data more than one page */
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (buf && buf_len) {
retval = rtsx_write_ppbuf(chip, buf, buf_len);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
rtsx_init_cmd(chip);
sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
}
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
for (i = 0; i < 6; i++) {
if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
sd_set_err_code(chip, SD_NO_CARD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = sd_send_cmd_get_rsp(chip, SEND_CSD, sd_card->sd_addr,
break;
}
- if (i == 6)
- TRACE_RET(chip, STATUS_FAIL);
+ if (i == 6) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
memcpy(sd_card->raw_csd, rsp + 1, 15);
else
sd_card->sd_clock = CLK_20;
} else {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
} else {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (CHK_MMC_SECTOR_MODE(sd_card)) {
static int sd_set_sample_push_timing(struct rtsx_chip *chip)
{
+ int retval;
struct sd_info *sd_card = &(chip->sd_card);
-
u8 val = 0;
if ((chip->sd_ctl & SD_PUSH_POINT_CTL_MASK) == SD_PUSH_POINT_DELAY)
val |= 0x08;
}
- RTSX_WRITE_REG(chip, REG_SD_CFG1, 0x1C, val);
+ retval = rtsx_write_register(chip, REG_SD_CFG1, 0x1C, val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
return STATUS_SUCCESS;
}
static int sd_set_clock_divider(struct rtsx_chip *chip, u8 clk_div)
{
+ int retval;
u8 mask = 0, val = 0;
mask = 0x60;
else if (clk_div == SD_CLK_DIVIDE_256)
val = 0x20;
- RTSX_WRITE_REG(chip, REG_SD_CFG1, mask, val);
+ retval = rtsx_write_register(chip, REG_SD_CFG1, mask, val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
return STATUS_SUCCESS;
}
int retval;
retval = sd_set_sample_push_timing(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
sd_choose_proper_clock(chip);
retval = switch_clock(chip, sd_card->sd_clock);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
}
retval = sd_send_cmd_get_rsp(chip, cmd_idx, addr, cmd_type, NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
SD_RSP_TYPE_R1, rsp, 5);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (rsp[1] & 0x02)
sd_card->sd_lock_status |= SD_LOCKED;
dev_dbg(rtsx_dev(chip), "sd_card->sd_lock_status = 0x%x\n",
sd_card->sd_lock_status);
- if (rsp[1] & 0x01)
- TRACE_RET(chip, STATUS_FAIL);
+ if (rsp[1] & 0x01) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
retval = sd_send_cmd_get_rsp(chip, SEND_STATUS,
sd_card->sd_addr, SD_RSP_TYPE_R1, rsp,
5);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (((rsp[3] & 0x1E) == state) &&
((rsp[3] & 0x01) == data_ready))
return STATUS_SUCCESS;
}
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
static int sd_change_bank_voltage(struct rtsx_chip *chip, u8 voltage)
retval = rtsx_write_phy_register(chip, 0x08,
0x4FC0 |
chip->phy_voltage);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else {
- RTSX_WRITE_REG(chip, SD_PAD_CTL, SD_IO_USING_1V8, 0);
+ retval = rtsx_write_register(chip, SD_PAD_CTL,
+ SD_IO_USING_1V8, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
} else if (voltage == SD_IO_1V8) {
if (chip->asic_code) {
retval = rtsx_write_phy_register(chip, 0x08,
0x4C40 |
chip->phy_voltage);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else {
- RTSX_WRITE_REG(chip, SD_PAD_CTL, SD_IO_USING_1V8,
- SD_IO_USING_1V8);
+ retval = rtsx_write_register(chip, SD_PAD_CTL,
+ SD_IO_USING_1V8,
+ SD_IO_USING_1V8);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
} else {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
int retval;
u8 stat;
- RTSX_WRITE_REG(chip, SD_BUS_STAT, SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
- SD_CLK_TOGGLE_EN);
+ retval = rtsx_write_register(chip, SD_BUS_STAT,
+ SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
+ SD_CLK_TOGGLE_EN);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
retval = sd_send_cmd_get_rsp(chip, VOLTAGE_SWITCH, 0, SD_RSP_TYPE_R1,
NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
udelay(chip->sd_voltage_switch_delay);
- RTSX_READ_REG(chip, SD_BUS_STAT, &stat);
+ retval = rtsx_read_register(chip, SD_BUS_STAT, &stat);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (stat & (SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS |
SD_DAT1_STATUS | SD_DAT0_STATUS)) {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
- RTSX_WRITE_REG(chip, SD_BUS_STAT, 0xFF, SD_CLK_FORCE_STOP);
+ retval = rtsx_write_register(chip, SD_BUS_STAT, 0xFF,
+ SD_CLK_FORCE_STOP);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
retval = sd_change_bank_voltage(chip, SD_IO_1V8);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
wait_timeout(50);
- RTSX_WRITE_REG(chip, SD_BUS_STAT, 0xFF, SD_CLK_TOGGLE_EN);
+ retval = rtsx_write_register(chip, SD_BUS_STAT, 0xFF,
+ SD_CLK_TOGGLE_EN);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
wait_timeout(10);
- RTSX_READ_REG(chip, SD_BUS_STAT, &stat);
+ retval = rtsx_read_register(chip, SD_BUS_STAT, &stat);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if ((stat & (SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS |
SD_DAT1_STATUS | SD_DAT0_STATUS)) !=
(SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS |
rtsx_write_register(chip, SD_BUS_STAT,
SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
rtsx_write_register(chip, CARD_CLK_EN, 0xFF, 0);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
- RTSX_WRITE_REG(chip, SD_BUS_STAT, SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
- 0);
+ retval = rtsx_write_register(chip, SD_BUS_STAT,
+ SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
return STATUS_SUCCESS;
}
static int sd_reset_dcm(struct rtsx_chip *chip, u8 tune_dir)
{
+ int retval;
+
if (tune_dir == TUNE_RX) {
- RTSX_WRITE_REG(chip, DCM_DRP_CTL, 0xFF, DCM_RESET | DCM_RX);
- RTSX_WRITE_REG(chip, DCM_DRP_CTL, 0xFF, DCM_RX);
+ retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF,
+ DCM_RESET | DCM_RX);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF, DCM_RX);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
} else {
- RTSX_WRITE_REG(chip, DCM_DRP_CTL, 0xFF, DCM_RESET | DCM_TX);
- RTSX_WRITE_REG(chip, DCM_DRP_CTL, 0xFF, DCM_TX);
+ retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF,
+ DCM_RESET | DCM_TX);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF, DCM_TX);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
return STATUS_SUCCESS;
u16 SD_VP_CTL, SD_DCMPS_CTL;
u8 val;
int retval;
- int ddr_rx = 0;
+ bool ddr_rx = false;
dev_dbg(rtsx_dev(chip), "sd_change_phase (sample_point = %d, tune_dir = %d)\n",
sample_point, tune_dir);
SD_VP_CTL = SD_VPRX_CTL;
SD_DCMPS_CTL = SD_DCMPS_RX_CTL;
if (CHK_SD_DDR50(sd_card))
- ddr_rx = 1;
+ ddr_rx = true;
} else {
SD_VP_CTL = SD_VPTX_CTL;
SD_DCMPS_CTL = SD_DCMPS_TX_CTL;
}
if (chip->asic_code) {
- RTSX_WRITE_REG(chip, CLK_CTL, CHANGE_CLK, CHANGE_CLK);
- RTSX_WRITE_REG(chip, SD_VP_CTL, 0x1F, sample_point);
- RTSX_WRITE_REG(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
- RTSX_WRITE_REG(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET,
- PHASE_NOT_RESET);
- RTSX_WRITE_REG(chip, CLK_CTL, CHANGE_CLK, 0);
+ retval = rtsx_write_register(chip, CLK_CTL, CHANGE_CLK,
+ CHANGE_CLK);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, SD_VP_CTL, 0x1F,
+ sample_point);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
+ PHASE_NOT_RESET, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
+ PHASE_NOT_RESET, PHASE_NOT_RESET);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CLK_CTL, CHANGE_CLK, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
} else {
rtsx_read_register(chip, SD_VP_CTL, &val);
dev_dbg(rtsx_dev(chip), "SD_VP_CTL: 0x%x\n", val);
dev_dbg(rtsx_dev(chip), "SD_DCMPS_CTL: 0x%x\n", val);
if (ddr_rx) {
- RTSX_WRITE_REG(chip, SD_VP_CTL, PHASE_CHANGE,
- PHASE_CHANGE);
+ retval = rtsx_write_register(chip, SD_VP_CTL,
+ PHASE_CHANGE,
+ PHASE_CHANGE);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
udelay(50);
- RTSX_WRITE_REG(chip, SD_VP_CTL, 0xFF,
- PHASE_CHANGE | PHASE_NOT_RESET | sample_point);
+ retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF,
+ PHASE_CHANGE | PHASE_NOT_RESET | sample_point);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
} else {
- RTSX_WRITE_REG(chip, CLK_CTL, CHANGE_CLK, CHANGE_CLK);
+ retval = rtsx_write_register(chip, CLK_CTL,
+ CHANGE_CLK, CHANGE_CLK);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
udelay(50);
- RTSX_WRITE_REG(chip, SD_VP_CTL, 0xFF,
- PHASE_NOT_RESET | sample_point);
+ retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF,
+ PHASE_NOT_RESET | sample_point);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
udelay(100);
rtsx_add_cmd(chip, CHECK_REG_CMD, SD_DCMPS_CTL,
DCMPS_CHANGE_DONE, DCMPS_CHANGE_DONE);
retval = rtsx_send_cmd(chip, SD_CARD, 100);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, Fail);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto Fail;
+ }
val = *rtsx_get_cmd_data(chip);
- if (val & DCMPS_ERROR)
- TRACE_GOTO(chip, Fail);
+ if (val & DCMPS_ERROR) {
+ rtsx_trace(chip);
+ goto Fail;
+ }
- if ((val & DCMPS_CURRENT_PHASE) != sample_point)
- TRACE_GOTO(chip, Fail);
+ if ((val & DCMPS_CURRENT_PHASE) != sample_point) {
+ rtsx_trace(chip);
+ goto Fail;
+ }
- RTSX_WRITE_REG(chip, SD_DCMPS_CTL, DCMPS_CHANGE, 0);
- if (ddr_rx)
- RTSX_WRITE_REG(chip, SD_VP_CTL, PHASE_CHANGE, 0);
- else
- RTSX_WRITE_REG(chip, CLK_CTL, CHANGE_CLK, 0);
+ retval = rtsx_write_register(chip, SD_DCMPS_CTL,
+ DCMPS_CHANGE, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ if (ddr_rx) {
+ retval = rtsx_write_register(chip, SD_VP_CTL,
+ PHASE_CHANGE, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ } else {
+ retval = rtsx_write_register(chip, CLK_CTL,
+ CHANGE_CLK, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ }
udelay(50);
}
- RTSX_WRITE_REG(chip, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0);
+ retval = rtsx_write_register(chip, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
return STATUS_SUCCESS;
retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
SD_RSP_TYPE_R1, NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
cmd[0] = 0x40 | SEND_SCR;
cmd[1] = 0;
buf, 8, 250);
if (retval != STATUS_SUCCESS) {
rtsx_clear_sd_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
memcpy(sd_card->raw_scr, buf, 8);
- if ((buf[0] & 0x0F) == 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if ((buf[0] & 0x0F) == 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
break;
default:
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
} else if (func_group == SD_FUNC_GROUP_3) {
support_offset = FUNCTION_GROUP3_SUPPORT_OFFSET;
break;
default:
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
} else if (func_group == SD_FUNC_GROUP_4) {
support_offset = FUNCTION_GROUP4_SUPPORT_OFFSET;
break;
default:
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
} else {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (func_group == SD_FUNC_GROUP_1) {
if (!(buf[support_offset] & support_mask) ||
((buf[query_switch_offset] & 0x0F) != query_switch)) {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
/* Check 'Busy Status' */
if ((buf[DATA_STRUCTURE_VER_OFFSET] == 0x01) &&
((buf[check_busy_offset] & switch_busy) == switch_busy)) {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
buf, 64, 250);
if (retval != STATUS_SUCCESS) {
rtsx_clear_sd_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
dev_dbg(rtsx_dev(chip), "%*ph\n", 64, buf);
dev_dbg(rtsx_dev(chip), "Maximum current consumption: %dmA\n",
cc);
- if ((cc == 0) || (cc > 800))
- TRACE_RET(chip, STATUS_FAIL);
+ if ((cc == 0) || (cc > 800)) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = sd_query_switch_result(chip, func_group,
func_to_switch, buf, 64);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if ((cc > 400) || (func_to_switch > CURRENT_LIMIT_400)) {
- RTSX_WRITE_REG(chip, OCPPARA2, SD_OCP_THD_MASK,
- chip->sd_800mA_ocp_thd);
- RTSX_WRITE_REG(chip, CARD_PWR_CTL, PMOS_STRG_MASK,
- PMOS_STRG_800mA);
+ retval = rtsx_write_register(chip, OCPPARA2,
+ SD_OCP_THD_MASK,
+ chip->sd_800mA_ocp_thd);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PWR_CTL,
+ PMOS_STRG_MASK,
+ PMOS_STRG_800mA);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
}
{
int retval;
int i;
- int switch_good = 0;
+ bool switch_good = false;
for (i = 0; i < 3; i++) {
if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
sd_set_err_code(chip, SD_NO_CARD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = sd_check_switch_mode(chip, SD_CHECK_MODE, func_group,
retval = sd_check_switch_mode(chip, SD_SWITCH_MODE,
func_group, func_to_switch, bus_width);
if (retval == STATUS_SUCCESS) {
- switch_good = 1;
+ switch_good = true;
break;
}
- RTSX_READ_REG(chip, SD_STAT1, &stat);
+ retval = rtsx_read_register(chip, SD_STAT1, &stat);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (stat & SD_CRC16_ERR) {
dev_dbg(rtsx_dev(chip), "SD CRC16 error when switching mode\n");
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
wait_timeout(20);
}
- if (!switch_good)
- TRACE_RET(chip, STATUS_FAIL);
+ if (!switch_good) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
/* Get supported functions */
retval = sd_check_switch_mode(chip, SD_CHECK_MODE,
NO_ARGUMENT, NO_ARGUMENT, bus_width);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
sd_card->func_group1_mask &= ~(sd_card->sd_switch_fail);
sd_card->sd_switch_fail = SDR104_SUPPORT_MASK |
DDR50_SUPPORT_MASK | SDR50_SUPPORT_MASK;
}
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (func_to_switch == SDR104_SUPPORT)
}
if (CHK_SD_DDR50(sd_card)) {
- RTSX_WRITE_REG(chip, SD_PUSH_POINT_CTL, 0x06, 0x04);
+ retval = rtsx_write_register(chip, SD_PUSH_POINT_CTL, 0x06,
+ 0x04);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
retval = sd_set_sample_push_timing(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
if (!func_to_switch || (func_to_switch == HS_SUPPORT)) {
retval = sd_check_switch(chip, SD_FUNC_GROUP_4, func_to_switch,
bus_width);
if (retval != STATUS_SUCCESS) {
- if (sd_check_err_code(chip, SD_NO_CARD))
- TRACE_RET(chip, STATUS_FAIL);
+ if (sd_check_err_code(chip, SD_NO_CARD)) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
dev_dbg(rtsx_dev(chip), "Switch current limit finished! (%d)\n",
retval);
}
- if (CHK_SD_DDR50(sd_card))
- RTSX_WRITE_REG(chip, SD_PUSH_POINT_CTL, 0x06, 0);
+ if (CHK_SD_DDR50(sd_card)) {
+ retval = rtsx_write_register(chip, SD_PUSH_POINT_CTL, 0x06, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ }
return STATUS_SUCCESS;
}
u8 val = 0;
for (i = 0; i < 100; i++) {
- RTSX_READ_REG(chip, SD_DATA_STATE, &val);
+ retval = rtsx_read_register(chip, SD_DATA_STATE, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (val & SD_DATA_IDLE) {
retval = STATUS_SUCCESS;
break;
u8 cmd[5];
retval = sd_change_phase(chip, sample_point, TUNE_RX);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
cmd[0] = 0x40 | SEND_TUNING_PATTERN;
cmd[1] = 0;
(void)sd_wait_data_idle(chip);
rtsx_clear_sd_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
u8 cmd[5];
retval = sd_change_phase(chip, sample_point, TUNE_RX);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
dev_dbg(rtsx_dev(chip), "sd ddr tuning rx\n");
retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
SD_RSP_TYPE_R1, NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
cmd[0] = 0x40 | SD_STATUS;
cmd[1] = 0;
(void)sd_wait_data_idle(chip);
rtsx_clear_sd_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
bus_width = SD_BUS_WIDTH_1;
retval = sd_change_phase(chip, sample_point, TUNE_RX);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
dev_dbg(rtsx_dev(chip), "mmc ddr tuning rx\n");
(void)sd_wait_data_idle(chip);
rtsx_clear_sd_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
int retval;
retval = sd_change_phase(chip, sample_point, TUNE_TX);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_WRITE_REG(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
- SD_RSP_80CLK_TIMEOUT_EN);
+ retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
+ SD_RSP_80CLK_TIMEOUT_EN);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
SD_RSP_TYPE_R1, NULL, 0);
if (sd_check_err_code(chip, SD_RSP_TIMEOUT)) {
rtsx_write_register(chip, SD_CFG3,
SD_RSP_80CLK_TIMEOUT_EN, 0);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
- RTSX_WRITE_REG(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0);
+ retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
+ 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
return STATUS_SUCCESS;
}
u8 cmd[5], bus_width;
retval = sd_change_phase(chip, sample_point, TUNE_TX);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (CHK_SD(sd_card)) {
bus_width = SD_BUS_WIDTH_4;
}
retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_WRITE_REG(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
- SD_RSP_80CLK_TIMEOUT_EN);
+ retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
+ SD_RSP_80CLK_TIMEOUT_EN);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
cmd[0] = 0x40 | PROGRAM_CSD;
cmd[1] = 0;
if (retval != STATUS_SUCCESS) {
rtsx_clear_sd_error(chip);
rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
- RTSX_WRITE_REG(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0);
+ retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
+ 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1,
NULL, 0);
struct sd_info *sd_card = &(chip->sd_card);
struct timing_phase_path path[MAX_PHASE + 1];
int i, j, cont_path_cnt;
- int new_block, max_len, final_path_idx;
+ bool new_block;
+ int max_len, final_path_idx;
u8 final_phase = 0xFF;
if (phase_map == 0xFFFFFFFF) {
}
cont_path_cnt = 0;
- new_block = 1;
+ new_block = true;
j = 0;
for (i = 0; i < MAX_PHASE + 1; i++) {
if (phase_map & (1 << i)) {
if (new_block) {
- new_block = 0;
+ new_block = false;
j = cont_path_cnt++;
path[j].start = i;
path[j].end = i;
path[j].end = i;
}
} else {
- new_block = 1;
+ new_block = true;
if (cont_path_cnt) {
int idx = cont_path_cnt - 1;
} else {
if (CHK_MMC_DDR52(sd_card))
tuning_cmd = mmc_ddr_tunning_rx_cmd;
- else
- TRACE_RET(chip, STATUS_FAIL);
+ else {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
for (i = 0; i < 3; i++) {
for (j = MAX_PHASE; j >= 0; j--) {
if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
sd_set_err_code(chip, SD_NO_CARD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = tuning_cmd(chip, (u8)j);
dev_dbg(rtsx_dev(chip), "RX phase_map = 0x%08x\n", phase_map);
final_phase = sd_search_final_phase(chip, phase_map, TUNE_RX);
- if (final_phase == 0xFF)
- TRACE_RET(chip, STATUS_FAIL);
+ if (final_phase == 0xFF) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = sd_change_phase(chip, final_phase, TUNE_RX);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
u32 phase_map;
u8 final_phase;
- RTSX_WRITE_REG(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
- SD_RSP_80CLK_TIMEOUT_EN);
+ retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
+ SD_RSP_80CLK_TIMEOUT_EN);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
phase_map = 0;
for (i = MAX_PHASE; i >= 0; i--) {
sd_set_err_code(chip, SD_NO_CARD);
rtsx_write_register(chip, SD_CFG3,
SD_RSP_80CLK_TIMEOUT_EN, 0);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = sd_change_phase(chip, (u8)i, TUNE_TX);
phase_map |= 1 << i;
}
- RTSX_WRITE_REG(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0);
+ retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
+ 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
dev_dbg(rtsx_dev(chip), "DDR TX pre tune phase_map = 0x%08x\n",
phase_map);
final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX);
- if (final_phase == 0xFF)
- TRACE_RET(chip, STATUS_FAIL);
+ if (final_phase == 0xFF) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = sd_change_phase(chip, final_phase, TUNE_TX);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
dev_dbg(rtsx_dev(chip), "DDR TX pre tune phase: %d\n",
(int)final_phase);
} else {
if (CHK_MMC_DDR52(sd_card))
tuning_cmd = sd_ddr_tuning_tx_cmd;
- else
- TRACE_RET(chip, STATUS_FAIL);
+ else {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
for (i = 0; i < 3; i++) {
sd_set_err_code(chip, SD_NO_CARD);
rtsx_write_register(chip, SD_CFG3,
SD_RSP_80CLK_TIMEOUT_EN, 0);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = tuning_cmd(chip, (u8)j);
dev_dbg(rtsx_dev(chip), "TX phase_map = 0x%08x\n", phase_map);
final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX);
- if (final_phase == 0xFF)
- TRACE_RET(chip, STATUS_FAIL);
+ if (final_phase == 0xFF) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = sd_change_phase(chip, final_phase, TUNE_TX);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
int retval;
retval = sd_tuning_tx(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = sd_tuning_rx(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
if (!(chip->sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) {
retval = sd_ddr_pre_tuning_tx(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else {
retval = sd_change_phase(chip, (u8)chip->sd_ddr_tx_phase,
TUNE_TX);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
retval = sd_tuning_rx(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (!(chip->sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) {
retval = sd_tuning_tx(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
return STATUS_SUCCESS;
if (!(chip->sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) {
retval = sd_ddr_pre_tuning_tx(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else {
retval = sd_change_phase(chip, (u8)chip->mmc_ddr_tx_phase,
TUNE_TX);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
retval = sd_tuning_rx(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (!(chip->sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) {
retval = sd_tuning_tx(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
return STATUS_SUCCESS;
int re_tuning = 0;
retval = select_card(chip, SD_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = switch_clock(chip, sd_card->sd_clock);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (re_tuning) {
if (CHK_SD(sd_card)) {
retval = mmc_ddr_tuning(chip);
}
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
return STATUS_SUCCESS;
chip->sd_io = 0;
retval = sd_set_init_para(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, retval);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return retval;
+ }
- RTSX_WRITE_REG(chip, REG_SD_CFG1, 0xFF, 0x40);
+ retval = rtsx_write_register(chip, REG_SD_CFG1, 0xFF, 0x40);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
- RTSX_WRITE_REG(chip, CARD_STOP, SD_STOP | SD_CLR_ERR,
- SD_STOP | SD_CLR_ERR);
+ retval = rtsx_write_register(chip, CARD_STOP, SD_STOP | SD_CLR_ERR,
+ SD_STOP | SD_CLR_ERR);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
retval = select_card(chip, SD_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
static int sd_pull_ctl_disable(struct rtsx_chip *chip)
{
+ int retval;
+
if (CHECK_PID(chip, 0x5208)) {
- RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF,
- XD_D3_PD | SD_D7_PD | SD_CLK_PD | SD_D5_PD);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF,
- SD_D6_PD | SD_D0_PD | SD_D1_PD | XD_D5_PD);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF,
- SD_D4_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF,
- XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF,
- MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL6, 0xFF, MS_D5_PD | MS_D4_PD);
+ retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,
+ XD_D3_PD | SD_D7_PD | SD_CLK_PD | SD_D5_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,
+ SD_D6_PD | SD_D0_PD | SD_D1_PD | XD_D5_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,
+ SD_D4_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,
+ XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,
+ MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF,
+ MS_D5_PD | MS_D4_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
} else if (CHECK_PID(chip, 0x5288)) {
if (CHECK_BARO_PKG(chip, QFN)) {
- RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF, 0x55);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF, 0x55);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF, 0x4B);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF, 0x69);
+ retval = rtsx_write_register(chip, CARD_PULL_CTL1,
+ 0xFF, 0x55);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL2,
+ 0xFF, 0x55);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL3,
+ 0xFF, 0x4B);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL4,
+ 0xFF, 0x69);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
}
}
retval = rtsx_send_cmd(chip, SD_CARD, 100);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
int retval;
retval = sd_power_off_card3v3(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (!chip->ft2_fast_mode)
wait_timeout(250);
retval = enable_card_clock(chip, SD_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (chip->asic_code) {
retval = sd_pull_ctl_enable(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else {
- RTSX_WRITE_REG(chip, FPGA_PULL_CTL, FPGA_SD_PULL_CTL_BIT | 0x20,
- 0);
+ retval = rtsx_write_register(chip, FPGA_PULL_CTL,
+ FPGA_SD_PULL_CTL_BIT | 0x20, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
if (!chip->ft2_fast_mode) {
retval = card_power_on(chip, SD_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
wait_timeout(260);
if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) {
dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
chip->ocp_stat);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
#endif
}
- RTSX_WRITE_REG(chip, CARD_OE, SD_OUTPUT_EN, SD_OUTPUT_EN);
+ retval = rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN,
+ SD_OUTPUT_EN);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
return STATUS_SUCCESS;
}
static int sd_dummy_clock(struct rtsx_chip *chip)
{
- RTSX_WRITE_REG(chip, REG_SD_CFG3, 0x01, 0x01);
+ int retval;
+
+ retval = rtsx_write_register(chip, REG_SD_CFG3, 0x01, 0x01);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
wait_timeout(5);
- RTSX_WRITE_REG(chip, REG_SD_CFG3, 0x01, 0);
+ retval = rtsx_write_register(chip, REG_SD_CFG3, 0x01, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
return STATUS_SUCCESS;
}
5, 512, 1, bus_width, NULL, 0, 100);
if (retval != STATUS_SUCCESS) {
rtsx_clear_sd_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
retval = sd_send_cmd_get_rsp(chip, APP_CMD,
sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
cmd[0] = 0x40 | SD_STATUS;
cmd[1] = 0;
sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
SD_RSP_TYPE_R1, NULL, 0);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
dev_dbg(rtsx_dev(chip), "ACMD13:\n");
static int reset_sd(struct rtsx_chip *chip)
{
struct sd_info *sd_card = &(chip->sd_card);
- int retval, i = 0, j = 0, k = 0, hi_cap_flow = 0;
- int sd_dont_switch = 0;
- int support_1v8 = 0;
- int try_sdio = 1;
+ bool hi_cap_flow = false;
+ int retval, i = 0, j = 0, k = 0;
+ bool sd_dont_switch = false;
+ bool support_1v8 = false;
+ bool try_sdio = true;
u8 rsp[16];
u8 switch_bus_width;
u32 voltage = 0;
- int sd20_mode = 0;
+ bool sd20_mode = false;
SET_SD(sd_card);
i = 0;
j = 0;
k = 0;
- hi_cap_flow = 0;
+ hi_cap_flow = false;
#ifdef SUPPORT_SD_LOCK
if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON)
#endif
retval = sd_prepare_reset(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = sd_dummy_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip) && try_sdio) {
int rty_cnt = 0;
for (; rty_cnt < chip->sdio_retry_cnt; rty_cnt++) {
if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
sd_set_err_code(chip, SD_NO_CARD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = sd_send_cmd_get_rsp(chip, IO_SEND_OP_COND, 0,
dev_dbg(rtsx_dev(chip), "SD_IO card (Function number: %d)!\n",
func_num);
chip->sd_io = 1;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
break;
RTY_SD_RST:
retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0, SD_RSP_TYPE_R0,
NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
wait_timeout(20);
SD_RSP_TYPE_R7, rsp, 5);
if (retval == STATUS_SUCCESS) {
if ((rsp[4] == 0xAA) && ((rsp[3] & 0x0f) == 0x01)) {
- hi_cap_flow = 1;
+ hi_cap_flow = true;
voltage = SUPPORT_VOLTAGE | 0x40000000;
}
}
retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0,
SD_RSP_TYPE_R0, NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
wait_timeout(20);
}
if (retval != STATUS_SUCCESS) {
if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
sd_set_err_code(chip, SD_NO_CARD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
j++;
if (j < 3)
goto RTY_SD_RST;
- else
- TRACE_RET(chip, STATUS_FAIL);
+ else {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
retval = sd_send_cmd_get_rsp(chip, SD_APP_OP_COND, voltage,
k++;
if (k < 3)
goto RTY_SD_RST;
- else
- TRACE_RET(chip, STATUS_FAIL);
+ else {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
i++;
wait_timeout(20);
} while (!(rsp[1] & 0x80) && (i < 255));
- if (i == 255)
- TRACE_RET(chip, STATUS_FAIL);
+ if (i == 255) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (hi_cap_flow) {
if (rsp[1] & 0x40)
else
CLR_SD_HCXC(sd_card);
- support_1v8 = 0;
+ support_1v8 = false;
} else {
CLR_SD_HCXC(sd_card);
- support_1v8 = 0;
+ support_1v8 = false;
}
dev_dbg(rtsx_dev(chip), "support_1v8 = %d\n", support_1v8);
if (support_1v8) {
retval = sd_voltage_switch(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
retval = sd_send_cmd_get_rsp(chip, ALL_SEND_CID, 0, SD_RSP_TYPE_R2,
NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
for (i = 0; i < 3; i++) {
retval = sd_send_cmd_get_rsp(chip, SEND_RELATIVE_ADDR, 0,
SD_RSP_TYPE_R6, rsp, 5);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
sd_card->sd_addr = (u32)rsp[1] << 24;
sd_card->sd_addr += (u32)rsp[2] << 16;
}
retval = sd_check_csd(chip, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = sd_select_card(chip, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
#ifdef SUPPORT_SD_LOCK
SD_UNLOCK_ENTRY:
retval = sd_update_lock_status(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (sd_card->sd_lock_status & SD_LOCKED) {
sd_card->sd_lock_status |= (SD_LOCK_1BIT_MODE | SD_PWD_EXIST);
retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
SD_RSP_TYPE_R1, NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = sd_send_cmd_get_rsp(chip, SET_CLR_CARD_DETECT, 0,
SD_RSP_TYPE_R1, NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (support_1v8) {
retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
SD_RSP_TYPE_R1, NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = sd_send_cmd_get_rsp(chip, SET_BUS_WIDTH, 2,
SD_RSP_TYPE_R1, NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
switch_bus_width = SD_BUS_WIDTH_4;
} else {
retval = sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1,
NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (!(sd_card->raw_csd[4] & 0x40))
- sd_dont_switch = 1;
+ sd_dont_switch = true;
if (!sd_dont_switch) {
if (sd20_mode) {
retval = sd_switch_function(chip, switch_bus_width);
if (retval != STATUS_SUCCESS) {
sd_init_power(chip);
- sd_dont_switch = 1;
- try_sdio = 0;
+ sd_dont_switch = true;
+ try_sdio = false;
goto Switch_Fail;
}
} else {
if (support_1v8) {
sd_init_power(chip);
- sd_dont_switch = 1;
- try_sdio = 0;
+ sd_dont_switch = true;
+ try_sdio = false;
goto Switch_Fail;
}
if (!support_1v8) {
retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
SD_RSP_TYPE_R1, NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = sd_send_cmd_get_rsp(chip, SET_BUS_WIDTH, 2,
SD_RSP_TYPE_R1, NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
#ifdef SUPPORT_SD_LOCK
if (!sd20_mode && CHK_SD30_SPEED(sd_card)) {
int read_lba0 = 1;
- RTSX_WRITE_REG(chip, SD30_DRIVE_SEL, 0x07,
- chip->sd30_drive_sel_1v8);
+ retval = rtsx_write_register(chip, SD30_DRIVE_SEL, 0x07,
+ chip->sd30_drive_sel_1v8);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
retval = sd_set_init_para(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (CHK_SD_DDR50(sd_card))
retval = sd_ddr_tuning(chip);
if (retval != STATUS_SUCCESS) {
if (sd20_mode) {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
} else {
retval = sd_init_power(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- try_sdio = 0;
- sd20_mode = 1;
+ try_sdio = false;
+ sd20_mode = true;
goto Switch_Fail;
}
}
retval = sd_read_lba0(chip);
if (retval != STATUS_SUCCESS) {
if (sd20_mode) {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
} else {
retval = sd_init_power(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- try_sdio = 0;
- sd20_mode = 1;
+ try_sdio = false;
+ sd20_mode = true;
goto Switch_Fail;
}
}
}
retval = sd_check_wp_state(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
chip->card_bus_width[chip->card2lun[SD_CARD]] = 4;
#ifdef SUPPORT_SD_LOCK
if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON) {
- RTSX_WRITE_REG(chip, REG_SD_BLOCK_CNT_H, 0xFF, 0x02);
- RTSX_WRITE_REG(chip, REG_SD_BLOCK_CNT_L, 0xFF, 0x00);
+ retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_H, 0xFF,
+ 0x02);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_L, 0xFF,
+ 0x00);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
#endif
retval = sd_send_cmd_get_rsp(chip, BUSTEST_W, 0, SD_RSP_TYPE_R1, NULL,
0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, SWITCH_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return SWITCH_FAIL;
+ }
if (width == MMC_8BIT_BUS) {
buf[0] = 0x55;
}
retval = rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0x02);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, SWITCH_ERR);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return SWITCH_ERR;
+ }
retval = sd_write_data(chip, SD_TM_AUTO_WRITE_3,
NULL, 0, byte_cnt, 1, bus_width, buf, len, 100);
if (retval != STATUS_SUCCESS) {
rtsx_clear_sd_error(chip);
rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0);
- TRACE_RET(chip, SWITCH_ERR);
+ rtsx_trace(chip);
+ return SWITCH_ERR;
}
retval = rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, SWITCH_ERR);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return SWITCH_ERR;
+ }
dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", BUSTEST_R);
retval = rtsx_send_cmd(chip, SD_CARD, 100);
if (retval < 0) {
rtsx_clear_sd_error(chip);
- TRACE_RET(chip, SWITCH_ERR);
+ rtsx_trace(chip);
+ return SWITCH_ERR;
}
ptr = rtsx_get_cmd_data(chip) + 1;
}
}
- TRACE_RET(chip, SWITCH_FAIL);
+ rtsx_trace(chip);
+ return SWITCH_FAIL;
}
-static int mmc_switch_timing_bus(struct rtsx_chip *chip, int switch_ddr)
+static int mmc_switch_timing_bus(struct rtsx_chip *chip, bool switch_ddr)
{
struct sd_info *sd_card = &(chip->sd_card);
int retval;
sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
SD_RSP_TYPE_R1, NULL, 0);
}
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
ptr = rtsx_get_cmd_data(chip);
if (ptr[0] & SD_TRANSFER_ERR) {
sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
SD_RSP_TYPE_R1, NULL, 0);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (CHK_MMC_SECTOR_MODE(sd_card)) {
sd_choose_proper_clock(chip);
retval = switch_clock(chip, sd_card->sd_clock);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
/* Test Bus Procedure */
retval = mmc_test_switch_bus(chip, MMC_8BIT_BUS);
CLR_MMC_8BIT(sd_card);
CLR_MMC_4BIT(sd_card);
} else {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
} else {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
{
struct sd_info *sd_card = &(chip->sd_card);
int retval, i = 0, j = 0, k = 0;
- int switch_ddr = 1;
+ bool switch_ddr = true;
u8 rsp[16];
u8 spec_ver = 0;
u32 temp;
Switch_Fail:
retval = sd_prepare_reset(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, retval);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return retval;
+ }
SET_MMC(sd_card);
RTY_MMC_RST:
retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0, SD_RSP_TYPE_R0,
NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
do {
if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
sd_set_err_code(chip, SD_NO_CARD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = sd_send_cmd_get_rsp(chip, SEND_OP_COND,
sd_clr_err_code(chip);
goto RTY_MMC_RST;
} else {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
} else {
j++;
sd_clr_err_code(chip);
goto RTY_MMC_RST;
} else {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
}
i++;
} while (!(rsp[1] & 0x80) && (i < 255));
- if (i == 255)
- TRACE_RET(chip, STATUS_FAIL);
+ if (i == 255) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if ((rsp[1] & 0x60) == 0x40)
SET_MMC_SECTOR_MODE(sd_card);
retval = sd_send_cmd_get_rsp(chip, ALL_SEND_CID, 0, SD_RSP_TYPE_R2,
NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
sd_card->sd_addr = 0x00100000;
retval = sd_send_cmd_get_rsp(chip, SET_RELATIVE_ADDR, sd_card->sd_addr,
SD_RSP_TYPE_R6, rsp, 5);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = sd_check_csd(chip, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
spec_ver = (sd_card->raw_csd[0] & 0x3C) >> 2;
retval = sd_select_card(chip, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1,
NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
#ifdef SUPPORT_SD_LOCK
MMC_UNLOCK_ENTRY:
retval = sd_update_lock_status(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
#endif
retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
chip->card_bus_width[chip->card2lun[SD_CARD]] = 1;
retval = mmc_switch_timing_bus(chip, switch_ddr);
if (retval != STATUS_SUCCESS) {
retval = sd_init_power(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
sd_card->mmc_dont_switch_bus = 1;
- TRACE_GOTO(chip, Switch_Fail);
+ rtsx_trace(chip);
+ goto Switch_Fail;
}
}
- if (CHK_MMC_SECTOR_MODE(sd_card) && (sd_card->capacity == 0))
- TRACE_RET(chip, STATUS_FAIL);
+ if (CHK_MMC_SECTOR_MODE(sd_card) && (sd_card->capacity == 0)) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (switch_ddr && CHK_MMC_DDR52(sd_card)) {
retval = sd_set_init_para(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = mmc_ddr_tuning(chip);
if (retval != STATUS_SUCCESS) {
retval = sd_init_power(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- switch_ddr = 0;
- TRACE_GOTO(chip, Switch_Fail);
+ switch_ddr = false;
+ rtsx_trace(chip);
+ goto Switch_Fail;
}
retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
retval = sd_read_lba0(chip);
if (retval != STATUS_SUCCESS) {
retval = sd_init_power(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- switch_ddr = 0;
- TRACE_GOTO(chip, Switch_Fail);
+ switch_ddr = false;
+ rtsx_trace(chip);
+ goto Switch_Fail;
}
}
}
#ifdef SUPPORT_SD_LOCK
if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON) {
- RTSX_WRITE_REG(chip, REG_SD_BLOCK_CNT_H, 0xFF, 0x02);
- RTSX_WRITE_REG(chip, REG_SD_BLOCK_CNT_L, 0xFF, 0x00);
+ retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_H, 0xFF,
+ 0x02);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_L, 0xFF,
+ 0x00);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
#endif
chip->capacity[chip->card2lun[SD_CARD]] = 0;
retval = enable_card_clock(chip, SD_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (chip->ignore_sd && CHK_SDIO_EXIST(chip) &&
!CHK_SDIO_IGNORED(chip)) {
if (chip->asic_code) {
retval = sd_pull_ctl_enable(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else {
retval = rtsx_write_register(chip, FPGA_PULL_CTL,
FPGA_SD_PULL_CTL_BIT | 0x20, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
retval = card_share_mode(chip, SD_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
chip->sd_io = 1;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = sd_init_power(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (chip->sd_ctl & RESET_MMC_FIRST) {
retval = reset_mmc(chip);
if (retval != STATUS_SUCCESS) {
- if (sd_check_err_code(chip, SD_NO_CARD))
- TRACE_RET(chip, STATUS_FAIL);
+ if (sd_check_err_code(chip, SD_NO_CARD)) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = reset_sd(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
} else {
retval = reset_sd(chip);
if (retval != STATUS_SUCCESS) {
- if (sd_check_err_code(chip, SD_NO_CARD))
- TRACE_RET(chip, STATUS_FAIL);
+ if (sd_check_err_code(chip, SD_NO_CARD)) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (chip->sd_io) {
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
} else {
retval = reset_mmc(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
}
}
retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_WRITE_REG(chip, REG_SD_BYTE_CNT_L, 0xFF, 0);
- RTSX_WRITE_REG(chip, REG_SD_BYTE_CNT_H, 0xFF, 2);
+ retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_L, 0xFF, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_H, 0xFF, 2);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity;
retval = sd_set_init_para(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
dev_dbg(rtsx_dev(chip), "sd_card->sd_type = 0x%x\n", sd_card->sd_type);
chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity = 0;
retval = enable_card_clock(chip, SD_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = sd_init_power(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = reset_mmc(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_WRITE_REG(chip, REG_SD_BYTE_CNT_L, 0xFF, 0);
- RTSX_WRITE_REG(chip, REG_SD_BYTE_CNT_H, 0xFF, 2);
+ retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_L, 0xFF, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_H, 0xFF, 2);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity;
retval = sd_set_init_para(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
dev_dbg(rtsx_dev(chip), "In reset_mmc_only, sd_card->sd_type = 0x%x\n",
sd_card->sd_type);
for (i = 0; i < WAIT_DATA_READY_RTY_CNT; i++) {
if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
sd_set_err_code(chip, SD_NO_CARD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
sd_card->sd_data_buf_ready = 0;
retval = sd_send_cmd_get_rsp(chip, SEND_STATUS,
sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (sd_card->sd_data_buf_ready) {
return sd_send_cmd_get_rsp(chip, SEND_STATUS,
sd_set_err_code(chip, SD_TO_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
void sd_stop_seq_mode(struct rtsx_chip *chip)
}
retval = sd_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
chip->card_fail |= SD_CARD;
chip->capacity[chip->card2lun[SD_CARD]] = 0;
chip->rw_need_retry = 1;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
retval = sd_switch_clock(chip);
if (retval != STATUS_SUCCESS) {
sd_set_err_code(chip, SD_IO_ERR);
- TRACE_GOTO(chip, RW_FAIL);
+ rtsx_trace(chip);
+ goto RW_FAIL;
}
if (sd_card->seq_mode &&
if (retval != STATUS_SUCCESS) {
chip->rw_need_retry = 1;
sd_set_err_code(chip, SD_STS_ERR);
- TRACE_GOTO(chip, RW_FAIL);
+ rtsx_trace(chip);
+ goto RW_FAIL;
}
sd_card->seq_mode = 0;
retval = rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
if (retval != STATUS_SUCCESS) {
sd_set_err_code(chip, SD_IO_ERR);
- TRACE_GOTO(chip, RW_FAIL);
+ rtsx_trace(chip);
+ goto RW_FAIL;
}
if ((sd_card->pre_sec_cnt < 0x80)
chip->rw_need_retry = 1;
sd_set_err_code(chip, SD_TO_ERR);
- TRACE_GOTO(chip, RW_FAIL);
+ rtsx_trace(chip);
+ goto RW_FAIL;
}
retval = wait_data_buf_ready(chip);
if (retval != STATUS_SUCCESS) {
chip->rw_need_retry = 1;
sd_set_err_code(chip, SD_TO_ERR);
- TRACE_GOTO(chip, RW_FAIL);
+ rtsx_trace(chip);
+ goto RW_FAIL;
}
retval = sd_send_cmd_get_rsp(chip, WRITE_MULTIPLE_BLOCK,
data_addr, SD_RSP_TYPE_R1, NULL, 0);
if (retval != STATUS_SUCCESS) {
chip->rw_need_retry = 1;
- TRACE_GOTO(chip, RW_FAIL);
+ rtsx_trace(chip);
+ goto RW_FAIL;
}
rtsx_init_cmd(chip);
if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
chip->rw_need_retry = 0;
dev_dbg(rtsx_dev(chip), "No card exist, exit sd_rw\n");
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
chip->rw_need_retry = 1;
SD_RSP_TYPE_R1b, NULL, 0);
if (retval != STATUS_SUCCESS) {
sd_set_err_code(chip, SD_STS_ERR);
- TRACE_GOTO(chip, RW_FAIL);
+ rtsx_trace(chip);
+ goto RW_FAIL;
}
if (stat & (SD_CRC7_ERR | SD_CRC16_ERR | SD_CRC_WRITE_ERR)) {
dev_dbg(rtsx_dev(chip), "SD CRC error, tune clock!\n");
sd_set_err_code(chip, SD_CRC_ERR);
- TRACE_GOTO(chip, RW_FAIL);
+ rtsx_trace(chip);
+ goto RW_FAIL;
}
if (err == STATUS_TIMEDOUT) {
sd_set_err_code(chip, SD_TO_ERR);
- TRACE_GOTO(chip, RW_FAIL);
+ rtsx_trace(chip);
+ goto RW_FAIL;
}
- TRACE_RET(chip, err);
+ rtsx_trace(chip);
+ return err;
}
sd_card->pre_sec_addr = start_sector;
if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
chip->rw_need_retry = 0;
dev_dbg(rtsx_dev(chip), "No card exist, exit sd_rw\n");
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (sd_check_err_code(chip, SD_CRC_ERR)) {
}
}
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
#ifdef SUPPORT_CPRM
}
int ext_sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx,
- u32 arg, u8 rsp_type, u8 *rsp, int rsp_len, int special_check)
+ u32 arg, u8 rsp_type, u8 *rsp, int rsp_len, bool special_check)
{
int retval;
int timeout = 100;
if (rsp_type & SD_WAIT_BUSY_END) {
retval = sd_check_data0_status(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, retval);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return retval;
+ }
} else {
sd_set_err_code(chip, SD_TO_ERR);
}
}
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (rsp_type == SD_RSP_TYPE_R0)
if ((ptr[0] & 0xC0) != 0) {
sd_set_err_code(chip, SD_STS_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (!(rsp_type & SD_NO_CHECK_CRC7)) {
if (ptr[stat_idx] & SD_CRC7_ERR) {
if (cmd_idx == WRITE_MULTIPLE_BLOCK) {
sd_set_err_code(chip, SD_CRC_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (rty_cnt < SD_MAX_RETRY_COUNT) {
wait_timeout(20);
goto RTY_SEND_CMD;
} else {
sd_set_err_code(chip, SD_CRC_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
}
if ((cmd_idx == SELECT_CARD) || (cmd_idx == APP_CMD) ||
(cmd_idx == SEND_STATUS) || (cmd_idx == STOP_TRANSMISSION)) {
- if ((cmd_idx != STOP_TRANSMISSION) && (special_check == 0)) {
- if (ptr[1] & 0x80)
- TRACE_RET(chip, STATUS_FAIL);
+ if ((cmd_idx != STOP_TRANSMISSION) && !special_check) {
+ if (ptr[1] & 0x80) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
#ifdef SUPPORT_SD_LOCK
if (ptr[1] & 0x7D)
if (ptr[1] & 0x7F)
#endif
{
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
+ if (ptr[2] & 0xF8) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
- if (ptr[2] & 0xF8)
- TRACE_RET(chip, STATUS_FAIL);
if (cmd_idx == SELECT_CARD) {
if (rsp_type == SD_RSP_TYPE_R2) {
- if ((ptr[3] & 0x1E) != 0x04)
- TRACE_RET(chip, STATUS_FAIL);
+ if ((ptr[3] & 0x1E) != 0x04) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else if (rsp_type == SD_RSP_TYPE_R0) {
- if ((ptr[3] & 0x1E) != 0x03)
- TRACE_RET(chip, STATUS_FAIL);
+ if ((ptr[3] & 0x1E) != 0x03) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
}
}
rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_CMD5, 0xFF, 0);
retval = rtsx_send_cmd(chip, SD_CARD, 100);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (rsp) {
int min_len = (rsp_len < len) ? rsp_len : len;
if (!(CHK_BIT(chip->lun_mc, lun))) {
SET_BIT(chip->lun_mc, lun);
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if ((0x53 != srb->cmnd[2]) || (0x44 != srb->cmnd[3]) ||
(0x61 != srb->cmnd[6]) || (0x72 != srb->cmnd[7]) ||
(0x64 != srb->cmnd[8])) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
switch (srb->cmnd[1] & 0x0F) {
default:
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
buf[5] = (1 == CHK_SD(sd_card)) ? 0x01 : 0x02;
unsigned int lun = SCSI_LUN(srb);
int retval, rsp_len;
u8 cmd_idx, rsp_type;
- u8 standby = 0, acmd = 0;
+ bool standby = false, acmd = false;
u32 arg;
if (!sd_card->sd_pass_thru_en) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
retval = sd_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
if (sd_card->pre_cmd_err) {
sd_card->pre_cmd_err = 0;
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
cmd_idx = srb->cmnd[2] & 0x3F;
if (srb->cmnd[1] & 0x02)
- standby = 1;
+ standby = true;
if (srb->cmnd[1] & 0x01)
- acmd = 1;
+ acmd = true;
arg = ((u32)srb->cmnd[3] << 24) | ((u32)srb->cmnd[4] << 16) |
((u32)srb->cmnd[5] << 8) | srb->cmnd[6];
retval = get_rsp_type(srb, &rsp_type, &rsp_len);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
sd_card->last_rsp_type = rsp_type;
retval = sd_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
#ifdef SUPPORT_SD_LOCK
if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) {
if (CHK_MMC_8BIT(sd_card)) {
retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03,
SD_BUS_WIDTH_8);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
} else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card)) {
retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03,
SD_BUS_WIDTH_4);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
}
}
#else
retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
#endif
if (standby) {
retval = sd_select_card(chip, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Cmd_Failed);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Cmd_Failed;
+ }
}
if (acmd) {
retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD,
sd_card->sd_addr,
- SD_RSP_TYPE_R1, NULL, 0, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Cmd_Failed);
+ SD_RSP_TYPE_R1, NULL, 0, false);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Cmd_Failed;
+ }
}
retval = ext_sd_send_cmd_get_rsp(chip, cmd_idx, arg, rsp_type,
- sd_card->rsp, rsp_len, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Cmd_Failed);
+ sd_card->rsp, rsp_len, false);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Cmd_Failed;
+ }
if (standby) {
retval = sd_select_card(chip, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Cmd_Failed);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Cmd_Failed;
+ }
}
#ifdef SUPPORT_SD_LOCK
retval = sd_update_lock_status(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Cmd_Failed);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Cmd_Failed;
+ }
#endif
scsi_set_resid(srb, 0);
if (!(chip->card_ready & SD_CARD))
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip)
struct sd_info *sd_card = &(chip->sd_card);
unsigned int lun = SCSI_LUN(srb);
int retval, rsp_len, i;
- int cmd13_checkbit = 0, read_err = 0;
+ bool read_err = false, cmd13_checkbit = false;
u8 cmd_idx, rsp_type, bus_width;
- u8 send_cmd12 = 0, standby = 0, acmd = 0;
+ bool standby = false, send_cmd12 = false, acmd = false;
u32 data_len;
if (!sd_card->sd_pass_thru_en) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (sd_card->pre_cmd_err) {
sd_card->pre_cmd_err = 0;
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
retval = sd_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
cmd_idx = srb->cmnd[2] & 0x3F;
if (srb->cmnd[1] & 0x04)
- send_cmd12 = 1;
+ send_cmd12 = true;
if (srb->cmnd[1] & 0x02)
- standby = 1;
+ standby = true;
if (srb->cmnd[1] & 0x01)
- acmd = 1;
+ acmd = true;
data_len = ((u32)srb->cmnd[7] << 16) | ((u32)srb->cmnd[8]
<< 8) | srb->cmnd[9];
retval = get_rsp_type(srb, &rsp_type, &rsp_len);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
sd_card->last_rsp_type = rsp_type;
retval = sd_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
#ifdef SUPPORT_SD_LOCK
if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) {
if (data_len < 512) {
retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, data_len,
- SD_RSP_TYPE_R1, NULL, 0, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
+ SD_RSP_TYPE_R1, NULL, 0, false);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Read_Cmd_Failed;
+ }
}
if (standby) {
retval = sd_select_card(chip, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Read_Cmd_Failed;
+ }
}
if (acmd) {
retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD,
sd_card->sd_addr,
- SD_RSP_TYPE_R1, NULL, 0, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
+ SD_RSP_TYPE_R1, NULL, 0, false);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Read_Cmd_Failed;
+ }
}
if (data_len <= 512) {
cmd[4] = srb->cmnd[6];
buf = kmalloc(data_len, GFP_KERNEL);
- if (buf == NULL)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (buf == NULL) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, byte_cnt,
blk_cnt, bus_width, buf, data_len, 2000);
if (retval != STATUS_SUCCESS) {
- read_err = 1;
+ read_err = true;
kfree(buf);
rtsx_clear_sd_error(chip);
- TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
+ rtsx_trace(chip);
+ goto SD_Execute_Read_Cmd_Failed;
}
min_len = min(data_len, scsi_bufflen(srb));
scsi_bufflen(srb), scsi_sg_count(srb),
DMA_FROM_DEVICE, 10000);
if (retval < 0) {
- read_err = 1;
+ read_err = true;
rtsx_clear_sd_error(chip);
- TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
+ rtsx_trace(chip);
+ goto SD_Execute_Read_Cmd_Failed;
}
} else {
- TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
+ rtsx_trace(chip);
+ goto SD_Execute_Read_Cmd_Failed;
}
retval = ext_sd_get_rsp(chip, rsp_len, sd_card->rsp, rsp_type);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Read_Cmd_Failed;
+ }
if (standby) {
retval = sd_select_card(chip, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Read_Cmd_Failed;
+ }
}
if (send_cmd12) {
retval = ext_sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION,
- 0, SD_RSP_TYPE_R1b, NULL, 0, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
+ 0, SD_RSP_TYPE_R1b, NULL, 0, false);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Read_Cmd_Failed;
+ }
}
if (data_len < 512) {
retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200,
- SD_RSP_TYPE_R1, NULL, 0, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
+ SD_RSP_TYPE_R1, NULL, 0, false);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Read_Cmd_Failed;
+ }
retval = rtsx_write_register(chip, SD_BYTE_CNT_H, 0xFF, 0x02);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Read_Cmd_Failed;
+ }
retval = rtsx_write_register(chip, SD_BYTE_CNT_L, 0xFF, 0x00);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Read_Cmd_Failed;
+ }
}
if ((srb->cmnd[1] & 0x02) || (srb->cmnd[1] & 0x04))
- cmd13_checkbit = 1;
+ cmd13_checkbit = true;
for (i = 0; i < 3; i++) {
retval = ext_sd_send_cmd_get_rsp(chip, SEND_STATUS,
if (retval == STATUS_SUCCESS)
break;
}
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Read_Cmd_Failed;
+ }
scsi_set_resid(srb, 0);
return TRANSPORT_GOOD;
if (!(chip->card_ready & SD_CARD))
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip)
struct sd_info *sd_card = &(chip->sd_card);
unsigned int lun = SCSI_LUN(srb);
int retval, rsp_len, i;
- int cmd13_checkbit = 0, write_err = 0;
+ bool write_err = false, cmd13_checkbit = false;
u8 cmd_idx, rsp_type;
- u8 send_cmd12 = 0, standby = 0, acmd = 0;
+ bool standby = false, send_cmd12 = false, acmd = false;
u32 data_len, arg;
#ifdef SUPPORT_SD_LOCK
int lock_cmd_fail = 0;
if (!sd_card->sd_pass_thru_en) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (sd_card->pre_cmd_err) {
sd_card->pre_cmd_err = 0;
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
retval = sd_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
cmd_idx = srb->cmnd[2] & 0x3F;
if (srb->cmnd[1] & 0x04)
- send_cmd12 = 1;
+ send_cmd12 = true;
if (srb->cmnd[1] & 0x02)
- standby = 1;
+ standby = true;
if (srb->cmnd[1] & 0x01)
- acmd = 1;
+ acmd = true;
data_len = ((u32)srb->cmnd[7] << 16) | ((u32)srb->cmnd[8]
<< 8) | srb->cmnd[9];
retval = get_rsp_type(srb, &rsp_type, &rsp_len);
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
sd_card->last_rsp_type = rsp_type;
retval = sd_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
#ifdef SUPPORT_SD_LOCK
if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) {
if (CHK_MMC_8BIT(sd_card)) {
retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03,
SD_BUS_WIDTH_8);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
} else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card)) {
retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03,
SD_BUS_WIDTH_4);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
}
}
#else
retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, TRANSPORT_FAILED);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
+ }
#endif
if (data_len < 512) {
retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, data_len,
- SD_RSP_TYPE_R1, NULL, 0, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
+ SD_RSP_TYPE_R1, NULL, 0, false);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Write_Cmd_Failed;
+ }
}
if (standby) {
retval = sd_select_card(chip, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Write_Cmd_Failed;
+ }
}
if (acmd) {
retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD,
sd_card->sd_addr,
- SD_RSP_TYPE_R1, NULL, 0, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
+ SD_RSP_TYPE_R1, NULL, 0, false);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Write_Cmd_Failed;
+ }
}
retval = ext_sd_send_cmd_get_rsp(chip, cmd_idx, arg, rsp_type,
- sd_card->rsp, rsp_len, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
+ sd_card->rsp, rsp_len, false);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Write_Cmd_Failed;
+ }
if (data_len <= 512) {
u16 i;
u8 *buf;
buf = kmalloc(data_len, GFP_KERNEL);
- if (buf == NULL)
- TRACE_RET(chip, TRANSPORT_ERROR);
+ if (buf == NULL) {
+ rtsx_trace(chip);
+ return TRANSPORT_ERROR;
+ }
rtsx_stor_get_xfer_buf(buf, data_len, srb);
retval = rtsx_send_cmd(chip, 0, 250);
if (retval != STATUS_SUCCESS) {
kfree(buf);
- TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
+ rtsx_trace(chip);
+ goto SD_Execute_Write_Cmd_Failed;
}
rtsx_init_cmd(chip);
retval = rtsx_send_cmd(chip, 0, 250);
if (retval != STATUS_SUCCESS) {
kfree(buf);
- TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
+ rtsx_trace(chip);
+ goto SD_Execute_Write_Cmd_Failed;
}
} else {
rtsx_init_cmd(chip);
retval = rtsx_send_cmd(chip, 0, 250);
if (retval != STATUS_SUCCESS) {
kfree(buf);
- TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
+ rtsx_trace(chip);
+ goto SD_Execute_Write_Cmd_Failed;
}
}
DMA_TO_DEVICE, 10000);
} else {
- TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
+ rtsx_trace(chip);
+ goto SD_Execute_Write_Cmd_Failed;
}
if (retval < 0) {
- write_err = 1;
+ write_err = true;
rtsx_clear_sd_error(chip);
- TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
+ rtsx_trace(chip);
+ goto SD_Execute_Write_Cmd_Failed;
}
#ifdef SUPPORT_SD_LOCK
if (standby) {
retval = sd_select_card(chip, 1);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Write_Cmd_Failed;
+ }
}
if (send_cmd12) {
retval = ext_sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION,
- 0, SD_RSP_TYPE_R1b, NULL, 0, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
+ 0, SD_RSP_TYPE_R1b, NULL, 0, false);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Write_Cmd_Failed;
+ }
}
if (data_len < 512) {
retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200,
- SD_RSP_TYPE_R1, NULL, 0, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
+ SD_RSP_TYPE_R1, NULL, 0, false);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Write_Cmd_Failed;
+ }
retval = rtsx_write_register(chip, SD_BYTE_CNT_H, 0xFF, 0x02);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Write_Cmd_Failed;
+ }
rtsx_write_register(chip, SD_BYTE_CNT_L, 0xFF, 0x00);
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Write_Cmd_Failed;
+ }
}
if ((srb->cmnd[1] & 0x02) || (srb->cmnd[1] & 0x04))
- cmd13_checkbit = 1;
+ cmd13_checkbit = true;
for (i = 0; i < 3; i++) {
retval = ext_sd_send_cmd_get_rsp(chip, SEND_STATUS,
if (retval == STATUS_SUCCESS)
break;
}
- if (retval != STATUS_SUCCESS)
- TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ goto SD_Execute_Write_Cmd_Failed;
+ }
#ifdef SUPPORT_SD_LOCK
if (cmd_idx == LOCK_UNLOCK) {
retval = reset_sd(chip);
if (retval != STATUS_SUCCESS) {
sd_card->sd_lock_status &= ~(SD_UNLOCK_POW_ON | SD_SDR_RST);
- TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
+ rtsx_trace(chip);
+ goto SD_Execute_Write_Cmd_Failed;
}
}
if (lock_cmd_fail) {
scsi_set_resid(srb, 0);
set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
#endif /* SUPPORT_SD_LOCK */
if (!(chip->card_ready & SD_CARD))
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
int sd_get_cmd_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
if (!sd_card->sd_pass_thru_en) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (sd_card->pre_cmd_err) {
sd_card->pre_cmd_err = 0;
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
data_len = ((u16)srb->cmnd[7] << 8) | srb->cmnd[8];
if (sd_card->last_rsp_type == SD_RSP_TYPE_R0) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
} else if (sd_card->last_rsp_type == SD_RSP_TYPE_R2) {
count = (data_len < 17) ? data_len : 17;
} else {
if (!sd_card->sd_pass_thru_en) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if (sd_card->pre_cmd_err) {
sd_card->pre_cmd_err = 0;
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
if ((0x53 != srb->cmnd[2]) || (0x44 != srb->cmnd[3]) ||
(0x61 != srb->cmnd[6]) || (0x72 != srb->cmnd[7]) ||
(0x64 != srb->cmnd[8])) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
switch (srb->cmnd[1] & 0x0F) {
#endif
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
sd_card->pre_cmd_err = 1;
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
#ifdef SUPPORT_SD_LOCK
sd_card->sd_lock_status &= ~SD_SDR_RST;
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
sd_card->pre_cmd_err = 1;
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
break;
default:
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
- TRACE_RET(chip, TRANSPORT_FAILED);
+ rtsx_trace(chip);
+ return TRANSPORT_FAILED;
}
scsi_set_resid(srb, 0);
int retval;
retval = disable_card_clock(chip, SD_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_WRITE_REG(chip, CARD_OE, SD_OUTPUT_EN, 0);
+ retval = rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (!chip->ft2_fast_mode) {
retval = card_power_off(chip, SD_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
wait_timeout(50);
}
if (chip->asic_code) {
retval = sd_pull_ctl_disable(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else {
- RTSX_WRITE_REG(chip, FPGA_PULL_CTL,
- FPGA_SD_PULL_CTL_BIT | 0x20, FPGA_SD_PULL_CTL_BIT);
+ retval = rtsx_write_register(chip, FPGA_PULL_CTL,
+ FPGA_SD_PULL_CTL_BIT | 0x20,
+ FPGA_SD_PULL_CTL_BIT);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
return STATUS_SUCCESS;
memset(sd_card->raw_scr, 0, 8);
retval = sd_power_off_card3v3(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
#ifdef SUPPORT_CPRM
int soft_reset_sd_card(struct rtsx_chip *chip);
int ext_sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx,
- u32 arg, u8 rsp_type, u8 *rsp, int rsp_len, int special_check);
+ u32 arg, u8 rsp_type, u8 *rsp, int rsp_len, bool special_check);
int ext_sd_get_rsp(struct rtsx_chip *chip, int len, u8 *rsp, u8 rsp_type);
int sd_pass_thru_mode(struct scsi_cmnd *srb, struct rtsx_chip *chip);
#include <linux/sched.h>
#include "rtsx.h"
-#include "rtsx_transport.h"
-#include "rtsx_scsi.h"
-#include "rtsx_card.h"
#include "spi.h"
static inline void spi_set_err_code(struct rtsx_chip *chip, u8 err_code)
static int spi_init(struct rtsx_chip *chip)
{
- RTSX_WRITE_REG(chip, SPI_CONTROL, 0xFF,
- CS_POLARITY_LOW | DTO_MSB_FIRST | SPI_MASTER | SPI_MODE0 |
- SPI_AUTO);
- RTSX_WRITE_REG(chip, SPI_TCTL, EDO_TIMING_MASK, SAMPLE_DELAY_HALF);
+ int retval;
+
+ retval = rtsx_write_register(chip, SPI_CONTROL, 0xFF,
+ CS_POLARITY_LOW | DTO_MSB_FIRST | SPI_MASTER | SPI_MODE0 | SPI_AUTO);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, SPI_TCTL, EDO_TIMING_MASK,
+ SAMPLE_DELAY_HALF);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
return STATUS_SUCCESS;
}
struct spi_info *spi = &(chip->spi);
int retval;
- RTSX_WRITE_REG(chip, SPI_CLK_DIVIDER1, 0xFF, (u8)(spi->clk_div >> 8));
- RTSX_WRITE_REG(chip, SPI_CLK_DIVIDER0, 0xFF, (u8)(spi->clk_div));
+ retval = rtsx_write_register(chip, SPI_CLK_DIVIDER1, 0xFF,
+ (u8)(spi->clk_div >> 8));
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, SPI_CLK_DIVIDER0, 0xFF,
+ (u8)(spi->clk_div));
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
retval = switch_clock(chip, spi->spi_clock);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = select_card(chip, SPI_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_WRITE_REG(chip, CARD_CLK_EN, SPI_CLK_EN, SPI_CLK_EN);
- RTSX_WRITE_REG(chip, CARD_OE, SPI_OUTPUT_EN, SPI_OUTPUT_EN);
+ retval = rtsx_write_register(chip, CARD_CLK_EN, SPI_CLK_EN,
+ SPI_CLK_EN);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_OE, SPI_OUTPUT_EN,
+ SPI_OUTPUT_EN);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
wait_timeout(10);
retval = spi_init(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
if (retval < 0) {
rtsx_clear_spi_error(chip);
spi_set_err_code(chip, SPI_BUSY_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
if (retval < 0) {
rtsx_clear_spi_error(chip);
spi_set_err_code(chip, SPI_HW_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
if (retval < 0) {
rtsx_clear_spi_error(chip);
spi_set_err_code(chip, SPI_HW_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
if (retval < 0) {
rtsx_clear_spi_error(chip);
spi_set_err_code(chip, SPI_HW_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
else
clk = CLK_30;
- RTSX_WRITE_REG(chip, SPI_CLK_DIVIDER1, 0xFF, 0x00);
- RTSX_WRITE_REG(chip, SPI_CLK_DIVIDER0, 0xFF, 0x27);
+ retval = rtsx_write_register(chip, SPI_CLK_DIVIDER1, 0xFF, 0x00);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, SPI_CLK_DIVIDER0, 0xFF, 0x27);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
retval = switch_clock(chip, clk);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = select_card(chip, SPI_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_WRITE_REG(chip, CARD_CLK_EN, SPI_CLK_EN, SPI_CLK_EN);
- RTSX_WRITE_REG(chip, CARD_OE, SPI_OUTPUT_EN, SPI_OUTPUT_EN);
+ retval = rtsx_write_register(chip, CARD_CLK_EN, SPI_CLK_EN,
+ SPI_CLK_EN);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_OE, SPI_OUTPUT_EN,
+ SPI_OUTPUT_EN);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
wait_timeout(10);
- RTSX_WRITE_REG(chip, SPI_CONTROL, 0xFF,
- CS_POLARITY_HIGH | SPI_EEPROM_AUTO);
- RTSX_WRITE_REG(chip, SPI_TCTL, EDO_TIMING_MASK, SAMPLE_DELAY_HALF);
+ retval = rtsx_write_register(chip, SPI_CONTROL, 0xFF,
+ CS_POLARITY_HIGH | SPI_EEPROM_AUTO);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, SPI_TCTL, EDO_TIMING_MASK,
+ SAMPLE_DELAY_HALF);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
return STATUS_SUCCESS;
}
SPI_TRANSFER0_END);
retval = rtsx_send_cmd(chip, 0, 100);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
int retval;
retval = spi_init_eeprom(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = spi_eeprom_program_enable(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
rtsx_init_cmd(chip);
SPI_TRANSFER0_END);
retval = rtsx_send_cmd(chip, 0, 100);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_WRITE_REG(chip, CARD_GPIO_DIR, 0x01, 0x01);
+ retval = rtsx_write_register(chip, CARD_GPIO_DIR, 0x01, 0x01);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
return STATUS_SUCCESS;
}
int retval;
retval = spi_init_eeprom(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = spi_eeprom_program_enable(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
rtsx_init_cmd(chip);
SPI_TRANSFER0_END);
retval = rtsx_send_cmd(chip, 0, 100);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_WRITE_REG(chip, CARD_GPIO_DIR, 0x01, 0x01);
+ retval = rtsx_write_register(chip, CARD_GPIO_DIR, 0x01, 0x01);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
return STATUS_SUCCESS;
}
u8 data;
retval = spi_init_eeprom(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
rtsx_init_cmd(chip);
SPI_TRANSFER0_END);
retval = rtsx_send_cmd(chip, 0, 100);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
wait_timeout(5);
- RTSX_READ_REG(chip, SPI_DATA, &data);
+ retval = rtsx_read_register(chip, SPI_DATA, &data);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (val)
*val = data;
- RTSX_WRITE_REG(chip, CARD_GPIO_DIR, 0x01, 0x01);
+ retval = rtsx_write_register(chip, CARD_GPIO_DIR, 0x01, 0x01);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
return STATUS_SUCCESS;
}
int retval;
retval = spi_init_eeprom(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = spi_eeprom_program_enable(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
rtsx_init_cmd(chip);
SPI_TRANSFER0_END);
retval = rtsx_send_cmd(chip, 0, 100);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_WRITE_REG(chip, CARD_GPIO_DIR, 0x01, 0x01);
+ retval = rtsx_write_register(chip, CARD_GPIO_DIR, 0x01, 0x01);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
return STATUS_SUCCESS;
}
len = ((u16)(srb->cmnd[7]) << 8) | srb->cmnd[8];
if (len > 512) {
spi_set_err_code(chip, SPI_INVALID_COMMAND);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = spi_set_init_para(chip);
if (retval != STATUS_SUCCESS) {
spi_set_err_code(chip, SPI_HW_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
rtsx_init_cmd(chip);
if (retval < 0) {
rtsx_clear_spi_error(chip);
spi_set_err_code(chip, SPI_HW_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (len) {
buf = kmalloc(len, GFP_KERNEL);
- if (!buf)
- TRACE_RET(chip, STATUS_ERROR);
+ if (!buf) {
+ rtsx_trace(chip);
+ return STATUS_ERROR;
+ }
retval = rtsx_read_ppbuf(chip, buf, len);
if (retval != STATUS_SUCCESS) {
spi_set_err_code(chip, SPI_READ_ERR);
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
rtsx_stor_set_xfer_buf(buf, scsi_bufflen(srb), srb);
retval = spi_set_init_para(chip);
if (retval != STATUS_SUCCESS) {
spi_set_err_code(chip, SPI_HW_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
buf = kmalloc(SF_PAGE_LEN, GFP_KERNEL);
- if (buf == NULL)
- TRACE_RET(chip, STATUS_ERROR);
+ if (buf == NULL) {
+ rtsx_trace(chip);
+ return STATUS_ERROR;
+ }
while (len) {
u16 pagelen = SF_PAGE_LEN - (u8)addr;
kfree(buf);
rtsx_clear_spi_error(chip);
spi_set_err_code(chip, SPI_HW_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
rtsx_stor_access_xfer_buf(buf, pagelen, srb, &index, &offset,
retval = spi_set_init_para(chip);
if (retval != STATUS_SUCCESS) {
spi_set_err_code(chip, SPI_HW_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (program_mode == BYTE_PROGRAM) {
buf = kmalloc(4, GFP_KERNEL);
- if (!buf)
- TRACE_RET(chip, STATUS_ERROR);
+ if (!buf) {
+ rtsx_trace(chip);
+ return STATUS_ERROR;
+ }
while (len) {
retval = sf_enable_write(chip, SPI_WREN);
if (retval != STATUS_SUCCESS) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
rtsx_stor_access_xfer_buf(buf, 1, srb, &index, &offset,
kfree(buf);
rtsx_clear_spi_error(chip);
spi_set_err_code(chip, SPI_HW_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = sf_polling_status(chip, 100);
if (retval != STATUS_SUCCESS) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
addr++;
int first_byte = 1;
retval = sf_enable_write(chip, SPI_WREN);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
buf = kmalloc(4, GFP_KERNEL);
- if (!buf)
- TRACE_RET(chip, STATUS_ERROR);
+ if (!buf) {
+ rtsx_trace(chip);
+ return STATUS_ERROR;
+ }
while (len) {
rtsx_stor_access_xfer_buf(buf, 1, srb, &index, &offset,
kfree(buf);
rtsx_clear_spi_error(chip);
spi_set_err_code(chip, SPI_HW_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = sf_polling_status(chip, 100);
if (retval != STATUS_SUCCESS) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
len--;
kfree(buf);
retval = sf_disable_write(chip, SPI_WRDI);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = sf_polling_status(chip, 100);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else if (program_mode == PAGE_PROGRAM) {
buf = kmalloc(SF_PAGE_LEN, GFP_KERNEL);
- if (!buf)
- TRACE_RET(chip, STATUS_NOMEM);
+ if (!buf) {
+ rtsx_trace(chip);
+ return STATUS_NOMEM;
+ }
while (len) {
u16 pagelen = SF_PAGE_LEN - (u8)addr;
retval = sf_enable_write(chip, SPI_WREN);
if (retval != STATUS_SUCCESS) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
rtsx_init_cmd(chip);
kfree(buf);
rtsx_clear_spi_error(chip);
spi_set_err_code(chip, SPI_HW_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = sf_polling_status(chip, 100);
if (retval != STATUS_SUCCESS) {
kfree(buf);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
addr += pagelen;
kfree(buf);
} else {
spi_set_err_code(chip, SPI_INVALID_COMMAND);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
retval = spi_set_init_para(chip);
if (retval != STATUS_SUCCESS) {
spi_set_err_code(chip, SPI_HW_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (erase_mode == PAGE_ERASE) {
retval = sf_enable_write(chip, SPI_WREN);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = sf_erase(chip, ins, 1, addr);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else if (erase_mode == CHIP_ERASE) {
retval = sf_enable_write(chip, SPI_WREN);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = sf_erase(chip, ins, 0, 0);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else {
spi_set_err_code(chip, SPI_INVALID_COMMAND);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
retval = spi_set_init_para(chip);
if (retval != STATUS_SUCCESS) {
spi_set_err_code(chip, SPI_HW_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = sf_enable_write(chip, ewsr);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
rtsx_init_cmd(chip);
if (retval != STATUS_SUCCESS) {
rtsx_clear_spi_error(chip);
spi_set_err_code(chip, SPI_HW_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
--- /dev/null
+#include <linux/kernel.h>
+#include <linux/string.h>
+
+#include "rtsx.h"
+
+#ifdef _MSG_TRACE
+
+void _rtsx_trace(struct rtsx_chip *chip, const char *file, const char *func,
+ int line)
+{
+ struct trace_msg_t *msg = &chip->trace_msg[chip->msg_idx];
+
+ file = kbasename(file);
+ dev_dbg(rtsx_dev(chip), "[%s][%s]:[%d]\n", file, func, line);
+
+ strncpy(msg->file, file, MSG_FILE_LEN - 1);
+ strncpy(msg->func, func, MSG_FUNC_LEN - 1);
+ msg->line = (u16)line;
+ get_current_time(msg->timeval_buf, TIME_VAL_LEN);
+ msg->valid = 1;
+
+ chip->msg_idx++;
+ if (chip->msg_idx >= TRACE_ITEM_CNT)
+ chip->msg_idx = 0;
+}
+#endif
#ifndef __REALTEK_RTSX_TRACE_H
#define __REALTEK_RTSX_TRACE_H
-#define _MSG_TRACE
+struct rtsx_chip;
#ifdef _MSG_TRACE
-static inline char *filename(char *path)
+void _rtsx_trace(struct rtsx_chip *chip, const char *file, const char *func,
+ int line);
+#define rtsx_trace(chip) \
+ _rtsx_trace(chip, __FILE__, __func__, __LINE__)
+#else
+static inline void rtsx_trace(struct rtsx_chip *chip)
{
- char *ptr;
-
- if (path == NULL)
- return NULL;
-
- ptr = path;
-
- while (*ptr != '\0') {
- if ((*ptr == '\\') || (*ptr == '/'))
- path = ptr + 1;
-
- ptr++;
- }
-
- return path;
}
-
-#define TRACE_RET(chip, ret) \
- do { \
- char *_file = filename(__FILE__); \
- dev_dbg(rtsx_dev(chip), "[%s][%s]:[%d]\n", _file, \
- __func__, __LINE__); \
- (chip)->trace_msg[(chip)->msg_idx].line = (u16)(__LINE__); \
- strncpy((chip)->trace_msg[(chip)->msg_idx].func, __func__, MSG_FUNC_LEN-1); \
- strncpy((chip)->trace_msg[(chip)->msg_idx].file, _file, MSG_FILE_LEN-1); \
- get_current_time((chip)->trace_msg[(chip)->msg_idx].timeval_buf, TIME_VAL_LEN); \
- (chip)->trace_msg[(chip)->msg_idx].valid = 1; \
- (chip)->msg_idx++; \
- if ((chip)->msg_idx >= TRACE_ITEM_CNT) { \
- (chip)->msg_idx = 0; \
- } \
- return ret; \
- } while (0)
-
-#define TRACE_GOTO(chip, label) \
- do { \
- char *_file = filename(__FILE__); \
- dev_dbg(rtsx_dev(chip), "[%s][%s]:[%d]\n", _file, \
- __func__, __LINE__); \
- (chip)->trace_msg[(chip)->msg_idx].line = (u16)(__LINE__); \
- strncpy((chip)->trace_msg[(chip)->msg_idx].func, __func__, MSG_FUNC_LEN-1); \
- strncpy((chip)->trace_msg[(chip)->msg_idx].file, _file, MSG_FILE_LEN-1); \
- get_current_time((chip)->trace_msg[(chip)->msg_idx].timeval_buf, TIME_VAL_LEN); \
- (chip)->trace_msg[(chip)->msg_idx].valid = 1; \
- (chip)->msg_idx++; \
- if ((chip)->msg_idx >= TRACE_ITEM_CNT) { \
- (chip)->msg_idx = 0; \
- } \
- goto label; \
- } while (0)
-#else
-#define TRACE_RET(chip, ret) return ret
-#define TRACE_GOTO(chip, label) goto label
#endif
#endif /* __REALTEK_RTSX_TRACE_H */
xd_card->xd_clock = CLK_50;
retval = switch_clock(chip, xd_card->xd_clock);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
int retval;
retval = select_card(chip, XD_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = switch_clock(chip, xd_card->xd_clock);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
rtsx_add_cmd(chip, READ_REG_CMD, (u16)(XD_ADDRESS1 + i), 0, 0);
retval = rtsx_send_cmd(chip, XD_CARD, 20);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ptr = rtsx_get_cmd_data(chip) + 1;
if (id_buf && buf_len) {
rtsx_add_cmd(chip, READ_REG_CMD, XD_PARITY, 0, 0);
retval = rtsx_send_cmd(chip, XD_CARD, 500);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (buf && buf_len) {
u8 *ptr = rtsx_get_cmd_data(chip) + 1;
{
int retval, i;
- if (!buf || (buf_len < 0))
- TRACE_RET(chip, STATUS_FAIL);
+ if (!buf || (buf_len < 0)) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
rtsx_init_cmd(chip);
retval = rtsx_send_cmd(chip, 0, 250);
if (retval < 0) {
rtsx_clear_xd_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
memcpy(buf, rtsx_get_cmd_data(chip), buf_len);
int retval;
u8 reg;
- if (!buf || (buf_len < 10))
- TRACE_RET(chip, STATUS_FAIL);
+ if (!buf || (buf_len < 10)) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
rtsx_init_cmd(chip);
retval = rtsx_send_cmd(chip, XD_CARD, 250);
if (retval == -ETIMEDOUT) {
rtsx_clear_xd_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
- RTSX_READ_REG(chip, XD_PAGE_STATUS, ®);
+ retval = rtsx_read_register(chip, XD_PAGE_STATUS, ®);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (reg != XD_GPG) {
rtsx_clear_xd_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
- RTSX_READ_REG(chip, XD_CTL, ®);
+ retval = rtsx_read_register(chip, XD_CTL, ®);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (!(reg & XD_ECC1_ERROR) || !(reg & XD_ECC1_UNCORRECTABLE)) {
retval = xd_read_data_from_ppb(chip, 0, buf, buf_len);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (reg & XD_ECC1_ERROR) {
u8 ecc_bit, ecc_byte;
- RTSX_READ_REG(chip, XD_ECC_BIT1, &ecc_bit);
- RTSX_READ_REG(chip, XD_ECC_BYTE1, &ecc_byte);
+ retval = rtsx_read_register(chip, XD_ECC_BIT1,
+ &ecc_bit);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_read_register(chip, XD_ECC_BYTE1,
+ &ecc_byte);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
dev_dbg(rtsx_dev(chip), "ECC_BIT1 = 0x%x, ECC_BYTE1 = 0x%x\n",
ecc_bit, ecc_byte);
rtsx_clear_xd_error(chip);
retval = xd_read_data_from_ppb(chip, 256, buf, buf_len);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (reg & XD_ECC2_ERROR) {
u8 ecc_bit, ecc_byte;
- RTSX_READ_REG(chip, XD_ECC_BIT2, &ecc_bit);
- RTSX_READ_REG(chip, XD_ECC_BYTE2, &ecc_byte);
+ retval = rtsx_read_register(chip, XD_ECC_BIT2,
+ &ecc_bit);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_read_register(chip, XD_ECC_BYTE2,
+ &ecc_byte);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
dev_dbg(rtsx_dev(chip), "ECC_BIT2 = 0x%x, ECC_BYTE2 = 0x%x\n",
ecc_bit, ecc_byte);
}
} else {
rtsx_clear_xd_error(chip);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
static int xd_pull_ctl_disable(struct rtsx_chip *chip)
{
+ int retval;
+
if (CHECK_PID(chip, 0x5208)) {
- RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF,
- XD_D3_PD | XD_D2_PD | XD_D1_PD | XD_D0_PD);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF,
- XD_D7_PD | XD_D6_PD | XD_D5_PD | XD_D4_PD);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF,
- XD_WP_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF,
- XD_RDY_PD | XD_WE_PD | XD_RE_PD | XD_ALE_PD);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF,
- MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL6, 0xFF, MS_D5_PD | MS_D4_PD);
+ retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,
+ XD_D3_PD | XD_D2_PD | XD_D1_PD | XD_D0_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,
+ XD_D7_PD | XD_D6_PD | XD_D5_PD | XD_D4_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,
+ XD_WP_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,
+ XD_RDY_PD | XD_WE_PD | XD_RE_PD | XD_ALE_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,
+ MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF,
+ MS_D5_PD | MS_D4_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
} else if (CHECK_PID(chip, 0x5288)) {
if (CHECK_BARO_PKG(chip, QFN)) {
- RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF, 0x55);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF, 0x55);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF, 0x4B);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF, 0x69);
+ retval = rtsx_write_register(chip, CARD_PULL_CTL1,
+ 0xFF, 0x55);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL2,
+ 0xFF, 0x55);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL3,
+ 0xFF, 0x4B);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL4,
+ 0xFF, 0x69);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
}
u8 *ptr, id_buf[4], redunt[11];
retval = select_card(chip, XD_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
rtsx_init_cmd(chip);
rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_OE, XD_OUTPUT_EN, 0);
retval = rtsx_send_cmd(chip, XD_CARD, 100);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (!chip->ft2_fast_mode) {
retval = card_power_off(chip, XD_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
wait_timeout(250);
}
retval = rtsx_send_cmd(chip, XD_CARD, 100);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = card_power_on(chip, XD_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
#ifdef SUPPORT_OCP
wait_timeout(50);
if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) {
dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
chip->ocp_stat);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
#endif
}
rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CTL, XD_CE_DISEN, XD_CE_DISEN);
retval = rtsx_send_cmd(chip, XD_CARD, 100);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (!chip->ft2_fast_mode)
wait_timeout(200);
retval = xd_set_init_para(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
/* Read ID to check if the timing setting is right */
for (i = 0; i < 4; i++) {
rtsx_add_cmd(chip, READ_REG_CMD, XD_CTL, 0, 0);
retval = rtsx_send_cmd(chip, XD_CARD, 100);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ptr = rtsx_get_cmd_data(chip) + 1;
continue;
retval = xd_read_id(chip, READ_ID, id_buf, 4);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
dev_dbg(rtsx_dev(chip), "READ_ID: 0x%x 0x%x 0x%x 0x%x\n",
id_buf[0], id_buf[1], id_buf[2], id_buf[3]);
/* Confirm timing setting */
for (j = 0; j < 10; j++) {
retval = xd_read_id(chip, READ_ID, id_buf, 4);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (id_buf[1] != xd_card->device_code)
break;
xd_card->addr_cycle = 0;
xd_card->capacity = 0;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = xd_read_id(chip, READ_xD_ID, id_buf, 4);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
dev_dbg(rtsx_dev(chip), "READ_xD_ID: 0x%x 0x%x 0x%x 0x%x\n",
id_buf[0], id_buf[1], id_buf[2], id_buf[3]);
- if (id_buf[2] != XD_ID_CODE)
- TRACE_RET(chip, STATUS_FAIL);
+ if (id_buf[2] != XD_ID_CODE) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
/* Search CIS block */
for (i = 0; i < 24; i++) {
u32 page_addr;
- if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
page_addr = (u32)i << xd_card->block_shift;
page_addr += j;
retval = xd_read_cis(chip, page_addr, buf, 10);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if ((buf[0] == 0x01) && (buf[1] == 0x03) &&
(buf[2] == 0xD9)
}
dev_dbg(rtsx_dev(chip), "CIS block: 0x%x\n", xd_card->cis_block);
- if (xd_card->cis_block == 0xFFFF)
- TRACE_RET(chip, STATUS_FAIL);
+ if (xd_card->cis_block == 0xFFFF) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
chip->capacity[chip->card2lun[XD_CARD]] = xd_card->capacity;
dev_dbg(rtsx_dev(chip), "xd_init_l2p_tbl: zone_cnt = %d\n",
xd_card->zone_cnt);
- if (xd_card->zone_cnt < 1)
- TRACE_RET(chip, STATUS_FAIL);
+ if (xd_card->zone_cnt < 1) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
size = xd_card->zone_cnt * sizeof(struct zone_entry);
dev_dbg(rtsx_dev(chip), "Buffer size for l2p table is %d\n", size);
xd_card->zone = vmalloc(size);
- if (!xd_card->zone)
- TRACE_RET(chip, STATUS_ERROR);
+ if (!xd_card->zone) {
+ rtsx_trace(chip);
+ return STATUS_ERROR;
+ }
for (i = 0; i < xd_card->zone_cnt; i++) {
xd_card->zone[i].build_flag = 0;
xd_card->delay_write.delay_write_flag = 0;
retval = enable_card_clock(chip, XD_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = reset_xd(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
retval = xd_init_l2p_tbl(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
dev_dbg(rtsx_dev(chip), "mark block 0x%x as bad block\n", phy_blk);
- if (phy_blk == BLK_NOT_FOUND)
- TRACE_RET(chip, STATUS_FAIL);
+ if (phy_blk == BLK_NOT_FOUND) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
rtsx_init_cmd(chip);
xd_set_err_code(chip, XD_PRG_ERROR);
else
xd_set_err_code(chip, XD_TO_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
dev_dbg(rtsx_dev(chip), "Init block 0x%x\n", phy_blk);
- if (start_page > end_page)
- TRACE_RET(chip, STATUS_FAIL);
- if (phy_blk == BLK_NOT_FOUND)
- TRACE_RET(chip, STATUS_FAIL);
+ if (start_page > end_page) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
+ if (phy_blk == BLK_NOT_FOUND) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
rtsx_init_cmd(chip);
} else {
xd_set_err_code(chip, XD_TO_ERROR);
}
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
dev_dbg(rtsx_dev(chip), "Copy page from block 0x%x to block 0x%x\n",
old_blk, new_blk);
- if (start_page > end_page)
- TRACE_RET(chip, STATUS_FAIL);
+ if (start_page > end_page) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- if ((old_blk == BLK_NOT_FOUND) || (new_blk == BLK_NOT_FOUND))
- TRACE_RET(chip, STATUS_FAIL);
+ if ((old_blk == BLK_NOT_FOUND) || (new_blk == BLK_NOT_FOUND)) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
old_page = (old_blk << xd_card->block_shift) + start_page;
new_page = (new_blk << xd_card->block_shift) + start_page;
XD_CLR_BAD_NEWBLK(xd_card);
- RTSX_WRITE_REG(chip, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
+ retval = rtsx_write_register(chip, CARD_DATA_SOURCE, 0x01,
+ PINGPONG_BUFFER);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
for (i = start_page; i < end_page; i++) {
if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
rtsx_clear_xd_error(chip);
xd_set_err_code(chip, XD_NO_CARD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
rtsx_init_cmd(chip);
if (detect_card_cd(chip,
XD_CARD) != STATUS_SUCCESS) {
xd_set_err_code(chip, XD_NO_CARD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (((reg & (XD_ECC1_ERROR | XD_ECC1_UNCORRECTABLE)) ==
}
} else {
xd_set_err_code(chip, XD_TO_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
} else {
xd_set_err_code(chip, XD_TO_ERROR);
}
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
old_page++;
rtsx_add_cmd(chip, READ_REG_CMD, XD_CTL, 0, 0);
retval = rtsx_send_cmd(chip, XD_CARD, 100);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
ptr = rtsx_get_cmd_data(chip) + 1;
if (((ptr[0] & READY_FLAG) == READY_STATE) && (ptr[1] & XD_RDY))
return STATUS_SUCCESS;
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
static int xd_erase_block(struct rtsx_chip *chip, u32 phy_blk)
u8 reg = 0, *ptr;
int i, retval;
- if (phy_blk == BLK_NOT_FOUND)
- TRACE_RET(chip, STATUS_FAIL);
+ if (phy_blk == BLK_NOT_FOUND) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
page_addr = phy_blk << xd_card->block_shift;
if (reg & PROGRAM_ERROR) {
xd_mark_bad_block(chip, phy_blk);
xd_set_err_code(chip, XD_PRG_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
} else {
xd_set_err_code(chip, XD_ERASE_FAIL);
}
retval = xd_reset_cmd(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
continue;
}
if (*ptr & PROGRAM_ERROR) {
xd_mark_bad_block(chip, phy_blk);
xd_set_err_code(chip, XD_PRG_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
return STATUS_SUCCESS;
xd_mark_bad_block(chip, phy_blk);
xd_set_err_code(chip, XD_ERASE_FAIL);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (zone->l2p_table == NULL) {
zone->l2p_table = vmalloc(2000);
- if (zone->l2p_table == NULL)
- TRACE_GOTO(chip, Build_Fail);
+ if (zone->l2p_table == NULL) {
+ rtsx_trace(chip);
+ goto Build_Fail;
+ }
}
memset((u8 *)(zone->l2p_table), 0xff, 2000);
if (zone->free_table == NULL) {
zone->free_table = vmalloc(XD_FREE_TABLE_CNT * 2);
- if (zone->free_table == NULL)
- TRACE_GOTO(chip, Build_Fail);
+ if (zone->free_table == NULL) {
+ rtsx_trace(chip);
+ goto Build_Fail;
+ }
}
memset((u8 *)(zone->free_table), 0xff, XD_FREE_TABLE_CNT * 2);
XD_TRANSFER_END, XD_TRANSFER_END);
retval = rtsx_send_cmd(chip, XD_CARD, 200);
- if (retval < 0)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval < 0) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
u8 reg_val, page_cnt;
int zone_no, retval, i;
- if (start_page > end_page)
- TRACE_RET(chip, STATUS_FAIL);
+ if (start_page > end_page) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
page_cnt = end_page - start_page;
zone_no = (int)(log_blk / 1000);
if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
xd_set_err_code(chip, XD_NO_CARD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
}
if (retval == -ETIMEDOUT) {
xd_set_err_code(chip, XD_TO_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
} else {
- TRACE_GOTO(chip, Fail);
+ rtsx_trace(chip);
+ goto Fail;
}
}
return STATUS_SUCCESS;
Fail:
- RTSX_READ_REG(chip, XD_PAGE_STATUS, ®_val);
+ retval = rtsx_read_register(chip, XD_PAGE_STATUS, ®_val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (reg_val != XD_GPG)
xd_set_err_code(chip, XD_PRG_ERROR);
- RTSX_READ_REG(chip, XD_CTL, ®_val);
+ retval = rtsx_read_register(chip, XD_CTL, ®_val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (((reg_val & (XD_ECC1_ERROR | XD_ECC1_UNCORRECTABLE))
== (XD_ECC1_ERROR | XD_ECC1_UNCORRECTABLE))
if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
xd_set_err_code(chip, XD_NO_CARD);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
xd_set_err_code(chip, XD_ECC_ERROR);
new_blk = xd_get_unused_block(chip, zone_no);
if (new_blk == NO_NEW_BLK) {
XD_CLR_BAD_OLDBLK(xd_card);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = xd_copy_page(chip, phy_blk, new_blk, 0,
XD_CLR_BAD_NEWBLK(xd_card);
}
XD_CLR_BAD_OLDBLK(xd_card);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
xd_set_l2p_tbl(chip, zone_no, log_off, (u16)(new_blk & 0x3FF));
xd_erase_block(chip, phy_blk);
XD_CLR_BAD_OLDBLK(xd_card);
}
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
static int xd_finish_write(struct rtsx_chip *chip,
dev_dbg(rtsx_dev(chip), "xd_finish_write, old_blk = 0x%x, new_blk = 0x%x, log_blk = 0x%x\n",
old_blk, new_blk, log_blk);
- if (page_off > xd_card->page_off)
- TRACE_RET(chip, STATUS_FAIL);
+ if (page_off > xd_card->page_off) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
zone_no = (int)(log_blk / 1000);
log_off = (u16)(log_blk % 1000);
retval = xd_erase_block(chip, new_blk);
if (retval == STATUS_SUCCESS)
xd_set_unused_block(chip, new_blk);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
} else {
retval = xd_copy_page(chip, old_blk, new_blk,
xd_set_unused_block(chip, new_blk);
}
XD_CLR_BAD_NEWBLK(xd_card);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = xd_erase_block(chip, old_blk);
if (page_off) {
retval = xd_copy_page(chip, old_blk, new_blk, 0, page_off);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
return STATUS_SUCCESS;
dev_dbg(rtsx_dev(chip), "%s, old_blk = 0x%x, new_blk = 0x%x, log_blk = 0x%x\n",
__func__, old_blk, new_blk, log_blk);
- if (start_page > end_page)
- TRACE_RET(chip, STATUS_FAIL);
+ if (start_page > end_page) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
page_cnt = end_page - start_page;
zone_no = (int)(log_blk / 1000);
page_addr = (new_blk << xd_card->block_shift) + start_page;
retval = xd_send_cmd(chip, READ1_1);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
rtsx_init_cmd(chip);
if (retval == -ETIMEDOUT) {
xd_set_err_code(chip, XD_TO_ERROR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
} else {
- TRACE_GOTO(chip, Fail);
+ rtsx_trace(chip);
+ goto Fail;
}
}
return STATUS_SUCCESS;
Fail:
- RTSX_READ_REG(chip, XD_DAT, ®_val);
+ retval = rtsx_read_register(chip, XD_DAT, ®_val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (reg_val & PROGRAM_ERROR) {
xd_set_err_code(chip, XD_PRG_ERROR);
xd_mark_bad_block(chip, new_blk);
}
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
#ifdef XD_DELAY_WRITE
if (delay_write->delay_write_flag) {
dev_dbg(rtsx_dev(chip), "xd_delay_write\n");
retval = xd_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
delay_write->delay_write_flag = 0;
retval = xd_finish_write(chip,
delay_write->old_phyblock,
delay_write->new_phyblock,
delay_write->logblock, delay_write->pageoff);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
}
return STATUS_SUCCESS;
ptr = (u8 *)scsi_sglist(srb);
retval = xd_switch_clock(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
chip->card_fail |= XD_CARD;
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
log_blk = start_sector >> xd_card->block_shift;
if (retval != STATUS_SUCCESS) {
chip->card_fail |= XD_CARD;
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
old_blk = delay_write->old_phyblock;
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
#endif
old_blk = xd_get_l2p_tbl(chip, zone_no, log_off);
(new_blk == BLK_NOT_FOUND)) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = xd_prepare_write(chip, old_blk, new_blk,
STATUS_SUCCESS) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
#ifdef XD_DELAY_WRITE
}
if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
#endif
if (old_blk == BLK_NOT_FOUND) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
chip->card_fail |= XD_CARD;
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if ((start_page + total_sec_cnt) > (xd_card->page_off + 1))
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
} else {
retval = xd_write_multiple_pages(chip, old_blk,
if (retval != STATUS_SUCCESS) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
chip->card_fail |= XD_CARD;
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
if (srb->sc_data_direction == DMA_TO_DEVICE) {
if (new_blk == BLK_NOT_FOUND) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
}
if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
chip->card_fail |= XD_CARD;
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
retval = xd_finish_write(chip, old_blk, new_blk,
if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_NOT_PRESENT);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
- TRACE_RET(chip, STATUS_FAIL);
+ rtsx_trace(chip);
+ return STATUS_FAIL;
}
#endif
}
int retval;
retval = disable_card_clock(chip, XD_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
- RTSX_WRITE_REG(chip, CARD_OE, XD_OUTPUT_EN, 0);
+ retval = rtsx_write_register(chip, CARD_OE, XD_OUTPUT_EN, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (!chip->ft2_fast_mode) {
retval = card_power_off(chip, XD_CARD);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
wait_timeout(50);
}
if (chip->asic_code) {
retval = xd_pull_ctl_disable(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
} else {
- RTSX_WRITE_REG(chip, FPGA_PULL_CTL, 0xFF, 0xDF);
+ retval = rtsx_write_register(chip, FPGA_PULL_CTL, 0xFF, 0xDF);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
return STATUS_SUCCESS;
xd_free_l2p_tbl(chip);
retval = xd_power_off_card3v3(chip);
- if (retval != STATUS_SUCCESS)
- TRACE_RET(chip, STATUS_FAIL);
+ if (retval != STATUS_SUCCESS) {
+ rtsx_trace(chip);
+ return STATUS_FAIL;
+ }
return STATUS_SUCCESS;
}
#if SKEIN_UNROLL_256 == 0
#define R256(p0, p1, p2, p3, ROT, r_num) /* fully unrolled */ \
-do { \
- ROUND256(p0, p1, p2, p3, ROT, r_num); \
-} while (0)
+ ROUND256(p0, p1, p2, p3, ROT, r_num)
#define I256(R) \
do { \
#if SKEIN_UNROLL_512 == 0
#define R512(p0, p1, p2, p3, p4, p5, p6, p7, ROT, r_num) /* unrolled */ \
-do { \
- ROUND512(p0, p1, p2, p3, p4, p5, p6, p7, ROT, r_num); \
-} while (0)
+ ROUND512(p0, p1, p2, p3, p4, p5, p6, p7, ROT, r_num)
#define I512(R) \
do { \
#include <linux/seq_file.h>
#include <linux/kthread.h>
#include <linux/module.h>
-#include <linux/moduleparam.h>
#include <linux/firmware.h>
#include <linux/types.h>
#include "slic.h"
static uint slic_first_init = 1;
-static char *slic_banner = "Alacritech SLIC Technology(tm) Server "
- "and Storage Accelerator (Non-Accelerated)";
+static char *slic_banner = "Alacritech SLIC Technology(tm) Server and Storage Accelerator (Non-Accelerated)";
static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
/* Get the CRC polynomial for the mac address */
/* we use bits 1-8 (lsb), bitwise reversed,
* msb (= lsb bit 0 before bitrev) is automatically discarded */
- crcpoly = (ether_crc(ETH_ALEN, address)>>23);
+ crcpoly = ether_crc(ETH_ALEN, address)>>23;
/* We only have space on the SLIC for 64 entries. Lop
* off the top two bits. (2^6 = 64)
ihcmd = &hcmd->cmd64;
- ihcmd->flags = (adapter->port << IHFLG_IFSHFT);
+ ihcmd->flags = adapter->port << IHFLG_IFSHFT;
ihcmd->command = IHCMD_XMT_REQ;
ihcmd->u.slic_buffers.totlen = skb->len;
phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
(u64) hcmd) + 31) >> 5);
#else
- hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] -
- (u32) hcmd) + 31) >> 5);
+ hcmd->cmdsize = (((u32)&ihcmd->u.slic_buffers.bufs[1] -
+ (u32)hcmd) + 31) >> 5;
#endif
}
}
rc = slic_adapter_allocresources(adapter);
if (rc) {
- dev_err(&dev->dev,
- "%s: slic_adapter_allocresources FAILED %x\n",
- __func__, rc);
+ dev_err(&dev->dev, "slic_adapter_allocresources FAILED %x\n",
+ rc);
slic_adapter_freeresources(adapter);
goto err;
}
adapter->state = ADAPT_UP;
if (!card->loadtimerset) {
- init_timer(&card->loadtimer);
+ setup_timer(&card->loadtimer, &slic_timer_load_check,
+ (ulong)card);
card->loadtimer.expires =
jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
- card->loadtimer.data = (ulong) card;
- card->loadtimer.function = &slic_timer_load_check;
add_timer(&card->loadtimer);
card->loadtimerset = 1;
}
if (!adapter->pingtimerset) {
- init_timer(&adapter->pingtimer);
+ setup_timer(&adapter->pingtimer, &slic_timer_ping, (ulong)dev);
adapter->pingtimer.expires =
jiffies + (PING_TIMER_INTERVAL * HZ);
- adapter->pingtimer.data = (ulong) dev;
- adapter->pingtimer.function = &slic_timer_ping;
add_timer(&adapter->pingtimer);
adapter->pingtimerset = 1;
adapter->card->pingstatus = ISR_PINGMASK;
if (copy_from_user(data, rq->ifr_data, 28))
return -EFAULT;
intagg = data[0];
- dev_err(&dev->dev, "%s: set interrupt aggregation to %d\n",
- __func__, intagg);
+ dev_err(&dev->dev, "set interrupt aggregation to %d\n",
+ intagg);
slic_intagg_set(adapter, intagg);
return 0;
-#ifdef SLIC_TRACE_DUMP_ENABLED
- case SIOCSLICTRACEDUMP:
- {
- u32 value;
-
- DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n");
-
- if (copy_from_user(data, rq->ifr_data, 28)) {
- PRINT_ERROR
- ("slic: copy_from_user FAILED getting initial simba param\n");
- return -EFAULT;
- }
-
- value = data[0];
- if (tracemon_request == SLIC_DUMP_DONE) {
- PRINT_ERROR
- ("ATK Diagnostic Trace Dump Requested\n");
- tracemon_request = SLIC_DUMP_REQUESTED;
- tracemon_request_type = value;
- tracemon_timestamp = jiffies;
- } else if ((tracemon_request == SLIC_DUMP_REQUESTED) ||
- (tracemon_request ==
- SLIC_DUMP_IN_PROGRESS)) {
- PRINT_ERROR
- ("ATK Diagnostic Trace Dump Requested but already in progress... ignore\n");
- } else {
- PRINT_ERROR
- ("ATK Diagnostic Trace Dump Requested\n");
- tracemon_request = SLIC_DUMP_REQUESTED;
- tracemon_request_type = value;
- tracemon_timestamp = jiffies;
- }
- return 0;
- }
-#endif
case SIOCETHTOOL:
if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
return -EFAULT;
--- /dev/null
+config FB_SM750
+ tristate "Silicon Motion SM750 framebuffer support"
+ depends on FB && PCI
+ help
+ Frame buffer driver for the Silicon Motion SM750 chip
+ with 2D accelearion and dual head support.
+
+ This driver is also available as a module. The module will be
+ called sm750fb. If you want to compile it as a module, say M
+ here and read <file:Documentation/kbuild/modules.txt>.
--- /dev/null
+obj-$(CONFIG_FB_SM750) += sm750fb.o
+
+sm750fb-objs := sm750.o sm750_hw.o sm750_accel.o sm750_cursor.o ddk750_chip.o ddk750_power.o ddk750_mode.o
+sm750fb-objs += ddk750_display.o ddk750_help.o ddk750_swi2c.o ddk750_sii164.o ddk750_dvi.o ddk750_hwi2c.o
--- /dev/null
+TODO:
+- lots of clechpatch cleanup
+- use kernel coding style
+- refine the code and remove unused code
+- check on hardware effects of removal of USE_HW_I2C and USE_DVICHIP (these two
+ are supposed to be sample code which is given here if someone wants to
+ use those functionalities)
+- move it to drivers/video/fbdev
+- modify the code for drm framework
+
+Please send any patches to
+ Greg Kroah-Hartman <greg@kroah.com>
+ Sudip Mukherjee <sudipm.mukherjee@gmail.com>
+ Teddy Wang <teddy.wang@siliconmotion.com>
+ Sudip Mukherjee <sudip@vectorindia.org>
--- /dev/null
+#ifndef DDK750_H__
+#define DDK750_H__
+/*******************************************************************
+*
+* Copyright (c) 2007 by Silicon Motion, Inc. (SMI)
+*
+* All rights are reserved. Reproduction or in part is prohibited
+* without the written consent of the copyright owner.
+*
+* RegSC.h --- SM718 SDK
+* This file contains the definitions for the System Configuration registers.
+*
+*******************************************************************/
+#include "ddk750_reg.h"
+#include "ddk750_mode.h"
+#include "ddk750_chip.h"
+#include "ddk750_display.h"
+#include "ddk750_power.h"
+#include "ddk750_help.h"
+#ifdef USE_HW_I2C
+#include "ddk750_hwi2c.h"
+#endif
+#include "ddk750_swi2c.h"
+#endif
--- /dev/null
+#include "ddk750_help.h"
+#include "ddk750_reg.h"
+#include "ddk750_chip.h"
+#include "ddk750_power.h"
+typedef struct _pllcalparam {
+ unsigned char power;/* d : 0~ 6*/
+ unsigned char pod;
+ unsigned char od;
+ unsigned char value;/* value of 2 power d (2^d) */
+}
+pllcalparam;
+
+
+logical_chip_type_t getChipType(void)
+{
+ unsigned short physicalID;
+ char physicalRev;
+ logical_chip_type_t chip;
+
+ physicalID = devId750;//either 0x718 or 0x750
+ physicalRev = revId750;
+
+ if (physicalID == 0x718)
+ chip = SM718;
+ else if (physicalID == 0x750) {
+ chip = SM750;
+ /* SM750 and SM750LE are different in their revision ID only. */
+ if (physicalRev == SM750LE_REVISION_ID)
+ chip = SM750LE;
+ } else
+ chip = SM_UNKNOWN;
+
+ return chip;
+}
+
+
+inline unsigned int twoToPowerOfx(unsigned long x)
+{
+ unsigned long i;
+ unsigned long result = 1;
+
+ for (i = 1; i <= x; i++)
+ result *= 2;
+ return result;
+}
+
+inline unsigned int calcPLL(pll_value_t *pPLL)
+{
+ return (pPLL->inputFreq * pPLL->M / pPLL->N / twoToPowerOfx(pPLL->OD) / twoToPowerOfx(pPLL->POD));
+}
+
+unsigned int getPllValue(clock_type_t clockType, pll_value_t *pPLL)
+{
+ unsigned int ulPllReg = 0;
+
+ pPLL->inputFreq = DEFAULT_INPUT_CLOCK;
+ pPLL->clockType = clockType;
+
+ switch (clockType) {
+ case MXCLK_PLL:
+ ulPllReg = PEEK32(MXCLK_PLL_CTRL);
+ break;
+ case PRIMARY_PLL:
+ ulPllReg = PEEK32(PANEL_PLL_CTRL);
+ break;
+ case SECONDARY_PLL:
+ ulPllReg = PEEK32(CRT_PLL_CTRL);
+ break;
+ case VGA0_PLL:
+ ulPllReg = PEEK32(VGA_PLL0_CTRL);
+ break;
+ case VGA1_PLL:
+ ulPllReg = PEEK32(VGA_PLL1_CTRL);
+ break;
+ }
+
+ pPLL->M = FIELD_GET(ulPllReg, PANEL_PLL_CTRL, M);
+ pPLL->N = FIELD_GET(ulPllReg, PANEL_PLL_CTRL, N);
+ pPLL->OD = FIELD_GET(ulPllReg, PANEL_PLL_CTRL, OD);
+ pPLL->POD = FIELD_GET(ulPllReg, PANEL_PLL_CTRL, POD);
+
+ return calcPLL(pPLL);
+}
+
+
+unsigned int getChipClock(void)
+{
+ pll_value_t pll;
+#if 1
+ if (getChipType() == SM750LE)
+ return MHz(130);
+#endif
+
+ return getPllValue(MXCLK_PLL, &pll);
+}
+
+
+/*
+ * This function set up the main chip clock.
+ *
+ * Input: Frequency to be set.
+ */
+void setChipClock(unsigned int frequency)
+{
+ pll_value_t pll;
+ unsigned int ulActualMxClk;
+#if 1
+ /* Cheok_0509: For SM750LE, the chip clock is fixed. Nothing to set. */
+ if (getChipType() == SM750LE)
+ return;
+#endif
+
+ if (frequency) {
+ /*
+ * Set up PLL, a structure to hold the value to be set in clocks.
+ */
+ pll.inputFreq = DEFAULT_INPUT_CLOCK; /* Defined in CLOCK.H */
+ pll.clockType = MXCLK_PLL;
+
+ /*
+ * Call calcPllValue() to fill up the other fields for PLL structure.
+ * Sometime, the chip cannot set up the exact clock required by User.
+ * Return value from calcPllValue() gives the actual possible clock.
+ */
+ ulActualMxClk = calcPllValue(frequency, &pll);
+
+ /* Master Clock Control: MXCLK_PLL */
+ POKE32(MXCLK_PLL_CTRL, formatPllReg(&pll));
+ }
+}
+
+
+
+void setMemoryClock(unsigned int frequency)
+{
+ unsigned int ulReg, divisor;
+ #if 1
+ /* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */
+ if (getChipType() == SM750LE)
+ return;
+#endif
+ if (frequency) {
+ /* Set the frequency to the maximum frequency that the DDR Memory can take
+ which is 336MHz. */
+ if (frequency > MHz(336))
+ frequency = MHz(336);
+
+ /* Calculate the divisor */
+ divisor = (unsigned int) roundedDiv(getChipClock(), frequency);
+
+ /* Set the corresponding divisor in the register. */
+ ulReg = PEEK32(CURRENT_GATE);
+ switch (divisor) {
+ default:
+ case 1:
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, M2XCLK, DIV_1);
+ break;
+ case 2:
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, M2XCLK, DIV_2);
+ break;
+ case 3:
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, M2XCLK, DIV_3);
+ break;
+ case 4:
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, M2XCLK, DIV_4);
+ break;
+ }
+
+ setCurrentGate(ulReg);
+ }
+}
+
+
+/*
+ * This function set up the master clock (MCLK).
+ *
+ * Input: Frequency to be set.
+ *
+ * NOTE:
+ * The maximum frequency the engine can run is 168MHz.
+ */
+void setMasterClock(unsigned int frequency)
+{
+ unsigned int ulReg, divisor;
+#if 1
+ /* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */
+ if (getChipType() == SM750LE)
+ return;
+#endif
+ if (frequency) {
+ /* Set the frequency to the maximum frequency that the SM750 engine can
+ run, which is about 190 MHz. */
+ if (frequency > MHz(190))
+ frequency = MHz(190);
+
+ /* Calculate the divisor */
+ divisor = (unsigned int) roundedDiv(getChipClock(), frequency);
+
+ /* Set the corresponding divisor in the register. */
+ ulReg = PEEK32(CURRENT_GATE);
+ switch (divisor) {
+ default:
+ case 3:
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, MCLK, DIV_3);
+ break;
+ case 4:
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, MCLK, DIV_4);
+ break;
+ case 6:
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, MCLK, DIV_6);
+ break;
+ case 8:
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, MCLK, DIV_8);
+ break;
+ }
+
+ setCurrentGate(ulReg);
+ }
+}
+
+
+unsigned int ddk750_getVMSize(void)
+{
+ unsigned int reg;
+ unsigned int data;
+
+ /* sm750le only use 64 mb memory*/
+ if (getChipType() == SM750LE)
+ return MB(64);
+
+ /* for 750,always use power mode0*/
+ reg = PEEK32(MODE0_GATE);
+ reg = FIELD_SET(reg, MODE0_GATE, GPIO, ON);
+ POKE32(MODE0_GATE, reg);
+
+ /* get frame buffer size from GPIO */
+ reg = FIELD_GET(PEEK32(MISC_CTRL), MISC_CTRL, LOCALMEM_SIZE);
+ switch (reg) {
+ case MISC_CTRL_LOCALMEM_SIZE_8M:
+ data = MB(8); break; /* 8 Mega byte */
+ case MISC_CTRL_LOCALMEM_SIZE_16M:
+ data = MB(16); break; /* 16 Mega byte */
+ case MISC_CTRL_LOCALMEM_SIZE_32M:
+ data = MB(32); break; /* 32 Mega byte */
+ case MISC_CTRL_LOCALMEM_SIZE_64M:
+ data = MB(64); break; /* 64 Mega byte */
+ default:
+ data = 0;
+ break;
+ }
+ return data;
+
+}
+
+int ddk750_initHw(initchip_param_t *pInitParam)
+{
+
+ unsigned int ulReg;
+#if 0
+ //move the code to map regiter function.
+ if (getChipType() == SM718) {
+ /* turn on big endian bit*/
+ ulReg = PEEK32(0x74);
+ /* now consider register definition in a big endian pattern*/
+ POKE32(0x74, ulReg|0x80000000);
+ }
+
+#endif
+
+
+ if (pInitParam->powerMode != 0 )
+ pInitParam->powerMode = 0;
+ setPowerMode(pInitParam->powerMode);
+
+ /* Enable display power gate & LOCALMEM power gate*/
+ ulReg = PEEK32(CURRENT_GATE);
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, DISPLAY, ON);
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, LOCALMEM, ON);
+ setCurrentGate(ulReg);
+
+ if (getChipType() != SM750LE) {
+ /* set panel pll and graphic mode via mmio_88 */
+ ulReg = PEEK32(VGA_CONFIGURATION);
+ ulReg = FIELD_SET(ulReg, VGA_CONFIGURATION, PLL, PANEL);
+ ulReg = FIELD_SET(ulReg, VGA_CONFIGURATION, MODE, GRAPHIC);
+ POKE32(VGA_CONFIGURATION, ulReg);
+ } else {
+#if defined(__i386__) || defined( __x86_64__)
+ /* set graphic mode via IO method */
+ outb_p(0x88, 0x3d4);
+ outb_p(0x06, 0x3d5);
+#endif
+ }
+
+ /* Set the Main Chip Clock */
+ setChipClock(MHz((unsigned int)pInitParam->chipClock));
+
+ /* Set up memory clock. */
+ setMemoryClock(MHz(pInitParam->memClock));
+
+ /* Set up master clock */
+ setMasterClock(MHz(pInitParam->masterClock));
+
+
+ /* Reset the memory controller. If the memory controller is not reset in SM750,
+ the system might hang when sw accesses the memory.
+ The memory should be resetted after changing the MXCLK.
+ */
+ if (pInitParam->resetMemory == 1) {
+ ulReg = PEEK32(MISC_CTRL);
+ ulReg = FIELD_SET(ulReg, MISC_CTRL, LOCALMEM_RESET, RESET);
+ POKE32(MISC_CTRL, ulReg);
+
+ ulReg = FIELD_SET(ulReg, MISC_CTRL, LOCALMEM_RESET, NORMAL);
+ POKE32(MISC_CTRL, ulReg);
+ }
+
+ if (pInitParam->setAllEngOff == 1) {
+ enable2DEngine(0);
+
+ /* Disable Overlay, if a former application left it on */
+ ulReg = PEEK32(VIDEO_DISPLAY_CTRL);
+ ulReg = FIELD_SET(ulReg, VIDEO_DISPLAY_CTRL, PLANE, DISABLE);
+ POKE32(VIDEO_DISPLAY_CTRL, ulReg);
+
+ /* Disable video alpha, if a former application left it on */
+ ulReg = PEEK32(VIDEO_ALPHA_DISPLAY_CTRL);
+ ulReg = FIELD_SET(ulReg, VIDEO_ALPHA_DISPLAY_CTRL, PLANE, DISABLE);
+ POKE32(VIDEO_ALPHA_DISPLAY_CTRL, ulReg);
+
+ /* Disable alpha plane, if a former application left it on */
+ ulReg = PEEK32(ALPHA_DISPLAY_CTRL);
+ ulReg = FIELD_SET(ulReg, ALPHA_DISPLAY_CTRL, PLANE, DISABLE);
+ POKE32(ALPHA_DISPLAY_CTRL, ulReg);
+
+#if 0
+ /* Disable LCD hardware cursor, if a former application left it on */
+ ulReg = PEEK32(PANEL_HWC_ADDRESS);
+ ulReg = FIELD_SET(ulReg, PANEL_HWC_ADDRESS, ENABLE, DISABLE);
+ POKE32(PANEL_HWC_ADDRESS, ulReg);
+
+ /* Disable CRT hardware cursor, if a former application left it on */
+ ulReg = PEEK32(CRT_HWC_ADDRESS);
+ ulReg = FIELD_SET(ulReg, CRT_HWC_ADDRESS, ENABLE, DISABLE);
+ POKE32(CRT_HWC_ADDRESS, ulReg);
+
+ /* Disable ZV Port 0, if a former application left it on */
+ ulReg = PEEK32(ZV0_CAPTURE_CTRL);
+ ulReg = FIELD_SET(ulReg, ZV0_CAPTURE_CTRL, CAP, DISABLE);
+ POKE32(ZV0_CAPTURE_CTRL, ulReg);
+
+ /* Disable ZV Port 1, if a former application left it on */
+ ulReg = PEEK32(ZV1_CAPTURE_CTRL);
+ ulReg = FIELD_SET(ulReg, ZV1_CAPTURE_CTRL, CAP, DISABLE);
+ POKE32(ZV1_CAPTURE_CTRL, ulReg);
+
+ /* Disable ZV Port Power, if a former application left it on */
+ enableZVPort(0);
+ /* Disable DMA Channel, if a former application left it on */
+ ulReg = PEEK32(DMA_ABORT_INTERRUPT);
+ ulReg = FIELD_SET(ulReg, DMA_ABORT_INTERRUPT, ABORT_1, ABORT);
+ POKE32(DMA_ABORT_INTERRUPT, ulReg);
+
+ /* Disable i2c */
+ enableI2C(0);
+#endif
+ /* Disable DMA Channel, if a former application left it on */
+ ulReg = PEEK32(DMA_ABORT_INTERRUPT);
+ ulReg = FIELD_SET(ulReg, DMA_ABORT_INTERRUPT, ABORT_1, ABORT);
+ POKE32(DMA_ABORT_INTERRUPT, ulReg);
+
+ /* Disable DMA Power, if a former application left it on */
+ enableDMA(0);
+ }
+
+ /* We can add more initialization as needed. */
+
+ return 0;
+}
+
+#if 0
+
+unsigned int absDiff(unsigned int a, unsigned int b)
+{
+ if ( a > b )
+ return(a - b);
+ else
+ return(b - a);
+}
+
+#endif
+/*
+ monk liu @ 4/6/2011:
+ re-write the calculatePLL function of ddk750.
+ the original version function does not use some mathematics tricks and shortcut
+ when it doing the calculation of the best N,M,D combination
+ I think this version gives a little upgrade in speed
+
+ 750 pll clock formular:
+ Request Clock = (Input Clock * M )/(N * X)
+
+ Input Clock = 14318181 hz
+ X = 2 power D
+ D ={0,1,2,3,4,5,6}
+ M = {1,...,255}
+ N = {2,...,15}
+*/
+unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
+{
+ /* used for primary and secondary channel pixel clock pll */
+ static pllcalparam xparm_PIXEL[] = {
+ /* 2^0 = 1*/ {0, 0, 0, 1},
+ /* 2^ 1 =2*/ {1, 0, 1, 2},
+ /* 2^ 2 = 4*/ {2, 0, 2, 4},
+ {3, 0, 3, 8},
+ {4, 1, 3, 16},
+ {5, 2, 3, 32},
+ /* 2^6 = 64 */ {6, 3, 3, 64},
+ };
+
+ /* used for MXCLK (chip clock) */
+ static pllcalparam xparm_MXCLK[] = {
+ /* 2^0 = 1*/ {0, 0, 0, 1},
+ /* 2^ 1 =2*/ {1, 0, 1, 2},
+ /* 2^ 2 = 4*/ {2, 0, 2, 4},
+ {3, 0, 3, 8},
+ };
+
+ /* as sm750 register definition, N located in 2,15 and M located in 1,255 */
+ int N, M, X, d;
+ int xcnt;
+ int miniDiff;
+ unsigned int RN, quo, rem, fl_quo;
+ unsigned int input, request;
+ unsigned int tmpClock, ret;
+ pllcalparam * xparm;
+
+#if 1
+ if (getChipType() == SM750LE) {
+ /* SM750LE don't have prgrammable PLL and M/N values to work on.
+ Just return the requested clock. */
+ return request_orig;
+ }
+#endif
+
+ ret = 0;
+ miniDiff = ~0;
+ request = request_orig / 1000;
+ input = pll->inputFreq / 1000;
+
+ /* for MXCLK register , no POD provided, so need be treated differently */
+
+ if (pll->clockType != MXCLK_PLL) {
+ xparm = &xparm_PIXEL[0];
+ xcnt = sizeof(xparm_PIXEL)/sizeof(xparm_PIXEL[0]);
+ } else {
+ xparm = &xparm_MXCLK[0];
+ xcnt = sizeof(xparm_MXCLK)/sizeof(xparm_MXCLK[0]);
+ }
+
+
+ for (N = 15; N > 1; N--) {
+ /* RN will not exceed maximum long if @request <= 285 MHZ (for 32bit cpu) */
+ RN = N * request;
+ quo = RN / input;
+ rem = RN % input;/* rem always small than 14318181 */
+ fl_quo = (rem * 10000 /input);
+
+ for (d = xcnt - 1; d >= 0; d--) {
+ X = xparm[d].value;
+ M = quo*X;
+ M += fl_quo * X / 10000;
+ /* round step */
+ M += (fl_quo*X % 10000)>5000?1:0;
+ if (M < 256 && M > 0) {
+ unsigned int diff;
+ tmpClock = pll->inputFreq *M / N / X;
+ diff = absDiff(tmpClock, request_orig);
+ if (diff < miniDiff) {
+ pll->M = M;
+ pll->N = N;
+ pll->OD = xparm[d].od;
+ pll->POD = xparm[d].pod;
+ miniDiff = diff;
+ ret = tmpClock;
+ }
+ }
+ }
+ }
+
+ //printk("Finally: pll->n[%lu],m[%lu],od[%lu],pod[%lu]\n",pll->N,pll->M,pll->OD,pll->POD);
+ return ret;
+}
+
+unsigned int calcPllValue2(
+unsigned int ulRequestClk, /* Required pixel clock in Hz unit */
+pll_value_t *pPLL /* Structure to hold the value to be set in PLL */
+)
+{
+ unsigned int M, N, OD, POD = 0, diff, pllClk, odPower, podPower;
+ unsigned int bestDiff = 0xffffffff; /* biggest 32 bit unsigned number */
+ unsigned int ret;
+ /* Init PLL structure to know states */
+ pPLL->M = 0;
+ pPLL->N = 0;
+ pPLL->OD = 0;
+ pPLL->POD = 0;
+
+ /* Sanity check: None at the moment */
+
+ /* Convert everything in Khz range in order to avoid calculation overflow */
+ pPLL->inputFreq /= 1000;
+ ulRequestClk /= 1000;
+
+#ifndef VALIDATION_CHIP
+ /* The maximum of post divider is 8. */
+ for (POD = 0; POD <= 3; POD++)
+#endif
+ {
+
+#ifndef VALIDATION_CHIP
+ /* MXCLK_PLL does not have post divider. */
+ if ((POD > 0) && (pPLL->clockType == MXCLK_PLL))
+ break;
+#endif
+
+ /* Work out 2 to the power of POD */
+ podPower = twoToPowerOfx(POD);
+
+ /* OD has only 2 bits [15:14] and its value must between 0 to 3 */
+ for (OD = 0; OD <= 3; OD++) {
+ /* Work out 2 to the power of OD */
+ odPower = twoToPowerOfx(OD);
+
+#ifdef VALIDATION_CHIP
+ if (odPower > 4)
+ podPower = 4;
+ else
+ podPower = odPower;
+#endif
+
+ /* N has 4 bits [11:8] and its value must between 2 and 15.
+ The N == 1 will behave differently --> Result is not correct. */
+ for (N = 2; N <= 15; N++) {
+ /* The formula for PLL is ulRequestClk = inputFreq * M / N / (2^OD)
+ In the following steps, we try to work out a best M value given the others are known.
+ To avoid decimal calculation, we use 1000 as multiplier for up to 3 decimal places of accuracy.
+ */
+ M = ulRequestClk * N * odPower * 1000 / pPLL->inputFreq;
+ M = roundedDiv(M, 1000);
+
+ /* M field has only 8 bits, reject value bigger than 8 bits */
+ if (M < 256) {
+ /* Calculate the actual clock for a given M & N */
+ pllClk = pPLL->inputFreq * M / N / odPower / podPower;
+
+ /* How much are we different from the requirement */
+ diff = absDiff(pllClk, ulRequestClk);
+
+ if (diff < bestDiff) {
+ bestDiff = diff;
+
+ /* Store M and N values */
+ pPLL->M = M;
+ pPLL->N = N;
+ pPLL->OD = OD;
+
+#ifdef VALIDATION_CHIP
+ if (OD > 2)
+ POD = 2;
+ else
+ POD = OD;
+#endif
+
+ pPLL->POD = POD;
+ }
+ }
+ }
+ }
+ }
+
+ /* Restore input frequency from Khz to hz unit */
+// pPLL->inputFreq *= 1000;
+ ulRequestClk *= 1000;
+ pPLL->inputFreq = DEFAULT_INPUT_CLOCK; /* Default reference clock */
+
+ /* Output debug information */
+ //DDKDEBUGPRINT((DISPLAY_LEVEL, "calcPllValue: Requested Frequency = %d\n", ulRequestClk));
+ //DDKDEBUGPRINT((DISPLAY_LEVEL, "calcPllValue: Input CLK = %dHz, M=%d, N=%d, OD=%d, POD=%d\n", pPLL->inputFreq, pPLL->M, pPLL->N, pPLL->OD, pPLL->POD));
+
+ /* Return actual frequency that the PLL can set */
+ ret = calcPLL(pPLL);
+ return ret;
+}
+
+
+
+
+
+unsigned int formatPllReg(pll_value_t *pPLL)
+{
+ unsigned int ulPllReg = 0;
+
+ /* Note that all PLL's have the same format. Here, we just use Panel PLL parameter
+ to work out the bit fields in the register.
+ On returning a 32 bit number, the value can be applied to any PLL in the calling function.
+ */
+ ulPllReg =
+ FIELD_SET( 0, PANEL_PLL_CTRL, BYPASS, OFF)
+ | FIELD_SET( 0, PANEL_PLL_CTRL, POWER, ON)
+ | FIELD_SET( 0, PANEL_PLL_CTRL, INPUT, OSC)
+#ifndef VALIDATION_CHIP
+ | FIELD_VALUE(0, PANEL_PLL_CTRL, POD, pPLL->POD)
+#endif
+ | FIELD_VALUE(0, PANEL_PLL_CTRL, OD, pPLL->OD)
+ | FIELD_VALUE(0, PANEL_PLL_CTRL, N, pPLL->N)
+ | FIELD_VALUE(0, PANEL_PLL_CTRL, M, pPLL->M);
+
+ return ulPllReg;
+}
+
+
--- /dev/null
+#ifndef DDK750_CHIP_H__
+#define DDK750_CHIP_H__
+#define DEFAULT_INPUT_CLOCK 14318181 /* Default reference clock */
+#ifndef SM750LE_REVISION_ID
+#define SM750LE_REVISION_ID ((unsigned char)0xfe)
+#endif
+
+#include <linux/io.h>
+
+/* This is all the chips recognized by this library */
+typedef enum _logical_chip_type_t
+{
+ SM_UNKNOWN,
+ SM718,
+ SM750,
+ SM750LE,
+}
+logical_chip_type_t;
+
+
+typedef enum _clock_type_t
+{
+ MXCLK_PLL,
+ PRIMARY_PLL,
+ SECONDARY_PLL,
+ VGA0_PLL,
+ VGA1_PLL,
+}
+clock_type_t;
+
+typedef struct _pll_value_t
+{
+ clock_type_t clockType;
+ unsigned long inputFreq; /* Input clock frequency to the PLL */
+
+ /* Use this when clockType = PANEL_PLL */
+ unsigned long M;
+ unsigned long N;
+ unsigned long OD;
+ unsigned long POD;
+}
+pll_value_t;
+
+/* input struct to initChipParam() function */
+typedef struct _initchip_param_t
+{
+ unsigned short powerMode; /* Use power mode 0 or 1 */
+ unsigned short chipClock; /* Speed of main chip clock in MHz unit
+ 0 = keep the current clock setting
+ Others = the new main chip clock
+ */
+ unsigned short memClock; /* Speed of memory clock in MHz unit
+ 0 = keep the current clock setting
+ Others = the new memory clock
+ */
+ unsigned short masterClock; /* Speed of master clock in MHz unit
+ 0 = keep the current clock setting
+ Others = the new master clock
+ */
+ unsigned short setAllEngOff; /* 0 = leave all engine state untouched.
+ 1 = make sure they are off: 2D, Overlay,
+ video alpha, alpha, hardware cursors
+ */
+ unsigned char resetMemory; /* 0 = Do not reset the memory controller
+ 1 = Reset the memory controller
+ */
+
+ /* More initialization parameter can be added if needed */
+}
+initchip_param_t;
+
+
+logical_chip_type_t getChipType(void);
+unsigned int calcPllValue(unsigned int request,pll_value_t *pll);
+unsigned int calcPllValue2(unsigned int,pll_value_t *);
+unsigned int formatPllReg(pll_value_t *pPLL);
+void ddk750_set_mmio(void __iomem *,unsigned short,char);
+unsigned int ddk750_getVMSize(void);
+int ddk750_initHw(initchip_param_t *);
+unsigned int getPllValue(clock_type_t clockType, pll_value_t *pPLL);
+unsigned int getChipClock(void);
+void setChipClock(unsigned int);
+void setMemoryClock(unsigned int frequency);
+void setMasterClock(unsigned int frequency);
+
+
+#endif
--- /dev/null
+#include "ddk750_reg.h"
+#include "ddk750_help.h"
+#include "ddk750_display.h"
+#include "ddk750_power.h"
+#include "ddk750_dvi.h"
+
+#define primaryWaitVerticalSync(delay) waitNextVerticalSync(0,delay)
+
+static void setDisplayControl(int ctrl,int dispState)
+{
+ /* state != 0 means turn on both timing & plane en_bit */
+ unsigned long ulDisplayCtrlReg, ulReservedBits;
+ int cnt;
+
+ cnt = 0;
+
+ /* Set the primary display control */
+ if (!ctrl)
+ {
+ ulDisplayCtrlReg = PEEK32(PANEL_DISPLAY_CTRL);
+ /* Turn on/off the Panel display control */
+ if (dispState)
+ {
+ /* Timing should be enabled first before enabling the plane
+ * because changing at the same time does not guarantee that
+ * the plane will also enabled or disabled.
+ */
+ ulDisplayCtrlReg = FIELD_SET(ulDisplayCtrlReg,
+ PANEL_DISPLAY_CTRL, TIMING, ENABLE);
+ POKE32(PANEL_DISPLAY_CTRL, ulDisplayCtrlReg);
+
+ ulDisplayCtrlReg = FIELD_SET(ulDisplayCtrlReg,
+ PANEL_DISPLAY_CTRL, PLANE, ENABLE);
+
+ /* Added some masks to mask out the reserved bits.
+ * Sometimes, the reserved bits are set/reset randomly when
+ * writing to the PRIMARY_DISPLAY_CTRL, therefore, the register
+ * reserved bits are needed to be masked out.
+ */
+ ulReservedBits = FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_1_MASK, ENABLE) |
+ FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_2_MASK, ENABLE) |
+ FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_3_MASK, ENABLE);
+
+ /* Somehow the register value on the plane is not set
+ * until a few delay. Need to write
+ * and read it a couple times
+ */
+ do
+ {
+ cnt++;
+ POKE32(PANEL_DISPLAY_CTRL, ulDisplayCtrlReg);
+ } while((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) !=
+ (ulDisplayCtrlReg & ~ulReservedBits));
+ printk("Set Panel Plane enbit:after tried %d times\n",cnt);
+ }
+ else
+ {
+ /* When turning off, there is no rule on the programming
+ * sequence since whenever the clock is off, then it does not
+ * matter whether the plane is enabled or disabled.
+ * Note: Modifying the plane bit will take effect on the
+ * next vertical sync. Need to find out if it is necessary to
+ * wait for 1 vsync before modifying the timing enable bit.
+ * */
+ ulDisplayCtrlReg = FIELD_SET(ulDisplayCtrlReg,
+ PANEL_DISPLAY_CTRL, PLANE, DISABLE);
+ POKE32(PANEL_DISPLAY_CTRL, ulDisplayCtrlReg);
+
+ ulDisplayCtrlReg = FIELD_SET(ulDisplayCtrlReg,
+ PANEL_DISPLAY_CTRL, TIMING, DISABLE);
+ POKE32(PANEL_DISPLAY_CTRL, ulDisplayCtrlReg);
+ }
+
+ }
+ /* Set the secondary display control */
+ else
+ {
+ ulDisplayCtrlReg = PEEK32(CRT_DISPLAY_CTRL);
+
+ if (dispState)
+ {
+ /* Timing should be enabled first before enabling the plane because changing at the
+ same time does not guarantee that the plane will also enabled or disabled.
+ */
+ ulDisplayCtrlReg = FIELD_SET(ulDisplayCtrlReg,
+ CRT_DISPLAY_CTRL, TIMING, ENABLE);
+ POKE32(CRT_DISPLAY_CTRL, ulDisplayCtrlReg);
+
+ ulDisplayCtrlReg = FIELD_SET(ulDisplayCtrlReg,
+ CRT_DISPLAY_CTRL, PLANE, ENABLE);
+
+ /* Added some masks to mask out the reserved bits.
+ * Sometimes, the reserved bits are set/reset randomly when
+ * writing to the PRIMARY_DISPLAY_CTRL, therefore, the register
+ * reserved bits are needed to be masked out.
+ */
+
+ ulReservedBits = FIELD_SET(0, CRT_DISPLAY_CTRL, RESERVED_1_MASK, ENABLE) |
+ FIELD_SET(0, CRT_DISPLAY_CTRL, RESERVED_2_MASK, ENABLE) |
+ FIELD_SET(0, CRT_DISPLAY_CTRL, RESERVED_3_MASK, ENABLE) |
+ FIELD_SET(0, CRT_DISPLAY_CTRL, RESERVED_4_MASK, ENABLE);
+
+ do
+ {
+ cnt++;
+ POKE32(CRT_DISPLAY_CTRL, ulDisplayCtrlReg);
+ } while((PEEK32(CRT_DISPLAY_CTRL) & ~ulReservedBits) !=
+ (ulDisplayCtrlReg & ~ulReservedBits));
+ printk("Set Crt Plane enbit:after tried %d times\n",cnt);
+ }
+ else
+ {
+ /* When turning off, there is no rule on the programming
+ * sequence since whenever the clock is off, then it does not
+ * matter whether the plane is enabled or disabled.
+ * Note: Modifying the plane bit will take effect on the next
+ * vertical sync. Need to find out if it is necessary to
+ * wait for 1 vsync before modifying the timing enable bit.
+ */
+ ulDisplayCtrlReg = FIELD_SET(ulDisplayCtrlReg,
+ CRT_DISPLAY_CTRL, PLANE, DISABLE);
+ POKE32(CRT_DISPLAY_CTRL, ulDisplayCtrlReg);
+
+ ulDisplayCtrlReg = FIELD_SET(ulDisplayCtrlReg,
+ CRT_DISPLAY_CTRL, TIMING, DISABLE);
+ POKE32(CRT_DISPLAY_CTRL, ulDisplayCtrlReg);
+ }
+ }
+}
+
+
+static void waitNextVerticalSync(int ctrl,int delay)
+{
+ unsigned int status;
+ if(!ctrl){
+ /* primary controller */
+
+ /* Do not wait when the Primary PLL is off or display control is already off.
+ This will prevent the software to wait forever. */
+ if ((FIELD_GET(PEEK32(PANEL_PLL_CTRL), PANEL_PLL_CTRL, POWER) ==
+ PANEL_PLL_CTRL_POWER_OFF) ||
+ (FIELD_GET(PEEK32(PANEL_DISPLAY_CTRL), PANEL_DISPLAY_CTRL, TIMING) ==
+ PANEL_DISPLAY_CTRL_TIMING_DISABLE))
+ {
+ return;
+ }
+
+ while (delay-- > 0)
+ {
+ /* Wait for end of vsync. */
+ do
+ {
+ status = FIELD_GET(PEEK32(SYSTEM_CTRL),
+ SYSTEM_CTRL,
+ PANEL_VSYNC);
+ }
+ while (status == SYSTEM_CTRL_PANEL_VSYNC_ACTIVE);
+
+ /* Wait for start of vsync. */
+ do
+ {
+ status = FIELD_GET(PEEK32(SYSTEM_CTRL),
+ SYSTEM_CTRL,
+ PANEL_VSYNC);
+ }
+ while (status == SYSTEM_CTRL_PANEL_VSYNC_INACTIVE);
+ }
+
+ }else{
+
+ /* Do not wait when the Primary PLL is off or display control is already off.
+ This will prevent the software to wait forever. */
+ if ((FIELD_GET(PEEK32(CRT_PLL_CTRL), CRT_PLL_CTRL, POWER) ==
+ CRT_PLL_CTRL_POWER_OFF) ||
+ (FIELD_GET(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, TIMING) ==
+ CRT_DISPLAY_CTRL_TIMING_DISABLE))
+ {
+ return;
+ }
+
+ while (delay-- > 0)
+ {
+ /* Wait for end of vsync. */
+ do
+ {
+ status = FIELD_GET(PEEK32(SYSTEM_CTRL),
+ SYSTEM_CTRL,
+ CRT_VSYNC);
+ }
+ while (status == SYSTEM_CTRL_CRT_VSYNC_ACTIVE);
+
+ /* Wait for start of vsync. */
+ do
+ {
+ status = FIELD_GET(PEEK32(SYSTEM_CTRL),
+ SYSTEM_CTRL,
+ CRT_VSYNC);
+ }
+ while (status == SYSTEM_CTRL_CRT_VSYNC_INACTIVE);
+ }
+ }
+}
+
+static void swPanelPowerSequence(int disp,int delay)
+{
+ unsigned int reg;
+
+ /* disp should be 1 to open sequence */
+ reg = PEEK32(PANEL_DISPLAY_CTRL);
+ reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,FPEN,disp);
+ POKE32(PANEL_DISPLAY_CTRL,reg);
+ primaryWaitVerticalSync(delay);
+
+
+ reg = PEEK32(PANEL_DISPLAY_CTRL);
+ reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,DATA,disp);
+ POKE32(PANEL_DISPLAY_CTRL,reg);
+ primaryWaitVerticalSync(delay);
+
+ reg = PEEK32(PANEL_DISPLAY_CTRL);
+ reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,VBIASEN,disp);
+ POKE32(PANEL_DISPLAY_CTRL,reg);
+ primaryWaitVerticalSync(delay);
+
+
+ reg = PEEK32(PANEL_DISPLAY_CTRL);
+ reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,FPEN,disp);
+ POKE32(PANEL_DISPLAY_CTRL,reg);
+ primaryWaitVerticalSync(delay);
+
+}
+
+void ddk750_setLogicalDispOut(disp_output_t output)
+{
+ unsigned int reg;
+ if(output & PNL_2_USAGE){
+ /* set panel path controller select */
+ reg = PEEK32(PANEL_DISPLAY_CTRL);
+ reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,SELECT,(output & PNL_2_MASK)>>PNL_2_OFFSET);
+ POKE32(PANEL_DISPLAY_CTRL,reg);
+ }
+
+ if(output & CRT_2_USAGE){
+ /* set crt path controller select */
+ reg = PEEK32(CRT_DISPLAY_CTRL);
+ reg = FIELD_VALUE(reg,CRT_DISPLAY_CTRL,SELECT,(output & CRT_2_MASK)>>CRT_2_OFFSET);
+ /*se blank off */
+ reg = FIELD_SET(reg,CRT_DISPLAY_CTRL,BLANK,OFF);
+ POKE32(CRT_DISPLAY_CTRL,reg);
+
+ }
+
+ if(output & PRI_TP_USAGE){
+ /* set primary timing and plane en_bit */
+ setDisplayControl(0,(output&PRI_TP_MASK)>>PRI_TP_OFFSET);
+ }
+
+ if(output & SEC_TP_USAGE){
+ /* set secondary timing and plane en_bit*/
+ setDisplayControl(1,(output&SEC_TP_MASK)>>SEC_TP_OFFSET);
+ }
+
+ if(output & PNL_SEQ_USAGE){
+ /* set panel sequence */
+ swPanelPowerSequence((output&PNL_SEQ_MASK)>>PNL_SEQ_OFFSET,4);
+ }
+
+ if(output & DAC_USAGE)
+ setDAC((output & DAC_MASK)>>DAC_OFFSET);
+
+ if(output & DPMS_USAGE)
+ ddk750_setDPMS((output & DPMS_MASK) >> DPMS_OFFSET);
+}
+
+
+int ddk750_initDVIDisp(void)
+{
+ /* Initialize DVI. If the dviInit fail and the VendorID or the DeviceID are
+ not zeroed, then set the failure flag. If it is zeroe, it might mean
+ that the system is in Dual CRT Monitor configuration. */
+
+ /* De-skew enabled with default 111b value.
+ This will fix some artifacts problem in some mode on board 2.2.
+ Somehow this fix does not affect board 2.1.
+ */
+ if ((dviInit(1, /* Select Rising Edge */
+ 1, /* Select 24-bit bus */
+ 0, /* Select Single Edge clock */
+ 1, /* Enable HSync as is */
+ 1, /* Enable VSync as is */
+ 1, /* Enable De-skew */
+ 7, /* Set the de-skew setting to maximum setup */
+ 1, /* Enable continuous Sync */
+ 1, /* Enable PLL Filter */
+ 4 /* Use the recommended value for PLL Filter value */
+ ) != 0) && (dviGetVendorID() != 0x0000) && (dviGetDeviceID() != 0x0000))
+ {
+ return (-1);
+ }
+
+ /* TODO: Initialize other display component */
+
+ /* Success */
+ return 0;
+
+}
+
--- /dev/null
+#ifndef DDK750_DISPLAY_H__
+#define DDK750_DISPLAY_H__
+
+/* panel path select
+ 80000[29:28]
+*/
+
+#define PNL_2_OFFSET 0
+#define PNL_2_MASK (3 << PNL_2_OFFSET)
+#define PNL_2_USAGE (PNL_2_MASK << 16)
+#define PNL_2_PRI ((0 << PNL_2_OFFSET)|PNL_2_USAGE)
+#define PNL_2_SEC ((2 << PNL_2_OFFSET)|PNL_2_USAGE)
+
+
+/* primary timing & plane enable bit
+ 1: 80000[8] & 80000[2] on
+ 0: both off
+*/
+#define PRI_TP_OFFSET 4
+#define PRI_TP_MASK (1 << PRI_TP_OFFSET)
+#define PRI_TP_USAGE (PRI_TP_MASK << 16)
+#define PRI_TP_ON ((0x1 << PRI_TP_OFFSET)|PRI_TP_USAGE)
+#define PRI_TP_OFF ((0x0 << PRI_TP_OFFSET)|PRI_TP_USAGE)
+
+
+/* panel sequency status
+ 80000[27:24]
+*/
+#define PNL_SEQ_OFFSET 6
+#define PNL_SEQ_MASK (1 << PNL_SEQ_OFFSET)
+#define PNL_SEQ_USAGE (PNL_SEQ_MASK << 16)
+#define PNL_SEQ_ON ((1 << PNL_SEQ_OFFSET)|PNL_SEQ_USAGE)
+#define PNL_SEQ_OFF ((0 << PNL_SEQ_OFFSET)|PNL_SEQ_USAGE)
+
+/* dual digital output
+ 80000[19]
+*/
+#define DUAL_TFT_OFFSET 8
+#define DUAL_TFT_MASK (1 << DUAL_TFT_OFFSET)
+#define DUAL_TFT_USAGE (DUAL_TFT_MASK << 16)
+#define DUAL_TFT_ON ((1 << DUAL_TFT_OFFSET)|DUAL_TFT_USAGE)
+#define DUAL_TFT_OFF ((0 << DUAL_TFT_OFFSET)|DUAL_TFT_USAGE)
+
+/* secondary timing & plane enable bit
+ 1:80200[8] & 80200[2] on
+ 0: both off
+*/
+#define SEC_TP_OFFSET 5
+#define SEC_TP_MASK (1<< SEC_TP_OFFSET)
+#define SEC_TP_USAGE (SEC_TP_MASK << 16)
+#define SEC_TP_ON ((0x1 << SEC_TP_OFFSET)|SEC_TP_USAGE)
+#define SEC_TP_OFF ((0x0 << SEC_TP_OFFSET)|SEC_TP_USAGE)
+
+/* crt path select
+ 80200[19:18]
+*/
+#define CRT_2_OFFSET 2
+#define CRT_2_MASK (3 << CRT_2_OFFSET)
+#define CRT_2_USAGE (CRT_2_MASK << 16)
+#define CRT_2_PRI ((0x0 << CRT_2_OFFSET)|CRT_2_USAGE)
+#define CRT_2_SEC ((0x2 << CRT_2_OFFSET)|CRT_2_USAGE)
+
+
+/* DAC affect both DVI and DSUB
+ 4[20]
+*/
+#define DAC_OFFSET 7
+#define DAC_MASK (1 << DAC_OFFSET)
+#define DAC_USAGE (DAC_MASK << 16)
+#define DAC_ON ((0x0<< DAC_OFFSET)|DAC_USAGE)
+#define DAC_OFF ((0x1 << DAC_OFFSET)|DAC_USAGE)
+
+/* DPMS only affect D-SUB head
+ 0[31:30]
+*/
+#define DPMS_OFFSET 9
+#define DPMS_MASK (3 << DPMS_OFFSET)
+#define DPMS_USAGE (DPMS_MASK << 16)
+#define DPMS_OFF ((3 << DPMS_OFFSET)|DPMS_USAGE)
+#define DPMS_ON ((0 << DPMS_OFFSET)|DPMS_USAGE)
+
+
+
+/*
+ LCD1 means panel path TFT1 & panel path DVI (so enable DAC)
+ CRT means crt path DSUB
+*/
+#if 0
+typedef enum _disp_output_t
+{
+ NO_DISPLAY = DPMS_OFF,
+
+ LCD1_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|DPMS_OFF|DAC_ON,
+ LCD1_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|DPMS_OFF|DAC_ON,
+
+ LCD2_PRI = CRT_2_PRI|PRI_TP_ON|DUAL_TFT_ON|DPMS_OFF,
+ LCD2_SEC = CRT_2_SEC|SEC_TP_ON|DUAL_TFT_ON|DPMS_OFF,
+
+ DSUB_PRI = CRT_2_PRI|PRI_TP_ON|DAC_ON,
+ DSUB_SEC = CRT_2_SEC|SEC_TP_ON|DAC_ON,
+
+ LCD1_DSUB_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|
+ CRT_2_PRI|SEC_TP_OFF|DAC_ON,
+
+ LCD1_DSUB_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|
+ CRT_2_SEC|PRI_TP_OFF|DAC_ON,
+
+ /* LCD1 show primary and DSUB show secondary */
+ LCD1_DSUB_DUAL = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|
+ CRT_2_SEC|SEC_TP_ON|DAC_ON,
+
+ /* LCD1 show secondary and DSUB show primary */
+ LCD1_DSUB_DUAL_SWAP = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|
+ CRT_2_PRI|PRI_TP_ON|DAC_ON,
+
+ LCD1_LCD2_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|
+ CRT_2_PRI|SEC_TP_OFF|DPMS_OFF|DUAL_TFT_ON,
+
+ LCD1_LCD2_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|
+ CRT_2_SEC|PRI_TP_OFF|DPMS_OFF|DUAL_TFT_ON,
+
+ LCD1_LCD2_DSUB_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|DAC_ON|
+ CRT_2_PRI|SEC_TP_OFF|DPMS_ON|DUAL_TFT_ON,
+
+ LCD1_LCD2_DSUB_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|DAC_ON|
+ CRT_2_SEC|PRI_TP_OFF|DPMS_ON|DUAL_TFT_ON,
+
+
+}
+disp_output_t;
+#else
+typedef enum _disp_output_t{
+ do_LCD1_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|DAC_ON,
+ do_LCD1_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|DAC_ON,
+#if 0
+ do_LCD2_PRI = CRT_2_PRI|PRI_TP_ON,
+ do_LCD2_SEC = CRT_2_SEC|SEC_TP_ON,
+#else
+ do_LCD2_PRI = CRT_2_PRI|PRI_TP_ON|DUAL_TFT_ON,
+ do_LCD2_SEC = CRT_2_SEC|SEC_TP_ON|DUAL_TFT_ON,
+#endif
+ /*
+ do_DSUB_PRI = CRT_2_PRI|PRI_TP_ON|DPMS_ON|DAC_ON,
+ do_DSUB_SEC = CRT_2_SEC|SEC_TP_ON|DPMS_ON|DAC_ON,
+ */
+#if 0
+ do_CRT_PRI = CRT_2_PRI|PRI_TP_ON,
+ do_CRT_SEC = CRT_2_SEC|SEC_TP_ON,
+#else
+ do_CRT_PRI = CRT_2_PRI|PRI_TP_ON|DPMS_ON|DAC_ON,
+ do_CRT_SEC = CRT_2_SEC|SEC_TP_ON|DPMS_ON|DAC_ON,
+#endif
+}
+disp_output_t;
+#endif
+
+void ddk750_setLogicalDispOut(disp_output_t);
+int ddk750_initDVIDisp(void);
+
+#endif
--- /dev/null
+#define USE_DVICHIP
+#ifdef USE_DVICHIP
+#include "ddk750_help.h"
+#include "ddk750_reg.h"
+#include "ddk750_dvi.h"
+#include "ddk750_sii164.h"
+
+
+/* This global variable contains all the supported driver and its corresponding
+ function API. Please set the function pointer to NULL whenever the function
+ is not supported. */
+static dvi_ctrl_device_t g_dcftSupportedDviController[] =
+{
+#ifdef DVI_CTRL_SII164
+ {
+ .pfnInit = sii164InitChip,
+ .pfnGetVendorId = sii164GetVendorID,
+ .pfnGetDeviceId = sii164GetDeviceID,
+#ifdef SII164_FULL_FUNCTIONS
+ .pfnResetChip = sii164ResetChip,
+ .pfnGetChipString = sii164GetChipString,
+ .pfnSetPower = sii164SetPower,
+ .pfnEnableHotPlugDetection = sii164EnableHotPlugDetection,
+ .pfnIsConnected = sii164IsConnected,
+ .pfnCheckInterrupt = sii164CheckInterrupt,
+ .pfnClearInterrupt = sii164ClearInterrupt,
+#endif
+ },
+#endif
+};
+
+
+int dviInit(
+ unsigned char edgeSelect,
+ unsigned char busSelect,
+ unsigned char dualEdgeClkSelect,
+ unsigned char hsyncEnable,
+ unsigned char vsyncEnable,
+ unsigned char deskewEnable,
+ unsigned char deskewSetting,
+ unsigned char continuousSyncEnable,
+ unsigned char pllFilterEnable,
+ unsigned char pllFilterValue
+ )
+{
+ dvi_ctrl_device_t *pCurrentDviCtrl;
+ pCurrentDviCtrl = g_dcftSupportedDviController;
+ if(pCurrentDviCtrl->pfnInit != NULL)
+ {
+ return pCurrentDviCtrl->pfnInit(edgeSelect, busSelect, dualEdgeClkSelect, hsyncEnable,
+ vsyncEnable, deskewEnable, deskewSetting, continuousSyncEnable,
+ pllFilterEnable, pllFilterValue);
+ }
+ return -1;//error
+}
+
+
+/*
+ * dviGetVendorID
+ * This function gets the vendor ID of the DVI controller chip.
+ *
+ * Output:
+ * Vendor ID
+ */
+unsigned short dviGetVendorID(void)
+{
+ dvi_ctrl_device_t *pCurrentDviCtrl;
+
+ //pCurrentDviCtrl = getDviCtrl();
+ pCurrentDviCtrl = g_dcftSupportedDviController;
+ if (pCurrentDviCtrl != (dvi_ctrl_device_t *)0)
+ return pCurrentDviCtrl->pfnGetVendorId();
+
+ return 0x0000;
+}
+
+
+/*
+ * dviGetDeviceID
+ * This function gets the device ID of the DVI controller chip.
+ *
+ * Output:
+ * Device ID
+ */
+unsigned short dviGetDeviceID(void)
+{
+ dvi_ctrl_device_t *pCurrentDviCtrl;
+
+// pCurrentDviCtrl = getDviCtrl();
+ pCurrentDviCtrl = g_dcftSupportedDviController;
+ if (pCurrentDviCtrl != (dvi_ctrl_device_t *)0)
+ return pCurrentDviCtrl->pfnGetDeviceId();
+
+ return 0x0000;
+}
+
+#endif
+
+
--- /dev/null
+#ifndef DDK750_DVI_H__
+#define DDK750_DVI_H__
+
+/* dvi chip stuffs structros */
+
+typedef long (*PFN_DVICTRL_INIT)(
+ unsigned char edgeSelect,
+ unsigned char busSelect,
+ unsigned char dualEdgeClkSelect,
+ unsigned char hsyncEnable,
+ unsigned char vsyncEnable,
+ unsigned char deskewEnable,
+ unsigned char deskewSetting,
+ unsigned char continuousSyncEnable,
+ unsigned char pllFilterEnable,
+ unsigned char pllFilterValue);
+typedef void (*PFN_DVICTRL_RESETCHIP)(void);
+typedef char* (*PFN_DVICTRL_GETCHIPSTRING)(void);
+typedef unsigned short (*PFN_DVICTRL_GETVENDORID)(void);
+typedef unsigned short (*PFN_DVICTRL_GETDEVICEID)(void);
+typedef void (*PFN_DVICTRL_SETPOWER)(unsigned char powerUp);
+typedef void (*PFN_DVICTRL_HOTPLUGDETECTION)(unsigned char enableHotPlug);
+typedef unsigned char (*PFN_DVICTRL_ISCONNECTED)(void);
+typedef unsigned char (*PFN_DVICTRL_CHECKINTERRUPT)(void);
+typedef void (*PFN_DVICTRL_CLEARINTERRUPT)(void);
+
+
+
+/* Structure to hold all the function pointer to the DVI Controller. */
+typedef struct _dvi_ctrl_device_t
+{
+ PFN_DVICTRL_INIT pfnInit;
+ PFN_DVICTRL_RESETCHIP pfnResetChip;
+ PFN_DVICTRL_GETCHIPSTRING pfnGetChipString;
+ PFN_DVICTRL_GETVENDORID pfnGetVendorId;
+ PFN_DVICTRL_GETDEVICEID pfnGetDeviceId;
+ PFN_DVICTRL_SETPOWER pfnSetPower;
+ PFN_DVICTRL_HOTPLUGDETECTION pfnEnableHotPlugDetection;
+ PFN_DVICTRL_ISCONNECTED pfnIsConnected;
+ PFN_DVICTRL_CHECKINTERRUPT pfnCheckInterrupt;
+ PFN_DVICTRL_CLEARINTERRUPT pfnClearInterrupt;
+} dvi_ctrl_device_t;
+#define DVI_CTRL_SII164
+
+
+
+/* dvi functions prototype */
+int dviInit(
+ unsigned char edgeSelect,
+ unsigned char busSelect,
+ unsigned char dualEdgeClkSelect,
+ unsigned char hsyncEnable,
+ unsigned char vsyncEnable,
+ unsigned char deskewEnable,
+ unsigned char deskewSetting,
+ unsigned char continuousSyncEnable,
+ unsigned char pllFilterEnable,
+ unsigned char pllFilterValue
+);
+
+unsigned short dviGetVendorID(void);
+unsigned short dviGetDeviceID(void);
+
+
+
+#endif
+
--- /dev/null
+//#include "ddk750_reg.h"
+//#include "ddk750_chip.h"
+#include "ddk750_help.h"
+
+void __iomem * mmio750 = NULL;
+char revId750 = 0;
+unsigned short devId750 = 0;
+
+/* after driver mapped io registers, use this function first */
+void ddk750_set_mmio(void __iomem * addr,unsigned short devId,char revId)
+{
+ mmio750 = addr;
+ devId750 = devId;
+ revId750 = revId;
+ if(revId == 0xfe)
+ printk("found sm750le\n");
+}
+
+
--- /dev/null
+#ifndef DDK750_HELP_H__
+#define DDK750_HELP_H__
+#include "ddk750_chip.h"
+#ifndef USE_INTERNAL_REGISTER_ACCESS
+
+#include <linux/ioport.h>
+#include <asm/io.h>
+#include <asm/uaccess.h>
+#include "sm750_help.h"
+
+
+#if 0
+/* if 718 big endian turned on,be aware that don't use this driver for general use,only for ppc big-endian */
+#warning "big endian on target cpu and enable nature big endian support of 718 capability !"
+#define PEEK32(addr) __raw_readl(mmio750 + addr)
+#define POKE32(addr,data) __raw_writel(data, mmio750 + addr)
+#else /* software control endianess */
+#define PEEK32(addr) readl(addr + mmio750)
+#define POKE32(addr,data) writel(data, addr + mmio750)
+#endif
+
+extern void __iomem * mmio750;
+extern char revId750;
+extern unsigned short devId750;
+#else
+/* implement if you want use it*/
+#endif
+
+#endif
--- /dev/null
+#define USE_HW_I2C
+#ifdef USE_HW_I2C
+#include "ddk750_help.h"
+#include "ddk750_reg.h"
+#include "ddk750_hwi2c.h"
+#include "ddk750_power.h"
+
+#define MAX_HWI2C_FIFO 16
+#define HWI2C_WAIT_TIMEOUT 0xF0000
+
+
+int hwI2CInit(
+ unsigned char busSpeedMode
+)
+{
+ unsigned int value;
+
+ /* Enable GPIO 30 & 31 as IIC clock & data */
+ value = PEEK32(GPIO_MUX);
+
+ value = FIELD_SET(value, GPIO_MUX, 30, I2C) |
+ FIELD_SET(0, GPIO_MUX, 31, I2C);
+ POKE32(GPIO_MUX, value);
+
+ /* Enable Hardware I2C power.
+ TODO: Check if we need to enable GPIO power?
+ */
+ enableI2C(1);
+
+ /* Enable the I2C Controller and set the bus speed mode */
+ value = PEEK32(I2C_CTRL);
+ if (busSpeedMode == 0)
+ value = FIELD_SET(value, I2C_CTRL, MODE, STANDARD);
+ else
+ value = FIELD_SET(value, I2C_CTRL, MODE, FAST);
+ value = FIELD_SET(value, I2C_CTRL, EN, ENABLE);
+ POKE32(I2C_CTRL, value);
+
+ return 0;
+}
+
+
+void hwI2CClose(void)
+{
+ unsigned int value;
+
+ /* Disable I2C controller */
+ value = PEEK32(I2C_CTRL);
+ value = FIELD_SET(value, I2C_CTRL, EN, DISABLE);
+ POKE32(I2C_CTRL, value);
+
+ /* Disable I2C Power */
+ enableI2C(0);
+
+ /* Set GPIO 30 & 31 back as GPIO pins */
+ value = PEEK32(GPIO_MUX);
+ value = FIELD_SET(value, GPIO_MUX, 30, GPIO);
+ value = FIELD_SET(value, GPIO_MUX, 31, GPIO);
+ POKE32(GPIO_MUX, value);
+}
+
+
+static long hwI2CWaitTXDone(void)
+{
+ unsigned int timeout;
+
+ /* Wait until the transfer is completed. */
+ timeout = HWI2C_WAIT_TIMEOUT;
+ while ((FIELD_GET(PEEK32(I2C_STATUS), I2C_STATUS, TX) != I2C_STATUS_TX_COMPLETED) &&
+ (timeout != 0))
+ timeout--;
+
+ if (timeout == 0)
+ return (-1);
+
+ return 0;
+}
+
+
+
+/*
+ * This function writes data to the i2c slave device registers.
+ *
+ * Parameters:
+ * deviceAddress - i2c Slave device address
+ * length - Total number of bytes to be written to the device
+ * pBuffer - The buffer that contains the data to be written to the
+ * i2c device.
+ *
+ * Return Value:
+ * Total number of bytes those are actually written.
+ */
+static unsigned int hwI2CWriteData(
+ unsigned char deviceAddress,
+ unsigned int length,
+ unsigned char *pBuffer
+)
+{
+ unsigned char count, i;
+ unsigned int totalBytes = 0;
+
+ /* Set the Device Address */
+ POKE32(I2C_SLAVE_ADDRESS, deviceAddress & ~0x01);
+
+ /* Write data.
+ * Note:
+ * Only 16 byte can be accessed per i2c start instruction.
+ */
+ do
+ {
+ /* Reset I2C by writing 0 to I2C_RESET register to clear the previous status. */
+ POKE32(I2C_RESET, 0);
+
+ /* Set the number of bytes to be written */
+ if (length < MAX_HWI2C_FIFO)
+ count = length - 1;
+ else
+ count = MAX_HWI2C_FIFO - 1;
+ POKE32(I2C_BYTE_COUNT, count);
+
+ /* Move the data to the I2C data register */
+ for (i = 0; i <= count; i++)
+ POKE32(I2C_DATA0 + i, *pBuffer++);
+
+ /* Start the I2C */
+ POKE32(I2C_CTRL, FIELD_SET(PEEK32(I2C_CTRL), I2C_CTRL, CTRL, START));
+
+ /* Wait until the transfer is completed. */
+ if (hwI2CWaitTXDone() != 0)
+ break;
+
+ /* Substract length */
+ length -= (count + 1);
+
+ /* Total byte written */
+ totalBytes += (count + 1);
+
+ } while (length > 0);
+
+ return totalBytes;
+}
+
+
+
+
+/*
+ * This function reads data from the slave device and stores them
+ * in the given buffer
+ *
+ * Parameters:
+ * deviceAddress - i2c Slave device address
+ * length - Total number of bytes to be read
+ * pBuffer - Pointer to a buffer to be filled with the data read
+ * from the slave device. It has to be the same size as the
+ * length to make sure that it can keep all the data read.
+ *
+ * Return Value:
+ * Total number of actual bytes read from the slave device
+ */
+static unsigned int hwI2CReadData(
+ unsigned char deviceAddress,
+ unsigned int length,
+ unsigned char *pBuffer
+)
+{
+ unsigned char count, i;
+ unsigned int totalBytes = 0;
+
+ /* Set the Device Address */
+ POKE32(I2C_SLAVE_ADDRESS, deviceAddress | 0x01);
+
+ /* Read data and save them to the buffer.
+ * Note:
+ * Only 16 byte can be accessed per i2c start instruction.
+ */
+ do
+ {
+ /* Reset I2C by writing 0 to I2C_RESET register to clear all the status. */
+ POKE32(I2C_RESET, 0);
+
+ /* Set the number of bytes to be read */
+ if (length <= MAX_HWI2C_FIFO)
+ count = length - 1;
+ else
+ count = MAX_HWI2C_FIFO - 1;
+ POKE32(I2C_BYTE_COUNT, count);
+
+ /* Start the I2C */
+ POKE32(I2C_CTRL, FIELD_SET(PEEK32(I2C_CTRL), I2C_CTRL, CTRL, START));
+
+ /* Wait until transaction done. */
+ if (hwI2CWaitTXDone() != 0)
+ break;
+
+ /* Save the data to the given buffer */
+ for (i = 0; i <= count; i++)
+ *pBuffer++ = PEEK32(I2C_DATA0 + i);
+
+ /* Substract length by 16 */
+ length -= (count + 1);
+
+ /* Number of bytes read. */
+ totalBytes += (count + 1);
+
+ } while (length > 0);
+
+ return totalBytes;
+}
+
+
+
+
+/*
+ * This function reads the slave device's register
+ *
+ * Parameters:
+ * deviceAddress - i2c Slave device address which register
+ * to be read from
+ * registerIndex - Slave device's register to be read
+ *
+ * Return Value:
+ * Register value
+ */
+unsigned char hwI2CReadReg(
+ unsigned char deviceAddress,
+ unsigned char registerIndex
+)
+{
+ unsigned char value = (0xFF);
+
+ if (hwI2CWriteData(deviceAddress, 1, ®isterIndex) == 1)
+ hwI2CReadData(deviceAddress, 1, &value);
+
+ return value;
+}
+
+
+
+
+
+/*
+ * This function writes a value to the slave device's register
+ *
+ * Parameters:
+ * deviceAddress - i2c Slave device address which register
+ * to be written
+ * registerIndex - Slave device's register to be written
+ * data - Data to be written to the register
+ *
+ * Result:
+ * 0 - Success
+ * -1 - Fail
+ */
+int hwI2CWriteReg(
+ unsigned char deviceAddress,
+ unsigned char registerIndex,
+ unsigned char data
+)
+{
+ unsigned char value[2];
+
+ value[0] = registerIndex;
+ value[1] = data;
+ if (hwI2CWriteData(deviceAddress, 2, value) == 2)
+ return 0;
+
+ return (-1);
+}
+
+
+#endif
--- /dev/null
+#ifndef DDK750_HWI2C_H__
+#define DDK750_HWI2C_H__
+
+/* hwi2c functions */
+int hwI2CInit(unsigned char busSpeedMode);
+void hwI2CClose(void);
+
+unsigned char hwI2CReadReg(unsigned char deviceAddress,unsigned char registerIndex);
+int hwI2CWriteReg(unsigned char deviceAddress,unsigned char registerIndex,unsigned char data);
+#endif
--- /dev/null
+
+#include "ddk750_help.h"
+#include "ddk750_reg.h"
+#include "ddk750_mode.h"
+#include "ddk750_chip.h"
+
+/*
+ SM750LE only:
+ This function takes care extra registers and bit fields required to set
+ up a mode in SM750LE
+
+ Explanation about Display Control register:
+ HW only supports 7 predefined pixel clocks, and clock select is
+ in bit 29:27 of Display Control register.
+*/
+static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, unsigned long dispControl)
+{
+ unsigned long x, y;
+
+ x = pModeParam->horizontal_display_end;
+ y = pModeParam->vertical_display_end;
+
+ /* SM750LE has to set up the top-left and bottom-right
+ registers as well.
+ Note that normal SM750/SM718 only use those two register for
+ auto-centering mode.
+ */
+ POKE32(CRT_AUTO_CENTERING_TL,
+ FIELD_VALUE(0, CRT_AUTO_CENTERING_TL, TOP, 0)
+ | FIELD_VALUE(0, CRT_AUTO_CENTERING_TL, LEFT, 0));
+
+ POKE32(CRT_AUTO_CENTERING_BR,
+ FIELD_VALUE(0, CRT_AUTO_CENTERING_BR, BOTTOM, y-1)
+ | FIELD_VALUE(0, CRT_AUTO_CENTERING_BR, RIGHT, x-1));
+
+ /* Assume common fields in dispControl have been properly set before
+ calling this function.
+ This function only sets the extra fields in dispControl.
+ */
+
+ /* Clear bit 29:27 of display control register */
+ dispControl &= FIELD_CLEAR(CRT_DISPLAY_CTRL, CLK);
+
+ /* Set bit 29:27 of display control register for the right clock */
+ /* Note that SM750LE only need to supported 7 resoluitons. */
+ if ( x == 800 && y == 600 )
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL41);
+ else if (x == 1024 && y == 768)
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL65);
+ else if (x == 1152 && y == 864)
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL80);
+ else if (x == 1280 && y == 768)
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL80);
+ else if (x == 1280 && y == 720)
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL74);
+ else if (x == 1280 && y == 960)
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL108);
+ else if (x == 1280 && y == 1024)
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL108);
+ else /* default to VGA clock */
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL25);
+
+ /* Set bit 25:24 of display controller */
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CRTSELECT, CRT);
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, RGBBIT, 24BIT);
+
+ /* Set bit 14 of display controller */
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLOCK_PHASE, ACTIVE_LOW);
+
+ POKE32(CRT_DISPLAY_CTRL, dispControl);
+
+ return dispControl;
+}
+
+
+
+/* only timing related registers will be programed */
+static int programModeRegisters(mode_parameter_t * pModeParam,pll_value_t * pll)
+{
+ int ret = 0;
+ int cnt = 0;
+ unsigned int ulTmpValue,ulReg;
+ if(pll->clockType == SECONDARY_PLL)
+ {
+ /* programe secondary pixel clock */
+ POKE32(CRT_PLL_CTRL,formatPllReg(pll));
+ POKE32(CRT_HORIZONTAL_TOTAL,
+ FIELD_VALUE(0, CRT_HORIZONTAL_TOTAL, TOTAL, pModeParam->horizontal_total - 1)
+ | FIELD_VALUE(0, CRT_HORIZONTAL_TOTAL, DISPLAY_END, pModeParam->horizontal_display_end - 1));
+
+ POKE32(CRT_HORIZONTAL_SYNC,
+ FIELD_VALUE(0, CRT_HORIZONTAL_SYNC, WIDTH, pModeParam->horizontal_sync_width)
+ | FIELD_VALUE(0, CRT_HORIZONTAL_SYNC, START, pModeParam->horizontal_sync_start - 1));
+
+ POKE32(CRT_VERTICAL_TOTAL,
+ FIELD_VALUE(0, CRT_VERTICAL_TOTAL, TOTAL, pModeParam->vertical_total - 1)
+ | FIELD_VALUE(0, CRT_VERTICAL_TOTAL, DISPLAY_END, pModeParam->vertical_display_end - 1));
+
+ POKE32(CRT_VERTICAL_SYNC,
+ FIELD_VALUE(0, CRT_VERTICAL_SYNC, HEIGHT, pModeParam->vertical_sync_height)
+ | FIELD_VALUE(0, CRT_VERTICAL_SYNC, START, pModeParam->vertical_sync_start - 1));
+
+
+ ulTmpValue = FIELD_VALUE(0,CRT_DISPLAY_CTRL,VSYNC_PHASE,pModeParam->vertical_sync_polarity)|
+ FIELD_VALUE(0,CRT_DISPLAY_CTRL,HSYNC_PHASE,pModeParam->horizontal_sync_polarity)|
+ FIELD_SET(0,CRT_DISPLAY_CTRL,TIMING,ENABLE)|
+ FIELD_SET(0,CRT_DISPLAY_CTRL,PLANE,ENABLE);
+
+
+ if(getChipType() == SM750LE){
+ displayControlAdjust_SM750LE(pModeParam,ulTmpValue);
+ }else{
+ ulReg = PEEK32(CRT_DISPLAY_CTRL)
+ & FIELD_CLEAR(CRT_DISPLAY_CTRL,VSYNC_PHASE)
+ & FIELD_CLEAR(CRT_DISPLAY_CTRL,HSYNC_PHASE)
+ & FIELD_CLEAR(CRT_DISPLAY_CTRL,TIMING)
+ & FIELD_CLEAR(CRT_DISPLAY_CTRL,PLANE);
+
+ POKE32(CRT_DISPLAY_CTRL,ulTmpValue|ulReg);
+ }
+
+ }
+ else if(pll->clockType == PRIMARY_PLL)
+ {
+ unsigned int ulReservedBits;
+ POKE32(PANEL_PLL_CTRL,formatPllReg(pll));
+
+ POKE32(PANEL_HORIZONTAL_TOTAL,
+ FIELD_VALUE(0, PANEL_HORIZONTAL_TOTAL, TOTAL, pModeParam->horizontal_total - 1)
+ | FIELD_VALUE(0, PANEL_HORIZONTAL_TOTAL, DISPLAY_END, pModeParam->horizontal_display_end - 1));
+
+ POKE32(PANEL_HORIZONTAL_SYNC,
+ FIELD_VALUE(0, PANEL_HORIZONTAL_SYNC, WIDTH, pModeParam->horizontal_sync_width)
+ | FIELD_VALUE(0, PANEL_HORIZONTAL_SYNC, START, pModeParam->horizontal_sync_start - 1));
+
+ POKE32(PANEL_VERTICAL_TOTAL,
+ FIELD_VALUE(0, PANEL_VERTICAL_TOTAL, TOTAL, pModeParam->vertical_total - 1)
+ | FIELD_VALUE(0, PANEL_VERTICAL_TOTAL, DISPLAY_END, pModeParam->vertical_display_end - 1));
+
+ POKE32(PANEL_VERTICAL_SYNC,
+ FIELD_VALUE(0, PANEL_VERTICAL_SYNC, HEIGHT, pModeParam->vertical_sync_height)
+ | FIELD_VALUE(0, PANEL_VERTICAL_SYNC, START, pModeParam->vertical_sync_start - 1));
+
+ ulTmpValue = FIELD_VALUE(0,PANEL_DISPLAY_CTRL,VSYNC_PHASE,pModeParam->vertical_sync_polarity)|
+ FIELD_VALUE(0,PANEL_DISPLAY_CTRL,HSYNC_PHASE,pModeParam->horizontal_sync_polarity)|
+ FIELD_VALUE(0,PANEL_DISPLAY_CTRL,CLOCK_PHASE,pModeParam->clock_phase_polarity)|
+ FIELD_SET(0,PANEL_DISPLAY_CTRL,TIMING,ENABLE)|
+ FIELD_SET(0,PANEL_DISPLAY_CTRL,PLANE,ENABLE);
+
+ ulReservedBits = FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_1_MASK, ENABLE) |
+ FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_2_MASK, ENABLE) |
+ FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_3_MASK, ENABLE)|
+ FIELD_SET(0,PANEL_DISPLAY_CTRL,VSYNC,ACTIVE_LOW);
+
+ ulReg = (PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits)
+ & FIELD_CLEAR(PANEL_DISPLAY_CTRL, CLOCK_PHASE)
+ & FIELD_CLEAR(PANEL_DISPLAY_CTRL, VSYNC_PHASE)
+ & FIELD_CLEAR(PANEL_DISPLAY_CTRL, HSYNC_PHASE)
+ & FIELD_CLEAR(PANEL_DISPLAY_CTRL, TIMING)
+ & FIELD_CLEAR(PANEL_DISPLAY_CTRL, PLANE);
+
+
+ /* May a hardware bug or just my test chip (not confirmed).
+ * PANEL_DISPLAY_CTRL register seems requiring few writes
+ * before a value can be succesfully written in.
+ * Added some masks to mask out the reserved bits.
+ * Note: This problem happens by design. The hardware will wait for the
+ * next vertical sync to turn on/off the plane.
+ */
+
+ POKE32(PANEL_DISPLAY_CTRL,ulTmpValue|ulReg);
+#if 1
+ while((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) != (ulTmpValue|ulReg))
+ {
+ cnt++;
+ if(cnt > 1000)
+ break;
+ POKE32(PANEL_DISPLAY_CTRL,ulTmpValue|ulReg);
+ }
+#endif
+ }
+ else{
+ ret = -1;
+ }
+ return ret;
+}
+
+int ddk750_setModeTiming(mode_parameter_t * parm,clock_type_t clock)
+{
+ pll_value_t pll;
+ unsigned int uiActualPixelClk;
+ pll.inputFreq = DEFAULT_INPUT_CLOCK;
+ pll.clockType = clock;
+
+ uiActualPixelClk = calcPllValue(parm->pixel_clock,&pll);
+ if(getChipType() == SM750LE){
+ /* set graphic mode via IO method */
+ outb_p(0x88,0x3d4);
+ outb_p(0x06,0x3d5);
+ }
+ programModeRegisters(parm,&pll);
+ return 0;
+}
+
+
--- /dev/null
+#ifndef DDK750_MODE_H__
+#define DDK750_MODE_H__
+
+#include "ddk750_chip.h"
+
+typedef enum _spolarity_t
+{
+ POS = 0, /* positive */
+ NEG, /* negative */
+}
+spolarity_t;
+
+
+typedef struct _mode_parameter_t
+{
+ /* Horizontal timing. */
+ unsigned long horizontal_total;
+ unsigned long horizontal_display_end;
+ unsigned long horizontal_sync_start;
+ unsigned long horizontal_sync_width;
+ spolarity_t horizontal_sync_polarity;
+
+ /* Vertical timing. */
+ unsigned long vertical_total;
+ unsigned long vertical_display_end;
+ unsigned long vertical_sync_start;
+ unsigned long vertical_sync_height;
+ spolarity_t vertical_sync_polarity;
+
+ /* Refresh timing. */
+ unsigned long pixel_clock;
+ unsigned long horizontal_frequency;
+ unsigned long vertical_frequency;
+
+ /* Clock Phase. This clock phase only applies to Panel. */
+ spolarity_t clock_phase_polarity;
+}
+mode_parameter_t;
+
+int ddk750_setModeTiming(mode_parameter_t *,clock_type_t);
+
+
+#endif
--- /dev/null
+#include "ddk750_help.h"
+#include "ddk750_reg.h"
+#include "ddk750_power.h"
+
+void ddk750_setDPMS(DPMS_t state)
+{
+ unsigned int value;
+ if(getChipType() == SM750LE){
+ value = PEEK32(CRT_DISPLAY_CTRL);
+ POKE32(CRT_DISPLAY_CTRL,FIELD_VALUE(value,CRT_DISPLAY_CTRL,DPMS,state));
+ }else{
+ value = PEEK32(SYSTEM_CTRL);
+ value= FIELD_VALUE(value,SYSTEM_CTRL,DPMS,state);
+ POKE32(SYSTEM_CTRL, value);
+ }
+}
+
+unsigned int getPowerMode(void)
+{
+ if(getChipType() == SM750LE)
+ return 0;
+ return (FIELD_GET(PEEK32(POWER_MODE_CTRL), POWER_MODE_CTRL, MODE));
+}
+
+
+/*
+ * SM50x can operate in one of three modes: 0, 1 or Sleep.
+ * On hardware reset, power mode 0 is default.
+ */
+void setPowerMode(unsigned int powerMode)
+{
+ unsigned int control_value = 0;
+
+ control_value = PEEK32(POWER_MODE_CTRL);
+
+ if(getChipType() == SM750LE)
+ return;
+
+ switch (powerMode)
+ {
+ case POWER_MODE_CTRL_MODE_MODE0:
+ control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE, MODE0);
+ break;
+
+ case POWER_MODE_CTRL_MODE_MODE1:
+ control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE, MODE1);
+ break;
+
+ case POWER_MODE_CTRL_MODE_SLEEP:
+ control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE, SLEEP);
+ break;
+
+ default:
+ break;
+ }
+
+ /* Set up other fields in Power Control Register */
+ if (powerMode == POWER_MODE_CTRL_MODE_SLEEP)
+ {
+ control_value =
+#ifdef VALIDATION_CHIP
+ FIELD_SET( control_value, POWER_MODE_CTRL, 336CLK, OFF) |
+#endif
+ FIELD_SET( control_value, POWER_MODE_CTRL, OSC_INPUT, OFF);
+ }
+ else
+ {
+ control_value =
+#ifdef VALIDATION_CHIP
+ FIELD_SET( control_value, POWER_MODE_CTRL, 336CLK, ON) |
+#endif
+ FIELD_SET( control_value, POWER_MODE_CTRL, OSC_INPUT, ON);
+ }
+
+ /* Program new power mode. */
+ POKE32(POWER_MODE_CTRL, control_value);
+}
+
+void setCurrentGate(unsigned int gate)
+{
+ unsigned int gate_reg;
+ unsigned int mode;
+
+ /* Get current power mode. */
+ mode = getPowerMode();
+
+ switch (mode)
+ {
+ case POWER_MODE_CTRL_MODE_MODE0:
+ gate_reg = MODE0_GATE;
+ break;
+
+ case POWER_MODE_CTRL_MODE_MODE1:
+ gate_reg = MODE1_GATE;
+ break;
+
+ default:
+ gate_reg = MODE0_GATE;
+ break;
+ }
+ POKE32(gate_reg, gate);
+}
+
+
+
+/*
+ * This function enable/disable the 2D engine.
+ */
+void enable2DEngine(unsigned int enable)
+{
+ uint32_t gate;
+
+ gate = PEEK32(CURRENT_GATE);
+ if (enable)
+ {
+ gate = FIELD_SET(gate, CURRENT_GATE, DE, ON);
+ gate = FIELD_SET(gate, CURRENT_GATE, CSC, ON);
+ }
+ else
+ {
+ gate = FIELD_SET(gate, CURRENT_GATE, DE, OFF);
+ gate = FIELD_SET(gate, CURRENT_GATE, CSC, OFF);
+ }
+
+ setCurrentGate(gate);
+}
+
+
+/*
+ * This function enable/disable the ZV Port.
+ */
+void enableZVPort(unsigned int enable)
+{
+ uint32_t gate;
+
+ /* Enable ZV Port Gate */
+ gate = PEEK32(CURRENT_GATE);
+ if (enable)
+ {
+ gate = FIELD_SET(gate, CURRENT_GATE, ZVPORT, ON);
+#if 1
+ /* Using Software I2C */
+ gate = FIELD_SET(gate, CURRENT_GATE, GPIO, ON);
+#else
+ /* Using Hardware I2C */
+ gate = FIELD_SET(gate, CURRENT_GATE, I2C, ON);
+#endif
+ }
+ else
+ {
+ /* Disable ZV Port Gate. There is no way to know whether the GPIO pins are being used
+ or not. Therefore, do not disable the GPIO gate. */
+ gate = FIELD_SET(gate, CURRENT_GATE, ZVPORT, OFF);
+ }
+
+ setCurrentGate(gate);
+}
+
+
+void enableSSP(unsigned int enable)
+{
+ uint32_t gate;
+
+ /* Enable SSP Gate */
+ gate = PEEK32(CURRENT_GATE);
+ if (enable)
+ gate = FIELD_SET(gate, CURRENT_GATE, SSP, ON);
+ else
+ gate = FIELD_SET(gate, CURRENT_GATE, SSP, OFF);
+
+ setCurrentGate(gate);
+}
+
+void enableDMA(unsigned int enable)
+{
+ uint32_t gate;
+
+ /* Enable DMA Gate */
+ gate = PEEK32(CURRENT_GATE);
+ if (enable)
+ gate = FIELD_SET(gate, CURRENT_GATE, DMA, ON);
+ else
+ gate = FIELD_SET(gate, CURRENT_GATE, DMA, OFF);
+
+ setCurrentGate(gate);
+}
+
+/*
+ * This function enable/disable the GPIO Engine
+ */
+void enableGPIO(unsigned int enable)
+{
+ uint32_t gate;
+
+ /* Enable GPIO Gate */
+ gate = PEEK32(CURRENT_GATE);
+ if (enable)
+ gate = FIELD_SET(gate, CURRENT_GATE, GPIO, ON);
+ else
+ gate = FIELD_SET(gate, CURRENT_GATE, GPIO, OFF);
+
+ setCurrentGate(gate);
+}
+
+/*
+ * This function enable/disable the PWM Engine
+ */
+void enablePWM(unsigned int enable)
+{
+ uint32_t gate;
+
+ /* Enable PWM Gate */
+ gate = PEEK32(CURRENT_GATE);
+ if (enable)
+ gate = FIELD_SET(gate, CURRENT_GATE, PWM, ON);
+ else
+ gate = FIELD_SET(gate, CURRENT_GATE, PWM, OFF);
+
+ setCurrentGate(gate);
+}
+
+/*
+ * This function enable/disable the I2C Engine
+ */
+void enableI2C(unsigned int enable)
+{
+ uint32_t gate;
+
+ /* Enable I2C Gate */
+ gate = PEEK32(CURRENT_GATE);
+ if (enable)
+ gate = FIELD_SET(gate, CURRENT_GATE, I2C, ON);
+ else
+ gate = FIELD_SET(gate, CURRENT_GATE, I2C, OFF);
+
+ setCurrentGate(gate);
+}
+
+
--- /dev/null
+#ifndef DDK750_POWER_H__
+#define DDK750_POWER_H__
+
+typedef enum _DPMS_t
+{
+ crtDPMS_ON = 0x0,
+ crtDPMS_STANDBY = 0x1,
+ crtDPMS_SUSPEND = 0x2,
+ crtDPMS_OFF = 0x3,
+}
+DPMS_t;
+
+#define setDAC(off) \
+ { \
+ POKE32(MISC_CTRL,FIELD_VALUE(PEEK32(MISC_CTRL), \
+ MISC_CTRL, \
+ DAC_POWER, \
+ off)); \
+ }
+
+void ddk750_setDPMS(DPMS_t);
+
+unsigned int getPowerMode(void);
+
+/*
+ * This function sets the current power mode
+ */
+void setPowerMode(unsigned int powerMode);
+
+/*
+ * This function sets current gate
+ */
+void setCurrentGate(unsigned int gate);
+
+/*
+ * This function enable/disable the 2D engine.
+ */
+void enable2DEngine(unsigned int enable);
+
+/*
+ * This function enable/disable the ZV Port
+ */
+void enableZVPort(unsigned int enable);
+
+/*
+ * This function enable/disable the DMA Engine
+ */
+void enableDMA(unsigned int enable);
+
+/*
+ * This function enable/disable the GPIO Engine
+ */
+void enableGPIO(unsigned int enable);
+
+/*
+ * This function enable/disable the PWM Engine
+ */
+void enablePWM(unsigned int enable);
+
+/*
+ * This function enable/disable the I2C Engine
+ */
+void enableI2C(unsigned int enable);
+
+/*
+ * This function enable/disable the SSP.
+ */
+void enableSSP(unsigned int enable);
+
+
+#endif
--- /dev/null
+#ifndef DDK750_REG_H__
+#define DDK750_REG_H__
+
+/* New register for SM750LE */
+#define DE_STATE1 0x100054
+#define DE_STATE1_DE_ABORT 0:0
+#define DE_STATE1_DE_ABORT_OFF 0
+#define DE_STATE1_DE_ABORT_ON 1
+
+#define DE_STATE2 0x100058
+#define DE_STATE2_DE_FIFO 3:3
+#define DE_STATE2_DE_FIFO_NOTEMPTY 0
+#define DE_STATE2_DE_FIFO_EMPTY 1
+#define DE_STATE2_DE_STATUS 2:2
+#define DE_STATE2_DE_STATUS_IDLE 0
+#define DE_STATE2_DE_STATUS_BUSY 1
+#define DE_STATE2_DE_MEM_FIFO 1:1
+#define DE_STATE2_DE_MEM_FIFO_NOTEMPTY 0
+#define DE_STATE2_DE_MEM_FIFO_EMPTY 1
+#define DE_STATE2_DE_RESERVED 0:0
+
+
+
+#define SYSTEM_CTRL 0x000000
+#define SYSTEM_CTRL_DPMS 31:30
+#define SYSTEM_CTRL_DPMS_VPHP 0
+#define SYSTEM_CTRL_DPMS_VPHN 1
+#define SYSTEM_CTRL_DPMS_VNHP 2
+#define SYSTEM_CTRL_DPMS_VNHN 3
+#define SYSTEM_CTRL_PCI_BURST 29:29
+#define SYSTEM_CTRL_PCI_BURST_OFF 0
+#define SYSTEM_CTRL_PCI_BURST_ON 1
+#define SYSTEM_CTRL_PCI_MASTER 25:25
+#define SYSTEM_CTRL_PCI_MASTER_OFF 0
+#define SYSTEM_CTRL_PCI_MASTER_ON 1
+#define SYSTEM_CTRL_LATENCY_TIMER 24:24
+#define SYSTEM_CTRL_LATENCY_TIMER_ON 0
+#define SYSTEM_CTRL_LATENCY_TIMER_OFF 1
+#define SYSTEM_CTRL_DE_FIFO 23:23
+#define SYSTEM_CTRL_DE_FIFO_NOTEMPTY 0
+#define SYSTEM_CTRL_DE_FIFO_EMPTY 1
+#define SYSTEM_CTRL_DE_STATUS 22:22
+#define SYSTEM_CTRL_DE_STATUS_IDLE 0
+#define SYSTEM_CTRL_DE_STATUS_BUSY 1
+#define SYSTEM_CTRL_DE_MEM_FIFO 21:21
+#define SYSTEM_CTRL_DE_MEM_FIFO_NOTEMPTY 0
+#define SYSTEM_CTRL_DE_MEM_FIFO_EMPTY 1
+#define SYSTEM_CTRL_CSC_STATUS 20:20
+#define SYSTEM_CTRL_CSC_STATUS_IDLE 0
+#define SYSTEM_CTRL_CSC_STATUS_BUSY 1
+#define SYSTEM_CTRL_CRT_VSYNC 19:19
+#define SYSTEM_CTRL_CRT_VSYNC_INACTIVE 0
+#define SYSTEM_CTRL_CRT_VSYNC_ACTIVE 1
+#define SYSTEM_CTRL_PANEL_VSYNC 18:18
+#define SYSTEM_CTRL_PANEL_VSYNC_INACTIVE 0
+#define SYSTEM_CTRL_PANEL_VSYNC_ACTIVE 1
+#define SYSTEM_CTRL_CURRENT_BUFFER 17:17
+#define SYSTEM_CTRL_CURRENT_BUFFER_NORMAL 0
+#define SYSTEM_CTRL_CURRENT_BUFFER_FLIP_PENDING 1
+#define SYSTEM_CTRL_DMA_STATUS 16:16
+#define SYSTEM_CTRL_DMA_STATUS_IDLE 0
+#define SYSTEM_CTRL_DMA_STATUS_BUSY 1
+#define SYSTEM_CTRL_PCI_BURST_READ 15:15
+#define SYSTEM_CTRL_PCI_BURST_READ_OFF 0
+#define SYSTEM_CTRL_PCI_BURST_READ_ON 1
+#define SYSTEM_CTRL_DE_ABORT 13:13
+#define SYSTEM_CTRL_DE_ABORT_OFF 0
+#define SYSTEM_CTRL_DE_ABORT_ON 1
+#define SYSTEM_CTRL_PCI_SUBSYS_ID_LOCK 11:11
+#define SYSTEM_CTRL_PCI_SUBSYS_ID_LOCK_OFF 0
+#define SYSTEM_CTRL_PCI_SUBSYS_ID_LOCK_ON 1
+#define SYSTEM_CTRL_PCI_RETRY 7:7
+#define SYSTEM_CTRL_PCI_RETRY_ON 0
+#define SYSTEM_CTRL_PCI_RETRY_OFF 1
+#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE 5:4
+#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_1 0
+#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_2 1
+#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_4 2
+#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_8 3
+#define SYSTEM_CTRL_CRT_TRISTATE 3:3
+#define SYSTEM_CTRL_CRT_TRISTATE_OFF 0
+#define SYSTEM_CTRL_CRT_TRISTATE_ON 1
+#define SYSTEM_CTRL_PCIMEM_TRISTATE 2:2
+#define SYSTEM_CTRL_PCIMEM_TRISTATE_OFF 0
+#define SYSTEM_CTRL_PCIMEM_TRISTATE_ON 1
+#define SYSTEM_CTRL_LOCALMEM_TRISTATE 1:1
+#define SYSTEM_CTRL_LOCALMEM_TRISTATE_OFF 0
+#define SYSTEM_CTRL_LOCALMEM_TRISTATE_ON 1
+#define SYSTEM_CTRL_PANEL_TRISTATE 0:0
+#define SYSTEM_CTRL_PANEL_TRISTATE_OFF 0
+#define SYSTEM_CTRL_PANEL_TRISTATE_ON 1
+
+#define MISC_CTRL 0x000004
+#define MISC_CTRL_DRAM_RERESH_COUNT 27:27
+#define MISC_CTRL_DRAM_RERESH_COUNT_1ROW 0
+#define MISC_CTRL_DRAM_RERESH_COUNT_3ROW 1
+#define MISC_CTRL_DRAM_REFRESH_TIME 26:25
+#define MISC_CTRL_DRAM_REFRESH_TIME_8 0
+#define MISC_CTRL_DRAM_REFRESH_TIME_16 1
+#define MISC_CTRL_DRAM_REFRESH_TIME_32 2
+#define MISC_CTRL_DRAM_REFRESH_TIME_64 3
+#define MISC_CTRL_INT_OUTPUT 24:24
+#define MISC_CTRL_INT_OUTPUT_NORMAL 0
+#define MISC_CTRL_INT_OUTPUT_INVERT 1
+#define MISC_CTRL_PLL_CLK_COUNT 23:23
+#define MISC_CTRL_PLL_CLK_COUNT_OFF 0
+#define MISC_CTRL_PLL_CLK_COUNT_ON 1
+#define MISC_CTRL_DAC_POWER 20:20
+#define MISC_CTRL_DAC_POWER_ON 0
+#define MISC_CTRL_DAC_POWER_OFF 1
+#define MISC_CTRL_CLK_SELECT 16:16
+#define MISC_CTRL_CLK_SELECT_OSC 0
+#define MISC_CTRL_CLK_SELECT_TESTCLK 1
+#define MISC_CTRL_DRAM_COLUMN_SIZE 15:14
+#define MISC_CTRL_DRAM_COLUMN_SIZE_256 0
+#define MISC_CTRL_DRAM_COLUMN_SIZE_512 1
+#define MISC_CTRL_DRAM_COLUMN_SIZE_1024 2
+#define MISC_CTRL_LOCALMEM_SIZE 13:12
+#define MISC_CTRL_LOCALMEM_SIZE_8M 3
+#define MISC_CTRL_LOCALMEM_SIZE_16M 0
+#define MISC_CTRL_LOCALMEM_SIZE_32M 1
+#define MISC_CTRL_LOCALMEM_SIZE_64M 2
+#define MISC_CTRL_DRAM_TWTR 11:11
+#define MISC_CTRL_DRAM_TWTR_2CLK 0
+#define MISC_CTRL_DRAM_TWTR_1CLK 1
+#define MISC_CTRL_DRAM_TWR 10:10
+#define MISC_CTRL_DRAM_TWR_3CLK 0
+#define MISC_CTRL_DRAM_TWR_2CLK 1
+#define MISC_CTRL_DRAM_TRP 9:9
+#define MISC_CTRL_DRAM_TRP_3CLK 0
+#define MISC_CTRL_DRAM_TRP_4CLK 1
+#define MISC_CTRL_DRAM_TRFC 8:8
+#define MISC_CTRL_DRAM_TRFC_12CLK 0
+#define MISC_CTRL_DRAM_TRFC_14CLK 1
+#define MISC_CTRL_DRAM_TRAS 7:7
+#define MISC_CTRL_DRAM_TRAS_7CLK 0
+#define MISC_CTRL_DRAM_TRAS_8CLK 1
+#define MISC_CTRL_LOCALMEM_RESET 6:6
+#define MISC_CTRL_LOCALMEM_RESET_RESET 0
+#define MISC_CTRL_LOCALMEM_RESET_NORMAL 1
+#define MISC_CTRL_LOCALMEM_STATE 5:5
+#define MISC_CTRL_LOCALMEM_STATE_ACTIVE 0
+#define MISC_CTRL_LOCALMEM_STATE_INACTIVE 1
+#define MISC_CTRL_CPU_CAS_LATENCY 4:4
+#define MISC_CTRL_CPU_CAS_LATENCY_2CLK 0
+#define MISC_CTRL_CPU_CAS_LATENCY_3CLK 1
+#define MISC_CTRL_DLL 3:3
+#define MISC_CTRL_DLL_ON 0
+#define MISC_CTRL_DLL_OFF 1
+#define MISC_CTRL_DRAM_OUTPUT 2:2
+#define MISC_CTRL_DRAM_OUTPUT_LOW 0
+#define MISC_CTRL_DRAM_OUTPUT_HIGH 1
+#define MISC_CTRL_LOCALMEM_BUS_SIZE 1:1
+#define MISC_CTRL_LOCALMEM_BUS_SIZE_32 0
+#define MISC_CTRL_LOCALMEM_BUS_SIZE_64 1
+#define MISC_CTRL_EMBEDDED_LOCALMEM 0:0
+#define MISC_CTRL_EMBEDDED_LOCALMEM_ON 0
+#define MISC_CTRL_EMBEDDED_LOCALMEM_OFF 1
+
+#define GPIO_MUX 0x000008
+#define GPIO_MUX_31 31:31
+#define GPIO_MUX_31_GPIO 0
+#define GPIO_MUX_31_I2C 1
+#define GPIO_MUX_30 30:30
+#define GPIO_MUX_30_GPIO 0
+#define GPIO_MUX_30_I2C 1
+#define GPIO_MUX_29 29:29
+#define GPIO_MUX_29_GPIO 0
+#define GPIO_MUX_29_SSP1 1
+#define GPIO_MUX_28 28:28
+#define GPIO_MUX_28_GPIO 0
+#define GPIO_MUX_28_SSP1 1
+#define GPIO_MUX_27 27:27
+#define GPIO_MUX_27_GPIO 0
+#define GPIO_MUX_27_SSP1 1
+#define GPIO_MUX_26 26:26
+#define GPIO_MUX_26_GPIO 0
+#define GPIO_MUX_26_SSP1 1
+#define GPIO_MUX_25 25:25
+#define GPIO_MUX_25_GPIO 0
+#define GPIO_MUX_25_SSP1 1
+#define GPIO_MUX_24 24:24
+#define GPIO_MUX_24_GPIO 0
+#define GPIO_MUX_24_SSP0 1
+#define GPIO_MUX_23 23:23
+#define GPIO_MUX_23_GPIO 0
+#define GPIO_MUX_23_SSP0 1
+#define GPIO_MUX_22 22:22
+#define GPIO_MUX_22_GPIO 0
+#define GPIO_MUX_22_SSP0 1
+#define GPIO_MUX_21 21:21
+#define GPIO_MUX_21_GPIO 0
+#define GPIO_MUX_21_SSP0 1
+#define GPIO_MUX_20 20:20
+#define GPIO_MUX_20_GPIO 0
+#define GPIO_MUX_20_SSP0 1
+#define GPIO_MUX_19 19:19
+#define GPIO_MUX_19_GPIO 0
+#define GPIO_MUX_19_PWM 1
+#define GPIO_MUX_18 18:18
+#define GPIO_MUX_18_GPIO 0
+#define GPIO_MUX_18_PWM 1
+#define GPIO_MUX_17 17:17
+#define GPIO_MUX_17_GPIO 0
+#define GPIO_MUX_17_PWM 1
+#define GPIO_MUX_16 16:16
+#define GPIO_MUX_16_GPIO_ZVPORT 0
+#define GPIO_MUX_16_TEST_DATA 1
+#define GPIO_MUX_15 15:15
+#define GPIO_MUX_15_GPIO_ZVPORT 0
+#define GPIO_MUX_15_TEST_DATA 1
+#define GPIO_MUX_14 14:14
+#define GPIO_MUX_14_GPIO_ZVPORT 0
+#define GPIO_MUX_14_TEST_DATA 1
+#define GPIO_MUX_13 13:13
+#define GPIO_MUX_13_GPIO_ZVPORT 0
+#define GPIO_MUX_13_TEST_DATA 1
+#define GPIO_MUX_12 12:12
+#define GPIO_MUX_12_GPIO_ZVPORT 0
+#define GPIO_MUX_12_TEST_DATA 1
+#define GPIO_MUX_11 11:11
+#define GPIO_MUX_11_GPIO_ZVPORT 0
+#define GPIO_MUX_11_TEST_DATA 1
+#define GPIO_MUX_10 10:10
+#define GPIO_MUX_10_GPIO_ZVPORT 0
+#define GPIO_MUX_10_TEST_DATA 1
+#define GPIO_MUX_9 9:9
+#define GPIO_MUX_9_GPIO_ZVPORT 0
+#define GPIO_MUX_9_TEST_DATA 1
+#define GPIO_MUX_8 8:8
+#define GPIO_MUX_8_GPIO_ZVPORT 0
+#define GPIO_MUX_8_TEST_DATA 1
+#define GPIO_MUX_7 7:7
+#define GPIO_MUX_7_GPIO_ZVPORT 0
+#define GPIO_MUX_7_TEST_DATA 1
+#define GPIO_MUX_6 6:6
+#define GPIO_MUX_6_GPIO_ZVPORT 0
+#define GPIO_MUX_6_TEST_DATA 1
+#define GPIO_MUX_5 5:5
+#define GPIO_MUX_5_GPIO_ZVPORT 0
+#define GPIO_MUX_5_TEST_DATA 1
+#define GPIO_MUX_4 4:4
+#define GPIO_MUX_4_GPIO_ZVPORT 0
+#define GPIO_MUX_4_TEST_DATA 1
+#define GPIO_MUX_3 3:3
+#define GPIO_MUX_3_GPIO_ZVPORT 0
+#define GPIO_MUX_3_TEST_DATA 1
+#define GPIO_MUX_2 2:2
+#define GPIO_MUX_2_GPIO_ZVPORT 0
+#define GPIO_MUX_2_TEST_DATA 1
+#define GPIO_MUX_1 1:1
+#define GPIO_MUX_1_GPIO_ZVPORT 0
+#define GPIO_MUX_1_TEST_DATA 1
+#define GPIO_MUX_0 0:0
+#define GPIO_MUX_0_GPIO_ZVPORT 0
+#define GPIO_MUX_0_TEST_DATA 1
+
+#define LOCALMEM_ARBITRATION 0x00000C
+#define LOCALMEM_ARBITRATION_ROTATE 28:28
+#define LOCALMEM_ARBITRATION_ROTATE_OFF 0
+#define LOCALMEM_ARBITRATION_ROTATE_ON 1
+#define LOCALMEM_ARBITRATION_VGA 26:24
+#define LOCALMEM_ARBITRATION_VGA_OFF 0
+#define LOCALMEM_ARBITRATION_VGA_PRIORITY_1 1
+#define LOCALMEM_ARBITRATION_VGA_PRIORITY_2 2
+#define LOCALMEM_ARBITRATION_VGA_PRIORITY_3 3
+#define LOCALMEM_ARBITRATION_VGA_PRIORITY_4 4
+#define LOCALMEM_ARBITRATION_VGA_PRIORITY_5 5
+#define LOCALMEM_ARBITRATION_VGA_PRIORITY_6 6
+#define LOCALMEM_ARBITRATION_VGA_PRIORITY_7 7
+#define LOCALMEM_ARBITRATION_DMA 22:20
+#define LOCALMEM_ARBITRATION_DMA_OFF 0
+#define LOCALMEM_ARBITRATION_DMA_PRIORITY_1 1
+#define LOCALMEM_ARBITRATION_DMA_PRIORITY_2 2
+#define LOCALMEM_ARBITRATION_DMA_PRIORITY_3 3
+#define LOCALMEM_ARBITRATION_DMA_PRIORITY_4 4
+#define LOCALMEM_ARBITRATION_DMA_PRIORITY_5 5
+#define LOCALMEM_ARBITRATION_DMA_PRIORITY_6 6
+#define LOCALMEM_ARBITRATION_DMA_PRIORITY_7 7
+#define LOCALMEM_ARBITRATION_ZVPORT1 18:16
+#define LOCALMEM_ARBITRATION_ZVPORT1_OFF 0
+#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_1 1
+#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_2 2
+#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_3 3
+#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_4 4
+#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_5 5
+#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_6 6
+#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_7 7
+#define LOCALMEM_ARBITRATION_ZVPORT0 14:12
+#define LOCALMEM_ARBITRATION_ZVPORT0_OFF 0
+#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_1 1
+#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_2 2
+#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_3 3
+#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_4 4
+#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_5 5
+#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_6 6
+#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_7 7
+#define LOCALMEM_ARBITRATION_VIDEO 10:8
+#define LOCALMEM_ARBITRATION_VIDEO_OFF 0
+#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_1 1
+#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_2 2
+#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_3 3
+#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_4 4
+#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_5 5
+#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_6 6
+#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_7 7
+#define LOCALMEM_ARBITRATION_PANEL 6:4
+#define LOCALMEM_ARBITRATION_PANEL_OFF 0
+#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_1 1
+#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_2 2
+#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_3 3
+#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_4 4
+#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_5 5
+#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_6 6
+#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_7 7
+#define LOCALMEM_ARBITRATION_CRT 2:0
+#define LOCALMEM_ARBITRATION_CRT_OFF 0
+#define LOCALMEM_ARBITRATION_CRT_PRIORITY_1 1
+#define LOCALMEM_ARBITRATION_CRT_PRIORITY_2 2
+#define LOCALMEM_ARBITRATION_CRT_PRIORITY_3 3
+#define LOCALMEM_ARBITRATION_CRT_PRIORITY_4 4
+#define LOCALMEM_ARBITRATION_CRT_PRIORITY_5 5
+#define LOCALMEM_ARBITRATION_CRT_PRIORITY_6 6
+#define LOCALMEM_ARBITRATION_CRT_PRIORITY_7 7
+
+#define PCIMEM_ARBITRATION 0x000010
+#define PCIMEM_ARBITRATION_ROTATE 28:28
+#define PCIMEM_ARBITRATION_ROTATE_OFF 0
+#define PCIMEM_ARBITRATION_ROTATE_ON 1
+#define PCIMEM_ARBITRATION_VGA 26:24
+#define PCIMEM_ARBITRATION_VGA_OFF 0
+#define PCIMEM_ARBITRATION_VGA_PRIORITY_1 1
+#define PCIMEM_ARBITRATION_VGA_PRIORITY_2 2
+#define PCIMEM_ARBITRATION_VGA_PRIORITY_3 3
+#define PCIMEM_ARBITRATION_VGA_PRIORITY_4 4
+#define PCIMEM_ARBITRATION_VGA_PRIORITY_5 5
+#define PCIMEM_ARBITRATION_VGA_PRIORITY_6 6
+#define PCIMEM_ARBITRATION_VGA_PRIORITY_7 7
+#define PCIMEM_ARBITRATION_DMA 22:20
+#define PCIMEM_ARBITRATION_DMA_OFF 0
+#define PCIMEM_ARBITRATION_DMA_PRIORITY_1 1
+#define PCIMEM_ARBITRATION_DMA_PRIORITY_2 2
+#define PCIMEM_ARBITRATION_DMA_PRIORITY_3 3
+#define PCIMEM_ARBITRATION_DMA_PRIORITY_4 4
+#define PCIMEM_ARBITRATION_DMA_PRIORITY_5 5
+#define PCIMEM_ARBITRATION_DMA_PRIORITY_6 6
+#define PCIMEM_ARBITRATION_DMA_PRIORITY_7 7
+#define PCIMEM_ARBITRATION_ZVPORT1 18:16
+#define PCIMEM_ARBITRATION_ZVPORT1_OFF 0
+#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_1 1
+#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_2 2
+#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_3 3
+#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_4 4
+#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_5 5
+#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_6 6
+#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_7 7
+#define PCIMEM_ARBITRATION_ZVPORT0 14:12
+#define PCIMEM_ARBITRATION_ZVPORT0_OFF 0
+#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_1 1
+#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_2 2
+#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_3 3
+#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_4 4
+#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_5 5
+#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_6 6
+#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_7 7
+#define PCIMEM_ARBITRATION_VIDEO 10:8
+#define PCIMEM_ARBITRATION_VIDEO_OFF 0
+#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_1 1
+#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_2 2
+#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_3 3
+#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_4 4
+#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_5 5
+#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_6 6
+#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_7 7
+#define PCIMEM_ARBITRATION_PANEL 6:4
+#define PCIMEM_ARBITRATION_PANEL_OFF 0
+#define PCIMEM_ARBITRATION_PANEL_PRIORITY_1 1
+#define PCIMEM_ARBITRATION_PANEL_PRIORITY_2 2
+#define PCIMEM_ARBITRATION_PANEL_PRIORITY_3 3
+#define PCIMEM_ARBITRATION_PANEL_PRIORITY_4 4
+#define PCIMEM_ARBITRATION_PANEL_PRIORITY_5 5
+#define PCIMEM_ARBITRATION_PANEL_PRIORITY_6 6
+#define PCIMEM_ARBITRATION_PANEL_PRIORITY_7 7
+#define PCIMEM_ARBITRATION_CRT 2:0
+#define PCIMEM_ARBITRATION_CRT_OFF 0
+#define PCIMEM_ARBITRATION_CRT_PRIORITY_1 1
+#define PCIMEM_ARBITRATION_CRT_PRIORITY_2 2
+#define PCIMEM_ARBITRATION_CRT_PRIORITY_3 3
+#define PCIMEM_ARBITRATION_CRT_PRIORITY_4 4
+#define PCIMEM_ARBITRATION_CRT_PRIORITY_5 5
+#define PCIMEM_ARBITRATION_CRT_PRIORITY_6 6
+#define PCIMEM_ARBITRATION_CRT_PRIORITY_7 7
+
+#define RAW_INT 0x000020
+#define RAW_INT_ZVPORT1_VSYNC 4:4
+#define RAW_INT_ZVPORT1_VSYNC_INACTIVE 0
+#define RAW_INT_ZVPORT1_VSYNC_ACTIVE 1
+#define RAW_INT_ZVPORT1_VSYNC_CLEAR 1
+#define RAW_INT_ZVPORT0_VSYNC 3:3
+#define RAW_INT_ZVPORT0_VSYNC_INACTIVE 0
+#define RAW_INT_ZVPORT0_VSYNC_ACTIVE 1
+#define RAW_INT_ZVPORT0_VSYNC_CLEAR 1
+#define RAW_INT_CRT_VSYNC 2:2
+#define RAW_INT_CRT_VSYNC_INACTIVE 0
+#define RAW_INT_CRT_VSYNC_ACTIVE 1
+#define RAW_INT_CRT_VSYNC_CLEAR 1
+#define RAW_INT_PANEL_VSYNC 1:1
+#define RAW_INT_PANEL_VSYNC_INACTIVE 0
+#define RAW_INT_PANEL_VSYNC_ACTIVE 1
+#define RAW_INT_PANEL_VSYNC_CLEAR 1
+#define RAW_INT_VGA_VSYNC 0:0
+#define RAW_INT_VGA_VSYNC_INACTIVE 0
+#define RAW_INT_VGA_VSYNC_ACTIVE 1
+#define RAW_INT_VGA_VSYNC_CLEAR 1
+
+#define INT_STATUS 0x000024
+#define INT_STATUS_GPIO31 31:31
+#define INT_STATUS_GPIO31_INACTIVE 0
+#define INT_STATUS_GPIO31_ACTIVE 1
+#define INT_STATUS_GPIO30 30:30
+#define INT_STATUS_GPIO30_INACTIVE 0
+#define INT_STATUS_GPIO30_ACTIVE 1
+#define INT_STATUS_GPIO29 29:29
+#define INT_STATUS_GPIO29_INACTIVE 0
+#define INT_STATUS_GPIO29_ACTIVE 1
+#define INT_STATUS_GPIO28 28:28
+#define INT_STATUS_GPIO28_INACTIVE 0
+#define INT_STATUS_GPIO28_ACTIVE 1
+#define INT_STATUS_GPIO27 27:27
+#define INT_STATUS_GPIO27_INACTIVE 0
+#define INT_STATUS_GPIO27_ACTIVE 1
+#define INT_STATUS_GPIO26 26:26
+#define INT_STATUS_GPIO26_INACTIVE 0
+#define INT_STATUS_GPIO26_ACTIVE 1
+#define INT_STATUS_GPIO25 25:25
+#define INT_STATUS_GPIO25_INACTIVE 0
+#define INT_STATUS_GPIO25_ACTIVE 1
+#define INT_STATUS_I2C 12:12
+#define INT_STATUS_I2C_INACTIVE 0
+#define INT_STATUS_I2C_ACTIVE 1
+#define INT_STATUS_PWM 11:11
+#define INT_STATUS_PWM_INACTIVE 0
+#define INT_STATUS_PWM_ACTIVE 1
+#define INT_STATUS_DMA1 10:10
+#define INT_STATUS_DMA1_INACTIVE 0
+#define INT_STATUS_DMA1_ACTIVE 1
+#define INT_STATUS_DMA0 9:9
+#define INT_STATUS_DMA0_INACTIVE 0
+#define INT_STATUS_DMA0_ACTIVE 1
+#define INT_STATUS_PCI 8:8
+#define INT_STATUS_PCI_INACTIVE 0
+#define INT_STATUS_PCI_ACTIVE 1
+#define INT_STATUS_SSP1 7:7
+#define INT_STATUS_SSP1_INACTIVE 0
+#define INT_STATUS_SSP1_ACTIVE 1
+#define INT_STATUS_SSP0 6:6
+#define INT_STATUS_SSP0_INACTIVE 0
+#define INT_STATUS_SSP0_ACTIVE 1
+#define INT_STATUS_DE 5:5
+#define INT_STATUS_DE_INACTIVE 0
+#define INT_STATUS_DE_ACTIVE 1
+#define INT_STATUS_ZVPORT1_VSYNC 4:4
+#define INT_STATUS_ZVPORT1_VSYNC_INACTIVE 0
+#define INT_STATUS_ZVPORT1_VSYNC_ACTIVE 1
+#define INT_STATUS_ZVPORT0_VSYNC 3:3
+#define INT_STATUS_ZVPORT0_VSYNC_INACTIVE 0
+#define INT_STATUS_ZVPORT0_VSYNC_ACTIVE 1
+#define INT_STATUS_CRT_VSYNC 2:2
+#define INT_STATUS_CRT_VSYNC_INACTIVE 0
+#define INT_STATUS_CRT_VSYNC_ACTIVE 1
+#define INT_STATUS_PANEL_VSYNC 1:1
+#define INT_STATUS_PANEL_VSYNC_INACTIVE 0
+#define INT_STATUS_PANEL_VSYNC_ACTIVE 1
+#define INT_STATUS_VGA_VSYNC 0:0
+#define INT_STATUS_VGA_VSYNC_INACTIVE 0
+#define INT_STATUS_VGA_VSYNC_ACTIVE 1
+
+#define INT_MASK 0x000028
+#define INT_MASK_GPIO31 31:31
+#define INT_MASK_GPIO31_DISABLE 0
+#define INT_MASK_GPIO31_ENABLE 1
+#define INT_MASK_GPIO30 30:30
+#define INT_MASK_GPIO30_DISABLE 0
+#define INT_MASK_GPIO30_ENABLE 1
+#define INT_MASK_GPIO29 29:29
+#define INT_MASK_GPIO29_DISABLE 0
+#define INT_MASK_GPIO29_ENABLE 1
+#define INT_MASK_GPIO28 28:28
+#define INT_MASK_GPIO28_DISABLE 0
+#define INT_MASK_GPIO28_ENABLE 1
+#define INT_MASK_GPIO27 27:27
+#define INT_MASK_GPIO27_DISABLE 0
+#define INT_MASK_GPIO27_ENABLE 1
+#define INT_MASK_GPIO26 26:26
+#define INT_MASK_GPIO26_DISABLE 0
+#define INT_MASK_GPIO26_ENABLE 1
+#define INT_MASK_GPIO25 25:25
+#define INT_MASK_GPIO25_DISABLE 0
+#define INT_MASK_GPIO25_ENABLE 1
+#define INT_MASK_I2C 12:12
+#define INT_MASK_I2C_DISABLE 0
+#define INT_MASK_I2C_ENABLE 1
+#define INT_MASK_PWM 11:11
+#define INT_MASK_PWM_DISABLE 0
+#define INT_MASK_PWM_ENABLE 1
+#define INT_MASK_DMA1 10:10
+#define INT_MASK_DMA1_DISABLE 0
+#define INT_MASK_DMA1_ENABLE 1
+#define INT_MASK_DMA 9:9
+#define INT_MASK_DMA_DISABLE 0
+#define INT_MASK_DMA_ENABLE 1
+#define INT_MASK_PCI 8:8
+#define INT_MASK_PCI_DISABLE 0
+#define INT_MASK_PCI_ENABLE 1
+#define INT_MASK_SSP1 7:7
+#define INT_MASK_SSP1_DISABLE 0
+#define INT_MASK_SSP1_ENABLE 1
+#define INT_MASK_SSP0 6:6
+#define INT_MASK_SSP0_DISABLE 0
+#define INT_MASK_SSP0_ENABLE 1
+#define INT_MASK_DE 5:5
+#define INT_MASK_DE_DISABLE 0
+#define INT_MASK_DE_ENABLE 1
+#define INT_MASK_ZVPORT1_VSYNC 4:4
+#define INT_MASK_ZVPORT1_VSYNC_DISABLE 0
+#define INT_MASK_ZVPORT1_VSYNC_ENABLE 1
+#define INT_MASK_ZVPORT0_VSYNC 3:3
+#define INT_MASK_ZVPORT0_VSYNC_DISABLE 0
+#define INT_MASK_ZVPORT0_VSYNC_ENABLE 1
+#define INT_MASK_CRT_VSYNC 2:2
+#define INT_MASK_CRT_VSYNC_DISABLE 0
+#define INT_MASK_CRT_VSYNC_ENABLE 1
+#define INT_MASK_PANEL_VSYNC 1:1
+#define INT_MASK_PANEL_VSYNC_DISABLE 0
+#define INT_MASK_PANEL_VSYNC_ENABLE 1
+#define INT_MASK_VGA_VSYNC 0:0
+#define INT_MASK_VGA_VSYNC_DISABLE 0
+#define INT_MASK_VGA_VSYNC_ENABLE 1
+
+#define CURRENT_GATE 0x000040
+#define CURRENT_GATE_MCLK 15:14
+#ifdef VALIDATION_CHIP
+ #define CURRENT_GATE_MCLK_112MHZ 0
+ #define CURRENT_GATE_MCLK_84MHZ 1
+ #define CURRENT_GATE_MCLK_56MHZ 2
+ #define CURRENT_GATE_MCLK_42MHZ 3
+#else
+ #define CURRENT_GATE_MCLK_DIV_3 0
+ #define CURRENT_GATE_MCLK_DIV_4 1
+ #define CURRENT_GATE_MCLK_DIV_6 2
+ #define CURRENT_GATE_MCLK_DIV_8 3
+#endif
+#define CURRENT_GATE_M2XCLK 13:12
+#ifdef VALIDATION_CHIP
+ #define CURRENT_GATE_M2XCLK_336MHZ 0
+ #define CURRENT_GATE_M2XCLK_168MHZ 1
+ #define CURRENT_GATE_M2XCLK_112MHZ 2
+ #define CURRENT_GATE_M2XCLK_84MHZ 3
+#else
+ #define CURRENT_GATE_M2XCLK_DIV_1 0
+ #define CURRENT_GATE_M2XCLK_DIV_2 1
+ #define CURRENT_GATE_M2XCLK_DIV_3 2
+ #define CURRENT_GATE_M2XCLK_DIV_4 3
+#endif
+#define CURRENT_GATE_VGA 10:10
+#define CURRENT_GATE_VGA_OFF 0
+#define CURRENT_GATE_VGA_ON 1
+#define CURRENT_GATE_PWM 9:9
+#define CURRENT_GATE_PWM_OFF 0
+#define CURRENT_GATE_PWM_ON 1
+#define CURRENT_GATE_I2C 8:8
+#define CURRENT_GATE_I2C_OFF 0
+#define CURRENT_GATE_I2C_ON 1
+#define CURRENT_GATE_SSP 7:7
+#define CURRENT_GATE_SSP_OFF 0
+#define CURRENT_GATE_SSP_ON 1
+#define CURRENT_GATE_GPIO 6:6
+#define CURRENT_GATE_GPIO_OFF 0
+#define CURRENT_GATE_GPIO_ON 1
+#define CURRENT_GATE_ZVPORT 5:5
+#define CURRENT_GATE_ZVPORT_OFF 0
+#define CURRENT_GATE_ZVPORT_ON 1
+#define CURRENT_GATE_CSC 4:4
+#define CURRENT_GATE_CSC_OFF 0
+#define CURRENT_GATE_CSC_ON 1
+#define CURRENT_GATE_DE 3:3
+#define CURRENT_GATE_DE_OFF 0
+#define CURRENT_GATE_DE_ON 1
+#define CURRENT_GATE_DISPLAY 2:2
+#define CURRENT_GATE_DISPLAY_OFF 0
+#define CURRENT_GATE_DISPLAY_ON 1
+#define CURRENT_GATE_LOCALMEM 1:1
+#define CURRENT_GATE_LOCALMEM_OFF 0
+#define CURRENT_GATE_LOCALMEM_ON 1
+#define CURRENT_GATE_DMA 0:0
+#define CURRENT_GATE_DMA_OFF 0
+#define CURRENT_GATE_DMA_ON 1
+
+#define MODE0_GATE 0x000044
+#define MODE0_GATE_MCLK 15:14
+#define MODE0_GATE_MCLK_112MHZ 0
+#define MODE0_GATE_MCLK_84MHZ 1
+#define MODE0_GATE_MCLK_56MHZ 2
+#define MODE0_GATE_MCLK_42MHZ 3
+#define MODE0_GATE_M2XCLK 13:12
+#define MODE0_GATE_M2XCLK_336MHZ 0
+#define MODE0_GATE_M2XCLK_168MHZ 1
+#define MODE0_GATE_M2XCLK_112MHZ 2
+#define MODE0_GATE_M2XCLK_84MHZ 3
+#define MODE0_GATE_VGA 10:10
+#define MODE0_GATE_VGA_OFF 0
+#define MODE0_GATE_VGA_ON 1
+#define MODE0_GATE_PWM 9:9
+#define MODE0_GATE_PWM_OFF 0
+#define MODE0_GATE_PWM_ON 1
+#define MODE0_GATE_I2C 8:8
+#define MODE0_GATE_I2C_OFF 0
+#define MODE0_GATE_I2C_ON 1
+#define MODE0_GATE_SSP 7:7
+#define MODE0_GATE_SSP_OFF 0
+#define MODE0_GATE_SSP_ON 1
+#define MODE0_GATE_GPIO 6:6
+#define MODE0_GATE_GPIO_OFF 0
+#define MODE0_GATE_GPIO_ON 1
+#define MODE0_GATE_ZVPORT 5:5
+#define MODE0_GATE_ZVPORT_OFF 0
+#define MODE0_GATE_ZVPORT_ON 1
+#define MODE0_GATE_CSC 4:4
+#define MODE0_GATE_CSC_OFF 0
+#define MODE0_GATE_CSC_ON 1
+#define MODE0_GATE_DE 3:3
+#define MODE0_GATE_DE_OFF 0
+#define MODE0_GATE_DE_ON 1
+#define MODE0_GATE_DISPLAY 2:2
+#define MODE0_GATE_DISPLAY_OFF 0
+#define MODE0_GATE_DISPLAY_ON 1
+#define MODE0_GATE_LOCALMEM 1:1
+#define MODE0_GATE_LOCALMEM_OFF 0
+#define MODE0_GATE_LOCALMEM_ON 1
+#define MODE0_GATE_DMA 0:0
+#define MODE0_GATE_DMA_OFF 0
+#define MODE0_GATE_DMA_ON 1
+
+#define MODE1_GATE 0x000048
+#define MODE1_GATE_MCLK 15:14
+#define MODE1_GATE_MCLK_112MHZ 0
+#define MODE1_GATE_MCLK_84MHZ 1
+#define MODE1_GATE_MCLK_56MHZ 2
+#define MODE1_GATE_MCLK_42MHZ 3
+#define MODE1_GATE_M2XCLK 13:12
+#define MODE1_GATE_M2XCLK_336MHZ 0
+#define MODE1_GATE_M2XCLK_168MHZ 1
+#define MODE1_GATE_M2XCLK_112MHZ 2
+#define MODE1_GATE_M2XCLK_84MHZ 3
+#define MODE1_GATE_VGA 10:10
+#define MODE1_GATE_VGA_OFF 0
+#define MODE1_GATE_VGA_ON 1
+#define MODE1_GATE_PWM 9:9
+#define MODE1_GATE_PWM_OFF 0
+#define MODE1_GATE_PWM_ON 1
+#define MODE1_GATE_I2C 8:8
+#define MODE1_GATE_I2C_OFF 0
+#define MODE1_GATE_I2C_ON 1
+#define MODE1_GATE_SSP 7:7
+#define MODE1_GATE_SSP_OFF 0
+#define MODE1_GATE_SSP_ON 1
+#define MODE1_GATE_GPIO 6:6
+#define MODE1_GATE_GPIO_OFF 0
+#define MODE1_GATE_GPIO_ON 1
+#define MODE1_GATE_ZVPORT 5:5
+#define MODE1_GATE_ZVPORT_OFF 0
+#define MODE1_GATE_ZVPORT_ON 1
+#define MODE1_GATE_CSC 4:4
+#define MODE1_GATE_CSC_OFF 0
+#define MODE1_GATE_CSC_ON 1
+#define MODE1_GATE_DE 3:3
+#define MODE1_GATE_DE_OFF 0
+#define MODE1_GATE_DE_ON 1
+#define MODE1_GATE_DISPLAY 2:2
+#define MODE1_GATE_DISPLAY_OFF 0
+#define MODE1_GATE_DISPLAY_ON 1
+#define MODE1_GATE_LOCALMEM 1:1
+#define MODE1_GATE_LOCALMEM_OFF 0
+#define MODE1_GATE_LOCALMEM_ON 1
+#define MODE1_GATE_DMA 0:0
+#define MODE1_GATE_DMA_OFF 0
+#define MODE1_GATE_DMA_ON 1
+
+#define POWER_MODE_CTRL 0x00004C
+#ifdef VALIDATION_CHIP
+ #define POWER_MODE_CTRL_336CLK 4:4
+ #define POWER_MODE_CTRL_336CLK_OFF 0
+ #define POWER_MODE_CTRL_336CLK_ON 1
+#endif
+#define POWER_MODE_CTRL_OSC_INPUT 3:3
+#define POWER_MODE_CTRL_OSC_INPUT_OFF 0
+#define POWER_MODE_CTRL_OSC_INPUT_ON 1
+#define POWER_MODE_CTRL_ACPI 2:2
+#define POWER_MODE_CTRL_ACPI_OFF 0
+#define POWER_MODE_CTRL_ACPI_ON 1
+#define POWER_MODE_CTRL_MODE 1:0
+#define POWER_MODE_CTRL_MODE_MODE0 0
+#define POWER_MODE_CTRL_MODE_MODE1 1
+#define POWER_MODE_CTRL_MODE_SLEEP 2
+
+#define PCI_MASTER_BASE 0x000050
+#define PCI_MASTER_BASE_ADDRESS 7:0
+
+#define DEVICE_ID 0x000054
+#define DEVICE_ID_DEVICE_ID 31:16
+#define DEVICE_ID_REVISION_ID 7:0
+
+#define PLL_CLK_COUNT 0x000058
+#define PLL_CLK_COUNT_COUNTER 15:0
+
+#define PANEL_PLL_CTRL 0x00005C
+#define PANEL_PLL_CTRL_BYPASS 18:18
+#define PANEL_PLL_CTRL_BYPASS_OFF 0
+#define PANEL_PLL_CTRL_BYPASS_ON 1
+#define PANEL_PLL_CTRL_POWER 17:17
+#define PANEL_PLL_CTRL_POWER_OFF 0
+#define PANEL_PLL_CTRL_POWER_ON 1
+#define PANEL_PLL_CTRL_INPUT 16:16
+#define PANEL_PLL_CTRL_INPUT_OSC 0
+#define PANEL_PLL_CTRL_INPUT_TESTCLK 1
+#ifdef VALIDATION_CHIP
+ #define PANEL_PLL_CTRL_OD 15:14
+#else
+ #define PANEL_PLL_CTRL_POD 15:14
+ #define PANEL_PLL_CTRL_OD 13:12
+#endif
+#define PANEL_PLL_CTRL_N 11:8
+#define PANEL_PLL_CTRL_M 7:0
+
+#define CRT_PLL_CTRL 0x000060
+#define CRT_PLL_CTRL_BYPASS 18:18
+#define CRT_PLL_CTRL_BYPASS_OFF 0
+#define CRT_PLL_CTRL_BYPASS_ON 1
+#define CRT_PLL_CTRL_POWER 17:17
+#define CRT_PLL_CTRL_POWER_OFF 0
+#define CRT_PLL_CTRL_POWER_ON 1
+#define CRT_PLL_CTRL_INPUT 16:16
+#define CRT_PLL_CTRL_INPUT_OSC 0
+#define CRT_PLL_CTRL_INPUT_TESTCLK 1
+#ifdef VALIDATION_CHIP
+ #define CRT_PLL_CTRL_OD 15:14
+#else
+ #define CRT_PLL_CTRL_POD 15:14
+ #define CRT_PLL_CTRL_OD 13:12
+#endif
+#define CRT_PLL_CTRL_N 11:8
+#define CRT_PLL_CTRL_M 7:0
+
+#define VGA_PLL0_CTRL 0x000064
+#define VGA_PLL0_CTRL_BYPASS 18:18
+#define VGA_PLL0_CTRL_BYPASS_OFF 0
+#define VGA_PLL0_CTRL_BYPASS_ON 1
+#define VGA_PLL0_CTRL_POWER 17:17
+#define VGA_PLL0_CTRL_POWER_OFF 0
+#define VGA_PLL0_CTRL_POWER_ON 1
+#define VGA_PLL0_CTRL_INPUT 16:16
+#define VGA_PLL0_CTRL_INPUT_OSC 0
+#define VGA_PLL0_CTRL_INPUT_TESTCLK 1
+#ifdef VALIDATION_CHIP
+ #define VGA_PLL0_CTRL_OD 15:14
+#else
+ #define VGA_PLL0_CTRL_POD 15:14
+ #define VGA_PLL0_CTRL_OD 13:12
+#endif
+#define VGA_PLL0_CTRL_N 11:8
+#define VGA_PLL0_CTRL_M 7:0
+
+#define VGA_PLL1_CTRL 0x000068
+#define VGA_PLL1_CTRL_BYPASS 18:18
+#define VGA_PLL1_CTRL_BYPASS_OFF 0
+#define VGA_PLL1_CTRL_BYPASS_ON 1
+#define VGA_PLL1_CTRL_POWER 17:17
+#define VGA_PLL1_CTRL_POWER_OFF 0
+#define VGA_PLL1_CTRL_POWER_ON 1
+#define VGA_PLL1_CTRL_INPUT 16:16
+#define VGA_PLL1_CTRL_INPUT_OSC 0
+#define VGA_PLL1_CTRL_INPUT_TESTCLK 1
+#ifdef VALIDATION_CHIP
+ #define VGA_PLL1_CTRL_OD 15:14
+#else
+ #define VGA_PLL1_CTRL_POD 15:14
+ #define VGA_PLL1_CTRL_OD 13:12
+#endif
+#define VGA_PLL1_CTRL_N 11:8
+#define VGA_PLL1_CTRL_M 7:0
+
+#define SCRATCH_DATA 0x00006c
+
+#ifndef VALIDATION_CHIP
+
+#define MXCLK_PLL_CTRL 0x000070
+#define MXCLK_PLL_CTRL_BYPASS 18:18
+#define MXCLK_PLL_CTRL_BYPASS_OFF 0
+#define MXCLK_PLL_CTRL_BYPASS_ON 1
+#define MXCLK_PLL_CTRL_POWER 17:17
+#define MXCLK_PLL_CTRL_POWER_OFF 0
+#define MXCLK_PLL_CTRL_POWER_ON 1
+#define MXCLK_PLL_CTRL_INPUT 16:16
+#define MXCLK_PLL_CTRL_INPUT_OSC 0
+#define MXCLK_PLL_CTRL_INPUT_TESTCLK 1
+#define MXCLK_PLL_CTRL_POD 15:14
+#define MXCLK_PLL_CTRL_OD 13:12
+#define MXCLK_PLL_CTRL_N 11:8
+#define MXCLK_PLL_CTRL_M 7:0
+
+#define VGA_CONFIGURATION 0x000088
+#define VGA_CONFIGURATION_USER_DEFINE 5:4
+#define VGA_CONFIGURATION_PLL 2:2
+#define VGA_CONFIGURATION_PLL_VGA 0
+#define VGA_CONFIGURATION_PLL_PANEL 1
+#define VGA_CONFIGURATION_MODE 1:1
+#define VGA_CONFIGURATION_MODE_TEXT 0
+#define VGA_CONFIGURATION_MODE_GRAPHIC 1
+
+#endif
+
+#define GPIO_DATA 0x010000
+#define GPIO_DATA_31 31:31
+#define GPIO_DATA_30 30:30
+#define GPIO_DATA_29 29:29
+#define GPIO_DATA_28 28:28
+#define GPIO_DATA_27 27:27
+#define GPIO_DATA_26 26:26
+#define GPIO_DATA_25 25:25
+#define GPIO_DATA_24 24:24
+#define GPIO_DATA_23 23:23
+#define GPIO_DATA_22 22:22
+#define GPIO_DATA_21 21:21
+#define GPIO_DATA_20 20:20
+#define GPIO_DATA_19 19:19
+#define GPIO_DATA_18 18:18
+#define GPIO_DATA_17 17:17
+#define GPIO_DATA_16 16:16
+#define GPIO_DATA_15 15:15
+#define GPIO_DATA_14 14:14
+#define GPIO_DATA_13 13:13
+#define GPIO_DATA_12 12:12
+#define GPIO_DATA_11 11:11
+#define GPIO_DATA_10 10:10
+#define GPIO_DATA_9 9:9
+#define GPIO_DATA_8 8:8
+#define GPIO_DATA_7 7:7
+#define GPIO_DATA_6 6:6
+#define GPIO_DATA_5 5:5
+#define GPIO_DATA_4 4:4
+#define GPIO_DATA_3 3:3
+#define GPIO_DATA_2 2:2
+#define GPIO_DATA_1 1:1
+#define GPIO_DATA_0 0:0
+
+#define GPIO_DATA_DIRECTION 0x010004
+#define GPIO_DATA_DIRECTION_31 31:31
+#define GPIO_DATA_DIRECTION_31_INPUT 0
+#define GPIO_DATA_DIRECTION_31_OUTPUT 1
+#define GPIO_DATA_DIRECTION_30 30:30
+#define GPIO_DATA_DIRECTION_30_INPUT 0
+#define GPIO_DATA_DIRECTION_30_OUTPUT 1
+#define GPIO_DATA_DIRECTION_29 29:29
+#define GPIO_DATA_DIRECTION_29_INPUT 0
+#define GPIO_DATA_DIRECTION_29_OUTPUT 1
+#define GPIO_DATA_DIRECTION_28 28:28
+#define GPIO_DATA_DIRECTION_28_INPUT 0
+#define GPIO_DATA_DIRECTION_28_OUTPUT 1
+#define GPIO_DATA_DIRECTION_27 27:27
+#define GPIO_DATA_DIRECTION_27_INPUT 0
+#define GPIO_DATA_DIRECTION_27_OUTPUT 1
+#define GPIO_DATA_DIRECTION_26 26:26
+#define GPIO_DATA_DIRECTION_26_INPUT 0
+#define GPIO_DATA_DIRECTION_26_OUTPUT 1
+#define GPIO_DATA_DIRECTION_25 25:25
+#define GPIO_DATA_DIRECTION_25_INPUT 0
+#define GPIO_DATA_DIRECTION_25_OUTPUT 1
+#define GPIO_DATA_DIRECTION_24 24:24
+#define GPIO_DATA_DIRECTION_24_INPUT 0
+#define GPIO_DATA_DIRECTION_24_OUTPUT 1
+#define GPIO_DATA_DIRECTION_23 23:23
+#define GPIO_DATA_DIRECTION_23_INPUT 0
+#define GPIO_DATA_DIRECTION_23_OUTPUT 1
+#define GPIO_DATA_DIRECTION_22 22:22
+#define GPIO_DATA_DIRECTION_22_INPUT 0
+#define GPIO_DATA_DIRECTION_22_OUTPUT 1
+#define GPIO_DATA_DIRECTION_21 21:21
+#define GPIO_DATA_DIRECTION_21_INPUT 0
+#define GPIO_DATA_DIRECTION_21_OUTPUT 1
+#define GPIO_DATA_DIRECTION_20 20:20
+#define GPIO_DATA_DIRECTION_20_INPUT 0
+#define GPIO_DATA_DIRECTION_20_OUTPUT 1
+#define GPIO_DATA_DIRECTION_19 19:19
+#define GPIO_DATA_DIRECTION_19_INPUT 0
+#define GPIO_DATA_DIRECTION_19_OUTPUT 1
+#define GPIO_DATA_DIRECTION_18 18:18
+#define GPIO_DATA_DIRECTION_18_INPUT 0
+#define GPIO_DATA_DIRECTION_18_OUTPUT 1
+#define GPIO_DATA_DIRECTION_17 17:17
+#define GPIO_DATA_DIRECTION_17_INPUT 0
+#define GPIO_DATA_DIRECTION_17_OUTPUT 1
+#define GPIO_DATA_DIRECTION_16 16:16
+#define GPIO_DATA_DIRECTION_16_INPUT 0
+#define GPIO_DATA_DIRECTION_16_OUTPUT 1
+#define GPIO_DATA_DIRECTION_15 15:15
+#define GPIO_DATA_DIRECTION_15_INPUT 0
+#define GPIO_DATA_DIRECTION_15_OUTPUT 1
+#define GPIO_DATA_DIRECTION_14 14:14
+#define GPIO_DATA_DIRECTION_14_INPUT 0
+#define GPIO_DATA_DIRECTION_14_OUTPUT 1
+#define GPIO_DATA_DIRECTION_13 13:13
+#define GPIO_DATA_DIRECTION_13_INPUT 0
+#define GPIO_DATA_DIRECTION_13_OUTPUT 1
+#define GPIO_DATA_DIRECTION_12 12:12
+#define GPIO_DATA_DIRECTION_12_INPUT 0
+#define GPIO_DATA_DIRECTION_12_OUTPUT 1
+#define GPIO_DATA_DIRECTION_11 11:11
+#define GPIO_DATA_DIRECTION_11_INPUT 0
+#define GPIO_DATA_DIRECTION_11_OUTPUT 1
+#define GPIO_DATA_DIRECTION_10 10:10
+#define GPIO_DATA_DIRECTION_10_INPUT 0
+#define GPIO_DATA_DIRECTION_10_OUTPUT 1
+#define GPIO_DATA_DIRECTION_9 9:9
+#define GPIO_DATA_DIRECTION_9_INPUT 0
+#define GPIO_DATA_DIRECTION_9_OUTPUT 1
+#define GPIO_DATA_DIRECTION_8 8:8
+#define GPIO_DATA_DIRECTION_8_INPUT 0
+#define GPIO_DATA_DIRECTION_8_OUTPUT 1
+#define GPIO_DATA_DIRECTION_7 7:7
+#define GPIO_DATA_DIRECTION_7_INPUT 0
+#define GPIO_DATA_DIRECTION_7_OUTPUT 1
+#define GPIO_DATA_DIRECTION_6 6:6
+#define GPIO_DATA_DIRECTION_6_INPUT 0
+#define GPIO_DATA_DIRECTION_6_OUTPUT 1
+#define GPIO_DATA_DIRECTION_5 5:5
+#define GPIO_DATA_DIRECTION_5_INPUT 0
+#define GPIO_DATA_DIRECTION_5_OUTPUT 1
+#define GPIO_DATA_DIRECTION_4 4:4
+#define GPIO_DATA_DIRECTION_4_INPUT 0
+#define GPIO_DATA_DIRECTION_4_OUTPUT 1
+#define GPIO_DATA_DIRECTION_3 3:3
+#define GPIO_DATA_DIRECTION_3_INPUT 0
+#define GPIO_DATA_DIRECTION_3_OUTPUT 1
+#define GPIO_DATA_DIRECTION_2 2:2
+#define GPIO_DATA_DIRECTION_2_INPUT 0
+#define GPIO_DATA_DIRECTION_2_OUTPUT 1
+#define GPIO_DATA_DIRECTION_1 131
+#define GPIO_DATA_DIRECTION_1_INPUT 0
+#define GPIO_DATA_DIRECTION_1_OUTPUT 1
+#define GPIO_DATA_DIRECTION_0 0:0
+#define GPIO_DATA_DIRECTION_0_INPUT 0
+#define GPIO_DATA_DIRECTION_0_OUTPUT 1
+
+#define GPIO_INTERRUPT_SETUP 0x010008
+#define GPIO_INTERRUPT_SETUP_TRIGGER_31 22:22
+#define GPIO_INTERRUPT_SETUP_TRIGGER_31_EDGE 0
+#define GPIO_INTERRUPT_SETUP_TRIGGER_31_LEVEL 1
+#define GPIO_INTERRUPT_SETUP_TRIGGER_30 21:21
+#define GPIO_INTERRUPT_SETUP_TRIGGER_30_EDGE 0
+#define GPIO_INTERRUPT_SETUP_TRIGGER_30_LEVEL 1
+#define GPIO_INTERRUPT_SETUP_TRIGGER_29 20:20
+#define GPIO_INTERRUPT_SETUP_TRIGGER_29_EDGE 0
+#define GPIO_INTERRUPT_SETUP_TRIGGER_29_LEVEL 1
+#define GPIO_INTERRUPT_SETUP_TRIGGER_28 19:19
+#define GPIO_INTERRUPT_SETUP_TRIGGER_28_EDGE 0
+#define GPIO_INTERRUPT_SETUP_TRIGGER_28_LEVEL 1
+#define GPIO_INTERRUPT_SETUP_TRIGGER_27 18:18
+#define GPIO_INTERRUPT_SETUP_TRIGGER_27_EDGE 0
+#define GPIO_INTERRUPT_SETUP_TRIGGER_27_LEVEL 1
+#define GPIO_INTERRUPT_SETUP_TRIGGER_26 17:17
+#define GPIO_INTERRUPT_SETUP_TRIGGER_26_EDGE 0
+#define GPIO_INTERRUPT_SETUP_TRIGGER_26_LEVEL 1
+#define GPIO_INTERRUPT_SETUP_TRIGGER_25 16:16
+#define GPIO_INTERRUPT_SETUP_TRIGGER_25_EDGE 0
+#define GPIO_INTERRUPT_SETUP_TRIGGER_25_LEVEL 1
+#define GPIO_INTERRUPT_SETUP_ACTIVE_31 14:14
+#define GPIO_INTERRUPT_SETUP_ACTIVE_31_LOW 0
+#define GPIO_INTERRUPT_SETUP_ACTIVE_31_HIGH 1
+#define GPIO_INTERRUPT_SETUP_ACTIVE_30 13:13
+#define GPIO_INTERRUPT_SETUP_ACTIVE_30_LOW 0
+#define GPIO_INTERRUPT_SETUP_ACTIVE_30_HIGH 1
+#define GPIO_INTERRUPT_SETUP_ACTIVE_29 12:12
+#define GPIO_INTERRUPT_SETUP_ACTIVE_29_LOW 0
+#define GPIO_INTERRUPT_SETUP_ACTIVE_29_HIGH 1
+#define GPIO_INTERRUPT_SETUP_ACTIVE_28 11:11
+#define GPIO_INTERRUPT_SETUP_ACTIVE_28_LOW 0
+#define GPIO_INTERRUPT_SETUP_ACTIVE_28_HIGH 1
+#define GPIO_INTERRUPT_SETUP_ACTIVE_27 10:10
+#define GPIO_INTERRUPT_SETUP_ACTIVE_27_LOW 0
+#define GPIO_INTERRUPT_SETUP_ACTIVE_27_HIGH 1
+#define GPIO_INTERRUPT_SETUP_ACTIVE_26 9:9
+#define GPIO_INTERRUPT_SETUP_ACTIVE_26_LOW 0
+#define GPIO_INTERRUPT_SETUP_ACTIVE_26_HIGH 1
+#define GPIO_INTERRUPT_SETUP_ACTIVE_25 8:8
+#define GPIO_INTERRUPT_SETUP_ACTIVE_25_LOW 0
+#define GPIO_INTERRUPT_SETUP_ACTIVE_25_HIGH 1
+#define GPIO_INTERRUPT_SETUP_ENABLE_31 6:6
+#define GPIO_INTERRUPT_SETUP_ENABLE_31_GPIO 0
+#define GPIO_INTERRUPT_SETUP_ENABLE_31_INTERRUPT 1
+#define GPIO_INTERRUPT_SETUP_ENABLE_30 5:5
+#define GPIO_INTERRUPT_SETUP_ENABLE_30_GPIO 0
+#define GPIO_INTERRUPT_SETUP_ENABLE_30_INTERRUPT 1
+#define GPIO_INTERRUPT_SETUP_ENABLE_29 4:4
+#define GPIO_INTERRUPT_SETUP_ENABLE_29_GPIO 0
+#define GPIO_INTERRUPT_SETUP_ENABLE_29_INTERRUPT 1
+#define GPIO_INTERRUPT_SETUP_ENABLE_28 3:3
+#define GPIO_INTERRUPT_SETUP_ENABLE_28_GPIO 0
+#define GPIO_INTERRUPT_SETUP_ENABLE_28_INTERRUPT 1
+#define GPIO_INTERRUPT_SETUP_ENABLE_27 2:2
+#define GPIO_INTERRUPT_SETUP_ENABLE_27_GPIO 0
+#define GPIO_INTERRUPT_SETUP_ENABLE_27_INTERRUPT 1
+#define GPIO_INTERRUPT_SETUP_ENABLE_26 1:1
+#define GPIO_INTERRUPT_SETUP_ENABLE_26_GPIO 0
+#define GPIO_INTERRUPT_SETUP_ENABLE_26_INTERRUPT 1
+#define GPIO_INTERRUPT_SETUP_ENABLE_25 0:0
+#define GPIO_INTERRUPT_SETUP_ENABLE_25_GPIO 0
+#define GPIO_INTERRUPT_SETUP_ENABLE_25_INTERRUPT 1
+
+#define GPIO_INTERRUPT_STATUS 0x01000C
+#define GPIO_INTERRUPT_STATUS_31 22:22
+#define GPIO_INTERRUPT_STATUS_31_INACTIVE 0
+#define GPIO_INTERRUPT_STATUS_31_ACTIVE 1
+#define GPIO_INTERRUPT_STATUS_31_RESET 1
+#define GPIO_INTERRUPT_STATUS_30 21:21
+#define GPIO_INTERRUPT_STATUS_30_INACTIVE 0
+#define GPIO_INTERRUPT_STATUS_30_ACTIVE 1
+#define GPIO_INTERRUPT_STATUS_30_RESET 1
+#define GPIO_INTERRUPT_STATUS_29 20:20
+#define GPIO_INTERRUPT_STATUS_29_INACTIVE 0
+#define GPIO_INTERRUPT_STATUS_29_ACTIVE 1
+#define GPIO_INTERRUPT_STATUS_29_RESET 1
+#define GPIO_INTERRUPT_STATUS_28 19:19
+#define GPIO_INTERRUPT_STATUS_28_INACTIVE 0
+#define GPIO_INTERRUPT_STATUS_28_ACTIVE 1
+#define GPIO_INTERRUPT_STATUS_28_RESET 1
+#define GPIO_INTERRUPT_STATUS_27 18:18
+#define GPIO_INTERRUPT_STATUS_27_INACTIVE 0
+#define GPIO_INTERRUPT_STATUS_27_ACTIVE 1
+#define GPIO_INTERRUPT_STATUS_27_RESET 1
+#define GPIO_INTERRUPT_STATUS_26 17:17
+#define GPIO_INTERRUPT_STATUS_26_INACTIVE 0
+#define GPIO_INTERRUPT_STATUS_26_ACTIVE 1
+#define GPIO_INTERRUPT_STATUS_26_RESET 1
+#define GPIO_INTERRUPT_STATUS_25 16:16
+#define GPIO_INTERRUPT_STATUS_25_INACTIVE 0
+#define GPIO_INTERRUPT_STATUS_25_ACTIVE 1
+#define GPIO_INTERRUPT_STATUS_25_RESET 1
+
+
+#define PANEL_DISPLAY_CTRL 0x080000
+#define PANEL_DISPLAY_CTRL_RESERVED_1_MASK 31:30
+#define PANEL_DISPLAY_CTRL_RESERVED_1_MASK_DISABLE 0
+#define PANEL_DISPLAY_CTRL_RESERVED_1_MASK_ENABLE 3
+#define PANEL_DISPLAY_CTRL_SELECT 29:28
+#define PANEL_DISPLAY_CTRL_SELECT_PANEL 0
+#define PANEL_DISPLAY_CTRL_SELECT_VGA 1
+#define PANEL_DISPLAY_CTRL_SELECT_CRT 2
+#define PANEL_DISPLAY_CTRL_FPEN 27:27
+#define PANEL_DISPLAY_CTRL_FPEN_LOW 0
+#define PANEL_DISPLAY_CTRL_FPEN_HIGH 1
+#define PANEL_DISPLAY_CTRL_VBIASEN 26:26
+#define PANEL_DISPLAY_CTRL_VBIASEN_LOW 0
+#define PANEL_DISPLAY_CTRL_VBIASEN_HIGH 1
+#define PANEL_DISPLAY_CTRL_DATA 25:25
+#define PANEL_DISPLAY_CTRL_DATA_DISABLE 0
+#define PANEL_DISPLAY_CTRL_DATA_ENABLE 1
+#define PANEL_DISPLAY_CTRL_FPVDDEN 24:24
+#define PANEL_DISPLAY_CTRL_FPVDDEN_LOW 0
+#define PANEL_DISPLAY_CTRL_FPVDDEN_HIGH 1
+#define PANEL_DISPLAY_CTRL_RESERVED_2_MASK 23:20
+#define PANEL_DISPLAY_CTRL_RESERVED_2_MASK_DISABLE 0
+#define PANEL_DISPLAY_CTRL_RESERVED_2_MASK_ENABLE 15
+
+#define PANEL_DISPLAY_CTRL_TFT_DISP 19:18
+#define PANEL_DISPLAY_CTRL_TFT_DISP_24 0
+#define PANEL_DISPLAY_CTRL_TFT_DISP_36 1
+#define PANEL_DISPLAY_CTRL_TFT_DISP_18 2
+
+
+#define PANEL_DISPLAY_CTRL_DUAL_DISPLAY 19:19
+#define PANEL_DISPLAY_CTRL_DUAL_DISPLAY_DISABLE 0
+#define PANEL_DISPLAY_CTRL_DUAL_DISPLAY_ENABLE 1
+#define PANEL_DISPLAY_CTRL_DOUBLE_PIXEL 18:18
+#define PANEL_DISPLAY_CTRL_DOUBLE_PIXEL_DISABLE 0
+#define PANEL_DISPLAY_CTRL_DOUBLE_PIXEL_ENABLE 1
+#define PANEL_DISPLAY_CTRL_FIFO 17:16
+#define PANEL_DISPLAY_CTRL_FIFO_1 0
+#define PANEL_DISPLAY_CTRL_FIFO_3 1
+#define PANEL_DISPLAY_CTRL_FIFO_7 2
+#define PANEL_DISPLAY_CTRL_FIFO_11 3
+#define PANEL_DISPLAY_CTRL_RESERVED_3_MASK 15:15
+#define PANEL_DISPLAY_CTRL_RESERVED_3_MASK_DISABLE 0
+#define PANEL_DISPLAY_CTRL_RESERVED_3_MASK_ENABLE 1
+#define PANEL_DISPLAY_CTRL_CLOCK_PHASE 14:14
+#define PANEL_DISPLAY_CTRL_CLOCK_PHASE_ACTIVE_HIGH 0
+#define PANEL_DISPLAY_CTRL_CLOCK_PHASE_ACTIVE_LOW 1
+#define PANEL_DISPLAY_CTRL_VSYNC_PHASE 13:13
+#define PANEL_DISPLAY_CTRL_VSYNC_PHASE_ACTIVE_HIGH 0
+#define PANEL_DISPLAY_CTRL_VSYNC_PHASE_ACTIVE_LOW 1
+#define PANEL_DISPLAY_CTRL_HSYNC_PHASE 12:12
+#define PANEL_DISPLAY_CTRL_HSYNC_PHASE_ACTIVE_HIGH 0
+#define PANEL_DISPLAY_CTRL_HSYNC_PHASE_ACTIVE_LOW 1
+#define PANEL_DISPLAY_CTRL_VSYNC 11:11
+#define PANEL_DISPLAY_CTRL_VSYNC_ACTIVE_HIGH 0
+#define PANEL_DISPLAY_CTRL_VSYNC_ACTIVE_LOW 1
+#define PANEL_DISPLAY_CTRL_CAPTURE_TIMING 10:10
+#define PANEL_DISPLAY_CTRL_CAPTURE_TIMING_DISABLE 0
+#define PANEL_DISPLAY_CTRL_CAPTURE_TIMING_ENABLE 1
+#define PANEL_DISPLAY_CTRL_COLOR_KEY 9:9
+#define PANEL_DISPLAY_CTRL_COLOR_KEY_DISABLE 0
+#define PANEL_DISPLAY_CTRL_COLOR_KEY_ENABLE 1
+#define PANEL_DISPLAY_CTRL_TIMING 8:8
+#define PANEL_DISPLAY_CTRL_TIMING_DISABLE 0
+#define PANEL_DISPLAY_CTRL_TIMING_ENABLE 1
+#define PANEL_DISPLAY_CTRL_VERTICAL_PAN_DIR 7:7
+#define PANEL_DISPLAY_CTRL_VERTICAL_PAN_DIR_DOWN 0
+#define PANEL_DISPLAY_CTRL_VERTICAL_PAN_DIR_UP 1
+#define PANEL_DISPLAY_CTRL_VERTICAL_PAN 6:6
+#define PANEL_DISPLAY_CTRL_VERTICAL_PAN_DISABLE 0
+#define PANEL_DISPLAY_CTRL_VERTICAL_PAN_ENABLE 1
+#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN_DIR 5:5
+#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN_DIR_RIGHT 0
+#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN_DIR_LEFT 1
+#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN 4:4
+#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN_DISABLE 0
+#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN_ENABLE 1
+#define PANEL_DISPLAY_CTRL_GAMMA 3:3
+#define PANEL_DISPLAY_CTRL_GAMMA_DISABLE 0
+#define PANEL_DISPLAY_CTRL_GAMMA_ENABLE 1
+#define PANEL_DISPLAY_CTRL_PLANE 2:2
+#define PANEL_DISPLAY_CTRL_PLANE_DISABLE 0
+#define PANEL_DISPLAY_CTRL_PLANE_ENABLE 1
+#define PANEL_DISPLAY_CTRL_FORMAT 1:0
+#define PANEL_DISPLAY_CTRL_FORMAT_8 0
+#define PANEL_DISPLAY_CTRL_FORMAT_16 1
+#define PANEL_DISPLAY_CTRL_FORMAT_32 2
+
+#define PANEL_PAN_CTRL 0x080004
+#define PANEL_PAN_CTRL_VERTICAL_PAN 31:24
+#define PANEL_PAN_CTRL_VERTICAL_VSYNC 21:16
+#define PANEL_PAN_CTRL_HORIZONTAL_PAN 15:8
+#define PANEL_PAN_CTRL_HORIZONTAL_VSYNC 5:0
+
+#define PANEL_COLOR_KEY 0x080008
+#define PANEL_COLOR_KEY_MASK 31:16
+#define PANEL_COLOR_KEY_VALUE 15:0
+
+#define PANEL_FB_ADDRESS 0x08000C
+#define PANEL_FB_ADDRESS_STATUS 31:31
+#define PANEL_FB_ADDRESS_STATUS_CURRENT 0
+#define PANEL_FB_ADDRESS_STATUS_PENDING 1
+#define PANEL_FB_ADDRESS_EXT 27:27
+#define PANEL_FB_ADDRESS_EXT_LOCAL 0
+#define PANEL_FB_ADDRESS_EXT_EXTERNAL 1
+#define PANEL_FB_ADDRESS_ADDRESS 25:0
+
+#define PANEL_FB_WIDTH 0x080010
+#define PANEL_FB_WIDTH_WIDTH 29:16
+#define PANEL_FB_WIDTH_OFFSET 13:0
+
+#define PANEL_WINDOW_WIDTH 0x080014
+#define PANEL_WINDOW_WIDTH_WIDTH 27:16
+#define PANEL_WINDOW_WIDTH_X 11:0
+
+#define PANEL_WINDOW_HEIGHT 0x080018
+#define PANEL_WINDOW_HEIGHT_HEIGHT 27:16
+#define PANEL_WINDOW_HEIGHT_Y 11:0
+
+#define PANEL_PLANE_TL 0x08001C
+#define PANEL_PLANE_TL_TOP 26:16
+#define PANEL_PLANE_TL_LEFT 10:0
+
+#define PANEL_PLANE_BR 0x080020
+#define PANEL_PLANE_BR_BOTTOM 26:16
+#define PANEL_PLANE_BR_RIGHT 10:0
+
+#define PANEL_HORIZONTAL_TOTAL 0x080024
+#define PANEL_HORIZONTAL_TOTAL_TOTAL 27:16
+#define PANEL_HORIZONTAL_TOTAL_DISPLAY_END 11:0
+
+#define PANEL_HORIZONTAL_SYNC 0x080028
+#define PANEL_HORIZONTAL_SYNC_WIDTH 23:16
+#define PANEL_HORIZONTAL_SYNC_START 11:0
+
+#define PANEL_VERTICAL_TOTAL 0x08002C
+#define PANEL_VERTICAL_TOTAL_TOTAL 26:16
+#define PANEL_VERTICAL_TOTAL_DISPLAY_END 10:0
+
+#define PANEL_VERTICAL_SYNC 0x080030
+#define PANEL_VERTICAL_SYNC_HEIGHT 21:16
+#define PANEL_VERTICAL_SYNC_START 10:0
+
+#define PANEL_CURRENT_LINE 0x080034
+#define PANEL_CURRENT_LINE_LINE 10:0
+
+/* Video Control */
+
+#define VIDEO_DISPLAY_CTRL 0x080040
+#define VIDEO_DISPLAY_CTRL_LINE_BUFFER 18:18
+#define VIDEO_DISPLAY_CTRL_LINE_BUFFER_DISABLE 0
+#define VIDEO_DISPLAY_CTRL_LINE_BUFFER_ENABLE 1
+#define VIDEO_DISPLAY_CTRL_FIFO 17:16
+#define VIDEO_DISPLAY_CTRL_FIFO_1 0
+#define VIDEO_DISPLAY_CTRL_FIFO_3 1
+#define VIDEO_DISPLAY_CTRL_FIFO_7 2
+#define VIDEO_DISPLAY_CTRL_FIFO_11 3
+#define VIDEO_DISPLAY_CTRL_BUFFER 15:15
+#define VIDEO_DISPLAY_CTRL_BUFFER_0 0
+#define VIDEO_DISPLAY_CTRL_BUFFER_1 1
+#define VIDEO_DISPLAY_CTRL_CAPTURE 14:14
+#define VIDEO_DISPLAY_CTRL_CAPTURE_DISABLE 0
+#define VIDEO_DISPLAY_CTRL_CAPTURE_ENABLE 1
+#define VIDEO_DISPLAY_CTRL_DOUBLE_BUFFER 13:13
+#define VIDEO_DISPLAY_CTRL_DOUBLE_BUFFER_DISABLE 0
+#define VIDEO_DISPLAY_CTRL_DOUBLE_BUFFER_ENABLE 1
+#define VIDEO_DISPLAY_CTRL_BYTE_SWAP 12:12
+#define VIDEO_DISPLAY_CTRL_BYTE_SWAP_DISABLE 0
+#define VIDEO_DISPLAY_CTRL_BYTE_SWAP_ENABLE 1
+#define VIDEO_DISPLAY_CTRL_VERTICAL_SCALE 11:11
+#define VIDEO_DISPLAY_CTRL_VERTICAL_SCALE_NORMAL 0
+#define VIDEO_DISPLAY_CTRL_VERTICAL_SCALE_HALF 1
+#define VIDEO_DISPLAY_CTRL_HORIZONTAL_SCALE 10:10
+#define VIDEO_DISPLAY_CTRL_HORIZONTAL_SCALE_NORMAL 0
+#define VIDEO_DISPLAY_CTRL_HORIZONTAL_SCALE_HALF 1
+#define VIDEO_DISPLAY_CTRL_VERTICAL_MODE 9:9
+#define VIDEO_DISPLAY_CTRL_VERTICAL_MODE_REPLICATE 0
+#define VIDEO_DISPLAY_CTRL_VERTICAL_MODE_INTERPOLATE 1
+#define VIDEO_DISPLAY_CTRL_HORIZONTAL_MODE 8:8
+#define VIDEO_DISPLAY_CTRL_HORIZONTAL_MODE_REPLICATE 0
+#define VIDEO_DISPLAY_CTRL_HORIZONTAL_MODE_INTERPOLATE 1
+#define VIDEO_DISPLAY_CTRL_PIXEL 7:4
+#define VIDEO_DISPLAY_CTRL_GAMMA 3:3
+#define VIDEO_DISPLAY_CTRL_GAMMA_DISABLE 0
+#define VIDEO_DISPLAY_CTRL_GAMMA_ENABLE 1
+#define VIDEO_DISPLAY_CTRL_PLANE 2:2
+#define VIDEO_DISPLAY_CTRL_PLANE_DISABLE 0
+#define VIDEO_DISPLAY_CTRL_PLANE_ENABLE 1
+#define VIDEO_DISPLAY_CTRL_FORMAT 1:0
+#define VIDEO_DISPLAY_CTRL_FORMAT_8 0
+#define VIDEO_DISPLAY_CTRL_FORMAT_16 1
+#define VIDEO_DISPLAY_CTRL_FORMAT_32 2
+#define VIDEO_DISPLAY_CTRL_FORMAT_YUV 3
+
+#define VIDEO_FB_0_ADDRESS 0x080044
+#define VIDEO_FB_0_ADDRESS_STATUS 31:31
+#define VIDEO_FB_0_ADDRESS_STATUS_CURRENT 0
+#define VIDEO_FB_0_ADDRESS_STATUS_PENDING 1
+#define VIDEO_FB_0_ADDRESS_EXT 27:27
+#define VIDEO_FB_0_ADDRESS_EXT_LOCAL 0
+#define VIDEO_FB_0_ADDRESS_EXT_EXTERNAL 1
+#define VIDEO_FB_0_ADDRESS_ADDRESS 25:0
+
+#define VIDEO_FB_WIDTH 0x080048
+#define VIDEO_FB_WIDTH_WIDTH 29:16
+#define VIDEO_FB_WIDTH_OFFSET 13:0
+
+#define VIDEO_FB_0_LAST_ADDRESS 0x08004C
+#define VIDEO_FB_0_LAST_ADDRESS_EXT 27:27
+#define VIDEO_FB_0_LAST_ADDRESS_EXT_LOCAL 0
+#define VIDEO_FB_0_LAST_ADDRESS_EXT_EXTERNAL 1
+#define VIDEO_FB_0_LAST_ADDRESS_ADDRESS 25:0
+
+#define VIDEO_PLANE_TL 0x080050
+#define VIDEO_PLANE_TL_TOP 26:16
+#define VIDEO_PLANE_TL_LEFT 10:0
+
+#define VIDEO_PLANE_BR 0x080054
+#define VIDEO_PLANE_BR_BOTTOM 26:16
+#define VIDEO_PLANE_BR_RIGHT 10:0
+
+#define VIDEO_SCALE 0x080058
+#define VIDEO_SCALE_VERTICAL_MODE 31:31
+#define VIDEO_SCALE_VERTICAL_MODE_EXPAND 0
+#define VIDEO_SCALE_VERTICAL_MODE_SHRINK 1
+#define VIDEO_SCALE_VERTICAL_SCALE 27:16
+#define VIDEO_SCALE_HORIZONTAL_MODE 15:15
+#define VIDEO_SCALE_HORIZONTAL_MODE_EXPAND 0
+#define VIDEO_SCALE_HORIZONTAL_MODE_SHRINK 1
+#define VIDEO_SCALE_HORIZONTAL_SCALE 11:0
+
+#define VIDEO_INITIAL_SCALE 0x08005C
+#define VIDEO_INITIAL_SCALE_FB_1 27:16
+#define VIDEO_INITIAL_SCALE_FB_0 11:0
+
+#define VIDEO_YUV_CONSTANTS 0x080060
+#define VIDEO_YUV_CONSTANTS_Y 31:24
+#define VIDEO_YUV_CONSTANTS_R 23:16
+#define VIDEO_YUV_CONSTANTS_G 15:8
+#define VIDEO_YUV_CONSTANTS_B 7:0
+
+#define VIDEO_FB_1_ADDRESS 0x080064
+#define VIDEO_FB_1_ADDRESS_STATUS 31:31
+#define VIDEO_FB_1_ADDRESS_STATUS_CURRENT 0
+#define VIDEO_FB_1_ADDRESS_STATUS_PENDING 1
+#define VIDEO_FB_1_ADDRESS_EXT 27:27
+#define VIDEO_FB_1_ADDRESS_EXT_LOCAL 0
+#define VIDEO_FB_1_ADDRESS_EXT_EXTERNAL 1
+#define VIDEO_FB_1_ADDRESS_ADDRESS 25:0
+
+#define VIDEO_FB_1_LAST_ADDRESS 0x080068
+#define VIDEO_FB_1_LAST_ADDRESS_EXT 27:27
+#define VIDEO_FB_1_LAST_ADDRESS_EXT_LOCAL 0
+#define VIDEO_FB_1_LAST_ADDRESS_EXT_EXTERNAL 1
+#define VIDEO_FB_1_LAST_ADDRESS_ADDRESS 25:0
+
+/* Video Alpha Control */
+
+#define VIDEO_ALPHA_DISPLAY_CTRL 0x080080
+#define VIDEO_ALPHA_DISPLAY_CTRL_SELECT 28:28
+#define VIDEO_ALPHA_DISPLAY_CTRL_SELECT_PER_PIXEL 0
+#define VIDEO_ALPHA_DISPLAY_CTRL_SELECT_ALPHA 1
+#define VIDEO_ALPHA_DISPLAY_CTRL_ALPHA 27:24
+#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO 17:16
+#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_1 0
+#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_3 1
+#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_7 2
+#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_11 3
+#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_SCALE 11:11
+#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_SCALE_NORMAL 0
+#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_SCALE_HALF 1
+#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_SCALE 10:10
+#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_SCALE_NORMAL 0
+#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_SCALE_HALF 1
+#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_MODE 9:9
+#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_MODE_REPLICATE 0
+#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_MODE_INTERPOLATE 1
+#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_MODE 8:8
+#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_MODE_REPLICATE 0
+#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_MODE_INTERPOLATE 1
+#define VIDEO_ALPHA_DISPLAY_CTRL_PIXEL 7:4
+#define VIDEO_ALPHA_DISPLAY_CTRL_CHROMA_KEY 3:3
+#define VIDEO_ALPHA_DISPLAY_CTRL_CHROMA_KEY_DISABLE 0
+#define VIDEO_ALPHA_DISPLAY_CTRL_CHROMA_KEY_ENABLE 1
+#define VIDEO_ALPHA_DISPLAY_CTRL_PLANE 2:2
+#define VIDEO_ALPHA_DISPLAY_CTRL_PLANE_DISABLE 0
+#define VIDEO_ALPHA_DISPLAY_CTRL_PLANE_ENABLE 1
+#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT 1:0
+#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_8 0
+#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_16 1
+#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4 2
+#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4_4_4 3
+
+#define VIDEO_ALPHA_FB_ADDRESS 0x080084
+#define VIDEO_ALPHA_FB_ADDRESS_STATUS 31:31
+#define VIDEO_ALPHA_FB_ADDRESS_STATUS_CURRENT 0
+#define VIDEO_ALPHA_FB_ADDRESS_STATUS_PENDING 1
+#define VIDEO_ALPHA_FB_ADDRESS_EXT 27:27
+#define VIDEO_ALPHA_FB_ADDRESS_EXT_LOCAL 0
+#define VIDEO_ALPHA_FB_ADDRESS_EXT_EXTERNAL 1
+#define VIDEO_ALPHA_FB_ADDRESS_ADDRESS 25:0
+
+#define VIDEO_ALPHA_FB_WIDTH 0x080088
+#define VIDEO_ALPHA_FB_WIDTH_WIDTH 29:16
+#define VIDEO_ALPHA_FB_WIDTH_OFFSET 13:0
+
+#define VIDEO_ALPHA_FB_LAST_ADDRESS 0x08008C
+#define VIDEO_ALPHA_FB_LAST_ADDRESS_EXT 27:27
+#define VIDEO_ALPHA_FB_LAST_ADDRESS_EXT_LOCAL 0
+#define VIDEO_ALPHA_FB_LAST_ADDRESS_EXT_EXTERNAL 1
+#define VIDEO_ALPHA_FB_LAST_ADDRESS_ADDRESS 25:0
+
+#define VIDEO_ALPHA_PLANE_TL 0x080090
+#define VIDEO_ALPHA_PLANE_TL_TOP 26:16
+#define VIDEO_ALPHA_PLANE_TL_LEFT 10:0
+
+#define VIDEO_ALPHA_PLANE_BR 0x080094
+#define VIDEO_ALPHA_PLANE_BR_BOTTOM 26:16
+#define VIDEO_ALPHA_PLANE_BR_RIGHT 10:0
+
+#define VIDEO_ALPHA_SCALE 0x080098
+#define VIDEO_ALPHA_SCALE_VERTICAL_MODE 31:31
+#define VIDEO_ALPHA_SCALE_VERTICAL_MODE_EXPAND 0
+#define VIDEO_ALPHA_SCALE_VERTICAL_MODE_SHRINK 1
+#define VIDEO_ALPHA_SCALE_VERTICAL_SCALE 27:16
+#define VIDEO_ALPHA_SCALE_HORIZONTAL_MODE 15:15
+#define VIDEO_ALPHA_SCALE_HORIZONTAL_MODE_EXPAND 0
+#define VIDEO_ALPHA_SCALE_HORIZONTAL_MODE_SHRINK 1
+#define VIDEO_ALPHA_SCALE_HORIZONTAL_SCALE 11:0
+
+#define VIDEO_ALPHA_INITIAL_SCALE 0x08009C
+#define VIDEO_ALPHA_INITIAL_SCALE_VERTICAL 27:16
+#define VIDEO_ALPHA_INITIAL_SCALE_HORIZONTAL 11:0
+
+#define VIDEO_ALPHA_CHROMA_KEY 0x0800A0
+#define VIDEO_ALPHA_CHROMA_KEY_MASK 31:16
+#define VIDEO_ALPHA_CHROMA_KEY_VALUE 15:0
+
+#define VIDEO_ALPHA_COLOR_LOOKUP_01 0x0800A4
+#define VIDEO_ALPHA_COLOR_LOOKUP_01_1 31:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_RED 31:27
+#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_GREEN 26:21
+#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_BLUE 20:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_01_0 15:0
+#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_RED 15:11
+#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_GREEN 10:5
+#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_BLUE 4:0
+
+#define VIDEO_ALPHA_COLOR_LOOKUP_23 0x0800A8
+#define VIDEO_ALPHA_COLOR_LOOKUP_23_3 31:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_RED 31:27
+#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_GREEN 26:21
+#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_BLUE 20:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_23_2 15:0
+#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_RED 15:11
+#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_GREEN 10:5
+#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_BLUE 4:0
+
+#define VIDEO_ALPHA_COLOR_LOOKUP_45 0x0800AC
+#define VIDEO_ALPHA_COLOR_LOOKUP_45_5 31:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_RED 31:27
+#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_GREEN 26:21
+#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_BLUE 20:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_45_4 15:0
+#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_RED 15:11
+#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_GREEN 10:5
+#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_BLUE 4:0
+
+#define VIDEO_ALPHA_COLOR_LOOKUP_67 0x0800B0
+#define VIDEO_ALPHA_COLOR_LOOKUP_67_7 31:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_RED 31:27
+#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_GREEN 26:21
+#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_BLUE 20:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_67_6 15:0
+#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_RED 15:11
+#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_GREEN 10:5
+#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_BLUE 4:0
+
+#define VIDEO_ALPHA_COLOR_LOOKUP_89 0x0800B4
+#define VIDEO_ALPHA_COLOR_LOOKUP_89_9 31:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_RED 31:27
+#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_GREEN 26:21
+#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_BLUE 20:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_89_8 15:0
+#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_RED 15:11
+#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_GREEN 10:5
+#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_BLUE 4:0
+
+#define VIDEO_ALPHA_COLOR_LOOKUP_AB 0x0800B8
+#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B 31:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_RED 31:27
+#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_GREEN 26:21
+#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_BLUE 20:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A 15:0
+#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_RED 15:11
+#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_GREEN 10:5
+#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_BLUE 4:0
+
+#define VIDEO_ALPHA_COLOR_LOOKUP_CD 0x0800BC
+#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D 31:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_RED 31:27
+#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_GREEN 26:21
+#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_BLUE 20:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C 15:0
+#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_RED 15:11
+#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_GREEN 10:5
+#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_BLUE 4:0
+
+#define VIDEO_ALPHA_COLOR_LOOKUP_EF 0x0800C0
+#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F 31:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_RED 31:27
+#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_GREEN 26:21
+#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_BLUE 20:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E 15:0
+#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_RED 15:11
+#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_GREEN 10:5
+#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_BLUE 4:0
+
+/* Panel Cursor Control */
+
+#define PANEL_HWC_ADDRESS 0x0800F0
+#define PANEL_HWC_ADDRESS_ENABLE 31:31
+#define PANEL_HWC_ADDRESS_ENABLE_DISABLE 0
+#define PANEL_HWC_ADDRESS_ENABLE_ENABLE 1
+#define PANEL_HWC_ADDRESS_EXT 27:27
+#define PANEL_HWC_ADDRESS_EXT_LOCAL 0
+#define PANEL_HWC_ADDRESS_EXT_EXTERNAL 1
+#define PANEL_HWC_ADDRESS_ADDRESS 25:0
+
+#define PANEL_HWC_LOCATION 0x0800F4
+#define PANEL_HWC_LOCATION_TOP 27:27
+#define PANEL_HWC_LOCATION_TOP_INSIDE 0
+#define PANEL_HWC_LOCATION_TOP_OUTSIDE 1
+#define PANEL_HWC_LOCATION_Y 26:16
+#define PANEL_HWC_LOCATION_LEFT 11:11
+#define PANEL_HWC_LOCATION_LEFT_INSIDE 0
+#define PANEL_HWC_LOCATION_LEFT_OUTSIDE 1
+#define PANEL_HWC_LOCATION_X 10:0
+
+#define PANEL_HWC_COLOR_12 0x0800F8
+#define PANEL_HWC_COLOR_12_2_RGB565 31:16
+#define PANEL_HWC_COLOR_12_1_RGB565 15:0
+
+#define PANEL_HWC_COLOR_3 0x0800FC
+#define PANEL_HWC_COLOR_3_RGB565 15:0
+
+/* Old Definitions +++ */
+#define PANEL_HWC_COLOR_01 0x0800F8
+#define PANEL_HWC_COLOR_01_1_RED 31:27
+#define PANEL_HWC_COLOR_01_1_GREEN 26:21
+#define PANEL_HWC_COLOR_01_1_BLUE 20:16
+#define PANEL_HWC_COLOR_01_0_RED 15:11
+#define PANEL_HWC_COLOR_01_0_GREEN 10:5
+#define PANEL_HWC_COLOR_01_0_BLUE 4:0
+
+#define PANEL_HWC_COLOR_2 0x0800FC
+#define PANEL_HWC_COLOR_2_RED 15:11
+#define PANEL_HWC_COLOR_2_GREEN 10:5
+#define PANEL_HWC_COLOR_2_BLUE 4:0
+/* Old Definitions --- */
+
+/* Alpha Control */
+
+#define ALPHA_DISPLAY_CTRL 0x080100
+#define ALPHA_DISPLAY_CTRL_SELECT 28:28
+#define ALPHA_DISPLAY_CTRL_SELECT_PER_PIXEL 0
+#define ALPHA_DISPLAY_CTRL_SELECT_ALPHA 1
+#define ALPHA_DISPLAY_CTRL_ALPHA 27:24
+#define ALPHA_DISPLAY_CTRL_FIFO 17:16
+#define ALPHA_DISPLAY_CTRL_FIFO_1 0
+#define ALPHA_DISPLAY_CTRL_FIFO_3 1
+#define ALPHA_DISPLAY_CTRL_FIFO_7 2
+#define ALPHA_DISPLAY_CTRL_FIFO_11 3
+#define ALPHA_DISPLAY_CTRL_PIXEL 7:4
+#define ALPHA_DISPLAY_CTRL_CHROMA_KEY 3:3
+#define ALPHA_DISPLAY_CTRL_CHROMA_KEY_DISABLE 0
+#define ALPHA_DISPLAY_CTRL_CHROMA_KEY_ENABLE 1
+#define ALPHA_DISPLAY_CTRL_PLANE 2:2
+#define ALPHA_DISPLAY_CTRL_PLANE_DISABLE 0
+#define ALPHA_DISPLAY_CTRL_PLANE_ENABLE 1
+#define ALPHA_DISPLAY_CTRL_FORMAT 1:0
+#define ALPHA_DISPLAY_CTRL_FORMAT_16 1
+#define ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4 2
+#define ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4_4_4 3
+
+#define ALPHA_FB_ADDRESS 0x080104
+#define ALPHA_FB_ADDRESS_STATUS 31:31
+#define ALPHA_FB_ADDRESS_STATUS_CURRENT 0
+#define ALPHA_FB_ADDRESS_STATUS_PENDING 1
+#define ALPHA_FB_ADDRESS_EXT 27:27
+#define ALPHA_FB_ADDRESS_EXT_LOCAL 0
+#define ALPHA_FB_ADDRESS_EXT_EXTERNAL 1
+#define ALPHA_FB_ADDRESS_ADDRESS 25:0
+
+#define ALPHA_FB_WIDTH 0x080108
+#define ALPHA_FB_WIDTH_WIDTH 29:16
+#define ALPHA_FB_WIDTH_OFFSET 13:0
+
+#define ALPHA_PLANE_TL 0x08010C
+#define ALPHA_PLANE_TL_TOP 26:16
+#define ALPHA_PLANE_TL_LEFT 10:0
+
+#define ALPHA_PLANE_BR 0x080110
+#define ALPHA_PLANE_BR_BOTTOM 26:16
+#define ALPHA_PLANE_BR_RIGHT 10:0
+
+#define ALPHA_CHROMA_KEY 0x080114
+#define ALPHA_CHROMA_KEY_MASK 31:16
+#define ALPHA_CHROMA_KEY_VALUE 15:0
+
+#define ALPHA_COLOR_LOOKUP_01 0x080118
+#define ALPHA_COLOR_LOOKUP_01_1 31:16
+#define ALPHA_COLOR_LOOKUP_01_1_RED 31:27
+#define ALPHA_COLOR_LOOKUP_01_1_GREEN 26:21
+#define ALPHA_COLOR_LOOKUP_01_1_BLUE 20:16
+#define ALPHA_COLOR_LOOKUP_01_0 15:0
+#define ALPHA_COLOR_LOOKUP_01_0_RED 15:11
+#define ALPHA_COLOR_LOOKUP_01_0_GREEN 10:5
+#define ALPHA_COLOR_LOOKUP_01_0_BLUE 4:0
+
+#define ALPHA_COLOR_LOOKUP_23 0x08011C
+#define ALPHA_COLOR_LOOKUP_23_3 31:16
+#define ALPHA_COLOR_LOOKUP_23_3_RED 31:27
+#define ALPHA_COLOR_LOOKUP_23_3_GREEN 26:21
+#define ALPHA_COLOR_LOOKUP_23_3_BLUE 20:16
+#define ALPHA_COLOR_LOOKUP_23_2 15:0
+#define ALPHA_COLOR_LOOKUP_23_2_RED 15:11
+#define ALPHA_COLOR_LOOKUP_23_2_GREEN 10:5
+#define ALPHA_COLOR_LOOKUP_23_2_BLUE 4:0
+
+#define ALPHA_COLOR_LOOKUP_45 0x080120
+#define ALPHA_COLOR_LOOKUP_45_5 31:16
+#define ALPHA_COLOR_LOOKUP_45_5_RED 31:27
+#define ALPHA_COLOR_LOOKUP_45_5_GREEN 26:21
+#define ALPHA_COLOR_LOOKUP_45_5_BLUE 20:16
+#define ALPHA_COLOR_LOOKUP_45_4 15:0
+#define ALPHA_COLOR_LOOKUP_45_4_RED 15:11
+#define ALPHA_COLOR_LOOKUP_45_4_GREEN 10:5
+#define ALPHA_COLOR_LOOKUP_45_4_BLUE 4:0
+
+#define ALPHA_COLOR_LOOKUP_67 0x080124
+#define ALPHA_COLOR_LOOKUP_67_7 31:16
+#define ALPHA_COLOR_LOOKUP_67_7_RED 31:27
+#define ALPHA_COLOR_LOOKUP_67_7_GREEN 26:21
+#define ALPHA_COLOR_LOOKUP_67_7_BLUE 20:16
+#define ALPHA_COLOR_LOOKUP_67_6 15:0
+#define ALPHA_COLOR_LOOKUP_67_6_RED 15:11
+#define ALPHA_COLOR_LOOKUP_67_6_GREEN 10:5
+#define ALPHA_COLOR_LOOKUP_67_6_BLUE 4:0
+
+#define ALPHA_COLOR_LOOKUP_89 0x080128
+#define ALPHA_COLOR_LOOKUP_89_9 31:16
+#define ALPHA_COLOR_LOOKUP_89_9_RED 31:27
+#define ALPHA_COLOR_LOOKUP_89_9_GREEN 26:21
+#define ALPHA_COLOR_LOOKUP_89_9_BLUE 20:16
+#define ALPHA_COLOR_LOOKUP_89_8 15:0
+#define ALPHA_COLOR_LOOKUP_89_8_RED 15:11
+#define ALPHA_COLOR_LOOKUP_89_8_GREEN 10:5
+#define ALPHA_COLOR_LOOKUP_89_8_BLUE 4:0
+
+#define ALPHA_COLOR_LOOKUP_AB 0x08012C
+#define ALPHA_COLOR_LOOKUP_AB_B 31:16
+#define ALPHA_COLOR_LOOKUP_AB_B_RED 31:27
+#define ALPHA_COLOR_LOOKUP_AB_B_GREEN 26:21
+#define ALPHA_COLOR_LOOKUP_AB_B_BLUE 20:16
+#define ALPHA_COLOR_LOOKUP_AB_A 15:0
+#define ALPHA_COLOR_LOOKUP_AB_A_RED 15:11
+#define ALPHA_COLOR_LOOKUP_AB_A_GREEN 10:5
+#define ALPHA_COLOR_LOOKUP_AB_A_BLUE 4:0
+
+#define ALPHA_COLOR_LOOKUP_CD 0x080130
+#define ALPHA_COLOR_LOOKUP_CD_D 31:16
+#define ALPHA_COLOR_LOOKUP_CD_D_RED 31:27
+#define ALPHA_COLOR_LOOKUP_CD_D_GREEN 26:21
+#define ALPHA_COLOR_LOOKUP_CD_D_BLUE 20:16
+#define ALPHA_COLOR_LOOKUP_CD_C 15:0
+#define ALPHA_COLOR_LOOKUP_CD_C_RED 15:11
+#define ALPHA_COLOR_LOOKUP_CD_C_GREEN 10:5
+#define ALPHA_COLOR_LOOKUP_CD_C_BLUE 4:0
+
+#define ALPHA_COLOR_LOOKUP_EF 0x080134
+#define ALPHA_COLOR_LOOKUP_EF_F 31:16
+#define ALPHA_COLOR_LOOKUP_EF_F_RED 31:27
+#define ALPHA_COLOR_LOOKUP_EF_F_GREEN 26:21
+#define ALPHA_COLOR_LOOKUP_EF_F_BLUE 20:16
+#define ALPHA_COLOR_LOOKUP_EF_E 15:0
+#define ALPHA_COLOR_LOOKUP_EF_E_RED 15:11
+#define ALPHA_COLOR_LOOKUP_EF_E_GREEN 10:5
+#define ALPHA_COLOR_LOOKUP_EF_E_BLUE 4:0
+
+/* CRT Graphics Control */
+
+#define CRT_DISPLAY_CTRL 0x080200
+#define CRT_DISPLAY_CTRL_RESERVED_1_MASK 31:27
+#define CRT_DISPLAY_CTRL_RESERVED_1_MASK_DISABLE 0
+#define CRT_DISPLAY_CTRL_RESERVED_1_MASK_ENABLE 0x1F
+
+/* SM750LE definition */
+#define CRT_DISPLAY_CTRL_DPMS 31:30
+#define CRT_DISPLAY_CTRL_DPMS_0 0
+#define CRT_DISPLAY_CTRL_DPMS_1 1
+#define CRT_DISPLAY_CTRL_DPMS_2 2
+#define CRT_DISPLAY_CTRL_DPMS_3 3
+#define CRT_DISPLAY_CTRL_CLK 29:27
+#define CRT_DISPLAY_CTRL_CLK_PLL25 0
+#define CRT_DISPLAY_CTRL_CLK_PLL41 1
+#define CRT_DISPLAY_CTRL_CLK_PLL62 2
+#define CRT_DISPLAY_CTRL_CLK_PLL65 3
+#define CRT_DISPLAY_CTRL_CLK_PLL74 4
+#define CRT_DISPLAY_CTRL_CLK_PLL80 5
+#define CRT_DISPLAY_CTRL_CLK_PLL108 6
+#define CRT_DISPLAY_CTRL_CLK_RESERVED 7
+#define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC 26:26
+#define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC_DISABLE 1
+#define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC_ENABLE 0
+
+
+#define CRT_DISPLAY_CTRL_RESERVED_2_MASK 25:24
+#define CRT_DISPLAY_CTRL_RESERVED_2_MASK_ENABLE 3
+#define CRT_DISPLAY_CTRL_RESERVED_2_MASK_DISABLE 0
+
+/* SM750LE definition */
+#define CRT_DISPLAY_CTRL_CRTSELECT 25:25
+#define CRT_DISPLAY_CTRL_CRTSELECT_VGA 0
+#define CRT_DISPLAY_CTRL_CRTSELECT_CRT 1
+#define CRT_DISPLAY_CTRL_RGBBIT 24:24
+#define CRT_DISPLAY_CTRL_RGBBIT_24BIT 0
+#define CRT_DISPLAY_CTRL_RGBBIT_12BIT 1
+
+
+#define CRT_DISPLAY_CTRL_RESERVED_3_MASK 15:15
+#define CRT_DISPLAY_CTRL_RESERVED_3_MASK_DISABLE 0
+#define CRT_DISPLAY_CTRL_RESERVED_3_MASK_ENABLE 1
+
+#define CRT_DISPLAY_CTRL_RESERVED_4_MASK 9:9
+#define CRT_DISPLAY_CTRL_RESERVED_4_MASK_DISABLE 0
+#define CRT_DISPLAY_CTRL_RESERVED_4_MASK_ENABLE 1
+
+#ifndef VALIDATION_CHIP
+ #define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC 26:26
+ #define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC_DISABLE 1
+ #define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC_ENABLE 0
+ #define CRT_DISPLAY_CTRL_CENTERING 24:24
+ #define CRT_DISPLAY_CTRL_CENTERING_DISABLE 0
+ #define CRT_DISPLAY_CTRL_CENTERING_ENABLE 1
+#endif
+#define CRT_DISPLAY_CTRL_LOCK_TIMING 23:23
+#define CRT_DISPLAY_CTRL_LOCK_TIMING_DISABLE 0
+#define CRT_DISPLAY_CTRL_LOCK_TIMING_ENABLE 1
+#define CRT_DISPLAY_CTRL_EXPANSION 22:22
+#define CRT_DISPLAY_CTRL_EXPANSION_DISABLE 0
+#define CRT_DISPLAY_CTRL_EXPANSION_ENABLE 1
+#define CRT_DISPLAY_CTRL_VERTICAL_MODE 21:21
+#define CRT_DISPLAY_CTRL_VERTICAL_MODE_REPLICATE 0
+#define CRT_DISPLAY_CTRL_VERTICAL_MODE_INTERPOLATE 1
+#define CRT_DISPLAY_CTRL_HORIZONTAL_MODE 20:20
+#define CRT_DISPLAY_CTRL_HORIZONTAL_MODE_REPLICATE 0
+#define CRT_DISPLAY_CTRL_HORIZONTAL_MODE_INTERPOLATE 1
+#define CRT_DISPLAY_CTRL_SELECT 19:18
+#define CRT_DISPLAY_CTRL_SELECT_PANEL 0
+#define CRT_DISPLAY_CTRL_SELECT_VGA 1
+#define CRT_DISPLAY_CTRL_SELECT_CRT 2
+#define CRT_DISPLAY_CTRL_FIFO 17:16
+#define CRT_DISPLAY_CTRL_FIFO_1 0
+#define CRT_DISPLAY_CTRL_FIFO_3 1
+#define CRT_DISPLAY_CTRL_FIFO_7 2
+#define CRT_DISPLAY_CTRL_FIFO_11 3
+#define CRT_DISPLAY_CTRL_CLOCK_PHASE 14:14
+#define CRT_DISPLAY_CTRL_CLOCK_PHASE_ACTIVE_HIGH 0
+#define CRT_DISPLAY_CTRL_CLOCK_PHASE_ACTIVE_LOW 1
+#define CRT_DISPLAY_CTRL_VSYNC_PHASE 13:13
+#define CRT_DISPLAY_CTRL_VSYNC_PHASE_ACTIVE_HIGH 0
+#define CRT_DISPLAY_CTRL_VSYNC_PHASE_ACTIVE_LOW 1
+#define CRT_DISPLAY_CTRL_HSYNC_PHASE 12:12
+#define CRT_DISPLAY_CTRL_HSYNC_PHASE_ACTIVE_HIGH 0
+#define CRT_DISPLAY_CTRL_HSYNC_PHASE_ACTIVE_LOW 1
+#define CRT_DISPLAY_CTRL_BLANK 10:10
+#define CRT_DISPLAY_CTRL_BLANK_OFF 0
+#define CRT_DISPLAY_CTRL_BLANK_ON 1
+#define CRT_DISPLAY_CTRL_TIMING 8:8
+#define CRT_DISPLAY_CTRL_TIMING_DISABLE 0
+#define CRT_DISPLAY_CTRL_TIMING_ENABLE 1
+#define CRT_DISPLAY_CTRL_PIXEL 7:4
+#define CRT_DISPLAY_CTRL_GAMMA 3:3
+#define CRT_DISPLAY_CTRL_GAMMA_DISABLE 0
+#define CRT_DISPLAY_CTRL_GAMMA_ENABLE 1
+#define CRT_DISPLAY_CTRL_PLANE 2:2
+#define CRT_DISPLAY_CTRL_PLANE_DISABLE 0
+#define CRT_DISPLAY_CTRL_PLANE_ENABLE 1
+#define CRT_DISPLAY_CTRL_FORMAT 1:0
+#define CRT_DISPLAY_CTRL_FORMAT_8 0
+#define CRT_DISPLAY_CTRL_FORMAT_16 1
+#define CRT_DISPLAY_CTRL_FORMAT_32 2
+#define CRT_DISPLAY_CTRL_RESERVED_BITS_MASK 0xFF000200
+
+#define CRT_FB_ADDRESS 0x080204
+#define CRT_FB_ADDRESS_STATUS 31:31
+#define CRT_FB_ADDRESS_STATUS_CURRENT 0
+#define CRT_FB_ADDRESS_STATUS_PENDING 1
+#define CRT_FB_ADDRESS_EXT 27:27
+#define CRT_FB_ADDRESS_EXT_LOCAL 0
+#define CRT_FB_ADDRESS_EXT_EXTERNAL 1
+#define CRT_FB_ADDRESS_ADDRESS 25:0
+
+#define CRT_FB_WIDTH 0x080208
+#define CRT_FB_WIDTH_WIDTH 29:16
+#define CRT_FB_WIDTH_OFFSET 13:0
+
+#define CRT_HORIZONTAL_TOTAL 0x08020C
+#define CRT_HORIZONTAL_TOTAL_TOTAL 27:16
+#define CRT_HORIZONTAL_TOTAL_DISPLAY_END 11:0
+
+#define CRT_HORIZONTAL_SYNC 0x080210
+#define CRT_HORIZONTAL_SYNC_WIDTH 23:16
+#define CRT_HORIZONTAL_SYNC_START 11:0
+
+#define CRT_VERTICAL_TOTAL 0x080214
+#define CRT_VERTICAL_TOTAL_TOTAL 26:16
+#define CRT_VERTICAL_TOTAL_DISPLAY_END 10:0
+
+#define CRT_VERTICAL_SYNC 0x080218
+#define CRT_VERTICAL_SYNC_HEIGHT 21:16
+#define CRT_VERTICAL_SYNC_START 10:0
+
+#define CRT_SIGNATURE_ANALYZER 0x08021C
+#define CRT_SIGNATURE_ANALYZER_STATUS 31:16
+#define CRT_SIGNATURE_ANALYZER_ENABLE 3:3
+#define CRT_SIGNATURE_ANALYZER_ENABLE_DISABLE 0
+#define CRT_SIGNATURE_ANALYZER_ENABLE_ENABLE 1
+#define CRT_SIGNATURE_ANALYZER_RESET 2:2
+#define CRT_SIGNATURE_ANALYZER_RESET_NORMAL 0
+#define CRT_SIGNATURE_ANALYZER_RESET_RESET 1
+#define CRT_SIGNATURE_ANALYZER_SOURCE 1:0
+#define CRT_SIGNATURE_ANALYZER_SOURCE_RED 0
+#define CRT_SIGNATURE_ANALYZER_SOURCE_GREEN 1
+#define CRT_SIGNATURE_ANALYZER_SOURCE_BLUE 2
+
+#define CRT_CURRENT_LINE 0x080220
+#define CRT_CURRENT_LINE_LINE 10:0
+
+#define CRT_MONITOR_DETECT 0x080224
+#define CRT_MONITOR_DETECT_VALUE 25:25
+#define CRT_MONITOR_DETECT_VALUE_DISABLE 0
+#define CRT_MONITOR_DETECT_VALUE_ENABLE 1
+#define CRT_MONITOR_DETECT_ENABLE 24:24
+#define CRT_MONITOR_DETECT_ENABLE_DISABLE 0
+#define CRT_MONITOR_DETECT_ENABLE_ENABLE 1
+#define CRT_MONITOR_DETECT_RED 23:16
+#define CRT_MONITOR_DETECT_GREEN 15:8
+#define CRT_MONITOR_DETECT_BLUE 7:0
+
+#define CRT_SCALE 0x080228
+#define CRT_SCALE_VERTICAL_MODE 31:31
+#define CRT_SCALE_VERTICAL_MODE_EXPAND 0
+#define CRT_SCALE_VERTICAL_MODE_SHRINK 1
+#define CRT_SCALE_VERTICAL_SCALE 27:16
+#define CRT_SCALE_HORIZONTAL_MODE 15:15
+#define CRT_SCALE_HORIZONTAL_MODE_EXPAND 0
+#define CRT_SCALE_HORIZONTAL_MODE_SHRINK 1
+#define CRT_SCALE_HORIZONTAL_SCALE 11:0
+
+/* CRT Cursor Control */
+
+#define CRT_HWC_ADDRESS 0x080230
+#define CRT_HWC_ADDRESS_ENABLE 31:31
+#define CRT_HWC_ADDRESS_ENABLE_DISABLE 0
+#define CRT_HWC_ADDRESS_ENABLE_ENABLE 1
+#define CRT_HWC_ADDRESS_EXT 27:27
+#define CRT_HWC_ADDRESS_EXT_LOCAL 0
+#define CRT_HWC_ADDRESS_EXT_EXTERNAL 1
+#define CRT_HWC_ADDRESS_ADDRESS 25:0
+
+#define CRT_HWC_LOCATION 0x080234
+#define CRT_HWC_LOCATION_TOP 27:27
+#define CRT_HWC_LOCATION_TOP_INSIDE 0
+#define CRT_HWC_LOCATION_TOP_OUTSIDE 1
+#define CRT_HWC_LOCATION_Y 26:16
+#define CRT_HWC_LOCATION_LEFT 11:11
+#define CRT_HWC_LOCATION_LEFT_INSIDE 0
+#define CRT_HWC_LOCATION_LEFT_OUTSIDE 1
+#define CRT_HWC_LOCATION_X 10:0
+
+#define CRT_HWC_COLOR_12 0x080238
+#define CRT_HWC_COLOR_12_2_RGB565 31:16
+#define CRT_HWC_COLOR_12_1_RGB565 15:0
+
+#define CRT_HWC_COLOR_3 0x08023C
+#define CRT_HWC_COLOR_3_RGB565 15:0
+
+/* Old Definitions +++. Need to be removed if no application use it. */
+#if 0
+ #define CRT_HWC_COLOR_01 0x080238
+ #define CRT_HWC_COLOR_01_1_RED 31:27
+ #define CRT_HWC_COLOR_01_1_GREEN 26:21
+ #define CRT_HWC_COLOR_01_1_BLUE 20:16
+ #define CRT_HWC_COLOR_01_0_RED 15:11
+ #define CRT_HWC_COLOR_01_0_GREEN 10:5
+ #define CRT_HWC_COLOR_01_0_BLUE 4:0
+
+ #define CRT_HWC_COLOR_2 0x08023C
+ #define CRT_HWC_COLOR_2_RED 15:11
+ #define CRT_HWC_COLOR_2_GREEN 10:5
+ #define CRT_HWC_COLOR_2_BLUE 4:0
+#endif
+/* Old Definitions --- */
+
+/* This vertical expansion below start at 0x080240 ~ 0x080264 */
+#define CRT_VERTICAL_EXPANSION 0x080240
+#ifndef VALIDATION_CHIP
+ #define CRT_VERTICAL_CENTERING_VALUE 31:24
+#endif
+#define CRT_VERTICAL_EXPANSION_COMPARE_VALUE 23:16
+#define CRT_VERTICAL_EXPANSION_LINE_BUFFER 15:12
+#define CRT_VERTICAL_EXPANSION_SCALE_FACTOR 11:0
+
+/* This horizontal expansion below start at 0x080268 ~ 0x08027C */
+#define CRT_HORIZONTAL_EXPANSION 0x080268
+#ifndef VALIDATION_CHIP
+ #define CRT_HORIZONTAL_CENTERING_VALUE 31:24
+#endif
+#define CRT_HORIZONTAL_EXPANSION_COMPARE_VALUE 23:16
+#define CRT_HORIZONTAL_EXPANSION_SCALE_FACTOR 11:0
+
+#ifndef VALIDATION_CHIP
+ /* Auto Centering */
+ #define CRT_AUTO_CENTERING_TL 0x080280
+ #define CRT_AUTO_CENTERING_TL_TOP 26:16
+ #define CRT_AUTO_CENTERING_TL_LEFT 10:0
+
+ #define CRT_AUTO_CENTERING_BR 0x080284
+ #define CRT_AUTO_CENTERING_BR_BOTTOM 26:16
+ #define CRT_AUTO_CENTERING_BR_RIGHT 10:0
+#endif
+
+/* sm750le new register to control panel output */
+#define DISPLAY_CONTROL_750LE 0x80288
+/* Palette RAM */
+
+/* Panel Pallete register starts at 0x080400 ~ 0x0807FC */
+#define PANEL_PALETTE_RAM 0x080400
+
+/* Panel Pallete register starts at 0x080C00 ~ 0x080FFC */
+#define CRT_PALETTE_RAM 0x080C00
+
+/* 2D registers
+ * move their defination into general lynx_accel.h file
+ * because all smi graphic chip share the same drawing engine
+ * register format */
+#if 0
+#define DE_SOURCE 0x100000
+#define DE_SOURCE_WRAP 31:31
+#define DE_SOURCE_WRAP_DISABLE 0
+#define DE_SOURCE_WRAP_ENABLE 1
+
+/*
+ * The following definitions are used in different setting
+ */
+
+/* Use these definitions in XY addressing mode or linear addressing mode. */
+#define DE_SOURCE_X_K1 27:16
+#define DE_SOURCE_Y_K2 11:0
+
+/* Use this definition in host write mode for mono. The Y_K2 is not used
+ in host write mode. */
+#define DE_SOURCE_X_K1_MONO 20:16
+
+/* Use these definitions in Bresenham line drawing mode. */
+#define DE_SOURCE_X_K1_LINE 29:16
+#define DE_SOURCE_Y_K2_LINE 13:0
+
+#define DE_DESTINATION 0x100004
+#define DE_DESTINATION_WRAP 31:31
+#define DE_DESTINATION_WRAP_DISABLE 0
+#define DE_DESTINATION_WRAP_ENABLE 1
+#if 1
+ #define DE_DESTINATION_X 27:16
+ #define DE_DESTINATION_Y 11:0
+#else
+ #define DE_DESTINATION_X 28:16
+ #define DE_DESTINATION_Y 15:0
+#endif
+
+#define DE_DIMENSION 0x100008
+#define DE_DIMENSION_X 28:16
+#define DE_DIMENSION_Y_ET 15:0
+
+#define DE_CONTROL 0x10000C
+#define DE_CONTROL_STATUS 31:31
+#define DE_CONTROL_STATUS_STOP 0
+#define DE_CONTROL_STATUS_START 1
+#define DE_CONTROL_PATTERN 30:30
+#define DE_CONTROL_PATTERN_MONO 0
+#define DE_CONTROL_PATTERN_COLOR 1
+#define DE_CONTROL_UPDATE_DESTINATION_X 29:29
+#define DE_CONTROL_UPDATE_DESTINATION_X_DISABLE 0
+#define DE_CONTROL_UPDATE_DESTINATION_X_ENABLE 1
+#define DE_CONTROL_QUICK_START 28:28
+#define DE_CONTROL_QUICK_START_DISABLE 0
+#define DE_CONTROL_QUICK_START_ENABLE 1
+#define DE_CONTROL_DIRECTION 27:27
+#define DE_CONTROL_DIRECTION_LEFT_TO_RIGHT 0
+#define DE_CONTROL_DIRECTION_RIGHT_TO_LEFT 1
+#define DE_CONTROL_MAJOR 26:26
+#define DE_CONTROL_MAJOR_X 0
+#define DE_CONTROL_MAJOR_Y 1
+#define DE_CONTROL_STEP_X 25:25
+#define DE_CONTROL_STEP_X_POSITIVE 0
+#define DE_CONTROL_STEP_X_NEGATIVE 1
+#define DE_CONTROL_STEP_Y 24:24
+#define DE_CONTROL_STEP_Y_POSITIVE 0
+#define DE_CONTROL_STEP_Y_NEGATIVE 1
+#define DE_CONTROL_STRETCH 23:23
+#define DE_CONTROL_STRETCH_DISABLE 0
+#define DE_CONTROL_STRETCH_ENABLE 1
+#define DE_CONTROL_HOST 22:22
+#define DE_CONTROL_HOST_COLOR 0
+#define DE_CONTROL_HOST_MONO 1
+#define DE_CONTROL_LAST_PIXEL 21:21
+#define DE_CONTROL_LAST_PIXEL_OFF 0
+#define DE_CONTROL_LAST_PIXEL_ON 1
+#define DE_CONTROL_COMMAND 20:16
+#define DE_CONTROL_COMMAND_BITBLT 0
+#define DE_CONTROL_COMMAND_RECTANGLE_FILL 1
+#define DE_CONTROL_COMMAND_DE_TILE 2
+#define DE_CONTROL_COMMAND_TRAPEZOID_FILL 3
+#define DE_CONTROL_COMMAND_ALPHA_BLEND 4
+#define DE_CONTROL_COMMAND_RLE_STRIP 5
+#define DE_CONTROL_COMMAND_SHORT_STROKE 6
+#define DE_CONTROL_COMMAND_LINE_DRAW 7
+#define DE_CONTROL_COMMAND_HOST_WRITE 8
+#define DE_CONTROL_COMMAND_HOST_READ 9
+#define DE_CONTROL_COMMAND_HOST_WRITE_BOTTOM_UP 10
+#define DE_CONTROL_COMMAND_ROTATE 11
+#define DE_CONTROL_COMMAND_FONT 12
+#define DE_CONTROL_COMMAND_TEXTURE_LOAD 15
+#define DE_CONTROL_ROP_SELECT 15:15
+#define DE_CONTROL_ROP_SELECT_ROP3 0
+#define DE_CONTROL_ROP_SELECT_ROP2 1
+#define DE_CONTROL_ROP2_SOURCE 14:14
+#define DE_CONTROL_ROP2_SOURCE_BITMAP 0
+#define DE_CONTROL_ROP2_SOURCE_PATTERN 1
+#define DE_CONTROL_MONO_DATA 13:12
+#define DE_CONTROL_MONO_DATA_NOT_PACKED 0
+#define DE_CONTROL_MONO_DATA_8_PACKED 1
+#define DE_CONTROL_MONO_DATA_16_PACKED 2
+#define DE_CONTROL_MONO_DATA_32_PACKED 3
+#define DE_CONTROL_REPEAT_ROTATE 11:11
+#define DE_CONTROL_REPEAT_ROTATE_DISABLE 0
+#define DE_CONTROL_REPEAT_ROTATE_ENABLE 1
+#define DE_CONTROL_TRANSPARENCY_MATCH 10:10
+#define DE_CONTROL_TRANSPARENCY_MATCH_OPAQUE 0
+#define DE_CONTROL_TRANSPARENCY_MATCH_TRANSPARENT 1
+#define DE_CONTROL_TRANSPARENCY_SELECT 9:9
+#define DE_CONTROL_TRANSPARENCY_SELECT_SOURCE 0
+#define DE_CONTROL_TRANSPARENCY_SELECT_DESTINATION 1
+#define DE_CONTROL_TRANSPARENCY 8:8
+#define DE_CONTROL_TRANSPARENCY_DISABLE 0
+#define DE_CONTROL_TRANSPARENCY_ENABLE 1
+#define DE_CONTROL_ROP 7:0
+
+/* Pseudo fields. */
+
+#define DE_CONTROL_SHORT_STROKE_DIR 27:24
+#define DE_CONTROL_SHORT_STROKE_DIR_225 0
+#define DE_CONTROL_SHORT_STROKE_DIR_135 1
+#define DE_CONTROL_SHORT_STROKE_DIR_315 2
+#define DE_CONTROL_SHORT_STROKE_DIR_45 3
+#define DE_CONTROL_SHORT_STROKE_DIR_270 4
+#define DE_CONTROL_SHORT_STROKE_DIR_90 5
+#define DE_CONTROL_SHORT_STROKE_DIR_180 8
+#define DE_CONTROL_SHORT_STROKE_DIR_0 10
+#define DE_CONTROL_ROTATION 25:24
+#define DE_CONTROL_ROTATION_0 0
+#define DE_CONTROL_ROTATION_270 1
+#define DE_CONTROL_ROTATION_90 2
+#define DE_CONTROL_ROTATION_180 3
+
+#define DE_PITCH 0x100010
+#define DE_PITCH_DESTINATION 28:16
+#define DE_PITCH_SOURCE 12:0
+
+#define DE_FOREGROUND 0x100014
+#define DE_FOREGROUND_COLOR 31:0
+
+#define DE_BACKGROUND 0x100018
+#define DE_BACKGROUND_COLOR 31:0
+
+#define DE_STRETCH_FORMAT 0x10001C
+#define DE_STRETCH_FORMAT_PATTERN_XY 30:30
+#define DE_STRETCH_FORMAT_PATTERN_XY_NORMAL 0
+#define DE_STRETCH_FORMAT_PATTERN_XY_OVERWRITE 1
+#define DE_STRETCH_FORMAT_PATTERN_Y 29:27
+#define DE_STRETCH_FORMAT_PATTERN_X 25:23
+#define DE_STRETCH_FORMAT_PIXEL_FORMAT 21:20
+#define DE_STRETCH_FORMAT_PIXEL_FORMAT_8 0
+#define DE_STRETCH_FORMAT_PIXEL_FORMAT_16 1
+#define DE_STRETCH_FORMAT_PIXEL_FORMAT_32 2
+#define DE_STRETCH_FORMAT_ADDRESSING 19:16
+#define DE_STRETCH_FORMAT_ADDRESSING_XY 0
+#define DE_STRETCH_FORMAT_ADDRESSING_LINEAR 15
+#define DE_STRETCH_FORMAT_SOURCE_HEIGHT 11:0
+
+#define DE_COLOR_COMPARE 0x100020
+#define DE_COLOR_COMPARE_COLOR 23:0
+
+#define DE_COLOR_COMPARE_MASK 0x100024
+#define DE_COLOR_COMPARE_MASK_MASKS 23:0
+
+#define DE_MASKS 0x100028
+#define DE_MASKS_BYTE_MASK 31:16
+#define DE_MASKS_BIT_MASK 15:0
+
+#define DE_CLIP_TL 0x10002C
+#define DE_CLIP_TL_TOP 31:16
+#define DE_CLIP_TL_STATUS 13:13
+#define DE_CLIP_TL_STATUS_DISABLE 0
+#define DE_CLIP_TL_STATUS_ENABLE 1
+#define DE_CLIP_TL_INHIBIT 12:12
+#define DE_CLIP_TL_INHIBIT_OUTSIDE 0
+#define DE_CLIP_TL_INHIBIT_INSIDE 1
+#define DE_CLIP_TL_LEFT 11:0
+
+#define DE_CLIP_BR 0x100030
+#define DE_CLIP_BR_BOTTOM 31:16
+#define DE_CLIP_BR_RIGHT 12:0
+
+#define DE_MONO_PATTERN_LOW 0x100034
+#define DE_MONO_PATTERN_LOW_PATTERN 31:0
+
+#define DE_MONO_PATTERN_HIGH 0x100038
+#define DE_MONO_PATTERN_HIGH_PATTERN 31:0
+
+#define DE_WINDOW_WIDTH 0x10003C
+#define DE_WINDOW_WIDTH_DESTINATION 28:16
+#define DE_WINDOW_WIDTH_SOURCE 12:0
+
+#define DE_WINDOW_SOURCE_BASE 0x100040
+#define DE_WINDOW_SOURCE_BASE_EXT 27:27
+#define DE_WINDOW_SOURCE_BASE_EXT_LOCAL 0
+#define DE_WINDOW_SOURCE_BASE_EXT_EXTERNAL 1
+#define DE_WINDOW_SOURCE_BASE_CS 26:26
+#define DE_WINDOW_SOURCE_BASE_CS_0 0
+#define DE_WINDOW_SOURCE_BASE_CS_1 1
+#define DE_WINDOW_SOURCE_BASE_ADDRESS 25:0
+
+#define DE_WINDOW_DESTINATION_BASE 0x100044
+#define DE_WINDOW_DESTINATION_BASE_EXT 27:27
+#define DE_WINDOW_DESTINATION_BASE_EXT_LOCAL 0
+#define DE_WINDOW_DESTINATION_BASE_EXT_EXTERNAL 1
+#define DE_WINDOW_DESTINATION_BASE_CS 26:26
+#define DE_WINDOW_DESTINATION_BASE_CS_0 0
+#define DE_WINDOW_DESTINATION_BASE_CS_1 1
+#define DE_WINDOW_DESTINATION_BASE_ADDRESS 25:0
+
+#define DE_ALPHA 0x100048
+#define DE_ALPHA_VALUE 7:0
+
+#define DE_WRAP 0x10004C
+#define DE_WRAP_X 31:16
+#define DE_WRAP_Y 15:0
+
+#define DE_STATUS 0x100050
+#define DE_STATUS_CSC 1:1
+#define DE_STATUS_CSC_CLEAR 0
+#define DE_STATUS_CSC_NOT_ACTIVE 0
+#define DE_STATUS_CSC_ACTIVE 1
+#define DE_STATUS_2D 0:0
+#define DE_STATUS_2D_CLEAR 0
+#define DE_STATUS_2D_NOT_ACTIVE 0
+#define DE_STATUS_2D_ACTIVE 1
+#endif
+/* Color Space Conversion registers. */
+
+#define CSC_Y_SOURCE_BASE 0x1000C8
+#define CSC_Y_SOURCE_BASE_EXT 27:27
+#define CSC_Y_SOURCE_BASE_EXT_LOCAL 0
+#define CSC_Y_SOURCE_BASE_EXT_EXTERNAL 1
+#define CSC_Y_SOURCE_BASE_CS 26:26
+#define CSC_Y_SOURCE_BASE_CS_0 0
+#define CSC_Y_SOURCE_BASE_CS_1 1
+#define CSC_Y_SOURCE_BASE_ADDRESS 25:0
+
+#define CSC_CONSTANTS 0x1000CC
+#define CSC_CONSTANTS_Y 31:24
+#define CSC_CONSTANTS_R 23:16
+#define CSC_CONSTANTS_G 15:8
+#define CSC_CONSTANTS_B 7:0
+
+#define CSC_Y_SOURCE_X 0x1000D0
+#define CSC_Y_SOURCE_X_INTEGER 26:16
+#define CSC_Y_SOURCE_X_FRACTION 15:3
+
+#define CSC_Y_SOURCE_Y 0x1000D4
+#define CSC_Y_SOURCE_Y_INTEGER 27:16
+#define CSC_Y_SOURCE_Y_FRACTION 15:3
+
+#define CSC_U_SOURCE_BASE 0x1000D8
+#define CSC_U_SOURCE_BASE_EXT 27:27
+#define CSC_U_SOURCE_BASE_EXT_LOCAL 0
+#define CSC_U_SOURCE_BASE_EXT_EXTERNAL 1
+#define CSC_U_SOURCE_BASE_CS 26:26
+#define CSC_U_SOURCE_BASE_CS_0 0
+#define CSC_U_SOURCE_BASE_CS_1 1
+#define CSC_U_SOURCE_BASE_ADDRESS 25:0
+
+#define CSC_V_SOURCE_BASE 0x1000DC
+#define CSC_V_SOURCE_BASE_EXT 27:27
+#define CSC_V_SOURCE_BASE_EXT_LOCAL 0
+#define CSC_V_SOURCE_BASE_EXT_EXTERNAL 1
+#define CSC_V_SOURCE_BASE_CS 26:26
+#define CSC_V_SOURCE_BASE_CS_0 0
+#define CSC_V_SOURCE_BASE_CS_1 1
+#define CSC_V_SOURCE_BASE_ADDRESS 25:0
+
+#define CSC_SOURCE_DIMENSION 0x1000E0
+#define CSC_SOURCE_DIMENSION_X 31:16
+#define CSC_SOURCE_DIMENSION_Y 15:0
+
+#define CSC_SOURCE_PITCH 0x1000E4
+#define CSC_SOURCE_PITCH_Y 31:16
+#define CSC_SOURCE_PITCH_UV 15:0
+
+#define CSC_DESTINATION 0x1000E8
+#define CSC_DESTINATION_WRAP 31:31
+#define CSC_DESTINATION_WRAP_DISABLE 0
+#define CSC_DESTINATION_WRAP_ENABLE 1
+#define CSC_DESTINATION_X 27:16
+#define CSC_DESTINATION_Y 11:0
+
+#define CSC_DESTINATION_DIMENSION 0x1000EC
+#define CSC_DESTINATION_DIMENSION_X 31:16
+#define CSC_DESTINATION_DIMENSION_Y 15:0
+
+#define CSC_DESTINATION_PITCH 0x1000F0
+#define CSC_DESTINATION_PITCH_X 31:16
+#define CSC_DESTINATION_PITCH_Y 15:0
+
+#define CSC_SCALE_FACTOR 0x1000F4
+#define CSC_SCALE_FACTOR_HORIZONTAL 31:16
+#define CSC_SCALE_FACTOR_VERTICAL 15:0
+
+#define CSC_DESTINATION_BASE 0x1000F8
+#define CSC_DESTINATION_BASE_EXT 27:27
+#define CSC_DESTINATION_BASE_EXT_LOCAL 0
+#define CSC_DESTINATION_BASE_EXT_EXTERNAL 1
+#define CSC_DESTINATION_BASE_CS 26:26
+#define CSC_DESTINATION_BASE_CS_0 0
+#define CSC_DESTINATION_BASE_CS_1 1
+#define CSC_DESTINATION_BASE_ADDRESS 25:0
+
+#define CSC_CONTROL 0x1000FC
+#define CSC_CONTROL_STATUS 31:31
+#define CSC_CONTROL_STATUS_STOP 0
+#define CSC_CONTROL_STATUS_START 1
+#define CSC_CONTROL_SOURCE_FORMAT 30:28
+#define CSC_CONTROL_SOURCE_FORMAT_YUV422 0
+#define CSC_CONTROL_SOURCE_FORMAT_YUV420I 1
+#define CSC_CONTROL_SOURCE_FORMAT_YUV420 2
+#define CSC_CONTROL_SOURCE_FORMAT_YVU9 3
+#define CSC_CONTROL_SOURCE_FORMAT_IYU1 4
+#define CSC_CONTROL_SOURCE_FORMAT_IYU2 5
+#define CSC_CONTROL_SOURCE_FORMAT_RGB565 6
+#define CSC_CONTROL_SOURCE_FORMAT_RGB8888 7
+#define CSC_CONTROL_DESTINATION_FORMAT 27:26
+#define CSC_CONTROL_DESTINATION_FORMAT_RGB565 0
+#define CSC_CONTROL_DESTINATION_FORMAT_RGB8888 1
+#define CSC_CONTROL_HORIZONTAL_FILTER 25:25
+#define CSC_CONTROL_HORIZONTAL_FILTER_DISABLE 0
+#define CSC_CONTROL_HORIZONTAL_FILTER_ENABLE 1
+#define CSC_CONTROL_VERTICAL_FILTER 24:24
+#define CSC_CONTROL_VERTICAL_FILTER_DISABLE 0
+#define CSC_CONTROL_VERTICAL_FILTER_ENABLE 1
+#define CSC_CONTROL_BYTE_ORDER 23:23
+#define CSC_CONTROL_BYTE_ORDER_YUYV 0
+#define CSC_CONTROL_BYTE_ORDER_UYVY 1
+
+#define DE_DATA_PORT 0x110000
+
+#define I2C_BYTE_COUNT 0x010040
+#define I2C_BYTE_COUNT_COUNT 3:0
+
+#define I2C_CTRL 0x010041
+#define I2C_CTRL_INT 4:4
+#define I2C_CTRL_INT_DISABLE 0
+#define I2C_CTRL_INT_ENABLE 1
+#define I2C_CTRL_DIR 3:3
+#define I2C_CTRL_DIR_WR 0
+#define I2C_CTRL_DIR_RD 1
+#define I2C_CTRL_CTRL 2:2
+#define I2C_CTRL_CTRL_STOP 0
+#define I2C_CTRL_CTRL_START 1
+#define I2C_CTRL_MODE 1:1
+#define I2C_CTRL_MODE_STANDARD 0
+#define I2C_CTRL_MODE_FAST 1
+#define I2C_CTRL_EN 0:0
+#define I2C_CTRL_EN_DISABLE 0
+#define I2C_CTRL_EN_ENABLE 1
+
+#define I2C_STATUS 0x010042
+#define I2C_STATUS_TX 3:3
+#define I2C_STATUS_TX_PROGRESS 0
+#define I2C_STATUS_TX_COMPLETED 1
+#define I2C_TX_DONE 0x08
+#define I2C_STATUS_ERR 2:2
+#define I2C_STATUS_ERR_NORMAL 0
+#define I2C_STATUS_ERR_ERROR 1
+#define I2C_STATUS_ERR_CLEAR 0
+#define I2C_STATUS_ACK 1:1
+#define I2C_STATUS_ACK_RECEIVED 0
+#define I2C_STATUS_ACK_NOT 1
+#define I2C_STATUS_BSY 0:0
+#define I2C_STATUS_BSY_IDLE 0
+#define I2C_STATUS_BSY_BUSY 1
+
+#define I2C_RESET 0x010042
+#define I2C_RESET_BUS_ERROR 2:2
+#define I2C_RESET_BUS_ERROR_CLEAR 0
+
+#define I2C_SLAVE_ADDRESS 0x010043
+#define I2C_SLAVE_ADDRESS_ADDRESS 7:1
+#define I2C_SLAVE_ADDRESS_RW 0:0
+#define I2C_SLAVE_ADDRESS_RW_W 0
+#define I2C_SLAVE_ADDRESS_RW_R 1
+
+#define I2C_DATA0 0x010044
+#define I2C_DATA1 0x010045
+#define I2C_DATA2 0x010046
+#define I2C_DATA3 0x010047
+#define I2C_DATA4 0x010048
+#define I2C_DATA5 0x010049
+#define I2C_DATA6 0x01004A
+#define I2C_DATA7 0x01004B
+#define I2C_DATA8 0x01004C
+#define I2C_DATA9 0x01004D
+#define I2C_DATA10 0x01004E
+#define I2C_DATA11 0x01004F
+#define I2C_DATA12 0x010050
+#define I2C_DATA13 0x010051
+#define I2C_DATA14 0x010052
+#define I2C_DATA15 0x010053
+
+
+#define ZV0_CAPTURE_CTRL 0x090000
+#define ZV0_CAPTURE_CTRL_FIELD_INPUT 27:27
+#define ZV0_CAPTURE_CTRL_FIELD_INPUT_EVEN_FIELD 0
+#define ZV0_CAPTURE_CTRL_FIELD_INPUT_ODD_FIELD 1
+#define ZV0_CAPTURE_CTRL_SCAN 26:26
+#define ZV0_CAPTURE_CTRL_SCAN_PROGRESSIVE 0
+#define ZV0_CAPTURE_CTRL_SCAN_INTERLACE 1
+#define ZV0_CAPTURE_CTRL_CURRENT_BUFFER 25:25
+#define ZV0_CAPTURE_CTRL_CURRENT_BUFFER_0 0
+#define ZV0_CAPTURE_CTRL_CURRENT_BUFFER_1 1
+#define ZV0_CAPTURE_CTRL_VERTICAL_SYNC 24:24
+#define ZV0_CAPTURE_CTRL_VERTICAL_SYNC_INACTIVE 0
+#define ZV0_CAPTURE_CTRL_VERTICAL_SYNC_ACTIVE 1
+#define ZV0_CAPTURE_CTRL_ADJ 19:19
+#define ZV0_CAPTURE_CTRL_ADJ_NORMAL 0
+#define ZV0_CAPTURE_CTRL_ADJ_DELAY 1
+#define ZV0_CAPTURE_CTRL_HA 18:18
+#define ZV0_CAPTURE_CTRL_HA_DISABLE 0
+#define ZV0_CAPTURE_CTRL_HA_ENABLE 1
+#define ZV0_CAPTURE_CTRL_VSK 17:17
+#define ZV0_CAPTURE_CTRL_VSK_DISABLE 0
+#define ZV0_CAPTURE_CTRL_VSK_ENABLE 1
+#define ZV0_CAPTURE_CTRL_HSK 16:16
+#define ZV0_CAPTURE_CTRL_HSK_DISABLE 0
+#define ZV0_CAPTURE_CTRL_HSK_ENABLE 1
+#define ZV0_CAPTURE_CTRL_FD 15:15
+#define ZV0_CAPTURE_CTRL_FD_RISING 0
+#define ZV0_CAPTURE_CTRL_FD_FALLING 1
+#define ZV0_CAPTURE_CTRL_VP 14:14
+#define ZV0_CAPTURE_CTRL_VP_HIGH 0
+#define ZV0_CAPTURE_CTRL_VP_LOW 1
+#define ZV0_CAPTURE_CTRL_HP 13:13
+#define ZV0_CAPTURE_CTRL_HP_HIGH 0
+#define ZV0_CAPTURE_CTRL_HP_LOW 1
+#define ZV0_CAPTURE_CTRL_CP 12:12
+#define ZV0_CAPTURE_CTRL_CP_HIGH 0
+#define ZV0_CAPTURE_CTRL_CP_LOW 1
+#define ZV0_CAPTURE_CTRL_UVS 11:11
+#define ZV0_CAPTURE_CTRL_UVS_DISABLE 0
+#define ZV0_CAPTURE_CTRL_UVS_ENABLE 1
+#define ZV0_CAPTURE_CTRL_BS 10:10
+#define ZV0_CAPTURE_CTRL_BS_DISABLE 0
+#define ZV0_CAPTURE_CTRL_BS_ENABLE 1
+#define ZV0_CAPTURE_CTRL_CS 9:9
+#define ZV0_CAPTURE_CTRL_CS_16 0
+#define ZV0_CAPTURE_CTRL_CS_8 1
+#define ZV0_CAPTURE_CTRL_CF 8:8
+#define ZV0_CAPTURE_CTRL_CF_YUV 0
+#define ZV0_CAPTURE_CTRL_CF_RGB 1
+#define ZV0_CAPTURE_CTRL_FS 7:7
+#define ZV0_CAPTURE_CTRL_FS_DISABLE 0
+#define ZV0_CAPTURE_CTRL_FS_ENABLE 1
+#define ZV0_CAPTURE_CTRL_WEAVE 6:6
+#define ZV0_CAPTURE_CTRL_WEAVE_DISABLE 0
+#define ZV0_CAPTURE_CTRL_WEAVE_ENABLE 1
+#define ZV0_CAPTURE_CTRL_BOB 5:5
+#define ZV0_CAPTURE_CTRL_BOB_DISABLE 0
+#define ZV0_CAPTURE_CTRL_BOB_ENABLE 1
+#define ZV0_CAPTURE_CTRL_DB 4:4
+#define ZV0_CAPTURE_CTRL_DB_DISABLE 0
+#define ZV0_CAPTURE_CTRL_DB_ENABLE 1
+#define ZV0_CAPTURE_CTRL_CC 3:3
+#define ZV0_CAPTURE_CTRL_CC_CONTINUE 0
+#define ZV0_CAPTURE_CTRL_CC_CONDITION 1
+#define ZV0_CAPTURE_CTRL_RGB 2:2
+#define ZV0_CAPTURE_CTRL_RGB_DISABLE 0
+#define ZV0_CAPTURE_CTRL_RGB_ENABLE 1
+#define ZV0_CAPTURE_CTRL_656 1:1
+#define ZV0_CAPTURE_CTRL_656_DISABLE 0
+#define ZV0_CAPTURE_CTRL_656_ENABLE 1
+#define ZV0_CAPTURE_CTRL_CAP 0:0
+#define ZV0_CAPTURE_CTRL_CAP_DISABLE 0
+#define ZV0_CAPTURE_CTRL_CAP_ENABLE 1
+
+#define ZV0_CAPTURE_CLIP 0x090004
+#define ZV0_CAPTURE_CLIP_YCLIP_EVEN_FIELD 25:16
+#define ZV0_CAPTURE_CLIP_YCLIP 25:16
+#define ZV0_CAPTURE_CLIP_XCLIP 9:0
+
+#define ZV0_CAPTURE_SIZE 0x090008
+#define ZV0_CAPTURE_SIZE_HEIGHT 26:16
+#define ZV0_CAPTURE_SIZE_WIDTH 10:0
+
+#define ZV0_CAPTURE_BUF0_ADDRESS 0x09000C
+#define ZV0_CAPTURE_BUF0_ADDRESS_STATUS 31:31
+#define ZV0_CAPTURE_BUF0_ADDRESS_STATUS_CURRENT 0
+#define ZV0_CAPTURE_BUF0_ADDRESS_STATUS_PENDING 1
+#define ZV0_CAPTURE_BUF0_ADDRESS_EXT 27:27
+#define ZV0_CAPTURE_BUF0_ADDRESS_EXT_LOCAL 0
+#define ZV0_CAPTURE_BUF0_ADDRESS_EXT_EXTERNAL 1
+#define ZV0_CAPTURE_BUF0_ADDRESS_CS 26:26
+#define ZV0_CAPTURE_BUF0_ADDRESS_CS_0 0
+#define ZV0_CAPTURE_BUF0_ADDRESS_CS_1 1
+#define ZV0_CAPTURE_BUF0_ADDRESS_ADDRESS 25:0
+
+#define ZV0_CAPTURE_BUF1_ADDRESS 0x090010
+#define ZV0_CAPTURE_BUF1_ADDRESS_STATUS 31:31
+#define ZV0_CAPTURE_BUF1_ADDRESS_STATUS_CURRENT 0
+#define ZV0_CAPTURE_BUF1_ADDRESS_STATUS_PENDING 1
+#define ZV0_CAPTURE_BUF1_ADDRESS_EXT 27:27
+#define ZV0_CAPTURE_BUF1_ADDRESS_EXT_LOCAL 0
+#define ZV0_CAPTURE_BUF1_ADDRESS_EXT_EXTERNAL 1
+#define ZV0_CAPTURE_BUF1_ADDRESS_CS 26:26
+#define ZV0_CAPTURE_BUF1_ADDRESS_CS_0 0
+#define ZV0_CAPTURE_BUF1_ADDRESS_CS_1 1
+#define ZV0_CAPTURE_BUF1_ADDRESS_ADDRESS 25:0
+
+#define ZV0_CAPTURE_BUF_OFFSET 0x090014
+#ifndef VALIDATION_CHIP
+ #define ZV0_CAPTURE_BUF_OFFSET_YCLIP_ODD_FIELD 25:16
+#endif
+#define ZV0_CAPTURE_BUF_OFFSET_OFFSET 15:0
+
+#define ZV0_CAPTURE_FIFO_CTRL 0x090018
+#define ZV0_CAPTURE_FIFO_CTRL_FIFO 2:0
+#define ZV0_CAPTURE_FIFO_CTRL_FIFO_0 0
+#define ZV0_CAPTURE_FIFO_CTRL_FIFO_1 1
+#define ZV0_CAPTURE_FIFO_CTRL_FIFO_2 2
+#define ZV0_CAPTURE_FIFO_CTRL_FIFO_3 3
+#define ZV0_CAPTURE_FIFO_CTRL_FIFO_4 4
+#define ZV0_CAPTURE_FIFO_CTRL_FIFO_5 5
+#define ZV0_CAPTURE_FIFO_CTRL_FIFO_6 6
+#define ZV0_CAPTURE_FIFO_CTRL_FIFO_7 7
+
+#define ZV0_CAPTURE_YRGB_CONST 0x09001C
+#define ZV0_CAPTURE_YRGB_CONST_Y 31:24
+#define ZV0_CAPTURE_YRGB_CONST_R 23:16
+#define ZV0_CAPTURE_YRGB_CONST_G 15:8
+#define ZV0_CAPTURE_YRGB_CONST_B 7:0
+
+#define ZV0_CAPTURE_LINE_COMP 0x090020
+#define ZV0_CAPTURE_LINE_COMP_LC 10:0
+
+/* ZV1 */
+
+#define ZV1_CAPTURE_CTRL 0x098000
+#define ZV1_CAPTURE_CTRL_FIELD_INPUT 27:27
+#define ZV1_CAPTURE_CTRL_FIELD_INPUT_EVEN_FIELD 0
+#define ZV1_CAPTURE_CTRL_FIELD_INPUT_ODD_FIELD 0
+#define ZV1_CAPTURE_CTRL_SCAN 26:26
+#define ZV1_CAPTURE_CTRL_SCAN_PROGRESSIVE 0
+#define ZV1_CAPTURE_CTRL_SCAN_INTERLACE 1
+#define ZV1_CAPTURE_CTRL_CURRENT_BUFFER 25:25
+#define ZV1_CAPTURE_CTRL_CURRENT_BUFFER_0 0
+#define ZV1_CAPTURE_CTRL_CURRENT_BUFFER_1 1
+#define ZV1_CAPTURE_CTRL_VERTICAL_SYNC 24:24
+#define ZV1_CAPTURE_CTRL_VERTICAL_SYNC_INACTIVE 0
+#define ZV1_CAPTURE_CTRL_VERTICAL_SYNC_ACTIVE 1
+#define ZV1_CAPTURE_CTRL_PANEL 20:20
+#define ZV1_CAPTURE_CTRL_PANEL_DISABLE 0
+#define ZV1_CAPTURE_CTRL_PANEL_ENABLE 1
+#define ZV1_CAPTURE_CTRL_ADJ 19:19
+#define ZV1_CAPTURE_CTRL_ADJ_NORMAL 0
+#define ZV1_CAPTURE_CTRL_ADJ_DELAY 1
+#define ZV1_CAPTURE_CTRL_HA 18:18
+#define ZV1_CAPTURE_CTRL_HA_DISABLE 0
+#define ZV1_CAPTURE_CTRL_HA_ENABLE 1
+#define ZV1_CAPTURE_CTRL_VSK 17:17
+#define ZV1_CAPTURE_CTRL_VSK_DISABLE 0
+#define ZV1_CAPTURE_CTRL_VSK_ENABLE 1
+#define ZV1_CAPTURE_CTRL_HSK 16:16
+#define ZV1_CAPTURE_CTRL_HSK_DISABLE 0
+#define ZV1_CAPTURE_CTRL_HSK_ENABLE 1
+#define ZV1_CAPTURE_CTRL_FD 15:15
+#define ZV1_CAPTURE_CTRL_FD_RISING 0
+#define ZV1_CAPTURE_CTRL_FD_FALLING 1
+#define ZV1_CAPTURE_CTRL_VP 14:14
+#define ZV1_CAPTURE_CTRL_VP_HIGH 0
+#define ZV1_CAPTURE_CTRL_VP_LOW 1
+#define ZV1_CAPTURE_CTRL_HP 13:13
+#define ZV1_CAPTURE_CTRL_HP_HIGH 0
+#define ZV1_CAPTURE_CTRL_HP_LOW 1
+#define ZV1_CAPTURE_CTRL_CP 12:12
+#define ZV1_CAPTURE_CTRL_CP_HIGH 0
+#define ZV1_CAPTURE_CTRL_CP_LOW 1
+#define ZV1_CAPTURE_CTRL_UVS 11:11
+#define ZV1_CAPTURE_CTRL_UVS_DISABLE 0
+#define ZV1_CAPTURE_CTRL_UVS_ENABLE 1
+#define ZV1_CAPTURE_CTRL_BS 10:10
+#define ZV1_CAPTURE_CTRL_BS_DISABLE 0
+#define ZV1_CAPTURE_CTRL_BS_ENABLE 1
+#define ZV1_CAPTURE_CTRL_CS 9:9
+#define ZV1_CAPTURE_CTRL_CS_16 0
+#define ZV1_CAPTURE_CTRL_CS_8 1
+#define ZV1_CAPTURE_CTRL_CF 8:8
+#define ZV1_CAPTURE_CTRL_CF_YUV 0
+#define ZV1_CAPTURE_CTRL_CF_RGB 1
+#define ZV1_CAPTURE_CTRL_FS 7:7
+#define ZV1_CAPTURE_CTRL_FS_DISABLE 0
+#define ZV1_CAPTURE_CTRL_FS_ENABLE 1
+#define ZV1_CAPTURE_CTRL_WEAVE 6:6
+#define ZV1_CAPTURE_CTRL_WEAVE_DISABLE 0
+#define ZV1_CAPTURE_CTRL_WEAVE_ENABLE 1
+#define ZV1_CAPTURE_CTRL_BOB 5:5
+#define ZV1_CAPTURE_CTRL_BOB_DISABLE 0
+#define ZV1_CAPTURE_CTRL_BOB_ENABLE 1
+#define ZV1_CAPTURE_CTRL_DB 4:4
+#define ZV1_CAPTURE_CTRL_DB_DISABLE 0
+#define ZV1_CAPTURE_CTRL_DB_ENABLE 1
+#define ZV1_CAPTURE_CTRL_CC 3:3
+#define ZV1_CAPTURE_CTRL_CC_CONTINUE 0
+#define ZV1_CAPTURE_CTRL_CC_CONDITION 1
+#define ZV1_CAPTURE_CTRL_RGB 2:2
+#define ZV1_CAPTURE_CTRL_RGB_DISABLE 0
+#define ZV1_CAPTURE_CTRL_RGB_ENABLE 1
+#define ZV1_CAPTURE_CTRL_656 1:1
+#define ZV1_CAPTURE_CTRL_656_DISABLE 0
+#define ZV1_CAPTURE_CTRL_656_ENABLE 1
+#define ZV1_CAPTURE_CTRL_CAP 0:0
+#define ZV1_CAPTURE_CTRL_CAP_DISABLE 0
+#define ZV1_CAPTURE_CTRL_CAP_ENABLE 1
+
+#define ZV1_CAPTURE_CLIP 0x098004
+#define ZV1_CAPTURE_CLIP_YCLIP 25:16
+#define ZV1_CAPTURE_CLIP_XCLIP 9:0
+
+#define ZV1_CAPTURE_SIZE 0x098008
+#define ZV1_CAPTURE_SIZE_HEIGHT 26:16
+#define ZV1_CAPTURE_SIZE_WIDTH 10:0
+
+#define ZV1_CAPTURE_BUF0_ADDRESS 0x09800C
+#define ZV1_CAPTURE_BUF0_ADDRESS_STATUS 31:31
+#define ZV1_CAPTURE_BUF0_ADDRESS_STATUS_CURRENT 0
+#define ZV1_CAPTURE_BUF0_ADDRESS_STATUS_PENDING 1
+#define ZV1_CAPTURE_BUF0_ADDRESS_EXT 27:27
+#define ZV1_CAPTURE_BUF0_ADDRESS_EXT_LOCAL 0
+#define ZV1_CAPTURE_BUF0_ADDRESS_EXT_EXTERNAL 1
+#define ZV1_CAPTURE_BUF0_ADDRESS_CS 26:26
+#define ZV1_CAPTURE_BUF0_ADDRESS_CS_0 0
+#define ZV1_CAPTURE_BUF0_ADDRESS_CS_1 1
+#define ZV1_CAPTURE_BUF0_ADDRESS_ADDRESS 25:0
+
+#define ZV1_CAPTURE_BUF1_ADDRESS 0x098010
+#define ZV1_CAPTURE_BUF1_ADDRESS_STATUS 31:31
+#define ZV1_CAPTURE_BUF1_ADDRESS_STATUS_CURRENT 0
+#define ZV1_CAPTURE_BUF1_ADDRESS_STATUS_PENDING 1
+#define ZV1_CAPTURE_BUF1_ADDRESS_EXT 27:27
+#define ZV1_CAPTURE_BUF1_ADDRESS_EXT_LOCAL 0
+#define ZV1_CAPTURE_BUF1_ADDRESS_EXT_EXTERNAL 1
+#define ZV1_CAPTURE_BUF1_ADDRESS_CS 26:26
+#define ZV1_CAPTURE_BUF1_ADDRESS_CS_0 0
+#define ZV1_CAPTURE_BUF1_ADDRESS_CS_1 1
+#define ZV1_CAPTURE_BUF1_ADDRESS_ADDRESS 25:0
+
+#define ZV1_CAPTURE_BUF_OFFSET 0x098014
+#define ZV1_CAPTURE_BUF_OFFSET_OFFSET 15:0
+
+#define ZV1_CAPTURE_FIFO_CTRL 0x098018
+#define ZV1_CAPTURE_FIFO_CTRL_FIFO 2:0
+#define ZV1_CAPTURE_FIFO_CTRL_FIFO_0 0
+#define ZV1_CAPTURE_FIFO_CTRL_FIFO_1 1
+#define ZV1_CAPTURE_FIFO_CTRL_FIFO_2 2
+#define ZV1_CAPTURE_FIFO_CTRL_FIFO_3 3
+#define ZV1_CAPTURE_FIFO_CTRL_FIFO_4 4
+#define ZV1_CAPTURE_FIFO_CTRL_FIFO_5 5
+#define ZV1_CAPTURE_FIFO_CTRL_FIFO_6 6
+#define ZV1_CAPTURE_FIFO_CTRL_FIFO_7 7
+
+#define ZV1_CAPTURE_YRGB_CONST 0x09801C
+#define ZV1_CAPTURE_YRGB_CONST_Y 31:24
+#define ZV1_CAPTURE_YRGB_CONST_R 23:16
+#define ZV1_CAPTURE_YRGB_CONST_G 15:8
+#define ZV1_CAPTURE_YRGB_CONST_B 7:0
+
+#define DMA_1_SOURCE 0x0D0010
+#define DMA_1_SOURCE_ADDRESS_EXT 27:27
+#define DMA_1_SOURCE_ADDRESS_EXT_LOCAL 0
+#define DMA_1_SOURCE_ADDRESS_EXT_EXTERNAL 1
+#define DMA_1_SOURCE_ADDRESS_CS 26:26
+#define DMA_1_SOURCE_ADDRESS_CS_0 0
+#define DMA_1_SOURCE_ADDRESS_CS_1 1
+#define DMA_1_SOURCE_ADDRESS 25:0
+
+#define DMA_1_DESTINATION 0x0D0014
+#define DMA_1_DESTINATION_ADDRESS_EXT 27:27
+#define DMA_1_DESTINATION_ADDRESS_EXT_LOCAL 0
+#define DMA_1_DESTINATION_ADDRESS_EXT_EXTERNAL 1
+#define DMA_1_DESTINATION_ADDRESS_CS 26:26
+#define DMA_1_DESTINATION_ADDRESS_CS_0 0
+#define DMA_1_DESTINATION_ADDRESS_CS_1 1
+#define DMA_1_DESTINATION_ADDRESS 25:0
+
+#define DMA_1_SIZE_CONTROL 0x0D0018
+#define DMA_1_SIZE_CONTROL_STATUS 31:31
+#define DMA_1_SIZE_CONTROL_STATUS_IDLE 0
+#define DMA_1_SIZE_CONTROL_STATUS_ACTIVE 1
+#define DMA_1_SIZE_CONTROL_SIZE 23:0
+
+#define DMA_ABORT_INTERRUPT 0x0D0020
+#define DMA_ABORT_INTERRUPT_ABORT_1 5:5
+#define DMA_ABORT_INTERRUPT_ABORT_1_ENABLE 0
+#define DMA_ABORT_INTERRUPT_ABORT_1_ABORT 1
+#define DMA_ABORT_INTERRUPT_ABORT_0 4:4
+#define DMA_ABORT_INTERRUPT_ABORT_0_ENABLE 0
+#define DMA_ABORT_INTERRUPT_ABORT_0_ABORT 1
+#define DMA_ABORT_INTERRUPT_INT_1 1:1
+#define DMA_ABORT_INTERRUPT_INT_1_CLEAR 0
+#define DMA_ABORT_INTERRUPT_INT_1_FINISHED 1
+#define DMA_ABORT_INTERRUPT_INT_0 0:0
+#define DMA_ABORT_INTERRUPT_INT_0_CLEAR 0
+#define DMA_ABORT_INTERRUPT_INT_0_FINISHED 1
+
+
+
+
+
+/* Default i2c CLK and Data GPIO. These are the default i2c pins */
+#define DEFAULT_I2C_SCL 30
+#define DEFAULT_I2C_SDA 31
+
+
+#define GPIO_DATA_SM750LE 0x020018
+#define GPIO_DATA_SM750LE_1 1:1
+#define GPIO_DATA_SM750LE_0 0:0
+
+#define GPIO_DATA_DIRECTION_SM750LE 0x02001C
+#define GPIO_DATA_DIRECTION_SM750LE_1 1:1
+#define GPIO_DATA_DIRECTION_SM750LE_1_INPUT 0
+#define GPIO_DATA_DIRECTION_SM750LE_1_OUTPUT 1
+#define GPIO_DATA_DIRECTION_SM750LE_0 0:0
+#define GPIO_DATA_DIRECTION_SM750LE_0_INPUT 0
+#define GPIO_DATA_DIRECTION_SM750LE_0_OUTPUT 1
+
+
+#endif
--- /dev/null
+#define USE_DVICHIP
+#ifdef USE_DVICHIP
+
+#include "ddk750_sii164.h"
+#include "ddk750_hwi2c.h"
+
+/* I2C Address of each SII164 chip */
+#define SII164_I2C_ADDRESS 0x70
+
+/* Define this definition to use hardware i2c. */
+#define USE_HW_I2C
+
+#ifdef USE_HW_I2C
+ #define i2cWriteReg hwI2CWriteReg
+ #define i2cReadReg hwI2CReadReg
+#else
+ #define i2cWriteReg swI2CWriteReg
+ #define i2cReadReg swI2CReadReg
+#endif
+
+/* SII164 Vendor and Device ID */
+#define SII164_VENDOR_ID 0x0001
+#define SII164_DEVICE_ID 0x0006
+
+#ifdef SII164_FULL_FUNCTIONS
+/* Name of the DVI Controller chip */
+static char *gDviCtrlChipName = "Silicon Image SiI 164";
+#endif
+
+/*
+ * sii164GetVendorID
+ * This function gets the vendor ID of the DVI controller chip.
+ *
+ * Output:
+ * Vendor ID
+ */
+unsigned short sii164GetVendorID(void)
+{
+ unsigned short vendorID;
+
+ vendorID = ((unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_VENDOR_ID_HIGH) << 8) |
+ (unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_VENDOR_ID_LOW);
+
+ return vendorID;
+}
+
+/*
+ * sii164GetDeviceID
+ * This function gets the device ID of the DVI controller chip.
+ *
+ * Output:
+ * Device ID
+ */
+unsigned short sii164GetDeviceID(void)
+{
+ unsigned short deviceID;
+
+ deviceID = ((unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_DEVICE_ID_HIGH) << 8) |
+ (unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_DEVICE_ID_LOW);
+
+ return deviceID;
+}
+
+
+
+/* DVI.C will handle all SiI164 chip stuffs and try it best to make code minimal and useful */
+
+/*
+ * sii164InitChip
+ * This function initialize and detect the DVI controller chip.
+ *
+ * Input:
+ * edgeSelect - Edge Select:
+ * 0 = Input data is falling edge latched (falling edge
+ * latched first in dual edge mode)
+ * 1 = Input data is rising edge latched (rising edge
+ * latched first in dual edge mode)
+ * busSelect - Input Bus Select:
+ * 0 = Input data bus is 12-bits wide
+ * 1 = Input data bus is 24-bits wide
+ * dualEdgeClkSelect - Dual Edge Clock Select
+ * 0 = Input data is single edge latched
+ * 1 = Input data is dual edge latched
+ * hsyncEnable - Horizontal Sync Enable:
+ * 0 = HSYNC input is transmitted as fixed LOW
+ * 1 = HSYNC input is transmitted as is
+ * vsyncEnable - Vertical Sync Enable:
+ * 0 = VSYNC input is transmitted as fixed LOW
+ * 1 = VSYNC input is transmitted as is
+ * deskewEnable - De-skewing Enable:
+ * 0 = De-skew disabled
+ * 1 = De-skew enabled
+ * deskewSetting - De-skewing Setting (increment of 260psec)
+ * 0 = 1 step --> minimum setup / maximum hold
+ * 1 = 2 step
+ * 2 = 3 step
+ * 3 = 4 step
+ * 4 = 5 step
+ * 5 = 6 step
+ * 6 = 7 step
+ * 7 = 8 step --> maximum setup / minimum hold
+ * continuousSyncEnable- SYNC Continuous:
+ * 0 = Disable
+ * 1 = Enable
+ * pllFilterEnable - PLL Filter Enable
+ * 0 = Disable PLL Filter
+ * 1 = Enable PLL Filter
+ * pllFilterValue - PLL Filter characteristics:
+ * 0~7 (recommended value is 4)
+ *
+ * Output:
+ * 0 - Success
+ * -1 - Fail.
+ */
+long sii164InitChip(
+ unsigned char edgeSelect,
+ unsigned char busSelect,
+ unsigned char dualEdgeClkSelect,
+ unsigned char hsyncEnable,
+ unsigned char vsyncEnable,
+ unsigned char deskewEnable,
+ unsigned char deskewSetting,
+ unsigned char continuousSyncEnable,
+ unsigned char pllFilterEnable,
+ unsigned char pllFilterValue
+)
+{
+ //unsigned char ucRegIndex, ucRegValue;
+ //unsigned char ucDeviceAddress,
+ unsigned char config;
+ //unsigned long delayCount;
+
+ /* Initialize the i2c bus */
+#ifdef USE_HW_I2C
+ /* Use fast mode. */
+ hwI2CInit(1);
+#else
+ swI2CInit(DEFAULT_I2C_SCL, DEFAULT_I2C_SDA);
+#endif
+
+ /* Check if SII164 Chip exists */
+ if ((sii164GetVendorID() == SII164_VENDOR_ID) && (sii164GetDeviceID() == SII164_DEVICE_ID))
+ {
+
+#ifdef DDKDEBUG
+ //sii164PrintRegisterValues();
+#endif
+ /*
+ * Initialize SII164 controller chip.
+ */
+
+ /* Select the edge */
+ if (edgeSelect == 0)
+ config = SII164_CONFIGURATION_LATCH_FALLING;
+ else
+ config = SII164_CONFIGURATION_LATCH_RISING;
+
+ /* Select bus wide */
+ if (busSelect == 0)
+ config |= SII164_CONFIGURATION_BUS_12BITS;
+ else
+ config |= SII164_CONFIGURATION_BUS_24BITS;
+
+ /* Select Dual/Single Edge Clock */
+ if (dualEdgeClkSelect == 0)
+ config |= SII164_CONFIGURATION_CLOCK_SINGLE;
+ else
+ config |= SII164_CONFIGURATION_CLOCK_DUAL;
+
+ /* Select HSync Enable */
+ if (hsyncEnable == 0)
+ config |= SII164_CONFIGURATION_HSYNC_FORCE_LOW;
+ else
+ config |= SII164_CONFIGURATION_HSYNC_AS_IS;
+
+ /* Select VSync Enable */
+ if (vsyncEnable == 0)
+ config |= SII164_CONFIGURATION_VSYNC_FORCE_LOW;
+ else
+ config |= SII164_CONFIGURATION_VSYNC_AS_IS;
+
+ i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config);
+
+ /* De-skew enabled with default 111b value.
+ This will fix some artifacts problem in some mode on board 2.2.
+ Somehow this fix does not affect board 2.1.
+ */
+ if (deskewEnable == 0)
+ config = SII164_DESKEW_DISABLE;
+ else
+ config = SII164_DESKEW_ENABLE;
+
+ switch (deskewSetting)
+ {
+ case 0:
+ config |= SII164_DESKEW_1_STEP;
+ break;
+ case 1:
+ config |= SII164_DESKEW_2_STEP;
+ break;
+ case 2:
+ config |= SII164_DESKEW_3_STEP;
+ break;
+ case 3:
+ config |= SII164_DESKEW_4_STEP;
+ break;
+ case 4:
+ config |= SII164_DESKEW_5_STEP;
+ break;
+ case 5:
+ config |= SII164_DESKEW_6_STEP;
+ break;
+ case 6:
+ config |= SII164_DESKEW_7_STEP;
+ break;
+ case 7:
+ config |= SII164_DESKEW_8_STEP;
+ break;
+ }
+ i2cWriteReg(SII164_I2C_ADDRESS, SII164_DESKEW, config);
+
+ /* Enable/Disable Continuous Sync. */
+ if (continuousSyncEnable == 0)
+ config = SII164_PLL_FILTER_SYNC_CONTINUOUS_DISABLE;
+ else
+ config = SII164_PLL_FILTER_SYNC_CONTINUOUS_ENABLE;
+
+ /* Enable/Disable PLL Filter */
+ if (pllFilterEnable == 0)
+ config |= SII164_PLL_FILTER_DISABLE;
+ else
+ config |= SII164_PLL_FILTER_ENABLE;
+
+ /* Set the PLL Filter value */
+ config |= ((pllFilterValue & 0x07) << 1);
+
+ i2cWriteReg(SII164_I2C_ADDRESS, SII164_PLL, config);
+
+ /* Recover from Power Down and enable output. */
+ config = i2cReadReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION);
+ config |= SII164_CONFIGURATION_POWER_NORMAL;
+ i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config);
+
+#ifdef DDKDEBUG
+ //sii164PrintRegisterValues();
+#endif
+
+ return 0;
+ }
+
+ /* Return -1 if initialization fails. */
+ return (-1);
+}
+
+
+
+
+
+/* below sii164 function is not neccessary */
+
+#ifdef SII164_FULL_FUNCTIONS
+
+/*
+ * sii164ResetChip
+ * This function resets the DVI Controller Chip.
+ */
+void sii164ResetChip(void)
+{
+ /* Power down */
+ sii164SetPower(0);
+ sii164SetPower(1);
+}
+
+
+/*
+ * sii164GetChipString
+ * This function returns a char string name of the current DVI Controller chip.
+ * It's convenient for application need to display the chip name.
+ */
+char *sii164GetChipString(void)
+{
+ return gDviCtrlChipName;
+}
+
+
+/*
+ * sii164SetPower
+ * This function sets the power configuration of the DVI Controller Chip.
+ *
+ * Input:
+ * powerUp - Flag to set the power down or up
+ */
+void sii164SetPower(
+ unsigned char powerUp
+)
+{
+ unsigned char config;
+
+ config = i2cReadReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION);
+ if (powerUp == 1)
+ {
+ /* Power up the chip */
+ config &= ~SII164_CONFIGURATION_POWER_MASK;
+ config |= SII164_CONFIGURATION_POWER_NORMAL;
+ i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config);
+ }
+ else
+ {
+ /* Power down the chip */
+ config &= ~SII164_CONFIGURATION_POWER_MASK;
+ config |= SII164_CONFIGURATION_POWER_DOWN;
+ i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config);
+ }
+}
+
+
+/*
+ * sii164SelectHotPlugDetectionMode
+ * This function selects the mode of the hot plug detection.
+ */
+static void sii164SelectHotPlugDetectionMode(
+ sii164_hot_plug_mode_t hotPlugMode
+)
+{
+ unsigned char detectReg;
+
+ detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT) & ~SII164_DETECT_MONITOR_SENSE_OUTPUT_FLAG;
+ switch (hotPlugMode)
+ {
+ case SII164_HOTPLUG_DISABLE:
+ detectReg |= SII164_DETECT_MONITOR_SENSE_OUTPUT_HIGH;
+ break;
+ case SII164_HOTPLUG_USE_MDI:
+ detectReg &= ~SII164_DETECT_INTERRUPT_MASK;
+ detectReg |= SII164_DETECT_INTERRUPT_BY_HTPLG_PIN;
+ detectReg |= SII164_DETECT_MONITOR_SENSE_OUTPUT_MDI;
+ break;
+ case SII164_HOTPLUG_USE_RSEN:
+ detectReg |= SII164_DETECT_MONITOR_SENSE_OUTPUT_RSEN;
+ break;
+ case SII164_HOTPLUG_USE_HTPLG:
+ detectReg |= SII164_DETECT_MONITOR_SENSE_OUTPUT_HTPLG;
+ break;
+ }
+
+ i2cWriteReg(SII164_I2C_ADDRESS, SII164_DETECT, detectReg);
+}
+
+/*
+ * sii164EnableHotPlugDetection
+ * This function enables the Hot Plug detection.
+ *
+ * enableHotPlug - Enable (=1) / disable (=0) Hot Plug detection
+ */
+void sii164EnableHotPlugDetection(
+ unsigned char enableHotPlug
+)
+{
+ unsigned char detectReg;
+ detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT);
+
+ /* Depending on each DVI controller, need to enable the hot plug based on each
+ individual chip design. */
+ if (enableHotPlug != 0)
+ sii164SelectHotPlugDetectionMode(SII164_HOTPLUG_USE_MDI);
+ else
+ sii164SelectHotPlugDetectionMode(SII164_HOTPLUG_DISABLE);
+}
+
+/*
+ * sii164IsConnected
+ * Check if the DVI Monitor is connected.
+ *
+ * Output:
+ * 0 - Not Connected
+ * 1 - Connected
+ */
+unsigned char sii164IsConnected(void)
+{
+ unsigned char hotPlugValue;
+
+ hotPlugValue = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT) & SII164_DETECT_HOT_PLUG_STATUS_MASK;
+ if (hotPlugValue == SII164_DETECT_HOT_PLUG_STATUS_ON)
+ return 1;
+ else
+ return 0;
+}
+
+/*
+ * sii164CheckInterrupt
+ * Checks if interrupt has occured.
+ *
+ * Output:
+ * 0 - No interrupt
+ * 1 - Interrupt occurs
+ */
+unsigned char sii164CheckInterrupt(void)
+{
+ unsigned char detectReg;
+
+ detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT) & SII164_DETECT_MONITOR_STATE_MASK;
+ if (detectReg == SII164_DETECT_MONITOR_STATE_CHANGE)
+ return 1;
+ else
+ return 0;
+}
+
+/*
+ * sii164ClearInterrupt
+ * Clear the hot plug interrupt.
+ */
+void sii164ClearInterrupt(void)
+{
+ unsigned char detectReg;
+
+ /* Clear the MDI interrupt */
+ detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT);
+ i2cWriteReg(SII164_I2C_ADDRESS, SII164_DETECT, detectReg | SII164_DETECT_MONITOR_STATE_CLEAR);
+}
+
+#endif
+
+#endif
+
+
--- /dev/null
+#ifndef DDK750_SII164_H__
+#define DDK750_SII164_H__
+
+#define USE_DVICHIP
+
+/* Hot Plug detection mode structure */
+typedef enum _sii164_hot_plug_mode_t
+{
+ SII164_HOTPLUG_DISABLE = 0, /* Disable Hot Plug output bit (always high). */
+ SII164_HOTPLUG_USE_MDI, /* Use Monitor Detect Interrupt bit. */
+ SII164_HOTPLUG_USE_RSEN, /* Use Receiver Sense detect bit. */
+ SII164_HOTPLUG_USE_HTPLG /* Use Hot Plug detect bit. */
+} sii164_hot_plug_mode_t;
+
+
+/* Silicon Image SiI164 chip prototype */
+long sii164InitChip(
+ unsigned char edgeSelect,
+ unsigned char busSelect,
+ unsigned char dualEdgeClkSelect,
+ unsigned char hsyncEnable,
+ unsigned char vsyncEnable,
+ unsigned char deskewEnable,
+ unsigned char deskewSetting,
+ unsigned char continuousSyncEnable,
+ unsigned char pllFilterEnable,
+ unsigned char pllFilterValue
+);
+
+unsigned short sii164GetVendorID(void);
+unsigned short sii164GetDeviceID(void);
+
+
+#ifdef SII164_FULL_FUNCTIONS
+void sii164ResetChip(void);
+char *sii164GetChipString(void);
+void sii164SetPower(unsigned char powerUp);
+void sii164EnableHotPlugDetection(unsigned char enableHotPlug);
+unsigned char sii164IsConnected(void);
+unsigned char sii164CheckInterrupt(void);
+void sii164ClearInterrupt(void);
+#endif
+/* below register definination is used for Silicon Image SiI164 DVI controller chip */
+/*
+ * Vendor ID registers
+ */
+#define SII164_VENDOR_ID_LOW 0x00
+#define SII164_VENDOR_ID_HIGH 0x01
+
+/*
+ * Device ID registers
+ */
+#define SII164_DEVICE_ID_LOW 0x02
+#define SII164_DEVICE_ID_HIGH 0x03
+
+/*
+ * Device Revision
+ */
+#define SII164_DEVICE_REVISION 0x04
+
+/*
+ * Frequency Limitation registers
+ */
+#define SII164_FREQUENCY_LIMIT_LOW 0x06
+#define SII164_FREQUENCY_LIMIT_HIGH 0x07
+
+/*
+ * Power Down and Input Signal Configuration registers
+ */
+#define SII164_CONFIGURATION 0x08
+
+/* Power down (PD) */
+#define SII164_CONFIGURATION_POWER_DOWN 0x00
+#define SII164_CONFIGURATION_POWER_NORMAL 0x01
+#define SII164_CONFIGURATION_POWER_MASK 0x01
+
+/* Input Edge Latch Select (EDGE) */
+#define SII164_CONFIGURATION_LATCH_FALLING 0x00
+#define SII164_CONFIGURATION_LATCH_RISING 0x02
+
+/* Bus Select (BSEL) */
+#define SII164_CONFIGURATION_BUS_12BITS 0x00
+#define SII164_CONFIGURATION_BUS_24BITS 0x04
+
+/* Dual Edge Clock Select (DSEL) */
+#define SII164_CONFIGURATION_CLOCK_SINGLE 0x00
+#define SII164_CONFIGURATION_CLOCK_DUAL 0x08
+
+/* Horizontal Sync Enable (HEN) */
+#define SII164_CONFIGURATION_HSYNC_FORCE_LOW 0x00
+#define SII164_CONFIGURATION_HSYNC_AS_IS 0x10
+
+/* Vertical Sync Enable (VEN) */
+#define SII164_CONFIGURATION_VSYNC_FORCE_LOW 0x00
+#define SII164_CONFIGURATION_VSYNC_AS_IS 0x20
+
+/*
+ * Detection registers
+ */
+#define SII164_DETECT 0x09
+
+/* Monitor Detect Interrupt (MDI) */
+#define SII164_DETECT_MONITOR_STATE_CHANGE 0x00
+#define SII164_DETECT_MONITOR_STATE_NO_CHANGE 0x01
+#define SII164_DETECT_MONITOR_STATE_CLEAR 0x01
+#define SII164_DETECT_MONITOR_STATE_MASK 0x01
+
+/* Hot Plug detect Input (HTPLG) */
+#define SII164_DETECT_HOT_PLUG_STATUS_OFF 0x00
+#define SII164_DETECT_HOT_PLUG_STATUS_ON 0x02
+#define SII164_DETECT_HOT_PLUG_STATUS_MASK 0x02
+
+/* Receiver Sense (RSEN) */
+#define SII164_DETECT_RECEIVER_SENSE_NOT_DETECTED 0x00
+#define SII164_DETECT_RECEIVER_SENSE_DETECTED 0x04
+
+/* Interrupt Generation Method (TSEL) */
+#define SII164_DETECT_INTERRUPT_BY_RSEN_PIN 0x00
+#define SII164_DETECT_INTERRUPT_BY_HTPLG_PIN 0x08
+#define SII164_DETECT_INTERRUPT_MASK 0x08
+
+/* Monitor Sense Output (MSEN) */
+#define SII164_DETECT_MONITOR_SENSE_OUTPUT_HIGH 0x00
+#define SII164_DETECT_MONITOR_SENSE_OUTPUT_MDI 0x10
+#define SII164_DETECT_MONITOR_SENSE_OUTPUT_RSEN 0x20
+#define SII164_DETECT_MONITOR_SENSE_OUTPUT_HTPLG 0x30
+#define SII164_DETECT_MONITOR_SENSE_OUTPUT_FLAG 0x30
+
+/*
+ * Skewing registers
+ */
+#define SII164_DESKEW 0x0A
+
+/* General Purpose Input (CTL[3:1]) */
+#define SII164_DESKEW_GENERAL_PURPOSE_INPUT_MASK 0x0E
+
+/* De-skewing Enable bit (DKEN) */
+#define SII164_DESKEW_DISABLE 0x00
+#define SII164_DESKEW_ENABLE 0x10
+
+/* De-skewing Setting (DK[3:1])*/
+#define SII164_DESKEW_1_STEP 0x00
+#define SII164_DESKEW_2_STEP 0x20
+#define SII164_DESKEW_3_STEP 0x40
+#define SII164_DESKEW_4_STEP 0x60
+#define SII164_DESKEW_5_STEP 0x80
+#define SII164_DESKEW_6_STEP 0xA0
+#define SII164_DESKEW_7_STEP 0xC0
+#define SII164_DESKEW_8_STEP 0xE0
+
+/*
+ * User Configuration Data registers (CFG 7:0)
+ */
+#define SII164_USER_CONFIGURATION 0x0B
+
+/*
+ * PLL registers
+ */
+#define SII164_PLL 0x0C
+
+/* PLL Filter Value (PLLF) */
+#define SII164_PLL_FILTER_VALUE_MASK 0x0E
+
+/* PLL Filter Enable (PFEN) */
+#define SII164_PLL_FILTER_DISABLE 0x00
+#define SII164_PLL_FILTER_ENABLE 0x01
+
+/* Sync Continuous (SCNT) */
+#define SII164_PLL_FILTER_SYNC_CONTINUOUS_DISABLE 0x00
+#define SII164_PLL_FILTER_SYNC_CONTINUOUS_ENABLE 0x80
+
+#endif
--- /dev/null
+/*******************************************************************
+*
+* Copyright (c) 2007 by Silicon Motion, Inc. (SMI)
+*
+* All rights are reserved. Reproduction or in part is prohibited
+* without the written consent of the copyright owner.
+*
+* swi2c.c --- SM750/SM718 DDK
+* This file contains the source code for I2C using software
+* implementation.
+*
+*******************************************************************/
+#include "ddk750_help.h"
+#include "ddk750_reg.h"
+#include "ddk750_swi2c.h"
+#include "ddk750_power.h"
+
+
+/*******************************************************************
+ * I2C Software Master Driver:
+ * ===========================
+ * Each i2c cycle is split into 4 sections. Each of these section marks
+ * a point in time where the SCL or SDA may be changed.
+ *
+ * 1 Cycle == | Section I. | Section 2. | Section 3. | Section 4. |
+ * +-------------+-------------+-------------+-------------+
+ * | SCL set LOW |SCL no change| SCL set HIGH|SCL no change|
+ *
+ * ____________ _____________
+ * SCL == XXXX _____________ ____________ /
+ *
+ * I.e. the SCL may only be changed in section 1. and section 3. while
+ * the SDA may only be changed in section 2. and section 4. The table
+ * below gives the changes for these 2 lines in the varios sections.
+ *
+ * Section changes Table:
+ * ======================
+ * blank = no change, L = set bit LOW, H = set bit HIGH
+ *
+ * | 1.| 2.| 3.| 4.|
+ * ---------------+---+---+---+---+
+ * Tx Start SDA | | H | | L |
+ * SCL | L | | H | |
+ * ---------------+---+---+---+---+
+ * Tx Stop SDA | | L | | H |
+ * SCL | L | | H | |
+ * ---------------+---+---+---+---+
+ * Tx bit H SDA | | H | | |
+ * SCL | L | | H | |
+ * ---------------+---+---+---+---+
+ * Tx bit L SDA | | L | | |
+ * SCL | L | | H | |
+ * ---------------+---+---+---+---+
+ *
+ ******************************************************************/
+
+/* GPIO pins used for this I2C. It ranges from 0 to 63. */
+static unsigned char g_i2cClockGPIO = DEFAULT_I2C_SCL;
+static unsigned char g_i2cDataGPIO = DEFAULT_I2C_SDA;
+
+/*
+ * Below is the variable declaration for the GPIO pin register usage
+ * for the i2c Clock and i2c Data.
+ *
+ * Note:
+ * Notice that the GPIO usage for the i2c clock and i2c Data are
+ * separated. This is to make this code flexible enough when
+ * two separate GPIO pins for the clock and data are located
+ * in two different GPIO register set (worst case).
+ */
+
+/* i2c Clock GPIO Register usage */
+static unsigned long g_i2cClkGPIOMuxReg = GPIO_MUX;
+static unsigned long g_i2cClkGPIODataReg = GPIO_DATA;
+static unsigned long g_i2cClkGPIODataDirReg = GPIO_DATA_DIRECTION;
+
+/* i2c Data GPIO Register usage */
+static unsigned long g_i2cDataGPIOMuxReg = GPIO_MUX;
+static unsigned long g_i2cDataGPIODataReg = GPIO_DATA;
+static unsigned long g_i2cDataGPIODataDirReg = GPIO_DATA_DIRECTION;
+
+/*
+ * This function puts a delay between command
+ */
+static void swI2CWait(void)
+{
+ /* find a bug:
+ * peekIO method works well before suspend/resume
+ * but after suspend, peekIO(0x3ce,0x61) & 0x10
+ * always be non-zero,which makes the while loop
+ * never finish.
+ * use non-ultimate for loop below is safe
+ * */
+#if 0
+ /* Change wait algorithm to use PCI bus clock,
+ it's more reliable than counter loop ..
+ write 0x61 to 0x3ce and read from 0x3cf
+ */
+ while(peekIO(0x3ce,0x61) & 0x10);
+#else
+ int i, Temp;
+
+ for(i=0; i<600; i++)
+ {
+ Temp = i;
+ Temp += i;
+ }
+#endif
+}
+
+/*
+ * This function set/reset the SCL GPIO pin
+ *
+ * Parameters:
+ * value - Bit value to set to the SCL or SDA (0 = low, 1 = high)
+ *
+ * Notes:
+ * When setting SCL to high, just set the GPIO as input where the pull up
+ * resistor will pull the signal up. Do not use software to pull up the
+ * signal because the i2c will fail when other device try to drive the
+ * signal due to SM50x will drive the signal to always high.
+ */
+void swI2CSCL(unsigned char value)
+{
+ unsigned long ulGPIOData;
+ unsigned long ulGPIODirection;
+
+ ulGPIODirection = PEEK32(g_i2cClkGPIODataDirReg);
+ if (value) /* High */
+ {
+ /* Set direction as input. This will automatically pull the signal up. */
+ ulGPIODirection &= ~(1 << g_i2cClockGPIO);
+ POKE32(g_i2cClkGPIODataDirReg, ulGPIODirection);
+ }
+ else /* Low */
+ {
+ /* Set the signal down */
+ ulGPIOData = PEEK32(g_i2cClkGPIODataReg);
+ ulGPIOData &= ~(1 << g_i2cClockGPIO);
+ POKE32(g_i2cClkGPIODataReg, ulGPIOData);
+
+ /* Set direction as output */
+ ulGPIODirection |= (1 << g_i2cClockGPIO);
+ POKE32(g_i2cClkGPIODataDirReg, ulGPIODirection);
+ }
+}
+
+/*
+ * This function set/reset the SDA GPIO pin
+ *
+ * Parameters:
+ * value - Bit value to set to the SCL or SDA (0 = low, 1 = high)
+ *
+ * Notes:
+ * When setting SCL to high, just set the GPIO as input where the pull up
+ * resistor will pull the signal up. Do not use software to pull up the
+ * signal because the i2c will fail when other device try to drive the
+ * signal due to SM50x will drive the signal to always high.
+ */
+void swI2CSDA(unsigned char value)
+{
+ unsigned long ulGPIOData;
+ unsigned long ulGPIODirection;
+
+ ulGPIODirection = PEEK32(g_i2cDataGPIODataDirReg);
+ if (value) /* High */
+ {
+ /* Set direction as input. This will automatically pull the signal up. */
+ ulGPIODirection &= ~(1 << g_i2cDataGPIO);
+ POKE32(g_i2cDataGPIODataDirReg, ulGPIODirection);
+ }
+ else /* Low */
+ {
+ /* Set the signal down */
+ ulGPIOData = PEEK32(g_i2cDataGPIODataReg);
+ ulGPIOData &= ~(1 << g_i2cDataGPIO);
+ POKE32(g_i2cDataGPIODataReg, ulGPIOData);
+
+ /* Set direction as output */
+ ulGPIODirection |= (1 << g_i2cDataGPIO);
+ POKE32(g_i2cDataGPIODataDirReg, ulGPIODirection);
+ }
+}
+
+/*
+ * This function read the data from the SDA GPIO pin
+ *
+ * Return Value:
+ * The SDA data bit sent by the Slave
+ */
+static unsigned char swI2CReadSDA(void)
+{
+ unsigned long ulGPIODirection;
+ unsigned long ulGPIOData;
+
+ /* Make sure that the direction is input (High) */
+ ulGPIODirection = PEEK32(g_i2cDataGPIODataDirReg);
+ if ((ulGPIODirection & (1 << g_i2cDataGPIO)) != (~(1 << g_i2cDataGPIO)))
+ {
+ ulGPIODirection &= ~(1 << g_i2cDataGPIO);
+ POKE32(g_i2cDataGPIODataDirReg, ulGPIODirection);
+ }
+
+ /* Now read the SDA line */
+ ulGPIOData = PEEK32(g_i2cDataGPIODataReg);
+ if (ulGPIOData & (1 << g_i2cDataGPIO))
+ return 1;
+ else
+ return 0;
+}
+
+/*
+ * This function sends ACK signal
+ */
+static void swI2CAck(void)
+{
+ return; /* Single byte read is ok without it. */
+}
+
+/*
+ * This function sends the start command to the slave device
+ */
+static void swI2CStart(void)
+{
+ /* Start I2C */
+ swI2CSDA(1);
+ swI2CSCL(1);
+ swI2CSDA(0);
+}
+
+/*
+ * This function sends the stop command to the slave device
+ */
+static void swI2CStop(void)
+{
+ /* Stop the I2C */
+ swI2CSCL(1);
+ swI2CSDA(0);
+ swI2CSDA(1);
+}
+
+/*
+ * This function writes one byte to the slave device
+ *
+ * Parameters:
+ * data - Data to be write to the slave device
+ *
+ * Return Value:
+ * 0 - Success
+ * -1 - Fail to write byte
+ */
+static long swI2CWriteByte(unsigned char data)
+{
+ unsigned char value = data;
+ int i;
+
+ /* Sending the data bit by bit */
+ for (i=0; i<8; i++)
+ {
+ /* Set SCL to low */
+ swI2CSCL(0);
+
+ /* Send data bit */
+ if ((value & 0x80) != 0)
+ swI2CSDA(1);
+ else
+ swI2CSDA(0);
+
+ swI2CWait();
+
+ /* Toggle clk line to one */
+ swI2CSCL(1);
+ swI2CWait();
+
+ /* Shift byte to be sent */
+ value = value << 1;
+ }
+
+ /* Set the SCL Low and SDA High (prepare to get input) */
+ swI2CSCL(0);
+ swI2CSDA(1);
+
+ /* Set the SCL High for ack */
+ swI2CWait();
+ swI2CSCL(1);
+ swI2CWait();
+
+ /* Read SDA, until SDA==0 */
+ for(i=0; i<0xff; i++)
+ {
+ if (!swI2CReadSDA())
+ break;
+
+ swI2CSCL(0);
+ swI2CWait();
+ swI2CSCL(1);
+ swI2CWait();
+ }
+
+ /* Set the SCL Low and SDA High */
+ swI2CSCL(0);
+ swI2CSDA(1);
+
+ if (i<0xff)
+ return 0;
+ else
+ return -1;
+}
+
+/*
+ * This function reads one byte from the slave device
+ *
+ * Parameters:
+ * ack - Flag to indicate either to send the acknowledge
+ * message to the slave device or not
+ *
+ * Return Value:
+ * One byte data read from the Slave device
+ */
+static unsigned char swI2CReadByte(unsigned char ack)
+{
+ int i;
+ unsigned char data = 0;
+
+ for(i=7; i>=0; i--)
+ {
+ /* Set the SCL to Low and SDA to High (Input) */
+ swI2CSCL(0);
+ swI2CSDA(1);
+ swI2CWait();
+
+ /* Set the SCL High */
+ swI2CSCL(1);
+ swI2CWait();
+
+ /* Read data bits from SDA */
+ data |= (swI2CReadSDA() << i);
+ }
+
+ if (ack)
+ swI2CAck();
+
+ /* Set the SCL Low and SDA High */
+ swI2CSCL(0);
+ swI2CSDA(1);
+
+ return data;
+}
+
+/*
+ * This function initializes GPIO port for SW I2C communication.
+ *
+ * Parameters:
+ * i2cClkGPIO - The GPIO pin to be used as i2c SCL
+ * i2cDataGPIO - The GPIO pin to be used as i2c SDA
+ *
+ * Return Value:
+ * -1 - Fail to initialize the i2c
+ * 0 - Success
+ */
+static long swI2CInit_SM750LE(unsigned char i2cClkGPIO,
+ unsigned char i2cDataGPIO)
+{
+ int i;
+
+ /* Initialize the GPIO pin for the i2c Clock Register */
+ g_i2cClkGPIODataReg = GPIO_DATA_SM750LE;
+ g_i2cClkGPIODataDirReg = GPIO_DATA_DIRECTION_SM750LE;
+
+ /* Initialize the Clock GPIO Offset */
+ g_i2cClockGPIO = i2cClkGPIO;
+
+ /* Initialize the GPIO pin for the i2c Data Register */
+ g_i2cDataGPIODataReg = GPIO_DATA_SM750LE;
+ g_i2cDataGPIODataDirReg = GPIO_DATA_DIRECTION_SM750LE;
+
+ /* Initialize the Data GPIO Offset */
+ g_i2cDataGPIO = i2cDataGPIO;
+
+ /* Note that SM750LE don't have GPIO MUX and power is always on */
+
+ /* Clear the i2c lines. */
+ for(i=0; i<9; i++)
+ swI2CStop();
+
+ return 0;
+}
+
+/*
+ * This function initializes the i2c attributes and bus
+ *
+ * Parameters:
+ * i2cClkGPIO - The GPIO pin to be used as i2c SCL
+ * i2cDataGPIO - The GPIO pin to be used as i2c SDA
+ *
+ * Return Value:
+ * -1 - Fail to initialize the i2c
+ * 0 - Success
+ */
+long swI2CInit(
+ unsigned char i2cClkGPIO,
+ unsigned char i2cDataGPIO
+)
+{
+ int i;
+
+ /* Return 0 if the GPIO pins to be used is out of range. The range is only from [0..63] */
+ if ((i2cClkGPIO > 31) || (i2cDataGPIO > 31))
+ return -1;
+
+ if (getChipType() == SM750LE)
+ return swI2CInit_SM750LE(i2cClkGPIO, i2cDataGPIO);
+
+ /* Initialize the GPIO pin for the i2c Clock Register */
+ g_i2cClkGPIOMuxReg = GPIO_MUX;
+ g_i2cClkGPIODataReg = GPIO_DATA;
+ g_i2cClkGPIODataDirReg = GPIO_DATA_DIRECTION;
+
+ /* Initialize the Clock GPIO Offset */
+ g_i2cClockGPIO = i2cClkGPIO;
+
+ /* Initialize the GPIO pin for the i2c Data Register */
+ g_i2cDataGPIOMuxReg = GPIO_MUX;
+ g_i2cDataGPIODataReg = GPIO_DATA;
+ g_i2cDataGPIODataDirReg = GPIO_DATA_DIRECTION;
+
+ /* Initialize the Data GPIO Offset */
+ g_i2cDataGPIO = i2cDataGPIO;
+
+ /* Enable the GPIO pins for the i2c Clock and Data (GPIO MUX) */
+ POKE32(g_i2cClkGPIOMuxReg,
+ PEEK32(g_i2cClkGPIOMuxReg) & ~(1 << g_i2cClockGPIO));
+ POKE32(g_i2cDataGPIOMuxReg,
+ PEEK32(g_i2cDataGPIOMuxReg) & ~(1 << g_i2cDataGPIO));
+
+ /* Enable GPIO power */
+ enableGPIO(1);
+
+ /* Clear the i2c lines. */
+ for(i=0; i<9; i++)
+ swI2CStop();
+
+ return 0;
+}
+
+/*
+ * This function reads the slave device's register
+ *
+ * Parameters:
+ * deviceAddress - i2c Slave device address which register
+ * to be read from
+ * registerIndex - Slave device's register to be read
+ *
+ * Return Value:
+ * Register value
+ */
+unsigned char swI2CReadReg(
+ unsigned char deviceAddress,
+ unsigned char registerIndex
+)
+{
+ unsigned char data;
+
+ /* Send the Start signal */
+ swI2CStart();
+
+ /* Send the device address */
+ swI2CWriteByte(deviceAddress);
+
+ /* Send the register index */
+ swI2CWriteByte(registerIndex);
+
+ /* Get the bus again and get the data from the device read address */
+ swI2CStart();
+ swI2CWriteByte(deviceAddress + 1);
+ data = swI2CReadByte(1);
+
+ /* Stop swI2C and release the bus */
+ swI2CStop();
+
+ return data;
+}
+
+/*
+ * This function writes a value to the slave device's register
+ *
+ * Parameters:
+ * deviceAddress - i2c Slave device address which register
+ * to be written
+ * registerIndex - Slave device's register to be written
+ * data - Data to be written to the register
+ *
+ * Result:
+ * 0 - Success
+ * -1 - Fail
+ */
+long swI2CWriteReg(
+ unsigned char deviceAddress,
+ unsigned char registerIndex,
+ unsigned char data
+)
+{
+ long returnValue = 0;
+
+ /* Send the Start signal */
+ swI2CStart();
+
+ /* Send the device address and read the data. All should return success
+ in order for the writing processed to be successful
+ */
+ if ((swI2CWriteByte(deviceAddress) != 0) ||
+ (swI2CWriteByte(registerIndex) != 0) ||
+ (swI2CWriteByte(data) != 0))
+ {
+ returnValue = -1;
+ }
+
+ /* Stop i2c and release the bus */
+ swI2CStop();
+
+ return returnValue;
+}
--- /dev/null
+/*******************************************************************
+*
+* Copyright (c) 2007 by Silicon Motion, Inc. (SMI)
+*
+* All rights are reserved. Reproduction or in part is prohibited
+* without the written consent of the copyright owner.
+*
+* swi2c.h --- SM750/SM718 DDK
+* This file contains the definitions for i2c using software
+* implementation.
+*
+*******************************************************************/
+#ifndef _SWI2C_H_
+#define _SWI2C_H_
+
+/* Default i2c CLK and Data GPIO. These are the default i2c pins */
+#define DEFAULT_I2C_SCL 30
+#define DEFAULT_I2C_SDA 31
+
+/*
+ * This function initializes the i2c attributes and bus
+ *
+ * Parameters:
+ * i2cClkGPIO - The GPIO pin to be used as i2c SCL
+ * i2cDataGPIO - The GPIO pin to be used as i2c SDA
+ *
+ * Return Value:
+ * -1 - Fail to initialize the i2c
+ * 0 - Success
+ */
+long swI2CInit(
+ unsigned char i2cClkGPIO,
+ unsigned char i2cDataGPIO
+);
+
+/*
+ * This function reads the slave device's register
+ *
+ * Parameters:
+ * deviceAddress - i2c Slave device address which register
+ * to be read from
+ * registerIndex - Slave device's register to be read
+ *
+ * Return Value:
+ * Register value
+ */
+unsigned char swI2CReadReg(
+ unsigned char deviceAddress,
+ unsigned char registerIndex
+);
+
+/*
+ * This function writes a value to the slave device's register
+ *
+ * Parameters:
+ * deviceAddress - i2c Slave device address which register
+ * to be written
+ * registerIndex - Slave device's register to be written
+ * data - Data to be written to the register
+ *
+ * Result:
+ * 0 - Success
+ * -1 - Fail
+ */
+long swI2CWriteReg(
+ unsigned char deviceAddress,
+ unsigned char registerIndex,
+ unsigned char data
+);
+
+/*
+ * These two functions are used to toggle the data on the SCL and SDA I2C lines.
+ * The used of these two functions are not recommended unless it is necessary.
+ */
+
+/*
+ * This function set/reset the SCL GPIO pin
+ *
+ * Parameters:
+ * value - Bit value to set to the SCL or SDA (0 = low, 1 = high)
+ */
+void swI2CSCL(unsigned char value);
+
+/*
+ * This function set/reset the SDA GPIO pin
+ *
+ * Parameters:
+ * value - Bit value to set to the SCL or SDA (0 = low, 1 = high)
+ */
+void swI2CSDA(unsigned char value);
+
+#endif /* _SWI2C_H_ */
--- /dev/null
+
+static const struct fb_videomode modedb2[] = {
+ {
+ /* 640x400 @ 70 Hz, 31.5 kHz hsync */
+ NULL, 70, 640, 400, 39721, 40, 24, 39, 9, 96, 2,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 640x480 @ 60 Hz, 31.5 kHz hsync */
+ NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 800x600 @ 56 Hz, 35.15 kHz hsync */
+ NULL, 56, 800, 600, 27777, 128, 24, 22, 1, 72, 2,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1024x768 @ 87 Hz interlaced, 35.5 kHz hsync */
+ NULL, 87, 1024, 768, 22271, 56, 24, 33, 8, 160, 8,
+ 0, FB_VMODE_INTERLACED
+ }, {
+ /* 640x400 @ 85 Hz, 37.86 kHz hsync */
+ NULL, 85, 640, 400, 31746, 96, 32, 41, 1, 64, 3,
+ FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 640x480 @ 72 Hz, 36.5 kHz hsync */
+ NULL, 72, 640, 480, 31746, 144, 40, 30, 8, 40, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 640x480 @ 75 Hz, 37.50 kHz hsync */
+ NULL, 75, 640, 480, 31746, 120, 16, 16, 1, 64, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 800x600 @ 60 Hz, 37.8 kHz hsync */
+ NULL, 60, 800, 600, 25000, 88, 40, 23, 1, 128, 4,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 640x480 @ 85 Hz, 43.27 kHz hsync */
+ NULL, 85, 640, 480, 27777, 80, 56, 25, 1, 56, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1152x864 @ 89 Hz interlaced, 44 kHz hsync */
+ NULL, 69, 1152, 864, 15384, 96, 16, 110, 1, 216, 10,
+ 0, FB_VMODE_INTERLACED
+ }, {
+ /* 800x600 @ 72 Hz, 48.0 kHz hsync */
+ NULL, 72, 800, 600, 20000, 64, 56, 23, 37, 120, 6,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1024x768 @ 60 Hz, 48.4 kHz hsync */
+ NULL, 60, 1024, 768, 15384, 168, 8, 29, 3, 144, 6,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 640x480 @ 100 Hz, 53.01 kHz hsync */
+ NULL, 100, 640, 480, 21834, 96, 32, 36, 8, 96, 6,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1152x864 @ 60 Hz, 53.5 kHz hsync */
+ NULL, 60, 1152, 864, 11123, 208, 64, 16, 4, 256, 8,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 800x600 @ 85 Hz, 55.84 kHz hsync */
+ NULL, 85, 800, 600, 16460, 160, 64, 36, 16, 64, 5,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1024x768 @ 70 Hz, 56.5 kHz hsync */
+ NULL, 70, 1024, 768, 13333, 144, 24, 29, 3, 136, 6,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1280x960-60 VESA */
+ NULL, 60, 1280, 960, 9259, 312, 96, 36, 1, 112, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA
+ }, {
+ /* 1280x1024-60 VESA */
+ NULL, 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA
+ }, {
+ /* 1280x1024 @ 87 Hz interlaced, 51 kHz hsync */
+ NULL, 87, 1280, 1024, 12500, 56, 16, 128, 1, 216, 12,
+ 0, FB_VMODE_INTERLACED
+ }, {
+ /* 800x600 @ 100 Hz, 64.02 kHz hsync */
+ NULL, 100, 800, 600, 14357, 160, 64, 30, 4, 64, 6,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1024x768 @ 76 Hz, 62.5 kHz hsync */
+ NULL, 76, 1024, 768, 11764, 208, 8, 36, 16, 120, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1152x864 @ 70 Hz, 62.4 kHz hsync */
+ NULL, 70, 1152, 864, 10869, 106, 56, 20, 1, 160, 10,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1280x1024 @ 61 Hz, 64.2 kHz hsync */
+ NULL, 61, 1280, 1024, 9090, 200, 48, 26, 1, 184, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1400x1050 @ 60Hz, 63.9 kHz hsync */
+ NULL, 68, 1400, 1050, 9259, 136, 40, 13, 1, 112, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1400x1050 @ 75,107 Hz, 82,392 kHz +hsync +vsync*/
+ NULL, 75, 1400, 1050, 9271, 120, 56, 13, 0, 112, 3,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1400x1050 @ 60 Hz, ? kHz +hsync +vsync*/
+ NULL, 60, 1400, 1050, 9259, 128, 40, 12, 0, 112, 3,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1024x768 @ 85 Hz, 70.24 kHz hsync */
+ NULL, 85, 1024, 768, 10111, 192, 32, 34, 14, 160, 6,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1152x864 @ 78 Hz, 70.8 kHz hsync */
+ NULL, 78, 1152, 864, 9090, 228, 88, 32, 0, 84, 12,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1280x1024 @ 70 Hz, 74.59 kHz hsync */
+ NULL, 70, 1280, 1024, 7905, 224, 32, 28, 8, 160, 8,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1600x1200 @ 60Hz, 75.00 kHz hsync */
+ NULL, 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1152x864 @ 84 Hz, 76.0 kHz hsync */
+ NULL, 84, 1152, 864, 7407, 184, 312, 32, 0, 128, 12,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1280x1024 @ 74 Hz, 78.85 kHz hsync */
+ NULL, 74, 1280, 1024, 7407, 256, 32, 34, 3, 144, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1024x768 @ 100Hz, 80.21 kHz hsync */
+ NULL, 100, 1024, 768, 8658, 192, 32, 21, 3, 192, 10,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1280x1024 @ 76 Hz, 81.13 kHz hsync */
+ NULL, 76, 1280, 1024, 7407, 248, 32, 34, 3, 104, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1600x1200 @ 70 Hz, 87.50 kHz hsync */
+ NULL, 70, 1600, 1200, 5291, 304, 64, 46, 1, 192, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1152x864 @ 100 Hz, 89.62 kHz hsync */
+ NULL, 100, 1152, 864, 7264, 224, 32, 17, 2, 128, 19,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1280x1024 @ 85 Hz, 91.15 kHz hsync */
+ NULL, 85, 1280, 1024, 6349, 224, 64, 44, 1, 160, 3,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1600x1200 @ 75 Hz, 93.75 kHz hsync */
+ NULL, 75, 1600, 1200, 4938, 304, 64, 46, 1, 192, 3,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1600x1200 @ 85 Hz, 105.77 kHz hsync */
+ NULL, 85, 1600, 1200, 4545, 272, 16, 37, 4, 192, 3,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1280x1024 @ 100 Hz, 107.16 kHz hsync */
+ NULL, 100, 1280, 1024, 5502, 256, 32, 26, 7, 128, 15,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1800x1440 @ 64Hz, 96.15 kHz hsync */
+ NULL, 64, 1800, 1440, 4347, 304, 96, 46, 1, 192, 3,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1800x1440 @ 70Hz, 104.52 kHz hsync */
+ NULL, 70, 1800, 1440, 4000, 304, 96, 46, 1, 192, 3,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 512x384 @ 78 Hz, 31.50 kHz hsync */
+ NULL, 78, 512, 384, 49603, 48, 16, 16, 1, 64, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 512x384 @ 85 Hz, 34.38 kHz hsync */
+ NULL, 85, 512, 384, 45454, 48, 16, 16, 1, 64, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 320x200 @ 70 Hz, 31.5 kHz hsync, 8:5 aspect ratio */
+ NULL, 70, 320, 200, 79440, 16, 16, 20, 4, 48, 1,
+ 0, FB_VMODE_DOUBLE
+ }, {
+ /* 320x240 @ 60 Hz, 31.5 kHz hsync, 4:3 aspect ratio */
+ NULL, 60, 320, 240, 79440, 16, 16, 16, 5, 48, 1,
+ 0, FB_VMODE_DOUBLE
+ }, {
+ /* 320x240 @ 72 Hz, 36.5 kHz hsync */
+ NULL, 72, 320, 240, 63492, 16, 16, 16, 4, 48, 2,
+ 0, FB_VMODE_DOUBLE
+ }, {
+ /* 400x300 @ 56 Hz, 35.2 kHz hsync, 4:3 aspect ratio */
+ NULL, 56, 400, 300, 55555, 64, 16, 10, 1, 32, 1,
+ 0, FB_VMODE_DOUBLE
+ }, {
+ /* 400x300 @ 60 Hz, 37.8 kHz hsync */
+ NULL, 60, 400, 300, 50000, 48, 16, 11, 1, 64, 2,
+ 0, FB_VMODE_DOUBLE
+ }, {
+ /* 400x300 @ 72 Hz, 48.0 kHz hsync */
+ NULL, 72, 400, 300, 40000, 32, 24, 11, 19, 64, 3,
+ 0, FB_VMODE_DOUBLE
+ }, {
+ /* 480x300 @ 56 Hz, 35.2 kHz hsync, 8:5 aspect ratio */
+ NULL, 56, 480, 300, 46176, 80, 16, 10, 1, 40, 1,
+ 0, FB_VMODE_DOUBLE
+ }, {
+ /* 480x300 @ 60 Hz, 37.8 kHz hsync */
+ NULL, 60, 480, 300, 41858, 56, 16, 11, 1, 80, 2,
+ 0, FB_VMODE_DOUBLE
+ }, {
+ /* 480x300 @ 63 Hz, 39.6 kHz hsync */
+ NULL, 63, 480, 300, 40000, 56, 16, 11, 1, 80, 2,
+ 0, FB_VMODE_DOUBLE
+ }, {
+ /* 480x300 @ 72 Hz, 48.0 kHz hsync */
+ NULL, 72, 480, 300, 33386, 40, 24, 11, 19, 80, 3,
+ 0, FB_VMODE_DOUBLE
+ },
+};
+static const int nmodedb2 = sizeof(modedb2);
--- /dev/null
+Introduction:
+ SM750 of Silicon MOtion is pci express display controller device.
+ The SM750 embedded graphics features include:
+ - dual display
+ - 2D acceleration
+ - 16MB integrated video memory
+
+About the kernel module paramter of driver:
+
+ Use 1280,8bpp index color and 60 hz mode:
+ insmod ./sm750fb.ko g_option="1280x1024-8@60"
+
+ Disable MTRR,Disable 2d acceleration,Disable hardware cursor,
+ and use a 800x600 mode :
+ insmod ./sm750fb.ko g_option="noaccel:nomtrr:nohwc:800x600"
+
+ dual frame buffer for driver with "dual" parameter
+ insmod ./sm750fb.ko g_option="dual,800x600:1024x768"
+ it will create fb0 and fb1 (or fb1,fb2 if fb0 already exist) under /dev
+ and user can use con2fb to link fbX and ttyX
+
+ Notes:
+ 1) if you build the driver with built-in method, the paramter
+ you edited in the grub config file will be also the
+ same format as above modular method,but additionaly add
+ "video=sm750fb:"
+ ahead of parameters,so,it looks like:
+ video=sm750fb:noaccel,1280x1024@60,otherparam,etc...
+ it equal to modular method with below command:
+ insmod ./sm750fb.ko g_option="noaccel:1280x1024@60:otherparm:etc..."
+
+ 2) if you put 800x600 into the paramter without bpp and
+ refresh rate, kernel driver will defaulty use 16bpp and 60hz
+
+Important:
+ if you have vesafb enabled in your config then /dev/fb0 will be created by vesafb
+ and this driver will use fb1, fb2. In that case, you need to configure your X-server
+ to use fb1. Another simple althernative is to disable vesafb from your config.
--- /dev/null
+#include<linux/kernel.h>
+#include<linux/module.h>
+#include<linux/errno.h>
+#include<linux/string.h>
+#include<linux/mm.h>
+#include<linux/slab.h>
+#include<linux/delay.h>
+#include<linux/fb.h>
+#include<linux/ioport.h>
+#include<linux/init.h>
+#include<linux/pci.h>
+#include<linux/mm_types.h>
+#include<linux/vmalloc.h>
+#include<linux/pagemap.h>
+#include<linux/screen_info.h>
+#include<linux/vmalloc.h>
+#include<linux/pagemap.h>
+#include <linux/console.h>
+#ifdef CONFIG_MTRR
+#include <asm/mtrr.h>
+#endif
+#include <asm/fb.h>
+#include "sm750.h"
+#include "sm750_hw.h"
+#include "sm750_accel.h"
+#include "sm750_cursor.h"
+
+#include "modedb.h"
+
+int smi_indent = 0;
+
+
+/*
+ * #ifdef __BIG_ENDIAN
+ * ssize_t lynxfb_ops_write(struct fb_info *info, const char __user *buf,
+ * size_t count, loff_t *ppos);
+ * ssize_t lynxfb_ops_read(struct fb_info *info, char __user *buf,
+ * size_t count, loff_t *ppos);
+ * #endif
+ */
+
+typedef void (*PROC_SPEC_SETUP)(struct lynx_share*, char *);
+typedef int (*PROC_SPEC_MAP)(struct lynx_share*, struct pci_dev*);
+typedef int (*PROC_SPEC_INITHW)(struct lynx_share*, struct pci_dev*);
+
+
+/* common var for all device */
+static int g_hwcursor = 1;
+static int g_noaccel;
+#ifdef CONFIG_MTRR
+static int g_nomtrr;
+#endif
+static const char *g_fbmode[] = {NULL, NULL};
+static const char *g_def_fbmode = "800x600-16@60";
+static char *g_settings = NULL;
+static int g_dualview;
+static char *g_option = NULL;
+
+
+static const struct fb_videomode lynx750_ext[] = {
+ /* 1024x600-60 VESA [1.71:1] */
+ {NULL, 60, 1024, 600, 20423, 144, 40, 18, 1, 104, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ FB_VMODE_NONINTERLACED},
+
+ /* 1024x600-70 VESA */
+ {NULL, 70, 1024, 600, 17211, 152, 48, 21, 1, 104, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ FB_VMODE_NONINTERLACED},
+
+ /* 1024x600-75 VESA */
+ {NULL, 75, 1024, 600, 15822, 160, 56, 23, 1, 104, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ FB_VMODE_NONINTERLACED},
+
+ /* 1024x600-85 VESA */
+ {NULL, 85, 1024, 600, 13730, 168, 56, 26, 1, 112, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ FB_VMODE_NONINTERLACED},
+
+ /* 720x480 */
+ {NULL, 60, 720, 480, 37427, 88, 16, 13, 1, 72, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ FB_VMODE_NONINTERLACED},
+
+ /* 1280x720 [1.78:1] */
+ {NULL, 60, 1280, 720, 13426, 162, 86, 22, 1, 136, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ FB_VMODE_NONINTERLACED},
+
+ /* 1280x768@60 */
+ {NULL, 60, 1280, 768, 12579, 192, 64, 20, 3, 128, 7,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ FB_VMODE_NONINTERLACED},
+
+ {NULL, 60, 1360, 768, 11804, 208, 64, 23, 1, 144, 3,
+ FB_SYNC_HOR_HIGH_ACT|FB_VMODE_NONINTERLACED},
+
+ /* 1360 x 768 [1.77083:1] */
+ {NULL, 60, 1360, 768, 11804, 208, 64, 23, 1, 144, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ FB_VMODE_NONINTERLACED},
+
+ /* 1368 x 768 [1.78:1] */
+ {NULL, 60, 1368, 768, 11647, 216, 72, 23, 1, 144, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ FB_VMODE_NONINTERLACED},
+
+ /* 1440 x 900 [16:10] */
+ {NULL, 60, 1440, 900, 9392, 232, 80, 28, 1, 152, 3,
+ FB_SYNC_VERT_HIGH_ACT,
+ FB_VMODE_NONINTERLACED},
+
+ /* 1440x960 [15:10] */
+ {NULL, 60, 1440, 960, 8733, 240, 88, 30, 1, 152, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ FB_VMODE_NONINTERLACED},
+
+ /* 1920x1080 [16:9] */
+ {NULL, 60, 1920, 1080, 6734, 148, 88, 41, 1, 44, 3,
+ FB_SYNC_VERT_HIGH_ACT,
+ FB_VMODE_NONINTERLACED},
+};
+
+
+
+
+/* no hardware cursor supported under version 2.6.10, kernel bug */
+static int lynxfb_ops_cursor(struct fb_info *info, struct fb_cursor *fbcursor)
+{
+ struct lynxfb_par *par;
+ struct lynxfb_crtc *crtc;
+ struct lynx_cursor *cursor;
+
+ par = info->par;
+ crtc = &par->crtc;
+ cursor = &crtc->cursor;
+
+ if (fbcursor->image.width > cursor->maxW ||
+ fbcursor->image.height > cursor->maxH ||
+ fbcursor->image.depth > 1) {
+ return -ENXIO;
+ }
+
+ cursor->disable(cursor);
+ if (fbcursor->set & FB_CUR_SETSIZE)
+ cursor->setSize(cursor,
+ fbcursor->image.width,
+ fbcursor->image.height);
+
+ if (fbcursor->set & FB_CUR_SETPOS)
+ cursor->setPos(cursor,
+ fbcursor->image.dx - info->var.xoffset,
+ fbcursor->image.dy - info->var.yoffset);
+
+ if (fbcursor->set & FB_CUR_SETCMAP) {
+ /* get the 16bit color of kernel means */
+ u16 fg, bg;
+
+ fg = ((info->cmap.red[fbcursor->image.fg_color] & 0xf800))|
+ ((info->cmap.green[fbcursor->image.fg_color] & 0xfc00) >> 5)|
+ ((info->cmap.blue[fbcursor->image.fg_color] & 0xf800) >> 11);
+
+ bg = ((info->cmap.red[fbcursor->image.bg_color] & 0xf800))|
+ ((info->cmap.green[fbcursor->image.bg_color] & 0xfc00) >> 5)|
+ ((info->cmap.blue[fbcursor->image.bg_color] & 0xf800) >> 11);
+
+ cursor->setColor(cursor, fg, bg);
+ }
+
+
+ if (fbcursor->set & (FB_CUR_SETSHAPE | FB_CUR_SETIMAGE)) {
+ cursor->setData(cursor,
+ fbcursor->rop,
+ fbcursor->image.data,
+ fbcursor->mask);
+ }
+
+ if (fbcursor->enable)
+ cursor->enable(cursor);
+
+ return 0;
+}
+
+static void lynxfb_ops_fillrect(struct fb_info *info,
+ const struct fb_fillrect *region)
+{
+ struct lynxfb_par *par;
+ struct lynx_share *share;
+ unsigned int base, pitch, Bpp, rop;
+ u32 color;
+
+ if (info->state != FBINFO_STATE_RUNNING)
+ return;
+
+ par = info->par;
+ share = par->share;
+
+ /* each time 2d function begin to work,below three variable always need
+ * be set, seems we can put them together in some place */
+ base = par->crtc.oScreen;
+ pitch = info->fix.line_length;
+ Bpp = info->var.bits_per_pixel >> 3;
+
+ color = (Bpp == 1)?region->color:((u32 *)info->pseudo_palette)[region->color];
+ rop = (region->rop != ROP_COPY) ? HW_ROP2_XOR:HW_ROP2_COPY;
+
+ /*
+ * If not use spin_lock,system will die if user load driver
+ * and immediatly unload driver frequently (dual)
+ */
+ if (share->dual)
+ spin_lock(&share->slock);
+
+ share->accel.de_fillrect(&share->accel,
+ base, pitch, Bpp,
+ region->dx, region->dy,
+ region->width, region->height,
+ color, rop);
+ if (share->dual)
+ spin_unlock(&share->slock);
+}
+
+static void lynxfb_ops_copyarea(struct fb_info *info,
+ const struct fb_copyarea *region)
+{
+ struct lynxfb_par *par;
+ struct lynx_share *share;
+ unsigned int base, pitch, Bpp;
+
+ par = info->par;
+ share = par->share;
+
+ /* each time 2d function begin to work,below three variable always need
+ * be set, seems we can put them together in some place */
+ base = par->crtc.oScreen;
+ pitch = info->fix.line_length;
+ Bpp = info->var.bits_per_pixel >> 3;
+
+ /*
+ * If not use spin_lock, system will die if user load driver
+ * and immediatly unload driver frequently (dual)
+ */
+ if (share->dual)
+ spin_lock(&share->slock);
+
+ share->accel.de_copyarea(&share->accel,
+ base, pitch, region->sx, region->sy,
+ base, pitch, Bpp, region->dx, region->dy,
+ region->width, region->height, HW_ROP2_COPY);
+ if (share->dual)
+ spin_unlock(&share->slock);
+}
+
+static void lynxfb_ops_imageblit(struct fb_info *info,
+ const struct fb_image *image)
+{
+ unsigned int base, pitch, Bpp;
+ unsigned int fgcol, bgcol;
+ struct lynxfb_par *par;
+ struct lynx_share *share;
+
+ par = info->par;
+ share = par->share;
+ /* each time 2d function begin to work,below three variable always need
+ * be set, seems we can put them together in some place */
+ base = par->crtc.oScreen;
+ pitch = info->fix.line_length;
+ Bpp = info->var.bits_per_pixel >> 3;
+
+ if (image->depth == 1) {
+ if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
+ info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
+ fgcol = ((u32 *)info->pseudo_palette)[image->fg_color];
+ bgcol = ((u32 *)info->pseudo_palette)[image->bg_color];
+ } else {
+ fgcol = image->fg_color;
+ bgcol = image->bg_color;
+ }
+ goto _do_work;
+ }
+ return;
+_do_work:
+ /*
+ * If not use spin_lock, system will die if user load driver
+ * and immediatly unload driver frequently (dual)
+ */
+ if (share->dual)
+ spin_lock(&share->slock);
+
+ share->accel.de_imageblit(&share->accel,
+ image->data, image->width>>3, 0,
+ base, pitch, Bpp,
+ image->dx, image->dy,
+ image->width, image->height,
+ fgcol, bgcol, HW_ROP2_COPY);
+ if (share->dual)
+ spin_unlock(&share->slock);
+}
+
+static int lynxfb_ops_pan_display(struct fb_var_screeninfo *var,
+ struct fb_info *info)
+{
+ struct lynxfb_par *par;
+ struct lynxfb_crtc *crtc;
+ int ret;
+
+
+ if (!info)
+ return -EINVAL;
+
+ ret = 0;
+ par = info->par;
+ crtc = &par->crtc;
+ ret = crtc->proc_panDisplay(crtc, var, info);
+
+ return ret;
+}
+
+static int lynxfb_ops_set_par(struct fb_info *info)
+{
+ struct lynxfb_par *par;
+ struct lynx_share *share;
+ struct lynxfb_crtc *crtc;
+ struct lynxfb_output *output;
+ struct fb_var_screeninfo *var;
+ struct fb_fix_screeninfo *fix;
+ int ret;
+ unsigned int line_length;
+
+ if (!info)
+ return -EINVAL;
+
+ ret = 0;
+ par = info->par;
+ share = par->share;
+ crtc = &par->crtc;
+ output = &par->output;
+ var = &info->var;
+ fix = &info->fix;
+
+ /* fix structur is not so FIX ... */
+ line_length = var->xres_virtual * var->bits_per_pixel / 8;
+ line_length = PADDING(crtc->line_pad, line_length);
+ fix->line_length = line_length;
+ pr_err("fix->line_length = %d\n", fix->line_length);
+
+ /* var->red,green,blue,transp are need to be set by driver
+ * and these data should be set before setcolreg routine
+ * */
+
+ switch (var->bits_per_pixel) {
+ case 8:
+ fix->visual = FB_VISUAL_PSEUDOCOLOR;
+ var->red.offset = 0;
+ var->red.length = 8;
+ var->green.offset = 0;
+ var->green.length = 8;
+ var->blue.offset = 0;
+ var->blue.length = 8;
+ var->transp.length = 0;
+ var->transp.offset = 0;
+ break;
+ case 16:
+ var->red.offset = 11;
+ var->red.length = 5;
+ var->green.offset = 5;
+ var->green.length = 6;
+ var->blue.offset = 0;
+ var->blue.length = 5;
+ var->transp.length = 0;
+ var->transp.offset = 0;
+ fix->visual = FB_VISUAL_TRUECOLOR;
+ break;
+ case 24:
+ case 32:
+ var->red.offset = 16;
+ var->red.length = 8;
+ var->green.offset = 8;
+ var->green.length = 8;
+ var->blue.offset = 0;
+ var->blue.length = 8;
+ fix->visual = FB_VISUAL_TRUECOLOR;
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+ var->height = var->width = -1;
+ var->accel_flags = 0;/*FB_ACCELF_TEXT;*/
+
+ if (ret) {
+ pr_err("pixel bpp format not satisfied\n.");
+ return ret;
+ }
+ ret = crtc->proc_setMode(crtc, var, fix);
+ if (!ret)
+ ret = output->proc_setMode(output, var, fix);
+ return ret;
+}
+
+static inline unsigned int chan_to_field(unsigned int chan,
+ struct fb_bitfield *bf)
+{
+ chan &= 0xffff;
+ chan >>= 16 - bf->length;
+ return chan << bf->offset;
+}
+
+#ifdef CONFIG_PM
+static int lynxfb_suspend(struct pci_dev *pdev, pm_message_t mesg)
+{
+ struct fb_info *info;
+ struct lynx_share *share;
+ int ret;
+
+ if (mesg.event == pdev->dev.power.power_state.event)
+ return 0;
+
+ ret = 0;
+ share = pci_get_drvdata(pdev);
+ switch (mesg.event) {
+ case PM_EVENT_FREEZE:
+ case PM_EVENT_PRETHAW:
+ pdev->dev.power.power_state = mesg;
+ return 0;
+ }
+
+ console_lock();
+ if (mesg.event & PM_EVENT_SLEEP) {
+ info = share->fbinfo[0];
+ if (info)
+ /* 1 means do suspend */
+ fb_set_suspend(info, 1);
+ info = share->fbinfo[1];
+ if (info)
+ /* 1 means do suspend */
+ fb_set_suspend(info, 1);
+
+ ret = pci_save_state(pdev);
+ if (ret) {
+ pr_err("error:%d occurred in pci_save_state\n", ret);
+ return ret;
+ }
+
+ /* set chip to sleep mode */
+ if (share->suspend)
+ (*share->suspend)(share);
+
+ pci_disable_device(pdev);
+ ret = pci_set_power_state(pdev, pci_choose_state(pdev, mesg));
+ if (ret) {
+ pr_err("error:%d occurred in pci_set_power_state\n", ret);
+ return ret;
+ }
+ }
+
+ pdev->dev.power.power_state = mesg;
+ console_unlock();
+ return ret;
+}
+
+static int lynxfb_resume(struct pci_dev *pdev)
+{
+ struct fb_info *info;
+ struct lynx_share *share;
+
+ struct lynxfb_par *par;
+ struct lynxfb_crtc *crtc;
+ struct lynx_cursor *cursor;
+
+ int ret;
+
+
+ ret = 0;
+ share = pci_get_drvdata(pdev);
+
+ console_lock();
+
+ ret = pci_set_power_state(pdev, PCI_D0);
+ if (ret) {
+ pr_err("error:%d occured in pci_set_power_state\n", ret);
+ return ret;
+ }
+
+
+ if (pdev->dev.power.power_state.event != PM_EVENT_FREEZE) {
+ pci_restore_state(pdev);
+ ret = pci_enable_device(pdev);
+ if (ret) {
+ pr_err("error:%d occured in pci_enable_device\n", ret);
+ return ret;
+ }
+ pci_set_master(pdev);
+ }
+ if (share->resume)
+ (*share->resume)(share);
+
+ hw_sm750_inithw(share, pdev);
+
+
+ info = share->fbinfo[0];
+
+ if (info) {
+ par = info->par;
+ crtc = &par->crtc;
+ cursor = &crtc->cursor;
+ memset_io(cursor->vstart, 0x0, cursor->size);
+ memset_io(crtc->vScreen, 0x0, crtc->vidmem_size);
+ lynxfb_ops_set_par(info);
+ fb_set_suspend(info, 0);
+ }
+
+ info = share->fbinfo[1];
+
+ if (info) {
+ par = info->par;
+ crtc = &par->crtc;
+ cursor = &crtc->cursor;
+ memset_io(cursor->vstart, 0x0, cursor->size);
+ memset_io(crtc->vScreen, 0x0, crtc->vidmem_size);
+ lynxfb_ops_set_par(info);
+ fb_set_suspend(info, 0);
+ }
+
+
+ console_unlock();
+ return ret;
+}
+#endif
+
+static int lynxfb_ops_check_var(struct fb_var_screeninfo *var,
+ struct fb_info *info)
+{
+ struct lynxfb_par *par;
+ struct lynxfb_crtc *crtc;
+ struct lynxfb_output *output;
+ struct lynx_share *share;
+ int ret;
+ resource_size_t request;
+
+
+ par = info->par;
+ crtc = &par->crtc;
+ output = &par->output;
+ share = par->share;
+ ret = 0;
+
+ pr_debug("check var:%dx%d-%d\n",
+ var->xres,
+ var->yres,
+ var->bits_per_pixel);
+
+
+ switch (var->bits_per_pixel) {
+ case 8:
+ case 16:
+ case 24: /* support 24 bpp for only lynx712/722/720 */
+ case 32:
+ break;
+ default:
+ pr_err("bpp %d not supported\n", var->bits_per_pixel);
+ ret = -EINVAL;
+ goto exit;
+ }
+
+ switch (var->bits_per_pixel) {
+ case 8:
+ info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
+ var->red.offset = 0;
+ var->red.length = 8;
+ var->green.offset = 0;
+ var->green.length = 8;
+ var->blue.offset = 0;
+ var->blue.length = 8;
+ var->transp.length = 0;
+ var->transp.offset = 0;
+ break;
+ case 16:
+ var->red.offset = 11;
+ var->red.length = 5;
+ var->green.offset = 5;
+ var->green.length = 6;
+ var->blue.offset = 0;
+ var->blue.length = 5;
+ var->transp.length = 0;
+ var->transp.offset = 0;
+ info->fix.visual = FB_VISUAL_TRUECOLOR;
+ break;
+ case 24:
+ case 32:
+ var->red.offset = 16;
+ var->red.length = 8;
+ var->green.offset = 8;
+ var->green.length = 8;
+ var->blue.offset = 0;
+ var->blue.length = 8;
+ info->fix.visual = FB_VISUAL_TRUECOLOR;
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+ var->height = var->width = -1;
+ var->accel_flags = 0;/* FB_ACCELF_TEXT; */
+
+ /* check if current fb's video memory big enought to hold the onscreen*/
+ request = var->xres_virtual * (var->bits_per_pixel >> 3);
+ /* defaulty crtc->channel go with par->index */
+
+ request = PADDING(crtc->line_pad, request);
+ request = request * var->yres_virtual;
+ if (crtc->vidmem_size < request) {
+ pr_err("not enough video memory for mode\n");
+ return -ENOMEM;
+ }
+
+ ret = output->proc_checkMode(output, var);
+ if (!ret)
+ ret = crtc->proc_checkMode(crtc, var);
+exit:
+ return ret;
+}
+
+
+static int lynxfb_ops_setcolreg(unsigned regno,
+ unsigned red,
+ unsigned green,
+ unsigned blue,
+ unsigned transp,
+ struct fb_info *info)
+{
+ struct lynxfb_par *par;
+ struct lynxfb_crtc *crtc;
+ struct fb_var_screeninfo *var;
+ int ret;
+
+ par = info->par;
+ crtc = &par->crtc;
+ var = &info->var;
+ ret = 0;
+
+ if (regno > 256) {
+ pr_err("regno = %d\n", regno);
+ return -EINVAL;
+ }
+
+ if (info->var.grayscale)
+ red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
+
+ if (var->bits_per_pixel == 8 &&
+ info->fix.visual == FB_VISUAL_PSEUDOCOLOR) {
+ red >>= 8;
+ green >>= 8;
+ blue >>= 8;
+ ret = crtc->proc_setColReg(crtc, regno, red, green, blue);
+ goto exit;
+ }
+
+
+ if (info->fix.visual == FB_VISUAL_TRUECOLOR && regno < 256) {
+ u32 val;
+
+ if (var->bits_per_pixel == 16 ||
+ var->bits_per_pixel == 32 ||
+ var->bits_per_pixel == 24) {
+ val = chan_to_field(red, &var->red);
+ val |= chan_to_field(green, &var->green);
+ val |= chan_to_field(blue, &var->blue);
+ par->pseudo_palette[regno] = val;
+ goto exit;
+ }
+ }
+
+ ret = -EINVAL;
+
+exit:
+ return ret;
+}
+
+static int lynxfb_ops_blank(int blank, struct fb_info *info)
+{
+ struct lynxfb_par *par;
+ struct lynxfb_output *output;
+
+ pr_debug("blank = %d.\n", blank);
+ par = info->par;
+ output = &par->output;
+ return output->proc_setBLANK(output, blank);
+}
+
+static int sm750fb_set_drv(struct lynxfb_par *par)
+{
+ int ret;
+ struct lynx_share *share;
+ struct sm750_share *spec_share;
+ struct lynxfb_output *output;
+ struct lynxfb_crtc *crtc;
+
+ ret = 0;
+
+ share = par->share;
+ spec_share = container_of(share, struct sm750_share, share);
+ output = &par->output;
+ crtc = &par->crtc;
+
+ crtc->vidmem_size = (share->dual)?share->vidmem_size>>1:share->vidmem_size;
+ /* setup crtc and output member */
+ spec_share->hwCursor = g_hwcursor;
+
+ crtc->proc_setMode = hw_sm750_crtc_setMode;
+ crtc->proc_checkMode = hw_sm750_crtc_checkMode;
+ crtc->proc_setColReg = hw_sm750_setColReg;
+ crtc->proc_panDisplay = hw_sm750_pan_display;
+ crtc->clear = hw_sm750_crtc_clear;
+ crtc->line_pad = 16;
+ crtc->xpanstep = 8;
+ crtc->ypanstep = 1;
+ crtc->ywrapstep = 0;
+
+ output->proc_setMode = hw_sm750_output_setMode;
+ output->proc_checkMode = hw_sm750_output_checkMode;
+
+ output->proc_setBLANK = (share->revid == SM750LE_REVISION_ID)?hw_sm750le_setBLANK:hw_sm750_setBLANK;
+ output->clear = hw_sm750_output_clear;
+ /* chip specific phase */
+ share->accel.de_wait = (share->revid == SM750LE_REVISION_ID)?hw_sm750le_deWait : hw_sm750_deWait;
+ switch (spec_share->state.dataflow) {
+ case sm750_simul_pri:
+ output->paths = sm750_pnc;
+ crtc->channel = sm750_primary;
+ crtc->oScreen = 0;
+ crtc->vScreen = share->pvMem;
+ pr_info("use simul primary mode\n");
+ break;
+ case sm750_simul_sec:
+ output->paths = sm750_pnc;
+ crtc->channel = sm750_secondary;
+ crtc->oScreen = 0;
+ crtc->vScreen = share->pvMem;
+ break;
+ case sm750_dual_normal:
+ if (par->index == 0) {
+ output->paths = sm750_panel;
+ crtc->channel = sm750_primary;
+ crtc->oScreen = 0;
+ crtc->vScreen = share->pvMem;
+ } else {
+ output->paths = sm750_crt;
+ crtc->channel = sm750_secondary;
+ /* not consider of padding stuffs for oScreen,need fix */
+ crtc->oScreen = (share->vidmem_size >> 1);
+ crtc->vScreen = share->pvMem + crtc->oScreen;
+ }
+ break;
+ case sm750_dual_swap:
+ if (par->index == 0) {
+ output->paths = sm750_panel;
+ crtc->channel = sm750_secondary;
+ crtc->oScreen = 0;
+ crtc->vScreen = share->pvMem;
+ } else {
+ output->paths = sm750_crt;
+ crtc->channel = sm750_primary;
+ /* not consider of padding stuffs for oScreen,need fix */
+ crtc->oScreen = (share->vidmem_size >> 1);
+ crtc->vScreen = share->pvMem + crtc->oScreen;
+ }
+ break;
+ default:
+ ret = -EINVAL;
+ }
+
+ return ret;
+}
+
+static struct fb_ops lynxfb_ops = {
+ .owner = THIS_MODULE,
+ .fb_check_var = lynxfb_ops_check_var,
+ .fb_set_par = lynxfb_ops_set_par,
+ .fb_setcolreg = lynxfb_ops_setcolreg,
+ .fb_blank = lynxfb_ops_blank,
+ .fb_fillrect = cfb_fillrect,
+ .fb_imageblit = cfb_imageblit,
+ .fb_copyarea = cfb_copyarea,
+ /* cursor */
+ .fb_cursor = lynxfb_ops_cursor,
+};
+
+
+static int lynxfb_set_fbinfo(struct fb_info *info, int index)
+{
+ int i;
+ struct lynxfb_par *par;
+ struct lynx_share *share;
+ struct lynxfb_crtc *crtc;
+ struct lynxfb_output *output;
+ struct fb_var_screeninfo *var;
+ struct fb_fix_screeninfo *fix;
+
+ const struct fb_videomode *pdb[] = {
+ lynx750_ext, NULL, vesa_modes,
+ };
+ int cdb[] = {ARRAY_SIZE(lynx750_ext), 0, VESA_MODEDB_SIZE};
+ static const char *mdb_desc[] = {
+ "driver prepared modes",
+ "kernel prepared default modedb",
+ "kernel HELPERS prepared vesa_modes",
+ };
+
+
+ static const char *fixId[2] = {
+ "sm750_fb1", "sm750_fb2",
+ };
+
+ int ret, line_length;
+
+ ret = 0;
+ par = (struct lynxfb_par *)info->par;
+ share = par->share;
+ crtc = &par->crtc;
+ output = &par->output;
+ var = &info->var;
+ fix = &info->fix;
+
+ /* set index */
+ par->index = index;
+ output->channel = &crtc->channel;
+ sm750fb_set_drv(par);
+ lynxfb_ops.fb_pan_display = lynxfb_ops_pan_display;
+
+
+ /* set current cursor variable and proc pointer,
+ * must be set after crtc member initialized */
+ crtc->cursor.offset = crtc->oScreen + crtc->vidmem_size - 1024;
+ crtc->cursor.mmio = share->pvReg + 0x800f0 + (int)crtc->channel * 0x140;
+
+ pr_info("crtc->cursor.mmio = %p\n", crtc->cursor.mmio);
+ crtc->cursor.maxH = crtc->cursor.maxW = 64;
+ crtc->cursor.size = crtc->cursor.maxH*crtc->cursor.maxW*2/8;
+ crtc->cursor.disable = hw_cursor_disable;
+ crtc->cursor.enable = hw_cursor_enable;
+ crtc->cursor.setColor = hw_cursor_setColor;
+ crtc->cursor.setPos = hw_cursor_setPos;
+ crtc->cursor.setSize = hw_cursor_setSize;
+ crtc->cursor.setData = hw_cursor_setData;
+ crtc->cursor.vstart = share->pvMem + crtc->cursor.offset;
+
+
+ crtc->cursor.share = share;
+ memset_io(crtc->cursor.vstart, 0, crtc->cursor.size);
+ if (!g_hwcursor) {
+ lynxfb_ops.fb_cursor = NULL;
+ crtc->cursor.disable(&crtc->cursor);
+ }
+
+
+ /* set info->fbops, must be set before fb_find_mode */
+ if (!share->accel_off) {
+ /* use 2d acceleration */
+ lynxfb_ops.fb_fillrect = lynxfb_ops_fillrect;
+ lynxfb_ops.fb_copyarea = lynxfb_ops_copyarea;
+ lynxfb_ops.fb_imageblit = lynxfb_ops_imageblit;
+ }
+ info->fbops = &lynxfb_ops;
+
+ if (!g_fbmode[index]) {
+ g_fbmode[index] = g_def_fbmode;
+ if (index)
+ g_fbmode[index] = g_fbmode[0];
+ }
+
+
+ for (i = 0; i < 3; i++) {
+
+ ret = fb_find_mode(var, info, g_fbmode[index],
+ pdb[i], cdb[i], NULL, 8);
+
+ if (ret == 1) {
+ pr_info("success! use specified mode:%s in %s\n",
+ g_fbmode[index],
+ mdb_desc[i]);
+ break;
+ } else if (ret == 2) {
+ pr_warn("use specified mode:%s in %s,with an ignored refresh rate\n",
+ g_fbmode[index],
+ mdb_desc[i]);
+ break;
+ } else if (ret == 3) {
+ pr_warn("wanna use default mode\n");
+ /*break;*/
+ } else if (ret == 4) {
+ pr_warn("fall back to any valid mode\n");
+ } else {
+ pr_warn("ret = %d,fb_find_mode failed,with %s\n",
+ ret,
+ mdb_desc[i]);
+ }
+ }
+
+ /* some member of info->var had been set by fb_find_mode */
+
+ pr_info("Member of info->var is :\n\
+ xres=%d\n\
+ yres=%d\n\
+ xres_virtual=%d\n\
+ yres_virtual=%d\n\
+ xoffset=%d\n\
+ yoffset=%d\n\
+ bits_per_pixel=%d\n \
+ ...\n",
+ var->xres,
+ var->yres,
+ var->xres_virtual,
+ var->yres_virtual,
+ var->xoffset,
+ var->yoffset,
+ var->bits_per_pixel);
+
+ /* set par */
+ par->info = info;
+
+ /* set info */
+ line_length = PADDING(crtc->line_pad,
+ (var->xres_virtual * var->bits_per_pixel/8));
+
+ info->pseudo_palette = &par->pseudo_palette[0];
+ info->screen_base = crtc->vScreen;
+ pr_debug("screen_base vaddr = %p\n", info->screen_base);
+ info->screen_size = line_length * var->yres_virtual;
+ info->flags = FBINFO_FLAG_DEFAULT|0;
+
+ /* set info->fix */
+ fix->type = FB_TYPE_PACKED_PIXELS;
+ fix->type_aux = 0;
+ fix->xpanstep = crtc->xpanstep;
+ fix->ypanstep = crtc->ypanstep;
+ fix->ywrapstep = crtc->ywrapstep;
+ fix->accel = FB_ACCEL_SMI;
+
+ strlcpy(fix->id, fixId[index], sizeof(fix->id));
+
+
+ fix->smem_start = crtc->oScreen + share->vidmem_start;
+ pr_info("fix->smem_start = %lx\n", fix->smem_start);
+ /* according to mmap experiment from user space application,
+ * fix->mmio_len should not larger than virtual size
+ * (xres_virtual x yres_virtual x ByPP)
+ * Below line maybe buggy when user mmap fb dev node and write
+ * data into the bound over virtual size
+ * */
+ fix->smem_len = crtc->vidmem_size;
+ pr_info("fix->smem_len = %x\n", fix->smem_len);
+ info->screen_size = fix->smem_len;
+ fix->line_length = line_length;
+ fix->mmio_start = share->vidreg_start;
+ pr_info("fix->mmio_start = %lx\n", fix->mmio_start);
+ fix->mmio_len = share->vidreg_size;
+ pr_info("fix->mmio_len = %x\n", fix->mmio_len);
+ switch (var->bits_per_pixel) {
+ case 8:
+ fix->visual = FB_VISUAL_PSEUDOCOLOR;
+ break;
+ case 16:
+ case 32:
+ fix->visual = FB_VISUAL_TRUECOLOR;
+ break;
+ }
+
+ /* set var */
+ var->activate = FB_ACTIVATE_NOW;
+ var->accel_flags = 0;
+ var->vmode = FB_VMODE_NONINTERLACED;
+
+ pr_debug("#1 show info->cmap : \nstart=%d,len=%d,red=%p,green=%p,blue=%p,transp=%p\n",
+ info->cmap.start, info->cmap.len,
+ info->cmap.red, info->cmap.green, info->cmap.blue,
+ info->cmap.transp);
+
+ ret = fb_alloc_cmap(&info->cmap, 256, 0);
+ if (ret < 0) {
+ pr_err("Could not allcate memory for cmap.\n");
+ goto exit;
+ }
+
+ pr_debug("#2 show info->cmap :\nstart=%d,len=%d,red=%p,green=%p,blue=%p,transp=%p\n",
+ info->cmap.start, info->cmap.len,
+ info->cmap.red, info->cmap.green, info->cmap.blue,
+ info->cmap.transp);
+
+exit:
+ lynxfb_ops_check_var(var, info);
+ return ret;
+}
+
+/* chip specific g_option configuration routine */
+static void sm750fb_setup(struct lynx_share *share, char *src)
+{
+ struct sm750_share *spec_share;
+ char *opt;
+#ifdef CAP_EXPENSION
+ char *exp_res;
+#endif
+ int swap;
+
+
+ spec_share = container_of(share, struct sm750_share, share);
+#ifdef CAP_EXPENSIION
+ exp_res = NULL;
+#endif
+ swap = 0;
+
+ spec_share->state.initParm.chip_clk = 0;
+ spec_share->state.initParm.mem_clk = 0;
+ spec_share->state.initParm.master_clk = 0;
+ spec_share->state.initParm.powerMode = 0;
+ spec_share->state.initParm.setAllEngOff = 0;
+ spec_share->state.initParm.resetMemory = 1;
+
+ /* defaultly turn g_hwcursor on for both view */
+ g_hwcursor = 3;
+
+ if (!src || !*src) {
+ pr_warn("no specific g_option.\n");
+ goto NO_PARAM;
+ }
+
+ while ((opt = strsep(&src, ":")) != NULL && *opt != 0) {
+ pr_err("opt=%s\n", opt);
+ pr_err("src=%s\n", src);
+
+ if (!strncmp(opt, "swap", strlen("swap")))
+ swap = 1;
+ else if (!strncmp(opt, "nocrt", strlen("nocrt")))
+ spec_share->state.nocrt = 1;
+ else if (!strncmp(opt, "36bit", strlen("36bit")))
+ spec_share->state.pnltype = sm750_doubleTFT;
+ else if (!strncmp(opt, "18bit", strlen("18bit")))
+ spec_share->state.pnltype = sm750_dualTFT;
+ else if (!strncmp(opt, "24bit", strlen("24bit")))
+ spec_share->state.pnltype = sm750_24TFT;
+#ifdef CAP_EXPANSION
+ else if (!strncmp(opt, "exp:", strlen("exp:")))
+ exp_res = opt + strlen("exp:");
+#endif
+ else if (!strncmp(opt, "nohwc0", strlen("nohwc0")))
+ g_hwcursor &= ~0x1;
+ else if (!strncmp(opt, "nohwc1", strlen("nohwc1")))
+ g_hwcursor &= ~0x2;
+ else if (!strncmp(opt, "nohwc", strlen("nohwc")))
+ g_hwcursor = 0;
+ else {
+ if (!g_fbmode[0]) {
+ g_fbmode[0] = opt;
+ pr_info("find fbmode0 : %s\n", g_fbmode[0]);
+ } else if (!g_fbmode[1]) {
+ g_fbmode[1] = opt;
+ pr_info("find fbmode1 : %s\n", g_fbmode[1]);
+ } else {
+ pr_warn("How many view you wann set?\n");
+ }
+ }
+ }
+#ifdef CAP_EXPANSION
+ if (getExpRes(exp_res,
+ &spec_share->state.xLCD,
+ &spec_share->state.yLCD)) {
+ /* seems exp_res is not valid */
+ spec_share->state.xLCD = spec_share->state.yLCD = 0;
+ }
+#endif
+
+NO_PARAM:
+ if (share->revid != SM750LE_REVISION_ID) {
+ if (share->dual) {
+ if (swap)
+ spec_share->state.dataflow = sm750_dual_swap;
+ else
+ spec_share->state.dataflow = sm750_dual_normal;
+ } else {
+ if (swap)
+ spec_share->state.dataflow = sm750_simul_sec;
+ else
+ spec_share->state.dataflow = sm750_simul_pri;
+ }
+ } else {
+ /* SM750LE only have one crt channel */
+ spec_share->state.dataflow = sm750_simul_sec;
+ /* sm750le do not have complex attributes */
+ spec_share->state.nocrt = 0;
+ }
+}
+
+static int lynxfb_pci_probe(struct pci_dev *pdev,
+ const struct pci_device_id * ent)
+{
+ struct fb_info *info[] = {NULL, NULL};
+ struct lynx_share *share = NULL;
+
+ struct sm750_share *spec_share = NULL;
+ size_t spec_offset = 0;
+ int fbidx;
+
+
+ /* enable device */
+ if (pci_enable_device(pdev)) {
+ pr_err("can not enable device.\n");
+ goto err_enable;
+ }
+
+ /* though offset of share in sm750_share is 0,
+ * we use this marcro as the same */
+ spec_offset = offsetof(struct sm750_share, share);
+
+ spec_share = kzalloc(sizeof(*spec_share), GFP_KERNEL);
+ if (!spec_share) {
+ pr_err("Could not allocate memory for share.\n");
+ goto err_share;
+ }
+
+ /* setting share structure */
+ share = (struct lynx_share *)(&(spec_share->share));
+ share->fbinfo[0] = share->fbinfo[1] = NULL;
+ share->devid = pdev->device;
+ share->revid = pdev->revision;
+
+ pr_info("share->revid = %02x\n", share->revid);
+ share->pdev = pdev;
+#ifdef CONFIG_MTRR
+ share->mtrr_off = g_nomtrr;
+ share->mtrr.vram = 0;
+ share->mtrr.vram_added = 0;
+#endif
+ share->accel_off = g_noaccel;
+ share->dual = g_dualview;
+ spin_lock_init(&share->slock);
+
+ if (!share->accel_off) {
+ /* hook deInit and 2d routines, notes that below hw_xxx
+ * routine can work on most of lynx chips
+ * if some chip need specific function,
+ * please hook it in smXXX_set_drv routine */
+ share->accel.de_init = hw_de_init;
+ share->accel.de_fillrect = hw_fillrect;
+ share->accel.de_copyarea = hw_copyarea;
+ share->accel.de_imageblit = hw_imageblit;
+ pr_info("enable 2d acceleration\n");
+ } else {
+ pr_info("disable 2d acceleration\n");
+ }
+
+ /* call chip specific setup routine */
+ sm750fb_setup(share, g_settings);
+
+ /* call chip specific mmap routine */
+ if (hw_sm750_map(share, pdev)) {
+ pr_err("Memory map failed\n");
+ goto err_map;
+ }
+
+#ifdef CONFIG_MTRR
+ if (!share->mtrr_off) {
+ pr_info("enable mtrr\n");
+ share->mtrr.vram = mtrr_add(share->vidmem_start,
+ share->vidmem_size,
+ MTRR_TYPE_WRCOMB, 1);
+
+ if (share->mtrr.vram < 0) {
+ /* don't block driver with the failure of MTRR */
+ pr_err("Unable to setup MTRR.\n");
+ } else {
+ share->mtrr.vram_added = 1;
+ pr_info("MTRR added succesfully\n");
+ }
+ }
+#endif
+
+ memset_io(share->pvMem, 0, share->vidmem_size);
+
+ pr_info("sm%3x mmio address = %p\n", share->devid, share->pvReg);
+
+ pci_set_drvdata(pdev, share);
+
+ /* call chipInit routine */
+ hw_sm750_inithw(share, pdev);
+
+ /* allocate frame buffer info structor according to g_dualview */
+ fbidx = 0;
+ALLOC_FB:
+ info[fbidx] = framebuffer_alloc(sizeof(struct lynxfb_par), &pdev->dev);
+ if (!info[fbidx]) {
+ pr_err("Could not allocate framebuffer #%d.\n", fbidx);
+ if (fbidx == 0)
+ goto err_info0_alloc;
+ else
+ goto err_info1_alloc;
+ } else {
+ struct lynxfb_par *par;
+ int errno;
+
+ pr_info("framebuffer #%d alloc okay\n", fbidx);
+ share->fbinfo[fbidx] = info[fbidx];
+ par = info[fbidx]->par;
+ par->share = share;
+
+ /* set fb_info structure */
+ if (lynxfb_set_fbinfo(info[fbidx], fbidx)) {
+ pr_err("Failed to initial fb_info #%d.\n", fbidx);
+ if (fbidx == 0)
+ goto err_info0_set;
+ else
+ goto err_info1_set;
+ }
+
+ /* register frame buffer */
+ pr_info("Ready to register framebuffer #%d.\n", fbidx);
+ errno = register_framebuffer(info[fbidx]);
+ if (errno < 0) {
+ pr_err("Failed to register fb_info #%d. err %d\n",
+ fbidx,
+ errno);
+ if (fbidx == 0)
+ goto err_register0;
+ else
+ goto err_register1;
+ }
+ pr_info("Accomplished register framebuffer #%d.\n", fbidx);
+ }
+
+ /* no dual view by far */
+ fbidx++;
+ if (share->dual && fbidx < 2)
+ goto ALLOC_FB;
+
+ return 0;
+
+err_register1:
+err_info1_set:
+ framebuffer_release(info[1]);
+err_info1_alloc:
+ unregister_framebuffer(info[0]);
+err_register0:
+err_info0_set:
+ framebuffer_release(info[0]);
+err_info0_alloc:
+err_map:
+ kfree(spec_share);
+err_share:
+err_enable:
+ return -ENODEV;
+}
+
+static void __exit lynxfb_pci_remove(struct pci_dev *pdev)
+{
+ struct fb_info *info;
+ struct lynx_share *share;
+ void *spec_share;
+ struct lynxfb_par *par;
+ int cnt;
+
+ cnt = 2;
+ share = pci_get_drvdata(pdev);
+
+ while (cnt-- > 0) {
+ info = share->fbinfo[cnt];
+ if (!info)
+ continue;
+ par = info->par;
+
+ unregister_framebuffer(info);
+ /* clean crtc & output allocations */
+ par->crtc.clear(&par->crtc);
+ par->output.clear(&par->output);
+ /* release frame buffer */
+ framebuffer_release(info);
+ }
+#ifdef CONFIG_MTRR
+ if (share->mtrr.vram_added)
+ mtrr_del(share->mtrr.vram,
+ share->vidmem_start,
+ share->vidmem_size);
+#endif
+
+ iounmap(share->pvReg);
+ iounmap(share->pvMem);
+ spec_share = container_of(share, struct sm750_share, share);
+ kfree(g_settings);
+ kfree(spec_share);
+ pci_set_drvdata(pdev, NULL);
+}
+
+static int __init lynxfb_setup(char *options)
+{
+ int len;
+ char *opt, *tmp;
+
+
+ if (!options || !*options) {
+ pr_warn("no options.\n");
+ return 0;
+ }
+
+ pr_info("options:%s\n", options);
+
+ len = strlen(options) + 1;
+ g_settings = kzalloc(len, GFP_KERNEL);
+ if (!g_settings)
+ return -ENOMEM;
+
+ tmp = g_settings;
+
+ /* Notes:
+ char * strsep(char **s,const char * ct);
+ @s: the string to be searched
+ @ct :the characters to search for
+
+ strsep() updates @options to pointer after the first found token
+ it also returns the pointer ahead the token.
+ */
+ while ((opt = strsep(&options, ":")) != NULL) {
+ /* options that mean for any lynx chips are configured here */
+ if (!strncmp(opt, "noaccel", strlen("noaccel")))
+ g_noaccel = 1;
+#ifdef CONFIG_MTRR
+ else if (!strncmp(opt, "nomtrr", strlen("nomtrr")))
+ g_nomtrr = 1;
+#endif
+ else if (!strncmp(opt, "dual", strlen("dual")))
+ g_dualview = 1;
+ else {
+ strcat(tmp, opt);
+ tmp += strlen(opt);
+ if (options != NULL)
+ *tmp++ = ':';
+ else
+ *tmp++ = 0;
+ }
+ }
+
+ /* misc g_settings are transport to chip specific routines */
+ pr_info("parameter left for chip specific analysis:%s\n", g_settings);
+ return 0;
+}
+
+static struct pci_device_id smi_pci_table[] = {
+ { PCI_DEVICE(0x126f, 0x0750), },
+ {0,}
+};
+
+MODULE_DEVICE_TABLE(pci, smi_pci_table);
+
+static struct pci_driver lynxfb_driver = {
+ .name = "sm750fb",
+ .id_table = smi_pci_table,
+ .probe = lynxfb_pci_probe,
+ .remove = lynxfb_pci_remove,
+#ifdef CONFIG_PM
+ .suspend = lynxfb_suspend,
+ .resume = lynxfb_resume,
+#endif
+};
+
+
+static int __init lynxfb_init(void)
+{
+ char *option;
+ int ret;
+
+#ifdef MODULE
+ option = g_option;
+#else
+ if (fb_get_options("sm750fb", &option))
+ return -ENODEV;
+#endif
+
+ lynxfb_setup(option);
+ ret = pci_register_driver(&lynxfb_driver);
+ return ret;
+}
+module_init(lynxfb_init);
+
+static void __exit lynxfb_exit(void)
+{
+ pci_unregister_driver(&lynxfb_driver);
+}
+module_exit(lynxfb_exit);
+
+module_param(g_option, charp, S_IRUGO);
+
+MODULE_PARM_DESC(g_option,
+ "\n\t\tCommon options:\n"
+ "\t\tnoaccel:disable 2d capabilities\n"
+ "\t\tnomtrr:disable MTRR attribute for video memory\n"
+ "\t\tdualview:dual frame buffer feature enabled\n"
+ "\t\tnohwc:disable hardware cursor\n"
+ "\t\tUsual example:\n"
+ "\t\tinsmod ./sm750fb.ko g_option=\"noaccel,nohwc,1280x1024-8@60\"\n"
+ );
+
+MODULE_AUTHOR("monk liu <monk.liu@siliconmotion.com>");
+MODULE_AUTHOR("Sudip Mukherjee <sudip@vectorindia.org>");
+MODULE_DESCRIPTION("Frame buffer driver for SM750 chipset");
+MODULE_LICENSE("GPL v2");
--- /dev/null
+#ifndef LYNXDRV_H_
+#define LYNXDRV_H_
+
+
+
+#define FB_ACCEL_SMI 0xab
+/* please use revision id to distinguish sm750le and sm750*/
+#define SPC_SM750 0
+
+//#define SPC_SM750LE 8
+
+#define MB(x) ((x)<<20)
+#define MHZ(x) ((x) * 1000000)
+/* align should be 2,4,8,16 */
+#define PADDING(align,data) (((data)+(align)-1)&(~((align) -1)))
+extern int smi_indent;
+
+
+struct lynx_accel{
+ /* base virtual address of DPR registers */
+ volatile unsigned char __iomem * dprBase;
+ /* base virtual address of de data port */
+ volatile unsigned char __iomem * dpPortBase;
+
+ /* function fointers */
+ void (*de_init)(struct lynx_accel *);
+
+ int (*de_wait)(void);/* see if hardware ready to work */
+
+ int (*de_fillrect)(struct lynx_accel *,u32,u32,u32,
+ u32,u32,u32,u32,u32,u32);
+
+ int (*de_copyarea)(struct lynx_accel *,u32,u32,u32,u32,
+ u32,u32,u32,u32,
+ u32,u32,u32,u32);
+
+ int (*de_imageblit)(struct lynx_accel *,const char *,u32,u32,u32,
+ u32,u32,u32,u32,u32,u32,u32,u32,u32);
+
+};
+
+/* lynx_share stands for a presentation of two frame buffer
+ that use one smi adaptor , it is similar to a basic class of C++
+*/
+struct lynx_share{
+ /* common members */
+ u16 devid;
+ u8 revid;
+ struct pci_dev * pdev;
+ struct fb_info * fbinfo[2];
+ struct lynx_accel accel;
+ int accel_off;
+ int dual;
+#ifdef CONFIG_MTRR
+ int mtrr_off;
+ struct{
+ int vram;
+ int vram_added;
+ }mtrr;
+#endif
+ /* all smi graphic adaptor got below attributes */
+ unsigned long vidmem_start;
+ unsigned long vidreg_start;
+ __u32 vidmem_size;
+ __u32 vidreg_size;
+ void __iomem * pvReg;
+ unsigned char __iomem * pvMem;
+ /* locks*/
+ spinlock_t slock;
+ /* function pointers */
+ void (*suspend)(struct lynx_share*);
+ void (*resume)(struct lynx_share*);
+};
+
+struct lynx_cursor{
+ /* cursor width ,height and size */
+ int w;
+ int h;
+ int size;
+ /* hardware limitation */
+ int maxW;
+ int maxH;
+ /* base virtual address and offset of cursor image */
+ char __iomem * vstart;
+ int offset;
+ /* mmio addr of hw cursor */
+ volatile char __iomem * mmio;
+ /* the lynx_share of this adaptor */
+ struct lynx_share * share;
+ /* proc_routines */
+ void (*enable)(struct lynx_cursor *);
+ void (*disable)(struct lynx_cursor *);
+ void (*setSize)(struct lynx_cursor *,int,int);
+ void (*setPos)(struct lynx_cursor *,int,int);
+ void (*setColor)(struct lynx_cursor *,u32,u32);
+ void (*setData)(struct lynx_cursor *,u16,const u8*,const u8*);
+};
+
+struct lynxfb_crtc{
+ unsigned char __iomem * vCursor;//virtual address of cursor
+ unsigned char __iomem * vScreen;//virtual address of on_screen
+ int oCursor;//cursor address offset in vidmem
+ int oScreen;//onscreen address offset in vidmem
+ int channel;/* which channel this crtc stands for*/
+ resource_size_t vidmem_size;/* this view's video memory max size */
+
+ /* below attributes belong to info->fix, their value depends on specific adaptor*/
+ u16 line_pad;/* padding information:0,1,2,4,8,16,... */
+ u16 xpanstep;
+ u16 ypanstep;
+ u16 ywrapstep;
+
+ void * priv;
+
+ int(*proc_setMode)(struct lynxfb_crtc*,
+ struct fb_var_screeninfo*,
+ struct fb_fix_screeninfo*);
+
+ int(*proc_checkMode)(struct lynxfb_crtc*,struct fb_var_screeninfo*);
+ int(*proc_setColReg)(struct lynxfb_crtc*,ushort,ushort,ushort,ushort);
+ void (*clear)(struct lynxfb_crtc*);
+ /* pan display */
+ int (*proc_panDisplay)(struct lynxfb_crtc *,
+ const struct fb_var_screeninfo *,
+ const struct fb_info *);
+ /* cursor information */
+ struct lynx_cursor cursor;
+};
+
+struct lynxfb_output{
+ int dpms;
+ int paths;
+ /* which paths(s) this output stands for,for sm750:
+ paths=1:means output for panel paths
+ paths=2:means output for crt paths
+ paths=3:means output for both panel and crt paths
+ */
+
+ int * channel;
+ /* which channel these outputs linked with,for sm750:
+ *channel=0 means primary channel
+ *channel=1 means secondary channel
+ output->channel ==> &crtc->channel
+ */
+ void * priv;
+
+ int(*proc_setMode)(struct lynxfb_output*,
+ struct fb_var_screeninfo*,
+ struct fb_fix_screeninfo*);
+
+ int(*proc_checkMode)(struct lynxfb_output*,struct fb_var_screeninfo*);
+ int(*proc_setBLANK)(struct lynxfb_output*,int);
+ void (*clear)(struct lynxfb_output*);
+};
+
+struct lynxfb_par{
+ /* either 0 or 1 for dual head adaptor,0 is the older one registered */
+ int index;
+ unsigned int pseudo_palette[256];
+ struct lynxfb_crtc crtc;
+ struct lynxfb_output output;
+ struct fb_info * info;
+ struct lynx_share * share;
+};
+
+#ifndef offsetof
+#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
+#endif
+
+
+#define PS_TO_HZ(ps) \
+ ({ \
+ unsigned long long hz = 1000*1000*1000*1000ULL; \
+ do_div(hz,ps); \
+ (unsigned long)hz;})
+
+static inline unsigned long ps_to_hz(unsigned int psvalue)
+{
+ unsigned long long numerator=1000*1000*1000*1000ULL;
+ /* 10^12 / picosecond period gives frequency in Hz */
+ do_div(numerator, psvalue);
+ return (unsigned long)numerator;
+}
+
+
+#endif
--- /dev/null
+#include<linux/module.h>
+#include<linux/kernel.h>
+#include<linux/errno.h>
+#include<linux/string.h>
+#include<linux/mm.h>
+#include<linux/slab.h>
+#include<linux/delay.h>
+#include<linux/fb.h>
+#include<linux/ioport.h>
+#include<linux/init.h>
+#include<linux/pci.h>
+#include<linux/vmalloc.h>
+#include<linux/pagemap.h>
+#include <linux/console.h>
+#include<linux/platform_device.h>
+#include<linux/screen_info.h>
+
+#include "sm750.h"
+#include "sm750_accel.h"
+#include "sm750_help.h"
+static inline void write_dpr(struct lynx_accel * accel,int offset,u32 regValue)
+{
+ writel(regValue,accel->dprBase + offset);
+}
+
+static inline u32 read_dpr(struct lynx_accel * accel,int offset)
+{
+ return readl(accel->dprBase + offset);
+}
+
+static inline void write_dpPort(struct lynx_accel * accel,u32 data)
+{
+ writel(data,accel->dpPortBase);
+}
+
+void hw_de_init(struct lynx_accel * accel)
+{
+ /* setup 2d engine registers */
+ u32 reg,clr;
+
+ write_dpr(accel,DE_MASKS,0xFFFFFFFF);
+
+ /* dpr1c */
+ reg = FIELD_SET(0,DE_STRETCH_FORMAT,PATTERN_XY,NORMAL)|
+ FIELD_VALUE(0,DE_STRETCH_FORMAT,PATTERN_Y,0)|
+ FIELD_VALUE(0,DE_STRETCH_FORMAT,PATTERN_X,0)|
+ FIELD_SET(0,DE_STRETCH_FORMAT,ADDRESSING,XY)|
+ FIELD_VALUE(0,DE_STRETCH_FORMAT,SOURCE_HEIGHT,3);
+
+ clr = FIELD_CLEAR(DE_STRETCH_FORMAT,PATTERN_XY)&
+ FIELD_CLEAR(DE_STRETCH_FORMAT,PATTERN_Y)&
+ FIELD_CLEAR(DE_STRETCH_FORMAT,PATTERN_X)&
+ FIELD_CLEAR(DE_STRETCH_FORMAT,ADDRESSING)&
+ FIELD_CLEAR(DE_STRETCH_FORMAT,SOURCE_HEIGHT);
+
+ /* DE_STRETCH bpp format need be initilized in setMode routine */
+ write_dpr(accel,DE_STRETCH_FORMAT,(read_dpr(accel,DE_STRETCH_FORMAT) & clr) | reg);
+
+ /* disable clipping and transparent */
+ write_dpr(accel,DE_CLIP_TL,0);//dpr2c
+ write_dpr(accel,DE_CLIP_BR,0);//dpr30
+
+ write_dpr(accel,DE_COLOR_COMPARE_MASK,0);//dpr24
+ write_dpr(accel,DE_COLOR_COMPARE,0);
+
+ reg = FIELD_SET(0,DE_CONTROL,TRANSPARENCY,DISABLE)|
+ FIELD_SET(0,DE_CONTROL,TRANSPARENCY_MATCH,OPAQUE)|
+ FIELD_SET(0,DE_CONTROL,TRANSPARENCY_SELECT,SOURCE);
+
+ clr = FIELD_CLEAR(DE_CONTROL,TRANSPARENCY)&
+ FIELD_CLEAR(DE_CONTROL,TRANSPARENCY_MATCH)&
+ FIELD_CLEAR(DE_CONTROL,TRANSPARENCY_SELECT);
+
+ /* dpr0c */
+ write_dpr(accel,DE_CONTROL,(read_dpr(accel,DE_CONTROL)&clr)|reg);
+}
+
+/* set2dformat only be called from setmode functions
+ * but if you need dual framebuffer driver,need call set2dformat
+ * every time you use 2d function */
+
+void hw_set2dformat(struct lynx_accel * accel,int fmt)
+{
+ u32 reg;
+
+ /* fmt=0,1,2 for 8,16,32,bpp on sm718/750/502 */
+ reg = read_dpr(accel,DE_STRETCH_FORMAT);
+ reg = FIELD_VALUE(reg,DE_STRETCH_FORMAT,PIXEL_FORMAT,fmt);
+ write_dpr(accel,DE_STRETCH_FORMAT,reg);
+}
+
+int hw_fillrect(struct lynx_accel * accel,
+ u32 base,u32 pitch,u32 Bpp,
+ u32 x,u32 y,u32 width,u32 height,
+ u32 color,u32 rop)
+{
+ u32 deCtrl;
+
+ if(accel->de_wait() != 0)
+ {
+ /* int time wait and always busy,seems hardware
+ * got something error */
+ pr_debug("%s:De engine always bussy\n",__func__);
+ return -1;
+ }
+
+ write_dpr(accel,DE_WINDOW_DESTINATION_BASE,base);//dpr40
+ write_dpr(accel,DE_PITCH,
+ FIELD_VALUE(0,DE_PITCH,DESTINATION,pitch/Bpp)|
+ FIELD_VALUE(0,DE_PITCH,SOURCE,pitch/Bpp));//dpr10
+
+ write_dpr(accel,DE_WINDOW_WIDTH,
+ FIELD_VALUE(0,DE_WINDOW_WIDTH,DESTINATION,pitch/Bpp)|
+ FIELD_VALUE(0,DE_WINDOW_WIDTH,SOURCE,pitch/Bpp));//dpr44
+
+ write_dpr(accel,DE_FOREGROUND,color);//DPR14
+
+ write_dpr(accel,DE_DESTINATION,
+ FIELD_SET(0,DE_DESTINATION,WRAP,DISABLE)|
+ FIELD_VALUE(0,DE_DESTINATION,X,x)|
+ FIELD_VALUE(0,DE_DESTINATION,Y,y));//dpr4
+
+ write_dpr(accel,DE_DIMENSION,
+ FIELD_VALUE(0,DE_DIMENSION,X,width)|
+ FIELD_VALUE(0,DE_DIMENSION,Y_ET,height));//dpr8
+
+ deCtrl =
+ FIELD_SET(0,DE_CONTROL,STATUS,START)|
+ FIELD_SET(0,DE_CONTROL,DIRECTION,LEFT_TO_RIGHT)|
+ FIELD_SET(0,DE_CONTROL,LAST_PIXEL,ON)|
+ FIELD_SET(0,DE_CONTROL,COMMAND,RECTANGLE_FILL)|
+ FIELD_SET(0,DE_CONTROL,ROP_SELECT,ROP2)|
+ FIELD_VALUE(0,DE_CONTROL,ROP,rop);//dpr0xc
+
+ write_dpr(accel,DE_CONTROL,deCtrl);
+ return 0;
+}
+
+int hw_copyarea(
+struct lynx_accel * accel,
+unsigned int sBase, /* Address of source: offset in frame buffer */
+unsigned int sPitch, /* Pitch value of source surface in BYTE */
+unsigned int sx,
+unsigned int sy, /* Starting coordinate of source surface */
+unsigned int dBase, /* Address of destination: offset in frame buffer */
+unsigned int dPitch, /* Pitch value of destination surface in BYTE */
+unsigned int Bpp, /* Color depth of destination surface */
+unsigned int dx,
+unsigned int dy, /* Starting coordinate of destination surface */
+unsigned int width,
+unsigned int height, /* width and height of rectangle in pixel value */
+unsigned int rop2) /* ROP value */
+{
+ unsigned int nDirection, de_ctrl;
+ int opSign;
+ nDirection = LEFT_TO_RIGHT;
+ /* Direction of ROP2 operation: 1 = Left to Right, (-1) = Right to Left */
+ opSign = 1;
+ de_ctrl = 0;
+
+ /* If source and destination are the same surface, need to check for overlay cases */
+ if (sBase == dBase && sPitch == dPitch)
+ {
+ /* Determine direction of operation */
+ if (sy < dy)
+ {
+ /* +----------+
+ |S |
+ | +----------+
+ | | | |
+ | | | |
+ +---|------+ |
+ | D|
+ +----------+ */
+
+ nDirection = BOTTOM_TO_TOP;
+ }
+ else if (sy > dy)
+ {
+ /* +----------+
+ |D |
+ | +----------+
+ | | | |
+ | | | |
+ +---|------+ |
+ | S|
+ +----------+ */
+
+ nDirection = TOP_TO_BOTTOM;
+ }
+ else
+ {
+ /* sy == dy */
+
+ if (sx <= dx)
+ {
+ /* +------+---+------+
+ |S | | D|
+ | | | |
+ | | | |
+ | | | |
+ +------+---+------+ */
+
+ nDirection = RIGHT_TO_LEFT;
+ }
+ else
+ {
+ /* sx > dx */
+
+ /* +------+---+------+
+ |D | | S|
+ | | | |
+ | | | |
+ | | | |
+ +------+---+------+ */
+
+ nDirection = LEFT_TO_RIGHT;
+ }
+ }
+ }
+
+ if ((nDirection == BOTTOM_TO_TOP) || (nDirection == RIGHT_TO_LEFT))
+ {
+ sx += width - 1;
+ sy += height - 1;
+ dx += width - 1;
+ dy += height - 1;
+ opSign = (-1);
+ }
+
+ /* Note:
+ DE_FOREGROUND are DE_BACKGROUND are don't care.
+ DE_COLOR_COMPARE and DE_COLOR_COMPARE_MAKS are set by set deSetTransparency().
+ */
+
+ /* 2D Source Base.
+ It is an address offset (128 bit aligned) from the beginning of frame buffer.
+ */
+ write_dpr(accel,DE_WINDOW_SOURCE_BASE, sBase);//dpr40
+
+ /* 2D Destination Base.
+ It is an address offset (128 bit aligned) from the beginning of frame buffer.
+ */
+ write_dpr(accel,DE_WINDOW_DESTINATION_BASE, dBase);//dpr44
+
+#if 0
+ /* Program pitch (distance between the 1st points of two adjacent lines).
+ Note that input pitch is BYTE value, but the 2D Pitch register uses
+ pixel values. Need Byte to pixel convertion.
+ */
+ if(Bpp == 3){
+ sx *= 3;
+ dx *= 3;
+ width *= 3;
+ write_dpr(accel,DE_PITCH,
+ FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch) |
+ FIELD_VALUE(0, DE_PITCH, SOURCE, sPitch));//dpr10
+ }
+ else
+#endif
+ {
+ write_dpr(accel,DE_PITCH,
+ FIELD_VALUE(0, DE_PITCH, DESTINATION, (dPitch/Bpp)) |
+ FIELD_VALUE(0, DE_PITCH, SOURCE, (sPitch/Bpp)));//dpr10
+ }
+
+ /* Screen Window width in Pixels.
+ 2D engine uses this value to calculate the linear address in frame buffer for a given point.
+ */
+ write_dpr(accel,DE_WINDOW_WIDTH,
+ FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, (dPitch/Bpp)) |
+ FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE, (sPitch/Bpp)));//dpr3c
+
+ if (accel->de_wait() != 0){
+ return -1;
+ }
+
+ {
+
+ write_dpr(accel,DE_SOURCE,
+ FIELD_SET (0, DE_SOURCE, WRAP, DISABLE) |
+ FIELD_VALUE(0, DE_SOURCE, X_K1, sx) |
+ FIELD_VALUE(0, DE_SOURCE, Y_K2, sy));//dpr0
+ write_dpr(accel,DE_DESTINATION,
+ FIELD_SET (0, DE_DESTINATION, WRAP, DISABLE) |
+ FIELD_VALUE(0, DE_DESTINATION, X, dx) |
+ FIELD_VALUE(0, DE_DESTINATION, Y, dy));//dpr04
+ write_dpr(accel,DE_DIMENSION,
+ FIELD_VALUE(0, DE_DIMENSION, X, width) |
+ FIELD_VALUE(0, DE_DIMENSION, Y_ET, height));//dpr08
+
+ de_ctrl =
+ FIELD_VALUE(0, DE_CONTROL, ROP, rop2) |
+ FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
+ FIELD_SET(0, DE_CONTROL, COMMAND, BITBLT) |
+ ((nDirection == RIGHT_TO_LEFT) ?
+ FIELD_SET(0, DE_CONTROL, DIRECTION, RIGHT_TO_LEFT)
+ : FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT)) |
+ FIELD_SET(0, DE_CONTROL, STATUS, START);
+ write_dpr(accel,DE_CONTROL,de_ctrl);//dpr0c
+ }
+
+ return 0;
+}
+
+static unsigned int deGetTransparency(struct lynx_accel * accel)
+{
+ unsigned int de_ctrl;
+
+ de_ctrl = read_dpr(accel,DE_CONTROL);
+
+ de_ctrl &=
+ FIELD_MASK(DE_CONTROL_TRANSPARENCY_MATCH) |
+ FIELD_MASK(DE_CONTROL_TRANSPARENCY_SELECT)|
+ FIELD_MASK(DE_CONTROL_TRANSPARENCY);
+
+ return de_ctrl;
+}
+
+int hw_imageblit(struct lynx_accel *accel,
+ const char *pSrcbuf, /* pointer to start of source buffer in system memory */
+ u32 srcDelta, /* Pitch value (in bytes) of the source buffer, +ive means top down and -ive mean button up */
+ u32 startBit, /* Mono data can start at any bit in a byte, this value should be 0 to 7 */
+ u32 dBase, /* Address of destination: offset in frame buffer */
+ u32 dPitch, /* Pitch value of destination surface in BYTE */
+ u32 bytePerPixel, /* Color depth of destination surface */
+ u32 dx,
+ u32 dy, /* Starting coordinate of destination surface */
+ u32 width,
+ u32 height, /* width and height of rectange in pixel value */
+ u32 fColor, /* Foreground color (corresponding to a 1 in the monochrome data */
+ u32 bColor, /* Background color (corresponding to a 0 in the monochrome data */
+ u32 rop2) /* ROP value */
+{
+ unsigned int ulBytesPerScan;
+ unsigned int ul4BytesPerScan;
+ unsigned int ulBytesRemain;
+ unsigned int de_ctrl = 0;
+ unsigned char ajRemain[4];
+ int i, j;
+
+ startBit &= 7; /* Just make sure the start bit is within legal range */
+ ulBytesPerScan = (width + startBit + 7) / 8;
+ ul4BytesPerScan = ulBytesPerScan & ~3;
+ ulBytesRemain = ulBytesPerScan & 3;
+
+ if(accel->de_wait() != 0)
+ {
+// inf_msg("*** ImageBlit return -1 ***\n");
+ return -1;
+ }
+
+ /* 2D Source Base.
+ Use 0 for HOST Blt.
+ */
+ write_dpr(accel,DE_WINDOW_SOURCE_BASE, 0);
+
+ /* 2D Destination Base.
+ It is an address offset (128 bit aligned) from the beginning of frame buffer.
+ */
+ write_dpr(accel,DE_WINDOW_DESTINATION_BASE, dBase);
+#if 0
+ /* Program pitch (distance between the 1st points of two adjacent lines).
+ Note that input pitch is BYTE value, but the 2D Pitch register uses
+ pixel values. Need Byte to pixel convertion.
+ */
+ if(bytePerPixel == 3 ){
+ dx *= 3;
+ width *= 3;
+ startBit *= 3;
+ write_dpr(accel,DE_PITCH,
+ FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch) |
+ FIELD_VALUE(0, DE_PITCH, SOURCE, dPitch));//dpr10
+
+ }
+ else
+#endif
+ {
+ write_dpr(accel,DE_PITCH,
+ FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch/bytePerPixel) |
+ FIELD_VALUE(0, DE_PITCH, SOURCE, dPitch/bytePerPixel));//dpr10
+ }
+
+ /* Screen Window width in Pixels.
+ 2D engine uses this value to calculate the linear address in frame buffer for a given point.
+ */
+ write_dpr(accel,DE_WINDOW_WIDTH,
+ FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, (dPitch/bytePerPixel)) |
+ FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE, (dPitch/bytePerPixel)));
+
+ /* Note: For 2D Source in Host Write, only X_K1_MONO field is needed, and Y_K2 field is not used.
+ For mono bitmap, use startBit for X_K1. */
+ write_dpr(accel,DE_SOURCE,
+ FIELD_SET (0, DE_SOURCE, WRAP, DISABLE) |
+ FIELD_VALUE(0, DE_SOURCE, X_K1_MONO, startBit));//dpr00
+
+ write_dpr(accel,DE_DESTINATION,
+ FIELD_SET (0, DE_DESTINATION, WRAP, DISABLE) |
+ FIELD_VALUE(0, DE_DESTINATION, X, dx) |
+ FIELD_VALUE(0, DE_DESTINATION, Y, dy));//dpr04
+
+ write_dpr(accel,DE_DIMENSION,
+ FIELD_VALUE(0, DE_DIMENSION, X, width) |
+ FIELD_VALUE(0, DE_DIMENSION, Y_ET, height));//dpr08
+
+ write_dpr(accel,DE_FOREGROUND, fColor);
+ write_dpr(accel,DE_BACKGROUND, bColor);
+
+ de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, rop2) |
+ FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
+ FIELD_SET(0, DE_CONTROL, COMMAND, HOST_WRITE) |
+ FIELD_SET(0, DE_CONTROL, HOST, MONO) |
+ FIELD_SET(0, DE_CONTROL, STATUS, START);
+
+ write_dpr(accel,DE_CONTROL, de_ctrl | deGetTransparency(accel));
+
+ /* Write MONO data (line by line) to 2D Engine data port */
+ for (i=0; i<height; i++)
+ {
+ /* For each line, send the data in chunks of 4 bytes */
+ for (j=0; j<(ul4BytesPerScan/4); j++)
+ {
+ write_dpPort(accel, *(unsigned int *)(pSrcbuf + (j * 4)));
+ }
+
+ if (ulBytesRemain)
+ {
+ memcpy(ajRemain, pSrcbuf+ul4BytesPerScan, ulBytesRemain);
+ write_dpPort(accel, *(unsigned int *)ajRemain);
+ }
+
+ pSrcbuf += srcDelta;
+ }
+
+ return 0;
+}
+
--- /dev/null
+#ifndef ACCEL_H__
+#define ACCEL_H__
+
+#define HW_ROP2_COPY 0xc
+#define HW_ROP2_XOR 0x6
+
+/* notes: below address are the offset value from de_base_address (0x100000)*/
+
+/* for sm718/750/502 de_base is at mmreg_1mb*/
+#define DE_BASE_ADDR_TYPE1 0x100000
+/* for sm712,de_base is at mmreg_32kb */
+#define DE_BASE_ADDR_TYPE2 0x8000
+/* for sm722,de_base is at mmreg_0 */
+#define DE_BASE_ADDR_TYPE3 0
+
+/* type1 data port address is at mmreg_0x110000*/
+#define DE_PORT_ADDR_TYPE1 0x110000
+/* for sm712,data port address is at mmreg_0 */
+#define DE_PORT_ADDR_TYPE2 0x100000
+/* for sm722,data port address is at mmreg_1mb */
+#define DE_PORT_ADDR_TYPE3 0x100000
+
+#define DE_SOURCE 0x0
+#define DE_SOURCE_WRAP 31:31
+#define DE_SOURCE_WRAP_DISABLE 0
+#define DE_SOURCE_WRAP_ENABLE 1
+#define DE_SOURCE_X_K1 29:16
+#define DE_SOURCE_Y_K2 15:0
+#define DE_SOURCE_X_K1_MONO 20:16
+
+#define DE_DESTINATION 0x4
+#define DE_DESTINATION_WRAP 31:31
+#define DE_DESTINATION_WRAP_DISABLE 0
+#define DE_DESTINATION_WRAP_ENABLE 1
+#define DE_DESTINATION_X 28:16
+#define DE_DESTINATION_Y 15:0
+
+#define DE_DIMENSION 0x8
+#define DE_DIMENSION_X 28:16
+#define DE_DIMENSION_Y_ET 15:0
+
+#define DE_CONTROL 0xC
+#define DE_CONTROL_STATUS 31:31
+#define DE_CONTROL_STATUS_STOP 0
+#define DE_CONTROL_STATUS_START 1
+#define DE_CONTROL_PATTERN 30:30
+#define DE_CONTROL_PATTERN_MONO 0
+#define DE_CONTROL_PATTERN_COLOR 1
+#define DE_CONTROL_UPDATE_DESTINATION_X 29:29
+#define DE_CONTROL_UPDATE_DESTINATION_X_DISABLE 0
+#define DE_CONTROL_UPDATE_DESTINATION_X_ENABLE 1
+#define DE_CONTROL_QUICK_START 28:28
+#define DE_CONTROL_QUICK_START_DISABLE 0
+#define DE_CONTROL_QUICK_START_ENABLE 1
+#define DE_CONTROL_DIRECTION 27:27
+#define DE_CONTROL_DIRECTION_LEFT_TO_RIGHT 0
+#define DE_CONTROL_DIRECTION_RIGHT_TO_LEFT 1
+#define DE_CONTROL_MAJOR 26:26
+#define DE_CONTROL_MAJOR_X 0
+#define DE_CONTROL_MAJOR_Y 1
+#define DE_CONTROL_STEP_X 25:25
+#define DE_CONTROL_STEP_X_POSITIVE 1
+#define DE_CONTROL_STEP_X_NEGATIVE 0
+#define DE_CONTROL_STEP_Y 24:24
+#define DE_CONTROL_STEP_Y_POSITIVE 1
+#define DE_CONTROL_STEP_Y_NEGATIVE 0
+#define DE_CONTROL_STRETCH 23:23
+#define DE_CONTROL_STRETCH_DISABLE 0
+#define DE_CONTROL_STRETCH_ENABLE 1
+#define DE_CONTROL_HOST 22:22
+#define DE_CONTROL_HOST_COLOR 0
+#define DE_CONTROL_HOST_MONO 1
+#define DE_CONTROL_LAST_PIXEL 21:21
+#define DE_CONTROL_LAST_PIXEL_OFF 0
+#define DE_CONTROL_LAST_PIXEL_ON 1
+#define DE_CONTROL_COMMAND 20:16
+#define DE_CONTROL_COMMAND_BITBLT 0
+#define DE_CONTROL_COMMAND_RECTANGLE_FILL 1
+#define DE_CONTROL_COMMAND_DE_TILE 2
+#define DE_CONTROL_COMMAND_TRAPEZOID_FILL 3
+#define DE_CONTROL_COMMAND_ALPHA_BLEND 4
+#define DE_CONTROL_COMMAND_RLE_STRIP 5
+#define DE_CONTROL_COMMAND_SHORT_STROKE 6
+#define DE_CONTROL_COMMAND_LINE_DRAW 7
+#define DE_CONTROL_COMMAND_HOST_WRITE 8
+#define DE_CONTROL_COMMAND_HOST_READ 9
+#define DE_CONTROL_COMMAND_HOST_WRITE_BOTTOM_UP 10
+#define DE_CONTROL_COMMAND_ROTATE 11
+#define DE_CONTROL_COMMAND_FONT 12
+#define DE_CONTROL_COMMAND_TEXTURE_LOAD 15
+#define DE_CONTROL_ROP_SELECT 15:15
+#define DE_CONTROL_ROP_SELECT_ROP3 0
+#define DE_CONTROL_ROP_SELECT_ROP2 1
+#define DE_CONTROL_ROP2_SOURCE 14:14
+#define DE_CONTROL_ROP2_SOURCE_BITMAP 0
+#define DE_CONTROL_ROP2_SOURCE_PATTERN 1
+#define DE_CONTROL_MONO_DATA 13:12
+#define DE_CONTROL_MONO_DATA_NOT_PACKED 0
+#define DE_CONTROL_MONO_DATA_8_PACKED 1
+#define DE_CONTROL_MONO_DATA_16_PACKED 2
+#define DE_CONTROL_MONO_DATA_32_PACKED 3
+#define DE_CONTROL_REPEAT_ROTATE 11:11
+#define DE_CONTROL_REPEAT_ROTATE_DISABLE 0
+#define DE_CONTROL_REPEAT_ROTATE_ENABLE 1
+#define DE_CONTROL_TRANSPARENCY_MATCH 10:10
+#define DE_CONTROL_TRANSPARENCY_MATCH_OPAQUE 0
+#define DE_CONTROL_TRANSPARENCY_MATCH_TRANSPARENT 1
+#define DE_CONTROL_TRANSPARENCY_SELECT 9:9
+#define DE_CONTROL_TRANSPARENCY_SELECT_SOURCE 0
+#define DE_CONTROL_TRANSPARENCY_SELECT_DESTINATION 1
+#define DE_CONTROL_TRANSPARENCY 8:8
+#define DE_CONTROL_TRANSPARENCY_DISABLE 0
+#define DE_CONTROL_TRANSPARENCY_ENABLE 1
+#define DE_CONTROL_ROP 7:0
+
+// Pseudo fields.
+
+#define DE_CONTROL_SHORT_STROKE_DIR 27:24
+#define DE_CONTROL_SHORT_STROKE_DIR_225 0
+#define DE_CONTROL_SHORT_STROKE_DIR_135 1
+#define DE_CONTROL_SHORT_STROKE_DIR_315 2
+#define DE_CONTROL_SHORT_STROKE_DIR_45 3
+#define DE_CONTROL_SHORT_STROKE_DIR_270 4
+#define DE_CONTROL_SHORT_STROKE_DIR_90 5
+#define DE_CONTROL_SHORT_STROKE_DIR_180 8
+#define DE_CONTROL_SHORT_STROKE_DIR_0 10
+#define DE_CONTROL_ROTATION 25:24
+#define DE_CONTROL_ROTATION_0 0
+#define DE_CONTROL_ROTATION_270 1
+#define DE_CONTROL_ROTATION_90 2
+#define DE_CONTROL_ROTATION_180 3
+
+#define DE_PITCH 0x000010
+#define DE_PITCH_DESTINATION 28:16
+#define DE_PITCH_SOURCE 12:0
+
+#define DE_FOREGROUND 0x000014
+#define DE_FOREGROUND_COLOR 31:0
+
+#define DE_BACKGROUND 0x000018
+#define DE_BACKGROUND_COLOR 31:0
+
+#define DE_STRETCH_FORMAT 0x00001C
+#define DE_STRETCH_FORMAT_PATTERN_XY 30:30
+#define DE_STRETCH_FORMAT_PATTERN_XY_NORMAL 0
+#define DE_STRETCH_FORMAT_PATTERN_XY_OVERWRITE 1
+#define DE_STRETCH_FORMAT_PATTERN_Y 29:27
+#define DE_STRETCH_FORMAT_PATTERN_X 25:23
+#define DE_STRETCH_FORMAT_PIXEL_FORMAT 21:20
+#define DE_STRETCH_FORMAT_PIXEL_FORMAT_8 0
+#define DE_STRETCH_FORMAT_PIXEL_FORMAT_16 1
+#define DE_STRETCH_FORMAT_PIXEL_FORMAT_32 2
+#define DE_STRETCH_FORMAT_PIXEL_FORMAT_24 3
+
+#define DE_STRETCH_FORMAT_ADDRESSING 19:16
+#define DE_STRETCH_FORMAT_ADDRESSING_XY 0
+#define DE_STRETCH_FORMAT_ADDRESSING_LINEAR 15
+#define DE_STRETCH_FORMAT_SOURCE_HEIGHT 11:0
+
+#define DE_COLOR_COMPARE 0x000020
+#define DE_COLOR_COMPARE_COLOR 23:0
+
+#define DE_COLOR_COMPARE_MASK 0x000024
+#define DE_COLOR_COMPARE_MASK_MASKS 23:0
+
+#define DE_MASKS 0x000028
+#define DE_MASKS_BYTE_MASK 31:16
+#define DE_MASKS_BIT_MASK 15:0
+
+#define DE_CLIP_TL 0x00002C
+#define DE_CLIP_TL_TOP 31:16
+#define DE_CLIP_TL_STATUS 13:13
+#define DE_CLIP_TL_STATUS_DISABLE 0
+#define DE_CLIP_TL_STATUS_ENABLE 1
+#define DE_CLIP_TL_INHIBIT 12:12
+#define DE_CLIP_TL_INHIBIT_OUTSIDE 0
+#define DE_CLIP_TL_INHIBIT_INSIDE 1
+#define DE_CLIP_TL_LEFT 11:0
+
+#define DE_CLIP_BR 0x000030
+#define DE_CLIP_BR_BOTTOM 31:16
+#define DE_CLIP_BR_RIGHT 12:0
+
+#define DE_MONO_PATTERN_LOW 0x000034
+#define DE_MONO_PATTERN_LOW_PATTERN 31:0
+
+#define DE_MONO_PATTERN_HIGH 0x000038
+#define DE_MONO_PATTERN_HIGH_PATTERN 31:0
+
+#define DE_WINDOW_WIDTH 0x00003C
+#define DE_WINDOW_WIDTH_DESTINATION 28:16
+#define DE_WINDOW_WIDTH_SOURCE 12:0
+
+#define DE_WINDOW_SOURCE_BASE 0x000040
+#define DE_WINDOW_SOURCE_BASE_EXT 27:27
+#define DE_WINDOW_SOURCE_BASE_EXT_LOCAL 0
+#define DE_WINDOW_SOURCE_BASE_EXT_EXTERNAL 1
+#define DE_WINDOW_SOURCE_BASE_CS 26:26
+#define DE_WINDOW_SOURCE_BASE_CS_0 0
+#define DE_WINDOW_SOURCE_BASE_CS_1 1
+#define DE_WINDOW_SOURCE_BASE_ADDRESS 25:0
+
+#define DE_WINDOW_DESTINATION_BASE 0x000044
+#define DE_WINDOW_DESTINATION_BASE_EXT 27:27
+#define DE_WINDOW_DESTINATION_BASE_EXT_LOCAL 0
+#define DE_WINDOW_DESTINATION_BASE_EXT_EXTERNAL 1
+#define DE_WINDOW_DESTINATION_BASE_CS 26:26
+#define DE_WINDOW_DESTINATION_BASE_CS_0 0
+#define DE_WINDOW_DESTINATION_BASE_CS_1 1
+#define DE_WINDOW_DESTINATION_BASE_ADDRESS 25:0
+
+#define DE_ALPHA 0x000048
+#define DE_ALPHA_VALUE 7:0
+
+#define DE_WRAP 0x00004C
+#define DE_WRAP_X 31:16
+#define DE_WRAP_Y 15:0
+
+#define DE_STATUS 0x000050
+#define DE_STATUS_CSC 1:1
+#define DE_STATUS_CSC_CLEAR 0
+#define DE_STATUS_CSC_NOT_ACTIVE 0
+#define DE_STATUS_CSC_ACTIVE 1
+#define DE_STATUS_2D 0:0
+#define DE_STATUS_2D_CLEAR 0
+#define DE_STATUS_2D_NOT_ACTIVE 0
+#define DE_STATUS_2D_ACTIVE 1
+
+
+
+/* blt direction */
+#define TOP_TO_BOTTOM 0
+#define LEFT_TO_RIGHT 0
+#define BOTTOM_TO_TOP 1
+#define RIGHT_TO_LEFT 1
+
+void hw_set2dformat(struct lynx_accel * accel,int fmt);
+
+void hw_de_init(struct lynx_accel * accel);
+
+int hw_fillrect(struct lynx_accel * accel,
+ u32 base,u32 pitch,u32 Bpp,
+ u32 x,u32 y,u32 width,u32 height,
+ u32 color,u32 rop);
+
+int hw_copyarea(
+struct lynx_accel * accel,
+unsigned int sBase, /* Address of source: offset in frame buffer */
+unsigned int sPitch, /* Pitch value of source surface in BYTE */
+unsigned int sx,
+unsigned int sy, /* Starting coordinate of source surface */
+unsigned int dBase, /* Address of destination: offset in frame buffer */
+unsigned int dPitch, /* Pitch value of destination surface in BYTE */
+unsigned int bpp, /* Color depth of destination surface */
+unsigned int dx,
+unsigned int dy, /* Starting coordinate of destination surface */
+unsigned int width,
+unsigned int height, /* width and height of rectangle in pixel value */
+unsigned int rop2);
+
+int hw_imageblit(struct lynx_accel *accel,
+ const char *pSrcbuf, /* pointer to start of source buffer in system memory */
+ u32 srcDelta, /* Pitch value (in bytes) of the source buffer, +ive means top down and -ive mean button up */
+ u32 startBit, /* Mono data can start at any bit in a byte, this value should be 0 to 7 */
+ u32 dBase, /* Address of destination: offset in frame buffer */
+ u32 dPitch, /* Pitch value of destination surface in BYTE */
+ u32 bytePerPixel, /* Color depth of destination surface */
+ u32 dx,
+ u32 dy, /* Starting coordinate of destination surface */
+ u32 width,
+ u32 height, /* width and height of rectange in pixel value */
+ u32 fColor, /* Foreground color (corresponding to a 1 in the monochrome data */
+ u32 bColor, /* Background color (corresponding to a 0 in the monochrome data */
+ u32 rop2);
+#endif
--- /dev/null
+#include<linux/module.h>
+#include<linux/kernel.h>
+#include<linux/errno.h>
+#include<linux/string.h>
+#include<linux/mm.h>
+#include<linux/slab.h>
+#include<linux/delay.h>
+#include<linux/fb.h>
+#include<linux/ioport.h>
+#include<linux/init.h>
+#include<linux/pci.h>
+#include<linux/vmalloc.h>
+#include<linux/pagemap.h>
+#include <linux/console.h>
+#include<linux/platform_device.h>
+#include<linux/screen_info.h>
+
+#include "sm750.h"
+#include "sm750_help.h"
+#include "sm750_cursor.h"
+
+
+#define PEEK32(addr) \
+readl(cursor->mmio + (addr))
+
+#define POKE32(addr,data) \
+writel((data),cursor->mmio + (addr))
+
+/* cursor control for voyager and 718/750*/
+#define HWC_ADDRESS 0x0
+#define HWC_ADDRESS_ENABLE 31:31
+#define HWC_ADDRESS_ENABLE_DISABLE 0
+#define HWC_ADDRESS_ENABLE_ENABLE 1
+#define HWC_ADDRESS_EXT 27:27
+#define HWC_ADDRESS_EXT_LOCAL 0
+#define HWC_ADDRESS_EXT_EXTERNAL 1
+#define HWC_ADDRESS_CS 26:26
+#define HWC_ADDRESS_CS_0 0
+#define HWC_ADDRESS_CS_1 1
+#define HWC_ADDRESS_ADDRESS 25:0
+
+#define HWC_LOCATION 0x4
+#define HWC_LOCATION_TOP 27:27
+#define HWC_LOCATION_TOP_INSIDE 0
+#define HWC_LOCATION_TOP_OUTSIDE 1
+#define HWC_LOCATION_Y 26:16
+#define HWC_LOCATION_LEFT 11:11
+#define HWC_LOCATION_LEFT_INSIDE 0
+#define HWC_LOCATION_LEFT_OUTSIDE 1
+#define HWC_LOCATION_X 10:0
+
+#define HWC_COLOR_12 0x8
+#define HWC_COLOR_12_2_RGB565 31:16
+#define HWC_COLOR_12_1_RGB565 15:0
+
+#define HWC_COLOR_3 0xC
+#define HWC_COLOR_3_RGB565 15:0
+
+
+/* hw_cursor_xxx works for voyager,718 and 750 */
+void hw_cursor_enable(struct lynx_cursor * cursor)
+{
+ u32 reg;
+ reg = FIELD_VALUE(0,HWC_ADDRESS,ADDRESS,cursor->offset)|
+ FIELD_SET(0,HWC_ADDRESS,EXT,LOCAL)|
+ FIELD_SET(0,HWC_ADDRESS,ENABLE,ENABLE);
+ POKE32(HWC_ADDRESS,reg);
+}
+void hw_cursor_disable(struct lynx_cursor * cursor)
+{
+ POKE32(HWC_ADDRESS,0);
+}
+
+void hw_cursor_setSize(struct lynx_cursor * cursor,
+ int w,int h)
+{
+ cursor->w = w;
+ cursor->h = h;
+}
+void hw_cursor_setPos(struct lynx_cursor * cursor,
+ int x,int y)
+{
+ u32 reg;
+ reg = FIELD_VALUE(0,HWC_LOCATION,Y,y)|
+ FIELD_VALUE(0,HWC_LOCATION,X,x);
+ POKE32(HWC_LOCATION,reg);
+}
+void hw_cursor_setColor(struct lynx_cursor * cursor,
+ u32 fg,u32 bg)
+{
+ POKE32(HWC_COLOR_12,(fg<<16)|(bg&0xffff));
+ POKE32(HWC_COLOR_3,0xffe0);
+}
+
+void hw_cursor_setData(struct lynx_cursor * cursor,
+ u16 rop,const u8* pcol,const u8* pmsk)
+{
+ int i,j,count,pitch,offset;
+ u8 color,mask,opr;
+ u16 data;
+ void __iomem *pbuffer, *pstart;
+
+ /* in byte*/
+ pitch = cursor->w >> 3;
+
+ /* in byte */
+ count = pitch * cursor->h;
+
+ /* in byte */
+ offset = cursor->maxW * 2 / 8;
+
+ data = 0;
+ pstart = cursor->vstart;
+ pbuffer = pstart;
+
+/*
+ if(odd &1){
+ hw_cursor_setData2(cursor,rop,pcol,pmsk);
+ }
+ odd++;
+ if(odd > 0xfffffff0)
+ odd=0;
+*/
+
+ for(i=0;i<count;i++)
+ {
+ color = *pcol++;
+ mask = *pmsk++;
+ data = 0;
+
+ /* either method below works well,
+ * but method 2 shows no lag
+ * and method 1 seems a bit wrong*/
+#if 0
+ if(rop == ROP_XOR)
+ opr = mask ^ color;
+ else
+ opr = mask & color;
+
+ for(j=0;j<8;j++)
+ {
+
+ if(opr & (0x80 >> j))
+ { //use fg color,id = 2
+ data |= 2 << (j*2);
+ }else{
+ //use bg color,id = 1
+ data |= 1 << (j*2);
+ }
+ }
+#else
+ for(j=0;j<8;j++){
+ if(mask & (0x80>>j)){
+ if(rop == ROP_XOR)
+ opr = mask ^ color;
+ else
+ opr = mask & color;
+
+ /* 2 stands for forecolor and 1 for backcolor */
+ data |= ((opr & (0x80>>j))?2:1)<<(j*2);
+ }
+ }
+#endif
+ iowrite16(data, pbuffer);
+
+ /* assume pitch is 1,2,4,8,...*/
+#if 0
+ if(!((i+1)&(pitch-1))) /* below line equal to is line */
+#else
+ if((i+1) % pitch == 0)
+#endif
+ {
+ /* need a return */
+ pstart += offset;
+ pbuffer = pstart;
+ }else{
+ pbuffer += sizeof(u16);
+ }
+
+ }
+
+
+}
+
+
+void hw_cursor_setData2(struct lynx_cursor * cursor,
+ u16 rop,const u8* pcol,const u8* pmsk)
+{
+ int i,j,count,pitch,offset;
+ u8 color, mask;
+ u16 data;
+ void __iomem *pbuffer, *pstart;
+
+ /* in byte*/
+ pitch = cursor->w >> 3;
+
+ /* in byte */
+ count = pitch * cursor->h;
+
+ /* in byte */
+ offset = cursor->maxW * 2 / 8;
+
+ data = 0;
+ pstart = cursor->vstart;
+ pbuffer = pstart;
+
+ for(i=0;i<count;i++)
+ {
+ color = *pcol++;
+ mask = *pmsk++;
+ data = 0;
+
+ /* either method below works well, but method 2 shows no lag */
+#if 0
+ if(rop == ROP_XOR)
+ opr = mask ^ color;
+ else
+ opr = mask & color;
+
+ for(j=0;j<8;j++)
+ {
+
+ if(opr & (0x80 >> j))
+ { //use fg color,id = 2
+ data |= 2 << (j*2);
+ }else{
+ //use bg color,id = 1
+ data |= 1 << (j*2);
+ }
+ }
+#else
+ for(j=0;j<8;j++){
+ if(mask & (1<<j))
+ data |= ((color & (1<<j))?1:2)<<(j*2);
+ }
+#endif
+ iowrite16(data, pbuffer);
+
+ /* assume pitch is 1,2,4,8,...*/
+ if(!(i&(pitch-1)))
+ //if((i+1) % pitch == 0)
+ {
+ /* need a return */
+ pstart += offset;
+ pbuffer = pstart;
+ }else{
+ pbuffer += sizeof(u16);
+ }
+
+ }
+}
--- /dev/null
+#ifndef LYNX_CURSOR_H__
+#define LYNX_CURSOR_H__
+
+/* hw_cursor_xxx works for voyager,718 and 750 */
+void hw_cursor_enable(struct lynx_cursor * cursor);
+void hw_cursor_disable(struct lynx_cursor * cursor);
+void hw_cursor_setSize(struct lynx_cursor * cursor,
+ int w,int h);
+void hw_cursor_setPos(struct lynx_cursor * cursor,
+ int x,int y);
+void hw_cursor_setColor(struct lynx_cursor * cursor,
+ u32 fg,u32 bg);
+void hw_cursor_setData(struct lynx_cursor * cursor,
+ u16 rop,const u8* data,const u8* mask);
+void hw_cursor_setData2(struct lynx_cursor * cursor,
+ u16 rop,const u8* data,const u8* mask);
+#endif
--- /dev/null
+#ifndef LYNX_HELP_H__
+#define LYNX_HELP_H__
+/*****************************************************************************\
+ * FIELD MACROS *
+\*****************************************************************************/
+
+#define _LSB(f) (0 ? f)
+#define _MSB(f) (1 ? f)
+#define _COUNT(f) (_MSB(f) - _LSB(f) + 1)
+
+#define RAW_MASK(f) (0xFFFFFFFF >> (32 - _COUNT(f)))
+#define GET_MASK(f) (RAW_MASK(f) << _LSB(f))
+#define GET_FIELD(d,f) (((d) >> _LSB(f)) & RAW_MASK(f))
+#define TEST_FIELD(d,f,v) (GET_FIELD(d,f) == f ## _ ## v)
+#define SET_FIELD(d,f,v) (((d) & ~GET_MASK(f)) | \
+ (((f ## _ ## v) & RAW_MASK(f)) << _LSB(f)))
+#define SET_FIELDV(d,f,v) (((d) & ~GET_MASK(f)) | \
+ (((v) & RAW_MASK(f)) << _LSB(f)))
+
+
+////////////////////////////////////////////////////////////////////////////////
+// //
+// Internal macros //
+// //
+////////////////////////////////////////////////////////////////////////////////
+
+#define _F_START(f) (0 ? f)
+#define _F_END(f) (1 ? f)
+#define _F_SIZE(f) (1 + _F_END(f) - _F_START(f))
+#define _F_MASK(f) (((1 << _F_SIZE(f)) - 1) << _F_START(f))
+#define _F_NORMALIZE(v, f) (((v) & _F_MASK(f)) >> _F_START(f))
+#define _F_DENORMALIZE(v, f) (((v) << _F_START(f)) & _F_MASK(f))
+
+
+////////////////////////////////////////////////////////////////////////////////
+// //
+// Global macros //
+// //
+////////////////////////////////////////////////////////////////////////////////
+
+#define FIELD_GET(x, reg, field) \
+( \
+ _F_NORMALIZE((x), reg ## _ ## field) \
+)
+
+#define FIELD_SET(x, reg, field, value) \
+( \
+ (x & ~_F_MASK(reg ## _ ## field)) \
+ | _F_DENORMALIZE(reg ## _ ## field ## _ ## value, reg ## _ ## field) \
+)
+
+#define FIELD_VALUE(x, reg, field, value) \
+( \
+ (x & ~_F_MASK(reg ## _ ## field)) \
+ | _F_DENORMALIZE(value, reg ## _ ## field) \
+)
+
+#define FIELD_CLEAR(reg, field) \
+( \
+ ~ _F_MASK(reg ## _ ## field) \
+)
+
+
+////////////////////////////////////////////////////////////////////////////////
+// //
+// Field Macros //
+// //
+////////////////////////////////////////////////////////////////////////////////
+
+#define FIELD_START(field) (0 ? field)
+#define FIELD_END(field) (1 ? field)
+#define FIELD_SIZE(field) (1 + FIELD_END(field) - FIELD_START(field))
+#define FIELD_MASK(field) (((1 << (FIELD_SIZE(field)-1)) | ((1 << (FIELD_SIZE(field)-1)) - 1)) << FIELD_START(field))
+#define FIELD_NORMALIZE(reg, field) (((reg) & FIELD_MASK(field)) >> FIELD_START(field))
+#define FIELD_DENORMALIZE(field, value) (((value) << FIELD_START(field)) & FIELD_MASK(field))
+
+#define FIELD_INIT(reg, field, value) FIELD_DENORMALIZE(reg ## _ ## field, \
+ reg ## _ ## field ## _ ## value)
+#define FIELD_INIT_VAL(reg, field, value) \
+ (FIELD_DENORMALIZE(reg ## _ ## field, value))
+#define FIELD_VAL_SET(x, r, f, v) x = x & ~FIELD_MASK(r ## _ ## f) \
+ | FIELD_DENORMALIZE(r ## _ ## f, r ## _ ## f ## _ ## v)
+
+#define RGB(r, g, b) \
+( \
+ (unsigned long) (((r) << 16) | ((g) << 8) | (b)) \
+)
+
+#define RGB16(r, g, b) \
+( \
+ (unsigned short) ((((r) & 0xF8) << 8) | (((g) & 0xFC) << 3) | (((b) & 0xF8) >> 3)) \
+)
+
+static inline unsigned int absDiff(unsigned int a,unsigned int b)
+{
+ if(a<b)
+ return b-a;
+ else
+ return a-b;
+}
+
+/* n / d + 1 / 2 = (2n + d) / 2d */
+#define roundedDiv(num,denom) ((2 * (num) + (denom)) / (2 * (denom)))
+#define MB(x) ((x)<<20)
+#define KB(x) ((x)<<10)
+#define MHz(x) ((x) * 1000000)
+
+
+
+
+#endif
--- /dev/null
+#include <linux/version.h>
+#include<linux/module.h>
+#include<linux/kernel.h>
+#include<linux/errno.h>
+#include<linux/string.h>
+#include<linux/mm.h>
+#include<linux/slab.h>
+#include<linux/delay.h>
+#include<linux/fb.h>
+#include<linux/ioport.h>
+#include<linux/init.h>
+#include<linux/pci.h>
+#include<linux/vmalloc.h>
+#include<linux/pagemap.h>
+#include <linux/console.h>
+#ifdef CONFIG_MTRR
+#include <asm/mtrr.h>
+#endif
+#include<linux/platform_device.h>
+#include<linux/screen_info.h>
+
+#include "sm750.h"
+#include "sm750_hw.h"
+#include "ddk750.h"
+#include "sm750_accel.h"
+
+int hw_sm750_map(struct lynx_share* share, struct pci_dev* pdev)
+{
+ int ret;
+ struct sm750_share * spec_share;
+
+
+ spec_share = container_of(share, struct sm750_share,share);
+ ret = 0;
+
+ share->vidreg_start = pci_resource_start(pdev, 1);
+ share->vidreg_size = MB(2);
+
+ pr_info("mmio phyAddr = %lx\n", share->vidreg_start);
+
+ /* reserve the vidreg space of smi adaptor
+ * if you do this, u need to add release region code
+ * in lynxfb_remove, or memory will not be mapped again
+ * successfully
+ * */
+
+ if((ret = pci_request_region(pdev, 1, "sm750fb")))
+ {
+ pr_err("Can not request PCI regions.\n");
+ goto exit;
+ }
+
+ /* now map mmio and vidmem*/
+ share->pvReg = ioremap_nocache(share->vidreg_start, share->vidreg_size);
+ if(!share->pvReg){
+ pr_err("mmio failed\n");
+ ret = -EFAULT;
+ goto exit;
+ }else{
+ pr_info("mmio virtual addr = %p\n", share->pvReg);
+ }
+
+
+ share->accel.dprBase = share->pvReg + DE_BASE_ADDR_TYPE1;
+ share->accel.dpPortBase = share->pvReg + DE_PORT_ADDR_TYPE1;
+
+ ddk750_set_mmio(share->pvReg,share->devid, share->revid);
+
+ share->vidmem_start = pci_resource_start(pdev, 0);
+ /* don't use pdev_resource[x].end - resource[x].start to
+ * calculate the resource size,its only the maximum available
+ * size but not the actual size,use
+ * @hw_sm750_getVMSize function can be safe.
+ * */
+ share->vidmem_size = hw_sm750_getVMSize(share);
+ pr_info("video memory phyAddr = %lx, size = %u bytes\n",
+ share->vidmem_start, share->vidmem_size);
+
+ /* reserve the vidmem space of smi adaptor */
+#if 0
+ if((ret = pci_request_region(pdev,0,_moduleName_)))
+ {
+ pr_err("Can not request PCI regions.\n");
+ goto exit;
+ }
+#endif
+
+ share->pvMem = ioremap(share->vidmem_start,
+ share->vidmem_size);
+
+ if(!share->pvMem){
+ pr_err("Map video memory failed\n");
+ ret = -EFAULT;
+ goto exit;
+ }else{
+ pr_info("video memory vaddr = %p\n", share->pvMem);
+ }
+exit:
+ return ret;
+}
+
+
+
+int hw_sm750_inithw(struct lynx_share* share, struct pci_dev * pdev)
+{
+ struct sm750_share * spec_share;
+ struct init_status * parm;
+
+ spec_share = container_of(share, struct sm750_share,share);
+ parm = &spec_share->state.initParm;
+ if(parm->chip_clk == 0)
+ parm->chip_clk = (getChipType() == SM750LE)?
+ DEFAULT_SM750LE_CHIP_CLOCK :
+ DEFAULT_SM750_CHIP_CLOCK;
+
+ if(parm->mem_clk == 0)
+ parm->mem_clk = parm->chip_clk;
+ if(parm->master_clk == 0)
+ parm->master_clk = parm->chip_clk/3;
+
+ ddk750_initHw((initchip_param_t *)&spec_share->state.initParm);
+ /* for sm718,open pci burst */
+ if(share->devid == 0x718){
+ POKE32(SYSTEM_CTRL,
+ FIELD_SET(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, PCI_BURST, ON));
+ }
+
+ /* sm750 use sii164, it can be setup with default value
+ * by on power, so initDVIDisp can be skipped */
+#if 0
+ ddk750_initDVIDisp();
+#endif
+
+ if(getChipType() != SM750LE)
+ {
+ /* does user need CRT ?*/
+ if(spec_share->state.nocrt){
+ POKE32(MISC_CTRL,
+ FIELD_SET(PEEK32(MISC_CTRL),
+ MISC_CTRL,
+ DAC_POWER, OFF));
+ /* shut off dpms */
+ POKE32(SYSTEM_CTRL,
+ FIELD_SET(PEEK32(SYSTEM_CTRL),
+ SYSTEM_CTRL,
+ DPMS, VNHN));
+ }else{
+ POKE32(MISC_CTRL,
+ FIELD_SET(PEEK32(MISC_CTRL),
+ MISC_CTRL,
+ DAC_POWER, ON));
+ /* turn on dpms */
+ POKE32(SYSTEM_CTRL,
+ FIELD_SET(PEEK32(SYSTEM_CTRL),
+ SYSTEM_CTRL,
+ DPMS, VPHP));
+ }
+
+ switch (spec_share->state.pnltype){
+ case sm750_doubleTFT:
+ case sm750_24TFT:
+ case sm750_dualTFT:
+ POKE32(PANEL_DISPLAY_CTRL,
+ FIELD_VALUE(PEEK32(PANEL_DISPLAY_CTRL),
+ PANEL_DISPLAY_CTRL,
+ TFT_DISP,
+ spec_share->state.pnltype));
+ break;
+ }
+ }else{
+ /* for 750LE ,no DVI chip initilization makes Monitor no signal */
+ /* Set up GPIO for software I2C to program DVI chip in the
+ Xilinx SP605 board, in order to have video signal.
+ */
+ swI2CInit(0,1);
+
+
+ /* Customer may NOT use CH7301 DVI chip, which has to be
+ initialized differently.
+ */
+ if (swI2CReadReg(0xec, 0x4a) == 0x95)
+ {
+ /* The following register values for CH7301 are from
+ Chrontel app note and our experiment.
+ */
+ pr_info("yes,CH7301 DVI chip found\n");
+ swI2CWriteReg(0xec, 0x1d, 0x16);
+ swI2CWriteReg(0xec, 0x21, 0x9);
+ swI2CWriteReg(0xec, 0x49, 0xC0);
+ pr_info("okay,CH7301 DVI chip setup done\n");
+ }
+ }
+
+ /* init 2d engine */
+ if(!share->accel_off){
+ hw_sm750_initAccel(share);
+// share->accel.de_wait = hw_sm750_deWait;
+ }
+
+ return 0;
+}
+
+
+resource_size_t hw_sm750_getVMSize(struct lynx_share * share)
+{
+ resource_size_t ret;
+
+ ret = ddk750_getVMSize();
+ return ret;
+}
+
+
+
+int hw_sm750_output_checkMode(struct lynxfb_output* output, struct fb_var_screeninfo* var)
+{
+
+ return 0;
+}
+
+
+int hw_sm750_output_setMode(struct lynxfb_output* output,
+ struct fb_var_screeninfo* var, struct fb_fix_screeninfo* fix)
+{
+ int ret;
+ disp_output_t dispSet;
+ int channel;
+
+ ret = 0;
+ dispSet = 0;
+ channel = *output->channel;
+
+
+ if(getChipType() != SM750LE){
+ if(channel == sm750_primary){
+ pr_info("primary channel\n");
+ if(output->paths & sm750_panel)
+ dispSet |= do_LCD1_PRI;
+ if(output->paths & sm750_crt)
+ dispSet |= do_CRT_PRI;
+
+ }else{
+ pr_info("secondary channel\n");
+ if(output->paths & sm750_panel)
+ dispSet |= do_LCD1_SEC;
+ if(output->paths & sm750_crt)
+ dispSet |= do_CRT_SEC;
+
+ }
+ ddk750_setLogicalDispOut(dispSet);
+ }else{
+ /* just open DISPLAY_CONTROL_750LE register bit 3:0*/
+ u32 reg;
+ reg = PEEK32(DISPLAY_CONTROL_750LE);
+ reg |= 0xf;
+ POKE32(DISPLAY_CONTROL_750LE, reg);
+ }
+
+ pr_info("ddk setlogicdispout done \n");
+ return ret;
+}
+
+void hw_sm750_output_clear(struct lynxfb_output* output)
+{
+
+ return;
+}
+
+int hw_sm750_crtc_checkMode(struct lynxfb_crtc* crtc, struct fb_var_screeninfo* var)
+{
+ struct lynx_share * share;
+
+
+ share = container_of(crtc, struct lynxfb_par,crtc)->share;
+
+ switch (var->bits_per_pixel){
+ case 8:
+ case 16:
+ break;
+ case 32:
+ if (share->revid == SM750LE_REVISION_ID) {
+ pr_debug("750le do not support 32bpp\n");
+ return -EINVAL;
+ }
+ break;
+ default:
+ return -EINVAL;
+
+ }
+
+ return 0;
+}
+
+
+/*
+ set the controller's mode for @crtc charged with @var and @fix parameters
+*/
+int hw_sm750_crtc_setMode(struct lynxfb_crtc* crtc,
+ struct fb_var_screeninfo* var,
+ struct fb_fix_screeninfo* fix)
+{
+ int ret,fmt;
+ u32 reg;
+ mode_parameter_t modparm;
+ clock_type_t clock;
+ struct lynx_share * share;
+ struct lynxfb_par * par;
+
+
+ ret = 0;
+ par = container_of(crtc, struct lynxfb_par, crtc);
+ share = par->share;
+#if 1
+ if(!share->accel_off){
+ /* set 2d engine pixel format according to mode bpp */
+ switch(var->bits_per_pixel){
+ case 8:
+ fmt = 0;
+ break;
+ case 16:
+ fmt = 1;
+ break;
+ case 32:
+ default:
+ fmt = 2;
+ break;
+ }
+ hw_set2dformat(&share->accel, fmt);
+ }
+#endif
+
+ /* set timing */
+// modparm.pixel_clock = PS_TO_HZ(var->pixclock);
+ modparm.pixel_clock = ps_to_hz(var->pixclock);
+ modparm.vertical_sync_polarity = (var->sync & FB_SYNC_HOR_HIGH_ACT) ? POS:NEG;
+ modparm.horizontal_sync_polarity = (var->sync & FB_SYNC_VERT_HIGH_ACT) ? POS:NEG;
+ modparm.clock_phase_polarity = (var->sync& FB_SYNC_COMP_HIGH_ACT) ? POS:NEG;
+ modparm.horizontal_display_end = var->xres;
+ modparm.horizontal_sync_width = var->hsync_len;
+ modparm.horizontal_sync_start = var->xres + var->right_margin;
+ modparm.horizontal_total = var->xres + var->left_margin + var->right_margin + var->hsync_len;
+ modparm.vertical_display_end = var->yres;
+ modparm.vertical_sync_height = var->vsync_len;
+ modparm.vertical_sync_start = var->yres + var->lower_margin;
+ modparm.vertical_total = var->yres + var->upper_margin + var->lower_margin + var->vsync_len;
+
+ /* choose pll */
+ if(crtc->channel != sm750_secondary)
+ clock = PRIMARY_PLL;
+ else
+ clock = SECONDARY_PLL;
+
+ pr_debug("Request pixel clock = %lu\n", modparm.pixel_clock);
+ ret = ddk750_setModeTiming(&modparm, clock);
+ if(ret){
+ pr_err("Set mode timing failed\n");
+ goto exit;
+ }
+
+ if(crtc->channel != sm750_secondary){
+ /* set pitch, offset ,width,start address ,etc... */
+ POKE32(PANEL_FB_ADDRESS,
+ FIELD_SET(0, PANEL_FB_ADDRESS, STATUS, CURRENT)|
+ FIELD_SET(0, PANEL_FB_ADDRESS, EXT, LOCAL)|
+ FIELD_VALUE(0, PANEL_FB_ADDRESS, ADDRESS, crtc->oScreen));
+
+ reg = var->xres * (var->bits_per_pixel >> 3);
+ /* crtc->channel is not equal to par->index on numeric,be aware of that */
+ reg = PADDING(crtc->line_pad,reg);
+
+ POKE32(PANEL_FB_WIDTH,
+ FIELD_VALUE(0, PANEL_FB_WIDTH, WIDTH, reg)|
+ FIELD_VALUE(0, PANEL_FB_WIDTH, OFFSET, fix->line_length));
+
+ POKE32(PANEL_WINDOW_WIDTH,
+ FIELD_VALUE(0, PANEL_WINDOW_WIDTH, WIDTH, var->xres -1)|
+ FIELD_VALUE(0, PANEL_WINDOW_WIDTH, X, var->xoffset));
+
+ POKE32(PANEL_WINDOW_HEIGHT,
+ FIELD_VALUE(0, PANEL_WINDOW_HEIGHT, HEIGHT, var->yres_virtual - 1)|
+ FIELD_VALUE(0, PANEL_WINDOW_HEIGHT, Y, var->yoffset));
+
+ POKE32(PANEL_PLANE_TL, 0);
+
+ POKE32(PANEL_PLANE_BR,
+ FIELD_VALUE(0, PANEL_PLANE_BR, BOTTOM, var->yres - 1)|
+ FIELD_VALUE(0, PANEL_PLANE_BR,RIGHT, var->xres - 1));
+
+ /* set pixel format */
+ reg = PEEK32(PANEL_DISPLAY_CTRL);
+ POKE32(PANEL_DISPLAY_CTRL,
+ FIELD_VALUE(reg,
+ PANEL_DISPLAY_CTRL, FORMAT,
+ (var->bits_per_pixel >> 4)
+ ));
+ }else{
+ /* not implemented now */
+ POKE32(CRT_FB_ADDRESS, crtc->oScreen);
+ reg = var->xres * (var->bits_per_pixel >> 3);
+ /* crtc->channel is not equal to par->index on numeric,be aware of that */
+ reg = PADDING(crtc->line_pad, reg);
+
+ POKE32(CRT_FB_WIDTH,
+ FIELD_VALUE(0, CRT_FB_WIDTH, WIDTH, reg)|
+ FIELD_VALUE(0, CRT_FB_WIDTH, OFFSET, fix->line_length));
+
+ /* SET PIXEL FORMAT */
+ reg = PEEK32(CRT_DISPLAY_CTRL);
+ reg = FIELD_VALUE(reg, CRT_DISPLAY_CTRL, FORMAT, var->bits_per_pixel >> 4);
+ POKE32(CRT_DISPLAY_CTRL, reg);
+
+ }
+
+
+exit:
+ return ret;
+}
+
+void hw_sm750_crtc_clear(struct lynxfb_crtc* crtc)
+{
+
+ return;
+}
+
+int hw_sm750_setColReg(struct lynxfb_crtc* crtc, ushort index,
+ ushort red, ushort green, ushort blue)
+{
+ static unsigned int add[]={PANEL_PALETTE_RAM,CRT_PALETTE_RAM};
+ POKE32(add[crtc->channel] + index*4, (red<<16)|(green<<8)|blue);
+ return 0;
+}
+
+int hw_sm750le_setBLANK(struct lynxfb_output * output, int blank){
+ int dpms,crtdb;
+
+ switch(blank)
+ {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_UNBLANK:
+#else
+ case VESA_NO_BLANKING:
+#endif
+ dpms = CRT_DISPLAY_CTRL_DPMS_0;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_OFF;
+ break;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_NORMAL:
+ dpms = CRT_DISPLAY_CTRL_DPMS_0;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ break;
+#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_VSYNC_SUSPEND:
+#else
+ case VESA_VSYNC_SUSPEND:
+#endif
+ dpms = CRT_DISPLAY_CTRL_DPMS_2;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ break;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_HSYNC_SUSPEND:
+#else
+ case VESA_HSYNC_SUSPEND:
+#endif
+ dpms = CRT_DISPLAY_CTRL_DPMS_1;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ break;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_POWERDOWN:
+#else
+ case VESA_POWERDOWN:
+#endif
+ dpms = CRT_DISPLAY_CTRL_DPMS_3;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ if(output->paths & sm750_crt){
+ POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, DPMS, dpms));
+ POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, BLANK, crtdb));
+ }
+ return 0;
+}
+
+int hw_sm750_setBLANK(struct lynxfb_output* output,int blank)
+{
+ unsigned int dpms, pps, crtdb;
+
+ dpms = pps = crtdb = 0;
+
+ switch (blank)
+ {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_UNBLANK:
+#else
+ case VESA_NO_BLANKING:
+#endif
+ pr_info("flag = FB_BLANK_UNBLANK \n");
+ dpms = SYSTEM_CTRL_DPMS_VPHP;
+ pps = PANEL_DISPLAY_CTRL_DATA_ENABLE;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_OFF;
+ break;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_NORMAL:
+ pr_info("flag = FB_BLANK_NORMAL \n");
+ dpms = SYSTEM_CTRL_DPMS_VPHP;
+ pps = PANEL_DISPLAY_CTRL_DATA_DISABLE;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ break;
+#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_VSYNC_SUSPEND:
+#else
+ case VESA_VSYNC_SUSPEND:
+#endif
+ dpms = SYSTEM_CTRL_DPMS_VNHP;
+ pps = PANEL_DISPLAY_CTRL_DATA_DISABLE;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ break;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_HSYNC_SUSPEND:
+#else
+ case VESA_HSYNC_SUSPEND:
+#endif
+ dpms = SYSTEM_CTRL_DPMS_VPHN;
+ pps = PANEL_DISPLAY_CTRL_DATA_DISABLE;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ break;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_POWERDOWN:
+#else
+ case VESA_POWERDOWN:
+#endif
+ dpms = SYSTEM_CTRL_DPMS_VNHN;
+ pps = PANEL_DISPLAY_CTRL_DATA_DISABLE;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ break;
+ }
+
+ if(output->paths & sm750_crt){
+
+ POKE32(SYSTEM_CTRL,FIELD_VALUE(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, DPMS, dpms));
+ POKE32(CRT_DISPLAY_CTRL,FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL,BLANK, crtdb));
+ }
+
+ if(output->paths & sm750_panel){
+ POKE32(PANEL_DISPLAY_CTRL, FIELD_VALUE(PEEK32(PANEL_DISPLAY_CTRL), PANEL_DISPLAY_CTRL, DATA, pps));
+ }
+
+ return 0;
+}
+
+
+void hw_sm750_initAccel(struct lynx_share * share)
+{
+ u32 reg;
+ enable2DEngine(1);
+
+ if(getChipType() == SM750LE){
+ reg = PEEK32(DE_STATE1);
+ reg = FIELD_SET(reg, DE_STATE1, DE_ABORT,ON);
+ POKE32(DE_STATE1,reg);
+
+ reg = PEEK32(DE_STATE1);
+ reg = FIELD_SET(reg, DE_STATE1, DE_ABORT,OFF);
+ POKE32(DE_STATE1, reg);
+
+ }else{
+ /* engine reset */
+ reg = PEEK32(SYSTEM_CTRL);
+ reg = FIELD_SET(reg, SYSTEM_CTRL, DE_ABORT,ON);
+ POKE32(SYSTEM_CTRL, reg);
+
+ reg = PEEK32(SYSTEM_CTRL);
+ reg = FIELD_SET(reg, SYSTEM_CTRL, DE_ABORT,OFF);
+ POKE32(SYSTEM_CTRL, reg);
+ }
+
+ /* call 2d init */
+ share->accel.de_init(&share->accel);
+}
+
+int hw_sm750le_deWait(void)
+{
+ int i=0x10000000;
+ while(i--){
+ unsigned int dwVal = PEEK32(DE_STATE2);
+ if((FIELD_GET(dwVal, DE_STATE2, DE_STATUS) == DE_STATE2_DE_STATUS_IDLE) &&
+ (FIELD_GET(dwVal, DE_STATE2, DE_FIFO) == DE_STATE2_DE_FIFO_EMPTY) &&
+ (FIELD_GET(dwVal, DE_STATE2, DE_MEM_FIFO) == DE_STATE2_DE_MEM_FIFO_EMPTY))
+ {
+ return 0;
+ }
+ }
+ /* timeout error */
+ return -1;
+}
+
+
+int hw_sm750_deWait(void)
+{
+ int i=0x10000000;
+ while(i--){
+ unsigned int dwVal = PEEK32(SYSTEM_CTRL);
+ if((FIELD_GET(dwVal,SYSTEM_CTRL,DE_STATUS) == SYSTEM_CTRL_DE_STATUS_IDLE) &&
+ (FIELD_GET(dwVal,SYSTEM_CTRL,DE_FIFO) == SYSTEM_CTRL_DE_FIFO_EMPTY) &&
+ (FIELD_GET(dwVal,SYSTEM_CTRL,DE_MEM_FIFO) == SYSTEM_CTRL_DE_MEM_FIFO_EMPTY))
+ {
+ return 0;
+ }
+ }
+ /* timeout error */
+ return -1;
+}
+
+int hw_sm750_pan_display(struct lynxfb_crtc *crtc,
+ const struct fb_var_screeninfo *var,
+ const struct fb_info *info)
+{
+ uint32_t total;
+ //check params
+ if ((var->xoffset + var->xres > var->xres_virtual) ||
+ (var->yoffset + var->yres > var->yres_virtual)) {
+ return -EINVAL;
+ }
+
+ total = var->yoffset * info->fix.line_length +
+ ((var->xoffset * var->bits_per_pixel) >> 3);
+ total += crtc->oScreen;
+ if (crtc->channel == sm750_primary) {
+ POKE32(PANEL_FB_ADDRESS,
+ FIELD_VALUE(PEEK32(PANEL_FB_ADDRESS),
+ PANEL_FB_ADDRESS, ADDRESS, total));
+ } else {
+ POKE32(CRT_FB_ADDRESS,
+ FIELD_VALUE(PEEK32(CRT_FB_ADDRESS),
+ CRT_FB_ADDRESS, ADDRESS, total));
+ }
+ return 0;
+}
+
--- /dev/null
+#ifndef LYNX_HW750_H__
+#define LYNX_HW750_H__
+
+
+#define DEFAULT_SM750_CHIP_CLOCK 290
+#define DEFAULT_SM750LE_CHIP_CLOCK 333
+#ifndef SM750LE_REVISION_ID
+#define SM750LE_REVISION_ID (unsigned char)0xfe
+#endif
+
+//#define DEFAULT_MEM_CLOCK (DEFAULT_SM750_CHIP_CLOCK/1)
+//#define DEFAULT_MASTER_CLOCK (DEFAULT_SM750_CHIP_CLOCK/3)
+
+
+enum sm750_pnltype{
+
+ sm750_24TFT = 0,/* 24bit tft */
+
+ sm750_dualTFT = 2,/* dual 18 bit tft */
+
+ sm750_doubleTFT = 1,/* 36 bit double pixel tft */
+};
+
+/* vga channel is not concerned */
+enum sm750_dataflow{
+ sm750_simul_pri,/* primary => all head */
+
+ sm750_simul_sec,/* secondary => all head */
+
+ sm750_dual_normal,/* primary => panel head and secondary => crt */
+
+ sm750_dual_swap,/* primary => crt head and secondary => panel */
+};
+
+
+enum sm750_channel{
+ sm750_primary = 0,
+ /* enum value equal to the register filed data */
+ sm750_secondary = 1,
+};
+
+enum sm750_path{
+ sm750_panel = 1,
+ sm750_crt = 2,
+ sm750_pnc = 3,/* panel and crt */
+};
+
+struct init_status{
+ ushort powerMode;
+ /* below three clocks are in unit of MHZ*/
+ ushort chip_clk;
+ ushort mem_clk;
+ ushort master_clk;
+ ushort setAllEngOff;
+ ushort resetMemory;
+};
+
+struct sm750_state{
+ struct init_status initParm;
+ enum sm750_pnltype pnltype;
+ enum sm750_dataflow dataflow;
+ int nocrt;
+ int xLCD;
+ int yLCD;
+};
+
+/* sm750_share stands for a presentation of two frame buffer
+ that use one sm750 adaptor, it is similiar to the super class of lynx_share
+ in C++
+*/
+
+struct sm750_share{
+ /* it's better to put lynx_share struct to the first place of sm750_share */
+ struct lynx_share share;
+ struct sm750_state state;
+ int hwCursor;
+ /* 0: no hardware cursor
+ 1: primary crtc hw cursor enabled,
+ 2: secondary crtc hw cursor enabled
+ 3: both ctrc hw cursor enabled
+ */
+};
+
+int hw_sm750_map(struct lynx_share* share,struct pci_dev* pdev);
+int hw_sm750_inithw(struct lynx_share*,struct pci_dev *);
+void hw_sm750_initAccel(struct lynx_share *);
+int hw_sm750_deWait(void);
+int hw_sm750le_deWait(void);
+
+resource_size_t hw_sm750_getVMSize(struct lynx_share *);
+int hw_sm750_output_checkMode(struct lynxfb_output*,struct fb_var_screeninfo*);
+int hw_sm750_output_setMode(struct lynxfb_output*,struct fb_var_screeninfo*,struct fb_fix_screeninfo*);
+int hw_sm750_crtc_checkMode(struct lynxfb_crtc*,struct fb_var_screeninfo*);
+int hw_sm750_crtc_setMode(struct lynxfb_crtc*,struct fb_var_screeninfo*,struct fb_fix_screeninfo*);
+int hw_sm750_setColReg(struct lynxfb_crtc*,ushort,ushort,ushort,ushort);
+int hw_sm750_setBLANK(struct lynxfb_output*,int);
+int hw_sm750le_setBLANK(struct lynxfb_output*,int);
+void hw_sm750_crtc_clear(struct lynxfb_crtc*);
+void hw_sm750_output_clear(struct lynxfb_output*);
+int hw_sm750_pan_display(struct lynxfb_crtc *crtc,
+ const struct fb_var_screeninfo *var,
+ const struct fb_info *info);
+
+#endif
/**********************************************************************
SM712 Mode table.
**********************************************************************/
-struct ModeInit vgamode[] = {
+static struct ModeInit vgamode[] = {
{
/* mode#0: 640 x 480 16Bpp 60Hz */
640, 480, 16, 60,
static struct screen_info smtc_scr_info;
+static char *mode_option;
+
/* process command line options, get vga parameter */
-static int __init sm7xx_vga_setup(char *options)
+static void __init sm7xx_vga_setup(char *options)
{
int i;
if (!options || !*options)
- return -EINVAL;
+ return;
smtc_scr_info.lfb_width = 0;
smtc_scr_info.lfb_height = 0;
smtc_scr_info.lfb_height =
vesa_mode_table[i].lfb_height;
smtc_scr_info.lfb_depth = vesa_mode_table[i].lfb_depth;
- return 0;
+ return;
}
}
-
- return -1;
}
-__setup("vga=", sm7xx_vga_setup);
static void sm712_setpalette(int regno, unsigned red, unsigned green,
unsigned blue, struct fb_info *info)
if (err)
return err;
+ err = pci_request_region(pdev, 0, "sm7xxfb");
+ if (err < 0) {
+ dev_err(&pdev->dev, "cannot reserve framebuffer region\n");
+ goto failed_regions;
+ }
+
sprintf(smtcfb_fix.id, "sm%Xfb", ent->device);
sfb = smtc_alloc_fb_info(pdev);
smtc_free_fb_info(sfb);
failed_free:
+ pci_release_region(pdev, 0);
+
+failed_regions:
pci_disable_device(pdev);
return err;
{0,}
};
+MODULE_DEVICE_TABLE(pci, smtcfb_pci_table);
+
static void smtcfb_pci_remove(struct pci_dev *pdev)
{
struct smtcfb_info *sfb;
smtc_unmap_mmio(sfb);
unregister_framebuffer(&sfb->fb);
smtc_free_fb_info(sfb);
+ pci_release_region(pdev, 0);
+ pci_disable_device(pdev);
}
#ifdef CONFIG_PM
.driver.pm = SM7XX_PM_OPS,
};
-module_pci_driver(smtcfb_driver);
+static int __init sm712fb_init(void)
+{
+#ifndef MODULE
+ char *option = NULL;
+
+ if (fb_get_options("sm712fb", &option))
+ return -ENODEV;
+ if (option && *option)
+ mode_option = option;
+#endif
+ sm7xx_vga_setup(mode_option);
+
+ return pci_register_driver(&smtcfb_driver);
+}
+
+module_init(sm712fb_init);
+
+static void __exit sm712fb_exit(void)
+{
+ pci_unregister_driver(&smtcfb_driver);
+}
+
+module_exit(sm712fb_exit);
MODULE_AUTHOR("Siliconmotion ");
MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
static ssize_t message_store(struct kobject *kobj, struct kobj_attribute *attr,
const char *buf, size_t count)
{
- ssize_t retval = 0;
struct msg_group_t *group = spk_find_msg_group(attr->attr.name);
BUG_ON(!group);
- retval = message_store_helper(buf, count, group);
- return retval;
+ return message_store_helper(buf, count, group);
}
/*
if (spk_bleeps & 1)
bleep(spk_y);
if ((spk_bleeps & 2) && (msg_id < edge_quiet))
- synth_printf("%s\n", spk_msg_get(MSG_EDGE_MSGS_START + msg_id - 1));
+ synth_printf("%s\n",
+ spk_msg_get(MSG_EDGE_MSGS_START + msg_id - 1));
}
static void speak_char(u_char ch)
if (in_count > 2 && rep_count > 2) {
if (last_type & CH_RPT) {
synth_printf(" ");
- synth_printf(spk_msg_get(MSG_REPEAT_DESC2), ++rep_count);
+ synth_printf(spk_msg_get(MSG_REPEAT_DESC2),
+ ++rep_count);
synth_printf(" ");
}
rep_count = 0;
int i, bi, hi;
int vc_num = vc->vc_num;
- bi = ((vc->vc_attr & 0x70) >> 4);
+ bi = (vc->vc_attr & 0x70) >> 4;
hi = speakup_console[vc_num]->ht.highsize[bi];
i = 0;
win_right = spk_x;
}
snprintf(info, sizeof(info), spk_msg_get(MSG_WINDOW_BOUNDARY),
- (win_start) ? spk_msg_get(MSG_END) : spk_msg_get(MSG_START),
+ (win_start) ?
+ spk_msg_get(MSG_END) : spk_msg_get(MSG_START),
(int)spk_y + 1, (int)spk_x + 1);
}
synth_printf("%s\n", info);
#define SPK_TIMEOUT 100
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
-#define spk_serial_tx_busy() ((inb(speakup_info.port_tts + UART_LSR) & BOTH_EMPTY) != BOTH_EMPTY)
+#define spk_serial_tx_busy() \
+ ((inb(speakup_info.port_tts + UART_LSR) & BOTH_EMPTY) != BOTH_EMPTY)
#endif
extern struct st_var_header *spk_var_header_by_name(const char *name);
extern struct punc_var_t *spk_get_punc_var(enum var_id_t var_id);
extern int spk_set_num_var(int val, struct st_var_header *var, int how);
-extern int spk_set_string_var(const char *page, struct st_var_header *var, int len);
+extern int spk_set_string_var(const char *page, struct st_var_header *var,
+ int len);
extern int spk_set_mask_bits(const char *input, const int which, const int how);
extern special_func spk_special_handler;
-extern int spk_handle_help(struct vc_data *vc, u_char type, u_char ch, u_short key);
+extern int spk_handle_help(struct vc_data *vc, u_char type, u_char ch,
+ u_short key);
extern int synth_init(char *name);
extern void synth_release(void);
MODULE_PARM_DESC(port, "Set the port for the synthesizer (override probing).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init acntpc_init(void)
-{
- return synth_add(&synth_acntpc);
-}
-
-static void __exit acntpc_exit(void)
-{
- synth_remove(&synth_acntpc);
-}
+module_spk_synth(synth_acntpc);
-module_init(acntpc_init);
-module_exit(acntpc_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for Accent PC synthesizer");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init acntsa_init(void)
-{
- return synth_add(&synth_acntsa);
-}
-
-static void __exit acntsa_exit(void)
-{
- synth_remove(&synth_acntsa);
-}
+module_spk_synth(synth_acntsa);
-module_init(acntsa_init);
-module_exit(acntsa_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for Accent SA synthesizer");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init apollo_init(void)
-{
- return synth_add(&synth_apollo);
-}
-
-static void __exit apollo_exit(void)
-{
- synth_remove(&synth_apollo);
-}
+module_spk_synth(synth_apollo);
-module_init(apollo_init);
-module_exit(apollo_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for Apollo II synthesizer");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init audptr_init(void)
-{
- return synth_add(&synth_audptr);
-}
-
-static void __exit audptr_exit(void)
-{
- synth_remove(&synth_audptr);
-}
+module_spk_synth(synth_audptr);
-module_init(audptr_init);
-module_exit(audptr_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for Audapter synthesizer");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init bns_init(void)
-{
- return synth_add(&synth_bns);
-}
+module_spk_synth(synth_bns);
-static void __exit bns_exit(void)
-{
- synth_remove(&synth_bns);
-}
-
-module_init(bns_init);
-module_exit(bns_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for Braille 'n Speak synthesizers");
if (time_after_eq(jiffies, jiff_max)) {
if (!in_escape)
spk_serial_out(PROCSPEECH);
- spin_lock_irqsave(&speakup_info.spinlock, flags);
+ spin_lock_irqsave(&speakup_info.spinlock,
+ flags);
jiffy_delta_val = jiffy_delta->u.n.value;
delay_time_val = delay_time->u.n.value;
- spin_unlock_irqrestore(&speakup_info.spinlock, flags);
+ spin_unlock_irqrestore(&speakup_info.spinlock,
+ flags);
schedule_timeout(msecs_to_jiffies
(delay_time_val));
jiff_max = jiffies + jiffy_delta_val;
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init decext_init(void)
-{
- return synth_add(&synth_decext);
-}
-
-static void __exit decext_exit(void)
-{
- synth_remove(&synth_decext);
-}
+module_spk_synth(synth_decext);
-module_init(decext_init);
-module_exit(decext_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for DECtalk External synthesizers");
if (time_after_eq(jiffies, jiff_max)) {
if (!in_escape)
dt_sendchar(PROCSPEECH);
- spin_lock_irqsave(&speakup_info.spinlock, flags);
+ spin_lock_irqsave(&speakup_info.spinlock,
+ flags);
jiffy_delta_val = jiffy_delta->u.n.value;
delay_time_val = delay_time->u.n.value;
- spin_unlock_irqrestore(&speakup_info.spinlock, flags);
+ spin_unlock_irqrestore(&speakup_info.spinlock,
+ flags);
schedule_timeout(msecs_to_jiffies
(delay_time_val));
jiff_max = jiffies + jiffy_delta_val;
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init decpc_init(void)
-{
- return synth_add(&synth_dec_pc);
-}
-
-static void __exit decpc_exit(void)
-{
- synth_remove(&synth_dec_pc);
-}
+module_spk_synth(synth_dec_pc);
-module_init(decpc_init);
-module_exit(decpc_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for DECtalk PC synthesizers");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init dectlk_init(void)
-{
- return synth_add(&synth_dectlk);
-}
-
-static void __exit dectlk_exit(void)
-{
- synth_remove(&synth_dectlk);
-}
+module_spk_synth(synth_dectlk);
-module_init(dectlk_init);
-module_exit(dectlk_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for DECtalk Express synthesizers");
MODULE_PARM_DESC(port, "Set the port for the synthesizer (override probing).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init dtlk_init(void)
-{
- return synth_add(&synth_dtlk);
-}
-
-static void __exit dtlk_exit(void)
-{
- synth_remove(&synth_dtlk);
-}
+module_spk_synth(synth_dtlk);
-module_init(dtlk_init);
-module_exit(dtlk_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for DoubleTalk PC synthesizers");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init dummy_init(void)
-{
- return synth_add(&synth_dummy);
-}
+module_spk_synth(synth_dummy);
-static void __exit dummy_exit(void)
-{
- synth_remove(&synth_dummy);
-}
-
-module_init(dummy_init);
-module_exit(dummy_exit);
MODULE_AUTHOR("Samuel Thibault <samuel.thibault@ens-lyon.org>");
MODULE_DESCRIPTION("Speakup support for text console");
MODULE_LICENSE("GPL");
MODULE_PARM_DESC(port, "Set the port for the synthesizer (override probing).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init keypc_init(void)
-{
- return synth_add(&synth_keypc);
-}
-
-static void __exit keypc_exit(void)
-{
- synth_remove(&synth_keypc);
-}
+module_spk_synth(synth_keypc);
-module_init(keypc_init);
-module_exit(keypc_exit);
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for Keynote Gold PC synthesizers");
MODULE_LICENSE("GPL");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init ltlk_init(void)
-{
- return synth_add(&synth_ltlk);
-}
-
-static void __exit ltlk_exit(void)
-{
- synth_remove(&synth_ltlk);
-}
+module_spk_synth(synth_ltlk);
-module_init(ltlk_init);
-module_exit(ltlk_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for DoubleTalk LT/LiteTalk synthesizers");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
+module_spk_synth(synth_soft);
-static int __init soft_init(void)
-{
- return synth_add(&synth_soft);
-}
-
-static void __exit soft_exit(void)
-{
- synth_remove(&synth_soft);
-}
-
-module_init(soft_init);
-module_exit(soft_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_DESCRIPTION("Speakup userspace software synthesizer support");
MODULE_LICENSE("GPL");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init spkout_init(void)
-{
- return synth_add(&synth_spkout);
-}
-
-static void __exit spkout_exit(void)
-{
- synth_remove(&synth_spkout);
-}
+module_spk_synth(synth_spkout);
-module_init(spkout_init);
-module_exit(spkout_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for Speak Out synthesizers");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init txprt_init(void)
-{
- return synth_add(&synth_txprt);
-}
+module_spk_synth(synth_txprt);
-static void __exit txprt_exit(void)
-{
- synth_remove(&synth_txprt);
-}
-
-module_init(txprt_init);
-module_exit(txprt_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for Transport synthesizers");
#define KT_SPKUP 15
-extern const struct old_serial_port *spk_serial_init(int index);
-extern void spk_stop_serial_interrupt(void);
-extern int spk_wait_for_xmitr(void);
-extern unsigned char spk_serial_in(void);
-extern unsigned char spk_serial_in_nowait(void);
-extern int spk_serial_out(const char ch);
-extern void spk_serial_release(void);
+const struct old_serial_port *spk_serial_init(int index);
+void spk_stop_serial_interrupt(void);
+int spk_wait_for_xmitr(void);
+unsigned char spk_serial_in(void);
+unsigned char spk_serial_in_nowait(void);
+int spk_serial_out(const char ch);
+void spk_serial_release(void);
-extern char synth_buffer_getc(void);
-extern char synth_buffer_peek(void);
-extern int synth_buffer_empty(void);
-extern struct var_t *spk_get_var(enum var_id_t var_id);
-extern ssize_t spk_var_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf);
-extern ssize_t spk_var_store(struct kobject *kobj, struct kobj_attribute *attr,
- const char *buf, size_t count);
+char synth_buffer_getc(void);
+char synth_buffer_peek(void);
+int synth_buffer_empty(void);
+struct var_t *spk_get_var(enum var_id_t var_id);
+ssize_t spk_var_show(struct kobject *kobj, struct kobj_attribute *attr,
+ char *buf);
+ssize_t spk_var_store(struct kobject *kobj, struct kobj_attribute *attr,
+ const char *buf, size_t count);
-extern int spk_serial_synth_probe(struct spk_synth *synth);
-extern const char *spk_synth_immediate(struct spk_synth *synth, const char *buff);
-extern void spk_do_catch_up(struct spk_synth *synth);
-extern void spk_synth_flush(struct spk_synth *synth);
-extern int spk_synth_is_alive_nop(struct spk_synth *synth);
-extern int spk_synth_is_alive_restart(struct spk_synth *synth);
-extern void synth_printf(const char *buf, ...);
-extern int synth_request_region(u_long, u_long);
-extern int synth_release_region(u_long, u_long);
-extern int synth_add(struct spk_synth *in_synth);
-extern void synth_remove(struct spk_synth *in_synth);
+int spk_serial_synth_probe(struct spk_synth *synth);
+const char *spk_synth_immediate(struct spk_synth *synth, const char *buff);
+void spk_do_catch_up(struct spk_synth *synth);
+void spk_synth_flush(struct spk_synth *synth);
+int spk_synth_is_alive_nop(struct spk_synth *synth);
+int spk_synth_is_alive_restart(struct spk_synth *synth);
+void synth_printf(const char *buf, ...);
+int synth_request_region(u_long, u_long);
+int synth_release_region(u_long, u_long);
+int synth_add(struct spk_synth *in_synth);
+void synth_remove(struct spk_synth *in_synth);
extern struct speakup_info_t speakup_info;
#include <linux/spinlock.h>
#include <linux/mutex.h>
#include <linux/io.h> /* for inb_p, outb_p, inb, outb, etc... */
+#include <linux/device.h>
enum var_type_t {
VAR_NUM = 0,
int *default_vol;
int (*probe)(struct spk_synth *synth);
void (*release)(void);
- const char *(*synth_immediate)(struct spk_synth *synth, const char *buff);
+ const char *(*synth_immediate)(struct spk_synth *synth,
+ const char *buff);
void (*catch_up)(struct spk_synth *synth);
void (*flush)(struct spk_synth *synth);
int (*is_alive)(struct spk_synth *synth);
struct attribute_group attributes;
};
+/**
+ * module_spk_synth() - Helper macro for registering a speakup driver
+ * @__spk_synth: spk_synth struct
+ * Helper macro for speakup drivers which do not do anything special in module
+ * init/exit. This eliminates a lot of boilerplate. Each module may only
+ * use this macro once, and calling it replaces module_init() and module_exit()
+ */
+#define module_spk_synth(__spk_synth) \
+ module_driver(__spk_synth, synth_add, synth_remove)
+
struct speakup_info_t {
spinlock_t spinlock;
int port_tts;
txbuf[1] = page;
retval = i2c_master_send(i2c, txbuf, PAGE_LEN);
if (retval != PAGE_LEN)
- dev_err(&i2c->dev, "%s:failed:%d\n", __func__, retval);
+ dev_err(&i2c->dev, "failed:%d\n", retval);
else
pdata->current_page = page;
} else
retval = i2c_master_send(pdata->i2c_client, txbuf, 2);
/* Add in retry on writes only in certain error return values */
if (retval != 2) {
- dev_err(&i2c->dev, "%s:failed:%d\n", __func__, retval);
+ dev_err(&i2c->dev, "failed:%d\n", retval);
retval = -EIO;
} else
retval = 1;
/* Check if this is a Synaptics device - report if not. */
if (pdata->rmi4_mod_info.manufacturer_id != 1)
- dev_err(&client->dev, "%s: non-Synaptics mfg id:%d\n",
- __func__, pdata->rmi4_mod_info.manufacturer_id);
+ dev_err(&client->dev, "non-Synaptics mfg id:%d\n",
+ pdata->rmi4_mod_info.manufacturer_id);
list_for_each_entry(rfi, &pdata->rmi4_mod_info.support_fn_list, link)
data_sources += rfi->num_of_data_sources;
platformdata->irq_type,
DRIVER_NAME, rmi4_data);
if (retval) {
- dev_err(&client->dev, "%s:Unable to get attn irq %d\n",
- __func__, client->irq);
+ dev_err(&client->dev, "Unable to get attn irq %d\n",
+ client->irq);
goto err_query_dev;
}
return 0;
}
-static const struct dev_pm_ops synaptics_rmi4_dev_pm_ops = {
- .suspend = synaptics_rmi4_suspend,
- .resume = synaptics_rmi4_resume,
-};
#endif
+static SIMPLE_DEV_PM_OPS(synaptics_rmi4_dev_pm_ops, synaptics_rmi4_suspend,
+ synaptics_rmi4_resume);
+
static const struct i2c_device_id synaptics_rmi4_id_table[] = {
{ DRIVER_NAME, 0 },
{ },
.driver = {
.name = DRIVER_NAME,
.owner = THIS_MODULE,
-#ifdef CONFIG_PM
.pm = &synaptics_rmi4_dev_pm_ops,
-#endif
},
.probe = synaptics_rmi4_probe,
.remove = synaptics_rmi4_remove,
/* peripheral type of 3 - processor */
/* specifies device capable, but not present */
-#define DEV_HISUPPORT 0x10; /* HiSup = 1; shows support for report luns */
+#define DEV_HISUPPORT 0x10 /* HiSup = 1; shows support for report luns */
/* must be returned for lun 0. */
/* NOTE: Linux code assumes inquiry contains 36 bytes. Without checking length
#define ISSUE_IO_VMCALL(method, param, result) \
(result = unisys_vmcall(method, (param) & 0xFFFFFFFF, \
(param) >> 32))
-#define ISSUE_IO_EXTENDED_VMCALL(method, param1, param2, \
- param3, result) \
- (result = unisys_extended_vmcall(method, param1, \
- param2, param3))
+#define ISSUE_IO_EXTENDED_VMCALL(method, param1, param2, param3) \
+ unisys_extended_vmcall(method, param1, param2, param3)
/* The following uses VMCALL_POST_CODE_LOGEVENT interface but is currently
* not used much */
#define ISSUE_IO_VMCALL_POSTCODE_SEVERITY(postcode, severity) \
do { \
- u32 _tempresult = VMCALL_SUCCESS; \
ISSUE_IO_EXTENDED_VMCALL(VMCALL_POST_CODE_LOGEVENT, severity, \
- MDS_APPOS, postcode, _tempresult); \
+ MDS_APPOS, postcode); \
} while (0)
#endif
#ifndef __PROCOBJECTTREE_H__
#define __PROCOBJECTTREE_H__
-#include "uniklog.h"
#include "timskmod.h"
/* These are opaque structures to users.
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/fcntl.h>
-#include <linux/aio.h>
#include <linux/workqueue.h>
#include <linux/kthread.h>
#include <linux/seq_file.h>
#define HOSTADDRESS unsigned long long
#endif
-/** Try to evaulate the provided expression, and do a RETINT(x) iff
- * the expression evaluates to < 0.
- */
-#define ASSERT(cond) \
- do { if (!(cond)) \
- HUHDRV("ASSERT failed - %s", \
- __stringify(cond)); \
- } while (0)
-
#define sizeofmember(TYPE, MEMBER) (sizeof(((TYPE *)0)->MEMBER))
/** "Covered quotient" function */
#define COVQ(v, d) (((v) + (d) - 1) / (d))
(void *)(p2) = SWAPPOINTERS_TEMP; \
} while (0)
-#define PRINTKDRV(fmt, args...) LOGINF(fmt, ## args)
-#define TBDDRV(fmt, args...) LOGERR(fmt, ## args)
-#define HUHDRV(fmt, args...) LOGERR(fmt, ## args)
-#define ERRDRV(fmt, args...) LOGERR(fmt, ## args)
#define WARNDRV(fmt, args...) LOGWRN(fmt, ## args)
#define SECUREDRV(fmt, args...) LOGWRN(fmt, ## args)
-#define INFODRV(fmt, args...) LOGINF(fmt, ## args)
-#define DEBUGDRV(fmt, args...) DBGINF(fmt, ## args)
#define PRINTKDEV(devname, fmt, args...) LOGINFDEV(devname, fmt, ## args)
#define TBDDEV(devname, fmt, args...) LOGERRDEV(devname, fmt, ## args)
#define SECUREDEV(devname, fmt, args...) LOGWRNDEV(devname, fmt, ## args)
#define INFODEV(devname, fmt, args...) LOGINFDEV(devname, fmt, ## args)
#define INFODEVX(devno, fmt, args...) LOGINFDEVX(devno, fmt, ## args)
-#define DEBUGDEV(devname, fmt, args...) DBGINFDEV(devname, fmt, ## args)
/** Verifies the consistency of your PRIVATEDEVICEDATA structure using
* conventional "signature" fields:
#include "linux/version.h"
#include "iochannel.h"
-#include "uniklog.h"
#include <linux/atomic.h>
#include <linux/semaphore.h>
#include <linux/uuid.h>
struct uisthread_info {
struct task_struct *task;
int id;
- int should_stop;
struct completion has_stopped;
};
struct list_head list_link; /* links into ReqHandlerInfo_list */
};
-struct req_handler_info *req_handler_add(uuid_le switch_uuid,
- const char *switch_type_name,
- int (*controlfunc)(struct io_msgs *),
- unsigned long min_channel_bytes,
- int (*svr_channel_ok)(unsigned long
- channel_bytes),
- int (*svr_channel_init)(void *x,
- unsigned char *client_str,
- u32 client_str_len, u64 bytes));
struct req_handler_info *req_handler_find(uuid_le switch_uuid);
-int req_handler_del(uuid_le switch_uuid);
#define uislib_ioremap_cache(addr, size) \
dbg_ioremap_cache(addr, size, __FILE__, __LINE__)
int uisctrl_register_req_handler(int type, void *fptr,
struct ultra_vbus_deviceinfo *chipset_driver_info);
-int uisctrl_register_req_handler_ex(uuid_le switch_guid,
- const char *switch_type_name,
- int (*fptr)(struct io_msgs *),
- unsigned long min_channel_bytes,
- int (*svr_channel_ok)(unsigned long
- channel_bytes),
- int (*svr_channel_init)(void *x,
- unsigned char *client_str,
- u32 client_str_len,
- u64 bytes),
- struct ultra_vbus_deviceinfo *chipset_driver_info);
-int uisctrl_unregister_req_handler_ex(uuid_le switch_uuid);
unsigned char *util_map_virt(struct phys_info *sg);
void util_unmap_virt(struct phys_info *sg);
unsigned char *util_map_virt_atomic(struct phys_info *sg);
(void __iomem *)guid, sizeof(uuid_le));
if (uuid_le_cmp(tmpguid, NULL_UUID_LE) != 0)
break;
- LOGERR("Waiting for non-0 GUID (why???)...\n");
UIS_THREAD_WAIT_SEC(5);
}
- LOGERR("OK... GUID is non-0 now\n");
}
-/* CopyFragsInfoFromSkb returns the number of entries added to frags array
- * Returns -1 on failure.
- */
-unsigned int uisutil_copy_fragsinfo_from_skb(unsigned char *calling_ctx,
- void *skb_in,
- unsigned int firstfraglen,
- unsigned int frags_max,
- struct phys_info frags[]);
-
static inline unsigned int
issue_vmcall_io_controlvm_addr(u64 *control_addr, u32 *control_bytes)
{
+++ /dev/null
-/* uniklog.h
- *
- * Copyright (C) 2010 - 2013 UNISYS CORPORATION
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
- * NON INFRINGEMENT. See the GNU General Public License for more
- * details.
- */
-
-/* This module contains macros to aid developers in logging messages.
- *
- * This module is affected by the DEBUG compiletime option.
- *
- */
-#ifndef __UNIKLOG_H__
-#define __UNIKLOG_H__
-
-#include <linux/printk.h>
-
-/*
- * # DBGINF
- *
- * \brief Log debug informational message - log a LOG_INFO message only
- * if DEBUG compiletime option enabled
- *
- * \param devname the device name of the device reporting this message, or
- * NULL if this message is NOT device-related.
- * \param fmt printf()-style format string containing the message to log.
- * \param args Optional arguments to be formatted and inserted into the
- * format string.
- * \return nothing
- *
- * Log a message at the LOG_INFO level, but only if DEBUG is enabled. If
- * DEBUG is disabled, this expands to a no-op.
- */
-
-/*
- * # DBGVER
- *
- * \brief Log debug verbose message - log a LOG_DEBUG message only if
- * DEBUG compiletime option enabled
- *
- * \param devname the device name of the device reporting this message, or
- * NULL if this message is NOT device-related.
- * \param fmt printf()-style format string containing the message to log.
- * \param args Optional arguments to be formatted and inserted into the
- * format string.
- * \return nothing
- *
- * Log a message at the LOG_DEBUG level, but only if DEBUG is enabled. If
- * DEBUG is disabled, this expands to a no-op. Note also that LOG_DEBUG
- * messages can be enabled/disabled at runtime as well.
- */
-#define DBGINFDEV(devname, fmt, args...) do { } while (0)
-#define DBGVERDEV(devname, fmt, args...) do { } while (0)
-#define DBGINF(fmt, args...) do { } while (0)
-#define DBGVER(fmt, args...) do { } while (0)
-
-/*
- * # LOGINF
- *
- * \brief Log informational message - logs a message at the LOG_INFO level
- *
- * \param devname the device name of the device reporting this message, or
- * NULL if this message is NOT device-related.
- * \param fmt printf()-style format string containing the message to log.
- * \param args Optional arguments to be formatted and inserted into the
- * format string.
- * \return nothing
- *
- * Logs the specified message at the LOG_INFO level.
- */
-
-#define LOGINF(fmt, args...) pr_info(fmt, ## args)
-#define LOGINFDEV(devname, fmt, args...) \
- pr_info("%s " fmt, devname, ## args)
-#define LOGINFDEVX(devno, fmt, args...) \
- pr_info("dev%d " fmt, devno, ## args)
-#define LOGINFNAME(vnic, fmt, args...) \
- do { \
- if (vnic != NULL) { \
- pr_info("%s " fmt, vnic->name, ## args); \
- } else { \
- pr_info(fmt, ## args); \
- } \
- } while (0)
-
-/*
- * # LOGVER
- *
- * \brief Log verbose message - logs a message at the LOG_DEBUG level,
- * which can be disabled at runtime
- *
- * \param devname the device name of the device reporting this message, or
- * NULL if this message is NOT device-related.
- * \param fmt printf()-style format string containing the message to log.
- * \param args Optional arguments to be formatted and inserted into the format
- * \param string.
- * \return nothing
- *
- * Logs the specified message at the LOG_DEBUG level. Note also that
- * LOG_DEBUG messages can be enabled/disabled at runtime as well.
- */
-#define LOGVER(fmt, args...) pr_debug(fmt, ## args)
-#define LOGVERDEV(devname, fmt, args...) \
- pr_debug("%s " fmt, devname, ## args)
-#define LOGVERNAME(vnic, fmt, args...) \
- do { \
- if (vnic != NULL) { \
- pr_debug("%s " fmt, vnic->name, ## args); \
- } else { \
- pr_debug(fmt, ## args); \
- } \
- } while (0)
-
-/*
- * # LOGERR
- *
- * \brief Log error message - logs a message at the LOG_ERR level,
- * including source line number information
- *
- * \param devname the device name of the device reporting this message, or
- * NULL if this message is NOT device-related.
- * \param fmt printf()-style format string containing the message to log.
- * \param args Optional arguments to be formatted and inserted into the format
- * \param string.
- * \return nothing
- *
- * Logs the specified error message at the LOG_ERR level. It will also
- * include the file, line number, and function name of where the error
- * originated in the log message.
- */
-#define LOGERR(fmt, args...) pr_err(fmt, ## args)
-#define LOGERRDEV(devname, fmt, args...) \
- pr_err("%s " fmt, devname, ## args)
-#define LOGERRDEVX(devno, fmt, args...) \
- pr_err("dev%d " fmt, devno, ## args)
-#define LOGERRNAME(vnic, fmt, args...) \
- do { \
- if (vnic != NULL) { \
- pr_err("%s " fmt, vnic->name, ## args); \
- } else { \
- pr_err(fmt, ## args); \
- } \
- } while (0)
-#define LOGORDUMPERR(seqfile, fmt, args...) do { \
- if (seqfile) { \
- seq_printf(seqfile, fmt, ## args); \
- } else { \
- LOGERR(fmt, ## args); \
- } \
- } while (0)
-
-/*
- * # LOGWRN
- *
- * \brief Log warning message - Logs a message at the LOG_WARNING level,
- * including source line number information
- *
- * \param devname the device name of the device reporting this message, or
- * NULL if this message is NOT device-related.
- * \param fmt printf()-style format string containing the message to log.
- * \param args Optional arguments to be formatted and inserted into the format
- * \param string.
- * \return nothing
- *
- * Logs the specified error message at the LOG_WARNING level. It will also
- * include the file, line number, and function name of where the error
- * originated in the log message.
- */
-#define LOGWRN(fmt, args...) pr_warn(fmt, ## args)
-#define LOGWRNDEV(devname, fmt, args...) \
- pr_warn("%s " fmt, devname, ## args)
-#define LOGWRNNAME(vnic, fmt, args...) \
- do { \
- if (vnic != NULL) { \
- pr_warn("%s " fmt, vnic->name, ## args); \
- } else { \
- pr_warn(fmt, ## args); \
- } \
- } while (0)
-
-#endif /* __UNIKLOG_H__ */
config UNISYS_UISLIB
tristate "Unisys uislib driver"
- depends on UNISYSSPAR && UNISYS_VISORCHIPSET && HAS_IOMEM
+ select UNISYS_VISORCHIPSET
---help---
If you say Y here, you will enable the Unisys uislib driver.
visoruislib-y := uislib.o uisqueue.o uisthread.o uisutils.o
ccflags-y += -Idrivers/staging/unisys/include
-ccflags-y += -Idrivers/staging/unisys/channels
ccflags-y += -Idrivers/staging/unisys/visorchipset
-ccflags-y += -Idrivers/staging/unisys/sparstopdriver
ccflags-y += -Idrivers/staging/unisys/common-spar/include
ccflags-y += -Idrivers/staging/unisys/common-spar/include/channels
#include <linux/uuid.h>
#include <linux/version.h>
-#include "uniklog.h"
#include "diagnostics/appos_subsystems.h"
#include "uisutils.h"
#include "vbuschannel.h"
{
void __iomem *ch = uislib_ioremap_cache(ch_addr, ch_bytes);
- if (!ch) {
- LOGERR("CONTROLVM_BUS_CREATE error: ioremap_cache of channelAddr:%Lx for channelBytes:%llu failed",
- (unsigned long long)ch_addr,
- (unsigned long long)ch_bytes);
+ if (!ch)
return NULL;
- }
+
if (!SPAR_VBUS_CHANNEL_OK_CLIENT(ch)) {
- ERRDRV("%s channel cannot be used", __func__);
uislib_iounmap(ch);
return NULL;
}
size_t size;
if (max_bus_count == bus_list_count) {
- LOGERR("CONTROLVM_BUS_CREATE Failed: max buses:%d already created\n",
- max_bus_count);
POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, max_bus_count,
POSTCODE_SEVERITY_ERR);
return CONTROLVM_RESP_ERROR_MAX_BUSES;
(dev_count * sizeof(struct device_info *));
bus = kzalloc(size, GFP_ATOMIC);
if (!bus) {
- LOGERR("CONTROLVM_BUS_CREATE Failed: kmalloc for bus failed.\n");
POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, bus_no,
POSTCODE_SEVERITY_ERR);
return CONTROLVM_RESP_ERROR_KMALLOC_FAILED;
/* found a bus already in the list with same bus_no -
* reject add
*/
- LOGERR("CONTROLVM_BUS_CREATE Failed: bus %d already exists.\n",
- bus->bus_no);
POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, bus->bus_no,
POSTCODE_SEVERITY_ERR);
kfree(bus);
cmd.add_vbus.bus_uuid = msg->cmd.create_bus.bus_data_type_uuid;
cmd.add_vbus.instance_uuid = msg->cmd.create_bus.bus_inst_uuid;
if (!virt_control_chan_func) {
- LOGERR("CONTROLVM_BUS_CREATE Failed: virtpci callback not registered.");
POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, bus->bus_no,
POSTCODE_SEVERITY_ERR);
kfree(bus);
return CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_FAILURE;
}
if (!virt_control_chan_func(&cmd)) {
- LOGERR("CONTROLVM_BUS_CREATE Failed: virtpci GUEST_ADD_VBUS returned error.");
POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, bus->bus_no,
POSTCODE_SEVERITY_ERR);
kfree(bus);
}
if (!bus) {
- LOGERR("CONTROLVM_BUS_DESTROY Failed: failed to find bus %d.\n",
- bus_no);
read_unlock(&bus_list_lock);
return CONTROLVM_RESP_ERROR_ALREADY_DONE;
}
/* verify that this bus has no devices. */
for (i = 0; i < bus->device_count; i++) {
- if (bus->device[i] != NULL) {
- LOGERR("CONTROLVM_BUS_DESTROY Failed: device %i attached to bus %d.",
- i, bus_no);
+ if (bus->device[i]) {
read_unlock(&bus_list_lock);
return CONTROLVM_RESP_ERROR_BUS_DEVICE_ATTACHED;
}
with this bus. */
cmd.msgtype = GUEST_DEL_VBUS;
cmd.del_vbus.bus_no = bus_no;
- if (!virt_control_chan_func) {
- LOGERR("CONTROLVM_BUS_DESTROY Failed: virtpci callback not registered.");
+ if (!virt_control_chan_func)
return CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_FAILURE;
- }
- if (!virt_control_chan_func(&cmd)) {
- LOGERR("CONTROLVM_BUS_DESTROY Failed: virtpci GUEST_DEL_VBUS returned error.");
+
+ if (!virt_control_chan_func(&cmd))
return CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_CALLBACK_ERROR;
- }
/* finally, remove the bus from the list */
remove:
dev = kzalloc(sizeof(*dev), GFP_ATOMIC);
if (!dev) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: kmalloc for dev failed.\n");
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
return CONTROLVM_RESP_ERROR_KMALLOC_FAILED;
*/
min_size = req_handler->min_channel_bytes;
if (min_size > msg->cmd.create_device.channel_bytes) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: channel size is too small, channel size:0x%lx, required size:0x%lx",
- (ulong)msg->cmd.create_device.channel_bytes,
- (ulong)min_size);
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no,
bus_no, POSTCODE_SEVERITY_ERR);
result = CONTROLVM_RESP_ERROR_CHANNEL_SIZE_TOO_SMALL;
uislib_ioremap_cache(dev->channel_addr,
msg->cmd.create_device.channel_bytes);
if (!dev->chanptr) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: ioremap_cache of channelAddr:%Lx for channelBytes:%llu failed",
- dev->channel_addr,
- msg->cmd.create_device.channel_bytes);
result = CONTROLVM_RESP_ERROR_IOREMAP_FAILED;
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no,
bus_no, POSTCODE_SEVERITY_ERR);
continue;
/* make sure the device number is valid */
if (dev_no >= bus->device_count) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: device (%d) >= deviceCount (%d).",
- dev_no, bus->device_count);
result = CONTROLVM_RESP_ERROR_MAX_DEVICES;
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no,
bus_no, POSTCODE_SEVERITY_ERR);
}
/* make sure this device is not already set */
if (bus->device[dev_no]) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: device %d is already exists.",
- dev_no);
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC,
dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
wait_for_valid_guid(&((struct channel_header __iomem *)
(dev->chanptr))->chtype);
if (!SPAR_VHBA_CHANNEL_OK_CLIENT(dev->chanptr)) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed:[CLIENT]VHBA dev %d chan invalid.",
- dev_no);
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC,
dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
wait_for_valid_guid(&((struct channel_header __iomem *)
(dev->chanptr))->chtype);
if (!SPAR_VNIC_CHANNEL_OK_CLIENT(dev->chanptr)) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: VNIC[CLIENT] dev %d chan invalid.",
- dev_no);
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC,
dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
cmd.add_vnic.instance_uuid = dev->instance_uuid;
cmd.add_vhba.intr = dev->intr;
} else {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: unknown channelTypeGuid.\n");
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no,
bus_no, POSTCODE_SEVERITY_ERR);
result = CONTROLVM_RESP_ERROR_CHANNEL_TYPE_UNKNOWN;
}
if (!virt_control_chan_func) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: virtpci callback not registered.");
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no,
bus_no, POSTCODE_SEVERITY_ERR);
result = CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_FAILURE;
}
if (!virt_control_chan_func(&cmd)) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: virtpci GUEST_ADD_[VHBA||VNIC] returned error.");
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no,
bus_no, POSTCODE_SEVERITY_ERR);
result =
}
read_unlock(&bus_list_lock);
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: failed to find bus %d.",
- bus_no);
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
result = CONTROLVM_RESP_ERROR_BUS_INVALID;
if (bus->bus_no == bus_no) {
/* make sure the device number is valid */
if (dev_no >= bus->device_count) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:pause Failed: device(%d) >= deviceCount(%d).",
- dev_no, bus->device_count);
retval = CONTROLVM_RESP_ERROR_DEVICE_INVALID;
} else {
/* make sure this device exists */
dev = bus->device[dev_no];
if (!dev) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:pause Failed: device %d does not exist.",
- dev_no);
retval =
CONTROLVM_RESP_ERROR_ALREADY_DONE;
}
break;
}
}
- if (!bus) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:pause Failed: bus %d does not exist",
- bus_no);
+ if (!bus)
retval = CONTROLVM_RESP_ERROR_BUS_INVALID;
- }
+
read_unlock(&bus_list_lock);
if (retval == CONTROLVM_RESP_SUCCESS) {
/* the msg is bound for virtpci; send
cmd.msgtype = GUEST_PAUSE_VNIC;
cmd.pause_vnic.chanptr = dev->chanptr;
} else {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:pause Failed: unknown channelTypeGuid.\n");
return CONTROLVM_RESP_ERROR_CHANNEL_TYPE_UNKNOWN;
}
- if (!virt_control_chan_func) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE Failed: virtpci callback not registered.");
+ if (!virt_control_chan_func)
return CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_FAILURE;
- }
if (!virt_control_chan_func(&cmd)) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:pause Failed: virtpci GUEST_PAUSE_[VHBA||VNIC] returned error.");
return
CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_CALLBACK_ERROR;
}
if (bus->bus_no == bus_no) {
/* make sure the device number is valid */
if (dev_no >= bus->device_count) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:resume Failed: device(%d) >= deviceCount(%d).",
- dev_no, bus->device_count);
retval = CONTROLVM_RESP_ERROR_DEVICE_INVALID;
} else {
/* make sure this device exists */
dev = bus->device[dev_no];
if (!dev) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:resume Failed: device %d does not exist.",
- dev_no);
retval =
CONTROLVM_RESP_ERROR_ALREADY_DONE;
}
}
}
- if (!bus) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:resume Failed: bus %d does not exist",
- bus_no);
+ if (!bus)
retval = CONTROLVM_RESP_ERROR_BUS_INVALID;
- }
+
read_unlock(&bus_list_lock);
/* the msg is bound for virtpci; send
* guest_msgs struct to callback
cmd.msgtype = GUEST_RESUME_VNIC;
cmd.resume_vnic.chanptr = dev->chanptr;
} else {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:resume Failed: unknown channelTypeGuid.\n");
return CONTROLVM_RESP_ERROR_CHANNEL_TYPE_UNKNOWN;
}
- if (!virt_control_chan_func) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE Failed: virtpci callback not registered.");
+ if (!virt_control_chan_func)
return CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_FAILURE;
- }
if (!virt_control_chan_func(&cmd)) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:resume Failed: virtpci GUEST_RESUME_[VHBA||VNIC] returned error.");
return
CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_CALLBACK_ERROR;
}
dev_no = msg->cmd.destroy_device.bus_no;
read_lock(&bus_list_lock);
- LOGINF("destroy_device called for bus_no=%u, dev_no=%u", bus_no,
- dev_no);
for (bus = bus_list; bus; bus = bus->next) {
if (bus->bus_no == bus_no) {
/* make sure the device number is valid */
if (dev_no >= bus->device_count) {
- LOGERR("CONTROLVM_DEVICE_DESTROY Failed: device(%d) >= device_count(%d).",
- dev_no, bus->device_count);
retval = CONTROLVM_RESP_ERROR_DEVICE_INVALID;
} else {
/* make sure this device exists */
dev = bus->device[dev_no];
if (!dev) {
- LOGERR("CONTROLVM_DEVICE_DESTROY Failed: device %d does not exist.",
- dev_no);
retval =
CONTROLVM_RESP_ERROR_ALREADY_DONE;
}
}
}
- if (!bus) {
- LOGERR("CONTROLVM_DEVICE_DESTROY Failed: bus %d does not exist",
- bus_no);
+ if (!bus)
retval = CONTROLVM_RESP_ERROR_BUS_INVALID;
- }
read_unlock(&bus_list_lock);
if (retval == CONTROLVM_RESP_SUCCESS) {
/* the msg is bound for virtpci; send
cmd.msgtype = GUEST_DEL_VNIC;
cmd.del_vnic.chanptr = dev->chanptr;
} else {
- LOGERR("CONTROLVM_DEVICE_DESTROY Failed: unknown channelTypeGuid.\n");
return
CONTROLVM_RESP_ERROR_CHANNEL_TYPE_UNKNOWN;
}
if (!virt_control_chan_func) {
- LOGERR("CONTROLVM_DEVICE_DESTROY Failed: virtpci callback not registered.");
return
CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_FAILURE;
}
if (!virt_control_chan_func(&cmd)) {
- LOGERR("CONTROLVM_DEVICE_DESTROY Failed: virtpci GUEST_DEL_[VHBA||VNIC] returned error.");
return
CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_CALLBACK_ERROR;
}
* on which accesses the channel and you will get a "unable to handle
* kernel paging request"
*/
- if (dev->polling) {
- LOGINF("calling uislib_disable_channel_interrupts");
+ if (dev->polling)
uislib_disable_channel_interrupts(bus_no, dev_no);
- }
/* unmap the channel memory for the device. */
- if (!msg->hdr.flags.test_message) {
- LOGINF("destroy_device, doing iounmap");
+ if (!msg->hdr.flags.test_message)
uislib_iounmap(dev->chanptr);
- }
kfree(dev);
bus->device[dev_no] = NULL;
}
init_msg_header(&msg, CONTROLVM_BUS_DESTROY, 0, 0);
msg.cmd.destroy_bus.bus_no = bus_no;
- if (destroy_bus(&msg, NULL) != CONTROLVM_RESP_SUCCESS) {
- LOGERR("destroy_bus failed. bus_no=0x%x\n", bus_no);
+ if (destroy_bus(&msg, NULL) != CONTROLVM_RESP_SUCCESS)
return 0;
- }
return 1;
}
init_msg_header(&msg, CONTROLVM_DEVICE_DESTROY, 0, 0);
msg.cmd.destroy_device.bus_no = bus_no;
msg.cmd.destroy_device.dev_no = dev_no;
- if (destroy_device(&msg, NULL) != CONTROLVM_RESP_SUCCESS) {
- LOGERR("destroy_device failed. bus_no=0x%x dev_no=0x%x\n",
- bus_no, dev_no);
+ if (destroy_device(&msg, NULL) != CONTROLVM_RESP_SUCCESS)
return 0;
- }
return 1;
}
{
struct controlvm_message msg;
- LOGINF("enter busNo=0x%x\n", bus_no);
/* step 0: init the chipset */
POSTCODE_LINUX_3(CHIPSET_INIT_ENTRY_PC, bus_no, POSTCODE_SEVERITY_INFO);
*/
msg.cmd.init_chipset.bus_count = 23;
msg.cmd.init_chipset.switch_count = 0;
- if (init_chipset(&msg, NULL) != CONTROLVM_RESP_SUCCESS) {
- LOGERR("init_chipset failed.\n");
+ if (init_chipset(&msg, NULL) != CONTROLVM_RESP_SUCCESS)
return 0;
- }
- LOGINF("chipset initialized\n");
POSTCODE_LINUX_3(CHIPSET_INIT_EXIT_PC, bus_no,
POSTCODE_SEVERITY_INFO);
}
msg.cmd.create_bus.channel_addr = channel_addr;
msg.cmd.create_bus.channel_bytes = n_channel_bytes;
if (create_bus(&msg, NULL) != CONTROLVM_RESP_SUCCESS) {
- LOGERR("create_bus failed.\n");
POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, bus_no,
POSTCODE_SEVERITY_ERR);
return 0;
msg.cmd.device_change_state.dev_no = dev_no;
msg.cmd.device_change_state.state = segment_state_standby;
rc = pause_device(&msg);
- if (rc != CONTROLVM_RESP_SUCCESS) {
- LOGERR("VHBA pause_device failed. busNo=0x%x devNo=0x%x\n",
- bus_no, dev_no);
+ if (rc != CONTROLVM_RESP_SUCCESS)
return rc;
- }
return 0;
}
EXPORT_SYMBOL_GPL(uislib_client_inject_pause_vhba);
msg.cmd.device_change_state.dev_no = dev_no;
msg.cmd.device_change_state.state = segment_state_running;
rc = resume_device(&msg);
- if (rc != CONTROLVM_RESP_SUCCESS) {
- LOGERR("VHBA resume_device failed. busNo=0x%x devNo=0x%x\n",
- bus_no, dev_no);
+ if (rc != CONTROLVM_RESP_SUCCESS)
return rc;
- }
return 0;
}
EXPORT_SYMBOL_GPL(uislib_client_inject_resume_vhba);
{
struct controlvm_message msg;
- LOGINF(" enter busNo=0x%x devNo=0x%x\n", bus_no, dev_no);
/* chipset init'ed with bus bus has been previously created -
* Verify it still exists step 2: create the VHBA device on the
* bus
sizeof(struct irq_info));
msg.cmd.create_device.channel_addr = phys_chan_addr;
if (chan_bytes < MIN_IO_CHANNEL_SIZE) {
- LOGERR("wrong channel size.chan_bytes = 0x%x IO_CHANNEL_SIZE= 0x%x\n",
- chan_bytes, (unsigned int)MIN_IO_CHANNEL_SIZE);
POSTCODE_LINUX_4(VHBA_CREATE_FAILURE_PC, chan_bytes,
MIN_IO_CHANNEL_SIZE, POSTCODE_SEVERITY_ERR);
return 0;
msg.cmd.create_device.channel_bytes = chan_bytes;
msg.cmd.create_device.data_type_uuid = spar_vhba_channel_protocol_uuid;
if (create_device(&msg, NULL) != CONTROLVM_RESP_SUCCESS) {
- LOGERR("VHBA create_device failed.\n");
POSTCODE_LINUX_4(VHBA_CREATE_FAILURE_PC, dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
return 0;
{
struct controlvm_message msg;
- LOGINF(" enter busNo=0x%x devNo=0x%x\n", bus_no, dev_no);
/* chipset init'ed with bus bus has been previously created -
* Verify it still exists step 2: create the VNIC device on the
* bus
sizeof(struct irq_info));
msg.cmd.create_device.channel_addr = phys_chan_addr;
if (chan_bytes < MIN_IO_CHANNEL_SIZE) {
- LOGERR("wrong channel size.chan_bytes = 0x%x IO_CHANNEL_SIZE= 0x%x\n",
- chan_bytes, (unsigned int)MIN_IO_CHANNEL_SIZE);
POSTCODE_LINUX_4(VNIC_CREATE_FAILURE_PC, chan_bytes,
MIN_IO_CHANNEL_SIZE, POSTCODE_SEVERITY_ERR);
return 0;
msg.cmd.create_device.channel_bytes = chan_bytes;
msg.cmd.create_device.data_type_uuid = spar_vnic_channel_protocol_uuid;
if (create_device(&msg, NULL) != CONTROLVM_RESP_SUCCESS) {
- LOGERR("VNIC create_device failed.\n");
POSTCODE_LINUX_4(VNIC_CREATE_FAILURE_PC, dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
return 0;
msg.cmd.device_change_state.dev_no = dev_no;
msg.cmd.device_change_state.state = segment_state_standby;
rc = pause_device(&msg);
- if (rc != CONTROLVM_RESP_SUCCESS) {
- LOGERR("VNIC pause_device failed. busNo=0x%x devNo=0x%x\n",
- bus_no, dev_no);
+ if (rc != CONTROLVM_RESP_SUCCESS)
return -1;
- }
return 0;
}
EXPORT_SYMBOL_GPL(uislib_client_inject_pause_vnic);
msg.cmd.device_change_state.dev_no = dev_no;
msg.cmd.device_change_state.state = segment_state_running;
rc = resume_device(&msg);
- if (rc != CONTROLVM_RESP_SUCCESS) {
- LOGERR("VNIC resume_device failed. busNo=0x%x devNo=0x%x\n",
- bus_no, dev_no);
+ if (rc != CONTROLVM_RESP_SUCCESS)
return -1;
- }
return 0;
}
EXPORT_SYMBOL_GPL(uislib_client_inject_resume_vnic);
*/
void *p = kmem_cache_alloc(cur_pool, GFP_ATOMIC | __GFP_NORETRY);
- if (p == NULL) {
- LOGERR("uislib_malloc failed to alloc uiscmdrsp @%s:%d",
- fn, ln);
+ if (!p)
return NULL;
- }
return p;
}
EXPORT_SYMBOL_GPL(uislib_cache_alloc);
void
uislib_cache_free(struct kmem_cache *cur_pool, void *p, char *fn, int ln)
{
- if (p == NULL) {
- LOGERR("uislib_free NULL pointer @%s:%d", fn, ln);
+ if (!p)
return;
- }
kmem_cache_free(cur_pool, p);
}
EXPORT_SYMBOL_GPL(uislib_cache_free);
int remaining_bytes = PROC_READ_BUFFER_SIZE;
/* *start = buf; */
- if (debug_buf == NULL) {
- DBGINF("debug_buf == NULL; allocating buffer.\n.");
+ if (!debug_buf) {
debug_buf = vmalloc(PROC_READ_BUFFER_SIZE);
- if (debug_buf == NULL) {
- LOGERR("failed to allocate buffer to provide proc data.\n");
+ if (!debug_buf)
return -ENOMEM;
- }
}
temp = debug_buf;
if ((*offset == 0) || (!debug_buf_valid)) {
- DBGINF("calling info_debugfs_read_helper.\n");
/* if the read fails, then -1 will be returned */
total_bytes = info_debugfs_read_helper(&temp, &remaining_bytes);
debug_buf_valid = 1;
for (bus = bus_list; bus; bus = bus->next) {
if (bus->bus_no == bus_no) {
/* make sure the device number is valid */
- if (dev_no >= bus->device_count) {
- LOGERR("%s bad bus_no, dev_no=%d,%d",
- __func__,
- (int)bus_no, (int)dev_no);
+ if (dev_no >= bus->device_count)
break;
- }
dev = bus->device[dev_no];
- if (!dev)
- LOGERR("%s bad bus_no, dev_no=%d,%d",
- __func__,
- (int)bus_no, (int)dev_no);
break;
}
}
wait_cycles = (cur_cycles - old_cycles);
}
}
- LOGINF("wait_cycles=%llu", wait_cycles);
cycles_before_wait = wait_cycles;
idle_cycles = 0;
poll_dev_start = 0;
* Reschedule work to occur as soon as
* possible. */
idle_cycles = 0;
- if (new_tail == NULL) {
+ if (!new_tail) {
dev->first_busy_cnt++;
if (!
(list_is_last
}
}
}
- if (incoming_ti.should_stop)
+ if (kthread_should_stop())
break;
}
- if (new_tail != NULL) {
+ if (new_tail) {
tot_moved_to_tail_cnt++;
list_move_tail(new_tail, &poll_dev_chan);
}
* - there is no input waiting on any of the channels
* - we have received a signal to stop this thread
*/
- if (incoming_ti.should_stop)
+ if (kthread_should_stop())
break;
- if (en_smart_wakeup == 0xFF) {
- LOGINF("en_smart_wakeup set to 0xff, to force exiting process_incoming");
+ if (en_smart_wakeup == 0xFF)
break;
- }
/* wait for POLLJIFFIES_NORMAL jiffies, or until
* someone wakes up poll_dev_wake_q,
* whichever comes first only do a wait when we have
idle_cycles = idle_cycles + delta_cycles;
}
}
- DBGINF("exiting.\n");
complete_and_exit(&incoming_ti.has_stopped, 0);
}
return TRUE;
if (!uisthread_start(&incoming_ti,
&process_incoming, NULL, "dev_incoming")) {
- LOGERR("uisthread_start initialize_incoming_thread ****FAILED");
return FALSE;
}
incoming_started = TRUE;
struct device_info *dev;
dev = find_dev(bus_no, dev_no);
- if (!dev) {
- LOGERR("%s busNo=%d, devNo=%d", __func__, (int)(bus_no),
- (int)(dev_no));
+ if (!dev)
return;
- }
+
down(&poll_dev_lock);
initialize_incoming_thread();
dev->interrupt = interrupt;
struct device_info *dev;
dev = find_dev(bus_no, dev_no);
- if (!dev) {
- LOGERR("%s busNo=%d, devNo=%d", __func__, (int)(bus_no),
- (int)(dev_no));
+ if (!dev)
return;
- }
down(&poll_dev_lock);
list_del(&dev->list_polling_device_channels);
dev->polling = FALSE;
if (!unisys_spar_platform)
return -ENODEV;
- LOGINF("MONITORAPIS");
-
- LOGINF("sizeof(struct uiscmdrsp):%lu bytes\n",
- (ulong)sizeof(struct uiscmdrsp));
- LOGINF("sizeof(struct phys_info):%lu\n",
- (ulong)sizeof(struct phys_info));
- LOGINF("sizeof(uiscmdrsp_scsi):%lu\n",
- (ulong)sizeof(struct uiscmdrsp_scsi));
- LOGINF("sizeof(uiscmdrsp_net):%lu\n",
- (ulong)sizeof(struct uiscmdrsp_net));
- LOGINF("sizeof(CONTROLVM_MESSAGE):%lu bytes\n",
- (ulong)sizeof(struct controlvm_message));
- LOGINF("sizeof(struct spar_controlvm_channel_protocol):%lu bytes\n",
- (ulong)sizeof(struct spar_controlvm_channel_protocol));
- LOGINF("sizeof(CHANNEL_HEADER):%lu bytes\n",
- (ulong)sizeof(struct channel_header));
- LOGINF("sizeof(struct spar_io_channel_protocol):%lu bytes\n",
- (ulong)sizeof(struct spar_io_channel_protocol));
- LOGINF("SIZEOF_CMDRSP:%lu bytes\n", SIZEOF_CMDRSP);
- LOGINF("SIZEOF_PROTOCOL:%lu bytes\n", SIZEOF_PROTOCOL);
-
/* initialize global pointers to NULL */
bus_list = NULL;
bus_list_count = 0;
debugfs_remove(cycles_before_wait_debugfs_read);
debugfs_remove(platformnumber_debugfs_read);
debugfs_remove(dir_debugfs);
-
- DBGINF("goodbye.\n");
}
module_init(uislib_mod_init);
while (!do_locked_client_insert(queueinfo, whichqueue, cmdrsp,
(spinlock_t *)insertlock,
channel_id)) {
- if (oktowait != OK_TO_WAIT) {
- LOGERR("****FAILED visor_signal_insert failed; cannot wait; insert aborted\n");
+ if (oktowait != OK_TO_WAIT)
return 0; /* failed to queue */
- }
+
/* try again */
- LOGERR("****FAILED visor_signal_insert failed; waiting to try again\n");
set_current_state(TASK_INTERRUPTIBLE);
schedule_timeout(msecs_to_jiffies(10));
}
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/kthread.h>
-#include "uniklog.h"
#include "uisutils.h"
#include "uisthread.h"
-#define KILL(a, b, c) kill_pid(find_vpid(a), b, c)
-
/* this is shorter than using __FILE__ (full path name) in
* debug/info/error messages
*/
uisthread_start(struct uisthread_info *thrinfo,
int (*threadfn)(void *), void *thrcontext, char *name)
{
- thrinfo->should_stop = 0;
/* used to stop the thread */
init_completion(&thrinfo->has_stopped);
- thrinfo->task = kthread_create(threadfn, thrcontext, name, NULL);
+ thrinfo->task = kthread_run(threadfn, thrcontext, name);
if (IS_ERR(thrinfo->task)) {
thrinfo->id = 0;
return 0; /* failure */
}
thrinfo->id = thrinfo->task->pid;
- wake_up_process(thrinfo->task);
- LOGINF("started thread pid:%d\n", thrinfo->id);
return 1;
}
EXPORT_SYMBOL_GPL(uisthread_start);
void
uisthread_stop(struct uisthread_info *thrinfo)
{
- int ret;
int stopped = 0;
if (thrinfo->id == 0)
return; /* thread not running */
- LOGINF("uisthread_stop stopping id:%d\n", thrinfo->id);
- thrinfo->should_stop = 1;
- ret = KILL(thrinfo->id, SIGHUP, 1);
- if (ret) {
- LOGERR("unable to signal thread %d\n", ret);
- } else {
- /* give up if the thread has NOT died in 1 minute */
- if (wait_for_completion_timeout(&thrinfo->has_stopped, 60 * HZ))
- stopped = 1;
- else
- LOGERR("timed out trying to signal thread\n");
- }
- if (stopped) {
- LOGINF("uisthread_stop stopped id:%d\n", thrinfo->id);
+ kthread_stop(thrinfo->task);
+ /* give up if the thread has NOT died in 1 minute */
+ if (wait_for_completion_timeout(&thrinfo->has_stopped, 60 * HZ))
+ stopped = 1;
+
+ if (stopped)
thrinfo->id = 0;
- }
}
EXPORT_SYMBOL_GPL(uisthread_stop);
#include <linux/uuid.h>
#include <linux/spinlock.h>
#include <linux/list.h>
-#include "uniklog.h"
#include "uisutils.h"
#include "version.h"
#include "vbushelper.h"
va_list args;
int len;
- DBGINF("buffer = 0x%p : *buffer = 0x%p.\n", buffer, *buffer);
va_start(args, format);
len = vsnprintf(*buffer, *buffer_remaining, format, args);
va_end(args);
*buffer += *buffer_remaining;
*total += *buffer_remaining;
*buffer_remaining = 0;
- LOGERR("bytes remaining is too small!\n");
return -1;
}
*buffer_remaining -= len;
uisctrl_register_req_handler(int type, void *fptr,
struct ultra_vbus_deviceinfo *chipset_driver_info)
{
- LOGINF("type = %d, fptr = 0x%p.\n", type, fptr);
-
switch (type) {
case 2:
if (fptr) {
break;
default:
- LOGERR("invalid type %d.\n", type);
return 0;
}
if (chipset_driver_info)
}
EXPORT_SYMBOL_GPL(uisctrl_register_req_handler);
-int
-uisctrl_register_req_handler_ex(uuid_le switch_uuid,
- const char *switch_type_name,
- int (*controlfunc)(struct io_msgs *),
- unsigned long min_channel_bytes,
- int (*server_channel_ok)(unsigned long channel_bytes),
- int (*server_channel_init)(void *x,
- unsigned char *client_str,
- u32 client_str_len, u64 bytes),
- struct ultra_vbus_deviceinfo *chipset_driver_info)
-{
- struct req_handler_info *req_handler;
-
- LOGINF("type=%pUL, controlfunc=0x%p.\n",
- &switch_uuid, controlfunc);
- if (!controlfunc) {
- LOGERR("%pUL: controlfunc must be supplied\n", &switch_uuid);
- return 0;
- }
- if (!server_channel_ok) {
- LOGERR("%pUL: Server_Channel_Ok must be supplied\n",
- &switch_uuid);
- return 0;
- }
- if (!server_channel_init) {
- LOGERR("%pUL: Server_Channel_Init must be supplied\n",
- &switch_uuid);
- return 0;
- }
- req_handler = req_handler_add(switch_uuid,
- switch_type_name,
- controlfunc,
- min_channel_bytes,
- server_channel_ok, server_channel_init);
- if (!req_handler) {
- LOGERR("failed to add %pUL to server list\n", &switch_uuid);
- return 0;
- }
-
- atomic_inc(&uisutils_registered_services);
- if (chipset_driver_info) {
- bus_device_info_init(chipset_driver_info, "chipset",
- "uislib", VERSION, NULL);
- return 1;
- }
-
- LOGERR("failed to register type %pUL.\n", &switch_uuid);
- return 0;
-}
-EXPORT_SYMBOL_GPL(uisctrl_register_req_handler_ex);
-
-int
-uisctrl_unregister_req_handler_ex(uuid_le switch_uuid)
-{
- LOGINF("type=%pUL.\n", &switch_uuid);
- if (req_handler_del(switch_uuid) < 0) {
- LOGERR("failed to remove %pUL from server list\n",
- &switch_uuid);
- return 0;
- }
- atomic_dec(&uisutils_registered_services);
- return 1;
-}
-EXPORT_SYMBOL_GPL(uisctrl_unregister_req_handler_ex);
-
/*
* unsigned int uisutil_copy_fragsinfo_from_skb(unsigned char *calling_ctx,
* void *skb_in,
* return value indicates number of
* entries filled in frags
*/
-unsigned int
-uisutil_copy_fragsinfo_from_skb(unsigned char *calling_ctx, void *skb_in,
- unsigned int firstfraglen,
- unsigned int frags_max,
- struct phys_info frags[])
-{
- unsigned int count = 0, ii, size, offset = 0, numfrags;
- struct sk_buff *skb = skb_in;
-
- numfrags = skb_shinfo(skb)->nr_frags;
-
- while (firstfraglen) {
- if (count == frags_max) {
- LOGERR("%s frags array too small: max:%d count:%d\n",
- calling_ctx, frags_max, count);
- return -1; /* failure */
- }
- frags[count].pi_pfn =
- page_to_pfn(virt_to_page(skb->data + offset));
- frags[count].pi_off =
- (unsigned long)(skb->data + offset) & PI_PAGE_MASK;
- size =
- min(firstfraglen,
- (unsigned int)(PI_PAGE_SIZE - frags[count].pi_off));
- /* can take smallest of firstfraglen(what's left) OR
- * bytes left in the page
- */
- frags[count].pi_len = size;
- firstfraglen -= size;
- offset += size;
- count++;
- }
- if (!numfrags)
- goto dolist;
-
- if ((count + numfrags) > frags_max) {
- LOGERR("**** FAILED %s frags array too small: max:%d count+nr_frags:%d\n",
- calling_ctx, frags_max, count + numfrags);
- return -1; /* failure */
- }
-
- for (ii = 0; ii < numfrags; ii++) {
- count = add_physinfo_entries(page_to_pfn(
- skb_frag_page(&skb_shinfo(skb)->frags[ii])),
- skb_shinfo(skb)->frags[ii].
- page_offset,
- skb_shinfo(skb)->frags[ii].
- size, count, frags_max,
- frags);
- if (count == 0) {
- LOGERR("**** FAILED to add physinfo entries\n");
- return -1; /* failure */
- }
- }
-
-dolist: if (skb_shinfo(skb)->frag_list) {
- struct sk_buff *skbinlist;
- int c;
-
- for (skbinlist = skb_shinfo(skb)->frag_list; skbinlist;
- skbinlist = skbinlist->next) {
- c = uisutil_copy_fragsinfo_from_skb("recursive",
- skbinlist,
- skbinlist->len - skbinlist->data_len,
- frags_max - count,
- &frags[count]);
- if (c == -1) {
- LOGERR("**** FAILED recursive call failed\n");
- return -1;
- }
- count += c;
- }
- }
- return count;
-}
-EXPORT_SYMBOL_GPL(uisutil_copy_fragsinfo_from_skb);
static LIST_HEAD(req_handler_info_list); /* list of struct req_handler_info */
static DEFINE_SPINLOCK(req_handler_info_list_lock);
-struct req_handler_info *
-req_handler_add(uuid_le switch_uuid,
- const char *switch_type_name,
- int (*controlfunc)(struct io_msgs *),
- unsigned long min_channel_bytes,
- int (*server_channel_ok)(unsigned long channel_bytes),
- int (*server_channel_init)
- (void *x, unsigned char *clientstr, u32 clientstr_len,
- u64 bytes))
-{
- struct req_handler_info *rc = NULL;
-
- rc = kzalloc(sizeof(*rc), GFP_ATOMIC);
- if (!rc)
- return NULL;
- rc->switch_uuid = switch_uuid;
- rc->controlfunc = controlfunc;
- rc->min_channel_bytes = min_channel_bytes;
- rc->server_channel_ok = server_channel_ok;
- rc->server_channel_init = server_channel_init;
- if (switch_type_name)
- strncpy(rc->switch_type_name, switch_type_name,
- sizeof(rc->switch_type_name) - 1);
- spin_lock(&req_handler_info_list_lock);
- list_add_tail(&rc->list_link, &req_handler_info_list);
- spin_unlock(&req_handler_info_list_lock);
-
- return rc;
-}
-
struct req_handler_info *
req_handler_find(uuid_le switch_uuid)
{
spin_unlock(&req_handler_info_list_lock);
return NULL;
}
-
-int
-req_handler_del(uuid_le switch_uuid)
-{
- struct list_head *lelt, *tmp;
- struct req_handler_info *entry = NULL;
- int rc = -1;
-
- spin_lock(&req_handler_info_list_lock);
- list_for_each_safe(lelt, tmp, &req_handler_info_list) {
- entry = list_entry(lelt, struct req_handler_info, list_link);
- if (uuid_le_cmp(entry->switch_uuid, switch_uuid) == 0) {
- list_del(lelt);
- kfree(entry);
- rc++;
- }
- }
- spin_unlock(&req_handler_info_list_lock);
- return rc;
-}
config UNISYS_VIRTHBA
tristate "Unisys virthba driver"
- depends on UNISYSSPAR && UNISYS_VISORCHIPSET && UNISYS_UISLIB && UNISYS_VIRTPCI && SCSI
+ depends on SCSI
+ select UNISYS_VISORCHIPSET
+ select UNISYS_UISLIB
+ select UNISYS_VIRTPCI
---help---
If you say Y here, you will enable the Unisys virthba driver.
ccflags-y += -Idrivers/staging/unisys/include
ccflags-y += -Idrivers/staging/unisys/uislib
-ccflags-y += -Idrivers/staging/unisys/timskmod
ccflags-y += -Idrivers/staging/unisys/visorchipset
ccflags-y += -Idrivers/staging/unisys/virtpci
ccflags-y += -Idrivers/staging/unisys/common-spar/include
* which start with an 8 digit sequence number, a colon, and then
* letters after that */
-#undef DBGINF
-
#include <linux/kernel.h>
#ifdef CONFIG_MODVERSIONS
#include <config/modversions.h>
#endif
-#include "uniklog.h"
#include "diagnostics/appos_subsystems.h"
#include "uisutils.h"
#include "uisqueue.h"
spin_lock_irqsave(&vhbainfo->privlock, flags);
insert_location = vhbainfo->nextinsert;
- while (vhbainfo->pending[insert_location].sent != NULL) {
+ while (vhbainfo->pending[insert_location].sent) {
insert_location = (insert_location + 1) % MAX_PENDING_REQUESTS;
if (insert_location == (int)vhbainfo->nextinsert) {
- LOGERR("Queue should be full. insert_location<<%d>> Unable to find open slot for pending commands.\n",
- insert_location);
spin_unlock_irqrestore(&vhbainfo->privlock, flags);
return -1;
}
int insert_location = add_scsipending_entry(vhbainfo, cmdtype, new);
while (insert_location == -1) {
- LOGERR("Failed to find empty queue slot. Waiting to try again\n");
set_current_state(TASK_INTERRUPTIBLE);
schedule_timeout(msecs_to_jiffies(10));
insert_location = add_scsipending_entry(vhbainfo, cmdtype, new);
unsigned long flags;
void *sent = NULL;
- if (del >= MAX_PENDING_REQUESTS) {
- LOGERR("Invalid queue position <<%lu>> given to delete. MAX_PENDING_REQUESTS <<%d>>\n",
- (unsigned long)del, MAX_PENDING_REQUESTS);
- } else {
+ if (del < MAX_PENDING_REQUESTS) {
spin_lock_irqsave(&vhbainfo->privlock, flags);
-
- if (vhbainfo->pending[del].sent == NULL)
- LOGERR("Deleting already cleared queue entry at <<%lu>>.\n",
- (unsigned long)del);
-
sent = vhbainfo->pending[del].sent;
vhbainfo->pending[del].cmdtype = 0;
error =
scsi_add_device(dar->shost, dar->channel, dar->id,
dar->lun);
- if (error)
- LOGERR("Failed scsi_add_device: host_no=%d[chan=%d:id=%d:lun=%d]\n",
- dar->shost->host_no, dar->channel, dar->id,
- dar->lun);
- } else
- LOGERR("Failed scsi_device_lookup:[chan=%d:id=%d:lun=%d]\n",
- dar->channel, dar->id, dar->lun);
+ }
kfree(dar);
}
dar->id = cmdrsp->disknotify.id;
dar->lun = cmdrsp->disknotify.lun;
QUEUE_DISKADDREMOVE(dar);
- } else {
- LOGERR("kmalloc failed for dar. host_no=%d[chan=%d:id=%d:lun=%d]\n",
- shost->host_no, cmdrsp->disknotify.channel,
- cmdrsp->disknotify.id, cmdrsp->disknotify.lun);
}
}
u64 mask;
unsigned long long rc1;
- if (virthbainfo == NULL)
+ if (!virthbainfo)
return IRQ_NONE;
virthbainfo->interrupts_rcvd++;
channel_header = virthbainfo->chinfo.queueinfo->chan;
struct signal_queue_header __iomem *pqhdr;
u64 mask;
- LOGVER("entering virthba_probe...\n");
- LOGVER("virtpcidev bus_no<<%d>>devNo<<%d>>", virtpcidev->bus_no,
- virtpcidev->device_no);
-
- LOGINF("entering virthba_probe...\n");
- LOGINF("virtpcidev bus_no<<%d>>devNo<<%d>>", virtpcidev->bus_no,
- virtpcidev->device_no);
POSTCODE_LINUX_2(VHBA_PROBE_ENTRY_PC, POSTCODE_SEVERITY_INFO);
/* call scsi_host_alloc to register a scsi host adapter
* instance - this virthba that has just been created is an
* initialization. The host is not published to the scsi
* midlayer until scsi_add_host is called.
*/
- DBGINF("calling scsi_host_alloc.\n");
/* arg 2 passed in length of extra space we want allocated
* with scsi_host struct for our own use scsi_host_alloc
*/
scsihost = scsi_host_alloc(&virthba_driver_template,
sizeof(struct virthba_info));
- if (scsihost == NULL)
+ if (!scsihost)
return -ENODEV;
- DBGINF("scsihost: 0x%p, scsihost->this_id: %d, host_no: %d.\n",
- scsihost, scsihost->this_id, scsihost->host_no);
-
scsihost->this_id = UIS_MAGIC_VHBA;
/* linux treats max-channel differently than max-id & max-lun.
* In the latter cases, those two values result in 0 to max-1
* scan is 0 to max (inclusive); so we will subtract one from
* the max-channel value.
*/
- LOGINF("virtpcidev->scsi.max.max_channel=%u, max_id=%u, max_lun=%u, cmd_per_lun=%u, max_io_size=%u\n",
- (unsigned)virtpcidev->scsi.max.max_channel - 1,
- (unsigned)virtpcidev->scsi.max.max_id,
- (unsigned)virtpcidev->scsi.max.max_lun,
- (unsigned)virtpcidev->scsi.max.cmd_per_lun,
- (unsigned)virtpcidev->scsi.max.max_io_size);
scsihost->max_channel = (unsigned)virtpcidev->scsi.max.max_channel;
scsihost->max_id = (unsigned)virtpcidev->scsi.max.max_id;
scsihost->max_lun = (unsigned)virtpcidev->scsi.max.max_lun;
(unsigned short)(virtpcidev->scsi.max.max_io_size / PAGE_SIZE);
if (scsihost->sg_tablesize > MAX_PHYS_INFO)
scsihost->sg_tablesize = MAX_PHYS_INFO;
- LOGINF("scsihost->max_channel=%u, max_id=%u, max_lun=%llu, cmd_per_lun=%u, max_sectors=%hu, sg_tablesize=%hu\n",
- scsihost->max_channel, scsihost->max_id, scsihost->max_lun,
- scsihost->cmd_per_lun, scsihost->max_sectors,
- scsihost->sg_tablesize);
- LOGINF("scsihost->can_queue=%u, scsihost->cmd_per_lun=%u, max_sectors=%hu, sg_tablesize=%hu\n",
- scsihost->can_queue, scsihost->cmd_per_lun, scsihost->max_sectors,
- scsihost->sg_tablesize);
-
- DBGINF("calling scsi_add_host\n");
/* this creates "host%d" in sysfs. If 2nd argument is NULL,
* then this generic /sys/devices/platform/host? device is
*/
error = scsi_add_host(scsihost, &virtpcidev->generic_dev);
if (error) {
- LOGERR("scsi_add_host ****FAILED 0x%x TBD - RECOVER\n", error);
POSTCODE_LINUX_2(VHBA_PROBE_FAILURE_PC, POSTCODE_SEVERITY_ERR);
/* decr refcount on scsihost which was incremented by
* scsi_add_host so the scsi_host gets deleted
virthbainfo = (struct virthba_info *)scsihost->hostdata;
memset(virthbainfo, 0, sizeof(struct virthba_info));
for (i = 0; i < VIRTHBASOPENMAX; i++) {
- if (virthbas_open[i].virthbainfo == NULL) {
+ if (!virthbas_open[i].virthbainfo) {
virthbas_open[i].virthbainfo = virthbainfo;
break;
}
virthbainfo->virtpcidev = virtpcidev;
spin_lock_init(&virthbainfo->chinfo.insertlock);
- DBGINF("generic_dev: 0x%p, queueinfo: 0x%p.\n",
- &virtpcidev->generic_dev, &virtpcidev->queueinfo);
-
init_waitqueue_head(&virthbainfo->rsp_queue);
spin_lock_init(&virthbainfo->privlock);
memset(&virthbainfo->pending, 0, sizeof(virthbainfo->pending));
ULTRA_IO_CHANNEL_IS_POLLING,
&virthbainfo->chinfo.queueinfo->chan->features);
/* start thread that will receive scsicmnd responses */
- DBGINF("starting rsp thread -- queueinfo: 0x%p, threadinfo: 0x%p.\n",
- virthbainfo->chinfo.queueinfo, &virthbainfo->chinfo.threadinfo);
channel_header = virthbainfo->chinfo.queueinfo->chan;
pqhdr = (struct signal_queue_header __iomem *)
if (!uisthread_start(&virthbainfo->chinfo.threadinfo,
process_incoming_rsps,
virthbainfo, "vhba_incoming")) {
- LOGERR("uisthread_start rsp ****FAILED\n");
/* decr refcount on scsihost which was incremented by
* scsi_add_host so the scsi_host gets deleted
*/
scsi_host_put(scsihost);
return -ENODEV;
}
- LOGINF("sendInterruptHandle=0x%16llX",
- virthbainfo->intr.send_irq_handle);
- LOGINF("recvInterruptHandle=0x%16llX",
- virthbainfo->intr.recv_irq_handle);
- LOGINF("recvInterruptVector=0x%8X",
- virthbainfo->intr.recv_irq_vector);
- LOGINF("recvInterruptShared=0x%2X",
- virthbainfo->intr.recv_irq_shared);
- LOGINF("scsihost.hostt->name=%s", scsihost->hostt->name);
virthbainfo->interrupt_vector =
virthbainfo->intr.recv_irq_handle & INTERRUPT_VECTOR_MASK;
rsp = request_irq(virthbainfo->interrupt_vector, handler, IRQF_SHARED,
scsihost->hostt->name, virthbainfo);
if (rsp != 0) {
- LOGERR("request_irq(%d) uislib_virthba_ISR request failed with rsp=%d\n",
- virthbainfo->interrupt_vector, rsp);
virthbainfo->interrupt_vector = -1;
POSTCODE_LINUX_2(VHBA_PROBE_FAILURE_PC, POSTCODE_SEVERITY_ERR);
} else {
- u64 __iomem *Features_addr =
+ u64 __iomem *features_addr =
&virthbainfo->chinfo.queueinfo->chan->features;
- LOGERR("request_irq(%d) uislib_virthba_ISR request succeeded\n",
- virthbainfo->interrupt_vector);
mask = ~(ULTRA_IO_CHANNEL_IS_POLLING |
ULTRA_IO_DRIVER_DISABLES_INTS);
- uisqueue_interlocked_and(Features_addr, mask);
+ uisqueue_interlocked_and(features_addr, mask);
mask = ULTRA_IO_DRIVER_ENABLES_INTS;
- uisqueue_interlocked_or(Features_addr, mask);
+ uisqueue_interlocked_or(features_addr, mask);
rsltq_wait_usecs = 4000000;
}
- DBGINF("calling scsi_scan_host.\n");
scsi_scan_host(scsihost);
- DBGINF("return from scsi_scan_host.\n");
- LOGINF("virthba added scsihost:0x%p\n", scsihost);
POSTCODE_LINUX_2(VHBA_PROBE_EXIT_PC, POSTCODE_SEVERITY_INFO);
return 0;
}
struct Scsi_Host *scsihost =
(struct Scsi_Host *)virtpcidev->scsi.scsihost;
- LOGINF("virtpcidev bus_no<<%d>>devNo<<%d>>", virtpcidev->bus_no,
- virtpcidev->device_no);
virthbainfo = (struct virthba_info *)scsihost->hostdata;
if (virthbainfo->interrupt_vector != -1)
free_irq(virthbainfo->interrupt_vector, virthbainfo);
- LOGINF("Removing virtpcidev: 0x%p, virthbainfo: 0x%p\n", virtpcidev,
- virthbainfo);
- DBGINF("removing scsihost: 0x%p, scsihost->this_id: %d\n", scsihost,
- scsihost->this_id);
scsi_remove_host(scsihost);
- DBGINF("stopping thread.\n");
uisthread_stop(&virthbainfo->chinfo.threadinfo);
- DBGINF("calling scsi_host_put\n");
-
/* decr refcount on scsihost which was incremented by
* scsi_add_host so the scsi_host gets deleted
*/
scsi_host_put(scsihost);
- LOGINF("virthba removed scsi_host.\n");
}
static int
int notifyresult = 0xffff;
wait_queue_head_t notifyevent;
- LOGINF("vDiskMgmt:%d %d:%d:%d\n", vdiskcmdtype,
- vdest->channel, vdest->id, vdest->lun);
-
- if (virthbainfo->serverdown || virthbainfo->serverchangingstate) {
- DBGINF("Server is down/changing state. Returning Failure.\n");
+ if (virthbainfo->serverdown || virthbainfo->serverchangingstate)
return FAILED;
- }
cmdrsp = kzalloc(SIZEOF_CMDRSP, GFP_ATOMIC);
- if (cmdrsp == NULL) {
- LOGERR("kmalloc of cmdrsp failed.\n");
- return FAILED; /* reject */
- }
+ if (!cmdrsp)
+ return FAILED; /* reject */
init_waitqueue_head(¬ifyevent);
&virthbainfo->chinfo.insertlock,
DONT_ISSUE_INTERRUPT, (u64)NULL,
OK_TO_WAIT, "vhba");
- LOGINF("VdiskMgmt waiting on event notifyevent=0x%p\n",
- cmdrsp->scsitaskmgmt.notify);
wait_event(notifyevent, notifyresult != 0xffff);
- LOGINF("VdiskMgmt complete; result:%d\n", cmdrsp->vdiskmgmt.result);
kfree(cmdrsp);
return SUCCESS;
}
int notifyresult = 0xffff;
wait_queue_head_t notifyevent;
- LOGINF("TaskMgmt:%d %d:%d:%llu\n", tasktype,
- scsidev->channel, scsidev->id, scsidev->lun);
-
- if (virthbainfo->serverdown || virthbainfo->serverchangingstate) {
- DBGINF("Server is down/changing state. Returning Failure.\n");
+ if (virthbainfo->serverdown || virthbainfo->serverchangingstate)
return FAILED;
- }
cmdrsp = kzalloc(SIZEOF_CMDRSP, GFP_ATOMIC);
- if (cmdrsp == NULL) {
- LOGERR("kmalloc of cmdrsp failed.\n");
+ if (!cmdrsp)
return FAILED; /* reject */
- }
init_waitqueue_head(¬ifyevent);
&virthbainfo->chinfo.insertlock,
DONT_ISSUE_INTERRUPT, (u64)NULL,
OK_TO_WAIT, "vhba");
- LOGINF("TaskMgmt waiting on event notifyevent=0x%p\n",
- cmdrsp->scsitaskmgmt.notify);
wait_event(notifyevent, notifyresult != 0xffff);
- LOGINF("TaskMgmt complete; result:%d\n", cmdrsp->scsitaskmgmt.result);
kfree(cmdrsp);
return SUCCESS;
}
virthba_host_reset_handler(struct scsi_cmnd *scsicmd)
{
/* issue TASK_MGMT_TARGET_RESET for each target on each bus for host */
- LOGERR("virthba_host_reset_handler Not yet implemented\n");
return SUCCESS;
}
static int
virthba_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
{
- DBGINF("In virthba_ioctl: ioctl: cmd=0x%x\n", cmd);
return -EINVAL;
}
struct scatterlist *sgl = NULL;
int sg_failed = 0;
- if (virthbainfo->serverdown || virthbainfo->serverchangingstate) {
- DBGINF("Server is down/changing state. Returning SCSI_MLQUEUE_DEVICE_BUSY.\n");
+ if (virthbainfo->serverdown || virthbainfo->serverchangingstate)
return SCSI_MLQUEUE_DEVICE_BUSY;
- }
-
cmdrsp = kzalloc(SIZEOF_CMDRSP, GFP_ATOMIC);
- if (cmdrsp == NULL) {
- LOGERR("kmalloc of cmdrsp failed.\n");
+ if (!cmdrsp)
return 1; /* reject the command */
- }
/* now saving everything we need from scsi_cmd into cmdrsp
* before we queue cmdrsp set type to command - as opposed to
if (insert_location != -1) {
cmdrsp->scsi.scsicmd = (void *)(uintptr_t)insert_location;
} else {
- LOGERR("Queue is full. Returning busy.\n");
kfree(cmdrsp);
return SCSI_MLQUEUE_DEVICE_BUSY;
}
max_buff_len = cmdrsp->scsi.bufflen;
if (scsi_sg_count(scsicmd) > MAX_PHYS_INFO) {
- LOGERR("scsicmd use_sg:%d greater than MAX:%d\n",
- scsi_sg_count(scsicmd), MAX_PHYS_INFO);
del_scsipending_entry(virthbainfo, (uintptr_t)insert_location);
kfree(cmdrsp);
return 1; /* reject the command */
/* convert buffer to phys information */
if (scsi_sg_count(scsicmd) == 0) {
if (scsi_bufflen(scsicmd) > 0) {
- LOGERR("**** FAILED No scatter list for bufflen > 0\n");
BUG_ON(scsi_sg_count(scsicmd) == 0);
}
- DBGINF("No sg; buffer:0x%p bufflen:%d\n",
- scsi_sglist(scsicmd), scsi_bufflen(scsicmd));
} else {
/* buffer is scatterlist - copy it out */
sgl = scsi_sglist(scsicmd);
for_each_sg(sgl, sg, scsi_sg_count(scsicmd), i) {
cmdrsp->scsi.gpi_list[i].address = sg_phys(sg);
cmdrsp->scsi.gpi_list[i].length = sg->length;
- if ((i != 0) && (sg->offset != 0))
- LOGINF("Offset on a sg_entry other than zero =<<%d>>.\n",
- sg->offset);
}
if (sg_failed) {
- LOGERR("Start sg_list dump (entries %d, bufflen %d)...\n",
- scsi_sg_count(scsicmd), cmdrsp->scsi.bufflen);
- for_each_sg(sgl, sg, scsi_sg_count(scsicmd), i) {
- LOGERR(" Entry(%d): page->[0x%p], phys->[0x%Lx], off(%d), len(%d)\n",
- i, sg_page(sg),
- (unsigned long long)sg_phys(sg),
- sg->offset, sg->length);
- }
- LOGERR("Done sg_list dump.\n");
/* BUG(); ***** For now, let it fail in uissd
* if it is a problem, as it might just
* work
(u64)NULL, DONT_WAIT, "vhba");
if (i == 0) {
/* queue must be full - and we said don't wait - return busy */
- LOGERR("uisqueue_put_cmdrsp_with_lock ****FAILED\n");
kfree(cmdrsp);
del_scsipending_entry(virthbainfo, (uintptr_t)insert_location);
return SCSI_MLQUEUE_DEVICE_BUSY;
struct Scsi_Host *scsihost = (struct Scsi_Host *)scsidev->host;
virthbainfo = (struct virthba_info *)scsihost->hostdata;
- if (!virthbainfo) {
- LOGERR("Could not find virthba_info for scsihost\n");
+ if (!virthbainfo)
return 0; /* even though we errored, treat as success */
- }
+
for (vdisk = &virthbainfo->head; vdisk->next; vdisk = vdisk->next) {
if (vdisk->next->valid &&
(vdisk->next->channel == scsidev->channel) &&
return 0;
}
tmpvdisk = kzalloc(sizeof(*tmpvdisk), GFP_ATOMIC);
- if (!tmpvdisk) { /* error allocating */
- LOGERR("Could not allocate memory for disk\n");
+ if (!tmpvdisk)
return 0;
- }
tmpvdisk->channel = scsidev->channel;
tmpvdisk->id = scsidev->id;
struct Scsi_Host *scsihost = (struct Scsi_Host *)scsidev->host;
virthbainfo = (struct virthba_info *)scsihost->hostdata;
- if (!virthbainfo)
- LOGERR("Could not find virthba_info for scsihost\n");
for (vdisk = &virthbainfo->head; vdisk->next; vdisk = vdisk->next) {
if (vdisk->next->valid &&
(vdisk->next->channel == scsidev->channel) &&
if (atomic_read(&vdisk->error_count) < VIRTHBA_ERROR_COUNT) {
atomic_inc(&vdisk->error_count);
- LOGERR("SCSICMD ****FAILED scsicmd:0x%p op:0x%x <%d:%d:%d:%llu> 0x%x-0x%x-0x%x-0x%x-0x%x.\n",
- scsicmd, cmdrsp->scsi.cmnd[0],
- scsidev->host->host_no, scsidev->id,
- scsidev->channel, scsidev->lun,
- cmdrsp->scsi.linuxstat, sd->valid, sd->sense_key,
- sd->additional_sense_code,
- sd->additional_sense_code_qualifier);
- if (atomic_read(&vdisk->error_count) ==
- VIRTHBA_ERROR_COUNT) {
- LOGERR("Throtling SCSICMD errors disk <%d:%d:%d:%llu>\n",
- scsidev->host->host_no, scsidev->id,
- scsidev->channel, scsidev->lun);
- }
atomic_set(&vdisk->ios_threshold, IOS_ERROR_THRESHOLD);
}
}
if (scsi_sg_count(scsicmd) == 0) {
if (scsi_bufflen(scsicmd) > 0) {
- LOGERR("**** FAILED No scatter list for bufflen > 0\n");
BUG_ON(scsi_sg_count(scsicmd) ==
0);
}
sg = scsi_sglist(scsicmd);
for (i = 0; i < scsi_sg_count(scsicmd); i++) {
- DBGVER("copying OUT OF buf into 0x%p %d\n",
- sg_page(sg + i), sg[i].length);
thispage_orig = kmap_atomic(sg_page(sg + i));
thispage = (void *)((unsigned long)thispage_orig |
sg[i].offset);
if (atomic_read(&vdisk->ios_threshold) > 0) {
atomic_dec(&vdisk->ios_threshold);
if (atomic_read(&vdisk->ios_threshold) == 0) {
- LOGERR("Resetting error count for disk\n");
atomic_set(&vdisk->error_count, 0);
}
}
static void
complete_scsi_command(struct uiscmdrsp *cmdrsp, struct scsi_cmnd *scsicmd)
{
- DBGINF("cmdrsp: 0x%p, scsistat:0x%x.\n", cmdrsp, cmdrsp->scsi.scsistat);
-
/* take what we need out of cmdrsp and complete the scsicmd */
scsicmd->result = cmdrsp->scsi.linuxstat;
if (cmdrsp->scsi.linuxstat)
else
do_scsi_nolinuxstat(cmdrsp, scsicmd);
- if (scsicmd->scsi_done) {
- DBGVER("Scsi_DONE\n");
+ if (scsicmd->scsi_done)
scsicmd->scsi_done(scsicmd);
- }
}
static inline void
/* wake up the error handler that is waiting for this */
*(int *)cmdrsp->vdiskmgmt.notifyresult = cmdrsp->vdiskmgmt.result;
wake_up_all((wait_queue_head_t *)cmdrsp->vdiskmgmt.notify);
- LOGINF("set notify result to %d\n", cmdrsp->vdiskmgmt.result);
}
static inline void
*(int *)cmdrsp->scsitaskmgmt.notifyresult =
cmdrsp->scsitaskmgmt.result;
wake_up_all((wait_queue_head_t *)cmdrsp->scsitaskmgmt.notify);
- LOGINF("set notify result to %d\n", cmdrsp->scsitaskmgmt.result);
}
static void
cmdrsp->vdiskmgmt.scsicmd))
break;
complete_vdiskmgmt_command(cmdrsp);
- } else
- LOGERR("Invalid cmdtype %d\n", cmdrsp->cmdtype);
+ }
/* cmdrsp is now available for reuse */
}
}
UIS_DAEMONIZE("vhba_incoming");
/* alloc once and reuse */
cmdrsp = kmalloc(SZ, GFP_ATOMIC);
- if (cmdrsp == NULL) {
- LOGERR("process_incoming_rsps ****FAILED to malloc - thread exiting\n");
+ if (!cmdrsp) {
complete_and_exit(&dc->threadinfo.has_stopped, 0);
return 0;
}
mask = ULTRA_CHANNEL_ENABLE_INTS;
while (1) {
+ if (kthread_should_stop())
+ break;
wait_event_interruptible_timeout(virthbainfo->rsp_queue,
(atomic_read(&virthbainfo->interrupt_rcvd) == 1),
usecs_to_jiffies(rsltq_wait_usecs));
/* drain queue */
drain_queue(virthbainfo, dc, cmdrsp);
rc1 = uisqueue_interlocked_or(virthbainfo->flags_addr, mask);
- if (dc->threadinfo.should_stop)
- break;
}
kfree(cmdrsp);
- DBGINF("exiting processing incoming rsps.\n");
complete_and_exit(&dc->threadinfo.has_stopped, 0);
}
return -ENOMEM;
for (i = 0; i < VIRTHBASOPENMAX; i++) {
- if (virthbas_open[i].virthbainfo == NULL)
+ if (!virthbas_open[i].virthbainfo)
continue;
virthbainfo = virthbas_open[i].virthbainfo;
return -EINVAL;
buf[count] = '\0';
- if (copy_from_user(buf, buffer, count)) {
- LOGERR("copy_from_user failed. buf<<%.*s>> count<<%lu>>\n",
- (int)count, buf, count);
+ if (copy_from_user(buf, buffer, count))
return -EFAULT;
- }
i = kstrtoint(buf, 10, &new_value);
- if (i != 0) {
- LOGERR("Failed to scan value for enable_ints, buf<<%.*s>>",
- (int)count, buf);
+ if (i != 0)
return -EFAULT;
- }
/* set all counts to new_value usually 0 */
for (i = 0; i < VIRTHBASOPENMAX; i++) {
- if (virthbas_open[i].virthbainfo != NULL) {
+ if (virthbas_open[i].virthbainfo) {
virthbainfo = virthbas_open[i].virthbainfo;
features_addr =
&virthbainfo->chinfo.queueinfo->chan->features;
(struct virthba_info *)((struct Scsi_Host *)virtpcidev->scsi.
scsihost)->hostdata;
- DBGINF("virtpcidev bus_no<<%d>>devNo<<%d>>", virtpcidev->bus_no,
- virtpcidev->device_no);
-
- if (!virthbainfo->serverdown) {
- DBGINF("Server up message received while server is already up.\n");
+ if (!virthbainfo->serverdown)
return 1;
- }
- if (virthbainfo->serverchangingstate) {
- LOGERR("Server already processing change state message\n");
+
+ if (virthbainfo->serverchangingstate)
return 0;
- }
virthbainfo->serverchangingstate = true;
/* Must transition channel to ATTACHED state BEFORE we
if (!uisthread_start(&virthbainfo->chinfo.threadinfo,
process_incoming_rsps,
virthbainfo, "vhba_incoming")) {
- LOGERR("uisthread_start rsp ****FAILED\n");
return 0;
}
virthbainfo->serverdown = false;
switch (pendingdel->cmdtype) {
case CMD_SCSI_TYPE:
scsicmd = (struct scsi_cmnd *)pendingdel->sent;
- scsicmd->result = (DID_RESET << 16);
+ scsicmd->result = DID_RESET << 16;
if (scsicmd->scsi_done)
scsicmd->scsi_done(scsicmd);
break;
case CMD_SCSITASKMGMT_TYPE:
cmdrsp = (struct uiscmdrsp *)pendingdel->sent;
- DBGINF("cmdrsp=0x%x, notify=0x%x\n", cmdrsp,
- cmdrsp->scsitaskmgmt.notify);
- *(int *)cmdrsp->scsitaskmgmt.notifyresult =
- TASK_MGMT_FAILED;
wake_up_all((wait_queue_head_t *)
cmdrsp->scsitaskmgmt.notify);
+ *(int *)cmdrsp->scsitaskmgmt.notifyresult =
+ TASK_MGMT_FAILED;
break;
case CMD_VDISKMGMT_TYPE:
cmdrsp = (struct uiscmdrsp *)pendingdel->sent;
cmdrsp->vdiskmgmt.notify);
break;
default:
- if (pendingdel->sent != NULL)
- LOGERR("Unknown command type: 0x%x. Only freeing list structure.\n",
- pendingdel->cmdtype);
+ break;
}
pendingdel->cmdtype = 0;
pendingdel->sent = NULL;
virtpcidev = virthbainfo->virtpcidev;
- DBGINF("virtpcidev bus_no<<%d>>devNo<<%d>>", virtpcidev->bus_no,
- virtpcidev->device_no);
virthbainfo->serverdown = true;
virthbainfo->serverchangingstate = false;
/* Return the ServerDown response to Command */
(struct virthba_info *)((struct Scsi_Host *)virtpcidev->scsi.
scsihost)->hostdata;
- DBGINF("virthba_serverdown");
- DBGINF("virtpcidev bus_no<<%d>>devNo<<%d>>", virtpcidev->bus_no,
- virtpcidev->device_no);
-
if (!virthbainfo->serverdown && !virthbainfo->serverchangingstate) {
virthbainfo->serverchangingstate = true;
queue_work(virthba_serverdown_workqueue,
&virthbainfo->serverdown_completion);
} else if (virthbainfo->serverchangingstate) {
- LOGERR("Server already processing change state message\n");
stat = 0;
- } else {
- LOGERR("Server already down, but another server down message received.");
}
return stat;
static int __init
virthba_parse_line(char *str)
{
- DBGINF("In virthba_parse_line %s\n", str);
return 1;
}
char *next = line;
POSTCODE_LINUX_2(VHBA_CREATE_ENTRY_PC, POSTCODE_SEVERITY_INFO);
- if (line == NULL || !*line)
+ if (!line || !*line)
return;
- while ((line = next) != NULL) {
+ while ((line = next)) {
next = strchr(line, ' ');
- if (next != NULL)
+ if (next)
*next++ = 0;
- if (!virthba_parse_line(line))
- DBGINF("Unknown option '%s'\n", line);
+ virthba_parse_line(line);
}
POSTCODE_LINUX_2(VHBA_CREATE_EXIT_PC, POSTCODE_SEVERITY_INFO);
if (!unisys_spar_platform)
return -ENODEV;
- LOGINF("Entering virthba_mod_init...\n");
-
POSTCODE_LINUX_2(VHBA_CREATE_ENTRY_PC, POSTCODE_SEVERITY_INFO);
virthba_parse_options(virthba_options);
error = virtpci_register_driver(&virthba_driver);
if (error < 0) {
- LOGERR("register ****FAILED 0x%x\n", error);
POSTCODE_LINUX_3(VHBA_CREATE_FAILURE_PC, error,
POSTCODE_SEVERITY_ERR);
} else {
/* Initialize the serverdown workqueue */
virthba_serverdown_workqueue =
create_singlethread_workqueue("virthba_serverdown");
- if (virthba_serverdown_workqueue == NULL) {
- LOGERR("**** FAILED virthba_serverdown_workqueue creation\n");
+ if (!virthba_serverdown_workqueue) {
POSTCODE_LINUX_2(VHBA_CREATE_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
error = -1;
}
POSTCODE_LINUX_2(VHBA_CREATE_EXIT_PC, POSTCODE_SEVERITY_INFO);
- LOGINF("Leaving virthba_mod_init\n");
return error;
}
static void __exit
virthba_mod_exit(void)
{
- LOGINF("entering virthba_mod_exit...\n");
-
virtpci_unregister_driver(&virthba_driver);
/* unregister is going to call virthba_remove */
/* destroy serverdown completion workqueue */
}
debugfs_remove_recursive(virthba_debugfs_dir);
- LOGINF("Leaving virthba_mod_exit\n");
}
/* specify function to be run at module insertion time */
config UNISYS_VIRTPCI
tristate "Unisys virtpci driver"
- depends on UNISYSSPAR && UNISYS_UISLIB
+ select UNISYS_UISLIB
---help---
If you say Y here, you will enable the Unisys virtpci driver.
#ifdef CONFIG_MODVERSIONS
#include <config/modversions.h>
#endif
-#include "uniklog.h"
#include "diagnostics/appos_subsystems.h"
#include "uisutils.h"
#include "vbuschannel.h"
{
int off;
- if (!chan) {
- LOGERR("vbus channel not present");
+ if (!chan)
return -1;
- }
+
off = sizeof(struct channel_header) + chan->hdr_info.chp_info_offset;
if (chan->hdr_info.chp_info_offset == 0) {
- LOGERR("vbus channel not used, because chp_info_offset == 0");
return -1;
}
memcpy(((u8 *)(chan)) + off, info, sizeof(*info));
{
int off;
- if (!chan) {
- LOGERR("vbus channel not present");
+ if (!chan)
return -1;
- }
+
off = sizeof(struct channel_header) + chan->hdr_info.bus_info_offset;
- if (chan->hdr_info.bus_info_offset == 0) {
- LOGERR("vbus channel not used, because bus_info_offset == 0");
+ if (chan->hdr_info.bus_info_offset == 0)
return -1;
- }
memcpy(((u8 *)(chan)) + off, info, sizeof(*info));
return 0;
}
{
int off;
- if (!chan) {
- LOGERR("vbus channel not present");
+ if (!chan)
return -1;
- }
+
off =
(sizeof(struct channel_header) +
chan->hdr_info.dev_info_offset) +
(chan->hdr_info.device_info_struct_bytes * devix);
- if (chan->hdr_info.dev_info_offset == 0) {
- LOGERR("vbus channel not used, because dev_info_offset == 0");
+ if (chan->hdr_info.dev_info_offset == 0)
return -1;
- }
+
memcpy(((u8 *)(chan)) + off, info, sizeof(*info));
return 0;
}
*/
ret = device_register(vbus);
if (ret) {
- LOGERR("device_register FAILED:%d\n", ret);
POSTCODE_LINUX_2(VPCI_CREATE_FAILURE_PC, POSTCODE_SEVERITY_ERR);
return 0;
}
&chipset_driver_info);
write_vbus_bus_info(vbus->platform_data /* chanptr */,
&bus_driver_info);
- LOGINF("Added vbus %d; device %s created successfully\n",
- addparams->bus_no, BUS_ID(vbus));
POSTCODE_LINUX_2(VPCI_CREATE_EXIT_PC, POSTCODE_SEVERITY_INFO);
return 1;
}
POSTCODE_LINUX_2(VPCI_CREATE_ENTRY_PC, POSTCODE_SEVERITY_INFO);
if (!WAIT_FOR_IO_CHANNEL
((struct spar_io_channel_protocol __iomem *)addparams->chanptr)) {
- LOGERR("Timed out. Channel not ready\n");
POSTCODE_LINUX_2(VPCI_CREATE_FAILURE_PC, POSTCODE_SEVERITY_ERR);
return 0;
}
sprintf(busid, "vbus%d", addparams->bus_no);
vbus = bus_find_device(&virtpci_bus_type, NULL,
(void *)busid, match_busid);
- if (!vbus) {
- LOGERR("**** FAILED to find vbus %s\n", busid);
+ if (!vbus)
return 0;
- }
- LOGINF("Adding vhba wwnn:%x:%x config:%d-%d-%d-%d chanptr:%p\n",
- scsi.wwnn.wwnn1, scsi.wwnn.wwnn2,
- scsi.max.max_channel, scsi.max.max_id, scsi.max.max_lun,
- scsi.max.cmd_per_lun, addparams->chanptr);
i = virtpci_device_add(vbus, VIRTHBA_TYPE, addparams, &scsi, NULL);
if (i) {
- LOGINF("Added vhba wwnn:%x:%x chanptr:%p\n", scsi.wwnn.wwnn1,
- scsi.wwnn.wwnn2, addparams->chanptr);
POSTCODE_LINUX_3(VPCI_CREATE_EXIT_PC, i,
POSTCODE_SEVERITY_INFO);
}
POSTCODE_LINUX_2(VPCI_CREATE_ENTRY_PC, POSTCODE_SEVERITY_INFO);
if (!WAIT_FOR_IO_CHANNEL
((struct spar_io_channel_protocol __iomem *)addparams->chanptr)) {
- LOGERR("Timed out, channel not ready\n");
POSTCODE_LINUX_2(VPCI_CREATE_FAILURE_PC, POSTCODE_SEVERITY_ERR);
return 0;
}
sprintf(busid, "vbus%d", addparams->bus_no);
vbus = bus_find_device(&virtpci_bus_type, NULL,
(void *)busid, match_busid);
- if (!vbus) {
- LOGERR("**** FAILED to find vbus %s\n", busid);
+ if (!vbus)
return 0;
- }
- LOGINF("Adding vnic macaddr:%02x:%02x:%02x:%02x:%02x:%02x rcvbufs:%d mtu:%d chanptr:%p%pUL\n",
- net.mac_addr[0], net.mac_addr[1], net.mac_addr[2],
- net.mac_addr[3], net.mac_addr[4], net.mac_addr[5],
- net.num_rcv_bufs, net.mtu, addparams->chanptr, &net.zone_uuid);
i = virtpci_device_add(vbus, VIRTNIC_TYPE, addparams, NULL, &net);
if (i) {
- LOGINF("Added vnic macaddr:%02x:%02x:%02x:%02x:%02x:%02x\n",
- net.mac_addr[0], net.mac_addr[1], net.mac_addr[2],
- net.mac_addr[3], net.mac_addr[4], net.mac_addr[5]);
POSTCODE_LINUX_3(VPCI_CREATE_EXIT_PC, i,
POSTCODE_SEVERITY_INFO);
return 1;
sprintf(busid, "vbus%d", delparams->bus_no);
vbus = bus_find_device(&virtpci_bus_type, NULL,
(void *)busid, match_busid);
- if (!vbus) {
- LOGERR("**** FAILED to find vbus %s\n", busid);
+ if (!vbus)
return 0;
- }
/* ensure that bus has no devices? -- TBD */
- LOGINF("Deleting %s\n", BUS_ID(vbus));
- if (delete_vbus_device(vbus, NULL))
- return 0; /* failure */
- LOGINF("Deleted vbus %d\n", delparams->bus_no);
return 1;
}
static int
delete_vbus_device(struct device *vbus, void *data)
{
- int checkforroot = (data != NULL);
struct device *dev = &virtpci_rootbus_device;
- if ((checkforroot) && match_busid(vbus, (void *)BUS_ID(dev))) {
+ if ((data) && match_busid(vbus, (void *)BUS_ID(dev))) {
/* skip it - don't delete root bus */
- LOGINF("skipping root bus\n");
return 0; /* pretend no error */
}
- LOGINF("Calling unregister for %s\n", BUS_ID(vbus));
device_unregister(vbus);
kfree(vbus);
- LOGINF("VBus unregister and freed\n");
return 0; /* no error */
}
GET_SCSIADAPINFO_FROM_CHANPTR(pauseparams->chanptr);
- LOGINF("Pausing vhba wwnn:%x:%x\n", scsi.wwnn.wwnn1, scsi.wwnn.wwnn2);
i = virtpci_device_serverdown(NULL /*no parent bus */, VIRTHBA_TYPE,
&scsi.wwnn, NULL);
- if (i)
- LOGINF("Paused vhba wwnn:%x:%x\n", scsi.wwnn.wwnn1,
- scsi.wwnn.wwnn2);
return i;
}
GET_NETADAPINFO_FROM_CHANPTR(pauseparams->chanptr);
- LOGINF("Pausing vnic macaddr:%02x:%02x:%02x:%02x:%02x:%02x\n",
- net.mac_addr[0], net.mac_addr[1], net.mac_addr[2],
- net.mac_addr[3], net.mac_addr[4], net.mac_addr[5]);
i = virtpci_device_serverdown(NULL /*no parent bus */, VIRTNIC_TYPE,
NULL, net.mac_addr);
- if (i) {
- LOGINF(" Paused vnic macaddr:%02x:%02x:%02x:%02x:%02x:%02x\n",
- net.mac_addr[0], net.mac_addr[1], net.mac_addr[2],
- net.mac_addr[3], net.mac_addr[4], net.mac_addr[5]);
- }
return i;
}
GET_SCSIADAPINFO_FROM_CHANPTR(resumeparams->chanptr);
- LOGINF("Resuming vhba wwnn:%x:%x\n", scsi.wwnn.wwnn1, scsi.wwnn.wwnn2);
i = virtpci_device_serverup(NULL /*no parent bus */, VIRTHBA_TYPE,
&scsi.wwnn, NULL);
- if (i)
- LOGINF("Resumed vhba wwnn:%x:%x\n", scsi.wwnn.wwnn1,
- scsi.wwnn.wwnn2);
return i;
}
GET_NETADAPINFO_FROM_CHANPTR(resumeparams->chanptr);
- LOGINF("Resuming vnic macaddr:%02x:%02x:%02x:%02x:%02x:%02x\n",
- net.mac_addr[0], net.mac_addr[1], net.mac_addr[2],
- net.mac_addr[3], net.mac_addr[4], net.mac_addr[5]);
i = virtpci_device_serverup(NULL /*no parent bus */, VIRTNIC_TYPE,
NULL, net.mac_addr);
- if (i) {
- LOGINF(" Resumed vnic macaddr:%02x:%02x:%02x:%02x:%02x:%02x\n",
- net.mac_addr[0], net.mac_addr[1], net.mac_addr[2],
- net.mac_addr[3], net.mac_addr[4], net.mac_addr[5]);
- }
return i;
}
GET_SCSIADAPINFO_FROM_CHANPTR(delparams->chanptr);
- LOGINF("Deleting vhba wwnn:%x:%x\n", scsi.wwnn.wwnn1, scsi.wwnn.wwnn2);
i = virtpci_device_del(NULL /*no parent bus */, VIRTHBA_TYPE,
&scsi.wwnn, NULL);
if (i) {
- LOGINF("Deleted vhba wwnn:%x:%x\n", scsi.wwnn.wwnn1,
- scsi.wwnn.wwnn2);
return 1;
}
return 0;
GET_NETADAPINFO_FROM_CHANPTR(delparams->chanptr);
- LOGINF("Deleting vnic macaddr:%02x:%02x:%02x:%02x:%02x:%02x\n",
- net.mac_addr[0], net.mac_addr[1], net.mac_addr[2],
- net.mac_addr[3], net.mac_addr[4], net.mac_addr[5]);
i = virtpci_device_del(NULL /*no parent bus */, VIRTNIC_TYPE, NULL,
net.mac_addr);
- if (i) {
- LOGINF("Deleted vnic macaddr:%02x:%02x:%02x:%02x:%02x:%02x\n",
- net.mac_addr[0], net.mac_addr[1], net.mac_addr[2],
- net.mac_addr[3], net.mac_addr[4], net.mac_addr[5]);
- }
return i;
}
#define DELETE_ONE_VPCIDEV(vpcidev) { \
- LOGINF("calling device_unregister:%p\n", &vpcidev->generic_dev); \
device_unregister(&vpcidev->generic_dev); \
- LOGINF("Deleted %p\n", vpcidev); \
kfree(vpcidev); \
}
tmpvpcidev = nextvpcidev;
count++;
}
- LOGINF("Deleted %d vhbas/vnics.\n", count);
/* now delete each vbus */
- if (bus_for_each_dev
- (&virtpci_bus_type, NULL, (void *)1, delete_vbus_device))
- LOGERR("delete of all vbus failed\n");
+ bus_for_each_dev(&virtpci_bus_type, NULL, (void *)1,
+ delete_vbus_device);
}
/* deletes all vnics or vhbas
sprintf(busid, "vbus%d", delparams->bus_no);
vbus = bus_find_device(&virtpci_bus_type, NULL,
(void *)busid, match_busid);
- if (!vbus) {
- LOGERR("**** FAILED to find vbus %s\n", busid);
+ if (!vbus)
return 0;
- }
- if ((devtype != VIRTHBA_TYPE) && (devtype != VIRTNIC_TYPE)) {
- LOGERR("**** FAILED to delete all devices; devtype:%d not vhba:%d or vnic:%d\n",
- devtype, VIRTHBA_TYPE, VIRTNIC_TYPE);
+ if ((devtype != VIRTHBA_TYPE) && (devtype != VIRTNIC_TYPE))
return 0;
- }
- LOGINF("Deleting all %s in vbus %s\n",
- devtype == VIRTHBA_TYPE ? "vhbas" : "vnics", busid);
/* delete all vhbas/vnics */
i = virtpci_device_del(vbus, devtype, NULL, NULL);
- if (i > 0)
- LOGINF("Deleted %d %s\n", i,
- devtype == VIRTHBA_TYPE ? "vhbas" : "vnics");
return 1;
}
case GUEST_RESUME_VNIC:
return resume_vnic(&msg->resume_vnic);
default:
- LOGERR("invalid message type %d.\n", msg->msgtype);
return 0;
}
}
const struct virtpci_dev *dev)
{
while (ids->vendor || ids->subvendor || ids->class_mask) {
- DBGINF("ids->vendor:%x dev->vendor:%x ids->device:%x dev->device:%x\n",
- ids->vendor, dev->vendor, ids->device, dev->device);
-
if ((ids->vendor == dev->vendor) &&
(ids->device == dev->device))
return ids;
struct virtpci_driver *virtpcidrv = driver_to_virtpci_driver(drv);
int match = 0;
- DBGINF("In virtpci_bus_match dev->bus_id:%s drv->name:%s\n",
- dev->bus_id, drv->name);
-
/* check ids list for a match */
if (virtpci_match_device(virtpcidrv->id_table, virtpcidev))
match = 1;
- DBGINF("returning match:%d\n", match);
return match; /* 0 - no match; 1 - yes it matches */
}
static int virtpci_uevent(struct device *dev, struct kobj_uevent_env *env)
{
- DBGINF("In virtpci_hotplug\n");
/* add variables to the environment prior to the generation of
* hotplug events to user space
*/
struct ultra_vbus_deviceinfo dev_info;
const char *stype;
- if (!dev) {
- LOGERR("%s dev is NULL", __func__);
+ if (!dev)
return;
- }
- if (!virtpcidrv) {
- LOGERR("%s driver is NULL", __func__);
+ if (!virtpcidrv)
return;
- }
+
vbus = dev->parent;
- if (!vbus) {
- LOGERR("%s dev has no parent bus", __func__);
+ if (!vbus)
return;
- }
+
chan = vbus->platform_data;
- if (!chan) {
- LOGERR("%s dev bus has no channel", __func__);
+ if (!chan)
return;
- }
+
switch (dev_type) {
case PCI_DEVICE_ID_VIRTHBA:
stype = "vHBA";
const struct pci_device_id *id;
int error = 0;
- LOGINF("In virtpci_device_probe dev:%p virtpcidev:%p virtpcidrv:%p\n",
- dev, virtpcidev, virtpcidrv); /* VERBOSE/DEBUG ? */
POSTCODE_LINUX_2(VPCI_PROBE_ENTRY_PC, POSTCODE_SEVERITY_INFO);
/* static match and static probe vs dynamic match & dynamic
* probe - do we care?.
struct virtpci_dev *virtpcidev = device_to_virtpci_dev(dev_);
struct virtpci_driver *virtpcidrv = virtpcidev->mydriver;
- LOGINF("In virtpci_device_remove bus_id:%s dev_:%p virtpcidev:%p dev->driver:%p drivername:%s\n",
- BUS_ID(dev_), dev_, virtpcidev, dev_->driver,
- dev_->driver->name); /* VERBOSE/DEBUG */
if (virtpcidrv) {
/* TEMP: assuming we have only one such driver for now */
if (virtpcidrv->remove)
virtpcidev->mydriver = NULL;
}
- DBGINF("calling putdevice\n");
put_device(dev_);
-
- DBGINF("Leaving\n");
return 0;
}
static void virtpci_bus_release(struct device *dev)
{
- /* this function is called when the last reference to the
- * device is removed
- */
- DBGINF("In virtpci_bus_release\n");
- /* what else is supposed to happen here? */
}
/*****************************************************/
struct spar_io_channel_protocol __iomem *io_chan = NULL;
struct device *dev;
- LOGINF("virtpci_device_add parentbus:%p chanptr:%p\n", parentbus,
- addparams->chanptr);
-
POSTCODE_LINUX_2(VPCI_CREATE_ENTRY_PC, POSTCODE_SEVERITY_INFO);
if ((devtype != VIRTHBA_TYPE) && (devtype != VIRTNIC_TYPE)) {
- LOGERR("**** FAILED to add device; devtype:%d not vhba:%d or vnic:%d\n",
- devtype, VIRTHBA_TYPE, VIRTNIC_TYPE);
POSTCODE_LINUX_3(VPCI_CREATE_FAILURE_PC, devtype,
POSTCODE_SEVERITY_ERR);
return 0;
/* add a Virtual Device */
virtpcidev = kzalloc(sizeof(*virtpcidev), GFP_ATOMIC);
- if (virtpcidev == NULL) {
- LOGERR("can't add device - malloc FALLED\n");
+ if (!virtpcidev) {
POSTCODE_LINUX_2(MALLOC_FAILURE_PC, POSTCODE_SEVERITY_ERR);
return 0;
}
*/
write_unlock_irqrestore(&vpcidev_list_lock, flags);
kfree(virtpcidev);
- LOGERR("**** FAILED vhba/vnic already exists in the list\n");
POSTCODE_LINUX_2(VPCI_CREATE_FAILURE_PC, POSTCODE_SEVERITY_ERR);
return 0;
}
* list. Otherwise, a device_unregister from this function can
* cause a "scheduling while atomic".
*/
- DBGINF("registering device:%p with bus_id:%s\n",
- &virtpcidev->generic_dev, virtpcidev->generic_dev.bus_id);
ret = device_register(&virtpcidev->generic_dev);
/* NOTE: THIS IS CALLING HOTPLUG virtpci_hotplug!!!
* This call to device_register results in virtpci_bus_match
* virtpci_device_probe is successful
*/
if (ret) {
- LOGERR("device_register returned %d\n", ret);
dev = &virtpcidev->generic_dev;
SPAR_CHANNEL_CLIENT_TRANSITION(addparams->chanptr,
BUS_ID(dev),
return 0;
}
- LOGINF("Added %s:%d:%d &virtpcidev->generic_dev:%p\n",
- (devtype == VIRTHBA_TYPE) ? "virthba" : "virtnic",
- addparams->bus_no, addparams->device_no,
- &virtpcidev->generic_dev);
POSTCODE_LINUX_2(VPCI_CREATE_EXIT_PC, POSTCODE_SEVERITY_INFO);
return 1;
}
unsigned long flags;
int rc = 0;
- if ((devtype != VIRTHBA_TYPE) && (devtype != VIRTNIC_TYPE)) {
- LOGERR("**** FAILED to pause device; devtype:%d not vhba:%d or vnic:%d\n",
- devtype, VIRTHBA_TYPE, VIRTNIC_TYPE);
+ if ((devtype != VIRTHBA_TYPE) && (devtype != VIRTNIC_TYPE))
return 0;
- }
/* find the vhba or vnic in virtpci device list */
write_lock_irqsave(&vpcidev_list_lock, flags);
}
write_unlock_irqrestore(&vpcidev_list_lock, flags);
- if (!found) {
- LOGERR("**** FAILED to find vhba/vnic in the list\n");
+ if (!found)
return 0;
- }
return rc;
}
unsigned long flags;
int rc = 0;
- if ((devtype != VIRTHBA_TYPE) && (devtype != VIRTNIC_TYPE)) {
- LOGERR("**** FAILED to resume device; devtype:%d not vhba:%d or vnic:%d\n",
- devtype, VIRTHBA_TYPE, VIRTNIC_TYPE);
+ if ((devtype != VIRTHBA_TYPE) && (devtype != VIRTNIC_TYPE))
return 0;
- }
+
/* find the vhba or vnic in virtpci device list */
write_lock_irqsave(&vpcidev_list_lock, flags);
write_unlock_irqrestore(&vpcidev_list_lock, flags);
- if (!found) {
- LOGERR("**** FAILED to find vhba/vnic in the list\n");
+ if (!found)
return 0;
- }
return rc;
}
continue; \
}
- if ((devtype != VIRTHBA_TYPE) && (devtype != VIRTNIC_TYPE)) {
- LOGERR("**** FAILED to delete device; devtype:%d not vhba:%d or vnic:%d\n",
- devtype, VIRTHBA_TYPE, VIRTNIC_TYPE);
+ if ((devtype != VIRTHBA_TYPE) && (devtype != VIRTNIC_TYPE))
return 0;
- }
/* see if we are to delete all - NOTE: all implies we have a
* valid parentbus
*/
- all = ((devtype == VIRTHBA_TYPE) && (wwnn == NULL)) ||
- ((devtype == VIRTNIC_TYPE) && (macaddr == NULL));
+ all = ((devtype == VIRTHBA_TYPE) && (!wwnn)) ||
+ ((devtype == VIRTNIC_TYPE) && (!macaddr));
/* find all the vhba or vnic or both in virtpci device list
* keep list of ones we are deleting so we can call
}
write_unlock_irqrestore(&vpcidev_list_lock, flags);
- if (!all && (count == 0)) {
- LOGERR("**** FAILED to find vhba/vnic in the list\n");
+ if (!all && (count == 0))
return 0;
- }
/* now delete each one from delete list */
while (dellist) {
/* this function is called when the last reference to the
* device is removed
*/
- LOGINF("In virtpci_device_release:%p - NOT YET IMPLEMENTED\n", dev_);
}
/*****************************************************/
struct driver_private *dprivate = to_driver(kobj);
struct device_driver *driver = dprivate->driver;
- DBGINF("In virtpci_driver_attr_show driver->name:%s\n", driver->name);
-
if (dattr->show)
ret = dattr->show(driver, buf);
struct driver_private *dprivate = to_driver(kobj);
struct device_driver *driver = dprivate->driver;
- DBGINF("In virtpci_driver_attr_store driver->name:%s\n", driver->name);
-
if (dattr->store)
ret = dattr->store(driver, buf, count);
{
int result = 0;
- DBGINF("In virtpci_register_driver\n");
-
- if (drv->id_table == NULL) {
- LOGERR("id_table missing\n");
+ if (!drv->id_table)
return 1;
- }
/* initialize core driver fields needed to call driver_register */
drv->core_driver.name = drv->name; /* name of driver in sysfs */
drv->core_driver.bus = &virtpci_bus_type; /* type of bus this
void virtpci_unregister_driver(struct virtpci_driver *drv)
{
- DBGINF("In virtpci_unregister_driver drv:%p\n", drv);
driver_unregister(&drv->core_driver);
/* driver_unregister calls bus_remove_driver
* bus_remove_driver calls device_detach
* virtpci_device_remove
* virtpci_device_remove calls virthba_remove
*/
- DBGINF("Leaving\n");
}
EXPORT_SYMBOL_GPL(virtpci_unregister_driver);
printparam.str_pos = &str_pos;
printparam.buf = vbuf;
printparam.len = &len;
- if (bus_for_each_dev(&virtpci_bus_type, NULL,
- (void *)&printparam, print_vbus))
- LOGERR("Failed to find bus\n");
+ bus_for_each_dev(&virtpci_bus_type, NULL, (void *)&printparam,
+ print_vbus);
str_pos += scnprintf(vbuf + str_pos, len - str_pos,
"\n Virtual PCI devices\n");
tmpvpcidev->scsi.max.cmd_per_lun);
} else {
str_pos += scnprintf(vbuf + str_pos, len - str_pos,
- "[%d:%d] VNic:%02x:%02x:%02x:%02x:%02x:%02x num_rcv_bufs:%d mtu:%d",
+ "[%d:%d] VNic:%pM num_rcv_bufs:%d mtu:%d",
tmpvpcidev->bus_no,
tmpvpcidev->device_no,
- tmpvpcidev->net.mac_addr[0],
- tmpvpcidev->net.mac_addr[1],
- tmpvpcidev->net.mac_addr[2],
- tmpvpcidev->net.mac_addr[3],
- tmpvpcidev->net.mac_addr[4],
- tmpvpcidev->net.mac_addr[5],
+ tmpvpcidev->net.mac_addr,
tmpvpcidev->net.num_rcv_bufs,
tmpvpcidev->net.mtu);
}
* drivers directory
*/
if (ret) {
- LOGERR("bus_register ****FAILED:%d\n", ret);
POSTCODE_LINUX_3(VPCI_CREATE_FAILURE_PC, ret,
POSTCODE_SEVERITY_ERR);
return ret;
}
- DBGINF("bus_register successful\n");
bus_device_info_init(&bus_driver_info, "clientbus", "virtpci",
VERSION, NULL);
/* create a root bus used to parent all the virtpci buses. */
ret = device_register(&virtpci_rootbus_device);
if (ret) {
- LOGERR("device_register FAILED:%d\n", ret);
bus_unregister(&virtpci_bus_type);
POSTCODE_LINUX_3(VPCI_CREATE_FAILURE_PC, ret,
POSTCODE_SEVERITY_ERR);
return ret;
}
- DBGINF("device_register successful ret:%x\n", ret);
if (!uisctrl_register_req_handler(2, (void *)&virtpci_ctrlchan_func,
&chipset_driver_info)) {
- LOGERR("uisctrl_register_req_handler ****FAILED.\n");
POSTCODE_LINUX_2(VPCI_CREATE_FAILURE_PC, POSTCODE_SEVERITY_ERR);
device_unregister(&virtpci_rootbus_device);
bus_unregister(&virtpci_bus_type);
return -1;
}
- LOGINF("successfully registered virtpci_ctrlchan_func (0x%p) as callback.\n",
- (void *)&virtpci_ctrlchan_func);
/* create debugfs directory and info file inside. */
virtpci_debugfs_dir = debugfs_create_dir("virtpci", NULL);
debugfs_create_file("info", S_IRUSR, virtpci_debugfs_dir,
NULL, &debugfs_info_fops);
- LOGINF("Leaving\n");
POSTCODE_LINUX_2(VPCI_CREATE_EXIT_PC, POSTCODE_SEVERITY_INFO);
return 0;
}
static void __exit virtpci_mod_exit(void)
{
- LOGINF("virtpci_mod_exit...\n");
-
/* unregister the callback function */
- if (!uisctrl_register_req_handler(2, NULL, NULL))
- LOGERR("uisctrl_register_req_handler ****FAILED.\n");
-
device_unregister(&virtpci_rootbus_device);
bus_unregister(&virtpci_bus_type);
debugfs_remove_recursive(virtpci_debugfs_dir);
- LOGINF("Leaving\n");
}
module_init(virtpci_mod_init);
config UNISYS_VISORCHANNEL
tristate "Unisys visorchannel driver"
- depends on UNISYSSPAR && UNISYS_VISORUTIL
+ select UNISYS_VISORUTIL
---help---
If you say Y here, you will enable the Unisys visorchannel driver.
#ifndef __VISORCHANNEL_GLOBALS_H__
#define __VISORCHANNEL_GLOBALS_H__
-#include "uniklog.h"
#include "timskmod.h"
#include "memregion.h"
#include "version.h"
void *rc = NULL;
p = kmalloc(sizeof(*p), GFP_KERNEL|__GFP_NORETRY);
- if (p == NULL) {
- ERRDRV("allocation failed: (status=0)\n");
+ if (!p) {
rc = NULL;
goto cleanup;
}
spin_lock_init(&p->remove_lock);
/* prepare chan_hdr (abstraction to read/write channel memory) */
- if (parent == NULL)
+ if (!parent)
p->memregion =
visor_memregion_create(physaddr,
sizeof(struct channel_header));
p->memregion =
visor_memregion_create_overlapped(parent->memregion,
off, sizeof(struct channel_header));
- if (p->memregion == NULL) {
- ERRDRV("visor_memregion_create failed failed: (status=0)\n");
+ if (!p->memregion) {
rc = NULL;
goto cleanup;
}
if (visor_memregion_read(p->memregion, 0, &p->chan_hdr,
sizeof(struct channel_header)) < 0) {
- ERRDRV("visor_memregion_read failed: (status=0)\n");
rc = NULL;
goto cleanup;
}
/* we had better be a CLIENT of this channel */
guid = p->chan_hdr.chtype;
if (visor_memregion_resize(p->memregion, channel_bytes) < 0) {
- ERRDRV("visor_memregion_resize failed: (status=0)\n");
rc = NULL;
goto cleanup;
}
rc = p;
cleanup:
- if (rc == NULL) {
- if (p != NULL) {
+ if (!rc) {
+ if (!p) {
visorchannel_destroy(p);
p = NULL;
}
void
visorchannel_destroy(struct visorchannel *channel)
{
- if (channel == NULL)
+ if (!channel)
return;
- if (channel->memregion != NULL) {
+ if (channel->memregion) {
visor_memregion_destroy(channel->memregion);
channel->memregion = NULL;
}
int written = 0;
u8 *buf = vmalloc(bufsize);
- if (buf == NULL) {
- ERRDRV("%s failed memory allocation", __func__);
+ if (!buf)
goto cleanup;
- }
+
memset(buf, ch, bufsize);
while (nbytes > 0) {
ulong thisbytes = bufsize;
rc = 0;
cleanup:
- if (buf != NULL) {
+ if (buf) {
vfree(buf);
buf = NULL;
}
{
BOOL rc = FALSE;
- if (channel->chan_hdr.ch_space_offset < sizeof(struct channel_header)) {
- ERRDRV("oChannelSpace too small: (status=%d)\n", rc);
+ if (channel->chan_hdr.ch_space_offset < sizeof(struct channel_header))
goto cleanup;
- }
/* Read the appropriate SIGNAL_QUEUE_HEADER into local memory. */
SIG_QUEUE_OFFSET(&channel->chan_hdr, queue),
sig_hdr,
sizeof(struct signal_queue_header)) < 0) {
- ERRDRV("queue=%d SIG_QUEUE_OFFSET=%d",
- queue, (int)SIG_QUEUE_OFFSET(&channel->chan_hdr, queue));
- ERRDRV("visor_memregion_read of signal queue failed: (status=%d)\n",
- rc);
goto cleanup;
}
rc = TRUE;
if (visor_memregion_write(channel->memregion,
signal_data_offset,
data, sig_hdr->signal_size) < 0) {
- ERRDRV("visor_memregion_write of signal data failed: (status=%d)\n",
- rc);
goto cleanup;
}
} else {
if (visor_memregion_read(channel->memregion, signal_data_offset,
data, sig_hdr->signal_size) < 0) {
- ERRDRV("visor_memregion_read of signal data failed: (status=%d)\n",
- rc);
goto cleanup;
}
}
punsafe_sqh->head = *phead;
punsafe_sqh->tail = *ptail;
- ERRDRV("safe_sig_queue_validate: head = 0x%x, tail = 0x%x, MaxSlots = 0x%x",
- *phead, *ptail, psafe_sqh->max_slots);
return 0;
}
return 1;
{
struct signal_queue_header sig_hdr;
- if (!sig_read_header(channel, queue, &sig_hdr)) {
+ if (!sig_read_header(channel, queue, &sig_hdr))
return FALSE;
- }
if (sig_hdr.head == sig_hdr.tail)
return FALSE; /* no signals to remove */
sig_hdr.tail = (sig_hdr.tail + 1) % sig_hdr.max_slots;
if (!sig_read_data(channel, queue, &sig_hdr, sig_hdr.tail, msg)) {
- ERRDRV("sig_read_data failed\n");
return FALSE;
}
sig_hdr.num_received++;
* update host memory.
*/
mb(); /* required for channel synch */
- if (!SIG_WRITE_FIELD(channel, queue, &sig_hdr, tail)) {
- ERRDRV("visor_memregion_write of Tail failed\n");
+ if (!SIG_WRITE_FIELD(channel, queue, &sig_hdr, tail))
return FALSE;
- }
- if (!SIG_WRITE_FIELD(channel, queue, &sig_hdr, num_received)) {
- ERRDRV("visor_memregion_write of NumSignalsReceived failed\n");
+ if (!SIG_WRITE_FIELD(channel, queue, &sig_hdr, num_received))
return FALSE;
- }
return TRUE;
}
{
struct signal_queue_header sig_hdr;
- if (!sig_read_header(channel, queue, &sig_hdr)) {
+ if (!sig_read_header(channel, queue, &sig_hdr))
return FALSE;
- }
sig_hdr.head = ((sig_hdr.head + 1) % sig_hdr.max_slots);
if (sig_hdr.head == sig_hdr.tail) {
sig_hdr.num_overflows++;
- if (!SIG_WRITE_FIELD(channel, queue, &sig_hdr, num_overflows))
- ERRDRV("visor_memregion_write of NumOverflows failed\n");
-
+ visor_memregion_write(channel->memregion,
+ SIG_QUEUE_OFFSET(&channel->chan_hdr,
+ queue) +
+ offsetof(struct signal_queue_header,
+ num_overflows),
+ &(sig_hdr.num_overflows),
+ sizeof(sig_hdr.num_overflows));
return FALSE;
}
- if (!sig_write_data(channel, queue, &sig_hdr, sig_hdr.head, msg)) {
- ERRDRV("sig_write_data failed\n");
+ if (!sig_write_data(channel, queue, &sig_hdr, sig_hdr.head, msg))
return FALSE;
- }
+
sig_hdr.num_sent++;
/* For each data field in SIGNAL_QUEUE_HEADER that was modified,
* update host memory.
*/
mb(); /* required for channel synch */
- if (!SIG_WRITE_FIELD(channel, queue, &sig_hdr, head)) {
- ERRDRV("visor_memregion_write of Head failed\n");
+ if (!SIG_WRITE_FIELD(channel, queue, &sig_hdr, head))
return FALSE;
- }
if (!SIG_WRITE_FIELD(channel, queue, &sig_hdr, num_sent)) {
- ERRDRV("visor_memregion_write of NumSignalsSent failed\n");
return FALSE;
}
int i = 0;
int errcode = 0;
- if (channel == NULL) {
- ERRDRV("%s no channel", __func__);
+ if (!channel)
return;
- }
memregion = channel->memregion;
- if (memregion == NULL) {
- ERRDRV("%s no memregion", __func__);
+ if (!memregion)
return;
- }
+
addr = visor_memregion_get_physaddr(memregion);
nbytes_region = visor_memregion_get_nbytes(memregion);
errcode = visorchannel_read(channel, off,
goto fmt_failed;
errcode = visorchannel_read(chan, off, buf, len);
- if (errcode < 0) {
- ERRDRV("%s failed to read %s from channel errcode=%d",
- s, __func__, errcode);
+ if (errcode < 0)
goto read_failed;
- }
seq_printf(seq, "channel %s:\n", s);
tbuf = buf;
while (len > 0) {
if (!unisys_spar_platform)
return -ENODEV;
- INFODRV("driver version %s loaded", VERSION);
return 0;
}
static void
visorchannel_exit(void)
{
- INFODRV("driver unloaded");
}
module_init(visorchannel_init);
config UNISYS_VISORCHIPSET
tristate "Unisys visorchipset driver"
- depends on UNISYSSPAR && UNISYS_VISORUTIL && UNISYS_VISORCHANNEL && HAS_IOMEM
+ select UNISYS_VISORUTIL
+ select UNISYS_VISORCHANNEL
---help---
If you say Y here, you will enable the Unisys visorchipset driver.
static struct cdev file_cdev;
static struct visorchannel **file_controlvm_channel;
-static dev_t majordev = -1; /**< indicates major num for device */
-static BOOL registered = FALSE;
-
-static int visorchipset_open(struct inode *inode, struct file *file);
-static int visorchipset_release(struct inode *inode, struct file *file);
-static int visorchipset_mmap(struct file *file, struct vm_area_struct *vma);
-long visorchipset_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
-
-static const struct file_operations visorchipset_fops = {
- .owner = THIS_MODULE,
- .open = visorchipset_open,
- .read = NULL,
- .write = NULL,
- .unlocked_ioctl = visorchipset_ioctl,
- .release = visorchipset_release,
- .mmap = visorchipset_mmap,
-};
-
-int
-visorchipset_file_init(dev_t major_dev, struct visorchannel **controlvm_channel)
-{
- int rc = 0;
-
- file_controlvm_channel = controlvm_channel;
- majordev = major_dev;
- cdev_init(&file_cdev, &visorchipset_fops);
- file_cdev.owner = THIS_MODULE;
- if (MAJOR(majordev) == 0) {
- /* dynamic major device number registration required */
- if (alloc_chrdev_region(&majordev, 0, 1, MYDRVNAME) < 0) {
- ERRDRV("Unable to allocate+register char device %s",
- MYDRVNAME);
- return -1;
- }
- registered = TRUE;
- INFODRV("New major number %d registered\n", MAJOR(majordev));
- } else {
- /* static major device number registration required */
- if (register_chrdev_region(majordev, 1, MYDRVNAME) < 0) {
- ERRDRV("Unable to register char device %s", MYDRVNAME);
- return -1;
- }
- registered = TRUE;
- INFODRV("Static major number %d registered\n", MAJOR(majordev));
- }
- rc = cdev_add(&file_cdev, MKDEV(MAJOR(majordev), 0), 1);
- if (rc < 0) {
- ERRDRV("failed to create char device: (status=%d)\n", rc);
- return -1;
- }
- INFODRV("Registered char device for %s (major=%d)",
- MYDRVNAME, MAJOR(majordev));
- return 0;
-}
void
-visorchipset_file_cleanup(void)
+visorchipset_file_cleanup(dev_t major_dev)
{
if (file_cdev.ops != NULL)
cdev_del(&file_cdev);
file_cdev.ops = NULL;
- if (registered) {
- if (MAJOR(majordev) >= 0) {
- unregister_chrdev_region(majordev, 1);
- majordev = MKDEV(0, 0);
- }
- registered = FALSE;
- }
+ unregister_chrdev_region(major_dev, 1);
}
static int
{
unsigned minor_number = iminor(inode);
- DEBUGDRV("%s", __func__);
if (minor_number != 0)
return -ENODEV;
file->private_data = NULL;
static int
visorchipset_release(struct inode *inode, struct file *file)
{
- DEBUGDRV("%s", __func__);
return 0;
}
GUEST_PHYSICAL_ADDRESS addr = 0;
/* sv_enable_dfp(); */
- DEBUGDRV("%s", __func__);
- if (offset & (PAGE_SIZE - 1)) {
- ERRDRV("%s virtual address NOT page-aligned!", __func__);
+ if (offset & (PAGE_SIZE - 1))
return -ENXIO; /* need aligned offsets */
- }
+
switch (offset) {
case VISORCHIPSET_MMAP_CONTROLCHANOFFSET:
vma->vm_flags |= VM_IO;
if (*file_controlvm_channel == NULL) {
- ERRDRV("%s no controlvm channel yet", __func__);
return -ENXIO;
}
visorchannel_read(*file_controlvm_channel,
gp_control_channel),
&addr, sizeof(addr));
if (addr == 0) {
- ERRDRV("%s control channel address is 0", __func__);
return -ENXIO;
}
physaddr = (ulong)addr;
- DEBUGDRV("mapping physical address = 0x%lx", physaddr);
if (remap_pfn_range(vma, vma->vm_start,
physaddr >> PAGE_SHIFT,
vma->vm_end - vma->vm_start,
/*pgprot_noncached */
(vma->vm_page_prot))) {
- ERRDRV("%s remap_pfn_range failed", __func__);
return -EAGAIN;
}
break;
default:
return -ENOSYS;
}
- DEBUGDRV("%s success!", __func__);
return 0;
}
-long visorchipset_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+static long visorchipset_ioctl(struct file *file, unsigned int cmd,
+ unsigned long arg)
{
s64 adjustment;
s64 vrtc_offset;
- DBGINF("entered visorchipset_ioctl, cmd=%d", cmd);
switch (cmd) {
case VMCALL_QUERY_GUEST_VIRTUAL_TIME_OFFSET:
/* get the physical rtc offset */
((void __user *)arg, &vrtc_offset, sizeof(vrtc_offset))) {
return -EFAULT;
}
- DBGINF("insde visorchipset_ioctl, cmd=%d, vrtc_offset=%lld",
- cmd, vrtc_offset);
return SUCCESS;
case VMCALL_UPDATE_PHYSICAL_TIME:
if (copy_from_user
(&adjustment, (void __user *)arg, sizeof(adjustment))) {
return -EFAULT;
}
- DBGINF("insde visorchipset_ioctl, cmd=%d, adjustment=%lld", cmd,
- adjustment);
return issue_vmcall_update_physical_time(adjustment);
default:
- LOGERR("visorchipset_ioctl received invalid command");
return -EFAULT;
}
}
+
+static const struct file_operations visorchipset_fops = {
+ .owner = THIS_MODULE,
+ .open = visorchipset_open,
+ .read = NULL,
+ .write = NULL,
+ .unlocked_ioctl = visorchipset_ioctl,
+ .release = visorchipset_release,
+ .mmap = visorchipset_mmap,
+};
+
+int
+visorchipset_file_init(dev_t major_dev, struct visorchannel **controlvm_channel)
+{
+ int rc = 0;
+
+ file_controlvm_channel = controlvm_channel;
+ cdev_init(&file_cdev, &visorchipset_fops);
+ file_cdev.owner = THIS_MODULE;
+ if (MAJOR(major_dev) == 0) {
+ rc = alloc_chrdev_region(&major_dev, 0, 1, MYDRVNAME);
+ /* dynamic major device number registration required */
+ if (rc < 0)
+ return rc;
+ } else {
+ /* static major device number registration required */
+ rc = register_chrdev_region(major_dev, 1, MYDRVNAME);
+ if (rc < 0)
+ return rc;
+ }
+ rc = cdev_add(&file_cdev, MKDEV(MAJOR(major_dev), 0), 1);
+ if (rc < 0) {
+ unregister_chrdev_region(major_dev, 1);
+ return rc;
+ }
+ return 0;
+}
int visorchipset_file_init(dev_t majorDev,
struct visorchannel **pControlVm_channel);
-void visorchipset_file_cleanup(void);
+void visorchipset_file_cleanup(dev_t major_dev);
#endif
#ifndef __VISORCHIPSET_GLOBALS_H__
#define __VISORCHIPSET_GLOBALS_H__
-#include "uniklog.h"
#include "diagnostics/appos_subsystems.h"
#include "timskmod.h"
#include "visorchipset.h"
* incoming payloads. This serves as a throttling mechanism.
*/
#define MAX_CONTROLVM_PAYLOAD_BYTES (1024*128)
-static ulong Controlvm_Payload_Bytes_Buffered;
+static ulong controlvm_payload_bytes_buffered;
-struct PARSER_CONTEXT_Tag {
+struct parser_context {
ulong allocbytes;
ulong param_bytes;
u8 *curr;
char data[0];
};
-static PARSER_CONTEXT *
-parser_init_guts(u64 addr, u32 bytes, BOOL isLocal,
- BOOL hasStandardPayloadHeader, BOOL *tryAgain)
+static struct parser_context *
+parser_init_guts(u64 addr, u32 bytes, BOOL local,
+ BOOL standard_payload_header, BOOL *retry)
{
- int allocbytes = sizeof(PARSER_CONTEXT) + bytes;
- PARSER_CONTEXT *rc = NULL;
- PARSER_CONTEXT *ctx = NULL;
+ int allocbytes = sizeof(struct parser_context) + bytes;
+ struct parser_context *rc = NULL;
+ struct parser_context *ctx = NULL;
struct memregion *rgn = NULL;
struct spar_controlvm_parameters_header *phdr = NULL;
- if (tryAgain)
- *tryAgain = FALSE;
- if (!hasStandardPayloadHeader)
+ if (retry)
+ *retry = FALSE;
+ if (!standard_payload_header)
/* alloc and 0 extra byte to ensure payload is
* '\0'-terminated
*/
allocbytes++;
- if ((Controlvm_Payload_Bytes_Buffered + bytes)
+ if ((controlvm_payload_bytes_buffered + bytes)
> MAX_CONTROLVM_PAYLOAD_BYTES) {
- ERRDRV("%s (%s:%d) - prevented allocation of %d bytes to prevent exceeding throttling max (%d)",
- __func__, __FILE__, __LINE__, allocbytes,
- MAX_CONTROLVM_PAYLOAD_BYTES);
- if (tryAgain)
- *tryAgain = TRUE;
+ if (retry)
+ *retry = TRUE;
rc = NULL;
- goto Away;
+ goto cleanup;
}
ctx = kzalloc(allocbytes, GFP_KERNEL|__GFP_NORETRY);
- if (ctx == NULL) {
- ERRDRV("%s (%s:%d) - failed to allocate %d bytes",
- __func__, __FILE__, __LINE__, allocbytes);
- if (tryAgain)
- *tryAgain = TRUE;
+ if (!ctx) {
+ if (retry)
+ *retry = TRUE;
rc = NULL;
- goto Away;
+ goto cleanup;
}
ctx->allocbytes = allocbytes;
ctx->curr = NULL;
ctx->bytes_remaining = 0;
ctx->byte_stream = FALSE;
- if (isLocal) {
+ if (local) {
void *p;
if (addr > virt_to_phys(high_memory - 1)) {
- ERRDRV("%s - bad local address (0x%-16.16Lx for %lu)",
- __func__,
- (unsigned long long) addr, (ulong) bytes);
rc = NULL;
- goto Away;
+ goto cleanup;
}
p = __va((ulong) (addr));
memcpy(ctx->data, p, bytes);
rgn = visor_memregion_create(addr, bytes);
if (!rgn) {
rc = NULL;
- goto Away;
+ goto cleanup;
}
if (visor_memregion_read(rgn, 0, ctx->data, bytes) < 0) {
rc = NULL;
- goto Away;
+ goto cleanup;
}
}
- if (!hasStandardPayloadHeader) {
+ if (!standard_payload_header) {
ctx->byte_stream = TRUE;
rc = ctx;
- goto Away;
+ goto cleanup;
}
phdr = (struct spar_controlvm_parameters_header *)(ctx->data);
if (phdr->total_length != bytes) {
- ERRDRV("%s - bad total length %lu (should be %lu)",
- __func__,
- (ulong) (phdr->total_length), (ulong) (bytes));
rc = NULL;
- goto Away;
+ goto cleanup;
}
if (phdr->total_length < phdr->header_length) {
- ERRDRV("%s - total length < header length (%lu < %lu)",
- __func__,
- (ulong) (phdr->total_length),
- (ulong) (phdr->header_length));
rc = NULL;
- goto Away;
+ goto cleanup;
}
if (phdr->header_length <
sizeof(struct spar_controlvm_parameters_header)) {
- ERRDRV("%s - header is too small (%lu < %lu)",
- __func__,
- (ulong) (phdr->header_length),
- (ulong)(sizeof(
- struct spar_controlvm_parameters_header)));
rc = NULL;
- goto Away;
+ goto cleanup;
}
rc = ctx;
-Away:
+cleanup:
if (rgn) {
visor_memregion_destroy(rgn);
rgn = NULL;
}
- if (rc)
- Controlvm_Payload_Bytes_Buffered += ctx->param_bytes;
- else {
+ if (rc) {
+ controlvm_payload_bytes_buffered += ctx->param_bytes;
+ } else {
if (ctx) {
parser_done(ctx);
ctx = NULL;
return rc;
}
-PARSER_CONTEXT *
-parser_init(u64 addr, u32 bytes, BOOL isLocal, BOOL *tryAgain)
+struct parser_context *
+parser_init(u64 addr, u32 bytes, BOOL local, BOOL *retry)
{
- return parser_init_guts(addr, bytes, isLocal, TRUE, tryAgain);
+ return parser_init_guts(addr, bytes, local, TRUE, retry);
}
/* Call this instead of parser_init() if the payload area consists of just
* structures. Afterwards, you can call parser_simpleString_get() or
* parser_byteStream_get() to obtain the data.
*/
-PARSER_CONTEXT *
-parser_init_byteStream(u64 addr, u32 bytes, BOOL isLocal, BOOL *tryAgain)
+struct parser_context *
+parser_init_byte_stream(u64 addr, u32 bytes, BOOL local, BOOL *retry)
{
- return parser_init_guts(addr, bytes, isLocal, FALSE, tryAgain);
+ return parser_init_guts(addr, bytes, local, FALSE, retry);
}
/* Obtain '\0'-terminated copy of string in payload area.
*/
char *
-parser_simpleString_get(PARSER_CONTEXT *ctx)
+parser_simpleString_get(struct parser_context *ctx)
{
if (!ctx->byte_stream)
return NULL;
/* Obtain a copy of the buffer in the payload area.
*/
-void *
-parser_byteStream_get(PARSER_CONTEXT *ctx, ulong *nbytes)
+void *parser_byte_stream_get(struct parser_context *ctx, ulong *nbytes)
{
if (!ctx->byte_stream)
return NULL;
if (nbytes)
*nbytes = ctx->param_bytes;
- return (void *) ctx->data;
+ return (void *)ctx->data;
}
uuid_le
-parser_id_get(PARSER_CONTEXT *ctx)
+parser_id_get(struct parser_context *ctx)
{
struct spar_controlvm_parameters_header *phdr = NULL;
- if (ctx == NULL) {
- ERRDRV("%s (%s:%d) - no context",
- __func__, __FILE__, __LINE__);
+ if (ctx == NULL)
return NULL_UUID_LE;
- }
phdr = (struct spar_controlvm_parameters_header *)(ctx->data);
return phdr->id;
}
void
-parser_param_start(PARSER_CONTEXT *ctx, PARSER_WHICH_STRING which_string)
+parser_param_start(struct parser_context *ctx, PARSER_WHICH_STRING which_string)
{
struct spar_controlvm_parameters_header *phdr = NULL;
- if (ctx == NULL) {
- ERRDRV("%s (%s:%d) - no context",
- __func__, __FILE__, __LINE__);
+ if (ctx == NULL)
goto Away;
- }
phdr = (struct spar_controlvm_parameters_header *)(ctx->data);
switch (which_string) {
case PARSERSTRING_INITIATOR:
ctx->bytes_remaining = phdr->name_length;
break;
default:
- ERRDRV("%s - bad which_string %d", __func__, which_string);
break;
}
}
void
-parser_done(PARSER_CONTEXT *ctx)
+parser_done(struct parser_context *ctx)
{
if (!ctx)
return;
- Controlvm_Payload_Bytes_Buffered -= ctx->param_bytes;
+ controlvm_payload_bytes_buffered -= ctx->param_bytes;
kfree(ctx);
}
* parameter
*/
void *
-parser_param_get(PARSER_CONTEXT *ctx, char *nam, int namesize)
+parser_param_get(struct parser_context *ctx, char *nam, int namesize)
{
u8 *pscan, *pnam = nam;
ulong nscan;
}
while (*pscan != ':') {
- if (namesize <= 0) {
- ERRDRV("%s - name too big", __func__);
+ if (namesize <= 0)
return NULL;
- }
*pnam = toupper(*pscan);
pnam++;
namesize--;
pscan++;
nscan--;
- if (nscan == 0) {
- ERRDRV("%s - unexpected end of input parsing name",
- __func__);
+ if (nscan == 0)
return NULL;
- }
}
- if (namesize <= 0) {
- ERRDRV("%s - name too big", __func__);
+ if (namesize <= 0)
return NULL;
- }
*pnam = '\0';
nam[string_length_no_trail(nam, strlen(nam))] = '\0';
while (isspace(*pscan)) {
pscan++;
nscan--;
- if (nscan == 0) {
- ERRDRV("%s - unexpected end of input looking for value",
- __func__);
+ if (nscan == 0)
return NULL;
- }
}
- if (nscan == 0) {
- ERRDRV("%s - unexpected end of input looking for value",
- __func__);
+ if (nscan == 0)
return NULL;
- }
if (*pscan == '\'' || *pscan == '"') {
closing_quote = *pscan;
pscan++;
nscan--;
- if (nscan == 0) {
- ERRDRV("%s - unexpected end of input after %c",
- __func__, closing_quote);
+ if (nscan == 0)
return NULL;
- }
}
/* look for a separator character, terminator character, or
*/
for (i = 0, value_length = -1; i < nscan; i++) {
if (closing_quote) {
- if (pscan[i] == '\0') {
- ERRDRV("%s - unexpected end of input parsing quoted value", __func__);
+ if (pscan[i] == '\0')
return NULL;
- }
if (pscan[i] == closing_quote) {
value_length = i;
break;
}
}
if (value_length < 0) {
- if (closing_quote) {
- ERRDRV("%s - unexpected end of input parsing quoted value", __func__);
+ if (closing_quote)
return NULL;
- }
value_length = nscan;
}
orig_value_length = value_length;
pscan++;
nscan--;
} else if (*pscan != '\0') {
- ERRDRV("%s - missing separator after quoted string", __func__);
kfree(value);
value = NULL;
return NULL;
}
void *
-parser_string_get(PARSER_CONTEXT *ctx)
+parser_string_get(struct parser_context *ctx)
{
u8 *pscan;
ulong nscan;
#include <linux/uuid.h>
-#include "uniklog.h"
#include "timskmod.h"
#include "channel.h"
PARSERSTRING_NAME,
} PARSER_WHICH_STRING;
-typedef struct PARSER_CONTEXT_Tag PARSER_CONTEXT;
-
-PARSER_CONTEXT *parser_init(u64 addr, u32 bytes, BOOL isLocal, BOOL *tryAgain);
-PARSER_CONTEXT *parser_init_byteStream(u64 addr, u32 bytes, BOOL isLocal,
- BOOL *tryAgain);
-void parser_param_start(PARSER_CONTEXT *ctx, PARSER_WHICH_STRING which_string);
-void *parser_param_get(PARSER_CONTEXT *ctx, char *nam, int namesize);
-void *parser_string_get(PARSER_CONTEXT *ctx);
-uuid_le parser_id_get(PARSER_CONTEXT *ctx);
-char *parser_simpleString_get(PARSER_CONTEXT *ctx);
-void *parser_byteStream_get(PARSER_CONTEXT *ctx, ulong *nbytes);
-void parser_done(PARSER_CONTEXT *ctx);
+struct parser_context *parser_init(u64 addr, u32 bytes, BOOL isLocal,
+ BOOL *tryAgain);
+struct parser_context *parser_init_byte_stream(u64 addr, u32 bytes, BOOL local,
+ BOOL *retry);
+void parser_param_start(struct parser_context *ctx,
+ PARSER_WHICH_STRING which_string);
+void *parser_param_get(struct parser_context *ctx, char *nam, int namesize);
+void *parser_string_get(struct parser_context *ctx);
+uuid_le parser_id_get(struct parser_context *ctx);
+char *parser_simpleString_get(struct parser_context *ctx);
+void *parser_byte_stream_get(struct parser_context *ctx, ulong *nbytes);
+void parser_done(struct parser_context *ctx);
#endif
u8 *description; /* UTF8 */
u64 reserved1;
u32 reserved2;
- MYPROCOBJECT *proc_object;
struct {
u32 server:1;
/* Add new fields above. */
#include "periodic_work.h"
#include "file.h"
#include "parser.h"
-#include "uniklog.h"
#include "uisutils.h"
#include "controlvmcompletionstatus.h"
#include "guestlinuxdebug.h"
* message, we switch back to fast polling mode.
*/
#define MIN_IDLE_SECONDS 10
-static ulong Poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_FAST;
-static ulong Most_recent_message_jiffies; /* when we got our last
+static ulong poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_FAST;
+static ulong most_recent_message_jiffies; /* when we got our last
* controlvm message */
static inline char *
NONULLSTR(char *s)
#define MAX_CHIPSET_EVENTS 2
static u8 chipset_events[MAX_CHIPSET_EVENTS] = { 0, 0 };
-static struct delayed_work Periodic_controlvm_work;
-static struct workqueue_struct *Periodic_controlvm_workqueue;
-static DEFINE_SEMAPHORE(NotifierLock);
+static struct delayed_work periodic_controlvm_work;
+static struct workqueue_struct *periodic_controlvm_workqueue;
+static DEFINE_SEMAPHORE(notifier_lock);
-typedef struct {
- struct controlvm_message message;
- unsigned int crc;
-} MESSAGE_ENVELOPE;
-
-static struct controlvm_message_header g_DiagMsgHdr;
-static struct controlvm_message_header g_ChipSetMsgHdr;
-static struct controlvm_message_header g_DelDumpMsgHdr;
-static const uuid_le UltraDiagPoolChannelProtocolGuid =
+static struct controlvm_message_header g_diag_msg_hdr;
+static struct controlvm_message_header g_chipset_msg_hdr;
+static struct controlvm_message_header g_del_dump_msg_hdr;
+static const uuid_le spar_diag_pool_channel_protocol_uuid =
SPAR_DIAG_POOL_CHANNEL_PROTOCOL_UUID;
/* 0xffffff is an invalid Bus/Device number */
-static ulong g_diagpoolBusNo = 0xffffff;
-static ulong g_diagpoolDevNo = 0xffffff;
-static struct controlvm_message_packet g_DeviceChangeStatePacket;
+static ulong g_diagpool_bus_no = 0xffffff;
+static ulong g_diagpool_dev_no = 0xffffff;
+static struct controlvm_message_packet g_devicechangestate_packet;
/* Only VNIC and VHBA channels are sent to visorclientbus (aka
* "visorhackbus")
*/
#define FOR_VISORHACKBUS(channel_type_guid) \
(((uuid_le_cmp(channel_type_guid,\
- spar_vnic_channel_protocol_uuid) == 0)\
- || (uuid_le_cmp(channel_type_guid,\
+ spar_vnic_channel_protocol_uuid) == 0) ||\
+ (uuid_le_cmp(channel_type_guid,\
spar_vhba_channel_protocol_uuid) == 0)))
#define FOR_VISORBUS(channel_type_guid) (!(FOR_VISORHACKBUS(channel_type_guid)))
#define is_diagpool_channel(channel_type_guid) \
- (uuid_le_cmp(channel_type_guid, UltraDiagPoolChannelProtocolGuid) == 0)
+ (uuid_le_cmp(channel_type_guid,\
+ spar_diag_pool_channel_protocol_uuid) == 0)
-static LIST_HEAD(BusInfoList);
-static LIST_HEAD(DevInfoList);
+static LIST_HEAD(bus_info_list);
+static LIST_HEAD(dev_info_list);
-static struct visorchannel *ControlVm_channel;
+static struct visorchannel *controlvm_channel;
-typedef struct {
+/* Manages the request payload in the controlvm channel */
+static struct controlvm_payload_info {
u8 __iomem *ptr; /* pointer to base address of payload pool */
u64 offset; /* offset from beginning of controlvm
* channel to beginning of payload * pool */
u32 bytes; /* number of bytes in payload pool */
-} CONTROLVM_PAYLOAD_INFO;
-
-/* Manages the request payload in the controlvm channel */
-static CONTROLVM_PAYLOAD_INFO ControlVm_payload_info;
+} controlvm_payload_info;
-static struct channel_header *Test_Vnic_channel;
-
-typedef struct {
- struct controlvm_message_header Dumpcapture_header;
- struct controlvm_message_header Gettextdump_header;
- struct controlvm_message_header Dumpcomplete_header;
- BOOL Gettextdump_outstanding;
+/* Manages the info for a CONTROLVM_DUMP_CAPTURESTATE /
+ * CONTROLVM_DUMP_GETTEXTDUMP / CONTROLVM_DUMP_COMPLETE conversation.
+ */
+static struct livedump_info {
+ struct controlvm_message_header dumpcapture_header;
+ struct controlvm_message_header gettextdump_header;
+ struct controlvm_message_header dumpcomplete_header;
+ BOOL gettextdump_outstanding;
u32 crc32;
ulong length;
atomic_t buffers_in_use;
ulong destination;
-} LIVEDUMP_INFO;
-/* Manages the info for a CONTROLVM_DUMP_CAPTURESTATE /
- * CONTROLVM_DUMP_GETTEXTDUMP / CONTROLVM_DUMP_COMPLETE conversation.
- */
-static LIVEDUMP_INFO LiveDump_info;
+} livedump_info;
/* The following globals are used to handle the scenario where we are unable to
* offload the payload from a controlvm message due to memory requirements. In
* this scenario, we simply stash the controlvm message, then attempt to
* process it again the next time controlvm_periodic_work() runs.
*/
-static struct controlvm_message ControlVm_Pending_Msg;
-static BOOL ControlVm_Pending_Msg_Valid = FALSE;
+static struct controlvm_message controlvm_pending_msg;
+static BOOL controlvm_pending_msg_valid = FALSE;
/* Pool of struct putfile_buffer_entry, for keeping track of pending (incoming)
* TRANSMIT_FILE PutFile payloads.
*/
-static struct kmem_cache *Putfile_buffer_list_pool;
-static const char Putfile_buffer_list_pool_name[] =
+static struct kmem_cache *putfile_buffer_list_pool;
+static const char putfile_buffer_list_pool_name[] =
"controlvm_putfile_buffer_list_pool";
/* This identifies a data buffer that has been received via a controlvm messages
*/
struct putfile_buffer_entry {
struct list_head next; /* putfile_buffer_entry list */
- PARSER_CONTEXT *parser_ctx; /* points to buffer containing input data */
+ struct parser_context *parser_ctx; /* points to input data buffer */
};
/* List of struct putfile_request *, via next_putfile_request member.
* Each entry in this list identifies an outstanding TRANSMIT_FILE
* conversation.
*/
-static LIST_HEAD(Putfile_request_list);
+static LIST_HEAD(putfile_request_list);
/* This describes a buffer and its current state of transfer (e.g., how many
* bytes have already been supplied as putfile data, and how many bytes are
*/
struct putfile_active_buffer {
/* a payload from a controlvm message, containing a file data buffer */
- PARSER_CONTEXT *parser_ctx;
+ struct parser_context *parser_ctx;
/* points within data area of parser_ctx to next byte of data */
u8 *pnext;
/* # bytes left from <pnext> to the end of this data buffer */
int completion_status;
};
-static atomic_t Visorchipset_cache_buffers_in_use = ATOMIC_INIT(0);
+static atomic_t visorchipset_cache_buffers_in_use = ATOMIC_INIT(0);
struct parahotplug_request {
struct list_head list;
struct controlvm_message msg;
};
-static LIST_HEAD(Parahotplug_request_list);
-static DEFINE_SPINLOCK(Parahotplug_request_list_lock); /* lock for above */
+static LIST_HEAD(parahotplug_request_list);
+static DEFINE_SPINLOCK(parahotplug_request_list_lock); /* lock for above */
static void parahotplug_process_list(void);
/* Manages the info for a CONTROLVM_DUMP_CAPTURESTATE /
* CONTROLVM_REPORTEVENT.
*/
-static struct visorchipset_busdev_notifiers BusDev_Server_Notifiers;
-static struct visorchipset_busdev_notifiers BusDev_Client_Notifiers;
+static struct visorchipset_busdev_notifiers busdev_server_notifiers;
+static struct visorchipset_busdev_notifiers busdev_client_notifiers;
-static void bus_create_response(ulong busNo, int response);
-static void bus_destroy_response(ulong busNo, int response);
-static void device_create_response(ulong busNo, ulong devNo, int response);
-static void device_destroy_response(ulong busNo, ulong devNo, int response);
-static void device_resume_response(ulong busNo, ulong devNo, int response);
+static void bus_create_response(ulong bus_no, int response);
+static void bus_destroy_response(ulong bus_no, int response);
+static void device_create_response(ulong bus_no, ulong dev_no, int response);
+static void device_destroy_response(ulong bus_no, ulong dev_no, int response);
+static void device_resume_response(ulong bus_no, ulong dev_no, int response);
-static struct visorchipset_busdev_responders BusDev_Responders = {
+static struct visorchipset_busdev_responders busdev_responders = {
.bus_create = bus_create_response,
.bus_destroy = bus_destroy_response,
.device_create = device_create_response,
};
/* info for /dev/visorchipset */
-static dev_t MajorDev = -1; /**< indicates major num for device */
+static dev_t major_dev = -1; /**< indicates major num for device */
/* prototypes for attributes */
static ssize_t toolaction_show(struct device *dev,
- struct device_attribute *attr, char *buf);
+ struct device_attribute *attr, char *buf);
static ssize_t toolaction_store(struct device *dev,
- struct device_attribute *attr, const char *buf, size_t count);
+ struct device_attribute *attr,
+ const char *buf, size_t count);
static DEVICE_ATTR_RW(toolaction);
static ssize_t boottotool_show(struct device *dev,
- struct device_attribute *attr, char *buf);
+ struct device_attribute *attr, char *buf);
static ssize_t boottotool_store(struct device *dev,
- struct device_attribute *attr, const char *buf, size_t count);
+ struct device_attribute *attr, const char *buf,
+ size_t count);
static DEVICE_ATTR_RW(boottotool);
static ssize_t error_show(struct device *dev, struct device_attribute *attr,
- char *buf);
+ char *buf);
static ssize_t error_store(struct device *dev, struct device_attribute *attr,
- const char *buf, size_t count);
+ const char *buf, size_t count);
static DEVICE_ATTR_RW(error);
static ssize_t textid_show(struct device *dev, struct device_attribute *attr,
- char *buf);
+ char *buf);
static ssize_t textid_store(struct device *dev, struct device_attribute *attr,
- const char *buf, size_t count);
+ const char *buf, size_t count);
static DEVICE_ATTR_RW(textid);
static ssize_t remaining_steps_show(struct device *dev,
- struct device_attribute *attr, char *buf);
+ struct device_attribute *attr, char *buf);
static ssize_t remaining_steps_store(struct device *dev,
- struct device_attribute *attr, const char *buf, size_t count);
+ struct device_attribute *attr,
+ const char *buf, size_t count);
static DEVICE_ATTR_RW(remaining_steps);
static ssize_t chipsetready_store(struct device *dev,
- struct device_attribute *attr, const char *buf, size_t count);
+ struct device_attribute *attr,
+ const char *buf, size_t count);
static DEVICE_ATTR_WO(chipsetready);
static ssize_t devicedisabled_store(struct device *dev,
- struct device_attribute *attr, const char *buf, size_t count);
+ struct device_attribute *attr,
+ const char *buf, size_t count);
static DEVICE_ATTR_WO(devicedisabled);
static ssize_t deviceenabled_store(struct device *dev,
- struct device_attribute *attr, const char *buf, size_t count);
+ struct device_attribute *attr,
+ const char *buf, size_t count);
static DEVICE_ATTR_WO(deviceenabled);
static struct attribute *visorchipset_install_attrs[] = {
};
/* /sys/devices/platform/visorchipset */
-static struct platform_device Visorchipset_platform_device = {
+static struct platform_device visorchipset_platform_device = {
.name = "visorchipset",
.id = -1,
.dev.groups = visorchipset_dev_groups,
};
/* Function prototypes */
-static void controlvm_respond(struct controlvm_message_header *msgHdr,
+static void controlvm_respond(struct controlvm_message_header *msg_hdr,
int response);
static void controlvm_respond_chipset_init(
- struct controlvm_message_header *msgHdr, int response,
+ struct controlvm_message_header *msg_hdr, int response,
enum ultra_chipset_feature features);
static void controlvm_respond_physdev_changestate(
- struct controlvm_message_header *msgHdr, int response,
+ struct controlvm_message_header *msg_hdr, int response,
struct spar_segment_state state);
static ssize_t toolaction_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
- u8 toolAction;
+ u8 tool_action;
- visorchannel_read(ControlVm_channel,
+ visorchannel_read(controlvm_channel,
offsetof(struct spar_controlvm_channel_protocol,
- tool_action), &toolAction, sizeof(u8));
- return scnprintf(buf, PAGE_SIZE, "%u\n", toolAction);
+ tool_action), &tool_action, sizeof(u8));
+ return scnprintf(buf, PAGE_SIZE, "%u\n", tool_action);
}
static ssize_t toolaction_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
- u8 toolAction;
+ u8 tool_action;
int ret;
- if (kstrtou8(buf, 10, &toolAction) != 0)
+ if (kstrtou8(buf, 10, &tool_action) != 0)
return -EINVAL;
- ret = visorchannel_write(ControlVm_channel,
- offsetof(struct spar_controlvm_channel_protocol, tool_action),
- &toolAction, sizeof(u8));
+ ret = visorchannel_write(controlvm_channel,
+ offsetof(struct spar_controlvm_channel_protocol,
+ tool_action),
+ &tool_action, sizeof(u8));
if (ret)
return ret;
struct device_attribute *attr,
char *buf)
{
- struct efi_spar_indication efiSparIndication;
+ struct efi_spar_indication efi_spar_indication;
- visorchannel_read(ControlVm_channel,
- offsetof(struct spar_controlvm_channel_protocol,
- efi_spar_ind), &efiSparIndication,
- sizeof(struct efi_spar_indication));
+ visorchannel_read(controlvm_channel,
+ offsetof(struct spar_controlvm_channel_protocol,
+ efi_spar_ind), &efi_spar_indication,
+ sizeof(struct efi_spar_indication));
return scnprintf(buf, PAGE_SIZE, "%u\n",
- efiSparIndication.boot_to_tool);
+ efi_spar_indication.boot_to_tool);
}
static ssize_t boottotool_store(struct device *dev,
const char *buf, size_t count)
{
int val, ret;
- struct efi_spar_indication efiSparIndication;
+ struct efi_spar_indication efi_spar_indication;
if (kstrtoint(buf, 10, &val) != 0)
return -EINVAL;
- efiSparIndication.boot_to_tool = val;
- ret = visorchannel_write(ControlVm_channel,
+ efi_spar_indication.boot_to_tool = val;
+ ret = visorchannel_write(controlvm_channel,
offsetof(struct spar_controlvm_channel_protocol,
- efi_spar_ind),
- &(efiSparIndication),
- sizeof(struct efi_spar_indication));
+ efi_spar_ind), &(efi_spar_indication),
+ sizeof(struct efi_spar_indication));
if (ret)
return ret;
}
static ssize_t error_show(struct device *dev, struct device_attribute *attr,
- char *buf)
+ char *buf)
{
u32 error;
- visorchannel_read(ControlVm_channel, offsetof(
- struct spar_controlvm_channel_protocol, installation_error),
- &error, sizeof(u32));
+ visorchannel_read(controlvm_channel,
+ offsetof(struct spar_controlvm_channel_protocol,
+ installation_error),
+ &error, sizeof(u32));
return scnprintf(buf, PAGE_SIZE, "%i\n", error);
}
static ssize_t error_store(struct device *dev, struct device_attribute *attr,
- const char *buf, size_t count)
+ const char *buf, size_t count)
{
u32 error;
int ret;
if (kstrtou32(buf, 10, &error) != 0)
return -EINVAL;
- ret = visorchannel_write(ControlVm_channel,
- offsetof(struct spar_controlvm_channel_protocol,
- installation_error),
- &error, sizeof(u32));
+ ret = visorchannel_write(controlvm_channel,
+ offsetof(struct spar_controlvm_channel_protocol,
+ installation_error),
+ &error, sizeof(u32));
if (ret)
return ret;
return count;
}
static ssize_t textid_show(struct device *dev, struct device_attribute *attr,
- char *buf)
+ char *buf)
{
- u32 textId;
+ u32 text_id;
- visorchannel_read(ControlVm_channel, offsetof(
- struct spar_controlvm_channel_protocol, installation_text_id),
- &textId, sizeof(u32));
- return scnprintf(buf, PAGE_SIZE, "%i\n", textId);
+ visorchannel_read(controlvm_channel,
+ offsetof(struct spar_controlvm_channel_protocol,
+ installation_text_id),
+ &text_id, sizeof(u32));
+ return scnprintf(buf, PAGE_SIZE, "%i\n", text_id);
}
static ssize_t textid_store(struct device *dev, struct device_attribute *attr,
- const char *buf, size_t count)
+ const char *buf, size_t count)
{
- u32 textId;
+ u32 text_id;
int ret;
- if (kstrtou32(buf, 10, &textId) != 0)
+ if (kstrtou32(buf, 10, &text_id) != 0)
return -EINVAL;
- ret = visorchannel_write(ControlVm_channel,
- offsetof(struct spar_controlvm_channel_protocol,
- installation_text_id),
- &textId, sizeof(u32));
+ ret = visorchannel_write(controlvm_channel,
+ offsetof(struct spar_controlvm_channel_protocol,
+ installation_text_id),
+ &text_id, sizeof(u32));
if (ret)
return ret;
return count;
}
-
static ssize_t remaining_steps_show(struct device *dev,
- struct device_attribute *attr, char *buf)
+ struct device_attribute *attr, char *buf)
{
- u16 remainingSteps;
+ u16 remaining_steps;
- visorchannel_read(ControlVm_channel,
- offsetof(struct spar_controlvm_channel_protocol,
- installation_remaining_steps),
- &remainingSteps,
- sizeof(u16));
- return scnprintf(buf, PAGE_SIZE, "%hu\n", remainingSteps);
+ visorchannel_read(controlvm_channel,
+ offsetof(struct spar_controlvm_channel_protocol,
+ installation_remaining_steps),
+ &remaining_steps, sizeof(u16));
+ return scnprintf(buf, PAGE_SIZE, "%hu\n", remaining_steps);
}
static ssize_t remaining_steps_store(struct device *dev,
- struct device_attribute *attr, const char *buf, size_t count)
+ struct device_attribute *attr,
+ const char *buf, size_t count)
{
- u16 remainingSteps;
+ u16 remaining_steps;
int ret;
- if (kstrtou16(buf, 10, &remainingSteps) != 0)
+ if (kstrtou16(buf, 10, &remaining_steps) != 0)
return -EINVAL;
- ret = visorchannel_write(ControlVm_channel,
- offsetof(struct spar_controlvm_channel_protocol,
- installation_remaining_steps),
- &remainingSteps, sizeof(u16));
+ ret = visorchannel_write(controlvm_channel,
+ offsetof(struct spar_controlvm_channel_protocol,
+ installation_remaining_steps),
+ &remaining_steps, sizeof(u16));
if (ret)
return ret;
return count;
}
-#if 0
-static void
-testUnicode(void)
-{
- wchar_t unicodeString[] = { 'a', 'b', 'c', 0 };
- char s[sizeof(unicodeString) * NLS_MAX_CHARSET_SIZE];
- wchar_t unicode2[99];
-
- /* NOTE: Either due to a bug, or feature I don't understand, the
- * kernel utf8_mbstowcs() and utf_wcstombs() do NOT copy the
- * trailed NUL byte!! REALLY!!!!! Arrrrgggghhhhh
- */
-
- LOGINF("sizeof(wchar_t) = %d", sizeof(wchar_t));
- LOGINF("utf8_wcstombs=%d",
- chrs = utf8_wcstombs(s, unicodeString, sizeof(s)));
- if (chrs >= 0)
- s[chrs] = '\0'; /* GRRRRRRRR */
- LOGINF("s='%s'", s);
- LOGINF("utf8_mbstowcs=%d", chrs = utf8_mbstowcs(unicode2, s, 100));
- if (chrs >= 0)
- unicode2[chrs] = 0; /* GRRRRRRRR */
- if (memcmp(unicodeString, unicode2, sizeof(unicodeString)) == 0)
- LOGINF("strings match... good");
- else
- LOGINF("strings did not match!!");
-}
-#endif
-
static void
-busInfo_clear(void *v)
+bus_info_clear(void *v)
{
struct visorchipset_bus_info *p = (struct visorchipset_bus_info *) (v);
- if (p->proc_object) {
- visor_proc_DestroyObject(p->proc_object);
- p->proc_object = NULL;
- }
kfree(p->name);
p->name = NULL;
}
static void
-devInfo_clear(void *v)
+dev_info_clear(void *v)
{
struct visorchipset_device_info *p =
(struct visorchipset_device_info *)(v);
struct visorchipset_busdev_responders *responders,
struct ultra_vbus_deviceinfo *driver_info)
{
- down(&NotifierLock);
- if (notifiers == NULL) {
- memset(&BusDev_Server_Notifiers, 0,
- sizeof(BusDev_Server_Notifiers));
+ down(¬ifier_lock);
+ if (!notifiers) {
+ memset(&busdev_server_notifiers, 0,
+ sizeof(busdev_server_notifiers));
serverregistered = 0; /* clear flag */
} else {
- BusDev_Server_Notifiers = *notifiers;
+ busdev_server_notifiers = *notifiers;
serverregistered = 1; /* set flag */
}
if (responders)
- *responders = BusDev_Responders;
+ *responders = busdev_responders;
if (driver_info)
bus_device_info_init(driver_info, "chipset", "visorchipset",
- VERSION, NULL);
+ VERSION, NULL);
- up(&NotifierLock);
+ up(¬ifier_lock);
}
EXPORT_SYMBOL_GPL(visorchipset_register_busdev_server);
struct visorchipset_busdev_responders *responders,
struct ultra_vbus_deviceinfo *driver_info)
{
- down(&NotifierLock);
- if (notifiers == NULL) {
- memset(&BusDev_Client_Notifiers, 0,
- sizeof(BusDev_Client_Notifiers));
+ down(¬ifier_lock);
+ if (!notifiers) {
+ memset(&busdev_client_notifiers, 0,
+ sizeof(busdev_client_notifiers));
clientregistered = 0; /* clear flag */
} else {
- BusDev_Client_Notifiers = *notifiers;
+ busdev_client_notifiers = *notifiers;
clientregistered = 1; /* set flag */
}
if (responders)
- *responders = BusDev_Responders;
+ *responders = busdev_responders;
if (driver_info)
bus_device_info_init(driver_info, "chipset(bolts)",
"visorchipset", VERSION, NULL);
- up(&NotifierLock);
+ up(¬ifier_lock);
}
EXPORT_SYMBOL_GPL(visorchipset_register_busdev_client);
struct visorchipset_bus_info *bi, *tmp_bi;
struct visorchipset_device_info *di, *tmp_di;
- list_for_each_entry_safe(bi, tmp_bi, &BusInfoList, entry) {
- busInfo_clear(bi);
+ list_for_each_entry_safe(bi, tmp_bi, &bus_info_list, entry) {
+ bus_info_clear(bi);
list_del(&bi->entry);
kfree(bi);
}
- list_for_each_entry_safe(di, tmp_di, &DevInfoList, entry) {
- devInfo_clear(di);
+ list_for_each_entry_safe(di, tmp_di, &dev_info_list, entry) {
+ dev_info_clear(di);
list_del(&di->entry);
kfree(di);
}
POSTCODE_LINUX_2(CHIPSET_INIT_ENTRY_PC, POSTCODE_SEVERITY_INFO);
if (chipset_inited) {
- LOGERR("CONTROLVM_CHIPSET_INIT Failed: Already Done.");
rc = -CONTROLVM_RESP_ERROR_ALREADY_DONE;
- goto Away;
+ goto cleanup;
}
chipset_inited = 1;
POSTCODE_LINUX_2(CHIPSET_INIT_EXIT_PC, POSTCODE_SEVERITY_INFO);
* features-aware driver. */
features |= ULTRA_CHIPSET_FEATURE_REPLY;
-Away:
+cleanup:
if (rc < 0)
cleanup_controlvm_structures();
if (inmsg->hdr.flags.response_expected)
static void
controlvm_init_response(struct controlvm_message *msg,
- struct controlvm_message_header *msgHdr, int response)
+ struct controlvm_message_header *msg_hdr, int response)
{
memset(msg, 0, sizeof(struct controlvm_message));
- memcpy(&msg->hdr, msgHdr, sizeof(struct controlvm_message_header));
+ memcpy(&msg->hdr, msg_hdr, sizeof(struct controlvm_message_header));
msg->hdr.payload_bytes = 0;
msg->hdr.payload_vm_offset = 0;
msg->hdr.payload_max_bytes = 0;
}
static void
-controlvm_respond(struct controlvm_message_header *msgHdr, int response)
+controlvm_respond(struct controlvm_message_header *msg_hdr, int response)
{
struct controlvm_message outmsg;
- controlvm_init_response(&outmsg, msgHdr, response);
+ controlvm_init_response(&outmsg, msg_hdr, response);
/* For DiagPool channel DEVICE_CHANGESTATE, we need to send
* back the deviceChangeState structure in the packet. */
- if (msgHdr->id == CONTROLVM_DEVICE_CHANGESTATE
- && g_DeviceChangeStatePacket.device_change_state.bus_no ==
- g_diagpoolBusNo
- && g_DeviceChangeStatePacket.device_change_state.dev_no ==
- g_diagpoolDevNo)
- outmsg.cmd = g_DeviceChangeStatePacket;
- if (outmsg.hdr.flags.test_message == 1) {
- LOGINF("%s controlvm_msg=0x%x response=%d for test message",
- __func__, outmsg.hdr.id, response);
+ if (msg_hdr->id == CONTROLVM_DEVICE_CHANGESTATE &&
+ g_devicechangestate_packet.device_change_state.bus_no ==
+ g_diagpool_bus_no &&
+ g_devicechangestate_packet.device_change_state.dev_no ==
+ g_diagpool_dev_no)
+ outmsg.cmd = g_devicechangestate_packet;
+ if (outmsg.hdr.flags.test_message == 1)
return;
- }
- if (!visorchannel_signalinsert(ControlVm_channel,
+
+ if (!visorchannel_signalinsert(controlvm_channel,
CONTROLVM_QUEUE_REQUEST, &outmsg)) {
- LOGERR("signalinsert failed!");
return;
}
}
static void
-controlvm_respond_chipset_init(struct controlvm_message_header *msgHdr,
+controlvm_respond_chipset_init(struct controlvm_message_header *msg_hdr,
int response,
enum ultra_chipset_feature features)
{
struct controlvm_message outmsg;
- controlvm_init_response(&outmsg, msgHdr, response);
+ controlvm_init_response(&outmsg, msg_hdr, response);
outmsg.cmd.init_chipset.features = features;
- if (!visorchannel_signalinsert(ControlVm_channel,
+ if (!visorchannel_signalinsert(controlvm_channel,
CONTROLVM_QUEUE_REQUEST, &outmsg)) {
- LOGERR("signalinsert failed!");
return;
}
}
static void controlvm_respond_physdev_changestate(
- struct controlvm_message_header *msgHdr, int response,
+ struct controlvm_message_header *msg_hdr, int response,
struct spar_segment_state state)
{
struct controlvm_message outmsg;
- controlvm_init_response(&outmsg, msgHdr, response);
+ controlvm_init_response(&outmsg, msg_hdr, response);
outmsg.cmd.device_change_state.state = state;
outmsg.cmd.device_change_state.flags.phys_device = 1;
- if (!visorchannel_signalinsert(ControlVm_channel,
+ if (!visorchannel_signalinsert(controlvm_channel,
CONTROLVM_QUEUE_REQUEST, &outmsg)) {
- LOGERR("signalinsert failed!");
return;
}
}
visorchipset_save_message(struct controlvm_message *msg,
enum crash_obj_type type)
{
- u32 localSavedCrashMsgOffset;
- u16 localSavedCrashMsgCount;
+ u32 crash_msg_offset;
+ u16 crash_msg_count;
/* get saved message count */
- if (visorchannel_read(ControlVm_channel,
+ if (visorchannel_read(controlvm_channel,
offsetof(struct spar_controlvm_channel_protocol,
saved_crash_message_count),
- &localSavedCrashMsgCount, sizeof(u16)) < 0) {
- LOGERR("failed to get Saved Message Count");
+ &crash_msg_count, sizeof(u16)) < 0) {
POSTCODE_LINUX_2(CRASH_DEV_CTRL_RD_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
}
- if (localSavedCrashMsgCount != CONTROLVM_CRASHMSG_MAX) {
- LOGERR("Saved Message Count incorrect %d",
- localSavedCrashMsgCount);
+ if (crash_msg_count != CONTROLVM_CRASHMSG_MAX) {
POSTCODE_LINUX_3(CRASH_DEV_COUNT_FAILURE_PC,
- localSavedCrashMsgCount,
+ crash_msg_count,
POSTCODE_SEVERITY_ERR);
return;
}
/* get saved crash message offset */
- if (visorchannel_read(ControlVm_channel,
+ if (visorchannel_read(controlvm_channel,
offsetof(struct spar_controlvm_channel_protocol,
saved_crash_message_offset),
- &localSavedCrashMsgOffset, sizeof(u32)) < 0) {
- LOGERR("failed to get Saved Message Offset");
+ &crash_msg_offset, sizeof(u32)) < 0) {
POSTCODE_LINUX_2(CRASH_DEV_CTRL_RD_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
}
if (type == CRASH_BUS) {
- if (visorchannel_write(ControlVm_channel,
- localSavedCrashMsgOffset,
+ if (visorchannel_write(controlvm_channel,
+ crash_msg_offset,
msg,
sizeof(struct controlvm_message)) < 0) {
- LOGERR("SAVE_MSG_BUS_FAILURE: Failed to write CrashCreateBusMsg!");
POSTCODE_LINUX_2(SAVE_MSG_BUS_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
}
} else {
- if (visorchannel_write(ControlVm_channel,
- localSavedCrashMsgOffset +
+ if (visorchannel_write(controlvm_channel,
+ crash_msg_offset +
sizeof(struct controlvm_message), msg,
sizeof(struct controlvm_message)) < 0) {
- LOGERR("SAVE_MSG_DEV_FAILURE: Failed to write CrashCreateDevMsg!");
POSTCODE_LINUX_2(SAVE_MSG_DEV_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
EXPORT_SYMBOL_GPL(visorchipset_save_message);
static void
-bus_responder(enum controlvm_id cmdId, ulong busNo, int response)
+bus_responder(enum controlvm_id cmd_id, ulong bus_no, int response)
{
struct visorchipset_bus_info *p = NULL;
BOOL need_clear = FALSE;
- p = findbus(&BusInfoList, busNo);
- if (!p) {
- LOGERR("internal error busNo=%lu", busNo);
+ p = findbus(&bus_info_list, bus_no);
+ if (!p)
return;
- }
+
if (response < 0) {
- if ((cmdId == CONTROLVM_BUS_CREATE) &&
+ if ((cmd_id == CONTROLVM_BUS_CREATE) &&
(response != (-CONTROLVM_RESP_ERROR_ALREADY_DONE)))
/* undo the row we just created... */
- delbusdevices(&DevInfoList, busNo);
+ delbusdevices(&dev_info_list, bus_no);
} else {
- if (cmdId == CONTROLVM_BUS_CREATE)
+ if (cmd_id == CONTROLVM_BUS_CREATE)
p->state.created = 1;
- if (cmdId == CONTROLVM_BUS_DESTROY)
+ if (cmd_id == CONTROLVM_BUS_DESTROY)
need_clear = TRUE;
}
- if (p->pending_msg_hdr.id == CONTROLVM_INVALID) {
- LOGERR("bus_responder no pending msg");
+ if (p->pending_msg_hdr.id == CONTROLVM_INVALID)
return; /* no controlvm response needed */
- }
- if (p->pending_msg_hdr.id != (u32) cmdId) {
- LOGERR("expected=%d, found=%d", cmdId, p->pending_msg_hdr.id);
+ if (p->pending_msg_hdr.id != (u32)cmd_id)
return;
- }
controlvm_respond(&p->pending_msg_hdr, response);
p->pending_msg_hdr.id = CONTROLVM_INVALID;
if (need_clear) {
- busInfo_clear(p);
- delbusdevices(&DevInfoList, busNo);
+ bus_info_clear(p);
+ delbusdevices(&dev_info_list, bus_no);
}
}
static void
-device_changestate_responder(enum controlvm_id cmdId,
- ulong busNo, ulong devNo, int response,
- struct spar_segment_state responseState)
+device_changestate_responder(enum controlvm_id cmd_id,
+ ulong bus_no, ulong dev_no, int response,
+ struct spar_segment_state response_state)
{
struct visorchipset_device_info *p = NULL;
struct controlvm_message outmsg;
- p = finddevice(&DevInfoList, busNo, devNo);
- if (!p) {
- LOGERR("internal error; busNo=%lu, devNo=%lu", busNo, devNo);
+ p = finddevice(&dev_info_list, bus_no, dev_no);
+ if (!p)
return;
- }
- if (p->pending_msg_hdr.id == CONTROLVM_INVALID) {
- LOGERR("device_responder no pending msg");
+ if (p->pending_msg_hdr.id == CONTROLVM_INVALID)
return; /* no controlvm response needed */
- }
- if (p->pending_msg_hdr.id != cmdId) {
- LOGERR("expected=%d, found=%d", cmdId, p->pending_msg_hdr.id);
+ if (p->pending_msg_hdr.id != cmd_id)
return;
- }
controlvm_init_response(&outmsg, &p->pending_msg_hdr, response);
- outmsg.cmd.device_change_state.bus_no = busNo;
- outmsg.cmd.device_change_state.dev_no = devNo;
- outmsg.cmd.device_change_state.state = responseState;
+ outmsg.cmd.device_change_state.bus_no = bus_no;
+ outmsg.cmd.device_change_state.dev_no = dev_no;
+ outmsg.cmd.device_change_state.state = response_state;
- if (!visorchannel_signalinsert(ControlVm_channel,
- CONTROLVM_QUEUE_REQUEST, &outmsg)) {
- LOGERR("signalinsert failed!");
+ if (!visorchannel_signalinsert(controlvm_channel,
+ CONTROLVM_QUEUE_REQUEST, &outmsg))
return;
- }
p->pending_msg_hdr.id = CONTROLVM_INVALID;
}
static void
-device_responder(enum controlvm_id cmdId, ulong busNo, ulong devNo,
+device_responder(enum controlvm_id cmd_id, ulong bus_no, ulong dev_no,
int response)
{
struct visorchipset_device_info *p = NULL;
BOOL need_clear = FALSE;
- p = finddevice(&DevInfoList, busNo, devNo);
- if (!p) {
- LOGERR("internal error; busNo=%lu, devNo=%lu", busNo, devNo);
+ p = finddevice(&dev_info_list, bus_no, dev_no);
+ if (!p)
return;
- }
if (response >= 0) {
- if (cmdId == CONTROLVM_DEVICE_CREATE)
+ if (cmd_id == CONTROLVM_DEVICE_CREATE)
p->state.created = 1;
- if (cmdId == CONTROLVM_DEVICE_DESTROY)
+ if (cmd_id == CONTROLVM_DEVICE_DESTROY)
need_clear = TRUE;
}
- if (p->pending_msg_hdr.id == CONTROLVM_INVALID) {
- LOGERR("device_responder no pending msg");
+ if (p->pending_msg_hdr.id == CONTROLVM_INVALID)
return; /* no controlvm response needed */
- }
- if (p->pending_msg_hdr.id != (u32) cmdId) {
- LOGERR("expected=%d, found=%d", cmdId, p->pending_msg_hdr.id);
+
+ if (p->pending_msg_hdr.id != (u32)cmd_id)
return;
- }
+
controlvm_respond(&p->pending_msg_hdr, response);
p->pending_msg_hdr.id = CONTROLVM_INVALID;
if (need_clear)
- devInfo_clear(p);
+ dev_info_clear(p);
}
static void
-bus_epilog(u32 busNo,
- u32 cmd, struct controlvm_message_header *msgHdr,
- int response, BOOL needResponse)
+bus_epilog(u32 bus_no,
+ u32 cmd, struct controlvm_message_header *msg_hdr,
+ int response, BOOL need_response)
{
BOOL notified = FALSE;
- struct visorchipset_bus_info *pBusInfo = findbus(&BusInfoList, busNo);
+ struct visorchipset_bus_info *bus_info = findbus(&bus_info_list,
+ bus_no);
- if (!pBusInfo) {
- LOGERR("HUH? bad busNo=%d", busNo);
+ if (!bus_info)
return;
- }
- if (needResponse) {
- memcpy(&pBusInfo->pending_msg_hdr, msgHdr,
+
+ if (need_response) {
+ memcpy(&bus_info->pending_msg_hdr, msg_hdr,
sizeof(struct controlvm_message_header));
- } else
- pBusInfo->pending_msg_hdr.id = CONTROLVM_INVALID;
+ } else {
+ bus_info->pending_msg_hdr.id = CONTROLVM_INVALID;
+ }
- down(&NotifierLock);
+ down(¬ifier_lock);
if (response == CONTROLVM_RESP_SUCCESS) {
switch (cmd) {
case CONTROLVM_BUS_CREATE:
* either server or client devices
* - BusDev_Client can handle ONLY client
* devices */
- if (BusDev_Server_Notifiers.bus_create) {
- (*BusDev_Server_Notifiers.bus_create) (busNo);
+ if (busdev_server_notifiers.bus_create) {
+ (*busdev_server_notifiers.bus_create) (bus_no);
notified = TRUE;
}
- if ((!pBusInfo->flags.server) /*client */ &&
- BusDev_Client_Notifiers.bus_create) {
- (*BusDev_Client_Notifiers.bus_create) (busNo);
+ if ((!bus_info->flags.server) /*client */ &&
+ busdev_client_notifiers.bus_create) {
+ (*busdev_client_notifiers.bus_create) (bus_no);
notified = TRUE;
}
break;
case CONTROLVM_BUS_DESTROY:
- if (BusDev_Server_Notifiers.bus_destroy) {
- (*BusDev_Server_Notifiers.bus_destroy) (busNo);
+ if (busdev_server_notifiers.bus_destroy) {
+ (*busdev_server_notifiers.bus_destroy) (bus_no);
notified = TRUE;
}
- if ((!pBusInfo->flags.server) /*client */ &&
- BusDev_Client_Notifiers.bus_destroy) {
- (*BusDev_Client_Notifiers.bus_destroy) (busNo);
+ if ((!bus_info->flags.server) /*client */ &&
+ busdev_client_notifiers.bus_destroy) {
+ (*busdev_client_notifiers.bus_destroy) (bus_no);
notified = TRUE;
}
break;
*/
;
else
- bus_responder(cmd, busNo, response);
- up(&NotifierLock);
+ bus_responder(cmd, bus_no, response);
+ up(¬ifier_lock);
}
static void
-device_epilog(u32 busNo, u32 devNo, struct spar_segment_state state, u32 cmd,
- struct controlvm_message_header *msgHdr, int response,
- BOOL needResponse, BOOL for_visorbus)
+device_epilog(u32 bus_no, u32 dev_no, struct spar_segment_state state, u32 cmd,
+ struct controlvm_message_header *msg_hdr, int response,
+ BOOL need_response, BOOL for_visorbus)
{
struct visorchipset_busdev_notifiers *notifiers = NULL;
BOOL notified = FALSE;
- struct visorchipset_device_info *pDevInfo =
- finddevice(&DevInfoList, busNo, devNo);
+ struct visorchipset_device_info *dev_info =
+ finddevice(&dev_info_list, bus_no, dev_no);
char *envp[] = {
"SPARSP_DIAGPOOL_PAUSED_STATE = 1",
NULL
};
- if (!pDevInfo) {
- LOGERR("HUH? bad busNo=%d, devNo=%d", busNo, devNo);
+ if (!dev_info)
return;
- }
+
if (for_visorbus)
- notifiers = &BusDev_Server_Notifiers;
+ notifiers = &busdev_server_notifiers;
else
- notifiers = &BusDev_Client_Notifiers;
- if (needResponse) {
- memcpy(&pDevInfo->pending_msg_hdr, msgHdr,
+ notifiers = &busdev_client_notifiers;
+ if (need_response) {
+ memcpy(&dev_info->pending_msg_hdr, msg_hdr,
sizeof(struct controlvm_message_header));
- } else
- pDevInfo->pending_msg_hdr.id = CONTROLVM_INVALID;
+ } else {
+ dev_info->pending_msg_hdr.id = CONTROLVM_INVALID;
+ }
- down(&NotifierLock);
+ down(¬ifier_lock);
if (response >= 0) {
switch (cmd) {
case CONTROLVM_DEVICE_CREATE:
if (notifiers->device_create) {
- (*notifiers->device_create) (busNo, devNo);
+ (*notifiers->device_create) (bus_no, dev_no);
notified = TRUE;
}
break;
state.operating ==
segment_state_running.operating) {
if (notifiers->device_resume) {
- (*notifiers->device_resume) (busNo,
- devNo);
+ (*notifiers->device_resume) (bus_no,
+ dev_no);
notified = TRUE;
}
}
* where server is lost
*/
if (notifiers->device_pause) {
- (*notifiers->device_pause) (busNo,
- devNo);
+ (*notifiers->device_pause) (bus_no,
+ dev_no);
notified = TRUE;
}
} else if (state.alive == segment_state_paused.alive &&
/* this is lite pause where channel is
* still valid just 'pause' of it
*/
- if (busNo == g_diagpoolBusNo
- && devNo == g_diagpoolDevNo) {
- LOGINF("DEVICE_CHANGESTATE(DiagpoolChannel busNo=%d devNo=%d is pausing...)",
- busNo, devNo);
+ if (bus_no == g_diagpool_bus_no &&
+ dev_no == g_diagpool_dev_no) {
/* this will trigger the
* diag_shutdown.sh script in
* the visorchipset hotplug */
kobject_uevent_env
- (&Visorchipset_platform_device.dev.
+ (&visorchipset_platform_device.dev.
kobj, KOBJ_ONLINE, envp);
}
}
break;
case CONTROLVM_DEVICE_DESTROY:
if (notifiers->device_destroy) {
- (*notifiers->device_destroy) (busNo, devNo);
+ (*notifiers->device_destroy) (bus_no, dev_no);
notified = TRUE;
}
break;
*/
;
else
- device_responder(cmd, busNo, devNo, response);
- up(&NotifierLock);
+ device_responder(cmd, bus_no, dev_no, response);
+ up(¬ifier_lock);
}
static void
bus_create(struct controlvm_message *inmsg)
{
struct controlvm_message_packet *cmd = &inmsg->cmd;
- ulong busNo = cmd->create_bus.bus_no;
+ ulong bus_no = cmd->create_bus.bus_no;
int rc = CONTROLVM_RESP_SUCCESS;
- struct visorchipset_bus_info *pBusInfo = NULL;
-
+ struct visorchipset_bus_info *bus_info = NULL;
- pBusInfo = findbus(&BusInfoList, busNo);
- if (pBusInfo && (pBusInfo->state.created == 1)) {
- LOGERR("CONTROLVM_BUS_CREATE Failed: bus %lu already exists",
- busNo);
- POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, busNo,
+ bus_info = findbus(&bus_info_list, bus_no);
+ if (bus_info && (bus_info->state.created == 1)) {
+ POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, bus_no,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_ALREADY_DONE;
- goto Away;
+ goto cleanup;
}
- pBusInfo = kzalloc(sizeof(struct visorchipset_bus_info), GFP_KERNEL);
- if (pBusInfo == NULL) {
- LOGERR("CONTROLVM_BUS_CREATE Failed: bus %lu kzalloc failed",
- busNo);
- POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, busNo,
+ bus_info = kzalloc(sizeof(*bus_info), GFP_KERNEL);
+ if (!bus_info) {
+ POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, bus_no,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_KMALLOC_FAILED;
- goto Away;
+ goto cleanup;
}
- INIT_LIST_HEAD(&pBusInfo->entry);
- pBusInfo->bus_no = busNo;
- pBusInfo->dev_no = cmd->create_bus.dev_count;
+ INIT_LIST_HEAD(&bus_info->entry);
+ bus_info->bus_no = bus_no;
+ bus_info->dev_no = cmd->create_bus.dev_count;
- POSTCODE_LINUX_3(BUS_CREATE_ENTRY_PC, busNo, POSTCODE_SEVERITY_INFO);
+ POSTCODE_LINUX_3(BUS_CREATE_ENTRY_PC, bus_no, POSTCODE_SEVERITY_INFO);
if (inmsg->hdr.flags.test_message == 1)
- pBusInfo->chan_info.addr_type = ADDRTYPE_LOCALTEST;
+ bus_info->chan_info.addr_type = ADDRTYPE_LOCALTEST;
else
- pBusInfo->chan_info.addr_type = ADDRTYPE_LOCALPHYSICAL;
+ bus_info->chan_info.addr_type = ADDRTYPE_LOCALPHYSICAL;
- pBusInfo->flags.server = inmsg->hdr.flags.server;
- pBusInfo->chan_info.channel_addr = cmd->create_bus.channel_addr;
- pBusInfo->chan_info.n_channel_bytes = cmd->create_bus.channel_bytes;
- pBusInfo->chan_info.channel_type_uuid =
+ bus_info->flags.server = inmsg->hdr.flags.server;
+ bus_info->chan_info.channel_addr = cmd->create_bus.channel_addr;
+ bus_info->chan_info.n_channel_bytes = cmd->create_bus.channel_bytes;
+ bus_info->chan_info.channel_type_uuid =
cmd->create_bus.bus_data_type_uuid;
- pBusInfo->chan_info.channel_inst_uuid = cmd->create_bus.bus_inst_uuid;
+ bus_info->chan_info.channel_inst_uuid = cmd->create_bus.bus_inst_uuid;
- list_add(&pBusInfo->entry, &BusInfoList);
+ list_add(&bus_info->entry, &bus_info_list);
- POSTCODE_LINUX_3(BUS_CREATE_EXIT_PC, busNo, POSTCODE_SEVERITY_INFO);
+ POSTCODE_LINUX_3(BUS_CREATE_EXIT_PC, bus_no, POSTCODE_SEVERITY_INFO);
-Away:
- bus_epilog(busNo, CONTROLVM_BUS_CREATE, &inmsg->hdr,
+cleanup:
+ bus_epilog(bus_no, CONTROLVM_BUS_CREATE, &inmsg->hdr,
rc, inmsg->hdr.flags.response_expected == 1);
}
bus_destroy(struct controlvm_message *inmsg)
{
struct controlvm_message_packet *cmd = &inmsg->cmd;
- ulong busNo = cmd->destroy_bus.bus_no;
- struct visorchipset_bus_info *pBusInfo;
+ ulong bus_no = cmd->destroy_bus.bus_no;
+ struct visorchipset_bus_info *bus_info;
int rc = CONTROLVM_RESP_SUCCESS;
- pBusInfo = findbus(&BusInfoList, busNo);
- if (!pBusInfo) {
- LOGERR("CONTROLVM_BUS_DESTROY Failed: bus %lu invalid", busNo);
+ bus_info = findbus(&bus_info_list, bus_no);
+ if (!bus_info)
rc = -CONTROLVM_RESP_ERROR_BUS_INVALID;
- goto Away;
- }
- if (pBusInfo->state.created == 0) {
- LOGERR("CONTROLVM_BUS_DESTROY Failed: bus %lu already destroyed",
- busNo);
+ else if (bus_info->state.created == 0)
rc = -CONTROLVM_RESP_ERROR_ALREADY_DONE;
- goto Away;
- }
-Away:
- bus_epilog(busNo, CONTROLVM_BUS_DESTROY, &inmsg->hdr,
+ bus_epilog(bus_no, CONTROLVM_BUS_DESTROY, &inmsg->hdr,
rc, inmsg->hdr.flags.response_expected == 1);
}
static void
-bus_configure(struct controlvm_message *inmsg, PARSER_CONTEXT *parser_ctx)
+bus_configure(struct controlvm_message *inmsg,
+ struct parser_context *parser_ctx)
{
struct controlvm_message_packet *cmd = &inmsg->cmd;
- ulong busNo = cmd->configure_bus.bus_no;
- struct visorchipset_bus_info *pBusInfo = NULL;
+ ulong bus_no = cmd->configure_bus.bus_no;
+ struct visorchipset_bus_info *bus_info = NULL;
int rc = CONTROLVM_RESP_SUCCESS;
char s[99];
- busNo = cmd->configure_bus.bus_no;
- POSTCODE_LINUX_3(BUS_CONFIGURE_ENTRY_PC, busNo, POSTCODE_SEVERITY_INFO);
+ bus_no = cmd->configure_bus.bus_no;
+ POSTCODE_LINUX_3(BUS_CONFIGURE_ENTRY_PC, bus_no,
+ POSTCODE_SEVERITY_INFO);
- pBusInfo = findbus(&BusInfoList, busNo);
- if (!pBusInfo) {
- LOGERR("CONTROLVM_BUS_CONFIGURE Failed: bus %lu invalid",
- busNo);
- POSTCODE_LINUX_3(BUS_CONFIGURE_FAILURE_PC, busNo,
+ bus_info = findbus(&bus_info_list, bus_no);
+ if (!bus_info) {
+ POSTCODE_LINUX_3(BUS_CONFIGURE_FAILURE_PC, bus_no,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_BUS_INVALID;
- goto Away;
- }
- if (pBusInfo->state.created == 0) {
- LOGERR("CONTROLVM_BUS_CONFIGURE Failed: Invalid bus %lu - not created yet",
- busNo);
- POSTCODE_LINUX_3(BUS_CONFIGURE_FAILURE_PC, busNo,
+ } else if (bus_info->state.created == 0) {
+ POSTCODE_LINUX_3(BUS_CONFIGURE_FAILURE_PC, bus_no,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_BUS_INVALID;
- goto Away;
- }
- /* TBD - add this check to other commands also... */
- if (pBusInfo->pending_msg_hdr.id != CONTROLVM_INVALID) {
- LOGERR("CONTROLVM_BUS_CONFIGURE Failed: bus %lu MsgId=%u outstanding",
- busNo, (uint) pBusInfo->pending_msg_hdr.id);
- POSTCODE_LINUX_3(BUS_CONFIGURE_FAILURE_PC, busNo,
+ } else if (bus_info->pending_msg_hdr.id != CONTROLVM_INVALID) {
+ POSTCODE_LINUX_3(BUS_CONFIGURE_FAILURE_PC, bus_no,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_MESSAGE_ID_INVALID_FOR_CLIENT;
- goto Away;
- }
-
- pBusInfo->partition_handle = cmd->configure_bus.guest_handle;
- pBusInfo->partition_uuid = parser_id_get(parser_ctx);
- parser_param_start(parser_ctx, PARSERSTRING_NAME);
- pBusInfo->name = parser_string_get(parser_ctx);
+ } else {
+ bus_info->partition_handle = cmd->configure_bus.guest_handle;
+ bus_info->partition_uuid = parser_id_get(parser_ctx);
+ parser_param_start(parser_ctx, PARSERSTRING_NAME);
+ bus_info->name = parser_string_get(parser_ctx);
- visorchannel_uuid_id(&pBusInfo->partition_uuid, s);
- POSTCODE_LINUX_3(BUS_CONFIGURE_EXIT_PC, busNo, POSTCODE_SEVERITY_INFO);
-Away:
- bus_epilog(busNo, CONTROLVM_BUS_CONFIGURE, &inmsg->hdr,
+ visorchannel_uuid_id(&bus_info->partition_uuid, s);
+ POSTCODE_LINUX_3(BUS_CONFIGURE_EXIT_PC, bus_no,
+ POSTCODE_SEVERITY_INFO);
+ }
+ bus_epilog(bus_no, CONTROLVM_BUS_CONFIGURE, &inmsg->hdr,
rc, inmsg->hdr.flags.response_expected == 1);
}
my_device_create(struct controlvm_message *inmsg)
{
struct controlvm_message_packet *cmd = &inmsg->cmd;
- ulong busNo = cmd->create_device.bus_no;
- ulong devNo = cmd->create_device.dev_no;
- struct visorchipset_device_info *pDevInfo = NULL;
- struct visorchipset_bus_info *pBusInfo = NULL;
+ ulong bus_no = cmd->create_device.bus_no;
+ ulong dev_no = cmd->create_device.dev_no;
+ struct visorchipset_device_info *dev_info = NULL;
+ struct visorchipset_bus_info *bus_info = NULL;
int rc = CONTROLVM_RESP_SUCCESS;
- pDevInfo = finddevice(&DevInfoList, busNo, devNo);
- if (pDevInfo && (pDevInfo->state.created == 1)) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: busNo=%lu, devNo=%lu already exists",
- busNo, devNo);
- POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, devNo, busNo,
+ dev_info = finddevice(&dev_info_list, bus_no, dev_no);
+ if (dev_info && (dev_info->state.created == 1)) {
+ POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_ALREADY_DONE;
- goto Away;
+ goto cleanup;
}
- pBusInfo = findbus(&BusInfoList, busNo);
- if (!pBusInfo) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: Invalid bus %lu - out of range",
- busNo);
- POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, devNo, busNo,
+ bus_info = findbus(&bus_info_list, bus_no);
+ if (!bus_info) {
+ POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_BUS_INVALID;
- goto Away;
+ goto cleanup;
}
- if (pBusInfo->state.created == 0) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: Invalid bus %lu - not created yet",
- busNo);
- POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, devNo, busNo,
+ if (bus_info->state.created == 0) {
+ POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_BUS_INVALID;
- goto Away;
+ goto cleanup;
}
- pDevInfo = kzalloc(sizeof(struct visorchipset_device_info), GFP_KERNEL);
- if (pDevInfo == NULL) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: busNo=%lu, devNo=%lu kmaloc failed",
- busNo, devNo);
- POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, devNo, busNo,
+ dev_info = kzalloc(sizeof(*dev_info), GFP_KERNEL);
+ if (!dev_info) {
+ POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_KMALLOC_FAILED;
- goto Away;
+ goto cleanup;
}
- INIT_LIST_HEAD(&pDevInfo->entry);
- pDevInfo->bus_no = busNo;
- pDevInfo->dev_no = devNo;
- pDevInfo->dev_inst_uuid = cmd->create_device.dev_inst_uuid;
- POSTCODE_LINUX_4(DEVICE_CREATE_ENTRY_PC, devNo, busNo,
+ INIT_LIST_HEAD(&dev_info->entry);
+ dev_info->bus_no = bus_no;
+ dev_info->dev_no = dev_no;
+ dev_info->dev_inst_uuid = cmd->create_device.dev_inst_uuid;
+ POSTCODE_LINUX_4(DEVICE_CREATE_ENTRY_PC, dev_no, bus_no,
POSTCODE_SEVERITY_INFO);
if (inmsg->hdr.flags.test_message == 1)
- pDevInfo->chan_info.addr_type = ADDRTYPE_LOCALTEST;
+ dev_info->chan_info.addr_type = ADDRTYPE_LOCALTEST;
else
- pDevInfo->chan_info.addr_type = ADDRTYPE_LOCALPHYSICAL;
- pDevInfo->chan_info.channel_addr = cmd->create_device.channel_addr;
- pDevInfo->chan_info.n_channel_bytes = cmd->create_device.channel_bytes;
- pDevInfo->chan_info.channel_type_uuid =
+ dev_info->chan_info.addr_type = ADDRTYPE_LOCALPHYSICAL;
+ dev_info->chan_info.channel_addr = cmd->create_device.channel_addr;
+ dev_info->chan_info.n_channel_bytes = cmd->create_device.channel_bytes;
+ dev_info->chan_info.channel_type_uuid =
cmd->create_device.data_type_uuid;
- pDevInfo->chan_info.intr = cmd->create_device.intr;
- list_add(&pDevInfo->entry, &DevInfoList);
- POSTCODE_LINUX_4(DEVICE_CREATE_EXIT_PC, devNo, busNo,
+ dev_info->chan_info.intr = cmd->create_device.intr;
+ list_add(&dev_info->entry, &dev_info_list);
+ POSTCODE_LINUX_4(DEVICE_CREATE_EXIT_PC, dev_no, bus_no,
POSTCODE_SEVERITY_INFO);
-Away:
+cleanup:
/* get the bus and devNo for DiagPool channel */
- if (pDevInfo &&
- is_diagpool_channel(pDevInfo->chan_info.channel_type_uuid)) {
- g_diagpoolBusNo = busNo;
- g_diagpoolDevNo = devNo;
- LOGINF("CONTROLVM_DEVICE_CREATE for DiagPool channel: busNo=%lu, devNo=%lu",
- g_diagpoolBusNo, g_diagpoolDevNo);
- }
- device_epilog(busNo, devNo, segment_state_running,
+ if (dev_info &&
+ is_diagpool_channel(dev_info->chan_info.channel_type_uuid)) {
+ g_diagpool_bus_no = bus_no;
+ g_diagpool_dev_no = dev_no;
+ }
+ device_epilog(bus_no, dev_no, segment_state_running,
CONTROLVM_DEVICE_CREATE, &inmsg->hdr, rc,
inmsg->hdr.flags.response_expected == 1,
- FOR_VISORBUS(pDevInfo->chan_info.channel_type_uuid));
+ FOR_VISORBUS(dev_info->chan_info.channel_type_uuid));
}
static void
my_device_changestate(struct controlvm_message *inmsg)
{
struct controlvm_message_packet *cmd = &inmsg->cmd;
- ulong busNo = cmd->device_change_state.bus_no;
- ulong devNo = cmd->device_change_state.dev_no;
+ ulong bus_no = cmd->device_change_state.bus_no;
+ ulong dev_no = cmd->device_change_state.dev_no;
struct spar_segment_state state = cmd->device_change_state.state;
- struct visorchipset_device_info *pDevInfo = NULL;
+ struct visorchipset_device_info *dev_info = NULL;
int rc = CONTROLVM_RESP_SUCCESS;
- pDevInfo = finddevice(&DevInfoList, busNo, devNo);
- if (!pDevInfo) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE Failed: busNo=%lu, devNo=%lu invalid (doesn't exist)",
- busNo, devNo);
- POSTCODE_LINUX_4(DEVICE_CHANGESTATE_FAILURE_PC, devNo, busNo,
+ dev_info = finddevice(&dev_info_list, bus_no, dev_no);
+ if (!dev_info) {
+ POSTCODE_LINUX_4(DEVICE_CHANGESTATE_FAILURE_PC, dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_DEVICE_INVALID;
- goto Away;
- }
- if (pDevInfo->state.created == 0) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE Failed: busNo=%lu, devNo=%lu invalid (not created)",
- busNo, devNo);
- POSTCODE_LINUX_4(DEVICE_CHANGESTATE_FAILURE_PC, devNo, busNo,
+ } else if (dev_info->state.created == 0) {
+ POSTCODE_LINUX_4(DEVICE_CHANGESTATE_FAILURE_PC, dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_DEVICE_INVALID;
}
-Away:
- if ((rc >= CONTROLVM_RESP_SUCCESS) && pDevInfo)
- device_epilog(busNo, devNo, state, CONTROLVM_DEVICE_CHANGESTATE,
- &inmsg->hdr, rc,
+ if ((rc >= CONTROLVM_RESP_SUCCESS) && dev_info)
+ device_epilog(bus_no, dev_no, state,
+ CONTROLVM_DEVICE_CHANGESTATE, &inmsg->hdr, rc,
inmsg->hdr.flags.response_expected == 1,
FOR_VISORBUS(
- pDevInfo->chan_info.channel_type_uuid));
+ dev_info->chan_info.channel_type_uuid));
}
static void
my_device_destroy(struct controlvm_message *inmsg)
{
struct controlvm_message_packet *cmd = &inmsg->cmd;
- ulong busNo = cmd->destroy_device.bus_no;
- ulong devNo = cmd->destroy_device.dev_no;
- struct visorchipset_device_info *pDevInfo = NULL;
+ ulong bus_no = cmd->destroy_device.bus_no;
+ ulong dev_no = cmd->destroy_device.dev_no;
+ struct visorchipset_device_info *dev_info = NULL;
int rc = CONTROLVM_RESP_SUCCESS;
- pDevInfo = finddevice(&DevInfoList, busNo, devNo);
- if (!pDevInfo) {
- LOGERR("CONTROLVM_DEVICE_DESTROY Failed: busNo=%lu, devNo=%lu invalid",
- busNo, devNo);
+ dev_info = finddevice(&dev_info_list, bus_no, dev_no);
+ if (!dev_info)
rc = -CONTROLVM_RESP_ERROR_DEVICE_INVALID;
- goto Away;
- }
- if (pDevInfo->state.created == 0) {
- LOGERR("CONTROLVM_DEVICE_DESTROY Failed: busNo=%lu, devNo=%lu already destroyed",
- busNo, devNo);
+ else if (dev_info->state.created == 0)
rc = -CONTROLVM_RESP_ERROR_ALREADY_DONE;
- }
-Away:
- if ((rc >= CONTROLVM_RESP_SUCCESS) && pDevInfo)
- device_epilog(busNo, devNo, segment_state_running,
+ if ((rc >= CONTROLVM_RESP_SUCCESS) && dev_info)
+ device_epilog(bus_no, dev_no, segment_state_running,
CONTROLVM_DEVICE_DESTROY, &inmsg->hdr, rc,
inmsg->hdr.flags.response_expected == 1,
FOR_VISORBUS(
- pDevInfo->chan_info.channel_type_uuid));
+ dev_info->chan_info.channel_type_uuid));
}
/* When provided with the physical address of the controlvm channel
* (phys_addr), the offset to the payload area we need to manage
* (offset), and the size of this payload area (bytes), fills in the
- * CONTROLVM_PAYLOAD_INFO struct. Returns TRUE for success or FALSE
+ * controlvm_payload_info struct. Returns TRUE for success or FALSE
* for failure.
*/
static int
initialize_controlvm_payload_info(HOSTADDRESS phys_addr, u64 offset, u32 bytes,
- CONTROLVM_PAYLOAD_INFO *info)
+ struct controlvm_payload_info *info)
{
u8 __iomem *payload = NULL;
int rc = CONTROLVM_RESP_SUCCESS;
- if (info == NULL) {
- LOGERR("HUH ? CONTROLVM_PAYLOAD_INIT Failed : Programmer check at %s:%d",
- __FILE__, __LINE__);
+ if (!info) {
rc = -CONTROLVM_RESP_ERROR_PAYLOAD_INVALID;
- goto Away;
+ goto cleanup;
}
- memset(info, 0, sizeof(CONTROLVM_PAYLOAD_INFO));
+ memset(info, 0, sizeof(struct controlvm_payload_info));
if ((offset == 0) || (bytes == 0)) {
- LOGERR("CONTROLVM_PAYLOAD_INIT Failed: request_payload_offset=%llu request_payload_bytes=%llu!",
- (u64) offset, (u64) bytes);
rc = -CONTROLVM_RESP_ERROR_PAYLOAD_INVALID;
- goto Away;
+ goto cleanup;
}
payload = ioremap_cache(phys_addr + offset, bytes);
- if (payload == NULL) {
- LOGERR("CONTROLVM_PAYLOAD_INIT Failed: ioremap_cache %llu for %llu bytes failed",
- (u64) offset, (u64) bytes);
+ if (!payload) {
rc = -CONTROLVM_RESP_ERROR_IOREMAP_FAILED;
- goto Away;
+ goto cleanup;
}
info->offset = offset;
info->bytes = bytes;
info->ptr = payload;
- LOGINF("offset=%llu, bytes=%lu, ptr=%p",
- (u64) (info->offset), (ulong) (info->bytes), info->ptr);
-Away:
+cleanup:
if (rc < 0) {
- if (payload != NULL) {
+ if (payload) {
iounmap(payload);
payload = NULL;
}
}
static void
-destroy_controlvm_payload_info(CONTROLVM_PAYLOAD_INFO *info)
+destroy_controlvm_payload_info(struct controlvm_payload_info *info)
{
- if (info->ptr != NULL) {
+ if (info->ptr) {
iounmap(info->ptr);
info->ptr = NULL;
}
- memset(info, 0, sizeof(CONTROLVM_PAYLOAD_INFO));
+ memset(info, 0, sizeof(struct controlvm_payload_info));
}
static void
initialize_controlvm_payload(void)
{
- HOSTADDRESS phys_addr = visorchannel_get_physaddr(ControlVm_channel);
- u64 payloadOffset = 0;
- u32 payloadBytes = 0;
+ HOSTADDRESS phys_addr = visorchannel_get_physaddr(controlvm_channel);
+ u64 payload_offset = 0;
+ u32 payload_bytes = 0;
- if (visorchannel_read(ControlVm_channel,
+ if (visorchannel_read(controlvm_channel,
offsetof(struct spar_controlvm_channel_protocol,
request_payload_offset),
- &payloadOffset, sizeof(payloadOffset)) < 0) {
- LOGERR("CONTROLVM_PAYLOAD_INIT Failed to read controlvm channel!");
+ &payload_offset, sizeof(payload_offset)) < 0) {
POSTCODE_LINUX_2(CONTROLVM_INIT_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
}
- if (visorchannel_read(ControlVm_channel,
+ if (visorchannel_read(controlvm_channel,
offsetof(struct spar_controlvm_channel_protocol,
request_payload_bytes),
- &payloadBytes, sizeof(payloadBytes)) < 0) {
- LOGERR("CONTROLVM_PAYLOAD_INIT Failed to read controlvm channel!");
+ &payload_bytes, sizeof(payload_bytes)) < 0) {
POSTCODE_LINUX_2(CONTROLVM_INIT_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
}
initialize_controlvm_payload_info(phys_addr,
- payloadOffset, payloadBytes,
- &ControlVm_payload_info);
+ payload_offset, payload_bytes,
+ &controlvm_payload_info);
}
/* Send ACTION=online for DEVPATH=/sys/devices/platform/visorchipset.
int
visorchipset_chipset_ready(void)
{
- kobject_uevent(&Visorchipset_platform_device.dev.kobj, KOBJ_ONLINE);
+ kobject_uevent(&visorchipset_platform_device.dev.kobj, KOBJ_ONLINE);
return CONTROLVM_RESP_SUCCESS;
}
EXPORT_SYMBOL_GPL(visorchipset_chipset_ready);
char *envp[] = { env_selftest, NULL };
sprintf(env_selftest, "SPARSP_SELFTEST=%d", 1);
- kobject_uevent_env(&Visorchipset_platform_device.dev.kobj, KOBJ_CHANGE,
+ kobject_uevent_env(&visorchipset_platform_device.dev.kobj, KOBJ_CHANGE,
envp);
return CONTROLVM_RESP_SUCCESS;
}
int
visorchipset_chipset_notready(void)
{
- kobject_uevent(&Visorchipset_platform_device.dev.kobj, KOBJ_OFFLINE);
+ kobject_uevent(&visorchipset_platform_device.dev.kobj, KOBJ_OFFLINE);
return CONTROLVM_RESP_SUCCESS;
}
EXPORT_SYMBOL_GPL(visorchipset_chipset_notready);
static void
-chipset_ready(struct controlvm_message_header *msgHdr)
+chipset_ready(struct controlvm_message_header *msg_hdr)
{
int rc = visorchipset_chipset_ready();
if (rc != CONTROLVM_RESP_SUCCESS)
rc = -rc;
- if (msgHdr->flags.response_expected && !visorchipset_holdchipsetready)
- controlvm_respond(msgHdr, rc);
- if (msgHdr->flags.response_expected && visorchipset_holdchipsetready) {
+ if (msg_hdr->flags.response_expected && !visorchipset_holdchipsetready)
+ controlvm_respond(msg_hdr, rc);
+ if (msg_hdr->flags.response_expected && visorchipset_holdchipsetready) {
/* Send CHIPSET_READY response when all modules have been loaded
* and disks mounted for the partition
*/
- g_ChipSetMsgHdr = *msgHdr;
- LOGINF("Holding CHIPSET_READY response");
+ g_chipset_msg_hdr = *msg_hdr;
}
}
static void
-chipset_selftest(struct controlvm_message_header *msgHdr)
+chipset_selftest(struct controlvm_message_header *msg_hdr)
{
int rc = visorchipset_chipset_selftest();
if (rc != CONTROLVM_RESP_SUCCESS)
rc = -rc;
- if (msgHdr->flags.response_expected)
- controlvm_respond(msgHdr, rc);
+ if (msg_hdr->flags.response_expected)
+ controlvm_respond(msg_hdr, rc);
}
static void
-chipset_notready(struct controlvm_message_header *msgHdr)
+chipset_notready(struct controlvm_message_header *msg_hdr)
{
int rc = visorchipset_chipset_notready();
if (rc != CONTROLVM_RESP_SUCCESS)
rc = -rc;
- if (msgHdr->flags.response_expected)
- controlvm_respond(msgHdr, rc);
+ if (msg_hdr->flags.response_expected)
+ controlvm_respond(msg_hdr, rc);
}
/* This is your "one-stop" shop for grabbing the next message from the
static BOOL
read_controlvm_event(struct controlvm_message *msg)
{
- if (visorchannel_signalremove(ControlVm_channel,
+ if (visorchannel_signalremove(controlvm_channel,
CONTROLVM_QUEUE_EVENT, msg)) {
/* got a message */
- if (msg->hdr.flags.test_message == 1) {
- LOGERR("ignoring bad CONTROLVM_QUEUE_EVENT msg with controlvm_msg_id=0x%x because Flags.testMessage is nonsensical (=1)",
- msg->hdr.id);
+ if (msg->hdr.flags.test_message == 1)
return FALSE;
- }
return TRUE;
}
return FALSE;
static struct parahotplug_request *
parahotplug_request_create(struct controlvm_message *msg)
{
- struct parahotplug_request *req =
- kmalloc(sizeof(struct parahotplug_request),
- GFP_KERNEL|__GFP_NORETRY);
- if (req == NULL)
+ struct parahotplug_request *req;
+
+ req = kmalloc(sizeof(*req), GFP_KERNEL | __GFP_NORETRY);
+ if (!req)
return NULL;
req->id = parahotplug_next_id();
sprintf(env_func, "SPAR_PARAHOTPLUG_FUNCTION=%d",
cmd->device_change_state.dev_no & 0x7);
- LOGINF("parahotplug_request_kickoff: state=%d, bdf=%d/%d/%d, id=%u\n",
- cmd->device_change_state.state.active,
- cmd->device_change_state.bus_no,
- cmd->device_change_state.dev_no >> 3,
- cmd->device_change_state.dev_no & 7, req->id);
-
- kobject_uevent_env(&Visorchipset_platform_device.dev.kobj, KOBJ_CHANGE,
+ kobject_uevent_env(&visorchipset_platform_device.dev.kobj, KOBJ_CHANGE,
envp);
}
struct list_head *pos = NULL;
struct list_head *tmp = NULL;
- spin_lock(&Parahotplug_request_list_lock);
+ spin_lock(¶hotplug_request_list_lock);
- list_for_each_safe(pos, tmp, &Parahotplug_request_list) {
+ list_for_each_safe(pos, tmp, ¶hotplug_request_list) {
struct parahotplug_request *req =
list_entry(pos, struct parahotplug_request, list);
- if (time_after_eq(jiffies, req->expiration)) {
- list_del(pos);
- if (req->msg.hdr.flags.response_expected)
- controlvm_respond_physdev_changestate(
- &req->msg.hdr,
- CONTROLVM_RESP_ERROR_DEVICE_UDEV_TIMEOUT,
- req->msg.cmd.device_change_state.state);
- parahotplug_request_destroy(req);
- }
+
+ if (!time_after_eq(jiffies, req->expiration))
+ continue;
+
+ list_del(pos);
+ if (req->msg.hdr.flags.response_expected)
+ controlvm_respond_physdev_changestate(
+ &req->msg.hdr,
+ CONTROLVM_RESP_ERROR_DEVICE_UDEV_TIMEOUT,
+ req->msg.cmd.device_change_state.state);
+ parahotplug_request_destroy(req);
}
- spin_unlock(&Parahotplug_request_list_lock);
+ spin_unlock(¶hotplug_request_list_lock);
}
/*
struct list_head *pos = NULL;
struct list_head *tmp = NULL;
- spin_lock(&Parahotplug_request_list_lock);
+ spin_lock(¶hotplug_request_list_lock);
/* Look for a request matching "id". */
- list_for_each_safe(pos, tmp, &Parahotplug_request_list) {
+ list_for_each_safe(pos, tmp, ¶hotplug_request_list) {
struct parahotplug_request *req =
list_entry(pos, struct parahotplug_request, list);
if (req->id == id) {
* respond.
*/
list_del(pos);
- spin_unlock(&Parahotplug_request_list_lock);
+ spin_unlock(¶hotplug_request_list_lock);
req->msg.cmd.device_change_state.state.active = active;
if (req->msg.hdr.flags.response_expected)
controlvm_respond_physdev_changestate(
}
}
- spin_unlock(&Parahotplug_request_list_lock);
+ spin_unlock(¶hotplug_request_list_lock);
return -1;
}
req = parahotplug_request_create(inmsg);
- if (req == NULL) {
- LOGERR("parahotplug_process_message: couldn't allocate request");
+ if (!req)
return;
- }
if (inmsg->cmd.device_change_state.state.active) {
/* For enable messages, just respond with success
*/
parahotplug_request_kickoff(req);
controlvm_respond_physdev_changestate(&inmsg->hdr,
- CONTROLVM_RESP_SUCCESS, inmsg->cmd.
- device_change_state.state);
+ CONTROLVM_RESP_SUCCESS,
+ inmsg->cmd.device_change_state.state);
parahotplug_request_destroy(req);
} else {
/* For disable messages, add the request to the
* won't get responded to until the script has
* indicated it's done.
*/
- spin_lock(&Parahotplug_request_list_lock);
- list_add_tail(&(req->list), &Parahotplug_request_list);
- spin_unlock(&Parahotplug_request_list_lock);
+ spin_lock(¶hotplug_request_list_lock);
+ list_add_tail(&req->list, ¶hotplug_request_list);
+ spin_unlock(¶hotplug_request_list_lock);
parahotplug_request_kickoff(req);
}
handle_command(struct controlvm_message inmsg, HOSTADDRESS channel_addr)
{
struct controlvm_message_packet *cmd = &inmsg.cmd;
- u64 parametersAddr = 0;
- u32 parametersBytes = 0;
- PARSER_CONTEXT *parser_ctx = NULL;
- BOOL isLocalAddr = FALSE;
+ u64 parm_addr = 0;
+ u32 parm_bytes = 0;
+ struct parser_context *parser_ctx = NULL;
+ bool local_addr = false;
struct controlvm_message ackmsg;
/* create parsing context if necessary */
- isLocalAddr = (inmsg.hdr.flags.test_message == 1);
- if (channel_addr == 0) {
- LOGERR("HUH? channel_addr is 0!");
+ local_addr = (inmsg.hdr.flags.test_message == 1);
+ if (channel_addr == 0)
return TRUE;
- }
- parametersAddr = channel_addr + inmsg.hdr.payload_vm_offset;
- parametersBytes = inmsg.hdr.payload_bytes;
+ parm_addr = channel_addr + inmsg.hdr.payload_vm_offset;
+ parm_bytes = inmsg.hdr.payload_bytes;
/* Parameter and channel addresses within test messages actually lie
* within our OS-controlled memory. We need to know that, because it
* makes a difference in how we compute the virtual address.
*/
- if (parametersAddr != 0 && parametersBytes != 0) {
+ if (parm_addr != 0 && parm_bytes != 0) {
BOOL retry = FALSE;
parser_ctx =
- parser_init_byteStream(parametersAddr, parametersBytes,
- isLocalAddr, &retry);
- if (!parser_ctx) {
- if (retry) {
- LOGWRN("throttling to copy payload");
- return FALSE;
- }
- LOGWRN("parsing failed");
- LOGWRN("inmsg.hdr.Id=0x%lx", (ulong) inmsg.hdr.id);
- LOGWRN("parametersAddr=0x%llx", (u64) parametersAddr);
- LOGWRN("parametersBytes=%lu", (ulong) parametersBytes);
- LOGWRN("isLocalAddr=%d", isLocalAddr);
- }
+ parser_init_byte_stream(parm_addr, parm_bytes,
+ local_addr, &retry);
+ if (!parser_ctx && retry)
+ return FALSE;
}
- if (!isLocalAddr) {
+ if (!local_addr) {
controlvm_init_response(&ackmsg, &inmsg.hdr,
CONTROLVM_RESP_SUCCESS);
- if ((ControlVm_channel)
- &&
- (!visorchannel_signalinsert
- (ControlVm_channel, CONTROLVM_QUEUE_ACK, &ackmsg)))
- LOGWRN("failed to send ACK failed");
+ if (controlvm_channel)
+ visorchannel_signalinsert(controlvm_channel,
+ CONTROLVM_QUEUE_ACK,
+ &ackmsg);
}
switch (inmsg.hdr.id) {
case CONTROLVM_CHIPSET_INIT:
- LOGINF("CHIPSET_INIT(#busses=%lu,#switches=%lu)",
- (ulong) inmsg.cmd.init_chipset.bus_count,
- (ulong) inmsg.cmd.init_chipset.switch_count);
chipset_init(&inmsg);
break;
case CONTROLVM_BUS_CREATE:
- LOGINF("BUS_CREATE(%lu,#devs=%lu)",
- (ulong) cmd->create_bus.bus_no,
- (ulong) cmd->create_bus.dev_count);
bus_create(&inmsg);
break;
case CONTROLVM_BUS_DESTROY:
- LOGINF("BUS_DESTROY(%lu)", (ulong) cmd->destroy_bus.bus_no);
bus_destroy(&inmsg);
break;
case CONTROLVM_BUS_CONFIGURE:
- LOGINF("BUS_CONFIGURE(%lu)", (ulong) cmd->configure_bus.bus_no);
bus_configure(&inmsg, parser_ctx);
break;
case CONTROLVM_DEVICE_CREATE:
- LOGINF("DEVICE_CREATE(%lu,%lu)",
- (ulong) cmd->create_device.bus_no,
- (ulong) cmd->create_device.dev_no);
my_device_create(&inmsg);
break;
case CONTROLVM_DEVICE_CHANGESTATE:
if (cmd->device_change_state.flags.phys_device) {
- LOGINF("DEVICE_CHANGESTATE for physical device (%lu,%lu, active=%lu)",
- (ulong) cmd->device_change_state.bus_no,
- (ulong) cmd->device_change_state.dev_no,
- (ulong) cmd->device_change_state.state.active);
parahotplug_process_message(&inmsg);
} else {
- LOGINF("DEVICE_CHANGESTATE for virtual device (%lu,%lu, state.Alive=0x%lx)",
- (ulong) cmd->device_change_state.bus_no,
- (ulong) cmd->device_change_state.dev_no,
- (ulong) cmd->device_change_state.state.alive);
/* save the hdr and cmd structures for later use */
/* when sending back the response to Command */
my_device_changestate(&inmsg);
- g_DiagMsgHdr = inmsg.hdr;
- g_DeviceChangeStatePacket = inmsg.cmd;
+ g_diag_msg_hdr = inmsg.hdr;
+ g_devicechangestate_packet = inmsg.cmd;
break;
}
break;
case CONTROLVM_DEVICE_DESTROY:
- LOGINF("DEVICE_DESTROY(%lu,%lu)",
- (ulong) cmd->destroy_device.bus_no,
- (ulong) cmd->destroy_device.dev_no);
my_device_destroy(&inmsg);
break;
case CONTROLVM_DEVICE_CONFIGURE:
- LOGINF("DEVICE_CONFIGURE(%lu,%lu)",
- (ulong) cmd->configure_device.bus_no,
- (ulong) cmd->configure_device.dev_no);
/* no op for now, just send a respond that we passed */
if (inmsg.hdr.flags.response_expected)
controlvm_respond(&inmsg.hdr, CONTROLVM_RESP_SUCCESS);
break;
case CONTROLVM_CHIPSET_READY:
- LOGINF("CHIPSET_READY");
chipset_ready(&inmsg.hdr);
break;
case CONTROLVM_CHIPSET_SELFTEST:
- LOGINF("CHIPSET_SELFTEST");
chipset_selftest(&inmsg.hdr);
break;
case CONTROLVM_CHIPSET_STOP:
- LOGINF("CHIPSET_STOP");
chipset_notready(&inmsg.hdr);
break;
default:
- LOGERR("unrecognized controlvm cmd=%d", (int) inmsg.hdr.id);
if (inmsg.hdr.flags.response_expected)
controlvm_respond(&inmsg.hdr,
- -CONTROLVM_RESP_ERROR_MESSAGE_ID_UNKNOWN);
+ -CONTROLVM_RESP_ERROR_MESSAGE_ID_UNKNOWN);
break;
}
- if (parser_ctx != NULL) {
+ if (parser_ctx) {
parser_done(parser_ctx);
parser_ctx = NULL;
}
u64 addr = 0;
u32 size = 0;
- if (!VMCALL_SUCCESSFUL(issue_vmcall_io_controlvm_addr(&addr, &size))) {
- ERRDRV("%s - vmcall to determine controlvm channel addr failed",
- __func__);
+ if (!VMCALL_SUCCESSFUL(issue_vmcall_io_controlvm_addr(&addr, &size)))
return 0;
- }
- INFODRV("controlvm addr=%Lx", addr);
+
return addr;
}
controlvm_periodic_work(struct work_struct *work)
{
struct controlvm_message inmsg;
- BOOL gotACommand = FALSE;
+ BOOL got_command = FALSE;
BOOL handle_command_failed = FALSE;
- static u64 Poll_Count;
+ static u64 poll_count;
/* make sure visorbus server is registered for controlvm callbacks */
if (visorchipset_serverregwait && !serverregistered)
- goto Away;
+ goto cleanup;
/* make sure visorclientbus server is regsitered for controlvm
* callbacks
*/
if (visorchipset_clientregwait && !clientregistered)
- goto Away;
+ goto cleanup;
- Poll_Count++;
- if (Poll_Count >= 250)
+ poll_count++;
+ if (poll_count >= 250)
; /* keep going */
else
- goto Away;
+ goto cleanup;
/* Check events to determine if response to CHIPSET_READY
* should be sent
*/
- if (visorchipset_holdchipsetready
- && (g_ChipSetMsgHdr.id != CONTROLVM_INVALID)) {
+ if (visorchipset_holdchipsetready &&
+ (g_chipset_msg_hdr.id != CONTROLVM_INVALID)) {
if (check_chipset_events() == 1) {
- LOGINF("Sending CHIPSET_READY response");
- controlvm_respond(&g_ChipSetMsgHdr, 0);
+ controlvm_respond(&g_chipset_msg_hdr, 0);
clear_chipset_events();
- memset(&g_ChipSetMsgHdr, 0,
+ memset(&g_chipset_msg_hdr, 0,
sizeof(struct controlvm_message_header));
}
}
- while (visorchannel_signalremove(ControlVm_channel,
+ while (visorchannel_signalremove(controlvm_channel,
CONTROLVM_QUEUE_RESPONSE,
- &inmsg)) {
- if (inmsg.hdr.payload_max_bytes != 0) {
- LOGERR("Payload of size %lu returned @%lu with unexpected message id %d.",
- (ulong) inmsg.hdr.payload_max_bytes,
- (ulong) inmsg.hdr.payload_vm_offset,
- inmsg.hdr.id);
- }
- }
- if (!gotACommand) {
- if (ControlVm_Pending_Msg_Valid) {
+ &inmsg))
+ ;
+ if (!got_command) {
+ if (controlvm_pending_msg_valid) {
/* we throttled processing of a prior
* msg, so try to process it again
* rather than reading a new one
*/
- inmsg = ControlVm_Pending_Msg;
- ControlVm_Pending_Msg_Valid = FALSE;
- gotACommand = TRUE;
- } else
- gotACommand = read_controlvm_event(&inmsg);
+ inmsg = controlvm_pending_msg;
+ controlvm_pending_msg_valid = FALSE;
+ got_command = true;
+ } else {
+ got_command = read_controlvm_event(&inmsg);
+ }
}
handle_command_failed = FALSE;
- while (gotACommand && (!handle_command_failed)) {
- Most_recent_message_jiffies = jiffies;
+ while (got_command && (!handle_command_failed)) {
+ most_recent_message_jiffies = jiffies;
if (handle_command(inmsg,
visorchannel_get_physaddr
- (ControlVm_channel)))
- gotACommand = read_controlvm_event(&inmsg);
+ (controlvm_channel)))
+ got_command = read_controlvm_event(&inmsg);
else {
/* this is a scenario where throttling
* is required, but probably NOT an
* reprocess it on our next loop
*/
handle_command_failed = TRUE;
- ControlVm_Pending_Msg = inmsg;
- ControlVm_Pending_Msg_Valid = TRUE;
+ controlvm_pending_msg = inmsg;
+ controlvm_pending_msg_valid = TRUE;
}
}
/* parahotplug_worker */
parahotplug_process_list();
-Away:
+cleanup:
if (time_after(jiffies,
- Most_recent_message_jiffies + (HZ * MIN_IDLE_SECONDS))) {
+ most_recent_message_jiffies + (HZ * MIN_IDLE_SECONDS))) {
/* it's been longer than MIN_IDLE_SECONDS since we
* processed our last controlvm message; slow down the
* polling
*/
- if (Poll_jiffies != POLLJIFFIES_CONTROLVMCHANNEL_SLOW) {
- LOGINF("switched to slow controlvm polling");
- Poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_SLOW;
- }
+ if (poll_jiffies != POLLJIFFIES_CONTROLVMCHANNEL_SLOW)
+ poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_SLOW;
} else {
- if (Poll_jiffies != POLLJIFFIES_CONTROLVMCHANNEL_FAST) {
- Poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_FAST;
- LOGINF("switched to fast controlvm polling");
- }
+ if (poll_jiffies != POLLJIFFIES_CONTROLVMCHANNEL_FAST)
+ poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_FAST;
}
- queue_delayed_work(Periodic_controlvm_workqueue,
- &Periodic_controlvm_work, Poll_jiffies);
+ queue_delayed_work(periodic_controlvm_workqueue,
+ &periodic_controlvm_work, poll_jiffies);
}
static void
setup_crash_devices_work_queue(struct work_struct *work)
{
-
- struct controlvm_message localCrashCreateBusMsg;
- struct controlvm_message localCrashCreateDevMsg;
+ struct controlvm_message local_crash_bus_msg;
+ struct controlvm_message local_crash_dev_msg;
struct controlvm_message msg;
- u32 localSavedCrashMsgOffset;
- u16 localSavedCrashMsgCount;
+ u32 local_crash_msg_offset;
+ u16 local_crash_msg_count;
/* make sure visorbus server is registered for controlvm callbacks */
if (visorchipset_serverregwait && !serverregistered)
- goto Away;
+ goto cleanup;
/* make sure visorclientbus server is regsitered for controlvm
* callbacks
*/
if (visorchipset_clientregwait && !clientregistered)
- goto Away;
+ goto cleanup;
POSTCODE_LINUX_2(CRASH_DEV_ENTRY_PC, POSTCODE_SEVERITY_INFO);
chipset_init(&msg);
/* get saved message count */
- if (visorchannel_read(ControlVm_channel,
+ if (visorchannel_read(controlvm_channel,
offsetof(struct spar_controlvm_channel_protocol,
saved_crash_message_count),
- &localSavedCrashMsgCount, sizeof(u16)) < 0) {
- LOGERR("failed to get Saved Message Count");
+ &local_crash_msg_count, sizeof(u16)) < 0) {
POSTCODE_LINUX_2(CRASH_DEV_CTRL_RD_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
}
- if (localSavedCrashMsgCount != CONTROLVM_CRASHMSG_MAX) {
- LOGERR("Saved Message Count incorrect %d",
- localSavedCrashMsgCount);
+ if (local_crash_msg_count != CONTROLVM_CRASHMSG_MAX) {
POSTCODE_LINUX_3(CRASH_DEV_COUNT_FAILURE_PC,
- localSavedCrashMsgCount,
+ local_crash_msg_count,
POSTCODE_SEVERITY_ERR);
return;
}
/* get saved crash message offset */
- if (visorchannel_read(ControlVm_channel,
+ if (visorchannel_read(controlvm_channel,
offsetof(struct spar_controlvm_channel_protocol,
saved_crash_message_offset),
- &localSavedCrashMsgOffset, sizeof(u32)) < 0) {
- LOGERR("failed to get Saved Message Offset");
+ &local_crash_msg_offset, sizeof(u32)) < 0) {
POSTCODE_LINUX_2(CRASH_DEV_CTRL_RD_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
}
/* read create device message for storage bus offset */
- if (visorchannel_read(ControlVm_channel,
- localSavedCrashMsgOffset,
- &localCrashCreateBusMsg,
+ if (visorchannel_read(controlvm_channel,
+ local_crash_msg_offset,
+ &local_crash_bus_msg,
sizeof(struct controlvm_message)) < 0) {
- LOGERR("CRASH_DEV_RD_BUS_FAIULRE: Failed to read CrashCreateBusMsg!");
POSTCODE_LINUX_2(CRASH_DEV_RD_BUS_FAIULRE_PC,
POSTCODE_SEVERITY_ERR);
return;
}
/* read create device message for storage device */
- if (visorchannel_read(ControlVm_channel,
- localSavedCrashMsgOffset +
+ if (visorchannel_read(controlvm_channel,
+ local_crash_msg_offset +
sizeof(struct controlvm_message),
- &localCrashCreateDevMsg,
+ &local_crash_dev_msg,
sizeof(struct controlvm_message)) < 0) {
- LOGERR("CRASH_DEV_RD_DEV_FAIULRE: Failed to read CrashCreateDevMsg!");
POSTCODE_LINUX_2(CRASH_DEV_RD_DEV_FAIULRE_PC,
POSTCODE_SEVERITY_ERR);
return;
}
/* reuse IOVM create bus message */
- if (localCrashCreateBusMsg.cmd.create_bus.channel_addr != 0)
- bus_create(&localCrashCreateBusMsg);
- else {
- LOGERR("CrashCreateBusMsg is null, no dump will be taken");
+ if (local_crash_bus_msg.cmd.create_bus.channel_addr != 0) {
+ bus_create(&local_crash_bus_msg);
+ } else {
POSTCODE_LINUX_2(CRASH_DEV_BUS_NULL_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
}
/* reuse create device message for storage device */
- if (localCrashCreateDevMsg.cmd.create_device.channel_addr != 0)
- my_device_create(&localCrashCreateDevMsg);
- else {
- LOGERR("CrashCreateDevMsg is null, no dump will be taken");
+ if (local_crash_dev_msg.cmd.create_device.channel_addr != 0) {
+ my_device_create(&local_crash_dev_msg);
+ } else {
POSTCODE_LINUX_2(CRASH_DEV_DEV_NULL_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
}
- LOGINF("Bus and device ready for dumping");
POSTCODE_LINUX_2(CRASH_DEV_EXIT_PC, POSTCODE_SEVERITY_INFO);
return;
-Away:
+cleanup:
- Poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_SLOW;
+ poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_SLOW;
- queue_delayed_work(Periodic_controlvm_workqueue,
- &Periodic_controlvm_work, Poll_jiffies);
+ queue_delayed_work(periodic_controlvm_workqueue,
+ &periodic_controlvm_work, poll_jiffies);
}
static void
-bus_create_response(ulong busNo, int response)
+bus_create_response(ulong bus_no, int response)
{
- bus_responder(CONTROLVM_BUS_CREATE, busNo, response);
+ bus_responder(CONTROLVM_BUS_CREATE, bus_no, response);
}
static void
-bus_destroy_response(ulong busNo, int response)
+bus_destroy_response(ulong bus_no, int response)
{
- bus_responder(CONTROLVM_BUS_DESTROY, busNo, response);
+ bus_responder(CONTROLVM_BUS_DESTROY, bus_no, response);
}
static void
-device_create_response(ulong busNo, ulong devNo, int response)
+device_create_response(ulong bus_no, ulong dev_no, int response)
{
- device_responder(CONTROLVM_DEVICE_CREATE, busNo, devNo, response);
+ device_responder(CONTROLVM_DEVICE_CREATE, bus_no, dev_no, response);
}
static void
-device_destroy_response(ulong busNo, ulong devNo, int response)
+device_destroy_response(ulong bus_no, ulong dev_no, int response)
{
- device_responder(CONTROLVM_DEVICE_DESTROY, busNo, devNo, response);
+ device_responder(CONTROLVM_DEVICE_DESTROY, bus_no, dev_no, response);
}
void
visorchipset_device_pause_response(ulong bus_no, ulong dev_no, int response)
{
-
device_changestate_responder(CONTROLVM_DEVICE_CHANGESTATE,
bus_no, dev_no, response,
segment_state_standby);
EXPORT_SYMBOL_GPL(visorchipset_device_pause_response);
static void
-device_resume_response(ulong busNo, ulong devNo, int response)
+device_resume_response(ulong bus_no, ulong dev_no, int response)
{
device_changestate_responder(CONTROLVM_DEVICE_CHANGESTATE,
- busNo, devNo, response,
+ bus_no, dev_no, response,
segment_state_running);
}
BOOL
visorchipset_get_bus_info(ulong bus_no, struct visorchipset_bus_info *bus_info)
{
- void *p = findbus(&BusInfoList, bus_no);
+ void *p = findbus(&bus_info_list, bus_no);
- if (!p) {
- LOGERR("(%lu) failed", bus_no);
+ if (!p)
return FALSE;
- }
memcpy(bus_info, p, sizeof(struct visorchipset_bus_info));
return TRUE;
}
BOOL
visorchipset_set_bus_context(ulong bus_no, void *context)
{
- struct visorchipset_bus_info *p = findbus(&BusInfoList, bus_no);
+ struct visorchipset_bus_info *p = findbus(&bus_info_list, bus_no);
- if (!p) {
- LOGERR("(%lu) failed", bus_no);
+ if (!p)
return FALSE;
- }
p->bus_driver_context = context;
return TRUE;
}
visorchipset_get_device_info(ulong bus_no, ulong dev_no,
struct visorchipset_device_info *dev_info)
{
- void *p = finddevice(&DevInfoList, bus_no, dev_no);
+ void *p = finddevice(&dev_info_list, bus_no, dev_no);
- if (!p) {
- LOGERR("(%lu,%lu) failed", bus_no, dev_no);
+ if (!p)
return FALSE;
- }
memcpy(dev_info, p, sizeof(struct visorchipset_device_info));
return TRUE;
}
visorchipset_set_device_context(ulong bus_no, ulong dev_no, void *context)
{
struct visorchipset_device_info *p =
- finddevice(&DevInfoList, bus_no, dev_no);
+ finddevice(&dev_info_list, bus_no, dev_no);
- if (!p) {
- LOGERR("(%lu,%lu) failed", bus_no, dev_no);
+ if (!p)
return FALSE;
- }
p->bus_driver_context = context;
return TRUE;
}
*/
gfp |= __GFP_NORETRY;
p = kmem_cache_alloc(pool, gfp);
- if (!p) {
- LOGERR("kmem_cache_alloc failed early @%s:%d\n", fn, ln);
+ if (!p)
return NULL;
- }
- atomic_inc(&Visorchipset_cache_buffers_in_use);
+
+ atomic_inc(&visorchipset_cache_buffers_in_use);
return p;
}
void
visorchipset_cache_free(struct kmem_cache *pool, void *p, char *fn, int ln)
{
- if (!p) {
- LOGERR("NULL pointer @%s:%d\n", fn, ln);
+ if (!p)
return;
- }
- atomic_dec(&Visorchipset_cache_buffers_in_use);
+
+ atomic_dec(&visorchipset_cache_buffers_in_use);
kmem_cache_free(pool, p);
}
static ssize_t chipsetready_store(struct device *dev,
- struct device_attribute *attr, const char *buf, size_t count)
+ struct device_attribute *attr,
+ const char *buf, size_t count)
{
char msgtype[64];
* and then passed back when the device has been removed.
*/
static ssize_t devicedisabled_store(struct device *dev,
- struct device_attribute *attr, const char *buf, size_t count)
+ struct device_attribute *attr,
+ const char *buf, size_t count)
{
uint id;
* and then passed back when the device has been brought back up.
*/
static ssize_t deviceenabled_store(struct device *dev,
- struct device_attribute *attr, const char *buf, size_t count)
+ struct device_attribute *attr,
+ const char *buf, size_t count)
{
uint id;
visorchipset_init(void)
{
int rc = 0, x = 0;
- char s[64];
HOSTADDRESS addr;
if (!unisys_spar_platform)
return -ENODEV;
- LOGINF("chipset driver version %s loaded", VERSION);
- /* process module options */
- POSTCODE_LINUX_2(DRIVER_ENTRY_PC, POSTCODE_SEVERITY_INFO);
-
- LOGINF("option - testvnic=%d", visorchipset_testvnic);
- LOGINF("option - testvnicclient=%d", visorchipset_testvnicclient);
- LOGINF("option - testmsg=%d", visorchipset_testmsg);
- LOGINF("option - testteardown=%d", visorchipset_testteardown);
- LOGINF("option - major=%d", visorchipset_major);
- LOGINF("option - serverregwait=%d", visorchipset_serverregwait);
- LOGINF("option - clientregwait=%d", visorchipset_clientregwait);
- LOGINF("option - holdchipsetready=%d", visorchipset_holdchipsetready);
-
- memset(&BusDev_Server_Notifiers, 0, sizeof(BusDev_Server_Notifiers));
- memset(&BusDev_Client_Notifiers, 0, sizeof(BusDev_Client_Notifiers));
- memset(&ControlVm_payload_info, 0, sizeof(ControlVm_payload_info));
- memset(&LiveDump_info, 0, sizeof(LiveDump_info));
- atomic_set(&LiveDump_info.buffers_in_use, 0);
+ memset(&busdev_server_notifiers, 0, sizeof(busdev_server_notifiers));
+ memset(&busdev_client_notifiers, 0, sizeof(busdev_client_notifiers));
+ memset(&controlvm_payload_info, 0, sizeof(controlvm_payload_info));
+ memset(&livedump_info, 0, sizeof(livedump_info));
+ atomic_set(&livedump_info.buffers_in_use, 0);
if (visorchipset_testvnic) {
- ERRDRV("testvnic option no longer supported: (status = %d)\n",
- x);
POSTCODE_LINUX_3(CHIPSET_INIT_FAILURE_PC, x, DIAG_SEVERITY_ERR);
rc = x;
- goto Away;
+ goto cleanup;
}
addr = controlvm_get_channel_address();
if (addr != 0) {
- ControlVm_channel =
+ controlvm_channel =
visorchannel_create_with_lock
(addr,
sizeof(struct spar_controlvm_channel_protocol),
spar_controlvm_channel_protocol_uuid);
if (SPAR_CONTROLVM_CHANNEL_OK_CLIENT(
- visorchannel_get_header(ControlVm_channel))) {
- LOGINF("Channel %s (ControlVm) discovered",
- visorchannel_id(ControlVm_channel, s));
+ visorchannel_get_header(controlvm_channel))) {
initialize_controlvm_payload();
} else {
- LOGERR("controlvm channel is invalid");
- visorchannel_destroy(ControlVm_channel);
- ControlVm_channel = NULL;
+ visorchannel_destroy(controlvm_channel);
+ controlvm_channel = NULL;
return -ENODEV;
}
} else {
- LOGERR("no controlvm channel discovered");
return -ENODEV;
}
- MajorDev = MKDEV(visorchipset_major, 0);
- rc = visorchipset_file_init(MajorDev, &ControlVm_channel);
+ major_dev = MKDEV(visorchipset_major, 0);
+ rc = visorchipset_file_init(major_dev, &controlvm_channel);
if (rc < 0) {
- ERRDRV("visorchipset_file_init(MajorDev, &ControlVm_channel): error (status=%d)\n", rc);
POSTCODE_LINUX_2(CHIPSET_INIT_FAILURE_PC, DIAG_SEVERITY_ERR);
- goto Away;
+ goto cleanup;
}
- memset(&g_DiagMsgHdr, 0, sizeof(struct controlvm_message_header));
+ memset(&g_diag_msg_hdr, 0, sizeof(struct controlvm_message_header));
- memset(&g_ChipSetMsgHdr, 0, sizeof(struct controlvm_message_header));
+ memset(&g_chipset_msg_hdr, 0, sizeof(struct controlvm_message_header));
- memset(&g_DelDumpMsgHdr, 0, sizeof(struct controlvm_message_header));
+ memset(&g_del_dump_msg_hdr, 0, sizeof(struct controlvm_message_header));
- Putfile_buffer_list_pool =
- kmem_cache_create(Putfile_buffer_list_pool_name,
+ putfile_buffer_list_pool =
+ kmem_cache_create(putfile_buffer_list_pool_name,
sizeof(struct putfile_buffer_entry),
0, SLAB_HWCACHE_ALIGN, NULL);
- if (!Putfile_buffer_list_pool) {
- ERRDRV("failed to alloc Putfile_buffer_list_pool: (status=-1)\n");
+ if (!putfile_buffer_list_pool) {
POSTCODE_LINUX_2(CHIPSET_INIT_FAILURE_PC, DIAG_SEVERITY_ERR);
rc = -1;
- goto Away;
+ goto cleanup;
}
- if (visorchipset_disable_controlvm) {
- LOGINF("visorchipset_init:controlvm disabled");
- } else {
+ if (!visorchipset_disable_controlvm) {
/* if booting in a crash kernel */
if (visorchipset_crash_kernel)
- INIT_DELAYED_WORK(&Periodic_controlvm_work,
+ INIT_DELAYED_WORK(&periodic_controlvm_work,
setup_crash_devices_work_queue);
else
- INIT_DELAYED_WORK(&Periodic_controlvm_work,
+ INIT_DELAYED_WORK(&periodic_controlvm_work,
controlvm_periodic_work);
- Periodic_controlvm_workqueue =
+ periodic_controlvm_workqueue =
create_singlethread_workqueue("visorchipset_controlvm");
- if (Periodic_controlvm_workqueue == NULL) {
- ERRDRV("cannot create controlvm workqueue: (status=%d)\n",
- -ENOMEM);
+ if (!periodic_controlvm_workqueue) {
POSTCODE_LINUX_2(CREATE_WORKQUEUE_FAILED_PC,
DIAG_SEVERITY_ERR);
rc = -ENOMEM;
- goto Away;
+ goto cleanup;
}
- Most_recent_message_jiffies = jiffies;
- Poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_FAST;
- rc = queue_delayed_work(Periodic_controlvm_workqueue,
- &Periodic_controlvm_work, Poll_jiffies);
+ most_recent_message_jiffies = jiffies;
+ poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_FAST;
+ rc = queue_delayed_work(periodic_controlvm_workqueue,
+ &periodic_controlvm_work, poll_jiffies);
if (rc < 0) {
- ERRDRV("queue_delayed_work(Periodic_controlvm_workqueue, &Periodic_controlvm_work, Poll_jiffies): error (status=%d)\n", rc);
POSTCODE_LINUX_2(QUEUE_DELAYED_WORK_PC,
DIAG_SEVERITY_ERR);
- goto Away;
+ goto cleanup;
}
-
}
- Visorchipset_platform_device.dev.devt = MajorDev;
- if (platform_device_register(&Visorchipset_platform_device) < 0) {
- ERRDRV("platform_device_register(visorchipset) failed: (status=-1)\n");
+ visorchipset_platform_device.dev.devt = major_dev;
+ if (platform_device_register(&visorchipset_platform_device) < 0) {
POSTCODE_LINUX_2(DEVICE_REGISTER_FAILURE_PC, DIAG_SEVERITY_ERR);
rc = -1;
- goto Away;
+ goto cleanup;
}
- LOGINF("visorchipset device created");
POSTCODE_LINUX_2(CHIPSET_INIT_SUCCESS_PC, POSTCODE_SEVERITY_INFO);
rc = 0;
-Away:
+cleanup:
if (rc) {
- LOGERR("visorchipset_init failed");
POSTCODE_LINUX_3(CHIPSET_INIT_FAILURE_PC, rc,
POSTCODE_SEVERITY_ERR);
}
static void
visorchipset_exit(void)
{
- char s[99];
-
POSTCODE_LINUX_2(DRIVER_EXIT_PC, POSTCODE_SEVERITY_INFO);
if (visorchipset_disable_controlvm) {
;
} else {
- cancel_delayed_work(&Periodic_controlvm_work);
- flush_workqueue(Periodic_controlvm_workqueue);
- destroy_workqueue(Periodic_controlvm_workqueue);
- Periodic_controlvm_workqueue = NULL;
- destroy_controlvm_payload_info(&ControlVm_payload_info);
+ cancel_delayed_work(&periodic_controlvm_work);
+ flush_workqueue(periodic_controlvm_workqueue);
+ destroy_workqueue(periodic_controlvm_workqueue);
+ periodic_controlvm_workqueue = NULL;
+ destroy_controlvm_payload_info(&controlvm_payload_info);
}
- Test_Vnic_channel = NULL;
- if (Putfile_buffer_list_pool) {
- kmem_cache_destroy(Putfile_buffer_list_pool);
- Putfile_buffer_list_pool = NULL;
+ if (putfile_buffer_list_pool) {
+ kmem_cache_destroy(putfile_buffer_list_pool);
+ putfile_buffer_list_pool = NULL;
}
cleanup_controlvm_structures();
- memset(&g_DiagMsgHdr, 0, sizeof(struct controlvm_message_header));
+ memset(&g_diag_msg_hdr, 0, sizeof(struct controlvm_message_header));
- memset(&g_ChipSetMsgHdr, 0, sizeof(struct controlvm_message_header));
+ memset(&g_chipset_msg_hdr, 0, sizeof(struct controlvm_message_header));
- memset(&g_DelDumpMsgHdr, 0, sizeof(struct controlvm_message_header));
+ memset(&g_del_dump_msg_hdr, 0, sizeof(struct controlvm_message_header));
- LOGINF("Channel %s (ControlVm) disconnected",
- visorchannel_id(ControlVm_channel, s));
- visorchannel_destroy(ControlVm_channel);
+ visorchannel_destroy(controlvm_channel);
- visorchipset_file_cleanup();
+ visorchipset_file_cleanup(visorchipset_platform_device.dev.devt);
POSTCODE_LINUX_2(DRIVER_EXIT_PC, POSTCODE_SEVERITY_INFO);
- LOGINF("chipset driver unloaded");
}
module_param_named(testvnic, visorchipset_testvnic, int, S_IRUGO);
config UNISYS_VISORUTIL
tristate "Unisys visorutil driver"
- depends on UNISYSSPAR && HAS_IOMEM
---help---
If you say Y here, you will enable the Unisys visorutil driver.
obj-$(CONFIG_UNISYS_VISORUTIL) += visorutil.o
-visorutil-y := charqueue.o easyproc.o periodic_work.o procobjecttree.o \
- memregion_direct.o visorkmodutils.o
+visorutil-y := charqueue.o periodic_work.o memregion_direct.o visorkmodutils.o
ccflags-y += -Idrivers/staging/unisys/include
struct charqueue *visor_charqueue_create(ulong nslots)
{
int alloc_size = sizeof(struct charqueue) + nslots + 1;
- struct charqueue *cq = kmalloc(alloc_size, GFP_KERNEL|__GFP_NORETRY);
+ struct charqueue *cq;
- if (cq == NULL) {
- ERRDRV("visor_charqueue_create allocation failed (alloc_size=%d)",
- alloc_size);
+ cq = kmalloc(alloc_size, GFP_KERNEL|__GFP_NORETRY);
+ if (cq == NULL)
return NULL;
- }
cq->alloc_size = alloc_size;
cq->nslots = nslots;
cq->head = 0;
#ifndef __CHARQUEUE_H__
#define __CHARQUEUE_H__
-#include "uniklog.h"
#include "timskmod.h"
/* struct charqueue is an opaque structure to users.
+++ /dev/null
-/* Copyright (C) 2010 - 2013 UNISYS CORPORATION
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
- * NON INFRINGEMENT. See the GNU General Public License for more
- * details.
- */
-
-/** @file *********************************************************************
- *
- * Handle procfs-specific tasks.
- * Note that this file does not know about any module-specific things, nor
- * does it know anything about what information to reveal as part of the proc
- * entries. The 2 functions that take care of displaying device and
- * driver specific information are passed as parameters to
- * visor_easyproc_InitDriver().
- *
- * void show_device_info(struct seq_file *seq, void *p);
- * void show_driver_info(struct seq_file *seq);
- *
- * The second parameter to show_device_info is actually a pointer to the
- * device-specific info to show. It is the context that was originally
- * passed to visor_easyproc_InitDevice().
- *
- ******************************************************************************
- */
-
-#include <linux/proc_fs.h>
-
-#include "uniklog.h"
-#include "timskmod.h"
-#include "easyproc.h"
-
-#define MYDRVNAME "easyproc"
-
-
-
-/*
- * /proc/<ProcId> ProcDir
- * /proc/<ProcId>/driver ProcDriverDir
- * /proc/<ProcId>/driver/diag ProcDriverDiagFile
- * /proc/<ProcId>/device ProcDeviceDir
- * /proc/<ProcId>/device/0 procDevicexDir
- * /proc/<ProcId>/device/0/diag procDevicexDiagFile
- */
-
-
-static ssize_t proc_write_device(struct file *file, const char __user *buffer,
- size_t count, loff_t *ppos);
-static ssize_t proc_write_driver(struct file *file, const char __user *buffer,
- size_t count, loff_t *ppos);
-
-static struct proc_dir_entry *
- createProcDir(char *name, struct proc_dir_entry *parent)
-{
- struct proc_dir_entry *p = proc_mkdir_mode(name, S_IFDIR, parent);
-
- if (p == NULL)
- ERRDRV("failed to create /proc directory %s", name);
- return p;
-}
-
-static int seq_show_driver(struct seq_file *seq, void *offset);
-static int proc_open_driver(struct inode *inode, struct file *file)
-{
- return single_open(file, seq_show_driver, PDE_DATA(inode));
-}
-static const struct file_operations proc_fops_driver = {
- .open = proc_open_driver,
- .read = seq_read,
- .write = proc_write_driver,
- .llseek = seq_lseek,
- .release = single_release,
-};
-
-static int seq_show_device(struct seq_file *seq, void *offset);
-static int seq_show_device_property(struct seq_file *seq, void *offset);
-static int proc_open_device(struct inode *inode, struct file *file)
-{
- return single_open(file, seq_show_device, PDE_DATA(inode));
-}
-static const struct file_operations proc_fops_device = {
- .open = proc_open_device,
- .read = seq_read,
- .write = proc_write_device,
- .llseek = seq_lseek,
- .release = single_release,
-};
-static int proc_open_device_property(struct inode *inode, struct file *file)
-{
- return single_open(file, seq_show_device_property, PDE_DATA(inode));
-}
-static const struct file_operations proc_fops_device_property = {
- .open = proc_open_device_property,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
-};
-
-
-
-void visor_easyproc_InitDriver(struct easyproc_driver_info *pdriver,
- char *procId,
- void (*show_driver_info)(struct seq_file *),
- void (*show_device_info)(struct seq_file *,
- void *))
-{
- memset(pdriver, 0, sizeof(struct easyproc_driver_info));
- pdriver->ProcId = procId;
- if (pdriver->ProcId == NULL)
- ERRDRV("ProcId cannot be NULL (trouble ahead)!");
- pdriver->Show_driver_info = show_driver_info;
- pdriver->Show_device_info = show_device_info;
- if (pdriver->ProcDir == NULL)
- pdriver->ProcDir = createProcDir(pdriver->ProcId, NULL);
- if ((pdriver->ProcDir != NULL) && (pdriver->ProcDriverDir == NULL))
- pdriver->ProcDriverDir = createProcDir("driver",
- pdriver->ProcDir);
- if ((pdriver->ProcDir != NULL) && (pdriver->ProcDeviceDir == NULL))
- pdriver->ProcDeviceDir = createProcDir("device",
- pdriver->ProcDir);
- if ((pdriver->ProcDriverDir != NULL) &&
- (pdriver->ProcDriverDiagFile == NULL)) {
- pdriver->ProcDriverDiagFile =
- proc_create_data("diag", 0,
- pdriver->ProcDriverDir,
- &proc_fops_driver, pdriver);
- if (pdriver->ProcDriverDiagFile == NULL)
- ERRDRV("failed to register /proc/%s/driver/diag entry",
- pdriver->ProcId);
- }
-}
-EXPORT_SYMBOL_GPL(visor_easyproc_InitDriver);
-
-
-
-void visor_easyproc_InitDriverEx(struct easyproc_driver_info *pdriver,
- char *procId,
- void (*show_driver_info)(struct seq_file *),
- void (*show_device_info)(struct seq_file *,
- void *),
- void (*write_driver_info)(char *buf,
- size_t count,
- loff_t *ppos),
- void (*write_device_info)(char *buf,
- size_t count,
- loff_t *ppos,
- void *p))
-{
- visor_easyproc_InitDriver(pdriver, procId,
- show_driver_info, show_device_info);
- pdriver->Write_driver_info = write_driver_info;
- pdriver->Write_device_info = write_device_info;
-}
-EXPORT_SYMBOL_GPL(visor_easyproc_InitDriverEx);
-
-
-
-void visor_easyproc_DeInitDriver(struct easyproc_driver_info *pdriver)
-{
- if (pdriver->ProcDriverDiagFile != NULL) {
- remove_proc_entry("diag", pdriver->ProcDriverDir);
- pdriver->ProcDriverDiagFile = NULL;
- }
- if (pdriver->ProcDriverDir != NULL) {
- remove_proc_entry("driver", pdriver->ProcDir);
- pdriver->ProcDriverDir = NULL;
- }
- if (pdriver->ProcDeviceDir != NULL) {
- remove_proc_entry("device", pdriver->ProcDir);
- pdriver->ProcDeviceDir = NULL;
- }
- if (pdriver->ProcDir != NULL) {
- remove_proc_entry(pdriver->ProcId, NULL);
- pdriver->ProcDir = NULL;
- }
- pdriver->ProcId = NULL;
- pdriver->Show_driver_info = NULL;
- pdriver->Show_device_info = NULL;
- pdriver->Write_driver_info = NULL;
- pdriver->Write_device_info = NULL;
-}
-EXPORT_SYMBOL_GPL(visor_easyproc_DeInitDriver);
-
-
-
-void visor_easyproc_InitDevice(struct easyproc_driver_info *pdriver,
- struct easyproc_device_info *p, int devno,
- void *devdata)
-{
- if ((pdriver->ProcDeviceDir != NULL) && (p->procDevicexDir == NULL)) {
- char s[29];
-
- sprintf(s, "%d", devno);
- p->procDevicexDir = createProcDir(s, pdriver->ProcDeviceDir);
- p->devno = devno;
- }
- p->devdata = devdata;
- p->pdriver = pdriver;
- p->devno = devno;
- if ((p->procDevicexDir != NULL) && (p->procDevicexDiagFile == NULL)) {
- p->procDevicexDiagFile =
- proc_create_data("diag", 0, p->procDevicexDir,
- &proc_fops_device, p);
- if (p->procDevicexDiagFile == NULL)
- ERRDEVX(devno, "failed to register /proc/%s/device/%d/diag entry",
- pdriver->ProcId, devno
- );
- }
- memset(&(p->device_property_info[0]), 0,
- sizeof(p->device_property_info));
-}
-EXPORT_SYMBOL_GPL(visor_easyproc_InitDevice);
-
-
-
-void visor_easyproc_CreateDeviceProperty(struct easyproc_device_info *p,
- void (*show_property_info)
- (struct seq_file *, void *),
- char *property_name)
-{
- size_t i;
- struct easyproc_device_property_info *px = NULL;
-
- if (p->procDevicexDir == NULL) {
- ERRDRV("state error");
- return;
- }
- for (i = 0; i < ARRAY_SIZE(p->device_property_info); i++) {
- if (p->device_property_info[i].procEntry == NULL) {
- px = &(p->device_property_info[i]);
- break;
- }
- }
- if (!px) {
- ERRDEVX(p->devno, "too many device properties");
- return;
- }
- px->devdata = p->devdata;
- px->pdriver = p->pdriver;
- px->procEntry = proc_create_data(property_name, 0, p->procDevicexDir,
- &proc_fops_device_property, px);
- if (strlen(property_name)+1 > sizeof(px->property_name)) {
- ERRDEVX(p->devno, "device property name %s too long",
- property_name);
- return;
- }
- strcpy(px->property_name, property_name);
- if (px->procEntry == NULL) {
- ERRDEVX(p->devno,
- "failed to register /proc/%s/device/%d/%s entry",
- p->pdriver->ProcId, p->devno, property_name);
- return;
- }
- px->show_device_property_info = show_property_info;
-}
-EXPORT_SYMBOL_GPL(visor_easyproc_CreateDeviceProperty);
-
-
-
-void visor_easyproc_DeInitDevice(struct easyproc_driver_info *pdriver,
- struct easyproc_device_info *p, int devno)
-{
- size_t i;
-
- for (i = 0; i < ARRAY_SIZE(p->device_property_info); i++) {
- if (p->device_property_info[i].procEntry != NULL) {
- struct easyproc_device_property_info *px =
- &(p->device_property_info[i]);
- remove_proc_entry(px->property_name, p->procDevicexDir);
- px->procEntry = NULL;
- }
- }
- if (p->procDevicexDiagFile != NULL) {
- remove_proc_entry("diag", p->procDevicexDir);
- p->procDevicexDiagFile = NULL;
- }
- if (p->procDevicexDir != NULL) {
- char s[29];
-
- sprintf(s, "%d", devno);
- remove_proc_entry(s, pdriver->ProcDeviceDir);
- p->procDevicexDir = NULL;
- }
- p->devdata = NULL;
- p->pdriver = NULL;
-}
-EXPORT_SYMBOL_GPL(visor_easyproc_DeInitDevice);
-
-
-
-static int seq_show_driver(struct seq_file *seq, void *offset)
-{
- struct easyproc_driver_info *p =
- (struct easyproc_driver_info *)(seq->private);
- if (!p)
- return 0;
- (*(p->Show_driver_info))(seq);
- return 0;
-}
-
-
-
-static int seq_show_device(struct seq_file *seq, void *offset)
-{
- struct easyproc_device_info *p =
- (struct easyproc_device_info *)(seq->private);
- if ((!p) || (!(p->pdriver)))
- return 0;
- (*(p->pdriver->Show_device_info))(seq, p->devdata);
- return 0;
-}
-
-
-
-static int seq_show_device_property(struct seq_file *seq, void *offset)
-{
- struct easyproc_device_property_info *p =
- (struct easyproc_device_property_info *)(seq->private);
- if ((!p) || (!(p->show_device_property_info)))
- return 0;
- (*(p->show_device_property_info))(seq, p->devdata);
- return 0;
-}
-
-
-
-static ssize_t proc_write_driver(struct file *file, const char __user *buffer,
- size_t count, loff_t *ppos)
-{
- struct seq_file *seq = (struct seq_file *)file->private_data;
- struct easyproc_driver_info *p = NULL;
- char local_buf[256];
-
- if (seq == NULL)
- return 0;
- p = (struct easyproc_driver_info *)(seq->private);
- if ((!p) || (!(p->Write_driver_info)))
- return 0;
- if (count >= sizeof(local_buf))
- return -ENOMEM;
- if (copy_from_user(local_buf, buffer, count))
- return -EFAULT;
- local_buf[count] = '\0'; /* be friendly */
- (*(p->Write_driver_info))(local_buf, count, ppos);
- return count;
-}
-
-
-
-static ssize_t proc_write_device(struct file *file, const char __user *buffer,
- size_t count, loff_t *ppos)
-{
- struct seq_file *seq = (struct seq_file *)file->private_data;
- struct easyproc_device_info *p = NULL;
- char local_buf[256];
-
- if (seq == NULL)
- return 0;
- p = (struct easyproc_device_info *)(seq->private);
- if ((!p) || (!(p->pdriver)) || (!(p->pdriver->Write_device_info)))
- return 0;
- if (count >= sizeof(local_buf))
- return -ENOMEM;
- if (copy_from_user(local_buf, buffer, count))
- return -EFAULT;
- local_buf[count] = '\0'; /* be friendly */
- (*(p->pdriver->Write_device_info))(local_buf, count, ppos, p->devdata);
- return count;
-}
+++ /dev/null
-/* easyproc.h
- *
- * Copyright (C) 2010 - 2013 UNISYS CORPORATION
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
- * NON INFRINGEMENT. See the GNU General Public License for more
- * details.
- */
-
-/** @file *********************************************************************
- *
- * This describes the interfaces necessary for a simple /proc file
- * implementation for a driver.
- *
- ******************************************************************************
- */
-
-#ifndef __EASYPROC_H__
-#define __EASYPROC_H__
-
-#include "timskmod.h"
-
-
-struct easyproc_driver_info {
- struct proc_dir_entry *ProcDir;
- struct proc_dir_entry *ProcDriverDir;
- struct proc_dir_entry *ProcDriverDiagFile;
- struct proc_dir_entry *ProcDeviceDir;
- char *ProcId;
- void (*Show_device_info)(struct seq_file *seq, void *p);
- void (*Show_driver_info)(struct seq_file *seq);
- void (*Write_device_info)(char *buf, size_t count,
- loff_t *ppos, void *p);
- void (*Write_driver_info)(char *buf, size_t count, loff_t *ppos);
-};
-
-/* property is a file under /proc/<x>/device/<x>/<property_name> */
-struct easyproc_device_property_info {
- char property_name[25];
- struct proc_dir_entry *procEntry;
- struct easyproc_driver_info *pdriver;
- void *devdata;
- void (*show_device_property_info)(struct seq_file *seq, void *p);
-};
-
-struct easyproc_device_info {
- struct proc_dir_entry *procDevicexDir;
- struct proc_dir_entry *procDevicexDiagFile;
- struct easyproc_driver_info *pdriver;
- void *devdata;
- int devno;
- /* allow for a number of custom properties for each device: */
- struct easyproc_device_property_info device_property_info[10];
-};
-
-void visor_easyproc_InitDevice(struct easyproc_driver_info *pdriver,
- struct easyproc_device_info *p, int devno,
- void *devdata);
-void visor_easyproc_DeInitDevice(struct easyproc_driver_info *pdriver,
- struct easyproc_device_info *p, int devno);
-void visor_easyproc_InitDriver(struct easyproc_driver_info *pdriver,
- char *procId,
- void (*show_driver_info)(struct seq_file *),
- void (*show_device_info)(struct seq_file *,
- void *));
-void visor_easyproc_InitDriverEx(struct easyproc_driver_info *pdriver,
- char *procId,
- void (*show_driver_info)(struct seq_file *),
- void (*show_device_info)(struct seq_file *,
- void *),
- void (*Write_driver_info)(char *buf,
- size_t count,
- loff_t *ppos),
- void (*Write_device_info)(char *buf,
- size_t count,
- loff_t *ppos,
- void *p));
-void visor_easyproc_DeInitDriver(struct easyproc_driver_info *pdriver);
-void visor_easyproc_CreateDeviceProperty(struct easyproc_device_info *p,
- void (*show_property_info)
- (struct seq_file *, void *),
- char *property_name);
-
-#endif
* channel memory (in main memory of the host system) from code running in
* a virtual partition.
*/
-#include "uniklog.h"
#include "timskmod.h"
#include "memregion.h"
visor_memregion_create(HOSTADDRESS physaddr, ulong nbytes)
{
struct memregion *rc = NULL;
- struct memregion *memregion = kzalloc(sizeof(*memregion),
- GFP_KERNEL | __GFP_NORETRY);
- if (memregion == NULL) {
- ERRDRV("visor_memregion_create allocation failed");
+ struct memregion *memregion;
+
+ memregion = kzalloc(sizeof(*memregion), GFP_KERNEL | __GFP_NORETRY);
+ if (memregion == NULL)
return NULL;
- }
+
memregion->physaddr = physaddr;
memregion->nbytes = nbytes;
memregion->overlapped = FALSE;
{
struct memregion *memregion = NULL;
- if (parent == NULL) {
- ERRDRV("%s parent is NULL", __func__);
+ if (parent == NULL)
return NULL;
- }
- if (parent->mapped == NULL) {
- ERRDRV("%s parent is not mapped!", __func__);
+
+ if (parent->mapped == NULL)
return NULL;
- }
+
if ((offset >= parent->nbytes) ||
- ((offset + nbytes) >= parent->nbytes)) {
- ERRDRV("%s range (%lu,%lu) out of parent range",
- __func__, offset, nbytes);
+ ((offset + nbytes) >= parent->nbytes))
return NULL;
- }
+
memregion = kzalloc(sizeof(*memregion), GFP_KERNEL|__GFP_NORETRY);
- if (memregion == NULL) {
- ERRDRV("%s allocation failed", __func__);
+ if (memregion == NULL)
return NULL;
- }
memregion->physaddr = parent->physaddr + offset;
memregion->nbytes = nbytes;
ulong nbytes = memregion->nbytes;
memregion->requested = FALSE;
- if (!request_mem_region(physaddr, nbytes, MYDRVNAME))
- ERRDRV("cannot reserve channel memory @0x%lx for 0x%lx-- no big deal",
- physaddr, nbytes);
- else
+ if (request_mem_region(physaddr, nbytes, MYDRVNAME))
memregion->requested = TRUE;
memregion->mapped = ioremap_cache(physaddr, nbytes);
- if (memregion->mapped == NULL) {
- ERRDRV("cannot ioremap_cache channel memory @0x%lx for 0x%lx",
- physaddr, nbytes);
+ if (!memregion->mapped)
return FALSE;
- }
return TRUE;
}
struct memregion *memregion, ulong offset,
void *local, ulong nbytes)
{
- if (offset + nbytes > memregion->nbytes) {
- ERRDRV("memregion_readwrite offset out of range!!");
+ if (offset + nbytes > memregion->nbytes)
return -EIO;
- }
+
if (is_write)
memcpy_toio(memregion->mapped + offset, local, nbytes);
else
* Helper functions to schedule periodic work in Linux kernel mode.
*/
-#include "uniklog.h"
#include "timskmod.h"
#include "periodic_work.h"
goto unlock;
} else if (queue_delayed_work(pw->workqueue, &pw->work,
pw->jiffy_interval) < 0) {
- ERRDEV(pw->devnam, "queue_delayed_work failed!");
pw->is_scheduled = FALSE;
rc = FALSE;
goto unlock;
goto unlock;
}
if (pw->want_to_stop) {
- ERRDEV(pw->devnam,
- "dev_start_periodic_work failed!");
rc = FALSE;
goto unlock;
}
INIT_DELAYED_WORK(&pw->work, &periodic_work_func);
if (queue_delayed_work(pw->workqueue, &pw->work,
pw->jiffy_interval) < 0) {
- ERRDEV(pw->devnam, "%s queue_delayed_work failed!", __func__);
rc = FALSE;
goto unlock;
}
/* We get here if the delayed work was pending as
* delayed work, but was NOT run.
*/
- ASSERT(pw->is_scheduled);
+ WARN_ON(!pw->is_scheduled);
pw->is_scheduled = FALSE;
} else {
/* If we get here, either the delayed work:
}
if (pw->is_scheduled) {
write_unlock(&pw->lock);
- WARNDEV(pw->devnam,
- "waiting for delayed work...");
- /* We rely on the delayed work function running here,
- * and eventually calling
- * visor_periodic_work_nextperiod(),
- * which will see that want_to_stop is set, and
- * subsequently clear is_scheduled.
- */
SLEEPJIFFIES(10);
write_lock(&pw->lock);
} else {
+++ /dev/null
-/* procobjecttree.c
- *
- * Copyright (C) 2010 - 2013 UNISYS CORPORATION
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
- * NON INFRINGEMENT. See the GNU General Public License for more
- * details.
- */
-
-#include "procobjecttree.h"
-
-#define MYDRVNAME "procobjecttree"
-
-
-
-/** This is context info that we stash in each /proc file entry, which we
- * need in order to call the callback function that supplies the /proc read
- * info for that file.
- */
-struct proc_dir_entry_context {
- void (*show_property)(struct seq_file *, void *, int);
- MYPROCOBJECT *procObject;
- int propertyIndex;
-
-};
-
-/** This describes the attributes of a tree rooted at
- * <procDirRoot>/<name[0]>/<name[1]>/...
- * Properties for each object of this type will be located under
- * <procDirRoot>/<name[0]>/<name[1]>/.../<objectName>/<propertyName>.
- */
-struct MYPROCTYPE_Tag {
- const char **name; /**< node names for this type, ending with NULL */
- int nNames; /**< num of node names in <name> */
-
- /** root dir for this type tree in /proc */
- struct proc_dir_entry *procDirRoot;
-
- struct proc_dir_entry **procDirs; /**< for each node in <name> */
-
- /** bottom dir where objects will be rooted; i.e., this is
- * <procDirRoot>/<name[0]>/<name[1]>/.../, which is the same as the
- * last entry in the <procDirs> array. */
- struct proc_dir_entry *procDir;
-
- /** name for each property that objects of this type can have */
- const char **propertyNames;
-
- int nProperties; /**< num of names in <propertyNames> */
-
- /** Call this, passing MYPROCOBJECT.context and the property index
- * whenever someone reads the proc entry */
- void (*show_property)(struct seq_file *, void *, int);
-};
-
-
-
-struct MYPROCOBJECT_Tag {
- MYPROCTYPE *type;
-
- /** This is the name of the dir node in /proc under which the
- * properties of this object will appear as files. */
- char *name;
-
- int namesize; /**< number of bytes allocated for name */
- void *context; /**< passed to MYPROCTYPE.show_property */
-
- /** <type.procDirRoot>/<type.name[0]>/<type.name[1]>/.../<name> */
- struct proc_dir_entry *procDir;
-
- /** a proc dir entry for each of the properties of the object;
- * properties are identified in MYPROCTYPE.propertyNames, so each of
- * the <procDirProperties> describes a single file like
- * <type.procDirRoot>/<type.name[0]>/<type.name[1]>/...
- * /<name>/<propertyName>
- */
- struct proc_dir_entry **procDirProperties;
-
- /** this is a holding area for the context information that is needed
- * to run the /proc callback function */
- struct proc_dir_entry_context *procDirPropertyContexts;
-};
-
-
-
-static struct proc_dir_entry *
-createProcDir(const char *name, struct proc_dir_entry *parent)
-{
- struct proc_dir_entry *p = proc_mkdir_mode(name, S_IFDIR, parent);
-
- if (p == NULL)
- ERRDRV("failed to create /proc directory %s", name);
- return p;
-}
-
-static struct proc_dir_entry *
-createProcFile(const char *name, struct proc_dir_entry *parent,
- const struct file_operations *fops, void *data)
-{
- struct proc_dir_entry *p = proc_create_data(name, 0, parent,
- fops, data);
- if (p == NULL)
- ERRDRV("failed to create /proc file %s", name);
- return p;
-}
-
-static int seq_show(struct seq_file *seq, void *offset);
-static int proc_open(struct inode *inode, struct file *file)
-{
- return single_open(file, seq_show, PDE_DATA(inode));
-}
-
-static const struct file_operations proc_fops = {
- .open = proc_open,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
-};
-
-
-
-MYPROCTYPE *visor_proc_CreateType(struct proc_dir_entry *procDirRoot,
- const char **name,
- const char **propertyNames,
- void (*show_property)(struct seq_file *,
- void *, int))
-{
- int i = 0;
- MYPROCTYPE *rc = NULL, *type = NULL;
- struct proc_dir_entry *parent = NULL;
-
- if (procDirRoot == NULL) {
- ERRDRV("procDirRoot cannot be NULL!\n");
- goto Away;
- }
- if (name == NULL || name[0] == NULL) {
- ERRDRV("name must contain at least 1 node name!\n");
- goto Away;
- }
- type = kzalloc(sizeof(MYPROCTYPE), GFP_KERNEL | __GFP_NORETRY);
- if (type == NULL) {
- ERRDRV("out of memory\n");
- goto Away;
- }
- type->name = name;
- type->propertyNames = propertyNames;
- type->nProperties = 0;
- type->nNames = 0;
- type->show_property = show_property;
- type->procDirRoot = procDirRoot;
- if (type->propertyNames != NULL)
- while (type->propertyNames[type->nProperties] != NULL)
- type->nProperties++;
- while (type->name[type->nNames] != NULL)
- type->nNames++;
- type->procDirs = kzalloc((type->nNames + 1) *
- sizeof(struct proc_dir_entry *),
- GFP_KERNEL | __GFP_NORETRY);
- if (type->procDirs == NULL) {
- ERRDRV("out of memory\n");
- goto Away;
- }
- parent = procDirRoot;
- for (i = 0; i < type->nNames; i++) {
- type->procDirs[i] = createProcDir(type->name[i], parent);
- if (type->procDirs[i] == NULL) {
- rc = NULL;
- goto Away;
- }
- parent = type->procDirs[i];
- }
- type->procDir = type->procDirs[type->nNames-1];
- rc = type;
-Away:
- if (rc == NULL) {
- if (type != NULL) {
- visor_proc_DestroyType(type);
- type = NULL;
- }
- }
- return rc;
-}
-EXPORT_SYMBOL_GPL(visor_proc_CreateType);
-
-
-
-void visor_proc_DestroyType(MYPROCTYPE *type)
-{
- if (type == NULL)
- return;
- if (type->procDirs != NULL) {
- int i = type->nNames-1;
-
- while (i >= 0) {
- if (type->procDirs[i] != NULL) {
- struct proc_dir_entry *parent = NULL;
-
- if (i == 0)
- parent = type->procDirRoot;
- else
- parent = type->procDirs[i-1];
- remove_proc_entry(type->name[i], parent);
- }
- i--;
- }
- kfree(type->procDirs);
- type->procDirs = NULL;
- }
- kfree(type);
-}
-EXPORT_SYMBOL_GPL(visor_proc_DestroyType);
-
-
-
-MYPROCOBJECT *visor_proc_CreateObject(MYPROCTYPE *type,
- const char *name, void *context)
-{
- MYPROCOBJECT *obj = NULL, *rc = NULL;
- int i = 0;
-
- if (type == NULL) {
- ERRDRV("type cannot be NULL\n");
- goto Away;
- }
- obj = kzalloc(sizeof(MYPROCOBJECT), GFP_KERNEL | __GFP_NORETRY);
- if (obj == NULL) {
- ERRDRV("out of memory\n");
- goto Away;
- }
- obj->type = type;
- obj->context = context;
- if (name == NULL) {
- obj->name = NULL;
- obj->procDir = type->procDir;
- } else {
- obj->namesize = strlen(name)+1;
- obj->name = kmalloc(obj->namesize, GFP_KERNEL | __GFP_NORETRY);
- if (obj->name == NULL) {
- obj->namesize = 0;
- ERRDRV("out of memory\n");
- goto Away;
- }
- strcpy(obj->name, name);
- obj->procDir = createProcDir(obj->name, type->procDir);
- if (obj->procDir == NULL)
- goto Away;
- }
- obj->procDirPropertyContexts =
- kzalloc((type->nProperties + 1) *
- sizeof(struct proc_dir_entry_context),
- GFP_KERNEL | __GFP_NORETRY);
- if (obj->procDirPropertyContexts == NULL) {
- ERRDRV("out of memory\n");
- goto Away;
- }
- obj->procDirProperties = kzalloc((type->nProperties + 1) *
- sizeof(struct proc_dir_entry *),
- GFP_KERNEL | __GFP_NORETRY);
- if (obj->procDirProperties == NULL) {
- ERRDRV("out of memory\n");
- goto Away;
- }
- for (i = 0; i < type->nProperties; i++) {
- obj->procDirPropertyContexts[i].procObject = obj;
- obj->procDirPropertyContexts[i].propertyIndex = i;
- obj->procDirPropertyContexts[i].show_property =
- type->show_property;
- if (type->propertyNames[i][0] != '\0') {
- /* only create properties that have names */
- obj->procDirProperties[i] =
- createProcFile(type->propertyNames[i],
- obj->procDir, &proc_fops,
- &obj->procDirPropertyContexts[i]);
- if (obj->procDirProperties[i] == NULL) {
- rc = NULL;
- goto Away;
- }
- }
- }
- rc = obj;
-Away:
- if (rc == NULL) {
- if (obj != NULL) {
- visor_proc_DestroyObject(obj);
- obj = NULL;
- }
- }
- return rc;
-}
-EXPORT_SYMBOL_GPL(visor_proc_CreateObject);
-
-
-
-void visor_proc_DestroyObject(MYPROCOBJECT *obj)
-{
- MYPROCTYPE *type = NULL;
-
- if (obj == NULL)
- return;
- type = obj->type;
- if (type == NULL)
- return;
- if (obj->procDirProperties != NULL) {
- int i = 0;
-
- for (i = 0; i < type->nProperties; i++) {
- if (obj->procDirProperties[i] != NULL) {
- remove_proc_entry(type->propertyNames[i],
- obj->procDir);
- obj->procDirProperties[i] = NULL;
- }
- }
- kfree(obj->procDirProperties);
- obj->procDirProperties = NULL;
- }
-
- kfree(obj->procDirPropertyContexts);
- obj->procDirPropertyContexts = NULL;
-
- if (obj->procDir != NULL) {
- if (obj->name != NULL)
- remove_proc_entry(obj->name, type->procDir);
- obj->procDir = NULL;
- }
-
- kfree(obj->name);
- obj->name = NULL;
- kfree(obj);
-}
-EXPORT_SYMBOL_GPL(visor_proc_DestroyObject);
-
-
-
-static int seq_show(struct seq_file *seq, void *offset)
-{
- struct proc_dir_entry_context *ctx = seq->private;
-
- if (ctx == NULL) {
- ERRDRV("I don't have a freakin' clue...");
- return 0;
- }
- (*ctx->show_property)(seq, ctx->procObject->context,
- ctx->propertyIndex);
- return 0;
-}
* details.
*/
-#include "uniklog.h"
#include "timskmod.h"
#define MYDRVNAME "timskmodutils"
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
-#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/errno.h>
*/
#include <linux/module.h>
-#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+#include <linux/atomic.h>
#include <linux/cdev.h>
#include <linux/delay.h>
#include <linux/device.h>
#include "vme_user.h"
-static DEFINE_MUTEX(vme_user_mutex);
static const char driver_name[] = "vme_user";
static int bus[VME_USER_BUS_MAX];
struct device *device; /* Sysfs device */
struct vme_resource *resource; /* VME resource */
int users; /* Number of current users */
+ int mmap_count; /* Number of current mmap's */
};
static struct image_desc image[VME_DEVS];
loff_t *);
static loff_t vme_user_llseek(struct file *, loff_t, int);
static long vme_user_unlocked_ioctl(struct file *, unsigned int, unsigned long);
+static int vme_user_mmap(struct file *file, struct vm_area_struct *vma);
+
+static void vme_user_vm_open(struct vm_area_struct *vma);
+static void vme_user_vm_close(struct vm_area_struct *vma);
static int vme_user_match(struct vme_dev *);
static int vme_user_probe(struct vme_dev *);
.llseek = vme_user_llseek,
.unlocked_ioctl = vme_user_unlocked_ioctl,
.compat_ioctl = vme_user_unlocked_ioctl,
+ .mmap = vme_user_mmap,
+};
+
+struct vme_user_vma_priv {
+ unsigned int minor;
+ atomic_t refcnt;
+};
+
+static const struct vm_operations_struct vme_user_vm_ops = {
+ .open = vme_user_vm_open,
+ .close = vme_user_vm_close,
};
case VME_SET_MASTER:
+ if (image[minor].mmap_count != 0) {
+ pr_warn("Can't adjust mapped window\n");
+ return -EPERM;
+ }
+
copied = copy_from_user(&master, argp, sizeof(master));
if (copied != 0) {
pr_warn("Partial copy from userspace\n");
vme_user_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
int ret;
+ struct inode *inode = file_inode(file);
+ unsigned int minor = MINOR(inode->i_rdev);
- mutex_lock(&vme_user_mutex);
- ret = vme_user_ioctl(file_inode(file), file, cmd, arg);
- mutex_unlock(&vme_user_mutex);
+ mutex_lock(&image[minor].mutex);
+ ret = vme_user_ioctl(inode, file, cmd, arg);
+ mutex_unlock(&image[minor].mutex);
return ret;
}
+static void vme_user_vm_open(struct vm_area_struct *vma)
+{
+ struct vme_user_vma_priv *vma_priv = vma->vm_private_data;
+
+ atomic_inc(&vma_priv->refcnt);
+}
+
+static void vme_user_vm_close(struct vm_area_struct *vma)
+{
+ struct vme_user_vma_priv *vma_priv = vma->vm_private_data;
+ unsigned int minor = vma_priv->minor;
+
+ if (!atomic_dec_and_test(&vma_priv->refcnt))
+ return;
+
+ mutex_lock(&image[minor].mutex);
+ image[minor].mmap_count--;
+ mutex_unlock(&image[minor].mutex);
+
+ kfree(vma_priv);
+}
+
+static int vme_user_master_mmap(unsigned int minor, struct vm_area_struct *vma)
+{
+ int err;
+ struct vme_user_vma_priv *vma_priv;
+
+ mutex_lock(&image[minor].mutex);
+
+ err = vme_master_mmap(image[minor].resource, vma);
+ if (err) {
+ mutex_unlock(&image[minor].mutex);
+ return err;
+ }
+
+ vma_priv = kmalloc(sizeof(struct vme_user_vma_priv), GFP_KERNEL);
+ if (vma_priv == NULL) {
+ mutex_unlock(&image[minor].mutex);
+ return -ENOMEM;
+ }
+
+ vma_priv->minor = minor;
+ atomic_set(&vma_priv->refcnt, 1);
+ vma->vm_ops = &vme_user_vm_ops;
+ vma->vm_private_data = vma_priv;
+
+ image[minor].mmap_count++;
+
+ mutex_unlock(&image[minor].mutex);
+
+ return 0;
+}
+
+static int vme_user_mmap(struct file *file, struct vm_area_struct *vma)
+{
+ unsigned int minor = MINOR(file_inode(file)->i_rdev);
+
+ if (type[minor] == MASTER_MINOR)
+ return vme_user_master_mmap(minor, vma);
+
+ return -ENODEV;
+}
+
/*
* Unallocate a previously allocated buffer
if (byRFType == RF_RFMD2959) {
if (byLocalID <= REV_ID_VT3253_A1) {
for (ii = 0; ii < CB_VT3253_INIT_FOR_RFMD; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253InitTab_RFMD[ii][0], byVT3253InitTab_RFMD[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253InitTab_RFMD[ii][0],
+ byVT3253InitTab_RFMD[ii][1]);
} else {
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_RFMD; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_RFMD[ii][0], byVT3253B0_RFMD[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_RFMD[ii][0],
+ byVT3253B0_RFMD[ii][1]);
for (ii = 0; ii < CB_VT3253B0_AGC_FOR_RFMD2959; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC4_RFMD2959[ii][0], byVT3253B0_AGC4_RFMD2959[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_AGC4_RFMD2959[ii][0],
+ byVT3253B0_AGC4_RFMD2959[ii][1]);
VNSvOutPortD(dwIoBase + MAC_REG_ITRTMSET, 0x23);
MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT(0));
priv->ldBmThreshold[3] = 0;
} else if ((byRFType == RF_AIROHA) || (byRFType == RF_AL2230S)) {
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_AIROHA2230[ii][0],
+ byVT3253B0_AIROHA2230[ii][1]);
for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
priv->abyBBVGA[0] = 0x1C;
priv->abyBBVGA[1] = 0x10;
priv->ldBmThreshold[3] = 0;
} else if (byRFType == RF_UW2451) {
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_UW2451[ii][0], byVT3253B0_UW2451[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_UW2451[ii][0],
+ byVT3253B0_UW2451[ii][1]);
for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_AGC[ii][0],
+ byVT3253B0_AGC[ii][1]);
VNSvOutPortB(dwIoBase + MAC_REG_ITRTMSET, 0x23);
MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT(0));
priv->ldBmThreshold[3] = 0;
} else if (byRFType == RF_UW2452) {
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_UW2451[ii][0], byVT3253B0_UW2451[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_UW2451[ii][0],
+ byVT3253B0_UW2451[ii][1]);
/* Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
/*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/
bResult &= BBbWriteEmbedded(priv, 0xb0, 0x58);
for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
priv->abyBBVGA[0] = 0x14;
priv->abyBBVGA[1] = 0x0A;
} else if (byRFType == RF_VT3226) {
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_AIROHA2230[ii][0],
+ byVT3253B0_AIROHA2230[ii][1]);
for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
priv->abyBBVGA[0] = 0x1C;
priv->abyBBVGA[1] = 0x10;
/* {{ RobertYu: 20050104 */
} else if (byRFType == RF_AIROHA7230) {
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_AIROHA2230[ii][0],
+ byVT3253B0_AIROHA2230[ii][1]);
/* {{ RobertYu:20050223, request by JerryChung */
/* }} */
for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
priv->abyBBVGA[0] = 0x1C;
priv->abyBBVGA[1] = 0x10;
/* clear NAV */
MACvRegBitsOn(pDevice->PortOffset, MAC_REG_MACCR, MACCR_CLRNAV);
- /* TX_PE will reserve 3 us for MAX2829 A mode only, it is for better TX throughput */
+ /* TX_PE will reserve 3 us for MAX2829 A mode only,
+ it is for better TX throughput */
if (pDevice->byRFType == RF_AIROHA7230)
RFbAL7230SelectChannelPostProcess(pDevice, pDevice->byCurrentCh,
/* set HW default power register */
MACvSelectPage1(pDevice->PortOffset);
RFbSetPower(pDevice, RATE_1M, pDevice->byCurrentCh);
- VNSvOutPortB(pDevice->PortOffset + MAC_REG_PWRCCK, pDevice->byCurPwr);
+ VNSvOutPortB(pDevice->PortOffset + MAC_REG_PWRCCK,
+ pDevice->byCurPwr);
RFbSetPower(pDevice, RATE_6M, pDevice->byCurrentCh);
- VNSvOutPortB(pDevice->PortOffset + MAC_REG_PWROFDM, pDevice->byCurPwr);
+ VNSvOutPortB(pDevice->PortOffset + MAC_REG_PWROFDM,
+ pDevice->byCurPwr);
MACvSelectPage0(pDevice->PortOffset);
spin_unlock_irqrestore(&pDevice->lock, flags);
#include <linux/slab.h>
/*--------------------- Static Definitions -------------------------*/
-//
-// Define module options
-//
+/*
+ * Define module options
+ */
MODULE_AUTHOR("VIA Networking Technologies, Inc., <lyndonchen@vntek.com.tw>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("VIA Networking Solomon-A/B/G Wireless LAN Adapter Driver");
DEVICE_PARAM(BasebandType, "baseband type");
-//
-// Static vars definitions
-//
+/*
+ * Static vars definitions
+ */
static CHIP_INFO chip_info_table[] = {
{ VT3253, "VIA Networking Solomon-A/B/G Wireless LAN Adapter ",
256, 1, DEVICE_FLAGS_IP_ALIGN|DEVICE_FLAGS_TX_ALIGN },
pr_debug(" byBBType= %d\n", (int)pDevice->byBBType);
}
-//
-// Initialisation of MAC & BBP registers
-//
+/*
+ * Initialisation of MAC & BBP registers
+ */
static void device_init_registers(struct vnt_private *pDevice)
{
void *vir_pool;
/*allocate all RD/TD rings a single pool*/
- vir_pool = pci_zalloc_consistent(pDevice->pcid,
+ vir_pool = dma_zalloc_coherent(&pDevice->pcid->dev,
pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc),
- &pDevice->pool_dma);
+ &pDevice->pool_dma, GFP_ATOMIC);
if (vir_pool == NULL) {
dev_err(&pDevice->pcid->dev, "allocate desc dma memory failed\n");
return false;
pDevice->rd1_pool_dma = pDevice->rd0_pool_dma +
pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc);
- pDevice->tx0_bufs = pci_zalloc_consistent(pDevice->pcid,
+ pDevice->tx0_bufs = dma_zalloc_coherent(&pDevice->pcid->dev,
pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ +
pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ +
CB_BEACON_BUF_SIZE +
CB_MAX_BUF_SIZE,
- &pDevice->tx_bufs_dma0);
+ &pDevice->tx_bufs_dma0,
+ GFP_ATOMIC);
if (pDevice->tx0_bufs == NULL) {
dev_err(&pDevice->pcid->dev, "allocate buf dma memory failed\n");
- pci_free_consistent(pDevice->pcid,
+ dma_free_coherent(&pDevice->pcid->dev,
pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
pDevice->td1_pool_dma = pDevice->td0_pool_dma +
pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc);
- // vir_pool: pvoid type
+ /* vir_pool: pvoid type */
pDevice->apTD0Rings = vir_pool
+ pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc)
+ pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc);
static void device_free_rings(struct vnt_private *pDevice)
{
- pci_free_consistent(pDevice->pcid,
+ dma_free_coherent(&pDevice->pcid->dev,
pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
);
if (pDevice->tx0_bufs)
- pci_free_consistent(pDevice->pcid,
+ dma_free_coherent(&pDevice->pcid->dev,
pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ +
pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ +
CB_BEACON_BUF_SIZE +
PSRxDesc pDesc = &(pDevice->aRD0Ring[i]);
PDEVICE_RD_INFO pRDInfo = pDesc->pRDInfo;
- pci_unmap_single(pDevice->pcid, pRDInfo->skb_dma,
- pDevice->rx_buf_sz, PCI_DMA_FROMDEVICE);
+ dma_unmap_single(&pDevice->pcid->dev, pRDInfo->skb_dma,
+ pDevice->rx_buf_sz, DMA_FROM_DEVICE);
dev_kfree_skb(pRDInfo->skb);
PSRxDesc pDesc = &(pDevice->aRD1Ring[i]);
PDEVICE_RD_INFO pRDInfo = pDesc->pRDInfo;
- pci_unmap_single(pDevice->pcid, pRDInfo->skb_dma,
- pDevice->rx_buf_sz, PCI_DMA_FROMDEVICE);
+ dma_unmap_single(&pDevice->pcid->dev, pRDInfo->skb_dma,
+ pDevice->rx_buf_sz, DMA_FROM_DEVICE);
dev_kfree_skb(pRDInfo->skb);
PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma))
- pci_unmap_single(pDevice->pcid, pTDInfo->skb_dma,
- pTDInfo->skb->len, PCI_DMA_TODEVICE);
+ dma_unmap_single(&pDevice->pcid->dev, pTDInfo->skb_dma,
+ pTDInfo->skb->len, DMA_TO_DEVICE);
if (pTDInfo->skb)
dev_kfree_skb(pTDInfo->skb);
PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma))
- pci_unmap_single(pDevice->pcid, pTDInfo->skb_dma,
- pTDInfo->skb->len, PCI_DMA_TODEVICE);
+ dma_unmap_single(&pDevice->pcid->dev, pTDInfo->skb_dma,
+ pTDInfo->skb->len, DMA_TO_DEVICE);
if (pTDInfo->skb)
dev_kfree_skb(pTDInfo->skb);
ASSERT(pRDInfo->skb);
pRDInfo->skb_dma =
- pci_map_single(pDevice->pcid,
+ dma_map_single(&pDevice->pcid->dev,
skb_put(pRDInfo->skb, skb_tailroom(pRDInfo->skb)),
- pDevice->rx_buf_sz, PCI_DMA_FROMDEVICE);
+ pDevice->rx_buf_sz, DMA_FROM_DEVICE);
*((unsigned int *)&(pRD->m_rd0RD0)) = 0; /* FIX cast */
byTsr0 = pTD->m_td0TD0.byTSR0;
byTsr1 = pTD->m_td0TD0.byTSR1;
- //Only the status of first TD in the chain is correct
+ /* Only the status of first TD in the chain is correct */
if (pTD->m_td1TD1.byTCR & TCR_STP) {
if ((pTD->pTDInfo->byFlags & TD_FLAGS_NETIF_SKB) != 0) {
PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
struct sk_buff *skb = pTDInfo->skb;
- // pre-allocated buf_dma can't be unmapped.
+ /* pre-allocated buf_dma can't be unmapped. */
if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma)) {
- pci_unmap_single(pDevice->pcid, pTDInfo->skb_dma, skb->len,
- PCI_DMA_TODEVICE);
+ dma_unmap_single(&pDevice->pcid->dev, pTDInfo->skb_dma,
+ skb->len, DMA_TO_DEVICE);
}
if (pTDInfo->byFlags & TD_FLAGS_NETIF_SKB)
spin_lock_irqsave(&pDevice->lock, flags);
- //Make sure current page is 0
+ /* Make sure current page is 0 */
VNSvInPortB(pDevice->PortOffset + MAC_REG_PAGE1SEL, &byOrgPageSel);
if (byOrgPageSel == 1)
MACvSelectPage0(pDevice->PortOffset);
byOrgPageSel = 0;
MACvReadMIBCounter(pDevice->PortOffset, &dwMIBCounter);
- // TBD....
- // Must do this after doing rx/tx, cause ISR bit is slow
- // than RD/TD write back
- // update ISR counter
+ /*
+ * TBD....
+ * Must do this after doing rx/tx, cause ISR bit is slow
+ * than RD/TD write back
+ * update ISR counter
+ */
STAvUpdate802_11Counter(&pDevice->s802_11Counter, &pDevice->scStatistic, dwMIBCounter);
while (pDevice->dwIsr != 0) {
STAvUpdateIsrStatCounter(&pDevice->scStatistic, pDevice->dwIsr);
skb = rd_info->skb;
- pci_unmap_single(priv->pcid, rd_info->skb_dma,
- priv->rx_buf_sz, PCI_DMA_FROMDEVICE);
+ dma_unmap_single(&priv->pcid->dev, rd_info->skb_dma,
+ priv->rx_buf_sz, DMA_FROM_DEVICE);
frame_size = le16_to_cpu(curr_rd->m_rd1RD1.wReqCount)
- cpu_to_le16(curr_rd->m_rd0RD0.wResCount);
int vnt_set_keys(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
struct ieee80211_vif *vif, struct ieee80211_key_conf *key);
-#endif // __KEY_H__
+#endif /* __KEY_H__ */
*/
void MACvSetShortRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit)
{
- // set SRT
+ /* set SRT */
VNSvOutPortB(dwIoBase + MAC_REG_SRT, byRetryLimit);
}
*/
void MACvSetLongRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit)
{
- // set LRT
+ /* set LRT */
VNSvOutPortB(dwIoBase + MAC_REG_LRT, byRetryLimit);
}
ASSERT(byLoopbackMode < 3);
byLoopbackMode <<= 6;
- // set TCR
+ /* set TCR */
VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
byOrgValue = byOrgValue & 0x3F;
byOrgValue = byOrgValue | byLoopbackMode;
{
int ii;
- // read page0 register
+ /* read page0 register */
for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++)
VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + ii));
MACvSelectPage1(dwIoBase);
- // read page1 register
+ /* read page1 register */
for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
int ii;
MACvSelectPage1(dwIoBase);
- // restore page1
+ /* restore page1 */
for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
VNSvOutPortB((dwIoBase + ii), *(pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
MACvSelectPage0(dwIoBase);
- // restore RCR,TCR,IMR...
+ /* restore RCR,TCR,IMR... */
for (ii = MAC_REG_RCR; ii < MAC_REG_ISR; ii++)
VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
- // restore MAC Config.
+ /* restore MAC Config. */
for (ii = MAC_REG_LRT; ii < MAC_REG_PAGE1SEL; ii++)
VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
VNSvOutPortB(dwIoBase + MAC_REG_CFG, *(pbyCxtBuf + MAC_REG_CFG));
- // restore PS Config.
+ /* restore PS Config. */
for (ii = MAC_REG_PSCFG; ii < MAC_REG_BBREGCTL; ii++)
VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
- // restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
+ /* restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR */
VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_TXDMAPTR0));
VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_AC0DMAPTR));
VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_BCNDMAPTR));
unsigned char byData;
unsigned short ww;
- // turn on HOSTCR_SOFTRST, just write 0x01 to reset
+ /* turn on HOSTCR_SOFTRST, just write 0x01 to reset */
VNSvOutPortB(dwIoBase + MAC_REG_HOSTCR, 0x01);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
unsigned char abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0+MAC_MAX_CONTEXT_SIZE_PAGE1];
bool bRetVal;
- // PATCH....
- // save some important register's value, then do
- // reset, then restore register's value
-
- // save MAC context
+ /* PATCH....
+ * save some important register's value, then do
+ * reset, then restore register's value
+ */
+ /* save MAC context */
MACvSaveContext(dwIoBase, abyTmpRegData);
- // do reset
+ /* do reset */
bRetVal = MACbSoftwareReset(dwIoBase);
- // restore MAC context, except CR0
+ /* restore MAC context, except CR0 */
MACvRestoreContext(dwIoBase, abyTmpRegData);
return bRetVal;
unsigned long dwData;
unsigned char byData;
- // turn off wow temp for turn off Rx safely
+ /* turn off wow temp for turn off Rx safely */
- // Clear RX DMA0,1
+ /* Clear RX DMA0,1 */
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_CLRRUN);
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_CLRRUN);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
return false;
}
- // try to safe shutdown RX
+ /* try to safe shutdown RX */
MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON);
- // W_MAX_TIMEOUT is the timeout period
+ /* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
if (!(byData & HOSTCR_RXONST))
unsigned long dwData;
unsigned char byData;
- // Clear TX DMA
- //Tx0
+ /* Clear TX DMA */
+ /* Tx0 */
VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_CLRRUN);
- //AC0
+ /* AC0 */
VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_CLRRUN);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
return false;
}
- // try to safe shutdown TX
+ /* try to safe shutdown TX */
MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON);
- // W_MAX_TIMEOUT is the timeout period
+ /* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
if (!(byData & HOSTCR_TXONST))
*/
bool MACbShutdown(void __iomem *dwIoBase)
{
- // disable MAC IMR
+ /* disable MAC IMR */
MACvIntDisable(dwIoBase);
MACvSetLoopbackMode(dwIoBase, MAC_LB_INTERNAL);
- // stop the adapter
+ /* stop the adapter */
if (!MACbSafeStop(dwIoBase)) {
MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
return false;
*/
void MACvInitialize(void __iomem *dwIoBase)
{
- // clear sticky bits
+ /* clear sticky bits */
MACvClearStckDS(dwIoBase);
- // disable force PME-enable
+ /* disable force PME-enable */
VNSvOutPortB(dwIoBase + MAC_REG_PMC1, PME_OVR);
- // only 3253 A
+ /* only 3253 A */
- // do reset
+ /* do reset */
MACbSoftwareReset(dwIoBase);
- // reset TSF counter
+ /* reset TSF counter */
VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
- // enable TSF counter
+ /* enable TSF counter */
VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
}
* Return Value: none
*
*/
-//TxDMA1 = AC0DMA
+/* TxDMA1 = AC0DMA */
void MACvSetCurrAC0DescAddrEx(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
{
unsigned short ww;
VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelay);
VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
- for (ii = 0; ii < 66; ii++) { // assume max PCI clock is 66Mhz
+ for (ii = 0; ii < 66; ii++) { /* assume max PCI clock is 66Mhz */
for (uu = 0; uu < uDelay; uu++) {
VNSvInPortB(dwIoBase + MAC_REG_TMCTL0, &byValue);
if ((byValue == 0) ||
{
unsigned char byOrgValue;
unsigned int ww;
- // Read PSCTL
+ /* Read PSCTL */
if (MACbIsRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PS))
return true;
- // Disable PS
+ /* Disable PS */
MACvRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PSEN);
- // Check if SyncFlushOK
+ /* Check if SyncFlushOK */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
VNSvInPortB(dwIoBase + MAC_REG_PSCTL, &byOrgValue);
if (byOrgValue & PSCTL_WAKEDONE)
wOffset += (uKeyIdx * 4);
for (ii = 0; ii < 4; ii++) {
- // always push 128 bits
+ /* always push 128 bits */
pr_debug("3.(%d) wOffset: %d, Data: %X\n",
ii, wOffset+ii, *pdwKey);
VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
/**********************/
/* ABNORMAL interrupt */
/**********************/
- // not any IMR bit invoke irq
+ /* not any IMR bit invoke irq */
if (dwIsr == 0) {
pStatistic->ISRStat.dwIsrUnknown++;
return;
}
-//Added by Kyle
- if (dwIsr & ISR_TXDMA0) // ISR, bit0
- pStatistic->ISRStat.dwIsrTx0OK++; // TXDMA0 successful
+/* Added by Kyle */
+ if (dwIsr & ISR_TXDMA0) /* ISR, bit0 */
+ pStatistic->ISRStat.dwIsrTx0OK++; /* TXDMA0 successful */
- if (dwIsr & ISR_AC0DMA) // ISR, bit1
- pStatistic->ISRStat.dwIsrAC0TxOK++; // AC0DMA successful
+ if (dwIsr & ISR_AC0DMA) /* ISR, bit1 */
+ pStatistic->ISRStat.dwIsrAC0TxOK++; /* AC0DMA successful */
- if (dwIsr & ISR_BNTX) // ISR, bit2
- pStatistic->ISRStat.dwIsrBeaconTxOK++; // BeaconTx successful
+ if (dwIsr & ISR_BNTX) /* ISR, bit2 */
+ pStatistic->ISRStat.dwIsrBeaconTxOK++; /* BeaconTx successful */
- if (dwIsr & ISR_RXDMA0) // ISR, bit3
- pStatistic->ISRStat.dwIsrRx0OK++; // Rx0 successful
+ if (dwIsr & ISR_RXDMA0) /* ISR, bit3 */
+ pStatistic->ISRStat.dwIsrRx0OK++; /* Rx0 successful */
- if (dwIsr & ISR_TBTT) // ISR, bit4
- pStatistic->ISRStat.dwIsrTBTTInt++; // TBTT successful
+ if (dwIsr & ISR_TBTT) /* ISR, bit4 */
+ pStatistic->ISRStat.dwIsrTBTTInt++; /* TBTT successful */
- if (dwIsr & ISR_SOFTTIMER) // ISR, bit6
+ if (dwIsr & ISR_SOFTTIMER) /* ISR, bit6 */
pStatistic->ISRStat.dwIsrSTIMERInt++;
- if (dwIsr & ISR_WATCHDOG) // ISR, bit7
+ if (dwIsr & ISR_WATCHDOG) /* ISR, bit7 */
pStatistic->ISRStat.dwIsrWatchDog++;
- if (dwIsr & ISR_FETALERR) // ISR, bit8
+ if (dwIsr & ISR_FETALERR) /* ISR, bit8 */
pStatistic->ISRStat.dwIsrUnrecoverableError++;
- if (dwIsr & ISR_SOFTINT) // ISR, bit9
- pStatistic->ISRStat.dwIsrSoftInterrupt++; // software interrupt
+ if (dwIsr & ISR_SOFTINT) /* ISR, bit9 */
+ pStatistic->ISRStat.dwIsrSoftInterrupt++; /* software interrupt */
- if (dwIsr & ISR_MIBNEARFULL) // ISR, bit10
+ if (dwIsr & ISR_MIBNEARFULL) /* ISR, bit10 */
pStatistic->ISRStat.dwIsrMIBNearfull++;
- if (dwIsr & ISR_RXNOBUF) // ISR, bit11
- pStatistic->ISRStat.dwIsrRxNoBuf++; // Rx No Buff
+ if (dwIsr & ISR_RXNOBUF) /* ISR, bit11 */
+ pStatistic->ISRStat.dwIsrRxNoBuf++; /* Rx No Buff */
- if (dwIsr & ISR_RXDMA1) // ISR, bit12
- pStatistic->ISRStat.dwIsrRx1OK++; // Rx1 successful
+ if (dwIsr & ISR_RXDMA1) /* ISR, bit12 */
+ pStatistic->ISRStat.dwIsrRx1OK++; /* Rx1 successful */
- if (dwIsr & ISR_SOFTTIMER1) // ISR, bit21
+ if (dwIsr & ISR_SOFTTIMER1) /* ISR, bit21 */
pStatistic->ISRStat.dwIsrSTIMER1Int++;
}
/*--------------------- Static Functions --------------------------*/
/*--------------------- Static Definitions -------------------------*/
-#define CRITICAL_PACKET_LEN 256 // if packet size < 256 -> in-direct send
- // packet size >= 256 -> direct send
+#define CRITICAL_PACKET_LEN 256 /* if packet size < 256 -> in-direct send
+ packet size >= 256 -> direct send */
static const unsigned short wTimeStampOff[2][MAX_RATE] = {
- {384, 288, 226, 209, 54, 43, 37, 31, 28, 25, 24, 23}, // Long Preamble
- {384, 192, 130, 113, 54, 43, 37, 31, 28, 25, 24, 23}, // Short Preamble
+ {384, 288, 226, 209, 54, 43, 37, 31, 28, 25, 24, 23}, /* Long Preamble */
+ {384, 192, 130, 113, 54, 43, 37, 31, 28, 25, 24, 23}, /* Short Preamble */
};
static const unsigned short wFB_Opt0[2][5] = {
- {RATE_12M, RATE_18M, RATE_24M, RATE_36M, RATE_48M}, // fallback_rate0
- {RATE_12M, RATE_12M, RATE_18M, RATE_24M, RATE_36M}, // fallback_rate1
+ {RATE_12M, RATE_18M, RATE_24M, RATE_36M, RATE_48M}, /* fallback_rate0 */
+ {RATE_12M, RATE_12M, RATE_18M, RATE_24M, RATE_36M}, /* fallback_rate1 */
};
static const unsigned short wFB_Opt1[2][5] = {
- {RATE_12M, RATE_18M, RATE_24M, RATE_24M, RATE_36M}, // fallback_rate0
- {RATE_6M , RATE_6M, RATE_12M, RATE_12M, RATE_18M}, // fallback_rate1
+ {RATE_12M, RATE_18M, RATE_24M, RATE_24M, RATE_36M}, /* fallback_rate0 */
+ {RATE_6M , RATE_6M, RATE_12M, RATE_12M, RATE_18M}, /* fallback_rate1 */
};
#define RTSDUR_BB 0
s_vGenerateTxParameter(
struct vnt_private *pDevice,
unsigned char byPktType,
- void *pTxBufHead,
+ struct vnt_tx_fifo_head *,
void *pvRrvTime,
void *pvRTS,
void *pvCTS,
unsigned int uDataTime, uAckTime;
uDataTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, cbFrameLength, wRate);
- if (byPktType == PK_TYPE_11B) //llb,CCK mode
+ if (byPktType == PK_TYPE_11B) /* llb,CCK mode */
uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, (unsigned short)pDevice->byTopCCKBasicRate);
- else //11g 2.4G OFDM mode & 11a 5G OFDM mode
+ else /* 11g 2.4G OFDM mode & 11a 5G OFDM mode */
uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, (unsigned short)pDevice->byTopOFDMBasicRate);
if (bNeedAck)
frame_length, rate, need_ack));
}
-//byFreqType: 0=>5GHZ 1=>2.4GHZ
+/* byFreqType: 0=>5GHZ 1=>2.4GHZ */
static
__le16
s_uGetRTSCTSRsvTime(
uRrvTime = uRTSTime = uCTSTime = uAckTime = uDataTime = 0;
uDataTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, cbFrameLength, wCurrentRate);
- if (byRTSRsvType == 0) { //RTSTxRrvTime_bb
+ if (byRTSRsvType == 0) { /* RTSTxRrvTime_bb */
uRTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 20, pDevice->byTopCCKBasicRate);
uCTSTime = uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopCCKBasicRate);
- } else if (byRTSRsvType == 1) { //RTSTxRrvTime_ba, only in 2.4GHZ
+ } else if (byRTSRsvType == 1) { /* RTSTxRrvTime_ba, only in 2.4GHZ */
uRTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 20, pDevice->byTopCCKBasicRate);
uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopCCKBasicRate);
uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate);
- } else if (byRTSRsvType == 2) { //RTSTxRrvTime_aa
+ } else if (byRTSRsvType == 2) { /* RTSTxRrvTime_aa */
uRTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 20, pDevice->byTopOFDMBasicRate);
uCTSTime = uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate);
- } else if (byRTSRsvType == 3) { //CTSTxRrvTime_ba, only in 2.4GHZ
+ } else if (byRTSRsvType == 3) { /* CTSTxRrvTime_ba, only in 2.4GHZ */
uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopCCKBasicRate);
uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate);
uRrvTime = uCTSTime + uAckTime + uDataTime + 2*pDevice->uSIFS;
return cpu_to_le16((u16)uRrvTime);
}
- //RTSRrvTime
+ /* RTSRrvTime */
uRrvTime = uRTSTime + uCTSTime + uAckTime + uDataTime + 3*pDevice->uSIFS;
return cpu_to_le16((u16)uRrvTime);
}
-//byFreqType 0: 5GHz, 1:2.4Ghz
+/* byFreqType 0: 5GHz, 1:2.4Ghz */
static
unsigned int
s_uGetDataDuration(
unsigned char byFBOption
)
{
- bool bLastFrag = 0;
+ bool bLastFrag = false;
unsigned int uAckTime = 0, uNextPktTime = 0;
if (uFragIdx == (uMACfragNum-1))
- bLastFrag = 1;
+ bLastFrag = true;
switch (byDurType) {
- case DATADUR_B: //DATADUR_B
- if (((uMACfragNum == 1)) || bLastFrag) {//Non Frag or Last Frag
+ case DATADUR_B: /* DATADUR_B */
+ if (((uMACfragNum == 1)) || bLastFrag) {/* Non Frag or Last Frag */
if (bNeedAck) {
uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopCCKBasicRate);
return pDevice->uSIFS + uAckTime;
} else {
return 0;
}
- } else {//First Frag or Mid Frag
+ } else {/* First Frag or Mid Frag */
if (uFragIdx == (uMACfragNum-2))
uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbLastFragmentSize, wRate, bNeedAck);
else
}
break;
- case DATADUR_A: //DATADUR_A
- if (((uMACfragNum == 1)) || bLastFrag) {//Non Frag or Last Frag
+ case DATADUR_A: /* DATADUR_A */
+ if (((uMACfragNum == 1)) || bLastFrag) {/* Non Frag or Last Frag */
if (bNeedAck) {
uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate);
return pDevice->uSIFS + uAckTime;
} else {
return 0;
}
- } else {//First Frag or Mid Frag
+ } else {/* First Frag or Mid Frag */
if (uFragIdx == (uMACfragNum-2))
uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbLastFragmentSize, wRate, bNeedAck);
else
}
break;
- case DATADUR_A_F0: //DATADUR_A_F0
- if (((uMACfragNum == 1)) || bLastFrag) {//Non Frag or Last Frag
+ case DATADUR_A_F0: /* DATADUR_A_F0 */
+ if (((uMACfragNum == 1)) || bLastFrag) {/* Non Frag or Last Frag */
if (bNeedAck) {
uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate);
return pDevice->uSIFS + uAckTime;
} else {
return 0;
}
- } else { //First Frag or Mid Frag
+ } else { /* First Frag or Mid Frag */
if (byFBOption == AUTO_FB_0) {
if (wRate < RATE_18M)
wRate = RATE_18M;
else
uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt0[FB_RATE0][wRate-RATE_18M], bNeedAck);
- } else { // (byFBOption == AUTO_FB_1)
+ } else { /* (byFBOption == AUTO_FB_1) */
if (wRate < RATE_18M)
wRate = RATE_18M;
else if (wRate > RATE_54M)
}
break;
- case DATADUR_A_F1: //DATADUR_A_F1
- if (((uMACfragNum == 1)) || bLastFrag) {//Non Frag or Last Frag
+ case DATADUR_A_F1: /* DATADUR_A_F1 */
+ if (((uMACfragNum == 1)) || bLastFrag) { /* Non Frag or Last Frag */
if (bNeedAck) {
uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate);
return pDevice->uSIFS + uAckTime;
} else {
return 0;
}
- } else { //First Frag or Mid Frag
+ } else { /* First Frag or Mid Frag */
if (byFBOption == AUTO_FB_0) {
if (wRate < RATE_18M)
wRate = RATE_18M;
else
uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt0[FB_RATE1][wRate-RATE_18M], bNeedAck);
- } else { // (byFBOption == AUTO_FB_1)
+ } else { /* (byFBOption == AUTO_FB_1) */
if (wRate < RATE_18M)
wRate = RATE_18M;
else if (wRate > RATE_54M)
return 0;
}
-//byFreqType: 0=>5GHZ 1=>2.4GHZ
+/* byFreqType: 0=>5GHZ 1=>2.4GHZ */
static
__le16
s_uGetRTSCTSDuration(
unsigned int uCTSTime = 0, uDurTime = 0;
switch (byDurType) {
- case RTSDUR_BB: //RTSDuration_bb
+ case RTSDUR_BB: /* RTSDuration_bb */
uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopCCKBasicRate);
uDurTime = uCTSTime + 2*pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wRate, bNeedAck);
break;
- case RTSDUR_BA: //RTSDuration_ba
+ case RTSDUR_BA: /* RTSDuration_ba */
uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopCCKBasicRate);
uDurTime = uCTSTime + 2*pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wRate, bNeedAck);
break;
- case RTSDUR_AA: //RTSDuration_aa
+ case RTSDUR_AA: /* RTSDuration_aa */
uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate);
uDurTime = uCTSTime + 2*pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wRate, bNeedAck);
break;
- case CTSDUR_BA: //CTSDuration_ba
+ case CTSDUR_BA: /* CTSDuration_ba */
uDurTime = pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wRate, bNeedAck);
break;
- case RTSDUR_BA_F0: //RTSDuration_ba_f0
+ case RTSDUR_BA_F0: /* RTSDuration_ba_f0 */
uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopCCKBasicRate);
if ((byFBOption == AUTO_FB_0) && (wRate >= RATE_18M) && (wRate <= RATE_54M))
uDurTime = uCTSTime + 2 * pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt0[FB_RATE0][wRate-RATE_18M], bNeedAck);
break;
- case RTSDUR_AA_F0: //RTSDuration_aa_f0
+ case RTSDUR_AA_F0: /* RTSDuration_aa_f0 */
uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate);
if ((byFBOption == AUTO_FB_0) && (wRate >= RATE_18M) && (wRate <= RATE_54M))
uDurTime = uCTSTime + 2*pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt0[FB_RATE0][wRate-RATE_18M], bNeedAck);
break;
- case RTSDUR_BA_F1: //RTSDuration_ba_f1
+ case RTSDUR_BA_F1: /* RTSDuration_ba_f1 */
uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopCCKBasicRate);
if ((byFBOption == AUTO_FB_0) && (wRate >= RATE_18M) && (wRate <= RATE_54M))
uDurTime = uCTSTime + 2*pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt0[FB_RATE1][wRate-RATE_18M], bNeedAck);
break;
- case RTSDUR_AA_F1: //RTSDuration_aa_f1
+ case RTSDUR_AA_F1: /* RTSDuration_aa_f1 */
uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate);
if ((byFBOption == AUTO_FB_0) && (wRate >= RATE_18M) && (wRate <= RATE_54M))
uDurTime = uCTSTime + 2*pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt0[FB_RATE1][wRate-RATE_18M], bNeedAck);
break;
- case CTSDUR_BA_F0: //CTSDuration_ba_f0
+ case CTSDUR_BA_F0: /* CTSDuration_ba_f0 */
if ((byFBOption == AUTO_FB_0) && (wRate >= RATE_18M) && (wRate <= RATE_54M))
uDurTime = pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt0[FB_RATE0][wRate-RATE_18M], bNeedAck);
else if ((byFBOption == AUTO_FB_1) && (wRate >= RATE_18M) && (wRate <= RATE_54M))
break;
- case CTSDUR_BA_F1: //CTSDuration_ba_f1
+ case CTSDUR_BA_F1: /* CTSDuration_ba_f1 */
if ((byFBOption == AUTO_FB_0) && (wRate >= RATE_18M) && (wRate <= RATE_54M))
uDurTime = pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt0[FB_RATE1][wRate-RATE_18M], bNeedAck);
else if ((byFBOption == AUTO_FB_1) && (wRate >= RATE_18M) && (wRate <= RATE_54M))
buf->time_stamp_off_b = vnt_time_stamp_off(pDevice, pDevice->byTopCCKBasicRate);
return buf->duration_a;
- } //if (byFBOption == AUTO_FB_NONE)
+ } /* if (byFBOption == AUTO_FB_NONE) */
} else if (byPktType == PK_TYPE_11A) {
if ((byFBOption != AUTO_FB_NONE)) {
/* Auto Fallback */
return;
if (bDisCRC) {
- // When CRCDIS bit is on, H/W forgot to generate FCS for RTS frame,
- // in this case we need to decrease its length by 4.
+ /* When CRCDIS bit is on, H/W forgot to generate FCS for RTS frame,
+ in this case we need to decrease its length by 4. */
uRTSFrameLen -= 4;
}
- // Note: So far RTSHead dosen't appear in ATIM & Beacom DMA, so we don't need to take them into account.
- // Otherwise, we need to modify codes for them.
+ /* Note: So far RTSHead dosen't appear in ATIM & Beacom DMA, so we don't need to take them into account.
+ Otherwise, we need to modify codes for them. */
if (byPktType == PK_TYPE_11GB || byPktType == PK_TYPE_11GA) {
if (byFBOption == AUTO_FB_NONE) {
struct vnt_rts_g *buf = pvRTS;
ether_addr_copy(buf->data.ra, hdr->addr1);
ether_addr_copy(buf->data.ta, hdr->addr2);
- } // if (byFBOption == AUTO_FB_NONE)
+ } /* if (byFBOption == AUTO_FB_NONE) */
} else if (byPktType == PK_TYPE_11A) {
if (byFBOption == AUTO_FB_NONE) {
struct vnt_rts_ab *buf = pvRTS;
return;
if (bDisCRC) {
- // When CRCDIS bit is on, H/W forgot to generate FCS for CTS frame,
- // in this case we need to decrease its length by 4.
+ /* When CRCDIS bit is on, H/W forgot to generate FCS for CTS frame,
+ in this case we need to decrease its length by 4. */
uCTSFrameLen -= 4;
}
if (byPktType == PK_TYPE_11GB || byPktType == PK_TYPE_11GA) {
if (byFBOption != AUTO_FB_NONE && uDMAIdx != TYPE_ATIMDMA && uDMAIdx != TYPE_BEACONDMA) {
- // Auto Fall back
+ /* Auto Fall back */
struct vnt_cts_fb *buf = pvCTS;
/* Get SignalField, ServiceField & Length */
vnt_get_phy_field(pDevice, uCTSFrameLen,
ether_addr_copy(buf->data.ra,
pDevice->abyCurrentNetAddr);
- } else { //if (byFBOption != AUTO_FB_NONE && uDMAIdx != TYPE_ATIMDMA && uDMAIdx != TYPE_BEACONDMA)
+ } else { /* if (byFBOption != AUTO_FB_NONE && uDMAIdx != TYPE_ATIMDMA && uDMAIdx != TYPE_BEACONDMA) */
struct vnt_cts *buf = pvCTS;
/* Get SignalField, ServiceField & Length */
vnt_get_phy_field(pDevice, uCTSFrameLen,
*
* Return Value: none
*
- -*/
-// unsigned int cbFrameSize,//Hdr+Payload+FCS
+ -
+ * unsigned int cbFrameSize, Hdr+Payload+FCS */
static
void
s_vGenerateTxParameter(
struct vnt_private *pDevice,
unsigned char byPktType,
- void *pTxBufHead,
+ struct vnt_tx_fifo_head *tx_buffer_head,
void *pvRrvTime,
void *pvRTS,
void *pvCTS,
unsigned short wCurrentRate
)
{
- unsigned short wFifoCtl;
+ u16 fifo_ctl = le16_to_cpu(tx_buffer_head->fifo_ctl);
bool bDisCRC = false;
unsigned char byFBOption = AUTO_FB_NONE;
- PSTxBufHead pFifoHead = (PSTxBufHead)pTxBufHead;
-
- pFifoHead->wReserved = wCurrentRate;
- wFifoCtl = pFifoHead->wFIFOCtl;
+ tx_buffer_head->current_rate = cpu_to_le16(wCurrentRate);
- if (wFifoCtl & FIFOCTL_CRCDIS)
+ if (fifo_ctl & FIFOCTL_CRCDIS)
bDisCRC = true;
- if (wFifoCtl & FIFOCTL_AUTO_FB_0)
+ if (fifo_ctl & FIFOCTL_AUTO_FB_0)
byFBOption = AUTO_FB_0;
- else if (wFifoCtl & FIFOCTL_AUTO_FB_1)
+ else if (fifo_ctl & FIFOCTL_AUTO_FB_1)
byFBOption = AUTO_FB_1;
if (!pvRrvTime)
return;
if (byPktType == PK_TYPE_11GB || byPktType == PK_TYPE_11GA) {
- if (pvRTS != NULL) { //RTS_need
- /* Fill RsvTime */
+ if (pvRTS != NULL) { /* RTS_need
+ Fill RsvTime */
struct vnt_rrv_time_rts *buf = pvRrvTime;
buf->rts_rrv_time_aa = s_uGetRTSCTSRsvTime(pDevice, 2, byPktType, cbFrameSize, wCurrentRate);
buf->rrv_time_b = vnt_rxtx_rsvtime_le16(pDevice, PK_TYPE_11B, cbFrameSize, pDevice->byTopCCKBasicRate, bNeedACK);
s_vFillRTSHead(pDevice, byPktType, pvRTS, cbFrameSize, bNeedACK, bDisCRC, psEthHeader, wCurrentRate, byFBOption);
- } else {//RTS_needless, PCF mode
+ } else {/* RTS_needless, PCF mode */
struct vnt_rrv_time_cts *buf = pvRrvTime;
buf->rrv_time_a = vnt_rxtx_rsvtime_le16(pDevice, byPktType, cbFrameSize, wCurrentRate, bNeedACK);
buf->rrv_time_b = vnt_rxtx_rsvtime_le16(pDevice, PK_TYPE_11B, cbFrameSize, pDevice->byTopCCKBasicRate, bNeedACK);
buf->cts_rrv_time_ba = s_uGetRTSCTSRsvTime(pDevice, 3, byPktType, cbFrameSize, wCurrentRate);
- //Fill CTS
+ /* Fill CTS */
s_vFillCTSHead(pDevice, uDMAIdx, byPktType, pvCTS, cbFrameSize, bNeedACK, bDisCRC, wCurrentRate, byFBOption);
}
} else if (byPktType == PK_TYPE_11A) {
- if (pvRTS != NULL) {//RTS_need, non PCF mode
+ if (pvRTS != NULL) {/* RTS_need, non PCF mode */
struct vnt_rrv_time_ab *buf = pvRrvTime;
buf->rts_rrv_time = s_uGetRTSCTSRsvTime(pDevice, 2, byPktType, cbFrameSize, wCurrentRate);
buf->rrv_time = vnt_rxtx_rsvtime_le16(pDevice, byPktType, cbFrameSize, wCurrentRate, bNeedACK);
- //Fill RTS
+ /* Fill RTS */
s_vFillRTSHead(pDevice, byPktType, pvRTS, cbFrameSize, bNeedACK, bDisCRC, psEthHeader, wCurrentRate, byFBOption);
- } else if (pvRTS == NULL) {//RTS_needless, non PCF mode
+ } else if (pvRTS == NULL) {/* RTS_needless, non PCF mode */
struct vnt_rrv_time_ab *buf = pvRrvTime;
buf->rrv_time = vnt_rxtx_rsvtime_le16(pDevice, PK_TYPE_11A, cbFrameSize, wCurrentRate, bNeedACK);
}
} else if (byPktType == PK_TYPE_11B) {
- if ((pvRTS != NULL)) {//RTS_need, non PCF mode
+ if ((pvRTS != NULL)) {/* RTS_need, non PCF mode */
struct vnt_rrv_time_ab *buf = pvRrvTime;
buf->rts_rrv_time = s_uGetRTSCTSRsvTime(pDevice, 0, byPktType, cbFrameSize, wCurrentRate);
buf->rrv_time = vnt_rxtx_rsvtime_le16(pDevice, PK_TYPE_11B, cbFrameSize, wCurrentRate, bNeedACK);
- //Fill RTS
+ /* Fill RTS */
s_vFillRTSHead(pDevice, byPktType, pvRTS, cbFrameSize, bNeedACK, bDisCRC, psEthHeader, wCurrentRate, byFBOption);
- } else { //RTS_needless, non PCF mode
+ } else { /* RTS_needless, non PCF mode */
struct vnt_rrv_time_ab *buf = pvRrvTime;
buf->rrv_time = vnt_rxtx_rsvtime_le16(pDevice, PK_TYPE_11B, cbFrameSize, wCurrentRate, bNeedACK);
void *pvRTS;
void *pvCTS;
void *pvTxDataHd;
- unsigned short wTxBufSize; // FFinfo size
+ unsigned short wTxBufSize; /* FFinfo size */
unsigned char byFBOption = AUTO_FB_NONE;
pvRrvTime = pMICHDR = pvRTS = pvCTS = pvTxDataHd = NULL;
cbFrameSize += info->control.hw_key->icv_len;
if (pDevice->byLocalID > REV_ID_VT3253_A1) {
- //MAC Header should be padding 0 to DW alignment.
+ /* MAC Header should be padding 0 to DW alignment. */
uPadding = 4 - (ieee80211_get_hdrlen_from_skb(skb) % 4);
uPadding %= 4;
}
}
- //
- // Use for AUTO FALL BACK
- //
+ /*
+ * Use for AUTO FALL BACK
+ */
if (fifo_ctl & FIFOCTL_AUTO_FB_0)
byFBOption = AUTO_FB_0;
else if (fifo_ctl & FIFOCTL_AUTO_FB_1)
byFBOption = AUTO_FB_1;
- //////////////////////////////////////////////////////
- //Set RrvTime/RTS/CTS Buffer
+
+ /* Set RrvTime/RTS/CTS Buffer */
wTxBufSize = sizeof(STxBufHead);
- if (byPktType == PK_TYPE_11GB || byPktType == PK_TYPE_11GA) {//802.11g packet
+ if (byPktType == PK_TYPE_11GB || byPktType == PK_TYPE_11GA) {/* 802.11g packet */
if (byFBOption == AUTO_FB_NONE) {
- if (bRTS == true) {//RTS_need
+ if (bRTS == true) {/* RTS_need */
pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize);
pMICHDR = (struct vnt_mic_hdr *)(pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_rts));
pvRTS = (void *)(pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_rts) + cbMICHDR);
cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_rts) +
cbMICHDR + sizeof(struct vnt_rts_g) +
sizeof(struct vnt_tx_datahead_g);
- } else { //RTS_needless
+ } else { /* RTS_needless */
pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize);
pMICHDR = (struct vnt_mic_hdr *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_cts));
pvRTS = NULL;
cbMICHDR + sizeof(struct vnt_cts) + sizeof(struct vnt_tx_datahead_g);
}
} else {
- // Auto Fall Back
- if (bRTS == true) {//RTS_need
+ /* Auto Fall Back */
+ if (bRTS == true) {/* RTS_need */
pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize);
pMICHDR = (struct vnt_mic_hdr *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_rts));
pvRTS = (void *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_rts) + cbMICHDR);
cbMICHDR + sizeof(struct vnt_rts_g_fb));
cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_rts) +
cbMICHDR + sizeof(struct vnt_rts_g_fb) + sizeof(struct vnt_tx_datahead_g_fb);
- } else { //RTS_needless
+ } else { /* RTS_needless */
pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize);
pMICHDR = (struct vnt_mic_hdr *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_cts));
pvRTS = NULL;
cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_cts) +
cbMICHDR + sizeof(struct vnt_cts_fb) + sizeof(struct vnt_tx_datahead_g_fb);
}
- } // Auto Fall Back
- } else {//802.11a/b packet
+ } /* Auto Fall Back */
+ } else {/* 802.11a/b packet */
if (byFBOption == AUTO_FB_NONE) {
if (bRTS == true) {
sizeof(struct vnt_rrv_time_ab) + cbMICHDR + sizeof(struct vnt_rts_ab));
cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_ab) +
cbMICHDR + sizeof(struct vnt_rts_ab) + sizeof(struct vnt_tx_datahead_ab);
- } else { //RTS_needless, need MICHDR
+ } else { /* RTS_needless, need MICHDR */
pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize);
pMICHDR = (struct vnt_mic_hdr *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_ab));
pvRTS = NULL;
cbMICHDR + sizeof(struct vnt_tx_datahead_ab);
}
} else {
- // Auto Fall Back
- if (bRTS == true) {//RTS_need
+ /* Auto Fall Back */
+ if (bRTS == true) { /* RTS_need */
pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize);
pMICHDR = (struct vnt_mic_hdr *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_ab));
pvRTS = (void *)(pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_ab) + cbMICHDR);
sizeof(struct vnt_rrv_time_ab) + cbMICHDR + sizeof(struct vnt_rts_a_fb));
cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_ab) +
cbMICHDR + sizeof(struct vnt_rts_a_fb) + sizeof(struct vnt_tx_datahead_a_fb);
- } else { //RTS_needless
+ } else { /* RTS_needless */
pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize);
pMICHDR = (struct vnt_mic_hdr *)(pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_ab));
pvRTS = NULL;
cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_ab) +
cbMICHDR + sizeof(struct vnt_tx_datahead_a_fb);
}
- } // Auto Fall Back
+ } /* Auto Fall Back */
}
td_info->mic_hdr = pMICHDR;
priv->hw->conf.chandef.chan->hw_value);
}
- if (current_rate > RATE_11M)
- pkt_type = (u8)priv->byPacketType;
- else
+ if (current_rate > RATE_11M) {
+ if (info->band == IEEE80211_BAND_5GHZ) {
+ pkt_type = PK_TYPE_11A;
+ } else {
+ if (tx_rate->flags & IEEE80211_TX_RC_USE_CTS_PROTECT)
+ pkt_type = PK_TYPE_11GB;
+ else
+ pkt_type = PK_TYPE_11GA;
+ }
+ } else {
pkt_type = PK_TYPE_11B;
+ }
/*Set fifo controls */
if (pkt_type == PK_TYPE_11A)
int vnt_beacon_enable(struct vnt_private *priv, struct ieee80211_vif *vif,
struct ieee80211_bss_conf *conf)
{
- int ret;
-
VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
CARDbSetBeaconPeriod(priv, conf->beacon_int);
- ret = vnt_beacon_make(priv, vif);
-
- return ret;
+ return vnt_beacon_make(priv, vif);
}
* Author: Jerry Chen
*
* Date: Jan 29, 2003
- *
*/
#ifndef __SROM_H__
#define EEP_MAX_CONTEXT_SIZE 256
-#define CB_EEPROM_READBYTE_WAIT 900 //us
+#define CB_EEPROM_READBYTE_WAIT 900 /* us */
#define W_MAX_I2CRETRY 0x0fff
-//
-// Contents in the EEPROM
-//
-#define EEP_OFS_PAR 0x00 // physical address
+/* Contents in the EEPROM */
+#define EEP_OFS_PAR 0x00 /* physical address */
#define EEP_OFS_ANTENNA 0x16
#define EEP_OFS_RADIOCTL 0x17
-#define EEP_OFS_RFTYPE 0x1B // for select RF
-#define EEP_OFS_MINCHANNEL 0x1C // Min Channel #
-#define EEP_OFS_MAXCHANNEL 0x1D // Max Channel #
-#define EEP_OFS_SIGNATURE 0x1E //
-#define EEP_OFS_ZONETYPE 0x1F //
-#define EEP_OFS_RFTABLE 0x20 // RF POWER TABLE
+#define EEP_OFS_RFTYPE 0x1B /* for select RF */
+#define EEP_OFS_MINCHANNEL 0x1C /* Min Channel # */
+#define EEP_OFS_MAXCHANNEL 0x1D /* Max Channel # */
+#define EEP_OFS_SIGNATURE 0x1E
+#define EEP_OFS_ZONETYPE 0x1F
+#define EEP_OFS_RFTABLE 0x20 /* RF POWER TABLE */
#define EEP_OFS_PWR_CCK 0x20
#define EEP_OFS_SETPT_CCK 0x21
#define EEP_OFS_PWR_OFDMG 0x23
#define EEP_OFS_SETPT_OFDMG 0x24
-#define EEP_OFS_PWR_FORMULA_OST 0x26 //
+#define EEP_OFS_PWR_FORMULA_OST 0x26
#define EEP_OFS_MAJOR_VER 0x2E
#define EEP_OFS_MINOR_VER 0x2F
#define EEP_OFS_CCK_PWR_TBL 0x30
#define EEP_OFS_CCK_PWR_dBm 0x3F
#define EEP_OFS_OFDM_PWR_TBL 0x40
#define EEP_OFS_OFDM_PWR_dBm 0x4F
-//{{ RobertYu: 20041124
+/*{{ RobertYu: 20041124 */
#define EEP_OFS_SETPT_OFDMA 0x4E
#define EEP_OFS_OFDMA_PWR_TBL 0x50
-//}}
+/*}}*/
#define EEP_OFS_OFDMA_PWR_dBm 0xD2
-//----------need to remove --------------------
-#define EEP_OFS_BBTAB_LEN 0x70 // BB Table Length
-#define EEP_OFS_BBTAB_ADR 0x71 // BB Table Offset
-#define EEP_OFS_CHECKSUM 0xFF // reserved area for baseband 28h ~ 78h
+/*----------need to remove --------------------*/
+#define EEP_OFS_BBTAB_LEN 0x70 /* BB Table Length */
+#define EEP_OFS_BBTAB_ADR 0x71 /* BB Table Offset */
+#define EEP_OFS_CHECKSUM 0xFF /* reserved area for baseband 28h~78h */
-#define EEP_I2C_DEV_ID 0x50 // EEPROM device address on the I2C bus
+#define EEP_I2C_DEV_ID 0x50 /* EEPROM device address on I2C bus */
-//
-// Bits in EEP_OFS_ANTENNA
-//
+/* Bits in EEP_OFS_ANTENNA */
#define EEP_ANTENNA_MAIN 0x01
#define EEP_ANTENNA_AUX 0x02
#define EEP_ANTINV 0x04
-//
-// Bits in EEP_OFS_RADIOCTL
-//
+/* Bits in EEP_OFS_RADIOCTL */
#define EEP_RADIOCTL_ENABLE 0x80
#define EEP_RADIOCTL_INV 0x01
/*--------------------- Export Functions --------------------------*/
-unsigned char SROMbyReadEmbedded(void __iomem *dwIoBase, unsigned char byContntOffset);
+unsigned char SROMbyReadEmbedded(void __iomem *dwIoBase,
+ unsigned char byContntOffset);
void SROMvReadAllContents(void __iomem *dwIoBase, unsigned char *pbyEepromRegs);
-void SROMvReadEtherAddress(void __iomem *dwIoBase, unsigned char *pbyEtherAddress);
+void SROMvReadEtherAddress(void __iomem *dwIoBase,
+ unsigned char *pbyEtherAddress);
-#endif // __EEPROM_H__
+#endif /* __EEPROM_H__*/
#define MAKEDWORD(lw, hw) ((unsigned long)(((unsigned short)(lw)) | (((unsigned long)((unsigned short)(hw))) << 16)))
#endif
-#endif // __TMACRO_H__
+#endif /* __TMACRO_H__ */
buffer = kmalloc(FIRMWARE_CHUNK_SIZE, GFP_KERNEL);
if (!buffer)
- goto out;
+ goto free_fw;
for (ii = 0; ii < fw->size; ii += FIRMWARE_CHUNK_SIZE) {
length = min_t(int, fw->size - ii, FIRMWARE_CHUNK_SIZE);
* Revision History:
*/
+#include <linux/etherdevice.h>
+
#include "desc.h"
#include "mac.h"
#include "usbpipe.h"
offset += (entry_idx * MISCFIFO_KEYENTRYSIZE);
set_key.u.write.key_ctl = cpu_to_le16(key_ctl);
- memcpy(set_key.u.write.addr, addr, ETH_ALEN);
+ ether_addr_copy(set_key.u.write.addr, addr);
/* swap over swap[0] and swap[1] to get correct write order */
swap(set_key.u.swap[0], set_key.u.swap[1]);
hw = ieee80211_alloc_hw(sizeof(struct vnt_private), &vnt_mac_ops);
if (!hw) {
dev_err(&udev->dev, "could not register ieee80211_hw\n");
+ rc = -ENOMEM;
goto err_nomem;
}
else
mic_hdr->hlen = cpu_to_be16(22);
- memcpy(mic_hdr->addr1, hdr->addr1, ETH_ALEN);
- memcpy(mic_hdr->addr2, hdr->addr2, ETH_ALEN);
- memcpy(mic_hdr->addr3, hdr->addr3, ETH_ALEN);
+ ether_addr_copy(mic_hdr->addr1, hdr->addr1);
+ ether_addr_copy(mic_hdr->addr2, hdr->addr2);
+ ether_addr_copy(mic_hdr->addr3, hdr->addr3);
mic_hdr->frame_control = cpu_to_le16(
le16_to_cpu(hdr->frame_control) & 0xc78f);
le16_to_cpu(hdr->seq_ctrl) & 0xf);
if (ieee80211_has_a4(hdr->frame_control))
- memcpy(mic_hdr->addr4, hdr->addr4, ETH_ALEN);
+ ether_addr_copy(mic_hdr->addr4, hdr->addr4);
memcpy(key_buffer, tx_key->key, WLAN_KEY_LEN_CCMP);
#define WLAN_ACCESS_DENY 3 /* Do not authenticate "denied" stations. */
/* XXX These are going away ASAP */
-typedef struct prism2sta_authlist {
+struct prism2sta_authlist {
unsigned int cnt;
u8 addr[WLAN_AUTH_MAX][ETH_ALEN];
u8 assoc[WLAN_AUTH_MAX];
-} prism2sta_authlist_t;
+};
-typedef struct prism2sta_accesslist {
+struct prism2sta_accesslist {
unsigned int modify;
unsigned int cnt;
u8 addr[WLAN_ACCESS_MAX][ETH_ALEN];
unsigned int cnt1;
u8 addr1[WLAN_ACCESS_MAX][ETH_ALEN];
-} prism2sta_accesslist_t;
+};
typedef struct hfa384x {
/* USB support data */
hfa384x_InfFrame_t *scanresults;
- prism2sta_authlist_t authlist; /* Authenticated station list. */
- unsigned int accessmode; /* Access mode. */
- prism2sta_accesslist_t allow; /* Allowed station list. */
- prism2sta_accesslist_t deny; /* Denied station list. */
+ struct prism2sta_authlist authlist; /* Authenticated station list. */
+ unsigned int accessmode; /* Access mode. */
+ struct prism2sta_accesslist allow; /* Allowed station list. */
+ struct prism2sta_accesslist deny; /* Denied station list. */
} hfa384x_t;
int hfa384x_drvr_stop(hfa384x_t *hw);
int
hfa384x_drvr_txframe(hfa384x_t *hw, struct sk_buff *skb,
- union p80211_hdr *p80211_hdr, struct p80211_metawep *p80211_wep);
+ union p80211_hdr *p80211_hdr,
+ struct p80211_metawep *p80211_wep);
void hfa384x_tx_timeout(wlandevice_t *wlandev);
int hfa384x_cmd_initialize(hfa384x_t *hw);
INIT_WORK(&hw->link_bh, prism2sta_processing_defer);
INIT_WORK(&hw->usb_work, hfa384x_usb_defer);
- init_timer(&hw->throttle);
- hw->throttle.function = hfa384x_usb_throttlefn;
- hw->throttle.data = (unsigned long)hw;
+ setup_timer(&hw->throttle, hfa384x_usb_throttlefn, (unsigned long)hw);
- init_timer(&hw->resptimer);
- hw->resptimer.function = hfa384x_usbctlx_resptimerfn;
- hw->resptimer.data = (unsigned long)hw;
+ setup_timer(&hw->resptimer, hfa384x_usbctlx_resptimerfn,
+ (unsigned long)hw);
- init_timer(&hw->reqtimer);
- hw->reqtimer.function = hfa384x_usbctlx_reqtimerfn;
- hw->reqtimer.data = (unsigned long)hw;
+ setup_timer(&hw->reqtimer, hfa384x_usbctlx_reqtimerfn,
+ (unsigned long)hw);
usb_init_urb(&hw->rx_urb);
usb_init_urb(&hw->tx_urb);
hw->state = HFA384x_STATE_INIT;
INIT_WORK(&hw->commsqual_bh, prism2sta_commsqual_defer);
- init_timer(&hw->commsqual_timer);
- hw->commsqual_timer.data = (unsigned long)hw;
- hw->commsqual_timer.function = prism2sta_commsqual_timer;
+ setup_timer(&hw->commsqual_timer, prism2sta_commsqual_timer,
+ (unsigned long)hw);
}
/*----------------------------------------------------------------
{
hfa384x_usbctlx_t *ctlx;
- ctlx = kmalloc(sizeof(*ctlx), in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);
- if (ctlx != NULL) {
- memset(ctlx, 0, sizeof(*ctlx));
+ ctlx = kzalloc(sizeof(*ctlx),
+ in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);
+ if (ctlx != NULL)
init_completion(&ctlx->done);
- }
return ctlx;
}
struct p80211msg_dot11req_mibset *msg,
void *data)
{
- int result;
-
if (wlandev->hostwep & HOSTWEP_DECRYPT) {
if (wlandev->hostwep & HOSTWEP_DECRYPT)
mib->parm2 |= HFA384x_WEPFLAGS_DISABLE_RXCRYPT;
mib->parm2 |= HFA384x_WEPFLAGS_DISABLE_TXCRYPT;
}
- result = prism2mib_flag(mib, isget, wlandev, hw, msg, data);
-
- return result;
+ return prism2mib_flag(mib, isget, wlandev, hw, msg, data);
}
/*----------------------------------------------------------------
struct p80211msg_dot11req_mibset *msg,
void *data)
{
- int result;
-
- result = prism2mib_flag(mib, isget, wlandev, hw, msg, data);
- return result;
+ return prism2mib_flag(mib, isget, wlandev, hw, msg, data);
}
/*----------------------------------------------------------------
*/
#include <linux/module.h>
-#include <linux/moduleparam.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/netdevice.h>
#include <linux/workqueue.h>
#include <linux/byteorder/generic.h>
+#include <linux/etherdevice.h>
#include <linux/io.h>
#include <linux/delay.h>
struct p80211_metawep *p80211_wep)
{
hfa384x_t *hw = (hfa384x_t *) wlandev->priv;
- int result;
/* If necessary, set the 802.11 WEP bit */
if ((wlandev->hostwep & (HOSTWEP_PRIVACYINVOKED | HOSTWEP_ENCRYPT)) ==
p80211_hdr->a3.fc |= cpu_to_le16(WLAN_SET_FC_ISWEP(1));
}
- result = hfa384x_drvr_txframe(hw, skb, p80211_hdr, p80211_wep);
-
- return result;
+ return hfa384x_drvr_txframe(hw, skb, p80211_hdr, p80211_wep);
}
/*----------------------------------------------------------------
** authentication.
*/
- memcpy(rec.address, inf->info.authreq.sta_addr, ETH_ALEN);
+ ether_addr_copy(rec.address, inf->info.authreq.sta_addr);
rec.status = P80211ENUM_status_unspec_failure;
/*
if (hw->authlist.cnt >= WLAN_AUTH_MAX) {
rec.status = P80211ENUM_status_ap_full;
} else {
- memcpy(hw->authlist.addr[hw->authlist.cnt],
- rec.address, ETH_ALEN);
+ ether_addr_copy(hw->authlist.addr[hw->authlist.cnt],
+ rec.address);
hw->authlist.cnt++;
added = 1;
}
sr_data = XGI_CRT1Table[index].CR[5];
- HDE = (XGI330_RefIndex[RefreshRateTableIndex].XRes >> 3);
+ HDE = XGI330_RefIndex[RefreshRateTableIndex].XRes >> 3;
cr_data = XGI_CRT1Table[index].CR[3];
XGIbios_mode[xgifb_info->mode_idx].mode_no);
return -EINVAL;
}
- info->fix.line_length = ((info->var.xres_virtual
- * info->var.bits_per_pixel) >> 6);
+ info->fix.line_length = (info->var.xres_virtual
+ * info->var.bits_per_pixel) >> 6;
xgifb_reg_set(XGISR, IND_SIS_PASSWORD, SIS_PASSWORD);
data |= data1;
xgifb_reg_set(pVBInfo->P3d4, 0x05, data);
data = xgifb_reg_get(pVBInfo->P3c4, 0x0e);
- data = data >> 5;
+ data >>= 5;
data = data + 3;
if (data > 7)
data = data - 7;
- data = data << 5;
+ data <<= 5;
xgifb_reg_and_or(pVBInfo->P3c4, 0x0e, ~0xE0, data);
}
}
data = pVBInfo->TimingV.data[6];
data &= 0x80;
- data = data >> 2;
+ data >>= 2;
i = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
i &= DoubleScanMode;
tempbx = XGI330_ModeResInfo[resindex].VTotal;
if (modeflag & HalfDCLK)
- tempax = tempax >> 1;
+ tempax >>= 1;
if (modeflag & HalfDCLK)
- tempax = tempax << 1;
+ tempax <<= 1;
temp = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
if (temp & InterlaceMode)
- tempbx = tempbx >> 1;
+ tempbx >>= 1;
if (modeflag & DoubleScanMode)
- tempbx = tempbx << 1;
+ tempbx <<= 1;
tempcx = 8;
(unsigned short) ((tempcx & 0x0ff00) >> 10));
xgifb_reg_set(pVBInfo->P3d4, 0x12, (unsigned short) (tempbx & 0xff));
tempax = 0;
- tempbx = tempbx >> 8;
+ tempbx >>= 8;
if (tempbx & 0x01)
tempax |= 0x02;
/* GetOffset */
temp = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeInfo;
- temp = temp >> 8;
+ temp >>= 8;
temp = XGI330_ScreenOffset[temp];
temp2 = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
temp2 &= InterlaceMode;
if (temp2)
- temp = temp << 1;
+ temp <<= 1;
temp2 = pVBInfo->ModeType - ModeEGA;
/* SetOffset */
DisplayUnit = temp;
temp2 = temp;
- temp = temp >> 8; /* ah */
+ temp >>= 8; /* ah */
temp &= 0x0F;
i = xgifb_reg_get(pVBInfo->P3c4, 0x0E);
i &= 0xF0;
if (temp2)
DisplayUnit >>= 1;
- DisplayUnit = DisplayUnit << 5;
+ DisplayUnit <<= 5;
ah = (DisplayUnit & 0xff00) >> 8;
al = DisplayUnit & 0x00ff;
if (al == 0)
index = data;
index &= 0xE0;
data &= 0x1F;
- data = data << 1;
+ data <<= 1;
data += 1;
data |= index;
xgifb_reg_set(pVBInfo->P3c4, 0x2C, data);
data2 = 0;
data2 |= 0x02;
data3 = pVBInfo->ModeType - ModeVGA;
- data3 = data3 << 2;
+ data3 <<= 2;
data2 |= data3;
data &= InterlaceMode;
data2 += 0x15;
outb(data2, pVBInfo->P3c9);
- data = data >> 2;
+ data >>= 2;
}
}
yres = XGI330_ModeResInfo[resindex].VTotal;
if (modeflag & HalfDCLK)
- xres = xres << 1;
+ xres <<= 1;
if (modeflag & DoubleScanMode)
- yres = yres << 1;
+ yres <<= 1;
if (xres == 720)
xres = 640;
xgifb_reg_set(pVBInfo->Part1Port, 0x1A, tempbx & 0x07);
- tempcx = tempcx >> 3;
- tempbx = tempbx >> 3;
+ tempcx >>= 3;
+ tempbx >>= 3;
xgifb_reg_set(pVBInfo->Part1Port, 0x16,
(unsigned short) (tempbx & 0xff));
tempcx -= tempax;
tempax = tempbx & 0x07;
- tempax = tempax >> 5;
- tempcx = tempcx >> 3;
- tempbx = tempbx >> 3;
+ tempax >>= 5;
+ tempcx >>= 3;
+ tempbx >>= 3;
tempcx &= 0x1f;
tempax |= tempcx;
temp1 = pVBInfo->VGAHDE << 16;
temp1 /= temp3;
- temp3 = temp3 << 16;
+ temp3 <<= 16;
temp1 -= 1;
temp3 = (temp3 & 0xffff0000) + (temp1 & 0xffff);
xgifb_reg_set(pVBInfo->Part1Port, 0x21,
(unsigned short) (tempbx & 0xff));
- temp3 = temp3 >> 16;
+ temp3 >>= 16;
if (modeflag & HalfDCLK)
- temp3 = temp3 >> 1;
+ temp3 >>= 1;
xgifb_reg_set(pVBInfo->Part1Port, 0x22,
(unsigned short) ((temp3 >> 8) & 0xff));
tempbx = tempbx | temp;
temp = xgifb_reg_get(pVBInfo->P3d4, 0x31);
push = temp;
- push = push << 8;
+ push <<= 8;
tempax = temp << 8;
tempbx = tempbx | tempax;
temp = (SetCRT2ToDualEdge | SetCRT2ToYPbPr525750 | XGI_SetCRT2ToLCDA
if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA)
tempax &= 0x0F;
else
- tempax = tempax >> 4;
+ tempax >>= 4;
if ((resinfo == 6) || (resinfo == 9)) {
if (tempax >= 3)
unsigned char i = 0;
for (i = 0; i < 8; i++) {
- ujRet = ujRet << 1;
+ ujRet <<= 1;
ujRet |= (ujDate >> i) & 1;
}
tempcx = (unsigned short)
XGI_CRT1Table[CRT1Index].CR[14] << 8;
tempcx &= 0x0100;
- tempcx = tempcx << 2;
+ tempcx <<= 2;
tempbx |= tempcx;
temp1 = (unsigned short) XGI_CRT1Table[CRT1Index].CR[9];
temp = XGI330_ScreenOffset[index];
if (infoflag & InterlaceMode)
- temp = temp << 1;
+ temp <<= 1;
colordepth = XGI_GetColorDepth(ModeIdIndex);
colordepth = ColorDepth[temp];
temp = 0x6B;
if (infoflag & InterlaceMode)
- temp = temp << 1;
+ temp <<= 1;
}
return temp * colordepth;
}
xgifb_reg_set(pVBInfo->Part1Port, 0x0A, temp);
tempcx = ((pVBInfo->VGAHT - pVBInfo->VGAHDE) / 2) >> 2;
pushbx = pVBInfo->VGAHDE / 2 + 16;
- tempcx = tempcx >> 1;
+ tempcx >>= 1;
tempbx = pushbx + tempcx; /* bx BTVGA@HRS 0x0B,0x0C */
tempcx += tempbx;
xgifb_reg_set(pVBInfo->Part1Port, 0x0A, temp);
tempcx = (pVBInfo->VGAHT - pVBInfo->VGAHDE) >> 2; /* cx */
pushbx = pVBInfo->VGAHDE + 16;
- tempcx = tempcx >> 1;
+ tempcx >>= 1;
tempbx = pushbx + tempcx; /* bx BTVGA@HRS 0x0B,0x0C */
tempcx += tempbx;
tempax = pVBInfo->VGAHDE; /* 0x04 Horizontal Display End */
if (modeflag & HalfDCLK)
- tempax = tempax >> 1;
+ tempax >>= 1;
tempax = (tempax / tempcx) - 1;
tempbx |= ((tempax & 0x00FF) << 8);
tempax = pVBInfo->VGAHT;
if (modeflag & HalfDCLK)
- tempax = tempax >> 1;
+ tempax >>= 1;
tempax = (tempax / tempcx) - 5;
tempcx = tempax; /* 20030401 0x07 horizontal Retrace Start */
tempax = push1;
tempax -= tempbx; /* 0x0C Vertical Retrace Start */
- tempax = tempax >> 2;
+ tempax >>= 2;
push1 = tempax; /* push ax */
if (resinfo != 0x09) {
- tempax = tempax << 1;
+ tempax <<= 1;
tempbx += tempax;
}
}
}
tempax = push1;
- tempax = tempax >> 2;
+ tempax >>= 2;
tempax++;
tempax += tempbx;
push1 = tempax; /* push ax */
if (pVBInfo->VDE <= tempax) {
tempax -= pVBInfo->VDE;
- tempax = tempax >> 2;
+ tempax >>= 2;
tempax = (tempax & 0x00FF) | ((tempax & 0x00FF) << 8);
push1 = tempax;
temp = (tempax & 0xFF00) >> 8;
tempcx = pVBInfo->HT;
if (XGI_IsLCDDualLink(pVBInfo))
- tempcx = tempcx >> 1;
+ tempcx >>= 1;
tempcx -= 2;
temp = tempcx & 0x00FF;
tempcx -= 4;
temp = tempcx & 0x00FF;
- temp = temp << 4;
+ temp <<= 4;
xgifb_reg_and_or(pVBInfo->Part2Port, 0x22, 0x0F, temp);
tempbx = TimingPoint[j] | ((TimingPoint[j + 1]) << 8);
temp = tempbx & 0x00FF;
xgifb_reg_set(pVBInfo->Part2Port, 0x24, temp);
temp = (tempbx & 0xFF00) >> 8;
- temp = temp << 4;
+ temp <<= 4;
xgifb_reg_and_or(pVBInfo->Part2Port, 0x25, 0x0F, temp);
tempbx = push2;
tempcx -= 4;
temp = tempcx & 0xFF;
- temp = temp << 4;
+ temp <<= 4;
xgifb_reg_and_or(pVBInfo->Part2Port, 0x2A, 0x0F, temp);
tempcx = push1; /* pop cx */
temp = TimingPoint[j] | ((TimingPoint[j + 1]) << 8);
tempcx -= temp;
temp = tempcx & 0x00FF;
- temp = temp << 4;
+ temp <<= 4;
xgifb_reg_and_or(pVBInfo->Part2Port, 0x2D, 0x0F, temp);
tempcx -= 11;
(VB_SIS301LV | VB_SIS302LV | VB_XGI301C)) {
if (!(pVBInfo->TVInfo &
(TVSetYPbPr525p | TVSetYPbPr750p)))
- tempbx = tempbx >> 1;
+ tempbx >>= 1;
} else
- tempbx = tempbx >> 1;
+ tempbx >>= 1;
}
tempbx -= 2;
if (pVBInfo->VBInfo & SetCRT2ToTV) {
if (!(pVBInfo->TVInfo & (TVSetYPbPr525p
| TVSetYPbPr750p)))
- tempbx = tempbx >> 1;
+ tempbx >>= 1;
}
if (pVBInfo->VBType & (VB_SIS302LV | VB_XGI301C)) {
xgifb_reg_set(pVBInfo->Part2Port, 0x4c, temp);
temp = ((tempcx & 0xFF00) >> 8) & 0x03;
- temp = temp << 2;
+ temp <<= 2;
temp |= ((tempbx & 0xFF00) >> 8) & 0x03;
if (pVBInfo->VBInfo & SetCRT2ToYPbPr525750) {
tempbx = pVBInfo->HDE; /* RHACTE=HDE-1 */
if (XGI_IsLCDDualLink(pVBInfo))
- tempbx = tempbx >> 1;
+ tempbx >>= 1;
tempbx -= 1;
temp = tempbx & 0x00FF;
xgifb_reg_set(pVBInfo->Part2Port, 0x2C, temp);
temp = (tempbx & 0xFF00) >> 8;
- temp = temp << 4;
+ temp <<= 4;
xgifb_reg_and_or(pVBInfo->Part2Port, 0x2B, 0x0F, temp);
temp = 0x01;
temp = tempcx & 0x00FF; /* RVTVT=VT-1 */
xgifb_reg_set(pVBInfo->Part2Port, 0x19, temp);
temp = (tempcx & 0xFF00) >> 8;
- temp = temp << 5;
+ temp <<= 5;
xgifb_reg_set(pVBInfo->Part2Port, 0x1A, temp);
xgifb_reg_and_or(pVBInfo->Part2Port, 0x09, 0xF0, 0x00);
xgifb_reg_and_or(pVBInfo->Part2Port, 0x0A, 0xF0, 0x00);
tempch = ((tempcx & 0xFF00) >> 8) & 0x07;
tempbh = ((tempbx & 0xFF00) >> 8) & 0x07;
tempah = tempch;
- tempah = tempah << 3;
+ tempah <<= 3;
tempah |= tempbh;
xgifb_reg_set(pVBInfo->Part2Port, 0x02, tempah);
temp = tempbx & 0x00FF; /* RTVACTEE=lcdvrs */
xgifb_reg_set(pVBInfo->Part2Port, 0x04, temp);
temp = (tempbx & 0xFF00) >> 8;
- temp = temp << 4;
+ temp <<= 4;
temp |= (tempcx & 0x000F);
xgifb_reg_set(pVBInfo->Part2Port, 0x01, temp);
tempcx = pushbx;
tempbx &= 0x0FFF;
if (XGI_IsLCDDualLink(pVBInfo)) {
- tempax = tempax >> 1;
- tempbx = tempbx >> 1;
- tempcx = tempcx >> 1;
+ tempax >>= 1;
+ tempbx >>= 1;
+ tempcx >>= 1;
}
if (pVBInfo->VBType & VB_SIS302LV)
tempax = pVBInfo->HT;
tempbx = pVBInfo->LCDHRS;
if (XGI_IsLCDDualLink(pVBInfo)) {
- tempax = tempax >> 1;
- tempbx = tempbx >> 1;
- tempcx = tempcx >> 1;
+ tempax >>= 1;
+ tempbx >>= 1;
+ tempcx >>= 1;
}
if (pVBInfo->VBType & VB_SIS302LV)
xgifb_reg_set(pVBInfo->Part2Port, 0x1C, temp);
temp = (tempbx & 0xFF00) >> 8;
- temp = temp << 4;
+ temp <<= 4;
xgifb_reg_and_or(pVBInfo->Part2Port, 0x1D, ~0x0F0, temp);
temp = tempcx & 0x00FF; /* RHSYEXP2S=lcdhre */
xgifb_reg_set(pVBInfo->Part2Port, 0x21, temp);
tempbx = pVBInfo->VGAHDE;
if (modeflag & HalfDCLK)
- tempbx = tempbx >> 1;
+ tempbx >>= 1;
if (XGI_IsLCDDualLink(pVBInfo))
- tempbx = tempbx >> 1;
+ tempbx >>= 1;
if (tempcx & SetCRT2ToHiVision) {
temp = 0;
xgifb_reg_set(pVBInfo->Part4Port, 0x1A, temp);
tempbx = (unsigned short) (tempebx >> 16);
temp = tempbx & 0x00FF;
- temp = temp << 4;
+ temp <<= 4;
temp |= ((tempcx & 0xFF00) >> 8);
xgifb_reg_set(pVBInfo->Part4Port, 0x19, temp);
xgifb_reg_set(pVBInfo->Part4Port, 0x1C, temp);
tempax = pVBInfo->VGAHDE;
if (modeflag & HalfDCLK)
- tempax = tempax >> 1;
+ tempax >>= 1;
if (XGI_IsLCDDualLink(pVBInfo))
- tempax = tempax >> 1;
+ tempax >>= 1;
if (pVBInfo->VBInfo & SetCRT2ToLCD) {
if (tempax > 800)
xgifb_reg_and_or(pVBInfo->Part4Port, 0x1F, 0x00C0, temp);
tempbx = pVBInfo->HT;
if (XGI_IsLCDDualLink(pVBInfo))
- tempbx = tempbx >> 1;
+ tempbx >>= 1;
tempbx = (tempbx >> 1) - 2;
temp = ((tempbx & 0x0700) >> 8) << 3;
xgifb_reg_and_or(pVBInfo->Part4Port, 0x21, 0x00C0, temp);
tempbl = XGI301TVDelay;
if (pVBInfo->VBInfo & SetCRT2ToDualEdge)
- tempbl = tempbl >> 4;
+ tempbl >>= 4;
if (pVBInfo->VBInfo &
(SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) {
tempbh = XGI301LCDDelay;
tempbx = XGI_GetTVPtrIndex(pVBInfo);
tempbx &= 0xFE;
tempah = TVAntiFlickList[tempbx];
- tempah = tempah << 4;
+ tempah <<= 4;
xgifb_reg_and_or(pVBInfo->Part2Port, 0x0A, 0x8F, tempah);
}
tempbx = XGI_GetTVPtrIndex(pVBInfo);
tempbx &= 0xFE;
tempah = TVEdgeList[tempbx];
- tempah = tempah << 5;
+ tempah <<= 5;
xgifb_reg_and_or(pVBInfo->Part2Port, 0x3A, 0x1F, tempah);
}
unsigned short RefreshRateTableIndex, i, index, temp;
index = xgifb_reg_get(pVBInfo->P3d4, 0x33);
- index = index >> pVBInfo->SelectCRT2Rate;
+ index >>= pVBInfo->SelectCRT2Rate;
index &= 0x0F;
if (pVBInfo->LCDInfo & LCDNonExpanding)
* traditional iSCSI block I/O.
*/
if (iscsit_allocate_iovecs(cmd) < 0) {
- return iscsit_add_reject_cmd(cmd,
+ return iscsit_reject_cmd(cmd,
ISCSI_REASON_BOOKMARK_NO_RESOURCES, buf);
}
immed_data = cmd->immediate_data;
tpg_np_list) {
struct iscsi_np *np = tpg_np->tpg_np;
bool inaddr_any = iscsit_check_inaddr_any(np);
+ char *fmt_str;
if (np->np_network_transport != network_transport)
continue;
}
}
- len = sprintf(buf, "TargetAddress="
- "%s:%hu,%hu",
+ if (np->np_sockaddr.ss_family == AF_INET6)
+ fmt_str = "TargetAddress=[%s]:%hu,%hu";
+ else
+ fmt_str = "TargetAddress=%s:%hu,%hu";
+
+ len = sprintf(buf, fmt_str,
inaddr_any ? conn->local_ip : np->np_ip,
np->np_port,
tpg->tpgt);
}
if (flag &&
dev->transport->get_write_cache) {
- pr_err("emulate_fua_write not supported for this device\n");
- return -EINVAL;
+ pr_warn("emulate_fua_write not supported for this device, ignoring\n");
+ return 0;
}
if (dev->export_count) {
pr_err("emulate_fua_write cannot be changed with active"
* Function to allocate regfields which are common
* between syscfg and memory mapped based sensors
*/
-int st_thermal_alloc_regfields(struct st_thermal_sensor *sensor)
+static int st_thermal_alloc_regfields(struct st_thermal_sensor *sensor)
{
struct device *dev = sensor->dev;
struct regmap *regmap = sensor->regmap;
};
/* Compatible device data stih416 mpe thermal sensor */
-const struct st_thermal_compat_data st_416mpe_cdata = {
+static const struct st_thermal_compat_data st_416mpe_cdata = {
.reg_fields = st_mmap_thermal_regfields,
.ops = &st_mmap_sensor_ops,
.calibration_val = 14,
};
/* Compatible device data stih407 thermal sensor */
-const struct st_thermal_compat_data st_407_cdata = {
+static const struct st_thermal_compat_data st_407_cdata = {
.reg_fields = st_mmap_thermal_regfields,
.ops = &st_mmap_sensor_ops,
.calibration_val = 16,
.crit_temp = 120,
};
-static struct of_device_id st_mmap_thermal_of_match[] = {
+static const struct of_device_id st_mmap_thermal_of_match[] = {
{ .compatible = "st,stih416-mpe-thermal", .data = &st_416mpe_cdata },
{ .compatible = "st,stih407-thermal", .data = &st_407_cdata },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, st_mmap_thermal_of_match);
-int st_mmap_probe(struct platform_device *pdev)
+static int st_mmap_probe(struct platform_device *pdev)
{
return st_thermal_register(pdev, st_mmap_thermal_of_match);
}
-int st_mmap_remove(struct platform_device *pdev)
+static int st_mmap_remove(struct platform_device *pdev)
{
return st_thermal_unregister(pdev);
}
};
/* Compatible device data for stih415 sas thermal sensor */
-const struct st_thermal_compat_data st_415sas_cdata = {
+static const struct st_thermal_compat_data st_415sas_cdata = {
.sys_compat = "st,stih415-front-syscfg",
.reg_fields = st_415sas_regfields,
.ops = &st_syscfg_sensor_ops,
};
/* Compatible device data for stih415 mpe thermal sensor */
-const struct st_thermal_compat_data st_415mpe_cdata = {
+static const struct st_thermal_compat_data st_415mpe_cdata = {
.sys_compat = "st,stih415-system-syscfg",
.reg_fields = st_415mpe_regfields,
.ops = &st_syscfg_sensor_ops,
};
/* Compatible device data for stih416 sas thermal sensor */
-const struct st_thermal_compat_data st_416sas_cdata = {
+static const struct st_thermal_compat_data st_416sas_cdata = {
.sys_compat = "st,stih416-front-syscfg",
.reg_fields = st_416sas_regfields,
.ops = &st_syscfg_sensor_ops,
};
/* Compatible device data for stid127 thermal sensor */
-const struct st_thermal_compat_data st_127_cdata = {
+static const struct st_thermal_compat_data st_127_cdata = {
.sys_compat = "st,stid127-cpu-syscfg",
.reg_fields = st_127_regfields,
.ops = &st_syscfg_sensor_ops,
.crit_temp = 120,
};
-static struct of_device_id st_syscfg_thermal_of_match[] = {
+static const struct of_device_id st_syscfg_thermal_of_match[] = {
{ .compatible = "st,stih415-sas-thermal", .data = &st_415sas_cdata },
{ .compatible = "st,stih415-mpe-thermal", .data = &st_415mpe_cdata },
{ .compatible = "st,stih416-sas-thermal", .data = &st_416sas_cdata },
};
MODULE_DEVICE_TABLE(of, st_syscfg_thermal_of_match);
-int st_syscfg_probe(struct platform_device *pdev)
+static int st_syscfg_probe(struct platform_device *pdev)
{
return st_thermal_register(pdev, st_syscfg_thermal_of_match);
}
-int st_syscfg_remove(struct platform_device *pdev)
+static int st_syscfg_remove(struct platform_device *pdev)
{
return st_thermal_unregister(pdev);
}
ret = thermal_zone_get_temp(tz, &temp);
if (ret) {
- dev_warn(&tz->device, "failed to read out thermal zone %d\n",
- tz->id);
+ if (ret != -EAGAIN)
+ dev_warn(&tz->device,
+ "failed to read out thermal zone (%d)\n",
+ ret);
return;
}
{
struct goldfish_tty *qtty;
int ret = -EINVAL;
- int i;
struct resource *r;
struct device *ttydev;
void __iomem *base;
mutex_unlock(&goldfish_tty_lock);
return 0;
- tty_unregister_device(goldfish_tty_driver, i);
err_tty_register_device_failed:
free_irq(irq, pdev);
err_request_irq_failed:
return;
}
- set_RTS(hw, PRIO_SETUP, channel_idx,
+ ret = set_RTS(hw, PRIO_SETUP, channel_idx,
(hw->control_lines [channel_idx] &
IPW_CONTROL_LINE_RTS) != 0);
if (ret) {
static void sysrq_handle_showstate(int key)
{
show_state();
+ show_workqueue_state();
}
static struct sysrq_key_op sysrq_showstate_op = {
.handler = sysrq_handle_showstate,
# Object files in subdirectories
obj-$(CONFIG_USB) += core/
+obj-$(CONFIG_USB_SUPPORT) += phy/
obj-$(CONFIG_USB_DWC3) += dwc3/
obj-$(CONFIG_USB_DWC2) += dwc2/
obj-$(CONFIG_USB_SERIAL) += serial/
obj-$(CONFIG_USB) += misc/
-obj-$(CONFIG_USB_SUPPORT) += phy/
obj-$(CONFIG_EARLY_PRINTK_DBGP) += early/
obj-$(CONFIG_USB_ATM) += atm/
int i;
/* reload firmware when reboot start and it's loaded already */
- if (ovl == 0 && pageno == 0 && sc->dsp_firm) {
+ if (ovl == 0 && pageno == 0) {
release_firmware(sc->dsp_firm);
sc->dsp_firm = NULL;
}
uea_dbg(INS_TO_USBDEV(sc), "sending DSP page %u\n", pageno);
/* reload firmware when reboot start and it's loaded already */
- if (pageno == 0 && sc->dsp_firm) {
+ if (pageno == 0) {
release_firmware(sc->dsp_firm);
sc->dsp_firm = NULL;
}
static __u8 c67x00_hub_des[] = {
0x09, /* __u8 bLength; */
- 0x29, /* __u8 bDescriptorType; Hub-descriptor */
+ USB_DT_HUB, /* __u8 bDescriptorType; Hub-descriptor */
0x02, /* __u8 bNbrPorts; */
0x00, /* __u16 wHubCharacteristics; */
0x00, /* (per-port OC, no power switching) */
if USB_CHIPIDEA
+config USB_CHIPIDEA_OF
+ tristate
+ depends on OF
+ default USB_CHIPIDEA
+
+config USB_CHIPIDEA_PCI
+ tristate
+ depends on PCI
+ depends on NOP_USB_XCEIV
+ default USB_CHIPIDEA
+
config USB_CHIPIDEA_UDC
bool "ChipIdea device controller"
depends on USB_GADGET
obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc_msm.o
obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc_zevio.o
-# PCI doesn't provide stubs, need to check
-ifneq ($(CONFIG_PCI),)
- obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc_pci.o
-endif
+obj-$(CONFIG_USB_CHIPIDEA_PCI) += ci_hdrc_pci.o
-ifneq ($(CONFIG_OF),)
- obj-$(CONFIG_USB_CHIPIDEA) += usbmisc_imx.o ci_hdrc_imx.o
-endif
+obj-$(CONFIG_USB_CHIPIDEA_OF) += usbmisc_imx.o ci_hdrc_imx.o
#include <linux/usb/ehci_def.h>
+/*
+ * ID
+ * For 1.x revision, bit24 - bit31 are reserved
+ * For 2.x revision, bit25 - bit28 are 0x2
+ */
+#define TAG (0x1F << 16)
+#define REVISION (0xF << 21)
+#define VERSION (0xF << 25)
+#define CIVERSION (0x7 << 29)
+
/* HCCPARAMS */
#define HCCPARAMS_LEN BIT(17)
#define PORTSC_HSP BIT(9)
#define PORTSC_PP BIT(12)
#define PORTSC_PTC (0x0FUL << 16)
+#define PORTSC_WKCN BIT(20)
#define PORTSC_PHCD(d) ((d) ? BIT(22) : BIT(23))
/* PTS and PTW for non lpm version only */
#define PORTSC_PFSC BIT(24)
/******************************************************************************
* REGISTERS
*****************************************************************************/
+/* Identification Registers */
+#define ID_ID 0x0
+#define ID_HWGENERAL 0x4
+#define ID_HWHOST 0x8
+#define ID_HWDEVICE 0xc
+#define ID_HWTXBUF 0x10
+#define ID_HWRXBUF 0x14
+#define ID_SBUSCFG 0x90
+
/* register indices */
enum ci_hw_regs {
CAP_CAPLENGTH,
CI_ROLE_END,
};
+enum ci_revision {
+ CI_REVISION_1X = 10, /* Revision 1.x */
+ CI_REVISION_20 = 20, /* Revision 2.0 */
+ CI_REVISION_21, /* Revision 2.1 */
+ CI_REVISION_22, /* Revision 2.2 */
+ CI_REVISION_23, /* Revision 2.3 */
+ CI_REVISION_24, /* Revision 2.4 */
+ CI_REVISION_25, /* Revision 2.5 */
+ CI_REVISION_25_PLUS, /* Revision above than 2.5 */
+ CI_REVISION_UNKNOWN = 99, /* Unknown Revision */
+};
+
/**
* struct ci_role_driver - host/gadget role driver
* @start: start this role
* @role: current role
* @is_otg: if the device is otg-capable
* @fsm: otg finite state machine
- * @fsm_timer: pointer to timer list of otg fsm
+ * @otg_fsm_hrtimer: hrtimer for otg fsm timers
+ * @hr_timeouts: time out list for active otg fsm timers
+ * @enabled_otg_timer_bits: bits of enabled otg timers
+ * @next_otg_timer: next nearest enabled timer to be expired
* @work: work for role changing
* @wq: workqueue thread
* @qh_pool: allocation pool for queue heads
* @b_sess_valid_event: indicates there is a vbus event, and handled
* at ci_otg_work
* @imx28_write_fix: Freescale imx28 needs swp instruction for writing
+ * @supports_runtime_pm: if runtime pm is supported
+ * @in_lpm: if the core in low power mode
+ * @wakeup_int: if wakeup interrupt occur
+ * @rev: The revision number for controller
*/
struct ci_hdrc {
struct device *dev;
bool is_otg;
struct usb_otg otg;
struct otg_fsm fsm;
- struct ci_otg_fsm_timer_list *fsm_timer;
+ struct hrtimer otg_fsm_hrtimer;
+ ktime_t hr_timeouts[NUM_OTG_FSM_TIMERS];
+ unsigned enabled_otg_timer_bits;
+ enum otg_fsm_timer next_otg_timer;
struct work_struct work;
struct workqueue_struct *wq;
bool id_event;
bool b_sess_valid_event;
bool imx28_write_fix;
+ bool supports_runtime_pm;
+ bool in_lpm;
+ bool wakeup_int;
+ enum ci_revision rev;
};
static inline struct ci_role_driver *ci_role(struct ci_hdrc *ci)
ci->roles[role]->stop(ci);
}
+/**
+ * hw_read_id_reg: reads from a identification register
+ * @ci: the controller
+ * @offset: offset from the beginning of identification registers region
+ * @mask: bitfield mask
+ *
+ * This function returns register contents
+ */
+static inline u32 hw_read_id_reg(struct ci_hdrc *ci, u32 offset, u32 mask)
+{
+ return ioread32(ci->hw_bank.abs + offset) & mask;
+}
+
+/**
+ * hw_write_id_reg: writes to a identification register
+ * @ci: the controller
+ * @offset: offset from the beginning of identification registers region
+ * @mask: bitfield mask
+ * @data: new value
+ */
+static inline void hw_write_id_reg(struct ci_hdrc *ci, u32 offset,
+ u32 mask, u32 data)
+{
+ if (~mask)
+ data = (ioread32(ci->hw_bank.abs + offset) & ~mask)
+ | (data & mask);
+
+ iowrite32(data, ci->hw_bank.abs + offset);
+}
+
/**
* hw_read: reads from a hw register
* @ci: the controller
#include "ci.h"
#include "ci_hdrc_imx.h"
-#define CI_HDRC_IMX_IMX28_WRITE_FIX BIT(0)
-
struct ci_hdrc_imx_platform_flag {
unsigned int flags;
+ bool runtime_pm;
};
static const struct ci_hdrc_imx_platform_flag imx27_usb_data = {
};
static const struct ci_hdrc_imx_platform_flag imx28_usb_data = {
- .flags = CI_HDRC_IMX_IMX28_WRITE_FIX,
+ .flags = CI_HDRC_IMX28_WRITE_FIX |
+ CI_HDRC_TURN_VBUS_EARLY_ON,
+};
+
+static const struct ci_hdrc_imx_platform_flag imx6q_usb_data = {
+ .flags = CI_HDRC_SUPPORTS_RUNTIME_PM |
+ CI_HDRC_TURN_VBUS_EARLY_ON,
+};
+
+static const struct ci_hdrc_imx_platform_flag imx6sl_usb_data = {
+ .flags = CI_HDRC_SUPPORTS_RUNTIME_PM |
+ CI_HDRC_TURN_VBUS_EARLY_ON,
+};
+
+static const struct ci_hdrc_imx_platform_flag imx6sx_usb_data = {
+ .flags = CI_HDRC_SUPPORTS_RUNTIME_PM |
+ CI_HDRC_TURN_VBUS_EARLY_ON,
};
static const struct of_device_id ci_hdrc_imx_dt_ids[] = {
{ .compatible = "fsl,imx28-usb", .data = &imx28_usb_data},
{ .compatible = "fsl,imx27-usb", .data = &imx27_usb_data},
+ { .compatible = "fsl,imx6q-usb", .data = &imx6q_usb_data},
+ { .compatible = "fsl,imx6sl-usb", .data = &imx6sl_usb_data},
+ { .compatible = "fsl,imx6sx-usb", .data = &imx6sl_usb_data},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, ci_hdrc_imx_dt_ids);
struct platform_device *ci_pdev;
struct clk *clk;
struct imx_usbmisc_data *usbmisc_data;
+ bool supports_runtime_pm;
+ bool in_lpm;
};
/* Common functions shared by usbmisc drivers */
}
pdata.usb_phy = data->phy;
-
- if (imx_platform_flag->flags & CI_HDRC_IMX_IMX28_WRITE_FIX)
- pdata.flags |= CI_HDRC_IMX28_WRITE_FIX;
+ pdata.flags |= imx_platform_flag->flags;
+ if (pdata.flags & CI_HDRC_SUPPORTS_RUNTIME_PM)
+ data->supports_runtime_pm = true;
ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
if (ret)
goto err_clk;
- if (data->usbmisc_data) {
- ret = imx_usbmisc_init(data->usbmisc_data);
- if (ret) {
- dev_err(&pdev->dev, "usbmisc init failed, ret=%d\n",
- ret);
- goto err_clk;
- }
+ ret = imx_usbmisc_init(data->usbmisc_data);
+ if (ret) {
+ dev_err(&pdev->dev, "usbmisc init failed, ret=%d\n", ret);
+ goto err_clk;
}
data->ci_pdev = ci_hdrc_add_device(&pdev->dev,
goto err_clk;
}
- if (data->usbmisc_data) {
- ret = imx_usbmisc_init_post(data->usbmisc_data);
- if (ret) {
- dev_err(&pdev->dev, "usbmisc post failed, ret=%d\n",
- ret);
- goto disable_device;
- }
+ ret = imx_usbmisc_init_post(data->usbmisc_data);
+ if (ret) {
+ dev_err(&pdev->dev, "usbmisc post failed, ret=%d\n", ret);
+ goto disable_device;
}
platform_set_drvdata(pdev, data);
- pm_runtime_no_callbacks(&pdev->dev);
- pm_runtime_enable(&pdev->dev);
+ if (data->supports_runtime_pm) {
+ pm_runtime_set_active(&pdev->dev);
+ pm_runtime_enable(&pdev->dev);
+ }
+
+ device_set_wakeup_capable(&pdev->dev, true);
return 0;
{
struct ci_hdrc_imx_data *data = platform_get_drvdata(pdev);
- pm_runtime_disable(&pdev->dev);
+ if (data->supports_runtime_pm) {
+ pm_runtime_get_sync(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
+ pm_runtime_put_noidle(&pdev->dev);
+ }
ci_hdrc_remove_device(data->ci_pdev);
clk_disable_unprepare(data->clk);
return 0;
}
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_PM
static int imx_controller_suspend(struct device *dev)
{
struct ci_hdrc_imx_data *data = dev_get_drvdata(dev);
dev_dbg(dev, "at %s\n", __func__);
clk_disable_unprepare(data->clk);
+ data->in_lpm = true;
return 0;
}
static int imx_controller_resume(struct device *dev)
{
struct ci_hdrc_imx_data *data = dev_get_drvdata(dev);
+ int ret = 0;
dev_dbg(dev, "at %s\n", __func__);
- return clk_prepare_enable(data->clk);
+ if (!data->in_lpm) {
+ WARN_ON(1);
+ return 0;
+ }
+
+ ret = clk_prepare_enable(data->clk);
+ if (ret)
+ return ret;
+
+ data->in_lpm = false;
+
+ ret = imx_usbmisc_set_wakeup(data->usbmisc_data, false);
+ if (ret) {
+ dev_err(dev, "usbmisc set_wakeup failed, ret=%d\n", ret);
+ goto clk_disable;
+ }
+
+ return 0;
+
+clk_disable:
+ clk_disable_unprepare(data->clk);
+ return ret;
}
+#ifdef CONFIG_PM_SLEEP
static int ci_hdrc_imx_suspend(struct device *dev)
{
+ int ret;
+
+ struct ci_hdrc_imx_data *data = dev_get_drvdata(dev);
+
+ if (data->in_lpm)
+ /* The core's suspend doesn't run */
+ return 0;
+
+ if (device_may_wakeup(dev)) {
+ ret = imx_usbmisc_set_wakeup(data->usbmisc_data, true);
+ if (ret) {
+ dev_err(dev, "usbmisc set_wakeup failed, ret=%d\n",
+ ret);
+ return ret;
+ }
+ }
+
return imx_controller_suspend(dev);
}
static int ci_hdrc_imx_resume(struct device *dev)
{
- return imx_controller_resume(dev);
+ struct ci_hdrc_imx_data *data = dev_get_drvdata(dev);
+ int ret;
+
+ ret = imx_controller_resume(dev);
+ if (!ret && data->supports_runtime_pm) {
+ pm_runtime_disable(dev);
+ pm_runtime_set_active(dev);
+ pm_runtime_enable(dev);
+ }
+
+ return ret;
}
#endif /* CONFIG_PM_SLEEP */
+static int ci_hdrc_imx_runtime_suspend(struct device *dev)
+{
+ struct ci_hdrc_imx_data *data = dev_get_drvdata(dev);
+ int ret;
+
+ if (data->in_lpm) {
+ WARN_ON(1);
+ return 0;
+ }
+
+ ret = imx_usbmisc_set_wakeup(data->usbmisc_data, true);
+ if (ret) {
+ dev_err(dev, "usbmisc set_wakeup failed, ret=%d\n", ret);
+ return ret;
+ }
+
+ return imx_controller_suspend(dev);
+}
+
+static int ci_hdrc_imx_runtime_resume(struct device *dev)
+{
+ return imx_controller_resume(dev);
+}
+
+#endif /* CONFIG_PM */
+
static const struct dev_pm_ops ci_hdrc_imx_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(ci_hdrc_imx_suspend, ci_hdrc_imx_resume)
+ SET_RUNTIME_PM_OPS(ci_hdrc_imx_runtime_suspend,
+ ci_hdrc_imx_runtime_resume, NULL)
};
static struct platform_driver ci_hdrc_imx_driver = {
.probe = ci_hdrc_imx_probe,
int imx_usbmisc_init(struct imx_usbmisc_data *);
int imx_usbmisc_init_post(struct imx_usbmisc_data *);
+int imx_usbmisc_set_wakeup(struct imx_usbmisc_data *, bool);
#endif /* __DRIVER_USB_CHIPIDEA_CI_HDRC_IMX_H */
#include <linux/interrupt.h>
#include <linux/usb/gadget.h>
#include <linux/usb/chipidea.h>
+#include <linux/usb/usb_phy_generic.h>
/* driver name */
#define UDC_DRIVER_NAME "ci_hdrc_pci"
+struct ci_hdrc_pci {
+ struct platform_device *ci;
+ struct platform_device *phy;
+};
+
/******************************************************************************
* PCI block
*****************************************************************************/
const struct pci_device_id *id)
{
struct ci_hdrc_platform_data *platdata = (void *)id->driver_data;
- struct platform_device *plat_ci;
+ struct ci_hdrc_pci *ci;
struct resource res[3];
int retval = 0, nres = 2;
return -ENODEV;
}
+ ci = devm_kzalloc(&pdev->dev, sizeof(*ci), GFP_KERNEL);
+ if (!ci)
+ return -ENOMEM;
+
retval = pcim_enable_device(pdev);
if (retval)
return retval;
pci_set_master(pdev);
pci_try_set_mwi(pdev);
+ /* register a nop PHY */
+ ci->phy = usb_phy_generic_register();
+ if (!ci->phy)
+ return -ENOMEM;
+
memset(res, 0, sizeof(res));
res[0].start = pci_resource_start(pdev, 0);
res[0].end = pci_resource_end(pdev, 0);
res[1].start = pdev->irq;
res[1].flags = IORESOURCE_IRQ;
- plat_ci = ci_hdrc_add_device(&pdev->dev, res, nres, platdata);
- if (IS_ERR(plat_ci)) {
+ ci->ci = ci_hdrc_add_device(&pdev->dev, res, nres, platdata);
+ if (IS_ERR(ci->ci)) {
dev_err(&pdev->dev, "ci_hdrc_add_device failed!\n");
- return PTR_ERR(plat_ci);
+ usb_phy_generic_unregister(ci->phy);
+ return PTR_ERR(ci->ci);
}
- pci_set_drvdata(pdev, plat_ci);
+ pci_set_drvdata(pdev, ci);
return 0;
}
*/
static void ci_hdrc_pci_remove(struct pci_dev *pdev)
{
- struct platform_device *plat_ci = pci_get_drvdata(pdev);
+ struct ci_hdrc_pci *ci = pci_get_drvdata(pdev);
- ci_hdrc_remove_device(plat_ci);
+ ci_hdrc_remove_device(ci->ci);
+ usb_phy_generic_unregister(ci->phy);
}
/**
static struct ci_hdrc_platform_data ci_hdrc_zevio_platdata = {
.name = "ci_hdrc_zevio",
- .flags = CI_HDRC_REGS_SHARED,
+ .flags = CI_HDRC_REGS_SHARED | CI_HDRC_FORCE_FULLSPEED,
.capoffset = DEF_CAPOFFSET,
};
return 0;
}
+static enum ci_revision ci_get_revision(struct ci_hdrc *ci)
+{
+ int ver = hw_read_id_reg(ci, ID_ID, VERSION) >> __ffs(VERSION);
+ enum ci_revision rev = CI_REVISION_UNKNOWN;
+
+ if (ver == 0x2) {
+ rev = hw_read_id_reg(ci, ID_ID, REVISION)
+ >> __ffs(REVISION);
+ rev += CI_REVISION_20;
+ } else if (ver == 0x0) {
+ rev = CI_REVISION_1X;
+ }
+
+ return rev;
+}
+
/**
* hw_read_intr_enable: returns interrupt enable register
*
/* Clear all interrupts status bits*/
hw_write(ci, OP_USBSTS, 0xffffffff, 0xffffffff);
- dev_dbg(ci->dev, "ChipIdea HDRC found, lpm: %d; cap: %p op: %p\n",
- ci->hw_bank.lpm, ci->hw_bank.cap, ci->hw_bank.op);
+ ci->rev = ci_get_revision(ci);
+
+ dev_dbg(ci->dev,
+ "ChipIdea HDRC found, revision: %d, lpm: %d; cap: %p op: %p\n",
+ ci->rev, ci->hw_bank.lpm, ci->hw_bank.cap, ci->hw_bank.op);
/* setup lock mode ? */
irqreturn_t ret = IRQ_NONE;
u32 otgsc = 0;
+ if (ci->in_lpm) {
+ disable_irq_nosync(irq);
+ ci->wakeup_int = true;
+ pm_runtime_get(ci->dev);
+ return IRQ_HANDLED;
+ }
+
if (ci->is_otg) {
otgsc = hw_read_otgsc(ci, ~0);
if (ci_otg_is_fsm_mode(ci)) {
ci->is_otg = (hw_read(ci, CAP_DCCPARAMS,
DCCPARAMS_DC | DCCPARAMS_HC)
== (DCCPARAMS_DC | DCCPARAMS_HC));
- if (ci->is_otg)
+ if (ci->is_otg) {
dev_dbg(ci->dev, "It is OTG capable controller\n");
+ /* Disable and clear all OTG irq */
+ hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
+ OTGSC_INT_STATUS_BITS);
+ }
}
static int ci_hdrc_probe(struct platform_device *pdev)
ci->platdata = dev_get_platdata(dev);
ci->imx28_write_fix = !!(ci->platdata->flags &
CI_HDRC_IMX28_WRITE_FIX);
+ ci->supports_runtime_pm = !!(ci->platdata->flags &
+ CI_HDRC_SUPPORTS_RUNTIME_PM);
ret = hw_device_init(ci, base);
if (ret < 0) {
}
if (ci->is_otg && ci->roles[CI_ROLE_GADGET]) {
- /* Disable and clear all OTG irq */
- hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
- OTGSC_INT_STATUS_BITS);
ret = ci_hdrc_otg_init(ci);
if (ret) {
dev_err(dev, "init otg fails, ret = %d\n", ret);
: CI_ROLE_GADGET;
}
- /* only update vbus status for peripheral */
- if (ci->role == CI_ROLE_GADGET)
- ci_handle_vbus_change(ci);
-
if (!ci_otg_is_fsm_mode(ci)) {
+ /* only update vbus status for peripheral */
+ if (ci->role == CI_ROLE_GADGET)
+ ci_handle_vbus_change(ci);
+
ret = ci_role_start(ci, ci->role);
if (ret) {
dev_err(dev, "can't start %s role\n",
if (ret)
goto stop;
+ if (ci->supports_runtime_pm) {
+ pm_runtime_set_active(&pdev->dev);
+ pm_runtime_enable(&pdev->dev);
+ pm_runtime_set_autosuspend_delay(&pdev->dev, 2000);
+ pm_runtime_mark_last_busy(ci->dev);
+ pm_runtime_use_autosuspend(&pdev->dev);
+ }
+
if (ci_otg_is_fsm_mode(ci))
ci_hdrc_otg_fsm_start(ci);
+ device_set_wakeup_capable(&pdev->dev, true);
+
ret = dbg_create_files(ci);
if (!ret)
return 0;
{
struct ci_hdrc *ci = platform_get_drvdata(pdev);
+ if (ci->supports_runtime_pm) {
+ pm_runtime_get_sync(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
+ pm_runtime_put_noidle(&pdev->dev);
+ }
+
dbg_remove_files(ci);
ci_role_destroy(ci);
ci_hdrc_enter_lpm(ci, true);
return 0;
}
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_PM
+/* Prepare wakeup by SRP before suspend */
+static void ci_otg_fsm_suspend_for_srp(struct ci_hdrc *ci)
+{
+ if ((ci->fsm.otg->state == OTG_STATE_A_IDLE) &&
+ !hw_read_otgsc(ci, OTGSC_ID)) {
+ hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP,
+ PORTSC_PP);
+ hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_WKCN,
+ PORTSC_WKCN);
+ }
+}
+
+/* Handle SRP when wakeup by data pulse */
+static void ci_otg_fsm_wakeup_by_srp(struct ci_hdrc *ci)
+{
+ if ((ci->fsm.otg->state == OTG_STATE_A_IDLE) &&
+ (ci->fsm.a_bus_drop == 1) && (ci->fsm.a_bus_req == 0)) {
+ if (!hw_read_otgsc(ci, OTGSC_ID)) {
+ ci->fsm.a_srp_det = 1;
+ ci->fsm.a_bus_drop = 0;
+ } else {
+ ci->fsm.id = 1;
+ }
+ ci_otg_queue_work(ci);
+ }
+}
+
static void ci_controller_suspend(struct ci_hdrc *ci)
{
+ disable_irq(ci->irq);
ci_hdrc_enter_lpm(ci, true);
-
- if (ci->usb_phy)
- usb_phy_set_suspend(ci->usb_phy, 1);
+ usb_phy_set_suspend(ci->usb_phy, 1);
+ ci->in_lpm = true;
+ enable_irq(ci->irq);
}
static int ci_controller_resume(struct device *dev)
dev_dbg(dev, "at %s\n", __func__);
- ci_hdrc_enter_lpm(ci, false);
+ if (!ci->in_lpm) {
+ WARN_ON(1);
+ return 0;
+ }
+ ci_hdrc_enter_lpm(ci, false);
if (ci->usb_phy) {
usb_phy_set_suspend(ci->usb_phy, 0);
usb_phy_set_wakeup(ci->usb_phy, false);
hw_wait_phy_stable();
}
+ ci->in_lpm = false;
+ if (ci->wakeup_int) {
+ ci->wakeup_int = false;
+ pm_runtime_mark_last_busy(ci->dev);
+ pm_runtime_put_autosuspend(ci->dev);
+ enable_irq(ci->irq);
+ if (ci_otg_is_fsm_mode(ci))
+ ci_otg_fsm_wakeup_by_srp(ci);
+ }
+
return 0;
}
+#ifdef CONFIG_PM_SLEEP
static int ci_suspend(struct device *dev)
{
struct ci_hdrc *ci = dev_get_drvdata(dev);
if (ci->wq)
flush_workqueue(ci->wq);
+ /*
+ * Controller needs to be active during suspend, otherwise the core
+ * may run resume when the parent is at suspend if other driver's
+ * suspend fails, it occurs before parent's suspend has not started,
+ * but the core suspend has finished.
+ */
+ if (ci->in_lpm)
+ pm_runtime_resume(dev);
+
+ if (ci->in_lpm) {
+ WARN_ON(1);
+ return 0;
+ }
+
+ if (device_may_wakeup(dev)) {
+ if (ci_otg_is_fsm_mode(ci))
+ ci_otg_fsm_suspend_for_srp(ci);
+
+ usb_phy_set_wakeup(ci->usb_phy, true);
+ enable_irq_wake(ci->irq);
+ }
ci_controller_suspend(ci);
static int ci_resume(struct device *dev)
{
- return ci_controller_resume(dev);
+ struct ci_hdrc *ci = dev_get_drvdata(dev);
+ int ret;
+
+ if (device_may_wakeup(dev))
+ disable_irq_wake(ci->irq);
+
+ ret = ci_controller_resume(dev);
+ if (ret)
+ return ret;
+
+ if (ci->supports_runtime_pm) {
+ pm_runtime_disable(dev);
+ pm_runtime_set_active(dev);
+ pm_runtime_enable(dev);
+ }
+
+ return ret;
}
#endif /* CONFIG_PM_SLEEP */
+static int ci_runtime_suspend(struct device *dev)
+{
+ struct ci_hdrc *ci = dev_get_drvdata(dev);
+
+ dev_dbg(dev, "at %s\n", __func__);
+
+ if (ci->in_lpm) {
+ WARN_ON(1);
+ return 0;
+ }
+
+ if (ci_otg_is_fsm_mode(ci))
+ ci_otg_fsm_suspend_for_srp(ci);
+
+ usb_phy_set_wakeup(ci->usb_phy, true);
+ ci_controller_suspend(ci);
+
+ return 0;
+}
+
+static int ci_runtime_resume(struct device *dev)
+{
+ return ci_controller_resume(dev);
+}
+
+#endif /* CONFIG_PM */
static const struct dev_pm_ops ci_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(ci_suspend, ci_resume)
+ SET_RUNTIME_PM_OPS(ci_runtime_suspend, ci_runtime_resume, NULL)
};
+
static struct platform_driver ci_hdrc_driver = {
.probe = ci_hdrc_probe,
.remove = ci_hdrc_remove,
struct ci_hdrc *ci = s->private;
u32 tmp_reg;
- if (!ci)
- return 0;
+ if (!ci || ci->in_lpm)
+ return -EPERM;
/* ------ Registers ----- */
tmp_reg = hw_read_intr_enable(ci);
#include "host.h"
static struct hc_driver __read_mostly ci_ehci_hc_driver;
+static int (*orig_bus_suspend)(struct usb_hcd *hcd);
struct ehci_ci_priv {
struct regulator *reg_vbus;
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
struct device *dev = hcd->self.controller;
- struct ci_hdrc *ci = dev_get_drvdata(dev);
int ret = 0;
int port = HCS_N_PORTS(ehci->hcs_params);
- if (priv->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
+ if (priv->reg_vbus) {
if (port > 1) {
dev_warn(dev,
"Not support multi-port regulator control\n");
priv = (struct ehci_ci_priv *)ehci->priv;
priv->reg_vbus = NULL;
- if (ci->platdata->reg_vbus)
- priv->reg_vbus = ci->platdata->reg_vbus;
+ if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
+ if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
+ ret = regulator_enable(ci->platdata->reg_vbus);
+ if (ret) {
+ dev_err(ci->dev,
+ "Failed to enable vbus regulator, ret=%d\n",
+ ret);
+ goto put_hcd;
+ }
+ } else {
+ priv->reg_vbus = ci->platdata->reg_vbus;
+ }
+ }
ret = usb_add_hcd(hcd, 0, 0);
if (ret) {
- goto put_hcd;
+ goto disable_reg;
} else {
struct usb_otg *otg = &ci->otg;
if (ci->platdata->flags & CI_HDRC_DISABLE_STREAMING)
hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS, USBMODE_CI_SDIS);
+ if (ci->platdata->flags & CI_HDRC_FORCE_FULLSPEED)
+ hw_write(ci, OP_PORTSC, PORTSC_PFSC, PORTSC_PFSC);
+
return ret;
+disable_reg:
+ if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
+ (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
+ regulator_disable(ci->platdata->reg_vbus);
put_hcd:
usb_put_hcd(hcd);
if (hcd) {
usb_remove_hcd(hcd);
usb_put_hcd(hcd);
+ if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
+ (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
+ regulator_disable(ci->platdata->reg_vbus);
}
}
host_stop(ci);
}
+static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
+{
+ struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+ int port;
+ u32 tmp;
+
+ int ret = orig_bus_suspend(hcd);
+
+ if (ret)
+ return ret;
+
+ port = HCS_N_PORTS(ehci->hcs_params);
+ while (port--) {
+ u32 __iomem *reg = &ehci->regs->port_status[port];
+ u32 portsc = ehci_readl(ehci, reg);
+
+ if (portsc & PORT_CONNECT) {
+ /*
+ * For chipidea, the resume signal will be ended
+ * automatically, so for remote wakeup case, the
+ * usbcmd.rs may not be set before the resume has
+ * ended if other resume paths consumes too much
+ * time (~24ms), in that case, the SOF will not
+ * send out within 3ms after resume ends, then the
+ * high speed device will enter full speed mode.
+ */
+
+ tmp = ehci_readl(ehci, &ehci->regs->command);
+ tmp |= CMD_RUN;
+ ehci_writel(ehci, tmp, &ehci->regs->command);
+ /*
+ * It needs a short delay between set RS bit and PHCD.
+ */
+ usleep_range(150, 200);
+ break;
+ }
+ }
+
+ return 0;
+}
+
int ci_hdrc_host_init(struct ci_hdrc *ci)
{
struct ci_role_driver *rdrv;
ci->roles[CI_ROLE_HOST] = rdrv;
ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
+ orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
+ ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
return 0;
}
return;
}
+ pm_runtime_get_sync(ci->dev);
if (ci->id_event) {
ci->id_event = false;
ci_handle_id_switch(ci);
ci_handle_vbus_change(ci);
} else
dev_err(ci->dev, "unexpected event occurs at %s\n", __func__);
+ pm_runtime_put_sync(ci->dev);
enable_irq(ci->irq);
}
#include "otg.h"
#include "otg_fsm.h"
-static struct ci_otg_fsm_timer *otg_timer_initializer
-(struct ci_hdrc *ci, void (*function)(void *, unsigned long),
- unsigned long expires, unsigned long data)
-{
- struct ci_otg_fsm_timer *timer;
-
- timer = devm_kzalloc(ci->dev, sizeof(struct ci_otg_fsm_timer),
- GFP_KERNEL);
- if (!timer)
- return NULL;
- timer->function = function;
- timer->expires = expires;
- timer->data = data;
- return timer;
-}
-
/* Add for otg: interact with user space app */
static ssize_t
get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
.attrs = inputs_attrs,
};
+/*
+ * Keep this list in the same order as timers indexed
+ * by enum otg_fsm_timer in include/linux/usb/otg-fsm.h
+ */
+static unsigned otg_timer_ms[] = {
+ TA_WAIT_VRISE,
+ TA_WAIT_VFALL,
+ TA_WAIT_BCON,
+ TA_AIDL_BDIS,
+ TB_ASE0_BRST,
+ TA_BIDL_ADIS,
+ TB_SE0_SRP,
+ TB_SRP_FAIL,
+ 0,
+ TB_DATA_PLS,
+ TB_SSEND_SRP,
+};
+
/*
* Add timer to active timer list
*/
-static void ci_otg_add_timer(struct ci_hdrc *ci, enum ci_otg_fsm_timer_index t)
+static void ci_otg_add_timer(struct ci_hdrc *ci, enum otg_fsm_timer t)
{
- struct ci_otg_fsm_timer *tmp_timer;
- struct ci_otg_fsm_timer *timer = ci->fsm_timer->timer_list[t];
- struct list_head *active_timers = &ci->fsm_timer->active_timers;
+ unsigned long flags, timer_sec, timer_nsec;
- if (t >= NUM_CI_OTG_FSM_TIMERS)
+ if (t >= NUM_OTG_FSM_TIMERS)
return;
- /*
- * Check if the timer is already in the active list,
- * if so update timer count
- */
- list_for_each_entry(tmp_timer, active_timers, list)
- if (tmp_timer == timer) {
- timer->count = timer->expires;
- return;
- }
-
- timer->count = timer->expires;
- list_add_tail(&timer->list, active_timers);
-
- /* Enable 1ms irq */
- if (!(hw_read_otgsc(ci, OTGSC_1MSIE)))
- hw_write_otgsc(ci, OTGSC_1MSIE, OTGSC_1MSIE);
+ spin_lock_irqsave(&ci->lock, flags);
+ timer_sec = otg_timer_ms[t] / MSEC_PER_SEC;
+ timer_nsec = (otg_timer_ms[t] % MSEC_PER_SEC) * NSEC_PER_MSEC;
+ ci->hr_timeouts[t] = ktime_add(ktime_get(),
+ ktime_set(timer_sec, timer_nsec));
+ ci->enabled_otg_timer_bits |= (1 << t);
+ if ((ci->next_otg_timer == NUM_OTG_FSM_TIMERS) ||
+ (ci->hr_timeouts[ci->next_otg_timer].tv64 >
+ ci->hr_timeouts[t].tv64)) {
+ ci->next_otg_timer = t;
+ hrtimer_start_range_ns(&ci->otg_fsm_hrtimer,
+ ci->hr_timeouts[t], NSEC_PER_MSEC,
+ HRTIMER_MODE_ABS);
+ }
+ spin_unlock_irqrestore(&ci->lock, flags);
}
/*
* Remove timer from active timer list
*/
-static void ci_otg_del_timer(struct ci_hdrc *ci, enum ci_otg_fsm_timer_index t)
+static void ci_otg_del_timer(struct ci_hdrc *ci, enum otg_fsm_timer t)
{
- struct ci_otg_fsm_timer *tmp_timer, *del_tmp;
- struct ci_otg_fsm_timer *timer = ci->fsm_timer->timer_list[t];
- struct list_head *active_timers = &ci->fsm_timer->active_timers;
+ unsigned long flags, enabled_timer_bits;
+ enum otg_fsm_timer cur_timer, next_timer = NUM_OTG_FSM_TIMERS;
- if (t >= NUM_CI_OTG_FSM_TIMERS)
+ if ((t >= NUM_OTG_FSM_TIMERS) ||
+ !(ci->enabled_otg_timer_bits & (1 << t)))
return;
- list_for_each_entry_safe(tmp_timer, del_tmp, active_timers, list)
- if (tmp_timer == timer)
- list_del(&timer->list);
-
- /* Disable 1ms irq if there is no any active timer */
- if (list_empty(active_timers))
- hw_write_otgsc(ci, OTGSC_1MSIE, 0);
-}
-
-/*
- * Reduce timer count by 1, and find timeout conditions.
- * Called by otg 1ms timer interrupt
- */
-static inline int ci_otg_tick_timer(struct ci_hdrc *ci)
-{
- struct ci_otg_fsm_timer *tmp_timer, *del_tmp;
- struct list_head *active_timers = &ci->fsm_timer->active_timers;
- int expired = 0;
-
- list_for_each_entry_safe(tmp_timer, del_tmp, active_timers, list) {
- tmp_timer->count--;
- /* check if timer expires */
- if (!tmp_timer->count) {
- list_del(&tmp_timer->list);
- tmp_timer->function(ci, tmp_timer->data);
- expired = 1;
+ spin_lock_irqsave(&ci->lock, flags);
+ ci->enabled_otg_timer_bits &= ~(1 << t);
+ if (ci->next_otg_timer == t) {
+ if (ci->enabled_otg_timer_bits == 0) {
+ /* No enabled timers after delete it */
+ hrtimer_cancel(&ci->otg_fsm_hrtimer);
+ ci->next_otg_timer = NUM_OTG_FSM_TIMERS;
+ } else {
+ /* Find the next timer */
+ enabled_timer_bits = ci->enabled_otg_timer_bits;
+ for_each_set_bit(cur_timer, &enabled_timer_bits,
+ NUM_OTG_FSM_TIMERS) {
+ if ((next_timer == NUM_OTG_FSM_TIMERS) ||
+ (ci->hr_timeouts[next_timer].tv64 <
+ ci->hr_timeouts[cur_timer].tv64))
+ next_timer = cur_timer;
+ }
}
}
-
- /* disable 1ms irq if there is no any timer active */
- if ((expired == 1) && list_empty(active_timers))
- hw_write_otgsc(ci, OTGSC_1MSIE, 0);
-
- return expired;
+ if (next_timer != NUM_OTG_FSM_TIMERS) {
+ ci->next_otg_timer = next_timer;
+ hrtimer_start_range_ns(&ci->otg_fsm_hrtimer,
+ ci->hr_timeouts[next_timer], NSEC_PER_MSEC,
+ HRTIMER_MODE_ABS);
+ }
+ spin_unlock_irqrestore(&ci->lock, flags);
}
-/* The timeout callback function to set time out bit */
-static void set_tmout(void *ptr, unsigned long indicator)
+/* OTG FSM timer handlers */
+static int a_wait_vrise_tmout(struct ci_hdrc *ci)
{
- *(int *)indicator = 1;
+ ci->fsm.a_wait_vrise_tmout = 1;
+ return 0;
}
-static void set_tmout_and_fsm(void *ptr, unsigned long indicator)
+static int a_wait_vfall_tmout(struct ci_hdrc *ci)
{
- struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
-
- set_tmout(ci, indicator);
-
- ci_otg_queue_work(ci);
+ ci->fsm.a_wait_vfall_tmout = 1;
+ return 0;
}
-static void a_wait_vfall_tmout_func(void *ptr, unsigned long indicator)
+static int a_wait_bcon_tmout(struct ci_hdrc *ci)
{
- struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
-
- set_tmout(ci, indicator);
- /* Disable port power */
- hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP, 0);
- /* Clear existing DP irq */
- hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
- /* Enable data pulse irq */
- hw_write_otgsc(ci, OTGSC_DPIE, OTGSC_DPIE);
- ci_otg_queue_work(ci);
+ ci->fsm.a_wait_bcon_tmout = 1;
+ return 0;
}
-static void b_ase0_brst_tmout_func(void *ptr, unsigned long indicator)
+static int a_aidl_bdis_tmout(struct ci_hdrc *ci)
{
- struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
-
- set_tmout(ci, indicator);
- if (!hw_read_otgsc(ci, OTGSC_BSV))
- ci->fsm.b_sess_vld = 0;
-
- ci_otg_queue_work(ci);
+ ci->fsm.a_aidl_bdis_tmout = 1;
+ return 0;
}
-static void b_ssend_srp_tmout_func(void *ptr, unsigned long indicator)
+static int b_ase0_brst_tmout(struct ci_hdrc *ci)
{
- struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
-
- set_tmout(ci, indicator);
-
- /* only vbus fall below B_sess_vld in b_idle state */
- if (ci->fsm.otg->state == OTG_STATE_B_IDLE)
- ci_otg_queue_work(ci);
+ ci->fsm.b_ase0_brst_tmout = 1;
+ return 0;
}
-static void b_sess_vld_tmout_func(void *ptr, unsigned long indicator)
+static int a_bidl_adis_tmout(struct ci_hdrc *ci)
{
- struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
+ ci->fsm.a_bidl_adis_tmout = 1;
+ return 0;
+}
- /* Check if A detached */
- if (!(hw_read_otgsc(ci, OTGSC_BSV))) {
- ci->fsm.b_sess_vld = 0;
- ci_otg_add_timer(ci, B_SSEND_SRP);
- ci_otg_queue_work(ci);
- }
+static int b_se0_srp_tmout(struct ci_hdrc *ci)
+{
+ ci->fsm.b_se0_srp = 1;
+ return 0;
}
-static void b_data_pulse_end(void *ptr, unsigned long indicator)
+static int b_srp_fail_tmout(struct ci_hdrc *ci)
{
- struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
+ ci->fsm.b_srp_done = 1;
+ return 1;
+}
+static int b_data_pls_tmout(struct ci_hdrc *ci)
+{
ci->fsm.b_srp_done = 1;
ci->fsm.b_bus_req = 0;
if (ci->fsm.power_up)
ci->fsm.power_up = 0;
-
hw_write_otgsc(ci, OTGSC_HABA, 0);
+ pm_runtime_put(ci->dev);
+ return 0;
+}
- ci_otg_queue_work(ci);
+static int b_ssend_srp_tmout(struct ci_hdrc *ci)
+{
+ ci->fsm.b_ssend_srp = 1;
+ /* only vbus fall below B_sess_vld in b_idle state */
+ if (ci->fsm.otg->state == OTG_STATE_B_IDLE)
+ return 0;
+ else
+ return 1;
+}
+
+/*
+ * Keep this list in the same order as timers indexed
+ * by enum otg_fsm_timer in include/linux/usb/otg-fsm.h
+ */
+static int (*otg_timer_handlers[])(struct ci_hdrc *) = {
+ a_wait_vrise_tmout, /* A_WAIT_VRISE */
+ a_wait_vfall_tmout, /* A_WAIT_VFALL */
+ a_wait_bcon_tmout, /* A_WAIT_BCON */
+ a_aidl_bdis_tmout, /* A_AIDL_BDIS */
+ b_ase0_brst_tmout, /* B_ASE0_BRST */
+ a_bidl_adis_tmout, /* A_BIDL_ADIS */
+ b_se0_srp_tmout, /* B_SE0_SRP */
+ b_srp_fail_tmout, /* B_SRP_FAIL */
+ NULL, /* A_WAIT_ENUM */
+ b_data_pls_tmout, /* B_DATA_PLS */
+ b_ssend_srp_tmout, /* B_SSEND_SRP */
+};
+
+/*
+ * Enable the next nearest enabled timer if have
+ */
+static enum hrtimer_restart ci_otg_hrtimer_func(struct hrtimer *t)
+{
+ struct ci_hdrc *ci = container_of(t, struct ci_hdrc, otg_fsm_hrtimer);
+ ktime_t now, *timeout;
+ unsigned long enabled_timer_bits;
+ unsigned long flags;
+ enum otg_fsm_timer cur_timer, next_timer = NUM_OTG_FSM_TIMERS;
+ int ret = -EINVAL;
+
+ spin_lock_irqsave(&ci->lock, flags);
+ enabled_timer_bits = ci->enabled_otg_timer_bits;
+ ci->next_otg_timer = NUM_OTG_FSM_TIMERS;
+
+ now = ktime_get();
+ for_each_set_bit(cur_timer, &enabled_timer_bits, NUM_OTG_FSM_TIMERS) {
+ if (now.tv64 >= ci->hr_timeouts[cur_timer].tv64) {
+ ci->enabled_otg_timer_bits &= ~(1 << cur_timer);
+ if (otg_timer_handlers[cur_timer])
+ ret = otg_timer_handlers[cur_timer](ci);
+ } else {
+ if ((next_timer == NUM_OTG_FSM_TIMERS) ||
+ (ci->hr_timeouts[cur_timer].tv64 <
+ ci->hr_timeouts[next_timer].tv64))
+ next_timer = cur_timer;
+ }
+ }
+ /* Enable the next nearest timer */
+ if (next_timer < NUM_OTG_FSM_TIMERS) {
+ timeout = &ci->hr_timeouts[next_timer];
+ hrtimer_start_range_ns(&ci->otg_fsm_hrtimer, *timeout,
+ NSEC_PER_MSEC, HRTIMER_MODE_ABS);
+ ci->next_otg_timer = next_timer;
+ }
+ spin_unlock_irqrestore(&ci->lock, flags);
+
+ if (!ret)
+ ci_otg_queue_work(ci);
+
+ return HRTIMER_NORESTART;
}
/* Initialize timers */
static int ci_otg_init_timers(struct ci_hdrc *ci)
{
- struct otg_fsm *fsm = &ci->fsm;
-
- /* FSM used timers */
- ci->fsm_timer->timer_list[A_WAIT_VRISE] =
- otg_timer_initializer(ci, &set_tmout_and_fsm, TA_WAIT_VRISE,
- (unsigned long)&fsm->a_wait_vrise_tmout);
- if (ci->fsm_timer->timer_list[A_WAIT_VRISE] == NULL)
- return -ENOMEM;
-
- ci->fsm_timer->timer_list[A_WAIT_VFALL] =
- otg_timer_initializer(ci, &a_wait_vfall_tmout_func,
- TA_WAIT_VFALL, (unsigned long)&fsm->a_wait_vfall_tmout);
- if (ci->fsm_timer->timer_list[A_WAIT_VFALL] == NULL)
- return -ENOMEM;
-
- ci->fsm_timer->timer_list[A_WAIT_BCON] =
- otg_timer_initializer(ci, &set_tmout_and_fsm, TA_WAIT_BCON,
- (unsigned long)&fsm->a_wait_bcon_tmout);
- if (ci->fsm_timer->timer_list[A_WAIT_BCON] == NULL)
- return -ENOMEM;
-
- ci->fsm_timer->timer_list[A_AIDL_BDIS] =
- otg_timer_initializer(ci, &set_tmout_and_fsm, TA_AIDL_BDIS,
- (unsigned long)&fsm->a_aidl_bdis_tmout);
- if (ci->fsm_timer->timer_list[A_AIDL_BDIS] == NULL)
- return -ENOMEM;
-
- ci->fsm_timer->timer_list[A_BIDL_ADIS] =
- otg_timer_initializer(ci, &set_tmout_and_fsm, TA_BIDL_ADIS,
- (unsigned long)&fsm->a_bidl_adis_tmout);
- if (ci->fsm_timer->timer_list[A_BIDL_ADIS] == NULL)
- return -ENOMEM;
-
- ci->fsm_timer->timer_list[B_ASE0_BRST] =
- otg_timer_initializer(ci, &b_ase0_brst_tmout_func, TB_ASE0_BRST,
- (unsigned long)&fsm->b_ase0_brst_tmout);
- if (ci->fsm_timer->timer_list[B_ASE0_BRST] == NULL)
- return -ENOMEM;
-
- ci->fsm_timer->timer_list[B_SE0_SRP] =
- otg_timer_initializer(ci, &set_tmout_and_fsm, TB_SE0_SRP,
- (unsigned long)&fsm->b_se0_srp);
- if (ci->fsm_timer->timer_list[B_SE0_SRP] == NULL)
- return -ENOMEM;
-
- ci->fsm_timer->timer_list[B_SSEND_SRP] =
- otg_timer_initializer(ci, &b_ssend_srp_tmout_func, TB_SSEND_SRP,
- (unsigned long)&fsm->b_ssend_srp);
- if (ci->fsm_timer->timer_list[B_SSEND_SRP] == NULL)
- return -ENOMEM;
-
- ci->fsm_timer->timer_list[B_SRP_FAIL] =
- otg_timer_initializer(ci, &set_tmout, TB_SRP_FAIL,
- (unsigned long)&fsm->b_srp_done);
- if (ci->fsm_timer->timer_list[B_SRP_FAIL] == NULL)
- return -ENOMEM;
-
- ci->fsm_timer->timer_list[B_DATA_PLS] =
- otg_timer_initializer(ci, &b_data_pulse_end, TB_DATA_PLS, 0);
- if (ci->fsm_timer->timer_list[B_DATA_PLS] == NULL)
- return -ENOMEM;
-
- ci->fsm_timer->timer_list[B_SESS_VLD] = otg_timer_initializer(ci,
- &b_sess_vld_tmout_func, TB_SESS_VLD, 0);
- if (ci->fsm_timer->timer_list[B_SESS_VLD] == NULL)
- return -ENOMEM;
+ hrtimer_init(&ci->otg_fsm_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
+ ci->otg_fsm_hrtimer.function = ci_otg_hrtimer_func;
return 0;
}
/* Hardware Assistant Data pulse */
hw_write_otgsc(ci, OTGSC_HADP, OTGSC_HADP);
+ pm_runtime_get(ci->dev);
ci_otg_add_timer(ci, B_DATA_PLS);
}
ci->fsm.otg->state < OTG_STATE_A_IDLE)
return 0;
+ pm_runtime_get_sync(ci->dev);
if (otg_statemachine(&ci->fsm)) {
if (ci->fsm.otg->state == OTG_STATE_A_IDLE) {
/*
* a_idle to a_wait_vrise when power up
*/
if ((ci->fsm.id) || (ci->id_event) ||
- (ci->fsm.power_up))
+ (ci->fsm.power_up)) {
ci_otg_queue_work(ci);
+ } else {
+ /* Enable data pulse irq */
+ hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS |
+ PORTSC_PP, 0);
+ hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
+ hw_write_otgsc(ci, OTGSC_DPIE, OTGSC_DPIE);
+ }
if (ci->id_event)
ci->id_event = false;
} else if (ci->fsm.otg->state == OTG_STATE_B_IDLE) {
*/
ci_otg_queue_work(ci);
}
+ } else if (ci->fsm.otg->state == OTG_STATE_A_HOST) {
+ pm_runtime_mark_last_busy(ci->dev);
+ pm_runtime_put_autosuspend(ci->dev);
+ return 0;
}
}
+ pm_runtime_put_sync(ci->dev);
return 0;
}
fsm->a_conn = 0;
fsm->b_bus_req = 0;
ci_otg_queue_work(ci);
- ci_otg_add_timer(ci, B_SESS_VLD);
}
break;
case OTG_STATE_A_PERIPHERAL:
fsm->id = (otgsc & OTGSC_ID) ? 1 : 0;
if (otg_int_src) {
- if (otg_int_src & OTGSC_1MSIS) {
- hw_write_otgsc(ci, OTGSC_1MSIS, OTGSC_1MSIS);
- retval = ci_otg_tick_timer(ci);
- return IRQ_HANDLED;
- } else if (otg_int_src & OTGSC_DPIS) {
+ if (otg_int_src & OTGSC_DPIS) {
hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
fsm->a_srp_det = 1;
fsm->a_bus_drop = 0;
mutex_init(&ci->fsm.lock);
- ci->fsm_timer = devm_kzalloc(ci->dev,
- sizeof(struct ci_otg_fsm_timer_list), GFP_KERNEL);
- if (!ci->fsm_timer)
- return -ENOMEM;
-
- INIT_LIST_HEAD(&ci->fsm_timer->active_timers);
retval = ci_otg_init_timers(ci);
if (retval) {
dev_err(ci->dev, "Couldn't init OTG timers\n");
return retval;
}
+ ci->enabled_otg_timer_bits = 0;
+ ci->next_otg_timer = NUM_OTG_FSM_TIMERS;
retval = sysfs_create_group(&ci->dev->kobj, &inputs_attr_group);
if (retval < 0) {
/* SSEND time before SRP */
#define TB_SSEND_SRP (1500) /* minimum 1.5 sec, section:5.1.2 */
-#define TB_SESS_VLD (1000)
-
-enum ci_otg_fsm_timer_index {
- /*
- * CI specific timers, start from the end
- * of standard and auxiliary OTG timers
- */
- B_DATA_PLS = NUM_OTG_FSM_TIMERS,
- B_SSEND_SRP,
- B_SESS_VLD,
-
- NUM_CI_OTG_FSM_TIMERS,
-};
-
-struct ci_otg_fsm_timer {
- unsigned long expires; /* Number of count increase to timeout */
- unsigned long count; /* Tick counter */
- void (*function)(void *, unsigned long); /* Timeout function */
- unsigned long data; /* Data passed to function */
- struct list_head list;
-};
-
-struct ci_otg_fsm_timer_list {
- struct ci_otg_fsm_timer *timer_list[NUM_CI_OTG_FSM_TIMERS];
- struct list_head active_timers;
-};
-
#ifdef CONFIG_USB_OTG_FSM
int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci);
/* interrupt, error, port change, reset, sleep/suspend */
hw_write(ci, OP_USBINTR, ~0,
USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
- hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
} else {
hw_write(ci, OP_USBINTR, ~0, 0);
- hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
}
return 0;
}
kfree(pending);
}
+static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
+ struct td_node *node)
+{
+ hwep->qh.ptr->td.next = node->dma;
+ hwep->qh.ptr->td.token &=
+ cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
+
+ /* Synchronize before ep prime */
+ wmb();
+
+ return hw_ep_prime(ci, hwep->num, hwep->dir,
+ hwep->type == USB_ENDPOINT_XFER_CONTROL);
+}
+
/**
* _hardware_dequeue: handles a request at hardware level
* @gadget: gadget
struct td_node *node, *tmpnode;
unsigned remaining_length;
unsigned actual = hwreq->req.length;
+ struct ci_hdrc *ci = hwep->ci;
if (hwreq->req.status != -EALREADY)
return -EINVAL;
list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
tmptoken = le32_to_cpu(node->ptr->token);
if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
+ int n = hw_ep_bit(hwep->num, hwep->dir);
+
+ if (ci->rev == CI_REVISION_24)
+ if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
+ reprime_dtd(ci, hwep, node);
hwreq->req.status = -EALREADY;
return -EBUSY;
}
/* only internal SW should enable ctrl endpts */
- hwep->ep.desc = desc;
-
- if (!list_empty(&hwep->qh.queue))
+ if (!list_empty(&hwep->qh.queue)) {
dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
+ spin_unlock_irqrestore(hwep->lock, flags);
+ return -EBUSY;
+ }
+
+ hwep->ep.desc = desc;
hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
hwep->num = usb_endpoint_num(desc);
hw_device_reset(ci);
hw_device_state(ci, ci->ep0out->qh.dma);
usb_gadget_set_state(_gadget, USB_STATE_POWERED);
+ usb_udc_vbus_handler(_gadget, true);
} else {
+ usb_udc_vbus_handler(_gadget, false);
if (ci->driver)
ci->driver->disconnect(&ci->gadget);
hw_device_state(ci, 0);
{
struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
- if (!ci->vbus_active)
- return -EOPNOTSUPP;
+ /* Data+ pullup controlled by OTG state machine in OTG fsm mode */
+ if (ci_otg_is_fsm_mode(ci))
+ return 0;
+ pm_runtime_get_sync(&ci->gadget.dev);
if (is_on)
hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
else
hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
+ pm_runtime_put_sync(&ci->gadget.dev);
return 0;
}
spin_lock_irqsave(&ci->lock, flags);
hw_device_reset(ci);
} else {
+ usb_udc_vbus_handler(&ci->gadget, false);
pm_runtime_put_sync(&ci->gadget.dev);
return retval;
}
#include <linux/module.h>
#include <linux/of_platform.h>
-#include <linux/clk.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/delay.h>
#define MX53_USB_PLL_DIV_24_MHZ 0x01
#define MX6_BM_OVER_CUR_DIS BIT(7)
+#define MX6_BM_WAKEUP_ENABLE BIT(10)
+#define MX6_BM_ID_WAKEUP BIT(16)
+#define MX6_BM_VBUS_WAKEUP BIT(17)
+#define MX6SX_BM_DPDM_WAKEUP_EN BIT(29)
+#define MX6_BM_WAKEUP_INTR BIT(31)
+#define MX6_USB_OTG1_PHY_CTRL 0x18
+/* For imx6dql, it is host-only controller, for later imx6, it is otg's */
+#define MX6_USB_OTG2_PHY_CTRL 0x1c
+#define MX6SX_USB_VBUS_WAKEUP_SOURCE(v) (v << 8)
+#define MX6SX_USB_VBUS_WAKEUP_SOURCE_VBUS MX6SX_USB_VBUS_WAKEUP_SOURCE(0)
+#define MX6SX_USB_VBUS_WAKEUP_SOURCE_AVALID MX6SX_USB_VBUS_WAKEUP_SOURCE(1)
+#define MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID MX6SX_USB_VBUS_WAKEUP_SOURCE(2)
+#define MX6SX_USB_VBUS_WAKEUP_SOURCE_SESS_END MX6SX_USB_VBUS_WAKEUP_SOURCE(3)
#define VF610_OVER_CUR_DIS BIT(7)
int (*init)(struct imx_usbmisc_data *data);
/* It's called once after adding a usb device */
int (*post)(struct imx_usbmisc_data *data);
+ /* It's called when we need to enable/disable usb wakeup */
+ int (*set_wakeup)(struct imx_usbmisc_data *data, bool enabled);
};
struct imx_usbmisc {
void __iomem *base;
spinlock_t lock;
- struct clk *clk;
const struct usbmisc_ops *ops;
};
return 0;
}
+static int usbmisc_imx6q_set_wakeup
+ (struct imx_usbmisc_data *data, bool enabled)
+{
+ struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
+ unsigned long flags;
+ u32 val;
+ u32 wakeup_setting = (MX6_BM_WAKEUP_ENABLE |
+ MX6_BM_VBUS_WAKEUP | MX6_BM_ID_WAKEUP);
+ int ret = 0;
+
+ if (data->index > 3)
+ return -EINVAL;
+
+ spin_lock_irqsave(&usbmisc->lock, flags);
+ val = readl(usbmisc->base + data->index * 4);
+ if (enabled) {
+ val |= wakeup_setting;
+ writel(val, usbmisc->base + data->index * 4);
+ } else {
+ if (val & MX6_BM_WAKEUP_INTR)
+ pr_debug("wakeup int at ci_hdrc.%d\n", data->index);
+ val &= ~wakeup_setting;
+ writel(val, usbmisc->base + data->index * 4);
+ }
+ spin_unlock_irqrestore(&usbmisc->lock, flags);
+
+ return ret;
+}
+
static int usbmisc_imx6q_init(struct imx_usbmisc_data *data)
{
struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
spin_unlock_irqrestore(&usbmisc->lock, flags);
}
+ usbmisc_imx6q_set_wakeup(data, false);
+
+ return 0;
+}
+
+static int usbmisc_imx6sx_init(struct imx_usbmisc_data *data)
+{
+ void __iomem *reg = NULL;
+ unsigned long flags;
+ struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
+ u32 val;
+
+ usbmisc_imx6q_init(data);
+
+ if (data->index == 0 || data->index == 1) {
+ reg = usbmisc->base + MX6_USB_OTG1_PHY_CTRL + data->index * 4;
+ spin_lock_irqsave(&usbmisc->lock, flags);
+ /* Set vbus wakeup source as bvalid */
+ val = readl(reg);
+ writel(val | MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID, reg);
+ /*
+ * Disable dp/dm wakeup in device mode when vbus is
+ * not there.
+ */
+ val = readl(usbmisc->base + data->index * 4);
+ writel(val & ~MX6SX_BM_DPDM_WAKEUP_EN,
+ usbmisc->base + data->index * 4);
+ spin_unlock_irqrestore(&usbmisc->lock, flags);
+ }
+
return 0;
}
};
static const struct usbmisc_ops imx6q_usbmisc_ops = {
+ .set_wakeup = usbmisc_imx6q_set_wakeup,
.init = usbmisc_imx6q_init,
};
.init = usbmisc_vf610_init,
};
+static const struct usbmisc_ops imx6sx_usbmisc_ops = {
+ .set_wakeup = usbmisc_imx6q_set_wakeup,
+ .init = usbmisc_imx6sx_init,
+};
+
int imx_usbmisc_init(struct imx_usbmisc_data *data)
{
- struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
+ struct imx_usbmisc *usbmisc;
+
+ if (!data)
+ return 0;
+ usbmisc = dev_get_drvdata(data->dev);
if (!usbmisc->ops->init)
return 0;
return usbmisc->ops->init(data);
int imx_usbmisc_init_post(struct imx_usbmisc_data *data)
{
- struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
+ struct imx_usbmisc *usbmisc;
+ if (!data)
+ return 0;
+
+ usbmisc = dev_get_drvdata(data->dev);
if (!usbmisc->ops->post)
return 0;
return usbmisc->ops->post(data);
}
EXPORT_SYMBOL_GPL(imx_usbmisc_init_post);
+int imx_usbmisc_set_wakeup(struct imx_usbmisc_data *data, bool enabled)
+{
+ struct imx_usbmisc *usbmisc;
+
+ if (!data)
+ return 0;
+
+ usbmisc = dev_get_drvdata(data->dev);
+ if (!usbmisc->ops->set_wakeup)
+ return 0;
+ return usbmisc->ops->set_wakeup(data, enabled);
+}
+EXPORT_SYMBOL_GPL(imx_usbmisc_set_wakeup);
+
static const struct of_device_id usbmisc_imx_dt_ids[] = {
{
.compatible = "fsl,imx25-usbmisc",
.compatible = "fsl,vf610-usbmisc",
.data = &vf610_usbmisc_ops,
},
+ {
+ .compatible = "fsl,imx6sx-usbmisc",
+ .data = &imx6sx_usbmisc_ops,
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, usbmisc_imx_dt_ids);
{
struct resource *res;
struct imx_usbmisc *data;
- int ret;
struct of_device_id *tmp_dev;
data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
if (IS_ERR(data->base))
return PTR_ERR(data->base);
- data->clk = devm_clk_get(&pdev->dev, NULL);
- if (IS_ERR(data->clk)) {
- dev_err(&pdev->dev,
- "failed to get clock, err=%ld\n", PTR_ERR(data->clk));
- return PTR_ERR(data->clk);
- }
-
- ret = clk_prepare_enable(data->clk);
- if (ret) {
- dev_err(&pdev->dev,
- "clk_prepare_enable failed, err=%d\n", ret);
- return ret;
- }
-
tmp_dev = (struct of_device_id *)
of_match_device(usbmisc_imx_dt_ids, &pdev->dev);
data->ops = (const struct usbmisc_ops *)tmp_dev->data;
static int usbmisc_imx_remove(struct platform_device *pdev)
{
- struct imx_usbmisc *usbmisc = dev_get_drvdata(&pdev->dev);
- clk_disable_unprepare(usbmisc->clk);
return 0;
}
}
exit:
retval = usb_submit_urb(urb, GFP_ATOMIC);
- if (retval)
+ if (retval && retval != -EPERM)
dev_err(&acm->control->dev, "%s - usb_submit_urb failed: %d\n",
__func__, retval);
}
struct acm_rb *rb = urb->context;
struct acm *acm = rb->instance;
unsigned long flags;
+ int status = urb->status;
dev_vdbg(&acm->data->dev, "%s - urb %d, len %d\n", __func__,
rb->index, urb->actual_length);
- set_bit(rb->index, &acm->read_urbs_free);
if (!acm->dev) {
+ set_bit(rb->index, &acm->read_urbs_free);
dev_dbg(&acm->data->dev, "%s - disconnected\n", __func__);
return;
}
- if (urb->status) {
+ if (status) {
+ set_bit(rb->index, &acm->read_urbs_free);
dev_dbg(&acm->data->dev, "%s - non-zero urb status: %d\n",
- __func__, urb->status);
+ __func__, status);
return;
}
usb_mark_last_busy(acm->dev);
acm_process_read_urb(acm, urb);
+ /*
+ * Unthrottle may run on another CPU which needs to see events
+ * in the same order. Submission has an implict barrier
+ */
+ smp_mb__before_atomic();
+ set_bit(rb->index, &acm->read_urbs_free);
/* throttle device if requested by tty */
spin_lock_irqsave(&acm->read_lock, flags);
struct acm_wb *wb = urb->context;
struct acm *acm = wb->instance;
unsigned long flags;
+ int status = urb->status;
- if (urb->status || (urb->actual_length != urb->transfer_buffer_length))
+ if (status || (urb->actual_length != urb->transfer_buffer_length))
dev_vdbg(&acm->data->dev, "%s - len %d/%d, status %d\n",
__func__,
urb->actual_length,
urb->transfer_buffer_length,
- urb->status);
+ status);
spin_lock_irqsave(&acm->write_lock, flags);
acm_write_done(acm, wb);
case USB_CDC_NOTIFY_RESPONSE_AVAILABLE:
dev_dbg(&desc->intf->dev,
"NOTIFY_RESPONSE_AVAILABLE received: index %d len %d",
- dr->wIndex, dr->wLength);
+ le16_to_cpu(dr->wIndex), le16_to_cpu(dr->wLength));
break;
case USB_CDC_NOTIFY_NETWORK_CONNECTION:
clear_bit(WDM_POLL_RUNNING, &desc->flags);
dev_err(&desc->intf->dev,
"unknown notification %d received: index %d len %d\n",
- dr->bNotificationType, dr->wIndex, dr->wLength);
+ dr->bNotificationType,
+ le16_to_cpu(dr->wIndex),
+ le16_to_cpu(dr->wLength));
goto exit;
}
desc->werr = 0;
spin_unlock_irq(&desc->iuspin);
if (we < 0)
- return -EIO;
+ return usb_translate_errors(we);
buf = kmalloc(count, GFP_KERNEL);
if (!buf) {
r = copy_from_user(buf, buffer, count);
if (r > 0) {
- kfree(buf);
rv = -EFAULT;
- goto outnl;
+ goto out_free_mem;
}
/* concurrent writes and disconnect */
r = mutex_lock_interruptible(&desc->wlock);
rv = -ERESTARTSYS;
- if (r) {
- kfree(buf);
- goto outnl;
- }
+ if (r)
+ goto out_free_mem;
if (test_bit(WDM_DISCONNECTING, &desc->flags)) {
- kfree(buf);
rv = -ENODEV;
- goto outnp;
+ goto out_free_mem_lock;
}
r = usb_autopm_get_interface(desc->intf);
if (r < 0) {
- kfree(buf);
rv = usb_translate_errors(r);
- goto outnp;
+ goto out_free_mem_lock;
}
if (!(file->f_flags & O_NONBLOCK))
r = -EIO;
if (r < 0) {
- kfree(buf);
rv = r;
- goto out;
+ goto out_free_mem_pm;
}
req = desc->orq;
USB_RECIP_INTERFACE);
req->bRequest = USB_CDC_SEND_ENCAPSULATED_COMMAND;
req->wValue = 0;
- req->wIndex = desc->inum;
+ req->wIndex = desc->inum; /* already converted */
req->wLength = cpu_to_le16(count);
set_bit(WDM_IN_USE, &desc->flags);
desc->outbuf = buf;
rv = usb_submit_urb(desc->command, GFP_KERNEL);
if (rv < 0) {
- kfree(buf);
desc->outbuf = NULL;
clear_bit(WDM_IN_USE, &desc->flags);
dev_err(&desc->intf->dev, "Tx URB error: %d\n", rv);
rv = usb_translate_errors(rv);
+ goto out_free_mem_pm;
} else {
dev_dbg(&desc->intf->dev, "Tx URB has been submitted index=%d",
- req->wIndex);
+ le16_to_cpu(req->wIndex));
}
-out:
+
usb_autopm_put_interface(desc->intf);
-outnp:
mutex_unlock(&desc->wlock);
outnl:
return rv < 0 ? rv : count;
+
+out_free_mem_pm:
+ usb_autopm_put_interface(desc->intf);
+out_free_mem_lock:
+ mutex_unlock(&desc->wlock);
+out_free_mem:
+ kfree(buf);
+ return rv;
}
/*
spin_lock_irq(&desc->iuspin);
if (desc->rerr) { /* read completed, error happened */
+ rv = usb_translate_errors(desc->rerr);
desc->rerr = 0;
spin_unlock_irq(&desc->iuspin);
- rv = -EIO;
goto err;
}
/*
desc->irq->bRequestType = (USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE);
desc->irq->bRequest = USB_CDC_GET_ENCAPSULATED_RESPONSE;
desc->irq->wValue = 0;
- desc->irq->wIndex = desc->inum;
+ desc->irq->wIndex = desc->inum; /* already converted */
desc->irq->wLength = cpu_to_le16(desc->wMaxCommand);
usb_fill_control_urb(
}
static struct notifier_block usbdev_nb = {
- .notifier_call = usbdev_notify,
+ .notifier_call = usbdev_notify,
};
static struct cdev usb_device_cdev;
if (status) {
dev_dbg(&port_dev->dev, "can't resume, status %d\n", status);
} else {
- /* drive resume for at least 20 msec */
+ /* drive resume for USB_RESUME_TIMEOUT msec */
dev_dbg(&udev->dev, "usb %sresume\n",
(PMSG_IS_AUTO(msg) ? "auto-" : ""));
- msleep(25);
+ msleep(USB_RESUME_TIMEOUT);
/* Virtual root hubs can trigger on GET_PORT_STATUS to
* stop resume signaling. Then finish the resume
static bool nousb; /* Disable USB when built into kernel image */
+/* To disable USB, kernel command line is 'nousb' not 'usbcore.nousb' */
+#ifdef MODULE
+module_param(nousb, bool, 0444);
+#else
+core_param(nousb, nousb, bool, 0444);
+#endif
+
+/*
+ * for external read access to <nousb>
+ */
+int usb_disabled(void)
+{
+ return nousb;
+}
+EXPORT_SYMBOL_GPL(usb_disabled);
+
#ifdef CONFIG_PM
static int usb_autosuspend_delay = 2; /* Default delay value,
* in seconds */
EXPORT_SYMBOL_GPL(usb_buffer_unmap_sg);
#endif
-/* To disable USB, kernel command line is 'nousb' not 'usbcore.nousb' */
-#ifdef MODULE
-module_param(nousb, bool, 0444);
-#else
-core_param(nousb, nousb, bool, 0444);
-#endif
-
-/*
- * for external read access to <nousb>
- */
-int usb_disabled(void)
-{
- return nousb;
-}
-EXPORT_SYMBOL_GPL(usb_disabled);
-
/*
* Notifications of device and interface registration
*/
static int __init usb_init(void)
{
int retval;
- if (nousb) {
+ if (usb_disabled()) {
pr_info("%s: USB support disabled\n", usbcore_name);
return 0;
}
static void __exit usb_exit(void)
{
/* This will matter if shutdown/reboot does exitcalls. */
- if (nousb)
+ if (usb_disabled())
return;
usb_deregister_device_driver(&usb_generic_driver);
config USB_DWC2_PCI
tristate "DWC2 PCI"
- depends on USB_DWC2_HOST && PCI
- default USB_DWC2_HOST
+ depends on PCI
+ default n
+ select USB_DWC2_PLATFORM
+ select NOP_USB_XCEIV
help
The Designware USB2.0 PCI interface module for controllers
- connected to a PCI bus. This is only used for host mode.
+ connected to a PCI bus.
config USB_DWC2_DEBUG
bool "Enable Debugging Messages"
# mode. The PCI bus interface module will called dwc2_pci.ko and the platform
# interface module will be called dwc2_platform.ko.
-ifneq ($(CONFIG_USB_DWC2_PCI),)
- obj-$(CONFIG_USB_DWC2) += dwc2_pci.o
- dwc2_pci-y := pci.o
-endif
+obj-$(CONFIG_USB_DWC2_PCI) += dwc2_pci.o
+dwc2_pci-y := pci.o
obj-$(CONFIG_USB_DWC2_PLATFORM) += dwc2_platform.o
dwc2_platform-y := platform.o
struct dwc2_core_params *core_params;
enum usb_otg_state op_state;
enum usb_dr_mode dr_mode;
+ unsigned int hcd_enabled:1;
+ unsigned int gadget_enabled:1;
struct phy *phy;
struct usb_phy *uphy;
*/
channel->qh = NULL;
}
+ /* All channels have been freed, mark them available */
+ if (hsotg->core_params->uframe_sched > 0) {
+ hsotg->available_host_channels =
+ hsotg->core_params->host_channels;
+ } else {
+ hsotg->non_periodic_channels = 0;
+ hsotg->periodic_channels = 0;
+ }
}
/**
hprt0 |= HPRT0_RES;
writel(hprt0, hsotg->regs + HPRT0);
hprt0 &= ~HPRT0_SUSP;
- usleep_range(100000, 150000);
+ msleep(USB_RESUME_TIMEOUT);
hprt0 &= ~HPRT0_RES;
writel(hprt0, hsotg->regs + HPRT0);
dev_dbg(hsotg->dev, "GetHubDescriptor\n");
hub_desc = (struct usb_hub_descriptor *)buf;
hub_desc->bDescLength = 9;
- hub_desc->bDescriptorType = 0x29;
+ hub_desc->bDescriptorType = USB_DT_HUB;
hub_desc->bNbrPorts = 1;
hub_desc->wHubCharacteristics =
cpu_to_le16(HUB_CHAR_COMMON_LPSM |
#include <linux/usb/hcd.h>
#include <linux/usb/ch11.h>
+#include <linux/platform_device.h>
+#include <linux/usb/usb_phy_generic.h>
-#include "core.h"
-#include "hcd.h"
-
-#define PCI_VENDOR_ID_SYNOPSYS 0x16c3
#define PCI_PRODUCT_ID_HAPS_HSOTG 0xabc0
-static const char dwc2_driver_name[] = "dwc2";
-
-static const struct dwc2_core_params dwc2_module_params = {
- .otg_cap = -1,
- .otg_ver = -1,
- .dma_enable = -1,
- .dma_desc_enable = 0,
- .speed = -1,
- .enable_dynamic_fifo = -1,
- .en_multiple_tx_fifo = -1,
- .host_rx_fifo_size = 1024,
- .host_nperio_tx_fifo_size = 256,
- .host_perio_tx_fifo_size = 1024,
- .max_transfer_size = 65535,
- .max_packet_count = 511,
- .host_channels = -1,
- .phy_type = -1,
- .phy_utmi_width = -1,
- .phy_ulpi_ddr = -1,
- .phy_ulpi_ext_vbus = -1,
- .i2c_enable = -1,
- .ulpi_fs_ls = -1,
- .host_support_fs_ls_low_power = -1,
- .host_ls_low_power_phy_clk = -1,
- .ts_dline = -1,
- .reload_ctl = -1,
- .ahbcfg = -1,
- .uframe_sched = -1,
+static const char dwc2_driver_name[] = "dwc2-pci";
+
+struct dwc2_pci_glue {
+ struct platform_device *dwc2;
+ struct platform_device *phy;
};
-/**
- * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
- * DWC_otg driver
- *
- * @dev: Bus device
- *
- * This routine is called, for example, when the rmmod command is executed. The
- * device may or may not be electrically present. If it is present, the driver
- * stops device processing. Any resources used on behalf of this device are
- * freed.
- */
-static void dwc2_driver_remove(struct pci_dev *dev)
+static void dwc2_pci_remove(struct pci_dev *pci)
{
- struct dwc2_hsotg *hsotg = pci_get_drvdata(dev);
+ struct dwc2_pci_glue *glue = pci_get_drvdata(pci);
- dwc2_hcd_remove(hsotg);
- pci_disable_device(dev);
+ platform_device_unregister(glue->dwc2);
+ usb_phy_generic_unregister(glue->phy);
+ kfree(glue);
+ pci_set_drvdata(pci, NULL);
}
-/**
- * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
- * driver
- *
- * @dev: Bus device
- *
- * This routine creates the driver components required to control the device
- * (core, HCD, and PCD) and initializes the device. The driver components are
- * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
- * in the device private data. This allows the driver to access the dwc2_hsotg
- * structure on subsequent calls to driver methods for this device.
- */
-static int dwc2_driver_probe(struct pci_dev *dev,
- const struct pci_device_id *id)
+static int dwc2_pci_probe(struct pci_dev *pci,
+ const struct pci_device_id *id)
{
- struct dwc2_hsotg *hsotg;
- int retval;
+ struct resource res[2];
+ struct platform_device *dwc2;
+ struct platform_device *phy;
+ int ret;
+ struct device *dev = &pci->dev;
+ struct dwc2_pci_glue *glue;
+
+ ret = pcim_enable_device(pci);
+ if (ret) {
+ dev_err(dev, "failed to enable pci device\n");
+ return -ENODEV;
+ }
+
+ pci_set_master(pci);
- hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
- if (!hsotg)
+ dwc2 = platform_device_alloc("dwc2", PLATFORM_DEVID_AUTO);
+ if (!dwc2) {
+ dev_err(dev, "couldn't allocate dwc2 device\n");
return -ENOMEM;
+ }
- hsotg->dev = &dev->dev;
- hsotg->regs = devm_ioremap_resource(&dev->dev, &dev->resource[0]);
- if (IS_ERR(hsotg->regs))
- return PTR_ERR(hsotg->regs);
+ memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
- dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
- (unsigned long)pci_resource_start(dev, 0), hsotg->regs);
+ res[0].start = pci_resource_start(pci, 0);
+ res[0].end = pci_resource_end(pci, 0);
+ res[0].name = "dwc2";
+ res[0].flags = IORESOURCE_MEM;
- if (pci_enable_device(dev) < 0)
- return -ENODEV;
+ res[1].start = pci->irq;
+ res[1].name = "dwc2";
+ res[1].flags = IORESOURCE_IRQ;
- pci_set_master(dev);
+ ret = platform_device_add_resources(dwc2, res, ARRAY_SIZE(res));
+ if (ret) {
+ dev_err(dev, "couldn't add resources to dwc2 device\n");
+ return ret;
+ }
- retval = devm_request_irq(hsotg->dev, dev->irq,
- dwc2_handle_common_intr, IRQF_SHARED,
- dev_name(hsotg->dev), hsotg);
- if (retval)
- return retval;
+ dwc2->dev.parent = dev;
- spin_lock_init(&hsotg->lock);
- retval = dwc2_hcd_init(hsotg, dev->irq, &dwc2_module_params);
- if (retval) {
- pci_disable_device(dev);
- return retval;
+ phy = usb_phy_generic_register();
+ if (IS_ERR(phy)) {
+ dev_err(dev, "error registering generic PHY (%ld)\n",
+ PTR_ERR(phy));
+ return PTR_ERR(phy);
}
- pci_set_drvdata(dev, hsotg);
+ ret = platform_device_add(dwc2);
+ if (ret) {
+ dev_err(dev, "failed to register dwc2 device\n");
+ goto err;
+ }
+
+ glue = kzalloc(sizeof(*glue), GFP_KERNEL);
+ if (!glue)
+ return -ENOMEM;
+
+ glue->phy = phy;
+ glue->dwc2 = dwc2;
+ pci_set_drvdata(pci, glue);
- return retval;
+ return 0;
+err:
+ usb_phy_generic_unregister(phy);
+ platform_device_put(dwc2);
+ return ret;
}
static const struct pci_device_id dwc2_pci_ids[] = {
static struct pci_driver dwc2_pci_driver = {
.name = dwc2_driver_name,
.id_table = dwc2_pci_ids,
- .probe = dwc2_driver_probe,
- .remove = dwc2_driver_remove,
+ .probe = dwc2_pci_probe,
+ .remove = dwc2_pci_remove,
};
module_pci_driver(dwc2_pci_driver);
{
struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
- dwc2_hcd_remove(hsotg);
- s3c_hsotg_remove(hsotg);
+ if (hsotg->hcd_enabled)
+ dwc2_hcd_remove(hsotg);
+ if (hsotg->gadget_enabled)
+ s3c_hsotg_remove(hsotg);
return 0;
}
spin_lock_init(&hsotg->lock);
mutex_init(&hsotg->init_mutex);
- retval = dwc2_gadget_init(hsotg, irq);
- if (retval)
- return retval;
- retval = dwc2_hcd_init(hsotg, irq, params);
- if (retval)
- return retval;
+
+ if (hsotg->dr_mode != USB_DR_MODE_HOST) {
+ retval = dwc2_gadget_init(hsotg, irq);
+ if (retval)
+ return retval;
+ hsotg->gadget_enabled = 1;
+ }
+
+ if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
+ retval = dwc2_hcd_init(hsotg, irq, params);
+ if (retval) {
+ if (hsotg->gadget_enabled)
+ s3c_hsotg_remove(hsotg);
+ return retval;
+ }
+ hsotg->hcd_enabled = 1;
+ }
platform_set_drvdata(dev, hsotg);
help
Say Y here to enable debugging messages on DWC3 Driver.
-config DWC3_HOST_USB3_LPM_ENABLE
- bool "Enable USB3 LPM Capability"
- depends on USB_DWC3_HOST=y || USB_DWC3_DUAL_ROLE=y
- default n
- help
- Select this when you want to enable USB3 LPM with dwc3 xhci host.
-
endif
* since it will be requested by the xhci-plat driver.
*/
regs = devm_ioremap_resource(dev, res);
- if (IS_ERR(regs))
- return PTR_ERR(regs);
+ if (IS_ERR(regs)) {
+ ret = PTR_ERR(regs);
+ goto err0;
+ }
dwc->regs = regs;
dwc->regs_size = resource_size(res);
- /*
- * restore res->start back to its original value so that,
- * in case the probe is deferred, we don't end up getting error in
- * request the memory region the next time probe is called.
- */
- res->start -= DWC3_GLOBALS_REGS_START;
/* default to highest possible threshold */
lpm_nyet_threshold = 0xff;
"snps,is-utmi-l1-suspend");
of_property_read_u8(node, "snps,hird-threshold",
&hird_threshold);
+ dwc->usb3_lpm_capable = of_property_read_bool(node,
+ "snps,usb3_lpm_capable");
dwc->needs_fifo_resize = of_property_read_bool(node,
"tx-fifo-resize");
hird_threshold = pdata->hird_threshold;
dwc->needs_fifo_resize = pdata->tx_fifo_resize;
+ dwc->usb3_lpm_capable = pdata->usb3_lpm_capable;
dwc->dr_mode = pdata->dr_mode;
dwc->disable_scramble_quirk = pdata->disable_scramble_quirk;
ret = dwc3_core_get_phy(dwc);
if (ret)
- return ret;
+ goto err0;
spin_lock_init(&dwc->lock);
platform_set_drvdata(pdev, dwc);
if (ret) {
dev_err(dwc->dev, "failed to allocate event buffers\n");
ret = -ENOMEM;
- goto err0;
+ goto err1;
}
if (IS_ENABLED(CONFIG_USB_DWC3_HOST))
ret = dwc3_core_init(dwc);
if (ret) {
dev_err(dev, "failed to initialize core\n");
- goto err0;
+ goto err1;
}
usb_phy_set_suspend(dwc->usb2_phy, 0);
usb_phy_set_suspend(dwc->usb3_phy, 0);
ret = phy_power_on(dwc->usb2_generic_phy);
if (ret < 0)
- goto err1;
+ goto err2;
ret = phy_power_on(dwc->usb3_generic_phy);
if (ret < 0)
- goto err_usb2phy_power;
+ goto err3;
ret = dwc3_event_buffers_setup(dwc);
if (ret) {
dev_err(dwc->dev, "failed to setup event buffers\n");
- goto err_usb3phy_power;
+ goto err4;
}
ret = dwc3_core_init_mode(dwc);
if (ret)
- goto err2;
+ goto err5;
ret = dwc3_debugfs_init(dwc);
if (ret) {
dev_err(dev, "failed to initialize debugfs\n");
- goto err3;
+ goto err6;
}
pm_runtime_allow(dev);
return 0;
-err3:
+err6:
dwc3_core_exit_mode(dwc);
-err2:
+err5:
dwc3_event_buffers_cleanup(dwc);
-err_usb3phy_power:
+err4:
phy_power_off(dwc->usb3_generic_phy);
-err_usb2phy_power:
+err3:
phy_power_off(dwc->usb2_generic_phy);
-err1:
+err2:
usb_phy_set_suspend(dwc->usb2_phy, 1);
usb_phy_set_suspend(dwc->usb3_phy, 1);
dwc3_core_exit(dwc);
-err0:
+err1:
dwc3_free_event_buffers(dwc);
+err0:
+ /*
+ * restore res->start back to its original value so that, in case the
+ * probe is deferred, we don't end up getting error in request the
+ * memory region the next time probe is called.
+ */
+ res->start -= DWC3_GLOBALS_REGS_START;
+
return ret;
}
static int dwc3_remove(struct platform_device *pdev)
{
struct dwc3 *dwc = platform_get_drvdata(pdev);
+ struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+
+ /*
+ * restore res->start back to its original value so that, in case the
+ * probe is deferred, we don't end up getting error in request the
+ * memory region the next time probe is called.
+ */
+ res->start -= DWC3_GLOBALS_REGS_START;
dwc3_debugfs_exit(dwc);
dwc3_core_exit_mode(dwc);
* @setup_packet_pending: true when there's a Setup Packet in FIFO. Workaround
* @start_config_issued: true when StartConfig command has been issued
* @three_stage_setup: set if we perform a three phase setup
+ * @usb3_lpm_capable: set if hadrware supports Link Power Management
* @disable_scramble_quirk: set if we enable the disable scramble quirk
* @u2exit_lfps_quirk: set if we enable u2exit lfps quirk
* @u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
unsigned setup_packet_pending:1;
unsigned start_config_issued:1;
unsigned three_stage_setup:1;
+ unsigned usb3_lpm_capable:1;
unsigned disable_scramble_quirk:1;
unsigned u2exit_lfps_quirk:1;
return IRQ_HANDLED;
}
-static int dwc3_omap_remove_core(struct device *dev, void *c)
-{
- struct platform_device *pdev = to_platform_device(dev);
-
- of_device_unregister(pdev);
-
- return 0;
-}
-
static void dwc3_omap_enable_irqs(struct dwc3_omap *omap)
{
u32 reg;
if (omap->extcon_id_dev.edev)
extcon_unregister_interest(&omap->extcon_id_dev);
dwc3_omap_disable_irqs(omap);
- device_for_each_child(&pdev->dev, NULL, dwc3_omap_remove_core);
+ of_platform_depopulate(omap->dev);
pm_runtime_put_sync(&pdev->dev);
pm_runtime_disable(&pdev->dev);
#include "platform_data.h"
-/* FIXME define these in <linux/pci_ids.h> */
-#define PCI_VENDOR_ID_SYNOPSYS 0x16c3
#define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd
#define PCI_DEVICE_ID_INTEL_BYT 0x0f37
#define PCI_DEVICE_ID_INTEL_MRFLD 0x119e
unsigned int i;
int ret;
+ req = next_request(&dep->req_queued);
+ if (!req) {
+ WARN_ON_ONCE(1);
+ return 1;
+ }
+ i = 0;
do {
- req = next_request(&dep->req_queued);
- if (!req) {
- WARN_ON_ONCE(1);
- return 1;
- }
- i = 0;
- do {
- slot = req->start_slot + i;
- if ((slot == DWC3_TRB_NUM - 1) &&
+ slot = req->start_slot + i;
+ if ((slot == DWC3_TRB_NUM - 1) &&
usb_endpoint_xfer_isoc(dep->endpoint.desc))
- slot++;
- slot %= DWC3_TRB_NUM;
- trb = &dep->trb_pool[slot];
-
- ret = __dwc3_cleanup_done_trbs(dwc, dep, req, trb,
- event, status);
- if (ret)
- break;
- }while (++i < req->request.num_mapped_sgs);
-
- dwc3_gadget_giveback(dep, req, status);
+ slot++;
+ slot %= DWC3_TRB_NUM;
+ trb = &dep->trb_pool[slot];
+ ret = __dwc3_cleanup_done_trbs(dwc, dep, req, trb,
+ event, status);
if (ret)
break;
- } while (1);
+ } while (++i < req->request.num_mapped_sgs);
+
+ dwc3_gadget_giveback(dep, req, status);
if (usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
list_empty(&dep->req_queued)) {
memset(&pdata, 0, sizeof(pdata));
-#ifdef CONFIG_DWC3_HOST_USB3_LPM_ENABLE
- pdata.usb3_lpm_capable = 1;
-#endif
+ pdata.usb3_lpm_capable = dwc->usb3_lpm_capable;
ret = platform_device_add_data(xhci, &pdata, sizeof(pdata));
if (ret) {
enum usb_device_speed maximum_speed;
enum usb_dr_mode dr_mode;
bool tx_fifo_resize;
+ bool usb3_lpm_capable;
unsigned is_utmi_l1_suspend:1;
u8 hird_threshold;
config USB_F_HID
tristate
+config USB_F_PRINTER
+ tristate
+
choice
tristate "USB Gadget Drivers"
default USB_ETH
device. It provides a userspace API to process UVC control requests
and stream video data to the host.
+config USB_CONFIGFS_F_PRINTER
+ bool "Printer function"
+ select USB_F_PRINTER
+ depends on USB_CONFIGFS
+ help
+ The Printer function channels data between the USB host and a
+ userspace program driving the print engine. The user space
+ program reads and writes the device file /dev/g_printer<X> to
+ receive or send printer data. It can use ioctl calls to
+ the device file to get or set printer status.
+
+ For more information, see Documentation/usb/gadget_printer.txt
+ which includes sample code for accessing the device file.
+
source "drivers/usb/gadget/legacy/Kconfig"
endchoice
* This function will create a deep copy of usb_gadget_strings and usb_string
* and attach it to the cdev. The actual string (usb_string.s) will not be
* copied but only a referenced will be made. The struct usb_gadget_strings
- * array may contain multiple languges and should be NULL terminated.
+ * array may contain multiple languages and should be NULL terminated.
* The ->language pointer of each struct usb_gadget_strings has to contain the
* same amount of entries.
* For instance: sp[0] is en-US, sp[1] is es-ES. It is expected that the first
- * usb_string entry of es-ES containts the translation of the first usb_string
+ * usb_string entry of es-ES contains the translation of the first usb_string
* entry of en-US. Therefore both entries become the same id assign.
*/
struct usb_string *usb_gstrings_attach(struct usb_composite_dev *cdev,
req->length = 0;
gadget->ep0->driver_data = cdev;
+ /*
+ * Don't let non-standard requests match any of the cases below
+ * by accident.
+ */
+ if ((ctrl->bRequestType & USB_TYPE_MASK) != USB_TYPE_STANDARD)
+ goto unknown;
+
switch (ctrl->bRequest) {
/* we handle all standard USB descriptors */
* take such requests too, if that's ever needed: to work
* in config 0, etc.
*/
+ list_for_each_entry(f, &cdev->config->functions, list)
+ if (f->req_match && f->req_match(f, ctrl))
+ goto try_fun_setup;
+ f = NULL;
switch (ctrl->bRequestType & USB_RECIP_MASK) {
case USB_RECIP_INTERFACE:
if (!cdev->config || intf >= MAX_CONFIG_INTERFACES)
f = NULL;
break;
}
-
+try_fun_setup:
if (f && f->setup)
value = f->setup(f, ctrl);
else {
obj-$(CONFIG_USB_F_MIDI) += usb_f_midi.o
usb_f_hid-y := f_hid.o
obj-$(CONFIG_USB_F_HID) += usb_f_hid.o
+usb_f_printer-y := f_printer.o
+obj-$(CONFIG_USB_F_PRINTER) += usb_f_printer.o
#include <linux/export.h>
#include <linux/hid.h>
#include <linux/module.h>
+#include <linux/uio.h>
#include <asm/unaligned.h>
#include <linux/usb/composite.h>
unuse_mm(io_data->mm);
}
- aio_complete(io_data->kiocb, ret, ret);
+ io_data->kiocb->ki_complete(io_data->kiocb, ret, ret);
- if (io_data->ffs->ffs_eventfd && !io_data->kiocb->ki_eventfd)
+ if (io_data->ffs->ffs_eventfd &&
+ !(io_data->kiocb->ki_flags & IOCB_EVENTFD))
eventfd_signal(io_data->ffs->ffs_eventfd, 1);
usb_ep_free_request(io_data->ep, io_data->req);
/* disable/free request and end point */
usb_ep_disable(hidg->in_ep);
- usb_ep_dequeue(hidg->in_ep, hidg->req);
kfree(hidg->req->buf);
usb_ep_free_request(hidg->in_ep, hidg->req);
if (!curlun) { /* Unsupported LUNs are okay */
common->bad_lun_okay = 1;
memset(buf, 0, 36);
- buf[0] = 0x7f; /* Unsupported, no device-type */
+ buf[0] = TYPE_NO_LUN; /* Unsupported, no device-type */
buf[4] = 31; /* Additional length */
return 36;
}
return fsg_store_file(curlun, filesem, buf, count);
}
-static DEVICE_ATTR_RW(ro);
static DEVICE_ATTR_RW(nofua);
-static DEVICE_ATTR_RW(file);
-
-static struct device_attribute dev_attr_ro_cdrom = __ATTR_RO(ro);
-static struct device_attribute dev_attr_file_nonremovable = __ATTR_RO(file);
-
+/* mode wil be set in fsg_lun_attr_is_visible() */
+static DEVICE_ATTR(ro, 0, ro_show, ro_store);
+static DEVICE_ATTR(file, 0, file_show, file_store);
/****************************** FSG COMMON ******************************/
}
EXPORT_SYMBOL_GPL(fsg_common_set_num_buffers);
-static inline void fsg_common_remove_sysfs(struct fsg_lun *lun)
-{
- device_remove_file(&lun->dev, &dev_attr_nofua);
- /*
- * device_remove_file() =>
- *
- * here the attr (e.g. dev_attr_ro) is only used to be passed to:
- *
- * sysfs_remove_file() =>
- *
- * here e.g. both dev_attr_ro_cdrom and dev_attr_ro are in
- * the same namespace and
- * from here only attr->name is passed to:
- *
- * sysfs_hash_and_remove()
- *
- * attr->name is the same for dev_attr_ro_cdrom and
- * dev_attr_ro
- * attr->name is the same for dev_attr_file and
- * dev_attr_file_nonremovable
- *
- * so we don't differentiate between removing e.g. dev_attr_ro_cdrom
- * and dev_attr_ro
- */
- device_remove_file(&lun->dev, &dev_attr_ro);
- device_remove_file(&lun->dev, &dev_attr_file);
-}
-
void fsg_common_remove_lun(struct fsg_lun *lun, bool sysfs)
{
- if (sysfs) {
- fsg_common_remove_sysfs(lun);
+ if (sysfs)
device_unregister(&lun->dev);
- }
fsg_lun_close(lun);
kfree(lun);
}
}
EXPORT_SYMBOL_GPL(fsg_common_set_cdev);
-static inline int fsg_common_add_sysfs(struct fsg_common *common,
- struct fsg_lun *lun)
-{
- int rc;
+static struct attribute *fsg_lun_dev_attrs[] = {
+ &dev_attr_ro.attr,
+ &dev_attr_file.attr,
+ &dev_attr_nofua.attr,
+ NULL
+};
- rc = device_register(&lun->dev);
- if (rc) {
- put_device(&lun->dev);
- return rc;
- }
+static umode_t fsg_lun_dev_is_visible(struct kobject *kobj,
+ struct attribute *attr, int idx)
+{
+ struct device *dev = kobj_to_dev(kobj);
+ struct fsg_lun *lun = fsg_lun_from_dev(dev);
- rc = device_create_file(&lun->dev,
- lun->cdrom
- ? &dev_attr_ro_cdrom
- : &dev_attr_ro);
- if (rc)
- goto error;
- rc = device_create_file(&lun->dev,
- lun->removable
- ? &dev_attr_file
- : &dev_attr_file_nonremovable);
- if (rc)
- goto error;
- rc = device_create_file(&lun->dev, &dev_attr_nofua);
- if (rc)
- goto error;
+ if (attr == &dev_attr_ro.attr)
+ return lun->cdrom ? S_IRUGO : (S_IWUSR | S_IRUGO);
+ if (attr == &dev_attr_file.attr)
+ return lun->removable ? (S_IWUSR | S_IRUGO) : S_IRUGO;
+ return attr->mode;
+}
- return 0;
+static const struct attribute_group fsg_lun_dev_group = {
+ .attrs = fsg_lun_dev_attrs,
+ .is_visible = fsg_lun_dev_is_visible,
+};
-error:
- /* removing nonexistent files is a no-op */
- fsg_common_remove_sysfs(lun);
- device_unregister(&lun->dev);
- return rc;
-}
+static const struct attribute_group *fsg_lun_dev_groups[] = {
+ &fsg_lun_dev_group,
+ NULL
+};
int fsg_common_create_lun(struct fsg_common *common, struct fsg_lun_config *cfg,
unsigned int id, const char *name,
} else {
lun->dev.release = fsg_lun_release;
lun->dev.parent = &common->gadget->dev;
+ lun->dev.groups = fsg_lun_dev_groups;
dev_set_drvdata(&lun->dev, &common->filesem);
dev_set_name(&lun->dev, "%s", name);
lun->name = dev_name(&lun->dev);
- rc = fsg_common_add_sysfs(common, lun);
+ rc = device_register(&lun->dev);
if (rc) {
pr_info("failed to register LUN%d: %d\n", id, rc);
+ put_device(&lun->dev);
goto error_sysfs;
}
}
return 0;
error_lun:
- if (common->sysfs) {
- fsg_common_remove_sysfs(lun);
+ if (common->sysfs)
device_unregister(&lun->dev);
- }
fsg_lun_close(lun);
common->luns[id] = NULL;
error_sysfs:
struct fsg_lun *lun = *lun_it;
if (!lun)
continue;
- if (common->sysfs)
- fsg_common_remove_sysfs(lun);
fsg_lun_close(lun);
if (common->sysfs)
device_unregister(&lun->dev);
--- /dev/null
+/*
+ * f_printer.c - USB printer function driver
+ *
+ * Copied from drivers/usb/gadget/legacy/printer.c,
+ * which was:
+ *
+ * printer.c -- Printer gadget driver
+ *
+ * Copyright (C) 2003-2005 David Brownell
+ * Copyright (C) 2006 Craig W. Nadler
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/ioport.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/mutex.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/idr.h>
+#include <linux/timer.h>
+#include <linux/list.h>
+#include <linux/interrupt.h>
+#include <linux/device.h>
+#include <linux/moduleparam.h>
+#include <linux/fs.h>
+#include <linux/poll.h>
+#include <linux/types.h>
+#include <linux/ctype.h>
+#include <linux/cdev.h>
+
+#include <asm/byteorder.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/uaccess.h>
+#include <asm/unaligned.h>
+
+#include <linux/usb/ch9.h>
+#include <linux/usb/composite.h>
+#include <linux/usb/gadget.h>
+#include <linux/usb/g_printer.h>
+
+#include "u_printer.h"
+
+#define PNP_STRING_LEN 1024
+#define PRINTER_MINORS 4
+#define GET_DEVICE_ID 0
+#define GET_PORT_STATUS 1
+#define SOFT_RESET 2
+
+static int major, minors;
+static struct class *usb_gadget_class;
+static DEFINE_IDA(printer_ida);
+static DEFINE_MUTEX(printer_ida_lock); /* protects access do printer_ida */
+
+/*-------------------------------------------------------------------------*/
+
+struct printer_dev {
+ spinlock_t lock; /* lock this structure */
+ /* lock buffer lists during read/write calls */
+ struct mutex lock_printer_io;
+ struct usb_gadget *gadget;
+ s8 interface;
+ struct usb_ep *in_ep, *out_ep;
+
+ struct list_head rx_reqs; /* List of free RX structs */
+ struct list_head rx_reqs_active; /* List of Active RX xfers */
+ struct list_head rx_buffers; /* List of completed xfers */
+ /* wait until there is data to be read. */
+ wait_queue_head_t rx_wait;
+ struct list_head tx_reqs; /* List of free TX structs */
+ struct list_head tx_reqs_active; /* List of Active TX xfers */
+ /* Wait until there are write buffers available to use. */
+ wait_queue_head_t tx_wait;
+ /* Wait until all write buffers have been sent. */
+ wait_queue_head_t tx_flush_wait;
+ struct usb_request *current_rx_req;
+ size_t current_rx_bytes;
+ u8 *current_rx_buf;
+ u8 printer_status;
+ u8 reset_printer;
+ int minor;
+ struct cdev printer_cdev;
+ u8 printer_cdev_open;
+ wait_queue_head_t wait;
+ unsigned q_len;
+ char *pnp_string; /* We don't own memory! */
+ struct usb_function function;
+};
+
+static inline struct printer_dev *func_to_printer(struct usb_function *f)
+{
+ return container_of(f, struct printer_dev, function);
+}
+
+/*-------------------------------------------------------------------------*/
+
+/*
+ * DESCRIPTORS ... most are static, but strings and (full) configuration
+ * descriptors are built on demand.
+ */
+
+/* holds our biggest descriptor */
+#define USB_DESC_BUFSIZE 256
+#define USB_BUFSIZE 8192
+
+static struct usb_interface_descriptor intf_desc = {
+ .bLength = sizeof(intf_desc),
+ .bDescriptorType = USB_DT_INTERFACE,
+ .bNumEndpoints = 2,
+ .bInterfaceClass = USB_CLASS_PRINTER,
+ .bInterfaceSubClass = 1, /* Printer Sub-Class */
+ .bInterfaceProtocol = 2, /* Bi-Directional */
+ .iInterface = 0
+};
+
+static struct usb_endpoint_descriptor fs_ep_in_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bEndpointAddress = USB_DIR_IN,
+ .bmAttributes = USB_ENDPOINT_XFER_BULK
+};
+
+static struct usb_endpoint_descriptor fs_ep_out_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bEndpointAddress = USB_DIR_OUT,
+ .bmAttributes = USB_ENDPOINT_XFER_BULK
+};
+
+static struct usb_descriptor_header *fs_printer_function[] = {
+ (struct usb_descriptor_header *) &intf_desc,
+ (struct usb_descriptor_header *) &fs_ep_in_desc,
+ (struct usb_descriptor_header *) &fs_ep_out_desc,
+ NULL
+};
+
+/*
+ * usb 2.0 devices need to expose both high speed and full speed
+ * descriptors, unless they only run at full speed.
+ */
+
+static struct usb_endpoint_descriptor hs_ep_in_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize = cpu_to_le16(512)
+};
+
+static struct usb_endpoint_descriptor hs_ep_out_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize = cpu_to_le16(512)
+};
+
+static struct usb_qualifier_descriptor dev_qualifier = {
+ .bLength = sizeof(dev_qualifier),
+ .bDescriptorType = USB_DT_DEVICE_QUALIFIER,
+ .bcdUSB = cpu_to_le16(0x0200),
+ .bDeviceClass = USB_CLASS_PRINTER,
+ .bNumConfigurations = 1
+};
+
+static struct usb_descriptor_header *hs_printer_function[] = {
+ (struct usb_descriptor_header *) &intf_desc,
+ (struct usb_descriptor_header *) &hs_ep_in_desc,
+ (struct usb_descriptor_header *) &hs_ep_out_desc,
+ NULL
+};
+
+/*
+ * Added endpoint descriptors for 3.0 devices
+ */
+
+static struct usb_endpoint_descriptor ss_ep_in_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize = cpu_to_le16(1024),
+};
+
+static struct usb_ss_ep_comp_descriptor ss_ep_in_comp_desc = {
+ .bLength = sizeof(ss_ep_in_comp_desc),
+ .bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
+};
+
+static struct usb_endpoint_descriptor ss_ep_out_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize = cpu_to_le16(1024),
+};
+
+static struct usb_ss_ep_comp_descriptor ss_ep_out_comp_desc = {
+ .bLength = sizeof(ss_ep_out_comp_desc),
+ .bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
+};
+
+static struct usb_descriptor_header *ss_printer_function[] = {
+ (struct usb_descriptor_header *) &intf_desc,
+ (struct usb_descriptor_header *) &ss_ep_in_desc,
+ (struct usb_descriptor_header *) &ss_ep_in_comp_desc,
+ (struct usb_descriptor_header *) &ss_ep_out_desc,
+ (struct usb_descriptor_header *) &ss_ep_out_comp_desc,
+ NULL
+};
+
+/* maxpacket and other transfer characteristics vary by speed. */
+static inline struct usb_endpoint_descriptor *ep_desc(struct usb_gadget *gadget,
+ struct usb_endpoint_descriptor *fs,
+ struct usb_endpoint_descriptor *hs,
+ struct usb_endpoint_descriptor *ss)
+{
+ switch (gadget->speed) {
+ case USB_SPEED_SUPER:
+ return ss;
+ case USB_SPEED_HIGH:
+ return hs;
+ default:
+ return fs;
+ }
+}
+
+/*-------------------------------------------------------------------------*/
+
+static struct usb_request *
+printer_req_alloc(struct usb_ep *ep, unsigned len, gfp_t gfp_flags)
+{
+ struct usb_request *req;
+
+ req = usb_ep_alloc_request(ep, gfp_flags);
+
+ if (req != NULL) {
+ req->length = len;
+ req->buf = kmalloc(len, gfp_flags);
+ if (req->buf == NULL) {
+ usb_ep_free_request(ep, req);
+ return NULL;
+ }
+ }
+
+ return req;
+}
+
+static void
+printer_req_free(struct usb_ep *ep, struct usb_request *req)
+{
+ if (ep != NULL && req != NULL) {
+ kfree(req->buf);
+ usb_ep_free_request(ep, req);
+ }
+}
+
+/*-------------------------------------------------------------------------*/
+
+static void rx_complete(struct usb_ep *ep, struct usb_request *req)
+{
+ struct printer_dev *dev = ep->driver_data;
+ int status = req->status;
+ unsigned long flags;
+
+ spin_lock_irqsave(&dev->lock, flags);
+
+ list_del_init(&req->list); /* Remode from Active List */
+
+ switch (status) {
+
+ /* normal completion */
+ case 0:
+ if (req->actual > 0) {
+ list_add_tail(&req->list, &dev->rx_buffers);
+ DBG(dev, "G_Printer : rx length %d\n", req->actual);
+ } else {
+ list_add(&req->list, &dev->rx_reqs);
+ }
+ break;
+
+ /* software-driven interface shutdown */
+ case -ECONNRESET: /* unlink */
+ case -ESHUTDOWN: /* disconnect etc */
+ VDBG(dev, "rx shutdown, code %d\n", status);
+ list_add(&req->list, &dev->rx_reqs);
+ break;
+
+ /* for hardware automagic (such as pxa) */
+ case -ECONNABORTED: /* endpoint reset */
+ DBG(dev, "rx %s reset\n", ep->name);
+ list_add(&req->list, &dev->rx_reqs);
+ break;
+
+ /* data overrun */
+ case -EOVERFLOW:
+ /* FALLTHROUGH */
+
+ default:
+ DBG(dev, "rx status %d\n", status);
+ list_add(&req->list, &dev->rx_reqs);
+ break;
+ }
+
+ wake_up_interruptible(&dev->rx_wait);
+ spin_unlock_irqrestore(&dev->lock, flags);
+}
+
+static void tx_complete(struct usb_ep *ep, struct usb_request *req)
+{
+ struct printer_dev *dev = ep->driver_data;
+
+ switch (req->status) {
+ default:
+ VDBG(dev, "tx err %d\n", req->status);
+ /* FALLTHROUGH */
+ case -ECONNRESET: /* unlink */
+ case -ESHUTDOWN: /* disconnect etc */
+ break;
+ case 0:
+ break;
+ }
+
+ spin_lock(&dev->lock);
+ /* Take the request struct off the active list and put it on the
+ * free list.
+ */
+ list_del_init(&req->list);
+ list_add(&req->list, &dev->tx_reqs);
+ wake_up_interruptible(&dev->tx_wait);
+ if (likely(list_empty(&dev->tx_reqs_active)))
+ wake_up_interruptible(&dev->tx_flush_wait);
+
+ spin_unlock(&dev->lock);
+}
+
+/*-------------------------------------------------------------------------*/
+
+static int
+printer_open(struct inode *inode, struct file *fd)
+{
+ struct printer_dev *dev;
+ unsigned long flags;
+ int ret = -EBUSY;
+
+ dev = container_of(inode->i_cdev, struct printer_dev, printer_cdev);
+
+ spin_lock_irqsave(&dev->lock, flags);
+
+ if (!dev->printer_cdev_open) {
+ dev->printer_cdev_open = 1;
+ fd->private_data = dev;
+ ret = 0;
+ /* Change the printer status to show that it's on-line. */
+ dev->printer_status |= PRINTER_SELECTED;
+ }
+
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ DBG(dev, "printer_open returned %x\n", ret);
+ return ret;
+}
+
+static int
+printer_close(struct inode *inode, struct file *fd)
+{
+ struct printer_dev *dev = fd->private_data;
+ unsigned long flags;
+
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->printer_cdev_open = 0;
+ fd->private_data = NULL;
+ /* Change printer status to show that the printer is off-line. */
+ dev->printer_status &= ~PRINTER_SELECTED;
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ DBG(dev, "printer_close\n");
+
+ return 0;
+}
+
+/* This function must be called with interrupts turned off. */
+static void
+setup_rx_reqs(struct printer_dev *dev)
+{
+ struct usb_request *req;
+
+ while (likely(!list_empty(&dev->rx_reqs))) {
+ int error;
+
+ req = container_of(dev->rx_reqs.next,
+ struct usb_request, list);
+ list_del_init(&req->list);
+
+ /* The USB Host sends us whatever amount of data it wants to
+ * so we always set the length field to the full USB_BUFSIZE.
+ * If the amount of data is more than the read() caller asked
+ * for it will be stored in the request buffer until it is
+ * asked for by read().
+ */
+ req->length = USB_BUFSIZE;
+ req->complete = rx_complete;
+
+ /* here, we unlock, and only unlock, to avoid deadlock. */
+ spin_unlock(&dev->lock);
+ error = usb_ep_queue(dev->out_ep, req, GFP_ATOMIC);
+ spin_lock(&dev->lock);
+ if (error) {
+ DBG(dev, "rx submit --> %d\n", error);
+ list_add(&req->list, &dev->rx_reqs);
+ break;
+ }
+ /* if the req is empty, then add it into dev->rx_reqs_active. */
+ else if (list_empty(&req->list))
+ list_add(&req->list, &dev->rx_reqs_active);
+ }
+}
+
+static ssize_t
+printer_read(struct file *fd, char __user *buf, size_t len, loff_t *ptr)
+{
+ struct printer_dev *dev = fd->private_data;
+ unsigned long flags;
+ size_t size;
+ size_t bytes_copied;
+ struct usb_request *req;
+ /* This is a pointer to the current USB rx request. */
+ struct usb_request *current_rx_req;
+ /* This is the number of bytes in the current rx buffer. */
+ size_t current_rx_bytes;
+ /* This is a pointer to the current rx buffer. */
+ u8 *current_rx_buf;
+
+ if (len == 0)
+ return -EINVAL;
+
+ DBG(dev, "printer_read trying to read %d bytes\n", (int)len);
+
+ mutex_lock(&dev->lock_printer_io);
+ spin_lock_irqsave(&dev->lock, flags);
+
+ /* We will use this flag later to check if a printer reset happened
+ * after we turn interrupts back on.
+ */
+ dev->reset_printer = 0;
+
+ setup_rx_reqs(dev);
+
+ bytes_copied = 0;
+ current_rx_req = dev->current_rx_req;
+ current_rx_bytes = dev->current_rx_bytes;
+ current_rx_buf = dev->current_rx_buf;
+ dev->current_rx_req = NULL;
+ dev->current_rx_bytes = 0;
+ dev->current_rx_buf = NULL;
+
+ /* Check if there is any data in the read buffers. Please note that
+ * current_rx_bytes is the number of bytes in the current rx buffer.
+ * If it is zero then check if there are any other rx_buffers that
+ * are on the completed list. We are only out of data if all rx
+ * buffers are empty.
+ */
+ if ((current_rx_bytes == 0) &&
+ (likely(list_empty(&dev->rx_buffers)))) {
+ /* Turn interrupts back on before sleeping. */
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ /*
+ * If no data is available check if this is a NON-Blocking
+ * call or not.
+ */
+ if (fd->f_flags & (O_NONBLOCK|O_NDELAY)) {
+ mutex_unlock(&dev->lock_printer_io);
+ return -EAGAIN;
+ }
+
+ /* Sleep until data is available */
+ wait_event_interruptible(dev->rx_wait,
+ (likely(!list_empty(&dev->rx_buffers))));
+ spin_lock_irqsave(&dev->lock, flags);
+ }
+
+ /* We have data to return then copy it to the caller's buffer.*/
+ while ((current_rx_bytes || likely(!list_empty(&dev->rx_buffers)))
+ && len) {
+ if (current_rx_bytes == 0) {
+ req = container_of(dev->rx_buffers.next,
+ struct usb_request, list);
+ list_del_init(&req->list);
+
+ if (req->actual && req->buf) {
+ current_rx_req = req;
+ current_rx_bytes = req->actual;
+ current_rx_buf = req->buf;
+ } else {
+ list_add(&req->list, &dev->rx_reqs);
+ continue;
+ }
+ }
+
+ /* Don't leave irqs off while doing memory copies */
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ if (len > current_rx_bytes)
+ size = current_rx_bytes;
+ else
+ size = len;
+
+ size -= copy_to_user(buf, current_rx_buf, size);
+ bytes_copied += size;
+ len -= size;
+ buf += size;
+
+ spin_lock_irqsave(&dev->lock, flags);
+
+ /* We've disconnected or reset so return. */
+ if (dev->reset_printer) {
+ list_add(¤t_rx_req->list, &dev->rx_reqs);
+ spin_unlock_irqrestore(&dev->lock, flags);
+ mutex_unlock(&dev->lock_printer_io);
+ return -EAGAIN;
+ }
+
+ /* If we not returning all the data left in this RX request
+ * buffer then adjust the amount of data left in the buffer.
+ * Othewise if we are done with this RX request buffer then
+ * requeue it to get any incoming data from the USB host.
+ */
+ if (size < current_rx_bytes) {
+ current_rx_bytes -= size;
+ current_rx_buf += size;
+ } else {
+ list_add(¤t_rx_req->list, &dev->rx_reqs);
+ current_rx_bytes = 0;
+ current_rx_buf = NULL;
+ current_rx_req = NULL;
+ }
+ }
+
+ dev->current_rx_req = current_rx_req;
+ dev->current_rx_bytes = current_rx_bytes;
+ dev->current_rx_buf = current_rx_buf;
+
+ spin_unlock_irqrestore(&dev->lock, flags);
+ mutex_unlock(&dev->lock_printer_io);
+
+ DBG(dev, "printer_read returned %d bytes\n", (int)bytes_copied);
+
+ if (bytes_copied)
+ return bytes_copied;
+ else
+ return -EAGAIN;
+}
+
+static ssize_t
+printer_write(struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
+{
+ struct printer_dev *dev = fd->private_data;
+ unsigned long flags;
+ size_t size; /* Amount of data in a TX request. */
+ size_t bytes_copied = 0;
+ struct usb_request *req;
+
+ DBG(dev, "printer_write trying to send %d bytes\n", (int)len);
+
+ if (len == 0)
+ return -EINVAL;
+
+ mutex_lock(&dev->lock_printer_io);
+ spin_lock_irqsave(&dev->lock, flags);
+
+ /* Check if a printer reset happens while we have interrupts on */
+ dev->reset_printer = 0;
+
+ /* Check if there is any available write buffers */
+ if (likely(list_empty(&dev->tx_reqs))) {
+ /* Turn interrupts back on before sleeping. */
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ /*
+ * If write buffers are available check if this is
+ * a NON-Blocking call or not.
+ */
+ if (fd->f_flags & (O_NONBLOCK|O_NDELAY)) {
+ mutex_unlock(&dev->lock_printer_io);
+ return -EAGAIN;
+ }
+
+ /* Sleep until a write buffer is available */
+ wait_event_interruptible(dev->tx_wait,
+ (likely(!list_empty(&dev->tx_reqs))));
+ spin_lock_irqsave(&dev->lock, flags);
+ }
+
+ while (likely(!list_empty(&dev->tx_reqs)) && len) {
+
+ if (len > USB_BUFSIZE)
+ size = USB_BUFSIZE;
+ else
+ size = len;
+
+ req = container_of(dev->tx_reqs.next, struct usb_request,
+ list);
+ list_del_init(&req->list);
+
+ req->complete = tx_complete;
+ req->length = size;
+
+ /* Check if we need to send a zero length packet. */
+ if (len > size)
+ /* They will be more TX requests so no yet. */
+ req->zero = 0;
+ else
+ /* If the data amount is not a multiple of the
+ * maxpacket size then send a zero length packet.
+ */
+ req->zero = ((len % dev->in_ep->maxpacket) == 0);
+
+ /* Don't leave irqs off while doing memory copies */
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ if (copy_from_user(req->buf, buf, size)) {
+ list_add(&req->list, &dev->tx_reqs);
+ mutex_unlock(&dev->lock_printer_io);
+ return bytes_copied;
+ }
+
+ bytes_copied += size;
+ len -= size;
+ buf += size;
+
+ spin_lock_irqsave(&dev->lock, flags);
+
+ /* We've disconnected or reset so free the req and buffer */
+ if (dev->reset_printer) {
+ list_add(&req->list, &dev->tx_reqs);
+ spin_unlock_irqrestore(&dev->lock, flags);
+ mutex_unlock(&dev->lock_printer_io);
+ return -EAGAIN;
+ }
+
+ if (usb_ep_queue(dev->in_ep, req, GFP_ATOMIC)) {
+ list_add(&req->list, &dev->tx_reqs);
+ spin_unlock_irqrestore(&dev->lock, flags);
+ mutex_unlock(&dev->lock_printer_io);
+ return -EAGAIN;
+ }
+
+ list_add(&req->list, &dev->tx_reqs_active);
+
+ }
+
+ spin_unlock_irqrestore(&dev->lock, flags);
+ mutex_unlock(&dev->lock_printer_io);
+
+ DBG(dev, "printer_write sent %d bytes\n", (int)bytes_copied);
+
+ if (bytes_copied)
+ return bytes_copied;
+ else
+ return -EAGAIN;
+}
+
+static int
+printer_fsync(struct file *fd, loff_t start, loff_t end, int datasync)
+{
+ struct printer_dev *dev = fd->private_data;
+ struct inode *inode = file_inode(fd);
+ unsigned long flags;
+ int tx_list_empty;
+
+ mutex_lock(&inode->i_mutex);
+ spin_lock_irqsave(&dev->lock, flags);
+ tx_list_empty = (likely(list_empty(&dev->tx_reqs)));
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ if (!tx_list_empty) {
+ /* Sleep until all data has been sent */
+ wait_event_interruptible(dev->tx_flush_wait,
+ (likely(list_empty(&dev->tx_reqs_active))));
+ }
+ mutex_unlock(&inode->i_mutex);
+
+ return 0;
+}
+
+static unsigned int
+printer_poll(struct file *fd, poll_table *wait)
+{
+ struct printer_dev *dev = fd->private_data;
+ unsigned long flags;
+ int status = 0;
+
+ mutex_lock(&dev->lock_printer_io);
+ spin_lock_irqsave(&dev->lock, flags);
+ setup_rx_reqs(dev);
+ spin_unlock_irqrestore(&dev->lock, flags);
+ mutex_unlock(&dev->lock_printer_io);
+
+ poll_wait(fd, &dev->rx_wait, wait);
+ poll_wait(fd, &dev->tx_wait, wait);
+
+ spin_lock_irqsave(&dev->lock, flags);
+ if (likely(!list_empty(&dev->tx_reqs)))
+ status |= POLLOUT | POLLWRNORM;
+
+ if (likely(dev->current_rx_bytes) ||
+ likely(!list_empty(&dev->rx_buffers)))
+ status |= POLLIN | POLLRDNORM;
+
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ return status;
+}
+
+static long
+printer_ioctl(struct file *fd, unsigned int code, unsigned long arg)
+{
+ struct printer_dev *dev = fd->private_data;
+ unsigned long flags;
+ int status = 0;
+
+ DBG(dev, "printer_ioctl: cmd=0x%4.4x, arg=%lu\n", code, arg);
+
+ /* handle ioctls */
+
+ spin_lock_irqsave(&dev->lock, flags);
+
+ switch (code) {
+ case GADGET_GET_PRINTER_STATUS:
+ status = (int)dev->printer_status;
+ break;
+ case GADGET_SET_PRINTER_STATUS:
+ dev->printer_status = (u8)arg;
+ break;
+ default:
+ /* could not handle ioctl */
+ DBG(dev, "printer_ioctl: ERROR cmd=0x%4.4xis not supported\n",
+ code);
+ status = -ENOTTY;
+ }
+
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ return status;
+}
+
+/* used after endpoint configuration */
+static const struct file_operations printer_io_operations = {
+ .owner = THIS_MODULE,
+ .open = printer_open,
+ .read = printer_read,
+ .write = printer_write,
+ .fsync = printer_fsync,
+ .poll = printer_poll,
+ .unlocked_ioctl = printer_ioctl,
+ .release = printer_close,
+ .llseek = noop_llseek,
+};
+
+/*-------------------------------------------------------------------------*/
+
+static int
+set_printer_interface(struct printer_dev *dev)
+{
+ int result = 0;
+
+ dev->in_ep->desc = ep_desc(dev->gadget, &fs_ep_in_desc, &hs_ep_in_desc,
+ &ss_ep_in_desc);
+ dev->in_ep->driver_data = dev;
+
+ dev->out_ep->desc = ep_desc(dev->gadget, &fs_ep_out_desc,
+ &hs_ep_out_desc, &ss_ep_out_desc);
+ dev->out_ep->driver_data = dev;
+
+ result = usb_ep_enable(dev->in_ep);
+ if (result != 0) {
+ DBG(dev, "enable %s --> %d\n", dev->in_ep->name, result);
+ goto done;
+ }
+
+ result = usb_ep_enable(dev->out_ep);
+ if (result != 0) {
+ DBG(dev, "enable %s --> %d\n", dev->in_ep->name, result);
+ goto done;
+ }
+
+done:
+ /* on error, disable any endpoints */
+ if (result != 0) {
+ (void) usb_ep_disable(dev->in_ep);
+ (void) usb_ep_disable(dev->out_ep);
+ dev->in_ep->desc = NULL;
+ dev->out_ep->desc = NULL;
+ }
+
+ /* caller is responsible for cleanup on error */
+ return result;
+}
+
+static void printer_reset_interface(struct printer_dev *dev)
+{
+ if (dev->interface < 0)
+ return;
+
+ DBG(dev, "%s\n", __func__);
+
+ if (dev->in_ep->desc)
+ usb_ep_disable(dev->in_ep);
+
+ if (dev->out_ep->desc)
+ usb_ep_disable(dev->out_ep);
+
+ dev->in_ep->desc = NULL;
+ dev->out_ep->desc = NULL;
+ dev->interface = -1;
+}
+
+/* Change our operational Interface. */
+static int set_interface(struct printer_dev *dev, unsigned number)
+{
+ int result = 0;
+
+ /* Free the current interface */
+ printer_reset_interface(dev);
+
+ result = set_printer_interface(dev);
+ if (result)
+ printer_reset_interface(dev);
+ else
+ dev->interface = number;
+
+ if (!result)
+ INFO(dev, "Using interface %x\n", number);
+
+ return result;
+}
+
+static void printer_soft_reset(struct printer_dev *dev)
+{
+ struct usb_request *req;
+
+ INFO(dev, "Received Printer Reset Request\n");
+
+ if (usb_ep_disable(dev->in_ep))
+ DBG(dev, "Failed to disable USB in_ep\n");
+ if (usb_ep_disable(dev->out_ep))
+ DBG(dev, "Failed to disable USB out_ep\n");
+
+ if (dev->current_rx_req != NULL) {
+ list_add(&dev->current_rx_req->list, &dev->rx_reqs);
+ dev->current_rx_req = NULL;
+ }
+ dev->current_rx_bytes = 0;
+ dev->current_rx_buf = NULL;
+ dev->reset_printer = 1;
+
+ while (likely(!(list_empty(&dev->rx_buffers)))) {
+ req = container_of(dev->rx_buffers.next, struct usb_request,
+ list);
+ list_del_init(&req->list);
+ list_add(&req->list, &dev->rx_reqs);
+ }
+
+ while (likely(!(list_empty(&dev->rx_reqs_active)))) {
+ req = container_of(dev->rx_buffers.next, struct usb_request,
+ list);
+ list_del_init(&req->list);
+ list_add(&req->list, &dev->rx_reqs);
+ }
+
+ while (likely(!(list_empty(&dev->tx_reqs_active)))) {
+ req = container_of(dev->tx_reqs_active.next,
+ struct usb_request, list);
+ list_del_init(&req->list);
+ list_add(&req->list, &dev->tx_reqs);
+ }
+
+ if (usb_ep_enable(dev->in_ep))
+ DBG(dev, "Failed to enable USB in_ep\n");
+ if (usb_ep_enable(dev->out_ep))
+ DBG(dev, "Failed to enable USB out_ep\n");
+
+ wake_up_interruptible(&dev->rx_wait);
+ wake_up_interruptible(&dev->tx_wait);
+ wake_up_interruptible(&dev->tx_flush_wait);
+}
+
+/*-------------------------------------------------------------------------*/
+
+static bool gprinter_req_match(struct usb_function *f,
+ const struct usb_ctrlrequest *ctrl)
+{
+ struct printer_dev *dev = func_to_printer(f);
+ u16 w_index = le16_to_cpu(ctrl->wIndex);
+ u16 w_value = le16_to_cpu(ctrl->wValue);
+ u16 w_length = le16_to_cpu(ctrl->wLength);
+
+ if ((ctrl->bRequestType & USB_RECIP_MASK) != USB_RECIP_INTERFACE ||
+ (ctrl->bRequestType & USB_TYPE_MASK) != USB_TYPE_CLASS)
+ return false;
+
+ switch (ctrl->bRequest) {
+ case GET_DEVICE_ID:
+ w_index >>= 8;
+ if (w_length <= PNP_STRING_LEN &&
+ (USB_DIR_IN & ctrl->bRequestType))
+ break;
+ return false;
+ case GET_PORT_STATUS:
+ if (!w_value && w_length == 1 &&
+ (USB_DIR_IN & ctrl->bRequestType))
+ break;
+ return false;
+ case SOFT_RESET:
+ if (!w_value && !w_length &&
+ !(USB_DIR_IN & ctrl->bRequestType))
+ break;
+ /* fall through */
+ default:
+ return false;
+ }
+ return w_index == dev->interface;
+}
+
+/*
+ * The setup() callback implements all the ep0 functionality that's not
+ * handled lower down.
+ */
+static int printer_func_setup(struct usb_function *f,
+ const struct usb_ctrlrequest *ctrl)
+{
+ struct printer_dev *dev = func_to_printer(f);
+ struct usb_composite_dev *cdev = f->config->cdev;
+ struct usb_request *req = cdev->req;
+ int value = -EOPNOTSUPP;
+ u16 wIndex = le16_to_cpu(ctrl->wIndex);
+ u16 wValue = le16_to_cpu(ctrl->wValue);
+ u16 wLength = le16_to_cpu(ctrl->wLength);
+
+ DBG(dev, "ctrl req%02x.%02x v%04x i%04x l%d\n",
+ ctrl->bRequestType, ctrl->bRequest, wValue, wIndex, wLength);
+
+ switch (ctrl->bRequestType&USB_TYPE_MASK) {
+ case USB_TYPE_CLASS:
+ switch (ctrl->bRequest) {
+ case GET_DEVICE_ID: /* Get the IEEE-1284 PNP String */
+ /* Only one printer interface is supported. */
+ if ((wIndex>>8) != dev->interface)
+ break;
+
+ value = (dev->pnp_string[0] << 8) | dev->pnp_string[1];
+ memcpy(req->buf, dev->pnp_string, value);
+ DBG(dev, "1284 PNP String: %x %s\n", value,
+ &dev->pnp_string[2]);
+ break;
+
+ case GET_PORT_STATUS: /* Get Port Status */
+ /* Only one printer interface is supported. */
+ if (wIndex != dev->interface)
+ break;
+
+ *(u8 *)req->buf = dev->printer_status;
+ value = min_t(u16, wLength, 1);
+ break;
+
+ case SOFT_RESET: /* Soft Reset */
+ /* Only one printer interface is supported. */
+ if (wIndex != dev->interface)
+ break;
+
+ printer_soft_reset(dev);
+
+ value = 0;
+ break;
+
+ default:
+ goto unknown;
+ }
+ break;
+
+ default:
+unknown:
+ VDBG(dev,
+ "unknown ctrl req%02x.%02x v%04x i%04x l%d\n",
+ ctrl->bRequestType, ctrl->bRequest,
+ wValue, wIndex, wLength);
+ break;
+ }
+ /* host either stalls (value < 0) or reports success */
+ if (value >= 0) {
+ req->length = value;
+ req->zero = value < wLength;
+ value = usb_ep_queue(cdev->gadget->ep0, req, GFP_ATOMIC);
+ if (value < 0) {
+ ERROR(dev, "%s:%d Error!\n", __func__, __LINE__);
+ req->status = 0;
+ }
+ }
+ return value;
+}
+
+static int printer_func_bind(struct usb_configuration *c,
+ struct usb_function *f)
+{
+ struct usb_gadget *gadget = c->cdev->gadget;
+ struct printer_dev *dev = func_to_printer(f);
+ struct device *pdev;
+ struct usb_composite_dev *cdev = c->cdev;
+ struct usb_ep *in_ep;
+ struct usb_ep *out_ep = NULL;
+ struct usb_request *req;
+ dev_t devt;
+ int id;
+ int ret;
+ u32 i;
+
+ id = usb_interface_id(c, f);
+ if (id < 0)
+ return id;
+ intf_desc.bInterfaceNumber = id;
+
+ /* finish hookup to lower layer ... */
+ dev->gadget = gadget;
+
+ /* all we really need is bulk IN/OUT */
+ in_ep = usb_ep_autoconfig(cdev->gadget, &fs_ep_in_desc);
+ if (!in_ep) {
+autoconf_fail:
+ dev_err(&cdev->gadget->dev, "can't autoconfigure on %s\n",
+ cdev->gadget->name);
+ return -ENODEV;
+ }
+ in_ep->driver_data = in_ep; /* claim */
+
+ out_ep = usb_ep_autoconfig(cdev->gadget, &fs_ep_out_desc);
+ if (!out_ep)
+ goto autoconf_fail;
+ out_ep->driver_data = out_ep; /* claim */
+
+ /* assumes that all endpoints are dual-speed */
+ hs_ep_in_desc.bEndpointAddress = fs_ep_in_desc.bEndpointAddress;
+ hs_ep_out_desc.bEndpointAddress = fs_ep_out_desc.bEndpointAddress;
+ ss_ep_in_desc.bEndpointAddress = fs_ep_in_desc.bEndpointAddress;
+ ss_ep_out_desc.bEndpointAddress = fs_ep_out_desc.bEndpointAddress;
+
+ ret = usb_assign_descriptors(f, fs_printer_function,
+ hs_printer_function, ss_printer_function);
+ if (ret)
+ return ret;
+
+ dev->in_ep = in_ep;
+ dev->out_ep = out_ep;
+
+ ret = -ENOMEM;
+ for (i = 0; i < dev->q_len; i++) {
+ req = printer_req_alloc(dev->in_ep, USB_BUFSIZE, GFP_KERNEL);
+ if (!req)
+ goto fail_tx_reqs;
+ list_add(&req->list, &dev->tx_reqs);
+ }
+
+ for (i = 0; i < dev->q_len; i++) {
+ req = printer_req_alloc(dev->out_ep, USB_BUFSIZE, GFP_KERNEL);
+ if (!req)
+ goto fail_rx_reqs;
+ list_add(&req->list, &dev->rx_reqs);
+ }
+
+ /* Setup the sysfs files for the printer gadget. */
+ devt = MKDEV(major, dev->minor);
+ pdev = device_create(usb_gadget_class, NULL, devt,
+ NULL, "g_printer%d", dev->minor);
+ if (IS_ERR(pdev)) {
+ ERROR(dev, "Failed to create device: g_printer\n");
+ ret = PTR_ERR(pdev);
+ goto fail_rx_reqs;
+ }
+
+ /*
+ * Register a character device as an interface to a user mode
+ * program that handles the printer specific functionality.
+ */
+ cdev_init(&dev->printer_cdev, &printer_io_operations);
+ dev->printer_cdev.owner = THIS_MODULE;
+ ret = cdev_add(&dev->printer_cdev, devt, 1);
+ if (ret) {
+ ERROR(dev, "Failed to open char device\n");
+ goto fail_cdev_add;
+ }
+
+ return 0;
+
+fail_cdev_add:
+ device_destroy(usb_gadget_class, devt);
+
+fail_rx_reqs:
+ while (!list_empty(&dev->rx_reqs)) {
+ req = container_of(dev->rx_reqs.next, struct usb_request, list);
+ list_del(&req->list);
+ printer_req_free(dev->out_ep, req);
+ }
+
+fail_tx_reqs:
+ while (!list_empty(&dev->tx_reqs)) {
+ req = container_of(dev->tx_reqs.next, struct usb_request, list);
+ list_del(&req->list);
+ printer_req_free(dev->in_ep, req);
+ }
+
+ return ret;
+
+}
+
+static int printer_func_set_alt(struct usb_function *f,
+ unsigned intf, unsigned alt)
+{
+ struct printer_dev *dev = func_to_printer(f);
+ int ret = -ENOTSUPP;
+
+ if (!alt)
+ ret = set_interface(dev, intf);
+
+ return ret;
+}
+
+static void printer_func_disable(struct usb_function *f)
+{
+ struct printer_dev *dev = func_to_printer(f);
+ unsigned long flags;
+
+ DBG(dev, "%s\n", __func__);
+
+ spin_lock_irqsave(&dev->lock, flags);
+ printer_reset_interface(dev);
+ spin_unlock_irqrestore(&dev->lock, flags);
+}
+
+static inline struct f_printer_opts
+*to_f_printer_opts(struct config_item *item)
+{
+ return container_of(to_config_group(item), struct f_printer_opts,
+ func_inst.group);
+}
+
+CONFIGFS_ATTR_STRUCT(f_printer_opts);
+CONFIGFS_ATTR_OPS(f_printer_opts);
+
+static void printer_attr_release(struct config_item *item)
+{
+ struct f_printer_opts *opts = to_f_printer_opts(item);
+
+ usb_put_function_instance(&opts->func_inst);
+}
+
+static struct configfs_item_operations printer_item_ops = {
+ .release = printer_attr_release,
+ .show_attribute = f_printer_opts_attr_show,
+ .store_attribute = f_printer_opts_attr_store,
+};
+
+static ssize_t f_printer_opts_pnp_string_show(struct f_printer_opts *opts,
+ char *page)
+{
+ int result;
+
+ mutex_lock(&opts->lock);
+ result = strlcpy(page, opts->pnp_string + 2, PNP_STRING_LEN - 2);
+ mutex_unlock(&opts->lock);
+
+ return result;
+}
+
+static ssize_t f_printer_opts_pnp_string_store(struct f_printer_opts *opts,
+ const char *page, size_t len)
+{
+ int result, l;
+
+ mutex_lock(&opts->lock);
+ result = strlcpy(opts->pnp_string + 2, page, PNP_STRING_LEN - 2);
+ l = strlen(opts->pnp_string + 2) + 2;
+ opts->pnp_string[0] = (l >> 8) & 0xFF;
+ opts->pnp_string[1] = l & 0xFF;
+ mutex_unlock(&opts->lock);
+
+ return result;
+}
+
+static struct f_printer_opts_attribute f_printer_opts_pnp_string =
+ __CONFIGFS_ATTR(pnp_string, S_IRUGO | S_IWUSR,
+ f_printer_opts_pnp_string_show,
+ f_printer_opts_pnp_string_store);
+
+static ssize_t f_printer_opts_q_len_show(struct f_printer_opts *opts,
+ char *page)
+{
+ int result;
+
+ mutex_lock(&opts->lock);
+ result = sprintf(page, "%d\n", opts->q_len);
+ mutex_unlock(&opts->lock);
+
+ return result;
+}
+
+static ssize_t f_printer_opts_q_len_store(struct f_printer_opts *opts,
+ const char *page, size_t len)
+{
+ int ret;
+ u16 num;
+
+ mutex_lock(&opts->lock);
+ if (opts->refcnt) {
+ ret = -EBUSY;
+ goto end;
+ }
+
+ ret = kstrtou16(page, 0, &num);
+ if (ret)
+ goto end;
+
+ opts->q_len = (unsigned)num;
+ ret = len;
+end:
+ mutex_unlock(&opts->lock);
+ return ret;
+}
+
+static struct f_printer_opts_attribute f_printer_opts_q_len =
+ __CONFIGFS_ATTR(q_len, S_IRUGO | S_IWUSR, f_printer_opts_q_len_show,
+ f_printer_opts_q_len_store);
+
+static struct configfs_attribute *printer_attrs[] = {
+ &f_printer_opts_pnp_string.attr,
+ &f_printer_opts_q_len.attr,
+ NULL,
+};
+
+static struct config_item_type printer_func_type = {
+ .ct_item_ops = &printer_item_ops,
+ .ct_attrs = printer_attrs,
+ .ct_owner = THIS_MODULE,
+};
+
+static inline int gprinter_get_minor(void)
+{
+ return ida_simple_get(&printer_ida, 0, 0, GFP_KERNEL);
+}
+
+static inline void gprinter_put_minor(int minor)
+{
+ ida_simple_remove(&printer_ida, minor);
+}
+
+static int gprinter_setup(int);
+static void gprinter_cleanup(void);
+
+static void gprinter_free_inst(struct usb_function_instance *f)
+{
+ struct f_printer_opts *opts;
+
+ opts = container_of(f, struct f_printer_opts, func_inst);
+
+ mutex_lock(&printer_ida_lock);
+
+ gprinter_put_minor(opts->minor);
+ if (idr_is_empty(&printer_ida.idr))
+ gprinter_cleanup();
+
+ mutex_unlock(&printer_ida_lock);
+
+ kfree(opts);
+}
+
+static struct usb_function_instance *gprinter_alloc_inst(void)
+{
+ struct f_printer_opts *opts;
+ struct usb_function_instance *ret;
+ int status = 0;
+
+ opts = kzalloc(sizeof(*opts), GFP_KERNEL);
+ if (!opts)
+ return ERR_PTR(-ENOMEM);
+
+ mutex_init(&opts->lock);
+ opts->func_inst.free_func_inst = gprinter_free_inst;
+ ret = &opts->func_inst;
+
+ mutex_lock(&printer_ida_lock);
+
+ if (idr_is_empty(&printer_ida.idr)) {
+ status = gprinter_setup(PRINTER_MINORS);
+ if (status) {
+ ret = ERR_PTR(status);
+ kfree(opts);
+ goto unlock;
+ }
+ }
+
+ opts->minor = gprinter_get_minor();
+ if (opts->minor < 0) {
+ ret = ERR_PTR(opts->minor);
+ kfree(opts);
+ if (idr_is_empty(&printer_ida.idr))
+ gprinter_cleanup();
+ goto unlock;
+ }
+ config_group_init_type_name(&opts->func_inst.group, "",
+ &printer_func_type);
+
+unlock:
+ mutex_unlock(&printer_ida_lock);
+ return ret;
+}
+
+static void gprinter_free(struct usb_function *f)
+{
+ struct printer_dev *dev = func_to_printer(f);
+ struct f_printer_opts *opts;
+
+ opts = container_of(f->fi, struct f_printer_opts, func_inst);
+ kfree(dev);
+ mutex_lock(&opts->lock);
+ --opts->refcnt;
+ mutex_unlock(&opts->lock);
+}
+
+static void printer_func_unbind(struct usb_configuration *c,
+ struct usb_function *f)
+{
+ struct printer_dev *dev;
+ struct usb_request *req;
+
+ dev = func_to_printer(f);
+
+ device_destroy(usb_gadget_class, MKDEV(major, dev->minor));
+
+ /* Remove Character Device */
+ cdev_del(&dev->printer_cdev);
+
+ /* we must already have been disconnected ... no i/o may be active */
+ WARN_ON(!list_empty(&dev->tx_reqs_active));
+ WARN_ON(!list_empty(&dev->rx_reqs_active));
+
+ /* Free all memory for this driver. */
+ while (!list_empty(&dev->tx_reqs)) {
+ req = container_of(dev->tx_reqs.next, struct usb_request,
+ list);
+ list_del(&req->list);
+ printer_req_free(dev->in_ep, req);
+ }
+
+ if (dev->current_rx_req != NULL)
+ printer_req_free(dev->out_ep, dev->current_rx_req);
+
+ while (!list_empty(&dev->rx_reqs)) {
+ req = container_of(dev->rx_reqs.next,
+ struct usb_request, list);
+ list_del(&req->list);
+ printer_req_free(dev->out_ep, req);
+ }
+
+ while (!list_empty(&dev->rx_buffers)) {
+ req = container_of(dev->rx_buffers.next,
+ struct usb_request, list);
+ list_del(&req->list);
+ printer_req_free(dev->out_ep, req);
+ }
+ usb_free_all_descriptors(f);
+}
+
+static struct usb_function *gprinter_alloc(struct usb_function_instance *fi)
+{
+ struct printer_dev *dev;
+ struct f_printer_opts *opts;
+
+ opts = container_of(fi, struct f_printer_opts, func_inst);
+
+ mutex_lock(&opts->lock);
+ if (opts->minor >= minors) {
+ mutex_unlock(&opts->lock);
+ return ERR_PTR(-ENOENT);
+ }
+
+ dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+ if (!dev) {
+ mutex_unlock(&opts->lock);
+ return ERR_PTR(-ENOMEM);
+ }
+
+ ++opts->refcnt;
+ dev->minor = opts->minor;
+ dev->pnp_string = opts->pnp_string;
+ dev->q_len = opts->q_len;
+ mutex_unlock(&opts->lock);
+
+ dev->function.name = "printer";
+ dev->function.bind = printer_func_bind;
+ dev->function.setup = printer_func_setup;
+ dev->function.unbind = printer_func_unbind;
+ dev->function.set_alt = printer_func_set_alt;
+ dev->function.disable = printer_func_disable;
+ dev->function.req_match = gprinter_req_match;
+ dev->function.free_func = gprinter_free;
+
+ INIT_LIST_HEAD(&dev->tx_reqs);
+ INIT_LIST_HEAD(&dev->rx_reqs);
+ INIT_LIST_HEAD(&dev->rx_buffers);
+ INIT_LIST_HEAD(&dev->tx_reqs_active);
+ INIT_LIST_HEAD(&dev->rx_reqs_active);
+
+ spin_lock_init(&dev->lock);
+ mutex_init(&dev->lock_printer_io);
+ init_waitqueue_head(&dev->rx_wait);
+ init_waitqueue_head(&dev->tx_wait);
+ init_waitqueue_head(&dev->tx_flush_wait);
+
+ dev->interface = -1;
+ dev->printer_cdev_open = 0;
+ dev->printer_status = PRINTER_NOT_ERROR;
+ dev->current_rx_req = NULL;
+ dev->current_rx_bytes = 0;
+ dev->current_rx_buf = NULL;
+
+ return &dev->function;
+}
+
+DECLARE_USB_FUNCTION_INIT(printer, gprinter_alloc_inst, gprinter_alloc);
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Craig Nadler");
+
+static int gprinter_setup(int count)
+{
+ int status;
+ dev_t devt;
+
+ usb_gadget_class = class_create(THIS_MODULE, "usb_printer_gadget");
+ if (IS_ERR(usb_gadget_class)) {
+ status = PTR_ERR(usb_gadget_class);
+ usb_gadget_class = NULL;
+ pr_err("unable to create usb_gadget class %d\n", status);
+ return status;
+ }
+
+ status = alloc_chrdev_region(&devt, 0, count, "USB printer gadget");
+ if (status) {
+ pr_err("alloc_chrdev_region %d\n", status);
+ class_destroy(usb_gadget_class);
+ usb_gadget_class = NULL;
+ return status;
+ }
+
+ major = MAJOR(devt);
+ minors = count;
+
+ return status;
+}
+
+static void gprinter_cleanup(void)
+{
+ if (major) {
+ unregister_chrdev_region(MKDEV(major, 0), minors);
+ major = minors = 0;
+ }
+ class_destroy(usb_gadget_class);
+ usb_gadget_class = NULL;
+}
--- /dev/null
+/*
+ * u_printer.h
+ *
+ * Utility definitions for the printer function
+ *
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef U_PRINTER_H
+#define U_PRINTER_H
+
+#include <linux/usb/composite.h>
+
+#define PNP_STRING_LEN 1024
+
+struct f_printer_opts {
+ struct usb_function_instance func_inst;
+ int minor;
+ char pnp_string[PNP_STRING_LEN];
+ unsigned q_len;
+
+ /*
+ * Protect the data from concurrent access by read/write
+ * and create symlink/remove symlink
+ */
+ struct mutex lock;
+ int refcnt;
+};
+
+#endif /* U_PRINTER_H */
unsigned long flags;
int status;
- pr_vdebug("gs_put_char: (%d,%p) char=0x%x, called from %pf\n",
+ pr_vdebug("gs_put_char: (%d,%p) char=0x%x, called from %ps\n",
port->port_num, tty, ch, __builtin_return_address(0));
spin_lock_irqsave(&port->port_lock, flags);
config USB_G_PRINTER
tristate "Printer Gadget"
select USB_LIBCOMPOSITE
+ select USB_F_PRINTER
help
The Printer Gadget channels data between the USB host and a
userspace program driving the print engine. The user space
#include <linux/poll.h>
#include <linux/mmu_context.h>
#include <linux/aio.h>
+#include <linux/uio.h>
#include <linux/device.h>
#include <linux/moduleparam.h>
ret = -EFAULT;
/* completing the iocb can drop the ctx and mm, don't touch mm after */
- aio_complete(iocb, ret, ret);
+ iocb->ki_complete(iocb, ret, ret);
kfree(priv->buf);
kfree(priv->to_free);
kfree(priv);
iocb->private = NULL;
/* aio_complete() reports bytes-transferred _and_ faults */
- aio_complete(iocb, req->actual ? req->actual : req->status,
+
+ iocb->ki_complete(iocb, req->actual ? req->actual : req->status,
req->status);
} else {
/* ep_copy_to_user() won't report both; we hide some faults */
#include <linux/module.h>
#include <linux/kernel.h>
-#include <linux/delay.h>
-#include <linux/ioport.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
-#include <linux/mutex.h>
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/timer.h>
-#include <linux/list.h>
-#include <linux/interrupt.h>
-#include <linux/device.h>
-#include <linux/moduleparam.h>
-#include <linux/fs.h>
-#include <linux/poll.h>
-#include <linux/types.h>
-#include <linux/ctype.h>
-#include <linux/cdev.h>
-
#include <asm/byteorder.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/uaccess.h>
-#include <asm/unaligned.h>
#include <linux/usb/ch9.h>
#include <linux/usb/composite.h>
USB_GADGET_COMPOSITE_OPTIONS();
#define DRIVER_DESC "Printer Gadget"
-#define DRIVER_VERSION "2007 OCT 06"
+#define DRIVER_VERSION "2015 FEB 17"
-static DEFINE_MUTEX(printer_mutex);
static const char shortname [] = "printer";
static const char driver_desc [] = DRIVER_DESC;
-static dev_t g_printer_devno;
-
-static struct class *usb_gadget_class;
-
-/*-------------------------------------------------------------------------*/
-
-struct printer_dev {
- spinlock_t lock; /* lock this structure */
- /* lock buffer lists during read/write calls */
- struct mutex lock_printer_io;
- struct usb_gadget *gadget;
- s8 interface;
- struct usb_ep *in_ep, *out_ep;
-
- struct list_head rx_reqs; /* List of free RX structs */
- struct list_head rx_reqs_active; /* List of Active RX xfers */
- struct list_head rx_buffers; /* List of completed xfers */
- /* wait until there is data to be read. */
- wait_queue_head_t rx_wait;
- struct list_head tx_reqs; /* List of free TX structs */
- struct list_head tx_reqs_active; /* List of Active TX xfers */
- /* Wait until there are write buffers available to use. */
- wait_queue_head_t tx_wait;
- /* Wait until all write buffers have been sent. */
- wait_queue_head_t tx_flush_wait;
- struct usb_request *current_rx_req;
- size_t current_rx_bytes;
- u8 *current_rx_buf;
- u8 printer_status;
- u8 reset_printer;
- struct cdev printer_cdev;
- struct device *pdev;
- u8 printer_cdev_open;
- wait_queue_head_t wait;
- struct usb_function function;
-};
-
-static struct printer_dev usb_printer_gadget;
+#include "u_printer.h"
/*-------------------------------------------------------------------------*/
#define QLEN qlen
+static struct usb_function_instance *fi_printer;
+static struct usb_function *f_printer;
+
/*-------------------------------------------------------------------------*/
/*
* descriptors are built on demand.
*/
-/* holds our biggest descriptor */
-#define USB_DESC_BUFSIZE 256
-#define USB_BUFSIZE 8192
-
static struct usb_device_descriptor device_desc = {
.bLength = sizeof device_desc,
.bDescriptorType = USB_DT_DEVICE,
.bNumConfigurations = 1
};
-static struct usb_interface_descriptor intf_desc = {
- .bLength = sizeof intf_desc,
- .bDescriptorType = USB_DT_INTERFACE,
- .bNumEndpoints = 2,
- .bInterfaceClass = USB_CLASS_PRINTER,
- .bInterfaceSubClass = 1, /* Printer Sub-Class */
- .bInterfaceProtocol = 2, /* Bi-Directional */
- .iInterface = 0
-};
-
-static struct usb_endpoint_descriptor fs_ep_in_desc = {
- .bLength = USB_DT_ENDPOINT_SIZE,
- .bDescriptorType = USB_DT_ENDPOINT,
- .bEndpointAddress = USB_DIR_IN,
- .bmAttributes = USB_ENDPOINT_XFER_BULK
-};
-
-static struct usb_endpoint_descriptor fs_ep_out_desc = {
- .bLength = USB_DT_ENDPOINT_SIZE,
- .bDescriptorType = USB_DT_ENDPOINT,
- .bEndpointAddress = USB_DIR_OUT,
- .bmAttributes = USB_ENDPOINT_XFER_BULK
-};
-
-static struct usb_descriptor_header *fs_printer_function[] = {
- (struct usb_descriptor_header *) &intf_desc,
- (struct usb_descriptor_header *) &fs_ep_in_desc,
- (struct usb_descriptor_header *) &fs_ep_out_desc,
- NULL
-};
-
-/*
- * usb 2.0 devices need to expose both high speed and full speed
- * descriptors, unless they only run at full speed.
- */
-
-static struct usb_endpoint_descriptor hs_ep_in_desc = {
- .bLength = USB_DT_ENDPOINT_SIZE,
- .bDescriptorType = USB_DT_ENDPOINT,
- .bmAttributes = USB_ENDPOINT_XFER_BULK,
- .wMaxPacketSize = cpu_to_le16(512)
-};
-
-static struct usb_endpoint_descriptor hs_ep_out_desc = {
- .bLength = USB_DT_ENDPOINT_SIZE,
- .bDescriptorType = USB_DT_ENDPOINT,
- .bmAttributes = USB_ENDPOINT_XFER_BULK,
- .wMaxPacketSize = cpu_to_le16(512)
-};
-
-static struct usb_qualifier_descriptor dev_qualifier = {
- .bLength = sizeof dev_qualifier,
- .bDescriptorType = USB_DT_DEVICE_QUALIFIER,
- .bcdUSB = cpu_to_le16(0x0200),
- .bDeviceClass = USB_CLASS_PRINTER,
- .bNumConfigurations = 1
-};
-
-static struct usb_descriptor_header *hs_printer_function[] = {
- (struct usb_descriptor_header *) &intf_desc,
- (struct usb_descriptor_header *) &hs_ep_in_desc,
- (struct usb_descriptor_header *) &hs_ep_out_desc,
- NULL
-};
-
-/*
- * Added endpoint descriptors for 3.0 devices
- */
-
-static struct usb_endpoint_descriptor ss_ep_in_desc = {
- .bLength = USB_DT_ENDPOINT_SIZE,
- .bDescriptorType = USB_DT_ENDPOINT,
- .bmAttributes = USB_ENDPOINT_XFER_BULK,
- .wMaxPacketSize = cpu_to_le16(1024),
-};
-
-static struct usb_ss_ep_comp_descriptor ss_ep_in_comp_desc = {
- .bLength = sizeof(ss_ep_in_comp_desc),
- .bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
-};
-
-static struct usb_endpoint_descriptor ss_ep_out_desc = {
- .bLength = USB_DT_ENDPOINT_SIZE,
- .bDescriptorType = USB_DT_ENDPOINT,
- .bmAttributes = USB_ENDPOINT_XFER_BULK,
- .wMaxPacketSize = cpu_to_le16(1024),
-};
-
-static struct usb_ss_ep_comp_descriptor ss_ep_out_comp_desc = {
- .bLength = sizeof(ss_ep_out_comp_desc),
- .bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
-};
-
-static struct usb_descriptor_header *ss_printer_function[] = {
- (struct usb_descriptor_header *) &intf_desc,
- (struct usb_descriptor_header *) &ss_ep_in_desc,
- (struct usb_descriptor_header *) &ss_ep_in_comp_desc,
- (struct usb_descriptor_header *) &ss_ep_out_desc,
- (struct usb_descriptor_header *) &ss_ep_out_comp_desc,
- NULL
-};
-
static struct usb_otg_descriptor otg_descriptor = {
.bLength = sizeof otg_descriptor,
.bDescriptorType = USB_DT_OTG,
NULL,
};
-/* maxpacket and other transfer characteristics vary by speed. */
-static inline struct usb_endpoint_descriptor *ep_desc(struct usb_gadget *gadget,
- struct usb_endpoint_descriptor *fs,
- struct usb_endpoint_descriptor *hs,
- struct usb_endpoint_descriptor *ss)
-{
- switch (gadget->speed) {
- case USB_SPEED_SUPER:
- return ss;
- case USB_SPEED_HIGH:
- return hs;
- default:
- return fs;
- }
-}
-
/*-------------------------------------------------------------------------*/
/* descriptors that are built on-demand */
static char product_desc [40] = DRIVER_DESC;
static char serial_num [40] = "1";
-static char pnp_string [1024] =
+static char pnp_string[PNP_STRING_LEN] =
"XXMFG:linux;MDL:g_printer;CLS:PRINTER;SN:1;";
/* static strings, in UTF-8 */
NULL,
};
-/*-------------------------------------------------------------------------*/
-
-static struct usb_request *
-printer_req_alloc(struct usb_ep *ep, unsigned len, gfp_t gfp_flags)
-{
- struct usb_request *req;
-
- req = usb_ep_alloc_request(ep, gfp_flags);
-
- if (req != NULL) {
- req->length = len;
- req->buf = kmalloc(len, gfp_flags);
- if (req->buf == NULL) {
- usb_ep_free_request(ep, req);
- return NULL;
- }
- }
-
- return req;
-}
-
-static void
-printer_req_free(struct usb_ep *ep, struct usb_request *req)
-{
- if (ep != NULL && req != NULL) {
- kfree(req->buf);
- usb_ep_free_request(ep, req);
- }
-}
-
-/*-------------------------------------------------------------------------*/
-
-static void rx_complete(struct usb_ep *ep, struct usb_request *req)
-{
- struct printer_dev *dev = ep->driver_data;
- int status = req->status;
- unsigned long flags;
-
- spin_lock_irqsave(&dev->lock, flags);
-
- list_del_init(&req->list); /* Remode from Active List */
-
- switch (status) {
-
- /* normal completion */
- case 0:
- if (req->actual > 0) {
- list_add_tail(&req->list, &dev->rx_buffers);
- DBG(dev, "G_Printer : rx length %d\n", req->actual);
- } else {
- list_add(&req->list, &dev->rx_reqs);
- }
- break;
-
- /* software-driven interface shutdown */
- case -ECONNRESET: /* unlink */
- case -ESHUTDOWN: /* disconnect etc */
- VDBG(dev, "rx shutdown, code %d\n", status);
- list_add(&req->list, &dev->rx_reqs);
- break;
-
- /* for hardware automagic (such as pxa) */
- case -ECONNABORTED: /* endpoint reset */
- DBG(dev, "rx %s reset\n", ep->name);
- list_add(&req->list, &dev->rx_reqs);
- break;
-
- /* data overrun */
- case -EOVERFLOW:
- /* FALLTHROUGH */
-
- default:
- DBG(dev, "rx status %d\n", status);
- list_add(&req->list, &dev->rx_reqs);
- break;
- }
-
- wake_up_interruptible(&dev->rx_wait);
- spin_unlock_irqrestore(&dev->lock, flags);
-}
-
-static void tx_complete(struct usb_ep *ep, struct usb_request *req)
-{
- struct printer_dev *dev = ep->driver_data;
-
- switch (req->status) {
- default:
- VDBG(dev, "tx err %d\n", req->status);
- /* FALLTHROUGH */
- case -ECONNRESET: /* unlink */
- case -ESHUTDOWN: /* disconnect etc */
- break;
- case 0:
- break;
- }
-
- spin_lock(&dev->lock);
- /* Take the request struct off the active list and put it on the
- * free list.
- */
- list_del_init(&req->list);
- list_add(&req->list, &dev->tx_reqs);
- wake_up_interruptible(&dev->tx_wait);
- if (likely(list_empty(&dev->tx_reqs_active)))
- wake_up_interruptible(&dev->tx_flush_wait);
-
- spin_unlock(&dev->lock);
-}
-
-/*-------------------------------------------------------------------------*/
-
-static int
-printer_open(struct inode *inode, struct file *fd)
-{
- struct printer_dev *dev;
- unsigned long flags;
- int ret = -EBUSY;
-
- mutex_lock(&printer_mutex);
- dev = container_of(inode->i_cdev, struct printer_dev, printer_cdev);
-
- spin_lock_irqsave(&dev->lock, flags);
-
- if (!dev->printer_cdev_open) {
- dev->printer_cdev_open = 1;
- fd->private_data = dev;
- ret = 0;
- /* Change the printer status to show that it's on-line. */
- dev->printer_status |= PRINTER_SELECTED;
- }
-
- spin_unlock_irqrestore(&dev->lock, flags);
-
- DBG(dev, "printer_open returned %x\n", ret);
- mutex_unlock(&printer_mutex);
- return ret;
-}
-
-static int
-printer_close(struct inode *inode, struct file *fd)
-{
- struct printer_dev *dev = fd->private_data;
- unsigned long flags;
-
- spin_lock_irqsave(&dev->lock, flags);
- dev->printer_cdev_open = 0;
- fd->private_data = NULL;
- /* Change printer status to show that the printer is off-line. */
- dev->printer_status &= ~PRINTER_SELECTED;
- spin_unlock_irqrestore(&dev->lock, flags);
-
- DBG(dev, "printer_close\n");
-
- return 0;
-}
-
-/* This function must be called with interrupts turned off. */
-static void
-setup_rx_reqs(struct printer_dev *dev)
-{
- struct usb_request *req;
-
- while (likely(!list_empty(&dev->rx_reqs))) {
- int error;
-
- req = container_of(dev->rx_reqs.next,
- struct usb_request, list);
- list_del_init(&req->list);
-
- /* The USB Host sends us whatever amount of data it wants to
- * so we always set the length field to the full USB_BUFSIZE.
- * If the amount of data is more than the read() caller asked
- * for it will be stored in the request buffer until it is
- * asked for by read().
- */
- req->length = USB_BUFSIZE;
- req->complete = rx_complete;
-
- /* here, we unlock, and only unlock, to avoid deadlock. */
- spin_unlock(&dev->lock);
- error = usb_ep_queue(dev->out_ep, req, GFP_ATOMIC);
- spin_lock(&dev->lock);
- if (error) {
- DBG(dev, "rx submit --> %d\n", error);
- list_add(&req->list, &dev->rx_reqs);
- break;
- }
- /* if the req is empty, then add it into dev->rx_reqs_active. */
- else if (list_empty(&req->list)) {
- list_add(&req->list, &dev->rx_reqs_active);
- }
- }
-}
-
-static ssize_t
-printer_read(struct file *fd, char __user *buf, size_t len, loff_t *ptr)
-{
- struct printer_dev *dev = fd->private_data;
- unsigned long flags;
- size_t size;
- size_t bytes_copied;
- struct usb_request *req;
- /* This is a pointer to the current USB rx request. */
- struct usb_request *current_rx_req;
- /* This is the number of bytes in the current rx buffer. */
- size_t current_rx_bytes;
- /* This is a pointer to the current rx buffer. */
- u8 *current_rx_buf;
-
- if (len == 0)
- return -EINVAL;
-
- DBG(dev, "printer_read trying to read %d bytes\n", (int)len);
-
- mutex_lock(&dev->lock_printer_io);
- spin_lock_irqsave(&dev->lock, flags);
-
- /* We will use this flag later to check if a printer reset happened
- * after we turn interrupts back on.
- */
- dev->reset_printer = 0;
-
- setup_rx_reqs(dev);
-
- bytes_copied = 0;
- current_rx_req = dev->current_rx_req;
- current_rx_bytes = dev->current_rx_bytes;
- current_rx_buf = dev->current_rx_buf;
- dev->current_rx_req = NULL;
- dev->current_rx_bytes = 0;
- dev->current_rx_buf = NULL;
-
- /* Check if there is any data in the read buffers. Please note that
- * current_rx_bytes is the number of bytes in the current rx buffer.
- * If it is zero then check if there are any other rx_buffers that
- * are on the completed list. We are only out of data if all rx
- * buffers are empty.
- */
- if ((current_rx_bytes == 0) &&
- (likely(list_empty(&dev->rx_buffers)))) {
- /* Turn interrupts back on before sleeping. */
- spin_unlock_irqrestore(&dev->lock, flags);
-
- /*
- * If no data is available check if this is a NON-Blocking
- * call or not.
- */
- if (fd->f_flags & (O_NONBLOCK|O_NDELAY)) {
- mutex_unlock(&dev->lock_printer_io);
- return -EAGAIN;
- }
-
- /* Sleep until data is available */
- wait_event_interruptible(dev->rx_wait,
- (likely(!list_empty(&dev->rx_buffers))));
- spin_lock_irqsave(&dev->lock, flags);
- }
-
- /* We have data to return then copy it to the caller's buffer.*/
- while ((current_rx_bytes || likely(!list_empty(&dev->rx_buffers)))
- && len) {
- if (current_rx_bytes == 0) {
- req = container_of(dev->rx_buffers.next,
- struct usb_request, list);
- list_del_init(&req->list);
-
- if (req->actual && req->buf) {
- current_rx_req = req;
- current_rx_bytes = req->actual;
- current_rx_buf = req->buf;
- } else {
- list_add(&req->list, &dev->rx_reqs);
- continue;
- }
- }
-
- /* Don't leave irqs off while doing memory copies */
- spin_unlock_irqrestore(&dev->lock, flags);
-
- if (len > current_rx_bytes)
- size = current_rx_bytes;
- else
- size = len;
-
- size -= copy_to_user(buf, current_rx_buf, size);
- bytes_copied += size;
- len -= size;
- buf += size;
-
- spin_lock_irqsave(&dev->lock, flags);
-
- /* We've disconnected or reset so return. */
- if (dev->reset_printer) {
- list_add(¤t_rx_req->list, &dev->rx_reqs);
- spin_unlock_irqrestore(&dev->lock, flags);
- mutex_unlock(&dev->lock_printer_io);
- return -EAGAIN;
- }
-
- /* If we not returning all the data left in this RX request
- * buffer then adjust the amount of data left in the buffer.
- * Othewise if we are done with this RX request buffer then
- * requeue it to get any incoming data from the USB host.
- */
- if (size < current_rx_bytes) {
- current_rx_bytes -= size;
- current_rx_buf += size;
- } else {
- list_add(¤t_rx_req->list, &dev->rx_reqs);
- current_rx_bytes = 0;
- current_rx_buf = NULL;
- current_rx_req = NULL;
- }
- }
-
- dev->current_rx_req = current_rx_req;
- dev->current_rx_bytes = current_rx_bytes;
- dev->current_rx_buf = current_rx_buf;
-
- spin_unlock_irqrestore(&dev->lock, flags);
- mutex_unlock(&dev->lock_printer_io);
-
- DBG(dev, "printer_read returned %d bytes\n", (int)bytes_copied);
-
- if (bytes_copied)
- return bytes_copied;
- else
- return -EAGAIN;
-}
-
-static ssize_t
-printer_write(struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
-{
- struct printer_dev *dev = fd->private_data;
- unsigned long flags;
- size_t size; /* Amount of data in a TX request. */
- size_t bytes_copied = 0;
- struct usb_request *req;
-
- DBG(dev, "printer_write trying to send %d bytes\n", (int)len);
-
- if (len == 0)
- return -EINVAL;
-
- mutex_lock(&dev->lock_printer_io);
- spin_lock_irqsave(&dev->lock, flags);
-
- /* Check if a printer reset happens while we have interrupts on */
- dev->reset_printer = 0;
-
- /* Check if there is any available write buffers */
- if (likely(list_empty(&dev->tx_reqs))) {
- /* Turn interrupts back on before sleeping. */
- spin_unlock_irqrestore(&dev->lock, flags);
-
- /*
- * If write buffers are available check if this is
- * a NON-Blocking call or not.
- */
- if (fd->f_flags & (O_NONBLOCK|O_NDELAY)) {
- mutex_unlock(&dev->lock_printer_io);
- return -EAGAIN;
- }
-
- /* Sleep until a write buffer is available */
- wait_event_interruptible(dev->tx_wait,
- (likely(!list_empty(&dev->tx_reqs))));
- spin_lock_irqsave(&dev->lock, flags);
- }
-
- while (likely(!list_empty(&dev->tx_reqs)) && len) {
-
- if (len > USB_BUFSIZE)
- size = USB_BUFSIZE;
- else
- size = len;
-
- req = container_of(dev->tx_reqs.next, struct usb_request,
- list);
- list_del_init(&req->list);
-
- req->complete = tx_complete;
- req->length = size;
-
- /* Check if we need to send a zero length packet. */
- if (len > size)
- /* They will be more TX requests so no yet. */
- req->zero = 0;
- else
- /* If the data amount is not a multple of the
- * maxpacket size then send a zero length packet.
- */
- req->zero = ((len % dev->in_ep->maxpacket) == 0);
-
- /* Don't leave irqs off while doing memory copies */
- spin_unlock_irqrestore(&dev->lock, flags);
-
- if (copy_from_user(req->buf, buf, size)) {
- list_add(&req->list, &dev->tx_reqs);
- mutex_unlock(&dev->lock_printer_io);
- return bytes_copied;
- }
-
- bytes_copied += size;
- len -= size;
- buf += size;
-
- spin_lock_irqsave(&dev->lock, flags);
-
- /* We've disconnected or reset so free the req and buffer */
- if (dev->reset_printer) {
- list_add(&req->list, &dev->tx_reqs);
- spin_unlock_irqrestore(&dev->lock, flags);
- mutex_unlock(&dev->lock_printer_io);
- return -EAGAIN;
- }
-
- if (usb_ep_queue(dev->in_ep, req, GFP_ATOMIC)) {
- list_add(&req->list, &dev->tx_reqs);
- spin_unlock_irqrestore(&dev->lock, flags);
- mutex_unlock(&dev->lock_printer_io);
- return -EAGAIN;
- }
-
- list_add(&req->list, &dev->tx_reqs_active);
-
- }
-
- spin_unlock_irqrestore(&dev->lock, flags);
- mutex_unlock(&dev->lock_printer_io);
-
- DBG(dev, "printer_write sent %d bytes\n", (int)bytes_copied);
-
- if (bytes_copied) {
- return bytes_copied;
- } else {
- return -EAGAIN;
- }
-}
-
-static int
-printer_fsync(struct file *fd, loff_t start, loff_t end, int datasync)
-{
- struct printer_dev *dev = fd->private_data;
- struct inode *inode = file_inode(fd);
- unsigned long flags;
- int tx_list_empty;
-
- mutex_lock(&inode->i_mutex);
- spin_lock_irqsave(&dev->lock, flags);
- tx_list_empty = (likely(list_empty(&dev->tx_reqs)));
- spin_unlock_irqrestore(&dev->lock, flags);
-
- if (!tx_list_empty) {
- /* Sleep until all data has been sent */
- wait_event_interruptible(dev->tx_flush_wait,
- (likely(list_empty(&dev->tx_reqs_active))));
- }
- mutex_unlock(&inode->i_mutex);
-
- return 0;
-}
-
-static unsigned int
-printer_poll(struct file *fd, poll_table *wait)
-{
- struct printer_dev *dev = fd->private_data;
- unsigned long flags;
- int status = 0;
-
- mutex_lock(&dev->lock_printer_io);
- spin_lock_irqsave(&dev->lock, flags);
- setup_rx_reqs(dev);
- spin_unlock_irqrestore(&dev->lock, flags);
- mutex_unlock(&dev->lock_printer_io);
-
- poll_wait(fd, &dev->rx_wait, wait);
- poll_wait(fd, &dev->tx_wait, wait);
-
- spin_lock_irqsave(&dev->lock, flags);
- if (likely(!list_empty(&dev->tx_reqs)))
- status |= POLLOUT | POLLWRNORM;
-
- if (likely(dev->current_rx_bytes) ||
- likely(!list_empty(&dev->rx_buffers)))
- status |= POLLIN | POLLRDNORM;
-
- spin_unlock_irqrestore(&dev->lock, flags);
-
- return status;
-}
-
-static long
-printer_ioctl(struct file *fd, unsigned int code, unsigned long arg)
-{
- struct printer_dev *dev = fd->private_data;
- unsigned long flags;
- int status = 0;
-
- DBG(dev, "printer_ioctl: cmd=0x%4.4x, arg=%lu\n", code, arg);
-
- /* handle ioctls */
-
- spin_lock_irqsave(&dev->lock, flags);
-
- switch (code) {
- case GADGET_GET_PRINTER_STATUS:
- status = (int)dev->printer_status;
- break;
- case GADGET_SET_PRINTER_STATUS:
- dev->printer_status = (u8)arg;
- break;
- default:
- /* could not handle ioctl */
- DBG(dev, "printer_ioctl: ERROR cmd=0x%4.4xis not supported\n",
- code);
- status = -ENOTTY;
- }
-
- spin_unlock_irqrestore(&dev->lock, flags);
-
- return status;
-}
-
-/* used after endpoint configuration */
-static const struct file_operations printer_io_operations = {
- .owner = THIS_MODULE,
- .open = printer_open,
- .read = printer_read,
- .write = printer_write,
- .fsync = printer_fsync,
- .poll = printer_poll,
- .unlocked_ioctl = printer_ioctl,
- .release = printer_close,
- .llseek = noop_llseek,
-};
-
-/*-------------------------------------------------------------------------*/
-
-static int
-set_printer_interface(struct printer_dev *dev)
-{
- int result = 0;
-
- dev->in_ep->desc = ep_desc(dev->gadget, &fs_ep_in_desc, &hs_ep_in_desc,
- &ss_ep_in_desc);
- dev->in_ep->driver_data = dev;
-
- dev->out_ep->desc = ep_desc(dev->gadget, &fs_ep_out_desc,
- &hs_ep_out_desc, &ss_ep_out_desc);
- dev->out_ep->driver_data = dev;
-
- result = usb_ep_enable(dev->in_ep);
- if (result != 0) {
- DBG(dev, "enable %s --> %d\n", dev->in_ep->name, result);
- goto done;
- }
-
- result = usb_ep_enable(dev->out_ep);
- if (result != 0) {
- DBG(dev, "enable %s --> %d\n", dev->in_ep->name, result);
- goto done;
- }
-
-done:
- /* on error, disable any endpoints */
- if (result != 0) {
- (void) usb_ep_disable(dev->in_ep);
- (void) usb_ep_disable(dev->out_ep);
- dev->in_ep->desc = NULL;
- dev->out_ep->desc = NULL;
- }
-
- /* caller is responsible for cleanup on error */
- return result;
-}
-
-static void printer_reset_interface(struct printer_dev *dev)
-{
- if (dev->interface < 0)
- return;
-
- DBG(dev, "%s\n", __func__);
-
- if (dev->in_ep->desc)
- usb_ep_disable(dev->in_ep);
-
- if (dev->out_ep->desc)
- usb_ep_disable(dev->out_ep);
-
- dev->in_ep->desc = NULL;
- dev->out_ep->desc = NULL;
- dev->interface = -1;
-}
-
-/* Change our operational Interface. */
-static int set_interface(struct printer_dev *dev, unsigned number)
-{
- int result = 0;
-
- /* Free the current interface */
- printer_reset_interface(dev);
-
- result = set_printer_interface(dev);
- if (result)
- printer_reset_interface(dev);
- else
- dev->interface = number;
-
- if (!result)
- INFO(dev, "Using interface %x\n", number);
-
- return result;
-}
-
-static void printer_soft_reset(struct printer_dev *dev)
-{
- struct usb_request *req;
-
- INFO(dev, "Received Printer Reset Request\n");
-
- if (usb_ep_disable(dev->in_ep))
- DBG(dev, "Failed to disable USB in_ep\n");
- if (usb_ep_disable(dev->out_ep))
- DBG(dev, "Failed to disable USB out_ep\n");
-
- if (dev->current_rx_req != NULL) {
- list_add(&dev->current_rx_req->list, &dev->rx_reqs);
- dev->current_rx_req = NULL;
- }
- dev->current_rx_bytes = 0;
- dev->current_rx_buf = NULL;
- dev->reset_printer = 1;
-
- while (likely(!(list_empty(&dev->rx_buffers)))) {
- req = container_of(dev->rx_buffers.next, struct usb_request,
- list);
- list_del_init(&req->list);
- list_add(&req->list, &dev->rx_reqs);
- }
-
- while (likely(!(list_empty(&dev->rx_reqs_active)))) {
- req = container_of(dev->rx_buffers.next, struct usb_request,
- list);
- list_del_init(&req->list);
- list_add(&req->list, &dev->rx_reqs);
- }
-
- while (likely(!(list_empty(&dev->tx_reqs_active)))) {
- req = container_of(dev->tx_reqs_active.next,
- struct usb_request, list);
- list_del_init(&req->list);
- list_add(&req->list, &dev->tx_reqs);
- }
-
- if (usb_ep_enable(dev->in_ep))
- DBG(dev, "Failed to enable USB in_ep\n");
- if (usb_ep_enable(dev->out_ep))
- DBG(dev, "Failed to enable USB out_ep\n");
-
- wake_up_interruptible(&dev->rx_wait);
- wake_up_interruptible(&dev->tx_wait);
- wake_up_interruptible(&dev->tx_flush_wait);
-}
-
-/*-------------------------------------------------------------------------*/
-
-/*
- * The setup() callback implements all the ep0 functionality that's not
- * handled lower down.
- */
-static int printer_func_setup(struct usb_function *f,
- const struct usb_ctrlrequest *ctrl)
-{
- struct printer_dev *dev = container_of(f, struct printer_dev, function);
- struct usb_composite_dev *cdev = f->config->cdev;
- struct usb_request *req = cdev->req;
- int value = -EOPNOTSUPP;
- u16 wIndex = le16_to_cpu(ctrl->wIndex);
- u16 wValue = le16_to_cpu(ctrl->wValue);
- u16 wLength = le16_to_cpu(ctrl->wLength);
-
- DBG(dev, "ctrl req%02x.%02x v%04x i%04x l%d\n",
- ctrl->bRequestType, ctrl->bRequest, wValue, wIndex, wLength);
-
- switch (ctrl->bRequestType&USB_TYPE_MASK) {
- case USB_TYPE_CLASS:
- switch (ctrl->bRequest) {
- case 0: /* Get the IEEE-1284 PNP String */
- /* Only one printer interface is supported. */
- if ((wIndex>>8) != dev->interface)
- break;
-
- value = (pnp_string[0]<<8)|pnp_string[1];
- memcpy(req->buf, pnp_string, value);
- DBG(dev, "1284 PNP String: %x %s\n", value,
- &pnp_string[2]);
- break;
-
- case 1: /* Get Port Status */
- /* Only one printer interface is supported. */
- if (wIndex != dev->interface)
- break;
-
- *(u8 *)req->buf = dev->printer_status;
- value = min(wLength, (u16) 1);
- break;
-
- case 2: /* Soft Reset */
- /* Only one printer interface is supported. */
- if (wIndex != dev->interface)
- break;
-
- printer_soft_reset(dev);
-
- value = 0;
- break;
-
- default:
- goto unknown;
- }
- break;
-
- default:
-unknown:
- VDBG(dev,
- "unknown ctrl req%02x.%02x v%04x i%04x l%d\n",
- ctrl->bRequestType, ctrl->bRequest,
- wValue, wIndex, wLength);
- break;
- }
- /* host either stalls (value < 0) or reports success */
- return value;
-}
-
-static int __init printer_func_bind(struct usb_configuration *c,
- struct usb_function *f)
-{
- struct printer_dev *dev = container_of(f, struct printer_dev, function);
- struct usb_composite_dev *cdev = c->cdev;
- struct usb_ep *in_ep;
- struct usb_ep *out_ep = NULL;
- int id;
- int ret;
-
- id = usb_interface_id(c, f);
- if (id < 0)
- return id;
- intf_desc.bInterfaceNumber = id;
-
- /* all we really need is bulk IN/OUT */
- in_ep = usb_ep_autoconfig(cdev->gadget, &fs_ep_in_desc);
- if (!in_ep) {
-autoconf_fail:
- dev_err(&cdev->gadget->dev, "can't autoconfigure on %s\n",
- cdev->gadget->name);
- return -ENODEV;
- }
- in_ep->driver_data = in_ep; /* claim */
-
- out_ep = usb_ep_autoconfig(cdev->gadget, &fs_ep_out_desc);
- if (!out_ep)
- goto autoconf_fail;
- out_ep->driver_data = out_ep; /* claim */
-
- /* assumes that all endpoints are dual-speed */
- hs_ep_in_desc.bEndpointAddress = fs_ep_in_desc.bEndpointAddress;
- hs_ep_out_desc.bEndpointAddress = fs_ep_out_desc.bEndpointAddress;
- ss_ep_in_desc.bEndpointAddress = fs_ep_in_desc.bEndpointAddress;
- ss_ep_out_desc.bEndpointAddress = fs_ep_out_desc.bEndpointAddress;
-
- ret = usb_assign_descriptors(f, fs_printer_function,
- hs_printer_function, ss_printer_function);
- if (ret)
- return ret;
-
- dev->in_ep = in_ep;
- dev->out_ep = out_ep;
- return 0;
-}
-
-static void printer_func_unbind(struct usb_configuration *c,
- struct usb_function *f)
-{
- usb_free_all_descriptors(f);
-}
-
-static int printer_func_set_alt(struct usb_function *f,
- unsigned intf, unsigned alt)
-{
- struct printer_dev *dev = container_of(f, struct printer_dev, function);
- int ret = -ENOTSUPP;
-
- if (!alt)
- ret = set_interface(dev, intf);
-
- return ret;
-}
-
-static void printer_func_disable(struct usb_function *f)
-{
- struct printer_dev *dev = container_of(f, struct printer_dev, function);
- unsigned long flags;
-
- DBG(dev, "%s\n", __func__);
-
- spin_lock_irqsave(&dev->lock, flags);
- printer_reset_interface(dev);
- spin_unlock_irqrestore(&dev->lock, flags);
-}
-
-static void printer_cfg_unbind(struct usb_configuration *c)
-{
- struct printer_dev *dev;
- struct usb_request *req;
-
- dev = &usb_printer_gadget;
-
- DBG(dev, "%s\n", __func__);
-
- /* Remove sysfs files */
- device_destroy(usb_gadget_class, g_printer_devno);
-
- /* Remove Character Device */
- cdev_del(&dev->printer_cdev);
-
- /* we must already have been disconnected ... no i/o may be active */
- WARN_ON(!list_empty(&dev->tx_reqs_active));
- WARN_ON(!list_empty(&dev->rx_reqs_active));
-
- /* Free all memory for this driver. */
- while (!list_empty(&dev->tx_reqs)) {
- req = container_of(dev->tx_reqs.next, struct usb_request,
- list);
- list_del(&req->list);
- printer_req_free(dev->in_ep, req);
- }
-
- if (dev->current_rx_req != NULL)
- printer_req_free(dev->out_ep, dev->current_rx_req);
-
- while (!list_empty(&dev->rx_reqs)) {
- req = container_of(dev->rx_reqs.next,
- struct usb_request, list);
- list_del(&req->list);
- printer_req_free(dev->out_ep, req);
- }
-
- while (!list_empty(&dev->rx_buffers)) {
- req = container_of(dev->rx_buffers.next,
- struct usb_request, list);
- list_del(&req->list);
- printer_req_free(dev->out_ep, req);
- }
-}
-
static struct usb_configuration printer_cfg_driver = {
.label = "printer",
- .unbind = printer_cfg_unbind,
.bConfigurationValue = 1,
.bmAttributes = USB_CONFIG_ATT_ONE | USB_CONFIG_ATT_SELFPOWER,
};
-static int __init printer_bind_config(struct usb_configuration *c)
+static int __init printer_do_config(struct usb_configuration *c)
{
struct usb_gadget *gadget = c->cdev->gadget;
- struct printer_dev *dev;
- int status = -ENOMEM;
- size_t len;
- u32 i;
- struct usb_request *req;
+ int status = 0;
usb_ep_autoconfig_reset(gadget);
- dev = &usb_printer_gadget;
-
- dev->function.name = shortname;
- dev->function.bind = printer_func_bind;
- dev->function.setup = printer_func_setup;
- dev->function.unbind = printer_func_unbind;
- dev->function.set_alt = printer_func_set_alt;
- dev->function.disable = printer_func_disable;
-
- status = usb_add_function(c, &dev->function);
- if (status)
- return status;
-
- /* Setup the sysfs files for the printer gadget. */
- dev->pdev = device_create(usb_gadget_class, NULL, g_printer_devno,
- NULL, "g_printer");
- if (IS_ERR(dev->pdev)) {
- ERROR(dev, "Failed to create device: g_printer\n");
- status = PTR_ERR(dev->pdev);
- goto fail;
- }
-
- /*
- * Register a character device as an interface to a user mode
- * program that handles the printer specific functionality.
- */
- cdev_init(&dev->printer_cdev, &printer_io_operations);
- dev->printer_cdev.owner = THIS_MODULE;
- status = cdev_add(&dev->printer_cdev, g_printer_devno, 1);
- if (status) {
- ERROR(dev, "Failed to open char device\n");
- goto fail;
- }
-
- if (iPNPstring)
- strlcpy(&pnp_string[2], iPNPstring, (sizeof pnp_string)-2);
-
- len = strlen(pnp_string);
- pnp_string[0] = (len >> 8) & 0xFF;
- pnp_string[1] = len & 0xFF;
-
usb_gadget_set_selfpowered(gadget);
if (gadget_is_otg(gadget)) {
printer_cfg_driver.bmAttributes |= USB_CONFIG_ATT_WAKEUP;
}
- spin_lock_init(&dev->lock);
- mutex_init(&dev->lock_printer_io);
- INIT_LIST_HEAD(&dev->tx_reqs);
- INIT_LIST_HEAD(&dev->tx_reqs_active);
- INIT_LIST_HEAD(&dev->rx_reqs);
- INIT_LIST_HEAD(&dev->rx_reqs_active);
- INIT_LIST_HEAD(&dev->rx_buffers);
- init_waitqueue_head(&dev->rx_wait);
- init_waitqueue_head(&dev->tx_wait);
- init_waitqueue_head(&dev->tx_flush_wait);
-
- dev->interface = -1;
- dev->printer_cdev_open = 0;
- dev->printer_status = PRINTER_NOT_ERROR;
- dev->current_rx_req = NULL;
- dev->current_rx_bytes = 0;
- dev->current_rx_buf = NULL;
-
- for (i = 0; i < QLEN; i++) {
- req = printer_req_alloc(dev->in_ep, USB_BUFSIZE, GFP_KERNEL);
- if (!req) {
- while (!list_empty(&dev->tx_reqs)) {
- req = container_of(dev->tx_reqs.next,
- struct usb_request, list);
- list_del(&req->list);
- printer_req_free(dev->in_ep, req);
- }
- return -ENOMEM;
- }
- list_add(&req->list, &dev->tx_reqs);
- }
-
- for (i = 0; i < QLEN; i++) {
- req = printer_req_alloc(dev->out_ep, USB_BUFSIZE, GFP_KERNEL);
- if (!req) {
- while (!list_empty(&dev->rx_reqs)) {
- req = container_of(dev->rx_reqs.next,
- struct usb_request, list);
- list_del(&req->list);
- printer_req_free(dev->out_ep, req);
- }
- return -ENOMEM;
- }
- list_add(&req->list, &dev->rx_reqs);
- }
-
- /* finish hookup to lower layer ... */
- dev->gadget = gadget;
+ f_printer = usb_get_function(fi_printer);
+ if (IS_ERR(f_printer))
+ return PTR_ERR(f_printer);
- INFO(dev, "%s, version: " DRIVER_VERSION "\n", driver_desc);
- return 0;
+ status = usb_add_function(c, f_printer);
+ if (status < 0)
+ usb_put_function(f_printer);
-fail:
- printer_cfg_unbind(c);
return status;
}
-static int printer_unbind(struct usb_composite_dev *cdev)
-{
- return 0;
-}
-
static int __init printer_bind(struct usb_composite_dev *cdev)
{
- int ret;
+ struct f_printer_opts *opts;
+ int ret, len;
+
+ fi_printer = usb_get_function_instance("printer");
+ if (IS_ERR(fi_printer))
+ return PTR_ERR(fi_printer);
+
+ if (iPNPstring)
+ strlcpy(&pnp_string[2], iPNPstring, PNP_STRING_LEN - 2);
+
+ len = strlen(pnp_string);
+ pnp_string[0] = (len >> 8) & 0xFF;
+ pnp_string[1] = len & 0xFF;
+
+ opts = container_of(fi_printer, struct f_printer_opts, func_inst);
+ opts->minor = 0;
+ memcpy(opts->pnp_string, pnp_string, PNP_STRING_LEN);
+ opts->q_len = QLEN;
ret = usb_string_ids_tab(cdev, strings);
- if (ret < 0)
+ if (ret < 0) {
+ usb_put_function_instance(fi_printer);
return ret;
+ }
device_desc.iManufacturer = strings[USB_GADGET_MANUFACTURER_IDX].id;
device_desc.iProduct = strings[USB_GADGET_PRODUCT_IDX].id;
device_desc.iSerialNumber = strings[USB_GADGET_SERIAL_IDX].id;
- ret = usb_add_config(cdev, &printer_cfg_driver, printer_bind_config);
- if (ret)
+ ret = usb_add_config(cdev, &printer_cfg_driver, printer_do_config);
+ if (ret) {
+ usb_put_function_instance(fi_printer);
return ret;
+ }
usb_composite_overwrite_options(cdev, &coverwrite);
return ret;
}
+static int __exit printer_unbind(struct usb_composite_dev *cdev)
+{
+ usb_put_function(f_printer);
+ usb_put_function_instance(fi_printer);
+
+ return 0;
+}
+
static __refdata struct usb_composite_driver printer_driver = {
.name = shortname,
.dev = &device_desc,
.unbind = printer_unbind,
};
-static int __init
-init(void)
-{
- int status;
-
- usb_gadget_class = class_create(THIS_MODULE, "usb_printer_gadget");
- if (IS_ERR(usb_gadget_class)) {
- status = PTR_ERR(usb_gadget_class);
- pr_err("unable to create usb_gadget class %d\n", status);
- return status;
- }
-
- status = alloc_chrdev_region(&g_printer_devno, 0, 1,
- "USB printer gadget");
- if (status) {
- pr_err("alloc_chrdev_region %d\n", status);
- class_destroy(usb_gadget_class);
- return status;
- }
-
- status = usb_composite_probe(&printer_driver);
- if (status) {
- class_destroy(usb_gadget_class);
- unregister_chrdev_region(g_printer_devno, 1);
- pr_err("usb_gadget_probe_driver %x\n", status);
- }
-
- return status;
-}
-module_init(init);
-
-static void __exit
-cleanup(void)
-{
- mutex_lock(&usb_printer_gadget.lock_printer_io);
- usb_composite_unregister(&printer_driver);
- unregister_chrdev_region(g_printer_devno, 1);
- class_destroy(usb_gadget_class);
- mutex_unlock(&usb_printer_gadget.lock_printer_io);
-}
-module_exit(cleanup);
+module_usb_composite_driver(printer_driver);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_AUTHOR("Craig Nadler");
spin_lock_irq(&udc->lock);
for (i = 0; i < inode->i_size / 4; i++)
- data[i] = __raw_readl(udc->regs + i * 4);
+ data[i] = usba_io_readl(udc->regs + i * 4);
spin_unlock_irq(&udc->lock);
file->private_data = data;
if (crq->wLength != cpu_to_le16(sizeof(status)))
goto stall;
ep->state = DATA_STAGE_IN;
- __raw_writew(status, ep->fifo);
+ usba_io_writew(status, ep->fifo);
usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
break;
}
return IRQ_HANDLED;
}
-static irqreturn_t usba_vbus_irq(int irq, void *devid)
+static int start_clock(struct usba_udc *udc)
+{
+ int ret;
+
+ if (udc->clocked)
+ return 0;
+
+ ret = clk_prepare_enable(udc->pclk);
+ if (ret)
+ return ret;
+ ret = clk_prepare_enable(udc->hclk);
+ if (ret) {
+ clk_disable_unprepare(udc->pclk);
+ return ret;
+ }
+
+ udc->clocked = true;
+ return 0;
+}
+
+static void stop_clock(struct usba_udc *udc)
+{
+ if (!udc->clocked)
+ return;
+
+ clk_disable_unprepare(udc->hclk);
+ clk_disable_unprepare(udc->pclk);
+
+ udc->clocked = false;
+}
+
+static int usba_start(struct usba_udc *udc)
+{
+ unsigned long flags;
+ int ret;
+
+ ret = start_clock(udc);
+ if (ret)
+ return ret;
+
+ spin_lock_irqsave(&udc->lock, flags);
+ toggle_bias(udc, 1);
+ usba_writel(udc, CTRL, USBA_ENABLE_MASK);
+ usba_int_enb_set(udc, USBA_END_OF_RESET);
+ spin_unlock_irqrestore(&udc->lock, flags);
+
+ return 0;
+}
+
+static void usba_stop(struct usba_udc *udc)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&udc->lock, flags);
+ udc->gadget.speed = USB_SPEED_UNKNOWN;
+ reset_all_endpoints(udc);
+
+ /* This will also disable the DP pullup */
+ toggle_bias(udc, 0);
+ usba_writel(udc, CTRL, USBA_DISABLE_MASK);
+ spin_unlock_irqrestore(&udc->lock, flags);
+
+ stop_clock(udc);
+}
+
+static irqreturn_t usba_vbus_irq_thread(int irq, void *devid)
{
struct usba_udc *udc = devid;
int vbus;
/* debounce */
udelay(10);
- spin_lock(&udc->lock);
-
- /* May happen if Vbus pin toggles during probe() */
- if (!udc->driver)
- goto out;
+ mutex_lock(&udc->vbus_mutex);
vbus = vbus_is_present(udc);
if (vbus != udc->vbus_prev) {
if (vbus) {
- toggle_bias(udc, 1);
- usba_writel(udc, CTRL, USBA_ENABLE_MASK);
- usba_int_enb_set(udc, USBA_END_OF_RESET);
+ usba_start(udc);
} else {
- udc->gadget.speed = USB_SPEED_UNKNOWN;
- reset_all_endpoints(udc);
- toggle_bias(udc, 0);
- usba_writel(udc, CTRL, USBA_DISABLE_MASK);
- if (udc->driver->disconnect) {
- spin_unlock(&udc->lock);
+ usba_stop(udc);
+
+ if (udc->driver->disconnect)
udc->driver->disconnect(&udc->gadget);
- spin_lock(&udc->lock);
- }
}
udc->vbus_prev = vbus;
}
-out:
- spin_unlock(&udc->lock);
-
+ mutex_unlock(&udc->vbus_mutex);
return IRQ_HANDLED;
}
unsigned long flags;
spin_lock_irqsave(&udc->lock, flags);
-
udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
udc->driver = driver;
spin_unlock_irqrestore(&udc->lock, flags);
- ret = clk_prepare_enable(udc->pclk);
- if (ret)
- return ret;
- ret = clk_prepare_enable(udc->hclk);
- if (ret) {
- clk_disable_unprepare(udc->pclk);
- return ret;
- }
+ mutex_lock(&udc->vbus_mutex);
- udc->vbus_prev = 0;
if (gpio_is_valid(udc->vbus_pin))
enable_irq(gpio_to_irq(udc->vbus_pin));
/* If Vbus is present, enable the controller and wait for reset */
- spin_lock_irqsave(&udc->lock, flags);
- if (vbus_is_present(udc) && udc->vbus_prev == 0) {
- toggle_bias(udc, 1);
- usba_writel(udc, CTRL, USBA_ENABLE_MASK);
- usba_int_enb_set(udc, USBA_END_OF_RESET);
+ udc->vbus_prev = vbus_is_present(udc);
+ if (udc->vbus_prev) {
+ ret = usba_start(udc);
+ if (ret)
+ goto err;
}
- spin_unlock_irqrestore(&udc->lock, flags);
+ mutex_unlock(&udc->vbus_mutex);
return 0;
+
+err:
+ if (gpio_is_valid(udc->vbus_pin))
+ disable_irq(gpio_to_irq(udc->vbus_pin));
+
+ mutex_unlock(&udc->vbus_mutex);
+
+ spin_lock_irqsave(&udc->lock, flags);
+ udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
+ udc->driver = NULL;
+ spin_unlock_irqrestore(&udc->lock, flags);
+ return ret;
}
static int atmel_usba_stop(struct usb_gadget *gadget)
{
struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
- unsigned long flags;
if (gpio_is_valid(udc->vbus_pin))
disable_irq(gpio_to_irq(udc->vbus_pin));
- spin_lock_irqsave(&udc->lock, flags);
- udc->gadget.speed = USB_SPEED_UNKNOWN;
- reset_all_endpoints(udc);
- spin_unlock_irqrestore(&udc->lock, flags);
-
- /* This will also disable the DP pullup */
- toggle_bias(udc, 0);
- usba_writel(udc, CTRL, USBA_DISABLE_MASK);
-
- clk_disable_unprepare(udc->hclk);
- clk_disable_unprepare(udc->pclk);
+ usba_stop(udc);
udc->driver = NULL;
return PTR_ERR(hclk);
spin_lock_init(&udc->lock);
+ mutex_init(&udc->vbus_mutex);
udc->pdev = pdev;
udc->pclk = pclk;
udc->hclk = hclk;
if (gpio_is_valid(udc->vbus_pin)) {
if (!devm_gpio_request(&pdev->dev, udc->vbus_pin, "atmel_usba_udc")) {
- ret = devm_request_irq(&pdev->dev,
- gpio_to_irq(udc->vbus_pin),
- usba_vbus_irq, 0,
+ irq_set_status_flags(gpio_to_irq(udc->vbus_pin),
+ IRQ_NOAUTOEN);
+ ret = devm_request_threaded_irq(&pdev->dev,
+ gpio_to_irq(udc->vbus_pin), NULL,
+ usba_vbus_irq_thread, IRQF_ONESHOT,
"atmel_usba_udc", udc);
if (ret) {
udc->vbus_pin = -ENODEV;
dev_warn(&udc->pdev->dev,
"failed to request vbus irq; "
"assuming always on\n");
- } else {
- disable_irq(gpio_to_irq(udc->vbus_pin));
}
} else {
/* gpio_request fail so use -EINVAL for gpio_is_valid */
ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
if (ret)
return ret;
+ device_init_wakeup(&pdev->dev, 1);
usba_init_debugfs(udc);
for (i = 1; i < udc->num_ep; i++)
udc = platform_get_drvdata(pdev);
+ device_init_wakeup(&pdev->dev, 0);
usb_del_gadget_udc(&udc->gadget);
for (i = 1; i < udc->num_ep; i++)
return 0;
}
+#ifdef CONFIG_PM
+static int usba_udc_suspend(struct device *dev)
+{
+ struct usba_udc *udc = dev_get_drvdata(dev);
+
+ /* Not started */
+ if (!udc->driver)
+ return 0;
+
+ mutex_lock(&udc->vbus_mutex);
+
+ if (!device_may_wakeup(dev)) {
+ usba_stop(udc);
+ goto out;
+ }
+
+ /*
+ * Device may wake up. We stay clocked if we failed
+ * to request vbus irq, assuming always on.
+ */
+ if (gpio_is_valid(udc->vbus_pin)) {
+ usba_stop(udc);
+ enable_irq_wake(gpio_to_irq(udc->vbus_pin));
+ }
+
+out:
+ mutex_unlock(&udc->vbus_mutex);
+ return 0;
+}
+
+static int usba_udc_resume(struct device *dev)
+{
+ struct usba_udc *udc = dev_get_drvdata(dev);
+
+ /* Not started */
+ if (!udc->driver)
+ return 0;
+
+ if (device_may_wakeup(dev) && gpio_is_valid(udc->vbus_pin))
+ disable_irq_wake(gpio_to_irq(udc->vbus_pin));
+
+ /* If Vbus is present, enable the controller and wait for reset */
+ mutex_lock(&udc->vbus_mutex);
+ udc->vbus_prev = vbus_is_present(udc);
+ if (udc->vbus_prev)
+ usba_start(udc);
+ mutex_unlock(&udc->vbus_mutex);
+
+ return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(usba_udc_pm_ops, usba_udc_suspend, usba_udc_resume);
+
static struct platform_driver udc_driver = {
.remove = __exit_p(usba_udc_remove),
.driver = {
.name = "atmel_usba_udc",
+ .pm = &usba_udc_pm_ops,
.of_match_table = of_match_ptr(atmel_udc_dt_ids),
},
};
| USBA_BF(name, value))
/* Register access macros */
+#ifdef CONFIG_AVR32
+#define usba_io_readl __raw_readl
+#define usba_io_writel __raw_writel
+#define usba_io_writew __raw_writew
+#else
+#define usba_io_readl readl_relaxed
+#define usba_io_writel writel_relaxed
+#define usba_io_writew writew_relaxed
+#endif
+
#define usba_readl(udc, reg) \
- __raw_readl((udc)->regs + USBA_##reg)
+ usba_io_readl((udc)->regs + USBA_##reg)
#define usba_writel(udc, reg, value) \
- __raw_writel((value), (udc)->regs + USBA_##reg)
+ usba_io_writel((value), (udc)->regs + USBA_##reg)
#define usba_ep_readl(ep, reg) \
- __raw_readl((ep)->ep_regs + USBA_EPT_##reg)
+ usba_io_readl((ep)->ep_regs + USBA_EPT_##reg)
#define usba_ep_writel(ep, reg, value) \
- __raw_writel((value), (ep)->ep_regs + USBA_EPT_##reg)
+ usba_io_writel((value), (ep)->ep_regs + USBA_EPT_##reg)
#define usba_dma_readl(ep, reg) \
- __raw_readl((ep)->dma_regs + USBA_DMA_##reg)
+ usba_io_readl((ep)->dma_regs + USBA_DMA_##reg)
#define usba_dma_writel(ep, reg, value) \
- __raw_writel((value), (ep)->dma_regs + USBA_DMA_##reg)
+ usba_io_writel((value), (ep)->dma_regs + USBA_DMA_##reg)
/* Calculate base address for a given endpoint or DMA controller */
#define USBA_EPT_BASE(x) (0x100 + (x) * 0x20)
/* Protect hw registers from concurrent modifications */
spinlock_t lock;
+ /* Mutex to prevent concurrent start or stop */
+ struct mutex vbus_mutex;
+
void __iomem *regs;
void __iomem *fifo;
struct clk *hclk;
struct usba_ep *usba_ep;
bool bias_pulse_needed;
+ bool clocked;
u16 devstatus;
ss_hub_descriptor(struct usb_hub_descriptor *desc)
{
memset(desc, 0, sizeof *desc);
- desc->bDescriptorType = 0x2a;
+ desc->bDescriptorType = USB_DT_SS_HUB;
desc->bDescLength = 12;
desc->wHubCharacteristics = cpu_to_le16(
HUB_CHAR_INDV_PORT_LPSM |
static inline void hub_descriptor(struct usb_hub_descriptor *desc)
{
memset(desc, 0, sizeof *desc);
- desc->bDescriptorType = 0x29;
+ desc->bDescriptorType = USB_DT_HUB;
desc->bDescLength = 9;
desc->wHubCharacteristics = cpu_to_le16(
HUB_CHAR_INDV_PORT_LPSM |
return -EINVAL;
if (mod_data.num < 1 || mod_data.num > MAX_NUM_UDC) {
- pr_err("Number of emulated UDC must be in range of 1…%d\n",
+ pr_err("Number of emulated UDC must be in range of 1...%d\n",
MAX_NUM_UDC);
return -EINVAL;
}
static void dump_intmask(struct seq_file *m, const char *label, u32 mask)
{
/* int_status is the same format ... */
- seq_printf(m,
- "%s %05X =" FOURBITS EIGHTBITS EIGHTBITS "\n",
- label, mask,
- (mask & INT_PWRDETECT) ? " power" : "",
- (mask & INT_SYSERROR) ? " sys" : "",
- (mask & INT_MSTRDEND) ? " in-dma" : "",
- (mask & INT_MSTWRTMOUT) ? " wrtmo" : "",
-
- (mask & INT_MSTWREND) ? " out-dma" : "",
- (mask & INT_MSTWRSET) ? " wrset" : "",
- (mask & INT_ERR) ? " err" : "",
- (mask & INT_SOF) ? " sof" : "",
-
- (mask & INT_EP3NAK) ? " ep3nak" : "",
- (mask & INT_EP2NAK) ? " ep2nak" : "",
- (mask & INT_EP1NAK) ? " ep1nak" : "",
- (mask & INT_EP3DATASET) ? " ep3" : "",
-
- (mask & INT_EP2DATASET) ? " ep2" : "",
- (mask & INT_EP1DATASET) ? " ep1" : "",
- (mask & INT_STATUSNAK) ? " ep0snak" : "",
- (mask & INT_STATUS) ? " ep0status" : "",
-
- (mask & INT_SETUP) ? " setup" : "",
- (mask & INT_ENDPOINT0) ? " ep0" : "",
- (mask & INT_USBRESET) ? " reset" : "",
- (mask & INT_SUSPEND) ? " suspend" : "");
+ seq_printf(m, "%s %05X =" FOURBITS EIGHTBITS EIGHTBITS "\n",
+ label, mask,
+ (mask & INT_PWRDETECT) ? " power" : "",
+ (mask & INT_SYSERROR) ? " sys" : "",
+ (mask & INT_MSTRDEND) ? " in-dma" : "",
+ (mask & INT_MSTWRTMOUT) ? " wrtmo" : "",
+
+ (mask & INT_MSTWREND) ? " out-dma" : "",
+ (mask & INT_MSTWRSET) ? " wrset" : "",
+ (mask & INT_ERR) ? " err" : "",
+ (mask & INT_SOF) ? " sof" : "",
+
+ (mask & INT_EP3NAK) ? " ep3nak" : "",
+ (mask & INT_EP2NAK) ? " ep2nak" : "",
+ (mask & INT_EP1NAK) ? " ep1nak" : "",
+ (mask & INT_EP3DATASET) ? " ep3" : "",
+
+ (mask & INT_EP2DATASET) ? " ep2" : "",
+ (mask & INT_EP1DATASET) ? " ep1" : "",
+ (mask & INT_STATUSNAK) ? " ep0snak" : "",
+ (mask & INT_STATUS) ? " ep0status" : "",
+
+ (mask & INT_SETUP) ? " setup" : "",
+ (mask & INT_ENDPOINT0) ? " ep0" : "",
+ (mask & INT_USBRESET) ? " reset" : "",
+ (mask & INT_SUSPEND) ? " suspend" : "");
+}
+
+static const char *udc_ep_state(enum ep0state state)
+{
+ switch (state) {
+ case EP0_DISCONNECT:
+ return "ep0_disconnect";
+ case EP0_IDLE:
+ return "ep0_idle";
+ case EP0_IN:
+ return "ep0_in";
+ case EP0_OUT:
+ return "ep0_out";
+ case EP0_STATUS:
+ return "ep0_status";
+ case EP0_STALL:
+ return "ep0_stall";
+ case EP0_SUSPEND:
+ return "ep0_suspend";
+ }
+
+ return "ep0_?";
}
+static const char *udc_ep_status(u32 status)
+{
+ switch (status & EPxSTATUS_EP_MASK) {
+ case EPxSTATUS_EP_READY:
+ return "ready";
+ case EPxSTATUS_EP_DATAIN:
+ return "packet";
+ case EPxSTATUS_EP_FULL:
+ return "full";
+ case EPxSTATUS_EP_TX_ERR: /* host will retry */
+ return "tx_err";
+ case EPxSTATUS_EP_RX_ERR:
+ return "rx_err";
+ case EPxSTATUS_EP_BUSY: /* ep0 only */
+ return "busy";
+ case EPxSTATUS_EP_STALL:
+ return "stall";
+ case EPxSTATUS_EP_INVALID: /* these "can't happen" */
+ return "invalid";
+ }
+
+ return "?";
+}
static int udc_proc_read(struct seq_file *m, void *v)
{
tmp = readl(®s->power_detect);
is_usb_connected = tmp & PW_DETECT;
seq_printf(m,
- "%s - %s\n"
- "%s version: %s %s\n"
- "Gadget driver: %s\n"
- "Host %s, %s\n"
- "\n",
- pci_name(dev->pdev), driver_desc,
- driver_name, DRIVER_VERSION, dmastr(),
- dev->driver ? dev->driver->driver.name : "(none)",
- is_usb_connected
- ? ((tmp & PW_PULLUP) ? "full speed" : "powered")
- : "disconnected",
- ({const char *state;
- switch(dev->ep0state){
- case EP0_DISCONNECT: state = "ep0_disconnect"; break;
- case EP0_IDLE: state = "ep0_idle"; break;
- case EP0_IN: state = "ep0_in"; break;
- case EP0_OUT: state = "ep0_out"; break;
- case EP0_STATUS: state = "ep0_status"; break;
- case EP0_STALL: state = "ep0_stall"; break;
- case EP0_SUSPEND: state = "ep0_suspend"; break;
- default: state = "ep0_?"; break;
- } state; })
- );
+ "%s - %s\n"
+ "%s version: %s %s\n"
+ "Gadget driver: %s\n"
+ "Host %s, %s\n"
+ "\n",
+ pci_name(dev->pdev), driver_desc,
+ driver_name, DRIVER_VERSION, dmastr(),
+ dev->driver ? dev->driver->driver.name : "(none)",
+ is_usb_connected
+ ? ((tmp & PW_PULLUP) ? "full speed" : "powered")
+ : "disconnected",
+ udc_ep_state(dev->ep0state));
dump_intmask(m, "int_status", readl(®s->int_status));
dump_intmask(m, "int_enable", readl(®s->int_enable));
goto done;
/* registers for (active) device and ep0 */
- if (seq_printf(m, "\nirqs %lu\ndataset %02x "
- "single.bcs %02x.%02x state %x addr %u\n",
- dev->irqs, readl(®s->DataSet),
- readl(®s->EPxSingle), readl(®s->EPxBCS),
- readl(®s->UsbState),
- readl(®s->address)) < 0)
+ seq_printf(m, "\nirqs %lu\ndataset %02x single.bcs %02x.%02x state %x addr %u\n",
+ dev->irqs, readl(®s->DataSet),
+ readl(®s->EPxSingle), readl(®s->EPxBCS),
+ readl(®s->UsbState),
+ readl(®s->address));
+ if (seq_has_overflowed(m))
goto done;
tmp = readl(®s->dma_master);
- if (seq_printf(m,
- "dma %03X =" EIGHTBITS "%s %s\n", tmp,
- (tmp & MST_EOPB_DIS) ? " eopb-" : "",
- (tmp & MST_EOPB_ENA) ? " eopb+" : "",
- (tmp & MST_TIMEOUT_DIS) ? " tmo-" : "",
- (tmp & MST_TIMEOUT_ENA) ? " tmo+" : "",
-
- (tmp & MST_RD_EOPB) ? " eopb" : "",
- (tmp & MST_RD_RESET) ? " in_reset" : "",
- (tmp & MST_WR_RESET) ? " out_reset" : "",
- (tmp & MST_RD_ENA) ? " IN" : "",
-
- (tmp & MST_WR_ENA) ? " OUT" : "",
- (tmp & MST_CONNECTION)
- ? "ep1in/ep2out"
- : "ep1out/ep2in") < 0)
+ seq_printf(m, "dma %03X =" EIGHTBITS "%s %s\n",
+ tmp,
+ (tmp & MST_EOPB_DIS) ? " eopb-" : "",
+ (tmp & MST_EOPB_ENA) ? " eopb+" : "",
+ (tmp & MST_TIMEOUT_DIS) ? " tmo-" : "",
+ (tmp & MST_TIMEOUT_ENA) ? " tmo+" : "",
+
+ (tmp & MST_RD_EOPB) ? " eopb" : "",
+ (tmp & MST_RD_RESET) ? " in_reset" : "",
+ (tmp & MST_WR_RESET) ? " out_reset" : "",
+ (tmp & MST_RD_ENA) ? " IN" : "",
+
+ (tmp & MST_WR_ENA) ? " OUT" : "",
+ (tmp & MST_CONNECTION) ? "ep1in/ep2out" : "ep1out/ep2in");
+ if (seq_has_overflowed(m))
goto done;
/* dump endpoint queues */
continue;
tmp = readl(ep->reg_status);
- if (seq_printf(m,
- "%s %s max %u %s, irqs %lu, "
- "status %02x (%s) " FOURBITS "\n",
- ep->ep.name,
- ep->is_in ? "in" : "out",
- ep->ep.maxpacket,
- ep->dma ? "dma" : "pio",
- ep->irqs,
- tmp, ({ char *s;
- switch (tmp & EPxSTATUS_EP_MASK) {
- case EPxSTATUS_EP_READY:
- s = "ready"; break;
- case EPxSTATUS_EP_DATAIN:
- s = "packet"; break;
- case EPxSTATUS_EP_FULL:
- s = "full"; break;
- case EPxSTATUS_EP_TX_ERR: // host will retry
- s = "tx_err"; break;
- case EPxSTATUS_EP_RX_ERR:
- s = "rx_err"; break;
- case EPxSTATUS_EP_BUSY: /* ep0 only */
- s = "busy"; break;
- case EPxSTATUS_EP_STALL:
- s = "stall"; break;
- case EPxSTATUS_EP_INVALID: // these "can't happen"
- s = "invalid"; break;
- default:
- s = "?"; break;
- } s; }),
- (tmp & EPxSTATUS_TOGGLE) ? "data1" : "data0",
- (tmp & EPxSTATUS_SUSPEND) ? " suspend" : "",
- (tmp & EPxSTATUS_FIFO_DISABLE) ? " disable" : "",
- (tmp & EPxSTATUS_STAGE_ERROR) ? " ep0stat" : ""
- ) < 0)
+ seq_printf(m, "%s %s max %u %s, irqs %lu, status %02x (%s) " FOURBITS "\n",
+ ep->ep.name,
+ ep->is_in ? "in" : "out",
+ ep->ep.maxpacket,
+ ep->dma ? "dma" : "pio",
+ ep->irqs,
+ tmp, udc_ep_status(tmp),
+ (tmp & EPxSTATUS_TOGGLE) ? "data1" : "data0",
+ (tmp & EPxSTATUS_SUSPEND) ? " suspend" : "",
+ (tmp & EPxSTATUS_FIFO_DISABLE) ? " disable" : "",
+ (tmp & EPxSTATUS_STAGE_ERROR) ? " ep0stat" : "");
+ if (seq_has_overflowed(m))
goto done;
if (list_empty(&ep->queue)) {
- if (seq_puts(m, "\t(nothing queued)\n") < 0)
+ seq_puts(m, "\t(nothing queued)\n");
+ if (seq_has_overflowed(m))
goto done;
continue;
}
} else
tmp = req->req.actual;
- if (seq_printf(m,
- "\treq %p len %u/%u buf %p\n",
- &req->req, tmp, req->req.length,
- req->req.buf) < 0)
+ seq_printf(m, "\treq %p len %u/%u buf %p\n",
+ &req->req, tmp, req->req.length,
+ req->req.buf);
+ if (seq_has_overflowed(m))
goto done;
}
}
req = container_of(_req, struct lpc32xx_request, req);
ep = container_of(_ep, struct lpc32xx_ep, ep);
- if (!_req || !_req->complete || !_req->buf ||
+ if (!_ep || !_req || !_req->complete || !_req->buf ||
!list_empty(&req->queue))
return -EINVAL;
udc = ep->udc;
- if (!_ep) {
- dev_dbg(udc->dev, "invalid ep\n");
- return -EINVAL;
- }
-
-
- if ((!udc) || (!udc->driver) ||
- (udc->gadget.speed == USB_SPEED_UNKNOWN)) {
- dev_dbg(udc->dev, "invalid device\n");
- return -EINVAL;
- }
+ if (udc->gadget.speed == USB_SPEED_UNKNOWN)
+ return -EPIPE;
if (ep->lep) {
struct lpc32xx_usbd_dd_gad *dd;
"ep-e", "ep-f", "ep-g", "ep-h",
};
+/* Endpoint names for usb3380 advance mode */
+static const char *const ep_name_adv[] = {
+ ep0name,
+ "ep1in", "ep2out", "ep3in", "ep4out",
+ "ep1out", "ep2in", "ep3out", "ep4in",
+};
+
/* mode 0 == ep-{a,b,c,d} 1K fifo each
* mode 1 == ep-{a,b} 2K fifo each, ep-{c,d} unavailable
* mode 2 == ep-a 2K fifo, ep-{b,c} 1K each, ep-d unavailable
u32 max, tmp;
unsigned long flags;
static const u32 ep_key[9] = { 1, 0, 1, 0, 1, 1, 0, 1, 0 };
+ int ret = 0;
ep = container_of(_ep, struct net2280_ep, ep);
if (!_ep || !desc || ep->desc || _ep->name == ep0name ||
- desc->bDescriptorType != USB_DT_ENDPOINT)
+ desc->bDescriptorType != USB_DT_ENDPOINT) {
+ pr_err("%s: failed at line=%d\n", __func__, __LINE__);
return -EINVAL;
+ }
dev = ep->dev;
- if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
- return -ESHUTDOWN;
+ if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
+ ret = -ESHUTDOWN;
+ goto print_err;
+ }
/* erratum 0119 workaround ties up an endpoint number */
- if ((desc->bEndpointAddress & 0x0f) == EP_DONTUSE)
- return -EDOM;
+ if ((desc->bEndpointAddress & 0x0f) == EP_DONTUSE) {
+ ret = -EDOM;
+ goto print_err;
+ }
if (dev->quirks & PLX_SUPERSPEED) {
- if ((desc->bEndpointAddress & 0x0f) >= 0x0c)
- return -EDOM;
+ if ((desc->bEndpointAddress & 0x0f) >= 0x0c) {
+ ret = -EDOM;
+ goto print_err;
+ }
ep->is_in = !!usb_endpoint_dir_in(desc);
- if (dev->enhanced_mode && ep->is_in && ep_key[ep->num])
- return -EINVAL;
+ if (dev->enhanced_mode && ep->is_in && ep_key[ep->num]) {
+ ret = -EINVAL;
+ goto print_err;
+ }
}
/* sanity check ep-e/ep-f since their fifos are small */
max = usb_endpoint_maxp(desc) & 0x1fff;
- if (ep->num > 4 && max > 64 && (dev->quirks & PLX_LEGACY))
- return -ERANGE;
+ if (ep->num > 4 && max > 64 && (dev->quirks & PLX_LEGACY)) {
+ ret = -ERANGE;
+ goto print_err;
+ }
spin_lock_irqsave(&dev->lock, flags);
_ep->maxpacket = max & 0x7ff;
(dev->gadget.speed == USB_SPEED_HIGH && max != 512) ||
(dev->gadget.speed == USB_SPEED_FULL && max > 64)) {
spin_unlock_irqrestore(&dev->lock, flags);
- return -ERANGE;
+ ret = -ERANGE;
+ goto print_err;
}
}
ep->is_iso = (tmp == USB_ENDPOINT_XFER_ISOC);
/* pci writes may still be posted */
spin_unlock_irqrestore(&dev->lock, flags);
- return 0;
+ return ret;
+
+print_err:
+ dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret);
+ return ret;
}
static int handshake(u32 __iomem *ptr, u32 mask, u32 done, int usec)
unsigned long flags;
ep = container_of(_ep, struct net2280_ep, ep);
- if (!_ep || !ep->desc || _ep->name == ep0name)
+ if (!_ep || !ep->desc || _ep->name == ep0name) {
+ pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
return -EINVAL;
-
+ }
spin_lock_irqsave(&ep->dev->lock, flags);
nuke(ep);
struct net2280_ep *ep;
struct net2280_request *req;
- if (!_ep)
+ if (!_ep) {
+ pr_err("%s: Invalid ep\n", __func__);
return NULL;
+ }
ep = container_of(_ep, struct net2280_ep, ep);
req = kzalloc(sizeof(*req), gfp_flags);
struct net2280_request *req;
ep = container_of(_ep, struct net2280_ep, ep);
- if (!_ep || !_req)
+ if (!_ep || !_req) {
+ dev_err(&ep->dev->pdev->dev, "%s: Inavlid ep=%p or req=%p\n",
+ __func__, _ep, _req);
return;
+ }
req = container_of(_req, struct net2280_request, req);
WARN_ON(!list_empty(&req->queue));
struct net2280_ep *ep;
struct net2280 *dev;
unsigned long flags;
+ int ret = 0;
/* we always require a cpu-view buffer, so that we can
* always use pio (as fallback or whatever).
*/
- req = container_of(_req, struct net2280_request, req);
- if (!_req || !_req->complete || !_req->buf ||
- !list_empty(&req->queue))
- return -EINVAL;
- if (_req->length > (~0 & DMA_BYTE_COUNT_MASK))
- return -EDOM;
ep = container_of(_ep, struct net2280_ep, ep);
- if (!_ep || (!ep->desc && ep->num != 0))
+ if (!_ep || (!ep->desc && ep->num != 0)) {
+ pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
return -EINVAL;
+ }
+ req = container_of(_req, struct net2280_request, req);
+ if (!_req || !_req->complete || !_req->buf ||
+ !list_empty(&req->queue)) {
+ ret = -EINVAL;
+ goto print_err;
+ }
+ if (_req->length > (~0 & DMA_BYTE_COUNT_MASK)) {
+ ret = -EDOM;
+ goto print_err;
+ }
dev = ep->dev;
- if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
- return -ESHUTDOWN;
+ if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
+ ret = -ESHUTDOWN;
+ goto print_err;
+ }
/* FIXME implement PIO fallback for ZLPs with DMA */
- if (ep->dma && _req->length == 0)
- return -EOPNOTSUPP;
+ if (ep->dma && _req->length == 0) {
+ ret = -EOPNOTSUPP;
+ goto print_err;
+ }
/* set up dma mapping in case the caller didn't */
if (ep->dma) {
- int ret;
-
ret = usb_gadget_map_request(&dev->gadget, _req,
ep->is_in);
if (ret)
- return ret;
+ goto print_err;
}
ep_vdbg(dev, "%s queue req %p, len %d buf %p\n",
spin_unlock_irqrestore(&dev->lock, flags);
/* pci writes may still be posted */
- return 0;
+ return ret;
+
+print_err:
+ dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret);
+ return ret;
}
static inline void
int stopped;
ep = container_of(_ep, struct net2280_ep, ep);
- if (!_ep || (!ep->desc && ep->num != 0) || !_req)
+ if (!_ep || (!ep->desc && ep->num != 0) || !_req) {
+ pr_err("%s: Invalid ep=%p or ep->desc or req=%p\n",
+ __func__, _ep, _req);
return -EINVAL;
+ }
spin_lock_irqsave(&ep->dev->lock, flags);
stopped = ep->stopped;
}
if (&req->req != _req) {
spin_unlock_irqrestore(&ep->dev->lock, flags);
+ dev_err(&ep->dev->pdev->dev, "%s: Request mismatch\n",
+ __func__);
return -EINVAL;
}
int retval = 0;
ep = container_of(_ep, struct net2280_ep, ep);
- if (!_ep || (!ep->desc && ep->num != 0))
+ if (!_ep || (!ep->desc && ep->num != 0)) {
+ pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
return -EINVAL;
- if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN)
- return -ESHUTDOWN;
+ }
+ if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
+ retval = -ESHUTDOWN;
+ goto print_err;
+ }
if (ep->desc /* not ep0 */ && (ep->desc->bmAttributes & 0x03)
- == USB_ENDPOINT_XFER_ISOC)
- return -EINVAL;
+ == USB_ENDPOINT_XFER_ISOC) {
+ retval = -EINVAL;
+ goto print_err;
+ }
spin_lock_irqsave(&ep->dev->lock, flags);
- if (!list_empty(&ep->queue))
+ if (!list_empty(&ep->queue)) {
retval = -EAGAIN;
- else if (ep->is_in && value && net2280_fifo_status(_ep) != 0)
+ goto print_unlock;
+ } else if (ep->is_in && value && net2280_fifo_status(_ep) != 0) {
retval = -EAGAIN;
- else {
+ goto print_unlock;
+ } else {
ep_vdbg(ep->dev, "%s %s %s\n", _ep->name,
value ? "set" : "clear",
wedged ? "wedge" : "halt");
spin_unlock_irqrestore(&ep->dev->lock, flags);
return retval;
+
+print_unlock:
+ spin_unlock_irqrestore(&ep->dev->lock, flags);
+print_err:
+ dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, retval);
+ return retval;
}
static int net2280_set_halt(struct usb_ep *_ep, int value)
static int net2280_set_wedge(struct usb_ep *_ep)
{
- if (!_ep || _ep->name == ep0name)
+ if (!_ep || _ep->name == ep0name) {
+ pr_err("%s: Invalid ep=%p or ep0\n", __func__, _ep);
return -EINVAL;
+ }
return net2280_set_halt_and_wedge(_ep, 1, 1);
}
u32 avail;
ep = container_of(_ep, struct net2280_ep, ep);
- if (!_ep || (!ep->desc && ep->num != 0))
+ if (!_ep || (!ep->desc && ep->num != 0)) {
+ pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
return -ENODEV;
- if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN)
+ }
+ if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
+ dev_err(&ep->dev->pdev->dev,
+ "%s: Invalid driver=%p or speed=%d\n",
+ __func__, ep->dev->driver, ep->dev->gadget.speed);
return -ESHUTDOWN;
+ }
avail = readl(&ep->regs->ep_avail) & (BIT(12) - 1);
- if (avail > ep->fifo_size)
+ if (avail > ep->fifo_size) {
+ dev_err(&ep->dev->pdev->dev, "%s: Fifo overflow\n", __func__);
return -EOVERFLOW;
+ }
if (ep->is_in)
avail = ep->fifo_size - avail;
return avail;
struct net2280_ep *ep;
ep = container_of(_ep, struct net2280_ep, ep);
- if (!_ep || (!ep->desc && ep->num != 0))
+ if (!_ep || (!ep->desc && ep->num != 0)) {
+ pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
return;
- if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN)
+ }
+ if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
+ dev_err(&ep->dev->pdev->dev,
+ "%s: Invalid driver=%p or speed=%d\n",
+ __func__, ep->dev->driver, ep->dev->gadget.speed);
return;
+ }
writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
(void) readl(&ep->regs->ep_rsp);
for (i = 0; i < dev->n_ep; i++) {
struct net2280_ep *ep = &dev->ep[i];
- ep->ep.name = ep_name[i];
+ ep->ep.name = dev->enhanced_mode ? ep_name_adv[i] : ep_name[i];
ep->dev = dev;
ep->num = i;
ep->regs = (struct net2280_ep_regs __iomem *)
(((void __iomem *)&dev->epregs[ne[i]]) +
ep_reg_addr[i]);
- ep->fiforegs = &dev->fiforegs[i];
} else {
ep->cfg = &dev->epregs[i];
ep->regs = &dev->epregs[i];
- ep->fiforegs = &dev->fiforegs[i];
}
ep->fifo_size = (i != 0) ? 2048 : 512;
dev->ep[i].irqs = 0;
/* hook up the driver ... */
- dev->softconnect = 1;
driver->driver.bus = NULL;
dev->driver = driver;
BIT(PCI_RETRY_ABORT_INTERRUPT))
static void handle_stat1_irqs(struct net2280 *dev, u32 stat)
+__releases(dev->lock)
+__acquires(dev->lock)
{
struct net2280_ep *ep;
u32 tmp, num, mask, scratch;
u32 usbstat;
dev->usb_ext = (struct usb338x_usb_ext_regs __iomem *)
(base + 0x00b4);
- dev->fiforegs = (struct usb338x_fifo_regs __iomem *)
- (base + 0x0500);
dev->llregs = (struct usb338x_ll_regs __iomem *)
(base + 0x0700);
dev->ll_lfps_regs = (struct usb338x_ll_lfps_regs __iomem *)
struct net2280_ep_regs __iomem *regs;
struct net2280_dma_regs __iomem *dma;
struct net2280_dma *dummy;
- struct usb338x_fifo_regs __iomem *fiforegs;
dma_addr_t td_dma; /* of dummy */
struct net2280 *dev;
unsigned long irqs;
struct net2280_dma_regs __iomem *dma;
struct net2280_dep_regs __iomem *dep;
struct net2280_ep_regs __iomem *epregs;
- struct usb338x_fifo_regs __iomem *fiforegs;
struct usb338x_ll_regs __iomem *llregs;
struct usb338x_ll_lfps_regs __iomem *ll_lfps_regs;
struct usb338x_ll_tsn_regs __iomem *ll_tsn_regs;
static int state_dbg_show(struct seq_file *s, void *p)
{
struct pxa_udc *udc = s->private;
- int pos = 0, ret;
u32 tmp;
- ret = -ENODEV;
if (!udc->driver)
- goto out;
+ return -ENODEV;
/* basic device status */
- pos += seq_printf(s, DRIVER_DESC "\n"
- "%s version: %s\nGadget driver: %s\n",
- driver_name, DRIVER_VERSION,
- udc->driver ? udc->driver->driver.name : "(none)");
+ seq_printf(s, DRIVER_DESC "\n"
+ "%s version: %s\n"
+ "Gadget driver: %s\n",
+ driver_name, DRIVER_VERSION,
+ udc->driver ? udc->driver->driver.name : "(none)");
tmp = udc_readl(udc, UDCCR);
- pos += seq_printf(s,
- "udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), "
- "con=%d,inter=%d,altinter=%d\n", tmp,
- (tmp & UDCCR_OEN) ? " oen":"",
- (tmp & UDCCR_AALTHNP) ? " aalthnp":"",
- (tmp & UDCCR_AHNP) ? " rem" : "",
- (tmp & UDCCR_BHNP) ? " rstir" : "",
- (tmp & UDCCR_DWRE) ? " dwre" : "",
- (tmp & UDCCR_SMAC) ? " smac" : "",
- (tmp & UDCCR_EMCE) ? " emce" : "",
- (tmp & UDCCR_UDR) ? " udr" : "",
- (tmp & UDCCR_UDA) ? " uda" : "",
- (tmp & UDCCR_UDE) ? " ude" : "",
- (tmp & UDCCR_ACN) >> UDCCR_ACN_S,
- (tmp & UDCCR_AIN) >> UDCCR_AIN_S,
- (tmp & UDCCR_AAISN) >> UDCCR_AAISN_S);
+ seq_printf(s,
+ "udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), con=%d,inter=%d,altinter=%d\n",
+ tmp,
+ (tmp & UDCCR_OEN) ? " oen":"",
+ (tmp & UDCCR_AALTHNP) ? " aalthnp":"",
+ (tmp & UDCCR_AHNP) ? " rem" : "",
+ (tmp & UDCCR_BHNP) ? " rstir" : "",
+ (tmp & UDCCR_DWRE) ? " dwre" : "",
+ (tmp & UDCCR_SMAC) ? " smac" : "",
+ (tmp & UDCCR_EMCE) ? " emce" : "",
+ (tmp & UDCCR_UDR) ? " udr" : "",
+ (tmp & UDCCR_UDA) ? " uda" : "",
+ (tmp & UDCCR_UDE) ? " ude" : "",
+ (tmp & UDCCR_ACN) >> UDCCR_ACN_S,
+ (tmp & UDCCR_AIN) >> UDCCR_AIN_S,
+ (tmp & UDCCR_AAISN) >> UDCCR_AAISN_S);
/* registers for device and ep0 */
- pos += seq_printf(s, "udcicr0=0x%08x udcicr1=0x%08x\n",
- udc_readl(udc, UDCICR0), udc_readl(udc, UDCICR1));
- pos += seq_printf(s, "udcisr0=0x%08x udcisr1=0x%08x\n",
- udc_readl(udc, UDCISR0), udc_readl(udc, UDCISR1));
- pos += seq_printf(s, "udcfnr=%d\n", udc_readl(udc, UDCFNR));
- pos += seq_printf(s, "irqs: reset=%lu, suspend=%lu, resume=%lu, "
- "reconfig=%lu\n",
- udc->stats.irqs_reset, udc->stats.irqs_suspend,
- udc->stats.irqs_resume, udc->stats.irqs_reconfig);
-
- ret = 0;
-out:
- return ret;
+ seq_printf(s, "udcicr0=0x%08x udcicr1=0x%08x\n",
+ udc_readl(udc, UDCICR0), udc_readl(udc, UDCICR1));
+ seq_printf(s, "udcisr0=0x%08x udcisr1=0x%08x\n",
+ udc_readl(udc, UDCISR0), udc_readl(udc, UDCISR1));
+ seq_printf(s, "udcfnr=%d\n", udc_readl(udc, UDCFNR));
+ seq_printf(s, "irqs: reset=%lu, suspend=%lu, resume=%lu, reconfig=%lu\n",
+ udc->stats.irqs_reset, udc->stats.irqs_suspend,
+ udc->stats.irqs_resume, udc->stats.irqs_reconfig);
+
+ return 0;
}
static int queues_dbg_show(struct seq_file *s, void *p)
struct pxa_udc *udc = s->private;
struct pxa_ep *ep;
struct pxa27x_request *req;
- int pos = 0, i, maxpkt, ret;
+ int i, maxpkt;
- ret = -ENODEV;
if (!udc->driver)
- goto out;
+ return -ENODEV;
/* dump endpoint queues */
for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
ep = &udc->pxa_ep[i];
maxpkt = ep->fifo_size;
- pos += seq_printf(s, "%-12s max_pkt=%d %s\n",
- EPNAME(ep), maxpkt, "pio");
+ seq_printf(s, "%-12s max_pkt=%d %s\n",
+ EPNAME(ep), maxpkt, "pio");
if (list_empty(&ep->queue)) {
- pos += seq_printf(s, "\t(nothing queued)\n");
+ seq_puts(s, "\t(nothing queued)\n");
continue;
}
list_for_each_entry(req, &ep->queue, queue) {
- pos += seq_printf(s, "\treq %p len %d/%d buf %p\n",
- &req->req, req->req.actual,
- req->req.length, req->req.buf);
+ seq_printf(s, "\treq %p len %d/%d buf %p\n",
+ &req->req, req->req.actual,
+ req->req.length, req->req.buf);
}
}
- ret = 0;
-out:
- return ret;
+ return 0;
}
static int eps_dbg_show(struct seq_file *s, void *p)
{
struct pxa_udc *udc = s->private;
struct pxa_ep *ep;
- int pos = 0, i, ret;
+ int i;
u32 tmp;
- ret = -ENODEV;
if (!udc->driver)
- goto out;
+ return -ENODEV;
ep = &udc->pxa_ep[0];
tmp = udc_ep_readl(ep, UDCCSR);
- pos += seq_printf(s, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n", tmp,
- (tmp & UDCCSR0_SA) ? " sa" : "",
- (tmp & UDCCSR0_RNE) ? " rne" : "",
- (tmp & UDCCSR0_FST) ? " fst" : "",
- (tmp & UDCCSR0_SST) ? " sst" : "",
- (tmp & UDCCSR0_DME) ? " dme" : "",
- (tmp & UDCCSR0_IPR) ? " ipr" : "",
- (tmp & UDCCSR0_OPC) ? " opc" : "");
+ seq_printf(s, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n",
+ tmp,
+ (tmp & UDCCSR0_SA) ? " sa" : "",
+ (tmp & UDCCSR0_RNE) ? " rne" : "",
+ (tmp & UDCCSR0_FST) ? " fst" : "",
+ (tmp & UDCCSR0_SST) ? " sst" : "",
+ (tmp & UDCCSR0_DME) ? " dme" : "",
+ (tmp & UDCCSR0_IPR) ? " ipr" : "",
+ (tmp & UDCCSR0_OPC) ? " opc" : "");
for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
ep = &udc->pxa_ep[i];
tmp = i? udc_ep_readl(ep, UDCCR) : udc_readl(udc, UDCCR);
- pos += seq_printf(s, "%-12s: "
- "IN %lu(%lu reqs), OUT %lu(%lu reqs), "
- "irqs=%lu, udccr=0x%08x, udccsr=0x%03x, "
- "udcbcr=%d\n",
- EPNAME(ep),
- ep->stats.in_bytes, ep->stats.in_ops,
- ep->stats.out_bytes, ep->stats.out_ops,
- ep->stats.irqs,
- tmp, udc_ep_readl(ep, UDCCSR),
- udc_ep_readl(ep, UDCBCR));
+ seq_printf(s, "%-12s: IN %lu(%lu reqs), OUT %lu(%lu reqs), irqs=%lu, udccr=0x%08x, udccsr=0x%03x, udcbcr=%d\n",
+ EPNAME(ep),
+ ep->stats.in_bytes, ep->stats.in_ops,
+ ep->stats.out_bytes, ep->stats.out_ops,
+ ep->stats.irqs,
+ tmp, udc_ep_readl(ep, UDCCSR),
+ udc_ep_readl(ep, UDCBCR));
}
- ret = 0;
-out:
- return ret;
+ return 0;
}
static int eps_dbg_open(struct inode *inode, struct file *file)
};
#if defined(CONFIG_OF)
-static struct of_device_id udc_pxa_dt_ids[] = {
+static const struct of_device_id udc_pxa_dt_ids[] = {
{ .compatible = "marvell,pxa270-udc" },
{}
};
* @dev - the child device to the actual controller
* @gadget - the gadget. For use by the class code
* @list - for use by the udc class driver
+ * @vbus - for udcs who care about vbus status, this value is real vbus status;
+ * for udcs who do not care about vbus status, this value is always true
*
* This represents the internal data structure which is used by the UDC-class
* to hold information about udc driver and gadget together.
struct usb_gadget *gadget;
struct device dev;
struct list_head list;
+ bool vbus;
};
static struct class *udc_class;
static void usb_gadget_state_work(struct work_struct *work)
{
- struct usb_gadget *gadget = work_to_gadget(work);
- struct usb_udc *udc = NULL;
-
- mutex_lock(&udc_lock);
- list_for_each_entry(udc, &udc_list, list)
- if (udc->gadget == gadget)
- goto found;
- mutex_unlock(&udc_lock);
-
- return;
-
-found:
- mutex_unlock(&udc_lock);
+ struct usb_gadget *gadget = work_to_gadget(work);
+ struct usb_udc *udc = gadget->udc;
- sysfs_notify(&udc->dev.kobj, NULL, "state");
+ if (udc)
+ sysfs_notify(&udc->dev.kobj, NULL, "state");
}
void usb_gadget_set_state(struct usb_gadget *gadget,
/* ------------------------------------------------------------------------- */
+static void usb_udc_connect_control(struct usb_udc *udc)
+{
+ if (udc->vbus)
+ usb_gadget_connect(udc->gadget);
+ else
+ usb_gadget_disconnect(udc->gadget);
+}
+
+/**
+ * usb_udc_vbus_handler - updates the udc core vbus status, and try to
+ * connect or disconnect gadget
+ * @gadget: The gadget which vbus change occurs
+ * @status: The vbus status
+ *
+ * The udc driver calls it when it wants to connect or disconnect gadget
+ * according to vbus status.
+ */
+void usb_udc_vbus_handler(struct usb_gadget *gadget, bool status)
+{
+ struct usb_udc *udc = gadget->udc;
+
+ if (udc) {
+ udc->vbus = status;
+ usb_udc_connect_control(udc);
+ }
+}
+EXPORT_SYMBOL_GPL(usb_udc_vbus_handler);
+
/**
* usb_gadget_udc_reset - notifies the udc core that bus reset occurs
* @gadget: The gadget which bus reset occurs
goto err3;
udc->gadget = gadget;
+ gadget->udc = udc;
mutex_lock(&udc_lock);
list_add_tail(&udc->list, &udc_list);
goto err4;
usb_gadget_set_state(gadget, USB_STATE_NOTATTACHED);
+ udc->vbus = true;
mutex_unlock(&udc_lock);
*/
void usb_del_gadget_udc(struct usb_gadget *gadget)
{
- struct usb_udc *udc = NULL;
+ struct usb_udc *udc = gadget->udc;
- mutex_lock(&udc_lock);
- list_for_each_entry(udc, &udc_list, list)
- if (udc->gadget == gadget)
- goto found;
-
- dev_err(gadget->dev.parent, "gadget not registered.\n");
- mutex_unlock(&udc_lock);
-
- return;
+ if (!udc)
+ return;
-found:
dev_vdbg(gadget->dev.parent, "unregistering gadget\n");
+ mutex_lock(&udc_lock);
list_del(&udc->list);
mutex_unlock(&udc_lock);
driver->unbind(udc->gadget);
goto err1;
}
- usb_gadget_connect(udc->gadget);
+ usb_udc_connect_control(udc);
kobject_uevent(&udc->dev.kobj, KOBJ_CHANGE);
return 0;
config USB_EHCI_MSM
tristate "Support for Qualcomm QSD/MSM on-chip EHCI USB controller"
- depends on ARCH_MSM || ARCH_QCOM
+ depends on ARCH_QCOM
select USB_EHCI_ROOT_HUB_TT
---help---
Enables support for the USB Host controller present on the
ehci->reset_done[i] == 0))
continue;
- /* start 20 msec resume signaling from this port,
- * and make hub_wq collect PORT_STAT_C_SUSPEND to
- * stop that signaling. Use 5 ms extra for safety,
- * like usb_port_resume() does.
+ /* start USB_RESUME_TIMEOUT msec resume signaling from
+ * this port, and make hub_wq collect
+ * PORT_STAT_C_SUSPEND to stop that signaling.
*/
- ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
+ ehci->reset_done[i] = jiffies +
+ msecs_to_jiffies(USB_RESUME_TIMEOUT);
set_bit(i, &ehci->resuming_ports);
ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
usb_hcd_start_port_resume(&hcd->self, i);
ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
}
- /* msleep for 20ms only if code is trying to resume port */
+ /*
+ * msleep for USB_RESUME_TIMEOUT ms only if code is trying to resume
+ * port
+ */
if (resume_needed) {
spin_unlock_irq(&ehci->lock);
- msleep(20);
+ msleep(USB_RESUME_TIMEOUT);
spin_lock_irq(&ehci->lock);
if (ehci->shutdown)
goto shutdown;
int ports = HCS_N_PORTS (ehci->hcs_params);
u16 temp;
- desc->bDescriptorType = 0x29;
+ desc->bDescriptorType = USB_DT_HUB;
desc->bPwrOn2PwrGood = 10; /* ehci 1.0, 2.3.9 says 20ms max */
desc->bHubContrCurrent = 0;
temp &= ~PORT_WAKE_BITS;
ehci_writel(ehci, temp | PORT_RESUME, status_reg);
ehci->reset_done[wIndex] = jiffies
- + msecs_to_jiffies(20);
+ + msecs_to_jiffies(USB_RESUME_TIMEOUT);
set_bit(wIndex, &ehci->resuming_ports);
usb_hcd_start_port_resume(&hcd->self, wIndex);
break;
#define wrl(off, val) writel_relaxed((val), hcd->regs + (off))
#define USB_CMD 0x140
+#define USB_CMD_RUN BIT(0)
+#define USB_CMD_RESET BIT(1)
#define USB_MODE 0x1a8
+#define USB_MODE_MASK GENMASK(1, 0)
+#define USB_MODE_DEVICE 0x2
+#define USB_MODE_HOST 0x3
+#define USB_MODE_SDIS BIT(4)
#define USB_CAUSE 0x310
#define USB_MASK 0x314
#define USB_WINDOW_CTRL(i) (0x320 + ((i) << 4))
/*
* Reset controller
*/
- wrl(USB_CMD, rdl(USB_CMD) | 0x2);
- while (rdl(USB_CMD) & 0x2);
+ wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET);
+ while (rdl(USB_CMD) & USB_CMD_RESET);
/*
* GL# USB-10: Set IPG for non start of frame packets
/*
* Stop and reset controller
*/
- wrl(USB_CMD, rdl(USB_CMD) & ~0x1);
- wrl(USB_CMD, rdl(USB_CMD) | 0x2);
- while (rdl(USB_CMD) & 0x2);
+ wrl(USB_CMD, rdl(USB_CMD) & ~USB_CMD_RUN);
+ wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET);
+ while (rdl(USB_CMD) & USB_CMD_RESET);
/*
* GL# USB-5 Streaming disable REG_USB_MODE[4]=1
* TBD: This need to be done after each reset!
* GL# USB-4 Setup USB Host mode
*/
- wrl(USB_MODE, 0x13);
+ wrl(USB_MODE, USB_MODE_SDIS | USB_MODE_HOST);
}
static void
/* virtual root hub specific descriptor */
static u8 root_hub_des[] = {
0x09, /* blength */
- 0x29, /* bDescriptorType;hub-descriptor */
+ USB_DT_HUB, /* bDescriptorType;hub-descriptor */
0x01, /* bNbrPorts */
HUB_CHAR_INDV_PORT_LPSM | HUB_CHAR_NO_OCPM, /* wHubCharacteristics */
0x00, /* per-port power, no overcurrent */
int ports = HCS_N_PORTS(fotg210->hcs_params);
u16 temp;
- desc->bDescriptorType = 0x29;
+ desc->bDescriptorType = USB_DT_HUB;
desc->bPwrOn2PwrGood = 10; /* fotg210 1.0, 2.3.9 says 20ms max */
desc->bHubContrCurrent = 0;
/* resume signaling for 20 msec */
fotg210_writel(fotg210, temp | PORT_RESUME, status_reg);
fotg210->reset_done[wIndex] = jiffies
- + msecs_to_jiffies(20);
+ + msecs_to_jiffies(USB_RESUME_TIMEOUT);
break;
case USB_PORT_FEAT_C_SUSPEND:
clear_bit(wIndex, &fotg210->port_c_suspend);
int ports = HCS_N_PORTS (fusbh200->hcs_params);
u16 temp;
- desc->bDescriptorType = 0x29;
+ desc->bDescriptorType = USB_DT_HUB;
desc->bPwrOn2PwrGood = 10; /* fusbh200 1.0, 2.3.9 says 20ms max */
desc->bHubContrCurrent = 0;
if ((temp & PORT_PE) == 0)
goto error;
- /* resume signaling for 20 msec */
fusbh200_writel(fusbh200, temp | PORT_RESUME, status_reg);
fusbh200->reset_done[wIndex] = jiffies
- + msecs_to_jiffies(20);
+ + msecs_to_jiffies(USB_RESUME_TIMEOUT);
break;
case USB_PORT_FEAT_C_SUSPEND:
clear_bit(wIndex, &fusbh200->port_c_suspend);
struct usb_hub_descriptor *desc)
{
struct imx21 *imx21 = hcd_to_imx21(hcd);
- desc->bDescriptorType = 0x29; /* HUB descriptor */
+ desc->bDescriptorType = USB_DT_HUB; /* HUB descriptor */
desc->bHubContrCurrent = 0;
desc->bNbrPorts = readl(imx21->regs + USBH_ROOTHUBA)
{
u32 reg = isp116x->rhdesca;
- desc->bDescriptorType = 0x29;
+ desc->bDescriptorType = USB_DT_HUB;
desc->bDescLength = 9;
desc->bHubContrCurrent = 0;
desc->bNbrPorts = (u8) (reg & 0x3);
spin_unlock_irq(&isp116x->lock);
hcd->state = HC_STATE_RESUMING;
- msleep(20);
+ msleep(USB_RESUME_TIMEOUT);
/* Go operational */
spin_lock_irq(&isp116x->lock);
DBG(3, "%s: enter\n", __func__);
- desc->bDescriptorType = 0x29;
+ desc->bDescriptorType = USB_DT_HUB;
desc->bDescLength = 9;
desc->bHubContrCurrent = 0;
desc->bNbrPorts = reg & 0x3;
/*
* See Table 11-13: Hub Descriptor in USB 2.0 spec.
*/
- desc->bDescriptorType = 0x29; /* hub descriptor */
+ desc->bDescriptorType = USB_DT_HUB; /* hub descriptor */
desc->bDescLength = 9;
desc->wHubCharacteristics = cpu_to_le16(HUB_CHAR_INDV_PORT_LPSM |
HUB_CHAR_COMMON_OCPM);
struct ohci_at91_priv {
struct clk *iclk;
struct clk *fclk;
- struct clk *uclk;
struct clk *hclk;
bool clocked;
bool wakeup; /* Saved wake-up state for resume */
{
if (ohci_at91->clocked)
return;
- if (IS_ENABLED(CONFIG_COMMON_CLK)) {
- clk_set_rate(ohci_at91->uclk, 48000000);
- clk_prepare_enable(ohci_at91->uclk);
- }
+
+ clk_set_rate(ohci_at91->fclk, 48000000);
clk_prepare_enable(ohci_at91->hclk);
clk_prepare_enable(ohci_at91->iclk);
clk_prepare_enable(ohci_at91->fclk);
{
if (!ohci_at91->clocked)
return;
+
clk_disable_unprepare(ohci_at91->fclk);
clk_disable_unprepare(ohci_at91->iclk);
clk_disable_unprepare(ohci_at91->hclk);
- if (IS_ENABLED(CONFIG_COMMON_CLK))
- clk_disable_unprepare(ohci_at91->uclk);
ohci_at91->clocked = false;
}
retval = PTR_ERR(ohci_at91->hclk);
goto err;
}
- if (IS_ENABLED(CONFIG_COMMON_CLK)) {
- ohci_at91->uclk = devm_clk_get(dev, "usb_clk");
- if (IS_ERR(ohci_at91->uclk)) {
- dev_err(dev, "failed to get uclk\n");
- retval = PTR_ERR(ohci_at91->uclk);
- goto err;
- }
- }
board = hcd->self.controller->platform_data;
ohci = hcd_to_ohci(hcd);
u32 rh = roothub_a (ohci);
u16 temp;
- desc->bDescriptorType = 0x29;
+ desc->bDescriptorType = USB_DT_HUB;
desc->bPwrOn2PwrGood = (rh & RH_A_POTPGT) >> 24;
desc->bHubContrCurrent = 0;
int ports = HCS_N_PORTS(oxu->hcs_params);
u16 temp;
- desc->bDescriptorType = 0x29;
+ desc->bDescriptorType = USB_DT_HUB;
desc->bPwrOn2PwrGood = 10; /* oxu 1.0, 2.3.9 says 20ms max */
desc->bHubContrCurrent = 0;
|| oxu->reset_done[i] != 0)
continue;
- /* start 20 msec resume signaling from this port,
- * and make hub_wq collect PORT_STAT_C_SUSPEND to
+ /* start USB_RESUME_TIMEOUT resume signaling from this
+ * port, and make hub_wq collect PORT_STAT_C_SUSPEND to
* stop that signaling.
*/
- oxu->reset_done[i] = jiffies + msecs_to_jiffies(20);
+ oxu->reset_done[i] = jiffies +
+ msecs_to_jiffies(USB_RESUME_TIMEOUT);
oxu_dbg(oxu, "port %d remote wakeup\n", i + 1);
mod_timer(&hcd->rh_timer, oxu->reset_done[i]);
}
static void r8a66597_hub_descriptor(struct r8a66597 *r8a66597,
struct usb_hub_descriptor *desc)
{
- desc->bDescriptorType = 0x29;
+ desc->bDescriptorType = USB_DT_HUB;
desc->bHubContrCurrent = 0;
desc->bNbrPorts = r8a66597->max_root_hub;
desc->bDescLength = 9;
rh->port &= ~USB_PORT_STAT_SUSPEND;
rh->port |= USB_PORT_STAT_C_SUSPEND << 16;
r8a66597_mdfy(r8a66597, RESUME, RESUME | UACT, dvstctr_reg);
- msleep(50);
+ msleep(USB_RESUME_TIMEOUT);
r8a66597_mdfy(r8a66597, UACT, RESUME | UACT, dvstctr_reg);
}
) {
u16 temp = 0;
- desc->bDescriptorType = 0x29;
+ desc->bDescriptorType = USB_DT_HUB;
desc->bHubContrCurrent = 0;
desc->bNbrPorts = 1;
sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
mod_timer(&sl811->timer, jiffies
- + msecs_to_jiffies(20));
+ + msecs_to_jiffies(USB_RESUME_TIMEOUT));
break;
case USB_PORT_FEAT_POWER:
port_power(sl811, 0);
.resume = sl811h_resume,
.driver = {
.name = (char *) hcd_name,
- .owner = THIS_MODULE,
},
};
EXPORT_SYMBOL(sl811h_driver);
retval = u132_read_pcimem(u132, roothub.a, &rh_a);
if (retval)
return retval;
- desc->bDescriptorType = 0x29;
+ desc->bDescriptorType = USB_DT_HUB;
desc->bPwrOn2PwrGood = (rh_a & RH_A_POTPGT) >> 24;
desc->bHubContrCurrent = 0;
desc->bNbrPorts = u132->num_ports;
static const __u8 root_hub_hub_des[] =
{
0x09, /* __u8 bLength; */
- 0x29, /* __u8 bDescriptorType; Hub-descriptor */
+ USB_DT_HUB, /* __u8 bDescriptorType; Hub-descriptor */
0x02, /* __u8 bNbrPorts; */
HUB_CHAR_NO_LPSM | /* __u16 wHubCharacteristics; */
HUB_CHAR_INDV_PORT_OCPM, /* (per-port OC, no power switching) */
/* Port received a wakeup request */
set_bit(port, &uhci->resuming_ports);
uhci->ports_timeout = jiffies +
- msecs_to_jiffies(25);
+ msecs_to_jiffies(USB_RESUME_TIMEOUT);
usb_hcd_start_port_resume(
&uhci_to_hcd(uhci)->self, port);
uhci_finish_suspend(uhci, port, port_addr);
/* USB v2.0 7.1.7.5 */
- uhci->ports_timeout = jiffies + msecs_to_jiffies(50);
+ uhci->ports_timeout = jiffies +
+ msecs_to_jiffies(USB_RESUME_TIMEOUT);
break;
case USB_PORT_FEAT_POWER:
/* UHCI has no power switching */
uwb_rc_put(wusbhc->uwb_rc);
error:
whc_clean_up(whc);
- if (usb_hcd)
- usb_put_hcd(usb_hcd);
+ usb_put_hcd(usb_hcd);
return ret;
}
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
+#include <linux/usb/phy.h>
#include <linux/slab.h>
#include <linux/usb/xhci_pdriver.h>
if (HCC_MAX_PSA(xhci->hcc_params) >= 4)
xhci->shared_hcd->can_do_streams = 1;
+ hcd->usb_phy = devm_usb_get_phy_by_phandle(&pdev->dev, "usb-phy", 0);
+ if (IS_ERR(hcd->usb_phy)) {
+ ret = PTR_ERR(hcd->usb_phy);
+ if (ret == -EPROBE_DEFER)
+ goto put_usb3_hcd;
+ hcd->usb_phy = NULL;
+ } else {
+ ret = usb_phy_init(hcd->usb_phy);
+ if (ret)
+ goto put_usb3_hcd;
+ }
+
ret = usb_add_hcd(xhci->shared_hcd, irq, IRQF_SHARED);
if (ret)
- goto put_usb3_hcd;
+ goto disable_usb_phy;
return 0;
+disable_usb_phy:
+ usb_phy_shutdown(hcd->usb_phy);
+
put_usb3_hcd:
usb_put_hcd(xhci->shared_hcd);
struct clk *clk = xhci->clk;
usb_remove_hcd(xhci->shared_hcd);
+ usb_phy_shutdown(hcd->usb_phy);
usb_put_hcd(xhci->shared_hcd);
usb_remove_hcd(hcd);
/* Toggle the cycle bit after the last ring segment. */
if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) {
- ring->cycle_state = (ring->cycle_state ? 0 : 1);
+ ring->cycle_state ^= 1;
}
}
ring->enq_seg = ring->enq_seg->next;
} else {
xhci_dbg(xhci, "resume HS port %d\n", port_id);
bus_state->resume_done[faked_port_index] = jiffies +
- msecs_to_jiffies(20);
+ msecs_to_jiffies(USB_RESUME_TIMEOUT);
set_bit(faked_port_index, &bus_state->resuming_ports);
mod_timer(&hcd->rh_timer,
bus_state->resume_done[faked_port_index]);
/* Toggle the cycle bit after the last ring segment. */
if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) {
- ring->cycle_state = (ring->cycle_state ? 0 : 1);
+ ring->cycle_state ^= 1;
}
ring->enq_seg = ring->enq_seg->next;
ring->enqueue = ring->enq_seg->trbs;
#undef TRACE_SYSTEM
#define TRACE_SYSTEM xhci-hcd
+/*
+ * The TRACE_SYSTEM_VAR defaults to TRACE_SYSTEM, but must be a
+ * legitimate C variable. It is not exported to user space.
+ */
+#undef TRACE_SYSTEM_VAR
+#define TRACE_SYSTEM_VAR xhci_hcd
+
#if !defined(__XHCI_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
#define __XHCI_TRACE_H
{
mdc800->camera_request_ready=1+mode;
- wait_event_timeout(mdc800->irq_wait, mdc800->irq_woken, msec*HZ/1000);
+ wait_event_timeout(mdc800->irq_wait, mdc800->irq_woken,
+ msecs_to_jiffies(msec));
mdc800->irq_woken = 0;
if (mdc800->camera_request_ready>0)
mutex_unlock(&mdc800->io_lock);
return len-left;
}
- wait_event_timeout(mdc800->download_wait, mdc800->downloaded,
- TO_DOWNLOAD_GET_READY*HZ/1000);
+ wait_event_timeout(mdc800->download_wait,
+ mdc800->downloaded,
+ msecs_to_jiffies(TO_DOWNLOAD_GET_READY));
mdc800->downloaded = 0;
if (mdc800->download_urb->status != 0)
{
mutex_unlock(&mdc800->io_lock);
return -EIO;
}
- wait_event_timeout(mdc800->write_wait, mdc800->written, TO_WRITE_GET_READY*HZ/1000);
+ wait_event_timeout(mdc800->write_wait, mdc800->written,
+ msecs_to_jiffies(TO_WRITE_GET_READY));
mdc800->written = 0;
if (mdc800->state == WORKING)
{
int ports = HCS_N_PORTS(priv->hcs_params);
u16 temp;
- desc->bDescriptorType = 0x29;
+ desc->bDescriptorType = USB_DT_HUB;
/* priv 1.0, 2.3.9 says 20ms max */
desc->bPwrOn2PwrGood = 10;
desc->bHubContrCurrent = 0;
reg_write32(hcd->regs, HC_PORTSC1,
temp | PORT_RESUME);
priv->reset_done = jiffies +
- msecs_to_jiffies(20);
+ msecs_to_jiffies(USB_RESUME_TIMEOUT);
}
break;
case USB_PORT_FEAT_C_SUSPEND:
This driver is for generating specific traffic for Super Speed Link
Layer Test Device. Say Y only when you want to conduct USB Super Speed
Link Layer Test for host controllers.
+
+config USB_CHAOSKEY
+ tristate "ChaosKey random number generator driver support"
+ depends on HW_RANDOM
+ help
+ Say Y here if you want to connect an AltusMetrum ChaosKey to
+ your computer's USB port. The ChaosKey is a hardware random
+ number generator which hooks into the kernel entropy pool to
+ ensure a large supply of entropy for /dev/random and
+ /dev/urandom and also provides direct access via /dev/chaoskeyX
+
+ To compile this driver as a module, choose M here: the
+ module will be called chaoskey.
obj-$(CONFIG_USB_SEVSEG) += usbsevseg.o
obj-$(CONFIG_USB_YUREX) += yurex.o
obj-$(CONFIG_USB_HSIC_USB3503) += usb3503.o
+obj-$(CONFIG_USB_CHAOSKEY) += chaoskey.o
obj-$(CONFIG_USB_SISUSBVGA) += sisusbvga/
obj-$(CONFIG_USB_LINK_LAYER_TEST) += lvstest.o
pdata->urbdata, pdata->urb->transfer_dma);
usb_free_urb(pdata->urb);
}
- if (pdata->bd && !IS_ERR(pdata->bd))
+ if (!IS_ERR(pdata->bd))
backlight_device_unregister(pdata->bd);
kfree(pdata->msgdata);
}
--- /dev/null
+/*
+ * chaoskey - driver for ChaosKey device from Altus Metrum.
+ *
+ * This device provides true random numbers using a noise source based
+ * on a reverse-biased p-n junction in avalanche breakdown. More
+ * details can be found at http://chaoskey.org
+ *
+ * The driver connects to the kernel hardware RNG interface to provide
+ * entropy for /dev/random and other kernel activities. It also offers
+ * a separate /dev/ entry to allow for direct access to the random
+ * bit stream.
+ *
+ * Copyright © 2015 Keith Packard <keithp@keithp.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/usb.h>
+#include <linux/wait.h>
+#include <linux/hw_random.h>
+#include <linux/mutex.h>
+#include <linux/uaccess.h>
+
+static struct usb_driver chaoskey_driver;
+static struct usb_class_driver chaoskey_class;
+static int chaoskey_rng_read(struct hwrng *rng, void *data,
+ size_t max, bool wait);
+
+#define usb_dbg(usb_if, format, arg...) \
+ dev_dbg(&(usb_if)->dev, format, ## arg)
+
+#define usb_err(usb_if, format, arg...) \
+ dev_err(&(usb_if)->dev, format, ## arg)
+
+/* Version Information */
+#define DRIVER_VERSION "v0.1"
+#define DRIVER_AUTHOR "Keith Packard, keithp@keithp.com"
+#define DRIVER_DESC "Altus Metrum ChaosKey driver"
+#define DRIVER_SHORT "chaoskey"
+
+MODULE_VERSION(DRIVER_VERSION);
+MODULE_AUTHOR(DRIVER_AUTHOR);
+MODULE_DESCRIPTION(DRIVER_DESC);
+MODULE_LICENSE("GPL");
+
+#define CHAOSKEY_VENDOR_ID 0x1d50 /* OpenMoko */
+#define CHAOSKEY_PRODUCT_ID 0x60c6 /* ChaosKey */
+
+#define CHAOSKEY_BUF_LEN 64 /* max size of USB full speed packet */
+
+#define NAK_TIMEOUT (HZ) /* stall/wait timeout for device */
+
+#ifdef CONFIG_USB_DYNAMIC_MINORS
+#define USB_CHAOSKEY_MINOR_BASE 0
+#else
+
+/* IOWARRIOR_MINOR_BASE + 16, not official yet */
+#define USB_CHAOSKEY_MINOR_BASE 224
+#endif
+
+static const struct usb_device_id chaoskey_table[] = {
+ { USB_DEVICE(CHAOSKEY_VENDOR_ID, CHAOSKEY_PRODUCT_ID) },
+ { },
+};
+MODULE_DEVICE_TABLE(usb, chaoskey_table);
+
+/* Driver-local specific stuff */
+struct chaoskey {
+ struct usb_interface *interface;
+ char in_ep;
+ struct mutex lock;
+ struct mutex rng_lock;
+ int open; /* open count */
+ int present; /* device not disconnected */
+ int size; /* size of buf */
+ int valid; /* bytes of buf read */
+ int used; /* bytes of buf consumed */
+ char *name; /* product + serial */
+ struct hwrng hwrng; /* Embedded struct for hwrng */
+ int hwrng_registered; /* registered with hwrng API */
+ wait_queue_head_t wait_q; /* for timeouts */
+ char *buf;
+};
+
+static void chaoskey_free(struct chaoskey *dev)
+{
+ usb_dbg(dev->interface, "free");
+ kfree(dev->name);
+ kfree(dev->buf);
+ kfree(dev);
+}
+
+static int chaoskey_probe(struct usb_interface *interface,
+ const struct usb_device_id *id)
+{
+ struct usb_device *udev = interface_to_usbdev(interface);
+ struct usb_host_interface *altsetting = interface->cur_altsetting;
+ int i;
+ int in_ep = -1;
+ struct chaoskey *dev;
+ int result;
+ int size;
+
+ usb_dbg(interface, "probe %s-%s", udev->product, udev->serial);
+
+ /* Find the first bulk IN endpoint and its packet size */
+ for (i = 0; i < altsetting->desc.bNumEndpoints; i++) {
+ if (usb_endpoint_is_bulk_in(&altsetting->endpoint[i].desc)) {
+ in_ep = usb_endpoint_num(&altsetting->endpoint[i].desc);
+ size = usb_endpoint_maxp(&altsetting->endpoint[i].desc);
+ break;
+ }
+ }
+
+ /* Validate endpoint and size */
+ if (in_ep == -1) {
+ usb_dbg(interface, "no IN endpoint found");
+ return -ENODEV;
+ }
+ if (size <= 0) {
+ usb_dbg(interface, "invalid size (%d)", size);
+ return -ENODEV;
+ }
+
+ if (size > CHAOSKEY_BUF_LEN) {
+ usb_dbg(interface, "size reduced from %d to %d\n",
+ size, CHAOSKEY_BUF_LEN);
+ size = CHAOSKEY_BUF_LEN;
+ }
+
+ /* Looks good, allocate and initialize */
+
+ dev = kzalloc(sizeof(struct chaoskey), GFP_KERNEL);
+
+ if (dev == NULL)
+ return -ENOMEM;
+
+ dev->buf = kmalloc(size, GFP_KERNEL);
+
+ if (dev->buf == NULL) {
+ kfree(dev);
+ return -ENOMEM;
+ }
+
+ /* Construct a name using the product and serial values. Each
+ * device needs a unique name for the hwrng code
+ */
+
+ if (udev->product && udev->serial) {
+ dev->name = kmalloc(strlen(udev->product) + 1 +
+ strlen(udev->serial) + 1, GFP_KERNEL);
+ if (dev->name == NULL) {
+ kfree(dev->buf);
+ kfree(dev);
+ return -ENOMEM;
+ }
+
+ strcpy(dev->name, udev->product);
+ strcat(dev->name, "-");
+ strcat(dev->name, udev->serial);
+ }
+
+ dev->interface = interface;
+
+ dev->in_ep = in_ep;
+
+ dev->size = size;
+ dev->present = 1;
+
+ init_waitqueue_head(&dev->wait_q);
+
+ mutex_init(&dev->lock);
+ mutex_init(&dev->rng_lock);
+
+ usb_set_intfdata(interface, dev);
+
+ result = usb_register_dev(interface, &chaoskey_class);
+ if (result) {
+ usb_err(interface, "Unable to allocate minor number.");
+ usb_set_intfdata(interface, NULL);
+ chaoskey_free(dev);
+ return result;
+ }
+
+ dev->hwrng.name = dev->name ? dev->name : chaoskey_driver.name;
+ dev->hwrng.read = chaoskey_rng_read;
+
+ /* Set the 'quality' metric. Quality is measured in units of
+ * 1/1024's of a bit ("mills"). This should be set to 1024,
+ * but there is a bug in the hwrng core which masks it with
+ * 1023.
+ *
+ * The patch that has been merged to the crypto development
+ * tree for that bug limits the value to 1024 at most, so by
+ * setting this to 1024 + 1023, we get 1023 before the fix is
+ * merged and 1024 afterwards. We'll patch this driver once
+ * both bits of code are in the same tree.
+ */
+ dev->hwrng.quality = 1024 + 1023;
+
+ dev->hwrng_registered = (hwrng_register(&dev->hwrng) == 0);
+ if (!dev->hwrng_registered)
+ usb_err(interface, "Unable to register with hwrng");
+
+ usb_enable_autosuspend(udev);
+
+ usb_dbg(interface, "chaoskey probe success, size %d", dev->size);
+ return 0;
+}
+
+static void chaoskey_disconnect(struct usb_interface *interface)
+{
+ struct chaoskey *dev;
+
+ usb_dbg(interface, "disconnect");
+ dev = usb_get_intfdata(interface);
+ if (!dev) {
+ usb_dbg(interface, "disconnect failed - no dev");
+ return;
+ }
+
+ if (dev->hwrng_registered)
+ hwrng_unregister(&dev->hwrng);
+
+ usb_deregister_dev(interface, &chaoskey_class);
+
+ usb_set_intfdata(interface, NULL);
+ mutex_lock(&dev->lock);
+
+ dev->present = 0;
+
+ if (!dev->open) {
+ mutex_unlock(&dev->lock);
+ chaoskey_free(dev);
+ } else
+ mutex_unlock(&dev->lock);
+
+ usb_dbg(interface, "disconnect done");
+}
+
+static int chaoskey_open(struct inode *inode, struct file *file)
+{
+ struct chaoskey *dev;
+ struct usb_interface *interface;
+
+ /* get the interface from minor number and driver information */
+ interface = usb_find_interface(&chaoskey_driver, iminor(inode));
+ if (!interface)
+ return -ENODEV;
+
+ usb_dbg(interface, "open");
+
+ dev = usb_get_intfdata(interface);
+ if (!dev) {
+ usb_dbg(interface, "open (dev)");
+ return -ENODEV;
+ }
+
+ file->private_data = dev;
+ mutex_lock(&dev->lock);
+ ++dev->open;
+ mutex_unlock(&dev->lock);
+
+ usb_dbg(interface, "open success");
+ return 0;
+}
+
+static int chaoskey_release(struct inode *inode, struct file *file)
+{
+ struct chaoskey *dev = file->private_data;
+ struct usb_interface *interface;
+
+ if (dev == NULL)
+ return -ENODEV;
+
+ interface = dev->interface;
+
+ usb_dbg(interface, "release");
+
+ mutex_lock(&dev->lock);
+
+ usb_dbg(interface, "open count at release is %d", dev->open);
+
+ if (dev->open <= 0) {
+ usb_dbg(interface, "invalid open count (%d)", dev->open);
+ mutex_unlock(&dev->lock);
+ return -ENODEV;
+ }
+
+ --dev->open;
+
+ if (!dev->present) {
+ if (dev->open == 0) {
+ mutex_unlock(&dev->lock);
+ chaoskey_free(dev);
+ } else
+ mutex_unlock(&dev->lock);
+ } else
+ mutex_unlock(&dev->lock);
+
+ usb_dbg(interface, "release success");
+ return 0;
+}
+
+/* Fill the buffer. Called with dev->lock held
+ */
+static int _chaoskey_fill(struct chaoskey *dev)
+{
+ DEFINE_WAIT(wait);
+ int result;
+ int this_read;
+ struct usb_device *udev = interface_to_usbdev(dev->interface);
+
+ usb_dbg(dev->interface, "fill");
+
+ /* Return immediately if someone called before the buffer was
+ * empty */
+ if (dev->valid != dev->used) {
+ usb_dbg(dev->interface, "not empty yet (valid %d used %d)",
+ dev->valid, dev->used);
+ return 0;
+ }
+
+ /* Bail if the device has been removed */
+ if (!dev->present) {
+ usb_dbg(dev->interface, "device not present");
+ return -ENODEV;
+ }
+
+ /* Make sure the device is awake */
+ result = usb_autopm_get_interface(dev->interface);
+ if (result) {
+ usb_dbg(dev->interface, "wakeup failed (result %d)", result);
+ return result;
+ }
+
+ result = usb_bulk_msg(udev,
+ usb_rcvbulkpipe(udev, dev->in_ep),
+ dev->buf, dev->size, &this_read,
+ NAK_TIMEOUT);
+
+ /* Let the device go back to sleep eventually */
+ usb_autopm_put_interface(dev->interface);
+
+ if (result == 0) {
+ dev->valid = this_read;
+ dev->used = 0;
+ }
+
+ usb_dbg(dev->interface, "bulk_msg result %d this_read %d",
+ result, this_read);
+
+ return result;
+}
+
+static ssize_t chaoskey_read(struct file *file,
+ char __user *buffer,
+ size_t count,
+ loff_t *ppos)
+{
+ struct chaoskey *dev;
+ ssize_t read_count = 0;
+ int this_time;
+ int result = 0;
+ unsigned long remain;
+
+ dev = file->private_data;
+
+ if (dev == NULL || !dev->present)
+ return -ENODEV;
+
+ usb_dbg(dev->interface, "read %zu", count);
+
+ while (count > 0) {
+
+ /* Grab the rng_lock briefly to ensure that the hwrng interface
+ * gets priority over other user access
+ */
+ result = mutex_lock_interruptible(&dev->rng_lock);
+ if (result)
+ goto bail;
+ mutex_unlock(&dev->rng_lock);
+
+ result = mutex_lock_interruptible(&dev->lock);
+ if (result)
+ goto bail;
+ if (dev->valid == dev->used) {
+ result = _chaoskey_fill(dev);
+ if (result) {
+ mutex_unlock(&dev->lock);
+ goto bail;
+ }
+
+ /* Read returned zero bytes */
+ if (dev->used == dev->valid) {
+ mutex_unlock(&dev->lock);
+ goto bail;
+ }
+ }
+
+ this_time = dev->valid - dev->used;
+ if (this_time > count)
+ this_time = count;
+
+ remain = copy_to_user(buffer, dev->buf + dev->used, this_time);
+ if (remain) {
+ result = -EFAULT;
+
+ /* Consume the bytes that were copied so we don't leak
+ * data to user space
+ */
+ dev->used += this_time - remain;
+ mutex_unlock(&dev->lock);
+ goto bail;
+ }
+
+ count -= this_time;
+ read_count += this_time;
+ buffer += this_time;
+ dev->used += this_time;
+ mutex_unlock(&dev->lock);
+ }
+bail:
+ if (read_count) {
+ usb_dbg(dev->interface, "read %zu bytes", read_count);
+ return read_count;
+ }
+ usb_dbg(dev->interface, "empty read, result %d", result);
+ return result;
+}
+
+static int chaoskey_rng_read(struct hwrng *rng, void *data,
+ size_t max, bool wait)
+{
+ struct chaoskey *dev = container_of(rng, struct chaoskey, hwrng);
+ int this_time;
+
+ usb_dbg(dev->interface, "rng_read max %zu wait %d", max, wait);
+
+ if (!dev->present) {
+ usb_dbg(dev->interface, "device not present");
+ return 0;
+ }
+
+ /* Hold the rng_lock until we acquire the device lock so that
+ * this operation gets priority over other user access to the
+ * device
+ */
+ mutex_lock(&dev->rng_lock);
+
+ mutex_lock(&dev->lock);
+
+ mutex_unlock(&dev->rng_lock);
+
+ /* Try to fill the buffer if empty. It doesn't actually matter
+ * if _chaoskey_fill works; we'll just return zero bytes as
+ * the buffer will still be empty
+ */
+ if (dev->valid == dev->used)
+ (void) _chaoskey_fill(dev);
+
+ this_time = dev->valid - dev->used;
+ if (this_time > max)
+ this_time = max;
+
+ memcpy(data, dev->buf, this_time);
+
+ dev->used += this_time;
+
+ mutex_unlock(&dev->lock);
+
+ usb_dbg(dev->interface, "rng_read this_time %d\n", this_time);
+ return this_time;
+}
+
+#ifdef CONFIG_PM
+static int chaoskey_suspend(struct usb_interface *interface,
+ pm_message_t message)
+{
+ usb_dbg(interface, "suspend");
+ return 0;
+}
+
+static int chaoskey_resume(struct usb_interface *interface)
+{
+ usb_dbg(interface, "resume");
+ return 0;
+}
+#else
+#define chaoskey_suspend NULL
+#define chaoskey_resume NULL
+#endif
+
+/* file operation pointers */
+static const struct file_operations chaoskey_fops = {
+ .owner = THIS_MODULE,
+ .read = chaoskey_read,
+ .open = chaoskey_open,
+ .release = chaoskey_release,
+ .llseek = default_llseek,
+};
+
+/* class driver information */
+static struct usb_class_driver chaoskey_class = {
+ .name = "chaoskey%d",
+ .fops = &chaoskey_fops,
+ .minor_base = USB_CHAOSKEY_MINOR_BASE,
+};
+
+/* usb specific object needed to register this driver with the usb subsystem */
+static struct usb_driver chaoskey_driver = {
+ .name = DRIVER_SHORT,
+ .probe = chaoskey_probe,
+ .disconnect = chaoskey_disconnect,
+ .suspend = chaoskey_suspend,
+ .resume = chaoskey_resume,
+ .reset_resume = chaoskey_resume,
+ .id_table = chaoskey_table,
+ .supports_autosuspend = 1,
+};
+
+module_usb_driver(chaoskey_driver);
+
}
if (read_timeout) {
- timeout = jiffies + read_timeout * HZ / 1000;
+ timeout = jiffies + msecs_to_jiffies(read_timeout);
}
/* wait for data */
/* reset read timeout during read or write activity */
if (read_timeout
&& (dev->read_buffer_length || dev->interrupt_out_busy)) {
- timeout = jiffies + read_timeout * HZ / 1000;
+ timeout = jiffies + msecs_to_jiffies(read_timeout);
}
/* check for read timeout */
if (read_timeout && time_after (jiffies, timeout)) {
dev->read_buffer_length = 0;
dev->read_packet_length = 0;
spin_lock_init (&dev->read_buffer_lock);
- dev->packet_timeout_jiffies = packet_timeout * HZ / 1000;
+ dev->packet_timeout_jiffies = msecs_to_jiffies(packet_timeout);
dev->read_last_arrival = jiffies;
init_waitqueue_head (&dev->read_wait);
hub->mode = pdata->initial_mode;
} else if (np) {
struct clk *clk;
+ u32 rate = 0;
hub->port_off_mask = 0;
+ if (!of_property_read_u32(np, "refclk-frequency", &rate)) {
+ switch (rate) {
+ case 38400000:
+ case 26000000:
+ case 19200000:
+ case 12000000:
+ hub->secondary_ref_clk = 0;
+ break;
+ case 24000000:
+ case 27000000:
+ case 25000000:
+ case 50000000:
+ hub->secondary_ref_clk = 1;
+ break;
+ default:
+ dev_err(dev,
+ "unsupported reference clock rate (%d)\n",
+ (int) rate);
+ return -EINVAL;
+ }
+ }
+
clk = devm_clk_get(dev, "refclk");
if (IS_ERR(clk) && PTR_ERR(clk) != -ENOENT) {
dev_err(dev, "unable to request refclk (%ld)\n",
}
if (!IS_ERR(clk)) {
- u32 rate = 0;
hub->clk = clk;
- if (!of_property_read_u32(np, "refclk-frequency",
- &rate)) {
-
- switch (rate) {
- case 38400000:
- case 26000000:
- case 19200000:
- case 12000000:
- hub->secondary_ref_clk = 0;
- break;
- case 24000000:
- case 27000000:
- case 25000000:
- case 50000000:
- hub->secondary_ref_clk = 1;
- break;
- default:
- dev_err(dev,
- "unsupported reference clock rate (%d)\n",
- (int) rate);
- return -EINVAL;
- }
+ if (rate != 0) {
err = clk_set_rate(hub->clk, rate);
if (err) {
dev_err(dev,
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/dma-mapping.h>
+#include <linux/usb.h>
#include "musb_core.h"
musb->port1_status &= ~(USB_PORT_STAT_C_CONNECTION << 16);
}
-static void musb_generic_disable(struct musb *musb);
+static void musb_recover_from_babble(struct musb *musb);
+
/*
* Interrupt Service Routine to record USB "global" interrupts.
* Since these do not happen often and signify things of
*/
if (int_usb & MUSB_INTR_RESUME) {
handled = IRQ_HANDLED;
- dev_dbg(musb->controller, "RESUME (%s)\n", usb_otg_state_string(musb->xceiv->otg->state));
+ dev_dbg(musb->controller, "RESUME (%s)\n",
+ usb_otg_state_string(musb->xceiv->otg->state));
if (devctl & MUSB_DEVCTL_HM) {
- void __iomem *mbase = musb->mregs;
- u8 power;
-
switch (musb->xceiv->otg->state) {
case OTG_STATE_A_SUSPEND:
/* remote wakeup? later, GetPortStatus
* will stop RESUME signaling
*/
- power = musb_readb(musb->mregs, MUSB_POWER);
- if (power & MUSB_POWER_SUSPENDM) {
- /* spurious */
- musb->int_usb &= ~MUSB_INTR_SUSPEND;
- dev_dbg(musb->controller, "Spurious SUSPENDM\n");
- break;
- }
-
- power &= ~MUSB_POWER_SUSPENDM;
- musb_writeb(mbase, MUSB_POWER,
- power | MUSB_POWER_RESUME);
-
musb->port1_status |=
(USB_PORT_STAT_C_SUSPEND << 16)
| MUSB_PORT_STAT_RESUME;
musb->rh_timer = jiffies
- + msecs_to_jiffies(20);
+ + msecs_to_jiffies(USB_RESUME_TIMEOUT);
musb->need_finish_resume = 1;
musb->xceiv->otg->state = OTG_STATE_A_HOST;
musb->ep0_stage = MUSB_EP0_START;
- /* flush endpoints when transitioning from Device Mode */
- if (is_peripheral_active(musb)) {
- /* REVISIT HNP; just force disconnect */
- }
musb->intrtxe = musb->epmask;
musb_writew(musb->mregs, MUSB_INTRTXE, musb->intrtxe);
musb->intrrxe = musb->epmask & 0xfffe;
*/
if (int_usb & MUSB_INTR_RESET) {
handled = IRQ_HANDLED;
- if ((devctl & MUSB_DEVCTL_HM) != 0) {
+ if (devctl & MUSB_DEVCTL_HM) {
/*
- * Looks like non-HS BABBLE can be ignored, but
- * HS BABBLE is an error condition. For HS the solution
- * is to avoid babble in the first place and fix what
- * caused BABBLE. When HS BABBLE happens we can only
- * stop the session.
+ * When BABBLE happens what we can depends on which
+ * platform MUSB is running, because some platforms
+ * implemented proprietary means for 'recovering' from
+ * Babble conditions. One such platform is AM335x. In
+ * most cases, however, the only thing we can do is
+ * drop the session.
*/
- if (devctl & (MUSB_DEVCTL_FSDEV | MUSB_DEVCTL_LSDEV))
- dev_dbg(musb->controller, "BABBLE devctl: %02x\n", devctl);
- else {
- ERR("Stopping host session -- babble\n");
- musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
- }
+ dev_err(musb->controller, "Babble\n");
+
+ if (is_host_active(musb))
+ musb_recover_from_babble(musb);
} else {
dev_dbg(musb->controller, "BUS RESET as %s\n",
usb_otg_state_string(musb->xceiv->otg->state));
}
}
- /* handle babble condition */
- if (int_usb & MUSB_INTR_BABBLE && is_host_active(musb)) {
- musb_generic_disable(musb);
- schedule_delayed_work(&musb->recover_work,
- msecs_to_jiffies(100));
- }
-
#if 0
/* REVISIT ... this would be for multiplexing periodic endpoints, or
* supporting transfer phasing to prevent exceeding ISO bandwidth
/*-------------------------------------------------------------------------*/
-static void musb_generic_disable(struct musb *musb)
+static void musb_disable_interrupts(struct musb *musb)
{
void __iomem *mbase = musb->mregs;
u16 temp;
musb->intrrxe = 0;
musb_writew(mbase, MUSB_INTRRXE, 0);
- /* off */
- musb_writeb(mbase, MUSB_DEVCTL, 0);
-
/* flush pending interrupts */
temp = musb_readb(mbase, MUSB_INTRUSB);
temp = musb_readw(mbase, MUSB_INTRTX);
temp = musb_readw(mbase, MUSB_INTRRX);
+}
+
+static void musb_enable_interrupts(struct musb *musb)
+{
+ void __iomem *regs = musb->mregs;
+
+ /* Set INT enable registers, enable interrupts */
+ musb->intrtxe = musb->epmask;
+ musb_writew(regs, MUSB_INTRTXE, musb->intrtxe);
+ musb->intrrxe = musb->epmask & 0xfffe;
+ musb_writew(regs, MUSB_INTRRXE, musb->intrrxe);
+ musb_writeb(regs, MUSB_INTRUSBE, 0xf7);
+
+}
+
+static void musb_generic_disable(struct musb *musb)
+{
+ void __iomem *mbase = musb->mregs;
+ musb_disable_interrupts(musb);
+
+ /* off */
+ musb_writeb(mbase, MUSB_DEVCTL, 0);
}
/*
dev_dbg(musb->controller, "<== devctl %02x\n", devctl);
- /* Set INT enable registers, enable interrupts */
- musb->intrtxe = musb->epmask;
- musb_writew(regs, MUSB_INTRTXE, musb->intrtxe);
- musb->intrrxe = musb->epmask & 0xfffe;
- musb_writew(regs, MUSB_INTRRXE, musb->intrrxe);
- musb_writeb(regs, MUSB_INTRUSBE, 0xf7);
-
+ musb_enable_interrupts(musb);
musb_writeb(regs, MUSB_TESTMODE, 0);
/* put into basic highspeed mode and start session */
irqreturn_t musb_interrupt(struct musb *musb)
{
irqreturn_t retval = IRQ_NONE;
+ unsigned long status;
+ unsigned long epnum;
u8 devctl;
- int ep_num;
- u32 reg;
+
+ if (!musb->int_usb && !musb->int_tx && !musb->int_rx)
+ return IRQ_NONE;
devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
is_host_active(musb) ? "host" : "peripheral",
musb->int_usb, musb->int_tx, musb->int_rx);
- /* the core can interrupt us for multiple reasons; docs have
- * a generic interrupt flowchart to follow
+ /**
+ * According to Mentor Graphics' documentation, flowchart on page 98,
+ * IRQ should be handled as follows:
+ *
+ * . Resume IRQ
+ * . Session Request IRQ
+ * . VBUS Error IRQ
+ * . Suspend IRQ
+ * . Connect IRQ
+ * . Disconnect IRQ
+ * . Reset/Babble IRQ
+ * . SOF IRQ (we're not using this one)
+ * . Endpoint 0 IRQ
+ * . TX Endpoints
+ * . RX Endpoints
+ *
+ * We will be following that flowchart in order to avoid any problems
+ * that might arise with internal Finite State Machine.
*/
- if (musb->int_usb)
- retval |= musb_stage0_irq(musb, musb->int_usb,
- devctl);
- /* "stage 1" is handling endpoint irqs */
+ if (musb->int_usb)
+ retval |= musb_stage0_irq(musb, musb->int_usb, devctl);
- /* handle endpoint 0 first */
if (musb->int_tx & 1) {
if (is_host_active(musb))
retval |= musb_h_ep0_irq(musb);
else
retval |= musb_g_ep0_irq(musb);
+
+ /* we have just handled endpoint 0 IRQ, clear it */
+ musb->int_tx &= ~BIT(0);
}
- /* RX on endpoints 1-15 */
- reg = musb->int_rx >> 1;
- ep_num = 1;
- while (reg) {
- if (reg & 1) {
- /* musb_ep_select(musb->mregs, ep_num); */
- /* REVISIT just retval = ep->rx_irq(...) */
- retval = IRQ_HANDLED;
- if (is_host_active(musb))
- musb_host_rx(musb, ep_num);
- else
- musb_g_rx(musb, ep_num);
- }
+ status = musb->int_tx;
- reg >>= 1;
- ep_num++;
+ for_each_set_bit(epnum, &status, 16) {
+ retval = IRQ_HANDLED;
+ if (is_host_active(musb))
+ musb_host_tx(musb, epnum);
+ else
+ musb_g_tx(musb, epnum);
}
- /* TX on endpoints 1-15 */
- reg = musb->int_tx >> 1;
- ep_num = 1;
- while (reg) {
- if (reg & 1) {
- /* musb_ep_select(musb->mregs, ep_num); */
- /* REVISIT just retval |= ep->tx_irq(...) */
- retval = IRQ_HANDLED;
- if (is_host_active(musb))
- musb_host_tx(musb, ep_num);
- else
- musb_g_tx(musb, ep_num);
- }
- reg >>= 1;
- ep_num++;
+ status = musb->int_rx;
+
+ for_each_set_bit(epnum, &status, 16) {
+ retval = IRQ_HANDLED;
+ if (is_host_active(musb))
+ musb_host_rx(musb, epnum);
+ else
+ musb_g_rx(musb, epnum);
}
return retval;
}
}
-/* Recover from babble interrupt conditions */
-static void musb_recover_work(struct work_struct *data)
+static void musb_recover_from_babble(struct musb *musb)
{
- struct musb *musb = container_of(data, struct musb, recover_work.work);
- int status, ret;
+ int ret;
+ u8 devctl;
- ret = musb_platform_reset(musb);
- if (ret)
+ musb_disable_interrupts(musb);
+
+ /*
+ * wait at least 320 cycles of 60MHz clock. That's 5.3us, we will give
+ * it some slack and wait for 10us.
+ */
+ udelay(10);
+
+ ret = musb_platform_recover(musb);
+ if (ret) {
+ musb_enable_interrupts(musb);
return;
+ }
- usb_phy_vbus_off(musb->xceiv);
- usleep_range(100, 200);
+ /* drop session bit */
+ devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
+ devctl &= ~MUSB_DEVCTL_SESSION;
+ musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
- usb_phy_vbus_on(musb->xceiv);
- usleep_range(100, 200);
+ /* tell usbcore about it */
+ musb_root_disconnect(musb);
/*
* When a babble condition occurs, the musb controller
* removes the session bit and the endpoint config is lost.
*/
if (musb->dyn_fifo)
- status = ep_config_from_table(musb);
+ ret = ep_config_from_table(musb);
else
- status = ep_config_from_hw(musb);
+ ret = ep_config_from_hw(musb);
- /* start the session again */
- if (status == 0)
+ /* restart session */
+ if (ret == 0)
musb_start(musb);
}
/* Init IRQ workqueue before request_irq */
INIT_WORK(&musb->irq_work, musb_irq_work);
- INIT_DELAYED_WORK(&musb->recover_work, musb_recover_work);
INIT_DELAYED_WORK(&musb->deassert_reset_work, musb_deassert_reset);
INIT_DELAYED_WORK(&musb->finish_resume_work, musb_host_finish_resume);
fail3:
cancel_work_sync(&musb->irq_work);
- cancel_delayed_work_sync(&musb->recover_work);
cancel_delayed_work_sync(&musb->finish_resume_work);
cancel_delayed_work_sync(&musb->deassert_reset_work);
if (musb->dma_controller)
dma_controller_destroy(musb->dma_controller);
cancel_work_sync(&musb->irq_work);
- cancel_delayed_work_sync(&musb->recover_work);
cancel_delayed_work_sync(&musb->finish_resume_work);
cancel_delayed_work_sync(&musb->deassert_reset_work);
musb_free(musb);
if (musb->need_finish_resume) {
musb->need_finish_resume = 0;
schedule_delayed_work(&musb->finish_resume_work,
- msecs_to_jiffies(20));
+ msecs_to_jiffies(USB_RESUME_TIMEOUT));
}
/*
if (musb->need_finish_resume) {
musb->need_finish_resume = 0;
schedule_delayed_work(&musb->finish_resume_work,
- msecs_to_jiffies(20));
+ msecs_to_jiffies(USB_RESUME_TIMEOUT));
}
return 0;
* @init: turns on clocks, sets up platform-specific registers, etc
* @exit: undoes @init
* @set_mode: forcefully changes operating mode
- * @try_ilde: tries to idle the IP
+ * @try_idle: tries to idle the IP
+ * @recover: platform-specific babble recovery
* @vbus_status: returns vbus status if possible
* @set_vbus: forces vbus status
* @adjust_channel_params: pre check for standard dma channel_program func
void (*write_fifo)(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf);
int (*set_mode)(struct musb *musb, u8 mode);
void (*try_idle)(struct musb *musb, unsigned long timeout);
- int (*reset)(struct musb *musb);
+ int (*recover)(struct musb *musb);
int (*vbus_status)(struct musb *musb);
void (*set_vbus)(struct musb *musb, int on);
irqreturn_t (*isr)(int, void *);
struct work_struct irq_work;
- struct delayed_work recover_work;
struct delayed_work deassert_reset_work;
struct delayed_work finish_resume_work;
u16 hwvers;
musb->ops->try_idle(musb, timeout);
}
-static inline int musb_platform_reset(struct musb *musb)
+static inline int musb_platform_recover(struct musb *musb)
{
- if (!musb->ops->reset)
- return -EINVAL;
+ if (!musb->ops->recover)
+ return 0;
- return musb->ops->reset(musb);
+ return musb->ops->recover(musb);
}
static inline int musb_platform_get_vbus_status(struct musb *musb)
struct dma_channel *channel = private_data;
struct cppi41_dma_channel *cppi41_channel = channel->private_data;
struct musb_hw_ep *hw_ep = cppi41_channel->hw_ep;
+ struct cppi41_dma_controller *controller;
struct musb *musb = hw_ep->musb;
unsigned long flags;
struct dma_tx_state txstate;
u32 transferred;
+ int is_hs = 0;
bool empty;
spin_lock_irqsave(&musb->lock, flags);
transferred < cppi41_channel->packet_sz)
cppi41_channel->prog_len = 0;
- empty = musb_is_tx_fifo_empty(hw_ep);
- if (empty) {
+ if (cppi41_channel->is_tx)
+ empty = musb_is_tx_fifo_empty(hw_ep);
+
+ if (!cppi41_channel->is_tx || empty) {
cppi41_trans_done(cppi41_channel);
- } else {
- struct cppi41_dma_controller *controller;
- int is_hs = 0;
- /*
- * On AM335x it has been observed that the TX interrupt fires
- * too early that means the TXFIFO is not yet empty but the DMA
- * engine says that it is done with the transfer. We don't
- * receive a FIFO empty interrupt so the only thing we can do is
- * to poll for the bit. On HS it usually takes 2us, on FS around
- * 110us - 150us depending on the transfer size.
- * We spin on HS (no longer than than 25us and setup a timer on
- * FS to check for the bit and complete the transfer.
- */
- controller = cppi41_channel->controller;
+ goto out;
+ }
- if (is_host_active(musb)) {
- if (musb->port1_status & USB_PORT_STAT_HIGH_SPEED)
- is_hs = 1;
- } else {
- if (musb->g.speed == USB_SPEED_HIGH)
- is_hs = 1;
- }
- if (is_hs) {
- unsigned wait = 25;
-
- do {
- empty = musb_is_tx_fifo_empty(hw_ep);
- if (empty)
- break;
- wait--;
- if (!wait)
- break;
- udelay(1);
- } while (1);
+ /*
+ * On AM335x it has been observed that the TX interrupt fires
+ * too early that means the TXFIFO is not yet empty but the DMA
+ * engine says that it is done with the transfer. We don't
+ * receive a FIFO empty interrupt so the only thing we can do is
+ * to poll for the bit. On HS it usually takes 2us, on FS around
+ * 110us - 150us depending on the transfer size.
+ * We spin on HS (no longer than than 25us and setup a timer on
+ * FS to check for the bit and complete the transfer.
+ */
+ controller = cppi41_channel->controller;
+
+ if (is_host_active(musb)) {
+ if (musb->port1_status & USB_PORT_STAT_HIGH_SPEED)
+ is_hs = 1;
+ } else {
+ if (musb->g.speed == USB_SPEED_HIGH)
+ is_hs = 1;
+ }
+ if (is_hs) {
+ unsigned wait = 25;
+ do {
empty = musb_is_tx_fifo_empty(hw_ep);
if (empty) {
cppi41_trans_done(cppi41_channel);
goto out;
}
- }
- list_add_tail(&cppi41_channel->tx_check,
- &controller->early_tx_list);
- if (!hrtimer_is_queued(&controller->early_tx)) {
- unsigned long usecs = cppi41_channel->total_len / 10;
+ wait--;
+ if (!wait)
+ break;
+ cpu_relax();
+ } while (1);
+ }
+ list_add_tail(&cppi41_channel->tx_check,
+ &controller->early_tx_list);
+ if (!hrtimer_is_queued(&controller->early_tx)) {
+ unsigned long usecs = cppi41_channel->total_len / 10;
- hrtimer_start_range_ns(&controller->early_tx,
+ hrtimer_start_range_ns(&controller->early_tx,
ktime_set(0, usecs * NSEC_PER_USEC),
20 * NSEC_PER_USEC,
HRTIMER_MODE_REL);
- }
}
+
out:
spin_unlock_irqrestore(&musb->lock, flags);
}
unsigned iddig:5;
unsigned iddig_mux:5;
/* miscellaneous stuff */
- u8 poll_seconds;
+ unsigned poll_timeout;
};
/*
dsps_writel(reg_base, wrp->epintr_set, epmask);
dsps_writel(reg_base, wrp->coreintr_set, coremask);
- /* Force the DRVVBUS IRQ so we can start polling for ID change. */
- dsps_writel(reg_base, wrp->coreintr_set,
- (1 << wrp->drvvbus) << wrp->usb_shift);
+ /* start polling for ID change. */
+ mod_timer(&glue->timer, jiffies + msecs_to_jiffies(wrp->poll_timeout));
dsps_musb_try_idle(musb, 0);
}
}
if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
dsps_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
- mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
+ mod_timer(&glue->timer, jiffies +
+ msecs_to_jiffies(wrp->poll_timeout));
break;
case OTG_STATE_A_WAIT_VFALL:
musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
usbintr, epintr);
- /*
- * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
- * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
- * switch appropriately between halves of the OTG state machine.
- * Managing DEVCTL.SESSION per Mentor docs requires that we know its
- * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
- * Also, DRVVBUS pulses for SRP (but not at 5V) ...
- */
- if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE) {
- pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
-
- /*
- * When a babble condition occurs, the musb controller removes
- * the session and is no longer in host mode. Hence, all
- * devices connected to its root hub get disconnected.
- *
- * Hand this error down to the musb core isr, so it can
- * recover.
- */
- musb->int_usb = MUSB_INTR_BABBLE | MUSB_INTR_DISCONNECT;
- musb->int_tx = musb->int_rx = 0;
- }
if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
int drvvbus = dsps_readl(reg_base, wrp->status);
*/
musb->int_usb &= ~MUSB_INTR_VBUSERROR;
musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
- mod_timer(&glue->timer,
- jiffies + wrp->poll_seconds * HZ);
+ mod_timer(&glue->timer, jiffies +
+ msecs_to_jiffies(wrp->poll_timeout));
WARNING("VBUS error workaround (delay coming)\n");
} else if (drvvbus) {
MUSB_HST_MODE(musb);
/* Poll for ID change in OTG port mode */
if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
- mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
+ mod_timer(&glue->timer, jiffies +
+ msecs_to_jiffies(wrp->poll_timeout));
out:
spin_unlock_irqrestore(&musb->lock, flags);
musb->ctrl_base = reg_base;
/* NOP driver needs change if supporting dual instance */
- musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0);
+ musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent, "phys", 0);
if (IS_ERR(musb->xceiv))
return PTR_ERR(musb->xceiv);
* logic enabled.
*/
val = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
- if (val == MUSB_BABBLE_RCV_DISABLE) {
+ if (val & MUSB_BABBLE_RCV_DISABLE) {
glue->sw_babble_enabled = true;
val |= MUSB_BABBLE_SW_SESSION_CTRL;
dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, val);
return 0;
}
-static bool sw_babble_control(struct musb *musb)
+static bool dsps_sw_babble_control(struct musb *musb)
{
u8 babble_ctl;
bool session_restart = false;
return session_restart;
}
-static int dsps_musb_reset(struct musb *musb)
+static int dsps_musb_recover(struct musb *musb)
{
struct device *dev = musb->controller;
struct dsps_glue *glue = dev_get_drvdata(dev->parent);
- const struct dsps_musb_wrapper *wrp = glue->wrp;
- int session_restart = 0, error;
+ int session_restart = 0;
if (glue->sw_babble_enabled)
- session_restart = sw_babble_control(musb);
- /*
- * In case of new silicon version babble condition can be recovered
- * without resetting the MUSB. But for older silicon versions, MUSB
- * reset is needed
- */
- if (session_restart || !glue->sw_babble_enabled) {
- dev_info(musb->controller, "Restarting MUSB to recover from Babble\n");
- dsps_writel(musb->ctrl_base, wrp->control, (1 << wrp->reset));
- usleep_range(100, 200);
- usb_phy_shutdown(musb->xceiv);
- error = phy_power_off(musb->phy);
- if (error)
- dev_err(dev, "phy shutdown failed: %i\n", error);
- usleep_range(100, 200);
- usb_phy_init(musb->xceiv);
- error = phy_power_on(musb->phy);
- if (error)
- dev_err(dev, "phy powerup failed: %i\n", error);
+ session_restart = dsps_sw_babble_control(musb);
+ else
session_restart = 1;
+
+ return session_restart ? 0 : -EPIPE;
+}
+
+/* Similar to am35x, dm81xx support only 32-bit read operation */
+static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
+{
+ void __iomem *fifo = hw_ep->fifo;
+
+ if (len >= 4) {
+ ioread32_rep(fifo, dst, len >> 2);
+ dst += len & ~0x03;
+ len &= 0x03;
}
- return !session_restart;
+ /* Read any remaining 1 to 3 bytes */
+ if (len > 0) {
+ u32 val = musb_readl(fifo, 0);
+ memcpy(dst, &val, len);
+ }
}
static struct musb_platform_ops dsps_ops = {
.try_idle = dsps_musb_try_idle,
.set_mode = dsps_musb_set_mode,
- .reset = dsps_musb_reset,
+ .recover = dsps_musb_recover,
};
static u64 musb_dmamask = DMA_BIT_MASK(32);
musb->dev.parent = dev;
musb->dev.dma_mask = &musb_dmamask;
musb->dev.coherent_dma_mask = musb_dmamask;
- musb->dev.of_node = of_node_get(dn);
glue->musb = musb;
}
wrp = match->data;
+ if (of_device_is_compatible(pdev->dev.of_node, "ti,musb-dm816"))
+ dsps_ops.read_fifo = dsps_read_fifo32;
+
/* allocate glue */
glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
if (!glue)
.rxep_shift = 16,
.rxep_mask = 0xfffe,
.rxep_bitmap = (0xfffe << 16),
- .poll_seconds = 2,
+ .poll_timeout = 2000, /* ms */
};
static const struct of_device_id musb_dsps_of_match[] = {
{ .compatible = "ti,musb-am33xx",
- .data = (void *) &am33xx_driver_data, },
+ .data = &am33xx_driver_data, },
+ { .compatible = "ti,musb-dm816",
+ .data = &am33xx_driver_data, },
{ },
};
MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
dsps_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
- mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
+ mod_timer(&glue->timer, jiffies +
+ msecs_to_jiffies(wrp->poll_timeout));
return 0;
}
return retval;
}
-static void stop_activity(struct musb *musb, struct usb_gadget_driver *driver)
-{
- int i;
- struct musb_hw_ep *hw_ep;
-
- /* don't disconnect if it's not connected */
- if (musb->g.speed == USB_SPEED_UNKNOWN)
- driver = NULL;
- else
- musb->g.speed = USB_SPEED_UNKNOWN;
-
- /* deactivate the hardware */
- if (musb->softconnect) {
- musb->softconnect = 0;
- musb_pullup(musb, 0);
- }
- musb_stop(musb);
-
- /* killing any outstanding requests will quiesce the driver;
- * then report disconnect
- */
- if (driver) {
- for (i = 0, hw_ep = musb->endpoints;
- i < musb->nr_endpoints;
- i++, hw_ep++) {
- musb_ep_select(musb->mregs, i);
- if (hw_ep->is_shared_fifo /* || !epnum */) {
- nuke(&hw_ep->ep_in, -ESHUTDOWN);
- } else {
- if (hw_ep->max_packet_sz_tx)
- nuke(&hw_ep->ep_in, -ESHUTDOWN);
- if (hw_ep->max_packet_sz_rx)
- nuke(&hw_ep->ep_out, -ESHUTDOWN);
- }
- }
- }
-}
-
/*
* Unregister the gadget driver. Used by gadget drivers when
* unregistering themselves from the controller.
(void) musb_gadget_vbus_draw(&musb->g, 0);
musb->xceiv->otg->state = OTG_STATE_UNDEFINED;
- stop_activity(musb, NULL);
+ musb_stop(musb);
otg_set_peripheral(musb->xceiv->otg, NULL);
musb->is_active = 0;
/* later, GetPortStatus will stop RESUME signaling */
musb->port1_status |= MUSB_PORT_STAT_RESUME;
schedule_delayed_work(&musb->finish_resume_work,
- msecs_to_jiffies(20));
+ msecs_to_jiffies(USB_RESUME_TIMEOUT));
}
}
struct usb_hub_descriptor *desc = (void *)buf;
desc->bDescLength = 9;
- desc->bDescriptorType = 0x29;
+ desc->bDescriptorType = USB_DT_HUB;
desc->bNbrPorts = 1;
desc->wHubCharacteristics = cpu_to_le16(
HUB_CHAR_INDV_PORT_LPSM /* per-port power switching */
config USB_MSM_OTG
tristate "Qualcomm on-chip USB OTG controller support"
- depends on (USB || USB_GADGET) && (ARCH_MSM || ARCH_QCOM || COMPILE_TEST)
+ depends on (USB || USB_GADGET) && (ARCH_QCOM || COMPILE_TEST)
depends on RESET_CONTROLLER
select USB_PHY
help
config USB_ULPI
bool "Generic ULPI Transceiver Driver"
depends on ARM || ARM64
+ select USB_ULPI_VIEWPORT
help
Enable this to support ULPI connected USB OTG transceivers which
are likely found on embedded boards.
config USB_ULPI_VIEWPORT
bool
- depends on USB_ULPI
help
Provides read/write operations to the ULPI phy register set for
controllers with a viewport register (e.g. Chipidea/ARC controllers).
* @np: Pointer to the given device_node
*
* The function gets phy interface string from property 'phy_type',
- * and returns the correspondig enum usb_phy_interface
+ * and returns the corresponding enum usb_phy_interface
*/
enum usb_phy_interface of_usb_get_phy_mode(struct device_node *np)
{
dev_err(ab->dev, "Failed to set the Vintcore to 1.3V, ret=%d\n",
ret);
- ret = regulator_set_optimum_mode(ab->v_ulpi, 28000);
+ ret = regulator_set_load(ab->v_ulpi, 28000);
if (ret < 0)
dev_err(ab->dev, "Failed to set optimum mode (ret=%d)\n",
ret);
ab->saved_v_ulpi, ret);
}
- ret = regulator_set_optimum_mode(ab->v_ulpi, 0);
+ ret = regulator_set_load(ab->v_ulpi, 0);
if (ret < 0)
dev_err(ab->dev, "Failed to set optimum mode (ret=%d)\n",
ret);
/*
* Disconnection Sequence:
- * 1. Disconect Interrupt
+ * 1. Disconnect Interrupt
* 2. Disable regulators
* 3. Disable AB clock
* 4. Disable the Phy
return 0;
}
-static void nop_reset_set(struct usb_phy_generic *nop, int asserted)
+static void nop_reset(struct usb_phy_generic *nop)
{
if (!nop->gpiod_reset)
return;
- gpiod_direction_output(nop->gpiod_reset, !asserted);
+ gpiod_set_value(nop->gpiod_reset, 1);
usleep_range(10000, 20000);
- gpiod_set_value(nop->gpiod_reset, asserted);
+ gpiod_set_value(nop->gpiod_reset, 0);
}
/* interface to regulator framework */
if (!IS_ERR(nop->clk))
clk_prepare_enable(nop->clk);
- /* De-assert RESET */
- nop_reset_set(nop, 0);
+ nop_reset(nop);
return 0;
}
{
struct usb_phy_generic *nop = dev_get_drvdata(phy->dev);
- /* Assert RESET */
- nop_reset_set(nop, 1);
+ gpiod_set_value(nop->gpiod_reset, 1);
if (!IS_ERR(nop->clk))
clk_disable_unprepare(nop->clk);
int ret = 0;
if (on) {
- ret = regulator_set_optimum_mode(motg->v1p8,
- USB_PHY_1P8_HPM_LOAD);
+ ret = regulator_set_load(motg->v1p8, USB_PHY_1P8_HPM_LOAD);
if (ret < 0) {
pr_err("Could not set HPM for v1p8\n");
return ret;
}
- ret = regulator_set_optimum_mode(motg->v3p3,
- USB_PHY_3P3_HPM_LOAD);
+ ret = regulator_set_load(motg->v3p3, USB_PHY_3P3_HPM_LOAD);
if (ret < 0) {
pr_err("Could not set HPM for v3p3\n");
- regulator_set_optimum_mode(motg->v1p8,
- USB_PHY_1P8_LPM_LOAD);
+ regulator_set_load(motg->v1p8, USB_PHY_1P8_LPM_LOAD);
return ret;
}
} else {
- ret = regulator_set_optimum_mode(motg->v1p8,
- USB_PHY_1P8_LPM_LOAD);
+ ret = regulator_set_load(motg->v1p8, USB_PHY_1P8_LPM_LOAD);
if (ret < 0)
pr_err("Could not set LPM for v1p8\n");
- ret = regulator_set_optimum_mode(motg->v3p3,
- USB_PHY_3P3_LPM_LOAD);
+ ret = regulator_set_load(motg->v3p3, USB_PHY_3P3_LPM_LOAD);
if (ret < 0)
pr_err("Could not set LPM for v3p3\n");
}
{
int ret;
- if (motg->pdata->link_clk_reset)
- ret = motg->pdata->link_clk_reset(motg->clk, assert);
- else if (assert)
+ if (assert)
ret = reset_control_assert(motg->link_rst);
else
ret = reset_control_deassert(motg->link_rst);
{
int ret = 0;
- if (motg->pdata->phy_clk_reset)
- ret = motg->pdata->phy_clk_reset(motg->phy_reset_clk);
- else if (motg->phy_rst)
+ if (motg->phy_rst)
ret = reset_control_reset(motg->phy_rst);
if (ret)
phy = &motg->phy;
phy->dev = &pdev->dev;
- if (motg->pdata->phy_clk_reset) {
- motg->phy_reset_clk = devm_clk_get(&pdev->dev,
- np ? "phy" : "usb_phy_clk");
-
- if (IS_ERR(motg->phy_reset_clk)) {
- dev_err(&pdev->dev, "failed to get usb_phy_clk\n");
- return PTR_ERR(motg->phy_reset_clk);
- }
- }
-
motg->clk = devm_clk_get(&pdev->dev, np ? "core" : "usb_hs_clk");
if (IS_ERR(motg->clk)) {
dev_err(&pdev->dev, "failed to get usb_hs_clk\n");
/* USB General status register */
#define USBHS_UGSTS_REG 0x88
-#define USBHS_UGSTS_LOCK (3 << 8)
+#define USBHS_UGSTS_LOCK (1 << 8)
/* Enable USBHS internal phy */
static int __rcar_gen2_usbhs_phy_enable(void __iomem *base)
static int devm_usb_phy_match(struct device *dev, void *res, void *match_data)
{
- return res == match_data;
+ struct usb_phy **phy = res;
+
+ return *phy == match_data;
}
/**
return 0;
}
+/*
+ * interrupt functions
+ */
+void usbhs_xxxsts_clear(struct usbhs_priv *priv, u16 sts_reg, u16 bit)
+{
+ u16 pipe_mask = (u16)GENMASK(usbhs_get_dparam(priv, pipe_size), 0);
+
+ usbhs_write(priv, sts_reg, ~(1 << bit) & pipe_mask);
+}
+
/*
* local functions
*/
if (gpio > 0)
dparam->enable_gpio = gpio;
+ switch (dparam->type) {
+ case USBHS_TYPE_R8A7790:
+ case USBHS_TYPE_R8A7791:
+ dparam->has_usb_dmac = 1;
+ break;
+ default:
+ break;
+ }
+
return info;
}
#define TYPE_BULK (1 << 14)
#define TYPE_INT (2 << 14)
#define TYPE_ISO (3 << 14)
+#define BFRE (1 << 10) /* BRDY Interrupt Operation Spec. */
#define DBLB (1 << 9) /* Double Buffer Mode */
#define SHTNAK (1 << 7) /* Pipe Disable in Transfer End */
#define DIR_OUT (1 << 4) /* Transfer Direction */
#define ACLRM (1 << 9) /* Buffer Auto-Clear Mode */
#define SQCLR (1 << 8) /* Toggle Bit Clear */
#define SQSET (1 << 7) /* Toggle Bit Set */
+#define SQMON (1 << 6) /* Toggle Bit Check */
#define PBUSY (1 << 5) /* Pipe Busy */
#define PID_MASK (0x3) /* Response PID */
#define PID_NAK 0
int usbhs_set_device_config(struct usbhs_priv *priv, int devnum, u16 upphub,
u16 hubport, u16 speed);
+/*
+ * interrupt functions
+ */
+void usbhs_xxxsts_clear(struct usbhs_priv *priv, u16 sts_reg, u16 bit);
+
/*
* data
*/
desc->callback = usbhsf_dma_complete;
desc->callback_param = pipe;
- if (dmaengine_submit(desc) < 0) {
+ pkt->cookie = dmaengine_submit(desc);
+ if (pkt->cookie < 0) {
dev_err(dev, "Failed to submit dma descriptor\n");
return;
}
fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero);
usbhs_pipe_running(pipe, 1);
- usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->trans);
- usbhs_pipe_enable(pipe);
usbhsf_dma_start(pipe, fifo);
+ usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->trans);
dma_async_issue_pending(chan);
+ usbhs_pipe_enable(pipe);
}
/*
struct usbhs_fifo *fifo;
int len = pkt->length - pkt->actual;
int ret;
+ uintptr_t align_mask;
if (usbhs_pipe_is_busy(pipe))
return 0;
usbhs_pipe_is_dcp(pipe))
goto usbhsf_pio_prepare_push;
- if (len & 0x7) /* 8byte alignment */
+ /* check data length if this driver don't use USB-DMAC */
+ if (!usbhs_get_dparam(priv, has_usb_dmac) && len & 0x7)
goto usbhsf_pio_prepare_push;
- if ((uintptr_t)(pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */
+ /* check buffer alignment */
+ align_mask = usbhs_get_dparam(priv, has_usb_dmac) ?
+ USBHS_USB_DMAC_XFER_SIZE - 1 : 0x7;
+ if ((uintptr_t)(pkt->buf + pkt->actual) & align_mask)
goto usbhsf_pio_prepare_push;
/* return at this time if the pipe is running */
/*
* DMA pop handler
*/
-static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done)
+
+static int usbhsf_dma_prepare_pop_with_rx_irq(struct usbhs_pkt *pkt,
+ int *is_done)
+{
+ return usbhsf_prepare_pop(pkt, is_done);
+}
+
+static int usbhsf_dma_prepare_pop_with_usb_dmac(struct usbhs_pkt *pkt,
+ int *is_done)
+{
+ struct usbhs_pipe *pipe = pkt->pipe;
+ struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
+ struct usbhs_fifo *fifo;
+ int ret;
+
+ if (usbhs_pipe_is_busy(pipe))
+ return 0;
+
+ /* use PIO if packet is less than pio_dma_border or pipe is DCP */
+ if ((pkt->length < usbhs_get_dparam(priv, pio_dma_border)) ||
+ usbhs_pipe_is_dcp(pipe))
+ goto usbhsf_pio_prepare_pop;
+
+ fifo = usbhsf_get_dma_fifo(priv, pkt);
+ if (!fifo)
+ goto usbhsf_pio_prepare_pop;
+
+ if ((uintptr_t)pkt->buf & (USBHS_USB_DMAC_XFER_SIZE - 1))
+ goto usbhsf_pio_prepare_pop;
+
+ usbhs_pipe_config_change_bfre(pipe, 1);
+
+ ret = usbhsf_fifo_select(pipe, fifo, 0);
+ if (ret < 0)
+ goto usbhsf_pio_prepare_pop;
+
+ if (usbhsf_dma_map(pkt) < 0)
+ goto usbhsf_pio_prepare_pop_unselect;
+
+ /* DMA */
+
+ /*
+ * usbhs_fifo_dma_pop_handler :: prepare
+ * enabled irq to come here.
+ * but it is no longer needed for DMA. disable it.
+ */
+ usbhsf_rx_irq_ctrl(pipe, 0);
+
+ pkt->trans = pkt->length;
+
+ INIT_WORK(&pkt->work, xfer_work);
+ schedule_work(&pkt->work);
+
+ return 0;
+
+usbhsf_pio_prepare_pop_unselect:
+ usbhsf_fifo_unselect(pipe, fifo);
+usbhsf_pio_prepare_pop:
+
+ /*
+ * change handler to PIO
+ */
+ pkt->handler = &usbhs_fifo_pio_pop_handler;
+ usbhs_pipe_config_change_bfre(pipe, 0);
+
+ return pkt->handler->prepare(pkt, is_done);
+}
+
+static int usbhsf_dma_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
+{
+ struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
+
+ if (usbhs_get_dparam(priv, has_usb_dmac))
+ return usbhsf_dma_prepare_pop_with_usb_dmac(pkt, is_done);
+ else
+ return usbhsf_dma_prepare_pop_with_rx_irq(pkt, is_done);
+}
+
+static int usbhsf_dma_try_pop_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
{
struct usbhs_pipe *pipe = pkt->pipe;
struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
return pkt->handler->try_run(pkt, is_done);
}
-static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done)
+static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done)
+{
+ struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
+
+ BUG_ON(usbhs_get_dparam(priv, has_usb_dmac));
+
+ return usbhsf_dma_try_pop_with_rx_irq(pkt, is_done);
+}
+
+static int usbhsf_dma_pop_done_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
{
struct usbhs_pipe *pipe = pkt->pipe;
int maxp = usbhs_pipe_get_maxpacket(pipe);
return 0;
}
+static size_t usbhs_dma_calc_received_size(struct usbhs_pkt *pkt,
+ struct dma_chan *chan, int dtln)
+{
+ struct usbhs_pipe *pipe = pkt->pipe;
+ struct dma_tx_state state;
+ size_t received_size;
+ int maxp = usbhs_pipe_get_maxpacket(pipe);
+
+ dmaengine_tx_status(chan, pkt->cookie, &state);
+ received_size = pkt->length - state.residue;
+
+ if (dtln) {
+ received_size -= USBHS_USB_DMAC_XFER_SIZE;
+ received_size &= ~(maxp - 1);
+ received_size += dtln;
+ }
+
+ return received_size;
+}
+
+static int usbhsf_dma_pop_done_with_usb_dmac(struct usbhs_pkt *pkt,
+ int *is_done)
+{
+ struct usbhs_pipe *pipe = pkt->pipe;
+ struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
+ struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
+ struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
+ int rcv_len;
+
+ /*
+ * Since the driver disables rx_irq in DMA mode, the interrupt handler
+ * cannot the BRDYSTS. So, the function clears it here because the
+ * driver may use PIO mode next time.
+ */
+ usbhs_xxxsts_clear(priv, BRDYSTS, usbhs_pipe_number(pipe));
+
+ rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
+ usbhsf_fifo_clear(pipe, fifo);
+ pkt->actual = usbhs_dma_calc_received_size(pkt, chan, rcv_len);
+
+ usbhsf_dma_stop(pipe, fifo);
+ usbhsf_dma_unmap(pkt);
+ usbhsf_fifo_unselect(pipe, pipe->fifo);
+
+ /* The driver can assume the rx transaction is always "done" */
+ *is_done = 1;
+
+ return 0;
+}
+
+static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done)
+{
+ struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
+
+ if (usbhs_get_dparam(priv, has_usb_dmac))
+ return usbhsf_dma_pop_done_with_usb_dmac(pkt, is_done);
+ else
+ return usbhsf_dma_pop_done_with_rx_irq(pkt, is_done);
+}
+
struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = {
- .prepare = usbhsf_prepare_pop,
+ .prepare = usbhsf_dma_prepare_pop,
.try_run = usbhsf_dma_try_pop,
.dma_done = usbhsf_dma_pop_done
};
&fifo->rx_slave);
}
-static void usbhsf_dma_init_dt(struct device *dev, struct usbhs_fifo *fifo)
+static void usbhsf_dma_init_dt(struct device *dev, struct usbhs_fifo *fifo,
+ int channel)
{
- fifo->tx_chan = dma_request_slave_channel_reason(dev, "tx");
+ char name[16];
+
+ snprintf(name, sizeof(name), "tx%d", channel);
+ fifo->tx_chan = dma_request_slave_channel_reason(dev, name);
if (IS_ERR(fifo->tx_chan))
fifo->tx_chan = NULL;
- fifo->rx_chan = dma_request_slave_channel_reason(dev, "rx");
+
+ snprintf(name, sizeof(name), "rx%d", channel);
+ fifo->rx_chan = dma_request_slave_channel_reason(dev, name);
if (IS_ERR(fifo->rx_chan))
fifo->rx_chan = NULL;
}
-static void usbhsf_dma_init(struct usbhs_priv *priv,
- struct usbhs_fifo *fifo)
+static void usbhsf_dma_init(struct usbhs_priv *priv, struct usbhs_fifo *fifo,
+ int channel)
{
struct device *dev = usbhs_priv_to_dev(priv);
if (dev->of_node)
- usbhsf_dma_init_dt(dev, fifo);
+ usbhsf_dma_init_dt(dev, fifo, channel);
else
usbhsf_dma_init_pdev(fifo);
usbhs_get_dparam(priv, d##channel##_tx_id); \
fifo->rx_slave.shdma_slave.slave_id = \
usbhs_get_dparam(priv, d##channel##_rx_id); \
- usbhsf_dma_init(priv, fifo); \
+ usbhsf_dma_init(priv, fifo, channel); \
} while (0)
#define USBHS_DFIFO_INIT(priv, fifo, channel) \
struct usbhs_pkt *pkt);
struct work_struct work;
dma_addr_t dma;
+ dma_cookie_t cookie;
void *buf;
int length;
int trans;
/*
* queue push/pop
*/
-static void usbhsg_queue_pop(struct usbhsg_uep *uep,
- struct usbhsg_request *ureq,
- int status)
+static void __usbhsg_queue_pop(struct usbhsg_uep *uep,
+ struct usbhsg_request *ureq,
+ int status)
{
struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep);
struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);
struct device *dev = usbhsg_gpriv_to_dev(gpriv);
+ struct usbhs_priv *priv = usbhsg_gpriv_to_priv(gpriv);
dev_dbg(dev, "pipe %d : queue pop\n", usbhs_pipe_number(pipe));
ureq->req.status = status;
+ spin_unlock(usbhs_priv_to_lock(priv));
usb_gadget_giveback_request(&uep->ep, &ureq->req);
+ spin_lock(usbhs_priv_to_lock(priv));
+}
+
+static void usbhsg_queue_pop(struct usbhsg_uep *uep,
+ struct usbhsg_request *ureq,
+ int status)
+{
+ struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep);
+ struct usbhs_priv *priv = usbhsg_gpriv_to_priv(gpriv);
+ unsigned long flags;
+
+ usbhs_lock(priv, flags);
+ __usbhsg_queue_pop(uep, ureq, status);
+ usbhs_unlock(priv, flags);
}
static void usbhsg_queue_done(struct usbhs_priv *priv, struct usbhs_pkt *pkt)
break;
case GetHubDescriptor:
- desc->bDescriptorType = 0x29;
+ desc->bDescriptorType = USB_DT_HUB;
desc->bHubContrCurrent = 0;
desc->bNbrPorts = roothub_id;
desc->bDescLength = 9;
usbhs_bset(priv, pipe_reg, mask, val);
}
+static u16 __usbhsp_pipe_xxx_get(struct usbhs_pipe *pipe,
+ u16 dcp_reg, u16 pipe_reg)
+{
+ struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
+
+ if (usbhs_pipe_is_dcp(pipe))
+ return usbhs_read(priv, dcp_reg);
+ else
+ return usbhs_read(priv, pipe_reg);
+}
+
/*
* DCPCFG/PIPECFG functions
*/
__usbhsp_pipe_xxx_set(pipe, DCPCFG, PIPECFG, mask, val);
}
+static u16 usbhsp_pipe_cfg_get(struct usbhs_pipe *pipe)
+{
+ return __usbhsp_pipe_xxx_get(pipe, DCPCFG, PIPECFG);
+}
+
/*
* PIPEnTRN/PIPEnTRE functions
*/
usbhsp_pipectrl_set(pipe, mask, val);
}
+static int usbhs_pipe_get_data_sequence(struct usbhs_pipe *pipe)
+{
+ return !!(usbhsp_pipectrl_get(pipe) & SQMON);
+}
+
void usbhs_pipe_clear(struct usbhs_pipe *pipe)
{
if (usbhs_pipe_is_dcp(pipe)) {
}
}
+void usbhs_pipe_config_change_bfre(struct usbhs_pipe *pipe, int enable)
+{
+ int sequence;
+
+ if (usbhs_pipe_is_dcp(pipe))
+ return;
+
+ usbhsp_pipe_select(pipe);
+ /* check if the driver needs to change the BFRE value */
+ if (!(enable ^ !!(usbhsp_pipe_cfg_get(pipe) & BFRE)))
+ return;
+
+ sequence = usbhs_pipe_get_data_sequence(pipe);
+ usbhsp_pipe_cfg_set(pipe, BFRE, enable ? BFRE : 0);
+ usbhs_pipe_clear(pipe);
+ usbhs_pipe_data_sequence(pipe, sequence);
+}
+
static struct usbhs_pipe *usbhsp_get_pipe(struct usbhs_priv *priv, u32 type)
{
struct usbhs_pipe *pos, *pipe;
void usbhs_pipe_select_fifo(struct usbhs_pipe *pipe, struct usbhs_fifo *fifo);
void usbhs_pipe_config_update(struct usbhs_pipe *pipe, u16 devsel,
u16 epnum, u16 maxp);
+void usbhs_pipe_config_change_bfre(struct usbhs_pipe *pipe, int enable);
#define usbhs_pipe_sequence_data0(pipe) usbhs_pipe_data_sequence(pipe, 0)
#define usbhs_pipe_sequence_data1(pipe) usbhs_pipe_data_sequence(pipe, 1)
if (r) {
dev_err(&port->dev, "%s - failed to submit interrupt urb: %d\n",
__func__, r);
- ch341_close(port);
goto out;
}
#include <linux/serial.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
-#include <linux/spinlock.h>
+#include <linux/mutex.h>
#include <linux/uaccess.h>
#include <linux/usb.h>
#include <linux/usb/serial.h>
+#include <linux/serial_reg.h>
static const struct usb_device_id id_table[] = {
{ USB_DEVICE(0x1934, 0x0706) },
};
MODULE_DEVICE_TABLE(usb, id_table);
-#define CONTROL_DTR 0x01
-#define CONTROL_RTS 0x02
+/* Maximum baudrate for F81232 */
+#define F81232_MAX_BAUDRATE 115200
-#define UART_STATE 0x08
-#define UART_STATE_TRANSIENT_MASK 0x74
-#define UART_DCD 0x01
-#define UART_DSR 0x02
-#define UART_BREAK_ERROR 0x04
-#define UART_RING 0x08
-#define UART_FRAME_ERROR 0x10
-#define UART_PARITY_ERROR 0x20
-#define UART_OVERRUN_ERROR 0x40
-#define UART_CTS 0x80
+/* USB Control EP parameter */
+#define F81232_REGISTER_REQUEST 0xa0
+#define F81232_GET_REGISTER 0xc0
+#define F81232_SET_REGISTER 0x40
+
+#define SERIAL_BASE_ADDRESS 0x0120
+#define RECEIVE_BUFFER_REGISTER (0x00 + SERIAL_BASE_ADDRESS)
+#define INTERRUPT_ENABLE_REGISTER (0x01 + SERIAL_BASE_ADDRESS)
+#define FIFO_CONTROL_REGISTER (0x02 + SERIAL_BASE_ADDRESS)
+#define LINE_CONTROL_REGISTER (0x03 + SERIAL_BASE_ADDRESS)
+#define MODEM_CONTROL_REGISTER (0x04 + SERIAL_BASE_ADDRESS)
+#define MODEM_STATUS_REGISTER (0x06 + SERIAL_BASE_ADDRESS)
struct f81232_private {
- spinlock_t lock;
- u8 line_control;
- u8 line_status;
+ struct mutex lock;
+ u8 modem_control;
+ u8 modem_status;
+ struct work_struct interrupt_work;
+ struct usb_serial_port *port;
};
+static int calc_baud_divisor(speed_t baudrate)
+{
+ return DIV_ROUND_CLOSEST(F81232_MAX_BAUDRATE, baudrate);
+}
+
+static int f81232_get_register(struct usb_serial_port *port, u16 reg, u8 *val)
+{
+ int status;
+ u8 *tmp;
+ struct usb_device *dev = port->serial->dev;
+
+ tmp = kmalloc(sizeof(*val), GFP_KERNEL);
+ if (!tmp)
+ return -ENOMEM;
+
+ status = usb_control_msg(dev,
+ usb_rcvctrlpipe(dev, 0),
+ F81232_REGISTER_REQUEST,
+ F81232_GET_REGISTER,
+ reg,
+ 0,
+ tmp,
+ sizeof(*val),
+ USB_CTRL_GET_TIMEOUT);
+ if (status != sizeof(*val)) {
+ dev_err(&port->dev, "%s failed status: %d\n", __func__, status);
+
+ if (status < 0)
+ status = usb_translate_errors(status);
+ else
+ status = -EIO;
+ } else {
+ status = 0;
+ *val = *tmp;
+ }
+
+ kfree(tmp);
+ return status;
+}
+
+static int f81232_set_register(struct usb_serial_port *port, u16 reg, u8 val)
+{
+ int status;
+ u8 *tmp;
+ struct usb_device *dev = port->serial->dev;
+
+ tmp = kmalloc(sizeof(val), GFP_KERNEL);
+ if (!tmp)
+ return -ENOMEM;
+
+ *tmp = val;
+
+ status = usb_control_msg(dev,
+ usb_sndctrlpipe(dev, 0),
+ F81232_REGISTER_REQUEST,
+ F81232_SET_REGISTER,
+ reg,
+ 0,
+ tmp,
+ sizeof(val),
+ USB_CTRL_SET_TIMEOUT);
+ if (status != sizeof(val)) {
+ dev_err(&port->dev, "%s failed status: %d\n", __func__, status);
+
+ if (status < 0)
+ status = usb_translate_errors(status);
+ else
+ status = -EIO;
+ } else {
+ status = 0;
+ }
+
+ kfree(tmp);
+ return status;
+}
+
+static void f81232_read_msr(struct usb_serial_port *port)
+{
+ int status;
+ u8 current_msr;
+ struct tty_struct *tty;
+ struct f81232_private *priv = usb_get_serial_port_data(port);
+
+ mutex_lock(&priv->lock);
+ status = f81232_get_register(port, MODEM_STATUS_REGISTER,
+ ¤t_msr);
+ if (status) {
+ dev_err(&port->dev, "%s fail, status: %d\n", __func__, status);
+ mutex_unlock(&priv->lock);
+ return;
+ }
+
+ if (!(current_msr & UART_MSR_ANY_DELTA)) {
+ mutex_unlock(&priv->lock);
+ return;
+ }
+
+ priv->modem_status = current_msr;
+
+ if (current_msr & UART_MSR_DCTS)
+ port->icount.cts++;
+ if (current_msr & UART_MSR_DDSR)
+ port->icount.dsr++;
+ if (current_msr & UART_MSR_TERI)
+ port->icount.rng++;
+ if (current_msr & UART_MSR_DDCD) {
+ port->icount.dcd++;
+ tty = tty_port_tty_get(&port->port);
+ if (tty) {
+ usb_serial_handle_dcd_change(port, tty,
+ current_msr & UART_MSR_DCD);
+
+ tty_kref_put(tty);
+ }
+ }
+
+ wake_up_interruptible(&port->port.delta_msr_wait);
+ mutex_unlock(&priv->lock);
+}
+
+static int f81232_set_mctrl(struct usb_serial_port *port,
+ unsigned int set, unsigned int clear)
+{
+ u8 val;
+ int status;
+ struct f81232_private *priv = usb_get_serial_port_data(port);
+
+ if (((set | clear) & (TIOCM_DTR | TIOCM_RTS)) == 0)
+ return 0; /* no change */
+
+ /* 'set' takes precedence over 'clear' */
+ clear &= ~set;
+
+ /* force enable interrupt with OUT2 */
+ mutex_lock(&priv->lock);
+ val = UART_MCR_OUT2 | priv->modem_control;
+
+ if (clear & TIOCM_DTR)
+ val &= ~UART_MCR_DTR;
+
+ if (clear & TIOCM_RTS)
+ val &= ~UART_MCR_RTS;
+
+ if (set & TIOCM_DTR)
+ val |= UART_MCR_DTR;
+
+ if (set & TIOCM_RTS)
+ val |= UART_MCR_RTS;
+
+ dev_dbg(&port->dev, "%s new:%02x old:%02x\n", __func__,
+ val, priv->modem_control);
+
+ status = f81232_set_register(port, MODEM_CONTROL_REGISTER, val);
+ if (status) {
+ dev_err(&port->dev, "%s set MCR status < 0\n", __func__);
+ mutex_unlock(&priv->lock);
+ return status;
+ }
+
+ priv->modem_control = val;
+ mutex_unlock(&priv->lock);
+
+ return 0;
+}
+
static void f81232_update_line_status(struct usb_serial_port *port,
unsigned char *data,
- unsigned int actual_length)
+ size_t actual_length)
{
- /*
- * FIXME: Update port->icount, and call
- *
- * wake_up_interruptible(&port->port.delta_msr_wait);
- *
- * on MSR changes.
- */
+ struct f81232_private *priv = usb_get_serial_port_data(port);
+
+ if (!actual_length)
+ return;
+
+ switch (data[0] & 0x07) {
+ case 0x00: /* msr change */
+ dev_dbg(&port->dev, "IIR: MSR Change: %02x\n", data[0]);
+ schedule_work(&priv->interrupt_work);
+ break;
+ case 0x02: /* tx-empty */
+ break;
+ case 0x04: /* rx data available */
+ break;
+ case 0x06: /* lsr change */
+ /* we can forget it. the LSR will read from bulk-in */
+ dev_dbg(&port->dev, "IIR: LSR Change: %02x\n", data[0]);
+ break;
+ }
}
static void f81232_read_int_callback(struct urb *urb)
static void f81232_process_read_urb(struct urb *urb)
{
struct usb_serial_port *port = urb->context;
- struct f81232_private *priv = usb_get_serial_port_data(port);
unsigned char *data = urb->transfer_buffer;
- char tty_flag = TTY_NORMAL;
- unsigned long flags;
- u8 line_status;
- int i;
-
- /* update line status */
- spin_lock_irqsave(&priv->lock, flags);
- line_status = priv->line_status;
- priv->line_status &= ~UART_STATE_TRANSIENT_MASK;
- spin_unlock_irqrestore(&priv->lock, flags);
-
- if (!urb->actual_length)
+ char tty_flag;
+ unsigned int i;
+ u8 lsr;
+
+ /*
+ * When opening the port we get a 1-byte packet with the current LSR,
+ * which we discard.
+ */
+ if ((urb->actual_length < 2) || (urb->actual_length % 2))
return;
- /* break takes precedence over parity, */
- /* which takes precedence over framing errors */
- if (line_status & UART_BREAK_ERROR)
- tty_flag = TTY_BREAK;
- else if (line_status & UART_PARITY_ERROR)
- tty_flag = TTY_PARITY;
- else if (line_status & UART_FRAME_ERROR)
- tty_flag = TTY_FRAME;
- dev_dbg(&port->dev, "%s - tty_flag = %d\n", __func__, tty_flag);
-
- /* overrun is special, not associated with a char */
- if (line_status & UART_OVERRUN_ERROR)
- tty_insert_flip_char(&port->port, 0, TTY_OVERRUN);
-
- if (port->port.console && port->sysrq) {
- for (i = 0; i < urb->actual_length; ++i)
- if (!usb_serial_handle_sysrq_char(port, data[i]))
- tty_insert_flip_char(&port->port, data[i],
- tty_flag);
- } else {
- tty_insert_flip_string_fixed_flag(&port->port, data, tty_flag,
- urb->actual_length);
+ /* bulk-in data: [LSR(1Byte)+DATA(1Byte)][LSR(1Byte)+DATA(1Byte)]... */
+
+ for (i = 0; i < urb->actual_length; i += 2) {
+ tty_flag = TTY_NORMAL;
+ lsr = data[i];
+
+ if (lsr & UART_LSR_BRK_ERROR_BITS) {
+ if (lsr & UART_LSR_BI) {
+ tty_flag = TTY_BREAK;
+ port->icount.brk++;
+ usb_serial_handle_break(port);
+ } else if (lsr & UART_LSR_PE) {
+ tty_flag = TTY_PARITY;
+ port->icount.parity++;
+ } else if (lsr & UART_LSR_FE) {
+ tty_flag = TTY_FRAME;
+ port->icount.frame++;
+ }
+
+ if (lsr & UART_LSR_OE) {
+ port->icount.overrun++;
+ tty_insert_flip_char(&port->port, 0,
+ TTY_OVERRUN);
+ }
+ }
+
+ if (port->port.console && port->sysrq) {
+ if (usb_serial_handle_sysrq_char(port, data[i + 1]))
+ continue;
+ }
+
+ tty_insert_flip_char(&port->port, data[i + 1], tty_flag);
}
tty_flip_buffer_push(&port->port);
}
-static int set_control_lines(struct usb_device *dev, u8 value)
-{
- /* FIXME - Stubbed out for now */
- return 0;
-}
-
static void f81232_break_ctl(struct tty_struct *tty, int break_state)
{
/* FIXME - Stubbed out for now */
*/
}
+static void f81232_set_baudrate(struct usb_serial_port *port, speed_t baudrate)
+{
+ u8 lcr;
+ int divisor;
+ int status = 0;
+
+ divisor = calc_baud_divisor(baudrate);
+
+ status = f81232_get_register(port, LINE_CONTROL_REGISTER,
+ &lcr); /* get LCR */
+ if (status) {
+ dev_err(&port->dev, "%s failed to get LCR: %d\n",
+ __func__, status);
+ return;
+ }
+
+ status = f81232_set_register(port, LINE_CONTROL_REGISTER,
+ lcr | UART_LCR_DLAB); /* Enable DLAB */
+ if (status) {
+ dev_err(&port->dev, "%s failed to set DLAB: %d\n",
+ __func__, status);
+ return;
+ }
+
+ status = f81232_set_register(port, RECEIVE_BUFFER_REGISTER,
+ divisor & 0x00ff); /* low */
+ if (status) {
+ dev_err(&port->dev, "%s failed to set baudrate MSB: %d\n",
+ __func__, status);
+ goto reapply_lcr;
+ }
+
+ status = f81232_set_register(port, INTERRUPT_ENABLE_REGISTER,
+ (divisor & 0xff00) >> 8); /* high */
+ if (status) {
+ dev_err(&port->dev, "%s failed to set baudrate LSB: %d\n",
+ __func__, status);
+ }
+
+reapply_lcr:
+ status = f81232_set_register(port, LINE_CONTROL_REGISTER,
+ lcr & ~UART_LCR_DLAB);
+ if (status) {
+ dev_err(&port->dev, "%s failed to set DLAB: %d\n",
+ __func__, status);
+ }
+}
+
+static int f81232_port_enable(struct usb_serial_port *port)
+{
+ u8 val;
+ int status;
+
+ /* fifo on, trigger8, clear TX/RX*/
+ val = UART_FCR_TRIGGER_8 | UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
+ UART_FCR_CLEAR_XMIT;
+
+ status = f81232_set_register(port, FIFO_CONTROL_REGISTER, val);
+ if (status) {
+ dev_err(&port->dev, "%s failed to set FCR: %d\n",
+ __func__, status);
+ return status;
+ }
+
+ /* MSR Interrupt only, LSR will read from Bulk-in odd byte */
+ status = f81232_set_register(port, INTERRUPT_ENABLE_REGISTER,
+ UART_IER_MSI);
+ if (status) {
+ dev_err(&port->dev, "%s failed to set IER: %d\n",
+ __func__, status);
+ return status;
+ }
+
+ return 0;
+}
+
+static int f81232_port_disable(struct usb_serial_port *port)
+{
+ int status;
+
+ status = f81232_set_register(port, INTERRUPT_ENABLE_REGISTER, 0);
+ if (status) {
+ dev_err(&port->dev, "%s failed to set IER: %d\n",
+ __func__, status);
+ return status;
+ }
+
+ return 0;
+}
+
static void f81232_set_termios(struct tty_struct *tty,
struct usb_serial_port *port, struct ktermios *old_termios)
{
- /* FIXME - Stubbed out for now */
+ u8 new_lcr = 0;
+ int status = 0;
+ speed_t baudrate;
/* Don't change anything if nothing has changed */
if (old_termios && !tty_termios_hw_change(&tty->termios, old_termios))
return;
- /* Do the real work here... */
- if (old_termios)
- tty_termios_copy_hw(&tty->termios, old_termios);
+ if (C_BAUD(tty) == B0)
+ f81232_set_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
+ else if (old_termios && (old_termios->c_cflag & CBAUD) == B0)
+ f81232_set_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
+
+ baudrate = tty_get_baud_rate(tty);
+ if (baudrate > 0) {
+ if (baudrate > F81232_MAX_BAUDRATE) {
+ baudrate = F81232_MAX_BAUDRATE;
+ tty_encode_baud_rate(tty, baudrate, baudrate);
+ }
+ f81232_set_baudrate(port, baudrate);
+ }
+
+ if (C_PARENB(tty)) {
+ new_lcr |= UART_LCR_PARITY;
+
+ if (!C_PARODD(tty))
+ new_lcr |= UART_LCR_EPAR;
+
+ if (C_CMSPAR(tty))
+ new_lcr |= UART_LCR_SPAR;
+ }
+
+ if (C_CSTOPB(tty))
+ new_lcr |= UART_LCR_STOP;
+
+ switch (C_CSIZE(tty)) {
+ case CS5:
+ new_lcr |= UART_LCR_WLEN5;
+ break;
+ case CS6:
+ new_lcr |= UART_LCR_WLEN6;
+ break;
+ case CS7:
+ new_lcr |= UART_LCR_WLEN7;
+ break;
+ default:
+ case CS8:
+ new_lcr |= UART_LCR_WLEN8;
+ break;
+ }
+
+ status = f81232_set_register(port, LINE_CONTROL_REGISTER, new_lcr);
+ if (status) {
+ dev_err(&port->dev, "%s failed to set LCR: %d\n",
+ __func__, status);
+ }
}
static int f81232_tiocmget(struct tty_struct *tty)
{
- /* FIXME - Stubbed out for now */
- return 0;
+ int r;
+ struct usb_serial_port *port = tty->driver_data;
+ struct f81232_private *port_priv = usb_get_serial_port_data(port);
+ u8 mcr, msr;
+
+ /* force get current MSR changed state */
+ f81232_read_msr(port);
+
+ mutex_lock(&port_priv->lock);
+ mcr = port_priv->modem_control;
+ msr = port_priv->modem_status;
+ mutex_unlock(&port_priv->lock);
+
+ r = (mcr & UART_MCR_DTR ? TIOCM_DTR : 0) |
+ (mcr & UART_MCR_RTS ? TIOCM_RTS : 0) |
+ (msr & UART_MSR_CTS ? TIOCM_CTS : 0) |
+ (msr & UART_MSR_DCD ? TIOCM_CAR : 0) |
+ (msr & UART_MSR_RI ? TIOCM_RI : 0) |
+ (msr & UART_MSR_DSR ? TIOCM_DSR : 0);
+
+ return r;
}
static int f81232_tiocmset(struct tty_struct *tty,
unsigned int set, unsigned int clear)
{
- /* FIXME - Stubbed out for now */
- return 0;
+ struct usb_serial_port *port = tty->driver_data;
+
+ return f81232_set_mctrl(port, set, clear);
}
static int f81232_open(struct tty_struct *tty, struct usb_serial_port *port)
{
int result;
+ result = f81232_port_enable(port);
+ if (result)
+ return result;
+
/* Setup termios */
if (tty)
f81232_set_termios(tty, port, NULL);
static void f81232_close(struct usb_serial_port *port)
{
+ f81232_port_disable(port);
usb_serial_generic_close(port);
usb_kill_urb(port->interrupt_in_urb);
}
static void f81232_dtr_rts(struct usb_serial_port *port, int on)
{
- struct f81232_private *priv = usb_get_serial_port_data(port);
- unsigned long flags;
- u8 control;
-
- spin_lock_irqsave(&priv->lock, flags);
- /* Change DTR and RTS */
if (on)
- priv->line_control |= (CONTROL_DTR | CONTROL_RTS);
+ f81232_set_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
else
- priv->line_control &= ~(CONTROL_DTR | CONTROL_RTS);
- control = priv->line_control;
- spin_unlock_irqrestore(&priv->lock, flags);
- set_control_lines(port->serial->dev, control);
+ f81232_set_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
}
static int f81232_carrier_raised(struct usb_serial_port *port)
{
+ u8 msr;
struct f81232_private *priv = usb_get_serial_port_data(port);
- if (priv->line_status & UART_DCD)
+
+ mutex_lock(&priv->lock);
+ msr = priv->modem_status;
+ mutex_unlock(&priv->lock);
+
+ if (msr & UART_MSR_DCD)
return 1;
return 0;
}
+static int f81232_get_serial_info(struct usb_serial_port *port,
+ unsigned long arg)
+{
+ struct serial_struct ser;
+
+ memset(&ser, 0, sizeof(ser));
+
+ ser.type = PORT_16550A;
+ ser.line = port->minor;
+ ser.port = port->port_number;
+ ser.baud_base = F81232_MAX_BAUDRATE;
+
+ if (copy_to_user((void __user *)arg, &ser, sizeof(ser)))
+ return -EFAULT;
+
+ return 0;
+}
+
static int f81232_ioctl(struct tty_struct *tty,
unsigned int cmd, unsigned long arg)
{
- struct serial_struct ser;
struct usb_serial_port *port = tty->driver_data;
switch (cmd) {
case TIOCGSERIAL:
- memset(&ser, 0, sizeof ser);
- ser.type = PORT_16654;
- ser.line = port->minor;
- ser.port = port->port_number;
- ser.baud_base = 460800;
-
- if (copy_to_user((void __user *)arg, &ser, sizeof ser))
- return -EFAULT;
-
- return 0;
+ return f81232_get_serial_info(port, arg);
default:
break;
}
return -ENOIOCTLCMD;
}
+static void f81232_interrupt_work(struct work_struct *work)
+{
+ struct f81232_private *priv =
+ container_of(work, struct f81232_private, interrupt_work);
+
+ f81232_read_msr(priv->port);
+}
+
static int f81232_port_probe(struct usb_serial_port *port)
{
struct f81232_private *priv;
if (!priv)
return -ENOMEM;
- spin_lock_init(&priv->lock);
+ mutex_init(&priv->lock);
+ INIT_WORK(&priv->interrupt_work, f81232_interrupt_work);
usb_set_serial_port_data(port, priv);
port->port.drain_delay = 256;
+ priv->port = port;
return 0;
}
.bulk_out_size = 256,
.open = f81232_open,
.close = f81232_close,
- .dtr_rts = f81232_dtr_rts,
+ .dtr_rts = f81232_dtr_rts,
.carrier_raised = f81232_carrier_raised,
.ioctl = f81232_ioctl,
.break_ctl = f81232_break_ctl,
module_usb_serial_driver(serial_drivers, id_table);
MODULE_DESCRIPTION("Fintek F81232 USB to serial adaptor driver");
-MODULE_AUTHOR("Greg Kroah-Hartman <gregkh@linuxfoundation.org");
+MODULE_AUTHOR("Greg Kroah-Hartman <gregkh@linuxfoundation.org>");
+MODULE_AUTHOR("Peter Hong <peter_hong@fintek.com.tw>");
MODULE_LICENSE("GPL v2");
{ 0,}
};
-static struct alauda_card_info *alauda_card_find_id(unsigned char id) {
+static struct alauda_card_info *alauda_card_find_id(unsigned char id)
+{
int i;
for (i = 0; alauda_card_ids[i].id != 0; i++)
static unsigned char parity[256];
static unsigned char ecc2[256];
-static void nand_init_ecc(void) {
+static void nand_init_ecc(void)
+{
int i, j, a;
parity[0] = 0;
}
/* compute 3-byte ecc on 256 bytes */
-static void nand_compute_ecc(unsigned char *data, unsigned char *ecc) {
+static void nand_compute_ecc(unsigned char *data, unsigned char *ecc)
+{
int i, j, a;
unsigned char par = 0, bit, bits[8] = {0};
ecc[2] = ecc2[par];
}
-static int nand_compare_ecc(unsigned char *data, unsigned char *ecc) {
+static int nand_compare_ecc(unsigned char *data, unsigned char *ecc)
+{
return (data[0] == ecc[0] && data[1] == ecc[1] && data[2] == ecc[2]);
}
-static void nand_store_ecc(unsigned char *data, unsigned char *ecc) {
+static void nand_store_ecc(unsigned char *data, unsigned char *ecc)
+{
memcpy(data, ecc, 3);
}
if (save_cmnd[1] >> 5) /* MULTIPLE_COUNT */
goto invalid_fld;
/* check protocol */
- switch((save_cmnd[1] >> 1) & 0xf) {
- case 3: /*no DATA */
- case 4: /* PIO in */
- case 5: /* PIO out */
- break;
- default:
- goto invalid_fld;
+ switch ((save_cmnd[1] >> 1) & 0xf) {
+ case 3: /*no DATA */
+ case 4: /* PIO in */
+ case 5: /* PIO out */
+ break;
+ default:
+ goto invalid_fld;
}
/* first build the ATACB command */
|| save_cmnd[11])
goto invalid_fld;
}
- }
- else { /* ATA12 */
+ } else { /* ATA12 */
srb->cmnd[ 6] = save_cmnd[3]; /* features */
srb->cmnd[ 7] = save_cmnd[4]; /* sector count */
srb->cmnd[ 8] = save_cmnd[5]; /* lba low */
info->ConfigData.ATAExtraConfig & ATACFGE_CONF_DESC2);
usb_stor_dbg(us, " Skip Device Boot: 0x%x\n",
info->ConfigData.ATAExtraConfig & ATACFGE_SKIP_BOOT);
- usb_stor_dbg(us, " ATA 3 State Supsend: 0x%x\n",
+ usb_stor_dbg(us, " ATA 3 State Suspend: 0x%x\n",
info->ConfigData.ATAExtraConfig & ATACFGE_STATE_SUSPEND);
usb_stor_dbg(us, " Descriptor Override: 0x%x\n",
info->ConfigData.ATAExtraConfig & ATACFGE_DESC_OVERRIDE);
static inline void hub_descriptor(struct usb_hub_descriptor *desc)
{
memset(desc, 0, sizeof(*desc));
- desc->bDescriptorType = 0x29;
+ desc->bDescriptorType = USB_DT_HUB;
desc->bDescLength = 9;
desc->wHubCharacteristics = __constant_cpu_to_le16(
HUB_CHAR_INDV_PORT_LPSM | HUB_CHAR_COMMON_OCPM);
if (wLength < length)
return -ENOSPC;
descr->bDescLength = 7 + 2 * temp;
- descr->bDescriptorType = 0x29; /* HUB type */
+ descr->bDescriptorType = USB_DT_HUB; /* HUB type */
descr->bNbrPorts = wusbhc->ports_max;
descr->wHubCharacteristics = cpu_to_le16(
HUB_CHAR_COMMON_LPSM /* All ports power at once */
return 0;
}
-static int umc_device_suspend(struct device *dev, pm_message_t state)
-{
- struct umc_dev *umc;
- struct umc_driver *umc_driver;
- int err = 0;
-
- umc = to_umc_dev(dev);
-
- if (dev->driver) {
- umc_driver = to_umc_driver(dev->driver);
- if (umc_driver->suspend)
- err = umc_driver->suspend(umc, state);
- }
- return err;
-}
-
-static int umc_device_resume(struct device *dev)
-{
- struct umc_dev *umc;
- struct umc_driver *umc_driver;
- int err = 0;
-
- umc = to_umc_dev(dev);
-
- if (dev->driver) {
- umc_driver = to_umc_driver(dev->driver);
- if (umc_driver->resume)
- err = umc_driver->resume(umc);
- }
- return err;
-}
-
static ssize_t capability_id_show(struct device *dev, struct device_attribute *attr, char *buf)
{
struct umc_dev *umc = to_umc_dev(dev);
.match = umc_bus_match,
.probe = umc_device_probe,
.remove = umc_device_remove,
- .suspend = umc_device_suspend,
- .resume = umc_device_resume,
.dev_groups = umc_dev_groups,
};
EXPORT_SYMBOL_GPL(umc_bus_type);
{
struct umc_dev *umc = card->devs[n];
- if (umc != NULL)
- umc_device_unregister(umc);
+ umc_device_unregister(umc);
}
static int whci_n_caps(struct pci_dev *pci)
depends on EEH && VFIO_IOMMU_SPAPR_TCE
default n
+config VFIO_VIRQFD
+ tristate
+ depends on VFIO && EVENTFD
+ default n
+
menuconfig VFIO
tristate "VFIO Non-Privileged userspace driver framework"
depends on IOMMU_API
If you don't know what to do here, say N.
source "drivers/vfio/pci/Kconfig"
+source "drivers/vfio/platform/Kconfig"
+vfio_virqfd-y := virqfd.o
+
obj-$(CONFIG_VFIO) += vfio.o
+obj-$(CONFIG_VFIO_VIRQFD) += vfio_virqfd.o
obj-$(CONFIG_VFIO_IOMMU_TYPE1) += vfio_iommu_type1.o
obj-$(CONFIG_VFIO_IOMMU_SPAPR_TCE) += vfio_iommu_spapr_tce.o
obj-$(CONFIG_VFIO_SPAPR_EEH) += vfio_spapr_eeh.o
obj-$(CONFIG_VFIO_PCI) += pci/
+obj-$(CONFIG_VFIO_PLATFORM) += platform/
config VFIO_PCI
tristate "VFIO support for PCI devices"
depends on VFIO && PCI && EVENTFD
+ select VFIO_VIRQFD
help
Support for the PCI VFIO bus driver. This is required to make
use of PCI drivers using the VFIO framework.
* Author: Tom Lyon, pugs@cisco.com
*/
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
#include <linux/device.h>
#include <linux/eventfd.h>
#include <linux/file.h>
#include <linux/types.h>
#include <linux/uaccess.h>
#include <linux/vfio.h>
+#include <linux/vgaarb.h>
#include "vfio_pci_private.h"
#define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
#define DRIVER_DESC "VFIO PCI - User Level meta-driver"
+static char ids[1024] __initdata;
+module_param_string(ids, ids, sizeof(ids), 0);
+MODULE_PARM_DESC(ids, "Initial PCI IDs to add to the vfio driver, format is \"vendor:device[:subvendor[:subdevice[:class[:class_mask]]]]\" and multiple comma separated entries can be specified");
+
static bool nointxmask;
module_param_named(nointxmask, nointxmask, bool, S_IRUGO | S_IWUSR);
MODULE_PARM_DESC(nointxmask,
"Disable support for PCI 2.3 style INTx masking. If this resolves problems for specific devices, report lspci -vvvxxx to linux-pci@vger.kernel.org so the device can be fixed automatically via the broken_intx_masking flag.");
+#ifdef CONFIG_VFIO_PCI_VGA
+static bool disable_vga;
+module_param(disable_vga, bool, S_IRUGO);
+MODULE_PARM_DESC(disable_vga, "Disable VGA resource access through vfio-pci");
+#endif
+
+static bool disable_idle_d3;
+module_param(disable_idle_d3, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(disable_idle_d3,
+ "Disable using the PCI D3 low power state for idle, unused devices");
+
static DEFINE_MUTEX(driver_lock);
+static inline bool vfio_vga_disabled(void)
+{
+#ifdef CONFIG_VFIO_PCI_VGA
+ return disable_vga;
+#else
+ return true;
+#endif
+}
+
+/*
+ * Our VGA arbiter participation is limited since we don't know anything
+ * about the device itself. However, if the device is the only VGA device
+ * downstream of a bridge and VFIO VGA support is disabled, then we can
+ * safely return legacy VGA IO and memory as not decoded since the user
+ * has no way to get to it and routing can be disabled externally at the
+ * bridge.
+ */
+static unsigned int vfio_pci_set_vga_decode(void *opaque, bool single_vga)
+{
+ struct vfio_pci_device *vdev = opaque;
+ struct pci_dev *tmp = NULL, *pdev = vdev->pdev;
+ unsigned char max_busnr;
+ unsigned int decodes;
+
+ if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus))
+ return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
+ VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
+
+ max_busnr = pci_bus_max_busnr(pdev->bus);
+ decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+
+ while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) {
+ if (tmp == pdev ||
+ pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) ||
+ pci_is_root_bus(tmp->bus))
+ continue;
+
+ if (tmp->bus->number >= pdev->bus->number &&
+ tmp->bus->number <= max_busnr) {
+ pci_dev_put(tmp);
+ decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
+ break;
+ }
+ }
+
+ return decodes;
+}
+
+static inline bool vfio_pci_is_vga(struct pci_dev *pdev)
+{
+ return (pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA;
+}
+
static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev);
static int vfio_pci_enable(struct vfio_pci_device *vdev)
u16 cmd;
u8 msix_pos;
+ pci_set_power_state(pdev, PCI_D0);
+
/* Don't allow our initial saved state to include busmaster */
pci_clear_master(pdev);
} else
vdev->msix_bar = 0xFF;
-#ifdef CONFIG_VFIO_PCI_VGA
- if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
+ if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
vdev->has_vga = true;
-#endif
return 0;
}
* Try to reset the device. The success of this is dependent on
* being able to lock the device, which is not always possible.
*/
- if (vdev->reset_works) {
- int ret = pci_try_reset_function(pdev);
- if (ret)
- pr_warn("%s: Failed to reset device %s (%d)\n",
- __func__, dev_name(&pdev->dev), ret);
- else
- vdev->needs_reset = false;
- }
+ if (vdev->reset_works && !pci_try_reset_function(pdev))
+ vdev->needs_reset = false;
pci_restore_state(pdev);
out:
pci_disable_device(pdev);
vfio_pci_try_bus_reset(vdev);
+
+ if (!disable_idle_d3)
+ pci_set_power_state(pdev, PCI_D3hot);
}
static void vfio_pci_release(void *device_data)
if (ret) {
iommu_group_put(group);
kfree(vdev);
+ return ret;
+ }
+
+ if (vfio_pci_is_vga(pdev)) {
+ vga_client_register(pdev, vdev, NULL, vfio_pci_set_vga_decode);
+ vga_set_legacy_decoding(pdev,
+ vfio_pci_set_vga_decode(vdev, false));
+ }
+
+ if (!disable_idle_d3) {
+ /*
+ * pci-core sets the device power state to an unknown value at
+ * bootup and after being removed from a driver. The only
+ * transition it allows from this unknown state is to D0, which
+ * typically happens when a driver calls pci_enable_device().
+ * We're not ready to enable the device yet, but we do want to
+ * be able to get to D3. Therefore first do a D0 transition
+ * before going to D3.
+ */
+ pci_set_power_state(pdev, PCI_D0);
+ pci_set_power_state(pdev, PCI_D3hot);
}
return ret;
struct vfio_pci_device *vdev;
vdev = vfio_del_group_dev(&pdev->dev);
- if (vdev) {
- iommu_group_put(pdev->dev.iommu_group);
- kfree(vdev);
+ if (!vdev)
+ return;
+
+ iommu_group_put(pdev->dev.iommu_group);
+ kfree(vdev);
+
+ if (vfio_pci_is_vga(pdev)) {
+ vga_client_register(pdev, NULL, NULL, NULL);
+ vga_set_legacy_decoding(pdev,
+ VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
+ VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM);
}
+
+ if (!disable_idle_d3)
+ pci_set_power_state(pdev, PCI_D0);
}
static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev,
put_devs:
for (i = 0; i < devs.cur_index; i++) {
- if (!ret) {
- tmp = vfio_device_data(devs.devices[i]);
+ tmp = vfio_device_data(devs.devices[i]);
+ if (!ret)
tmp->needs_reset = false;
- }
+
+ if (!tmp->refcnt && !disable_idle_d3)
+ pci_set_power_state(tmp->pdev, PCI_D3hot);
+
vfio_device_put(devs.devices[i]);
}
static void __exit vfio_pci_cleanup(void)
{
pci_unregister_driver(&vfio_pci_driver);
- vfio_pci_virqfd_exit();
vfio_pci_uninit_perm_bits();
}
+static void __init vfio_pci_fill_ids(void)
+{
+ char *p, *id;
+ int rc;
+
+ /* no ids passed actually */
+ if (ids[0] == '\0')
+ return;
+
+ /* add ids specified in the module parameter */
+ p = ids;
+ while ((id = strsep(&p, ","))) {
+ unsigned int vendor, device, subvendor = PCI_ANY_ID,
+ subdevice = PCI_ANY_ID, class = 0, class_mask = 0;
+ int fields;
+
+ if (!strlen(id))
+ continue;
+
+ fields = sscanf(id, "%x:%x:%x:%x:%x:%x",
+ &vendor, &device, &subvendor, &subdevice,
+ &class, &class_mask);
+
+ if (fields < 2) {
+ pr_warn("invalid id string \"%s\"\n", id);
+ continue;
+ }
+
+ rc = pci_add_dynid(&vfio_pci_driver, vendor, device,
+ subvendor, subdevice, class, class_mask, 0);
+ if (rc)
+ pr_warn("failed to add dynamic id [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x (%d)\n",
+ vendor, device, subvendor, subdevice,
+ class, class_mask, rc);
+ else
+ pr_info("add [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x\n",
+ vendor, device, subvendor, subdevice,
+ class, class_mask);
+ }
+}
+
static int __init vfio_pci_init(void)
{
int ret;
if (ret)
return ret;
- /* Start the virqfd cleanup handler */
- ret = vfio_pci_virqfd_init();
- if (ret)
- goto out_virqfd;
-
/* Register and scan for devices */
ret = pci_register_driver(&vfio_pci_driver);
if (ret)
goto out_driver;
+ vfio_pci_fill_ids();
+
return 0;
out_driver:
- vfio_pci_virqfd_exit();
-out_virqfd:
vfio_pci_uninit_perm_bits();
return ret;
}
#include <linux/msi.h>
#include <linux/pci.h>
#include <linux/file.h>
-#include <linux/poll.h>
#include <linux/vfio.h>
#include <linux/wait.h>
-#include <linux/workqueue.h>
#include <linux/slab.h>
#include "vfio_pci_private.h"
-/*
- * IRQfd - generic
- */
-struct virqfd {
- struct vfio_pci_device *vdev;
- struct eventfd_ctx *eventfd;
- int (*handler)(struct vfio_pci_device *, void *);
- void (*thread)(struct vfio_pci_device *, void *);
- void *data;
- struct work_struct inject;
- wait_queue_t wait;
- poll_table pt;
- struct work_struct shutdown;
- struct virqfd **pvirqfd;
-};
-
-static struct workqueue_struct *vfio_irqfd_cleanup_wq;
-
-int __init vfio_pci_virqfd_init(void)
-{
- vfio_irqfd_cleanup_wq =
- create_singlethread_workqueue("vfio-irqfd-cleanup");
- if (!vfio_irqfd_cleanup_wq)
- return -ENOMEM;
-
- return 0;
-}
-
-void vfio_pci_virqfd_exit(void)
-{
- destroy_workqueue(vfio_irqfd_cleanup_wq);
-}
-
-static void virqfd_deactivate(struct virqfd *virqfd)
-{
- queue_work(vfio_irqfd_cleanup_wq, &virqfd->shutdown);
-}
-
-static int virqfd_wakeup(wait_queue_t *wait, unsigned mode, int sync, void *key)
-{
- struct virqfd *virqfd = container_of(wait, struct virqfd, wait);
- unsigned long flags = (unsigned long)key;
-
- if (flags & POLLIN) {
- /* An event has been signaled, call function */
- if ((!virqfd->handler ||
- virqfd->handler(virqfd->vdev, virqfd->data)) &&
- virqfd->thread)
- schedule_work(&virqfd->inject);
- }
-
- if (flags & POLLHUP) {
- unsigned long flags;
- spin_lock_irqsave(&virqfd->vdev->irqlock, flags);
-
- /*
- * The eventfd is closing, if the virqfd has not yet been
- * queued for release, as determined by testing whether the
- * vdev pointer to it is still valid, queue it now. As
- * with kvm irqfds, we know we won't race against the virqfd
- * going away because we hold wqh->lock to get here.
- */
- if (*(virqfd->pvirqfd) == virqfd) {
- *(virqfd->pvirqfd) = NULL;
- virqfd_deactivate(virqfd);
- }
-
- spin_unlock_irqrestore(&virqfd->vdev->irqlock, flags);
- }
-
- return 0;
-}
-
-static void virqfd_ptable_queue_proc(struct file *file,
- wait_queue_head_t *wqh, poll_table *pt)
-{
- struct virqfd *virqfd = container_of(pt, struct virqfd, pt);
- add_wait_queue(wqh, &virqfd->wait);
-}
-
-static void virqfd_shutdown(struct work_struct *work)
-{
- struct virqfd *virqfd = container_of(work, struct virqfd, shutdown);
- u64 cnt;
-
- eventfd_ctx_remove_wait_queue(virqfd->eventfd, &virqfd->wait, &cnt);
- flush_work(&virqfd->inject);
- eventfd_ctx_put(virqfd->eventfd);
-
- kfree(virqfd);
-}
-
-static void virqfd_inject(struct work_struct *work)
-{
- struct virqfd *virqfd = container_of(work, struct virqfd, inject);
- if (virqfd->thread)
- virqfd->thread(virqfd->vdev, virqfd->data);
-}
-
-static int virqfd_enable(struct vfio_pci_device *vdev,
- int (*handler)(struct vfio_pci_device *, void *),
- void (*thread)(struct vfio_pci_device *, void *),
- void *data, struct virqfd **pvirqfd, int fd)
-{
- struct fd irqfd;
- struct eventfd_ctx *ctx;
- struct virqfd *virqfd;
- int ret = 0;
- unsigned int events;
-
- virqfd = kzalloc(sizeof(*virqfd), GFP_KERNEL);
- if (!virqfd)
- return -ENOMEM;
-
- virqfd->pvirqfd = pvirqfd;
- virqfd->vdev = vdev;
- virqfd->handler = handler;
- virqfd->thread = thread;
- virqfd->data = data;
-
- INIT_WORK(&virqfd->shutdown, virqfd_shutdown);
- INIT_WORK(&virqfd->inject, virqfd_inject);
-
- irqfd = fdget(fd);
- if (!irqfd.file) {
- ret = -EBADF;
- goto err_fd;
- }
-
- ctx = eventfd_ctx_fileget(irqfd.file);
- if (IS_ERR(ctx)) {
- ret = PTR_ERR(ctx);
- goto err_ctx;
- }
-
- virqfd->eventfd = ctx;
-
- /*
- * virqfds can be released by closing the eventfd or directly
- * through ioctl. These are both done through a workqueue, so
- * we update the pointer to the virqfd under lock to avoid
- * pushing multiple jobs to release the same virqfd.
- */
- spin_lock_irq(&vdev->irqlock);
-
- if (*pvirqfd) {
- spin_unlock_irq(&vdev->irqlock);
- ret = -EBUSY;
- goto err_busy;
- }
- *pvirqfd = virqfd;
-
- spin_unlock_irq(&vdev->irqlock);
-
- /*
- * Install our own custom wake-up handling so we are notified via
- * a callback whenever someone signals the underlying eventfd.
- */
- init_waitqueue_func_entry(&virqfd->wait, virqfd_wakeup);
- init_poll_funcptr(&virqfd->pt, virqfd_ptable_queue_proc);
-
- events = irqfd.file->f_op->poll(irqfd.file, &virqfd->pt);
-
- /*
- * Check if there was an event already pending on the eventfd
- * before we registered and trigger it as if we didn't miss it.
- */
- if (events & POLLIN) {
- if ((!handler || handler(vdev, data)) && thread)
- schedule_work(&virqfd->inject);
- }
-
- /*
- * Do not drop the file until the irqfd is fully initialized,
- * otherwise we might race against the POLLHUP.
- */
- fdput(irqfd);
-
- return 0;
-err_busy:
- eventfd_ctx_put(ctx);
-err_ctx:
- fdput(irqfd);
-err_fd:
- kfree(virqfd);
-
- return ret;
-}
-
-static void virqfd_disable(struct vfio_pci_device *vdev,
- struct virqfd **pvirqfd)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&vdev->irqlock, flags);
-
- if (*pvirqfd) {
- virqfd_deactivate(*pvirqfd);
- *pvirqfd = NULL;
- }
-
- spin_unlock_irqrestore(&vdev->irqlock, flags);
-
- /*
- * Block until we know all outstanding shutdown jobs have completed.
- * Even if we don't queue the job, flush the wq to be sure it's
- * been released.
- */
- flush_workqueue(vfio_irqfd_cleanup_wq);
-}
-
/*
* INTx
*/
-static void vfio_send_intx_eventfd(struct vfio_pci_device *vdev, void *unused)
+static void vfio_send_intx_eventfd(void *opaque, void *unused)
{
+ struct vfio_pci_device *vdev = opaque;
+
if (likely(is_intx(vdev) && !vdev->virq_disabled))
eventfd_signal(vdev->ctx[0].trigger, 1);
}
* a signal is necessary, which can then be handled via a work queue
* or directly depending on the caller.
*/
-static int vfio_pci_intx_unmask_handler(struct vfio_pci_device *vdev,
- void *unused)
+static int vfio_pci_intx_unmask_handler(void *opaque, void *unused)
{
+ struct vfio_pci_device *vdev = opaque;
struct pci_dev *pdev = vdev->pdev;
unsigned long flags;
int ret = 0;
static void vfio_intx_disable(struct vfio_pci_device *vdev)
{
vfio_intx_set_signal(vdev, -1);
- virqfd_disable(vdev, &vdev->ctx[0].unmask);
- virqfd_disable(vdev, &vdev->ctx[0].mask);
+ vfio_virqfd_disable(&vdev->ctx[0].unmask);
+ vfio_virqfd_disable(&vdev->ctx[0].mask);
vdev->irq_type = VFIO_PCI_NUM_IRQS;
vdev->num_ctx = 0;
kfree(vdev->ctx);
vfio_msi_set_block(vdev, 0, vdev->num_ctx, NULL, msix);
for (i = 0; i < vdev->num_ctx; i++) {
- virqfd_disable(vdev, &vdev->ctx[i].unmask);
- virqfd_disable(vdev, &vdev->ctx[i].mask);
+ vfio_virqfd_disable(&vdev->ctx[i].unmask);
+ vfio_virqfd_disable(&vdev->ctx[i].mask);
}
if (msix) {
} else if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
int32_t fd = *(int32_t *)data;
if (fd >= 0)
- return virqfd_enable(vdev, vfio_pci_intx_unmask_handler,
- vfio_send_intx_eventfd, NULL,
- &vdev->ctx[0].unmask, fd);
+ return vfio_virqfd_enable((void *) vdev,
+ vfio_pci_intx_unmask_handler,
+ vfio_send_intx_eventfd, NULL,
+ &vdev->ctx[0].unmask, fd);
- virqfd_disable(vdev, &vdev->ctx[0].unmask);
+ vfio_virqfd_disable(&vdev->ctx[0].unmask);
}
return 0;
extern int vfio_pci_init_perm_bits(void);
extern void vfio_pci_uninit_perm_bits(void);
-extern int vfio_pci_virqfd_init(void);
-extern void vfio_pci_virqfd_exit(void);
-
extern int vfio_config_init(struct vfio_pci_device *vdev);
extern void vfio_config_free(struct vfio_pci_device *vdev);
#endif /* VFIO_PCI_PRIVATE_H */
--- /dev/null
+config VFIO_PLATFORM
+ tristate "VFIO support for platform devices"
+ depends on VFIO && EVENTFD && ARM
+ select VFIO_VIRQFD
+ help
+ Support for platform devices with VFIO. This is required to make
+ use of platform devices present on the system using the VFIO
+ framework.
+
+ If you don't know what to do here, say N.
+
+config VFIO_AMBA
+ tristate "VFIO support for AMBA devices"
+ depends on VFIO_PLATFORM && ARM_AMBA
+ help
+ Support for ARM AMBA devices with VFIO. This is required to make
+ use of ARM AMBA devices present on the system using the VFIO
+ framework.
+
+ If you don't know what to do here, say N.
--- /dev/null
+
+vfio-platform-y := vfio_platform.o vfio_platform_common.o vfio_platform_irq.o
+
+obj-$(CONFIG_VFIO_PLATFORM) += vfio-platform.o
+
+vfio-amba-y := vfio_amba.o
+
+obj-$(CONFIG_VFIO_AMBA) += vfio-amba.o
--- /dev/null
+/*
+ * Copyright (C) 2013 - Virtual Open Systems
+ * Author: Antonios Motakis <a.motakis@virtualopensystems.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/vfio.h>
+#include <linux/amba/bus.h>
+
+#include "vfio_platform_private.h"
+
+#define DRIVER_VERSION "0.10"
+#define DRIVER_AUTHOR "Antonios Motakis <a.motakis@virtualopensystems.com>"
+#define DRIVER_DESC "VFIO for AMBA devices - User Level meta-driver"
+
+/* probing devices from the AMBA bus */
+
+static struct resource *get_amba_resource(struct vfio_platform_device *vdev,
+ int i)
+{
+ struct amba_device *adev = (struct amba_device *) vdev->opaque;
+
+ if (i == 0)
+ return &adev->res;
+
+ return NULL;
+}
+
+static int get_amba_irq(struct vfio_platform_device *vdev, int i)
+{
+ struct amba_device *adev = (struct amba_device *) vdev->opaque;
+ int ret = 0;
+
+ if (i < AMBA_NR_IRQS)
+ ret = adev->irq[i];
+
+ /* zero is an unset IRQ for AMBA devices */
+ return ret ? ret : -ENXIO;
+}
+
+static int vfio_amba_probe(struct amba_device *adev, const struct amba_id *id)
+{
+ struct vfio_platform_device *vdev;
+ int ret;
+
+ vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
+ if (!vdev)
+ return -ENOMEM;
+
+ vdev->name = kasprintf(GFP_KERNEL, "vfio-amba-%08x", adev->periphid);
+ if (!vdev->name) {
+ kfree(vdev);
+ return -ENOMEM;
+ }
+
+ vdev->opaque = (void *) adev;
+ vdev->flags = VFIO_DEVICE_FLAGS_AMBA;
+ vdev->get_resource = get_amba_resource;
+ vdev->get_irq = get_amba_irq;
+
+ ret = vfio_platform_probe_common(vdev, &adev->dev);
+ if (ret) {
+ kfree(vdev->name);
+ kfree(vdev);
+ }
+
+ return ret;
+}
+
+static int vfio_amba_remove(struct amba_device *adev)
+{
+ struct vfio_platform_device *vdev;
+
+ vdev = vfio_platform_remove_common(&adev->dev);
+ if (vdev) {
+ kfree(vdev->name);
+ kfree(vdev);
+ return 0;
+ }
+
+ return -EINVAL;
+}
+
+static struct amba_id pl330_ids[] = {
+ { 0, 0 },
+};
+
+MODULE_DEVICE_TABLE(amba, pl330_ids);
+
+static struct amba_driver vfio_amba_driver = {
+ .probe = vfio_amba_probe,
+ .remove = vfio_amba_remove,
+ .id_table = pl330_ids,
+ .drv = {
+ .name = "vfio-amba",
+ .owner = THIS_MODULE,
+ },
+};
+
+module_amba_driver(vfio_amba_driver);
+
+MODULE_VERSION(DRIVER_VERSION);
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR(DRIVER_AUTHOR);
+MODULE_DESCRIPTION(DRIVER_DESC);
--- /dev/null
+/*
+ * Copyright (C) 2013 - Virtual Open Systems
+ * Author: Antonios Motakis <a.motakis@virtualopensystems.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/vfio.h>
+#include <linux/platform_device.h>
+
+#include "vfio_platform_private.h"
+
+#define DRIVER_VERSION "0.10"
+#define DRIVER_AUTHOR "Antonios Motakis <a.motakis@virtualopensystems.com>"
+#define DRIVER_DESC "VFIO for platform devices - User Level meta-driver"
+
+/* probing devices from the linux platform bus */
+
+static struct resource *get_platform_resource(struct vfio_platform_device *vdev,
+ int num)
+{
+ struct platform_device *dev = (struct platform_device *) vdev->opaque;
+ int i;
+
+ for (i = 0; i < dev->num_resources; i++) {
+ struct resource *r = &dev->resource[i];
+
+ if (resource_type(r) & (IORESOURCE_MEM|IORESOURCE_IO)) {
+ if (!num)
+ return r;
+
+ num--;
+ }
+ }
+ return NULL;
+}
+
+static int get_platform_irq(struct vfio_platform_device *vdev, int i)
+{
+ struct platform_device *pdev = (struct platform_device *) vdev->opaque;
+
+ return platform_get_irq(pdev, i);
+}
+
+static int vfio_platform_probe(struct platform_device *pdev)
+{
+ struct vfio_platform_device *vdev;
+ int ret;
+
+ vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
+ if (!vdev)
+ return -ENOMEM;
+
+ vdev->opaque = (void *) pdev;
+ vdev->name = pdev->name;
+ vdev->flags = VFIO_DEVICE_FLAGS_PLATFORM;
+ vdev->get_resource = get_platform_resource;
+ vdev->get_irq = get_platform_irq;
+
+ ret = vfio_platform_probe_common(vdev, &pdev->dev);
+ if (ret)
+ kfree(vdev);
+
+ return ret;
+}
+
+static int vfio_platform_remove(struct platform_device *pdev)
+{
+ struct vfio_platform_device *vdev;
+
+ vdev = vfio_platform_remove_common(&pdev->dev);
+ if (vdev) {
+ kfree(vdev);
+ return 0;
+ }
+
+ return -EINVAL;
+}
+
+static struct platform_driver vfio_platform_driver = {
+ .probe = vfio_platform_probe,
+ .remove = vfio_platform_remove,
+ .driver = {
+ .name = "vfio-platform",
+ .owner = THIS_MODULE,
+ },
+};
+
+module_platform_driver(vfio_platform_driver);
+
+MODULE_VERSION(DRIVER_VERSION);
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR(DRIVER_AUTHOR);
+MODULE_DESCRIPTION(DRIVER_DESC);
--- /dev/null
+/*
+ * Copyright (C) 2013 - Virtual Open Systems
+ * Author: Antonios Motakis <a.motakis@virtualopensystems.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/device.h>
+#include <linux/iommu.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+#include <linux/uaccess.h>
+#include <linux/vfio.h>
+
+#include "vfio_platform_private.h"
+
+static DEFINE_MUTEX(driver_lock);
+
+static int vfio_platform_regions_init(struct vfio_platform_device *vdev)
+{
+ int cnt = 0, i;
+
+ while (vdev->get_resource(vdev, cnt))
+ cnt++;
+
+ vdev->regions = kcalloc(cnt, sizeof(struct vfio_platform_region),
+ GFP_KERNEL);
+ if (!vdev->regions)
+ return -ENOMEM;
+
+ for (i = 0; i < cnt; i++) {
+ struct resource *res =
+ vdev->get_resource(vdev, i);
+
+ if (!res)
+ goto err;
+
+ vdev->regions[i].addr = res->start;
+ vdev->regions[i].size = resource_size(res);
+ vdev->regions[i].flags = 0;
+
+ switch (resource_type(res)) {
+ case IORESOURCE_MEM:
+ vdev->regions[i].type = VFIO_PLATFORM_REGION_TYPE_MMIO;
+ vdev->regions[i].flags |= VFIO_REGION_INFO_FLAG_READ;
+ if (!(res->flags & IORESOURCE_READONLY))
+ vdev->regions[i].flags |=
+ VFIO_REGION_INFO_FLAG_WRITE;
+
+ /*
+ * Only regions addressed with PAGE granularity may be
+ * MMAPed securely.
+ */
+ if (!(vdev->regions[i].addr & ~PAGE_MASK) &&
+ !(vdev->regions[i].size & ~PAGE_MASK))
+ vdev->regions[i].flags |=
+ VFIO_REGION_INFO_FLAG_MMAP;
+
+ break;
+ case IORESOURCE_IO:
+ vdev->regions[i].type = VFIO_PLATFORM_REGION_TYPE_PIO;
+ break;
+ default:
+ goto err;
+ }
+ }
+
+ vdev->num_regions = cnt;
+
+ return 0;
+err:
+ kfree(vdev->regions);
+ return -EINVAL;
+}
+
+static void vfio_platform_regions_cleanup(struct vfio_platform_device *vdev)
+{
+ int i;
+
+ for (i = 0; i < vdev->num_regions; i++)
+ iounmap(vdev->regions[i].ioaddr);
+
+ vdev->num_regions = 0;
+ kfree(vdev->regions);
+}
+
+static void vfio_platform_release(void *device_data)
+{
+ struct vfio_platform_device *vdev = device_data;
+
+ mutex_lock(&driver_lock);
+
+ if (!(--vdev->refcnt)) {
+ vfio_platform_regions_cleanup(vdev);
+ vfio_platform_irq_cleanup(vdev);
+ }
+
+ mutex_unlock(&driver_lock);
+
+ module_put(THIS_MODULE);
+}
+
+static int vfio_platform_open(void *device_data)
+{
+ struct vfio_platform_device *vdev = device_data;
+ int ret;
+
+ if (!try_module_get(THIS_MODULE))
+ return -ENODEV;
+
+ mutex_lock(&driver_lock);
+
+ if (!vdev->refcnt) {
+ ret = vfio_platform_regions_init(vdev);
+ if (ret)
+ goto err_reg;
+
+ ret = vfio_platform_irq_init(vdev);
+ if (ret)
+ goto err_irq;
+ }
+
+ vdev->refcnt++;
+
+ mutex_unlock(&driver_lock);
+ return 0;
+
+err_irq:
+ vfio_platform_regions_cleanup(vdev);
+err_reg:
+ mutex_unlock(&driver_lock);
+ module_put(THIS_MODULE);
+ return ret;
+}
+
+static long vfio_platform_ioctl(void *device_data,
+ unsigned int cmd, unsigned long arg)
+{
+ struct vfio_platform_device *vdev = device_data;
+ unsigned long minsz;
+
+ if (cmd == VFIO_DEVICE_GET_INFO) {
+ struct vfio_device_info info;
+
+ minsz = offsetofend(struct vfio_device_info, num_irqs);
+
+ if (copy_from_user(&info, (void __user *)arg, minsz))
+ return -EFAULT;
+
+ if (info.argsz < minsz)
+ return -EINVAL;
+
+ info.flags = vdev->flags;
+ info.num_regions = vdev->num_regions;
+ info.num_irqs = vdev->num_irqs;
+
+ return copy_to_user((void __user *)arg, &info, minsz);
+
+ } else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
+ struct vfio_region_info info;
+
+ minsz = offsetofend(struct vfio_region_info, offset);
+
+ if (copy_from_user(&info, (void __user *)arg, minsz))
+ return -EFAULT;
+
+ if (info.argsz < minsz)
+ return -EINVAL;
+
+ if (info.index >= vdev->num_regions)
+ return -EINVAL;
+
+ /* map offset to the physical address */
+ info.offset = VFIO_PLATFORM_INDEX_TO_OFFSET(info.index);
+ info.size = vdev->regions[info.index].size;
+ info.flags = vdev->regions[info.index].flags;
+
+ return copy_to_user((void __user *)arg, &info, minsz);
+
+ } else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
+ struct vfio_irq_info info;
+
+ minsz = offsetofend(struct vfio_irq_info, count);
+
+ if (copy_from_user(&info, (void __user *)arg, minsz))
+ return -EFAULT;
+
+ if (info.argsz < minsz)
+ return -EINVAL;
+
+ if (info.index >= vdev->num_irqs)
+ return -EINVAL;
+
+ info.flags = vdev->irqs[info.index].flags;
+ info.count = vdev->irqs[info.index].count;
+
+ return copy_to_user((void __user *)arg, &info, minsz);
+
+ } else if (cmd == VFIO_DEVICE_SET_IRQS) {
+ struct vfio_irq_set hdr;
+ u8 *data = NULL;
+ int ret = 0;
+
+ minsz = offsetofend(struct vfio_irq_set, count);
+
+ if (copy_from_user(&hdr, (void __user *)arg, minsz))
+ return -EFAULT;
+
+ if (hdr.argsz < minsz)
+ return -EINVAL;
+
+ if (hdr.index >= vdev->num_irqs)
+ return -EINVAL;
+
+ if (hdr.flags & ~(VFIO_IRQ_SET_DATA_TYPE_MASK |
+ VFIO_IRQ_SET_ACTION_TYPE_MASK))
+ return -EINVAL;
+
+ if (!(hdr.flags & VFIO_IRQ_SET_DATA_NONE)) {
+ size_t size;
+
+ if (hdr.flags & VFIO_IRQ_SET_DATA_BOOL)
+ size = sizeof(uint8_t);
+ else if (hdr.flags & VFIO_IRQ_SET_DATA_EVENTFD)
+ size = sizeof(int32_t);
+ else
+ return -EINVAL;
+
+ if (hdr.argsz - minsz < size)
+ return -EINVAL;
+
+ data = memdup_user((void __user *)(arg + minsz), size);
+ if (IS_ERR(data))
+ return PTR_ERR(data);
+ }
+
+ mutex_lock(&vdev->igate);
+
+ ret = vfio_platform_set_irqs_ioctl(vdev, hdr.flags, hdr.index,
+ hdr.start, hdr.count, data);
+ mutex_unlock(&vdev->igate);
+ kfree(data);
+
+ return ret;
+
+ } else if (cmd == VFIO_DEVICE_RESET)
+ return -EINVAL;
+
+ return -ENOTTY;
+}
+
+static ssize_t vfio_platform_read_mmio(struct vfio_platform_region reg,
+ char __user *buf, size_t count,
+ loff_t off)
+{
+ unsigned int done = 0;
+
+ if (!reg.ioaddr) {
+ reg.ioaddr =
+ ioremap_nocache(reg.addr, reg.size);
+
+ if (!reg.ioaddr)
+ return -ENOMEM;
+ }
+
+ while (count) {
+ size_t filled;
+
+ if (count >= 4 && !(off % 4)) {
+ u32 val;
+
+ val = ioread32(reg.ioaddr + off);
+ if (copy_to_user(buf, &val, 4))
+ goto err;
+
+ filled = 4;
+ } else if (count >= 2 && !(off % 2)) {
+ u16 val;
+
+ val = ioread16(reg.ioaddr + off);
+ if (copy_to_user(buf, &val, 2))
+ goto err;
+
+ filled = 2;
+ } else {
+ u8 val;
+
+ val = ioread8(reg.ioaddr + off);
+ if (copy_to_user(buf, &val, 1))
+ goto err;
+
+ filled = 1;
+ }
+
+
+ count -= filled;
+ done += filled;
+ off += filled;
+ buf += filled;
+ }
+
+ return done;
+err:
+ return -EFAULT;
+}
+
+static ssize_t vfio_platform_read(void *device_data, char __user *buf,
+ size_t count, loff_t *ppos)
+{
+ struct vfio_platform_device *vdev = device_data;
+ unsigned int index = VFIO_PLATFORM_OFFSET_TO_INDEX(*ppos);
+ loff_t off = *ppos & VFIO_PLATFORM_OFFSET_MASK;
+
+ if (index >= vdev->num_regions)
+ return -EINVAL;
+
+ if (!(vdev->regions[index].flags & VFIO_REGION_INFO_FLAG_READ))
+ return -EINVAL;
+
+ if (vdev->regions[index].type & VFIO_PLATFORM_REGION_TYPE_MMIO)
+ return vfio_platform_read_mmio(vdev->regions[index],
+ buf, count, off);
+ else if (vdev->regions[index].type & VFIO_PLATFORM_REGION_TYPE_PIO)
+ return -EINVAL; /* not implemented */
+
+ return -EINVAL;
+}
+
+static ssize_t vfio_platform_write_mmio(struct vfio_platform_region reg,
+ const char __user *buf, size_t count,
+ loff_t off)
+{
+ unsigned int done = 0;
+
+ if (!reg.ioaddr) {
+ reg.ioaddr =
+ ioremap_nocache(reg.addr, reg.size);
+
+ if (!reg.ioaddr)
+ return -ENOMEM;
+ }
+
+ while (count) {
+ size_t filled;
+
+ if (count >= 4 && !(off % 4)) {
+ u32 val;
+
+ if (copy_from_user(&val, buf, 4))
+ goto err;
+ iowrite32(val, reg.ioaddr + off);
+
+ filled = 4;
+ } else if (count >= 2 && !(off % 2)) {
+ u16 val;
+
+ if (copy_from_user(&val, buf, 2))
+ goto err;
+ iowrite16(val, reg.ioaddr + off);
+
+ filled = 2;
+ } else {
+ u8 val;
+
+ if (copy_from_user(&val, buf, 1))
+ goto err;
+ iowrite8(val, reg.ioaddr + off);
+
+ filled = 1;
+ }
+
+ count -= filled;
+ done += filled;
+ off += filled;
+ buf += filled;
+ }
+
+ return done;
+err:
+ return -EFAULT;
+}
+
+static ssize_t vfio_platform_write(void *device_data, const char __user *buf,
+ size_t count, loff_t *ppos)
+{
+ struct vfio_platform_device *vdev = device_data;
+ unsigned int index = VFIO_PLATFORM_OFFSET_TO_INDEX(*ppos);
+ loff_t off = *ppos & VFIO_PLATFORM_OFFSET_MASK;
+
+ if (index >= vdev->num_regions)
+ return -EINVAL;
+
+ if (!(vdev->regions[index].flags & VFIO_REGION_INFO_FLAG_WRITE))
+ return -EINVAL;
+
+ if (vdev->regions[index].type & VFIO_PLATFORM_REGION_TYPE_MMIO)
+ return vfio_platform_write_mmio(vdev->regions[index],
+ buf, count, off);
+ else if (vdev->regions[index].type & VFIO_PLATFORM_REGION_TYPE_PIO)
+ return -EINVAL; /* not implemented */
+
+ return -EINVAL;
+}
+
+static int vfio_platform_mmap_mmio(struct vfio_platform_region region,
+ struct vm_area_struct *vma)
+{
+ u64 req_len, pgoff, req_start;
+
+ req_len = vma->vm_end - vma->vm_start;
+ pgoff = vma->vm_pgoff &
+ ((1U << (VFIO_PLATFORM_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
+ req_start = pgoff << PAGE_SHIFT;
+
+ if (region.size < PAGE_SIZE || req_start + req_len > region.size)
+ return -EINVAL;
+
+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+ vma->vm_pgoff = (region.addr >> PAGE_SHIFT) + pgoff;
+
+ return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
+ req_len, vma->vm_page_prot);
+}
+
+static int vfio_platform_mmap(void *device_data, struct vm_area_struct *vma)
+{
+ struct vfio_platform_device *vdev = device_data;
+ unsigned int index;
+
+ index = vma->vm_pgoff >> (VFIO_PLATFORM_OFFSET_SHIFT - PAGE_SHIFT);
+
+ if (vma->vm_end < vma->vm_start)
+ return -EINVAL;
+ if (!(vma->vm_flags & VM_SHARED))
+ return -EINVAL;
+ if (index >= vdev->num_regions)
+ return -EINVAL;
+ if (vma->vm_start & ~PAGE_MASK)
+ return -EINVAL;
+ if (vma->vm_end & ~PAGE_MASK)
+ return -EINVAL;
+
+ if (!(vdev->regions[index].flags & VFIO_REGION_INFO_FLAG_MMAP))
+ return -EINVAL;
+
+ if (!(vdev->regions[index].flags & VFIO_REGION_INFO_FLAG_READ)
+ && (vma->vm_flags & VM_READ))
+ return -EINVAL;
+
+ if (!(vdev->regions[index].flags & VFIO_REGION_INFO_FLAG_WRITE)
+ && (vma->vm_flags & VM_WRITE))
+ return -EINVAL;
+
+ vma->vm_private_data = vdev;
+
+ if (vdev->regions[index].type & VFIO_PLATFORM_REGION_TYPE_MMIO)
+ return vfio_platform_mmap_mmio(vdev->regions[index], vma);
+
+ else if (vdev->regions[index].type & VFIO_PLATFORM_REGION_TYPE_PIO)
+ return -EINVAL; /* not implemented */
+
+ return -EINVAL;
+}
+
+static const struct vfio_device_ops vfio_platform_ops = {
+ .name = "vfio-platform",
+ .open = vfio_platform_open,
+ .release = vfio_platform_release,
+ .ioctl = vfio_platform_ioctl,
+ .read = vfio_platform_read,
+ .write = vfio_platform_write,
+ .mmap = vfio_platform_mmap,
+};
+
+int vfio_platform_probe_common(struct vfio_platform_device *vdev,
+ struct device *dev)
+{
+ struct iommu_group *group;
+ int ret;
+
+ if (!vdev)
+ return -EINVAL;
+
+ group = iommu_group_get(dev);
+ if (!group) {
+ pr_err("VFIO: No IOMMU group for device %s\n", vdev->name);
+ return -EINVAL;
+ }
+
+ ret = vfio_add_group_dev(dev, &vfio_platform_ops, vdev);
+ if (ret) {
+ iommu_group_put(group);
+ return ret;
+ }
+
+ mutex_init(&vdev->igate);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(vfio_platform_probe_common);
+
+struct vfio_platform_device *vfio_platform_remove_common(struct device *dev)
+{
+ struct vfio_platform_device *vdev;
+
+ vdev = vfio_del_group_dev(dev);
+ if (vdev)
+ iommu_group_put(dev->iommu_group);
+
+ return vdev;
+}
+EXPORT_SYMBOL_GPL(vfio_platform_remove_common);
--- /dev/null
+/*
+ * VFIO platform devices interrupt handling
+ *
+ * Copyright (C) 2013 - Virtual Open Systems
+ * Author: Antonios Motakis <a.motakis@virtualopensystems.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/eventfd.h>
+#include <linux/interrupt.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+#include <linux/vfio.h>
+#include <linux/irq.h>
+
+#include "vfio_platform_private.h"
+
+static void vfio_platform_mask(struct vfio_platform_irq *irq_ctx)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&irq_ctx->lock, flags);
+
+ if (!irq_ctx->masked) {
+ disable_irq_nosync(irq_ctx->hwirq);
+ irq_ctx->masked = true;
+ }
+
+ spin_unlock_irqrestore(&irq_ctx->lock, flags);
+}
+
+static int vfio_platform_mask_handler(void *opaque, void *unused)
+{
+ struct vfio_platform_irq *irq_ctx = opaque;
+
+ vfio_platform_mask(irq_ctx);
+
+ return 0;
+}
+
+static int vfio_platform_set_irq_mask(struct vfio_platform_device *vdev,
+ unsigned index, unsigned start,
+ unsigned count, uint32_t flags,
+ void *data)
+{
+ if (start != 0 || count != 1)
+ return -EINVAL;
+
+ if (!(vdev->irqs[index].flags & VFIO_IRQ_INFO_MASKABLE))
+ return -EINVAL;
+
+ if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
+ int32_t fd = *(int32_t *)data;
+
+ if (fd >= 0)
+ return vfio_virqfd_enable((void *) &vdev->irqs[index],
+ vfio_platform_mask_handler,
+ NULL, NULL,
+ &vdev->irqs[index].mask, fd);
+
+ vfio_virqfd_disable(&vdev->irqs[index].mask);
+ return 0;
+ }
+
+ if (flags & VFIO_IRQ_SET_DATA_NONE) {
+ vfio_platform_mask(&vdev->irqs[index]);
+
+ } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
+ uint8_t mask = *(uint8_t *)data;
+
+ if (mask)
+ vfio_platform_mask(&vdev->irqs[index]);
+ }
+
+ return 0;
+}
+
+static void vfio_platform_unmask(struct vfio_platform_irq *irq_ctx)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&irq_ctx->lock, flags);
+
+ if (irq_ctx->masked) {
+ enable_irq(irq_ctx->hwirq);
+ irq_ctx->masked = false;
+ }
+
+ spin_unlock_irqrestore(&irq_ctx->lock, flags);
+}
+
+static int vfio_platform_unmask_handler(void *opaque, void *unused)
+{
+ struct vfio_platform_irq *irq_ctx = opaque;
+
+ vfio_platform_unmask(irq_ctx);
+
+ return 0;
+}
+
+static int vfio_platform_set_irq_unmask(struct vfio_platform_device *vdev,
+ unsigned index, unsigned start,
+ unsigned count, uint32_t flags,
+ void *data)
+{
+ if (start != 0 || count != 1)
+ return -EINVAL;
+
+ if (!(vdev->irqs[index].flags & VFIO_IRQ_INFO_MASKABLE))
+ return -EINVAL;
+
+ if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
+ int32_t fd = *(int32_t *)data;
+
+ if (fd >= 0)
+ return vfio_virqfd_enable((void *) &vdev->irqs[index],
+ vfio_platform_unmask_handler,
+ NULL, NULL,
+ &vdev->irqs[index].unmask,
+ fd);
+
+ vfio_virqfd_disable(&vdev->irqs[index].unmask);
+ return 0;
+ }
+
+ if (flags & VFIO_IRQ_SET_DATA_NONE) {
+ vfio_platform_unmask(&vdev->irqs[index]);
+
+ } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
+ uint8_t unmask = *(uint8_t *)data;
+
+ if (unmask)
+ vfio_platform_unmask(&vdev->irqs[index]);
+ }
+
+ return 0;
+}
+
+static irqreturn_t vfio_automasked_irq_handler(int irq, void *dev_id)
+{
+ struct vfio_platform_irq *irq_ctx = dev_id;
+ unsigned long flags;
+ int ret = IRQ_NONE;
+
+ spin_lock_irqsave(&irq_ctx->lock, flags);
+
+ if (!irq_ctx->masked) {
+ ret = IRQ_HANDLED;
+
+ /* automask maskable interrupts */
+ disable_irq_nosync(irq_ctx->hwirq);
+ irq_ctx->masked = true;
+ }
+
+ spin_unlock_irqrestore(&irq_ctx->lock, flags);
+
+ if (ret == IRQ_HANDLED)
+ eventfd_signal(irq_ctx->trigger, 1);
+
+ return ret;
+}
+
+static irqreturn_t vfio_irq_handler(int irq, void *dev_id)
+{
+ struct vfio_platform_irq *irq_ctx = dev_id;
+
+ eventfd_signal(irq_ctx->trigger, 1);
+
+ return IRQ_HANDLED;
+}
+
+static int vfio_set_trigger(struct vfio_platform_device *vdev, int index,
+ int fd, irq_handler_t handler)
+{
+ struct vfio_platform_irq *irq = &vdev->irqs[index];
+ struct eventfd_ctx *trigger;
+ int ret;
+
+ if (irq->trigger) {
+ free_irq(irq->hwirq, irq);
+ kfree(irq->name);
+ eventfd_ctx_put(irq->trigger);
+ irq->trigger = NULL;
+ }
+
+ if (fd < 0) /* Disable only */
+ return 0;
+
+ irq->name = kasprintf(GFP_KERNEL, "vfio-irq[%d](%s)",
+ irq->hwirq, vdev->name);
+ if (!irq->name)
+ return -ENOMEM;
+
+ trigger = eventfd_ctx_fdget(fd);
+ if (IS_ERR(trigger)) {
+ kfree(irq->name);
+ return PTR_ERR(trigger);
+ }
+
+ irq->trigger = trigger;
+
+ irq_set_status_flags(irq->hwirq, IRQ_NOAUTOEN);
+ ret = request_irq(irq->hwirq, handler, 0, irq->name, irq);
+ if (ret) {
+ kfree(irq->name);
+ eventfd_ctx_put(trigger);
+ irq->trigger = NULL;
+ return ret;
+ }
+
+ if (!irq->masked)
+ enable_irq(irq->hwirq);
+
+ return 0;
+}
+
+static int vfio_platform_set_irq_trigger(struct vfio_platform_device *vdev,
+ unsigned index, unsigned start,
+ unsigned count, uint32_t flags,
+ void *data)
+{
+ struct vfio_platform_irq *irq = &vdev->irqs[index];
+ irq_handler_t handler;
+
+ if (vdev->irqs[index].flags & VFIO_IRQ_INFO_AUTOMASKED)
+ handler = vfio_automasked_irq_handler;
+ else
+ handler = vfio_irq_handler;
+
+ if (!count && (flags & VFIO_IRQ_SET_DATA_NONE))
+ return vfio_set_trigger(vdev, index, -1, handler);
+
+ if (start != 0 || count != 1)
+ return -EINVAL;
+
+ if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
+ int32_t fd = *(int32_t *)data;
+
+ return vfio_set_trigger(vdev, index, fd, handler);
+ }
+
+ if (flags & VFIO_IRQ_SET_DATA_NONE) {
+ handler(irq->hwirq, irq);
+
+ } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
+ uint8_t trigger = *(uint8_t *)data;
+
+ if (trigger)
+ handler(irq->hwirq, irq);
+ }
+
+ return 0;
+}
+
+int vfio_platform_set_irqs_ioctl(struct vfio_platform_device *vdev,
+ uint32_t flags, unsigned index, unsigned start,
+ unsigned count, void *data)
+{
+ int (*func)(struct vfio_platform_device *vdev, unsigned index,
+ unsigned start, unsigned count, uint32_t flags,
+ void *data) = NULL;
+
+ switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
+ case VFIO_IRQ_SET_ACTION_MASK:
+ func = vfio_platform_set_irq_mask;
+ break;
+ case VFIO_IRQ_SET_ACTION_UNMASK:
+ func = vfio_platform_set_irq_unmask;
+ break;
+ case VFIO_IRQ_SET_ACTION_TRIGGER:
+ func = vfio_platform_set_irq_trigger;
+ break;
+ }
+
+ if (!func)
+ return -ENOTTY;
+
+ return func(vdev, index, start, count, flags, data);
+}
+
+int vfio_platform_irq_init(struct vfio_platform_device *vdev)
+{
+ int cnt = 0, i;
+
+ while (vdev->get_irq(vdev, cnt) >= 0)
+ cnt++;
+
+ vdev->irqs = kcalloc(cnt, sizeof(struct vfio_platform_irq), GFP_KERNEL);
+ if (!vdev->irqs)
+ return -ENOMEM;
+
+ for (i = 0; i < cnt; i++) {
+ int hwirq = vdev->get_irq(vdev, i);
+
+ if (hwirq < 0)
+ goto err;
+
+ spin_lock_init(&vdev->irqs[i].lock);
+
+ vdev->irqs[i].flags = VFIO_IRQ_INFO_EVENTFD;
+
+ if (irq_get_trigger_type(hwirq) & IRQ_TYPE_LEVEL_MASK)
+ vdev->irqs[i].flags |= VFIO_IRQ_INFO_MASKABLE
+ | VFIO_IRQ_INFO_AUTOMASKED;
+
+ vdev->irqs[i].count = 1;
+ vdev->irqs[i].hwirq = hwirq;
+ vdev->irqs[i].masked = false;
+ }
+
+ vdev->num_irqs = cnt;
+
+ return 0;
+err:
+ kfree(vdev->irqs);
+ return -EINVAL;
+}
+
+void vfio_platform_irq_cleanup(struct vfio_platform_device *vdev)
+{
+ int i;
+
+ for (i = 0; i < vdev->num_irqs; i++)
+ vfio_set_trigger(vdev, i, -1, NULL);
+
+ vdev->num_irqs = 0;
+ kfree(vdev->irqs);
+}
--- /dev/null
+/*
+ * Copyright (C) 2013 - Virtual Open Systems
+ * Author: Antonios Motakis <a.motakis@virtualopensystems.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef VFIO_PLATFORM_PRIVATE_H
+#define VFIO_PLATFORM_PRIVATE_H
+
+#include <linux/types.h>
+#include <linux/interrupt.h>
+
+#define VFIO_PLATFORM_OFFSET_SHIFT 40
+#define VFIO_PLATFORM_OFFSET_MASK (((u64)(1) << VFIO_PLATFORM_OFFSET_SHIFT) - 1)
+
+#define VFIO_PLATFORM_OFFSET_TO_INDEX(off) \
+ (off >> VFIO_PLATFORM_OFFSET_SHIFT)
+
+#define VFIO_PLATFORM_INDEX_TO_OFFSET(index) \
+ ((u64)(index) << VFIO_PLATFORM_OFFSET_SHIFT)
+
+struct vfio_platform_irq {
+ u32 flags;
+ u32 count;
+ int hwirq;
+ char *name;
+ struct eventfd_ctx *trigger;
+ bool masked;
+ spinlock_t lock;
+ struct virqfd *unmask;
+ struct virqfd *mask;
+};
+
+struct vfio_platform_region {
+ u64 addr;
+ resource_size_t size;
+ u32 flags;
+ u32 type;
+#define VFIO_PLATFORM_REGION_TYPE_MMIO 1
+#define VFIO_PLATFORM_REGION_TYPE_PIO 2
+ void __iomem *ioaddr;
+};
+
+struct vfio_platform_device {
+ struct vfio_platform_region *regions;
+ u32 num_regions;
+ struct vfio_platform_irq *irqs;
+ u32 num_irqs;
+ int refcnt;
+ struct mutex igate;
+
+ /*
+ * These fields should be filled by the bus specific binder
+ */
+ void *opaque;
+ const char *name;
+ uint32_t flags;
+ /* callbacks to discover device resources */
+ struct resource*
+ (*get_resource)(struct vfio_platform_device *vdev, int i);
+ int (*get_irq)(struct vfio_platform_device *vdev, int i);
+};
+
+extern int vfio_platform_probe_common(struct vfio_platform_device *vdev,
+ struct device *dev);
+extern struct vfio_platform_device *vfio_platform_remove_common
+ (struct device *dev);
+
+extern int vfio_platform_irq_init(struct vfio_platform_device *vdev);
+extern void vfio_platform_irq_cleanup(struct vfio_platform_device *vdev);
+
+extern int vfio_platform_set_irqs_ioctl(struct vfio_platform_device *vdev,
+ uint32_t flags, unsigned index,
+ unsigned start, unsigned count,
+ void *data);
+
+#endif /* VFIO_PLATFORM_PRIVATE_H */
mutex_lock(&vfio.group_lock);
- minor = vfio_alloc_group_minor(group);
- if (minor < 0) {
- vfio_group_unlock_and_free(group);
- return ERR_PTR(minor);
- }
-
/* Did we race creating this group? */
list_for_each_entry(tmp, &vfio.group_list, vfio_next) {
if (tmp->iommu_group == iommu_group) {
vfio_group_get(tmp);
- vfio_free_group_minor(minor);
vfio_group_unlock_and_free(group);
return tmp;
}
}
+ minor = vfio_alloc_group_minor(group);
+ if (minor < 0) {
+ vfio_group_unlock_and_free(group);
+ return ERR_PTR(minor);
+ }
+
dev = device_create(vfio.class, NULL,
MKDEV(MAJOR(vfio.group_devt), minor),
group, "%d", iommu_group_id(iommu_group));
--- /dev/null
+/*
+ * VFIO generic eventfd code for IRQFD support.
+ * Derived from drivers/vfio/pci/vfio_pci_intrs.c
+ *
+ * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
+ * Author: Alex Williamson <alex.williamson@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/vfio.h>
+#include <linux/eventfd.h>
+#include <linux/file.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+
+#define DRIVER_VERSION "0.1"
+#define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
+#define DRIVER_DESC "IRQFD support for VFIO bus drivers"
+
+static struct workqueue_struct *vfio_irqfd_cleanup_wq;
+static DEFINE_SPINLOCK(virqfd_lock);
+
+static int __init vfio_virqfd_init(void)
+{
+ vfio_irqfd_cleanup_wq =
+ create_singlethread_workqueue("vfio-irqfd-cleanup");
+ if (!vfio_irqfd_cleanup_wq)
+ return -ENOMEM;
+
+ return 0;
+}
+
+static void __exit vfio_virqfd_exit(void)
+{
+ destroy_workqueue(vfio_irqfd_cleanup_wq);
+}
+
+static void virqfd_deactivate(struct virqfd *virqfd)
+{
+ queue_work(vfio_irqfd_cleanup_wq, &virqfd->shutdown);
+}
+
+static int virqfd_wakeup(wait_queue_t *wait, unsigned mode, int sync, void *key)
+{
+ struct virqfd *virqfd = container_of(wait, struct virqfd, wait);
+ unsigned long flags = (unsigned long)key;
+
+ if (flags & POLLIN) {
+ /* An event has been signaled, call function */
+ if ((!virqfd->handler ||
+ virqfd->handler(virqfd->opaque, virqfd->data)) &&
+ virqfd->thread)
+ schedule_work(&virqfd->inject);
+ }
+
+ if (flags & POLLHUP) {
+ unsigned long flags;
+ spin_lock_irqsave(&virqfd_lock, flags);
+
+ /*
+ * The eventfd is closing, if the virqfd has not yet been
+ * queued for release, as determined by testing whether the
+ * virqfd pointer to it is still valid, queue it now. As
+ * with kvm irqfds, we know we won't race against the virqfd
+ * going away because we hold the lock to get here.
+ */
+ if (*(virqfd->pvirqfd) == virqfd) {
+ *(virqfd->pvirqfd) = NULL;
+ virqfd_deactivate(virqfd);
+ }
+
+ spin_unlock_irqrestore(&virqfd_lock, flags);
+ }
+
+ return 0;
+}
+
+static void virqfd_ptable_queue_proc(struct file *file,
+ wait_queue_head_t *wqh, poll_table *pt)
+{
+ struct virqfd *virqfd = container_of(pt, struct virqfd, pt);
+ add_wait_queue(wqh, &virqfd->wait);
+}
+
+static void virqfd_shutdown(struct work_struct *work)
+{
+ struct virqfd *virqfd = container_of(work, struct virqfd, shutdown);
+ u64 cnt;
+
+ eventfd_ctx_remove_wait_queue(virqfd->eventfd, &virqfd->wait, &cnt);
+ flush_work(&virqfd->inject);
+ eventfd_ctx_put(virqfd->eventfd);
+
+ kfree(virqfd);
+}
+
+static void virqfd_inject(struct work_struct *work)
+{
+ struct virqfd *virqfd = container_of(work, struct virqfd, inject);
+ if (virqfd->thread)
+ virqfd->thread(virqfd->opaque, virqfd->data);
+}
+
+int vfio_virqfd_enable(void *opaque,
+ int (*handler)(void *, void *),
+ void (*thread)(void *, void *),
+ void *data, struct virqfd **pvirqfd, int fd)
+{
+ struct fd irqfd;
+ struct eventfd_ctx *ctx;
+ struct virqfd *virqfd;
+ int ret = 0;
+ unsigned int events;
+
+ virqfd = kzalloc(sizeof(*virqfd), GFP_KERNEL);
+ if (!virqfd)
+ return -ENOMEM;
+
+ virqfd->pvirqfd = pvirqfd;
+ virqfd->opaque = opaque;
+ virqfd->handler = handler;
+ virqfd->thread = thread;
+ virqfd->data = data;
+
+ INIT_WORK(&virqfd->shutdown, virqfd_shutdown);
+ INIT_WORK(&virqfd->inject, virqfd_inject);
+
+ irqfd = fdget(fd);
+ if (!irqfd.file) {
+ ret = -EBADF;
+ goto err_fd;
+ }
+
+ ctx = eventfd_ctx_fileget(irqfd.file);
+ if (IS_ERR(ctx)) {
+ ret = PTR_ERR(ctx);
+ goto err_ctx;
+ }
+
+ virqfd->eventfd = ctx;
+
+ /*
+ * virqfds can be released by closing the eventfd or directly
+ * through ioctl. These are both done through a workqueue, so
+ * we update the pointer to the virqfd under lock to avoid
+ * pushing multiple jobs to release the same virqfd.
+ */
+ spin_lock_irq(&virqfd_lock);
+
+ if (*pvirqfd) {
+ spin_unlock_irq(&virqfd_lock);
+ ret = -EBUSY;
+ goto err_busy;
+ }
+ *pvirqfd = virqfd;
+
+ spin_unlock_irq(&virqfd_lock);
+
+ /*
+ * Install our own custom wake-up handling so we are notified via
+ * a callback whenever someone signals the underlying eventfd.
+ */
+ init_waitqueue_func_entry(&virqfd->wait, virqfd_wakeup);
+ init_poll_funcptr(&virqfd->pt, virqfd_ptable_queue_proc);
+
+ events = irqfd.file->f_op->poll(irqfd.file, &virqfd->pt);
+
+ /*
+ * Check if there was an event already pending on the eventfd
+ * before we registered and trigger it as if we didn't miss it.
+ */
+ if (events & POLLIN) {
+ if ((!handler || handler(opaque, data)) && thread)
+ schedule_work(&virqfd->inject);
+ }
+
+ /*
+ * Do not drop the file until the irqfd is fully initialized,
+ * otherwise we might race against the POLLHUP.
+ */
+ fdput(irqfd);
+
+ return 0;
+err_busy:
+ eventfd_ctx_put(ctx);
+err_ctx:
+ fdput(irqfd);
+err_fd:
+ kfree(virqfd);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(vfio_virqfd_enable);
+
+void vfio_virqfd_disable(struct virqfd **pvirqfd)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&virqfd_lock, flags);
+
+ if (*pvirqfd) {
+ virqfd_deactivate(*pvirqfd);
+ *pvirqfd = NULL;
+ }
+
+ spin_unlock_irqrestore(&virqfd_lock, flags);
+
+ /*
+ * Block until we know all outstanding shutdown jobs have completed.
+ * Even if we don't queue the job, flush the wq to be sure it's
+ * been released.
+ */
+ flush_workqueue(vfio_irqfd_cleanup_wq);
+}
+EXPORT_SYMBOL_GPL(vfio_virqfd_disable);
+
+module_init(vfio_virqfd_init);
+module_exit(vfio_virqfd_exit);
+
+MODULE_VERSION(DRIVER_VERSION);
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR(DRIVER_AUTHOR);
+MODULE_DESCRIPTION(DRIVER_DESC);
struct device_node *nproot, *np;
int iset = 0;
- nproot = of_node_get(pdev->dev.parent->of_node);
- if (!nproot)
- return -ENODEV;
- nproot = of_find_node_by_name(nproot, "backlights");
+ nproot = of_get_child_by_name(pdev->dev.parent->of_node, "backlights");
if (!nproot) {
dev_err(&pdev->dev, "failed to find backlights node\n");
return -ENODEV;
If you have a Pandora console, say Y to enable the
backlight driver.
+config BACKLIGHT_SKY81452
+ tristate "Backlight driver for SKY81452"
+ depends on BACKLIGHT_CLASS_DEVICE && MFD_SKY81452
+ help
+ If you have a Skyworks SKY81452, say Y to enable the
+ backlight driver.
+
+ To compile this driver as a module, choose M here: the module will
+ be called sky81452-backlight
+
config BACKLIGHT_TPS65217
tristate "TPS65217 Backlight"
depends on BACKLIGHT_CLASS_DEVICE && MFD_TPS65217
obj-$(CONFIG_BACKLIGHT_PCF50633) += pcf50633-backlight.o
obj-$(CONFIG_BACKLIGHT_PWM) += pwm_bl.o
obj-$(CONFIG_BACKLIGHT_SAHARA) += kb3886_bl.o
+obj-$(CONFIG_BACKLIGHT_SKY81452) += sky81452-backlight.o
obj-$(CONFIG_BACKLIGHT_TOSA) += tosa_bl.o
obj-$(CONFIG_BACKLIGHT_TPS65217) += tps65217_bl.o
obj-$(CONFIG_BACKLIGHT_WM831X) += wm831x_bl.o
.name = "da9052-wled3",
.driver_data = DA9052_TYPE_WLED3,
},
+ { },
};
static struct platform_driver da9052_wled_driver = {
--- /dev/null
+/*
+ * sky81452-backlight.c SKY81452 backlight driver
+ *
+ * Copyright 2014 Skyworks Solutions Inc.
+ * Author : Gyungoh Yoo <jack.yoo@skyworksinc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/backlight.h>
+#include <linux/err.h>
+#include <linux/gpio.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/platform_data/sky81452-backlight.h>
+#include <linux/slab.h>
+
+/* registers */
+#define SKY81452_REG0 0x00
+#define SKY81452_REG1 0x01
+#define SKY81452_REG2 0x02
+#define SKY81452_REG4 0x04
+#define SKY81452_REG5 0x05
+
+/* bit mask */
+#define SKY81452_CS 0xFF
+#define SKY81452_EN 0x3F
+#define SKY81452_IGPW 0x20
+#define SKY81452_PWMMD 0x10
+#define SKY81452_PHASE 0x08
+#define SKY81452_ILIM 0x04
+#define SKY81452_VSHRT 0x03
+#define SKY81452_OCP 0x80
+#define SKY81452_OTMP 0x40
+#define SKY81452_SHRT 0x3F
+#define SKY81452_OPN 0x3F
+
+#define SKY81452_DEFAULT_NAME "lcd-backlight"
+#define SKY81452_MAX_BRIGHTNESS (SKY81452_CS + 1)
+
+#define CTZ(b) __builtin_ctz(b)
+
+static int sky81452_bl_update_status(struct backlight_device *bd)
+{
+ const struct sky81452_bl_platform_data *pdata =
+ dev_get_platdata(bd->dev.parent);
+ const unsigned int brightness = (unsigned int)bd->props.brightness;
+ struct regmap *regmap = bl_get_data(bd);
+ int ret;
+
+ if (brightness > 0) {
+ ret = regmap_write(regmap, SKY81452_REG0, brightness - 1);
+ if (IS_ERR_VALUE(ret))
+ return ret;
+
+ return regmap_update_bits(regmap, SKY81452_REG1, SKY81452_EN,
+ pdata->enable << CTZ(SKY81452_EN));
+ }
+
+ return regmap_update_bits(regmap, SKY81452_REG1, SKY81452_EN, 0);
+}
+
+static const struct backlight_ops sky81452_bl_ops = {
+ .update_status = sky81452_bl_update_status,
+};
+
+static ssize_t sky81452_bl_store_enable(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ struct regmap *regmap = bl_get_data(to_backlight_device(dev));
+ unsigned long value;
+ int ret;
+
+ ret = kstrtoul(buf, 16, &value);
+ if (IS_ERR_VALUE(ret))
+ return ret;
+
+ ret = regmap_update_bits(regmap, SKY81452_REG1, SKY81452_EN,
+ value << CTZ(SKY81452_EN));
+ if (IS_ERR_VALUE(ret))
+ return ret;
+
+ return count;
+}
+
+static ssize_t sky81452_bl_show_open_short(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct regmap *regmap = bl_get_data(to_backlight_device(dev));
+ unsigned int reg, value = 0;
+ char tmp[3];
+ int i, ret;
+
+ reg = !strcmp(attr->attr.name, "open") ? SKY81452_REG5 : SKY81452_REG4;
+ ret = regmap_read(regmap, reg, &value);
+ if (IS_ERR_VALUE(ret))
+ return ret;
+
+ if (value & SKY81452_SHRT) {
+ *buf = 0;
+ for (i = 0; i < 6; i++) {
+ if (value & 0x01) {
+ sprintf(tmp, "%d ", i + 1);
+ strcat(buf, tmp);
+ }
+ value >>= 1;
+ }
+ strcat(buf, "\n");
+ } else {
+ strcpy(buf, "none\n");
+ }
+
+ return strlen(buf);
+}
+
+static ssize_t sky81452_bl_show_fault(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct regmap *regmap = bl_get_data(to_backlight_device(dev));
+ unsigned int value = 0;
+ int ret;
+
+ ret = regmap_read(regmap, SKY81452_REG4, &value);
+ if (IS_ERR_VALUE(ret))
+ return ret;
+
+ *buf = 0;
+
+ if (value & SKY81452_OCP)
+ strcat(buf, "over-current ");
+
+ if (value & SKY81452_OTMP)
+ strcat(buf, "over-temperature");
+
+ strcat(buf, "\n");
+ return strlen(buf);
+}
+
+static DEVICE_ATTR(enable, S_IWGRP | S_IWUSR, NULL, sky81452_bl_store_enable);
+static DEVICE_ATTR(open, S_IRUGO, sky81452_bl_show_open_short, NULL);
+static DEVICE_ATTR(short, S_IRUGO, sky81452_bl_show_open_short, NULL);
+static DEVICE_ATTR(fault, S_IRUGO, sky81452_bl_show_fault, NULL);
+
+static struct attribute *sky81452_bl_attribute[] = {
+ &dev_attr_enable.attr,
+ &dev_attr_open.attr,
+ &dev_attr_short.attr,
+ &dev_attr_fault.attr,
+ NULL
+};
+
+static const struct attribute_group sky81452_bl_attr_group = {
+ .attrs = sky81452_bl_attribute,
+};
+
+#ifdef CONFIG_OF
+static struct sky81452_bl_platform_data *sky81452_bl_parse_dt(
+ struct device *dev)
+{
+ struct device_node *np = of_node_get(dev->of_node);
+ struct sky81452_bl_platform_data *pdata;
+ int num_entry;
+ unsigned int sources[6];
+ int ret;
+
+ if (!np) {
+ dev_err(dev, "backlight node not found.\n");
+ return ERR_PTR(-ENODATA);
+ }
+
+ pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata) {
+ of_node_put(np);
+ return ERR_PTR(-ENOMEM);
+ }
+
+ of_property_read_string(np, "name", &pdata->name);
+ pdata->ignore_pwm = of_property_read_bool(np, "skyworks,ignore-pwm");
+ pdata->dpwm_mode = of_property_read_bool(np, "skyworks,dpwm-mode");
+ pdata->phase_shift = of_property_read_bool(np, "skyworks,phase-shift");
+ pdata->gpio_enable = of_get_gpio(np, 0);
+
+ ret = of_property_count_u32_elems(np, "led-sources");
+ if (IS_ERR_VALUE(ret)) {
+ pdata->enable = SKY81452_EN >> CTZ(SKY81452_EN);
+ } else {
+ num_entry = ret;
+ if (num_entry > 6)
+ num_entry = 6;
+
+ ret = of_property_read_u32_array(np, "led-sources", sources,
+ num_entry);
+ if (IS_ERR_VALUE(ret)) {
+ dev_err(dev, "led-sources node is invalid.\n");
+ return ERR_PTR(-EINVAL);
+ }
+
+ pdata->enable = 0;
+ while (--num_entry)
+ pdata->enable |= (1 << sources[num_entry]);
+ }
+
+ ret = of_property_read_u32(np,
+ "skyworks,short-detection-threshold-volt",
+ &pdata->short_detection_threshold);
+ if (IS_ERR_VALUE(ret))
+ pdata->short_detection_threshold = 7;
+
+ ret = of_property_read_u32(np, "skyworks,current-limit-mA",
+ &pdata->boost_current_limit);
+ if (IS_ERR_VALUE(ret))
+ pdata->boost_current_limit = 2750;
+
+ of_node_put(np);
+ return pdata;
+}
+#else
+static struct sky81452_bl_platform_data *sky81452_bl_parse_dt(
+ struct device *dev)
+{
+ return ERR_PTR(-EINVAL);
+}
+#endif
+
+static int sky81452_bl_init_device(struct regmap *regmap,
+ struct sky81452_bl_platform_data *pdata)
+{
+ unsigned int value;
+
+ value = pdata->ignore_pwm ? SKY81452_IGPW : 0;
+ value |= pdata->dpwm_mode ? SKY81452_PWMMD : 0;
+ value |= pdata->phase_shift ? 0 : SKY81452_PHASE;
+
+ if (pdata->boost_current_limit == 2300)
+ value |= SKY81452_ILIM;
+ else if (pdata->boost_current_limit != 2750)
+ return -EINVAL;
+
+ if (pdata->short_detection_threshold < 4 ||
+ pdata->short_detection_threshold > 7)
+ return -EINVAL;
+ value |= (7 - pdata->short_detection_threshold) << CTZ(SKY81452_VSHRT);
+
+ return regmap_write(regmap, SKY81452_REG2, value);
+}
+
+static int sky81452_bl_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct regmap *regmap = dev_get_drvdata(dev->parent);
+ struct sky81452_bl_platform_data *pdata = dev_get_platdata(dev);
+ struct backlight_device *bd;
+ struct backlight_properties props;
+ const char *name;
+ int ret;
+
+ if (!pdata) {
+ pdata = sky81452_bl_parse_dt(dev);
+ if (IS_ERR(pdata))
+ return PTR_ERR(pdata);
+ }
+
+ if (gpio_is_valid(pdata->gpio_enable)) {
+ ret = devm_gpio_request_one(dev, pdata->gpio_enable,
+ GPIOF_OUT_INIT_HIGH, "sky81452-en");
+ if (IS_ERR_VALUE(ret)) {
+ dev_err(dev, "failed to request GPIO. err=%d\n", ret);
+ return ret;
+ }
+ }
+
+ ret = sky81452_bl_init_device(regmap, pdata);
+ if (IS_ERR_VALUE(ret)) {
+ dev_err(dev, "failed to initialize. err=%d\n", ret);
+ return ret;
+ }
+
+ memset(&props, 0, sizeof(props));
+ props.max_brightness = SKY81452_MAX_BRIGHTNESS,
+ name = pdata->name ? pdata->name : SKY81452_DEFAULT_NAME;
+ bd = devm_backlight_device_register(dev, name, dev, regmap,
+ &sky81452_bl_ops, &props);
+ if (IS_ERR(bd)) {
+ dev_err(dev, "failed to register. err=%ld\n", PTR_ERR(bd));
+ return PTR_ERR(bd);
+ }
+
+ platform_set_drvdata(pdev, bd);
+
+ ret = sysfs_create_group(&bd->dev.kobj, &sky81452_bl_attr_group);
+ if (IS_ERR_VALUE(ret)) {
+ dev_err(dev, "failed to create attribute. err=%d\n", ret);
+ return ret;
+ }
+
+ return ret;
+}
+
+static int sky81452_bl_remove(struct platform_device *pdev)
+{
+ const struct sky81452_bl_platform_data *pdata =
+ dev_get_platdata(&pdev->dev);
+ struct backlight_device *bd = platform_get_drvdata(pdev);
+
+ sysfs_remove_group(&bd->dev.kobj, &sky81452_bl_attr_group);
+
+ bd->props.power = FB_BLANK_UNBLANK;
+ bd->props.brightness = 0;
+ backlight_update_status(bd);
+
+ if (gpio_is_valid(pdata->gpio_enable))
+ gpio_set_value_cansleep(pdata->gpio_enable, 0);
+
+ return 0;
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id sky81452_bl_of_match[] = {
+ { .compatible = "skyworks,sky81452-backlight", },
+ { }
+};
+MODULE_DEVICE_TABLE(of, sky81452_bl_of_match);
+#endif
+
+static struct platform_driver sky81452_bl_driver = {
+ .driver = {
+ .name = "sky81452-backlight",
+ .of_match_table = of_match_ptr(sky81452_bl_of_match),
+ },
+ .probe = sky81452_bl_probe,
+ .remove = sky81452_bl_remove,
+};
+
+module_platform_driver(sky81452_bl_driver);
+
+MODULE_DESCRIPTION("Skyworks SKY81452 backlight driver");
+MODULE_AUTHOR("Gyungoh Yoo <jack.yoo@skyworksinc.com>");
+MODULE_LICENSE("GPL v2");
granularity = 0x10000;
addr |= TSI148_LCSR_ITAT_AS_A64;
break;
- case VME_CRCSR:
- case VME_USER1:
- case VME_USER2:
- case VME_USER3:
- case VME_USER4:
default:
dev_err(tsi148_bridge->parent, "Invalid address space\n");
return -EINVAL;
master_image->locked = 0;
master_image->number = i;
master_image->address_attr = VME_A16 | VME_A24 | VME_A32 |
- VME_A64;
+ VME_A64 | VME_CRCSR | VME_USER1 | VME_USER2 |
+ VME_USER3 | VME_USER4;
master_image->cycle_attr = VME_SCT | VME_BLT | VME_MBLT |
VME_2eVME | VME_2eSST | VME_2eSSTB | VME_2eSST160 |
VME_2eSST267 | VME_2eSST320 | VME_SUPER | VME_USER |
slave_image->locked = 0;
slave_image->number = i;
slave_image->address_attr = VME_A16 | VME_A24 | VME_A32 |
- VME_A64 | VME_CRCSR | VME_USER1 | VME_USER2 |
- VME_USER3 | VME_USER4;
+ VME_A64;
slave_image->cycle_attr = VME_SCT | VME_BLT | VME_MBLT |
VME_2eVME | VME_2eSST | VME_2eSSTB | VME_2eSST160 |
VME_2eSST267 | VME_2eSST320 | VME_SUPER | VME_USER |
}
EXPORT_SYMBOL(vme_master_rmw);
+int vme_master_mmap(struct vme_resource *resource, struct vm_area_struct *vma)
+{
+ struct vme_master_resource *image;
+ phys_addr_t phys_addr;
+ unsigned long vma_size;
+
+ if (resource->type != VME_MASTER) {
+ pr_err("Not a master resource\n");
+ return -EINVAL;
+ }
+
+ image = list_entry(resource->entry, struct vme_master_resource, list);
+ phys_addr = image->bus_resource.start + (vma->vm_pgoff << PAGE_SHIFT);
+ vma_size = vma->vm_end - vma->vm_start;
+
+ if (phys_addr + vma_size > image->bus_resource.end + 1) {
+ pr_err("Map size cannot exceed the window size\n");
+ return -EFAULT;
+ }
+
+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+
+ return vm_iomap_memory(vma, phys_addr, vma->vm_end - vma->vm_start);
+}
+EXPORT_SYMBOL(vme_master_mmap);
+
void vme_master_free(struct vme_resource *resource)
{
struct vme_master_resource *master_image;
#ifdef CONFIG_CLEANCACHE
BUG_ON(sizeof(struct cleancache_filekey) != sizeof(struct tmem_oid));
if (tmem_enabled && cleancache) {
- char *s = "";
- struct cleancache_ops *old_ops =
- cleancache_register_ops(&tmem_cleancache_ops);
- if (old_ops)
- s = " (WARNING: cleancache_ops overridden)";
- pr_info("cleancache enabled, RAM provided by Xen Transcendent Memory%s\n",
- s);
+ int err;
+
+ err = cleancache_register_ops(&tmem_cleancache_ops);
+ if (err)
+ pr_warn("xen-tmem: failed to enable cleancache: %d\n",
+ err);
+ else
+ pr_info("cleancache enabled, RAM provided by "
+ "Xen Transcendent Memory\n");
}
#endif
#ifdef CONFIG_XEN_SELFBALLOONING
#include <linux/pagemap.h>
#include <linux/idr.h>
#include <linux/sched.h>
-#include <linux/aio.h>
+#include <linux/uio.h>
#include <net/9p/9p.h>
#include <net/9p/client.h>
bool
depends on COMPAT && BINFMT_ELF
-config ARCH_BINFMT_ELF_RANDOMIZE_PIE
- bool
-
config ARCH_BINFMT_ELF_STATE
bool
obj-$(CONFIG_HPPFS) += hppfs/
obj-$(CONFIG_CACHEFILES) += cachefiles/
obj-$(CONFIG_DEBUG_FS) += debugfs/
+obj-$(CONFIG_TRACING) += tracefs/
obj-$(CONFIG_OCFS2_FS) += ocfs2/
obj-$(CONFIG_BTRFS_FS) += btrfs/
obj-$(CONFIG_GFS2_FS) += gfs2/
* affs regular file handling primitives
*/
-#include <linux/aio.h>
+#include <linux/uio.h>
#include "affs.h"
static struct buffer_head *affs_get_extblock_slow(struct inode *inode, u32 ext);
#include <linux/pagemap.h>
#include <linux/writeback.h>
#include <linux/pagevec.h>
-#include <linux/aio.h>
#include "internal.h"
static int afs_write_back_from_locked_page(struct afs_writeback *wb,
unsigned id;
};
+/*
+ * We use ki_cancel == KIOCB_CANCELLED to indicate that a kiocb has been either
+ * cancelled or completed (this makes a certain amount of sense because
+ * successful cancellation - io_cancel() - does deliver the completion to
+ * userspace).
+ *
+ * And since most things don't implement kiocb cancellation and we'd really like
+ * kiocb completion to be lockless when possible, we use ki_cancel to
+ * synchronize cancellation and completion - we only set it to KIOCB_CANCELLED
+ * with xchg() or cmpxchg(), see batch_complete_aio() and kiocb_cancel().
+ */
+#define KIOCB_CANCELLED ((void *) (~0ULL))
+
+struct aio_kiocb {
+ struct kiocb common;
+
+ struct kioctx *ki_ctx;
+ kiocb_cancel_fn *ki_cancel;
+
+ struct iocb __user *ki_user_iocb; /* user's aiocb */
+ __u64 ki_user_data; /* user's data for completion */
+
+ struct list_head ki_list; /* the aio core uses this
+ * for cancellation */
+
+ /*
+ * If the aio_resfd field of the userspace iocb is not zero,
+ * this is the underlying eventfd context to deliver events to.
+ */
+ struct eventfd_ctx *ki_eventfd;
+};
+
/*------ sysctl variables----*/
static DEFINE_SPINLOCK(aio_nr_lock);
unsigned long aio_nr; /* current system wide number of aio requests */
if (IS_ERR(aio_mnt))
panic("Failed to create aio fs mount.");
- kiocb_cachep = KMEM_CACHE(kiocb, SLAB_HWCACHE_ALIGN|SLAB_PANIC);
+ kiocb_cachep = KMEM_CACHE(aio_kiocb, SLAB_HWCACHE_ALIGN|SLAB_PANIC);
kioctx_cachep = KMEM_CACHE(kioctx,SLAB_HWCACHE_ALIGN|SLAB_PANIC);
pr_debug("sizeof(struct page) = %zu\n", sizeof(struct page));
return 0;
}
-static void aio_ring_remap(struct file *file, struct vm_area_struct *vma)
+static int aio_ring_remap(struct file *file, struct vm_area_struct *vma)
{
struct mm_struct *mm = vma->vm_mm;
struct kioctx_table *table;
- int i;
+ int i, res = -EINVAL;
spin_lock(&mm->ioctx_lock);
rcu_read_lock();
ctx = table->table[i];
if (ctx && ctx->aio_ring_file == file) {
- ctx->user_id = ctx->mmap_base = vma->vm_start;
+ if (!atomic_read(&ctx->dead)) {
+ ctx->user_id = ctx->mmap_base = vma->vm_start;
+ res = 0;
+ }
break;
}
}
rcu_read_unlock();
spin_unlock(&mm->ioctx_lock);
+ return res;
}
static const struct file_operations aio_ring_fops = {
#define AIO_EVENTS_FIRST_PAGE ((PAGE_SIZE - sizeof(struct aio_ring)) / sizeof(struct io_event))
#define AIO_EVENTS_OFFSET (AIO_EVENTS_PER_PAGE - AIO_EVENTS_FIRST_PAGE)
-void kiocb_set_cancel_fn(struct kiocb *req, kiocb_cancel_fn *cancel)
+void kiocb_set_cancel_fn(struct kiocb *iocb, kiocb_cancel_fn *cancel)
{
+ struct aio_kiocb *req = container_of(iocb, struct aio_kiocb, common);
struct kioctx *ctx = req->ki_ctx;
unsigned long flags;
}
EXPORT_SYMBOL(kiocb_set_cancel_fn);
-static int kiocb_cancel(struct kiocb *kiocb)
+static int kiocb_cancel(struct aio_kiocb *kiocb)
{
kiocb_cancel_fn *old, *cancel;
cancel = cmpxchg(&kiocb->ki_cancel, old, KIOCB_CANCELLED);
} while (cancel != old);
- return cancel(kiocb);
+ return cancel(&kiocb->common);
}
static void free_ioctx(struct work_struct *work)
static void free_ioctx_users(struct percpu_ref *ref)
{
struct kioctx *ctx = container_of(ref, struct kioctx, users);
- struct kiocb *req;
+ struct aio_kiocb *req;
spin_lock_irq(&ctx->ctx_lock);
while (!list_empty(&ctx->active_reqs)) {
req = list_first_entry(&ctx->active_reqs,
- struct kiocb, ki_list);
+ struct aio_kiocb, ki_list);
list_del_init(&req->ki_list);
kiocb_cancel(req);
err_cleanup:
aio_nr_sub(ctx->max_reqs);
err_ctx:
+ atomic_set(&ctx->dead, 1);
+ if (ctx->mmap_size)
+ vm_munmap(ctx->mmap_base, ctx->mmap_size);
aio_free_ring(ctx);
err:
mutex_unlock(&ctx->ring_lock);
{
struct kioctx_table *table;
- if (atomic_xchg(&ctx->dead, 1))
+ spin_lock(&mm->ioctx_lock);
+ if (atomic_xchg(&ctx->dead, 1)) {
+ spin_unlock(&mm->ioctx_lock);
return -EINVAL;
+ }
-
- spin_lock(&mm->ioctx_lock);
table = rcu_dereference_raw(mm->ioctx_table);
WARN_ON(ctx != table->table[ctx->id]);
table->table[ctx->id] = NULL;
return 0;
}
-/* wait_on_sync_kiocb:
- * Waits on the given sync kiocb to complete.
- */
-ssize_t wait_on_sync_kiocb(struct kiocb *req)
-{
- while (!req->ki_ctx) {
- set_current_state(TASK_UNINTERRUPTIBLE);
- if (req->ki_ctx)
- break;
- io_schedule();
- }
- __set_current_state(TASK_RUNNING);
- return req->ki_user_data;
-}
-EXPORT_SYMBOL(wait_on_sync_kiocb);
-
/*
* exit_aio: called when the last user of mm goes away. At this point, there is
* no way for any new requests to be submited or any of the io_* syscalls to be
* Allocate a slot for an aio request.
* Returns NULL if no requests are free.
*/
-static inline struct kiocb *aio_get_req(struct kioctx *ctx)
+static inline struct aio_kiocb *aio_get_req(struct kioctx *ctx)
{
- struct kiocb *req;
+ struct aio_kiocb *req;
if (!get_reqs_available(ctx)) {
user_refill_reqs_available(ctx);
return NULL;
}
-static void kiocb_free(struct kiocb *req)
+static void kiocb_free(struct aio_kiocb *req)
{
- if (req->ki_filp)
- fput(req->ki_filp);
+ if (req->common.ki_filp)
+ fput(req->common.ki_filp);
if (req->ki_eventfd != NULL)
eventfd_ctx_put(req->ki_eventfd);
kmem_cache_free(kiocb_cachep, req);
/* aio_complete
* Called when the io request on the given iocb is complete.
*/
-void aio_complete(struct kiocb *iocb, long res, long res2)
+static void aio_complete(struct kiocb *kiocb, long res, long res2)
{
+ struct aio_kiocb *iocb = container_of(kiocb, struct aio_kiocb, common);
struct kioctx *ctx = iocb->ki_ctx;
struct aio_ring *ring;
struct io_event *ev_page, *event;
* ref, no other paths have a way to get another ref
* - the sync task helpfully left a reference to itself in the iocb
*/
- if (is_sync_kiocb(iocb)) {
- iocb->ki_user_data = res;
- smp_wmb();
- iocb->ki_ctx = ERR_PTR(-EXDEV);
- wake_up_process(iocb->ki_obj.tsk);
- return;
- }
+ BUG_ON(is_sync_kiocb(kiocb));
if (iocb->ki_list.next) {
unsigned long flags;
ev_page = kmap_atomic(ctx->ring_pages[pos / AIO_EVENTS_PER_PAGE]);
event = ev_page + pos % AIO_EVENTS_PER_PAGE;
- event->obj = (u64)(unsigned long)iocb->ki_obj.user;
+ event->obj = (u64)(unsigned long)iocb->ki_user_iocb;
event->data = iocb->ki_user_data;
event->res = res;
event->res2 = res2;
flush_dcache_page(ctx->ring_pages[pos / AIO_EVENTS_PER_PAGE]);
pr_debug("%p[%u]: %p: %p %Lx %lx %lx\n",
- ctx, tail, iocb, iocb->ki_obj.user, iocb->ki_user_data,
+ ctx, tail, iocb, iocb->ki_user_iocb, iocb->ki_user_data,
res, res2);
/* after flagging the request as done, we
percpu_ref_put(&ctx->reqs);
}
-EXPORT_SYMBOL(aio_complete);
/* aio_read_events_ring
* Pull an event off of the ioctx's event ring. Returns the number of
unsigned long, loff_t);
typedef ssize_t (rw_iter_op)(struct kiocb *, struct iov_iter *);
-static ssize_t aio_setup_vectored_rw(struct kiocb *kiocb,
- int rw, char __user *buf,
- unsigned long *nr_segs,
- struct iovec **iovec,
- bool compat)
+static int aio_setup_vectored_rw(int rw, char __user *buf, size_t len,
+ struct iovec **iovec,
+ bool compat,
+ struct iov_iter *iter)
{
- ssize_t ret;
-
- *nr_segs = kiocb->ki_nbytes;
-
#ifdef CONFIG_COMPAT
if (compat)
- ret = compat_rw_copy_check_uvector(rw,
+ return compat_import_iovec(rw,
(struct compat_iovec __user *)buf,
- *nr_segs, UIO_FASTIOV, *iovec, iovec);
- else
+ len, UIO_FASTIOV, iovec, iter);
#endif
- ret = rw_copy_check_uvector(rw,
- (struct iovec __user *)buf,
- *nr_segs, UIO_FASTIOV, *iovec, iovec);
- if (ret < 0)
- return ret;
-
- /* ki_nbytes now reflect bytes instead of segs */
- kiocb->ki_nbytes = ret;
- return 0;
-}
-
-static ssize_t aio_setup_single_vector(struct kiocb *kiocb,
- int rw, char __user *buf,
- unsigned long *nr_segs,
- struct iovec *iovec)
-{
- if (unlikely(!access_ok(!rw, buf, kiocb->ki_nbytes)))
- return -EFAULT;
-
- iovec->iov_base = buf;
- iovec->iov_len = kiocb->ki_nbytes;
- *nr_segs = 1;
- return 0;
+ return import_iovec(rw, (struct iovec __user *)buf,
+ len, UIO_FASTIOV, iovec, iter);
}
/*
* Performs the initial checks and io submission.
*/
static ssize_t aio_run_iocb(struct kiocb *req, unsigned opcode,
- char __user *buf, bool compat)
+ char __user *buf, size_t len, bool compat)
{
struct file *file = req->ki_filp;
ssize_t ret;
- unsigned long nr_segs;
int rw;
fmode_t mode;
aio_rw_op *rw_op;
if (!rw_op && !iter_op)
return -EINVAL;
- ret = (opcode == IOCB_CMD_PREADV ||
- opcode == IOCB_CMD_PWRITEV)
- ? aio_setup_vectored_rw(req, rw, buf, &nr_segs,
- &iovec, compat)
- : aio_setup_single_vector(req, rw, buf, &nr_segs,
- iovec);
+ if (opcode == IOCB_CMD_PREADV || opcode == IOCB_CMD_PWRITEV)
+ ret = aio_setup_vectored_rw(rw, buf, len,
+ &iovec, compat, &iter);
+ else {
+ ret = import_single_range(rw, buf, len, iovec, &iter);
+ iovec = NULL;
+ }
if (!ret)
- ret = rw_verify_area(rw, file, &req->ki_pos, req->ki_nbytes);
+ ret = rw_verify_area(rw, file, &req->ki_pos,
+ iov_iter_count(&iter));
if (ret < 0) {
- if (iovec != inline_vecs)
- kfree(iovec);
+ kfree(iovec);
return ret;
}
- req->ki_nbytes = ret;
+ len = ret;
/* XXX: move/kill - rw_verify_area()? */
/* This matches the pread()/pwrite() logic */
file_start_write(file);
if (iter_op) {
- iov_iter_init(&iter, rw, iovec, nr_segs, req->ki_nbytes);
ret = iter_op(req, &iter);
} else {
- ret = rw_op(req, iovec, nr_segs, req->ki_pos);
+ ret = rw_op(req, iter.iov, iter.nr_segs, req->ki_pos);
}
if (rw == WRITE)
file_end_write(file);
+ kfree(iovec);
break;
case IOCB_CMD_FDSYNC:
return -EINVAL;
}
- if (iovec != inline_vecs)
- kfree(iovec);
-
if (ret != -EIOCBQUEUED) {
/*
* There's no easy way to restart the syscall since other AIO's
static int io_submit_one(struct kioctx *ctx, struct iocb __user *user_iocb,
struct iocb *iocb, bool compat)
{
- struct kiocb *req;
+ struct aio_kiocb *req;
ssize_t ret;
/* enforce forwards compatibility on users */
if (unlikely(!req))
return -EAGAIN;
- req->ki_filp = fget(iocb->aio_fildes);
- if (unlikely(!req->ki_filp)) {
+ req->common.ki_filp = fget(iocb->aio_fildes);
+ if (unlikely(!req->common.ki_filp)) {
ret = -EBADF;
goto out_put_req;
}
+ req->common.ki_pos = iocb->aio_offset;
+ req->common.ki_complete = aio_complete;
+ req->common.ki_flags = 0;
if (iocb->aio_flags & IOCB_FLAG_RESFD) {
/*
req->ki_eventfd = NULL;
goto out_put_req;
}
+
+ req->common.ki_flags |= IOCB_EVENTFD;
}
ret = put_user(KIOCB_KEY, &user_iocb->aio_key);
goto out_put_req;
}
- req->ki_obj.user = user_iocb;
+ req->ki_user_iocb = user_iocb;
req->ki_user_data = iocb->aio_data;
- req->ki_pos = iocb->aio_offset;
- req->ki_nbytes = iocb->aio_nbytes;
- ret = aio_run_iocb(req, iocb->aio_lio_opcode,
+ ret = aio_run_iocb(&req->common, iocb->aio_lio_opcode,
(char __user *)(unsigned long)iocb->aio_buf,
+ iocb->aio_nbytes,
compat);
if (ret)
goto out_put_req;
/* lookup_kiocb
* Finds a given iocb for cancellation.
*/
-static struct kiocb *lookup_kiocb(struct kioctx *ctx, struct iocb __user *iocb,
- u32 key)
+static struct aio_kiocb *
+lookup_kiocb(struct kioctx *ctx, struct iocb __user *iocb, u32 key)
{
- struct list_head *pos;
+ struct aio_kiocb *kiocb;
assert_spin_locked(&ctx->ctx_lock);
return NULL;
/* TODO: use a hash or array, this sucks. */
- list_for_each(pos, &ctx->active_reqs) {
- struct kiocb *kiocb = list_kiocb(pos);
- if (kiocb->ki_obj.user == iocb)
+ list_for_each_entry(kiocb, &ctx->active_reqs, ki_list) {
+ if (kiocb->ki_user_iocb == iocb)
return kiocb;
}
return NULL;
struct io_event __user *, result)
{
struct kioctx *ctx;
- struct kiocb *kiocb;
+ struct aio_kiocb *kiocb;
u32 key;
int ret;
#include <linux/buffer_head.h>
#include <linux/vfs.h>
#include <linux/writeback.h>
+#include <linux/uio.h>
#include <asm/uaccess.h>
#include "bfs.h"
#include <linux/security.h>
#include <linux/random.h>
#include <linux/elf.h>
+#include <linux/elf-randomize.h>
#include <linux/utsname.h>
#include <linux/coredump.h>
#include <linux/sched.h>
i < loc->elf_ex.e_phnum; i++, elf_ppnt++) {
int elf_prot = 0, elf_flags;
unsigned long k, vaddr;
+ unsigned long total_size = 0;
if (elf_ppnt->p_type != PT_LOAD)
continue;
* default mmap base, as well as whatever program they
* might try to exec. This is because the brk will
* follow the loader, and is not movable. */
-#ifdef CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE
- /* Memory randomization might have been switched off
- * in runtime via sysctl or explicit setting of
- * personality flags.
- * If that is the case, retain the original non-zero
- * load_bias value in order to establish proper
- * non-randomized mappings.
- */
+ load_bias = ELF_ET_DYN_BASE - vaddr;
if (current->flags & PF_RANDOMIZE)
- load_bias = 0;
- else
- load_bias = ELF_PAGESTART(ELF_ET_DYN_BASE - vaddr);
-#else
- load_bias = ELF_PAGESTART(ELF_ET_DYN_BASE - vaddr);
-#endif
+ load_bias += arch_mmap_rnd();
+ load_bias = ELF_PAGESTART(load_bias);
+ total_size = total_mapping_size(elf_phdata,
+ loc->elf_ex.e_phnum);
+ if (!total_size) {
+ error = -EINVAL;
+ goto out_free_dentry;
+ }
}
error = elf_map(bprm->file, load_bias + vaddr, elf_ppnt,
- elf_prot, elf_flags, 0);
+ elf_prot, elf_flags, total_size);
if (BAD_ADDR(error)) {
retval = IS_ERR((void *)error) ?
PTR_ERR((void*)error) : -EINVAL;
current->mm->end_data = end_data;
current->mm->start_stack = bprm->p;
-#ifdef arch_randomize_brk
if ((current->flags & PF_RANDOMIZE) && (randomize_va_space > 1)) {
current->mm->brk = current->mm->start_brk =
arch_randomize_brk(current->mm);
-#ifdef CONFIG_COMPAT_BRK
+#ifdef compat_brk_randomized
current->brk_randomized = 1;
#endif
}
-#endif
if (current->personality & MMAP_PAGE_ZERO) {
/* Why this, you ask??? Well SVr4 maps page 0 as read-only,
#include <linux/namei.h>
#include <linux/log2.h>
#include <linux/cleancache.h>
-#include <linux/aio.h>
#include <asm/uaccess.h>
#include "internal.h"
#include <linux/string.h>
#include <linux/backing-dev.h>
#include <linux/mpage.h>
-#include <linux/aio.h>
#include <linux/falloc.h>
#include <linux/swap.h>
#include <linux/writeback.h>
#include <linux/compat.h>
#include <linux/slab.h>
#include <linux/btrfs.h>
+#include <linux/uio.h>
#include "ctree.h"
#include "disk-io.h"
#include "transaction.h"
#include <linux/writeback.h>
#include <linux/statfs.h>
#include <linux/compat.h>
-#include <linux/aio.h>
#include <linux/bit_spinlock.h>
#include <linux/xattr.h>
#include <linux/posix_acl.h>
#include <linux/btrfs.h>
#include <linux/blkdev.h>
#include <linux/posix_acl_xattr.h>
+#include <linux/uio.h>
#include "ctree.h"
#include "disk-io.h"
#include "transaction.h"
* to synchronise against __set_page_dirty_buffers and prevent the
* dirty bit from being lost.
*/
- if (ret)
- cancel_dirty_page(page, PAGE_CACHE_SIZE);
+ if (ret && TestClearPageDirty(page))
+ account_page_cleaned(page, mapping);
spin_unlock(&mapping->private_lock);
out:
if (buffers_to_free) {
#include <linux/mount.h>
#include <linux/namei.h>
#include <linux/writeback.h>
-#include <linux/aio.h>
#include <linux/falloc.h>
#include "super.h"
{
struct file *filp = iocb->ki_filp;
struct ceph_file_info *fi = filp->private_data;
- size_t len = iocb->ki_nbytes;
+ size_t len = iov_iter_count(to);
struct inode *inode = file_inode(filp);
struct ceph_inode_info *ci = ceph_inode(inode);
struct page *pinned_page = NULL;
length = atomic_dec_return(&tcpSesAllocCount);
if (length > 0)
- mempool_resize(cifs_req_poolp, length + cifs_min_rcv,
- GFP_KERNEL);
+ mempool_resize(cifs_req_poolp, length + cifs_min_rcv);
}
static int
length = atomic_inc_return(&tcpSesAllocCount);
if (length > 1)
- mempool_resize(cifs_req_poolp, length + cifs_min_rcv,
- GFP_KERNEL);
+ mempool_resize(cifs_req_poolp, length + cifs_min_rcv);
set_freezable();
while (server->tcpStatus != CifsExiting) {
struct dentry *dentry, struct dentry *alias)
{
struct mutex *m1 = NULL, *m2 = NULL;
- int ret = -EBUSY;
+ int ret = -ESTALE;
/* If alias and dentry share a parent, then no extra locks required */
if (alias->d_parent == dentry->d_parent)
pr_debug("debugfs: creating file '%s'\n",name);
+ if (IS_ERR(parent))
+ return parent;
+
error = simple_pin_fs(&debug_fs_type, &debugfs_mount,
&debugfs_mount_count);
if (error)
#include <linux/uio.h>
#include <linux/atomic.h>
#include <linux/prefetch.h>
-#include <linux/aio.h>
/*
* How many user pages to map in one call to get_user_pages(). This determines
ret = err;
}
- aio_complete(dio->iocb, ret, 0);
+ dio->iocb->ki_complete(dio->iocb, ret, 0);
}
kmem_cache_free(dio_cache, dio);
* operation. AIO can if it was a broken operation described above or
* in fact if all the bios race to complete before we get here. In
* that case dio_complete() translates the EIOCBQUEUED into the proper
- * return code that the caller will hand to aio_complete().
+ * return code that the caller will hand to ->complete().
*
* This is managed by the bio_lock instead of being an atomic_t so that
* completion paths can drop their ref and use the remaining count to
#include <linux/security.h>
#include <linux/compat.h>
#include <linux/fs_stack.h>
-#include <linux/aio.h>
#include "ecryptfs_kernel.h"
/**
struct file *file = iocb->ki_filp;
rc = generic_file_read_iter(iocb, to);
- /*
- * Even though this is a async interface, we need to wait
- * for IO to finish to update atime
- */
- if (-EIOCBQUEUED == rc)
- rc = wait_on_sync_kiocb(iocb);
if (rc >= 0) {
path = ecryptfs_dentry_to_lower_path(file->f_path.dentry);
touch_atime(path);
#include <linux/mpage.h>
#include <linux/fiemap.h>
#include <linux/namei.h>
-#include <linux/aio.h>
+#include <linux/uio.h>
#include "ext2.h"
#include "acl.h"
#include "xattr.h"
#include <linux/writeback.h>
#include <linux/mpage.h>
#include <linux/namei.h>
-#include <linux/aio.h>
+#include <linux/uio.h>
#include "ext3.h"
#include "xattr.h"
#include "acl.h"
#include <linux/jbd2.h>
#include <linux/mount.h>
#include <linux/path.h>
-#include <linux/aio.h>
#include <linux/quotaops.h>
#include <linux/pagevec.h>
+#include <linux/uio.h>
#include "ext4.h"
#include "ext4_jbd2.h"
#include "xattr.h"
* (sct@redhat.com), 1993, 1998
*/
-#include <linux/aio.h>
#include "ext4_jbd2.h"
#include "truncate.h"
+#include <linux/uio.h>
#include <trace/events/ext4.h>
#include <linux/printk.h>
#include <linux/slab.h>
#include <linux/ratelimit.h>
-#include <linux/aio.h>
#include <linux/bitops.h>
#include "ext4_jbd2.h"
#include <linux/pagevec.h>
#include <linux/mpage.h>
#include <linux/namei.h>
-#include <linux/aio.h>
#include <linux/uio.h>
#include <linux/bio.h>
#include <linux/workqueue.h>
#include <linux/f2fs_fs.h>
#include <linux/buffer_head.h>
#include <linux/mpage.h>
-#include <linux/aio.h>
#include <linux/writeback.h>
#include <linux/backing-dev.h>
#include <linux/blkdev.h>
#include <linux/bio.h>
#include <linux/prefetch.h>
+#include <linux/uio.h>
#include "f2fs.h"
#include "node.h"
#include <linux/mpage.h>
#include <linux/buffer_head.h>
#include <linux/mount.h>
-#include <linux/aio.h>
#include <linux/vfs.h>
#include <linux/parser.h>
#include <linux/uio.h>
#include <linux/device.h>
#include <linux/file.h>
#include <linux/fs.h>
-#include <linux/aio.h>
#include <linux/kdev_t.h>
#include <linux/kthread.h>
#include <linux/list.h>
#include <linux/slab.h>
#include <linux/stat.h>
#include <linux/module.h>
+#include <linux/uio.h>
#include "fuse_i.h"
#include <linux/pipe_fs_i.h>
#include <linux/swap.h>
#include <linux/splice.h>
-#include <linux/aio.h>
MODULE_ALIAS_MISCDEV(FUSE_MINOR);
MODULE_ALIAS("devname:fuse");
#include <linux/module.h>
#include <linux/compat.h>
#include <linux/swap.h>
-#include <linux/aio.h>
#include <linux/falloc.h>
+#include <linux/uio.h>
static const struct file_operations fuse_direct_io_file_operations;
}
}
+static ssize_t fuse_get_res_by_io(struct fuse_io_priv *io)
+{
+ if (io->err)
+ return io->err;
+
+ if (io->bytes >= 0 && io->write)
+ return -EIO;
+
+ return io->bytes < 0 ? io->size : io->bytes;
+}
+
/**
* In case of short read, the caller sets 'pos' to the position of
* actual end of fuse request in IO request. Otherwise, if bytes_requested
*/
static void fuse_aio_complete(struct fuse_io_priv *io, int err, ssize_t pos)
{
+ bool is_sync = is_sync_kiocb(io->iocb);
int left;
spin_lock(&io->lock);
io->bytes = pos;
left = --io->reqs;
+ if (!left && is_sync)
+ complete(io->done);
spin_unlock(&io->lock);
- if (!left) {
- long res;
+ if (!left && !is_sync) {
+ ssize_t res = fuse_get_res_by_io(io);
- if (io->err)
- res = io->err;
- else if (io->bytes >= 0 && io->write)
- res = -EIO;
- else {
- res = io->bytes < 0 ? io->size : io->bytes;
+ if (res >= 0) {
+ struct inode *inode = file_inode(io->iocb->ki_filp);
+ struct fuse_conn *fc = get_fuse_conn(inode);
+ struct fuse_inode *fi = get_fuse_inode(inode);
- if (!is_sync_kiocb(io->iocb)) {
- struct inode *inode = file_inode(io->iocb->ki_filp);
- struct fuse_conn *fc = get_fuse_conn(inode);
- struct fuse_inode *fi = get_fuse_inode(inode);
-
- spin_lock(&fc->lock);
- fi->attr_version = ++fc->attr_version;
- spin_unlock(&fc->lock);
- }
+ spin_lock(&fc->lock);
+ fi->attr_version = ++fc->attr_version;
+ spin_unlock(&fc->lock);
}
- aio_complete(io->iocb, res, 0);
+ io->iocb->ki_complete(io->iocb, res, 0);
kfree(io);
}
}
fuse_direct_IO(int rw, struct kiocb *iocb, struct iov_iter *iter,
loff_t offset)
{
+ DECLARE_COMPLETION_ONSTACK(wait);
ssize_t ret = 0;
struct file *file = iocb->ki_filp;
struct fuse_file *ff = file->private_data;
if (!is_sync_kiocb(iocb) && (offset + count > i_size) && rw == WRITE)
io->async = false;
+ if (io->async && is_sync_kiocb(iocb))
+ io->done = &wait;
+
if (rw == WRITE)
ret = __fuse_direct_write(io, iter, &pos);
else
if (!is_sync_kiocb(iocb))
return -EIOCBQUEUED;
- ret = wait_on_sync_kiocb(iocb);
- } else {
- kfree(io);
+ wait_for_completion(&wait);
+ ret = fuse_get_res_by_io(io);
}
+ kfree(io);
+
if (rw == WRITE) {
if (ret > 0)
fuse_write_update_size(inode, pos);
int err;
struct kiocb *iocb;
struct file *file;
+ struct completion *done;
};
/**
error = __gfs2_xattr_set(inode, name, data, len, 0, GFS2_EATYPE_SYS);
if (error)
goto out;
-
- if (acl)
- set_cached_acl(inode, type, acl);
- else
- forget_cached_acl(inode, type);
+ set_cached_acl(inode, type, acl);
out:
kfree(data);
return error;
#include <linux/swap.h>
#include <linux/gfs2_ondisk.h>
#include <linux/backing-dev.h>
-#include <linux/aio.h>
+#include <linux/uio.h>
#include <trace/events/writeback.h>
#include "gfs2.h"
if (alloc_required) {
struct gfs2_alloc_parms ap = { .aflags = 0, };
- error = gfs2_quota_lock_check(ip);
+ requested = data_blocks + ind_blocks;
+ ap.target = requested;
+ error = gfs2_quota_lock_check(ip, &ap);
if (error)
goto out_unlock;
- requested = data_blocks + ind_blocks;
- ap.target = requested;
error = gfs2_inplace_reserve(ip, &ap);
if (error)
goto out_qunlock;
if (gfs2_is_stuffed(ip) &&
(size > (sdp->sd_sb.sb_bsize - sizeof(struct gfs2_dinode)))) {
- error = gfs2_quota_lock_check(ip);
+ error = gfs2_quota_lock_check(ip, &ap);
if (error)
return error;
#include <asm/uaccess.h>
#include <linux/dlm.h>
#include <linux/dlm_plock.h>
-#include <linux/aio.h>
#include <linux/delay.h>
#include "gfs2.h"
if (ret)
goto out_unlock;
- ret = gfs2_quota_lock_check(ip);
- if (ret)
- goto out_unlock;
gfs2_write_calc_reserv(ip, PAGE_CACHE_SIZE, &data_blocks, &ind_blocks);
ap.target = data_blocks + ind_blocks;
+ ret = gfs2_quota_lock_check(ip, &ap);
+ if (ret)
+ goto out_unlock;
ret = gfs2_inplace_reserve(ip, &ap);
if (ret)
goto out_quota_unlock;
brelse(dibh);
return error;
}
-
-static void calc_max_reserv(struct gfs2_inode *ip, loff_t max, loff_t *len,
- unsigned int *data_blocks, unsigned int *ind_blocks)
+/**
+ * calc_max_reserv() - Reverse of write_calc_reserv. Given a number of
+ * blocks, determine how many bytes can be written.
+ * @ip: The inode in question.
+ * @len: Max cap of bytes. What we return in *len must be <= this.
+ * @data_blocks: Compute and return the number of data blocks needed
+ * @ind_blocks: Compute and return the number of indirect blocks needed
+ * @max_blocks: The total blocks available to work with.
+ *
+ * Returns: void, but @len, @data_blocks and @ind_blocks are filled in.
+ */
+static void calc_max_reserv(struct gfs2_inode *ip, loff_t *len,
+ unsigned int *data_blocks, unsigned int *ind_blocks,
+ unsigned int max_blocks)
{
+ loff_t max = *len;
const struct gfs2_sbd *sdp = GFS2_SB(&ip->i_inode);
- unsigned int max_blocks = ip->i_rgd->rd_free_clone;
unsigned int tmp, max_data = max_blocks - 3 * (sdp->sd_max_height - 1);
for (tmp = max_data; tmp > sdp->sd_diptrs;) {
tmp = DIV_ROUND_UP(tmp, sdp->sd_inptrs);
max_data -= tmp;
}
- /* This calculation isn't the exact reverse of gfs2_write_calc_reserve,
- so it might end up with fewer data blocks */
- if (max_data <= *data_blocks)
- return;
+
*data_blocks = max_data;
*ind_blocks = max_blocks - max_data;
*len = ((loff_t)max_data - 3) << sdp->sd_sb.sb_bsize_shift;
struct gfs2_inode *ip = GFS2_I(inode);
struct gfs2_alloc_parms ap = { .aflags = 0, };
unsigned int data_blocks = 0, ind_blocks = 0, rblocks;
- loff_t bytes, max_bytes;
+ loff_t bytes, max_bytes, max_blks = UINT_MAX;
int error;
const loff_t pos = offset;
const loff_t count = len;
gfs2_size_hint(file, offset, len);
+ gfs2_write_calc_reserv(ip, PAGE_SIZE, &data_blocks, &ind_blocks);
+ ap.min_target = data_blocks + ind_blocks;
+
while (len > 0) {
if (len < bytes)
bytes = len;
offset += bytes;
continue;
}
- error = gfs2_quota_lock_check(ip);
+
+ /* We need to determine how many bytes we can actually
+ * fallocate without exceeding quota or going over the
+ * end of the fs. We start off optimistically by assuming
+ * we can write max_bytes */
+ max_bytes = (len > max_chunk_size) ? max_chunk_size : len;
+
+ /* Since max_bytes is most likely a theoretical max, we
+ * calculate a more realistic 'bytes' to serve as a good
+ * starting point for the number of bytes we may be able
+ * to write */
+ gfs2_write_calc_reserv(ip, bytes, &data_blocks, &ind_blocks);
+ ap.target = data_blocks + ind_blocks;
+
+ error = gfs2_quota_lock_check(ip, &ap);
if (error)
return error;
-retry:
- gfs2_write_calc_reserv(ip, bytes, &data_blocks, &ind_blocks);
+ /* ap.allowed tells us how many blocks quota will allow
+ * us to write. Check if this reduces max_blks */
+ if (ap.allowed && ap.allowed < max_blks)
+ max_blks = ap.allowed;
- ap.target = data_blocks + ind_blocks;
error = gfs2_inplace_reserve(ip, &ap);
- if (error) {
- if (error == -ENOSPC && bytes > sdp->sd_sb.sb_bsize) {
- bytes >>= 1;
- bytes &= bsize_mask;
- if (bytes == 0)
- bytes = sdp->sd_sb.sb_bsize;
- goto retry;
- }
+ if (error)
goto out_qunlock;
- }
- max_bytes = bytes;
- calc_max_reserv(ip, (len > max_chunk_size)? max_chunk_size: len,
- &max_bytes, &data_blocks, &ind_blocks);
+
+ /* check if the selected rgrp limits our max_blks further */
+ if (ap.allowed && ap.allowed < max_blks)
+ max_blks = ap.allowed;
+
+ /* Almost done. Calculate bytes that can be written using
+ * max_blks. We also recompute max_bytes, data_blocks and
+ * ind_blocks */
+ calc_max_reserv(ip, &max_bytes, &data_blocks,
+ &ind_blocks, max_blks);
rblocks = RES_DINODE + ind_blocks + RES_STATFS + RES_QUOTA +
RES_RG_HDR + gfs2_rg_blocks(ip, data_blocks + ind_blocks);
return ret;
}
+static ssize_t gfs2_file_splice_write(struct pipe_inode_info *pipe,
+ struct file *out, loff_t *ppos,
+ size_t len, unsigned int flags)
+{
+ int error;
+ struct gfs2_inode *ip = GFS2_I(out->f_mapping->host);
+
+ error = gfs2_rs_alloc(ip);
+ if (error)
+ return (ssize_t)error;
+
+ gfs2_size_hint(out, *ppos, len);
+
+ return iter_file_splice_write(pipe, out, ppos, len, flags);
+}
+
#ifdef CONFIG_GFS2_FS_LOCKING_DLM
/**
.lock = gfs2_lock,
.flock = gfs2_flock,
.splice_read = generic_file_splice_read,
- .splice_write = iter_file_splice_write,
+ .splice_write = gfs2_file_splice_write,
.setlease = simple_nosetlease,
.fallocate = gfs2_fallocate,
};
.release = gfs2_release,
.fsync = gfs2_fsync,
.splice_read = generic_file_splice_read,
- .splice_write = iter_file_splice_write,
+ .splice_write = gfs2_file_splice_write,
.setlease = generic_setlease,
.fallocate = gfs2_fallocate,
};
int gfs2_create_debugfs_file(struct gfs2_sbd *sdp)
{
- sdp->debugfs_dir = debugfs_create_dir(sdp->sd_table_name, gfs2_root);
- if (!sdp->debugfs_dir)
- return -ENOMEM;
- sdp->debugfs_dentry_glocks = debugfs_create_file("glocks",
- S_IFREG | S_IRUGO,
- sdp->debugfs_dir, sdp,
- &gfs2_glocks_fops);
- if (!sdp->debugfs_dentry_glocks)
+ struct dentry *dent;
+
+ dent = debugfs_create_dir(sdp->sd_table_name, gfs2_root);
+ if (IS_ERR_OR_NULL(dent))
+ goto fail;
+ sdp->debugfs_dir = dent;
+
+ dent = debugfs_create_file("glocks",
+ S_IFREG | S_IRUGO,
+ sdp->debugfs_dir, sdp,
+ &gfs2_glocks_fops);
+ if (IS_ERR_OR_NULL(dent))
goto fail;
+ sdp->debugfs_dentry_glocks = dent;
- sdp->debugfs_dentry_glstats = debugfs_create_file("glstats",
- S_IFREG | S_IRUGO,
- sdp->debugfs_dir, sdp,
- &gfs2_glstats_fops);
- if (!sdp->debugfs_dentry_glstats)
+ dent = debugfs_create_file("glstats",
+ S_IFREG | S_IRUGO,
+ sdp->debugfs_dir, sdp,
+ &gfs2_glstats_fops);
+ if (IS_ERR_OR_NULL(dent))
goto fail;
+ sdp->debugfs_dentry_glstats = dent;
- sdp->debugfs_dentry_sbstats = debugfs_create_file("sbstats",
- S_IFREG | S_IRUGO,
- sdp->debugfs_dir, sdp,
- &gfs2_sbstats_fops);
- if (!sdp->debugfs_dentry_sbstats)
+ dent = debugfs_create_file("sbstats",
+ S_IFREG | S_IRUGO,
+ sdp->debugfs_dir, sdp,
+ &gfs2_sbstats_fops);
+ if (IS_ERR_OR_NULL(dent))
goto fail;
+ sdp->debugfs_dentry_sbstats = dent;
return 0;
fail:
gfs2_delete_debugfs_file(sdp);
- return -ENOMEM;
+ return dent ? PTR_ERR(dent) : -ENOMEM;
}
void gfs2_delete_debugfs_file(struct gfs2_sbd *sdp)
int gfs2_register_debugfs(void)
{
gfs2_root = debugfs_create_dir("gfs2", NULL);
+ if (IS_ERR(gfs2_root))
+ return PTR_ERR(gfs2_root);
return gfs2_root ? 0 : -ENOMEM;
}
* to the allocation code.
*/
struct gfs2_alloc_parms {
- u32 target;
+ u64 target;
+ u32 min_target;
u32 aflags;
+ u64 allowed;
};
enum {
struct gfs2_alloc_parms ap = { .target = *dblocks, .aflags = flags, };
int error;
- error = gfs2_quota_lock_check(ip);
+ error = gfs2_quota_lock_check(ip, &ap);
if (error)
goto out;
int error;
if (da->nr_blocks) {
- error = gfs2_quota_lock_check(dip);
+ error = gfs2_quota_lock_check(dip, &ap);
if (error)
goto fail_quota_locks;
if (da.nr_blocks) {
struct gfs2_alloc_parms ap = { .target = da.nr_blocks, };
- error = gfs2_quota_lock_check(dip);
+ error = gfs2_quota_lock_check(dip, &ap);
if (error)
goto out_gunlock;
if (da.nr_blocks) {
struct gfs2_alloc_parms ap = { .target = da.nr_blocks, };
- error = gfs2_quota_lock_check(ndip);
+ error = gfs2_quota_lock_check(ndip, &ap);
if (error)
goto out_gunlock;
kuid_t ouid, nuid;
kgid_t ogid, ngid;
int error;
+ struct gfs2_alloc_parms ap;
ouid = inode->i_uid;
ogid = inode->i_gid;
if (error)
goto out;
+ ap.target = gfs2_get_inode_blocks(&ip->i_inode);
+
if (!uid_eq(ouid, NO_UID_QUOTA_CHANGE) ||
!gid_eq(ogid, NO_GID_QUOTA_CHANGE)) {
- error = gfs2_quota_check(ip, nuid, ngid);
+ error = gfs2_quota_check(ip, nuid, ngid, &ap);
if (error)
goto out_gunlock_q;
}
if (!uid_eq(ouid, NO_UID_QUOTA_CHANGE) ||
!gid_eq(ogid, NO_GID_QUOTA_CHANGE)) {
- u64 blocks = gfs2_get_inode_blocks(&ip->i_inode);
- gfs2_quota_change(ip, -blocks, ouid, ogid);
- gfs2_quota_change(ip, blocks, nuid, ngid);
+ gfs2_quota_change(ip, -ap.target, ouid, ogid);
+ gfs2_quota_change(ip, ap.target, nuid, ngid);
}
out_end_trans:
if (error)
return error;
+ if (test_and_clear_bit(QDF_REFRESH, &qd->qd_flags))
+ force_refresh = FORCE;
+
qd->qd_qb = *(struct gfs2_quota_lvb *)qd->qd_gl->gl_lksb.sb_lvbptr;
if (force_refresh || qd->qd_qb.qb_magic != cpu_to_be32(GFS2_MAGIC)) {
sizeof(struct gfs2_quota_data *), sort_qd, NULL);
for (x = 0; x < ip->i_res->rs_qa_qd_num; x++) {
- int force = NO_FORCE;
qd = ip->i_res->rs_qa_qd[x];
- if (test_and_clear_bit(QDF_REFRESH, &qd->qd_flags))
- force = FORCE;
- error = do_glock(qd, force, &ip->i_res->rs_qa_qd_ghs[x]);
+ error = do_glock(qd, NO_FORCE, &ip->i_res->rs_qa_qd_ghs[x]);
if (error)
break;
}
return 0;
}
-int gfs2_quota_check(struct gfs2_inode *ip, kuid_t uid, kgid_t gid)
+/**
+ * gfs2_quota_check - check if allocating new blocks will exceed quota
+ * @ip: The inode for which this check is being performed
+ * @uid: The uid to check against
+ * @gid: The gid to check against
+ * @ap: The allocation parameters. ap->target contains the requested
+ * blocks. ap->min_target, if set, contains the minimum blks
+ * requested.
+ *
+ * Returns: 0 on success.
+ * min_req = ap->min_target ? ap->min_target : ap->target;
+ * quota must allow atleast min_req blks for success and
+ * ap->allowed is set to the number of blocks allowed
+ *
+ * -EDQUOT otherwise, quota violation. ap->allowed is set to number
+ * of blocks available.
+ */
+int gfs2_quota_check(struct gfs2_inode *ip, kuid_t uid, kgid_t gid,
+ struct gfs2_alloc_parms *ap)
{
struct gfs2_sbd *sdp = GFS2_SB(&ip->i_inode);
struct gfs2_quota_data *qd;
- s64 value;
+ s64 value, warn, limit;
unsigned int x;
int error = 0;
+ ap->allowed = UINT_MAX; /* Assume we are permitted a whole lot */
if (!test_bit(GIF_QD_LOCKED, &ip->i_flags))
return 0;
qid_eq(qd->qd_id, make_kqid_gid(gid))))
continue;
+ warn = (s64)be64_to_cpu(qd->qd_qb.qb_warn);
+ limit = (s64)be64_to_cpu(qd->qd_qb.qb_limit);
value = (s64)be64_to_cpu(qd->qd_qb.qb_value);
spin_lock(&qd_lock);
value += qd->qd_change;
spin_unlock(&qd_lock);
- if (be64_to_cpu(qd->qd_qb.qb_limit) && (s64)be64_to_cpu(qd->qd_qb.qb_limit) < value) {
- print_message(qd, "exceeded");
- quota_send_warning(qd->qd_id,
- sdp->sd_vfs->s_dev, QUOTA_NL_BHARDWARN);
-
- error = -EDQUOT;
- break;
- } else if (be64_to_cpu(qd->qd_qb.qb_warn) &&
- (s64)be64_to_cpu(qd->qd_qb.qb_warn) < value &&
+ if (limit > 0 && (limit - value) < ap->allowed)
+ ap->allowed = limit - value;
+ /* If we can't meet the target */
+ if (limit && limit < (value + (s64)ap->target)) {
+ /* If no min_target specified or we don't meet
+ * min_target, return -EDQUOT */
+ if (!ap->min_target || ap->min_target > ap->allowed) {
+ print_message(qd, "exceeded");
+ quota_send_warning(qd->qd_id,
+ sdp->sd_vfs->s_dev,
+ QUOTA_NL_BHARDWARN);
+ error = -EDQUOT;
+ break;
+ }
+ } else if (warn && warn < value &&
time_after_eq(jiffies, qd->qd_last_warn +
- gfs2_tune_get(sdp,
- gt_quota_warn_period) * HZ)) {
+ gfs2_tune_get(sdp, gt_quota_warn_period)
+ * HZ)) {
quota_send_warning(qd->qd_id,
sdp->sd_vfs->s_dev, QUOTA_NL_BSOFTWARN);
error = print_message(qd, "warning");
qd->qd_last_warn = jiffies;
}
}
-
return error;
}
extern int gfs2_quota_lock(struct gfs2_inode *ip, kuid_t uid, kgid_t gid);
extern void gfs2_quota_unlock(struct gfs2_inode *ip);
-extern int gfs2_quota_check(struct gfs2_inode *ip, kuid_t uid, kgid_t gid);
+extern int gfs2_quota_check(struct gfs2_inode *ip, kuid_t uid, kgid_t gid,
+ struct gfs2_alloc_parms *ap);
extern void gfs2_quota_change(struct gfs2_inode *ip, s64 change,
kuid_t uid, kgid_t gid);
extern void gfs2_wake_up_statfs(struct gfs2_sbd *sdp);
-static inline int gfs2_quota_lock_check(struct gfs2_inode *ip)
+static inline int gfs2_quota_lock_check(struct gfs2_inode *ip,
+ struct gfs2_alloc_parms *ap)
{
struct gfs2_sbd *sdp = GFS2_SB(&ip->i_inode);
int ret;
return ret;
if (sdp->sd_args.ar_quota != GFS2_QUOTA_ON)
return 0;
- ret = gfs2_quota_check(ip, ip->i_inode.i_uid, ip->i_inode.i_gid);
+ ret = gfs2_quota_check(ip, ip->i_inode.i_uid, ip->i_inode.i_gid, ap);
if (ret)
gfs2_quota_unlock(ip);
return ret;
* @ip: the inode to reserve space for
* @ap: the allocation parameters
*
- * Returns: errno
+ * We try our best to find an rgrp that has at least ap->target blocks
+ * available. After a couple of passes (loops == 2), the prospects of finding
+ * such an rgrp diminish. At this stage, we return the first rgrp that has
+ * atleast ap->min_target blocks available. Either way, we set ap->allowed to
+ * the number of blocks available in the chosen rgrp.
+ *
+ * Returns: 0 on success,
+ * -ENOMEM if a suitable rgrp can't be found
+ * errno otherwise
*/
-int gfs2_inplace_reserve(struct gfs2_inode *ip, const struct gfs2_alloc_parms *ap)
+int gfs2_inplace_reserve(struct gfs2_inode *ip, struct gfs2_alloc_parms *ap)
{
struct gfs2_sbd *sdp = GFS2_SB(&ip->i_inode);
struct gfs2_rgrpd *begin = NULL;
/* Skip unuseable resource groups */
if ((rs->rs_rbm.rgd->rd_flags & (GFS2_RGF_NOALLOC |
GFS2_RDF_ERROR)) ||
- (ap->target > rs->rs_rbm.rgd->rd_extfail_pt))
+ (loops == 0 && ap->target > rs->rs_rbm.rgd->rd_extfail_pt))
goto skip_rgrp;
if (sdp->sd_args.ar_rgrplvb)
goto check_rgrp;
/* If rgrp has enough free space, use it */
- if (rs->rs_rbm.rgd->rd_free_clone >= ap->target) {
+ if (rs->rs_rbm.rgd->rd_free_clone >= ap->target ||
+ (loops == 2 && ap->min_target &&
+ rs->rs_rbm.rgd->rd_free_clone >= ap->min_target)) {
ip->i_rgd = rs->rs_rbm.rgd;
+ ap->allowed = ip->i_rgd->rd_free_clone;
return 0;
}
-
check_rgrp:
/* Check for unlinked inodes which can be reclaimed */
if (rs->rs_rbm.rgd->rd_flags & GFS2_RDF_CHECK)
extern struct gfs2_alloc *gfs2_alloc_get(struct gfs2_inode *ip);
#define GFS2_AF_ORLOV 1
-extern int gfs2_inplace_reserve(struct gfs2_inode *ip, const struct gfs2_alloc_parms *ap);
+extern int gfs2_inplace_reserve(struct gfs2_inode *ip,
+ struct gfs2_alloc_parms *ap);
extern void gfs2_inplace_release(struct gfs2_inode *ip);
extern int gfs2_alloc_blocks(struct gfs2_inode *ip, u64 *bn, unsigned int *n,
if (error)
return error;
- error = gfs2_quota_lock_check(ip);
+ error = gfs2_quota_lock_check(ip, &ap);
if (error)
return error;
#include <linux/pagemap.h>
#include <linux/mpage.h>
#include <linux/sched.h>
-#include <linux/aio.h>
+#include <linux/uio.h>
#include "hfs_fs.h"
#include "btree.h"
#include <linux/pagemap.h>
#include <linux/mpage.h>
#include <linux/sched.h>
-#include <linux/aio.h>
+#include <linux/uio.h>
#include "hfsplus_fs.h"
#include "hfsplus_raw.h"
static void truncate_huge_page(struct page *page)
{
- cancel_dirty_page(page, /* No IO accounting for huge pages? */0);
+ ClearPageDirty(page);
ClearPageUptodate(page);
delete_from_page_cache(page);
}
/* unchecked xdatum is chained with c->xattr_unchecked */
list_del_init(&xd->xindex);
- dbg_xattr("success on verfying xdatum (xid=%u, version=%u)\n",
+ dbg_xattr("success on verifying xdatum (xid=%u, version=%u)\n",
xd->xid, xd->version);
return 0;
#include <linux/buffer_head.h>
#include <linux/pagemap.h>
#include <linux/quotaops.h>
+#include <linux/uio.h>
#include <linux/writeback.h>
-#include <linux/aio.h>
#include "jfs_incore.h"
#include "jfs_inode.h"
#include "jfs_filsys.h"
vaf.fmt = fmt;
vaf.va = &args;
- pr_err("ERROR: (device %s): %pf: %pV\n",
+ pr_err("ERROR: (device %s): %ps: %pV\n",
sb->s_id, __builtin_return_address(0), &vaf);
va_end(args);
* PATH_MAX includes the nul terminator --RR.
*/
-#define EMBEDDED_NAME_MAX (PATH_MAX - sizeof(struct filename))
+#define EMBEDDED_NAME_MAX (PATH_MAX - offsetof(struct filename, iname))
struct filename *
getname_flags(const char __user *filename, int flags, int *empty)
{
- struct filename *result, *err;
- int len;
- long max;
+ struct filename *result;
char *kname;
+ int len;
result = audit_reusename(filename);
if (result)
result = __getname();
if (unlikely(!result))
return ERR_PTR(-ENOMEM);
- result->refcnt = 1;
/*
* First, try to embed the struct filename inside the names_cache
* allocation
*/
- kname = (char *)result + sizeof(*result);
+ kname = (char *)result->iname;
result->name = kname;
- result->separate = false;
- max = EMBEDDED_NAME_MAX;
-recopy:
- len = strncpy_from_user(kname, filename, max);
+ len = strncpy_from_user(kname, filename, EMBEDDED_NAME_MAX);
if (unlikely(len < 0)) {
- err = ERR_PTR(len);
- goto error;
+ __putname(result);
+ return ERR_PTR(len);
}
/*
* names_cache allocation for the pathname, and re-do the copy from
* userland.
*/
- if (len == EMBEDDED_NAME_MAX && max == EMBEDDED_NAME_MAX) {
+ if (unlikely(len == EMBEDDED_NAME_MAX)) {
+ const size_t size = offsetof(struct filename, iname[1]);
kname = (char *)result;
- result = kzalloc(sizeof(*result), GFP_KERNEL);
- if (!result) {
- err = ERR_PTR(-ENOMEM);
- result = (struct filename *)kname;
- goto error;
+ /*
+ * size is chosen that way we to guarantee that
+ * result->iname[0] is within the same object and that
+ * kname can't be equal to result->iname, no matter what.
+ */
+ result = kzalloc(size, GFP_KERNEL);
+ if (unlikely(!result)) {
+ __putname(kname);
+ return ERR_PTR(-ENOMEM);
}
result->name = kname;
- result->separate = true;
- result->refcnt = 1;
- max = PATH_MAX;
- goto recopy;
+ len = strncpy_from_user(kname, filename, PATH_MAX);
+ if (unlikely(len < 0)) {
+ __putname(kname);
+ kfree(result);
+ return ERR_PTR(len);
+ }
+ if (unlikely(len == PATH_MAX)) {
+ __putname(kname);
+ kfree(result);
+ return ERR_PTR(-ENAMETOOLONG);
+ }
}
+ result->refcnt = 1;
/* The empty path is special. */
if (unlikely(!len)) {
if (empty)
*empty = 1;
- err = ERR_PTR(-ENOENT);
- if (!(flags & LOOKUP_EMPTY))
- goto error;
+ if (!(flags & LOOKUP_EMPTY)) {
+ putname(result);
+ return ERR_PTR(-ENOENT);
+ }
}
- err = ERR_PTR(-ENAMETOOLONG);
- if (unlikely(len >= PATH_MAX))
- goto error;
-
result->uptr = filename;
result->aname = NULL;
audit_getname(result);
return result;
-
-error:
- putname(result);
- return err;
}
struct filename *
return ERR_PTR(-ENOMEM);
if (len <= EMBEDDED_NAME_MAX) {
- result->name = (char *)(result) + sizeof(*result);
- result->separate = false;
+ result->name = (char *)result->iname;
} else if (len <= PATH_MAX) {
struct filename *tmp;
return ERR_PTR(-ENOMEM);
}
tmp->name = (char *)result;
- tmp->separate = true;
result = tmp;
} else {
__putname(result);
if (--name->refcnt > 0)
return;
- if (name->separate) {
+ if (name->name != name->iname) {
__putname(name->name);
kfree(name);
} else
return err;
}
-static int path_init(int dfd, const char *name, unsigned int flags,
+static int path_init(int dfd, const struct filename *name, unsigned int flags,
struct nameidata *nd)
{
int retval = 0;
+ const char *s = name->name;
nd->last_type = LAST_ROOT; /* if there are only slashes... */
nd->flags = flags | LOOKUP_JUMPED | LOOKUP_PARENT;
if (flags & LOOKUP_ROOT) {
struct dentry *root = nd->root.dentry;
struct inode *inode = root->d_inode;
- if (*name) {
+ if (*s) {
if (!d_can_lookup(root))
return -ENOTDIR;
retval = inode_permission(inode, MAY_EXEC);
nd->root.mnt = NULL;
nd->m_seq = read_seqbegin(&mount_lock);
- if (*name=='/') {
+ if (*s == '/') {
if (flags & LOOKUP_RCU) {
rcu_read_lock();
nd->seq = set_root_rcu(nd);
dentry = f.file->f_path.dentry;
- if (*name) {
+ if (*s) {
if (!d_can_lookup(dentry)) {
fdput(f);
return -ENOTDIR;
return -ECHILD;
done:
current->total_link_count = 0;
- return link_path_walk(name, nd);
+ return link_path_walk(s, nd);
}
static void path_cleanup(struct nameidata *nd)
}
/* Returns 0 and nd will be valid on success; Retuns error, otherwise. */
-static int path_lookupat(int dfd, const char *name,
+static int path_lookupat(int dfd, const struct filename *name,
unsigned int flags, struct nameidata *nd)
{
struct path path;
static int filename_lookup(int dfd, struct filename *name,
unsigned int flags, struct nameidata *nd)
{
- int retval = path_lookupat(dfd, name->name, flags | LOOKUP_RCU, nd);
+ int retval = path_lookupat(dfd, name, flags | LOOKUP_RCU, nd);
if (unlikely(retval == -ECHILD))
- retval = path_lookupat(dfd, name->name, flags, nd);
+ retval = path_lookupat(dfd, name, flags, nd);
if (unlikely(retval == -ESTALE))
- retval = path_lookupat(dfd, name->name,
- flags | LOOKUP_REVAL, nd);
+ retval = path_lookupat(dfd, name, flags | LOOKUP_REVAL, nd);
if (likely(!retval))
audit_inode(name, nd->path.dentry, flags & LOOKUP_PARENT);
return retval;
}
-static int do_path_lookup(int dfd, const char *name,
- unsigned int flags, struct nameidata *nd)
-{
- struct filename *filename = getname_kernel(name);
- int retval = PTR_ERR(filename);
-
- if (!IS_ERR(filename)) {
- retval = filename_lookup(dfd, filename, flags, nd);
- putname(filename);
- }
- return retval;
-}
-
/* does lookup, returns the object with parent locked */
struct dentry *kern_path_locked(const char *name, struct path *path)
{
int kern_path(const char *name, unsigned int flags, struct path *path)
{
struct nameidata nd;
- int res = do_path_lookup(AT_FDCWD, name, flags, &nd);
- if (!res)
- *path = nd.path;
+ struct filename *filename = getname_kernel(name);
+ int res = PTR_ERR(filename);
+
+ if (!IS_ERR(filename)) {
+ res = filename_lookup(AT_FDCWD, filename, flags, &nd);
+ putname(filename);
+ if (!res)
+ *path = nd.path;
+ }
return res;
}
EXPORT_SYMBOL(kern_path);
const char *name, unsigned int flags,
struct path *path)
{
- struct nameidata nd;
- int err;
- nd.root.dentry = dentry;
- nd.root.mnt = mnt;
+ struct filename *filename = getname_kernel(name);
+ int err = PTR_ERR(filename);
+
BUG_ON(flags & LOOKUP_PARENT);
- /* the first argument of do_path_lookup() is ignored with LOOKUP_ROOT */
- err = do_path_lookup(AT_FDCWD, name, flags | LOOKUP_ROOT, &nd);
- if (!err)
- *path = nd.path;
+
+ /* the first argument of filename_lookup() is ignored with LOOKUP_ROOT */
+ if (!IS_ERR(filename)) {
+ struct nameidata nd;
+ nd.root.dentry = dentry;
+ nd.root.mnt = mnt;
+ err = filename_lookup(AT_FDCWD, filename,
+ flags | LOOKUP_ROOT, &nd);
+ if (!err)
+ *path = nd.path;
+ putname(filename);
+ }
return err;
}
EXPORT_SYMBOL(vfs_path_lookup);
* @len: maximum length @len should be interpreted to
*
* Note that this routine is purely a helper for filesystem usage and should
- * not be called by generic code. Also note that by using this function the
- * nameidata argument is passed to the filesystem methods and a filesystem
- * using this helper needs to be prepared for that.
+ * not be called by generic code.
*/
struct dentry *lookup_one_len(const char *name, struct dentry *base, int len)
{
* Returns 0 and "path" will be valid on success; Returns error otherwise.
*/
static int
-path_mountpoint(int dfd, const char *name, struct path *path, unsigned int flags)
+path_mountpoint(int dfd, const struct filename *name, struct path *path,
+ unsigned int flags)
{
struct nameidata nd;
int err;
}
static int
-filename_mountpoint(int dfd, struct filename *s, struct path *path,
+filename_mountpoint(int dfd, struct filename *name, struct path *path,
unsigned int flags)
{
int error;
- if (IS_ERR(s))
- return PTR_ERR(s);
- error = path_mountpoint(dfd, s->name, path, flags | LOOKUP_RCU);
+ if (IS_ERR(name))
+ return PTR_ERR(name);
+ error = path_mountpoint(dfd, name, path, flags | LOOKUP_RCU);
if (unlikely(error == -ECHILD))
- error = path_mountpoint(dfd, s->name, path, flags);
+ error = path_mountpoint(dfd, name, path, flags);
if (unlikely(error == -ESTALE))
- error = path_mountpoint(dfd, s->name, path, flags | LOOKUP_REVAL);
+ error = path_mountpoint(dfd, name, path, flags | LOOKUP_REVAL);
if (likely(!error))
- audit_inode(s, path->dentry, 0);
- putname(s);
+ audit_inode(name, path->dentry, 0);
+ putname(name);
return error;
}
static const struct qstr name = QSTR_INIT("/", 1);
struct dentry *dentry, *child;
struct inode *dir;
- int error = path_lookupat(dfd, pathname->name,
+ int error = path_lookupat(dfd, pathname,
flags | LOOKUP_DIRECTORY, nd);
if (unlikely(error))
return error;
goto out;
}
- error = path_init(dfd, pathname->name, flags, nd);
+ error = path_init(dfd, pathname, flags, nd);
if (unlikely(error))
goto out;
return -EINVAL;
#else
- VM_BUG_ON(iocb->ki_nbytes != PAGE_SIZE);
+ VM_BUG_ON(iov_iter_count(iter) != PAGE_SIZE);
if (rw == READ)
return nfs_file_direct_read(iocb, iter, pos);
long res = (long) dreq->error;
if (!res)
res = (long) dreq->count;
- aio_complete(dreq->iocb, res, 0);
+ dreq->iocb->ki_complete(dreq->iocb, res, 0);
}
complete_all(&dreq->completion);
#include <linux/nfs_mount.h>
#include <linux/mm.h>
#include <linux/pagemap.h>
-#include <linux/aio.h>
#include <linux/gfp.h>
#include <linux/swap.h>
* request from the inode / page_private pointer and
* release it */
nfs_inode_remove_request(req);
- /*
- * In case nfs_inode_remove_request has marked the
- * page as being dirty
- */
- cancel_dirty_page(page, PAGE_CACHE_SIZE);
nfs_unlock_and_release_request(req);
}
#include <linux/mpage.h>
#include <linux/pagemap.h>
#include <linux/writeback.h>
-#include <linux/aio.h>
+#include <linux/uio.h>
#include "nilfs.h"
#include "btnode.h"
#include "segment.h"
ntfs-$(CONFIG_NTFS_RW) += bitmap.o lcnalloc.o logfile.o quota.o usnjrnl.o
-ccflags-y := -DNTFS_VERSION=\"2.1.31\"
+ccflags-y := -DNTFS_VERSION=\"2.1.32\"
ccflags-$(CONFIG_NTFS_DEBUG) += -DDEBUG
ccflags-$(CONFIG_NTFS_RW) += -DNTFS_RW
/*
* file.c - NTFS kernel file operations. Part of the Linux-NTFS project.
*
- * Copyright (c) 2001-2014 Anton Altaparmakov and Tuxera Inc.
+ * Copyright (c) 2001-2015 Anton Altaparmakov and Tuxera Inc.
*
* This program/include file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as published
#include <linux/swap.h>
#include <linux/uio.h>
#include <linux/writeback.h>
-#include <linux/aio.h>
#include <asm/page.h>
#include <asm/uaccess.h>
return err;
}
-/**
- * ntfs_fault_in_pages_readable -
- *
- * Fault a number of userspace pages into pagetables.
- *
- * Unlike include/linux/pagemap.h::fault_in_pages_readable(), this one copes
- * with more than two userspace pages as well as handling the single page case
- * elegantly.
- *
- * If you find this difficult to understand, then think of the while loop being
- * the following code, except that we do without the integer variable ret:
- *
- * do {
- * ret = __get_user(c, uaddr);
- * uaddr += PAGE_SIZE;
- * } while (!ret && uaddr < end);
- *
- * Note, the final __get_user() may well run out-of-bounds of the user buffer,
- * but _not_ out-of-bounds of the page the user buffer belongs to, and since
- * this is only a read and not a write, and since it is still in the same page,
- * it should not matter and this makes the code much simpler.
- */
-static inline void ntfs_fault_in_pages_readable(const char __user *uaddr,
- int bytes)
+static ssize_t ntfs_prepare_file_for_write(struct file *file, loff_t *ppos,
+ size_t *count)
{
- const char __user *end;
- volatile char c;
-
- /* Set @end to the first byte outside the last page we care about. */
- end = (const char __user*)PAGE_ALIGN((unsigned long)uaddr + bytes);
-
- while (!__get_user(c, uaddr) && (uaddr += PAGE_SIZE, uaddr < end))
- ;
-}
-
-/**
- * ntfs_fault_in_pages_readable_iovec -
- *
- * Same as ntfs_fault_in_pages_readable() but operates on an array of iovecs.
- */
-static inline void ntfs_fault_in_pages_readable_iovec(const struct iovec *iov,
- size_t iov_ofs, int bytes)
-{
- do {
- const char __user *buf;
- unsigned len;
+ loff_t pos;
+ s64 end, ll;
+ ssize_t err;
+ unsigned long flags;
+ struct inode *vi = file_inode(file);
+ ntfs_inode *base_ni, *ni = NTFS_I(vi);
+ ntfs_volume *vol = ni->vol;
- buf = iov->iov_base + iov_ofs;
- len = iov->iov_len - iov_ofs;
- if (len > bytes)
- len = bytes;
- ntfs_fault_in_pages_readable(buf, len);
- bytes -= len;
- iov++;
- iov_ofs = 0;
- } while (bytes);
+ ntfs_debug("Entering for i_ino 0x%lx, attribute type 0x%x, pos "
+ "0x%llx, count 0x%lx.", vi->i_ino,
+ (unsigned)le32_to_cpu(ni->type),
+ (unsigned long long)*ppos, (unsigned long)*count);
+ /* We can write back this queue in page reclaim. */
+ current->backing_dev_info = inode_to_bdi(vi);
+ err = generic_write_checks(file, ppos, count, S_ISBLK(vi->i_mode));
+ if (unlikely(err))
+ goto out;
+ /*
+ * All checks have passed. Before we start doing any writing we want
+ * to abort any totally illegal writes.
+ */
+ BUG_ON(NInoMstProtected(ni));
+ BUG_ON(ni->type != AT_DATA);
+ /* If file is encrypted, deny access, just like NT4. */
+ if (NInoEncrypted(ni)) {
+ /* Only $DATA attributes can be encrypted. */
+ /*
+ * Reminder for later: Encrypted files are _always_
+ * non-resident so that the content can always be encrypted.
+ */
+ ntfs_debug("Denying write access to encrypted file.");
+ err = -EACCES;
+ goto out;
+ }
+ if (NInoCompressed(ni)) {
+ /* Only unnamed $DATA attribute can be compressed. */
+ BUG_ON(ni->name_len);
+ /*
+ * Reminder for later: If resident, the data is not actually
+ * compressed. Only on the switch to non-resident does
+ * compression kick in. This is in contrast to encrypted files
+ * (see above).
+ */
+ ntfs_error(vi->i_sb, "Writing to compressed files is not "
+ "implemented yet. Sorry.");
+ err = -EOPNOTSUPP;
+ goto out;
+ }
+ if (*count == 0)
+ goto out;
+ base_ni = ni;
+ if (NInoAttr(ni))
+ base_ni = ni->ext.base_ntfs_ino;
+ err = file_remove_suid(file);
+ if (unlikely(err))
+ goto out;
+ /*
+ * Our ->update_time method always succeeds thus file_update_time()
+ * cannot fail either so there is no need to check the return code.
+ */
+ file_update_time(file);
+ pos = *ppos;
+ /* The first byte after the last cluster being written to. */
+ end = (pos + *count + vol->cluster_size_mask) &
+ ~(u64)vol->cluster_size_mask;
+ /*
+ * If the write goes beyond the allocated size, extend the allocation
+ * to cover the whole of the write, rounded up to the nearest cluster.
+ */
+ read_lock_irqsave(&ni->size_lock, flags);
+ ll = ni->allocated_size;
+ read_unlock_irqrestore(&ni->size_lock, flags);
+ if (end > ll) {
+ /*
+ * Extend the allocation without changing the data size.
+ *
+ * Note we ensure the allocation is big enough to at least
+ * write some data but we do not require the allocation to be
+ * complete, i.e. it may be partial.
+ */
+ ll = ntfs_attr_extend_allocation(ni, end, -1, pos);
+ if (likely(ll >= 0)) {
+ BUG_ON(pos >= ll);
+ /* If the extension was partial truncate the write. */
+ if (end > ll) {
+ ntfs_debug("Truncating write to inode 0x%lx, "
+ "attribute type 0x%x, because "
+ "the allocation was only "
+ "partially extended.",
+ vi->i_ino, (unsigned)
+ le32_to_cpu(ni->type));
+ *count = ll - pos;
+ }
+ } else {
+ err = ll;
+ read_lock_irqsave(&ni->size_lock, flags);
+ ll = ni->allocated_size;
+ read_unlock_irqrestore(&ni->size_lock, flags);
+ /* Perform a partial write if possible or fail. */
+ if (pos < ll) {
+ ntfs_debug("Truncating write to inode 0x%lx "
+ "attribute type 0x%x, because "
+ "extending the allocation "
+ "failed (error %d).",
+ vi->i_ino, (unsigned)
+ le32_to_cpu(ni->type),
+ (int)-err);
+ *count = ll - pos;
+ } else {
+ if (err != -ENOSPC)
+ ntfs_error(vi->i_sb, "Cannot perform "
+ "write to inode "
+ "0x%lx, attribute "
+ "type 0x%x, because "
+ "extending the "
+ "allocation failed "
+ "(error %ld).",
+ vi->i_ino, (unsigned)
+ le32_to_cpu(ni->type),
+ (long)-err);
+ else
+ ntfs_debug("Cannot perform write to "
+ "inode 0x%lx, "
+ "attribute type 0x%x, "
+ "because there is not "
+ "space left.",
+ vi->i_ino, (unsigned)
+ le32_to_cpu(ni->type));
+ goto out;
+ }
+ }
+ }
+ /*
+ * If the write starts beyond the initialized size, extend it up to the
+ * beginning of the write and initialize all non-sparse space between
+ * the old initialized size and the new one. This automatically also
+ * increments the vfs inode->i_size to keep it above or equal to the
+ * initialized_size.
+ */
+ read_lock_irqsave(&ni->size_lock, flags);
+ ll = ni->initialized_size;
+ read_unlock_irqrestore(&ni->size_lock, flags);
+ if (pos > ll) {
+ /*
+ * Wait for ongoing direct i/o to complete before proceeding.
+ * New direct i/o cannot start as we hold i_mutex.
+ */
+ inode_dio_wait(vi);
+ err = ntfs_attr_extend_initialized(ni, pos);
+ if (unlikely(err < 0))
+ ntfs_error(vi->i_sb, "Cannot perform write to inode "
+ "0x%lx, attribute type 0x%x, because "
+ "extending the initialized size "
+ "failed (error %d).", vi->i_ino,
+ (unsigned)le32_to_cpu(ni->type),
+ (int)-err);
+ }
+out:
+ return err;
}
/**
goto err_out;
}
}
- err = add_to_page_cache_lru(*cached_page, mapping, index,
- GFP_KERNEL);
+ err = add_to_page_cache_lru(*cached_page, mapping,
+ index, GFP_KERNEL);
if (unlikely(err)) {
if (err == -EEXIST)
continue;
return err;
}
-/*
- * Copy as much as we can into the pages and return the number of bytes which
- * were successfully copied. If a fault is encountered then clear the pages
- * out to (ofs + bytes) and return the number of bytes which were copied.
- */
-static inline size_t ntfs_copy_from_user(struct page **pages,
- unsigned nr_pages, unsigned ofs, const char __user *buf,
- size_t bytes)
-{
- struct page **last_page = pages + nr_pages;
- char *addr;
- size_t total = 0;
- unsigned len;
- int left;
-
- do {
- len = PAGE_CACHE_SIZE - ofs;
- if (len > bytes)
- len = bytes;
- addr = kmap_atomic(*pages);
- left = __copy_from_user_inatomic(addr + ofs, buf, len);
- kunmap_atomic(addr);
- if (unlikely(left)) {
- /* Do it the slow way. */
- addr = kmap(*pages);
- left = __copy_from_user(addr + ofs, buf, len);
- kunmap(*pages);
- if (unlikely(left))
- goto err_out;
- }
- total += len;
- bytes -= len;
- if (!bytes)
- break;
- buf += len;
- ofs = 0;
- } while (++pages < last_page);
-out:
- return total;
-err_out:
- total += len - left;
- /* Zero the rest of the target like __copy_from_user(). */
- while (++pages < last_page) {
- bytes -= len;
- if (!bytes)
- break;
- len = PAGE_CACHE_SIZE;
- if (len > bytes)
- len = bytes;
- zero_user(*pages, 0, len);
- }
- goto out;
-}
-
-static size_t __ntfs_copy_from_user_iovec_inatomic(char *vaddr,
- const struct iovec *iov, size_t iov_ofs, size_t bytes)
-{
- size_t total = 0;
-
- while (1) {
- const char __user *buf = iov->iov_base + iov_ofs;
- unsigned len;
- size_t left;
-
- len = iov->iov_len - iov_ofs;
- if (len > bytes)
- len = bytes;
- left = __copy_from_user_inatomic(vaddr, buf, len);
- total += len;
- bytes -= len;
- vaddr += len;
- if (unlikely(left)) {
- total -= left;
- break;
- }
- if (!bytes)
- break;
- iov++;
- iov_ofs = 0;
- }
- return total;
-}
-
-static inline void ntfs_set_next_iovec(const struct iovec **iovp,
- size_t *iov_ofsp, size_t bytes)
-{
- const struct iovec *iov = *iovp;
- size_t iov_ofs = *iov_ofsp;
-
- while (bytes) {
- unsigned len;
-
- len = iov->iov_len - iov_ofs;
- if (len > bytes)
- len = bytes;
- bytes -= len;
- iov_ofs += len;
- if (iov->iov_len == iov_ofs) {
- iov++;
- iov_ofs = 0;
- }
- }
- *iovp = iov;
- *iov_ofsp = iov_ofs;
-}
-
-/*
- * This has the same side-effects and return value as ntfs_copy_from_user().
- * The difference is that on a fault we need to memset the remainder of the
- * pages (out to offset + bytes), to emulate ntfs_copy_from_user()'s
- * single-segment behaviour.
- *
- * We call the same helper (__ntfs_copy_from_user_iovec_inatomic()) both when
- * atomic and when not atomic. This is ok because it calls
- * __copy_from_user_inatomic() and it is ok to call this when non-atomic. In
- * fact, the only difference between __copy_from_user_inatomic() and
- * __copy_from_user() is that the latter calls might_sleep() and the former
- * should not zero the tail of the buffer on error. And on many architectures
- * __copy_from_user_inatomic() is just defined to __copy_from_user() so it
- * makes no difference at all on those architectures.
- */
-static inline size_t ntfs_copy_from_user_iovec(struct page **pages,
- unsigned nr_pages, unsigned ofs, const struct iovec **iov,
- size_t *iov_ofs, size_t bytes)
-{
- struct page **last_page = pages + nr_pages;
- char *addr;
- size_t copied, len, total = 0;
-
- do {
- len = PAGE_CACHE_SIZE - ofs;
- if (len > bytes)
- len = bytes;
- addr = kmap_atomic(*pages);
- copied = __ntfs_copy_from_user_iovec_inatomic(addr + ofs,
- *iov, *iov_ofs, len);
- kunmap_atomic(addr);
- if (unlikely(copied != len)) {
- /* Do it the slow way. */
- addr = kmap(*pages);
- copied = __ntfs_copy_from_user_iovec_inatomic(addr +
- ofs, *iov, *iov_ofs, len);
- if (unlikely(copied != len))
- goto err_out;
- kunmap(*pages);
- }
- total += len;
- ntfs_set_next_iovec(iov, iov_ofs, len);
- bytes -= len;
- if (!bytes)
- break;
- ofs = 0;
- } while (++pages < last_page);
-out:
- return total;
-err_out:
- BUG_ON(copied > len);
- /* Zero the rest of the target like __copy_from_user(). */
- memset(addr + ofs + copied, 0, len - copied);
- kunmap(*pages);
- total += copied;
- ntfs_set_next_iovec(iov, iov_ofs, copied);
- while (++pages < last_page) {
- bytes -= len;
- if (!bytes)
- break;
- len = PAGE_CACHE_SIZE;
- if (len > bytes)
- len = bytes;
- zero_user(*pages, 0, len);
- }
- goto out;
-}
-
static inline void ntfs_flush_dcache_pages(struct page **pages,
unsigned nr_pages)
{
return err;
}
-static void ntfs_write_failed(struct address_space *mapping, loff_t to)
+/*
+ * Copy as much as we can into the pages and return the number of bytes which
+ * were successfully copied. If a fault is encountered then clear the pages
+ * out to (ofs + bytes) and return the number of bytes which were copied.
+ */
+static size_t ntfs_copy_from_user_iter(struct page **pages, unsigned nr_pages,
+ unsigned ofs, struct iov_iter *i, size_t bytes)
{
- struct inode *inode = mapping->host;
+ struct page **last_page = pages + nr_pages;
+ size_t total = 0;
+ struct iov_iter data = *i;
+ unsigned len, copied;
- if (to > inode->i_size) {
- truncate_pagecache(inode, inode->i_size);
- ntfs_truncate_vfs(inode);
- }
+ do {
+ len = PAGE_CACHE_SIZE - ofs;
+ if (len > bytes)
+ len = bytes;
+ copied = iov_iter_copy_from_user_atomic(*pages, &data, ofs,
+ len);
+ total += copied;
+ bytes -= copied;
+ if (!bytes)
+ break;
+ iov_iter_advance(&data, copied);
+ if (copied < len)
+ goto err;
+ ofs = 0;
+ } while (++pages < last_page);
+out:
+ return total;
+err:
+ /* Zero the rest of the target like __copy_from_user(). */
+ len = PAGE_CACHE_SIZE - copied;
+ do {
+ if (len > bytes)
+ len = bytes;
+ zero_user(*pages, copied, len);
+ bytes -= len;
+ copied = 0;
+ len = PAGE_CACHE_SIZE;
+ } while (++pages < last_page);
+ goto out;
}
/**
- * ntfs_file_buffered_write -
- *
- * Locking: The vfs is holding ->i_mutex on the inode.
+ * ntfs_perform_write - perform buffered write to a file
+ * @file: file to write to
+ * @i: iov_iter with data to write
+ * @pos: byte offset in file at which to begin writing to
*/
-static ssize_t ntfs_file_buffered_write(struct kiocb *iocb,
- const struct iovec *iov, unsigned long nr_segs,
- loff_t pos, loff_t *ppos, size_t count)
+static ssize_t ntfs_perform_write(struct file *file, struct iov_iter *i,
+ loff_t pos)
{
- struct file *file = iocb->ki_filp;
struct address_space *mapping = file->f_mapping;
struct inode *vi = mapping->host;
ntfs_inode *ni = NTFS_I(vi);
ntfs_volume *vol = ni->vol;
struct page *pages[NTFS_MAX_PAGES_PER_CLUSTER];
struct page *cached_page = NULL;
- char __user *buf = NULL;
- s64 end, ll;
VCN last_vcn;
LCN lcn;
- unsigned long flags;
- size_t bytes, iov_ofs = 0; /* Offset in the current iovec. */
- ssize_t status, written;
+ size_t bytes;
+ ssize_t status, written = 0;
unsigned nr_pages;
- int err;
- ntfs_debug("Entering for i_ino 0x%lx, attribute type 0x%x, "
- "pos 0x%llx, count 0x%lx.",
- vi->i_ino, (unsigned)le32_to_cpu(ni->type),
- (unsigned long long)pos, (unsigned long)count);
- if (unlikely(!count))
- return 0;
- BUG_ON(NInoMstProtected(ni));
- /*
- * If the attribute is not an index root and it is encrypted or
- * compressed, we cannot write to it yet. Note we need to check for
- * AT_INDEX_ALLOCATION since this is the type of both directory and
- * index inodes.
- */
- if (ni->type != AT_INDEX_ALLOCATION) {
- /* If file is encrypted, deny access, just like NT4. */
- if (NInoEncrypted(ni)) {
- /*
- * Reminder for later: Encrypted files are _always_
- * non-resident so that the content can always be
- * encrypted.
- */
- ntfs_debug("Denying write access to encrypted file.");
- return -EACCES;
- }
- if (NInoCompressed(ni)) {
- /* Only unnamed $DATA attribute can be compressed. */
- BUG_ON(ni->type != AT_DATA);
- BUG_ON(ni->name_len);
- /*
- * Reminder for later: If resident, the data is not
- * actually compressed. Only on the switch to non-
- * resident does compression kick in. This is in
- * contrast to encrypted files (see above).
- */
- ntfs_error(vi->i_sb, "Writing to compressed files is "
- "not implemented yet. Sorry.");
- return -EOPNOTSUPP;
- }
- }
+ ntfs_debug("Entering for i_ino 0x%lx, attribute type 0x%x, pos "
+ "0x%llx, count 0x%lx.", vi->i_ino,
+ (unsigned)le32_to_cpu(ni->type),
+ (unsigned long long)pos,
+ (unsigned long)iov_iter_count(i));
/*
* If a previous ntfs_truncate() failed, repeat it and abort if it
* fails again.
*/
if (unlikely(NInoTruncateFailed(ni))) {
+ int err;
+
inode_dio_wait(vi);
err = ntfs_truncate(vi);
if (err || NInoTruncateFailed(ni)) {
return err;
}
}
- /* The first byte after the write. */
- end = pos + count;
- /*
- * If the write goes beyond the allocated size, extend the allocation
- * to cover the whole of the write, rounded up to the nearest cluster.
- */
- read_lock_irqsave(&ni->size_lock, flags);
- ll = ni->allocated_size;
- read_unlock_irqrestore(&ni->size_lock, flags);
- if (end > ll) {
- /* Extend the allocation without changing the data size. */
- ll = ntfs_attr_extend_allocation(ni, end, -1, pos);
- if (likely(ll >= 0)) {
- BUG_ON(pos >= ll);
- /* If the extension was partial truncate the write. */
- if (end > ll) {
- ntfs_debug("Truncating write to inode 0x%lx, "
- "attribute type 0x%x, because "
- "the allocation was only "
- "partially extended.",
- vi->i_ino, (unsigned)
- le32_to_cpu(ni->type));
- end = ll;
- count = ll - pos;
- }
- } else {
- err = ll;
- read_lock_irqsave(&ni->size_lock, flags);
- ll = ni->allocated_size;
- read_unlock_irqrestore(&ni->size_lock, flags);
- /* Perform a partial write if possible or fail. */
- if (pos < ll) {
- ntfs_debug("Truncating write to inode 0x%lx, "
- "attribute type 0x%x, because "
- "extending the allocation "
- "failed (error code %i).",
- vi->i_ino, (unsigned)
- le32_to_cpu(ni->type), err);
- end = ll;
- count = ll - pos;
- } else {
- ntfs_error(vol->sb, "Cannot perform write to "
- "inode 0x%lx, attribute type "
- "0x%x, because extending the "
- "allocation failed (error "
- "code %i).", vi->i_ino,
- (unsigned)
- le32_to_cpu(ni->type), err);
- return err;
- }
- }
- }
- written = 0;
- /*
- * If the write starts beyond the initialized size, extend it up to the
- * beginning of the write and initialize all non-sparse space between
- * the old initialized size and the new one. This automatically also
- * increments the vfs inode->i_size to keep it above or equal to the
- * initialized_size.
- */
- read_lock_irqsave(&ni->size_lock, flags);
- ll = ni->initialized_size;
- read_unlock_irqrestore(&ni->size_lock, flags);
- if (pos > ll) {
- err = ntfs_attr_extend_initialized(ni, pos);
- if (err < 0) {
- ntfs_error(vol->sb, "Cannot perform write to inode "
- "0x%lx, attribute type 0x%x, because "
- "extending the initialized size "
- "failed (error code %i).", vi->i_ino,
- (unsigned)le32_to_cpu(ni->type), err);
- status = err;
- goto err_out;
- }
- }
/*
* Determine the number of pages per cluster for non-resident
* attributes.
nr_pages = 1;
if (vol->cluster_size > PAGE_CACHE_SIZE && NInoNonResident(ni))
nr_pages = vol->cluster_size >> PAGE_CACHE_SHIFT;
- /* Finally, perform the actual write. */
last_vcn = -1;
- if (likely(nr_segs == 1))
- buf = iov->iov_base;
do {
VCN vcn;
pgoff_t idx, start_idx;
vol->cluster_size_bits, false);
up_read(&ni->runlist.lock);
if (unlikely(lcn < LCN_HOLE)) {
- status = -EIO;
if (lcn == LCN_ENOMEM)
status = -ENOMEM;
- else
+ else {
+ status = -EIO;
ntfs_error(vol->sb, "Cannot "
"perform write to "
"inode 0x%lx, "
"is corrupt.",
vi->i_ino, (unsigned)
le32_to_cpu(ni->type));
+ }
break;
}
if (lcn == LCN_HOLE) {
}
}
}
- if (bytes > count)
- bytes = count;
+ if (bytes > iov_iter_count(i))
+ bytes = iov_iter_count(i);
+again:
/*
* Bring in the user page(s) that we will copy from _first_.
* Otherwise there is a nasty deadlock on copying from the same
* pages being swapped out between us bringing them into memory
* and doing the actual copying.
*/
- if (likely(nr_segs == 1))
- ntfs_fault_in_pages_readable(buf, bytes);
- else
- ntfs_fault_in_pages_readable_iovec(iov, iov_ofs, bytes);
+ if (unlikely(iov_iter_fault_in_multipages_readable(i, bytes))) {
+ status = -EFAULT;
+ break;
+ }
/* Get and lock @do_pages starting at index @start_idx. */
status = __ntfs_grab_cache_pages(mapping, start_idx, do_pages,
pages, &cached_page);
status = ntfs_prepare_pages_for_non_resident_write(
pages, do_pages, pos, bytes);
if (unlikely(status)) {
- loff_t i_size;
-
do {
unlock_page(pages[--do_pages]);
page_cache_release(pages[do_pages]);
} while (do_pages);
- /*
- * The write preparation may have instantiated
- * allocated space outside i_size. Trim this
- * off again. We can ignore any errors in this
- * case as we will just be waisting a bit of
- * allocated space, which is not a disaster.
- */
- i_size = i_size_read(vi);
- if (pos + bytes > i_size) {
- ntfs_write_failed(mapping, pos + bytes);
- }
break;
}
}
u = (pos >> PAGE_CACHE_SHIFT) - pages[0]->index;
- if (likely(nr_segs == 1)) {
- copied = ntfs_copy_from_user(pages + u, do_pages - u,
- ofs, buf, bytes);
- buf += copied;
- } else
- copied = ntfs_copy_from_user_iovec(pages + u,
- do_pages - u, ofs, &iov, &iov_ofs,
- bytes);
+ copied = ntfs_copy_from_user_iter(pages + u, do_pages - u, ofs,
+ i, bytes);
ntfs_flush_dcache_pages(pages + u, do_pages - u);
- status = ntfs_commit_pages_after_write(pages, do_pages, pos,
- bytes);
- if (likely(!status)) {
- written += copied;
- count -= copied;
- pos += copied;
- if (unlikely(copied != bytes))
- status = -EFAULT;
+ status = 0;
+ if (likely(copied == bytes)) {
+ status = ntfs_commit_pages_after_write(pages, do_pages,
+ pos, bytes);
+ if (!status)
+ status = bytes;
}
do {
unlock_page(pages[--do_pages]);
page_cache_release(pages[do_pages]);
} while (do_pages);
- if (unlikely(status))
+ if (unlikely(status < 0))
break;
- balance_dirty_pages_ratelimited(mapping);
+ copied = status;
cond_resched();
- } while (count);
-err_out:
- *ppos = pos;
+ if (unlikely(!copied)) {
+ size_t sc;
+
+ /*
+ * We failed to copy anything. Fall back to single
+ * segment length write.
+ *
+ * This is needed to avoid possible livelock in the
+ * case that all segments in the iov cannot be copied
+ * at once without a pagefault.
+ */
+ sc = iov_iter_single_seg_count(i);
+ if (bytes > sc)
+ bytes = sc;
+ goto again;
+ }
+ iov_iter_advance(i, copied);
+ pos += copied;
+ written += copied;
+ balance_dirty_pages_ratelimited(mapping);
+ if (fatal_signal_pending(current)) {
+ status = -EINTR;
+ break;
+ }
+ } while (iov_iter_count(i));
if (cached_page)
page_cache_release(cached_page);
ntfs_debug("Done. Returning %s (written 0x%lx, status %li).",
}
/**
- * ntfs_file_aio_write_nolock -
+ * ntfs_file_write_iter_nolock - write data to a file
+ * @iocb: IO state structure (file, offset, etc.)
+ * @from: iov_iter with data to write
+ *
+ * Basically the same as __generic_file_write_iter() except that it ends
+ * up calling ntfs_perform_write() instead of generic_perform_write() and that
+ * O_DIRECT is not implemented.
*/
-static ssize_t ntfs_file_aio_write_nolock(struct kiocb *iocb,
- const struct iovec *iov, unsigned long nr_segs, loff_t *ppos)
+static ssize_t ntfs_file_write_iter_nolock(struct kiocb *iocb,
+ struct iov_iter *from)
{
struct file *file = iocb->ki_filp;
- struct address_space *mapping = file->f_mapping;
- struct inode *inode = mapping->host;
- loff_t pos;
- size_t count; /* after file limit checks */
- ssize_t written, err;
+ loff_t pos = iocb->ki_pos;
+ ssize_t written = 0;
+ ssize_t err;
+ size_t count = iov_iter_count(from);
- count = iov_length(iov, nr_segs);
- pos = *ppos;
- /* We can write back this queue in page reclaim. */
- current->backing_dev_info = inode_to_bdi(inode);
- written = 0;
- err = generic_write_checks(file, &pos, &count, S_ISBLK(inode->i_mode));
- if (err)
- goto out;
- if (!count)
- goto out;
- err = file_remove_suid(file);
- if (err)
- goto out;
- err = file_update_time(file);
- if (err)
- goto out;
- written = ntfs_file_buffered_write(iocb, iov, nr_segs, pos, ppos,
- count);
-out:
+ err = ntfs_prepare_file_for_write(file, &pos, &count);
+ if (count && !err) {
+ iov_iter_truncate(from, count);
+ written = ntfs_perform_write(file, from, pos);
+ if (likely(written >= 0))
+ iocb->ki_pos = pos + written;
+ }
current->backing_dev_info = NULL;
return written ? written : err;
}
/**
- * ntfs_file_aio_write -
+ * ntfs_file_write_iter - simple wrapper for ntfs_file_write_iter_nolock()
+ * @iocb: IO state structure
+ * @from: iov_iter with data to write
+ *
+ * Basically the same as generic_file_write_iter() except that it ends up
+ * calling ntfs_file_write_iter_nolock() instead of
+ * __generic_file_write_iter().
*/
-static ssize_t ntfs_file_aio_write(struct kiocb *iocb, const struct iovec *iov,
- unsigned long nr_segs, loff_t pos)
+static ssize_t ntfs_file_write_iter(struct kiocb *iocb, struct iov_iter *from)
{
struct file *file = iocb->ki_filp;
- struct address_space *mapping = file->f_mapping;
- struct inode *inode = mapping->host;
+ struct inode *vi = file_inode(file);
ssize_t ret;
- BUG_ON(iocb->ki_pos != pos);
-
- mutex_lock(&inode->i_mutex);
- ret = ntfs_file_aio_write_nolock(iocb, iov, nr_segs, &iocb->ki_pos);
- mutex_unlock(&inode->i_mutex);
+ mutex_lock(&vi->i_mutex);
+ ret = ntfs_file_write_iter_nolock(iocb, from);
+ mutex_unlock(&vi->i_mutex);
if (ret > 0) {
- int err = generic_write_sync(file, iocb->ki_pos - ret, ret);
+ ssize_t err;
+
+ err = generic_write_sync(file, iocb->ki_pos - ret, ret);
if (err < 0)
ret = err;
}
#endif /* NTFS_RW */
const struct file_operations ntfs_file_ops = {
- .llseek = generic_file_llseek, /* Seek inside file. */
- .read = new_sync_read, /* Read from file. */
- .read_iter = generic_file_read_iter, /* Async read from file. */
+ .llseek = generic_file_llseek,
+ .read = new_sync_read,
+ .read_iter = generic_file_read_iter,
#ifdef NTFS_RW
- .write = do_sync_write, /* Write to file. */
- .aio_write = ntfs_file_aio_write, /* Async write to file. */
- /*.release = ,*/ /* Last file is closed. See
- fs/ext2/file.c::
- ext2_release_file() for
- how to use this to discard
- preallocated space for
- write opened files. */
- .fsync = ntfs_file_fsync, /* Sync a file to disk. */
- /*.aio_fsync = ,*/ /* Sync all outstanding async
- i/o operations on a
- kiocb. */
+ .write = new_sync_write,
+ .write_iter = ntfs_file_write_iter,
+ .fsync = ntfs_file_fsync,
#endif /* NTFS_RW */
- /*.ioctl = ,*/ /* Perform function on the
- mounted filesystem. */
- .mmap = generic_file_mmap, /* Mmap file. */
- .open = ntfs_file_open, /* Open file. */
- .splice_read = generic_file_splice_read /* Zero-copy data send with
- the data source being on
- the ntfs partition. We do
- not need to care about the
- data destination. */
- /*.sendpage = ,*/ /* Zero-copy data send with
- the data destination being
- on the ntfs partition. We
- do not need to care about
- the data source. */
+ .mmap = generic_file_mmap,
+ .open = ntfs_file_open,
+ .splice_read = generic_file_splice_read,
};
const struct inode_operations ntfs_file_inode_ops = {
#include <linux/quotaops.h>
#include <linux/slab.h>
#include <linux/log2.h>
-#include <linux/aio.h>
#include "aops.h"
#include "attrib.h"
ret = ocfs2_get_right_path(et, left_path, &right_path);
if (ret) {
mlog_errno(ret);
- goto out;
+ return ret;
}
right_el = path_leaf_el(right_path);
subtree_index);
}
out:
- if (right_path)
- ocfs2_free_path(right_path);
+ ocfs2_free_path(right_path);
return ret;
}
ret = ocfs2_get_left_path(et, right_path, &left_path);
if (ret) {
mlog_errno(ret);
- goto out;
+ return ret;
}
left_el = path_leaf_el(left_path);
right_path, subtree_index);
}
out:
- if (left_path)
- ocfs2_free_path(left_path);
+ ocfs2_free_path(left_path);
return ret;
}
} else if (path->p_tree_depth > 0) {
status = ocfs2_find_cpos_for_left_leaf(sb, path, &left_cpos);
if (status)
- goto out;
+ goto exit;
if (left_cpos != 0) {
left_path = ocfs2_new_path_from_path(path);
if (!left_path)
- goto out;
+ goto exit;
status = ocfs2_find_path(et->et_ci, left_path,
left_cpos);
if (status)
- goto out;
+ goto free_left_path;
new_el = path_leaf_el(left_path);
le16_to_cpu(new_el->l_next_free_rec),
le16_to_cpu(new_el->l_count));
status = -EINVAL;
- goto out;
+ goto free_left_path;
}
rec = &new_el->l_recs[
le16_to_cpu(new_el->l_next_free_rec) - 1];
path->p_tree_depth > 0) {
status = ocfs2_find_cpos_for_right_leaf(sb, path, &right_cpos);
if (status)
- goto out;
+ goto free_left_path;
if (right_cpos == 0)
- goto out;
+ goto free_left_path;
right_path = ocfs2_new_path_from_path(path);
if (!right_path)
- goto out;
+ goto free_left_path;
status = ocfs2_find_path(et->et_ci, right_path, right_cpos);
if (status)
- goto out;
+ goto free_right_path;
new_el = path_leaf_el(right_path);
rec = &new_el->l_recs[0];
(unsigned long long)le64_to_cpu(eb->h_blkno),
le16_to_cpu(new_el->l_next_free_rec));
status = -EINVAL;
- goto out;
+ goto free_right_path;
}
rec = &new_el->l_recs[1];
}
ret = contig_type;
}
-out:
- if (left_path)
- ocfs2_free_path(left_path);
- if (right_path)
- ocfs2_free_path(right_path);
-
+free_right_path:
+ ocfs2_free_path(right_path);
+free_left_path:
+ ocfs2_free_path(left_path);
+exit:
return ret;
}
if (pages == NULL) {
ret = -ENOMEM;
mlog_errno(ret);
- goto out;
+ return ret;
}
ret = ocfs2_reserve_clusters(osb, 1, &data_ac);
if (ret) {
mlog_errno(ret);
- goto out;
+ goto free_pages;
}
}
out:
if (data_ac)
ocfs2_free_alloc_context(data_ac);
- if (pages)
- kfree(pages);
-
+free_pages:
+ kfree(pages);
return ret;
}
#include <linux/mpage.h>
#include <linux/quotaops.h>
#include <linux/blkdev.h>
+#include <linux/uio.h>
#include <cluster/masklog.h>
return 0;
}
+static int ocfs2_direct_IO_zero_extend(struct ocfs2_super *osb,
+ struct inode *inode, loff_t offset,
+ u64 zero_len, int cluster_align)
+{
+ u32 p_cpos = 0;
+ u32 v_cpos = ocfs2_bytes_to_clusters(osb->sb, i_size_read(inode));
+ unsigned int num_clusters = 0;
+ unsigned int ext_flags = 0;
+ int ret = 0;
+
+ if (offset <= i_size_read(inode) || cluster_align)
+ return 0;
+
+ ret = ocfs2_get_clusters(inode, v_cpos, &p_cpos, &num_clusters,
+ &ext_flags);
+ if (ret < 0) {
+ mlog_errno(ret);
+ return ret;
+ }
+
+ if (p_cpos && !(ext_flags & OCFS2_EXT_UNWRITTEN)) {
+ u64 s = i_size_read(inode);
+ sector_t sector = (p_cpos << (osb->s_clustersize_bits - 9)) +
+ (do_div(s, osb->s_clustersize) >> 9);
+
+ ret = blkdev_issue_zeroout(osb->sb->s_bdev, sector,
+ zero_len >> 9, GFP_NOFS, false);
+ if (ret < 0)
+ mlog_errno(ret);
+ }
+
+ return ret;
+}
+
+static int ocfs2_direct_IO_extend_no_holes(struct ocfs2_super *osb,
+ struct inode *inode, loff_t offset)
+{
+ u64 zero_start, zero_len, total_zero_len;
+ u32 p_cpos = 0, clusters_to_add;
+ u32 v_cpos = ocfs2_bytes_to_clusters(osb->sb, i_size_read(inode));
+ unsigned int num_clusters = 0;
+ unsigned int ext_flags = 0;
+ u32 size_div, offset_div;
+ int ret = 0;
+
+ {
+ u64 o = offset;
+ u64 s = i_size_read(inode);
+
+ offset_div = do_div(o, osb->s_clustersize);
+ size_div = do_div(s, osb->s_clustersize);
+ }
+
+ if (offset <= i_size_read(inode))
+ return 0;
+
+ clusters_to_add = ocfs2_bytes_to_clusters(inode->i_sb, offset) -
+ ocfs2_bytes_to_clusters(inode->i_sb, i_size_read(inode));
+ total_zero_len = offset - i_size_read(inode);
+ if (clusters_to_add)
+ total_zero_len -= offset_div;
+
+ /* Allocate clusters to fill out holes, and this is only needed
+ * when we add more than one clusters. Otherwise the cluster will
+ * be allocated during direct IO */
+ if (clusters_to_add > 1) {
+ ret = ocfs2_extend_allocation(inode,
+ OCFS2_I(inode)->ip_clusters,
+ clusters_to_add - 1, 0);
+ if (ret) {
+ mlog_errno(ret);
+ goto out;
+ }
+ }
+
+ while (total_zero_len) {
+ ret = ocfs2_get_clusters(inode, v_cpos, &p_cpos, &num_clusters,
+ &ext_flags);
+ if (ret < 0) {
+ mlog_errno(ret);
+ goto out;
+ }
+
+ zero_start = ocfs2_clusters_to_bytes(osb->sb, p_cpos) +
+ size_div;
+ zero_len = ocfs2_clusters_to_bytes(osb->sb, num_clusters) -
+ size_div;
+ zero_len = min(total_zero_len, zero_len);
+
+ if (p_cpos && !(ext_flags & OCFS2_EXT_UNWRITTEN)) {
+ ret = blkdev_issue_zeroout(osb->sb->s_bdev,
+ zero_start >> 9, zero_len >> 9,
+ GFP_NOFS, false);
+ if (ret < 0) {
+ mlog_errno(ret);
+ goto out;
+ }
+ }
+
+ total_zero_len -= zero_len;
+ v_cpos += ocfs2_bytes_to_clusters(osb->sb, zero_len + size_div);
+
+ /* Only at first iteration can be cluster not aligned.
+ * So set size_div to 0 for the rest */
+ size_div = 0;
+ }
+
+out:
+ return ret;
+}
+
static ssize_t ocfs2_direct_IO_write(struct kiocb *iocb,
struct iov_iter *iter,
loff_t offset)
struct buffer_head *di_bh = NULL;
size_t count = iter->count;
journal_t *journal = osb->journal->j_journal;
- u32 zero_len;
- int cluster_align;
+ u64 zero_len_head, zero_len_tail;
+ int cluster_align_head, cluster_align_tail;
loff_t final_size = offset + count;
int append_write = offset >= i_size_read(inode) ? 1 : 0;
unsigned int num_clusters = 0;
{
u64 o = offset;
+ u64 s = i_size_read(inode);
+
+ zero_len_head = do_div(o, 1 << osb->s_clustersize_bits);
+ cluster_align_head = !zero_len_head;
- zero_len = do_div(o, 1 << osb->s_clustersize_bits);
- cluster_align = !zero_len;
+ zero_len_tail = osb->s_clustersize -
+ do_div(s, osb->s_clustersize);
+ if ((offset - i_size_read(inode)) < zero_len_tail)
+ zero_len_tail = offset - i_size_read(inode);
+ cluster_align_tail = !zero_len_tail;
}
/*
}
if (append_write) {
- ret = ocfs2_inode_lock(inode, &di_bh, 1);
+ ret = ocfs2_inode_lock(inode, NULL, 1);
if (ret < 0) {
mlog_errno(ret);
goto clean_orphan;
}
+ /* zeroing out the previously allocated cluster tail
+ * that but not zeroed */
if (ocfs2_sparse_alloc(OCFS2_SB(inode->i_sb)))
- ret = ocfs2_zero_extend(inode, di_bh, offset);
+ ret = ocfs2_direct_IO_zero_extend(osb, inode, offset,
+ zero_len_tail, cluster_align_tail);
else
- ret = ocfs2_extend_no_holes(inode, di_bh, offset,
+ ret = ocfs2_direct_IO_extend_no_holes(osb, inode,
offset);
if (ret < 0) {
mlog_errno(ret);
ocfs2_inode_unlock(inode, 1);
- brelse(di_bh);
goto clean_orphan;
}
if (is_overwrite < 0) {
mlog_errno(is_overwrite);
ocfs2_inode_unlock(inode, 1);
- brelse(di_bh);
goto clean_orphan;
}
ocfs2_inode_unlock(inode, 1);
- brelse(di_bh);
- di_bh = NULL;
}
written = __blockdev_direct_IO(WRITE, iocb, inode, inode->i_sb->s_bdev,
if (ret < 0)
mlog_errno(ret);
}
- } else if (written < 0 && append_write && !is_overwrite &&
- !cluster_align) {
+ } else if (written > 0 && append_write && !is_overwrite &&
+ !cluster_align_head) {
+ /* zeroing out the allocated cluster head */
u32 p_cpos = 0;
u32 v_cpos = ocfs2_bytes_to_clusters(osb->sb, offset);
+ ret = ocfs2_inode_lock(inode, NULL, 0);
+ if (ret < 0) {
+ mlog_errno(ret);
+ goto clean_orphan;
+ }
+
ret = ocfs2_get_clusters(inode, v_cpos, &p_cpos,
&num_clusters, &ext_flags);
if (ret < 0) {
mlog_errno(ret);
+ ocfs2_inode_unlock(inode, 0);
goto clean_orphan;
}
ret = blkdev_issue_zeroout(osb->sb->s_bdev,
p_cpos << (osb->s_clustersize_bits - 9),
- zero_len >> 9, GFP_KERNEL, false);
+ zero_len_head >> 9, GFP_NOFS, false);
if (ret < 0)
mlog_errno(ret);
+
+ ocfs2_inode_unlock(inode, 0);
}
clean_orphan:
#ifndef OCFS2_AOPS_H
#define OCFS2_AOPS_H
-#include <linux/aio.h>
+#include <linux/fs.h>
handle_t *ocfs2_start_walk_page_trans(struct inode *inode,
struct page *page,
int ret = -ENOMEM;
o2hb_debug_dir = debugfs_create_dir(O2HB_DEBUG_DIR, NULL);
- if (!o2hb_debug_dir) {
+ if (IS_ERR_OR_NULL(o2hb_debug_dir)) {
+ ret = o2hb_debug_dir ?
+ PTR_ERR(o2hb_debug_dir) : -ENOMEM;
mlog_errno(ret);
goto bail;
}
sizeof(o2hb_live_node_bitmap),
O2NM_MAX_NODES,
o2hb_live_node_bitmap);
- if (!o2hb_debug_livenodes) {
+ if (IS_ERR_OR_NULL(o2hb_debug_livenodes)) {
+ ret = o2hb_debug_livenodes ?
+ PTR_ERR(o2hb_debug_livenodes) : -ENOMEM;
mlog_errno(ret);
goto bail;
}
sizeof(o2hb_live_region_bitmap),
O2NM_MAX_REGIONS,
o2hb_live_region_bitmap);
- if (!o2hb_debug_liveregions) {
+ if (IS_ERR_OR_NULL(o2hb_debug_liveregions)) {
+ ret = o2hb_debug_liveregions ?
+ PTR_ERR(o2hb_debug_liveregions) : -ENOMEM;
mlog_errno(ret);
goto bail;
}
sizeof(o2hb_quorum_region_bitmap),
O2NM_MAX_REGIONS,
o2hb_quorum_region_bitmap);
- if (!o2hb_debug_quorumregions) {
+ if (IS_ERR_OR_NULL(o2hb_debug_quorumregions)) {
+ ret = o2hb_debug_quorumregions ?
+ PTR_ERR(o2hb_debug_quorumregions) : -ENOMEM;
mlog_errno(ret);
goto bail;
}
sizeof(o2hb_failed_region_bitmap),
O2NM_MAX_REGIONS,
o2hb_failed_region_bitmap);
- if (!o2hb_debug_failedregions) {
+ if (IS_ERR_OR_NULL(o2hb_debug_failedregions)) {
+ ret = o2hb_debug_failedregions ?
+ PTR_ERR(o2hb_debug_failedregions) : -ENOMEM;
mlog_errno(ret);
goto bail;
}
reg->hr_debug_dir =
debugfs_create_dir(config_item_name(®->hr_item), dir);
- if (!reg->hr_debug_dir) {
+ if (IS_ERR_OR_NULL(reg->hr_debug_dir)) {
+ ret = reg->hr_debug_dir ? PTR_ERR(reg->hr_debug_dir) : -ENOMEM;
mlog_errno(ret);
goto bail;
}
O2HB_DB_TYPE_REGION_LIVENODES,
sizeof(reg->hr_live_node_bitmap),
O2NM_MAX_NODES, reg);
- if (!reg->hr_debug_livenodes) {
+ if (IS_ERR_OR_NULL(reg->hr_debug_livenodes)) {
+ ret = reg->hr_debug_livenodes ?
+ PTR_ERR(reg->hr_debug_livenodes) : -ENOMEM;
mlog_errno(ret);
goto bail;
}
sizeof(*(reg->hr_db_regnum)),
O2HB_DB_TYPE_REGION_NUMBER,
0, O2NM_MAX_NODES, reg);
- if (!reg->hr_debug_regnum) {
+ if (IS_ERR_OR_NULL(reg->hr_debug_regnum)) {
+ ret = reg->hr_debug_regnum ?
+ PTR_ERR(reg->hr_debug_regnum) : -ENOMEM;
mlog_errno(ret);
goto bail;
}
sizeof(*(reg->hr_db_elapsed_time)),
O2HB_DB_TYPE_REGION_ELAPSED_TIME,
0, 0, reg);
- if (!reg->hr_debug_elapsed_time) {
+ if (IS_ERR_OR_NULL(reg->hr_debug_elapsed_time)) {
+ ret = reg->hr_debug_elapsed_time ?
+ PTR_ERR(reg->hr_debug_elapsed_time) : -ENOMEM;
mlog_errno(ret);
goto bail;
}
sizeof(*(reg->hr_db_pinned)),
O2HB_DB_TYPE_REGION_PINNED,
0, 0, reg);
- if (!reg->hr_debug_pinned) {
+ if (IS_ERR_OR_NULL(reg->hr_debug_pinned)) {
+ ret = reg->hr_debug_pinned ?
+ PTR_ERR(reg->hr_debug_pinned) : -ENOMEM;
mlog_errno(ret);
goto bail;
}
- ret = 0;
+ return 0;
bail:
+ debugfs_remove_recursive(reg->hr_debug_dir);
return ret;
}
} \
} while (0)
-#define mlog_errno(st) do { \
+#define mlog_errno(st) ({ \
int _st = (st); \
if (_st != -ERESTARTSYS && _st != -EINTR && \
_st != AOP_TRUNCATED_PAGE && _st != -ENOSPC && \
_st != -EDQUOT) \
mlog(ML_ERROR, "status = %lld\n", (long long)_st); \
-} while (0)
+ _st; \
+})
#define mlog_bug_on_msg(cond, fmt, args...) do { \
if (cond) { \
*
* linux/fs/minix/dir.c
*
- * Copyright (C) 1991, 1992 Linux Torvalds
+ * Copyright (C) 1991, 1992 Linus Torvalds
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public
const char *name,
int namelen)
{
- int ret;
+ int ret = 0;
struct ocfs2_dir_lookup_result lookup = { NULL, };
trace_ocfs2_check_dir_for_entry(
(unsigned long long)OCFS2_I(dir)->ip_blkno, namelen, name);
- ret = -EEXIST;
- if (ocfs2_find_entry(name, namelen, dir, &lookup) == 0)
- goto bail;
+ if (ocfs2_find_entry(name, namelen, dir, &lookup) == 0) {
+ ret = -EEXIST;
+ mlog_errno(ret);
+ }
- ret = 0;
-bail:
ocfs2_free_dir_lookup_result(&lookup);
- if (ret)
- mlog_errno(ret);
return ret;
}
int noqueue_attempted = 0;
int dlm_locked = 0;
+ if (!(lockres->l_flags & OCFS2_LOCK_INITIALIZED)) {
+ mlog_errno(-EINVAL);
+ return -EINVAL;
+ }
+
ocfs2_init_mask_waiter(&mw);
if (lockres->l_ops->flags & LOCK_TYPE_USES_LVB)
osb->osb_debug_root,
osb,
&ocfs2_dlm_debug_fops);
- if (!dlm_debug->d_locking_state) {
+ if (IS_ERR_OR_NULL(dlm_debug->d_locking_state)) {
ret = -EINVAL;
mlog(ML_ERROR,
"Unable to create locking state debugfs file.\n");
}
status = ocfs2_test_inode_bit(osb, blkno, &set);
- trace_ocfs2_get_dentry_test_bit(status, set);
if (status < 0) {
if (status == -EINVAL) {
/*
goto unlock_nfs_sync;
}
+ trace_ocfs2_get_dentry_test_bit(status, set);
/* If the inode allocator bit is clear, this inode must be stale */
if (!set) {
status = -ESTALE;
file->f_path.dentry->d_name.name,
(unsigned int)from->nr_segs); /* GRRRRR */
- if (iocb->ki_nbytes == 0)
+ if (count == 0)
return 0;
appending = file->f_flags & O_APPEND ? 1 : 0;
}
can_do_direct = direct_io;
- ret = ocfs2_prepare_inode_for_write(file, ppos,
- iocb->ki_nbytes, appending,
+ ret = ocfs2_prepare_inode_for_write(file, ppos, count, appending,
&can_do_direct, &has_refcount);
if (ret < 0) {
mlog_errno(ret);
}
if (direct_io && !is_sync_kiocb(iocb))
- unaligned_dio = ocfs2_is_io_unaligned(inode, iocb->ki_nbytes,
- *ppos);
+ unaligned_dio = ocfs2_is_io_unaligned(inode, count, *ppos);
/*
* We can't complete the direct I/O as requested, fall back to
/*
* for completing the rest of the request.
*/
- *ppos += written;
count -= written;
written_buffered = generic_perform_write(file, from, *ppos);
/*
goto out_dio;
}
- iocb->ki_pos = *ppos + written_buffered;
/* We need to ensure that the page cache pages are written to
* disk and invalidated to preserve the expected O_DIRECT
* semantics.
ret = filemap_write_and_wait_range(file->f_mapping, *ppos,
endbyte);
if (ret == 0) {
+ iocb->ki_pos = *ppos + written_buffered;
written += written_buffered;
invalidate_mapping_pages(mapping,
*ppos >> PAGE_CACHE_SHIFT,
/* buffered aio wouldn't have proper lock coverage today */
BUG_ON(ret == -EIOCBQUEUED && !(file->f_flags & O_DIRECT));
+ if (unlikely(written <= 0))
+ goto no_sync;
+
if (((file->f_flags & O_DSYNC) && !direct_io) || IS_SYNC(inode) ||
((file->f_flags & O_DIRECT) && !direct_io)) {
- ret = filemap_fdatawrite_range(file->f_mapping, *ppos,
- *ppos + count - 1);
+ ret = filemap_fdatawrite_range(file->f_mapping,
+ iocb->ki_pos - written,
+ iocb->ki_pos - 1);
if (ret < 0)
written = ret;
}
if (!ret)
- ret = filemap_fdatawait_range(file->f_mapping, *ppos,
- *ppos + count - 1);
+ ret = filemap_fdatawait_range(file->f_mapping,
+ iocb->ki_pos - written,
+ iocb->ki_pos - 1);
}
+no_sync:
/*
* deep in g_f_a_w_n()->ocfs2_direct_IO we pass in a ocfs2_dio_end_io
* function pointer which is called when o_direct io completes so that
ocfs2_get_system_file_inode(osb, INODE_ALLOC_SYSTEM_INODE,
le16_to_cpu(di->i_suballoc_slot));
if (!inode_alloc_inode) {
- status = -EEXIST;
+ status = -ENOENT;
mlog_errno(status);
goto bail;
}
ORPHAN_DIR_SYSTEM_INODE,
orphaned_slot);
if (!orphan_dir_inode) {
- status = -EEXIST;
+ status = -ENOENT;
mlog_errno(status);
goto bail;
}
if (le32_to_cpu(alloc->id1.bitmap1.i_used) !=
ocfs2_local_alloc_count_bits(alloc)) {
ocfs2_error(osb->sb, "local alloc inode %llu says it has "
- "%u free bits, but a count shows %u",
+ "%u used bits, but a count shows %u",
(unsigned long long)le64_to_cpu(alloc->i_blkno),
le32_to_cpu(alloc->id1.bitmap1.i_used),
ocfs2_local_alloc_count_bits(alloc));
u32 *numbits,
struct ocfs2_alloc_reservation *resv)
{
- int numfound, bitoff, left, startoff, lastzero;
+ int numfound = 0, bitoff, left, startoff, lastzero;
int local_resv = 0;
struct ocfs2_alloc_reservation r;
void *bitmap = NULL;
trace_ocfs2_orphan_del(
(unsigned long long)OCFS2_I(orphan_dir_inode)->ip_blkno,
- name, namelen);
+ name, strlen(name));
/* find it's spot in the orphan directory */
- status = ocfs2_find_entry(name, namelen, orphan_dir_inode,
+ status = ocfs2_find_entry(name, strlen(name), orphan_dir_inode,
&lookup);
if (status) {
mlog_errno(status);
ORPHAN_DIR_SYSTEM_INODE,
osb->slot_num);
if (!orphan_dir_inode) {
- status = -EEXIST;
+ status = -ENOENT;
mlog_errno(status);
goto leave;
}
error = posix_acl_create(dir, &mode, &default_acl, &acl);
if (error) {
mlog_errno(error);
- goto out;
+ return error;
}
error = ocfs2_create_inode_in_orphan(dir, mode,
if (!si) {
status = -ENOMEM;
mlog_errno(status);
- goto bail;
+ return status;
}
si->si_extended = ocfs2_uses_extended_slot_map(osb);
osb->slot_info = (struct ocfs2_slot_info *)si;
bail:
- if (status < 0 && si)
+ if (status < 0)
__ocfs2_free_slot_info(si);
return status;
set_bit(node_num, netmap);
if (!memcmp(hbmap, netmap, sizeof(hbmap)))
return 0;
- if (i < O2CB_MAP_STABILIZE_COUNT)
+ if (i < O2CB_MAP_STABILIZE_COUNT - 1)
msleep(1000);
}
BUG_ON(conn == NULL);
lc = kzalloc(sizeof(struct ocfs2_live_connection), GFP_KERNEL);
- if (!lc) {
- rc = -ENOMEM;
- goto out;
- }
+ if (!lc)
+ return -ENOMEM;
init_waitqueue_head(&lc->oc_wait);
init_completion(&lc->oc_sync_wait);
}
out:
- if (rc && lc)
+ if (rc)
kfree(lc);
return rc;
}
alloc_bh, OCFS2_JOURNAL_ACCESS_WRITE);
if (status < 0) {
mlog_errno(status);
+ ocfs2_block_group_set_bits(handle, alloc_inode, group, group_bh,
+ start_bit, count);
goto bail;
}
osb->osb_debug_root = debugfs_create_dir(osb->uuid_str,
ocfs2_debugfs_root);
- if (!osb->osb_debug_root) {
+ if (IS_ERR_OR_NULL(osb->osb_debug_root)) {
status = -EINVAL;
mlog(ML_ERROR, "Unable to create per-mount debugfs root.\n");
goto read_super_error;
osb->osb_debug_root,
osb,
&ocfs2_osb_debug_fops);
- if (!osb->osb_ctxt) {
+ if (IS_ERR_OR_NULL(osb->osb_ctxt)) {
status = -EINVAL;
mlog_errno(status);
goto read_super_error;
}
ocfs2_debugfs_root = debugfs_create_dir("ocfs2", NULL);
- if (!ocfs2_debugfs_root) {
- status = -ENOMEM;
+ if (IS_ERR_OR_NULL(ocfs2_debugfs_root)) {
+ status = ocfs2_debugfs_root ?
+ PTR_ERR(ocfs2_debugfs_root) : -ENOMEM;
mlog(ML_ERROR, "Unable to create ocfs2 debugfs root.\n");
goto out4;
}
cbits = le32_to_cpu(di->id2.i_super.s_clustersize_bits);
bbits = le32_to_cpu(di->id2.i_super.s_blocksize_bits);
sb->s_maxbytes = ocfs2_max_file_offset(bbits, cbits);
+ memcpy(sb->s_uuid, di->id2.i_super.s_uuid,
+ sizeof(di->id2.i_super.s_uuid));
osb->osb_dx_mask = (1 << (cbits - bbits)) - 1;
mlog_errno(status);
goto bail;
}
- cleancache_init_shared_fs((char *)&di->id2.i_super.s_uuid, sb);
+ cleancache_init_shared_fs(sb);
bail:
return status;
ocfs2_set_ro_flag(osb, 0);
}
-static char error_buf[1024];
-
-void __ocfs2_error(struct super_block *sb,
- const char *function,
- const char *fmt, ...)
+void __ocfs2_error(struct super_block *sb, const char *function,
+ const char *fmt, ...)
{
+ struct va_format vaf;
va_list args;
va_start(args, fmt);
- vsnprintf(error_buf, sizeof(error_buf), fmt, args);
- va_end(args);
+ vaf.fmt = fmt;
+ vaf.va = &args;
/* Not using mlog here because we want to show the actual
* function the error came from. */
- printk(KERN_CRIT "OCFS2: ERROR (device %s): %s: %s\n",
- sb->s_id, function, error_buf);
+ printk(KERN_CRIT "OCFS2: ERROR (device %s): %s: %pV\n",
+ sb->s_id, function, &vaf);
+
+ va_end(args);
ocfs2_handle_error(sb);
}
/* Handle critical errors. This is intentionally more drastic than
* ocfs2_handle_error, so we only use for things like journal errors,
* etc. */
-void __ocfs2_abort(struct super_block* sb,
- const char *function,
+void __ocfs2_abort(struct super_block *sb, const char *function,
const char *fmt, ...)
{
+ struct va_format vaf;
va_list args;
va_start(args, fmt);
- vsnprintf(error_buf, sizeof(error_buf), fmt, args);
- va_end(args);
- printk(KERN_CRIT "OCFS2: abort (device %s): %s: %s\n",
- sb->s_id, function, error_buf);
+ vaf.fmt = fmt;
+ vaf.va = &args;
+
+ printk(KERN_CRIT "OCFS2: abort (device %s): %s: %pV\n",
+ sb->s_id, function, &vaf);
+
+ va_end(args);
/* We don't have the cluster support yet to go straight to
* hard readonly in here. Until then, we want to keep
i,
&block_off,
&name_offset);
+ if (ret) {
+ mlog_errno(ret);
+ goto cleanup;
+ }
xs->base = bucket_block(xs->bucket, block_off);
}
if (ocfs2_xattr_is_local(xs->here)) {
ret = ocfs2_get_xattr_tree_value_root(inode->i_sb, bucket,
i, &xv, NULL);
+ if (ret) {
+ mlog_errno(ret);
+ break;
+ }
ret = ocfs2_lock_xattr_remove_allocators(inode, xv,
args->ref_ci,
uid = make_kuid(current_user_ns(), user);
gid = make_kgid(current_user_ns(), group);
+retry_deleg:
newattrs.ia_valid = ATTR_CTIME;
if (user != (uid_t) -1) {
if (!uid_valid(uid))
if (!S_ISDIR(inode->i_mode))
newattrs.ia_valid |=
ATTR_KILL_SUID | ATTR_KILL_SGID | ATTR_KILL_PRIV;
-retry_deleg:
mutex_lock(&inode->i_mutex);
error = security_path_chown(path, uid, gid);
if (!error)
return ERR_PTR(err);
if (flags & O_CREAT)
return ERR_PTR(-EINVAL);
- if (!filename && (flags & O_DIRECTORY))
- if (!dentry->d_inode->i_op->lookup)
- return ERR_PTR(-ENOTDIR);
return do_file_open_root(dentry, mnt, filename, &op);
}
EXPORT_SYMBOL(file_open_root);
#include <linux/audit.h>
#include <linux/syscalls.h>
#include <linux/fcntl.h>
-#include <linux/aio.h>
#include <asm/uaccess.h>
#include <asm/ioctls.h>
mem_address = pdata->mem_address;
record_size = pdata->record_size;
dump_oops = pdata->dump_oops;
+ ramoops_console_size = pdata->console_size;
+ ramoops_pmsg_size = pdata->pmsg_size;
+ ramoops_ftrace_size = pdata->ftrace_size;
pr_info("attached 0x%lx@0x%llx, ecc: %d/%d\n",
cxt->size, (unsigned long long)cxt->phys_addr,
#include <linux/fcntl.h>
#include <linux/file.h>
#include <linux/uio.h>
-#include <linux/aio.h>
#include <linux/fsnotify.h>
#include <linux/security.h>
#include <linux/export.h>
init_sync_kiocb(&kiocb, file);
kiocb.ki_pos = *ppos;
- kiocb.ki_nbytes = iov_iter_count(iter);
iter->type |= READ;
ret = file->f_op->read_iter(&kiocb, iter);
- if (ret == -EIOCBQUEUED)
- ret = wait_on_sync_kiocb(&kiocb);
-
+ BUG_ON(ret == -EIOCBQUEUED);
if (ret > 0)
*ppos = kiocb.ki_pos;
return ret;
init_sync_kiocb(&kiocb, file);
kiocb.ki_pos = *ppos;
- kiocb.ki_nbytes = iov_iter_count(iter);
iter->type |= WRITE;
ret = file->f_op->write_iter(&kiocb, iter);
- if (ret == -EIOCBQUEUED)
- ret = wait_on_sync_kiocb(&kiocb);
-
+ BUG_ON(ret == -EIOCBQUEUED);
if (ret > 0)
*ppos = kiocb.ki_pos;
return ret;
init_sync_kiocb(&kiocb, filp);
kiocb.ki_pos = *ppos;
- kiocb.ki_nbytes = len;
ret = filp->f_op->aio_read(&kiocb, &iov, 1, kiocb.ki_pos);
- if (-EIOCBQUEUED == ret)
- ret = wait_on_sync_kiocb(&kiocb);
+ BUG_ON(ret == -EIOCBQUEUED);
*ppos = kiocb.ki_pos;
return ret;
}
init_sync_kiocb(&kiocb, filp);
kiocb.ki_pos = *ppos;
- kiocb.ki_nbytes = len;
iov_iter_init(&iter, READ, &iov, 1, len);
ret = filp->f_op->read_iter(&kiocb, &iter);
- if (-EIOCBQUEUED == ret)
- ret = wait_on_sync_kiocb(&kiocb);
+ BUG_ON(ret == -EIOCBQUEUED);
*ppos = kiocb.ki_pos;
return ret;
}
init_sync_kiocb(&kiocb, filp);
kiocb.ki_pos = *ppos;
- kiocb.ki_nbytes = len;
ret = filp->f_op->aio_write(&kiocb, &iov, 1, kiocb.ki_pos);
- if (-EIOCBQUEUED == ret)
- ret = wait_on_sync_kiocb(&kiocb);
+ BUG_ON(ret == -EIOCBQUEUED);
*ppos = kiocb.ki_pos;
return ret;
}
init_sync_kiocb(&kiocb, filp);
kiocb.ki_pos = *ppos;
- kiocb.ki_nbytes = len;
iov_iter_init(&iter, WRITE, &iov, 1, len);
ret = filp->f_op->write_iter(&kiocb, &iter);
- if (-EIOCBQUEUED == ret)
- ret = wait_on_sync_kiocb(&kiocb);
+ BUG_ON(ret == -EIOCBQUEUED);
*ppos = kiocb.ki_pos;
return ret;
}
}
EXPORT_SYMBOL(iov_shorten);
-static ssize_t do_iter_readv_writev(struct file *filp, int rw, const struct iovec *iov,
- unsigned long nr_segs, size_t len, loff_t *ppos, iter_fn_t fn)
+static ssize_t do_iter_readv_writev(struct file *filp, struct iov_iter *iter,
+ loff_t *ppos, iter_fn_t fn)
{
struct kiocb kiocb;
- struct iov_iter iter;
ssize_t ret;
init_sync_kiocb(&kiocb, filp);
kiocb.ki_pos = *ppos;
- kiocb.ki_nbytes = len;
- iov_iter_init(&iter, rw, iov, nr_segs, len);
- ret = fn(&kiocb, &iter);
- if (ret == -EIOCBQUEUED)
- ret = wait_on_sync_kiocb(&kiocb);
+ ret = fn(&kiocb, iter);
+ BUG_ON(ret == -EIOCBQUEUED);
*ppos = kiocb.ki_pos;
return ret;
}
-static ssize_t do_sync_readv_writev(struct file *filp, const struct iovec *iov,
- unsigned long nr_segs, size_t len, loff_t *ppos, iov_fn_t fn)
+static ssize_t do_sync_readv_writev(struct file *filp, struct iov_iter *iter,
+ loff_t *ppos, iov_fn_t fn)
{
struct kiocb kiocb;
ssize_t ret;
init_sync_kiocb(&kiocb, filp);
kiocb.ki_pos = *ppos;
- kiocb.ki_nbytes = len;
- ret = fn(&kiocb, iov, nr_segs, kiocb.ki_pos);
- if (ret == -EIOCBQUEUED)
- ret = wait_on_sync_kiocb(&kiocb);
+ ret = fn(&kiocb, iter->iov, iter->nr_segs, kiocb.ki_pos);
+ BUG_ON(ret == -EIOCBQUEUED);
*ppos = kiocb.ki_pos;
return ret;
}
/* Do it by hand, with file-ops */
-static ssize_t do_loop_readv_writev(struct file *filp, struct iovec *iov,
- unsigned long nr_segs, loff_t *ppos, io_fn_t fn)
+static ssize_t do_loop_readv_writev(struct file *filp, struct iov_iter *iter,
+ loff_t *ppos, io_fn_t fn)
{
- struct iovec *vector = iov;
ssize_t ret = 0;
- while (nr_segs > 0) {
- void __user *base;
- size_t len;
+ while (iov_iter_count(iter)) {
+ struct iovec iovec = iov_iter_iovec(iter);
ssize_t nr;
- base = vector->iov_base;
- len = vector->iov_len;
- vector++;
- nr_segs--;
-
- nr = fn(filp, base, len, ppos);
+ nr = fn(filp, iovec.iov_base, iovec.iov_len, ppos);
if (nr < 0) {
if (!ret)
break;
}
ret += nr;
- if (nr != len)
+ if (nr != iovec.iov_len)
break;
+ iov_iter_advance(iter, nr);
}
return ret;
size_t tot_len;
struct iovec iovstack[UIO_FASTIOV];
struct iovec *iov = iovstack;
+ struct iov_iter iter;
ssize_t ret;
io_fn_t fn;
iov_fn_t fnv;
iter_fn_t iter_fn;
- ret = rw_copy_check_uvector(type, uvector, nr_segs,
- ARRAY_SIZE(iovstack), iovstack, &iov);
- if (ret <= 0)
- goto out;
+ ret = import_iovec(type, uvector, nr_segs,
+ ARRAY_SIZE(iovstack), &iov, &iter);
+ if (ret < 0)
+ return ret;
- tot_len = ret;
+ tot_len = iov_iter_count(&iter);
+ if (!tot_len)
+ goto out;
ret = rw_verify_area(type, file, pos, tot_len);
if (ret < 0)
goto out;
}
if (iter_fn)
- ret = do_iter_readv_writev(file, type, iov, nr_segs, tot_len,
- pos, iter_fn);
+ ret = do_iter_readv_writev(file, &iter, pos, iter_fn);
else if (fnv)
- ret = do_sync_readv_writev(file, iov, nr_segs, tot_len,
- pos, fnv);
+ ret = do_sync_readv_writev(file, &iter, pos, fnv);
else
- ret = do_loop_readv_writev(file, iov, nr_segs, pos, fn);
+ ret = do_loop_readv_writev(file, &iter, pos, fn);
if (type != READ)
file_end_write(file);
out:
- if (iov != iovstack)
- kfree(iov);
+ kfree(iov);
if ((ret + (type == READ)) > 0) {
if (type == READ)
fsnotify_access(file);
compat_ssize_t tot_len;
struct iovec iovstack[UIO_FASTIOV];
struct iovec *iov = iovstack;
+ struct iov_iter iter;
ssize_t ret;
io_fn_t fn;
iov_fn_t fnv;
iter_fn_t iter_fn;
- ret = compat_rw_copy_check_uvector(type, uvector, nr_segs,
- UIO_FASTIOV, iovstack, &iov);
- if (ret <= 0)
- goto out;
+ ret = compat_import_iovec(type, uvector, nr_segs,
+ UIO_FASTIOV, &iov, &iter);
+ if (ret < 0)
+ return ret;
- tot_len = ret;
+ tot_len = iov_iter_count(&iter);
+ if (!tot_len)
+ goto out;
ret = rw_verify_area(type, file, pos, tot_len);
if (ret < 0)
goto out;
}
if (iter_fn)
- ret = do_iter_readv_writev(file, type, iov, nr_segs, tot_len,
- pos, iter_fn);
+ ret = do_iter_readv_writev(file, &iter, pos, iter_fn);
else if (fnv)
- ret = do_sync_readv_writev(file, iov, nr_segs, tot_len,
- pos, fnv);
+ ret = do_sync_readv_writev(file, &iter, pos, fnv);
else
- ret = do_loop_readv_writev(file, iov, nr_segs, pos, fn);
+ ret = do_loop_readv_writev(file, &iter, pos, fn);
if (type != READ)
file_end_write(file);
out:
- if (iov != iovstack)
- kfree(iov);
+ kfree(iov);
if ((ret + (type == READ)) > 0) {
if (type == READ)
fsnotify_access(file);
#include <linux/writeback.h>
#include <linux/quotaops.h>
#include <linux/swap.h>
-#include <linux/aio.h>
+#include <linux/uio.h>
int reiserfs_commit_write(struct file *f, struct page *page,
unsigned from, unsigned to);
#include <linux/gfp.h>
#include <linux/socket.h>
#include <linux/compat.h>
-#include <linux/aio.h>
#include "internal.h"
/*
struct iovec iovstack[UIO_FASTIOV];
struct iovec *iov = iovstack;
struct iov_iter iter;
- ssize_t count;
pipe = get_pipe_info(file);
if (!pipe)
return -EBADF;
- ret = rw_copy_check_uvector(READ, uiov, nr_segs,
- ARRAY_SIZE(iovstack), iovstack, &iov);
- if (ret <= 0)
- goto out;
-
- count = ret;
- iov_iter_init(&iter, READ, iov, nr_segs, count);
+ ret = import_iovec(READ, uiov, nr_segs,
+ ARRAY_SIZE(iovstack), &iov, &iter);
+ if (ret < 0)
+ return ret;
+ sd.total_len = iov_iter_count(&iter);
sd.len = 0;
- sd.total_len = count;
sd.flags = flags;
sd.u.data = &iter;
sd.pos = 0;
- pipe_lock(pipe);
- ret = __splice_from_pipe(pipe, &sd, pipe_to_user);
- pipe_unlock(pipe);
-
-out:
- if (iov != iovstack)
- kfree(iov);
+ if (sd.total_len) {
+ pipe_lock(pipe);
+ ret = __splice_from_pipe(pipe, &sd, pipe_to_user);
+ pipe_unlock(pipe);
+ }
+ kfree(iov);
return ret;
}
{
int retval;
- retval = security_inode_getattr(path->mnt, path->dentry);
+ retval = security_inode_getattr(path);
if (retval)
return retval;
return vfs_getattr_nosec(path, stat);
s->s_maxbytes = MAX_NON_LFS;
s->s_op = &default_op;
s->s_time_gran = 1000000000;
- s->cleancache_poolid = -1;
+ s->cleancache_poolid = CLEANCACHE_NO_POOL;
s->s_shrink.seeks = DEFAULT_SEEKS;
s->s_shrink.scan_objects = super_cache_scan;
if (grp->attrs) {
for (i = 0, attr = grp->attrs; *attr && !error; i++, attr++) {
- umode_t mode = 0;
+ umode_t mode = (*attr)->mode;
/*
* In update mode, we're changing the permissions or
if (!mode)
continue;
}
+
+ WARN(mode & ~(SYSFS_PREALLOC | 0664),
+ "Attribute %s: Invalid permissions 0%o\n",
+ (*attr)->name, mode);
+
+ mode &= SYSFS_PREALLOC | 0664;
error = sysfs_add_file_mode_ns(parent, *attr, false,
- (*attr)->mode | mode,
- NULL);
+ mode, NULL);
if (unlikely(error))
break;
}
--- /dev/null
+tracefs-objs := inode.o
+
+obj-$(CONFIG_TRACING) += tracefs.o
+
--- /dev/null
+/*
+ * inode.c - part of tracefs, a pseudo file system for activating tracing
+ *
+ * Based on debugfs by: Greg Kroah-Hartman <greg@kroah.com>
+ *
+ * Copyright (C) 2014 Red Hat Inc, author: Steven Rostedt <srostedt@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version
+ * 2 as published by the Free Software Foundation.
+ *
+ * tracefs is the file system that is used by the tracing infrastructure.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/mount.h>
+#include <linux/kobject.h>
+#include <linux/namei.h>
+#include <linux/tracefs.h>
+#include <linux/fsnotify.h>
+#include <linux/seq_file.h>
+#include <linux/parser.h>
+#include <linux/magic.h>
+#include <linux/slab.h>
+
+#define TRACEFS_DEFAULT_MODE 0700
+
+static struct vfsmount *tracefs_mount;
+static int tracefs_mount_count;
+static bool tracefs_registered;
+
+static ssize_t default_read_file(struct file *file, char __user *buf,
+ size_t count, loff_t *ppos)
+{
+ return 0;
+}
+
+static ssize_t default_write_file(struct file *file, const char __user *buf,
+ size_t count, loff_t *ppos)
+{
+ return count;
+}
+
+static const struct file_operations tracefs_file_operations = {
+ .read = default_read_file,
+ .write = default_write_file,
+ .open = simple_open,
+ .llseek = noop_llseek,
+};
+
+static struct tracefs_dir_ops {
+ int (*mkdir)(const char *name);
+ int (*rmdir)(const char *name);
+} tracefs_ops;
+
+static char *get_dname(struct dentry *dentry)
+{
+ const char *dname;
+ char *name;
+ int len = dentry->d_name.len;
+
+ dname = dentry->d_name.name;
+ name = kmalloc(len + 1, GFP_KERNEL);
+ if (!name)
+ return NULL;
+ memcpy(name, dname, len);
+ name[len] = 0;
+ return name;
+}
+
+static int tracefs_syscall_mkdir(struct inode *inode, struct dentry *dentry, umode_t mode)
+{
+ char *name;
+ int ret;
+
+ name = get_dname(dentry);
+ if (!name)
+ return -ENOMEM;
+
+ /*
+ * The mkdir call can call the generic functions that create
+ * the files within the tracefs system. It is up to the individual
+ * mkdir routine to handle races.
+ */
+ mutex_unlock(&inode->i_mutex);
+ ret = tracefs_ops.mkdir(name);
+ mutex_lock(&inode->i_mutex);
+
+ kfree(name);
+
+ return ret;
+}
+
+static int tracefs_syscall_rmdir(struct inode *inode, struct dentry *dentry)
+{
+ char *name;
+ int ret;
+
+ name = get_dname(dentry);
+ if (!name)
+ return -ENOMEM;
+
+ /*
+ * The rmdir call can call the generic functions that create
+ * the files within the tracefs system. It is up to the individual
+ * rmdir routine to handle races.
+ * This time we need to unlock not only the parent (inode) but
+ * also the directory that is being deleted.
+ */
+ mutex_unlock(&inode->i_mutex);
+ mutex_unlock(&dentry->d_inode->i_mutex);
+
+ ret = tracefs_ops.rmdir(name);
+
+ mutex_lock_nested(&inode->i_mutex, I_MUTEX_PARENT);
+ mutex_lock(&dentry->d_inode->i_mutex);
+
+ kfree(name);
+
+ return ret;
+}
+
+static const struct inode_operations tracefs_dir_inode_operations = {
+ .lookup = simple_lookup,
+ .mkdir = tracefs_syscall_mkdir,
+ .rmdir = tracefs_syscall_rmdir,
+};
+
+static struct inode *tracefs_get_inode(struct super_block *sb)
+{
+ struct inode *inode = new_inode(sb);
+ if (inode) {
+ inode->i_ino = get_next_ino();
+ inode->i_atime = inode->i_mtime = inode->i_ctime = CURRENT_TIME;
+ }
+ return inode;
+}
+
+struct tracefs_mount_opts {
+ kuid_t uid;
+ kgid_t gid;
+ umode_t mode;
+};
+
+enum {
+ Opt_uid,
+ Opt_gid,
+ Opt_mode,
+ Opt_err
+};
+
+static const match_table_t tokens = {
+ {Opt_uid, "uid=%u"},
+ {Opt_gid, "gid=%u"},
+ {Opt_mode, "mode=%o"},
+ {Opt_err, NULL}
+};
+
+struct tracefs_fs_info {
+ struct tracefs_mount_opts mount_opts;
+};
+
+static int tracefs_parse_options(char *data, struct tracefs_mount_opts *opts)
+{
+ substring_t args[MAX_OPT_ARGS];
+ int option;
+ int token;
+ kuid_t uid;
+ kgid_t gid;
+ char *p;
+
+ opts->mode = TRACEFS_DEFAULT_MODE;
+
+ while ((p = strsep(&data, ",")) != NULL) {
+ if (!*p)
+ continue;
+
+ token = match_token(p, tokens, args);
+ switch (token) {
+ case Opt_uid:
+ if (match_int(&args[0], &option))
+ return -EINVAL;
+ uid = make_kuid(current_user_ns(), option);
+ if (!uid_valid(uid))
+ return -EINVAL;
+ opts->uid = uid;
+ break;
+ case Opt_gid:
+ if (match_int(&args[0], &option))
+ return -EINVAL;
+ gid = make_kgid(current_user_ns(), option);
+ if (!gid_valid(gid))
+ return -EINVAL;
+ opts->gid = gid;
+ break;
+ case Opt_mode:
+ if (match_octal(&args[0], &option))
+ return -EINVAL;
+ opts->mode = option & S_IALLUGO;
+ break;
+ /*
+ * We might like to report bad mount options here;
+ * but traditionally tracefs has ignored all mount options
+ */
+ }
+ }
+
+ return 0;
+}
+
+static int tracefs_apply_options(struct super_block *sb)
+{
+ struct tracefs_fs_info *fsi = sb->s_fs_info;
+ struct inode *inode = sb->s_root->d_inode;
+ struct tracefs_mount_opts *opts = &fsi->mount_opts;
+
+ inode->i_mode &= ~S_IALLUGO;
+ inode->i_mode |= opts->mode;
+
+ inode->i_uid = opts->uid;
+ inode->i_gid = opts->gid;
+
+ return 0;
+}
+
+static int tracefs_remount(struct super_block *sb, int *flags, char *data)
+{
+ int err;
+ struct tracefs_fs_info *fsi = sb->s_fs_info;
+
+ sync_filesystem(sb);
+ err = tracefs_parse_options(data, &fsi->mount_opts);
+ if (err)
+ goto fail;
+
+ tracefs_apply_options(sb);
+
+fail:
+ return err;
+}
+
+static int tracefs_show_options(struct seq_file *m, struct dentry *root)
+{
+ struct tracefs_fs_info *fsi = root->d_sb->s_fs_info;
+ struct tracefs_mount_opts *opts = &fsi->mount_opts;
+
+ if (!uid_eq(opts->uid, GLOBAL_ROOT_UID))
+ seq_printf(m, ",uid=%u",
+ from_kuid_munged(&init_user_ns, opts->uid));
+ if (!gid_eq(opts->gid, GLOBAL_ROOT_GID))
+ seq_printf(m, ",gid=%u",
+ from_kgid_munged(&init_user_ns, opts->gid));
+ if (opts->mode != TRACEFS_DEFAULT_MODE)
+ seq_printf(m, ",mode=%o", opts->mode);
+
+ return 0;
+}
+
+static const struct super_operations tracefs_super_operations = {
+ .statfs = simple_statfs,
+ .remount_fs = tracefs_remount,
+ .show_options = tracefs_show_options,
+};
+
+static int trace_fill_super(struct super_block *sb, void *data, int silent)
+{
+ static struct tree_descr trace_files[] = {{""}};
+ struct tracefs_fs_info *fsi;
+ int err;
+
+ save_mount_options(sb, data);
+
+ fsi = kzalloc(sizeof(struct tracefs_fs_info), GFP_KERNEL);
+ sb->s_fs_info = fsi;
+ if (!fsi) {
+ err = -ENOMEM;
+ goto fail;
+ }
+
+ err = tracefs_parse_options(data, &fsi->mount_opts);
+ if (err)
+ goto fail;
+
+ err = simple_fill_super(sb, TRACEFS_MAGIC, trace_files);
+ if (err)
+ goto fail;
+
+ sb->s_op = &tracefs_super_operations;
+
+ tracefs_apply_options(sb);
+
+ return 0;
+
+fail:
+ kfree(fsi);
+ sb->s_fs_info = NULL;
+ return err;
+}
+
+static struct dentry *trace_mount(struct file_system_type *fs_type,
+ int flags, const char *dev_name,
+ void *data)
+{
+ return mount_single(fs_type, flags, data, trace_fill_super);
+}
+
+static struct file_system_type trace_fs_type = {
+ .owner = THIS_MODULE,
+ .name = "tracefs",
+ .mount = trace_mount,
+ .kill_sb = kill_litter_super,
+};
+MODULE_ALIAS_FS("tracefs");
+
+static struct dentry *start_creating(const char *name, struct dentry *parent)
+{
+ struct dentry *dentry;
+ int error;
+
+ pr_debug("tracefs: creating file '%s'\n",name);
+
+ error = simple_pin_fs(&trace_fs_type, &tracefs_mount,
+ &tracefs_mount_count);
+ if (error)
+ return ERR_PTR(error);
+
+ /* If the parent is not specified, we create it in the root.
+ * We need the root dentry to do this, which is in the super
+ * block. A pointer to that is in the struct vfsmount that we
+ * have around.
+ */
+ if (!parent)
+ parent = tracefs_mount->mnt_root;
+
+ mutex_lock(&parent->d_inode->i_mutex);
+ dentry = lookup_one_len(name, parent, strlen(name));
+ if (!IS_ERR(dentry) && dentry->d_inode) {
+ dput(dentry);
+ dentry = ERR_PTR(-EEXIST);
+ }
+ if (IS_ERR(dentry))
+ mutex_unlock(&parent->d_inode->i_mutex);
+ return dentry;
+}
+
+static struct dentry *failed_creating(struct dentry *dentry)
+{
+ mutex_unlock(&dentry->d_parent->d_inode->i_mutex);
+ dput(dentry);
+ simple_release_fs(&tracefs_mount, &tracefs_mount_count);
+ return NULL;
+}
+
+static struct dentry *end_creating(struct dentry *dentry)
+{
+ mutex_unlock(&dentry->d_parent->d_inode->i_mutex);
+ return dentry;
+}
+
+/**
+ * tracefs_create_file - create a file in the tracefs filesystem
+ * @name: a pointer to a string containing the name of the file to create.
+ * @mode: the permission that the file should have.
+ * @parent: a pointer to the parent dentry for this file. This should be a
+ * directory dentry if set. If this parameter is NULL, then the
+ * file will be created in the root of the tracefs filesystem.
+ * @data: a pointer to something that the caller will want to get to later
+ * on. The inode.i_private pointer will point to this value on
+ * the open() call.
+ * @fops: a pointer to a struct file_operations that should be used for
+ * this file.
+ *
+ * This is the basic "create a file" function for tracefs. It allows for a
+ * wide range of flexibility in creating a file, or a directory (if you want
+ * to create a directory, the tracefs_create_dir() function is
+ * recommended to be used instead.)
+ *
+ * This function will return a pointer to a dentry if it succeeds. This
+ * pointer must be passed to the tracefs_remove() function when the file is
+ * to be removed (no automatic cleanup happens if your module is unloaded,
+ * you are responsible here.) If an error occurs, %NULL will be returned.
+ *
+ * If tracefs is not enabled in the kernel, the value -%ENODEV will be
+ * returned.
+ */
+struct dentry *tracefs_create_file(const char *name, umode_t mode,
+ struct dentry *parent, void *data,
+ const struct file_operations *fops)
+{
+ struct dentry *dentry;
+ struct inode *inode;
+
+ if (!(mode & S_IFMT))
+ mode |= S_IFREG;
+ BUG_ON(!S_ISREG(mode));
+ dentry = start_creating(name, parent);
+
+ if (IS_ERR(dentry))
+ return NULL;
+
+ inode = tracefs_get_inode(dentry->d_sb);
+ if (unlikely(!inode))
+ return failed_creating(dentry);
+
+ inode->i_mode = mode;
+ inode->i_fop = fops ? fops : &tracefs_file_operations;
+ inode->i_private = data;
+ d_instantiate(dentry, inode);
+ fsnotify_create(dentry->d_parent->d_inode, dentry);
+ return end_creating(dentry);
+}
+
+static struct dentry *__create_dir(const char *name, struct dentry *parent,
+ const struct inode_operations *ops)
+{
+ struct dentry *dentry = start_creating(name, parent);
+ struct inode *inode;
+
+ if (IS_ERR(dentry))
+ return NULL;
+
+ inode = tracefs_get_inode(dentry->d_sb);
+ if (unlikely(!inode))
+ return failed_creating(dentry);
+
+ inode->i_mode = S_IFDIR | S_IRWXU | S_IRUGO | S_IXUGO;
+ inode->i_op = ops;
+ inode->i_fop = &simple_dir_operations;
+
+ /* directory inodes start off with i_nlink == 2 (for "." entry) */
+ inc_nlink(inode);
+ d_instantiate(dentry, inode);
+ inc_nlink(dentry->d_parent->d_inode);
+ fsnotify_mkdir(dentry->d_parent->d_inode, dentry);
+ return end_creating(dentry);
+}
+
+/**
+ * tracefs_create_dir - create a directory in the tracefs filesystem
+ * @name: a pointer to a string containing the name of the directory to
+ * create.
+ * @parent: a pointer to the parent dentry for this file. This should be a
+ * directory dentry if set. If this parameter is NULL, then the
+ * directory will be created in the root of the tracefs filesystem.
+ *
+ * This function creates a directory in tracefs with the given name.
+ *
+ * This function will return a pointer to a dentry if it succeeds. This
+ * pointer must be passed to the tracefs_remove() function when the file is
+ * to be removed. If an error occurs, %NULL will be returned.
+ *
+ * If tracing is not enabled in the kernel, the value -%ENODEV will be
+ * returned.
+ */
+struct dentry *tracefs_create_dir(const char *name, struct dentry *parent)
+{
+ return __create_dir(name, parent, &simple_dir_inode_operations);
+}
+
+/**
+ * tracefs_create_instance_dir - create the tracing instances directory
+ * @name: The name of the instances directory to create
+ * @parent: The parent directory that the instances directory will exist
+ * @mkdir: The function to call when a mkdir is performed.
+ * @rmdir: The function to call when a rmdir is performed.
+ *
+ * Only one instances directory is allowed.
+ *
+ * The instances directory is special as it allows for mkdir and rmdir to
+ * to be done by userspace. When a mkdir or rmdir is performed, the inode
+ * locks are released and the methhods passed in (@mkdir and @rmdir) are
+ * called without locks and with the name of the directory being created
+ * within the instances directory.
+ *
+ * Returns the dentry of the instances directory.
+ */
+struct dentry *tracefs_create_instance_dir(const char *name, struct dentry *parent,
+ int (*mkdir)(const char *name),
+ int (*rmdir)(const char *name))
+{
+ struct dentry *dentry;
+
+ /* Only allow one instance of the instances directory. */
+ if (WARN_ON(tracefs_ops.mkdir || tracefs_ops.rmdir))
+ return NULL;
+
+ dentry = __create_dir(name, parent, &tracefs_dir_inode_operations);
+ if (!dentry)
+ return NULL;
+
+ tracefs_ops.mkdir = mkdir;
+ tracefs_ops.rmdir = rmdir;
+
+ return dentry;
+}
+
+static inline int tracefs_positive(struct dentry *dentry)
+{
+ return dentry->d_inode && !d_unhashed(dentry);
+}
+
+static int __tracefs_remove(struct dentry *dentry, struct dentry *parent)
+{
+ int ret = 0;
+
+ if (tracefs_positive(dentry)) {
+ if (dentry->d_inode) {
+ dget(dentry);
+ switch (dentry->d_inode->i_mode & S_IFMT) {
+ case S_IFDIR:
+ ret = simple_rmdir(parent->d_inode, dentry);
+ break;
+ default:
+ simple_unlink(parent->d_inode, dentry);
+ break;
+ }
+ if (!ret)
+ d_delete(dentry);
+ dput(dentry);
+ }
+ }
+ return ret;
+}
+
+/**
+ * tracefs_remove - removes a file or directory from the tracefs filesystem
+ * @dentry: a pointer to a the dentry of the file or directory to be
+ * removed.
+ *
+ * This function removes a file or directory in tracefs that was previously
+ * created with a call to another tracefs function (like
+ * tracefs_create_file() or variants thereof.)
+ */
+void tracefs_remove(struct dentry *dentry)
+{
+ struct dentry *parent;
+ int ret;
+
+ if (IS_ERR_OR_NULL(dentry))
+ return;
+
+ parent = dentry->d_parent;
+ if (!parent || !parent->d_inode)
+ return;
+
+ mutex_lock(&parent->d_inode->i_mutex);
+ ret = __tracefs_remove(dentry, parent);
+ mutex_unlock(&parent->d_inode->i_mutex);
+ if (!ret)
+ simple_release_fs(&tracefs_mount, &tracefs_mount_count);
+}
+
+/**
+ * tracefs_remove_recursive - recursively removes a directory
+ * @dentry: a pointer to a the dentry of the directory to be removed.
+ *
+ * This function recursively removes a directory tree in tracefs that
+ * was previously created with a call to another tracefs function
+ * (like tracefs_create_file() or variants thereof.)
+ */
+void tracefs_remove_recursive(struct dentry *dentry)
+{
+ struct dentry *child, *parent;
+
+ if (IS_ERR_OR_NULL(dentry))
+ return;
+
+ parent = dentry->d_parent;
+ if (!parent || !parent->d_inode)
+ return;
+
+ parent = dentry;
+ down:
+ mutex_lock(&parent->d_inode->i_mutex);
+ loop:
+ /*
+ * The parent->d_subdirs is protected by the d_lock. Outside that
+ * lock, the child can be unlinked and set to be freed which can
+ * use the d_u.d_child as the rcu head and corrupt this list.
+ */
+ spin_lock(&parent->d_lock);
+ list_for_each_entry(child, &parent->d_subdirs, d_child) {
+ if (!tracefs_positive(child))
+ continue;
+
+ /* perhaps simple_empty(child) makes more sense */
+ if (!list_empty(&child->d_subdirs)) {
+ spin_unlock(&parent->d_lock);
+ mutex_unlock(&parent->d_inode->i_mutex);
+ parent = child;
+ goto down;
+ }
+
+ spin_unlock(&parent->d_lock);
+
+ if (!__tracefs_remove(child, parent))
+ simple_release_fs(&tracefs_mount, &tracefs_mount_count);
+
+ /*
+ * The parent->d_lock protects agaist child from unlinking
+ * from d_subdirs. When releasing the parent->d_lock we can
+ * no longer trust that the next pointer is valid.
+ * Restart the loop. We'll skip this one with the
+ * tracefs_positive() check.
+ */
+ goto loop;
+ }
+ spin_unlock(&parent->d_lock);
+
+ mutex_unlock(&parent->d_inode->i_mutex);
+ child = parent;
+ parent = parent->d_parent;
+ mutex_lock(&parent->d_inode->i_mutex);
+
+ if (child != dentry)
+ /* go up */
+ goto loop;
+
+ if (!__tracefs_remove(child, parent))
+ simple_release_fs(&tracefs_mount, &tracefs_mount_count);
+ mutex_unlock(&parent->d_inode->i_mutex);
+}
+
+/**
+ * tracefs_initialized - Tells whether tracefs has been registered
+ */
+bool tracefs_initialized(void)
+{
+ return tracefs_registered;
+}
+
+static struct kobject *trace_kobj;
+
+static int __init tracefs_init(void)
+{
+ int retval;
+
+ trace_kobj = kobject_create_and_add("tracing", kernel_kobj);
+ if (!trace_kobj)
+ return -EINVAL;
+
+ retval = register_filesystem(&trace_fs_type);
+ if (!retval)
+ tracefs_registered = true;
+
+ return retval;
+}
+core_initcall(tracefs_init);
*/
#include "ubifs.h"
-#include <linux/aio.h>
#include <linux/mount.h>
#include <linux/namei.h>
#include <linux/slab.h>
#include <linux/errno.h>
#include <linux/pagemap.h>
#include <linux/buffer_head.h>
-#include <linux/aio.h>
+#include <linux/uio.h>
#include "udf_i.h"
#include "udf_sb.h"
struct file *file = iocb->ki_filp;
struct inode *inode = file_inode(file);
int err, pos;
- size_t count = iocb->ki_nbytes;
+ size_t count = iov_iter_count(from);
struct udf_inode_info *iinfo = UDF_I(inode);
mutex_lock(&inode->i_mutex);
#include <linux/slab.h>
#include <linux/crc-itu-t.h>
#include <linux/mpage.h>
-#include <linux/aio.h>
+#include <linux/uio.h>
#include "udf_i.h"
#include "udf_sb.h"
#include "xfs_bmap.h"
#include "xfs_bmap_util.h"
#include "xfs_bmap_btree.h"
-#include <linux/aio.h>
#include <linux/gfp.h>
#include <linux/mpage.h>
#include <linux/pagevec.h>
#include "xfs_icache.h"
#include "xfs_pnfs.h"
-#include <linux/aio.h>
#include <linux/dcache.h>
#include <linux/falloc.h>
#include <linux/pagevec.h>
#include <linux/mm_types.h>
#include <linux/bug.h>
+#include <linux/errno.h>
+
+#if 4 - defined(__PAGETABLE_PUD_FOLDED) - defined(__PAGETABLE_PMD_FOLDED) != \
+ CONFIG_PGTABLE_LEVELS
+#error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{PUD,PMD}_FOLDED
+#endif
/*
* On almost all architectures and configurations, 0 can be used as the
#endif /* CONFIG_MMU */
+#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
+int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
+int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
+int pud_clear_huge(pud_t *pud);
+int pmd_clear_huge(pmd_t *pmd);
+#else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
+static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
+{
+ return 0;
+}
+static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
+{
+ return 0;
+}
+static inline int pud_clear_huge(pud_t *pud)
+{
+ return 0;
+}
+static inline int pmd_clear_huge(pmd_t *pmd)
+{
+ return 0;
+}
+#endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
+
#endif /* !__ASSEMBLY__ */
#ifndef io_remap_pfn_range
#define FTRACE_EVENTS() . = ALIGN(8); \
VMLINUX_SYMBOL(__start_ftrace_events) = .; \
*(_ftrace_events) \
- VMLINUX_SYMBOL(__stop_ftrace_events) = .;
+ VMLINUX_SYMBOL(__stop_ftrace_events) = .; \
+ VMLINUX_SYMBOL(__start_ftrace_enum_maps) = .; \
+ *(_ftrace_enum_map) \
+ VMLINUX_SYMBOL(__stop_ftrace_enum_maps) = .;
#else
#define FTRACE_EVENTS()
#endif
--- /dev/null
+/*
+ * GPIO definitions for Amlogic Meson8b SoCs
+ *
+ * Copyright (C) 2015 Endless Mobile, Inc.
+ * Author: Carlo Caione <carlo@endlessm.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _DT_BINDINGS_MESON8B_GPIO_H
+#define _DT_BINDINGS_MESON8B_GPIO_H
+
+#include <dt-bindings/gpio/meson8-gpio.h>
+
+/* GPIO Bank DIF */
+#define DIF_0_P 120
+#define DIF_0_N 121
+#define DIF_1_P 122
+#define DIF_1_N 123
+#define DIF_2_P 124
+#define DIF_2_N 125
+#define DIF_3_P 126
+#define DIF_3_N 127
+#define DIF_4_P 128
+#define DIF_4_N 129
+
+#endif /* _DT_BINDINGS_MESON8B_GPIO_H */
--- /dev/null
+/*
+ * include/linux/irqchip/irq-st.h
+ *
+ * Copyright (C) 2014 STMicroelectronics – All Rights Reserved
+ *
+ * Author: Lee Jones <lee.jones@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ST_H
+#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ST_H
+
+#define ST_IRQ_SYSCFG_EXT_0 0
+#define ST_IRQ_SYSCFG_EXT_1 1
+#define ST_IRQ_SYSCFG_EXT_2 2
+#define ST_IRQ_SYSCFG_CTI_0 3
+#define ST_IRQ_SYSCFG_CTI_1 4
+#define ST_IRQ_SYSCFG_PMU_0 5
+#define ST_IRQ_SYSCFG_PMU_1 6
+#define ST_IRQ_SYSCFG_pl310_L2 7
+#define ST_IRQ_SYSCFG_DISABLED 0xFFFFFFFF
+
+#define ST_IRQ_SYSCFG_EXT_1_INV 0x1
+#define ST_IRQ_SYSCFG_EXT_2_INV 0x2
+#define ST_IRQ_SYSCFG_EXT_3_INV 0x4
+
+#endif
--- /dev/null
+/*
+ * Device Tree defines for Arizona devices
+ *
+ * Copyright 2015 Cirrus Logic Inc.
+ *
+ * Author: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _DT_BINDINGS_MFD_ARIZONA_H
+#define _DT_BINDINGS_MFD_ARIZONA_H
+
+/* GPIO Function Definitions */
+#define ARIZONA_GP_FN_TXLRCLK 0x00
+#define ARIZONA_GP_FN_GPIO 0x01
+#define ARIZONA_GP_FN_IRQ1 0x02
+#define ARIZONA_GP_FN_IRQ2 0x03
+#define ARIZONA_GP_FN_OPCLK 0x04
+#define ARIZONA_GP_FN_FLL1_OUT 0x05
+#define ARIZONA_GP_FN_FLL2_OUT 0x06
+#define ARIZONA_GP_FN_PWM1 0x08
+#define ARIZONA_GP_FN_PWM2 0x09
+#define ARIZONA_GP_FN_SYSCLK_UNDERCLOCKED 0x0A
+#define ARIZONA_GP_FN_ASYNCCLK_UNDERCLOCKED 0x0B
+#define ARIZONA_GP_FN_FLL1_LOCK 0x0C
+#define ARIZONA_GP_FN_FLL2_LOCK 0x0D
+#define ARIZONA_GP_FN_FLL1_CLOCK_OK 0x0F
+#define ARIZONA_GP_FN_FLL2_CLOCK_OK 0x10
+#define ARIZONA_GP_FN_HEADPHONE_DET 0x12
+#define ARIZONA_GP_FN_MIC_DET 0x13
+#define ARIZONA_GP_FN_WSEQ_STATUS 0x15
+#define ARIZONA_GP_FN_CIF_ADDRESS_ERROR 0x16
+#define ARIZONA_GP_FN_ASRC1_LOCK 0x1A
+#define ARIZONA_GP_FN_ASRC2_LOCK 0x1B
+#define ARIZONA_GP_FN_ASRC_CONFIG_ERROR 0x1C
+#define ARIZONA_GP_FN_DRC1_SIGNAL_DETECT 0x1D
+#define ARIZONA_GP_FN_DRC1_ANTICLIP 0x1E
+#define ARIZONA_GP_FN_DRC1_DECAY 0x1F
+#define ARIZONA_GP_FN_DRC1_NOISE 0x20
+#define ARIZONA_GP_FN_DRC1_QUICK_RELEASE 0x21
+#define ARIZONA_GP_FN_DRC2_SIGNAL_DETECT 0x22
+#define ARIZONA_GP_FN_DRC2_ANTICLIP 0x23
+#define ARIZONA_GP_FN_DRC2_DECAY 0x24
+#define ARIZONA_GP_FN_DRC2_NOISE 0x25
+#define ARIZONA_GP_FN_DRC2_QUICK_RELEASE 0x26
+#define ARIZONA_GP_FN_MIXER_DROPPED_SAMPLE 0x27
+#define ARIZONA_GP_FN_AIF1_CONFIG_ERROR 0x28
+#define ARIZONA_GP_FN_AIF2_CONFIG_ERROR 0x29
+#define ARIZONA_GP_FN_AIF3_CONFIG_ERROR 0x2A
+#define ARIZONA_GP_FN_SPK_TEMP_SHUTDOWN 0x2B
+#define ARIZONA_GP_FN_SPK_TEMP_WARNING 0x2C
+#define ARIZONA_GP_FN_UNDERCLOCKED 0x2D
+#define ARIZONA_GP_FN_OVERCLOCKED 0x2E
+#define ARIZONA_GP_FN_DSP_IRQ1 0x35
+#define ARIZONA_GP_FN_DSP_IRQ2 0x36
+#define ARIZONA_GP_FN_ASYNC_OPCLK 0x3D
+#define ARIZONA_GP_FN_BOOT_DONE 0x44
+#define ARIZONA_GP_FN_DSP1_RAM_READY 0x45
+#define ARIZONA_GP_FN_SYSCLK_ENA_STATUS 0x4B
+#define ARIZONA_GP_FN_ASYNCCLK_ENA_STATUS 0x4C
+
+/* GPIO Configuration Bits */
+#define ARIZONA_GPN_DIR 0x8000
+#define ARIZONA_GPN_PU 0x4000
+#define ARIZONA_GPN_PD 0x2000
+#define ARIZONA_GPN_LVL 0x0800
+#define ARIZONA_GPN_POL 0x0400
+#define ARIZONA_GPN_OP_CFG 0x0200
+#define ARIZONA_GPN_DB 0x0100
+
+/* Provide some defines for the most common configs */
+#define ARIZONA_GP_DEFAULT 0xffffffff
+#define ARIZONA_GP_OUTPUT (ARIZONA_GP_FN_GPIO)
+#define ARIZONA_GP_INPUT (ARIZONA_GP_FN_GPIO | \
+ ARIZONA_GPN_DIR)
+
+#define ARIZONA_32KZ_MCLK1 1
+#define ARIZONA_32KZ_MCLK2 2
+#define ARIZONA_32KZ_NONE 3
+
+#define ARIZONA_DMIC_MICVDD 0
+#define ARIZONA_DMIC_MICBIAS1 1
+#define ARIZONA_DMIC_MICBIAS2 2
+#define ARIZONA_DMIC_MICBIAS3 3
+
+#define ARIZONA_INMODE_DIFF 0
+#define ARIZONA_INMODE_SE 1
+#define ARIZONA_INMODE_DMIC 2
+
+#endif
#define QCOM_RPM_SYS_FABRIC_MODE 131
#define QCOM_RPM_USB_OTG_SWITCH 132
#define QCOM_RPM_VDDMIN_GPIO 133
+#define QCOM_RPM_NSS_FABRIC_0_CLK 134
+#define QCOM_RPM_NSS_FABRIC_1_CLK 135
+#define QCOM_RPM_SMB208_S1a 136
+#define QCOM_RPM_SMB208_S1b 137
+#define QCOM_RPM_SMB208_S2a 138
+#define QCOM_RPM_SMB208_S2b 139
/*
* Constants used to select force mode for regulators.
+++ /dev/null
-/*
- * This header provides constants for the phy framework
- * based on the STMicroelectronics MiPHY365x.
- *
- * Author: Lee Jones <lee.jones@linaro.org>
- */
-#ifndef _DT_BINDINGS_PHY_MIPHY
-#define _DT_BINDINGS_PHY_MIPHY
-
-#define MIPHY_TYPE_SATA 1
-#define MIPHY_TYPE_PCIE 2
-#define MIPHY_TYPE_USB 3
-
-#endif /* _DT_BINDINGS_PHY_MIPHY */
--- /dev/null
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DT_BINDINGS_PINCTRL_MT65XX_H
+#define _DT_BINDINGS_PINCTRL_MT65XX_H
+
+#define MTK_PIN_NO(x) ((x) << 8)
+#define MTK_GET_PIN_NO(x) ((x) >> 8)
+#define MTK_GET_PIN_FUNC(x) ((x) & 0xf)
+
+#define MTK_PUPD_SET_R1R0_00 100
+#define MTK_PUPD_SET_R1R0_01 101
+#define MTK_PUPD_SET_R1R0_10 102
+#define MTK_PUPD_SET_R1R0_11 103
+
+#define MTK_DRIVE_2mA 2
+#define MTK_DRIVE_4mA 4
+#define MTK_DRIVE_6mA 6
+#define MTK_DRIVE_8mA 8
+#define MTK_DRIVE_10mA 10
+#define MTK_DRIVE_12mA 12
+#define MTK_DRIVE_14mA 14
+#define MTK_DRIVE_16mA 16
+#define MTK_DRIVE_20mA 20
+#define MTK_DRIVE_24mA 24
+#define MTK_DRIVE_28mA 28
+#define MTK_DRIVE_32mA 32
+
+#endif /* _DT_BINDINGS_PINCTRL_MT65XX_H */
#define PM8058_GPIO_L5 6
#define PM8058_GPIO_L2 7
+/*
+ * Note: PM8916 GPIO1 and GPIO2 are supporting
+ * only L2(1.15V) and L5(1.8V) options
+ */
+#define PM8916_GPIO_VPH 0
+#define PM8916_GPIO_L2 2
+#define PM8916_GPIO_L5 3
+
#define PM8917_GPIO_VPH 0
#define PM8917_GPIO_S4 2
#define PM8917_GPIO_L15 3
#define PM8058_GPIO39_MP3_CLK PMIC_GPIO_FUNC_FUNC1
#define PM8058_GPIO40_EXT_BB_EN PMIC_GPIO_FUNC_FUNC1
+#define PM8916_GPIO1_BAT_ALRM_OUT PMIC_GPIO_FUNC_FUNC1
+#define PM8916_GPIO1_KEYP_DRV PMIC_GPIO_FUNC_FUNC2
+#define PM8916_GPIO2_DIV_CLK PMIC_GPIO_FUNC_FUNC1
+#define PM8916_GPIO2_SLEEP_CLK PMIC_GPIO_FUNC_FUNC2
+#define PM8916_GPIO3_KEYP_DRV PMIC_GPIO_FUNC_FUNC1
+#define PM8916_GPIO4_KEYP_DRV PMIC_GPIO_FUNC_FUNC2
+
#define PM8917_GPIO9_18_KEYP_DRV PMIC_GPIO_FUNC_FUNC1
#define PM8917_GPIO20_BAT_ALRM_OUT PMIC_GPIO_FUNC_FUNC1
#define PM8917_GPIO21_23_UART_TX PMIC_GPIO_FUNC_FUNC2
#define PM8841_MPP_VPH 0
#define PM8841_MPP_S3 2
+#define PM8916_MPP_VPH 0
+#define PM8916_MPP_L2 2
+#define PM8916_MPP_L5 3
+
#define PM8941_MPP_VPH 0
#define PM8941_MPP_L1 1
#define PM8941_MPP_S3 2
#include <linux/workqueue.h>
struct arch_timer_kvm {
-#ifdef CONFIG_KVM_ARM_TIMER
/* Is the timer enabled */
bool enabled;
/* Virtual offset */
cycle_t cntvoff;
-#endif
};
struct arch_timer_cpu {
-#ifdef CONFIG_KVM_ARM_TIMER
/* Registers: control register, timer value */
u32 cntv_ctl; /* Saved/restored */
cycle_t cntv_cval; /* Saved/restored */
/* Timer IRQ */
const struct kvm_irq_level *irq;
-#endif
};
-#ifdef CONFIG_KVM_ARM_TIMER
int kvm_timer_hyp_init(void);
void kvm_timer_enable(struct kvm *kvm);
void kvm_timer_init(struct kvm *kvm);
u64 kvm_arm_timer_get_reg(struct kvm_vcpu *, u64 regid);
int kvm_arm_timer_set_reg(struct kvm_vcpu *, u64 regid, u64 value);
-#else
-static inline int kvm_timer_hyp_init(void)
-{
- return 0;
-};
-
-static inline void kvm_timer_enable(struct kvm *kvm) {}
-static inline void kvm_timer_init(struct kvm *kvm) {}
-static inline void kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu,
- const struct kvm_irq_level *irq) {}
-static inline void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu) {}
-static inline void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu) {}
-static inline void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu) {}
-static inline void kvm_timer_vcpu_terminate(struct kvm_vcpu *vcpu) {}
-
-static inline int kvm_arm_timer_set_reg(struct kvm_vcpu *vcpu, u64 regid, u64 value)
-{
- return 0;
-}
-
-static inline u64 kvm_arm_timer_get_reg(struct kvm_vcpu *vcpu, u64 regid)
-{
- return 0;
-}
-#endif
+bool kvm_timer_should_fire(struct kvm_vcpu *vcpu);
#endif
#include <linux/irqreturn.h>
#include <linux/spinlock.h>
#include <linux/types.h>
+#include <kvm/iodev.h>
#define VGIC_NR_IRQS_LEGACY 256
#define VGIC_NR_SGIS 16
};
struct vgic_vm_ops {
- bool (*handle_mmio)(struct kvm_vcpu *, struct kvm_run *,
- struct kvm_exit_mmio *);
bool (*queue_sgi)(struct kvm_vcpu *, int irq);
void (*add_sgi_source)(struct kvm_vcpu *, int irq, int source);
int (*init_model)(struct kvm *);
int (*map_resources)(struct kvm *, const struct vgic_params *);
};
+struct vgic_io_device {
+ gpa_t addr;
+ int len;
+ const struct vgic_io_range *reg_ranges;
+ struct kvm_vcpu *redist_vcpu;
+ struct kvm_io_device dev;
+};
+
struct vgic_dist {
-#ifdef CONFIG_KVM_ARM_VGIC
spinlock_t lock;
bool in_kernel;
bool ready;
/* Level-triggered interrupt queued on VCPU interface */
struct vgic_bitmap irq_queued;
+ /* Interrupt was active when unqueue from VCPU interface */
+ struct vgic_bitmap irq_active;
+
/* Interrupt priority. Not used yet. */
struct vgic_bytemap irq_priority;
/* Bitmap indicating which CPU has something pending */
unsigned long *irq_pending_on_cpu;
+ /* Bitmap indicating which CPU has active IRQs */
+ unsigned long *irq_active_on_cpu;
+
struct vgic_vm_ops vm_ops;
-#endif
+ struct vgic_io_device dist_iodev;
+ struct vgic_io_device *redist_iodevs;
};
struct vgic_v2_cpu_if {
};
struct vgic_cpu {
-#ifdef CONFIG_KVM_ARM_VGIC
/* per IRQ to LR mapping */
u8 *vgic_irq_lr_map;
- /* Pending interrupts on this VCPU */
+ /* Pending/active/both interrupts on this VCPU */
DECLARE_BITMAP( pending_percpu, VGIC_NR_PRIVATE_IRQS);
+ DECLARE_BITMAP( active_percpu, VGIC_NR_PRIVATE_IRQS);
+ DECLARE_BITMAP( pend_act_percpu, VGIC_NR_PRIVATE_IRQS);
+
+ /* Pending/active/both shared interrupts, dynamically sized */
unsigned long *pending_shared;
+ unsigned long *active_shared;
+ unsigned long *pend_act_shared;
/* Bitmap of used/free list registers */
DECLARE_BITMAP( lr_used, VGIC_V2_MAX_LRS);
struct vgic_v2_cpu_if vgic_v2;
struct vgic_v3_cpu_if vgic_v3;
};
-#endif
};
#define LR_EMPTY 0xff
struct kvm;
struct kvm_vcpu;
-struct kvm_run;
-struct kvm_exit_mmio;
-#ifdef CONFIG_KVM_ARM_VGIC
int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write);
int kvm_vgic_hyp_init(void);
int kvm_vgic_map_resources(struct kvm *kvm);
bool level);
void vgic_v3_dispatch_sgi(struct kvm_vcpu *vcpu, u64 reg);
int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu);
-bool vgic_handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *run,
- struct kvm_exit_mmio *mmio);
+int kvm_vgic_vcpu_active_irq(struct kvm_vcpu *vcpu);
#define irqchip_in_kernel(k) (!!((k)->arch.vgic.in_kernel))
#define vgic_initialized(k) (!!((k)->arch.vgic.nr_cpus))
}
#endif
-#else
-static inline int kvm_vgic_hyp_init(void)
-{
- return 0;
-}
-
-static inline int kvm_vgic_set_addr(struct kvm *kvm, unsigned long type, u64 addr)
-{
- return 0;
-}
-
-static inline int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write)
-{
- return -ENXIO;
-}
-
-static inline int kvm_vgic_map_resources(struct kvm *kvm)
-{
- return 0;
-}
-
-static inline int kvm_vgic_create(struct kvm *kvm, u32 type)
-{
- return 0;
-}
-
-static inline void kvm_vgic_destroy(struct kvm *kvm)
-{
-}
-
-static inline void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu)
-{
-}
-
-static inline int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu)
-{
- return 0;
-}
-
-static inline void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu) {}
-static inline void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu) {}
-
-static inline int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid,
- unsigned int irq_num, bool level)
-{
- return 0;
-}
-
-static inline int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu)
-{
- return 0;
-}
-
-static inline bool vgic_handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *run,
- struct kvm_exit_mmio *mmio)
-{
- return false;
-}
-
-static inline int irqchip_in_kernel(struct kvm *kvm)
-{
- return 0;
-}
-
-static inline bool vgic_initialized(struct kvm *kvm)
-{
- return true;
-}
-
-static inline bool vgic_ready(struct kvm *kvm)
-{
- return true;
-}
-
-static inline int kvm_vgic_get_max_vcpus(void)
-{
- return KVM_MAX_VCPUS;
-}
-#endif
-
#endif
--- /dev/null
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __KVM_IODEV_H__
+#define __KVM_IODEV_H__
+
+#include <linux/kvm_types.h>
+#include <linux/errno.h>
+
+struct kvm_io_device;
+struct kvm_vcpu;
+
+/**
+ * kvm_io_device_ops are called under kvm slots_lock.
+ * read and write handlers return 0 if the transaction has been handled,
+ * or non-zero to have it passed to the next device.
+ **/
+struct kvm_io_device_ops {
+ int (*read)(struct kvm_vcpu *vcpu,
+ struct kvm_io_device *this,
+ gpa_t addr,
+ int len,
+ void *val);
+ int (*write)(struct kvm_vcpu *vcpu,
+ struct kvm_io_device *this,
+ gpa_t addr,
+ int len,
+ const void *val);
+ void (*destructor)(struct kvm_io_device *this);
+};
+
+
+struct kvm_io_device {
+ const struct kvm_io_device_ops *ops;
+};
+
+static inline void kvm_iodevice_init(struct kvm_io_device *dev,
+ const struct kvm_io_device_ops *ops)
+{
+ dev->ops = ops;
+}
+
+static inline int kvm_iodevice_read(struct kvm_vcpu *vcpu,
+ struct kvm_io_device *dev, gpa_t addr,
+ int l, void *v)
+{
+ return dev->ops->read ? dev->ops->read(vcpu, dev, addr, l, v)
+ : -EOPNOTSUPP;
+}
+
+static inline int kvm_iodevice_write(struct kvm_vcpu *vcpu,
+ struct kvm_io_device *dev, gpa_t addr,
+ int l, const void *v)
+{
+ return dev->ops->write ? dev->ops->write(vcpu, dev, addr, l, v)
+ : -EOPNOTSUPP;
+}
+
+static inline void kvm_iodevice_destructor(struct kvm_io_device *dev)
+{
+ if (dev->ops->destructor)
+ dev->ops->destructor(dev);
+}
+
+#endif /* __KVM_IODEV_H__ */
#ifndef __LINUX__AIO_H
#define __LINUX__AIO_H
-#include <linux/list.h>
-#include <linux/workqueue.h>
#include <linux/aio_abi.h>
-#include <linux/uio.h>
-#include <linux/rcupdate.h>
-
-#include <linux/atomic.h>
struct kioctx;
struct kiocb;
+struct mm_struct;
#define KIOCB_KEY 0
-/*
- * We use ki_cancel == KIOCB_CANCELLED to indicate that a kiocb has been either
- * cancelled or completed (this makes a certain amount of sense because
- * successful cancellation - io_cancel() - does deliver the completion to
- * userspace).
- *
- * And since most things don't implement kiocb cancellation and we'd really like
- * kiocb completion to be lockless when possible, we use ki_cancel to
- * synchronize cancellation and completion - we only set it to KIOCB_CANCELLED
- * with xchg() or cmpxchg(), see batch_complete_aio() and kiocb_cancel().
- */
-#define KIOCB_CANCELLED ((void *) (~0ULL))
-
typedef int (kiocb_cancel_fn)(struct kiocb *);
-struct kiocb {
- struct file *ki_filp;
- struct kioctx *ki_ctx; /* NULL for sync ops */
- kiocb_cancel_fn *ki_cancel;
- void *private;
-
- union {
- void __user *user;
- struct task_struct *tsk;
- } ki_obj;
-
- __u64 ki_user_data; /* user's data for completion */
- loff_t ki_pos;
- size_t ki_nbytes; /* copy of iocb->aio_nbytes */
-
- struct list_head ki_list; /* the aio core uses this
- * for cancellation */
-
- /*
- * If the aio_resfd field of the userspace iocb is not zero,
- * this is the underlying eventfd context to deliver events to.
- */
- struct eventfd_ctx *ki_eventfd;
-};
-
-static inline bool is_sync_kiocb(struct kiocb *kiocb)
-{
- return kiocb->ki_ctx == NULL;
-}
-
-static inline void init_sync_kiocb(struct kiocb *kiocb, struct file *filp)
-{
- *kiocb = (struct kiocb) {
- .ki_ctx = NULL,
- .ki_filp = filp,
- .ki_obj.tsk = current,
- };
-}
-
/* prototypes */
#ifdef CONFIG_AIO
-extern ssize_t wait_on_sync_kiocb(struct kiocb *iocb);
-extern void aio_complete(struct kiocb *iocb, long res, long res2);
-struct mm_struct;
extern void exit_aio(struct mm_struct *mm);
extern long do_io_submit(aio_context_t ctx_id, long nr,
struct iocb __user *__user *iocbpp, bool compat);
void kiocb_set_cancel_fn(struct kiocb *req, kiocb_cancel_fn *cancel);
#else
-static inline ssize_t wait_on_sync_kiocb(struct kiocb *iocb) { return 0; }
-static inline void aio_complete(struct kiocb *iocb, long res, long res2) { }
-struct mm_struct;
static inline void exit_aio(struct mm_struct *mm) { }
static inline long do_io_submit(aio_context_t ctx_id, long nr,
struct iocb __user * __user *iocbpp,
kiocb_cancel_fn *cancel) { }
#endif /* CONFIG_AIO */
-static inline struct kiocb *list_kiocb(struct list_head *h)
-{
- return list_entry(h, struct kiocb, ki_list);
-}
-
/* for sysctl: */
extern unsigned long aio_nr;
extern unsigned long aio_max_nr;
ATA_ID_SECTOR_SIZE = 106,
ATA_ID_WWN = 108,
ATA_ID_LOGICAL_SECTOR_SIZE = 117, /* and 118 */
+ ATA_ID_COMMAND_SET_3 = 119,
+ ATA_ID_COMMAND_SET_4 = 120,
ATA_ID_LAST_LUN = 126,
ATA_ID_DLF = 128,
ATA_ID_CSFO = 129,
ATA_DSC = (1 << 4), /* drive seek complete */
ATA_DRQ = (1 << 3), /* data request i/o */
ATA_CORR = (1 << 2), /* corrected data error */
- ATA_IDX = (1 << 1), /* index */
+ ATA_SENSE = (1 << 1), /* sense code available */
ATA_ERR = (1 << 0), /* have an error */
ATA_SRST = (1 << 2), /* software reset */
ATA_ICRC = (1 << 7), /* interface CRC error */
SATA_SSP = 0x06, /* Software Settings Preservation */
SATA_DEVSLP = 0x09, /* Device Sleep */
+ SETFEATURE_SENSE_DATA = 0xC3, /* Sense Data Reporting feature */
+
/* feature values for SET_MAX */
ATA_SET_MAX_ADDR = 0x00,
ATA_SET_MAX_PASSWD = 0x01,
#define ata_id_cdb_intr(id) (((id)[ATA_ID_CONFIG] & 0x60) == 0x20)
#define ata_id_has_da(id) ((id)[ATA_ID_SATA_CAPABILITY_2] & (1 << 4))
#define ata_id_has_devslp(id) ((id)[ATA_ID_FEATURE_SUPP] & (1 << 8))
+#define ata_id_has_ncq_autosense(id) \
+ ((id)[ATA_ID_FEATURE_SUPP] & (1 << 7))
static inline bool ata_id_has_hipm(const u16 *id)
{
return id[ATA_ID_CFS_ENABLE_1] & (1 << 5);
}
+static inline bool ata_id_has_read_log_dma_ext(const u16 *id)
+{
+ if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
+ return false;
+ return id[ATA_ID_COMMAND_SET_3] & (1 << 3);
+}
+
+static inline bool ata_id_has_sense_reporting(const u16 *id)
+{
+ if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
+ return false;
+ return id[ATA_ID_COMMAND_SET_3] & (1 << 6);
+}
+
+static inline bool ata_id_sense_reporting_enabled(const u16 *id)
+{
+ if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
+ return false;
+ return id[ATA_ID_COMMAND_SET_4] & (1 << 6);
+}
+
/**
* ata_id_major_version - get ATA level of drive
* @id: Identify data
__REQ_ELVPRIV, /* elevator private data attached */
__REQ_FAILED, /* set if the request failed */
__REQ_QUIET, /* don't worry about errors */
- __REQ_PREEMPT, /* set for "ide_preempt" requests */
+ __REQ_PREEMPT, /* set for "ide_preempt" requests and also
+ for requests for which the SCSI "quiesce"
+ state must be ignored. */
__REQ_ALLOCED, /* request came from our alloc pool */
__REQ_COPY_USER, /* contains copies of user pages */
__REQ_FLUSH_SEQ, /* request for flush sequence */
enum bpf_prog_type type;
};
-void bpf_register_prog_type(struct bpf_prog_type_list *tl);
-
struct bpf_prog;
struct bpf_prog_aux {
};
#ifdef CONFIG_BPF_SYSCALL
+void bpf_register_prog_type(struct bpf_prog_type_list *tl);
+
void bpf_prog_put(struct bpf_prog *prog);
+struct bpf_prog *bpf_prog_get(u32 ufd);
#else
-static inline void bpf_prog_put(struct bpf_prog *prog) {}
+static inline void bpf_register_prog_type(struct bpf_prog_type_list *tl)
+{
+}
+
+static inline struct bpf_prog *bpf_prog_get(u32 ufd)
+{
+ return ERR_PTR(-EOPNOTSUPP);
+}
+
+static inline void bpf_prog_put(struct bpf_prog *prog)
+{
+}
#endif
-struct bpf_prog *bpf_prog_get(u32 ufd);
+
/* verify correctness of eBPF program */
int bpf_check(struct bpf_prog *fp, union bpf_attr *attr);
#include <linux/exportfs.h>
#include <linux/mm.h>
+#define CLEANCACHE_NO_POOL -1
+#define CLEANCACHE_NO_BACKEND -2
+#define CLEANCACHE_NO_BACKEND_SHARED -3
+
#define CLEANCACHE_KEY_MAX 6
/*
void (*invalidate_fs)(int);
};
-extern struct cleancache_ops *
- cleancache_register_ops(struct cleancache_ops *ops);
+extern int cleancache_register_ops(struct cleancache_ops *ops);
extern void __cleancache_init_fs(struct super_block *);
-extern void __cleancache_init_shared_fs(char *, struct super_block *);
+extern void __cleancache_init_shared_fs(struct super_block *);
extern int __cleancache_get_page(struct page *);
extern void __cleancache_put_page(struct page *);
extern void __cleancache_invalidate_page(struct address_space *, struct page *);
__cleancache_init_fs(sb);
}
-static inline void cleancache_init_shared_fs(char *uuid, struct super_block *sb)
+static inline void cleancache_init_shared_fs(struct super_block *sb)
{
if (cleancache_enabled)
- __cleancache_init_shared_fs(uuid, sb);
+ __cleancache_init_shared_fs(sb);
}
static inline int cleancache_get_page(struct page *page)
#ifndef _LINUX_CLOCKCHIPS_H
#define _LINUX_CLOCKCHIPS_H
-/* Clock event notification values */
-enum clock_event_nofitiers {
- CLOCK_EVT_NOTIFY_ADD,
- CLOCK_EVT_NOTIFY_BROADCAST_ON,
- CLOCK_EVT_NOTIFY_BROADCAST_OFF,
- CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
- CLOCK_EVT_NOTIFY_BROADCAST_ENTER,
- CLOCK_EVT_NOTIFY_BROADCAST_EXIT,
- CLOCK_EVT_NOTIFY_SUSPEND,
- CLOCK_EVT_NOTIFY_RESUME,
- CLOCK_EVT_NOTIFY_CPU_DYING,
- CLOCK_EVT_NOTIFY_CPU_DEAD,
-};
-
-#ifdef CONFIG_GENERIC_CLOCKEVENTS_BUILD
+#ifdef CONFIG_GENERIC_CLOCKEVENTS
-#include <linux/clocksource.h>
-#include <linux/cpumask.h>
-#include <linux/ktime.h>
-#include <linux/notifier.h>
+# include <linux/clocksource.h>
+# include <linux/cpumask.h>
+# include <linux/ktime.h>
+# include <linux/notifier.h>
struct clock_event_device;
struct module;
-/* Clock event mode commands */
+/* Clock event mode commands for legacy ->set_mode(): OBSOLETE */
enum clock_event_mode {
- CLOCK_EVT_MODE_UNUSED = 0,
+ CLOCK_EVT_MODE_UNUSED,
CLOCK_EVT_MODE_SHUTDOWN,
CLOCK_EVT_MODE_PERIODIC,
CLOCK_EVT_MODE_ONESHOT,
CLOCK_EVT_MODE_RESUME,
};
+/*
+ * Possible states of a clock event device.
+ *
+ * DETACHED: Device is not used by clockevents core. Initial state or can be
+ * reached from SHUTDOWN.
+ * SHUTDOWN: Device is powered-off. Can be reached from PERIODIC or ONESHOT.
+ * PERIODIC: Device is programmed to generate events periodically. Can be
+ * reached from DETACHED or SHUTDOWN.
+ * ONESHOT: Device is programmed to generate event only once. Can be reached
+ * from DETACHED or SHUTDOWN.
+ */
+enum clock_event_state {
+ CLOCK_EVT_STATE_DETACHED,
+ CLOCK_EVT_STATE_SHUTDOWN,
+ CLOCK_EVT_STATE_PERIODIC,
+ CLOCK_EVT_STATE_ONESHOT,
+};
+
/*
* Clock event features
*/
-#define CLOCK_EVT_FEAT_PERIODIC 0x000001
-#define CLOCK_EVT_FEAT_ONESHOT 0x000002
-#define CLOCK_EVT_FEAT_KTIME 0x000004
+# define CLOCK_EVT_FEAT_PERIODIC 0x000001
+# define CLOCK_EVT_FEAT_ONESHOT 0x000002
+# define CLOCK_EVT_FEAT_KTIME 0x000004
+
/*
- * x86(64) specific misfeatures:
+ * x86(64) specific (mis)features:
*
* - Clockevent source stops in C3 State and needs broadcast support.
* - Local APIC timer is used as a dummy device.
*/
-#define CLOCK_EVT_FEAT_C3STOP 0x000008
-#define CLOCK_EVT_FEAT_DUMMY 0x000010
+# define CLOCK_EVT_FEAT_C3STOP 0x000008
+# define CLOCK_EVT_FEAT_DUMMY 0x000010
/*
* Core shall set the interrupt affinity dynamically in broadcast mode
*/
-#define CLOCK_EVT_FEAT_DYNIRQ 0x000020
-#define CLOCK_EVT_FEAT_PERCPU 0x000040
+# define CLOCK_EVT_FEAT_DYNIRQ 0x000020
+# define CLOCK_EVT_FEAT_PERCPU 0x000040
/*
* Clockevent device is based on a hrtimer for broadcast
*/
-#define CLOCK_EVT_FEAT_HRTIMER 0x000080
+# define CLOCK_EVT_FEAT_HRTIMER 0x000080
/**
* struct clock_event_device - clock event device descriptor
* @min_delta_ns: minimum delta value in ns
* @mult: nanosecond to cycles multiplier
* @shift: nanoseconds to cycles divisor (power of two)
- * @mode: operating mode assigned by the management code
+ * @mode: operating mode, relevant only to ->set_mode(), OBSOLETE
+ * @state: current state of the device, assigned by the core code
* @features: features
* @retries: number of forced programming retries
- * @set_mode: set mode function
+ * @set_mode: legacy set mode function, only for modes <= CLOCK_EVT_MODE_RESUME.
+ * @set_state_periodic: switch state to periodic, if !set_mode
+ * @set_state_oneshot: switch state to oneshot, if !set_mode
+ * @set_state_shutdown: switch state to shutdown, if !set_mode
+ * @tick_resume: resume clkevt device, if !set_mode
* @broadcast: function to broadcast events
* @min_delta_ticks: minimum delta value in ticks stored for reconfiguration
* @max_delta_ticks: maximum delta value in ticks stored for reconfiguration
*/
struct clock_event_device {
void (*event_handler)(struct clock_event_device *);
- int (*set_next_event)(unsigned long evt,
- struct clock_event_device *);
- int (*set_next_ktime)(ktime_t expires,
- struct clock_event_device *);
+ int (*set_next_event)(unsigned long evt, struct clock_event_device *);
+ int (*set_next_ktime)(ktime_t expires, struct clock_event_device *);
ktime_t next_event;
u64 max_delta_ns;
u64 min_delta_ns;
u32 mult;
u32 shift;
enum clock_event_mode mode;
+ enum clock_event_state state;
unsigned int features;
unsigned long retries;
+ /*
+ * State transition callback(s): Only one of the two groups should be
+ * defined:
+ * - set_mode(), only for modes <= CLOCK_EVT_MODE_RESUME.
+ * - set_state_{shutdown|periodic|oneshot}(), tick_resume().
+ */
+ void (*set_mode)(enum clock_event_mode mode, struct clock_event_device *);
+ int (*set_state_periodic)(struct clock_event_device *);
+ int (*set_state_oneshot)(struct clock_event_device *);
+ int (*set_state_shutdown)(struct clock_event_device *);
+ int (*tick_resume)(struct clock_event_device *);
+
void (*broadcast)(const struct cpumask *mask);
- void (*set_mode)(enum clock_event_mode mode,
- struct clock_event_device *);
void (*suspend)(struct clock_event_device *);
void (*resume)(struct clock_event_device *);
unsigned long min_delta_ticks;
*
* factor = (clock_ticks << shift) / nanoseconds
*/
-static inline unsigned long div_sc(unsigned long ticks, unsigned long nsec,
- int shift)
+static inline unsigned long
+div_sc(unsigned long ticks, unsigned long nsec, int shift)
{
- uint64_t tmp = ((uint64_t)ticks) << shift;
+ u64 tmp = ((u64)ticks) << shift;
do_div(tmp, nsec);
+
return (unsigned long) tmp;
}
/* Clock event layer functions */
-extern u64 clockevent_delta2ns(unsigned long latch,
- struct clock_event_device *evt);
+extern u64 clockevent_delta2ns(unsigned long latch, struct clock_event_device *evt);
extern void clockevents_register_device(struct clock_event_device *dev);
extern int clockevents_unbind_device(struct clock_event_device *ced, int cpu);
extern int clockevents_update_freq(struct clock_event_device *ce, u32 freq);
-extern void clockevents_exchange_device(struct clock_event_device *old,
- struct clock_event_device *new);
-extern void clockevents_set_mode(struct clock_event_device *dev,
- enum clock_event_mode mode);
-extern int clockevents_program_event(struct clock_event_device *dev,
- ktime_t expires, bool force);
-
-extern void clockevents_handle_noop(struct clock_event_device *dev);
-
static inline void
clockevents_calc_mult_shift(struct clock_event_device *ce, u32 freq, u32 minsec)
{
- return clocks_calc_mult_shift(&ce->mult, &ce->shift, NSEC_PER_SEC,
- freq, minsec);
+ return clocks_calc_mult_shift(&ce->mult, &ce->shift, NSEC_PER_SEC, freq, minsec);
}
extern void clockevents_suspend(void);
extern void clockevents_resume(void);
-#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
-#ifdef CONFIG_ARCH_HAS_TICK_BROADCAST
+# ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
+# ifdef CONFIG_ARCH_HAS_TICK_BROADCAST
extern void tick_broadcast(const struct cpumask *mask);
-#else
-#define tick_broadcast NULL
-#endif
+# else
+# define tick_broadcast NULL
+# endif
extern int tick_receive_broadcast(void);
-#endif
+# endif
-#if defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) && defined(CONFIG_TICK_ONESHOT)
+# if defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) && defined(CONFIG_TICK_ONESHOT)
extern void tick_setup_hrtimer_broadcast(void);
extern int tick_check_broadcast_expired(void);
-#else
+# else
static inline int tick_check_broadcast_expired(void) { return 0; }
-static inline void tick_setup_hrtimer_broadcast(void) {};
-#endif
+static inline void tick_setup_hrtimer_broadcast(void) { }
+# endif
-#ifdef CONFIG_GENERIC_CLOCKEVENTS
extern int clockevents_notify(unsigned long reason, void *arg);
-#else
-static inline int clockevents_notify(unsigned long reason, void *arg) { return 0; }
-#endif
-
-#else /* CONFIG_GENERIC_CLOCKEVENTS_BUILD */
-static inline void clockevents_suspend(void) {}
-static inline void clockevents_resume(void) {}
+#else /* !CONFIG_GENERIC_CLOCKEVENTS: */
+static inline void clockevents_suspend(void) { }
+static inline void clockevents_resume(void) { }
static inline int clockevents_notify(unsigned long reason, void *arg) { return 0; }
static inline int tick_check_broadcast_expired(void) { return 0; }
-static inline void tick_setup_hrtimer_broadcast(void) {};
+static inline void tick_setup_hrtimer_broadcast(void) { }
-#endif
+#endif /* !CONFIG_GENERIC_CLOCKEVENTS */
-#endif
+#endif /* _LINUX_CLOCKCHIPS_H */
* @shift: cycle to nanosecond divisor (power of two)
* @max_idle_ns: max idle time permitted by the clocksource (nsecs)
* @maxadj: maximum adjustment value to mult (~11%)
+ * @max_cycles: maximum safe cycle value which won't overflow on multiplication
* @flags: flags describing special properties
* @archdata: arch-specific data
* @suspend: suspend function for the clocksource, if necessary
#ifdef CONFIG_ARCH_CLOCKSOURCE_DATA
struct arch_clocksource_data archdata;
#endif
-
+ u64 max_cycles;
const char *name;
struct list_head list;
int rating;
}
-extern int clocksource_register(struct clocksource*);
extern int clocksource_unregister(struct clocksource*);
extern void clocksource_touch_watchdog(void);
extern struct clocksource* clocksource_get_next(void);
extern void clocksource_mark_unstable(struct clocksource *cs);
extern u64
-clocks_calc_max_nsecs(u32 mult, u32 shift, u32 maxadj, u64 mask);
+clocks_calc_max_nsecs(u32 mult, u32 shift, u32 maxadj, u64 mask, u64 *max_cycles);
extern void
clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 minsec);
extern int
__clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq);
extern void
-__clocksource_updatefreq_scale(struct clocksource *cs, u32 scale, u32 freq);
+__clocksource_update_freq_scale(struct clocksource *cs, u32 scale, u32 freq);
+
+/*
+ * Don't call this unless you are a default clocksource
+ * (AKA: jiffies) and absolutely have to.
+ */
+static inline int __clocksource_register(struct clocksource *cs)
+{
+ return __clocksource_register_scale(cs, 1, 0);
+}
static inline int clocksource_register_hz(struct clocksource *cs, u32 hz)
{
return __clocksource_register_scale(cs, 1000, khz);
}
-static inline void __clocksource_updatefreq_hz(struct clocksource *cs, u32 hz)
+static inline void __clocksource_update_freq_hz(struct clocksource *cs, u32 hz)
{
- __clocksource_updatefreq_scale(cs, 1, hz);
+ __clocksource_update_freq_scale(cs, 1, hz);
}
-static inline void __clocksource_updatefreq_khz(struct clocksource *cs, u32 khz)
+static inline void __clocksource_update_freq_khz(struct clocksource *cs, u32 khz)
{
- __clocksource_updatefreq_scale(cs, 1000, khz);
+ __clocksource_update_freq_scale(cs, 1000, khz);
}
struct cma;
extern unsigned long totalcma_pages;
-extern phys_addr_t cma_get_base(struct cma *cma);
-extern unsigned long cma_get_size(struct cma *cma);
+extern phys_addr_t cma_get_base(const struct cma *cma);
+extern unsigned long cma_get_size(const struct cma *cma);
extern int __init cma_declare_contiguous(phys_addr_t base,
phys_addr_t size, phys_addr_t limit,
phys_addr_t alignment, unsigned int order_per_bit,
bool fixed, struct cma **res_cma);
-extern int cma_init_reserved_mem(phys_addr_t base,
- phys_addr_t size, int order_per_bit,
+extern int cma_init_reserved_mem(phys_addr_t base, phys_addr_t size,
+ unsigned int order_per_bit,
struct cma **res_cma);
-extern struct page *cma_alloc(struct cma *cma, int count, unsigned int align);
-extern bool cma_release(struct cma *cma, struct page *pages, int count);
+extern struct page *cma_alloc(struct cma *cma, unsigned int count, unsigned int align);
+extern bool cma_release(struct cma *cma, const struct page *pages, unsigned int count);
#endif
#include <uapi/linux/types.h>
-static __always_inline void data_access_exceeds_word_size(void)
-#ifdef __compiletime_warning
-__compiletime_warning("data access exceeds word size and won't be atomic")
-#endif
-;
-
-static __always_inline void data_access_exceeds_word_size(void)
-{
-}
-
static __always_inline void __read_once_size(const volatile void *p, void *res, int size)
{
switch (size) {
case 1: *(__u8 *)res = *(volatile __u8 *)p; break;
case 2: *(__u16 *)res = *(volatile __u16 *)p; break;
case 4: *(__u32 *)res = *(volatile __u32 *)p; break;
-#ifdef CONFIG_64BIT
case 8: *(__u64 *)res = *(volatile __u64 *)p; break;
-#endif
default:
barrier();
__builtin_memcpy((void *)res, (const void *)p, size);
- data_access_exceeds_word_size();
barrier();
}
}
case 1: *(volatile __u8 *)p = *(__u8 *)res; break;
case 2: *(volatile __u16 *)p = *(__u16 *)res; break;
case 4: *(volatile __u32 *)p = *(__u32 *)res; break;
-#ifdef CONFIG_64BIT
case 8: *(volatile __u64 *)p = *(__u64 *)res; break;
-#endif
default:
barrier();
__builtin_memcpy((void *)p, (const void *)res, size);
- data_access_exceeds_word_size();
barrier();
}
}
#ifdef CONFIG_CONTEXT_TRACKING
extern void context_tracking_cpu_set(int cpu);
+extern void context_tracking_enter(enum ctx_state state);
+extern void context_tracking_exit(enum ctx_state state);
extern void context_tracking_user_enter(void);
extern void context_tracking_user_exit(void);
extern void __context_tracking_task_switch(struct task_struct *prev,
return 0;
prev_ctx = this_cpu_read(context_tracking.state);
- context_tracking_user_exit();
+ if (prev_ctx != CONTEXT_KERNEL)
+ context_tracking_exit(prev_ctx);
return prev_ctx;
}
static inline void exception_exit(enum ctx_state prev_ctx)
{
if (context_tracking_is_enabled()) {
- if (prev_ctx == IN_USER)
- context_tracking_user_enter();
+ if (prev_ctx != CONTEXT_KERNEL)
+ context_tracking_enter(prev_ctx);
}
}
vtime_guest_enter(current);
else
current->flags |= PF_VCPU;
+
+ if (context_tracking_is_enabled())
+ context_tracking_enter(CONTEXT_GUEST);
}
static inline void guest_exit(void)
{
+ if (context_tracking_is_enabled())
+ context_tracking_exit(CONTEXT_GUEST);
+
if (vtime_accounting_enabled())
vtime_guest_exit(current);
else
*/
bool active;
enum ctx_state {
- IN_KERNEL = 0,
- IN_USER,
+ CONTEXT_KERNEL = 0,
+ CONTEXT_USER,
+ CONTEXT_GUEST,
} state;
};
static inline bool context_tracking_in_user(void)
{
- return __this_cpu_read(context_tracking.state) == IN_USER;
+ return __this_cpu_read(context_tracking.state) == CONTEXT_USER;
}
#else
static inline bool context_tracking_in_user(void) { return false; }
static inline bool context_tracking_active(void) { return false; }
+static inline bool context_tracking_is_enabled(void) { return false; }
+static inline bool context_tracking_cpu_is_enabled(void) { return false; }
#endif /* CONFIG_CONTEXT_TRACKING */
#endif
/* migration should happen before other stuff but after perf */
CPU_PRI_PERF = 20,
CPU_PRI_MIGRATION = 10,
+ CPU_PRI_SMPBOOT = 9,
/* bring up workqueues before normal notifiers and down after */
CPU_PRI_WORKQUEUE_UP = 5,
CPU_PRI_WORKQUEUE_DOWN = -5,
* Called on the new cpu, just before
* enabling interrupts. Must not sleep,
* must not fail */
+#define CPU_DYING_IDLE 0x000B /* CPU (unsigned)v dying, reached
+ * idle loop. */
+#define CPU_BROKEN 0x000C /* CPU (unsigned)v did not die properly,
+ * perhaps due to preemption. */
/* Used for CPU hotplug events occurring while tasks are frozen due to a suspend
* operation in progress
}
#endif
+void smpboot_thread_init(void);
int cpu_up(unsigned int cpu);
void notify_cpu_starting(unsigned int cpu);
extern void cpu_maps_update_begin(void);
{
}
+static inline void smpboot_thread_init(void)
+{
+}
+
#endif /* CONFIG_SMP */
extern struct bus_type cpu_subsys;
void arch_cpu_idle_exit(void);
void arch_cpu_idle_dead(void);
+DECLARE_PER_CPU(bool, cpu_dead_idle);
+
+int cpu_report_state(int cpu);
+int cpu_check_up_prepare(int cpu);
+void cpu_set_state_online(int cpu);
+#ifdef CONFIG_HOTPLUG_CPU
+bool cpu_wait_death(unsigned int cpu, int seconds);
+bool cpu_report_death(void);
+#endif /* #ifdef CONFIG_HOTPLUG_CPU */
+
#endif /* _LINUX_CPU_H_ */
unsigned int cpu;
int last_residency;
- int state_count;
struct cpuidle_state_usage states_usage[CPUIDLE_STATE_MAX];
struct cpuidle_state_kobj *kobjs[CPUIDLE_STATE_MAX];
struct cpuidle_driver_kobj *kobj_driver;
lockdep_assert_held(&dev->mutex);
}
+static inline struct device_node *dev_of_node(struct device *dev)
+{
+ if (!IS_ENABLED(CONFIG_OF))
+ return NULL;
+ return dev->of_node;
+}
+
void driver_init(void);
/*
#include <asm/io.h>
#include <asm/scatterlist.h>
+struct device;
+
struct dma_pool *dma_pool_create(const char *name, struct device *dev,
size_t size, size_t align, size_t allocation);
#define EFI_64BIT 5 /* Is the firmware 64-bit? */
#define EFI_PARAVIRT 6 /* Access is via a paravirt interface */
#define EFI_ARCH_1 7 /* First arch-specific bit */
+#define EFI_DBG 8 /* Print additional debug info at runtime */
#ifdef CONFIG_EFI
/*
--- /dev/null
+#ifndef _ELF_RANDOMIZE_H
+#define _ELF_RANDOMIZE_H
+
+struct mm_struct;
+
+#ifndef CONFIG_ARCH_HAS_ELF_RANDOMIZE
+static inline unsigned long arch_mmap_rnd(void) { return 0; }
+# if defined(arch_randomize_brk) && defined(CONFIG_COMPAT_BRK)
+# define compat_brk_randomized
+# endif
+# ifndef arch_randomize_brk
+# define arch_randomize_brk(mm) (mm->brk)
+# endif
+#else
+extern unsigned long arch_mmap_rnd(void);
+extern unsigned long arch_randomize_brk(struct mm_struct *mm);
+# ifdef CONFIG_COMPAT_BRK
+# define compat_brk_randomized
+# endif
+#endif
+
+#endif
struct address_space;
struct writeback_control;
+#define IOCB_EVENTFD (1 << 0)
+
+struct kiocb {
+ struct file *ki_filp;
+ loff_t ki_pos;
+ void (*ki_complete)(struct kiocb *iocb, long ret, long ret2);
+ void *private;
+ int ki_flags;
+};
+
+static inline bool is_sync_kiocb(struct kiocb *kiocb)
+{
+ return kiocb->ki_complete == NULL;
+}
+
+static inline void init_sync_kiocb(struct kiocb *kiocb, struct file *filp)
+{
+ *kiocb = (struct kiocb) {
+ .ki_filp = filp,
+ };
+}
+
/*
* "descriptor" for what we're up to with a read.
* This allows us to use the same read code yet
long (*unlocked_ioctl) (struct file *, unsigned int, unsigned long);
long (*compat_ioctl) (struct file *, unsigned int, unsigned long);
int (*mmap) (struct file *, struct vm_area_struct *);
- void (*mremap)(struct file *, struct vm_area_struct *);
+ int (*mremap)(struct file *, struct vm_area_struct *);
int (*open) (struct inode *, struct file *);
int (*flush) (struct file *, fl_owner_t id);
int (*release) (struct inode *, struct file *);
const __user char *uptr; /* original userland pointer */
struct audit_names *aname;
int refcnt;
- bool separate; /* should "name" be freed? */
+ const char iname[];
};
extern long vfs_truncate(struct path *, loff_t);
struct trace_buffer;
struct tracer;
struct dentry;
+struct bpf_prog;
struct trace_print_flags {
unsigned long mask;
struct ftrace_event_call;
struct ftrace_event_class {
- char *system;
+ const char *system;
void *probe;
#ifdef CONFIG_PERF_EVENTS
void *perf_probe;
TRACE_EVENT_FL_WAS_ENABLED_BIT,
TRACE_EVENT_FL_USE_CALL_FILTER_BIT,
TRACE_EVENT_FL_TRACEPOINT_BIT,
+ TRACE_EVENT_FL_KPROBE_BIT,
};
/*
* it is best to clear the buffers that used it).
* USE_CALL_FILTER - For ftrace internal events, don't use file filter
* TRACEPOINT - Event is a tracepoint
+ * KPROBE - Event is a kprobe
*/
enum {
TRACE_EVENT_FL_FILTERED = (1 << TRACE_EVENT_FL_FILTERED_BIT),
TRACE_EVENT_FL_WAS_ENABLED = (1 << TRACE_EVENT_FL_WAS_ENABLED_BIT),
TRACE_EVENT_FL_USE_CALL_FILTER = (1 << TRACE_EVENT_FL_USE_CALL_FILTER_BIT),
TRACE_EVENT_FL_TRACEPOINT = (1 << TRACE_EVENT_FL_TRACEPOINT_BIT),
+ TRACE_EVENT_FL_KPROBE = (1 << TRACE_EVENT_FL_KPROBE_BIT),
};
struct ftrace_event_call {
struct tracepoint *tp;
};
struct trace_event event;
- const char *print_fmt;
+ char *print_fmt;
struct event_filter *filter;
void *mod;
void *data;
#ifdef CONFIG_PERF_EVENTS
int perf_refcount;
struct hlist_head __percpu *perf_events;
+ struct bpf_prog *prog;
int (*perf_perm)(struct ftrace_event_call *,
struct perf_event *);
event_triggers_post_call(file, tt);
}
+#ifdef CONFIG_BPF_SYSCALL
+unsigned int trace_call_bpf(struct bpf_prog *prog, void *ctx);
+#else
+static inline unsigned int trace_call_bpf(struct bpf_prog *prog, void *ctx)
+{
+ return 1;
+}
+#endif
+
enum {
FILTER_OTHER = 0,
FILTER_STATIC_STRING,
* _might_ fail. This depends upon the particular VM implementation.
*
* __GFP_NOFAIL: The VM implementation _must_ retry infinitely: the caller
- * cannot handle allocation failures. This modifier is deprecated and no new
- * users should be added.
+ * cannot handle allocation failures. New users should be evaluated carefully
+ * (and the flag should be used only when there is no reasonable failure policy)
+ * but it is definitely preferable to use the flag rather than opencode endless
+ * loop around allocator.
*
* __GFP_NORETRY: The VM implementation must not retry indefinitely.
*
__GFP_NOMEMALLOC | __GFP_NORETRY | __GFP_NOWARN | \
__GFP_NO_KSWAPD)
-/*
- * GFP_THISNODE does not perform any reclaim, you most likely want to
- * use __GFP_THISNODE to allocate from a given node without fallback!
- */
-#ifdef CONFIG_NUMA
-#define GFP_THISNODE (__GFP_THISNODE | __GFP_NOWARN | __GFP_NORETRY)
-#else
-#define GFP_THISNODE ((__force gfp_t)0)
-#endif
-
/* This mask makes up all the page movable related flags */
#define GFP_MOVABLE_MASK (__GFP_RECLAIMABLE|__GFP_MOVABLE)
extern void synchronize_irq(unsigned int irq);
-extern void synchronize_hardirq(unsigned int irq);
+extern bool synchronize_hardirq(unsigned int irq);
#if defined(CONFIG_TINY_RCU)
s32 logical_maximum;
};
+/**
+ * struct sensor_hub_pending - Synchronous read pending information
+ * @status: Pending status true/false.
+ * @ready: Completion synchronization data.
+ * @usage_id: Usage id for physical device, E.g. Gyro usage id.
+ * @attr_usage_id: Usage Id of a field, E.g. X-AXIS for a gyro.
+ * @raw_size: Response size for a read request.
+ * @raw_data: Place holder for received response.
+ */
+struct sensor_hub_pending {
+ bool status;
+ struct completion ready;
+ u32 usage_id;
+ u32 attr_usage_id;
+ int raw_size;
+ u8 *raw_data;
+};
+
/**
* struct hid_sensor_hub_device - Stores the hub instance data
* @hdev: Stores the hid instance.
* @vendor_id: Vendor id of hub device.
* @product_id: Product id of hub device.
+ * @usage: Usage id for this hub device instance.
* @start_collection_index: Starting index for a phy type collection
* @end_collection_index: Last index for a phy type collection
+ * @mutex: synchronizing mutex.
+ * @pending: Holds information of pending sync read request.
*/
struct hid_sensor_hub_device {
struct hid_device *hdev;
u32 vendor_id;
u32 product_id;
+ u32 usage;
int start_collection_index;
int end_collection_index;
+ struct mutex mutex;
+ struct sensor_hub_pending pending;
};
/**
* @usage_id: Attribute usage id of parent physical device as per spec
* @attr_usage_id: Attribute usage id as per spec
* @report_id: Report id to look for
+* @flag: Synchronous or asynchronous read
*
-* Issues a synchronous read request for an input attribute. Returns
-* data upto 32 bits. Since client can get events, so this call should
-* not be used for data paths, this will impact performance.
+* Issues a synchronous or asynchronous read request for an input attribute.
+* Returns data upto 32 bits.
*/
+enum sensor_hub_read_flags {
+ SENSOR_HUB_SYNC,
+ SENSOR_HUB_ASYNC,
+};
+
int sensor_hub_input_attr_get_raw_value(struct hid_sensor_hub_device *hsdev,
- u32 usage_id,
- u32 attr_usage_id, u32 report_id);
+ u32 usage_id,
+ u32 attr_usage_id, u32 report_id,
+ enum sensor_hub_read_flags flag
+);
+
/**
* sensor_hub_set_feature() - Feature set request
* @hsdev: Hub device instance.
* @report_id: Report id to look for
* @field_index: Field index inside a report
-* @value: Value to set
+* @buffer_size: size of the buffer
+* @buffer: buffer to use in the feature set
*
* Used to set a field in feature report. For example this can set polling
* interval, sensitivity, activate/deactivate state.
*/
int sensor_hub_set_feature(struct hid_sensor_hub_device *hsdev, u32 report_id,
- u32 field_index, s32 value);
+ u32 field_index, int buffer_size, void *buffer);
/**
* sensor_hub_get_feature() - Feature get request
* @hsdev: Hub device instance.
* @report_id: Report id to look for
* @field_index: Field index inside a report
-* @value: Place holder for return value
+* @buffer_size: size of the buffer
+* @buffer: buffer to copy output
*
* Used to get a field in feature report. For example this can get polling
-* interval, sensitivity, activate/deactivate state.
+* interval, sensitivity, activate/deactivate state. On success it returns
+* number of bytes copied to buffer. On failure, it returns value < 0.
*/
int sensor_hub_get_feature(struct hid_sensor_hub_device *hsdev, u32 report_id,
- u32 field_index, s32 *value);
+ u32 field_index, int buffer_size, void *buffer);
/* hid-sensor-attributes */
#define HID_MAX_PHY_DEVICES 0xFF
+#define HID_USAGE_SENSOR_COLLECTION 0x200001
+
/* Accel 3D (200073) */
#define HID_USAGE_SENSOR_ACCEL_3D 0x200073
#define HID_USAGE_SENSOR_DATA_ACCELERATION 0x200452
#define HID_UP_LED 0x00080000
#define HID_UP_BUTTON 0x00090000
#define HID_UP_ORDINAL 0x000a0000
+#define HID_UP_TELEPHONY 0x000b0000
#define HID_UP_CONSUMER 0x000c0000
#define HID_UP_DIGITIZER 0x000d0000
#define HID_UP_PID 0x000f0000
#define HID_DG_DEVICEINDEX 0x000d0053
#define HID_DG_CONTACTCOUNT 0x000d0054
#define HID_DG_CONTACTMAX 0x000d0055
+#define HID_DG_BUTTONTYPE 0x000d0059
#define HID_DG_BARRELSWITCH2 0x000d005a
#define HID_DG_TOOLSERIALNUMBER 0x000d005b
#ifdef CONFIG_HID_BATTERY_STRENGTH
/*
* Power supply information for HID devices which report
- * battery strength. power_supply is registered iff
- * battery.name is non-NULL.
+ * battery strength. power_supply was successfully registered if
+ * battery is non-NULL.
*/
- struct power_supply battery;
+ struct power_supply *battery;
__s32 battery_min;
__s32 battery_max;
__s32 battery_report_type;
#if IS_ENABLED(CONFIG_I2C_SLAVE)
enum i2c_slave_event {
- I2C_SLAVE_REQ_READ_START,
- I2C_SLAVE_REQ_READ_END,
- I2C_SLAVE_REQ_WRITE_START,
- I2C_SLAVE_REQ_WRITE_END,
+ I2C_SLAVE_READ_REQUESTED,
+ I2C_SLAVE_WRITE_REQUESTED,
+ I2C_SLAVE_READ_PROCESSED,
+ I2C_SLAVE_WRITE_RECEIVED,
I2C_SLAVE_STOP,
};
void (*set_scl)(struct i2c_adapter *, int val);
int (*get_sda)(struct i2c_adapter *);
- void (*prepare_recovery)(struct i2c_bus_recovery_info *bri);
- void (*unprepare_recovery)(struct i2c_bus_recovery_info *bri);
+ void (*prepare_recovery)(struct i2c_adapter *);
+ void (*unprepare_recovery)(struct i2c_adapter *);
/* gpio recovery */
int scl_gpio;
int i2c_generic_gpio_recovery(struct i2c_adapter *adap);
int i2c_generic_scl_recovery(struct i2c_adapter *adap);
+/**
+ * struct i2c_adapter_quirks - describe flaws of an i2c adapter
+ * @flags: see I2C_AQ_* for possible flags and read below
+ * @max_num_msgs: maximum number of messages per transfer
+ * @max_write_len: maximum length of a write message
+ * @max_read_len: maximum length of a read message
+ * @max_comb_1st_msg_len: maximum length of the first msg in a combined message
+ * @max_comb_2nd_msg_len: maximum length of the second msg in a combined message
+ *
+ * Note about combined messages: Some I2C controllers can only send one message
+ * per transfer, plus something called combined message or write-then-read.
+ * This is (usually) a small write message followed by a read message and
+ * barely enough to access register based devices like EEPROMs. There is a flag
+ * to support this mode. It implies max_num_msg = 2 and does the length checks
+ * with max_comb_*_len because combined message mode usually has its own
+ * limitations. Because of HW implementations, some controllers can actually do
+ * write-then-anything or other variants. To support that, write-then-read has
+ * been broken out into smaller bits like write-first and read-second which can
+ * be combined as needed.
+ */
+
+struct i2c_adapter_quirks {
+ u64 flags;
+ int max_num_msgs;
+ u16 max_write_len;
+ u16 max_read_len;
+ u16 max_comb_1st_msg_len;
+ u16 max_comb_2nd_msg_len;
+};
+
+/* enforce max_num_msgs = 2 and use max_comb_*_len for length checks */
+#define I2C_AQ_COMB BIT(0)
+/* first combined message must be write */
+#define I2C_AQ_COMB_WRITE_FIRST BIT(1)
+/* second combined message must be read */
+#define I2C_AQ_COMB_READ_SECOND BIT(2)
+/* both combined messages must have the same target address */
+#define I2C_AQ_COMB_SAME_ADDR BIT(3)
+/* convenience macro for typical write-then read case */
+#define I2C_AQ_COMB_WRITE_THEN_READ (I2C_AQ_COMB | I2C_AQ_COMB_WRITE_FIRST | \
+ I2C_AQ_COMB_READ_SECOND | I2C_AQ_COMB_SAME_ADDR)
+
/*
* i2c_adapter is the structure used to identify a physical i2c bus along
* with the access algorithms necessary to access it.
struct list_head userspace_clients;
struct i2c_bus_recovery_info *bus_recovery_info;
+ const struct i2c_adapter_quirks *quirks;
};
#define to_i2c_adapter(d) container_of(d, struct i2c_adapter, dev)
* struct iio_buffer_access_funcs - access functions for buffers.
* @store_to: actually store stuff to the buffer
* @read_first_n: try to get a specified number of bytes (must exist)
- * @data_available: indicates whether data for reading from the buffer is
- * available.
+ * @data_available: indicates how much data is available for reading from
+ * the buffer.
* @request_update: if a parameter change has been marked, update underlying
* storage.
* @set_bytes_per_datum:set number of bytes per datum
int (*read_first_n)(struct iio_buffer *buffer,
size_t n,
char __user *buf);
- bool (*data_available)(struct iio_buffer *buffer);
+ size_t (*data_available)(struct iio_buffer *buffer);
int (*request_update)(struct iio_buffer *buffer);
* @demux_bounce: [INTERN] buffer for doing gather from incoming scan.
* @buffer_list: [INTERN] entry in the devices list of current buffers.
* @ref: [INTERN] reference count of the buffer.
+ * @watermark: [INTERN] number of datums to wait for poll/read.
*/
struct iio_buffer {
int length;
void *demux_bounce;
struct list_head buffer_list;
struct kref ref;
+ unsigned int watermark;
};
/**
#define IIO_DAC_MAX517_H_
struct max517_platform_data {
- u16 vref_mv[2];
+ u16 vref_mv[8];
};
#endif /* IIO_DAC_MAX517_H_ */
#ifndef _IIO_EVENTS_H_
#define _IIO_EVENTS_H_
-#include <linux/ioctl.h>
-#include <linux/types.h>
#include <linux/iio/types.h>
-
-/**
- * struct iio_event_data - The actual event being pushed to userspace
- * @id: event identifier
- * @timestamp: best estimate of time of event occurrence (often from
- * the interrupt handler)
- */
-struct iio_event_data {
- __u64 id;
- __s64 timestamp;
-};
-
-#define IIO_GET_EVENT_FD_IOCTL _IOR('i', 0x90, int)
+#include <uapi/linux/iio/events.h>
/**
* IIO_EVENT_CODE() - create event identifier
#define IIO_UNMOD_EVENT_CODE(chan_type, number, type, direction) \
IIO_EVENT_CODE(chan_type, 0, 0, direction, type, number, 0, 0)
-#define IIO_EVENT_CODE_EXTRACT_TYPE(mask) ((mask >> 56) & 0xFF)
-
-#define IIO_EVENT_CODE_EXTRACT_DIR(mask) ((mask >> 48) & 0x7F)
-
-#define IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(mask) ((mask >> 32) & 0xFF)
-
-/* Event code number extraction depends on which type of event we have.
- * Perhaps review this function in the future*/
-#define IIO_EVENT_CODE_EXTRACT_CHAN(mask) ((__s16)(mask & 0xFFFF))
-#define IIO_EVENT_CODE_EXTRACT_CHAN2(mask) ((__s16)(((mask) >> 16) & 0xFFFF))
-
-#define IIO_EVENT_CODE_EXTRACT_MODIFIER(mask) ((mask >> 40) & 0xFF)
-#define IIO_EVENT_CODE_EXTRACT_DIFF(mask) (((mask) >> 55) & 0x1)
-
#endif
* provide a custom of_xlate function that reads the
* *args* and returns the appropriate index in registered
* IIO channels array.
+ * @hwfifo_set_watermark: function pointer to set the current hardware
+ * fifo watermark level; see hwfifo_* entries in
+ * Documentation/ABI/testing/sysfs-bus-iio for details on
+ * how the hardware fifo operates
+ * @hwfifo_flush_to_buffer: function pointer to flush the samples stored
+ * in the hardware fifo to the device buffer. The driver
+ * should not flush more than count samples. The function
+ * must return the number of samples flushed, 0 if no
+ * samples were flushed or a negative integer if no samples
+ * were flushed and there was an error.
**/
struct iio_info {
struct module *driver_module;
unsigned *readval);
int (*of_xlate)(struct iio_dev *indio_dev,
const struct of_phandle_args *iiospec);
+ int (*hwfifo_set_watermark)(struct iio_dev *indio_dev, unsigned val);
+ int (*hwfifo_flush_to_buffer)(struct iio_dev *indio_dev,
+ unsigned count);
};
/**
#ifndef _IIO_TYPES_H_
#define _IIO_TYPES_H_
-enum iio_chan_type {
- IIO_VOLTAGE,
- IIO_CURRENT,
- IIO_POWER,
- IIO_ACCEL,
- IIO_ANGL_VEL,
- IIO_MAGN,
- IIO_LIGHT,
- IIO_INTENSITY,
- IIO_PROXIMITY,
- IIO_TEMP,
- IIO_INCLI,
- IIO_ROT,
- IIO_ANGL,
- IIO_TIMESTAMP,
- IIO_CAPACITANCE,
- IIO_ALTVOLTAGE,
- IIO_CCT,
- IIO_PRESSURE,
- IIO_HUMIDITYRELATIVE,
- IIO_ACTIVITY,
- IIO_STEPS,
- IIO_ENERGY,
- IIO_DISTANCE,
- IIO_VELOCITY,
-};
-
-enum iio_modifier {
- IIO_NO_MOD,
- IIO_MOD_X,
- IIO_MOD_Y,
- IIO_MOD_Z,
- IIO_MOD_X_AND_Y,
- IIO_MOD_X_AND_Z,
- IIO_MOD_Y_AND_Z,
- IIO_MOD_X_AND_Y_AND_Z,
- IIO_MOD_X_OR_Y,
- IIO_MOD_X_OR_Z,
- IIO_MOD_Y_OR_Z,
- IIO_MOD_X_OR_Y_OR_Z,
- IIO_MOD_LIGHT_BOTH,
- IIO_MOD_LIGHT_IR,
- IIO_MOD_ROOT_SUM_SQUARED_X_Y,
- IIO_MOD_SUM_SQUARED_X_Y_Z,
- IIO_MOD_LIGHT_CLEAR,
- IIO_MOD_LIGHT_RED,
- IIO_MOD_LIGHT_GREEN,
- IIO_MOD_LIGHT_BLUE,
- IIO_MOD_QUATERNION,
- IIO_MOD_TEMP_AMBIENT,
- IIO_MOD_TEMP_OBJECT,
- IIO_MOD_NORTH_MAGN,
- IIO_MOD_NORTH_TRUE,
- IIO_MOD_NORTH_MAGN_TILT_COMP,
- IIO_MOD_NORTH_TRUE_TILT_COMP,
- IIO_MOD_RUNNING,
- IIO_MOD_JOGGING,
- IIO_MOD_WALKING,
- IIO_MOD_STILL,
- IIO_MOD_ROOT_SUM_SQUARED_X_Y_Z,
-};
-
-enum iio_event_type {
- IIO_EV_TYPE_THRESH,
- IIO_EV_TYPE_MAG,
- IIO_EV_TYPE_ROC,
- IIO_EV_TYPE_THRESH_ADAPTIVE,
- IIO_EV_TYPE_MAG_ADAPTIVE,
- IIO_EV_TYPE_CHANGE,
-};
+#include <uapi/linux/iio/types.h>
enum iio_event_info {
IIO_EV_INFO_ENABLE,
IIO_EV_INFO_PERIOD,
};
-enum iio_event_direction {
- IIO_EV_DIR_EITHER,
- IIO_EV_DIR_RISING,
- IIO_EV_DIR_FALLING,
- IIO_EV_DIR_NONE,
-};
-
#define IIO_VAL_INT 1
#define IIO_VAL_INT_PLUS_MICRO 2
#define IIO_VAL_INT_PLUS_NANO 3
* obs_kernel_param "array" too far apart in .init.setup.
*/
#define __setup_param(str, unique_id, fn, early) \
- static const char __setup_str_##unique_id[] __initconst \
- __aligned(1) = str; \
- static struct obs_kernel_param __setup_##unique_id \
- __used __section(.init.setup) \
- __attribute__((aligned((sizeof(long))))) \
+ static const char __setup_str_##unique_id[] __initconst \
+ __aligned(1) = str; \
+ static struct obs_kernel_param __setup_##unique_id \
+ __used __section(.init.setup) \
+ __attribute__((aligned((sizeof(long))))) \
= { __setup_str_##unique_id, fn, early }
-#define __setup(str, fn) \
+#define __setup(str, fn) \
__setup_param(str, fn, fn, 0)
-/* NOTE: fn is as per module_param, not __setup! Emits warning if fn
- * returns non-zero. */
-#define early_param(str, fn) \
+/*
+ * NOTE: fn is as per module_param, not __setup!
+ * Emits warning if fn returns non-zero.
+ */
+#define early_param(str, fn) \
__setup_param(str, fn, fn, 1)
+#define early_param_on_off(str_on, str_off, var, config) \
+ \
+ int var = IS_ENABLED(config); \
+ \
+ static int __init parse_##var##_on(char *arg) \
+ { \
+ var = 1; \
+ return 0; \
+ } \
+ __setup_param(str_on, parse_##var##_on, parse_##var##_on, 1); \
+ \
+ static int __init parse_##var##_off(char *arg) \
+ { \
+ var = 0; \
+ return 0; \
+ } \
+ __setup_param(str_off, parse_##var##_off, parse_##var##_off, 1)
+
/* Relies on boot_command_line being set */
void __init parse_early_param(void);
void __init parse_early_options(char *cmdline);
+++ /dev/null
-/*
- * intel_mid_dma.h - Intel MID DMA Drivers
- *
- * Copyright (C) 2008-10 Intel Corp
- * Author: Vinod Koul <vinod.koul@intel.com>
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
- *
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- *
- */
-#ifndef __INTEL_MID_DMA_H__
-#define __INTEL_MID_DMA_H__
-
-#include <linux/dmaengine.h>
-
-#define DMA_PREP_CIRCULAR_LIST (1 << 10)
-
-/*DMA mode configurations*/
-enum intel_mid_dma_mode {
- LNW_DMA_PER_TO_MEM = 0, /*periphral to memory configuration*/
- LNW_DMA_MEM_TO_PER, /*memory to periphral configuration*/
- LNW_DMA_MEM_TO_MEM, /*mem to mem confg (testing only)*/
-};
-
-/*DMA handshaking*/
-enum intel_mid_dma_hs_mode {
- LNW_DMA_HW_HS = 0, /*HW Handshaking only*/
- LNW_DMA_SW_HS = 1, /*SW Handshaking not recommended*/
-};
-
-/*Burst size configuration*/
-enum intel_mid_dma_msize {
- LNW_DMA_MSIZE_1 = 0x0,
- LNW_DMA_MSIZE_4 = 0x1,
- LNW_DMA_MSIZE_8 = 0x2,
- LNW_DMA_MSIZE_16 = 0x3,
- LNW_DMA_MSIZE_32 = 0x4,
- LNW_DMA_MSIZE_64 = 0x5,
-};
-
-/**
- * struct intel_mid_dma_slave - DMA slave structure
- *
- * @dirn: DMA trf direction
- * @src_width: tx register width
- * @dst_width: rx register width
- * @hs_mode: HW/SW handshaking mode
- * @cfg_mode: DMA data transfer mode (per-per/mem-per/mem-mem)
- * @src_msize: Source DMA burst size
- * @dst_msize: Dst DMA burst size
- * @per_addr: Periphral address
- * @device_instance: DMA peripheral device instance, we can have multiple
- * peripheral device connected to single DMAC
- */
-struct intel_mid_dma_slave {
- enum intel_mid_dma_hs_mode hs_mode; /*handshaking*/
- enum intel_mid_dma_mode cfg_mode; /*mode configuration*/
- unsigned int device_instance; /*0, 1 for periphral instance*/
- struct dma_slave_config dma_slave;
-};
-
-#endif /*__INTEL_MID_DMA_H__*/
* These flags used only by the kernel as part of the
* irq handling routines.
*
- * IRQF_DISABLED - keep irqs disabled when calling the action handler.
- * DEPRECATED. This flag is a NOOP and scheduled to be removed
* IRQF_SHARED - allow sharing the irq among several devices
* IRQF_PROBE_SHARED - set by callers when they expect sharing mismatches to occur
* IRQF_TIMER - Flag to mark this interrupt as timer interrupt
* wakeup devices users need to implement wakeup detection in
* their interrupt handlers.
*/
-#define IRQF_DISABLED 0x00000020
#define IRQF_SHARED 0x00000080
#define IRQF_PROBE_SHARED 0x00000100
#define __IRQF_TIMER 0x00000200
#endif
extern void disable_irq_nosync(unsigned int irq);
+extern bool disable_hardirq(unsigned int irq);
extern void disable_irq(unsigned int irq);
extern void disable_percpu_irq(unsigned int irq);
extern void enable_irq(unsigned int irq);
return irq_set_irq_wake(irq, 0);
}
+/*
+ * irq_get_irqchip_state/irq_set_irqchip_state specific flags
+ */
+enum irqchip_irq_state {
+ IRQCHIP_STATE_PENDING, /* Is interrupt pending? */
+ IRQCHIP_STATE_ACTIVE, /* Is interrupt in progress? */
+ IRQCHIP_STATE_MASKED, /* Is interrupt masked? */
+ IRQCHIP_STATE_LINE_LEVEL, /* Is IRQ line high? */
+};
+
+extern int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
+ bool *state);
+extern int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
+ bool state);
#ifdef CONFIG_IRQ_FORCED_THREADING
extern bool force_irqthreads;
}
#endif
+#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
+void __init ioremap_huge_init(void);
+int arch_ioremap_pud_supported(void);
+int arch_ioremap_pmd_supported(void);
+#else
+static inline void ioremap_huge_init(void) { }
+#endif
+
/*
* Managed iomap interface
*/
struct seq_file;
struct module;
struct msi_msg;
+enum irqchip_irq_state;
/*
* IRQ line status.
* irq_request_resources
* @irq_compose_msi_msg: optional to compose message content for MSI
* @irq_write_msi_msg: optional to write message content for MSI
+ * @irq_get_irqchip_state: return the internal state of an interrupt
+ * @irq_set_irqchip_state: set the internal state of a interrupt
* @flags: chip specific flags
*/
struct irq_chip {
void (*irq_compose_msi_msg)(struct irq_data *data, struct msi_msg *msg);
void (*irq_write_msi_msg)(struct irq_data *data, struct msi_msg *msg);
+ int (*irq_get_irqchip_state)(struct irq_data *data, enum irqchip_irq_state which, bool *state);
+ int (*irq_set_irqchip_state)(struct irq_data *data, enum irqchip_irq_state which, bool state);
+
unsigned long flags;
};
extern int irq_chip_set_affinity_parent(struct irq_data *data,
const struct cpumask *dest,
bool force);
+extern int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on);
#endif
/* Handling of unhandled and spurious interrupts: */
bool irq_work_queue_on(struct irq_work *work, int cpu);
#endif
-void irq_work_run(void);
void irq_work_tick(void);
void irq_work_sync(struct irq_work *work);
#ifdef CONFIG_IRQ_WORK
#include <asm/irq_work.h>
+void irq_work_run(void);
bool irq_work_needs_cpu(void);
#else
static inline bool irq_work_needs_cpu(void) { return false; }
+static inline void irq_work_run(void) { }
#endif
#endif /* _LINUX_IRQ_WORK_H */
extern struct irq_chip gic_arch_extn;
+void gic_set_irqchip_flags(unsigned long flags);
void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
u32 offset, struct device_node *);
void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
void gic_migrate_target(unsigned int new_cpu_id);
unsigned long gic_get_sgir_physaddr(void);
-extern const struct irq_domain_ops *gic_routable_irq_domain_ops;
-static inline void __init register_routable_domain_ops
- (const struct irq_domain_ops *ops)
-{
- gic_routable_irq_domain_ops = ops;
-}
#endif /* __ASSEMBLY */
#endif
+++ /dev/null
-/*
- * drivers/irqchip/irq-crossbar.h
- *
- * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-int irqcrossbar_init(void);
extern cycle_t gic_read_compare(void);
extern void gic_write_compare(cycle_t cnt);
extern void gic_write_cpu_compare(cycle_t cnt, int cpu);
+extern void gic_start_count(void);
+extern void gic_stop_count(void);
extern void gic_send_ipi(unsigned int intr);
extern unsigned int plat_ipi_call_int_xlate(unsigned int);
extern unsigned int plat_ipi_resched_int_xlate(unsigned int);
* The local_irq_*() APIs are equal to the raw_local_irq*()
* if !TRACE_IRQFLAGS.
*/
-#ifdef CONFIG_TRACE_IRQFLAGS_SUPPORT
+#ifdef CONFIG_TRACE_IRQFLAGS
#define local_irq_enable() \
do { trace_hardirqs_on(); raw_local_irq_enable(); } while (0)
#define local_irq_disable() \
raw_local_irq_restore(flags); \
} \
} while (0)
-#define local_save_flags(flags) \
- do { \
- raw_local_save_flags(flags); \
- } while (0)
-
-#define irqs_disabled_flags(flags) \
- ({ \
- raw_irqs_disabled_flags(flags); \
- })
-
-#define irqs_disabled() \
- ({ \
- unsigned long _flags; \
- raw_local_save_flags(_flags); \
- raw_irqs_disabled_flags(_flags); \
- })
#define safe_halt() \
do { \
} while (0)
-#else /* !CONFIG_TRACE_IRQFLAGS_SUPPORT */
+#else /* !CONFIG_TRACE_IRQFLAGS */
#define local_irq_enable() do { raw_local_irq_enable(); } while (0)
#define local_irq_disable() do { raw_local_irq_disable(); } while (0)
raw_local_irq_save(flags); \
} while (0)
#define local_irq_restore(flags) do { raw_local_irq_restore(flags); } while (0)
-#define local_save_flags(flags) do { raw_local_save_flags(flags); } while (0)
-#define irqs_disabled() (raw_irqs_disabled())
-#define irqs_disabled_flags(flags) (raw_irqs_disabled_flags(flags))
#define safe_halt() do { raw_safe_halt(); } while (0)
+#endif /* CONFIG_TRACE_IRQFLAGS */
+
+#define local_save_flags(flags) raw_local_save_flags(flags)
+
+/*
+ * Some architectures don't define arch_irqs_disabled(), so even if either
+ * definition would be fine we need to use different ones for the time being
+ * to avoid build issues.
+ */
+#ifdef CONFIG_TRACE_IRQFLAGS_SUPPORT
+#define irqs_disabled() \
+ ({ \
+ unsigned long _flags; \
+ raw_local_save_flags(_flags); \
+ raw_irqs_disabled_flags(_flags); \
+ })
+#else /* !CONFIG_TRACE_IRQFLAGS_SUPPORT */
+#define irqs_disabled() raw_irqs_disabled()
#endif /* CONFIG_TRACE_IRQFLAGS_SUPPORT */
+#define irqs_disabled_flags(flags) raw_irqs_disabled_flags(flags)
+
#endif
* same as using STATIC_KEY_INIT_FALSE.
*/
+#if defined(CC_HAVE_ASM_GOTO) && defined(CONFIG_JUMP_LABEL)
+# define HAVE_JUMP_LABEL
+#endif
+
+#ifndef __ASSEMBLY__
+
#include <linux/types.h>
#include <linux/compiler.h>
#include <linux/bug.h>
"%s used before call to jump_label_init", \
__func__)
-#if defined(CC_HAVE_ASM_GOTO) && defined(CONFIG_JUMP_LABEL)
+#ifdef HAVE_JUMP_LABEL
struct static_key {
atomic_t enabled;
#endif
};
-# include <asm/jump_label.h>
-# define HAVE_JUMP_LABEL
#else
struct static_key {
atomic_t enabled;
};
-#endif /* CC_HAVE_ASM_GOTO && CONFIG_JUMP_LABEL */
+#endif /* HAVE_JUMP_LABEL */
+#endif /* __ASSEMBLY__ */
+
+#ifdef HAVE_JUMP_LABEL
+#include <asm/jump_label.h>
+#endif
+
+#ifndef __ASSEMBLY__
enum jump_label_type {
JUMP_LABEL_DISABLE = 0,
}
#endif /* _LINUX_JUMP_LABEL_H */
+
+#endif /* __ASSEMBLY__ */
KVM_NR_BUSES
};
-int kvm_io_bus_write(struct kvm *kvm, enum kvm_bus bus_idx, gpa_t addr,
+int kvm_io_bus_write(struct kvm_vcpu *vcpu, enum kvm_bus bus_idx, gpa_t addr,
int len, const void *val);
-int kvm_io_bus_write_cookie(struct kvm *kvm, enum kvm_bus bus_idx, gpa_t addr,
- int len, const void *val, long cookie);
-int kvm_io_bus_read(struct kvm *kvm, enum kvm_bus bus_idx, gpa_t addr, int len,
- void *val);
+int kvm_io_bus_write_cookie(struct kvm_vcpu *vcpu, enum kvm_bus bus_idx,
+ gpa_t addr, int len, const void *val, long cookie);
+int kvm_io_bus_read(struct kvm_vcpu *vcpu, enum kvm_bus bus_idx, gpa_t addr,
+ int len, void *val);
int kvm_io_bus_register_dev(struct kvm *kvm, enum kvm_bus bus_idx, gpa_t addr,
int len, struct kvm_io_device *dev);
int kvm_io_bus_unregister_dev(struct kvm *kvm, enum kvm_bus bus_idx,
int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu);
void *kvm_kvzalloc(unsigned long size);
-void kvm_kvfree(const void *addr);
#ifndef __KVM_HAVE_ARCH_VM_ALLOC
static inline struct kvm *kvm_arch_alloc_vm(void)
#endif
}
+#ifdef __KVM_HAVE_ARCH_INTC_INITIALIZED
+/*
+ * returns true if the virtual interrupt controller is initialized and
+ * ready to accept virtual IRQ. On some architectures the virtual interrupt
+ * controller is dynamically instantiated and this is not always true.
+ */
+bool kvm_arch_intc_initialized(struct kvm *kvm);
+#else
+static inline bool kvm_arch_intc_initialized(struct kvm *kvm)
+{
+ return true;
+}
+#endif
+
int kvm_arch_init_vm(struct kvm *kvm, unsigned long type);
void kvm_arch_destroy_vm(struct kvm *kvm);
void kvm_arch_sync_events(struct kvm *kvm);
* one time slice). Lets treat guest mode as quiescent state, just like
* we do with user-mode execution.
*/
- rcu_virt_note_context_switch(smp_processor_id());
+ if (!context_tracking_cpu_is_enabled())
+ rcu_virt_note_context_switch(smp_processor_id());
}
static inline void kvm_guest_exit(void)
#endif /* CONFIG_HAVE_KVM_EVENTFD */
#ifdef CONFIG_KVM_APIC_ARCHITECTURE
-static inline bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
+static inline bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
{
return vcpu->kvm->bsp_vcpu_id == vcpu->vcpu_id;
}
+static inline bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
+{
+ return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
+}
+
bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu);
#else
ATA_FLAG_SW_ACTIVITY = (1 << 22), /* driver supports sw activity
* led */
ATA_FLAG_NO_DIPM = (1 << 23), /* host not happy with DIPM */
- ATA_FLAG_LOWTAG = (1 << 24), /* host wants lowest available tag */
- ATA_FLAG_SAS_HOST = (1 << 25), /* SAS host */
+ ATA_FLAG_SAS_HOST = (1 << 24), /* SAS host */
/* bits 24:31 of ap->flags are reserved for LLD specific flags */
enum klp_state state;
};
-extern int klp_register_patch(struct klp_patch *);
-extern int klp_unregister_patch(struct klp_patch *);
-extern int klp_enable_patch(struct klp_patch *);
-extern int klp_disable_patch(struct klp_patch *);
+int klp_register_patch(struct klp_patch *);
+int klp_unregister_patch(struct klp_patch *);
+int klp_enable_patch(struct klp_patch *);
+int klp_disable_patch(struct klp_patch *);
#endif /* CONFIG_LIVEPATCH */
# define might_lock_read(lock) do { } while (0)
#endif
-#ifdef CONFIG_PROVE_RCU
+#ifdef CONFIG_LOCKDEP
void lockdep_rcu_suspicious(const char *file, const int line, const char *s);
+#else
+static inline void
+lockdep_rcu_suspicious(const char *file, const int line, const char *s)
+{
+}
#endif
#endif /* __LINUX_LOCKDEP_H */
#define __initdata_memblock
#endif
+#ifdef CONFIG_MEMTEST
+extern void early_memtest(phys_addr_t start, phys_addr_t end);
+#else
+static inline void early_memtest(phys_addr_t start, phys_addr_t end)
+{
+}
+#endif
+
#else
static inline phys_addr_t memblock_alloc(phys_addr_t size, phys_addr_t align)
{
void get_online_mems(void);
void put_online_mems(void);
+void mem_hotplug_begin(void);
+void mem_hotplug_done(void);
+
#else /* ! CONFIG_MEMORY_HOTPLUG */
/*
* Stub functions for when hotplug is off
static inline void get_online_mems(void) {}
static inline void put_online_mems(void) {}
+static inline void mem_hotplug_begin(void) {}
+static inline void mem_hotplug_done(void) {}
+
#endif /* ! CONFIG_MEMORY_HOTPLUG */
#ifdef CONFIG_MEMORY_HOTREMOVE
mempool_free_t *free_fn, void *pool_data,
gfp_t gfp_mask, int nid);
-extern int mempool_resize(mempool_t *pool, int new_min_nr, gfp_t gfp_mask);
+extern int mempool_resize(mempool_t *pool, int new_min_nr);
extern void mempool_destroy(mempool_t *pool);
extern void * mempool_alloc(mempool_t *pool, gfp_t gfp_mask);
extern void mempool_free(void *element, mempool_t *pool);
#include <linux/power_supply.h>
-#define psy_to_ux500_charger(x) container_of((x), \
- struct ux500_charger, psy)
+/*
+ * Valid only for supplies of type:
+ * - POWER_SUPPLY_TYPE_MAINS,
+ * - POWER_SUPPLY_TYPE_USB,
+ * because only them store as drv_data pointer to struct ux500_charger.
+ */
+#define psy_to_ux500_charger(x) power_supply_get_drvdata(psy)
/* Forward declaration */
struct ux500_charger;
* @power_path USB power path support
*/
struct ux500_charger {
- struct power_supply psy;
+ struct power_supply *psy;
struct ux500_charger_ops ops;
int max_out_volt;
int max_out_curr;
WM5102 = 1,
WM5110 = 2,
WM8997 = 3,
+ WM8280 = 4,
};
#define ARIZONA_IRQ_GP1 0
+++ /dev/null
-/*
- * GPIO configuration for Arizona devices
- *
- * Copyright 2013 Wolfson Microelectronics. PLC.
- *
- * Author: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef _ARIZONA_GPIO_H
-#define _ARIZONA_GPIO_H
-
-#define ARIZONA_GP_FN_TXLRCLK 0x00
-#define ARIZONA_GP_FN_GPIO 0x01
-#define ARIZONA_GP_FN_IRQ1 0x02
-#define ARIZONA_GP_FN_IRQ2 0x03
-#define ARIZONA_GP_FN_OPCLK 0x04
-#define ARIZONA_GP_FN_FLL1_OUT 0x05
-#define ARIZONA_GP_FN_FLL2_OUT 0x06
-#define ARIZONA_GP_FN_PWM1 0x08
-#define ARIZONA_GP_FN_PWM2 0x09
-#define ARIZONA_GP_FN_SYSCLK_UNDERCLOCKED 0x0A
-#define ARIZONA_GP_FN_ASYNCCLK_UNDERCLOCKED 0x0B
-#define ARIZONA_GP_FN_FLL1_LOCK 0x0C
-#define ARIZONA_GP_FN_FLL2_LOCK 0x0D
-#define ARIZONA_GP_FN_FLL1_CLOCK_OK 0x0F
-#define ARIZONA_GP_FN_FLL2_CLOCK_OK 0x10
-#define ARIZONA_GP_FN_HEADPHONE_DET 0x12
-#define ARIZONA_GP_FN_MIC_DET 0x13
-#define ARIZONA_GP_FN_WSEQ_STATUS 0x15
-#define ARIZONA_GP_FN_CIF_ADDRESS_ERROR 0x16
-#define ARIZONA_GP_FN_ASRC1_LOCK 0x1A
-#define ARIZONA_GP_FN_ASRC2_LOCK 0x1B
-#define ARIZONA_GP_FN_ASRC_CONFIG_ERROR 0x1C
-#define ARIZONA_GP_FN_DRC1_SIGNAL_DETECT 0x1D
-#define ARIZONA_GP_FN_DRC1_ANTICLIP 0x1E
-#define ARIZONA_GP_FN_DRC1_DECAY 0x1F
-#define ARIZONA_GP_FN_DRC1_NOISE 0x20
-#define ARIZONA_GP_FN_DRC1_QUICK_RELEASE 0x21
-#define ARIZONA_GP_FN_DRC2_SIGNAL_DETECT 0x22
-#define ARIZONA_GP_FN_DRC2_ANTICLIP 0x23
-#define ARIZONA_GP_FN_DRC2_DECAY 0x24
-#define ARIZONA_GP_FN_DRC2_NOISE 0x25
-#define ARIZONA_GP_FN_DRC2_QUICK_RELEASE 0x26
-#define ARIZONA_GP_FN_MIXER_DROPPED_SAMPLE 0x27
-#define ARIZONA_GP_FN_AIF1_CONFIG_ERROR 0x28
-#define ARIZONA_GP_FN_AIF2_CONFIG_ERROR 0x29
-#define ARIZONA_GP_FN_AIF3_CONFIG_ERROR 0x2A
-#define ARIZONA_GP_FN_SPK_TEMP_SHUTDOWN 0x2B
-#define ARIZONA_GP_FN_SPK_TEMP_WARNING 0x2C
-#define ARIZONA_GP_FN_UNDERCLOCKED 0x2D
-#define ARIZONA_GP_FN_OVERCLOCKED 0x2E
-#define ARIZONA_GP_FN_DSP_IRQ1 0x35
-#define ARIZONA_GP_FN_DSP_IRQ2 0x36
-#define ARIZONA_GP_FN_ASYNC_OPCLK 0x3D
-#define ARIZONA_GP_FN_BOOT_DONE 0x44
-#define ARIZONA_GP_FN_DSP1_RAM_READY 0x45
-#define ARIZONA_GP_FN_SYSCLK_ENA_STATUS 0x4B
-#define ARIZONA_GP_FN_ASYNCCLK_ENA_STATUS 0x4C
-
-#define ARIZONA_GPN_DIR 0x8000 /* GPN_DIR */
-#define ARIZONA_GPN_DIR_MASK 0x8000 /* GPN_DIR */
-#define ARIZONA_GPN_DIR_SHIFT 15 /* GPN_DIR */
-#define ARIZONA_GPN_DIR_WIDTH 1 /* GPN_DIR */
-#define ARIZONA_GPN_PU 0x4000 /* GPN_PU */
-#define ARIZONA_GPN_PU_MASK 0x4000 /* GPN_PU */
-#define ARIZONA_GPN_PU_SHIFT 14 /* GPN_PU */
-#define ARIZONA_GPN_PU_WIDTH 1 /* GPN_PU */
-#define ARIZONA_GPN_PD 0x2000 /* GPN_PD */
-#define ARIZONA_GPN_PD_MASK 0x2000 /* GPN_PD */
-#define ARIZONA_GPN_PD_SHIFT 13 /* GPN_PD */
-#define ARIZONA_GPN_PD_WIDTH 1 /* GPN_PD */
-#define ARIZONA_GPN_LVL 0x0800 /* GPN_LVL */
-#define ARIZONA_GPN_LVL_MASK 0x0800 /* GPN_LVL */
-#define ARIZONA_GPN_LVL_SHIFT 11 /* GPN_LVL */
-#define ARIZONA_GPN_LVL_WIDTH 1 /* GPN_LVL */
-#define ARIZONA_GPN_POL 0x0400 /* GPN_POL */
-#define ARIZONA_GPN_POL_MASK 0x0400 /* GPN_POL */
-#define ARIZONA_GPN_POL_SHIFT 10 /* GPN_POL */
-#define ARIZONA_GPN_POL_WIDTH 1 /* GPN_POL */
-#define ARIZONA_GPN_OP_CFG 0x0200 /* GPN_OP_CFG */
-#define ARIZONA_GPN_OP_CFG_MASK 0x0200 /* GPN_OP_CFG */
-#define ARIZONA_GPN_OP_CFG_SHIFT 9 /* GPN_OP_CFG */
-#define ARIZONA_GPN_OP_CFG_WIDTH 1 /* GPN_OP_CFG */
-#define ARIZONA_GPN_DB 0x0100 /* GPN_DB */
-#define ARIZONA_GPN_DB_MASK 0x0100 /* GPN_DB */
-#define ARIZONA_GPN_DB_SHIFT 8 /* GPN_DB */
-#define ARIZONA_GPN_DB_WIDTH 1 /* GPN_DB */
-#define ARIZONA_GPN_FN_MASK 0x007F /* GPN_DB */
-#define ARIZONA_GPN_FN_SHIFT 0 /* GPN_DB */
-#define ARIZONA_GPN_FN_WIDTH 7 /* GPN_DB */
-
-#endif
#ifndef _ARIZONA_PDATA_H
#define _ARIZONA_PDATA_H
-#define ARIZONA_GPN_DIR 0x8000 /* GPN_DIR */
+#include <dt-bindings/mfd/arizona.h>
+
#define ARIZONA_GPN_DIR_MASK 0x8000 /* GPN_DIR */
#define ARIZONA_GPN_DIR_SHIFT 15 /* GPN_DIR */
#define ARIZONA_GPN_DIR_WIDTH 1 /* GPN_DIR */
-#define ARIZONA_GPN_PU 0x4000 /* GPN_PU */
#define ARIZONA_GPN_PU_MASK 0x4000 /* GPN_PU */
#define ARIZONA_GPN_PU_SHIFT 14 /* GPN_PU */
#define ARIZONA_GPN_PU_WIDTH 1 /* GPN_PU */
-#define ARIZONA_GPN_PD 0x2000 /* GPN_PD */
#define ARIZONA_GPN_PD_MASK 0x2000 /* GPN_PD */
#define ARIZONA_GPN_PD_SHIFT 13 /* GPN_PD */
#define ARIZONA_GPN_PD_WIDTH 1 /* GPN_PD */
-#define ARIZONA_GPN_LVL 0x0800 /* GPN_LVL */
#define ARIZONA_GPN_LVL_MASK 0x0800 /* GPN_LVL */
#define ARIZONA_GPN_LVL_SHIFT 11 /* GPN_LVL */
#define ARIZONA_GPN_LVL_WIDTH 1 /* GPN_LVL */
-#define ARIZONA_GPN_POL 0x0400 /* GPN_POL */
#define ARIZONA_GPN_POL_MASK 0x0400 /* GPN_POL */
#define ARIZONA_GPN_POL_SHIFT 10 /* GPN_POL */
#define ARIZONA_GPN_POL_WIDTH 1 /* GPN_POL */
-#define ARIZONA_GPN_OP_CFG 0x0200 /* GPN_OP_CFG */
#define ARIZONA_GPN_OP_CFG_MASK 0x0200 /* GPN_OP_CFG */
#define ARIZONA_GPN_OP_CFG_SHIFT 9 /* GPN_OP_CFG */
#define ARIZONA_GPN_OP_CFG_WIDTH 1 /* GPN_OP_CFG */
-#define ARIZONA_GPN_DB 0x0100 /* GPN_DB */
#define ARIZONA_GPN_DB_MASK 0x0100 /* GPN_DB */
#define ARIZONA_GPN_DB_SHIFT 8 /* GPN_DB */
#define ARIZONA_GPN_DB_WIDTH 1 /* GPN_DB */
#define ARIZONA_MAX_GPIO 5
-#define ARIZONA_32KZ_MCLK1 1
-#define ARIZONA_32KZ_MCLK2 2
-#define ARIZONA_32KZ_NONE 3
-
#define ARIZONA_MAX_INPUT 4
-#define ARIZONA_DMIC_MICVDD 0
-#define ARIZONA_DMIC_MICBIAS1 1
-#define ARIZONA_DMIC_MICBIAS2 2
-#define ARIZONA_DMIC_MICBIAS3 3
-
#define ARIZONA_MAX_MICBIAS 3
-#define ARIZONA_INMODE_DIFF 0
-#define ARIZONA_INMODE_SE 1
-#define ARIZONA_INMODE_DMIC 2
-
#define ARIZONA_MAX_OUTPUT 6
#define ARIZONA_MAX_AIF 3
int gpio_base;
/** Pin state for GPIO pins */
- int gpio_defaults[ARIZONA_MAX_GPIO];
+ unsigned int gpio_defaults[ARIZONA_MAX_GPIO];
/**
* Maximum number of channels clocks will be generated for,
/* MAX77693 ITORCH register */
#define TORCH_IOUT1_SHIFT 0
#define TORCH_IOUT2_SHIFT 4
+#define TORCH_IOUT_MASK(x) (0xf << (x))
#define TORCH_IOUT_MIN 15625
#define TORCH_IOUT_MAX 250000
#define TORCH_IOUT_STEP 15625
#define FLASH_EN_FLASH 0x1
#define FLASH_EN_TORCH 0x2
#define FLASH_EN_ON 0x3
-#define FLASH_EN_SHIFT(x) (6 - ((x) - 1) * 2)
-#define TORCH_EN_SHIFT(x) (2 - ((x) - 1) * 2)
+#define FLASH_EN_SHIFT(x) (6 - (x) * 2)
+#define TORCH_EN_SHIFT(x) (2 - (x) * 2)
/* MAX77693 MAX_FLASH1 register */
#define MAX_FLASH1_MAX_FL_EN 0x80
#ifndef __LINUX_MFD_MAX77693_H
#define __LINUX_MFD_MAX77693_H
-/* MAX77686 regulator IDs */
+/* MAX77693 regulator IDs */
enum max77693_regulators {
MAX77693_ESAFEOUT1 = 0,
MAX77693_ESAFEOUT2,
MAX77693_REG_MAX,
};
-struct max77693_regulator_data {
- int id;
- struct regulator_init_data *initdata;
- struct device_node *of_node;
-};
-
struct max77693_reg_data {
u8 addr;
u8 data;
MAX77693_LED_BOOST_FIXED,
};
-struct max77693_led_platform_data {
- u32 fleds[2];
- u32 iout_torch[2];
- u32 iout_flash[2];
- u32 trigger[2];
- u32 trigger_type[2];
- u32 num_leds;
- u32 boost_mode;
- u32 flash_timeout;
- u32 boost_vout;
- u32 low_vsys;
-};
-
/* MAX77693 */
struct max77693_platform_data {
- /* regulator data */
- struct max77693_regulator_data *regulators;
- int num_regulators;
-
/* muic data */
struct max77693_muic_platform_data *muic_data;
struct max77693_led_platform_data *led_data;
--- /dev/null
+/*
+ * Common variables for the Maxim MAX77843 driver
+ *
+ * Copyright (C) 2015 Samsung Electronics
+ * Author: Jaewon Kim <jaewon02.kim@samsung.com>
+ * Author: Beomho Seo <beomho.seo@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __MAX77843_PRIVATE_H_
+#define __MAX77843_PRIVATE_H_
+
+#include <linux/i2c.h>
+#include <linux/regmap.h>
+
+#define I2C_ADDR_TOPSYS (0xCC >> 1)
+#define I2C_ADDR_CHG (0xD2 >> 1)
+#define I2C_ADDR_FG (0x6C >> 1)
+#define I2C_ADDR_MUIC (0x4A >> 1)
+
+/* Topsys, Haptic and LED registers */
+enum max77843_sys_reg {
+ MAX77843_SYS_REG_PMICID = 0x00,
+ MAX77843_SYS_REG_PMICREV = 0x01,
+ MAX77843_SYS_REG_MAINCTRL1 = 0x02,
+ MAX77843_SYS_REG_INTSRC = 0x22,
+ MAX77843_SYS_REG_INTSRCMASK = 0x23,
+ MAX77843_SYS_REG_SYSINTSRC = 0x24,
+ MAX77843_SYS_REG_SYSINTMASK = 0x26,
+ MAX77843_SYS_REG_TOPSYS_STAT = 0x28,
+ MAX77843_SYS_REG_SAFEOUTCTRL = 0xC6,
+
+ MAX77843_SYS_REG_END,
+};
+
+enum max77843_haptic_reg {
+ MAX77843_HAP_REG_MCONFIG = 0x10,
+
+ MAX77843_HAP_REG_END,
+};
+
+enum max77843_led_reg {
+ MAX77843_LED_REG_LEDEN = 0x30,
+ MAX77843_LED_REG_LED0BRT = 0x31,
+ MAX77843_LED_REG_LED1BRT = 0x32,
+ MAX77843_LED_REG_LED2BRT = 0x33,
+ MAX77843_LED_REG_LED3BRT = 0x34,
+ MAX77843_LED_REG_LEDBLNK = 0x38,
+ MAX77843_LED_REG_LEDRAMP = 0x36,
+
+ MAX77843_LED_REG_END,
+};
+
+/* Charger registers */
+enum max77843_charger_reg {
+ MAX77843_CHG_REG_CHG_INT = 0xB0,
+ MAX77843_CHG_REG_CHG_INT_MASK = 0xB1,
+ MAX77843_CHG_REG_CHG_INT_OK = 0xB2,
+ MAX77843_CHG_REG_CHG_DTLS_00 = 0xB3,
+ MAX77843_CHG_REG_CHG_DTLS_01 = 0xB4,
+ MAX77843_CHG_REG_CHG_DTLS_02 = 0xB5,
+ MAX77843_CHG_REG_CHG_CNFG_00 = 0xB7,
+ MAX77843_CHG_REG_CHG_CNFG_01 = 0xB8,
+ MAX77843_CHG_REG_CHG_CNFG_02 = 0xB9,
+ MAX77843_CHG_REG_CHG_CNFG_03 = 0xBA,
+ MAX77843_CHG_REG_CHG_CNFG_04 = 0xBB,
+ MAX77843_CHG_REG_CHG_CNFG_06 = 0xBD,
+ MAX77843_CHG_REG_CHG_CNFG_07 = 0xBE,
+ MAX77843_CHG_REG_CHG_CNFG_09 = 0xC0,
+ MAX77843_CHG_REG_CHG_CNFG_10 = 0xC1,
+ MAX77843_CHG_REG_CHG_CNFG_11 = 0xC2,
+ MAX77843_CHG_REG_CHG_CNFG_12 = 0xC3,
+
+ MAX77843_CHG_REG_END,
+};
+
+/* Fuel gauge registers */
+enum max77843_fuelgauge {
+ MAX77843_FG_REG_STATUS = 0x00,
+ MAX77843_FG_REG_VALRT_TH = 0x01,
+ MAX77843_FG_REG_TALRT_TH = 0x02,
+ MAX77843_FG_REG_SALRT_TH = 0x03,
+ MAX77843_FG_RATE_AT_RATE = 0x04,
+ MAX77843_FG_REG_REMCAP_REP = 0x05,
+ MAX77843_FG_REG_SOCREP = 0x06,
+ MAX77843_FG_REG_AGE = 0x07,
+ MAX77843_FG_REG_TEMP = 0x08,
+ MAX77843_FG_REG_VCELL = 0x09,
+ MAX77843_FG_REG_CURRENT = 0x0A,
+ MAX77843_FG_REG_AVG_CURRENT = 0x0B,
+ MAX77843_FG_REG_SOCMIX = 0x0D,
+ MAX77843_FG_REG_SOCAV = 0x0E,
+ MAX77843_FG_REG_REMCAP_MIX = 0x0F,
+ MAX77843_FG_REG_FULLCAP = 0x10,
+ MAX77843_FG_REG_AVG_TEMP = 0x16,
+ MAX77843_FG_REG_CYCLES = 0x17,
+ MAX77843_FG_REG_AVG_VCELL = 0x19,
+ MAX77843_FG_REG_CONFIG = 0x1D,
+ MAX77843_FG_REG_REMCAP_AV = 0x1F,
+ MAX77843_FG_REG_FULLCAP_NOM = 0x23,
+ MAX77843_FG_REG_MISCCFG = 0x2B,
+ MAX77843_FG_REG_RCOMP = 0x38,
+ MAX77843_FG_REG_FSTAT = 0x3D,
+ MAX77843_FG_REG_DQACC = 0x45,
+ MAX77843_FG_REG_DPACC = 0x46,
+ MAX77843_FG_REG_OCV = 0xEE,
+ MAX77843_FG_REG_VFOCV = 0xFB,
+ MAX77843_FG_SOCVF = 0xFF,
+
+ MAX77843_FG_END,
+};
+
+/* MUIC registers */
+enum max77843_muic_reg {
+ MAX77843_MUIC_REG_ID = 0x00,
+ MAX77843_MUIC_REG_INT1 = 0x01,
+ MAX77843_MUIC_REG_INT2 = 0x02,
+ MAX77843_MUIC_REG_INT3 = 0x03,
+ MAX77843_MUIC_REG_STATUS1 = 0x04,
+ MAX77843_MUIC_REG_STATUS2 = 0x05,
+ MAX77843_MUIC_REG_STATUS3 = 0x06,
+ MAX77843_MUIC_REG_INTMASK1 = 0x07,
+ MAX77843_MUIC_REG_INTMASK2 = 0x08,
+ MAX77843_MUIC_REG_INTMASK3 = 0x09,
+ MAX77843_MUIC_REG_CDETCTRL1 = 0x0A,
+ MAX77843_MUIC_REG_CDETCTRL2 = 0x0B,
+ MAX77843_MUIC_REG_CONTROL1 = 0x0C,
+ MAX77843_MUIC_REG_CONTROL2 = 0x0D,
+ MAX77843_MUIC_REG_CONTROL3 = 0x0E,
+ MAX77843_MUIC_REG_CONTROL4 = 0x16,
+ MAX77843_MUIC_REG_HVCONTROL1 = 0x17,
+ MAX77843_MUIC_REG_HVCONTROL2 = 0x18,
+
+ MAX77843_MUIC_REG_END,
+};
+
+enum max77843_irq {
+ /* Topsys: SYSTEM */
+ MAX77843_SYS_IRQ_SYSINTSRC_SYSUVLO_INT,
+ MAX77843_SYS_IRQ_SYSINTSRC_SYSOVLO_INT,
+ MAX77843_SYS_IRQ_SYSINTSRC_TSHDN_INT,
+ MAX77843_SYS_IRQ_SYSINTSRC_TM_INT,
+
+ /* Charger: CHG_INT */
+ MAX77843_CHG_IRQ_CHG_INT_BYP_I,
+ MAX77843_CHG_IRQ_CHG_INT_BATP_I,
+ MAX77843_CHG_IRQ_CHG_INT_BAT_I,
+ MAX77843_CHG_IRQ_CHG_INT_CHG_I,
+ MAX77843_CHG_IRQ_CHG_INT_WCIN_I,
+ MAX77843_CHG_IRQ_CHG_INT_CHGIN_I,
+ MAX77843_CHG_IRQ_CHG_INT_AICL_I,
+
+ MAX77843_IRQ_NUM,
+};
+
+enum max77843_irq_muic {
+ /* MUIC: INT1 */
+ MAX77843_MUIC_IRQ_INT1_ADC,
+ MAX77843_MUIC_IRQ_INT1_ADCERROR,
+ MAX77843_MUIC_IRQ_INT1_ADC1K,
+
+ /* MUIC: INT2 */
+ MAX77843_MUIC_IRQ_INT2_CHGTYP,
+ MAX77843_MUIC_IRQ_INT2_CHGDETRUN,
+ MAX77843_MUIC_IRQ_INT2_DCDTMR,
+ MAX77843_MUIC_IRQ_INT2_DXOVP,
+ MAX77843_MUIC_IRQ_INT2_VBVOLT,
+
+ /* MUIC: INT3 */
+ MAX77843_MUIC_IRQ_INT3_VBADC,
+ MAX77843_MUIC_IRQ_INT3_VDNMON,
+ MAX77843_MUIC_IRQ_INT3_DNRES,
+ MAX77843_MUIC_IRQ_INT3_MPNACK,
+ MAX77843_MUIC_IRQ_INT3_MRXBUFOW,
+ MAX77843_MUIC_IRQ_INT3_MRXTRF,
+ MAX77843_MUIC_IRQ_INT3_MRXPERR,
+ MAX77843_MUIC_IRQ_INT3_MRXRDY,
+
+ MAX77843_MUIC_IRQ_NUM,
+};
+
+/* MAX77843 interrupts */
+#define MAX77843_SYS_IRQ_SYSUVLO_INT BIT(0)
+#define MAX77843_SYS_IRQ_SYSOVLO_INT BIT(1)
+#define MAX77843_SYS_IRQ_TSHDN_INT BIT(2)
+#define MAX77843_SYS_IRQ_TM_INT BIT(3)
+
+/* MAX77843 MAINCTRL1 register */
+#define MAINCTRL1_BIASEN_SHIFT 7
+#define MAX77843_MAINCTRL1_BIASEN_MASK BIT(MAINCTRL1_BIASEN_SHIFT)
+
+/* MAX77843 MCONFIG register */
+#define MCONFIG_MODE_SHIFT 7
+#define MCONFIG_MEN_SHIFT 6
+#define MCONFIG_PDIV_SHIFT 0
+
+#define MAX77843_MCONFIG_MODE_MASK BIT(MCONFIG_MODE_SHIFT)
+#define MAX77843_MCONFIG_MEN_MASK BIT(MCONFIG_MEN_SHIFT)
+#define MAX77843_MCONFIG_PDIV_MASK (0x3 << MCONFIG_PDIV_SHIFT)
+
+/* Max77843 charger insterrupts */
+#define MAX77843_CHG_BYP_I BIT(0)
+#define MAX77843_CHG_BATP_I BIT(2)
+#define MAX77843_CHG_BAT_I BIT(3)
+#define MAX77843_CHG_CHG_I BIT(4)
+#define MAX77843_CHG_WCIN_I BIT(5)
+#define MAX77843_CHG_CHGIN_I BIT(6)
+#define MAX77843_CHG_AICL_I BIT(7)
+
+/* MAX77843 CHG_INT_OK register */
+#define MAX77843_CHG_BYP_OK BIT(0)
+#define MAX77843_CHG_BATP_OK BIT(2)
+#define MAX77843_CHG_BAT_OK BIT(3)
+#define MAX77843_CHG_CHG_OK BIT(4)
+#define MAX77843_CHG_WCIN_OK BIT(5)
+#define MAX77843_CHG_CHGIN_OK BIT(6)
+#define MAX77843_CHG_AICL_OK BIT(7)
+
+/* MAX77843 CHG_DETAILS_00 register */
+#define MAX77843_CHG_BAT_DTLS BIT(0)
+
+/* MAX77843 CHG_DETAILS_01 register */
+#define MAX77843_CHG_DTLS_MASK 0x0f
+#define MAX77843_CHG_PQ_MODE 0x00
+#define MAX77843_CHG_CC_MODE 0x01
+#define MAX77843_CHG_CV_MODE 0x02
+#define MAX77843_CHG_TO_MODE 0x03
+#define MAX77843_CHG_DO_MODE 0x04
+#define MAX77843_CHG_HT_MODE 0x05
+#define MAX77843_CHG_TF_MODE 0x06
+#define MAX77843_CHG_TS_MODE 0x07
+#define MAX77843_CHG_OFF_MODE 0x08
+
+#define MAX77843_CHG_BAT_DTLS_MASK 0xf0
+#define MAX77843_CHG_NO_BAT (0x00 << 4)
+#define MAX77843_CHG_LOW_VOLT_BAT (0x01 << 4)
+#define MAX77843_CHG_LONG_BAT_TIME (0x02 << 4)
+#define MAX77843_CHG_OK_BAT (0x03 << 4)
+#define MAX77843_CHG_OK_LOW_VOLT_BAT (0x04 << 4)
+#define MAX77843_CHG_OVER_VOLT_BAT (0x05 << 4)
+#define MAX77843_CHG_OVER_CURRENT_BAT (0x06 << 4)
+
+/* MAX77843 CHG_CNFG_00 register */
+#define MAX77843_CHG_DISABLE 0x00
+#define MAX77843_CHG_ENABLE 0x05
+#define MAX77843_CHG_MASK 0x01
+#define MAX77843_CHG_BUCK_MASK 0x04
+
+/* MAX77843 CHG_CNFG_01 register */
+#define MAX77843_CHG_RESTART_THRESHOLD_100 0x00
+#define MAX77843_CHG_RESTART_THRESHOLD_150 0x10
+#define MAX77843_CHG_RESTART_THRESHOLD_200 0x20
+#define MAX77843_CHG_RESTART_THRESHOLD_DISABLE 0x30
+
+/* MAX77843 CHG_CNFG_02 register */
+#define MAX77843_CHG_FAST_CHG_CURRENT_MIN 100000
+#define MAX77843_CHG_FAST_CHG_CURRENT_MAX 3150000
+#define MAX77843_CHG_FAST_CHG_CURRENT_STEP 50000
+#define MAX77843_CHG_FAST_CHG_CURRENT_MASK 0x3f
+#define MAX77843_CHG_OTG_ILIMIT_500 (0x00 << 6)
+#define MAX77843_CHG_OTG_ILIMIT_900 (0x01 << 6)
+#define MAX77843_CHG_OTG_ILIMIT_1200 (0x02 << 6)
+#define MAX77843_CHG_OTG_ILIMIT_1500 (0x03 << 6)
+#define MAX77843_CHG_OTG_ILIMIT_MASK 0xc0
+
+/* MAX77843 CHG_CNFG_03 register */
+#define MAX77843_CHG_TOP_OFF_CURRENT_MIN 125000
+#define MAX77843_CHG_TOP_OFF_CURRENT_MAX 650000
+#define MAX77843_CHG_TOP_OFF_CURRENT_STEP 75000
+#define MAX77843_CHG_TOP_OFF_CURRENT_MASK 0x07
+
+/* MAX77843 CHG_CNFG_06 register */
+#define MAX77843_CHG_WRITE_CAP_BLOCK 0x10
+#define MAX77843_CHG_WRITE_CAP_UNBLOCK 0x0C
+
+/* MAX77843_CHG_CNFG_09_register */
+#define MAX77843_CHG_INPUT_CURRENT_LIMIT_MIN 100000
+#define MAX77843_CHG_INPUT_CURRENT_LIMIT_MAX 4000000
+#define MAX77843_CHG_INPUT_CURRENT_LIMIT_REF 3367000
+#define MAX77843_CHG_INPUT_CURRENT_LIMIT_STEP 33000
+
+#define MAX77843_MUIC_ADC BIT(0)
+#define MAX77843_MUIC_ADCERROR BIT(2)
+#define MAX77843_MUIC_ADC1K BIT(3)
+
+#define MAX77843_MUIC_CHGTYP BIT(0)
+#define MAX77843_MUIC_CHGDETRUN BIT(1)
+#define MAX77843_MUIC_DCDTMR BIT(2)
+#define MAX77843_MUIC_DXOVP BIT(3)
+#define MAX77843_MUIC_VBVOLT BIT(4)
+
+#define MAX77843_MUIC_VBADC BIT(0)
+#define MAX77843_MUIC_VDNMON BIT(1)
+#define MAX77843_MUIC_DNRES BIT(2)
+#define MAX77843_MUIC_MPNACK BIT(3)
+#define MAX77843_MUIC_MRXBUFOW BIT(4)
+#define MAX77843_MUIC_MRXTRF BIT(5)
+#define MAX77843_MUIC_MRXPERR BIT(6)
+#define MAX77843_MUIC_MRXRDY BIT(7)
+
+/* MAX77843 INTSRCMASK register */
+#define MAX77843_INTSRCMASK_CHGR 0
+#define MAX77843_INTSRCMASK_SYS 1
+#define MAX77843_INTSRCMASK_FG 2
+#define MAX77843_INTSRCMASK_MUIC 3
+
+#define MAX77843_INTSRCMASK_CHGR_MASK BIT(MAX77843_INTSRCMASK_CHGR)
+#define MAX77843_INTSRCMASK_SYS_MASK BIT(MAX77843_INTSRCMASK_SYS)
+#define MAX77843_INTSRCMASK_FG_MASK BIT(MAX77843_INTSRCMASK_FG)
+#define MAX77843_INTSRCMASK_MUIC_MASK BIT(MAX77843_INTSRCMASK_MUIC)
+
+#define MAX77843_INTSRC_MASK_MASK \
+ (MAX77843_INTSRCMASK_MUIC_MASK | MAX77843_INTSRCMASK_FG_MASK | \
+ MAX77843_INTSRCMASK_SYS_MASK | MAX77843_INTSRCMASK_CHGR_MASK)
+
+/* MAX77843 STATUS register*/
+#define STATUS1_ADC_SHIFT 0
+#define STATUS1_ADCERROR_SHIFT 6
+#define STATUS1_ADC1K_SHIFT 7
+#define STATUS2_CHGTYP_SHIFT 0
+#define STATUS2_CHGDETRUN_SHIFT 3
+#define STATUS2_DCDTMR_SHIFT 4
+#define STATUS2_DXOVP_SHIFT 5
+#define STATUS2_VBVOLT_SHIFT 6
+#define STATUS3_VBADC_SHIFT 0
+#define STATUS3_VDNMON_SHIFT 4
+#define STATUS3_DNRES_SHIFT 5
+#define STATUS3_MPNACK_SHIFT 6
+
+#define MAX77843_MUIC_STATUS1_ADC_MASK (0x1f << STATUS1_ADC_SHIFT)
+#define MAX77843_MUIC_STATUS1_ADCERROR_MASK BIT(STATUS1_ADCERROR_SHIFT)
+#define MAX77843_MUIC_STATUS1_ADC1K_MASK BIT(STATUS1_ADC1K_SHIFT)
+#define MAX77843_MUIC_STATUS2_CHGTYP_MASK (0x7 << STATUS2_CHGTYP_SHIFT)
+#define MAX77843_MUIC_STATUS2_CHGDETRUN_MASK BIT(STATUS2_CHGDETRUN_SHIFT)
+#define MAX77843_MUIC_STATUS2_DCDTMR_MASK BIT(STATUS2_DCDTMR_SHIFT)
+#define MAX77843_MUIC_STATUS2_DXOVP_MASK BIT(STATUS2_DXOVP_SHIFT)
+#define MAX77843_MUIC_STATUS2_VBVOLT_MASK BIT(STATUS2_VBVOLT_SHIFT)
+#define MAX77843_MUIC_STATUS3_VBADC_MASK (0xf << STATUS3_VBADC_SHIFT)
+#define MAX77843_MUIC_STATUS3_VDNMON_MASK BIT(STATUS3_VDNMON_SHIFT)
+#define MAX77843_MUIC_STATUS3_DNRES_MASK BIT(STATUS3_DNRES_SHIFT)
+#define MAX77843_MUIC_STATUS3_MPNACK_MASK BIT(STATUS3_MPNACK_SHIFT)
+
+/* MAX77843 CONTROL register */
+#define CONTROL1_COMP1SW_SHIFT 0
+#define CONTROL1_COMP2SW_SHIFT 3
+#define CONTROL1_IDBEN_SHIFT 7
+#define CONTROL2_LOWPWR_SHIFT 0
+#define CONTROL2_ADCEN_SHIFT 1
+#define CONTROL2_CPEN_SHIFT 2
+#define CONTROL2_ACC_DET_SHIFT 5
+#define CONTROL2_USBCPINT_SHIFT 6
+#define CONTROL2_RCPS_SHIFT 7
+#define CONTROL3_JIGSET_SHIFT 0
+#define CONTROL4_ADCDBSET_SHIFT 0
+#define CONTROL4_USBAUTO_SHIFT 4
+#define CONTROL4_FCTAUTO_SHIFT 5
+#define CONTROL4_ADCMODE_SHIFT 6
+
+#define MAX77843_MUIC_CONTROL1_COMP1SW_MASK (0x7 << CONTROL1_COMP1SW_SHIFT)
+#define MAX77843_MUIC_CONTROL1_COMP2SW_MASK (0x7 << CONTROL1_COMP2SW_SHIFT)
+#define MAX77843_MUIC_CONTROL1_IDBEN_MASK BIT(CONTROL1_IDBEN_SHIFT)
+#define MAX77843_MUIC_CONTROL2_LOWPWR_MASK BIT(CONTROL2_LOWPWR_SHIFT)
+#define MAX77843_MUIC_CONTROL2_ADCEN_MASK BIT(CONTROL2_ADCEN_SHIFT)
+#define MAX77843_MUIC_CONTROL2_CPEN_MASK BIT(CONTROL2_CPEN_SHIFT)
+#define MAX77843_MUIC_CONTROL2_ACC_DET_MASK BIT(CONTROL2_ACC_DET_SHIFT)
+#define MAX77843_MUIC_CONTROL2_USBCPINT_MASK BIT(CONTROL2_USBCPINT_SHIFT)
+#define MAX77843_MUIC_CONTROL2_RCPS_MASK BIT(CONTROL2_RCPS_SHIFT)
+#define MAX77843_MUIC_CONTROL3_JIGSET_MASK (0x3 << CONTROL3_JIGSET_SHIFT)
+#define MAX77843_MUIC_CONTROL4_ADCDBSET_MASK (0x3 << CONTROL4_ADCDBSET_SHIFT)
+#define MAX77843_MUIC_CONTROL4_USBAUTO_MASK BIT(CONTROL4_USBAUTO_SHIFT)
+#define MAX77843_MUIC_CONTROL4_FCTAUTO_MASK BIT(CONTROL4_FCTAUTO_SHIFT)
+#define MAX77843_MUIC_CONTROL4_ADCMODE_MASK (0x3 << CONTROL4_ADCMODE_SHIFT)
+
+/* MAX77843 switch port */
+#define COM_OPEN 0
+#define COM_USB 1
+#define COM_AUDIO 2
+#define COM_UART 3
+#define COM_AUX_USB 4
+#define COM_AUX_UART 5
+
+#define CONTROL1_COM_SW \
+ ((MAX77843_MUIC_CONTROL1_COMP1SW_MASK | \
+ MAX77843_MUIC_CONTROL1_COMP2SW_MASK))
+
+#define CONTROL1_SW_OPEN \
+ ((COM_OPEN << CONTROL1_COMP1SW_SHIFT | \
+ COM_OPEN << CONTROL1_COMP2SW_SHIFT))
+#define CONTROL1_SW_USB \
+ ((COM_USB << CONTROL1_COMP1SW_SHIFT | \
+ COM_USB << CONTROL1_COMP2SW_SHIFT))
+#define CONTROL1_SW_AUDIO \
+ ((COM_AUDIO << CONTROL1_COMP1SW_SHIFT | \
+ COM_AUDIO << CONTROL1_COMP2SW_SHIFT))
+#define CONTROL1_SW_UART \
+ ((COM_UART << CONTROL1_COMP1SW_SHIFT | \
+ COM_UART << CONTROL1_COMP2SW_SHIFT))
+#define CONTROL1_SW_AUX_USB \
+ ((COM_AUX_USB << CONTROL1_COMP1SW_SHIFT | \
+ COM_AUX_USB << CONTROL1_COMP2SW_SHIFT))
+#define CONTROL1_SW_AUX_UART \
+ ((COM_AUX_UART << CONTROL1_COMP1SW_SHIFT | \
+ COM_AUX_UART << CONTROL1_COMP2SW_SHIFT))
+
+#define MAX77843_DISABLE 0
+#define MAX77843_ENABLE 1
+
+#define CONTROL4_AUTO_DISABLE \
+ ((MAX77843_DISABLE << CONTROL4_USBAUTO_SHIFT) | \
+ (MAX77843_DISABLE << CONTROL4_FCTAUTO_SHIFT))
+#define CONTROL4_AUTO_ENABLE \
+ ((MAX77843_ENABLE << CONTROL4_USBAUTO_SHIFT) | \
+ (MAX77843_ENABLE << CONTROL4_FCTAUTO_SHIFT))
+
+/* MAX77843 SAFEOUT LDO Control register */
+#define SAFEOUTCTRL_SAFEOUT1_SHIFT 0
+#define SAFEOUTCTRL_SAFEOUT2_SHIFT 2
+#define SAFEOUTCTRL_ENSAFEOUT1_SHIFT 6
+#define SAFEOUTCTRL_ENSAFEOUT2_SHIFT 7
+
+#define MAX77843_REG_SAFEOUTCTRL_ENSAFEOUT1 \
+ BIT(SAFEOUTCTRL_ENSAFEOUT1_SHIFT)
+#define MAX77843_REG_SAFEOUTCTRL_ENSAFEOUT2 \
+ BIT(SAFEOUTCTRL_ENSAFEOUT2_SHIFT)
+#define MAX77843_REG_SAFEOUTCTRL_SAFEOUT1_MASK \
+ (0x3 << SAFEOUTCTRL_SAFEOUT1_SHIFT)
+#define MAX77843_REG_SAFEOUTCTRL_SAFEOUT2_MASK \
+ (0x3 << SAFEOUTCTRL_SAFEOUT2_SHIFT)
+
+struct max77843 {
+ struct device *dev;
+
+ struct i2c_client *i2c;
+ struct i2c_client *i2c_chg;
+ struct i2c_client *i2c_fuel;
+ struct i2c_client *i2c_muic;
+
+ struct regmap *regmap;
+ struct regmap *regmap_chg;
+ struct regmap *regmap_fuel;
+ struct regmap *regmap_muic;
+
+ struct regmap_irq_chip_data *irq_data;
+ struct regmap_irq_chip_data *irq_data_chg;
+ struct regmap_irq_chip_data *irq_data_fuel;
+ struct regmap_irq_chip_data *irq_data_muic;
+
+ int irq;
+};
+#endif /* __MAX77843_H__ */
extern int menelaus_set_vdcdc(int dcdc, unsigned int mV);
extern int menelaus_set_slot_sel(int enable);
extern int menelaus_get_slot_pin_states(void);
-extern int menelaus_set_vcore_sw(unsigned int mV);
extern int menelaus_set_vcore_hw(unsigned int roof_mV, unsigned int floor_mV);
#define EN_VPLL_SLEEP (1 << 7)
extern int menelaus_set_regulator_sleep(int enable, u32 val);
-#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_MENELAUS)
-#define omap_has_menelaus() 1
-#else
-#define omap_has_menelaus() 0
-#endif
-
#endif
--- /dev/null
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ * Author: Flora Fu, MediaTek
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MFD_MT6397_CORE_H__
+#define __MFD_MT6397_CORE_H__
+
+enum mt6397_irq_numbers {
+ MT6397_IRQ_SPKL_AB = 0,
+ MT6397_IRQ_SPKR_AB,
+ MT6397_IRQ_SPKL,
+ MT6397_IRQ_SPKR,
+ MT6397_IRQ_BAT_L,
+ MT6397_IRQ_BAT_H,
+ MT6397_IRQ_FG_BAT_L,
+ MT6397_IRQ_FG_BAT_H,
+ MT6397_IRQ_WATCHDOG,
+ MT6397_IRQ_PWRKEY,
+ MT6397_IRQ_THR_L,
+ MT6397_IRQ_THR_H,
+ MT6397_IRQ_VBATON_UNDET,
+ MT6397_IRQ_BVALID_DET,
+ MT6397_IRQ_CHRDET,
+ MT6397_IRQ_OV,
+ MT6397_IRQ_LDO,
+ MT6397_IRQ_HOMEKEY,
+ MT6397_IRQ_ACCDET,
+ MT6397_IRQ_AUDIO,
+ MT6397_IRQ_RTC,
+ MT6397_IRQ_PWRKEY_RSTB,
+ MT6397_IRQ_HDMI_SIFM,
+ MT6397_IRQ_HDMI_CEC,
+ MT6397_IRQ_VCA15,
+ MT6397_IRQ_VSRMCA15,
+ MT6397_IRQ_VCORE,
+ MT6397_IRQ_VGPU,
+ MT6397_IRQ_VIO18,
+ MT6397_IRQ_VPCA7,
+ MT6397_IRQ_VSRMCA7,
+ MT6397_IRQ_VDRM,
+ MT6397_IRQ_NR,
+};
+
+struct mt6397_chip {
+ struct device *dev;
+ struct regmap *regmap;
+ int irq;
+ struct irq_domain *irq_domain;
+ struct mutex irqlock;
+ u16 irq_masks_cur[2];
+ u16 irq_masks_cache[2];
+};
+
+#endif /* __MFD_MT6397_CORE_H__ */
--- /dev/null
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ * Author: Flora Fu, MediaTek
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MFD_MT6397_REGISTERS_H__
+#define __MFD_MT6397_REGISTERS_H__
+
+/* PMIC Registers */
+#define MT6397_CID 0x0100
+#define MT6397_TOP_CKPDN 0x0102
+#define MT6397_TOP_CKPDN_SET 0x0104
+#define MT6397_TOP_CKPDN_CLR 0x0106
+#define MT6397_TOP_CKPDN2 0x0108
+#define MT6397_TOP_CKPDN2_SET 0x010A
+#define MT6397_TOP_CKPDN2_CLR 0x010C
+#define MT6397_TOP_GPIO_CKPDN 0x010E
+#define MT6397_TOP_RST_CON 0x0114
+#define MT6397_WRP_CKPDN 0x011A
+#define MT6397_WRP_RST_CON 0x0120
+#define MT6397_TOP_RST_MISC 0x0126
+#define MT6397_TOP_CKCON1 0x0128
+#define MT6397_TOP_CKCON2 0x012A
+#define MT6397_TOP_CKTST1 0x012C
+#define MT6397_TOP_CKTST2 0x012E
+#define MT6397_OC_DEG_EN 0x0130
+#define MT6397_OC_CTL0 0x0132
+#define MT6397_OC_CTL1 0x0134
+#define MT6397_OC_CTL2 0x0136
+#define MT6397_INT_RSV 0x0138
+#define MT6397_TEST_CON0 0x013A
+#define MT6397_TEST_CON1 0x013C
+#define MT6397_STATUS0 0x013E
+#define MT6397_STATUS1 0x0140
+#define MT6397_PGSTATUS 0x0142
+#define MT6397_CHRSTATUS 0x0144
+#define MT6397_OCSTATUS0 0x0146
+#define MT6397_OCSTATUS1 0x0148
+#define MT6397_OCSTATUS2 0x014A
+#define MT6397_HDMI_PAD_IE 0x014C
+#define MT6397_TEST_OUT_L 0x014E
+#define MT6397_TEST_OUT_H 0x0150
+#define MT6397_TDSEL_CON 0x0152
+#define MT6397_RDSEL_CON 0x0154
+#define MT6397_GPIO_SMT_CON0 0x0156
+#define MT6397_GPIO_SMT_CON1 0x0158
+#define MT6397_GPIO_SMT_CON2 0x015A
+#define MT6397_GPIO_SMT_CON3 0x015C
+#define MT6397_DRV_CON0 0x015E
+#define MT6397_DRV_CON1 0x0160
+#define MT6397_DRV_CON2 0x0162
+#define MT6397_DRV_CON3 0x0164
+#define MT6397_DRV_CON4 0x0166
+#define MT6397_DRV_CON5 0x0168
+#define MT6397_DRV_CON6 0x016A
+#define MT6397_DRV_CON7 0x016C
+#define MT6397_DRV_CON8 0x016E
+#define MT6397_DRV_CON9 0x0170
+#define MT6397_DRV_CON10 0x0172
+#define MT6397_DRV_CON11 0x0174
+#define MT6397_DRV_CON12 0x0176
+#define MT6397_INT_CON0 0x0178
+#define MT6397_INT_CON1 0x017E
+#define MT6397_INT_STATUS0 0x0184
+#define MT6397_INT_STATUS1 0x0186
+#define MT6397_FQMTR_CON0 0x0188
+#define MT6397_FQMTR_CON1 0x018A
+#define MT6397_FQMTR_CON2 0x018C
+#define MT6397_EFUSE_DOUT_0_15 0x01C4
+#define MT6397_EFUSE_DOUT_16_31 0x01C6
+#define MT6397_EFUSE_DOUT_32_47 0x01C8
+#define MT6397_EFUSE_DOUT_48_63 0x01CA
+#define MT6397_SPI_CON 0x01CC
+#define MT6397_TOP_CKPDN3 0x01CE
+#define MT6397_TOP_CKCON3 0x01D4
+#define MT6397_EFUSE_DOUT_64_79 0x01D6
+#define MT6397_EFUSE_DOUT_80_95 0x01D8
+#define MT6397_EFUSE_DOUT_96_111 0x01DA
+#define MT6397_EFUSE_DOUT_112_127 0x01DC
+#define MT6397_EFUSE_DOUT_128_143 0x01DE
+#define MT6397_EFUSE_DOUT_144_159 0x01E0
+#define MT6397_EFUSE_DOUT_160_175 0x01E2
+#define MT6397_EFUSE_DOUT_176_191 0x01E4
+#define MT6397_EFUSE_DOUT_192_207 0x01E6
+#define MT6397_EFUSE_DOUT_208_223 0x01E8
+#define MT6397_EFUSE_DOUT_224_239 0x01EA
+#define MT6397_EFUSE_DOUT_240_255 0x01EC
+#define MT6397_EFUSE_DOUT_256_271 0x01EE
+#define MT6397_EFUSE_DOUT_272_287 0x01F0
+#define MT6397_EFUSE_DOUT_288_300 0x01F2
+#define MT6397_EFUSE_DOUT_304_319 0x01F4
+#define MT6397_BUCK_CON0 0x0200
+#define MT6397_BUCK_CON1 0x0202
+#define MT6397_BUCK_CON2 0x0204
+#define MT6397_BUCK_CON3 0x0206
+#define MT6397_BUCK_CON4 0x0208
+#define MT6397_BUCK_CON5 0x020A
+#define MT6397_BUCK_CON6 0x020C
+#define MT6397_BUCK_CON7 0x020E
+#define MT6397_BUCK_CON8 0x0210
+#define MT6397_BUCK_CON9 0x0212
+#define MT6397_VCA15_CON0 0x0214
+#define MT6397_VCA15_CON1 0x0216
+#define MT6397_VCA15_CON2 0x0218
+#define MT6397_VCA15_CON3 0x021A
+#define MT6397_VCA15_CON4 0x021C
+#define MT6397_VCA15_CON5 0x021E
+#define MT6397_VCA15_CON6 0x0220
+#define MT6397_VCA15_CON7 0x0222
+#define MT6397_VCA15_CON8 0x0224
+#define MT6397_VCA15_CON9 0x0226
+#define MT6397_VCA15_CON10 0x0228
+#define MT6397_VCA15_CON11 0x022A
+#define MT6397_VCA15_CON12 0x022C
+#define MT6397_VCA15_CON13 0x022E
+#define MT6397_VCA15_CON14 0x0230
+#define MT6397_VCA15_CON15 0x0232
+#define MT6397_VCA15_CON16 0x0234
+#define MT6397_VCA15_CON17 0x0236
+#define MT6397_VCA15_CON18 0x0238
+#define MT6397_VSRMCA15_CON0 0x023A
+#define MT6397_VSRMCA15_CON1 0x023C
+#define MT6397_VSRMCA15_CON2 0x023E
+#define MT6397_VSRMCA15_CON3 0x0240
+#define MT6397_VSRMCA15_CON4 0x0242
+#define MT6397_VSRMCA15_CON5 0x0244
+#define MT6397_VSRMCA15_CON6 0x0246
+#define MT6397_VSRMCA15_CON7 0x0248
+#define MT6397_VSRMCA15_CON8 0x024A
+#define MT6397_VSRMCA15_CON9 0x024C
+#define MT6397_VSRMCA15_CON10 0x024E
+#define MT6397_VSRMCA15_CON11 0x0250
+#define MT6397_VSRMCA15_CON12 0x0252
+#define MT6397_VSRMCA15_CON13 0x0254
+#define MT6397_VSRMCA15_CON14 0x0256
+#define MT6397_VSRMCA15_CON15 0x0258
+#define MT6397_VSRMCA15_CON16 0x025A
+#define MT6397_VSRMCA15_CON17 0x025C
+#define MT6397_VSRMCA15_CON18 0x025E
+#define MT6397_VSRMCA15_CON19 0x0260
+#define MT6397_VSRMCA15_CON20 0x0262
+#define MT6397_VSRMCA15_CON21 0x0264
+#define MT6397_VCORE_CON0 0x0266
+#define MT6397_VCORE_CON1 0x0268
+#define MT6397_VCORE_CON2 0x026A
+#define MT6397_VCORE_CON3 0x026C
+#define MT6397_VCORE_CON4 0x026E
+#define MT6397_VCORE_CON5 0x0270
+#define MT6397_VCORE_CON6 0x0272
+#define MT6397_VCORE_CON7 0x0274
+#define MT6397_VCORE_CON8 0x0276
+#define MT6397_VCORE_CON9 0x0278
+#define MT6397_VCORE_CON10 0x027A
+#define MT6397_VCORE_CON11 0x027C
+#define MT6397_VCORE_CON12 0x027E
+#define MT6397_VCORE_CON13 0x0280
+#define MT6397_VCORE_CON14 0x0282
+#define MT6397_VCORE_CON15 0x0284
+#define MT6397_VCORE_CON16 0x0286
+#define MT6397_VCORE_CON17 0x0288
+#define MT6397_VCORE_CON18 0x028A
+#define MT6397_VGPU_CON0 0x028C
+#define MT6397_VGPU_CON1 0x028E
+#define MT6397_VGPU_CON2 0x0290
+#define MT6397_VGPU_CON3 0x0292
+#define MT6397_VGPU_CON4 0x0294
+#define MT6397_VGPU_CON5 0x0296
+#define MT6397_VGPU_CON6 0x0298
+#define MT6397_VGPU_CON7 0x029A
+#define MT6397_VGPU_CON8 0x029C
+#define MT6397_VGPU_CON9 0x029E
+#define MT6397_VGPU_CON10 0x02A0
+#define MT6397_VGPU_CON11 0x02A2
+#define MT6397_VGPU_CON12 0x02A4
+#define MT6397_VGPU_CON13 0x02A6
+#define MT6397_VGPU_CON14 0x02A8
+#define MT6397_VGPU_CON15 0x02AA
+#define MT6397_VGPU_CON16 0x02AC
+#define MT6397_VGPU_CON17 0x02AE
+#define MT6397_VGPU_CON18 0x02B0
+#define MT6397_VIO18_CON0 0x0300
+#define MT6397_VIO18_CON1 0x0302
+#define MT6397_VIO18_CON2 0x0304
+#define MT6397_VIO18_CON3 0x0306
+#define MT6397_VIO18_CON4 0x0308
+#define MT6397_VIO18_CON5 0x030A
+#define MT6397_VIO18_CON6 0x030C
+#define MT6397_VIO18_CON7 0x030E
+#define MT6397_VIO18_CON8 0x0310
+#define MT6397_VIO18_CON9 0x0312
+#define MT6397_VIO18_CON10 0x0314
+#define MT6397_VIO18_CON11 0x0316
+#define MT6397_VIO18_CON12 0x0318
+#define MT6397_VIO18_CON13 0x031A
+#define MT6397_VIO18_CON14 0x031C
+#define MT6397_VIO18_CON15 0x031E
+#define MT6397_VIO18_CON16 0x0320
+#define MT6397_VIO18_CON17 0x0322
+#define MT6397_VIO18_CON18 0x0324
+#define MT6397_VPCA7_CON0 0x0326
+#define MT6397_VPCA7_CON1 0x0328
+#define MT6397_VPCA7_CON2 0x032A
+#define MT6397_VPCA7_CON3 0x032C
+#define MT6397_VPCA7_CON4 0x032E
+#define MT6397_VPCA7_CON5 0x0330
+#define MT6397_VPCA7_CON6 0x0332
+#define MT6397_VPCA7_CON7 0x0334
+#define MT6397_VPCA7_CON8 0x0336
+#define MT6397_VPCA7_CON9 0x0338
+#define MT6397_VPCA7_CON10 0x033A
+#define MT6397_VPCA7_CON11 0x033C
+#define MT6397_VPCA7_CON12 0x033E
+#define MT6397_VPCA7_CON13 0x0340
+#define MT6397_VPCA7_CON14 0x0342
+#define MT6397_VPCA7_CON15 0x0344
+#define MT6397_VPCA7_CON16 0x0346
+#define MT6397_VPCA7_CON17 0x0348
+#define MT6397_VPCA7_CON18 0x034A
+#define MT6397_VSRMCA7_CON0 0x034C
+#define MT6397_VSRMCA7_CON1 0x034E
+#define MT6397_VSRMCA7_CON2 0x0350
+#define MT6397_VSRMCA7_CON3 0x0352
+#define MT6397_VSRMCA7_CON4 0x0354
+#define MT6397_VSRMCA7_CON5 0x0356
+#define MT6397_VSRMCA7_CON6 0x0358
+#define MT6397_VSRMCA7_CON7 0x035A
+#define MT6397_VSRMCA7_CON8 0x035C
+#define MT6397_VSRMCA7_CON9 0x035E
+#define MT6397_VSRMCA7_CON10 0x0360
+#define MT6397_VSRMCA7_CON11 0x0362
+#define MT6397_VSRMCA7_CON12 0x0364
+#define MT6397_VSRMCA7_CON13 0x0366
+#define MT6397_VSRMCA7_CON14 0x0368
+#define MT6397_VSRMCA7_CON15 0x036A
+#define MT6397_VSRMCA7_CON16 0x036C
+#define MT6397_VSRMCA7_CON17 0x036E
+#define MT6397_VSRMCA7_CON18 0x0370
+#define MT6397_VSRMCA7_CON19 0x0372
+#define MT6397_VSRMCA7_CON20 0x0374
+#define MT6397_VSRMCA7_CON21 0x0376
+#define MT6397_VDRM_CON0 0x0378
+#define MT6397_VDRM_CON1 0x037A
+#define MT6397_VDRM_CON2 0x037C
+#define MT6397_VDRM_CON3 0x037E
+#define MT6397_VDRM_CON4 0x0380
+#define MT6397_VDRM_CON5 0x0382
+#define MT6397_VDRM_CON6 0x0384
+#define MT6397_VDRM_CON7 0x0386
+#define MT6397_VDRM_CON8 0x0388
+#define MT6397_VDRM_CON9 0x038A
+#define MT6397_VDRM_CON10 0x038C
+#define MT6397_VDRM_CON11 0x038E
+#define MT6397_VDRM_CON12 0x0390
+#define MT6397_VDRM_CON13 0x0392
+#define MT6397_VDRM_CON14 0x0394
+#define MT6397_VDRM_CON15 0x0396
+#define MT6397_VDRM_CON16 0x0398
+#define MT6397_VDRM_CON17 0x039A
+#define MT6397_VDRM_CON18 0x039C
+#define MT6397_BUCK_K_CON0 0x039E
+#define MT6397_BUCK_K_CON1 0x03A0
+#define MT6397_ANALDO_CON0 0x0400
+#define MT6397_ANALDO_CON1 0x0402
+#define MT6397_ANALDO_CON2 0x0404
+#define MT6397_ANALDO_CON3 0x0406
+#define MT6397_ANALDO_CON4 0x0408
+#define MT6397_ANALDO_CON5 0x040A
+#define MT6397_ANALDO_CON6 0x040C
+#define MT6397_ANALDO_CON7 0x040E
+#define MT6397_DIGLDO_CON0 0x0410
+#define MT6397_DIGLDO_CON1 0x0412
+#define MT6397_DIGLDO_CON2 0x0414
+#define MT6397_DIGLDO_CON3 0x0416
+#define MT6397_DIGLDO_CON4 0x0418
+#define MT6397_DIGLDO_CON5 0x041A
+#define MT6397_DIGLDO_CON6 0x041C
+#define MT6397_DIGLDO_CON7 0x041E
+#define MT6397_DIGLDO_CON8 0x0420
+#define MT6397_DIGLDO_CON9 0x0422
+#define MT6397_DIGLDO_CON10 0x0424
+#define MT6397_DIGLDO_CON11 0x0426
+#define MT6397_DIGLDO_CON12 0x0428
+#define MT6397_DIGLDO_CON13 0x042A
+#define MT6397_DIGLDO_CON14 0x042C
+#define MT6397_DIGLDO_CON15 0x042E
+#define MT6397_DIGLDO_CON16 0x0430
+#define MT6397_DIGLDO_CON17 0x0432
+#define MT6397_DIGLDO_CON18 0x0434
+#define MT6397_DIGLDO_CON19 0x0436
+#define MT6397_DIGLDO_CON20 0x0438
+#define MT6397_DIGLDO_CON21 0x043A
+#define MT6397_DIGLDO_CON22 0x043C
+#define MT6397_DIGLDO_CON23 0x043E
+#define MT6397_DIGLDO_CON24 0x0440
+#define MT6397_DIGLDO_CON25 0x0442
+#define MT6397_DIGLDO_CON26 0x0444
+#define MT6397_DIGLDO_CON27 0x0446
+#define MT6397_DIGLDO_CON28 0x0448
+#define MT6397_DIGLDO_CON29 0x044A
+#define MT6397_DIGLDO_CON30 0x044C
+#define MT6397_DIGLDO_CON31 0x044E
+#define MT6397_DIGLDO_CON32 0x0450
+#define MT6397_DIGLDO_CON33 0x045A
+#define MT6397_SPK_CON0 0x0600
+#define MT6397_SPK_CON1 0x0602
+#define MT6397_SPK_CON2 0x0604
+#define MT6397_SPK_CON3 0x0606
+#define MT6397_SPK_CON4 0x0608
+#define MT6397_SPK_CON5 0x060A
+#define MT6397_SPK_CON6 0x060C
+#define MT6397_SPK_CON7 0x060E
+#define MT6397_SPK_CON8 0x0610
+#define MT6397_SPK_CON9 0x0612
+#define MT6397_SPK_CON10 0x0614
+#define MT6397_SPK_CON11 0x0616
+#define MT6397_AUDDAC_CON0 0x0700
+#define MT6397_AUDBUF_CFG0 0x0702
+#define MT6397_AUDBUF_CFG1 0x0704
+#define MT6397_AUDBUF_CFG2 0x0706
+#define MT6397_AUDBUF_CFG3 0x0708
+#define MT6397_AUDBUF_CFG4 0x070A
+#define MT6397_IBIASDIST_CFG0 0x070C
+#define MT6397_AUDACCDEPOP_CFG0 0x070E
+#define MT6397_AUD_IV_CFG0 0x0710
+#define MT6397_AUDCLKGEN_CFG0 0x0712
+#define MT6397_AUDLDO_CFG0 0x0714
+#define MT6397_AUDLDO_CFG1 0x0716
+#define MT6397_AUDNVREGGLB_CFG0 0x0718
+#define MT6397_AUD_NCP0 0x071A
+#define MT6397_AUDPREAMP_CON0 0x071C
+#define MT6397_AUDADC_CON0 0x071E
+#define MT6397_AUDADC_CON1 0x0720
+#define MT6397_AUDADC_CON2 0x0722
+#define MT6397_AUDADC_CON3 0x0724
+#define MT6397_AUDADC_CON4 0x0726
+#define MT6397_AUDADC_CON5 0x0728
+#define MT6397_AUDADC_CON6 0x072A
+#define MT6397_AUDDIGMI_CON0 0x072C
+#define MT6397_AUDLSBUF_CON0 0x072E
+#define MT6397_AUDLSBUF_CON1 0x0730
+#define MT6397_AUDENCSPARE_CON0 0x0732
+#define MT6397_AUDENCCLKSQ_CON0 0x0734
+#define MT6397_AUDPREAMPGAIN_CON0 0x0736
+#define MT6397_ZCD_CON0 0x0738
+#define MT6397_ZCD_CON1 0x073A
+#define MT6397_ZCD_CON2 0x073C
+#define MT6397_ZCD_CON3 0x073E
+#define MT6397_ZCD_CON4 0x0740
+#define MT6397_ZCD_CON5 0x0742
+#define MT6397_NCP_CLKDIV_CON0 0x0744
+#define MT6397_NCP_CLKDIV_CON1 0x0746
+
+#endif /* __MFD_MT6397_REGISTERS_H__ */
int ldo_begin;
int ldo_end;
int max_reg;
+ bool has_regen3;
struct palmas_regs_info *palmas_regs_info;
struct of_regulator_match *palmas_matches;
struct palmas_sleep_requestor_info *sleep_req_info;
#define BUCK2_RATE_MASK (3 << 3)
#define MASK_ALL 0xff
+#define BUCK_UV_ACT_MASK 0x0f
+#define BUCK_UV_ACT_DISABLE 0
+
#define SWITCH2_EN BIT(6)
#define SWITCH1_EN BIT(5)
#define DEV_OFF_RST BIT(3)
struct i2c_client *client;
struct rt5033_dev *rt5033;
struct regmap *regmap;
- struct power_supply psy;
+ struct power_supply *psy;
};
/* RT5033 charger platform data */
#define MAX_RW_REG_CNT 1024
-/* PCI Operation Register Address */
#define RTSX_HCBAR 0x00
#define RTSX_HCBCTLR 0x04
+#define STOP_CMD (0x01 << 28)
+#define READ_REG_CMD 0
+#define WRITE_REG_CMD 1
+#define CHECK_REG_CMD 2
+
#define RTSX_HDBAR 0x08
+#define SG_INT 0x04
+#define SG_END 0x02
+#define SG_VALID 0x01
+#define SG_NO_OP 0x00
+#define SG_TRANS_DATA (0x02 << 4)
+#define SG_LINK_DESC (0x03 << 4)
#define RTSX_HDBCTLR 0x0C
+#define SDMA_MODE 0x00
+#define ADMA_MODE (0x02 << 26)
+#define STOP_DMA (0x01 << 28)
+#define TRIG_DMA (0x01 << 31)
+
#define RTSX_HAIMR 0x10
-#define RTSX_BIPR 0x14
-#define RTSX_BIER 0x18
+#define HAIMR_TRANS_START (0x01 << 31)
+#define HAIMR_READ 0x00
+#define HAIMR_WRITE (0x01 << 30)
+#define HAIMR_READ_START (HAIMR_TRANS_START | HAIMR_READ)
+#define HAIMR_WRITE_START (HAIMR_TRANS_START | HAIMR_WRITE)
+#define HAIMR_TRANS_END (HAIMR_TRANS_START)
-/* Host command buffer control register */
-#define STOP_CMD (0x01 << 28)
-
-/* Host data buffer control register */
-#define SDMA_MODE 0x00
-#define ADMA_MODE (0x02 << 26)
-#define STOP_DMA (0x01 << 28)
-#define TRIG_DMA (0x01 << 31)
-
-/* Host access internal memory register */
-#define HAIMR_TRANS_START (0x01 << 31)
-#define HAIMR_READ 0x00
-#define HAIMR_WRITE (0x01 << 30)
-#define HAIMR_READ_START (HAIMR_TRANS_START | HAIMR_READ)
-#define HAIMR_WRITE_START (HAIMR_TRANS_START | HAIMR_WRITE)
-#define HAIMR_TRANS_END (HAIMR_TRANS_START)
-
-/* Bus interrupt pending register */
-#define CMD_DONE_INT (1 << 31)
-#define DATA_DONE_INT (1 << 30)
-#define TRANS_OK_INT (1 << 29)
-#define TRANS_FAIL_INT (1 << 28)
-#define XD_INT (1 << 27)
-#define MS_INT (1 << 26)
-#define SD_INT (1 << 25)
-#define GPIO0_INT (1 << 24)
-#define OC_INT (1 << 23)
-#define SD_WRITE_PROTECT (1 << 19)
-#define XD_EXIST (1 << 18)
-#define MS_EXIST (1 << 17)
-#define SD_EXIST (1 << 16)
-#define DELINK_INT GPIO0_INT
-#define MS_OC_INT (1 << 23)
-#define SD_OC_INT (1 << 22)
+#define RTSX_BIPR 0x14
+#define CMD_DONE_INT (1 << 31)
+#define DATA_DONE_INT (1 << 30)
+#define TRANS_OK_INT (1 << 29)
+#define TRANS_FAIL_INT (1 << 28)
+#define XD_INT (1 << 27)
+#define MS_INT (1 << 26)
+#define SD_INT (1 << 25)
+#define GPIO0_INT (1 << 24)
+#define OC_INT (1 << 23)
+#define SD_WRITE_PROTECT (1 << 19)
+#define XD_EXIST (1 << 18)
+#define MS_EXIST (1 << 17)
+#define SD_EXIST (1 << 16)
+#define DELINK_INT GPIO0_INT
+#define MS_OC_INT (1 << 23)
+#define SD_OC_INT (1 << 22)
#define CARD_INT (XD_INT | MS_INT | SD_INT)
#define NEED_COMPLETE_INT (DATA_DONE_INT | TRANS_OK_INT | TRANS_FAIL_INT)
#define RTSX_INT (CMD_DONE_INT | NEED_COMPLETE_INT | \
CARD_INT | GPIO0_INT | OC_INT)
-
#define CARD_EXIST (XD_EXIST | MS_EXIST | SD_EXIST)
-/* Bus interrupt enable register */
-#define CMD_DONE_INT_EN (1 << 31)
-#define DATA_DONE_INT_EN (1 << 30)
-#define TRANS_OK_INT_EN (1 << 29)
-#define TRANS_FAIL_INT_EN (1 << 28)
-#define XD_INT_EN (1 << 27)
-#define MS_INT_EN (1 << 26)
-#define SD_INT_EN (1 << 25)
-#define GPIO0_INT_EN (1 << 24)
-#define OC_INT_EN (1 << 23)
-#define DELINK_INT_EN GPIO0_INT_EN
-#define MS_OC_INT_EN (1 << 23)
-#define SD_OC_INT_EN (1 << 22)
-
-#define READ_REG_CMD 0
-#define WRITE_REG_CMD 1
-#define CHECK_REG_CMD 2
+#define RTSX_BIER 0x18
+#define CMD_DONE_INT_EN (1 << 31)
+#define DATA_DONE_INT_EN (1 << 30)
+#define TRANS_OK_INT_EN (1 << 29)
+#define TRANS_FAIL_INT_EN (1 << 28)
+#define XD_INT_EN (1 << 27)
+#define MS_INT_EN (1 << 26)
+#define SD_INT_EN (1 << 25)
+#define GPIO0_INT_EN (1 << 24)
+#define OC_INT_EN (1 << 23)
+#define DELINK_INT_EN GPIO0_INT_EN
+#define MS_OC_INT_EN (1 << 23)
+#define SD_OC_INT_EN (1 << 22)
+
/*
* macros for easy use
#define rtsx_pci_write_config_dword(pcr, where, val) \
pci_write_config_dword((pcr)->pci, where, val)
-#define STATE_TRANS_NONE 0
-#define STATE_TRANS_CMD 1
-#define STATE_TRANS_BUF 2
-#define STATE_TRANS_SG 3
-
-#define TRANS_NOT_READY 0
-#define TRANS_RESULT_OK 1
-#define TRANS_RESULT_FAIL 2
-#define TRANS_NO_DEVICE 3
-
-#define RTSX_RESV_BUF_LEN 4096
-#define HOST_CMDS_BUF_LEN 1024
-#define HOST_SG_TBL_BUF_LEN (RTSX_RESV_BUF_LEN - HOST_CMDS_BUF_LEN)
-#define HOST_SG_TBL_ITEMS (HOST_SG_TBL_BUF_LEN / 8)
-#define MAX_SG_ITEM_LEN 0x80000
-
-#define HOST_TO_DEVICE 0
-#define DEVICE_TO_HOST 1
-
-#define RTSX_PHASE_MAX 32
-#define RX_TUNING_CNT 3
-
-/* SG descriptor */
-#define SG_INT 0x04
-#define SG_END 0x02
-#define SG_VALID 0x01
-
-#define SG_NO_OP 0x00
-#define SG_TRANS_DATA (0x02 << 4)
-#define SG_LINK_DESC (0x03 << 4)
-
-/* Output voltage */
-#define OUTPUT_3V3 0
-#define OUTPUT_1V8 1
-
-/* Card Clock Enable Register */
-#define SD_CLK_EN 0x04
-#define MS_CLK_EN 0x08
-
-/* Card Select Register */
-#define SD_MOD_SEL 2
-#define MS_MOD_SEL 3
-
-/* Card Output Enable Register */
-#define SD_OUTPUT_EN 0x04
-#define MS_OUTPUT_EN 0x08
-
-/* CARD_SHARE_MODE */
-#define CARD_SHARE_MASK 0x0F
-#define CARD_SHARE_MULTI_LUN 0x00
-#define CARD_SHARE_NORMAL 0x00
-#define CARD_SHARE_48_SD 0x04
-#define CARD_SHARE_48_MS 0x08
-/* CARD_SHARE_MODE for barossa */
-#define CARD_SHARE_BAROSSA_SD 0x01
-#define CARD_SHARE_BAROSSA_MS 0x02
-
-/* CARD_DRIVE_SEL */
-#define MS_DRIVE_8mA (0x01 << 6)
-#define MMC_DRIVE_8mA (0x01 << 4)
-#define XD_DRIVE_8mA (0x01 << 2)
-#define GPIO_DRIVE_8mA 0x01
-#define RTS5209_CARD_DRIVE_DEFAULT (MS_DRIVE_8mA | MMC_DRIVE_8mA |\
- XD_DRIVE_8mA | GPIO_DRIVE_8mA)
-#define RTL8411_CARD_DRIVE_DEFAULT (MS_DRIVE_8mA | MMC_DRIVE_8mA |\
- XD_DRIVE_8mA)
-#define RTSX_CARD_DRIVE_DEFAULT (MS_DRIVE_8mA | GPIO_DRIVE_8mA)
+#define STATE_TRANS_NONE 0
+#define STATE_TRANS_CMD 1
+#define STATE_TRANS_BUF 2
+#define STATE_TRANS_SG 3
-/* SD30_DRIVE_SEL */
-#define DRIVER_TYPE_A 0x05
-#define DRIVER_TYPE_B 0x03
-#define DRIVER_TYPE_C 0x02
-#define DRIVER_TYPE_D 0x01
-#define CFG_DRIVER_TYPE_A 0x02
-#define CFG_DRIVER_TYPE_B 0x03
-#define CFG_DRIVER_TYPE_C 0x01
-#define CFG_DRIVER_TYPE_D 0x00
-
-/* FPDCTL */
-#define SSC_POWER_DOWN 0x01
-#define SD_OC_POWER_DOWN 0x02
-#define ALL_POWER_DOWN 0x07
-#define OC_POWER_DOWN 0x06
-
-/* CLK_CTL */
-#define CHANGE_CLK 0x01
-
-/* LDO_CTL */
-#define BPP_ASIC_1V7 0x00
-#define BPP_ASIC_1V8 0x01
-#define BPP_ASIC_1V9 0x02
-#define BPP_ASIC_2V0 0x03
-#define BPP_ASIC_2V7 0x04
-#define BPP_ASIC_2V8 0x05
-#define BPP_ASIC_3V2 0x06
-#define BPP_ASIC_3V3 0x07
-#define BPP_REG_TUNED18 0x07
-#define BPP_TUNED18_SHIFT_8402 5
-#define BPP_TUNED18_SHIFT_8411 4
-#define BPP_PAD_MASK 0x04
-#define BPP_PAD_3V3 0x04
-#define BPP_PAD_1V8 0x00
-#define BPP_LDO_POWB 0x03
-#define BPP_LDO_ON 0x00
-#define BPP_LDO_SUSPEND 0x02
-#define BPP_LDO_OFF 0x03
-
-/* CD_PAD_CTL */
-#define CD_DISABLE_MASK 0x07
-#define MS_CD_DISABLE 0x04
-#define SD_CD_DISABLE 0x02
-#define XD_CD_DISABLE 0x01
-#define CD_DISABLE 0x07
-#define CD_ENABLE 0x00
-#define MS_CD_EN_ONLY 0x03
-#define SD_CD_EN_ONLY 0x05
-#define XD_CD_EN_ONLY 0x06
-#define FORCE_CD_LOW_MASK 0x38
-#define FORCE_CD_XD_LOW 0x08
-#define FORCE_CD_SD_LOW 0x10
-#define FORCE_CD_MS_LOW 0x20
-#define CD_AUTO_DISABLE 0x40
-
-/* SD_STAT1 */
-#define SD_CRC7_ERR 0x80
-#define SD_CRC16_ERR 0x40
-#define SD_CRC_WRITE_ERR 0x20
-#define SD_CRC_WRITE_ERR_MASK 0x1C
-#define GET_CRC_TIME_OUT 0x02
-#define SD_TUNING_COMPARE_ERR 0x01
-
-/* SD_STAT2 */
-#define SD_RSP_80CLK_TIMEOUT 0x01
-
-/* SD_BUS_STAT */
-#define SD_CLK_TOGGLE_EN 0x80
-#define SD_CLK_FORCE_STOP 0x40
-#define SD_DAT3_STATUS 0x10
-#define SD_DAT2_STATUS 0x08
-#define SD_DAT1_STATUS 0x04
-#define SD_DAT0_STATUS 0x02
-#define SD_CMD_STATUS 0x01
-
-/* SD_PAD_CTL */
-#define SD_IO_USING_1V8 0x80
-#define SD_IO_USING_3V3 0x7F
-#define TYPE_A_DRIVING 0x00
-#define TYPE_B_DRIVING 0x01
-#define TYPE_C_DRIVING 0x02
-#define TYPE_D_DRIVING 0x03
-
-/* SD_SAMPLE_POINT_CTL */
-#define DDR_FIX_RX_DAT 0x00
-#define DDR_VAR_RX_DAT 0x80
-#define DDR_FIX_RX_DAT_EDGE 0x00
-#define DDR_FIX_RX_DAT_14_DELAY 0x40
-#define DDR_FIX_RX_CMD 0x00
-#define DDR_VAR_RX_CMD 0x20
-#define DDR_FIX_RX_CMD_POS_EDGE 0x00
-#define DDR_FIX_RX_CMD_14_DELAY 0x10
-#define SD20_RX_POS_EDGE 0x00
-#define SD20_RX_14_DELAY 0x08
-#define SD20_RX_SEL_MASK 0x08
+#define TRANS_NOT_READY 0
+#define TRANS_RESULT_OK 1
+#define TRANS_RESULT_FAIL 2
+#define TRANS_NO_DEVICE 3
-/* SD_PUSH_POINT_CTL */
-#define DDR_FIX_TX_CMD_DAT 0x00
-#define DDR_VAR_TX_CMD_DAT 0x80
-#define DDR_FIX_TX_DAT_14_TSU 0x00
-#define DDR_FIX_TX_DAT_12_TSU 0x40
-#define DDR_FIX_TX_CMD_NEG_EDGE 0x00
-#define DDR_FIX_TX_CMD_14_AHEAD 0x20
-#define SD20_TX_NEG_EDGE 0x00
-#define SD20_TX_14_AHEAD 0x10
-#define SD20_TX_SEL_MASK 0x10
-#define DDR_VAR_SDCLK_POL_SWAP 0x01
-
-/* SD_TRANSFER */
-#define SD_TRANSFER_START 0x80
-#define SD_TRANSFER_END 0x40
-#define SD_STAT_IDLE 0x20
-#define SD_TRANSFER_ERR 0x10
-/* SD Transfer Mode definition */
-#define SD_TM_NORMAL_WRITE 0x00
-#define SD_TM_AUTO_WRITE_3 0x01
-#define SD_TM_AUTO_WRITE_4 0x02
-#define SD_TM_AUTO_READ_3 0x05
-#define SD_TM_AUTO_READ_4 0x06
-#define SD_TM_CMD_RSP 0x08
-#define SD_TM_AUTO_WRITE_1 0x09
-#define SD_TM_AUTO_WRITE_2 0x0A
-#define SD_TM_NORMAL_READ 0x0C
-#define SD_TM_AUTO_READ_1 0x0D
-#define SD_TM_AUTO_READ_2 0x0E
-#define SD_TM_AUTO_TUNING 0x0F
-
-/* SD_VPTX_CTL / SD_VPRX_CTL */
-#define PHASE_CHANGE 0x80
-#define PHASE_NOT_RESET 0x40
-
-/* SD_DCMPS_TX_CTL / SD_DCMPS_RX_CTL */
-#define DCMPS_CHANGE 0x80
-#define DCMPS_CHANGE_DONE 0x40
-#define DCMPS_ERROR 0x20
-#define DCMPS_CURRENT_PHASE 0x1F
-
-/* SD Configure 1 Register */
-#define SD_CLK_DIVIDE_0 0x00
-#define SD_CLK_DIVIDE_256 0xC0
-#define SD_CLK_DIVIDE_128 0x80
-#define SD_BUS_WIDTH_1BIT 0x00
-#define SD_BUS_WIDTH_4BIT 0x01
-#define SD_BUS_WIDTH_8BIT 0x02
-#define SD_ASYNC_FIFO_NOT_RST 0x10
-#define SD_20_MODE 0x00
-#define SD_DDR_MODE 0x04
-#define SD_30_MODE 0x08
-
-#define SD_CLK_DIVIDE_MASK 0xC0
-
-/* SD_CMD_STATE */
-#define SD_CMD_IDLE 0x80
-
-/* SD_DATA_STATE */
-#define SD_DATA_IDLE 0x80
-
-/* DCM_DRP_CTL */
-#define DCM_RESET 0x08
-#define DCM_LOCKED 0x04
-#define DCM_208M 0x00
-#define DCM_TX 0x01
-#define DCM_RX 0x02
-
-/* DCM_DRP_TRIG */
-#define DRP_START 0x80
-#define DRP_DONE 0x40
-
-/* DCM_DRP_CFG */
-#define DRP_WRITE 0x80
-#define DRP_READ 0x00
-#define DCM_WRITE_ADDRESS_50 0x50
-#define DCM_WRITE_ADDRESS_51 0x51
-#define DCM_READ_ADDRESS_00 0x00
-#define DCM_READ_ADDRESS_51 0x51
-
-/* IRQSTAT0 */
-#define DMA_DONE_INT 0x80
-#define SUSPEND_INT 0x40
-#define LINK_RDY_INT 0x20
-#define LINK_DOWN_INT 0x10
-
-/* DMACTL */
-#define DMA_RST 0x80
-#define DMA_BUSY 0x04
-#define DMA_DIR_TO_CARD 0x00
-#define DMA_DIR_FROM_CARD 0x02
-#define DMA_EN 0x01
-#define DMA_128 (0 << 4)
-#define DMA_256 (1 << 4)
-#define DMA_512 (2 << 4)
-#define DMA_1024 (3 << 4)
-#define DMA_PACK_SIZE_MASK 0x30
-
-/* SSC_CTL1 */
-#define SSC_RSTB 0x80
-#define SSC_8X_EN 0x40
-#define SSC_FIX_FRAC 0x20
-#define SSC_SEL_1M 0x00
-#define SSC_SEL_2M 0x08
-#define SSC_SEL_4M 0x10
-#define SSC_SEL_8M 0x18
-
-/* SSC_CTL2 */
-#define SSC_DEPTH_MASK 0x07
-#define SSC_DEPTH_DISALBE 0x00
-#define SSC_DEPTH_4M 0x01
-#define SSC_DEPTH_2M 0x02
-#define SSC_DEPTH_1M 0x03
-#define SSC_DEPTH_500K 0x04
-#define SSC_DEPTH_250K 0x05
-
-/* System Clock Control Register */
-#define CLK_LOW_FREQ 0x01
-
-/* System Clock Divider Register */
-#define CLK_DIV_1 0x01
-#define CLK_DIV_2 0x02
-#define CLK_DIV_4 0x03
-#define CLK_DIV_8 0x04
-
-/* MS_CFG */
-#define SAMPLE_TIME_RISING 0x00
-#define SAMPLE_TIME_FALLING 0x80
-#define PUSH_TIME_DEFAULT 0x00
-#define PUSH_TIME_ODD 0x40
-#define NO_EXTEND_TOGGLE 0x00
-#define EXTEND_TOGGLE_CHK 0x20
-#define MS_BUS_WIDTH_1 0x00
-#define MS_BUS_WIDTH_4 0x10
-#define MS_BUS_WIDTH_8 0x18
-#define MS_2K_SECTOR_MODE 0x04
-#define MS_512_SECTOR_MODE 0x00
-#define MS_TOGGLE_TIMEOUT_EN 0x00
-#define MS_TOGGLE_TIMEOUT_DISEN 0x01
-#define MS_NO_CHECK_INT 0x02
+#define RTSX_RESV_BUF_LEN 4096
+#define HOST_CMDS_BUF_LEN 1024
+#define HOST_SG_TBL_BUF_LEN (RTSX_RESV_BUF_LEN - HOST_CMDS_BUF_LEN)
+#define HOST_SG_TBL_ITEMS (HOST_SG_TBL_BUF_LEN / 8)
+#define MAX_SG_ITEM_LEN 0x80000
+#define HOST_TO_DEVICE 0
+#define DEVICE_TO_HOST 1
-/* MS_TRANS_CFG */
-#define WAIT_INT 0x80
-#define NO_WAIT_INT 0x00
-#define NO_AUTO_READ_INT_REG 0x00
-#define AUTO_READ_INT_REG 0x40
-#define MS_CRC16_ERR 0x20
-#define MS_RDY_TIMEOUT 0x10
-#define MS_INT_CMDNK 0x08
-#define MS_INT_BREQ 0x04
-#define MS_INT_ERR 0x02
-#define MS_INT_CED 0x01
-
-/* MS_TRANSFER */
-#define MS_TRANSFER_START 0x80
-#define MS_TRANSFER_END 0x40
-#define MS_TRANSFER_ERR 0x20
-#define MS_BS_STATE 0x10
-#define MS_TM_READ_BYTES 0x00
-#define MS_TM_NORMAL_READ 0x01
-#define MS_TM_WRITE_BYTES 0x04
-#define MS_TM_NORMAL_WRITE 0x05
-#define MS_TM_AUTO_READ 0x08
-#define MS_TM_AUTO_WRITE 0x0C
-
-/* SD Configure 2 Register */
-#define SD_CALCULATE_CRC7 0x00
-#define SD_NO_CALCULATE_CRC7 0x80
-#define SD_CHECK_CRC16 0x00
-#define SD_NO_CHECK_CRC16 0x40
-#define SD_NO_CHECK_WAIT_CRC_TO 0x20
-#define SD_WAIT_BUSY_END 0x08
-#define SD_NO_WAIT_BUSY_END 0x00
-#define SD_CHECK_CRC7 0x00
-#define SD_NO_CHECK_CRC7 0x04
-#define SD_RSP_LEN_0 0x00
-#define SD_RSP_LEN_6 0x01
-#define SD_RSP_LEN_17 0x02
-/* SD/MMC Response Type Definition */
-#define SD_RSP_TYPE_R0 0x04
-#define SD_RSP_TYPE_R1 0x01
-#define SD_RSP_TYPE_R1b 0x09
-#define SD_RSP_TYPE_R2 0x02
-#define SD_RSP_TYPE_R3 0x05
-#define SD_RSP_TYPE_R4 0x05
-#define SD_RSP_TYPE_R5 0x01
-#define SD_RSP_TYPE_R6 0x01
-#define SD_RSP_TYPE_R7 0x01
-
-/* SD_CONFIGURE3 */
-#define SD_RSP_80CLK_TIMEOUT_EN 0x01
-
-/* Card Transfer Reset Register */
-#define SPI_STOP 0x01
-#define XD_STOP 0x02
-#define SD_STOP 0x04
-#define MS_STOP 0x08
-#define SPI_CLR_ERR 0x10
-#define XD_CLR_ERR 0x20
-#define SD_CLR_ERR 0x40
-#define MS_CLR_ERR 0x80
-
-/* Card Data Source Register */
-#define PINGPONG_BUFFER 0x01
-#define RING_BUFFER 0x00
-
-/* Card Power Control Register */
-#define PMOS_STRG_MASK 0x10
-#define PMOS_STRG_800mA 0x10
-#define PMOS_STRG_400mA 0x00
-#define SD_POWER_OFF 0x03
-#define SD_PARTIAL_POWER_ON 0x01
-#define SD_POWER_ON 0x00
-#define SD_POWER_MASK 0x03
-#define MS_POWER_OFF 0x0C
-#define MS_PARTIAL_POWER_ON 0x04
-#define MS_POWER_ON 0x00
-#define MS_POWER_MASK 0x0C
-#define BPP_POWER_OFF 0x0F
-#define BPP_POWER_5_PERCENT_ON 0x0E
-#define BPP_POWER_10_PERCENT_ON 0x0C
-#define BPP_POWER_15_PERCENT_ON 0x08
-#define BPP_POWER_ON 0x00
-#define BPP_POWER_MASK 0x0F
-#define SD_VCC_PARTIAL_POWER_ON 0x02
-#define SD_VCC_POWER_ON 0x00
-
-/* PWR_GATE_CTRL */
-#define PWR_GATE_EN 0x01
-#define LDO3318_PWR_MASK 0x06
-#define LDO_ON 0x00
-#define LDO_SUSPEND 0x04
-#define LDO_OFF 0x06
-
-/* CARD_CLK_SOURCE */
-#define CRC_FIX_CLK (0x00 << 0)
-#define CRC_VAR_CLK0 (0x01 << 0)
-#define CRC_VAR_CLK1 (0x02 << 0)
-#define SD30_FIX_CLK (0x00 << 2)
-#define SD30_VAR_CLK0 (0x01 << 2)
-#define SD30_VAR_CLK1 (0x02 << 2)
-#define SAMPLE_FIX_CLK (0x00 << 4)
-#define SAMPLE_VAR_CLK0 (0x01 << 4)
-#define SAMPLE_VAR_CLK1 (0x02 << 4)
-
-/* HOST_SLEEP_STATE */
-#define HOST_ENTER_S1 1
-#define HOST_ENTER_S3 2
+#define OUTPUT_3V3 0
+#define OUTPUT_1V8 1
+
+#define RTSX_PHASE_MAX 32
+#define RX_TUNING_CNT 3
#define MS_CFG 0xFD40
+#define SAMPLE_TIME_RISING 0x00
+#define SAMPLE_TIME_FALLING 0x80
+#define PUSH_TIME_DEFAULT 0x00
+#define PUSH_TIME_ODD 0x40
+#define NO_EXTEND_TOGGLE 0x00
+#define EXTEND_TOGGLE_CHK 0x20
+#define MS_BUS_WIDTH_1 0x00
+#define MS_BUS_WIDTH_4 0x10
+#define MS_BUS_WIDTH_8 0x18
+#define MS_2K_SECTOR_MODE 0x04
+#define MS_512_SECTOR_MODE 0x00
+#define MS_TOGGLE_TIMEOUT_EN 0x00
+#define MS_TOGGLE_TIMEOUT_DISEN 0x01
+#define MS_NO_CHECK_INT 0x02
#define MS_TPC 0xFD41
#define MS_TRANS_CFG 0xFD42
+#define WAIT_INT 0x80
+#define NO_WAIT_INT 0x00
+#define NO_AUTO_READ_INT_REG 0x00
+#define AUTO_READ_INT_REG 0x40
+#define MS_CRC16_ERR 0x20
+#define MS_RDY_TIMEOUT 0x10
+#define MS_INT_CMDNK 0x08
+#define MS_INT_BREQ 0x04
+#define MS_INT_ERR 0x02
+#define MS_INT_CED 0x01
#define MS_TRANSFER 0xFD43
+#define MS_TRANSFER_START 0x80
+#define MS_TRANSFER_END 0x40
+#define MS_TRANSFER_ERR 0x20
+#define MS_BS_STATE 0x10
+#define MS_TM_READ_BYTES 0x00
+#define MS_TM_NORMAL_READ 0x01
+#define MS_TM_WRITE_BYTES 0x04
+#define MS_TM_NORMAL_WRITE 0x05
+#define MS_TM_AUTO_READ 0x08
+#define MS_TM_AUTO_WRITE 0x0C
#define MS_INT_REG 0xFD44
#define MS_BYTE_CNT 0xFD45
#define MS_SECTOR_CNT_L 0xFD46
#define MS_DBUS_H 0xFD48
#define SD_CFG1 0xFDA0
+#define SD_CLK_DIVIDE_0 0x00
+#define SD_CLK_DIVIDE_256 0xC0
+#define SD_CLK_DIVIDE_128 0x80
+#define SD_BUS_WIDTH_1BIT 0x00
+#define SD_BUS_WIDTH_4BIT 0x01
+#define SD_BUS_WIDTH_8BIT 0x02
+#define SD_ASYNC_FIFO_NOT_RST 0x10
+#define SD_20_MODE 0x00
+#define SD_DDR_MODE 0x04
+#define SD_30_MODE 0x08
+#define SD_CLK_DIVIDE_MASK 0xC0
#define SD_CFG2 0xFDA1
+#define SD_CALCULATE_CRC7 0x00
+#define SD_NO_CALCULATE_CRC7 0x80
+#define SD_CHECK_CRC16 0x00
+#define SD_NO_CHECK_CRC16 0x40
+#define SD_NO_CHECK_WAIT_CRC_TO 0x20
+#define SD_WAIT_BUSY_END 0x08
+#define SD_NO_WAIT_BUSY_END 0x00
+#define SD_CHECK_CRC7 0x00
+#define SD_NO_CHECK_CRC7 0x04
+#define SD_RSP_LEN_0 0x00
+#define SD_RSP_LEN_6 0x01
+#define SD_RSP_LEN_17 0x02
+#define SD_RSP_TYPE_R0 0x04
+#define SD_RSP_TYPE_R1 0x01
+#define SD_RSP_TYPE_R1b 0x09
+#define SD_RSP_TYPE_R2 0x02
+#define SD_RSP_TYPE_R3 0x05
+#define SD_RSP_TYPE_R4 0x05
+#define SD_RSP_TYPE_R5 0x01
+#define SD_RSP_TYPE_R6 0x01
+#define SD_RSP_TYPE_R7 0x01
#define SD_CFG3 0xFDA2
+#define SD_RSP_80CLK_TIMEOUT_EN 0x01
+
#define SD_STAT1 0xFDA3
+#define SD_CRC7_ERR 0x80
+#define SD_CRC16_ERR 0x40
+#define SD_CRC_WRITE_ERR 0x20
+#define SD_CRC_WRITE_ERR_MASK 0x1C
+#define GET_CRC_TIME_OUT 0x02
+#define SD_TUNING_COMPARE_ERR 0x01
#define SD_STAT2 0xFDA4
+#define SD_RSP_80CLK_TIMEOUT 0x01
+
#define SD_BUS_STAT 0xFDA5
+#define SD_CLK_TOGGLE_EN 0x80
+#define SD_CLK_FORCE_STOP 0x40
+#define SD_DAT3_STATUS 0x10
+#define SD_DAT2_STATUS 0x08
+#define SD_DAT1_STATUS 0x04
+#define SD_DAT0_STATUS 0x02
+#define SD_CMD_STATUS 0x01
#define SD_PAD_CTL 0xFDA6
+#define SD_IO_USING_1V8 0x80
+#define SD_IO_USING_3V3 0x7F
+#define TYPE_A_DRIVING 0x00
+#define TYPE_B_DRIVING 0x01
+#define TYPE_C_DRIVING 0x02
+#define TYPE_D_DRIVING 0x03
#define SD_SAMPLE_POINT_CTL 0xFDA7
+#define DDR_FIX_RX_DAT 0x00
+#define DDR_VAR_RX_DAT 0x80
+#define DDR_FIX_RX_DAT_EDGE 0x00
+#define DDR_FIX_RX_DAT_14_DELAY 0x40
+#define DDR_FIX_RX_CMD 0x00
+#define DDR_VAR_RX_CMD 0x20
+#define DDR_FIX_RX_CMD_POS_EDGE 0x00
+#define DDR_FIX_RX_CMD_14_DELAY 0x10
+#define SD20_RX_POS_EDGE 0x00
+#define SD20_RX_14_DELAY 0x08
+#define SD20_RX_SEL_MASK 0x08
#define SD_PUSH_POINT_CTL 0xFDA8
+#define DDR_FIX_TX_CMD_DAT 0x00
+#define DDR_VAR_TX_CMD_DAT 0x80
+#define DDR_FIX_TX_DAT_14_TSU 0x00
+#define DDR_FIX_TX_DAT_12_TSU 0x40
+#define DDR_FIX_TX_CMD_NEG_EDGE 0x00
+#define DDR_FIX_TX_CMD_14_AHEAD 0x20
+#define SD20_TX_NEG_EDGE 0x00
+#define SD20_TX_14_AHEAD 0x10
+#define SD20_TX_SEL_MASK 0x10
+#define DDR_VAR_SDCLK_POL_SWAP 0x01
#define SD_CMD0 0xFDA9
#define SD_CMD_START 0x40
#define SD_CMD1 0xFDAA
#define SD_BLOCK_CNT_L 0xFDB1
#define SD_BLOCK_CNT_H 0xFDB2
#define SD_TRANSFER 0xFDB3
+#define SD_TRANSFER_START 0x80
+#define SD_TRANSFER_END 0x40
+#define SD_STAT_IDLE 0x20
+#define SD_TRANSFER_ERR 0x10
+#define SD_TM_NORMAL_WRITE 0x00
+#define SD_TM_AUTO_WRITE_3 0x01
+#define SD_TM_AUTO_WRITE_4 0x02
+#define SD_TM_AUTO_READ_3 0x05
+#define SD_TM_AUTO_READ_4 0x06
+#define SD_TM_CMD_RSP 0x08
+#define SD_TM_AUTO_WRITE_1 0x09
+#define SD_TM_AUTO_WRITE_2 0x0A
+#define SD_TM_NORMAL_READ 0x0C
+#define SD_TM_AUTO_READ_1 0x0D
+#define SD_TM_AUTO_READ_2 0x0E
+#define SD_TM_AUTO_TUNING 0x0F
#define SD_CMD_STATE 0xFDB5
+#define SD_CMD_IDLE 0x80
+
#define SD_DATA_STATE 0xFDB6
+#define SD_DATA_IDLE 0x80
#define SRCTL 0xFC13
-#define DCM_DRP_CTL 0xFC23
-#define DCM_DRP_TRIG 0xFC24
-#define DCM_DRP_CFG 0xFC25
-#define DCM_DRP_WR_DATA_L 0xFC26
-#define DCM_DRP_WR_DATA_H 0xFC27
-#define DCM_DRP_RD_DATA_L 0xFC28
-#define DCM_DRP_RD_DATA_H 0xFC29
+#define DCM_DRP_CTL 0xFC23
+#define DCM_RESET 0x08
+#define DCM_LOCKED 0x04
+#define DCM_208M 0x00
+#define DCM_TX 0x01
+#define DCM_RX 0x02
+#define DCM_DRP_TRIG 0xFC24
+#define DRP_START 0x80
+#define DRP_DONE 0x40
+#define DCM_DRP_CFG 0xFC25
+#define DRP_WRITE 0x80
+#define DRP_READ 0x00
+#define DCM_WRITE_ADDRESS_50 0x50
+#define DCM_WRITE_ADDRESS_51 0x51
+#define DCM_READ_ADDRESS_00 0x00
+#define DCM_READ_ADDRESS_51 0x51
+#define DCM_DRP_WR_DATA_L 0xFC26
+#define DCM_DRP_WR_DATA_H 0xFC27
+#define DCM_DRP_RD_DATA_L 0xFC28
+#define DCM_DRP_RD_DATA_H 0xFC29
#define SD_VPCLK0_CTL 0xFC2A
#define SD_VPCLK1_CTL 0xFC2B
#define SD_DCMPS0_CTL 0xFC2C
#define SD_DCMPS1_CTL 0xFC2D
#define SD_VPTX_CTL SD_VPCLK0_CTL
#define SD_VPRX_CTL SD_VPCLK1_CTL
+#define PHASE_CHANGE 0x80
+#define PHASE_NOT_RESET 0x40
#define SD_DCMPS_TX_CTL SD_DCMPS0_CTL
#define SD_DCMPS_RX_CTL SD_DCMPS1_CTL
+#define DCMPS_CHANGE 0x80
+#define DCMPS_CHANGE_DONE 0x40
+#define DCMPS_ERROR 0x20
+#define DCMPS_CURRENT_PHASE 0x1F
#define CARD_CLK_SOURCE 0xFC2E
-
+#define CRC_FIX_CLK (0x00 << 0)
+#define CRC_VAR_CLK0 (0x01 << 0)
+#define CRC_VAR_CLK1 (0x02 << 0)
+#define SD30_FIX_CLK (0x00 << 2)
+#define SD30_VAR_CLK0 (0x01 << 2)
+#define SD30_VAR_CLK1 (0x02 << 2)
+#define SAMPLE_FIX_CLK (0x00 << 4)
+#define SAMPLE_VAR_CLK0 (0x01 << 4)
+#define SAMPLE_VAR_CLK1 (0x02 << 4)
#define CARD_PWR_CTL 0xFD50
+#define PMOS_STRG_MASK 0x10
+#define PMOS_STRG_800mA 0x10
+#define PMOS_STRG_400mA 0x00
+#define SD_POWER_OFF 0x03
+#define SD_PARTIAL_POWER_ON 0x01
+#define SD_POWER_ON 0x00
+#define SD_POWER_MASK 0x03
+#define MS_POWER_OFF 0x0C
+#define MS_PARTIAL_POWER_ON 0x04
+#define MS_POWER_ON 0x00
+#define MS_POWER_MASK 0x0C
+#define BPP_POWER_OFF 0x0F
+#define BPP_POWER_5_PERCENT_ON 0x0E
+#define BPP_POWER_10_PERCENT_ON 0x0C
+#define BPP_POWER_15_PERCENT_ON 0x08
+#define BPP_POWER_ON 0x00
+#define BPP_POWER_MASK 0x0F
+#define SD_VCC_PARTIAL_POWER_ON 0x02
+#define SD_VCC_POWER_ON 0x00
#define CARD_CLK_SWITCH 0xFD51
#define RTL8411B_PACKAGE_MODE 0xFD51
#define CARD_SHARE_MODE 0xFD52
+#define CARD_SHARE_MASK 0x0F
+#define CARD_SHARE_MULTI_LUN 0x00
+#define CARD_SHARE_NORMAL 0x00
+#define CARD_SHARE_48_SD 0x04
+#define CARD_SHARE_48_MS 0x08
+#define CARD_SHARE_BAROSSA_SD 0x01
+#define CARD_SHARE_BAROSSA_MS 0x02
#define CARD_DRIVE_SEL 0xFD53
+#define MS_DRIVE_8mA (0x01 << 6)
+#define MMC_DRIVE_8mA (0x01 << 4)
+#define XD_DRIVE_8mA (0x01 << 2)
+#define GPIO_DRIVE_8mA 0x01
+#define RTS5209_CARD_DRIVE_DEFAULT (MS_DRIVE_8mA | MMC_DRIVE_8mA |\
+ XD_DRIVE_8mA | GPIO_DRIVE_8mA)
+#define RTL8411_CARD_DRIVE_DEFAULT (MS_DRIVE_8mA | MMC_DRIVE_8mA |\
+ XD_DRIVE_8mA)
+#define RTSX_CARD_DRIVE_DEFAULT (MS_DRIVE_8mA | GPIO_DRIVE_8mA)
+
#define CARD_STOP 0xFD54
+#define SPI_STOP 0x01
+#define XD_STOP 0x02
+#define SD_STOP 0x04
+#define MS_STOP 0x08
+#define SPI_CLR_ERR 0x10
+#define XD_CLR_ERR 0x20
+#define SD_CLR_ERR 0x40
+#define MS_CLR_ERR 0x80
#define CARD_OE 0xFD55
+#define SD_OUTPUT_EN 0x04
+#define MS_OUTPUT_EN 0x08
#define CARD_AUTO_BLINK 0xFD56
#define CARD_GPIO_DIR 0xFD57
#define CARD_GPIO 0xFD58
#define CARD_DATA_SOURCE 0xFD5B
+#define PINGPONG_BUFFER 0x01
+#define RING_BUFFER 0x00
#define SD30_CLK_DRIVE_SEL 0xFD5A
+#define DRIVER_TYPE_A 0x05
+#define DRIVER_TYPE_B 0x03
+#define DRIVER_TYPE_C 0x02
+#define DRIVER_TYPE_D 0x01
#define CARD_SELECT 0xFD5C
+#define SD_MOD_SEL 2
+#define MS_MOD_SEL 3
#define SD30_DRIVE_SEL 0xFD5E
+#define CFG_DRIVER_TYPE_A 0x02
+#define CFG_DRIVER_TYPE_B 0x03
+#define CFG_DRIVER_TYPE_C 0x01
+#define CFG_DRIVER_TYPE_D 0x00
#define SD30_CMD_DRIVE_SEL 0xFD5E
#define SD30_DAT_DRIVE_SEL 0xFD5F
#define CARD_CLK_EN 0xFD69
+#define SD_CLK_EN 0x04
+#define MS_CLK_EN 0x08
#define SDIO_CTRL 0xFD6B
#define CD_PAD_CTL 0xFD73
-
+#define CD_DISABLE_MASK 0x07
+#define MS_CD_DISABLE 0x04
+#define SD_CD_DISABLE 0x02
+#define XD_CD_DISABLE 0x01
+#define CD_DISABLE 0x07
+#define CD_ENABLE 0x00
+#define MS_CD_EN_ONLY 0x03
+#define SD_CD_EN_ONLY 0x05
+#define XD_CD_EN_ONLY 0x06
+#define FORCE_CD_LOW_MASK 0x38
+#define FORCE_CD_XD_LOW 0x08
+#define FORCE_CD_SD_LOW 0x10
+#define FORCE_CD_MS_LOW 0x20
+#define CD_AUTO_DISABLE 0x40
#define FPDCTL 0xFC00
+#define SSC_POWER_DOWN 0x01
+#define SD_OC_POWER_DOWN 0x02
+#define ALL_POWER_DOWN 0x07
+#define OC_POWER_DOWN 0x06
#define PDINFO 0xFC01
#define CLK_CTL 0xFC02
+#define CHANGE_CLK 0x01
+#define CLK_LOW_FREQ 0x01
+
#define CLK_DIV 0xFC03
+#define CLK_DIV_1 0x01
+#define CLK_DIV_2 0x02
+#define CLK_DIV_4 0x03
+#define CLK_DIV_8 0x04
#define CLK_SEL 0xFC04
#define SSC_DIV_N_0 0xFC0F
#define SSC_DIV_N_1 0xFC10
#define SSC_CTL1 0xFC11
+#define SSC_RSTB 0x80
+#define SSC_8X_EN 0x40
+#define SSC_FIX_FRAC 0x20
+#define SSC_SEL_1M 0x00
+#define SSC_SEL_2M 0x08
+#define SSC_SEL_4M 0x10
+#define SSC_SEL_8M 0x18
#define SSC_CTL2 0xFC12
-
+#define SSC_DEPTH_MASK 0x07
+#define SSC_DEPTH_DISALBE 0x00
+#define SSC_DEPTH_4M 0x01
+#define SSC_DEPTH_2M 0x02
+#define SSC_DEPTH_1M 0x03
+#define SSC_DEPTH_500K 0x04
+#define SSC_DEPTH_250K 0x05
#define RCCTL 0xFC14
#define FPGA_PULL_CTL 0xFC1D
#define GPIO_CTL 0xFC1F
#define LDO_CTL 0xFC1E
+#define BPP_ASIC_1V7 0x00
+#define BPP_ASIC_1V8 0x01
+#define BPP_ASIC_1V9 0x02
+#define BPP_ASIC_2V0 0x03
+#define BPP_ASIC_2V7 0x04
+#define BPP_ASIC_2V8 0x05
+#define BPP_ASIC_3V2 0x06
+#define BPP_ASIC_3V3 0x07
+#define BPP_REG_TUNED18 0x07
+#define BPP_TUNED18_SHIFT_8402 5
+#define BPP_TUNED18_SHIFT_8411 4
+#define BPP_PAD_MASK 0x04
+#define BPP_PAD_3V3 0x04
+#define BPP_PAD_1V8 0x00
+#define BPP_LDO_POWB 0x03
+#define BPP_LDO_ON 0x00
+#define BPP_LDO_SUSPEND 0x02
+#define BPP_LDO_OFF 0x03
#define SYS_VER 0xFC32
#define CARD_PULL_CTL1 0xFD60
/* PCI Express Related Registers */
#define IRQEN0 0xFE20
#define IRQSTAT0 0xFE21
+#define DMA_DONE_INT 0x80
+#define SUSPEND_INT 0x40
+#define LINK_RDY_INT 0x20
+#define LINK_DOWN_INT 0x10
#define IRQEN1 0xFE22
#define IRQSTAT1 0xFE23
#define TLPRIEN 0xFE24
#define DMATC2 0xFE2A
#define DMATC3 0xFE2B
#define DMACTL 0xFE2C
+#define DMA_RST 0x80
+#define DMA_BUSY 0x04
+#define DMA_DIR_TO_CARD 0x00
+#define DMA_DIR_FROM_CARD 0x02
+#define DMA_EN 0x01
+#define DMA_128 (0 << 4)
+#define DMA_256 (1 << 4)
+#define DMA_512 (2 << 4)
+#define DMA_1024 (3 << 4)
+#define DMA_PACK_SIZE_MASK 0x30
#define BCTL 0xFE2D
#define RBBC0 0xFE2E
#define RBBC1 0xFE2F
#define MSGTXDATA2 0xFE46
#define MSGTXDATA3 0xFE47
#define MSGTXCTL 0xFE48
-#define PETXCFG 0xFE49
#define LTR_CTL 0xFE4A
#define OBFF_CFG 0xFE4C
#define CDRESUMECTL 0xFE52
#define WAKE_SEL_CTL 0xFE54
+#define PCLK_CTL 0xFE55
+#define PCLK_MODE_SEL 0x20
#define PME_FORCE_CTL 0xFE56
+
#define ASPM_FORCE_CTL 0xFE57
+#define FORCE_ASPM_CTL0 0x10
+#define FORCE_ASPM_VAL_MASK 0x03
+#define FORCE_ASPM_L1_EN 0x02
+#define FORCE_ASPM_L0_EN 0x01
+#define FORCE_ASPM_NO_ASPM 0x00
#define PM_CLK_FORCE_CTL 0xFE58
#define FUNC_FORCE_CTL 0xFE59
#define PERST_GLITCH_WIDTH 0xFE5C
#define RESET_LOAD_REG 0xFE5E
#define EFUSE_CONTENT 0xFE5F
#define HOST_SLEEP_STATE 0xFE60
-#define SDIO_CFG 0xFE70
+#define HOST_ENTER_S1 1
+#define HOST_ENTER_S3 2
+#define SDIO_CFG 0xFE70
+#define PM_EVENT_DEBUG 0xFE71
+#define PME_DEBUG_0 0x08
#define NFTS_TX_CTRL 0xFE72
#define PWR_GATE_CTRL 0xFE75
+#define PWR_GATE_EN 0x01
+#define LDO3318_PWR_MASK 0x06
+#define LDO_ON 0x00
+#define LDO_SUSPEND 0x04
+#define LDO_OFF 0x06
#define PWD_SUSPEND_EN 0xFE76
#define LDO_PWR_SEL 0xFE78
+#define L1SUB_CONFIG1 0xFE8D
+#define L1SUB_CONFIG2 0xFE8E
+#define L1SUB_AUTO_CFG 0x02
+#define L1SUB_CONFIG3 0xFE8F
+
#define DUMMY_REG_RESET_0 0xFE90
#define AUTOLOAD_CFG_BASE 0xFF00
+#define PETXCFG 0xFF03
#define PM_CTRL1 0xFF44
+#define CD_RESUME_EN_MASK 0xF0
+
#define PM_CTRL2 0xFF45
#define PM_CTRL3 0xFF46
#define SDIO_SEND_PME_EN 0x80
#define IMAGE_FLAG_ADDR0 0xCE80
#define IMAGE_FLAG_ADDR1 0xCE81
+#define RREF_CFG 0xFF6C
+#define RREF_VBGSEL_MASK 0x38
+#define RREF_VBGSEL_1V25 0x28
+
+#define OOBS_CONFIG 0xFF6E
+#define OOBS_AUTOK_DIS 0x80
+#define OOBS_VAL_MASK 0x1F
+
+#define LDO_DV18_CFG 0xFF70
+#define LDO_DV18_SR_MASK 0xC0
+#define LDO_DV18_SR_DF 0x40
+
+#define LDO_CONFIG2 0xFF71
+#define LDO_D3318_MASK 0x07
+#define LDO_D3318_33V 0x07
+#define LDO_D3318_18V 0x02
+
+#define LDO_VCC_CFG0 0xFF72
+#define LDO_VCC_LMTVTH_MASK 0x30
+#define LDO_VCC_LMTVTH_2A 0x10
+
+#define LDO_VCC_CFG1 0xFF73
+#define LDO_VCC_REF_TUNE_MASK 0x30
+#define LDO_VCC_REF_1V2 0x20
+#define LDO_VCC_TUNE_MASK 0x07
+#define LDO_VCC_1V8 0x04
+#define LDO_VCC_3V3 0x07
+#define LDO_VCC_LMT_EN 0x08
+
+#define LDO_VIO_CFG 0xFF75
+#define LDO_VIO_SR_MASK 0xC0
+#define LDO_VIO_SR_DF 0x40
+#define LDO_VIO_REF_TUNE_MASK 0x30
+#define LDO_VIO_REF_1V2 0x20
+#define LDO_VIO_TUNE_MASK 0x07
+#define LDO_VIO_1V7 0x03
+#define LDO_VIO_1V8 0x04
+#define LDO_VIO_3V3 0x07
+
+#define LDO_DV12S_CFG 0xFF76
+#define LDO_REF12_TUNE_MASK 0x18
+#define LDO_REF12_TUNE_DF 0x10
+#define LDO_D12_TUNE_MASK 0x07
+#define LDO_D12_TUNE_DF 0x04
+
+#define LDO_AV12S_CFG 0xFF77
+#define LDO_AV12S_TUNE_MASK 0x07
+#define LDO_AV12S_TUNE_DF 0x04
+
+#define SD40_LDO_CTL1 0xFE7D
+#define SD40_VIO_TUNE_MASK 0x70
+#define SD40_VIO_TUNE_1V7 0x30
+#define SD_VIO_LDO_1V8 0x40
+#define SD_VIO_LDO_3V3 0x70
+
/* Phy register */
#define PHY_PCR 0x00
+#define PHY_PCR_FORCE_CODE 0xB000
+#define PHY_PCR_OOBS_CALI_50 0x0800
+#define PHY_PCR_OOBS_VCM_08 0x0200
+#define PHY_PCR_OOBS_SEN_90 0x0040
+#define PHY_PCR_RSSI_EN 0x0002
+#define PHY_PCR_RX10K 0x0001
+
#define PHY_RCR0 0x01
#define PHY_RCR1 0x02
+#define PHY_RCR1_ADP_TIME_4 0x0400
+#define PHY_RCR1_VCO_COARSE 0x001F
+#define PHY_SSCCR2 0x02
+#define PHY_SSCCR2_PLL_NCODE 0x0A00
+#define PHY_SSCCR2_TIME0 0x001C
+#define PHY_SSCCR2_TIME2_WIDTH 0x0003
+
#define PHY_RCR2 0x03
+#define PHY_RCR2_EMPHASE_EN 0x8000
+#define PHY_RCR2_NADJR 0x4000
+#define PHY_RCR2_CDR_SR_2 0x0100
+#define PHY_RCR2_FREQSEL_12 0x0040
+#define PHY_RCR2_CDR_SC_12P 0x0010
+#define PHY_RCR2_CALIB_LATE 0x0002
+#define PHY_SSCCR3 0x03
+#define PHY_SSCCR3_STEP_IN 0x2740
+#define PHY_SSCCR3_CHECK_DELAY 0x0008
+#define _PHY_ANA03 0x03
+#define _PHY_ANA03_TIMER_MAX 0x2700
+#define _PHY_ANA03_OOBS_DEB_EN 0x0040
+#define _PHY_CMU_DEBUG_EN 0x0008
+
#define PHY_RTCR 0x04
#define PHY_RDR 0x05
+#define PHY_RDR_RXDSEL_1_9 0x4000
+#define PHY_SSC_AUTO_PWD 0x0600
#define PHY_TCR0 0x06
#define PHY_TCR1 0x07
#define PHY_TUNE 0x08
+#define PHY_TUNE_TUNEREF_1_0 0x4000
+#define PHY_TUNE_VBGSEL_1252 0x0C00
+#define PHY_TUNE_SDBUS_33 0x0200
+#define PHY_TUNE_TUNED18 0x01C0
+#define PHY_TUNE_TUNED12 0X0020
+#define PHY_TUNE_TUNEA12 0x0004
+#define PHY_TUNE_VOLTAGE_MASK 0xFC3F
+#define PHY_TUNE_VOLTAGE_3V3 0x03C0
+#define PHY_TUNE_D18_1V8 0x0100
+#define PHY_TUNE_D18_1V7 0x0080
+#define PHY_ANA08 0x08
+#define PHY_ANA08_RX_EQ_DCGAIN 0x5000
+#define PHY_ANA08_SEL_RX_EN 0x0400
+#define PHY_ANA08_RX_EQ_VAL 0x03C0
+#define PHY_ANA08_SCP 0x0020
+#define PHY_ANA08_SEL_IPI 0x0004
+
#define PHY_IMR 0x09
#define PHY_BPCR 0x0A
+#define PHY_BPCR_IBRXSEL 0x0400
+#define PHY_BPCR_IBTXSEL 0x0100
+#define PHY_BPCR_IB_FILTER 0x0080
+#define PHY_BPCR_CMIRROR_EN 0x0040
+
#define PHY_BIST 0x0B
#define PHY_RAW_L 0x0C
#define PHY_RAW_H 0x0D
#define PHY_HOST_CLK_CTRL 0x0F
#define PHY_DMR 0x10
#define PHY_BACR 0x11
+#define PHY_BACR_BASIC_MASK 0xFFF3
#define PHY_IER 0x12
#define PHY_BCSR 0x13
#define PHY_BPR 0x14
#define PHY_BPNR 0x16
#define PHY_BRNR2 0x17
#define PHY_BENR 0x18
-#define PHY_REG_REV 0x19
+#define PHY_REV 0x19
+#define PHY_REV_RESV 0xE000
+#define PHY_REV_RXIDLE_LATCHED 0x1000
+#define PHY_REV_P1_EN 0x0800
+#define PHY_REV_RXIDLE_EN 0x0400
+#define PHY_REV_CLKREQ_TX_EN 0x0200
+#define PHY_REV_CLKREQ_RX_EN 0x0100
+#define PHY_REV_CLKREQ_DT_1_0 0x0040
+#define PHY_REV_STOP_CLKRD 0x0020
+#define PHY_REV_RX_PWST 0x0008
+#define PHY_REV_STOP_CLKWR 0x0004
+#define _PHY_REV0 0x19
+#define _PHY_REV0_FILTER_OUT 0x3800
+#define _PHY_REV0_CDR_BYPASS_PFD 0x0100
+#define _PHY_REV0_CDR_RX_IDLE_BYPASS 0x0002
+
#define PHY_FLD0 0x1A
+#define PHY_ANA1A 0x1A
+#define PHY_ANA1A_TXR_LOOPBACK 0x2000
+#define PHY_ANA1A_RXT_BIST 0x0500
+#define PHY_ANA1A_TXR_BIST 0x0040
+#define PHY_ANA1A_REV 0x0006
#define PHY_FLD1 0x1B
#define PHY_FLD2 0x1C
#define PHY_FLD3 0x1D
+#define PHY_FLD3_TIMER_4 0x0800
+#define PHY_FLD3_TIMER_6 0x0020
+#define PHY_FLD3_RXDELINK 0x0004
+#define PHY_ANA1D 0x1D
+#define PHY_ANA1D_DEBUG_ADDR 0x0004
+#define _PHY_FLD0 0x1D
+#define _PHY_FLD0_CLK_REQ_20C 0x8000
+#define _PHY_FLD0_RX_IDLE_EN 0x1000
+#define _PHY_FLD0_BIT_ERR_RSTN 0x0800
+#define _PHY_FLD0_BER_COUNT 0x01E0
+#define _PHY_FLD0_BER_TIMER 0x001E
+#define _PHY_FLD0_CHECK_EN 0x0001
+
#define PHY_FLD4 0x1E
+#define PHY_FLD4_FLDEN_SEL 0x4000
+#define PHY_FLD4_REQ_REF 0x2000
+#define PHY_FLD4_RXAMP_OFF 0x1000
+#define PHY_FLD4_REQ_ADDA 0x0800
+#define PHY_FLD4_BER_COUNT 0x00E0
+#define PHY_FLD4_BER_TIMER 0x000A
+#define PHY_FLD4_BER_CHK_EN 0x0001
+#define PHY_DIG1E 0x1E
+#define PHY_DIG1E_REV 0x4000
+#define PHY_DIG1E_D0_X_D1 0x1000
+#define PHY_DIG1E_RX_ON_HOST 0x0800
+#define PHY_DIG1E_RCLK_REF_HOST 0x0400
+#define PHY_DIG1E_RCLK_TX_EN_KEEP 0x0040
+#define PHY_DIG1E_RCLK_TX_TERM_KEEP 0x0020
+#define PHY_DIG1E_RCLK_RX_EIDLE_ON 0x0010
+#define PHY_DIG1E_TX_TERM_KEEP 0x0008
+#define PHY_DIG1E_RX_TERM_KEEP 0x0004
+#define PHY_DIG1E_TX_EN_KEEP 0x0002
+#define PHY_DIG1E_RX_EN_KEEP 0x0001
#define PHY_DUM_REG 0x1F
-#define LCTLR 0x80
-#define LCTLR_EXT_SYNC 0x80
-#define LCTLR_COMMON_CLOCK_CFG 0x40
-#define LCTLR_RETRAIN_LINK 0x20
-#define LCTLR_LINK_DISABLE 0x10
-#define LCTLR_RCB 0x08
-#define LCTLR_RESERVED 0x04
-#define LCTLR_ASPM_CTL_MASK 0x03
-
#define PCR_SETTING_REG1 0x724
#define PCR_SETTING_REG2 0x814
#define PCR_SETTING_REG3 0x747
-/* Phy bits */
-#define PHY_PCR_FORCE_CODE 0xB000
-#define PHY_PCR_OOBS_CALI_50 0x0800
-#define PHY_PCR_OOBS_VCM_08 0x0200
-#define PHY_PCR_OOBS_SEN_90 0x0040
-#define PHY_PCR_RSSI_EN 0x0002
-
-#define PHY_RCR1_ADP_TIME 0x0100
-#define PHY_RCR1_VCO_COARSE 0x001F
-
-#define PHY_RCR2_EMPHASE_EN 0x8000
-#define PHY_RCR2_NADJR 0x4000
-#define PHY_RCR2_CDR_CP_10 0x0400
-#define PHY_RCR2_CDR_SR_2 0x0100
-#define PHY_RCR2_FREQSEL_12 0x0040
-#define PHY_RCR2_CPADJEN 0x0020
-#define PHY_RCR2_CDR_SC_8 0x0008
-#define PHY_RCR2_CALIB_LATE 0x0002
-
-#define PHY_RDR_RXDSEL_1_9 0x4000
-
-#define PHY_TUNE_TUNEREF_1_0 0x4000
-#define PHY_TUNE_VBGSEL_1252 0x0C00
-#define PHY_TUNE_SDBUS_33 0x0200
-#define PHY_TUNE_TUNED18 0x01C0
-#define PHY_TUNE_TUNED12 0X0020
-
-#define PHY_BPCR_IBRXSEL 0x0400
-#define PHY_BPCR_IBTXSEL 0x0100
-#define PHY_BPCR_IB_FILTER 0x0080
-#define PHY_BPCR_CMIRROR_EN 0x0040
-
-#define PHY_REG_REV_RESV 0xE000
-#define PHY_REG_REV_RXIDLE_LATCHED 0x1000
-#define PHY_REG_REV_P1_EN 0x0800
-#define PHY_REG_REV_RXIDLE_EN 0x0400
-#define PHY_REG_REV_CLKREQ_DLY_TIMER_1_0 0x0040
-#define PHY_REG_REV_STOP_CLKRD 0x0020
-#define PHY_REG_REV_RX_PWST 0x0008
-#define PHY_REG_REV_STOP_CLKWR 0x0004
-
-#define PHY_FLD3_TIMER_4 0x7800
-#define PHY_FLD3_TIMER_6 0x00E0
-#define PHY_FLD3_RXDELINK 0x0004
-
-#define PHY_FLD4_FLDEN_SEL 0x4000
-#define PHY_FLD4_REQ_REF 0x2000
-#define PHY_FLD4_RXAMP_OFF 0x1000
-#define PHY_FLD4_REQ_ADDA 0x0800
-#define PHY_FLD4_BER_COUNT 0x00E0
-#define PHY_FLD4_BER_TIMER 0x000A
-#define PHY_FLD4_BER_CHK_EN 0x0001
-
#define rtsx_pci_init_cmd(pcr) ((pcr)->ci = 0)
struct rtsx_pcr;
};
struct pcr_ops {
+ int (*write_phy)(struct rtsx_pcr *pcr, u8 addr, u16 val);
+ int (*read_phy)(struct rtsx_pcr *pcr, u8 addr, u16 *val);
int (*extra_init_hw)(struct rtsx_pcr *pcr);
int (*optimize_phy)(struct rtsx_pcr *pcr);
int (*turn_on_led)(struct rtsx_pcr *pcr);
struct rtsx_pcr {
struct pci_dev *pci;
unsigned int id;
+ int pcie_cap;
/* pci resources */
unsigned long addr;
const struct pcr_ops *ops;
enum PDEV_STAT state;
+ u16 reg_pm_ctrl3;
+
int num_slots;
struct rtsx_slot *slots;
};
#define CHK_PCI_PID(pcr, pid) ((pcr)->pci->device == (pid))
#define PCI_VID(pcr) ((pcr)->pci->vendor)
#define PCI_PID(pcr) ((pcr)->pci->device)
+#define is_version(pcr, pid, ver) \
+ (CHK_PCI_PID(pcr, pid) && (pcr)->ic_version == (ver))
+#define pcr_dbg(pcr, fmt, arg...) \
+ dev_dbg(&(pcr)->pci->dev, fmt, ##arg)
#define SDR104_PHASE(val) ((val) & 0xFF)
#define SDR50_PHASE(val) (((val) >> 8) & 0xFF)
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 3, 0xFF, val);
}
+static inline int rtsx_pci_update_phy(struct rtsx_pcr *pcr, u8 addr,
+ u16 mask, u16 append)
+{
+ int err;
+ u16 val;
+
+ err = rtsx_pci_read_phy_register(pcr, addr, &val);
+ if (err < 0)
+ return err;
+
+ return rtsx_pci_write_phy_register(pcr, addr, (val & mask) | append);
+}
+
#endif
* @irq_base: Base IRQ number for device, required for IRQs
* @irq: Generic IRQ number for device
* @irq_data: Runtime data structure for IRQ controller
- * @ono: Power onoff IRQ number for s5m87xx
* @wakeup: Whether or not this is a wakeup device
- * @wtsr_smpl: Whether or not to enable in RTC driver the Watchdog
- * Timer Software Reset (registers set to default value
- * after PWRHOLD falling) and Sudden Momentary Power Loss
- * (PMIC will enter power on sequence after short drop in
- * VBATT voltage).
*/
struct sec_pmic_dev {
struct device *dev;
int irq;
struct regmap_irq_chip_data *irq_data;
- int ono;
bool wakeup;
- bool wtsr_smpl;
};
int sec_irq_init(struct sec_pmic_dev *sec_pmic);
int irq_base;
int (*cfg_pmic_irq)(void);
- int ono;
bool wakeup;
bool buck_voltage_lock;
S2MPS11_IRQ_MRB,
S2MPS11_IRQ_RTC60S,
- S2MPS11_IRQ_RTCA0,
S2MPS11_IRQ_RTCA1,
+ S2MPS11_IRQ_RTCA0,
S2MPS11_IRQ_SMPL,
S2MPS11_IRQ_RTC1S,
S2MPS11_IRQ_WTSR,
--- /dev/null
+/*
+ * sky81452.h SKY81452 MFD driver
+ *
+ * Copyright 2014 Skyworks Solutions Inc.
+ * Author : Gyungoh Yoo <jack.yoo@skyworksinc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SKY81452_H
+#define _SKY81452_H
+
+#include <linux/platform_data/sky81452-backlight.h>
+#include <linux/regulator/machine.h>
+
+struct sky81452_platform_data {
+ struct sky81452_bl_platform_data *bl_pdata;
+ struct regulator_init_data *regulator_init_data;
+};
+
+#endif
/**
* struct stw481x - state holder for the Stw481x drivers
- * @mutex: mutex to serialize I2C accesses
* @i2c_client: corresponding I2C client
- * @regulator: regulator device for regulator children
* @map: regmap handle to access device registers
*/
struct stw481x {
- struct mutex lock;
struct i2c_client *client;
- struct regulator_dev *vmmc_regulator;
struct regmap *map;
};
#define EXYNOS5420_MTCADC_PHY_CONTROL (0x724)
#define EXYNOS5420_DPTX_PHY_CONTROL (0x728)
+/* Exynos5433 specific register definitions */
+#define EXYNOS5433_USBHOST30_PHY_CONTROL (0x728)
+
#define EXYNOS5_PHY_ENABLE BIT(0)
#define EXYNOS5_MIPI_PHY_S_RESETN BIT(1)
/* Sequencer Status */
#define SEQ_STATUS BIT(5)
+#define CHARGE_STEP 0x11
#define ADC_CLK 3000000
#define TOTAL_STEPS 16
struct wm8350_power {
struct platform_device *pdev;
- struct power_supply battery;
- struct power_supply usb;
- struct power_supply ac;
+ struct power_supply *battery;
+ struct power_supply *usb;
+ struct power_supply *ac;
struct wm8350_charger_policy *policy;
int rev_g_coeff;
extern bool pmd_trans_migrating(pmd_t pmd);
extern int migrate_misplaced_page(struct page *page,
struct vm_area_struct *vma, int node);
-extern bool migrate_ratelimited(int node);
#else
static inline bool pmd_trans_migrating(pmd_t pmd)
{
{
return -EAGAIN; /* can't migrate now */
}
-static inline bool migrate_ratelimited(int node)
-{
- return false;
-}
#endif /* CONFIG_NUMA_BALANCING */
#if defined(CONFIG_NUMA_BALANCING) && defined(CONFIG_TRANSPARENT_HUGEPAGE)
int redirty_page_for_writepage(struct writeback_control *wbc,
struct page *page);
void account_page_dirtied(struct page *page, struct address_space *mapping);
+void account_page_cleaned(struct page *page, struct address_space *mapping);
int set_page_dirty(struct page *page);
int set_page_dirty_lock(struct page *page);
int clear_page_dirty_for_io(struct page *page);
+
int get_cmdline(struct task_struct *task, char *buffer, int buflen);
/* Is the vma a continuation of the stack vma above it? */
#define FOLL_FORCE 0x10 /* get_user_pages read/write w/o permission */
#define FOLL_NOWAIT 0x20 /* if a disk transfer is needed, start the IO
* and return without waiting upon it */
-#define FOLL_MLOCK 0x40 /* mark page as mlocked */
+#define FOLL_POPULATE 0x40 /* fault in page */
#define FOLL_SPLIT 0x80 /* don't return transhuge pages, split them */
#define FOLL_HWPOISON 0x100 /* check page is hwpoisoned */
#define FOLL_NUMA 0x200 /* force NUMA hinting page fault */
atomic_t mm_users; /* How many users with user space? */
atomic_t mm_count; /* How many references to "struct mm_struct" (users count as 1) */
atomic_long_t nr_ptes; /* PTE page table pages */
+#if CONFIG_PGTABLE_LEVELS > 2
atomic_long_t nr_pmds; /* PMD page table pages */
+#endif
int map_count; /* number of VMAs */
spinlock_t page_table_lock; /* Protects page tables and some counters */
#define mmc_cmd_type(cmd) ((cmd)->flags & MMC_CMD_MASK)
unsigned int retries; /* max number of retries */
- unsigned int error; /* command error */
+ int error; /* command error */
/*
* Standard errno values are used for errors, but some have specific
unsigned int timeout_clks; /* data timeout (in clocks) */
unsigned int blksz; /* data block size */
unsigned int blocks; /* number of blocks */
- unsigned int error; /* data error */
+ int error; /* data error */
unsigned int flags;
#define MMC_DATA_WRITE (1 << 8)
* struct dw_mci - MMC controller state shared between all slots
* @lock: Spinlock protecting the queue and associated data.
* @regs: Pointer to MMIO registers.
+ * @fifo_reg: Pointer to MMIO registers for data FIFO
* @sg: Scatterlist entry currently being processed by PIO code, if any.
* @sg_miter: PIO mapping scatterlist iterator.
* @cur_slot: The slot which is currently using the controller.
* @current_speed: Configured rate of the controller.
* @num_slots: Number of slots available.
* @verid: Denote Version ID.
- * @data_offset: Set the offset of DATA register according to VERID.
* @dev: Device associated with the MMC controller.
* @pdata: Platform data associated with the MMC controller.
* @drv_data: Driver specific data for identified variant of the controller
spinlock_t lock;
spinlock_t irq_lock;
void __iomem *regs;
+ void __iomem *fifo_reg;
struct scatterlist *sg;
struct sg_mapping_iter sg_miter;
u32 num_slots;
u32 fifoth_val;
u16 verid;
- u16 data_offset;
struct device *dev;
struct dw_mci_board *pdata;
const struct dw_mci_drv_data *drv_data;
int irq;
int sdio_id0;
+
+ struct timer_list cmd11_timer;
};
/* DMA ops for Internal/External DMAC interface */
};
struct mmc_host_ops {
- /*
- * 'enable' is called when the host is claimed and 'disable' is called
- * when the host is released. 'enable' and 'disable' are deprecated.
- */
- int (*enable)(struct mmc_host *host);
- int (*disable)(struct mmc_host *host);
/*
* It is optional for the host to implement pre_req and post_req in
* order to support double buffering of requests (prepare one
+++ /dev/null
-/*
- * include/linux/mmc/sdhci-spear.h
- *
- * SDHCI declarations specific to ST SPEAr platform
- *
- * Copyright (C) 2010 ST Microelectronics
- * Viresh Kumar <viresh.linux@gmail.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef LINUX_MMC_SDHCI_SPEAR_H
-#define LINUX_MMC_SDHCI_SPEAR_H
-
-#include <linux/platform_device.h>
-/*
- * struct sdhci_plat_data: spear sdhci platform data structure
- *
- * card_int_gpio: gpio pin used for card detection
- */
-struct sdhci_plat_data {
- int card_int_gpio;
-};
-
-/* This function is used to set platform_data field of pdev->dev */
-static inline void
-sdhci_set_plat_data(struct platform_device *pdev, struct sdhci_plat_data *data)
-{
- pdev->dev.platform_data = data;
-}
-
-#endif /* LINUX_MMC_SDHCI_SPEAR_H */
+++ /dev/null
-/*
- * linux/include/linux/mmc/sdhci.h - Secure Digital Host Controller Interface
- *
- * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- */
-#ifndef LINUX_MMC_SDHCI_H
-#define LINUX_MMC_SDHCI_H
-
-#include <linux/scatterlist.h>
-#include <linux/compiler.h>
-#include <linux/types.h>
-#include <linux/io.h>
-#include <linux/mmc/host.h>
-
-struct sdhci_host_next {
- unsigned int sg_count;
- s32 cookie;
-};
-
-struct sdhci_host {
- /* Data set by hardware interface driver */
- const char *hw_name; /* Hardware bus name */
-
- unsigned int quirks; /* Deviations from spec. */
-
-/* Controller doesn't honor resets unless we touch the clock register */
-#define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0)
-/* Controller has bad caps bits, but really supports DMA */
-#define SDHCI_QUIRK_FORCE_DMA (1<<1)
-/* Controller doesn't like to be reset when there is no card inserted. */
-#define SDHCI_QUIRK_NO_CARD_NO_RESET (1<<2)
-/* Controller doesn't like clearing the power reg before a change */
-#define SDHCI_QUIRK_SINGLE_POWER_WRITE (1<<3)
-/* Controller has flaky internal state so reset it on each ios change */
-#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS (1<<4)
-/* Controller has an unusable DMA engine */
-#define SDHCI_QUIRK_BROKEN_DMA (1<<5)
-/* Controller has an unusable ADMA engine */
-#define SDHCI_QUIRK_BROKEN_ADMA (1<<6)
-/* Controller can only DMA from 32-bit aligned addresses */
-#define SDHCI_QUIRK_32BIT_DMA_ADDR (1<<7)
-/* Controller can only DMA chunk sizes that are a multiple of 32 bits */
-#define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<8)
-/* Controller can only ADMA chunks that are a multiple of 32 bits */
-#define SDHCI_QUIRK_32BIT_ADMA_SIZE (1<<9)
-/* Controller needs to be reset after each request to stay stable */
-#define SDHCI_QUIRK_RESET_AFTER_REQUEST (1<<10)
-/* Controller needs voltage and power writes to happen separately */
-#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER (1<<11)
-/* Controller provides an incorrect timeout value for transfers */
-#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL (1<<12)
-/* Controller has an issue with buffer bits for small transfers */
-#define SDHCI_QUIRK_BROKEN_SMALL_PIO (1<<13)
-/* Controller does not provide transfer-complete interrupt when not busy */
-#define SDHCI_QUIRK_NO_BUSY_IRQ (1<<14)
-/* Controller has unreliable card detection */
-#define SDHCI_QUIRK_BROKEN_CARD_DETECTION (1<<15)
-/* Controller reports inverted write-protect state */
-#define SDHCI_QUIRK_INVERTED_WRITE_PROTECT (1<<16)
-/* Controller does not like fast PIO transfers */
-#define SDHCI_QUIRK_PIO_NEEDS_DELAY (1<<18)
-/* Controller has to be forced to use block size of 2048 bytes */
-#define SDHCI_QUIRK_FORCE_BLK_SZ_2048 (1<<20)
-/* Controller cannot do multi-block transfers */
-#define SDHCI_QUIRK_NO_MULTIBLOCK (1<<21)
-/* Controller can only handle 1-bit data transfers */
-#define SDHCI_QUIRK_FORCE_1_BIT_DATA (1<<22)
-/* Controller needs 10ms delay between applying power and clock */
-#define SDHCI_QUIRK_DELAY_AFTER_POWER (1<<23)
-/* Controller uses SDCLK instead of TMCLK for data timeouts */
-#define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK (1<<24)
-/* Controller reports wrong base clock capability */
-#define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN (1<<25)
-/* Controller cannot support End Attribute in NOP ADMA descriptor */
-#define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC (1<<26)
-/* Controller is missing device caps. Use caps provided by host */
-#define SDHCI_QUIRK_MISSING_CAPS (1<<27)
-/* Controller uses Auto CMD12 command to stop the transfer */
-#define SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 (1<<28)
-/* Controller doesn't have HISPD bit field in HI-SPEED SD card */
-#define SDHCI_QUIRK_NO_HISPD_BIT (1<<29)
-/* Controller treats ADMA descriptors with length 0000h incorrectly */
-#define SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC (1<<30)
-/* The read-only detection via SDHCI_PRESENT_STATE register is unstable */
-#define SDHCI_QUIRK_UNSTABLE_RO_DETECT (1<<31)
-
- unsigned int quirks2; /* More deviations from spec. */
-
-#define SDHCI_QUIRK2_HOST_OFF_CARD_ON (1<<0)
-#define SDHCI_QUIRK2_HOST_NO_CMD23 (1<<1)
-/* The system physically doesn't support 1.8v, even if the host does */
-#define SDHCI_QUIRK2_NO_1_8_V (1<<2)
-#define SDHCI_QUIRK2_PRESET_VALUE_BROKEN (1<<3)
-#define SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON (1<<4)
-/* Controller has a non-standard host control register */
-#define SDHCI_QUIRK2_BROKEN_HOST_CONTROL (1<<5)
-/* Controller does not support HS200 */
-#define SDHCI_QUIRK2_BROKEN_HS200 (1<<6)
-/* Controller does not support DDR50 */
-#define SDHCI_QUIRK2_BROKEN_DDR50 (1<<7)
-/* Stop command (CMD12) can set Transfer Complete when not using MMC_RSP_BUSY */
-#define SDHCI_QUIRK2_STOP_WITH_TC (1<<8)
-/* Controller does not support 64-bit DMA */
-#define SDHCI_QUIRK2_BROKEN_64_BIT_DMA (1<<9)
-/* need clear transfer mode register before send cmd */
-#define SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD (1<<10)
-/* Capability register bit-63 indicates HS400 support */
-#define SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 (1<<11)
-/* forced tuned clock */
-#define SDHCI_QUIRK2_TUNING_WORK_AROUND (1<<12)
-/* disable the block count for single block transactions */
-#define SDHCI_QUIRK2_SUPPORT_SINGLE (1<<13)
-
- int irq; /* Device IRQ */
- void __iomem *ioaddr; /* Mapped address */
-
- const struct sdhci_ops *ops; /* Low level hw interface */
-
- /* Internal data */
- struct mmc_host *mmc; /* MMC structure */
- u64 dma_mask; /* custom DMA mask */
-
-#if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE)
- struct led_classdev led; /* LED control */
- char led_name[32];
-#endif
-
- spinlock_t lock; /* Mutex */
-
- int flags; /* Host attributes */
-#define SDHCI_USE_SDMA (1<<0) /* Host is SDMA capable */
-#define SDHCI_USE_ADMA (1<<1) /* Host is ADMA capable */
-#define SDHCI_REQ_USE_DMA (1<<2) /* Use DMA for this req. */
-#define SDHCI_DEVICE_DEAD (1<<3) /* Device unresponsive */
-#define SDHCI_SDR50_NEEDS_TUNING (1<<4) /* SDR50 needs tuning */
-#define SDHCI_NEEDS_RETUNING (1<<5) /* Host needs retuning */
-#define SDHCI_AUTO_CMD12 (1<<6) /* Auto CMD12 support */
-#define SDHCI_AUTO_CMD23 (1<<7) /* Auto CMD23 support */
-#define SDHCI_PV_ENABLED (1<<8) /* Preset value enabled */
-#define SDHCI_SDIO_IRQ_ENABLED (1<<9) /* SDIO irq enabled */
-#define SDHCI_SDR104_NEEDS_TUNING (1<<10) /* SDR104/HS200 needs tuning */
-#define SDHCI_USING_RETUNING_TIMER (1<<11) /* Host is using a retuning timer for the card */
-#define SDHCI_USE_64_BIT_DMA (1<<12) /* Use 64-bit DMA */
-#define SDHCI_HS400_TUNING (1<<13) /* Tuning for HS400 */
-
- unsigned int version; /* SDHCI spec. version */
-
- unsigned int max_clk; /* Max possible freq (MHz) */
- unsigned int timeout_clk; /* Timeout freq (KHz) */
- unsigned int clk_mul; /* Clock Muliplier value */
-
- unsigned int clock; /* Current clock (MHz) */
- u8 pwr; /* Current voltage */
-
- bool runtime_suspended; /* Host is runtime suspended */
- bool bus_on; /* Bus power prevents runtime suspend */
- bool preset_enabled; /* Preset is enabled */
-
- struct mmc_request *mrq; /* Current request */
- struct mmc_command *cmd; /* Current command */
- struct mmc_data *data; /* Current data request */
- unsigned int data_early:1; /* Data finished before cmd */
- unsigned int busy_handle:1; /* Handling the order of Busy-end */
-
- struct sg_mapping_iter sg_miter; /* SG state for PIO */
- unsigned int blocks; /* remaining PIO blocks */
-
- int sg_count; /* Mapped sg entries */
-
- void *adma_table; /* ADMA descriptor table */
- void *align_buffer; /* Bounce buffer */
-
- size_t adma_table_sz; /* ADMA descriptor table size */
- size_t align_buffer_sz; /* Bounce buffer size */
-
- dma_addr_t adma_addr; /* Mapped ADMA descr. table */
- dma_addr_t align_addr; /* Mapped bounce buffer */
-
- unsigned int desc_sz; /* ADMA descriptor size */
- unsigned int align_sz; /* ADMA alignment */
- unsigned int align_mask; /* ADMA alignment mask */
-
- struct tasklet_struct finish_tasklet; /* Tasklet structures */
-
- struct timer_list timer; /* Timer for timeouts */
-
- u32 caps; /* Alternative CAPABILITY_0 */
- u32 caps1; /* Alternative CAPABILITY_1 */
-
- unsigned int ocr_avail_sdio; /* OCR bit masks */
- unsigned int ocr_avail_sd;
- unsigned int ocr_avail_mmc;
- u32 ocr_mask; /* available voltages */
-
- unsigned timing; /* Current timing */
-
- u32 thread_isr;
-
- /* cached registers */
- u32 ier;
-
- wait_queue_head_t buf_ready_int; /* Waitqueue for Buffer Read Ready interrupt */
- unsigned int tuning_done; /* Condition flag set when CMD19 succeeds */
-
- unsigned int tuning_count; /* Timer count for re-tuning */
- unsigned int tuning_mode; /* Re-tuning mode supported by host */
-#define SDHCI_TUNING_MODE_1 0
- struct timer_list tuning_timer; /* Timer for tuning */
-
- struct sdhci_host_next next_data;
- unsigned long private[0] ____cacheline_aligned;
-};
-#endif /* LINUX_MMC_SDHCI_H */
unsigned long wait_table_bits;
ZONE_PADDING(_pad1_)
-
- /* Write-intensive fields used from the page allocator */
- spinlock_t lock;
-
/* free areas of different sizes */
struct free_area free_area[MAX_ORDER];
/* zone flags, see below */
unsigned long flags;
+ /* Write-intensive fields used from the page allocator */
+ spinlock_t lock;
+
ZONE_PADDING(_pad2_)
/* Write-intensive fields used by page reclaim */
#ifdef CONFIG_EVENT_TRACING
struct ftrace_event_call **trace_events;
unsigned int num_trace_events;
+ struct trace_enum_map **trace_enums;
+ unsigned int num_trace_enums;
#endif
#ifdef CONFIG_FTRACE_MCOUNT_RECORD
unsigned int num_ftrace_callsites;
#endif
#if defined(CONFIG_HARDLOCKUP_DETECTOR)
-extern void watchdog_enable_hardlockup_detector(bool val);
-extern bool watchdog_hardlockup_detector_is_enabled(void);
+extern void hardlockup_detector_disable(void);
#else
-static inline void watchdog_enable_hardlockup_detector(bool val)
+static inline void hardlockup_detector_disable(void)
{
}
-static inline bool watchdog_hardlockup_detector_is_enabled(void)
-{
- return true;
-}
#endif
/*
#ifdef CONFIG_LOCKUP_DETECTOR
int hw_nmi_is_cpu_stuck(struct pt_regs *);
u64 hw_nmi_get_sample_period(int watchdog_thresh);
+extern int nmi_watchdog_enabled;
+extern int soft_watchdog_enabled;
extern int watchdog_user_enabled;
extern int watchdog_thresh;
extern int sysctl_softlockup_all_cpu_backtrace;
struct ctl_table;
-extern int proc_dowatchdog(struct ctl_table *, int ,
- void __user *, size_t *, loff_t *);
+extern int proc_watchdog(struct ctl_table *, int ,
+ void __user *, size_t *, loff_t *);
+extern int proc_nmi_watchdog(struct ctl_table *, int ,
+ void __user *, size_t *, loff_t *);
+extern int proc_soft_watchdog(struct ctl_table *, int ,
+ void __user *, size_t *, loff_t *);
+extern int proc_watchdog_thresh(struct ctl_table *, int ,
+ void __user *, size_t *, loff_t *);
#endif
#ifdef CONFIG_HAVE_ACPI_APEI_NMI
extern void of_alias_scan(void * (*dt_alloc)(u64 size, u64 align));
extern int of_alias_get_id(struct device_node *np, const char *stem);
+extern int of_alias_get_highest_id(const char *stem);
extern int of_machine_is_compatible(const char *compat);
return -ENOSYS;
}
+static inline int of_alias_get_highest_id(const char *stem)
+{
+ return -ENOSYS;
+}
+
static inline int of_machine_is_compatible(const char *compat)
{
return 0;
return of_node_get(cpu_dev->of_node);
}
+void of_dma_configure(struct device *dev, struct device_node *np);
#else /* CONFIG_OF */
static inline int of_driver_match_device(struct device *dev,
{
return NULL;
}
+static inline void of_dma_configure(struct device *dev, struct device_node *np)
+{}
#endif /* CONFIG_OF */
#endif /* _LINUX_OF_DEVICE_H */
size_t *size);
extern void of_iommu_init(void);
-extern struct iommu_ops *of_iommu_configure(struct device *dev);
+extern struct iommu_ops *of_iommu_configure(struct device *dev,
+ struct device_node *master_np);
#else
}
static inline void of_iommu_init(void) { }
-static inline struct iommu_ops *of_iommu_configure(struct device *dev)
+static inline struct iommu_ops *of_iommu_configure(struct device *dev,
+ struct device_node *master_np)
{
return NULL;
}
int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin);
int of_pci_parse_bus_range(struct device_node *node, struct resource *res);
int of_get_pci_domain_nr(struct device_node *node);
+void of_pci_dma_configure(struct pci_dev *pci_dev);
#else
static inline int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq)
{
{
return -1;
}
+
+static inline void of_pci_dma_configure(struct pci_dev *pci_dev) { }
#endif
#if defined(CONFIG_OF_ADDRESS)
extern void oom_zonelist_unlock(struct zonelist *zonelist, gfp_t gfp_flags);
extern void check_panic_on_oom(enum oom_constraint constraint, gfp_t gfp_mask,
- int order, const nodemask_t *nodemask);
+ int order, const nodemask_t *nodemask,
+ struct mem_cgroup *memcg);
extern enum oom_scan_t oom_scan_process_thread(struct task_struct *task,
unsigned long totalpages, const nodemask_t *nodemask,
CLEARPAGEFLAG(Uptodate, uptodate)
-extern void cancel_dirty_page(struct page *page, unsigned int account_size);
-
int test_clear_page_writeback(struct page *page);
int __test_set_page_writeback(struct page *page, bool keep_write);
static inline void acpiphp_check_host_bridge(struct acpi_device *adev) { }
#endif
+extern const u8 pci_acpi_dsm_uuid[];
+#define DEVICE_LABEL_DSM 0x07
+#define RESET_DELAY_DSM 0x08
+#define FUNCTION_DELAY_DSM 0x09
+
#else /* CONFIG_ACPI */
static inline void acpi_pci_add_bus(struct pci_bus *bus) { }
static inline void acpi_pci_remove_bus(struct pci_bus *bus) { }
void pcie_aspm_powersave_config_link(struct pci_dev *pdev);
void pci_disable_link_state(struct pci_dev *pdev, int state);
void pci_disable_link_state_locked(struct pci_dev *pdev, int state);
-void pcie_clear_aspm(struct pci_bus *bus);
void pcie_no_aspm(void);
#else
static inline void pcie_aspm_init_link_state(struct pci_dev *pdev)
static inline void pci_disable_link_state(struct pci_dev *pdev, int state)
{
}
-static inline void pcie_clear_aspm(struct pci_bus *bus)
-{
-}
static inline void pcie_no_aspm(void)
{
}
struct list_head windows; /* resource_entry */
void (*release_fn)(struct pci_host_bridge *);
void *release_data;
+ unsigned int ignore_reset_delay:1; /* for entire hierarchy */
};
#define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev)
return dev->bus->self;
}
+struct device *pci_get_host_bridge_device(struct pci_dev *dev);
+void pci_put_host_bridge_device(struct device *dev);
+
#ifdef CONFIG_PCI_MSI
static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
{
#define PCI_VENDOR_ID_CENATEK 0x16CA
#define PCI_DEVICE_ID_CENATEK_IDE 0x0001
+#define PCI_VENDOR_ID_SYNOPSYS 0x16c3
+
#define PCI_VENDOR_ID_VITESSE 0x1725
#define PCI_DEVICE_ID_VITESSE_VSC7174 0x7174
#include <linux/sysfs.h>
#include <linux/perf_regs.h>
#include <linux/workqueue.h>
+#include <linux/cgroup.h>
#include <asm/local.h>
struct perf_callchain_entry {
struct hrtimer hrtimer;
};
struct { /* tracepoint */
- struct task_struct *tp_target;
/* for tp_event->class */
struct list_head tp_list;
};
+ struct { /* intel_cqm */
+ int cqm_state;
+ int cqm_rmid;
+ struct list_head cqm_events_entry;
+ struct list_head cqm_groups_entry;
+ struct list_head cqm_group_entry;
+ };
+ struct { /* itrace */
+ int itrace_started;
+ };
#ifdef CONFIG_HAVE_HW_BREAKPOINT
struct { /* breakpoint */
/*
* problem hw_breakpoint has with context
* creation and event initalization.
*/
- struct task_struct *bp_target;
struct arch_hw_breakpoint info;
struct list_head bp_list;
};
#endif
};
+ struct task_struct *target;
int state;
local64_t prev_count;
u64 sample_period;
* pmu::capabilities flags
*/
#define PERF_PMU_CAP_NO_INTERRUPT 0x01
+#define PERF_PMU_CAP_NO_NMI 0x02
+#define PERF_PMU_CAP_AUX_NO_SG 0x04
+#define PERF_PMU_CAP_AUX_SW_DOUBLEBUF 0x08
+#define PERF_PMU_CAP_EXCLUSIVE 0x10
+#define PERF_PMU_CAP_ITRACE 0x20
/**
* struct pmu - generic performance monitoring unit
int * __percpu pmu_disable_count;
struct perf_cpu_context * __percpu pmu_cpu_context;
+ atomic_t exclusive_cnt; /* < 0: cpu; > 0: tsk */
int task_ctx_nr;
int hrtimer_interval_ms;
int (*event_idx) (struct perf_event *event); /*optional */
/*
- * flush branch stack on context-switches (needed in cpu-wide mode)
+ * context-switches callback
+ */
+ void (*sched_task) (struct perf_event_context *ctx,
+ bool sched_in);
+ /*
+ * PMU specific data size
+ */
+ size_t task_ctx_size;
+
+
+ /*
+ * Return the count value for a counter.
+ */
+ u64 (*count) (struct perf_event *event); /*optional*/
+
+ /*
+ * Set up pmu-private data structures for an AUX area
*/
- void (*flush_branch_stack) (void);
+ void *(*setup_aux) (int cpu, void **pages,
+ int nr_pages, bool overwrite);
+ /* optional */
+
+ /*
+ * Free pmu-private AUX data structures
+ */
+ void (*free_aux) (void *aux); /* optional */
};
/**
#define PERF_ATTACH_CONTEXT 0x01
#define PERF_ATTACH_GROUP 0x02
#define PERF_ATTACH_TASK 0x04
+#define PERF_ATTACH_TASK_DATA 0x08
struct perf_cgroup;
struct ring_buffer;
struct pid_namespace *ns;
u64 id;
+ u64 (*clock)(void);
perf_overflow_handler_t overflow_handler;
void *overflow_handler_context;
u64 generation;
int pin_count;
int nr_cgroups; /* cgroup evts */
- int nr_branch_stack; /* branch_stack evt */
+ void *task_ctx_data; /* pmu specific data */
struct rcu_head rcu_head;
struct delayed_work orphans_remove;
struct ring_buffer *rb;
unsigned long wakeup;
unsigned long size;
- void *addr;
+ union {
+ void *addr;
+ unsigned long head;
+ };
int page;
};
+#ifdef CONFIG_CGROUP_PERF
+
+/*
+ * perf_cgroup_info keeps track of time_enabled for a cgroup.
+ * This is a per-cpu dynamically allocated data structure.
+ */
+struct perf_cgroup_info {
+ u64 time;
+ u64 timestamp;
+};
+
+struct perf_cgroup {
+ struct cgroup_subsys_state css;
+ struct perf_cgroup_info __percpu *info;
+};
+
+/*
+ * Must ensure cgroup is pinned (css_get) before calling
+ * this function. In other words, we cannot call this function
+ * if there is no cgroup event for the current CPU context.
+ */
+static inline struct perf_cgroup *
+perf_cgroup_from_task(struct task_struct *task)
+{
+ return container_of(task_css(task, perf_event_cgrp_id),
+ struct perf_cgroup, css);
+}
+#endif /* CONFIG_CGROUP_PERF */
+
#ifdef CONFIG_PERF_EVENTS
+extern void *perf_aux_output_begin(struct perf_output_handle *handle,
+ struct perf_event *event);
+extern void perf_aux_output_end(struct perf_output_handle *handle,
+ unsigned long size, bool truncated);
+extern int perf_aux_output_skip(struct perf_output_handle *handle,
+ unsigned long size);
+extern void *perf_get_aux(struct perf_output_handle *handle);
+
extern int perf_pmu_register(struct pmu *pmu, const char *name, int type);
extern void perf_pmu_unregister(struct pmu *pmu);
extern void perf_event_print_debug(void);
extern void perf_pmu_disable(struct pmu *pmu);
extern void perf_pmu_enable(struct pmu *pmu);
+extern void perf_sched_cb_dec(struct pmu *pmu);
+extern void perf_sched_cb_inc(struct pmu *pmu);
extern int perf_event_task_disable(void);
extern int perf_event_task_enable(void);
extern int perf_event_refresh(struct perf_event *event, int refresh);
__perf_event_task_sched_out(prev, next);
}
+static inline u64 __perf_event_count(struct perf_event *event)
+{
+ return local64_read(&event->count) + atomic64_read(&event->child_count);
+}
+
extern void perf_event_mmap(struct vm_area_struct *vma);
extern struct perf_guest_info_callbacks *perf_guest_cbs;
extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks);
return event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK;
}
+static inline bool needs_branch_stack(struct perf_event *event)
+{
+ return event->attr.branch_sample_type != 0;
+}
+
+static inline bool has_aux(struct perf_event *event)
+{
+ return event->pmu->setup_aux;
+}
+
extern int perf_output_begin(struct perf_output_handle *handle,
struct perf_event *event, unsigned int size);
extern void perf_output_end(struct perf_output_handle *handle);
extern int __perf_event_disable(void *info);
extern void perf_event_task_tick(void);
#else /* !CONFIG_PERF_EVENTS: */
+static inline void *
+perf_aux_output_begin(struct perf_output_handle *handle,
+ struct perf_event *event) { return NULL; }
+static inline void
+perf_aux_output_end(struct perf_output_handle *handle, unsigned long size,
+ bool truncated) { }
+static inline int
+perf_aux_output_skip(struct perf_output_handle *handle,
+ unsigned long size) { return -EINVAL; }
+static inline void *
+perf_get_aux(struct perf_output_handle *handle) { return NULL; }
static inline void
perf_event_task_sched_in(struct task_struct *prev,
struct task_struct *task) { }
u32 caps; /* Used for the MMC driver on 2430 and later */
u32 pm_caps; /* PM capabilities of the mmc */
- /* switch pin can be for card detect (default) or card cover */
- unsigned cover:1;
-
/* use the internal clock */
unsigned internal_clock:1;
#define HSMMC_HAS_HSPE_SUPPORT (1 << 2)
unsigned features;
- int switch_pin; /* gpio (card detect) */
+ int gpio_cd; /* gpio (card detect) */
+ int gpio_cod; /* gpio (cover detect) */
int gpio_wp; /* gpio (write protect) */
int (*set_power)(struct device *dev, int power_on, int vdd);
unsigned int bus_delay; /* post-transaction delay (usec) */
unsigned int sda_pin; /* GPIO pin ID to use for SDA */
unsigned int scl_pin; /* GPIO pin ID to use for SCL */
+ bool has_pfunc; /*chip has a ICPFUNC register */
};
/* for board setup code */
--- /dev/null
+/*
+ * sky81452.h SKY81452 backlight driver
+ *
+ * Copyright 2014 Skyworks Solutions Inc.
+ * Author : Gyungoh Yoo <jack.yoo@skyworksinc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SKY81452_BACKLIGHT_H
+#define _SKY81452_BACKLIGHT_H
+
+/**
+ * struct sky81452_platform_data
+ * @name: backlight driver name.
+ If it is not defined, default name is lcd-backlight.
+ * @gpio_enable:GPIO number which control EN pin
+ * @enable: Enable mask for current sink channel 1, 2, 3, 4, 5 and 6.
+ * @ignore_pwm: true if DPWMI should be ignored.
+ * @dpwm_mode: true is DPWM dimming mode, otherwise Analog dimming mode.
+ * @phase_shift:true is phase shift mode.
+ * @short_detecion_threshold: It should be one of 4, 5, 6 and 7V.
+ * @boost_current_limit: It should be one of 2300, 2750mA.
+ */
+struct sky81452_bl_platform_data {
+ const char *name;
+ int gpio_enable;
+ unsigned int enable;
+ bool ignore_pwm;
+ bool dpwm_mode;
+ bool phase_shift;
+ unsigned int short_detection_threshold;
+ unsigned int boost_current_limit;
+};
+
+#endif
int emergency_stop;
char psy_name_buf[PSY_NAME_MAX + 1];
- struct power_supply charger_psy;
+ struct power_supply_desc charger_psy_desc;
+ struct power_supply *charger_psy;
u64 charging_start_time;
u64 charging_end_time;
MAX17047_QRTbl30 = 0x42,
};
-enum max170xx_chip_type {MAX17042, MAX17047};
+enum max170xx_chip_type {
+ MAXIM_DEVICE_TYPE_UNKNOWN = 0,
+ MAXIM_DEVICE_TYPE_MAX17042,
+ MAXIM_DEVICE_TYPE_MAX17047,
+ MAXIM_DEVICE_TYPE_MAX17050,
+
+ MAXIM_DEVICE_TYPE_NUM
+};
/*
* used for setting a register to a desired value
#ifndef __LINUX_POWER_SUPPLY_H__
#define __LINUX_POWER_SUPPLY_H__
+#include <linux/device.h>
#include <linux/workqueue.h>
#include <linux/leds.h>
#include <linux/spinlock.h>
const char *strval;
};
-struct device;
struct device_node;
+struct power_supply;
-struct power_supply {
- const char *name;
- enum power_supply_type type;
- enum power_supply_property *properties;
- size_t num_properties;
+/* Run-time specific power supply configuration */
+struct power_supply_config {
+ struct device_node *of_node;
+ /* Driver private data */
+ void *drv_data;
char **supplied_to;
size_t num_supplicants;
+};
- char **supplied_from;
- size_t num_supplies;
- struct device_node *of_node;
+/* Description of power supply */
+struct power_supply_desc {
+ const char *name;
+ enum power_supply_type type;
+ enum power_supply_property *properties;
+ size_t num_properties;
+ /*
+ * Functions for drivers implementing power supply class.
+ * These shouldn't be called directly by other drivers for accessing
+ * this power supply. Instead use power_supply_*() functions (for
+ * example power_supply_get_property()).
+ */
int (*get_property)(struct power_supply *psy,
enum power_supply_property psp,
union power_supply_propval *val);
bool no_thermal;
/* For APM emulation, think legacy userspace. */
int use_for_apm;
+};
+
+struct power_supply {
+ const struct power_supply_desc *desc;
+
+ char **supplied_to;
+ size_t num_supplicants;
+
+ char **supplied_from;
+ size_t num_supplies;
+ struct device_node *of_node;
+
+ /* Driver private data */
+ void *drv_data;
/* private */
- struct device *dev;
+ struct device dev;
struct work_struct changed_work;
spinlock_t changed_lock;
bool changed;
+ atomic_t use_cnt;
#ifdef CONFIG_THERMAL
struct thermal_zone_device *tzd;
struct thermal_cooling_device *tcd;
extern int power_supply_reg_notifier(struct notifier_block *nb);
extern void power_supply_unreg_notifier(struct notifier_block *nb);
extern struct power_supply *power_supply_get_by_name(const char *name);
+extern void power_supply_put(struct power_supply *psy);
#ifdef CONFIG_OF
extern struct power_supply *power_supply_get_by_phandle(struct device_node *np,
const char *property);
static inline int power_supply_is_system_supplied(void) { return -ENOSYS; }
#endif
-extern int power_supply_register(struct device *parent,
- struct power_supply *psy);
-extern int power_supply_register_no_ws(struct device *parent,
- struct power_supply *psy);
+extern int power_supply_get_property(struct power_supply *psy,
+ enum power_supply_property psp,
+ union power_supply_propval *val);
+extern int power_supply_set_property(struct power_supply *psy,
+ enum power_supply_property psp,
+ const union power_supply_propval *val);
+extern int power_supply_property_is_writeable(struct power_supply *psy,
+ enum power_supply_property psp);
+extern void power_supply_external_power_changed(struct power_supply *psy);
+
+extern struct power_supply *__must_check
+power_supply_register(struct device *parent,
+ const struct power_supply_desc *desc,
+ const struct power_supply_config *cfg);
+extern struct power_supply *__must_check
+power_supply_register_no_ws(struct device *parent,
+ const struct power_supply_desc *desc,
+ const struct power_supply_config *cfg);
+extern struct power_supply *__must_check
+devm_power_supply_register(struct device *parent,
+ const struct power_supply_desc *desc,
+ const struct power_supply_config *cfg);
+extern struct power_supply *__must_check
+devm_power_supply_register_no_ws(struct device *parent,
+ const struct power_supply_desc *desc,
+ const struct power_supply_config *cfg);
extern void power_supply_unregister(struct power_supply *psy);
extern int power_supply_powers(struct power_supply *psy, struct device *dev);
+extern void *power_supply_get_drvdata(struct power_supply *psy);
/* For APM emulation, think legacy userspace. */
extern struct class *power_supply_class;
extern int rcu_expedited; /* for sysctl */
+#ifdef CONFIG_TINY_RCU
+/* Tiny RCU doesn't expedite, as its purpose in life is instead to be tiny. */
+static inline bool rcu_gp_is_expedited(void) /* Internal RCU use. */
+{
+ return false;
+}
+
+static inline void rcu_expedite_gp(void)
+{
+}
+
+static inline void rcu_unexpedite_gp(void)
+{
+}
+#else /* #ifdef CONFIG_TINY_RCU */
+bool rcu_gp_is_expedited(void); /* Internal RCU use. */
+void rcu_expedite_gp(void);
+void rcu_unexpedite_gp(void);
+#endif /* #else #ifdef CONFIG_TINY_RCU */
+
enum rcutorture_type {
RCU_FLAVOR,
RCU_BH_FLAVOR,
void synchronize_sched(void);
+/*
+ * Structure allowing asynchronous waiting on RCU.
+ */
+struct rcu_synchronize {
+ struct rcu_head head;
+ struct completion completion;
+};
+void wakeme_after_rcu(struct rcu_head *head);
+
/**
* call_rcu_tasks() - Queue an RCU for invocation task-based grace period
* @head: structure to be used for queueing the RCU updates.
/* Internal to kernel */
void rcu_init(void);
+void rcu_end_inkernel_boot(void);
void rcu_sched_qs(void);
void rcu_bh_qs(void);
void rcu_check_callbacks(int user);
void rcu_idle_exit(void);
void rcu_irq_enter(void);
void rcu_irq_exit(void);
+int rcu_cpu_notify(struct notifier_block *self,
+ unsigned long action, void *hcpu);
#ifdef CONFIG_RCU_STALL_COMMON
void rcu_sysrq_start(void);
* annotated as __rcu.
*/
#define rcu_dereference_check(p, c) \
- __rcu_dereference_check((p), rcu_read_lock_held() || (c), __rcu)
+ __rcu_dereference_check((p), (c) || rcu_read_lock_held(), __rcu)
/**
* rcu_dereference_bh_check() - rcu_dereference_bh with debug checking
* This is the RCU-bh counterpart to rcu_dereference_check().
*/
#define rcu_dereference_bh_check(p, c) \
- __rcu_dereference_check((p), rcu_read_lock_bh_held() || (c), __rcu)
+ __rcu_dereference_check((p), (c) || rcu_read_lock_bh_held(), __rcu)
/**
* rcu_dereference_sched_check() - rcu_dereference_sched with debug checking
* This is the RCU-sched counterpart to rcu_dereference_check().
*/
#define rcu_dereference_sched_check(p, c) \
- __rcu_dereference_check((p), rcu_read_lock_sched_held() || (c), \
+ __rcu_dereference_check((p), (c) || rcu_read_lock_sched_held(), \
__rcu)
#define rcu_dereference_raw(p) rcu_dereference_check(p, 1) /*@@@ needed? @@@*/
{
rcu_lockdep_assert(rcu_is_watching(),
"rcu_read_unlock() used illegally while idle");
- rcu_lock_release(&rcu_lock_map);
__release(RCU);
__rcu_read_unlock();
+ rcu_lock_release(&rcu_lock_map); /* Keep acq info for rls diags. */
}
/**
#include <linux/regulator/machine.h>
+enum {
+ ACT8600_ID_DCDC1,
+ ACT8600_ID_DCDC2,
+ ACT8600_ID_DCDC3,
+ ACT8600_ID_SUDCDC4,
+ ACT8600_ID_LDO5,
+ ACT8600_ID_LDO6,
+ ACT8600_ID_LDO7,
+ ACT8600_ID_LDO8,
+ ACT8600_ID_LDO9,
+ ACT8600_ID_LDO10,
+};
+
enum {
ACT8865_ID_DCDC1,
ACT8865_ID_DCDC2,
};
enum {
+ ACT8600,
ACT8865,
ACT8846,
};
#define REGULATOR_EVENT_OVER_TEMP 0x10
#define REGULATOR_EVENT_FORCE_DISABLE 0x20
#define REGULATOR_EVENT_VOLTAGE_CHANGE 0x40
-#define REGULATOR_EVENT_DISABLE 0x80
+#define REGULATOR_EVENT_DISABLE 0x80
#define REGULATOR_EVENT_PRE_VOLTAGE_CHANGE 0x100
#define REGULATOR_EVENT_ABORT_VOLTAGE_CHANGE 0x200
#define REGULATOR_EVENT_PRE_DISABLE 0x400
int regulator_set_mode(struct regulator *regulator, unsigned int mode);
unsigned int regulator_get_mode(struct regulator *regulator);
-int regulator_set_optimum_mode(struct regulator *regulator, int load_uA);
+int regulator_set_load(struct regulator *regulator, int load_uA);
int regulator_allow_bypass(struct regulator *regulator, bool allow);
/* regulator notifier block */
int regulator_register_notifier(struct regulator *regulator,
struct notifier_block *nb);
+int devm_regulator_register_notifier(struct regulator *regulator,
+ struct notifier_block *nb);
int regulator_unregister_notifier(struct regulator *regulator,
struct notifier_block *nb);
+void devm_regulator_unregister_notifier(struct regulator *regulator,
+ struct notifier_block *nb);
/* driver data - core doesn't touch */
void *regulator_get_drvdata(struct regulator *regulator);
return REGULATOR_MODE_NORMAL;
}
-static inline int regulator_set_optimum_mode(struct regulator *regulator,
- int load_uA)
+static inline int regulator_set_load(struct regulator *regulator, int load_uA)
{
return REGULATOR_MODE_NORMAL;
}
return 0;
}
+static inline int devm_regulator_register_notifier(struct regulator *regulator,
+ struct notifier_block *nb)
+{
+ return 0;
+}
+
static inline int regulator_unregister_notifier(struct regulator *regulator,
struct notifier_block *nb)
{
return 0;
}
+static inline int devm_regulator_unregister_notifier(struct regulator *regulator,
+ struct notifier_block *nb)
+{
+ return 0;
+}
+
static inline void *regulator_get_drvdata(struct regulator *regulator)
{
return NULL;
* REGULATOR_STATUS value (or negative errno)
* @get_optimum_mode: Get the most efficient operating mode for the regulator
* when running with the specified parameters.
+ * @set_load: Set the load for the regulator.
*
* @set_bypass: Set the regulator in bypass mode.
* @get_bypass: Get the regulator bypass mode state.
/* get most efficient regulator operating mode for load */
unsigned int (*get_optimum_mode) (struct regulator_dev *, int input_uV,
int output_uV, int load_uA);
+ /* set the load on the regulator */
+ int (*set_load)(struct regulator_dev *, int load_uA);
/* control and report on bypass mode */
int (*set_bypass)(struct regulator_dev *dev, bool enable);
struct device dev;
struct regulation_constraints *constraints;
struct regulator *supply; /* for tree */
+ const char *supply_name;
struct regmap *regmap;
struct delayed_work disable_work;
int (*read_alarm)(struct device *, struct rtc_wkalrm *);
int (*set_alarm)(struct device *, struct rtc_wkalrm *);
int (*proc)(struct device *, struct seq_file *);
+ int (*set_mmss64)(struct device *, time64_t secs);
int (*set_mmss)(struct device *, unsigned long secs);
int (*read_callback)(struct device *, int data);
int (*alarm_irq_enable)(struct device *, unsigned int enabled);
extern void calc_global_load(unsigned long ticks);
extern void update_cpu_load_nohz(void);
+/* Notifier for when a task gets migrated to a new CPU */
+struct task_migration_notifier {
+ struct task_struct *task;
+ int from_cpu;
+ int to_cpu;
+};
+extern void register_task_migration_notifier(struct notifier_block *n);
+
extern unsigned long get_parent_ip(unsigned long addr);
extern void dump_cpu_task(int cpu);
extern void init_idle(struct task_struct *idle, int cpu);
extern void init_idle_bootup_task(struct task_struct *idle);
+extern cpumask_var_t cpu_isolated_map;
+
extern int runqueue_is_locked(int cpu);
#if defined(CONFIG_SMP) && defined(CONFIG_NO_HZ_COMMON)
};
struct sched_avg {
+ u64 last_runnable_update;
+ s64 decay_count;
+ /*
+ * utilization_avg_contrib describes the amount of time that a
+ * sched_entity is running on a CPU. It is based on running_avg_sum
+ * and is scaled in the range [0..SCHED_LOAD_SCALE].
+ * load_avg_contrib described the amount of time that a sched_entity
+ * is runnable on a rq. It is based on both runnable_avg_sum and the
+ * weight of the task.
+ */
+ unsigned long load_avg_contrib, utilization_avg_contrib;
/*
* These sums represent an infinite geometric series and so are bound
* above by 1024/(1-y). Thus we only need a u32 to store them for all
* choices of y < 1-2^(-32)*1024.
+ * running_avg_sum reflects the time that the sched_entity is
+ * effectively running on the CPU.
+ * runnable_avg_sum represents the amount of time a sched_entity is on
+ * a runqueue which includes the running time that is monitored by
+ * running_avg_sum.
*/
- u32 runnable_avg_sum, runnable_avg_period;
- u64 last_runnable_update;
- s64 decay_count;
- unsigned long load_avg_contrib;
+ u32 runnable_avg_sum, avg_period, running_avg_sum;
};
#ifdef CONFIG_SCHEDSTATS
int (*inode_follow_link) (struct dentry *dentry, struct nameidata *nd);
int (*inode_permission) (struct inode *inode, int mask);
int (*inode_setattr) (struct dentry *dentry, struct iattr *attr);
- int (*inode_getattr) (struct vfsmount *mnt, struct dentry *dentry);
+ int (*inode_getattr) (const struct path *path);
int (*inode_setxattr) (struct dentry *dentry, const char *name,
const void *value, size_t size, int flags);
void (*inode_post_setxattr) (struct dentry *dentry, const char *name,
int security_inode_follow_link(struct dentry *dentry, struct nameidata *nd);
int security_inode_permission(struct inode *inode, int mask);
int security_inode_setattr(struct dentry *dentry, struct iattr *attr);
-int security_inode_getattr(struct vfsmount *mnt, struct dentry *dentry);
+int security_inode_getattr(const struct path *path);
int security_inode_setxattr(struct dentry *dentry, const char *name,
const void *value, size_t size, int flags);
void security_inode_post_setxattr(struct dentry *dentry, const char *name,
return 0;
}
-static inline int security_inode_getattr(struct vfsmount *mnt,
- struct dentry *dentry)
+static inline int security_inode_getattr(const struct path *path)
{
return 0;
}
unsigned ret;
repeat:
- ret = ACCESS_ONCE(s->sequence);
+ ret = READ_ONCE(s->sequence);
if (unlikely(ret & 1)) {
cpu_relax();
goto repeat;
*/
static inline unsigned raw_read_seqcount(const seqcount_t *s)
{
- unsigned ret = ACCESS_ONCE(s->sequence);
+ unsigned ret = READ_ONCE(s->sequence);
smp_rmb();
return ret;
}
*/
static inline unsigned raw_seqcount_begin(const seqcount_t *s)
{
- unsigned ret = ACCESS_ONCE(s->sequence);
+ unsigned ret = READ_ONCE(s->sequence);
smp_rmb();
return ret & ~1;
}
/*
* Flags to pass to kmem_cache_create().
- * The ones marked DEBUG are only valid if CONFIG_SLAB_DEBUG is set.
+ * The ones marked DEBUG are only valid if CONFIG_DEBUG_SLAB is set.
*/
#define SLAB_DEBUG_FREE 0x00000100UL /* DEBUG: Perform (expensive) checks on free */
#define SLAB_RED_ZONE 0x00000400UL /* DEBUG: Red zone objs in a cache */
int smpboot_register_percpu_thread(struct smp_hotplug_thread *plug_thread);
void smpboot_unregister_percpu_thread(struct smp_hotplug_thread *plug_thread);
-int smpboot_thread_schedule(void);
#endif
* @remove: Unbinds this driver from the spi device
* @shutdown: Standard shutdown callback used during system state
* transitions such as powerdown/halt and kexec
- * @suspend: Standard suspend callback used during system state transitions
- * @resume: Standard resume callback used during system state transitions
* @driver: SPI device drivers should initialize the name and owner
* field of this structure.
*
int (*probe)(struct spi_device *spi);
int (*remove)(struct spi_device *spi);
void (*shutdown)(struct spi_device *spi);
- int (*suspend)(struct spi_device *spi, pm_message_t mesg);
- int (*resume)(struct spi_device *spi);
struct device_driver driver;
};
* transfer_one_message are mutually exclusive; when both
* are set, the generic subsystem does not call your
* transfer_one callback.
+ * @handle_err: the subsystem calls the driver to handle an error that occurs
+ * in the generic implementation of transfer_one_message().
* @unprepare_message: undo any work done by prepare_message().
* @cs_gpios: Array of GPIOs to use as chip select lines; one per CS
* number. Any individual value may be -ENOENT for CS lines that
void (*set_cs)(struct spi_device *spi, bool enable);
int (*transfer_one)(struct spi_master *master, struct spi_device *spi,
struct spi_transfer *transfer);
+ void (*handle_err)(struct spi_master *master,
+ struct spi_message *message);
/* gpio chip select */
int *cs_gpios;
* lockdep_is_held() calls.
*/
#define srcu_dereference_check(p, sp, c) \
- __rcu_dereference_check((p), srcu_read_lock_held(sp) || (c), __rcu)
+ __rcu_dereference_check((p), (c) || srcu_read_lock_held(sp), __rcu)
/**
* srcu_dereference - fetch SRCU-protected pointer for later dereferencing
struct pt_regs;
#ifdef CONFIG_STACKTRACE
-struct task_struct;
-
struct stack_trace {
unsigned int nr_entries, max_entries;
unsigned long *entries;
#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
#endif
#endif
+
+/**
+ * offsetofend(TYPE, MEMBER)
+ *
+ * @TYPE: The type of the structure
+ * @MEMBER: The member within the structure to get the end offset of
+ */
+#define offsetofend(TYPE, MEMBER) \
+ (offsetof(TYPE, MEMBER) + sizeof(((TYPE *)0)->MEMBER))
#define sysfs_attr_init(attr) do {} while (0)
#endif
+/**
+ * struct attribute_group - data structure used to declare an attribute group.
+ * @name: Optional: Attribute group name
+ * If specified, the attribute group will be created in
+ * a new subdirectory with this name.
+ * @is_visible: Optional: Function to return permissions associated with an
+ * attribute of the group. Will be called repeatedly for each
+ * attribute in the group. Only read/write permissions as well as
+ * SYSFS_PREALLOC are accepted. Must return 0 if an attribute is
+ * not visible. The returned value will replace static permissions
+ * defined in struct attribute or struct bin_attribute.
+ * @attrs: Pointer to NULL terminated list of attributes.
+ * @bin_attrs: Pointer to NULL terminated list of binary attributes.
+ * Either attrs or bin_attrs or both must be provided.
+ */
struct attribute_group {
const char *name;
umode_t (*is_visible)(struct kobject *,
-/* linux/include/linux/tick.h
- *
- * This file contains the structure definitions for tick related functions
- *
+/*
+ * Tick related global functions
*/
#ifndef _LINUX_TICK_H
#define _LINUX_TICK_H
#include <linux/clockchips.h>
#include <linux/irqflags.h>
#include <linux/percpu.h>
-#include <linux/hrtimer.h>
#include <linux/context_tracking_state.h>
#include <linux/cpumask.h>
#include <linux/sched.h>
#ifdef CONFIG_GENERIC_CLOCKEVENTS
-
-enum tick_device_mode {
- TICKDEV_MODE_PERIODIC,
- TICKDEV_MODE_ONESHOT,
-};
-
-struct tick_device {
- struct clock_event_device *evtdev;
- enum tick_device_mode mode;
-};
-
-enum tick_nohz_mode {
- NOHZ_MODE_INACTIVE,
- NOHZ_MODE_LOWRES,
- NOHZ_MODE_HIGHRES,
-};
-
-/**
- * struct tick_sched - sched tick emulation and no idle tick control/stats
- * @sched_timer: hrtimer to schedule the periodic tick in high
- * resolution mode
- * @last_tick: Store the last tick expiry time when the tick
- * timer is modified for nohz sleeps. This is necessary
- * to resume the tick timer operation in the timeline
- * when the CPU returns from nohz sleep.
- * @tick_stopped: Indicator that the idle tick has been stopped
- * @idle_jiffies: jiffies at the entry to idle for idle time accounting
- * @idle_calls: Total number of idle calls
- * @idle_sleeps: Number of idle calls, where the sched tick was stopped
- * @idle_entrytime: Time when the idle call was entered
- * @idle_waketime: Time when the idle was interrupted
- * @idle_exittime: Time when the idle state was left
- * @idle_sleeptime: Sum of the time slept in idle with sched tick stopped
- * @iowait_sleeptime: Sum of the time slept in idle with sched tick stopped, with IO outstanding
- * @sleep_length: Duration of the current idle sleep
- * @do_timer_lst: CPU was the last one doing do_timer before going idle
- */
-struct tick_sched {
- struct hrtimer sched_timer;
- unsigned long check_clocks;
- enum tick_nohz_mode nohz_mode;
- ktime_t last_tick;
- int inidle;
- int tick_stopped;
- unsigned long idle_jiffies;
- unsigned long idle_calls;
- unsigned long idle_sleeps;
- int idle_active;
- ktime_t idle_entrytime;
- ktime_t idle_waketime;
- ktime_t idle_exittime;
- ktime_t idle_sleeptime;
- ktime_t iowait_sleeptime;
- ktime_t sleep_length;
- unsigned long last_jiffies;
- unsigned long next_jiffies;
- ktime_t idle_expires;
- int do_timer_last;
-};
-
extern void __init tick_init(void);
-extern int tick_is_oneshot_available(void);
-extern struct tick_device *tick_get_device(int cpu);
-
extern void tick_freeze(void);
extern void tick_unfreeze(void);
+/* Should be core only, but ARM BL switcher requires it */
+extern void tick_suspend_local(void);
+/* Should be core only, but XEN resume magic and ARM BL switcher require it */
+extern void tick_resume_local(void);
+extern void tick_handover_do_timer(void);
+extern void tick_cleanup_dead_cpu(int cpu);
+#else /* CONFIG_GENERIC_CLOCKEVENTS */
+static inline void tick_init(void) { }
+static inline void tick_freeze(void) { }
+static inline void tick_unfreeze(void) { }
+static inline void tick_suspend_local(void) { }
+static inline void tick_resume_local(void) { }
+static inline void tick_handover_do_timer(void) { }
+static inline void tick_cleanup_dead_cpu(int cpu) { }
+#endif /* !CONFIG_GENERIC_CLOCKEVENTS */
-# ifdef CONFIG_HIGH_RES_TIMERS
-extern int tick_init_highres(void);
-extern int tick_program_event(ktime_t expires, int force);
-extern void tick_setup_sched_timer(void);
-# endif
-
-# if defined CONFIG_NO_HZ_COMMON || defined CONFIG_HIGH_RES_TIMERS
-extern void tick_cancel_sched_timer(int cpu);
-# else
-static inline void tick_cancel_sched_timer(int cpu) { }
-# endif
-
-# ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
-extern struct tick_device *tick_get_broadcast_device(void);
-extern struct cpumask *tick_get_broadcast_mask(void);
-
-# ifdef CONFIG_TICK_ONESHOT
-extern struct cpumask *tick_get_broadcast_oneshot_mask(void);
-# endif
-
-# endif /* BROADCAST */
-
-# ifdef CONFIG_TICK_ONESHOT
-extern void tick_clock_notify(void);
-extern int tick_check_oneshot_change(int allow_nohz);
-extern struct tick_sched *tick_get_tick_sched(int cpu);
+#ifdef CONFIG_TICK_ONESHOT
extern void tick_irq_enter(void);
-extern int tick_oneshot_mode_active(void);
# ifndef arch_needs_cpu
# define arch_needs_cpu() (0)
# endif
# else
-static inline void tick_clock_notify(void) { }
-static inline int tick_check_oneshot_change(int allow_nohz) { return 0; }
static inline void tick_irq_enter(void) { }
-static inline int tick_oneshot_mode_active(void) { return 0; }
-# endif
+#endif
-#else /* CONFIG_GENERIC_CLOCKEVENTS */
-static inline void tick_init(void) { }
-static inline void tick_freeze(void) { }
-static inline void tick_unfreeze(void) { }
-static inline void tick_cancel_sched_timer(int cpu) { }
-static inline void tick_clock_notify(void) { }
-static inline int tick_check_oneshot_change(int allow_nohz) { return 0; }
-static inline void tick_irq_enter(void) { }
-static inline int tick_oneshot_mode_active(void) { return 0; }
-#endif /* !CONFIG_GENERIC_CLOCKEVENTS */
+#if defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) && defined(CONFIG_TICK_ONESHOT)
+extern void hotplug_cpu__broadcast_tick_pull(int dead_cpu);
+#else
+static inline void hotplug_cpu__broadcast_tick_pull(int dead_cpu) { }
+#endif
-# ifdef CONFIG_NO_HZ_COMMON
-DECLARE_PER_CPU(struct tick_sched, tick_cpu_sched);
+enum tick_broadcast_mode {
+ TICK_BROADCAST_OFF,
+ TICK_BROADCAST_ON,
+ TICK_BROADCAST_FORCE,
+};
+
+enum tick_broadcast_state {
+ TICK_BROADCAST_EXIT,
+ TICK_BROADCAST_ENTER,
+};
+
+#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
+extern void tick_broadcast_control(enum tick_broadcast_mode mode);
+#else
+static inline void tick_broadcast_control(enum tick_broadcast_mode mode) { }
+#endif /* BROADCAST */
+
+#if defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) && defined(CONFIG_TICK_ONESHOT)
+extern int tick_broadcast_oneshot_control(enum tick_broadcast_state state);
+#else
+static inline int tick_broadcast_oneshot_control(enum tick_broadcast_state state) { return 0; }
+#endif
-static inline int tick_nohz_tick_stopped(void)
+static inline void tick_broadcast_enable(void)
+{
+ tick_broadcast_control(TICK_BROADCAST_ON);
+}
+static inline void tick_broadcast_disable(void)
+{
+ tick_broadcast_control(TICK_BROADCAST_OFF);
+}
+static inline void tick_broadcast_force(void)
+{
+ tick_broadcast_control(TICK_BROADCAST_FORCE);
+}
+static inline int tick_broadcast_enter(void)
{
- return __this_cpu_read(tick_cpu_sched.tick_stopped);
+ return tick_broadcast_oneshot_control(TICK_BROADCAST_ENTER);
+}
+static inline void tick_broadcast_exit(void)
+{
+ tick_broadcast_oneshot_control(TICK_BROADCAST_EXIT);
}
+#ifdef CONFIG_NO_HZ_COMMON
+extern int tick_nohz_tick_stopped(void);
extern void tick_nohz_idle_enter(void);
extern void tick_nohz_idle_exit(void);
extern void tick_nohz_irq_exit(void);
extern ktime_t tick_nohz_get_sleep_length(void);
extern u64 get_cpu_idle_time_us(int cpu, u64 *last_update_time);
extern u64 get_cpu_iowait_time_us(int cpu, u64 *last_update_time);
-
-# else /* !CONFIG_NO_HZ_COMMON */
-static inline int tick_nohz_tick_stopped(void)
-{
- return 0;
-}
-
+#else /* !CONFIG_NO_HZ_COMMON */
+static inline int tick_nohz_tick_stopped(void) { return 0; }
static inline void tick_nohz_idle_enter(void) { }
static inline void tick_nohz_idle_exit(void) { }
}
static inline u64 get_cpu_idle_time_us(int cpu, u64 *unused) { return -1; }
static inline u64 get_cpu_iowait_time_us(int cpu, u64 *unused) { return -1; }
-# endif /* !CONFIG_NO_HZ_COMMON */
+#endif /* !CONFIG_NO_HZ_COMMON */
#ifdef CONFIG_NO_HZ_FULL
extern bool tick_nohz_full_running;
* @read: Read function of @clock
* @mask: Bitmask for two's complement subtraction of non 64bit clocks
* @cycle_last: @clock cycle value at last update
- * @mult: NTP adjusted multiplier for scaled math conversion
+ * @mult: (NTP adjusted) multiplier for scaled math conversion
* @shift: Shift value for scaled math conversion
* @xtime_nsec: Shifted (fractional) nano seconds offset for readout
- * @base_mono: ktime_t (nanoseconds) base time for readout
+ * @base: ktime_t (nanoseconds) base time for readout
*
* This struct has size 56 byte on 64 bit. Together with a seqcount it
* occupies a single 64byte cache line.
*
* The struct is separate from struct timekeeper as it is also used
- * for a fast NMI safe accessor to clock monotonic.
+ * for a fast NMI safe accessors.
*/
struct tk_read_base {
struct clocksource *clock;
u32 mult;
u32 shift;
u64 xtime_nsec;
- ktime_t base_mono;
+ ktime_t base;
};
/**
* struct timekeeper - Structure holding internal timekeeping values.
- * @tkr: The readout base structure
+ * @tkr_mono: The readout base structure for CLOCK_MONOTONIC
+ * @tkr_raw: The readout base structure for CLOCK_MONOTONIC_RAW
* @xtime_sec: Current CLOCK_REALTIME time in seconds
* @ktime_sec: Current CLOCK_MONOTONIC time in seconds
* @wall_to_monotonic: CLOCK_REALTIME to CLOCK_MONOTONIC offset
* @offs_boot: Offset clock monotonic -> clock boottime
* @offs_tai: Offset clock monotonic -> clock tai
* @tai_offset: The current UTC to TAI offset in seconds
- * @base_raw: Monotonic raw base time in ktime_t format
* @raw_time: Monotonic raw base time in timespec64 format
* @cycle_interval: Number of clock cycles in one NTP interval
* @xtime_interval: Number of clock shifted nano seconds in one NTP
* used instead.
*/
struct timekeeper {
- struct tk_read_base tkr;
+ struct tk_read_base tkr_mono;
+ struct tk_read_base tkr_raw;
u64 xtime_sec;
unsigned long ktime_sec;
struct timespec64 wall_to_monotonic;
ktime_t offs_boot;
ktime_t offs_tai;
s32 tai_offset;
- ktime_t base_raw;
struct timespec64 raw_time;
/* The following members are for timekeeping internal use */
return ktime_to_ns(ktime_get_boottime());
}
+static inline u64 ktime_get_tai_ns(void)
+{
+ return ktime_to_ns(ktime_get_clocktai());
+}
+
static inline u64 ktime_get_raw_ns(void)
{
return ktime_to_ns(ktime_get_raw());
}
extern u64 ktime_get_mono_fast_ns(void);
+extern u64 ktime_get_raw_fast_ns(void);
/*
* Timespec interfaces utilizing the ktime based ones
/*
* RTC specific
*/
+extern bool timekeeping_rtc_skipsuspend(void);
+extern bool timekeeping_rtc_skipresume(void);
+
extern void timekeeping_inject_sleeptime64(struct timespec64 *delta);
/*
/*
* Persistent clock related interfaces
*/
-extern bool persistent_clock_exist;
extern int persistent_clock_is_local;
-static inline bool has_persistent_clock(void)
-{
- return persistent_clock_exist;
-}
-
extern void read_persistent_clock(struct timespec *ts);
+extern void read_persistent_clock64(struct timespec64 *ts);
extern void read_boot_clock(struct timespec *ts);
+extern void read_boot_clock64(struct timespec64 *ts);
extern int update_persistent_clock(struct timespec now);
+extern int update_persistent_clock64(struct timespec64 now);
#endif
--- /dev/null
+/*
+ * tracefs.h - a pseudo file system for activating tracing
+ *
+ * Based on debugfs by: 2004 Greg Kroah-Hartman <greg@kroah.com>
+ *
+ * Copyright (C) 2014 Red Hat Inc, author: Steven Rostedt <srostedt@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version
+ * 2 as published by the Free Software Foundation.
+ *
+ * tracefs is the file system that is used by the tracing infrastructure.
+ *
+ */
+
+#ifndef _TRACEFS_H_
+#define _TRACEFS_H_
+
+#include <linux/fs.h>
+#include <linux/seq_file.h>
+
+#include <linux/types.h>
+
+struct file_operations;
+
+#ifdef CONFIG_TRACING
+
+struct dentry *tracefs_create_file(const char *name, umode_t mode,
+ struct dentry *parent, void *data,
+ const struct file_operations *fops);
+
+struct dentry *tracefs_create_dir(const char *name, struct dentry *parent);
+
+void tracefs_remove(struct dentry *dentry);
+void tracefs_remove_recursive(struct dentry *dentry);
+
+struct dentry *tracefs_create_instance_dir(const char *name, struct dentry *parent,
+ int (*mkdir)(const char *name),
+ int (*rmdir)(const char *name));
+
+bool tracefs_initialized(void);
+
+#endif /* CONFIG_TRACING */
+
+#endif
struct tracepoint_func __rcu *funcs;
};
+struct trace_enum_map {
+ const char *system;
+ const char *enum_string;
+ unsigned long enum_value;
+};
+
extern int
tracepoint_probe_register(struct tracepoint *tp, void *probe, void *data);
extern int
#define PARAMS(args...) args
+#define TRACE_DEFINE_ENUM(x)
+
#endif /* _LINUX_TRACEPOINT_H */
/*
struct iov_iter *i, unsigned long offset, size_t bytes);
void iov_iter_advance(struct iov_iter *i, size_t bytes);
int iov_iter_fault_in_readable(struct iov_iter *i, size_t bytes);
+int iov_iter_fault_in_multipages_readable(struct iov_iter *i, size_t bytes);
size_t iov_iter_single_seg_count(const struct iov_iter *i);
size_t copy_page_to_iter(struct page *page, size_t offset, size_t bytes,
struct iov_iter *i);
size_t csum_and_copy_to_iter(void *addr, size_t bytes, __wsum *csum, struct iov_iter *i);
size_t csum_and_copy_from_iter(void *addr, size_t bytes, __wsum *csum, struct iov_iter *i);
+int import_iovec(int type, const struct iovec __user * uvector,
+ unsigned nr_segs, unsigned fast_segs,
+ struct iovec **iov, struct iov_iter *i);
+
+#ifdef CONFIG_COMPAT
+struct compat_iovec;
+int compat_import_iovec(int type, const struct compat_iovec __user * uvector,
+ unsigned nr_segs, unsigned fast_segs,
+ struct iovec **iov, struct iov_iter *i);
+#endif
+
+int import_single_range(int type, void __user *buf, size_t len,
+ struct iovec *iov, struct iov_iter *i);
+
#endif
#define USB_MAXINTERFACES 32
#define USB_MAXIADS (USB_MAXINTERFACES/2)
+/*
+ * USB Resume Timer: Every Host controller driver should drive the resume
+ * signalling on the bus for the amount of time defined by this macro.
+ *
+ * That way we will have a 'stable' behavior among all HCDs supported by Linux.
+ *
+ * Note that the USB Specification states we should drive resume for *at least*
+ * 20 ms, but it doesn't give an upper bound. This creates two possible
+ * situations which we want to avoid:
+ *
+ * (a) sometimes an msleep(20) might expire slightly before 20 ms, which causes
+ * us to fail USB Electrical Tests, thus failing Certification
+ *
+ * (b) Some (many) devices actually need more than 20 ms of resume signalling,
+ * and while we can argue that's against the USB Specification, we don't have
+ * control over which devices a certification laboratory will be using for
+ * certification. If CertLab uses a device which was tested against Windows and
+ * that happens to have relaxed resume signalling rules, we might fall into
+ * situations where we fail interoperability and electrical tests.
+ *
+ * In order to avoid both conditions, we're using a 40 ms resume timeout, which
+ * should cope with both LPJ calibration errors and devices not following every
+ * detail of the USB Specification.
+ */
+#define USB_RESUME_TIMEOUT 40 /* ms */
+
/**
* struct usb_interface_cache - long-term representation of a device interface
* @num_altsetting: number of altsettings defined.
enum usb_phy_interface phy_mode;
unsigned long flags;
#define CI_HDRC_REGS_SHARED BIT(0)
+#define CI_HDRC_SUPPORTS_RUNTIME_PM BIT(2)
#define CI_HDRC_DISABLE_STREAMING BIT(3)
/*
* Only set it when DCCPARAMS.DC==1 and DCCPARAMS.HC==1,
#define CI_HDRC_DUAL_ROLE_NOT_OTG BIT(4)
#define CI_HDRC_IMX28_WRITE_FIX BIT(5)
#define CI_HDRC_FORCE_FULLSPEED BIT(6)
+#define CI_HDRC_TURN_VBUS_EARLY_ON BIT(7)
enum usb_dr_mode dr_mode;
#define CI_HDRC_CONTROLLER_RESET_EVENT 0
#define CI_HDRC_CONTROLLER_STOPPED_EVENT 1
* @disable: (REQUIRED) Indicates the function should be disabled. Reasons
* include host resetting or reconfiguring the gadget, and disconnection.
* @setup: Used for interface-specific control requests.
+ * @req_match: Tests if a given class request can be handled by this function.
* @suspend: Notifies functions when the host stops sending USB traffic.
* @resume: Notifies functions when the host restarts USB traffic.
* @get_status: Returns function status as a reply to
void (*disable)(struct usb_function *);
int (*setup)(struct usb_function *,
const struct usb_ctrlrequest *);
+ bool (*req_match)(struct usb_function *,
+ const struct usb_ctrlrequest *);
void (*suspend)(struct usb_function *);
void (*resume)(struct usb_function *);
* @ep:the endpoint being configured
* @maxpacket_limit:value of maximum packet size limit
*
- * This function shoud be used only in UDC drivers to initialize endpoint
+ * This function should be used only in UDC drivers to initialize endpoint
* (usually in probe function).
*/
static inline void usb_ep_set_maxpacket_limit(struct usb_ep *ep,
struct usb_gadget;
struct usb_gadget_driver;
+struct usb_udc;
/* the rest of the api to the controller hardware: device operations,
* which don't involve endpoints (or i/o).
/**
* struct usb_gadget - represents a usb slave device
* @work: (internal use) Workqueue to be used for sysfs_notify()
+ * @udc: struct usb_udc pointer for this gadget
* @ops: Function pointers used to access hardware-specific operations.
* @ep0: Endpoint zero, used when reading or writing responses to
* driver setup() requests
*/
struct usb_gadget {
struct work_struct work;
+ struct usb_udc *udc;
/* readonly to gadget driver */
const struct usb_gadget_ops *ops;
struct usb_ep *ep0;
extern void usb_gadget_giveback_request(struct usb_ep *ep,
struct usb_request *req);
+/*-------------------------------------------------------------------------*/
+
+/* utility to update vbus status for udc core, it may be scheduled */
+extern void usb_udc_vbus_handler(struct usb_gadget *gadget, bool status);
/*-------------------------------------------------------------------------*/
enum otg_control_type otg_control;
enum msm_usb_phy_type phy_type;
void (*setup_gpio)(enum usb_otg_state state);
- int (*link_clk_reset)(struct clk *link_clk, bool assert);
- int (*phy_clk_reset)(struct clk *phy_clk);
};
/**
* @irq: IRQ number assigned for HSUSB controller.
* @clk: clock struct of usb_hs_clk.
* @pclk: clock struct of usb_hs_pclk.
- * @phy_reset_clk: clock struct of usb_phy_clk.
* @core_clk: clock struct of usb_hs_core_clk.
* @regs: ioremapped register base address.
* @inputs: OTG state machine inputs(Id, SessValid etc).
int irq;
struct clk *clk;
struct clk *pclk;
- struct clk *phy_reset_clk;
struct clk *core_clk;
void __iomem *regs;
#define ID 0
B_SE0_SRP,
B_SRP_FAIL,
A_WAIT_ENUM,
+ B_DATA_PLS,
+ B_SSEND_SRP,
NUM_OTG_FSM_TIMERS,
};
*/
u32 has_otg:1; /* for controlling PWEN/EXTLP */
u32 has_sudmac:1; /* for SUDMAC */
+ u32 has_usb_dmac:1; /* for USB-DMAC */
+#define USBHS_USB_DMAC_XFER_SIZE 32 /* hardcode the xfer size */
};
#define USBHS_TYPE_R8A7790 1
int (*probe)(struct umc_dev *);
void (*remove)(struct umc_dev *);
- int (*suspend)(struct umc_dev *, pm_message_t state);
- int (*resume)(struct umc_dev *);
int (*pre_reset)(struct umc_dev *);
int (*post_reset)(struct umc_dev *);
#include <linux/iommu.h>
#include <linux/mm.h>
+#include <linux/workqueue.h>
+#include <linux/poll.h>
#include <uapi/linux/vfio.h>
/**
extern void vfio_unregister_iommu_driver(
const struct vfio_iommu_driver_ops *ops);
-/**
- * offsetofend(TYPE, MEMBER)
- *
- * @TYPE: The type of the structure
- * @MEMBER: The member within the structure to get the end offset of
- *
- * Simple helper macro for dealing with variable sized structures passed
- * from user space. This allows us to easily determine if the provided
- * structure is sized to include various fields.
- */
-#define offsetofend(TYPE, MEMBER) \
- (offsetof(TYPE, MEMBER) + sizeof(((TYPE *)0)->MEMBER))
-
/*
* External user API
*/
return -ENOTTY;
}
#endif /* CONFIG_EEH */
+
+/*
+ * IRQfd - generic
+ */
+struct virqfd {
+ void *opaque;
+ struct eventfd_ctx *eventfd;
+ int (*handler)(void *, void *);
+ void (*thread)(void *, void *);
+ void *data;
+ struct work_struct inject;
+ wait_queue_t wait;
+ poll_table pt;
+ struct work_struct shutdown;
+ struct virqfd **pvirqfd;
+};
+
+extern int vfio_virqfd_enable(void *opaque,
+ int (*handler)(void *, void *),
+ void (*thread)(void *, void *),
+ void *data, struct virqfd **pvirqfd, int fd);
+extern void vfio_virqfd_disable(struct virqfd **pvirqfd);
+
#endif /* VFIO_H */
* out of the arbitration process (and can be safe to take
* interrupts at any time.
*/
+#if defined(CONFIG_VGA_ARB)
extern void vga_set_legacy_decoding(struct pci_dev *pdev,
unsigned int decodes);
+#else
+static inline void vga_set_legacy_decoding(struct pci_dev *pdev,
+ unsigned int decodes) { };
+#endif
/**
* vga_get - acquire & locks VGA resources
ssize_t vme_master_write(struct vme_resource *, void *, size_t, loff_t);
unsigned int vme_master_rmw(struct vme_resource *, unsigned int, unsigned int,
unsigned int, loff_t);
+int vme_master_mmap(struct vme_resource *resource, struct vm_area_struct *vma);
void vme_master_free(struct vme_resource *);
struct vme_resource *vme_dma_request(struct vme_dev *, u32);
extern int watchdog_register_device(struct watchdog_device *);
extern void watchdog_unregister_device(struct watchdog_device *);
+#ifdef CONFIG_HARDLOCKUP_DETECTOR
+void watchdog_nmi_disable_all(void);
+void watchdog_nmi_enable_all(void);
+#else
+static inline void watchdog_nmi_disable_all(void) {}
+static inline void watchdog_nmi_enable_all(void) {}
+#endif
+
#endif /* ifndef _LINUX_WATCHDOG_H */
extern unsigned int work_busy(struct work_struct *work);
extern __printf(1, 2) void set_worker_desc(const char *fmt, ...);
extern void print_worker_info(const char *log_lvl, struct task_struct *task);
+extern void show_workqueue_state(void);
/**
* queue_work - queue work on a workqueue
#define ISI_CFG1_FRATE_DIV_MASK (7 << 8)
#define ISI_CFG1_DISCR (1 << 11)
#define ISI_CFG1_FULL_MODE (1 << 12)
+/* Definition for THMASK(ISI_V2) */
+#define ISI_CFG1_THMASK_BEATS_4 (0 << 13)
+#define ISI_CFG1_THMASK_BEATS_8 (1 << 13)
+#define ISI_CFG1_THMASK_BEATS_16 (2 << 13)
/* Bitfields in CFG2 */
#define ISI_CFG2_GRAYSCALE (1 << 13)
#include <linux/page_counter.h>
#include <linux/memcontrol.h>
#include <linux/static_key.h>
-#include <linux/aio.h>
#include <linux/sched.h>
#include <linux/filter.h>
u64 * info_out);
extern void scsi_build_sense_buffer(int desc, u8 *buf, u8 key, u8 asc, u8 ascq);
+extern void scsi_set_sense_information(u8 *buf, u64 info);
extern int scsi_ioctl_reset(struct scsi_device *, int __user *);
#include <linux/tracepoint.h>
+#define P9_MSG_T \
+ EM( P9_TLERROR, "P9_TLERROR" ) \
+ EM( P9_RLERROR, "P9_RLERROR" ) \
+ EM( P9_TSTATFS, "P9_TSTATFS" ) \
+ EM( P9_RSTATFS, "P9_RSTATFS" ) \
+ EM( P9_TLOPEN, "P9_TLOPEN" ) \
+ EM( P9_RLOPEN, "P9_RLOPEN" ) \
+ EM( P9_TLCREATE, "P9_TLCREATE" ) \
+ EM( P9_RLCREATE, "P9_RLCREATE" ) \
+ EM( P9_TSYMLINK, "P9_TSYMLINK" ) \
+ EM( P9_RSYMLINK, "P9_RSYMLINK" ) \
+ EM( P9_TMKNOD, "P9_TMKNOD" ) \
+ EM( P9_RMKNOD, "P9_RMKNOD" ) \
+ EM( P9_TRENAME, "P9_TRENAME" ) \
+ EM( P9_RRENAME, "P9_RRENAME" ) \
+ EM( P9_TREADLINK, "P9_TREADLINK" ) \
+ EM( P9_RREADLINK, "P9_RREADLINK" ) \
+ EM( P9_TGETATTR, "P9_TGETATTR" ) \
+ EM( P9_RGETATTR, "P9_RGETATTR" ) \
+ EM( P9_TSETATTR, "P9_TSETATTR" ) \
+ EM( P9_RSETATTR, "P9_RSETATTR" ) \
+ EM( P9_TXATTRWALK, "P9_TXATTRWALK" ) \
+ EM( P9_RXATTRWALK, "P9_RXATTRWALK" ) \
+ EM( P9_TXATTRCREATE, "P9_TXATTRCREATE" ) \
+ EM( P9_RXATTRCREATE, "P9_RXATTRCREATE" ) \
+ EM( P9_TREADDIR, "P9_TREADDIR" ) \
+ EM( P9_RREADDIR, "P9_RREADDIR" ) \
+ EM( P9_TFSYNC, "P9_TFSYNC" ) \
+ EM( P9_RFSYNC, "P9_RFSYNC" ) \
+ EM( P9_TLOCK, "P9_TLOCK" ) \
+ EM( P9_RLOCK, "P9_RLOCK" ) \
+ EM( P9_TGETLOCK, "P9_TGETLOCK" ) \
+ EM( P9_RGETLOCK, "P9_RGETLOCK" ) \
+ EM( P9_TLINK, "P9_TLINK" ) \
+ EM( P9_RLINK, "P9_RLINK" ) \
+ EM( P9_TMKDIR, "P9_TMKDIR" ) \
+ EM( P9_RMKDIR, "P9_RMKDIR" ) \
+ EM( P9_TRENAMEAT, "P9_TRENAMEAT" ) \
+ EM( P9_RRENAMEAT, "P9_RRENAMEAT" ) \
+ EM( P9_TUNLINKAT, "P9_TUNLINKAT" ) \
+ EM( P9_RUNLINKAT, "P9_RUNLINKAT" ) \
+ EM( P9_TVERSION, "P9_TVERSION" ) \
+ EM( P9_RVERSION, "P9_RVERSION" ) \
+ EM( P9_TAUTH, "P9_TAUTH" ) \
+ EM( P9_RAUTH, "P9_RAUTH" ) \
+ EM( P9_TATTACH, "P9_TATTACH" ) \
+ EM( P9_RATTACH, "P9_RATTACH" ) \
+ EM( P9_TERROR, "P9_TERROR" ) \
+ EM( P9_RERROR, "P9_RERROR" ) \
+ EM( P9_TFLUSH, "P9_TFLUSH" ) \
+ EM( P9_RFLUSH, "P9_RFLUSH" ) \
+ EM( P9_TWALK, "P9_TWALK" ) \
+ EM( P9_RWALK, "P9_RWALK" ) \
+ EM( P9_TOPEN, "P9_TOPEN" ) \
+ EM( P9_ROPEN, "P9_ROPEN" ) \
+ EM( P9_TCREATE, "P9_TCREATE" ) \
+ EM( P9_RCREATE, "P9_RCREATE" ) \
+ EM( P9_TREAD, "P9_TREAD" ) \
+ EM( P9_RREAD, "P9_RREAD" ) \
+ EM( P9_TWRITE, "P9_TWRITE" ) \
+ EM( P9_RWRITE, "P9_RWRITE" ) \
+ EM( P9_TCLUNK, "P9_TCLUNK" ) \
+ EM( P9_RCLUNK, "P9_RCLUNK" ) \
+ EM( P9_TREMOVE, "P9_TREMOVE" ) \
+ EM( P9_RREMOVE, "P9_RREMOVE" ) \
+ EM( P9_TSTAT, "P9_TSTAT" ) \
+ EM( P9_RSTAT, "P9_RSTAT" ) \
+ EM( P9_TWSTAT, "P9_TWSTAT" ) \
+ EMe(P9_RWSTAT, "P9_RWSTAT" )
+
+/* Define EM() to export the enums to userspace via TRACE_DEFINE_ENUM() */
+#undef EM
+#undef EMe
+#define EM(a, b) TRACE_DEFINE_ENUM(a);
+#define EMe(a, b) TRACE_DEFINE_ENUM(a);
+
+P9_MSG_T
+
+/*
+ * Now redefine the EM() and EMe() macros to map the enums to the strings
+ * that will be printed in the output.
+ */
+#undef EM
+#undef EMe
+#define EM(a, b) { a, b },
+#define EMe(a, b) { a, b }
+
#define show_9p_op(type) \
- __print_symbolic(type, \
- { P9_TLERROR, "P9_TLERROR" }, \
- { P9_RLERROR, "P9_RLERROR" }, \
- { P9_TSTATFS, "P9_TSTATFS" }, \
- { P9_RSTATFS, "P9_RSTATFS" }, \
- { P9_TLOPEN, "P9_TLOPEN" }, \
- { P9_RLOPEN, "P9_RLOPEN" }, \
- { P9_TLCREATE, "P9_TLCREATE" }, \
- { P9_RLCREATE, "P9_RLCREATE" }, \
- { P9_TSYMLINK, "P9_TSYMLINK" }, \
- { P9_RSYMLINK, "P9_RSYMLINK" }, \
- { P9_TMKNOD, "P9_TMKNOD" }, \
- { P9_RMKNOD, "P9_RMKNOD" }, \
- { P9_TRENAME, "P9_TRENAME" }, \
- { P9_RRENAME, "P9_RRENAME" }, \
- { P9_TREADLINK, "P9_TREADLINK" }, \
- { P9_RREADLINK, "P9_RREADLINK" }, \
- { P9_TGETATTR, "P9_TGETATTR" }, \
- { P9_RGETATTR, "P9_RGETATTR" }, \
- { P9_TSETATTR, "P9_TSETATTR" }, \
- { P9_RSETATTR, "P9_RSETATTR" }, \
- { P9_TXATTRWALK, "P9_TXATTRWALK" }, \
- { P9_RXATTRWALK, "P9_RXATTRWALK" }, \
- { P9_TXATTRCREATE, "P9_TXATTRCREATE" }, \
- { P9_RXATTRCREATE, "P9_RXATTRCREATE" }, \
- { P9_TREADDIR, "P9_TREADDIR" }, \
- { P9_RREADDIR, "P9_RREADDIR" }, \
- { P9_TFSYNC, "P9_TFSYNC" }, \
- { P9_RFSYNC, "P9_RFSYNC" }, \
- { P9_TLOCK, "P9_TLOCK" }, \
- { P9_RLOCK, "P9_RLOCK" }, \
- { P9_TGETLOCK, "P9_TGETLOCK" }, \
- { P9_RGETLOCK, "P9_RGETLOCK" }, \
- { P9_TLINK, "P9_TLINK" }, \
- { P9_RLINK, "P9_RLINK" }, \
- { P9_TMKDIR, "P9_TMKDIR" }, \
- { P9_RMKDIR, "P9_RMKDIR" }, \
- { P9_TRENAMEAT, "P9_TRENAMEAT" }, \
- { P9_RRENAMEAT, "P9_RRENAMEAT" }, \
- { P9_TUNLINKAT, "P9_TUNLINKAT" }, \
- { P9_RUNLINKAT, "P9_RUNLINKAT" }, \
- { P9_TVERSION, "P9_TVERSION" }, \
- { P9_RVERSION, "P9_RVERSION" }, \
- { P9_TAUTH, "P9_TAUTH" }, \
- { P9_RAUTH, "P9_RAUTH" }, \
- { P9_TATTACH, "P9_TATTACH" }, \
- { P9_RATTACH, "P9_RATTACH" }, \
- { P9_TERROR, "P9_TERROR" }, \
- { P9_RERROR, "P9_RERROR" }, \
- { P9_TFLUSH, "P9_TFLUSH" }, \
- { P9_RFLUSH, "P9_RFLUSH" }, \
- { P9_TWALK, "P9_TWALK" }, \
- { P9_RWALK, "P9_RWALK" }, \
- { P9_TOPEN, "P9_TOPEN" }, \
- { P9_ROPEN, "P9_ROPEN" }, \
- { P9_TCREATE, "P9_TCREATE" }, \
- { P9_RCREATE, "P9_RCREATE" }, \
- { P9_TREAD, "P9_TREAD" }, \
- { P9_RREAD, "P9_RREAD" }, \
- { P9_TWRITE, "P9_TWRITE" }, \
- { P9_RWRITE, "P9_RWRITE" }, \
- { P9_TCLUNK, "P9_TCLUNK" }, \
- { P9_RCLUNK, "P9_RCLUNK" }, \
- { P9_TREMOVE, "P9_TREMOVE" }, \
- { P9_RREMOVE, "P9_RREMOVE" }, \
- { P9_TSTAT, "P9_TSTAT" }, \
- { P9_RSTAT, "P9_RSTAT" }, \
- { P9_TWSTAT, "P9_TWSTAT" }, \
- { P9_RWSTAT, "P9_RWSTAT" })
+ __print_symbolic(type, P9_MSG_T)
TRACE_EVENT(9p_client_req,
TP_PROTO(struct p9_client *clnt, int8_t type, int tag),
__entry->ip = IP
),
- TP_printk("state=%p; mask = %s; caller = %pF", __entry->state,
+ TP_printk("state=%p; mask = %s; caller = %pS", __entry->state,
show_gfp_flags(__entry->mask), (void *)__entry->ip)
);
__entry->ip = IP
),
- TP_printk(" state=%p; caller = %pF", __entry->state,
+ TP_printk(" state=%p; caller = %pS", __entry->state,
(void *)__entry->ip)
);
__entry->ip = IP;
),
- TP_printk("dev %d,%d ino %lu caller %pF",
+ TP_printk("dev %d,%d ino %lu caller %pS",
MAJOR(__entry->dev), MINOR(__entry->dev),
(unsigned long) __entry->ino, (void *)__entry->ip)
);
__entry->ip = IP;
),
- TP_printk("dev %d,%d ino %lu caller %pF",
+ TP_printk("dev %d,%d ino %lu caller %pS",
MAJOR(__entry->dev), MINOR(__entry->dev),
(unsigned long) __entry->ino, (void *)__entry->ip)
);
__entry->rsv_blocks = rsv_blocks;
),
- TP_printk("dev %d,%d blocks, %d rsv_blocks, %d caller %pF",
+ TP_printk("dev %d,%d blocks, %d rsv_blocks, %d caller %pS",
MAJOR(__entry->dev), MINOR(__entry->dev),
__entry->blocks, __entry->rsv_blocks, (void *)__entry->ip)
);
__entry->blocks = blocks;
),
- TP_printk("dev %d,%d blocks, %d caller %pF",
+ TP_printk("dev %d,%d blocks, %d caller %pS",
MAJOR(__entry->dev), MINOR(__entry->dev),
__entry->blocks, (void *)__entry->ip)
);
#define show_dev(entry) MAJOR(entry->dev), MINOR(entry->dev)
#define show_dev_ino(entry) show_dev(entry), (unsigned long)entry->ino
+TRACE_DEFINE_ENUM(NODE);
+TRACE_DEFINE_ENUM(DATA);
+TRACE_DEFINE_ENUM(META);
+TRACE_DEFINE_ENUM(META_FLUSH);
+TRACE_DEFINE_ENUM(CURSEG_HOT_DATA);
+TRACE_DEFINE_ENUM(CURSEG_WARM_DATA);
+TRACE_DEFINE_ENUM(CURSEG_COLD_DATA);
+TRACE_DEFINE_ENUM(CURSEG_HOT_NODE);
+TRACE_DEFINE_ENUM(CURSEG_WARM_NODE);
+TRACE_DEFINE_ENUM(CURSEG_COLD_NODE);
+TRACE_DEFINE_ENUM(NO_CHECK_TYPE);
+TRACE_DEFINE_ENUM(GC_GREEDY);
+TRACE_DEFINE_ENUM(GC_CB);
+TRACE_DEFINE_ENUM(FG_GC);
+TRACE_DEFINE_ENUM(BG_GC);
+TRACE_DEFINE_ENUM(LFS);
+TRACE_DEFINE_ENUM(SSR);
+TRACE_DEFINE_ENUM(__REQ_RAHEAD);
+TRACE_DEFINE_ENUM(__REQ_WRITE);
+TRACE_DEFINE_ENUM(__REQ_SYNC);
+TRACE_DEFINE_ENUM(__REQ_NOIDLE);
+TRACE_DEFINE_ENUM(__REQ_FLUSH);
+TRACE_DEFINE_ENUM(__REQ_FUA);
+TRACE_DEFINE_ENUM(__REQ_PRIO);
+TRACE_DEFINE_ENUM(__REQ_META);
+TRACE_DEFINE_ENUM(CP_UMOUNT);
+TRACE_DEFINE_ENUM(CP_FASTBOOT);
+TRACE_DEFINE_ENUM(CP_SYNC);
+TRACE_DEFINE_ENUM(CP_DISCARD);
+
#define show_block_type(type) \
__print_symbolic(type, \
{ NODE, "NODE" }, \
#undef TRACE_SYSTEM
#define TRACE_SYSTEM intel-sst
+/*
+ * The TRACE_SYSTEM_VAR defaults to TRACE_SYSTEM, but must be a
+ * legitimate C variable. It is not exported to user space.
+ */
+#undef TRACE_SYSTEM_VAR
+#define TRACE_SYSTEM_VAR intel_sst
+
#if !defined(_TRACE_INTEL_SST_H) || defined(TRACE_HEADER_MULTI_READ)
#define _TRACE_INTEL_SST_H
struct irqaction;
struct softirq_action;
-#define softirq_name(sirq) { sirq##_SOFTIRQ, #sirq }
+#define SOFTIRQ_NAME_LIST \
+ softirq_name(HI) \
+ softirq_name(TIMER) \
+ softirq_name(NET_TX) \
+ softirq_name(NET_RX) \
+ softirq_name(BLOCK) \
+ softirq_name(BLOCK_IOPOLL) \
+ softirq_name(TASKLET) \
+ softirq_name(SCHED) \
+ softirq_name(HRTIMER) \
+ softirq_name_end(RCU)
+
+#undef softirq_name
+#undef softirq_name_end
+
+#define softirq_name(sirq) TRACE_DEFINE_ENUM(sirq##_SOFTIRQ);
+#define softirq_name_end(sirq) TRACE_DEFINE_ENUM(sirq##_SOFTIRQ);
+
+SOFTIRQ_NAME_LIST
+
+#undef softirq_name
+#undef softirq_name_end
+
+#define softirq_name(sirq) { sirq##_SOFTIRQ, #sirq },
+#define softirq_name_end(sirq) { sirq##_SOFTIRQ, #sirq }
+
#define show_softirq_name(val) \
- __print_symbolic(val, \
- softirq_name(HI), \
- softirq_name(TIMER), \
- softirq_name(NET_TX), \
- softirq_name(NET_RX), \
- softirq_name(BLOCK), \
- softirq_name(BLOCK_IOPOLL), \
- softirq_name(TASKLET), \
- softirq_name(SCHED), \
- softirq_name(HRTIMER), \
- softirq_name(RCU))
+ __print_symbolic(val, SOFTIRQ_NAME_LIST)
/**
* irq_handler_entry - called immediately before the irq action handler
--- /dev/null
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM libata
+
+#if !defined(_TRACE_LIBATA_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_LIBATA_H
+
+#include <linux/ata.h>
+#include <linux/libata.h>
+#include <linux/tracepoint.h>
+#include <linux/trace_seq.h>
+
+#define ata_opcode_name(opcode) { opcode, #opcode }
+#define show_opcode_name(val) \
+ __print_symbolic(val, \
+ ata_opcode_name(ATA_CMD_DEV_RESET), \
+ ata_opcode_name(ATA_CMD_CHK_POWER), \
+ ata_opcode_name(ATA_CMD_STANDBY), \
+ ata_opcode_name(ATA_CMD_IDLE), \
+ ata_opcode_name(ATA_CMD_EDD), \
+ ata_opcode_name(ATA_CMD_DOWNLOAD_MICRO), \
+ ata_opcode_name(ATA_CMD_DOWNLOAD_MICRO_DMA), \
+ ata_opcode_name(ATA_CMD_NOP), \
+ ata_opcode_name(ATA_CMD_FLUSH), \
+ ata_opcode_name(ATA_CMD_FLUSH_EXT), \
+ ata_opcode_name(ATA_CMD_ID_ATA), \
+ ata_opcode_name(ATA_CMD_ID_ATAPI), \
+ ata_opcode_name(ATA_CMD_SERVICE), \
+ ata_opcode_name(ATA_CMD_READ), \
+ ata_opcode_name(ATA_CMD_READ_EXT), \
+ ata_opcode_name(ATA_CMD_READ_QUEUED), \
+ ata_opcode_name(ATA_CMD_READ_STREAM_EXT), \
+ ata_opcode_name(ATA_CMD_READ_STREAM_DMA_EXT), \
+ ata_opcode_name(ATA_CMD_WRITE), \
+ ata_opcode_name(ATA_CMD_WRITE_EXT), \
+ ata_opcode_name(ATA_CMD_WRITE_QUEUED), \
+ ata_opcode_name(ATA_CMD_WRITE_STREAM_EXT), \
+ ata_opcode_name(ATA_CMD_WRITE_STREAM_DMA_EXT), \
+ ata_opcode_name(ATA_CMD_WRITE_FUA_EXT), \
+ ata_opcode_name(ATA_CMD_WRITE_QUEUED_FUA_EXT), \
+ ata_opcode_name(ATA_CMD_FPDMA_READ), \
+ ata_opcode_name(ATA_CMD_FPDMA_WRITE), \
+ ata_opcode_name(ATA_CMD_FPDMA_SEND), \
+ ata_opcode_name(ATA_CMD_FPDMA_RECV), \
+ ata_opcode_name(ATA_CMD_PIO_READ), \
+ ata_opcode_name(ATA_CMD_PIO_READ_EXT), \
+ ata_opcode_name(ATA_CMD_PIO_WRITE), \
+ ata_opcode_name(ATA_CMD_PIO_WRITE_EXT), \
+ ata_opcode_name(ATA_CMD_READ_MULTI), \
+ ata_opcode_name(ATA_CMD_READ_MULTI_EXT), \
+ ata_opcode_name(ATA_CMD_WRITE_MULTI), \
+ ata_opcode_name(ATA_CMD_WRITE_MULTI_EXT), \
+ ata_opcode_name(ATA_CMD_WRITE_MULTI_FUA_EXT), \
+ ata_opcode_name(ATA_CMD_SET_FEATURES), \
+ ata_opcode_name(ATA_CMD_SET_MULTI), \
+ ata_opcode_name(ATA_CMD_PACKET), \
+ ata_opcode_name(ATA_CMD_VERIFY), \
+ ata_opcode_name(ATA_CMD_VERIFY_EXT), \
+ ata_opcode_name(ATA_CMD_WRITE_UNCORR_EXT), \
+ ata_opcode_name(ATA_CMD_STANDBYNOW1), \
+ ata_opcode_name(ATA_CMD_IDLEIMMEDIATE), \
+ ata_opcode_name(ATA_CMD_SLEEP), \
+ ata_opcode_name(ATA_CMD_INIT_DEV_PARAMS), \
+ ata_opcode_name(ATA_CMD_READ_NATIVE_MAX), \
+ ata_opcode_name(ATA_CMD_READ_NATIVE_MAX_EXT), \
+ ata_opcode_name(ATA_CMD_SET_MAX), \
+ ata_opcode_name(ATA_CMD_SET_MAX_EXT), \
+ ata_opcode_name(ATA_CMD_READ_LOG_EXT), \
+ ata_opcode_name(ATA_CMD_WRITE_LOG_EXT), \
+ ata_opcode_name(ATA_CMD_READ_LOG_DMA_EXT), \
+ ata_opcode_name(ATA_CMD_WRITE_LOG_DMA_EXT), \
+ ata_opcode_name(ATA_CMD_TRUSTED_NONDATA), \
+ ata_opcode_name(ATA_CMD_TRUSTED_RCV), \
+ ata_opcode_name(ATA_CMD_TRUSTED_RCV_DMA), \
+ ata_opcode_name(ATA_CMD_TRUSTED_SND), \
+ ata_opcode_name(ATA_CMD_TRUSTED_SND_DMA), \
+ ata_opcode_name(ATA_CMD_PMP_READ), \
+ ata_opcode_name(ATA_CMD_PMP_READ_DMA), \
+ ata_opcode_name(ATA_CMD_PMP_WRITE), \
+ ata_opcode_name(ATA_CMD_PMP_WRITE_DMA), \
+ ata_opcode_name(ATA_CMD_CONF_OVERLAY), \
+ ata_opcode_name(ATA_CMD_SEC_SET_PASS), \
+ ata_opcode_name(ATA_CMD_SEC_UNLOCK), \
+ ata_opcode_name(ATA_CMD_SEC_ERASE_PREP), \
+ ata_opcode_name(ATA_CMD_SEC_ERASE_UNIT), \
+ ata_opcode_name(ATA_CMD_SEC_FREEZE_LOCK), \
+ ata_opcode_name(ATA_CMD_SEC_DISABLE_PASS), \
+ ata_opcode_name(ATA_CMD_CONFIG_STREAM), \
+ ata_opcode_name(ATA_CMD_SMART), \
+ ata_opcode_name(ATA_CMD_MEDIA_LOCK), \
+ ata_opcode_name(ATA_CMD_MEDIA_UNLOCK), \
+ ata_opcode_name(ATA_CMD_DSM), \
+ ata_opcode_name(ATA_CMD_CHK_MED_CRD_TYP), \
+ ata_opcode_name(ATA_CMD_CFA_REQ_EXT_ERR), \
+ ata_opcode_name(ATA_CMD_CFA_WRITE_NE), \
+ ata_opcode_name(ATA_CMD_CFA_TRANS_SECT), \
+ ata_opcode_name(ATA_CMD_CFA_ERASE), \
+ ata_opcode_name(ATA_CMD_CFA_WRITE_MULT_NE), \
+ ata_opcode_name(ATA_CMD_REQ_SENSE_DATA), \
+ ata_opcode_name(ATA_CMD_SANITIZE_DEVICE), \
+ ata_opcode_name(ATA_CMD_RESTORE), \
+ ata_opcode_name(ATA_CMD_READ_LONG), \
+ ata_opcode_name(ATA_CMD_READ_LONG_ONCE), \
+ ata_opcode_name(ATA_CMD_WRITE_LONG), \
+ ata_opcode_name(ATA_CMD_WRITE_LONG_ONCE))
+
+#define ata_error_name(result) { result, #result }
+#define show_error_name(val) \
+ __print_symbolic(val, \
+ ata_error_name(ATA_ICRC), \
+ ata_error_name(ATA_UNC), \
+ ata_error_name(ATA_MC), \
+ ata_error_name(ATA_IDNF), \
+ ata_error_name(ATA_MCR), \
+ ata_error_name(ATA_ABORTED), \
+ ata_error_name(ATA_TRK0NF), \
+ ata_error_name(ATA_AMNF))
+
+#define ata_protocol_name(proto) { proto, #proto }
+#define show_protocol_name(val) \
+ __print_symbolic(val, \
+ ata_protocol_name(ATA_PROT_UNKNOWN), \
+ ata_protocol_name(ATA_PROT_NODATA), \
+ ata_protocol_name(ATA_PROT_PIO), \
+ ata_protocol_name(ATA_PROT_DMA), \
+ ata_protocol_name(ATA_PROT_NCQ), \
+ ata_protocol_name(ATAPI_PROT_NODATA), \
+ ata_protocol_name(ATAPI_PROT_PIO), \
+ ata_protocol_name(ATAPI_PROT_DMA))
+
+const char *libata_trace_parse_status(struct trace_seq*, unsigned char);
+#define __parse_status(s) libata_trace_parse_status(p, s)
+
+const char *libata_trace_parse_eh_action(struct trace_seq *, unsigned int);
+#define __parse_eh_action(a) libata_trace_parse_eh_action(p, a)
+
+const char *libata_trace_parse_eh_err_mask(struct trace_seq *, unsigned int);
+#define __parse_eh_err_mask(m) libata_trace_parse_eh_err_mask(p, m)
+
+const char *libata_trace_parse_qc_flags(struct trace_seq *, unsigned int);
+#define __parse_qc_flags(f) libata_trace_parse_qc_flags(p, f)
+
+TRACE_EVENT(ata_qc_issue,
+
+ TP_PROTO(struct ata_queued_cmd *qc),
+
+ TP_ARGS(qc),
+
+ TP_STRUCT__entry(
+ __field( unsigned int, ata_port )
+ __field( unsigned int, ata_dev )
+ __field( unsigned int, tag )
+ __field( unsigned char, cmd )
+ __field( unsigned char, dev )
+ __field( unsigned char, lbal )
+ __field( unsigned char, lbam )
+ __field( unsigned char, lbah )
+ __field( unsigned char, nsect )
+ __field( unsigned char, feature )
+ __field( unsigned char, hob_lbal )
+ __field( unsigned char, hob_lbam )
+ __field( unsigned char, hob_lbah )
+ __field( unsigned char, hob_nsect )
+ __field( unsigned char, hob_feature )
+ __field( unsigned char, ctl )
+ __field( unsigned char, proto )
+ __field( unsigned long, flags )
+ ),
+
+ TP_fast_assign(
+ __entry->ata_port = qc->ap->print_id;
+ __entry->ata_dev = qc->dev->link->pmp + qc->dev->devno;
+ __entry->tag = qc->tag;
+ __entry->proto = qc->tf.protocol;
+ __entry->cmd = qc->tf.command;
+ __entry->dev = qc->tf.device;
+ __entry->lbal = qc->tf.lbal;
+ __entry->lbam = qc->tf.lbam;
+ __entry->lbah = qc->tf.lbah;
+ __entry->hob_lbal = qc->tf.hob_lbal;
+ __entry->hob_lbam = qc->tf.hob_lbam;
+ __entry->hob_lbah = qc->tf.hob_lbah;
+ __entry->feature = qc->tf.feature;
+ __entry->hob_feature = qc->tf.hob_feature;
+ __entry->nsect = qc->tf.nsect;
+ __entry->hob_nsect = qc->tf.hob_nsect;
+ ),
+
+ TP_printk("ata_port=%u ata_dev=%u tag=%d proto=%s cmd=%s " \
+ " tf=(%02x/%02x:%02x:%02x:%02x:%02x/%02x:%02x:%02x:%02x:%02x/%02x)",
+ __entry->ata_port, __entry->ata_dev, __entry->tag,
+ show_protocol_name(__entry->proto),
+ show_opcode_name(__entry->cmd),
+ __entry->cmd, __entry->feature, __entry->nsect,
+ __entry->lbal, __entry->lbam, __entry->lbah,
+ __entry->hob_feature, __entry->hob_nsect,
+ __entry->hob_lbal, __entry->hob_lbam, __entry->hob_lbah,
+ __entry->dev)
+);
+
+DECLARE_EVENT_CLASS(ata_qc_complete_template,
+
+ TP_PROTO(struct ata_queued_cmd *qc),
+
+ TP_ARGS(qc),
+
+ TP_STRUCT__entry(
+ __field( unsigned int, ata_port )
+ __field( unsigned int, ata_dev )
+ __field( unsigned int, tag )
+ __field( unsigned char, status )
+ __field( unsigned char, dev )
+ __field( unsigned char, lbal )
+ __field( unsigned char, lbam )
+ __field( unsigned char, lbah )
+ __field( unsigned char, nsect )
+ __field( unsigned char, error )
+ __field( unsigned char, hob_lbal )
+ __field( unsigned char, hob_lbam )
+ __field( unsigned char, hob_lbah )
+ __field( unsigned char, hob_nsect )
+ __field( unsigned char, hob_feature )
+ __field( unsigned char, ctl )
+ __field( unsigned long, flags )
+ ),
+
+ TP_fast_assign(
+ __entry->ata_port = qc->ap->print_id;
+ __entry->ata_dev = qc->dev->link->pmp + qc->dev->devno;
+ __entry->tag = qc->tag;
+ __entry->status = qc->result_tf.command;
+ __entry->dev = qc->result_tf.device;
+ __entry->lbal = qc->result_tf.lbal;
+ __entry->lbam = qc->result_tf.lbam;
+ __entry->lbah = qc->result_tf.lbah;
+ __entry->hob_lbal = qc->result_tf.hob_lbal;
+ __entry->hob_lbam = qc->result_tf.hob_lbam;
+ __entry->hob_lbah = qc->result_tf.hob_lbah;
+ __entry->error = qc->result_tf.feature;
+ __entry->hob_feature = qc->result_tf.hob_feature;
+ __entry->nsect = qc->result_tf.nsect;
+ __entry->hob_nsect = qc->result_tf.hob_nsect;
+ ),
+
+ TP_printk("ata_port=%u ata_dev=%u tag=%d flags=%s status=%s " \
+ " res=(%02x/%02x:%02x:%02x:%02x:%02x/%02x:%02x:%02x:%02x:%02x/%02x)",
+ __entry->ata_port, __entry->ata_dev, __entry->tag,
+ __parse_qc_flags(__entry->flags),
+ __parse_status(__entry->status),
+ __entry->status, __entry->error, __entry->nsect,
+ __entry->lbal, __entry->lbam, __entry->lbah,
+ __entry->hob_feature, __entry->hob_nsect,
+ __entry->hob_lbal, __entry->hob_lbam, __entry->hob_lbah,
+ __entry->dev)
+);
+
+DEFINE_EVENT(ata_qc_complete_template, ata_qc_complete_internal,
+ TP_PROTO(struct ata_queued_cmd *qc),
+ TP_ARGS(qc));
+
+DEFINE_EVENT(ata_qc_complete_template, ata_qc_complete_failed,
+ TP_PROTO(struct ata_queued_cmd *qc),
+ TP_ARGS(qc));
+
+DEFINE_EVENT(ata_qc_complete_template, ata_qc_complete_done,
+ TP_PROTO(struct ata_queued_cmd *qc),
+ TP_ARGS(qc));
+
+TRACE_EVENT(ata_eh_link_autopsy,
+
+ TP_PROTO(struct ata_device *dev, unsigned int eh_action, unsigned int eh_err_mask),
+
+ TP_ARGS(dev, eh_action, eh_err_mask),
+
+ TP_STRUCT__entry(
+ __field( unsigned int, ata_port )
+ __field( unsigned int, ata_dev )
+ __field( unsigned int, eh_action )
+ __field( unsigned int, eh_err_mask)
+ ),
+
+ TP_fast_assign(
+ __entry->ata_port = dev->link->ap->print_id;
+ __entry->ata_dev = dev->link->pmp + dev->devno;
+ __entry->eh_action = eh_action;
+ __entry->eh_err_mask = eh_err_mask;
+ ),
+
+ TP_printk("ata_port=%u ata_dev=%u eh_action=%s err_mask=%s",
+ __entry->ata_port, __entry->ata_dev,
+ __parse_eh_action(__entry->eh_action),
+ __parse_eh_err_mask(__entry->eh_err_mask))
+);
+
+TRACE_EVENT(ata_eh_link_autopsy_qc,
+
+ TP_PROTO(struct ata_queued_cmd *qc),
+
+ TP_ARGS(qc),
+
+ TP_STRUCT__entry(
+ __field( unsigned int, ata_port )
+ __field( unsigned int, ata_dev )
+ __field( unsigned int, tag )
+ __field( unsigned int, qc_flags )
+ __field( unsigned int, eh_err_mask)
+ ),
+
+ TP_fast_assign(
+ __entry->ata_port = qc->ap->print_id;
+ __entry->ata_dev = qc->dev->link->pmp + qc->dev->devno;
+ __entry->tag = qc->tag;
+ __entry->qc_flags = qc->flags;
+ __entry->eh_err_mask = qc->err_mask;
+ ),
+
+ TP_printk("ata_port=%u ata_dev=%u tag=%d flags=%s err_mask=%s",
+ __entry->ata_port, __entry->ata_dev, __entry->tag,
+ __parse_qc_flags(__entry->qc_flags),
+ __parse_eh_err_mask(__entry->eh_err_mask))
+);
+
+#endif /* _TRACE_LIBATA_H */
+
+/* This part must be outside protection */
+#include <trace/define_trace.h>
#include <linux/tracepoint.h>
#define MIGRATE_MODE \
- {MIGRATE_ASYNC, "MIGRATE_ASYNC"}, \
- {MIGRATE_SYNC_LIGHT, "MIGRATE_SYNC_LIGHT"}, \
- {MIGRATE_SYNC, "MIGRATE_SYNC"}
+ EM( MIGRATE_ASYNC, "MIGRATE_ASYNC") \
+ EM( MIGRATE_SYNC_LIGHT, "MIGRATE_SYNC_LIGHT") \
+ EMe(MIGRATE_SYNC, "MIGRATE_SYNC")
+
#define MIGRATE_REASON \
- {MR_COMPACTION, "compaction"}, \
- {MR_MEMORY_FAILURE, "memory_failure"}, \
- {MR_MEMORY_HOTPLUG, "memory_hotplug"}, \
- {MR_SYSCALL, "syscall_or_cpuset"}, \
- {MR_MEMPOLICY_MBIND, "mempolicy_mbind"}, \
- {MR_NUMA_MISPLACED, "numa_misplaced"}, \
- {MR_CMA, "cma"}
+ EM( MR_COMPACTION, "compaction") \
+ EM( MR_MEMORY_FAILURE, "memory_failure") \
+ EM( MR_MEMORY_HOTPLUG, "memory_hotplug") \
+ EM( MR_SYSCALL, "syscall_or_cpuset") \
+ EM( MR_MEMPOLICY_MBIND, "mempolicy_mbind") \
+ EM( MR_NUMA_MISPLACED, "numa_misplaced") \
+ EMe(MR_CMA, "cma")
+
+/*
+ * First define the enums in the above macros to be exported to userspace
+ * via TRACE_DEFINE_ENUM().
+ */
+#undef EM
+#undef EMe
+#define EM(a, b) TRACE_DEFINE_ENUM(a);
+#define EMe(a, b) TRACE_DEFINE_ENUM(a);
+
+MIGRATE_MODE
+MIGRATE_REASON
+
+/*
+ * Now redefine the EM() and EMe() macros to map the enums to the strings
+ * that will be printed in the output.
+ */
+#undef EM
+#undef EMe
+#define EM(a, b) {a, b},
+#define EMe(a, b) {a, b}
TRACE_EVENT(mm_migrate_pages,
__assign_str(name, mod->name);
),
- TP_printk("%s call_site=%pf refcnt=%d",
+ TP_printk("%s call_site=%ps refcnt=%d",
__get_str(name), (void *)__entry->ip, __entry->refcnt)
);
__assign_str(name, name);
),
- TP_printk("%s wait=%d call_site=%pf",
+ TP_printk("%s wait=%d call_site=%ps",
__get_str(name), (int)__entry->wait, (void *)__entry->ip)
);
__entry->IP = IP;
),
- TP_printk("bytes %d caller %pF",
+ TP_printk("bytes %d caller %pS",
__entry->bytes, (void *)__entry->IP)
);
__entry->IP = IP;
),
- TP_printk("%s pool: bytes %d caller %pF",
+ TP_printk("%s pool: bytes %d caller %pS",
__entry->pool_name, __entry->bytes, (void *)__entry->IP)
);
),
TP_printk("%s pool: bits %d entropy_count %d entropy_total %d "
- "caller %pF", __entry->pool_name, __entry->bits,
+ "caller %pS", __entry->pool_name, __entry->bits,
__entry->entropy_count, __entry->entropy_total,
(void *)__entry->IP)
);
__entry->IP = IP;
),
- TP_printk("nbytes %d caller %pF", __entry->nbytes, (void *)__entry->IP)
+ TP_printk("nbytes %d caller %pS", __entry->nbytes, (void *)__entry->IP)
);
DEFINE_EVENT(random__get_random_bytes, get_random_bytes,
__entry->IP = IP;
),
- TP_printk("%s pool: nbytes %d entropy_count %d caller %pF",
+ TP_printk("%s pool: nbytes %d entropy_count %d caller %pS",
__entry->pool_name, __entry->nbytes, __entry->entropy_count,
(void *)__entry->IP)
);
+++ /dev/null
-#undef TRACE_SYSTEM
-#define TRACE_SYSTEM regmap
-
-#if !defined(_TRACE_REGMAP_H) || defined(TRACE_HEADER_MULTI_READ)
-#define _TRACE_REGMAP_H
-
-#include <linux/ktime.h>
-#include <linux/tracepoint.h>
-
-#include "../../../drivers/base/regmap/internal.h"
-
-/*
- * Log register events
- */
-DECLARE_EVENT_CLASS(regmap_reg,
-
- TP_PROTO(struct regmap *map, unsigned int reg,
- unsigned int val),
-
- TP_ARGS(map, reg, val),
-
- TP_STRUCT__entry(
- __string( name, regmap_name(map) )
- __field( unsigned int, reg )
- __field( unsigned int, val )
- ),
-
- TP_fast_assign(
- __assign_str(name, regmap_name(map));
- __entry->reg = reg;
- __entry->val = val;
- ),
-
- TP_printk("%s reg=%x val=%x", __get_str(name),
- (unsigned int)__entry->reg,
- (unsigned int)__entry->val)
-);
-
-DEFINE_EVENT(regmap_reg, regmap_reg_write,
-
- TP_PROTO(struct regmap *map, unsigned int reg,
- unsigned int val),
-
- TP_ARGS(map, reg, val)
-
-);
-
-DEFINE_EVENT(regmap_reg, regmap_reg_read,
-
- TP_PROTO(struct regmap *map, unsigned int reg,
- unsigned int val),
-
- TP_ARGS(map, reg, val)
-
-);
-
-DEFINE_EVENT(regmap_reg, regmap_reg_read_cache,
-
- TP_PROTO(struct regmap *map, unsigned int reg,
- unsigned int val),
-
- TP_ARGS(map, reg, val)
-
-);
-
-DECLARE_EVENT_CLASS(regmap_block,
-
- TP_PROTO(struct regmap *map, unsigned int reg, int count),
-
- TP_ARGS(map, reg, count),
-
- TP_STRUCT__entry(
- __string( name, regmap_name(map) )
- __field( unsigned int, reg )
- __field( int, count )
- ),
-
- TP_fast_assign(
- __assign_str(name, regmap_name(map));
- __entry->reg = reg;
- __entry->count = count;
- ),
-
- TP_printk("%s reg=%x count=%d", __get_str(name),
- (unsigned int)__entry->reg,
- (int)__entry->count)
-);
-
-DEFINE_EVENT(regmap_block, regmap_hw_read_start,
-
- TP_PROTO(struct regmap *map, unsigned int reg, int count),
-
- TP_ARGS(map, reg, count)
-);
-
-DEFINE_EVENT(regmap_block, regmap_hw_read_done,
-
- TP_PROTO(struct regmap *map, unsigned int reg, int count),
-
- TP_ARGS(map, reg, count)
-);
-
-DEFINE_EVENT(regmap_block, regmap_hw_write_start,
-
- TP_PROTO(struct regmap *map, unsigned int reg, int count),
-
- TP_ARGS(map, reg, count)
-);
-
-DEFINE_EVENT(regmap_block, regmap_hw_write_done,
-
- TP_PROTO(struct regmap *map, unsigned int reg, int count),
-
- TP_ARGS(map, reg, count)
-);
-
-TRACE_EVENT(regcache_sync,
-
- TP_PROTO(struct regmap *map, const char *type,
- const char *status),
-
- TP_ARGS(map, type, status),
-
- TP_STRUCT__entry(
- __string( name, regmap_name(map) )
- __string( status, status )
- __string( type, type )
- __field( int, type )
- ),
-
- TP_fast_assign(
- __assign_str(name, regmap_name(map));
- __assign_str(status, status);
- __assign_str(type, type);
- ),
-
- TP_printk("%s type=%s status=%s", __get_str(name),
- __get_str(type), __get_str(status))
-);
-
-DECLARE_EVENT_CLASS(regmap_bool,
-
- TP_PROTO(struct regmap *map, bool flag),
-
- TP_ARGS(map, flag),
-
- TP_STRUCT__entry(
- __string( name, regmap_name(map) )
- __field( int, flag )
- ),
-
- TP_fast_assign(
- __assign_str(name, regmap_name(map));
- __entry->flag = flag;
- ),
-
- TP_printk("%s flag=%d", __get_str(name),
- (int)__entry->flag)
-);
-
-DEFINE_EVENT(regmap_bool, regmap_cache_only,
-
- TP_PROTO(struct regmap *map, bool flag),
-
- TP_ARGS(map, flag)
-
-);
-
-DEFINE_EVENT(regmap_bool, regmap_cache_bypass,
-
- TP_PROTO(struct regmap *map, bool flag),
-
- TP_ARGS(map, flag)
-
-);
-
-DECLARE_EVENT_CLASS(regmap_async,
-
- TP_PROTO(struct regmap *map),
-
- TP_ARGS(map),
-
- TP_STRUCT__entry(
- __string( name, regmap_name(map) )
- ),
-
- TP_fast_assign(
- __assign_str(name, regmap_name(map));
- ),
-
- TP_printk("%s", __get_str(name))
-);
-
-DEFINE_EVENT(regmap_block, regmap_async_write_start,
-
- TP_PROTO(struct regmap *map, unsigned int reg, int count),
-
- TP_ARGS(map, reg, count)
-);
-
-DEFINE_EVENT(regmap_async, regmap_async_io_complete,
-
- TP_PROTO(struct regmap *map),
-
- TP_ARGS(map)
-
-);
-
-DEFINE_EVENT(regmap_async, regmap_async_complete_start,
-
- TP_PROTO(struct regmap *map),
-
- TP_ARGS(map)
-
-);
-
-DEFINE_EVENT(regmap_async, regmap_async_complete_done,
-
- TP_PROTO(struct regmap *map),
-
- TP_ARGS(map)
-
-);
-
-TRACE_EVENT(regcache_drop_region,
-
- TP_PROTO(struct regmap *map, unsigned int from,
- unsigned int to),
-
- TP_ARGS(map, from, to),
-
- TP_STRUCT__entry(
- __string( name, regmap_name(map) )
- __field( unsigned int, from )
- __field( unsigned int, to )
- ),
-
- TP_fast_assign(
- __assign_str(name, regmap_name(map));
- __entry->from = from;
- __entry->to = to;
- ),
-
- TP_printk("%s %u-%u", __get_str(name), (unsigned int)__entry->from,
- (unsigned int)__entry->to)
-);
-
-#endif /* _TRACE_REGMAP_H */
-
-/* This part must be outside protection */
-#include <trace/define_trace.h>
);
+/*
+ * First define the enums in the below macros to be exported to userspace
+ * via TRACE_DEFINE_ENUM().
+ */
+#undef EM
+#undef EMe
+#define EM(a, b) TRACE_DEFINE_ENUM(a);
+#define EMe(a, b) TRACE_DEFINE_ENUM(a);
+
+#define RPC_SHOW_SOCKET \
+ EM( SS_FREE, "FREE" ) \
+ EM( SS_UNCONNECTED, "UNCONNECTED" ) \
+ EM( SS_CONNECTING, "CONNECTING," ) \
+ EM( SS_CONNECTED, "CONNECTED," ) \
+ EMe(SS_DISCONNECTING, "DISCONNECTING" )
+
#define rpc_show_socket_state(state) \
- __print_symbolic(state, \
- { SS_FREE, "FREE" }, \
- { SS_UNCONNECTED, "UNCONNECTED" }, \
- { SS_CONNECTING, "CONNECTING," }, \
- { SS_CONNECTED, "CONNECTED," }, \
- { SS_DISCONNECTING, "DISCONNECTING" })
+ __print_symbolic(state, RPC_SHOW_SOCKET)
+
+RPC_SHOW_SOCKET
+
+#define RPC_SHOW_SOCK \
+ EM( TCP_ESTABLISHED, "ESTABLISHED" ) \
+ EM( TCP_SYN_SENT, "SYN_SENT" ) \
+ EM( TCP_SYN_RECV, "SYN_RECV" ) \
+ EM( TCP_FIN_WAIT1, "FIN_WAIT1" ) \
+ EM( TCP_FIN_WAIT2, "FIN_WAIT2" ) \
+ EM( TCP_TIME_WAIT, "TIME_WAIT" ) \
+ EM( TCP_CLOSE, "CLOSE" ) \
+ EM( TCP_CLOSE_WAIT, "CLOSE_WAIT" ) \
+ EM( TCP_LAST_ACK, "LAST_ACK" ) \
+ EM( TCP_LISTEN, "LISTEN" ) \
+ EMe( TCP_CLOSING, "CLOSING" )
#define rpc_show_sock_state(state) \
- __print_symbolic(state, \
- { TCP_ESTABLISHED, "ESTABLISHED" }, \
- { TCP_SYN_SENT, "SYN_SENT" }, \
- { TCP_SYN_RECV, "SYN_RECV" }, \
- { TCP_FIN_WAIT1, "FIN_WAIT1" }, \
- { TCP_FIN_WAIT2, "FIN_WAIT2" }, \
- { TCP_TIME_WAIT, "TIME_WAIT" }, \
- { TCP_CLOSE, "CLOSE" }, \
- { TCP_CLOSE_WAIT, "CLOSE_WAIT" }, \
- { TCP_LAST_ACK, "LAST_ACK" }, \
- { TCP_LISTEN, "LISTEN" }, \
- { TCP_CLOSING, "CLOSING" })
+ __print_symbolic(state, RPC_SHOW_SOCK)
+
+RPC_SHOW_SOCK
+
+/*
+ * Now redefine the EM() and EMe() macros to map the enums to the strings
+ * that will be printed in the output.
+ */
+#undef EM
+#undef EMe
+#define EM(a, b) {a, b},
+#define EMe(a, b) {a, b}
DECLARE_EVENT_CLASS(xs_socket_event,
#include <linux/mm_types.h>
#include <linux/tracepoint.h>
-#define TLB_FLUSH_REASON \
- { TLB_FLUSH_ON_TASK_SWITCH, "flush on task switch" }, \
- { TLB_REMOTE_SHOOTDOWN, "remote shootdown" }, \
- { TLB_LOCAL_SHOOTDOWN, "local shootdown" }, \
- { TLB_LOCAL_MM_SHOOTDOWN, "local mm shootdown" }
+#define TLB_FLUSH_REASON \
+ EM( TLB_FLUSH_ON_TASK_SWITCH, "flush on task switch" ) \
+ EM( TLB_REMOTE_SHOOTDOWN, "remote shootdown" ) \
+ EM( TLB_LOCAL_SHOOTDOWN, "local shootdown" ) \
+ EMe( TLB_LOCAL_MM_SHOOTDOWN, "local mm shootdown" )
+
+/*
+ * First define the enums in TLB_FLUSH_REASON to be exported to userspace
+ * via TRACE_DEFINE_ENUM().
+ */
+#undef EM
+#undef EMe
+#define EM(a,b) TRACE_DEFINE_ENUM(a);
+#define EMe(a,b) TRACE_DEFINE_ENUM(a);
+
+TLB_FLUSH_REASON
+
+/*
+ * Now redefine the EM() and EMe() macros to map the enums to the strings
+ * that will be printed in the output.
+ */
+#undef EM
+#undef EMe
+#define EM(a,b) { a, b },
+#define EMe(a,b) { a, b }
TRACE_EVENT_CONDITION(tlb_flush,
#include <linux/tracepoint.h>
-#define show_type(type) \
- __print_symbolic(type, \
- { V4L2_BUF_TYPE_VIDEO_CAPTURE, "VIDEO_CAPTURE" }, \
- { V4L2_BUF_TYPE_VIDEO_OUTPUT, "VIDEO_OUTPUT" }, \
- { V4L2_BUF_TYPE_VIDEO_OVERLAY, "VIDEO_OVERLAY" }, \
- { V4L2_BUF_TYPE_VBI_CAPTURE, "VBI_CAPTURE" }, \
- { V4L2_BUF_TYPE_VBI_OUTPUT, "VBI_OUTPUT" }, \
- { V4L2_BUF_TYPE_SLICED_VBI_CAPTURE, "SLICED_VBI_CAPTURE" }, \
- { V4L2_BUF_TYPE_SLICED_VBI_OUTPUT, "SLICED_VBI_OUTPUT" }, \
- { V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY, "VIDEO_OUTPUT_OVERLAY" },\
- { V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE, "VIDEO_CAPTURE_MPLANE" },\
- { V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, "VIDEO_OUTPUT_MPLANE" }, \
- { V4L2_BUF_TYPE_SDR_CAPTURE, "SDR_CAPTURE" }, \
- { V4L2_BUF_TYPE_PRIVATE, "PRIVATE" })
+/* Enums require being exported to userspace, for user tool parsing */
+#undef EM
+#undef EMe
+#define EM(a, b) TRACE_DEFINE_ENUM(a);
+#define EMe(a, b) TRACE_DEFINE_ENUM(a);
+
+#define show_type(type) \
+ __print_symbolic(type, SHOW_TYPE)
+
+#define SHOW_TYPE \
+ EM( V4L2_BUF_TYPE_VIDEO_CAPTURE, "VIDEO_CAPTURE" ) \
+ EM( V4L2_BUF_TYPE_VIDEO_OUTPUT, "VIDEO_OUTPUT" ) \
+ EM( V4L2_BUF_TYPE_VIDEO_OVERLAY, "VIDEO_OVERLAY" ) \
+ EM( V4L2_BUF_TYPE_VBI_CAPTURE, "VBI_CAPTURE" ) \
+ EM( V4L2_BUF_TYPE_VBI_OUTPUT, "VBI_OUTPUT" ) \
+ EM( V4L2_BUF_TYPE_SLICED_VBI_CAPTURE, "SLICED_VBI_CAPTURE" ) \
+ EM( V4L2_BUF_TYPE_SLICED_VBI_OUTPUT, "SLICED_VBI_OUTPUT" ) \
+ EM( V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY, "VIDEO_OUTPUT_OVERLAY" ) \
+ EM( V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE, "VIDEO_CAPTURE_MPLANE" ) \
+ EM( V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, "VIDEO_OUTPUT_MPLANE" ) \
+ EM( V4L2_BUF_TYPE_SDR_CAPTURE, "SDR_CAPTURE" ) \
+ EMe(V4L2_BUF_TYPE_PRIVATE, "PRIVATE" )
+
+SHOW_TYPE
#define show_field(field) \
- __print_symbolic(field, \
- { V4L2_FIELD_ANY, "ANY" }, \
- { V4L2_FIELD_NONE, "NONE" }, \
- { V4L2_FIELD_TOP, "TOP" }, \
- { V4L2_FIELD_BOTTOM, "BOTTOM" }, \
- { V4L2_FIELD_INTERLACED, "INTERLACED" }, \
- { V4L2_FIELD_SEQ_TB, "SEQ_TB" }, \
- { V4L2_FIELD_SEQ_BT, "SEQ_BT" }, \
- { V4L2_FIELD_ALTERNATE, "ALTERNATE" }, \
- { V4L2_FIELD_INTERLACED_TB, "INTERLACED_TB" }, \
- { V4L2_FIELD_INTERLACED_BT, "INTERLACED_BT" })
+ __print_symbolic(field, SHOW_FIELD)
+
+#define SHOW_FIELD \
+ EM( V4L2_FIELD_ANY, "ANY" ) \
+ EM( V4L2_FIELD_NONE, "NONE" ) \
+ EM( V4L2_FIELD_TOP, "TOP" ) \
+ EM( V4L2_FIELD_BOTTOM, "BOTTOM" ) \
+ EM( V4L2_FIELD_INTERLACED, "INTERLACED" ) \
+ EM( V4L2_FIELD_SEQ_TB, "SEQ_TB" ) \
+ EM( V4L2_FIELD_SEQ_BT, "SEQ_BT" ) \
+ EM( V4L2_FIELD_ALTERNATE, "ALTERNATE" ) \
+ EM( V4L2_FIELD_INTERLACED_TB, "INTERLACED_TB" ) \
+ EMe( V4L2_FIELD_INTERLACED_BT, "INTERLACED_BT" )
+
+SHOW_FIELD
+
+/*
+ * Now redefine the EM() and EMe() macros to map the enums to the strings
+ * that will be printed in the output.
+ */
+#undef EM
+#undef EMe
+#define EM(a, b) {a, b},
+#define EMe(a, b) {a, b}
+
+/* V4L2_TC_TYPE_* are macros, not defines, they do not need processing */
#define show_timecode_type(type) \
__print_symbolic(type, \
{I_REFERENCED, "I_REFERENCED"} \
)
+/* enums need to be exported to user space */
+#undef EM
+#undef EMe
+#define EM(a,b) TRACE_DEFINE_ENUM(a);
+#define EMe(a,b) TRACE_DEFINE_ENUM(a);
+
#define WB_WORK_REASON \
- {WB_REASON_BACKGROUND, "background"}, \
- {WB_REASON_TRY_TO_FREE_PAGES, "try_to_free_pages"}, \
- {WB_REASON_SYNC, "sync"}, \
- {WB_REASON_PERIODIC, "periodic"}, \
- {WB_REASON_LAPTOP_TIMER, "laptop_timer"}, \
- {WB_REASON_FREE_MORE_MEM, "free_more_memory"}, \
- {WB_REASON_FS_FREE_SPACE, "fs_free_space"}, \
- {WB_REASON_FORKER_THREAD, "forker_thread"}
+ EM( WB_REASON_BACKGROUND, "background") \
+ EM( WB_REASON_TRY_TO_FREE_PAGES, "try_to_free_pages") \
+ EM( WB_REASON_SYNC, "sync") \
+ EM( WB_REASON_PERIODIC, "periodic") \
+ EM( WB_REASON_LAPTOP_TIMER, "laptop_timer") \
+ EM( WB_REASON_FREE_MORE_MEM, "free_more_memory") \
+ EM( WB_REASON_FS_FREE_SPACE, "fs_free_space") \
+ EMe(WB_REASON_FORKER_THREAD, "forker_thread")
+
+WB_WORK_REASON
+
+/*
+ * Now redefine the EM() and EMe() macros to map the enums to the strings
+ * that will be printed in the output.
+ */
+#undef EM
+#undef EMe
+#define EM(a,b) { a, b },
+#define EMe(a,b) { a, b }
struct wb_writeback_work;
TP_printk("pmdp %p", __entry->pmdp)
);
-#if PAGETABLE_LEVELS >= 4
+#if CONFIG_PGTABLE_LEVELS >= 4
TRACE_EVENT(xen_mmu_set_pud,
TP_PROTO(pud_t *pudp, pud_t pudval),
#include <linux/ftrace_event.h>
+#ifndef TRACE_SYSTEM_VAR
+#define TRACE_SYSTEM_VAR TRACE_SYSTEM
+#endif
+
+#define __app__(x, y) str__##x##y
+#define __app(x, y) __app__(x, y)
+
+#define TRACE_SYSTEM_STRING __app(TRACE_SYSTEM_VAR,__trace_system_name)
+
+#define TRACE_MAKE_SYSTEM_STR() \
+ static const char TRACE_SYSTEM_STRING[] = \
+ __stringify(TRACE_SYSTEM)
+
+TRACE_MAKE_SYSTEM_STR();
+
+#undef TRACE_DEFINE_ENUM
+#define TRACE_DEFINE_ENUM(a) \
+ static struct trace_enum_map __used __initdata \
+ __##TRACE_SYSTEM##_##a = \
+ { \
+ .system = TRACE_SYSTEM_STRING, \
+ .enum_string = #a, \
+ .enum_value = a \
+ }; \
+ static struct trace_enum_map __used \
+ __attribute__((section("_ftrace_enum_map"))) \
+ *TRACE_SYSTEM##_##a = &__##TRACE_SYSTEM##_##a
+
/*
* DECLARE_EVENT_CLASS can be used to add a generic function
* handlers for events. That is, if all events have the same
#include TRACE_INCLUDE(TRACE_INCLUDE_FILE)
-
/*
* Stage 2 of the trace events.
*
* The size of an array is also encoded, in the higher 16 bits of <item>.
*/
+#undef TRACE_DEFINE_ENUM
+#define TRACE_DEFINE_ENUM(a)
+
#undef __field
#define __field(type, item)
* .trace = ftrace_raw_output_<call>, <-- stage 2
* };
*
- * static const char print_fmt_<call>[] = <TP_printk>;
+ * static char print_fmt_<call>[] = <TP_printk>;
*
* static struct ftrace_event_class __used event_class_<template> = {
* .system = "<system>",
#undef DECLARE_EVENT_CLASS
#define DECLARE_EVENT_CLASS(call, proto, args, tstruct, assign, print) \
_TRACE_PERF_PROTO(call, PARAMS(proto)); \
-static const char print_fmt_##call[] = print; \
+static char print_fmt_##call[] = print; \
static struct ftrace_event_class __used __refdata event_class_##call = { \
- .system = __stringify(TRACE_SYSTEM), \
+ .system = TRACE_SYSTEM_STRING, \
.define_fields = ftrace_define_fields_##call, \
.fields = LIST_HEAD_INIT(event_class_##call.fields),\
.raw_init = trace_event_raw_init, \
#undef DEFINE_EVENT_PRINT
#define DEFINE_EVENT_PRINT(template, call, proto, args, print) \
\
-static const char print_fmt_##call[] = print; \
+static char print_fmt_##call[] = print; \
\
static struct ftrace_event_call __used event_##call = { \
.class = &event_class_##template, \
#include TRACE_INCLUDE(TRACE_INCLUDE_FILE)
+#undef TRACE_SYSTEM_VAR
#ifdef CONFIG_PERF_EVENTS
header-y += dvb/
header-y += hdlc/
header-y += hsi/
+header-y += iio/
header-y += isdn/
header-y += mmc/
header-y += nfsd/
enum bpf_prog_type {
BPF_PROG_TYPE_UNSPEC,
BPF_PROG_TYPE_SOCKET_FILTER,
+ BPF_PROG_TYPE_KPROBE,
};
/* flags for BPF_MAP_UPDATE_ELEM command */
__u32 log_level; /* verbosity level of verifier */
__u32 log_size; /* size of user buffer */
__aligned_u64 log_buf; /* user supplied buffer */
+ __u32 kern_version; /* checked when prog_type=kprobe */
};
} __attribute__((aligned(8)));
BPF_FUNC_map_lookup_elem, /* void *map_lookup_elem(&map, &key) */
BPF_FUNC_map_update_elem, /* int map_update_elem(&map, &key, &value, flags) */
BPF_FUNC_map_delete_elem, /* int map_delete_elem(&map, &key) */
+ BPF_FUNC_probe_read, /* int bpf_probe_read(void *dst, int size, void *src) */
+ BPF_FUNC_ktime_get_ns, /* u64 bpf_ktime_get_ns(void) */
+ BPF_FUNC_trace_printk, /* int bpf_trace_printk(const char *fmt, int fmt_size, ...) */
__BPF_FUNC_MAX_ID,
};
# UAPI Header export list
-header-y += hsi_char.h
+header-y += hsi_char.h cs-protocol.h
--- /dev/null
+/*
+ * cmt-speech interface definitions
+ *
+ * Copyright (C) 2008,2009,2010 Nokia Corporation. All rights reserved.
+ *
+ * Contact: Kai Vehmanen <kai.vehmanen@nokia.com>
+ * Original author: Peter Ujfalusi <peter.ujfalusi@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ */
+
+#ifndef _CS_PROTOCOL_H
+#define _CS_PROTOCOL_H
+
+#include <linux/types.h>
+#include <linux/ioctl.h>
+
+/* chardev parameters */
+#define CS_DEV_FILE_NAME "/dev/cmt_speech"
+
+/* user-space API versioning */
+#define CS_IF_VERSION 2
+
+/* APE kernel <-> user space messages */
+#define CS_CMD_SHIFT 28
+#define CS_DOMAIN_SHIFT 24
+
+#define CS_CMD_MASK 0xff000000
+#define CS_PARAM_MASK 0xffffff
+
+#define CS_CMD(id, dom) \
+ (((id) << CS_CMD_SHIFT) | ((dom) << CS_DOMAIN_SHIFT))
+
+#define CS_ERROR CS_CMD(1, 0)
+#define CS_RX_DATA_RECEIVED CS_CMD(2, 0)
+#define CS_TX_DATA_READY CS_CMD(3, 0)
+#define CS_TX_DATA_SENT CS_CMD(4, 0)
+
+/* params to CS_ERROR indication */
+#define CS_ERR_PEER_RESET 0
+
+/* ioctl interface */
+
+/* parameters to CS_CONFIG_BUFS ioctl */
+#define CS_FEAT_TSTAMP_RX_CTRL (1 << 0)
+#define CS_FEAT_ROLLING_RX_COUNTER (2 << 0)
+
+/* parameters to CS_GET_STATE ioctl */
+#define CS_STATE_CLOSED 0
+#define CS_STATE_OPENED 1 /* resource allocated */
+#define CS_STATE_CONFIGURED 2 /* data path active */
+
+/* maximum number of TX/RX buffers */
+#define CS_MAX_BUFFERS_SHIFT 4
+#define CS_MAX_BUFFERS (1 << CS_MAX_BUFFERS_SHIFT)
+
+/* Parameters for setting up the data buffers */
+struct cs_buffer_config {
+ __u32 rx_bufs; /* number of RX buffer slots */
+ __u32 tx_bufs; /* number of TX buffer slots */
+ __u32 buf_size; /* bytes */
+ __u32 flags; /* see CS_FEAT_* */
+ __u32 reserved[4];
+};
+
+/*
+ * Struct describing the layout and contents of the driver mmap area.
+ * This information is meant as read-only information for the application.
+ */
+struct cs_mmap_config_block {
+ __u32 reserved1;
+ __u32 buf_size; /* 0=disabled, otherwise the transfer size */
+ __u32 rx_bufs; /* # of RX buffers */
+ __u32 tx_bufs; /* # of TX buffers */
+ __u32 reserved2;
+ /* array of offsets within the mmap area for each RX and TX buffer */
+ __u32 rx_offsets[CS_MAX_BUFFERS];
+ __u32 tx_offsets[CS_MAX_BUFFERS];
+ __u32 rx_ptr;
+ __u32 rx_ptr_boundary;
+ __u32 reserved3[2];
+ /*
+ * if enabled with CS_FEAT_TSTAMP_RX_CTRL, monotonic
+ * timestamp taken when the last control command was received
+ */
+ struct timespec tstamp_rx_ctrl;
+};
+
+#define CS_IO_MAGIC 'C'
+
+#define CS_IOW(num, dtype) _IOW(CS_IO_MAGIC, num, dtype)
+#define CS_IOR(num, dtype) _IOR(CS_IO_MAGIC, num, dtype)
+#define CS_IOWR(num, dtype) _IOWR(CS_IO_MAGIC, num, dtype)
+#define CS_IO(num) _IO(CS_IO_MAGIC, num)
+
+#define CS_GET_STATE CS_IOR(21, unsigned int)
+#define CS_SET_WAKELINE CS_IOW(23, unsigned int)
+#define CS_GET_IF_VERSION CS_IOR(30, unsigned int)
+#define CS_CONFIG_BUFS CS_IOW(31, struct cs_buffer_config)
+
+#endif /* _CS_PROTOCOL_H */
--- /dev/null
+# UAPI Header export list
+header-y += events.h
+header-y += types.h
--- /dev/null
+/* The industrial I/O - event passing to userspace
+ *
+ * Copyright (c) 2008-2011 Jonathan Cameron
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef _UAPI_IIO_EVENTS_H_
+#define _UAPI_IIO_EVENTS_H_
+
+#include <linux/ioctl.h>
+#include <linux/types.h>
+
+/**
+ * struct iio_event_data - The actual event being pushed to userspace
+ * @id: event identifier
+ * @timestamp: best estimate of time of event occurrence (often from
+ * the interrupt handler)
+ */
+struct iio_event_data {
+ __u64 id;
+ __s64 timestamp;
+};
+
+#define IIO_GET_EVENT_FD_IOCTL _IOR('i', 0x90, int)
+
+#define IIO_EVENT_CODE_EXTRACT_TYPE(mask) ((mask >> 56) & 0xFF)
+
+#define IIO_EVENT_CODE_EXTRACT_DIR(mask) ((mask >> 48) & 0x7F)
+
+#define IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(mask) ((mask >> 32) & 0xFF)
+
+/* Event code number extraction depends on which type of event we have.
+ * Perhaps review this function in the future*/
+#define IIO_EVENT_CODE_EXTRACT_CHAN(mask) ((__s16)(mask & 0xFFFF))
+#define IIO_EVENT_CODE_EXTRACT_CHAN2(mask) ((__s16)(((mask) >> 16) & 0xFFFF))
+
+#define IIO_EVENT_CODE_EXTRACT_MODIFIER(mask) ((mask >> 40) & 0xFF)
+#define IIO_EVENT_CODE_EXTRACT_DIFF(mask) (((mask) >> 55) & 0x1)
+
+#endif /* _UAPI_IIO_EVENTS_H_ */
--- /dev/null
+/* industrial I/O data types needed both in and out of kernel
+ *
+ * Copyright (c) 2008 Jonathan Cameron
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+
+#ifndef _UAPI_IIO_TYPES_H_
+#define _UAPI_IIO_TYPES_H_
+
+enum iio_chan_type {
+ IIO_VOLTAGE,
+ IIO_CURRENT,
+ IIO_POWER,
+ IIO_ACCEL,
+ IIO_ANGL_VEL,
+ IIO_MAGN,
+ IIO_LIGHT,
+ IIO_INTENSITY,
+ IIO_PROXIMITY,
+ IIO_TEMP,
+ IIO_INCLI,
+ IIO_ROT,
+ IIO_ANGL,
+ IIO_TIMESTAMP,
+ IIO_CAPACITANCE,
+ IIO_ALTVOLTAGE,
+ IIO_CCT,
+ IIO_PRESSURE,
+ IIO_HUMIDITYRELATIVE,
+ IIO_ACTIVITY,
+ IIO_STEPS,
+ IIO_ENERGY,
+ IIO_DISTANCE,
+ IIO_VELOCITY,
+};
+
+enum iio_modifier {
+ IIO_NO_MOD,
+ IIO_MOD_X,
+ IIO_MOD_Y,
+ IIO_MOD_Z,
+ IIO_MOD_X_AND_Y,
+ IIO_MOD_X_AND_Z,
+ IIO_MOD_Y_AND_Z,
+ IIO_MOD_X_AND_Y_AND_Z,
+ IIO_MOD_X_OR_Y,
+ IIO_MOD_X_OR_Z,
+ IIO_MOD_Y_OR_Z,
+ IIO_MOD_X_OR_Y_OR_Z,
+ IIO_MOD_LIGHT_BOTH,
+ IIO_MOD_LIGHT_IR,
+ IIO_MOD_ROOT_SUM_SQUARED_X_Y,
+ IIO_MOD_SUM_SQUARED_X_Y_Z,
+ IIO_MOD_LIGHT_CLEAR,
+ IIO_MOD_LIGHT_RED,
+ IIO_MOD_LIGHT_GREEN,
+ IIO_MOD_LIGHT_BLUE,
+ IIO_MOD_QUATERNION,
+ IIO_MOD_TEMP_AMBIENT,
+ IIO_MOD_TEMP_OBJECT,
+ IIO_MOD_NORTH_MAGN,
+ IIO_MOD_NORTH_TRUE,
+ IIO_MOD_NORTH_MAGN_TILT_COMP,
+ IIO_MOD_NORTH_TRUE_TILT_COMP,
+ IIO_MOD_RUNNING,
+ IIO_MOD_JOGGING,
+ IIO_MOD_WALKING,
+ IIO_MOD_STILL,
+ IIO_MOD_ROOT_SUM_SQUARED_X_Y_Z,
+};
+
+enum iio_event_type {
+ IIO_EV_TYPE_THRESH,
+ IIO_EV_TYPE_MAG,
+ IIO_EV_TYPE_ROC,
+ IIO_EV_TYPE_THRESH_ADAPTIVE,
+ IIO_EV_TYPE_MAG_ADAPTIVE,
+ IIO_EV_TYPE_CHANGE,
+};
+
+enum iio_event_direction {
+ IIO_EV_DIR_EITHER,
+ IIO_EV_DIR_RISING,
+ IIO_EV_DIR_FALLING,
+ IIO_EV_DIR_NONE,
+};
+
+#endif /* _UAPI_IIO_TYPES_H_ */
+
#define KEY_NUMERIC_9 0x209
#define KEY_NUMERIC_STAR 0x20a
#define KEY_NUMERIC_POUND 0x20b
+#define KEY_NUMERIC_A 0x20c /* Phone key A - HUT Telephony 0xb9 */
+#define KEY_NUMERIC_B 0x20d
+#define KEY_NUMERIC_C 0x20e
+#define KEY_NUMERIC_D 0x20f
#define KEY_CAMERA_FOCUS 0x210
#define KEY_WPS_BUTTON 0x211 /* WiFi Protected Setup key */
#define KVM_PIT_SPEAKER_DUMMY 1
+struct kvm_s390_skeys {
+ __u64 start_gfn;
+ __u64 count;
+ __u64 skeydata_addr;
+ __u32 flags;
+ __u32 reserved[9];
+};
+#define KVM_S390_GET_SKEYS_NONE 1
+#define KVM_S390_SKEYS_MAX 1048576
+
#define KVM_EXIT_UNKNOWN 0
#define KVM_EXIT_EXCEPTION 1
#define KVM_EXIT_IO 2
#define KVM_EXIT_S390_TSCH 22
#define KVM_EXIT_EPR 23
#define KVM_EXIT_SYSTEM_EVENT 24
+#define KVM_EXIT_S390_STSI 25
/* For KVM_EXIT_INTERNAL_ERROR */
/* Emulate instruction failed. */
__u32 type;
__u64 flags;
} system_event;
+ /* KVM_EXIT_S390_STSI */
+ struct {
+ __u64 addr;
+ __u8 ar;
+ __u8 reserved;
+ __u8 fc;
+ __u8 sel1;
+ __u16 sel2;
+ } s390_stsi;
/* Fix the size of the union. */
char padding[256];
};
__u64 kvm_dirty_regs;
union {
struct kvm_sync_regs regs;
- char padding[1024];
+ char padding[2048];
} s;
};
__u8 pad[5];
};
+/* for KVM_S390_MEM_OP */
+struct kvm_s390_mem_op {
+ /* in */
+ __u64 gaddr; /* the guest address */
+ __u64 flags; /* flags */
+ __u32 size; /* amount of bytes */
+ __u32 op; /* type of operation */
+ __u64 buf; /* buffer in userspace */
+ __u8 ar; /* the access register number */
+ __u8 reserved[31]; /* should be set to 0 */
+};
+/* types for kvm_s390_mem_op->op */
+#define KVM_S390_MEMOP_LOGICAL_READ 0
+#define KVM_S390_MEMOP_LOGICAL_WRITE 1
+/* flags for kvm_s390_mem_op->flags */
+#define KVM_S390_MEMOP_F_CHECK_ONLY (1ULL << 0)
+#define KVM_S390_MEMOP_F_INJECT_EXCEPTION (1ULL << 1)
+
/* for KVM_INTERRUPT */
struct kvm_interrupt {
/* in */
} u;
};
+struct kvm_s390_irq_state {
+ __u64 buf;
+ __u32 flags;
+ __u32 len;
+ __u32 reserved[4];
+};
+
/* for KVM_SET_GUEST_DEBUG */
#define KVM_GUESTDBG_ENABLE 0x00000001
#define KVM_CAP_PPC_ENABLE_HCALL 104
#define KVM_CAP_CHECK_EXTENSION_VM 105
#define KVM_CAP_S390_USER_SIGP 106
+#define KVM_CAP_S390_VECTOR_REGISTERS 107
+#define KVM_CAP_S390_MEM_OP 108
+#define KVM_CAP_S390_USER_STSI 109
+#define KVM_CAP_S390_SKEYS 110
+#define KVM_CAP_MIPS_FPU 111
+#define KVM_CAP_MIPS_MSA 112
+#define KVM_CAP_S390_INJECT_IRQ 113
+#define KVM_CAP_S390_IRQ_STATE 114
#ifdef KVM_CAP_IRQ_ROUTING
#define KVM_ARM_VCPU_INIT _IOW(KVMIO, 0xae, struct kvm_vcpu_init)
#define KVM_ARM_PREFERRED_TARGET _IOR(KVMIO, 0xaf, struct kvm_vcpu_init)
#define KVM_GET_REG_LIST _IOWR(KVMIO, 0xb0, struct kvm_reg_list)
+/* Available with KVM_CAP_S390_MEM_OP */
+#define KVM_S390_MEM_OP _IOW(KVMIO, 0xb1, struct kvm_s390_mem_op)
+/* Available with KVM_CAP_S390_SKEYS */
+#define KVM_S390_GET_SKEYS _IOW(KVMIO, 0xb2, struct kvm_s390_skeys)
+#define KVM_S390_SET_SKEYS _IOW(KVMIO, 0xb3, struct kvm_s390_skeys)
+/* Available with KVM_CAP_S390_INJECT_IRQ */
+#define KVM_S390_IRQ _IOW(KVMIO, 0xb4, struct kvm_s390_irq)
+/* Available with KVM_CAP_S390_IRQ_STATE */
+#define KVM_S390_SET_IRQ_STATE _IOW(KVMIO, 0xb5, struct kvm_s390_irq_state)
+#define KVM_S390_GET_IRQ_STATE _IOW(KVMIO, 0xb6, struct kvm_s390_irq_state)
#define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0)
#define KVM_DEV_ASSIGN_PCI_2_3 (1 << 1)
#define STACK_END_MAGIC 0x57AC6E9D
+#define TRACEFS_MAGIC 0x74726163
+
#define V9FS_MAGIC 0x01021997
#define BDEVFS_MAGIC 0x62646576
* The branch types can be combined, however BRANCH_ANY covers all types
* of branches and therefore it supersedes all the other types.
*/
+enum perf_branch_sample_type_shift {
+ PERF_SAMPLE_BRANCH_USER_SHIFT = 0, /* user branches */
+ PERF_SAMPLE_BRANCH_KERNEL_SHIFT = 1, /* kernel branches */
+ PERF_SAMPLE_BRANCH_HV_SHIFT = 2, /* hypervisor branches */
+
+ PERF_SAMPLE_BRANCH_ANY_SHIFT = 3, /* any branch types */
+ PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT = 4, /* any call branch */
+ PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT = 5, /* any return branch */
+ PERF_SAMPLE_BRANCH_IND_CALL_SHIFT = 6, /* indirect calls */
+ PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT = 7, /* transaction aborts */
+ PERF_SAMPLE_BRANCH_IN_TX_SHIFT = 8, /* in transaction */
+ PERF_SAMPLE_BRANCH_NO_TX_SHIFT = 9, /* not in transaction */
+ PERF_SAMPLE_BRANCH_COND_SHIFT = 10, /* conditional branches */
+
+ PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT = 11, /* call/ret stack */
+
+ PERF_SAMPLE_BRANCH_MAX_SHIFT /* non-ABI */
+};
+
enum perf_branch_sample_type {
- PERF_SAMPLE_BRANCH_USER = 1U << 0, /* user branches */
- PERF_SAMPLE_BRANCH_KERNEL = 1U << 1, /* kernel branches */
- PERF_SAMPLE_BRANCH_HV = 1U << 2, /* hypervisor branches */
-
- PERF_SAMPLE_BRANCH_ANY = 1U << 3, /* any branch types */
- PERF_SAMPLE_BRANCH_ANY_CALL = 1U << 4, /* any call branch */
- PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << 5, /* any return branch */
- PERF_SAMPLE_BRANCH_IND_CALL = 1U << 6, /* indirect calls */
- PERF_SAMPLE_BRANCH_ABORT_TX = 1U << 7, /* transaction aborts */
- PERF_SAMPLE_BRANCH_IN_TX = 1U << 8, /* in transaction */
- PERF_SAMPLE_BRANCH_NO_TX = 1U << 9, /* not in transaction */
- PERF_SAMPLE_BRANCH_COND = 1U << 10, /* conditional branches */
-
- PERF_SAMPLE_BRANCH_MAX = 1U << 11, /* non-ABI */
+ PERF_SAMPLE_BRANCH_USER = 1U << PERF_SAMPLE_BRANCH_USER_SHIFT,
+ PERF_SAMPLE_BRANCH_KERNEL = 1U << PERF_SAMPLE_BRANCH_KERNEL_SHIFT,
+ PERF_SAMPLE_BRANCH_HV = 1U << PERF_SAMPLE_BRANCH_HV_SHIFT,
+
+ PERF_SAMPLE_BRANCH_ANY = 1U << PERF_SAMPLE_BRANCH_ANY_SHIFT,
+ PERF_SAMPLE_BRANCH_ANY_CALL = 1U << PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT,
+ PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT,
+ PERF_SAMPLE_BRANCH_IND_CALL = 1U << PERF_SAMPLE_BRANCH_IND_CALL_SHIFT,
+ PERF_SAMPLE_BRANCH_ABORT_TX = 1U << PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT,
+ PERF_SAMPLE_BRANCH_IN_TX = 1U << PERF_SAMPLE_BRANCH_IN_TX_SHIFT,
+ PERF_SAMPLE_BRANCH_NO_TX = 1U << PERF_SAMPLE_BRANCH_NO_TX_SHIFT,
+ PERF_SAMPLE_BRANCH_COND = 1U << PERF_SAMPLE_BRANCH_COND_SHIFT,
+
+ PERF_SAMPLE_BRANCH_CALL_STACK = 1U << PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT,
+
+ PERF_SAMPLE_BRANCH_MAX = 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT,
};
#define PERF_SAMPLE_BRANCH_PLM_ALL \
#define PERF_ATTR_SIZE_VER3 96 /* add: sample_regs_user */
/* add: sample_stack_user */
#define PERF_ATTR_SIZE_VER4 104 /* add: sample_regs_intr */
+#define PERF_ATTR_SIZE_VER5 112 /* add: aux_watermark */
/*
* Hardware event_id to monitor via a performance monitoring event:
exclude_callchain_user : 1, /* exclude user callchains */
mmap2 : 1, /* include mmap with inode data */
comm_exec : 1, /* flag comm events that are due to an exec */
- __reserved_1 : 39;
+ use_clockid : 1, /* use @clockid for time fields */
+ __reserved_1 : 38;
union {
__u32 wakeup_events; /* wakeup every n events */
*/
__u32 sample_stack_user;
- /* Align to u64. */
- __u32 __reserved_2;
+ __s32 clockid;
/*
* Defines set of regs to dump for each sample
* state captured on:
* See asm/perf_regs.h for details.
*/
__u64 sample_regs_intr;
+
+ /*
+ * Wakeup watermark for AUX area
+ */
+ __u32 aux_watermark;
+ __u32 __reserved_2; /* align to __u64 */
};
#define perf_flags(attr) (*(&(attr)->read_format + 1))
#define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5)
#define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *)
#define PERF_EVENT_IOC_ID _IOR('$', 7, __u64 *)
+#define PERF_EVENT_IOC_SET_BPF _IOW('$', 8, __u32)
enum perf_event_ioc_flags {
PERF_IOC_FLAG_GROUP = 1U << 0,
* In this case the kernel will not over-write unread data.
*
* See perf_output_put_handle() for the data ordering.
+ *
+ * data_{offset,size} indicate the location and size of the perf record
+ * buffer within the mmapped area.
*/
__u64 data_head; /* head in the data section */
__u64 data_tail; /* user-space written tail */
+ __u64 data_offset; /* where the buffer starts */
+ __u64 data_size; /* data buffer size */
+
+ /*
+ * AUX area is defined by aux_{offset,size} fields that should be set
+ * by the userspace, so that
+ *
+ * aux_offset >= data_offset + data_size
+ *
+ * prior to mmap()ing it. Size of the mmap()ed area should be aux_size.
+ *
+ * Ring buffer pointers aux_{head,tail} have the same semantics as
+ * data_{head,tail} and same ordering rules apply.
+ */
+ __u64 aux_head;
+ __u64 aux_tail;
+ __u64 aux_offset;
+ __u64 aux_size;
};
#define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0)
*/
PERF_RECORD_MMAP2 = 10,
+ /*
+ * Records that new data landed in the AUX buffer part.
+ *
+ * struct {
+ * struct perf_event_header header;
+ *
+ * u64 aux_offset;
+ * u64 aux_size;
+ * u64 flags;
+ * struct sample_id sample_id;
+ * };
+ */
+ PERF_RECORD_AUX = 11,
+
+ /*
+ * Indicates that instruction trace has started
+ *
+ * struct {
+ * struct perf_event_header header;
+ * u32 pid;
+ * u32 tid;
+ * };
+ */
+ PERF_RECORD_ITRACE_START = 12,
+
PERF_RECORD_MAX, /* non-ABI */
};
PERF_CONTEXT_MAX = (__u64)-4095,
};
+/**
+ * PERF_RECORD_AUX::flags bits
+ */
+#define PERF_AUX_FLAG_TRUNCATED 0x01 /* record was truncated to fit */
+#define PERF_AUX_FLAG_OVERWRITE 0x02 /* snapshot from overwrite mode */
+
#define PERF_FLAG_FD_NO_GROUP (1UL << 0)
#define PERF_FLAG_FD_OUTPUT (1UL << 1)
#define PERF_FLAG_PID_CGROUP (1UL << 2) /* pid=cgroup id, per-cpu mode only */
__u32 flags;
#define VFIO_DEVICE_FLAGS_RESET (1 << 0) /* Device supports reset */
#define VFIO_DEVICE_FLAGS_PCI (1 << 1) /* vfio-pci device */
+#define VFIO_DEVICE_FLAGS_PLATFORM (1 << 2) /* vfio-platform device */
+#define VFIO_DEVICE_FLAGS_AMBA (1 << 3) /* vfio-amba device */
__u32 num_regions; /* Max region index + 1 */
__u32 num_irqs; /* Max IRQ index + 1 */
};
endchoice
+config RCU_EXPEDITE_BOOT
+ bool
+ default n
+ help
+ This option enables expedited grace periods at boot time,
+ as if rcu_expedite_gp() had been invoked early in boot.
+ The corresponding rcu_unexpedite_gp() is invoked from
+ rcu_end_inkernel_boot(), which is intended to be invoked
+ at the end of the kernel-only boot sequence, just before
+ init is exec'ed.
+
+ Accept the default if unsure.
+
endmenu # "RCU Subsystem"
config BUILD_BIN2C
# syscall, maps, verifier
config BPF_SYSCALL
- bool "Enable bpf() system call" if EXPERT
+ bool "Enable bpf() system call"
select ANON_INODES
select BPF
default n
#include <linux/list.h>
#include <linux/integrity.h>
#include <linux/proc_ns.h>
+#include <linux/io.h>
#include <asm/io.h>
#include <asm/bugs.h>
* rely on the BIOS and skip the reset operation.
*
* This is useful if kernel is booting in an unreliable environment.
- * For ex. kdump situaiton where previous kernel has crashed, BIOS has been
+ * For ex. kdump situation where previous kernel has crashed, BIOS has been
* skipped and devices will be in unknown state.
*/
unsigned int reset_devices;
int pid;
rcu_scheduler_starting();
+ smpboot_thread_init();
/*
* We need to spawn init first so that it obtains pid 1, however
* the init task will end up wanting to create kthreads, which, if
percpu_init_late();
pgtable_init();
vmalloc_init();
+ ioremap_huge_init();
}
asmlinkage __visible void __init start_kernel(void)
page_writeback_init();
proc_root_init();
nsfs_init();
- cgroup_init();
cpuset_init();
+ cgroup_init();
taskstats_init_early();
delayacct_init();
#include <linux/file.h>
#include <linux/license.h>
#include <linux/filter.h>
+#include <linux/version.h>
static LIST_HEAD(bpf_map_types);
}
/* last field in 'union bpf_attr' used by this command */
-#define BPF_PROG_LOAD_LAST_FIELD log_buf
+#define BPF_PROG_LOAD_LAST_FIELD kern_version
static int bpf_prog_load(union bpf_attr *attr)
{
if (attr->insn_cnt >= BPF_MAXINSNS)
return -EINVAL;
+ if (type == BPF_PROG_TYPE_KPROBE &&
+ attr->kern_version != LINUX_VERSION_CODE)
+ return -EINVAL;
+
/* plain bpf_prog allocation */
prog = bpf_prog_alloc(bpf_prog_size(attr->insn_cnt), GFP_USER);
if (!prog)
static void pidlist_free(void *p)
{
- if (is_vmalloc_addr(p))
- vfree(p);
- else
- kfree(p);
+ kvfree(p);
}
/*
WARN_ON(cgroup_add_dfl_cftypes(ss, ss->dfl_cftypes));
WARN_ON(cgroup_add_legacy_cftypes(ss, ss->legacy_cftypes));
}
+
+ if (ss->bind)
+ ss->bind(init_css_set.subsys[ssid]);
}
cgroup_kobj = kobject_create_and_add("cgroup", fs_kobj);
}
/**
- * context_tracking_user_enter - Inform the context tracking that the CPU is going to
- * enter userspace mode.
+ * context_tracking_enter - Inform the context tracking that the CPU is going
+ * enter user or guest space mode.
*
* This function must be called right before we switch from the kernel
- * to userspace, when it's guaranteed the remaining kernel instructions
- * to execute won't use any RCU read side critical section because this
- * function sets RCU in extended quiescent state.
+ * to user or guest space, when it's guaranteed the remaining kernel
+ * instructions to execute won't use any RCU read side critical section
+ * because this function sets RCU in extended quiescent state.
*/
-void context_tracking_user_enter(void)
+void context_tracking_enter(enum ctx_state state)
{
unsigned long flags;
WARN_ON_ONCE(!current->mm);
local_irq_save(flags);
- if ( __this_cpu_read(context_tracking.state) != IN_USER) {
+ if ( __this_cpu_read(context_tracking.state) != state) {
if (__this_cpu_read(context_tracking.active)) {
- trace_user_enter(0);
/*
* At this stage, only low level arch entry code remains and
* then we'll run in userspace. We can assume there won't be
* user_exit() or rcu_irq_enter(). Let's remove RCU's dependency
* on the tick.
*/
- vtime_user_enter(current);
+ if (state == CONTEXT_USER) {
+ trace_user_enter(0);
+ vtime_user_enter(current);
+ }
rcu_user_enter();
}
/*
* OTOH we can spare the calls to vtime and RCU when context_tracking.active
* is false because we know that CPU is not tickless.
*/
- __this_cpu_write(context_tracking.state, IN_USER);
+ __this_cpu_write(context_tracking.state, state);
}
local_irq_restore(flags);
}
+NOKPROBE_SYMBOL(context_tracking_enter);
+EXPORT_SYMBOL_GPL(context_tracking_enter);
+
+void context_tracking_user_enter(void)
+{
+ context_tracking_enter(CONTEXT_USER);
+}
NOKPROBE_SYMBOL(context_tracking_user_enter);
/**
- * context_tracking_user_exit - Inform the context tracking that the CPU is
- * exiting userspace mode and entering the kernel.
+ * context_tracking_exit - Inform the context tracking that the CPU is
+ * exiting user or guest mode and entering the kernel.
*
- * This function must be called after we entered the kernel from userspace
- * before any use of RCU read side critical section. This potentially include
- * any high level kernel code like syscalls, exceptions, signal handling, etc...
+ * This function must be called after we entered the kernel from user or
+ * guest space before any use of RCU read side critical section. This
+ * potentially include any high level kernel code like syscalls, exceptions,
+ * signal handling, etc...
*
* This call supports re-entrancy. This way it can be called from any exception
* handler without needing to know if we came from userspace or not.
*/
-void context_tracking_user_exit(void)
+void context_tracking_exit(enum ctx_state state)
{
unsigned long flags;
return;
local_irq_save(flags);
- if (__this_cpu_read(context_tracking.state) == IN_USER) {
+ if (__this_cpu_read(context_tracking.state) == state) {
if (__this_cpu_read(context_tracking.active)) {
/*
* We are going to run code that may use RCU. Inform
* RCU core about that (ie: we may need the tick again).
*/
rcu_user_exit();
- vtime_user_exit(current);
- trace_user_exit(0);
+ if (state == CONTEXT_USER) {
+ vtime_user_exit(current);
+ trace_user_exit(0);
+ }
}
- __this_cpu_write(context_tracking.state, IN_KERNEL);
+ __this_cpu_write(context_tracking.state, CONTEXT_KERNEL);
}
local_irq_restore(flags);
}
+NOKPROBE_SYMBOL(context_tracking_exit);
+EXPORT_SYMBOL_GPL(context_tracking_exit);
+
+void context_tracking_user_exit(void)
+{
+ context_tracking_exit(CONTEXT_USER);
+}
NOKPROBE_SYMBOL(context_tracking_user_exit);
/**
#include <linux/gfp.h>
#include <linux/suspend.h>
#include <linux/lockdep.h>
+#include <linux/tick.h>
#include <trace/events/power.h>
#include "smpboot.h"
return err;
cpu_notify(CPU_DYING | param->mod, param->hcpu);
+ /* Give up timekeeping duties */
+ tick_handover_do_timer();
/* Park the stopper thread */
kthread_park(current);
return 0;
*
* Wait for the stop thread to go away.
*/
- while (!idle_cpu(cpu))
+ while (!per_cpu(cpu_dead_idle, cpu))
cpu_relax();
+ smp_mb(); /* Read from cpu_dead_idle before __cpu_die(). */
+ per_cpu(cpu_dead_idle, cpu) = false;
+ hotplug_cpu__broadcast_tick_pull(cpu);
/* This actually kills the CPU. */
__cpu_die(cpu);
/* CPU is completely dead: tell everyone. Too late to complain. */
+ tick_cleanup_dead_cpu(cpu);
cpu_notify_nofail(CPU_DEAD | mod, hcpu);
check_for_tasks(cpu);
EXPORT_SYMBOL(cpu_down);
#endif /*CONFIG_HOTPLUG_CPU*/
+/*
+ * Unpark per-CPU smpboot kthreads at CPU-online time.
+ */
+static int smpboot_thread_call(struct notifier_block *nfb,
+ unsigned long action, void *hcpu)
+{
+ int cpu = (long)hcpu;
+
+ switch (action & ~CPU_TASKS_FROZEN) {
+
+ case CPU_ONLINE:
+ smpboot_unpark_threads(cpu);
+ break;
+
+ default:
+ break;
+ }
+
+ return NOTIFY_OK;
+}
+
+static struct notifier_block smpboot_thread_notifier = {
+ .notifier_call = smpboot_thread_call,
+ .priority = CPU_PRI_SMPBOOT,
+};
+
+void __cpuinit smpboot_thread_init(void)
+{
+ register_cpu_notifier(&smpboot_thread_notifier);
+}
+
/* Requires cpu_add_remove_lock to be held */
static int _cpu_up(unsigned int cpu, int tasks_frozen)
{
goto out_notify;
BUG_ON(!cpu_online(cpu));
- /* Wake the per cpu threads */
- smpboot_unpark_threads(cpu);
-
/* Now call notifier in preparation. */
cpu_notify(CPU_ONLINE | mod, hcpu);
int csn; /* how many cpuset ptrs in csa so far */
int i, j, k; /* indices for partition finding loops */
cpumask_var_t *doms; /* resulting partition; i.e. sched domains */
+ cpumask_var_t non_isolated_cpus; /* load balanced CPUs */
struct sched_domain_attr *dattr; /* attributes for custom domains */
int ndoms = 0; /* number of sched domains in result */
int nslot; /* next empty doms[] struct cpumask slot */
dattr = NULL;
csa = NULL;
+ if (!alloc_cpumask_var(&non_isolated_cpus, GFP_KERNEL))
+ goto done;
+ cpumask_andnot(non_isolated_cpus, cpu_possible_mask, cpu_isolated_map);
+
/* Special case for the 99% of systems with one, full, sched domain */
if (is_sched_load_balance(&top_cpuset)) {
ndoms = 1;
*dattr = SD_ATTR_INIT;
update_domain_attr_tree(dattr, &top_cpuset);
}
- cpumask_copy(doms[0], top_cpuset.effective_cpus);
+ cpumask_and(doms[0], top_cpuset.effective_cpus,
+ non_isolated_cpus);
goto done;
}
* the corresponding sched domain.
*/
if (!cpumask_empty(cp->cpus_allowed) &&
- !is_sched_load_balance(cp))
+ !(is_sched_load_balance(cp) &&
+ cpumask_intersects(cp->cpus_allowed, non_isolated_cpus)))
continue;
if (is_sched_load_balance(cp))
if (apn == b->pn) {
cpumask_or(dp, dp, b->effective_cpus);
+ cpumask_and(dp, dp, non_isolated_cpus);
if (dattr)
update_domain_attr_tree(dattr + nslot, b);
BUG_ON(nslot != ndoms);
done:
+ free_cpumask_var(non_isolated_cpus);
kfree(csa);
/*
* @node: is this an allowed node?
* @gfp_mask: memory allocation flags
*
- * If we're in interrupt, yes, we can always allocate. If __GFP_THISNODE is
- * set, yes, we can always allocate. If node is in our task's mems_allowed,
- * yes. If it's not a __GFP_HARDWALL request and this node is in the nearest
- * hardwalled cpuset ancestor to this task's cpuset, yes. If the task has been
- * OOM killed and has access to memory reserves as specified by the TIF_MEMDIE
- * flag, yes.
+ * If we're in interrupt, yes, we can always allocate. If @node is set in
+ * current's mems_allowed, yes. If it's not a __GFP_HARDWALL request and this
+ * node is set in the nearest hardwalled cpuset ancestor to current's cpuset,
+ * yes. If current has access to memory reserves due to TIF_MEMDIE, yes.
* Otherwise, no.
*
- * The __GFP_THISNODE placement logic is really handled elsewhere,
- * by forcibly using a zonelist starting at a specified node, and by
- * (in get_page_from_freelist()) refusing to consider the zones for
- * any node on the zonelist except the first. By the time any such
- * calls get to this routine, we should just shut up and say 'yes'.
- *
* GFP_USER allocations are marked with the __GFP_HARDWALL bit,
* and do not allow allocations outside the current tasks cpuset
* unless the task has been OOM killed as is marked TIF_MEMDIE.
int allowed; /* is allocation in zone z allowed? */
unsigned long flags;
- if (in_interrupt() || (gfp_mask & __GFP_THISNODE))
+ if (in_interrupt())
return 1;
if (node_isset(node, current->mems_allowed))
return 1;
#include <linux/syscalls.h>
#include <linux/anon_inodes.h>
#include <linux/kernel_stat.h>
+#include <linux/cgroup.h>
#include <linux/perf_event.h>
#include <linux/ftrace_event.h>
#include <linux/hw_breakpoint.h>
#include <linux/mm_types.h>
-#include <linux/cgroup.h>
#include <linux/module.h>
#include <linux/mman.h>
#include <linux/compat.h>
+#include <linux/bpf.h>
+#include <linux/filter.h>
#include "internal.h"
*/
struct static_key_deferred perf_sched_events __read_mostly;
static DEFINE_PER_CPU(atomic_t, perf_cgroup_events);
-static DEFINE_PER_CPU(atomic_t, perf_branch_stack_events);
+static DEFINE_PER_CPU(int, perf_sched_cb_usages);
static atomic_t nr_mmap_events __read_mostly;
static atomic_t nr_comm_events __read_mostly;
return local_clock();
}
+static inline u64 perf_event_clock(struct perf_event *event)
+{
+ return event->clock();
+}
+
static inline struct perf_cpu_context *
__get_cpu_context(struct perf_event_context *ctx)
{
#ifdef CONFIG_CGROUP_PERF
-/*
- * perf_cgroup_info keeps track of time_enabled for a cgroup.
- * This is a per-cpu dynamically allocated data structure.
- */
-struct perf_cgroup_info {
- u64 time;
- u64 timestamp;
-};
-
-struct perf_cgroup {
- struct cgroup_subsys_state css;
- struct perf_cgroup_info __percpu *info;
-};
-
-/*
- * Must ensure cgroup is pinned (css_get) before calling
- * this function. In other words, we cannot call this function
- * if there is no cgroup event for the current CPU context.
- */
-static inline struct perf_cgroup *
-perf_cgroup_from_task(struct task_struct *task)
-{
- return container_of(task_css(task, perf_event_cgrp_id),
- struct perf_cgroup, css);
-}
-
static inline bool
perf_cgroup_match(struct perf_event *event)
{
WARN_ON(!atomic_inc_not_zero(&ctx->refcount));
}
+static void free_ctx(struct rcu_head *head)
+{
+ struct perf_event_context *ctx;
+
+ ctx = container_of(head, struct perf_event_context, rcu_head);
+ kfree(ctx->task_ctx_data);
+ kfree(ctx);
+}
+
static void put_ctx(struct perf_event_context *ctx)
{
if (atomic_dec_and_test(&ctx->refcount)) {
put_ctx(ctx->parent_ctx);
if (ctx->task)
put_task_struct(ctx->task);
- kfree_rcu(ctx, rcu_head);
+ call_rcu(&ctx->rcu_head, free_ctx);
}
}
if (is_cgroup_event(event))
ctx->nr_cgroups++;
- if (has_branch_stack(event))
- ctx->nr_branch_stack++;
-
list_add_rcu(&event->event_entry, &ctx->event_list);
ctx->nr_events++;
if (event->attr.inherit_stat)
cpuctx->cgrp = NULL;
}
- if (has_branch_stack(event))
- ctx->nr_branch_stack--;
-
ctx->nr_events--;
if (event->attr.inherit_stat)
ctx->nr_stat--;
#define MAX_INTERRUPTS (~0ULL)
static void perf_log_throttle(struct perf_event *event, int enable);
+static void perf_log_itrace_start(struct perf_event *event);
static int
event_sched_in(struct perf_event *event,
perf_pmu_disable(event->pmu);
+ event->tstamp_running += tstamp - event->tstamp_stopped;
+
+ perf_set_shadow_time(event, ctx, tstamp);
+
+ perf_log_itrace_start(event);
+
if (event->pmu->add(event, PERF_EF_START)) {
event->state = PERF_EVENT_STATE_INACTIVE;
event->oncpu = -1;
goto out;
}
- event->tstamp_running += tstamp - event->tstamp_stopped;
-
- perf_set_shadow_time(event, ctx, tstamp);
-
if (!is_software_event(event))
cpuctx->active_oncpu++;
if (!ctx->nr_active++)
next->perf_event_ctxp[ctxn] = ctx;
ctx->task = next;
next_ctx->task = task;
+
+ swap(ctx->task_ctx_data, next_ctx->task_ctx_data);
+
do_switch = 0;
perf_event_sync_stat(ctx, next_ctx);
}
}
+void perf_sched_cb_dec(struct pmu *pmu)
+{
+ this_cpu_dec(perf_sched_cb_usages);
+}
+
+void perf_sched_cb_inc(struct pmu *pmu)
+{
+ this_cpu_inc(perf_sched_cb_usages);
+}
+
+/*
+ * This function provides the context switch callback to the lower code
+ * layer. It is invoked ONLY when the context switch callback is enabled.
+ */
+static void perf_pmu_sched_task(struct task_struct *prev,
+ struct task_struct *next,
+ bool sched_in)
+{
+ struct perf_cpu_context *cpuctx;
+ struct pmu *pmu;
+ unsigned long flags;
+
+ if (prev == next)
+ return;
+
+ local_irq_save(flags);
+
+ rcu_read_lock();
+
+ list_for_each_entry_rcu(pmu, &pmus, entry) {
+ if (pmu->sched_task) {
+ cpuctx = this_cpu_ptr(pmu->pmu_cpu_context);
+
+ perf_ctx_lock(cpuctx, cpuctx->task_ctx);
+
+ perf_pmu_disable(pmu);
+
+ pmu->sched_task(cpuctx->task_ctx, sched_in);
+
+ perf_pmu_enable(pmu);
+
+ perf_ctx_unlock(cpuctx, cpuctx->task_ctx);
+ }
+ }
+
+ rcu_read_unlock();
+
+ local_irq_restore(flags);
+}
+
#define for_each_task_context_nr(ctxn) \
for ((ctxn) = 0; (ctxn) < perf_nr_task_contexts; (ctxn)++)
{
int ctxn;
+ if (__this_cpu_read(perf_sched_cb_usages))
+ perf_pmu_sched_task(task, next, false);
+
for_each_task_context_nr(ctxn)
perf_event_context_sched_out(task, ctxn, next);
perf_ctx_unlock(cpuctx, ctx);
}
-/*
- * When sampling the branck stack in system-wide, it may be necessary
- * to flush the stack on context switch. This happens when the branch
- * stack does not tag its entries with the pid of the current task.
- * Otherwise it becomes impossible to associate a branch entry with a
- * task. This ambiguity is more likely to appear when the branch stack
- * supports priv level filtering and the user sets it to monitor only
- * at the user level (which could be a useful measurement in system-wide
- * mode). In that case, the risk is high of having a branch stack with
- * branch from multiple tasks. Flushing may mean dropping the existing
- * entries or stashing them somewhere in the PMU specific code layer.
- *
- * This function provides the context switch callback to the lower code
- * layer. It is invoked ONLY when there is at least one system-wide context
- * with at least one active event using taken branch sampling.
- */
-static void perf_branch_stack_sched_in(struct task_struct *prev,
- struct task_struct *task)
-{
- struct perf_cpu_context *cpuctx;
- struct pmu *pmu;
- unsigned long flags;
-
- /* no need to flush branch stack if not changing task */
- if (prev == task)
- return;
-
- local_irq_save(flags);
-
- rcu_read_lock();
-
- list_for_each_entry_rcu(pmu, &pmus, entry) {
- cpuctx = this_cpu_ptr(pmu->pmu_cpu_context);
-
- /*
- * check if the context has at least one
- * event using PERF_SAMPLE_BRANCH_STACK
- */
- if (cpuctx->ctx.nr_branch_stack > 0
- && pmu->flush_branch_stack) {
-
- perf_ctx_lock(cpuctx, cpuctx->task_ctx);
-
- perf_pmu_disable(pmu);
-
- pmu->flush_branch_stack();
-
- perf_pmu_enable(pmu);
-
- perf_ctx_unlock(cpuctx, cpuctx->task_ctx);
- }
- }
-
- rcu_read_unlock();
-
- local_irq_restore(flags);
-}
-
/*
* Called from scheduler to add the events of the current task
* with interrupts disabled.
if (atomic_read(this_cpu_ptr(&perf_cgroup_events)))
perf_cgroup_sched_in(prev, task);
- /* check for system-wide branch_stack events */
- if (atomic_read(this_cpu_ptr(&perf_branch_stack_events)))
- perf_branch_stack_sched_in(prev, task);
+ if (__this_cpu_read(perf_sched_cb_usages))
+ perf_pmu_sched_task(prev, task, true);
}
static u64 perf_calculate_period(struct perf_event *event, u64 nsec, u64 count)
static inline u64 perf_event_count(struct perf_event *event)
{
- return local64_read(&event->count) + atomic64_read(&event->child_count);
+ if (event->pmu->count)
+ return event->pmu->count(event);
+
+ return __perf_event_count(event);
}
static u64 perf_event_read(struct perf_event *event)
* Returns a matching context with refcount and pincount.
*/
static struct perf_event_context *
-find_get_context(struct pmu *pmu, struct task_struct *task, int cpu)
+find_get_context(struct pmu *pmu, struct task_struct *task,
+ struct perf_event *event)
{
struct perf_event_context *ctx, *clone_ctx = NULL;
struct perf_cpu_context *cpuctx;
+ void *task_ctx_data = NULL;
unsigned long flags;
int ctxn, err;
+ int cpu = event->cpu;
if (!task) {
/* Must be root to operate on a CPU event: */
if (ctxn < 0)
goto errout;
+ if (event->attach_state & PERF_ATTACH_TASK_DATA) {
+ task_ctx_data = kzalloc(pmu->task_ctx_size, GFP_KERNEL);
+ if (!task_ctx_data) {
+ err = -ENOMEM;
+ goto errout;
+ }
+ }
+
retry:
ctx = perf_lock_task_context(task, ctxn, &flags);
if (ctx) {
clone_ctx = unclone_ctx(ctx);
++ctx->pin_count;
+
+ if (task_ctx_data && !ctx->task_ctx_data) {
+ ctx->task_ctx_data = task_ctx_data;
+ task_ctx_data = NULL;
+ }
raw_spin_unlock_irqrestore(&ctx->lock, flags);
if (clone_ctx)
if (!ctx)
goto errout;
+ if (task_ctx_data) {
+ ctx->task_ctx_data = task_ctx_data;
+ task_ctx_data = NULL;
+ }
+
err = 0;
mutex_lock(&task->perf_event_mutex);
/*
}
}
+ kfree(task_ctx_data);
return ctx;
errout:
+ kfree(task_ctx_data);
return ERR_PTR(err);
}
static void perf_event_free_filter(struct perf_event *event);
+static void perf_event_free_bpf_prog(struct perf_event *event);
static void free_event_rcu(struct rcu_head *head)
{
if (event->ns)
put_pid_ns(event->ns);
perf_event_free_filter(event);
+ perf_event_free_bpf_prog(event);
kfree(event);
}
-static void ring_buffer_put(struct ring_buffer *rb);
static void ring_buffer_attach(struct perf_event *event,
struct ring_buffer *rb);
if (event->parent)
return;
- if (has_branch_stack(event)) {
- if (!(event->attach_state & PERF_ATTACH_TASK))
- atomic_dec(&per_cpu(perf_branch_stack_events, cpu));
- }
if (is_cgroup_event(event))
atomic_dec(&per_cpu(perf_cgroup_events, cpu));
}
unaccount_event_cpu(event, event->cpu);
}
+/*
+ * The following implement mutual exclusion of events on "exclusive" pmus
+ * (PERF_PMU_CAP_EXCLUSIVE). Such pmus can only have one event scheduled
+ * at a time, so we disallow creating events that might conflict, namely:
+ *
+ * 1) cpu-wide events in the presence of per-task events,
+ * 2) per-task events in the presence of cpu-wide events,
+ * 3) two matching events on the same context.
+ *
+ * The former two cases are handled in the allocation path (perf_event_alloc(),
+ * __free_event()), the latter -- before the first perf_install_in_context().
+ */
+static int exclusive_event_init(struct perf_event *event)
+{
+ struct pmu *pmu = event->pmu;
+
+ if (!(pmu->capabilities & PERF_PMU_CAP_EXCLUSIVE))
+ return 0;
+
+ /*
+ * Prevent co-existence of per-task and cpu-wide events on the
+ * same exclusive pmu.
+ *
+ * Negative pmu::exclusive_cnt means there are cpu-wide
+ * events on this "exclusive" pmu, positive means there are
+ * per-task events.
+ *
+ * Since this is called in perf_event_alloc() path, event::ctx
+ * doesn't exist yet; it is, however, safe to use PERF_ATTACH_TASK
+ * to mean "per-task event", because unlike other attach states it
+ * never gets cleared.
+ */
+ if (event->attach_state & PERF_ATTACH_TASK) {
+ if (!atomic_inc_unless_negative(&pmu->exclusive_cnt))
+ return -EBUSY;
+ } else {
+ if (!atomic_dec_unless_positive(&pmu->exclusive_cnt))
+ return -EBUSY;
+ }
+
+ return 0;
+}
+
+static void exclusive_event_destroy(struct perf_event *event)
+{
+ struct pmu *pmu = event->pmu;
+
+ if (!(pmu->capabilities & PERF_PMU_CAP_EXCLUSIVE))
+ return;
+
+ /* see comment in exclusive_event_init() */
+ if (event->attach_state & PERF_ATTACH_TASK)
+ atomic_dec(&pmu->exclusive_cnt);
+ else
+ atomic_inc(&pmu->exclusive_cnt);
+}
+
+static bool exclusive_event_match(struct perf_event *e1, struct perf_event *e2)
+{
+ if ((e1->pmu->capabilities & PERF_PMU_CAP_EXCLUSIVE) &&
+ (e1->cpu == e2->cpu ||
+ e1->cpu == -1 ||
+ e2->cpu == -1))
+ return true;
+ return false;
+}
+
+/* Called under the same ctx::mutex as perf_install_in_context() */
+static bool exclusive_event_installable(struct perf_event *event,
+ struct perf_event_context *ctx)
+{
+ struct perf_event *iter_event;
+ struct pmu *pmu = event->pmu;
+
+ if (!(pmu->capabilities & PERF_PMU_CAP_EXCLUSIVE))
+ return true;
+
+ list_for_each_entry(iter_event, &ctx->event_list, event_entry) {
+ if (exclusive_event_match(iter_event, event))
+ return false;
+ }
+
+ return true;
+}
+
static void __free_event(struct perf_event *event)
{
if (!event->parent) {
if (event->ctx)
put_ctx(event->ctx);
- if (event->pmu)
+ if (event->pmu) {
+ exclusive_event_destroy(event);
module_put(event->pmu->module);
+ }
call_rcu(&event->rcu_head, free_event_rcu);
}
static int perf_event_set_output(struct perf_event *event,
struct perf_event *output_event);
static int perf_event_set_filter(struct perf_event *event, void __user *arg);
+static int perf_event_set_bpf_prog(struct perf_event *event, u32 prog_fd);
static long _perf_ioctl(struct perf_event *event, unsigned int cmd, unsigned long arg)
{
case PERF_EVENT_IOC_SET_FILTER:
return perf_event_set_filter(event, (void __user *)arg);
+ case PERF_EVENT_IOC_SET_BPF:
+ return perf_event_set_bpf_prog(event, arg);
+
default:
return -ENOTTY;
}
/* Allow new userspace to detect that bit 0 is deprecated */
userpg->cap_bit0_is_deprecated = 1;
userpg->size = offsetof(struct perf_event_mmap_page, __reserved);
+ userpg->data_offset = PAGE_SIZE;
+ userpg->data_size = perf_data_size(rb);
unlock:
rcu_read_unlock();
rb_free(rb);
}
-static struct ring_buffer *ring_buffer_get(struct perf_event *event)
+struct ring_buffer *ring_buffer_get(struct perf_event *event)
{
struct ring_buffer *rb;
return rb;
}
-static void ring_buffer_put(struct ring_buffer *rb)
+void ring_buffer_put(struct ring_buffer *rb)
{
if (!atomic_dec_and_test(&rb->refcount))
return;
atomic_inc(&event->mmap_count);
atomic_inc(&event->rb->mmap_count);
+ if (vma->vm_pgoff)
+ atomic_inc(&event->rb->aux_mmap_count);
+
if (event->pmu->event_mapped)
event->pmu->event_mapped(event);
}
if (event->pmu->event_unmapped)
event->pmu->event_unmapped(event);
+ /*
+ * rb->aux_mmap_count will always drop before rb->mmap_count and
+ * event->mmap_count, so it is ok to use event->mmap_mutex to
+ * serialize with perf_mmap here.
+ */
+ if (rb_has_aux(rb) && vma->vm_pgoff == rb->aux_pgoff &&
+ atomic_dec_and_mutex_lock(&rb->aux_mmap_count, &event->mmap_mutex)) {
+ atomic_long_sub(rb->aux_nr_pages, &mmap_user->locked_vm);
+ vma->vm_mm->pinned_vm -= rb->aux_mmap_locked;
+
+ rb_free_aux(rb);
+ mutex_unlock(&event->mmap_mutex);
+ }
+
atomic_dec(&rb->mmap_count);
if (!atomic_dec_and_mutex_lock(&event->mmap_count, &event->mmap_mutex))
static const struct vm_operations_struct perf_mmap_vmops = {
.open = perf_mmap_open,
- .close = perf_mmap_close,
+ .close = perf_mmap_close, /* non mergable */
.fault = perf_mmap_fault,
.page_mkwrite = perf_mmap_fault,
};
unsigned long user_locked, user_lock_limit;
struct user_struct *user = current_user();
unsigned long locked, lock_limit;
- struct ring_buffer *rb;
+ struct ring_buffer *rb = NULL;
unsigned long vma_size;
unsigned long nr_pages;
- long user_extra, extra;
+ long user_extra = 0, extra = 0;
int ret = 0, flags = 0;
/*
return -EINVAL;
vma_size = vma->vm_end - vma->vm_start;
- nr_pages = (vma_size / PAGE_SIZE) - 1;
+
+ if (vma->vm_pgoff == 0) {
+ nr_pages = (vma_size / PAGE_SIZE) - 1;
+ } else {
+ /*
+ * AUX area mapping: if rb->aux_nr_pages != 0, it's already
+ * mapped, all subsequent mappings should have the same size
+ * and offset. Must be above the normal perf buffer.
+ */
+ u64 aux_offset, aux_size;
+
+ if (!event->rb)
+ return -EINVAL;
+
+ nr_pages = vma_size / PAGE_SIZE;
+
+ mutex_lock(&event->mmap_mutex);
+ ret = -EINVAL;
+
+ rb = event->rb;
+ if (!rb)
+ goto aux_unlock;
+
+ aux_offset = ACCESS_ONCE(rb->user_page->aux_offset);
+ aux_size = ACCESS_ONCE(rb->user_page->aux_size);
+
+ if (aux_offset < perf_data_size(rb) + PAGE_SIZE)
+ goto aux_unlock;
+
+ if (aux_offset != vma->vm_pgoff << PAGE_SHIFT)
+ goto aux_unlock;
+
+ /* already mapped with a different offset */
+ if (rb_has_aux(rb) && rb->aux_pgoff != vma->vm_pgoff)
+ goto aux_unlock;
+
+ if (aux_size != vma_size || aux_size != nr_pages * PAGE_SIZE)
+ goto aux_unlock;
+
+ /* already mapped with a different size */
+ if (rb_has_aux(rb) && rb->aux_nr_pages != nr_pages)
+ goto aux_unlock;
+
+ if (!is_power_of_2(nr_pages))
+ goto aux_unlock;
+
+ if (!atomic_inc_not_zero(&rb->mmap_count))
+ goto aux_unlock;
+
+ if (rb_has_aux(rb)) {
+ atomic_inc(&rb->aux_mmap_count);
+ ret = 0;
+ goto unlock;
+ }
+
+ atomic_set(&rb->aux_mmap_count, 1);
+ user_extra = nr_pages;
+
+ goto accounting;
+ }
/*
* If we have rb pages ensure they're a power-of-two number, so we
if (vma_size != PAGE_SIZE * (1 + nr_pages))
return -EINVAL;
- if (vma->vm_pgoff != 0)
- return -EINVAL;
-
WARN_ON_ONCE(event->ctx->parent_ctx);
again:
mutex_lock(&event->mmap_mutex);
}
user_extra = nr_pages + 1;
+
+accounting:
user_lock_limit = sysctl_perf_event_mlock >> (PAGE_SHIFT - 10);
/*
user_locked = atomic_long_read(&user->locked_vm) + user_extra;
- extra = 0;
if (user_locked > user_lock_limit)
extra = user_locked - user_lock_limit;
goto unlock;
}
- WARN_ON(event->rb);
+ WARN_ON(!rb && event->rb);
if (vma->vm_flags & VM_WRITE)
flags |= RING_BUFFER_WRITABLE;
- rb = rb_alloc(nr_pages,
- event->attr.watermark ? event->attr.wakeup_watermark : 0,
- event->cpu, flags);
-
if (!rb) {
- ret = -ENOMEM;
- goto unlock;
- }
+ rb = rb_alloc(nr_pages,
+ event->attr.watermark ? event->attr.wakeup_watermark : 0,
+ event->cpu, flags);
- atomic_set(&rb->mmap_count, 1);
- rb->mmap_locked = extra;
- rb->mmap_user = get_current_user();
+ if (!rb) {
+ ret = -ENOMEM;
+ goto unlock;
+ }
- atomic_long_add(user_extra, &user->locked_vm);
- vma->vm_mm->pinned_vm += extra;
+ atomic_set(&rb->mmap_count, 1);
+ rb->mmap_user = get_current_user();
+ rb->mmap_locked = extra;
- ring_buffer_attach(event, rb);
+ ring_buffer_attach(event, rb);
- perf_event_init_userpage(event);
- perf_event_update_userpage(event);
+ perf_event_init_userpage(event);
+ perf_event_update_userpage(event);
+ } else {
+ ret = rb_alloc_aux(rb, event, vma->vm_pgoff, nr_pages,
+ event->attr.aux_watermark, flags);
+ if (!ret)
+ rb->aux_mmap_locked = extra;
+ }
unlock:
- if (!ret)
+ if (!ret) {
+ atomic_long_add(user_extra, &user->locked_vm);
+ vma->vm_mm->pinned_vm += extra;
+
atomic_inc(&event->mmap_count);
+ } else if (rb) {
+ atomic_dec(&rb->mmap_count);
+ }
+aux_unlock:
mutex_unlock(&event->mmap_mutex);
/*
}
if (sample_type & PERF_SAMPLE_TIME)
- data->time = perf_clock();
+ data->time = perf_event_clock(event);
if (sample_type & (PERF_SAMPLE_ID | PERF_SAMPLE_IDENTIFIER))
data->id = primary_event_id(event);
task_event->event_id.tid = perf_event_tid(event, task);
task_event->event_id.ptid = perf_event_tid(event, current);
+ task_event->event_id.time = perf_event_clock(event);
+
perf_output_put(&handle, task_event->event_id);
perf_event__output_id_sample(event, &handle, &sample);
/* .ppid */
/* .tid */
/* .ptid */
- .time = perf_clock(),
+ /* .time */
},
};
perf_event_mmap_event(&mmap_event);
}
+void perf_event_aux_event(struct perf_event *event, unsigned long head,
+ unsigned long size, u64 flags)
+{
+ struct perf_output_handle handle;
+ struct perf_sample_data sample;
+ struct perf_aux_event {
+ struct perf_event_header header;
+ u64 offset;
+ u64 size;
+ u64 flags;
+ } rec = {
+ .header = {
+ .type = PERF_RECORD_AUX,
+ .misc = 0,
+ .size = sizeof(rec),
+ },
+ .offset = head,
+ .size = size,
+ .flags = flags,
+ };
+ int ret;
+
+ perf_event_header__init_id(&rec.header, &sample, event);
+ ret = perf_output_begin(&handle, event, rec.header.size);
+
+ if (ret)
+ return;
+
+ perf_output_put(&handle, rec);
+ perf_event__output_id_sample(event, &handle, &sample);
+
+ perf_output_end(&handle);
+}
+
/*
* IRQ throttle logging
*/
.misc = 0,
.size = sizeof(throttle_event),
},
- .time = perf_clock(),
+ .time = perf_event_clock(event),
.id = primary_event_id(event),
.stream_id = event->id,
};
perf_output_end(&handle);
}
+static void perf_log_itrace_start(struct perf_event *event)
+{
+ struct perf_output_handle handle;
+ struct perf_sample_data sample;
+ struct perf_aux_event {
+ struct perf_event_header header;
+ u32 pid;
+ u32 tid;
+ } rec;
+ int ret;
+
+ if (event->parent)
+ event = event->parent;
+
+ if (!(event->pmu->capabilities & PERF_PMU_CAP_ITRACE) ||
+ event->hw.itrace_started)
+ return;
+
+ event->hw.itrace_started = 1;
+
+ rec.header.type = PERF_RECORD_ITRACE_START;
+ rec.header.misc = 0;
+ rec.header.size = sizeof(rec);
+ rec.pid = perf_event_pid(event, current);
+ rec.tid = perf_event_tid(event, current);
+
+ perf_event_header__init_id(&rec.header, &sample, event);
+ ret = perf_output_begin(&handle, event, rec.header.size);
+
+ if (ret)
+ return;
+
+ perf_output_put(&handle, rec);
+ perf_event__output_id_sample(event, &handle, &sample);
+
+ perf_output_end(&handle);
+}
+
/*
* Generic event overflow handling, sampling.
*/
}
hlist_add_head_rcu(&event->hlist_entry, head);
+ perf_event_update_userpage(event);
return 0;
}
static struct pmu perf_swevent = {
.task_ctx_nr = perf_sw_context,
+ .capabilities = PERF_PMU_CAP_NO_NMI,
+
.event_init = perf_swevent_init,
.add = perf_swevent_add,
.del = perf_swevent_del,
ftrace_profile_free_filter(event);
}
+static int perf_event_set_bpf_prog(struct perf_event *event, u32 prog_fd)
+{
+ struct bpf_prog *prog;
+
+ if (event->attr.type != PERF_TYPE_TRACEPOINT)
+ return -EINVAL;
+
+ if (event->tp_event->prog)
+ return -EEXIST;
+
+ if (!(event->tp_event->flags & TRACE_EVENT_FL_KPROBE))
+ /* bpf programs can only be attached to kprobes */
+ return -EINVAL;
+
+ prog = bpf_prog_get(prog_fd);
+ if (IS_ERR(prog))
+ return PTR_ERR(prog);
+
+ if (prog->aux->prog_type != BPF_PROG_TYPE_KPROBE) {
+ /* valid fd, but invalid bpf program type */
+ bpf_prog_put(prog);
+ return -EINVAL;
+ }
+
+ event->tp_event->prog = prog;
+
+ return 0;
+}
+
+static void perf_event_free_bpf_prog(struct perf_event *event)
+{
+ struct bpf_prog *prog;
+
+ if (!event->tp_event)
+ return;
+
+ prog = event->tp_event->prog;
+ if (prog) {
+ event->tp_event->prog = NULL;
+ bpf_prog_put(prog);
+ }
+}
+
#else
static inline void perf_tp_register(void)
{
}
+static int perf_event_set_bpf_prog(struct perf_event *event, u32 prog_fd)
+{
+ return -ENOENT;
+}
+
+static void perf_event_free_bpf_prog(struct perf_event *event)
+{
+}
#endif /* CONFIG_EVENT_TRACING */
#ifdef CONFIG_HAVE_HW_BREAKPOINT
{
if (flags & PERF_EF_START)
cpu_clock_event_start(event, flags);
+ perf_event_update_userpage(event);
return 0;
}
static struct pmu perf_cpu_clock = {
.task_ctx_nr = perf_sw_context,
+ .capabilities = PERF_PMU_CAP_NO_NMI,
+
.event_init = cpu_clock_event_init,
.add = cpu_clock_event_add,
.del = cpu_clock_event_del,
{
if (flags & PERF_EF_START)
task_clock_event_start(event, flags);
+ perf_event_update_userpage(event);
return 0;
}
static struct pmu perf_task_clock = {
.task_ctx_nr = perf_sw_context,
+ .capabilities = PERF_PMU_CAP_NO_NMI,
+
.event_init = task_clock_event_init,
.add = task_clock_event_add,
.del = task_clock_event_del,
pmu->event_idx = perf_event_idx_default;
list_add_rcu(&pmu->entry, &pmus);
+ atomic_set(&pmu->exclusive_cnt, 0);
ret = 0;
unlock:
mutex_unlock(&pmus_lock);
static int perf_try_init_event(struct pmu *pmu, struct perf_event *event)
{
+ struct perf_event_context *ctx = NULL;
int ret;
if (!try_module_get(pmu->module))
return -ENODEV;
+
+ if (event->group_leader != event) {
+ ctx = perf_event_ctx_lock(event->group_leader);
+ BUG_ON(!ctx);
+ }
+
event->pmu = pmu;
ret = pmu->event_init(event);
+
+ if (ctx)
+ perf_event_ctx_unlock(event->group_leader, ctx);
+
if (ret)
module_put(pmu->module);
if (event->parent)
return;
- if (has_branch_stack(event)) {
- if (!(event->attach_state & PERF_ATTACH_TASK))
- atomic_inc(&per_cpu(perf_branch_stack_events, cpu));
- }
if (is_cgroup_event(event))
atomic_inc(&per_cpu(perf_cgroup_events, cpu));
}
struct perf_event *group_leader,
struct perf_event *parent_event,
perf_overflow_handler_t overflow_handler,
- void *context)
+ void *context, int cgroup_fd)
{
struct pmu *pmu;
struct perf_event *event;
if (task) {
event->attach_state = PERF_ATTACH_TASK;
-
- if (attr->type == PERF_TYPE_TRACEPOINT)
- event->hw.tp_target = task;
-#ifdef CONFIG_HAVE_HW_BREAKPOINT
/*
- * hw_breakpoint is a bit difficult here..
+ * XXX pmu::event_init needs to know what task to account to
+ * and we cannot use the ctx information because we need the
+ * pmu before we get a ctx.
*/
- else if (attr->type == PERF_TYPE_BREAKPOINT)
- event->hw.bp_target = task;
-#endif
+ event->hw.target = task;
}
+ event->clock = &local_clock;
+ if (parent_event)
+ event->clock = parent_event->clock;
+
if (!overflow_handler && parent_event) {
overflow_handler = parent_event->overflow_handler;
context = parent_event->overflow_handler_context;
if (attr->inherit && (attr->read_format & PERF_FORMAT_GROUP))
goto err_ns;
+ if (!has_branch_stack(event))
+ event->attr.branch_sample_type = 0;
+
+ if (cgroup_fd != -1) {
+ err = perf_cgroup_connect(cgroup_fd, event, attr, group_leader);
+ if (err)
+ goto err_ns;
+ }
+
pmu = perf_init_event(event);
if (!pmu)
goto err_ns;
goto err_ns;
}
+ err = exclusive_event_init(event);
+ if (err)
+ goto err_pmu;
+
if (!event->parent) {
if (event->attr.sample_type & PERF_SAMPLE_CALLCHAIN) {
err = get_callchain_buffers();
if (err)
- goto err_pmu;
+ goto err_per_task;
}
}
return event;
+err_per_task:
+ exclusive_event_destroy(event);
+
err_pmu:
if (event->destroy)
event->destroy(event);
module_put(pmu->module);
err_ns:
+ if (is_cgroup_event(event))
+ perf_detach_cgroup(event);
if (event->ns)
put_pid_ns(event->ns);
kfree(event);
if (output_event->cpu == -1 && output_event->ctx != event->ctx)
goto out;
+ /*
+ * Mixing clocks in the same buffer is trouble you don't need.
+ */
+ if (output_event->clock != event->clock)
+ goto out;
+
+ /*
+ * If both events generate aux data, they must be on the same PMU
+ */
+ if (has_aux(event) && has_aux(output_event) &&
+ event->pmu != output_event->pmu)
+ goto out;
+
set:
mutex_lock(&event->mmap_mutex);
/* Can't redirect output if we've got an active mmap() */
mutex_lock_nested(b, SINGLE_DEPTH_NESTING);
}
+static int perf_event_set_clock(struct perf_event *event, clockid_t clk_id)
+{
+ bool nmi_safe = false;
+
+ switch (clk_id) {
+ case CLOCK_MONOTONIC:
+ event->clock = &ktime_get_mono_fast_ns;
+ nmi_safe = true;
+ break;
+
+ case CLOCK_MONOTONIC_RAW:
+ event->clock = &ktime_get_raw_fast_ns;
+ nmi_safe = true;
+ break;
+
+ case CLOCK_REALTIME:
+ event->clock = &ktime_get_real_ns;
+ break;
+
+ case CLOCK_BOOTTIME:
+ event->clock = &ktime_get_boot_ns;
+ break;
+
+ case CLOCK_TAI:
+ event->clock = &ktime_get_tai_ns;
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ if (!nmi_safe && !(event->pmu->capabilities & PERF_PMU_CAP_NO_NMI))
+ return -EINVAL;
+
+ return 0;
+}
+
/**
* sys_perf_event_open - open a performance event, associate it to a task/cpu
*
int move_group = 0;
int err;
int f_flags = O_RDWR;
+ int cgroup_fd = -1;
/* for future expandability... */
if (flags & ~PERF_FLAG_ALL)
get_online_cpus();
+ if (flags & PERF_FLAG_PID_CGROUP)
+ cgroup_fd = pid;
+
event = perf_event_alloc(&attr, cpu, task, group_leader, NULL,
- NULL, NULL);
+ NULL, NULL, cgroup_fd);
if (IS_ERR(event)) {
err = PTR_ERR(event);
goto err_cpus;
}
- if (flags & PERF_FLAG_PID_CGROUP) {
- err = perf_cgroup_connect(pid, event, &attr, group_leader);
- if (err) {
- __free_event(event);
- goto err_cpus;
- }
- }
-
if (is_sampling_event(event)) {
if (event->pmu->capabilities & PERF_PMU_CAP_NO_INTERRUPT) {
err = -ENOTSUPP;
*/
pmu = event->pmu;
+ if (attr.use_clockid) {
+ err = perf_event_set_clock(event, attr.clockid);
+ if (err)
+ goto err_alloc;
+ }
+
if (group_leader &&
(is_software_event(event) != is_software_event(group_leader))) {
if (is_software_event(event)) {
/*
* Get the target context (task or percpu):
*/
- ctx = find_get_context(pmu, task, event->cpu);
+ ctx = find_get_context(pmu, task, event);
if (IS_ERR(ctx)) {
err = PTR_ERR(ctx);
goto err_alloc;
}
+ if ((pmu->capabilities & PERF_PMU_CAP_EXCLUSIVE) && group_leader) {
+ err = -EBUSY;
+ goto err_context;
+ }
+
if (task) {
put_task_struct(task);
task = NULL;
*/
if (group_leader->group_leader != group_leader)
goto err_context;
+
+ /* All events in a group should have the same clock */
+ if (group_leader->clock != event->clock)
+ goto err_context;
+
/*
* Do not allow to attach to a group in a different
* task or CPU context:
get_ctx(ctx);
}
+ if (!exclusive_event_installable(event, ctx)) {
+ err = -EBUSY;
+ mutex_unlock(&ctx->mutex);
+ fput(event_file);
+ goto err_context;
+ }
+
perf_install_in_context(ctx, event, event->cpu);
perf_unpin_context(ctx);
*/
event = perf_event_alloc(attr, cpu, task, NULL, NULL,
- overflow_handler, context);
+ overflow_handler, context, -1);
if (IS_ERR(event)) {
err = PTR_ERR(event);
goto err;
account_event(event);
- ctx = find_get_context(event->pmu, task, cpu);
+ ctx = find_get_context(event->pmu, task, event);
if (IS_ERR(ctx)) {
err = PTR_ERR(ctx);
goto err_free;
WARN_ON_ONCE(ctx->parent_ctx);
mutex_lock(&ctx->mutex);
+ if (!exclusive_event_installable(event, ctx)) {
+ mutex_unlock(&ctx->mutex);
+ perf_unpin_context(ctx);
+ put_ctx(ctx);
+ err = -EBUSY;
+ goto err_free;
+ }
+
perf_install_in_context(ctx, event, cpu);
perf_unpin_context(ctx);
mutex_unlock(&ctx->mutex);
parent_event->cpu,
child,
group_leader, parent_event,
- NULL, NULL);
+ NULL, NULL, -1);
if (IS_ERR(child_event))
return child_event;
*/
static int task_bp_pinned(int cpu, struct perf_event *bp, enum bp_type_idx type)
{
- struct task_struct *tsk = bp->hw.bp_target;
+ struct task_struct *tsk = bp->hw.target;
struct perf_event *iter;
int count = 0;
list_for_each_entry(iter, &bp_task_head, hw.bp_list) {
- if (iter->hw.bp_target == tsk &&
+ if (iter->hw.target == tsk &&
find_slot_idx(iter) == type &&
(iter->cpu < 0 || cpu == iter->cpu))
count += hw_breakpoint_weight(iter);
int nr;
nr = info->cpu_pinned;
- if (!bp->hw.bp_target)
+ if (!bp->hw.target)
nr += max_task_bp_pinned(cpu, type);
else
nr += task_bp_pinned(cpu, bp, type);
weight = -weight;
/* Pinned counter cpu profiling */
- if (!bp->hw.bp_target) {
+ if (!bp->hw.target) {
get_bp_info(bp->cpu, type)->cpu_pinned += weight;
return;
}
local_t lost; /* nr records lost */
long watermark; /* wakeup watermark */
+ long aux_watermark;
/* poll crap */
spinlock_t event_lock;
struct list_head event_list;
unsigned long mmap_locked;
struct user_struct *mmap_user;
+ /* AUX area */
+ local_t aux_head;
+ local_t aux_nest;
+ local_t aux_wakeup;
+ unsigned long aux_pgoff;
+ int aux_nr_pages;
+ int aux_overwrite;
+ atomic_t aux_mmap_count;
+ unsigned long aux_mmap_locked;
+ void (*free_aux)(void *);
+ atomic_t aux_refcount;
+ void **aux_pages;
+ void *aux_priv;
+
struct perf_event_mmap_page *user_page;
void *data_pages[0];
};
extern struct ring_buffer *
rb_alloc(int nr_pages, long watermark, int cpu, int flags);
extern void perf_event_wakeup(struct perf_event *event);
+extern int rb_alloc_aux(struct ring_buffer *rb, struct perf_event *event,
+ pgoff_t pgoff, int nr_pages, long watermark, int flags);
+extern void rb_free_aux(struct ring_buffer *rb);
+extern struct ring_buffer *ring_buffer_get(struct perf_event *event);
+extern void ring_buffer_put(struct ring_buffer *rb);
+
+static inline bool rb_has_aux(struct ring_buffer *rb)
+{
+ return !!rb->aux_nr_pages;
+}
+
+void perf_event_aux_event(struct perf_event *event, unsigned long head,
+ unsigned long size, u64 flags);
extern void
perf_event_header__init_id(struct perf_event_header *header,
return rb->nr_pages << (PAGE_SHIFT + page_order(rb));
}
+static inline unsigned long perf_aux_size(struct ring_buffer *rb)
+{
+ return rb->aux_nr_pages << PAGE_SHIFT;
+}
+
#define DEFINE_OUTPUT_COPY(func_name, memcpy_func) \
static inline unsigned long \
func_name(struct perf_output_handle *handle, \
spin_lock_init(&rb->event_lock);
}
+/*
+ * This is called before hardware starts writing to the AUX area to
+ * obtain an output handle and make sure there's room in the buffer.
+ * When the capture completes, call perf_aux_output_end() to commit
+ * the recorded data to the buffer.
+ *
+ * The ordering is similar to that of perf_output_{begin,end}, with
+ * the exception of (B), which should be taken care of by the pmu
+ * driver, since ordering rules will differ depending on hardware.
+ */
+void *perf_aux_output_begin(struct perf_output_handle *handle,
+ struct perf_event *event)
+{
+ struct perf_event *output_event = event;
+ unsigned long aux_head, aux_tail;
+ struct ring_buffer *rb;
+
+ if (output_event->parent)
+ output_event = output_event->parent;
+
+ /*
+ * Since this will typically be open across pmu::add/pmu::del, we
+ * grab ring_buffer's refcount instead of holding rcu read lock
+ * to make sure it doesn't disappear under us.
+ */
+ rb = ring_buffer_get(output_event);
+ if (!rb)
+ return NULL;
+
+ if (!rb_has_aux(rb) || !atomic_inc_not_zero(&rb->aux_refcount))
+ goto err;
+
+ /*
+ * Nesting is not supported for AUX area, make sure nested
+ * writers are caught early
+ */
+ if (WARN_ON_ONCE(local_xchg(&rb->aux_nest, 1)))
+ goto err_put;
+
+ aux_head = local_read(&rb->aux_head);
+
+ handle->rb = rb;
+ handle->event = event;
+ handle->head = aux_head;
+ handle->size = 0;
+
+ /*
+ * In overwrite mode, AUX data stores do not depend on aux_tail,
+ * therefore (A) control dependency barrier does not exist. The
+ * (B) <-> (C) ordering is still observed by the pmu driver.
+ */
+ if (!rb->aux_overwrite) {
+ aux_tail = ACCESS_ONCE(rb->user_page->aux_tail);
+ handle->wakeup = local_read(&rb->aux_wakeup) + rb->aux_watermark;
+ if (aux_head - aux_tail < perf_aux_size(rb))
+ handle->size = CIRC_SPACE(aux_head, aux_tail, perf_aux_size(rb));
+
+ /*
+ * handle->size computation depends on aux_tail load; this forms a
+ * control dependency barrier separating aux_tail load from aux data
+ * store that will be enabled on successful return
+ */
+ if (!handle->size) { /* A, matches D */
+ event->pending_disable = 1;
+ perf_output_wakeup(handle);
+ local_set(&rb->aux_nest, 0);
+ goto err_put;
+ }
+ }
+
+ return handle->rb->aux_priv;
+
+err_put:
+ rb_free_aux(rb);
+
+err:
+ ring_buffer_put(rb);
+ handle->event = NULL;
+
+ return NULL;
+}
+
+/*
+ * Commit the data written by hardware into the ring buffer by adjusting
+ * aux_head and posting a PERF_RECORD_AUX into the perf buffer. It is the
+ * pmu driver's responsibility to observe ordering rules of the hardware,
+ * so that all the data is externally visible before this is called.
+ */
+void perf_aux_output_end(struct perf_output_handle *handle, unsigned long size,
+ bool truncated)
+{
+ struct ring_buffer *rb = handle->rb;
+ unsigned long aux_head;
+ u64 flags = 0;
+
+ if (truncated)
+ flags |= PERF_AUX_FLAG_TRUNCATED;
+
+ /* in overwrite mode, driver provides aux_head via handle */
+ if (rb->aux_overwrite) {
+ flags |= PERF_AUX_FLAG_OVERWRITE;
+
+ aux_head = handle->head;
+ local_set(&rb->aux_head, aux_head);
+ } else {
+ aux_head = local_read(&rb->aux_head);
+ local_add(size, &rb->aux_head);
+ }
+
+ if (size || flags) {
+ /*
+ * Only send RECORD_AUX if we have something useful to communicate
+ */
+
+ perf_event_aux_event(handle->event, aux_head, size, flags);
+ }
+
+ aux_head = rb->user_page->aux_head = local_read(&rb->aux_head);
+
+ if (aux_head - local_read(&rb->aux_wakeup) >= rb->aux_watermark) {
+ perf_output_wakeup(handle);
+ local_add(rb->aux_watermark, &rb->aux_wakeup);
+ }
+ handle->event = NULL;
+
+ local_set(&rb->aux_nest, 0);
+ rb_free_aux(rb);
+ ring_buffer_put(rb);
+}
+
+/*
+ * Skip over a given number of bytes in the AUX buffer, due to, for example,
+ * hardware's alignment constraints.
+ */
+int perf_aux_output_skip(struct perf_output_handle *handle, unsigned long size)
+{
+ struct ring_buffer *rb = handle->rb;
+ unsigned long aux_head;
+
+ if (size > handle->size)
+ return -ENOSPC;
+
+ local_add(size, &rb->aux_head);
+
+ aux_head = rb->user_page->aux_head = local_read(&rb->aux_head);
+ if (aux_head - local_read(&rb->aux_wakeup) >= rb->aux_watermark) {
+ perf_output_wakeup(handle);
+ local_add(rb->aux_watermark, &rb->aux_wakeup);
+ handle->wakeup = local_read(&rb->aux_wakeup) +
+ rb->aux_watermark;
+ }
+
+ handle->head = aux_head;
+ handle->size -= size;
+
+ return 0;
+}
+
+void *perf_get_aux(struct perf_output_handle *handle)
+{
+ /* this is only valid between perf_aux_output_begin and *_end */
+ if (!handle->event)
+ return NULL;
+
+ return handle->rb->aux_priv;
+}
+
+#define PERF_AUX_GFP (GFP_KERNEL | __GFP_ZERO | __GFP_NOWARN | __GFP_NORETRY)
+
+static struct page *rb_alloc_aux_page(int node, int order)
+{
+ struct page *page;
+
+ if (order > MAX_ORDER)
+ order = MAX_ORDER;
+
+ do {
+ page = alloc_pages_node(node, PERF_AUX_GFP, order);
+ } while (!page && order--);
+
+ if (page && order) {
+ /*
+ * Communicate the allocation size to the driver
+ */
+ split_page(page, order);
+ SetPagePrivate(page);
+ set_page_private(page, order);
+ }
+
+ return page;
+}
+
+static void rb_free_aux_page(struct ring_buffer *rb, int idx)
+{
+ struct page *page = virt_to_page(rb->aux_pages[idx]);
+
+ ClearPagePrivate(page);
+ page->mapping = NULL;
+ __free_page(page);
+}
+
+int rb_alloc_aux(struct ring_buffer *rb, struct perf_event *event,
+ pgoff_t pgoff, int nr_pages, long watermark, int flags)
+{
+ bool overwrite = !(flags & RING_BUFFER_WRITABLE);
+ int node = (event->cpu == -1) ? -1 : cpu_to_node(event->cpu);
+ int ret = -ENOMEM, max_order = 0;
+
+ if (!has_aux(event))
+ return -ENOTSUPP;
+
+ if (event->pmu->capabilities & PERF_PMU_CAP_AUX_NO_SG) {
+ /*
+ * We need to start with the max_order that fits in nr_pages,
+ * not the other way around, hence ilog2() and not get_order.
+ */
+ max_order = ilog2(nr_pages);
+
+ /*
+ * PMU requests more than one contiguous chunks of memory
+ * for SW double buffering
+ */
+ if ((event->pmu->capabilities & PERF_PMU_CAP_AUX_SW_DOUBLEBUF) &&
+ !overwrite) {
+ if (!max_order)
+ return -EINVAL;
+
+ max_order--;
+ }
+ }
+
+ rb->aux_pages = kzalloc_node(nr_pages * sizeof(void *), GFP_KERNEL, node);
+ if (!rb->aux_pages)
+ return -ENOMEM;
+
+ rb->free_aux = event->pmu->free_aux;
+ for (rb->aux_nr_pages = 0; rb->aux_nr_pages < nr_pages;) {
+ struct page *page;
+ int last, order;
+
+ order = min(max_order, ilog2(nr_pages - rb->aux_nr_pages));
+ page = rb_alloc_aux_page(node, order);
+ if (!page)
+ goto out;
+
+ for (last = rb->aux_nr_pages + (1 << page_private(page));
+ last > rb->aux_nr_pages; rb->aux_nr_pages++)
+ rb->aux_pages[rb->aux_nr_pages] = page_address(page++);
+ }
+
+ rb->aux_priv = event->pmu->setup_aux(event->cpu, rb->aux_pages, nr_pages,
+ overwrite);
+ if (!rb->aux_priv)
+ goto out;
+
+ ret = 0;
+
+ /*
+ * aux_pages (and pmu driver's private data, aux_priv) will be
+ * referenced in both producer's and consumer's contexts, thus
+ * we keep a refcount here to make sure either of the two can
+ * reference them safely.
+ */
+ atomic_set(&rb->aux_refcount, 1);
+
+ rb->aux_overwrite = overwrite;
+ rb->aux_watermark = watermark;
+
+ if (!rb->aux_watermark && !rb->aux_overwrite)
+ rb->aux_watermark = nr_pages << (PAGE_SHIFT - 1);
+
+out:
+ if (!ret)
+ rb->aux_pgoff = pgoff;
+ else
+ rb_free_aux(rb);
+
+ return ret;
+}
+
+static void __rb_free_aux(struct ring_buffer *rb)
+{
+ int pg;
+
+ if (rb->aux_priv) {
+ rb->free_aux(rb->aux_priv);
+ rb->free_aux = NULL;
+ rb->aux_priv = NULL;
+ }
+
+ for (pg = 0; pg < rb->aux_nr_pages; pg++)
+ rb_free_aux_page(rb, pg);
+
+ kfree(rb->aux_pages);
+ rb->aux_nr_pages = 0;
+}
+
+void rb_free_aux(struct ring_buffer *rb)
+{
+ if (atomic_dec_and_test(&rb->aux_refcount))
+ __rb_free_aux(rb);
+}
+
#ifndef CONFIG_PERF_USE_VMALLOC
/*
* Back perf_mmap() with regular GFP_KERNEL-0 pages.
*/
-struct page *
-perf_mmap_to_page(struct ring_buffer *rb, unsigned long pgoff)
+static struct page *
+__perf_mmap_to_page(struct ring_buffer *rb, unsigned long pgoff)
{
if (pgoff > rb->nr_pages)
return NULL;
return rb->nr_pages << page_order(rb);
}
-struct page *
-perf_mmap_to_page(struct ring_buffer *rb, unsigned long pgoff)
+static struct page *
+__perf_mmap_to_page(struct ring_buffer *rb, unsigned long pgoff)
{
/* The '>' counts in the user page. */
if (pgoff > data_page_nr(rb))
}
#endif
+
+struct page *
+perf_mmap_to_page(struct ring_buffer *rb, unsigned long pgoff)
+{
+ if (rb->aux_nr_pages) {
+ /* above AUX space */
+ if (pgoff > rb->aux_pgoff + rb->aux_nr_pages)
+ return NULL;
+
+ /* AUX space */
+ if (pgoff >= rb->aux_pgoff)
+ return virt_to_page(rb->aux_pages[pgoff - rb->aux_pgoff]);
+ }
+
+ return __perf_mmap_to_page(rb, pgoff);
+}
if (!p)
return -ESRCH;
- if (!p->mm) {
+ if (unlikely(p->flags & PF_KTHREAD)) {
put_task_struct(p);
return -EPERM;
}
return -ENOSYS;
}
+
+/**
+ * irq_chip_set_wake_parent - Set/reset wake-up on the parent interrupt
+ * @data: Pointer to interrupt specific data
+ * @on: Whether to set or reset the wake-up capability of this irq
+ *
+ * Conditional, as the underlying parent chip might not implement it.
+ */
+int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
+{
+ data = data->parent_data;
+ if (data->chip->irq_set_wake)
+ return data->chip->irq_set_wake(data, on);
+
+ return -ENOSYS;
+}
#endif
/**
* Do not use this for shutdown scenarios where you must be sure
* that all parts (hardirq and threaded handler) have completed.
*
+ * Returns: false if a threaded handler is active.
+ *
* This function may be called - with care - from IRQ context.
*/
-void synchronize_hardirq(unsigned int irq)
+bool synchronize_hardirq(unsigned int irq)
{
struct irq_desc *desc = irq_to_desc(irq);
- if (desc)
+ if (desc) {
__synchronize_hardirq(desc);
+ return !atomic_read(&desc->threads_active);
+ }
+
+ return true;
}
EXPORT_SYMBOL(synchronize_hardirq);
}
EXPORT_SYMBOL(disable_irq);
+/**
+ * disable_hardirq - disables an irq and waits for hardirq completion
+ * @irq: Interrupt to disable
+ *
+ * Disable the selected interrupt line. Enables and Disables are
+ * nested.
+ * This function waits for any pending hard IRQ handlers for this
+ * interrupt to complete before returning. If you use this function while
+ * holding a resource the hard IRQ handler may need you will deadlock.
+ *
+ * When used to optimistically disable an interrupt from atomic context
+ * the return value must be checked.
+ *
+ * Returns: false if a threaded handler is active.
+ *
+ * This function may be called - with care - from IRQ context.
+ */
+bool disable_hardirq(unsigned int irq)
+{
+ if (!__disable_irq_nosync(irq))
+ return synchronize_hardirq(irq);
+
+ return false;
+}
+EXPORT_SYMBOL_GPL(disable_hardirq);
+
void __enable_irq(struct irq_desc *desc, unsigned int irq)
{
switch (desc->depth) {
return retval;
}
+
+/**
+ * irq_get_irqchip_state - returns the irqchip state of a interrupt.
+ * @irq: Interrupt line that is forwarded to a VM
+ * @which: One of IRQCHIP_STATE_* the caller wants to know about
+ * @state: a pointer to a boolean where the state is to be storeed
+ *
+ * This call snapshots the internal irqchip state of an
+ * interrupt, returning into @state the bit corresponding to
+ * stage @which
+ *
+ * This function should be called with preemption disabled if the
+ * interrupt controller has per-cpu registers.
+ */
+int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
+ bool *state)
+{
+ struct irq_desc *desc;
+ struct irq_data *data;
+ struct irq_chip *chip;
+ unsigned long flags;
+ int err = -EINVAL;
+
+ desc = irq_get_desc_buslock(irq, &flags, 0);
+ if (!desc)
+ return err;
+
+ data = irq_desc_get_irq_data(desc);
+
+ do {
+ chip = irq_data_get_irq_chip(data);
+ if (chip->irq_get_irqchip_state)
+ break;
+#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
+ data = data->parent_data;
+#else
+ data = NULL;
+#endif
+ } while (data);
+
+ if (data)
+ err = chip->irq_get_irqchip_state(data, which, state);
+
+ irq_put_desc_busunlock(desc, flags);
+ return err;
+}
+
+/**
+ * irq_set_irqchip_state - set the state of a forwarded interrupt.
+ * @irq: Interrupt line that is forwarded to a VM
+ * @which: State to be restored (one of IRQCHIP_STATE_*)
+ * @val: Value corresponding to @which
+ *
+ * This call sets the internal irqchip state of an interrupt,
+ * depending on the value of @which.
+ *
+ * This function should be called with preemption disabled if the
+ * interrupt controller has per-cpu registers.
+ */
+int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
+ bool val)
+{
+ struct irq_desc *desc;
+ struct irq_data *data;
+ struct irq_chip *chip;
+ unsigned long flags;
+ int err = -EINVAL;
+
+ desc = irq_get_desc_buslock(irq, &flags, 0);
+ if (!desc)
+ return err;
+
+ data = irq_desc_get_irq_data(desc);
+
+ do {
+ chip = irq_data_get_irq_chip(data);
+ if (chip->irq_set_irqchip_state)
+ break;
+#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
+ data = data->parent_data;
+#else
+ data = NULL;
+#endif
+ } while (data);
+
+ if (data)
+ err = chip->irq_set_irqchip_state(data, which, val);
+
+ irq_put_desc_busunlock(desc, flags);
+ return err;
+}
struct msi_desc *desc;
for_each_msi_entry(desc, dev) {
- irq_domain_free_irqs(desc->irq, desc->nvec_used);
- desc->irq = 0;
+ /*
+ * We might have failed to allocate an MSI early
+ * enough that there is no IRQ associated to this
+ * entry. If that's the case, don't do anything.
+ */
+ if (desc->irq) {
+ irq_domain_free_irqs(desc->irq, desc->nvec_used);
+ desc->irq = 0;
+ }
}
}
rcu_read_unlock();
}
-static int klp_disable_func(struct klp_func *func)
+static void klp_disable_func(struct klp_func *func)
{
struct klp_ops *ops;
- int ret;
-
- if (WARN_ON(func->state != KLP_ENABLED))
- return -EINVAL;
- if (WARN_ON(!func->old_addr))
- return -EINVAL;
+ WARN_ON(func->state != KLP_ENABLED);
+ WARN_ON(!func->old_addr);
ops = klp_find_ops(func->old_addr);
if (WARN_ON(!ops))
- return -EINVAL;
+ return;
if (list_is_singular(&ops->func_stack)) {
- ret = unregister_ftrace_function(&ops->fops);
- if (ret) {
- pr_err("failed to unregister ftrace handler for function '%s' (%d)\n",
- func->old_name, ret);
- return ret;
- }
-
- ret = ftrace_set_filter_ip(&ops->fops, func->old_addr, 1, 0);
- if (ret)
- pr_warn("function unregister succeeded but failed to clear the filter\n");
+ WARN_ON(unregister_ftrace_function(&ops->fops));
+ WARN_ON(ftrace_set_filter_ip(&ops->fops, func->old_addr, 1, 0));
list_del_rcu(&func->stack_node);
list_del(&ops->node);
}
func->state = KLP_DISABLED;
-
- return 0;
}
static int klp_enable_func(struct klp_func *func)
return ret;
}
-static int klp_disable_object(struct klp_object *obj)
+static void klp_disable_object(struct klp_object *obj)
{
struct klp_func *func;
- int ret;
- for (func = obj->funcs; func->old_name; func++) {
- if (func->state != KLP_ENABLED)
- continue;
-
- ret = klp_disable_func(func);
- if (ret)
- return ret;
- }
+ for (func = obj->funcs; func->old_name; func++)
+ if (func->state == KLP_ENABLED)
+ klp_disable_func(func);
obj->state = KLP_DISABLED;
-
- return 0;
}
static int klp_enable_object(struct klp_object *obj)
for (func = obj->funcs; func->old_name; func++) {
ret = klp_enable_func(func);
- if (ret)
- goto unregister;
+ if (ret) {
+ klp_disable_object(obj);
+ return ret;
+ }
}
obj->state = KLP_ENABLED;
return 0;
-
-unregister:
- WARN_ON(klp_disable_object(obj));
- return ret;
}
static int __klp_disable_patch(struct klp_patch *patch)
{
struct klp_object *obj;
- int ret;
/* enforce stacking: only the last enabled patch can be disabled */
if (!list_is_last(&patch->list, &klp_patches) &&
pr_notice("disabling patch '%s'\n", patch->mod->name);
for (obj = patch->objs; obj->funcs; obj++) {
- if (obj->state != KLP_ENABLED)
- continue;
-
- ret = klp_disable_object(obj);
- if (ret)
- return ret;
+ if (obj->state == KLP_ENABLED)
+ klp_disable_object(obj);
}
patch->state = KLP_DISABLED;
pr_notice("enabling patch '%s'\n", patch->mod->name);
for (obj = patch->objs; obj->funcs; obj++) {
- klp_find_object_module(obj);
-
if (!klp_is_object_loaded(obj))
continue;
{
struct module *pmod = patch->mod;
struct module *mod = obj->mod;
- int ret;
if (patch->state == KLP_DISABLED)
goto disabled;
pr_notice("reverting patch '%s' on unloading module '%s'\n",
pmod->name, mod->name);
- ret = klp_disable_object(obj);
- if (ret)
- pr_warn("failed to revert patch '%s' on module '%s' (%d)\n",
- pmod->name, mod->name, ret);
+ klp_disable_object(obj);
disabled:
klp_free_object_loaded(obj);
*/
return;
}
- ACCESS_ONCE(prev->next) = node;
+ WRITE_ONCE(prev->next, node);
/* Wait until the lock holder passes the lock down. */
arch_mcs_spin_lock_contended(&node->locked);
static inline
void mcs_spin_unlock(struct mcs_spinlock **lock, struct mcs_spinlock *node)
{
- struct mcs_spinlock *next = ACCESS_ONCE(node->next);
+ struct mcs_spinlock *next = READ_ONCE(node->next);
if (likely(!next)) {
/*
if (likely(cmpxchg(lock, node, NULL) == node))
return;
/* Wait until the next pointer is set */
- while (!(next = ACCESS_ONCE(node->next)))
+ while (!(next = READ_ONCE(node->next)))
cpu_relax_lowlatency();
}
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/debug_locks.h>
-#include "mcs_spinlock.h"
+#include <linux/osq_lock.h>
/*
* In the DEBUG case we are using the "NULL fastpath" for mutexes,
}
#ifdef CONFIG_MUTEX_SPIN_ON_OWNER
-static inline bool owner_running(struct mutex *lock, struct task_struct *owner)
-{
- if (lock->owner != owner)
- return false;
-
- /*
- * Ensure we emit the owner->on_cpu, dereference _after_ checking
- * lock->owner still matches owner, if that fails, owner might
- * point to free()d memory, if it still matches, the rcu_read_lock()
- * ensures the memory stays valid.
- */
- barrier();
-
- return owner->on_cpu;
-}
-
/*
* Look out! "owner" is an entirely speculative pointer
* access and not reliable.
*/
static noinline
-int mutex_spin_on_owner(struct mutex *lock, struct task_struct *owner)
+bool mutex_spin_on_owner(struct mutex *lock, struct task_struct *owner)
{
+ bool ret = true;
+
rcu_read_lock();
- while (owner_running(lock, owner)) {
- if (need_resched())
+ while (lock->owner == owner) {
+ /*
+ * Ensure we emit the owner->on_cpu, dereference _after_
+ * checking lock->owner still matches owner. If that fails,
+ * owner might point to freed memory. If it still matches,
+ * the rcu_read_lock() ensures the memory stays valid.
+ */
+ barrier();
+
+ if (!owner->on_cpu || need_resched()) {
+ ret = false;
break;
+ }
cpu_relax_lowlatency();
}
rcu_read_unlock();
- /*
- * We break out the loop above on need_resched() and when the
- * owner changed, which is a sign for heavy contention. Return
- * success only when lock->owner is NULL.
- */
- return lock->owner == NULL;
+ return ret;
}
/*
return 0;
rcu_read_lock();
- owner = ACCESS_ONCE(lock->owner);
+ owner = READ_ONCE(lock->owner);
if (owner)
retval = owner->on_cpu;
rcu_read_unlock();
* As such, when deadlock detection needs to be
* performed the optimistic spinning cannot be done.
*/
- if (ACCESS_ONCE(ww->ctx))
+ if (READ_ONCE(ww->ctx))
break;
}
* If there's an owner, wait for it to either
* release the lock or go to sleep.
*/
- owner = ACCESS_ONCE(lock->owner);
+ owner = READ_ONCE(lock->owner);
if (owner && !mutex_spin_on_owner(lock, owner))
break;
__ww_mutex_lock_check_stamp(struct mutex *lock, struct ww_acquire_ctx *ctx)
{
struct ww_mutex *ww = container_of(lock, struct ww_mutex, base);
- struct ww_acquire_ctx *hold_ctx = ACCESS_ONCE(ww->ctx);
+ struct ww_acquire_ctx *hold_ctx = READ_ONCE(ww->ctx);
if (!hold_ctx)
return 0;
prev = decode_cpu(old);
node->prev = prev;
- ACCESS_ONCE(prev->next) = node;
+ WRITE_ONCE(prev->next, node);
/*
* Normally @prev is untouchable after the above store; because at that
* cmpxchg in an attempt to undo our queueing.
*/
- while (!ACCESS_ONCE(node->locked)) {
+ while (!READ_ONCE(node->locked)) {
/*
* If we need to reschedule bail... so we can block.
*/
* Or we race against a concurrent unqueue()'s step-B, in which
* case its step-C will write us a new @node->prev pointer.
*/
- prev = ACCESS_ONCE(node->prev);
+ prev = READ_ONCE(node->prev);
}
/*
* it will wait in Step-A.
*/
- ACCESS_ONCE(next->prev) = prev;
- ACCESS_ONCE(prev->next) = next;
+ WRITE_ONCE(next->prev, prev);
+ WRITE_ONCE(prev->next, next);
return false;
}
node = this_cpu_ptr(&osq_node);
next = xchg(&node->next, NULL);
if (next) {
- ACCESS_ONCE(next->locked) = 1;
+ WRITE_ONCE(next->locked, 1);
return;
}
next = osq_wait_next(lock, node, NULL);
if (next)
- ACCESS_ONCE(next->locked) = 1;
+ WRITE_ONCE(next->locked, 1);
}
*
* @task: the task owning the mutex (owner) for which a chain walk is
* probably needed
- * @deadlock_detect: do we have to carry out deadlock detection?
+ * @chwalk: do we have to carry out deadlock detection?
* @orig_lock: the mutex (can be NULL if we are walking the chain to recheck
* things for a task that has just got its priority adjusted, and
* is waiting on a mutex)
list_del(&waiter->list);
tsk = waiter->task;
+ /*
+ * Make sure we do not wakeup the next reader before
+ * setting the nil condition to grant the next reader;
+ * otherwise we could miss the wakeup on the other
+ * side and end up sleeping again. See the pairing
+ * in rwsem_down_read_failed().
+ */
smp_mb();
waiter->task = NULL;
wake_up_process(tsk);
#include <linux/init.h>
#include <linux/export.h>
#include <linux/sched/rt.h>
+#include <linux/osq_lock.h>
-#include "mcs_spinlock.h"
+#include "rwsem.h"
/*
* Guide to the rw_semaphore's count field for common values.
waiter = list_entry(next, struct rwsem_waiter, list);
next = waiter->list.next;
tsk = waiter->task;
+ /*
+ * Make sure we do not wakeup the next reader before
+ * setting the nil condition to grant the next reader;
+ * otherwise we could miss the wakeup on the other
+ * side and end up sleeping again. See the pairing
+ * in rwsem_down_read_failed().
+ */
smp_mb();
waiter->task = NULL;
wake_up_process(tsk);
RWSEM_ACTIVE_WRITE_BIAS) == RWSEM_WAITING_BIAS) {
if (!list_is_singular(&sem->wait_list))
rwsem_atomic_update(RWSEM_WAITING_BIAS, sem);
+ rwsem_set_owner(sem);
return true;
}
*/
static inline bool rwsem_try_write_lock_unqueued(struct rw_semaphore *sem)
{
- long old, count = ACCESS_ONCE(sem->count);
+ long old, count = READ_ONCE(sem->count);
while (true) {
if (!(count == 0 || count == RWSEM_WAITING_BIAS))
return false;
old = cmpxchg(&sem->count, count, count + RWSEM_ACTIVE_WRITE_BIAS);
- if (old == count)
+ if (old == count) {
+ rwsem_set_owner(sem);
return true;
+ }
count = old;
}
static inline bool rwsem_can_spin_on_owner(struct rw_semaphore *sem)
{
struct task_struct *owner;
- bool on_cpu = false;
+ bool ret = true;
if (need_resched())
return false;
rcu_read_lock();
- owner = ACCESS_ONCE(sem->owner);
- if (owner)
- on_cpu = owner->on_cpu;
- rcu_read_unlock();
-
- /*
- * If sem->owner is not set, yet we have just recently entered the
- * slowpath, then there is a possibility reader(s) may have the lock.
- * To be safe, avoid spinning in these situations.
- */
- return on_cpu;
-}
-
-static inline bool owner_running(struct rw_semaphore *sem,
- struct task_struct *owner)
-{
- if (sem->owner != owner)
- return false;
-
- /*
- * Ensure we emit the owner->on_cpu, dereference _after_ checking
- * sem->owner still matches owner, if that fails, owner might
- * point to free()d memory, if it still matches, the rcu_read_lock()
- * ensures the memory stays valid.
- */
- barrier();
+ owner = READ_ONCE(sem->owner);
+ if (!owner) {
+ long count = READ_ONCE(sem->count);
+ /*
+ * If sem->owner is not set, yet we have just recently entered the
+ * slowpath with the lock being active, then there is a possibility
+ * reader(s) may have the lock. To be safe, bail spinning in these
+ * situations.
+ */
+ if (count & RWSEM_ACTIVE_MASK)
+ ret = false;
+ goto done;
+ }
- return owner->on_cpu;
+ ret = owner->on_cpu;
+done:
+ rcu_read_unlock();
+ return ret;
}
static noinline
bool rwsem_spin_on_owner(struct rw_semaphore *sem, struct task_struct *owner)
{
+ long count;
+
rcu_read_lock();
- while (owner_running(sem, owner)) {
- if (need_resched())
- break;
+ while (sem->owner == owner) {
+ /*
+ * Ensure we emit the owner->on_cpu, dereference _after_
+ * checking sem->owner still matches owner, if that fails,
+ * owner might point to free()d memory, if it still matches,
+ * the rcu_read_lock() ensures the memory stays valid.
+ */
+ barrier();
+
+ /* abort spinning when need_resched or owner is not running */
+ if (!owner->on_cpu || need_resched()) {
+ rcu_read_unlock();
+ return false;
+ }
cpu_relax_lowlatency();
}
rcu_read_unlock();
+ if (READ_ONCE(sem->owner))
+ return true; /* new owner, continue spinning */
+
/*
- * We break out the loop above on need_resched() or when the
- * owner changed, which is a sign for heavy contention. Return
- * success only when sem->owner is NULL.
+ * When the owner is not set, the lock could be free or
+ * held by readers. Check the counter to verify the
+ * state.
*/
- return sem->owner == NULL;
+ count = READ_ONCE(sem->count);
+ return (count == 0 || count == RWSEM_WAITING_BIAS);
}
static bool rwsem_optimistic_spin(struct rw_semaphore *sem)
goto done;
while (true) {
- owner = ACCESS_ONCE(sem->owner);
+ owner = READ_ONCE(sem->owner);
if (owner && !rwsem_spin_on_owner(sem, owner))
break;
/* we're now waiting on the lock, but no longer actively locking */
if (waiting) {
- count = ACCESS_ONCE(sem->count);
+ count = READ_ONCE(sem->count);
/*
* If there were already threads queued before us and there are
#include <linux/sched.h>
#include <linux/export.h>
#include <linux/rwsem.h>
-
#include <linux/atomic.h>
-#ifdef CONFIG_RWSEM_SPIN_ON_OWNER
-static inline void rwsem_set_owner(struct rw_semaphore *sem)
-{
- sem->owner = current;
-}
-
-static inline void rwsem_clear_owner(struct rw_semaphore *sem)
-{
- sem->owner = NULL;
-}
-
-#else
-static inline void rwsem_set_owner(struct rw_semaphore *sem)
-{
-}
-
-static inline void rwsem_clear_owner(struct rw_semaphore *sem)
-{
-}
-#endif
+#include "rwsem.h"
/*
* lock for reading
--- /dev/null
+#ifdef CONFIG_RWSEM_SPIN_ON_OWNER
+static inline void rwsem_set_owner(struct rw_semaphore *sem)
+{
+ sem->owner = current;
+}
+
+static inline void rwsem_clear_owner(struct rw_semaphore *sem)
+{
+ sem->owner = NULL;
+}
+
+#else
+static inline void rwsem_set_owner(struct rw_semaphore *sem)
+{
+}
+
+static inline void rwsem_clear_owner(struct rw_semaphore *sem)
+{
+}
+#endif
return 0;
}
+#define COPY_CHUNK_SIZE (16*PAGE_SIZE)
+
+static int copy_chunked_from_user(void *dst, const void __user *usrc, unsigned long len)
+{
+ do {
+ unsigned long n = min(len, COPY_CHUNK_SIZE);
+
+ if (copy_from_user(dst, usrc, n) != 0)
+ return -EFAULT;
+ cond_resched();
+ dst += n;
+ usrc += n;
+ len -= n;
+ } while (len);
+ return 0;
+}
+
/* Sets info->hdr and info->len. */
static int copy_module_from_user(const void __user *umod, unsigned long len,
struct load_info *info)
if (!info->hdr)
return -ENOMEM;
- if (copy_from_user(info->hdr, umod, info->len) != 0) {
+ if (copy_chunked_from_user(info->hdr, umod, info->len) != 0) {
vfree(info->hdr);
return -EFAULT;
}
mod->trace_events = section_objs(info, "_ftrace_events",
sizeof(*mod->trace_events),
&mod->num_trace_events);
+ mod->trace_enums = section_objs(info, "_ftrace_enum_map",
+ sizeof(*mod->trace_enums),
+ &mod->num_trace_enums);
#endif
#ifdef CONFIG_TRACING
mod->trace_bprintk_fmt_start = section_objs(info, "__trace_printk_fmt",
}
}
-static bool is_nosave_page(unsigned long pfn)
-{
- struct nosave_region *region;
-
- list_for_each_entry(region, &nosave_regions, list) {
- if (pfn >= region->start_pfn && pfn < region->end_pfn) {
- pr_err("PM: %#010llx in e820 nosave region: "
- "[mem %#010llx-%#010llx]\n",
- (unsigned long long) pfn << PAGE_SHIFT,
- (unsigned long long) region->start_pfn << PAGE_SHIFT,
- ((unsigned long long) region->end_pfn << PAGE_SHIFT)
- - 1);
- return true;
- }
- }
-
- return false;
-}
-
/**
* create_basic_memory_bitmaps - create bitmaps needed for marking page
* frames that should not be saved and free page frames. The pointers
do {
pfn = memory_bm_next_pfn(bm);
if (likely(pfn != BM_END_OF_MAP)) {
- if (likely(pfn_valid(pfn)) && !is_nosave_page(pfn))
+ if (likely(pfn_valid(pfn)))
swsusp_set_page_free(pfn_to_page(pfn));
else
return -EFAULT;
#include <linux/security.h>
#include <linux/bootmem.h>
#include <linux/memblock.h>
-#include <linux/aio.h>
#include <linux/syscalls.h>
#include <linux/kexec.h>
#include <linux/kdb.h>
#include <linux/irq_work.h>
#include <linux/utsname.h>
#include <linux/ctype.h>
+#include <linux/uio.h>
#include <asm/uaccess.h>
int i;
int level = default_message_loglevel;
int facility = 1; /* LOG_USER */
- size_t len = iocb->ki_nbytes;
+ size_t len = iov_iter_count(from);
ssize_t ret = len;
if (len > LOG_LINE_MAX)
static int
rcu_torture_writer(void *arg)
{
+ bool can_expedite = !rcu_gp_is_expedited();
+ int expediting = 0;
unsigned long gp_snap;
bool gp_cond1 = gp_cond, gp_exp1 = gp_exp, gp_normal1 = gp_normal;
bool gp_sync1 = gp_sync;
int nsynctypes = 0;
VERBOSE_TOROUT_STRING("rcu_torture_writer task started");
+ pr_alert("%s" TORTURE_FLAG
+ " Grace periods expedited from boot/sysfs for %s,\n",
+ torture_type, cur_ops->name);
+ pr_alert("%s" TORTURE_FLAG
+ " Testing of dynamic grace-period expediting diabled.\n",
+ torture_type);
/* Initialize synctype[] array. If none set, take default. */
- if (!gp_cond1 && !gp_exp1 && !gp_normal1 && !gp_sync)
+ if (!gp_cond1 && !gp_exp1 && !gp_normal1 && !gp_sync1)
gp_cond1 = gp_exp1 = gp_normal1 = gp_sync1 = true;
if (gp_cond1 && cur_ops->get_state && cur_ops->cond_sync)
synctype[nsynctypes++] = RTWS_COND_GET;
}
}
rcutorture_record_progress(++rcu_torture_current_version);
+ /* Cycle through nesting levels of rcu_expedite_gp() calls. */
+ if (can_expedite &&
+ !(torture_random(&rand) & 0xff & (!!expediting - 1))) {
+ WARN_ON_ONCE(expediting == 0 && rcu_gp_is_expedited());
+ if (expediting >= 0)
+ rcu_expedite_gp();
+ else
+ rcu_unexpedite_gp();
+ if (++expediting > 3)
+ expediting = -expediting;
+ }
rcu_torture_writer_state = RTWS_STUTTER;
stutter_wait("rcu_torture_writer");
} while (!torture_must_stop());
+ /* Reset expediting back to unexpedited. */
+ if (expediting > 0)
+ expediting = -expediting;
+ while (can_expedite && expediting++ < 0)
+ rcu_unexpedite_gp();
+ WARN_ON_ONCE(can_expedite && rcu_gp_is_expedited());
rcu_torture_writer_state = RTWS_STOPPING;
torture_kthread_stopping("rcu_torture_writer");
return 0;
}
EXPORT_SYMBOL_GPL(call_srcu);
-struct rcu_synchronize {
- struct rcu_head head;
- struct completion completion;
-};
-
-/*
- * Awaken the corresponding synchronize_srcu() instance now that a
- * grace period has elapsed.
- */
-static void wakeme_after_rcu(struct rcu_head *head)
-{
- struct rcu_synchronize *rcu;
-
- rcu = container_of(head, struct rcu_synchronize, head);
- complete(&rcu->completion);
-}
-
static void srcu_advance_batches(struct srcu_struct *sp, int trycount);
static void srcu_reschedule(struct srcu_struct *sp);
*/
void synchronize_srcu(struct srcu_struct *sp)
{
- __synchronize_srcu(sp, rcu_expedited
+ __synchronize_srcu(sp, rcu_gp_is_expedited()
? SYNCHRONIZE_SRCU_EXP_TRYCOUNT
: SYNCHRONIZE_SRCU_TRYCOUNT);
}
static int rcu_qsctr_help(struct rcu_ctrlblk *rcp)
{
RCU_TRACE(reset_cpu_stall_ticks(rcp));
- if (rcp->rcucblist != NULL &&
- rcp->donetail != rcp->curtail) {
+ if (rcp->donetail != rcp->curtail) {
rcp->donetail = rcp->curtail;
return 1;
}
unsigned long flags;
RCU_TRACE(int cb_count = 0);
- /* If no RCU callbacks ready to invoke, just return. */
- if (&rcp->rcucblist == rcp->donetail) {
- RCU_TRACE(trace_rcu_batch_start(rcp->name, 0, 0, -1));
- RCU_TRACE(trace_rcu_batch_end(rcp->name, 0,
- !!ACCESS_ONCE(rcp->rcucblist),
- need_resched(),
- is_idle_task(current),
- false));
- return;
- }
-
/* Move the ready-to-invoke callbacks to a local list. */
local_irq_save(flags);
RCU_TRACE(trace_rcu_batch_start(rcp->name, 0, rcp->qlen, -1));
#define RCU_STATE_INITIALIZER(sname, sabbr, cr) \
DEFINE_RCU_TPS(sname) \
+DEFINE_PER_CPU_SHARED_ALIGNED(struct rcu_data, sname##_data); \
struct rcu_state sname##_state = { \
.level = { &sname##_state.node[0] }, \
+ .rda = &sname##_data, \
.call = cr, \
.fqs_state = RCU_GP_IDLE, \
.gpnum = 0UL - 300UL, \
.orphan_nxttail = &sname##_state.orphan_nxtlist, \
.orphan_donetail = &sname##_state.orphan_donelist, \
.barrier_mutex = __MUTEX_INITIALIZER(sname##_state.barrier_mutex), \
- .onoff_mutex = __MUTEX_INITIALIZER(sname##_state.onoff_mutex), \
.name = RCU_STATE_NAME(sname), \
.abbr = sabbr, \
-}; \
-DEFINE_PER_CPU_SHARED_ALIGNED(struct rcu_data, sname##_data)
+}
RCU_STATE_INITIALIZER(rcu_sched, 's', call_rcu_sched);
RCU_STATE_INITIALIZER(rcu_bh, 'b', call_rcu_bh);
*/
static int rcu_scheduler_fully_active __read_mostly;
+static void rcu_init_new_rnp(struct rcu_node *rnp_leaf);
+static void rcu_cleanup_dead_rnp(struct rcu_node *rnp_leaf);
static void rcu_boost_kthread_setaffinity(struct rcu_node *rnp, int outgoingcpu);
static void invoke_rcu_core(void);
static void invoke_rcu_callbacks(struct rcu_state *rsp, struct rcu_data *rdp);
static int kthread_prio = CONFIG_RCU_KTHREAD_PRIO;
module_param(kthread_prio, int, 0644);
+/* Delay in jiffies for grace-period initialization delays. */
+static int gp_init_delay = IS_ENABLED(CONFIG_RCU_TORTURE_TEST_SLOW_INIT)
+ ? CONFIG_RCU_TORTURE_TEST_SLOW_INIT_DELAY
+ : 0;
+module_param(gp_init_delay, int, 0644);
+
/*
* Track the rcutorture test sequence number and the update version
* number within a given test. The rcutorture_testseq is incremented
unsigned long rcutorture_testseq;
unsigned long rcutorture_vernum;
+/*
+ * Compute the mask of online CPUs for the specified rcu_node structure.
+ * This will not be stable unless the rcu_node structure's ->lock is
+ * held, but the bit corresponding to the current CPU will be stable
+ * in most contexts.
+ */
+unsigned long rcu_rnp_online_cpus(struct rcu_node *rnp)
+{
+ return ACCESS_ONCE(rnp->qsmaskinitnext);
+}
+
/*
* Return true if an RCU grace period is in progress. The ACCESS_ONCE()s
* permit this function to be invoked without holding the root rcu_node
EXPORT_SYMBOL_GPL(rcu_note_context_switch);
/*
- * Register a quiesecent state for all RCU flavors. If there is an
+ * Register a quiescent state for all RCU flavors. If there is an
* emergency, invoke rcu_momentary_dyntick_idle() to do a heavy-weight
* dyntick-idle quiescent state visible to other CPUs (but only for those
- * RCU flavors in desparate need of a quiescent state, which will normally
+ * RCU flavors in desperate need of a quiescent state, which will normally
* be none of them). Either way, do a lightweight quiescent state for
* all RCU flavors.
*/
}
EXPORT_SYMBOL_GPL(rcu_bh_force_quiescent_state);
+/*
+ * Force a quiescent state for RCU-sched.
+ */
+void rcu_sched_force_quiescent_state(void)
+{
+ force_quiescent_state(&rcu_sched_state);
+}
+EXPORT_SYMBOL_GPL(rcu_sched_force_quiescent_state);
+
/*
* Show the state of the grace-period kthreads.
*/
}
EXPORT_SYMBOL_GPL(rcutorture_record_progress);
-/*
- * Force a quiescent state for RCU-sched.
- */
-void rcu_sched_force_quiescent_state(void)
-{
- force_quiescent_state(&rcu_sched_state);
-}
-EXPORT_SYMBOL_GPL(rcu_sched_force_quiescent_state);
-
/*
* Does the CPU have callbacks ready to be invoked?
*/
preempt_disable();
rdp = this_cpu_ptr(&rcu_sched_data);
rnp = rdp->mynode;
- ret = (rdp->grpmask & rnp->qsmaskinit) ||
+ ret = (rdp->grpmask & rcu_rnp_online_cpus(rnp)) ||
!rcu_scheduler_fully_active;
preempt_enable();
return ret;
} else {
j = jiffies;
gpa = ACCESS_ONCE(rsp->gp_activity);
- pr_err("All QSes seen, last %s kthread activity %ld (%ld-%ld), jiffies_till_next_fqs=%ld\n",
+ pr_err("All QSes seen, last %s kthread activity %ld (%ld-%ld), jiffies_till_next_fqs=%ld, root ->qsmask %#lx\n",
rsp->name, j - gpa, j, gpa,
- jiffies_till_next_fqs);
+ jiffies_till_next_fqs,
+ rcu_get_root(rsp)->qsmask);
/* In this case, the current CPU might be at fault. */
sched_show_task(current);
}
}
/*
- * Initialize the specified rcu_data structure's callback list to empty.
+ * Initialize the specified rcu_data structure's default callback list
+ * to empty. The default callback list is the one that is not used by
+ * no-callbacks CPUs.
*/
-static void init_callback_list(struct rcu_data *rdp)
+static void init_default_callback_list(struct rcu_data *rdp)
{
int i;
- if (init_nocb_callback_list(rdp))
- return;
rdp->nxtlist = NULL;
for (i = 0; i < RCU_NEXT_SIZE; i++)
rdp->nxttail[i] = &rdp->nxtlist;
}
+/*
+ * Initialize the specified rcu_data structure's callback list to empty.
+ */
+static void init_callback_list(struct rcu_data *rdp)
+{
+ if (init_nocb_callback_list(rdp))
+ return;
+ init_default_callback_list(rdp);
+}
+
/*
* Determine the value that ->completed will have at the end of the
* next subsequent grace period. This is used to tag callbacks so that
*/
static int rcu_gp_init(struct rcu_state *rsp)
{
+ unsigned long oldmask;
struct rcu_data *rdp;
struct rcu_node *rnp = rcu_get_root(rsp);
ACCESS_ONCE(rsp->gp_activity) = jiffies;
- rcu_bind_gp_kthread();
raw_spin_lock_irq(&rnp->lock);
smp_mb__after_unlock_lock();
if (!ACCESS_ONCE(rsp->gp_flags)) {
trace_rcu_grace_period(rsp->name, rsp->gpnum, TPS("start"));
raw_spin_unlock_irq(&rnp->lock);
- /* Exclude any concurrent CPU-hotplug operations. */
- mutex_lock(&rsp->onoff_mutex);
- smp_mb__after_unlock_lock(); /* ->gpnum increment before GP! */
+ /*
+ * Apply per-leaf buffered online and offline operations to the
+ * rcu_node tree. Note that this new grace period need not wait
+ * for subsequent online CPUs, and that quiescent-state forcing
+ * will handle subsequent offline CPUs.
+ */
+ rcu_for_each_leaf_node(rsp, rnp) {
+ raw_spin_lock_irq(&rnp->lock);
+ smp_mb__after_unlock_lock();
+ if (rnp->qsmaskinit == rnp->qsmaskinitnext &&
+ !rnp->wait_blkd_tasks) {
+ /* Nothing to do on this leaf rcu_node structure. */
+ raw_spin_unlock_irq(&rnp->lock);
+ continue;
+ }
+
+ /* Record old state, apply changes to ->qsmaskinit field. */
+ oldmask = rnp->qsmaskinit;
+ rnp->qsmaskinit = rnp->qsmaskinitnext;
+
+ /* If zero-ness of ->qsmaskinit changed, propagate up tree. */
+ if (!oldmask != !rnp->qsmaskinit) {
+ if (!oldmask) /* First online CPU for this rcu_node. */
+ rcu_init_new_rnp(rnp);
+ else if (rcu_preempt_has_tasks(rnp)) /* blocked tasks */
+ rnp->wait_blkd_tasks = true;
+ else /* Last offline CPU and can propagate. */
+ rcu_cleanup_dead_rnp(rnp);
+ }
+
+ /*
+ * If all waited-on tasks from prior grace period are
+ * done, and if all this rcu_node structure's CPUs are
+ * still offline, propagate up the rcu_node tree and
+ * clear ->wait_blkd_tasks. Otherwise, if one of this
+ * rcu_node structure's CPUs has since come back online,
+ * simply clear ->wait_blkd_tasks (but rcu_cleanup_dead_rnp()
+ * checks for this, so just call it unconditionally).
+ */
+ if (rnp->wait_blkd_tasks &&
+ (!rcu_preempt_has_tasks(rnp) ||
+ rnp->qsmaskinit)) {
+ rnp->wait_blkd_tasks = false;
+ rcu_cleanup_dead_rnp(rnp);
+ }
+
+ raw_spin_unlock_irq(&rnp->lock);
+ }
/*
* Set the quiescent-state-needed bits in all the rcu_node
rcu_preempt_check_blocked_tasks(rnp);
rnp->qsmask = rnp->qsmaskinit;
ACCESS_ONCE(rnp->gpnum) = rsp->gpnum;
- WARN_ON_ONCE(rnp->completed != rsp->completed);
- ACCESS_ONCE(rnp->completed) = rsp->completed;
+ if (WARN_ON_ONCE(rnp->completed != rsp->completed))
+ ACCESS_ONCE(rnp->completed) = rsp->completed;
if (rnp == rdp->mynode)
(void)__note_gp_changes(rsp, rnp, rdp);
rcu_preempt_boost_start_gp(rnp);
raw_spin_unlock_irq(&rnp->lock);
cond_resched_rcu_qs();
ACCESS_ONCE(rsp->gp_activity) = jiffies;
+ if (IS_ENABLED(CONFIG_RCU_TORTURE_TEST_SLOW_INIT) &&
+ gp_init_delay > 0 &&
+ !(rsp->gpnum % (rcu_num_nodes * 10)))
+ schedule_timeout_uninterruptible(gp_init_delay);
}
- mutex_unlock(&rsp->onoff_mutex);
return 1;
}
fqs_state = RCU_FORCE_QS;
} else {
/* Handle dyntick-idle and offline CPUs. */
- isidle = false;
+ isidle = true;
force_qs_rnp(rsp, rcu_implicit_dynticks_qs, &isidle, &maxj);
}
/* Clear flag to prevent immediate re-entry. */
rcu_for_each_node_breadth_first(rsp, rnp) {
raw_spin_lock_irq(&rnp->lock);
smp_mb__after_unlock_lock();
+ WARN_ON_ONCE(rcu_preempt_blocked_readers_cgp(rnp));
+ WARN_ON_ONCE(rnp->qsmask);
ACCESS_ONCE(rnp->completed) = rsp->gpnum;
rdp = this_cpu_ptr(rsp->rda);
if (rnp == rdp->mynode)
struct rcu_state *rsp = arg;
struct rcu_node *rnp = rcu_get_root(rsp);
+ rcu_bind_gp_kthread();
for (;;) {
/* Handle grace-period start. */
* Similar to rcu_report_qs_rdp(), for which it is a helper function.
* Allows quiescent states for a group of CPUs to be reported at one go
* to the specified rcu_node structure, though all the CPUs in the group
- * must be represented by the same rcu_node structure (which need not be
- * a leaf rcu_node structure, though it often will be). That structure's
- * lock must be held upon entry, and it is released before return.
+ * must be represented by the same rcu_node structure (which need not be a
+ * leaf rcu_node structure, though it often will be). The gps parameter
+ * is the grace-period snapshot, which means that the quiescent states
+ * are valid only if rnp->gpnum is equal to gps. That structure's lock
+ * must be held upon entry, and it is released before return.
*/
static void
rcu_report_qs_rnp(unsigned long mask, struct rcu_state *rsp,
- struct rcu_node *rnp, unsigned long flags)
+ struct rcu_node *rnp, unsigned long gps, unsigned long flags)
__releases(rnp->lock)
{
+ unsigned long oldmask = 0;
struct rcu_node *rnp_c;
/* Walk up the rcu_node hierarchy. */
for (;;) {
- if (!(rnp->qsmask & mask)) {
+ if (!(rnp->qsmask & mask) || rnp->gpnum != gps) {
- /* Our bit has already been cleared, so done. */
+ /*
+ * Our bit has already been cleared, or the
+ * relevant grace period is already over, so done.
+ */
raw_spin_unlock_irqrestore(&rnp->lock, flags);
return;
}
+ WARN_ON_ONCE(oldmask); /* Any child must be all zeroed! */
rnp->qsmask &= ~mask;
trace_rcu_quiescent_state_report(rsp->name, rnp->gpnum,
mask, rnp->qsmask, rnp->level,
rnp = rnp->parent;
raw_spin_lock_irqsave(&rnp->lock, flags);
smp_mb__after_unlock_lock();
- WARN_ON_ONCE(rnp_c->qsmask);
+ oldmask = rnp_c->qsmask;
}
/*
rcu_report_qs_rsp(rsp, flags); /* releases rnp->lock. */
}
+/*
+ * Record a quiescent state for all tasks that were previously queued
+ * on the specified rcu_node structure and that were blocking the current
+ * RCU grace period. The caller must hold the specified rnp->lock with
+ * irqs disabled, and this lock is released upon return, but irqs remain
+ * disabled.
+ */
+static void rcu_report_unblock_qs_rnp(struct rcu_state *rsp,
+ struct rcu_node *rnp, unsigned long flags)
+ __releases(rnp->lock)
+{
+ unsigned long gps;
+ unsigned long mask;
+ struct rcu_node *rnp_p;
+
+ if (rcu_state_p == &rcu_sched_state || rsp != rcu_state_p ||
+ rnp->qsmask != 0 || rcu_preempt_blocked_readers_cgp(rnp)) {
+ raw_spin_unlock_irqrestore(&rnp->lock, flags);
+ return; /* Still need more quiescent states! */
+ }
+
+ rnp_p = rnp->parent;
+ if (rnp_p == NULL) {
+ /*
+ * Only one rcu_node structure in the tree, so don't
+ * try to report up to its nonexistent parent!
+ */
+ rcu_report_qs_rsp(rsp, flags);
+ return;
+ }
+
+ /* Report up the rest of the hierarchy, tracking current ->gpnum. */
+ gps = rnp->gpnum;
+ mask = rnp->grpmask;
+ raw_spin_unlock(&rnp->lock); /* irqs remain disabled. */
+ raw_spin_lock(&rnp_p->lock); /* irqs already disabled. */
+ smp_mb__after_unlock_lock();
+ rcu_report_qs_rnp(mask, rsp, rnp_p, gps, flags);
+}
+
/*
* Record a quiescent state for the specified CPU to that CPU's rcu_data
* structure. This must be either called from the specified CPU, or
*/
needwake = rcu_accelerate_cbs(rsp, rnp, rdp);
- rcu_report_qs_rnp(mask, rsp, rnp, flags); /* rlses rnp->lock */
+ rcu_report_qs_rnp(mask, rsp, rnp, rnp->gpnum, flags);
+ /* ^^^ Released rnp->lock */
if (needwake)
rcu_gp_kthread_wake(rsp);
}
rsp->orphan_donetail = rdp->nxttail[RCU_DONE_TAIL];
}
- /* Finally, initialize the rcu_data structure's list to empty. */
+ /*
+ * Finally, initialize the rcu_data structure's list to empty and
+ * disallow further callbacks on this CPU.
+ */
init_callback_list(rdp);
+ rdp->nxttail[RCU_NEXT_TAIL] = NULL;
}
/*
raw_spin_lock(&rnp->lock); /* irqs already disabled. */
smp_mb__after_unlock_lock(); /* GP memory ordering. */
rnp->qsmaskinit &= ~mask;
+ rnp->qsmask &= ~mask;
if (rnp->qsmaskinit) {
raw_spin_unlock(&rnp->lock); /* irqs remain disabled. */
return;
}
}
+/*
+ * The CPU is exiting the idle loop into the arch_cpu_idle_dead()
+ * function. We now remove it from the rcu_node tree's ->qsmaskinit
+ * bit masks.
+ */
+static void rcu_cleanup_dying_idle_cpu(int cpu, struct rcu_state *rsp)
+{
+ unsigned long flags;
+ unsigned long mask;
+ struct rcu_data *rdp = per_cpu_ptr(rsp->rda, cpu);
+ struct rcu_node *rnp = rdp->mynode; /* Outgoing CPU's rdp & rnp. */
+
+ /* Remove outgoing CPU from mask in the leaf rcu_node structure. */
+ mask = rdp->grpmask;
+ raw_spin_lock_irqsave(&rnp->lock, flags);
+ smp_mb__after_unlock_lock(); /* Enforce GP memory-order guarantee. */
+ rnp->qsmaskinitnext &= ~mask;
+ raw_spin_unlock_irqrestore(&rnp->lock, flags);
+}
+
/*
* The CPU has been completely removed, and some other CPU is reporting
* this fact from process context. Do the remainder of the cleanup,
/* Adjust any no-longer-needed kthreads. */
rcu_boost_kthread_setaffinity(rnp, -1);
- /* Exclude any attempts to start a new grace period. */
- mutex_lock(&rsp->onoff_mutex);
- raw_spin_lock_irqsave(&rsp->orphan_lock, flags);
-
/* Orphan the dead CPU's callbacks, and adopt them if appropriate. */
+ raw_spin_lock_irqsave(&rsp->orphan_lock, flags);
rcu_send_cbs_to_orphanage(cpu, rsp, rnp, rdp);
rcu_adopt_orphan_cbs(rsp, flags);
raw_spin_unlock_irqrestore(&rsp->orphan_lock, flags);
- /* Remove outgoing CPU from mask in the leaf rcu_node structure. */
- raw_spin_lock_irqsave(&rnp->lock, flags);
- smp_mb__after_unlock_lock(); /* Enforce GP memory-order guarantee. */
- rnp->qsmaskinit &= ~rdp->grpmask;
- if (rnp->qsmaskinit == 0 && !rcu_preempt_has_tasks(rnp))
- rcu_cleanup_dead_rnp(rnp);
- rcu_report_qs_rnp(rdp->grpmask, rsp, rnp, flags); /* Rlses rnp->lock. */
WARN_ONCE(rdp->qlen != 0 || rdp->nxtlist != NULL,
"rcu_cleanup_dead_cpu: Callbacks on offline CPU %d: qlen=%lu, nxtlist=%p\n",
cpu, rdp->qlen, rdp->nxtlist);
- init_callback_list(rdp);
- /* Disallow further callbacks on this CPU. */
- rdp->nxttail[RCU_NEXT_TAIL] = NULL;
- mutex_unlock(&rsp->onoff_mutex);
}
#else /* #ifdef CONFIG_HOTPLUG_CPU */
{
}
+static void rcu_cleanup_dying_idle_cpu(int cpu, struct rcu_state *rsp)
+{
+}
+
static void rcu_cleanup_dead_cpu(int cpu, struct rcu_state *rsp)
{
}
return;
}
if (rnp->qsmask == 0) {
- rcu_initiate_boost(rnp, flags); /* releases rnp->lock */
- continue;
+ if (rcu_state_p == &rcu_sched_state ||
+ rsp != rcu_state_p ||
+ rcu_preempt_blocked_readers_cgp(rnp)) {
+ /*
+ * No point in scanning bits because they
+ * are all zero. But we might need to
+ * priority-boost blocked readers.
+ */
+ rcu_initiate_boost(rnp, flags);
+ /* rcu_initiate_boost() releases rnp->lock */
+ continue;
+ }
+ if (rnp->parent &&
+ (rnp->parent->qsmask & rnp->grpmask)) {
+ /*
+ * Race between grace-period
+ * initialization and task exiting RCU
+ * read-side critical section: Report.
+ */
+ rcu_report_unblock_qs_rnp(rsp, rnp, flags);
+ /* rcu_report_unblock_qs_rnp() rlses ->lock */
+ continue;
+ }
}
cpu = rnp->grplo;
bit = 1;
for (; cpu <= rnp->grphi; cpu++, bit <<= 1) {
if ((rnp->qsmask & bit) != 0) {
- if ((rnp->qsmaskinit & bit) != 0)
- *isidle = false;
+ if ((rnp->qsmaskinit & bit) == 0)
+ *isidle = false; /* Pending hotplug. */
if (f(per_cpu_ptr(rsp->rda, cpu), isidle, maxj))
mask |= bit;
}
}
if (mask != 0) {
-
- /* rcu_report_qs_rnp() releases rnp->lock. */
- rcu_report_qs_rnp(mask, rsp, rnp, flags);
- continue;
+ /* Idle/offline CPUs, report (releases rnp->lock. */
+ rcu_report_qs_rnp(mask, rsp, rnp, rnp->gpnum, flags);
+ } else {
+ /* Nothing to do here, so just drop the lock. */
+ raw_spin_unlock_irqrestore(&rnp->lock, flags);
}
- raw_spin_unlock_irqrestore(&rnp->lock, flags);
}
}
* If called from an extended quiescent state, invoke the RCU
* core in order to force a re-evaluation of RCU's idleness.
*/
- if (!rcu_is_watching() && cpu_online(smp_processor_id()))
+ if (!rcu_is_watching())
invoke_rcu_core();
/* If interrupts were disabled or CPU offline, don't invoke RCU core. */
if (cpu != -1)
rdp = per_cpu_ptr(rsp->rda, cpu);
- offline = !__call_rcu_nocb(rdp, head, lazy, flags);
- WARN_ON_ONCE(offline);
- /* _call_rcu() is illegal on offline CPU; leak the callback. */
- local_irq_restore(flags);
- return;
+ if (likely(rdp->mynode)) {
+ /* Post-boot, so this should be for a no-CBs CPU. */
+ offline = !__call_rcu_nocb(rdp, head, lazy, flags);
+ WARN_ON_ONCE(offline);
+ /* Offline CPU, _call_rcu() illegal, leak callback. */
+ local_irq_restore(flags);
+ return;
+ }
+ /*
+ * Very early boot, before rcu_init(). Initialize if needed
+ * and then drop through to queue the callback.
+ */
+ BUG_ON(cpu != -1);
+ WARN_ON_ONCE(!rcu_is_watching());
+ if (!likely(rdp->nxtlist))
+ init_default_callback_list(rdp);
}
ACCESS_ONCE(rdp->qlen) = rdp->qlen + 1;
if (lazy)
"Illegal synchronize_sched() in RCU-sched read-side critical section");
if (rcu_blocking_is_gp())
return;
- if (rcu_expedited)
+ if (rcu_gp_is_expedited())
synchronize_sched_expedited();
else
wait_rcu_gp(call_rcu_sched);
"Illegal synchronize_rcu_bh() in RCU-bh read-side critical section");
if (rcu_blocking_is_gp())
return;
- if (rcu_expedited)
+ if (rcu_gp_is_expedited())
synchronize_rcu_bh_expedited();
else
wait_rcu_gp(call_rcu_bh);
}
EXPORT_SYMBOL_GPL(rcu_barrier_sched);
+/*
+ * Propagate ->qsinitmask bits up the rcu_node tree to account for the
+ * first CPU in a given leaf rcu_node structure coming online. The caller
+ * must hold the corresponding leaf rcu_node ->lock with interrrupts
+ * disabled.
+ */
+static void rcu_init_new_rnp(struct rcu_node *rnp_leaf)
+{
+ long mask;
+ struct rcu_node *rnp = rnp_leaf;
+
+ for (;;) {
+ mask = rnp->grpmask;
+ rnp = rnp->parent;
+ if (rnp == NULL)
+ return;
+ raw_spin_lock(&rnp->lock); /* Interrupts already disabled. */
+ rnp->qsmaskinit |= mask;
+ raw_spin_unlock(&rnp->lock); /* Interrupts remain disabled. */
+ }
+}
+
/*
* Do boot-time initialization of a CPU's per-CPU RCU data.
*/
struct rcu_data *rdp = per_cpu_ptr(rsp->rda, cpu);
struct rcu_node *rnp = rcu_get_root(rsp);
- /* Exclude new grace periods. */
- mutex_lock(&rsp->onoff_mutex);
-
/* Set up local state, ensuring consistent view of global state. */
raw_spin_lock_irqsave(&rnp->lock, flags);
rdp->beenonline = 1; /* We have now been online. */
rdp->qlen_last_fqs_check = 0;
rdp->n_force_qs_snap = rsp->n_force_qs;
rdp->blimit = blimit;
- init_callback_list(rdp); /* Re-enable callbacks on this CPU. */
+ if (!rdp->nxtlist)
+ init_callback_list(rdp); /* Re-enable callbacks on this CPU. */
rdp->dynticks->dynticks_nesting = DYNTICK_TASK_EXIT_IDLE;
rcu_sysidle_init_percpu_data(rdp->dynticks);
atomic_set(&rdp->dynticks->dynticks,
(atomic_read(&rdp->dynticks->dynticks) & ~0x1) + 1);
raw_spin_unlock(&rnp->lock); /* irqs remain disabled. */
- /* Add CPU to rcu_node bitmasks. */
+ /*
+ * Add CPU to leaf rcu_node pending-online bitmask. Any needed
+ * propagation up the rcu_node tree will happen at the beginning
+ * of the next grace period.
+ */
rnp = rdp->mynode;
mask = rdp->grpmask;
- do {
- /* Exclude any attempts to start a new GP on small systems. */
- raw_spin_lock(&rnp->lock); /* irqs already disabled. */
- rnp->qsmaskinit |= mask;
- mask = rnp->grpmask;
- if (rnp == rdp->mynode) {
- /*
- * If there is a grace period in progress, we will
- * set up to wait for it next time we run the
- * RCU core code.
- */
- rdp->gpnum = rnp->completed;
- rdp->completed = rnp->completed;
- rdp->passed_quiesce = 0;
- rdp->rcu_qs_ctr_snap = __this_cpu_read(rcu_qs_ctr);
- rdp->qs_pending = 0;
- trace_rcu_grace_period(rsp->name, rdp->gpnum, TPS("cpuonl"));
- }
- raw_spin_unlock(&rnp->lock); /* irqs already disabled. */
- rnp = rnp->parent;
- } while (rnp != NULL && !(rnp->qsmaskinit & mask));
- local_irq_restore(flags);
-
- mutex_unlock(&rsp->onoff_mutex);
+ raw_spin_lock(&rnp->lock); /* irqs already disabled. */
+ smp_mb__after_unlock_lock();
+ rnp->qsmaskinitnext |= mask;
+ rdp->gpnum = rnp->completed; /* Make CPU later note any new GP. */
+ rdp->completed = rnp->completed;
+ rdp->passed_quiesce = false;
+ rdp->rcu_qs_ctr_snap = __this_cpu_read(rcu_qs_ctr);
+ rdp->qs_pending = false;
+ trace_rcu_grace_period(rsp->name, rdp->gpnum, TPS("cpuonl"));
+ raw_spin_unlock_irqrestore(&rnp->lock, flags);
}
static void rcu_prepare_cpu(int cpu)
/*
* Handle CPU online/offline notification events.
*/
-static int rcu_cpu_notify(struct notifier_block *self,
- unsigned long action, void *hcpu)
+int rcu_cpu_notify(struct notifier_block *self,
+ unsigned long action, void *hcpu)
{
long cpu = (long)hcpu;
struct rcu_data *rdp = per_cpu_ptr(rcu_state_p->rda, cpu);
struct rcu_node *rnp = rdp->mynode;
struct rcu_state *rsp;
- trace_rcu_utilization(TPS("Start CPU hotplug"));
switch (action) {
case CPU_UP_PREPARE:
case CPU_UP_PREPARE_FROZEN:
for_each_rcu_flavor(rsp)
rcu_cleanup_dying_cpu(rsp);
break;
+ case CPU_DYING_IDLE:
+ for_each_rcu_flavor(rsp) {
+ rcu_cleanup_dying_idle_cpu(cpu, rsp);
+ }
+ break;
case CPU_DEAD:
case CPU_DEAD_FROZEN:
case CPU_UP_CANCELED:
default:
break;
}
- trace_rcu_utilization(TPS("End CPU hotplug"));
return NOTIFY_OK;
}
case PM_HIBERNATION_PREPARE:
case PM_SUSPEND_PREPARE:
if (nr_cpu_ids <= 256) /* Expediting bad for large systems. */
- rcu_expedited = 1;
+ rcu_expedite_gp();
break;
case PM_POST_HIBERNATION:
case PM_POST_SUSPEND:
- rcu_expedited = 0;
+ if (nr_cpu_ids <= 256) /* Expediting bad for large systems. */
+ rcu_unexpedite_gp();
break;
default:
break;
* Compute the per-level fanout, either using the exact fanout specified
* or balancing the tree, depending on CONFIG_RCU_FANOUT_EXACT.
*/
-#ifdef CONFIG_RCU_FANOUT_EXACT
-static void __init rcu_init_levelspread(struct rcu_state *rsp)
-{
- int i;
-
- rsp->levelspread[rcu_num_lvls - 1] = rcu_fanout_leaf;
- for (i = rcu_num_lvls - 2; i >= 0; i--)
- rsp->levelspread[i] = CONFIG_RCU_FANOUT;
-}
-#else /* #ifdef CONFIG_RCU_FANOUT_EXACT */
static void __init rcu_init_levelspread(struct rcu_state *rsp)
{
- int ccur;
- int cprv;
int i;
- cprv = nr_cpu_ids;
- for (i = rcu_num_lvls - 1; i >= 0; i--) {
- ccur = rsp->levelcnt[i];
- rsp->levelspread[i] = (cprv + ccur - 1) / ccur;
- cprv = ccur;
+ if (IS_ENABLED(CONFIG_RCU_FANOUT_EXACT)) {
+ rsp->levelspread[rcu_num_lvls - 1] = rcu_fanout_leaf;
+ for (i = rcu_num_lvls - 2; i >= 0; i--)
+ rsp->levelspread[i] = CONFIG_RCU_FANOUT;
+ } else {
+ int ccur;
+ int cprv;
+
+ cprv = nr_cpu_ids;
+ for (i = rcu_num_lvls - 1; i >= 0; i--) {
+ ccur = rsp->levelcnt[i];
+ rsp->levelspread[i] = (cprv + ccur - 1) / ccur;
+ cprv = ccur;
+ }
}
}
-#endif /* #else #ifdef CONFIG_RCU_FANOUT_EXACT */
/*
* Helper function for rcu_init() that initializes one rcu_state structure.
}
}
- rsp->rda = rda;
init_waitqueue_head(&rsp->gp_wq);
rnp = rsp->level[rcu_num_lvls - 1];
for_each_possible_cpu(i) {
{
int cpu;
+ rcu_early_boot_tests();
+
rcu_bootup_announce();
rcu_init_geometry();
rcu_init_one(&rcu_bh_state, &rcu_bh_data);
pm_notifier(rcu_pm_notify, 0);
for_each_online_cpu(cpu)
rcu_cpu_notify(NULL, CPU_UP_PREPARE, (void *)(long)cpu);
-
- rcu_early_boot_tests();
}
#include "tree_plugin.h"
/* complete (only for PREEMPT_RCU). */
unsigned long qsmaskinit;
/* Per-GP initial value for qsmask & expmask. */
+ /* Initialized from ->qsmaskinitnext at the */
+ /* beginning of each grace period. */
+ unsigned long qsmaskinitnext;
+ /* Online CPUs for next grace period. */
unsigned long grpmask; /* Mask to apply to parent qsmask. */
/* Only one bit will be set in this mask. */
int grplo; /* lowest-numbered CPU or group here. */
int grphi; /* highest-numbered CPU or group here. */
u8 grpnum; /* CPU/group number for next level up. */
u8 level; /* root is at level 0. */
+ bool wait_blkd_tasks;/* Necessary to wait for blocked tasks to */
+ /* exit RCU read-side critical sections */
+ /* before propagating offline up the */
+ /* rcu_node tree? */
struct rcu_node *parent;
struct list_head blkd_tasks;
/* Tasks blocked in RCU read-side critical */
long qlen; /* Total number of callbacks. */
/* End of fields guarded by orphan_lock. */
- struct mutex onoff_mutex; /* Coordinate hotplug & GPs. */
-
struct mutex barrier_mutex; /* Guards barrier fields. */
atomic_t barrier_cpu_count; /* # CPUs waiting on. */
struct completion barrier_completion; /* Wake at barrier end. */
static void rcu_cleanup_after_idle(void);
static void rcu_prepare_for_idle(void);
static void rcu_idle_count_callbacks_posted(void);
+static bool rcu_preempt_has_tasks(struct rcu_node *rnp);
static void print_cpu_stall_info_begin(void);
static void print_cpu_stall_info(struct rcu_state *rsp, int cpu);
static void print_cpu_stall_info_end(void);
*/
static void __init rcu_bootup_announce_oddness(void)
{
-#ifdef CONFIG_RCU_TRACE
- pr_info("\tRCU debugfs-based tracing is enabled.\n");
-#endif
-#if (defined(CONFIG_64BIT) && CONFIG_RCU_FANOUT != 64) || (!defined(CONFIG_64BIT) && CONFIG_RCU_FANOUT != 32)
- pr_info("\tCONFIG_RCU_FANOUT set to non-default value of %d\n",
- CONFIG_RCU_FANOUT);
-#endif
-#ifdef CONFIG_RCU_FANOUT_EXACT
- pr_info("\tHierarchical RCU autobalancing is disabled.\n");
-#endif
-#ifdef CONFIG_RCU_FAST_NO_HZ
- pr_info("\tRCU dyntick-idle grace-period acceleration is enabled.\n");
-#endif
-#ifdef CONFIG_PROVE_RCU
- pr_info("\tRCU lockdep checking is enabled.\n");
-#endif
-#ifdef CONFIG_RCU_TORTURE_TEST_RUNNABLE
- pr_info("\tRCU torture testing starts during boot.\n");
-#endif
-#if defined(CONFIG_RCU_CPU_STALL_INFO)
- pr_info("\tAdditional per-CPU info printed with stalls.\n");
-#endif
-#if NUM_RCU_LVL_4 != 0
- pr_info("\tFour-level hierarchy is enabled.\n");
-#endif
+ if (IS_ENABLED(CONFIG_RCU_TRACE))
+ pr_info("\tRCU debugfs-based tracing is enabled.\n");
+ if ((IS_ENABLED(CONFIG_64BIT) && CONFIG_RCU_FANOUT != 64) ||
+ (!IS_ENABLED(CONFIG_64BIT) && CONFIG_RCU_FANOUT != 32))
+ pr_info("\tCONFIG_RCU_FANOUT set to non-default value of %d\n",
+ CONFIG_RCU_FANOUT);
+ if (IS_ENABLED(CONFIG_RCU_FANOUT_EXACT))
+ pr_info("\tHierarchical RCU autobalancing is disabled.\n");
+ if (IS_ENABLED(CONFIG_RCU_FAST_NO_HZ))
+ pr_info("\tRCU dyntick-idle grace-period acceleration is enabled.\n");
+ if (IS_ENABLED(CONFIG_PROVE_RCU))
+ pr_info("\tRCU lockdep checking is enabled.\n");
+ if (IS_ENABLED(CONFIG_RCU_TORTURE_TEST_RUNNABLE))
+ pr_info("\tRCU torture testing starts during boot.\n");
+ if (IS_ENABLED(CONFIG_RCU_CPU_STALL_INFO))
+ pr_info("\tAdditional per-CPU info printed with stalls.\n");
+ if (NUM_RCU_LVL_4 != 0)
+ pr_info("\tFour-level hierarchy is enabled.\n");
+ if (CONFIG_RCU_FANOUT_LEAF != 16)
+ pr_info("\tBuild-time adjustment of leaf fanout to %d.\n",
+ CONFIG_RCU_FANOUT_LEAF);
if (rcu_fanout_leaf != CONFIG_RCU_FANOUT_LEAF)
pr_info("\tBoot-time adjustment of leaf fanout to %d.\n", rcu_fanout_leaf);
if (nr_cpu_ids != NR_CPUS)
pr_info("\tRCU restricting CPUs from NR_CPUS=%d to nr_cpu_ids=%d.\n", NR_CPUS, nr_cpu_ids);
-#ifdef CONFIG_RCU_BOOST
- pr_info("\tRCU kthread priority: %d.\n", kthread_prio);
-#endif
+ if (IS_ENABLED(CONFIG_RCU_BOOST))
+ pr_info("\tRCU kthread priority: %d.\n", kthread_prio);
}
#ifdef CONFIG_PREEMPT_RCU
* But first, note that the current CPU must still be
* on line!
*/
- WARN_ON_ONCE((rdp->grpmask & rnp->qsmaskinit) == 0);
+ WARN_ON_ONCE((rdp->grpmask & rcu_rnp_online_cpus(rnp)) == 0);
WARN_ON_ONCE(!list_empty(&t->rcu_node_entry));
if ((rnp->qsmask & rdp->grpmask) && rnp->gp_tasks != NULL) {
list_add(&t->rcu_node_entry, rnp->gp_tasks->prev);
return rnp->gp_tasks != NULL;
}
-/*
- * Record a quiescent state for all tasks that were previously queued
- * on the specified rcu_node structure and that were blocking the current
- * RCU grace period. The caller must hold the specified rnp->lock with
- * irqs disabled, and this lock is released upon return, but irqs remain
- * disabled.
- */
-static void rcu_report_unblock_qs_rnp(struct rcu_node *rnp, unsigned long flags)
- __releases(rnp->lock)
-{
- unsigned long mask;
- struct rcu_node *rnp_p;
-
- if (rnp->qsmask != 0 || rcu_preempt_blocked_readers_cgp(rnp)) {
- raw_spin_unlock_irqrestore(&rnp->lock, flags);
- return; /* Still need more quiescent states! */
- }
-
- rnp_p = rnp->parent;
- if (rnp_p == NULL) {
- /*
- * Either there is only one rcu_node in the tree,
- * or tasks were kicked up to root rcu_node due to
- * CPUs going offline.
- */
- rcu_report_qs_rsp(&rcu_preempt_state, flags);
- return;
- }
-
- /* Report up the rest of the hierarchy. */
- mask = rnp->grpmask;
- raw_spin_unlock(&rnp->lock); /* irqs remain disabled. */
- raw_spin_lock(&rnp_p->lock); /* irqs already disabled. */
- smp_mb__after_unlock_lock();
- rcu_report_qs_rnp(mask, &rcu_preempt_state, rnp_p, flags);
-}
-
/*
* Advance a ->blkd_tasks-list pointer to the next entry, instead
* returning NULL if at the end of the list.
*/
void rcu_read_unlock_special(struct task_struct *t)
{
- bool empty;
bool empty_exp;
bool empty_norm;
bool empty_exp_now;
}
/* Hardware IRQ handlers cannot block, complain if they get here. */
- if (WARN_ON_ONCE(in_irq() || in_serving_softirq())) {
+ if (in_irq() || in_serving_softirq()) {
+ lockdep_rcu_suspicious(__FILE__, __LINE__,
+ "rcu_read_unlock() from irq or softirq with blocking in critical section!!!\n");
+ pr_alert("->rcu_read_unlock_special: %#x (b: %d, nq: %d)\n",
+ t->rcu_read_unlock_special.s,
+ t->rcu_read_unlock_special.b.blocked,
+ t->rcu_read_unlock_special.b.need_qs);
local_irq_restore(flags);
return;
}
break;
raw_spin_unlock(&rnp->lock); /* irqs remain disabled. */
}
- empty = !rcu_preempt_has_tasks(rnp);
empty_norm = !rcu_preempt_blocked_readers_cgp(rnp);
empty_exp = !rcu_preempted_readers_exp(rnp);
smp_mb(); /* ensure expedited fastpath sees end of RCU c-s. */
drop_boost_mutex = rt_mutex_owner(&rnp->boost_mtx) == t;
#endif /* #ifdef CONFIG_RCU_BOOST */
- /*
- * If this was the last task on the list, go see if we
- * need to propagate ->qsmaskinit bit clearing up the
- * rcu_node tree.
- */
- if (!empty && !rcu_preempt_has_tasks(rnp))
- rcu_cleanup_dead_rnp(rnp);
-
/*
* If this was the last task on the current list, and if
* we aren't waiting on any CPUs, report the quiescent state.
rnp->grplo,
rnp->grphi,
!!rnp->gp_tasks);
- rcu_report_unblock_qs_rnp(rnp, flags);
+ rcu_report_unblock_qs_rnp(&rcu_preempt_state,
+ rnp, flags);
} else {
raw_spin_unlock_irqrestore(&rnp->lock, flags);
}
WARN_ON_ONCE(rnp->qsmask);
}
-#ifdef CONFIG_HOTPLUG_CPU
-
-#endif /* #ifdef CONFIG_HOTPLUG_CPU */
-
/*
* Check for a quiescent state from the current CPU. When a task blocks,
* the task is recorded in the corresponding CPU's rcu_node structure,
"Illegal synchronize_rcu() in RCU read-side critical section");
if (!rcu_scheduler_active)
return;
- if (rcu_expedited)
+ if (rcu_gp_is_expedited())
synchronize_rcu_expedited();
else
wait_rcu_gp(call_rcu);
* recursively up the tree. (Calm down, calm down, we do the recursion
* iteratively!)
*
- * Most callers will set the "wake" flag, but the task initiating the
- * expedited grace period need not wake itself.
- *
* Caller must hold sync_rcu_preempt_exp_mutex.
*/
static void rcu_report_exp_rnp(struct rcu_state *rsp, struct rcu_node *rnp,
/*
* Snapshot the tasks blocking the newly started preemptible-RCU expedited
- * grace period for the specified rcu_node structure. If there are no such
- * tasks, report it up the rcu_node hierarchy.
+ * grace period for the specified rcu_node structure, phase 1. If there
+ * are such tasks, set the ->expmask bits up the rcu_node tree and also
+ * set the ->expmask bits on the leaf rcu_node structures to tell phase 2
+ * that work is needed here.
*
- * Caller must hold sync_rcu_preempt_exp_mutex and must exclude
- * CPU hotplug operations.
+ * Caller must hold sync_rcu_preempt_exp_mutex.
*/
static void
-sync_rcu_preempt_exp_init(struct rcu_state *rsp, struct rcu_node *rnp)
+sync_rcu_preempt_exp_init1(struct rcu_state *rsp, struct rcu_node *rnp)
{
unsigned long flags;
- int must_wait = 0;
+ unsigned long mask;
+ struct rcu_node *rnp_up;
raw_spin_lock_irqsave(&rnp->lock, flags);
smp_mb__after_unlock_lock();
+ WARN_ON_ONCE(rnp->expmask);
+ WARN_ON_ONCE(rnp->exp_tasks);
if (!rcu_preempt_has_tasks(rnp)) {
+ /* No blocked tasks, nothing to do. */
raw_spin_unlock_irqrestore(&rnp->lock, flags);
- } else {
+ return;
+ }
+ /* Call for Phase 2 and propagate ->expmask bits up the tree. */
+ rnp->expmask = 1;
+ rnp_up = rnp;
+ while (rnp_up->parent) {
+ mask = rnp_up->grpmask;
+ rnp_up = rnp_up->parent;
+ if (rnp_up->expmask & mask)
+ break;
+ raw_spin_lock(&rnp_up->lock); /* irqs already off */
+ smp_mb__after_unlock_lock();
+ rnp_up->expmask |= mask;
+ raw_spin_unlock(&rnp_up->lock); /* irqs still off */
+ }
+ raw_spin_unlock_irqrestore(&rnp->lock, flags);
+}
+
+/*
+ * Snapshot the tasks blocking the newly started preemptible-RCU expedited
+ * grace period for the specified rcu_node structure, phase 2. If the
+ * leaf rcu_node structure has its ->expmask field set, check for tasks.
+ * If there are some, clear ->expmask and set ->exp_tasks accordingly,
+ * then initiate RCU priority boosting. Otherwise, clear ->expmask and
+ * invoke rcu_report_exp_rnp() to clear out the upper-level ->expmask bits,
+ * enabling rcu_read_unlock_special() to do the bit-clearing.
+ *
+ * Caller must hold sync_rcu_preempt_exp_mutex.
+ */
+static void
+sync_rcu_preempt_exp_init2(struct rcu_state *rsp, struct rcu_node *rnp)
+{
+ unsigned long flags;
+
+ raw_spin_lock_irqsave(&rnp->lock, flags);
+ smp_mb__after_unlock_lock();
+ if (!rnp->expmask) {
+ /* Phase 1 didn't do anything, so Phase 2 doesn't either. */
+ raw_spin_unlock_irqrestore(&rnp->lock, flags);
+ return;
+ }
+
+ /* Phase 1 is over. */
+ rnp->expmask = 0;
+
+ /*
+ * If there are still blocked tasks, set up ->exp_tasks so that
+ * rcu_read_unlock_special() will wake us and then boost them.
+ */
+ if (rcu_preempt_has_tasks(rnp)) {
rnp->exp_tasks = rnp->blkd_tasks.next;
rcu_initiate_boost(rnp, flags); /* releases rnp->lock */
- must_wait = 1;
+ return;
}
- if (!must_wait)
- rcu_report_exp_rnp(rsp, rnp, false); /* Don't wake self. */
+
+ /* No longer any blocked tasks, so undo bit setting. */
+ raw_spin_unlock_irqrestore(&rnp->lock, flags);
+ rcu_report_exp_rnp(rsp, rnp, false);
}
/**
*/
void synchronize_rcu_expedited(void)
{
- unsigned long flags;
struct rcu_node *rnp;
struct rcu_state *rsp = &rcu_preempt_state;
unsigned long snap;
/* force all RCU readers onto ->blkd_tasks lists. */
synchronize_sched_expedited();
- /* Initialize ->expmask for all non-leaf rcu_node structures. */
- rcu_for_each_nonleaf_node_breadth_first(rsp, rnp) {
- raw_spin_lock_irqsave(&rnp->lock, flags);
- smp_mb__after_unlock_lock();
- rnp->expmask = rnp->qsmaskinit;
- raw_spin_unlock_irqrestore(&rnp->lock, flags);
- }
-
- /* Snapshot current state of ->blkd_tasks lists. */
+ /*
+ * Snapshot current state of ->blkd_tasks lists into ->expmask.
+ * Phase 1 sets bits and phase 2 permits rcu_read_unlock_special()
+ * to start clearing them. Doing this in one phase leads to
+ * strange races between setting and clearing bits, so just say "no"!
+ */
+ rcu_for_each_leaf_node(rsp, rnp)
+ sync_rcu_preempt_exp_init1(rsp, rnp);
rcu_for_each_leaf_node(rsp, rnp)
- sync_rcu_preempt_exp_init(rsp, rnp);
- if (NUM_RCU_NODES > 1)
- sync_rcu_preempt_exp_init(rsp, rcu_get_root(rsp));
+ sync_rcu_preempt_exp_init2(rsp, rnp);
put_online_cpus();
return 0;
}
-#ifdef CONFIG_HOTPLUG_CPU
-
/*
* Because there is no preemptible RCU, there can be no readers blocked.
*/
return false;
}
-#endif /* #ifdef CONFIG_HOTPLUG_CPU */
-
/*
* Because preemptible RCU does not exist, we never have to check for
* tasks blocked within RCU read-side critical sections.
* Returns zero if all is well, a negated errno otherwise.
*/
static int rcu_spawn_one_boost_kthread(struct rcu_state *rsp,
- struct rcu_node *rnp)
+ struct rcu_node *rnp)
{
int rnp_index = rnp - &rsp->node[0];
unsigned long flags;
if (&rcu_preempt_state != rsp)
return 0;
- if (!rcu_scheduler_fully_active || rnp->qsmaskinit == 0)
+ if (!rcu_scheduler_fully_active || rcu_rnp_online_cpus(rnp) == 0)
return 0;
rsp->boost = 1;
static void rcu_boost_kthread_setaffinity(struct rcu_node *rnp, int outgoingcpu)
{
struct task_struct *t = rnp->boost_kthread_task;
- unsigned long mask = rnp->qsmaskinit;
+ unsigned long mask = rcu_rnp_online_cpus(rnp);
cpumask_var_t cm;
int cpu;
rhp = ACCESS_ONCE(rdp->nocb_follower_head);
/* Having no rcuo kthread but CBs after scheduler starts is bad! */
- if (!ACCESS_ONCE(rdp->nocb_kthread) && rhp) {
+ if (!ACCESS_ONCE(rdp->nocb_kthread) && rhp &&
+ rcu_scheduler_fully_active) {
/* RCU callback enqueued before CPU first came online??? */
pr_err("RCU: Never-onlined no-CBs CPU %d has CB %p\n",
cpu, rhp->func);
pr_info("\tPoll for callbacks from no-CBs CPUs.\n");
for_each_rcu_flavor(rsp) {
- for_each_cpu(cpu, rcu_nocb_mask) {
- struct rcu_data *rdp = per_cpu_ptr(rsp->rda, cpu);
-
- /*
- * If there are early callbacks, they will need
- * to be moved to the nocb lists.
- */
- WARN_ON_ONCE(rdp->nxttail[RCU_NEXT_TAIL] !=
- &rdp->nxtlist &&
- rdp->nxttail[RCU_NEXT_TAIL] != NULL);
- init_nocb_callback_list(rdp);
- }
+ for_each_cpu(cpu, rcu_nocb_mask)
+ init_nocb_callback_list(per_cpu_ptr(rsp->rda, cpu));
rcu_organize_nocb_kthreads(rsp);
}
}
if (!rcu_is_nocb_cpu(rdp->cpu))
return false;
+ /* If there are early-boot callbacks, move them to nocb lists. */
+ if (rdp->nxtlist) {
+ rdp->nocb_head = rdp->nxtlist;
+ rdp->nocb_tail = rdp->nxttail[RCU_NEXT_TAIL];
+ atomic_long_set(&rdp->nocb_q_count, rdp->qlen);
+ atomic_long_set(&rdp->nocb_q_count_lazy, rdp->qlen_lazy);
+ rdp->nxtlist = NULL;
+ rdp->qlen = 0;
+ rdp->qlen_lazy = 0;
+ }
rdp->nxttail[RCU_NEXT_TAIL] = NULL;
return true;
}
/*
* Check to see if the current CPU is idle. Note that usermode execution
- * does not count as idle. The caller must have disabled interrupts.
+ * does not count as idle. The caller must have disabled interrupts,
+ * and must be running on tick_do_timer_cpu.
*/
static void rcu_sysidle_check_cpu(struct rcu_data *rdp, bool *isidle,
unsigned long *maxj)
if (!*isidle || rdp->rsp != rcu_state_p ||
cpu_is_offline(rdp->cpu) || rdp->cpu == tick_do_timer_cpu)
return;
- if (rcu_gp_in_progress(rdp->rsp))
- WARN_ON_ONCE(smp_processor_id() != tick_do_timer_cpu);
+ /* Verify affinity of current kthread. */
+ WARN_ON_ONCE(smp_processor_id() != tick_do_timer_cpu);
/* Pick up current idle and NMI-nesting counter and check. */
cur = atomic_read(&rdtp->dynticks_idle);
return;
#ifdef CONFIG_NO_HZ_FULL_SYSIDLE
cpu = tick_do_timer_cpu;
- if (cpu >= 0 && cpu < nr_cpu_ids && raw_smp_processor_id() != cpu)
+ if (cpu >= 0 && cpu < nr_cpu_ids)
set_cpus_allowed_ptr(current, cpumask_of(cpu));
#else /* #ifdef CONFIG_NO_HZ_FULL_SYSIDLE */
- if (!is_housekeeping_cpu(raw_smp_processor_id()))
- housekeeping_affine(current);
+ housekeeping_affine(current);
#endif /* #else #ifdef CONFIG_NO_HZ_FULL_SYSIDLE */
}
seq_puts(m, "\n");
level = rnp->level;
}
- seq_printf(m, "%lx/%lx %c%c>%c %d:%d ^%d ",
- rnp->qsmask, rnp->qsmaskinit,
+ seq_printf(m, "%lx/%lx->%lx %c%c>%c %d:%d ^%d ",
+ rnp->qsmask, rnp->qsmaskinit, rnp->qsmaskinitnext,
".G"[rnp->gp_tasks != NULL],
".E"[rnp->exp_tasks != NULL],
".T"[!list_empty(&rnp->blkd_tasks)],
module_param(rcu_expedited, int, 0);
+#ifndef CONFIG_TINY_RCU
+
+static atomic_t rcu_expedited_nesting =
+ ATOMIC_INIT(IS_ENABLED(CONFIG_RCU_EXPEDITE_BOOT) ? 1 : 0);
+
+/*
+ * Should normal grace-period primitives be expedited? Intended for
+ * use within RCU. Note that this function takes the rcu_expedited
+ * sysfs/boot variable into account as well as the rcu_expedite_gp()
+ * nesting. So looping on rcu_unexpedite_gp() until rcu_gp_is_expedited()
+ * returns false is a -really- bad idea.
+ */
+bool rcu_gp_is_expedited(void)
+{
+ return rcu_expedited || atomic_read(&rcu_expedited_nesting);
+}
+EXPORT_SYMBOL_GPL(rcu_gp_is_expedited);
+
+/**
+ * rcu_expedite_gp - Expedite future RCU grace periods
+ *
+ * After a call to this function, future calls to synchronize_rcu() and
+ * friends act as the corresponding synchronize_rcu_expedited() function
+ * had instead been called.
+ */
+void rcu_expedite_gp(void)
+{
+ atomic_inc(&rcu_expedited_nesting);
+}
+EXPORT_SYMBOL_GPL(rcu_expedite_gp);
+
+/**
+ * rcu_unexpedite_gp - Cancel prior rcu_expedite_gp() invocation
+ *
+ * Undo a prior call to rcu_expedite_gp(). If all prior calls to
+ * rcu_expedite_gp() are undone by a subsequent call to rcu_unexpedite_gp(),
+ * and if the rcu_expedited sysfs/boot parameter is not set, then all
+ * subsequent calls to synchronize_rcu() and friends will return to
+ * their normal non-expedited behavior.
+ */
+void rcu_unexpedite_gp(void)
+{
+ atomic_dec(&rcu_expedited_nesting);
+}
+EXPORT_SYMBOL_GPL(rcu_unexpedite_gp);
+
+#endif /* #ifndef CONFIG_TINY_RCU */
+
+/*
+ * Inform RCU of the end of the in-kernel boot sequence.
+ */
+void rcu_end_inkernel_boot(void)
+{
+ if (IS_ENABLED(CONFIG_RCU_EXPEDITE_BOOT))
+ rcu_unexpedite_gp();
+}
+
#ifdef CONFIG_PREEMPT_RCU
/*
#endif /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */
-struct rcu_synchronize {
- struct rcu_head head;
- struct completion completion;
-};
-
-/*
- * Awaken the corresponding synchronize_rcu() instance now that a
- * grace period has elapsed.
+/**
+ * wakeme_after_rcu() - Callback function to awaken a task after grace period
+ * @head: Pointer to rcu_head member within rcu_synchronize structure
+ *
+ * Awaken the corresponding task now that a grace period has elapsed.
*/
-static void wakeme_after_rcu(struct rcu_head *head)
+void wakeme_after_rcu(struct rcu_head *head)
{
struct rcu_synchronize *rcu;
*/
int sysctl_sched_rt_runtime = 950000;
+/* cpus with isolated domains */
+cpumask_var_t cpu_isolated_map;
+
/*
* this_rq_lock - lock this runqueue and disable interrupts.
*/
#ifdef CONFIG_NO_HZ_FULL
bool sched_can_stop_tick(void)
{
+ /*
+ * FIFO realtime policy runs the highest priority task. Other runnable
+ * tasks are of a lower priority. The scheduler tick does nothing.
+ */
+ if (current->policy == SCHED_FIFO)
+ return true;
+
+ /*
+ * Round-robin realtime tasks time slice with other tasks at the same
+ * realtime priority. Is this task the only one at this priority?
+ */
+ if (current->policy == SCHED_RR) {
+ struct sched_rt_entity *rt_se = ¤t->rt;
+
+ return rt_se->run_list.prev == rt_se->run_list.next;
+ }
+
/*
* More than one running task need preemption.
* nr_running update is assumed to be visible
rq_clock_skip_update(rq, true);
}
+static ATOMIC_NOTIFIER_HEAD(task_migration_notifier);
+
+void register_task_migration_notifier(struct notifier_block *n)
+{
+ atomic_notifier_chain_register(&task_migration_notifier, n);
+}
+
#ifdef CONFIG_SMP
void set_task_cpu(struct task_struct *p, unsigned int new_cpu)
{
trace_sched_migrate_task(p, new_cpu);
if (task_cpu(p) != new_cpu) {
+ struct task_migration_notifier tmn;
+
if (p->sched_class->migrate_task_rq)
p->sched_class->migrate_task_rq(p, new_cpu);
p->se.nr_migrations++;
perf_sw_event_sched(PERF_COUNT_SW_CPU_MIGRATIONS, 1, 0);
+
+ tmn.task = p;
+ tmn.from_cpu = task_cpu(p);
+ tmn.to_cpu = new_cpu;
+
+ atomic_notifier_call_chain(&task_migration_notifier, 0, &tmn);
}
__set_task_cpu(p, new_cpu);
* we find a better solution.
*
* NB: There are buggy callers of this function. Ideally we
- * should warn if prev_state != IN_USER, but that will trigger
+ * should warn if prev_state != CONTEXT_USER, but that will trigger
* too frequently to make sense yet.
*/
enum ctx_state prev_state = exception_enter();
static int sched_cpu_inactive(struct notifier_block *nfb,
unsigned long action, void *hcpu)
{
- unsigned long flags;
- long cpu = (long)hcpu;
- struct dl_bw *dl_b;
-
switch (action & ~CPU_TASKS_FROZEN) {
case CPU_DOWN_PREPARE:
- set_cpu_active(cpu, false);
-
- /* explicitly allow suspend */
- if (!(action & CPU_TASKS_FROZEN)) {
- bool overflow;
- int cpus;
-
- rcu_read_lock_sched();
- dl_b = dl_bw_of(cpu);
-
- raw_spin_lock_irqsave(&dl_b->lock, flags);
- cpus = dl_bw_cpus(cpu);
- overflow = __dl_overflow(dl_b, cpus, 0, 0);
- raw_spin_unlock_irqrestore(&dl_b->lock, flags);
-
- rcu_read_unlock_sched();
-
- if (overflow)
- return notifier_from_errno(-EBUSY);
- }
+ set_cpu_active((long)hcpu, false);
return NOTIFY_OK;
+ default:
+ return NOTIFY_DONE;
}
-
- return NOTIFY_DONE;
}
static int __init migration_init(void)
break;
}
- /*
- * Even though we initialize ->capacity to something semi-sane,
- * we leave capacity_orig unset. This allows us to detect if
- * domain iteration is still funny without causing /0 traps.
- */
- if (!group->sgc->capacity_orig) {
- printk(KERN_CONT "\n");
- printk(KERN_ERR "ERROR: domain->cpu_capacity not set\n");
- break;
- }
-
if (!cpumask_weight(sched_group_cpus(group))) {
printk(KERN_CONT "\n");
printk(KERN_ERR "ERROR: empty group\n");
update_top_cache_domain(cpu);
}
-/* cpus with isolated domains */
-static cpumask_var_t cpu_isolated_map;
-
/* Setup the mask of cpus configured for isolated domains */
static int __init isolated_cpu_setup(char *str)
{
* die on a /0 trap.
*/
sg->sgc->capacity = SCHED_CAPACITY_SCALE * cpumask_weight(sg_span);
- sg->sgc->capacity_orig = sg->sgc->capacity;
/*
* Make sure the first group of this domain contains the
*/
if (sd->flags & SD_SHARE_CPUCAPACITY) {
+ sd->flags |= SD_PREFER_SIBLING;
sd->imbalance_pct = 110;
sd->smt_gain = 1178; /* ~15% */
*/
case CPU_ONLINE:
- case CPU_DOWN_FAILED:
cpuset_update_active_cpus(true);
break;
default:
static int cpuset_cpu_inactive(struct notifier_block *nfb, unsigned long action,
void *hcpu)
{
- switch (action) {
+ unsigned long flags;
+ long cpu = (long)hcpu;
+ struct dl_bw *dl_b;
+
+ switch (action & ~CPU_TASKS_FROZEN) {
case CPU_DOWN_PREPARE:
+ /* explicitly allow suspend */
+ if (!(action & CPU_TASKS_FROZEN)) {
+ bool overflow;
+ int cpus;
+
+ rcu_read_lock_sched();
+ dl_b = dl_bw_of(cpu);
+
+ raw_spin_lock_irqsave(&dl_b->lock, flags);
+ cpus = dl_bw_cpus(cpu);
+ overflow = __dl_overflow(dl_b, cpus, 0, 0);
+ raw_spin_unlock_irqrestore(&dl_b->lock, flags);
+
+ rcu_read_unlock_sched();
+
+ if (overflow)
+ return notifier_from_errno(-EBUSY);
+ }
cpuset_update_active_cpus(false);
break;
case CPU_DOWN_PREPARE_FROZEN:
rq->calc_load_active = 0;
rq->calc_load_update = jiffies + LOAD_FREQ;
init_cfs_rq(&rq->cfs);
- init_rt_rq(&rq->rt, rq);
- init_dl_rq(&rq->dl, rq);
+ init_rt_rq(&rq->rt);
+ init_dl_rq(&rq->dl);
#ifdef CONFIG_FAIR_GROUP_SCHED
root_task_group.shares = ROOT_TASK_GROUP_LOAD;
INIT_LIST_HEAD(&rq->leaf_cfs_rq_list);
#ifdef CONFIG_SMP
rq->sd = NULL;
rq->rd = NULL;
- rq->cpu_capacity = SCHED_CAPACITY_SCALE;
+ rq->cpu_capacity = rq->cpu_capacity_orig = SCHED_CAPACITY_SCALE;
rq->post_schedule = 0;
rq->active_balance = 0;
rq->next_balance = jiffies;
}
#endif /* CONFIG_RT_GROUP_SCHED */
-static int sched_dl_global_constraints(void)
+static int sched_dl_global_validate(void)
{
u64 runtime = global_rt_runtime();
u64 period = global_rt_period();
if (ret)
goto undo;
- ret = sched_rt_global_constraints();
+ ret = sched_dl_global_validate();
if (ret)
goto undo;
- ret = sched_dl_global_constraints();
+ ret = sched_rt_global_constraints();
if (ret)
goto undo;
dl_b->total_bw = 0;
}
-void init_dl_rq(struct dl_rq *dl_rq, struct rq *rq)
+void init_dl_rq(struct dl_rq *dl_rq)
{
dl_rq->rb_root = RB_ROOT;
rq->post_schedule = has_pushable_dl_tasks(rq);
}
+static struct rq *find_lock_later_rq(struct task_struct *task, struct rq *rq);
+
+static void dl_task_offline_migration(struct rq *rq, struct task_struct *p)
+{
+ struct rq *later_rq = NULL;
+ bool fallback = false;
+
+ later_rq = find_lock_later_rq(p, rq);
+
+ if (!later_rq) {
+ int cpu;
+
+ /*
+ * If we cannot preempt any rq, fall back to pick any
+ * online cpu.
+ */
+ fallback = true;
+ cpu = cpumask_any_and(cpu_active_mask, tsk_cpus_allowed(p));
+ if (cpu >= nr_cpu_ids) {
+ /*
+ * Fail to find any suitable cpu.
+ * The task will never come back!
+ */
+ BUG_ON(dl_bandwidth_enabled());
+
+ /*
+ * If admission control is disabled we
+ * try a little harder to let the task
+ * run.
+ */
+ cpu = cpumask_any(cpu_active_mask);
+ }
+ later_rq = cpu_rq(cpu);
+ double_lock_balance(rq, later_rq);
+ }
+
+ deactivate_task(rq, p, 0);
+ set_task_cpu(p, later_rq->cpu);
+ activate_task(later_rq, p, ENQUEUE_REPLENISH);
+
+ if (!fallback)
+ resched_curr(later_rq);
+
+ double_unlock_balance(rq, later_rq);
+}
+
#else
static inline
unsigned long flags;
struct rq *rq;
- rq = task_rq_lock(current, &flags);
+ rq = task_rq_lock(p, &flags);
/*
* We need to take care of several possible races here:
sched_clock_tick();
update_rq_clock(rq);
+#ifdef CONFIG_SMP
+ /*
+ * If we find that the rq the task was on is no longer
+ * available, we need to select a new rq.
+ */
+ if (unlikely(!rq->online)) {
+ dl_task_offline_migration(rq, p);
+ goto unlock;
+ }
+#endif
+
/*
* If the throttle happened during sched-out; like:
*
push_dl_task(rq);
#endif
unlock:
- task_rq_unlock(rq, current, &flags);
+ task_rq_unlock(rq, p, &flags);
return HRTIMER_NORESTART;
}
}
update_rq_clock(rq);
update_curr_dl(rq);
+ /*
+ * Tell update_rq_clock() that we've just updated,
+ * so we don't do microscopic update in schedule()
+ * and double the fastpath cost.
+ */
+ rq_clock_skip_update(rq, true);
}
#ifdef CONFIG_SMP
{
int check_resched = 1;
- /*
- * If p is throttled, don't consider the possibility
- * of preempting rq->curr, the check will be done right
- * after its runtime will get replenished.
- */
- if (unlikely(p->dl.dl_throttled))
- return;
-
if (task_on_rq_queued(p) && rq->curr != p) {
#ifdef CONFIG_SMP
if (p->nr_cpus_allowed > 1 && rq->dl.overloaded &&
if (!se) {
struct sched_avg *avg = &cpu_rq(cpu)->avg;
P(avg->runnable_avg_sum);
- P(avg->runnable_avg_period);
+ P(avg->avg_period);
return;
}
P(se->load.weight);
#ifdef CONFIG_SMP
P(se->avg.runnable_avg_sum);
- P(se->avg.runnable_avg_period);
+ P(se->avg.running_avg_sum);
+ P(se->avg.avg_period);
P(se->avg.load_avg_contrib);
+ P(se->avg.utilization_avg_contrib);
P(se->avg.decay_count);
#endif
#undef PN
cfs_rq->runnable_load_avg);
SEQ_printf(m, " .%-30s: %ld\n", "blocked_load_avg",
cfs_rq->blocked_load_avg);
+ SEQ_printf(m, " .%-30s: %ld\n", "utilization_load_avg",
+ cfs_rq->utilization_load_avg);
#ifdef CONFIG_FAIR_GROUP_SCHED
SEQ_printf(m, " .%-30s: %ld\n", "tg_load_contrib",
cfs_rq->tg_load_contrib);
P(se.load.weight);
#ifdef CONFIG_SMP
P(se.avg.runnable_avg_sum);
- P(se.avg.runnable_avg_period);
+ P(se.avg.running_avg_sum);
+ P(se.avg.avg_period);
P(se.avg.load_avg_contrib);
+ P(se.avg.utilization_avg_contrib);
P(se.avg.decay_count);
#endif
P(policy);
static unsigned long task_h_load(struct task_struct *p);
static inline void __update_task_entity_contrib(struct sched_entity *se);
+static inline void __update_task_entity_utilization(struct sched_entity *se);
/* Give new task start runnable values to heavy its load in infant time */
void init_task_runnable_average(struct task_struct *p)
u32 slice;
slice = sched_slice(task_cfs_rq(p), &p->se) >> 10;
- p->se.avg.runnable_avg_sum = slice;
- p->se.avg.runnable_avg_period = slice;
+ p->se.avg.runnable_avg_sum = p->se.avg.running_avg_sum = slice;
+ p->se.avg.avg_period = slice;
__update_task_entity_contrib(&p->se);
+ __update_task_entity_utilization(&p->se);
}
#else
void init_task_runnable_average(struct task_struct *p)
static bool load_too_imbalanced(long src_load, long dst_load,
struct task_numa_env *env)
{
- long imb, old_imb;
- long orig_src_load, orig_dst_load;
long src_capacity, dst_capacity;
+ long orig_src_load;
+ long load_a, load_b;
+ long moved_load;
+ long imb;
/*
* The load is corrected for the CPU capacity available on each node.
dst_capacity = env->dst_stats.compute_capacity;
/* We care about the slope of the imbalance, not the direction. */
- if (dst_load < src_load)
- swap(dst_load, src_load);
+ load_a = dst_load;
+ load_b = src_load;
+ if (load_a < load_b)
+ swap(load_a, load_b);
/* Is the difference below the threshold? */
- imb = dst_load * src_capacity * 100 -
- src_load * dst_capacity * env->imbalance_pct;
+ imb = load_a * src_capacity * 100 -
+ load_b * dst_capacity * env->imbalance_pct;
if (imb <= 0)
return false;
/*
* The imbalance is above the allowed threshold.
- * Compare it with the old imbalance.
+ * Allow a move that brings us closer to a balanced situation,
+ * without moving things past the point of balance.
*/
orig_src_load = env->src_stats.load;
- orig_dst_load = env->dst_stats.load;
- if (orig_dst_load < orig_src_load)
- swap(orig_dst_load, orig_src_load);
-
- old_imb = orig_dst_load * src_capacity * 100 -
- orig_src_load * dst_capacity * env->imbalance_pct;
+ /*
+ * In a task swap, there will be one load moving from src to dst,
+ * and another moving back. This is the net sum of both moves.
+ * A simple task move will always have a positive value.
+ * Allow the move if it brings the system closer to a balanced
+ * situation, without crossing over the balance point.
+ */
+ moved_load = orig_src_load - src_load;
- /* Would this change make things worse? */
- return (imb > old_imb);
+ if (moved_load > 0)
+ /* Moving src -> dst. Did we overshoot balance? */
+ return src_load * dst_capacity < dst_load * src_capacity;
+ else
+ /* Moving dst -> src. Did we overshoot balance? */
+ return dst_load * src_capacity < src_load * dst_capacity;
}
/*
*period = now - p->last_task_numa_placement;
} else {
delta = p->se.avg.runnable_avg_sum;
- *period = p->se.avg.runnable_avg_period;
+ *period = p->se.avg.avg_period;
}
p->last_sum_exec_runtime = runtime;
}
}
/* Next round, evaluate the nodes within max_group. */
+ if (!max_faults)
+ break;
nodes = max_group;
}
return nid;
vma = mm->mmap;
}
for (; vma; vma = vma->vm_next) {
- if (!vma_migratable(vma) || !vma_policy_mof(vma))
+ if (!vma_migratable(vma) || !vma_policy_mof(vma) ||
+ is_vm_hugetlb_page(vma)) {
continue;
+ }
/*
* Shared library pages mapped by multiple processes are not
* load_avg = u_0` + y*(u_0 + u_1*y + u_2*y^2 + ... )
* = u_0 + u_1*y + u_2*y^2 + ... [re-labeling u_i --> u_{i+1}]
*/
-static __always_inline int __update_entity_runnable_avg(u64 now,
+static __always_inline int __update_entity_runnable_avg(u64 now, int cpu,
struct sched_avg *sa,
- int runnable)
+ int runnable,
+ int running)
{
u64 delta, periods;
u32 runnable_contrib;
int delta_w, decayed = 0;
+ unsigned long scale_freq = arch_scale_freq_capacity(NULL, cpu);
delta = now - sa->last_runnable_update;
/*
sa->last_runnable_update = now;
/* delta_w is the amount already accumulated against our next period */
- delta_w = sa->runnable_avg_period % 1024;
+ delta_w = sa->avg_period % 1024;
if (delta + delta_w >= 1024) {
/* period roll-over */
decayed = 1;
delta_w = 1024 - delta_w;
if (runnable)
sa->runnable_avg_sum += delta_w;
- sa->runnable_avg_period += delta_w;
+ if (running)
+ sa->running_avg_sum += delta_w * scale_freq
+ >> SCHED_CAPACITY_SHIFT;
+ sa->avg_period += delta_w;
delta -= delta_w;
sa->runnable_avg_sum = decay_load(sa->runnable_avg_sum,
periods + 1);
- sa->runnable_avg_period = decay_load(sa->runnable_avg_period,
+ sa->running_avg_sum = decay_load(sa->running_avg_sum,
+ periods + 1);
+ sa->avg_period = decay_load(sa->avg_period,
periods + 1);
/* Efficiently calculate \sum (1..n_period) 1024*y^i */
runnable_contrib = __compute_runnable_contrib(periods);
if (runnable)
sa->runnable_avg_sum += runnable_contrib;
- sa->runnable_avg_period += runnable_contrib;
+ if (running)
+ sa->running_avg_sum += runnable_contrib * scale_freq
+ >> SCHED_CAPACITY_SHIFT;
+ sa->avg_period += runnable_contrib;
}
/* Remainder of delta accrued against u_0` */
if (runnable)
sa->runnable_avg_sum += delta;
- sa->runnable_avg_period += delta;
+ if (running)
+ sa->running_avg_sum += delta * scale_freq
+ >> SCHED_CAPACITY_SHIFT;
+ sa->avg_period += delta;
return decayed;
}
return 0;
se->avg.load_avg_contrib = decay_load(se->avg.load_avg_contrib, decays);
+ se->avg.utilization_avg_contrib =
+ decay_load(se->avg.utilization_avg_contrib, decays);
return decays;
}
/* The fraction of a cpu used by this cfs_rq */
contrib = div_u64((u64)sa->runnable_avg_sum << NICE_0_SHIFT,
- sa->runnable_avg_period + 1);
+ sa->avg_period + 1);
contrib -= cfs_rq->tg_runnable_contrib;
if (abs(contrib) > cfs_rq->tg_runnable_contrib / 64) {
static inline void update_rq_runnable_avg(struct rq *rq, int runnable)
{
- __update_entity_runnable_avg(rq_clock_task(rq), &rq->avg, runnable);
+ __update_entity_runnable_avg(rq_clock_task(rq), cpu_of(rq), &rq->avg,
+ runnable, runnable);
__update_tg_runnable_avg(&rq->avg, &rq->cfs);
}
#else /* CONFIG_FAIR_GROUP_SCHED */
/* avoid overflowing a 32-bit type w/ SCHED_LOAD_SCALE */
contrib = se->avg.runnable_avg_sum * scale_load_down(se->load.weight);
- contrib /= (se->avg.runnable_avg_period + 1);
+ contrib /= (se->avg.avg_period + 1);
se->avg.load_avg_contrib = scale_load(contrib);
}
return se->avg.load_avg_contrib - old_contrib;
}
+
+static inline void __update_task_entity_utilization(struct sched_entity *se)
+{
+ u32 contrib;
+
+ /* avoid overflowing a 32-bit type w/ SCHED_LOAD_SCALE */
+ contrib = se->avg.running_avg_sum * scale_load_down(SCHED_LOAD_SCALE);
+ contrib /= (se->avg.avg_period + 1);
+ se->avg.utilization_avg_contrib = scale_load(contrib);
+}
+
+static long __update_entity_utilization_avg_contrib(struct sched_entity *se)
+{
+ long old_contrib = se->avg.utilization_avg_contrib;
+
+ if (entity_is_task(se))
+ __update_task_entity_utilization(se);
+ else
+ se->avg.utilization_avg_contrib =
+ group_cfs_rq(se)->utilization_load_avg;
+
+ return se->avg.utilization_avg_contrib - old_contrib;
+}
+
static inline void subtract_blocked_load_contrib(struct cfs_rq *cfs_rq,
long load_contrib)
{
int update_cfs_rq)
{
struct cfs_rq *cfs_rq = cfs_rq_of(se);
- long contrib_delta;
+ long contrib_delta, utilization_delta;
+ int cpu = cpu_of(rq_of(cfs_rq));
u64 now;
/*
else
now = cfs_rq_clock_task(group_cfs_rq(se));
- if (!__update_entity_runnable_avg(now, &se->avg, se->on_rq))
+ if (!__update_entity_runnable_avg(now, cpu, &se->avg, se->on_rq,
+ cfs_rq->curr == se))
return;
contrib_delta = __update_entity_load_avg_contrib(se);
+ utilization_delta = __update_entity_utilization_avg_contrib(se);
if (!update_cfs_rq)
return;
- if (se->on_rq)
+ if (se->on_rq) {
cfs_rq->runnable_load_avg += contrib_delta;
- else
+ cfs_rq->utilization_load_avg += utilization_delta;
+ } else {
subtract_blocked_load_contrib(cfs_rq, -contrib_delta);
+ }
}
/*
}
cfs_rq->runnable_load_avg += se->avg.load_avg_contrib;
+ cfs_rq->utilization_load_avg += se->avg.utilization_avg_contrib;
/* we force update consideration on load-balancer moves */
update_cfs_rq_blocked_load(cfs_rq, !wakeup);
}
update_cfs_rq_blocked_load(cfs_rq, !sleep);
cfs_rq->runnable_load_avg -= se->avg.load_avg_contrib;
+ cfs_rq->utilization_load_avg -= se->avg.utilization_avg_contrib;
if (sleep) {
cfs_rq->blocked_load_avg += se->avg.load_avg_contrib;
se->avg.decay_count = atomic64_read(&cfs_rq->decay_counter);
*/
update_stats_wait_end(cfs_rq, se);
__dequeue_entity(cfs_rq, se);
+ update_entity_load_avg(se, 1);
}
update_stats_curr_start(cfs_rq, se);
return cpu_rq(cpu)->cpu_capacity;
}
+static unsigned long capacity_orig_of(int cpu)
+{
+ return cpu_rq(cpu)->cpu_capacity_orig;
+}
+
static unsigned long cpu_avg_load_per_task(int cpu)
{
struct rq *rq = cpu_rq(cpu);
done:
return target;
}
+/*
+ * get_cpu_usage returns the amount of capacity of a CPU that is used by CFS
+ * tasks. The unit of the return value must be the one of capacity so we can
+ * compare the usage with the capacity of the CPU that is available for CFS
+ * task (ie cpu_capacity).
+ * cfs.utilization_load_avg is the sum of running time of runnable tasks on a
+ * CPU. It represents the amount of utilization of a CPU in the range
+ * [0..SCHED_LOAD_SCALE]. The usage of a CPU can't be higher than the full
+ * capacity of the CPU because it's about the running time on this CPU.
+ * Nevertheless, cfs.utilization_load_avg can be higher than SCHED_LOAD_SCALE
+ * because of unfortunate rounding in avg_period and running_load_avg or just
+ * after migrating tasks until the average stabilizes with the new running
+ * time. So we need to check that the usage stays into the range
+ * [0..cpu_capacity_orig] and cap if necessary.
+ * Without capping the usage, a group could be seen as overloaded (CPU0 usage
+ * at 121% + CPU1 usage at 80%) whereas CPU1 has 20% of available capacity
+ */
+static int get_cpu_usage(int cpu)
+{
+ unsigned long usage = cpu_rq(cpu)->cfs.utilization_load_avg;
+ unsigned long capacity = capacity_orig_of(cpu);
+
+ if (usage >= SCHED_LOAD_SCALE)
+ return capacity;
+
+ return (usage * capacity) >> SCHED_LOAD_SHIFT;
+}
/*
* select_task_rq_fair: Select target runqueue for the waking task in domains
unsigned long sum_weighted_load; /* Weighted load of group's tasks */
unsigned long load_per_task;
unsigned long group_capacity;
+ unsigned long group_usage; /* Total usage of the group */
unsigned int sum_nr_running; /* Nr tasks running in the group */
- unsigned int group_capacity_factor;
unsigned int idle_cpus;
unsigned int group_weight;
enum group_type group_type;
- int group_has_free_capacity;
+ int group_no_capacity;
#ifdef CONFIG_NUMA_BALANCING
unsigned int nr_numa_running;
unsigned int nr_preferred_running;
return load_idx;
}
-static unsigned long default_scale_capacity(struct sched_domain *sd, int cpu)
-{
- return SCHED_CAPACITY_SCALE;
-}
-
-unsigned long __weak arch_scale_freq_capacity(struct sched_domain *sd, int cpu)
-{
- return default_scale_capacity(sd, cpu);
-}
-
static unsigned long default_scale_cpu_capacity(struct sched_domain *sd, int cpu)
{
if ((sd->flags & SD_SHARE_CPUCAPACITY) && (sd->span_weight > 1))
static unsigned long scale_rt_capacity(int cpu)
{
struct rq *rq = cpu_rq(cpu);
- u64 total, available, age_stamp, avg;
+ u64 total, used, age_stamp, avg;
s64 delta;
/*
total = sched_avg_period() + delta;
- if (unlikely(total < avg)) {
- /* Ensures that capacity won't end up being negative */
- available = 0;
- } else {
- available = total - avg;
- }
-
- if (unlikely((s64)total < SCHED_CAPACITY_SCALE))
- total = SCHED_CAPACITY_SCALE;
+ used = div_u64(avg, total);
- total >>= SCHED_CAPACITY_SHIFT;
+ if (likely(used < SCHED_CAPACITY_SCALE))
+ return SCHED_CAPACITY_SCALE - used;
- return div_u64(available, total);
+ return 1;
}
static void update_cpu_capacity(struct sched_domain *sd, int cpu)
capacity >>= SCHED_CAPACITY_SHIFT;
- sdg->sgc->capacity_orig = capacity;
-
- if (sched_feat(ARCH_CAPACITY))
- capacity *= arch_scale_freq_capacity(sd, cpu);
- else
- capacity *= default_scale_capacity(sd, cpu);
-
- capacity >>= SCHED_CAPACITY_SHIFT;
+ cpu_rq(cpu)->cpu_capacity_orig = capacity;
capacity *= scale_rt_capacity(cpu);
capacity >>= SCHED_CAPACITY_SHIFT;
{
struct sched_domain *child = sd->child;
struct sched_group *group, *sdg = sd->groups;
- unsigned long capacity, capacity_orig;
+ unsigned long capacity;
unsigned long interval;
interval = msecs_to_jiffies(sd->balance_interval);
return;
}
- capacity_orig = capacity = 0;
+ capacity = 0;
if (child->flags & SD_OVERLAP) {
/*
* Use capacity_of(), which is set irrespective of domains
* in update_cpu_capacity().
*
- * This avoids capacity/capacity_orig from being 0 and
+ * This avoids capacity from being 0 and
* causing divide-by-zero issues on boot.
- *
- * Runtime updates will correct capacity_orig.
*/
if (unlikely(!rq->sd)) {
- capacity_orig += capacity_of(cpu);
capacity += capacity_of(cpu);
continue;
}
sgc = rq->sd->groups->sgc;
- capacity_orig += sgc->capacity_orig;
capacity += sgc->capacity;
}
} else {
group = child->groups;
do {
- capacity_orig += group->sgc->capacity_orig;
capacity += group->sgc->capacity;
group = group->next;
} while (group != child->groups);
}
- sdg->sgc->capacity_orig = capacity_orig;
sdg->sgc->capacity = capacity;
}
/*
- * Try and fix up capacity for tiny siblings, this is needed when
- * things like SD_ASYM_PACKING need f_b_g to select another sibling
- * which on its own isn't powerful enough.
- *
- * See update_sd_pick_busiest() and check_asym_packing().
+ * Check whether the capacity of the rq has been noticeably reduced by side
+ * activity. The imbalance_pct is used for the threshold.
+ * Return true is the capacity is reduced
*/
static inline int
-fix_small_capacity(struct sched_domain *sd, struct sched_group *group)
+check_cpu_capacity(struct rq *rq, struct sched_domain *sd)
{
- /*
- * Only siblings can have significantly less than SCHED_CAPACITY_SCALE
- */
- if (!(sd->flags & SD_SHARE_CPUCAPACITY))
- return 0;
-
- /*
- * If ~90% of the cpu_capacity is still there, we're good.
- */
- if (group->sgc->capacity * 32 > group->sgc->capacity_orig * 29)
- return 1;
-
- return 0;
+ return ((rq->cpu_capacity * sd->imbalance_pct) <
+ (rq->cpu_capacity_orig * 100));
}
/*
}
/*
- * Compute the group capacity factor.
- *
- * Avoid the issue where N*frac(smt_capacity) >= 1 creates 'phantom' cores by
- * first dividing out the smt factor and computing the actual number of cores
- * and limit unit capacity with that.
+ * group_has_capacity returns true if the group has spare capacity that could
+ * be used by some tasks.
+ * We consider that a group has spare capacity if the * number of task is
+ * smaller than the number of CPUs or if the usage is lower than the available
+ * capacity for CFS tasks.
+ * For the latter, we use a threshold to stabilize the state, to take into
+ * account the variance of the tasks' load and to return true if the available
+ * capacity in meaningful for the load balancer.
+ * As an example, an available capacity of 1% can appear but it doesn't make
+ * any benefit for the load balance.
*/
-static inline int sg_capacity_factor(struct lb_env *env, struct sched_group *group)
+static inline bool
+group_has_capacity(struct lb_env *env, struct sg_lb_stats *sgs)
{
- unsigned int capacity_factor, smt, cpus;
- unsigned int capacity, capacity_orig;
+ if (sgs->sum_nr_running < sgs->group_weight)
+ return true;
- capacity = group->sgc->capacity;
- capacity_orig = group->sgc->capacity_orig;
- cpus = group->group_weight;
+ if ((sgs->group_capacity * 100) >
+ (sgs->group_usage * env->sd->imbalance_pct))
+ return true;
+
+ return false;
+}
- /* smt := ceil(cpus / capacity), assumes: 1 < smt_capacity < 2 */
- smt = DIV_ROUND_UP(SCHED_CAPACITY_SCALE * cpus, capacity_orig);
- capacity_factor = cpus / smt; /* cores */
+/*
+ * group_is_overloaded returns true if the group has more tasks than it can
+ * handle.
+ * group_is_overloaded is not equals to !group_has_capacity because a group
+ * with the exact right number of tasks, has no more spare capacity but is not
+ * overloaded so both group_has_capacity and group_is_overloaded return
+ * false.
+ */
+static inline bool
+group_is_overloaded(struct lb_env *env, struct sg_lb_stats *sgs)
+{
+ if (sgs->sum_nr_running <= sgs->group_weight)
+ return false;
- capacity_factor = min_t(unsigned,
- capacity_factor, DIV_ROUND_CLOSEST(capacity, SCHED_CAPACITY_SCALE));
- if (!capacity_factor)
- capacity_factor = fix_small_capacity(env->sd, group);
+ if ((sgs->group_capacity * 100) <
+ (sgs->group_usage * env->sd->imbalance_pct))
+ return true;
- return capacity_factor;
+ return false;
}
-static enum group_type
-group_classify(struct sched_group *group, struct sg_lb_stats *sgs)
+static enum group_type group_classify(struct lb_env *env,
+ struct sched_group *group,
+ struct sg_lb_stats *sgs)
{
- if (sgs->sum_nr_running > sgs->group_capacity_factor)
+ if (sgs->group_no_capacity)
return group_overloaded;
if (sg_imbalanced(group))
load = source_load(i, load_idx);
sgs->group_load += load;
+ sgs->group_usage += get_cpu_usage(i);
sgs->sum_nr_running += rq->cfs.h_nr_running;
if (rq->nr_running > 1)
sgs->load_per_task = sgs->sum_weighted_load / sgs->sum_nr_running;
sgs->group_weight = group->group_weight;
- sgs->group_capacity_factor = sg_capacity_factor(env, group);
- sgs->group_type = group_classify(group, sgs);
- if (sgs->group_capacity_factor > sgs->sum_nr_running)
- sgs->group_has_free_capacity = 1;
+ sgs->group_no_capacity = group_is_overloaded(env, sgs);
+ sgs->group_type = group_classify(env, group, sgs);
}
/**
/*
* In case the child domain prefers tasks go to siblings
- * first, lower the sg capacity factor to one so that we'll try
+ * first, lower the sg capacity so that we'll try
* and move all the excess tasks away. We lower the capacity
* of a group only if the local group has the capacity to fit
- * these excess tasks, i.e. nr_running < group_capacity_factor. The
- * extra check prevents the case where you always pull from the
- * heaviest group when it is already under-utilized (possible
- * with a large weight task outweighs the tasks on the system).
+ * these excess tasks. The extra check prevents the case where
+ * you always pull from the heaviest group when it is already
+ * under-utilized (possible with a large weight task outweighs
+ * the tasks on the system).
*/
if (prefer_sibling && sds->local &&
- sds->local_stat.group_has_free_capacity) {
- sgs->group_capacity_factor = min(sgs->group_capacity_factor, 1U);
- sgs->group_type = group_classify(sg, sgs);
+ group_has_capacity(env, &sds->local_stat) &&
+ (sgs->sum_nr_running > 1)) {
+ sgs->group_no_capacity = 1;
+ sgs->group_type = group_overloaded;
}
if (update_sd_pick_busiest(env, sds, sg, sgs)) {
*/
if (busiest->group_type == group_overloaded &&
local->group_type == group_overloaded) {
- load_above_capacity =
- (busiest->sum_nr_running - busiest->group_capacity_factor);
-
- load_above_capacity *= (SCHED_LOAD_SCALE * SCHED_CAPACITY_SCALE);
- load_above_capacity /= busiest->group_capacity;
+ load_above_capacity = busiest->sum_nr_running *
+ SCHED_LOAD_SCALE;
+ if (load_above_capacity > busiest->group_capacity)
+ load_above_capacity -= busiest->group_capacity;
+ else
+ load_above_capacity = ~0UL;
}
/*
local = &sds.local_stat;
busiest = &sds.busiest_stat;
+ /* ASYM feature bypasses nice load balance check */
if ((env->idle == CPU_IDLE || env->idle == CPU_NEWLY_IDLE) &&
check_asym_packing(env, &sds))
return sds.busiest;
goto force_balance;
/* SD_BALANCE_NEWIDLE trumps SMP nice when underutilized */
- if (env->idle == CPU_NEWLY_IDLE && local->group_has_free_capacity &&
- !busiest->group_has_free_capacity)
+ if (env->idle == CPU_NEWLY_IDLE && group_has_capacity(env, local) &&
+ busiest->group_no_capacity)
goto force_balance;
/*
int i;
for_each_cpu_and(i, sched_group_cpus(group), env->cpus) {
- unsigned long capacity, capacity_factor, wl;
+ unsigned long capacity, wl;
enum fbq_type rt;
rq = cpu_rq(i);
continue;
capacity = capacity_of(i);
- capacity_factor = DIV_ROUND_CLOSEST(capacity, SCHED_CAPACITY_SCALE);
- if (!capacity_factor)
- capacity_factor = fix_small_capacity(env->sd, group);
wl = weighted_cpuload(i);
* When comparing with imbalance, use weighted_cpuload()
* which is not scaled with the cpu capacity.
*/
- if (capacity_factor && rq->nr_running == 1 && wl > env->imbalance)
+
+ if (rq->nr_running == 1 && wl > env->imbalance &&
+ !check_cpu_capacity(rq, env->sd))
continue;
/*
return 1;
}
+ /*
+ * The dst_cpu is idle and the src_cpu CPU has only 1 CFS task.
+ * It's worth migrating the task if the src_cpu's capacity is reduced
+ * because of other sched_class or IRQs if more capacity stays
+ * available on dst_cpu.
+ */
+ if ((env->idle != CPU_NOT_IDLE) &&
+ (env->src_rq->cfs.h_nr_running == 1)) {
+ if ((check_cpu_capacity(env->src_rq, sd)) &&
+ (capacity_of(env->src_cpu)*sd->imbalance_pct < capacity_of(env->dst_cpu)*100))
+ return 1;
+ }
+
return unlikely(sd->nr_balance_failed > sd->cache_nice_tries+2);
}
schedstat_add(sd, lb_imbalance[idle], env.imbalance);
+ env.src_cpu = busiest->cpu;
+ env.src_rq = busiest;
+
ld_moved = 0;
if (busiest->nr_running > 1) {
/*
* correctly treated as an imbalance.
*/
env.flags |= LBF_ALL_PINNED;
- env.src_cpu = busiest->cpu;
- env.src_rq = busiest;
env.loop_max = min(sysctl_sched_nr_migrate, busiest->nr_running);
more_balance:
/*
* Current heuristic for kicking the idle load balancer in the presence
- * of an idle cpu is the system.
+ * of an idle cpu in the system.
* - This rq has more than one task.
- * - At any scheduler domain level, this cpu's scheduler group has multiple
- * busy cpu's exceeding the group's capacity.
+ * - This rq has at least one CFS task and the capacity of the CPU is
+ * significantly reduced because of RT tasks or IRQs.
+ * - At parent of LLC scheduler domain level, this cpu's scheduler group has
+ * multiple busy cpu.
* - For SD_ASYM_PACKING, if the lower numbered cpu's in the scheduler
* domain span are idle.
*/
-static inline int nohz_kick_needed(struct rq *rq)
+static inline bool nohz_kick_needed(struct rq *rq)
{
unsigned long now = jiffies;
struct sched_domain *sd;
struct sched_group_capacity *sgc;
int nr_busy, cpu = rq->cpu;
+ bool kick = false;
if (unlikely(rq->idle_balance))
- return 0;
+ return false;
/*
* We may be recently in ticked or tickless idle mode. At the first
* balancing.
*/
if (likely(!atomic_read(&nohz.nr_cpus)))
- return 0;
+ return false;
if (time_before(now, nohz.next_balance))
- return 0;
+ return false;
if (rq->nr_running >= 2)
- goto need_kick;
+ return true;
rcu_read_lock();
sd = rcu_dereference(per_cpu(sd_busy, cpu));
-
if (sd) {
sgc = sd->groups->sgc;
nr_busy = atomic_read(&sgc->nr_busy_cpus);
- if (nr_busy > 1)
- goto need_kick_unlock;
+ if (nr_busy > 1) {
+ kick = true;
+ goto unlock;
+ }
+
}
- sd = rcu_dereference(per_cpu(sd_asym, cpu));
+ sd = rcu_dereference(rq->sd);
+ if (sd) {
+ if ((rq->cfs.h_nr_running >= 1) &&
+ check_cpu_capacity(rq, sd)) {
+ kick = true;
+ goto unlock;
+ }
+ }
+ sd = rcu_dereference(per_cpu(sd_asym, cpu));
if (sd && (cpumask_first_and(nohz.idle_cpus_mask,
- sched_domain_span(sd)) < cpu))
- goto need_kick_unlock;
-
- rcu_read_unlock();
- return 0;
+ sched_domain_span(sd)) < cpu)) {
+ kick = true;
+ goto unlock;
+ }
-need_kick_unlock:
+unlock:
rcu_read_unlock();
-need_kick:
- return 1;
+ return kick;
}
#else
static void nohz_idle_balance(struct rq *this_rq, enum cpu_idle_type idle) { }
enum cpu_idle_type idle = this_rq->idle_balance ?
CPU_IDLE : CPU_NOT_IDLE;
- rebalance_domains(this_rq, idle);
-
/*
* If this cpu has a pending nohz_balance_kick, then do the
* balancing on behalf of the other idle cpus whose ticks are
- * stopped.
+ * stopped. Do nohz_idle_balance *before* rebalance_domains to
+ * give the idle cpus a chance to load balance. Else we may
+ * load balance only within the local sched_domain hierarchy
+ * and abort nohz_idle_balance altogether if we pull some load.
*/
nohz_idle_balance(this_rq, idle);
+ rebalance_domains(this_rq, idle);
}
/*
*/
SCHED_FEAT(TTWU_QUEUE, true)
+#ifdef HAVE_RT_PUSH_IPI
+/*
+ * In order to avoid a thundering herd attack of CPUs that are
+ * lowering their priorities at the same time, and there being
+ * a single CPU that has an RT task that can migrate and is waiting
+ * to run, where the other CPUs will try to take that CPUs
+ * rq lock and possibly create a large contention, sending an
+ * IPI to that CPU and let that CPU push the RT task to where
+ * it should go may be a better scenario.
+ */
+SCHED_FEAT(RT_PUSH_IPI, true)
+#endif
+
SCHED_FEAT(FORCE_SD_OVERLAP, false)
SCHED_FEAT(RT_RUNTIME_SHARE, true)
SCHED_FEAT(LB_MIN, false)
* is used from another cpu as a broadcast timer, this call may
* fail if it is not available
*/
- if (broadcast &&
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu))
+ if (broadcast && tick_broadcast_enter())
goto use_default;
/* Take note of the planned idle state. */
idle_set_state(this_rq(), NULL);
if (broadcast)
- clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
+ tick_broadcast_exit();
/*
* Give the governor an opportunity to reflect on the outcome
goto exit_idle;
}
+DEFINE_PER_CPU(bool, cpu_dead_idle);
+
/*
* Generic idle loop implementation
*
check_pgt_cache();
rmb();
- if (cpu_is_offline(smp_processor_id()))
+ if (cpu_is_offline(smp_processor_id())) {
+ rcu_cpu_notify(NULL, CPU_DYING_IDLE,
+ (void *)(long)smp_processor_id());
+ smp_mb(); /* all activity before dead. */
+ this_cpu_write(cpu_dead_idle, true);
arch_cpu_idle_dead();
+ }
local_irq_disable();
arch_cpu_idle_enter();
#include "sched.h"
#include <linux/slab.h>
+#include <linux/irq_work.h>
int sched_rr_timeslice = RR_TIMESLICE;
raw_spin_unlock(&rt_b->rt_runtime_lock);
}
-void init_rt_rq(struct rt_rq *rt_rq, struct rq *rq)
+#ifdef CONFIG_SMP
+static void push_irq_work_func(struct irq_work *work);
+#endif
+
+void init_rt_rq(struct rt_rq *rt_rq)
{
struct rt_prio_array *array;
int i;
rt_rq->rt_nr_migratory = 0;
rt_rq->overloaded = 0;
plist_head_init(&rt_rq->pushable_tasks);
+
+#ifdef HAVE_RT_PUSH_IPI
+ rt_rq->push_flags = 0;
+ rt_rq->push_cpu = nr_cpu_ids;
+ raw_spin_lock_init(&rt_rq->push_lock);
+ init_irq_work(&rt_rq->push_work, push_irq_work_func);
#endif
+#endif /* CONFIG_SMP */
/* We start is dequeued state, because no RT tasks are queued */
rt_rq->rt_queued = 0;
if (!rt_se)
goto err_free_rq;
- init_rt_rq(rt_rq, cpu_rq(i));
+ init_rt_rq(rt_rq);
rt_rq->rt_runtime = tg->rt_bandwidth.rt_runtime;
init_tg_rt_entry(tg, rt_rq, rt_se, i, parent->rt_se[i]);
}
;
}
+#ifdef HAVE_RT_PUSH_IPI
+/*
+ * The search for the next cpu always starts at rq->cpu and ends
+ * when we reach rq->cpu again. It will never return rq->cpu.
+ * This returns the next cpu to check, or nr_cpu_ids if the loop
+ * is complete.
+ *
+ * rq->rt.push_cpu holds the last cpu returned by this function,
+ * or if this is the first instance, it must hold rq->cpu.
+ */
+static int rto_next_cpu(struct rq *rq)
+{
+ int prev_cpu = rq->rt.push_cpu;
+ int cpu;
+
+ cpu = cpumask_next(prev_cpu, rq->rd->rto_mask);
+
+ /*
+ * If the previous cpu is less than the rq's CPU, then it already
+ * passed the end of the mask, and has started from the beginning.
+ * We end if the next CPU is greater or equal to rq's CPU.
+ */
+ if (prev_cpu < rq->cpu) {
+ if (cpu >= rq->cpu)
+ return nr_cpu_ids;
+
+ } else if (cpu >= nr_cpu_ids) {
+ /*
+ * We passed the end of the mask, start at the beginning.
+ * If the result is greater or equal to the rq's CPU, then
+ * the loop is finished.
+ */
+ cpu = cpumask_first(rq->rd->rto_mask);
+ if (cpu >= rq->cpu)
+ return nr_cpu_ids;
+ }
+ rq->rt.push_cpu = cpu;
+
+ /* Return cpu to let the caller know if the loop is finished or not */
+ return cpu;
+}
+
+static int find_next_push_cpu(struct rq *rq)
+{
+ struct rq *next_rq;
+ int cpu;
+
+ while (1) {
+ cpu = rto_next_cpu(rq);
+ if (cpu >= nr_cpu_ids)
+ break;
+ next_rq = cpu_rq(cpu);
+
+ /* Make sure the next rq can push to this rq */
+ if (next_rq->rt.highest_prio.next < rq->rt.highest_prio.curr)
+ break;
+ }
+
+ return cpu;
+}
+
+#define RT_PUSH_IPI_EXECUTING 1
+#define RT_PUSH_IPI_RESTART 2
+
+static void tell_cpu_to_push(struct rq *rq)
+{
+ int cpu;
+
+ if (rq->rt.push_flags & RT_PUSH_IPI_EXECUTING) {
+ raw_spin_lock(&rq->rt.push_lock);
+ /* Make sure it's still executing */
+ if (rq->rt.push_flags & RT_PUSH_IPI_EXECUTING) {
+ /*
+ * Tell the IPI to restart the loop as things have
+ * changed since it started.
+ */
+ rq->rt.push_flags |= RT_PUSH_IPI_RESTART;
+ raw_spin_unlock(&rq->rt.push_lock);
+ return;
+ }
+ raw_spin_unlock(&rq->rt.push_lock);
+ }
+
+ /* When here, there's no IPI going around */
+
+ rq->rt.push_cpu = rq->cpu;
+ cpu = find_next_push_cpu(rq);
+ if (cpu >= nr_cpu_ids)
+ return;
+
+ rq->rt.push_flags = RT_PUSH_IPI_EXECUTING;
+
+ irq_work_queue_on(&rq->rt.push_work, cpu);
+}
+
+/* Called from hardirq context */
+static void try_to_push_tasks(void *arg)
+{
+ struct rt_rq *rt_rq = arg;
+ struct rq *rq, *src_rq;
+ int this_cpu;
+ int cpu;
+
+ this_cpu = rt_rq->push_cpu;
+
+ /* Paranoid check */
+ BUG_ON(this_cpu != smp_processor_id());
+
+ rq = cpu_rq(this_cpu);
+ src_rq = rq_of_rt_rq(rt_rq);
+
+again:
+ if (has_pushable_tasks(rq)) {
+ raw_spin_lock(&rq->lock);
+ push_rt_task(rq);
+ raw_spin_unlock(&rq->lock);
+ }
+
+ /* Pass the IPI to the next rt overloaded queue */
+ raw_spin_lock(&rt_rq->push_lock);
+ /*
+ * If the source queue changed since the IPI went out,
+ * we need to restart the search from that CPU again.
+ */
+ if (rt_rq->push_flags & RT_PUSH_IPI_RESTART) {
+ rt_rq->push_flags &= ~RT_PUSH_IPI_RESTART;
+ rt_rq->push_cpu = src_rq->cpu;
+ }
+
+ cpu = find_next_push_cpu(src_rq);
+
+ if (cpu >= nr_cpu_ids)
+ rt_rq->push_flags &= ~RT_PUSH_IPI_EXECUTING;
+ raw_spin_unlock(&rt_rq->push_lock);
+
+ if (cpu >= nr_cpu_ids)
+ return;
+
+ /*
+ * It is possible that a restart caused this CPU to be
+ * chosen again. Don't bother with an IPI, just see if we
+ * have more to push.
+ */
+ if (unlikely(cpu == rq->cpu))
+ goto again;
+
+ /* Try the next RT overloaded CPU */
+ irq_work_queue_on(&rt_rq->push_work, cpu);
+}
+
+static void push_irq_work_func(struct irq_work *work)
+{
+ struct rt_rq *rt_rq = container_of(work, struct rt_rq, push_work);
+
+ try_to_push_tasks(rt_rq);
+}
+#endif /* HAVE_RT_PUSH_IPI */
+
static int pull_rt_task(struct rq *this_rq)
{
int this_cpu = this_rq->cpu, ret = 0, cpu;
*/
smp_rmb();
+#ifdef HAVE_RT_PUSH_IPI
+ if (sched_feat(RT_PUSH_IPI)) {
+ tell_cpu_to_push(this_rq);
+ return 0;
+ }
+#endif
+
for_each_cpu(cpu, this_rq->rd->rto_mask) {
if (this_cpu == cpu)
continue;
#include <linux/mutex.h>
#include <linux/spinlock.h>
#include <linux/stop_machine.h>
+#include <linux/irq_work.h>
#include <linux/tick.h>
#include <linux/slab.h>
* Under CFS, load is tracked on a per-entity basis and aggregated up.
* This allows for the description of both thread and group usage (in
* the FAIR_GROUP_SCHED case).
+ * runnable_load_avg is the sum of the load_avg_contrib of the
+ * sched_entities on the rq.
+ * blocked_load_avg is similar to runnable_load_avg except that its
+ * the blocked sched_entities on the rq.
+ * utilization_load_avg is the sum of the average running time of the
+ * sched_entities on the rq.
*/
- unsigned long runnable_load_avg, blocked_load_avg;
+ unsigned long runnable_load_avg, blocked_load_avg, utilization_load_avg;
atomic64_t decay_counter;
u64 last_decay;
atomic_long_t removed_load;
return sysctl_sched_rt_runtime >= 0;
}
+/* RT IPI pull logic requires IRQ_WORK */
+#ifdef CONFIG_IRQ_WORK
+# define HAVE_RT_PUSH_IPI
+#endif
+
/* Real-Time classes' related field in a runqueue: */
struct rt_rq {
struct rt_prio_array active;
unsigned long rt_nr_total;
int overloaded;
struct plist_head pushable_tasks;
+#ifdef HAVE_RT_PUSH_IPI
+ int push_flags;
+ int push_cpu;
+ struct irq_work push_work;
+ raw_spinlock_t push_lock;
#endif
+#endif /* CONFIG_SMP */
int rt_queued;
int rt_throttled;
struct sched_domain *sd;
unsigned long cpu_capacity;
+ unsigned long cpu_capacity_orig;
unsigned char idle_balance;
/* For active balancing */
* CPU capacity of this group, SCHED_LOAD_SCALE being max capacity
* for a single CPU.
*/
- unsigned int capacity, capacity_orig;
+ unsigned int capacity;
unsigned long next_update;
int imbalance; /* XXX unrelated to capacity but shared group state */
/*
#ifdef CONFIG_SMP
extern void sched_avg_update(struct rq *rq);
+
+#ifndef arch_scale_freq_capacity
+static __always_inline
+unsigned long arch_scale_freq_capacity(struct sched_domain *sd, int cpu)
+{
+ return SCHED_CAPACITY_SCALE;
+}
+#endif
+
static inline void sched_rt_avg_update(struct rq *rq, u64 rt_delta)
{
- rq->rt_avg += rt_delta;
+ rq->rt_avg += rt_delta * arch_scale_freq_capacity(NULL, cpu_of(rq));
sched_avg_update(rq);
}
#else
extern void print_dl_stats(struct seq_file *m, int cpu);
extern void init_cfs_rq(struct cfs_rq *cfs_rq);
-extern void init_rt_rq(struct rt_rq *rt_rq, struct rq *rq);
-extern void init_dl_rq(struct dl_rq *dl_rq, struct rq *rq);
+extern void init_rt_rq(struct rt_rq *rt_rq);
+extern void init_dl_rq(struct dl_rq *dl_rq);
extern void cfs_bandwidth_usage_inc(void);
extern void cfs_bandwidth_usage_dec(void);
#include <linux/cpu.h>
#include <linux/err.h>
#include <linux/smp.h>
+#include <linux/delay.h>
#include <linux/init.h>
#include <linux/list.h>
#include <linux/slab.h>
put_online_cpus();
}
EXPORT_SYMBOL_GPL(smpboot_unregister_percpu_thread);
+
+static DEFINE_PER_CPU(atomic_t, cpu_hotplug_state) = ATOMIC_INIT(CPU_POST_DEAD);
+
+/*
+ * Called to poll specified CPU's state, for example, when waiting for
+ * a CPU to come online.
+ */
+int cpu_report_state(int cpu)
+{
+ return atomic_read(&per_cpu(cpu_hotplug_state, cpu));
+}
+
+/*
+ * If CPU has died properly, set its state to CPU_UP_PREPARE and
+ * return success. Otherwise, return -EBUSY if the CPU died after
+ * cpu_wait_death() timed out. And yet otherwise again, return -EAGAIN
+ * if cpu_wait_death() timed out and the CPU still hasn't gotten around
+ * to dying. In the latter two cases, the CPU might not be set up
+ * properly, but it is up to the arch-specific code to decide.
+ * Finally, -EIO indicates an unanticipated problem.
+ *
+ * Note that it is permissible to omit this call entirely, as is
+ * done in architectures that do no CPU-hotplug error checking.
+ */
+int cpu_check_up_prepare(int cpu)
+{
+ if (!IS_ENABLED(CONFIG_HOTPLUG_CPU)) {
+ atomic_set(&per_cpu(cpu_hotplug_state, cpu), CPU_UP_PREPARE);
+ return 0;
+ }
+
+ switch (atomic_read(&per_cpu(cpu_hotplug_state, cpu))) {
+
+ case CPU_POST_DEAD:
+
+ /* The CPU died properly, so just start it up again. */
+ atomic_set(&per_cpu(cpu_hotplug_state, cpu), CPU_UP_PREPARE);
+ return 0;
+
+ case CPU_DEAD_FROZEN:
+
+ /*
+ * Timeout during CPU death, so let caller know.
+ * The outgoing CPU completed its processing, but after
+ * cpu_wait_death() timed out and reported the error. The
+ * caller is free to proceed, in which case the state
+ * will be reset properly by cpu_set_state_online().
+ * Proceeding despite this -EBUSY return makes sense
+ * for systems where the outgoing CPUs take themselves
+ * offline, with no post-death manipulation required from
+ * a surviving CPU.
+ */
+ return -EBUSY;
+
+ case CPU_BROKEN:
+
+ /*
+ * The most likely reason we got here is that there was
+ * a timeout during CPU death, and the outgoing CPU never
+ * did complete its processing. This could happen on
+ * a virtualized system if the outgoing VCPU gets preempted
+ * for more than five seconds, and the user attempts to
+ * immediately online that same CPU. Trying again later
+ * might return -EBUSY above, hence -EAGAIN.
+ */
+ return -EAGAIN;
+
+ default:
+
+ /* Should not happen. Famous last words. */
+ return -EIO;
+ }
+}
+
+/*
+ * Mark the specified CPU online.
+ *
+ * Note that it is permissible to omit this call entirely, as is
+ * done in architectures that do no CPU-hotplug error checking.
+ */
+void cpu_set_state_online(int cpu)
+{
+ (void)atomic_xchg(&per_cpu(cpu_hotplug_state, cpu), CPU_ONLINE);
+}
+
+#ifdef CONFIG_HOTPLUG_CPU
+
+/*
+ * Wait for the specified CPU to exit the idle loop and die.
+ */
+bool cpu_wait_death(unsigned int cpu, int seconds)
+{
+ int jf_left = seconds * HZ;
+ int oldstate;
+ bool ret = true;
+ int sleep_jf = 1;
+
+ might_sleep();
+
+ /* The outgoing CPU will normally get done quite quickly. */
+ if (atomic_read(&per_cpu(cpu_hotplug_state, cpu)) == CPU_DEAD)
+ goto update_state;
+ udelay(5);
+
+ /* But if the outgoing CPU dawdles, wait increasingly long times. */
+ while (atomic_read(&per_cpu(cpu_hotplug_state, cpu)) != CPU_DEAD) {
+ schedule_timeout_uninterruptible(sleep_jf);
+ jf_left -= sleep_jf;
+ if (jf_left <= 0)
+ break;
+ sleep_jf = DIV_ROUND_UP(sleep_jf * 11, 10);
+ }
+update_state:
+ oldstate = atomic_read(&per_cpu(cpu_hotplug_state, cpu));
+ if (oldstate == CPU_DEAD) {
+ /* Outgoing CPU died normally, update state. */
+ smp_mb(); /* atomic_read() before update. */
+ atomic_set(&per_cpu(cpu_hotplug_state, cpu), CPU_POST_DEAD);
+ } else {
+ /* Outgoing CPU still hasn't died, set state accordingly. */
+ if (atomic_cmpxchg(&per_cpu(cpu_hotplug_state, cpu),
+ oldstate, CPU_BROKEN) != oldstate)
+ goto update_state;
+ ret = false;
+ }
+ return ret;
+}
+
+/*
+ * Called by the outgoing CPU to report its successful death. Return
+ * false if this report follows the surviving CPU's timing out.
+ *
+ * A separate "CPU_DEAD_FROZEN" is used when the surviving CPU
+ * timed out. This approach allows architectures to omit calls to
+ * cpu_check_up_prepare() and cpu_set_state_online() without defeating
+ * the next cpu_wait_death()'s polling loop.
+ */
+bool cpu_report_death(void)
+{
+ int oldstate;
+ int newstate;
+ int cpu = smp_processor_id();
+
+ do {
+ oldstate = atomic_read(&per_cpu(cpu_hotplug_state, cpu));
+ if (oldstate != CPU_BROKEN)
+ newstate = CPU_DEAD;
+ else
+ newstate = CPU_DEAD_FROZEN;
+ } while (atomic_cmpxchg(&per_cpu(cpu_hotplug_state, cpu),
+ oldstate, newstate) != oldstate);
+ return newstate == CPU_DEAD;
+}
+
+#endif /* #ifdef CONFIG_HOTPLUG_CPU */
*/
#include <linux/module.h>
+#include <linux/aio.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/slab.h>
.data = &watchdog_user_enabled,
.maxlen = sizeof (int),
.mode = 0644,
- .proc_handler = proc_dowatchdog,
+ .proc_handler = proc_watchdog,
.extra1 = &zero,
.extra2 = &one,
},
.data = &watchdog_thresh,
.maxlen = sizeof(int),
.mode = 0644,
- .proc_handler = proc_dowatchdog,
+ .proc_handler = proc_watchdog_thresh,
.extra1 = &zero,
.extra2 = &sixty,
},
+ {
+ .procname = "nmi_watchdog",
+ .data = &nmi_watchdog_enabled,
+ .maxlen = sizeof (int),
+ .mode = 0644,
+ .proc_handler = proc_nmi_watchdog,
+ .extra1 = &zero,
+#if defined(CONFIG_HAVE_NMI_WATCHDOG) || defined(CONFIG_HARDLOCKUP_DETECTOR)
+ .extra2 = &one,
+#else
+ .extra2 = &zero,
+#endif
+ },
+ {
+ .procname = "soft_watchdog",
+ .data = &soft_watchdog_enabled,
+ .maxlen = sizeof (int),
+ .mode = 0644,
+ .proc_handler = proc_soft_watchdog,
+ .extra1 = &zero,
+ .extra2 = &one,
+ },
{
.procname = "softlockup_panic",
.data = &softlockup_panic,
.extra2 = &one,
},
#endif /* CONFIG_SMP */
- {
- .procname = "nmi_watchdog",
- .data = &watchdog_user_enabled,
- .maxlen = sizeof (int),
- .mode = 0644,
- .proc_handler = proc_dowatchdog,
- .extra1 = &zero,
- .extra2 = &one,
- },
#endif
#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86)
{
config GENERIC_CLOCKEVENTS
bool
-# Migration helper. Builds, but does not invoke
-config GENERIC_CLOCKEVENTS_BUILD
- bool
- default y
- depends on GENERIC_CLOCKEVENTS
-
# Architecture can handle broadcast in a driver-agnostic way
config ARCH_HAS_TICK_BROADCAST
bool
obj-y += timekeeping.o ntp.o clocksource.o jiffies.o timer_list.o
obj-y += timeconv.o timecounter.o posix-clock.o alarmtimer.o
-obj-$(CONFIG_GENERIC_CLOCKEVENTS_BUILD) += clockevents.o
-obj-$(CONFIG_GENERIC_CLOCKEVENTS) += tick-common.o
+obj-$(CONFIG_GENERIC_CLOCKEVENTS) += clockevents.o tick-common.o
ifeq ($(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST),y)
obj-y += tick-broadcast.o
obj-$(CONFIG_TICK_ONESHOT) += tick-broadcast-hrtimer.o
endif
obj-$(CONFIG_GENERIC_SCHED_CLOCK) += sched_clock.o
-obj-$(CONFIG_TICK_ONESHOT) += tick-oneshot.o
-obj-$(CONFIG_TICK_ONESHOT) += tick-sched.o
+obj-$(CONFIG_TICK_ONESHOT) += tick-oneshot.o tick-sched.o
obj-$(CONFIG_TIMER_STATS) += timer_stats.o
obj-$(CONFIG_DEBUG_FS) += timekeeping_debug.o
obj-$(CONFIG_TEST_UDELAY) += test_udelay.o
}
EXPORT_SYMBOL_GPL(clockevent_delta2ns);
+static int __clockevents_set_state(struct clock_event_device *dev,
+ enum clock_event_state state)
+{
+ /* Transition with legacy set_mode() callback */
+ if (dev->set_mode) {
+ /* Legacy callback doesn't support new modes */
+ if (state > CLOCK_EVT_STATE_ONESHOT)
+ return -ENOSYS;
+ /*
+ * 'clock_event_state' and 'clock_event_mode' have 1-to-1
+ * mapping until *_ONESHOT, and so a simple cast will work.
+ */
+ dev->set_mode((enum clock_event_mode)state, dev);
+ dev->mode = (enum clock_event_mode)state;
+ return 0;
+ }
+
+ if (dev->features & CLOCK_EVT_FEAT_DUMMY)
+ return 0;
+
+ /* Transition with new state-specific callbacks */
+ switch (state) {
+ case CLOCK_EVT_STATE_DETACHED:
+ /*
+ * This is an internal state, which is guaranteed to go from
+ * SHUTDOWN to DETACHED. No driver interaction required.
+ */
+ return 0;
+
+ case CLOCK_EVT_STATE_SHUTDOWN:
+ return dev->set_state_shutdown(dev);
+
+ case CLOCK_EVT_STATE_PERIODIC:
+ /* Core internal bug */
+ if (!(dev->features & CLOCK_EVT_FEAT_PERIODIC))
+ return -ENOSYS;
+ return dev->set_state_periodic(dev);
+
+ case CLOCK_EVT_STATE_ONESHOT:
+ /* Core internal bug */
+ if (!(dev->features & CLOCK_EVT_FEAT_ONESHOT))
+ return -ENOSYS;
+ return dev->set_state_oneshot(dev);
+
+ default:
+ return -ENOSYS;
+ }
+}
+
/**
- * clockevents_set_mode - set the operating mode of a clock event device
+ * clockevents_set_state - set the operating state of a clock event device
* @dev: device to modify
- * @mode: new mode
+ * @state: new state
*
* Must be called with interrupts disabled !
*/
-void clockevents_set_mode(struct clock_event_device *dev,
- enum clock_event_mode mode)
+void clockevents_set_state(struct clock_event_device *dev,
+ enum clock_event_state state)
{
- if (dev->mode != mode) {
- dev->set_mode(mode, dev);
- dev->mode = mode;
+ if (dev->state != state) {
+ if (__clockevents_set_state(dev, state))
+ return;
+
+ dev->state = state;
/*
* A nsec2cyc multiplicator of 0 is invalid and we'd crash
* on it, so fix it up and emit a warning:
*/
- if (mode == CLOCK_EVT_MODE_ONESHOT) {
+ if (state == CLOCK_EVT_STATE_ONESHOT) {
if (unlikely(!dev->mult)) {
dev->mult = 1;
WARN_ON(1);
*/
void clockevents_shutdown(struct clock_event_device *dev)
{
- clockevents_set_mode(dev, CLOCK_EVT_MODE_SHUTDOWN);
+ clockevents_set_state(dev, CLOCK_EVT_STATE_SHUTDOWN);
dev->next_event.tv64 = KTIME_MAX;
}
+/**
+ * clockevents_tick_resume - Resume the tick device before using it again
+ * @dev: device to resume
+ */
+int clockevents_tick_resume(struct clock_event_device *dev)
+{
+ int ret = 0;
+
+ if (dev->set_mode) {
+ dev->set_mode(CLOCK_EVT_MODE_RESUME, dev);
+ dev->mode = CLOCK_EVT_MODE_RESUME;
+ } else if (dev->tick_resume) {
+ ret = dev->tick_resume(dev);
+ }
+
+ return ret;
+}
+
#ifdef CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST
/* Limit min_delta to a jiffie */
delta = dev->min_delta_ns;
dev->next_event = ktime_add_ns(ktime_get(), delta);
- if (dev->mode == CLOCK_EVT_MODE_SHUTDOWN)
+ if (dev->state == CLOCK_EVT_STATE_SHUTDOWN)
return 0;
dev->retries++;
delta = dev->min_delta_ns;
dev->next_event = ktime_add_ns(ktime_get(), delta);
- if (dev->mode == CLOCK_EVT_MODE_SHUTDOWN)
+ if (dev->state == CLOCK_EVT_STATE_SHUTDOWN)
return 0;
dev->retries++;
dev->next_event = expires;
- if (dev->mode == CLOCK_EVT_MODE_SHUTDOWN)
+ if (dev->state == CLOCK_EVT_STATE_SHUTDOWN)
return 0;
/* Shortcut for clockevent devices that can deal with ktime. */
struct clock_event_device *dev, *newdev = NULL;
list_for_each_entry(dev, &clockevent_devices, list) {
- if (dev == ced || dev->mode != CLOCK_EVT_MODE_UNUSED)
+ if (dev == ced || dev->state != CLOCK_EVT_STATE_DETACHED)
continue;
if (!tick_check_replacement(newdev, dev))
static int __clockevents_try_unbind(struct clock_event_device *ced, int cpu)
{
/* Fast track. Device is unused */
- if (ced->mode == CLOCK_EVT_MODE_UNUSED) {
+ if (ced->state == CLOCK_EVT_STATE_DETACHED) {
list_del_init(&ced->list);
return 0;
}
}
EXPORT_SYMBOL_GPL(clockevents_unbind);
+/* Sanity check of state transition callbacks */
+static int clockevents_sanity_check(struct clock_event_device *dev)
+{
+ /* Legacy set_mode() callback */
+ if (dev->set_mode) {
+ /* We shouldn't be supporting new modes now */
+ WARN_ON(dev->set_state_periodic || dev->set_state_oneshot ||
+ dev->set_state_shutdown || dev->tick_resume);
+
+ BUG_ON(dev->mode != CLOCK_EVT_MODE_UNUSED);
+ return 0;
+ }
+
+ if (dev->features & CLOCK_EVT_FEAT_DUMMY)
+ return 0;
+
+ /* New state-specific callbacks */
+ if (!dev->set_state_shutdown)
+ return -EINVAL;
+
+ if ((dev->features & CLOCK_EVT_FEAT_PERIODIC) &&
+ !dev->set_state_periodic)
+ return -EINVAL;
+
+ if ((dev->features & CLOCK_EVT_FEAT_ONESHOT) &&
+ !dev->set_state_oneshot)
+ return -EINVAL;
+
+ return 0;
+}
+
/**
* clockevents_register_device - register a clock event device
* @dev: device to register
{
unsigned long flags;
- BUG_ON(dev->mode != CLOCK_EVT_MODE_UNUSED);
+ BUG_ON(clockevents_sanity_check(dev));
+
+ /* Initialize state to DETACHED */
+ dev->state = CLOCK_EVT_STATE_DETACHED;
+
if (!dev->cpumask) {
WARN_ON(num_possible_cpus() > 1);
dev->cpumask = cpumask_of(smp_processor_id());
{
clockevents_config(dev, freq);
- if (dev->mode == CLOCK_EVT_MODE_ONESHOT)
+ if (dev->state == CLOCK_EVT_STATE_ONESHOT)
return clockevents_program_event(dev, dev->next_event, false);
- if (dev->mode == CLOCK_EVT_MODE_PERIODIC)
- dev->set_mode(CLOCK_EVT_MODE_PERIODIC, dev);
+ if (dev->state == CLOCK_EVT_STATE_PERIODIC)
+ return __clockevents_set_state(dev, CLOCK_EVT_STATE_PERIODIC);
return 0;
}
* @old: device to release (can be NULL)
* @new: device to request (can be NULL)
*
- * Called from the notifier chain. clockevents_lock is held already
+ * Called from various tick functions with clockevents_lock held and
+ * interrupts disabled.
*/
void clockevents_exchange_device(struct clock_event_device *old,
struct clock_event_device *new)
{
- unsigned long flags;
-
- local_irq_save(flags);
/*
* Caller releases a clock event device. We queue it into the
* released list and do a notify add later.
*/
if (old) {
module_put(old->owner);
- clockevents_set_mode(old, CLOCK_EVT_MODE_UNUSED);
+ clockevents_set_state(old, CLOCK_EVT_STATE_DETACHED);
list_del(&old->list);
list_add(&old->list, &clockevents_released);
}
if (new) {
- BUG_ON(new->mode != CLOCK_EVT_MODE_UNUSED);
+ BUG_ON(new->state != CLOCK_EVT_STATE_DETACHED);
clockevents_shutdown(new);
}
- local_irq_restore(flags);
}
/**
dev->resume(dev);
}
-#ifdef CONFIG_GENERIC_CLOCKEVENTS
+#ifdef CONFIG_HOTPLUG_CPU
/**
- * clockevents_notify - notification about relevant events
- * Returns 0 on success, any other value on error
+ * tick_cleanup_dead_cpu - Cleanup the tick and clockevents of a dead cpu
*/
-int clockevents_notify(unsigned long reason, void *arg)
+void tick_cleanup_dead_cpu(int cpu)
{
struct clock_event_device *dev, *tmp;
unsigned long flags;
- int cpu, ret = 0;
raw_spin_lock_irqsave(&clockevents_lock, flags);
- switch (reason) {
- case CLOCK_EVT_NOTIFY_BROADCAST_ON:
- case CLOCK_EVT_NOTIFY_BROADCAST_OFF:
- case CLOCK_EVT_NOTIFY_BROADCAST_FORCE:
- tick_broadcast_on_off(reason, arg);
- break;
-
- case CLOCK_EVT_NOTIFY_BROADCAST_ENTER:
- case CLOCK_EVT_NOTIFY_BROADCAST_EXIT:
- ret = tick_broadcast_oneshot_control(reason);
- break;
-
- case CLOCK_EVT_NOTIFY_CPU_DYING:
- tick_handover_do_timer(arg);
- break;
-
- case CLOCK_EVT_NOTIFY_SUSPEND:
- tick_suspend();
- tick_suspend_broadcast();
- break;
-
- case CLOCK_EVT_NOTIFY_RESUME:
- tick_resume();
- break;
-
- case CLOCK_EVT_NOTIFY_CPU_DEAD:
- tick_shutdown_broadcast_oneshot(arg);
- tick_shutdown_broadcast(arg);
- tick_shutdown(arg);
- /*
- * Unregister the clock event devices which were
- * released from the users in the notify chain.
- */
- list_for_each_entry_safe(dev, tmp, &clockevents_released, list)
+ tick_shutdown_broadcast_oneshot(cpu);
+ tick_shutdown_broadcast(cpu);
+ tick_shutdown(cpu);
+ /*
+ * Unregister the clock event devices which were
+ * released from the users in the notify chain.
+ */
+ list_for_each_entry_safe(dev, tmp, &clockevents_released, list)
+ list_del(&dev->list);
+ /*
+ * Now check whether the CPU has left unused per cpu devices
+ */
+ list_for_each_entry_safe(dev, tmp, &clockevent_devices, list) {
+ if (cpumask_test_cpu(cpu, dev->cpumask) &&
+ cpumask_weight(dev->cpumask) == 1 &&
+ !tick_is_broadcast_device(dev)) {
+ BUG_ON(dev->state != CLOCK_EVT_STATE_DETACHED);
list_del(&dev->list);
- /*
- * Now check whether the CPU has left unused per cpu devices
- */
- cpu = *((int *)arg);
- list_for_each_entry_safe(dev, tmp, &clockevent_devices, list) {
- if (cpumask_test_cpu(cpu, dev->cpumask) &&
- cpumask_weight(dev->cpumask) == 1 &&
- !tick_is_broadcast_device(dev)) {
- BUG_ON(dev->mode != CLOCK_EVT_MODE_UNUSED);
- list_del(&dev->list);
- }
}
- break;
- default:
- break;
}
raw_spin_unlock_irqrestore(&clockevents_lock, flags);
- return ret;
}
-EXPORT_SYMBOL_GPL(clockevents_notify);
+#endif
#ifdef CONFIG_SYSFS
struct bus_type clockevents_subsys = {
}
device_initcall(clockevents_init_sysfs);
#endif /* SYSFS */
-
-#endif /* GENERIC_CLOCK_EVENTS */
schedule_work(&watchdog_work);
}
-static void clocksource_unstable(struct clocksource *cs, int64_t delta)
-{
- printk(KERN_WARNING "Clocksource %s unstable (delta = %Ld ns)\n",
- cs->name, delta);
- __clocksource_unstable(cs);
-}
-
/**
* clocksource_mark_unstable - mark clocksource unstable via watchdog
* @cs: clocksource to be marked unstable
static void clocksource_watchdog(unsigned long data)
{
struct clocksource *cs;
- cycle_t csnow, wdnow, delta;
+ cycle_t csnow, wdnow, cslast, wdlast, delta;
int64_t wd_nsec, cs_nsec;
int next_cpu, reset_pending;
delta = clocksource_delta(csnow, cs->cs_last, cs->mask);
cs_nsec = clocksource_cyc2ns(delta, cs->mult, cs->shift);
+ wdlast = cs->wd_last; /* save these in case we print them */
+ cslast = cs->cs_last;
cs->cs_last = csnow;
cs->wd_last = wdnow;
/* Check the deviation from the watchdog clocksource. */
if ((abs(cs_nsec - wd_nsec) > WATCHDOG_THRESHOLD)) {
- clocksource_unstable(cs, cs_nsec - wd_nsec);
+ pr_warn("timekeeping watchdog: Marking clocksource '%s' as unstable, because the skew is too large:\n", cs->name);
+ pr_warn(" '%s' wd_now: %llx wd_last: %llx mask: %llx\n",
+ watchdog->name, wdnow, wdlast, watchdog->mask);
+ pr_warn(" '%s' cs_now: %llx cs_last: %llx mask: %llx\n",
+ cs->name, csnow, cslast, cs->mask);
+ __clocksource_unstable(cs);
continue;
}
* @shift: cycle to nanosecond divisor (power of two)
* @maxadj: maximum adjustment value to mult (~11%)
* @mask: bitmask for two's complement subtraction of non 64 bit counters
+ * @max_cyc: maximum cycle value before potential overflow (does not include
+ * any safety margin)
+ *
+ * NOTE: This function includes a safety margin of 50%, in other words, we
+ * return half the number of nanoseconds the hardware counter can technically
+ * cover. This is done so that we can potentially detect problems caused by
+ * delayed timers or bad hardware, which might result in time intervals that
+ * are larger then what the math used can handle without overflows.
*/
-u64 clocks_calc_max_nsecs(u32 mult, u32 shift, u32 maxadj, u64 mask)
+u64 clocks_calc_max_nsecs(u32 mult, u32 shift, u32 maxadj, u64 mask, u64 *max_cyc)
{
u64 max_nsecs, max_cycles;
/*
* Calculate the maximum number of cycles that we can pass to the
- * cyc2ns function without overflowing a 64-bit signed result. The
- * maximum number of cycles is equal to ULLONG_MAX/(mult+maxadj)
- * which is equivalent to the below.
- * max_cycles < (2^63)/(mult + maxadj)
- * max_cycles < 2^(log2((2^63)/(mult + maxadj)))
- * max_cycles < 2^(log2(2^63) - log2(mult + maxadj))
- * max_cycles < 2^(63 - log2(mult + maxadj))
- * max_cycles < 1 << (63 - log2(mult + maxadj))
- * Please note that we add 1 to the result of the log2 to account for
- * any rounding errors, ensure the above inequality is satisfied and
- * no overflow will occur.
+ * cyc2ns() function without overflowing a 64-bit result.
*/
- max_cycles = 1ULL << (63 - (ilog2(mult + maxadj) + 1));
+ max_cycles = ULLONG_MAX;
+ do_div(max_cycles, mult+maxadj);
/*
* The actual maximum number of cycles we can defer the clocksource is
max_cycles = min(max_cycles, mask);
max_nsecs = clocksource_cyc2ns(max_cycles, mult - maxadj, shift);
+ /* return the max_cycles value as well if requested */
+ if (max_cyc)
+ *max_cyc = max_cycles;
+
+ /* Return 50% of the actual maximum, so we can detect bad values */
+ max_nsecs >>= 1;
+
return max_nsecs;
}
/**
- * clocksource_max_deferment - Returns max time the clocksource can be deferred
- * @cs: Pointer to clocksource
+ * clocksource_update_max_deferment - Updates the clocksource max_idle_ns & max_cycles
+ * @cs: Pointer to clocksource to be updated
*
*/
-static u64 clocksource_max_deferment(struct clocksource *cs)
+static inline void clocksource_update_max_deferment(struct clocksource *cs)
{
- u64 max_nsecs;
-
- max_nsecs = clocks_calc_max_nsecs(cs->mult, cs->shift, cs->maxadj,
- cs->mask);
- /*
- * To ensure that the clocksource does not wrap whilst we are idle,
- * limit the time the clocksource can be deferred by 12.5%. Please
- * note a margin of 12.5% is used because this can be computed with
- * a shift, versus say 10% which would require division.
- */
- return max_nsecs - (max_nsecs >> 3);
+ cs->max_idle_ns = clocks_calc_max_nsecs(cs->mult, cs->shift,
+ cs->maxadj, cs->mask,
+ &cs->max_cycles);
}
#ifndef CONFIG_ARCH_USES_GETTIMEOFFSET
}
/**
- * __clocksource_updatefreq_scale - Used update clocksource with new freq
+ * __clocksource_update_freq_scale - Used update clocksource with new freq
* @cs: clocksource to be registered
* @scale: Scale factor multiplied against freq to get clocksource hz
* @freq: clocksource frequency (cycles per second) divided by scale
* This should only be called from the clocksource->enable() method.
*
* This *SHOULD NOT* be called directly! Please use the
- * clocksource_updatefreq_hz() or clocksource_updatefreq_khz helper functions.
+ * __clocksource_update_freq_hz() or __clocksource_update_freq_khz() helper
+ * functions.
*/
-void __clocksource_updatefreq_scale(struct clocksource *cs, u32 scale, u32 freq)
+void __clocksource_update_freq_scale(struct clocksource *cs, u32 scale, u32 freq)
{
u64 sec;
+
/*
- * Calc the maximum number of seconds which we can run before
- * wrapping around. For clocksources which have a mask > 32bit
- * we need to limit the max sleep time to have a good
- * conversion precision. 10 minutes is still a reasonable
- * amount. That results in a shift value of 24 for a
- * clocksource with mask >= 40bit and f >= 4GHz. That maps to
- * ~ 0.06ppm granularity for NTP. We apply the same 12.5%
- * margin as we do in clocksource_max_deferment()
+ * Default clocksources are *special* and self-define their mult/shift.
+ * But, you're not special, so you should specify a freq value.
*/
- sec = (cs->mask - (cs->mask >> 3));
- do_div(sec, freq);
- do_div(sec, scale);
- if (!sec)
- sec = 1;
- else if (sec > 600 && cs->mask > UINT_MAX)
- sec = 600;
-
- clocks_calc_mult_shift(&cs->mult, &cs->shift, freq,
- NSEC_PER_SEC / scale, sec * scale);
-
+ if (freq) {
+ /*
+ * Calc the maximum number of seconds which we can run before
+ * wrapping around. For clocksources which have a mask > 32-bit
+ * we need to limit the max sleep time to have a good
+ * conversion precision. 10 minutes is still a reasonable
+ * amount. That results in a shift value of 24 for a
+ * clocksource with mask >= 40-bit and f >= 4GHz. That maps to
+ * ~ 0.06ppm granularity for NTP.
+ */
+ sec = cs->mask;
+ do_div(sec, freq);
+ do_div(sec, scale);
+ if (!sec)
+ sec = 1;
+ else if (sec > 600 && cs->mask > UINT_MAX)
+ sec = 600;
+
+ clocks_calc_mult_shift(&cs->mult, &cs->shift, freq,
+ NSEC_PER_SEC / scale, sec * scale);
+ }
/*
- * for clocksources that have large mults, to avoid overflow.
- * Since mult may be adjusted by ntp, add an safety extra margin
- *
+ * Ensure clocksources that have large 'mult' values don't overflow
+ * when adjusted.
*/
cs->maxadj = clocksource_max_adjustment(cs);
- while ((cs->mult + cs->maxadj < cs->mult)
- || (cs->mult - cs->maxadj > cs->mult)) {
+ while (freq && ((cs->mult + cs->maxadj < cs->mult)
+ || (cs->mult - cs->maxadj > cs->mult))) {
cs->mult >>= 1;
cs->shift--;
cs->maxadj = clocksource_max_adjustment(cs);
}
- cs->max_idle_ns = clocksource_max_deferment(cs);
+ /*
+ * Only warn for *special* clocksources that self-define
+ * their mult/shift values and don't specify a freq.
+ */
+ WARN_ONCE(cs->mult + cs->maxadj < cs->mult,
+ "timekeeping: Clocksource %s might overflow on 11%% adjustment\n",
+ cs->name);
+
+ clocksource_update_max_deferment(cs);
+
+ pr_info("clocksource %s: mask: 0x%llx max_cycles: 0x%llx, max_idle_ns: %lld ns\n",
+ cs->name, cs->mask, cs->max_cycles, cs->max_idle_ns);
}
-EXPORT_SYMBOL_GPL(__clocksource_updatefreq_scale);
+EXPORT_SYMBOL_GPL(__clocksource_update_freq_scale);
/**
* __clocksource_register_scale - Used to install new clocksources
{
/* Initialize mult/shift and max_idle_ns */
- __clocksource_updatefreq_scale(cs, scale, freq);
+ __clocksource_update_freq_scale(cs, scale, freq);
/* Add clocksource to the clocksource list */
mutex_lock(&clocksource_mutex);
}
EXPORT_SYMBOL_GPL(__clocksource_register_scale);
-
-/**
- * clocksource_register - Used to install new clocksources
- * @cs: clocksource to be registered
- *
- * Returns -EBUSY if registration fails, zero otherwise.
- */
-int clocksource_register(struct clocksource *cs)
-{
- /* calculate max adjustment for given mult/shift */
- cs->maxadj = clocksource_max_adjustment(cs);
- WARN_ONCE(cs->mult + cs->maxadj < cs->mult,
- "Clocksource %s might overflow on 11%% adjustment\n",
- cs->name);
-
- /* calculate max idle time permitted for this clocksource */
- cs->max_idle_ns = clocksource_max_deferment(cs);
-
- mutex_lock(&clocksource_mutex);
- clocksource_enqueue(cs);
- clocksource_enqueue_watchdog(cs);
- clocksource_select();
- mutex_unlock(&clocksource_mutex);
- return 0;
-}
-EXPORT_SYMBOL(clocksource_register);
-
static void __clocksource_change_rating(struct clocksource *cs, int rating)
{
list_del(&cs->list);
#include <trace/events/timer.h>
-#include "timekeeping.h"
+#include "tick-internal.h"
/*
* The timer bases:
break;
#ifdef CONFIG_HOTPLUG_CPU
- case CPU_DYING:
- case CPU_DYING_FROZEN:
- clockevents_notify(CLOCK_EVT_NOTIFY_CPU_DYING, &scpu);
- break;
case CPU_DEAD:
case CPU_DEAD_FROZEN:
- {
- clockevents_notify(CLOCK_EVT_NOTIFY_CPU_DEAD, &scpu);
migrate_hrtimers(scpu);
break;
- }
#endif
default:
#include <linux/module.h>
#include <linux/init.h>
-#include "tick-internal.h"
+#include "timekeeping.h"
/* The Jiffies based clocksource is the lowest common
* denominator clock source which should function on
.mask = 0xffffffff, /*32bits*/
.mult = NSEC_PER_JIFFY << JIFFIES_SHIFT, /* details above */
.shift = JIFFIES_SHIFT,
+ .max_cycles = 10,
};
__cacheline_aligned_in_smp DEFINE_SEQLOCK(jiffies_lock);
static int __init init_jiffies_clocksource(void)
{
- return clocksource_register(&clocksource_jiffies);
+ return __clocksource_register(&clocksource_jiffies);
}
core_initcall(init_jiffies_clocksource);
refined_jiffies.mult = ((u32)nsec_per_tick) << JIFFIES_SHIFT;
- clocksource_register(&refined_jiffies);
+ __clocksource_register(&refined_jiffies);
return 0;
}
#include <linux/module.h>
#include <linux/rtc.h>
-#include "tick-internal.h"
#include "ntp_internal.h"
/*
return leap;
}
+#ifdef CONFIG_GENERIC_CMOS_UPDATE
+int __weak update_persistent_clock64(struct timespec64 now64)
+{
+ struct timespec now;
+
+ now = timespec64_to_timespec(now64);
+ return update_persistent_clock(now);
+}
+#endif
+
#if defined(CONFIG_GENERIC_CMOS_UPDATE) || defined(CONFIG_RTC_SYSTOHC)
static void sync_cmos_clock(struct work_struct *work);
if (persistent_clock_is_local)
adjust.tv_sec -= (sys_tz.tz_minuteswest * 60);
#ifdef CONFIG_GENERIC_CMOS_UPDATE
- fail = update_persistent_clock(timespec64_to_timespec(adjust));
+ fail = update_persistent_clock64(adjust);
#endif
+
#ifdef CONFIG_RTC_SYSTOHC
if (fail == -ENODEV)
fail = rtc_set_ntp_time(adjust);
/*
- * sched_clock.c: support for extending counters to full 64-bit ns counter
+ * sched_clock.c: Generic sched_clock() support, to extend low level
+ * hardware time counters to full 64-bit ns values.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
#include <linux/seqlock.h>
#include <linux/bitops.h>
-struct clock_data {
- ktime_t wrap_kt;
+/**
+ * struct clock_read_data - data required to read from sched_clock()
+ *
+ * @epoch_ns: sched_clock() value at last update
+ * @epoch_cyc: Clock cycle value at last update.
+ * @sched_clock_mask: Bitmask for two's complement subtraction of non 64bit
+ * clocks.
+ * @read_sched_clock: Current clock source (or dummy source when suspended).
+ * @mult: Multipler for scaled math conversion.
+ * @shift: Shift value for scaled math conversion.
+ *
+ * Care must be taken when updating this structure; it is read by
+ * some very hot code paths. It occupies <=40 bytes and, when combined
+ * with the seqcount used to synchronize access, comfortably fits into
+ * a 64 byte cache line.
+ */
+struct clock_read_data {
u64 epoch_ns;
u64 epoch_cyc;
- seqcount_t seq;
- unsigned long rate;
+ u64 sched_clock_mask;
+ u64 (*read_sched_clock)(void);
u32 mult;
u32 shift;
- bool suspended;
+};
+
+/**
+ * struct clock_data - all data needed for sched_clock() (including
+ * registration of a new clock source)
+ *
+ * @seq: Sequence counter for protecting updates. The lowest
+ * bit is the index for @read_data.
+ * @read_data: Data required to read from sched_clock.
+ * @wrap_kt: Duration for which clock can run before wrapping.
+ * @rate: Tick rate of the registered clock.
+ * @actual_read_sched_clock: Registered hardware level clock read function.
+ *
+ * The ordering of this structure has been chosen to optimize cache
+ * performance. In particular 'seq' and 'read_data[0]' (combined) should fit
+ * into a single 64-byte cache line.
+ */
+struct clock_data {
+ seqcount_t seq;
+ struct clock_read_data read_data[2];
+ ktime_t wrap_kt;
+ unsigned long rate;
+
+ u64 (*actual_read_sched_clock)(void);
};
static struct hrtimer sched_clock_timer;
core_param(irqtime, irqtime, int, 0400);
-static struct clock_data cd = {
- .mult = NSEC_PER_SEC / HZ,
-};
-
-static u64 __read_mostly sched_clock_mask;
-
static u64 notrace jiffy_sched_clock_read(void)
{
/*
return (u64)(jiffies - INITIAL_JIFFIES);
}
-static u64 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read;
+static struct clock_data cd ____cacheline_aligned = {
+ .read_data[0] = { .mult = NSEC_PER_SEC / HZ,
+ .read_sched_clock = jiffy_sched_clock_read, },
+ .actual_read_sched_clock = jiffy_sched_clock_read,
+};
static inline u64 notrace cyc_to_ns(u64 cyc, u32 mult, u32 shift)
{
unsigned long long notrace sched_clock(void)
{
- u64 epoch_ns;
- u64 epoch_cyc;
- u64 cyc;
+ u64 cyc, res;
unsigned long seq;
-
- if (cd.suspended)
- return cd.epoch_ns;
+ struct clock_read_data *rd;
do {
- seq = raw_read_seqcount_begin(&cd.seq);
- epoch_cyc = cd.epoch_cyc;
- epoch_ns = cd.epoch_ns;
+ seq = raw_read_seqcount(&cd.seq);
+ rd = cd.read_data + (seq & 1);
+
+ cyc = (rd->read_sched_clock() - rd->epoch_cyc) &
+ rd->sched_clock_mask;
+ res = rd->epoch_ns + cyc_to_ns(cyc, rd->mult, rd->shift);
} while (read_seqcount_retry(&cd.seq, seq));
- cyc = read_sched_clock();
- cyc = (cyc - epoch_cyc) & sched_clock_mask;
- return epoch_ns + cyc_to_ns(cyc, cd.mult, cd.shift);
+ return res;
+}
+
+/*
+ * Updating the data required to read the clock.
+ *
+ * sched_clock() will never observe mis-matched data even if called from
+ * an NMI. We do this by maintaining an odd/even copy of the data and
+ * steering sched_clock() to one or the other using a sequence counter.
+ * In order to preserve the data cache profile of sched_clock() as much
+ * as possible the system reverts back to the even copy when the update
+ * completes; the odd copy is used *only* during an update.
+ */
+static void update_clock_read_data(struct clock_read_data *rd)
+{
+ /* update the backup (odd) copy with the new data */
+ cd.read_data[1] = *rd;
+
+ /* steer readers towards the odd copy */
+ raw_write_seqcount_latch(&cd.seq);
+
+ /* now its safe for us to update the normal (even) copy */
+ cd.read_data[0] = *rd;
+
+ /* switch readers back to the even copy */
+ raw_write_seqcount_latch(&cd.seq);
}
/*
- * Atomically update the sched_clock epoch.
+ * Atomically update the sched_clock() epoch.
*/
-static void notrace update_sched_clock(void)
+static void update_sched_clock(void)
{
- unsigned long flags;
u64 cyc;
u64 ns;
+ struct clock_read_data rd;
+
+ rd = cd.read_data[0];
+
+ cyc = cd.actual_read_sched_clock();
+ ns = rd.epoch_ns + cyc_to_ns((cyc - rd.epoch_cyc) & rd.sched_clock_mask, rd.mult, rd.shift);
+
+ rd.epoch_ns = ns;
+ rd.epoch_cyc = cyc;
- cyc = read_sched_clock();
- ns = cd.epoch_ns +
- cyc_to_ns((cyc - cd.epoch_cyc) & sched_clock_mask,
- cd.mult, cd.shift);
-
- raw_local_irq_save(flags);
- raw_write_seqcount_begin(&cd.seq);
- cd.epoch_ns = ns;
- cd.epoch_cyc = cyc;
- raw_write_seqcount_end(&cd.seq);
- raw_local_irq_restore(flags);
+ update_clock_read_data(&rd);
}
static enum hrtimer_restart sched_clock_poll(struct hrtimer *hrt)
{
update_sched_clock();
hrtimer_forward_now(hrt, cd.wrap_kt);
+
return HRTIMER_RESTART;
}
-void __init sched_clock_register(u64 (*read)(void), int bits,
- unsigned long rate)
+void __init
+sched_clock_register(u64 (*read)(void), int bits, unsigned long rate)
{
u64 res, wrap, new_mask, new_epoch, cyc, ns;
u32 new_mult, new_shift;
- ktime_t new_wrap_kt;
unsigned long r;
char r_unit;
+ struct clock_read_data rd;
if (cd.rate > rate)
return;
WARN_ON(!irqs_disabled());
- /* calculate the mult/shift to convert counter ticks to ns. */
+ /* Calculate the mult/shift to convert counter ticks to ns. */
clocks_calc_mult_shift(&new_mult, &new_shift, rate, NSEC_PER_SEC, 3600);
new_mask = CLOCKSOURCE_MASK(bits);
+ cd.rate = rate;
+
+ /* Calculate how many nanosecs until we risk wrapping */
+ wrap = clocks_calc_max_nsecs(new_mult, new_shift, 0, new_mask, NULL);
+ cd.wrap_kt = ns_to_ktime(wrap);
- /* calculate how many ns until we wrap */
- wrap = clocks_calc_max_nsecs(new_mult, new_shift, 0, new_mask);
- new_wrap_kt = ns_to_ktime(wrap - (wrap >> 3));
+ rd = cd.read_data[0];
- /* update epoch for new counter and update epoch_ns from old counter*/
+ /* Update epoch for new counter and update 'epoch_ns' from old counter*/
new_epoch = read();
- cyc = read_sched_clock();
- ns = cd.epoch_ns + cyc_to_ns((cyc - cd.epoch_cyc) & sched_clock_mask,
- cd.mult, cd.shift);
+ cyc = cd.actual_read_sched_clock();
+ ns = rd.epoch_ns + cyc_to_ns((cyc - rd.epoch_cyc) & rd.sched_clock_mask, rd.mult, rd.shift);
+ cd.actual_read_sched_clock = read;
- raw_write_seqcount_begin(&cd.seq);
- read_sched_clock = read;
- sched_clock_mask = new_mask;
- cd.rate = rate;
- cd.wrap_kt = new_wrap_kt;
- cd.mult = new_mult;
- cd.shift = new_shift;
- cd.epoch_cyc = new_epoch;
- cd.epoch_ns = ns;
- raw_write_seqcount_end(&cd.seq);
+ rd.read_sched_clock = read;
+ rd.sched_clock_mask = new_mask;
+ rd.mult = new_mult;
+ rd.shift = new_shift;
+ rd.epoch_cyc = new_epoch;
+ rd.epoch_ns = ns;
+
+ update_clock_read_data(&rd);
r = rate;
if (r >= 4000000) {
r /= 1000000;
r_unit = 'M';
- } else if (r >= 1000) {
- r /= 1000;
- r_unit = 'k';
- } else
- r_unit = ' ';
-
- /* calculate the ns resolution of this counter */
+ } else {
+ if (r >= 1000) {
+ r /= 1000;
+ r_unit = 'k';
+ } else {
+ r_unit = ' ';
+ }
+ }
+
+ /* Calculate the ns resolution of this counter */
res = cyc_to_ns(1ULL, new_mult, new_shift);
pr_info("sched_clock: %u bits at %lu%cHz, resolution %lluns, wraps every %lluns\n",
bits, r, r_unit, res, wrap);
- /* Enable IRQ time accounting if we have a fast enough sched_clock */
+ /* Enable IRQ time accounting if we have a fast enough sched_clock() */
if (irqtime > 0 || (irqtime == -1 && rate >= 1000000))
enable_sched_clock_irqtime();
void __init sched_clock_postinit(void)
{
/*
- * If no sched_clock function has been provided at that point,
+ * If no sched_clock() function has been provided at that point,
* make it the final one one.
*/
- if (read_sched_clock == jiffy_sched_clock_read)
+ if (cd.actual_read_sched_clock == jiffy_sched_clock_read)
sched_clock_register(jiffy_sched_clock_read, BITS_PER_LONG, HZ);
update_sched_clock();
hrtimer_start(&sched_clock_timer, cd.wrap_kt, HRTIMER_MODE_REL);
}
+/*
+ * Clock read function for use when the clock is suspended.
+ *
+ * This function makes it appear to sched_clock() as if the clock
+ * stopped counting at its last update.
+ *
+ * This function must only be called from the critical
+ * section in sched_clock(). It relies on the read_seqcount_retry()
+ * at the end of the critical section to be sure we observe the
+ * correct copy of 'epoch_cyc'.
+ */
+static u64 notrace suspended_sched_clock_read(void)
+{
+ unsigned long seq = raw_read_seqcount(&cd.seq);
+
+ return cd.read_data[seq & 1].epoch_cyc;
+}
+
static int sched_clock_suspend(void)
{
+ struct clock_read_data *rd = &cd.read_data[0];
+
update_sched_clock();
hrtimer_cancel(&sched_clock_timer);
- cd.suspended = true;
+ rd->read_sched_clock = suspended_sched_clock_read;
+
return 0;
}
static void sched_clock_resume(void)
{
- cd.epoch_cyc = read_sched_clock();
+ struct clock_read_data *rd = &cd.read_data[0];
+
+ rd->epoch_cyc = cd.actual_read_sched_clock();
hrtimer_start(&sched_clock_timer, cd.wrap_kt, HRTIMER_MODE_REL);
- cd.suspended = false;
+ rd->read_sched_clock = cd.actual_read_sched_clock;
}
static struct syscore_ops sched_clock_ops = {
- .suspend = sched_clock_suspend,
- .resume = sched_clock_resume,
+ .suspend = sched_clock_suspend,
+ .resume = sched_clock_resume,
};
static int __init sched_clock_syscore_init(void)
{
register_syscore_ops(&sched_clock_ops);
+
return 0;
}
device_initcall(sched_clock_syscore_init);
static cpumask_var_t tick_broadcast_on;
static cpumask_var_t tmpmask;
static DEFINE_RAW_SPINLOCK(tick_broadcast_lock);
-static int tick_broadcast_force;
+static int tick_broadcast_forced;
#ifdef CONFIG_TICK_ONESHOT
static void tick_broadcast_clear_oneshot(int cpu);
+static void tick_resume_broadcast_oneshot(struct clock_event_device *bc);
#else
static inline void tick_broadcast_clear_oneshot(int cpu) { }
+static inline void tick_resume_broadcast_oneshot(struct clock_event_device *bc) { }
#endif
/*
/*
* The device is in periodic mode. No reprogramming necessary:
*/
- if (dev->mode == CLOCK_EVT_MODE_PERIODIC)
+ if (dev->state == CLOCK_EVT_STATE_PERIODIC)
goto unlock;
/*
raw_spin_unlock(&tick_broadcast_lock);
}
-/*
- * Powerstate information: The system enters/leaves a state, where
- * affected devices might stop
+/**
+ * tick_broadcast_control - Enable/disable or force broadcast mode
+ * @mode: The selected broadcast mode
+ *
+ * Called when the system enters a state where affected tick devices
+ * might stop. Note: TICK_BROADCAST_FORCE cannot be undone.
+ *
+ * Called with interrupts disabled, so clockevents_lock is not
+ * required here because the local clock event device cannot go away
+ * under us.
*/
-static void tick_do_broadcast_on_off(unsigned long *reason)
+void tick_broadcast_control(enum tick_broadcast_mode mode)
{
struct clock_event_device *bc, *dev;
struct tick_device *td;
- unsigned long flags;
int cpu, bc_stopped;
- raw_spin_lock_irqsave(&tick_broadcast_lock, flags);
-
- cpu = smp_processor_id();
- td = &per_cpu(tick_cpu_device, cpu);
+ td = this_cpu_ptr(&tick_cpu_device);
dev = td->evtdev;
- bc = tick_broadcast_device.evtdev;
/*
* Is the device not affected by the powerstate ?
*/
if (!dev || !(dev->features & CLOCK_EVT_FEAT_C3STOP))
- goto out;
+ return;
if (!tick_device_is_functional(dev))
- goto out;
+ return;
+ raw_spin_lock(&tick_broadcast_lock);
+ cpu = smp_processor_id();
+ bc = tick_broadcast_device.evtdev;
bc_stopped = cpumask_empty(tick_broadcast_mask);
- switch (*reason) {
- case CLOCK_EVT_NOTIFY_BROADCAST_ON:
- case CLOCK_EVT_NOTIFY_BROADCAST_FORCE:
+ switch (mode) {
+ case TICK_BROADCAST_FORCE:
+ tick_broadcast_forced = 1;
+ case TICK_BROADCAST_ON:
cpumask_set_cpu(cpu, tick_broadcast_on);
if (!cpumask_test_and_set_cpu(cpu, tick_broadcast_mask)) {
if (tick_broadcast_device.mode ==
TICKDEV_MODE_PERIODIC)
clockevents_shutdown(dev);
}
- if (*reason == CLOCK_EVT_NOTIFY_BROADCAST_FORCE)
- tick_broadcast_force = 1;
break;
- case CLOCK_EVT_NOTIFY_BROADCAST_OFF:
- if (tick_broadcast_force)
+
+ case TICK_BROADCAST_OFF:
+ if (tick_broadcast_forced)
break;
cpumask_clear_cpu(cpu, tick_broadcast_on);
if (!tick_device_is_functional(dev))
else
tick_broadcast_setup_oneshot(bc);
}
-out:
- raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags);
-}
-
-/*
- * Powerstate information: The system enters/leaves a state, where
- * affected devices might stop.
- */
-void tick_broadcast_on_off(unsigned long reason, int *oncpu)
-{
- if (!cpumask_test_cpu(*oncpu, cpu_online_mask))
- printk(KERN_ERR "tick-broadcast: ignoring broadcast for "
- "offline CPU #%d\n", *oncpu);
- else
- tick_do_broadcast_on_off(&reason);
+ raw_spin_unlock(&tick_broadcast_lock);
}
+EXPORT_SYMBOL_GPL(tick_broadcast_control);
/*
* Set the periodic handler depending on broadcast on/off
dev->event_handler = tick_handle_periodic_broadcast;
}
+#ifdef CONFIG_HOTPLUG_CPU
/*
* Remove a CPU from broadcasting
*/
-void tick_shutdown_broadcast(unsigned int *cpup)
+void tick_shutdown_broadcast(unsigned int cpu)
{
struct clock_event_device *bc;
unsigned long flags;
- unsigned int cpu = *cpup;
raw_spin_lock_irqsave(&tick_broadcast_lock, flags);
raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags);
}
+#endif
void tick_suspend_broadcast(void)
{
raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags);
}
-int tick_resume_broadcast(void)
+/*
+ * This is called from tick_resume_local() on a resuming CPU. That's
+ * called from the core resume function, tick_unfreeze() and the magic XEN
+ * resume hackery.
+ *
+ * In none of these cases the broadcast device mode can change and the
+ * bit of the resuming CPU in the broadcast mask is safe as well.
+ */
+bool tick_resume_check_broadcast(void)
+{
+ if (tick_broadcast_device.mode == TICKDEV_MODE_ONESHOT)
+ return false;
+ else
+ return cpumask_test_cpu(smp_processor_id(), tick_broadcast_mask);
+}
+
+void tick_resume_broadcast(void)
{
struct clock_event_device *bc;
unsigned long flags;
- int broadcast = 0;
raw_spin_lock_irqsave(&tick_broadcast_lock, flags);
bc = tick_broadcast_device.evtdev;
if (bc) {
- clockevents_set_mode(bc, CLOCK_EVT_MODE_RESUME);
+ clockevents_tick_resume(bc);
switch (tick_broadcast_device.mode) {
case TICKDEV_MODE_PERIODIC:
if (!cpumask_empty(tick_broadcast_mask))
tick_broadcast_start_periodic(bc);
- broadcast = cpumask_test_cpu(smp_processor_id(),
- tick_broadcast_mask);
break;
case TICKDEV_MODE_ONESHOT:
if (!cpumask_empty(tick_broadcast_mask))
- broadcast = tick_resume_broadcast_oneshot(bc);
+ tick_resume_broadcast_oneshot(bc);
break;
}
}
raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags);
-
- return broadcast;
}
-
#ifdef CONFIG_TICK_ONESHOT
static cpumask_var_t tick_broadcast_oneshot_mask;
{
int ret;
- if (bc->mode != CLOCK_EVT_MODE_ONESHOT)
- clockevents_set_mode(bc, CLOCK_EVT_MODE_ONESHOT);
+ if (bc->state != CLOCK_EVT_STATE_ONESHOT)
+ clockevents_set_state(bc, CLOCK_EVT_STATE_ONESHOT);
ret = clockevents_program_event(bc, expires, force);
if (!ret)
return ret;
}
-int tick_resume_broadcast_oneshot(struct clock_event_device *bc)
+static void tick_resume_broadcast_oneshot(struct clock_event_device *bc)
{
- clockevents_set_mode(bc, CLOCK_EVT_MODE_ONESHOT);
- return 0;
+ clockevents_set_state(bc, CLOCK_EVT_STATE_ONESHOT);
}
/*
* switched over, leave the device alone.
*/
if (td->mode == TICKDEV_MODE_ONESHOT) {
- clockevents_set_mode(td->evtdev,
- CLOCK_EVT_MODE_ONESHOT);
+ clockevents_set_state(td->evtdev,
+ CLOCK_EVT_STATE_ONESHOT);
}
}
}
if (dev->next_event.tv64 < bc->next_event.tv64)
return;
}
- clockevents_set_mode(dev, CLOCK_EVT_MODE_SHUTDOWN);
+ clockevents_set_state(dev, CLOCK_EVT_STATE_SHUTDOWN);
}
-static void broadcast_move_bc(int deadcpu)
-{
- struct clock_event_device *bc = tick_broadcast_device.evtdev;
-
- if (!bc || !broadcast_needs_cpu(bc, deadcpu))
- return;
- /* This moves the broadcast assignment to this cpu */
- clockevents_program_event(bc, bc->next_event, 1);
-}
-
-/*
- * Powerstate information: The system enters/leaves a state, where
- * affected devices might stop
+/**
+ * tick_broadcast_oneshot_control - Enter/exit broadcast oneshot mode
+ * @state: The target state (enter/exit)
+ *
+ * The system enters/leaves a state, where affected devices might stop
* Returns 0 on success, -EBUSY if the cpu is used to broadcast wakeups.
+ *
+ * Called with interrupts disabled, so clockevents_lock is not
+ * required here because the local clock event device cannot go away
+ * under us.
*/
-int tick_broadcast_oneshot_control(unsigned long reason)
+int tick_broadcast_oneshot_control(enum tick_broadcast_state state)
{
struct clock_event_device *bc, *dev;
struct tick_device *td;
- unsigned long flags;
- ktime_t now;
int cpu, ret = 0;
+ ktime_t now;
/*
* Periodic mode does not care about the enter/exit of power
* We are called with preemtion disabled from the depth of the
* idle code, so we can't be moved away.
*/
- cpu = smp_processor_id();
- td = &per_cpu(tick_cpu_device, cpu);
+ td = this_cpu_ptr(&tick_cpu_device);
dev = td->evtdev;
if (!(dev->features & CLOCK_EVT_FEAT_C3STOP))
return 0;
+ raw_spin_lock(&tick_broadcast_lock);
bc = tick_broadcast_device.evtdev;
+ cpu = smp_processor_id();
- raw_spin_lock_irqsave(&tick_broadcast_lock, flags);
- if (reason == CLOCK_EVT_NOTIFY_BROADCAST_ENTER) {
+ if (state == TICK_BROADCAST_ENTER) {
if (!cpumask_test_and_set_cpu(cpu, tick_broadcast_oneshot_mask)) {
WARN_ON_ONCE(cpumask_test_cpu(cpu, tick_broadcast_pending_mask));
broadcast_shutdown_local(bc, dev);
cpumask_clear_cpu(cpu, tick_broadcast_oneshot_mask);
} else {
if (cpumask_test_and_clear_cpu(cpu, tick_broadcast_oneshot_mask)) {
- clockevents_set_mode(dev, CLOCK_EVT_MODE_ONESHOT);
+ clockevents_set_state(dev, CLOCK_EVT_STATE_ONESHOT);
/*
* The cpu which was handling the broadcast
* timer marked this cpu in the broadcast
}
}
out:
- raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags);
+ raw_spin_unlock(&tick_broadcast_lock);
return ret;
}
+EXPORT_SYMBOL_GPL(tick_broadcast_oneshot_control);
/*
* Reset the one shot broadcast for a cpu
/* Set it up only once ! */
if (bc->event_handler != tick_handle_oneshot_broadcast) {
- int was_periodic = bc->mode == CLOCK_EVT_MODE_PERIODIC;
+ int was_periodic = bc->state == CLOCK_EVT_STATE_PERIODIC;
bc->event_handler = tick_handle_oneshot_broadcast;
tick_broadcast_oneshot_mask, tmpmask);
if (was_periodic && !cpumask_empty(tmpmask)) {
- clockevents_set_mode(bc, CLOCK_EVT_MODE_ONESHOT);
+ clockevents_set_state(bc, CLOCK_EVT_STATE_ONESHOT);
tick_broadcast_init_next_event(tmpmask,
tick_next_period);
tick_broadcast_set_event(bc, cpu, tick_next_period, 1);
raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags);
}
+#ifdef CONFIG_HOTPLUG_CPU
+void hotplug_cpu__broadcast_tick_pull(int deadcpu)
+{
+ struct clock_event_device *bc;
+ unsigned long flags;
+
+ raw_spin_lock_irqsave(&tick_broadcast_lock, flags);
+ bc = tick_broadcast_device.evtdev;
+
+ if (bc && broadcast_needs_cpu(bc, deadcpu)) {
+ /* This moves the broadcast assignment to this CPU: */
+ clockevents_program_event(bc, bc->next_event, 1);
+ }
+ raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags);
+}
/*
* Remove a dead CPU from broadcasting
*/
-void tick_shutdown_broadcast_oneshot(unsigned int *cpup)
+void tick_shutdown_broadcast_oneshot(unsigned int cpu)
{
unsigned long flags;
- unsigned int cpu = *cpup;
raw_spin_lock_irqsave(&tick_broadcast_lock, flags);
cpumask_clear_cpu(cpu, tick_broadcast_pending_mask);
cpumask_clear_cpu(cpu, tick_broadcast_force_mask);
- broadcast_move_bc(cpu);
-
raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags);
}
+#endif
/*
* Check, whether the broadcast device is in one shot mode
tick_periodic(cpu);
- if (dev->mode != CLOCK_EVT_MODE_ONESHOT)
+ if (dev->state != CLOCK_EVT_STATE_ONESHOT)
return;
for (;;) {
/*
if ((dev->features & CLOCK_EVT_FEAT_PERIODIC) &&
!tick_broadcast_oneshot_active()) {
- clockevents_set_mode(dev, CLOCK_EVT_MODE_PERIODIC);
+ clockevents_set_state(dev, CLOCK_EVT_STATE_PERIODIC);
} else {
unsigned long seq;
ktime_t next;
next = tick_next_period;
} while (read_seqretry(&jiffies_lock, seq));
- clockevents_set_mode(dev, CLOCK_EVT_MODE_ONESHOT);
+ clockevents_set_state(dev, CLOCK_EVT_STATE_ONESHOT);
for (;;) {
if (!clockevents_program_event(dev, next, false))
tick_install_broadcast_device(newdev);
}
+#ifdef CONFIG_HOTPLUG_CPU
/*
* Transfer the do_timer job away from a dying cpu.
*
- * Called with interrupts disabled.
+ * Called with interrupts disabled. Not locking required. If
+ * tick_do_timer_cpu is owned by this cpu, nothing can change it.
*/
-void tick_handover_do_timer(int *cpup)
+void tick_handover_do_timer(void)
{
- if (*cpup == tick_do_timer_cpu) {
+ if (tick_do_timer_cpu == smp_processor_id()) {
int cpu = cpumask_first(cpu_online_mask);
tick_do_timer_cpu = (cpu < nr_cpu_ids) ? cpu :
* access the hardware device itself.
* We just set the mode and remove it from the lists.
*/
-void tick_shutdown(unsigned int *cpup)
+void tick_shutdown(unsigned int cpu)
{
- struct tick_device *td = &per_cpu(tick_cpu_device, *cpup);
+ struct tick_device *td = &per_cpu(tick_cpu_device, cpu);
struct clock_event_device *dev = td->evtdev;
td->mode = TICKDEV_MODE_PERIODIC;
* Prevent that the clock events layer tries to call
* the set mode function!
*/
+ dev->state = CLOCK_EVT_STATE_DETACHED;
dev->mode = CLOCK_EVT_MODE_UNUSED;
clockevents_exchange_device(dev, NULL);
dev->event_handler = clockevents_handle_noop;
td->evtdev = NULL;
}
}
+#endif
-void tick_suspend(void)
+/**
+ * tick_suspend_local - Suspend the local tick device
+ *
+ * Called from the local cpu for freeze with interrupts disabled.
+ *
+ * No locks required. Nothing can change the per cpu device.
+ */
+void tick_suspend_local(void)
{
struct tick_device *td = this_cpu_ptr(&tick_cpu_device);
clockevents_shutdown(td->evtdev);
}
-void tick_resume(void)
+/**
+ * tick_resume_local - Resume the local tick device
+ *
+ * Called from the local CPU for unfreeze or XEN resume magic.
+ *
+ * No locks required. Nothing can change the per cpu device.
+ */
+void tick_resume_local(void)
{
struct tick_device *td = this_cpu_ptr(&tick_cpu_device);
- int broadcast = tick_resume_broadcast();
-
- clockevents_set_mode(td->evtdev, CLOCK_EVT_MODE_RESUME);
+ bool broadcast = tick_resume_check_broadcast();
+ clockevents_tick_resume(td->evtdev);
if (!broadcast) {
if (td->mode == TICKDEV_MODE_PERIODIC)
tick_setup_periodic(td->evtdev, 0);
}
}
+/**
+ * tick_suspend - Suspend the tick and the broadcast device
+ *
+ * Called from syscore_suspend() via timekeeping_suspend with only one
+ * CPU online and interrupts disabled or from tick_unfreeze() under
+ * tick_freeze_lock.
+ *
+ * No locks required. Nothing can change the per cpu device.
+ */
+void tick_suspend(void)
+{
+ tick_suspend_local();
+ tick_suspend_broadcast();
+}
+
+/**
+ * tick_resume - Resume the tick and the broadcast device
+ *
+ * Called from syscore_resume() via timekeeping_resume with only one
+ * CPU online and interrupts disabled.
+ *
+ * No locks required. Nothing can change the per cpu device.
+ */
+void tick_resume(void)
+{
+ tick_resume_broadcast();
+ tick_resume_local();
+}
+
static DEFINE_RAW_SPINLOCK(tick_freeze_lock);
static unsigned int tick_freeze_depth;
raw_spin_lock(&tick_freeze_lock);
tick_freeze_depth++;
- if (tick_freeze_depth == num_online_cpus()) {
+ if (tick_freeze_depth == num_online_cpus())
timekeeping_suspend();
- } else {
- tick_suspend();
- tick_suspend_broadcast();
- }
+ else
+ tick_suspend_local();
raw_spin_unlock(&tick_freeze_lock);
}
if (tick_freeze_depth == num_online_cpus())
timekeeping_resume();
else
- tick_resume();
+ tick_resume_local();
tick_freeze_depth--;
#include <linux/tick.h>
#include "timekeeping.h"
+#include "tick-sched.h"
-extern seqlock_t jiffies_lock;
+#ifdef CONFIG_GENERIC_CLOCKEVENTS
-#define CS_NAME_LEN 32
-
-#ifdef CONFIG_GENERIC_CLOCKEVENTS_BUILD
-
-#define TICK_DO_TIMER_NONE -1
-#define TICK_DO_TIMER_BOOT -2
+# define TICK_DO_TIMER_NONE -1
+# define TICK_DO_TIMER_BOOT -2
DECLARE_PER_CPU(struct tick_device, tick_cpu_device);
extern ktime_t tick_next_period;
extern void tick_setup_periodic(struct clock_event_device *dev, int broadcast);
extern void tick_handle_periodic(struct clock_event_device *dev);
extern void tick_check_new_device(struct clock_event_device *dev);
-extern void tick_handover_do_timer(int *cpup);
-extern void tick_shutdown(unsigned int *cpup);
+extern void tick_shutdown(unsigned int cpu);
extern void tick_suspend(void);
extern void tick_resume(void);
extern bool tick_check_replacement(struct clock_event_device *curdev,
struct clock_event_device *newdev);
extern void tick_install_replacement(struct clock_event_device *dev);
+extern int tick_is_oneshot_available(void);
+extern struct tick_device *tick_get_device(int cpu);
-extern void clockevents_shutdown(struct clock_event_device *dev);
+extern int clockevents_tick_resume(struct clock_event_device *dev);
+/* Check, if the device is functional or a dummy for broadcast */
+static inline int tick_device_is_functional(struct clock_event_device *dev)
+{
+ return !(dev->features & CLOCK_EVT_FEAT_DUMMY);
+}
+extern void clockevents_shutdown(struct clock_event_device *dev);
+extern void clockevents_exchange_device(struct clock_event_device *old,
+ struct clock_event_device *new);
+extern void clockevents_set_state(struct clock_event_device *dev,
+ enum clock_event_state state);
+extern int clockevents_program_event(struct clock_event_device *dev,
+ ktime_t expires, bool force);
+extern void clockevents_handle_noop(struct clock_event_device *dev);
+extern int __clockevents_update_freq(struct clock_event_device *dev, u32 freq);
extern ssize_t sysfs_get_uname(const char *buf, char *dst, size_t cnt);
-/*
- * NO_HZ / high resolution timer shared code
- */
+/* Broadcasting support */
+# ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
+extern int tick_device_uses_broadcast(struct clock_event_device *dev, int cpu);
+extern void tick_install_broadcast_device(struct clock_event_device *dev);
+extern int tick_is_broadcast_device(struct clock_event_device *dev);
+extern void tick_shutdown_broadcast(unsigned int cpu);
+extern void tick_suspend_broadcast(void);
+extern void tick_resume_broadcast(void);
+extern bool tick_resume_check_broadcast(void);
+extern void tick_broadcast_init(void);
+extern void tick_set_periodic_handler(struct clock_event_device *dev, int broadcast);
+extern int tick_broadcast_update_freq(struct clock_event_device *dev, u32 freq);
+extern struct tick_device *tick_get_broadcast_device(void);
+extern struct cpumask *tick_get_broadcast_mask(void);
+# else /* !CONFIG_GENERIC_CLOCKEVENTS_BROADCAST: */
+static inline void tick_install_broadcast_device(struct clock_event_device *dev) { }
+static inline int tick_is_broadcast_device(struct clock_event_device *dev) { return 0; }
+static inline int tick_device_uses_broadcast(struct clock_event_device *dev, int cpu) { return 0; }
+static inline void tick_do_periodic_broadcast(struct clock_event_device *d) { }
+static inline void tick_shutdown_broadcast(unsigned int cpu) { }
+static inline void tick_suspend_broadcast(void) { }
+static inline void tick_resume_broadcast(void) { }
+static inline bool tick_resume_check_broadcast(void) { return false; }
+static inline void tick_broadcast_init(void) { }
+static inline int tick_broadcast_update_freq(struct clock_event_device *dev, u32 freq) { return -ENODEV; }
+
+/* Set the periodic handler in non broadcast mode */
+static inline void tick_set_periodic_handler(struct clock_event_device *dev, int broadcast)
+{
+ dev->event_handler = tick_handle_periodic;
+}
+# endif /* !CONFIG_GENERIC_CLOCKEVENTS_BROADCAST */
+
+#else /* !GENERIC_CLOCKEVENTS: */
+static inline void tick_suspend(void) { }
+static inline void tick_resume(void) { }
+#endif /* !GENERIC_CLOCKEVENTS */
+
+/* Oneshot related functions */
#ifdef CONFIG_TICK_ONESHOT
extern void tick_setup_oneshot(struct clock_event_device *newdev,
void (*handler)(struct clock_event_device *),
extern void tick_oneshot_notify(void);
extern int tick_switch_to_oneshot(void (*handler)(struct clock_event_device *));
extern void tick_resume_oneshot(void);
-# ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
+static inline bool tick_oneshot_possible(void) { return true; }
+extern int tick_oneshot_mode_active(void);
+extern void tick_clock_notify(void);
+extern int tick_check_oneshot_change(int allow_nohz);
+extern int tick_init_highres(void);
+#else /* !CONFIG_TICK_ONESHOT: */
+static inline
+void tick_setup_oneshot(struct clock_event_device *newdev,
+ void (*handler)(struct clock_event_device *),
+ ktime_t nextevt) { BUG(); }
+static inline void tick_resume_oneshot(void) { BUG(); }
+static inline int tick_program_event(ktime_t expires, int force) { return 0; }
+static inline void tick_oneshot_notify(void) { }
+static inline bool tick_oneshot_possible(void) { return false; }
+static inline int tick_oneshot_mode_active(void) { return 0; }
+static inline void tick_clock_notify(void) { }
+static inline int tick_check_oneshot_change(int allow_nohz) { return 0; }
+#endif /* !CONFIG_TICK_ONESHOT */
+
+/* Functions related to oneshot broadcasting */
+#if defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) && defined(CONFIG_TICK_ONESHOT)
extern void tick_broadcast_setup_oneshot(struct clock_event_device *bc);
-extern int tick_broadcast_oneshot_control(unsigned long reason);
extern void tick_broadcast_switch_to_oneshot(void);
-extern void tick_shutdown_broadcast_oneshot(unsigned int *cpup);
-extern int tick_resume_broadcast_oneshot(struct clock_event_device *bc);
+extern void tick_shutdown_broadcast_oneshot(unsigned int cpu);
extern int tick_broadcast_oneshot_active(void);
extern void tick_check_oneshot_broadcast_this_cpu(void);
bool tick_broadcast_oneshot_available(void);
-# else /* BROADCAST */
-static inline void tick_broadcast_setup_oneshot(struct clock_event_device *bc)
-{
- BUG();
-}
-static inline int tick_broadcast_oneshot_control(unsigned long reason) { return 0; }
+extern struct cpumask *tick_get_broadcast_oneshot_mask(void);
+#else /* !(BROADCAST && ONESHOT): */
+static inline void tick_broadcast_setup_oneshot(struct clock_event_device *bc) { BUG(); }
static inline void tick_broadcast_switch_to_oneshot(void) { }
-static inline void tick_shutdown_broadcast_oneshot(unsigned int *cpup) { }
+static inline void tick_shutdown_broadcast_oneshot(unsigned int cpu) { }
static inline int tick_broadcast_oneshot_active(void) { return 0; }
static inline void tick_check_oneshot_broadcast_this_cpu(void) { }
-static inline bool tick_broadcast_oneshot_available(void) { return true; }
-# endif /* !BROADCAST */
-
-#else /* !ONESHOT */
-static inline
-void tick_setup_oneshot(struct clock_event_device *newdev,
- void (*handler)(struct clock_event_device *),
- ktime_t nextevt)
-{
- BUG();
-}
-static inline void tick_resume_oneshot(void)
-{
- BUG();
-}
-static inline int tick_program_event(ktime_t expires, int force)
-{
- return 0;
-}
-static inline void tick_oneshot_notify(void) { }
-static inline void tick_broadcast_setup_oneshot(struct clock_event_device *bc)
-{
- BUG();
-}
-static inline int tick_broadcast_oneshot_control(unsigned long reason) { return 0; }
-static inline void tick_shutdown_broadcast_oneshot(unsigned int *cpup) { }
-static inline int tick_resume_broadcast_oneshot(struct clock_event_device *bc)
-{
- return 0;
-}
-static inline int tick_broadcast_oneshot_active(void) { return 0; }
-static inline bool tick_broadcast_oneshot_available(void) { return false; }
-#endif /* !TICK_ONESHOT */
+static inline bool tick_broadcast_oneshot_available(void) { return tick_oneshot_possible(); }
+#endif /* !(BROADCAST && ONESHOT) */
/* NO_HZ_FULL internal */
#ifdef CONFIG_NO_HZ_FULL
# else
static inline void tick_nohz_init(void) { }
#endif
-
-/*
- * Broadcasting support
- */
-#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
-extern int tick_device_uses_broadcast(struct clock_event_device *dev, int cpu);
-extern void tick_install_broadcast_device(struct clock_event_device *dev);
-extern int tick_is_broadcast_device(struct clock_event_device *dev);
-extern void tick_broadcast_on_off(unsigned long reason, int *oncpu);
-extern void tick_shutdown_broadcast(unsigned int *cpup);
-extern void tick_suspend_broadcast(void);
-extern int tick_resume_broadcast(void);
-extern void tick_broadcast_init(void);
-extern void
-tick_set_periodic_handler(struct clock_event_device *dev, int broadcast);
-int tick_broadcast_update_freq(struct clock_event_device *dev, u32 freq);
-
-#else /* !BROADCAST */
-
-static inline void tick_install_broadcast_device(struct clock_event_device *dev)
-{
-}
-
-static inline int tick_is_broadcast_device(struct clock_event_device *dev)
-{
- return 0;
-}
-static inline int tick_device_uses_broadcast(struct clock_event_device *dev,
- int cpu)
-{
- return 0;
-}
-static inline void tick_do_periodic_broadcast(struct clock_event_device *d) { }
-static inline void tick_broadcast_on_off(unsigned long reason, int *oncpu) { }
-static inline void tick_shutdown_broadcast(unsigned int *cpup) { }
-static inline void tick_suspend_broadcast(void) { }
-static inline int tick_resume_broadcast(void) { return 0; }
-static inline void tick_broadcast_init(void) { }
-static inline int tick_broadcast_update_freq(struct clock_event_device *dev,
- u32 freq) { return -ENODEV; }
-
-/*
- * Set the periodic handler in non broadcast mode
- */
-static inline void tick_set_periodic_handler(struct clock_event_device *dev,
- int broadcast)
-{
- dev->event_handler = tick_handle_periodic;
-}
-#endif /* !BROADCAST */
-
-/*
- * Check, if the device is functional or a dummy for broadcast
- */
-static inline int tick_device_is_functional(struct clock_event_device *dev)
-{
- return !(dev->features & CLOCK_EVT_FEAT_DUMMY);
-}
-
-int __clockevents_update_freq(struct clock_event_device *dev, u32 freq);
-
-#endif
-
-extern void do_timer(unsigned long ticks);
-extern void update_wall_time(void);
{
struct clock_event_device *dev = __this_cpu_read(tick_cpu_device.evtdev);
- clockevents_set_mode(dev, CLOCK_EVT_MODE_ONESHOT);
+ clockevents_set_state(dev, CLOCK_EVT_STATE_ONESHOT);
clockevents_program_event(dev, ktime_get(), true);
}
ktime_t next_event)
{
newdev->event_handler = handler;
- clockevents_set_mode(newdev, CLOCK_EVT_MODE_ONESHOT);
+ clockevents_set_state(newdev, CLOCK_EVT_STATE_ONESHOT);
clockevents_program_event(newdev, next_event, true);
}
td->mode = TICKDEV_MODE_ONESHOT;
dev->event_handler = handler;
- clockevents_set_mode(dev, CLOCK_EVT_MODE_ONESHOT);
+ clockevents_set_state(dev, CLOCK_EVT_STATE_ONESHOT);
tick_broadcast_switch_to_oneshot();
return 0;
}
/*
* Per cpu nohz control structure
*/
-DEFINE_PER_CPU(struct tick_sched, tick_cpu_sched);
+static DEFINE_PER_CPU(struct tick_sched, tick_cpu_sched);
/*
* The time, when the last jiffy update happened. Protected by jiffies_lock.
__setup("nohz=", setup_tick_nohz);
+int tick_nohz_tick_stopped(void)
+{
+ return __this_cpu_read(tick_cpu_sched.tick_stopped);
+}
+
/**
* tick_nohz_update_jiffies - update jiffies when idle was interrupted
*
--- /dev/null
+#ifndef _TICK_SCHED_H
+#define _TICK_SCHED_H
+
+#include <linux/hrtimer.h>
+
+enum tick_device_mode {
+ TICKDEV_MODE_PERIODIC,
+ TICKDEV_MODE_ONESHOT,
+};
+
+struct tick_device {
+ struct clock_event_device *evtdev;
+ enum tick_device_mode mode;
+};
+
+enum tick_nohz_mode {
+ NOHZ_MODE_INACTIVE,
+ NOHZ_MODE_LOWRES,
+ NOHZ_MODE_HIGHRES,
+};
+
+/**
+ * struct tick_sched - sched tick emulation and no idle tick control/stats
+ * @sched_timer: hrtimer to schedule the periodic tick in high
+ * resolution mode
+ * @last_tick: Store the last tick expiry time when the tick
+ * timer is modified for nohz sleeps. This is necessary
+ * to resume the tick timer operation in the timeline
+ * when the CPU returns from nohz sleep.
+ * @tick_stopped: Indicator that the idle tick has been stopped
+ * @idle_jiffies: jiffies at the entry to idle for idle time accounting
+ * @idle_calls: Total number of idle calls
+ * @idle_sleeps: Number of idle calls, where the sched tick was stopped
+ * @idle_entrytime: Time when the idle call was entered
+ * @idle_waketime: Time when the idle was interrupted
+ * @idle_exittime: Time when the idle state was left
+ * @idle_sleeptime: Sum of the time slept in idle with sched tick stopped
+ * @iowait_sleeptime: Sum of the time slept in idle with sched tick stopped, with IO outstanding
+ * @sleep_length: Duration of the current idle sleep
+ * @do_timer_lst: CPU was the last one doing do_timer before going idle
+ */
+struct tick_sched {
+ struct hrtimer sched_timer;
+ unsigned long check_clocks;
+ enum tick_nohz_mode nohz_mode;
+ ktime_t last_tick;
+ int inidle;
+ int tick_stopped;
+ unsigned long idle_jiffies;
+ unsigned long idle_calls;
+ unsigned long idle_sleeps;
+ int idle_active;
+ ktime_t idle_entrytime;
+ ktime_t idle_waketime;
+ ktime_t idle_exittime;
+ ktime_t idle_sleeptime;
+ ktime_t iowait_sleeptime;
+ ktime_t sleep_length;
+ unsigned long last_jiffies;
+ unsigned long next_jiffies;
+ ktime_t idle_expires;
+ int do_timer_last;
+};
+
+extern struct tick_sched *tick_get_tick_sched(int cpu);
+
+extern void tick_setup_sched_timer(void);
+#if defined CONFIG_NO_HZ_COMMON || defined CONFIG_HIGH_RES_TIMERS
+extern void tick_cancel_sched_timer(int cpu);
+#else
+static inline void tick_cancel_sched_timer(int cpu) { }
+#endif
+
+#endif
};
static struct tk_fast tk_fast_mono ____cacheline_aligned;
+static struct tk_fast tk_fast_raw ____cacheline_aligned;
/* flag for if timekeeping is suspended */
int __read_mostly timekeeping_suspended;
-/* Flag for if there is a persistent clock on this platform */
-bool __read_mostly persistent_clock_exist = false;
-
static inline void tk_normalize_xtime(struct timekeeper *tk)
{
- while (tk->tkr.xtime_nsec >= ((u64)NSEC_PER_SEC << tk->tkr.shift)) {
- tk->tkr.xtime_nsec -= (u64)NSEC_PER_SEC << tk->tkr.shift;
+ while (tk->tkr_mono.xtime_nsec >= ((u64)NSEC_PER_SEC << tk->tkr_mono.shift)) {
+ tk->tkr_mono.xtime_nsec -= (u64)NSEC_PER_SEC << tk->tkr_mono.shift;
tk->xtime_sec++;
}
}
struct timespec64 ts;
ts.tv_sec = tk->xtime_sec;
- ts.tv_nsec = (long)(tk->tkr.xtime_nsec >> tk->tkr.shift);
+ ts.tv_nsec = (long)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift);
return ts;
}
static void tk_set_xtime(struct timekeeper *tk, const struct timespec64 *ts)
{
tk->xtime_sec = ts->tv_sec;
- tk->tkr.xtime_nsec = (u64)ts->tv_nsec << tk->tkr.shift;
+ tk->tkr_mono.xtime_nsec = (u64)ts->tv_nsec << tk->tkr_mono.shift;
}
static void tk_xtime_add(struct timekeeper *tk, const struct timespec64 *ts)
{
tk->xtime_sec += ts->tv_sec;
- tk->tkr.xtime_nsec += (u64)ts->tv_nsec << tk->tkr.shift;
+ tk->tkr_mono.xtime_nsec += (u64)ts->tv_nsec << tk->tkr_mono.shift;
tk_normalize_xtime(tk);
}
tk->offs_boot = ktime_add(tk->offs_boot, delta);
}
+#ifdef CONFIG_DEBUG_TIMEKEEPING
+#define WARNING_FREQ (HZ*300) /* 5 minute rate-limiting */
+/*
+ * These simple flag variables are managed
+ * without locks, which is racy, but ok since
+ * we don't really care about being super
+ * precise about how many events were seen,
+ * just that a problem was observed.
+ */
+static int timekeeping_underflow_seen;
+static int timekeeping_overflow_seen;
+
+/* last_warning is only modified under the timekeeping lock */
+static long timekeeping_last_warning;
+
+static void timekeeping_check_update(struct timekeeper *tk, cycle_t offset)
+{
+
+ cycle_t max_cycles = tk->tkr_mono.clock->max_cycles;
+ const char *name = tk->tkr_mono.clock->name;
+
+ if (offset > max_cycles) {
+ printk_deferred("WARNING: timekeeping: Cycle offset (%lld) is larger than allowed by the '%s' clock's max_cycles value (%lld): time overflow danger\n",
+ offset, name, max_cycles);
+ printk_deferred(" timekeeping: Your kernel is sick, but tries to cope by capping time updates\n");
+ } else {
+ if (offset > (max_cycles >> 1)) {
+ printk_deferred("INFO: timekeeping: Cycle offset (%lld) is larger than the the '%s' clock's 50%% safety margin (%lld)\n",
+ offset, name, max_cycles >> 1);
+ printk_deferred(" timekeeping: Your kernel is still fine, but is feeling a bit nervous\n");
+ }
+ }
+
+ if (timekeeping_underflow_seen) {
+ if (jiffies - timekeeping_last_warning > WARNING_FREQ) {
+ printk_deferred("WARNING: Underflow in clocksource '%s' observed, time update ignored.\n", name);
+ printk_deferred(" Please report this, consider using a different clocksource, if possible.\n");
+ printk_deferred(" Your kernel is probably still fine.\n");
+ timekeeping_last_warning = jiffies;
+ }
+ timekeeping_underflow_seen = 0;
+ }
+
+ if (timekeeping_overflow_seen) {
+ if (jiffies - timekeeping_last_warning > WARNING_FREQ) {
+ printk_deferred("WARNING: Overflow in clocksource '%s' observed, time update capped.\n", name);
+ printk_deferred(" Please report this, consider using a different clocksource, if possible.\n");
+ printk_deferred(" Your kernel is probably still fine.\n");
+ timekeeping_last_warning = jiffies;
+ }
+ timekeeping_overflow_seen = 0;
+ }
+}
+
+static inline cycle_t timekeeping_get_delta(struct tk_read_base *tkr)
+{
+ cycle_t now, last, mask, max, delta;
+ unsigned int seq;
+
+ /*
+ * Since we're called holding a seqlock, the data may shift
+ * under us while we're doing the calculation. This can cause
+ * false positives, since we'd note a problem but throw the
+ * results away. So nest another seqlock here to atomically
+ * grab the points we are checking with.
+ */
+ do {
+ seq = read_seqcount_begin(&tk_core.seq);
+ now = tkr->read(tkr->clock);
+ last = tkr->cycle_last;
+ mask = tkr->mask;
+ max = tkr->clock->max_cycles;
+ } while (read_seqcount_retry(&tk_core.seq, seq));
+
+ delta = clocksource_delta(now, last, mask);
+
+ /*
+ * Try to catch underflows by checking if we are seeing small
+ * mask-relative negative values.
+ */
+ if (unlikely((~delta & mask) < (mask >> 3))) {
+ timekeeping_underflow_seen = 1;
+ delta = 0;
+ }
+
+ /* Cap delta value to the max_cycles values to avoid mult overflows */
+ if (unlikely(delta > max)) {
+ timekeeping_overflow_seen = 1;
+ delta = tkr->clock->max_cycles;
+ }
+
+ return delta;
+}
+#else
+static inline void timekeeping_check_update(struct timekeeper *tk, cycle_t offset)
+{
+}
+static inline cycle_t timekeeping_get_delta(struct tk_read_base *tkr)
+{
+ cycle_t cycle_now, delta;
+
+ /* read clocksource */
+ cycle_now = tkr->read(tkr->clock);
+
+ /* calculate the delta since the last update_wall_time */
+ delta = clocksource_delta(cycle_now, tkr->cycle_last, tkr->mask);
+
+ return delta;
+}
+#endif
+
/**
* tk_setup_internals - Set up internals to use clocksource clock.
*
u64 tmp, ntpinterval;
struct clocksource *old_clock;
- old_clock = tk->tkr.clock;
- tk->tkr.clock = clock;
- tk->tkr.read = clock->read;
- tk->tkr.mask = clock->mask;
- tk->tkr.cycle_last = tk->tkr.read(clock);
+ old_clock = tk->tkr_mono.clock;
+ tk->tkr_mono.clock = clock;
+ tk->tkr_mono.read = clock->read;
+ tk->tkr_mono.mask = clock->mask;
+ tk->tkr_mono.cycle_last = tk->tkr_mono.read(clock);
+
+ tk->tkr_raw.clock = clock;
+ tk->tkr_raw.read = clock->read;
+ tk->tkr_raw.mask = clock->mask;
+ tk->tkr_raw.cycle_last = tk->tkr_mono.cycle_last;
/* Do the ns -> cycle conversion first, using original mult */
tmp = NTP_INTERVAL_LENGTH;
if (old_clock) {
int shift_change = clock->shift - old_clock->shift;
if (shift_change < 0)
- tk->tkr.xtime_nsec >>= -shift_change;
+ tk->tkr_mono.xtime_nsec >>= -shift_change;
else
- tk->tkr.xtime_nsec <<= shift_change;
+ tk->tkr_mono.xtime_nsec <<= shift_change;
}
- tk->tkr.shift = clock->shift;
+ tk->tkr_raw.xtime_nsec = 0;
+
+ tk->tkr_mono.shift = clock->shift;
+ tk->tkr_raw.shift = clock->shift;
tk->ntp_error = 0;
tk->ntp_error_shift = NTP_SCALE_SHIFT - clock->shift;
* active clocksource. These value will be adjusted via NTP
* to counteract clock drifting.
*/
- tk->tkr.mult = clock->mult;
+ tk->tkr_mono.mult = clock->mult;
+ tk->tkr_raw.mult = clock->mult;
tk->ntp_err_mult = 0;
}
static inline s64 timekeeping_get_ns(struct tk_read_base *tkr)
{
- cycle_t cycle_now, delta;
+ cycle_t delta;
s64 nsec;
- /* read clocksource: */
- cycle_now = tkr->read(tkr->clock);
-
- /* calculate the delta since the last update_wall_time: */
- delta = clocksource_delta(cycle_now, tkr->cycle_last, tkr->mask);
+ delta = timekeeping_get_delta(tkr);
nsec = delta * tkr->mult + tkr->xtime_nsec;
nsec >>= tkr->shift;
return nsec + arch_gettimeoffset();
}
-static inline s64 timekeeping_get_ns_raw(struct timekeeper *tk)
-{
- struct clocksource *clock = tk->tkr.clock;
- cycle_t cycle_now, delta;
- s64 nsec;
-
- /* read clocksource: */
- cycle_now = tk->tkr.read(clock);
-
- /* calculate the delta since the last update_wall_time: */
- delta = clocksource_delta(cycle_now, tk->tkr.cycle_last, tk->tkr.mask);
-
- /* convert delta to nanoseconds. */
- nsec = clocksource_cyc2ns(delta, clock->mult, clock->shift);
-
- /* If arch requires, add in get_arch_timeoffset() */
- return nsec + arch_gettimeoffset();
-}
-
/**
* update_fast_timekeeper - Update the fast and NMI safe monotonic timekeeper.
* @tkr: Timekeeping readout base from which we take the update
* slightly wrong timestamp (a few nanoseconds). See
* @ktime_get_mono_fast_ns.
*/
-static void update_fast_timekeeper(struct tk_read_base *tkr)
+static void update_fast_timekeeper(struct tk_read_base *tkr, struct tk_fast *tkf)
{
- struct tk_read_base *base = tk_fast_mono.base;
+ struct tk_read_base *base = tkf->base;
/* Force readers off to base[1] */
- raw_write_seqcount_latch(&tk_fast_mono.seq);
+ raw_write_seqcount_latch(&tkf->seq);
/* Update base[0] */
memcpy(base, tkr, sizeof(*base));
/* Force readers back to base[0] */
- raw_write_seqcount_latch(&tk_fast_mono.seq);
+ raw_write_seqcount_latch(&tkf->seq);
/* Update base[1] */
memcpy(base + 1, base, sizeof(*base));
* of the following timestamps. Callers need to be aware of that and
* deal with it.
*/
-u64 notrace ktime_get_mono_fast_ns(void)
+static __always_inline u64 __ktime_get_fast_ns(struct tk_fast *tkf)
{
struct tk_read_base *tkr;
unsigned int seq;
u64 now;
do {
- seq = raw_read_seqcount(&tk_fast_mono.seq);
- tkr = tk_fast_mono.base + (seq & 0x01);
- now = ktime_to_ns(tkr->base_mono) + timekeeping_get_ns(tkr);
+ seq = raw_read_seqcount(&tkf->seq);
+ tkr = tkf->base + (seq & 0x01);
+ now = ktime_to_ns(tkr->base) + timekeeping_get_ns(tkr);
+ } while (read_seqcount_retry(&tkf->seq, seq));
- } while (read_seqcount_retry(&tk_fast_mono.seq, seq));
return now;
}
+
+u64 ktime_get_mono_fast_ns(void)
+{
+ return __ktime_get_fast_ns(&tk_fast_mono);
+}
EXPORT_SYMBOL_GPL(ktime_get_mono_fast_ns);
+u64 ktime_get_raw_fast_ns(void)
+{
+ return __ktime_get_fast_ns(&tk_fast_raw);
+}
+EXPORT_SYMBOL_GPL(ktime_get_raw_fast_ns);
+
/* Suspend-time cycles value for halted fast timekeeper. */
static cycle_t cycles_at_suspend;
static void halt_fast_timekeeper(struct timekeeper *tk)
{
static struct tk_read_base tkr_dummy;
- struct tk_read_base *tkr = &tk->tkr;
+ struct tk_read_base *tkr = &tk->tkr_mono;
memcpy(&tkr_dummy, tkr, sizeof(tkr_dummy));
cycles_at_suspend = tkr->read(tkr->clock);
tkr_dummy.read = dummy_clock_read;
- update_fast_timekeeper(&tkr_dummy);
+ update_fast_timekeeper(&tkr_dummy, &tk_fast_mono);
+
+ tkr = &tk->tkr_raw;
+ memcpy(&tkr_dummy, tkr, sizeof(tkr_dummy));
+ tkr_dummy.read = dummy_clock_read;
+ update_fast_timekeeper(&tkr_dummy, &tk_fast_raw);
}
#ifdef CONFIG_GENERIC_TIME_VSYSCALL_OLD
xt = timespec64_to_timespec(tk_xtime(tk));
wm = timespec64_to_timespec(tk->wall_to_monotonic);
- update_vsyscall_old(&xt, &wm, tk->tkr.clock, tk->tkr.mult,
- tk->tkr.cycle_last);
+ update_vsyscall_old(&xt, &wm, tk->tkr_mono.clock, tk->tkr_mono.mult,
+ tk->tkr_mono.cycle_last);
}
static inline void old_vsyscall_fixup(struct timekeeper *tk)
* (shifted nanoseconds), and CONFIG_GENERIC_TIME_VSYSCALL_OLD
* users are removed, this can be killed.
*/
- remainder = tk->tkr.xtime_nsec & ((1ULL << tk->tkr.shift) - 1);
- tk->tkr.xtime_nsec -= remainder;
- tk->tkr.xtime_nsec += 1ULL << tk->tkr.shift;
+ remainder = tk->tkr_mono.xtime_nsec & ((1ULL << tk->tkr_mono.shift) - 1);
+ tk->tkr_mono.xtime_nsec -= remainder;
+ tk->tkr_mono.xtime_nsec += 1ULL << tk->tkr_mono.shift;
tk->ntp_error += remainder << tk->ntp_error_shift;
- tk->ntp_error -= (1ULL << tk->tkr.shift) << tk->ntp_error_shift;
+ tk->ntp_error -= (1ULL << tk->tkr_mono.shift) << tk->ntp_error_shift;
}
#else
#define old_vsyscall_fixup(tk)
*/
seconds = (u64)(tk->xtime_sec + tk->wall_to_monotonic.tv_sec);
nsec = (u32) tk->wall_to_monotonic.tv_nsec;
- tk->tkr.base_mono = ns_to_ktime(seconds * NSEC_PER_SEC + nsec);
+ tk->tkr_mono.base = ns_to_ktime(seconds * NSEC_PER_SEC + nsec);
/* Update the monotonic raw base */
- tk->base_raw = timespec64_to_ktime(tk->raw_time);
+ tk->tkr_raw.base = timespec64_to_ktime(tk->raw_time);
/*
* The sum of the nanoseconds portions of xtime and
* wall_to_monotonic can be greater/equal one second. Take
* this into account before updating tk->ktime_sec.
*/
- nsec += (u32)(tk->tkr.xtime_nsec >> tk->tkr.shift);
+ nsec += (u32)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift);
if (nsec >= NSEC_PER_SEC)
seconds++;
tk->ktime_sec = seconds;
memcpy(&shadow_timekeeper, &tk_core.timekeeper,
sizeof(tk_core.timekeeper));
- update_fast_timekeeper(&tk->tkr);
+ update_fast_timekeeper(&tk->tkr_mono, &tk_fast_mono);
+ update_fast_timekeeper(&tk->tkr_raw, &tk_fast_raw);
}
/**
*/
static void timekeeping_forward_now(struct timekeeper *tk)
{
- struct clocksource *clock = tk->tkr.clock;
+ struct clocksource *clock = tk->tkr_mono.clock;
cycle_t cycle_now, delta;
s64 nsec;
- cycle_now = tk->tkr.read(clock);
- delta = clocksource_delta(cycle_now, tk->tkr.cycle_last, tk->tkr.mask);
- tk->tkr.cycle_last = cycle_now;
+ cycle_now = tk->tkr_mono.read(clock);
+ delta = clocksource_delta(cycle_now, tk->tkr_mono.cycle_last, tk->tkr_mono.mask);
+ tk->tkr_mono.cycle_last = cycle_now;
+ tk->tkr_raw.cycle_last = cycle_now;
- tk->tkr.xtime_nsec += delta * tk->tkr.mult;
+ tk->tkr_mono.xtime_nsec += delta * tk->tkr_mono.mult;
/* If arch requires, add in get_arch_timeoffset() */
- tk->tkr.xtime_nsec += (u64)arch_gettimeoffset() << tk->tkr.shift;
+ tk->tkr_mono.xtime_nsec += (u64)arch_gettimeoffset() << tk->tkr_mono.shift;
tk_normalize_xtime(tk);
- nsec = clocksource_cyc2ns(delta, clock->mult, clock->shift);
+ nsec = clocksource_cyc2ns(delta, tk->tkr_raw.mult, tk->tkr_raw.shift);
timespec64_add_ns(&tk->raw_time, nsec);
}
seq = read_seqcount_begin(&tk_core.seq);
ts->tv_sec = tk->xtime_sec;
- nsecs = timekeeping_get_ns(&tk->tkr);
+ nsecs = timekeeping_get_ns(&tk->tkr_mono);
} while (read_seqcount_retry(&tk_core.seq, seq));
do {
seq = read_seqcount_begin(&tk_core.seq);
- base = tk->tkr.base_mono;
- nsecs = timekeeping_get_ns(&tk->tkr);
+ base = tk->tkr_mono.base;
+ nsecs = timekeeping_get_ns(&tk->tkr_mono);
} while (read_seqcount_retry(&tk_core.seq, seq));
do {
seq = read_seqcount_begin(&tk_core.seq);
- base = ktime_add(tk->tkr.base_mono, *offset);
- nsecs = timekeeping_get_ns(&tk->tkr);
+ base = ktime_add(tk->tkr_mono.base, *offset);
+ nsecs = timekeeping_get_ns(&tk->tkr_mono);
} while (read_seqcount_retry(&tk_core.seq, seq));
do {
seq = read_seqcount_begin(&tk_core.seq);
- base = tk->base_raw;
- nsecs = timekeeping_get_ns_raw(tk);
+ base = tk->tkr_raw.base;
+ nsecs = timekeeping_get_ns(&tk->tkr_raw);
} while (read_seqcount_retry(&tk_core.seq, seq));
do {
seq = read_seqcount_begin(&tk_core.seq);
ts->tv_sec = tk->xtime_sec;
- nsec = timekeeping_get_ns(&tk->tkr);
+ nsec = timekeeping_get_ns(&tk->tkr_mono);
tomono = tk->wall_to_monotonic;
} while (read_seqcount_retry(&tk_core.seq, seq));
ts_real->tv_sec = tk->xtime_sec;
ts_real->tv_nsec = 0;
- nsecs_raw = timekeeping_get_ns_raw(tk);
- nsecs_real = timekeeping_get_ns(&tk->tkr);
+ nsecs_raw = timekeeping_get_ns(&tk->tkr_raw);
+ nsecs_real = timekeeping_get_ns(&tk->tkr_mono);
} while (read_seqcount_retry(&tk_core.seq, seq));
*/
if (try_module_get(new->owner)) {
if (!new->enable || new->enable(new) == 0) {
- old = tk->tkr.clock;
+ old = tk->tkr_mono.clock;
tk_setup_internals(tk, new);
if (old->disable)
old->disable(old);
{
struct timekeeper *tk = &tk_core.timekeeper;
- if (tk->tkr.clock == clock)
+ if (tk->tkr_mono.clock == clock)
return 0;
stop_machine(change_clocksource, clock, NULL);
tick_clock_notify();
- return tk->tkr.clock == clock ? 0 : -1;
+ return tk->tkr_mono.clock == clock ? 0 : -1;
}
/**
do {
seq = read_seqcount_begin(&tk_core.seq);
- nsecs = timekeeping_get_ns_raw(tk);
+ nsecs = timekeeping_get_ns(&tk->tkr_raw);
ts64 = tk->raw_time;
} while (read_seqcount_retry(&tk_core.seq, seq));
do {
seq = read_seqcount_begin(&tk_core.seq);
- ret = tk->tkr.clock->flags & CLOCK_SOURCE_VALID_FOR_HRES;
+ ret = tk->tkr_mono.clock->flags & CLOCK_SOURCE_VALID_FOR_HRES;
} while (read_seqcount_retry(&tk_core.seq, seq));
do {
seq = read_seqcount_begin(&tk_core.seq);
- ret = tk->tkr.clock->max_idle_ns;
+ ret = tk->tkr_mono.clock->max_idle_ns;
} while (read_seqcount_retry(&tk_core.seq, seq));
ts->tv_nsec = 0;
}
+void __weak read_persistent_clock64(struct timespec64 *ts64)
+{
+ struct timespec ts;
+
+ read_persistent_clock(&ts);
+ *ts64 = timespec_to_timespec64(ts);
+}
+
/**
* read_boot_clock - Return time of the system start.
*
ts->tv_nsec = 0;
}
+void __weak read_boot_clock64(struct timespec64 *ts64)
+{
+ struct timespec ts;
+
+ read_boot_clock(&ts);
+ *ts64 = timespec_to_timespec64(ts);
+}
+
+/* Flag for if timekeeping_resume() has injected sleeptime */
+static bool sleeptime_injected;
+
+/* Flag for if there is a persistent clock on this platform */
+static bool persistent_clock_exists;
+
/*
* timekeeping_init - Initializes the clocksource and common timekeeping values
*/
struct clocksource *clock;
unsigned long flags;
struct timespec64 now, boot, tmp;
- struct timespec ts;
- read_persistent_clock(&ts);
- now = timespec_to_timespec64(ts);
+ read_persistent_clock64(&now);
if (!timespec64_valid_strict(&now)) {
pr_warn("WARNING: Persistent clock returned invalid value!\n"
" Check your CMOS/BIOS settings.\n");
now.tv_sec = 0;
now.tv_nsec = 0;
} else if (now.tv_sec || now.tv_nsec)
- persistent_clock_exist = true;
+ persistent_clock_exists = true;
- read_boot_clock(&ts);
- boot = timespec_to_timespec64(ts);
+ read_boot_clock64(&boot);
if (!timespec64_valid_strict(&boot)) {
pr_warn("WARNING: Boot clock returned invalid value!\n"
" Check your CMOS/BIOS settings.\n");
tk_set_xtime(tk, &now);
tk->raw_time.tv_sec = 0;
tk->raw_time.tv_nsec = 0;
- tk->base_raw.tv64 = 0;
if (boot.tv_sec == 0 && boot.tv_nsec == 0)
boot = tk_xtime(tk);
raw_spin_unlock_irqrestore(&timekeeper_lock, flags);
}
-/* time in seconds when suspend began */
+/* time in seconds when suspend began for persistent clock */
static struct timespec64 timekeeping_suspend_time;
/**
tk_debug_account_sleep_time(delta);
}
+#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_RTC_HCTOSYS_DEVICE)
+/**
+ * We have three kinds of time sources to use for sleep time
+ * injection, the preference order is:
+ * 1) non-stop clocksource
+ * 2) persistent clock (ie: RTC accessible when irqs are off)
+ * 3) RTC
+ *
+ * 1) and 2) are used by timekeeping, 3) by RTC subsystem.
+ * If system has neither 1) nor 2), 3) will be used finally.
+ *
+ *
+ * If timekeeping has injected sleeptime via either 1) or 2),
+ * 3) becomes needless, so in this case we don't need to call
+ * rtc_resume(), and this is what timekeeping_rtc_skipresume()
+ * means.
+ */
+bool timekeeping_rtc_skipresume(void)
+{
+ return sleeptime_injected;
+}
+
+/**
+ * 1) can be determined whether to use or not only when doing
+ * timekeeping_resume() which is invoked after rtc_suspend(),
+ * so we can't skip rtc_suspend() surely if system has 1).
+ *
+ * But if system has 2), 2) will definitely be used, so in this
+ * case we don't need to call rtc_suspend(), and this is what
+ * timekeeping_rtc_skipsuspend() means.
+ */
+bool timekeeping_rtc_skipsuspend(void)
+{
+ return persistent_clock_exists;
+}
+
/**
* timekeeping_inject_sleeptime64 - Adds suspend interval to timeekeeping values
* @delta: pointer to a timespec64 delta value
*
- * This hook is for architectures that cannot support read_persistent_clock
+ * This hook is for architectures that cannot support read_persistent_clock64
* because their RTC/persistent clock is only accessible when irqs are enabled.
+ * and also don't have an effective nonstop clocksource.
*
* This function should only be called by rtc_resume(), and allows
* a suspend offset to be injected into the timekeeping values.
struct timekeeper *tk = &tk_core.timekeeper;
unsigned long flags;
- /*
- * Make sure we don't set the clock twice, as timekeeping_resume()
- * already did it
- */
- if (has_persistent_clock())
- return;
-
raw_spin_lock_irqsave(&timekeeper_lock, flags);
write_seqcount_begin(&tk_core.seq);
/* signal hrtimers about time change */
clock_was_set();
}
+#endif
/**
* timekeeping_resume - Resumes the generic timekeeping subsystem.
- *
- * This is for the generic clocksource timekeeping.
- * xtime/wall_to_monotonic/jiffies/etc are
- * still managed by arch specific suspend/resume code.
*/
void timekeeping_resume(void)
{
struct timekeeper *tk = &tk_core.timekeeper;
- struct clocksource *clock = tk->tkr.clock;
+ struct clocksource *clock = tk->tkr_mono.clock;
unsigned long flags;
struct timespec64 ts_new, ts_delta;
- struct timespec tmp;
cycle_t cycle_now, cycle_delta;
- bool suspendtime_found = false;
- read_persistent_clock(&tmp);
- ts_new = timespec_to_timespec64(tmp);
+ sleeptime_injected = false;
+ read_persistent_clock64(&ts_new);
clockevents_resume();
clocksource_resume();
* The less preferred source will only be tried if there is no better
* usable source. The rtc part is handled separately in rtc core code.
*/
- cycle_now = tk->tkr.read(clock);
+ cycle_now = tk->tkr_mono.read(clock);
if ((clock->flags & CLOCK_SOURCE_SUSPEND_NONSTOP) &&
- cycle_now > tk->tkr.cycle_last) {
+ cycle_now > tk->tkr_mono.cycle_last) {
u64 num, max = ULLONG_MAX;
u32 mult = clock->mult;
u32 shift = clock->shift;
s64 nsec = 0;
- cycle_delta = clocksource_delta(cycle_now, tk->tkr.cycle_last,
- tk->tkr.mask);
+ cycle_delta = clocksource_delta(cycle_now, tk->tkr_mono.cycle_last,
+ tk->tkr_mono.mask);
/*
* "cycle_delta * mutl" may cause 64 bits overflow, if the
nsec += ((u64) cycle_delta * mult) >> shift;
ts_delta = ns_to_timespec64(nsec);
- suspendtime_found = true;
+ sleeptime_injected = true;
} else if (timespec64_compare(&ts_new, &timekeeping_suspend_time) > 0) {
ts_delta = timespec64_sub(ts_new, timekeeping_suspend_time);
- suspendtime_found = true;
+ sleeptime_injected = true;
}
- if (suspendtime_found)
+ if (sleeptime_injected)
__timekeeping_inject_sleeptime(tk, &ts_delta);
/* Re-base the last cycle value */
- tk->tkr.cycle_last = cycle_now;
+ tk->tkr_mono.cycle_last = cycle_now;
+ tk->tkr_raw.cycle_last = cycle_now;
+
tk->ntp_error = 0;
timekeeping_suspended = 0;
timekeeping_update(tk, TK_MIRROR | TK_CLOCK_WAS_SET);
touch_softlockup_watchdog();
- clockevents_notify(CLOCK_EVT_NOTIFY_RESUME, NULL);
-
- /* Resume hrtimers */
+ tick_resume();
hrtimers_resume();
}
unsigned long flags;
struct timespec64 delta, delta_delta;
static struct timespec64 old_delta;
- struct timespec tmp;
- read_persistent_clock(&tmp);
- timekeeping_suspend_time = timespec_to_timespec64(tmp);
+ read_persistent_clock64(&timekeeping_suspend_time);
/*
* On some systems the persistent_clock can not be detected at
* value returned, update the persistent_clock_exists flag.
*/
if (timekeeping_suspend_time.tv_sec || timekeeping_suspend_time.tv_nsec)
- persistent_clock_exist = true;
+ persistent_clock_exists = true;
raw_spin_lock_irqsave(&timekeeper_lock, flags);
write_seqcount_begin(&tk_core.seq);
timekeeping_forward_now(tk);
timekeeping_suspended = 1;
- /*
- * To avoid drift caused by repeated suspend/resumes,
- * which each can add ~1 second drift error,
- * try to compensate so the difference in system time
- * and persistent_clock time stays close to constant.
- */
- delta = timespec64_sub(tk_xtime(tk), timekeeping_suspend_time);
- delta_delta = timespec64_sub(delta, old_delta);
- if (abs(delta_delta.tv_sec) >= 2) {
+ if (persistent_clock_exists) {
/*
- * if delta_delta is too large, assume time correction
- * has occured and set old_delta to the current delta.
+ * To avoid drift caused by repeated suspend/resumes,
+ * which each can add ~1 second drift error,
+ * try to compensate so the difference in system time
+ * and persistent_clock time stays close to constant.
*/
- old_delta = delta;
- } else {
- /* Otherwise try to adjust old_system to compensate */
- timekeeping_suspend_time =
- timespec64_add(timekeeping_suspend_time, delta_delta);
+ delta = timespec64_sub(tk_xtime(tk), timekeeping_suspend_time);
+ delta_delta = timespec64_sub(delta, old_delta);
+ if (abs(delta_delta.tv_sec) >= 2) {
+ /*
+ * if delta_delta is too large, assume time correction
+ * has occurred and set old_delta to the current delta.
+ */
+ old_delta = delta;
+ } else {
+ /* Otherwise try to adjust old_system to compensate */
+ timekeeping_suspend_time =
+ timespec64_add(timekeeping_suspend_time, delta_delta);
+ }
}
timekeeping_update(tk, TK_MIRROR);
write_seqcount_end(&tk_core.seq);
raw_spin_unlock_irqrestore(&timekeeper_lock, flags);
- clockevents_notify(CLOCK_EVT_NOTIFY_SUSPEND, NULL);
+ tick_suspend();
clocksource_suspend();
clockevents_suspend();
*
* XXX - TODO: Doc ntp_error calculation.
*/
- if ((mult_adj > 0) && (tk->tkr.mult + mult_adj < mult_adj)) {
+ if ((mult_adj > 0) && (tk->tkr_mono.mult + mult_adj < mult_adj)) {
/* NTP adjustment caused clocksource mult overflow */
WARN_ON_ONCE(1);
return;
}
- tk->tkr.mult += mult_adj;
+ tk->tkr_mono.mult += mult_adj;
tk->xtime_interval += interval;
- tk->tkr.xtime_nsec -= offset;
+ tk->tkr_mono.xtime_nsec -= offset;
tk->ntp_error -= (interval - offset) << tk->ntp_error_shift;
}
tk->ntp_err_mult = 0;
}
- if (unlikely(tk->tkr.clock->maxadj &&
- (abs(tk->tkr.mult - tk->tkr.clock->mult)
- > tk->tkr.clock->maxadj))) {
+ if (unlikely(tk->tkr_mono.clock->maxadj &&
+ (abs(tk->tkr_mono.mult - tk->tkr_mono.clock->mult)
+ > tk->tkr_mono.clock->maxadj))) {
printk_once(KERN_WARNING
"Adjusting %s more than 11%% (%ld vs %ld)\n",
- tk->tkr.clock->name, (long)tk->tkr.mult,
- (long)tk->tkr.clock->mult + tk->tkr.clock->maxadj);
+ tk->tkr_mono.clock->name, (long)tk->tkr_mono.mult,
+ (long)tk->tkr_mono.clock->mult + tk->tkr_mono.clock->maxadj);
}
/*
* We'll correct this error next time through this function, when
* xtime_nsec is not as small.
*/
- if (unlikely((s64)tk->tkr.xtime_nsec < 0)) {
- s64 neg = -(s64)tk->tkr.xtime_nsec;
- tk->tkr.xtime_nsec = 0;
+ if (unlikely((s64)tk->tkr_mono.xtime_nsec < 0)) {
+ s64 neg = -(s64)tk->tkr_mono.xtime_nsec;
+ tk->tkr_mono.xtime_nsec = 0;
tk->ntp_error += neg << tk->ntp_error_shift;
}
}
*/
static inline unsigned int accumulate_nsecs_to_secs(struct timekeeper *tk)
{
- u64 nsecps = (u64)NSEC_PER_SEC << tk->tkr.shift;
+ u64 nsecps = (u64)NSEC_PER_SEC << tk->tkr_mono.shift;
unsigned int clock_set = 0;
- while (tk->tkr.xtime_nsec >= nsecps) {
+ while (tk->tkr_mono.xtime_nsec >= nsecps) {
int leap;
- tk->tkr.xtime_nsec -= nsecps;
+ tk->tkr_mono.xtime_nsec -= nsecps;
tk->xtime_sec++;
/* Figure out if its a leap sec and apply if needed */
/* Accumulate one shifted interval */
offset -= interval;
- tk->tkr.cycle_last += interval;
+ tk->tkr_mono.cycle_last += interval;
+ tk->tkr_raw.cycle_last += interval;
- tk->tkr.xtime_nsec += tk->xtime_interval << shift;
+ tk->tkr_mono.xtime_nsec += tk->xtime_interval << shift;
*clock_set |= accumulate_nsecs_to_secs(tk);
/* Accumulate raw time */
#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
offset = real_tk->cycle_interval;
#else
- offset = clocksource_delta(tk->tkr.read(tk->tkr.clock),
- tk->tkr.cycle_last, tk->tkr.mask);
+ offset = clocksource_delta(tk->tkr_mono.read(tk->tkr_mono.clock),
+ tk->tkr_mono.cycle_last, tk->tkr_mono.mask);
#endif
/* Check if there's really nothing to do */
if (offset < real_tk->cycle_interval)
goto out;
+ /* Do some additional sanity checking */
+ timekeeping_check_update(real_tk, offset);
+
/*
* With NO_HZ we may have to accumulate many cycle_intervals
* (think "ticks") worth of time at once. To do this efficiently,
do {
seq = read_seqcount_begin(&tk_core.seq);
- base = tk->tkr.base_mono;
- nsecs = tk->tkr.xtime_nsec >> tk->tkr.shift;
+ base = tk->tkr_mono.base;
+ nsecs = tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift;
*offs_real = tk->offs_real;
*offs_boot = tk->offs_boot;
do {
seq = read_seqcount_begin(&tk_core.seq);
- base = tk->tkr.base_mono;
- nsecs = timekeeping_get_ns(&tk->tkr);
+ base = tk->tkr_mono.base;
+ nsecs = timekeeping_get_ns(&tk->tkr_mono);
*offs_real = tk->offs_real;
*offs_boot = tk->offs_boot;
extern int timekeeping_suspend(void);
extern void timekeeping_resume(void);
+extern void do_timer(unsigned long ticks);
+extern void update_wall_time(void);
+
+extern seqlock_t jiffies_lock;
+
+#define CS_NAME_LEN 32
+
#endif
struct tvec tv5;
} ____cacheline_aligned;
+/*
+ * __TIMER_INITIALIZER() needs to set ->base to a valid pointer (because we've
+ * made NULL special, hint: lock_timer_base()) and we cannot get a compile time
+ * pointer to per-cpu entries because we don't know where we'll map the section,
+ * even for the boot cpu.
+ *
+ * And so we use boot_tvec_bases for boot CPU and per-cpu __tvec_bases for the
+ * rest of them.
+ */
struct tvec_base boot_tvec_bases;
EXPORT_SYMBOL(boot_tvec_bases);
+
static DEFINE_PER_CPU(struct tvec_base *, tvec_bases) = &boot_tvec_bases;
/* Functions below help us manage 'deferrable' flag */
EXPORT_SYMBOL(try_to_del_timer_sync);
#ifdef CONFIG_SMP
+static DEFINE_PER_CPU(struct tvec_base, __tvec_bases);
+
/**
* del_timer_sync - deactivate a timer and wait for the handler to finish.
* @timer: the timer to be deactivated
}
EXPORT_SYMBOL(schedule_timeout_uninterruptible);
-static int init_timers_cpu(int cpu)
-{
- int j;
- struct tvec_base *base;
- static char tvec_base_done[NR_CPUS];
-
- if (!tvec_base_done[cpu]) {
- static char boot_done;
-
- if (boot_done) {
- /*
- * The APs use this path later in boot
- */
- base = kzalloc_node(sizeof(*base), GFP_KERNEL,
- cpu_to_node(cpu));
- if (!base)
- return -ENOMEM;
-
- /* Make sure tvec_base has TIMER_FLAG_MASK bits free */
- if (WARN_ON(base != tbase_get_base(base))) {
- kfree(base);
- return -ENOMEM;
- }
- per_cpu(tvec_bases, cpu) = base;
- } else {
- /*
- * This is for the boot CPU - we use compile-time
- * static initialisation because per-cpu memory isn't
- * ready yet and because the memory allocators are not
- * initialised either.
- */
- boot_done = 1;
- base = &boot_tvec_bases;
- }
- spin_lock_init(&base->lock);
- tvec_base_done[cpu] = 1;
- base->cpu = cpu;
- } else {
- base = per_cpu(tvec_bases, cpu);
- }
-
-
- for (j = 0; j < TVN_SIZE; j++) {
- INIT_LIST_HEAD(base->tv5.vec + j);
- INIT_LIST_HEAD(base->tv4.vec + j);
- INIT_LIST_HEAD(base->tv3.vec + j);
- INIT_LIST_HEAD(base->tv2.vec + j);
- }
- for (j = 0; j < TVR_SIZE; j++)
- INIT_LIST_HEAD(base->tv1.vec + j);
-
- base->timer_jiffies = jiffies;
- base->next_timer = base->timer_jiffies;
- base->active_timers = 0;
- base->all_timers = 0;
- return 0;
-}
-
#ifdef CONFIG_HOTPLUG_CPU
static void migrate_timer_list(struct tvec_base *new_base, struct list_head *head)
{
migrate_timer_list(new_base, old_base->tv5.vec + i);
}
+ old_base->active_timers = 0;
+ old_base->all_timers = 0;
+
spin_unlock(&old_base->lock);
spin_unlock_irq(&new_base->lock);
put_cpu_var(tvec_bases);
}
-#endif /* CONFIG_HOTPLUG_CPU */
static int timer_cpu_notify(struct notifier_block *self,
unsigned long action, void *hcpu)
{
- long cpu = (long)hcpu;
- int err;
-
- switch(action) {
- case CPU_UP_PREPARE:
- case CPU_UP_PREPARE_FROZEN:
- err = init_timers_cpu(cpu);
- if (err < 0)
- return notifier_from_errno(err);
- break;
-#ifdef CONFIG_HOTPLUG_CPU
+ switch (action) {
case CPU_DEAD:
case CPU_DEAD_FROZEN:
- migrate_timers(cpu);
+ migrate_timers((long)hcpu);
break;
-#endif
default:
break;
}
+
return NOTIFY_OK;
}
-static struct notifier_block timers_nb = {
- .notifier_call = timer_cpu_notify,
-};
+static inline void timer_register_cpu_notifier(void)
+{
+ cpu_notifier(timer_cpu_notify, 0);
+}
+#else
+static inline void timer_register_cpu_notifier(void) { }
+#endif /* CONFIG_HOTPLUG_CPU */
+static void __init init_timer_cpu(struct tvec_base *base, int cpu)
+{
+ int j;
-void __init init_timers(void)
+ BUG_ON(base != tbase_get_base(base));
+
+ base->cpu = cpu;
+ per_cpu(tvec_bases, cpu) = base;
+ spin_lock_init(&base->lock);
+
+ for (j = 0; j < TVN_SIZE; j++) {
+ INIT_LIST_HEAD(base->tv5.vec + j);
+ INIT_LIST_HEAD(base->tv4.vec + j);
+ INIT_LIST_HEAD(base->tv3.vec + j);
+ INIT_LIST_HEAD(base->tv2.vec + j);
+ }
+ for (j = 0; j < TVR_SIZE; j++)
+ INIT_LIST_HEAD(base->tv1.vec + j);
+
+ base->timer_jiffies = jiffies;
+ base->next_timer = base->timer_jiffies;
+}
+
+static void __init init_timer_cpus(void)
{
- int err;
+ struct tvec_base *base;
+ int local_cpu = smp_processor_id();
+ int cpu;
+ for_each_possible_cpu(cpu) {
+ if (cpu == local_cpu)
+ base = &boot_tvec_bases;
+#ifdef CONFIG_SMP
+ else
+ base = per_cpu_ptr(&__tvec_bases, cpu);
+#endif
+
+ init_timer_cpu(base, cpu);
+ }
+}
+
+void __init init_timers(void)
+{
/* ensure there are enough low bits for flags in timer->base pointer */
BUILD_BUG_ON(__alignof__(struct tvec_base) & TIMER_FLAG_MASK);
- err = timer_cpu_notify(&timers_nb, (unsigned long)CPU_UP_PREPARE,
- (void *)(long)smp_processor_id());
- BUG_ON(err != NOTIFY_OK);
-
+ init_timer_cpus();
init_timer_stats();
- register_cpu_notifier(&timers_nb);
+ timer_register_cpu_notifier();
open_softirq(TIMER_SOFTIRQ, run_timer_softirq);
}
#include <linux/sched.h>
#include <linux/seq_file.h>
#include <linux/kallsyms.h>
-#include <linux/tick.h>
#include <asm/uaccess.h>
+#include "tick-internal.h"
struct timer_list_iter {
int cpu;
print_name_offset(m, dev->set_next_event);
SEQ_printf(m, "\n");
- SEQ_printf(m, " set_mode: ");
- print_name_offset(m, dev->set_mode);
- SEQ_printf(m, "\n");
+ if (dev->set_mode) {
+ SEQ_printf(m, " set_mode: ");
+ print_name_offset(m, dev->set_mode);
+ SEQ_printf(m, "\n");
+ } else {
+ if (dev->set_state_shutdown) {
+ SEQ_printf(m, " shutdown: ");
+ print_name_offset(m, dev->set_state_shutdown);
+ SEQ_printf(m, "\n");
+ }
+
+ if (dev->set_state_periodic) {
+ SEQ_printf(m, " periodic: ");
+ print_name_offset(m, dev->set_state_periodic);
+ SEQ_printf(m, "\n");
+ }
+
+ if (dev->set_state_oneshot) {
+ SEQ_printf(m, " oneshot: ");
+ print_name_offset(m, dev->set_state_oneshot);
+ SEQ_printf(m, "\n");
+ }
+
+ if (dev->tick_resume) {
+ SEQ_printf(m, " resume: ");
+ print_name_offset(m, dev->tick_resume);
+ SEQ_printf(m, "\n");
+ }
+ }
SEQ_printf(m, " event_handler: ");
print_name_offset(m, dev->event_handler);
This option is required if you plan to use perf-probe subcommand
of perf tools on user space applications.
+config BPF_EVENTS
+ depends on BPF_SYSCALL
+ depends on KPROBE_EVENT
+ bool
+ default y
+ help
+ This allows the user to attach BPF programs to kprobe events.
+
config PROBE_EVENTS
def_bool n
If unsure, say N
+config TRACE_ENUM_MAP_FILE
+ bool "Show enum mappings for trace events"
+ depends on TRACING
+ help
+ The "print fmt" of the trace events will show the enum names instead
+ of their values. This can cause problems for user space tools that
+ use this string to parse the raw data as user space does not know
+ how to convert the string to its value.
+
+ To fix this, there's a special macro in the kernel that can be used
+ to convert the enum into its value. If this macro is used, then the
+ print fmt strings will have the enums converted to their values.
+
+ If something does not get converted properly, this option can be
+ used to show what enums the kernel tried to convert.
+
+ This option is for debugging the enum conversions. A file is created
+ in the tracing directory called "enum_map" that will show the enum
+ names matched with their values and what trace event system they
+ belong too.
+
+ Normally, the mapping of the strings to values will be freed after
+ boot up or module load. With this option, they will not be freed, as
+ they are needed for the "enum_map" file. Enabling this option will
+ increase the memory footprint of the running kernel.
+
+ If unsure, say N
+
endif # FTRACE
endif # TRACING_SUPPORT
endif
obj-$(CONFIG_EVENT_TRACING) += trace_events_filter.o
obj-$(CONFIG_EVENT_TRACING) += trace_events_trigger.o
+obj-$(CONFIG_BPF_EVENTS) += bpf_trace.o
obj-$(CONFIG_KPROBE_EVENT) += trace_kprobe.o
obj-$(CONFIG_TRACEPOINTS) += power-traces.o
ifeq ($(CONFIG_PM),y)
--- /dev/null
+/* Copyright (c) 2011-2015 PLUMgrid, http://plumgrid.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of version 2 of the GNU General Public
+ * License as published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/bpf.h>
+#include <linux/filter.h>
+#include <linux/uaccess.h>
+#include <linux/ctype.h>
+#include "trace.h"
+
+static DEFINE_PER_CPU(int, bpf_prog_active);
+
+/**
+ * trace_call_bpf - invoke BPF program
+ * @prog: BPF program
+ * @ctx: opaque context pointer
+ *
+ * kprobe handlers execute BPF programs via this helper.
+ * Can be used from static tracepoints in the future.
+ *
+ * Return: BPF programs always return an integer which is interpreted by
+ * kprobe handler as:
+ * 0 - return from kprobe (event is filtered out)
+ * 1 - store kprobe event into ring buffer
+ * Other values are reserved and currently alias to 1
+ */
+unsigned int trace_call_bpf(struct bpf_prog *prog, void *ctx)
+{
+ unsigned int ret;
+
+ if (in_nmi()) /* not supported yet */
+ return 1;
+
+ preempt_disable();
+
+ if (unlikely(__this_cpu_inc_return(bpf_prog_active) != 1)) {
+ /*
+ * since some bpf program is already running on this cpu,
+ * don't call into another bpf program (same or different)
+ * and don't send kprobe event into ring-buffer,
+ * so return zero here
+ */
+ ret = 0;
+ goto out;
+ }
+
+ rcu_read_lock();
+ ret = BPF_PROG_RUN(prog, ctx);
+ rcu_read_unlock();
+
+ out:
+ __this_cpu_dec(bpf_prog_active);
+ preempt_enable();
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(trace_call_bpf);
+
+static u64 bpf_probe_read(u64 r1, u64 r2, u64 r3, u64 r4, u64 r5)
+{
+ void *dst = (void *) (long) r1;
+ int size = (int) r2;
+ void *unsafe_ptr = (void *) (long) r3;
+
+ return probe_kernel_read(dst, unsafe_ptr, size);
+}
+
+static const struct bpf_func_proto bpf_probe_read_proto = {
+ .func = bpf_probe_read,
+ .gpl_only = true,
+ .ret_type = RET_INTEGER,
+ .arg1_type = ARG_PTR_TO_STACK,
+ .arg2_type = ARG_CONST_STACK_SIZE,
+ .arg3_type = ARG_ANYTHING,
+};
+
+static u64 bpf_ktime_get_ns(u64 r1, u64 r2, u64 r3, u64 r4, u64 r5)
+{
+ /* NMI safe access to clock monotonic */
+ return ktime_get_mono_fast_ns();
+}
+
+static const struct bpf_func_proto bpf_ktime_get_ns_proto = {
+ .func = bpf_ktime_get_ns,
+ .gpl_only = true,
+ .ret_type = RET_INTEGER,
+};
+
+/*
+ * limited trace_printk()
+ * only %d %u %x %ld %lu %lx %lld %llu %llx %p conversion specifiers allowed
+ */
+static u64 bpf_trace_printk(u64 r1, u64 fmt_size, u64 r3, u64 r4, u64 r5)
+{
+ char *fmt = (char *) (long) r1;
+ int mod[3] = {};
+ int fmt_cnt = 0;
+ int i;
+
+ /*
+ * bpf_check()->check_func_arg()->check_stack_boundary()
+ * guarantees that fmt points to bpf program stack,
+ * fmt_size bytes of it were initialized and fmt_size > 0
+ */
+ if (fmt[--fmt_size] != 0)
+ return -EINVAL;
+
+ /* check format string for allowed specifiers */
+ for (i = 0; i < fmt_size; i++) {
+ if ((!isprint(fmt[i]) && !isspace(fmt[i])) || !isascii(fmt[i]))
+ return -EINVAL;
+
+ if (fmt[i] != '%')
+ continue;
+
+ if (fmt_cnt >= 3)
+ return -EINVAL;
+
+ /* fmt[i] != 0 && fmt[last] == 0, so we can access fmt[i + 1] */
+ i++;
+ if (fmt[i] == 'l') {
+ mod[fmt_cnt]++;
+ i++;
+ } else if (fmt[i] == 'p') {
+ mod[fmt_cnt]++;
+ i++;
+ if (!isspace(fmt[i]) && !ispunct(fmt[i]) && fmt[i] != 0)
+ return -EINVAL;
+ fmt_cnt++;
+ continue;
+ }
+
+ if (fmt[i] == 'l') {
+ mod[fmt_cnt]++;
+ i++;
+ }
+
+ if (fmt[i] != 'd' && fmt[i] != 'u' && fmt[i] != 'x')
+ return -EINVAL;
+ fmt_cnt++;
+ }
+
+ return __trace_printk(1/* fake ip will not be printed */, fmt,
+ mod[0] == 2 ? r3 : mod[0] == 1 ? (long) r3 : (u32) r3,
+ mod[1] == 2 ? r4 : mod[1] == 1 ? (long) r4 : (u32) r4,
+ mod[2] == 2 ? r5 : mod[2] == 1 ? (long) r5 : (u32) r5);
+}
+
+static const struct bpf_func_proto bpf_trace_printk_proto = {
+ .func = bpf_trace_printk,
+ .gpl_only = true,
+ .ret_type = RET_INTEGER,
+ .arg1_type = ARG_PTR_TO_STACK,
+ .arg2_type = ARG_CONST_STACK_SIZE,
+};
+
+static const struct bpf_func_proto *kprobe_prog_func_proto(enum bpf_func_id func_id)
+{
+ switch (func_id) {
+ case BPF_FUNC_map_lookup_elem:
+ return &bpf_map_lookup_elem_proto;
+ case BPF_FUNC_map_update_elem:
+ return &bpf_map_update_elem_proto;
+ case BPF_FUNC_map_delete_elem:
+ return &bpf_map_delete_elem_proto;
+ case BPF_FUNC_probe_read:
+ return &bpf_probe_read_proto;
+ case BPF_FUNC_ktime_get_ns:
+ return &bpf_ktime_get_ns_proto;
+
+ case BPF_FUNC_trace_printk:
+ /*
+ * this program might be calling bpf_trace_printk,
+ * so allocate per-cpu printk buffers
+ */
+ trace_printk_init_buffers();
+
+ return &bpf_trace_printk_proto;
+ default:
+ return NULL;
+ }
+}
+
+/* bpf+kprobe programs can access fields of 'struct pt_regs' */
+static bool kprobe_prog_is_valid_access(int off, int size, enum bpf_access_type type)
+{
+ /* check bounds */
+ if (off < 0 || off >= sizeof(struct pt_regs))
+ return false;
+
+ /* only read is allowed */
+ if (type != BPF_READ)
+ return false;
+
+ /* disallow misaligned access */
+ if (off % size != 0)
+ return false;
+
+ return true;
+}
+
+static struct bpf_verifier_ops kprobe_prog_ops = {
+ .get_func_proto = kprobe_prog_func_proto,
+ .is_valid_access = kprobe_prog_is_valid_access,
+};
+
+static struct bpf_prog_type_list kprobe_tl = {
+ .ops = &kprobe_prog_ops,
+ .type = BPF_PROG_TYPE_KPROBE,
+};
+
+static int __init register_kprobe_prog_ops(void)
+{
+ bpf_register_prog_type(&kprobe_tl);
+ return 0;
+}
+late_initcall(register_kprobe_prog_ops);
#include <linux/kallsyms.h>
#include <linux/seq_file.h>
#include <linux/suspend.h>
-#include <linux/debugfs.h>
+#include <linux/tracefs.h>
#include <linux/hardirq.h>
#include <linux/kthread.h>
#include <linux/uaccess.h>
static inline void update_function_graph_func(void) { }
#endif
+
+static ftrace_func_t ftrace_ops_get_list_func(struct ftrace_ops *ops)
+{
+ /*
+ * If this is a dynamic ops or we force list func,
+ * then it needs to call the list anyway.
+ */
+ if (ops->flags & FTRACE_OPS_FL_DYNAMIC || FTRACE_FORCE_LIST_FUNC)
+ return ftrace_ops_list_func;
+
+ return ftrace_ops_get_func(ops);
+}
+
static void update_ftrace_function(void)
{
ftrace_func_t func;
* then have the mcount trampoline call the function directly.
*/
} else if (ftrace_ops_list->next == &ftrace_list_end) {
- func = ftrace_ops_get_func(ftrace_ops_list);
+ func = ftrace_ops_get_list_func(ftrace_ops_list);
} else {
/* Just use the default ftrace_ops */
.stat_show = function_stat_show
};
-static __init void ftrace_profile_debugfs(struct dentry *d_tracer)
+static __init void ftrace_profile_tracefs(struct dentry *d_tracer)
{
struct ftrace_profile_stat *stat;
struct dentry *entry;
}
}
- entry = debugfs_create_file("function_profile_enabled", 0644,
+ entry = tracefs_create_file("function_profile_enabled", 0644,
d_tracer, NULL, &ftrace_profile_fops);
if (!entry)
- pr_warning("Could not create debugfs "
+ pr_warning("Could not create tracefs "
"'function_profile_enabled' entry\n");
}
#else /* CONFIG_FUNCTION_PROFILER */
-static __init void ftrace_profile_debugfs(struct dentry *d_tracer)
+static __init void ftrace_profile_tracefs(struct dentry *d_tracer)
{
}
#endif /* CONFIG_FUNCTION_PROFILER */
mutex_unlock(&ftrace_lock);
}
-static __init int ftrace_init_dyn_debugfs(struct dentry *d_tracer)
+static __init int ftrace_init_dyn_tracefs(struct dentry *d_tracer)
{
trace_create_file("available_filter_functions", 0444,
}
core_initcall(ftrace_nodyn_init);
-static inline int ftrace_init_dyn_debugfs(struct dentry *d_tracer) { return 0; }
+static inline int ftrace_init_dyn_tracefs(struct dentry *d_tracer) { return 0; }
static inline void ftrace_startup_enable(int command) { }
static inline void ftrace_startup_all(int command) { }
/* Keep as macros so we do not need to define the commands */
*/
ftrace_func_t ftrace_ops_get_func(struct ftrace_ops *ops)
{
- /*
- * If this is a dynamic ops or we force list func,
- * then it needs to call the list anyway.
- */
- if (ops->flags & FTRACE_OPS_FL_DYNAMIC || FTRACE_FORCE_LIST_FUNC)
- return ftrace_ops_list_func;
-
/*
* If the func handles its own recursion, call it directly.
* Otherwise call the recursion protected function that
.release = ftrace_pid_release,
};
-static __init int ftrace_init_debugfs(void)
+static __init int ftrace_init_tracefs(void)
{
struct dentry *d_tracer;
if (IS_ERR(d_tracer))
return 0;
- ftrace_init_dyn_debugfs(d_tracer);
+ ftrace_init_dyn_tracefs(d_tracer);
trace_create_file("set_ftrace_pid", 0644, d_tracer,
NULL, &ftrace_pid_fops);
- ftrace_profile_debugfs(d_tracer);
+ ftrace_profile_tracefs(d_tracer);
return 0;
}
-fs_initcall(ftrace_init_debugfs);
+fs_initcall(ftrace_init_tracefs);
/**
* ftrace_kill - kill ftrace
static __always_inline int trace_recursive_lock(void)
{
- unsigned int val = this_cpu_read(current_context);
+ unsigned int val = __this_cpu_read(current_context);
int bit;
if (in_interrupt()) {
return 1;
val |= (1 << bit);
- this_cpu_write(current_context, val);
+ __this_cpu_write(current_context, val);
return 0;
}
static __always_inline void trace_recursive_unlock(void)
{
- unsigned int val = this_cpu_read(current_context);
-
- val--;
- val &= this_cpu_read(current_context);
- this_cpu_write(current_context, val);
+ __this_cpu_and(current_context, __this_cpu_read(current_context) - 1);
}
#else
#include <linux/notifier.h>
#include <linux/irqflags.h>
#include <linux/debugfs.h>
+#include <linux/tracefs.h>
#include <linux/pagemap.h>
#include <linux/hardirq.h>
#include <linux/linkage.h>
#include <linux/splice.h>
#include <linux/kdebug.h>
#include <linux/string.h>
+#include <linux/mount.h>
#include <linux/rwsem.h>
#include <linux/slab.h>
#include <linux/ctype.h>
/* When set, tracing will stop when a WARN*() is hit */
int __disable_trace_on_warning;
+#ifdef CONFIG_TRACE_ENUM_MAP_FILE
+/* Map of enums to their values, for "enum_map" file */
+struct trace_enum_map_head {
+ struct module *mod;
+ unsigned long length;
+};
+
+union trace_enum_map_item;
+
+struct trace_enum_map_tail {
+ /*
+ * "end" is first and points to NULL as it must be different
+ * than "mod" or "enum_string"
+ */
+ union trace_enum_map_item *next;
+ const char *end; /* points to NULL */
+};
+
+static DEFINE_MUTEX(trace_enum_mutex);
+
+/*
+ * The trace_enum_maps are saved in an array with two extra elements,
+ * one at the beginning, and one at the end. The beginning item contains
+ * the count of the saved maps (head.length), and the module they
+ * belong to if not built in (head.mod). The ending item contains a
+ * pointer to the next array of saved enum_map items.
+ */
+union trace_enum_map_item {
+ struct trace_enum_map map;
+ struct trace_enum_map_head head;
+ struct trace_enum_map_tail tail;
+};
+
+static union trace_enum_map_item *trace_enum_maps;
+#endif /* CONFIG_TRACE_ENUM_MAP_FILE */
+
static int tracing_set_tracer(struct trace_array *tr, const char *buf);
#define MAX_TRACER_SIZE 100
.write = tracing_saved_cmdlines_size_write,
};
+#ifdef CONFIG_TRACE_ENUM_MAP_FILE
+static union trace_enum_map_item *
+update_enum_map(union trace_enum_map_item *ptr)
+{
+ if (!ptr->map.enum_string) {
+ if (ptr->tail.next) {
+ ptr = ptr->tail.next;
+ /* Set ptr to the next real item (skip head) */
+ ptr++;
+ } else
+ return NULL;
+ }
+ return ptr;
+}
+
+static void *enum_map_next(struct seq_file *m, void *v, loff_t *pos)
+{
+ union trace_enum_map_item *ptr = v;
+
+ /*
+ * Paranoid! If ptr points to end, we don't want to increment past it.
+ * This really should never happen.
+ */
+ ptr = update_enum_map(ptr);
+ if (WARN_ON_ONCE(!ptr))
+ return NULL;
+
+ ptr++;
+
+ (*pos)++;
+
+ ptr = update_enum_map(ptr);
+
+ return ptr;
+}
+
+static void *enum_map_start(struct seq_file *m, loff_t *pos)
+{
+ union trace_enum_map_item *v;
+ loff_t l = 0;
+
+ mutex_lock(&trace_enum_mutex);
+
+ v = trace_enum_maps;
+ if (v)
+ v++;
+
+ while (v && l < *pos) {
+ v = enum_map_next(m, v, &l);
+ }
+
+ return v;
+}
+
+static void enum_map_stop(struct seq_file *m, void *v)
+{
+ mutex_unlock(&trace_enum_mutex);
+}
+
+static int enum_map_show(struct seq_file *m, void *v)
+{
+ union trace_enum_map_item *ptr = v;
+
+ seq_printf(m, "%s %ld (%s)\n",
+ ptr->map.enum_string, ptr->map.enum_value,
+ ptr->map.system);
+
+ return 0;
+}
+
+static const struct seq_operations tracing_enum_map_seq_ops = {
+ .start = enum_map_start,
+ .next = enum_map_next,
+ .stop = enum_map_stop,
+ .show = enum_map_show,
+};
+
+static int tracing_enum_map_open(struct inode *inode, struct file *filp)
+{
+ if (tracing_disabled)
+ return -ENODEV;
+
+ return seq_open(filp, &tracing_enum_map_seq_ops);
+}
+
+static const struct file_operations tracing_enum_map_fops = {
+ .open = tracing_enum_map_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = seq_release,
+};
+
+static inline union trace_enum_map_item *
+trace_enum_jmp_to_tail(union trace_enum_map_item *ptr)
+{
+ /* Return tail of array given the head */
+ return ptr + ptr->head.length + 1;
+}
+
+static void
+trace_insert_enum_map_file(struct module *mod, struct trace_enum_map **start,
+ int len)
+{
+ struct trace_enum_map **stop;
+ struct trace_enum_map **map;
+ union trace_enum_map_item *map_array;
+ union trace_enum_map_item *ptr;
+
+ stop = start + len;
+
+ /*
+ * The trace_enum_maps contains the map plus a head and tail item,
+ * where the head holds the module and length of array, and the
+ * tail holds a pointer to the next list.
+ */
+ map_array = kmalloc(sizeof(*map_array) * (len + 2), GFP_KERNEL);
+ if (!map_array) {
+ pr_warning("Unable to allocate trace enum mapping\n");
+ return;
+ }
+
+ mutex_lock(&trace_enum_mutex);
+
+ if (!trace_enum_maps)
+ trace_enum_maps = map_array;
+ else {
+ ptr = trace_enum_maps;
+ for (;;) {
+ ptr = trace_enum_jmp_to_tail(ptr);
+ if (!ptr->tail.next)
+ break;
+ ptr = ptr->tail.next;
+
+ }
+ ptr->tail.next = map_array;
+ }
+ map_array->head.mod = mod;
+ map_array->head.length = len;
+ map_array++;
+
+ for (map = start; (unsigned long)map < (unsigned long)stop; map++) {
+ map_array->map = **map;
+ map_array++;
+ }
+ memset(map_array, 0, sizeof(*map_array));
+
+ mutex_unlock(&trace_enum_mutex);
+}
+
+static void trace_create_enum_file(struct dentry *d_tracer)
+{
+ trace_create_file("enum_map", 0444, d_tracer,
+ NULL, &tracing_enum_map_fops);
+}
+
+#else /* CONFIG_TRACE_ENUM_MAP_FILE */
+static inline void trace_create_enum_file(struct dentry *d_tracer) { }
+static inline void trace_insert_enum_map_file(struct module *mod,
+ struct trace_enum_map **start, int len) { }
+#endif /* !CONFIG_TRACE_ENUM_MAP_FILE */
+
+static void trace_insert_enum_map(struct module *mod,
+ struct trace_enum_map **start, int len)
+{
+ struct trace_enum_map **map;
+
+ if (len <= 0)
+ return;
+
+ map = start;
+
+ trace_event_enum_update(map, len);
+
+ trace_insert_enum_map_file(mod, start, len);
+}
+
static ssize_t
tracing_set_trace_read(struct file *filp, char __user *ubuf,
size_t cnt, loff_t *ppos)
tr->current_trace = &nop_trace;
}
-static int tracing_set_tracer(struct trace_array *tr, const char *buf)
+static void update_tracer_options(struct trace_array *tr, struct tracer *t)
{
static struct trace_option_dentry *topts;
+
+ /* Only enable if the directory has been created already. */
+ if (!tr->dir)
+ return;
+
+ /* Currently, only the top instance has options */
+ if (!(tr->flags & TRACE_ARRAY_FL_GLOBAL))
+ return;
+
+ destroy_trace_option_files(topts);
+ topts = create_trace_option_files(tr, t);
+}
+
+static int tracing_set_tracer(struct trace_array *tr, const char *buf)
+{
struct tracer *t;
#ifdef CONFIG_TRACER_MAX_TRACE
bool had_max_tr;
free_snapshot(tr);
}
#endif
- /* Currently, only the top instance has options */
- if (tr->flags & TRACE_ARRAY_FL_GLOBAL) {
- destroy_trace_option_files(topts);
- topts = create_trace_option_files(tr, t);
- }
+ update_tracer_options(tr, t);
#ifdef CONFIG_TRACER_MAX_TRACE
if (t->use_max_tr && !had_max_tr) {
static struct dentry *tracing_get_dentry(struct trace_array *tr)
{
+ if (WARN_ON(!tr->dir))
+ return ERR_PTR(-ENODEV);
+
+ /* Top directory uses NULL as the parent */
+ if (tr->flags & TRACE_ARRAY_FL_GLOBAL)
+ return NULL;
+
+ /* All sub buffers have a descriptor */
return tr->dir;
}
if (IS_ERR(d_tracer))
return NULL;
- tr->percpu_dir = debugfs_create_dir("per_cpu", d_tracer);
+ tr->percpu_dir = tracefs_create_dir("per_cpu", d_tracer);
WARN_ONCE(!tr->percpu_dir,
- "Could not create debugfs directory 'per_cpu/%d'\n", cpu);
+ "Could not create tracefs directory 'per_cpu/%d'\n", cpu);
return tr->percpu_dir;
}
}
static void
-tracing_init_debugfs_percpu(struct trace_array *tr, long cpu)
+tracing_init_tracefs_percpu(struct trace_array *tr, long cpu)
{
struct dentry *d_percpu = tracing_dentry_percpu(tr, cpu);
struct dentry *d_cpu;
return;
snprintf(cpu_dir, 30, "cpu%ld", cpu);
- d_cpu = debugfs_create_dir(cpu_dir, d_percpu);
+ d_cpu = tracefs_create_dir(cpu_dir, d_percpu);
if (!d_cpu) {
- pr_warning("Could not create debugfs '%s' entry\n", cpu_dir);
+ pr_warning("Could not create tracefs '%s' entry\n", cpu_dir);
return;
}
{
struct dentry *ret;
- ret = debugfs_create_file(name, mode, parent, data, fops);
+ ret = tracefs_create_file(name, mode, parent, data, fops);
if (!ret)
- pr_warning("Could not create debugfs '%s' entry\n", name);
+ pr_warning("Could not create tracefs '%s' entry\n", name);
return ret;
}
if (IS_ERR(d_tracer))
return NULL;
- tr->options = debugfs_create_dir("options", d_tracer);
+ tr->options = tracefs_create_dir("options", d_tracer);
if (!tr->options) {
- pr_warning("Could not create debugfs directory 'options'\n");
+ pr_warning("Could not create tracefs directory 'options'\n");
return NULL;
}
return;
for (cnt = 0; topts[cnt].opt; cnt++)
- debugfs_remove(topts[cnt].entry);
+ tracefs_remove(topts[cnt].entry);
kfree(topts);
}
struct dentry *trace_instance_dir;
static void
-init_tracer_debugfs(struct trace_array *tr, struct dentry *d_tracer);
+init_tracer_tracefs(struct trace_array *tr, struct dentry *d_tracer);
static int
allocate_trace_buffer(struct trace_array *tr, struct trace_buffer *buf, int size)
#endif
}
-static int new_instance_create(const char *name)
+static int instance_mkdir(const char *name)
{
struct trace_array *tr;
int ret;
if (allocate_trace_buffers(tr, trace_buf_size) < 0)
goto out_free_tr;
- tr->dir = debugfs_create_dir(name, trace_instance_dir);
+ tr->dir = tracefs_create_dir(name, trace_instance_dir);
if (!tr->dir)
goto out_free_tr;
ret = event_trace_add_tracer(tr->dir, tr);
if (ret) {
- debugfs_remove_recursive(tr->dir);
+ tracefs_remove_recursive(tr->dir);
goto out_free_tr;
}
- init_tracer_debugfs(tr, tr->dir);
+ init_tracer_tracefs(tr, tr->dir);
list_add(&tr->list, &ftrace_trace_arrays);
}
-static int instance_delete(const char *name)
+static int instance_rmdir(const char *name)
{
struct trace_array *tr;
int found = 0;
return ret;
}
-static int instance_mkdir (struct inode *inode, struct dentry *dentry, umode_t mode)
-{
- struct dentry *parent;
- int ret;
-
- /* Paranoid: Make sure the parent is the "instances" directory */
- parent = hlist_entry(inode->i_dentry.first, struct dentry, d_u.d_alias);
- if (WARN_ON_ONCE(parent != trace_instance_dir))
- return -ENOENT;
-
- /*
- * The inode mutex is locked, but debugfs_create_dir() will also
- * take the mutex. As the instances directory can not be destroyed
- * or changed in any other way, it is safe to unlock it, and
- * let the dentry try. If two users try to make the same dir at
- * the same time, then the new_instance_create() will determine the
- * winner.
- */
- mutex_unlock(&inode->i_mutex);
-
- ret = new_instance_create(dentry->d_iname);
-
- mutex_lock(&inode->i_mutex);
-
- return ret;
-}
-
-static int instance_rmdir(struct inode *inode, struct dentry *dentry)
-{
- struct dentry *parent;
- int ret;
-
- /* Paranoid: Make sure the parent is the "instances" directory */
- parent = hlist_entry(inode->i_dentry.first, struct dentry, d_u.d_alias);
- if (WARN_ON_ONCE(parent != trace_instance_dir))
- return -ENOENT;
-
- /* The caller did a dget() on dentry */
- mutex_unlock(&dentry->d_inode->i_mutex);
-
- /*
- * The inode mutex is locked, but debugfs_create_dir() will also
- * take the mutex. As the instances directory can not be destroyed
- * or changed in any other way, it is safe to unlock it, and
- * let the dentry try. If two users try to make the same dir at
- * the same time, then the instance_delete() will determine the
- * winner.
- */
- mutex_unlock(&inode->i_mutex);
-
- ret = instance_delete(dentry->d_iname);
-
- mutex_lock_nested(&inode->i_mutex, I_MUTEX_PARENT);
- mutex_lock(&dentry->d_inode->i_mutex);
-
- return ret;
-}
-
-static const struct inode_operations instance_dir_inode_operations = {
- .lookup = simple_lookup,
- .mkdir = instance_mkdir,
- .rmdir = instance_rmdir,
-};
-
static __init void create_trace_instances(struct dentry *d_tracer)
{
- trace_instance_dir = debugfs_create_dir("instances", d_tracer);
+ trace_instance_dir = tracefs_create_instance_dir("instances", d_tracer,
+ instance_mkdir,
+ instance_rmdir);
if (WARN_ON(!trace_instance_dir))
return;
-
- /* Hijack the dir inode operations, to allow mkdir */
- trace_instance_dir->d_inode->i_op = &instance_dir_inode_operations;
}
static void
-init_tracer_debugfs(struct trace_array *tr, struct dentry *d_tracer)
+init_tracer_tracefs(struct trace_array *tr, struct dentry *d_tracer)
{
int cpu;
#endif
for_each_tracing_cpu(cpu)
- tracing_init_debugfs_percpu(tr, cpu);
+ tracing_init_tracefs_percpu(tr, cpu);
}
+static struct vfsmount *trace_automount(void *ingore)
+{
+ struct vfsmount *mnt;
+ struct file_system_type *type;
+
+ /*
+ * To maintain backward compatibility for tools that mount
+ * debugfs to get to the tracing facility, tracefs is automatically
+ * mounted to the debugfs/tracing directory.
+ */
+ type = get_fs_type("tracefs");
+ if (!type)
+ return NULL;
+ mnt = vfs_kern_mount(type, 0, "tracefs", NULL);
+ put_filesystem(type);
+ if (IS_ERR(mnt))
+ return NULL;
+ mntget(mnt);
+
+ return mnt;
+}
+
/**
* tracing_init_dentry - initialize top level trace array
*
{
struct trace_array *tr = &global_trace;
+ /* The top level trace array uses NULL as parent */
if (tr->dir)
- return tr->dir;
+ return NULL;
if (WARN_ON(!debugfs_initialized()))
return ERR_PTR(-ENODEV);
- tr->dir = debugfs_create_dir("tracing", NULL);
-
+ /*
+ * As there may still be users that expect the tracing
+ * files to exist in debugfs/tracing, we must automount
+ * the tracefs file system there, so older tools still
+ * work with the newer kerenl.
+ */
+ tr->dir = debugfs_create_automount("tracing", NULL,
+ trace_automount, NULL);
if (!tr->dir) {
pr_warn_once("Could not create debugfs directory 'tracing'\n");
return ERR_PTR(-ENOMEM);
}
- return tr->dir;
+ return NULL;
+}
+
+extern struct trace_enum_map *__start_ftrace_enum_maps[];
+extern struct trace_enum_map *__stop_ftrace_enum_maps[];
+
+static void __init trace_enum_init(void)
+{
+ int len;
+
+ len = __stop_ftrace_enum_maps - __start_ftrace_enum_maps;
+ trace_insert_enum_map(NULL, __start_ftrace_enum_maps, len);
+}
+
+#ifdef CONFIG_MODULES
+static void trace_module_add_enums(struct module *mod)
+{
+ if (!mod->num_trace_enums)
+ return;
+
+ /*
+ * Modules with bad taint do not have events created, do
+ * not bother with enums either.
+ */
+ if (trace_module_has_bad_taint(mod))
+ return;
+
+ trace_insert_enum_map(mod, mod->trace_enums, mod->num_trace_enums);
}
-static __init int tracer_init_debugfs(void)
+#ifdef CONFIG_TRACE_ENUM_MAP_FILE
+static void trace_module_remove_enums(struct module *mod)
+{
+ union trace_enum_map_item *map;
+ union trace_enum_map_item **last = &trace_enum_maps;
+
+ if (!mod->num_trace_enums)
+ return;
+
+ mutex_lock(&trace_enum_mutex);
+
+ map = trace_enum_maps;
+
+ while (map) {
+ if (map->head.mod == mod)
+ break;
+ map = trace_enum_jmp_to_tail(map);
+ last = &map->tail.next;
+ map = map->tail.next;
+ }
+ if (!map)
+ goto out;
+
+ *last = trace_enum_jmp_to_tail(map)->tail.next;
+ kfree(map);
+ out:
+ mutex_unlock(&trace_enum_mutex);
+}
+#else
+static inline void trace_module_remove_enums(struct module *mod) { }
+#endif /* CONFIG_TRACE_ENUM_MAP_FILE */
+
+static int trace_module_notify(struct notifier_block *self,
+ unsigned long val, void *data)
+{
+ struct module *mod = data;
+
+ switch (val) {
+ case MODULE_STATE_COMING:
+ trace_module_add_enums(mod);
+ break;
+ case MODULE_STATE_GOING:
+ trace_module_remove_enums(mod);
+ break;
+ }
+
+ return 0;
+}
+
+static struct notifier_block trace_module_nb = {
+ .notifier_call = trace_module_notify,
+ .priority = 0,
+};
+#endif /* CONFIG_MODULES */
+
+static __init int tracer_init_tracefs(void)
{
struct dentry *d_tracer;
if (IS_ERR(d_tracer))
return 0;
- init_tracer_debugfs(&global_trace, d_tracer);
+ init_tracer_tracefs(&global_trace, d_tracer);
trace_create_file("tracing_thresh", 0644, d_tracer,
&global_trace, &tracing_thresh_fops);
trace_create_file("saved_cmdlines_size", 0644, d_tracer,
NULL, &tracing_saved_cmdlines_size_fops);
+ trace_enum_init();
+
+ trace_create_enum_file(d_tracer);
+
+#ifdef CONFIG_MODULES
+ register_module_notifier(&trace_module_nb);
+#endif
+
#ifdef CONFIG_DYNAMIC_FTRACE
trace_create_file("dyn_ftrace_total_info", 0444, d_tracer,
&ftrace_update_tot_cnt, &tracing_dyn_info_fops);
create_trace_options_dir(&global_trace);
+ /* If the tracer was started via cmdline, create options for it here */
+ if (global_trace.current_trace != &nop_trace)
+ update_tracer_options(&global_trace, global_trace.current_trace);
+
return 0;
}
tracepoint_printk = 0;
}
tracer_alloc_buffers();
- trace_event_init();
+ trace_event_init();
}
__init static int clear_boot_tracer(void)
return 0;
}
-fs_initcall(tracer_init_debugfs);
+fs_initcall(tracer_init_tracefs);
late_initcall(clear_boot_tracer);
/**
- * struct tracer - a specific tracer and its callbacks to interact with debugfs
+ * struct tracer - a specific tracer and its callbacks to interact with tracefs
* @name: the name chosen to select it on the available_tracers file
* @init: called when one switches to this tracer (echo name > current_tracer)
* @reset: called when one switches to another tracer
#ifdef CONFIG_EVENT_TRACING
void trace_event_init(void);
+void trace_event_enum_update(struct trace_enum_map **map, int len);
#else
static inline void __init trace_event_init(void) { }
+static inlin void trace_event_enum_update(struct trace_enum_map **map, int len) { }
#endif
extern struct trace_iterator *tracepoint_print_iter;
__dynamic_array( u32, buf )
),
- F_printk("%pf: %s",
+ F_printk("%ps: %s",
(void *)__entry->ip, __entry->fmt),
FILTER_OTHER
__dynamic_array( char, buf )
),
- F_printk("%pf: %s",
+ F_printk("%ps: %s",
(void *)__entry->ip, __entry->buf),
FILTER_OTHER
__field( const char *, str )
),
- F_printk("%pf: %s",
+ F_printk("%ps: %s",
(void *)__entry->ip, __entry->str),
FILTER_OTHER
#include <linux/workqueue.h>
#include <linux/spinlock.h>
#include <linux/kthread.h>
-#include <linux/debugfs.h>
+#include <linux/tracefs.h>
#include <linux/uaccess.h>
#include <linux/module.h>
#include <linux/ctype.h>
return;
if (!--dir->nr_events) {
- debugfs_remove_recursive(dir->entry);
+ tracefs_remove_recursive(dir->entry);
list_del(&dir->list);
__put_system_dir(dir);
}
}
spin_unlock(&dir->d_lock);
- debugfs_remove_recursive(dir);
+ tracefs_remove_recursive(dir);
}
list_del(&file->list);
} else
__get_system(system);
- dir->entry = debugfs_create_dir(name, parent);
+ dir->entry = tracefs_create_dir(name, parent);
if (!dir->entry) {
pr_warn("Failed to create system directory %s\n", name);
__put_system(system);
dir->subsystem = system;
file->system = dir;
- entry = debugfs_create_file("filter", 0644, dir->entry, dir,
+ entry = tracefs_create_file("filter", 0644, dir->entry, dir,
&ftrace_subsystem_filter_fops);
if (!entry) {
kfree(system->filter);
system->filter = NULL;
- pr_warn("Could not create debugfs '%s/filter' entry\n", name);
+ pr_warn("Could not create tracefs '%s/filter' entry\n", name);
}
trace_create_file("enable", 0644, dir->entry, dir,
d_events = parent;
name = ftrace_event_name(call);
- file->dir = debugfs_create_dir(name, d_events);
+ file->dir = tracefs_create_dir(name, d_events);
if (!file->dir) {
- pr_warn("Could not create debugfs '%s' directory\n", name);
+ pr_warn("Could not create tracefs '%s' directory\n", name);
return -1;
}
return 0;
}
+static char *enum_replace(char *ptr, struct trace_enum_map *map, int len)
+{
+ int rlen;
+ int elen;
+
+ /* Find the length of the enum value as a string */
+ elen = snprintf(ptr, 0, "%ld", map->enum_value);
+ /* Make sure there's enough room to replace the string with the value */
+ if (len < elen)
+ return NULL;
+
+ snprintf(ptr, elen + 1, "%ld", map->enum_value);
+
+ /* Get the rest of the string of ptr */
+ rlen = strlen(ptr + len);
+ memmove(ptr + elen, ptr + len, rlen);
+ /* Make sure we end the new string */
+ ptr[elen + rlen] = 0;
+
+ return ptr + elen;
+}
+
+static void update_event_printk(struct ftrace_event_call *call,
+ struct trace_enum_map *map)
+{
+ char *ptr;
+ int quote = 0;
+ int len = strlen(map->enum_string);
+
+ for (ptr = call->print_fmt; *ptr; ptr++) {
+ if (*ptr == '\\') {
+ ptr++;
+ /* paranoid */
+ if (!*ptr)
+ break;
+ continue;
+ }
+ if (*ptr == '"') {
+ quote ^= 1;
+ continue;
+ }
+ if (quote)
+ continue;
+ if (isdigit(*ptr)) {
+ /* skip numbers */
+ do {
+ ptr++;
+ /* Check for alpha chars like ULL */
+ } while (isalnum(*ptr));
+ /*
+ * A number must have some kind of delimiter after
+ * it, and we can ignore that too.
+ */
+ continue;
+ }
+ if (isalpha(*ptr) || *ptr == '_') {
+ if (strncmp(map->enum_string, ptr, len) == 0 &&
+ !isalnum(ptr[len]) && ptr[len] != '_') {
+ ptr = enum_replace(ptr, map, len);
+ /* Hmm, enum string smaller than value */
+ if (WARN_ON_ONCE(!ptr))
+ return;
+ /*
+ * No need to decrement here, as enum_replace()
+ * returns the pointer to the character passed
+ * the enum, and two enums can not be placed
+ * back to back without something in between.
+ * We can skip that something in between.
+ */
+ continue;
+ }
+ skip_more:
+ do {
+ ptr++;
+ } while (isalnum(*ptr) || *ptr == '_');
+ /*
+ * If what comes after this variable is a '.' or
+ * '->' then we can continue to ignore that string.
+ */
+ if (*ptr == '.' || (ptr[0] == '-' && ptr[1] == '>')) {
+ ptr += *ptr == '.' ? 1 : 2;
+ goto skip_more;
+ }
+ /*
+ * Once again, we can skip the delimiter that came
+ * after the string.
+ */
+ continue;
+ }
+ }
+}
+
+void trace_event_enum_update(struct trace_enum_map **map, int len)
+{
+ struct ftrace_event_call *call, *p;
+ const char *last_system = NULL;
+ int last_i;
+ int i;
+
+ down_write(&trace_event_sem);
+ list_for_each_entry_safe(call, p, &ftrace_events, list) {
+ /* events are usually grouped together with systems */
+ if (!last_system || call->class->system != last_system) {
+ last_i = 0;
+ last_system = call->class->system;
+ }
+
+ for (i = last_i; i < len; i++) {
+ if (call->class->system == map[i]->system) {
+ /* Save the first system if need be */
+ if (!last_i)
+ last_i = i;
+ update_event_printk(call, map[i]);
+ }
+ }
+ }
+ up_write(&trace_event_sem);
+}
+
static struct ftrace_event_file *
trace_create_new_event(struct ftrace_event_call *call,
struct trace_array *tr)
static struct notifier_block trace_module_nb = {
.notifier_call = trace_module_notify,
- .priority = 0,
+ .priority = 1, /* higher than trace.c module notify */
};
#endif /* CONFIG_MODULES */
/*
* The top level array has already had its ftrace_event_file
* descriptors created in order to allow for early events to
- * be recorded. This function is called after the debugfs has been
+ * be recorded. This function is called after the tracefs has been
* initialized, and we now have to create the files associated
* to the events.
*/
struct dentry *d_events;
struct dentry *entry;
- entry = debugfs_create_file("set_event", 0644, parent,
+ entry = tracefs_create_file("set_event", 0644, parent,
tr, &ftrace_set_event_fops);
if (!entry) {
- pr_warn("Could not create debugfs 'set_event' entry\n");
+ pr_warn("Could not create tracefs 'set_event' entry\n");
return -ENOMEM;
}
- d_events = debugfs_create_dir("events", parent);
+ d_events = tracefs_create_dir("events", parent);
if (!d_events) {
- pr_warn("Could not create debugfs 'events' directory\n");
+ pr_warn("Could not create tracefs 'events' directory\n");
return -ENOMEM;
}
down_write(&trace_event_sem);
__trace_remove_event_dirs(tr);
- debugfs_remove_recursive(tr->event_dir);
+ tracefs_remove_recursive(tr->event_dir);
up_write(&trace_event_sem);
tr->event_dir = NULL;
if (IS_ERR(d_tracer))
return 0;
- entry = debugfs_create_file("available_events", 0444, d_tracer,
+ entry = tracefs_create_file("available_events", 0444, d_tracer,
tr, &ftrace_avail_fops);
if (!entry)
- pr_warn("Could not create debugfs 'available_events' entry\n");
+ pr_warn("Could not create tracefs 'available_events' entry\n");
if (trace_define_common_fields())
pr_warn("tracing: Failed to allocate common fields");
}, \
.event.type = etype, \
.print_fmt = print, \
- .flags = TRACE_EVENT_FL_IGNORE_ENABLE | TRACE_EVENT_FL_USE_CALL_FILTER, \
+ .flags = TRACE_EVENT_FL_IGNORE_ENABLE, \
}; \
struct ftrace_event_call __used \
__attribute__((section("_ftrace_events"))) *__event_##call = &event_##call;
* is Copyright (c) Steven Rostedt <srostedt@redhat.com>
*
*/
-#include <linux/debugfs.h>
#include <linux/uaccess.h>
#include <linux/ftrace.h>
#include <linux/slab.h>
* The curr_ret_stack is initialized to -1 and get increased
* in this function. So it can be less than -1 only if it was
* filtered out via ftrace_graph_notrace_addr() which can be
- * set from set_graph_notrace file in debugfs by user.
+ * set from set_graph_notrace file in tracefs by user.
*/
if (current->curr_ret_stack < -1)
return -EBUSY;
.llseek = generic_file_llseek,
};
-static __init int init_graph_debugfs(void)
+static __init int init_graph_tracefs(void)
{
struct dentry *d_tracer;
return 0;
}
-fs_initcall(init_graph_debugfs);
+fs_initcall(init_graph_tracefs);
static __init int init_graph_trace(void)
{
#define fetch_file_offset_string_size NULL
/* Fetch type information table */
-const struct fetch_type kprobes_fetch_type_table[] = {
+static const struct fetch_type kprobes_fetch_type_table[] = {
/* Special types */
[FETCH_TYPE_STRING] = __ASSIGN_FETCH_TYPE("string", string, string,
sizeof(u32), 1, "__data_loc char[]"),
/* Parse fetch argument */
ret = traceprobe_parse_probe_arg(arg, &tk->tp.size, parg,
- is_return, true);
+ is_return, true,
+ kprobes_fetch_type_table);
if (ret) {
pr_info("Parse error at argument[%d]. (%d)\n", i, ret);
goto error;
kprobe_perf_func(struct trace_kprobe *tk, struct pt_regs *regs)
{
struct ftrace_event_call *call = &tk->tp.call;
+ struct bpf_prog *prog = call->prog;
struct kprobe_trace_entry_head *entry;
struct hlist_head *head;
int size, __size, dsize;
int rctx;
+ if (prog && !trace_call_bpf(prog, regs))
+ return;
+
head = this_cpu_ptr(call->perf_events);
if (hlist_empty(head))
return;
struct pt_regs *regs)
{
struct ftrace_event_call *call = &tk->tp.call;
+ struct bpf_prog *prog = call->prog;
struct kretprobe_trace_entry_head *entry;
struct hlist_head *head;
int size, __size, dsize;
int rctx;
+ if (prog && !trace_call_bpf(prog, regs))
+ return;
+
head = this_cpu_ptr(call->perf_events);
if (hlist_empty(head))
return;
kfree(call->print_fmt);
return -ENODEV;
}
- call->flags = 0;
+ call->flags = TRACE_EVENT_FL_KPROBE;
call->class->reg = kprobe_register;
call->data = tk;
ret = trace_add_event_call(call);
return ret;
}
-/* Make a debugfs interface for controlling probe points */
+/* Make a tracefs interface for controlling probe points */
static __init int init_kprobe_trace(void)
{
struct dentry *d_tracer;
if (IS_ERR(d_tracer))
return 0;
- entry = debugfs_create_file("kprobe_events", 0644, d_tracer,
+ entry = tracefs_create_file("kprobe_events", 0644, d_tracer,
NULL, &kprobe_events_ops);
/* Event list interface */
if (!entry)
- pr_warning("Could not create debugfs "
+ pr_warning("Could not create tracefs "
"'kprobe_events' entry\n");
/* Profile interface */
- entry = debugfs_create_file("kprobe_profile", 0444, d_tracer,
+ entry = tracefs_create_file("kprobe_profile", 0444, d_tracer,
NULL, &kprobe_profile_ops);
if (!entry)
- pr_warning("Could not create debugfs "
+ pr_warning("Could not create tracefs "
"'kprobe_profile' entry\n");
return 0;
}
/* Recursive argument parser */
static int parse_probe_arg(char *arg, const struct fetch_type *t,
- struct fetch_param *f, bool is_return, bool is_kprobe)
+ struct fetch_param *f, bool is_return, bool is_kprobe,
+ const struct fetch_type *ftbl)
{
- const struct fetch_type *ftbl;
unsigned long param;
long offset;
char *tmp;
int ret = 0;
- ftbl = is_kprobe ? kprobes_fetch_type_table : uprobes_fetch_type_table;
- BUG_ON(ftbl == NULL);
-
switch (arg[0]) {
case '$':
ret = parse_probe_vars(arg + 1, t, f, is_return, is_kprobe);
dprm->fetch_size = get_fetch_size_function(t,
dprm->fetch, ftbl);
ret = parse_probe_arg(arg, t2, &dprm->orig, is_return,
- is_kprobe);
+ is_kprobe, ftbl);
if (ret)
kfree(dprm);
else {
/* String length checking wrapper */
int traceprobe_parse_probe_arg(char *arg, ssize_t *size,
- struct probe_arg *parg, bool is_return, bool is_kprobe)
+ struct probe_arg *parg, bool is_return, bool is_kprobe,
+ const struct fetch_type *ftbl)
{
- const struct fetch_type *ftbl;
const char *t;
int ret;
- ftbl = is_kprobe ? kprobes_fetch_type_table : uprobes_fetch_type_table;
- BUG_ON(ftbl == NULL);
-
if (strlen(arg) > MAX_ARGSTR_LEN) {
pr_info("Argument is too long.: %s\n", arg);
return -ENOSPC;
}
parg->offset = *size;
*size += parg->type->size;
- ret = parse_probe_arg(arg, parg->type, &parg->fetch, is_return, is_kprobe);
+ ret = parse_probe_arg(arg, parg->type, &parg->fetch, is_return,
+ is_kprobe, ftbl);
if (ret >= 0 && t != NULL)
ret = __parse_bitfield_probe_arg(t, parg->type, &parg->fetch);
#include <linux/seq_file.h>
#include <linux/slab.h>
#include <linux/smp.h>
-#include <linux/debugfs.h>
+#include <linux/tracefs.h>
#include <linux/types.h>
#include <linux/string.h>
#include <linux/ctype.h>
#define FETCH_TYPE_STRING 0
#define FETCH_TYPE_STRSIZE 1
-/*
- * Fetch type information table.
- * It's declared as a weak symbol due to conditional compilation.
- */
-extern __weak const struct fetch_type kprobes_fetch_type_table[];
-extern __weak const struct fetch_type uprobes_fetch_type_table[];
-
#ifdef CONFIG_KPROBE_EVENT
struct symbol_cache;
unsigned long update_symbol_cache(struct symbol_cache *sc);
}
extern int traceprobe_parse_probe_arg(char *arg, ssize_t *size,
- struct probe_arg *parg, bool is_return, bool is_kprobe);
+ struct probe_arg *parg, bool is_return, bool is_kprobe,
+ const struct fetch_type *ftbl);
extern int traceprobe_conflict_field_name(const char *name,
struct probe_arg *args, int narg);
#include <linux/list.h>
#include <linux/slab.h>
#include <linux/rbtree.h>
-#include <linux/debugfs.h>
+#include <linux/tracefs.h>
#include "trace_stat.h"
#include "trace.h"
static void destroy_session(struct stat_session *session)
{
- debugfs_remove(session->file);
+ tracefs_remove(session->file);
__reset_stat_session(session);
mutex_destroy(&session->stat_mutex);
kfree(session);
if (IS_ERR(d_tracing))
return 0;
- stat_dir = debugfs_create_dir("trace_stat", d_tracing);
+ stat_dir = tracefs_create_dir("trace_stat", d_tracing);
if (!stat_dir)
- pr_warning("Could not create debugfs "
+ pr_warning("Could not create tracefs "
"'trace_stat' entry\n");
return 0;
}
if (!stat_dir && tracing_stat_init())
return -ENODEV;
- session->file = debugfs_create_file(session->ts->name, 0644,
+ session->file = tracefs_create_file(session->ts->name, 0644,
stat_dir,
session, &tracing_stat_fops);
if (!session->file)
DEFINE_FETCH_file_offset(string_size)
/* Fetch type information table */
-const struct fetch_type uprobes_fetch_type_table[] = {
+static const struct fetch_type uprobes_fetch_type_table[] = {
/* Special types */
[FETCH_TYPE_STRING] = __ASSIGN_FETCH_TYPE("string", string, string,
sizeof(u32), 1, "__data_loc char[]"),
/* Parse fetch argument */
ret = traceprobe_parse_probe_arg(arg, &tu->tp.size, parg,
- is_return, false);
+ is_return, false,
+ uprobes_fetch_type_table);
if (ret) {
pr_info("Parse error at argument[%d]. (%d)\n", i, ret);
goto error;
return true;
list_for_each_entry(event, &filter->perf_events, hw.tp_list) {
- if (event->hw.tp_target->mm == mm)
+ if (event->hw.target->mm == mm)
return true;
}
static inline bool
uprobe_filter_event(struct trace_uprobe *tu, struct perf_event *event)
{
- return __uprobe_perf_filter(&tu->filter, event->hw.tp_target->mm);
+ return __uprobe_perf_filter(&tu->filter, event->hw.target->mm);
}
static int uprobe_perf_close(struct trace_uprobe *tu, struct perf_event *event)
bool done;
write_lock(&tu->filter.rwlock);
- if (event->hw.tp_target) {
+ if (event->hw.target) {
list_del(&event->hw.tp_list);
done = tu->filter.nr_systemwide ||
- (event->hw.tp_target->flags & PF_EXITING) ||
+ (event->hw.target->flags & PF_EXITING) ||
uprobe_filter_event(tu, event);
} else {
tu->filter.nr_systemwide--;
int err;
write_lock(&tu->filter.rwlock);
- if (event->hw.tp_target) {
+ if (event->hw.target) {
/*
* event->parent != NULL means copy_process(), we can avoid
* uprobe_apply(). current->mm must be probed and we can rely
#include <linux/kvm_para.h>
#include <linux/perf_event.h>
-int watchdog_user_enabled = 1;
+/*
+ * The run state of the lockup detectors is controlled by the content of the
+ * 'watchdog_enabled' variable. Each lockup detector has its dedicated bit -
+ * bit 0 for the hard lockup detector and bit 1 for the soft lockup detector.
+ *
+ * 'watchdog_user_enabled', 'nmi_watchdog_enabled' and 'soft_watchdog_enabled'
+ * are variables that are only used as an 'interface' between the parameters
+ * in /proc/sys/kernel and the internal state bits in 'watchdog_enabled'. The
+ * 'watchdog_thresh' variable is handled differently because its value is not
+ * boolean, and the lockup detectors are 'suspended' while 'watchdog_thresh'
+ * is equal zero.
+ */
+#define NMI_WATCHDOG_ENABLED_BIT 0
+#define SOFT_WATCHDOG_ENABLED_BIT 1
+#define NMI_WATCHDOG_ENABLED (1 << NMI_WATCHDOG_ENABLED_BIT)
+#define SOFT_WATCHDOG_ENABLED (1 << SOFT_WATCHDOG_ENABLED_BIT)
+
+#ifdef CONFIG_HARDLOCKUP_DETECTOR
+static unsigned long __read_mostly watchdog_enabled = SOFT_WATCHDOG_ENABLED|NMI_WATCHDOG_ENABLED;
+#else
+static unsigned long __read_mostly watchdog_enabled = SOFT_WATCHDOG_ENABLED;
+#endif
+int __read_mostly nmi_watchdog_enabled;
+int __read_mostly soft_watchdog_enabled;
+int __read_mostly watchdog_user_enabled;
int __read_mostly watchdog_thresh = 10;
+
#ifdef CONFIG_SMP
int __read_mostly sysctl_softlockup_all_cpu_backtrace;
#else
#ifdef CONFIG_HARDLOCKUP_DETECTOR
static int hardlockup_panic =
CONFIG_BOOTPARAM_HARDLOCKUP_PANIC_VALUE;
-
-static bool hardlockup_detector_enabled = true;
/*
* We may not want to enable hard lockup detection by default in all cases,
* for example when running the kernel as a guest on a hypervisor. In these
* kernel command line parameters are parsed, because otherwise it is not
* possible to override this in hardlockup_panic_setup().
*/
-void watchdog_enable_hardlockup_detector(bool val)
-{
- hardlockup_detector_enabled = val;
-}
-
-bool watchdog_hardlockup_detector_is_enabled(void)
+void hardlockup_detector_disable(void)
{
- return hardlockup_detector_enabled;
+ watchdog_enabled &= ~NMI_WATCHDOG_ENABLED;
}
static int __init hardlockup_panic_setup(char *str)
else if (!strncmp(str, "nopanic", 7))
hardlockup_panic = 0;
else if (!strncmp(str, "0", 1))
- watchdog_user_enabled = 0;
- else if (!strncmp(str, "1", 1) || !strncmp(str, "2", 1)) {
- /*
- * Setting 'nmi_watchdog=1' or 'nmi_watchdog=2' (legacy option)
- * has the same effect.
- */
- watchdog_user_enabled = 1;
- watchdog_enable_hardlockup_detector(true);
- }
+ watchdog_enabled &= ~NMI_WATCHDOG_ENABLED;
+ else if (!strncmp(str, "1", 1))
+ watchdog_enabled |= NMI_WATCHDOG_ENABLED;
return 1;
}
__setup("nmi_watchdog=", hardlockup_panic_setup);
static int __init nowatchdog_setup(char *str)
{
- watchdog_user_enabled = 0;
+ watchdog_enabled = 0;
return 1;
}
__setup("nowatchdog", nowatchdog_setup);
-/* deprecated */
static int __init nosoftlockup_setup(char *str)
{
- watchdog_user_enabled = 0;
+ watchdog_enabled &= ~SOFT_WATCHDOG_ENABLED;
return 1;
}
__setup("nosoftlockup", nosoftlockup_setup);
-/* */
+
#ifdef CONFIG_SMP
static int __init softlockup_all_cpu_backtrace_setup(char *str)
{
{
unsigned long now = get_timestamp();
- /* Warn about unreasonable delays: */
- if (time_after(now, touch_ts + get_softlockup_thresh()))
- return now - touch_ts;
-
+ if (watchdog_enabled & SOFT_WATCHDOG_ENABLED) {
+ /* Warn about unreasonable delays. */
+ if (time_after(now, touch_ts + get_softlockup_thresh()))
+ return now - touch_ts;
+ }
return 0;
}
__this_cpu_write(soft_lockup_hrtimer_cnt,
__this_cpu_read(hrtimer_interrupts));
__touch_watchdog();
+
+ /*
+ * watchdog_nmi_enable() clears the NMI_WATCHDOG_ENABLED bit in the
+ * failure path. Check for failures that can occur asynchronously -
+ * for example, when CPUs are on-lined - and shut down the hardware
+ * perf event on each CPU accordingly.
+ *
+ * The only non-obvious place this bit can be cleared is through
+ * watchdog_nmi_enable(), so a pr_info() is placed there. Placing a
+ * pr_info here would be too noisy as it would result in a message
+ * every few seconds if the hardlockup was disabled but the softlockup
+ * enabled.
+ */
+ if (!(watchdog_enabled & NMI_WATCHDOG_ENABLED))
+ watchdog_nmi_disable(cpu);
}
#ifdef CONFIG_HARDLOCKUP_DETECTOR
struct perf_event_attr *wd_attr;
struct perf_event *event = per_cpu(watchdog_ev, cpu);
- /*
- * Some kernels need to default hard lockup detection to
- * 'disabled', for example a guest on a hypervisor.
- */
- if (!watchdog_hardlockup_detector_is_enabled()) {
- event = ERR_PTR(-ENOENT);
- goto handle_err;
- }
+ /* nothing to do if the hard lockup detector is disabled */
+ if (!(watchdog_enabled & NMI_WATCHDOG_ENABLED))
+ goto out;
/* is it already setup and enabled? */
if (event && event->state > PERF_EVENT_STATE_OFF)
/* Try to register using hardware perf events */
event = perf_event_create_kernel_counter(wd_attr, cpu, NULL, watchdog_overflow_callback, NULL);
-handle_err:
/* save cpu0 error for future comparision */
if (cpu == 0 && IS_ERR(event))
cpu0_err = PTR_ERR(event);
goto out_save;
}
+ /*
+ * Disable the hard lockup detector if _any_ CPU fails to set up
+ * set up the hardware perf event. The watchdog() function checks
+ * the NMI_WATCHDOG_ENABLED bit periodically.
+ *
+ * The barriers are for syncing up watchdog_enabled across all the
+ * cpus, as clear_bit() does not use barriers.
+ */
+ smp_mb__before_atomic();
+ clear_bit(NMI_WATCHDOG_ENABLED_BIT, &watchdog_enabled);
+ smp_mb__after_atomic();
+
/* skip displaying the same error again */
if (cpu > 0 && (PTR_ERR(event) == cpu0_err))
return PTR_ERR(event);
else
pr_err("disabled (cpu%i): unable to create perf event: %ld\n",
cpu, PTR_ERR(event));
+
+ pr_info("Shutting down hard lockup detector on all cpus\n");
+
return PTR_ERR(event);
/* success path */
cpu0_err = 0;
}
}
+
+void watchdog_nmi_enable_all(void)
+{
+ int cpu;
+
+ if (!watchdog_user_enabled)
+ return;
+
+ get_online_cpus();
+ for_each_online_cpu(cpu)
+ watchdog_nmi_enable(cpu);
+ put_online_cpus();
+}
+
+void watchdog_nmi_disable_all(void)
+{
+ int cpu;
+
+ if (!watchdog_running)
+ return;
+
+ get_online_cpus();
+ for_each_online_cpu(cpu)
+ watchdog_nmi_disable(cpu);
+ put_online_cpus();
+}
#else
static int watchdog_nmi_enable(unsigned int cpu) { return 0; }
static void watchdog_nmi_disable(unsigned int cpu) { return; }
+void watchdog_nmi_enable_all(void) {}
+void watchdog_nmi_disable_all(void) {}
#endif /* CONFIG_HARDLOCKUP_DETECTOR */
static struct smp_hotplug_thread watchdog_threads = {
HRTIMER_MODE_REL_PINNED);
}
-static void update_timers(int cpu)
+static void update_watchdog(int cpu)
{
/*
* Make sure that perf event counter will adopt to a new
watchdog_nmi_enable(cpu);
}
-static void update_timers_all_cpus(void)
+static void update_watchdog_all_cpus(void)
{
int cpu;
get_online_cpus();
for_each_online_cpu(cpu)
- update_timers(cpu);
+ update_watchdog(cpu);
put_online_cpus();
}
-static int watchdog_enable_all_cpus(bool sample_period_changed)
+static int watchdog_enable_all_cpus(void)
{
int err = 0;
pr_err("Failed to create watchdog threads, disabled\n");
else
watchdog_running = 1;
- } else if (sample_period_changed) {
- update_timers_all_cpus();
+ } else {
+ /*
+ * Enable/disable the lockup detectors or
+ * change the sample period 'on the fly'.
+ */
+ update_watchdog_all_cpus();
}
return err;
}
/*
- * proc handler for /proc/sys/kernel/nmi_watchdog,watchdog_thresh
+ * Update the run state of the lockup detectors.
*/
+static int proc_watchdog_update(void)
+{
+ int err = 0;
-int proc_dowatchdog(struct ctl_table *table, int write,
- void __user *buffer, size_t *lenp, loff_t *ppos)
+ /*
+ * Watchdog threads won't be started if they are already active.
+ * The 'watchdog_running' variable in watchdog_*_all_cpus() takes
+ * care of this. If those threads are already active, the sample
+ * period will be updated and the lockup detectors will be enabled
+ * or disabled 'on the fly'.
+ */
+ if (watchdog_enabled && watchdog_thresh)
+ err = watchdog_enable_all_cpus();
+ else
+ watchdog_disable_all_cpus();
+
+ return err;
+
+}
+
+static DEFINE_MUTEX(watchdog_proc_mutex);
+
+/*
+ * common function for watchdog, nmi_watchdog and soft_watchdog parameter
+ *
+ * caller | table->data points to | 'which' contains the flag(s)
+ * -------------------|-----------------------|-----------------------------
+ * proc_watchdog | watchdog_user_enabled | NMI_WATCHDOG_ENABLED or'ed
+ * | | with SOFT_WATCHDOG_ENABLED
+ * -------------------|-----------------------|-----------------------------
+ * proc_nmi_watchdog | nmi_watchdog_enabled | NMI_WATCHDOG_ENABLED
+ * -------------------|-----------------------|-----------------------------
+ * proc_soft_watchdog | soft_watchdog_enabled | SOFT_WATCHDOG_ENABLED
+ */
+static int proc_watchdog_common(int which, struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp, loff_t *ppos)
{
- int err, old_thresh, old_enabled;
- bool old_hardlockup;
- static DEFINE_MUTEX(watchdog_proc_mutex);
+ int err, old, new;
+ int *watchdog_param = (int *)table->data;
mutex_lock(&watchdog_proc_mutex);
- old_thresh = ACCESS_ONCE(watchdog_thresh);
- old_enabled = ACCESS_ONCE(watchdog_user_enabled);
- old_hardlockup = watchdog_hardlockup_detector_is_enabled();
- err = proc_dointvec_minmax(table, write, buffer, lenp, ppos);
- if (err || !write)
- goto out;
-
- set_sample_period();
/*
- * Watchdog threads shouldn't be enabled if they are
- * disabled. The 'watchdog_running' variable check in
- * watchdog_*_all_cpus() function takes care of this.
+ * If the parameter is being read return the state of the corresponding
+ * bit(s) in 'watchdog_enabled', else update 'watchdog_enabled' and the
+ * run state of the lockup detectors.
*/
- if (watchdog_user_enabled && watchdog_thresh) {
+ if (!write) {
+ *watchdog_param = (watchdog_enabled & which) != 0;
+ err = proc_dointvec_minmax(table, write, buffer, lenp, ppos);
+ } else {
+ err = proc_dointvec_minmax(table, write, buffer, lenp, ppos);
+ if (err)
+ goto out;
+
/*
- * Prevent a change in watchdog_thresh accidentally overriding
- * the enablement of the hardlockup detector.
+ * There is a race window between fetching the current value
+ * from 'watchdog_enabled' and storing the new value. During
+ * this race window, watchdog_nmi_enable() can sneak in and
+ * clear the NMI_WATCHDOG_ENABLED bit in 'watchdog_enabled'.
+ * The 'cmpxchg' detects this race and the loop retries.
*/
- if (watchdog_user_enabled != old_enabled)
- watchdog_enable_hardlockup_detector(true);
- err = watchdog_enable_all_cpus(old_thresh != watchdog_thresh);
- } else
- watchdog_disable_all_cpus();
+ do {
+ old = watchdog_enabled;
+ /*
+ * If the parameter value is not zero set the
+ * corresponding bit(s), else clear it(them).
+ */
+ if (*watchdog_param)
+ new = old | which;
+ else
+ new = old & ~which;
+ } while (cmpxchg(&watchdog_enabled, old, new) != old);
- /* Restore old values on failure */
- if (err) {
- watchdog_thresh = old_thresh;
- watchdog_user_enabled = old_enabled;
- watchdog_enable_hardlockup_detector(old_hardlockup);
+ /*
+ * Update the run state of the lockup detectors.
+ * Restore 'watchdog_enabled' on failure.
+ */
+ err = proc_watchdog_update();
+ if (err)
+ watchdog_enabled = old;
}
out:
mutex_unlock(&watchdog_proc_mutex);
return err;
}
+
+/*
+ * /proc/sys/kernel/watchdog
+ */
+int proc_watchdog(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp, loff_t *ppos)
+{
+ return proc_watchdog_common(NMI_WATCHDOG_ENABLED|SOFT_WATCHDOG_ENABLED,
+ table, write, buffer, lenp, ppos);
+}
+
+/*
+ * /proc/sys/kernel/nmi_watchdog
+ */
+int proc_nmi_watchdog(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp, loff_t *ppos)
+{
+ return proc_watchdog_common(NMI_WATCHDOG_ENABLED,
+ table, write, buffer, lenp, ppos);
+}
+
+/*
+ * /proc/sys/kernel/soft_watchdog
+ */
+int proc_soft_watchdog(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp, loff_t *ppos)
+{
+ return proc_watchdog_common(SOFT_WATCHDOG_ENABLED,
+ table, write, buffer, lenp, ppos);
+}
+
+/*
+ * /proc/sys/kernel/watchdog_thresh
+ */
+int proc_watchdog_thresh(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp, loff_t *ppos)
+{
+ int err, old;
+
+ mutex_lock(&watchdog_proc_mutex);
+
+ old = ACCESS_ONCE(watchdog_thresh);
+ err = proc_dointvec_minmax(table, write, buffer, lenp, ppos);
+
+ if (err || !write)
+ goto out;
+
+ /*
+ * Update the sample period.
+ * Restore 'watchdog_thresh' on failure.
+ */
+ set_sample_period();
+ err = proc_watchdog_update();
+ if (err)
+ watchdog_thresh = old;
+out:
+ mutex_unlock(&watchdog_proc_mutex);
+ return err;
+}
#endif /* CONFIG_SYSCTL */
void __init lockup_detector_init(void)
{
set_sample_period();
- if (watchdog_user_enabled)
- watchdog_enable_all_cpus(false);
+ if (watchdog_enabled)
+ watchdog_enable_all_cpus();
}
/* see manage_workers() for details on the two manager mutexes */
struct mutex manager_arb; /* manager arbitration */
+ struct worker *manager; /* L: purely informational */
struct mutex attach_mutex; /* attach/detach exclusion */
struct list_head workers; /* A: attached workers */
struct completion *detach_completion; /* all workers detached */
*/
struct workqueue_struct {
struct list_head pwqs; /* WR: all pwqs of this wq */
- struct list_head list; /* PL: list of all workqueues */
+ struct list_head list; /* PR: list of all workqueues */
struct mutex mutex; /* protects this wq */
int work_color; /* WQ: current work color */
#endif
char name[WQ_NAME_LEN]; /* I: workqueue name */
+ /*
+ * Destruction of workqueue_struct is sched-RCU protected to allow
+ * walking the workqueues list without grabbing wq_pool_mutex.
+ * This is used to dump all workqueues from sysrq.
+ */
+ struct rcu_head rcu;
+
/* hot fields used during command issue, aligned to cacheline */
unsigned int flags ____cacheline_aligned; /* WQ: WQ_* flags */
struct pool_workqueue __percpu *cpu_pwqs; /* I: per-cpu pwqs */
static DEFINE_MUTEX(wq_pool_mutex); /* protects pools and workqueues list */
static DEFINE_SPINLOCK(wq_mayday_lock); /* protects wq->maydays list */
-static LIST_HEAD(workqueues); /* PL: list of all workqueues */
+static LIST_HEAD(workqueues); /* PR: list of all workqueues */
static bool workqueue_freezing; /* PL: have wqs started freezing? */
/* the per-cpu worker pools */
static int worker_thread(void *__worker);
static void copy_workqueue_attrs(struct workqueue_attrs *to,
const struct workqueue_attrs *from);
+static void workqueue_sysfs_unregister(struct workqueue_struct *wq);
#define CREATE_TRACE_POINTS
#include <trace/events/workqueue.h>
*/
if (!mutex_trylock(&pool->manager_arb))
return false;
+ pool->manager = worker;
maybe_create_worker(pool);
+ pool->manager = NULL;
mutex_unlock(&pool->manager_arb);
return true;
}
struct wq_barrier {
struct work_struct work;
struct completion done;
+ struct task_struct *task; /* purely informational */
};
static void wq_barrier_func(struct work_struct *work)
INIT_WORK_ONSTACK(&barr->work, wq_barrier_func);
__set_bit(WORK_STRUCT_PENDING_BIT, work_data_bits(&barr->work));
init_completion(&barr->done);
+ barr->task = current;
/*
* If @target is currently being executed, schedule the
}
EXPORT_SYMBOL_GPL(execute_in_process_context);
-#ifdef CONFIG_SYSFS
-/*
- * Workqueues with WQ_SYSFS flag set is visible to userland via
- * /sys/bus/workqueue/devices/WQ_NAME. All visible workqueues have the
- * following attributes.
- *
- * per_cpu RO bool : whether the workqueue is per-cpu or unbound
- * max_active RW int : maximum number of in-flight work items
- *
- * Unbound workqueues have the following extra attributes.
+/**
+ * free_workqueue_attrs - free a workqueue_attrs
+ * @attrs: workqueue_attrs to free
*
- * id RO int : the associated pool ID
- * nice RW int : nice value of the workers
- * cpumask RW mask : bitmask of allowed CPUs for the workers
+ * Undo alloc_workqueue_attrs().
*/
-struct wq_device {
- struct workqueue_struct *wq;
- struct device dev;
-};
-
-static struct workqueue_struct *dev_to_wq(struct device *dev)
+void free_workqueue_attrs(struct workqueue_attrs *attrs)
{
- struct wq_device *wq_dev = container_of(dev, struct wq_device, dev);
-
- return wq_dev->wq;
+ if (attrs) {
+ free_cpumask_var(attrs->cpumask);
+ kfree(attrs);
+ }
}
-static ssize_t per_cpu_show(struct device *dev, struct device_attribute *attr,
- char *buf)
+/**
+ * alloc_workqueue_attrs - allocate a workqueue_attrs
+ * @gfp_mask: allocation mask to use
+ *
+ * Allocate a new workqueue_attrs, initialize with default settings and
+ * return it.
+ *
+ * Return: The allocated new workqueue_attr on success. %NULL on failure.
+ */
+struct workqueue_attrs *alloc_workqueue_attrs(gfp_t gfp_mask)
{
- struct workqueue_struct *wq = dev_to_wq(dev);
+ struct workqueue_attrs *attrs;
- return scnprintf(buf, PAGE_SIZE, "%d\n", (bool)!(wq->flags & WQ_UNBOUND));
+ attrs = kzalloc(sizeof(*attrs), gfp_mask);
+ if (!attrs)
+ goto fail;
+ if (!alloc_cpumask_var(&attrs->cpumask, gfp_mask))
+ goto fail;
+
+ cpumask_copy(attrs->cpumask, cpu_possible_mask);
+ return attrs;
+fail:
+ free_workqueue_attrs(attrs);
+ return NULL;
}
-static DEVICE_ATTR_RO(per_cpu);
-static ssize_t max_active_show(struct device *dev,
- struct device_attribute *attr, char *buf)
+static void copy_workqueue_attrs(struct workqueue_attrs *to,
+ const struct workqueue_attrs *from)
{
- struct workqueue_struct *wq = dev_to_wq(dev);
-
- return scnprintf(buf, PAGE_SIZE, "%d\n", wq->saved_max_active);
+ to->nice = from->nice;
+ cpumask_copy(to->cpumask, from->cpumask);
+ /*
+ * Unlike hash and equality test, this function doesn't ignore
+ * ->no_numa as it is used for both pool and wq attrs. Instead,
+ * get_unbound_pool() explicitly clears ->no_numa after copying.
+ */
+ to->no_numa = from->no_numa;
}
-static ssize_t max_active_store(struct device *dev,
- struct device_attribute *attr, const char *buf,
- size_t count)
+/* hash value of the content of @attr */
+static u32 wqattrs_hash(const struct workqueue_attrs *attrs)
{
- struct workqueue_struct *wq = dev_to_wq(dev);
- int val;
-
- if (sscanf(buf, "%d", &val) != 1 || val <= 0)
- return -EINVAL;
+ u32 hash = 0;
- workqueue_set_max_active(wq, val);
- return count;
+ hash = jhash_1word(attrs->nice, hash);
+ hash = jhash(cpumask_bits(attrs->cpumask),
+ BITS_TO_LONGS(nr_cpumask_bits) * sizeof(long), hash);
+ return hash;
}
-static DEVICE_ATTR_RW(max_active);
-
-static struct attribute *wq_sysfs_attrs[] = {
- &dev_attr_per_cpu.attr,
- &dev_attr_max_active.attr,
- NULL,
-};
-ATTRIBUTE_GROUPS(wq_sysfs);
-static ssize_t wq_pool_ids_show(struct device *dev,
- struct device_attribute *attr, char *buf)
+/* content equality test */
+static bool wqattrs_equal(const struct workqueue_attrs *a,
+ const struct workqueue_attrs *b)
{
- struct workqueue_struct *wq = dev_to_wq(dev);
- const char *delim = "";
- int node, written = 0;
-
- rcu_read_lock_sched();
- for_each_node(node) {
- written += scnprintf(buf + written, PAGE_SIZE - written,
- "%s%d:%d", delim, node,
- unbound_pwq_by_node(wq, node)->pool->id);
- delim = " ";
- }
- written += scnprintf(buf + written, PAGE_SIZE - written, "\n");
- rcu_read_unlock_sched();
-
- return written;
+ if (a->nice != b->nice)
+ return false;
+ if (!cpumask_equal(a->cpumask, b->cpumask))
+ return false;
+ return true;
}
-static ssize_t wq_nice_show(struct device *dev, struct device_attribute *attr,
- char *buf)
+/**
+ * init_worker_pool - initialize a newly zalloc'd worker_pool
+ * @pool: worker_pool to initialize
+ *
+ * Initiailize a newly zalloc'd @pool. It also allocates @pool->attrs.
+ *
+ * Return: 0 on success, -errno on failure. Even on failure, all fields
+ * inside @pool proper are initialized and put_unbound_pool() can be called
+ * on @pool safely to release it.
+ */
+static int init_worker_pool(struct worker_pool *pool)
{
- struct workqueue_struct *wq = dev_to_wq(dev);
- int written;
+ spin_lock_init(&pool->lock);
+ pool->id = -1;
+ pool->cpu = -1;
+ pool->node = NUMA_NO_NODE;
+ pool->flags |= POOL_DISASSOCIATED;
+ INIT_LIST_HEAD(&pool->worklist);
+ INIT_LIST_HEAD(&pool->idle_list);
+ hash_init(pool->busy_hash);
- mutex_lock(&wq->mutex);
- written = scnprintf(buf, PAGE_SIZE, "%d\n", wq->unbound_attrs->nice);
- mutex_unlock(&wq->mutex);
+ init_timer_deferrable(&pool->idle_timer);
+ pool->idle_timer.function = idle_worker_timeout;
+ pool->idle_timer.data = (unsigned long)pool;
- return written;
-}
+ setup_timer(&pool->mayday_timer, pool_mayday_timeout,
+ (unsigned long)pool);
-/* prepare workqueue_attrs for sysfs store operations */
-static struct workqueue_attrs *wq_sysfs_prep_attrs(struct workqueue_struct *wq)
-{
- struct workqueue_attrs *attrs;
+ mutex_init(&pool->manager_arb);
+ mutex_init(&pool->attach_mutex);
+ INIT_LIST_HEAD(&pool->workers);
- attrs = alloc_workqueue_attrs(GFP_KERNEL);
- if (!attrs)
- return NULL;
+ ida_init(&pool->worker_ida);
+ INIT_HLIST_NODE(&pool->hash_node);
+ pool->refcnt = 1;
- mutex_lock(&wq->mutex);
- copy_workqueue_attrs(attrs, wq->unbound_attrs);
- mutex_unlock(&wq->mutex);
- return attrs;
+ /* shouldn't fail above this point */
+ pool->attrs = alloc_workqueue_attrs(GFP_KERNEL);
+ if (!pool->attrs)
+ return -ENOMEM;
+ return 0;
}
-static ssize_t wq_nice_store(struct device *dev, struct device_attribute *attr,
- const char *buf, size_t count)
+static void rcu_free_wq(struct rcu_head *rcu)
{
- struct workqueue_struct *wq = dev_to_wq(dev);
- struct workqueue_attrs *attrs;
- int ret;
-
- attrs = wq_sysfs_prep_attrs(wq);
- if (!attrs)
- return -ENOMEM;
+ struct workqueue_struct *wq =
+ container_of(rcu, struct workqueue_struct, rcu);
- if (sscanf(buf, "%d", &attrs->nice) == 1 &&
- attrs->nice >= MIN_NICE && attrs->nice <= MAX_NICE)
- ret = apply_workqueue_attrs(wq, attrs);
+ if (!(wq->flags & WQ_UNBOUND))
+ free_percpu(wq->cpu_pwqs);
else
- ret = -EINVAL;
+ free_workqueue_attrs(wq->unbound_attrs);
- free_workqueue_attrs(attrs);
- return ret ?: count;
+ kfree(wq->rescuer);
+ kfree(wq);
}
-static ssize_t wq_cpumask_show(struct device *dev,
- struct device_attribute *attr, char *buf)
+static void rcu_free_pool(struct rcu_head *rcu)
{
- struct workqueue_struct *wq = dev_to_wq(dev);
- int written;
+ struct worker_pool *pool = container_of(rcu, struct worker_pool, rcu);
- mutex_lock(&wq->mutex);
- written = scnprintf(buf, PAGE_SIZE, "%*pb\n",
- cpumask_pr_args(wq->unbound_attrs->cpumask));
- mutex_unlock(&wq->mutex);
- return written;
+ ida_destroy(&pool->worker_ida);
+ free_workqueue_attrs(pool->attrs);
+ kfree(pool);
}
-static ssize_t wq_cpumask_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t count)
+/**
+ * put_unbound_pool - put a worker_pool
+ * @pool: worker_pool to put
+ *
+ * Put @pool. If its refcnt reaches zero, it gets destroyed in sched-RCU
+ * safe manner. get_unbound_pool() calls this function on its failure path
+ * and this function should be able to release pools which went through,
+ * successfully or not, init_worker_pool().
+ *
+ * Should be called with wq_pool_mutex held.
+ */
+static void put_unbound_pool(struct worker_pool *pool)
{
- struct workqueue_struct *wq = dev_to_wq(dev);
- struct workqueue_attrs *attrs;
- int ret;
+ DECLARE_COMPLETION_ONSTACK(detach_completion);
+ struct worker *worker;
- attrs = wq_sysfs_prep_attrs(wq);
- if (!attrs)
- return -ENOMEM;
+ lockdep_assert_held(&wq_pool_mutex);
- ret = cpumask_parse(buf, attrs->cpumask);
- if (!ret)
- ret = apply_workqueue_attrs(wq, attrs);
+ if (--pool->refcnt)
+ return;
- free_workqueue_attrs(attrs);
- return ret ?: count;
-}
+ /* sanity checks */
+ if (WARN_ON(!(pool->cpu < 0)) ||
+ WARN_ON(!list_empty(&pool->worklist)))
+ return;
-static ssize_t wq_numa_show(struct device *dev, struct device_attribute *attr,
- char *buf)
-{
- struct workqueue_struct *wq = dev_to_wq(dev);
- int written;
-
- mutex_lock(&wq->mutex);
- written = scnprintf(buf, PAGE_SIZE, "%d\n",
- !wq->unbound_attrs->no_numa);
- mutex_unlock(&wq->mutex);
-
- return written;
-}
-
-static ssize_t wq_numa_store(struct device *dev, struct device_attribute *attr,
- const char *buf, size_t count)
-{
- struct workqueue_struct *wq = dev_to_wq(dev);
- struct workqueue_attrs *attrs;
- int v, ret;
-
- attrs = wq_sysfs_prep_attrs(wq);
- if (!attrs)
- return -ENOMEM;
+ /* release id and unhash */
+ if (pool->id >= 0)
+ idr_remove(&worker_pool_idr, pool->id);
+ hash_del(&pool->hash_node);
- ret = -EINVAL;
- if (sscanf(buf, "%d", &v) == 1) {
- attrs->no_numa = !v;
- ret = apply_workqueue_attrs(wq, attrs);
- }
+ /*
+ * Become the manager and destroy all workers. Grabbing
+ * manager_arb prevents @pool's workers from blocking on
+ * attach_mutex.
+ */
+ mutex_lock(&pool->manager_arb);
- free_workqueue_attrs(attrs);
- return ret ?: count;
-}
+ spin_lock_irq(&pool->lock);
+ while ((worker = first_idle_worker(pool)))
+ destroy_worker(worker);
+ WARN_ON(pool->nr_workers || pool->nr_idle);
+ spin_unlock_irq(&pool->lock);
-static struct device_attribute wq_sysfs_unbound_attrs[] = {
- __ATTR(pool_ids, 0444, wq_pool_ids_show, NULL),
- __ATTR(nice, 0644, wq_nice_show, wq_nice_store),
- __ATTR(cpumask, 0644, wq_cpumask_show, wq_cpumask_store),
- __ATTR(numa, 0644, wq_numa_show, wq_numa_store),
- __ATTR_NULL,
-};
+ mutex_lock(&pool->attach_mutex);
+ if (!list_empty(&pool->workers))
+ pool->detach_completion = &detach_completion;
+ mutex_unlock(&pool->attach_mutex);
-static struct bus_type wq_subsys = {
- .name = "workqueue",
- .dev_groups = wq_sysfs_groups,
-};
+ if (pool->detach_completion)
+ wait_for_completion(pool->detach_completion);
-static int __init wq_sysfs_init(void)
-{
- return subsys_virtual_register(&wq_subsys, NULL);
-}
-core_initcall(wq_sysfs_init);
+ mutex_unlock(&pool->manager_arb);
-static void wq_device_release(struct device *dev)
-{
- struct wq_device *wq_dev = container_of(dev, struct wq_device, dev);
+ /* shut down the timers */
+ del_timer_sync(&pool->idle_timer);
+ del_timer_sync(&pool->mayday_timer);
- kfree(wq_dev);
+ /* sched-RCU protected to allow dereferences from get_work_pool() */
+ call_rcu_sched(&pool->rcu, rcu_free_pool);
}
/**
- * workqueue_sysfs_register - make a workqueue visible in sysfs
- * @wq: the workqueue to register
+ * get_unbound_pool - get a worker_pool with the specified attributes
+ * @attrs: the attributes of the worker_pool to get
*
- * Expose @wq in sysfs under /sys/bus/workqueue/devices.
- * alloc_workqueue*() automatically calls this function if WQ_SYSFS is set
- * which is the preferred method.
+ * Obtain a worker_pool which has the same attributes as @attrs, bump the
+ * reference count and return it. If there already is a matching
+ * worker_pool, it will be used; otherwise, this function attempts to
+ * create a new one.
*
- * Workqueue user should use this function directly iff it wants to apply
- * workqueue_attrs before making the workqueue visible in sysfs; otherwise,
- * apply_workqueue_attrs() may race against userland updating the
- * attributes.
+ * Should be called with wq_pool_mutex held.
*
- * Return: 0 on success, -errno on failure.
+ * Return: On success, a worker_pool with the same attributes as @attrs.
+ * On failure, %NULL.
*/
-int workqueue_sysfs_register(struct workqueue_struct *wq)
+static struct worker_pool *get_unbound_pool(const struct workqueue_attrs *attrs)
{
- struct wq_device *wq_dev;
- int ret;
+ u32 hash = wqattrs_hash(attrs);
+ struct worker_pool *pool;
+ int node;
- /*
- * Adjusting max_active or creating new pwqs by applyting
- * attributes breaks ordering guarantee. Disallow exposing ordered
- * workqueues.
- */
- if (WARN_ON(wq->flags & __WQ_ORDERED))
- return -EINVAL;
+ lockdep_assert_held(&wq_pool_mutex);
- wq->wq_dev = wq_dev = kzalloc(sizeof(*wq_dev), GFP_KERNEL);
- if (!wq_dev)
- return -ENOMEM;
+ /* do we already have a matching pool? */
+ hash_for_each_possible(unbound_pool_hash, pool, hash_node, hash) {
+ if (wqattrs_equal(pool->attrs, attrs)) {
+ pool->refcnt++;
+ return pool;
+ }
+ }
- wq_dev->wq = wq;
- wq_dev->dev.bus = &wq_subsys;
- wq_dev->dev.init_name = wq->name;
- wq_dev->dev.release = wq_device_release;
+ /* nope, create a new one */
+ pool = kzalloc(sizeof(*pool), GFP_KERNEL);
+ if (!pool || init_worker_pool(pool) < 0)
+ goto fail;
+
+ lockdep_set_subclass(&pool->lock, 1); /* see put_pwq() */
+ copy_workqueue_attrs(pool->attrs, attrs);
/*
- * unbound_attrs are created separately. Suppress uevent until
- * everything is ready.
+ * no_numa isn't a worker_pool attribute, always clear it. See
+ * 'struct workqueue_attrs' comments for detail.
*/
- dev_set_uevent_suppress(&wq_dev->dev, true);
-
- ret = device_register(&wq_dev->dev);
- if (ret) {
- kfree(wq_dev);
- wq->wq_dev = NULL;
- return ret;
- }
-
- if (wq->flags & WQ_UNBOUND) {
- struct device_attribute *attr;
+ pool->attrs->no_numa = false;
- for (attr = wq_sysfs_unbound_attrs; attr->attr.name; attr++) {
- ret = device_create_file(&wq_dev->dev, attr);
- if (ret) {
- device_unregister(&wq_dev->dev);
- wq->wq_dev = NULL;
- return ret;
+ /* if cpumask is contained inside a NUMA node, we belong to that node */
+ if (wq_numa_enabled) {
+ for_each_node(node) {
+ if (cpumask_subset(pool->attrs->cpumask,
+ wq_numa_possible_cpumask[node])) {
+ pool->node = node;
+ break;
}
}
}
- dev_set_uevent_suppress(&wq_dev->dev, false);
- kobject_uevent(&wq_dev->dev.kobj, KOBJ_ADD);
- return 0;
-}
+ if (worker_pool_assign_id(pool) < 0)
+ goto fail;
-/**
- * workqueue_sysfs_unregister - undo workqueue_sysfs_register()
- * @wq: the workqueue to unregister
- *
- * If @wq is registered to sysfs by workqueue_sysfs_register(), unregister.
- */
-static void workqueue_sysfs_unregister(struct workqueue_struct *wq)
-{
- struct wq_device *wq_dev = wq->wq_dev;
+ /* create and start the initial worker */
+ if (!create_worker(pool))
+ goto fail;
- if (!wq->wq_dev)
- return;
+ /* install */
+ hash_add(unbound_pool_hash, &pool->hash_node, hash);
- wq->wq_dev = NULL;
- device_unregister(&wq_dev->dev);
+ return pool;
+fail:
+ if (pool)
+ put_unbound_pool(pool);
+ return NULL;
}
-#else /* CONFIG_SYSFS */
-static void workqueue_sysfs_unregister(struct workqueue_struct *wq) { }
-#endif /* CONFIG_SYSFS */
-/**
- * free_workqueue_attrs - free a workqueue_attrs
- * @attrs: workqueue_attrs to free
- *
- * Undo alloc_workqueue_attrs().
- */
-void free_workqueue_attrs(struct workqueue_attrs *attrs)
+static void rcu_free_pwq(struct rcu_head *rcu)
{
- if (attrs) {
- free_cpumask_var(attrs->cpumask);
- kfree(attrs);
- }
+ kmem_cache_free(pwq_cache,
+ container_of(rcu, struct pool_workqueue, rcu));
}
-/**
- * alloc_workqueue_attrs - allocate a workqueue_attrs
- * @gfp_mask: allocation mask to use
- *
- * Allocate a new workqueue_attrs, initialize with default settings and
- * return it.
- *
- * Return: The allocated new workqueue_attr on success. %NULL on failure.
+/*
+ * Scheduled on system_wq by put_pwq() when an unbound pwq hits zero refcnt
+ * and needs to be destroyed.
*/
-struct workqueue_attrs *alloc_workqueue_attrs(gfp_t gfp_mask)
+static void pwq_unbound_release_workfn(struct work_struct *work)
{
- struct workqueue_attrs *attrs;
+ struct pool_workqueue *pwq = container_of(work, struct pool_workqueue,
+ unbound_release_work);
+ struct workqueue_struct *wq = pwq->wq;
+ struct worker_pool *pool = pwq->pool;
+ bool is_last;
- attrs = kzalloc(sizeof(*attrs), gfp_mask);
- if (!attrs)
- goto fail;
- if (!alloc_cpumask_var(&attrs->cpumask, gfp_mask))
- goto fail;
+ if (WARN_ON_ONCE(!(wq->flags & WQ_UNBOUND)))
+ return;
- cpumask_copy(attrs->cpumask, cpu_possible_mask);
- return attrs;
-fail:
- free_workqueue_attrs(attrs);
- return NULL;
-}
+ mutex_lock(&wq->mutex);
+ list_del_rcu(&pwq->pwqs_node);
+ is_last = list_empty(&wq->pwqs);
+ mutex_unlock(&wq->mutex);
+
+ mutex_lock(&wq_pool_mutex);
+ put_unbound_pool(pool);
+ mutex_unlock(&wq_pool_mutex);
+
+ call_rcu_sched(&pwq->rcu, rcu_free_pwq);
-static void copy_workqueue_attrs(struct workqueue_attrs *to,
- const struct workqueue_attrs *from)
-{
- to->nice = from->nice;
- cpumask_copy(to->cpumask, from->cpumask);
/*
- * Unlike hash and equality test, this function doesn't ignore
- * ->no_numa as it is used for both pool and wq attrs. Instead,
- * get_unbound_pool() explicitly clears ->no_numa after copying.
+ * If we're the last pwq going away, @wq is already dead and no one
+ * is gonna access it anymore. Schedule RCU free.
*/
- to->no_numa = from->no_numa;
-}
-
-/* hash value of the content of @attr */
-static u32 wqattrs_hash(const struct workqueue_attrs *attrs)
-{
- u32 hash = 0;
-
- hash = jhash_1word(attrs->nice, hash);
- hash = jhash(cpumask_bits(attrs->cpumask),
- BITS_TO_LONGS(nr_cpumask_bits) * sizeof(long), hash);
- return hash;
-}
-
-/* content equality test */
-static bool wqattrs_equal(const struct workqueue_attrs *a,
- const struct workqueue_attrs *b)
-{
- if (a->nice != b->nice)
- return false;
- if (!cpumask_equal(a->cpumask, b->cpumask))
- return false;
- return true;
-}
-
-/**
- * init_worker_pool - initialize a newly zalloc'd worker_pool
- * @pool: worker_pool to initialize
- *
- * Initiailize a newly zalloc'd @pool. It also allocates @pool->attrs.
- *
- * Return: 0 on success, -errno on failure. Even on failure, all fields
- * inside @pool proper are initialized and put_unbound_pool() can be called
- * on @pool safely to release it.
- */
-static int init_worker_pool(struct worker_pool *pool)
-{
- spin_lock_init(&pool->lock);
- pool->id = -1;
- pool->cpu = -1;
- pool->node = NUMA_NO_NODE;
- pool->flags |= POOL_DISASSOCIATED;
- INIT_LIST_HEAD(&pool->worklist);
- INIT_LIST_HEAD(&pool->idle_list);
- hash_init(pool->busy_hash);
-
- init_timer_deferrable(&pool->idle_timer);
- pool->idle_timer.function = idle_worker_timeout;
- pool->idle_timer.data = (unsigned long)pool;
-
- setup_timer(&pool->mayday_timer, pool_mayday_timeout,
- (unsigned long)pool);
-
- mutex_init(&pool->manager_arb);
- mutex_init(&pool->attach_mutex);
- INIT_LIST_HEAD(&pool->workers);
-
- ida_init(&pool->worker_ida);
- INIT_HLIST_NODE(&pool->hash_node);
- pool->refcnt = 1;
-
- /* shouldn't fail above this point */
- pool->attrs = alloc_workqueue_attrs(GFP_KERNEL);
- if (!pool->attrs)
- return -ENOMEM;
- return 0;
-}
-
-static void rcu_free_pool(struct rcu_head *rcu)
-{
- struct worker_pool *pool = container_of(rcu, struct worker_pool, rcu);
-
- ida_destroy(&pool->worker_ida);
- free_workqueue_attrs(pool->attrs);
- kfree(pool);
-}
-
-/**
- * put_unbound_pool - put a worker_pool
- * @pool: worker_pool to put
- *
- * Put @pool. If its refcnt reaches zero, it gets destroyed in sched-RCU
- * safe manner. get_unbound_pool() calls this function on its failure path
- * and this function should be able to release pools which went through,
- * successfully or not, init_worker_pool().
- *
- * Should be called with wq_pool_mutex held.
- */
-static void put_unbound_pool(struct worker_pool *pool)
-{
- DECLARE_COMPLETION_ONSTACK(detach_completion);
- struct worker *worker;
-
- lockdep_assert_held(&wq_pool_mutex);
-
- if (--pool->refcnt)
- return;
-
- /* sanity checks */
- if (WARN_ON(!(pool->cpu < 0)) ||
- WARN_ON(!list_empty(&pool->worklist)))
- return;
-
- /* release id and unhash */
- if (pool->id >= 0)
- idr_remove(&worker_pool_idr, pool->id);
- hash_del(&pool->hash_node);
-
- /*
- * Become the manager and destroy all workers. Grabbing
- * manager_arb prevents @pool's workers from blocking on
- * attach_mutex.
- */
- mutex_lock(&pool->manager_arb);
-
- spin_lock_irq(&pool->lock);
- while ((worker = first_idle_worker(pool)))
- destroy_worker(worker);
- WARN_ON(pool->nr_workers || pool->nr_idle);
- spin_unlock_irq(&pool->lock);
-
- mutex_lock(&pool->attach_mutex);
- if (!list_empty(&pool->workers))
- pool->detach_completion = &detach_completion;
- mutex_unlock(&pool->attach_mutex);
-
- if (pool->detach_completion)
- wait_for_completion(pool->detach_completion);
-
- mutex_unlock(&pool->manager_arb);
-
- /* shut down the timers */
- del_timer_sync(&pool->idle_timer);
- del_timer_sync(&pool->mayday_timer);
-
- /* sched-RCU protected to allow dereferences from get_work_pool() */
- call_rcu_sched(&pool->rcu, rcu_free_pool);
-}
-
-/**
- * get_unbound_pool - get a worker_pool with the specified attributes
- * @attrs: the attributes of the worker_pool to get
- *
- * Obtain a worker_pool which has the same attributes as @attrs, bump the
- * reference count and return it. If there already is a matching
- * worker_pool, it will be used; otherwise, this function attempts to
- * create a new one.
- *
- * Should be called with wq_pool_mutex held.
- *
- * Return: On success, a worker_pool with the same attributes as @attrs.
- * On failure, %NULL.
- */
-static struct worker_pool *get_unbound_pool(const struct workqueue_attrs *attrs)
-{
- u32 hash = wqattrs_hash(attrs);
- struct worker_pool *pool;
- int node;
-
- lockdep_assert_held(&wq_pool_mutex);
-
- /* do we already have a matching pool? */
- hash_for_each_possible(unbound_pool_hash, pool, hash_node, hash) {
- if (wqattrs_equal(pool->attrs, attrs)) {
- pool->refcnt++;
- return pool;
- }
- }
-
- /* nope, create a new one */
- pool = kzalloc(sizeof(*pool), GFP_KERNEL);
- if (!pool || init_worker_pool(pool) < 0)
- goto fail;
-
- lockdep_set_subclass(&pool->lock, 1); /* see put_pwq() */
- copy_workqueue_attrs(pool->attrs, attrs);
-
- /*
- * no_numa isn't a worker_pool attribute, always clear it. See
- * 'struct workqueue_attrs' comments for detail.
- */
- pool->attrs->no_numa = false;
-
- /* if cpumask is contained inside a NUMA node, we belong to that node */
- if (wq_numa_enabled) {
- for_each_node(node) {
- if (cpumask_subset(pool->attrs->cpumask,
- wq_numa_possible_cpumask[node])) {
- pool->node = node;
- break;
- }
- }
- }
-
- if (worker_pool_assign_id(pool) < 0)
- goto fail;
-
- /* create and start the initial worker */
- if (!create_worker(pool))
- goto fail;
-
- /* install */
- hash_add(unbound_pool_hash, &pool->hash_node, hash);
-
- return pool;
-fail:
- if (pool)
- put_unbound_pool(pool);
- return NULL;
-}
-
-static void rcu_free_pwq(struct rcu_head *rcu)
-{
- kmem_cache_free(pwq_cache,
- container_of(rcu, struct pool_workqueue, rcu));
-}
-
-/*
- * Scheduled on system_wq by put_pwq() when an unbound pwq hits zero refcnt
- * and needs to be destroyed.
- */
-static void pwq_unbound_release_workfn(struct work_struct *work)
-{
- struct pool_workqueue *pwq = container_of(work, struct pool_workqueue,
- unbound_release_work);
- struct workqueue_struct *wq = pwq->wq;
- struct worker_pool *pool = pwq->pool;
- bool is_last;
-
- if (WARN_ON_ONCE(!(wq->flags & WQ_UNBOUND)))
- return;
-
- mutex_lock(&wq->mutex);
- list_del_rcu(&pwq->pwqs_node);
- is_last = list_empty(&wq->pwqs);
- mutex_unlock(&wq->mutex);
-
- mutex_lock(&wq_pool_mutex);
- put_unbound_pool(pool);
- mutex_unlock(&wq_pool_mutex);
-
- call_rcu_sched(&pwq->rcu, rcu_free_pwq);
-
- /*
- * If we're the last pwq going away, @wq is already dead and no one
- * is gonna access it anymore. Free it.
- */
- if (is_last) {
- free_workqueue_attrs(wq->unbound_attrs);
- kfree(wq);
- }
+ if (is_last)
+ call_rcu_sched(&wq->rcu, rcu_free_wq);
}
/**
pwq_adjust_max_active(pwq);
mutex_unlock(&wq->mutex);
- list_add(&wq->list, &workqueues);
+ list_add_tail_rcu(&wq->list, &workqueues);
mutex_unlock(&wq_pool_mutex);
* flushing is complete in case freeze races us.
*/
mutex_lock(&wq_pool_mutex);
- list_del_init(&wq->list);
+ list_del_rcu(&wq->list);
mutex_unlock(&wq_pool_mutex);
workqueue_sysfs_unregister(wq);
- if (wq->rescuer) {
+ if (wq->rescuer)
kthread_stop(wq->rescuer->task);
- kfree(wq->rescuer);
- wq->rescuer = NULL;
- }
if (!(wq->flags & WQ_UNBOUND)) {
/*
* The base ref is never dropped on per-cpu pwqs. Directly
- * free the pwqs and wq.
+ * schedule RCU free.
*/
- free_percpu(wq->cpu_pwqs);
- kfree(wq);
+ call_rcu_sched(&wq->rcu, rcu_free_wq);
} else {
/*
* We're the sole accessor of @wq at this point. Directly
}
}
-/*
- * CPU hotplug.
- *
- * There are two challenges in supporting CPU hotplug. Firstly, there
- * are a lot of assumptions on strong associations among work, pwq and
- * pool which make migrating pending and scheduled works very
- * difficult to implement without impacting hot paths. Secondly,
+static void pr_cont_pool_info(struct worker_pool *pool)
+{
+ pr_cont(" cpus=%*pbl", nr_cpumask_bits, pool->attrs->cpumask);
+ if (pool->node != NUMA_NO_NODE)
+ pr_cont(" node=%d", pool->node);
+ pr_cont(" flags=0x%x nice=%d", pool->flags, pool->attrs->nice);
+}
+
+static void pr_cont_work(bool comma, struct work_struct *work)
+{
+ if (work->func == wq_barrier_func) {
+ struct wq_barrier *barr;
+
+ barr = container_of(work, struct wq_barrier, work);
+
+ pr_cont("%s BAR(%d)", comma ? "," : "",
+ task_pid_nr(barr->task));
+ } else {
+ pr_cont("%s %pf", comma ? "," : "", work->func);
+ }
+}
+
+static void show_pwq(struct pool_workqueue *pwq)
+{
+ struct worker_pool *pool = pwq->pool;
+ struct work_struct *work;
+ struct worker *worker;
+ bool has_in_flight = false, has_pending = false;
+ int bkt;
+
+ pr_info(" pwq %d:", pool->id);
+ pr_cont_pool_info(pool);
+
+ pr_cont(" active=%d/%d%s\n", pwq->nr_active, pwq->max_active,
+ !list_empty(&pwq->mayday_node) ? " MAYDAY" : "");
+
+ hash_for_each(pool->busy_hash, bkt, worker, hentry) {
+ if (worker->current_pwq == pwq) {
+ has_in_flight = true;
+ break;
+ }
+ }
+ if (has_in_flight) {
+ bool comma = false;
+
+ pr_info(" in-flight:");
+ hash_for_each(pool->busy_hash, bkt, worker, hentry) {
+ if (worker->current_pwq != pwq)
+ continue;
+
+ pr_cont("%s %d%s:%pf", comma ? "," : "",
+ task_pid_nr(worker->task),
+ worker == pwq->wq->rescuer ? "(RESCUER)" : "",
+ worker->current_func);
+ list_for_each_entry(work, &worker->scheduled, entry)
+ pr_cont_work(false, work);
+ comma = true;
+ }
+ pr_cont("\n");
+ }
+
+ list_for_each_entry(work, &pool->worklist, entry) {
+ if (get_work_pwq(work) == pwq) {
+ has_pending = true;
+ break;
+ }
+ }
+ if (has_pending) {
+ bool comma = false;
+
+ pr_info(" pending:");
+ list_for_each_entry(work, &pool->worklist, entry) {
+ if (get_work_pwq(work) != pwq)
+ continue;
+
+ pr_cont_work(comma, work);
+ comma = !(*work_data_bits(work) & WORK_STRUCT_LINKED);
+ }
+ pr_cont("\n");
+ }
+
+ if (!list_empty(&pwq->delayed_works)) {
+ bool comma = false;
+
+ pr_info(" delayed:");
+ list_for_each_entry(work, &pwq->delayed_works, entry) {
+ pr_cont_work(comma, work);
+ comma = !(*work_data_bits(work) & WORK_STRUCT_LINKED);
+ }
+ pr_cont("\n");
+ }
+}
+
+/**
+ * show_workqueue_state - dump workqueue state
+ *
+ * Called from a sysrq handler and prints out all busy workqueues and
+ * pools.
+ */
+void show_workqueue_state(void)
+{
+ struct workqueue_struct *wq;
+ struct worker_pool *pool;
+ unsigned long flags;
+ int pi;
+
+ rcu_read_lock_sched();
+
+ pr_info("Showing busy workqueues and worker pools:\n");
+
+ list_for_each_entry_rcu(wq, &workqueues, list) {
+ struct pool_workqueue *pwq;
+ bool idle = true;
+
+ for_each_pwq(pwq, wq) {
+ if (pwq->nr_active || !list_empty(&pwq->delayed_works)) {
+ idle = false;
+ break;
+ }
+ }
+ if (idle)
+ continue;
+
+ pr_info("workqueue %s: flags=0x%x\n", wq->name, wq->flags);
+
+ for_each_pwq(pwq, wq) {
+ spin_lock_irqsave(&pwq->pool->lock, flags);
+ if (pwq->nr_active || !list_empty(&pwq->delayed_works))
+ show_pwq(pwq);
+ spin_unlock_irqrestore(&pwq->pool->lock, flags);
+ }
+ }
+
+ for_each_pool(pool, pi) {
+ struct worker *worker;
+ bool first = true;
+
+ spin_lock_irqsave(&pool->lock, flags);
+ if (pool->nr_workers == pool->nr_idle)
+ goto next_pool;
+
+ pr_info("pool %d:", pool->id);
+ pr_cont_pool_info(pool);
+ pr_cont(" workers=%d", pool->nr_workers);
+ if (pool->manager)
+ pr_cont(" manager: %d",
+ task_pid_nr(pool->manager->task));
+ list_for_each_entry(worker, &pool->idle_list, entry) {
+ pr_cont(" %s%d", first ? "idle: " : "",
+ task_pid_nr(worker->task));
+ first = false;
+ }
+ pr_cont("\n");
+ next_pool:
+ spin_unlock_irqrestore(&pool->lock, flags);
+ }
+
+ rcu_read_unlock_sched();
+}
+
+/*
+ * CPU hotplug.
+ *
+ * There are two challenges in supporting CPU hotplug. Firstly, there
+ * are a lot of assumptions on strong associations among work, pwq and
+ * pool which make migrating pending and scheduled works very
+ * difficult to implement without impacting hot paths. Secondly,
* worker pools serve mix of short, long and very long running works making
* blocked draining impractical.
*
else if (pool->cpu < 0)
restore_unbound_workers_cpumask(pool, cpu);
- mutex_unlock(&pool->attach_mutex);
- }
+ mutex_unlock(&pool->attach_mutex);
+ }
+
+ /* update NUMA affinity of unbound workqueues */
+ list_for_each_entry(wq, &workqueues, list)
+ wq_update_unbound_numa(wq, cpu, true);
+
+ mutex_unlock(&wq_pool_mutex);
+ break;
+ }
+ return NOTIFY_OK;
+}
+
+/*
+ * Workqueues should be brought down after normal priority CPU notifiers.
+ * This will be registered as low priority CPU notifier.
+ */
+static int workqueue_cpu_down_callback(struct notifier_block *nfb,
+ unsigned long action,
+ void *hcpu)
+{
+ int cpu = (unsigned long)hcpu;
+ struct work_struct unbind_work;
+ struct workqueue_struct *wq;
+
+ switch (action & ~CPU_TASKS_FROZEN) {
+ case CPU_DOWN_PREPARE:
+ /* unbinding per-cpu workers should happen on the local CPU */
+ INIT_WORK_ONSTACK(&unbind_work, wq_unbind_fn);
+ queue_work_on(cpu, system_highpri_wq, &unbind_work);
+
+ /* update NUMA affinity of unbound workqueues */
+ mutex_lock(&wq_pool_mutex);
+ list_for_each_entry(wq, &workqueues, list)
+ wq_update_unbound_numa(wq, cpu, false);
+ mutex_unlock(&wq_pool_mutex);
+
+ /* wait for per-cpu unbinding to finish */
+ flush_work(&unbind_work);
+ destroy_work_on_stack(&unbind_work);
+ break;
+ }
+ return NOTIFY_OK;
+}
+
+#ifdef CONFIG_SMP
+
+struct work_for_cpu {
+ struct work_struct work;
+ long (*fn)(void *);
+ void *arg;
+ long ret;
+};
+
+static void work_for_cpu_fn(struct work_struct *work)
+{
+ struct work_for_cpu *wfc = container_of(work, struct work_for_cpu, work);
+
+ wfc->ret = wfc->fn(wfc->arg);
+}
+
+/**
+ * work_on_cpu - run a function in user context on a particular cpu
+ * @cpu: the cpu to run on
+ * @fn: the function to run
+ * @arg: the function arg
+ *
+ * It is up to the caller to ensure that the cpu doesn't go offline.
+ * The caller must not hold any locks which would prevent @fn from completing.
+ *
+ * Return: The value @fn returns.
+ */
+long work_on_cpu(int cpu, long (*fn)(void *), void *arg)
+{
+ struct work_for_cpu wfc = { .fn = fn, .arg = arg };
+
+ INIT_WORK_ONSTACK(&wfc.work, work_for_cpu_fn);
+ schedule_work_on(cpu, &wfc.work);
+ flush_work(&wfc.work);
+ destroy_work_on_stack(&wfc.work);
+ return wfc.ret;
+}
+EXPORT_SYMBOL_GPL(work_on_cpu);
+#endif /* CONFIG_SMP */
+
+#ifdef CONFIG_FREEZER
+
+/**
+ * freeze_workqueues_begin - begin freezing workqueues
+ *
+ * Start freezing workqueues. After this function returns, all freezable
+ * workqueues will queue new works to their delayed_works list instead of
+ * pool->worklist.
+ *
+ * CONTEXT:
+ * Grabs and releases wq_pool_mutex, wq->mutex and pool->lock's.
+ */
+void freeze_workqueues_begin(void)
+{
+ struct workqueue_struct *wq;
+ struct pool_workqueue *pwq;
+
+ mutex_lock(&wq_pool_mutex);
+
+ WARN_ON_ONCE(workqueue_freezing);
+ workqueue_freezing = true;
+
+ list_for_each_entry(wq, &workqueues, list) {
+ mutex_lock(&wq->mutex);
+ for_each_pwq(pwq, wq)
+ pwq_adjust_max_active(pwq);
+ mutex_unlock(&wq->mutex);
+ }
+
+ mutex_unlock(&wq_pool_mutex);
+}
+
+/**
+ * freeze_workqueues_busy - are freezable workqueues still busy?
+ *
+ * Check whether freezing is complete. This function must be called
+ * between freeze_workqueues_begin() and thaw_workqueues().
+ *
+ * CONTEXT:
+ * Grabs and releases wq_pool_mutex.
+ *
+ * Return:
+ * %true if some freezable workqueues are still busy. %false if freezing
+ * is complete.
+ */
+bool freeze_workqueues_busy(void)
+{
+ bool busy = false;
+ struct workqueue_struct *wq;
+ struct pool_workqueue *pwq;
+
+ mutex_lock(&wq_pool_mutex);
+
+ WARN_ON_ONCE(!workqueue_freezing);
+
+ list_for_each_entry(wq, &workqueues, list) {
+ if (!(wq->flags & WQ_FREEZABLE))
+ continue;
+ /*
+ * nr_active is monotonically decreasing. It's safe
+ * to peek without lock.
+ */
+ rcu_read_lock_sched();
+ for_each_pwq(pwq, wq) {
+ WARN_ON_ONCE(pwq->nr_active < 0);
+ if (pwq->nr_active) {
+ busy = true;
+ rcu_read_unlock_sched();
+ goto out_unlock;
+ }
+ }
+ rcu_read_unlock_sched();
+ }
+out_unlock:
+ mutex_unlock(&wq_pool_mutex);
+ return busy;
+}
+
+/**
+ * thaw_workqueues - thaw workqueues
+ *
+ * Thaw workqueues. Normal queueing is restored and all collected
+ * frozen works are transferred to their respective pool worklists.
+ *
+ * CONTEXT:
+ * Grabs and releases wq_pool_mutex, wq->mutex and pool->lock's.
+ */
+void thaw_workqueues(void)
+{
+ struct workqueue_struct *wq;
+ struct pool_workqueue *pwq;
+
+ mutex_lock(&wq_pool_mutex);
+
+ if (!workqueue_freezing)
+ goto out_unlock;
+
+ workqueue_freezing = false;
+
+ /* restore max_active and repopulate worklist */
+ list_for_each_entry(wq, &workqueues, list) {
+ mutex_lock(&wq->mutex);
+ for_each_pwq(pwq, wq)
+ pwq_adjust_max_active(pwq);
+ mutex_unlock(&wq->mutex);
+ }
+
+out_unlock:
+ mutex_unlock(&wq_pool_mutex);
+}
+#endif /* CONFIG_FREEZER */
+
+#ifdef CONFIG_SYSFS
+/*
+ * Workqueues with WQ_SYSFS flag set is visible to userland via
+ * /sys/bus/workqueue/devices/WQ_NAME. All visible workqueues have the
+ * following attributes.
+ *
+ * per_cpu RO bool : whether the workqueue is per-cpu or unbound
+ * max_active RW int : maximum number of in-flight work items
+ *
+ * Unbound workqueues have the following extra attributes.
+ *
+ * id RO int : the associated pool ID
+ * nice RW int : nice value of the workers
+ * cpumask RW mask : bitmask of allowed CPUs for the workers
+ */
+struct wq_device {
+ struct workqueue_struct *wq;
+ struct device dev;
+};
+
+static struct workqueue_struct *dev_to_wq(struct device *dev)
+{
+ struct wq_device *wq_dev = container_of(dev, struct wq_device, dev);
+
+ return wq_dev->wq;
+}
+
+static ssize_t per_cpu_show(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ struct workqueue_struct *wq = dev_to_wq(dev);
+
+ return scnprintf(buf, PAGE_SIZE, "%d\n", (bool)!(wq->flags & WQ_UNBOUND));
+}
+static DEVICE_ATTR_RO(per_cpu);
+
+static ssize_t max_active_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct workqueue_struct *wq = dev_to_wq(dev);
+
+ return scnprintf(buf, PAGE_SIZE, "%d\n", wq->saved_max_active);
+}
+
+static ssize_t max_active_store(struct device *dev,
+ struct device_attribute *attr, const char *buf,
+ size_t count)
+{
+ struct workqueue_struct *wq = dev_to_wq(dev);
+ int val;
+
+ if (sscanf(buf, "%d", &val) != 1 || val <= 0)
+ return -EINVAL;
+
+ workqueue_set_max_active(wq, val);
+ return count;
+}
+static DEVICE_ATTR_RW(max_active);
+
+static struct attribute *wq_sysfs_attrs[] = {
+ &dev_attr_per_cpu.attr,
+ &dev_attr_max_active.attr,
+ NULL,
+};
+ATTRIBUTE_GROUPS(wq_sysfs);
+
+static ssize_t wq_pool_ids_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct workqueue_struct *wq = dev_to_wq(dev);
+ const char *delim = "";
+ int node, written = 0;
+
+ rcu_read_lock_sched();
+ for_each_node(node) {
+ written += scnprintf(buf + written, PAGE_SIZE - written,
+ "%s%d:%d", delim, node,
+ unbound_pwq_by_node(wq, node)->pool->id);
+ delim = " ";
+ }
+ written += scnprintf(buf + written, PAGE_SIZE - written, "\n");
+ rcu_read_unlock_sched();
+
+ return written;
+}
+
+static ssize_t wq_nice_show(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ struct workqueue_struct *wq = dev_to_wq(dev);
+ int written;
+
+ mutex_lock(&wq->mutex);
+ written = scnprintf(buf, PAGE_SIZE, "%d\n", wq->unbound_attrs->nice);
+ mutex_unlock(&wq->mutex);
+
+ return written;
+}
+
+/* prepare workqueue_attrs for sysfs store operations */
+static struct workqueue_attrs *wq_sysfs_prep_attrs(struct workqueue_struct *wq)
+{
+ struct workqueue_attrs *attrs;
+
+ attrs = alloc_workqueue_attrs(GFP_KERNEL);
+ if (!attrs)
+ return NULL;
+
+ mutex_lock(&wq->mutex);
+ copy_workqueue_attrs(attrs, wq->unbound_attrs);
+ mutex_unlock(&wq->mutex);
+ return attrs;
+}
+
+static ssize_t wq_nice_store(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct workqueue_struct *wq = dev_to_wq(dev);
+ struct workqueue_attrs *attrs;
+ int ret;
+
+ attrs = wq_sysfs_prep_attrs(wq);
+ if (!attrs)
+ return -ENOMEM;
+
+ if (sscanf(buf, "%d", &attrs->nice) == 1 &&
+ attrs->nice >= MIN_NICE && attrs->nice <= MAX_NICE)
+ ret = apply_workqueue_attrs(wq, attrs);
+ else
+ ret = -EINVAL;
+
+ free_workqueue_attrs(attrs);
+ return ret ?: count;
+}
+
+static ssize_t wq_cpumask_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct workqueue_struct *wq = dev_to_wq(dev);
+ int written;
+
+ mutex_lock(&wq->mutex);
+ written = scnprintf(buf, PAGE_SIZE, "%*pb\n",
+ cpumask_pr_args(wq->unbound_attrs->cpumask));
+ mutex_unlock(&wq->mutex);
+ return written;
+}
+
+static ssize_t wq_cpumask_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct workqueue_struct *wq = dev_to_wq(dev);
+ struct workqueue_attrs *attrs;
+ int ret;
+
+ attrs = wq_sysfs_prep_attrs(wq);
+ if (!attrs)
+ return -ENOMEM;
+
+ ret = cpumask_parse(buf, attrs->cpumask);
+ if (!ret)
+ ret = apply_workqueue_attrs(wq, attrs);
+
+ free_workqueue_attrs(attrs);
+ return ret ?: count;
+}
+
+static ssize_t wq_numa_show(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ struct workqueue_struct *wq = dev_to_wq(dev);
+ int written;
- /* update NUMA affinity of unbound workqueues */
- list_for_each_entry(wq, &workqueues, list)
- wq_update_unbound_numa(wq, cpu, true);
+ mutex_lock(&wq->mutex);
+ written = scnprintf(buf, PAGE_SIZE, "%d\n",
+ !wq->unbound_attrs->no_numa);
+ mutex_unlock(&wq->mutex);
- mutex_unlock(&wq_pool_mutex);
- break;
- }
- return NOTIFY_OK;
+ return written;
}
-/*
- * Workqueues should be brought down after normal priority CPU notifiers.
- * This will be registered as low priority CPU notifier.
- */
-static int workqueue_cpu_down_callback(struct notifier_block *nfb,
- unsigned long action,
- void *hcpu)
+static ssize_t wq_numa_store(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
{
- int cpu = (unsigned long)hcpu;
- struct work_struct unbind_work;
- struct workqueue_struct *wq;
-
- switch (action & ~CPU_TASKS_FROZEN) {
- case CPU_DOWN_PREPARE:
- /* unbinding per-cpu workers should happen on the local CPU */
- INIT_WORK_ONSTACK(&unbind_work, wq_unbind_fn);
- queue_work_on(cpu, system_highpri_wq, &unbind_work);
+ struct workqueue_struct *wq = dev_to_wq(dev);
+ struct workqueue_attrs *attrs;
+ int v, ret;
- /* update NUMA affinity of unbound workqueues */
- mutex_lock(&wq_pool_mutex);
- list_for_each_entry(wq, &workqueues, list)
- wq_update_unbound_numa(wq, cpu, false);
- mutex_unlock(&wq_pool_mutex);
+ attrs = wq_sysfs_prep_attrs(wq);
+ if (!attrs)
+ return -ENOMEM;
- /* wait for per-cpu unbinding to finish */
- flush_work(&unbind_work);
- destroy_work_on_stack(&unbind_work);
- break;
+ ret = -EINVAL;
+ if (sscanf(buf, "%d", &v) == 1) {
+ attrs->no_numa = !v;
+ ret = apply_workqueue_attrs(wq, attrs);
}
- return NOTIFY_OK;
+
+ free_workqueue_attrs(attrs);
+ return ret ?: count;
}
-#ifdef CONFIG_SMP
+static struct device_attribute wq_sysfs_unbound_attrs[] = {
+ __ATTR(pool_ids, 0444, wq_pool_ids_show, NULL),
+ __ATTR(nice, 0644, wq_nice_show, wq_nice_store),
+ __ATTR(cpumask, 0644, wq_cpumask_show, wq_cpumask_store),
+ __ATTR(numa, 0644, wq_numa_show, wq_numa_store),
+ __ATTR_NULL,
+};
-struct work_for_cpu {
- struct work_struct work;
- long (*fn)(void *);
- void *arg;
- long ret;
+static struct bus_type wq_subsys = {
+ .name = "workqueue",
+ .dev_groups = wq_sysfs_groups,
};
-static void work_for_cpu_fn(struct work_struct *work)
+static int __init wq_sysfs_init(void)
{
- struct work_for_cpu *wfc = container_of(work, struct work_for_cpu, work);
-
- wfc->ret = wfc->fn(wfc->arg);
+ return subsys_virtual_register(&wq_subsys, NULL);
}
+core_initcall(wq_sysfs_init);
-/**
- * work_on_cpu - run a function in user context on a particular cpu
- * @cpu: the cpu to run on
- * @fn: the function to run
- * @arg: the function arg
- *
- * It is up to the caller to ensure that the cpu doesn't go offline.
- * The caller must not hold any locks which would prevent @fn from completing.
- *
- * Return: The value @fn returns.
- */
-long work_on_cpu(int cpu, long (*fn)(void *), void *arg)
+static void wq_device_release(struct device *dev)
{
- struct work_for_cpu wfc = { .fn = fn, .arg = arg };
+ struct wq_device *wq_dev = container_of(dev, struct wq_device, dev);
- INIT_WORK_ONSTACK(&wfc.work, work_for_cpu_fn);
- schedule_work_on(cpu, &wfc.work);
- flush_work(&wfc.work);
- destroy_work_on_stack(&wfc.work);
- return wfc.ret;
+ kfree(wq_dev);
}
-EXPORT_SYMBOL_GPL(work_on_cpu);
-#endif /* CONFIG_SMP */
-
-#ifdef CONFIG_FREEZER
/**
- * freeze_workqueues_begin - begin freezing workqueues
+ * workqueue_sysfs_register - make a workqueue visible in sysfs
+ * @wq: the workqueue to register
*
- * Start freezing workqueues. After this function returns, all freezable
- * workqueues will queue new works to their delayed_works list instead of
- * pool->worklist.
+ * Expose @wq in sysfs under /sys/bus/workqueue/devices.
+ * alloc_workqueue*() automatically calls this function if WQ_SYSFS is set
+ * which is the preferred method.
*
- * CONTEXT:
- * Grabs and releases wq_pool_mutex, wq->mutex and pool->lock's.
+ * Workqueue user should use this function directly iff it wants to apply
+ * workqueue_attrs before making the workqueue visible in sysfs; otherwise,
+ * apply_workqueue_attrs() may race against userland updating the
+ * attributes.
+ *
+ * Return: 0 on success, -errno on failure.
*/
-void freeze_workqueues_begin(void)
+int workqueue_sysfs_register(struct workqueue_struct *wq)
{
- struct workqueue_struct *wq;
- struct pool_workqueue *pwq;
-
- mutex_lock(&wq_pool_mutex);
+ struct wq_device *wq_dev;
+ int ret;
- WARN_ON_ONCE(workqueue_freezing);
- workqueue_freezing = true;
+ /*
+ * Adjusting max_active or creating new pwqs by applyting
+ * attributes breaks ordering guarantee. Disallow exposing ordered
+ * workqueues.
+ */
+ if (WARN_ON(wq->flags & __WQ_ORDERED))
+ return -EINVAL;
- list_for_each_entry(wq, &workqueues, list) {
- mutex_lock(&wq->mutex);
- for_each_pwq(pwq, wq)
- pwq_adjust_max_active(pwq);
- mutex_unlock(&wq->mutex);
- }
+ wq->wq_dev = wq_dev = kzalloc(sizeof(*wq_dev), GFP_KERNEL);
+ if (!wq_dev)
+ return -ENOMEM;
- mutex_unlock(&wq_pool_mutex);
-}
+ wq_dev->wq = wq;
+ wq_dev->dev.bus = &wq_subsys;
+ wq_dev->dev.init_name = wq->name;
+ wq_dev->dev.release = wq_device_release;
-/**
- * freeze_workqueues_busy - are freezable workqueues still busy?
- *
- * Check whether freezing is complete. This function must be called
- * between freeze_workqueues_begin() and thaw_workqueues().
- *
- * CONTEXT:
- * Grabs and releases wq_pool_mutex.
- *
- * Return:
- * %true if some freezable workqueues are still busy. %false if freezing
- * is complete.
- */
-bool freeze_workqueues_busy(void)
-{
- bool busy = false;
- struct workqueue_struct *wq;
- struct pool_workqueue *pwq;
+ /*
+ * unbound_attrs are created separately. Suppress uevent until
+ * everything is ready.
+ */
+ dev_set_uevent_suppress(&wq_dev->dev, true);
- mutex_lock(&wq_pool_mutex);
+ ret = device_register(&wq_dev->dev);
+ if (ret) {
+ kfree(wq_dev);
+ wq->wq_dev = NULL;
+ return ret;
+ }
- WARN_ON_ONCE(!workqueue_freezing);
+ if (wq->flags & WQ_UNBOUND) {
+ struct device_attribute *attr;
- list_for_each_entry(wq, &workqueues, list) {
- if (!(wq->flags & WQ_FREEZABLE))
- continue;
- /*
- * nr_active is monotonically decreasing. It's safe
- * to peek without lock.
- */
- rcu_read_lock_sched();
- for_each_pwq(pwq, wq) {
- WARN_ON_ONCE(pwq->nr_active < 0);
- if (pwq->nr_active) {
- busy = true;
- rcu_read_unlock_sched();
- goto out_unlock;
+ for (attr = wq_sysfs_unbound_attrs; attr->attr.name; attr++) {
+ ret = device_create_file(&wq_dev->dev, attr);
+ if (ret) {
+ device_unregister(&wq_dev->dev);
+ wq->wq_dev = NULL;
+ return ret;
}
}
- rcu_read_unlock_sched();
}
-out_unlock:
- mutex_unlock(&wq_pool_mutex);
- return busy;
+
+ dev_set_uevent_suppress(&wq_dev->dev, false);
+ kobject_uevent(&wq_dev->dev.kobj, KOBJ_ADD);
+ return 0;
}
/**
- * thaw_workqueues - thaw workqueues
- *
- * Thaw workqueues. Normal queueing is restored and all collected
- * frozen works are transferred to their respective pool worklists.
+ * workqueue_sysfs_unregister - undo workqueue_sysfs_register()
+ * @wq: the workqueue to unregister
*
- * CONTEXT:
- * Grabs and releases wq_pool_mutex, wq->mutex and pool->lock's.
+ * If @wq is registered to sysfs by workqueue_sysfs_register(), unregister.
*/
-void thaw_workqueues(void)
+static void workqueue_sysfs_unregister(struct workqueue_struct *wq)
{
- struct workqueue_struct *wq;
- struct pool_workqueue *pwq;
-
- mutex_lock(&wq_pool_mutex);
-
- if (!workqueue_freezing)
- goto out_unlock;
-
- workqueue_freezing = false;
+ struct wq_device *wq_dev = wq->wq_dev;
- /* restore max_active and repopulate worklist */
- list_for_each_entry(wq, &workqueues, list) {
- mutex_lock(&wq->mutex);
- for_each_pwq(pwq, wq)
- pwq_adjust_max_active(pwq);
- mutex_unlock(&wq->mutex);
- }
+ if (!wq->wq_dev)
+ return;
-out_unlock:
- mutex_unlock(&wq_pool_mutex);
+ wq->wq_dev = NULL;
+ device_unregister(&wq_dev->dev);
}
-#endif /* CONFIG_FREEZER */
+#else /* CONFIG_SYSFS */
+static void workqueue_sysfs_unregister(struct workqueue_struct *wq) { }
+#endif /* CONFIG_SYSFS */
static void __init wq_numa_init(void)
{
data corruption or a sporadic crash at a later stage once the region
is examined. The runtime overhead introduced is minimal.
+config DEBUG_TIMEKEEPING
+ bool "Enable extra timekeeping sanity checking"
+ help
+ This option will enable additional timekeeping sanity checks
+ which may be helpful when diagnosing issues where timekeeping
+ problems are suspected.
+
+ This may include checks in the timekeeping hotpaths, so this
+ option may have a (very small) performance impact to some
+ workloads.
+
+ If unsure, say N.
+
config TIMER_STATS
bool "Collect kernel timers statistics"
depends on DEBUG_KERNEL && PROC_FS
menu "RCU Debugging"
config PROVE_RCU
- bool "RCU debugging: prove RCU correctness"
- depends on PROVE_LOCKING
- default n
- help
- This feature enables lockdep extensions that check for correct
- use of RCU APIs. This is currently under development. Say Y
- if you want to debug RCU usage or help work on the PROVE_RCU
- feature.
-
- Say N if you are unsure.
+ def_bool PROVE_LOCKING
config PROVE_RCU_REPEATEDLY
bool "RCU debugging: don't disable PROVE_RCU on first splat"
Say N here if you want the RCU torture tests to start only
after being manually enabled via /proc.
+config RCU_TORTURE_TEST_SLOW_INIT
+ bool "Slow down RCU grace-period initialization to expose races"
+ depends on RCU_TORTURE_TEST
+ help
+ This option makes grace-period initialization block for a
+ few jiffies between initializing each pair of consecutive
+ rcu_node structures. This helps to expose races involving
+ grace-period initialization, in other words, it makes your
+ kernel less stable. It can also greatly increase grace-period
+ latency, especially on systems with large numbers of CPUs.
+ This is useful when torture-testing RCU, but in almost no
+ other circumstance.
+
+ Say Y here if you want your system to crash and hang more often.
+ Say N if you want a sane system.
+
+config RCU_TORTURE_TEST_SLOW_INIT_DELAY
+ int "How much to slow down RCU grace-period initialization"
+ range 0 5
+ default 3
+ help
+ This option specifies the number of jiffies to wait between
+ each rcu_node structure initialization.
+
config RCU_CPU_STALL_TIMEOUT
int "RCU CPU stall timeout in seconds"
depends on RCU_STALL_COMMON
If unsure, say N.
+config MEMTEST
+ bool "Memtest"
+ depends on HAVE_MEMBLOCK
+ ---help---
+ This option adds a kernel parameter 'memtest', which allows memtest
+ to be set.
+ memtest=0, mean disabled; -- default
+ memtest=1, mean do 1 test pattern;
+ ...
+ memtest=17, mean do 17 test patterns.
+ If you are unsure how to answer this question, answer N.
+
source "samples/Kconfig"
source "lib/Kconfig.kgdb"
* by the book 'Hacker's Delight'. The original source and full proof
* can be found here and is available for use without restriction.
*
- * 'http://www.hackersdelight.org/HDcode/newCode/divDouble.c.txt'
+ * 'http://www.hackersdelight.org/hdcodetxt/divDouble.c.txt'
*/
#ifndef div64_u64
u64 div64_u64(u64 dividend, u64 divisor)
#include <asm/cacheflush.h>
#include <asm/pgtable.h>
+#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
+static int __read_mostly ioremap_pud_capable;
+static int __read_mostly ioremap_pmd_capable;
+static int __read_mostly ioremap_huge_disabled;
+
+static int __init set_nohugeiomap(char *str)
+{
+ ioremap_huge_disabled = 1;
+ return 0;
+}
+early_param("nohugeiomap", set_nohugeiomap);
+
+void __init ioremap_huge_init(void)
+{
+ if (!ioremap_huge_disabled) {
+ if (arch_ioremap_pud_supported())
+ ioremap_pud_capable = 1;
+ if (arch_ioremap_pmd_supported())
+ ioremap_pmd_capable = 1;
+ }
+}
+
+static inline int ioremap_pud_enabled(void)
+{
+ return ioremap_pud_capable;
+}
+
+static inline int ioremap_pmd_enabled(void)
+{
+ return ioremap_pmd_capable;
+}
+
+#else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
+static inline int ioremap_pud_enabled(void) { return 0; }
+static inline int ioremap_pmd_enabled(void) { return 0; }
+#endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
+
static int ioremap_pte_range(pmd_t *pmd, unsigned long addr,
unsigned long end, phys_addr_t phys_addr, pgprot_t prot)
{
return -ENOMEM;
do {
next = pmd_addr_end(addr, end);
+
+ if (ioremap_pmd_enabled() &&
+ ((next - addr) == PMD_SIZE) &&
+ IS_ALIGNED(phys_addr + addr, PMD_SIZE)) {
+ if (pmd_set_huge(pmd, phys_addr + addr, prot))
+ continue;
+ }
+
if (ioremap_pte_range(pmd, addr, next, phys_addr + addr, prot))
return -ENOMEM;
} while (pmd++, addr = next, addr != end);
return -ENOMEM;
do {
next = pud_addr_end(addr, end);
+
+ if (ioremap_pud_enabled() &&
+ ((next - addr) == PUD_SIZE) &&
+ IS_ALIGNED(phys_addr + addr, PUD_SIZE)) {
+ if (pud_set_huge(pud, phys_addr + addr, prot))
+ continue;
+ }
+
if (ioremap_pmd_range(pud, addr, next, phys_addr + addr, prot))
return -ENOMEM;
} while (pud++, addr = next, addr != end);
}
EXPORT_SYMBOL(iov_iter_fault_in_readable);
+/*
+ * Fault in one or more iovecs of the given iov_iter, to a maximum length of
+ * bytes. For each iovec, fault in each page that constitutes the iovec.
+ *
+ * Return 0 on success, or non-zero if the memory could not be accessed (i.e.
+ * because it is an invalid address).
+ */
+int iov_iter_fault_in_multipages_readable(struct iov_iter *i, size_t bytes)
+{
+ size_t skip = i->iov_offset;
+ const struct iovec *iov;
+ int err;
+ struct iovec v;
+
+ if (!(i->type & (ITER_BVEC|ITER_KVEC))) {
+ iterate_iovec(i, bytes, v, iov, skip, ({
+ err = fault_in_multipages_readable(v.iov_base,
+ v.iov_len);
+ if (unlikely(err))
+ return err;
+ 0;}))
+ }
+ return 0;
+}
+EXPORT_SYMBOL(iov_iter_fault_in_multipages_readable);
+
void iov_iter_init(struct iov_iter *i, int direction,
const struct iovec *iov, unsigned long nr_segs,
size_t count)
flags);
}
EXPORT_SYMBOL(dup_iter);
+
+int import_iovec(int type, const struct iovec __user * uvector,
+ unsigned nr_segs, unsigned fast_segs,
+ struct iovec **iov, struct iov_iter *i)
+{
+ ssize_t n;
+ struct iovec *p;
+ n = rw_copy_check_uvector(type, uvector, nr_segs, fast_segs,
+ *iov, &p);
+ if (n < 0) {
+ if (p != *iov)
+ kfree(p);
+ *iov = NULL;
+ return n;
+ }
+ iov_iter_init(i, type, p, nr_segs, n);
+ *iov = p == *iov ? NULL : p;
+ return 0;
+}
+EXPORT_SYMBOL(import_iovec);
+
+#ifdef CONFIG_COMPAT
+#include <linux/compat.h>
+
+int compat_import_iovec(int type, const struct compat_iovec __user * uvector,
+ unsigned nr_segs, unsigned fast_segs,
+ struct iovec **iov, struct iov_iter *i)
+{
+ ssize_t n;
+ struct iovec *p;
+ n = compat_rw_copy_check_uvector(type, uvector, nr_segs, fast_segs,
+ *iov, &p);
+ if (n < 0) {
+ if (p != *iov)
+ kfree(p);
+ *iov = NULL;
+ return n;
+ }
+ iov_iter_init(i, type, p, nr_segs, n);
+ *iov = p == *iov ? NULL : p;
+ return 0;
+}
+#endif
+
+int import_single_range(int rw, void __user *buf, size_t len,
+ struct iovec *iov, struct iov_iter *i)
+{
+ if (len > MAX_RW_COUNT)
+ len = MAX_RW_COUNT;
+ if (unlikely(!access_ok(!rw, buf, len)))
+ return -EFAULT;
+
+ iov->iov_base = buf;
+ iov->iov_len = len;
+ iov_iter_init(i, rw, iov, 1, len);
+ return 0;
+}
*/
struct kobject *kobject_get(struct kobject *kobj)
{
- if (kobj)
+ if (kobj) {
+ if (!kobj->state_initialized)
+ WARN(1, KERN_WARNING "kobject: '%s' (%p): is not "
+ "initialized, yet kobject_get() is being "
+ "called.\n", kobject_name(kobj), kobj);
kref_get(&kobj->kref);
+ }
return kobj;
}
#define CMPXCHG_LOOP(CODE, SUCCESS) do { \
struct lockref old; \
BUILD_BUG_ON(sizeof(old) != 8); \
- old.lock_count = ACCESS_ONCE(lockref->lock_count); \
+ old.lock_count = READ_ONCE(lockref->lock_count); \
while (likely(arch_spin_value_unlocked(old.lock.rlock.raw_lock))) { \
struct lockref new = old, prev = old; \
CODE \
#include "lz4defs.h"
+static const int dec32table[] = {0, 3, 2, 3, 0, 0, 0, 0};
+#if LZ4_ARCH64
+static const int dec64table[] = {0, 0, 0, -1, 0, 1, 2, 3};
+#endif
+
static int lz4_uncompress(const char *source, char *dest, int osize)
{
const BYTE *ip = (const BYTE *) source;
BYTE *cpy;
unsigned token;
size_t length;
- size_t dec32table[] = {0, 3, 2, 3, 0, 0, 0, 0};
-#if LZ4_ARCH64
- size_t dec64table[] = {0, 0, 0, -1, 0, 1, 2, 3};
-#endif
while (1) {
/* copy repeated sequence */
if (unlikely((op - ref) < STEPSIZE)) {
#if LZ4_ARCH64
- size_t dec64 = dec64table[op - ref];
+ int dec64 = dec64table[op - ref];
#else
const int dec64 = 0;
#endif
BYTE * const oend = op + maxoutputsize;
BYTE *cpy;
- size_t dec32table[] = {0, 3, 2, 3, 0, 0, 0, 0};
-#if LZ4_ARCH64
- size_t dec64table[] = {0, 0, 0, -1, 0, 1, 2, 3};
-#endif
-
/* Main Loop */
while (ip < iend) {
/* copy repeated sequence */
if (unlikely((op - ref) < STEPSIZE)) {
#if LZ4_ARCH64
- size_t dec64 = dec64table[op - ref];
+ int dec64 = dec64table[op - ref];
#else
const int dec64 = 0;
#endif
processing calls such as dma_alloc_from_contiguous().
This option does not affect warning and error messages.
+config CMA_DEBUGFS
+ bool "CMA debugfs interface"
+ depends on CMA && DEBUG_FS
+ help
+ Turns on the DebugFS interface for CMA.
+
config CMA_AREAS
int "Maximum count of the CMA areas"
depends on CMA
obj-$(CONFIG_KASAN) += kasan/
obj-$(CONFIG_FAILSLAB) += failslab.o
obj-$(CONFIG_MEMORY_HOTPLUG) += memory_hotplug.o
+obj-$(CONFIG_MEMTEST) += memtest.o
obj-$(CONFIG_MIGRATION) += migrate.o
obj-$(CONFIG_QUICKLIST) += quicklist.o
obj-$(CONFIG_TRANSPARENT_HUGEPAGE) += huge_memory.o
obj-$(CONFIG_CMA) += cma.o
obj-$(CONFIG_MEMORY_BALLOON) += balloon_compaction.o
obj-$(CONFIG_PAGE_EXTENSION) += page_ext.o
+obj-$(CONFIG_CMA_DEBUGFS) += cma_debug.o
#include <linux/cleancache.h>
/*
- * cleancache_ops is set by cleancache_ops_register to contain the pointers
+ * cleancache_ops is set by cleancache_register_ops to contain the pointers
* to the cleancache "backend" implementation functions.
*/
static struct cleancache_ops *cleancache_ops __read_mostly;
static u64 cleancache_puts;
static u64 cleancache_invalidates;
-/*
- * When no backend is registered all calls to init_fs and init_shared_fs
- * are registered and fake poolids (FAKE_FS_POOLID_OFFSET or
- * FAKE_SHARED_FS_POOLID_OFFSET, plus offset in the respective array
- * [shared_|]fs_poolid_map) are given to the respective super block
- * (sb->cleancache_poolid) and no tmem_pools are created. When a backend
- * registers with cleancache the previous calls to init_fs and init_shared_fs
- * are executed to create tmem_pools and set the respective poolids. While no
- * backend is registered all "puts", "gets" and "flushes" are ignored or failed.
- */
-#define MAX_INITIALIZABLE_FS 32
-#define FAKE_FS_POOLID_OFFSET 1000
-#define FAKE_SHARED_FS_POOLID_OFFSET 2000
-
-#define FS_NO_BACKEND (-1)
-#define FS_UNKNOWN (-2)
-static int fs_poolid_map[MAX_INITIALIZABLE_FS];
-static int shared_fs_poolid_map[MAX_INITIALIZABLE_FS];
-static char *uuids[MAX_INITIALIZABLE_FS];
-/*
- * Mutex for the [shared_|]fs_poolid_map to guard against multiple threads
- * invoking umount (and ending in __cleancache_invalidate_fs) and also multiple
- * threads calling mount (and ending up in __cleancache_init_[shared|]fs).
- */
-static DEFINE_MUTEX(poolid_mutex);
-/*
- * When set to false (default) all calls to the cleancache functions, except
- * the __cleancache_invalidate_fs and __cleancache_init_[shared|]fs are guarded
- * by the if (!cleancache_ops) return. This means multiple threads (from
- * different filesystems) will be checking cleancache_ops. The usage of a
- * bool instead of a atomic_t or a bool guarded by a spinlock is OK - we are
- * OK if the time between the backend's have been initialized (and
- * cleancache_ops has been set to not NULL) and when the filesystems start
- * actually calling the backends. The inverse (when unloading) is obviously
- * not good - but this shim does not do that (yet).
- */
-
-/*
- * The backends and filesystems work all asynchronously. This is b/c the
- * backends can be built as modules.
- * The usual sequence of events is:
- * a) mount / -> __cleancache_init_fs is called. We set the
- * [shared_|]fs_poolid_map and uuids for.
- *
- * b). user does I/Os -> we call the rest of __cleancache_* functions
- * which return immediately as cleancache_ops is false.
- *
- * c). modprobe zcache -> cleancache_register_ops. We init the backend
- * and set cleancache_ops to true, and for any fs_poolid_map
- * (which is set by __cleancache_init_fs) we initialize the poolid.
- *
- * d). user does I/Os -> now that cleancache_ops is true all the
- * __cleancache_* functions can call the backend. They all check
- * that fs_poolid_map is valid and if so invoke the backend.
- *
- * e). umount / -> __cleancache_invalidate_fs, the fs_poolid_map is
- * reset (which is the second check in the __cleancache_* ops
- * to call the backend).
- *
- * The sequence of event could also be c), followed by a), and d). and e). The
- * c) would not happen anymore. There is also the chance of c), and one thread
- * doing a) + d), and another doing e). For that case we depend on the
- * filesystem calling __cleancache_invalidate_fs in the proper sequence (so
- * that it handles all I/Os before it invalidates the fs (which is last part
- * of unmounting process).
- *
- * Note: The acute reader will notice that there is no "rmmod zcache" case.
- * This is b/c the functionality for that is not yet implemented and when
- * done, will require some extra locking not yet devised.
- */
+static void cleancache_register_ops_sb(struct super_block *sb, void *unused)
+{
+ switch (sb->cleancache_poolid) {
+ case CLEANCACHE_NO_BACKEND:
+ __cleancache_init_fs(sb);
+ break;
+ case CLEANCACHE_NO_BACKEND_SHARED:
+ __cleancache_init_shared_fs(sb);
+ break;
+ }
+}
/*
- * Register operations for cleancache, returning previous thus allowing
- * detection of multiple backends and possible nesting.
+ * Register operations for cleancache. Returns 0 on success.
*/
-struct cleancache_ops *cleancache_register_ops(struct cleancache_ops *ops)
+int cleancache_register_ops(struct cleancache_ops *ops)
{
- struct cleancache_ops *old = cleancache_ops;
- int i;
+ if (cmpxchg(&cleancache_ops, NULL, ops))
+ return -EBUSY;
- mutex_lock(&poolid_mutex);
- for (i = 0; i < MAX_INITIALIZABLE_FS; i++) {
- if (fs_poolid_map[i] == FS_NO_BACKEND)
- fs_poolid_map[i] = ops->init_fs(PAGE_SIZE);
- if (shared_fs_poolid_map[i] == FS_NO_BACKEND)
- shared_fs_poolid_map[i] = ops->init_shared_fs
- (uuids[i], PAGE_SIZE);
- }
/*
- * We MUST set cleancache_ops _after_ we have called the backends
- * init_fs or init_shared_fs functions. Otherwise the compiler might
- * re-order where cleancache_ops is set in this function.
+ * A cleancache backend can be built as a module and hence loaded after
+ * a cleancache enabled filesystem has called cleancache_init_fs. To
+ * handle such a scenario, here we call ->init_fs or ->init_shared_fs
+ * for each active super block. To differentiate between local and
+ * shared filesystems, we temporarily initialize sb->cleancache_poolid
+ * to CLEANCACHE_NO_BACKEND or CLEANCACHE_NO_BACKEND_SHARED
+ * respectively in case there is no backend registered at the time
+ * cleancache_init_fs or cleancache_init_shared_fs is called.
+ *
+ * Since filesystems can be mounted concurrently with cleancache
+ * backend registration, we have to be careful to guarantee that all
+ * cleancache enabled filesystems that has been mounted by the time
+ * cleancache_register_ops is called has got and all mounted later will
+ * get cleancache_poolid. This is assured by the following statements
+ * tied together:
+ *
+ * a) iterate_supers skips only those super blocks that has started
+ * ->kill_sb
+ *
+ * b) if iterate_supers encounters a super block that has not finished
+ * ->mount yet, it waits until it is finished
+ *
+ * c) cleancache_init_fs is called from ->mount and
+ * cleancache_invalidate_fs is called from ->kill_sb
+ *
+ * d) we call iterate_supers after cleancache_ops has been set
+ *
+ * From a) it follows that if iterate_supers skips a super block, then
+ * either the super block is already dead, in which case we do not need
+ * to bother initializing cleancache for it, or it was mounted after we
+ * initiated iterate_supers. In the latter case, it must have seen
+ * cleancache_ops set according to d) and initialized cleancache from
+ * ->mount by itself according to c). This proves that we call
+ * ->init_fs at least once for each active super block.
+ *
+ * From b) and c) it follows that if iterate_supers encounters a super
+ * block that has already started ->init_fs, it will wait until ->mount
+ * and hence ->init_fs has finished, then check cleancache_poolid, see
+ * that it has already been set and therefore do nothing. This proves
+ * that we call ->init_fs no more than once for each super block.
+ *
+ * Combined together, the last two paragraphs prove the function
+ * correctness.
+ *
+ * Note that various cleancache callbacks may proceed before this
+ * function is called or even concurrently with it, but since
+ * CLEANCACHE_NO_BACKEND is negative, they will all result in a noop
+ * until the corresponding ->init_fs has been actually called and
+ * cleancache_ops has been set.
*/
- barrier();
- cleancache_ops = ops;
- mutex_unlock(&poolid_mutex);
- return old;
+ iterate_supers(cleancache_register_ops_sb, NULL);
+ return 0;
}
EXPORT_SYMBOL(cleancache_register_ops);
/* Called by a cleancache-enabled filesystem at time of mount */
void __cleancache_init_fs(struct super_block *sb)
{
- int i;
+ int pool_id = CLEANCACHE_NO_BACKEND;
- mutex_lock(&poolid_mutex);
- for (i = 0; i < MAX_INITIALIZABLE_FS; i++) {
- if (fs_poolid_map[i] == FS_UNKNOWN) {
- sb->cleancache_poolid = i + FAKE_FS_POOLID_OFFSET;
- if (cleancache_ops)
- fs_poolid_map[i] = cleancache_ops->init_fs(PAGE_SIZE);
- else
- fs_poolid_map[i] = FS_NO_BACKEND;
- break;
- }
+ if (cleancache_ops) {
+ pool_id = cleancache_ops->init_fs(PAGE_SIZE);
+ if (pool_id < 0)
+ pool_id = CLEANCACHE_NO_POOL;
}
- mutex_unlock(&poolid_mutex);
+ sb->cleancache_poolid = pool_id;
}
EXPORT_SYMBOL(__cleancache_init_fs);
/* Called by a cleancache-enabled clustered filesystem at time of mount */
-void __cleancache_init_shared_fs(char *uuid, struct super_block *sb)
+void __cleancache_init_shared_fs(struct super_block *sb)
{
- int i;
+ int pool_id = CLEANCACHE_NO_BACKEND_SHARED;
- mutex_lock(&poolid_mutex);
- for (i = 0; i < MAX_INITIALIZABLE_FS; i++) {
- if (shared_fs_poolid_map[i] == FS_UNKNOWN) {
- sb->cleancache_poolid = i + FAKE_SHARED_FS_POOLID_OFFSET;
- uuids[i] = uuid;
- if (cleancache_ops)
- shared_fs_poolid_map[i] = cleancache_ops->init_shared_fs
- (uuid, PAGE_SIZE);
- else
- shared_fs_poolid_map[i] = FS_NO_BACKEND;
- break;
- }
+ if (cleancache_ops) {
+ pool_id = cleancache_ops->init_shared_fs(sb->s_uuid, PAGE_SIZE);
+ if (pool_id < 0)
+ pool_id = CLEANCACHE_NO_POOL;
}
- mutex_unlock(&poolid_mutex);
+ sb->cleancache_poolid = pool_id;
}
EXPORT_SYMBOL(__cleancache_init_shared_fs);
return 0;
}
-/*
- * Returns a pool_id that is associated with a given fake poolid.
- */
-static int get_poolid_from_fake(int fake_pool_id)
-{
- if (fake_pool_id >= FAKE_SHARED_FS_POOLID_OFFSET)
- return shared_fs_poolid_map[fake_pool_id -
- FAKE_SHARED_FS_POOLID_OFFSET];
- else if (fake_pool_id >= FAKE_FS_POOLID_OFFSET)
- return fs_poolid_map[fake_pool_id - FAKE_FS_POOLID_OFFSET];
- return FS_NO_BACKEND;
-}
-
/*
* "Get" data from cleancache associated with the poolid/inode/index
* that were specified when the data was put to cleanache and, if
{
int ret = -1;
int pool_id;
- int fake_pool_id;
struct cleancache_filekey key = { .u.key = { 0 } };
if (!cleancache_ops) {
}
VM_BUG_ON_PAGE(!PageLocked(page), page);
- fake_pool_id = page->mapping->host->i_sb->cleancache_poolid;
- if (fake_pool_id < 0)
+ pool_id = page->mapping->host->i_sb->cleancache_poolid;
+ if (pool_id < 0)
goto out;
- pool_id = get_poolid_from_fake(fake_pool_id);
if (cleancache_get_key(page->mapping->host, &key) < 0)
goto out;
- if (pool_id >= 0)
- ret = cleancache_ops->get_page(pool_id,
- key, page->index, page);
+ ret = cleancache_ops->get_page(pool_id, key, page->index, page);
if (ret == 0)
cleancache_succ_gets++;
else
void __cleancache_put_page(struct page *page)
{
int pool_id;
- int fake_pool_id;
struct cleancache_filekey key = { .u.key = { 0 } };
if (!cleancache_ops) {
}
VM_BUG_ON_PAGE(!PageLocked(page), page);
- fake_pool_id = page->mapping->host->i_sb->cleancache_poolid;
- if (fake_pool_id < 0)
- return;
-
- pool_id = get_poolid_from_fake(fake_pool_id);
-
+ pool_id = page->mapping->host->i_sb->cleancache_poolid;
if (pool_id >= 0 &&
cleancache_get_key(page->mapping->host, &key) >= 0) {
cleancache_ops->put_page(pool_id, key, page->index, page);
struct page *page)
{
/* careful... page->mapping is NULL sometimes when this is called */
- int pool_id;
- int fake_pool_id = mapping->host->i_sb->cleancache_poolid;
+ int pool_id = mapping->host->i_sb->cleancache_poolid;
struct cleancache_filekey key = { .u.key = { 0 } };
if (!cleancache_ops)
return;
- if (fake_pool_id >= 0) {
- pool_id = get_poolid_from_fake(fake_pool_id);
- if (pool_id < 0)
- return;
-
+ if (pool_id >= 0) {
VM_BUG_ON_PAGE(!PageLocked(page), page);
if (cleancache_get_key(mapping->host, &key) >= 0) {
cleancache_ops->invalidate_page(pool_id,
*/
void __cleancache_invalidate_inode(struct address_space *mapping)
{
- int pool_id;
- int fake_pool_id = mapping->host->i_sb->cleancache_poolid;
+ int pool_id = mapping->host->i_sb->cleancache_poolid;
struct cleancache_filekey key = { .u.key = { 0 } };
if (!cleancache_ops)
return;
- if (fake_pool_id < 0)
- return;
-
- pool_id = get_poolid_from_fake(fake_pool_id);
-
if (pool_id >= 0 && cleancache_get_key(mapping->host, &key) >= 0)
cleancache_ops->invalidate_inode(pool_id, key);
}
*/
void __cleancache_invalidate_fs(struct super_block *sb)
{
- int index;
- int fake_pool_id = sb->cleancache_poolid;
- int old_poolid = fake_pool_id;
+ int pool_id;
- mutex_lock(&poolid_mutex);
- if (fake_pool_id >= FAKE_SHARED_FS_POOLID_OFFSET) {
- index = fake_pool_id - FAKE_SHARED_FS_POOLID_OFFSET;
- old_poolid = shared_fs_poolid_map[index];
- shared_fs_poolid_map[index] = FS_UNKNOWN;
- uuids[index] = NULL;
- } else if (fake_pool_id >= FAKE_FS_POOLID_OFFSET) {
- index = fake_pool_id - FAKE_FS_POOLID_OFFSET;
- old_poolid = fs_poolid_map[index];
- fs_poolid_map[index] = FS_UNKNOWN;
- }
- sb->cleancache_poolid = -1;
- if (cleancache_ops)
- cleancache_ops->invalidate_fs(old_poolid);
- mutex_unlock(&poolid_mutex);
+ pool_id = sb->cleancache_poolid;
+ sb->cleancache_poolid = CLEANCACHE_NO_POOL;
+
+ if (cleancache_ops && pool_id >= 0)
+ cleancache_ops->invalidate_fs(pool_id);
}
EXPORT_SYMBOL(__cleancache_invalidate_fs);
static int __init init_cleancache(void)
{
- int i;
-
#ifdef CONFIG_DEBUG_FS
struct dentry *root = debugfs_create_dir("cleancache", NULL);
if (root == NULL)
debugfs_create_u64("invalidates", S_IRUGO,
root, &cleancache_invalidates);
#endif
- for (i = 0; i < MAX_INITIALIZABLE_FS; i++) {
- fs_poolid_map[i] = FS_UNKNOWN;
- shared_fs_poolid_map[i] = FS_UNKNOWN;
- }
return 0;
}
module_init(init_cleancache)
#include <linux/highmem.h>
#include <linux/io.h>
-struct cma {
- unsigned long base_pfn;
- unsigned long count;
- unsigned long *bitmap;
- unsigned int order_per_bit; /* Order of pages represented by one bit */
- struct mutex lock;
-};
-
-static struct cma cma_areas[MAX_CMA_AREAS];
-static unsigned cma_area_count;
+#include "cma.h"
+
+struct cma cma_areas[MAX_CMA_AREAS];
+unsigned cma_area_count;
static DEFINE_MUTEX(cma_mutex);
-phys_addr_t cma_get_base(struct cma *cma)
+phys_addr_t cma_get_base(const struct cma *cma)
{
return PFN_PHYS(cma->base_pfn);
}
-unsigned long cma_get_size(struct cma *cma)
+unsigned long cma_get_size(const struct cma *cma)
{
return cma->count << PAGE_SHIFT;
}
-static unsigned long cma_bitmap_aligned_mask(struct cma *cma, int align_order)
+static unsigned long cma_bitmap_aligned_mask(const struct cma *cma,
+ int align_order)
{
if (align_order <= cma->order_per_bit)
return 0;
* Find a PFN aligned to the specified order and return an offset represented in
* order_per_bits.
*/
-static unsigned long cma_bitmap_aligned_offset(struct cma *cma, int align_order)
+static unsigned long cma_bitmap_aligned_offset(const struct cma *cma,
+ int align_order)
{
if (align_order <= cma->order_per_bit)
return 0;
- cma->base_pfn) >> cma->order_per_bit;
}
-static unsigned long cma_bitmap_maxno(struct cma *cma)
-{
- return cma->count >> cma->order_per_bit;
-}
-
-static unsigned long cma_bitmap_pages_to_bits(struct cma *cma,
- unsigned long pages)
+static unsigned long cma_bitmap_pages_to_bits(const struct cma *cma,
+ unsigned long pages)
{
return ALIGN(pages, 1UL << cma->order_per_bit) >> cma->order_per_bit;
}
-static void cma_clear_bitmap(struct cma *cma, unsigned long pfn, int count)
+static void cma_clear_bitmap(struct cma *cma, unsigned long pfn,
+ unsigned int count)
{
unsigned long bitmap_no, bitmap_count;
} while (--i);
mutex_init(&cma->lock);
+
+#ifdef CONFIG_CMA_DEBUGFS
+ INIT_HLIST_HEAD(&cma->mem_head);
+ spin_lock_init(&cma->mem_head_lock);
+#endif
+
return 0;
err:
* This function creates custom contiguous area from already reserved memory.
*/
int __init cma_init_reserved_mem(phys_addr_t base, phys_addr_t size,
- int order_per_bit, struct cma **res_cma)
+ unsigned int order_per_bit,
+ struct cma **res_cma)
{
struct cma *cma;
phys_addr_t alignment;
* This function allocates part of contiguous memory on specific
* contiguous memory area.
*/
-struct page *cma_alloc(struct cma *cma, int count, unsigned int align)
+struct page *cma_alloc(struct cma *cma, unsigned int count, unsigned int align)
{
unsigned long mask, offset, pfn, start = 0;
unsigned long bitmap_maxno, bitmap_no, bitmap_count;
* It returns false when provided pages do not belong to contiguous area and
* true otherwise.
*/
-bool cma_release(struct cma *cma, struct page *pages, int count)
+bool cma_release(struct cma *cma, const struct page *pages, unsigned int count)
{
unsigned long pfn;
--- /dev/null
+#ifndef __MM_CMA_H__
+#define __MM_CMA_H__
+
+struct cma {
+ unsigned long base_pfn;
+ unsigned long count;
+ unsigned long *bitmap;
+ unsigned int order_per_bit; /* Order of pages represented by one bit */
+ struct mutex lock;
+#ifdef CONFIG_CMA_DEBUGFS
+ struct hlist_head mem_head;
+ spinlock_t mem_head_lock;
+#endif
+};
+
+extern struct cma cma_areas[MAX_CMA_AREAS];
+extern unsigned cma_area_count;
+
+static unsigned long cma_bitmap_maxno(struct cma *cma)
+{
+ return cma->count >> cma->order_per_bit;
+}
+
+#endif
--- /dev/null
+/*
+ * CMA DebugFS Interface
+ *
+ * Copyright (c) 2015 Sasha Levin <sasha.levin@oracle.com>
+ */
+
+
+#include <linux/debugfs.h>
+#include <linux/cma.h>
+#include <linux/list.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/mm_types.h>
+
+#include "cma.h"
+
+struct cma_mem {
+ struct hlist_node node;
+ struct page *p;
+ unsigned long n;
+};
+
+static struct dentry *cma_debugfs_root;
+
+static int cma_debugfs_get(void *data, u64 *val)
+{
+ unsigned long *p = data;
+
+ *val = *p;
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(cma_debugfs_fops, cma_debugfs_get, NULL, "%llu\n");
+
+static void cma_add_to_cma_mem_list(struct cma *cma, struct cma_mem *mem)
+{
+ spin_lock(&cma->mem_head_lock);
+ hlist_add_head(&mem->node, &cma->mem_head);
+ spin_unlock(&cma->mem_head_lock);
+}
+
+static struct cma_mem *cma_get_entry_from_list(struct cma *cma)
+{
+ struct cma_mem *mem = NULL;
+
+ spin_lock(&cma->mem_head_lock);
+ if (!hlist_empty(&cma->mem_head)) {
+ mem = hlist_entry(cma->mem_head.first, struct cma_mem, node);
+ hlist_del_init(&mem->node);
+ }
+ spin_unlock(&cma->mem_head_lock);
+
+ return mem;
+}
+
+static int cma_free_mem(struct cma *cma, int count)
+{
+ struct cma_mem *mem = NULL;
+
+ while (count) {
+ mem = cma_get_entry_from_list(cma);
+ if (mem == NULL)
+ return 0;
+
+ if (mem->n <= count) {
+ cma_release(cma, mem->p, mem->n);
+ count -= mem->n;
+ kfree(mem);
+ } else if (cma->order_per_bit == 0) {
+ cma_release(cma, mem->p, count);
+ mem->p += count;
+ mem->n -= count;
+ count = 0;
+ cma_add_to_cma_mem_list(cma, mem);
+ } else {
+ pr_debug("cma: cannot release partial block when order_per_bit != 0\n");
+ cma_add_to_cma_mem_list(cma, mem);
+ break;
+ }
+ }
+
+ return 0;
+
+}
+
+static int cma_free_write(void *data, u64 val)
+{
+ int pages = val;
+ struct cma *cma = data;
+
+ return cma_free_mem(cma, pages);
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(cma_free_fops, NULL, cma_free_write, "%llu\n");
+
+static int cma_alloc_mem(struct cma *cma, int count)
+{
+ struct cma_mem *mem;
+ struct page *p;
+
+ mem = kzalloc(sizeof(*mem), GFP_KERNEL);
+ if (!mem)
+ return -ENOMEM;
+
+ p = cma_alloc(cma, count, 0);
+ if (!p) {
+ kfree(mem);
+ return -ENOMEM;
+ }
+
+ mem->p = p;
+ mem->n = count;
+
+ cma_add_to_cma_mem_list(cma, mem);
+
+ return 0;
+}
+
+static int cma_alloc_write(void *data, u64 val)
+{
+ int pages = val;
+ struct cma *cma = data;
+
+ return cma_alloc_mem(cma, pages);
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(cma_alloc_fops, NULL, cma_alloc_write, "%llu\n");
+
+static void cma_debugfs_add_one(struct cma *cma, int idx)
+{
+ struct dentry *tmp;
+ char name[16];
+ int u32s;
+
+ sprintf(name, "cma-%d", idx);
+
+ tmp = debugfs_create_dir(name, cma_debugfs_root);
+
+ debugfs_create_file("alloc", S_IWUSR, cma_debugfs_root, cma,
+ &cma_alloc_fops);
+
+ debugfs_create_file("free", S_IWUSR, cma_debugfs_root, cma,
+ &cma_free_fops);
+
+ debugfs_create_file("base_pfn", S_IRUGO, tmp,
+ &cma->base_pfn, &cma_debugfs_fops);
+ debugfs_create_file("count", S_IRUGO, tmp,
+ &cma->count, &cma_debugfs_fops);
+ debugfs_create_file("order_per_bit", S_IRUGO, tmp,
+ &cma->order_per_bit, &cma_debugfs_fops);
+
+ u32s = DIV_ROUND_UP(cma_bitmap_maxno(cma), BITS_PER_BYTE * sizeof(u32));
+ debugfs_create_u32_array("bitmap", S_IRUGO, tmp, (u32*)cma->bitmap, u32s);
+}
+
+static int __init cma_debugfs_init(void)
+{
+ int i;
+
+ cma_debugfs_root = debugfs_create_dir("cma", NULL);
+ if (!cma_debugfs_root)
+ return -ENOMEM;
+
+ for (i = 0; i < cma_area_count; i++)
+ cma_debugfs_add_one(&cma_areas[i], i);
+
+ return 0;
+}
+late_initcall(cma_debugfs_init);
/* Direct compactor: Is a suitable page free? */
for (order = cc->order; order < MAX_ORDER; order++) {
struct free_area *area = &zone->free_area[order];
+ bool can_steal;
/* Job done if page is free of the right migratetype */
if (!list_empty(&area->free_list[migratetype]))
return COMPACT_PARTIAL;
- /* Job done if allocation would set block type */
- if (order >= pageblock_order && area->nr_free)
+#ifdef CONFIG_CMA
+ /* MIGRATE_MOVABLE can fallback on MIGRATE_CMA */
+ if (migratetype == MIGRATE_MOVABLE &&
+ !list_empty(&area->free_list[MIGRATE_CMA]))
+ return COMPACT_PARTIAL;
+#endif
+ /*
+ * Job done if allocation would steal freepages from
+ * other migratetype buddy lists.
+ */
+ if (find_suitable_fallback(area, order, migratetype,
+ true, &can_steal) != -1)
return COMPACT_PARTIAL;
}
#include <linux/compiler.h>
#include <linux/fs.h>
#include <linux/uaccess.h>
-#include <linux/aio.h>
#include <linux/capability.h>
#include <linux/kernel_stat.h>
#include <linux/gfp.h>
BUG_ON(page_mapped(page));
/*
- * Some filesystems seem to re-dirty the page even after
- * the VM has canceled the dirty bit (eg ext3 journaling).
+ * At this point page must be either written or cleaned by truncate.
+ * Dirty page here signals a bug and loss of unwritten data.
*
- * Fix it up by doing a final dirty accounting check after
- * having removed the page entirely.
+ * This fixes dirty accounting after removing the page entirely but
+ * leaves PageDirty set: it has no effect for truncated page and
+ * anyway will be cleared before returning page into buddy allocator.
*/
- if (PageDirty(page) && mapping_cap_account_dirty(mapping)) {
- dec_zone_page_state(page, NR_FILE_DIRTY);
- dec_bdi_stat(inode_to_bdi(mapping->host), BDI_RECLAIMABLE);
- }
+ if (WARN_ON_ONCE(PageDirty(page)))
+ account_page_cleaned(page, mapping);
}
/**
*/
mark_page_accessed(page);
}
- if ((flags & FOLL_MLOCK) && (vma->vm_flags & VM_LOCKED)) {
+ if ((flags & FOLL_POPULATE) && (vma->vm_flags & VM_LOCKED)) {
/*
* The preliminary mapping check is mainly to avoid the
* pointless overhead of lock_page on the ZERO_PAGE
unsigned int fault_flags = 0;
int ret;
- /* For mlock, just skip the stack guard page. */
- if ((*flags & FOLL_MLOCK) &&
+ /* For mm_populate(), just skip the stack guard page. */
+ if ((*flags & FOLL_POPULATE) &&
(stack_guard_page_start(vma, address) ||
stack_guard_page_end(vma, address + PAGE_SIZE)))
return -ENOENT;
}
EXPORT_SYMBOL(get_user_pages);
+/**
+ * populate_vma_page_range() - populate a range of pages in the vma.
+ * @vma: target vma
+ * @start: start address
+ * @end: end address
+ * @nonblocking:
+ *
+ * This takes care of mlocking the pages too if VM_LOCKED is set.
+ *
+ * return 0 on success, negative error code on error.
+ *
+ * vma->vm_mm->mmap_sem must be held.
+ *
+ * If @nonblocking is NULL, it may be held for read or write and will
+ * be unperturbed.
+ *
+ * If @nonblocking is non-NULL, it must held for read only and may be
+ * released. If it's released, *@nonblocking will be set to 0.
+ */
+long populate_vma_page_range(struct vm_area_struct *vma,
+ unsigned long start, unsigned long end, int *nonblocking)
+{
+ struct mm_struct *mm = vma->vm_mm;
+ unsigned long nr_pages = (end - start) / PAGE_SIZE;
+ int gup_flags;
+
+ VM_BUG_ON(start & ~PAGE_MASK);
+ VM_BUG_ON(end & ~PAGE_MASK);
+ VM_BUG_ON_VMA(start < vma->vm_start, vma);
+ VM_BUG_ON_VMA(end > vma->vm_end, vma);
+ VM_BUG_ON_MM(!rwsem_is_locked(&mm->mmap_sem), mm);
+
+ gup_flags = FOLL_TOUCH | FOLL_POPULATE;
+ /*
+ * We want to touch writable mappings with a write fault in order
+ * to break COW, except for shared mappings because these don't COW
+ * and we would not want to dirty them for nothing.
+ */
+ if ((vma->vm_flags & (VM_WRITE | VM_SHARED)) == VM_WRITE)
+ gup_flags |= FOLL_WRITE;
+
+ /*
+ * We want mlock to succeed for regions that have any permissions
+ * other than PROT_NONE.
+ */
+ if (vma->vm_flags & (VM_READ | VM_WRITE | VM_EXEC))
+ gup_flags |= FOLL_FORCE;
+
+ /*
+ * We made sure addr is within a VMA, so the following will
+ * not result in a stack expansion that recurses back here.
+ */
+ return __get_user_pages(current, mm, start, nr_pages, gup_flags,
+ NULL, NULL, nonblocking);
+}
+
+/*
+ * __mm_populate - populate and/or mlock pages within a range of address space.
+ *
+ * This is used to implement mlock() and the MAP_POPULATE / MAP_LOCKED mmap
+ * flags. VMAs must be already marked with the desired vm_flags, and
+ * mmap_sem must not be held.
+ */
+int __mm_populate(unsigned long start, unsigned long len, int ignore_errors)
+{
+ struct mm_struct *mm = current->mm;
+ unsigned long end, nstart, nend;
+ struct vm_area_struct *vma = NULL;
+ int locked = 0;
+ long ret = 0;
+
+ VM_BUG_ON(start & ~PAGE_MASK);
+ VM_BUG_ON(len != PAGE_ALIGN(len));
+ end = start + len;
+
+ for (nstart = start; nstart < end; nstart = nend) {
+ /*
+ * We want to fault in pages for [nstart; end) address range.
+ * Find first corresponding VMA.
+ */
+ if (!locked) {
+ locked = 1;
+ down_read(&mm->mmap_sem);
+ vma = find_vma(mm, nstart);
+ } else if (nstart >= vma->vm_end)
+ vma = vma->vm_next;
+ if (!vma || vma->vm_start >= end)
+ break;
+ /*
+ * Set [nstart; nend) to intersection of desired address
+ * range with the first VMA. Also, skip undesirable VMA types.
+ */
+ nend = min(end, vma->vm_end);
+ if (vma->vm_flags & (VM_IO | VM_PFNMAP))
+ continue;
+ if (nstart < vma->vm_start)
+ nstart = vma->vm_start;
+ /*
+ * Now fault in a range of pages. populate_vma_page_range()
+ * double checks the vma flags, so that it won't mlock pages
+ * if the vma was already munlocked.
+ */
+ ret = populate_vma_page_range(vma, nstart, nend, &locked);
+ if (ret < 0) {
+ if (ignore_errors) {
+ ret = 0;
+ continue; /* continue at next VMA */
+ }
+ break;
+ }
+ nend = nstart + ret * PAGE_SIZE;
+ ret = 0;
+ }
+ if (locked)
+ up_read(&mm->mmap_sem);
+ return ret; /* 0 or negative error code */
+}
+
/**
* get_dump_page() - pin user page in memory while writing it to core dump
* @addr: user address
pmd, _pmd, 1))
update_mmu_cache_pmd(vma, addr, pmd);
}
- if ((flags & FOLL_MLOCK) && (vma->vm_flags & VM_LOCKED)) {
+ if ((flags & FOLL_POPULATE) && (vma->vm_flags & VM_LOCKED)) {
if (page->mapping && trylock_page(page)) {
lru_add_drain();
if (page->mapping)
{
while (--_pte >= pte) {
pte_t pteval = *_pte;
- if (!pte_none(pteval))
+ if (!pte_none(pteval) && !is_zero_pfn(pte_pfn(pteval)))
release_pte_page(pte_page(pteval));
}
}
{
struct page *page;
pte_t *_pte;
- int none = 0;
+ int none_or_zero = 0;
bool referenced = false, writable = false;
for (_pte = pte; _pte < pte+HPAGE_PMD_NR;
_pte++, address += PAGE_SIZE) {
pte_t pteval = *_pte;
- if (pte_none(pteval)) {
- if (++none <= khugepaged_max_ptes_none)
+ if (pte_none(pteval) || is_zero_pfn(pte_pfn(pteval))) {
+ if (++none_or_zero <= khugepaged_max_ptes_none)
continue;
else
goto out;
pte_t pteval = *_pte;
struct page *src_page;
- if (pte_none(pteval)) {
+ if (pte_none(pteval) || is_zero_pfn(pte_pfn(pteval))) {
clear_user_highpage(page, address);
add_mm_counter(vma->vm_mm, MM_ANONPAGES, 1);
+ if (is_zero_pfn(pte_pfn(pteval))) {
+ /*
+ * ptl mostly unnecessary.
+ */
+ spin_lock(ptl);
+ /*
+ * paravirt calls inside pte_clear here are
+ * superfluous.
+ */
+ pte_clear(vma->vm_mm, address, _pte);
+ spin_unlock(ptl);
+ }
} else {
src_page = pte_page(pteval);
copy_user_highpage(page, src_page, address, vma);
struct vm_area_struct *vma, unsigned long address,
int node)
{
+ gfp_t flags;
+
VM_BUG_ON_PAGE(*hpage, *hpage);
+ /* Only allocate from the target node */
+ flags = alloc_hugepage_gfpmask(khugepaged_defrag(), __GFP_OTHER_NODE) |
+ __GFP_THISNODE;
+
/*
* Before allocating the hugepage, release the mmap_sem read lock.
* The allocation can take potentially a long time if it involves
*/
up_read(&mm->mmap_sem);
- *hpage = alloc_pages_exact_node(node, alloc_hugepage_gfpmask(
- khugepaged_defrag(), __GFP_OTHER_NODE), HPAGE_PMD_ORDER);
+ *hpage = alloc_pages_exact_node(node, flags, HPAGE_PMD_ORDER);
if (unlikely(!*hpage)) {
count_vm_event(THP_COLLAPSE_ALLOC_FAILED);
*hpage = ERR_PTR(-ENOMEM);
{
pmd_t *pmd;
pte_t *pte, *_pte;
- int ret = 0, none = 0;
+ int ret = 0, none_or_zero = 0;
struct page *page;
unsigned long _address;
spinlock_t *ptl;
for (_address = address, _pte = pte; _pte < pte+HPAGE_PMD_NR;
_pte++, _address += PAGE_SIZE) {
pte_t pteval = *_pte;
- if (pte_none(pteval)) {
- if (++none <= khugepaged_max_ptes_none)
+ if (pte_none(pteval) || is_zero_pfn(pte_pfn(pteval))) {
+ if (++none_or_zero <= khugepaged_max_ptes_none)
continue;
else
goto out_unmap;
int absent;
struct page *page;
+ /*
+ * If we have a pending SIGKILL, don't keep faulting pages and
+ * potentially allocating memory.
+ */
+ if (unlikely(fatal_signal_pending(current))) {
+ remainder = 0;
+ break;
+ }
+
/*
* Some archs (sparc64, sh*) have multiple pte_ts to
* each hugepage. We have to make sure we get the
if (!pmd_huge(*pmd))
goto out;
if (pmd_present(*pmd)) {
- page = pte_page(*(pte_t *)pmd) +
- ((address & ~PMD_MASK) >> PAGE_SHIFT);
+ page = pmd_page(*pmd) + ((address & ~PMD_MASK) >> PAGE_SHIFT);
if (flags & FOLL_GET)
get_page(page);
} else {
unsigned long
isolate_migratepages_range(struct compact_control *cc,
unsigned long low_pfn, unsigned long end_pfn);
+int find_suitable_fallback(struct free_area *area, unsigned int order,
+ int migratetype, bool only_stealable, bool *can_steal);
#endif
struct vm_area_struct *prev, struct rb_node *rb_parent);
#ifdef CONFIG_MMU
-extern long __mlock_vma_pages_range(struct vm_area_struct *vma,
+extern long populate_vma_page_range(struct vm_area_struct *vma,
unsigned long start, unsigned long end, int *nonblocking);
extern void munlock_vma_pages_range(struct vm_area_struct *vma,
unsigned long start, unsigned long end);
int nid,
unsigned long flags)
{
- struct memblock_type *_rgn = &memblock.reserved;
+ struct memblock_type *type = &memblock.reserved;
memblock_dbg("memblock_reserve: [%#016llx-%#016llx] flags %#02lx %pF\n",
(unsigned long long)base,
(unsigned long long)base + size - 1,
flags, (void *)_RET_IP_);
- return memblock_add_range(_rgn, base, size, nid, flags);
+ return memblock_add_range(type, base, size, nid, flags);
}
int __init_memblock memblock_reserve(phys_addr_t base, phys_addr_t size)
* Copyright (C) 2012 Parallels Inc. and Google Inc.
* Authors: Glauber Costa and Suleiman Souhlal
*
+ * Native page reclaim
+ * Charge lifetime sanitation
+ * Lockless page tracking & accounting
+ * Unified hierarchy configuration model
+ * Copyright (C) 2015 Red Hat, Inc., Johannes Weiner
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
struct mem_cgroup *iter;
unsigned int i;
- if (!p)
- return;
-
mutex_lock(&oom_info_lock);
rcu_read_lock();
- pr_info("Task in ");
- pr_cont_cgroup_path(task_cgroup(p, memory_cgrp_id));
- pr_cont(" killed as a result of limit of ");
+ if (p) {
+ pr_info("Task in ");
+ pr_cont_cgroup_path(task_cgroup(p, memory_cgrp_id));
+ pr_cont(" killed as a result of limit of ");
+ } else {
+ pr_info("Memory limit reached of cgroup ");
+ }
+
pr_cont_cgroup_path(memcg->css.cgroup);
pr_cont("\n");
return;
}
- check_panic_on_oom(CONSTRAINT_MEMCG, gfp_mask, order, NULL);
+ check_panic_on_oom(CONSTRAINT_MEMCG, gfp_mask, order, NULL, memcg);
totalpages = mem_cgroup_get_limit(memcg) ? : 1;
for_each_mem_cgroup_tree(iter, memcg) {
struct css_task_iter it;
}
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
-/**
- * mem_cgroup_move_account - move account of the page
- * @page: the page
- * @nr_pages: number of regular pages (>1 for huge pages)
- * @from: mem_cgroup which the page is moved from.
- * @to: mem_cgroup which the page is moved to. @from != @to.
- *
- * The caller must confirm following.
- * - page is not on LRU (isolate_page() is useful.)
- * - compound_lock is held when nr_pages > 1
- *
- * This function doesn't do "charge" to new cgroup and doesn't do "uncharge"
- * from old cgroup.
- */
-static int mem_cgroup_move_account(struct page *page,
- unsigned int nr_pages,
- struct mem_cgroup *from,
- struct mem_cgroup *to)
-{
- unsigned long flags;
- int ret;
-
- VM_BUG_ON(from == to);
- VM_BUG_ON_PAGE(PageLRU(page), page);
- /*
- * The page is isolated from LRU. So, collapse function
- * will not handle this page. But page splitting can happen.
- * Do this check under compound_page_lock(). The caller should
- * hold it.
- */
- ret = -EBUSY;
- if (nr_pages > 1 && !PageTransHuge(page))
- goto out;
-
- /*
- * Prevent mem_cgroup_migrate() from looking at page->mem_cgroup
- * of its source page while we change it: page migration takes
- * both pages off the LRU, but page cache replacement doesn't.
- */
- if (!trylock_page(page))
- goto out;
-
- ret = -EINVAL;
- if (page->mem_cgroup != from)
- goto out_unlock;
-
- spin_lock_irqsave(&from->move_lock, flags);
-
- if (!PageAnon(page) && page_mapped(page)) {
- __this_cpu_sub(from->stat->count[MEM_CGROUP_STAT_FILE_MAPPED],
- nr_pages);
- __this_cpu_add(to->stat->count[MEM_CGROUP_STAT_FILE_MAPPED],
- nr_pages);
- }
-
- if (PageWriteback(page)) {
- __this_cpu_sub(from->stat->count[MEM_CGROUP_STAT_WRITEBACK],
- nr_pages);
- __this_cpu_add(to->stat->count[MEM_CGROUP_STAT_WRITEBACK],
- nr_pages);
- }
-
- /*
- * It is safe to change page->mem_cgroup here because the page
- * is referenced, charged, and isolated - we can't race with
- * uncharging, charging, migration, or LRU putback.
- */
-
- /* caller should have done css_get */
- page->mem_cgroup = to;
- spin_unlock_irqrestore(&from->move_lock, flags);
-
- ret = 0;
-
- local_irq_disable();
- mem_cgroup_charge_statistics(to, page, nr_pages);
- memcg_check_events(to, page);
- mem_cgroup_charge_statistics(from, page, -nr_pages);
- memcg_check_events(from, page);
- local_irq_enable();
-out_unlock:
- unlock_page(page);
-out:
- return ret;
-}
-
#ifdef CONFIG_MEMCG_SWAP
static void mem_cgroup_swap_statistics(struct mem_cgroup *memcg,
bool charge)
return page;
}
+/**
+ * mem_cgroup_move_account - move account of the page
+ * @page: the page
+ * @nr_pages: number of regular pages (>1 for huge pages)
+ * @from: mem_cgroup which the page is moved from.
+ * @to: mem_cgroup which the page is moved to. @from != @to.
+ *
+ * The caller must confirm following.
+ * - page is not on LRU (isolate_page() is useful.)
+ * - compound_lock is held when nr_pages > 1
+ *
+ * This function doesn't do "charge" to new cgroup and doesn't do "uncharge"
+ * from old cgroup.
+ */
+static int mem_cgroup_move_account(struct page *page,
+ unsigned int nr_pages,
+ struct mem_cgroup *from,
+ struct mem_cgroup *to)
+{
+ unsigned long flags;
+ int ret;
+
+ VM_BUG_ON(from == to);
+ VM_BUG_ON_PAGE(PageLRU(page), page);
+ /*
+ * The page is isolated from LRU. So, collapse function
+ * will not handle this page. But page splitting can happen.
+ * Do this check under compound_page_lock(). The caller should
+ * hold it.
+ */
+ ret = -EBUSY;
+ if (nr_pages > 1 && !PageTransHuge(page))
+ goto out;
+
+ /*
+ * Prevent mem_cgroup_migrate() from looking at page->mem_cgroup
+ * of its source page while we change it: page migration takes
+ * both pages off the LRU, but page cache replacement doesn't.
+ */
+ if (!trylock_page(page))
+ goto out;
+
+ ret = -EINVAL;
+ if (page->mem_cgroup != from)
+ goto out_unlock;
+
+ spin_lock_irqsave(&from->move_lock, flags);
+
+ if (!PageAnon(page) && page_mapped(page)) {
+ __this_cpu_sub(from->stat->count[MEM_CGROUP_STAT_FILE_MAPPED],
+ nr_pages);
+ __this_cpu_add(to->stat->count[MEM_CGROUP_STAT_FILE_MAPPED],
+ nr_pages);
+ }
+
+ if (PageWriteback(page)) {
+ __this_cpu_sub(from->stat->count[MEM_CGROUP_STAT_WRITEBACK],
+ nr_pages);
+ __this_cpu_add(to->stat->count[MEM_CGROUP_STAT_WRITEBACK],
+ nr_pages);
+ }
+
+ /*
+ * It is safe to change page->mem_cgroup here because the page
+ * is referenced, charged, and isolated - we can't race with
+ * uncharging, charging, migration, or LRU putback.
+ */
+
+ /* caller should have done css_get */
+ page->mem_cgroup = to;
+ spin_unlock_irqrestore(&from->move_lock, flags);
+
+ ret = 0;
+
+ local_irq_disable();
+ mem_cgroup_charge_statistics(to, page, nr_pages);
+ memcg_check_events(to, page);
+ mem_cgroup_charge_statistics(from, page, -nr_pages);
+ memcg_check_events(from, page);
+ local_irq_enable();
+out_unlock:
+ unlock_page(page);
+out:
+ return ret;
+}
+
static enum mc_target_type get_mctgt_type(struct vm_area_struct *vma,
unsigned long addr, pte_t ptent, union mc_target *target)
{
}
/*
- * This routine handles present pages, when users try to write
- * to a shared page. It is done by copying the page to a new address
- * and decrementing the shared-page counter for the old page.
- *
- * Note that this routine assumes that the protection checks have been
- * done by the caller (the low-level page fault routine in most cases).
- * Thus we can safely just mark it writable once we've done any necessary
- * COW.
+ * Handle write page faults for pages that can be reused in the current vma
*
- * We also mark the page dirty at this point even though the page will
- * change only once the write actually happens. This avoids a few races,
- * and potentially makes it more efficient.
- *
- * We enter with non-exclusive mmap_sem (to exclude vma changes,
- * but allow concurrent faults), with pte both mapped and locked.
- * We return with mmap_sem still held, but pte unmapped and unlocked.
+ * This can happen either due to the mapping being with the VM_SHARED flag,
+ * or due to us being the last reference standing to the page. In either
+ * case, all we need to do here is to mark the page as writable and update
+ * any related book-keeping.
*/
-static int do_wp_page(struct mm_struct *mm, struct vm_area_struct *vma,
- unsigned long address, pte_t *page_table, pmd_t *pmd,
- spinlock_t *ptl, pte_t orig_pte)
+static inline int wp_page_reuse(struct mm_struct *mm,
+ struct vm_area_struct *vma, unsigned long address,
+ pte_t *page_table, spinlock_t *ptl, pte_t orig_pte,
+ struct page *page, int page_mkwrite,
+ int dirty_shared)
__releases(ptl)
{
- struct page *old_page, *new_page = NULL;
pte_t entry;
- int ret = 0;
- int page_mkwrite = 0;
- bool dirty_shared = false;
- unsigned long mmun_start = 0; /* For mmu_notifiers */
- unsigned long mmun_end = 0; /* For mmu_notifiers */
- struct mem_cgroup *memcg;
-
- old_page = vm_normal_page(vma, address, orig_pte);
- if (!old_page) {
- /*
- * VM_MIXEDMAP !pfn_valid() case, or VM_SOFTDIRTY clear on a
- * VM_PFNMAP VMA.
- *
- * We should not cow pages in a shared writeable mapping.
- * Just mark the pages writable as we can't do any dirty
- * accounting on raw pfn maps.
- */
- if ((vma->vm_flags & (VM_WRITE|VM_SHARED)) ==
- (VM_WRITE|VM_SHARED))
- goto reuse;
- goto gotten;
- }
-
/*
- * Take out anonymous pages first, anonymous shared vmas are
- * not dirty accountable.
+ * Clear the pages cpupid information as the existing
+ * information potentially belongs to a now completely
+ * unrelated process.
*/
- if (PageAnon(old_page) && !PageKsm(old_page)) {
- if (!trylock_page(old_page)) {
- page_cache_get(old_page);
- pte_unmap_unlock(page_table, ptl);
- lock_page(old_page);
- page_table = pte_offset_map_lock(mm, pmd, address,
- &ptl);
- if (!pte_same(*page_table, orig_pte)) {
- unlock_page(old_page);
- goto unlock;
- }
- page_cache_release(old_page);
- }
- if (reuse_swap_page(old_page)) {
- /*
- * The page is all ours. Move it to our anon_vma so
- * the rmap code will not search our parent or siblings.
- * Protected against the rmap code by the page lock.
- */
- page_move_anon_rmap(old_page, vma, address);
- unlock_page(old_page);
- goto reuse;
- }
- unlock_page(old_page);
- } else if (unlikely((vma->vm_flags & (VM_WRITE|VM_SHARED)) ==
- (VM_WRITE|VM_SHARED))) {
- page_cache_get(old_page);
- /*
- * Only catch write-faults on shared writable pages,
- * read-only shared pages can get COWed by
- * get_user_pages(.write=1, .force=1).
- */
- if (vma->vm_ops && vma->vm_ops->page_mkwrite) {
- int tmp;
-
- pte_unmap_unlock(page_table, ptl);
- tmp = do_page_mkwrite(vma, old_page, address);
- if (unlikely(!tmp || (tmp &
- (VM_FAULT_ERROR | VM_FAULT_NOPAGE)))) {
- page_cache_release(old_page);
- return tmp;
- }
- /*
- * Since we dropped the lock we need to revalidate
- * the PTE as someone else may have changed it. If
- * they did, we just return, as we can count on the
- * MMU to tell us if they didn't also make it writable.
- */
- page_table = pte_offset_map_lock(mm, pmd, address,
- &ptl);
- if (!pte_same(*page_table, orig_pte)) {
- unlock_page(old_page);
- goto unlock;
- }
- page_mkwrite = 1;
- }
-
- dirty_shared = true;
-
-reuse:
- /*
- * Clear the pages cpupid information as the existing
- * information potentially belongs to a now completely
- * unrelated process.
- */
- if (old_page)
- page_cpupid_xchg_last(old_page, (1 << LAST_CPUPID_SHIFT) - 1);
-
- flush_cache_page(vma, address, pte_pfn(orig_pte));
- entry = pte_mkyoung(orig_pte);
- entry = maybe_mkwrite(pte_mkdirty(entry), vma);
- if (ptep_set_access_flags(vma, address, page_table, entry,1))
- update_mmu_cache(vma, address, page_table);
- pte_unmap_unlock(page_table, ptl);
- ret |= VM_FAULT_WRITE;
+ if (page)
+ page_cpupid_xchg_last(page, (1 << LAST_CPUPID_SHIFT) - 1);
- if (dirty_shared) {
- struct address_space *mapping;
- int dirtied;
+ flush_cache_page(vma, address, pte_pfn(orig_pte));
+ entry = pte_mkyoung(orig_pte);
+ entry = maybe_mkwrite(pte_mkdirty(entry), vma);
+ if (ptep_set_access_flags(vma, address, page_table, entry, 1))
+ update_mmu_cache(vma, address, page_table);
+ pte_unmap_unlock(page_table, ptl);
- if (!page_mkwrite)
- lock_page(old_page);
+ if (dirty_shared) {
+ struct address_space *mapping;
+ int dirtied;
- dirtied = set_page_dirty(old_page);
- VM_BUG_ON_PAGE(PageAnon(old_page), old_page);
- mapping = old_page->mapping;
- unlock_page(old_page);
- page_cache_release(old_page);
+ if (!page_mkwrite)
+ lock_page(page);
- if ((dirtied || page_mkwrite) && mapping) {
- /*
- * Some device drivers do not set page.mapping
- * but still dirty their pages
- */
- balance_dirty_pages_ratelimited(mapping);
- }
+ dirtied = set_page_dirty(page);
+ VM_BUG_ON_PAGE(PageAnon(page), page);
+ mapping = page->mapping;
+ unlock_page(page);
+ page_cache_release(page);
- if (!page_mkwrite)
- file_update_time(vma->vm_file);
+ if ((dirtied || page_mkwrite) && mapping) {
+ /*
+ * Some device drivers do not set page.mapping
+ * but still dirty their pages
+ */
+ balance_dirty_pages_ratelimited(mapping);
}
- return ret;
+ if (!page_mkwrite)
+ file_update_time(vma->vm_file);
}
- /*
- * Ok, we need to copy. Oh, well..
- */
- page_cache_get(old_page);
-gotten:
- pte_unmap_unlock(page_table, ptl);
+ return VM_FAULT_WRITE;
+}
+
+/*
+ * Handle the case of a page which we actually need to copy to a new page.
+ *
+ * Called with mmap_sem locked and the old page referenced, but
+ * without the ptl held.
+ *
+ * High level logic flow:
+ *
+ * - Allocate a page, copy the content of the old page to the new one.
+ * - Handle book keeping and accounting - cgroups, mmu-notifiers, etc.
+ * - Take the PTL. If the pte changed, bail out and release the allocated page
+ * - If the pte is still the way we remember it, update the page table and all
+ * relevant references. This includes dropping the reference the page-table
+ * held to the old page, as well as updating the rmap.
+ * - In any case, unlock the PTL and drop the reference we took to the old page.
+ */
+static int wp_page_copy(struct mm_struct *mm, struct vm_area_struct *vma,
+ unsigned long address, pte_t *page_table, pmd_t *pmd,
+ pte_t orig_pte, struct page *old_page)
+{
+ struct page *new_page = NULL;
+ spinlock_t *ptl = NULL;
+ pte_t entry;
+ int page_copied = 0;
+ const unsigned long mmun_start = address & PAGE_MASK; /* For mmu_notifiers */
+ const unsigned long mmun_end = mmun_start + PAGE_SIZE; /* For mmu_notifiers */
+ struct mem_cgroup *memcg;
if (unlikely(anon_vma_prepare(vma)))
goto oom;
if (mem_cgroup_try_charge(new_page, mm, GFP_KERNEL, &memcg))
goto oom_free_new;
- mmun_start = address & PAGE_MASK;
- mmun_end = mmun_start + PAGE_SIZE;
mmu_notifier_invalidate_range_start(mm, mmun_start, mmun_end);
/*
dec_mm_counter_fast(mm, MM_FILEPAGES);
inc_mm_counter_fast(mm, MM_ANONPAGES);
}
- } else
+ } else {
inc_mm_counter_fast(mm, MM_ANONPAGES);
+ }
flush_cache_page(vma, address, pte_pfn(orig_pte));
entry = mk_pte(new_page, vma->vm_page_prot);
entry = maybe_mkwrite(pte_mkdirty(entry), vma);
/* Free the old page.. */
new_page = old_page;
- ret |= VM_FAULT_WRITE;
- } else
+ page_copied = 1;
+ } else {
mem_cgroup_cancel_charge(new_page, memcg);
+ }
if (new_page)
page_cache_release(new_page);
-unlock:
+
pte_unmap_unlock(page_table, ptl);
- if (mmun_end > mmun_start)
- mmu_notifier_invalidate_range_end(mm, mmun_start, mmun_end);
+ mmu_notifier_invalidate_range_end(mm, mmun_start, mmun_end);
if (old_page) {
/*
* Don't let another task, with possibly unlocked vma,
* keep the mlocked page.
*/
- if ((ret & VM_FAULT_WRITE) && (vma->vm_flags & VM_LOCKED)) {
+ if (page_copied && (vma->vm_flags & VM_LOCKED)) {
lock_page(old_page); /* LRU manipulation */
munlock_vma_page(old_page);
unlock_page(old_page);
}
page_cache_release(old_page);
}
- return ret;
+ return page_copied ? VM_FAULT_WRITE : 0;
oom_free_new:
page_cache_release(new_page);
oom:
return VM_FAULT_OOM;
}
+static int wp_page_shared(struct mm_struct *mm, struct vm_area_struct *vma,
+ unsigned long address, pte_t *page_table,
+ pmd_t *pmd, spinlock_t *ptl, pte_t orig_pte,
+ struct page *old_page)
+ __releases(ptl)
+{
+ int page_mkwrite = 0;
+
+ page_cache_get(old_page);
+
+ /*
+ * Only catch write-faults on shared writable pages,
+ * read-only shared pages can get COWed by
+ * get_user_pages(.write=1, .force=1).
+ */
+ if (vma->vm_ops && vma->vm_ops->page_mkwrite) {
+ int tmp;
+
+ pte_unmap_unlock(page_table, ptl);
+ tmp = do_page_mkwrite(vma, old_page, address);
+ if (unlikely(!tmp || (tmp &
+ (VM_FAULT_ERROR | VM_FAULT_NOPAGE)))) {
+ page_cache_release(old_page);
+ return tmp;
+ }
+ /*
+ * Since we dropped the lock we need to revalidate
+ * the PTE as someone else may have changed it. If
+ * they did, we just return, as we can count on the
+ * MMU to tell us if they didn't also make it writable.
+ */
+ page_table = pte_offset_map_lock(mm, pmd, address,
+ &ptl);
+ if (!pte_same(*page_table, orig_pte)) {
+ unlock_page(old_page);
+ pte_unmap_unlock(page_table, ptl);
+ page_cache_release(old_page);
+ return 0;
+ }
+ page_mkwrite = 1;
+ }
+
+ return wp_page_reuse(mm, vma, address, page_table, ptl,
+ orig_pte, old_page, page_mkwrite, 1);
+}
+
+/*
+ * This routine handles present pages, when users try to write
+ * to a shared page. It is done by copying the page to a new address
+ * and decrementing the shared-page counter for the old page.
+ *
+ * Note that this routine assumes that the protection checks have been
+ * done by the caller (the low-level page fault routine in most cases).
+ * Thus we can safely just mark it writable once we've done any necessary
+ * COW.
+ *
+ * We also mark the page dirty at this point even though the page will
+ * change only once the write actually happens. This avoids a few races,
+ * and potentially makes it more efficient.
+ *
+ * We enter with non-exclusive mmap_sem (to exclude vma changes,
+ * but allow concurrent faults), with pte both mapped and locked.
+ * We return with mmap_sem still held, but pte unmapped and unlocked.
+ */
+static int do_wp_page(struct mm_struct *mm, struct vm_area_struct *vma,
+ unsigned long address, pte_t *page_table, pmd_t *pmd,
+ spinlock_t *ptl, pte_t orig_pte)
+ __releases(ptl)
+{
+ struct page *old_page;
+
+ old_page = vm_normal_page(vma, address, orig_pte);
+ if (!old_page) {
+ /*
+ * VM_MIXEDMAP !pfn_valid() case, or VM_SOFTDIRTY clear on a
+ * VM_PFNMAP VMA.
+ *
+ * We should not cow pages in a shared writeable mapping.
+ * Just mark the pages writable as we can't do any dirty
+ * accounting on raw pfn maps.
+ */
+ if ((vma->vm_flags & (VM_WRITE|VM_SHARED)) ==
+ (VM_WRITE|VM_SHARED))
+ return wp_page_reuse(mm, vma, address, page_table, ptl,
+ orig_pte, old_page, 0, 0);
+
+ pte_unmap_unlock(page_table, ptl);
+ return wp_page_copy(mm, vma, address, page_table, pmd,
+ orig_pte, old_page);
+ }
+
+ /*
+ * Take out anonymous pages first, anonymous shared vmas are
+ * not dirty accountable.
+ */
+ if (PageAnon(old_page) && !PageKsm(old_page)) {
+ if (!trylock_page(old_page)) {
+ page_cache_get(old_page);
+ pte_unmap_unlock(page_table, ptl);
+ lock_page(old_page);
+ page_table = pte_offset_map_lock(mm, pmd, address,
+ &ptl);
+ if (!pte_same(*page_table, orig_pte)) {
+ unlock_page(old_page);
+ pte_unmap_unlock(page_table, ptl);
+ page_cache_release(old_page);
+ return 0;
+ }
+ page_cache_release(old_page);
+ }
+ if (reuse_swap_page(old_page)) {
+ /*
+ * The page is all ours. Move it to our anon_vma so
+ * the rmap code will not search our parent or siblings.
+ * Protected against the rmap code by the page lock.
+ */
+ page_move_anon_rmap(old_page, vma, address);
+ unlock_page(old_page);
+ return wp_page_reuse(mm, vma, address, page_table, ptl,
+ orig_pte, old_page, 0, 0);
+ }
+ unlock_page(old_page);
+ } else if (unlikely((vma->vm_flags & (VM_WRITE|VM_SHARED)) ==
+ (VM_WRITE|VM_SHARED))) {
+ return wp_page_shared(mm, vma, address, page_table, pmd,
+ ptl, orig_pte, old_page);
+ }
+
+ /*
+ * Ok, we need to copy. Oh, well..
+ */
+ page_cache_get(old_page);
+
+ pte_unmap_unlock(page_table, ptl);
+ return wp_page_copy(mm, vma, address, page_table, pmd,
+ orig_pte, old_page);
+}
+
static void unmap_mapping_range_vma(struct vm_area_struct *vma,
unsigned long start_addr, unsigned long end_addr,
struct zap_details *details)
}
-static void mem_hotplug_begin(void)
+void mem_hotplug_begin(void)
{
mem_hotplug.active_writer = current;
}
}
-static void mem_hotplug_done(void)
+void mem_hotplug_done(void)
{
mem_hotplug.active_writer = NULL;
mutex_unlock(&mem_hotplug.lock);
end_sec = pfn_to_section_nr(phys_start_pfn + nr_pages - 1);
for (i = start_sec; i <= end_sec; i++) {
- err = __add_section(nid, zone, i << PFN_SECTION_SHIFT);
+ err = __add_section(nid, zone, section_nr_to_pfn(i));
/*
* EEXIST is finally dealt with by ioresource collision
}
+/* Must be protected by mem_hotplug_begin() */
int __ref online_pages(unsigned long pfn, unsigned long nr_pages, int online_type)
{
unsigned long flags;
int ret;
struct memory_notify arg;
- mem_hotplug_begin();
/*
* This doesn't need a lock to do pfn_to_page().
* The section can't be removed here because of the
*/
zone = page_zone(pfn_to_page(pfn));
- ret = -EINVAL;
if ((zone_idx(zone) > ZONE_NORMAL ||
online_type == MMOP_ONLINE_MOVABLE) &&
!can_online_high_movable(zone))
- goto out;
+ return -EINVAL;
if (online_type == MMOP_ONLINE_KERNEL &&
zone_idx(zone) == ZONE_MOVABLE) {
if (move_pfn_range_left(zone - 1, zone, pfn, pfn + nr_pages))
- goto out;
+ return -EINVAL;
}
if (online_type == MMOP_ONLINE_MOVABLE &&
zone_idx(zone) == ZONE_MOVABLE - 1) {
if (move_pfn_range_right(zone, zone + 1, pfn, pfn + nr_pages))
- goto out;
+ return -EINVAL;
}
/* Previous code may changed the zone of the pfn range */
ret = notifier_to_errno(ret);
if (ret) {
memory_notify(MEM_CANCEL_ONLINE, &arg);
- goto out;
+ return ret;
}
/*
* If this zone is not populated, then it is not in zonelist.
(((unsigned long long) pfn + nr_pages)
<< PAGE_SHIFT) - 1);
memory_notify(MEM_CANCEL_ONLINE, &arg);
- goto out;
+ return ret;
}
zone->present_pages += onlined_pages;
if (onlined_pages)
memory_notify(MEM_ONLINE, &arg);
-out:
- mem_hotplug_done();
- return ret;
+ return 0;
}
#endif /* CONFIG_MEMORY_HOTPLUG_SPARSE */
if (!test_pages_in_a_zone(start_pfn, end_pfn))
return -EINVAL;
- mem_hotplug_begin();
-
zone = page_zone(pfn_to_page(start_pfn));
node = zone_to_nid(zone);
nr_pages = end_pfn - start_pfn;
- ret = -EINVAL;
if (zone_idx(zone) <= ZONE_NORMAL && !can_offline_normal(zone, nr_pages))
- goto out;
+ return -EINVAL;
/* set above range as isolated */
ret = start_isolate_page_range(start_pfn, end_pfn,
MIGRATE_MOVABLE, true);
if (ret)
- goto out;
+ return ret;
arg.start_pfn = start_pfn;
arg.nr_pages = nr_pages;
writeback_set_ratelimit();
memory_notify(MEM_OFFLINE, &arg);
- mem_hotplug_done();
return 0;
failed_removal:
memory_notify(MEM_CANCEL_OFFLINE, &arg);
/* pushback to free area */
undo_isolate_page_range(start_pfn, end_pfn, MIGRATE_MOVABLE);
-
-out:
- mem_hotplug_done();
return ret;
}
+/* Must be protected by mem_hotplug_begin() */
int offline_pages(unsigned long start_pfn, unsigned long nr_pages)
{
return __offline_pages(start_pfn, start_pfn + nr_pages, 120 * HZ);
return alloc_huge_page_node(page_hstate(compound_head(page)),
node);
else
- return alloc_pages_exact_node(node, GFP_HIGHUSER_MOVABLE, 0);
+ return alloc_pages_exact_node(node, GFP_HIGHUSER_MOVABLE |
+ __GFP_THISNODE, 0);
}
/*
nmask = policy_nodemask(gfp, pol);
if (!nmask || node_isset(node, *nmask)) {
mpol_cond_put(pol);
- page = alloc_pages_exact_node(node, gfp, order);
+ page = alloc_pages_exact_node(node,
+ gfp | __GFP_THISNODE, order);
goto out;
}
}
* mempool_create().
* @new_min_nr: the new minimum number of elements guaranteed to be
* allocated for this pool.
- * @gfp_mask: the usual allocation bitmask.
*
* This function shrinks/grows the pool. In the case of growing,
* it cannot be guaranteed that the pool will be grown to the new
* size immediately, but new mempool_free() calls will refill it.
+ * This function may sleep.
*
* Note, the caller must guarantee that no mempool_destroy is called
* while this function is running. mempool_alloc() & mempool_free()
* might be called (eg. from IRQ contexts) while this function executes.
*/
-int mempool_resize(mempool_t *pool, int new_min_nr, gfp_t gfp_mask)
+int mempool_resize(mempool_t *pool, int new_min_nr)
{
void *element;
void **new_elements;
unsigned long flags;
BUG_ON(new_min_nr <= 0);
+ might_sleep();
spin_lock_irqsave(&pool->lock, flags);
if (new_min_nr <= pool->min_nr) {
spin_unlock_irqrestore(&pool->lock, flags);
/* Grow the pool */
- new_elements = kmalloc(new_min_nr * sizeof(*new_elements), gfp_mask);
+ new_elements = kmalloc_array(new_min_nr, sizeof(*new_elements),
+ GFP_KERNEL);
if (!new_elements)
return -ENOMEM;
while (pool->curr_nr < pool->min_nr) {
spin_unlock_irqrestore(&pool->lock, flags);
- element = pool->alloc(gfp_mask, pool->pool_data);
+ element = pool->alloc(GFP_KERNEL, pool->pool_data);
if (!element)
goto out;
spin_lock_irqsave(&pool->lock, flags);
--- /dev/null
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/smp.h>
+#include <linux/init.h>
+#include <linux/pfn.h>
+#include <linux/memblock.h>
+
+static u64 patterns[] __initdata = {
+ /* The first entry has to be 0 to leave memtest with zeroed memory */
+ 0,
+ 0xffffffffffffffffULL,
+ 0x5555555555555555ULL,
+ 0xaaaaaaaaaaaaaaaaULL,
+ 0x1111111111111111ULL,
+ 0x2222222222222222ULL,
+ 0x4444444444444444ULL,
+ 0x8888888888888888ULL,
+ 0x3333333333333333ULL,
+ 0x6666666666666666ULL,
+ 0x9999999999999999ULL,
+ 0xccccccccccccccccULL,
+ 0x7777777777777777ULL,
+ 0xbbbbbbbbbbbbbbbbULL,
+ 0xddddddddddddddddULL,
+ 0xeeeeeeeeeeeeeeeeULL,
+ 0x7a6c7258554e494cULL, /* yeah ;-) */
+};
+
+static void __init reserve_bad_mem(u64 pattern, phys_addr_t start_bad, phys_addr_t end_bad)
+{
+ printk(KERN_INFO " %016llx bad mem addr %010llx - %010llx reserved\n",
+ (unsigned long long) pattern,
+ (unsigned long long) start_bad,
+ (unsigned long long) end_bad);
+ memblock_reserve(start_bad, end_bad - start_bad);
+}
+
+static void __init memtest(u64 pattern, phys_addr_t start_phys, phys_addr_t size)
+{
+ u64 *p, *start, *end;
+ phys_addr_t start_bad, last_bad;
+ phys_addr_t start_phys_aligned;
+ const size_t incr = sizeof(pattern);
+
+ start_phys_aligned = ALIGN(start_phys, incr);
+ start = __va(start_phys_aligned);
+ end = start + (size - (start_phys_aligned - start_phys)) / incr;
+ start_bad = 0;
+ last_bad = 0;
+
+ for (p = start; p < end; p++)
+ *p = pattern;
+
+ for (p = start; p < end; p++, start_phys_aligned += incr) {
+ if (*p == pattern)
+ continue;
+ if (start_phys_aligned == last_bad + incr) {
+ last_bad += incr;
+ continue;
+ }
+ if (start_bad)
+ reserve_bad_mem(pattern, start_bad, last_bad + incr);
+ start_bad = last_bad = start_phys_aligned;
+ }
+ if (start_bad)
+ reserve_bad_mem(pattern, start_bad, last_bad + incr);
+}
+
+static void __init do_one_pass(u64 pattern, phys_addr_t start, phys_addr_t end)
+{
+ u64 i;
+ phys_addr_t this_start, this_end;
+
+ for_each_free_mem_range(i, NUMA_NO_NODE, &this_start, &this_end, NULL) {
+ this_start = clamp(this_start, start, end);
+ this_end = clamp(this_end, start, end);
+ if (this_start < this_end) {
+ printk(KERN_INFO " %010llx - %010llx pattern %016llx\n",
+ (unsigned long long)this_start,
+ (unsigned long long)this_end,
+ (unsigned long long)cpu_to_be64(pattern));
+ memtest(pattern, this_start, this_end - this_start);
+ }
+ }
+}
+
+/* default is disabled */
+static int memtest_pattern __initdata;
+
+static int __init parse_memtest(char *arg)
+{
+ if (arg)
+ memtest_pattern = simple_strtoul(arg, NULL, 0);
+ else
+ memtest_pattern = ARRAY_SIZE(patterns);
+
+ return 0;
+}
+
+early_param("memtest", parse_memtest);
+
+void __init early_memtest(phys_addr_t start, phys_addr_t end)
+{
+ unsigned int i;
+ unsigned int idx = 0;
+
+ if (!memtest_pattern)
+ return;
+
+ printk(KERN_INFO "early_memtest: # of tests: %d\n", memtest_pattern);
+ for (i = memtest_pattern-1; i < UINT_MAX; --i) {
+ idx = i % ARRAY_SIZE(patterns);
+ do_one_pass(patterns[idx], start, end);
+ }
+}
return rc;
}
+/*
+ * gcc 4.7 and 4.8 on arm get an ICEs when inlining unmap_and_move(). Work
+ * around it.
+ */
+#if (GCC_VERSION >= 40700 && GCC_VERSION < 40900) && defined(CONFIG_ARM)
+#define ICE_noinline noinline
+#else
+#define ICE_noinline
+#endif
+
/*
* Obtain the lock on page, remove all ptes and migrate the page
* to the newly allocated page in newpage.
*/
-static int unmap_and_move(new_page_t get_new_page, free_page_t put_new_page,
- unsigned long private, struct page *page, int force,
- enum migrate_mode mode)
+static ICE_noinline int unmap_and_move(new_page_t get_new_page,
+ free_page_t put_new_page,
+ unsigned long private, struct page *page,
+ int force, enum migrate_mode mode)
{
int rc = 0;
int *result = NULL;
* page migration rate limiting control.
* Do not migrate more than @pages_to_migrate in a @migrate_interval_millisecs
* window of time. Default here says do not migrate more than 1280M per second.
- * If a node is rate-limited then PTE NUMA updates are also rate-limited. However
- * as it is faults that reset the window, pte updates will happen unconditionally
- * if there has not been a fault since @pteupdate_interval_millisecs after the
- * throttle window closed.
*/
static unsigned int migrate_interval_millisecs __read_mostly = 100;
-static unsigned int pteupdate_interval_millisecs __read_mostly = 1000;
static unsigned int ratelimit_pages __read_mostly = 128 << (20 - PAGE_SHIFT);
-/* Returns true if NUMA migration is currently rate limited */
-bool migrate_ratelimited(int node)
-{
- pg_data_t *pgdat = NODE_DATA(node);
-
- if (time_after(jiffies, pgdat->numabalancing_migrate_next_window +
- msecs_to_jiffies(pteupdate_interval_millisecs)))
- return false;
-
- if (pgdat->numabalancing_migrate_nr_pages < ratelimit_pages)
- return false;
-
- return true;
-}
-
/* Returns true if the node is migrate rate-limited after the update */
static bool numamigrate_update_ratelimit(pg_data_t *pgdat,
unsigned long nr_pages)
return nr_pages - 1;
}
-/**
- * __mlock_vma_pages_range() - mlock a range of pages in the vma.
- * @vma: target vma
- * @start: start address
- * @end: end address
- * @nonblocking:
- *
- * This takes care of making the pages present too.
- *
- * return 0 on success, negative error code on error.
- *
- * vma->vm_mm->mmap_sem must be held.
- *
- * If @nonblocking is NULL, it may be held for read or write and will
- * be unperturbed.
- *
- * If @nonblocking is non-NULL, it must held for read only and may be
- * released. If it's released, *@nonblocking will be set to 0.
- */
-long __mlock_vma_pages_range(struct vm_area_struct *vma,
- unsigned long start, unsigned long end, int *nonblocking)
-{
- struct mm_struct *mm = vma->vm_mm;
- unsigned long nr_pages = (end - start) / PAGE_SIZE;
- int gup_flags;
-
- VM_BUG_ON(start & ~PAGE_MASK);
- VM_BUG_ON(end & ~PAGE_MASK);
- VM_BUG_ON_VMA(start < vma->vm_start, vma);
- VM_BUG_ON_VMA(end > vma->vm_end, vma);
- VM_BUG_ON_MM(!rwsem_is_locked(&mm->mmap_sem), mm);
-
- gup_flags = FOLL_TOUCH | FOLL_MLOCK;
- /*
- * We want to touch writable mappings with a write fault in order
- * to break COW, except for shared mappings because these don't COW
- * and we would not want to dirty them for nothing.
- */
- if ((vma->vm_flags & (VM_WRITE | VM_SHARED)) == VM_WRITE)
- gup_flags |= FOLL_WRITE;
-
- /*
- * We want mlock to succeed for regions that have any permissions
- * other than PROT_NONE.
- */
- if (vma->vm_flags & (VM_READ | VM_WRITE | VM_EXEC))
- gup_flags |= FOLL_FORCE;
-
- /*
- * We made sure addr is within a VMA, so the following will
- * not result in a stack expansion that recurses back here.
- */
- return __get_user_pages(current, mm, start, nr_pages, gup_flags,
- NULL, NULL, nonblocking);
-}
-
/*
* convert get_user_pages() return value to posix mlock() error
*/
/*
* vm_flags is protected by the mmap_sem held in write mode.
* It's okay if try_to_unmap_one unmaps a page just after we
- * set VM_LOCKED, __mlock_vma_pages_range will bring it back.
+ * set VM_LOCKED, populate_vma_page_range will bring it back.
*/
if (lock)
return error;
}
-/*
- * __mm_populate - populate and/or mlock pages within a range of address space.
- *
- * This is used to implement mlock() and the MAP_POPULATE / MAP_LOCKED mmap
- * flags. VMAs must be already marked with the desired vm_flags, and
- * mmap_sem must not be held.
- */
-int __mm_populate(unsigned long start, unsigned long len, int ignore_errors)
-{
- struct mm_struct *mm = current->mm;
- unsigned long end, nstart, nend;
- struct vm_area_struct *vma = NULL;
- int locked = 0;
- long ret = 0;
-
- VM_BUG_ON(start & ~PAGE_MASK);
- VM_BUG_ON(len != PAGE_ALIGN(len));
- end = start + len;
-
- for (nstart = start; nstart < end; nstart = nend) {
- /*
- * We want to fault in pages for [nstart; end) address range.
- * Find first corresponding VMA.
- */
- if (!locked) {
- locked = 1;
- down_read(&mm->mmap_sem);
- vma = find_vma(mm, nstart);
- } else if (nstart >= vma->vm_end)
- vma = vma->vm_next;
- if (!vma || vma->vm_start >= end)
- break;
- /*
- * Set [nstart; nend) to intersection of desired address
- * range with the first VMA. Also, skip undesirable VMA types.
- */
- nend = min(end, vma->vm_end);
- if (vma->vm_flags & (VM_IO | VM_PFNMAP))
- continue;
- if (nstart < vma->vm_start)
- nstart = vma->vm_start;
- /*
- * Now fault in a range of pages. __mlock_vma_pages_range()
- * double checks the vma flags, so that it won't mlock pages
- * if the vma was already munlocked.
- */
- ret = __mlock_vma_pages_range(vma, nstart, nend, &locked);
- if (ret < 0) {
- if (ignore_errors) {
- ret = 0;
- continue; /* continue at next VMA */
- }
- ret = __mlock_posix_error_return(ret);
- break;
- }
- nend = nstart + ret * PAGE_SIZE;
- ret = 0;
- }
- if (locked)
- up_read(&mm->mmap_sem);
- return ret; /* 0 or negative error code */
-}
-
SYSCALL_DEFINE2(mlock, unsigned long, start, size_t, len)
{
unsigned long locked;
error = do_mlock(start, len, 1);
up_write(¤t->mm->mmap_sem);
- if (!error)
- error = __mm_populate(start, len, 0);
- return error;
+ if (error)
+ return error;
+
+ error = __mm_populate(start, len, 0);
+ if (error)
+ return __mlock_posix_error_return(error);
+ return 0;
}
SYSCALL_DEFINE2(munlock, unsigned long, start, size_t, len)
if (!prev || expand_stack(prev, addr))
return NULL;
if (prev->vm_flags & VM_LOCKED)
- __mlock_vma_pages_range(prev, addr, prev->vm_end, NULL);
+ populate_vma_page_range(prev, addr, prev->vm_end, NULL);
return prev;
}
#else
if (expand_stack(vma, addr))
return NULL;
if (vma->vm_flags & VM_LOCKED)
- __mlock_vma_pages_range(vma, addr, start, NULL);
+ populate_vma_page_range(vma, addr, start, NULL);
return vma;
}
#endif
old_len = new_len;
old_addr = new_addr;
new_addr = -ENOMEM;
- } else if (vma->vm_file && vma->vm_file->f_op->mremap)
- vma->vm_file->f_op->mremap(vma->vm_file, new_vma);
+ } else if (vma->vm_file && vma->vm_file->f_op->mremap) {
+ err = vma->vm_file->f_op->mremap(vma->vm_file, new_vma);
+ if (err < 0) {
+ move_page_tables(new_vma, new_addr, vma, old_addr,
+ moved_len, true);
+ return err;
+ }
+ }
/* Conceal VM_ACCOUNT so old reservation is not undone */
if (vm_flags & VM_ACCOUNT) {
* Determines whether the kernel must panic because of the panic_on_oom sysctl.
*/
void check_panic_on_oom(enum oom_constraint constraint, gfp_t gfp_mask,
- int order, const nodemask_t *nodemask)
+ int order, const nodemask_t *nodemask,
+ struct mem_cgroup *memcg)
{
if (likely(!sysctl_panic_on_oom))
return;
if (constraint != CONSTRAINT_NONE)
return;
}
- dump_header(NULL, gfp_mask, order, NULL, nodemask);
+ dump_header(NULL, gfp_mask, order, memcg, nodemask);
panic("Out of memory: %s panic_on_oom is enabled\n",
sysctl_panic_on_oom == 2 ? "compulsory" : "system-wide");
}
constraint = constrained_alloc(zonelist, gfp_mask, nodemask,
&totalpages);
mpol_mask = (constraint == CONSTRAINT_MEMORY_POLICY) ? nodemask : NULL;
- check_panic_on_oom(constraint, gfp_mask, order, mpol_mask);
+ check_panic_on_oom(constraint, gfp_mask, order, mpol_mask, NULL);
if (sysctl_oom_kill_allocating_task && current->mm &&
!oom_unkillable_task(current, NULL, nodemask) &&
}
EXPORT_SYMBOL(account_page_dirtied);
+/*
+ * Helper function for deaccounting dirty page without writeback.
+ *
+ * Doing this should *normally* only ever be done when a page
+ * is truncated, and is not actually mapped anywhere at all. However,
+ * fs/buffer.c does this when it notices that somebody has cleaned
+ * out all the buffers on a page without actually doing it through
+ * the VM. Can you say "ext3 is horribly ugly"? Thought you could.
+ */
+void account_page_cleaned(struct page *page, struct address_space *mapping)
+{
+ if (mapping_cap_account_dirty(mapping)) {
+ dec_zone_page_state(page, NR_FILE_DIRTY);
+ dec_bdi_stat(inode_to_bdi(mapping->host), BDI_RECLAIMABLE);
+ task_io_account_cancelled_write(PAGE_CACHE_SIZE);
+ }
+}
+EXPORT_SYMBOL(account_page_cleaned);
+
/*
* For address_spaces which do not use buffers. Just tag the page as dirty in
* its radix tree.
static int fallbacks[MIGRATE_TYPES][4] = {
[MIGRATE_UNMOVABLE] = { MIGRATE_RECLAIMABLE, MIGRATE_MOVABLE, MIGRATE_RESERVE },
[MIGRATE_RECLAIMABLE] = { MIGRATE_UNMOVABLE, MIGRATE_MOVABLE, MIGRATE_RESERVE },
+ [MIGRATE_MOVABLE] = { MIGRATE_RECLAIMABLE, MIGRATE_UNMOVABLE, MIGRATE_RESERVE },
#ifdef CONFIG_CMA
- [MIGRATE_MOVABLE] = { MIGRATE_CMA, MIGRATE_RECLAIMABLE, MIGRATE_UNMOVABLE, MIGRATE_RESERVE },
[MIGRATE_CMA] = { MIGRATE_RESERVE }, /* Never used */
-#else
- [MIGRATE_MOVABLE] = { MIGRATE_RECLAIMABLE, MIGRATE_UNMOVABLE, MIGRATE_RESERVE },
#endif
[MIGRATE_RESERVE] = { MIGRATE_RESERVE }, /* Never used */
#ifdef CONFIG_MEMORY_ISOLATION
#endif
};
+#ifdef CONFIG_CMA
+static struct page *__rmqueue_cma_fallback(struct zone *zone,
+ unsigned int order)
+{
+ return __rmqueue_smallest(zone, order, MIGRATE_CMA);
+}
+#else
+static inline struct page *__rmqueue_cma_fallback(struct zone *zone,
+ unsigned int order) { return NULL; }
+#endif
+
/*
* Move the free pages in a range to the free lists of the requested type.
* Note that start_page and end_pages are not aligned on a pageblock
* as fragmentation caused by those allocations polluting movable pageblocks
* is worse than movable allocations stealing from unmovable and reclaimable
* pageblocks.
- *
- * If we claim more than half of the pageblock, change pageblock's migratetype
- * as well.
*/
-static void try_to_steal_freepages(struct zone *zone, struct page *page,
- int start_type, int fallback_type)
+static bool can_steal_fallback(unsigned int order, int start_mt)
+{
+ /*
+ * Leaving this order check is intended, although there is
+ * relaxed order check in next check. The reason is that
+ * we can actually steal whole pageblock if this condition met,
+ * but, below check doesn't guarantee it and that is just heuristic
+ * so could be changed anytime.
+ */
+ if (order >= pageblock_order)
+ return true;
+
+ if (order >= pageblock_order / 2 ||
+ start_mt == MIGRATE_RECLAIMABLE ||
+ start_mt == MIGRATE_UNMOVABLE ||
+ page_group_by_mobility_disabled)
+ return true;
+
+ return false;
+}
+
+/*
+ * This function implements actual steal behaviour. If order is large enough,
+ * we can steal whole pageblock. If not, we first move freepages in this
+ * pageblock and check whether half of pages are moved or not. If half of
+ * pages are moved, we can change migratetype of pageblock and permanently
+ * use it's pages as requested migratetype in the future.
+ */
+static void steal_suitable_fallback(struct zone *zone, struct page *page,
+ int start_type)
{
int current_order = page_order(page);
+ int pages;
/* Take ownership for orders >= pageblock_order */
if (current_order >= pageblock_order) {
return;
}
- if (current_order >= pageblock_order / 2 ||
- start_type == MIGRATE_RECLAIMABLE ||
- start_type == MIGRATE_UNMOVABLE ||
- page_group_by_mobility_disabled) {
- int pages;
+ pages = move_freepages_block(zone, page, start_type);
+
+ /* Claim the whole block if over half of it is free */
+ if (pages >= (1 << (pageblock_order-1)) ||
+ page_group_by_mobility_disabled)
+ set_pageblock_migratetype(page, start_type);
+}
+
+/*
+ * Check whether there is a suitable fallback freepage with requested order.
+ * If only_stealable is true, this function returns fallback_mt only if
+ * we can steal other freepages all together. This would help to reduce
+ * fragmentation due to mixed migratetype pages in one pageblock.
+ */
+int find_suitable_fallback(struct free_area *area, unsigned int order,
+ int migratetype, bool only_stealable, bool *can_steal)
+{
+ int i;
+ int fallback_mt;
+
+ if (area->nr_free == 0)
+ return -1;
+
+ *can_steal = false;
+ for (i = 0;; i++) {
+ fallback_mt = fallbacks[migratetype][i];
+ if (fallback_mt == MIGRATE_RESERVE)
+ break;
+
+ if (list_empty(&area->free_list[fallback_mt]))
+ continue;
- pages = move_freepages_block(zone, page, start_type);
+ if (can_steal_fallback(order, migratetype))
+ *can_steal = true;
- /* Claim the whole block if over half of it is free */
- if (pages >= (1 << (pageblock_order-1)) ||
- page_group_by_mobility_disabled)
- set_pageblock_migratetype(page, start_type);
+ if (!only_stealable)
+ return fallback_mt;
+
+ if (*can_steal)
+ return fallback_mt;
}
+
+ return -1;
}
/* Remove an element from the buddy allocator from the fallback list */
struct free_area *area;
unsigned int current_order;
struct page *page;
+ int fallback_mt;
+ bool can_steal;
/* Find the largest possible block of pages in the other list */
for (current_order = MAX_ORDER-1;
current_order >= order && current_order <= MAX_ORDER-1;
--current_order) {
- int i;
- for (i = 0;; i++) {
- int migratetype = fallbacks[start_migratetype][i];
- int buddy_type = start_migratetype;
-
- /* MIGRATE_RESERVE handled later if necessary */
- if (migratetype == MIGRATE_RESERVE)
- break;
-
- area = &(zone->free_area[current_order]);
- if (list_empty(&area->free_list[migratetype]))
- continue;
-
- page = list_entry(area->free_list[migratetype].next,
- struct page, lru);
- area->nr_free--;
-
- if (!is_migrate_cma(migratetype)) {
- try_to_steal_freepages(zone, page,
- start_migratetype,
- migratetype);
- } else {
- /*
- * When borrowing from MIGRATE_CMA, we need to
- * release the excess buddy pages to CMA
- * itself, and we do not try to steal extra
- * free pages.
- */
- buddy_type = migratetype;
- }
+ area = &(zone->free_area[current_order]);
+ fallback_mt = find_suitable_fallback(area, current_order,
+ start_migratetype, false, &can_steal);
+ if (fallback_mt == -1)
+ continue;
- /* Remove the page from the freelists */
- list_del(&page->lru);
- rmv_page_order(page);
+ page = list_entry(area->free_list[fallback_mt].next,
+ struct page, lru);
+ if (can_steal)
+ steal_suitable_fallback(zone, page, start_migratetype);
- expand(zone, page, order, current_order, area,
- buddy_type);
+ /* Remove the page from the freelists */
+ area->nr_free--;
+ list_del(&page->lru);
+ rmv_page_order(page);
- /*
- * The freepage_migratetype may differ from pageblock's
- * migratetype depending on the decisions in
- * try_to_steal_freepages(). This is OK as long as it
- * does not differ for MIGRATE_CMA pageblocks. For CMA
- * we need to make sure unallocated pages flushed from
- * pcp lists are returned to the correct freelist.
- */
- set_freepage_migratetype(page, buddy_type);
+ expand(zone, page, order, current_order, area,
+ start_migratetype);
+ /*
+ * The freepage_migratetype may differ from pageblock's
+ * migratetype depending on the decisions in
+ * try_to_steal_freepages(). This is OK as long as it
+ * does not differ for MIGRATE_CMA pageblocks. For CMA
+ * we need to make sure unallocated pages flushed from
+ * pcp lists are returned to the correct freelist.
+ */
+ set_freepage_migratetype(page, start_migratetype);
- trace_mm_page_alloc_extfrag(page, order, current_order,
- start_migratetype, migratetype);
+ trace_mm_page_alloc_extfrag(page, order, current_order,
+ start_migratetype, fallback_mt);
- return page;
- }
+ return page;
}
return NULL;
page = __rmqueue_smallest(zone, order, migratetype);
if (unlikely(!page) && migratetype != MIGRATE_RESERVE) {
- page = __rmqueue_fallback(zone, order, migratetype);
+ if (migratetype == MIGRATE_MOVABLE)
+ page = __rmqueue_cma_fallback(zone, order);
+
+ if (!page)
+ page = __rmqueue_fallback(zone, order, migratetype);
/*
* Use MIGRATE_RESERVE rather than fail an allocation. goto
*did_some_progress = 1;
goto out;
}
- /*
- * GFP_THISNODE contains __GFP_NORETRY and we never hit this.
- * Sanity check for bare calls of __GFP_THISNODE, not real OOM.
- * The caller should handle page allocation failure by itself if
- * it specifies __GFP_THISNODE.
- * Note: Hugepage uses it but will hit PAGE_ALLOC_COSTLY_ORDER.
- */
+ /* The OOM killer may not free memory on a specific node */
if (gfp_mask & __GFP_THISNODE)
goto out;
}
}
/*
- * GFP_THISNODE (meaning __GFP_THISNODE, __GFP_NORETRY and
- * __GFP_NOWARN set) should not cause reclaim since the subsystem
- * (f.e. slab) using GFP_THISNODE may choose to trigger reclaim
- * using a larger set of nodes after it has established that the
- * allowed per node queues are empty and that nodes are
- * over allocated.
+ * If this allocation cannot block and it is for a specific node, then
+ * fail early. There's no need to wakeup kswapd or retry for a
+ * speculative node-specific allocation.
*/
- if (IS_ENABLED(CONFIG_NUMA) &&
- (gfp_mask & GFP_THISNODE) == GFP_THISNODE)
+ if (IS_ENABLED(CONFIG_NUMA) && (gfp_mask & __GFP_THISNODE) && !wait)
goto nopage;
retry:
/*
* Check the zones suitable for the gfp_mask contain at least one
* valid zone. It's possible to have an empty zonelist as a result
- * of GFP_THISNODE and a memoryless node
+ * of __GFP_THISNODE and a memoryless node
*/
if (unlikely(!zonelist->_zonerefs->zone))
return NULL;
* Show free area list (used inside shift_scroll-lock stuff)
* We also calculate the percentage fragmentation. We do this by counting the
* memory on each free list with the exception of the first item on the list.
- * Suppresses nodes that are not allowed by current's cpuset if
- * SHOW_MEM_FILTER_NODES is passed.
+ *
+ * Bits in @filter:
+ * SHOW_MEM_FILTER_NODES: suppress nodes that are not allowed by current's
+ * cpuset.
*/
void show_free_areas(unsigned int filter)
{
+ unsigned long free_pcp = 0;
int cpu;
struct zone *zone;
for_each_populated_zone(zone) {
if (skip_free_areas_node(filter, zone_to_nid(zone)))
continue;
- show_node(zone);
- printk("%s per-cpu:\n", zone->name);
- for_each_online_cpu(cpu) {
- struct per_cpu_pageset *pageset;
-
- pageset = per_cpu_ptr(zone->pageset, cpu);
-
- printk("CPU %4d: hi:%5d, btch:%4d usd:%4d\n",
- cpu, pageset->pcp.high,
- pageset->pcp.batch, pageset->pcp.count);
- }
+ for_each_online_cpu(cpu)
+ free_pcp += per_cpu_ptr(zone->pageset, cpu)->pcp.count;
}
printk("active_anon:%lu inactive_anon:%lu isolated_anon:%lu\n"
" active_file:%lu inactive_file:%lu isolated_file:%lu\n"
- " unevictable:%lu"
- " dirty:%lu writeback:%lu unstable:%lu\n"
- " free:%lu slab_reclaimable:%lu slab_unreclaimable:%lu\n"
+ " unevictable:%lu dirty:%lu writeback:%lu unstable:%lu\n"
+ " slab_reclaimable:%lu slab_unreclaimable:%lu\n"
" mapped:%lu shmem:%lu pagetables:%lu bounce:%lu\n"
- " free_cma:%lu\n",
+ " free:%lu free_pcp:%lu free_cma:%lu\n",
global_page_state(NR_ACTIVE_ANON),
global_page_state(NR_INACTIVE_ANON),
global_page_state(NR_ISOLATED_ANON),
global_page_state(NR_FILE_DIRTY),
global_page_state(NR_WRITEBACK),
global_page_state(NR_UNSTABLE_NFS),
- global_page_state(NR_FREE_PAGES),
global_page_state(NR_SLAB_RECLAIMABLE),
global_page_state(NR_SLAB_UNRECLAIMABLE),
global_page_state(NR_FILE_MAPPED),
global_page_state(NR_SHMEM),
global_page_state(NR_PAGETABLE),
global_page_state(NR_BOUNCE),
+ global_page_state(NR_FREE_PAGES),
+ free_pcp,
global_page_state(NR_FREE_CMA_PAGES));
for_each_populated_zone(zone) {
if (skip_free_areas_node(filter, zone_to_nid(zone)))
continue;
+
+ free_pcp = 0;
+ for_each_online_cpu(cpu)
+ free_pcp += per_cpu_ptr(zone->pageset, cpu)->pcp.count;
+
show_node(zone);
printk("%s"
" free:%lukB"
" pagetables:%lukB"
" unstable:%lukB"
" bounce:%lukB"
+ " free_pcp:%lukB"
+ " local_pcp:%ukB"
" free_cma:%lukB"
" writeback_tmp:%lukB"
" pages_scanned:%lu"
K(zone_page_state(zone, NR_PAGETABLE)),
K(zone_page_state(zone, NR_UNSTABLE_NFS)),
K(zone_page_state(zone, NR_BOUNCE)),
+ K(free_pcp),
+ K(this_cpu_read(zone->pageset->pcp.count)),
K(zone_page_state(zone, NR_FREE_CMA_PAGES)),
K(zone_page_state(zone, NR_WRITEBACK_TEMP)),
K(zone_page_state(zone, NR_PAGES_SCANNED)),
* value here.
*
* The WMARK_HIGH-WMARK_LOW and (WMARK_LOW-WMARK_MIN)
- * deltas controls asynch page reclaim, and so should
+ * deltas control asynch page reclaim, and so should
* not be capped for highmem.
*/
unsigned long min_pages;
#include <linux/buffer_head.h>
#include <linux/writeback.h>
#include <linux/frontswap.h>
-#include <linux/aio.h>
#include <linux/blkdev.h>
+#include <linux/uio.h>
#include <asm/pgtable.h>
static struct bio *get_swap_bio(gfp_t gfp_flags,
iov_iter_bvec(&from, ITER_BVEC | WRITE, &bv, 1, PAGE_SIZE);
init_sync_kiocb(&kiocb, swap_file);
kiocb.ki_pos = page_file_offset(page);
- kiocb.ki_nbytes = PAGE_SIZE;
set_page_writeback(page);
unlock_page(page);
* and, from the second one, the backing allocator (currently either vm or
* km) provides translation.
*
- * The addr can be tranlated simply without checking if it falls into the
+ * The addr can be translated simply without checking if it falls into the
* first chunk. But the current code reflects better how percpu allocator
* actually works, and the verification can discover both bugs in percpu
* allocator itself and per_cpu_ptr_to_phys() callers. So we keep current
* and other parameters considering needed percpu size, allocation
* atom size and distances between CPUs.
*
- * Groups are always mutliples of atom size and CPUs which are of
+ * Groups are always multiples of atom size and CPUs which are of
* LOCAL_DISTANCE both ways are grouped together and share space for
* units in the same group. The returned configuration is guaranteed
* to have CPUs on different nodes on different groups and >=75% usage
struct iovec *iov_r = iovstack_r;
struct iov_iter iter;
ssize_t rc;
+ int dir = vm_write ? WRITE : READ;
if (flags != 0)
return -EINVAL;
/* Check iovecs */
- if (vm_write)
- rc = rw_copy_check_uvector(WRITE, lvec, liovcnt, UIO_FASTIOV,
- iovstack_l, &iov_l);
- else
- rc = rw_copy_check_uvector(READ, lvec, liovcnt, UIO_FASTIOV,
- iovstack_l, &iov_l);
- if (rc <= 0)
+ rc = import_iovec(dir, lvec, liovcnt, UIO_FASTIOV, &iov_l, &iter);
+ if (rc < 0)
+ return rc;
+ if (!iov_iter_count(&iter))
goto free_iovecs;
- iov_iter_init(&iter, vm_write ? WRITE : READ, iov_l, liovcnt, rc);
-
rc = rw_copy_check_uvector(CHECK_IOVEC_ONLY, rvec, riovcnt, UIO_FASTIOV,
iovstack_r, &iov_r);
if (rc <= 0)
free_iovecs:
if (iov_r != iovstack_r)
kfree(iov_r);
- if (iov_l != iovstack_l)
- kfree(iov_l);
+ kfree(iov_l);
return rc;
}
struct iovec *iov_r = iovstack_r;
struct iov_iter iter;
ssize_t rc = -EFAULT;
+ int dir = vm_write ? WRITE : READ;
if (flags != 0)
return -EINVAL;
- if (vm_write)
- rc = compat_rw_copy_check_uvector(WRITE, lvec, liovcnt,
- UIO_FASTIOV, iovstack_l,
- &iov_l);
- else
- rc = compat_rw_copy_check_uvector(READ, lvec, liovcnt,
- UIO_FASTIOV, iovstack_l,
- &iov_l);
- if (rc <= 0)
+ rc = compat_import_iovec(dir, lvec, liovcnt, UIO_FASTIOV, &iov_l, &iter);
+ if (rc < 0)
+ return rc;
+ if (!iov_iter_count(&iter))
goto free_iovecs;
- iov_iter_init(&iter, vm_write ? WRITE : READ, iov_l, liovcnt, rc);
rc = compat_rw_copy_check_uvector(CHECK_IOVEC_ONLY, rvec, riovcnt,
UIO_FASTIOV, iovstack_r,
&iov_r);
free_iovecs:
if (iov_r != iovstack_r)
kfree(iov_r);
- if (iov_l != iovstack_l)
- kfree(iov_l);
+ kfree(iov_l);
return rc;
}
#include <linux/mm.h>
#include <linux/export.h>
#include <linux/swap.h>
-#include <linux/aio.h>
+#include <linux/uio.h>
static struct vfsmount *shm_mnt;
return NULL;
}
+static inline gfp_t gfp_exact_node(gfp_t flags)
+{
+ return flags;
+}
+
#else /* CONFIG_NUMA */
static void *____cache_alloc_node(struct kmem_cache *, gfp_t, int);
return __cache_free_alien(cachep, objp, node, page_node);
}
+
+/*
+ * Construct gfp mask to allocate from a specific node but do not invoke reclaim
+ * or warn about failures.
+ */
+static inline gfp_t gfp_exact_node(gfp_t flags)
+{
+ return (flags | __GFP_THISNODE | __GFP_NOWARN) & ~__GFP_WAIT;
+}
#endif
/*
if (unlikely(!ac->avail)) {
int x;
force_grow:
- x = cache_grow(cachep, flags | GFP_THISNODE, node, NULL);
+ x = cache_grow(cachep, gfp_exact_node(flags), node, NULL);
/* cache_grow can reenable interrupts, then ac could change. */
ac = cpu_cache_get(cachep);
get_node(cache, nid) &&
get_node(cache, nid)->free_objects) {
obj = ____cache_alloc_node(cache,
- flags | GFP_THISNODE, nid);
+ gfp_exact_node(flags), nid);
if (obj)
break;
}
nid = page_to_nid(page);
if (cache_grow(cache, flags, nid, page)) {
obj = ____cache_alloc_node(cache,
- flags | GFP_THISNODE, nid);
+ gfp_exact_node(flags), nid);
if (!obj)
/*
* Another processor may allocate the
must_grow:
spin_unlock(&n->list_lock);
- x = cache_grow(cachep, flags | GFP_THISNODE, nodeid, NULL);
+ x = cache_grow(cachep, gfp_exact_node(flags), nodeid, NULL);
if (x)
goto retry;
return 0;
}
-void *slob_alloc_node(struct kmem_cache *c, gfp_t flags, int node)
+static void *slob_alloc_node(struct kmem_cache *c, gfp_t flags, int node)
{
void *b;
kmemleak_alloc_recursive(b, c->size, 1, c->flags, flags);
return b;
}
-EXPORT_SYMBOL(slob_alloc_node);
void *kmem_cache_alloc(struct kmem_cache *cachep, gfp_t flags)
{
if (cmpxchg_double(&page->freelist, &page->counters,
freelist_old, counters_old,
freelist_new, counters_new))
- return 1;
+ return true;
} else
#endif
{
page->freelist = freelist_new;
set_page_slub_counters(page, counters_new);
slab_unlock(page);
- return 1;
+ return true;
}
slab_unlock(page);
}
pr_info("%s %s: cmpxchg double redo ", n, s->name);
#endif
- return 0;
+ return false;
}
static inline bool cmpxchg_double_slab(struct kmem_cache *s, struct page *page,
if (cmpxchg_double(&page->freelist, &page->counters,
freelist_old, counters_old,
freelist_new, counters_new))
- return 1;
+ return true;
} else
#endif
{
set_page_slub_counters(page, counters_new);
slab_unlock(page);
local_irq_restore(flags);
- return 1;
+ return true;
}
slab_unlock(page);
local_irq_restore(flags);
pr_info("%s %s: cmpxchg double redo ", n, s->name);
#endif
- return 0;
+ return false;
}
#ifdef CONFIG_SLUB_DEBUG
*/
goto check_slabs;
- if (tolower(*str) == 'o') {
- /*
- * Avoid enabling debugging on caches if its minimum order
- * would increase as a result.
- */
- disable_higher_order_debug = 1;
- goto out;
- }
-
slub_debug = 0;
if (*str == '-')
/*
case 'a':
slub_debug |= SLAB_FAILSLAB;
break;
+ case 'o':
+ /*
+ * Avoid enabling debugging on caches if its minimum
+ * order would increase as a result.
+ */
+ disable_higher_order_debug = 1;
+ break;
default:
pr_err("slub_debug option '%c' unknown. skipped\n",
*str);
(*invalidatepage)(page, offset, length);
}
-/*
- * This cancels just the dirty bit on the kernel page itself, it
- * does NOT actually remove dirty bits on any mmap's that may be
- * around. It also leaves the page tagged dirty, so any sync
- * activity will still find it on the dirty lists, and in particular,
- * clear_page_dirty_for_io() will still look at the dirty bits in
- * the VM.
- *
- * Doing this should *normally* only ever be done when a page
- * is truncated, and is not actually mapped anywhere at all. However,
- * fs/buffer.c does this when it notices that somebody has cleaned
- * out all the buffers on a page without actually doing it through
- * the VM. Can you say "ext3 is horribly ugly"? Tought you could.
- */
-void cancel_dirty_page(struct page *page, unsigned int account_size)
-{
- if (TestClearPageDirty(page)) {
- struct address_space *mapping = page->mapping;
- if (mapping && mapping_cap_account_dirty(mapping)) {
- dec_zone_page_state(page, NR_FILE_DIRTY);
- dec_bdi_stat(inode_to_bdi(mapping->host),
- BDI_RECLAIMABLE);
- if (account_size)
- task_io_account_cancelled_write(account_size);
- }
- }
-}
-EXPORT_SYMBOL(cancel_dirty_page);
-
/*
* If truncate cannot remove the fs-private metadata from the page, the page
* becomes orphaned. It will be left on the LRU and may even be mapped into
if (page_has_private(page))
do_invalidatepage(page, 0, PAGE_CACHE_SIZE);
- cancel_dirty_page(page, PAGE_CACHE_SIZE);
+ /*
+ * Some filesystems seem to re-dirty the page even after
+ * the VM has canceled the dirty bit (eg ext3 journaling).
+ * Hence dirty accounting check is placed after invalidation.
+ */
+ if (TestClearPageDirty(page))
+ account_page_cleaned(page, mapping);
ClearPageMappedToDisk(page);
delete_from_page_cache(page);
#include <linux/atomic.h>
#include <linux/compiler.h>
#include <linux/llist.h>
+#include <linux/bitops.h>
#include <asm/uaccess.h>
#include <asm/tlbflush.h>
pmd = pmd_offset(pud, addr);
do {
next = pmd_addr_end(addr, end);
+ if (pmd_clear_huge(pmd))
+ continue;
if (pmd_none_or_clear_bad(pmd))
continue;
vunmap_pte_range(pmd, addr, next);
pud = pud_offset(pgd, addr);
do {
next = pud_addr_end(addr, end);
+ if (pud_clear_huge(pud))
+ continue;
if (pud_none_or_clear_bad(pud))
continue;
vunmap_pmd_range(pud, addr, next);
BUG_ON(in_interrupt());
if (flags & VM_IOREMAP)
- align = 1ul << clamp(fls(size), PAGE_SHIFT, IOREMAP_MAX_ORDER);
+ align = 1ul << clamp_t(int, fls_long(size),
+ PAGE_SHIFT, IOREMAP_MAX_ORDER);
size = PAGE_ALIGN(size);
if (unlikely(!size))
qos.rxtp.max_pcr = rx_pcr;
qos.rxtp.max_sdu = rx_sdu;
qos.aal = ATM_AAL5;
- dprintk("parse_qos(): setting qos paramameters to tx=%d,%d rx=%d,%d\n",
+ dprintk("parse_qos(): setting qos parameters to tx=%d,%d rx=%d,%d\n",
qos.txtp.max_pcr, qos.txtp.max_sdu,
qos.rxtp.max_pcr, qos.rxtp.max_sdu);
IPPROTO_TCP, &sock);
if (ret)
return ret;
- sock->sk->sk_allocation = GFP_NOFS | __GFP_MEMALLOC;
+ sock->sk->sk_allocation = GFP_NOFS;
#ifdef CONFIG_LOCKDEP
lockdep_set_class(&sock->sk->sk_lock, &socket_class);
ret);
}
- sk_set_memalloc(sock->sk);
-
con->sock = sock;
return 0;
}
{
struct ceph_connection *con = container_of(work, struct ceph_connection,
work.work);
- unsigned long pflags = current->flags;
bool fault;
- current->flags |= PF_MEMALLOC;
-
mutex_lock(&con->mutex);
while (true) {
int ret;
con_fault_finish(con);
con->ops->put(con);
-
- tsk_restore_flags(current, pflags, PF_MEMALLOC);
}
/*
#include <linux/stddef.h>
#include <linux/slab.h>
#include <linux/errno.h>
-#include <linux/aio.h>
#include <linux/kernel.h>
#include <linux/export.h>
#include <linux/spinlock.h>
#include "debug.h"
#define CREATE_TRACE_POINTS
#include "trace.h"
+#include "trace_msg.h"
#ifdef CONFIG_MAC80211_MESSAGE_TRACING
void __sdata_info(const char *fmt, ...)
)
);
-#ifdef CONFIG_MAC80211_MESSAGE_TRACING
-#undef TRACE_SYSTEM
-#define TRACE_SYSTEM mac80211_msg
-
-#define MAX_MSG_LEN 100
-
-DECLARE_EVENT_CLASS(mac80211_msg_event,
- TP_PROTO(struct va_format *vaf),
-
- TP_ARGS(vaf),
-
- TP_STRUCT__entry(
- __dynamic_array(char, msg, MAX_MSG_LEN)
- ),
-
- TP_fast_assign(
- WARN_ON_ONCE(vsnprintf(__get_dynamic_array(msg),
- MAX_MSG_LEN, vaf->fmt,
- *vaf->va) >= MAX_MSG_LEN);
- ),
-
- TP_printk("%s", __get_str(msg))
-);
-
-DEFINE_EVENT(mac80211_msg_event, mac80211_info,
- TP_PROTO(struct va_format *vaf),
- TP_ARGS(vaf)
-);
-DEFINE_EVENT(mac80211_msg_event, mac80211_dbg,
- TP_PROTO(struct va_format *vaf),
- TP_ARGS(vaf)
-);
-DEFINE_EVENT(mac80211_msg_event, mac80211_err,
- TP_PROTO(struct va_format *vaf),
- TP_ARGS(vaf)
-);
-#endif
-
#endif /* !__MAC80211_DRIVER_TRACE || TRACE_HEADER_MULTI_READ */
#undef TRACE_INCLUDE_PATH
--- /dev/null
+#ifdef CONFIG_MAC80211_MESSAGE_TRACING
+
+#if !defined(__MAC80211_MSG_DRIVER_TRACE) || defined(TRACE_HEADER_MULTI_READ)
+#define __MAC80211_MSG_DRIVER_TRACE
+
+#include <linux/tracepoint.h>
+#include <net/mac80211.h>
+#include "ieee80211_i.h"
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM mac80211_msg
+
+#define MAX_MSG_LEN 100
+
+DECLARE_EVENT_CLASS(mac80211_msg_event,
+ TP_PROTO(struct va_format *vaf),
+
+ TP_ARGS(vaf),
+
+ TP_STRUCT__entry(
+ __dynamic_array(char, msg, MAX_MSG_LEN)
+ ),
+
+ TP_fast_assign(
+ WARN_ON_ONCE(vsnprintf(__get_dynamic_array(msg),
+ MAX_MSG_LEN, vaf->fmt,
+ *vaf->va) >= MAX_MSG_LEN);
+ ),
+
+ TP_printk("%s", __get_str(msg))
+);
+
+DEFINE_EVENT(mac80211_msg_event, mac80211_info,
+ TP_PROTO(struct va_format *vaf),
+ TP_ARGS(vaf)
+);
+DEFINE_EVENT(mac80211_msg_event, mac80211_dbg,
+ TP_PROTO(struct va_format *vaf),
+ TP_ARGS(vaf)
+);
+DEFINE_EVENT(mac80211_msg_event, mac80211_err,
+ TP_PROTO(struct va_format *vaf),
+ TP_ARGS(vaf)
+);
+#endif /* !__MAC80211_MSG_DRIVER_TRACE || TRACE_HEADER_MULTI_READ */
+
+#undef TRACE_INCLUDE_PATH
+#define TRACE_INCLUDE_PATH .
+#undef TRACE_INCLUDE_FILE
+#define TRACE_INCLUDE_FILE trace_msg
+#include <trace/define_trace.h>
+
+#endif
new_stats =
kmem_cache_alloc_node(flow_stats_cache,
- GFP_THISNODE |
+ GFP_NOWAIT |
+ __GFP_THISNODE |
+ __GFP_NOWARN |
__GFP_NOMEMALLOC,
node);
if (likely(new_stats)) {
init_sync_kiocb(&iocb, NULL);
ret = nosec ? __sock_sendmsg_nosec(&iocb, sock, msg, size) :
__sock_sendmsg(&iocb, sock, msg, size);
- if (-EIOCBQUEUED == ret)
- ret = wait_on_sync_kiocb(&iocb);
+ BUG_ON(ret == -EIOCBQUEUED);
return ret;
}
init_sync_kiocb(&iocb, NULL);
ret = __sock_recvmsg(&iocb, sock, msg, size, flags);
- if (-EIOCBQUEUED == ret)
- ret = wait_on_sync_kiocb(&iocb);
+ BUG_ON(ret == -EIOCBQUEUED);
return ret;
}
EXPORT_SYMBOL(sock_recvmsg);
init_sync_kiocb(&iocb, NULL);
ret = __sock_recvmsg_nosec(&iocb, sock, msg, size, flags);
- if (-EIOCBQUEUED == ret)
- ret = wait_on_sync_kiocb(&iocb);
+ BUG_ON(ret == -EIOCBQUEUED);
return ret;
}
if (iocb->ki_pos != 0)
return -ESPIPE;
- if (iocb->ki_nbytes == 0) /* Match SYS5 behaviour */
+ if (!iov_iter_count(to)) /* Match SYS5 behaviour */
return 0;
res = __sock_recvmsg(iocb, sock, &msg,
- iocb->ki_nbytes, msg.msg_flags);
+ iov_iter_count(to), msg.msg_flags);
*to = msg.msg_iter;
return res;
}
if (sock->type == SOCK_SEQPACKET)
msg.msg_flags |= MSG_EOR;
- res = __sock_sendmsg(iocb, sock, &msg, iocb->ki_nbytes);
+ res = __sock_sendmsg(iocb, sock, &msg, iov_iter_count(from));
*from = msg.msg_iter;
return res;
}
int i, rc;
i = (buf->rb_max_requests + 1) * RPCRDMA_MAX_SEGS;
- dprintk("RPC: %s: initalizing %d FMRs\n", __func__, i);
+ dprintk("RPC: %s: initializing %d FMRs\n", __func__, i);
while (i--) {
r = kzalloc(sizeof(*r), GFP_KERNEL);
int i, rc;
i = (buf->rb_max_requests + 1) * RPCRDMA_MAX_SEGS;
- dprintk("RPC: %s: initalizing %d FRMRs\n", __func__, i);
+ dprintk("RPC: %s: initializing %d FRMRs\n", __func__, i);
while (i--) {
r = kzalloc(sizeof(*r), GFP_KERNEL);
hostprogs-y += sock_example
hostprogs-y += sockex1
hostprogs-y += sockex2
+hostprogs-y += tracex1
+hostprogs-y += tracex2
+hostprogs-y += tracex3
+hostprogs-y += tracex4
test_verifier-objs := test_verifier.o libbpf.o
test_maps-objs := test_maps.o libbpf.o
sock_example-objs := sock_example.o libbpf.o
sockex1-objs := bpf_load.o libbpf.o sockex1_user.o
sockex2-objs := bpf_load.o libbpf.o sockex2_user.o
+tracex1-objs := bpf_load.o libbpf.o tracex1_user.o
+tracex2-objs := bpf_load.o libbpf.o tracex2_user.o
+tracex3-objs := bpf_load.o libbpf.o tracex3_user.o
+tracex4-objs := bpf_load.o libbpf.o tracex4_user.o
# Tell kbuild to always build the programs
always := $(hostprogs-y)
always += sockex1_kern.o
always += sockex2_kern.o
+always += tracex1_kern.o
+always += tracex2_kern.o
+always += tracex3_kern.o
+always += tracex4_kern.o
HOSTCFLAGS += -I$(objtree)/usr/include
HOSTCFLAGS_bpf_load.o += -I$(objtree)/usr/include -Wno-unused-variable
HOSTLOADLIBES_sockex1 += -lelf
HOSTLOADLIBES_sockex2 += -lelf
+HOSTLOADLIBES_tracex1 += -lelf
+HOSTLOADLIBES_tracex2 += -lelf
+HOSTLOADLIBES_tracex3 += -lelf
+HOSTLOADLIBES_tracex4 += -lelf -lrt
# point this to your LLVM backend with bpf support
LLC=$(srctree)/tools/bpf/llvm/bld/Debug+Asserts/bin/llc
(void *) BPF_FUNC_map_update_elem;
static int (*bpf_map_delete_elem)(void *map, void *key) =
(void *) BPF_FUNC_map_delete_elem;
+static int (*bpf_probe_read)(void *dst, int size, void *unsafe_ptr) =
+ (void *) BPF_FUNC_probe_read;
+static unsigned long long (*bpf_ktime_get_ns)(void) =
+ (void *) BPF_FUNC_ktime_get_ns;
+static int (*bpf_trace_printk)(const char *fmt, int fmt_size, ...) =
+ (void *) BPF_FUNC_trace_printk;
/* llvm builtin functions that eBPF C program may use to
* emit BPF_LD_ABS and BPF_LD_IND instructions
#include <unistd.h>
#include <string.h>
#include <stdbool.h>
+#include <stdlib.h>
#include <linux/bpf.h>
#include <linux/filter.h>
+#include <linux/perf_event.h>
+#include <sys/syscall.h>
+#include <sys/ioctl.h>
+#include <sys/mman.h>
+#include <poll.h>
#include "libbpf.h"
#include "bpf_helpers.h"
#include "bpf_load.h"
+#define DEBUGFS "/sys/kernel/debug/tracing/"
+
static char license[128];
+static int kern_version;
static bool processed_sec[128];
int map_fd[MAX_MAPS];
int prog_fd[MAX_PROGS];
+int event_fd[MAX_PROGS];
int prog_cnt;
static int load_and_attach(const char *event, struct bpf_insn *prog, int size)
{
- int fd;
bool is_socket = strncmp(event, "socket", 6) == 0;
-
- if (!is_socket)
- /* tracing events tbd */
+ bool is_kprobe = strncmp(event, "kprobe/", 7) == 0;
+ bool is_kretprobe = strncmp(event, "kretprobe/", 10) == 0;
+ enum bpf_prog_type prog_type;
+ char buf[256];
+ int fd, efd, err, id;
+ struct perf_event_attr attr = {};
+
+ attr.type = PERF_TYPE_TRACEPOINT;
+ attr.sample_type = PERF_SAMPLE_RAW;
+ attr.sample_period = 1;
+ attr.wakeup_events = 1;
+
+ if (is_socket) {
+ prog_type = BPF_PROG_TYPE_SOCKET_FILTER;
+ } else if (is_kprobe || is_kretprobe) {
+ prog_type = BPF_PROG_TYPE_KPROBE;
+ } else {
+ printf("Unknown event '%s'\n", event);
return -1;
+ }
+
+ if (is_kprobe || is_kretprobe) {
+ if (is_kprobe)
+ event += 7;
+ else
+ event += 10;
+
+ snprintf(buf, sizeof(buf),
+ "echo '%c:%s %s' >> /sys/kernel/debug/tracing/kprobe_events",
+ is_kprobe ? 'p' : 'r', event, event);
+ err = system(buf);
+ if (err < 0) {
+ printf("failed to create kprobe '%s' error '%s'\n",
+ event, strerror(errno));
+ return -1;
+ }
+ }
- fd = bpf_prog_load(BPF_PROG_TYPE_SOCKET_FILTER,
- prog, size, license);
+ fd = bpf_prog_load(prog_type, prog, size, license, kern_version);
if (fd < 0) {
printf("bpf_prog_load() err=%d\n%s", errno, bpf_log_buf);
prog_fd[prog_cnt++] = fd;
+ if (is_socket)
+ return 0;
+
+ strcpy(buf, DEBUGFS);
+ strcat(buf, "events/kprobes/");
+ strcat(buf, event);
+ strcat(buf, "/id");
+
+ efd = open(buf, O_RDONLY, 0);
+ if (efd < 0) {
+ printf("failed to open event %s\n", event);
+ return -1;
+ }
+
+ err = read(efd, buf, sizeof(buf));
+ if (err < 0 || err >= sizeof(buf)) {
+ printf("read from '%s' failed '%s'\n", event, strerror(errno));
+ return -1;
+ }
+
+ close(efd);
+
+ buf[err] = 0;
+ id = atoi(buf);
+ attr.config = id;
+
+ efd = perf_event_open(&attr, -1/*pid*/, 0/*cpu*/, -1/*group_fd*/, 0);
+ if (efd < 0) {
+ printf("event %d fd %d err %s\n", id, efd, strerror(errno));
+ return -1;
+ }
+ event_fd[prog_cnt - 1] = efd;
+ ioctl(efd, PERF_EVENT_IOC_ENABLE, 0);
+ ioctl(efd, PERF_EVENT_IOC_SET_BPF, fd);
+
return 0;
}
if (gelf_getehdr(elf, &ehdr) != &ehdr)
return 1;
+ /* clear all kprobes */
+ i = system("echo \"\" > /sys/kernel/debug/tracing/kprobe_events");
+
/* scan over all elf sections to get license and map info */
for (i = 1; i < ehdr.e_shnum; i++) {
if (strcmp(shname, "license") == 0) {
processed_sec[i] = true;
memcpy(license, data->d_buf, data->d_size);
+ } else if (strcmp(shname, "version") == 0) {
+ processed_sec[i] = true;
+ if (data->d_size != sizeof(int)) {
+ printf("invalid size of version section %zd\n",
+ data->d_size);
+ return 1;
+ }
+ memcpy(&kern_version, data->d_buf, sizeof(int));
} else if (strcmp(shname, "maps") == 0) {
processed_sec[i] = true;
if (load_maps(data->d_buf, data->d_size))
if (parse_relo_and_apply(data, symbols, &shdr, insns))
continue;
- if (memcmp(shname_prog, "events/", 7) == 0 ||
+ if (memcmp(shname_prog, "kprobe/", 7) == 0 ||
+ memcmp(shname_prog, "kretprobe/", 10) == 0 ||
memcmp(shname_prog, "socket", 6) == 0)
load_and_attach(shname_prog, insns, data_prog->d_size);
}
if (get_sec(elf, i, &ehdr, &shname, &shdr, &data))
continue;
- if (memcmp(shname, "events/", 7) == 0 ||
+ if (memcmp(shname, "kprobe/", 7) == 0 ||
+ memcmp(shname, "kretprobe/", 10) == 0 ||
memcmp(shname, "socket", 6) == 0)
load_and_attach(shname, data->d_buf, data->d_size);
}
close(fd);
return 0;
}
+
+void read_trace_pipe(void)
+{
+ int trace_fd;
+
+ trace_fd = open(DEBUGFS "trace_pipe", O_RDONLY, 0);
+ if (trace_fd < 0)
+ return;
+
+ while (1) {
+ static char buf[4096];
+ ssize_t sz;
+
+ sz = read(trace_fd, buf, sizeof(buf));
+ if (sz > 0) {
+ buf[sz] = 0;
+ puts(buf);
+ }
+ }
+}
extern int map_fd[MAX_MAPS];
extern int prog_fd[MAX_PROGS];
+extern int event_fd[MAX_PROGS];
/* parses elf file compiled by llvm .c->.o
* . parses 'maps' section and creates maps via BPF syscall
*/
int load_bpf_file(char *path);
+void read_trace_pipe(void);
+
#endif
int bpf_prog_load(enum bpf_prog_type prog_type,
const struct bpf_insn *insns, int prog_len,
- const char *license)
+ const char *license, int kern_version)
{
union bpf_attr attr = {
.prog_type = prog_type,
.log_level = 1,
};
+ /* assign one field outside of struct init to make sure any
+ * padding is zero initialized
+ */
+ attr.kern_version = kern_version;
+
bpf_log_buf[0] = 0;
return syscall(__NR_bpf, BPF_PROG_LOAD, &attr, sizeof(attr));
return sock;
}
+
+int perf_event_open(struct perf_event_attr *attr, int pid, int cpu,
+ int group_fd, unsigned long flags)
+{
+ return syscall(__NR_perf_event_open, attr, pid, cpu,
+ group_fd, flags);
+}
int bpf_prog_load(enum bpf_prog_type prog_type,
const struct bpf_insn *insns, int insn_len,
- const char *license);
+ const char *license, int kern_version);
#define LOG_BUF_SIZE 65536
extern char bpf_log_buf[LOG_BUF_SIZE];
/* create RAW socket and bind to interface 'name' */
int open_raw_sock(const char *name);
+struct perf_event_attr;
+int perf_event_open(struct perf_event_attr *attr, int pid, int cpu,
+ int group_fd, unsigned long flags);
#endif
};
prog_fd = bpf_prog_load(BPF_PROG_TYPE_SOCKET_FILTER, prog, sizeof(prog),
- "GPL");
+ "GPL", 0);
if (prog_fd < 0) {
printf("failed to load prog '%s'\n", strerror(errno));
goto cleanup;
prog_fd = bpf_prog_load(BPF_PROG_TYPE_UNSPEC, prog,
prog_len * sizeof(struct bpf_insn),
- "GPL");
+ "GPL", 0);
if (tests[i].result == ACCEPT) {
if (prog_fd < 0) {
--- /dev/null
+/* Copyright (c) 2013-2015 PLUMgrid, http://plumgrid.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of version 2 of the GNU General Public
+ * License as published by the Free Software Foundation.
+ */
+#include <linux/skbuff.h>
+#include <linux/netdevice.h>
+#include <uapi/linux/bpf.h>
+#include <linux/version.h>
+#include "bpf_helpers.h"
+
+#define _(P) ({typeof(P) val = 0; bpf_probe_read(&val, sizeof(val), &P); val;})
+
+/* kprobe is NOT a stable ABI
+ * kernel functions can be removed, renamed or completely change semantics.
+ * Number of arguments and their positions can change, etc.
+ * In such case this bpf+kprobe example will no longer be meaningful
+ */
+SEC("kprobe/__netif_receive_skb_core")
+int bpf_prog1(struct pt_regs *ctx)
+{
+ /* attaches to kprobe netif_receive_skb,
+ * looks for packets on loobpack device and prints them
+ */
+ char devname[IFNAMSIZ] = {};
+ struct net_device *dev;
+ struct sk_buff *skb;
+ int len;
+
+ /* non-portable! works for the given kernel only */
+ skb = (struct sk_buff *) ctx->di;
+
+ dev = _(skb->dev);
+
+ len = _(skb->len);
+
+ bpf_probe_read(devname, sizeof(devname), dev->name);
+
+ if (devname[0] == 'l' && devname[1] == 'o') {
+ char fmt[] = "skb %p len %d\n";
+ /* using bpf_trace_printk() for DEBUG ONLY */
+ bpf_trace_printk(fmt, sizeof(fmt), skb, len);
+ }
+
+ return 0;
+}
+
+char _license[] SEC("license") = "GPL";
+u32 _version SEC("version") = LINUX_VERSION_CODE;
--- /dev/null
+#include <stdio.h>
+#include <linux/bpf.h>
+#include <unistd.h>
+#include "libbpf.h"
+#include "bpf_load.h"
+
+int main(int ac, char **argv)
+{
+ FILE *f;
+ char filename[256];
+
+ snprintf(filename, sizeof(filename), "%s_kern.o", argv[0]);
+
+ if (load_bpf_file(filename)) {
+ printf("%s", bpf_log_buf);
+ return 1;
+ }
+
+ f = popen("taskset 1 ping -c5 localhost", "r");
+ (void) f;
+
+ read_trace_pipe();
+
+ return 0;
+}
--- /dev/null
+/* Copyright (c) 2013-2015 PLUMgrid, http://plumgrid.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of version 2 of the GNU General Public
+ * License as published by the Free Software Foundation.
+ */
+#include <linux/skbuff.h>
+#include <linux/netdevice.h>
+#include <linux/version.h>
+#include <uapi/linux/bpf.h>
+#include "bpf_helpers.h"
+
+struct bpf_map_def SEC("maps") my_map = {
+ .type = BPF_MAP_TYPE_HASH,
+ .key_size = sizeof(long),
+ .value_size = sizeof(long),
+ .max_entries = 1024,
+};
+
+/* kprobe is NOT a stable ABI. If kernel internals change this bpf+kprobe
+ * example will no longer be meaningful
+ */
+SEC("kprobe/kfree_skb")
+int bpf_prog2(struct pt_regs *ctx)
+{
+ long loc = 0;
+ long init_val = 1;
+ long *value;
+
+ /* x64 specific: read ip of kfree_skb caller.
+ * non-portable version of __builtin_return_address(0)
+ */
+ bpf_probe_read(&loc, sizeof(loc), (void *)ctx->sp);
+
+ value = bpf_map_lookup_elem(&my_map, &loc);
+ if (value)
+ *value += 1;
+ else
+ bpf_map_update_elem(&my_map, &loc, &init_val, BPF_ANY);
+ return 0;
+}
+
+static unsigned int log2(unsigned int v)
+{
+ unsigned int r;
+ unsigned int shift;
+
+ r = (v > 0xFFFF) << 4; v >>= r;
+ shift = (v > 0xFF) << 3; v >>= shift; r |= shift;
+ shift = (v > 0xF) << 2; v >>= shift; r |= shift;
+ shift = (v > 0x3) << 1; v >>= shift; r |= shift;
+ r |= (v >> 1);
+ return r;
+}
+
+static unsigned int log2l(unsigned long v)
+{
+ unsigned int hi = v >> 32;
+ if (hi)
+ return log2(hi) + 32;
+ else
+ return log2(v);
+}
+
+struct bpf_map_def SEC("maps") my_hist_map = {
+ .type = BPF_MAP_TYPE_ARRAY,
+ .key_size = sizeof(u32),
+ .value_size = sizeof(long),
+ .max_entries = 64,
+};
+
+SEC("kprobe/sys_write")
+int bpf_prog3(struct pt_regs *ctx)
+{
+ long write_size = ctx->dx; /* arg3 */
+ long init_val = 1;
+ long *value;
+ u32 index = log2l(write_size);
+
+ value = bpf_map_lookup_elem(&my_hist_map, &index);
+ if (value)
+ __sync_fetch_and_add(value, 1);
+ return 0;
+}
+char _license[] SEC("license") = "GPL";
+u32 _version SEC("version") = LINUX_VERSION_CODE;
--- /dev/null
+#include <stdio.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include <signal.h>
+#include <linux/bpf.h>
+#include "libbpf.h"
+#include "bpf_load.h"
+
+#define MAX_INDEX 64
+#define MAX_STARS 38
+
+static void stars(char *str, long val, long max, int width)
+{
+ int i;
+
+ for (i = 0; i < (width * val / max) - 1 && i < width - 1; i++)
+ str[i] = '*';
+ if (val > max)
+ str[i - 1] = '+';
+ str[i] = '\0';
+}
+
+static void print_hist(int fd)
+{
+ int key;
+ long value;
+ long data[MAX_INDEX] = {};
+ char starstr[MAX_STARS];
+ int i;
+ int max_ind = -1;
+ long max_value = 0;
+
+ for (key = 0; key < MAX_INDEX; key++) {
+ bpf_lookup_elem(fd, &key, &value);
+ data[key] = value;
+ if (value && key > max_ind)
+ max_ind = key;
+ if (value > max_value)
+ max_value = value;
+ }
+
+ printf(" syscall write() stats\n");
+ printf(" byte_size : count distribution\n");
+ for (i = 1; i <= max_ind + 1; i++) {
+ stars(starstr, data[i - 1], max_value, MAX_STARS);
+ printf("%8ld -> %-8ld : %-8ld |%-*s|\n",
+ (1l << i) >> 1, (1l << i) - 1, data[i - 1],
+ MAX_STARS, starstr);
+ }
+}
+static void int_exit(int sig)
+{
+ print_hist(map_fd[1]);
+ exit(0);
+}
+
+int main(int ac, char **argv)
+{
+ char filename[256];
+ long key, next_key, value;
+ FILE *f;
+ int i;
+
+ snprintf(filename, sizeof(filename), "%s_kern.o", argv[0]);
+
+ signal(SIGINT, int_exit);
+
+ /* start 'ping' in the background to have some kfree_skb events */
+ f = popen("ping -c5 localhost", "r");
+ (void) f;
+
+ /* start 'dd' in the background to have plenty of 'write' syscalls */
+ f = popen("dd if=/dev/zero of=/dev/null count=5000000", "r");
+ (void) f;
+
+ if (load_bpf_file(filename)) {
+ printf("%s", bpf_log_buf);
+ return 1;
+ }
+
+ for (i = 0; i < 5; i++) {
+ key = 0;
+ while (bpf_get_next_key(map_fd[0], &key, &next_key) == 0) {
+ bpf_lookup_elem(map_fd[0], &next_key, &value);
+ printf("location 0x%lx count %ld\n", next_key, value);
+ key = next_key;
+ }
+ if (key)
+ printf("\n");
+ sleep(1);
+ }
+ print_hist(map_fd[1]);
+
+ return 0;
+}
--- /dev/null
+/* Copyright (c) 2013-2015 PLUMgrid, http://plumgrid.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of version 2 of the GNU General Public
+ * License as published by the Free Software Foundation.
+ */
+#include <linux/skbuff.h>
+#include <linux/netdevice.h>
+#include <linux/version.h>
+#include <uapi/linux/bpf.h>
+#include "bpf_helpers.h"
+
+struct bpf_map_def SEC("maps") my_map = {
+ .type = BPF_MAP_TYPE_HASH,
+ .key_size = sizeof(long),
+ .value_size = sizeof(u64),
+ .max_entries = 4096,
+};
+
+/* kprobe is NOT a stable ABI. If kernel internals change this bpf+kprobe
+ * example will no longer be meaningful
+ */
+SEC("kprobe/blk_mq_start_request")
+int bpf_prog1(struct pt_regs *ctx)
+{
+ long rq = ctx->di;
+ u64 val = bpf_ktime_get_ns();
+
+ bpf_map_update_elem(&my_map, &rq, &val, BPF_ANY);
+ return 0;
+}
+
+static unsigned int log2l(unsigned long long n)
+{
+#define S(k) if (n >= (1ull << k)) { i += k; n >>= k; }
+ int i = -(n == 0);
+ S(32); S(16); S(8); S(4); S(2); S(1);
+ return i;
+#undef S
+}
+
+#define SLOTS 100
+
+struct bpf_map_def SEC("maps") lat_map = {
+ .type = BPF_MAP_TYPE_ARRAY,
+ .key_size = sizeof(u32),
+ .value_size = sizeof(u64),
+ .max_entries = SLOTS,
+};
+
+SEC("kprobe/blk_update_request")
+int bpf_prog2(struct pt_regs *ctx)
+{
+ long rq = ctx->di;
+ u64 *value, l, base;
+ u32 index;
+
+ value = bpf_map_lookup_elem(&my_map, &rq);
+ if (!value)
+ return 0;
+
+ u64 cur_time = bpf_ktime_get_ns();
+ u64 delta = cur_time - *value;
+
+ bpf_map_delete_elem(&my_map, &rq);
+
+ /* the lines below are computing index = log10(delta)*10
+ * using integer arithmetic
+ * index = 29 ~ 1 usec
+ * index = 59 ~ 1 msec
+ * index = 89 ~ 1 sec
+ * index = 99 ~ 10sec or more
+ * log10(x)*10 = log2(x)*10/log2(10) = log2(x)*3
+ */
+ l = log2l(delta);
+ base = 1ll << l;
+ index = (l * 64 + (delta - base) * 64 / base) * 3 / 64;
+
+ if (index >= SLOTS)
+ index = SLOTS - 1;
+
+ value = bpf_map_lookup_elem(&lat_map, &index);
+ if (value)
+ __sync_fetch_and_add((long *)value, 1);
+
+ return 0;
+}
+char _license[] SEC("license") = "GPL";
+u32 _version SEC("version") = LINUX_VERSION_CODE;
--- /dev/null
+/* Copyright (c) 2013-2015 PLUMgrid, http://plumgrid.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of version 2 of the GNU General Public
+ * License as published by the Free Software Foundation.
+ */
+#include <stdio.h>
+#include <stdlib.h>
+#include <signal.h>
+#include <unistd.h>
+#include <stdbool.h>
+#include <string.h>
+#include <linux/bpf.h>
+#include "libbpf.h"
+#include "bpf_load.h"
+
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof(*(x)))
+
+#define SLOTS 100
+
+static void clear_stats(int fd)
+{
+ __u32 key;
+ __u64 value = 0;
+
+ for (key = 0; key < SLOTS; key++)
+ bpf_update_elem(fd, &key, &value, BPF_ANY);
+}
+
+const char *color[] = {
+ "\033[48;5;255m",
+ "\033[48;5;252m",
+ "\033[48;5;250m",
+ "\033[48;5;248m",
+ "\033[48;5;246m",
+ "\033[48;5;244m",
+ "\033[48;5;242m",
+ "\033[48;5;240m",
+ "\033[48;5;238m",
+ "\033[48;5;236m",
+ "\033[48;5;234m",
+ "\033[48;5;232m",
+};
+const int num_colors = ARRAY_SIZE(color);
+
+const char nocolor[] = "\033[00m";
+
+const char *sym[] = {
+ " ",
+ " ",
+ ".",
+ ".",
+ "*",
+ "*",
+ "o",
+ "o",
+ "O",
+ "O",
+ "#",
+ "#",
+};
+
+bool full_range = false;
+bool text_only = false;
+
+static void print_banner(void)
+{
+ if (full_range)
+ printf("|1ns |10ns |100ns |1us |10us |100us"
+ " |1ms |10ms |100ms |1s |10s\n");
+ else
+ printf("|1us |10us |100us |1ms |10ms "
+ "|100ms |1s |10s\n");
+}
+
+static void print_hist(int fd)
+{
+ __u32 key;
+ __u64 value;
+ __u64 cnt[SLOTS];
+ __u64 max_cnt = 0;
+ __u64 total_events = 0;
+
+ for (key = 0; key < SLOTS; key++) {
+ value = 0;
+ bpf_lookup_elem(fd, &key, &value);
+ cnt[key] = value;
+ total_events += value;
+ if (value > max_cnt)
+ max_cnt = value;
+ }
+ clear_stats(fd);
+ for (key = full_range ? 0 : 29; key < SLOTS; key++) {
+ int c = num_colors * cnt[key] / (max_cnt + 1);
+
+ if (text_only)
+ printf("%s", sym[c]);
+ else
+ printf("%s %s", color[c], nocolor);
+ }
+ printf(" # %lld\n", total_events);
+}
+
+int main(int ac, char **argv)
+{
+ char filename[256];
+ int i;
+
+ snprintf(filename, sizeof(filename), "%s_kern.o", argv[0]);
+
+ if (load_bpf_file(filename)) {
+ printf("%s", bpf_log_buf);
+ return 1;
+ }
+
+ for (i = 1; i < ac; i++) {
+ if (strcmp(argv[i], "-a") == 0) {
+ full_range = true;
+ } else if (strcmp(argv[i], "-t") == 0) {
+ text_only = true;
+ } else if (strcmp(argv[i], "-h") == 0) {
+ printf("Usage:\n"
+ " -a display wider latency range\n"
+ " -t text only\n");
+ return 1;
+ }
+ }
+
+ printf(" heatmap of IO latency\n");
+ if (text_only)
+ printf(" %s", sym[num_colors - 1]);
+ else
+ printf(" %s %s", color[num_colors - 1], nocolor);
+ printf(" - many events with this latency\n");
+
+ if (text_only)
+ printf(" %s", sym[0]);
+ else
+ printf(" %s %s", color[0], nocolor);
+ printf(" - few events\n");
+
+ for (i = 0; ; i++) {
+ if (i % 20 == 0)
+ print_banner();
+ print_hist(map_fd[1]);
+ sleep(2);
+ }
+
+ return 0;
+}
--- /dev/null
+/* Copyright (c) 2015 PLUMgrid, http://plumgrid.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of version 2 of the GNU General Public
+ * License as published by the Free Software Foundation.
+ */
+#include <linux/ptrace.h>
+#include <linux/version.h>
+#include <uapi/linux/bpf.h>
+#include "bpf_helpers.h"
+
+struct pair {
+ u64 val;
+ u64 ip;
+};
+
+struct bpf_map_def SEC("maps") my_map = {
+ .type = BPF_MAP_TYPE_HASH,
+ .key_size = sizeof(long),
+ .value_size = sizeof(struct pair),
+ .max_entries = 1000000,
+};
+
+/* kprobe is NOT a stable ABI. If kernel internals change this bpf+kprobe
+ * example will no longer be meaningful
+ */
+SEC("kprobe/kmem_cache_free")
+int bpf_prog1(struct pt_regs *ctx)
+{
+ long ptr = ctx->si;
+
+ bpf_map_delete_elem(&my_map, &ptr);
+ return 0;
+}
+
+SEC("kretprobe/kmem_cache_alloc_node")
+int bpf_prog2(struct pt_regs *ctx)
+{
+ long ptr = ctx->ax;
+ long ip = 0;
+
+ /* get ip address of kmem_cache_alloc_node() caller */
+ bpf_probe_read(&ip, sizeof(ip), (void *)(ctx->bp + sizeof(ip)));
+
+ struct pair v = {
+ .val = bpf_ktime_get_ns(),
+ .ip = ip,
+ };
+
+ bpf_map_update_elem(&my_map, &ptr, &v, BPF_ANY);
+ return 0;
+}
+char _license[] SEC("license") = "GPL";
+u32 _version SEC("version") = LINUX_VERSION_CODE;
--- /dev/null
+/* Copyright (c) 2015 PLUMgrid, http://plumgrid.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of version 2 of the GNU General Public
+ * License as published by the Free Software Foundation.
+ */
+#include <stdio.h>
+#include <stdlib.h>
+#include <signal.h>
+#include <unistd.h>
+#include <stdbool.h>
+#include <string.h>
+#include <time.h>
+#include <linux/bpf.h>
+#include "libbpf.h"
+#include "bpf_load.h"
+
+struct pair {
+ long long val;
+ __u64 ip;
+};
+
+static __u64 time_get_ns(void)
+{
+ struct timespec ts;
+
+ clock_gettime(CLOCK_MONOTONIC, &ts);
+ return ts.tv_sec * 1000000000ull + ts.tv_nsec;
+}
+
+static void print_old_objects(int fd)
+{
+ long long val = time_get_ns();
+ __u64 key, next_key;
+ struct pair v;
+
+ key = write(1, "\e[1;1H\e[2J", 12); /* clear screen */
+
+ key = -1;
+ while (bpf_get_next_key(map_fd[0], &key, &next_key) == 0) {
+ bpf_lookup_elem(map_fd[0], &next_key, &v);
+ key = next_key;
+ if (val - v.val < 1000000000ll)
+ /* object was allocated more then 1 sec ago */
+ continue;
+ printf("obj 0x%llx is %2lldsec old was allocated at ip %llx\n",
+ next_key, (val - v.val) / 1000000000ll, v.ip);
+ }
+}
+
+int main(int ac, char **argv)
+{
+ char filename[256];
+ int i;
+
+ snprintf(filename, sizeof(filename), "%s_kern.o", argv[0]);
+
+ if (load_bpf_file(filename)) {
+ printf("%s", bpf_log_buf);
+ return 1;
+ }
+
+ for (i = 0; ; i++) {
+ print_old_objects(map_fd[1]);
+ sleep(1);
+ }
+
+ return 0;
+}
always := $(hostprogs-y)
HOSTCFLAGS_hid-example.o += -I$(objtree)/usr/include
+
+all: hid-example
char buf[256];
struct hidraw_report_descriptor rpt_desc;
struct hidraw_devinfo info;
+ char *device = "/dev/hidraw0";
+
+ if (argc > 1)
+ device = argv[1];
/* Open the Device with non-blocking reads. In real life,
don't use a hard coded path; use libudev instead. */
- fd = open("/dev/hidraw0", O_RDWR|O_NONBLOCK);
+ fd = open(device, O_RDWR|O_NONBLOCK);
if (fd < 0) {
perror("Unable to open device");
static ssize_t foo_store(struct kobject *kobj, struct kobj_attribute *attr,
const char *buf, size_t count)
{
- sscanf(buf, "%du", &foo);
+ int ret;
+
+ ret = kstrtoint(buf, 10, &foo);
+ if (ret < 0)
+ return ret;
+
return count;
}
static ssize_t b_store(struct kobject *kobj, struct kobj_attribute *attr,
const char *buf, size_t count)
{
- int var;
+ int var, ret;
+
+ ret = kstrtoint(buf, 10, &var);
+ if (ret < 0)
+ return ret;
- sscanf(buf, "%du", &var);
if (strcmp(attr->attr.name, "baz") == 0)
baz = var;
else
module_init(example_init);
module_exit(example_exit);
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Greg Kroah-Hartman <greg@kroah.com>");
static ssize_t foo_store(struct foo_obj *foo_obj, struct foo_attribute *attr,
const char *buf, size_t count)
{
- sscanf(buf, "%du", &foo_obj->foo);
+ int ret;
+
+ ret = kstrtoint(buf, 10, &foo_obj->foo);
+ if (ret < 0)
+ return ret;
+
return count;
}
static ssize_t b_store(struct foo_obj *foo_obj, struct foo_attribute *attr,
const char *buf, size_t count)
{
- int var;
+ int var, ret;
+
+ ret = kstrtoint(buf, 10, &var);
+ if (ret < 0)
+ return ret;
- sscanf(buf, "%du", &var);
if (strcmp(attr->attr.name, "baz") == 0)
foo_obj->baz = var;
else
module_init(example_init);
module_exit(example_exit);
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Greg Kroah-Hartman <greg@kroah.com>");
* protection, just like TRACE_INCLUDE_FILE.
*/
#undef TRACE_SYSTEM
-#define TRACE_SYSTEM sample
+#define TRACE_SYSTEM sample-trace
+
+/*
+ * TRACE_SYSTEM is expected to be a C valid variable (alpha-numeric
+ * and underscore), although it may start with numbers. If for some
+ * reason it is not, you need to add the following lines:
+ */
+#undef TRACE_SYSTEM_VAR
+#define TRACE_SYSTEM_VAR sample_trace
+/*
+ * But the above is only needed if TRACE_SYSTEM is not alpha-numeric
+ * and underscored. By default, TRACE_SYSTEM_VAR will be equal to
+ * TRACE_SYSTEM. As TRACE_SYSTEM_VAR must be alpha-numeric, if
+ * TRACE_SYSTEM is not, then TRACE_SYSTEM_VAR must be defined with
+ * only alpha-numeric and underscores.
+ *
+ * The TRACE_SYSTEM_VAR is only used internally and not visible to
+ * user space.
+ */
/*
* Notice that this file is not protected like a normal header.
;
return i;
}
+
+enum {
+ TRACE_SAMPLE_FOO = 2,
+ TRACE_SAMPLE_BAR = 4,
+ TRACE_SAMPLE_ZOO = 8,
+};
#endif
+/*
+ * If enums are used in the TP_printk(), their names will be shown in
+ * format files and not their values. This can cause problems with user
+ * space programs that parse the format files to know how to translate
+ * the raw binary trace output into human readable text.
+ *
+ * To help out user space programs, any enum that is used in the TP_printk()
+ * should be defined by TRACE_DEFINE_ENUM() macro. All that is needed to
+ * be done is to add this macro with the enum within it in the trace
+ * header file, and it will be converted in the output.
+ */
+
+TRACE_DEFINE_ENUM(TRACE_SAMPLE_FOO);
+TRACE_DEFINE_ENUM(TRACE_SAMPLE_BAR);
+TRACE_DEFINE_ENUM(TRACE_SAMPLE_ZOO);
+
TRACE_EVENT(foo_bar,
TP_PROTO(const char *foo, int bar, const int *lst,
__assign_bitmask(cpus, cpumask_bits(mask), num_possible_cpus());
),
- TP_printk("foo %s %d %s %s (%s)", __entry->foo, __entry->bar,
+ TP_printk("foo %s %d %s %s %s %s (%s)", __entry->foo, __entry->bar,
+
+/*
+ * Notice here the use of some helper functions. This includes:
+ *
+ * __print_symbolic( variable, { value, "string" }, ... ),
+ *
+ * The variable is tested against each value of the { } pair. If
+ * the variable matches one of the values, then it will print the
+ * string in that pair. If non are matched, it returns a string
+ * version of the number (if __entry->bar == 7 then "7" is returned).
+ */
+ __print_symbolic(__entry->bar,
+ { 0, "zero" },
+ { TRACE_SAMPLE_FOO, "TWO" },
+ { TRACE_SAMPLE_BAR, "FOUR" },
+ { TRACE_SAMPLE_ZOO, "EIGHT" },
+ { 10, "TEN" }
+ ),
+
+/*
+ * __print_flags( variable, "delim", { value, "flag" }, ... ),
+ *
+ * This is similar to __print_symbolic, except that it tests the bits
+ * of the value. If ((FLAG & variable) == FLAG) then the string is
+ * printed. If more than one flag matches, then each one that does is
+ * also printed with delim in between them.
+ * If not all bits are accounted for, then the not found bits will be
+ * added in hex format: 0x506 will show BIT2|BIT4|0x500
+ */
+ __print_flags(__entry->bar, "|",
+ { 1, "BIT1" },
+ { 2, "BIT2" },
+ { 4, "BIT3" },
+ { 8, "BIT4" }
+ ),
+/*
+ * __print_array( array, len, element_size )
+ *
+ * This prints out the array that is defined by __array in a nice format.
+ */
__print_array(__get_dynamic_array(list),
__get_dynamic_array_len(list),
sizeof(int)),
p << r.p;
@@
-msg="WARNING: Use BUG_ON"
+msg="WARNING: Use BUG_ON instead of if condition followed by BUG.\nPlease make sure the condition has no side effects (see conditional BUG_ON definition in include/asm-generic/bug.h)"
coccilib.report.print_report(p[0], msg)
return common_perm(OP_CHOWN, path, AA_MAY_CHOWN, &cond);
}
-static int apparmor_inode_getattr(struct vfsmount *mnt, struct dentry *dentry)
+static int apparmor_inode_getattr(const struct path *path)
{
- if (!mediated_filesystem(dentry))
+ if (!mediated_filesystem(path->dentry))
return 0;
- return common_perm_mnt_dentry(OP_GETATTR, mnt, dentry,
+ return common_perm_mnt_dentry(OP_GETATTR, path->mnt, path->dentry,
AA_MAY_META_READ);
}
return 0;
}
-static int cap_inode_getattr(struct vfsmount *mnt, struct dentry *dentry)
+static int cap_inode_getattr(const struct path *path)
{
return 0;
}
key_serial_t ringid)
{
struct iovec iovstack[UIO_FASTIOV], *iov = iovstack;
+ struct iov_iter from;
long ret;
- if (!_payload_iov || !ioc)
- goto no_payload;
+ if (!_payload_iov)
+ ioc = 0;
- ret = compat_rw_copy_check_uvector(WRITE, _payload_iov, ioc,
- ARRAY_SIZE(iovstack),
- iovstack, &iov);
+ ret = compat_import_iovec(WRITE, _payload_iov, ioc,
+ ARRAY_SIZE(iovstack), &iov,
+ &from);
if (ret < 0)
- goto err;
- if (ret == 0)
- goto no_payload_free;
-
- ret = keyctl_instantiate_key_common(id, iov, ioc, ret, ringid);
-err:
- if (iov != iovstack)
- kfree(iov);
- return ret;
+ return ret;
-no_payload_free:
- if (iov != iovstack)
- kfree(iov);
-no_payload:
- return keyctl_instantiate_key_common(id, NULL, 0, 0, ringid);
+ ret = keyctl_instantiate_key_common(id, &from, ringid);
+ kfree(iov);
+ return ret;
}
/*
unsigned, key_serial_t);
extern long keyctl_invalidate_key(key_serial_t);
+struct iov_iter;
extern long keyctl_instantiate_key_common(key_serial_t,
- const struct iovec *,
- unsigned, size_t, key_serial_t);
+ struct iov_iter *,
+ key_serial_t);
#ifdef CONFIG_PERSISTENT_KEYRINGS
extern long keyctl_get_persistent(uid_t, key_serial_t);
extern unsigned persistent_keyring_expiry;
return commit_creds(new);
}
-/*
- * Copy the iovec data from userspace
- */
-static long copy_from_user_iovec(void *buffer, const struct iovec *iov,
- unsigned ioc)
-{
- for (; ioc > 0; ioc--) {
- if (copy_from_user(buffer, iov->iov_base, iov->iov_len) != 0)
- return -EFAULT;
- buffer += iov->iov_len;
- iov++;
- }
- return 0;
-}
-
/*
* Instantiate a key with the specified payload and link the key into the
* destination keyring if one is given.
* If successful, 0 will be returned.
*/
long keyctl_instantiate_key_common(key_serial_t id,
- const struct iovec *payload_iov,
- unsigned ioc,
- size_t plen,
+ struct iov_iter *from,
key_serial_t ringid)
{
const struct cred *cred = current_cred();
struct request_key_auth *rka;
struct key *instkey, *dest_keyring;
+ size_t plen = from ? iov_iter_count(from) : 0;
void *payload;
long ret;
- bool vm = false;
kenter("%d,,%zu,%d", id, plen, ringid);
+ if (!plen)
+ from = NULL;
+
ret = -EINVAL;
if (plen > 1024 * 1024 - 1)
goto error;
/* pull the payload in if one was supplied */
payload = NULL;
- if (payload_iov) {
+ if (from) {
ret = -ENOMEM;
payload = kmalloc(plen, GFP_KERNEL);
if (!payload) {
if (plen <= PAGE_SIZE)
goto error;
- vm = true;
payload = vmalloc(plen);
if (!payload)
goto error;
}
- ret = copy_from_user_iovec(payload, payload_iov, ioc);
- if (ret < 0)
+ ret = -EFAULT;
+ if (copy_from_iter(payload, plen, from) != plen)
goto error2;
}
keyctl_change_reqkey_auth(NULL);
error2:
- if (!vm)
- kfree(payload);
- else
- vfree(payload);
+ kvfree(payload);
error:
return ret;
}
key_serial_t ringid)
{
if (_payload && plen) {
- struct iovec iov[1] = {
- [0].iov_base = (void __user *)_payload,
- [0].iov_len = plen
- };
+ struct iovec iov;
+ struct iov_iter from;
+ int ret;
- return keyctl_instantiate_key_common(id, iov, 1, plen, ringid);
+ ret = import_single_range(WRITE, (void __user *)_payload, plen,
+ &iov, &from);
+ if (unlikely(ret))
+ return ret;
+
+ return keyctl_instantiate_key_common(id, &from, ringid);
}
- return keyctl_instantiate_key_common(id, NULL, 0, 0, ringid);
+ return keyctl_instantiate_key_common(id, NULL, ringid);
}
/*
key_serial_t ringid)
{
struct iovec iovstack[UIO_FASTIOV], *iov = iovstack;
+ struct iov_iter from;
long ret;
- if (!_payload_iov || !ioc)
- goto no_payload;
+ if (!_payload_iov)
+ ioc = 0;
- ret = rw_copy_check_uvector(WRITE, _payload_iov, ioc,
- ARRAY_SIZE(iovstack), iovstack, &iov);
+ ret = import_iovec(WRITE, _payload_iov, ioc,
+ ARRAY_SIZE(iovstack), &iov, &from);
if (ret < 0)
- goto err;
- if (ret == 0)
- goto no_payload_free;
-
- ret = keyctl_instantiate_key_common(id, iov, ioc, ret, ringid);
-err:
- if (iov != iovstack)
- kfree(iov);
+ return ret;
+ ret = keyctl_instantiate_key_common(id, &from, ringid);
+ kfree(iov);
return ret;
-
-no_payload_free:
- if (iov != iovstack)
- kfree(iov);
-no_payload:
- return keyctl_instantiate_key_common(id, NULL, 0, 0, ringid);
}
/*
}
EXPORT_SYMBOL_GPL(security_inode_setattr);
-int security_inode_getattr(struct vfsmount *mnt, struct dentry *dentry)
+int security_inode_getattr(const struct path *path)
{
- if (unlikely(IS_PRIVATE(dentry->d_inode)))
+ if (unlikely(IS_PRIVATE(path->dentry->d_inode)))
return 0;
- return security_ops->inode_getattr(mnt, dentry);
+ return security_ops->inode_getattr(path);
}
int security_inode_setxattr(struct dentry *dentry, const char *name,
the path to help the auditing code to more easily generate the
pathname if needed. */
static inline int path_has_perm(const struct cred *cred,
- struct path *path,
+ const struct path *path,
u32 av)
{
struct inode *inode = path->dentry->d_inode;
return dentry_has_perm(cred, dentry, av);
}
-static int selinux_inode_getattr(struct vfsmount *mnt, struct dentry *dentry)
+static int selinux_inode_getattr(const struct path *path)
{
- const struct cred *cred = current_cred();
- struct path path;
-
- path.dentry = dentry;
- path.mnt = mnt;
-
- return path_has_perm(cred, &path, FILE__GETATTR);
+ return path_has_perm(current_cred(), path, FILE__GETATTR);
}
static int selinux_inode_setotherxattr(struct dentry *dentry, const char *name)
*
* Returns 0 if access is permitted, an error code otherwise
*/
-static int smack_inode_getattr(struct vfsmount *mnt, struct dentry *dentry)
+static int smack_inode_getattr(const struct path *path)
{
struct smk_audit_info ad;
- struct path path;
+ struct inode *inode = path->dentry->d_inode;
int rc;
- path.dentry = dentry;
- path.mnt = mnt;
-
smk_ad_init(&ad, __func__, LSM_AUDIT_DATA_PATH);
- smk_ad_setfield_u_fs_path(&ad, path);
- rc = smk_curacc(smk_of_inode(dentry->d_inode), MAY_READ, &ad);
- rc = smk_bu_inode(dentry->d_inode, MAY_READ, rc);
+ smk_ad_setfield_u_fs_path(&ad, *path);
+ rc = smk_curacc(smk_of_inode(inode), MAY_READ, &ad);
+ rc = smk_bu_inode(inode, MAY_READ, rc);
return rc;
}
char *tomoyo_init_log(struct tomoyo_request_info *r, int len, const char *fmt,
va_list args);
char *tomoyo_read_token(struct tomoyo_acl_param *param);
-char *tomoyo_realpath_from_path(struct path *path);
+char *tomoyo_realpath_from_path(const struct path *path);
char *tomoyo_realpath_nofollow(const char *pathname);
const char *tomoyo_get_exe(void);
const char *tomoyo_yesno(const unsigned int value);
struct path *path2);
int tomoyo_path_number_perm(const u8 operation, struct path *path,
unsigned long number);
-int tomoyo_path_perm(const u8 operation, struct path *path,
+int tomoyo_path_perm(const u8 operation, const struct path *path,
const char *target);
unsigned int tomoyo_poll_control(struct file *file, poll_table *wait);
unsigned int tomoyo_poll_log(struct file *file, poll_table *wait);
*
* Returns true on success, false otherwise.
*/
-static bool tomoyo_get_realpath(struct tomoyo_path_info *buf, struct path *path)
+static bool tomoyo_get_realpath(struct tomoyo_path_info *buf, const struct path *path)
{
buf->name = tomoyo_realpath_from_path(path);
if (buf->name) {
*
* Returns 0 on success, negative value otherwise.
*/
-int tomoyo_path_perm(const u8 operation, struct path *path, const char *target)
+int tomoyo_path_perm(const u8 operation, const struct path *path, const char *target)
{
struct tomoyo_request_info r;
struct tomoyo_obj_info obj = {
*
* If dentry is a directory, trailing '/' is appended.
*/
-static char *tomoyo_get_absolute_path(struct path *path, char * const buffer,
+static char *tomoyo_get_absolute_path(const struct path *path, char * const buffer,
const int buflen)
{
char *pos = ERR_PTR(-ENOMEM);
*
* Returns the buffer.
*/
-static char *tomoyo_get_socket_name(struct path *path, char * const buffer,
+static char *tomoyo_get_socket_name(const struct path *path, char * const buffer,
const int buflen)
{
struct inode *inode = path->dentry->d_inode;
* These functions use kzalloc(), so the caller must call kfree()
* if these functions didn't return NULL.
*/
-char *tomoyo_realpath_from_path(struct path *path)
+char *tomoyo_realpath_from_path(const struct path *path)
{
char *buf = NULL;
char *name = NULL;
*
* Returns 0 on success, negative value otherwise.
*/
-static int tomoyo_inode_getattr(struct vfsmount *mnt, struct dentry *dentry)
+static int tomoyo_inode_getattr(const struct path *path)
{
- struct path path = { mnt, dentry };
- return tomoyo_path_perm(TOMOYO_TYPE_GETATTR, &path, NULL);
+ return tomoyo_path_perm(TOMOYO_TYPE_GETATTR, path, NULL);
}
/**
#include <linux/slab.h>
#include <linux/time.h>
#include <linux/pm_qos.h>
-#include <linux/aio.h>
#include <linux/io.h>
#include <linux/dma-mapping.h>
#include <sound/core.h>
#include <sound/pcm_params.h>
#include <sound/timer.h>
#include <sound/minors.h>
+#include <linux/uio.h>
/*
* Compatibility
struct fw_device *device = fw_parent_device(unit);
int err, rcode;
u64 date;
- __be32 cues[3] = {
- MAUDIO_BOOTLOADER_CUE1,
- MAUDIO_BOOTLOADER_CUE2,
- MAUDIO_BOOTLOADER_CUE3
+ __le32 cues[3] = {
+ cpu_to_le32(MAUDIO_BOOTLOADER_CUE1),
+ cpu_to_le32(MAUDIO_BOOTLOADER_CUE2),
+ cpu_to_le32(MAUDIO_BOOTLOADER_CUE3)
};
/* check date of software used to build */
if (!hp_pin)
return;
+
+ msleep(30);
hp_pin_sense = snd_hda_jack_detect(codec, hp_pin);
/* Index 0x43 Direct Drive HP AMP LPM Control 1 */
switch (codec->vendor_id) {
case 0x10ec0255:
+ case 0x10ec0256:
alc_process_coef_fw(codec, coef0255);
break;
case 0x10ec0233:
switch (codec->vendor_id) {
case 0x10ec0255:
+ case 0x10ec0256:
alc_write_coef_idx(codec, 0x45, 0xc489);
snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
alc_process_coef_fw(codec, coef0255);
switch (codec->vendor_id) {
case 0x10ec0255:
+ case 0x10ec0256:
alc_process_coef_fw(codec, coef0255);
break;
case 0x10ec0233:
switch (codec->vendor_id) {
case 0x10ec0255:
+ case 0x10ec0256:
alc_process_coef_fw(codec, coef0255);
break;
case 0x10ec0233:
switch (codec->vendor_id) {
case 0x10ec0255:
+ case 0x10ec0256:
alc_process_coef_fw(codec, coef0255);
break;
case 0x10ec0233:
switch (codec->vendor_id) {
case 0x10ec0255:
+ case 0x10ec0256:
alc_process_coef_fw(codec, coef0255);
msleep(300);
val = alc_read_coef_idx(codec, 0x46);
ALC269_FIXUP_QUANTA_MUTE,
ALC269_FIXUP_LIFEBOOK,
ALC269_FIXUP_LIFEBOOK_EXTMIC,
+ ALC269_FIXUP_LIFEBOOK_HP_PIN,
ALC269_FIXUP_AMIC,
ALC269_FIXUP_DMIC,
ALC269VB_FIXUP_AMIC,
{ }
},
},
+ [ALC269_FIXUP_LIFEBOOK_HP_PIN] = {
+ .type = HDA_FIXUP_PINS,
+ .v.pins = (const struct hda_pintbl[]) {
+ { 0x21, 0x0221102f }, /* HP out */
+ { }
+ },
+ },
[ALC269_FIXUP_AMIC] = {
.type = HDA_FIXUP_PINS,
.v.pins = (const struct hda_pintbl[]) {
SND_PCI_QUIRK(0x104d, 0x9084, "Sony VAIO", ALC275_FIXUP_SONY_HWEQ),
SND_PCI_QUIRK(0x104d, 0x9099, "Sony VAIO S13", ALC275_FIXUP_SONY_DISABLE_AAMIX),
SND_PCI_QUIRK(0x10cf, 0x1475, "Lifebook", ALC269_FIXUP_LIFEBOOK),
+ SND_PCI_QUIRK(0x10cf, 0x15dc, "Lifebook T731", ALC269_FIXUP_LIFEBOOK_HP_PIN),
SND_PCI_QUIRK(0x10cf, 0x1845, "Lifebook U904", ALC269_FIXUP_LIFEBOOK_EXTMIC),
SND_PCI_QUIRK(0x144d, 0xc109, "Samsung Ativ book 9 (NP900X3G)", ALC269_FIXUP_INV_DMIC),
SND_PCI_QUIRK(0x1458, 0xfa53, "Gigabyte BXBT-2807", ALC283_FIXUP_BXBT2807_MIC),
{0x17, 0x40000000},
{0x1d, 0x40700001},
{0x21, 0x02211050}),
+ SND_HDA_PIN_QUIRK(0x10ec0256, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
+ {0x12, 0x90a60140},
+ {0x13, 0x40000000},
+ {0x14, 0x90170110},
+ {0x19, 0x411111f0},
+ {0x1a, 0x411111f0},
+ {0x1b, 0x411111f0},
+ {0x1d, 0x40700001},
+ {0x1e, 0x411111f0},
+ {0x21, 0x02211020}),
SND_HDA_PIN_QUIRK(0x10ec0280, 0x103c, "HP", ALC280_FIXUP_HP_GPIO4,
{0x12, 0x90a60130},
{0x13, 0x40000000},
#include <sound/tlv.h>
#include <linux/mfd/arizona/core.h>
-#include <linux/mfd/arizona/gpio.h>
#include <linux/mfd/arizona/registers.h>
#include "arizona.h"
switch (arizona->type) {
case WM5110:
+ case WM8280:
snd_soc_dapm_disable_pin(&codec->dapm, "DRC2 Signal Activity");
break;
default:
switch (fll->arizona->type) {
case WM5110:
+ case WM8280:
if (fll->arizona->rev < 3 || sync)
return init_ratio;
break;
ret, pcm512x->pll_out);
return ret;
}
-
- gpio = PCM512x_G1OE << (4 - 1);
- ret = regmap_update_bits(pcm512x->regmap, PCM512x_GPIO_EN,
- gpio, gpio);
- if (ret != 0) {
- dev_err(codec->dev, "Failed to enable gpio %d: %d\n",
- 4, ret);
- return ret;
- }
-
- gpio = PCM512x_GPIO_OUTPUT_1 + 4 - 1;
- ret = regmap_update_bits(pcm512x->regmap, gpio,
- PCM512x_GxSL, PCM512x_GxSL_PLLLK);
- if (ret != 0) {
- dev_err(codec->dev,
- "Failed to output pll lock on %d: %d\n",
- ret, 4);
- return ret;
- }
}
ret = regmap_update_bits(pcm512x->regmap, PCM512x_SYNCHRONIZE,
ret = snd_soc_register_dais(cmpnt, dai_drv, num_dai, true);
if (ret < 0) {
- dev_err(dev, "ASoC: Failed to regster DAIs: %d\n", ret);
+ dev_err(dev, "ASoC: Failed to register DAIs: %d\n", ret);
goto err_cleanup;
}
ret = snd_soc_register_dais(&codec->component, dai_drv, num_dai, false);
if (ret < 0) {
- dev_err(dev, "ASoC: Failed to regster DAIs: %d\n", ret);
+ dev_err(dev, "ASoC: Failed to register DAIs: %d\n", ret);
goto err_cleanup;
}
{ USB_ID(0x041e, 0x3040), 2, 2, 6, 6, 2, 0x6e91 }, /* Live! 24-bit */
{ USB_ID(0x041e, 0x3042), 0, 1, 1, 1, 1, 0x000d }, /* Usb X-Fi S51 */
{ USB_ID(0x041e, 0x30df), 0, 1, 1, 1, 1, 0x000d }, /* Usb X-Fi S51 Pro */
+ { USB_ID(0x041e, 0x3237), 0, 1, 1, 1, 1, 0x000d }, /* Usb X-Fi S51 Pro */
{ USB_ID(0x041e, 0x3048), 2, 2, 6, 6, 2, 0x6e91 }, /* Toshiba SB0500 */
};
bool snd_usb_get_sample_rate_quirk(struct snd_usb_audio *chip)
{
- /* MS Lifecam HD-5000 doesn't support reading the sample rate. */
- return chip->usb_id == USB_ID(0x045E, 0x076D);
+ /* devices which do not support reading the sample rate. */
+ switch (chip->usb_id) {
+ case USB_ID(0x045E, 0x076D): /* MS Lifecam HD-5000 */
+ case USB_ID(0x04D8, 0xFEEA): /* Benchmark DAC1 Pre */
+ return true;
+ }
+ return false;
}
/* Marantz/Denon USB DACs need a vendor cmd to switch
--- /dev/null
+###
+# build: Generic definitions
+#
+# Lots of this code have been borrowed or heavily inspired from parts
+# of kbuild code, which is not credited, but mostly developed by:
+#
+# Copyright (C) Sam Ravnborg <sam@mars.ravnborg.org>, 2015
+# Copyright (C) Linus Torvalds <torvalds@linux-foundation.org>, 2015
+#
+
+###
+# Convenient variables
+comma := ,
+squote := '
+
+###
+# Name of target with a '.' as filename prefix. foo/bar.o => foo/.bar.o
+dot-target = $(dir $@).$(notdir $@)
+
+###
+# filename of target with directory and extension stripped
+basetarget = $(basename $(notdir $@))
+
+###
+# The temporary file to save gcc -MD generated dependencies must not
+# contain a comma
+depfile = $(subst $(comma),_,$(dot-target).d)
+
+###
+# Check if both arguments has same arguments. Result is empty string if equal.
+arg-check = $(strip $(filter-out $(cmd_$(1)), $(cmd_$@)) \
+ $(filter-out $(cmd_$@), $(cmd_$(1))) )
+
+###
+# Escape single quote for use in echo statements
+escsq = $(subst $(squote),'\$(squote)',$1)
+
+# Echo command
+# Short version is used, if $(quiet) equals `quiet_', otherwise full one.
+echo-cmd = $(if $($(quiet)cmd_$(1)),\
+ echo ' $(call escsq,$($(quiet)cmd_$(1)))';)
+
+###
+# Replace >$< with >$$< to preserve $ when reloading the .cmd file
+# (needed for make)
+# Replace >#< with >\#< to avoid starting a comment in the .cmd file
+# (needed for make)
+# Replace >'< with >'\''< to be able to enclose the whole string in '...'
+# (needed for the shell)
+make-cmd = $(call escsq,$(subst \#,\\\#,$(subst $$,$$$$,$(cmd_$(1)))))
+
+###
+# Find any prerequisites that is newer than target or that does not exist.
+# PHONY targets skipped in both cases.
+any-prereq = $(filter-out $(PHONY),$?) $(filter-out $(PHONY) $(wildcard $^),$^)
+
+###
+# if_changed_dep - execute command if any prerequisite is newer than
+# target, or command line has changed and update
+# dependencies in the cmd file
+if_changed_dep = $(if $(strip $(any-prereq) $(arg-check)), \
+ @set -e; \
+ $(echo-cmd) $(cmd_$(1)); \
+ cat $(depfile) > $(dot-target).cmd; \
+ printf '%s\n' 'cmd_$@ := $(make-cmd)' >> $(dot-target).cmd)
+
+# if_changed - execute command if any prerequisite is newer than
+# target, or command line has changed
+if_changed = $(if $(strip $(any-prereq) $(arg-check)), \
+ @set -e; \
+ $(echo-cmd) $(cmd_$(1)); \
+ printf '%s\n' 'cmd_$@ := $(make-cmd)' > $(dot-target).cmd)
+
+###
+# C flags to be used in rule definitions, includes:
+# - depfile generation
+# - global $(CFLAGS)
+# - per target C flags
+# - per object C flags
+# - BUILD_STR macro to allow '-D"$(variable)"' constructs
+c_flags = -Wp,-MD,$(depfile),-MT,$@ $(CFLAGS) -D"BUILD_STR(s)=\#s" $(CFLAGS_$(basetarget).o) $(CFLAGS_$(obj))
--- /dev/null
+Build Framework
+===============
+
+The perf build framework was adopted from the kernel build system, hence the
+idea and the way how objects are built is the same.
+
+Basically the user provides set of 'Build' files that list objects and
+directories to nest for specific target to be build.
+
+Unlike the kernel we don't have a single build object 'obj-y' list that where
+we setup source objects, but we support more. This allows one 'Build' file to
+carry a sources list for multiple build objects.
+
+a) Build framework makefiles
+----------------------------
+
+The build framework consists of 2 Makefiles:
+
+ Build.include
+ Makefile.build
+
+While the 'Build.include' file contains just some generic definitions, the
+'Makefile.build' file is the makefile used from the outside. It's
+interface/usage is following:
+
+ $ make -f tools/build/Makefile srctree=$(KSRC) dir=$(DIR) obj=$(OBJECT)
+
+where:
+
+ KSRC - is the path to kernel sources
+ DIR - is the path to the project to be built
+ OBJECT - is the name of the build object
+
+When succefully finished the $(DIR) directory contains the final object file
+called $(OBJECT)-in.o:
+
+ $ ls $(DIR)/$(OBJECT)-in.o
+
+which includes all compiled sources described in 'Build' makefiles.
+
+a) Build makefiles
+------------------
+
+The user supplies 'Build' makefiles that contains a objects list, and connects
+the build to nested directories.
+
+Assume we have the following project structure:
+
+ ex/a.c
+ /b.c
+ /c.c
+ /d.c
+ /arch/e.c
+ /arch/f.c
+
+Out of which you build the 'ex' binary ' and the 'libex.a' library:
+
+ 'ex' - consists of 'a.o', 'b.o' and libex.a
+ 'libex.a' - consists of 'c.o', 'd.o', 'e.o' and 'f.o'
+
+The build framework does not create the 'ex' and 'libex.a' binaries for you, it
+only prepares proper objects to be compiled and grouped together.
+
+To follow the above example, the user provides following 'Build' files:
+
+ ex/Build:
+ ex-y += a.o
+ ex-y += b.o
+
+ libex-y += c.o
+ libex-y += d.o
+ libex-y += arch/
+
+ ex/arch/Build:
+ libex-y += e.o
+ libex-y += f.o
+
+and runs:
+
+ $ make -f tools/build/Makefile.build dir=. obj=ex
+ $ make -f tools/build/Makefile.build dir=. obj=libex
+
+which creates the following objects:
+
+ ex/ex-in.o
+ ex/libex-in.o
+
+that contain request objects names in Build files.
+
+It's only a matter of 2 single commands to create the final binaries:
+
+ $ ar rcs libex.a libex-in.o
+ $ gcc -o ex ex-in.o libex.a
+
+You can check the 'ex' example in 'tools/build/tests/ex' for more details.
+
+b) Rules
+--------
+
+The build framework provides standard compilation rules to handle .S and .c
+compilation.
+
+It's possible to include special rule if needed (like we do for flex or bison
+code generation).
+
+c) CFLAGS
+---------
+
+It's possible to alter the standard object C flags in the following way:
+
+ CFLAGS_perf.o += '...' - alters CFLAGS for perf.o object
+ CFLAGS_gtk += '...' - alters CFLAGS for gtk build object
+
+This C flags changes has the scope of the Build makefile they are defined in.
+
+
+d) Dependencies
+---------------
+
+For each built object file 'a.o' the '.a.cmd' is created and holds:
+
+ - Command line used to built that object
+ (for each object)
+
+ - Dependency rules generated by 'gcc -Wp,-MD,...'
+ (for compiled object)
+
+All existing '.cmd' files are included in the Build process to follow properly
+the dependencies and trigger a rebuild when necessary.
+
+
+e) Single rules
+---------------
+
+It's possible to build single object file by choice, like:
+
+ $ make util/map.o # objects
+ $ make util/map.i # preprocessor
+ $ make util/map.s # assembly
--- /dev/null
+###
+# Main build makefile.
+#
+# Lots of this code have been borrowed or heavily inspired from parts
+# of kbuild code, which is not credited, but mostly developed by:
+#
+# Copyright (C) Sam Ravnborg <sam@mars.ravnborg.org>, 2015
+# Copyright (C) Linus Torvalds <torvalds@linux-foundation.org>, 2015
+#
+
+PHONY := __build
+__build:
+
+ifeq ($(V),1)
+ quiet =
+ Q =
+else
+ quiet=quiet_
+ Q=@
+endif
+
+build-dir := $(srctree)/tools/build
+
+# Generic definitions
+include $(build-dir)/Build.include
+
+# do not force detected configuration
+-include .config-detected
+
+# Init all relevant variables used in build files so
+# 1) they have correct type
+# 2) they do not inherit any value from the environment
+subdir-y :=
+obj-y :=
+subdir-y :=
+subdir-obj-y :=
+
+# Build definitions
+build-file := $(dir)/Build
+include $(build-file)
+
+quiet_cmd_flex = FLEX $@
+quiet_cmd_bison = BISON $@
+
+# Create directory unless it exists
+quiet_cmd_mkdir = MKDIR $(dir $@)
+ cmd_mkdir = mkdir -p $(dir $@)
+ rule_mkdir = $(if $(wildcard $(dir $@)),,@$(call echo-cmd,mkdir) $(cmd_mkdir))
+
+# Compile command
+quiet_cmd_cc_o_c = CC $@
+ cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
+
+quiet_cmd_cc_i_c = CPP $@
+ cmd_cc_i_c = $(CC) $(c_flags) -E -o $@ $<
+
+quiet_cmd_cc_s_c = AS $@
+ cmd_cc_s_c = $(CC) $(c_flags) -S -o $@ $<
+
+# Link agregate command
+# If there's nothing to link, create empty $@ object.
+quiet_cmd_ld_multi = LD $@
+ cmd_ld_multi = $(if $(strip $(obj-y)),\
+ $(LD) -r -o $@ $(obj-y),rm -f $@; $(AR) rcs $@)
+
+# Build rules
+$(OUTPUT)%.o: %.c FORCE
+ $(call rule_mkdir)
+ $(call if_changed_dep,cc_o_c)
+
+$(OUTPUT)%.o: %.S FORCE
+ $(call rule_mkdir)
+ $(call if_changed_dep,cc_o_c)
+
+$(OUTPUT)%.i: %.c FORCE
+ $(call rule_mkdir)
+ $(call if_changed_dep,cc_i_c)
+
+$(OUTPUT)%.i: %.S FORCE
+ $(call rule_mkdir)
+ $(call if_changed_dep,cc_i_c)
+
+$(OUTPUT)%.s: %.c FORCE
+ $(call rule_mkdir)
+ $(call if_changed_dep,cc_s_c)
+
+# Gather build data:
+# obj-y - list of build objects
+# subdir-y - list of directories to nest
+# subdir-obj-y - list of directories objects 'dir/$(obj)-in.o'
+obj-y := $($(obj)-y)
+subdir-y := $(patsubst %/,%,$(filter %/, $(obj-y)))
+obj-y := $(patsubst %/, %/$(obj)-in.o, $(obj-y))
+subdir-obj-y := $(filter %/$(obj)-in.o, $(obj-y))
+
+# '$(OUTPUT)/dir' prefix to all objects
+prefix := $(subst ./,,$(OUTPUT)$(dir)/)
+obj-y := $(addprefix $(prefix),$(obj-y))
+subdir-obj-y := $(addprefix $(prefix),$(subdir-obj-y))
+
+# Final '$(obj)-in.o' object
+in-target := $(prefix)$(obj)-in.o
+
+PHONY += $(subdir-y)
+
+$(subdir-y):
+ $(Q)$(MAKE) -f $(build-dir)/Makefile.build dir=$(dir)/$@ obj=$(obj)
+
+$(sort $(subdir-obj-y)): $(subdir-y) ;
+
+$(in-target): $(obj-y) FORCE
+ $(call rule_mkdir)
+ $(call if_changed,ld_multi)
+
+__build: $(in-target)
+ @:
+
+PHONY += FORCE
+FORCE:
+
+# Include all cmd files to get all the dependency rules
+# for all objects included
+targets := $(wildcard $(sort $(obj-y) $(in-target) $(MAKECMDGOALS)))
+cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
+
+ifneq ($(cmd_files),)
+ include $(cmd_files)
+endif
+
+.PHONY: $(PHONY)
--- /dev/null
+feature_dir := $(srctree)/tools/build/feature
+
+ifneq ($(OUTPUT),)
+ OUTPUT_FEATURES = $(OUTPUT)feature/
+ $(shell mkdir -p $(OUTPUT_FEATURES))
+endif
+
+feature_check = $(eval $(feature_check_code))
+define feature_check_code
+ feature-$(1) := $(shell $(MAKE) OUTPUT=$(OUTPUT_FEATURES) CFLAGS="$(EXTRA_CFLAGS) $(FEATURE_CHECK_CFLAGS-$(1))" LDFLAGS="$(LDFLAGS) $(FEATURE_CHECK_LDFLAGS-$(1))" -C $(feature_dir) test-$1.bin >/dev/null 2>/dev/null && echo 1 || echo 0)
+endef
+
+feature_set = $(eval $(feature_set_code))
+define feature_set_code
+ feature-$(1) := 1
+endef
+
+#
+# Build the feature check binaries in parallel, ignore errors, ignore return value and suppress output:
+#
+
+#
+# Note that this is not a complete list of all feature tests, just
+# those that are typically built on a fully configured system.
+#
+# [ Feature tests not mentioned here have to be built explicitly in
+# the rule that uses them - an example for that is the 'bionic'
+# feature check. ]
+#
+FEATURE_TESTS = \
+ backtrace \
+ dwarf \
+ fortify-source \
+ sync-compare-and-swap \
+ glibc \
+ gtk2 \
+ gtk2-infobar \
+ libaudit \
+ libbfd \
+ libelf \
+ libelf-getphdrnum \
+ libelf-mmap \
+ libnuma \
+ libperl \
+ libpython \
+ libpython-version \
+ libslang \
+ libunwind \
+ pthread-attr-setaffinity-np \
+ stackprotector-all \
+ timerfd \
+ libdw-dwarf-unwind \
+ zlib \
+ lzma
+
+FEATURE_DISPLAY = \
+ dwarf \
+ glibc \
+ gtk2 \
+ libaudit \
+ libbfd \
+ libelf \
+ libnuma \
+ libperl \
+ libpython \
+ libslang \
+ libunwind \
+ libdw-dwarf-unwind \
+ zlib \
+ lzma
+
+# Set FEATURE_CHECK_(C|LD)FLAGS-all for all FEATURE_TESTS features.
+# If in the future we need per-feature checks/flags for features not
+# mentioned in this list we need to refactor this ;-).
+set_test_all_flags = $(eval $(set_test_all_flags_code))
+define set_test_all_flags_code
+ FEATURE_CHECK_CFLAGS-all += $(FEATURE_CHECK_CFLAGS-$(1))
+ FEATURE_CHECK_LDFLAGS-all += $(FEATURE_CHECK_LDFLAGS-$(1))
+endef
+
+$(foreach feat,$(FEATURE_TESTS),$(call set_test_all_flags,$(feat)))
+
+#
+# Special fast-path for the 'all features are available' case:
+#
+$(call feature_check,all,$(MSG))
+
+#
+# Just in case the build freshly failed, make sure we print the
+# feature matrix:
+#
+ifeq ($(feature-all), 1)
+ #
+ # test-all.c passed - just set all the core feature flags to 1:
+ #
+ $(foreach feat,$(FEATURE_TESTS),$(call feature_set,$(feat)))
+else
+ $(shell $(MAKE) OUTPUT=$(OUTPUT_FEATURES) CFLAGS="$(EXTRA_CFLAGS)" LDFLAGS=$(LDFLAGS) -i -j -C $(feature_dir) $(addsuffix .bin,$(FEATURE_TESTS)) >/dev/null 2>&1)
+ $(foreach feat,$(FEATURE_TESTS),$(call feature_check,$(feat)))
+endif
+
+#
+# Print the result of the feature test:
+#
+feature_print_status = $(eval $(feature_print_status_code)) $(info $(MSG))
+
+define feature_print_status_code
+ ifeq ($(feature-$(1)), 1)
+ MSG = $(shell printf '...%30s: [ \033[32mon\033[m ]' $(1))
+ else
+ MSG = $(shell printf '...%30s: [ \033[31mOFF\033[m ]' $(1))
+ endif
+endef
+
+feature_print_text = $(eval $(feature_print_text_code)) $(info $(MSG))
+define feature_print_text_code
+ MSG = $(shell printf '...%30s: %s' $(1) $(2))
+endef
+
+FEATURE_DUMP := $(foreach feat,$(FEATURE_DISPLAY),feature-$(feat)($(feature-$(feat))))
+FEATURE_DUMP_FILE := $(shell touch $(OUTPUT)FEATURE-DUMP; cat $(OUTPUT)FEATURE-DUMP)
+
+ifeq ($(dwarf-post-unwind),1)
+ FEATURE_DUMP += dwarf-post-unwind($(dwarf-post-unwind-text))
+endif
+
+# The $(feature_display) controls the default detection message
+# output. It's set if:
+# - detected features differes from stored features from
+# last build (in FEATURE-DUMP file)
+# - one of the $(FEATURE_DISPLAY) is not detected
+# - VF is enabled
+
+ifneq ("$(FEATURE_DUMP)","$(FEATURE_DUMP_FILE)")
+ $(shell echo "$(FEATURE_DUMP)" > $(OUTPUT)FEATURE-DUMP)
+ feature_display := 1
+endif
+
+feature_display_check = $(eval $(feature_check_code))
+define feature_display_check_code
+ ifneq ($(feature-$(1)), 1)
+ feature_display := 1
+ endif
+endef
+
+$(foreach feat,$(FEATURE_DISPLAY),$(call feature_display_check,$(feat)))
+
+ifeq ($(VF),1)
+ feature_display := 1
+ feature_verbose := 1
+endif
+
+ifeq ($(feature_display),1)
+ $(info )
+ $(info Auto-detecting system features:)
+ $(foreach feat,$(FEATURE_DISPLAY),$(call feature_print_status,$(feat),))
+
+ ifeq ($(dwarf-post-unwind),1)
+ $(call feature_print_text,"DWARF post unwind library", $(dwarf-post-unwind-text))
+ endif
+
+ ifneq ($(feature_verbose),1)
+ $(info )
+ endif
+endif
+
+ifeq ($(feature_verbose),1)
+ TMP := $(filter-out $(FEATURE_DISPLAY),$(FEATURE_TESTS))
+ $(foreach feat,$(TMP),$(call feature_print_status,$(feat),))
+ $(info )
+endif
--- /dev/null
+*.d
+*.bin
+*.output
--- /dev/null
+
+FILES= \
+ test-all.bin \
+ test-backtrace.bin \
+ test-bionic.bin \
+ test-dwarf.bin \
+ test-fortify-source.bin \
+ test-sync-compare-and-swap.bin \
+ test-glibc.bin \
+ test-gtk2.bin \
+ test-gtk2-infobar.bin \
+ test-hello.bin \
+ test-libaudit.bin \
+ test-libbfd.bin \
+ test-liberty.bin \
+ test-liberty-z.bin \
+ test-cplus-demangle.bin \
+ test-libelf.bin \
+ test-libelf-getphdrnum.bin \
+ test-libelf-mmap.bin \
+ test-libnuma.bin \
+ test-libperl.bin \
+ test-libpython.bin \
+ test-libpython-version.bin \
+ test-libslang.bin \
+ test-libunwind.bin \
+ test-libunwind-debug-frame.bin \
+ test-pthread-attr-setaffinity-np.bin \
+ test-stackprotector-all.bin \
+ test-timerfd.bin \
+ test-libdw-dwarf-unwind.bin \
+ test-libbabeltrace.bin \
+ test-compile-32.bin \
+ test-compile-x32.bin \
+ test-zlib.bin \
+ test-lzma.bin
+
+CC := $(CROSS_COMPILE)gcc -MD
+PKG_CONFIG := $(CROSS_COMPILE)pkg-config
+
+all: $(FILES)
+
+__BUILD = $(CC) $(CFLAGS) -Wall -Werror -o $(OUTPUT)$@ $(patsubst %.bin,%.c,$@) $(LDFLAGS)
+ BUILD = $(__BUILD) > $(OUTPUT)$(@:.bin=.make.output) 2>&1
+
+###############################
+
+test-all.bin:
+ $(BUILD) -fstack-protector-all -O2 -D_FORTIFY_SOURCE=2 -ldw -lelf -lnuma -lelf -laudit -I/usr/include/slang -lslang $(shell $(PKG_CONFIG) --libs --cflags gtk+-2.0 2>/dev/null) $(FLAGS_PERL_EMBED) $(FLAGS_PYTHON_EMBED) -DPACKAGE='"perf"' -lbfd -ldl -lz -llzma
+
+test-hello.bin:
+ $(BUILD)
+
+test-pthread-attr-setaffinity-np.bin:
+ $(BUILD) -D_GNU_SOURCE -lpthread
+
+test-stackprotector-all.bin:
+ $(BUILD) -fstack-protector-all
+
+test-fortify-source.bin:
+ $(BUILD) -O2 -D_FORTIFY_SOURCE=2
+
+test-bionic.bin:
+ $(BUILD)
+
+test-libelf.bin:
+ $(BUILD) -lelf
+
+test-glibc.bin:
+ $(BUILD)
+
+test-dwarf.bin:
+ $(BUILD) -ldw
+
+test-libelf-mmap.bin:
+ $(BUILD) -lelf
+
+test-libelf-getphdrnum.bin:
+ $(BUILD) -lelf
+
+test-libnuma.bin:
+ $(BUILD) -lnuma
+
+test-libunwind.bin:
+ $(BUILD) -lelf
+
+test-libunwind-debug-frame.bin:
+ $(BUILD) -lelf
+
+test-libaudit.bin:
+ $(BUILD) -laudit
+
+test-libslang.bin:
+ $(BUILD) -I/usr/include/slang -lslang
+
+test-gtk2.bin:
+ $(BUILD) $(shell $(PKG_CONFIG) --libs --cflags gtk+-2.0 2>/dev/null)
+
+test-gtk2-infobar.bin:
+ $(BUILD) $(shell $(PKG_CONFIG) --libs --cflags gtk+-2.0 2>/dev/null)
+
+grep-libs = $(filter -l%,$(1))
+strip-libs = $(filter-out -l%,$(1))
+
+PERL_EMBED_LDOPTS = $(shell perl -MExtUtils::Embed -e ldopts 2>/dev/null)
+PERL_EMBED_LDFLAGS = $(call strip-libs,$(PERL_EMBED_LDOPTS))
+PERL_EMBED_LIBADD = $(call grep-libs,$(PERL_EMBED_LDOPTS))
+PERL_EMBED_CCOPTS = `perl -MExtUtils::Embed -e ccopts 2>/dev/null`
+FLAGS_PERL_EMBED=$(PERL_EMBED_CCOPTS) $(PERL_EMBED_LDOPTS)
+
+test-libperl.bin:
+ $(BUILD) $(FLAGS_PERL_EMBED)
+
+test-libpython.bin:
+ $(BUILD)
+
+test-libpython-version.bin:
+ $(BUILD)
+
+test-libbfd.bin:
+ $(BUILD) -DPACKAGE='"perf"' -lbfd -lz -liberty -ldl
+
+test-liberty.bin:
+ $(CC) -Wall -Werror -o $(OUTPUT)$@ test-libbfd.c -DPACKAGE='"perf"' -lbfd -ldl -liberty
+
+test-liberty-z.bin:
+ $(CC) -Wall -Werror -o $(OUTPUT)$@ test-libbfd.c -DPACKAGE='"perf"' -lbfd -ldl -liberty -lz
+
+test-cplus-demangle.bin:
+ $(BUILD) -liberty
+
+test-backtrace.bin:
+ $(BUILD)
+
+test-timerfd.bin:
+ $(BUILD)
+
+test-libdw-dwarf-unwind.bin:
+ $(BUILD) # -ldw provided by $(FEATURE_CHECK_LDFLAGS-libdw-dwarf-unwind)
+
+test-libbabeltrace.bin:
+ $(BUILD) # -lbabeltrace provided by $(FEATURE_CHECK_LDFLAGS-libbabeltrace)
+
+test-sync-compare-and-swap.bin:
+ $(BUILD)
+
+test-compile-32.bin:
+ $(CC) -m32 -o $(OUTPUT)$@ test-compile.c
+
+test-compile-x32.bin:
+ $(CC) -mx32 -o $(OUTPUT)$@ test-compile.c
+
+test-zlib.bin:
+ $(BUILD) -lz
+
+test-lzma.bin:
+ $(BUILD) -llzma
+
+-include *.d
+
+###############################
+
+clean:
+ rm -f $(FILES) *.d $(FILES:.bin=.make.output)
--- /dev/null
+/*
+ * test-all.c: Try to build all the main testcases at once.
+ *
+ * A well-configured system will have all the prereqs installed, so we can speed
+ * up auto-detection on such systems.
+ */
+
+/*
+ * Quirk: Python and Perl headers cannot be in arbitrary places, so keep
+ * these 3 testcases at the top:
+ */
+#define main main_test_libpython
+# include "test-libpython.c"
+#undef main
+
+#define main main_test_libpython_version
+# include "test-libpython-version.c"
+#undef main
+
+#define main main_test_libperl
+# include "test-libperl.c"
+#undef main
+
+#define main main_test_hello
+# include "test-hello.c"
+#undef main
+
+#define main main_test_libelf
+# include "test-libelf.c"
+#undef main
+
+#define main main_test_libelf_mmap
+# include "test-libelf-mmap.c"
+#undef main
+
+#define main main_test_glibc
+# include "test-glibc.c"
+#undef main
+
+#define main main_test_dwarf
+# include "test-dwarf.c"
+#undef main
+
+#define main main_test_libelf_getphdrnum
+# include "test-libelf-getphdrnum.c"
+#undef main
+
+#define main main_test_libunwind
+# include "test-libunwind.c"
+#undef main
+
+#define main main_test_libaudit
+# include "test-libaudit.c"
+#undef main
+
+#define main main_test_libslang
+# include "test-libslang.c"
+#undef main
+
+#define main main_test_gtk2
+# include "test-gtk2.c"
+#undef main
+
+#define main main_test_gtk2_infobar
+# include "test-gtk2-infobar.c"
+#undef main
+
+#define main main_test_libbfd
+# include "test-libbfd.c"
+#undef main
+
+#define main main_test_backtrace
+# include "test-backtrace.c"
+#undef main
+
+#define main main_test_libnuma
+# include "test-libnuma.c"
+#undef main
+
+#define main main_test_timerfd
+# include "test-timerfd.c"
+#undef main
+
+#define main main_test_stackprotector_all
+# include "test-stackprotector-all.c"
+#undef main
+
+#define main main_test_libdw_dwarf_unwind
+# include "test-libdw-dwarf-unwind.c"
+#undef main
+
+#define main main_test_sync_compare_and_swap
+# include "test-sync-compare-and-swap.c"
+#undef main
+
+#define main main_test_zlib
+# include "test-zlib.c"
+#undef main
+
+#define main main_test_pthread_attr_setaffinity_np
+# include "test-pthread-attr-setaffinity-np.c"
+#undef main
+
+# if 0
+/*
+ * Disable libbabeltrace check for test-all, because the requested
+ * library version is not released yet in most distributions. Will
+ * reenable later.
+ */
+
+#define main main_test_libbabeltrace
+# include "test-libbabeltrace.c"
+#undef main
+#endif
+
+#define main main_test_lzma
+# include "test-lzma.c"
+#undef main
+
+int main(int argc, char *argv[])
+{
+ main_test_libpython();
+ main_test_libpython_version();
+ main_test_libperl();
+ main_test_hello();
+ main_test_libelf();
+ main_test_libelf_mmap();
+ main_test_glibc();
+ main_test_dwarf();
+ main_test_libelf_getphdrnum();
+ main_test_libunwind();
+ main_test_libaudit();
+ main_test_libslang();
+ main_test_gtk2(argc, argv);
+ main_test_gtk2_infobar(argc, argv);
+ main_test_libbfd();
+ main_test_backtrace();
+ main_test_libnuma();
+ main_test_timerfd();
+ main_test_stackprotector_all();
+ main_test_libdw_dwarf_unwind();
+ main_test_sync_compare_and_swap(argc, argv);
+ main_test_zlib();
+ main_test_pthread_attr_setaffinity_np();
+ main_test_lzma();
+
+ return 0;
+}
--- /dev/null
+#include <execinfo.h>
+#include <stdio.h>
+
+int main(void)
+{
+ void *backtrace_fns[10];
+ size_t entries;
+
+ entries = backtrace(backtrace_fns, 10);
+ backtrace_symbols_fd(backtrace_fns, entries, 1);
+
+ return 0;
+}
--- /dev/null
+#include <android/api-level.h>
+
+int main(void)
+{
+ return __ANDROID_API__;
+}
--- /dev/null
+int main(void)
+{
+ return 0;
+}
--- /dev/null
+extern int printf(const char *format, ...);
+extern char *cplus_demangle(const char *, int);
+
+int main(void)
+{
+ char symbol[4096] = "FieldName__9ClassNameFd";
+ char *tmp;
+
+ tmp = cplus_demangle(symbol, 0);
+
+ printf("demangled symbol: {%s}\n", tmp);
+
+ return 0;
+}
--- /dev/null
+#include <dwarf.h>
+#include <elfutils/libdw.h>
+#include <elfutils/version.h>
+
+int main(void)
+{
+ Dwarf *dbg = dwarf_begin(0, DWARF_C_READ);
+
+ return (long)dbg;
+}
--- /dev/null
+#include <stdio.h>
+
+int main(void)
+{
+ return puts("hi");
+}
--- /dev/null
+#include <gnu/libc-version.h>
+
+int main(void)
+{
+ const char *version = gnu_get_libc_version();
+
+ return (long)version;
+}
--- /dev/null
+#pragma GCC diagnostic ignored "-Wstrict-prototypes"
+#include <gtk/gtk.h>
+#pragma GCC diagnostic error "-Wstrict-prototypes"
+
+int main(int argc, char *argv[])
+{
+ gtk_init(&argc, &argv);
+ gtk_info_bar_new();
+
+ return 0;
+}
--- /dev/null
+#pragma GCC diagnostic ignored "-Wstrict-prototypes"
+#include <gtk/gtk.h>
+#pragma GCC diagnostic error "-Wstrict-prototypes"
+
+int main(int argc, char *argv[])
+{
+ gtk_init(&argc, &argv);
+
+ return 0;
+}
--- /dev/null
+#include <stdio.h>
+
+int main(void)
+{
+ return puts("hi");
+}
--- /dev/null
+#include <libaudit.h>
+
+extern int printf(const char *format, ...);
+
+int main(void)
+{
+ printf("error message: %s\n", audit_errno_to_name(0));
+
+ return audit_open();
+}
--- /dev/null
+
+#include <babeltrace/ctf-writer/writer.h>
+#include <babeltrace/ctf-ir/stream-class.h>
+
+int main(void)
+{
+ bt_ctf_stream_class_get_packet_context_type((void *) 0);
+ return 0;
+}
--- /dev/null
+#include <bfd.h>
+
+extern int printf(const char *format, ...);
+
+int main(void)
+{
+ char symbol[4096] = "FieldName__9ClassNameFd";
+ char *tmp;
+
+ tmp = bfd_demangle(0, symbol, 0);
+
+ printf("demangled symbol: {%s}\n", tmp);
+
+ return 0;
+}
--- /dev/null
+
+#include <elfutils/libdwfl.h>
+
+int main(void)
+{
+ /*
+ * This function is guarded via: __nonnull_attribute__ (1, 2).
+ * Passing '1' as arguments value. This code is never executed,
+ * only compiled.
+ */
+ dwfl_thread_getframes((void *) 1, (void *) 1, NULL);
+ return 0;
+}
--- /dev/null
+#include <libelf.h>
+
+int main(void)
+{
+ size_t dst;
+
+ return elf_getphdrnum(0, &dst);
+}
--- /dev/null
+#include <libelf.h>
+
+int main(void)
+{
+ Elf *elf = elf_begin(0, ELF_C_READ_MMAP, 0);
+
+ return (long)elf;
+}
--- /dev/null
+#include <libelf.h>
+
+int main(void)
+{
+ Elf *elf = elf_begin(0, ELF_C_READ, 0);
+
+ return (long)elf;
+}
--- /dev/null
+#include <numa.h>
+#include <numaif.h>
+
+int main(void)
+{
+ numa_available();
+
+ return 0;
+}
--- /dev/null
+#include <EXTERN.h>
+#include <perl.h>
+
+int main(void)
+{
+ perl_alloc();
+
+ return 0;
+}
--- /dev/null
+#include <Python.h>
+
+#if PY_VERSION_HEX >= 0x03000000
+ #error
+#endif
+
+int main(void)
+{
+ return 0;
+}
--- /dev/null
+#include <Python.h>
+
+int main(void)
+{
+ Py_Initialize();
+
+ return 0;
+}
--- /dev/null
+#include <slang.h>
+
+int main(void)
+{
+ return SLsmg_init_smg();
+}
--- /dev/null
+#include <libunwind.h>
+#include <stdlib.h>
+
+extern int
+UNW_OBJ(dwarf_find_debug_frame) (int found, unw_dyn_info_t *di_debug,
+ unw_word_t ip, unw_word_t segbase,
+ const char *obj_name, unw_word_t start,
+ unw_word_t end);
+
+#define dwarf_find_debug_frame UNW_OBJ(dwarf_find_debug_frame)
+
+int main(void)
+{
+ dwarf_find_debug_frame(0, NULL, 0, 0, NULL, 0, 0);
+ return 0;
+}
--- /dev/null
+#include <libunwind.h>
+#include <stdlib.h>
+
+extern int UNW_OBJ(dwarf_search_unwind_table) (unw_addr_space_t as,
+ unw_word_t ip,
+ unw_dyn_info_t *di,
+ unw_proc_info_t *pi,
+ int need_unwind_info, void *arg);
+
+
+#define dwarf_search_unwind_table UNW_OBJ(dwarf_search_unwind_table)
+
+static unw_accessors_t accessors;
+
+int main(void)
+{
+ unw_addr_space_t addr_space;
+
+ addr_space = unw_create_addr_space(&accessors, 0);
+ if (addr_space)
+ return 0;
+
+ unw_init_remote(NULL, addr_space, NULL);
+ dwarf_search_unwind_table(addr_space, 0, NULL, NULL, 0, NULL);
+
+ return 0;
+}
--- /dev/null
+#include <lzma.h>
+
+int main(void)
+{
+ lzma_stream strm = LZMA_STREAM_INIT;
+ int ret;
+
+ ret = lzma_stream_decoder(&strm, UINT64_MAX, LZMA_CONCATENATED);
+ return ret ? -1 : 0;
+}
--- /dev/null
+#include <stdint.h>
+#include <pthread.h>
+#include <sched.h>
+
+int main(void)
+{
+ int ret = 0;
+ pthread_attr_t thread_attr;
+ cpu_set_t cs;
+
+ pthread_attr_init(&thread_attr);
+ CPU_ZERO(&cs);
+
+ ret = pthread_attr_setaffinity_np(&thread_attr, sizeof(cs), &cs);
+
+ return ret;
+}
--- /dev/null
+#include <stdio.h>
+
+int main(void)
+{
+ return puts("hi");
+}
--- /dev/null
+#include <stdint.h>
+
+volatile uint64_t x;
+
+int main(int argc, char *argv[])
+{
+ uint64_t old, new = argc;
+
+ argv = argv;
+ do {
+ old = __sync_val_compare_and_swap(&x, 0, 0);
+ } while (!__sync_bool_compare_and_swap(&x, old, new));
+ return old == new;
+}
--- /dev/null
+/*
+ * test for timerfd functions used by perf-kvm-stat-live
+ */
+#include <sys/timerfd.h>
+
+int main(void)
+{
+ struct itimerspec new_value;
+
+ int fd = timerfd_create(CLOCK_MONOTONIC, TFD_NONBLOCK);
+ if (fd < 0)
+ return 1;
+
+ if (timerfd_settime(fd, 0, &new_value, NULL) != 0)
+ return 1;
+
+ return 0;
+}
--- /dev/null
+#include <zlib.h>
+
+int main(void)
+{
+ z_stream zs;
+
+ inflateInit(&zs);
+ return 0;
+}
--- /dev/null
+ex-y += ex.o
+ex-y += a.o
+ex-y += b.o
+ex-y += empty/
+
+libex-y += c.o
+libex-y += d.o
+libex-y += arch/
--- /dev/null
+export srctree := ../../../..
+export CC := gcc
+export LD := ld
+export AR := ar
+
+build := -f $(srctree)/tools/build/Makefile.build dir=. obj
+ex: ex-in.o libex-in.o
+ gcc -o $@ $^
+
+ex.%: FORCE
+ make -f $(srctree)/tools/build/Makefile.build dir=. $@
+
+ex-in.o: FORCE
+ make $(build)=ex
+
+libex-in.o: FORCE
+ make $(build)=libex
+
+clean:
+ find . -name '*.o' -delete -o -name '\.*.cmd' -delete -o -name '\.*.d' -delete
+ rm -f ex ex.i ex.s
+
+.PHONY: FORCE
--- /dev/null
+
+int a(void)
+{
+ return 0;
+}
--- /dev/null
+libex-y += e.o
+libex-y += f.o
--- /dev/null
+
+int e(void)
+{
+ return 0;
+}
--- /dev/null
+
+int f(void)
+{
+ return 0;
+}
--- /dev/null
+
+int b(void)
+{
+ return 0;
+}
--- /dev/null
+
+int c(void)
+{
+ return 0;
+}
--- /dev/null
+
+int d(void)
+{
+ return 0;
+}
--- /dev/null
+
+int a(void);
+int b(void);
+int c(void);
+int d(void);
+int e(void);
+int f(void);
+
+int main(void)
+{
+ a();
+ b();
+ c();
+ d();
+ e();
+ f();
+
+ return 0;
+}
--- /dev/null
+#!/bin/sh
+
+function test_ex {
+ make -C ex V=1 clean > ex.out 2>&1
+ make -C ex V=1 >> ex.out 2>&1
+
+ if [ ! -x ./ex/ex ]; then
+ echo FAILED
+ exit -1
+ fi
+
+ make -C ex V=1 clean > /dev/null 2>&1
+ rm -f ex.out
+}
+
+function test_ex_suffix {
+ make -C ex V=1 clean > ex.out 2>&1
+
+ # use -rR to disable make's builtin rules
+ make -rR -C ex V=1 ex.o >> ex.out 2>&1
+ make -rR -C ex V=1 ex.i >> ex.out 2>&1
+ make -rR -C ex V=1 ex.s >> ex.out 2>&1
+
+ if [ -x ./ex/ex ]; then
+ echo FAILED
+ exit -1
+ fi
+
+ if [ ! -f ./ex/ex.o -o ! -f ./ex/ex.i -o ! -f ./ex/ex.s ]; then
+ echo FAILED
+ exit -1
+ fi
+
+ make -C ex V=1 clean > /dev/null 2>&1
+ rm -f ex.out
+}
+echo -n Testing..
+
+test_ex
+test_ex_suffix
+
+echo OK
--- /dev/null
+CC = gcc
+CFLAGS = -Wall -g -D_GNU_SOURCE
+
+all: iio_event_monitor lsiio generic_buffer
+
+iio_event_monitor: iio_event_monitor.o iio_utils.o
+
+lsiio: lsiio.o iio_utils.o
+
+generic_buffer: generic_buffer.o iio_utils.o
+
+%.o: %.c iio_utils.h
+
+.PHONY: clean
+clean:
+ rm -f *.o iio_event_monitor lsiio generic_buffer
--- /dev/null
+/* Industrialio buffer test code.
+ *
+ * Copyright (c) 2008 Jonathan Cameron
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is primarily intended as an example application.
+ * Reads the current buffer setup from sysfs and starts a short capture
+ * from the specified device, pretty printing the result after appropriate
+ * conversion.
+ *
+ * Command line parameters
+ * generic_buffer -n <device_name> -t <trigger_name>
+ * If trigger name is not specified the program assumes you want a dataready
+ * trigger associated with the device and goes looking for it.
+ *
+ */
+
+#include <unistd.h>
+#include <stdlib.h>
+#include <dirent.h>
+#include <fcntl.h>
+#include <stdio.h>
+#include <errno.h>
+#include <sys/stat.h>
+#include <sys/dir.h>
+#include <linux/types.h>
+#include <string.h>
+#include <poll.h>
+#include <endian.h>
+#include <getopt.h>
+#include <inttypes.h>
+#include "iio_utils.h"
+
+/**
+ * size_from_channelarray() - calculate the storage size of a scan
+ * @channels: the channel info array
+ * @num_channels: number of channels
+ *
+ * Has the side effect of filling the channels[i].location values used
+ * in processing the buffer output.
+ **/
+int size_from_channelarray(struct iio_channel_info *channels, int num_channels)
+{
+ int bytes = 0;
+ int i = 0;
+
+ while (i < num_channels) {
+ if (bytes % channels[i].bytes == 0)
+ channels[i].location = bytes;
+ else
+ channels[i].location = bytes - bytes%channels[i].bytes
+ + channels[i].bytes;
+ bytes = channels[i].location + channels[i].bytes;
+ i++;
+ }
+ return bytes;
+}
+
+void print2byte(int input, struct iio_channel_info *info)
+{
+ /* First swap if incorrect endian */
+ if (info->be)
+ input = be16toh((uint16_t)input);
+ else
+ input = le16toh((uint16_t)input);
+
+ /*
+ * Shift before conversion to avoid sign extension
+ * of left aligned data
+ */
+ input >>= info->shift;
+ if (info->is_signed) {
+ int16_t val = input;
+
+ val &= (1 << info->bits_used) - 1;
+ val = (int16_t)(val << (16 - info->bits_used)) >>
+ (16 - info->bits_used);
+ printf("%05f ", ((float)val + info->offset)*info->scale);
+ } else {
+ uint16_t val = input;
+
+ val &= (1 << info->bits_used) - 1;
+ printf("%05f ", ((float)val + info->offset)*info->scale);
+ }
+}
+/**
+ * process_scan() - print out the values in SI units
+ * @data: pointer to the start of the scan
+ * @channels: information about the channels. Note
+ * size_from_channelarray must have been called first to fill the
+ * location offsets.
+ * @num_channels: number of channels
+ **/
+void process_scan(char *data,
+ struct iio_channel_info *channels,
+ int num_channels)
+{
+ int k;
+
+ for (k = 0; k < num_channels; k++)
+ switch (channels[k].bytes) {
+ /* only a few cases implemented so far */
+ case 2:
+ print2byte(*(uint16_t *)(data + channels[k].location),
+ &channels[k]);
+ break;
+ case 4:
+ if (!channels[k].is_signed) {
+ uint32_t val = *(uint32_t *)
+ (data + channels[k].location);
+ printf("%05f ", ((float)val +
+ channels[k].offset)*
+ channels[k].scale);
+
+ }
+ break;
+ case 8:
+ if (channels[k].is_signed) {
+ int64_t val = *(int64_t *)
+ (data +
+ channels[k].location);
+ if ((val >> channels[k].bits_used) & 1)
+ val = (val & channels[k].mask) |
+ ~channels[k].mask;
+ /* special case for timestamp */
+ if (channels[k].scale == 1.0f &&
+ channels[k].offset == 0.0f)
+ printf("%" PRId64 " ", val);
+ else
+ printf("%05f ", ((float)val +
+ channels[k].offset)*
+ channels[k].scale);
+ }
+ break;
+ default:
+ break;
+ }
+ printf("\n");
+}
+
+int main(int argc, char **argv)
+{
+ unsigned long num_loops = 2;
+ unsigned long timedelay = 1000000;
+ unsigned long buf_len = 128;
+
+ int ret, c, i, j, toread;
+ int fp;
+
+ int num_channels;
+ char *trigger_name = NULL, *device_name = NULL;
+ char *dev_dir_name, *buf_dir_name;
+
+ int datardytrigger = 1;
+ char *data;
+ ssize_t read_size;
+ int dev_num, trig_num;
+ char *buffer_access;
+ int scan_size;
+ int noevents = 0;
+ int notrigger = 0;
+ char *dummy;
+
+ struct iio_channel_info *channels;
+
+ while ((c = getopt(argc, argv, "l:w:c:et:n:g")) != -1) {
+ switch (c) {
+ case 'n':
+ device_name = optarg;
+ break;
+ case 't':
+ trigger_name = optarg;
+ datardytrigger = 0;
+ break;
+ case 'e':
+ noevents = 1;
+ break;
+ case 'c':
+ num_loops = strtoul(optarg, &dummy, 10);
+ break;
+ case 'w':
+ timedelay = strtoul(optarg, &dummy, 10);
+ break;
+ case 'l':
+ buf_len = strtoul(optarg, &dummy, 10);
+ break;
+ case 'g':
+ notrigger = 1;
+ break;
+ case '?':
+ return -1;
+ }
+ }
+
+ if (device_name == NULL)
+ return -1;
+
+ /* Find the device requested */
+ dev_num = find_type_by_name(device_name, "iio:device");
+ if (dev_num < 0) {
+ printf("Failed to find the %s\n", device_name);
+ ret = -ENODEV;
+ goto error_ret;
+ }
+ printf("iio device number being used is %d\n", dev_num);
+
+ asprintf(&dev_dir_name, "%siio:device%d", iio_dir, dev_num);
+
+ if (!notrigger) {
+ if (trigger_name == NULL) {
+ /*
+ * Build the trigger name. If it is device associated
+ * its name is <device_name>_dev[n] where n matches
+ * the device number found above.
+ */
+ ret = asprintf(&trigger_name,
+ "%s-dev%d", device_name, dev_num);
+ if (ret < 0) {
+ ret = -ENOMEM;
+ goto error_ret;
+ }
+ }
+
+ /* Verify the trigger exists */
+ trig_num = find_type_by_name(trigger_name, "trigger");
+ if (trig_num < 0) {
+ printf("Failed to find the trigger %s\n", trigger_name);
+ ret = -ENODEV;
+ goto error_free_triggername;
+ }
+ printf("iio trigger number being used is %d\n", trig_num);
+ } else
+ printf("trigger-less mode selected\n");
+
+ /*
+ * Parse the files in scan_elements to identify what channels are
+ * present
+ */
+ ret = build_channel_array(dev_dir_name, &channels, &num_channels);
+ if (ret) {
+ printf("Problem reading scan element information\n");
+ printf("diag %s\n", dev_dir_name);
+ goto error_free_triggername;
+ }
+
+ /*
+ * Construct the directory name for the associated buffer.
+ * As we know that the lis3l02dq has only one buffer this may
+ * be built rather than found.
+ */
+ ret = asprintf(&buf_dir_name,
+ "%siio:device%d/buffer", iio_dir, dev_num);
+ if (ret < 0) {
+ ret = -ENOMEM;
+ goto error_free_triggername;
+ }
+
+ if (!notrigger) {
+ printf("%s %s\n", dev_dir_name, trigger_name);
+ /* Set the device trigger to be the data ready trigger found
+ * above */
+ ret = write_sysfs_string_and_verify("trigger/current_trigger",
+ dev_dir_name,
+ trigger_name);
+ if (ret < 0) {
+ printf("Failed to write current_trigger file\n");
+ goto error_free_buf_dir_name;
+ }
+ }
+
+ /* Setup ring buffer parameters */
+ ret = write_sysfs_int("length", buf_dir_name, buf_len);
+ if (ret < 0)
+ goto error_free_buf_dir_name;
+
+ /* Enable the buffer */
+ ret = write_sysfs_int("enable", buf_dir_name, 1);
+ if (ret < 0)
+ goto error_free_buf_dir_name;
+ scan_size = size_from_channelarray(channels, num_channels);
+ data = malloc(scan_size*buf_len);
+ if (!data) {
+ ret = -ENOMEM;
+ goto error_free_buf_dir_name;
+ }
+
+ ret = asprintf(&buffer_access, "/dev/iio:device%d", dev_num);
+ if (ret < 0) {
+ ret = -ENOMEM;
+ goto error_free_data;
+ }
+
+ /* Attempt to open non blocking the access dev */
+ fp = open(buffer_access, O_RDONLY | O_NONBLOCK);
+ if (fp == -1) { /* If it isn't there make the node */
+ printf("Failed to open %s\n", buffer_access);
+ ret = -errno;
+ goto error_free_buffer_access;
+ }
+
+ /* Wait for events 10 times */
+ for (j = 0; j < num_loops; j++) {
+ if (!noevents) {
+ struct pollfd pfd = {
+ .fd = fp,
+ .events = POLLIN,
+ };
+
+ poll(&pfd, 1, -1);
+ toread = buf_len;
+
+ } else {
+ usleep(timedelay);
+ toread = 64;
+ }
+
+ read_size = read(fp,
+ data,
+ toread*scan_size);
+ if (read_size < 0) {
+ if (errno == -EAGAIN) {
+ printf("nothing available\n");
+ continue;
+ } else
+ break;
+ }
+ for (i = 0; i < read_size/scan_size; i++)
+ process_scan(data + scan_size*i,
+ channels,
+ num_channels);
+ }
+
+ /* Stop the buffer */
+ ret = write_sysfs_int("enable", buf_dir_name, 0);
+ if (ret < 0)
+ goto error_close_buffer_access;
+
+ if (!notrigger)
+ /* Disconnect the trigger - just write a dummy name. */
+ write_sysfs_string("trigger/current_trigger",
+ dev_dir_name, "NULL");
+
+error_close_buffer_access:
+ close(fp);
+error_free_data:
+ free(data);
+error_free_buffer_access:
+ free(buffer_access);
+error_free_buf_dir_name:
+ free(buf_dir_name);
+error_free_triggername:
+ if (datardytrigger)
+ free(trigger_name);
+error_ret:
+ return ret;
+}
--- /dev/null
+/* Industrialio event test code.
+ *
+ * Copyright (c) 2011-2012 Lars-Peter Clausen <lars@metafoo.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is primarily intended as an example application.
+ * Reads the current buffer setup from sysfs and starts a short capture
+ * from the specified device, pretty printing the result after appropriate
+ * conversion.
+ *
+ * Usage:
+ * iio_event_monitor <device_name>
+ *
+ */
+
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <errno.h>
+#include <string.h>
+#include <poll.h>
+#include <fcntl.h>
+#include <sys/ioctl.h>
+#include "iio_utils.h"
+#include <linux/iio/events.h>
+#include <linux/iio/types.h>
+
+static const char * const iio_chan_type_name_spec[] = {
+ [IIO_VOLTAGE] = "voltage",
+ [IIO_CURRENT] = "current",
+ [IIO_POWER] = "power",
+ [IIO_ACCEL] = "accel",
+ [IIO_ANGL_VEL] = "anglvel",
+ [IIO_MAGN] = "magn",
+ [IIO_LIGHT] = "illuminance",
+ [IIO_INTENSITY] = "intensity",
+ [IIO_PROXIMITY] = "proximity",
+ [IIO_TEMP] = "temp",
+ [IIO_INCLI] = "incli",
+ [IIO_ROT] = "rot",
+ [IIO_ANGL] = "angl",
+ [IIO_TIMESTAMP] = "timestamp",
+ [IIO_CAPACITANCE] = "capacitance",
+ [IIO_ALTVOLTAGE] = "altvoltage",
+ [IIO_CCT] = "cct",
+ [IIO_PRESSURE] = "pressure",
+ [IIO_HUMIDITYRELATIVE] = "humidityrelative",
+ [IIO_ACTIVITY] = "activity",
+ [IIO_STEPS] = "steps",
+};
+
+static const char * const iio_ev_type_text[] = {
+ [IIO_EV_TYPE_THRESH] = "thresh",
+ [IIO_EV_TYPE_MAG] = "mag",
+ [IIO_EV_TYPE_ROC] = "roc",
+ [IIO_EV_TYPE_THRESH_ADAPTIVE] = "thresh_adaptive",
+ [IIO_EV_TYPE_MAG_ADAPTIVE] = "mag_adaptive",
+ [IIO_EV_TYPE_CHANGE] = "change",
+};
+
+static const char * const iio_ev_dir_text[] = {
+ [IIO_EV_DIR_EITHER] = "either",
+ [IIO_EV_DIR_RISING] = "rising",
+ [IIO_EV_DIR_FALLING] = "falling"
+};
+
+static const char * const iio_modifier_names[] = {
+ [IIO_MOD_X] = "x",
+ [IIO_MOD_Y] = "y",
+ [IIO_MOD_Z] = "z",
+ [IIO_MOD_X_AND_Y] = "x&y",
+ [IIO_MOD_X_AND_Z] = "x&z",
+ [IIO_MOD_Y_AND_Z] = "y&z",
+ [IIO_MOD_X_AND_Y_AND_Z] = "x&y&z",
+ [IIO_MOD_X_OR_Y] = "x|y",
+ [IIO_MOD_X_OR_Z] = "x|z",
+ [IIO_MOD_Y_OR_Z] = "y|z",
+ [IIO_MOD_X_OR_Y_OR_Z] = "x|y|z",
+ [IIO_MOD_LIGHT_BOTH] = "both",
+ [IIO_MOD_LIGHT_IR] = "ir",
+ [IIO_MOD_ROOT_SUM_SQUARED_X_Y] = "sqrt(x^2+y^2)",
+ [IIO_MOD_SUM_SQUARED_X_Y_Z] = "x^2+y^2+z^2",
+ [IIO_MOD_LIGHT_CLEAR] = "clear",
+ [IIO_MOD_LIGHT_RED] = "red",
+ [IIO_MOD_LIGHT_GREEN] = "green",
+ [IIO_MOD_LIGHT_BLUE] = "blue",
+ [IIO_MOD_QUATERNION] = "quaternion",
+ [IIO_MOD_TEMP_AMBIENT] = "ambient",
+ [IIO_MOD_TEMP_OBJECT] = "object",
+ [IIO_MOD_NORTH_MAGN] = "from_north_magnetic",
+ [IIO_MOD_NORTH_TRUE] = "from_north_true",
+ [IIO_MOD_NORTH_MAGN_TILT_COMP] = "from_north_magnetic_tilt_comp",
+ [IIO_MOD_NORTH_TRUE_TILT_COMP] = "from_north_true_tilt_comp",
+ [IIO_MOD_RUNNING] = "running",
+ [IIO_MOD_JOGGING] = "jogging",
+ [IIO_MOD_WALKING] = "walking",
+ [IIO_MOD_STILL] = "still",
+};
+
+static bool event_is_known(struct iio_event_data *event)
+{
+ enum iio_chan_type type = IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event->id);
+ enum iio_modifier mod = IIO_EVENT_CODE_EXTRACT_MODIFIER(event->id);
+ enum iio_event_type ev_type = IIO_EVENT_CODE_EXTRACT_TYPE(event->id);
+ enum iio_event_direction dir = IIO_EVENT_CODE_EXTRACT_DIR(event->id);
+
+ switch (type) {
+ case IIO_VOLTAGE:
+ case IIO_CURRENT:
+ case IIO_POWER:
+ case IIO_ACCEL:
+ case IIO_ANGL_VEL:
+ case IIO_MAGN:
+ case IIO_LIGHT:
+ case IIO_INTENSITY:
+ case IIO_PROXIMITY:
+ case IIO_TEMP:
+ case IIO_INCLI:
+ case IIO_ROT:
+ case IIO_ANGL:
+ case IIO_TIMESTAMP:
+ case IIO_CAPACITANCE:
+ case IIO_ALTVOLTAGE:
+ case IIO_CCT:
+ case IIO_PRESSURE:
+ case IIO_HUMIDITYRELATIVE:
+ case IIO_ACTIVITY:
+ case IIO_STEPS:
+ break;
+ default:
+ return false;
+ }
+
+ switch (mod) {
+ case IIO_NO_MOD:
+ case IIO_MOD_X:
+ case IIO_MOD_Y:
+ case IIO_MOD_Z:
+ case IIO_MOD_X_AND_Y:
+ case IIO_MOD_X_AND_Z:
+ case IIO_MOD_Y_AND_Z:
+ case IIO_MOD_X_AND_Y_AND_Z:
+ case IIO_MOD_X_OR_Y:
+ case IIO_MOD_X_OR_Z:
+ case IIO_MOD_Y_OR_Z:
+ case IIO_MOD_X_OR_Y_OR_Z:
+ case IIO_MOD_LIGHT_BOTH:
+ case IIO_MOD_LIGHT_IR:
+ case IIO_MOD_ROOT_SUM_SQUARED_X_Y:
+ case IIO_MOD_SUM_SQUARED_X_Y_Z:
+ case IIO_MOD_LIGHT_CLEAR:
+ case IIO_MOD_LIGHT_RED:
+ case IIO_MOD_LIGHT_GREEN:
+ case IIO_MOD_LIGHT_BLUE:
+ case IIO_MOD_QUATERNION:
+ case IIO_MOD_TEMP_AMBIENT:
+ case IIO_MOD_TEMP_OBJECT:
+ case IIO_MOD_NORTH_MAGN:
+ case IIO_MOD_NORTH_TRUE:
+ case IIO_MOD_NORTH_MAGN_TILT_COMP:
+ case IIO_MOD_NORTH_TRUE_TILT_COMP:
+ case IIO_MOD_RUNNING:
+ case IIO_MOD_JOGGING:
+ case IIO_MOD_WALKING:
+ case IIO_MOD_STILL:
+ break;
+ default:
+ return false;
+ }
+
+ switch (ev_type) {
+ case IIO_EV_TYPE_THRESH:
+ case IIO_EV_TYPE_MAG:
+ case IIO_EV_TYPE_ROC:
+ case IIO_EV_TYPE_THRESH_ADAPTIVE:
+ case IIO_EV_TYPE_MAG_ADAPTIVE:
+ case IIO_EV_TYPE_CHANGE:
+ break;
+ default:
+ return false;
+ }
+
+ switch (dir) {
+ case IIO_EV_DIR_EITHER:
+ case IIO_EV_DIR_RISING:
+ case IIO_EV_DIR_FALLING:
+ case IIO_EV_DIR_NONE:
+ break;
+ default:
+ return false;
+ }
+
+ return true;
+}
+
+static void print_event(struct iio_event_data *event)
+{
+ enum iio_chan_type type = IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event->id);
+ enum iio_modifier mod = IIO_EVENT_CODE_EXTRACT_MODIFIER(event->id);
+ enum iio_event_type ev_type = IIO_EVENT_CODE_EXTRACT_TYPE(event->id);
+ enum iio_event_direction dir = IIO_EVENT_CODE_EXTRACT_DIR(event->id);
+ int chan = IIO_EVENT_CODE_EXTRACT_CHAN(event->id);
+ int chan2 = IIO_EVENT_CODE_EXTRACT_CHAN2(event->id);
+ bool diff = IIO_EVENT_CODE_EXTRACT_DIFF(event->id);
+
+ if (!event_is_known(event)) {
+ printf("Unknown event: time: %lld, id: %llx\n",
+ event->timestamp, event->id);
+ return;
+ }
+
+ printf("Event: time: %lld, ", event->timestamp);
+
+ if (mod != IIO_NO_MOD) {
+ printf("type: %s(%s), ",
+ iio_chan_type_name_spec[type],
+ iio_modifier_names[mod]);
+ } else {
+ printf("type: %s, ",
+ iio_chan_type_name_spec[type]);
+ }
+
+ if (diff && chan >= 0 && chan2 >= 0)
+ printf("channel: %d-%d, ", chan, chan2);
+ else if (chan >= 0)
+ printf("channel: %d, ", chan);
+
+ printf("evtype: %s", iio_ev_type_text[ev_type]);
+
+ if (dir != IIO_EV_DIR_NONE)
+ printf(", direction: %s", iio_ev_dir_text[dir]);
+ printf("\n");
+}
+
+int main(int argc, char **argv)
+{
+ struct iio_event_data event;
+ const char *device_name;
+ char *chrdev_name;
+ int ret;
+ int dev_num;
+ int fd, event_fd;
+
+ if (argc <= 1) {
+ printf("Usage: %s <device_name>\n", argv[0]);
+ return -1;
+ }
+
+ device_name = argv[1];
+
+ dev_num = find_type_by_name(device_name, "iio:device");
+ if (dev_num >= 0) {
+ printf("Found IIO device with name %s with device number %d\n",
+ device_name, dev_num);
+ ret = asprintf(&chrdev_name, "/dev/iio:device%d", dev_num);
+ if (ret < 0) {
+ ret = -ENOMEM;
+ goto error_ret;
+ }
+ } else {
+ /* If we can't find a IIO device by name assume device_name is a
+ IIO chrdev */
+ chrdev_name = strdup(device_name);
+ }
+
+ fd = open(chrdev_name, 0);
+ if (fd == -1) {
+ fprintf(stdout, "Failed to open %s\n", chrdev_name);
+ ret = -errno;
+ goto error_free_chrdev_name;
+ }
+
+ ret = ioctl(fd, IIO_GET_EVENT_FD_IOCTL, &event_fd);
+
+ close(fd);
+
+ if (ret == -1 || event_fd == -1) {
+ fprintf(stdout, "Failed to retrieve event fd\n");
+ ret = -errno;
+ goto error_free_chrdev_name;
+ }
+
+ while (true) {
+ ret = read(event_fd, &event, sizeof(event));
+ if (ret == -1) {
+ if (errno == EAGAIN) {
+ printf("nothing available\n");
+ continue;
+ } else {
+ perror("Failed to read event from device");
+ ret = -errno;
+ break;
+ }
+ }
+
+ print_event(&event);
+ }
+
+ close(event_fd);
+error_free_chrdev_name:
+ free(chrdev_name);
+error_ret:
+ return ret;
+}
--- /dev/null
+/* IIO - useful set of util functionality
+ *
+ * Copyright (c) 2008 Jonathan Cameron
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef _IIO_UTILS_H
+#define _IIO_UTILS_H
+
+#include <string.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <stdint.h>
+#include <dirent.h>
+#include <errno.h>
+#include <ctype.h>
+#include "iio_utils.h"
+
+const char *iio_dir = "/sys/bus/iio/devices/";
+
+static char * const iio_direction[] = {
+ "in",
+ "out",
+};
+
+/**
+ * iioutils_break_up_name() - extract generic name from full channel name
+ * @full_name: the full channel name
+ * @generic_name: the output generic channel name
+ **/
+int iioutils_break_up_name(const char *full_name,
+ char **generic_name)
+{
+ char *current;
+ char *w, *r;
+ char *working, *prefix = "";
+ int i;
+
+ for (i = 0; i < sizeof(iio_direction) / sizeof(iio_direction[0]); i++)
+ if (!strncmp(full_name, iio_direction[i],
+ strlen(iio_direction[i]))) {
+ prefix = iio_direction[i];
+ break;
+ }
+
+ current = strdup(full_name + strlen(prefix) + 1);
+ working = strtok(current, "_\0");
+
+ w = working;
+ r = working;
+
+ while (*r != '\0') {
+ if (!isdigit(*r)) {
+ *w = *r;
+ w++;
+ }
+ r++;
+ }
+ *w = '\0';
+ asprintf(generic_name, "%s_%s", prefix, working);
+ free(current);
+
+ return 0;
+}
+
+/**
+ * iioutils_get_type() - find and process _type attribute data
+ * @is_signed: output whether channel is signed
+ * @bytes: output how many bytes the channel storage occupies
+ * @mask: output a bit mask for the raw data
+ * @be: big endian
+ * @device_dir: the iio device directory
+ * @name: the channel name
+ * @generic_name: the channel type name
+ **/
+int iioutils_get_type(unsigned *is_signed,
+ unsigned *bytes,
+ unsigned *bits_used,
+ unsigned *shift,
+ uint64_t *mask,
+ unsigned *be,
+ const char *device_dir,
+ const char *name,
+ const char *generic_name)
+{
+ FILE *sysfsfp;
+ int ret;
+ DIR *dp;
+ char *scan_el_dir, *builtname, *builtname_generic, *filename = 0;
+ char signchar, endianchar;
+ unsigned padint;
+ const struct dirent *ent;
+
+ ret = asprintf(&scan_el_dir, FORMAT_SCAN_ELEMENTS_DIR, device_dir);
+ if (ret < 0) {
+ ret = -ENOMEM;
+ goto error_ret;
+ }
+ ret = asprintf(&builtname, FORMAT_TYPE_FILE, name);
+ if (ret < 0) {
+ ret = -ENOMEM;
+ goto error_free_scan_el_dir;
+ }
+ ret = asprintf(&builtname_generic, FORMAT_TYPE_FILE, generic_name);
+ if (ret < 0) {
+ ret = -ENOMEM;
+ goto error_free_builtname;
+ }
+
+ dp = opendir(scan_el_dir);
+ if (dp == NULL) {
+ ret = -errno;
+ goto error_free_builtname_generic;
+ }
+ while (ent = readdir(dp), ent != NULL)
+ /*
+ * Do we allow devices to override a generic name with
+ * a specific one?
+ */
+ if ((strcmp(builtname, ent->d_name) == 0) ||
+ (strcmp(builtname_generic, ent->d_name) == 0)) {
+ ret = asprintf(&filename,
+ "%s/%s", scan_el_dir, ent->d_name);
+ if (ret < 0) {
+ ret = -ENOMEM;
+ goto error_closedir;
+ }
+ sysfsfp = fopen(filename, "r");
+ if (sysfsfp == NULL) {
+ printf("failed to open %s\n", filename);
+ ret = -errno;
+ goto error_free_filename;
+ }
+
+ ret = fscanf(sysfsfp,
+ "%ce:%c%u/%u>>%u",
+ &endianchar,
+ &signchar,
+ bits_used,
+ &padint, shift);
+ if (ret < 0) {
+ printf("failed to pass scan type description\n");
+ ret = -errno;
+ goto error_close_sysfsfp;
+ }
+ *be = (endianchar == 'b');
+ *bytes = padint / 8;
+ if (*bits_used == 64)
+ *mask = ~0;
+ else
+ *mask = (1 << *bits_used) - 1;
+ if (signchar == 's')
+ *is_signed = 1;
+ else
+ *is_signed = 0;
+ fclose(sysfsfp);
+ free(filename);
+
+ filename = 0;
+ sysfsfp = 0;
+ }
+error_close_sysfsfp:
+ if (sysfsfp)
+ fclose(sysfsfp);
+error_free_filename:
+ if (filename)
+ free(filename);
+error_closedir:
+ closedir(dp);
+error_free_builtname_generic:
+ free(builtname_generic);
+error_free_builtname:
+ free(builtname);
+error_free_scan_el_dir:
+ free(scan_el_dir);
+error_ret:
+ return ret;
+}
+
+int iioutils_get_param_float(float *output,
+ const char *param_name,
+ const char *device_dir,
+ const char *name,
+ const char *generic_name)
+{
+ FILE *sysfsfp;
+ int ret;
+ DIR *dp;
+ char *builtname, *builtname_generic;
+ char *filename = NULL;
+ const struct dirent *ent;
+
+ ret = asprintf(&builtname, "%s_%s", name, param_name);
+ if (ret < 0) {
+ ret = -ENOMEM;
+ goto error_ret;
+ }
+ ret = asprintf(&builtname_generic,
+ "%s_%s", generic_name, param_name);
+ if (ret < 0) {
+ ret = -ENOMEM;
+ goto error_free_builtname;
+ }
+ dp = opendir(device_dir);
+ if (dp == NULL) {
+ ret = -errno;
+ goto error_free_builtname_generic;
+ }
+ while (ent = readdir(dp), ent != NULL)
+ if ((strcmp(builtname, ent->d_name) == 0) ||
+ (strcmp(builtname_generic, ent->d_name) == 0)) {
+ ret = asprintf(&filename,
+ "%s/%s", device_dir, ent->d_name);
+ if (ret < 0) {
+ ret = -ENOMEM;
+ goto error_closedir;
+ }
+ sysfsfp = fopen(filename, "r");
+ if (!sysfsfp) {
+ ret = -errno;
+ goto error_free_filename;
+ }
+ fscanf(sysfsfp, "%f", output);
+ break;
+ }
+error_free_filename:
+ if (filename)
+ free(filename);
+error_closedir:
+ closedir(dp);
+error_free_builtname_generic:
+ free(builtname_generic);
+error_free_builtname:
+ free(builtname);
+error_ret:
+ return ret;
+}
+
+/**
+ * bsort_channel_array_by_index() - reorder so that the array is in index order
+ *
+ **/
+
+void bsort_channel_array_by_index(struct iio_channel_info **ci_array,
+ int cnt)
+{
+
+ struct iio_channel_info temp;
+ int x, y;
+
+ for (x = 0; x < cnt; x++)
+ for (y = 0; y < (cnt - 1); y++)
+ if ((*ci_array)[y].index > (*ci_array)[y+1].index) {
+ temp = (*ci_array)[y + 1];
+ (*ci_array)[y + 1] = (*ci_array)[y];
+ (*ci_array)[y] = temp;
+ }
+}
+
+/**
+ * build_channel_array() - function to figure out what channels are present
+ * @device_dir: the IIO device directory in sysfs
+ * @
+ **/
+int build_channel_array(const char *device_dir,
+ struct iio_channel_info **ci_array,
+ int *counter)
+{
+ DIR *dp;
+ FILE *sysfsfp;
+ int count, i;
+ struct iio_channel_info *current;
+ int ret;
+ const struct dirent *ent;
+ char *scan_el_dir;
+ char *filename;
+
+ *counter = 0;
+ ret = asprintf(&scan_el_dir, FORMAT_SCAN_ELEMENTS_DIR, device_dir);
+ if (ret < 0) {
+ ret = -ENOMEM;
+ goto error_ret;
+ }
+ dp = opendir(scan_el_dir);
+ if (dp == NULL) {
+ ret = -errno;
+ goto error_free_name;
+ }
+ while (ent = readdir(dp), ent != NULL)
+ if (strcmp(ent->d_name + strlen(ent->d_name) - strlen("_en"),
+ "_en") == 0) {
+ ret = asprintf(&filename,
+ "%s/%s", scan_el_dir, ent->d_name);
+ if (ret < 0) {
+ ret = -ENOMEM;
+ goto error_close_dir;
+ }
+ sysfsfp = fopen(filename, "r");
+ if (sysfsfp == NULL) {
+ ret = -errno;
+ free(filename);
+ goto error_close_dir;
+ }
+ fscanf(sysfsfp, "%i", &ret);
+ if (ret == 1)
+ (*counter)++;
+ fclose(sysfsfp);
+ free(filename);
+ }
+ *ci_array = malloc(sizeof(**ci_array) * (*counter));
+ if (*ci_array == NULL) {
+ ret = -ENOMEM;
+ goto error_close_dir;
+ }
+ seekdir(dp, 0);
+ count = 0;
+ while (ent = readdir(dp), ent != NULL) {
+ if (strcmp(ent->d_name + strlen(ent->d_name) - strlen("_en"),
+ "_en") == 0) {
+ int current_enabled = 0;
+
+ current = &(*ci_array)[count++];
+ ret = asprintf(&filename,
+ "%s/%s", scan_el_dir, ent->d_name);
+ if (ret < 0) {
+ ret = -ENOMEM;
+ /* decrement count to avoid freeing name */
+ count--;
+ goto error_cleanup_array;
+ }
+ sysfsfp = fopen(filename, "r");
+ if (sysfsfp == NULL) {
+ free(filename);
+ ret = -errno;
+ goto error_cleanup_array;
+ }
+ fscanf(sysfsfp, "%i", ¤t_enabled);
+ fclose(sysfsfp);
+
+ if (!current_enabled) {
+ free(filename);
+ count--;
+ continue;
+ }
+
+ current->scale = 1.0;
+ current->offset = 0;
+ current->name = strndup(ent->d_name,
+ strlen(ent->d_name) -
+ strlen("_en"));
+ if (current->name == NULL) {
+ free(filename);
+ ret = -ENOMEM;
+ goto error_cleanup_array;
+ }
+ /* Get the generic and specific name elements */
+ ret = iioutils_break_up_name(current->name,
+ ¤t->generic_name);
+ if (ret) {
+ free(filename);
+ goto error_cleanup_array;
+ }
+ ret = asprintf(&filename,
+ "%s/%s_index",
+ scan_el_dir,
+ current->name);
+ if (ret < 0) {
+ free(filename);
+ ret = -ENOMEM;
+ goto error_cleanup_array;
+ }
+ sysfsfp = fopen(filename, "r");
+ fscanf(sysfsfp, "%u", ¤t->index);
+ fclose(sysfsfp);
+ free(filename);
+ /* Find the scale */
+ ret = iioutils_get_param_float(¤t->scale,
+ "scale",
+ device_dir,
+ current->name,
+ current->generic_name);
+ if (ret < 0)
+ goto error_cleanup_array;
+ ret = iioutils_get_param_float(¤t->offset,
+ "offset",
+ device_dir,
+ current->name,
+ current->generic_name);
+ if (ret < 0)
+ goto error_cleanup_array;
+ ret = iioutils_get_type(¤t->is_signed,
+ ¤t->bytes,
+ ¤t->bits_used,
+ ¤t->shift,
+ ¤t->mask,
+ ¤t->be,
+ device_dir,
+ current->name,
+ current->generic_name);
+ }
+ }
+
+ closedir(dp);
+ /* reorder so that the array is in index order */
+ bsort_channel_array_by_index(ci_array, *counter);
+
+ return 0;
+
+error_cleanup_array:
+ for (i = count - 1; i >= 0; i--)
+ free((*ci_array)[i].name);
+ free(*ci_array);
+error_close_dir:
+ closedir(dp);
+error_free_name:
+ free(scan_el_dir);
+error_ret:
+ return ret;
+}
+
+/**
+ * find_type_by_name() - function to match top level types by name
+ * @name: top level type instance name
+ * @type: the type of top level instance being sort
+ *
+ * Typical types this is used for are device and trigger.
+ **/
+int find_type_by_name(const char *name, const char *type)
+{
+ const struct dirent *ent;
+ int number, numstrlen;
+
+ FILE *nameFile;
+ DIR *dp;
+ char thisname[IIO_MAX_NAME_LENGTH];
+ char *filename;
+
+ dp = opendir(iio_dir);
+ if (dp == NULL) {
+ printf("No industrialio devices available\n");
+ return -ENODEV;
+ }
+
+ while (ent = readdir(dp), ent != NULL) {
+ if (strcmp(ent->d_name, ".") != 0 &&
+ strcmp(ent->d_name, "..") != 0 &&
+ strlen(ent->d_name) > strlen(type) &&
+ strncmp(ent->d_name, type, strlen(type)) == 0) {
+ numstrlen = sscanf(ent->d_name + strlen(type),
+ "%d",
+ &number);
+ /* verify the next character is not a colon */
+ if (strncmp(ent->d_name + strlen(type) + numstrlen,
+ ":",
+ 1) != 0) {
+ filename = malloc(strlen(iio_dir)
+ + strlen(type)
+ + numstrlen
+ + 6);
+ if (filename == NULL) {
+ closedir(dp);
+ return -ENOMEM;
+ }
+ sprintf(filename, "%s%s%d/name",
+ iio_dir,
+ type,
+ number);
+ nameFile = fopen(filename, "r");
+ if (!nameFile) {
+ free(filename);
+ continue;
+ }
+ free(filename);
+ fscanf(nameFile, "%s", thisname);
+ fclose(nameFile);
+ if (strcmp(name, thisname) == 0) {
+ closedir(dp);
+ return number;
+ }
+ }
+ }
+ }
+ closedir(dp);
+ return -ENODEV;
+}
+
+int _write_sysfs_int(char *filename, char *basedir, int val, int verify)
+{
+ int ret = 0;
+ FILE *sysfsfp;
+ int test;
+ char *temp = malloc(strlen(basedir) + strlen(filename) + 2);
+
+ if (temp == NULL)
+ return -ENOMEM;
+ sprintf(temp, "%s/%s", basedir, filename);
+ sysfsfp = fopen(temp, "w");
+ if (sysfsfp == NULL) {
+ printf("failed to open %s\n", temp);
+ ret = -errno;
+ goto error_free;
+ }
+ fprintf(sysfsfp, "%d", val);
+ fclose(sysfsfp);
+ if (verify) {
+ sysfsfp = fopen(temp, "r");
+ if (sysfsfp == NULL) {
+ printf("failed to open %s\n", temp);
+ ret = -errno;
+ goto error_free;
+ }
+ fscanf(sysfsfp, "%d", &test);
+ fclose(sysfsfp);
+ if (test != val) {
+ printf("Possible failure in int write %d to %s%s\n",
+ val,
+ basedir,
+ filename);
+ ret = -1;
+ }
+ }
+error_free:
+ free(temp);
+ return ret;
+}
+
+int write_sysfs_int(char *filename, char *basedir, int val)
+{
+ return _write_sysfs_int(filename, basedir, val, 0);
+}
+
+int write_sysfs_int_and_verify(char *filename, char *basedir, int val)
+{
+ return _write_sysfs_int(filename, basedir, val, 1);
+}
+
+int _write_sysfs_string(char *filename, char *basedir, char *val, int verify)
+{
+ int ret = 0;
+ FILE *sysfsfp;
+ char *temp = malloc(strlen(basedir) + strlen(filename) + 2);
+
+ if (temp == NULL) {
+ printf("Memory allocation failed\n");
+ return -ENOMEM;
+ }
+ sprintf(temp, "%s/%s", basedir, filename);
+ sysfsfp = fopen(temp, "w");
+ if (sysfsfp == NULL) {
+ printf("Could not open %s\n", temp);
+ ret = -errno;
+ goto error_free;
+ }
+ fprintf(sysfsfp, "%s", val);
+ fclose(sysfsfp);
+ if (verify) {
+ sysfsfp = fopen(temp, "r");
+ if (sysfsfp == NULL) {
+ printf("could not open file to verify\n");
+ ret = -errno;
+ goto error_free;
+ }
+ fscanf(sysfsfp, "%s", temp);
+ fclose(sysfsfp);
+ if (strcmp(temp, val) != 0) {
+ printf("Possible failure in string write of %s "
+ "Should be %s "
+ "written to %s\%s\n",
+ temp,
+ val,
+ basedir,
+ filename);
+ ret = -1;
+ }
+ }
+error_free:
+ free(temp);
+
+ return ret;
+}
+
+/**
+ * write_sysfs_string_and_verify() - string write, readback and verify
+ * @filename: name of file to write to
+ * @basedir: the sysfs directory in which the file is to be found
+ * @val: the string to write
+ **/
+int write_sysfs_string_and_verify(char *filename, char *basedir, char *val)
+{
+ return _write_sysfs_string(filename, basedir, val, 1);
+}
+
+int write_sysfs_string(char *filename, char *basedir, char *val)
+{
+ return _write_sysfs_string(filename, basedir, val, 0);
+}
+
+int read_sysfs_posint(char *filename, char *basedir)
+{
+ int ret;
+ FILE *sysfsfp;
+ char *temp = malloc(strlen(basedir) + strlen(filename) + 2);
+
+ if (temp == NULL) {
+ printf("Memory allocation failed");
+ return -ENOMEM;
+ }
+ sprintf(temp, "%s/%s", basedir, filename);
+ sysfsfp = fopen(temp, "r");
+ if (sysfsfp == NULL) {
+ ret = -errno;
+ goto error_free;
+ }
+ fscanf(sysfsfp, "%d\n", &ret);
+ fclose(sysfsfp);
+error_free:
+ free(temp);
+ return ret;
+}
+
+int read_sysfs_float(char *filename, char *basedir, float *val)
+{
+ int ret = 0;
+ FILE *sysfsfp;
+ char *temp = malloc(strlen(basedir) + strlen(filename) + 2);
+
+ if (temp == NULL) {
+ printf("Memory allocation failed");
+ return -ENOMEM;
+ }
+ sprintf(temp, "%s/%s", basedir, filename);
+ sysfsfp = fopen(temp, "r");
+ if (sysfsfp == NULL) {
+ ret = -errno;
+ goto error_free;
+ }
+ fscanf(sysfsfp, "%f\n", val);
+ fclose(sysfsfp);
+error_free:
+ free(temp);
+ return ret;
+}
+
+int read_sysfs_string(const char *filename, const char *basedir, char *str)
+{
+ int ret = 0;
+ FILE *sysfsfp;
+ char *temp = malloc(strlen(basedir) + strlen(filename) + 2);
+
+ if (temp == NULL) {
+ printf("Memory allocation failed");
+ return -ENOMEM;
+ }
+ sprintf(temp, "%s/%s", basedir, filename);
+ sysfsfp = fopen(temp, "r");
+ if (sysfsfp == NULL) {
+ ret = -errno;
+ goto error_free;
+ }
+ fscanf(sysfsfp, "%s\n", str);
+ fclose(sysfsfp);
+error_free:
+ free(temp);
+ return ret;
+}
+
+#endif /* _IIO_UTILS_H */
--- /dev/null
+#ifndef _IIO_UTILS_H_
+#define _IIO_UTILS_H_
+
+/* IIO - useful set of util functionality
+ *
+ * Copyright (c) 2008 Jonathan Cameron
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+
+#include <stdint.h>
+
+/* Made up value to limit allocation sizes */
+#define IIO_MAX_NAME_LENGTH 30
+
+#define FORMAT_SCAN_ELEMENTS_DIR "%s/scan_elements"
+#define FORMAT_TYPE_FILE "%s_type"
+
+extern const char *iio_dir;
+
+/**
+ * struct iio_channel_info - information about a given channel
+ * @name: channel name
+ * @generic_name: general name for channel type
+ * @scale: scale factor to be applied for conversion to si units
+ * @offset: offset to be applied for conversion to si units
+ * @index: the channel index in the buffer output
+ * @bytes: number of bytes occupied in buffer output
+ * @mask: a bit mask for the raw output
+ * @is_signed: is the raw value stored signed
+ * @enabled: is this channel enabled
+ **/
+struct iio_channel_info {
+ char *name;
+ char *generic_name;
+ float scale;
+ float offset;
+ unsigned index;
+ unsigned bytes;
+ unsigned bits_used;
+ unsigned shift;
+ uint64_t mask;
+ unsigned be;
+ unsigned is_signed;
+ unsigned location;
+};
+
+int iioutils_break_up_name(const char *full_name, char **generic_name);
+int iioutils_get_type(unsigned *is_signed, unsigned *bytes,
+ unsigned *bits_used, unsigned *shift,
+ uint64_t *mask, unsigned *be,
+ const char *device_dir, const char *name,
+ const char *generic_name);
+int iioutils_get_param_float(float *output, const char *param_name,
+ const char *device_dir, const char *name,
+ const char *generic_name);
+void bsort_channel_array_by_index(struct iio_channel_info **ci_array, int cnt);
+int build_channel_array(const char *device_dir,
+ struct iio_channel_info **ci_array, int *counter);
+int find_type_by_name(const char *name, const char *type);
+int write_sysfs_int(char *filename, char *basedir, int val);
+int write_sysfs_int_and_verify(char *filename, char *basedir, int val);
+int write_sysfs_string_and_verify(char *filename, char *basedir, char *val);
+int write_sysfs_string(char *filename, char *basedir, char *val);
+int read_sysfs_posint(char *filename, char *basedir);
+int read_sysfs_float(char *filename, char *basedir, float *val);
+int read_sysfs_string(const char *filename, const char *basedir, char *str);
+
+#endif /* _IIO_UTILS_H_ */
--- /dev/null
+/*
+ * Industrial I/O utilities - lsiio.c
+ *
+ * Copyright (c) 2010 Manuel Stahl <manuel.stahl@iis.fraunhofer.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+
+#include <string.h>
+#include <dirent.h>
+#include <stdio.h>
+#include <errno.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/dir.h>
+#include "iio_utils.h"
+
+
+static enum verbosity {
+ VERBLEVEL_DEFAULT, /* 0 gives lspci behaviour */
+ VERBLEVEL_SENSORS, /* 1 lists sensors */
+} verblevel = VERBLEVEL_DEFAULT;
+
+const char *type_device = "iio:device";
+const char *type_trigger = "trigger";
+
+
+static inline int check_prefix(const char *str, const char *prefix)
+{
+ return strlen(str) > strlen(prefix) &&
+ strncmp(str, prefix, strlen(prefix)) == 0;
+}
+
+static inline int check_postfix(const char *str, const char *postfix)
+{
+ return strlen(str) > strlen(postfix) &&
+ strcmp(str + strlen(str) - strlen(postfix), postfix) == 0;
+}
+
+static int dump_channels(const char *dev_dir_name)
+{
+ DIR *dp;
+ const struct dirent *ent;
+
+ dp = opendir(dev_dir_name);
+ if (dp == NULL)
+ return -errno;
+ while (ent = readdir(dp), ent != NULL)
+ if (check_prefix(ent->d_name, "in_") &&
+ check_postfix(ent->d_name, "_raw")) {
+ printf(" %-10s\n", ent->d_name);
+ }
+
+ return 0;
+}
+
+static int dump_one_device(const char *dev_dir_name)
+{
+ char name[IIO_MAX_NAME_LENGTH];
+ int dev_idx;
+ int retval;
+
+ retval = sscanf(dev_dir_name + strlen(iio_dir) + strlen(type_device),
+ "%i", &dev_idx);
+ if (retval != 1)
+ return -EINVAL;
+ read_sysfs_string("name", dev_dir_name, name);
+ printf("Device %03d: %s\n", dev_idx, name);
+
+ if (verblevel >= VERBLEVEL_SENSORS)
+ return dump_channels(dev_dir_name);
+ return 0;
+}
+
+static int dump_one_trigger(const char *dev_dir_name)
+{
+ char name[IIO_MAX_NAME_LENGTH];
+ int dev_idx;
+ int retval;
+
+ retval = sscanf(dev_dir_name + strlen(iio_dir) + strlen(type_trigger),
+ "%i", &dev_idx);
+ if (retval != 1)
+ return -EINVAL;
+ read_sysfs_string("name", dev_dir_name, name);
+ printf("Trigger %03d: %s\n", dev_idx, name);
+ return 0;
+}
+
+static void dump_devices(void)
+{
+ const struct dirent *ent;
+ DIR *dp;
+
+ dp = opendir(iio_dir);
+ if (dp == NULL) {
+ printf("No industrial I/O devices available\n");
+ return;
+ }
+
+ while (ent = readdir(dp), ent != NULL) {
+ if (check_prefix(ent->d_name, type_device)) {
+ char *dev_dir_name;
+
+ asprintf(&dev_dir_name, "%s%s", iio_dir, ent->d_name);
+ dump_one_device(dev_dir_name);
+ free(dev_dir_name);
+ if (verblevel >= VERBLEVEL_SENSORS)
+ printf("\n");
+ }
+ }
+ rewinddir(dp);
+ while (ent = readdir(dp), ent != NULL) {
+ if (check_prefix(ent->d_name, type_trigger)) {
+ char *dev_dir_name;
+
+ asprintf(&dev_dir_name, "%s%s", iio_dir, ent->d_name);
+ dump_one_trigger(dev_dir_name);
+ free(dev_dir_name);
+ }
+ }
+ closedir(dp);
+}
+
+int main(int argc, char **argv)
+{
+ int c, err = 0;
+
+ while ((c = getopt(argc, argv, "d:D:v")) != EOF) {
+ switch (c) {
+ case 'v':
+ verblevel++;
+ break;
+
+ case '?':
+ default:
+ err++;
+ break;
+ }
+ }
+ if (err || argc > optind) {
+ fprintf(stderr, "Usage: lsiio [options]...\n"
+ "List industrial I/O devices\n"
+ " -v, --verbose\n"
+ " Increase verbosity (may be given multiple times)\n"
+ );
+ exit(1);
+ }
+
+ dump_devices();
+
+ return 0;
+}
--- /dev/null
+libapi-y += fd/
+libapi-y += fs/
include ../../scripts/Makefile.include
include ../../perf/config/utilities.mak # QUIET_CLEAN
+ifeq ($(srctree),)
+srctree := $(patsubst %/,%,$(dir $(shell pwd)))
+srctree := $(patsubst %/,%,$(dir $(srctree)))
+srctree := $(patsubst %/,%,$(dir $(srctree)))
+#$(info Determined 'srctree' to be $(srctree))
+endif
+
CC = $(CROSS_COMPILE)gcc
AR = $(CROSS_COMPILE)ar
-# guard against environment variables
-LIB_H=
-LIB_OBJS=
-
-LIB_H += fs/debugfs.h
-LIB_H += fs/fs.h
-# See comment below about piggybacking...
-LIB_H += fd/array.h
-
-LIB_OBJS += $(OUTPUT)fs/debugfs.o
-LIB_OBJS += $(OUTPUT)fs/fs.o
-# XXX piggybacking here, need to introduce libapikfd, or rename this
-# to plain libapik.a and make it have it all api goodies
-LIB_OBJS += $(OUTPUT)fd/array.o
+MAKEFLAGS += --no-print-directory
-LIBFILE = libapikfs.a
+LIBFILE = $(OUTPUT)libapi.a
-CFLAGS = -ggdb3 -Wall -Wextra -std=gnu99 -Werror -O6 -D_FORTIFY_SOURCE=2 $(EXTRA_WARNINGS) $(EXTRA_CFLAGS) -fPIC
-EXTLIBS = -lelf -lpthread -lrt -lm
-ALL_CFLAGS = $(CFLAGS) $(BASIC_CFLAGS) -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64
-ALL_LDFLAGS = $(LDFLAGS)
+CFLAGS := $(EXTRA_WARNINGS) $(EXTRA_CFLAGS)
+CFLAGS += -ggdb3 -Wall -Wextra -std=gnu99 -Werror -O6 -D_FORTIFY_SOURCE=2 -fPIC
+CFLAGS += -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64
RM = rm -f
-$(LIBFILE): $(LIB_OBJS)
- $(QUIET_AR)$(RM) $@ && $(AR) rcs $(OUTPUT)$@ $(LIB_OBJS)
+build := -f $(srctree)/tools/build/Makefile.build dir=. obj
+API_IN := $(OUTPUT)libapi-in.o
-$(LIB_OBJS): $(LIB_H)
+export srctree OUTPUT CC LD CFLAGS V
-libapi_dirs:
- $(QUIET_MKDIR)mkdir -p $(OUTPUT)fd $(OUTPUT)fs
+all: $(LIBFILE)
-$(OUTPUT)%.o: %.c libapi_dirs
- $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) $<
-$(OUTPUT)%.s: %.c libapi_dirs
- $(QUIET_CC)$(CC) -S $(ALL_CFLAGS) $<
-$(OUTPUT)%.o: %.S libapi_dirs
- $(QUIET_CC)$(CC) -o $@ -c $(ALL_CFLAGS) $<
+$(API_IN): FORCE
+ @$(MAKE) $(build)=libapi
+
+$(LIBFILE): $(API_IN)
+ $(QUIET_AR)$(RM) $@ && $(AR) rcs $@ $(API_IN)
clean:
- $(call QUIET_CLEAN, libapi) $(RM) $(LIB_OBJS) $(LIBFILE)
+ $(call QUIET_CLEAN, libapi) $(RM) $(LIBFILE); \
+ find $(if $(OUTPUT),$(OUTPUT),.) -name \*.o | xargs $(RM)
+
+FORCE:
-.PHONY: clean
+.PHONY: clean FORCE
--- /dev/null
+libapi-y += array.o
--- /dev/null
+libapi-y += fs.o
+libapi-y += debugfs.o
+libapi-y += findfs.o
+libapi-y += tracefs.o
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
+#include <unistd.h>
#include <stdbool.h>
#include <sys/vfs.h>
+#include <sys/types.h>
+#include <sys/stat.h>
#include <sys/mount.h>
#include <linux/kernel.h>
#include "debugfs.h"
-char debugfs_mountpoint[PATH_MAX + 1] = "/sys/kernel/debug";
+#ifndef DEBUGFS_DEFAULT_PATH
+#define DEBUGFS_DEFAULT_PATH "/sys/kernel/debug"
+#endif
+
+char debugfs_mountpoint[PATH_MAX + 1] = DEBUGFS_DEFAULT_PATH;
static const char * const debugfs_known_mountpoints[] = {
- "/sys/kernel/debug",
+ DEBUGFS_DEFAULT_PATH,
"/debug",
0,
};
static bool debugfs_found;
+bool debugfs_configured(void)
+{
+ return debugfs_find_mountpoint() != NULL;
+}
+
/* find the path to the mounted debugfs */
const char *debugfs_find_mountpoint(void)
{
- const char * const *ptr;
- char type[100];
- FILE *fp;
+ const char *ret;
if (debugfs_found)
return (const char *)debugfs_mountpoint;
- ptr = debugfs_known_mountpoints;
- while (*ptr) {
- if (debugfs_valid_mountpoint(*ptr) == 0) {
- debugfs_found = true;
- strcpy(debugfs_mountpoint, *ptr);
- return debugfs_mountpoint;
- }
- ptr++;
- }
-
- /* give up and parse /proc/mounts */
- fp = fopen("/proc/mounts", "r");
- if (fp == NULL)
- return NULL;
-
- while (fscanf(fp, "%*s %" STR(PATH_MAX) "s %99s %*s %*d %*d\n",
- debugfs_mountpoint, type) == 2) {
- if (strcmp(type, "debugfs") == 0)
- break;
- }
- fclose(fp);
+ ret = find_mountpoint("debugfs", (long) DEBUGFS_MAGIC,
+ debugfs_mountpoint, PATH_MAX + 1,
+ debugfs_known_mountpoints);
+ if (ret)
+ debugfs_found = true;
- if (strcmp(type, "debugfs") != 0)
- return NULL;
-
- debugfs_found = true;
-
- return debugfs_mountpoint;
-}
-
-/* verify that a mountpoint is actually a debugfs instance */
-
-int debugfs_valid_mountpoint(const char *debugfs)
-{
- struct statfs st_fs;
-
- if (statfs(debugfs, &st_fs) < 0)
- return -ENOENT;
- else if ((long)st_fs.f_type != (long)DEBUGFS_MAGIC)
- return -ENOENT;
-
- return 0;
+ return ret;
}
/* mount the debugfs somewhere if it's not mounted */
mountpoint = getenv(PERF_DEBUGFS_ENVIRONMENT);
/* if no environment variable, use default */
if (mountpoint == NULL)
- mountpoint = "/sys/kernel/debug";
+ mountpoint = DEBUGFS_DEFAULT_PATH;
}
if (mount(NULL, mountpoint, "debugfs", 0, NULL) < 0)
#ifndef __API_DEBUGFS_H__
#define __API_DEBUGFS_H__
-#define _STR(x) #x
-#define STR(x) _STR(x)
-
-/*
- * On most systems <limits.h> would have given us this, but not on some systems
- * (e.g. GNU/Hurd).
- */
-#ifndef PATH_MAX
-#define PATH_MAX 4096
-#endif
+#include "findfs.h"
#ifndef DEBUGFS_MAGIC
#define DEBUGFS_MAGIC 0x64626720
#define PERF_DEBUGFS_ENVIRONMENT "PERF_DEBUGFS_DIR"
#endif
+bool debugfs_configured(void);
const char *debugfs_find_mountpoint(void);
-int debugfs_valid_mountpoint(const char *debugfs);
char *debugfs_mount(const char *mountpoint);
extern char debugfs_mountpoint[];
--- /dev/null
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdbool.h>
+#include <sys/vfs.h>
+
+#include "findfs.h"
+
+/* verify that a mountpoint is actually the type we want */
+
+int valid_mountpoint(const char *mount, long magic)
+{
+ struct statfs st_fs;
+
+ if (statfs(mount, &st_fs) < 0)
+ return -ENOENT;
+ else if ((long)st_fs.f_type != magic)
+ return -ENOENT;
+
+ return 0;
+}
+
+/* find the path to a mounted file system */
+const char *find_mountpoint(const char *fstype, long magic,
+ char *mountpoint, int len,
+ const char * const *known_mountpoints)
+{
+ const char * const *ptr;
+ char format[128];
+ char type[100];
+ FILE *fp;
+
+ if (known_mountpoints) {
+ ptr = known_mountpoints;
+ while (*ptr) {
+ if (valid_mountpoint(*ptr, magic) == 0) {
+ strncpy(mountpoint, *ptr, len - 1);
+ mountpoint[len-1] = 0;
+ return mountpoint;
+ }
+ ptr++;
+ }
+ }
+
+ /* give up and parse /proc/mounts */
+ fp = fopen("/proc/mounts", "r");
+ if (fp == NULL)
+ return NULL;
+
+ snprintf(format, 128, "%%*s %%%ds %%99s %%*s %%*d %%*d\n", len);
+
+ while (fscanf(fp, format, mountpoint, type) == 2) {
+ if (strcmp(type, fstype) == 0)
+ break;
+ }
+ fclose(fp);
+
+ if (strcmp(type, fstype) != 0)
+ return NULL;
+
+ return mountpoint;
+}
--- /dev/null
+#ifndef __API_FINDFS_H__
+#define __API_FINDFS_H__
+
+#include <stdbool.h>
+
+#define _STR(x) #x
+#define STR(x) _STR(x)
+
+/*
+ * On most systems <limits.h> would have given us this, but not on some systems
+ * (e.g. GNU/Hurd).
+ */
+#ifndef PATH_MAX
+#define PATH_MAX 4096
+#endif
+
+const char *find_mountpoint(const char *fstype, long magic,
+ char *mountpoint, int len,
+ const char * const *known_mountpoints);
+
+int valid_mountpoint(const char *mount, long magic);
+
+#endif /* __API_FINDFS_H__ */
--- /dev/null
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include <stdbool.h>
+#include <sys/vfs.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/mount.h>
+#include <linux/kernel.h>
+
+#include "tracefs.h"
+
+#ifndef TRACEFS_DEFAULT_PATH
+#define TRACEFS_DEFAULT_PATH "/sys/kernel/tracing"
+#endif
+
+char tracefs_mountpoint[PATH_MAX + 1] = TRACEFS_DEFAULT_PATH;
+
+static const char * const tracefs_known_mountpoints[] = {
+ TRACEFS_DEFAULT_PATH,
+ "/sys/kernel/debug/tracing",
+ "/tracing",
+ "/trace",
+ 0,
+};
+
+static bool tracefs_found;
+
+bool tracefs_configured(void)
+{
+ return tracefs_find_mountpoint() != NULL;
+}
+
+/* find the path to the mounted tracefs */
+const char *tracefs_find_mountpoint(void)
+{
+ const char *ret;
+
+ if (tracefs_found)
+ return (const char *)tracefs_mountpoint;
+
+ ret = find_mountpoint("tracefs", (long) TRACEFS_MAGIC,
+ tracefs_mountpoint, PATH_MAX + 1,
+ tracefs_known_mountpoints);
+
+ if (ret)
+ tracefs_found = true;
+
+ return ret;
+}
+
+/* mount the tracefs somewhere if it's not mounted */
+char *tracefs_mount(const char *mountpoint)
+{
+ /* see if it's already mounted */
+ if (tracefs_find_mountpoint())
+ goto out;
+
+ /* if not mounted and no argument */
+ if (mountpoint == NULL) {
+ /* see if environment variable set */
+ mountpoint = getenv(PERF_TRACEFS_ENVIRONMENT);
+ /* if no environment variable, use default */
+ if (mountpoint == NULL)
+ mountpoint = TRACEFS_DEFAULT_PATH;
+ }
+
+ if (mount(NULL, mountpoint, "tracefs", 0, NULL) < 0)
+ return NULL;
+
+ /* save the mountpoint */
+ tracefs_found = true;
+ strncpy(tracefs_mountpoint, mountpoint, sizeof(tracefs_mountpoint));
+out:
+ return tracefs_mountpoint;
+}
--- /dev/null
+#ifndef __API_TRACEFS_H__
+#define __API_TRACEFS_H__
+
+#include "findfs.h"
+
+#ifndef TRACEFS_MAGIC
+#define TRACEFS_MAGIC 0x74726163
+#endif
+
+#ifndef PERF_TRACEFS_ENVIRONMENT
+#define PERF_TRACEFS_ENVIRONMENT "PERF_TRACEFS_DIR"
+#endif
+
+bool tracefs_configured(void);
+const char *tracefs_find_mountpoint(void);
+int tracefs_valid_mountpoint(const char *debugfs);
+char *tracefs_mount(const char *mountpoint);
+
+extern char tracefs_mountpoint[];
+
+#endif /* __API_DEBUGFS_H__ */
--- /dev/null
+liblockdep-y += common.o lockdep.o preload.o rbtree.o
export DESTDIR DESTDIR_SQ INSTALL
+MAKEFLAGS += --no-print-directory
+
+include ../../scripts/Makefile.include
+
# copy a bit from Linux kbuild
ifeq ("$(origin V)", "command line")
VERBOSE = 0
endif
-ifeq ("$(origin O)", "command line")
- BUILD_OUTPUT := $(O)
+ifeq ($(srctree),)
+srctree := $(patsubst %/,%,$(dir $(shell pwd)))
+srctree := $(patsubst %/,%,$(dir $(srctree)))
+srctree := $(patsubst %/,%,$(dir $(srctree)))
+#$(info Determined 'srctree' to be $(srctree))
endif
-ifeq ($(BUILD_SRC),)
-ifneq ($(BUILD_OUTPUT),)
-
-define build_output
- $(if $(VERBOSE:1=),@)$(MAKE) -C $(BUILD_OUTPUT) \
- BUILD_SRC=$(CURDIR) -f $(CURDIR)/Makefile $1
-endef
-
-saved-output := $(BUILD_OUTPUT)
-BUILD_OUTPUT := $(shell cd $(BUILD_OUTPUT) && /bin/pwd)
-$(if $(BUILD_OUTPUT),, \
- $(error output directory "$(saved-output)" does not exist))
-
-all: sub-make
-
-gui: force
- $(call build_output, all_cmd)
-
-$(filter-out gui,$(MAKECMDGOALS)): sub-make
-
-sub-make: force
- $(call build_output, $(MAKECMDGOALS))
-
-
-# Leave processing to above invocation of make
-skip-makefile := 1
-
-endif # BUILD_OUTPUT
-endif # BUILD_SRC
-
-# We process the rest of the Makefile if this is the final invocation of make
-ifeq ($(skip-makefile),)
-
-srctree := $(realpath $(if $(BUILD_SRC),$(BUILD_SRC),$(CURDIR)))
-objtree := $(realpath $(CURDIR))
-src := $(srctree)
-obj := $(objtree)
-
-export prefix libdir bindir src obj
-
# Shell quotes
libdir_SQ = $(subst ','\'',$(libdir))
bindir_SQ = $(subst ','\'',$(bindir))
-LIB_FILE = liblockdep.a liblockdep.so.$(LIBLOCKDEP_VERSION)
+LIB_IN := $(OUTPUT)liblockdep-in.o
+
BIN_FILE = lockdep
+LIB_FILE = $(OUTPUT)liblockdep.a $(OUTPUT)liblockdep.so.$(LIBLOCKDEP_VERSION)
CONFIG_INCLUDES =
CONFIG_LIBS =
# Set compile option CFLAGS if not set elsewhere
CFLAGS ?= -g -DCONFIG_LOCKDEP -DCONFIG_STACKTRACE -DCONFIG_PROVE_LOCKING -DBITS_PER_LONG=__WORDSIZE -DLIBLOCKDEP_VERSION='"$(LIBLOCKDEP_VERSION)"' -rdynamic -O0 -g
+CFLAGS += -fPIC
override CFLAGS += $(CONFIG_FLAGS) $(INCLUDES) $(PLUGIN_DIR_SQ)
ifeq ($(VERBOSE),1)
Q =
- print_compile =
- print_app_build =
- print_fpic_compile =
print_shared_lib_compile =
print_install =
else
Q = @
- print_compile = echo ' CC '$(OBJ);
- print_app_build = echo ' BUILD '$(OBJ);
- print_fpic_compile = echo ' CC FPIC '$(OBJ);
- print_shared_lib_compile = echo ' BUILD SHARED LIB '$(OBJ);
- print_static_lib_build = echo ' BUILD STATIC LIB '$(OBJ);
- print_install = echo ' INSTALL '$1' to $(DESTDIR_SQ)$2';
+ print_shared_lib_compile = echo ' LD '$(OBJ);
+ print_static_lib_build = echo ' LD '$(OBJ);
+ print_install = echo ' INSTALL '$1' to $(DESTDIR_SQ)$2';
endif
-do_fpic_compile = \
- ($(print_fpic_compile) \
- $(CC) -c $(CFLAGS) $(EXT) -fPIC $< -o $@)
-
-do_app_build = \
- ($(print_app_build) \
- $(CC) $^ -rdynamic -o $@ $(CONFIG_LIBS) $(LIBS))
+export srctree OUTPUT CC LD CFLAGS V
+build := -f $(srctree)/tools/build/Makefile.build dir=. obj
do_compile_shared_library = \
($(print_shared_lib_compile) \
($(print_static_lib_build) \
$(RM) $@; $(AR) rcs $@ $^)
-
-define do_compile
- $(print_compile) \
- $(CC) -c $(CFLAGS) $(EXT) $< -o $(obj)/$@;
-endef
-
-$(obj)/%.o: $(src)/%.c
- $(Q)$(call do_compile)
-
-%.o: $(src)/%.c
- $(Q)$(call do_compile)
-
-PEVENT_LIB_OBJS = common.o lockdep.o preload.o rbtree.o
-
-ALL_OBJS = $(PEVENT_LIB_OBJS)
-
CMD_TARGETS = $(LIB_FILE)
TARGETS = $(CMD_TARGETS)
all_cmd: $(CMD_TARGETS)
-liblockdep.so.$(LIBLOCKDEP_VERSION): $(PEVENT_LIB_OBJS)
+$(LIB_IN): force
+ $(Q)$(MAKE) $(build)=liblockdep
+
+liblockdep.so.$(LIBLOCKDEP_VERSION): $(LIB_IN)
$(Q)$(do_compile_shared_library)
-liblockdep.a: $(PEVENT_LIB_OBJS)
+liblockdep.a: $(LIB_IN)
$(Q)$(do_build_static_lib)
-$(PEVENT_LIB_OBJS): %.o: $(src)/%.c
- $(Q)$(do_fpic_compile)
-
-## make deps
-
-all_objs := $(sort $(ALL_OBJS))
-all_deps := $(all_objs:%.o=.%.d)
-
-# let .d file also depends on the source and header files
-define check_deps
- @set -e; $(RM) $@; \
- $(CC) -MM $(CFLAGS) $< > $@.$$$$; \
- sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g' < $@.$$$$ > $@; \
- $(RM) $@.$$$$
-endef
-
-$(all_deps): .%.d: $(src)/%.c
- $(Q)$(call check_deps)
-
-$(all_objs) : %.o : .%.d
-
-dep_includes := $(wildcard $(all_deps))
-
-ifneq ($(dep_includes),)
- include $(dep_includes)
-endif
-
-### Detect environment changes
-TRACK_CFLAGS = $(subst ','\'',$(CFLAGS)):$(ARCH):$(CROSS_COMPILE)
-
tags: force
$(RM) tags
find . -name '*.[ch]' | xargs ctags --extra=+f --c-kinds=+px \
$(RM) *.o *~ $(TARGETS) *.a *liblockdep*.so* $(VERSION_FILES) .*.d
$(RM) tags TAGS
-endif # skip-makefile
-
PHONY += force
force:
--- /dev/null
+libtraceevent-y += event-parse.o
+libtraceevent-y += event-plugin.o
+libtraceevent-y += trace-seq.o
+libtraceevent-y += parse-filter.o
+libtraceevent-y += parse-utils.o
+libtraceevent-y += kbuffer-parse.o
+
+plugin_jbd2-y += plugin_jbd2.o
+plugin_hrtimer-y += plugin_hrtimer.o
+plugin_kmem-y += plugin_kmem.o
+plugin_kvm-y += plugin_kvm.o
+plugin_mac80211-y += plugin_mac80211.o
+plugin_sched_switch-y += plugin_sched_switch.o
+plugin_function-y += plugin_function.o
+plugin_xen-y += plugin_xen.o
+plugin_scsi-y += plugin_scsi.o
+plugin_cfg80211-y += plugin_cfg80211.o
PLUGIN_DIR_SQ = '$(subst ','\'',$(PLUGIN_DIR))'
endif
-include $(if $(BUILD_SRC),$(BUILD_SRC)/)../../scripts/Makefile.include
+include ../../scripts/Makefile.include
# copy a bit from Linux kbuild
VERBOSE = 0
endif
-ifeq ("$(origin O)", "command line")
- BUILD_OUTPUT := $(O)
+ifeq ($(srctree),)
+srctree := $(patsubst %/,%,$(dir $(shell pwd)))
+srctree := $(patsubst %/,%,$(dir $(srctree)))
+srctree := $(patsubst %/,%,$(dir $(srctree)))
+#$(info Determined 'srctree' to be $(srctree))
endif
-ifeq ($(BUILD_SRC),)
-ifneq ($(OUTPUT),)
-
-define build_output
- $(if $(VERBOSE:1=),@)+$(MAKE) -C $(OUTPUT) \
- BUILD_SRC=$(CURDIR)/ -f $(CURDIR)/Makefile $1
-endef
-
-all: sub-make
-
-$(MAKECMDGOALS): sub-make
-
-sub-make: force
- $(call build_output, $(MAKECMDGOALS))
-
-
-# Leave processing to above invocation of make
-skip-makefile := 1
-
-endif # OUTPUT
-endif # BUILD_SRC
-
-# We process the rest of the Makefile if this is the final invocation of make
-ifeq ($(skip-makefile),)
-
-srctree := $(if $(BUILD_SRC),$(BUILD_SRC),$(CURDIR))
-objtree := $(CURDIR)
-src := $(srctree)
-obj := $(objtree)
-
export prefix bindir src obj
# Shell quotes
OBJ = $@
N =
-export Q VERBOSE
-
EVENT_PARSE_VERSION = $(EP_VERSION).$(EP_PATCHLEVEL).$(EP_EXTRAVERSION)
-INCLUDES = -I. -I $(srctree)/../../include $(CONFIG_INCLUDES)
+INCLUDES = -I. -I $(srctree)/tools/include $(CONFIG_INCLUDES)
-# Set compile option CFLAGS if not set elsewhere
-CFLAGS ?= -g -Wall
+# Set compile option CFLAGS
+ifdef EXTRA_CFLAGS
+ CFLAGS := $(EXTRA_CFLAGS)
+else
+ CFLAGS := -g -Wall
+endif
# Append required CFLAGS
+override CFLAGS += -fPIC
override CFLAGS += $(CONFIG_FLAGS) $(INCLUDES) $(PLUGIN_DIR_SQ)
override CFLAGS += $(udis86-flags) -D_GNU_SOURCE
Q = @
endif
-do_compile_shared_library = \
- ($(print_shared_lib_compile) \
- $(CC) --shared $^ -o $@)
-
-do_plugin_build = \
- ($(print_plugin_build) \
- $(CC) $(CFLAGS) -shared -nostartfiles -o $@ $<)
-
-do_build_static_lib = \
- ($(print_static_lib_build) \
- $(RM) $@; $(AR) rcs $@ $^)
-
-
-do_compile = $(QUIET_CC)$(CC) -c $(CFLAGS) $(EXT) $< -o $(obj)/$@;
+# Disable command line variables (CFLAGS) overide from top
+# level Makefile (perf), otherwise build Makefile will get
+# the same command line setup.
+MAKEOVERRIDES=
-$(obj)/%.o: $(src)/%.c
- $(call do_compile)
+export srctree OUTPUT CC LD CFLAGS V
+build := -f $(srctree)/tools/build/Makefile.build dir=. obj
-%.o: $(src)/%.c
- $(call do_compile)
+PLUGINS = plugin_jbd2.so
+PLUGINS += plugin_hrtimer.so
+PLUGINS += plugin_kmem.so
+PLUGINS += plugin_kvm.so
+PLUGINS += plugin_mac80211.so
+PLUGINS += plugin_sched_switch.so
+PLUGINS += plugin_function.so
+PLUGINS += plugin_xen.so
+PLUGINS += plugin_scsi.so
+PLUGINS += plugin_cfg80211.so
-PEVENT_LIB_OBJS = event-parse.o
-PEVENT_LIB_OBJS += event-plugin.o
-PEVENT_LIB_OBJS += trace-seq.o
-PEVENT_LIB_OBJS += parse-filter.o
-PEVENT_LIB_OBJS += parse-utils.o
-PEVENT_LIB_OBJS += kbuffer-parse.o
+PLUGINS := $(addprefix $(OUTPUT),$(PLUGINS))
+PLUGINS_IN := $(PLUGINS:.so=-in.o)
-PLUGIN_OBJS = plugin_jbd2.o
-PLUGIN_OBJS += plugin_hrtimer.o
-PLUGIN_OBJS += plugin_kmem.o
-PLUGIN_OBJS += plugin_kvm.o
-PLUGIN_OBJS += plugin_mac80211.o
-PLUGIN_OBJS += plugin_sched_switch.o
-PLUGIN_OBJS += plugin_function.o
-PLUGIN_OBJS += plugin_xen.o
-PLUGIN_OBJS += plugin_scsi.o
-PLUGIN_OBJS += plugin_cfg80211.o
-
-PLUGINS := $(PLUGIN_OBJS:.o=.so)
-
-ALL_OBJS = $(PEVENT_LIB_OBJS) $(PLUGIN_OBJS)
+TE_IN := $(OUTPUT)libtraceevent-in.o
+LIB_FILE := $(addprefix $(OUTPUT),$(LIB_FILE))
CMD_TARGETS = $(LIB_FILE) $(PLUGINS)
TARGETS = $(CMD_TARGETS)
-
all: all_cmd
all_cmd: $(CMD_TARGETS)
-libtraceevent.so: $(PEVENT_LIB_OBJS)
+$(TE_IN): force
+ $(Q)$(MAKE) $(build)=libtraceevent
+
+$(OUTPUT)libtraceevent.so: $(TE_IN)
$(QUIET_LINK)$(CC) --shared $^ -o $@
-libtraceevent.a: $(PEVENT_LIB_OBJS)
+$(OUTPUT)libtraceevent.a: $(TE_IN)
$(QUIET_LINK)$(RM) $@; $(AR) rcs $@ $^
plugins: $(PLUGINS)
-$(PEVENT_LIB_OBJS): %.o: $(src)/%.c TRACEEVENT-CFLAGS
- $(QUIET_CC_FPIC)$(CC) -c $(CFLAGS) $(EXT) -fPIC $< -o $@
+__plugin_obj = $(notdir $@)
+ plugin_obj = $(__plugin_obj:-in.o=)
-$(PLUGIN_OBJS): %.o : $(src)/%.c
- $(QUIET_CC_FPIC)$(CC) -c $(CFLAGS) -fPIC -o $@ $<
+$(PLUGINS_IN): force
+ $(Q)$(MAKE) $(build)=$(plugin_obj)
-$(PLUGINS): %.so: %.o
- $(QUIET_LINK)$(CC) $(CFLAGS) -shared -nostartfiles -o $@ $<
+$(OUTPUT)%.so: $(OUTPUT)%-in.o
+ $(QUIET_LINK)$(CC) $(CFLAGS) -shared -nostartfiles -o $@ $^
define make_version.h
(echo '/* This file is automatically generated. Do not modify. */'; \
fi);
endef
-## make deps
-
-all_objs := $(sort $(ALL_OBJS))
-all_deps := $(all_objs:%.o=.%.d)
-
-# let .d file also depends on the source and header files
-define check_deps
- @set -e; $(RM) $@; \
- $(CC) -MM $(CFLAGS) $< > $@.$$$$; \
- sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g' < $@.$$$$ > $@; \
- $(RM) $@.$$$$
-endef
-
-$(all_deps): .%.d: $(src)/%.c
- $(Q)$(call check_deps)
-
-$(all_objs) : %.o : .%.d
-
-dep_includes := $(wildcard $(all_deps))
-
-ifneq ($(dep_includes),)
- include $(dep_includes)
-endif
-
-### Detect environment changes
-TRACK_CFLAGS = $(subst ','\'',$(CFLAGS)):$(ARCH):$(CROSS_COMPILE)
-
-TRACEEVENT-CFLAGS: force
- @FLAGS='$(TRACK_CFLAGS)'; \
- if test x"$$FLAGS" != x"`cat TRACEEVENT-CFLAGS 2>/dev/null`" ; then \
- echo 1>&2 " FLAGS: * new build flags or cross compiler"; \
- echo "$$FLAGS" >TRACEEVENT-CFLAGS; \
- fi
-
tags: force
$(RM) tags
find . -name '*.[ch]' | xargs ctags --extra=+f --c-kinds=+px \
$(RM) *.o *~ $(TARGETS) *.a *.so $(VERSION_FILES) .*.d \
$(RM) TRACEEVENT-CFLAGS tags TAGS
-endif # skip-makefile
-
PHONY += force plugins
force:
-plugins:
- @echo > /dev/null
-
# Declare the contents of the .PHONY variable as phony. We keep that
# information in a variable so we can use it in if_changed and friends.
.PHONY: $(PHONY)
if (!item)
return -1;
- item->comm = strdup(comm);
+ if (comm)
+ item->comm = strdup(comm);
+ else
+ item->comm = strdup("<...>");
if (!item->comm) {
free(item);
return -1;
return 0;
}
-void pevent_register_trace_clock(struct pevent *pevent, char *trace_clock)
+int pevent_register_trace_clock(struct pevent *pevent, const char *trace_clock)
{
- pevent->trace_clock = trace_clock;
+ pevent->trace_clock = strdup(trace_clock);
+ if (!pevent->trace_clock) {
+ errno = ENOMEM;
+ return -1;
+ }
+ return 0;
}
struct func_map {
free_arg(arg->hex.field);
free_arg(arg->hex.size);
break;
+ case PRINT_INT_ARRAY:
+ free_arg(arg->int_array.field);
+ free_arg(arg->int_array.count);
+ free_arg(arg->int_array.el_size);
+ break;
case PRINT_TYPE:
free(arg->typecast.type);
free_arg(arg->typecast.item);
goto out_warn_free;
type = process_arg_token(event, right, tok, type);
- arg->op.right = right;
+
+ if (right->type == PRINT_OP &&
+ get_op_prio(arg->op.op) < get_op_prio(right->op.op)) {
+ struct print_arg tmp;
+
+ /* rotate ops according to the priority */
+ arg->op.right = right->op.left;
+
+ tmp = *arg;
+ *arg = *right;
+ *right = tmp;
+
+ arg->op.left = right;
+ } else {
+ arg->op.right = right;
+ }
} else if (strcmp(token, "[") == 0) {
return EVENT_ERROR;
}
+static int alloc_and_process_delim(struct event_format *event, char *next_token,
+ struct print_arg **print_arg)
+{
+ struct print_arg *field;
+ enum event_type type;
+ char *token;
+ int ret = 0;
+
+ field = alloc_arg();
+ if (!field) {
+ do_warning_event(event, "%s: not enough memory!", __func__);
+ errno = ENOMEM;
+ return -1;
+ }
+
+ type = process_arg(event, field, &token);
+
+ if (test_type_token(type, token, EVENT_DELIM, next_token)) {
+ errno = EINVAL;
+ ret = -1;
+ free_arg(field);
+ goto out_free_token;
+ }
+
+ *print_arg = field;
+
+out_free_token:
+ free_token(token);
+
+ return ret;
+}
+
static char *arg_eval (struct print_arg *arg);
static unsigned long long
static enum event_type
process_hex(struct event_format *event, struct print_arg *arg, char **tok)
{
- struct print_arg *field;
- enum event_type type;
- char *token = NULL;
-
memset(arg, 0, sizeof(*arg));
arg->type = PRINT_HEX;
- field = alloc_arg();
- if (!field) {
- do_warning_event(event, "%s: not enough memory!", __func__);
- goto out_free;
- }
+ if (alloc_and_process_delim(event, ",", &arg->hex.field))
+ goto out;
- type = process_arg(event, field, &token);
+ if (alloc_and_process_delim(event, ")", &arg->hex.size))
+ goto free_field;
- if (test_type_token(type, token, EVENT_DELIM, ","))
- goto out_free;
-
- arg->hex.field = field;
+ return read_token_item(tok);
- free_token(token);
+free_field:
+ free_arg(arg->hex.field);
+out:
+ *tok = NULL;
+ return EVENT_ERROR;
+}
- field = alloc_arg();
- if (!field) {
- do_warning_event(event, "%s: not enough memory!", __func__);
- *tok = NULL;
- return EVENT_ERROR;
- }
+static enum event_type
+process_int_array(struct event_format *event, struct print_arg *arg, char **tok)
+{
+ memset(arg, 0, sizeof(*arg));
+ arg->type = PRINT_INT_ARRAY;
- type = process_arg(event, field, &token);
+ if (alloc_and_process_delim(event, ",", &arg->int_array.field))
+ goto out;
- if (test_type_token(type, token, EVENT_DELIM, ")"))
- goto out_free;
+ if (alloc_and_process_delim(event, ",", &arg->int_array.count))
+ goto free_field;
- arg->hex.size = field;
+ if (alloc_and_process_delim(event, ")", &arg->int_array.el_size))
+ goto free_size;
- free_token(token);
- type = read_token_item(tok);
- return type;
+ return read_token_item(tok);
- out_free:
- free_arg(field);
- free_token(token);
+free_size:
+ free_arg(arg->int_array.count);
+free_field:
+ free_arg(arg->int_array.field);
+out:
*tok = NULL;
return EVENT_ERROR;
}
free_token(token);
return process_hex(event, arg, tok);
}
+ if (strcmp(token, "__print_array") == 0) {
+ free_token(token);
+ return process_int_array(event, arg, tok);
+ }
if (strcmp(token, "__get_str") == 0) {
free_token(token);
return process_str(event, arg, tok);
break;
case PRINT_FLAGS:
case PRINT_SYMBOL:
+ case PRINT_INT_ARRAY:
case PRINT_HEX:
break;
case PRINT_TYPE:
{ "HRTIMER_RESTART", 1 },
};
-static unsigned long long eval_flag(const char *flag)
+static long long eval_flag(const char *flag)
{
int i;
if (strcmp(flags[i].name, flag) == 0)
return flags[i].value;
- return 0;
+ return -1LL;
}
static void print_str_to_seq(struct trace_seq *s, const char *format,
struct print_flag_sym *flag;
struct format_field *field;
struct printk_map *printk;
- unsigned long long val, fval;
+ long long val, fval;
unsigned long addr;
char *str;
unsigned char *hex;
print = 0;
for (flag = arg->flags.flags; flag; flag = flag->next) {
fval = eval_flag(flag->value);
- if (!val && !fval) {
+ if (!val && fval < 0) {
print_str_to_seq(s, format, len_arg, flag->str);
break;
}
- if (fval && (val & fval) == fval) {
+ if (fval > 0 && (val & fval) == fval) {
if (print && arg->flags.delim)
trace_seq_puts(s, arg->flags.delim);
print_str_to_seq(s, format, len_arg, flag->str);
}
break;
+ case PRINT_INT_ARRAY: {
+ void *num;
+ int el_size;
+
+ if (arg->int_array.field->type == PRINT_DYNAMIC_ARRAY) {
+ unsigned long offset;
+ struct format_field *field =
+ arg->int_array.field->dynarray.field;
+ offset = pevent_read_number(pevent,
+ data + field->offset,
+ field->size);
+ num = data + (offset & 0xffff);
+ } else {
+ field = arg->int_array.field->field.field;
+ if (!field) {
+ str = arg->int_array.field->field.name;
+ field = pevent_find_any_field(event, str);
+ if (!field)
+ goto out_warning_field;
+ arg->int_array.field->field.field = field;
+ }
+ num = data + field->offset;
+ }
+ len = eval_num_arg(data, size, event, arg->int_array.count);
+ el_size = eval_num_arg(data, size, event,
+ arg->int_array.el_size);
+ for (i = 0; i < len; i++) {
+ if (i)
+ trace_seq_putc(s, ' ');
+
+ if (el_size == 1) {
+ trace_seq_printf(s, "%u", *(uint8_t *)num);
+ } else if (el_size == 2) {
+ trace_seq_printf(s, "%u", *(uint16_t *)num);
+ } else if (el_size == 4) {
+ trace_seq_printf(s, "%u", *(uint32_t *)num);
+ } else if (el_size == 8) {
+ trace_seq_printf(s, "%lu", *(uint64_t *)num);
+ } else {
+ trace_seq_printf(s, "BAD SIZE:%d 0x%x",
+ el_size, *(uint8_t *)num);
+ el_size = 1;
+ }
+
+ num += el_size;
+ }
+ break;
+ }
case PRINT_TYPE:
break;
case PRINT_STRING: {
if (asprintf(&arg->atom.atom, "%lld", ip) < 0)
goto out_free;
- /* skip the first "%pf: " */
+ /* skip the first "%ps: " */
for (ptr = fmt + 5, bptr = data + field->offset;
bptr < data + size && *ptr; ptr++) {
int ls = 0;
goto process_again;
case '.':
goto process_again;
+ case 'z':
+ case 'Z':
+ ls = 1;
+ goto process_again;
case 'p':
ls = 1;
/* fall through */
return comm;
}
+static struct cmdline *
+pid_from_cmdlist(struct pevent *pevent, const char *comm, struct cmdline *next)
+{
+ struct cmdline_list *cmdlist = (struct cmdline_list *)next;
+
+ if (cmdlist)
+ cmdlist = cmdlist->next;
+ else
+ cmdlist = pevent->cmdlist;
+
+ while (cmdlist && strcmp(cmdlist->comm, comm) != 0)
+ cmdlist = cmdlist->next;
+
+ return (struct cmdline *)cmdlist;
+}
+
+/**
+ * pevent_data_pid_from_comm - return the pid from a given comm
+ * @pevent: a handle to the pevent
+ * @comm: the cmdline to find the pid from
+ * @next: the cmdline structure to find the next comm
+ *
+ * This returns the cmdline structure that holds a pid for a given
+ * comm, or NULL if none found. As there may be more than one pid for
+ * a given comm, the result of this call can be passed back into
+ * a recurring call in the @next paramater, and then it will find the
+ * next pid.
+ * Also, it does a linear seach, so it may be slow.
+ */
+struct cmdline *pevent_data_pid_from_comm(struct pevent *pevent, const char *comm,
+ struct cmdline *next)
+{
+ struct cmdline *cmdline;
+
+ /*
+ * If the cmdlines have not been converted yet, then use
+ * the list.
+ */
+ if (!pevent->cmdlines)
+ return pid_from_cmdlist(pevent, comm, next);
+
+ if (next) {
+ /*
+ * The next pointer could have been still from
+ * a previous call before cmdlines were created
+ */
+ if (next < pevent->cmdlines ||
+ next >= pevent->cmdlines + pevent->cmdline_count)
+ next = NULL;
+ else
+ cmdline = next++;
+ }
+
+ if (!next)
+ cmdline = pevent->cmdlines;
+
+ while (cmdline < pevent->cmdlines + pevent->cmdline_count) {
+ if (strcmp(cmdline->comm, comm) == 0)
+ return cmdline;
+ cmdline++;
+ }
+ return NULL;
+}
+
+/**
+ * pevent_cmdline_pid - return the pid associated to a given cmdline
+ * @cmdline: The cmdline structure to get the pid from
+ *
+ * Returns the pid for a give cmdline. If @cmdline is NULL, then
+ * -1 is returned.
+ */
+int pevent_cmdline_pid(struct pevent *pevent, struct cmdline *cmdline)
+{
+ struct cmdline_list *cmdlist = (struct cmdline_list *)cmdline;
+
+ if (!cmdline)
+ return -1;
+
+ /*
+ * If cmdlines have not been created yet, or cmdline is
+ * not part of the array, then treat it as a cmdlist instead.
+ */
+ if (!pevent->cmdlines ||
+ cmdline < pevent->cmdlines ||
+ cmdline >= pevent->cmdlines + pevent->cmdline_count)
+ return cmdlist->pid;
+
+ return cmdline->pid;
+}
+
/**
* pevent_data_comm_from_pid - parse the data into the print format
* @s: the trace_seq to write to
print_args(args->hex.size);
printf(")");
break;
+ case PRINT_INT_ARRAY:
+ printf("__print_array(");
+ print_args(args->int_array.field);
+ printf(", ");
+ print_args(args->int_array.count);
+ printf(", ");
+ print_args(args->int_array.el_size);
+ printf(")");
+ break;
case PRINT_STRING:
case PRINT_BSTRING:
printf("__get_str(%s)", args->string.string);
pevent->ref_count++;
}
+void pevent_free_format_field(struct format_field *field)
+{
+ free(field->type);
+ free(field->name);
+ free(field);
+}
+
static void free_format_fields(struct format_field *field)
{
struct format_field *next;
while (field) {
next = field->next;
- free(field->type);
- free(field->name);
- free(field);
+ pevent_free_format_field(field);
field = next;
}
}
free_handler(handle);
}
+ free(pevent->trace_clock);
free(pevent->events);
free(pevent->sort_events);
#include <stdbool.h>
#include <stdarg.h>
+#include <stdio.h>
#include <regex.h>
#include <string.h>
extern void trace_seq_terminate(struct trace_seq *s);
+extern int trace_seq_do_fprintf(struct trace_seq *s, FILE *fp);
extern int trace_seq_do_printf(struct trace_seq *s);
char *name;
char *plugin_alias;
char *description;
- char *value;
+ const char *value;
void *priv;
int set;
};
* .plugin_alias is used to give a shorter name to access
* the vairable. Useful if a plugin handles more than one event.
*
+ * If .value is not set, then it is considered a boolean and only
+ * .set will be processed. If .value is defined, then it is considered
+ * a string option and .set will be ignored.
+ *
* PEVENT_PLUGIN_ALIAS: (optional)
* The name to use for finding options (uses filename if not defined)
*/
struct print_arg *size;
};
+struct print_arg_int_array {
+ struct print_arg *field;
+ struct print_arg *count;
+ struct print_arg *el_size;
+};
+
struct print_arg_dynarray {
struct format_field *field;
struct print_arg *index;
PRINT_FLAGS,
PRINT_SYMBOL,
PRINT_HEX,
+ PRINT_INT_ARRAY,
PRINT_TYPE,
PRINT_STRING,
PRINT_BSTRING,
struct print_arg_flags flags;
struct print_arg_symbol symbol;
struct print_arg_hex hex;
+ struct print_arg_int_array int_array;
struct print_arg_func func;
struct print_arg_string string;
struct print_arg_bitmask bitmask;
};
int pevent_register_comm(struct pevent *pevent, const char *comm, int pid);
-void pevent_register_trace_clock(struct pevent *pevent, char *trace_clock);
+int pevent_register_trace_clock(struct pevent *pevent, const char *trace_clock);
int pevent_register_function(struct pevent *pevent, char *name,
unsigned long long addr, char *mod);
int pevent_register_print_string(struct pevent *pevent, const char *fmt,
const char *buf,
unsigned long size, const char *sys);
void pevent_free_format(struct event_format *event);
+void pevent_free_format_field(struct format_field *field);
void *pevent_get_field_raw(struct trace_seq *s, struct event_format *event,
const char *name, struct pevent_record *record,
struct event_format *pevent_data_event_from_type(struct pevent *pevent, int type);
int pevent_data_pid(struct pevent *pevent, struct pevent_record *rec);
const char *pevent_data_comm_from_pid(struct pevent *pevent, int pid);
+struct cmdline;
+struct cmdline *pevent_data_pid_from_comm(struct pevent *pevent, const char *comm,
+ struct cmdline *next);
+int pevent_cmdline_pid(struct pevent *pevent, struct cmdline *cmdline);
+
void pevent_event_info(struct trace_seq *s, struct event_format *event,
struct pevent_record *record);
int pevent_strerror(struct pevent *pevent, enum pevent_errno errnum,
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*/
+#include <ctype.h>
#include <stdio.h>
#include <string.h>
#include <dlfcn.h>
void *handle;
};
+static void lower_case(char *str)
+{
+ if (!str)
+ return;
+ for (; *str; str++)
+ *str = tolower(*str);
+}
+
+static int update_option_value(struct pevent_plugin_option *op, const char *val)
+{
+ char *op_val;
+
+ if (!val) {
+ /* toggle, only if option is boolean */
+ if (op->value)
+ /* Warn? */
+ return 0;
+ op->set ^= 1;
+ return 0;
+ }
+
+ /*
+ * If the option has a value then it takes a string
+ * otherwise the option is a boolean.
+ */
+ if (op->value) {
+ op->value = val;
+ return 0;
+ }
+
+ /* Option is boolean, must be either "1", "0", "true" or "false" */
+
+ op_val = strdup(val);
+ if (!op_val)
+ return -1;
+ lower_case(op_val);
+
+ if (strcmp(val, "1") == 0 || strcmp(val, "true") == 0)
+ op->set = 1;
+ else if (strcmp(val, "0") == 0 || strcmp(val, "false") == 0)
+ op->set = 0;
+ free(op_val);
+
+ return 0;
+}
+
/**
* traceevent_plugin_list_options - get list of plugin options
*
{
struct trace_plugin_options *op;
char *plugin;
+ int ret = 0;
if (option->plugin_alias) {
plugin = strdup(option->plugin_alias);
if (strcmp(op->option, option->name) != 0)
continue;
- option->value = op->value;
- option->set ^= 1;
- goto out;
+ ret = update_option_value(option, op->value);
+ if (ret)
+ goto out;
+ break;
}
/* first look for unnamed options */
if (strcmp(op->option, option->name) != 0)
continue;
- option->value = op->value;
- option->set ^= 1;
+ ret = update_option_value(option, op->value);
break;
}
out:
free(plugin);
- return 0;
+ return ret;
}
/**
switch (type_len) {
case KBUFFER_TYPE_PADDING:
*length = read_4(kbuf, data);
- data += *length;
break;
case KBUFFER_TYPE_TIME_EXTEND:
kbuf->next_event = __old_next_event;
}
+
+/**
+ * kbuffer_start_of_data - return offset of where data starts on subbuffer
+ * @kbuf: The kbuffer
+ *
+ * Returns the location on the subbuffer where the data starts.
+ */
+int kbuffer_start_of_data(struct kbuffer *kbuf)
+{
+ return kbuf->start;
+}
int kbuffer_subbuffer_size(struct kbuffer *kbuf);
void kbuffer_set_old_format(struct kbuffer *kbuf);
+int kbuffer_start_of_data(struct kbuffer *kbuf);
#endif /* _K_BUFFER_H */
*parg = current_op;
else
*parg = current_exp;
+ free(token);
return PEVENT_ERRNO__UNBALANCED_PAREN;
}
break;
*parg = current_op;
+ free(token);
return 0;
fail_alloc:
s->buffer[s->len] = 0;
}
-int trace_seq_do_printf(struct trace_seq *s)
+int trace_seq_do_fprintf(struct trace_seq *s, FILE *fp)
{
TRACE_SEQ_CHECK(s);
switch (s->state) {
case TRACE_SEQ__GOOD:
- return printf("%.*s", s->len, s->buffer);
+ return fprintf(fp, "%.*s", s->len, s->buffer);
case TRACE_SEQ__BUFFER_POISONED:
- puts("Usage of trace_seq after it was destroyed");
+ fprintf(fp, "%s\n", "Usage of trace_seq after it was destroyed");
break;
case TRACE_SEQ__MEM_ALLOC_FAILED:
- puts("Can't allocate trace_seq buffer memory");
+ fprintf(fp, "%s\n", "Can't allocate trace_seq buffer memory");
break;
}
return -1;
}
+
+int trace_seq_do_printf(struct trace_seq *s)
+{
+ return trace_seq_do_fprintf(s, stdout);
+}
PERF-CFLAGS
PERF-GUI-VARS
PERF-VERSION-FILE
+FEATURE-DUMP
perf
perf-read-vdso32
perf-read-vdsox32
--- /dev/null
+perf-y += builtin-bench.o
+perf-y += builtin-annotate.o
+perf-y += builtin-diff.o
+perf-y += builtin-evlist.o
+perf-y += builtin-help.o
+perf-y += builtin-sched.o
+perf-y += builtin-buildid-list.o
+perf-y += builtin-buildid-cache.o
+perf-y += builtin-list.o
+perf-y += builtin-record.o
+perf-y += builtin-report.o
+perf-y += builtin-stat.o
+perf-y += builtin-timechart.o
+perf-y += builtin-top.o
+perf-y += builtin-script.o
+perf-y += builtin-kmem.o
+perf-y += builtin-lock.o
+perf-y += builtin-kvm.o
+perf-y += builtin-inject.o
+perf-y += builtin-mem.o
+perf-y += builtin-data.o
+
+perf-$(CONFIG_AUDIT) += builtin-trace.o
+perf-$(CONFIG_LIBELF) += builtin-probe.o
+
+perf-y += bench/
+perf-y += tests/
+
+perf-y += perf.o
+
+paths += -DPERF_HTML_PATH="BUILD_STR($(htmldir_SQ))"
+paths += -DPERF_INFO_PATH="BUILD_STR($(infodir_SQ))"
+paths += -DPERF_MAN_PATH="BUILD_STR($(mandir_SQ))"
+
+CFLAGS_builtin-help.o += $(paths)
+CFLAGS_builtin-timechart.o += $(paths)
+CFLAGS_perf.o += -DPERF_HTML_PATH="BUILD_STR($(htmldir_SQ))" -include $(OUTPUT)PERF-VERSION-FILE
+
+libperf-y += util/
+libperf-y += arch/
+libperf-y += ui/
+libperf-y += scripts/
+
+gtk-y += ui/gtk/
--- /dev/null
+
+1) perf build
+=============
+The perf build process consists of several separated building blocks,
+which are linked together to form the perf binary:
+ - libperf library (static)
+ - perf builtin commands
+ - traceevent library (static)
+ - GTK ui library
+
+Several makefiles govern the perf build:
+
+ - Makefile
+ top level Makefile working as a wrapper that calls the main
+ Makefile.perf with a -j option to do parallel builds.
+
+ - Makefile.perf
+ main makefile that triggers build of all perf objects including
+ installation and documentation processing.
+
+ - tools/build/Makefile.build
+ main makefile of the build framework
+
+ - tools/build/Build.include
+ build framework generic definitions
+
+ - Build makefiles
+ makefiles that defines build objects
+
+Please refer to tools/build/Documentation/Build.txt for more
+information about build framework.
+
+
+2) perf build
+=============
+The Makefile.perf triggers the build framework for build objects:
+ perf, libperf, gtk
+
+resulting in following objects:
+ $ ls *-in.o
+ gtk-in.o libperf-in.o perf-in.o
+
+Those objects are then used in final linking:
+ libperf-gtk.so <- gtk-in.o libperf-in.o
+ perf <- perf-in.o libperf-in.o
+
+
+NOTE this description is omitting other libraries involved, only
+ focusing on build framework outcomes
DESCRIPTION
-----------
-This command manages the build-id cache. It can add and remove files to/from
-the cache. In the future it should as well purge older entries, set upper
-limits for the space used by the cache, etc.
+This command manages the build-id cache. It can add, remove, update and purge
+files to/from the cache. In the future it should as well set upper limits for
+the space used by the cache, etc.
OPTIONS
-------
actually made.
-r::
--remove=::
- Remove specified file from the cache.
+ Remove a cached binary which has same build-id of specified file
+ from the cache.
+-p::
+--purge=::
+ Purge all cached binaries including older caches which have specified
+ path from the cache.
-M::
--missing=::
List missing build ids in the cache for the specified file.
-u::
---update::
- Update specified file of the cache. It can be used to update kallsyms
- kernel dso to vmlinux in order to support annotation.
+--update=::
+ Update specified file of the cache. Note that this doesn't remove
+ older entires since those may be still needed for annotating old
+ (or remote) perf.data. Only if there is already a cache which has
+ exactly same build-id, that is replaced by new one. It can be used
+ to update kallsyms and kernel dso to vmlinux in order to support
+ annotation.
+
-v::
--verbose::
Be more verbose.
--- /dev/null
+perf-data(1)
+==============
+
+NAME
+----
+perf-data - Data file related processing
+
+SYNOPSIS
+--------
+[verse]
+'perf data' [<common options>] <command> [<options>]",
+
+DESCRIPTION
+-----------
+Data file related processing.
+
+COMMANDS
+--------
+convert::
+ Converts perf data file into another format (only CTF [1] format is support by now).
+ It's possible to set data-convert debug variable to get debug messages from conversion,
+ like:
+ perf --debug data-convert data convert ...
+
+OPTIONS for 'convert'
+---------------------
+--to-ctf::
+ Triggers the CTF conversion, specify the path of CTF data directory.
+
+-i::
+ Specify input perf data file path.
+
+-v::
+--verbose::
+ Be more verbose (show counter open errors, etc).
+
+SEE ALSO
+--------
+linkperf:perf[1]
+[1] Common Trace Format - http://www.efficios.com/ctf
The differential profile is displayed only for events matching both
specified perf.data files.
+If no parameters are passed the samples will be sorted by dso and symbol.
+As the perf.data files could come from different binaries, the symbols addresses
+could vary. So perf diff is based on the comparison of the files and
+symbols name.
+
OPTIONS
-------
-D::
--dump-raw-trace::
Dump raw trace in ASCII.
+--kallsyms=<file>::
+ kallsyms pathname
+
-m::
--modules::
Load module symbols. WARNING: use only with -k and LIVE kernel
--input=<file>::
Select the input file (default: perf.data unless stdin is a fifo)
+-v::
+--verbose::
+ Be more verbose. (show symbol address, etc)
+
--caller::
Show per-callsite statistics
u - user-space counting
k - kernel counting
h - hypervisor counting
+ I - non idle counting
G - guest counting (in KVM guests)
H - host counting (not in KVM guests)
p - precise level
One or more types can be used at the same time, listing the events for the
types specified.
+Support raw format:
+
+. '--raw-dump', shows the raw-dump of all the events.
+. '--raw-dump [hw|sw|cache|tracepoint|pmu|event_glob]', shows the raw-dump of
+ a certain kind of events.
+
SEE ALSO
--------
linkperf:perf-stat[1], linkperf:perf-top[1],
-v::
--verbose::
Be more verbose (show parsed arguments, etc).
+ Can not use with -q.
+
+-q::
+--quiet::
+ Be quiet (do not show any messages including errors).
+ Can not use with -v.
-a::
--add=::
Dry run. With this option, --add and --del doesn't execute actual
adding and removal operations.
---max-probes::
+--max-probes=NUM::
Set the maximum number of probe points for an event. Default is 128.
-x::
Specify path to the executable or shared library file for user
space tracing. Can also be used with --funcs option.
+--demangle::
+ Demangle application symbols. --no-demangle is also available
+ for disabling demangling.
+
--demangle-kernel::
- Demangle kernel symbols.
+ Demangle kernel symbols. --no-demangle-kernel is also available
+ for disabling kernel demangling.
In absence of -m/-x options, perf probe checks if the first argument after
the options is an absolute path name. If its an absolute path, perf probe
[NAME=]LOCALVAR|$retval|%REG|@SYMBOL[:TYPE]
'NAME' specifies the name of this argument (optional). You can use the name of local variable, local data structure member (e.g. var->field, var.field2), local array with fixed index (e.g. array[1], var->array[0], var->pointer[2]), or kprobe-tracer argument format (e.g. $retval, %ax, etc). Note that the name of this argument will be set as the last member name if you specify a local data structure member (e.g. field2 for 'var->field1.field2'.)
+'$vars' special argument is also available for NAME, it is expanded to the local variables which can access at given probe point.
'TYPE' casts the type of this argument (optional). If omitted, perf probe automatically set the type based on debuginfo. You can specify 'string' type only for the local variable or structure member which is an array of or a pointer to 'char' or 'unsigned char' type.
On x86 systems %REG is always the short form of the register: for example %AX. %RAX or %EAX is not valid.
If you want to profile write accesses in [0x1000~1008), just set
'mem:0x1000/8:w'.
+ - a group of events surrounded by a pair of brace ("{event1,event2,...}").
+ Each event is separated by commas and the group should be quoted to
+ prevent the shell interpretation. You also need to use --group on
+ "perf report" to view group events together.
+
--filter=<filter>::
Event filter.
--all-cpus::
System-wide collection from all CPUs.
--l::
- Scale counter values.
-
-p::
--pid=::
Record events on existing process ID (comma separated list).
specification with appended unit character - B/K/M/G. The
size is rounded up to have nearest pages power of two value.
+--group::
+ Put all events in a single event group. This precedes the --event
+ option and remains only for backward compatibility. See --event.
+
-g::
Enables call-graph (stack chain/backtrace) recording.
implies -g.
Allows specifying "fp" (frame pointer) or "dwarf"
- (DWARF's CFI - Call Frame Information) as the method to collect
+ (DWARF's CFI - Call Frame Information) or "lbr"
+ (Hardware Last Branch Record facility) as the method to collect
the information used to show the call graphs.
In some systems, where binaries are build with gcc
--fomit-frame-pointer, using the "fp" method will produce bogus
call graphs, using "dwarf", if available (perf tools linked to
the libunwind library) should be used instead.
+ Using the "lbr" method doesn't require any compiler options. It
+ will produce call graphs from the hardware LBR registers. The
+ main limition is that it is only available on new Intel
+ platforms, such as Haswell. It can only get user call chain. It
+ doesn't work with branch stack sampling at the same time.
-q::
--quiet::
each sample. List of captured registers depends on the architecture. This option
is off by default.
+--running-time::
+Record running and enabled time for read events (:S)
+
+-k::
+--clockid::
+Sets the clock id to use for the various time fields in the perf_event_type
+records. See clock_gettime(). In particular CLOCK_MONOTONIC and
+CLOCK_MONOTONIC_RAW are supported, some events might also allow
+CLOCK_BOOTTIME, CLOCK_REALTIME and CLOCK_TAI.
+
SEE ALSO
--------
linkperf:perf-stat[1], linkperf:perf-list[1]
Only consider symbols in these comms. CSV that understands
file://filename entries. This option will affect the percentage of
the overhead column. See --percentage for more info.
+--pid=::
+ Only show events for given process ID (comma separated list).
+
+--tid=::
+ Only show events for given thread ID (comma separated list).
-d::
--dsos=::
Only consider symbols in these dsos. CSV that understands
Only display events for these comms. CSV that understands
file://filename entries.
+--pid=::
+ Only show events for given process ID (comma separated list).
+
+--tid=::
+ Only show events for given thread ID (comma separated list).
+
-I::
--show-info::
Display extended information about the perf.data file. This adds
--uid=::
Record events in threads owned by uid. Name or number.
+--filter-pids=::
+ Filter out events for these pids and for 'trace' itself (comma separated list).
+
-v::
--verbose=::
Verbosity level.
--syscalls::
Trace system calls. This options is enabled by default.
+--event::
+ Trace other events, see 'perf list' for a complete list.
+
PAGEFAULTS
----------
OPTIONS
-------
--debug::
- Setup debug variable (just verbose for now) in value
+ Setup debug variable (see list below) in value
range (0, 10). Use like:
--debug verbose # sets verbose = 1
--debug verbose=2 # sets verbose = 2
+ List of debug variables allowed to set:
+ verbose - general debug messages
+ ordered-events - ordered events object debug messages
+ data-convert - data convert command debug messages
+
--buildid-dir::
Setup buildid cache directory. It has higher priority than
buildid.dir config file option.
tools/perf
tools/scripts
+tools/build
tools/lib/traceevent
tools/lib/api
tools/lib/symbol/kallsyms.c
# (To override it, run 'make JOBS=1' and similar.)
#
ifeq ($(JOBS),)
- JOBS := $(shell grep -c ^processor /proc/cpuinfo 2>/dev/null)
- ifeq ($(JOBS),)
+ JOBS := $(shell egrep -c '^processor|^CPU' /proc/cpuinfo 2>/dev/null)
+ ifeq ($(JOBS),0)
JOBS := 1
endif
endif
# for reading the x32 mode 32-bit compatibility VDSO in 64-bit mode
#
# Define NO_ZLIB if you do not want to support compressed kernel modules
-
+#
+# Define LIBBABELTRACE if you DO want libbabeltrace support
+# for CTF data format.
+#
+# Define NO_LZMA if you do not want to support compressed (xz) kernel modules
ifeq ($(srctree),)
srctree := $(patsubst %/,%,$(dir $(shell pwd)))
ifneq ($(OUTPUT),)
#$(info Determined 'OUTPUT' to be $(OUTPUT))
+# Adding $(OUTPUT) as a directory to look for source files,
+# because use generated output files as sources dependency
+# for flex/bison parsers.
+VPATH += $(OUTPUT)
+export VPATH
endif
+ifeq ($(V),1)
+ Q =
+else
+ Q = @
+endif
+
+# Do not use make's built-in rules
+# (this improves performance and avoids hard-to-debug behaviour);
+MAKEFLAGS += -r
+
$(OUTPUT)PERF-VERSION-FILE: ../../.git/HEAD
- @$(SHELL_PATH) util/PERF-VERSION-GEN $(OUTPUT)
- @touch $(OUTPUT)PERF-VERSION-FILE
+ $(Q)$(SHELL_PATH) util/PERF-VERSION-GEN $(OUTPUT)
+ $(Q)touch $(OUTPUT)PERF-VERSION-FILE
CC = $(CROSS_COMPILE)gcc
+LD = $(CROSS_COMPILE)ld
AR = $(CROSS_COMPILE)ar
PKG_CONFIG = $(CROSS_COMPILE)pkg-config
SPARSE_FLAGS = -D__BIG_ENDIAN__ -D__powerpc__
# Guard against environment variables
-BUILTIN_OBJS =
-LIB_H =
-LIB_OBJS =
-GTK_OBJS =
PYRF_OBJS =
SCRIPT_SH =
LIBTRACEEVENT = $(TE_PATH)libtraceevent.a
export LIBTRACEEVENT
-LIBAPIKFS = $(LIB_PATH)libapikfs.a
-export LIBAPIKFS
+LIBAPI = $(LIB_PATH)libapi.a
+export LIBAPI
# python extension build directories
PYTHON_EXTBUILD := $(OUTPUT)python_ext_build/
python-clean := $(call QUIET_CLEAN, python) $(RM) -r $(PYTHON_EXTBUILD) $(OUTPUT)python/perf.so
PYTHON_EXT_SRCS := $(shell grep -v ^\# util/python-ext-sources)
-PYTHON_EXT_DEPS := util/python-ext-sources util/setup.py $(LIBTRACEEVENT) $(LIBAPIKFS)
+PYTHON_EXT_DEPS := util/python-ext-sources util/setup.py $(LIBTRACEEVENT) $(LIBAPI)
$(OUTPUT)python/perf.so: $(PYTHON_EXT_SRCS) $(PYTHON_EXT_DEPS)
$(QUIET_GEN)CFLAGS='$(CFLAGS)' $(PYTHON_WORD) util/setup.py \
export PERL_PATH
-$(OUTPUT)util/parse-events-flex.c: util/parse-events.l $(OUTPUT)util/parse-events-bison.c
- $(QUIET_FLEX)$(FLEX) -o $@ --header-file=$(OUTPUT)util/parse-events-flex.h $(PARSER_DEBUG_FLEX) util/parse-events.l
-
-$(OUTPUT)util/parse-events-bison.c: util/parse-events.y
- $(QUIET_BISON)$(BISON) -v util/parse-events.y -d $(PARSER_DEBUG_BISON) -o $(OUTPUT)util/parse-events-bison.c -p parse_events_
-
-$(OUTPUT)util/pmu-flex.c: util/pmu.l $(OUTPUT)util/pmu-bison.c
- $(QUIET_FLEX)$(FLEX) -o $@ --header-file=$(OUTPUT)util/pmu-flex.h util/pmu.l
-
-$(OUTPUT)util/pmu-bison.c: util/pmu.y
- $(QUIET_BISON)$(BISON) -v util/pmu.y -d -o $(OUTPUT)util/pmu-bison.c -p perf_pmu_
-
-$(OUTPUT)util/parse-events.o: $(OUTPUT)util/parse-events-flex.c $(OUTPUT)util/parse-events-bison.c
-$(OUTPUT)util/pmu.o: $(OUTPUT)util/pmu-flex.c $(OUTPUT)util/pmu-bison.c
-
LIB_FILE=$(OUTPUT)libperf.a
-LIB_H += ../lib/symbol/kallsyms.h
-LIB_H += ../../include/uapi/linux/perf_event.h
-LIB_H += ../../include/linux/rbtree.h
-LIB_H += ../../include/linux/list.h
-LIB_H += ../../include/uapi/linux/const.h
-LIB_H += ../include/linux/hash.h
-LIB_H += ../../include/linux/stringify.h
-LIB_H += util/include/linux/bitmap.h
-LIB_H += ../include/linux/bitops.h
-LIB_H += ../include/asm-generic/bitops/arch_hweight.h
-LIB_H += ../include/asm-generic/bitops/atomic.h
-LIB_H += ../include/asm-generic/bitops/const_hweight.h
-LIB_H += ../include/asm-generic/bitops/find.h
-LIB_H += ../include/asm-generic/bitops/fls64.h
-LIB_H += ../include/asm-generic/bitops/fls.h
-LIB_H += ../include/asm-generic/bitops/__ffs.h
-LIB_H += ../include/asm-generic/bitops/__fls.h
-LIB_H += ../include/asm-generic/bitops/hweight.h
-LIB_H += ../include/asm-generic/bitops.h
-LIB_H += ../include/linux/compiler.h
-LIB_H += ../include/linux/log2.h
-LIB_H += util/include/linux/const.h
-LIB_H += util/include/linux/ctype.h
-LIB_H += util/include/linux/kernel.h
-LIB_H += util/include/linux/list.h
-LIB_H += ../include/linux/export.h
-LIB_H += util/include/linux/poison.h
-LIB_H += util/include/linux/rbtree.h
-LIB_H += util/include/linux/rbtree_augmented.h
-LIB_H += util/include/linux/string.h
-LIB_H += ../include/linux/types.h
-LIB_H += util/include/linux/linkage.h
-LIB_H += util/include/asm/asm-offsets.h
-LIB_H += ../include/asm/bug.h
-LIB_H += util/include/asm/byteorder.h
-LIB_H += util/include/asm/swab.h
-LIB_H += util/include/asm/system.h
-LIB_H += util/include/asm/uaccess.h
-LIB_H += util/include/dwarf-regs.h
-LIB_H += util/include/asm/dwarf2.h
-LIB_H += util/include/asm/cpufeature.h
-LIB_H += util/include/asm/unistd_32.h
-LIB_H += util/include/asm/unistd_64.h
-LIB_H += perf.h
-LIB_H += util/annotate.h
-LIB_H += util/cache.h
-LIB_H += util/callchain.h
-LIB_H += util/build-id.h
-LIB_H += util/db-export.h
-LIB_H += util/debug.h
-LIB_H += util/pmu.h
-LIB_H += util/event.h
-LIB_H += util/evsel.h
-LIB_H += util/evlist.h
-LIB_H += util/exec_cmd.h
-LIB_H += util/find-vdso-map.c
-LIB_H += util/levenshtein.h
-LIB_H += util/machine.h
-LIB_H += util/map.h
-LIB_H += util/parse-options.h
-LIB_H += util/parse-events.h
-LIB_H += util/quote.h
-LIB_H += util/util.h
-LIB_H += util/xyarray.h
-LIB_H += util/header.h
-LIB_H += util/help.h
-LIB_H += util/session.h
-LIB_H += util/ordered-events.h
-LIB_H += util/strbuf.h
-LIB_H += util/strlist.h
-LIB_H += util/strfilter.h
-LIB_H += util/svghelper.h
-LIB_H += util/tool.h
-LIB_H += util/run-command.h
-LIB_H += util/sigchain.h
-LIB_H += util/dso.h
-LIB_H += util/symbol.h
-LIB_H += util/color.h
-LIB_H += util/values.h
-LIB_H += util/sort.h
-LIB_H += util/hist.h
-LIB_H += util/comm.h
-LIB_H += util/thread.h
-LIB_H += util/thread_map.h
-LIB_H += util/trace-event.h
-LIB_H += util/probe-finder.h
-LIB_H += util/dwarf-aux.h
-LIB_H += util/probe-event.h
-LIB_H += util/pstack.h
-LIB_H += util/cpumap.h
-LIB_H += util/top.h
-LIB_H += $(ARCH_INCLUDE)
-LIB_H += util/cgroup.h
-LIB_H += $(LIB_INCLUDE)traceevent/event-parse.h
-LIB_H += util/target.h
-LIB_H += util/rblist.h
-LIB_H += util/intlist.h
-LIB_H += util/perf_regs.h
-LIB_H += util/unwind.h
-LIB_H += util/vdso.h
-LIB_H += util/tsc.h
-LIB_H += ui/helpline.h
-LIB_H += ui/progress.h
-LIB_H += ui/util.h
-LIB_H += ui/ui.h
-LIB_H += util/data.h
-LIB_H += util/kvm-stat.h
-LIB_H += util/thread-stack.h
-
-LIB_OBJS += $(OUTPUT)util/abspath.o
-LIB_OBJS += $(OUTPUT)util/alias.o
-LIB_OBJS += $(OUTPUT)util/annotate.o
-LIB_OBJS += $(OUTPUT)util/build-id.o
-LIB_OBJS += $(OUTPUT)util/config.o
-LIB_OBJS += $(OUTPUT)util/ctype.o
-LIB_OBJS += $(OUTPUT)util/db-export.o
-LIB_OBJS += $(OUTPUT)util/pmu.o
-LIB_OBJS += $(OUTPUT)util/environment.o
-LIB_OBJS += $(OUTPUT)util/event.o
-LIB_OBJS += $(OUTPUT)util/evlist.o
-LIB_OBJS += $(OUTPUT)util/evsel.o
-LIB_OBJS += $(OUTPUT)util/exec_cmd.o
-LIB_OBJS += $(OUTPUT)util/find_next_bit.o
-LIB_OBJS += $(OUTPUT)util/help.o
-LIB_OBJS += $(OUTPUT)util/kallsyms.o
-LIB_OBJS += $(OUTPUT)util/levenshtein.o
-LIB_OBJS += $(OUTPUT)util/parse-options.o
-LIB_OBJS += $(OUTPUT)util/parse-events.o
-LIB_OBJS += $(OUTPUT)util/path.o
-LIB_OBJS += $(OUTPUT)util/rbtree.o
-LIB_OBJS += $(OUTPUT)util/bitmap.o
-LIB_OBJS += $(OUTPUT)util/hweight.o
-LIB_OBJS += $(OUTPUT)util/run-command.o
-LIB_OBJS += $(OUTPUT)util/quote.o
-LIB_OBJS += $(OUTPUT)util/strbuf.o
-LIB_OBJS += $(OUTPUT)util/string.o
-LIB_OBJS += $(OUTPUT)util/strlist.o
-LIB_OBJS += $(OUTPUT)util/strfilter.o
-LIB_OBJS += $(OUTPUT)util/top.o
-LIB_OBJS += $(OUTPUT)util/usage.o
-LIB_OBJS += $(OUTPUT)util/wrapper.o
-LIB_OBJS += $(OUTPUT)util/sigchain.o
-LIB_OBJS += $(OUTPUT)util/dso.o
-LIB_OBJS += $(OUTPUT)util/symbol.o
-LIB_OBJS += $(OUTPUT)util/symbol-elf.o
-LIB_OBJS += $(OUTPUT)util/color.o
-LIB_OBJS += $(OUTPUT)util/pager.o
-LIB_OBJS += $(OUTPUT)util/header.o
-LIB_OBJS += $(OUTPUT)util/callchain.o
-LIB_OBJS += $(OUTPUT)util/values.o
-LIB_OBJS += $(OUTPUT)util/debug.o
-LIB_OBJS += $(OUTPUT)util/machine.o
-LIB_OBJS += $(OUTPUT)util/map.o
-LIB_OBJS += $(OUTPUT)util/pstack.o
-LIB_OBJS += $(OUTPUT)util/session.o
-LIB_OBJS += $(OUTPUT)util/ordered-events.o
-LIB_OBJS += $(OUTPUT)util/comm.o
-LIB_OBJS += $(OUTPUT)util/thread.o
-LIB_OBJS += $(OUTPUT)util/thread_map.o
-LIB_OBJS += $(OUTPUT)util/trace-event-parse.o
-LIB_OBJS += $(OUTPUT)util/parse-events-flex.o
-LIB_OBJS += $(OUTPUT)util/parse-events-bison.o
-LIB_OBJS += $(OUTPUT)util/pmu-flex.o
-LIB_OBJS += $(OUTPUT)util/pmu-bison.o
-LIB_OBJS += $(OUTPUT)util/trace-event-read.o
-LIB_OBJS += $(OUTPUT)util/trace-event-info.o
-LIB_OBJS += $(OUTPUT)util/trace-event-scripting.o
-LIB_OBJS += $(OUTPUT)util/trace-event.o
-LIB_OBJS += $(OUTPUT)util/svghelper.o
-LIB_OBJS += $(OUTPUT)util/sort.o
-LIB_OBJS += $(OUTPUT)util/hist.o
-LIB_OBJS += $(OUTPUT)util/probe-event.o
-LIB_OBJS += $(OUTPUT)util/util.o
-LIB_OBJS += $(OUTPUT)util/xyarray.o
-LIB_OBJS += $(OUTPUT)util/cpumap.o
-LIB_OBJS += $(OUTPUT)util/cgroup.o
-LIB_OBJS += $(OUTPUT)util/target.o
-LIB_OBJS += $(OUTPUT)util/rblist.o
-LIB_OBJS += $(OUTPUT)util/intlist.o
-LIB_OBJS += $(OUTPUT)util/vdso.o
-LIB_OBJS += $(OUTPUT)util/stat.o
-LIB_OBJS += $(OUTPUT)util/record.o
-LIB_OBJS += $(OUTPUT)util/srcline.o
-LIB_OBJS += $(OUTPUT)util/data.o
-LIB_OBJS += $(OUTPUT)util/tsc.o
-LIB_OBJS += $(OUTPUT)util/cloexec.o
-LIB_OBJS += $(OUTPUT)util/thread-stack.o
-
-LIB_OBJS += $(OUTPUT)ui/setup.o
-LIB_OBJS += $(OUTPUT)ui/helpline.o
-LIB_OBJS += $(OUTPUT)ui/progress.o
-LIB_OBJS += $(OUTPUT)ui/util.o
-LIB_OBJS += $(OUTPUT)ui/hist.o
-LIB_OBJS += $(OUTPUT)ui/stdio/hist.o
-
-LIB_OBJS += $(OUTPUT)arch/common.o
-
-LIB_OBJS += $(OUTPUT)tests/parse-events.o
-LIB_OBJS += $(OUTPUT)tests/dso-data.o
-LIB_OBJS += $(OUTPUT)tests/attr.o
-LIB_OBJS += $(OUTPUT)tests/vmlinux-kallsyms.o
-LIB_OBJS += $(OUTPUT)tests/open-syscall.o
-LIB_OBJS += $(OUTPUT)tests/open-syscall-all-cpus.o
-LIB_OBJS += $(OUTPUT)tests/open-syscall-tp-fields.o
-LIB_OBJS += $(OUTPUT)tests/mmap-basic.o
-LIB_OBJS += $(OUTPUT)tests/perf-record.o
-LIB_OBJS += $(OUTPUT)tests/rdpmc.o
-LIB_OBJS += $(OUTPUT)tests/evsel-roundtrip-name.o
-LIB_OBJS += $(OUTPUT)tests/evsel-tp-sched.o
-LIB_OBJS += $(OUTPUT)tests/fdarray.o
-LIB_OBJS += $(OUTPUT)tests/pmu.o
-LIB_OBJS += $(OUTPUT)tests/hists_common.o
-LIB_OBJS += $(OUTPUT)tests/hists_link.o
-LIB_OBJS += $(OUTPUT)tests/hists_filter.o
-LIB_OBJS += $(OUTPUT)tests/hists_output.o
-LIB_OBJS += $(OUTPUT)tests/hists_cumulate.o
-LIB_OBJS += $(OUTPUT)tests/python-use.o
-LIB_OBJS += $(OUTPUT)tests/bp_signal.o
-LIB_OBJS += $(OUTPUT)tests/bp_signal_overflow.o
-LIB_OBJS += $(OUTPUT)tests/task-exit.o
-LIB_OBJS += $(OUTPUT)tests/sw-clock.o
-ifeq ($(ARCH),x86)
-LIB_OBJS += $(OUTPUT)tests/perf-time-to-tsc.o
-endif
-LIB_OBJS += $(OUTPUT)tests/code-reading.o
-LIB_OBJS += $(OUTPUT)tests/sample-parsing.o
-LIB_OBJS += $(OUTPUT)tests/parse-no-sample-id-all.o
-ifndef NO_DWARF_UNWIND
-ifeq ($(ARCH),$(filter $(ARCH),x86 arm))
-LIB_OBJS += $(OUTPUT)tests/dwarf-unwind.o
-endif
-endif
-LIB_OBJS += $(OUTPUT)tests/mmap-thread-lookup.o
-LIB_OBJS += $(OUTPUT)tests/thread-mg-share.o
-LIB_OBJS += $(OUTPUT)tests/switch-tracking.o
-
-BUILTIN_OBJS += $(OUTPUT)builtin-annotate.o
-BUILTIN_OBJS += $(OUTPUT)builtin-bench.o
-# Benchmark modules
-BUILTIN_OBJS += $(OUTPUT)bench/sched-messaging.o
-BUILTIN_OBJS += $(OUTPUT)bench/sched-pipe.o
-ifeq ($(ARCH), x86)
-ifeq ($(IS_64_BIT), 1)
-BUILTIN_OBJS += $(OUTPUT)bench/mem-memcpy-x86-64-asm.o
-BUILTIN_OBJS += $(OUTPUT)bench/mem-memset-x86-64-asm.o
-endif
-endif
-BUILTIN_OBJS += $(OUTPUT)bench/mem-memcpy.o
-BUILTIN_OBJS += $(OUTPUT)bench/futex-hash.o
-BUILTIN_OBJS += $(OUTPUT)bench/futex-wake.o
-BUILTIN_OBJS += $(OUTPUT)bench/futex-requeue.o
-
-BUILTIN_OBJS += $(OUTPUT)builtin-diff.o
-BUILTIN_OBJS += $(OUTPUT)builtin-evlist.o
-BUILTIN_OBJS += $(OUTPUT)builtin-help.o
-BUILTIN_OBJS += $(OUTPUT)builtin-sched.o
-BUILTIN_OBJS += $(OUTPUT)builtin-buildid-list.o
-BUILTIN_OBJS += $(OUTPUT)builtin-buildid-cache.o
-BUILTIN_OBJS += $(OUTPUT)builtin-list.o
-BUILTIN_OBJS += $(OUTPUT)builtin-record.o
-BUILTIN_OBJS += $(OUTPUT)builtin-report.o
-BUILTIN_OBJS += $(OUTPUT)builtin-stat.o
-BUILTIN_OBJS += $(OUTPUT)builtin-timechart.o
-BUILTIN_OBJS += $(OUTPUT)builtin-top.o
-BUILTIN_OBJS += $(OUTPUT)builtin-script.o
-BUILTIN_OBJS += $(OUTPUT)builtin-probe.o
-BUILTIN_OBJS += $(OUTPUT)builtin-kmem.o
-BUILTIN_OBJS += $(OUTPUT)builtin-lock.o
-BUILTIN_OBJS += $(OUTPUT)builtin-kvm.o
-BUILTIN_OBJS += $(OUTPUT)builtin-inject.o
-BUILTIN_OBJS += $(OUTPUT)tests/builtin-test.o
-BUILTIN_OBJS += $(OUTPUT)builtin-mem.o
-
-PERFLIBS = $(LIB_FILE) $(LIBAPIKFS) $(LIBTRACEEVENT)
+PERFLIBS = $(LIB_FILE) $(LIBAPI) $(LIBTRACEEVENT)
# We choose to avoid "if .. else if .. else .. endif endif"
# because maintaining the nesting to match is a pain. If
CFLAGS += -I$(OUTPUT)
endif
-ifdef NO_LIBELF
-# Remove ELF/DWARF dependent codes
-LIB_OBJS := $(filter-out $(OUTPUT)util/symbol-elf.o,$(LIB_OBJS))
-LIB_OBJS := $(filter-out $(OUTPUT)util/dwarf-aux.o,$(LIB_OBJS))
-LIB_OBJS := $(filter-out $(OUTPUT)util/probe-event.o,$(LIB_OBJS))
-LIB_OBJS := $(filter-out $(OUTPUT)util/probe-finder.o,$(LIB_OBJS))
-
-BUILTIN_OBJS := $(filter-out $(OUTPUT)builtin-probe.o,$(BUILTIN_OBJS))
-
-# Use minimal symbol handling
-LIB_OBJS += $(OUTPUT)util/symbol-minimal.o
-
-else # NO_LIBELF
-ifndef NO_DWARF
- LIB_OBJS += $(OUTPUT)util/probe-finder.o
- LIB_OBJS += $(OUTPUT)util/dwarf-aux.o
-endif # NO_DWARF
-endif # NO_LIBELF
-
-ifndef NO_LIBDW_DWARF_UNWIND
- LIB_OBJS += $(OUTPUT)util/unwind-libdw.o
- LIB_H += util/unwind-libdw.h
-endif
-
-ifndef NO_LIBUNWIND
- LIB_OBJS += $(OUTPUT)util/unwind-libunwind.o
-endif
-LIB_OBJS += $(OUTPUT)tests/keep-tracking.o
-
-ifndef NO_LIBAUDIT
- BUILTIN_OBJS += $(OUTPUT)builtin-trace.o
-endif
-
-ifndef NO_SLANG
- LIB_OBJS += $(OUTPUT)ui/browser.o
- LIB_OBJS += $(OUTPUT)ui/browsers/annotate.o
- LIB_OBJS += $(OUTPUT)ui/browsers/hists.o
- LIB_OBJS += $(OUTPUT)ui/browsers/map.o
- LIB_OBJS += $(OUTPUT)ui/browsers/scripts.o
- LIB_OBJS += $(OUTPUT)ui/browsers/header.o
- LIB_OBJS += $(OUTPUT)ui/tui/setup.o
- LIB_OBJS += $(OUTPUT)ui/tui/util.o
- LIB_OBJS += $(OUTPUT)ui/tui/helpline.o
- LIB_OBJS += $(OUTPUT)ui/tui/progress.o
- LIB_H += ui/tui/tui.h
- LIB_H += ui/browser.h
- LIB_H += ui/browsers/map.h
- LIB_H += ui/keysyms.h
- LIB_H += ui/libslang.h
-endif
-
ifndef NO_GTK2
ALL_PROGRAMS += $(OUTPUT)libperf-gtk.so
-
- GTK_OBJS += $(OUTPUT)ui/gtk/browser.o
- GTK_OBJS += $(OUTPUT)ui/gtk/hists.o
- GTK_OBJS += $(OUTPUT)ui/gtk/setup.o
- GTK_OBJS += $(OUTPUT)ui/gtk/util.o
- GTK_OBJS += $(OUTPUT)ui/gtk/helpline.o
- GTK_OBJS += $(OUTPUT)ui/gtk/progress.o
- GTK_OBJS += $(OUTPUT)ui/gtk/annotate.o
+ GTK_IN := $(OUTPUT)gtk-in.o
install-gtk: $(OUTPUT)libperf-gtk.so
$(call QUIET_INSTALL, 'GTK UI') \
$(INSTALL) $(OUTPUT)libperf-gtk.so '$(DESTDIR_SQ)$(libdir_SQ)'
endif
-ifndef NO_LIBPERL
- LIB_OBJS += $(OUTPUT)util/scripting-engines/trace-event-perl.o
- LIB_OBJS += $(OUTPUT)scripts/perl/Perf-Trace-Util/Context.o
-endif
-
-ifndef NO_LIBPYTHON
- LIB_OBJS += $(OUTPUT)util/scripting-engines/trace-event-python.o
- LIB_OBJS += $(OUTPUT)scripts/python/Perf-Trace-Util/Context.o
-endif
-
-ifeq ($(NO_PERF_REGS),0)
- ifeq ($(ARCH),x86)
- LIB_H += arch/x86/include/perf_regs.h
- endif
- LIB_OBJS += $(OUTPUT)util/perf_regs.o
-endif
-
-ifndef NO_LIBNUMA
- BUILTIN_OBJS += $(OUTPUT)bench/numa.o
-endif
-
-ifndef NO_ZLIB
- LIB_OBJS += $(OUTPUT)util/zlib.o
-endif
-
ifdef ASCIIDOC8
export ASCIIDOC8
endif
all: shell_compatibility_test $(ALL_PROGRAMS) $(LANG_BINDINGS) $(OTHER_PROGRAMS)
please_set_SHELL_PATH_to_a_more_modern_shell:
- @$$(:)
+ $(Q)$$(:)
shell_compatibility_test: please_set_SHELL_PATH_to_a_more_modern_shell
strip: $(PROGRAMS) $(OUTPUT)perf
$(STRIP) $(STRIP_OPTS) $(PROGRAMS) $(OUTPUT)perf
-$(OUTPUT)perf.o: perf.c $(OUTPUT)common-cmds.h $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -include $(OUTPUT)PERF-VERSION-FILE \
- '-DPERF_HTML_PATH="$(htmldir_SQ)"' \
- $(CFLAGS) -c $(filter %.c,$^) -o $@
+PERF_IN := $(OUTPUT)perf-in.o
-$(OUTPUT)perf: $(OUTPUT)perf.o $(BUILTIN_OBJS) $(PERFLIBS)
- $(QUIET_LINK)$(CC) $(CFLAGS) $(LDFLAGS) $(OUTPUT)perf.o \
- $(BUILTIN_OBJS) $(LIBS) -o $@
+export srctree OUTPUT RM CC LD AR CFLAGS V BISON FLEX
+build := -f $(srctree)/tools/build/Makefile.build dir=. obj
-$(GTK_OBJS): $(OUTPUT)%.o: %.c $(LIB_H)
- $(QUIET_CC)$(CC) -o $@ -c -fPIC $(CFLAGS) $(GTK_CFLAGS) $<
+$(PERF_IN): $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)common-cmds.h FORCE
+ $(Q)$(MAKE) $(build)=perf
-$(OUTPUT)libperf-gtk.so: $(GTK_OBJS) $(PERFLIBS)
- $(QUIET_LINK)$(CC) -o $@ -shared $(LDFLAGS) $(filter %.o,$^) $(GTK_LIBS)
+$(OUTPUT)perf: $(PERFLIBS) $(PERF_IN)
+ $(QUIET_LINK)$(CC) $(CFLAGS) $(LDFLAGS) $(PERF_IN) $(LIBS) -o $@
-$(OUTPUT)builtin-help.o: builtin-help.c $(OUTPUT)common-cmds.h $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) \
- '-DPERF_HTML_PATH="$(htmldir_SQ)"' \
- '-DPERF_MAN_PATH="$(mandir_SQ)"' \
- '-DPERF_INFO_PATH="$(infodir_SQ)"' $<
+$(GTK_IN): FORCE
+ $(Q)$(MAKE) $(build)=gtk
-$(OUTPUT)builtin-timechart.o: builtin-timechart.c $(OUTPUT)common-cmds.h $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) \
- '-DPERF_HTML_PATH="$(htmldir_SQ)"' \
- '-DPERF_MAN_PATH="$(mandir_SQ)"' \
- '-DPERF_INFO_PATH="$(infodir_SQ)"' $<
+$(OUTPUT)libperf-gtk.so: $(GTK_IN) $(PERFLIBS)
+ $(QUIET_LINK)$(CC) -o $@ -shared $(LDFLAGS) $(filter %.o,$^) $(GTK_LIBS)
$(OUTPUT)common-cmds.h: util/generate-cmdlist.sh command-list.txt
$(QUIET_GEN)$(INSTALL) '$@.sh' '$(OUTPUT)$@'
# These can record PERF_VERSION
-$(OUTPUT)perf.o perf.spec \
- $(SCRIPTS) \
+perf.spec $(SCRIPTS) \
: $(OUTPUT)PERF-VERSION-FILE
.SUFFIXES:
# These two need to be here so that when O= is not used they take precedence
# over the general rule for .o
-$(OUTPUT)util/%-flex.o: $(OUTPUT)util/%-flex.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c -Iutil/ $(CFLAGS) -w $<
-
-$(OUTPUT)util/%-bison.o: $(OUTPUT)util/%-bison.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c -Iutil/ $(CFLAGS) -DYYENABLE_NLS=0 -DYYLTYPE_IS_TRIVIAL=0 -w $<
-
-$(OUTPUT)%.o: %.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) $<
-$(OUTPUT)%.i: %.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -E $(CFLAGS) $<
-$(OUTPUT)%.s: %.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -S $(CFLAGS) $<
-$(OUTPUT)%.o: %.S
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) $<
-$(OUTPUT)%.s: %.S
- $(QUIET_CC)$(CC) -o $@ -E $(CFLAGS) $<
-
-$(OUTPUT)util/exec_cmd.o: util/exec_cmd.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) \
- '-DPERF_EXEC_PATH="$(perfexecdir_SQ)"' \
- '-DPREFIX="$(prefix_SQ)"' \
- $<
-
-$(OUTPUT)tests/attr.o: tests/attr.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) \
- '-DBINDIR="$(bindir_SQ)"' -DPYTHON='"$(PYTHON_WORD)"' \
- $<
-
-$(OUTPUT)tests/python-use.o: tests/python-use.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) \
- -DPYTHONPATH='"$(OUTPUT)python"' \
- -DPYTHON='"$(PYTHON_WORD)"' \
- $<
-
-$(OUTPUT)tests/dwarf-unwind.o: tests/dwarf-unwind.c
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) -fno-optimize-sibling-calls $<
+# get relative building directory (to $(OUTPUT))
+# and '.' if it's $(OUTPUT) itself
+__build-dir = $(subst $(OUTPUT),,$(dir $@))
+build-dir = $(if $(__build-dir),$(__build-dir),.)
-$(OUTPUT)util/config.o: util/config.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) -DETC_PERFCONFIG='"$(ETC_PERFCONFIG_SQ)"' $<
+single_dep: $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)common-cmds.h
-$(OUTPUT)ui/setup.o: ui/setup.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) -DLIBDIR='"$(libdir_SQ)"' $<
+$(OUTPUT)%.o: %.c single_dep FORCE
+ $(Q)$(MAKE) -f $(srctree)/tools/build/Makefile.build dir=$(build-dir) $@
-$(OUTPUT)ui/browser.o: ui/browser.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) -DENABLE_SLFUTURE_CONST $<
+$(OUTPUT)%.i: %.c single_dep FORCE
+ $(Q)$(MAKE) -f $(srctree)/tools/build/Makefile.build dir=$(build-dir) $@
-$(OUTPUT)ui/browsers/annotate.o: ui/browsers/annotate.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) -DENABLE_SLFUTURE_CONST $<
+$(OUTPUT)%.s: %.c single_dep FORCE
+ $(Q)$(MAKE) -f $(srctree)/tools/build/Makefile.build dir=$(build-dir) $@
-$(OUTPUT)ui/browsers/hists.o: ui/browsers/hists.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) -DENABLE_SLFUTURE_CONST $<
+$(OUTPUT)%-bison.o: %.c single_dep FORCE
+ $(Q)$(MAKE) -f $(srctree)/tools/build/Makefile.build dir=$(build-dir) $@
-$(OUTPUT)ui/browsers/map.o: ui/browsers/map.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) -DENABLE_SLFUTURE_CONST $<
+$(OUTPUT)%-flex.o: %.c single_dep FORCE
+ $(Q)$(MAKE) -f $(srctree)/tools/build/Makefile.build dir=$(build-dir) $@
-$(OUTPUT)ui/browsers/scripts.o: ui/browsers/scripts.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) -DENABLE_SLFUTURE_CONST $<
+$(OUTPUT)%.o: %.S single_dep FORCE
+ $(Q)$(MAKE) -f $(srctree)/tools/build/Makefile.build dir=$(build-dir) $@
-$(OUTPUT)util/kallsyms.o: ../lib/symbol/kallsyms.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) $<
-
-$(OUTPUT)util/rbtree.o: ../../lib/rbtree.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) -Wno-unused-parameter -DETC_PERFCONFIG='"$(ETC_PERFCONFIG_SQ)"' $<
-
-$(OUTPUT)util/hweight.o: ../../lib/hweight.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) -Wno-unused-parameter -DETC_PERFCONFIG='"$(ETC_PERFCONFIG_SQ)"' $<
-
-$(OUTPUT)util/find_next_bit.o: ../lib/util/find_next_bit.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) -Wno-unused-parameter -DETC_PERFCONFIG='"$(ETC_PERFCONFIG_SQ)"' $<
-
-$(OUTPUT)util/parse-events.o: util/parse-events.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) -Wno-redundant-decls $<
-
-$(OUTPUT)util/scripting-engines/trace-event-perl.o: util/scripting-engines/trace-event-perl.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) $(PERL_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-shadow -Wno-undef -Wno-switch-default $<
-
-$(OUTPUT)scripts/perl/Perf-Trace-Util/Context.o: scripts/perl/Perf-Trace-Util/Context.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) $(PERL_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-nested-externs -Wno-undef -Wno-switch-default $<
-
-$(OUTPUT)util/scripting-engines/trace-event-python.o: util/scripting-engines/trace-event-python.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) $(PYTHON_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-shadow $<
-
-$(OUTPUT)scripts/python/Perf-Trace-Util/Context.o: scripts/python/Perf-Trace-Util/Context.c $(OUTPUT)PERF-CFLAGS
- $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) $(PYTHON_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-nested-externs $<
+$(OUTPUT)%.i: %.S single_dep FORCE
+ $(Q)$(MAKE) -f $(srctree)/tools/build/Makefile.build dir=$(build-dir) $@
$(OUTPUT)perf-%: %.o $(PERFLIBS)
$(QUIET_LINK)$(CC) $(CFLAGS) -o $@ $(LDFLAGS) $(filter %.o,$^) $(LIBS)
$(QUIET_CC)$(CC) -mx32 $(filter -static,$(LDFLAGS)) -Wall -Werror -o $@ perf-read-vdso.c
endif
-$(LIB_OBJS) $(BUILTIN_OBJS): $(LIB_H)
-$(patsubst perf-%,%.o,$(PROGRAMS)): $(LIB_H) $(wildcard */*.h)
+$(patsubst perf-%,%.o,$(PROGRAMS)): $(wildcard */*.h)
-# we compile into subdirectories. if the target directory is not the source directory, they might not exists. So
-# we depend the various files onto their directories.
-DIRECTORY_DEPS = $(LIB_OBJS) $(BUILTIN_OBJS) $(GTK_OBJS)
-DIRECTORY_DEPS += $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)common-cmds.h
-# no need to add flex objects, because they depend on bison ones
-DIRECTORY_DEPS += $(OUTPUT)util/parse-events-bison.c
-DIRECTORY_DEPS += $(OUTPUT)util/pmu-bison.c
+LIBPERF_IN := $(OUTPUT)libperf-in.o
-OUTPUT_DIRECTORIES := $(sort $(dir $(DIRECTORY_DEPS)))
+$(LIBPERF_IN): FORCE
+ $(Q)$(MAKE) $(build)=libperf
-$(DIRECTORY_DEPS): | $(OUTPUT_DIRECTORIES)
-# In the second step, we make a rule to actually create these directories
-$(OUTPUT_DIRECTORIES):
- $(QUIET_MKDIR)$(MKDIR) -p $@ 2>/dev/null
+$(LIB_FILE): $(LIBPERF_IN)
+ $(QUIET_AR)$(RM) $@ && $(AR) rcs $@ $(LIBPERF_IN) $(LIB_OBJS)
-$(LIB_FILE): $(LIB_OBJS)
- $(QUIET_AR)$(RM) $@ && $(AR) rcs $@ $(LIB_OBJS)
-
-# libtraceevent.a
-TE_SOURCES = $(wildcard $(TRACE_EVENT_DIR)*.[ch])
-
-LIBTRACEEVENT_FLAGS = $(QUIET_SUBDIR1) O=$(OUTPUT)
-LIBTRACEEVENT_FLAGS += CFLAGS="-g -Wall $(EXTRA_CFLAGS)"
LIBTRACEEVENT_FLAGS += plugin_dir=$(plugindir_SQ)
-$(LIBTRACEEVENT): $(TE_SOURCES) $(OUTPUT)PERF-CFLAGS
- $(QUIET_SUBDIR0)$(TRACE_EVENT_DIR) $(LIBTRACEEVENT_FLAGS) libtraceevent.a plugins
+$(LIBTRACEEVENT): FORCE
+ $(Q)$(MAKE) -C $(TRACE_EVENT_DIR) $(LIBTRACEEVENT_FLAGS) O=$(OUTPUT) $(OUTPUT)libtraceevent.a plugins
$(LIBTRACEEVENT)-clean:
$(call QUIET_CLEAN, libtraceevent)
- @$(MAKE) -C $(TRACE_EVENT_DIR) O=$(OUTPUT) clean >/dev/null
+ $(Q)$(MAKE) -C $(TRACE_EVENT_DIR) O=$(OUTPUT) clean >/dev/null
install-traceevent-plugins: $(LIBTRACEEVENT)
- $(QUIET_SUBDIR0)$(TRACE_EVENT_DIR) $(LIBTRACEEVENT_FLAGS) install_plugins
+ $(Q)$(MAKE) -C $(TRACE_EVENT_DIR) $(LIBTRACEEVENT_FLAGS) O=$(OUTPUT) install_plugins
-LIBAPIKFS_SOURCES = $(wildcard $(LIB_PATH)fs/*.[ch] $(LIB_PATH)fd/*.[ch])
-
-# if subdir is set, we've been called from above so target has been built
-# already
-$(LIBAPIKFS): $(LIBAPIKFS_SOURCES)
-ifeq ($(subdir),)
- $(QUIET_SUBDIR0)$(LIB_DIR) $(QUIET_SUBDIR1) O=$(OUTPUT) libapikfs.a
-endif
+$(LIBAPI): FORCE
+ $(Q)$(MAKE) -C $(LIB_DIR) O=$(OUTPUT) $(OUTPUT)libapi.a
-$(LIBAPIKFS)-clean:
-ifeq ($(subdir),)
- $(call QUIET_CLEAN, libapikfs)
- @$(MAKE) -C $(LIB_DIR) O=$(OUTPUT) clean >/dev/null
-endif
+$(LIBAPI)-clean:
+ $(call QUIET_CLEAN, libapi)
+ $(Q)$(MAKE) -C $(LIB_DIR) O=$(OUTPUT) clean >/dev/null
help:
@echo 'Perf make targets:'
$(QUIET_GEN)$(RM) cscope*; \
$(FIND) $(TAG_FOLDERS) -name '*.[hcS]' -print | xargs cscope -b $(TAG_FILES)
-### Detect prefix changes
-TRACK_CFLAGS = $(subst ','\'',$(CFLAGS)):\
- $(bindir_SQ):$(perfexecdir_SQ):$(template_dir_SQ):$(prefix_SQ):$(plugindir_SQ)
-
-$(OUTPUT)PERF-CFLAGS: .FORCE-PERF-CFLAGS
- @FLAGS='$(TRACK_CFLAGS)'; \
- if test x"$$FLAGS" != x"`cat $(OUTPUT)PERF-CFLAGS 2>/dev/null`" ; then \
- echo 1>&2 " FLAGS: * new build flags or prefix"; \
- echo "$$FLAGS" >$(OUTPUT)PERF-CFLAGS; \
- fi
-
### Testing rules
# GNU make supports exporting all variables by "export" without parameters.
#
config-clean:
$(call QUIET_CLEAN, config)
- @$(MAKE) -C config/feature-checks clean >/dev/null
+ $(Q)$(MAKE) -C $(srctree)/tools/build/feature/ clean >/dev/null
-clean: $(LIBTRACEEVENT)-clean $(LIBAPIKFS)-clean config-clean
- $(call QUIET_CLEAN, core-objs) $(RM) $(LIB_OBJS) $(BUILTIN_OBJS) $(LIB_FILE) $(OUTPUT)perf-archive $(OUTPUT)perf-with-kcore $(OUTPUT)perf.o $(LANG_BINDINGS) $(GTK_OBJS)
+clean: $(LIBTRACEEVENT)-clean $(LIBAPI)-clean config-clean
+ $(call QUIET_CLEAN, core-objs) $(RM) $(LIB_FILE) $(OUTPUT)perf-archive $(OUTPUT)perf-with-kcore $(LANG_BINDINGS)
+ $(Q)find . -name '*.o' -delete -o -name '\.*.cmd' -delete -o -name '\.*.d' -delete
+ $(Q)$(RM) .config-detected
$(call QUIET_CLEAN, core-progs) $(RM) $(ALL_PROGRAMS) perf perf-read-vdso32 perf-read-vdsox32
- $(call QUIET_CLEAN, core-gen) $(RM) *.spec *.pyc *.pyo */*.pyc */*.pyo $(OUTPUT)common-cmds.h TAGS tags cscope* $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)PERF-CFLAGS $(OUTPUT)PERF-FEATURES $(OUTPUT)util/*-bison* $(OUTPUT)util/*-flex*
+ $(call QUIET_CLEAN, core-gen) $(RM) *.spec *.pyc *.pyo */*.pyc */*.pyo $(OUTPUT)common-cmds.h TAGS tags cscope* $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)FEATURE-DUMP $(OUTPUT)util/*-bison* $(OUTPUT)util/*-flex*
$(QUIET_SUBDIR0)Documentation $(QUIET_SUBDIR1) clean
$(python-clean)
GIT-HEAD-PHONY =
endif
+FORCE:
+
.PHONY: all install clean config-clean strip install-gtk
.PHONY: shell_compatibility_test please_set_SHELL_PATH_to_a_more_modern_shell
-.PHONY: $(GIT-HEAD-PHONY) TAGS tags cscope .FORCE-PERF-CFLAGS
+.PHONY: $(GIT-HEAD-PHONY) TAGS tags cscope FORCE single_dep
--- /dev/null
+libperf-y += common.o
+libperf-y += $(ARCH)/
--- /dev/null
+libperf-y += util/
+libperf-$(CONFIG_DWARF_UNWIND) += tests/
ifndef NO_DWARF
PERF_HAVE_DWARF_REGS := 1
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o
-endif
-ifndef NO_LIBUNWIND
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/unwind-libunwind.o
-endif
-ifndef NO_LIBDW_DWARF_UNWIND
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/unwind-libdw.o
-endif
-ifndef NO_DWARF_UNWIND
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/tests/regs_load.o
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/tests/dwarf-unwind.o
endif
--- /dev/null
+libperf-y += regs_load.o
+libperf-y += dwarf-unwind.o
--- /dev/null
+libperf-$(CONFIG_DWARF) += dwarf-regs.o
+
+libperf-$(CONFIG_LIBUNWIND) += unwind-libunwind.o
+libperf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o
--- /dev/null
+libperf-y += util/
ifndef NO_DWARF
PERF_HAVE_DWARF_REGS := 1
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o
-endif
-ifndef NO_LIBUNWIND
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/unwind-libunwind.o
endif
--- /dev/null
+libperf-$(CONFIG_DWARF) += dwarf-regs.o
+libperf-$(CONFIG_LIBUNWIND) += unwind-libunwind.o
--- /dev/null
+libperf-y += util/
ifndef NO_DWARF
PERF_HAVE_DWARF_REGS := 1
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/skip-callchain-idx.o
endif
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/header.o
--- /dev/null
+libperf-y += header.o
+
+libperf-$(CONFIG_DWARF) += dwarf-regs.o
+libperf-$(CONFIG_DWARF) += skip-callchain-idx.o
--- /dev/null
+libperf-y += util/
ifndef NO_DWARF
PERF_HAVE_DWARF_REGS := 1
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o
endif
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/header.o
HAVE_KVM_STAT_SUPPORT := 1
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/kvm-stat.o
--- /dev/null
+libperf-y += header.o
+libperf-y += kvm-stat.o
+
+libperf-$(CONFIG_DWARF) += dwarf-regs.o
--- /dev/null
+libperf-y += util/
ifndef NO_DWARF
PERF_HAVE_DWARF_REGS := 1
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o
endif
--- /dev/null
+libperf-$(CONFIG_DWARF) += dwarf-regs.o
--- /dev/null
+libperf-y += util/
ifndef NO_DWARF
PERF_HAVE_DWARF_REGS := 1
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o
endif
--- /dev/null
+libperf-$(CONFIG_DWARF) += dwarf-regs.o
--- /dev/null
+libperf-y += util/
+libperf-$(CONFIG_DWARF_UNWIND) += tests/
ifndef NO_DWARF
PERF_HAVE_DWARF_REGS := 1
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o
endif
-ifndef NO_LIBUNWIND
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/unwind-libunwind.o
-endif
-ifndef NO_LIBDW_DWARF_UNWIND
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/unwind-libdw.o
-endif
-ifndef NO_DWARF_UNWIND
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/tests/regs_load.o
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/tests/dwarf-unwind.o
-endif
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/header.o
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/tsc.o
-LIB_H += arch/$(ARCH)/util/tsc.h
HAVE_KVM_STAT_SUPPORT := 1
-LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/kvm-stat.o
--- /dev/null
+libperf-y += regs_load.o
+libperf-y += dwarf-unwind.o
--- /dev/null
+libperf-y += header.o
+libperf-y += tsc.o
+libperf-y += kvm-stat.o
+
+libperf-$(CONFIG_DWARF) += dwarf-regs.o
+
+libperf-$(CONFIG_LIBUNWIND) += unwind-libunwind.o
+libperf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o
--- /dev/null
+perf-y += sched-messaging.o
+perf-y += sched-pipe.o
+perf-y += mem-memcpy.o
+perf-y += futex-hash.o
+perf-y += futex-wake.o
+perf-y += futex-requeue.o
+
+perf-$(CONFIG_X86_64) += mem-memcpy-x86-64-asm.o
+perf-$(CONFIG_X86_64) += mem-memset-x86-64-asm.o
+
+perf-$(CONFIG_NUMA) += numa.o
-MEMCPY_FN(__memcpy,
+MEMCPY_FN(memcpy_orig,
"x86-64-unrolled",
"unrolled memcpy() in arch/x86/lib/memcpy_64.S")
-MEMCPY_FN(memcpy_c,
+MEMCPY_FN(__memcpy,
"x86-64-movsq",
"movsq-based memcpy() in arch/x86/lib/memcpy_64.S")
-MEMCPY_FN(memcpy_c_e,
+MEMCPY_FN(memcpy_erms,
"x86-64-movsb",
"movsb-based memcpy() in arch/x86/lib/memcpy_64.S")
#define memcpy MEMCPY /* don't hide glibc's memcpy() */
#define altinstr_replacement text
#define globl p2align 4; .globl
-#define Lmemcpy_c globl memcpy_c; memcpy_c
-#define Lmemcpy_c_e globl memcpy_c_e; memcpy_c_e
#include "../../../arch/x86/lib/memcpy_64.S"
/*
* We need to provide note.GNU-stack section, saying that we want
"Specify length of memory to copy. "
"Available units: B, KB, MB, GB and TB (upper and lower)"),
OPT_STRING('r', "routine", &routine, "default",
- "Specify routine to copy"),
+ "Specify routine to copy, \"all\" runs all available routines"),
OPT_INTEGER('i', "iterations", &iterations,
"repeat memcpy() invocation this number of times"),
OPT_BOOLEAN('c', "cycle", &use_cycle,
const char *const *usage;
};
-static int bench_mem_common(int argc, const char **argv,
- const char *prefix __maybe_unused,
- struct bench_mem_info *info)
+static void __bench_mem_routine(struct bench_mem_info *info, int r_idx, size_t len, double totallen)
{
- int i;
- size_t len;
- double totallen;
+ const struct routine *r = &info->routines[r_idx];
double result_bps[2];
u64 result_cycle[2];
- argc = parse_options(argc, argv, options,
- info->usage, 0);
-
- if (no_prefault && only_prefault) {
- fprintf(stderr, "Invalid options: -o and -n are mutually exclusive\n");
- return 1;
- }
-
- if (use_cycle)
- init_cycle();
-
- len = (size_t)perf_atoll((char *)length_str);
- totallen = (double)len * iterations;
-
result_cycle[0] = result_cycle[1] = 0ULL;
result_bps[0] = result_bps[1] = 0.0;
- if ((s64)len <= 0) {
- fprintf(stderr, "Invalid length:%s\n", length_str);
- return 1;
- }
-
- /* same to without specifying either of prefault and no-prefault */
- if (only_prefault && no_prefault)
- only_prefault = no_prefault = false;
-
- for (i = 0; info->routines[i].name; i++) {
- if (!strcmp(info->routines[i].name, routine))
- break;
- }
- if (!info->routines[i].name) {
- printf("Unknown routine:%s\n", routine);
- printf("Available routines...\n");
- for (i = 0; info->routines[i].name; i++) {
- printf("\t%s ... %s\n",
- info->routines[i].name, info->routines[i].desc);
- }
- return 1;
- }
+ printf("Routine %s (%s)\n", r->name, r->desc);
if (bench_format == BENCH_FORMAT_DEFAULT)
printf("# Copying %s Bytes ...\n\n", length_str);
if (!only_prefault && !no_prefault) {
/* show both of results */
if (use_cycle) {
- result_cycle[0] =
- info->do_cycle(&info->routines[i], len, false);
- result_cycle[1] =
- info->do_cycle(&info->routines[i], len, true);
+ result_cycle[0] = info->do_cycle(r, len, false);
+ result_cycle[1] = info->do_cycle(r, len, true);
} else {
- result_bps[0] =
- info->do_gettimeofday(&info->routines[i],
- len, false);
- result_bps[1] =
- info->do_gettimeofday(&info->routines[i],
- len, true);
+ result_bps[0] = info->do_gettimeofday(r, len, false);
+ result_bps[1] = info->do_gettimeofday(r, len, true);
}
} else {
- if (use_cycle) {
- result_cycle[pf] =
- info->do_cycle(&info->routines[i],
- len, only_prefault);
- } else {
- result_bps[pf] =
- info->do_gettimeofday(&info->routines[i],
- len, only_prefault);
- }
+ if (use_cycle)
+ result_cycle[pf] = info->do_cycle(r, len, only_prefault);
+ else
+ result_bps[pf] = info->do_gettimeofday(r, len, only_prefault);
}
switch (bench_format) {
die("unknown format: %d\n", bench_format);
break;
}
+}
+
+static int bench_mem_common(int argc, const char **argv,
+ const char *prefix __maybe_unused,
+ struct bench_mem_info *info)
+{
+ int i;
+ size_t len;
+ double totallen;
+
+ argc = parse_options(argc, argv, options,
+ info->usage, 0);
+
+ if (no_prefault && only_prefault) {
+ fprintf(stderr, "Invalid options: -o and -n are mutually exclusive\n");
+ return 1;
+ }
+
+ if (use_cycle)
+ init_cycle();
+
+ len = (size_t)perf_atoll((char *)length_str);
+ totallen = (double)len * iterations;
+
+ if ((s64)len <= 0) {
+ fprintf(stderr, "Invalid length:%s\n", length_str);
+ return 1;
+ }
+
+ /* same to without specifying either of prefault and no-prefault */
+ if (only_prefault && no_prefault)
+ only_prefault = no_prefault = false;
+
+ if (!strncmp(routine, "all", 3)) {
+ for (i = 0; info->routines[i].name; i++)
+ __bench_mem_routine(info, i, len, totallen);
+ return 0;
+ }
+
+ for (i = 0; info->routines[i].name; i++) {
+ if (!strcmp(info->routines[i].name, routine))
+ break;
+ }
+ if (!info->routines[i].name) {
+ printf("Unknown routine:%s\n", routine);
+ printf("Available routines...\n");
+ for (i = 0; info->routines[i].name; i++) {
+ printf("\t%s ... %s\n",
+ info->routines[i].name, info->routines[i].desc);
+ }
+ return 1;
+ }
+
+ __bench_mem_routine(info, i, len, totallen);
return 0;
}
-MEMSET_FN(__memset,
+MEMSET_FN(memset_orig,
"x86-64-unrolled",
"unrolled memset() in arch/x86/lib/memset_64.S")
-MEMSET_FN(memset_c,
+MEMSET_FN(__memset,
"x86-64-stosq",
"movsq-based memset() in arch/x86/lib/memset_64.S")
-MEMSET_FN(memset_c_e,
+MEMSET_FN(memset_erms,
"x86-64-stosb",
"movsb-based memset() in arch/x86/lib/memset_64.S")
#define memset MEMSET /* don't hide glibc's memset() */
#define altinstr_replacement text
#define globl p2align 4; .globl
-#define Lmemset_c globl memset_c; memset_c
-#define Lmemset_c_e globl memset_c_e; memset_c_e
#include "../../../arch/x86/lib/memset_64.S"
/*
goto out;
}
- ret = perf_session__process_events(session, &ann->tool);
+ ret = perf_session__process_events(session);
if (ret)
goto out;
return ret;
}
-static int build_id_cache__add_kcore(const char *filename, const char *debugdir,
- bool force)
+static int build_id_cache__add_kcore(const char *filename, bool force)
{
char dir[32], sbuildid[BUILD_ID_SIZE * 2 + 1];
char from_dir[PATH_MAX], to_dir[PATH_MAX];
return -1;
scnprintf(to_dir, sizeof(to_dir), "%s/[kernel.kcore]/%s",
- debugdir, sbuildid);
+ buildid_dir, sbuildid);
if (!force &&
!build_id_cache__kcore_existing(from_dir, to_dir, sizeof(to_dir))) {
return -1;
scnprintf(to_dir, sizeof(to_dir), "%s/[kernel.kcore]/%s/%s",
- debugdir, sbuildid, dir);
+ buildid_dir, sbuildid, dir);
if (mkdir_p(to_dir, 0755))
return -1;
return 0;
}
-static int build_id_cache__add_file(const char *filename, const char *debugdir)
+static int build_id_cache__add_file(const char *filename)
{
char sbuild_id[BUILD_ID_SIZE * 2 + 1];
u8 build_id[BUILD_ID_SIZE];
}
build_id__sprintf(build_id, sizeof(build_id), sbuild_id);
- err = build_id_cache__add_s(sbuild_id, debugdir, filename,
+ err = build_id_cache__add_s(sbuild_id, filename,
false, false);
- if (verbose)
- pr_info("Adding %s %s: %s\n", sbuild_id, filename,
- err ? "FAIL" : "Ok");
+ pr_debug("Adding %s %s: %s\n", sbuild_id, filename,
+ err ? "FAIL" : "Ok");
return err;
}
-static int build_id_cache__remove_file(const char *filename,
- const char *debugdir)
+static int build_id_cache__remove_file(const char *filename)
{
u8 build_id[BUILD_ID_SIZE];
char sbuild_id[BUILD_ID_SIZE * 2 + 1];
}
build_id__sprintf(build_id, sizeof(build_id), sbuild_id);
- err = build_id_cache__remove_s(sbuild_id, debugdir);
- if (verbose)
- pr_info("Removing %s %s: %s\n", sbuild_id, filename,
- err ? "FAIL" : "Ok");
+ err = build_id_cache__remove_s(sbuild_id);
+ pr_debug("Removing %s %s: %s\n", sbuild_id, filename,
+ err ? "FAIL" : "Ok");
+
+ return err;
+}
+
+static int build_id_cache__purge_path(const char *pathname)
+{
+ struct strlist *list;
+ struct str_node *pos;
+ int err;
+
+ err = build_id_cache__list_build_ids(pathname, &list);
+ if (err)
+ goto out;
+
+ strlist__for_each(pos, list) {
+ err = build_id_cache__remove_s(pos->s);
+ pr_debug("Removing %s %s: %s\n", pos->s, pathname,
+ err ? "FAIL" : "Ok");
+ if (err)
+ break;
+ }
+ strlist__delete(list);
+
+out:
+ pr_debug("Purging %s: %s\n", pathname, err ? "FAIL" : "Ok");
return err;
}
return 0;
}
-static int build_id_cache__update_file(const char *filename,
- const char *debugdir)
+static int build_id_cache__update_file(const char *filename)
{
u8 build_id[BUILD_ID_SIZE];
char sbuild_id[BUILD_ID_SIZE * 2 + 1];
- int err;
+ int err = 0;
if (filename__read_build_id(filename, &build_id, sizeof(build_id)) < 0) {
pr_debug("Couldn't read a build-id in %s\n", filename);
}
build_id__sprintf(build_id, sizeof(build_id), sbuild_id);
- err = build_id_cache__remove_s(sbuild_id, debugdir);
- if (!err) {
- err = build_id_cache__add_s(sbuild_id, debugdir, filename,
- false, false);
- }
- if (verbose)
- pr_info("Updating %s %s: %s\n", sbuild_id, filename,
- err ? "FAIL" : "Ok");
+ if (build_id_cache__cached(sbuild_id))
+ err = build_id_cache__remove_s(sbuild_id);
+
+ if (!err)
+ err = build_id_cache__add_s(sbuild_id, filename, false, false);
+
+ pr_debug("Updating %s %s: %s\n", sbuild_id, filename,
+ err ? "FAIL" : "Ok");
return err;
}
bool force = false;
char const *add_name_list_str = NULL,
*remove_name_list_str = NULL,
+ *purge_name_list_str = NULL,
*missing_filename = NULL,
*update_name_list_str = NULL,
*kcore_filename = NULL;
"file", "kcore file to add"),
OPT_STRING('r', "remove", &remove_name_list_str, "file list",
"file(s) to remove"),
+ OPT_STRING('p', "purge", &purge_name_list_str, "path list",
+ "path(s) to remove (remove old caches too)"),
OPT_STRING('M', "missing", &missing_filename, "file",
"to find missing build ids in the cache"),
OPT_BOOLEAN('f', "force", &force, "don't complain, do it"),
argc = parse_options(argc, argv, buildid_cache_options,
buildid_cache_usage, 0);
+ if (argc || (!add_name_list_str && !kcore_filename &&
+ !remove_name_list_str && !purge_name_list_str &&
+ !missing_filename && !update_name_list_str))
+ usage_with_options(buildid_cache_usage, buildid_cache_options);
+
if (missing_filename) {
file.path = missing_filename;
file.force = force;
list = strlist__new(true, add_name_list_str);
if (list) {
strlist__for_each(pos, list)
- if (build_id_cache__add_file(pos->s, buildid_dir)) {
+ if (build_id_cache__add_file(pos->s)) {
if (errno == EEXIST) {
pr_debug("%s already in the cache\n",
pos->s);
list = strlist__new(true, remove_name_list_str);
if (list) {
strlist__for_each(pos, list)
- if (build_id_cache__remove_file(pos->s, buildid_dir)) {
+ if (build_id_cache__remove_file(pos->s)) {
+ if (errno == ENOENT) {
+ pr_debug("%s wasn't in the cache\n",
+ pos->s);
+ continue;
+ }
+ pr_warning("Couldn't remove %s: %s\n",
+ pos->s, strerror_r(errno, sbuf, sizeof(sbuf)));
+ }
+
+ strlist__delete(list);
+ }
+ }
+
+ if (purge_name_list_str) {
+ list = strlist__new(true, purge_name_list_str);
+ if (list) {
+ strlist__for_each(pos, list)
+ if (build_id_cache__purge_path(pos->s)) {
if (errno == ENOENT) {
pr_debug("%s wasn't in the cache\n",
pos->s);
list = strlist__new(true, update_name_list_str);
if (list) {
strlist__for_each(pos, list)
- if (build_id_cache__update_file(pos->s, buildid_dir)) {
+ if (build_id_cache__update_file(pos->s)) {
if (errno == ENOENT) {
pr_debug("%s wasn't in the cache\n",
pos->s);
}
}
- if (kcore_filename &&
- build_id_cache__add_kcore(kcore_filename, buildid_dir, force))
+ if (kcore_filename && build_id_cache__add_kcore(kcore_filename, force))
pr_warning("Couldn't add %s\n", kcore_filename);
out:
* the record stream. Buildids are stored as RECORD_HEADER_BUILD_ID
*/
if (with_hits || perf_data_file__is_pipe(&file))
- perf_session__process_events(session, &build_id__mark_dso_hit_ops);
+ perf_session__process_events(session);
perf_session__fprintf_dsos_buildid(session, stdout, dso__skip_buildid, with_hits);
perf_session__delete(session);
--- /dev/null
+#include <linux/compiler.h>
+#include "builtin.h"
+#include "perf.h"
+#include "debug.h"
+#include "parse-options.h"
+#include "data-convert-bt.h"
+
+typedef int (*data_cmd_fn_t)(int argc, const char **argv, const char *prefix);
+
+struct data_cmd {
+ const char *name;
+ const char *summary;
+ data_cmd_fn_t fn;
+};
+
+static struct data_cmd data_cmds[];
+
+#define for_each_cmd(cmd) \
+ for (cmd = data_cmds; cmd && cmd->name; cmd++)
+
+static const struct option data_options[] = {
+ OPT_END()
+};
+
+static const char * const data_subcommands[] = { "convert", NULL };
+
+static const char *data_usage[] = {
+ "perf data [<common options>] <command> [<options>]",
+ NULL
+};
+
+static void print_usage(void)
+{
+ struct data_cmd *cmd;
+
+ printf("Usage:\n");
+ printf("\t%s\n\n", data_usage[0]);
+ printf("\tAvailable commands:\n");
+
+ for_each_cmd(cmd) {
+ printf("\t %s\t- %s\n", cmd->name, cmd->summary);
+ }
+
+ printf("\n");
+}
+
+static const char * const data_convert_usage[] = {
+ "perf data convert [<options>]",
+ NULL
+};
+
+static int cmd_data_convert(int argc, const char **argv,
+ const char *prefix __maybe_unused)
+{
+ const char *to_ctf = NULL;
+ bool force = false;
+ const struct option options[] = {
+ OPT_INCR('v', "verbose", &verbose, "be more verbose"),
+ OPT_STRING('i', "input", &input_name, "file", "input file name"),
+#ifdef HAVE_LIBBABELTRACE_SUPPORT
+ OPT_STRING(0, "to-ctf", &to_ctf, NULL, "Convert to CTF format"),
+#endif
+ OPT_BOOLEAN('f', "force", &force, "don't complain, do it"),
+ OPT_END()
+ };
+
+#ifndef HAVE_LIBBABELTRACE_SUPPORT
+ pr_err("No conversion support compiled in.\n");
+ return -1;
+#endif
+
+ argc = parse_options(argc, argv, options,
+ data_convert_usage, 0);
+ if (argc) {
+ usage_with_options(data_convert_usage, options);
+ return -1;
+ }
+
+ if (to_ctf) {
+#ifdef HAVE_LIBBABELTRACE_SUPPORT
+ return bt_convert__perf2ctf(input_name, to_ctf, force);
+#else
+ pr_err("The libbabeltrace support is not compiled in.\n");
+ return -1;
+#endif
+ }
+
+ return 0;
+}
+
+static struct data_cmd data_cmds[] = {
+ { "convert", "converts data file between formats", cmd_data_convert },
+ { .name = NULL, },
+};
+
+int cmd_data(int argc, const char **argv, const char *prefix)
+{
+ struct data_cmd *cmd;
+ const char *cmdstr;
+
+ /* No command specified. */
+ if (argc < 2)
+ goto usage;
+
+ argc = parse_options_subcommand(argc, argv, data_options, data_subcommands, data_usage,
+ PARSE_OPT_STOP_AT_NON_OPTION);
+ if (argc < 1)
+ goto usage;
+
+ cmdstr = argv[0];
+
+ for_each_cmd(cmd) {
+ if (strcmp(cmd->name, cmdstr))
+ continue;
+
+ return cmd->fn(argc, argv, prefix);
+ }
+
+ pr_err("Unknown command: %s\n", cmdstr);
+usage:
+ print_usage();
+ return -1;
+}
goto out_delete;
}
- ret = perf_session__process_events(d->session, &tool);
+ ret = perf_session__process_events(d->session);
if (ret) {
pr_err("Failed to process %s\n", d->file.path);
goto out_delete;
OPT_BOOLEAN('D', "dump-raw-trace", &dump_trace,
"dump raw trace in ASCII"),
OPT_BOOLEAN('f', "force", &force, "don't complain, do it"),
+ OPT_STRING(0, "kallsyms", &symbol_conf.kallsyms_name,
+ "file", "kallsyms pathname"),
OPT_BOOLEAN('m', "modules", &symbol_conf.use_modules,
"load module symbols - WARNING: use only with -k and LIVE kernel"),
OPT_STRING('d', "dsos", &symbol_conf.dso_list_str, "dso[,dso...]",
OPT_STRING('s', "sort", &sort_order, "key[,key2...]",
"sort by key(s): pid, comm, dso, symbol, parent, cpu, srcline, ..."
" Please refer the man page for the complete list."),
- OPT_STRING('t', "field-separator", &symbol_conf.field_sep, "separator",
+ OPT_STRING_NOEMPTY('t', "field-separator", &symbol_conf.field_sep, "separator",
"separator for columns, no spaces will be added between "
"columns '.' is reserved."),
OPT_STRING(0, "symfs", &symbol_conf.symfs, "directory",
struct perf_data_file file = {
.path = file_name,
.mode = PERF_DATA_MODE_READ,
+ .force = details->force,
};
session = perf_session__new(&file, 0, NULL);
"Show all event attr details"),
OPT_BOOLEAN('g', "group", &details.event_group,
"Show event group information"),
+ OPT_BOOLEAN('f', "force", &details.force, "don't complain, do it"),
OPT_END()
};
const char * const evlist_usage[] = {
HELP_FORMAT_INFO),
OPT_END(),
};
- const char * const builtin_help_usage[] = {
+ const char * const builtin_help_subcommands[] = {
+ "buildid-cache", "buildid-list", "diff", "evlist", "help", "list",
+ "record", "report", "bench", "stat", "timechart", "top", "annotate",
+ "script", "sched", "kmem", "lock", "kvm", "test", "inject", "mem", "data",
+#ifdef HAVE_LIBELF_SUPPORT
+ "probe",
+#endif
+#ifdef HAVE_LIBAUDIT_SUPPORT
+ "trace",
+#endif
+ NULL };
+ const char *builtin_help_usage[] = {
"perf help [--all] [--man|--web|--info] [command]",
NULL
};
perf_config(perf_help_config, &help_format);
- argc = parse_options(argc, argv, builtin_help_options,
- builtin_help_usage, 0);
+ argc = parse_options_subcommand(argc, argv, builtin_help_options,
+ builtin_help_subcommands, builtin_help_usage, 0);
if (show_all) {
printf("\n usage: %s\n\n", perf_usage_string);
return 0;
}
+static int perf_event__repipe_oe_synth(struct perf_tool *tool,
+ union perf_event *event,
+ struct ordered_events *oe __maybe_unused)
+{
+ return perf_event__repipe_synth(tool, event);
+}
+
static int perf_event__repipe_op2_synth(struct perf_tool *tool,
union perf_event *event,
struct perf_session *session
} else if (inject->sched_stat) {
struct perf_evsel *evsel;
- inject->tool.ordered_events = true;
-
evlist__for_each(session->evlist, evsel) {
const char *name = perf_evsel__name(evsel);
if (!file_out->is_pipe)
lseek(fd, session->header.data_offset, SEEK_SET);
- ret = perf_session__process_events(session, &inject->tool);
+ ret = perf_session__process_events(session);
if (!file_out->is_pipe) {
if (inject->build_ids)
.unthrottle = perf_event__repipe,
.attr = perf_event__repipe_attr,
.tracing_data = perf_event__repipe_op2_synth,
- .finished_round = perf_event__repipe_op2_synth,
+ .finished_round = perf_event__repipe_oe_synth,
.build_id = perf_event__repipe_op2_synth,
.id_index = perf_event__repipe_op2_synth,
},
"be more verbose (show build ids, etc)"),
OPT_STRING(0, "kallsyms", &symbol_conf.kallsyms_name, "file",
"kallsyms pathname"),
+ OPT_BOOLEAN('f', "force", &file.force, "don't complain, do it"),
OPT_END()
};
const char * const inject_usage[] = {
return -1;
}
+ inject.tool.ordered_events = inject.sched_stat;
+
file.path = inject.input_name;
inject.session = perf_session__new(&file, true, &inject.tool);
if (inject.session == NULL)
#include <linux/rbtree.h>
#include <linux/string.h>
+#include <locale.h>
struct alloc_stat;
typedef int (*sort_fn_t)(struct alloc_stat *, struct alloc_stat *);
struct rb_node *next;
struct machine *machine = &session->machines.host;
- printf("%.102s\n", graph_dotted_line);
+ printf("%.105s\n", graph_dotted_line);
printf(" %-34s |", is_caller ? "Callsite": "Alloc Ptr");
printf(" Total_alloc/Per | Total_req/Per | Hit | Ping-pong | Frag\n");
- printf("%.102s\n", graph_dotted_line);
+ printf("%.105s\n", graph_dotted_line);
next = rb_first(root);
snprintf(buf, sizeof(buf), "%#" PRIx64 "", addr);
printf(" %-34s |", buf);
- printf(" %9llu/%-5lu | %9llu/%-5lu | %8lu | %8lu | %6.3f%%\n",
+ printf(" %9llu/%-5lu | %9llu/%-5lu | %8lu | %9lu | %6.3f%%\n",
(unsigned long long)data->bytes_alloc,
(unsigned long)data->bytes_alloc / data->hit,
(unsigned long long)data->bytes_req,
}
if (n_lines == -1)
- printf(" ... | ... | ... | ... | ... | ... \n");
+ printf(" ... | ... | ... | ... | ... | ... \n");
- printf("%.102s\n", graph_dotted_line);
+ printf("%.105s\n", graph_dotted_line);
}
static void print_summary(void)
{
printf("\nSUMMARY\n=======\n");
- printf("Total bytes requested: %lu\n", total_requested);
- printf("Total bytes allocated: %lu\n", total_allocated);
- printf("Total bytes wasted on internal fragmentation: %lu\n",
+ printf("Total bytes requested: %'lu\n", total_requested);
+ printf("Total bytes allocated: %'lu\n", total_allocated);
+ printf("Total bytes wasted on internal fragmentation: %'lu\n",
total_allocated - total_requested);
printf("Internal fragmentation: %f%%\n",
fragmentation(total_requested, total_allocated));
- printf("Cross CPU allocations: %lu/%lu\n", nr_cross_allocs, nr_allocs);
+ printf("Cross CPU allocations: %'lu/%'lu\n", nr_cross_allocs, nr_allocs);
}
static void print_result(struct perf_session *session)
}
setup_pager();
- err = perf_session__process_events(session, &perf_kmem);
+ err = perf_session__process_events(session);
if (err != 0)
goto out;
sort_result();
{
char *tok;
char *str = strdup(arg);
+ char *pos = str;
if (!str) {
pr_err("%s: strdup failed\n", __func__);
}
while (true) {
- tok = strsep(&str, ",");
+ tok = strsep(&pos, ",");
if (!tok)
break;
if (sort_dimension__add(tok, sort_list) < 0) {
int cmd_kmem(int argc, const char **argv, const char *prefix __maybe_unused)
{
const char * const default_sort_order = "frag,hit,bytes";
+ struct perf_data_file file = {
+ .mode = PERF_DATA_MODE_READ,
+ };
const struct option kmem_options[] = {
OPT_STRING('i', "input", &input_name, "file", "input file name"),
+ OPT_INCR('v', "verbose", &verbose,
+ "be more verbose (show symbol address, etc)"),
OPT_CALLBACK_NOOPT(0, "caller", NULL, NULL,
"show per-callsite statistics", parse_caller_opt),
OPT_CALLBACK_NOOPT(0, "alloc", NULL, NULL,
parse_sort_opt),
OPT_CALLBACK('l', "line", NULL, "num", "show n lines", parse_line_opt),
OPT_BOOLEAN(0, "raw-ip", &raw_ip, "show raw ip instead of symbol"),
+ OPT_BOOLEAN('f', "force", &file.force, "don't complain, do it"),
OPT_END()
};
const char *const kmem_subcommands[] = { "record", "stat", NULL };
NULL
};
struct perf_session *session;
- struct perf_data_file file = {
- .path = input_name,
- .mode = PERF_DATA_MODE_READ,
- };
int ret = -1;
argc = parse_options_subcommand(argc, argv, kmem_options,
return __cmd_record(argc, argv);
}
+ file.path = input_name;
+
session = perf_session__new(&file, false, &perf_kmem);
if (session == NULL)
return -1;
symbol__init(&session->header.env);
if (!strcmp(argv[0], "stat")) {
+ setlocale(LC_ALL, "");
+
if (cpu__setup_cpunode_map())
goto out_delete;
#include "util/stat.h"
#include "util/top.h"
#include "util/data.h"
+#include "util/ordered-events.h"
#include <sys/prctl.h>
#ifdef HAVE_TIMERFD_SUPPORT
return -1;
}
- err = perf_session_queue_event(kvm->session, event, &kvm->tool, &sample, 0);
+ err = perf_session__queue_event(kvm->session, event, &sample, 0);
/*
- * FIXME: Here we can't consume the event, as perf_session_queue_event will
+ * FIXME: Here we can't consume the event, as perf_session__queue_event will
* point to it, and it'll get possibly overwritten by the kernel.
*/
perf_evlist__mmap_consume(kvm->evlist, idx);
/* flush queue after each round in which we processed events */
if (ntotal) {
- kvm->session->ordered_events.next_flush = flush_time;
- err = kvm->tool.finished_round(&kvm->tool, NULL, kvm->session);
+ struct ordered_events *oe = &kvm->session->ordered_events;
+
+ oe->next_flush = flush_time;
+ err = ordered_events__flush(oe, OE_FLUSH__ROUND);
if (err) {
if (kvm->lost_events)
pr_info("\nLost events: %" PRIu64 "\n\n",
struct perf_data_file file = {
.path = kvm->file_name,
.mode = PERF_DATA_MODE_READ,
+ .force = kvm->force,
};
kvm->tool = eops;
if (ret < 0)
return ret;
- return perf_session__process_events(kvm->session, &kvm->tool);
+ return perf_session__process_events(kvm->session);
}
static int parse_target_str(struct perf_kvm_stat *kvm)
" time (sort by avg time)"),
OPT_STRING('p', "pid", &kvm->opts.target.pid, "pid",
"analyze events only for given process id(s)"),
+ OPT_BOOLEAN('f', "force", &kvm->force, "don't complain, do it"),
OPT_END()
};
setup_pager();
- if (raw_dump) {
- print_events(NULL, true);
- return 0;
- }
+ if (!raw_dump)
+ printf("\nList of pre-defined events (to be used in -e):\n\n");
if (argc == 0) {
- print_events(NULL, false);
+ print_events(NULL, raw_dump);
return 0;
}
for (i = 0; i < argc; ++i) {
- if (i)
- putchar('\n');
- if (strncmp(argv[i], "tracepoint", 10) == 0)
- print_tracepoint_events(NULL, NULL, false);
+ if (strcmp(argv[i], "tracepoint") == 0)
+ print_tracepoint_events(NULL, NULL, raw_dump);
else if (strcmp(argv[i], "hw") == 0 ||
strcmp(argv[i], "hardware") == 0)
- print_events_type(PERF_TYPE_HARDWARE);
+ print_symbol_events(NULL, PERF_TYPE_HARDWARE,
+ event_symbols_hw, PERF_COUNT_HW_MAX, raw_dump);
else if (strcmp(argv[i], "sw") == 0 ||
strcmp(argv[i], "software") == 0)
- print_events_type(PERF_TYPE_SOFTWARE);
+ print_symbol_events(NULL, PERF_TYPE_SOFTWARE,
+ event_symbols_sw, PERF_COUNT_SW_MAX, raw_dump);
else if (strcmp(argv[i], "cache") == 0 ||
strcmp(argv[i], "hwcache") == 0)
- print_hwcache_events(NULL, false);
+ print_hwcache_events(NULL, raw_dump);
else if (strcmp(argv[i], "pmu") == 0)
- print_pmu_events(NULL, false);
+ print_pmu_events(NULL, raw_dump);
else {
char *sep = strchr(argv[i], ':'), *s;
int sep_idx;
if (sep == NULL) {
- print_events(argv[i], false);
+ print_events(argv[i], raw_dump);
continue;
}
sep_idx = sep - argv[i];
return -1;
s[sep_idx] = '\0';
- print_tracepoint_events(s, s + sep_idx + 1, false);
+ print_tracepoint_events(s, s + sep_idx + 1, raw_dump);
free(s);
}
}
{ "lock:lock_release", perf_evsel__process_lock_release, }, /* CONFIG_LOCKDEP */
};
+static bool force;
+
static int __cmd_report(bool display_info)
{
int err = -EINVAL;
struct perf_data_file file = {
.path = input_name,
.mode = PERF_DATA_MODE_READ,
+ .force = force,
};
session = perf_session__new(&file, false, &eops);
if (select_key())
goto out_delete;
- err = perf_session__process_events(session, &eops);
+ err = perf_session__process_events(session);
if (err)
goto out_delete;
"dump thread list in perf.data"),
OPT_BOOLEAN('m', "map", &info_map,
"map of lock instances (address:name table)"),
+ OPT_BOOLEAN('f', "force", &force, "don't complain, do it"),
OPT_END()
};
const struct option lock_options[] = {
const struct option report_options[] = {
OPT_STRING('k', "key", &sort_key, "acquired",
"key for sorting (acquired / contended / avg_wait / wait_total / wait_max / wait_min)"),
+ OPT_BOOLEAN('f', "force", &force, "don't complain, do it"),
/* TODO: type */
OPT_END()
};
char const *input_name;
bool hide_unresolved;
bool dump_raw;
+ bool force;
int operation;
const char *cpu_list;
DECLARE_BITMAP(cpu_bitmap, MAX_NR_CPUS);
struct perf_data_file file = {
.path = input_name,
.mode = PERF_DATA_MODE_READ,
+ .force = mem->force,
};
int err = -EINVAL;
int ret;
printf("# PID, TID, IP, ADDR, LOCAL WEIGHT, DSRC, SYMBOL\n");
- err = perf_session__process_events(session, &mem->tool);
+ err = perf_session__process_events(session);
if (err)
return err;
"input file name"),
OPT_STRING('C', "cpu", &mem.cpu_list, "cpu",
"list of cpus to profile"),
- OPT_STRING('x', "field-separator", &symbol_conf.field_sep,
+ OPT_STRING_NOEMPTY('x', "field-separator", &symbol_conf.field_sep,
"separator",
"separator for columns, no spaces will be added"
" between columns '.' is reserved."),
+ OPT_BOOLEAN('f', "force", &mem.force, "don't complain, do it"),
OPT_END()
};
const char *const mem_subcommands[] = { "record", "report", NULL };
bool mod_events;
bool uprobes;
bool quiet;
+ bool target_used;
int nevents;
struct perf_probe_event events[MAX_PROBES];
struct strlist *dellist;
}
pev->uprobes = params.uprobes;
+ if (params.target) {
+ pev->target = strdup(params.target);
+ if (!pev->target)
+ return -ENOMEM;
+ params.target_used = true;
+ }
/* Parse a perf-probe command into event */
ret = parse_perf_probe_command(str, pev);
params.target = strdup(ptr);
if (!params.target)
return -ENOMEM;
+ params.target_used = false;
found = 1;
buf = ptr + (strlen(ptr) - 3);
int ret = -ENOENT;
char *tmp;
- if (str && !params.target) {
+ if (str) {
if (!strcmp(opt->long_name, "exec"))
params.uprobes = true;
#ifdef HAVE_DWARF_SUPPORT
if (!tmp)
return -ENOMEM;
}
+ free(params.target);
params.target = tmp;
+ params.target_used = false;
ret = 0;
}
}
if (params.nevents) {
+ /* Ensure the last given target is used */
+ if (params.target && !params.target_used) {
+ pr_warning(" Error: -x/-m must follow the probe definitions.\n");
+ usage_with_options(probe_usage, options);
+ }
+
ret = add_perf_probe_events(params.events, params.nevents,
params.max_probe_points,
- params.target,
params.force_add);
if (ret < 0) {
pr_err_with_code(" Error: Failed to add events.", ret);
static int record__mmap_read(struct record *rec, int idx)
{
struct perf_mmap *md = &rec->evlist->mmap[idx];
- unsigned int head = perf_mmap__read_head(md);
- unsigned int old = md->prev;
+ u64 head = perf_mmap__read_head(md);
+ u64 old = md->prev;
unsigned char *data = md->base + page_size;
unsigned long size;
void *buf;
}
}
- if (perf_evlist__apply_filters(evlist)) {
- error("failed to set filter with %d (%s)\n", errno,
+ if (perf_evlist__apply_filters(evlist, &pos)) {
+ error("failed to set filter \"%s\" on event %s with %d (%s)\n",
+ pos->filter, perf_evsel__name(pos), errno,
strerror_r(errno, msg, sizeof(msg)));
rc = -1;
goto out;
*/
symbol_conf.ignore_vmlinux_buildid = true;
- return perf_session__process_events(session, &rec->tool);
+ return perf_session__process_events(session);
}
static void perf_event__synthesize_guest_os(struct machine *machine, void *data)
signal(SIGINT, sig_handler);
signal(SIGTERM, sig_handler);
- session = perf_session__new(file, false, NULL);
+ session = perf_session__new(file, false, tool);
if (session == NULL) {
pr_err("Perf session creation failed.\n");
return -1;
static void callchain_debug(void)
{
- static const char *str[CALLCHAIN_MAX] = { "NONE", "FP", "DWARF" };
+ static const char *str[CALLCHAIN_MAX] = { "NONE", "FP", "DWARF", "LBR" };
pr_debug("callchain: type %s\n", str[callchain_param.record_mode]);
return perf_default_config(var, value, cb);
}
+struct clockid_map {
+ const char *name;
+ int clockid;
+};
+
+#define CLOCKID_MAP(n, c) \
+ { .name = n, .clockid = (c), }
+
+#define CLOCKID_END { .name = NULL, }
+
+
+/*
+ * Add the missing ones, we need to build on many distros...
+ */
+#ifndef CLOCK_MONOTONIC_RAW
+#define CLOCK_MONOTONIC_RAW 4
+#endif
+#ifndef CLOCK_BOOTTIME
+#define CLOCK_BOOTTIME 7
+#endif
+#ifndef CLOCK_TAI
+#define CLOCK_TAI 11
+#endif
+
+static const struct clockid_map clockids[] = {
+ /* available for all events, NMI safe */
+ CLOCKID_MAP("monotonic", CLOCK_MONOTONIC),
+ CLOCKID_MAP("monotonic_raw", CLOCK_MONOTONIC_RAW),
+
+ /* available for some events */
+ CLOCKID_MAP("realtime", CLOCK_REALTIME),
+ CLOCKID_MAP("boottime", CLOCK_BOOTTIME),
+ CLOCKID_MAP("tai", CLOCK_TAI),
+
+ /* available for the lazy */
+ CLOCKID_MAP("mono", CLOCK_MONOTONIC),
+ CLOCKID_MAP("raw", CLOCK_MONOTONIC_RAW),
+ CLOCKID_MAP("real", CLOCK_REALTIME),
+ CLOCKID_MAP("boot", CLOCK_BOOTTIME),
+
+ CLOCKID_END,
+};
+
+static int parse_clockid(const struct option *opt, const char *str, int unset)
+{
+ struct record_opts *opts = (struct record_opts *)opt->value;
+ const struct clockid_map *cm;
+ const char *ostr = str;
+
+ if (unset) {
+ opts->use_clockid = 0;
+ return 0;
+ }
+
+ /* no arg passed */
+ if (!str)
+ return 0;
+
+ /* no setting it twice */
+ if (opts->use_clockid)
+ return -1;
+
+ opts->use_clockid = true;
+
+ /* if its a number, we're done */
+ if (sscanf(str, "%d", &opts->clockid) == 1)
+ return 0;
+
+ /* allow a "CLOCK_" prefix to the name */
+ if (!strncasecmp(str, "CLOCK_", 6))
+ str += 6;
+
+ for (cm = clockids; cm->name; cm++) {
+ if (!strcasecmp(str, cm->name)) {
+ opts->clockid = cm->clockid;
+ return 0;
+ }
+ }
+
+ opts->use_clockid = false;
+ ui__warning("unknown clockid %s, check man page\n", ostr);
+ return -1;
+}
+
static const char * const __record_usage[] = {
"perf record [<options>] [<command>]",
"perf record [<options>] -- <command> [<options>]",
#define CALLCHAIN_HELP "setup and enables call-graph (stack chain/backtrace) recording: "
#ifdef HAVE_DWARF_UNWIND_SUPPORT
-const char record_callchain_help[] = CALLCHAIN_HELP "fp dwarf";
+const char record_callchain_help[] = CALLCHAIN_HELP "fp dwarf lbr";
#else
-const char record_callchain_help[] = CALLCHAIN_HELP "fp";
+const char record_callchain_help[] = CALLCHAIN_HELP "fp lbr";
#endif
/*
"use per-thread mmaps"),
OPT_BOOLEAN('I', "intr-regs", &record.opts.sample_intr_regs,
"Sample machine registers on interrupt"),
+ OPT_BOOLEAN(0, "running-time", &record.opts.running_time,
+ "Record running/enabled time of read (:S) events"),
+ OPT_CALLBACK('k', "clockid", &record.opts,
+ "clockid", "clockid to use for events, see clock_gettime()",
+ parse_clockid),
OPT_END()
};
if ((sample_type & PERF_SAMPLE_REGS_USER) &&
(sample_type & PERF_SAMPLE_STACK_USER))
callchain_param.record_mode = CALLCHAIN_DWARF;
+ else if (sample_type & PERF_SAMPLE_BRANCH_STACK)
+ callchain_param.record_mode = CALLCHAIN_LBR;
else
callchain_param.record_mode = CALLCHAIN_FP;
}
if (rep->mem_mode) {
ret += fprintf(fp, "\n# Total weight : %" PRIu64, nr_events);
- ret += fprintf(fp, "\n# Sort order : %s", sort_order);
+ ret += fprintf(fp, "\n# Sort order : %s", sort_order ? : default_mem_sort_order);
} else
ret += fprintf(fp, "\n# Event count (approx.): %" PRIu64, nr_events);
return ret + fprintf(fp, "\n#\n");
static void report__warn_kptr_restrict(const struct report *rep)
{
struct map *kernel_map = rep->session->machines.host.vmlinux_maps[MAP__FUNCTION];
- struct kmap *kernel_kmap = map__kmap(kernel_map);
+ struct kmap *kernel_kmap = kernel_map ? map__kmap(kernel_map) : NULL;
if (kernel_map == NULL ||
(kernel_map->dso->hit &&
if (ret)
return ret;
- ret = perf_session__process_events(session, &rep->tool);
+ ret = perf_session__process_events(session);
if (ret)
return ret;
"only consider symbols in these dsos"),
OPT_STRING('c', "comms", &symbol_conf.comm_list_str, "comm[,comm...]",
"only consider symbols in these comms"),
+ OPT_STRING(0, "pid", &symbol_conf.pid_list_str, "pid[,pid...]",
+ "only consider symbols in these pids"),
+ OPT_STRING(0, "tid", &symbol_conf.tid_list_str, "tid[,tid...]",
+ "only consider symbols in these tids"),
OPT_STRING('S', "symbols", &symbol_conf.sym_list_str, "symbol[,symbol...]",
"only consider these symbols"),
OPT_STRING(0, "symbol-filter", &report.symbol_filter_str, "filter",
OPT_STRING('w', "column-widths", &symbol_conf.col_width_list_str,
"width[,width...]",
"don't try to adjust column width, use these fixed values"),
- OPT_STRING('t', "field-separator", &symbol_conf.field_sep, "separator",
+ OPT_STRING_NOEMPTY('t', "field-separator", &symbol_conf.field_sep, "separator",
"separator for columns, no spaces will be added between "
"columns '.' is reserved."),
OPT_BOOLEAN('U', "hide-unresolved", &report.hide_unresolved,
* 0/1 means the user chose a mode.
*/
if (((branch_mode == -1 && has_br_stack) || branch_mode == 1) &&
- branch_call_mode == -1) {
+ !branch_call_mode) {
sort__mode = SORT_MODE__BRANCH;
symbol_conf.cumulate_callchain = false;
}
#include <semaphore.h>
#include <pthread.h>
#include <math.h>
+#include <api/fs/fs.h>
#define PR_SET_NAME 15 /* Set process name */
#define MAX_CPUS 4096
#define COMM_LEN 20
#define SYM_LEN 129
-#define MAX_PID 65536
+#define MAX_PID 1024000
struct sched_atom;
struct perf_tool tool;
const char *sort_order;
unsigned long nr_tasks;
- struct task_desc *pid_to_task[MAX_PID];
+ struct task_desc **pid_to_task;
struct task_desc **tasks;
const struct trace_sched_handler *tp_handler;
pthread_mutex_t start_work_mutex;
u64 cpu_last_switched[MAX_CPUS];
struct rb_root atom_root, sorted_atom_root;
struct list_head sort_list, cmp_pid;
+ bool force;
};
static u64 get_nsecs(void)
unsigned long pid, const char *comm)
{
struct task_desc *task;
+ static int pid_max;
- BUG_ON(pid >= MAX_PID);
+ if (sched->pid_to_task == NULL) {
+ if (sysctl__read_int("kernel/pid_max", &pid_max) < 0)
+ pid_max = MAX_PID;
+ BUG_ON((sched->pid_to_task = calloc(pid_max, sizeof(struct task_desc *))) == NULL);
+ }
+ if (pid >= (unsigned long)pid_max) {
+ BUG_ON((sched->pid_to_task = realloc(sched->pid_to_task, (pid + 1) *
+ sizeof(struct task_desc *))) == NULL);
+ while (pid >= (unsigned long)pid_max)
+ sched->pid_to_task[pid_max++] = NULL;
+ }
task = sched->pid_to_task[pid];
sched->pid_to_task[pid] = task;
sched->nr_tasks++;
- sched->tasks = realloc(sched->tasks, sched->nr_tasks * sizeof(struct task_task *));
+ sched->tasks = realloc(sched->tasks, sched->nr_tasks * sizeof(struct task_desc *));
BUG_ON(!sched->tasks);
sched->tasks[task->nr] = task;
return sum;
}
-static int self_open_counters(void)
+static int self_open_counters(struct perf_sched *sched, unsigned long cur_task)
{
struct perf_event_attr attr;
- char sbuf[STRERR_BUFSIZE];
+ char sbuf[STRERR_BUFSIZE], info[STRERR_BUFSIZE];
int fd;
+ struct rlimit limit;
+ bool need_privilege = false;
memset(&attr, 0, sizeof(attr));
attr.type = PERF_TYPE_SOFTWARE;
attr.config = PERF_COUNT_SW_TASK_CLOCK;
+force_again:
fd = sys_perf_event_open(&attr, 0, -1, -1,
perf_event_open_cloexec_flag());
- if (fd < 0)
+ if (fd < 0) {
+ if (errno == EMFILE) {
+ if (sched->force) {
+ BUG_ON(getrlimit(RLIMIT_NOFILE, &limit) == -1);
+ limit.rlim_cur += sched->nr_tasks - cur_task;
+ if (limit.rlim_cur > limit.rlim_max) {
+ limit.rlim_max = limit.rlim_cur;
+ need_privilege = true;
+ }
+ if (setrlimit(RLIMIT_NOFILE, &limit) == -1) {
+ if (need_privilege && errno == EPERM)
+ strcpy(info, "Need privilege\n");
+ } else
+ goto force_again;
+ } else
+ strcpy(info, "Have a try with -f option\n");
+ }
pr_err("Error: sys_perf_event_open() syscall returned "
- "with %d (%s)\n", fd,
- strerror_r(errno, sbuf, sizeof(sbuf)));
+ "with %d (%s)\n%s", fd,
+ strerror_r(errno, sbuf, sizeof(sbuf)), info);
+ exit(EXIT_FAILURE);
+ }
return fd;
}
struct sched_thread_parms {
struct task_desc *task;
struct perf_sched *sched;
+ int fd;
};
static void *thread_func(void *ctx)
u64 cpu_usage_0, cpu_usage_1;
unsigned long i, ret;
char comm2[22];
- int fd;
+ int fd = parms->fd;
zfree(&parms);
sprintf(comm2, ":%s", this_task->comm);
prctl(PR_SET_NAME, comm2);
- fd = self_open_counters();
if (fd < 0)
return NULL;
again:
BUG_ON(parms == NULL);
parms->task = task = sched->tasks[i];
parms->sched = sched;
+ parms->fd = self_open_counters(sched, i);
sem_init(&task->sleep_sem, 0, 0);
sem_init(&task->ready_for_work, 0, 0);
sem_init(&task->work_done_sem, 0, 0);
cpu_usage_1 = get_cpu_usage_nsec_parent();
if (!sched->runavg_cpu_usage)
sched->runavg_cpu_usage = sched->cpu_usage;
- sched->runavg_cpu_usage = (sched->runavg_cpu_usage * 9 + sched->cpu_usage) / 10;
+ sched->runavg_cpu_usage = (sched->runavg_cpu_usage * (sched->replay_repeat - 1) + sched->cpu_usage) / sched->replay_repeat;
sched->parent_cpu_usage = cpu_usage_1 - cpu_usage_0;
if (!sched->runavg_parent_cpu_usage)
sched->runavg_parent_cpu_usage = sched->parent_cpu_usage;
- sched->runavg_parent_cpu_usage = (sched->runavg_parent_cpu_usage * 9 +
- sched->parent_cpu_usage)/10;
+ sched->runavg_parent_cpu_usage = (sched->runavg_parent_cpu_usage * (sched->replay_repeat - 1) +
+ sched->parent_cpu_usage)/sched->replay_repeat;
ret = pthread_mutex_lock(&sched->start_work_mutex);
BUG_ON(ret);
sched->sum_fluct += fluct;
if (!sched->run_avg)
sched->run_avg = delta;
- sched->run_avg = (sched->run_avg * 9 + delta) / 10;
+ sched->run_avg = (sched->run_avg * (sched->replay_repeat - 1) + delta) / sched->replay_repeat;
printf("#%-3ld: %0.3f, ", sched->nr_runs, (double)delta / 1000000.0);
return -1;
}
- atoms->thread = thread;
+ atoms->thread = thread__get(thread);
INIT_LIST_HEAD(&atoms->work_list);
__thread_latency_insert(&sched->atom_root, atoms, &sched->cmp_pid);
return 0;
return err;
}
-static int perf_sched__read_events(struct perf_sched *sched,
- struct perf_session **psession)
+static int perf_sched__read_events(struct perf_sched *sched)
{
const struct perf_evsel_str_handler handlers[] = {
{ "sched:sched_switch", process_sched_switch_event, },
struct perf_data_file file = {
.path = input_name,
.mode = PERF_DATA_MODE_READ,
+ .force = sched->force,
};
+ int rc = -1;
session = perf_session__new(&file, false, &sched->tool);
if (session == NULL) {
goto out_delete;
if (perf_session__has_traces(session, "record -R")) {
- int err = perf_session__process_events(session, &sched->tool);
+ int err = perf_session__process_events(session);
if (err) {
pr_err("Failed to process events, error %d", err);
goto out_delete;
}
- sched->nr_events = session->stats.nr_events[0];
- sched->nr_lost_events = session->stats.total_lost;
- sched->nr_lost_chunks = session->stats.nr_events[PERF_RECORD_LOST];
+ sched->nr_events = session->evlist->stats.nr_events[0];
+ sched->nr_lost_events = session->evlist->stats.total_lost;
+ sched->nr_lost_chunks = session->evlist->stats.nr_events[PERF_RECORD_LOST];
}
- if (psession)
- *psession = session;
- else
- perf_session__delete(session);
-
- return 0;
-
+ rc = 0;
out_delete:
perf_session__delete(session);
- return -1;
+ return rc;
}
static void print_bad_events(struct perf_sched *sched)
static int perf_sched__lat(struct perf_sched *sched)
{
struct rb_node *next;
- struct perf_session *session;
setup_pager();
- /* save session -- references to threads are held in work_list */
- if (perf_sched__read_events(sched, &session))
+ if (perf_sched__read_events(sched))
return -1;
perf_sched__sort_lat(sched);
work_list = rb_entry(next, struct work_atoms, node);
output_lat_thread(sched, work_list);
next = rb_next(next);
+ thread__zput(work_list->thread);
}
printf(" -----------------------------------------------------------------------------------------------------------------\n");
print_bad_events(sched);
printf("\n");
- perf_session__delete(session);
return 0;
}
sched->max_cpu = sysconf(_SC_NPROCESSORS_CONF);
setup_pager();
- if (perf_sched__read_events(sched, NULL))
+ if (perf_sched__read_events(sched))
return -1;
print_bad_events(sched);
return 0;
test_calibrations(sched);
- if (perf_sched__read_events(sched, NULL))
+ if (perf_sched__read_events(sched))
return -1;
printf("nr_run_events: %ld\n", sched->nr_run_events);
"be more verbose (show symbol address, etc)"),
OPT_BOOLEAN('D', "dump-raw-trace", &dump_trace,
"dump raw trace in ASCII"),
+ OPT_BOOLEAN('f', "force", &sched.force, "don't complain, do it"),
OPT_END()
};
const struct option sched_options[] = {
}
static void process_event(union perf_event *event, struct perf_sample *sample,
- struct perf_evsel *evsel, struct thread *thread,
- struct addr_location *al)
+ struct perf_evsel *evsel, struct addr_location *al)
{
+ struct thread *thread = al->thread;
struct perf_event_attr *attr = &evsel->attr;
if (output[attr->type].fields == 0)
struct machine *machine)
{
struct addr_location al;
- struct thread *thread = machine__findnew_thread(machine, sample->pid,
- sample->tid);
-
- if (thread == NULL) {
- pr_debug("problem processing %d event, skipping it.\n",
- event->header.type);
- return -1;
- }
if (debug_mode) {
if (sample->time < last_timestamp) {
if (cpu_list && !test_bit(sample->cpu, cpu_bitmap))
return 0;
- scripting_ops->process_event(event, sample, evsel, thread, &al);
+ scripting_ops->process_event(event, sample, evsel, &al);
return 0;
}
script->tool.mmap2 = process_mmap2_event;
}
- ret = perf_session__process_events(script->session, &script->tool);
+ ret = perf_session__process_events(script->session);
if (debug_mode)
pr_err("Misordered timestamps: %" PRIu64 "\n", nr_unordered);
.ordering_requires_timestamps = true,
},
};
+ struct perf_data_file file = {
+ .mode = PERF_DATA_MODE_READ,
+ };
const struct option options[] = {
OPT_BOOLEAN('D', "dump-raw-trace", &dump_trace,
"dump raw trace in ASCII"),
"When printing symbols do not display call chain"),
OPT_STRING(0, "symfs", &symbol_conf.symfs, "directory",
"Look for files with symbols relative to this directory"),
- OPT_CALLBACK('f', "fields", NULL, "str",
+ OPT_CALLBACK('F', "fields", NULL, "str",
"comma separated output fields prepend with 'type:'. "
"Valid types: hw,sw,trace,raw. "
"Fields: comm,tid,pid,time,cpu,event,trace,ip,sym,dso,"
OPT_STRING('C', "cpu", &cpu_list, "cpu", "list of cpus to profile"),
OPT_STRING('c', "comms", &symbol_conf.comm_list_str, "comm[,comm...]",
"only display events for these comms"),
+ OPT_STRING(0, "pid", &symbol_conf.pid_list_str, "pid[,pid...]",
+ "only consider symbols in these pids"),
+ OPT_STRING(0, "tid", &symbol_conf.tid_list_str, "tid[,tid...]",
+ "only consider symbols in these tids"),
OPT_BOOLEAN('I', "show-info", &show_full_info,
"display extended information from perf.data file"),
OPT_BOOLEAN('\0', "show-kernel-path", &symbol_conf.show_kernel_path,
"Show the fork/comm/exit events"),
OPT_BOOLEAN('\0', "show-mmap-events", &script.show_mmap_events,
"Show the mmap events"),
+ OPT_BOOLEAN('f', "force", &file.force, "don't complain, do it"),
OPT_END()
};
- const char * const script_usage[] = {
+ const char * const script_subcommands[] = { "record", "report", NULL };
+ const char *script_usage[] = {
"perf script [<options>]",
"perf script [<options>] record <script> [<record-options>] <command>",
"perf script [<options>] report <script> [script-args]",
"perf script [<options>] <top-script> [script-args]",
NULL
};
- struct perf_data_file file = {
- .mode = PERF_DATA_MODE_READ,
- };
setup_scripting();
- argc = parse_options(argc, argv, options, script_usage,
+ argc = parse_options_subcommand(argc, argv, options, script_subcommands, script_usage,
PARSE_OPT_STOP_AT_NON_OPTION);
file.path = input_name;
* more semantic information such as miss/hit ratios,
* instruction rates, etc:
*/
-static void update_shadow_stats(struct perf_evsel *counter, u64 *count)
+static void update_shadow_stats(struct perf_evsel *counter, u64 *count,
+ int cpu)
{
if (perf_evsel__match(counter, SOFTWARE, SW_TASK_CLOCK))
- update_stats(&runtime_nsecs_stats[0], count[0]);
+ update_stats(&runtime_nsecs_stats[cpu], count[0]);
else if (perf_evsel__match(counter, HARDWARE, HW_CPU_CYCLES))
- update_stats(&runtime_cycles_stats[0], count[0]);
+ update_stats(&runtime_cycles_stats[cpu], count[0]);
else if (transaction_run &&
perf_evsel__cmp(counter, nth_evsel(T_CYCLES_IN_TX)))
- update_stats(&runtime_cycles_in_tx_stats[0], count[0]);
+ update_stats(&runtime_cycles_in_tx_stats[cpu], count[0]);
else if (transaction_run &&
perf_evsel__cmp(counter, nth_evsel(T_TRANSACTION_START)))
- update_stats(&runtime_transaction_stats[0], count[0]);
+ update_stats(&runtime_transaction_stats[cpu], count[0]);
else if (transaction_run &&
perf_evsel__cmp(counter, nth_evsel(T_ELISION_START)))
- update_stats(&runtime_elision_stats[0], count[0]);
+ update_stats(&runtime_elision_stats[cpu], count[0]);
else if (perf_evsel__match(counter, HARDWARE, HW_STALLED_CYCLES_FRONTEND))
- update_stats(&runtime_stalled_cycles_front_stats[0], count[0]);
+ update_stats(&runtime_stalled_cycles_front_stats[cpu], count[0]);
else if (perf_evsel__match(counter, HARDWARE, HW_STALLED_CYCLES_BACKEND))
- update_stats(&runtime_stalled_cycles_back_stats[0], count[0]);
+ update_stats(&runtime_stalled_cycles_back_stats[cpu], count[0]);
else if (perf_evsel__match(counter, HARDWARE, HW_BRANCH_INSTRUCTIONS))
- update_stats(&runtime_branches_stats[0], count[0]);
+ update_stats(&runtime_branches_stats[cpu], count[0]);
else if (perf_evsel__match(counter, HARDWARE, HW_CACHE_REFERENCES))
- update_stats(&runtime_cacherefs_stats[0], count[0]);
+ update_stats(&runtime_cacherefs_stats[cpu], count[0]);
else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_L1D))
- update_stats(&runtime_l1_dcache_stats[0], count[0]);
+ update_stats(&runtime_l1_dcache_stats[cpu], count[0]);
else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_L1I))
- update_stats(&runtime_l1_icache_stats[0], count[0]);
+ update_stats(&runtime_l1_icache_stats[cpu], count[0]);
else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_LL))
- update_stats(&runtime_ll_cache_stats[0], count[0]);
+ update_stats(&runtime_ll_cache_stats[cpu], count[0]);
else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_DTLB))
- update_stats(&runtime_dtlb_cache_stats[0], count[0]);
+ update_stats(&runtime_dtlb_cache_stats[cpu], count[0]);
else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_ITLB))
- update_stats(&runtime_itlb_cache_stats[0], count[0]);
+ update_stats(&runtime_itlb_cache_stats[cpu], count[0]);
}
static void zero_per_pkg(struct perf_evsel *counter)
perf_evsel__compute_deltas(evsel, cpu, count);
perf_counts_values__scale(count, scale, NULL);
evsel->counts->cpu[cpu] = *count;
- update_shadow_stats(evsel, count->values);
+ if (aggr_mode == AGGR_NONE)
+ update_shadow_stats(evsel, count->values, cpu);
break;
case AGGR_GLOBAL:
aggr->val += count->val;
/*
* Save the full runtime - to allow normalization during printout:
*/
- update_shadow_stats(counter, count);
+ update_shadow_stats(counter, count, 0);
return 0;
}
int ncpus = perf_evsel__nr_cpus(counter);
int cpu, thread;
+ if (!counter->supported)
+ return -ENOENT;
+
if (counter->system_wide)
nthreads = 1;
unit_width = l;
}
- if (perf_evlist__apply_filters(evsel_list)) {
- error("failed to set filter with %d (%s)\n", errno,
+ if (perf_evlist__apply_filters(evsel_list, &counter)) {
+ error("failed to set filter \"%s\" on event %s with %d (%s)\n",
+ counter->filter, perf_evsel__name(counter), errno,
strerror_r(errno, msg, sizeof(msg)));
return -1;
}
return ret;
}
+static void print_running(u64 run, u64 ena)
+{
+ if (csv_output) {
+ fprintf(output, "%s%" PRIu64 "%s%.2f",
+ csv_sep,
+ run,
+ csv_sep,
+ ena ? 100.0 * run / ena : 100.0);
+ } else if (run != ena) {
+ fprintf(output, " (%.2f%%)", 100.0 * run / ena);
+ }
+}
+
static void print_noise_pct(double total, double avg)
{
double pct = rel_stddev_stats(total, avg);
if (total) {
ratio = avg / total;
fprintf(output, " # %5.2f insns per cycle ", ratio);
+ } else {
+ fprintf(output, " ");
}
total = avg_stats(&runtime_stalled_cycles_front_stats[cpu]);
total = max(total, avg_stats(&runtime_stalled_cycles_back_stats[cpu]));
if (total) {
ratio = avg / total;
fprintf(output, " # %8.3f GHz ", ratio);
+ } else {
+ fprintf(output, " ");
}
} else if (transaction_run &&
perf_evsel__cmp(evsel, nth_evsel(T_CYCLES_IN_TX))) {
fprintf(output, "%s%s",
csv_sep, counter->cgrp->name);
+ print_running(run, ena);
fputc('\n', output);
continue;
}
else
abs_printout(id, nr, counter, uval);
- if (!csv_output) {
+ if (!csv_output)
print_noise(counter, 1.0);
- if (run != ena)
- fprintf(output, " (%.2f%%)",
- 100.0 * run / ena);
- }
+ print_running(run, ena);
fputc('\n', output);
}
}
double avg = avg_stats(&ps->res_stats[0]);
int scaled = counter->counts->scaled;
double uval;
+ double avg_enabled, avg_running;
+
+ avg_enabled = avg_stats(&ps->res_stats[1]);
+ avg_running = avg_stats(&ps->res_stats[2]);
if (prefix)
fprintf(output, "%s", prefix);
- if (scaled == -1) {
+ if (scaled == -1 || !counter->supported) {
fprintf(output, "%*s%s",
csv_output ? 0 : 18,
counter->supported ? CNTR_NOT_COUNTED : CNTR_NOT_SUPPORTED,
if (counter->cgrp)
fprintf(output, "%s%s", csv_sep, counter->cgrp->name);
+ print_running(avg_running, avg_enabled);
fputc('\n', output);
return;
}
print_noise(counter, avg);
- if (csv_output) {
- fputc('\n', output);
- return;
- }
-
- if (scaled) {
- double avg_enabled, avg_running;
-
- avg_enabled = avg_stats(&ps->res_stats[1]);
- avg_running = avg_stats(&ps->res_stats[2]);
-
- fprintf(output, " [%5.2f%%]", 100 * avg_running / avg_enabled);
- }
+ print_running(avg_running, avg_enabled);
fprintf(output, "\n");
}
fprintf(output, "%s%s",
csv_sep, counter->cgrp->name);
+ print_running(run, ena);
fputc('\n', output);
continue;
}
else
abs_printout(cpu, 0, counter, uval);
- if (!csv_output) {
+ if (!csv_output)
print_noise(counter, 1.0);
+ print_running(run, ena);
- if (run != ena)
- fprintf(output, " (%.2f%%)",
- 100.0 * run / ena);
- }
fputc('\n', output);
}
}
skip_eagain;
u64 min_time,
merge_dist;
+ bool force;
};
struct per_pidcomm;
struct perf_data_file file = {
.path = input_name,
.mode = PERF_DATA_MODE_READ,
+ .force = tchart->force,
};
struct perf_session *session = perf_session__new(&file, false,
goto out_delete;
}
- ret = perf_session__process_events(session, &tchart->tool);
+ ret = perf_session__process_events(session);
if (ret)
goto out_delete;
OPT_CALLBACK(0, "io-merge-dist", &tchart.merge_dist, "time",
"merge events that are merge-dist us apart",
parse_time),
+ OPT_BOOLEAN('f', "force", &tchart.force, "don't complain, do it"),
OPT_END()
};
- const char * const timechart_usage[] = {
+ const char * const timechart_subcommands[] = { "record", NULL };
+ const char *timechart_usage[] = {
"perf timechart [<options>] {record}",
NULL
};
"perf timechart record [<options>]",
NULL
};
- argc = parse_options(argc, argv, timechart_options, timechart_usage,
- PARSE_OPT_STOP_AT_NON_OPTION);
+ argc = parse_options_subcommand(argc, argv, timechart_options, timechart_subcommands,
+ timechart_usage, PARSE_OPT_STOP_AT_NON_OPTION);
if (tchart.power_only && tchart.tasks_only) {
pr_err("-P and -T options cannot be used at the same time.\n");
if (!machine) {
pr_err("%u unprocessable samples recorded.\r",
- top->session->stats.nr_unprocessable_samples++);
+ top->session->evlist->stats.nr_unprocessable_samples++);
return;
}
al.map == machine->vmlinux_maps[MAP__FUNCTION] &&
RB_EMPTY_ROOT(&al.map->dso->symbols[MAP__FUNCTION])) {
if (symbol_conf.vmlinux_name) {
- ui__warning("The %s file can't be used.\n%s",
- symbol_conf.vmlinux_name, msg);
+ char serr[256];
+ dso__strerror_load(al.map->dso, serr, sizeof(serr));
+ ui__warning("The %s file can't be used: %s\n%s",
+ symbol_conf.vmlinux_name, serr, msg);
} else {
ui__warning("A vmlinux file was not found.\n%s",
msg);
hists__inc_nr_events(evsel__hists(evsel), event->header.type);
machine__process_event(machine, event, &sample);
} else
- ++session->stats.nr_unknown_events;
+ ++session->evlist->stats.nr_unknown_events;
next_event:
perf_evlist__mmap_consume(top->evlist, idx);
}
#define TP_UINT_FIELD(bits) \
static u64 tp_field__u##bits(struct tp_field *field, struct perf_sample *sample) \
{ \
- return *(u##bits *)(sample->raw_data + field->offset); \
+ u##bits value; \
+ memcpy(&value, sample->raw_data + field->offset, sizeof(value)); \
+ return value; \
}
TP_UINT_FIELD(8);
#define TP_UINT_FIELD__SWAPPED(bits) \
static u64 tp_field__swapped_u##bits(struct tp_field *field, struct perf_sample *sample) \
{ \
- u##bits value = *(u##bits *)(sample->raw_data + field->offset); \
+ u##bits value; \
+ memcpy(&value, sample->raw_data + field->offset, sizeof(value)); \
return bswap_##bits(value);\
}
struct syscall {
struct event_format *tp_format;
+ int nr_args;
+ struct format_field *args;
const char *name;
bool filtered;
bool is_exit;
struct syscall *table;
} syscalls;
struct record_opts opts;
+ struct perf_evlist *evlist;
struct machine *host;
+ struct thread *current;
u64 base_time;
FILE *output;
unsigned long nr_events;
const char *last_vfs_getname;
struct intlist *tid_list;
struct intlist *pid_list;
+ struct {
+ size_t nr;
+ pid_t *entries;
+ } filter_pids;
double duration_filter;
double runtime_ms;
struct {
bool show_comm;
bool show_tool_stats;
bool trace_syscalls;
+ bool force;
int trace_pgfaults;
};
struct format_field *field;
int idx = 0;
- sc->arg_scnprintf = calloc(sc->tp_format->format.nr_fields - 1, sizeof(void *));
+ sc->arg_scnprintf = calloc(sc->nr_args, sizeof(void *));
if (sc->arg_scnprintf == NULL)
return -1;
if (sc->fmt)
sc->arg_parm = sc->fmt->arg_parm;
- for (field = sc->tp_format->format.fields->next; field; field = field->next) {
+ for (field = sc->args; field; field = field->next) {
if (sc->fmt && sc->fmt->arg_scnprintf[idx])
sc->arg_scnprintf[idx] = sc->fmt->arg_scnprintf[idx];
else if (field->flags & FIELD_IS_POINTER)
if (sc->tp_format == NULL)
return -1;
+ sc->args = sc->tp_format->format.fields;
+ sc->nr_args = sc->tp_format->format.nr_fields;
+ /* drop nr field - not relevant here; does not exist on older kernels */
+ if (sc->args && strcmp(sc->args->name, "nr") == 0) {
+ sc->args = sc->args->next;
+ --sc->nr_args;
+ }
+
sc->is_exit = !strcmp(name, "exit_group") || !strcmp(name, "exit");
return syscall__set_arg_fmts(sc);
}
+/*
+ * args is to be interpreted as a series of longs but we need to handle
+ * 8-byte unaligned accesses. args points to raw_data within the event
+ * and raw_data is guaranteed to be 8-byte unaligned because it is
+ * preceded by raw_size which is a u32. So we need to copy args to a temp
+ * variable to read it. Most notably this avoids extended load instructions
+ * on unaligned addresses
+ */
+
static size_t syscall__scnprintf_args(struct syscall *sc, char *bf, size_t size,
- unsigned long *args, struct trace *trace,
+ unsigned char *args, struct trace *trace,
struct thread *thread)
{
size_t printed = 0;
+ unsigned char *p;
+ unsigned long val;
- if (sc->tp_format != NULL) {
+ if (sc->args != NULL) {
struct format_field *field;
u8 bit = 1;
struct syscall_arg arg = {
.thread = thread,
};
- for (field = sc->tp_format->format.fields->next; field;
+ for (field = sc->args; field;
field = field->next, ++arg.idx, bit <<= 1) {
if (arg.mask & bit)
continue;
+
+ /* special care for unaligned accesses */
+ p = args + sizeof(unsigned long) * arg.idx;
+ memcpy(&val, p, sizeof(val));
+
/*
* Suppress this argument if its value is zero and
* and we don't have a string associated in an
* strarray for it.
*/
- if (args[arg.idx] == 0 &&
+ if (val == 0 &&
!(sc->arg_scnprintf &&
sc->arg_scnprintf[arg.idx] == SCA_STRARRAY &&
sc->arg_parm[arg.idx]))
printed += scnprintf(bf + printed, size - printed,
"%s%s: ", printed ? ", " : "", field->name);
if (sc->arg_scnprintf && sc->arg_scnprintf[arg.idx]) {
- arg.val = args[arg.idx];
+ arg.val = val;
if (sc->arg_parm)
arg.parm = sc->arg_parm[arg.idx];
printed += sc->arg_scnprintf[arg.idx](bf + printed,
size - printed, &arg);
} else {
printed += scnprintf(bf + printed, size - printed,
- "%ld", args[arg.idx]);
+ "%ld", val);
}
}
} else {
int i = 0;
while (i < 6) {
+ /* special care for unaligned accesses */
+ p = args + sizeof(unsigned long) * i;
+ memcpy(&val, p, sizeof(val));
printed += scnprintf(bf + printed, size - printed,
"%sarg%d: %ld",
- printed ? ", " : "", i, args[i]);
+ printed ? ", " : "", i, val);
++i;
}
}
update_stats(stats, duration);
}
+static int trace__printf_interrupted_entry(struct trace *trace, struct perf_sample *sample)
+{
+ struct thread_trace *ttrace;
+ u64 duration;
+ size_t printed;
+
+ if (trace->current == NULL)
+ return 0;
+
+ ttrace = thread__priv(trace->current);
+
+ if (!ttrace->entry_pending)
+ return 0;
+
+ duration = sample->time - ttrace->entry_time;
+
+ printed = trace__fprintf_entry_head(trace, trace->current, duration, sample->time, trace->output);
+ printed += fprintf(trace->output, "%-70s) ...\n", ttrace->entry_str);
+ ttrace->entry_pending = false;
+
+ return printed;
+}
+
static int trace__sys_enter(struct trace *trace, struct perf_evsel *evsel,
union perf_event *event __maybe_unused,
struct perf_sample *sample)
return -1;
}
+ if (!trace->summary_only)
+ trace__printf_interrupted_entry(trace, sample);
+
ttrace->entry_time = sample->time;
msg = ttrace->entry_str;
printed += scnprintf(msg + printed, 1024 - printed, "%s(", sc->name);
} else
ttrace->entry_pending = true;
+ if (trace->current != thread) {
+ thread__put(trace->current);
+ trace->current = thread__get(thread);
+ }
+
return 0;
}
return 0;
}
+static int trace__event_handler(struct trace *trace, struct perf_evsel *evsel,
+ union perf_event *event __maybe_unused,
+ struct perf_sample *sample)
+{
+ trace__printf_interrupted_entry(trace, sample);
+ trace__fprintf_tstamp(trace, sample->time, trace->output);
+
+ if (trace->trace_syscalls)
+ fprintf(trace->output, "( ): ");
+
+ fprintf(trace->output, "%s:", evsel->name);
+
+ if (evsel->tp_format) {
+ event_format__fprintf(evsel->tp_format, sample->cpu,
+ sample->raw_data, sample->raw_size,
+ trace->output);
+ }
+
+ fprintf(trace->output, ")\n");
+ return 0;
+}
+
static void print_location(FILE *f, struct perf_sample *sample,
struct addr_location *al,
bool print_dso, bool print_sym)
return 0;
}
-static int trace__run(struct trace *trace, int argc, const char **argv)
+static void trace__handle_event(struct trace *trace, union perf_event *event, struct perf_sample *sample)
{
- struct perf_evlist *evlist = perf_evlist__new();
+ const u32 type = event->header.type;
struct perf_evsel *evsel;
+
+ if (!trace->full_time && trace->base_time == 0)
+ trace->base_time = sample->time;
+
+ if (type != PERF_RECORD_SAMPLE) {
+ trace__process_event(trace, trace->host, event, sample);
+ return;
+ }
+
+ evsel = perf_evlist__id2evsel(trace->evlist, sample->id);
+ if (evsel == NULL) {
+ fprintf(trace->output, "Unknown tp ID %" PRIu64 ", skipping...\n", sample->id);
+ return;
+ }
+
+ if (evsel->attr.type == PERF_TYPE_TRACEPOINT &&
+ sample->raw_data == NULL) {
+ fprintf(trace->output, "%s sample with no payload for tid: %d, cpu %d, raw_size=%d, skipping...\n",
+ perf_evsel__name(evsel), sample->tid,
+ sample->cpu, sample->raw_size);
+ } else {
+ tracepoint_handler handler = evsel->handler;
+ handler(trace, evsel, event, sample);
+ }
+}
+
+static int trace__run(struct trace *trace, int argc, const char **argv)
+{
+ struct perf_evlist *evlist = trace->evlist;
int err = -1, i;
unsigned long before;
const bool forks = argc > 0;
trace->live = true;
- if (evlist == NULL) {
- fprintf(trace->output, "Not enough memory to run!\n");
- goto out;
- }
-
if (trace->trace_syscalls &&
perf_evlist__add_syscall_newtp(evlist, trace__sys_enter,
trace__sys_exit))
if (err < 0)
goto out_error_open;
+ /*
+ * Better not use !target__has_task() here because we need to cover the
+ * case where no threads were specified in the command line, but a
+ * workload was, and in that case we will fill in the thread_map when
+ * we fork the workload in perf_evlist__prepare_workload.
+ */
+ if (trace->filter_pids.nr > 0)
+ err = perf_evlist__set_filter_pids(evlist, trace->filter_pids.nr, trace->filter_pids.entries);
+ else if (evlist->threads->map[0] == -1)
+ err = perf_evlist__set_filter_pid(evlist, getpid());
+
+ if (err < 0) {
+ printf("err=%d,%s\n", -err, strerror(-err));
+ exit(1);
+ }
+
err = perf_evlist__mmap(evlist, trace->opts.mmap_pages, false);
if (err < 0)
goto out_error_mmap;
- perf_evlist__enable(evlist);
-
if (forks)
perf_evlist__start_workload(evlist);
+ else
+ perf_evlist__enable(evlist);
- trace->multiple_threads = evlist->threads->map[0] == -1 || evlist->threads->nr > 1;
+ trace->multiple_threads = evlist->threads->map[0] == -1 ||
+ evlist->threads->nr > 1 ||
+ perf_evlist__first(evlist)->attr.inherit;
again:
before = trace->nr_events;
union perf_event *event;
while ((event = perf_evlist__mmap_read(evlist, i)) != NULL) {
- const u32 type = event->header.type;
- tracepoint_handler handler;
struct perf_sample sample;
++trace->nr_events;
goto next_event;
}
- if (!trace->full_time && trace->base_time == 0)
- trace->base_time = sample.time;
-
- if (type != PERF_RECORD_SAMPLE) {
- trace__process_event(trace, trace->host, event, &sample);
- continue;
- }
-
- evsel = perf_evlist__id2evsel(evlist, sample.id);
- if (evsel == NULL) {
- fprintf(trace->output, "Unknown tp ID %" PRIu64 ", skipping...\n", sample.id);
- goto next_event;
- }
-
- if (evsel->attr.type == PERF_TYPE_TRACEPOINT &&
- sample.raw_data == NULL) {
- fprintf(trace->output, "%s sample with no payload for tid: %d, cpu %d, raw_size=%d, skipping...\n",
- perf_evsel__name(evsel), sample.tid,
- sample.cpu, sample.raw_size);
- goto next_event;
- }
-
- handler = evsel->handler;
- handler(trace, evsel, event, &sample);
+ trace__handle_event(trace, event, &sample);
next_event:
perf_evlist__mmap_consume(evlist, i);
}
out_disable:
+ thread__zput(trace->current);
+
perf_evlist__disable(evlist);
if (!err) {
out_delete_evlist:
perf_evlist__delete(evlist);
-out:
+ trace->evlist = NULL;
trace->live = false;
return err;
{
struct perf_data_file file = {
.path = input_name,
.mode = PERF_DATA_MODE_READ,
+ .force = trace->force,
};
struct perf_session *session;
struct perf_evsel *evsel;
setup_pager();
- err = perf_session__process_events(session, &trace->tool);
+ err = perf_session__process_events(session);
if (err)
pr_err("Failed to process events, error %d", err);
return 0;
}
+static int trace__set_filter_pids(const struct option *opt, const char *str,
+ int unset __maybe_unused)
+{
+ int ret = -1;
+ size_t i;
+ struct trace *trace = opt->value;
+ /*
+ * FIXME: introduce a intarray class, plain parse csv and create a
+ * { int nr, int entries[] } struct...
+ */
+ struct intlist *list = intlist__new(str);
+
+ if (list == NULL)
+ return -1;
+
+ i = trace->filter_pids.nr = intlist__nr_entries(list) + 1;
+ trace->filter_pids.entries = calloc(i, sizeof(pid_t));
+
+ if (trace->filter_pids.entries == NULL)
+ goto out;
+
+ trace->filter_pids.entries[0] = getpid();
+
+ for (i = 1; i < trace->filter_pids.nr; ++i)
+ trace->filter_pids.entries[i] = intlist__entry(list, i - 1)->i;
+
+ intlist__delete(list);
+ ret = 0;
+out:
+ return ret;
+}
+
static int trace__open_output(struct trace *trace, const char *filename)
{
struct stat st;
return 0;
}
+static void evlist__set_evsel_handler(struct perf_evlist *evlist, void *handler)
+{
+ struct perf_evsel *evsel;
+
+ evlist__for_each(evlist, evsel)
+ evsel->handler = handler;
+}
+
int cmd_trace(int argc, const char **argv, const char *prefix __maybe_unused)
{
- const char * const trace_usage[] = {
+ const char *trace_usage[] = {
"perf trace [<options>] [<command>]",
"perf trace [<options>] -- <command> [<options>]",
"perf trace record [<options>] [<command>]",
const char *output_name = NULL;
const char *ev_qualifier_str = NULL;
const struct option trace_options[] = {
+ OPT_CALLBACK(0, "event", &trace.evlist, "event",
+ "event selector. use 'perf list' to list available events",
+ parse_events_option),
OPT_BOOLEAN(0, "comm", &trace.show_comm,
"show the thread COMM next to its id"),
OPT_BOOLEAN(0, "tool_stats", &trace.show_tool_stats, "show tool stats"),
"trace events on existing process id"),
OPT_STRING('t', "tid", &trace.opts.target.tid, "tid",
"trace events on existing thread id"),
+ OPT_CALLBACK(0, "filter-pids", &trace, "float",
+ "show only events with duration > N.M ms", trace__set_filter_pids),
OPT_BOOLEAN('a', "all-cpus", &trace.opts.target.system_wide,
"system-wide collection from all CPUs"),
OPT_STRING('C', "cpu", &trace.opts.target.cpu_list, "cpu",
OPT_CALLBACK_DEFAULT('F', "pf", &trace.trace_pgfaults, "all|maj|min",
"Trace pagefaults", parse_pagefaults, "maj"),
OPT_BOOLEAN(0, "syscalls", &trace.trace_syscalls, "Trace syscalls"),
+ OPT_BOOLEAN('f', "force", &trace.force, "don't complain, do it"),
OPT_END()
};
+ const char * const trace_subcommands[] = { "record", NULL };
int err;
char bf[BUFSIZ];
- argc = parse_options(argc, argv, trace_options, trace_usage,
- PARSE_OPT_STOP_AT_NON_OPTION);
+ signal(SIGSEGV, sighandler_dump_stack);
+ signal(SIGFPE, sighandler_dump_stack);
+
+ trace.evlist = perf_evlist__new();
+ if (trace.evlist == NULL)
+ return -ENOMEM;
+
+ if (trace.evlist == NULL) {
+ pr_err("Not enough memory to run!\n");
+ goto out;
+ }
+
+ argc = parse_options_subcommand(argc, argv, trace_options, trace_subcommands,
+ trace_usage, PARSE_OPT_STOP_AT_NON_OPTION);
if (trace.trace_pgfaults) {
trace.opts.sample_address = true;
trace.opts.sample_time = true;
}
+ if (trace.evlist->nr_entries > 0)
+ evlist__set_evsel_handler(trace.evlist, trace__event_handler);
+
if ((argc >= 1) && (strcmp(argv[0], "record") == 0))
return trace__record(&trace, argc-1, &argv[1]);
if (trace.summary_only)
trace.summary = trace.summary_only;
- if (!trace.trace_syscalls && !trace.trace_pgfaults) {
+ if (!trace.trace_syscalls && !trace.trace_pgfaults &&
+ trace.evlist->nr_entries == 0 /* Was --events used? */) {
pr_err("Please specify something to trace.\n");
return -1;
}
extern int cmd_trace(int argc, const char **argv, const char *prefix);
extern int cmd_inject(int argc, const char **argv, const char *prefix);
extern int cmd_mem(int argc, const char **argv, const char *prefix);
+extern int cmd_data(int argc, const char **argv, const char *prefix);
extern int find_scripts(char **scripts_array, char **scripts_path_array);
#endif
perf-bench mainporcelain common
perf-buildid-cache mainporcelain common
perf-buildid-list mainporcelain common
+perf-data mainporcelain common
perf-diff mainporcelain common
perf-evlist mainporcelain common
perf-inject mainporcelain common
obj-perf := $(abspath $(obj-perf))/
endif
-LIB_INCLUDE := $(srctree)/tools/lib/
+$(shell echo -n > .config-detected)
+detected = $(shell echo "$(1)=y" >> .config-detected)
+detected_var = $(shell echo "$(1)=$($(1))" >> .config-detected)
+
CFLAGS := $(EXTRA_CFLAGS) $(EXTRA_WARNINGS)
include $(src-perf)/config/Makefile.arch
+$(call detected_var,ARCH)
+
NO_PERF_REGS := 1
# Additional ARCH settings for x86
ifeq ($(ARCH),x86)
+ $(call detected,CONFIG_X86)
ifeq (${IS_64_BIT}, 1)
CFLAGS += -DHAVE_ARCH_X86_64_SUPPORT
ARCH_INCLUDE = ../../arch/x86/lib/memcpy_64.S ../../arch/x86/lib/memset_64.S
LIBUNWIND_LIBS = -lunwind -lunwind-x86_64
+ $(call detected,CONFIG_X86_64)
else
LIBUNWIND_LIBS = -lunwind -lunwind-x86
endif
LIBUNWIND_LIBS = -lunwind -lunwind-aarch64
endif
+ifeq ($(NO_PERF_REGS),0)
+ $(call detected,CONFIG_PERF_REGS)
+endif
+
# So far there's only x86 and arm libdw unwind support merged in perf.
# Disable it on all other architectures in case libdw unwind
# support is detected in system. Add supported architectures
FEATURE_CHECK_LDFLAGS-libdw-dwarf-unwind := $(LIBDW_LDFLAGS) -ldw
endif
+ifdef LIBBABELTRACE
+ # for linking with debug library, run like:
+ # make DEBUG=1 LIBBABELTRACE_DIR=/opt/libbabeltrace/
+ ifdef LIBBABELTRACE_DIR
+ LIBBABELTRACE_CFLAGS := -I$(LIBBABELTRACE_DIR)/include
+ LIBBABELTRACE_LDFLAGS := -L$(LIBBABELTRACE_DIR)/lib
+ endif
+ FEATURE_CHECK_CFLAGS-libbabeltrace := $(LIBBABELTRACE_CFLAGS)
+ FEATURE_CHECK_LDFLAGS-libbabeltrace := $(LIBBABELTRACE_LDFLAGS) -lbabeltrace-ctf
+endif
+
# include ARCH specific config
-include $(src-perf)/arch/$(ARCH)/Makefile
PARSER_DEBUG_BISON := -t
PARSER_DEBUG_FLEX := -d
CFLAGS += -DPARSER_DEBUG
+ $(call detected_var,PARSER_DEBUG_BISON)
+ $(call detected_var,PARSER_DEBUG_FLEX)
endif
ifndef NO_LIBPYTHON
EXTLIBS = -lpthread -lrt -lm -ldl
-ifneq ($(OUTPUT),)
- OUTPUT_FEATURES = $(OUTPUT)config/feature-checks/
- $(shell mkdir -p $(OUTPUT_FEATURES))
-endif
-
-feature_check = $(eval $(feature_check_code))
-define feature_check_code
- feature-$(1) := $(shell $(MAKE) OUTPUT=$(OUTPUT_FEATURES) CFLAGS="$(EXTRA_CFLAGS) $(FEATURE_CHECK_CFLAGS-$(1))" LDFLAGS="$(LDFLAGS) $(FEATURE_CHECK_LDFLAGS-$(1))" -C config/feature-checks test-$1.bin >/dev/null 2>/dev/null && echo 1 || echo 0)
-endef
-
-feature_set = $(eval $(feature_set_code))
-define feature_set_code
- feature-$(1) := 1
-endef
-
-#
-# Build the feature check binaries in parallel, ignore errors, ignore return value and suppress output:
-#
-
-#
-# Note that this is not a complete list of all feature tests, just
-# those that are typically built on a fully configured system.
-#
-# [ Feature tests not mentioned here have to be built explicitly in
-# the rule that uses them - an example for that is the 'bionic'
-# feature check. ]
-#
-CORE_FEATURE_TESTS = \
- backtrace \
- dwarf \
- fortify-source \
- sync-compare-and-swap \
- glibc \
- gtk2 \
- gtk2-infobar \
- libaudit \
- libbfd \
- libelf \
- libelf-getphdrnum \
- libelf-mmap \
- libnuma \
- libperl \
- libpython \
- libpython-version \
- libslang \
- libunwind \
- pthread-attr-setaffinity-np \
- stackprotector-all \
- timerfd \
- libdw-dwarf-unwind \
- zlib
-
-LIB_FEATURE_TESTS = \
- dwarf \
- glibc \
- gtk2 \
- libaudit \
- libbfd \
- libelf \
- libnuma \
- libperl \
- libpython \
- libslang \
- libunwind \
- libdw-dwarf-unwind \
- zlib
-
-VF_FEATURE_TESTS = \
- backtrace \
- fortify-source \
- sync-compare-and-swap \
- gtk2-infobar \
- libelf-getphdrnum \
- libelf-mmap \
- libpython-version \
- pthread-attr-setaffinity-np \
- stackprotector-all \
- timerfd \
- libunwind-debug-frame \
- bionic \
- liberty \
- liberty-z \
- cplus-demangle \
- compile-32 \
- compile-x32
-
-# Set FEATURE_CHECK_(C|LD)FLAGS-all for all CORE_FEATURE_TESTS features.
-# If in the future we need per-feature checks/flags for features not
-# mentioned in this list we need to refactor this ;-).
-set_test_all_flags = $(eval $(set_test_all_flags_code))
-define set_test_all_flags_code
- FEATURE_CHECK_CFLAGS-all += $(FEATURE_CHECK_CFLAGS-$(1))
- FEATURE_CHECK_LDFLAGS-all += $(FEATURE_CHECK_LDFLAGS-$(1))
-endef
-
-$(foreach feat,$(CORE_FEATURE_TESTS),$(call set_test_all_flags,$(feat)))
-
-#
-# Special fast-path for the 'all features are available' case:
-#
-$(call feature_check,all,$(MSG))
-
-#
-# Just in case the build freshly failed, make sure we print the
-# feature matrix:
-#
-ifeq ($(feature-all), 1)
- #
- # test-all.c passed - just set all the core feature flags to 1:
- #
- $(foreach feat,$(CORE_FEATURE_TESTS),$(call feature_set,$(feat)))
-else
- $(shell $(MAKE) OUTPUT=$(OUTPUT_FEATURES) CFLAGS="$(EXTRA_CFLAGS)" LDFLAGS=$(LDFLAGS) -i -j -C config/feature-checks $(addsuffix .bin,$(CORE_FEATURE_TESTS)) >/dev/null 2>&1)
- $(foreach feat,$(CORE_FEATURE_TESTS),$(call feature_check,$(feat)))
-endif
+include $(srctree)/tools/build/Makefile.feature
ifeq ($(feature-stackprotector-all), 1)
CFLAGS += -fstack-protector-all
CFLAGS += -I$(src-perf)/util
CFLAGS += -I$(src-perf)
-CFLAGS += -I$(LIB_INCLUDE)
+CFLAGS += -I$(srctree)/tools/lib/
CFLAGS += -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 -D_GNU_SOURCE
ifndef NO_LIBELF
CFLAGS += -DHAVE_LIBELF_SUPPORT
EXTLIBS += -lelf
+ $(call detected,CONFIG_LIBELF)
ifeq ($(feature-libelf-mmap), 1)
CFLAGS += -DHAVE_LIBELF_MMAP_SUPPORT
CFLAGS += -DHAVE_DWARF_SUPPORT $(LIBDW_CFLAGS)
LDFLAGS += $(LIBDW_LDFLAGS)
EXTLIBS += -ldw
+ $(call detected,CONFIG_DWARF)
endif # PERF_HAVE_DWARF_REGS
endif # NO_DWARF
endif # NO_LIBELF
dwarf-post-unwind := 0
else
dwarf-post-unwind-text := libdw
+ $(call detected,CONFIG_LIBDW_DWARF_UNWIND)
endif
else
dwarf-post-unwind-text := libunwind
+ $(call detected,CONFIG_LIBUNWIND)
# Enable libunwind support by default.
ifndef NO_LIBDW_DWARF_UNWIND
NO_LIBDW_DWARF_UNWIND := 1
ifeq ($(dwarf-post-unwind),1)
CFLAGS += -DHAVE_DWARF_UNWIND_SUPPORT
+ $(call detected,CONFIG_DWARF_UNWIND)
else
NO_DWARF_UNWIND := 1
endif
else
CFLAGS += -DHAVE_LIBAUDIT_SUPPORT
EXTLIBS += -laudit
+ $(call detected,CONFIG_AUDIT)
endif
endif
CFLAGS += -I/usr/include/slang
CFLAGS += -DHAVE_SLANG_SUPPORT
EXTLIBS += -lslang
+ $(call detected,CONFIG_SLANG)
endif
endif
ifneq ($(feature-libperl), 1)
CFLAGS += -DNO_LIBPERL
NO_LIBPERL := 1
- msg := $(warning Missing perl devel files. Disabling perl scripting support, consider installing perl-ExtUtils-Embed);
+ msg := $(warning Missing perl devel files. Disabling perl scripting support, please install perl-ExtUtils-Embed/libperl-dev);
else
LDFLAGS += $(PERL_EMBED_LDFLAGS)
EXTLIBS += $(PERL_EMBED_LIBADD)
+ $(call detected,CONFIG_LIBPERL)
endif
endif
disable-python = $(eval $(disable-python_code))
define disable-python_code
CFLAGS += -DNO_LIBPYTHON
- $(if $(1),$(warning No $(1) was found))
- $(warning Python support will not be built)
+ $(warning $1)
NO_LIBPYTHON := 1
endef
ifdef NO_LIBPYTHON
- $(call disable-python)
+ $(call disable-python,Python support disabled by user)
else
ifndef PYTHON
- $(call disable-python,python interpreter)
+ $(call disable-python,No python interpreter was found: disables Python support - please install python-devel/python-dev)
else
PYTHON_WORD := $(call shell-wordify,$(PYTHON))
ifndef PYTHON_CONFIG
- $(call disable-python,python-config tool)
+ $(call disable-python,No 'python-config' tool was found: disables Python support - please install python-devel/python-dev)
else
PYTHON_CONFIG_SQ := $(call shell-sq,$(PYTHON_CONFIG))
FLAGS_PYTHON_EMBED := $(PYTHON_EMBED_CCOPTS) $(PYTHON_EMBED_LDOPTS)
ifneq ($(feature-libpython), 1)
- $(call disable-python,Python.h (for Python 2.x))
+ $(call disable-python,No 'Python.h' (for Python 2.x support) was found: disables Python support - please install python-devel/python-dev)
else
ifneq ($(feature-libpython-version), 1)
LDFLAGS += $(PYTHON_EMBED_LDFLAGS)
EXTLIBS += $(PYTHON_EMBED_LIBADD)
LANG_BINDINGS += $(obj-perf)python/perf.so
+ $(call detected,CONFIG_LIBPYTHON)
endif
endif
endif
EXTLIBS += -liberty
CFLAGS += -DHAVE_CPLUS_DEMANGLE_SUPPORT
else
- msg := $(warning No bfd.h/libbfd found, install binutils-dev[el]/zlib-static to gain symbol demangling)
+ msg := $(warning No bfd.h/libbfd found, please install binutils-dev[el]/zlib-static/libiberty-dev to gain symbol demangling)
CFLAGS += -DNO_DEMANGLE
endif
endif
ifeq ($(feature-zlib), 1)
CFLAGS += -DHAVE_ZLIB_SUPPORT
EXTLIBS += -lz
+ $(call detected,CONFIG_ZLIB)
else
NO_ZLIB := 1
endif
endif
+ifndef NO_LZMA
+ ifeq ($(feature-lzma), 1)
+ CFLAGS += -DHAVE_LZMA_SUPPORT
+ EXTLIBS += -llzma
+ $(call detected,CONFIG_LZMA)
+ else
+ msg := $(warning No liblzma found, disables xz kernel module decompression, please install xz-devel/liblzma-dev);
+ NO_LZMA := 1
+ endif
+endif
+
ifndef NO_BACKTRACE
ifeq ($(feature-backtrace), 1)
CFLAGS += -DHAVE_BACKTRACE_SUPPORT
else
CFLAGS += -DHAVE_LIBNUMA_SUPPORT
EXTLIBS += -lnuma
+ $(call detected,CONFIG_NUMA)
endif
endif
NO_PERF_READ_VDSO32 := 1
endif
endif
- ifneq (${IS_X86_64}, 1)
+ ifneq ($(ARCH), x86)
NO_PERF_READ_VDSOX32 := 1
endif
ifndef NO_PERF_READ_VDSOX32
NO_PERF_READ_VDSOX32 := 1
endif
+ifdef LIBBABELTRACE
+ $(call feature_check,libbabeltrace)
+ ifeq ($(feature-libbabeltrace), 1)
+ CFLAGS += -DHAVE_LIBBABELTRACE_SUPPORT $(LIBBABELTRACE_CFLAGS)
+ LDFLAGS += $(LIBBABELTRACE_LDFLAGS)
+ EXTLIBS += -lbabeltrace-ctf
+ $(call detected,CONFIG_LIBBABELTRACE)
+ else
+ msg := $(warning No libbabeltrace found, disables 'perf data' CTF format support, please install libbabeltrace-dev[el]/libbabeltrace-ctf-dev);
+ endif
+endif
+
# Among the variables below, these:
# perfexecdir
# template_dir
ETC_PERFCONFIG = etc/perfconfig
endif
ifndef lib
-ifeq ($(IS_X86_64),1)
+ifeq ($(ARCH)$(IS_64_BIT), x861)
lib = lib64
else
lib = lib
plugindir_SQ= $(subst ','\'',$(plugindir))
endif
-#
-# Print the result of the feature test:
-#
-feature_print_status = $(eval $(feature_print_status_code)) $(info $(MSG))
-
-define feature_print_status_code
- ifeq ($(feature-$(1)), 1)
- MSG = $(shell printf '...%30s: [ \033[32mon\033[m ]' $(1))
- else
- MSG = $(shell printf '...%30s: [ \033[31mOFF\033[m ]' $(1))
- endif
-endef
-
-feature_print_var = $(eval $(feature_print_var_code)) $(info $(MSG))
-define feature_print_var_code
+print_var = $(eval $(print_var_code)) $(info $(MSG))
+define print_var_code
MSG = $(shell printf '...%30s: %s' $(1) $($(1)))
endef
-feature_print_text = $(eval $(feature_print_text_code)) $(info $(MSG))
-define feature_print_text_code
- MSG = $(shell printf '...%30s: %s' $(1) $(2))
-endef
-
-PERF_FEATURES := $(foreach feat,$(LIB_FEATURE_TESTS),feature-$(feat)($(feature-$(feat))))
-PERF_FEATURES_FILE := $(shell touch $(OUTPUT)PERF-FEATURES; cat $(OUTPUT)PERF-FEATURES)
-
-ifeq ($(dwarf-post-unwind),1)
- PERF_FEATURES += dwarf-post-unwind($(dwarf-post-unwind-text))
-endif
-
-# The $(display_lib) controls the default detection message
-# output. It's set if:
-# - detected features differes from stored features from
-# last build (in PERF-FEATURES file)
-# - one of the $(LIB_FEATURE_TESTS) is not detected
-# - VF is enabled
-
-ifneq ("$(PERF_FEATURES)","$(PERF_FEATURES_FILE)")
- $(shell echo "$(PERF_FEATURES)" > $(OUTPUT)PERF-FEATURES)
- display_lib := 1
-endif
-
-feature_check = $(eval $(feature_check_code))
-define feature_check_code
- ifneq ($(feature-$(1)), 1)
- display_lib := 1
- endif
-endef
-
-$(foreach feat,$(LIB_FEATURE_TESTS),$(call feature_check,$(feat)))
-
ifeq ($(VF),1)
- display_lib := 1
- display_vf := 1
-endif
-
-ifeq ($(display_lib),1)
+ $(call print_var,prefix)
+ $(call print_var,bindir)
+ $(call print_var,libdir)
+ $(call print_var,sysconfdir)
+ $(call print_var,LIBUNWIND_DIR)
+ $(call print_var,LIBDW_DIR)
$(info )
- $(info Auto-detecting system features:)
- $(foreach feat,$(LIB_FEATURE_TESTS),$(call feature_print_status,$(feat),))
-
- ifeq ($(dwarf-post-unwind),1)
- $(call feature_print_text,"DWARF post unwind library", $(dwarf-post-unwind-text))
- endif
-endif
-
-ifeq ($(display_vf),1)
- $(foreach feat,$(VF_FEATURE_TESTS),$(call feature_print_status,$(feat),))
- $(info )
- $(call feature_print_var,prefix)
- $(call feature_print_var,bindir)
- $(call feature_print_var,libdir)
- $(call feature_print_var,sysconfdir)
- $(call feature_print_var,LIBUNWIND_DIR)
- $(call feature_print_var,LIBDW_DIR)
endif
-ifeq ($(display_lib),1)
- $(info )
-endif
+$(call detected_var,bindir_SQ)
+$(call detected_var,PYTHON_WORD)
+ifneq ($(OUTPUT),)
+$(call detected_var,OUTPUT)
+endif
+$(call detected_var,htmldir_SQ)
+$(call detected_var,infodir_SQ)
+$(call detected_var,mandir_SQ)
+$(call detected_var,ETC_PERFCONFIG_SQ)
+$(call detected_var,prefix_SQ)
+$(call detected_var,perfexecdir_SQ)
+$(call detected_var,LIBDIR)
+$(call detected_var,GTK_CFLAGS)
+$(call detected_var,PERL_EMBED_CCOPTS)
+$(call detected_var,PYTHON_EMBED_CCOPTS)
+ifndef ARCH
+ARCH := $(shell uname -m 2>/dev/null || echo not)
+endif
-uname_M := $(shell uname -m 2>/dev/null || echo not)
-
-RAW_ARCH := $(shell echo $(uname_M) | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
- -e s/arm.*/arm/ -e s/sa110/arm/ \
+ARCH := $(shell echo $(ARCH) | sed -e s/i.86/x86/ -e s/x86_64/x86/ \
+ -e s/sun4u/sparc/ -e s/sparc64/sparc/ \
+ -e /arm64/!s/arm.*/arm/ -e s/sa110/arm/ \
-e s/s390x/s390/ -e s/parisc64/parisc/ \
-e s/ppc.*/powerpc/ -e s/mips.*/mips/ \
-e s/sh[234].*/sh/ -e s/aarch64.*/arm64/ \
-e s/tile.*/tile/ )
-# Additional ARCH settings for x86
-ifeq ($(RAW_ARCH),i386)
- ARCH ?= x86
-endif
-
-ifeq ($(RAW_ARCH),x86_64)
- ARCH ?= x86
-
- ifneq (, $(findstring m32,$(CFLAGS)))
- RAW_ARCH := x86_32
- endif
-endif
-
-ifeq ($(RAW_ARCH),sparc64)
- ARCH ?= sparc
-endif
-
-ARCH ?= $(RAW_ARCH)
-
LP64 := $(shell echo __LP64__ | ${CC} ${CFLAGS} -E -x c - | tail -n 1)
ifeq ($(LP64), 1)
IS_64_BIT := 1
+++ /dev/null
-*.d
-*.bin
+++ /dev/null
-
-FILES= \
- test-all.bin \
- test-backtrace.bin \
- test-bionic.bin \
- test-dwarf.bin \
- test-fortify-source.bin \
- test-sync-compare-and-swap.bin \
- test-glibc.bin \
- test-gtk2.bin \
- test-gtk2-infobar.bin \
- test-hello.bin \
- test-libaudit.bin \
- test-libbfd.bin \
- test-liberty.bin \
- test-liberty-z.bin \
- test-cplus-demangle.bin \
- test-libelf.bin \
- test-libelf-getphdrnum.bin \
- test-libelf-mmap.bin \
- test-libnuma.bin \
- test-libperl.bin \
- test-libpython.bin \
- test-libpython-version.bin \
- test-libslang.bin \
- test-libunwind.bin \
- test-libunwind-debug-frame.bin \
- test-pthread-attr-setaffinity-np.bin \
- test-stackprotector-all.bin \
- test-timerfd.bin \
- test-libdw-dwarf-unwind.bin \
- test-compile-32.bin \
- test-compile-x32.bin \
- test-zlib.bin
-
-CC := $(CROSS_COMPILE)gcc -MD
-PKG_CONFIG := $(CROSS_COMPILE)pkg-config
-
-all: $(FILES)
-
-BUILD = $(CC) $(CFLAGS) -o $(OUTPUT)$@ $(patsubst %.bin,%.c,$@) $(LDFLAGS)
-
-###############################
-
-test-all.bin:
- $(BUILD) -Werror -fstack-protector-all -O2 -Werror -D_FORTIFY_SOURCE=2 -ldw -lelf -lnuma -lelf -laudit -I/usr/include/slang -lslang $(shell $(PKG_CONFIG) --libs --cflags gtk+-2.0 2>/dev/null) $(FLAGS_PERL_EMBED) $(FLAGS_PYTHON_EMBED) -DPACKAGE='"perf"' -lbfd -ldl -lz
-
-test-hello.bin:
- $(BUILD)
-
-test-pthread-attr-setaffinity-np.bin:
- $(BUILD) -D_GNU_SOURCE -Werror -lpthread
-
-test-stackprotector-all.bin:
- $(BUILD) -Werror -fstack-protector-all
-
-test-fortify-source.bin:
- $(BUILD) -O2 -Werror -D_FORTIFY_SOURCE=2
-
-test-bionic.bin:
- $(BUILD)
-
-test-libelf.bin:
- $(BUILD) -lelf
-
-test-glibc.bin:
- $(BUILD)
-
-test-dwarf.bin:
- $(BUILD) -ldw
-
-test-libelf-mmap.bin:
- $(BUILD) -lelf
-
-test-libelf-getphdrnum.bin:
- $(BUILD) -lelf
-
-test-libnuma.bin:
- $(BUILD) -lnuma
-
-test-libunwind.bin:
- $(BUILD) -lelf
-
-test-libunwind-debug-frame.bin:
- $(BUILD) -lelf
-
-test-libaudit.bin:
- $(BUILD) -laudit
-
-test-libslang.bin:
- $(BUILD) -I/usr/include/slang -lslang
-
-test-gtk2.bin:
- $(BUILD) $(shell $(PKG_CONFIG) --libs --cflags gtk+-2.0 2>/dev/null)
-
-test-gtk2-infobar.bin:
- $(BUILD) $(shell $(PKG_CONFIG) --libs --cflags gtk+-2.0 2>/dev/null)
-
-grep-libs = $(filter -l%,$(1))
-strip-libs = $(filter-out -l%,$(1))
-
-PERL_EMBED_LDOPTS = $(shell perl -MExtUtils::Embed -e ldopts 2>/dev/null)
-PERL_EMBED_LDFLAGS = $(call strip-libs,$(PERL_EMBED_LDOPTS))
-PERL_EMBED_LIBADD = $(call grep-libs,$(PERL_EMBED_LDOPTS))
-PERL_EMBED_CCOPTS = `perl -MExtUtils::Embed -e ccopts 2>/dev/null`
-FLAGS_PERL_EMBED=$(PERL_EMBED_CCOPTS) $(PERL_EMBED_LDOPTS)
-
-test-libperl.bin:
- $(BUILD) $(FLAGS_PERL_EMBED)
-
-test-libpython.bin:
- $(BUILD)
-
-test-libpython-version.bin:
- $(BUILD)
-
-test-libbfd.bin:
- $(BUILD) -DPACKAGE='"perf"' -lbfd -lz -liberty -ldl
-
-test-liberty.bin:
- $(CC) -o $(OUTPUT)$@ test-libbfd.c -DPACKAGE='"perf"' -lbfd -ldl -liberty
-
-test-liberty-z.bin:
- $(CC) -o $(OUTPUT)$@ test-libbfd.c -DPACKAGE='"perf"' -lbfd -ldl -liberty -lz
-
-test-cplus-demangle.bin:
- $(BUILD) -liberty
-
-test-backtrace.bin:
- $(BUILD)
-
-test-timerfd.bin:
- $(BUILD)
-
-test-libdw-dwarf-unwind.bin:
- $(BUILD)
-
-test-sync-compare-and-swap.bin:
- $(BUILD) -Werror
-
-test-compile-32.bin:
- $(CC) -m32 -o $(OUTPUT)$@ test-compile.c
-
-test-compile-x32.bin:
- $(CC) -mx32 -o $(OUTPUT)$@ test-compile.c
-
-test-zlib.bin:
- $(BUILD) -lz
-
--include *.d
-
-###############################
-
-clean:
- rm -f $(FILES) *.d
+++ /dev/null
-/*
- * test-all.c: Try to build all the main testcases at once.
- *
- * A well-configured system will have all the prereqs installed, so we can speed
- * up auto-detection on such systems.
- */
-
-/*
- * Quirk: Python and Perl headers cannot be in arbitrary places, so keep
- * these 3 testcases at the top:
- */
-#define main main_test_libpython
-# include "test-libpython.c"
-#undef main
-
-#define main main_test_libpython_version
-# include "test-libpython-version.c"
-#undef main
-
-#define main main_test_libperl
-# include "test-libperl.c"
-#undef main
-
-#define main main_test_hello
-# include "test-hello.c"
-#undef main
-
-#define main main_test_libelf
-# include "test-libelf.c"
-#undef main
-
-#define main main_test_libelf_mmap
-# include "test-libelf-mmap.c"
-#undef main
-
-#define main main_test_glibc
-# include "test-glibc.c"
-#undef main
-
-#define main main_test_dwarf
-# include "test-dwarf.c"
-#undef main
-
-#define main main_test_libelf_getphdrnum
-# include "test-libelf-getphdrnum.c"
-#undef main
-
-#define main main_test_libunwind
-# include "test-libunwind.c"
-#undef main
-
-#define main main_test_libaudit
-# include "test-libaudit.c"
-#undef main
-
-#define main main_test_libslang
-# include "test-libslang.c"
-#undef main
-
-#define main main_test_gtk2
-# include "test-gtk2.c"
-#undef main
-
-#define main main_test_gtk2_infobar
-# include "test-gtk2-infobar.c"
-#undef main
-
-#define main main_test_libbfd
-# include "test-libbfd.c"
-#undef main
-
-#define main main_test_backtrace
-# include "test-backtrace.c"
-#undef main
-
-#define main main_test_libnuma
-# include "test-libnuma.c"
-#undef main
-
-#define main main_test_timerfd
-# include "test-timerfd.c"
-#undef main
-
-#define main main_test_stackprotector_all
-# include "test-stackprotector-all.c"
-#undef main
-
-#define main main_test_libdw_dwarf_unwind
-# include "test-libdw-dwarf-unwind.c"
-#undef main
-
-#define main main_test_sync_compare_and_swap
-# include "test-sync-compare-and-swap.c"
-#undef main
-
-#define main main_test_zlib
-# include "test-zlib.c"
-#undef main
-
-#define main main_test_pthread_attr_setaffinity_np
-# include "test-pthread_attr_setaffinity_np.c"
-#undef main
-
-int main(int argc, char *argv[])
-{
- main_test_libpython();
- main_test_libpython_version();
- main_test_libperl();
- main_test_hello();
- main_test_libelf();
- main_test_libelf_mmap();
- main_test_glibc();
- main_test_dwarf();
- main_test_libelf_getphdrnum();
- main_test_libunwind();
- main_test_libaudit();
- main_test_libslang();
- main_test_gtk2(argc, argv);
- main_test_gtk2_infobar(argc, argv);
- main_test_libbfd();
- main_test_backtrace();
- main_test_libnuma();
- main_test_timerfd();
- main_test_stackprotector_all();
- main_test_libdw_dwarf_unwind();
- main_test_sync_compare_and_swap(argc, argv);
- main_test_zlib();
- main_test_pthread_attr_setaffinity_np();
-
- return 0;
-}
+++ /dev/null
-#include <execinfo.h>
-#include <stdio.h>
-
-int main(void)
-{
- void *backtrace_fns[10];
- size_t entries;
-
- entries = backtrace(backtrace_fns, 10);
- backtrace_symbols_fd(backtrace_fns, entries, 1);
-
- return 0;
-}
+++ /dev/null
-#include <android/api-level.h>
-
-int main(void)
-{
- return __ANDROID_API__;
-}
+++ /dev/null
-int main(void)
-{
- return 0;
-}
+++ /dev/null
-extern int printf(const char *format, ...);
-extern char *cplus_demangle(const char *, int);
-
-int main(void)
-{
- char symbol[4096] = "FieldName__9ClassNameFd";
- char *tmp;
-
- tmp = cplus_demangle(symbol, 0);
-
- printf("demangled symbol: {%s}\n", tmp);
-
- return 0;
-}
+++ /dev/null
-#include <dwarf.h>
-#include <elfutils/libdw.h>
-#include <elfutils/version.h>
-
-int main(void)
-{
- Dwarf *dbg = dwarf_begin(0, DWARF_C_READ);
-
- return (long)dbg;
-}
+++ /dev/null
-#include <stdio.h>
-
-int main(void)
-{
- return puts("hi");
-}
+++ /dev/null
-#include <gnu/libc-version.h>
-
-int main(void)
-{
- const char *version = gnu_get_libc_version();
-
- return (long)version;
-}
+++ /dev/null
-#pragma GCC diagnostic ignored "-Wstrict-prototypes"
-#include <gtk/gtk.h>
-#pragma GCC diagnostic error "-Wstrict-prototypes"
-
-int main(int argc, char *argv[])
-{
- gtk_init(&argc, &argv);
- gtk_info_bar_new();
-
- return 0;
-}
+++ /dev/null
-#pragma GCC diagnostic ignored "-Wstrict-prototypes"
-#include <gtk/gtk.h>
-#pragma GCC diagnostic error "-Wstrict-prototypes"
-
-int main(int argc, char *argv[])
-{
- gtk_init(&argc, &argv);
-
- return 0;
-}
+++ /dev/null
-#include <stdio.h>
-
-int main(void)
-{
- return puts("hi");
-}
+++ /dev/null
-#include <libaudit.h>
-
-extern int printf(const char *format, ...);
-
-int main(void)
-{
- printf("error message: %s\n", audit_errno_to_name(0));
-
- return audit_open();
-}
+++ /dev/null
-#include <bfd.h>
-
-extern int printf(const char *format, ...);
-
-int main(void)
-{
- char symbol[4096] = "FieldName__9ClassNameFd";
- char *tmp;
-
- tmp = bfd_demangle(0, symbol, 0);
-
- printf("demangled symbol: {%s}\n", tmp);
-
- return 0;
-}
+++ /dev/null
-
-#include <elfutils/libdwfl.h>
-
-int main(void)
-{
- /*
- * This function is guarded via: __nonnull_attribute__ (1, 2).
- * Passing '1' as arguments value. This code is never executed,
- * only compiled.
- */
- dwfl_thread_getframes((void *) 1, (void *) 1, NULL);
- return 0;
-}
+++ /dev/null
-#include <libelf.h>
-
-int main(void)
-{
- size_t dst;
-
- return elf_getphdrnum(0, &dst);
-}
+++ /dev/null
-#include <libelf.h>
-
-int main(void)
-{
- Elf *elf = elf_begin(0, ELF_C_READ_MMAP, 0);
-
- return (long)elf;
-}
+++ /dev/null
-#include <libelf.h>
-
-int main(void)
-{
- Elf *elf = elf_begin(0, ELF_C_READ, 0);
-
- return (long)elf;
-}
+++ /dev/null
-#include <numa.h>
-#include <numaif.h>
-
-int main(void)
-{
- numa_available();
-
- return 0;
-}
+++ /dev/null
-#include <EXTERN.h>
-#include <perl.h>
-
-int main(void)
-{
- perl_alloc();
-
- return 0;
-}
+++ /dev/null
-#include <Python.h>
-
-#if PY_VERSION_HEX >= 0x03000000
- #error
-#endif
-
-int main(void)
-{
- return 0;
-}
+++ /dev/null
-#include <Python.h>
-
-int main(void)
-{
- Py_Initialize();
-
- return 0;
-}
+++ /dev/null
-#include <slang.h>
-
-int main(void)
-{
- return SLsmg_init_smg();
-}
+++ /dev/null
-#include <libunwind.h>
-#include <stdlib.h>
-
-extern int
-UNW_OBJ(dwarf_find_debug_frame) (int found, unw_dyn_info_t *di_debug,
- unw_word_t ip, unw_word_t segbase,
- const char *obj_name, unw_word_t start,
- unw_word_t end);
-
-#define dwarf_find_debug_frame UNW_OBJ(dwarf_find_debug_frame)
-
-int main(void)
-{
- dwarf_find_debug_frame(0, NULL, 0, 0, NULL, 0, 0);
- return 0;
-}
+++ /dev/null
-#include <libunwind.h>
-#include <stdlib.h>
-
-extern int UNW_OBJ(dwarf_search_unwind_table) (unw_addr_space_t as,
- unw_word_t ip,
- unw_dyn_info_t *di,
- unw_proc_info_t *pi,
- int need_unwind_info, void *arg);
-
-
-#define dwarf_search_unwind_table UNW_OBJ(dwarf_search_unwind_table)
-
-static unw_accessors_t accessors;
-
-int main(void)
-{
- unw_addr_space_t addr_space;
-
- addr_space = unw_create_addr_space(&accessors, 0);
- if (addr_space)
- return 0;
-
- unw_init_remote(NULL, addr_space, NULL);
- dwarf_search_unwind_table(addr_space, 0, NULL, NULL, 0, NULL);
-
- return 0;
-}
+++ /dev/null
-#include <stdint.h>
-#include <pthread.h>
-
-int main(void)
-{
- int ret = 0;
- pthread_attr_t thread_attr;
- cpu_set_t cs;
-
- pthread_attr_init(&thread_attr);
- /* don't care abt exact args, just the API itself in libpthread */
- ret = pthread_attr_setaffinity_np(&thread_attr, sizeof(cs), &cs);
-
- return ret;
-}
+++ /dev/null
-#include <stdio.h>
-
-int main(void)
-{
- return puts("hi");
-}
+++ /dev/null
-#include <stdint.h>
-
-volatile uint64_t x;
-
-int main(int argc, char *argv[])
-{
- uint64_t old, new = argc;
-
- argv = argv;
- do {
- old = __sync_val_compare_and_swap(&x, 0, 0);
- } while (!__sync_bool_compare_and_swap(&x, old, new));
- return old == new;
-}
+++ /dev/null
-/*
- * test for timerfd functions used by perf-kvm-stat-live
- */
-#include <sys/timerfd.h>
-
-int main(void)
-{
- struct itimerspec new_value;
-
- int fd = timerfd_create(CLOCK_MONOTONIC, TFD_NONBLOCK);
- if (fd < 0)
- return 1;
-
- if (timerfd_settime(fd, 0, &new_value, NULL) != 0)
- return 1;
-
- return 0;
-}
+++ /dev/null
-#include <zlib.h>
-
-int main(void)
-{
- z_stream zs;
-
- inflateInit(&zs);
- return 0;
-}
define get-executable-or-default
$(if $($(1)),$(call _ge_attempt,$($(1)),$(1)),$(call _ge_attempt,$(2)))
endef
-_ge_attempt = $(if $(get-executable),$(get-executable),$(_gea_warn)$(call _gea_err,$(2)))
-_gea_warn = $(warning The path '$(1)' is not executable.)
+_ge_attempt = $(if $(get-executable),$(get-executable),$(call _gea_err,$(2)))
_gea_err = $(if $(1),$(error Please set '$(1)' appropriately))
done
}
-type _get_comp_words_by_ref &>/dev/null ||
-_get_comp_words_by_ref()
+# Define preload_get_comp_words_by_ref="false", if the function
+# __perf_get_comp_words_by_ref() is required instead.
+preload_get_comp_words_by_ref="true"
+
+if [ $preload_get_comp_words_by_ref = "true" ]; then
+ type _get_comp_words_by_ref &>/dev/null ||
+ preload_get_comp_words_by_ref="false"
+fi
+[ $preload_get_comp_words_by_ref = "true" ] ||
+__perf_get_comp_words_by_ref()
{
local exclude cur_ words_ cword_
if [ "$1" = "-n" ]; then
done
}
-type __ltrim_colon_completions &>/dev/null ||
-__ltrim_colon_completions()
+# Define preload__ltrim_colon_completions="false", if the function
+# __perf__ltrim_colon_completions() is required instead.
+preload__ltrim_colon_completions="true"
+
+if [ $preload__ltrim_colon_completions = "true" ]; then
+ type __ltrim_colon_completions &>/dev/null ||
+ preload__ltrim_colon_completions="false"
+fi
+[ $preload__ltrim_colon_completions = "true" ] ||
+__perf__ltrim_colon_completions()
{
if [[ "$1" == *:* && "$COMP_WORDBREAKS" == *:* ]]; then
# Remove colon-word prefix from COMPREPLY items
__perfcomp_colon ()
{
__perfcomp "$1" "$2"
- __ltrim_colon_completions $cur
+ if [ $preload__ltrim_colon_completions = "true" ]; then
+ __ltrim_colon_completions $cur
+ else
+ __perf__ltrim_colon_completions $cur
+ fi
+}
+
+__perf_prev_skip_opts ()
+{
+ local i cmd_ cmds_
+
+ let i=cword-1
+ cmds_=$($cmd $1 --list-cmds)
+ prev_skip_opts=()
+ while [ $i -ge 0 ]; do
+ if [[ ${words[i]} == $1 ]]; then
+ return
+ fi
+ for cmd_ in $cmds_; do
+ if [[ ${words[i]} == $cmd_ ]]; then
+ prev_skip_opts=${words[i]}
+ return
+ fi
+ done
+ ((i--))
+ done
}
__perf_main ()
cmd=${words[0]}
COMPREPLY=()
+ # Skip options backward and find the last perf command
+ __perf_prev_skip_opts
# List perf subcommands or long options
- if [ $cword -eq 1 ]; then
+ if [ -z $prev_skip_opts ]; then
if [[ $cur == --* ]]; then
- __perfcomp '--help --version \
- --exec-path --html-path --paginate --no-pager \
- --perf-dir --work-tree --debugfs-dir' -- "$cur"
+ cmds=$($cmd --list-opts)
else
cmds=$($cmd --list-cmds)
- __perfcomp "$cmds" "$cur"
fi
+ __perfcomp "$cmds" "$cur"
# List possible events for -e option
- elif [[ $prev == "-e" && "${words[1]}" == @(record|stat|top) ]]; then
+ elif [[ $prev == @("-e"|"--event") &&
+ $prev_skip_opts == @(record|stat|top) ]]; then
evts=$($cmd list --raw-dump)
__perfcomp_colon "$evts" "$cur"
- # List subcommands for perf commands
- elif [[ $prev == @(kvm|kmem|mem|lock|sched) ]]; then
- subcmds=$($cmd $prev --list-cmds)
- __perfcomp_colon "$subcmds" "$cur"
- # List long option names
- elif [[ $cur == --* ]]; then
- subcmd=${words[1]}
- opts=$($cmd $subcmd --list-opts)
- __perfcomp "$opts" "$cur"
+ else
+ # List subcommands for perf commands
+ if [[ $prev_skip_opts == @(kvm|kmem|mem|lock|sched|
+ |data|help|script|test|timechart|trace) ]]; then
+ subcmds=$($cmd $prev_skip_opts --list-cmds)
+ __perfcomp_colon "$subcmds" "$cur"
+ fi
+ # List long option names
+ if [[ $cur == --* ]]; then
+ subcmd=$prev_skip_opts
+ __perf_prev_skip_opts $subcmd
+ subcmd=$subcmd" "$prev_skip_opts
+ opts=$($cmd $subcmd --list-opts)
+ __perfcomp "$opts" "$cur"
+ fi
fi
}
_perf()
{
local cur words cword prev
- _get_comp_words_by_ref -n =: cur words cword prev
+ if [ $preload_get_comp_words_by_ref = "true" ]; then
+ _get_comp_words_by_ref -n =: cur words cword prev
+ else
+ __perf_get_comp_words_by_ref -n =: cur words cword prev
+ fi
__perf_main
} &&
#include "util/quote.h"
#include "util/run-command.h"
#include "util/parse-events.h"
+#include "util/parse-options.h"
#include "util/debug.h"
#include <api/fs/debugfs.h>
#include <pthread.h>
#endif
{ "inject", cmd_inject, 0 },
{ "mem", cmd_mem, 0 },
+ { "data", cmd_data, 0 },
};
struct pager_config {
}
}
+struct option options[] = {
+ OPT_ARGUMENT("help", "help"),
+ OPT_ARGUMENT("version", "version"),
+ OPT_ARGUMENT("exec-path", "exec-path"),
+ OPT_ARGUMENT("html-path", "html-path"),
+ OPT_ARGUMENT("paginate", "paginate"),
+ OPT_ARGUMENT("no-pager", "no-pager"),
+ OPT_ARGUMENT("perf-dir", "perf-dir"),
+ OPT_ARGUMENT("work-tree", "work-tree"),
+ OPT_ARGUMENT("debugfs-dir", "debugfs-dir"),
+ OPT_ARGUMENT("buildid-dir", "buildid-dir"),
+ OPT_ARGUMENT("list-cmds", "list-cmds"),
+ OPT_ARGUMENT("list-opts", "list-opts"),
+ OPT_ARGUMENT("debug", "debug"),
+ OPT_END()
+};
+
static int handle_options(const char ***argv, int *argc, int *envchanged)
{
int handled = 0;
struct cmd_struct *p = commands+i;
printf("%s ", p->cmd);
}
+ putchar('\n');
+ exit(0);
+ } else if (!strcmp(cmd, "--list-opts")) {
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(options)-1; i++) {
+ struct option *p = options+i;
+ printf("--%s ", p->long_name);
+ }
+ putchar('\n');
exit(0);
} else if (!strcmp(cmd, "--debug")) {
if (*argc < 2) {
return ts.tv_sec * 1000000000ULL + ts.tv_nsec;
}
-#define MAX_NR_CPUS 256
+#define MAX_NR_CPUS 1024
extern const char *input_name;
extern bool perf_host, perf_guest;
bool sample_time;
bool period;
bool sample_intr_regs;
+ bool running_time;
unsigned int freq;
unsigned int mmap_pages;
unsigned int user_freq;
u64 user_interval;
bool sample_transaction;
unsigned initial_delay;
+ bool use_clockid;
+ clockid_t clockid;
};
struct option;
--- /dev/null
+libperf-$(CONFIG_LIBPERL) += perl/Perf-Trace-Util/
+libperf-$(CONFIG_LIBPYTHON) += python/Perf-Trace-Util/
--- /dev/null
+libperf-y += Context.o
+
+CFLAGS_Context.o += $(PERL_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-nested-externs -Wno-undef -Wno-switch-default
--- /dev/null
+libperf-y += Context.o
+
+CFLAGS_Context.o += $(PYTHON_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-nested-externs
--- /dev/null
+perf-y += builtin-test.o
+perf-y += parse-events.o
+perf-y += dso-data.o
+perf-y += attr.o
+perf-y += vmlinux-kallsyms.o
+perf-y += open-syscall.o
+perf-y += open-syscall-all-cpus.o
+perf-y += open-syscall-tp-fields.o
+perf-y += mmap-basic.o
+perf-y += perf-record.o
+perf-y += rdpmc.o
+perf-y += evsel-roundtrip-name.o
+perf-y += evsel-tp-sched.o
+perf-y += fdarray.o
+perf-y += pmu.o
+perf-y += hists_common.o
+perf-y += hists_link.o
+perf-y += hists_filter.o
+perf-y += hists_output.o
+perf-y += hists_cumulate.o
+perf-y += python-use.o
+perf-y += bp_signal.o
+perf-y += bp_signal_overflow.o
+perf-y += task-exit.o
+perf-y += sw-clock.o
+perf-y += mmap-thread-lookup.o
+perf-y += thread-mg-share.o
+perf-y += switch-tracking.o
+perf-y += keep-tracking.o
+perf-y += code-reading.o
+perf-y += sample-parsing.o
+perf-y += parse-no-sample-id-all.o
+perf-y += kmod-path.o
+
+perf-$(CONFIG_X86) += perf-time-to-tsc.o
+
+ifeq ($(ARCH),$(filter $(ARCH),x86 arm))
+perf-$(CONFIG_DWARF_UNWIND) += dwarf-unwind.o
+endif
+
+CFLAGS_attr.o += -DBINDIR="BUILD_STR($(bindir_SQ))" -DPYTHON="BUILD_STR($(PYTHON_WORD))"
+CFLAGS_python-use.o += -DPYTHONPATH="BUILD_STR($(OUTPUT)python)" -DPYTHON="BUILD_STR($(PYTHON_WORD))"
+CFLAGS_dwarf-unwind.o += -fno-optimize-sibling-calls
flags=0|8
cpu=*
type=0|1
-size=104
+size=112
config=0
sample_period=4000
sample_type=263
flags=0|8
cpu=*
type=0
-size=104
+size=112
config=0
sample_period=0
sample_type=0
.desc = "Add fd to a fdarray, making it autogrow",
.func = test__fdarray__add,
},
+ {
+ .desc = "Test kmod_path__parse function",
+ .func = test__kmod_path__parse,
+ },
{
.func = NULL,
},
int cmd_test(int argc, const char **argv, const char *prefix __maybe_unused)
{
- const char * const test_usage[] = {
+ const char *test_usage[] = {
"perf test [<options>] [{list <test-name-fragment>|[<test-name-fragments>|<test-numbers>]}]",
NULL,
};
"be more verbose (show symbol address, etc)"),
OPT_END()
};
+ const char * const test_subcommands[] = { "list", NULL };
struct intlist *skiplist = NULL;
int ret = hists__init();
if (ret < 0)
return ret;
- argc = parse_options(argc, argv, test_options, test_usage, 0);
+ argc = parse_options_subcommand(argc, argv, test_options, test_subcommands, test_usage, 0);
if (argc >= 1 && !strcmp(argv[0], "list"))
return perf_test__list(argc, argv);
dso = dso__new((const char *)file);
+ TEST_ASSERT_VAL("Failed to access to dso",
+ dso__data_fd(dso, &machine) >= 0);
+
/* Basic 10 bytes tests. */
for (i = 0; i < ARRAY_SIZE(offsets); i++) {
struct test_data_offset *data = &offsets[i];
limit = nr * 4;
TEST_ASSERT_VAL("failed to set file limit", !set_fd_limit(limit));
- /* and this is now our dso open FDs limit + 1 extra */
- dso_cnt = limit / 2 + 1;
+ /* and this is now our dso open FDs limit */
+ dso_cnt = limit / 2;
TEST_ASSERT_VAL("failed to create dsos\n",
!dsos__create(dso_cnt, TEST_FILE_SIZE));
struct dso *dso = dsos[i];
/*
- * Open dsos via dso__data_fd or dso__data_read_offset.
- * Both opens the data file and keep it open.
+ * Open dsos via dso__data_fd(), it opens the data
+ * file and keep it open (unless open file limit).
*/
+ fd = dso__data_fd(dso, &machine);
+ TEST_ASSERT_VAL("failed to get fd", fd > 0);
+
if (i % 2) {
- fd = dso__data_fd(dso, &machine);
- TEST_ASSERT_VAL("failed to get fd", fd > 0);
- } else {
#define BUFSIZE 10
u8 buf[BUFSIZE];
ssize_t n;
}
}
- /* open +1 dso over the allowed limit */
+ /* verify the first one is already open */
+ TEST_ASSERT_VAL("dsos[0] is not open", dsos[0]->data.fd != -1);
+
+ /* open +1 dso to reach the allowed limit */
fd = dso__data_fd(dsos[i], &machine);
TEST_ASSERT_VAL("failed to get fd", fd > 0);
--- /dev/null
+#include <stdbool.h>
+#include "tests.h"
+#include "dso.h"
+#include "debug.h"
+
+static int test(const char *path, bool alloc_name, bool alloc_ext,
+ bool kmod, bool comp, const char *name, const char *ext)
+{
+ struct kmod_path m;
+
+ memset(&m, 0x0, sizeof(m));
+
+ TEST_ASSERT_VAL("kmod_path__parse",
+ !__kmod_path__parse(&m, path, alloc_name, alloc_ext));
+
+ pr_debug("%s - alloc name %d, alloc ext %d, kmod %d, comp %d, name '%s', ext '%s'\n",
+ path, alloc_name, alloc_ext, m.kmod, m.comp, m.name, m.ext);
+
+ TEST_ASSERT_VAL("wrong kmod", m.kmod == kmod);
+ TEST_ASSERT_VAL("wrong comp", m.comp == comp);
+
+ if (ext)
+ TEST_ASSERT_VAL("wrong ext", m.ext && !strcmp(ext, m.ext));
+ else
+ TEST_ASSERT_VAL("wrong ext", !m.ext);
+
+ if (name)
+ TEST_ASSERT_VAL("wrong name", m.name && !strcmp(name, m.name));
+ else
+ TEST_ASSERT_VAL("wrong name", !m.name);
+
+ free(m.name);
+ free(m.ext);
+ return 0;
+}
+
+#define T(path, an, ae, k, c, n, e) \
+ TEST_ASSERT_VAL("failed", !test(path, an, ae, k, c, n, e))
+
+int test__kmod_path__parse(void)
+{
+ /* path alloc_name alloc_ext kmod comp name ext */
+ T("/xxxx/xxxx/x-x.ko", true , true , true, false, "[x_x]", NULL);
+ T("/xxxx/xxxx/x-x.ko", false , true , true, false, NULL , NULL);
+ T("/xxxx/xxxx/x-x.ko", true , false , true, false, "[x_x]", NULL);
+ T("/xxxx/xxxx/x-x.ko", false , false , true, false, NULL , NULL);
+
+ /* path alloc_name alloc_ext kmod comp name ext */
+ T("/xxxx/xxxx/x.ko.gz", true , true , true, true, "[x]", "gz");
+ T("/xxxx/xxxx/x.ko.gz", false , true , true, true, NULL , "gz");
+ T("/xxxx/xxxx/x.ko.gz", true , false , true, true, "[x]", NULL);
+ T("/xxxx/xxxx/x.ko.gz", false , false , true, true, NULL , NULL);
+
+ /* path alloc_name alloc_ext kmod comp name ext */
+ T("/xxxx/xxxx/x.gz", true , true , false, true, "x.gz" ,"gz");
+ T("/xxxx/xxxx/x.gz", false , true , false, true, NULL ,"gz");
+ T("/xxxx/xxxx/x.gz", true , false , false, true, "x.gz" , NULL);
+ T("/xxxx/xxxx/x.gz", false , false , false, true, NULL , NULL);
+
+ /* path alloc_name alloc_ext kmod comp name ext */
+ T("x.gz", true , true , false, true, "x.gz", "gz");
+ T("x.gz", false , true , false, true, NULL , "gz");
+ T("x.gz", true , false , false, true, "x.gz", NULL);
+ T("x.gz", false , false , false, true, NULL , NULL);
+
+ /* path alloc_name alloc_ext kmod comp name ext */
+ T("x.ko.gz", true , true , true, true, "[x]", "gz");
+ T("x.ko.gz", false , true , true, true, NULL , "gz");
+ T("x.ko.gz", true , false , true, true, "[x]", NULL);
+ T("x.ko.gz", false , false , true, true, NULL , NULL);
+
+ return 0;
+}
# FIXME looks like x86 is the only arch running tests ;-)
# we need some IS_(32/64) flag to make this generic
-ifeq ($(IS_X86_64),1)
+ifeq ($(ARCH)$(IS_64_BIT), x861)
lib = lib64
else
lib = lib
evsel = perf_evsel__newtp("syscalls", "sys_enter_open");
if (evsel == NULL) {
- pr_debug("is debugfs mounted on /sys/kernel/debug?\n");
+ if (tracefs_configured())
+ pr_debug("is tracefs mounted on /sys/kernel/tracing?\n");
+ else if (debugfs_configured())
+ pr_debug("is debugfs mounted on /sys/kernel/debug?\n");
+ else
+ pr_debug("Neither tracefs or debugfs is enabled in this kernel\n");
goto out_thread_map_delete;
}
evsel = perf_evsel__newtp("syscalls", "sys_enter_open");
if (evsel == NULL) {
- pr_debug("is debugfs mounted on /sys/kernel/debug?\n");
+ if (tracefs_configured())
+ pr_debug("is tracefs mounted on /sys/kernel/tracing?\n");
+ else if (debugfs_configured())
+ pr_debug("is debugfs mounted on /sys/kernel/debug?\n");
+ else
+ pr_debug("Neither tracefs or debugfs is enabled in this kernel\n");
goto out_thread_map_delete;
}
#include "evsel.h"
#include "evlist.h"
#include <api/fs/fs.h>
+#include <api/fs/tracefs.h>
#include <api/fs/debugfs.h>
#include "tests.h"
#include "debug.h"
return test__checkevent_genhw(evlist);
}
+static int test__checkevent_exclude_idle_modifier(struct perf_evlist *evlist)
+{
+ struct perf_evsel *evsel = perf_evlist__first(evlist);
+
+ TEST_ASSERT_VAL("wrong exclude idle", evsel->attr.exclude_idle);
+ TEST_ASSERT_VAL("wrong exclude guest", !evsel->attr.exclude_guest);
+ TEST_ASSERT_VAL("wrong exclude host", !evsel->attr.exclude_host);
+ TEST_ASSERT_VAL("wrong exclude_user", !evsel->attr.exclude_user);
+ TEST_ASSERT_VAL("wrong exclude_kernel", !evsel->attr.exclude_kernel);
+ TEST_ASSERT_VAL("wrong exclude_hv", !evsel->attr.exclude_hv);
+ TEST_ASSERT_VAL("wrong precise_ip", !evsel->attr.precise_ip);
+
+ return test__checkevent_symbolic_name(evlist);
+}
+
+static int test__checkevent_exclude_idle_modifier_1(struct perf_evlist *evlist)
+{
+ struct perf_evsel *evsel = perf_evlist__first(evlist);
+
+ TEST_ASSERT_VAL("wrong exclude idle", evsel->attr.exclude_idle);
+ TEST_ASSERT_VAL("wrong exclude guest", !evsel->attr.exclude_guest);
+ TEST_ASSERT_VAL("wrong exclude host", evsel->attr.exclude_host);
+ TEST_ASSERT_VAL("wrong exclude_user", evsel->attr.exclude_user);
+ TEST_ASSERT_VAL("wrong exclude_kernel", !evsel->attr.exclude_kernel);
+ TEST_ASSERT_VAL("wrong exclude_hv", evsel->attr.exclude_hv);
+ TEST_ASSERT_VAL("wrong precise_ip", !evsel->attr.precise_ip);
+
+ return test__checkevent_symbolic_name(evlist);
+}
+
static int test__checkevent_breakpoint_modifier(struct perf_evlist *evlist)
{
struct perf_evsel *evsel = perf_evlist__first(evlist);
{
char events_path[PATH_MAX];
struct dirent *events_ent;
+ const char *mountpoint;
DIR *events_dir;
int cnt = 0;
- scnprintf(events_path, PATH_MAX, "%s/tracing/events",
- debugfs_find_mountpoint());
+ mountpoint = tracefs_find_mountpoint();
+ if (mountpoint) {
+ scnprintf(events_path, PATH_MAX, "%s/events",
+ mountpoint);
+ } else {
+ mountpoint = debugfs_find_mountpoint();
+ scnprintf(events_path, PATH_MAX, "%s/tracing/events",
+ mountpoint);
+ }
events_dir = opendir(events_path);
.id = 100,
},
#endif
+ {
+ .name = "instructions:I",
+ .check = test__checkevent_exclude_idle_modifier,
+ .id = 45,
+ },
+ {
+ .name = "instructions:kIG",
+ .check = test__checkevent_exclude_idle_modifier_1,
+ .id = 46,
+ },
};
static struct evlist_test test__events_pmu[] = {
int test__switch_tracking(void);
int test__fdarray__filter(void);
int test__fdarray__add(void);
+int test__kmod_path__parse(void);
#if defined(__x86_64__) || defined(__i386__) || defined(__arm__)
#ifdef HAVE_DWARF_UNWIND_SUPPORT
--- /dev/null
+libperf-y += setup.o
+libperf-y += helpline.o
+libperf-y += progress.o
+libperf-y += util.o
+libperf-y += hist.o
+libperf-y += stdio/hist.o
+
+CFLAGS_setup.o += -DLIBDIR="BUILD_STR($(LIBDIR))"
+
+libperf-$(CONFIG_SLANG) += browser.o
+libperf-$(CONFIG_SLANG) += browsers/
+libperf-$(CONFIG_SLANG) += tui/
+
+CFLAGS_browser.o += -DENABLE_SLFUTURE_CONST
--- /dev/null
+libperf-y += annotate.o
+libperf-y += hists.o
+libperf-y += map.o
+libperf-y += scripts.o
+libperf-y += header.o
+
+CFLAGS_annotate.o += -DENABLE_SLFUTURE_CONST
+CFLAGS_hists.o += -DENABLE_SLFUTURE_CONST
+CFLAGS_map.o += -DENABLE_SLFUTURE_CONST
+CFLAGS_scripts.o += -DENABLE_SLFUTURE_CONST
return key;
}
+int map_symbol__tui_annotate(struct map_symbol *ms, struct perf_evsel *evsel,
+ struct hist_browser_timer *hbt)
+{
+ return symbol__tui_annotate(ms->sym, ms->map, evsel, hbt);
+}
+
int hist_entry__tui_annotate(struct hist_entry *he, struct perf_evsel *evsel,
struct hist_browser_timer *hbt)
{
- return symbol__tui_annotate(he->ms.sym, he->ms.map, evsel, hbt);
+ return map_symbol__tui_annotate(&he->ms, evsel, hbt);
}
static void annotate_browser__mark_jump_targets(struct annotate_browser *browser,
return hists__has_filter(hb->hists) || hb->min_pcnt;
}
+static int hist_browser__get_folding(struct hist_browser *browser)
+{
+ struct rb_node *nd;
+ struct hists *hists = browser->hists;
+ int unfolded_rows = 0;
+
+ for (nd = rb_first(&hists->entries);
+ (nd = hists__filter_entries(nd, browser->min_pcnt)) != NULL;
+ nd = rb_next(nd)) {
+ struct hist_entry *he =
+ rb_entry(nd, struct hist_entry, rb_node);
+
+ if (he->ms.unfolded)
+ unfolded_rows += he->nr_rows;
+ }
+ return unfolded_rows;
+}
+
static u32 hist_browser__nr_entries(struct hist_browser *hb)
{
u32 nr_entries;
else
nr_entries = hb->hists->nr_entries;
+ hb->nr_callchain_rows = hist_browser__get_folding(hb);
return nr_entries + hb->nr_callchain_rows;
}
{
int color, width;
char folded_sign = callchain_list__folded(chain);
+ bool show_annotated = browser->show_dso && chain->ms.sym && symbol__annotation(chain->ms.sym)->src;
color = HE_COLORSET_NORMAL;
width = browser->b.width - (offset + 2);
ui_browser__set_color(&browser->b, color);
hist_browser__gotorc(browser, row, 0);
slsmg_write_nstring(" ", offset);
- slsmg_printf("%c ", folded_sign);
+ slsmg_printf("%c", folded_sign);
+ ui_browser__write_graph(&browser->b, show_annotated ? SLSMG_RARROW_CHAR : ' ');
slsmg_write_nstring(str, width);
}
perf_hpp__set_user_width(symbol_conf.col_width_list_str);
while (1) {
- const struct thread *thread = NULL;
+ struct thread *thread = NULL;
const struct dso *dso = NULL;
int choice = 0,
annotate = -2, zoom_dso = -2, zoom_thread = -2,
if (!sort__has_sym)
goto add_exit_option;
+ if (browser->selection == NULL)
+ goto skip_annotation;
+
if (sort__mode == SORT_MODE__BRANCH) {
bi = browser->he_selection->branch_info;
- if (browser->selection != NULL &&
- bi &&
- bi->from.sym != NULL &&
+
+ if (bi == NULL)
+ goto skip_annotation;
+
+ if (bi->from.sym != NULL &&
!bi->from.map->dso->annotate_warned &&
- asprintf(&options[nr_options], "Annotate %s",
- bi->from.sym->name) > 0)
+ asprintf(&options[nr_options], "Annotate %s", bi->from.sym->name) > 0) {
annotate_f = nr_options++;
+ }
- if (browser->selection != NULL &&
- bi &&
- bi->to.sym != NULL &&
+ if (bi->to.sym != NULL &&
!bi->to.map->dso->annotate_warned &&
(bi->to.sym != bi->from.sym ||
bi->to.map->dso != bi->from.map->dso) &&
- asprintf(&options[nr_options], "Annotate %s",
- bi->to.sym->name) > 0)
+ asprintf(&options[nr_options], "Annotate %s", bi->to.sym->name) > 0) {
annotate_t = nr_options++;
+ }
} else {
- if (browser->selection != NULL &&
- browser->selection->sym != NULL &&
+ if (browser->selection->sym != NULL &&
!browser->selection->map->dso->annotate_warned) {
struct annotation *notes;
if (notes->src &&
asprintf(&options[nr_options], "Annotate %s",
- browser->selection->sym->name) > 0)
+ browser->selection->sym->name) > 0) {
annotate = nr_options++;
+ }
}
}
-
+skip_annotation:
if (thread != NULL &&
asprintf(&options[nr_options], "Zoom %s %s(%d) thread",
(browser->hists->thread_filter ? "out of" : "into"),
if (choice == annotate || choice == annotate_t || choice == annotate_f) {
struct hist_entry *he;
struct annotation *notes;
+ struct map_symbol ms;
int err;
do_annotate:
if (!objdump_path && perf_session_env__lookup_objdump(env))
if (he == NULL)
continue;
- /*
- * we stash the branch_info symbol + map into the
- * the ms so we don't have to rewrite all the annotation
- * code to use branch_info.
- * in branch mode, the ms struct is not used
- */
if (choice == annotate_f) {
- he->ms.sym = he->branch_info->from.sym;
- he->ms.map = he->branch_info->from.map;
- } else if (choice == annotate_t) {
- he->ms.sym = he->branch_info->to.sym;
- he->ms.map = he->branch_info->to.map;
+ ms.map = he->branch_info->from.map;
+ ms.sym = he->branch_info->from.sym;
+ } else if (choice == annotate_t) {
+ ms.map = he->branch_info->to.map;
+ ms.sym = he->branch_info->to.sym;
+ } else {
+ ms = *browser->selection;
}
- notes = symbol__annotation(he->ms.sym);
+ notes = symbol__annotation(ms.sym);
if (!notes->src)
continue;
- /*
- * Don't let this be freed, say, by hists__decay_entry.
- */
- he->used = true;
- err = hist_entry__tui_annotate(he, evsel, hbt);
- he->used = false;
+ err = map_symbol__tui_annotate(&ms, evsel, hbt);
/*
* offer option to annotate the other branch source or target
* (if they exists) when returning from annotate
pstack__remove(fstack, &browser->hists->thread_filter);
zoom_out_thread:
ui_helpline__pop();
- browser->hists->thread_filter = NULL;
+ thread__zput(browser->hists->thread_filter);
perf_hpp__set_elide(HISTC_THREAD, false);
} else {
ui_helpline__fpush("To zoom out press <- or -> + \"Zoom out of %s(%d) thread\"",
thread->comm_set ? thread__comm_str(thread) : "",
thread->tid);
- browser->hists->thread_filter = thread;
+ browser->hists->thread_filter = thread__get(thread);
perf_hpp__set_elide(HISTC_THREAD, false);
pstack__push(fstack, &browser->hists->thread_filter);
}
--- /dev/null
+CFLAGS_gtk += -fPIC $(GTK_CFLAGS)
+
+gtk-y += browser.o
+gtk-y += hists.o
+gtk-y += setup.o
+gtk-y += util.o
+gtk-y += helpline.o
+gtk-y += progress.o
+gtk-y += annotate.o
--- /dev/null
+libperf-y += setup.o
+libperf-y += util.o
+libperf-y += helpline.o
+libperf-y += progress.o
--- /dev/null
+libperf-y += abspath.o
+libperf-y += alias.o
+libperf-y += annotate.o
+libperf-y += build-id.o
+libperf-y += config.o
+libperf-y += ctype.o
+libperf-y += db-export.o
+libperf-y += environment.o
+libperf-y += event.o
+libperf-y += evlist.o
+libperf-y += evsel.o
+libperf-y += exec_cmd.o
+libperf-y += find_next_bit.o
+libperf-y += help.o
+libperf-y += kallsyms.o
+libperf-y += levenshtein.o
+libperf-y += parse-options.o
+libperf-y += parse-events.o
+libperf-y += path.o
+libperf-y += rbtree.o
+libperf-y += bitmap.o
+libperf-y += hweight.o
+libperf-y += run-command.o
+libperf-y += quote.o
+libperf-y += strbuf.o
+libperf-y += string.o
+libperf-y += strlist.o
+libperf-y += strfilter.o
+libperf-y += top.o
+libperf-y += usage.o
+libperf-y += wrapper.o
+libperf-y += sigchain.o
+libperf-y += dso.o
+libperf-y += symbol.o
+libperf-y += color.o
+libperf-y += pager.o
+libperf-y += header.o
+libperf-y += callchain.o
+libperf-y += values.o
+libperf-y += debug.o
+libperf-y += machine.o
+libperf-y += map.o
+libperf-y += pstack.o
+libperf-y += session.o
+libperf-y += ordered-events.o
+libperf-y += comm.o
+libperf-y += thread.o
+libperf-y += thread_map.o
+libperf-y += trace-event-parse.o
+libperf-y += parse-events-flex.o
+libperf-y += parse-events-bison.o
+libperf-y += pmu.o
+libperf-y += pmu-flex.o
+libperf-y += pmu-bison.o
+libperf-y += trace-event-read.o
+libperf-y += trace-event-info.o
+libperf-y += trace-event-scripting.o
+libperf-y += trace-event.o
+libperf-y += svghelper.o
+libperf-y += sort.o
+libperf-y += hist.o
+libperf-y += util.o
+libperf-y += xyarray.o
+libperf-y += cpumap.o
+libperf-y += cgroup.o
+libperf-y += target.o
+libperf-y += rblist.o
+libperf-y += intlist.o
+libperf-y += vdso.o
+libperf-y += stat.o
+libperf-y += record.o
+libperf-y += srcline.o
+libperf-y += data.o
+libperf-$(CONFIG_X86) += tsc.o
+libperf-y += cloexec.o
+libperf-y += thread-stack.o
+
+libperf-$(CONFIG_LIBELF) += symbol-elf.o
+libperf-$(CONFIG_LIBELF) += probe-event.o
+
+ifndef CONFIG_LIBELF
+libperf-y += symbol-minimal.o
+endif
+
+libperf-$(CONFIG_DWARF) += probe-finder.o
+libperf-$(CONFIG_DWARF) += dwarf-aux.o
+
+libperf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o
+libperf-$(CONFIG_LIBUNWIND) += unwind-libunwind.o
+
+libperf-$(CONFIG_LIBBABELTRACE) += data-convert-bt.o
+
+libperf-y += scripting-engines/
+
+libperf-$(CONFIG_PERF_REGS) += perf_regs.o
+libperf-$(CONFIG_ZLIB) += zlib.o
+libperf-$(CONFIG_LZMA) += lzma.o
+
+CFLAGS_config.o += -DETC_PERFCONFIG="BUILD_STR($(ETC_PERFCONFIG_SQ))"
+CFLAGS_exec_cmd.o += -DPERF_EXEC_PATH="BUILD_STR($(perfexecdir_SQ))" -DPREFIX="BUILD_STR($(prefix_SQ))"
+
+$(OUTPUT)util/parse-events-flex.c: util/parse-events.l $(OUTPUT)util/parse-events-bison.c
+ $(call rule_mkdir)
+ @$(call echo-cmd,flex)$(FLEX) -o $@ --header-file=$(OUTPUT)util/parse-events-flex.h $(PARSER_DEBUG_FLEX) util/parse-events.l
+
+$(OUTPUT)util/parse-events-bison.c: util/parse-events.y
+ $(call rule_mkdir)
+ @$(call echo-cmd,bison)$(BISON) -v util/parse-events.y -d $(PARSER_DEBUG_BISON) -o $@ -p parse_events_
+
+$(OUTPUT)util/pmu-flex.c: util/pmu.l $(OUTPUT)util/pmu-bison.c
+ $(call rule_mkdir)
+ @$(call echo-cmd,flex)$(FLEX) -o $@ --header-file=$(OUTPUT)util/pmu-flex.h util/pmu.l
+
+$(OUTPUT)util/pmu-bison.c: util/pmu.y
+ $(call rule_mkdir)
+ @$(call echo-cmd,bison)$(BISON) -v util/pmu.y -d -o $@ -p perf_pmu_
+
+CFLAGS_parse-events-flex.o += -w
+CFLAGS_pmu-flex.o += -w
+CFLAGS_parse-events-bison.o += -DYYENABLE_NLS=0 -DYYLTYPE_IS_TRIVIAL=0 -w
+CFLAGS_pmu-bison.o += -DYYENABLE_NLS=0 -DYYLTYPE_IS_TRIVIAL=0 -w
+
+$(OUTPUT)util/parse-events.o: $(OUTPUT)util/parse-events-flex.c $(OUTPUT)util/parse-events-bison.c
+$(OUTPUT)util/pmu.o: $(OUTPUT)util/pmu-flex.c $(OUTPUT)util/pmu-bison.c
+
+CFLAGS_find_next_bit.o += -Wno-unused-parameter -DETC_PERFCONFIG="BUILD_STR($(ETC_PERFCONFIG_SQ))"
+CFLAGS_rbtree.o += -Wno-unused-parameter -DETC_PERFCONFIG="BUILD_STR($(ETC_PERFCONFIG_SQ))"
+CFLAGS_hweight.o += -Wno-unused-parameter -DETC_PERFCONFIG="BUILD_STR($(ETC_PERFCONFIG_SQ))"
+CFLAGS_parse-events.o += -Wno-redundant-decls
+
+$(OUTPUT)util/kallsyms.o: ../lib/symbol/kallsyms.c FORCE
+ $(call rule_mkdir)
+ $(call if_changed_dep,cc_o_c)
+
+$(OUTPUT)util/find_next_bit.o: ../lib/util/find_next_bit.c FORCE
+ $(call rule_mkdir)
+ $(call if_changed_dep,cc_o_c)
+
+$(OUTPUT)util/rbtree.o: ../../lib/rbtree.c FORCE
+ $(call rule_mkdir)
+ $(call if_changed_dep,cc_o_c)
+
+$(OUTPUT)util/hweight.o: ../../lib/hweight.c FORCE
+ $(call rule_mkdir)
+ $(call if_changed_dep,cc_o_c)
}
filename = symfs_filename;
}
+ } else if (dso__needs_decompress(dso)) {
+ char tmp[PATH_MAX];
+ struct kmod_path m;
+ int fd;
+ bool ret;
+
+ if (kmod_path__parse_ext(&m, symfs_filename))
+ goto out_free_filename;
+
+ snprintf(tmp, PATH_MAX, "/tmp/perf-kmod-XXXXXX");
+
+ fd = mkstemp(tmp);
+ if (fd < 0) {
+ free(m.ext);
+ goto out_free_filename;
+ }
+
+ ret = decompress_to_file(m.ext, symfs_filename, fd);
+
+ free(m.ext);
+ close(fd);
+
+ if (!ret)
+ goto out_free_filename;
+
+ strcpy(symfs_filename, tmp);
}
snprintf(command, sizeof(command),
file = popen(command, "r");
if (!file)
- goto out_free_filename;
+ goto out_remove_tmp;
while (!feof(file))
if (symbol__parse_objdump_line(sym, map, file, privsize,
delete_last_nop(sym);
pclose(file);
+
+out_remove_tmp:
+ if (dso__needs_decompress(dso))
+ unlink(symfs_filename);
out_free_filename:
if (delete_extract)
kcore_extract__delete(&kce);
dump_printf("(%d:%d):(%d:%d)\n", event->fork.pid, event->fork.tid,
event->fork.ppid, event->fork.ptid);
- if (thread) {
- rb_erase(&thread->rb_node, &machine->threads);
- machine->last_match = NULL;
- thread__delete(thread);
- }
+ if (thread)
+ machine__remove_thread(machine, thread);
return 0;
}
return raw - build_id;
}
+/* asnprintf consolidates asprintf and snprintf */
+static int asnprintf(char **strp, size_t size, const char *fmt, ...)
+{
+ va_list ap;
+ int ret;
+
+ if (!strp)
+ return -EINVAL;
+
+ va_start(ap, fmt);
+ if (*strp)
+ ret = vsnprintf(*strp, size, fmt, ap);
+ else
+ ret = vasprintf(strp, fmt, ap);
+ va_end(ap);
+
+ return ret;
+}
+
+static char *build_id__filename(const char *sbuild_id, char *bf, size_t size)
+{
+ char *tmp = bf;
+ int ret = asnprintf(&bf, size, "%s/.build-id/%.2s/%s", buildid_dir,
+ sbuild_id, sbuild_id + 2);
+ if (ret < 0 || (tmp && size < (unsigned int)ret))
+ return NULL;
+ return bf;
+}
+
char *dso__build_id_filename(const struct dso *dso, char *bf, size_t size)
{
char build_id_hex[BUILD_ID_SIZE * 2 + 1];
return NULL;
build_id__sprintf(dso->build_id, sizeof(dso->build_id), build_id_hex);
- if (bf == NULL) {
- if (asprintf(&bf, "%s/.build-id/%.2s/%s", buildid_dir,
- build_id_hex, build_id_hex + 2) < 0)
- return NULL;
- } else
- snprintf(bf, size, "%s/.build-id/%.2s/%s", buildid_dir,
- build_id_hex, build_id_hex + 2);
- return bf;
+ return build_id__filename(build_id_hex, bf, size);
}
#define dsos__for_each_with_build_id(pos, head) \
no_buildid_cache = true;
}
-int build_id_cache__add_s(const char *sbuild_id, const char *debugdir,
- const char *name, bool is_kallsyms, bool is_vdso)
+static char *build_id_cache__dirname_from_path(const char *name,
+ bool is_kallsyms, bool is_vdso)
{
- const size_t size = PATH_MAX;
- char *realname, *filename = zalloc(size),
- *linkname = zalloc(size), *targetname;
- int len, err = -1;
+ char *realname = (char *)name, *filename;
bool slash = is_kallsyms || is_vdso;
- if (is_kallsyms) {
- if (symbol_conf.kptr_restrict) {
- pr_debug("Not caching a kptr_restrict'ed /proc/kallsyms\n");
- err = 0;
- goto out_free;
- }
- realname = (char *) name;
- } else
+ if (!slash) {
realname = realpath(name, NULL);
+ if (!realname)
+ return NULL;
+ }
- if (realname == NULL || filename == NULL || linkname == NULL)
+ if (asprintf(&filename, "%s%s%s", buildid_dir, slash ? "/" : "",
+ is_vdso ? DSO__NAME_VDSO : realname) < 0)
+ filename = NULL;
+
+ if (!slash)
+ free(realname);
+
+ return filename;
+}
+
+int build_id_cache__list_build_ids(const char *pathname,
+ struct strlist **result)
+{
+ struct strlist *list;
+ char *dir_name;
+ DIR *dir;
+ struct dirent *d;
+ int ret = 0;
+
+ list = strlist__new(true, NULL);
+ dir_name = build_id_cache__dirname_from_path(pathname, false, false);
+ if (!list || !dir_name) {
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ /* List up all dirents */
+ dir = opendir(dir_name);
+ if (!dir) {
+ ret = -errno;
+ goto out;
+ }
+
+ while ((d = readdir(dir)) != NULL) {
+ if (!strcmp(d->d_name, ".") || !strcmp(d->d_name, ".."))
+ continue;
+ strlist__add(list, d->d_name);
+ }
+ closedir(dir);
+
+out:
+ free(dir_name);
+ if (ret)
+ strlist__delete(list);
+ else
+ *result = list;
+
+ return ret;
+}
+
+int build_id_cache__add_s(const char *sbuild_id, const char *name,
+ bool is_kallsyms, bool is_vdso)
+{
+ const size_t size = PATH_MAX;
+ char *realname = NULL, *filename = NULL, *dir_name = NULL,
+ *linkname = zalloc(size), *targetname, *tmp;
+ int err = -1;
+
+ if (!is_kallsyms) {
+ realname = realpath(name, NULL);
+ if (!realname)
+ goto out_free;
+ }
+
+ dir_name = build_id_cache__dirname_from_path(name, is_kallsyms, is_vdso);
+ if (!dir_name)
goto out_free;
- len = scnprintf(filename, size, "%s%s%s",
- debugdir, slash ? "/" : "",
- is_vdso ? DSO__NAME_VDSO : realname);
- if (mkdir_p(filename, 0755))
+ if (mkdir_p(dir_name, 0755))
goto out_free;
- snprintf(filename + len, size - len, "/%s", sbuild_id);
+ if (asprintf(&filename, "%s/%s", dir_name, sbuild_id) < 0) {
+ filename = NULL;
+ goto out_free;
+ }
if (access(filename, F_OK)) {
if (is_kallsyms) {
if (copyfile("/proc/kallsyms", filename))
goto out_free;
- } else if (link(realname, filename) && copyfile(name, filename))
+ } else if (link(realname, filename) && errno != EEXIST &&
+ copyfile(name, filename))
goto out_free;
}
- len = scnprintf(linkname, size, "%s/.build-id/%.2s",
- debugdir, sbuild_id);
+ if (!build_id__filename(sbuild_id, linkname, size))
+ goto out_free;
+ tmp = strrchr(linkname, '/');
+ *tmp = '\0';
if (access(linkname, X_OK) && mkdir_p(linkname, 0755))
goto out_free;
- snprintf(linkname + len, size - len, "/%s", sbuild_id + 2);
- targetname = filename + strlen(debugdir) - 5;
+ *tmp = '/';
+ targetname = filename + strlen(buildid_dir) - 5;
memcpy(targetname, "../..", 5);
if (symlink(targetname, linkname) == 0)
if (!is_kallsyms)
free(realname);
free(filename);
+ free(dir_name);
free(linkname);
return err;
}
static int build_id_cache__add_b(const u8 *build_id, size_t build_id_size,
- const char *name, const char *debugdir,
- bool is_kallsyms, bool is_vdso)
+ const char *name, bool is_kallsyms,
+ bool is_vdso)
{
char sbuild_id[BUILD_ID_SIZE * 2 + 1];
build_id__sprintf(build_id, build_id_size, sbuild_id);
- return build_id_cache__add_s(sbuild_id, debugdir, name,
- is_kallsyms, is_vdso);
+ return build_id_cache__add_s(sbuild_id, name, is_kallsyms, is_vdso);
+}
+
+bool build_id_cache__cached(const char *sbuild_id)
+{
+ bool ret = false;
+ char *filename = build_id__filename(sbuild_id, NULL, 0);
+
+ if (filename && !access(filename, F_OK))
+ ret = true;
+ free(filename);
+
+ return ret;
}
-int build_id_cache__remove_s(const char *sbuild_id, const char *debugdir)
+int build_id_cache__remove_s(const char *sbuild_id)
{
const size_t size = PATH_MAX;
char *filename = zalloc(size),
- *linkname = zalloc(size);
+ *linkname = zalloc(size), *tmp;
int err = -1;
if (filename == NULL || linkname == NULL)
goto out_free;
- snprintf(linkname, size, "%s/.build-id/%.2s/%s",
- debugdir, sbuild_id, sbuild_id + 2);
+ if (!build_id__filename(sbuild_id, linkname, size))
+ goto out_free;
if (access(linkname, F_OK))
goto out_free;
/*
* Since the link is relative, we must make it absolute:
*/
- snprintf(linkname, size, "%s/.build-id/%.2s/%s",
- debugdir, sbuild_id, filename);
+ tmp = strrchr(linkname, '/') + 1;
+ snprintf(tmp, size - (tmp - linkname), "%s", filename);
if (unlink(linkname))
goto out_free;
return err;
}
-static int dso__cache_build_id(struct dso *dso, struct machine *machine,
- const char *debugdir)
+static int dso__cache_build_id(struct dso *dso, struct machine *machine)
{
bool is_kallsyms = dso->kernel && dso->long_name[0] != '/';
bool is_vdso = dso__is_vdso(dso);
name = nm;
}
return build_id_cache__add_b(dso->build_id, sizeof(dso->build_id), name,
- debugdir, is_kallsyms, is_vdso);
+ is_kallsyms, is_vdso);
}
static int __dsos__cache_build_ids(struct list_head *head,
- struct machine *machine, const char *debugdir)
+ struct machine *machine)
{
struct dso *pos;
int err = 0;
dsos__for_each_with_build_id(pos, head)
- if (dso__cache_build_id(pos, machine, debugdir))
+ if (dso__cache_build_id(pos, machine))
err = -1;
return err;
}
-static int machine__cache_build_ids(struct machine *machine, const char *debugdir)
+static int machine__cache_build_ids(struct machine *machine)
{
- int ret = __dsos__cache_build_ids(&machine->kernel_dsos.head, machine,
- debugdir);
- ret |= __dsos__cache_build_ids(&machine->user_dsos.head, machine,
- debugdir);
+ int ret = __dsos__cache_build_ids(&machine->kernel_dsos.head, machine);
+ ret |= __dsos__cache_build_ids(&machine->user_dsos.head, machine);
return ret;
}
if (mkdir(buildid_dir, 0755) != 0 && errno != EEXIST)
return -1;
- ret = machine__cache_build_ids(&session->machines.host, buildid_dir);
+ ret = machine__cache_build_ids(&session->machines.host);
for (nd = rb_first(&session->machines.guests); nd; nd = rb_next(nd)) {
struct machine *pos = rb_entry(nd, struct machine, rb_node);
- ret |= machine__cache_build_ids(pos, buildid_dir);
+ ret |= machine__cache_build_ids(pos);
}
return ret ? -1 : 0;
}
#define BUILD_ID_SIZE 20
#include "tool.h"
+#include "strlist.h"
#include <linux/types.h>
extern struct perf_tool build_id__mark_dso_hit_ops;
int perf_session__write_buildid_table(struct perf_session *session, int fd);
int perf_session__cache_build_ids(struct perf_session *session);
-int build_id_cache__add_s(const char *sbuild_id, const char *debugdir,
+int build_id_cache__list_build_ids(const char *pathname,
+ struct strlist **result);
+bool build_id_cache__cached(const char *sbuild_id);
+int build_id_cache__add_s(const char *sbuild_id,
const char *name, bool is_kallsyms, bool is_vdso);
-int build_id_cache__remove_s(const char *sbuild_id, const char *debugdir);
+int build_id_cache__remove_s(const char *sbuild_id);
void disable_buildid_cache(void);
#endif
#define EXEC_PATH_ENVIRONMENT "PERF_EXEC_PATH"
#define DEFAULT_PERF_DIR_ENVIRONMENT ".perf"
#define PERF_DEBUGFS_ENVIRONMENT "PERF_DEBUGFS_DIR"
+#define PERF_TRACEFS_ENVIRONMENT "PERF_TRACEFS_DIR"
typedef int (*config_fn_t)(const char *, const char *, void *);
extern int perf_default_config(const char *, const char *, void *);
callchain_param.dump_size = size;
}
#endif /* HAVE_DWARF_UNWIND_SUPPORT */
+ } else if (!strncmp(name, "lbr", sizeof("lbr"))) {
+ if (!strtok_r(NULL, ",", &saveptr)) {
+ callchain_param.record_mode = CALLCHAIN_LBR;
+ ret = 0;
+ } else
+ pr_err("callchain: No more arguments "
+ "needed for --call-graph lbr\n");
+ break;
} else {
pr_err("callchain: Unknown --call-graph option "
"value: %s\n", arg);
CALLCHAIN_NONE,
CALLCHAIN_FP,
CALLCHAIN_DWARF,
+ CALLCHAIN_LBR,
CALLCHAIN_MAX
};
static unsigned long flag = PERF_FLAG_FD_CLOEXEC;
+int __weak sched_getcpu(void)
+{
+ errno = ENOSYS;
+ return -1;
+}
+
static int perf_flag_probe(void)
{
/* use 'safest' configuration as used in perf_evsel__fallback() */
unsigned long perf_event_open_cloexec_flag(void);
+#ifdef __GLIBC_PREREQ
+#if !__GLIBC_PREREQ(2, 6)
+extern int sched_getcpu(void) __THROW;
+#endif
+#endif
+
#endif /* __PERF_CLOEXEC_H */
--- /dev/null
+/*
+ * CTF writing support via babeltrace.
+ *
+ * Copyright (C) 2014, Jiri Olsa <jolsa@redhat.com>
+ * Copyright (C) 2014, Sebastian Andrzej Siewior <bigeasy@linutronix.de>
+ *
+ * Released under the GPL v2. (and only v2, not any later version)
+ */
+
+#include <linux/compiler.h>
+#include <babeltrace/ctf-writer/writer.h>
+#include <babeltrace/ctf-writer/clock.h>
+#include <babeltrace/ctf-writer/stream.h>
+#include <babeltrace/ctf-writer/event.h>
+#include <babeltrace/ctf-writer/event-types.h>
+#include <babeltrace/ctf-writer/event-fields.h>
+#include <babeltrace/ctf/events.h>
+#include <traceevent/event-parse.h>
+#include "asm/bug.h"
+#include "data-convert-bt.h"
+#include "session.h"
+#include "util.h"
+#include "debug.h"
+#include "tool.h"
+#include "evlist.h"
+#include "evsel.h"
+#include "machine.h"
+
+#define pr_N(n, fmt, ...) \
+ eprintf(n, debug_data_convert, fmt, ##__VA_ARGS__)
+
+#define pr(fmt, ...) pr_N(1, pr_fmt(fmt), ##__VA_ARGS__)
+#define pr2(fmt, ...) pr_N(2, pr_fmt(fmt), ##__VA_ARGS__)
+
+#define pr_time2(t, fmt, ...) pr_time_N(2, debug_data_convert, t, pr_fmt(fmt), ##__VA_ARGS__)
+
+struct evsel_priv {
+ struct bt_ctf_event_class *event_class;
+};
+
+struct ctf_writer {
+ /* writer primitives */
+ struct bt_ctf_writer *writer;
+ struct bt_ctf_stream *stream;
+ struct bt_ctf_stream_class *stream_class;
+ struct bt_ctf_clock *clock;
+
+ /* data types */
+ union {
+ struct {
+ struct bt_ctf_field_type *s64;
+ struct bt_ctf_field_type *u64;
+ struct bt_ctf_field_type *s32;
+ struct bt_ctf_field_type *u32;
+ struct bt_ctf_field_type *string;
+ struct bt_ctf_field_type *u64_hex;
+ };
+ struct bt_ctf_field_type *array[6];
+ } data;
+};
+
+struct convert {
+ struct perf_tool tool;
+ struct ctf_writer writer;
+
+ u64 events_size;
+ u64 events_count;
+};
+
+static int value_set(struct bt_ctf_field_type *type,
+ struct bt_ctf_event *event,
+ const char *name, u64 val)
+{
+ struct bt_ctf_field *field;
+ bool sign = bt_ctf_field_type_integer_get_signed(type);
+ int ret;
+
+ field = bt_ctf_field_create(type);
+ if (!field) {
+ pr_err("failed to create a field %s\n", name);
+ return -1;
+ }
+
+ if (sign) {
+ ret = bt_ctf_field_signed_integer_set_value(field, val);
+ if (ret) {
+ pr_err("failed to set field value %s\n", name);
+ goto err;
+ }
+ } else {
+ ret = bt_ctf_field_unsigned_integer_set_value(field, val);
+ if (ret) {
+ pr_err("failed to set field value %s\n", name);
+ goto err;
+ }
+ }
+
+ ret = bt_ctf_event_set_payload(event, name, field);
+ if (ret) {
+ pr_err("failed to set payload %s\n", name);
+ goto err;
+ }
+
+ pr2(" SET [%s = %" PRIu64 "]\n", name, val);
+
+err:
+ bt_ctf_field_put(field);
+ return ret;
+}
+
+#define __FUNC_VALUE_SET(_name, _val_type) \
+static __maybe_unused int value_set_##_name(struct ctf_writer *cw, \
+ struct bt_ctf_event *event, \
+ const char *name, \
+ _val_type val) \
+{ \
+ struct bt_ctf_field_type *type = cw->data._name; \
+ return value_set(type, event, name, (u64) val); \
+}
+
+#define FUNC_VALUE_SET(_name) __FUNC_VALUE_SET(_name, _name)
+
+FUNC_VALUE_SET(s32)
+FUNC_VALUE_SET(u32)
+FUNC_VALUE_SET(s64)
+FUNC_VALUE_SET(u64)
+__FUNC_VALUE_SET(u64_hex, u64)
+
+static struct bt_ctf_field_type*
+get_tracepoint_field_type(struct ctf_writer *cw, struct format_field *field)
+{
+ unsigned long flags = field->flags;
+
+ if (flags & FIELD_IS_STRING)
+ return cw->data.string;
+
+ if (!(flags & FIELD_IS_SIGNED)) {
+ /* unsigned long are mostly pointers */
+ if (flags & FIELD_IS_LONG || flags & FIELD_IS_POINTER)
+ return cw->data.u64_hex;
+ }
+
+ if (flags & FIELD_IS_SIGNED) {
+ if (field->size == 8)
+ return cw->data.s64;
+ else
+ return cw->data.s32;
+ }
+
+ if (field->size == 8)
+ return cw->data.u64;
+ else
+ return cw->data.u32;
+}
+
+static int add_tracepoint_field_value(struct ctf_writer *cw,
+ struct bt_ctf_event_class *event_class,
+ struct bt_ctf_event *event,
+ struct perf_sample *sample,
+ struct format_field *fmtf)
+{
+ struct bt_ctf_field_type *type;
+ struct bt_ctf_field *array_field;
+ struct bt_ctf_field *field;
+ const char *name = fmtf->name;
+ void *data = sample->raw_data;
+ unsigned long long value_int;
+ unsigned long flags = fmtf->flags;
+ unsigned int n_items;
+ unsigned int i;
+ unsigned int offset;
+ unsigned int len;
+ int ret;
+
+ offset = fmtf->offset;
+ len = fmtf->size;
+ if (flags & FIELD_IS_STRING)
+ flags &= ~FIELD_IS_ARRAY;
+
+ if (flags & FIELD_IS_DYNAMIC) {
+ unsigned long long tmp_val;
+
+ tmp_val = pevent_read_number(fmtf->event->pevent,
+ data + offset, len);
+ offset = tmp_val;
+ len = offset >> 16;
+ offset &= 0xffff;
+ }
+
+ if (flags & FIELD_IS_ARRAY) {
+
+ type = bt_ctf_event_class_get_field_by_name(
+ event_class, name);
+ array_field = bt_ctf_field_create(type);
+ bt_ctf_field_type_put(type);
+ if (!array_field) {
+ pr_err("Failed to create array type %s\n", name);
+ return -1;
+ }
+
+ len = fmtf->size / fmtf->arraylen;
+ n_items = fmtf->arraylen;
+ } else {
+ n_items = 1;
+ array_field = NULL;
+ }
+
+ type = get_tracepoint_field_type(cw, fmtf);
+
+ for (i = 0; i < n_items; i++) {
+ if (!(flags & FIELD_IS_STRING))
+ value_int = pevent_read_number(
+ fmtf->event->pevent,
+ data + offset + i * len, len);
+
+ if (flags & FIELD_IS_ARRAY)
+ field = bt_ctf_field_array_get_field(array_field, i);
+ else
+ field = bt_ctf_field_create(type);
+
+ if (!field) {
+ pr_err("failed to create a field %s\n", name);
+ return -1;
+ }
+
+ if (flags & FIELD_IS_STRING)
+ ret = bt_ctf_field_string_set_value(field,
+ data + offset + i * len);
+ else if (!(flags & FIELD_IS_SIGNED))
+ ret = bt_ctf_field_unsigned_integer_set_value(
+ field, value_int);
+ else
+ ret = bt_ctf_field_signed_integer_set_value(
+ field, value_int);
+ if (ret) {
+ pr_err("failed to set file value %s\n", name);
+ goto err_put_field;
+ }
+ if (!(flags & FIELD_IS_ARRAY)) {
+ ret = bt_ctf_event_set_payload(event, name, field);
+ if (ret) {
+ pr_err("failed to set payload %s\n", name);
+ goto err_put_field;
+ }
+ }
+ bt_ctf_field_put(field);
+ }
+ if (flags & FIELD_IS_ARRAY) {
+ ret = bt_ctf_event_set_payload(event, name, array_field);
+ if (ret) {
+ pr_err("Failed add payload array %s\n", name);
+ return -1;
+ }
+ bt_ctf_field_put(array_field);
+ }
+ return 0;
+
+err_put_field:
+ bt_ctf_field_put(field);
+ return -1;
+}
+
+static int add_tracepoint_fields_values(struct ctf_writer *cw,
+ struct bt_ctf_event_class *event_class,
+ struct bt_ctf_event *event,
+ struct format_field *fields,
+ struct perf_sample *sample)
+{
+ struct format_field *field;
+ int ret;
+
+ for (field = fields; field; field = field->next) {
+ ret = add_tracepoint_field_value(cw, event_class, event, sample,
+ field);
+ if (ret)
+ return -1;
+ }
+ return 0;
+}
+
+static int add_tracepoint_values(struct ctf_writer *cw,
+ struct bt_ctf_event_class *event_class,
+ struct bt_ctf_event *event,
+ struct perf_evsel *evsel,
+ struct perf_sample *sample)
+{
+ struct format_field *common_fields = evsel->tp_format->format.common_fields;
+ struct format_field *fields = evsel->tp_format->format.fields;
+ int ret;
+
+ ret = add_tracepoint_fields_values(cw, event_class, event,
+ common_fields, sample);
+ if (!ret)
+ ret = add_tracepoint_fields_values(cw, event_class, event,
+ fields, sample);
+
+ return ret;
+}
+
+static int add_generic_values(struct ctf_writer *cw,
+ struct bt_ctf_event *event,
+ struct perf_evsel *evsel,
+ struct perf_sample *sample)
+{
+ u64 type = evsel->attr.sample_type;
+ int ret;
+
+ /*
+ * missing:
+ * PERF_SAMPLE_TIME - not needed as we have it in
+ * ctf event header
+ * PERF_SAMPLE_READ - TODO
+ * PERF_SAMPLE_CALLCHAIN - TODO
+ * PERF_SAMPLE_RAW - tracepoint fields are handled separately
+ * PERF_SAMPLE_BRANCH_STACK - TODO
+ * PERF_SAMPLE_REGS_USER - TODO
+ * PERF_SAMPLE_STACK_USER - TODO
+ */
+
+ if (type & PERF_SAMPLE_IP) {
+ ret = value_set_u64_hex(cw, event, "perf_ip", sample->ip);
+ if (ret)
+ return -1;
+ }
+
+ if (type & PERF_SAMPLE_TID) {
+ ret = value_set_s32(cw, event, "perf_tid", sample->tid);
+ if (ret)
+ return -1;
+
+ ret = value_set_s32(cw, event, "perf_pid", sample->pid);
+ if (ret)
+ return -1;
+ }
+
+ if ((type & PERF_SAMPLE_ID) ||
+ (type & PERF_SAMPLE_IDENTIFIER)) {
+ ret = value_set_u64(cw, event, "perf_id", sample->id);
+ if (ret)
+ return -1;
+ }
+
+ if (type & PERF_SAMPLE_STREAM_ID) {
+ ret = value_set_u64(cw, event, "perf_stream_id", sample->stream_id);
+ if (ret)
+ return -1;
+ }
+
+ if (type & PERF_SAMPLE_CPU) {
+ ret = value_set_u32(cw, event, "perf_cpu", sample->cpu);
+ if (ret)
+ return -1;
+ }
+
+ if (type & PERF_SAMPLE_PERIOD) {
+ ret = value_set_u64(cw, event, "perf_period", sample->period);
+ if (ret)
+ return -1;
+ }
+
+ if (type & PERF_SAMPLE_WEIGHT) {
+ ret = value_set_u64(cw, event, "perf_weight", sample->weight);
+ if (ret)
+ return -1;
+ }
+
+ if (type & PERF_SAMPLE_DATA_SRC) {
+ ret = value_set_u64(cw, event, "perf_data_src",
+ sample->data_src);
+ if (ret)
+ return -1;
+ }
+
+ if (type & PERF_SAMPLE_TRANSACTION) {
+ ret = value_set_u64(cw, event, "perf_transaction",
+ sample->transaction);
+ if (ret)
+ return -1;
+ }
+
+ return 0;
+}
+
+static int process_sample_event(struct perf_tool *tool,
+ union perf_event *_event __maybe_unused,
+ struct perf_sample *sample,
+ struct perf_evsel *evsel,
+ struct machine *machine __maybe_unused)
+{
+ struct convert *c = container_of(tool, struct convert, tool);
+ struct evsel_priv *priv = evsel->priv;
+ struct ctf_writer *cw = &c->writer;
+ struct bt_ctf_event_class *event_class;
+ struct bt_ctf_event *event;
+ int ret;
+
+ if (WARN_ONCE(!priv, "Failed to setup all events.\n"))
+ return 0;
+
+ event_class = priv->event_class;
+
+ /* update stats */
+ c->events_count++;
+ c->events_size += _event->header.size;
+
+ pr_time2(sample->time, "sample %" PRIu64 "\n", c->events_count);
+
+ event = bt_ctf_event_create(event_class);
+ if (!event) {
+ pr_err("Failed to create an CTF event\n");
+ return -1;
+ }
+
+ bt_ctf_clock_set_time(cw->clock, sample->time);
+
+ ret = add_generic_values(cw, event, evsel, sample);
+ if (ret)
+ return -1;
+
+ if (evsel->attr.type == PERF_TYPE_TRACEPOINT) {
+ ret = add_tracepoint_values(cw, event_class, event,
+ evsel, sample);
+ if (ret)
+ return -1;
+ }
+
+ bt_ctf_stream_append_event(cw->stream, event);
+ bt_ctf_event_put(event);
+ return 0;
+}
+
+static int add_tracepoint_fields_types(struct ctf_writer *cw,
+ struct format_field *fields,
+ struct bt_ctf_event_class *event_class)
+{
+ struct format_field *field;
+ int ret;
+
+ for (field = fields; field; field = field->next) {
+ struct bt_ctf_field_type *type;
+ unsigned long flags = field->flags;
+
+ pr2(" field '%s'\n", field->name);
+
+ type = get_tracepoint_field_type(cw, field);
+ if (!type)
+ return -1;
+
+ /*
+ * A string is an array of chars. For this we use the string
+ * type and don't care that it is an array. What we don't
+ * support is an array of strings.
+ */
+ if (flags & FIELD_IS_STRING)
+ flags &= ~FIELD_IS_ARRAY;
+
+ if (flags & FIELD_IS_ARRAY)
+ type = bt_ctf_field_type_array_create(type, field->arraylen);
+
+ ret = bt_ctf_event_class_add_field(event_class, type,
+ field->name);
+
+ if (flags & FIELD_IS_ARRAY)
+ bt_ctf_field_type_put(type);
+
+ if (ret) {
+ pr_err("Failed to add field '%s\n", field->name);
+ return -1;
+ }
+ }
+
+ return 0;
+}
+
+static int add_tracepoint_types(struct ctf_writer *cw,
+ struct perf_evsel *evsel,
+ struct bt_ctf_event_class *class)
+{
+ struct format_field *common_fields = evsel->tp_format->format.common_fields;
+ struct format_field *fields = evsel->tp_format->format.fields;
+ int ret;
+
+ ret = add_tracepoint_fields_types(cw, common_fields, class);
+ if (!ret)
+ ret = add_tracepoint_fields_types(cw, fields, class);
+
+ return ret;
+}
+
+static int add_generic_types(struct ctf_writer *cw, struct perf_evsel *evsel,
+ struct bt_ctf_event_class *event_class)
+{
+ u64 type = evsel->attr.sample_type;
+
+ /*
+ * missing:
+ * PERF_SAMPLE_TIME - not needed as we have it in
+ * ctf event header
+ * PERF_SAMPLE_READ - TODO
+ * PERF_SAMPLE_CALLCHAIN - TODO
+ * PERF_SAMPLE_RAW - tracepoint fields are handled separately
+ * PERF_SAMPLE_BRANCH_STACK - TODO
+ * PERF_SAMPLE_REGS_USER - TODO
+ * PERF_SAMPLE_STACK_USER - TODO
+ */
+
+#define ADD_FIELD(cl, t, n) \
+ do { \
+ pr2(" field '%s'\n", n); \
+ if (bt_ctf_event_class_add_field(cl, t, n)) { \
+ pr_err("Failed to add field '%s;\n", n); \
+ return -1; \
+ } \
+ } while (0)
+
+ if (type & PERF_SAMPLE_IP)
+ ADD_FIELD(event_class, cw->data.u64_hex, "perf_ip");
+
+ if (type & PERF_SAMPLE_TID) {
+ ADD_FIELD(event_class, cw->data.s32, "perf_tid");
+ ADD_FIELD(event_class, cw->data.s32, "perf_pid");
+ }
+
+ if ((type & PERF_SAMPLE_ID) ||
+ (type & PERF_SAMPLE_IDENTIFIER))
+ ADD_FIELD(event_class, cw->data.u64, "perf_id");
+
+ if (type & PERF_SAMPLE_STREAM_ID)
+ ADD_FIELD(event_class, cw->data.u64, "perf_stream_id");
+
+ if (type & PERF_SAMPLE_CPU)
+ ADD_FIELD(event_class, cw->data.u32, "perf_cpu");
+
+ if (type & PERF_SAMPLE_PERIOD)
+ ADD_FIELD(event_class, cw->data.u64, "perf_period");
+
+ if (type & PERF_SAMPLE_WEIGHT)
+ ADD_FIELD(event_class, cw->data.u64, "perf_weight");
+
+ if (type & PERF_SAMPLE_DATA_SRC)
+ ADD_FIELD(event_class, cw->data.u64, "perf_data_src");
+
+ if (type & PERF_SAMPLE_TRANSACTION)
+ ADD_FIELD(event_class, cw->data.u64, "perf_transaction");
+
+#undef ADD_FIELD
+ return 0;
+}
+
+static int add_event(struct ctf_writer *cw, struct perf_evsel *evsel)
+{
+ struct bt_ctf_event_class *event_class;
+ struct evsel_priv *priv;
+ const char *name = perf_evsel__name(evsel);
+ int ret;
+
+ pr("Adding event '%s' (type %d)\n", name, evsel->attr.type);
+
+ event_class = bt_ctf_event_class_create(name);
+ if (!event_class)
+ return -1;
+
+ ret = add_generic_types(cw, evsel, event_class);
+ if (ret)
+ goto err;
+
+ if (evsel->attr.type == PERF_TYPE_TRACEPOINT) {
+ ret = add_tracepoint_types(cw, evsel, event_class);
+ if (ret)
+ goto err;
+ }
+
+ ret = bt_ctf_stream_class_add_event_class(cw->stream_class, event_class);
+ if (ret) {
+ pr("Failed to add event class into stream.\n");
+ goto err;
+ }
+
+ priv = malloc(sizeof(*priv));
+ if (!priv)
+ goto err;
+
+ priv->event_class = event_class;
+ evsel->priv = priv;
+ return 0;
+
+err:
+ bt_ctf_event_class_put(event_class);
+ pr_err("Failed to add event '%s'.\n", name);
+ return -1;
+}
+
+static int setup_events(struct ctf_writer *cw, struct perf_session *session)
+{
+ struct perf_evlist *evlist = session->evlist;
+ struct perf_evsel *evsel;
+ int ret;
+
+ evlist__for_each(evlist, evsel) {
+ ret = add_event(cw, evsel);
+ if (ret)
+ return ret;
+ }
+ return 0;
+}
+
+static int ctf_writer__setup_env(struct ctf_writer *cw,
+ struct perf_session *session)
+{
+ struct perf_header *header = &session->header;
+ struct bt_ctf_writer *writer = cw->writer;
+
+#define ADD(__n, __v) \
+do { \
+ if (bt_ctf_writer_add_environment_field(writer, __n, __v)) \
+ return -1; \
+} while (0)
+
+ ADD("host", header->env.hostname);
+ ADD("sysname", "Linux");
+ ADD("release", header->env.os_release);
+ ADD("version", header->env.version);
+ ADD("machine", header->env.arch);
+ ADD("domain", "kernel");
+ ADD("tracer_name", "perf");
+
+#undef ADD
+ return 0;
+}
+
+static int ctf_writer__setup_clock(struct ctf_writer *cw)
+{
+ struct bt_ctf_clock *clock = cw->clock;
+
+ bt_ctf_clock_set_description(clock, "perf clock");
+
+#define SET(__n, __v) \
+do { \
+ if (bt_ctf_clock_set_##__n(clock, __v)) \
+ return -1; \
+} while (0)
+
+ SET(frequency, 1000000000);
+ SET(offset_s, 0);
+ SET(offset, 0);
+ SET(precision, 10);
+ SET(is_absolute, 0);
+
+#undef SET
+ return 0;
+}
+
+static struct bt_ctf_field_type *create_int_type(int size, bool sign, bool hex)
+{
+ struct bt_ctf_field_type *type;
+
+ type = bt_ctf_field_type_integer_create(size);
+ if (!type)
+ return NULL;
+
+ if (sign &&
+ bt_ctf_field_type_integer_set_signed(type, 1))
+ goto err;
+
+ if (hex &&
+ bt_ctf_field_type_integer_set_base(type, BT_CTF_INTEGER_BASE_HEXADECIMAL))
+ goto err;
+
+ pr2("Created type: INTEGER %d-bit %ssigned %s\n",
+ size, sign ? "un" : "", hex ? "hex" : "");
+ return type;
+
+err:
+ bt_ctf_field_type_put(type);
+ return NULL;
+}
+
+static void ctf_writer__cleanup_data(struct ctf_writer *cw)
+{
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(cw->data.array); i++)
+ bt_ctf_field_type_put(cw->data.array[i]);
+}
+
+static int ctf_writer__init_data(struct ctf_writer *cw)
+{
+#define CREATE_INT_TYPE(type, size, sign, hex) \
+do { \
+ (type) = create_int_type(size, sign, hex); \
+ if (!(type)) \
+ goto err; \
+} while (0)
+
+ CREATE_INT_TYPE(cw->data.s64, 64, true, false);
+ CREATE_INT_TYPE(cw->data.u64, 64, false, false);
+ CREATE_INT_TYPE(cw->data.s32, 32, true, false);
+ CREATE_INT_TYPE(cw->data.u32, 32, false, false);
+ CREATE_INT_TYPE(cw->data.u64_hex, 64, false, true);
+
+ cw->data.string = bt_ctf_field_type_string_create();
+ if (cw->data.string)
+ return 0;
+
+err:
+ ctf_writer__cleanup_data(cw);
+ pr_err("Failed to create data types.\n");
+ return -1;
+}
+
+static void ctf_writer__cleanup(struct ctf_writer *cw)
+{
+ ctf_writer__cleanup_data(cw);
+
+ bt_ctf_clock_put(cw->clock);
+ bt_ctf_stream_put(cw->stream);
+ bt_ctf_stream_class_put(cw->stream_class);
+ bt_ctf_writer_put(cw->writer);
+
+ /* and NULL all the pointers */
+ memset(cw, 0, sizeof(*cw));
+}
+
+static int ctf_writer__init(struct ctf_writer *cw, const char *path)
+{
+ struct bt_ctf_writer *writer;
+ struct bt_ctf_stream_class *stream_class;
+ struct bt_ctf_stream *stream;
+ struct bt_ctf_clock *clock;
+
+ /* CTF writer */
+ writer = bt_ctf_writer_create(path);
+ if (!writer)
+ goto err;
+
+ cw->writer = writer;
+
+ /* CTF clock */
+ clock = bt_ctf_clock_create("perf_clock");
+ if (!clock) {
+ pr("Failed to create CTF clock.\n");
+ goto err_cleanup;
+ }
+
+ cw->clock = clock;
+
+ if (ctf_writer__setup_clock(cw)) {
+ pr("Failed to setup CTF clock.\n");
+ goto err_cleanup;
+ }
+
+ /* CTF stream class */
+ stream_class = bt_ctf_stream_class_create("perf_stream");
+ if (!stream_class) {
+ pr("Failed to create CTF stream class.\n");
+ goto err_cleanup;
+ }
+
+ cw->stream_class = stream_class;
+
+ /* CTF clock stream setup */
+ if (bt_ctf_stream_class_set_clock(stream_class, clock)) {
+ pr("Failed to assign CTF clock to stream class.\n");
+ goto err_cleanup;
+ }
+
+ if (ctf_writer__init_data(cw))
+ goto err_cleanup;
+
+ /* CTF stream instance */
+ stream = bt_ctf_writer_create_stream(writer, stream_class);
+ if (!stream) {
+ pr("Failed to create CTF stream.\n");
+ goto err_cleanup;
+ }
+
+ cw->stream = stream;
+
+ /* CTF clock writer setup */
+ if (bt_ctf_writer_add_clock(writer, clock)) {
+ pr("Failed to assign CTF clock to writer.\n");
+ goto err_cleanup;
+ }
+
+ return 0;
+
+err_cleanup:
+ ctf_writer__cleanup(cw);
+err:
+ pr_err("Failed to setup CTF writer.\n");
+ return -1;
+}
+
+int bt_convert__perf2ctf(const char *input, const char *path, bool force)
+{
+ struct perf_session *session;
+ struct perf_data_file file = {
+ .path = input,
+ .mode = PERF_DATA_MODE_READ,
+ .force = force,
+ };
+ struct convert c = {
+ .tool = {
+ .sample = process_sample_event,
+ .mmap = perf_event__process_mmap,
+ .mmap2 = perf_event__process_mmap2,
+ .comm = perf_event__process_comm,
+ .exit = perf_event__process_exit,
+ .fork = perf_event__process_fork,
+ .lost = perf_event__process_lost,
+ .tracing_data = perf_event__process_tracing_data,
+ .build_id = perf_event__process_build_id,
+ .ordered_events = true,
+ .ordering_requires_timestamps = true,
+ },
+ };
+ struct ctf_writer *cw = &c.writer;
+ int err = -1;
+
+ /* CTF writer */
+ if (ctf_writer__init(cw, path))
+ return -1;
+
+ /* perf.data session */
+ session = perf_session__new(&file, 0, &c.tool);
+ if (!session)
+ goto free_writer;
+
+ /* CTF writer env/clock setup */
+ if (ctf_writer__setup_env(cw, session))
+ goto free_session;
+
+ /* CTF events setup */
+ if (setup_events(cw, session))
+ goto free_session;
+
+ err = perf_session__process_events(session);
+ if (!err)
+ err = bt_ctf_stream_flush(cw->stream);
+
+ fprintf(stderr,
+ "[ perf data convert: Converted '%s' into CTF data '%s' ]\n",
+ file.path, path);
+
+ fprintf(stderr,
+ "[ perf data convert: Converted and wrote %.3f MB (%" PRIu64 " samples) ]\n",
+ (double) c.events_size / 1024.0 / 1024.0,
+ c.events_count);
+
+ /* its all good */
+free_session:
+ perf_session__delete(session);
+
+free_writer:
+ ctf_writer__cleanup(cw);
+ return err;
+}
--- /dev/null
+#ifndef __DATA_CONVERT_BT_H
+#define __DATA_CONVERT_BT_H
+#ifdef HAVE_LIBBABELTRACE_SUPPORT
+
+int bt_convert__perf2ctf(const char *input_name, const char *to_ctf, bool force);
+
+#endif /* HAVE_LIBBABELTRACE_SUPPORT */
+#endif /* __DATA_CONVERT_BT_H */
int db_export__sample(struct db_export *dbe, union perf_event *event,
struct perf_sample *sample, struct perf_evsel *evsel,
- struct thread *thread, struct addr_location *al)
+ struct addr_location *al)
{
+ struct thread* thread = al->thread;
struct export_sample es = {
.event = event,
.sample = sample,
.evsel = evsel,
- .thread = thread,
.al = al,
};
struct thread *main_thread;
union perf_event *event;
struct perf_sample *sample;
struct perf_evsel *evsel;
- struct thread *thread;
struct addr_location *al;
u64 db_id;
u64 comm_db_id;
const char *name);
int db_export__sample(struct db_export *dbe, union perf_event *event,
struct perf_sample *sample, struct perf_evsel *evsel,
- struct thread *thread, struct addr_location *al);
+ struct addr_location *al);
int db_export__branch_types(struct db_export *dbe);
bool dump_trace = false, quiet = false;
int debug_ordered_events;
static int redirect_to_stderr;
+int debug_data_convert;
static int _eprintf(int level, int var, const char *fmt, va_list args)
{
{ .name = "verbose", .ptr = &verbose },
{ .name = "ordered-events", .ptr = &debug_ordered_events},
{ .name = "stderr", .ptr = &redirect_to_stderr},
+ { .name = "data-convert", .ptr = &debug_data_convert },
{ .name = NULL, }
};
extern int verbose;
extern bool quiet, dump_trace;
extern int debug_ordered_events;
+extern int debug_data_convert;
#ifndef pr_fmt
#define pr_fmt(fmt) fmt
case DSO_BINARY_TYPE__DEBUGLINK: {
char *debuglink;
- strncpy(filename, dso->long_name, size);
- debuglink = filename + dso->long_name_len;
+ len = __symbol__join_symfs(filename, size, dso->long_name);
+ debuglink = filename + len;
while (debuglink != filename && *debuglink != '/')
debuglink--;
if (*debuglink == '/')
debuglink++;
- ret = filename__read_debuglink(dso->long_name, debuglink,
+ ret = filename__read_debuglink(filename, debuglink,
size - (debuglink - filename));
}
break;
} compressions[] = {
#ifdef HAVE_ZLIB_SUPPORT
{ "gz", gzip_decompress_to_file },
+#endif
+#ifdef HAVE_LZMA_SUPPORT
+ { "xz", lzma_decompress_to_file },
#endif
{ NULL, NULL },
};
return false;
}
-bool is_kmodule_extension(const char *ext)
-{
- if (strncmp(ext, "ko", 2))
- return false;
-
- if (ext[2] == '\0' || (ext[2] == '.' && is_supported_compression(ext+3)))
- return true;
-
- return false;
-}
-
-bool is_kernel_module(const char *pathname, bool *compressed)
+bool is_kernel_module(const char *pathname)
{
- const char *ext = strrchr(pathname, '.');
+ struct kmod_path m;
- if (ext == NULL)
- return false;
-
- if (is_supported_compression(ext + 1)) {
- if (compressed)
- *compressed = true;
- ext -= 3;
- } else if (compressed)
- *compressed = false;
+ if (kmod_path__parse(&m, pathname))
+ return NULL;
- return is_kmodule_extension(ext + 1);
+ return m.kmod;
}
bool decompress_to_file(const char *ext, const char *filename, int output_fd)
dso->symtab_type == DSO_BINARY_TYPE__GUEST_KMODULE_COMP;
}
+/*
+ * Parses kernel module specified in @path and updates
+ * @m argument like:
+ *
+ * @comp - true if @path contains supported compression suffix,
+ * false otherwise
+ * @kmod - true if @path contains '.ko' suffix in right position,
+ * false otherwise
+ * @name - if (@alloc_name && @kmod) is true, it contains strdup-ed base name
+ * of the kernel module without suffixes, otherwise strudup-ed
+ * base name of @path
+ * @ext - if (@alloc_ext && @comp) is true, it contains strdup-ed string
+ * the compression suffix
+ *
+ * Returns 0 if there's no strdup error, -ENOMEM otherwise.
+ */
+int __kmod_path__parse(struct kmod_path *m, const char *path,
+ bool alloc_name, bool alloc_ext)
+{
+ const char *name = strrchr(path, '/');
+ const char *ext = strrchr(path, '.');
+
+ memset(m, 0x0, sizeof(*m));
+ name = name ? name + 1 : path;
+
+ /* No extension, just return name. */
+ if (ext == NULL) {
+ if (alloc_name) {
+ m->name = strdup(name);
+ return m->name ? 0 : -ENOMEM;
+ }
+ return 0;
+ }
+
+ if (is_supported_compression(ext + 1)) {
+ m->comp = true;
+ ext -= 3;
+ }
+
+ /* Check .ko extension only if there's enough name left. */
+ if (ext > name)
+ m->kmod = !strncmp(ext, ".ko", 3);
+
+ if (alloc_name) {
+ if (m->kmod) {
+ if (asprintf(&m->name, "[%.*s]", (int) (ext - name), name) == -1)
+ return -ENOMEM;
+ } else {
+ if (asprintf(&m->name, "%s", name) == -1)
+ return -ENOMEM;
+ }
+
+ strxfrchar(m->name, '-', '_');
+ }
+
+ if (alloc_ext && m->comp) {
+ m->ext = strdup(ext + 4);
+ if (!m->ext) {
+ free((void *) m->name);
+ return -ENOMEM;
+ }
+ }
+
+ return 0;
+}
+
/*
* Global list of open DSOs and the counter.
*/
if (fd >= 0)
return fd;
- pr_debug("dso open failed, mmap: %s\n",
+ pr_debug("dso open failed: %s\n",
strerror_r(errno, sbuf, sizeof(sbuf)));
if (!dso__data_open_cnt || errno != EMFILE)
break;
return dso__find_by_longname(&dsos->root, name);
}
-struct dso *__dsos__findnew(struct dsos *dsos, const char *name)
+struct dso *dsos__addnew(struct dsos *dsos, const char *name)
{
- struct dso *dso = dsos__find(dsos, name, false);
+ struct dso *dso = dso__new(name);
- if (!dso) {
- dso = dso__new(name);
- if (dso != NULL) {
- dsos__add(dsos, dso);
- dso__set_basename(dso);
- }
+ if (dso != NULL) {
+ dsos__add(dsos, dso);
+ dso__set_basename(dso);
}
-
return dso;
}
+struct dso *__dsos__findnew(struct dsos *dsos, const char *name)
+{
+ struct dso *dso = dsos__find(dsos, name, false);
+
+ return dso ? dso : dsos__addnew(dsos, name);
+}
+
size_t __dsos__fprintf_buildid(struct list_head *head, FILE *fp,
bool (skip)(struct dso *dso, int parm), int parm)
{
return dso__type_fd(fd);
}
+
+int dso__strerror_load(struct dso *dso, char *buf, size_t buflen)
+{
+ int idx, errnum = dso->load_errno;
+ /*
+ * This must have a same ordering as the enum dso_load_errno.
+ */
+ static const char *dso_load__error_str[] = {
+ "Internal tools/perf/ library error",
+ "Invalid ELF file",
+ "Can not read build id",
+ "Mismatching build id",
+ "Decompression failure",
+ };
+
+ BUG_ON(buflen == 0);
+
+ if (errnum >= 0) {
+ const char *err = strerror_r(errnum, buf, buflen);
+
+ if (err != buf)
+ scnprintf(buf, buflen, "%s", err);
+
+ return 0;
+ }
+
+ if (errnum < __DSO_LOAD_ERRNO__START || errnum >= __DSO_LOAD_ERRNO__END)
+ return -1;
+
+ idx = errnum - __DSO_LOAD_ERRNO__START;
+ scnprintf(buf, buflen, "%s", dso_load__error_str[idx]);
+ return 0;
+}
DSO__TYPE_X32BIT,
};
+enum dso_load_errno {
+ DSO_LOAD_ERRNO__SUCCESS = 0,
+
+ /*
+ * Choose an arbitrary negative big number not to clash with standard
+ * errno since SUS requires the errno has distinct positive values.
+ * See 'Issue 6' in the link below.
+ *
+ * http://pubs.opengroup.org/onlinepubs/9699919799/basedefs/errno.h.html
+ */
+ __DSO_LOAD_ERRNO__START = -10000,
+
+ DSO_LOAD_ERRNO__INTERNAL_ERROR = __DSO_LOAD_ERRNO__START,
+
+ /* for symsrc__init() */
+ DSO_LOAD_ERRNO__INVALID_ELF,
+ DSO_LOAD_ERRNO__CANNOT_READ_BUILDID,
+ DSO_LOAD_ERRNO__MISMATCHING_BUILDID,
+
+ /* for decompress_kmodule */
+ DSO_LOAD_ERRNO__DECOMPRESSION_FAILURE,
+
+ __DSO_LOAD_ERRNO__END,
+};
+
#define DSO__SWAP(dso, type, val) \
({ \
type ____r = val; \
enum dso_swap_type needs_swap;
enum dso_binary_type symtab_type;
enum dso_binary_type binary_type;
+ enum dso_load_errno load_errno;
u8 adjust_symbols:1;
u8 has_build_id:1;
u8 has_srcline:1;
u32 status_seen;
size_t file_size;
struct list_head open_entry;
- u64 frame_offset;
+ u64 debug_frame_offset;
+ u64 eh_frame_hdr_offset;
} data;
union { /* Tool specific area */
int dso__read_binary_type_filename(const struct dso *dso, enum dso_binary_type type,
char *root_dir, char *filename, size_t size);
bool is_supported_compression(const char *ext);
-bool is_kmodule_extension(const char *ext);
-bool is_kernel_module(const char *pathname, bool *compressed);
+bool is_kernel_module(const char *pathname);
bool decompress_to_file(const char *ext, const char *filename, int output_fd);
bool dso__needs_decompress(struct dso *dso);
+struct kmod_path {
+ char *name;
+ char *ext;
+ bool comp;
+ bool kmod;
+};
+
+int __kmod_path__parse(struct kmod_path *m, const char *path,
+ bool alloc_name, bool alloc_ext);
+
+#define kmod_path__parse(__m, __p) __kmod_path__parse(__m, __p, false, false)
+#define kmod_path__parse_name(__m, __p) __kmod_path__parse(__m, __p, true , false)
+#define kmod_path__parse_ext(__m, __p) __kmod_path__parse(__m, __p, false, true)
+
/*
* The dso__data_* external interface provides following functions:
* dso__data_fd
const char *short_name, int dso_type);
void dsos__add(struct dsos *dsos, struct dso *dso);
+struct dso *dsos__addnew(struct dsos *dsos, const char *name);
struct dso *dsos__find(const struct dsos *dsos, const char *name,
bool cmp_short);
struct dso *__dsos__findnew(struct dsos *dsos, const char *name);
enum dso_type dso__type(struct dso *dso, struct machine *machine);
+int dso__strerror_load(struct dso *dso, char *buf, size_t buflen);
+
#endif /* __PERF_DSO */
dwarf_attr(dw_die, DW_AT_declaration, &attr) == NULL);
}
+/**
+ * die_is_func_instance - Ensure that this DIE is an instance of a subprogram
+ * @dw_die: a DIE
+ *
+ * Ensure that this DIE is an instance (which has an entry address).
+ * This returns true if @dw_die is a function instance. If not, you need to
+ * call die_walk_instances() to find actual instances.
+ **/
+bool die_is_func_instance(Dwarf_Die *dw_die)
+{
+ Dwarf_Addr tmp;
+
+ /* Actually gcc optimizes non-inline as like as inlined */
+ return !dwarf_func_inline(dw_die) && dwarf_entrypc(dw_die, &tmp) == 0;
+}
/**
* die_get_data_member_location - Get the data-member offset
* @mb_die: a DIE of a member of a data structure
{
const char *name = data;
- if ((dwarf_tag(die_mem) == DW_TAG_member) &&
- die_compare_name(die_mem, name))
- return DIE_FIND_CB_END;
-
+ if (dwarf_tag(die_mem) == DW_TAG_member) {
+ if (die_compare_name(die_mem, name))
+ return DIE_FIND_CB_END;
+ else if (!dwarf_diename(die_mem)) { /* Unnamed structure */
+ Dwarf_Die type_die, tmp_die;
+ if (die_get_type(die_mem, &type_die) &&
+ die_find_member(&type_die, name, &tmp_die))
+ return DIE_FIND_CB_END;
+ }
+ }
return DIE_FIND_CB_SIBLING;
}
/* Ensure that this DIE is a subprogram and definition (not declaration) */
extern bool die_is_func_def(Dwarf_Die *dw_die);
+/* Ensure that this DIE is an instance of a subprogram */
+extern bool die_is_func_instance(Dwarf_Die *dw_die);
+
/* Compare diename and tname */
extern bool die_compare_name(Dwarf_Die *dw_die, const char *tname);
.period = 1,
};
-static pid_t perf_event__get_comm_tgid(pid_t pid, char *comm, size_t len)
+/*
+ * Assumes that the first 4095 bytes of /proc/pid/stat contains
+ * the comm, tgid and ppid.
+ */
+static int perf_event__get_comm_ids(pid_t pid, char *comm, size_t len,
+ pid_t *tgid, pid_t *ppid)
{
char filename[PATH_MAX];
- char bf[BUFSIZ];
- FILE *fp;
- size_t size = 0;
- pid_t tgid = -1;
+ char bf[4096];
+ int fd;
+ size_t size = 0, n;
+ char *nl, *name, *tgids, *ppids;
+
+ *tgid = -1;
+ *ppid = -1;
snprintf(filename, sizeof(filename), "/proc/%d/status", pid);
- fp = fopen(filename, "r");
- if (fp == NULL) {
+ fd = open(filename, O_RDONLY);
+ if (fd < 0) {
pr_debug("couldn't open %s\n", filename);
- return 0;
+ return -1;
}
- while (!comm[0] || (tgid < 0)) {
- if (fgets(bf, sizeof(bf), fp) == NULL) {
- pr_warning("couldn't get COMM and pgid, malformed %s\n",
- filename);
- break;
- }
+ n = read(fd, bf, sizeof(bf) - 1);
+ close(fd);
+ if (n <= 0) {
+ pr_warning("Couldn't get COMM, tigd and ppid for pid %d\n",
+ pid);
+ return -1;
+ }
+ bf[n] = '\0';
- if (memcmp(bf, "Name:", 5) == 0) {
- char *name = bf + 5;
- while (*name && isspace(*name))
- ++name;
- size = strlen(name) - 1;
- if (size >= len)
- size = len - 1;
- memcpy(comm, name, size);
- comm[size] = '\0';
-
- } else if (memcmp(bf, "Tgid:", 5) == 0) {
- char *tgids = bf + 5;
- while (*tgids && isspace(*tgids))
- ++tgids;
- tgid = atoi(tgids);
- }
+ name = strstr(bf, "Name:");
+ tgids = strstr(bf, "Tgid:");
+ ppids = strstr(bf, "PPid:");
+
+ if (name) {
+ name += 5; /* strlen("Name:") */
+
+ while (*name && isspace(*name))
+ ++name;
+
+ nl = strchr(name, '\n');
+ if (nl)
+ *nl = '\0';
+
+ size = strlen(name);
+ if (size >= len)
+ size = len - 1;
+ memcpy(comm, name, size);
+ comm[size] = '\0';
+ } else {
+ pr_debug("Name: string not found for pid %d\n", pid);
}
- fclose(fp);
+ if (tgids) {
+ tgids += 5; /* strlen("Tgid:") */
+ *tgid = atoi(tgids);
+ } else {
+ pr_debug("Tgid: string not found for pid %d\n", pid);
+ }
- return tgid;
+ if (ppids) {
+ ppids += 5; /* strlen("PPid:") */
+ *ppid = atoi(ppids);
+ } else {
+ pr_debug("PPid: string not found for pid %d\n", pid);
+ }
+
+ return 0;
}
-static pid_t perf_event__synthesize_comm(struct perf_tool *tool,
- union perf_event *event, pid_t pid,
- perf_event__handler_t process,
- struct machine *machine)
+static int perf_event__prepare_comm(union perf_event *event, pid_t pid,
+ struct machine *machine,
+ pid_t *tgid, pid_t *ppid)
{
size_t size;
- pid_t tgid;
+
+ *ppid = -1;
memset(&event->comm, 0, sizeof(event->comm));
- if (machine__is_host(machine))
- tgid = perf_event__get_comm_tgid(pid, event->comm.comm,
- sizeof(event->comm.comm));
- else
- tgid = machine->pid;
+ if (machine__is_host(machine)) {
+ if (perf_event__get_comm_ids(pid, event->comm.comm,
+ sizeof(event->comm.comm),
+ tgid, ppid) != 0) {
+ return -1;
+ }
+ } else {
+ *tgid = machine->pid;
+ }
- if (tgid < 0)
- goto out;
+ if (*tgid < 0)
+ return -1;
- event->comm.pid = tgid;
+ event->comm.pid = *tgid;
event->comm.header.type = PERF_RECORD_COMM;
size = strlen(event->comm.comm) + 1;
machine->id_hdr_size);
event->comm.tid = pid;
+ return 0;
+}
+
+static pid_t perf_event__synthesize_comm(struct perf_tool *tool,
+ union perf_event *event, pid_t pid,
+ perf_event__handler_t process,
+ struct machine *machine)
+{
+ pid_t tgid, ppid;
+
+ if (perf_event__prepare_comm(event, pid, machine, &tgid, &ppid) != 0)
+ return -1;
+
if (process(tool, event, &synth_sample, machine) != 0)
return -1;
-out:
return tgid;
}
static int perf_event__synthesize_fork(struct perf_tool *tool,
- union perf_event *event, pid_t pid,
- pid_t tgid, perf_event__handler_t process,
+ union perf_event *event,
+ pid_t pid, pid_t tgid, pid_t ppid,
+ perf_event__handler_t process,
struct machine *machine)
{
memset(&event->fork, 0, sizeof(event->fork) + machine->id_hdr_size);
- /* this is really a clone event but we use fork to synthesize it */
- event->fork.ppid = tgid;
- event->fork.ptid = tgid;
+ /*
+ * for main thread set parent to ppid from status file. For other
+ * threads set parent pid to main thread. ie., assume main thread
+ * spawns all threads in a process
+ */
+ if (tgid == pid) {
+ event->fork.ppid = ppid;
+ event->fork.ptid = ppid;
+ } else {
+ event->fork.ppid = tgid;
+ event->fork.ptid = tgid;
+ }
event->fork.pid = tgid;
event->fork.tid = pid;
event->fork.header.type = PERF_RECORD_FORK;
char filename[PATH_MAX];
DIR *tasks;
struct dirent dirent, *next;
- pid_t tgid;
+ pid_t tgid, ppid;
+ int rc = 0;
/* special case: only send one comm event using passed in pid */
if (!full) {
while (!readdir_r(tasks, &dirent, &next) && next) {
char *end;
- int rc = 0;
pid_t _pid;
_pid = strtol(dirent.d_name, &end, 10);
if (*end)
continue;
- tgid = perf_event__synthesize_comm(tool, comm_event, _pid,
- process, machine);
- if (tgid == -1)
- return -1;
+ rc = -1;
+ if (perf_event__prepare_comm(comm_event, _pid, machine,
+ &tgid, &ppid) != 0)
+ break;
+ if (perf_event__synthesize_fork(tool, fork_event, _pid, tgid,
+ ppid, process, machine) < 0)
+ break;
+ /*
+ * Send the prepared comm event
+ */
+ if (process(tool, comm_event, &synth_sample, machine) != 0)
+ break;
+
+ rc = 0;
if (_pid == pid) {
/* process the parent's maps too */
rc = perf_event__synthesize_mmap_events(tool, mmap_event, pid, tgid,
process, machine, mmap_data);
- } else {
- /* only fork the tid's map, to save time */
- rc = perf_event__synthesize_fork(tool, fork_event, _pid, tgid,
- process, machine);
+ if (rc)
+ break;
}
-
- if (rc)
- return rc;
}
closedir(tasks);
- return 0;
+ return rc;
}
int perf_event__synthesize_thread_map(struct perf_tool *tool,
else
s = "";
- return fprintf(fp, "%s: %s:%d\n", s, event->comm.comm, event->comm.tid);
+ return fprintf(fp, "%s: %s:%d/%d\n", s, event->comm.comm, event->comm.pid, event->comm.tid);
}
int perf_event__process_comm(struct perf_tool *tool __maybe_unused,
u32 nr_invalid_chains;
u32 nr_unknown_id;
u32 nr_unprocessable_samples;
- u32 nr_unordered_events;
};
struct attr_event {
* Released under the GPL v2. (and only v2, not any later version)
*/
#include "util.h"
-#include <api/fs/debugfs.h>
#include <api/fs/fs.h>
#include <poll.h>
#include "cpumap.h"
union perf_event *perf_evlist__mmap_read(struct perf_evlist *evlist, int idx)
{
struct perf_mmap *md = &evlist->mmap[idx];
- unsigned int head = perf_mmap__read_head(md);
- unsigned int old = md->prev;
+ u64 head = perf_mmap__read_head(md);
+ u64 old = md->prev;
unsigned char *data = md->base + page_size;
union perf_event *event = NULL;
static bool perf_mmap__empty(struct perf_mmap *md)
{
- return perf_mmap__read_head(md) != md->prev;
+ return perf_mmap__read_head(md) == md->prev;
}
static void perf_evlist__mmap_get(struct perf_evlist *evlist, int idx)
struct perf_mmap *md = &evlist->mmap[idx];
if (!evlist->overwrite) {
- unsigned int old = md->prev;
+ u64 old = md->prev;
perf_mmap__write_tail(md, old);
}
return -1;
}
-int perf_evlist__apply_filters(struct perf_evlist *evlist)
+int perf_evlist__apply_filters(struct perf_evlist *evlist, struct perf_evsel **err_evsel)
{
struct perf_evsel *evsel;
int err = 0;
continue;
err = perf_evsel__set_filter(evsel, ncpus, nthreads, evsel->filter);
- if (err)
+ if (err) {
+ *err_evsel = evsel;
break;
+ }
}
return err;
return err;
}
+int perf_evlist__set_filter_pids(struct perf_evlist *evlist, size_t npids, pid_t *pids)
+{
+ char *filter;
+ int ret = -1;
+ size_t i;
+
+ for (i = 0; i < npids; ++i) {
+ if (i == 0) {
+ if (asprintf(&filter, "common_pid != %d", pids[i]) < 0)
+ return -1;
+ } else {
+ char *tmp;
+
+ if (asprintf(&tmp, "%s && common_pid != %d", filter, pids[i]) < 0)
+ goto out_free;
+
+ free(filter);
+ filter = tmp;
+ }
+ }
+
+ ret = perf_evlist__set_filter(evlist, filter);
+out_free:
+ free(filter);
+ return ret;
+}
+
+int perf_evlist__set_filter_pid(struct perf_evlist *evlist, pid_t pid)
+{
+ return perf_evlist__set_filter_pids(evlist, 1, &pid);
+}
+
bool perf_evlist__valid_sample_type(struct perf_evlist *evlist)
{
struct perf_evsel *pos;
* writing exactly one byte, in workload.cork_fd, usually via
* perf_evlist__start_workload().
*
- * For cancelling the workload without actuallin running it,
+ * For cancelling the workload without actually running it,
* the parent will just close workload.cork_fd, without writing
* anything, i.e. read will return zero and we just exit()
* here.
void *base;
int mask;
int refcnt;
- unsigned int prev;
+ u64 prev;
char event_copy[PERF_SAMPLE_MAX_SIZE] __attribute__((aligned(8)));
};
struct thread_map *threads;
struct cpu_map *cpus;
struct perf_evsel *selected;
+ struct events_stats stats;
};
struct perf_evsel_str_handler {
const char *sys, const char *name, void *handler);
int perf_evlist__set_filter(struct perf_evlist *evlist, const char *filter);
+int perf_evlist__set_filter_pid(struct perf_evlist *evlist, pid_t pid);
+int perf_evlist__set_filter_pids(struct perf_evlist *evlist, size_t npids, pid_t *pids);
struct perf_evsel *
perf_evlist__find_tracepoint_by_id(struct perf_evlist *evlist, int id);
}
int perf_evlist__create_maps(struct perf_evlist *evlist, struct target *target);
-int perf_evlist__apply_filters(struct perf_evlist *evlist);
+int perf_evlist__apply_filters(struct perf_evlist *evlist, struct perf_evsel **err_evsel);
void __perf_evlist__set_leader(struct list_head *list);
void perf_evlist__set_leader(struct perf_evlist *evlist);
int perf_evlist__strerror_open(struct perf_evlist *evlist, int err, char *buf, size_t size);
int perf_evlist__strerror_mmap(struct perf_evlist *evlist, int err, char *buf, size_t size);
-static inline unsigned int perf_mmap__read_head(struct perf_mmap *mm)
+static inline u64 perf_mmap__read_head(struct perf_mmap *mm)
{
struct perf_event_mmap_page *pc = mm->base;
- int head = ACCESS_ONCE(pc->data_head);
+ u64 head = ACCESS_ONCE(pc->data_head);
rmb();
return head;
}
-static inline void perf_mmap__write_tail(struct perf_mmap *md,
- unsigned long tail)
+static inline void perf_mmap__write_tail(struct perf_mmap *md, u64 tail)
{
struct perf_event_mmap_page *pc = md->base;
bool exclude_guest;
bool mmap2;
bool cloexec;
+ bool clockid;
+ bool clockid_wrong;
} perf_missing_features;
+static clockid_t clockid;
+
static int perf_evsel__no_extra_init(struct perf_evsel *evsel __maybe_unused)
{
return 0;
}
static void
-perf_evsel__config_callgraph(struct perf_evsel *evsel)
+perf_evsel__config_callgraph(struct perf_evsel *evsel,
+ struct record_opts *opts)
{
bool function = perf_evsel__is_function_event(evsel);
struct perf_event_attr *attr = &evsel->attr;
perf_evsel__set_sample_bit(evsel, CALLCHAIN);
+ if (callchain_param.record_mode == CALLCHAIN_LBR) {
+ if (!opts->branch_stack) {
+ if (attr->exclude_user) {
+ pr_warning("LBR callstack option is only available "
+ "to get user callchain information. "
+ "Falling back to framepointers.\n");
+ } else {
+ perf_evsel__set_sample_bit(evsel, BRANCH_STACK);
+ attr->branch_sample_type = PERF_SAMPLE_BRANCH_USER |
+ PERF_SAMPLE_BRANCH_CALL_STACK;
+ }
+ } else
+ pr_warning("Cannot use LBR callstack with branch stack. "
+ "Falling back to framepointers.\n");
+ }
+
if (callchain_param.record_mode == CALLCHAIN_DWARF) {
if (!function) {
perf_evsel__set_sample_bit(evsel, REGS_USER);
evsel->attr.exclude_callchain_user = 1;
if (callchain_param.enabled && !evsel->no_aux_samples)
- perf_evsel__config_callgraph(evsel);
+ perf_evsel__config_callgraph(evsel, opts);
if (opts->sample_intr_regs) {
attr->sample_regs_intr = PERF_REGS_MASK;
if (opts->sample_transaction)
perf_evsel__set_sample_bit(evsel, TRANSACTION);
+ if (opts->running_time) {
+ evsel->attr.read_format |=
+ PERF_FORMAT_TOTAL_TIME_ENABLED |
+ PERF_FORMAT_TOTAL_TIME_RUNNING;
+ }
+
/*
* XXX see the function comment above
*
attr->disabled = 0;
attr->enable_on_exec = 0;
}
+
+ clockid = opts->clockid;
+ if (opts->use_clockid) {
+ attr->use_clockid = 1;
+ attr->clockid = opts->clockid;
+ }
}
static int perf_evsel__alloc_fd(struct perf_evsel *evsel, int ncpus, int nthreads)
return fd;
}
-#define __PRINT_ATTR(fmt, cast, field) \
- fprintf(fp, " %-19s "fmt"\n", #field, cast attr->field)
-
-#define PRINT_ATTR_U32(field) __PRINT_ATTR("%u" , , field)
-#define PRINT_ATTR_X32(field) __PRINT_ATTR("%#x", , field)
-#define PRINT_ATTR_U64(field) __PRINT_ATTR("%" PRIu64, (uint64_t), field)
-#define PRINT_ATTR_X64(field) __PRINT_ATTR("%#"PRIx64, (uint64_t), field)
-
-#define PRINT_ATTR2N(name1, field1, name2, field2) \
- fprintf(fp, " %-19s %u %-19s %u\n", \
- name1, attr->field1, name2, attr->field2)
-
-#define PRINT_ATTR2(field1, field2) \
- PRINT_ATTR2N(#field1, field1, #field2, field2)
-
-static size_t perf_event_attr__fprintf(struct perf_event_attr *attr, FILE *fp)
-{
- size_t ret = 0;
-
- ret += fprintf(fp, "%.60s\n", graph_dotted_line);
- ret += fprintf(fp, "perf_event_attr:\n");
-
- ret += PRINT_ATTR_U32(type);
- ret += PRINT_ATTR_U32(size);
- ret += PRINT_ATTR_X64(config);
- ret += PRINT_ATTR_U64(sample_period);
- ret += PRINT_ATTR_U64(sample_freq);
- ret += PRINT_ATTR_X64(sample_type);
- ret += PRINT_ATTR_X64(read_format);
-
- ret += PRINT_ATTR2(disabled, inherit);
- ret += PRINT_ATTR2(pinned, exclusive);
- ret += PRINT_ATTR2(exclude_user, exclude_kernel);
- ret += PRINT_ATTR2(exclude_hv, exclude_idle);
- ret += PRINT_ATTR2(mmap, comm);
- ret += PRINT_ATTR2(mmap2, comm_exec);
- ret += PRINT_ATTR2(freq, inherit_stat);
- ret += PRINT_ATTR2(enable_on_exec, task);
- ret += PRINT_ATTR2(watermark, precise_ip);
- ret += PRINT_ATTR2(mmap_data, sample_id_all);
- ret += PRINT_ATTR2(exclude_host, exclude_guest);
- ret += PRINT_ATTR2N("excl.callchain_kern", exclude_callchain_kernel,
- "excl.callchain_user", exclude_callchain_user);
-
- ret += PRINT_ATTR_U32(wakeup_events);
- ret += PRINT_ATTR_U32(wakeup_watermark);
- ret += PRINT_ATTR_X32(bp_type);
- ret += PRINT_ATTR_X64(bp_addr);
- ret += PRINT_ATTR_X64(config1);
- ret += PRINT_ATTR_U64(bp_len);
- ret += PRINT_ATTR_X64(config2);
- ret += PRINT_ATTR_X64(branch_sample_type);
- ret += PRINT_ATTR_X64(sample_regs_user);
- ret += PRINT_ATTR_U32(sample_stack_user);
- ret += PRINT_ATTR_X64(sample_regs_intr);
-
- ret += fprintf(fp, "%.60s\n", graph_dotted_line);
+struct bit_names {
+ int bit;
+ const char *name;
+};
+
+static void __p_bits(char *buf, size_t size, u64 value, struct bit_names *bits)
+{
+ bool first_bit = true;
+ int i = 0;
+
+ do {
+ if (value & bits[i].bit) {
+ buf += scnprintf(buf, size, "%s%s", first_bit ? "" : "|", bits[i].name);
+ first_bit = false;
+ }
+ } while (bits[++i].name != NULL);
+}
+
+static void __p_sample_type(char *buf, size_t size, u64 value)
+{
+#define bit_name(n) { PERF_SAMPLE_##n, #n }
+ struct bit_names bits[] = {
+ bit_name(IP), bit_name(TID), bit_name(TIME), bit_name(ADDR),
+ bit_name(READ), bit_name(CALLCHAIN), bit_name(ID), bit_name(CPU),
+ bit_name(PERIOD), bit_name(STREAM_ID), bit_name(RAW),
+ bit_name(BRANCH_STACK), bit_name(REGS_USER), bit_name(STACK_USER),
+ bit_name(IDENTIFIER), bit_name(REGS_INTR),
+ { .name = NULL, }
+ };
+#undef bit_name
+ __p_bits(buf, size, value, bits);
+}
+
+static void __p_read_format(char *buf, size_t size, u64 value)
+{
+#define bit_name(n) { PERF_FORMAT_##n, #n }
+ struct bit_names bits[] = {
+ bit_name(TOTAL_TIME_ENABLED), bit_name(TOTAL_TIME_RUNNING),
+ bit_name(ID), bit_name(GROUP),
+ { .name = NULL, }
+ };
+#undef bit_name
+ __p_bits(buf, size, value, bits);
+}
+
+#define BUF_SIZE 1024
+
+#define p_hex(val) snprintf(buf, BUF_SIZE, "%"PRIx64, (uint64_t)(val))
+#define p_unsigned(val) snprintf(buf, BUF_SIZE, "%"PRIu64, (uint64_t)(val))
+#define p_signed(val) snprintf(buf, BUF_SIZE, "%"PRId64, (int64_t)(val))
+#define p_sample_type(val) __p_sample_type(buf, BUF_SIZE, val)
+#define p_read_format(val) __p_read_format(buf, BUF_SIZE, val)
+
+#define PRINT_ATTRn(_n, _f, _p) \
+do { \
+ if (attr->_f) { \
+ _p(attr->_f); \
+ ret += attr__fprintf(fp, _n, buf, priv);\
+ } \
+} while (0)
+
+#define PRINT_ATTRf(_f, _p) PRINT_ATTRn(#_f, _f, _p)
+
+int perf_event_attr__fprintf(FILE *fp, struct perf_event_attr *attr,
+ attr__fprintf_f attr__fprintf, void *priv)
+{
+ char buf[BUF_SIZE];
+ int ret = 0;
+
+ PRINT_ATTRf(type, p_unsigned);
+ PRINT_ATTRf(size, p_unsigned);
+ PRINT_ATTRf(config, p_hex);
+ PRINT_ATTRn("{ sample_period, sample_freq }", sample_period, p_unsigned);
+ PRINT_ATTRf(sample_type, p_sample_type);
+ PRINT_ATTRf(read_format, p_read_format);
+
+ PRINT_ATTRf(disabled, p_unsigned);
+ PRINT_ATTRf(inherit, p_unsigned);
+ PRINT_ATTRf(pinned, p_unsigned);
+ PRINT_ATTRf(exclusive, p_unsigned);
+ PRINT_ATTRf(exclude_user, p_unsigned);
+ PRINT_ATTRf(exclude_kernel, p_unsigned);
+ PRINT_ATTRf(exclude_hv, p_unsigned);
+ PRINT_ATTRf(exclude_idle, p_unsigned);
+ PRINT_ATTRf(mmap, p_unsigned);
+ PRINT_ATTRf(comm, p_unsigned);
+ PRINT_ATTRf(freq, p_unsigned);
+ PRINT_ATTRf(inherit_stat, p_unsigned);
+ PRINT_ATTRf(enable_on_exec, p_unsigned);
+ PRINT_ATTRf(task, p_unsigned);
+ PRINT_ATTRf(watermark, p_unsigned);
+ PRINT_ATTRf(precise_ip, p_unsigned);
+ PRINT_ATTRf(mmap_data, p_unsigned);
+ PRINT_ATTRf(sample_id_all, p_unsigned);
+ PRINT_ATTRf(exclude_host, p_unsigned);
+ PRINT_ATTRf(exclude_guest, p_unsigned);
+ PRINT_ATTRf(exclude_callchain_kernel, p_unsigned);
+ PRINT_ATTRf(exclude_callchain_user, p_unsigned);
+ PRINT_ATTRf(mmap2, p_unsigned);
+ PRINT_ATTRf(comm_exec, p_unsigned);
+ PRINT_ATTRf(use_clockid, p_unsigned);
+
+ PRINT_ATTRn("{ wakeup_events, wakeup_watermark }", wakeup_events, p_unsigned);
+ PRINT_ATTRf(bp_type, p_unsigned);
+ PRINT_ATTRn("{ bp_addr, config1 }", bp_addr, p_hex);
+ PRINT_ATTRn("{ bp_len, config2 }", bp_len, p_hex);
+ PRINT_ATTRf(sample_regs_user, p_hex);
+ PRINT_ATTRf(sample_stack_user, p_unsigned);
+ PRINT_ATTRf(clockid, p_signed);
+ PRINT_ATTRf(sample_regs_intr, p_hex);
return ret;
}
+static int __open_attr__fprintf(FILE *fp, const char *name, const char *val,
+ void *priv __attribute__((unused)))
+{
+ return fprintf(fp, " %-32s %s\n", name, val);
+}
+
static int __perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus,
struct thread_map *threads)
{
}
fallback_missing_features:
+ if (perf_missing_features.clockid_wrong)
+ evsel->attr.clockid = CLOCK_MONOTONIC; /* should always work */
+ if (perf_missing_features.clockid) {
+ evsel->attr.use_clockid = 0;
+ evsel->attr.clockid = 0;
+ }
if (perf_missing_features.cloexec)
flags &= ~(unsigned long)PERF_FLAG_FD_CLOEXEC;
if (perf_missing_features.mmap2)
if (perf_missing_features.sample_id_all)
evsel->attr.sample_id_all = 0;
- if (verbose >= 2)
- perf_event_attr__fprintf(&evsel->attr, stderr);
+ if (verbose >= 2) {
+ fprintf(stderr, "%.60s\n", graph_dotted_line);
+ fprintf(stderr, "perf_event_attr:\n");
+ perf_event_attr__fprintf(stderr, &evsel->attr, __open_attr__fprintf, NULL);
+ fprintf(stderr, "%.60s\n", graph_dotted_line);
+ }
for (cpu = 0; cpu < cpus->nr; cpu++) {
goto try_fallback;
}
set_rlimit = NO_CHANGE;
+
+ /*
+ * If we succeeded but had to kill clockid, fail and
+ * have perf_evsel__open_strerror() print us a nice
+ * error.
+ */
+ if (perf_missing_features.clockid ||
+ perf_missing_features.clockid_wrong) {
+ err = -EINVAL;
+ goto out_close;
+ }
}
}
if (err != -EINVAL || cpu > 0 || thread > 0)
goto out_close;
- if (!perf_missing_features.cloexec && (flags & PERF_FLAG_FD_CLOEXEC)) {
+ /*
+ * Must probe features in the order they were added to the
+ * perf_event_attr interface.
+ */
+ if (!perf_missing_features.clockid_wrong && evsel->attr.use_clockid) {
+ perf_missing_features.clockid_wrong = true;
+ goto fallback_missing_features;
+ } else if (!perf_missing_features.clockid && evsel->attr.use_clockid) {
+ perf_missing_features.clockid = true;
+ goto fallback_missing_features;
+ } else if (!perf_missing_features.cloexec && (flags & PERF_FLAG_FD_CLOEXEC)) {
perf_missing_features.cloexec = true;
goto fallback_missing_features;
} else if (!perf_missing_features.mmap2 && evsel->attr.mmap2) {
value = *(u32 *)ptr;
break;
case 8:
- value = *(u64 *)ptr;
+ memcpy(&value, ptr, sizeof(u64));
break;
default:
return 0;
return ret;
}
-static int __if_fprintf(FILE *fp, bool *first, const char *field, u64 value)
-{
- if (value == 0)
- return 0;
-
- return comma_fprintf(fp, first, " %s: %" PRIu64, field, value);
-}
-
-#define if_print(field) printed += __if_fprintf(fp, &first, #field, evsel->attr.field)
-
-struct bit_names {
- int bit;
- const char *name;
-};
-
-static int bits__fprintf(FILE *fp, const char *field, u64 value,
- struct bit_names *bits, bool *first)
-{
- int i = 0, printed = comma_fprintf(fp, first, " %s: ", field);
- bool first_bit = true;
-
- do {
- if (value & bits[i].bit) {
- printed += fprintf(fp, "%s%s", first_bit ? "" : "|", bits[i].name);
- first_bit = false;
- }
- } while (bits[++i].name != NULL);
-
- return printed;
-}
-
-static int sample_type__fprintf(FILE *fp, bool *first, u64 value)
-{
-#define bit_name(n) { PERF_SAMPLE_##n, #n }
- struct bit_names bits[] = {
- bit_name(IP), bit_name(TID), bit_name(TIME), bit_name(ADDR),
- bit_name(READ), bit_name(CALLCHAIN), bit_name(ID), bit_name(CPU),
- bit_name(PERIOD), bit_name(STREAM_ID), bit_name(RAW),
- bit_name(BRANCH_STACK), bit_name(REGS_USER), bit_name(STACK_USER),
- bit_name(IDENTIFIER), bit_name(REGS_INTR),
- { .name = NULL, }
- };
-#undef bit_name
- return bits__fprintf(fp, "sample_type", value, bits, first);
-}
-
-static int read_format__fprintf(FILE *fp, bool *first, u64 value)
+static int __print_attr__fprintf(FILE *fp, const char *name, const char *val, void *priv)
{
-#define bit_name(n) { PERF_FORMAT_##n, #n }
- struct bit_names bits[] = {
- bit_name(TOTAL_TIME_ENABLED), bit_name(TOTAL_TIME_RUNNING),
- bit_name(ID), bit_name(GROUP),
- { .name = NULL, }
- };
-#undef bit_name
- return bits__fprintf(fp, "read_format", value, bits, first);
+ return comma_fprintf(fp, (bool *)priv, " %s: %s", name, val);
}
int perf_evsel__fprintf(struct perf_evsel *evsel,
printed += fprintf(fp, "%s", perf_evsel__name(evsel));
- if (details->verbose || details->freq) {
+ if (details->verbose) {
+ printed += perf_event_attr__fprintf(fp, &evsel->attr,
+ __print_attr__fprintf, &first);
+ } else if (details->freq) {
printed += comma_fprintf(fp, &first, " sample_freq=%" PRIu64,
(u64)evsel->attr.sample_freq);
}
-
- if (details->verbose) {
- if_print(type);
- if_print(config);
- if_print(config1);
- if_print(config2);
- if_print(size);
- printed += sample_type__fprintf(fp, &first, evsel->attr.sample_type);
- if (evsel->attr.read_format)
- printed += read_format__fprintf(fp, &first, evsel->attr.read_format);
- if_print(disabled);
- if_print(inherit);
- if_print(pinned);
- if_print(exclusive);
- if_print(exclude_user);
- if_print(exclude_kernel);
- if_print(exclude_hv);
- if_print(exclude_idle);
- if_print(mmap);
- if_print(mmap2);
- if_print(comm);
- if_print(comm_exec);
- if_print(freq);
- if_print(inherit_stat);
- if_print(enable_on_exec);
- if_print(task);
- if_print(watermark);
- if_print(precise_ip);
- if_print(mmap_data);
- if_print(sample_id_all);
- if_print(exclude_host);
- if_print(exclude_guest);
- if_print(__reserved_1);
- if_print(wakeup_events);
- if_print(bp_type);
- if_print(branch_sample_type);
- }
out:
fputc('\n', fp);
return ++printed;
"The PMU counters are busy/taken by another profiler.\n"
"We found oprofile daemon running, please stop it and try again.");
break;
+ case EINVAL:
+ if (perf_missing_features.clockid)
+ return scnprintf(msg, size, "clockid feature not supported.");
+ if (perf_missing_features.clockid_wrong)
+ return scnprintf(msg, size, "wrong clockid (%d).", clockid);
+ break;
default:
break;
}
bool freq;
bool verbose;
bool event_group;
+ bool force;
};
int perf_evsel__fprintf(struct perf_evsel *evsel,
(_evsel) && (_evsel)->leader == (_leader); \
(_evsel) = list_entry((_evsel)->node.next, struct perf_evsel, node))
+static inline bool has_branch_callstack(struct perf_evsel *evsel)
+{
+ return evsel->attr.branch_sample_type & PERF_SAMPLE_BRANCH_CALL_STACK;
+}
+
+typedef int (*attr__fprintf_f)(FILE *, const char *, const char *, void *);
+
+int perf_event_attr__fprintf(FILE *fp, struct perf_event_attr *attr,
+ attr__fprintf_f attr__fprintf, void *priv);
+
#endif /* __PERF_EVSEL_H */
goto out;
}
+static int __desc_attr__fprintf(FILE *fp, const char *name, const char *val,
+ void *priv __attribute__((unused)))
+{
+ return fprintf(fp, ", %s = %s", name, val);
+}
+
static void print_event_desc(struct perf_header *ph, int fd, FILE *fp)
{
struct perf_evsel *evsel, *events = read_event_desc(ph, fd);
for (evsel = events; evsel->attr.size; evsel++) {
fprintf(fp, "# event : name = %s, ", evsel->name);
- fprintf(fp, "type = %d, config = 0x%"PRIx64
- ", config1 = 0x%"PRIx64", config2 = 0x%"PRIx64,
- evsel->attr.type,
- (u64)evsel->attr.config,
- (u64)evsel->attr.config1,
- (u64)evsel->attr.config2);
-
- fprintf(fp, ", excl_usr = %d, excl_kern = %d",
- evsel->attr.exclude_user,
- evsel->attr.exclude_kernel);
-
- fprintf(fp, ", excl_host = %d, excl_guest = %d",
- evsel->attr.exclude_host,
- evsel->attr.exclude_guest);
-
- fprintf(fp, ", precise_ip = %d", evsel->attr.precise_ip);
-
- fprintf(fp, ", attr_mmap2 = %d", evsel->attr.mmap2);
- fprintf(fp, ", attr_mmap = %d", evsel->attr.mmap);
- fprintf(fp, ", attr_mmap_data = %d", evsel->attr.mmap_data);
if (evsel->ids) {
fprintf(fp, ", id = {");
for (j = 0, id = evsel->id; j < evsel->ids; j++, id++) {
fprintf(fp, " }");
}
+ perf_event_attr__fprintf(fp, &evsel->attr, __desc_attr__fprintf, NULL);
+
fputc('\n', fp);
}
dso__set_build_id(dso, &bev->build_id);
- if (!is_kernel_module(filename, NULL))
+ if (!is_kernel_module(filename))
dso->kernel = dso_type;
build_id__sprintf(dso->build_id, sizeof(dso->build_id),
if (read_attr(fd, header, &f_attr) < 0)
goto out_errno;
- if (header->needs_swap)
+ if (header->needs_swap) {
+ f_attr.ids.size = bswap_64(f_attr.ids.size);
+ f_attr.ids.offset = bswap_64(f_attr.ids.offset);
perf_event__attr_swap(&f_attr.attr);
+ }
tmp = lseek(fd, 0, SEEK_CUR);
evsel = perf_evsel__new(&f_attr.attr);
while (next) {
n = rb_entry(next, struct hist_entry, rb_node);
next = rb_next(&n->rb_node);
- /*
- * We may be annotating this, for instance, so keep it here in
- * case some it gets new samples, we'll eventually free it when
- * the user stops browsing and it agains gets fully decayed.
- */
if (((zap_user && n->level == '.') ||
(zap_kernel && n->level != '.') ||
- hists__decay_entry(hists, n)) &&
- !n->used) {
+ hists__decay_entry(hists, n))) {
hists__delete_entry(hists, n);
}
}
callchain_init(he->callchain);
INIT_LIST_HEAD(&he->pairs.node);
+ thread__get(he->thread);
}
return he;
void hist_entry__delete(struct hist_entry *he)
{
+ thread__zput(he->thread);
zfree(&he->branch_info);
zfree(&he->mem_info);
zfree(&he->stat_acc);
/* force fold unfiltered entry for simplicity */
h->ms.unfolded = false;
h->row_offset = 0;
+ h->nr_rows = 0;
hists->stats.nr_non_filtered_samples += h->stat.nr_events;
struct rb_root entries_collapsed;
u64 nr_entries;
u64 nr_non_filtered_entries;
- const struct thread *thread_filter;
+ struct thread *thread_filter;
const struct dso *dso_filter;
const char *uid_filter_str;
const char *symbol_filter_str;
#ifdef HAVE_SLANG_SUPPORT
#include "../ui/keysyms.h"
+int map_symbol__tui_annotate(struct map_symbol *ms, struct perf_evsel *evsel,
+ struct hist_browser_timer *hbt);
+
int hist_entry__tui_annotate(struct hist_entry *he, struct perf_evsel *evsel,
struct hist_browser_timer *hbt);
{
return 0;
}
+static inline int map_symbol__tui_annotate(struct map_symbol *ms __maybe_unused,
+ struct perf_evsel *evsel __maybe_unused,
+ struct hist_browser_timer *hbt __maybe_unused)
+{
+ return 0;
+}
static inline int hist_entry__tui_annotate(struct hist_entry *he __maybe_unused,
struct perf_evsel *evsel __maybe_unused,
/* Just disable it so we can build arch/x86/lib/memcpy_64.S for perf bench: */
#define altinstruction_entry #
+#define ALTERNATIVE_2 #
#endif
int timerfd;
unsigned int display_time;
bool live;
+ bool force;
};
struct kvm_reg_events_ops {
--- /dev/null
+#include <lzma.h>
+#include <stdio.h>
+#include <linux/compiler.h>
+#include "util.h"
+#include "debug.h"
+
+#define BUFSIZE 8192
+
+static const char *lzma_strerror(lzma_ret ret)
+{
+ switch ((int) ret) {
+ case LZMA_MEM_ERROR:
+ return "Memory allocation failed";
+ case LZMA_OPTIONS_ERROR:
+ return "Unsupported decompressor flags";
+ case LZMA_FORMAT_ERROR:
+ return "The input is not in the .xz format";
+ case LZMA_DATA_ERROR:
+ return "Compressed file is corrupt";
+ case LZMA_BUF_ERROR:
+ return "Compressed file is truncated or otherwise corrupt";
+ default:
+ return "Unknown error, possibly a bug";
+ }
+}
+
+int lzma_decompress_to_file(const char *input, int output_fd)
+{
+ lzma_action action = LZMA_RUN;
+ lzma_stream strm = LZMA_STREAM_INIT;
+ lzma_ret ret;
+
+ u8 buf_in[BUFSIZE];
+ u8 buf_out[BUFSIZE];
+ FILE *infile;
+
+ infile = fopen(input, "rb");
+ if (!infile) {
+ pr_err("lzma: fopen failed on %s: '%s'\n",
+ input, strerror(errno));
+ return -1;
+ }
+
+ ret = lzma_stream_decoder(&strm, UINT64_MAX, LZMA_CONCATENATED);
+ if (ret != LZMA_OK) {
+ pr_err("lzma: lzma_stream_decoder failed %s (%d)\n",
+ lzma_strerror(ret), ret);
+ return -1;
+ }
+
+ strm.next_in = NULL;
+ strm.avail_in = 0;
+ strm.next_out = buf_out;
+ strm.avail_out = sizeof(buf_out);
+
+ while (1) {
+ if (strm.avail_in == 0 && !feof(infile)) {
+ strm.next_in = buf_in;
+ strm.avail_in = fread(buf_in, 1, sizeof(buf_in), infile);
+
+ if (ferror(infile)) {
+ pr_err("lzma: read error: %s\n", strerror(errno));
+ return -1;
+ }
+
+ if (feof(infile))
+ action = LZMA_FINISH;
+ }
+
+ ret = lzma_code(&strm, action);
+
+ if (strm.avail_out == 0 || ret == LZMA_STREAM_END) {
+ ssize_t write_size = sizeof(buf_out) - strm.avail_out;
+
+ if (writen(output_fd, buf_out, write_size) != write_size) {
+ pr_err("lzma: write error: %s\n", strerror(errno));
+ return -1;
+ }
+
+ strm.next_out = buf_out;
+ strm.avail_out = sizeof(buf_out);
+ }
+
+ if (ret != LZMA_OK) {
+ if (ret == LZMA_STREAM_END)
+ return 0;
+
+ pr_err("lzma: failed %s\n", lzma_strerror(ret));
+ return -1;
+ }
+ }
+
+ fclose(infile);
+ return 0;
+}
}
}
-void machine__delete_dead_threads(struct machine *machine)
-{
- struct thread *n, *t;
-
- list_for_each_entry_safe(t, n, &machine->dead_threads, node) {
- list_del(&t->node);
- thread__delete(t);
- }
-}
-
void machine__delete_threads(struct machine *machine)
{
struct rb_node *nd = rb_first(&machine->threads);
while (nd) {
struct thread *t = rb_entry(nd, struct thread, rb_node);
- rb_erase(&t->rb_node, &machine->threads);
nd = rb_next(nd);
- thread__delete(t);
+ machine__remove_thread(machine, t);
}
}
* the full rbtree:
*/
th = machine->last_match;
- if (th && th->tid == tid) {
- machine__update_thread_pid(machine, th, pid);
- return th;
+ if (th != NULL) {
+ if (th->tid == tid) {
+ machine__update_thread_pid(machine, th, pid);
+ return th;
+ }
+
+ thread__zput(machine->last_match);
}
while (*p != NULL) {
th = rb_entry(parent, struct thread, rb_node);
if (th->tid == tid) {
- machine->last_match = th;
+ machine->last_match = thread__get(th);
machine__update_thread_pid(machine, th, pid);
return th;
}
thread__delete(th);
return NULL;
}
-
- machine->last_match = th;
+ /*
+ * It is now in the rbtree, get a ref
+ */
+ thread__get(th);
+ machine->last_match = thread__get(th);
}
return th;
return 0;
}
+static struct dso*
+machine__module_dso(struct machine *machine, struct kmod_path *m,
+ const char *filename)
+{
+ struct dso *dso;
+
+ dso = dsos__find(&machine->kernel_dsos, m->name, true);
+ if (!dso) {
+ dso = dsos__addnew(&machine->kernel_dsos, m->name);
+ if (dso == NULL)
+ return NULL;
+
+ if (machine__is_host(machine))
+ dso->symtab_type = DSO_BINARY_TYPE__SYSTEM_PATH_KMODULE;
+ else
+ dso->symtab_type = DSO_BINARY_TYPE__GUEST_KMODULE;
+
+ /* _KMODULE_COMP should be next to _KMODULE */
+ if (m->kmod && m->comp)
+ dso->symtab_type++;
+
+ dso__set_short_name(dso, strdup(m->name), true);
+ dso__set_long_name(dso, strdup(filename), true);
+ }
+
+ return dso;
+}
+
struct map *machine__new_module(struct machine *machine, u64 start,
const char *filename)
{
- struct map *map;
- struct dso *dso = __dsos__findnew(&machine->kernel_dsos, filename);
- bool compressed;
+ struct map *map = NULL;
+ struct dso *dso;
+ struct kmod_path m;
- if (dso == NULL)
+ if (kmod_path__parse_name(&m, filename))
return NULL;
- map = map__new2(start, dso, MAP__FUNCTION);
- if (map == NULL)
- return NULL;
+ map = map_groups__find_by_name(&machine->kmaps, MAP__FUNCTION,
+ m.name);
+ if (map)
+ goto out;
- if (machine__is_host(machine))
- dso->symtab_type = DSO_BINARY_TYPE__SYSTEM_PATH_KMODULE;
- else
- dso->symtab_type = DSO_BINARY_TYPE__GUEST_KMODULE;
+ dso = machine__module_dso(machine, &m, filename);
+ if (dso == NULL)
+ goto out;
- /* _KMODULE_COMP should be next to _KMODULE */
- if (is_kernel_module(filename, &compressed) && compressed)
- dso->symtab_type++;
+ map = map__new2(start, dso, MAP__FUNCTION);
+ if (map == NULL)
+ goto out;
map_groups__insert(&machine->kmaps, map);
+
+out:
+ free(m.name);
return map;
}
machine->vmlinux_maps[type]->unmap_ip =
identity__map_ip;
kmap = map__kmap(machine->vmlinux_maps[type]);
+ if (!kmap)
+ return -1;
+
kmap->kmaps = &machine->kmaps;
map_groups__insert(&machine->kmaps,
machine->vmlinux_maps[type]);
kmap = map__kmap(machine->vmlinux_maps[type]);
map_groups__remove(&machine->kmaps,
machine->vmlinux_maps[type]);
- if (kmap->ref_reloc_sym) {
+ if (kmap && kmap->ref_reloc_sym) {
/*
* ref_reloc_sym is shared among all maps, so free just
* on one of them.
return strdup(name);
}
+static bool is_kmod_dso(struct dso *dso)
+{
+ return dso->symtab_type == DSO_BINARY_TYPE__SYSTEM_PATH_KMODULE ||
+ dso->symtab_type == DSO_BINARY_TYPE__GUEST_KMODULE;
+}
+
+static int map_groups__set_module_path(struct map_groups *mg, const char *path,
+ struct kmod_path *m)
+{
+ struct map *map;
+ char *long_name;
+
+ map = map_groups__find_by_name(mg, MAP__FUNCTION, m->name);
+ if (map == NULL)
+ return 0;
+
+ long_name = strdup(path);
+ if (long_name == NULL)
+ return -ENOMEM;
+
+ dso__set_long_name(map->dso, long_name, true);
+ dso__kernel_module_get_build_id(map->dso, "");
+
+ /*
+ * Full name could reveal us kmod compression, so
+ * we need to update the symtab_type if needed.
+ */
+ if (m->comp && is_kmod_dso(map->dso))
+ map->dso->symtab_type++;
+
+ return 0;
+}
+
static int map_groups__set_modules_path_dir(struct map_groups *mg,
const char *dir_name, int depth)
{
if (ret < 0)
goto out;
} else {
- char *dot = strrchr(dent->d_name, '.'),
- dso_name[PATH_MAX];
- struct map *map;
- char *long_name;
+ struct kmod_path m;
- if (dot == NULL)
- continue;
-
- /* On some system, modules are compressed like .ko.gz */
- if (is_supported_compression(dot + 1) &&
- is_kmodule_extension(dot - 2))
- dot -= 3;
+ ret = kmod_path__parse_name(&m, dent->d_name);
+ if (ret)
+ goto out;
- snprintf(dso_name, sizeof(dso_name), "[%.*s]",
- (int)(dot - dent->d_name), dent->d_name);
+ if (m.kmod)
+ ret = map_groups__set_module_path(mg, path, &m);
- strxfrchar(dso_name, '-', '_');
- map = map_groups__find_by_name(mg, MAP__FUNCTION,
- dso_name);
- if (map == NULL)
- continue;
+ free(m.name);
- long_name = strdup(path);
- if (long_name == NULL) {
- ret = -1;
+ if (ret)
goto out;
- }
- dso__set_long_name(map->dso, long_name, true);
- dso__kernel_module_get_build_id(map->dso, "");
}
}
strlen(kmmap_prefix) - 1) == 0;
if (event->mmap.filename[0] == '/' ||
(!is_kernel_mmap && event->mmap.filename[0] == '[')) {
-
- char short_module_name[1024];
- char *name, *dot;
-
- if (event->mmap.filename[0] == '/') {
- name = strrchr(event->mmap.filename, '/');
- if (name == NULL)
- goto out_problem;
-
- ++name; /* skip / */
- dot = strrchr(name, '.');
- if (dot == NULL)
- goto out_problem;
- /* On some system, modules are compressed like .ko.gz */
- if (is_supported_compression(dot + 1))
- dot -= 3;
- if (!is_kmodule_extension(dot + 1))
- goto out_problem;
- snprintf(short_module_name, sizeof(short_module_name),
- "[%.*s]", (int)(dot - name), name);
- strxfrchar(short_module_name, '-', '_');
- } else
- strcpy(short_module_name, event->mmap.filename);
-
map = machine__new_module(machine, event->mmap.start,
event->mmap.filename);
if (map == NULL)
goto out_problem;
- name = strdup(short_module_name);
- if (name == NULL)
- goto out_problem;
-
- dso__set_short_name(map->dso, name, true);
map->end = map->start + event->mmap.len;
} else if (is_kernel_mmap) {
const char *symbol_name = (event->mmap.filename +
struct dso *dso;
list_for_each_entry(dso, &machine->kernel_dsos.head, node) {
- if (is_kernel_module(dso->long_name, NULL))
+ if (is_kernel_module(dso->long_name))
continue;
kernel = dso;
return 0;
}
-static void machine__remove_thread(struct machine *machine, struct thread *th)
+void machine__remove_thread(struct machine *machine, struct thread *th)
{
- machine->last_match = NULL;
+ if (machine->last_match == th)
+ thread__zput(machine->last_match);
+
rb_erase(&th->rb_node, &machine->threads);
/*
- * We may have references to this thread, for instance in some hist_entry
- * instances, so just move them to a separate list.
+ * Move it first to the dead_threads list, then drop the reference,
+ * if this is the last reference, then the thread__delete destructor
+ * will be called and we will remove it from the dead_threads list.
*/
list_add_tail(&th->node, &machine->dead_threads);
+ thread__put(th);
}
int machine__process_fork_event(struct machine *machine, union perf_event *event,
static int add_callchain_ip(struct thread *thread,
struct symbol **parent,
struct addr_location *root_al,
- bool branch_history,
+ u8 *cpumode,
u64 ip)
{
struct addr_location al;
al.filtered = 0;
al.sym = NULL;
- if (branch_history)
+ if (!cpumode) {
thread__find_cpumode_addr_location(thread, MAP__FUNCTION,
ip, &al);
- else {
- u8 cpumode = PERF_RECORD_MISC_USER;
-
+ } else {
if (ip >= PERF_CONTEXT_MAX) {
switch (ip) {
case PERF_CONTEXT_HV:
- cpumode = PERF_RECORD_MISC_HYPERVISOR;
+ *cpumode = PERF_RECORD_MISC_HYPERVISOR;
break;
case PERF_CONTEXT_KERNEL:
- cpumode = PERF_RECORD_MISC_KERNEL;
+ *cpumode = PERF_RECORD_MISC_KERNEL;
break;
case PERF_CONTEXT_USER:
- cpumode = PERF_RECORD_MISC_USER;
+ *cpumode = PERF_RECORD_MISC_USER;
break;
default:
pr_debug("invalid callchain context: "
}
return 0;
}
- thread__find_addr_location(thread, cpumode, MAP__FUNCTION,
- ip, &al);
+ thread__find_addr_location(thread, *cpumode, MAP__FUNCTION,
+ ip, &al);
}
if (al.sym != NULL) {
return nr;
}
-static int thread__resolve_callchain_sample(struct thread *thread,
- struct ip_callchain *chain,
- struct branch_stack *branch,
- struct symbol **parent,
- struct addr_location *root_al,
- int max_stack)
+/*
+ * Recolve LBR callstack chain sample
+ * Return:
+ * 1 on success get LBR callchain information
+ * 0 no available LBR callchain information, should try fp
+ * negative error code on other errors.
+ */
+static int resolve_lbr_callchain_sample(struct thread *thread,
+ struct perf_sample *sample,
+ struct symbol **parent,
+ struct addr_location *root_al,
+ int max_stack)
{
+ struct ip_callchain *chain = sample->callchain;
int chain_nr = min(max_stack, (int)chain->nr);
+ u8 cpumode = PERF_RECORD_MISC_USER;
+ int i, j, err;
+ u64 ip;
+
+ for (i = 0; i < chain_nr; i++) {
+ if (chain->ips[i] == PERF_CONTEXT_USER)
+ break;
+ }
+
+ /* LBR only affects the user callchain */
+ if (i != chain_nr) {
+ struct branch_stack *lbr_stack = sample->branch_stack;
+ int lbr_nr = lbr_stack->nr;
+ /*
+ * LBR callstack can only get user call chain.
+ * The mix_chain_nr is kernel call chain
+ * number plus LBR user call chain number.
+ * i is kernel call chain number,
+ * 1 is PERF_CONTEXT_USER,
+ * lbr_nr + 1 is the user call chain number.
+ * For details, please refer to the comments
+ * in callchain__printf
+ */
+ int mix_chain_nr = i + 1 + lbr_nr + 1;
+
+ if (mix_chain_nr > PERF_MAX_STACK_DEPTH + PERF_MAX_BRANCH_DEPTH) {
+ pr_warning("corrupted callchain. skipping...\n");
+ return 0;
+ }
+
+ for (j = 0; j < mix_chain_nr; j++) {
+ if (callchain_param.order == ORDER_CALLEE) {
+ if (j < i + 1)
+ ip = chain->ips[j];
+ else if (j > i + 1)
+ ip = lbr_stack->entries[j - i - 2].from;
+ else
+ ip = lbr_stack->entries[0].to;
+ } else {
+ if (j < lbr_nr)
+ ip = lbr_stack->entries[lbr_nr - j - 1].from;
+ else if (j > lbr_nr)
+ ip = chain->ips[i + 1 - (j - lbr_nr)];
+ else
+ ip = lbr_stack->entries[0].to;
+ }
+
+ err = add_callchain_ip(thread, parent, root_al, &cpumode, ip);
+ if (err)
+ return (err < 0) ? err : 0;
+ }
+ return 1;
+ }
+
+ return 0;
+}
+
+static int thread__resolve_callchain_sample(struct thread *thread,
+ struct perf_evsel *evsel,
+ struct perf_sample *sample,
+ struct symbol **parent,
+ struct addr_location *root_al,
+ int max_stack)
+{
+ struct branch_stack *branch = sample->branch_stack;
+ struct ip_callchain *chain = sample->callchain;
+ int chain_nr = min(max_stack, (int)chain->nr);
+ u8 cpumode = PERF_RECORD_MISC_USER;
int i, j, err;
int skip_idx = -1;
int first_call = 0;
+ callchain_cursor_reset(&callchain_cursor);
+
+ if (has_branch_callstack(evsel)) {
+ err = resolve_lbr_callchain_sample(thread, sample, parent,
+ root_al, max_stack);
+ if (err)
+ return (err < 0) ? err : 0;
+ }
+
/*
* Based on DWARF debug information, some architectures skip
* a callchain entry saved by the kernel.
if (chain->nr < PERF_MAX_STACK_DEPTH)
skip_idx = arch_skip_callchain_idx(thread, chain);
- callchain_cursor_reset(&callchain_cursor);
-
/*
* Add branches to call stack for easier browsing. This gives
* more context for a sample than just the callers.
for (i = 0; i < nr; i++) {
err = add_callchain_ip(thread, parent, root_al,
- true, be[i].to);
+ NULL, be[i].to);
if (!err)
err = add_callchain_ip(thread, parent, root_al,
- true, be[i].from);
+ NULL, be[i].from);
if (err == -EINVAL)
break;
if (err)
#endif
ip = chain->ips[j];
- err = add_callchain_ip(thread, parent, root_al, false, ip);
+ err = add_callchain_ip(thread, parent, root_al, &cpumode, ip);
if (err)
return (err < 0) ? err : 0;
struct addr_location *root_al,
int max_stack)
{
- int ret = thread__resolve_callchain_sample(thread, sample->callchain,
- sample->branch_stack,
- parent, root_al, max_stack);
+ int ret = thread__resolve_callchain_sample(thread, evsel,
+ sample, parent,
+ root_al, max_stack);
if (ret)
return ret;
struct machine *machine__new_host(void);
int machine__init(struct machine *machine, const char *root_dir, pid_t pid);
void machine__exit(struct machine *machine);
-void machine__delete_dead_threads(struct machine *machine);
void machine__delete_threads(struct machine *machine);
void machine__delete(struct machine *machine);
+void machine__remove_thread(struct machine *machine, struct thread *th);
struct branch_info *sample__resolve_bstack(struct perf_sample *sample,
struct addr_location *al);
return rb_entry(next, struct map, rb_node);
return NULL;
}
+
+struct kmap *map__kmap(struct map *map)
+{
+ if (!map->dso || !map->dso->kernel) {
+ pr_err("Internal error: map__kmap with a non-kernel map\n");
+ return NULL;
+ }
+ return (struct kmap *)(map + 1);
+}
+
+struct map_groups *map__kmaps(struct map *map)
+{
+ struct kmap *kmap = map__kmap(map);
+
+ if (!kmap || !kmap->kmaps) {
+ pr_err("Internal error: map__kmaps with a non-kernel map\n");
+ return NULL;
+ }
+ return kmap->kmaps;
+}
void map_groups__put(struct map_groups *mg);
-static inline struct kmap *map__kmap(struct map *map)
-{
- return (struct kmap *)(map + 1);
-}
+struct kmap *map__kmap(struct map *map);
+struct map_groups *map__kmaps(struct map *map);
static inline u64 map__map_ip(struct map *map, u64 ip)
{
#include <linux/compiler.h>
#include <linux/string.h>
#include "ordered-events.h"
-#include "evlist.h"
#include "session.h"
#include "asm/bug.h"
#include "debug.h"
return new;
}
-struct ordered_event *
-ordered_events__new(struct ordered_events *oe, u64 timestamp,
+static struct ordered_event *
+ordered_events__new_event(struct ordered_events *oe, u64 timestamp,
union perf_event *event)
{
struct ordered_event *new;
free_dup_event(oe, event->event);
}
-static int __ordered_events__flush(struct perf_session *s,
- struct perf_tool *tool)
+int ordered_events__queue(struct ordered_events *oe, union perf_event *event,
+ struct perf_sample *sample, u64 file_offset)
+{
+ u64 timestamp = sample->time;
+ struct ordered_event *oevent;
+
+ if (!timestamp || timestamp == ~0ULL)
+ return -ETIME;
+
+ if (timestamp < oe->last_flush) {
+ pr_oe_time(timestamp, "out of order event\n");
+ pr_oe_time(oe->last_flush, "last flush, last_flush_type %d\n",
+ oe->last_flush_type);
+
+ oe->nr_unordered_events++;
+ }
+
+ oevent = ordered_events__new_event(oe, timestamp, event);
+ if (!oevent) {
+ ordered_events__flush(oe, OE_FLUSH__HALF);
+ oevent = ordered_events__new_event(oe, timestamp, event);
+ }
+
+ if (!oevent)
+ return -ENOMEM;
+
+ oevent->file_offset = file_offset;
+ return 0;
+}
+
+static int __ordered_events__flush(struct ordered_events *oe)
{
- struct ordered_events *oe = &s->ordered_events;
struct list_head *head = &oe->events;
struct ordered_event *tmp, *iter;
- struct perf_sample sample;
u64 limit = oe->next_flush;
u64 last_ts = oe->last ? oe->last->timestamp : 0ULL;
bool show_progress = limit == ULLONG_MAX;
struct ui_progress prog;
int ret;
- if (!tool->ordered_events || !limit)
+ if (!limit)
return 0;
if (show_progress)
if (iter->timestamp > limit)
break;
-
- ret = perf_evlist__parse_sample(s->evlist, iter->event, &sample);
+ ret = oe->deliver(oe, iter);
if (ret)
- pr_err("Can't parse sample, err = %d\n", ret);
- else {
- ret = perf_session__deliver_event(s, iter->event, &sample, tool,
- iter->file_offset);
- if (ret)
- return ret;
- }
+ return ret;
ordered_events__delete(oe, iter);
oe->last_flush = iter->timestamp;
return 0;
}
-int ordered_events__flush(struct perf_session *s, struct perf_tool *tool,
- enum oe_flush how)
+int ordered_events__flush(struct ordered_events *oe, enum oe_flush how)
{
- struct ordered_events *oe = &s->ordered_events;
static const char * const str[] = {
"NONE",
"FINAL",
};
int err;
+ if (oe->nr_events == 0)
+ return 0;
+
switch (how) {
case OE_FLUSH__FINAL:
oe->next_flush = ULLONG_MAX;
str[how], oe->nr_events);
pr_oe_time(oe->max_timestamp, "max_timestamp\n");
- err = __ordered_events__flush(s, tool);
+ err = __ordered_events__flush(oe);
if (!err) {
if (how == OE_FLUSH__ROUND)
return err;
}
-void ordered_events__init(struct ordered_events *oe)
+void ordered_events__init(struct ordered_events *oe, ordered_events__deliver_t deliver)
{
INIT_LIST_HEAD(&oe->events);
INIT_LIST_HEAD(&oe->cache);
INIT_LIST_HEAD(&oe->to_free);
oe->max_alloc_size = (u64) -1;
oe->cur_alloc_size = 0;
+ oe->deliver = deliver;
}
void ordered_events__free(struct ordered_events *oe)
#define __ORDERED_EVENTS_H
#include <linux/types.h>
-#include "tool.h"
-struct perf_session;
+struct perf_sample;
struct ordered_event {
u64 timestamp;
OE_FLUSH__HALF,
};
+struct ordered_events;
+
+typedef int (*ordered_events__deliver_t)(struct ordered_events *oe,
+ struct ordered_event *event);
+
struct ordered_events {
u64 last_flush;
u64 next_flush;
struct list_head to_free;
struct ordered_event *buffer;
struct ordered_event *last;
+ ordered_events__deliver_t deliver;
int buffer_idx;
unsigned int nr_events;
enum oe_flush last_flush_type;
+ u32 nr_unordered_events;
bool copy_on_queue;
};
-struct ordered_event *ordered_events__new(struct ordered_events *oe, u64 timestamp,
- union perf_event *event);
+int ordered_events__queue(struct ordered_events *oe, union perf_event *event,
+ struct perf_sample *sample, u64 file_offset);
void ordered_events__delete(struct ordered_events *oe, struct ordered_event *event);
-int ordered_events__flush(struct perf_session *s, struct perf_tool *tool,
- enum oe_flush how);
-void ordered_events__init(struct ordered_events *oe);
+int ordered_events__flush(struct ordered_events *oe, enum oe_flush how);
+void ordered_events__init(struct ordered_events *oe, ordered_events__deliver_t deliver);
void ordered_events__free(struct ordered_events *oe);
static inline
#define MAX_NAME_LEN 100
-struct event_symbol {
- const char *symbol;
- const char *alias;
-};
-
#ifdef PARSER_DEBUG
extern int parse_events_debug;
#endif
*/
static int perf_pmu_events_list_num;
-static struct event_symbol event_symbols_hw[PERF_COUNT_HW_MAX] = {
+struct event_symbol event_symbols_hw[PERF_COUNT_HW_MAX] = {
[PERF_COUNT_HW_CPU_CYCLES] = {
.symbol = "cpu-cycles",
.alias = "cycles",
},
};
-static struct event_symbol event_symbols_sw[PERF_COUNT_SW_MAX] = {
+struct event_symbol event_symbols_sw[PERF_COUNT_SW_MAX] = {
[PERF_COUNT_SW_CPU_CLOCK] = {
.symbol = "cpu-clock",
.alias = "",
char evt_path[MAXPATHLEN];
char dir_path[MAXPATHLEN];
- if (debugfs_valid_mountpoint(tracing_events_path))
- return NULL;
-
sys_dir = opendir(tracing_events_path);
if (!sys_dir)
return NULL;
int parse_events_add_tracepoint(struct list_head *list, int *idx,
char *sys, char *event)
{
- int ret;
-
- ret = debugfs_valid_mountpoint(tracing_events_path);
- if (ret)
- return ret;
-
if (strpbrk(sys, "*?"))
return add_tracepoint_multi_sys(list, idx, sys, event);
else
int eh;
int eH;
int eG;
+ int eI;
int precise;
int exclude_GH;
int sample_read;
int eh = evsel ? evsel->attr.exclude_hv : 0;
int eH = evsel ? evsel->attr.exclude_host : 0;
int eG = evsel ? evsel->attr.exclude_guest : 0;
+ int eI = evsel ? evsel->attr.exclude_idle : 0;
int precise = evsel ? evsel->attr.precise_ip : 0;
int sample_read = 0;
int pinned = evsel ? evsel->attr.pinned : 0;
if (!exclude_GH)
exclude_GH = eG = eH = 1;
eH = 0;
+ } else if (*str == 'I') {
+ eI = 1;
} else if (*str == 'p') {
precise++;
/* use of precise requires exclude_guest */
mod->eh = eh;
mod->eH = eH;
mod->eG = eG;
+ mod->eI = eI;
mod->precise = precise;
mod->exclude_GH = exclude_GH;
mod->sample_read = sample_read;
char *p = str;
/* The sizeof includes 0 byte as well. */
- if (strlen(str) > (sizeof("ukhGHpppSD") - 1))
+ if (strlen(str) > (sizeof("ukhGHpppSDI") - 1))
return -1;
while (*p) {
evsel->attr.precise_ip = mod.precise;
evsel->attr.exclude_host = mod.eH;
evsel->attr.exclude_guest = mod.eG;
+ evsel->attr.exclude_idle = mod.eI;
evsel->exclude_GH = mod.exclude_GH;
evsel->sample_read = mod.sample_read;
"Hardware breakpoint",
};
+static int cmp_string(const void *a, const void *b)
+{
+ const char * const *as = a;
+ const char * const *bs = b;
+
+ return strcmp(*as, *bs);
+}
+
/*
* Print the events from <debugfs_mount_point>/tracing/events
*/
struct dirent *sys_next, *evt_next, sys_dirent, evt_dirent;
char evt_path[MAXPATHLEN];
char dir_path[MAXPATHLEN];
- char sbuf[STRERR_BUFSIZE];
-
- if (debugfs_valid_mountpoint(tracing_events_path)) {
- printf(" [ Tracepoints not available: %s ]\n",
- strerror_r(errno, sbuf, sizeof(sbuf)));
- return;
- }
+ char **evt_list = NULL;
+ unsigned int evt_i = 0, evt_num = 0;
+ bool evt_num_known = false;
+restart:
sys_dir = opendir(tracing_events_path);
if (!sys_dir)
return;
+ if (evt_num_known) {
+ evt_list = zalloc(sizeof(char *) * evt_num);
+ if (!evt_list)
+ goto out_close_sys_dir;
+ }
+
for_each_subsystem(sys_dir, sys_dirent, sys_next) {
if (subsys_glob != NULL &&
!strglobmatch(sys_dirent.d_name, subsys_glob))
!strglobmatch(evt_dirent.d_name, event_glob))
continue;
- if (name_only) {
- printf("%s:%s ", sys_dirent.d_name, evt_dirent.d_name);
+ if (!evt_num_known) {
+ evt_num++;
continue;
}
snprintf(evt_path, MAXPATHLEN, "%s:%s",
sys_dirent.d_name, evt_dirent.d_name);
- printf(" %-50s [%s]\n", evt_path,
- event_type_descriptors[PERF_TYPE_TRACEPOINT]);
+
+ evt_list[evt_i] = strdup(evt_path);
+ if (evt_list[evt_i] == NULL)
+ goto out_close_evt_dir;
+ evt_i++;
}
closedir(evt_dir);
}
closedir(sys_dir);
+
+ if (!evt_num_known) {
+ evt_num_known = true;
+ goto restart;
+ }
+ qsort(evt_list, evt_num, sizeof(char *), cmp_string);
+ evt_i = 0;
+ while (evt_i < evt_num) {
+ if (name_only) {
+ printf("%s ", evt_list[evt_i++]);
+ continue;
+ }
+ printf(" %-50s [%s]\n", evt_list[evt_i++],
+ event_type_descriptors[PERF_TYPE_TRACEPOINT]);
+ }
+ if (evt_num)
+ printf("\n");
+
+out_free:
+ evt_num = evt_i;
+ for (evt_i = 0; evt_i < evt_num; evt_i++)
+ zfree(&evt_list[evt_i]);
+ zfree(&evt_list);
+ return;
+
+out_close_evt_dir:
+ closedir(evt_dir);
+out_close_sys_dir:
+ closedir(sys_dir);
+
+ printf("FATAL: not enough memory to print %s\n",
+ event_type_descriptors[PERF_TYPE_TRACEPOINT]);
+ if (evt_list)
+ goto out_free;
}
/*
char evt_path[MAXPATHLEN];
char dir_path[MAXPATHLEN];
- if (debugfs_valid_mountpoint(tracing_events_path))
- return 0;
-
sys_dir = opendir(tracing_events_path);
if (!sys_dir)
return 0;
return ret;
}
-static void __print_events_type(u8 type, struct event_symbol *syms,
- unsigned max)
-{
- char name[64];
- unsigned i;
-
- for (i = 0; i < max ; i++, syms++) {
- if (!is_event_supported(type, i))
- continue;
-
- if (strlen(syms->alias))
- snprintf(name, sizeof(name), "%s OR %s",
- syms->symbol, syms->alias);
- else
- snprintf(name, sizeof(name), "%s", syms->symbol);
-
- printf(" %-50s [%s]\n", name, event_type_descriptors[type]);
- }
-}
-
-void print_events_type(u8 type)
-{
- if (type == PERF_TYPE_SOFTWARE)
- __print_events_type(type, event_symbols_sw, PERF_COUNT_SW_MAX);
- else
- __print_events_type(type, event_symbols_hw, PERF_COUNT_HW_MAX);
-}
-
int print_hwcache_events(const char *event_glob, bool name_only)
{
- unsigned int type, op, i, printed = 0;
+ unsigned int type, op, i, evt_i = 0, evt_num = 0;
char name[64];
+ char **evt_list = NULL;
+ bool evt_num_known = false;
+
+restart:
+ if (evt_num_known) {
+ evt_list = zalloc(sizeof(char *) * evt_num);
+ if (!evt_list)
+ goto out_enomem;
+ }
for (type = 0; type < PERF_COUNT_HW_CACHE_MAX; type++) {
for (op = 0; op < PERF_COUNT_HW_CACHE_OP_MAX; op++) {
type | (op << 8) | (i << 16)))
continue;
- if (name_only)
- printf("%s ", name);
- else
- printf(" %-50s [%s]\n", name,
- event_type_descriptors[PERF_TYPE_HW_CACHE]);
- ++printed;
+ if (!evt_num_known) {
+ evt_num++;
+ continue;
+ }
+
+ evt_list[evt_i] = strdup(name);
+ if (evt_list[evt_i] == NULL)
+ goto out_enomem;
+ evt_i++;
}
}
}
- if (printed)
+ if (!evt_num_known) {
+ evt_num_known = true;
+ goto restart;
+ }
+ qsort(evt_list, evt_num, sizeof(char *), cmp_string);
+ evt_i = 0;
+ while (evt_i < evt_num) {
+ if (name_only) {
+ printf("%s ", evt_list[evt_i++]);
+ continue;
+ }
+ printf(" %-50s [%s]\n", evt_list[evt_i++],
+ event_type_descriptors[PERF_TYPE_HW_CACHE]);
+ }
+ if (evt_num)
printf("\n");
- return printed;
+
+out_free:
+ evt_num = evt_i;
+ for (evt_i = 0; evt_i < evt_num; evt_i++)
+ zfree(&evt_list[evt_i]);
+ zfree(&evt_list);
+ return evt_num;
+
+out_enomem:
+ printf("FATAL: not enough memory to print %s\n", event_type_descriptors[PERF_TYPE_HW_CACHE]);
+ if (evt_list)
+ goto out_free;
+ return evt_num;
}
-static void print_symbol_events(const char *event_glob, unsigned type,
+void print_symbol_events(const char *event_glob, unsigned type,
struct event_symbol *syms, unsigned max,
bool name_only)
{
- unsigned i, printed = 0;
+ unsigned int i, evt_i = 0, evt_num = 0;
char name[MAX_NAME_LEN];
+ char **evt_list = NULL;
+ bool evt_num_known = false;
+
+restart:
+ if (evt_num_known) {
+ evt_list = zalloc(sizeof(char *) * evt_num);
+ if (!evt_list)
+ goto out_enomem;
+ syms -= max;
+ }
for (i = 0; i < max; i++, syms++) {
if (!is_event_supported(type, i))
continue;
- if (name_only) {
- printf("%s ", syms->symbol);
+ if (!evt_num_known) {
+ evt_num++;
continue;
}
- if (strlen(syms->alias))
+ if (!name_only && strlen(syms->alias))
snprintf(name, MAX_NAME_LEN, "%s OR %s", syms->symbol, syms->alias);
else
strncpy(name, syms->symbol, MAX_NAME_LEN);
- printf(" %-50s [%s]\n", name, event_type_descriptors[type]);
-
- printed++;
+ evt_list[evt_i] = strdup(name);
+ if (evt_list[evt_i] == NULL)
+ goto out_enomem;
+ evt_i++;
}
- if (printed)
+ if (!evt_num_known) {
+ evt_num_known = true;
+ goto restart;
+ }
+ qsort(evt_list, evt_num, sizeof(char *), cmp_string);
+ evt_i = 0;
+ while (evt_i < evt_num) {
+ if (name_only) {
+ printf("%s ", evt_list[evt_i++]);
+ continue;
+ }
+ printf(" %-50s [%s]\n", evt_list[evt_i++], event_type_descriptors[type]);
+ }
+ if (evt_num)
printf("\n");
+
+out_free:
+ evt_num = evt_i;
+ for (evt_i = 0; evt_i < evt_num; evt_i++)
+ zfree(&evt_list[evt_i]);
+ zfree(&evt_list);
+ return;
+
+out_enomem:
+ printf("FATAL: not enough memory to print %s\n", event_type_descriptors[type]);
+ if (evt_list)
+ goto out_free;
}
/*
*/
void print_events(const char *event_glob, bool name_only)
{
- if (!name_only) {
- printf("\n");
- printf("List of pre-defined events (to be used in -e):\n");
- }
-
print_symbol_events(event_glob, PERF_TYPE_HARDWARE,
event_symbols_hw, PERF_COUNT_HW_MAX, name_only);
void parse_events_error(void *data, void *scanner, char const *msg);
void print_events(const char *event_glob, bool name_only);
-void print_events_type(u8 type);
+
+struct event_symbol {
+ const char *symbol;
+ const char *alias;
+};
+extern struct event_symbol event_symbols_hw[];
+extern struct event_symbol event_symbols_sw[];
+void print_symbol_events(const char *event_glob, unsigned type,
+ struct event_symbol *syms, unsigned max,
+ bool name_only);
void print_tracepoint_events(const char *subsys_glob, const char *event_glob,
bool name_only);
int print_hwcache_events(const char *event_glob, bool name_only);
extern int is_valid_tracepoint(const char *event_string);
-extern int valid_debugfs_mount(const char *debugfs);
+int valid_event_mount(const char *eventfs);
#endif /* __PERF_PARSE_EVENTS_H */
name [a-zA-Z_*?][a-zA-Z0-9_*?]*
name_minus [a-zA-Z_*?][a-zA-Z0-9\-_*?]*
/* If you add a modifier you need to update check_modifier() */
-modifier_event [ukhpGHSD]+
+modifier_event [ukhpGHSDI]+
modifier_bp [rwx]{1,3}
%%
{
const char *s, *arg = NULL;
const int unset = flags & OPT_UNSET;
+ int err;
if (unset && p->opt)
return opterror(opt, "takes no value", flags);
return 0;
case OPTION_STRING:
+ err = 0;
if (unset)
*(const char **)opt->value = NULL;
else if (opt->flags & PARSE_OPT_OPTARG && !p->opt)
*(const char **)opt->value = (const char *)opt->defval;
else
- return get_arg(p, opt, flags, (const char **)opt->value);
- return 0;
+ err = get_arg(p, opt, flags, (const char **)opt->value);
+
+ /* PARSE_OPT_NOEMPTY: Allow NULL but disallow empty string. */
+ if (opt->flags & PARSE_OPT_NOEMPTY) {
+ const char *val = *(const char **)opt->value;
+
+ if (!val)
+ return err;
+
+ /* Similar to unset if we are given an empty string. */
+ if (val[0] == '\0') {
+ *(const char **)opt->value = NULL;
+ return 0;
+ }
+ }
+
+ return err;
case OPTION_CALLBACK:
if (unset)
break;
case PARSE_OPT_LIST_OPTS:
while (options->type != OPTION_END) {
- printf("--%s ", options->long_name);
+ if (options->long_name)
+ printf("--%s ", options->long_name);
options++;
}
+ putchar('\n');
exit(130);
case PARSE_OPT_LIST_SUBCMDS:
- for (int i = 0; subcommands[i]; i++)
- printf("%s ", subcommands[i]);
+ if (subcommands) {
+ for (int i = 0; subcommands[i]; i++)
+ printf("%s ", subcommands[i]);
+ }
+ putchar('\n');
exit(130);
default: /* PARSE_OPT_UNKNOWN */
if (ctx.argv[0][1] == '-') {
PARSE_OPT_LASTARG_DEFAULT = 16,
PARSE_OPT_DISABLED = 32,
PARSE_OPT_EXCLUSIVE = 64,
+ PARSE_OPT_NOEMPTY = 128,
};
struct option;
#define OPT_LONG(s, l, v, h) { .type = OPTION_LONG, .short_name = (s), .long_name = (l), .value = check_vtype(v, long *), .help = (h) }
#define OPT_U64(s, l, v, h) { .type = OPTION_U64, .short_name = (s), .long_name = (l), .value = check_vtype(v, u64 *), .help = (h) }
#define OPT_STRING(s, l, v, a, h) { .type = OPTION_STRING, .short_name = (s), .long_name = (l), .value = check_vtype(v, const char **), (a), .help = (h) }
+#define OPT_STRING_NOEMPTY(s, l, v, a, h) { .type = OPTION_STRING, .short_name = (s), .long_name = (l), .value = check_vtype(v, const char **), (a), .help = (h), .flags = PARSE_OPT_NOEMPTY}
#define OPT_DATE(s, l, v, h) \
{ .type = OPTION_CALLBACK, .short_name = (s), .long_name = (l), .value = (v), .argh = "time", .help = (h), .callback = parse_opt_approxidate_cb }
#define OPT_CALLBACK(s, l, v, a, h, f) \
#include "symbol.h"
#include "thread.h"
#include <api/fs/debugfs.h>
+#include <api/fs/tracefs.h>
#include "trace-event.h" /* For __maybe_unused */
#include "probe-event.h"
#include "probe-finder.h"
int ret;
symbol_conf.sort_by_name = true;
+ symbol_conf.allow_aliases = true;
ret = symbol__init(NULL);
if (ret < 0) {
pr_debug("Failed to init symbol map.\n");
return NULL;
kmap = map__kmap(host_machine->vmlinux_maps[MAP__FUNCTION]);
+ if (!kmap)
+ return NULL;
return kmap->ref_reloc_sym;
}
sym = __find_kernel_function_by_name(name, &map);
if (sym)
return map->unmap_ip(map, sym->start) -
- (reloc) ? 0 : map->reloc;
+ ((reloc) ? 0 : map->reloc);
}
return 0;
}
return NULL;
}
+static struct map *get_target_map(const char *target, bool user)
+{
+ /* Init maps of given executable or kernel */
+ if (user)
+ return dso__new_map(target);
+ else
+ return kernel_get_module_map(target);
+}
+
+static void put_target_map(struct map *map, bool user)
+{
+ if (map && user) {
+ /* Only the user map needs to be released */
+ dso__delete(map->dso);
+ map__delete(map);
+ }
+}
+
+
static struct dso *kernel_get_module_dso(const char *module)
{
struct dso *dso;
return ret;
}
+static void clear_perf_probe_point(struct perf_probe_point *pp)
+{
+ free(pp->file);
+ free(pp->function);
+ free(pp->lazy_line);
+}
+
static void clear_probe_trace_events(struct probe_trace_event *tevs, int ntevs)
{
int i;
}
#ifdef HAVE_DWARF_SUPPORT
+/*
+ * Some binaries like glibc have special symbols which are on the symbol
+ * table, but not in the debuginfo. If we can find the address of the
+ * symbol from map, we can translate the address back to the probe point.
+ */
+static int find_alternative_probe_point(struct debuginfo *dinfo,
+ struct perf_probe_point *pp,
+ struct perf_probe_point *result,
+ const char *target, bool uprobes)
+{
+ struct map *map = NULL;
+ struct symbol *sym;
+ u64 address = 0;
+ int ret = -ENOENT;
+
+ /* This can work only for function-name based one */
+ if (!pp->function || pp->file)
+ return -ENOTSUP;
+
+ map = get_target_map(target, uprobes);
+ if (!map)
+ return -EINVAL;
+
+ /* Find the address of given function */
+ map__for_each_symbol_by_name(map, pp->function, sym) {
+ if (uprobes)
+ address = sym->start;
+ else
+ address = map->unmap_ip(map, sym->start);
+ break;
+ }
+ if (!address) {
+ ret = -ENOENT;
+ goto out;
+ }
+ pr_debug("Symbol %s address found : %" PRIx64 "\n",
+ pp->function, address);
+
+ ret = debuginfo__find_probe_point(dinfo, (unsigned long)address,
+ result);
+ if (ret <= 0)
+ ret = (!ret) ? -ENOENT : ret;
+ else {
+ result->offset += pp->offset;
+ result->line += pp->line;
+ ret = 0;
+ }
+
+out:
+ put_target_map(map, uprobes);
+ return ret;
+
+}
+
+static int get_alternative_probe_event(struct debuginfo *dinfo,
+ struct perf_probe_event *pev,
+ struct perf_probe_point *tmp,
+ const char *target)
+{
+ int ret;
+
+ memcpy(tmp, &pev->point, sizeof(*tmp));
+ memset(&pev->point, 0, sizeof(pev->point));
+ ret = find_alternative_probe_point(dinfo, tmp, &pev->point,
+ target, pev->uprobes);
+ if (ret < 0)
+ memcpy(&pev->point, tmp, sizeof(*tmp));
+
+ return ret;
+}
+
+static int get_alternative_line_range(struct debuginfo *dinfo,
+ struct line_range *lr,
+ const char *target, bool user)
+{
+ struct perf_probe_point pp = { .function = lr->function,
+ .file = lr->file,
+ .line = lr->start };
+ struct perf_probe_point result;
+ int ret, len = 0;
+
+ memset(&result, 0, sizeof(result));
+
+ if (lr->end != INT_MAX)
+ len = lr->end - lr->start;
+ ret = find_alternative_probe_point(dinfo, &pp, &result,
+ target, user);
+ if (!ret) {
+ lr->function = result.function;
+ lr->file = result.file;
+ lr->start = result.line;
+ if (lr->end != INT_MAX)
+ lr->end = lr->start + len;
+ clear_perf_probe_point(&pp);
+ }
+ return ret;
+}
/* Open new debuginfo of given module */
static struct debuginfo *open_debuginfo(const char *module, bool silent)
int max_tevs, const char *target)
{
bool need_dwarf = perf_probe_event_need_dwarf(pev);
+ struct perf_probe_point tmp;
struct debuginfo *dinfo;
int ntevs, ret = 0;
/* Searching trace events corresponding to a probe event */
ntevs = debuginfo__find_trace_events(dinfo, pev, tevs, max_tevs);
+ if (ntevs == 0) { /* Not found, retry with an alternative */
+ ret = get_alternative_probe_event(dinfo, pev, &tmp, target);
+ if (!ret) {
+ ntevs = debuginfo__find_trace_events(dinfo, pev,
+ tevs, max_tevs);
+ /*
+ * Write back to the original probe_event for
+ * setting appropriate (user given) event name
+ */
+ clear_perf_probe_point(&pev->point);
+ memcpy(&pev->point, &tmp, sizeof(tmp));
+ }
+ }
+
debuginfo__delete(dinfo);
if (ntevs > 0) { /* Succeeded to find trace events */
}
if (ntevs == 0) { /* No error but failed to find probe point. */
- pr_warning("Probe point '%s' not found in debuginfo.\n",
+ pr_warning("Probe point '%s' not found.\n",
synthesize_perf_probe_point(&pev->point));
- if (need_dwarf)
- return -ENOENT;
- return 0;
+ return -ENOENT;
}
/* Error path : ntevs < 0 */
pr_debug("An error occurred in debuginfo analysis (%d).\n", ntevs);
else {
if (access(raw_path, R_OK) == 0) {
*new_path = strdup(raw_path);
- return 0;
+ return *new_path ? 0 : -ENOMEM;
} else
return -errno;
}
if (access(*new_path, R_OK) == 0)
return 0;
- if (!symbol_conf.source_prefix)
+ if (!symbol_conf.source_prefix) {
/* In case of searching comp_dir, don't retry */
+ zfree(new_path);
return -errno;
+ }
switch (errno) {
case ENAMETOOLONG:
* Show line-range always requires debuginfo to find source file and
* line number.
*/
-static int __show_line_range(struct line_range *lr, const char *module)
+static int __show_line_range(struct line_range *lr, const char *module,
+ bool user)
{
int l = 1;
struct int_node *ln;
return -ENOENT;
ret = debuginfo__find_line_range(dinfo, lr);
+ if (!ret) { /* Not found, retry with an alternative */
+ ret = get_alternative_line_range(dinfo, lr, module, user);
+ if (!ret)
+ ret = debuginfo__find_line_range(dinfo, lr);
+ }
debuginfo__delete(dinfo);
if (ret == 0 || ret == -ENOENT) {
pr_warning("Specified source line is not found.\n");
/* Convert source file path */
tmp = lr->path;
ret = get_real_path(tmp, lr->comp_dir, &lr->path);
- free(tmp); /* Free old path */
+
+ /* Free old path when new path is assigned */
+ if (tmp != lr->path)
+ free(tmp);
+
if (ret < 0) {
pr_warning("Failed to find source file path.\n");
return ret;
ret = init_symbol_maps(user);
if (ret < 0)
return ret;
- ret = __show_line_range(lr, module);
+ ret = __show_line_range(lr, module, user);
exit_symbol_maps();
return ret;
static int show_available_vars_at(struct debuginfo *dinfo,
struct perf_probe_event *pev,
int max_vls, struct strfilter *_filter,
- bool externs)
+ bool externs, const char *target)
{
char *buf;
int ret, i, nvars;
struct str_node *node;
struct variable_list *vls = NULL, *vl;
+ struct perf_probe_point tmp;
const char *var;
buf = synthesize_perf_probe_point(&pev->point);
ret = debuginfo__find_available_vars_at(dinfo, pev, &vls,
max_vls, externs);
+ if (!ret) { /* Not found, retry with an alternative */
+ ret = get_alternative_probe_event(dinfo, pev, &tmp, target);
+ if (!ret) {
+ ret = debuginfo__find_available_vars_at(dinfo, pev,
+ &vls, max_vls, externs);
+ /* Release the old probe_point */
+ clear_perf_probe_point(&tmp);
+ }
+ }
if (ret <= 0) {
if (ret == 0 || ret == -ENOENT) {
pr_err("Failed to find the address of %s\n", buf);
for (i = 0; i < npevs && ret >= 0; i++)
ret = show_available_vars_at(dinfo, &pevs[i], max_vls, _filter,
- externs);
+ externs, module);
debuginfo__delete(dinfo);
out:
void clear_perf_probe_event(struct perf_probe_event *pev)
{
- struct perf_probe_point *pp = &pev->point;
struct perf_probe_arg_field *field, *next;
int i;
free(pev->event);
free(pev->group);
- free(pp->file);
- free(pp->function);
- free(pp->lazy_line);
+ free(pev->target);
+ clear_perf_probe_point(&pev->point);
for (i = 0; i < pev->nargs; i++) {
free(pev->args[i].name);
" - please rebuild kernel with %s.\n",
is_kprobe ? 'k' : 'u', config);
} else if (err == -ENOTSUP)
- pr_warning("Debugfs is not mounted.\n");
+ pr_warning("Tracefs or debugfs is not mounted.\n");
else
pr_warning("Failed to open %cprobe_events: %s\n",
is_kprobe ? 'k' : 'u',
{
/* Both kprobes and uprobes are disabled, warn it. */
if (kerr == -ENOTSUP && uerr == -ENOTSUP)
- pr_warning("Debugfs is not mounted.\n");
+ pr_warning("Tracefs or debugfs is not mounted.\n");
else if (kerr == -ENOENT && uerr == -ENOENT)
pr_warning("Please rebuild kernel with CONFIG_KPROBE_EVENTS "
"or/and CONFIG_UPROBE_EVENTS.\n");
{
char buf[PATH_MAX];
const char *__debugfs;
+ const char *tracing_dir = "";
int ret;
- __debugfs = debugfs_find_mountpoint();
- if (__debugfs == NULL)
- return -ENOTSUP;
+ __debugfs = tracefs_find_mountpoint();
+ if (__debugfs == NULL) {
+ tracing_dir = "tracing/";
+
+ __debugfs = debugfs_find_mountpoint();
+ if (__debugfs == NULL)
+ return -ENOTSUP;
+ }
- ret = e_snprintf(buf, PATH_MAX, "%s/%s", __debugfs, trace_file);
+ ret = e_snprintf(buf, PATH_MAX, "%s/%s%s",
+ __debugfs, tracing_dir, trace_file);
if (ret >= 0) {
pr_debug("Opening %s write=%d\n", buf, readwrite);
if (readwrite && !probe_event_dry_run)
static int open_kprobe_events(bool readwrite)
{
- return open_probe_events("tracing/kprobe_events", readwrite);
+ return open_probe_events("kprobe_events", readwrite);
}
static int open_uprobe_events(bool readwrite)
{
- return open_probe_events("tracing/uprobe_events", readwrite);
+ return open_probe_events("uprobe_events", readwrite);
}
/* Get raw string list of current kprobe_events or uprobe_events */
return sl;
}
+struct kprobe_blacklist_node {
+ struct list_head list;
+ unsigned long start;
+ unsigned long end;
+ char *symbol;
+};
+
+static void kprobe_blacklist__delete(struct list_head *blacklist)
+{
+ struct kprobe_blacklist_node *node;
+
+ while (!list_empty(blacklist)) {
+ node = list_first_entry(blacklist,
+ struct kprobe_blacklist_node, list);
+ list_del(&node->list);
+ free(node->symbol);
+ free(node);
+ }
+}
+
+static int kprobe_blacklist__load(struct list_head *blacklist)
+{
+ struct kprobe_blacklist_node *node;
+ const char *__debugfs = debugfs_find_mountpoint();
+ char buf[PATH_MAX], *p;
+ FILE *fp;
+ int ret;
+
+ if (__debugfs == NULL)
+ return -ENOTSUP;
+
+ ret = e_snprintf(buf, PATH_MAX, "%s/kprobes/blacklist", __debugfs);
+ if (ret < 0)
+ return ret;
+
+ fp = fopen(buf, "r");
+ if (!fp)
+ return -errno;
+
+ ret = 0;
+ while (fgets(buf, PATH_MAX, fp)) {
+ node = zalloc(sizeof(*node));
+ if (!node) {
+ ret = -ENOMEM;
+ break;
+ }
+ INIT_LIST_HEAD(&node->list);
+ list_add_tail(&node->list, blacklist);
+ if (sscanf(buf, "0x%lx-0x%lx", &node->start, &node->end) != 2) {
+ ret = -EINVAL;
+ break;
+ }
+ p = strchr(buf, '\t');
+ if (p) {
+ p++;
+ if (p[strlen(p) - 1] == '\n')
+ p[strlen(p) - 1] = '\0';
+ } else
+ p = (char *)"unknown";
+ node->symbol = strdup(p);
+ if (!node->symbol) {
+ ret = -ENOMEM;
+ break;
+ }
+ pr_debug2("Blacklist: 0x%lx-0x%lx, %s\n",
+ node->start, node->end, node->symbol);
+ ret++;
+ }
+ if (ret < 0)
+ kprobe_blacklist__delete(blacklist);
+ fclose(fp);
+
+ return ret;
+}
+
+static struct kprobe_blacklist_node *
+kprobe_blacklist__find_by_address(struct list_head *blacklist,
+ unsigned long address)
+{
+ struct kprobe_blacklist_node *node;
+
+ list_for_each_entry(node, blacklist, list) {
+ if (node->start <= address && address <= node->end)
+ return node;
+ }
+
+ return NULL;
+}
+
/* Show an event */
static int show_perf_probe_event(struct perf_probe_event *pev,
const char *module)
return ret;
}
+/* Warn if the current kernel's uprobe implementation is old */
+static void warn_uprobe_event_compat(struct probe_trace_event *tev)
+{
+ int i;
+ char *buf = synthesize_probe_trace_command(tev);
+
+ /* Old uprobe event doesn't support memory dereference */
+ if (!tev->uprobes || tev->nargs == 0 || !buf)
+ goto out;
+
+ for (i = 0; i < tev->nargs; i++)
+ if (strglobmatch(tev->args[i].value, "[$@+-]*")) {
+ pr_warning("Please upgrade your kernel to at least "
+ "3.14 to have access to feature %s\n",
+ tev->args[i].value);
+ break;
+ }
+out:
+ free(buf);
+}
+
static int __add_probe_trace_events(struct perf_probe_event *pev,
struct probe_trace_event *tevs,
int ntevs, bool allow_suffix)
char buf[64];
const char *event, *group;
struct strlist *namelist;
+ LIST_HEAD(blacklist);
+ struct kprobe_blacklist_node *node;
if (pev->uprobes)
fd = open_uprobe_events(true);
pr_debug("Failed to get current event list.\n");
return -EIO;
}
+ /* Get kprobe blacklist if exists */
+ if (!pev->uprobes) {
+ ret = kprobe_blacklist__load(&blacklist);
+ if (ret < 0)
+ pr_debug("No kprobe blacklist support, ignored\n");
+ }
ret = 0;
pr_info("Added new event%s\n", (ntevs > 1) ? "s:" : ":");
for (i = 0; i < ntevs; i++) {
tev = &tevs[i];
+ /* Ensure that the address is NOT blacklisted */
+ node = kprobe_blacklist__find_by_address(&blacklist,
+ tev->point.address);
+ if (node) {
+ pr_warning("Warning: Skipped probing on blacklisted function: %s\n", node->symbol);
+ continue;
+ }
+
if (pev->event)
event = pev->event;
else
*/
allow_suffix = true;
}
+ if (ret == -EINVAL && pev->uprobes)
+ warn_uprobe_event_compat(tev);
- if (ret >= 0) {
+ /* Note that it is possible to skip all events because of blacklist */
+ if (ret >= 0 && tev->event) {
/* Show how to use the event. */
pr_info("\nYou can now use it in all perf tools, such as:\n\n");
pr_info("\tperf record -e %s:%s -aR sleep 1\n\n", tev->group,
tev->event);
}
+ kprobe_blacklist__delete(&blacklist);
strlist__delete(namelist);
close(fd);
return ret;
struct symbol *sym;
map__for_each_symbol_by_name(map, name, sym) {
- if (sym->binding == STB_GLOBAL || sym->binding == STB_LOCAL)
- found++;
+ found++;
}
return found;
int max_tevs, const char *target)
{
struct map *map = NULL;
- struct kmap *kmap = NULL;
struct ref_reloc_sym *reloc_sym = NULL;
struct symbol *sym;
struct probe_trace_event *tev;
int num_matched_functions;
int ret, i;
- /* Init maps of given executable or kernel */
- if (pev->uprobes)
- map = dso__new_map(target);
- else
- map = kernel_get_module_map(target);
+ map = get_target_map(target, pev->uprobes);
if (!map) {
ret = -EINVAL;
goto out;
}
if (!pev->uprobes && !pp->retprobe) {
- kmap = map__kmap(map);
- reloc_sym = kmap->ref_reloc_sym;
+ reloc_sym = kernel_get_ref_reloc_sym();
if (!reloc_sym) {
pr_warning("Relocated base symbol is not found!\n");
ret = -EINVAL;
}
out:
- if (map && pev->uprobes) {
- /* Only when using uprobe(exec) map needs to be released */
- dso__delete(map->dso);
- map__delete(map);
- }
+ put_target_map(map, pev->uprobes);
return ret;
nomem_out:
};
int add_perf_probe_events(struct perf_probe_event *pevs, int npevs,
- int max_tevs, const char *target, bool force_add)
+ int max_tevs, bool force_add)
{
int i, j, ret;
struct __event_package *pkgs;
ret = convert_to_probe_trace_events(pkgs[i].pev,
&pkgs[i].tevs,
max_tevs,
- target);
+ pkgs[i].pev->target);
if (ret < 0)
goto end;
pkgs[i].ntevs = ret;
static int filter_available_functions(struct map *map __maybe_unused,
struct symbol *sym)
{
- if ((sym->binding == STB_GLOBAL || sym->binding == STB_LOCAL) &&
- strfilter__compare(available_func_filter, sym->name))
+ if (strfilter__compare(available_func_filter, sym->name))
return 0;
return 1;
}
char *group; /* Group name */
struct perf_probe_point point; /* Probe point */
int nargs; /* Number of arguments */
- bool uprobes;
+ bool uprobes; /* Uprobe event flag */
+ char *target; /* Target binary */
struct perf_probe_arg *args; /* Arguments */
};
extern const char *kernel_get_module_path(const char *module);
extern int add_perf_probe_events(struct perf_probe_event *pevs, int npevs,
- int max_probe_points, const char *module,
- bool force_add);
+ int max_probe_points, bool force_add);
extern int del_perf_probe_events(struct strlist *dellist);
extern int show_perf_probe_events(void);
extern int show_line_range(struct line_range *lr, const char *module,
return -EINVAL;
}
if (field->name[0] == '[') {
- pr_err("Semantic error: %s is not a pointor"
+ pr_err("Semantic error: %s is not a pointer"
" nor array.\n", varname);
return -EINVAL;
}
- if (field->ref) {
+ /* While prcessing unnamed field, we don't care about this */
+ if (field->ref && dwarf_diename(vr_die)) {
pr_err("Semantic error: %s must be referred by '.'\n",
field->name);
return -EINVAL;
}
ref->offset += (long)offs;
+ /* If this member is unnamed, we need to reuse this field */
+ if (!dwarf_diename(die_mem))
+ return convert_variable_fields(die_mem, varname, field,
+ &ref, die_mem);
+
next:
/* Converting next field */
if (field->next)
dwarf_decl_line(sp_die, &pf->lno);
pf->lno += pp->line;
param->retval = find_probe_point_by_line(pf);
- } else if (!dwarf_func_inline(sp_die)) {
+ } else if (die_is_func_instance(sp_die)) {
+ /* Instances always have the entry address */
+ dwarf_entrypc(sp_die, &pf->addr);
/* Real function */
if (pp->lazy_line)
param->retval = find_probe_point_lazy(sp_die, pf);
else {
- if (dwarf_entrypc(sp_die, &pf->addr) != 0) {
- pr_warning("Failed to get entry address of "
- "%s.\n", dwarf_diename(sp_die));
- param->retval = -ENOENT;
- return DWARF_CB_ABORT;
- }
pf->addr += pp->offset;
/* TODO: Check the address in this function */
param->retval = call_probe_finder(sp_die, pf);
const char *fname = NULL, *func = NULL, *basefunc = NULL, *tmp;
int baseline = 0, lineno = 0, ret = 0;
- /* Adjust address with bias */
- addr += dbg->bias;
-
/* Find cu die */
- if (!dwarf_addrdie(dbg->dbg, (Dwarf_Addr)addr - dbg->bias, &cudie)) {
+ if (!dwarf_addrdie(dbg->dbg, (Dwarf_Addr)addr, &cudie)) {
pr_warning("Failed to find debug information for address %lx\n",
addr);
ret = -EINVAL;
pr_debug("New line range: %d to %d\n", lf->lno_s, lf->lno_e);
lr->start = lf->lno_s;
lr->end = lf->lno_e;
- if (dwarf_func_inline(sp_die))
+ if (!die_is_func_instance(sp_die))
param->retval = die_walk_instances(sp_die,
line_range_inline_cb, lf);
else
util/cgroup.c
util/rblist.c
util/strlist.c
-../lib/api/fs/fs.c
util/trace-event.c
../../lib/rbtree.c
--- /dev/null
+libperf-$(CONFIG_LIBPERL) += trace-event-perl.o
+libperf-$(CONFIG_LIBPYTHON) += trace-event-python.o
+
+CFLAGS_trace-event-perl.o += $(PERL_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-shadow -Wno-undef -Wno-switch-default
+
+CFLAGS_trace-event-python.o += $(PYTHON_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-shadow
define_event_symbols(event, ev_name, args->hex.field);
define_event_symbols(event, ev_name, args->hex.size);
break;
+ case PRINT_INT_ARRAY:
+ define_event_symbols(event, ev_name, args->int_array.field);
+ define_event_symbols(event, ev_name, args->int_array.count);
+ define_event_symbols(event, ev_name, args->int_array.el_size);
+ break;
case PRINT_BSTRING:
case PRINT_DYNAMIC_ARRAY:
case PRINT_STRING:
static void perl_process_event(union perf_event *event,
struct perf_sample *sample,
struct perf_evsel *evsel,
- struct thread *thread,
- struct addr_location *al __maybe_unused)
+ struct addr_location *al)
{
- perl_process_tracepoint(sample, evsel, thread);
+ perl_process_tracepoint(sample, evsel, al->thread);
perl_process_event_generic(event, sample, evsel);
}
define_event_symbols(event, ev_name, args->hex.field);
define_event_symbols(event, ev_name, args->hex.size);
break;
+ case PRINT_INT_ARRAY:
+ define_event_symbols(event, ev_name, args->int_array.field);
+ define_event_symbols(event, ev_name, args->int_array.count);
+ define_event_symbols(event, ev_name, args->int_array.el_size);
+ break;
case PRINT_STRING:
break;
case PRINT_TYPE:
static void python_process_tracepoint(struct perf_sample *sample,
struct perf_evsel *evsel,
- struct thread *thread,
struct addr_location *al)
{
struct event_format *event = evsel->tp_format;
int cpu = sample->cpu;
void *data = sample->raw_data;
unsigned long long nsecs = sample->time;
- const char *comm = thread__comm_str(thread);
+ const char *comm = thread__comm_str(al->thread);
t = PyTuple_New(MAX_FIELDS);
if (!t)
tuple_set_u64(t, 0, es->db_id);
tuple_set_u64(t, 1, es->evsel->db_id);
tuple_set_u64(t, 2, es->al->machine->db_id);
- tuple_set_u64(t, 3, es->thread->db_id);
+ tuple_set_u64(t, 3, es->al->thread->db_id);
tuple_set_u64(t, 4, es->comm_db_id);
tuple_set_u64(t, 5, es->dso_db_id);
tuple_set_u64(t, 6, es->sym_db_id);
static void python_process_general_event(struct perf_sample *sample,
struct perf_evsel *evsel,
- struct thread *thread,
struct addr_location *al)
{
PyObject *handler, *t, *dict, *callchain, *dict_sample;
pydict_set_item_string_decref(dict, "raw_buf", PyString_FromStringAndSize(
(const char *)sample->raw_data, sample->raw_size));
pydict_set_item_string_decref(dict, "comm",
- PyString_FromString(thread__comm_str(thread)));
+ PyString_FromString(thread__comm_str(al->thread)));
if (al->map) {
pydict_set_item_string_decref(dict, "dso",
PyString_FromString(al->map->dso->name));
static void python_process_event(union perf_event *event,
struct perf_sample *sample,
struct perf_evsel *evsel,
- struct thread *thread,
struct addr_location *al)
{
struct tables *tables = &tables_global;
switch (evsel->attr.type) {
case PERF_TYPE_TRACEPOINT:
- python_process_tracepoint(sample, evsel, thread, al);
+ python_process_tracepoint(sample, evsel, al);
break;
/* Reserve for future process_hw/sw/raw APIs */
default:
if (tables->db_export_mode)
- db_export__sample(&tables->dbe, event, sample, evsel,
- thread, al);
+ db_export__sample(&tables->dbe, event, sample, evsel, al);
else
- python_process_general_event(sample, evsel, thread, al);
+ python_process_general_event(sample, evsel, al);
}
}
#include "perf_regs.h"
#include "asm/bug.h"
+static int machines__deliver_event(struct machines *machines,
+ struct perf_evlist *evlist,
+ union perf_event *event,
+ struct perf_sample *sample,
+ struct perf_tool *tool, u64 file_offset);
+
static int perf_session__open(struct perf_session *session)
{
struct perf_data_file *file = session->file;
machines__set_comm_exec(&session->machines, comm_exec);
}
+static int ordered_events__deliver_event(struct ordered_events *oe,
+ struct ordered_event *event)
+{
+ struct perf_sample sample;
+ struct perf_session *session = container_of(oe, struct perf_session,
+ ordered_events);
+ int ret = perf_evlist__parse_sample(session->evlist, event->event, &sample);
+
+ if (ret) {
+ pr_err("Can't parse sample, err = %d\n", ret);
+ return ret;
+ }
+
+ return machines__deliver_event(&session->machines, session->evlist, event->event,
+ &sample, session->tool, event->file_offset);
+}
+
struct perf_session *perf_session__new(struct perf_data_file *file,
bool repipe, struct perf_tool *tool)
{
goto out;
session->repipe = repipe;
- ordered_events__init(&session->ordered_events);
+ session->tool = tool;
machines__init(&session->machines);
+ ordered_events__init(&session->ordered_events, ordered_events__deliver_event);
if (file) {
if (perf_data_file__open(file))
return NULL;
}
-static void perf_session__delete_dead_threads(struct perf_session *session)
-{
- machine__delete_dead_threads(&session->machines.host);
-}
-
static void perf_session__delete_threads(struct perf_session *session)
{
machine__delete_threads(&session->machines.host);
void perf_session__delete(struct perf_session *session)
{
perf_session__destroy_kernel_maps(session);
- perf_session__delete_dead_threads(session);
perf_session__delete_threads(session);
perf_session_env__delete(&session->header.env);
machines__exit(&session->machines);
return 0;
}
+static int process_build_id_stub(struct perf_tool *tool __maybe_unused,
+ union perf_event *event __maybe_unused,
+ struct perf_session *session __maybe_unused)
+{
+ dump_printf(": unhandled!\n");
+ return 0;
+}
+
static int process_finished_round_stub(struct perf_tool *tool __maybe_unused,
union perf_event *event __maybe_unused,
- struct perf_session *perf_session
- __maybe_unused)
+ struct ordered_events *oe __maybe_unused)
{
dump_printf(": unhandled!\n");
return 0;
static int process_finished_round(struct perf_tool *tool,
union perf_event *event,
- struct perf_session *session);
+ struct ordered_events *oe);
static int process_id_index_stub(struct perf_tool *tool __maybe_unused,
union perf_event *event __maybe_unused,
if (tool->tracing_data == NULL)
tool->tracing_data = process_event_synth_tracing_data_stub;
if (tool->build_id == NULL)
- tool->build_id = process_finished_round_stub;
+ tool->build_id = process_build_id_stub;
if (tool->finished_round == NULL) {
if (tool->ordered_events)
tool->finished_round = process_finished_round;
* Flush every events below timestamp 7
* etc...
*/
-static int process_finished_round(struct perf_tool *tool,
+static int process_finished_round(struct perf_tool *tool __maybe_unused,
union perf_event *event __maybe_unused,
- struct perf_session *session)
+ struct ordered_events *oe)
{
- return ordered_events__flush(session, tool, OE_FLUSH__ROUND);
+ return ordered_events__flush(oe, OE_FLUSH__ROUND);
}
-int perf_session_queue_event(struct perf_session *s, union perf_event *event,
- struct perf_tool *tool, struct perf_sample *sample,
- u64 file_offset)
+int perf_session__queue_event(struct perf_session *s, union perf_event *event,
+ struct perf_sample *sample, u64 file_offset)
{
- struct ordered_events *oe = &s->ordered_events;
- u64 timestamp = sample->time;
- struct ordered_event *new;
-
- if (!timestamp || timestamp == ~0ULL)
- return -ETIME;
+ return ordered_events__queue(&s->ordered_events, event, sample, file_offset);
+}
- if (timestamp < oe->last_flush) {
- pr_oe_time(timestamp, "out of order event\n");
- pr_oe_time(oe->last_flush, "last flush, last_flush_type %d\n",
- oe->last_flush_type);
+static void callchain__lbr_callstack_printf(struct perf_sample *sample)
+{
+ struct ip_callchain *callchain = sample->callchain;
+ struct branch_stack *lbr_stack = sample->branch_stack;
+ u64 kernel_callchain_nr = callchain->nr;
+ unsigned int i;
- s->stats.nr_unordered_events++;
+ for (i = 0; i < kernel_callchain_nr; i++) {
+ if (callchain->ips[i] == PERF_CONTEXT_USER)
+ break;
}
- new = ordered_events__new(oe, timestamp, event);
- if (!new) {
- ordered_events__flush(s, tool, OE_FLUSH__HALF);
- new = ordered_events__new(oe, timestamp, event);
- }
+ if ((i != kernel_callchain_nr) && lbr_stack->nr) {
+ u64 total_nr;
+ /*
+ * LBR callstack can only get user call chain,
+ * i is kernel call chain number,
+ * 1 is PERF_CONTEXT_USER.
+ *
+ * The user call chain is stored in LBR registers.
+ * LBR are pair registers. The caller is stored
+ * in "from" register, while the callee is stored
+ * in "to" register.
+ * For example, there is a call stack
+ * "A"->"B"->"C"->"D".
+ * The LBR registers will recorde like
+ * "C"->"D", "B"->"C", "A"->"B".
+ * So only the first "to" register and all "from"
+ * registers are needed to construct the whole stack.
+ */
+ total_nr = i + 1 + lbr_stack->nr + 1;
+ kernel_callchain_nr = i + 1;
- if (!new)
- return -ENOMEM;
+ printf("... LBR call chain: nr:%" PRIu64 "\n", total_nr);
- new->file_offset = file_offset;
- return 0;
+ for (i = 0; i < kernel_callchain_nr; i++)
+ printf("..... %2d: %016" PRIx64 "\n",
+ i, callchain->ips[i]);
+
+ printf("..... %2d: %016" PRIx64 "\n",
+ (int)(kernel_callchain_nr), lbr_stack->entries[0].to);
+ for (i = 0; i < lbr_stack->nr; i++)
+ printf("..... %2d: %016" PRIx64 "\n",
+ (int)(i + kernel_callchain_nr + 1), lbr_stack->entries[i].from);
+ }
}
-static void callchain__printf(struct perf_sample *sample)
+static void callchain__printf(struct perf_evsel *evsel,
+ struct perf_sample *sample)
{
unsigned int i;
+ struct ip_callchain *callchain = sample->callchain;
+
+ if (has_branch_callstack(evsel))
+ callchain__lbr_callstack_printf(sample);
- printf("... chain: nr:%" PRIu64 "\n", sample->callchain->nr);
+ printf("... FP chain: nr:%" PRIu64 "\n", callchain->nr);
- for (i = 0; i < sample->callchain->nr; i++)
+ for (i = 0; i < callchain->nr; i++)
printf("..... %2d: %016" PRIx64 "\n",
- i, sample->callchain->ips[i]);
+ i, callchain->ips[i]);
}
static void branch_stack__printf(struct perf_sample *sample)
dump->size, dump->offset);
}
-static void perf_session__print_tstamp(struct perf_session *session,
+static void perf_evlist__print_tstamp(struct perf_evlist *evlist,
union perf_event *event,
struct perf_sample *sample)
{
- u64 sample_type = __perf_evlist__combined_sample_type(session->evlist);
+ u64 sample_type = __perf_evlist__combined_sample_type(evlist);
if (event->header.type != PERF_RECORD_SAMPLE &&
- !perf_evlist__sample_id_all(session->evlist)) {
+ !perf_evlist__sample_id_all(evlist)) {
fputs("-1 -1 ", stdout);
return;
}
sample->read.one.id, sample->read.one.value);
}
-static void dump_event(struct perf_session *session, union perf_event *event,
+static void dump_event(struct perf_evlist *evlist, union perf_event *event,
u64 file_offset, struct perf_sample *sample)
{
if (!dump_trace)
trace_event(event);
if (sample)
- perf_session__print_tstamp(session, event, sample);
+ perf_evlist__print_tstamp(evlist, event, sample);
printf("%#" PRIx64 " [%#x]: PERF_RECORD_%s", file_offset,
event->header.size, perf_event__name(event->header.type));
sample_type = evsel->attr.sample_type;
if (sample_type & PERF_SAMPLE_CALLCHAIN)
- callchain__printf(sample);
+ callchain__printf(evsel, sample);
- if (sample_type & PERF_SAMPLE_BRANCH_STACK)
+ if ((sample_type & PERF_SAMPLE_BRANCH_STACK) && !has_branch_callstack(evsel))
branch_stack__printf(sample);
if (sample_type & PERF_SAMPLE_REGS_USER)
sample_read__printf(sample, evsel->attr.read_format);
}
-static struct machine *
- perf_session__find_machine_for_cpumode(struct perf_session *session,
+static struct machine *machines__find_for_cpumode(struct machines *machines,
union perf_event *event,
struct perf_sample *sample)
{
else
pid = sample->pid;
- machine = perf_session__find_machine(session, pid);
+ machine = machines__find(machines, pid);
if (!machine)
- machine = perf_session__findnew_machine(session,
- DEFAULT_GUEST_KERNEL_ID);
+ machine = machines__find(machines, DEFAULT_GUEST_KERNEL_ID);
return machine;
}
- return &session->machines.host;
+ return &machines->host;
}
-static int deliver_sample_value(struct perf_session *session,
+static int deliver_sample_value(struct perf_evlist *evlist,
struct perf_tool *tool,
union perf_event *event,
struct perf_sample *sample,
struct sample_read_value *v,
struct machine *machine)
{
- struct perf_sample_id *sid;
+ struct perf_sample_id *sid = perf_evlist__id2sid(evlist, v->id);
- sid = perf_evlist__id2sid(session->evlist, v->id);
if (sid) {
sample->id = v->id;
sample->period = v->value - sid->period;
}
if (!sid || sid->evsel == NULL) {
- ++session->stats.nr_unknown_id;
+ ++evlist->stats.nr_unknown_id;
return 0;
}
return tool->sample(tool, event, sample, sid->evsel, machine);
}
-static int deliver_sample_group(struct perf_session *session,
+static int deliver_sample_group(struct perf_evlist *evlist,
struct perf_tool *tool,
union perf_event *event,
struct perf_sample *sample,
u64 i;
for (i = 0; i < sample->read.group.nr; i++) {
- ret = deliver_sample_value(session, tool, event, sample,
+ ret = deliver_sample_value(evlist, tool, event, sample,
&sample->read.group.values[i],
machine);
if (ret)
}
static int
-perf_session__deliver_sample(struct perf_session *session,
+ perf_evlist__deliver_sample(struct perf_evlist *evlist,
struct perf_tool *tool,
union perf_event *event,
struct perf_sample *sample,
/* For PERF_SAMPLE_READ we have either single or group mode. */
if (read_format & PERF_FORMAT_GROUP)
- return deliver_sample_group(session, tool, event, sample,
+ return deliver_sample_group(evlist, tool, event, sample,
machine);
else
- return deliver_sample_value(session, tool, event, sample,
+ return deliver_sample_value(evlist, tool, event, sample,
&sample->read.one, machine);
}
-int perf_session__deliver_event(struct perf_session *session,
- union perf_event *event,
- struct perf_sample *sample,
- struct perf_tool *tool, u64 file_offset)
+static int machines__deliver_event(struct machines *machines,
+ struct perf_evlist *evlist,
+ union perf_event *event,
+ struct perf_sample *sample,
+ struct perf_tool *tool, u64 file_offset)
{
struct perf_evsel *evsel;
struct machine *machine;
- dump_event(session, event, file_offset, sample);
+ dump_event(evlist, event, file_offset, sample);
- evsel = perf_evlist__id2evsel(session->evlist, sample->id);
+ evsel = perf_evlist__id2evsel(evlist, sample->id);
- machine = perf_session__find_machine_for_cpumode(session, event,
- sample);
+ machine = machines__find_for_cpumode(machines, event, sample);
switch (event->header.type) {
case PERF_RECORD_SAMPLE:
dump_sample(evsel, event, sample);
if (evsel == NULL) {
- ++session->stats.nr_unknown_id;
+ ++evlist->stats.nr_unknown_id;
return 0;
}
if (machine == NULL) {
- ++session->stats.nr_unprocessable_samples;
+ ++evlist->stats.nr_unprocessable_samples;
return 0;
}
- return perf_session__deliver_sample(session, tool, event,
- sample, evsel, machine);
+ return perf_evlist__deliver_sample(evlist, tool, event, sample, evsel, machine);
case PERF_RECORD_MMAP:
return tool->mmap(tool, event, sample, machine);
case PERF_RECORD_MMAP2:
return tool->exit(tool, event, sample, machine);
case PERF_RECORD_LOST:
if (tool->lost == perf_event__process_lost)
- session->stats.total_lost += event->lost.lost;
+ evlist->stats.total_lost += event->lost.lost;
return tool->lost(tool, event, sample, machine);
case PERF_RECORD_READ:
return tool->read(tool, event, sample, evsel, machine);
case PERF_RECORD_UNTHROTTLE:
return tool->unthrottle(tool, event, sample, machine);
default:
- ++session->stats.nr_unknown_events;
+ ++evlist->stats.nr_unknown_events;
return -1;
}
}
static s64 perf_session__process_user_event(struct perf_session *session,
union perf_event *event,
- struct perf_tool *tool,
u64 file_offset)
{
+ struct ordered_events *oe = &session->ordered_events;
+ struct perf_tool *tool = session->tool;
int fd = perf_data_file__fd(session->file);
int err;
- dump_event(session, event, file_offset, NULL);
+ dump_event(session->evlist, event, file_offset, NULL);
/* These events are processed right away */
switch (event->header.type) {
case PERF_RECORD_HEADER_BUILD_ID:
return tool->build_id(tool, event, session);
case PERF_RECORD_FINISHED_ROUND:
- return tool->finished_round(tool, event, session);
+ return tool->finished_round(tool, event, oe);
case PERF_RECORD_ID_INDEX:
return tool->id_index(tool, event, session);
default:
int perf_session__deliver_synth_event(struct perf_session *session,
union perf_event *event,
- struct perf_sample *sample,
- struct perf_tool *tool)
+ struct perf_sample *sample)
{
- events_stats__inc(&session->stats, event->header.type);
+ struct perf_evlist *evlist = session->evlist;
+ struct perf_tool *tool = session->tool;
+
+ events_stats__inc(&evlist->stats, event->header.type);
if (event->header.type >= PERF_RECORD_USER_TYPE_START)
- return perf_session__process_user_event(session, event, tool, 0);
+ return perf_session__process_user_event(session, event, 0);
- return perf_session__deliver_event(session, event, sample, tool, 0);
+ return machines__deliver_event(&session->machines, evlist, event, sample, tool, 0);
}
static void event_swap(union perf_event *event, bool sample_id_all)
}
static s64 perf_session__process_event(struct perf_session *session,
- union perf_event *event,
- struct perf_tool *tool,
- u64 file_offset)
+ union perf_event *event, u64 file_offset)
{
+ struct perf_evlist *evlist = session->evlist;
+ struct perf_tool *tool = session->tool;
struct perf_sample sample;
int ret;
if (session->header.needs_swap)
- event_swap(event, perf_evlist__sample_id_all(session->evlist));
+ event_swap(event, perf_evlist__sample_id_all(evlist));
if (event->header.type >= PERF_RECORD_HEADER_MAX)
return -EINVAL;
- events_stats__inc(&session->stats, event->header.type);
+ events_stats__inc(&evlist->stats, event->header.type);
if (event->header.type >= PERF_RECORD_USER_TYPE_START)
- return perf_session__process_user_event(session, event, tool, file_offset);
+ return perf_session__process_user_event(session, event, file_offset);
/*
* For all kernel events we get the sample data
*/
- ret = perf_evlist__parse_sample(session->evlist, event, &sample);
+ ret = perf_evlist__parse_sample(evlist, event, &sample);
if (ret)
return ret;
if (tool->ordered_events) {
- ret = perf_session_queue_event(session, event, tool, &sample,
- file_offset);
+ ret = perf_session__queue_event(session, event, &sample, file_offset);
if (ret != -ETIME)
return ret;
}
- return perf_session__deliver_event(session, event, &sample, tool,
- file_offset);
+ return machines__deliver_event(&session->machines, evlist, event,
+ &sample, tool, file_offset);
}
void perf_event_header__bswap(struct perf_event_header *hdr)
return thread;
}
-static void perf_session__warn_about_errors(const struct perf_session *session,
- const struct perf_tool *tool)
+static void perf_session__warn_about_errors(const struct perf_session *session)
{
- if (tool->lost == perf_event__process_lost &&
- session->stats.nr_events[PERF_RECORD_LOST] != 0) {
+ const struct events_stats *stats = &session->evlist->stats;
+ const struct ordered_events *oe = &session->ordered_events;
+
+ if (session->tool->lost == perf_event__process_lost &&
+ stats->nr_events[PERF_RECORD_LOST] != 0) {
ui__warning("Processed %d events and lost %d chunks!\n\n"
"Check IO/CPU overload!\n\n",
- session->stats.nr_events[0],
- session->stats.nr_events[PERF_RECORD_LOST]);
+ stats->nr_events[0],
+ stats->nr_events[PERF_RECORD_LOST]);
}
- if (session->stats.nr_unknown_events != 0) {
+ if (stats->nr_unknown_events != 0) {
ui__warning("Found %u unknown events!\n\n"
"Is this an older tool processing a perf.data "
"file generated by a more recent tool?\n\n"
"If that is not the case, consider "
"reporting to linux-kernel@vger.kernel.org.\n\n",
- session->stats.nr_unknown_events);
+ stats->nr_unknown_events);
}
- if (session->stats.nr_unknown_id != 0) {
+ if (stats->nr_unknown_id != 0) {
ui__warning("%u samples with id not present in the header\n",
- session->stats.nr_unknown_id);
+ stats->nr_unknown_id);
}
- if (session->stats.nr_invalid_chains != 0) {
- ui__warning("Found invalid callchains!\n\n"
- "%u out of %u events were discarded for this reason.\n\n"
- "Consider reporting to linux-kernel@vger.kernel.org.\n\n",
- session->stats.nr_invalid_chains,
- session->stats.nr_events[PERF_RECORD_SAMPLE]);
- }
+ if (stats->nr_invalid_chains != 0) {
+ ui__warning("Found invalid callchains!\n\n"
+ "%u out of %u events were discarded for this reason.\n\n"
+ "Consider reporting to linux-kernel@vger.kernel.org.\n\n",
+ stats->nr_invalid_chains,
+ stats->nr_events[PERF_RECORD_SAMPLE]);
+ }
- if (session->stats.nr_unprocessable_samples != 0) {
+ if (stats->nr_unprocessable_samples != 0) {
ui__warning("%u unprocessable samples recorded.\n"
"Do you have a KVM guest running and not using 'perf kvm'?\n",
- session->stats.nr_unprocessable_samples);
+ stats->nr_unprocessable_samples);
}
- if (session->stats.nr_unordered_events != 0)
- ui__warning("%u out of order events recorded.\n", session->stats.nr_unordered_events);
+ if (oe->nr_unordered_events != 0)
+ ui__warning("%u out of order events recorded.\n", oe->nr_unordered_events);
}
volatile int session_done;
-static int __perf_session__process_pipe_events(struct perf_session *session,
- struct perf_tool *tool)
+static int __perf_session__process_pipe_events(struct perf_session *session)
{
+ struct ordered_events *oe = &session->ordered_events;
+ struct perf_tool *tool = session->tool;
int fd = perf_data_file__fd(session->file);
union perf_event *event;
uint32_t size, cur_size = 0;
}
}
- if ((skip = perf_session__process_event(session, event, tool, head)) < 0) {
+ if ((skip = perf_session__process_event(session, event, head)) < 0) {
pr_err("%#" PRIx64 " [%#x]: failed to process type: %d\n",
head, event->header.size, event->header.type);
err = -EINVAL;
goto more;
done:
/* do the final flush for ordered samples */
- err = ordered_events__flush(session, tool, OE_FLUSH__FINAL);
+ err = ordered_events__flush(oe, OE_FLUSH__FINAL);
out_err:
free(buf);
- perf_session__warn_about_errors(session, tool);
+ perf_session__warn_about_errors(session);
ordered_events__free(&session->ordered_events);
return err;
}
static int __perf_session__process_events(struct perf_session *session,
u64 data_offset, u64 data_size,
- u64 file_size, struct perf_tool *tool)
+ u64 file_size)
{
+ struct ordered_events *oe = &session->ordered_events;
+ struct perf_tool *tool = session->tool;
int fd = perf_data_file__fd(session->file);
u64 head, page_offset, file_offset, file_pos, size;
int err, mmap_prot, mmap_flags, map_idx = 0;
size = event->header.size;
if (size < sizeof(struct perf_event_header) ||
- (skip = perf_session__process_event(session, event, tool, file_pos))
- < 0) {
+ (skip = perf_session__process_event(session, event, file_pos)) < 0) {
pr_err("%#" PRIx64 " [%#x]: failed to process type: %d\n",
file_offset + head, event->header.size,
event->header.type);
out:
/* do the final flush for ordered samples */
- err = ordered_events__flush(session, tool, OE_FLUSH__FINAL);
+ err = ordered_events__flush(oe, OE_FLUSH__FINAL);
out_err:
ui_progress__finish();
- perf_session__warn_about_errors(session, tool);
+ perf_session__warn_about_errors(session);
ordered_events__free(&session->ordered_events);
session->one_mmap = false;
return err;
}
-int perf_session__process_events(struct perf_session *session,
- struct perf_tool *tool)
+int perf_session__process_events(struct perf_session *session)
{
u64 size = perf_data_file__size(session->file);
int err;
if (!perf_data_file__is_pipe(session->file))
err = __perf_session__process_events(session,
session->header.data_offset,
- session->header.data_size,
- size, tool);
+ session->header.data_size, size);
else
- err = __perf_session__process_pipe_events(session, tool);
+ err = __perf_session__process_pipe_events(session);
return err;
}
for (i = 0; i < MAP__NR_TYPES; ++i) {
struct kmap *kmap = map__kmap(maps[i]);
+
+ if (!kmap)
+ continue;
kmap->ref_reloc_sym = ref;
}
{
size_t ret = fprintf(fp, "Aggregated stats:\n");
- ret += events_stats__fprintf(&session->stats, fp);
+ ret += events_stats__fprintf(&session->evlist->stats, fp);
return ret;
}
struct machines machines;
struct perf_evlist *evlist;
struct trace_event tevent;
- struct events_stats stats;
bool repipe;
bool one_mmap;
void *one_mmap_addr;
u64 one_mmap_offset;
struct ordered_events ordered_events;
struct perf_data_file *file;
+ struct perf_tool *tool;
};
#define PRINT_IP_OPT_IP (1<<0)
union perf_event **event_ptr,
struct perf_sample *sample);
-int perf_session__process_events(struct perf_session *session,
- struct perf_tool *tool);
+int perf_session__process_events(struct perf_session *session);
-int perf_session_queue_event(struct perf_session *s, union perf_event *event,
- struct perf_tool *tool, struct perf_sample *sample,
- u64 file_offset);
+int perf_session__queue_event(struct perf_session *s, union perf_event *event,
+ struct perf_sample *sample, u64 file_offset);
void perf_tool__fill_defaults(struct perf_tool *tool);
-int perf_session__deliver_event(struct perf_session *session,
- union perf_event *event,
- struct perf_sample *sample,
- struct perf_tool *tool, u64 file_offset);
-
int perf_session__resolve_callchain(struct perf_session *session,
struct perf_evsel *evsel,
struct thread *thread,
int perf_session__deliver_synth_event(struct perf_session *session,
union perf_event *event,
- struct perf_sample *sample,
- struct perf_tool *tool);
+ struct perf_sample *sample);
int perf_event__process_id_index(struct perf_tool *tool,
union perf_event *event,
build_lib = getenv('PYTHON_EXTBUILD_LIB')
build_tmp = getenv('PYTHON_EXTBUILD_TMP')
libtraceevent = getenv('LIBTRACEEVENT')
-libapikfs = getenv('LIBAPIKFS')
+libapikfs = getenv('LIBAPI')
ext_sources = [f.strip() for f in file('util/python-ext-sources')
if len(f.strip()) > 0 and f[0] != '#']
sort__has_parent = 1;
} else if (sd->entry == &sort_sym) {
sort__has_sym = 1;
+ /*
+ * perf diff displays the performance difference amongst
+ * two or more perf.data files. Those files could come
+ * from different binaries. So we should not compare
+ * their ips, but the name of symbol.
+ */
+ if (sort__mode == SORT_MODE__DIFF)
+ sd->entry->se_collapse = sort__sym_sort;
+
} else if (sd->entry == &sort_dso) {
sort__has_dso = 1;
}
extern struct sort_entry sort_sym_from;
extern struct sort_entry sort_sym_to;
extern enum sort_type sort__first_dimension;
+extern const char default_mem_sort_order[];
struct he_stat {
u64 period;
bool init_have_children;
char level;
- bool used;
u8 filtered;
char *srcline;
struct symbol *parent;
return GELF_ST_TYPE(sym->st_info);
}
+#ifndef STT_GNU_IFUNC
+#define STT_GNU_IFUNC 10
+#endif
+
static inline int elf_sym__is_function(const GElf_Sym *sym)
{
return (elf_sym__type(sym) == STT_FUNC ||
static int decompress_kmodule(struct dso *dso, const char *name,
enum dso_binary_type type)
{
- int fd;
- const char *ext = strrchr(name, '.');
+ int fd = -1;
char tmpbuf[] = "/tmp/perf-kmod-XXXXXX";
+ struct kmod_path m;
if (type != DSO_BINARY_TYPE__SYSTEM_PATH_KMODULE_COMP &&
type != DSO_BINARY_TYPE__GUEST_KMODULE_COMP &&
type != DSO_BINARY_TYPE__BUILD_ID_CACHE)
return -1;
- if (!ext || !is_supported_compression(ext + 1)) {
- ext = strrchr(dso->name, '.');
- if (!ext || !is_supported_compression(ext + 1))
- return -1;
- }
+ if (type == DSO_BINARY_TYPE__BUILD_ID_CACHE)
+ name = dso->long_name;
- fd = mkstemp(tmpbuf);
- if (fd < 0)
+ if (kmod_path__parse_ext(&m, name) || !m.comp)
return -1;
- if (!decompress_to_file(ext + 1, name, fd)) {
+ fd = mkstemp(tmpbuf);
+ if (fd < 0) {
+ dso->load_errno = errno;
+ goto out;
+ }
+
+ if (!decompress_to_file(m.ext, name, fd)) {
+ dso->load_errno = DSO_LOAD_ERRNO__DECOMPRESSION_FAILURE;
close(fd);
fd = -1;
}
unlink(tmpbuf);
+out:
+ free(m.ext);
return fd;
}
Elf *elf;
int fd;
- if (dso__needs_decompress(dso))
+ if (dso__needs_decompress(dso)) {
fd = decompress_kmodule(dso, name, type);
- else
+ if (fd < 0)
+ return -1;
+ } else {
fd = open(name, O_RDONLY);
-
- if (fd < 0)
- return -1;
+ if (fd < 0) {
+ dso->load_errno = errno;
+ return -1;
+ }
+ }
elf = elf_begin(fd, PERF_ELF_C_READ_MMAP, NULL);
if (elf == NULL) {
pr_debug("%s: cannot read %s ELF file.\n", __func__, name);
+ dso->load_errno = DSO_LOAD_ERRNO__INVALID_ELF;
goto out_close;
}
if (gelf_getehdr(elf, &ehdr) == NULL) {
+ dso->load_errno = DSO_LOAD_ERRNO__INVALID_ELF;
pr_debug("%s: cannot get elf header.\n", __func__);
goto out_elf_end;
}
- if (dso__swap_init(dso, ehdr.e_ident[EI_DATA]))
+ if (dso__swap_init(dso, ehdr.e_ident[EI_DATA])) {
+ dso->load_errno = DSO_LOAD_ERRNO__INTERNAL_ERROR;
goto out_elf_end;
+ }
/* Always reject images with a mismatched build-id: */
if (dso->has_build_id) {
u8 build_id[BUILD_ID_SIZE];
- if (elf_read_build_id(elf, build_id, BUILD_ID_SIZE) < 0)
+ if (elf_read_build_id(elf, build_id, BUILD_ID_SIZE) < 0) {
+ dso->load_errno = DSO_LOAD_ERRNO__CANNOT_READ_BUILDID;
goto out_elf_end;
+ }
- if (!dso__build_id_equal(dso, build_id))
+ if (!dso__build_id_equal(dso, build_id)) {
+ dso->load_errno = DSO_LOAD_ERRNO__MISMATCHING_BUILDID;
goto out_elf_end;
+ }
}
ss->is_64_bit = (gelf_getclass(elf) == ELFCLASS64);
}
ss->name = strdup(name);
- if (!ss->name)
+ if (!ss->name) {
+ dso->load_errno = errno;
goto out_elf_end;
+ }
ss->elf = elf;
ss->fd = fd;
symbol_filter_t filter, int kmodule)
{
struct kmap *kmap = dso->kernel ? map__kmap(map) : NULL;
+ struct map_groups *kmaps = kmap ? map__kmaps(map) : NULL;
struct map *curr_map = map;
struct dso *curr_dso = dso;
Elf_Data *symstrs, *secstrs;
int nr = 0;
bool remap_kernel = false, adjust_kernel_syms = false;
+ if (kmap && !kmaps)
+ return -1;
+
dso->symtab_type = syms_ss->type;
dso->is_64_bit = syms_ss->is_64_bit;
dso->rel = syms_ss->ehdr.e_type == ET_REL;
/* Reject ARM ELF "mapping symbols": these aren't unique and
* don't identify functions, so will confuse the profile
* output: */
- if (ehdr.e_machine == EM_ARM) {
- if (!strcmp(elf_name, "$a") ||
- !strcmp(elf_name, "$d") ||
- !strcmp(elf_name, "$t"))
+ if (ehdr.e_machine == EM_ARM || ehdr.e_machine == EM_AARCH64) {
+ if (elf_name[0] == '$' && strchr("adtx", elf_name[1])
+ && (elf_name[2] == '\0' || elf_name[2] == '.'))
continue;
}
map->map_ip = map__map_ip;
map->unmap_ip = map__unmap_ip;
/* Ensure maps are correctly ordered */
- map_groups__remove(kmap->kmaps, map);
- map_groups__insert(kmap->kmaps, map);
+ if (kmaps) {
+ map_groups__remove(kmaps, map);
+ map_groups__insert(kmaps, map);
+ }
}
/*
snprintf(dso_name, sizeof(dso_name),
"%s%s", dso->short_name, section_name);
- curr_map = map_groups__find_by_name(kmap->kmaps, map->type, dso_name);
+ curr_map = map_groups__find_by_name(kmaps, map->type, dso_name);
if (curr_map == NULL) {
u64 start = sym.st_value;
curr_map->unmap_ip = identity__map_ip;
}
curr_dso->symtab_type = dso->symtab_type;
- map_groups__insert(kmap->kmaps, curr_map);
+ map_groups__insert(kmaps, curr_map);
/*
* The new DSO should go to the kernel DSOS
*/
* For misannotated, zeroed, ASM function sizes.
*/
if (nr > 0) {
- symbols__fixup_duplicate(&dso->symbols[map->type]);
+ if (!symbol_conf.allow_aliases)
+ symbols__fixup_duplicate(&dso->symbols[map->type]);
symbols__fixup_end(&dso->symbols[map->type]);
if (kmap) {
/*
* We need to fixup this here too because we create new
* maps here, for things like vsyscall sections.
*/
- __map_groups__fixup_end(kmap->kmaps, map->type);
+ __map_groups__fixup_end(kmaps, map->type);
}
}
err = nr;
return ret;
}
-int symsrc__init(struct symsrc *ss, struct dso *dso __maybe_unused,
- const char *name,
+int symsrc__init(struct symsrc *ss, struct dso *dso, const char *name,
enum dso_binary_type type)
{
int fd = open(name, O_RDONLY);
if (fd < 0)
- return -1;
+ goto out_errno;
ss->name = strdup(name);
if (!ss->name)
return 0;
out_close:
close(fd);
+out_errno:
+ dso->load_errno = errno;
return -1;
}
#include "machine.h"
#include "symbol.h"
#include "strlist.h"
+#include "intlist.h"
#include "header.h"
#include <elf.h>
static int dso__split_kallsyms_for_kcore(struct dso *dso, struct map *map,
symbol_filter_t filter)
{
- struct map_groups *kmaps = map__kmap(map)->kmaps;
+ struct map_groups *kmaps = map__kmaps(map);
struct map *curr_map;
struct symbol *pos;
int count = 0, moved = 0;
struct rb_root *root = &dso->symbols[map->type];
struct rb_node *next = rb_first(root);
+ if (!kmaps)
+ return -1;
+
while (next) {
char *module;
static int dso__split_kallsyms(struct dso *dso, struct map *map, u64 delta,
symbol_filter_t filter)
{
- struct map_groups *kmaps = map__kmap(map)->kmaps;
- struct machine *machine = kmaps->machine;
+ struct map_groups *kmaps = map__kmaps(map);
+ struct machine *machine;
struct map *curr_map = map;
struct symbol *pos;
int count = 0, moved = 0;
struct rb_node *next = rb_first(root);
int kernel_range = 0;
+ if (!kmaps)
+ return -1;
+
+ machine = kmaps->machine;
+
while (next) {
char *module;
static int validate_kcore_modules(const char *kallsyms_filename,
struct map *map)
{
- struct map_groups *kmaps = map__kmap(map)->kmaps;
+ struct map_groups *kmaps = map__kmaps(map);
char modules_filename[PATH_MAX];
+ if (!kmaps)
+ return -EINVAL;
+
if (!filename_from_kallsyms_filename(modules_filename, "modules",
kallsyms_filename))
return -EINVAL;
{
struct kmap *kmap = map__kmap(map);
+ if (!kmap)
+ return -EINVAL;
+
if (kmap->ref_reloc_sym && kmap->ref_reloc_sym->name) {
u64 start;
static int dso__load_kcore(struct dso *dso, struct map *map,
const char *kallsyms_filename)
{
- struct map_groups *kmaps = map__kmap(map)->kmaps;
- struct machine *machine = kmaps->machine;
+ struct map_groups *kmaps = map__kmaps(map);
+ struct machine *machine;
struct kcore_mapfn_data md;
struct map *old_map, *new_map, *replacement_map = NULL;
bool is_64_bit;
char kcore_filename[PATH_MAX];
struct symbol *sym;
+ if (!kmaps)
+ return -EINVAL;
+
+ machine = kmaps->machine;
+
/* This function requires that the map is the kernel map */
if (map != machine->vmlinux_maps[map->type])
return -EINVAL;
struct kmap *kmap = map__kmap(map);
u64 addr;
+ if (!kmap)
+ return -1;
+
if (!kmap->ref_reloc_sym || !kmap->ref_reloc_sym->name)
return 0;
return 0;
}
+int setup_intlist(struct intlist **list, const char *list_str,
+ const char *list_name)
+{
+ if (list_str == NULL)
+ return 0;
+
+ *list = intlist__new(list_str);
+ if (!*list) {
+ pr_err("problems parsing %s list\n", list_name);
+ return -1;
+ }
+ return 0;
+}
+
static bool symbol__read_kptr_restrict(void)
{
bool value = false;
symbol_conf.comm_list_str, "comm") < 0)
goto out_free_dso_list;
+ if (setup_intlist(&symbol_conf.pid_list,
+ symbol_conf.pid_list_str, "pid") < 0)
+ goto out_free_comm_list;
+
+ if (setup_intlist(&symbol_conf.tid_list,
+ symbol_conf.tid_list_str, "tid") < 0)
+ goto out_free_pid_list;
+
if (setup_list(&symbol_conf.sym_list,
symbol_conf.sym_list_str, "symbol") < 0)
- goto out_free_comm_list;
+ goto out_free_tid_list;
/*
* A path to symbols of "/" is identical to ""
symbol_conf.initialized = true;
return 0;
+out_free_tid_list:
+ intlist__delete(symbol_conf.tid_list);
+out_free_pid_list:
+ intlist__delete(symbol_conf.pid_list);
out_free_comm_list:
strlist__delete(symbol_conf.comm_list);
out_free_dso_list:
strlist__delete(symbol_conf.sym_list);
strlist__delete(symbol_conf.dso_list);
strlist__delete(symbol_conf.comm_list);
+ intlist__delete(symbol_conf.tid_list);
+ intlist__delete(symbol_conf.pid_list);
vmlinux_path__exit();
symbol_conf.sym_list = symbol_conf.dso_list = symbol_conf.comm_list = NULL;
symbol_conf.initialized = false;
}
struct strlist;
+struct intlist;
struct symbol_conf {
unsigned short priv_size;
ignore_vmlinux_buildid,
show_kernel_path,
use_modules,
+ allow_aliases,
sort_by_name,
show_nr_samples,
show_total_period,
const char *guestmount;
const char *dso_list_str,
*comm_list_str,
+ *pid_list_str,
+ *tid_list_str,
*sym_list_str,
*col_width_list_str;
struct strlist *dso_list,
*dso_to_list,
*sym_from_list,
*sym_to_list;
+ struct intlist *pid_list,
+ *tid_list;
const char *symfs;
};
int setup_list(struct strlist **list, const char *list_str,
const char *list_name);
+int setup_intlist(struct intlist **list, const char *list_str,
+ const char *list_name);
#endif /* __PERF_SYMBOL */
if (errnum >= 0) {
const char *err = strerror_r(errnum, buf, buflen);
- if (err != buf) {
- size_t len = strlen(err);
- memcpy(buf, err, min(buflen - 1, len));
- *(buf + min(buflen - 1, len)) = '\0';
- }
+ if (err != buf)
+ scnprintf(buf, buflen, "%s", err);
return 0;
}
free(thread);
}
+struct thread *thread__get(struct thread *thread)
+{
+ ++thread->refcnt;
+ return thread;
+}
+
+void thread__put(struct thread *thread)
+{
+ if (thread && --thread->refcnt == 0) {
+ list_del_init(&thread->node);
+ thread__delete(thread);
+ }
+}
+
struct comm *thread__comm(const struct thread *thread)
{
if (list_empty(&thread->comm_list))
err = thread__set_comm(thread, comm, timestamp);
if (err)
return err;
- thread->comm_set = true;
}
thread->ppid = parent->tid;
#include <sys/types.h>
#include "symbol.h"
#include <strlist.h>
+#include <intlist.h>
struct thread_stack;
pid_t tid;
pid_t ppid;
int cpu;
+ int refcnt;
char shortname[3];
bool comm_set;
bool dead; /* if set thread has exited */
struct thread *thread__new(pid_t pid, pid_t tid);
int thread__init_map_groups(struct thread *thread, struct machine *machine);
void thread__delete(struct thread *thread);
+
+struct thread *thread__get(struct thread *thread);
+void thread__put(struct thread *thread);
+
+static inline void __thread__zput(struct thread **thread)
+{
+ thread__put(*thread);
+ *thread = NULL;
+}
+
+#define thread__zput(thread) __thread__zput(&thread)
+
static inline void thread__exited(struct thread *thread)
{
thread->dead = true;
return true;
}
+ if (symbol_conf.pid_list &&
+ !intlist__has_entry(symbol_conf.pid_list, thread->pid_)) {
+ return true;
+ }
+
+ if (symbol_conf.tid_list &&
+ !intlist__has_entry(symbol_conf.tid_list, thread->tid)) {
+ return true;
+ }
+
return false;
}
struct perf_sample;
struct perf_tool;
struct machine;
+struct ordered_events;
typedef int (*event_sample)(struct perf_tool *tool, union perf_event *event,
struct perf_sample *sample,
typedef int (*event_op2)(struct perf_tool *tool, union perf_event *event,
struct perf_session *session);
+typedef int (*event_oe)(struct perf_tool *tool, union perf_event *event,
+ struct ordered_events *oe);
+
struct perf_tool {
event_sample sample,
read;
unthrottle;
event_attr_op attr;
event_op2 tracing_data;
- event_op2 finished_round,
- build_id,
+ event_oe finished_round;
+ event_op2 build_id,
id_index;
bool ordered_events;
bool ordering_requires_timestamps;
return pevent_read_number(event->pevent, ptr, size);
}
-void event_format__print(struct event_format *event,
- int cpu, void *data, int size)
+void event_format__fprintf(struct event_format *event,
+ int cpu, void *data, int size, FILE *fp)
{
struct pevent_record record;
struct trace_seq s;
trace_seq_init(&s);
pevent_event_info(&s, event, &record);
- trace_seq_do_printf(&s);
+ trace_seq_do_fprintf(&s, fp);
trace_seq_destroy(&s);
}
+void event_format__print(struct event_format *event,
+ int cpu, void *data, int size)
+{
+ return event_format__fprintf(event, cpu, data, size, stdout);
+}
+
void parse_proc_kallsyms(struct pevent *pevent,
char *file, unsigned int size __maybe_unused)
{
static void process_event_unsupported(union perf_event *event __maybe_unused,
struct perf_sample *sample __maybe_unused,
struct perf_evsel *evsel __maybe_unused,
- struct thread *thread __maybe_unused,
struct addr_location *al __maybe_unused)
{
}
int bigendian(void);
+void event_format__fprintf(struct event_format *event,
+ int cpu, void *data, int size, FILE *fp);
+
void event_format__print(struct event_format *event,
int cpu, void *data, int size);
void (*process_event) (union perf_event *event,
struct perf_sample *sample,
struct perf_evsel *evsel,
- struct thread *thread,
- struct addr_location *al);
+ struct addr_location *al);
int (*generate_script) (struct pevent *pevent, const char *outfile);
};
u64 *fde_count)
{
int ret = -EINVAL, fd;
- u64 offset = dso->data.frame_offset;
+ u64 offset = dso->data.eh_frame_hdr_offset;
if (offset == 0) {
fd = dso__data_fd(dso, machine);
/* Check the .eh_frame section for unwinding info */
offset = elf_section_offset(fd, ".eh_frame_hdr");
- dso->data.frame_offset = offset;
+ dso->data.eh_frame_hdr_offset = offset;
}
if (offset)
struct machine *machine, u64 *offset)
{
int fd;
- u64 ofs = dso->data.frame_offset;
+ u64 ofs = dso->data.debug_frame_offset;
if (ofs == 0) {
fd = dso__data_fd(dso, machine);
/* Check the .debug_frame section for unwinding info */
ofs = elf_section_offset(fd, ".debug_frame");
- dso->data.frame_offset = ofs;
+ dso->data.debug_frame_offset = ofs;
}
*offset = ofs;
void dump_stack(void) {}
#endif
+void sighandler_dump_stack(int sig)
+{
+ psignal(sig, "perf");
+ dump_stack();
+ exit(sig);
+}
+
void get_term_dimensions(struct winsize *ws)
{
char *s = getenv("LINES");
tcsetattr(0, TCSANOW, &tc);
}
-static void set_tracing_events_path(const char *mountpoint)
+static void set_tracing_events_path(const char *tracing, const char *mountpoint)
{
- snprintf(tracing_events_path, sizeof(tracing_events_path), "%s/%s",
- mountpoint, "tracing/events");
+ snprintf(tracing_events_path, sizeof(tracing_events_path), "%s/%s%s",
+ mountpoint, tracing, "events");
}
-const char *perf_debugfs_mount(const char *mountpoint)
+static const char *__perf_tracefs_mount(const char *mountpoint)
+{
+ const char *mnt;
+
+ mnt = tracefs_mount(mountpoint);
+ if (!mnt)
+ return NULL;
+
+ set_tracing_events_path("", mnt);
+
+ return mnt;
+}
+
+static const char *__perf_debugfs_mount(const char *mountpoint)
{
const char *mnt;
if (!mnt)
return NULL;
- set_tracing_events_path(mnt);
+ set_tracing_events_path("tracing/", mnt);
+
+ return mnt;
+}
+
+const char *perf_debugfs_mount(const char *mountpoint)
+{
+ const char *mnt;
+
+ mnt = __perf_tracefs_mount(mountpoint);
+ if (mnt)
+ return mnt;
+
+ mnt = __perf_debugfs_mount(mountpoint);
return mnt;
}
void perf_debugfs_set_path(const char *mntpt)
{
snprintf(debugfs_mountpoint, strlen(debugfs_mountpoint), "%s", mntpt);
- set_tracing_events_path(mntpt);
+ set_tracing_events_path("tracing/", mntpt);
+}
+
+static const char *find_tracefs(void)
+{
+ const char *path = __perf_tracefs_mount(NULL);
+
+ return path;
}
static const char *find_debugfs(void)
{
- const char *path = perf_debugfs_mount(NULL);
+ const char *path = __perf_debugfs_mount(NULL);
if (!path)
fprintf(stderr, "Your kernel does not support the debugfs filesystem");
*/
const char *find_tracing_dir(void)
{
+ const char *tracing_dir = "";
static char *tracing;
static int tracing_found;
const char *debugfs;
if (tracing_found)
return tracing;
- debugfs = find_debugfs();
- if (!debugfs)
- return NULL;
+ debugfs = find_tracefs();
+ if (!debugfs) {
+ tracing_dir = "/tracing";
+ debugfs = find_debugfs();
+ if (!debugfs)
+ return NULL;
+ }
- if (asprintf(&tracing, "%s/tracing", debugfs) < 0)
+ if (asprintf(&tracing, "%s%s", debugfs, tracing_dir) < 0)
return NULL;
tracing_found = 1;
#include <linux/types.h>
#include <sys/ttydefaults.h>
#include <api/fs/debugfs.h>
+#include <api/fs/tracefs.h>
#include <termios.h>
#include <linux/bitops.h>
#include <termios.h>
char *rtrim(char *s);
void dump_stack(void);
+void sighandler_dump_stack(int sig);
extern unsigned int page_size;
extern int cacheline_size;
int gzip_decompress_to_file(const char *input, int output_fd);
#endif
+#ifdef HAVE_LZMA_SUPPORT
+int lzma_decompress_to_file(const char *input, int output_fd);
+#endif
+
#endif /* GIT_COMPAT_UTIL_H */
TARGETS += timers
TARGETS += user
TARGETS += vm
+TARGETS += x86
#Please keep the TARGETS list alphabetically sorted
TARGETS_HOTPLUG = cpu-hotplug
make -C $$TARGET clean; \
done;
+INSTALL_PATH ?= install
+INSTALL_PATH := $(abspath $(INSTALL_PATH))
+ALL_SCRIPT := $(INSTALL_PATH)/run_kselftest.sh
+
+install:
+ifdef INSTALL_PATH
+ @# Ask all targets to install their files
+ mkdir -p $(INSTALL_PATH)
+ for TARGET in $(TARGETS); do \
+ mkdir -p $(INSTALL_PATH)/$$TARGET ; \
+ make -C $$TARGET INSTALL_PATH=$(INSTALL_PATH)/$$TARGET install; \
+ done;
+
+ @# Ask all targets to emit their test scripts
+ echo "#!/bin/bash" > $(ALL_SCRIPT)
+ echo "cd \$$(dirname \$$0)" >> $(ALL_SCRIPT)
+ echo "ROOT=\$$PWD" >> $(ALL_SCRIPT)
+
+ for TARGET in $(TARGETS); do \
+ echo "echo ; echo Running tests in $$TARGET" >> $(ALL_SCRIPT); \
+ echo "echo ========================================" >> $(ALL_SCRIPT); \
+ echo "cd $$TARGET" >> $(ALL_SCRIPT); \
+ make -s --no-print-directory -C $$TARGET emit_tests >> $(ALL_SCRIPT); \
+ echo "cd \$$ROOT" >> $(ALL_SCRIPT); \
+ done;
+
+ chmod u+x $(ALL_SCRIPT)
+else
+ $(error Error: set INSTALL_PATH to use install)
+endif
+
clean:
for TARGET in $(TARGETS); do \
make -C $$TARGET clean; \
done;
+
+.PHONY: install
echo "Not an x86 target, can't build breakpoints selftests"
endif
-run_tests:
- @./breakpoint_test || echo "breakpoints selftests: [FAIL]"
+TEST_PROGS := breakpoint_test
+
+include ../lib.mk
clean:
rm -fr breakpoint_test
all:
-run_tests:
- @/bin/bash ./on-off-test.sh || echo "cpu-hotplug selftests: [FAIL]"
+TEST_PROGS := cpu-on-off-test.sh
+
+include ../lib.mk
run_full_test:
- @/bin/bash ./on-off-test.sh -a || echo "cpu-hotplug selftests: [FAIL]"
+ @/bin/bash ./cpu-on-off-test.sh -a || echo "cpu-hotplug selftests: [FAIL]"
clean:
--- /dev/null
+#!/bin/bash
+
+SYSFS=
+
+prerequisite()
+{
+ msg="skip all tests:"
+
+ if [ $UID != 0 ]; then
+ echo $msg must be run as root >&2
+ exit 0
+ fi
+
+ taskset -p 01 $$
+
+ SYSFS=`mount -t sysfs | head -1 | awk '{ print $3 }'`
+
+ if [ ! -d "$SYSFS" ]; then
+ echo $msg sysfs is not mounted >&2
+ exit 0
+ fi
+
+ if ! ls $SYSFS/devices/system/cpu/cpu* > /dev/null 2>&1; then
+ echo $msg cpu hotplug is not supported >&2
+ exit 0
+ fi
+
+ echo "CPU online/offline summary:"
+ online_cpus=`cat $SYSFS/devices/system/cpu/online`
+ online_max=${online_cpus##*-}
+ echo -e "\t Cpus in online state: $online_cpus"
+
+ offline_cpus=`cat $SYSFS/devices/system/cpu/offline`
+ if [[ "a$offline_cpus" = "a" ]]; then
+ offline_cpus=0
+ else
+ offline_max=${offline_cpus##*-}
+ fi
+ echo -e "\t Cpus in offline state: $offline_cpus"
+}
+
+#
+# list all hot-pluggable CPUs
+#
+hotpluggable_cpus()
+{
+ local state=${1:-.\*}
+
+ for cpu in $SYSFS/devices/system/cpu/cpu*; do
+ if [ -f $cpu/online ] && grep -q $state $cpu/online; then
+ echo ${cpu##/*/cpu}
+ fi
+ done
+}
+
+hotplaggable_offline_cpus()
+{
+ hotpluggable_cpus 0
+}
+
+hotpluggable_online_cpus()
+{
+ hotpluggable_cpus 1
+}
+
+cpu_is_online()
+{
+ grep -q 1 $SYSFS/devices/system/cpu/cpu$1/online
+}
+
+cpu_is_offline()
+{
+ grep -q 0 $SYSFS/devices/system/cpu/cpu$1/online
+}
+
+online_cpu()
+{
+ echo 1 > $SYSFS/devices/system/cpu/cpu$1/online
+}
+
+offline_cpu()
+{
+ echo 0 > $SYSFS/devices/system/cpu/cpu$1/online
+}
+
+online_cpu_expect_success()
+{
+ local cpu=$1
+
+ if ! online_cpu $cpu; then
+ echo $FUNCNAME $cpu: unexpected fail >&2
+ elif ! cpu_is_online $cpu; then
+ echo $FUNCNAME $cpu: unexpected offline >&2
+ fi
+}
+
+online_cpu_expect_fail()
+{
+ local cpu=$1
+
+ if online_cpu $cpu 2> /dev/null; then
+ echo $FUNCNAME $cpu: unexpected success >&2
+ elif ! cpu_is_offline $cpu; then
+ echo $FUNCNAME $cpu: unexpected online >&2
+ fi
+}
+
+offline_cpu_expect_success()
+{
+ local cpu=$1
+
+ if ! offline_cpu $cpu; then
+ echo $FUNCNAME $cpu: unexpected fail >&2
+ elif ! cpu_is_offline $cpu; then
+ echo $FUNCNAME $cpu: unexpected offline >&2
+ fi
+}
+
+offline_cpu_expect_fail()
+{
+ local cpu=$1
+
+ if offline_cpu $cpu 2> /dev/null; then
+ echo $FUNCNAME $cpu: unexpected success >&2
+ elif ! cpu_is_online $cpu; then
+ echo $FUNCNAME $cpu: unexpected offline >&2
+ fi
+}
+
+error=-12
+allcpus=0
+priority=0
+online_cpus=0
+online_max=0
+offline_cpus=0
+offline_max=0
+
+while getopts e:ahp: opt; do
+ case $opt in
+ e)
+ error=$OPTARG
+ ;;
+ a)
+ allcpus=1
+ ;;
+ h)
+ echo "Usage $0 [ -a ] [ -e errno ] [ -p notifier-priority ]"
+ echo -e "\t default offline one cpu"
+ echo -e "\t run with -a option to offline all cpus"
+ exit
+ ;;
+ p)
+ priority=$OPTARG
+ ;;
+ esac
+done
+
+if ! [ "$error" -ge -4095 -a "$error" -lt 0 ]; then
+ echo "error code must be -4095 <= errno < 0" >&2
+ exit 1
+fi
+
+prerequisite
+
+#
+# Safe test (default) - offline and online one cpu
+#
+if [ $allcpus -eq 0 ]; then
+ echo "Limited scope test: one hotplug cpu"
+ echo -e "\t (leaves cpu in the original state):"
+ echo -e "\t online to offline to online: cpu $online_max"
+ offline_cpu_expect_success $online_max
+ online_cpu_expect_success $online_max
+
+ if [[ $offline_cpus -gt 0 ]]; then
+ echo -e "\t offline to online to offline: cpu $offline_max"
+ online_cpu_expect_success $offline_max
+ offline_cpu_expect_success $offline_max
+ fi
+ exit 0
+else
+ echo "Full scope test: all hotplug cpus"
+ echo -e "\t online all offline cpus"
+ echo -e "\t offline all online cpus"
+ echo -e "\t online all offline cpus"
+fi
+
+#
+# Online all hot-pluggable CPUs
+#
+for cpu in `hotplaggable_offline_cpus`; do
+ online_cpu_expect_success $cpu
+done
+
+#
+# Offline all hot-pluggable CPUs
+#
+for cpu in `hotpluggable_online_cpus`; do
+ offline_cpu_expect_success $cpu
+done
+
+#
+# Online all hot-pluggable CPUs again
+#
+for cpu in `hotplaggable_offline_cpus`; do
+ online_cpu_expect_success $cpu
+done
+
+#
+# Test with cpu notifier error injection
+#
+
+DEBUGFS=`mount -t debugfs | head -1 | awk '{ print $3 }'`
+NOTIFIER_ERR_INJECT_DIR=$DEBUGFS/notifier-error-inject/cpu
+
+prerequisite_extra()
+{
+ msg="skip extra tests:"
+
+ /sbin/modprobe -q -r cpu-notifier-error-inject
+ /sbin/modprobe -q cpu-notifier-error-inject priority=$priority
+
+ if [ ! -d "$DEBUGFS" ]; then
+ echo $msg debugfs is not mounted >&2
+ exit 0
+ fi
+
+ if [ ! -d $NOTIFIER_ERR_INJECT_DIR ]; then
+ echo $msg cpu-notifier-error-inject module is not available >&2
+ exit 0
+ fi
+}
+
+prerequisite_extra
+
+#
+# Offline all hot-pluggable CPUs
+#
+echo 0 > $NOTIFIER_ERR_INJECT_DIR/actions/CPU_DOWN_PREPARE/error
+for cpu in `hotpluggable_online_cpus`; do
+ offline_cpu_expect_success $cpu
+done
+
+#
+# Test CPU hot-add error handling (offline => online)
+#
+echo $error > $NOTIFIER_ERR_INJECT_DIR/actions/CPU_UP_PREPARE/error
+for cpu in `hotplaggable_offline_cpus`; do
+ online_cpu_expect_fail $cpu
+done
+
+#
+# Online all hot-pluggable CPUs
+#
+echo 0 > $NOTIFIER_ERR_INJECT_DIR/actions/CPU_UP_PREPARE/error
+for cpu in `hotplaggable_offline_cpus`; do
+ online_cpu_expect_success $cpu
+done
+
+#
+# Test CPU hot-remove error handling (online => offline)
+#
+echo $error > $NOTIFIER_ERR_INJECT_DIR/actions/CPU_DOWN_PREPARE/error
+for cpu in `hotpluggable_online_cpus`; do
+ offline_cpu_expect_fail $cpu
+done
+
+echo 0 > $NOTIFIER_ERR_INJECT_DIR/actions/CPU_DOWN_PREPARE/error
+/sbin/modprobe -q -r cpu-notifier-error-inject
+++ /dev/null
-#!/bin/bash
-
-SYSFS=
-
-prerequisite()
-{
- msg="skip all tests:"
-
- if [ $UID != 0 ]; then
- echo $msg must be run as root >&2
- exit 0
- fi
-
- taskset -p 01 $$
-
- SYSFS=`mount -t sysfs | head -1 | awk '{ print $3 }'`
-
- if [ ! -d "$SYSFS" ]; then
- echo $msg sysfs is not mounted >&2
- exit 0
- fi
-
- if ! ls $SYSFS/devices/system/cpu/cpu* > /dev/null 2>&1; then
- echo $msg cpu hotplug is not supported >&2
- exit 0
- fi
-
- echo "CPU online/offline summary:"
- online_cpus=`cat $SYSFS/devices/system/cpu/online`
- online_max=${online_cpus##*-}
- echo -e "\t Cpus in online state: $online_cpus"
-
- offline_cpus=`cat $SYSFS/devices/system/cpu/offline`
- if [[ "a$offline_cpus" = "a" ]]; then
- offline_cpus=0
- else
- offline_max=${offline_cpus##*-}
- fi
- echo -e "\t Cpus in offline state: $offline_cpus"
-}
-
-#
-# list all hot-pluggable CPUs
-#
-hotpluggable_cpus()
-{
- local state=${1:-.\*}
-
- for cpu in $SYSFS/devices/system/cpu/cpu*; do
- if [ -f $cpu/online ] && grep -q $state $cpu/online; then
- echo ${cpu##/*/cpu}
- fi
- done
-}
-
-hotplaggable_offline_cpus()
-{
- hotpluggable_cpus 0
-}
-
-hotpluggable_online_cpus()
-{
- hotpluggable_cpus 1
-}
-
-cpu_is_online()
-{
- grep -q 1 $SYSFS/devices/system/cpu/cpu$1/online
-}
-
-cpu_is_offline()
-{
- grep -q 0 $SYSFS/devices/system/cpu/cpu$1/online
-}
-
-online_cpu()
-{
- echo 1 > $SYSFS/devices/system/cpu/cpu$1/online
-}
-
-offline_cpu()
-{
- echo 0 > $SYSFS/devices/system/cpu/cpu$1/online
-}
-
-online_cpu_expect_success()
-{
- local cpu=$1
-
- if ! online_cpu $cpu; then
- echo $FUNCNAME $cpu: unexpected fail >&2
- elif ! cpu_is_online $cpu; then
- echo $FUNCNAME $cpu: unexpected offline >&2
- fi
-}
-
-online_cpu_expect_fail()
-{
- local cpu=$1
-
- if online_cpu $cpu 2> /dev/null; then
- echo $FUNCNAME $cpu: unexpected success >&2
- elif ! cpu_is_offline $cpu; then
- echo $FUNCNAME $cpu: unexpected online >&2
- fi
-}
-
-offline_cpu_expect_success()
-{
- local cpu=$1
-
- if ! offline_cpu $cpu; then
- echo $FUNCNAME $cpu: unexpected fail >&2
- elif ! cpu_is_offline $cpu; then
- echo $FUNCNAME $cpu: unexpected offline >&2
- fi
-}
-
-offline_cpu_expect_fail()
-{
- local cpu=$1
-
- if offline_cpu $cpu 2> /dev/null; then
- echo $FUNCNAME $cpu: unexpected success >&2
- elif ! cpu_is_online $cpu; then
- echo $FUNCNAME $cpu: unexpected offline >&2
- fi
-}
-
-error=-12
-allcpus=0
-priority=0
-online_cpus=0
-online_max=0
-offline_cpus=0
-offline_max=0
-
-while getopts e:ahp: opt; do
- case $opt in
- e)
- error=$OPTARG
- ;;
- a)
- allcpus=1
- ;;
- h)
- echo "Usage $0 [ -a ] [ -e errno ] [ -p notifier-priority ]"
- echo -e "\t default offline one cpu"
- echo -e "\t run with -a option to offline all cpus"
- exit
- ;;
- p)
- priority=$OPTARG
- ;;
- esac
-done
-
-if ! [ "$error" -ge -4095 -a "$error" -lt 0 ]; then
- echo "error code must be -4095 <= errno < 0" >&2
- exit 1
-fi
-
-prerequisite
-
-#
-# Safe test (default) - offline and online one cpu
-#
-if [ $allcpus -eq 0 ]; then
- echo "Limited scope test: one hotplug cpu"
- echo -e "\t (leaves cpu in the original state):"
- echo -e "\t online to offline to online: cpu $online_max"
- offline_cpu_expect_success $online_max
- online_cpu_expect_success $online_max
-
- if [[ $offline_cpus -gt 0 ]]; then
- echo -e "\t offline to online to offline: cpu $offline_max"
- online_cpu_expect_success $offline_max
- offline_cpu_expect_success $offline_max
- fi
- exit 0
-else
- echo "Full scope test: all hotplug cpus"
- echo -e "\t online all offline cpus"
- echo -e "\t offline all online cpus"
- echo -e "\t online all offline cpus"
-fi
-
-#
-# Online all hot-pluggable CPUs
-#
-for cpu in `hotplaggable_offline_cpus`; do
- online_cpu_expect_success $cpu
-done
-
-#
-# Offline all hot-pluggable CPUs
-#
-for cpu in `hotpluggable_online_cpus`; do
- offline_cpu_expect_success $cpu
-done
-
-#
-# Online all hot-pluggable CPUs again
-#
-for cpu in `hotplaggable_offline_cpus`; do
- online_cpu_expect_success $cpu
-done
-
-#
-# Test with cpu notifier error injection
-#
-
-DEBUGFS=`mount -t debugfs | head -1 | awk '{ print $3 }'`
-NOTIFIER_ERR_INJECT_DIR=$DEBUGFS/notifier-error-inject/cpu
-
-prerequisite_extra()
-{
- msg="skip extra tests:"
-
- /sbin/modprobe -q -r cpu-notifier-error-inject
- /sbin/modprobe -q cpu-notifier-error-inject priority=$priority
-
- if [ ! -d "$DEBUGFS" ]; then
- echo $msg debugfs is not mounted >&2
- exit 0
- fi
-
- if [ ! -d $NOTIFIER_ERR_INJECT_DIR ]; then
- echo $msg cpu-notifier-error-inject module is not available >&2
- exit 0
- fi
-}
-
-prerequisite_extra
-
-#
-# Offline all hot-pluggable CPUs
-#
-echo 0 > $NOTIFIER_ERR_INJECT_DIR/actions/CPU_DOWN_PREPARE/error
-for cpu in `hotpluggable_online_cpus`; do
- offline_cpu_expect_success $cpu
-done
-
-#
-# Test CPU hot-add error handling (offline => online)
-#
-echo $error > $NOTIFIER_ERR_INJECT_DIR/actions/CPU_UP_PREPARE/error
-for cpu in `hotplaggable_offline_cpus`; do
- online_cpu_expect_fail $cpu
-done
-
-#
-# Online all hot-pluggable CPUs
-#
-echo 0 > $NOTIFIER_ERR_INJECT_DIR/actions/CPU_UP_PREPARE/error
-for cpu in `hotplaggable_offline_cpus`; do
- online_cpu_expect_success $cpu
-done
-
-#
-# Test CPU hot-remove error handling (online => offline)
-#
-echo $error > $NOTIFIER_ERR_INJECT_DIR/actions/CPU_DOWN_PREPARE/error
-for cpu in `hotpluggable_online_cpus`; do
- offline_cpu_expect_fail $cpu
-done
-
-echo 0 > $NOTIFIER_ERR_INJECT_DIR/actions/CPU_DOWN_PREPARE/error
-/sbin/modprobe -q -r cpu-notifier-error-inject
-CC = $(CROSS_COMPILE)gcc
CFLAGS = -Wall
test_objs = open-unlink create-read
all: $(test_objs)
-run_tests: all
- @/bin/bash ./efivarfs.sh || echo "efivarfs selftests: [FAIL]"
+TEST_PROGS := efivarfs.sh
+TEST_FILES := $(test_objs)
+
+include ../lib.mk
clean:
rm -f $(test_objs)
-CC = $(CROSS_COMPILE)gcc
CFLAGS = -Wall
BINARIES = execveat
DEPS = execveat.symlink execveat.denatured script subdir
%: %.c
$(CC) $(CFLAGS) -o $@ $^
-run_tests: all
- ./execveat
+TEST_PROGS := execveat
+TEST_FILES := $(DEPS)
+
+include ../lib.mk
+
+override EMIT_TESTS := echo "mkdir -p subdir; (./execveat && echo \"selftests: execveat [PASS]\") || echo \"selftests: execveat [FAIL]\""
clean:
rm -rf $(BINARIES) $(DEPS) subdir.moved execveat.moved xxxxx*
# No binaries, but make sure arg-less "make" doesn't trigger "run_tests"
all:
-fw_filesystem:
- @if /bin/sh ./fw_filesystem.sh ; then \
- echo "fw_filesystem: ok"; \
- else \
- echo "fw_filesystem: [FAIL]"; \
- exit 1; \
- fi
+TEST_PROGS := fw_filesystem.sh fw_userhelper.sh
-fw_userhelper:
- @if /bin/sh ./fw_userhelper.sh ; then \
- echo "fw_userhelper: ok"; \
- else \
- echo "fw_userhelper: [FAIL]"; \
- exit 1; \
- fi
-
-run_tests: all fw_filesystem fw_userhelper
+include ../lib.mk
# Nothing to clean up.
clean:
-
-.PHONY: all clean run_tests fw_filesystem fw_userhelper
all:
-run_tests:
- @/bin/sh ./ftracetest || echo "ftrace selftests: [FAIL]"
+TEST_PROGS := ftracetest
+
+include ../lib.mk
clean:
rm -rf logs/*
# description: Basic event tracing check
test -f available_events -a -f set_event -a -d events
# check scheduler events are available
-grep -q sched available_events && exit 0 || exit -1
\ No newline at end of file
+grep -q sched available_events && exit 0 || exit $FAIL
fail() { #msg
do_reset
echo $1
- exit -1
+ exit $FAIL
+}
+
+yield() {
+ ping localhost -c 1 || sleep .001 || usleep 1 || sleep 1
}
if [ ! -f set_event -o ! -d events/sched ]; then
do_reset
echo 'sched:sched_switch' > set_event
-usleep 1
+
+yield
count=`cat trace | grep sched_switch | wc -l`
if [ $count -eq 0 ]; then
do_reset
echo 1 > events/sched/sched_switch/enable
-usleep 1
+
+yield
count=`cat trace | grep sched_switch | wc -l`
if [ $count -eq 0 ]; then
do_reset
echo 0 > events/sched/sched_switch/enable
-usleep 1
+
+yield
count=`cat trace | grep sched_switch | wc -l`
if [ $count -ne 0 ]; then
fail() { #msg
do_reset
echo $1
- exit -1
+ exit $FAIL
+}
+
+yield() {
+ ping localhost -c 1 || sleep .001 || usleep 1 || sleep 1
}
if [ ! -f set_event -o ! -d events/sched ]; then
do_reset
echo 'sched:*' > set_event
-usleep 1
+
+yield
count=`cat trace | grep -v ^# | awk '{ print $5 }' | sort -u | wc -l`
if [ $count -lt 3 ]; then
do_reset
echo 1 > events/sched/enable
-usleep 1
+
+yield
count=`cat trace | grep -v ^# | awk '{ print $5 }' | sort -u | wc -l`
if [ $count -lt 3 ]; then
do_reset
echo 0 > events/sched/enable
-usleep 1
+
+yield
count=`cat trace | grep -v ^# | awk '{ print $5 }' | sort -u | wc -l`
if [ $count -ne 0 ]; then
fail() { #msg
do_reset
echo $1
- exit -1
+ exit $FAIL
+}
+
+yield() {
+ ping localhost -c 1 || sleep .001 || usleep 1 || sleep 1
}
if [ ! -f available_events -o ! -f set_event -o ! -d events ]; then
do_reset
echo '*:*' > set_event
+
+yield
+
count=`cat trace | grep -v ^# | wc -l`
if [ $count -eq 0 ]; then
fail "none of events are recorded"
do_reset
echo 1 > events/enable
+
+yield
+
count=`cat trace | grep -v ^# | wc -l`
if [ $count -eq 0 ]; then
fail "none of events are recorded"
do_reset
echo 0 > events/enable
+
+yield
+
count=`cat trace | grep -v ^# | wc -l`
if [ $count -ne 0 ]; then
fail "any of events should not be recorded"
do_reset() {
reset_tracer
- echo 0 > /proc/sys/kernel/stack_tracer_enabled
+ if [ -e /proc/sys/kernel/stack_tracer_enabled ]; then
+ echo 0 > /proc/sys/kernel/stack_tracer_enabled
+ fi
enable_tracing
clear_trace
echo > set_ftrace_filter
fail() { # msg
do_reset
echo $1
- exit -1
+ exit $FAIL
}
disable_tracing
fail() { # msg
do_reset
echo $1
- exit -1
+ exit $FAIL
}
disable_tracing
reset_tracer
echo > set_ftrace_filter
echo $1
- exit -1
+ exit $FAIL
}
echo "Testing function tracer with profiler:"
--- /dev/null
+#!/bin/bash
+#
+# gen_kselftest_tar
+# Generate kselftest tarball
+# Author: Shuah Khan <shuahkh@osg.samsung.com>
+# Copyright (C) 2015 Samsung Electronics Co., Ltd.
+
+# This software may be freely redistributed under the terms of the GNU
+# General Public License (GPLv2).
+
+# main
+main()
+{
+ if [ "$#" -eq 0 ]; then
+ echo "$0: Generating default compression gzip"
+ copts="cvzf"
+ ext=".tar.gz"
+ else
+ case "$1" in
+ tar)
+ copts="cvf"
+ ext=".tar"
+ ;;
+ targz)
+ copts="cvzf"
+ ext=".tar.gz"
+ ;;
+ tarbz2)
+ copts="cvjf"
+ ext=".tar.bz2"
+ ;;
+ tarxz)
+ copts="cvJf"
+ ext=".tar.xz"
+ ;;
+ *)
+ echo "Unknown tarball format $1"
+ exit 1
+ ;;
+ esac
+ fi
+
+ install_dir=./kselftest
+
+# Run install using INSTALL_KSFT_PATH override to generate install
+# directory
+./kselftest_install.sh
+tar $copts kselftest${ext} $install_dir
+echo "Kselftest archive kselftest${ext} created!"
+
+# clean up install directory
+rm -rf kselftest
+}
+
+main "$@"
CFLAGS += -I../../../../usr/include/
all:
-ifeq ($(ARCH),x86)
- gcc $(CFLAGS) msgque.c -o msgque_test
-else
- echo "Not an x86 target, can't build msgque selftest"
-endif
+ $(CC) $(CFLAGS) msgque.c -o msgque_test
+
+TEST_PROGS := msgque_test
-run_tests: all
- ./msgque_test
+include ../lib.mk
clean:
rm -fr ./msgque_test
-CC := $(CROSS_COMPILE)$(CC)
CFLAGS += -I../../../../usr/include/
all: kcmp_test
-run_tests: all
- @./kcmp_test || echo "kcmp_test: [FAIL]"
+TEST_PROGS := kcmp_test
+
+include ../lib.mk
clean:
$(RM) kcmp_test kcmp-test-file
--- /dev/null
+#!/bin/bash
+#
+# Kselftest Install
+# Install kselftest tests
+# Author: Shuah Khan <shuahkh@osg.samsung.com>
+# Copyright (C) 2015 Samsung Electronics Co., Ltd.
+
+# This software may be freely redistributed under the terms of the GNU
+# General Public License (GPLv2).
+
+install_loc=`pwd`
+
+main()
+{
+ if [ $(basename $install_loc) != "selftests" ]; then
+ echo "$0: Please run it in selftests directory ..."
+ exit 1;
+ fi
+ if [ "$#" -eq 0 ]; then
+ echo "$0: Installing in default location - $install_loc ..."
+ elif [ ! -d "$1" ]; then
+ echo "$0: $1 doesn't exist!!"
+ exit 1;
+ else
+ install_loc=$1
+ echo "$0: Installing in specified location - $install_loc ..."
+ fi
+
+ install_dir=$install_loc/kselftest
+
+# Create install directory
+ mkdir -p $install_dir
+# Build tests
+ INSTALL_PATH=$install_dir make install
+}
+
+main "$@"
--- /dev/null
+# This mimics the top-level Makefile. We do it explicitly here so that this
+# Makefile can operate with or without the kbuild infrastructure.
+CC := $(CROSS_COMPILE)gcc
+
+define RUN_TESTS
+ @for TEST in $(TEST_PROGS); do \
+ (./$$TEST && echo "selftests: $$TEST [PASS]") || echo "selftests: $$TEST [FAIL]"; \
+ done;
+endef
+
+run_tests: all
+ $(RUN_TESTS)
+
+define INSTALL_RULE
+ mkdir -p $(INSTALL_PATH)
+ install -t $(INSTALL_PATH) $(TEST_PROGS) $(TEST_PROGS_EXTENDED) $(TEST_FILES)
+endef
+
+install: all
+ifdef INSTALL_PATH
+ $(INSTALL_RULE)
+else
+ $(error Error: set INSTALL_PATH to use install)
+endif
+
+define EMIT_TESTS
+ @for TEST in $(TEST_PROGS); do \
+ echo "(./$$TEST && echo \"selftests: $$TEST [PASS]\") || echo \"selftests: $$TEST [FAIL]\""; \
+ done;
+endef
+
+emit_tests:
+ $(EMIT_TESTS)
+
+.PHONY: run_tests all clean install emit_tests
+CC = $(CROSS_COMPILE)gcc
CFLAGS += -D_FILE_OFFSET_BITS=64
CFLAGS += -I../../../../include/uapi/
CFLAGS += -I../../../../include/
+CFLAGS += -I../../../../usr/include/
all:
- gcc $(CFLAGS) memfd_test.c -o memfd_test
+ $(CC) $(CFLAGS) memfd_test.c -o memfd_test
-run_tests: all
- gcc $(CFLAGS) memfd_test.c -o memfd_test
- @./memfd_test || echo "memfd_test: [FAIL]"
+TEST_PROGS := memfd_test
+
+include ../lib.mk
build_fuse:
- gcc $(CFLAGS) fuse_mnt.c `pkg-config fuse --cflags --libs` -o fuse_mnt
- gcc $(CFLAGS) fuse_test.c -o fuse_test
+ $(CC) $(CFLAGS) fuse_mnt.c `pkg-config fuse --cflags --libs` -o fuse_mnt
+ $(CC) $(CFLAGS) fuse_test.c -o fuse_test
run_fuse: build_fuse
@./run_fuse_test.sh || echo "fuse_test: [FAIL]"
all:
-run_tests:
- @/bin/bash ./on-off-test.sh -r 2 || echo "memory-hotplug selftests: [FAIL]"
+include ../lib.mk
+
+TEST_PROGS := mem-on-off-test.sh
+override RUN_TESTS := ./mem-on-off-test.sh -r 2 || echo "selftests: memory-hotplug [FAIL]"
+override EMIT_TESTS := echo "$(RUN_TESTS)"
run_full_test:
- @/bin/bash ./on-off-test.sh || echo "memory-hotplug selftests: [FAIL]"
+ @/bin/bash ./mem-on-off-test.sh || echo "memory-hotplug selftests: [FAIL]"
clean:
--- /dev/null
+#!/bin/bash
+
+SYSFS=
+
+prerequisite()
+{
+ msg="skip all tests:"
+
+ if [ $UID != 0 ]; then
+ echo $msg must be run as root >&2
+ exit 0
+ fi
+
+ SYSFS=`mount -t sysfs | head -1 | awk '{ print $3 }'`
+
+ if [ ! -d "$SYSFS" ]; then
+ echo $msg sysfs is not mounted >&2
+ exit 0
+ fi
+
+ if ! ls $SYSFS/devices/system/memory/memory* > /dev/null 2>&1; then
+ echo $msg memory hotplug is not supported >&2
+ exit 0
+ fi
+}
+
+#
+# list all hot-pluggable memory
+#
+hotpluggable_memory()
+{
+ local state=${1:-.\*}
+
+ for memory in $SYSFS/devices/system/memory/memory*; do
+ if grep -q 1 $memory/removable &&
+ grep -q $state $memory/state; then
+ echo ${memory##/*/memory}
+ fi
+ done
+}
+
+hotplaggable_offline_memory()
+{
+ hotpluggable_memory offline
+}
+
+hotpluggable_online_memory()
+{
+ hotpluggable_memory online
+}
+
+memory_is_online()
+{
+ grep -q online $SYSFS/devices/system/memory/memory$1/state
+}
+
+memory_is_offline()
+{
+ grep -q offline $SYSFS/devices/system/memory/memory$1/state
+}
+
+online_memory()
+{
+ echo online > $SYSFS/devices/system/memory/memory$1/state
+}
+
+offline_memory()
+{
+ echo offline > $SYSFS/devices/system/memory/memory$1/state
+}
+
+online_memory_expect_success()
+{
+ local memory=$1
+
+ if ! online_memory $memory; then
+ echo $FUNCNAME $memory: unexpected fail >&2
+ elif ! memory_is_online $memory; then
+ echo $FUNCNAME $memory: unexpected offline >&2
+ fi
+}
+
+online_memory_expect_fail()
+{
+ local memory=$1
+
+ if online_memory $memory 2> /dev/null; then
+ echo $FUNCNAME $memory: unexpected success >&2
+ elif ! memory_is_offline $memory; then
+ echo $FUNCNAME $memory: unexpected online >&2
+ fi
+}
+
+offline_memory_expect_success()
+{
+ local memory=$1
+
+ if ! offline_memory $memory; then
+ echo $FUNCNAME $memory: unexpected fail >&2
+ elif ! memory_is_offline $memory; then
+ echo $FUNCNAME $memory: unexpected offline >&2
+ fi
+}
+
+offline_memory_expect_fail()
+{
+ local memory=$1
+
+ if offline_memory $memory 2> /dev/null; then
+ echo $FUNCNAME $memory: unexpected success >&2
+ elif ! memory_is_online $memory; then
+ echo $FUNCNAME $memory: unexpected offline >&2
+ fi
+}
+
+error=-12
+priority=0
+ratio=10
+
+while getopts e:hp:r: opt; do
+ case $opt in
+ e)
+ error=$OPTARG
+ ;;
+ h)
+ echo "Usage $0 [ -e errno ] [ -p notifier-priority ] [ -r percent-of-memory-to-offline ]"
+ exit
+ ;;
+ p)
+ priority=$OPTARG
+ ;;
+ r)
+ ratio=$OPTARG
+ ;;
+ esac
+done
+
+if ! [ "$error" -ge -4095 -a "$error" -lt 0 ]; then
+ echo "error code must be -4095 <= errno < 0" >&2
+ exit 1
+fi
+
+prerequisite
+
+echo "Test scope: $ratio% hotplug memory"
+echo -e "\t online all hotplug memory in offline state"
+echo -e "\t offline $ratio% hotplug memory in online state"
+echo -e "\t online all hotplug memory in offline state"
+
+#
+# Online all hot-pluggable memory
+#
+for memory in `hotplaggable_offline_memory`; do
+ echo offline-online $memory
+ online_memory_expect_success $memory
+done
+
+#
+# Offline $ratio percent of hot-pluggable memory
+#
+for memory in `hotpluggable_online_memory`; do
+ if [ $((RANDOM % 100)) -lt $ratio ]; then
+ echo online-offline $memory
+ offline_memory_expect_success $memory
+ fi
+done
+
+#
+# Online all hot-pluggable memory again
+#
+for memory in `hotplaggable_offline_memory`; do
+ echo offline-online $memory
+ online_memory_expect_success $memory
+done
+
+#
+# Test with memory notifier error injection
+#
+
+DEBUGFS=`mount -t debugfs | head -1 | awk '{ print $3 }'`
+NOTIFIER_ERR_INJECT_DIR=$DEBUGFS/notifier-error-inject/memory
+
+prerequisite_extra()
+{
+ msg="skip extra tests:"
+
+ /sbin/modprobe -q -r memory-notifier-error-inject
+ /sbin/modprobe -q memory-notifier-error-inject priority=$priority
+
+ if [ ! -d "$DEBUGFS" ]; then
+ echo $msg debugfs is not mounted >&2
+ exit 0
+ fi
+
+ if [ ! -d $NOTIFIER_ERR_INJECT_DIR ]; then
+ echo $msg memory-notifier-error-inject module is not available >&2
+ exit 0
+ fi
+}
+
+prerequisite_extra
+
+#
+# Offline $ratio percent of hot-pluggable memory
+#
+echo 0 > $NOTIFIER_ERR_INJECT_DIR/actions/MEM_GOING_OFFLINE/error
+for memory in `hotpluggable_online_memory`; do
+ if [ $((RANDOM % 100)) -lt $ratio ]; then
+ offline_memory_expect_success $memory
+ fi
+done
+
+#
+# Test memory hot-add error handling (offline => online)
+#
+echo $error > $NOTIFIER_ERR_INJECT_DIR/actions/MEM_GOING_ONLINE/error
+for memory in `hotplaggable_offline_memory`; do
+ online_memory_expect_fail $memory
+done
+
+#
+# Online all hot-pluggable memory
+#
+echo 0 > $NOTIFIER_ERR_INJECT_DIR/actions/MEM_GOING_ONLINE/error
+for memory in `hotplaggable_offline_memory`; do
+ online_memory_expect_success $memory
+done
+
+#
+# Test memory hot-remove error handling (online => offline)
+#
+echo $error > $NOTIFIER_ERR_INJECT_DIR/actions/MEM_GOING_OFFLINE/error
+for memory in `hotpluggable_online_memory`; do
+ offline_memory_expect_fail $memory
+done
+
+echo 0 > $NOTIFIER_ERR_INJECT_DIR/actions/MEM_GOING_OFFLINE/error
+/sbin/modprobe -q -r memory-notifier-error-inject
+++ /dev/null
-#!/bin/bash
-
-SYSFS=
-
-prerequisite()
-{
- msg="skip all tests:"
-
- if [ $UID != 0 ]; then
- echo $msg must be run as root >&2
- exit 0
- fi
-
- SYSFS=`mount -t sysfs | head -1 | awk '{ print $3 }'`
-
- if [ ! -d "$SYSFS" ]; then
- echo $msg sysfs is not mounted >&2
- exit 0
- fi
-
- if ! ls $SYSFS/devices/system/memory/memory* > /dev/null 2>&1; then
- echo $msg memory hotplug is not supported >&2
- exit 0
- fi
-}
-
-#
-# list all hot-pluggable memory
-#
-hotpluggable_memory()
-{
- local state=${1:-.\*}
-
- for memory in $SYSFS/devices/system/memory/memory*; do
- if grep -q 1 $memory/removable &&
- grep -q $state $memory/state; then
- echo ${memory##/*/memory}
- fi
- done
-}
-
-hotplaggable_offline_memory()
-{
- hotpluggable_memory offline
-}
-
-hotpluggable_online_memory()
-{
- hotpluggable_memory online
-}
-
-memory_is_online()
-{
- grep -q online $SYSFS/devices/system/memory/memory$1/state
-}
-
-memory_is_offline()
-{
- grep -q offline $SYSFS/devices/system/memory/memory$1/state
-}
-
-online_memory()
-{
- echo online > $SYSFS/devices/system/memory/memory$1/state
-}
-
-offline_memory()
-{
- echo offline > $SYSFS/devices/system/memory/memory$1/state
-}
-
-online_memory_expect_success()
-{
- local memory=$1
-
- if ! online_memory $memory; then
- echo $FUNCNAME $memory: unexpected fail >&2
- elif ! memory_is_online $memory; then
- echo $FUNCNAME $memory: unexpected offline >&2
- fi
-}
-
-online_memory_expect_fail()
-{
- local memory=$1
-
- if online_memory $memory 2> /dev/null; then
- echo $FUNCNAME $memory: unexpected success >&2
- elif ! memory_is_offline $memory; then
- echo $FUNCNAME $memory: unexpected online >&2
- fi
-}
-
-offline_memory_expect_success()
-{
- local memory=$1
-
- if ! offline_memory $memory; then
- echo $FUNCNAME $memory: unexpected fail >&2
- elif ! memory_is_offline $memory; then
- echo $FUNCNAME $memory: unexpected offline >&2
- fi
-}
-
-offline_memory_expect_fail()
-{
- local memory=$1
-
- if offline_memory $memory 2> /dev/null; then
- echo $FUNCNAME $memory: unexpected success >&2
- elif ! memory_is_online $memory; then
- echo $FUNCNAME $memory: unexpected offline >&2
- fi
-}
-
-error=-12
-priority=0
-ratio=10
-
-while getopts e:hp:r: opt; do
- case $opt in
- e)
- error=$OPTARG
- ;;
- h)
- echo "Usage $0 [ -e errno ] [ -p notifier-priority ] [ -r percent-of-memory-to-offline ]"
- exit
- ;;
- p)
- priority=$OPTARG
- ;;
- r)
- ratio=$OPTARG
- ;;
- esac
-done
-
-if ! [ "$error" -ge -4095 -a "$error" -lt 0 ]; then
- echo "error code must be -4095 <= errno < 0" >&2
- exit 1
-fi
-
-prerequisite
-
-echo "Test scope: $ratio% hotplug memory"
-echo -e "\t online all hotplug memory in offline state"
-echo -e "\t offline $ratio% hotplug memory in online state"
-echo -e "\t online all hotplug memory in offline state"
-
-#
-# Online all hot-pluggable memory
-#
-for memory in `hotplaggable_offline_memory`; do
- echo offline-online $memory
- online_memory_expect_success $memory
-done
-
-#
-# Offline $ratio percent of hot-pluggable memory
-#
-for memory in `hotpluggable_online_memory`; do
- if [ $((RANDOM % 100)) -lt $ratio ]; then
- echo online-offline $memory
- offline_memory_expect_success $memory
- fi
-done
-
-#
-# Online all hot-pluggable memory again
-#
-for memory in `hotplaggable_offline_memory`; do
- echo offline-online $memory
- online_memory_expect_success $memory
-done
-
-#
-# Test with memory notifier error injection
-#
-
-DEBUGFS=`mount -t debugfs | head -1 | awk '{ print $3 }'`
-NOTIFIER_ERR_INJECT_DIR=$DEBUGFS/notifier-error-inject/memory
-
-prerequisite_extra()
-{
- msg="skip extra tests:"
-
- /sbin/modprobe -q -r memory-notifier-error-inject
- /sbin/modprobe -q memory-notifier-error-inject priority=$priority
-
- if [ ! -d "$DEBUGFS" ]; then
- echo $msg debugfs is not mounted >&2
- exit 0
- fi
-
- if [ ! -d $NOTIFIER_ERR_INJECT_DIR ]; then
- echo $msg memory-notifier-error-inject module is not available >&2
- exit 0
- fi
-}
-
-prerequisite_extra
-
-#
-# Offline $ratio percent of hot-pluggable memory
-#
-echo 0 > $NOTIFIER_ERR_INJECT_DIR/actions/MEM_GOING_OFFLINE/error
-for memory in `hotpluggable_online_memory`; do
- if [ $((RANDOM % 100)) -lt $ratio ]; then
- offline_memory_expect_success $memory
- fi
-done
-
-#
-# Test memory hot-add error handling (offline => online)
-#
-echo $error > $NOTIFIER_ERR_INJECT_DIR/actions/MEM_GOING_ONLINE/error
-for memory in `hotplaggable_offline_memory`; do
- online_memory_expect_fail $memory
-done
-
-#
-# Online all hot-pluggable memory
-#
-echo 0 > $NOTIFIER_ERR_INJECT_DIR/actions/MEM_GOING_ONLINE/error
-for memory in `hotplaggable_offline_memory`; do
- online_memory_expect_success $memory
-done
-
-#
-# Test memory hot-remove error handling (online => offline)
-#
-echo $error > $NOTIFIER_ERR_INJECT_DIR/actions/MEM_GOING_OFFLINE/error
-for memory in `hotpluggable_online_memory`; do
- offline_memory_expect_fail $memory
-done
-
-echo 0 > $NOTIFIER_ERR_INJECT_DIR/actions/MEM_GOING_OFFLINE/error
-/sbin/modprobe -q -r memory-notifier-error-inject
--- /dev/null
+unprivileged-remount-test
# Makefile for mount selftests.
-
+CFLAGS = -Wall \
+ -O2
all: unprivileged-remount-test
unprivileged-remount-test: unprivileged-remount-test.c
- gcc -Wall -O2 unprivileged-remount-test.c -o unprivileged-remount-test
+ $(CC) $(CFLAGS) unprivileged-remount-test.c -o unprivileged-remount-test
-# Allow specific tests to be selected.
-test_unprivileged_remount: unprivileged-remount-test
- @if [ -f /proc/self/uid_map ] ; then ./unprivileged-remount-test ; fi
+include ../lib.mk
-run_tests: all test_unprivileged_remount
+TEST_PROGS := unprivileged-remount-test
+override RUN_TESTS := if [ -f /proc/self/uid_map ] ; then ./unprivileged-remount-test ; fi
+override EMIT_TESTS := echo "$(RUN_TESTS)"
clean:
rm -f unprivileged-remount-test
-
-.PHONY: all test_unprivileged_remount
+CFLAGS = -O2
+
all:
- gcc -O2 mq_open_tests.c -o mq_open_tests -lrt
- gcc -O2 -o mq_perf_tests mq_perf_tests.c -lrt -lpthread -lpopt
+ $(CC) $(CFLAGS) mq_open_tests.c -o mq_open_tests -lrt
+ $(CC) $(CFLAGS) -o mq_perf_tests mq_perf_tests.c -lrt -lpthread -lpopt
+
+include ../lib.mk
+
+override define RUN_TESTS
+ @./mq_open_tests /test1 || echo "selftests: mq_open_tests [FAIL]"
+ @./mq_perf_tests || echo "selftests: mq_perf_tests [FAIL]"
+endef
+
+TEST_PROGS := mq_open_tests mq_perf_tests
-run_tests:
- @./mq_open_tests /test1 || echo "mq_open_tests: [FAIL]"
- @./mq_perf_tests || echo "mq_perf_tests: [FAIL]"
+override define EMIT_TESTS
+ echo "./mq_open_tests /test1 || echo \"selftests: mq_open_tests [FAIL]\""
+ echo "./mq_perf_tests || echo \"selftests: mq_perf_tests [FAIL]\""
+endef
clean:
rm -f mq_open_tests mq_perf_tests
# Makefile for net selftests
-CC = $(CROSS_COMPILE)gcc
CFLAGS = -Wall -O2 -g
CFLAGS += -I../../../../usr/include/
%: %.c
$(CC) $(CFLAGS) -o $@ $^
-run_tests: all
- @/bin/sh ./run_netsocktests || echo "sockettests: [FAIL]"
- @/bin/sh ./run_afpackettests || echo "afpackettests: [FAIL]"
- ./test_bpf.sh
+TEST_PROGS := run_netsocktests run_afpackettests test_bpf.sh
+TEST_FILES := $(NET_PROGS)
+
+include ../lib.mk
+
clean:
$(RM) $(NET_PROGS)
GIT_VERSION = $(shell git describe --always --long --dirty || echo "unknown")
-CC := $(CROSS_COMPILE)$(CC)
CFLAGS := -Wall -O2 -flto -Wall -Werror -DGIT_VERSION='"$(GIT_VERSION)"' -I$(CURDIR) $(CFLAGS)
-export CC CFLAGS
+export CFLAGS
TARGETS = pmu copyloops mm tm primitives stringloops
$(TARGETS):
$(MAKE) -k -C $@ all
-run_tests: all
+include ../lib.mk
+
+override define RUN_TESTS
@for TARGET in $(TARGETS); do \
$(MAKE) -C $$TARGET run_tests; \
done;
+endef
+
+override define INSTALL_RULE
+ @for TARGET in $(TARGETS); do \
+ $(MAKE) -C $$TARGET install; \
+ done;
+endef
+
+override define EMIT_TESTS
+ @for TARGET in $(TARGETS); do \
+ $(MAKE) -s -C $$TARGET emit_tests; \
+ done;
+endef
clean:
@for TARGET in $(TARGETS); do \
tags:
find . -name '*.c' -o -name '*.h' | xargs ctags
-.PHONY: all run_tests clean tags $(TARGETS)
+.PHONY: tags $(TARGETS)
# Use our CFLAGS for the implicit .S rule
ASFLAGS = $(CFLAGS)
-PROGS := copyuser_64 copyuser_power7 memcpy_64 memcpy_power7
+TEST_PROGS := copyuser_64 copyuser_power7 memcpy_64 memcpy_power7
EXTRA_SOURCES := validate.c ../harness.c
-all: $(PROGS)
+all: $(TEST_PROGS)
copyuser_64: CPPFLAGS += -D COPY_LOOP=test___copy_tofrom_user_base
copyuser_power7: CPPFLAGS += -D COPY_LOOP=test___copy_tofrom_user_power7
memcpy_64: CPPFLAGS += -D COPY_LOOP=test_memcpy
memcpy_power7: CPPFLAGS += -D COPY_LOOP=test_memcpy_power7
-$(PROGS): $(EXTRA_SOURCES)
+$(TEST_PROGS): $(EXTRA_SOURCES)
-run_tests: all
- @-for PROG in $(PROGS); do \
- ./$$PROG; \
- done;
+include ../../lib.mk
clean:
- rm -f $(PROGS) *.o
-
-.PHONY: all run_tests clean
+ rm -f $(TEST_PROGS) *.o
noarg:
$(MAKE) -C ../
-PROGS := hugetlb_vs_thp_test subpage_prot
+TEST_PROGS := hugetlb_vs_thp_test subpage_prot
-all: $(PROGS) tempfile
+all: $(TEST_PROGS) tempfile
-$(PROGS): ../harness.c
+$(TEST_PROGS): ../harness.c
-run_tests: all
- @-for PROG in $(PROGS); do \
- ./$$PROG; \
- done;
+include ../../lib.mk
tempfile:
dd if=/dev/zero of=tempfile bs=64k count=1
clean:
- rm -f $(PROGS) tempfile
-
-.PHONY: all run_tests clean
+ rm -f $(TEST_PROGS) tempfile
noarg:
$(MAKE) -C ../
-PROGS := count_instructions l3_bank_test per_event_excludes
+TEST_PROGS := count_instructions l3_bank_test per_event_excludes
EXTRA_SOURCES := ../harness.c event.c lib.c
-SUB_TARGETS = ebb
+all: $(TEST_PROGS) ebb
-all: $(PROGS) $(SUB_TARGETS)
-
-$(PROGS): $(EXTRA_SOURCES)
+$(TEST_PROGS): $(EXTRA_SOURCES)
# loop.S can only be built 64-bit
count_instructions: loop.S count_instructions.c $(EXTRA_SOURCES)
$(CC) $(CFLAGS) -m64 -o $@ $^
-run_tests: all sub_run_tests
- @-for PROG in $(PROGS); do \
- ./$$PROG; \
- done;
+include ../../lib.mk
-clean: sub_clean
- rm -f $(PROGS) loop.o
+DEFAULT_RUN_TESTS := $(RUN_TESTS)
+override define RUN_TESTS
+ $(DEFAULT_RUN_TESTS)
+ $(MAKE) -C ebb run_tests
+endef
-$(SUB_TARGETS):
- $(MAKE) -k -C $@ all
+DEFAULT_EMIT_TESTS := $(EMIT_TESTS)
+override define EMIT_TESTS
+ $(DEFAULT_EMIT_TESTS)
+ $(MAKE) -s -C ebb emit_tests
+endef
-sub_run_tests: all
- @for TARGET in $(SUB_TARGETS); do \
- $(MAKE) -C $$TARGET run_tests; \
- done;
+DEFAULT_INSTALL := $(INSTALL_RULE)
+override define INSTALL_RULE
+ $(DEFAULT_INSTALL_RULE)
+ $(MAKE) -C ebb install
+endef
-sub_clean:
- @for TARGET in $(SUB_TARGETS); do \
- $(MAKE) -C $$TARGET clean; \
- done;
+clean:
+ rm -f $(TEST_PROGS) loop.o
+ $(MAKE) -C ebb clean
+
+ebb:
+ $(MAKE) -k -C $@ all
-.PHONY: all run_tests clean sub_run_tests sub_clean $(SUB_TARGETS)
+.PHONY: all run_tests clean ebb
# The EBB handler is 64-bit code and everything links against it
CFLAGS += -m64
-PROGS := reg_access_test event_attributes_test cycles_test \
+TEST_PROGS := reg_access_test event_attributes_test cycles_test \
cycles_with_freeze_test pmc56_overflow_test \
ebb_vs_cpu_event_test cpu_event_vs_ebb_test \
cpu_event_pinned_vs_ebb_test task_event_vs_ebb_test \
lost_exception_test no_handler_test \
cycles_with_mmcr2_test
-all: $(PROGS)
+all: $(TEST_PROGS)
-$(PROGS): ../../harness.c ../event.c ../lib.c ebb.c ebb_handler.S trace.c busy_loop.S
+$(TEST_PROGS): ../../harness.c ../event.c ../lib.c ebb.c ebb_handler.S trace.c busy_loop.S
instruction_count_test: ../loop.S
lost_exception_test: ../lib.c
-run_tests: all
- @-for PROG in $(PROGS); do \
- ./$$PROG; \
- done;
+include ../../../lib.mk
clean:
- rm -f $(PROGS)
+ rm -f $(TEST_PROGS)
CFLAGS += -I$(CURDIR)
-PROGS := load_unaligned_zeropad
+TEST_PROGS := load_unaligned_zeropad
-all: $(PROGS)
+all: $(TEST_PROGS)
-$(PROGS): ../harness.c
+$(TEST_PROGS): ../harness.c
-run_tests: all
- @-for PROG in $(PROGS); do \
- ./$$PROG; \
- done;
+include ../../lib.mk
clean:
- rm -f $(PROGS) *.o
-
-.PHONY: all run_tests clean
+ rm -f $(TEST_PROGS) *.o
CFLAGS += -m64
CFLAGS += -I$(CURDIR)
-PROGS := memcmp
+TEST_PROGS := memcmp
EXTRA_SOURCES := memcmp_64.S ../harness.c
-all: $(PROGS)
+all: $(TEST_PROGS)
-$(PROGS): $(EXTRA_SOURCES)
+$(TEST_PROGS): $(EXTRA_SOURCES)
-run_tests: all
- @-for PROG in $(PROGS); do \
- ./$$PROG; \
- done;
+include ../../lib.mk
clean:
- rm -f $(PROGS) *.o
-
-.PHONY: all run_tests clean
+ rm -f $(TEST_PROGS) *.o
-PROGS := tm-resched-dscr
+TEST_PROGS := tm-resched-dscr
-all: $(PROGS)
+all: $(TEST_PROGS)
-$(PROGS): ../harness.c
+$(TEST_PROGS): ../harness.c
-run_tests: all
- @-for PROG in $(PROGS); do \
- ./$$PROG; \
- done;
+include ../../lib.mk
clean:
- rm -f $(PROGS) *.o
-
-.PHONY: all run_tests clean
+ rm -f $(TEST_PROGS) *.o
clean:
rm -f peeksiginfo
-run_tests: all
- @./peeksiginfo || echo "peeksiginfo selftests: [FAIL]"
+TEST_PROGS := peeksiginfo
+
+include ../lib.mk
cfr[jn] = cf[j] "." cfrep[cf[j]];
}
if (cpusr[jn] > ncpus && ncpus != 0)
- ovf = "(!)";
+ ovf = "-ovf";
else
ovf = "";
print "echo ", cfr[jn], cpusr[jn] ovf ": Starting build. `date`";
CONFIG_RCU_TORTURE_TEST=y
CONFIG_PRINTK_TIME=y
+CONFIG_RCU_TORTURE_TEST_SLOW_INIT=y
-CC = $(CROSS_COMPILE)gcc
-
all: get_size
get_size: get_size.c
$(CC) -static -ffreestanding -nostartfiles -s $< -o $@
-run_tests: all
- ./get_size
+TEST_PROGS := get_size
+
+include ../lib.mk
clean:
$(RM) get_size
# No binaries, but make sure arg-less "make" doesn't trigger "run_tests".
all:
-# Allow specific tests to be selected.
-test_num:
- @/bin/sh ./run_numerictests
+TEST_PROGS := run_numerictests run_stringtests
+TEST_FILES := common_tests
-test_string:
- @/bin/sh ./run_stringtests
-
-run_tests: all test_num test_string
+include ../lib.mk
# Nothing to clean up.
clean:
-
-.PHONY: all run_tests clean test_num test_string
-all:
- gcc posix_timers.c -o posix_timers -lrt
+CC = $(CROSS_COMPILE)gcc
+BUILD_FLAGS = -DKTEST
+CFLAGS += -O3 -Wl,-no-as-needed -Wall $(BUILD_FLAGS)
+LDFLAGS += -lrt -lpthread
-run_tests: all
- ./posix_timers
+# these are all "safe" tests that don't modify
+# system time or require escalated privledges
+TEST_PROGS = posix_timers nanosleep nsleep-lat set-timer-lat mqueue-lat \
+ inconsistency-check raw_skew threadtest rtctest
+
+TEST_PROGS_EXTENDED = alarmtimer-suspend valid-adjtimex change_skew \
+ skew_consistency clocksource-switch leap-a-day \
+ leapcrash set-tai set-2038
+
+bins = $(TEST_PROGS) $(TEST_PROGS_EXTENDED)
+
+all: ${bins}
+
+include ../lib.mk
+
+# these tests require escalated privledges
+# and may modify the system time or trigger
+# other behavior like suspend
+run_destructive_tests: run_tests
+ ./alarmtimer-suspend
+ ./valid-adjtimex
+ ./change_skew
+ ./skew_consistency
+ ./clocksource-switch
+ ./leap-a-day -s -i 10
+ ./leapcrash
+ ./set-tai
+ ./set-2038
clean:
- rm -f ./posix_timers
+ rm -f ${bins}
--- /dev/null
+/* alarmtimer suspend test
+ * John Stultz (john.stultz@linaro.org)
+ * (C) Copyright Linaro 2013
+ * Licensed under the GPLv2
+ *
+ * This test makes sure the alarmtimer & RTC wakeup code is
+ * functioning.
+ *
+ * To build:
+ * $ gcc alarmtimer-suspend.c -o alarmtimer-suspend -lrt
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+#include <stdio.h>
+#include <unistd.h>
+#include <time.h>
+#include <string.h>
+#include <signal.h>
+#include <stdlib.h>
+#include <pthread.h>
+#ifdef KTEST
+#include "../kselftest.h"
+#else
+static inline int ksft_exit_pass(void)
+{
+ exit(0);
+}
+static inline int ksft_exit_fail(void)
+{
+ exit(1);
+}
+#endif
+
+#define CLOCK_REALTIME 0
+#define CLOCK_MONOTONIC 1
+#define CLOCK_PROCESS_CPUTIME_ID 2
+#define CLOCK_THREAD_CPUTIME_ID 3
+#define CLOCK_MONOTONIC_RAW 4
+#define CLOCK_REALTIME_COARSE 5
+#define CLOCK_MONOTONIC_COARSE 6
+#define CLOCK_BOOTTIME 7
+#define CLOCK_REALTIME_ALARM 8
+#define CLOCK_BOOTTIME_ALARM 9
+#define CLOCK_HWSPECIFIC 10
+#define CLOCK_TAI 11
+#define NR_CLOCKIDS 12
+
+
+#define NSEC_PER_SEC 1000000000ULL
+#define UNREASONABLE_LAT (NSEC_PER_SEC * 4) /* hopefully we resume in 4secs */
+
+#define SUSPEND_SECS 15
+int alarmcount;
+int alarm_clock_id;
+struct timespec start_time;
+
+
+char *clockstring(int clockid)
+{
+ switch (clockid) {
+ case CLOCK_REALTIME:
+ return "CLOCK_REALTIME";
+ case CLOCK_MONOTONIC:
+ return "CLOCK_MONOTONIC";
+ case CLOCK_PROCESS_CPUTIME_ID:
+ return "CLOCK_PROCESS_CPUTIME_ID";
+ case CLOCK_THREAD_CPUTIME_ID:
+ return "CLOCK_THREAD_CPUTIME_ID";
+ case CLOCK_MONOTONIC_RAW:
+ return "CLOCK_MONOTONIC_RAW";
+ case CLOCK_REALTIME_COARSE:
+ return "CLOCK_REALTIME_COARSE";
+ case CLOCK_MONOTONIC_COARSE:
+ return "CLOCK_MONOTONIC_COARSE";
+ case CLOCK_BOOTTIME:
+ return "CLOCK_BOOTTIME";
+ case CLOCK_REALTIME_ALARM:
+ return "CLOCK_REALTIME_ALARM";
+ case CLOCK_BOOTTIME_ALARM:
+ return "CLOCK_BOOTTIME_ALARM";
+ case CLOCK_TAI:
+ return "CLOCK_TAI";
+ };
+ return "UNKNOWN_CLOCKID";
+}
+
+
+long long timespec_sub(struct timespec a, struct timespec b)
+{
+ long long ret = NSEC_PER_SEC * b.tv_sec + b.tv_nsec;
+
+ ret -= NSEC_PER_SEC * a.tv_sec + a.tv_nsec;
+ return ret;
+}
+
+int final_ret = 0;
+
+void sigalarm(int signo)
+{
+ long long delta_ns;
+ struct timespec ts;
+
+ clock_gettime(alarm_clock_id, &ts);
+ alarmcount++;
+
+ delta_ns = timespec_sub(start_time, ts);
+ delta_ns -= NSEC_PER_SEC * SUSPEND_SECS * alarmcount;
+
+ printf("ALARM(%i): %ld:%ld latency: %lld ns ", alarmcount, ts.tv_sec,
+ ts.tv_nsec, delta_ns);
+
+ if (delta_ns > UNREASONABLE_LAT) {
+ printf("[FAIL]\n");
+ final_ret = -1;
+ } else
+ printf("[OK]\n");
+
+}
+
+int main(void)
+{
+ timer_t tm1;
+ struct itimerspec its1, its2;
+ struct sigevent se;
+ struct sigaction act;
+ int signum = SIGRTMAX;
+
+ /* Set up signal handler: */
+ sigfillset(&act.sa_mask);
+ act.sa_flags = 0;
+ act.sa_handler = sigalarm;
+ sigaction(signum, &act, NULL);
+
+ /* Set up timer: */
+ memset(&se, 0, sizeof(se));
+ se.sigev_notify = SIGEV_SIGNAL;
+ se.sigev_signo = signum;
+ se.sigev_value.sival_int = 0;
+
+ for (alarm_clock_id = CLOCK_REALTIME_ALARM;
+ alarm_clock_id <= CLOCK_BOOTTIME_ALARM;
+ alarm_clock_id++) {
+
+ alarmcount = 0;
+ timer_create(alarm_clock_id, &se, &tm1);
+
+ clock_gettime(alarm_clock_id, &start_time);
+ printf("Start time (%s): %ld:%ld\n", clockstring(alarm_clock_id),
+ start_time.tv_sec, start_time.tv_nsec);
+ printf("Setting alarm for every %i seconds\n", SUSPEND_SECS);
+ its1.it_value = start_time;
+ its1.it_value.tv_sec += SUSPEND_SECS;
+ its1.it_interval.tv_sec = SUSPEND_SECS;
+ its1.it_interval.tv_nsec = 0;
+
+ timer_settime(tm1, TIMER_ABSTIME, &its1, &its2);
+
+ while (alarmcount < 5)
+ sleep(1); /* First 5 alarms, do nothing */
+
+ printf("Starting suspend loops\n");
+ while (alarmcount < 10) {
+ int ret;
+
+ sleep(1);
+ ret = system("echo mem > /sys/power/state");
+ if (ret)
+ break;
+ }
+ timer_delete(tm1);
+ }
+ if (final_ret)
+ return ksft_exit_fail();
+ return ksft_exit_pass();
+}
--- /dev/null
+/* ADJ_FREQ Skew change test
+ * by: john stultz (johnstul@us.ibm.com)
+ * (C) Copyright IBM 2012
+ * Licensed under the GPLv2
+ *
+ * NOTE: This is a meta-test which cranks the ADJ_FREQ knob and
+ * then uses other tests to detect problems. Thus this test requires
+ * that the raw_skew, inconsistency-check and nanosleep tests be
+ * present in the same directory it is run from.
+ *
+ * To build:
+ * $ gcc change_skew.c -o change_skew -lrt
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/time.h>
+#include <sys/timex.h>
+#include <time.h>
+#ifdef KTEST
+#include "../kselftest.h"
+#else
+static inline int ksft_exit_pass(void)
+{
+ exit(0);
+}
+static inline int ksft_exit_fail(void)
+{
+ exit(1);
+}
+#endif
+
+#define NSEC_PER_SEC 1000000000LL
+
+
+int change_skew_test(int ppm)
+{
+ struct timex tx;
+ int ret;
+
+ tx.modes = ADJ_FREQUENCY;
+ tx.freq = ppm << 16;
+
+ ret = adjtimex(&tx);
+ if (ret < 0) {
+ printf("Error adjusting freq\n");
+ return ret;
+ }
+
+ ret = system("./raw_skew");
+ ret |= system("./inconsistency-check");
+ ret |= system("./nanosleep");
+
+ return ret;
+}
+
+
+int main(int argv, char **argc)
+{
+ struct timex tx;
+ int i, ret;
+
+ int ppm[5] = {0, 250, 500, -250, -500};
+
+ /* Kill ntpd */
+ ret = system("killall -9 ntpd");
+
+ /* Make sure there's no offset adjustment going on */
+ tx.modes = ADJ_OFFSET;
+ tx.offset = 0;
+ ret = adjtimex(&tx);
+
+ if (ret < 0) {
+ printf("Maybe you're not running as root?\n");
+ return -1;
+ }
+
+ for (i = 0; i < 5; i++) {
+ printf("Using %i ppm adjustment\n", ppm[i]);
+ ret = change_skew_test(ppm[i]);
+ if (ret)
+ break;
+ }
+
+ /* Set things back */
+ tx.modes = ADJ_FREQUENCY;
+ tx.offset = 0;
+ adjtimex(&tx);
+
+ if (ret) {
+ printf("[FAIL]");
+ return ksft_exit_fail();
+ }
+ printf("[OK]");
+ return ksft_exit_pass();
+}
--- /dev/null
+/* Clocksource change test
+ * by: john stultz (johnstul@us.ibm.com)
+ * (C) Copyright IBM 2012
+ * Licensed under the GPLv2
+ *
+ * NOTE: This is a meta-test which quickly changes the clocksourc and
+ * then uses other tests to detect problems. Thus this test requires
+ * that the inconsistency-check and nanosleep tests be present in the
+ * same directory it is run from.
+ *
+ * To build:
+ * $ gcc clocksource-switch.c -o clocksource-switch -lrt
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+#include <stdio.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include <sys/time.h>
+#include <sys/timex.h>
+#include <time.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <string.h>
+#include <sys/wait.h>
+#ifdef KTEST
+#include "../kselftest.h"
+#else
+static inline int ksft_exit_pass(void)
+{
+ exit(0);
+}
+static inline int ksft_exit_fail(void)
+{
+ exit(1);
+}
+#endif
+
+
+int get_clocksources(char list[][30])
+{
+ int fd, i;
+ size_t size;
+ char buf[512];
+ char *head, *tmp;
+
+ fd = open("/sys/devices/system/clocksource/clocksource0/available_clocksource", O_RDONLY);
+
+ size = read(fd, buf, 512);
+
+ close(fd);
+
+ for (i = 0; i < 30; i++)
+ list[i][0] = '\0';
+
+ head = buf;
+ i = 0;
+ while (head - buf < size) {
+ /* Find the next space */
+ for (tmp = head; *tmp != ' '; tmp++) {
+ if (*tmp == '\n')
+ break;
+ if (*tmp == '\0')
+ break;
+ }
+ *tmp = '\0';
+ strcpy(list[i], head);
+ head = tmp + 1;
+ i++;
+ }
+
+ return i-1;
+}
+
+int get_cur_clocksource(char *buf, size_t size)
+{
+ int fd;
+
+ fd = open("/sys/devices/system/clocksource/clocksource0/current_clocksource", O_RDONLY);
+
+ size = read(fd, buf, size);
+
+ return 0;
+}
+
+int change_clocksource(char *clocksource)
+{
+ int fd;
+ size_t size;
+
+ fd = open("/sys/devices/system/clocksource/clocksource0/current_clocksource", O_WRONLY);
+
+ if (fd < 0)
+ return -1;
+
+ size = write(fd, clocksource, strlen(clocksource));
+
+ if (size < 0)
+ return -1;
+
+ close(fd);
+ return 0;
+}
+
+
+int run_tests(int secs)
+{
+ int ret;
+ char buf[255];
+
+ sprintf(buf, "./inconsistency-check -t %i", secs);
+ ret = system(buf);
+ if (ret)
+ return ret;
+ ret = system("./nanosleep");
+ return ret;
+}
+
+
+char clocksource_list[10][30];
+
+int main(int argv, char **argc)
+{
+ char orig_clk[512];
+ int count, i, status;
+ pid_t pid;
+
+ get_cur_clocksource(orig_clk, 512);
+
+ count = get_clocksources(clocksource_list);
+
+ if (change_clocksource(clocksource_list[0])) {
+ printf("Error: You probably need to run this as root\n");
+ return -1;
+ }
+
+ /* Check everything is sane before we start switching asyncrhonously */
+ for (i = 0; i < count; i++) {
+ printf("Validating clocksource %s\n", clocksource_list[i]);
+ if (change_clocksource(clocksource_list[i])) {
+ status = -1;
+ goto out;
+ }
+ if (run_tests(5)) {
+ status = -1;
+ goto out;
+ }
+ }
+
+
+ printf("Running Asyncrhonous Switching Tests...\n");
+ pid = fork();
+ if (!pid)
+ return run_tests(60);
+
+ while (pid != waitpid(pid, &status, WNOHANG))
+ for (i = 0; i < count; i++)
+ if (change_clocksource(clocksource_list[i])) {
+ status = -1;
+ goto out;
+ }
+out:
+ change_clocksource(orig_clk);
+
+ if (status)
+ return ksft_exit_fail();
+ return ksft_exit_pass();
+}
--- /dev/null
+/* Time inconsistency check test
+ * by: john stultz (johnstul@us.ibm.com)
+ * (C) Copyright IBM 2003, 2004, 2005, 2012
+ * (C) Copyright Linaro Limited 2015
+ * Licensed under the GPLv2
+ *
+ * To build:
+ * $ gcc inconsistency-check.c -o inconsistency-check -lrt
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+
+#include <stdio.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/timex.h>
+#include <string.h>
+#include <signal.h>
+#ifdef KTEST
+#include "../kselftest.h"
+#else
+static inline int ksft_exit_pass(void)
+{
+ exit(0);
+}
+static inline int ksft_exit_fail(void)
+{
+ exit(1);
+}
+#endif
+
+#define CALLS_PER_LOOP 64
+#define NSEC_PER_SEC 1000000000ULL
+
+#define CLOCK_REALTIME 0
+#define CLOCK_MONOTONIC 1
+#define CLOCK_PROCESS_CPUTIME_ID 2
+#define CLOCK_THREAD_CPUTIME_ID 3
+#define CLOCK_MONOTONIC_RAW 4
+#define CLOCK_REALTIME_COARSE 5
+#define CLOCK_MONOTONIC_COARSE 6
+#define CLOCK_BOOTTIME 7
+#define CLOCK_REALTIME_ALARM 8
+#define CLOCK_BOOTTIME_ALARM 9
+#define CLOCK_HWSPECIFIC 10
+#define CLOCK_TAI 11
+#define NR_CLOCKIDS 12
+
+char *clockstring(int clockid)
+{
+ switch (clockid) {
+ case CLOCK_REALTIME:
+ return "CLOCK_REALTIME";
+ case CLOCK_MONOTONIC:
+ return "CLOCK_MONOTONIC";
+ case CLOCK_PROCESS_CPUTIME_ID:
+ return "CLOCK_PROCESS_CPUTIME_ID";
+ case CLOCK_THREAD_CPUTIME_ID:
+ return "CLOCK_THREAD_CPUTIME_ID";
+ case CLOCK_MONOTONIC_RAW:
+ return "CLOCK_MONOTONIC_RAW";
+ case CLOCK_REALTIME_COARSE:
+ return "CLOCK_REALTIME_COARSE";
+ case CLOCK_MONOTONIC_COARSE:
+ return "CLOCK_MONOTONIC_COARSE";
+ case CLOCK_BOOTTIME:
+ return "CLOCK_BOOTTIME";
+ case CLOCK_REALTIME_ALARM:
+ return "CLOCK_REALTIME_ALARM";
+ case CLOCK_BOOTTIME_ALARM:
+ return "CLOCK_BOOTTIME_ALARM";
+ case CLOCK_TAI:
+ return "CLOCK_TAI";
+ };
+ return "UNKNOWN_CLOCKID";
+}
+
+/* returns 1 if a <= b, 0 otherwise */
+static inline int in_order(struct timespec a, struct timespec b)
+{
+ /* use unsigned to avoid false positives on 2038 rollover */
+ if ((unsigned long)a.tv_sec < (unsigned long)b.tv_sec)
+ return 1;
+ if ((unsigned long)a.tv_sec > (unsigned long)b.tv_sec)
+ return 0;
+ if (a.tv_nsec > b.tv_nsec)
+ return 0;
+ return 1;
+}
+
+
+
+int consistency_test(int clock_type, unsigned long seconds)
+{
+ struct timespec list[CALLS_PER_LOOP];
+ int i, inconsistent;
+ long now, then;
+ time_t t;
+ char *start_str;
+
+ clock_gettime(clock_type, &list[0]);
+ now = then = list[0].tv_sec;
+
+ /* timestamp start of test */
+ t = time(0);
+ start_str = ctime(&t);
+
+ while (seconds == -1 || now - then < seconds) {
+ inconsistent = 0;
+
+ /* Fill list */
+ for (i = 0; i < CALLS_PER_LOOP; i++)
+ clock_gettime(clock_type, &list[i]);
+
+ /* Check for inconsistencies */
+ for (i = 0; i < CALLS_PER_LOOP - 1; i++)
+ if (!in_order(list[i], list[i+1]))
+ inconsistent = i;
+
+ /* display inconsistency */
+ if (inconsistent) {
+ unsigned long long delta;
+
+ printf("\%s\n", start_str);
+ for (i = 0; i < CALLS_PER_LOOP; i++) {
+ if (i == inconsistent)
+ printf("--------------------\n");
+ printf("%lu:%lu\n", list[i].tv_sec,
+ list[i].tv_nsec);
+ if (i == inconsistent + 1)
+ printf("--------------------\n");
+ }
+ delta = list[inconsistent].tv_sec * NSEC_PER_SEC;
+ delta += list[inconsistent].tv_nsec;
+ delta -= list[inconsistent+1].tv_sec * NSEC_PER_SEC;
+ delta -= list[inconsistent+1].tv_nsec;
+ printf("Delta: %llu ns\n", delta);
+ fflush(0);
+ /* timestamp inconsistency*/
+ t = time(0);
+ printf("%s\n", ctime(&t));
+ printf("[FAILED]\n");
+ return -1;
+ }
+ now = list[0].tv_sec;
+ }
+ printf("[OK]\n");
+ return 0;
+}
+
+
+int main(int argc, char *argv[])
+{
+ int clockid, opt;
+ int userclock = CLOCK_REALTIME;
+ int maxclocks = NR_CLOCKIDS;
+ int runtime = 10;
+ struct timespec ts;
+
+ /* Process arguments */
+ while ((opt = getopt(argc, argv, "t:c:")) != -1) {
+ switch (opt) {
+ case 't':
+ runtime = atoi(optarg);
+ break;
+ case 'c':
+ userclock = atoi(optarg);
+ maxclocks = userclock + 1;
+ break;
+ default:
+ printf("Usage: %s [-t <secs>] [-c <clockid>]\n", argv[0]);
+ printf(" -t: Number of seconds to run\n");
+ printf(" -c: clockid to use (default, all clockids)\n");
+ exit(-1);
+ }
+ }
+
+ setbuf(stdout, NULL);
+
+ for (clockid = userclock; clockid < maxclocks; clockid++) {
+
+ if (clockid == CLOCK_HWSPECIFIC)
+ continue;
+
+ if (!clock_gettime(clockid, &ts)) {
+ printf("Consistent %-30s ", clockstring(clockid));
+ if (consistency_test(clockid, runtime))
+ return ksft_exit_fail();
+ }
+ }
+ return ksft_exit_pass();
+}
--- /dev/null
+/* Leap second stress test
+ * by: John Stultz (john.stultz@linaro.org)
+ * (C) Copyright IBM 2012
+ * (C) Copyright 2013, 2015 Linaro Limited
+ * Licensed under the GPLv2
+ *
+ * This test signals the kernel to insert a leap second
+ * every day at midnight GMT. This allows for stessing the
+ * kernel's leap-second behavior, as well as how well applications
+ * handle the leap-second discontinuity.
+ *
+ * Usage: leap-a-day [-s] [-i <num>]
+ *
+ * Options:
+ * -s: Each iteration, set the date to 10 seconds before midnight GMT.
+ * This speeds up the number of leapsecond transitions tested,
+ * but because it calls settimeofday frequently, advancing the
+ * time by 24 hours every ~16 seconds, it may cause application
+ * disruption.
+ *
+ * -i: Number of iterations to run (default: infinite)
+ *
+ * Other notes: Disabling NTP prior to running this is advised, as the two
+ * may conflict in their commands to the kernel.
+ *
+ * To build:
+ * $ gcc leap-a-day.c -o leap-a-day -lrt
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/timex.h>
+#include <string.h>
+#include <signal.h>
+#include <unistd.h>
+#ifdef KTEST
+#include "../kselftest.h"
+#else
+static inline int ksft_exit_pass(void)
+{
+ exit(0);
+}
+static inline int ksft_exit_fail(void)
+{
+ exit(1);
+}
+#endif
+
+#define NSEC_PER_SEC 1000000000ULL
+#define CLOCK_TAI 11
+
+/* returns 1 if a <= b, 0 otherwise */
+static inline int in_order(struct timespec a, struct timespec b)
+{
+ if (a.tv_sec < b.tv_sec)
+ return 1;
+ if (a.tv_sec > b.tv_sec)
+ return 0;
+ if (a.tv_nsec > b.tv_nsec)
+ return 0;
+ return 1;
+}
+
+struct timespec timespec_add(struct timespec ts, unsigned long long ns)
+{
+ ts.tv_nsec += ns;
+ while (ts.tv_nsec >= NSEC_PER_SEC) {
+ ts.tv_nsec -= NSEC_PER_SEC;
+ ts.tv_sec++;
+ }
+ return ts;
+}
+
+char *time_state_str(int state)
+{
+ switch (state) {
+ case TIME_OK: return "TIME_OK";
+ case TIME_INS: return "TIME_INS";
+ case TIME_DEL: return "TIME_DEL";
+ case TIME_OOP: return "TIME_OOP";
+ case TIME_WAIT: return "TIME_WAIT";
+ case TIME_BAD: return "TIME_BAD";
+ }
+ return "ERROR";
+}
+
+/* clear NTP time_status & time_state */
+int clear_time_state(void)
+{
+ struct timex tx;
+ int ret;
+
+ /*
+ * We have to call adjtime twice here, as kernels
+ * prior to 6b1859dba01c7 (included in 3.5 and
+ * -stable), had an issue with the state machine
+ * and wouldn't clear the STA_INS/DEL flag directly.
+ */
+ tx.modes = ADJ_STATUS;
+ tx.status = STA_PLL;
+ ret = adjtimex(&tx);
+
+ /* Clear maxerror, as it can cause UNSYNC to be set */
+ tx.modes = ADJ_MAXERROR;
+ tx.maxerror = 0;
+ ret = adjtimex(&tx);
+
+ /* Clear the status */
+ tx.modes = ADJ_STATUS;
+ tx.status = 0;
+ ret = adjtimex(&tx);
+
+ return ret;
+}
+
+/* Make sure we cleanup on ctrl-c */
+void handler(int unused)
+{
+ clear_time_state();
+ exit(0);
+}
+
+/* Test for known hrtimer failure */
+void test_hrtimer_failure(void)
+{
+ struct timespec now, target;
+
+ clock_gettime(CLOCK_REALTIME, &now);
+ target = timespec_add(now, NSEC_PER_SEC/2);
+ clock_nanosleep(CLOCK_REALTIME, TIMER_ABSTIME, &target, NULL);
+ clock_gettime(CLOCK_REALTIME, &now);
+
+ if (!in_order(target, now))
+ printf("ERROR: hrtimer early expiration failure observed.\n");
+}
+
+int main(int argc, char **argv)
+{
+ int settime = 0;
+ int tai_time = 0;
+ int insert = 1;
+ int iterations = -1;
+ int opt;
+
+ /* Process arguments */
+ while ((opt = getopt(argc, argv, "sti:")) != -1) {
+ switch (opt) {
+ case 's':
+ printf("Setting time to speed up testing\n");
+ settime = 1;
+ break;
+ case 'i':
+ iterations = atoi(optarg);
+ break;
+ case 't':
+ tai_time = 1;
+ break;
+ default:
+ printf("Usage: %s [-s] [-i <iterations>]\n", argv[0]);
+ printf(" -s: Set time to right before leap second each iteration\n");
+ printf(" -i: Number of iterations\n");
+ printf(" -t: Print TAI time\n");
+ exit(-1);
+ }
+ }
+
+ /* Make sure TAI support is present if -t was used */
+ if (tai_time) {
+ struct timespec ts;
+
+ if (clock_gettime(CLOCK_TAI, &ts)) {
+ printf("System doesn't support CLOCK_TAI\n");
+ ksft_exit_fail();
+ }
+ }
+
+ signal(SIGINT, handler);
+ signal(SIGKILL, handler);
+
+ if (iterations < 0)
+ printf("This runs continuously. Press ctrl-c to stop\n");
+ else
+ printf("Running for %i iterations. Press ctrl-c to stop\n", iterations);
+
+ printf("\n");
+ while (1) {
+ int ret;
+ struct timespec ts;
+ struct timex tx;
+ time_t now, next_leap;
+
+ /* Get the current time */
+ clock_gettime(CLOCK_REALTIME, &ts);
+
+ /* Calculate the next possible leap second 23:59:60 GMT */
+ next_leap = ts.tv_sec;
+ next_leap += 86400 - (next_leap % 86400);
+
+ if (settime) {
+ struct timeval tv;
+
+ tv.tv_sec = next_leap - 10;
+ tv.tv_usec = 0;
+ settimeofday(&tv, NULL);
+ printf("Setting time to %s", ctime(&tv.tv_sec));
+ }
+
+ /* Reset NTP time state */
+ clear_time_state();
+
+ /* Set the leap second insert flag */
+ tx.modes = ADJ_STATUS;
+ if (insert)
+ tx.status = STA_INS;
+ else
+ tx.status = STA_DEL;
+ ret = adjtimex(&tx);
+ if (ret < 0) {
+ printf("Error: Problem setting STA_INS/STA_DEL!: %s\n",
+ time_state_str(ret));
+ return ksft_exit_fail();
+ }
+
+ /* Validate STA_INS was set */
+ tx.modes = 0;
+ ret = adjtimex(&tx);
+ if (tx.status != STA_INS && tx.status != STA_DEL) {
+ printf("Error: STA_INS/STA_DEL not set!: %s\n",
+ time_state_str(ret));
+ return ksft_exit_fail();
+ }
+
+ if (tai_time) {
+ printf("Using TAI time,"
+ " no inconsistencies should be seen!\n");
+ }
+
+ printf("Scheduling leap second for %s", ctime(&next_leap));
+
+ /* Wake up 3 seconds before leap */
+ ts.tv_sec = next_leap - 3;
+ ts.tv_nsec = 0;
+
+ while (clock_nanosleep(CLOCK_REALTIME, TIMER_ABSTIME, &ts, NULL))
+ printf("Something woke us up, returning to sleep\n");
+
+ /* Validate STA_INS is still set */
+ tx.modes = 0;
+ ret = adjtimex(&tx);
+ if (tx.status != STA_INS && tx.status != STA_DEL) {
+ printf("Something cleared STA_INS/STA_DEL, setting it again.\n");
+ tx.modes = ADJ_STATUS;
+ if (insert)
+ tx.status = STA_INS;
+ else
+ tx.status = STA_DEL;
+ ret = adjtimex(&tx);
+ }
+
+ /* Check adjtimex output every half second */
+ now = tx.time.tv_sec;
+ while (now < next_leap + 2) {
+ char buf[26];
+ struct timespec tai;
+
+ tx.modes = 0;
+ ret = adjtimex(&tx);
+
+ if (tai_time) {
+ clock_gettime(CLOCK_TAI, &tai);
+ printf("%ld sec, %9ld ns\t%s\n",
+ tai.tv_sec,
+ tai.tv_nsec,
+ time_state_str(ret));
+ } else {
+ ctime_r(&tx.time.tv_sec, buf);
+ buf[strlen(buf)-1] = 0; /*remove trailing\n */
+
+ printf("%s + %6ld us (%i)\t%s\n",
+ buf,
+ tx.time.tv_usec,
+ tx.tai,
+ time_state_str(ret));
+ }
+ now = tx.time.tv_sec;
+ /* Sleep for another half second */
+ ts.tv_sec = 0;
+ ts.tv_nsec = NSEC_PER_SEC / 2;
+ clock_nanosleep(CLOCK_MONOTONIC, 0, &ts, NULL);
+ }
+ /* Switch to using other mode */
+ insert = !insert;
+
+ /* Note if kernel has known hrtimer failure */
+ test_hrtimer_failure();
+
+ printf("Leap complete\n\n");
+
+ if ((iterations != -1) && !(--iterations))
+ break;
+ }
+
+ clear_time_state();
+ return ksft_exit_pass();
+}
--- /dev/null
+/* Demo leapsecond deadlock
+ * by: John Stultz (john.stultz@linaro.org)
+ * (C) Copyright IBM 2012
+ * (C) Copyright 2013, 2015 Linaro Limited
+ * Licensed under the GPL
+ *
+ * This test demonstrates leapsecond deadlock that is possibe
+ * on kernels from 2.6.26 to 3.3.
+ *
+ * WARNING: THIS WILL LIKELY HARDHANG SYSTEMS AND MAY LOSE DATA
+ * RUN AT YOUR OWN RISK!
+ * To build:
+ * $ gcc leapcrash.c -o leapcrash -lrt
+ */
+
+
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/timex.h>
+#include <string.h>
+#include <signal.h>
+#ifdef KTEST
+#include "../kselftest.h"
+#else
+static inline int ksft_exit_pass(void)
+{
+ exit(0);
+}
+static inline int ksft_exit_fail(void)
+{
+ exit(1);
+}
+#endif
+
+
+
+/* clear NTP time_status & time_state */
+int clear_time_state(void)
+{
+ struct timex tx;
+ int ret;
+
+ /*
+ * We have to call adjtime twice here, as kernels
+ * prior to 6b1859dba01c7 (included in 3.5 and
+ * -stable), had an issue with the state machine
+ * and wouldn't clear the STA_INS/DEL flag directly.
+ */
+ tx.modes = ADJ_STATUS;
+ tx.status = STA_PLL;
+ ret = adjtimex(&tx);
+
+ tx.modes = ADJ_STATUS;
+ tx.status = 0;
+ ret = adjtimex(&tx);
+
+ return ret;
+}
+
+/* Make sure we cleanup on ctrl-c */
+void handler(int unused)
+{
+ clear_time_state();
+ exit(0);
+}
+
+
+int main(void)
+{
+ struct timex tx;
+ struct timespec ts;
+ time_t next_leap;
+ int count = 0;
+
+ setbuf(stdout, NULL);
+
+ signal(SIGINT, handler);
+ signal(SIGKILL, handler);
+ printf("This runs for a few minutes. Press ctrl-c to stop\n");
+
+ clear_time_state();
+
+
+ /* Get the current time */
+ clock_gettime(CLOCK_REALTIME, &ts);
+
+ /* Calculate the next possible leap second 23:59:60 GMT */
+ next_leap = ts.tv_sec;
+ next_leap += 86400 - (next_leap % 86400);
+
+ for (count = 0; count < 20; count++) {
+ struct timeval tv;
+
+
+ /* set the time to 2 seconds before the leap */
+ tv.tv_sec = next_leap - 2;
+ tv.tv_usec = 0;
+ if (settimeofday(&tv, NULL)) {
+ printf("Error: You're likely not running with proper (ie: root) permissions\n");
+ return ksft_exit_fail();
+ }
+ tx.modes = 0;
+ adjtimex(&tx);
+
+ /* hammer on adjtime w/ STA_INS */
+ while (tx.time.tv_sec < next_leap + 1) {
+ /* Set the leap second insert flag */
+ tx.modes = ADJ_STATUS;
+ tx.status = STA_INS;
+ adjtimex(&tx);
+ }
+ clear_time_state();
+ printf(".");
+ }
+ printf("[OK]\n");
+ return ksft_exit_pass();
+}
--- /dev/null
+/* Measure mqueue timeout latency
+ * by: john stultz (john.stultz@linaro.org)
+ * (C) Copyright Linaro 2013
+ *
+ * Inspired with permission from example test by:
+ * Romain Francoise <romain@orebokech.com>
+ * Licensed under the GPLv2
+ *
+ * To build:
+ * $ gcc mqueue-lat.c -o mqueue-lat -lrt
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/timex.h>
+#include <string.h>
+#include <signal.h>
+#include <errno.h>
+#include <mqueue.h>
+#ifdef KTEST
+#include "../kselftest.h"
+#else
+static inline int ksft_exit_pass(void)
+{
+ exit(0);
+}
+static inline int ksft_exit_fail(void)
+{
+ exit(1);
+}
+#endif
+
+#define NSEC_PER_SEC 1000000000ULL
+
+#define TARGET_TIMEOUT 100000000 /* 100ms in nanoseconds */
+#define UNRESONABLE_LATENCY 40000000 /* 40ms in nanosecs */
+
+
+long long timespec_sub(struct timespec a, struct timespec b)
+{
+ long long ret = NSEC_PER_SEC * b.tv_sec + b.tv_nsec;
+
+ ret -= NSEC_PER_SEC * a.tv_sec + a.tv_nsec;
+ return ret;
+}
+
+struct timespec timespec_add(struct timespec ts, unsigned long long ns)
+{
+ ts.tv_nsec += ns;
+ while (ts.tv_nsec >= NSEC_PER_SEC) {
+ ts.tv_nsec -= NSEC_PER_SEC;
+ ts.tv_sec++;
+ }
+ return ts;
+}
+
+int mqueue_lat_test(void)
+{
+
+ mqd_t q;
+ struct mq_attr attr;
+ struct timespec start, end, now, target;
+ int i, count, ret;
+
+ q = mq_open("/foo", O_CREAT | O_RDONLY, 0666, NULL);
+ if (q < 0) {
+ perror("mq_open");
+ return -1;
+ }
+ mq_getattr(q, &attr);
+
+
+ count = 100;
+ clock_gettime(CLOCK_MONOTONIC, &start);
+
+ for (i = 0; i < count; i++) {
+ char buf[attr.mq_msgsize];
+
+ clock_gettime(CLOCK_REALTIME, &now);
+ target = now;
+ target = timespec_add(now, TARGET_TIMEOUT); /* 100ms */
+
+ ret = mq_timedreceive(q, buf, sizeof(buf), NULL, &target);
+ if (ret < 0 && errno != ETIMEDOUT) {
+ perror("mq_timedreceive");
+ return -1;
+ }
+ }
+ clock_gettime(CLOCK_MONOTONIC, &end);
+
+ mq_close(q);
+
+ if ((timespec_sub(start, end)/count) > TARGET_TIMEOUT + UNRESONABLE_LATENCY)
+ return -1;
+
+ return 0;
+}
+
+int main(int argc, char **argv)
+{
+ int ret;
+
+ printf("Mqueue latency : ");
+
+ ret = mqueue_lat_test();
+ if (ret < 0) {
+ printf("[FAILED]\n");
+ return ksft_exit_fail();
+ }
+ printf("[OK]\n");
+ return ksft_exit_pass();
+}
--- /dev/null
+/* Make sure timers don't return early
+ * by: john stultz (johnstul@us.ibm.com)
+ * John Stultz (john.stultz@linaro.org)
+ * (C) Copyright IBM 2012
+ * (C) Copyright Linaro 2013 2015
+ * Licensed under the GPLv2
+ *
+ * To build:
+ * $ gcc nanosleep.c -o nanosleep -lrt
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/timex.h>
+#include <string.h>
+#include <signal.h>
+#ifdef KTEST
+#include "../kselftest.h"
+#else
+static inline int ksft_exit_pass(void)
+{
+ exit(0);
+}
+static inline int ksft_exit_fail(void)
+{
+ exit(1);
+}
+#endif
+
+#define NSEC_PER_SEC 1000000000ULL
+
+#define CLOCK_REALTIME 0
+#define CLOCK_MONOTONIC 1
+#define CLOCK_PROCESS_CPUTIME_ID 2
+#define CLOCK_THREAD_CPUTIME_ID 3
+#define CLOCK_MONOTONIC_RAW 4
+#define CLOCK_REALTIME_COARSE 5
+#define CLOCK_MONOTONIC_COARSE 6
+#define CLOCK_BOOTTIME 7
+#define CLOCK_REALTIME_ALARM 8
+#define CLOCK_BOOTTIME_ALARM 9
+#define CLOCK_HWSPECIFIC 10
+#define CLOCK_TAI 11
+#define NR_CLOCKIDS 12
+
+#define UNSUPPORTED 0xf00f
+
+char *clockstring(int clockid)
+{
+ switch (clockid) {
+ case CLOCK_REALTIME:
+ return "CLOCK_REALTIME";
+ case CLOCK_MONOTONIC:
+ return "CLOCK_MONOTONIC";
+ case CLOCK_PROCESS_CPUTIME_ID:
+ return "CLOCK_PROCESS_CPUTIME_ID";
+ case CLOCK_THREAD_CPUTIME_ID:
+ return "CLOCK_THREAD_CPUTIME_ID";
+ case CLOCK_MONOTONIC_RAW:
+ return "CLOCK_MONOTONIC_RAW";
+ case CLOCK_REALTIME_COARSE:
+ return "CLOCK_REALTIME_COARSE";
+ case CLOCK_MONOTONIC_COARSE:
+ return "CLOCK_MONOTONIC_COARSE";
+ case CLOCK_BOOTTIME:
+ return "CLOCK_BOOTTIME";
+ case CLOCK_REALTIME_ALARM:
+ return "CLOCK_REALTIME_ALARM";
+ case CLOCK_BOOTTIME_ALARM:
+ return "CLOCK_BOOTTIME_ALARM";
+ case CLOCK_TAI:
+ return "CLOCK_TAI";
+ };
+ return "UNKNOWN_CLOCKID";
+}
+
+/* returns 1 if a <= b, 0 otherwise */
+static inline int in_order(struct timespec a, struct timespec b)
+{
+ if (a.tv_sec < b.tv_sec)
+ return 1;
+ if (a.tv_sec > b.tv_sec)
+ return 0;
+ if (a.tv_nsec > b.tv_nsec)
+ return 0;
+ return 1;
+}
+
+struct timespec timespec_add(struct timespec ts, unsigned long long ns)
+{
+ ts.tv_nsec += ns;
+ while (ts.tv_nsec >= NSEC_PER_SEC) {
+ ts.tv_nsec -= NSEC_PER_SEC;
+ ts.tv_sec++;
+ }
+ return ts;
+}
+
+int nanosleep_test(int clockid, long long ns)
+{
+ struct timespec now, target, rel;
+
+ /* First check abs time */
+ if (clock_gettime(clockid, &now))
+ return UNSUPPORTED;
+ target = timespec_add(now, ns);
+
+ if (clock_nanosleep(clockid, TIMER_ABSTIME, &target, NULL))
+ return UNSUPPORTED;
+ clock_gettime(clockid, &now);
+
+ if (!in_order(target, now))
+ return -1;
+
+ /* Second check reltime */
+ clock_gettime(clockid, &now);
+ rel.tv_sec = 0;
+ rel.tv_nsec = 0;
+ rel = timespec_add(rel, ns);
+ target = timespec_add(now, ns);
+ clock_nanosleep(clockid, 0, &rel, NULL);
+ clock_gettime(clockid, &now);
+
+ if (!in_order(target, now))
+ return -1;
+ return 0;
+}
+
+int main(int argc, char **argv)
+{
+ long long length;
+ int clockid, ret;
+
+ for (clockid = CLOCK_REALTIME; clockid < NR_CLOCKIDS; clockid++) {
+
+ /* Skip cputime clockids since nanosleep won't increment cputime */
+ if (clockid == CLOCK_PROCESS_CPUTIME_ID ||
+ clockid == CLOCK_THREAD_CPUTIME_ID ||
+ clockid == CLOCK_HWSPECIFIC)
+ continue;
+
+ printf("Nanosleep %-31s ", clockstring(clockid));
+
+ length = 10;
+ while (length <= (NSEC_PER_SEC * 10)) {
+ ret = nanosleep_test(clockid, length);
+ if (ret == UNSUPPORTED) {
+ printf("[UNSUPPORTED]\n");
+ goto next;
+ }
+ if (ret < 0) {
+ printf("[FAILED]\n");
+ return ksft_exit_fail();
+ }
+ length *= 100;
+ }
+ printf("[OK]\n");
+next:
+ ret = 0;
+ }
+ return ksft_exit_pass();
+}
--- /dev/null
+/* Measure nanosleep timer latency
+ * by: john stultz (john.stultz@linaro.org)
+ * (C) Copyright Linaro 2013
+ * Licensed under the GPLv2
+ *
+ * To build:
+ * $ gcc nsleep-lat.c -o nsleep-lat -lrt
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/timex.h>
+#include <string.h>
+#include <signal.h>
+#ifdef KTEST
+#include "../kselftest.h"
+#else
+static inline int ksft_exit_pass(void)
+{
+ exit(0);
+}
+static inline int ksft_exit_fail(void)
+{
+ exit(1);
+}
+#endif
+
+#define NSEC_PER_SEC 1000000000ULL
+
+#define UNRESONABLE_LATENCY 40000000 /* 40ms in nanosecs */
+
+
+#define CLOCK_REALTIME 0
+#define CLOCK_MONOTONIC 1
+#define CLOCK_PROCESS_CPUTIME_ID 2
+#define CLOCK_THREAD_CPUTIME_ID 3
+#define CLOCK_MONOTONIC_RAW 4
+#define CLOCK_REALTIME_COARSE 5
+#define CLOCK_MONOTONIC_COARSE 6
+#define CLOCK_BOOTTIME 7
+#define CLOCK_REALTIME_ALARM 8
+#define CLOCK_BOOTTIME_ALARM 9
+#define CLOCK_HWSPECIFIC 10
+#define CLOCK_TAI 11
+#define NR_CLOCKIDS 12
+
+#define UNSUPPORTED 0xf00f
+
+char *clockstring(int clockid)
+{
+ switch (clockid) {
+ case CLOCK_REALTIME:
+ return "CLOCK_REALTIME";
+ case CLOCK_MONOTONIC:
+ return "CLOCK_MONOTONIC";
+ case CLOCK_PROCESS_CPUTIME_ID:
+ return "CLOCK_PROCESS_CPUTIME_ID";
+ case CLOCK_THREAD_CPUTIME_ID:
+ return "CLOCK_THREAD_CPUTIME_ID";
+ case CLOCK_MONOTONIC_RAW:
+ return "CLOCK_MONOTONIC_RAW";
+ case CLOCK_REALTIME_COARSE:
+ return "CLOCK_REALTIME_COARSE";
+ case CLOCK_MONOTONIC_COARSE:
+ return "CLOCK_MONOTONIC_COARSE";
+ case CLOCK_BOOTTIME:
+ return "CLOCK_BOOTTIME";
+ case CLOCK_REALTIME_ALARM:
+ return "CLOCK_REALTIME_ALARM";
+ case CLOCK_BOOTTIME_ALARM:
+ return "CLOCK_BOOTTIME_ALARM";
+ case CLOCK_TAI:
+ return "CLOCK_TAI";
+ };
+ return "UNKNOWN_CLOCKID";
+}
+
+struct timespec timespec_add(struct timespec ts, unsigned long long ns)
+{
+ ts.tv_nsec += ns;
+ while (ts.tv_nsec >= NSEC_PER_SEC) {
+ ts.tv_nsec -= NSEC_PER_SEC;
+ ts.tv_sec++;
+ }
+ return ts;
+}
+
+
+long long timespec_sub(struct timespec a, struct timespec b)
+{
+ long long ret = NSEC_PER_SEC * b.tv_sec + b.tv_nsec;
+
+ ret -= NSEC_PER_SEC * a.tv_sec + a.tv_nsec;
+ return ret;
+}
+
+int nanosleep_lat_test(int clockid, long long ns)
+{
+ struct timespec start, end, target;
+ long long latency = 0;
+ int i, count;
+
+ target.tv_sec = ns/NSEC_PER_SEC;
+ target.tv_nsec = ns%NSEC_PER_SEC;
+
+ if (clock_gettime(clockid, &start))
+ return UNSUPPORTED;
+ if (clock_nanosleep(clockid, 0, &target, NULL))
+ return UNSUPPORTED;
+
+ count = 10;
+
+ /* First check relative latency */
+ clock_gettime(clockid, &start);
+ for (i = 0; i < count; i++)
+ clock_nanosleep(clockid, 0, &target, NULL);
+ clock_gettime(clockid, &end);
+
+ if (((timespec_sub(start, end)/count)-ns) > UNRESONABLE_LATENCY) {
+ printf("Large rel latency: %lld ns :", (timespec_sub(start, end)/count)-ns);
+ return -1;
+ }
+
+ /* Next check absolute latency */
+ for (i = 0; i < count; i++) {
+ clock_gettime(clockid, &start);
+ target = timespec_add(start, ns);
+ clock_nanosleep(clockid, TIMER_ABSTIME, &target, NULL);
+ clock_gettime(clockid, &end);
+ latency += timespec_sub(target, end);
+ }
+
+ if (latency/count > UNRESONABLE_LATENCY) {
+ printf("Large abs latency: %lld ns :", latency/count);
+ return -1;
+ }
+
+ return 0;
+}
+
+
+
+int main(int argc, char **argv)
+{
+ long long length;
+ int clockid, ret;
+
+ for (clockid = CLOCK_REALTIME; clockid < NR_CLOCKIDS; clockid++) {
+
+ /* Skip cputime clockids since nanosleep won't increment cputime */
+ if (clockid == CLOCK_PROCESS_CPUTIME_ID ||
+ clockid == CLOCK_THREAD_CPUTIME_ID ||
+ clockid == CLOCK_HWSPECIFIC)
+ continue;
+
+ printf("nsleep latency %-26s ", clockstring(clockid));
+
+ length = 10;
+ while (length <= (NSEC_PER_SEC * 10)) {
+ ret = nanosleep_lat_test(clockid, length);
+ if (ret)
+ break;
+ length *= 100;
+
+ }
+
+ if (ret == UNSUPPORTED) {
+ printf("[UNSUPPORTED]\n");
+ continue;
+ }
+ if (ret < 0) {
+ printf("[FAILED]\n");
+ return ksft_exit_fail();
+ }
+ printf("[OK]\n");
+ }
+ return ksft_exit_pass();
+}
static void kernel_loop(void)
{
void *addr = sbrk(0);
+ int err = 0;
- while (!done) {
- brk(addr + 4096);
- brk(addr);
+ while (!done && !err) {
+ err = brk(addr + 4096);
+ err |= brk(addr);
}
}
int main(int argc, char **argv)
{
- int err;
-
printf("Testing posix timers. False negative may happen on CPU execution \n");
printf("based timers if other threads run on the CPU...\n");
--- /dev/null
+/* CLOCK_MONOTONIC vs CLOCK_MONOTONIC_RAW skew test
+ * by: john stultz (johnstul@us.ibm.com)
+ * John Stultz <john.stultz@linaro.org>
+ * (C) Copyright IBM 2012
+ * (C) Copyright Linaro Limited 2015
+ * Licensed under the GPLv2
+ *
+ * To build:
+ * $ gcc raw_skew.c -o raw_skew -lrt
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdio.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include <sys/time.h>
+#include <sys/timex.h>
+#include <time.h>
+#ifdef KTEST
+#include "../kselftest.h"
+#else
+static inline int ksft_exit_pass(void)
+{
+ exit(0);
+}
+static inline int ksft_exit_fail(void)
+{
+ exit(1);
+}
+#endif
+
+
+#define CLOCK_MONOTONIC_RAW 4
+#define NSEC_PER_SEC 1000000000LL
+
+#define shift_right(x, s) ({ \
+ __typeof__(x) __x = (x); \
+ __typeof__(s) __s = (s); \
+ __x < 0 ? -(-__x >> __s) : __x >> __s; \
+})
+
+long long llabs(long long val)
+{
+ if (val < 0)
+ val = -val;
+ return val;
+}
+
+unsigned long long ts_to_nsec(struct timespec ts)
+{
+ return ts.tv_sec * NSEC_PER_SEC + ts.tv_nsec;
+}
+
+struct timespec nsec_to_ts(long long ns)
+{
+ struct timespec ts;
+
+ ts.tv_sec = ns/NSEC_PER_SEC;
+ ts.tv_nsec = ns%NSEC_PER_SEC;
+ return ts;
+}
+
+long long diff_timespec(struct timespec start, struct timespec end)
+{
+ long long start_ns, end_ns;
+
+ start_ns = ts_to_nsec(start);
+ end_ns = ts_to_nsec(end);
+ return end_ns - start_ns;
+}
+
+void get_monotonic_and_raw(struct timespec *mon, struct timespec *raw)
+{
+ struct timespec start, mid, end;
+ long long diff = 0, tmp;
+ int i;
+
+ for (i = 0; i < 3; i++) {
+ long long newdiff;
+
+ clock_gettime(CLOCK_MONOTONIC, &start);
+ clock_gettime(CLOCK_MONOTONIC_RAW, &mid);
+ clock_gettime(CLOCK_MONOTONIC, &end);
+
+ newdiff = diff_timespec(start, end);
+ if (diff == 0 || newdiff < diff) {
+ diff = newdiff;
+ *raw = mid;
+ tmp = (ts_to_nsec(start) + ts_to_nsec(end))/2;
+ *mon = nsec_to_ts(tmp);
+ }
+ }
+}
+
+int main(int argv, char **argc)
+{
+ struct timespec mon, raw, start, end;
+ long long delta1, delta2, interval, eppm, ppm;
+ struct timex tx1, tx2;
+
+ setbuf(stdout, NULL);
+
+ if (clock_gettime(CLOCK_MONOTONIC_RAW, &raw)) {
+ printf("ERR: NO CLOCK_MONOTONIC_RAW\n");
+ return -1;
+ }
+
+ tx1.modes = 0;
+ adjtimex(&tx1);
+ get_monotonic_and_raw(&mon, &raw);
+ start = mon;
+ delta1 = diff_timespec(mon, raw);
+
+ if (tx1.offset)
+ printf("WARNING: ADJ_OFFSET in progress, this will cause inaccurate results\n");
+
+ printf("Estimating clock drift: ");
+ sleep(120);
+
+ get_monotonic_and_raw(&mon, &raw);
+ end = mon;
+ tx2.modes = 0;
+ adjtimex(&tx2);
+ delta2 = diff_timespec(mon, raw);
+
+ interval = diff_timespec(start, end);
+
+ /* calculate measured ppm between MONOTONIC and MONOTONIC_RAW */
+ eppm = ((delta2-delta1)*NSEC_PER_SEC)/interval;
+ eppm = -eppm;
+ printf("%lld.%i(est)", eppm/1000, abs((int)(eppm%1000)));
+
+ /* Avg the two actual freq samples adjtimex gave us */
+ ppm = (tx1.freq + tx2.freq) * 1000 / 2;
+ ppm = (long long)tx1.freq * 1000;
+ ppm = shift_right(ppm, 16);
+ printf(" %lld.%i(act)", ppm/1000, abs((int)(ppm%1000)));
+
+ if (llabs(eppm - ppm) > 1000) {
+ printf(" [FAILED]\n");
+ return ksft_exit_fail();
+ }
+ printf(" [OK]\n");
+ return ksft_exit_pass();
+}
--- /dev/null
+/*
+ * Real Time Clock Driver Test/Example Program
+ *
+ * Compile with:
+ * gcc -s -Wall -Wstrict-prototypes rtctest.c -o rtctest
+ *
+ * Copyright (C) 1996, Paul Gortmaker.
+ *
+ * Released under the GNU General Public License, version 2,
+ * included herein by reference.
+ *
+ */
+
+#include <stdio.h>
+#include <linux/rtc.h>
+#include <sys/ioctl.h>
+#include <sys/time.h>
+#include <sys/types.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include <errno.h>
+
+
+/*
+ * This expects the new RTC class driver framework, working with
+ * clocks that will often not be clones of what the PC-AT had.
+ * Use the command line to specify another RTC if you need one.
+ */
+static const char default_rtc[] = "/dev/rtc0";
+
+
+int main(int argc, char **argv)
+{
+ int i, fd, retval, irqcount = 0;
+ unsigned long tmp, data;
+ struct rtc_time rtc_tm;
+ const char *rtc = default_rtc;
+ struct timeval start, end, diff;
+
+ switch (argc) {
+ case 2:
+ rtc = argv[1];
+ /* FALLTHROUGH */
+ case 1:
+ break;
+ default:
+ fprintf(stderr, "usage: rtctest [rtcdev]\n");
+ return 1;
+ }
+
+ fd = open(rtc, O_RDONLY);
+
+ if (fd == -1) {
+ perror(rtc);
+ exit(errno);
+ }
+
+ fprintf(stderr, "\n\t\t\tRTC Driver Test Example.\n\n");
+
+ /* Turn on update interrupts (one per second) */
+ retval = ioctl(fd, RTC_UIE_ON, 0);
+ if (retval == -1) {
+ if (errno == ENOTTY) {
+ fprintf(stderr,
+ "\n...Update IRQs not supported.\n");
+ goto test_READ;
+ }
+ perror("RTC_UIE_ON ioctl");
+ exit(errno);
+ }
+
+ fprintf(stderr, "Counting 5 update (1/sec) interrupts from reading %s:",
+ rtc);
+ fflush(stderr);
+ for (i=1; i<6; i++) {
+ /* This read will block */
+ retval = read(fd, &data, sizeof(unsigned long));
+ if (retval == -1) {
+ perror("read");
+ exit(errno);
+ }
+ fprintf(stderr, " %d",i);
+ fflush(stderr);
+ irqcount++;
+ }
+
+ fprintf(stderr, "\nAgain, from using select(2) on /dev/rtc:");
+ fflush(stderr);
+ for (i=1; i<6; i++) {
+ struct timeval tv = {5, 0}; /* 5 second timeout on select */
+ fd_set readfds;
+
+ FD_ZERO(&readfds);
+ FD_SET(fd, &readfds);
+ /* The select will wait until an RTC interrupt happens. */
+ retval = select(fd+1, &readfds, NULL, NULL, &tv);
+ if (retval == -1) {
+ perror("select");
+ exit(errno);
+ }
+ /* This read won't block unlike the select-less case above. */
+ retval = read(fd, &data, sizeof(unsigned long));
+ if (retval == -1) {
+ perror("read");
+ exit(errno);
+ }
+ fprintf(stderr, " %d",i);
+ fflush(stderr);
+ irqcount++;
+ }
+
+ /* Turn off update interrupts */
+ retval = ioctl(fd, RTC_UIE_OFF, 0);
+ if (retval == -1) {
+ perror("RTC_UIE_OFF ioctl");
+ exit(errno);
+ }
+
+test_READ:
+ /* Read the RTC time/date */
+ retval = ioctl(fd, RTC_RD_TIME, &rtc_tm);
+ if (retval == -1) {
+ perror("RTC_RD_TIME ioctl");
+ exit(errno);
+ }
+
+ fprintf(stderr, "\n\nCurrent RTC date/time is %d-%d-%d, %02d:%02d:%02d.\n",
+ rtc_tm.tm_mday, rtc_tm.tm_mon + 1, rtc_tm.tm_year + 1900,
+ rtc_tm.tm_hour, rtc_tm.tm_min, rtc_tm.tm_sec);
+
+ /* Set the alarm to 5 sec in the future, and check for rollover */
+ rtc_tm.tm_sec += 5;
+ if (rtc_tm.tm_sec >= 60) {
+ rtc_tm.tm_sec %= 60;
+ rtc_tm.tm_min++;
+ }
+ if (rtc_tm.tm_min == 60) {
+ rtc_tm.tm_min = 0;
+ rtc_tm.tm_hour++;
+ }
+ if (rtc_tm.tm_hour == 24)
+ rtc_tm.tm_hour = 0;
+
+ retval = ioctl(fd, RTC_ALM_SET, &rtc_tm);
+ if (retval == -1) {
+ if (errno == ENOTTY) {
+ fprintf(stderr,
+ "\n...Alarm IRQs not supported.\n");
+ goto test_PIE;
+ }
+ perror("RTC_ALM_SET ioctl");
+ exit(errno);
+ }
+
+ /* Read the current alarm settings */
+ retval = ioctl(fd, RTC_ALM_READ, &rtc_tm);
+ if (retval == -1) {
+ perror("RTC_ALM_READ ioctl");
+ exit(errno);
+ }
+
+ fprintf(stderr, "Alarm time now set to %02d:%02d:%02d.\n",
+ rtc_tm.tm_hour, rtc_tm.tm_min, rtc_tm.tm_sec);
+
+ /* Enable alarm interrupts */
+ retval = ioctl(fd, RTC_AIE_ON, 0);
+ if (retval == -1) {
+ perror("RTC_AIE_ON ioctl");
+ exit(errno);
+ }
+
+ fprintf(stderr, "Waiting 5 seconds for alarm...");
+ fflush(stderr);
+ /* This blocks until the alarm ring causes an interrupt */
+ retval = read(fd, &data, sizeof(unsigned long));
+ if (retval == -1) {
+ perror("read");
+ exit(errno);
+ }
+ irqcount++;
+ fprintf(stderr, " okay. Alarm rang.\n");
+
+ /* Disable alarm interrupts */
+ retval = ioctl(fd, RTC_AIE_OFF, 0);
+ if (retval == -1) {
+ perror("RTC_AIE_OFF ioctl");
+ exit(errno);
+ }
+
+test_PIE:
+ /* Read periodic IRQ rate */
+ retval = ioctl(fd, RTC_IRQP_READ, &tmp);
+ if (retval == -1) {
+ /* not all RTCs support periodic IRQs */
+ if (errno == ENOTTY) {
+ fprintf(stderr, "\nNo periodic IRQ support\n");
+ goto done;
+ }
+ perror("RTC_IRQP_READ ioctl");
+ exit(errno);
+ }
+ fprintf(stderr, "\nPeriodic IRQ rate is %ldHz.\n", tmp);
+
+ fprintf(stderr, "Counting 20 interrupts at:");
+ fflush(stderr);
+
+ /* The frequencies 128Hz, 256Hz, ... 8192Hz are only allowed for root. */
+ for (tmp=2; tmp<=64; tmp*=2) {
+
+ retval = ioctl(fd, RTC_IRQP_SET, tmp);
+ if (retval == -1) {
+ /* not all RTCs can change their periodic IRQ rate */
+ if (errno == ENOTTY) {
+ fprintf(stderr,
+ "\n...Periodic IRQ rate is fixed\n");
+ goto done;
+ }
+ perror("RTC_IRQP_SET ioctl");
+ exit(errno);
+ }
+
+ fprintf(stderr, "\n%ldHz:\t", tmp);
+ fflush(stderr);
+
+ /* Enable periodic interrupts */
+ retval = ioctl(fd, RTC_PIE_ON, 0);
+ if (retval == -1) {
+ perror("RTC_PIE_ON ioctl");
+ exit(errno);
+ }
+
+ for (i=1; i<21; i++) {
+ gettimeofday(&start, NULL);
+ /* This blocks */
+ retval = read(fd, &data, sizeof(unsigned long));
+ if (retval == -1) {
+ perror("read");
+ exit(errno);
+ }
+ gettimeofday(&end, NULL);
+ timersub(&end, &start, &diff);
+ if (diff.tv_sec > 0 ||
+ diff.tv_usec > ((1000000L / tmp) * 1.10)) {
+ fprintf(stderr, "\nPIE delta error: %ld.%06ld should be close to 0.%06ld\n",
+ diff.tv_sec, diff.tv_usec,
+ (1000000L / tmp));
+ fflush(stdout);
+ exit(-1);
+ }
+
+ fprintf(stderr, " %d",i);
+ fflush(stderr);
+ irqcount++;
+ }
+
+ /* Disable periodic interrupts */
+ retval = ioctl(fd, RTC_PIE_OFF, 0);
+ if (retval == -1) {
+ perror("RTC_PIE_OFF ioctl");
+ exit(errno);
+ }
+ }
+
+done:
+ fprintf(stderr, "\n\n\t\t\t *** Test complete ***\n");
+
+ close(fd);
+
+ return 0;
+}
--- /dev/null
+/* Time bounds setting test
+ * by: john stultz (johnstul@us.ibm.com)
+ * (C) Copyright IBM 2012
+ * Licensed under the GPLv2
+ *
+ * NOTE: This is a meta-test which sets the time to edge cases then
+ * uses other tests to detect problems. Thus this test requires that
+ * the inconsistency-check and nanosleep tests be present in the same
+ * directory it is run from.
+ *
+ * To build:
+ * $ gcc set-2038.c -o set-2038 -lrt
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <time.h>
+#include <sys/time.h>
+#ifdef KTEST
+#include "../kselftest.h"
+#else
+static inline int ksft_exit_pass(void)
+{
+ exit(0);
+}
+static inline int ksft_exit_fail(void)
+{
+ exit(1);
+}
+#endif
+
+#define NSEC_PER_SEC 1000000000LL
+
+#define KTIME_MAX ((long long)~((unsigned long long)1 << 63))
+#define KTIME_SEC_MAX (KTIME_MAX / NSEC_PER_SEC)
+
+#define YEAR_1901 (-0x7fffffffL)
+#define YEAR_1970 1
+#define YEAR_2038 0x7fffffffL /*overflows 32bit time_t */
+#define YEAR_2262 KTIME_SEC_MAX /*overflows 64bit ktime_t */
+#define YEAR_MAX ((long long)((1ULL<<63)-1)) /*overflows 64bit time_t */
+
+int is32bits(void)
+{
+ return (sizeof(long) == 4);
+}
+
+int settime(long long time)
+{
+ struct timeval now;
+ int ret;
+
+ now.tv_sec = (time_t)time;
+ now.tv_usec = 0;
+
+ ret = settimeofday(&now, NULL);
+
+ printf("Setting time to 0x%lx: %d\n", (long)time, ret);
+ return ret;
+}
+
+int do_tests(void)
+{
+ int ret;
+
+ ret = system("date");
+ ret = system("./inconsistency-check -c 0 -t 20");
+ ret |= system("./nanosleep");
+ ret |= system("./nsleep-lat");
+ return ret;
+
+}
+
+int main(int argc, char *argv[])
+{
+ int ret = 0;
+ int opt, dangerous = 0;
+ time_t start;
+
+ /* Process arguments */
+ while ((opt = getopt(argc, argv, "d")) != -1) {
+ switch (opt) {
+ case 'd':
+ dangerous = 1;
+ }
+ }
+
+ start = time(0);
+
+ /* First test that crazy values don't work */
+ if (!settime(YEAR_1901)) {
+ ret = -1;
+ goto out;
+ }
+ if (!settime(YEAR_MAX)) {
+ ret = -1;
+ goto out;
+ }
+ if (!is32bits() && !settime(YEAR_2262)) {
+ ret = -1;
+ goto out;
+ }
+
+ /* Now test behavior near edges */
+ settime(YEAR_1970);
+ ret = do_tests();
+ if (ret)
+ goto out;
+
+ settime(YEAR_2038 - 600);
+ ret = do_tests();
+ if (ret)
+ goto out;
+
+ /* The rest of the tests can blowup on 32bit systems */
+ if (is32bits() && !dangerous)
+ goto out;
+ /* Test rollover behavior 32bit edge */
+ settime(YEAR_2038 - 10);
+ ret = do_tests();
+ if (ret)
+ goto out;
+
+ settime(YEAR_2262 - 600);
+ ret = do_tests();
+
+out:
+ /* restore clock */
+ settime(start);
+ if (ret)
+ return ksft_exit_fail();
+ return ksft_exit_pass();
+}
--- /dev/null
+/* Set tai offset
+ * by: John Stultz <john.stultz@linaro.org>
+ * (C) Copyright Linaro 2013
+ * Licensed under the GPLv2
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/timex.h>
+#include <string.h>
+#include <signal.h>
+#include <unistd.h>
+#ifdef KTEST
+#include "../kselftest.h"
+#else
+static inline int ksft_exit_pass(void)
+{
+ exit(0);
+}
+static inline int ksft_exit_fail(void)
+{
+ exit(1);
+}
+#endif
+
+int set_tai(int offset)
+{
+ struct timex tx;
+
+ memset(&tx, 0, sizeof(tx));
+
+ tx.modes = ADJ_TAI;
+ tx.constant = offset;
+
+ return adjtimex(&tx);
+}
+
+int get_tai(void)
+{
+ struct timex tx;
+
+ memset(&tx, 0, sizeof(tx));
+
+ adjtimex(&tx);
+ return tx.tai;
+}
+
+int main(int argc, char **argv)
+{
+ int i, ret;
+
+ ret = get_tai();
+ printf("tai offset started at %i\n", ret);
+
+ printf("Checking tai offsets can be properly set: ");
+ for (i = 1; i <= 60; i++) {
+ ret = set_tai(i);
+ ret = get_tai();
+ if (ret != i) {
+ printf("[FAILED] expected: %i got %i\n", i, ret);
+ return ksft_exit_fail();
+ }
+ }
+ printf("[OK]\n");
+ return ksft_exit_pass();
+}
--- /dev/null
+/* set_timer latency test
+ * John Stultz (john.stultz@linaro.org)
+ * (C) Copyright Linaro 2014
+ * Licensed under the GPLv2
+ *
+ * This test makes sure the set_timer api is correct
+ *
+ * To build:
+ * $ gcc set-timer-lat.c -o set-timer-lat -lrt
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+#include <stdio.h>
+#include <unistd.h>
+#include <time.h>
+#include <string.h>
+#include <signal.h>
+#include <stdlib.h>
+#include <pthread.h>
+#ifdef KTEST
+#include "../kselftest.h"
+#else
+static inline int ksft_exit_pass(void)
+{
+ exit(0);
+}
+static inline int ksft_exit_fail(void)
+{
+ exit(1);
+}
+#endif
+
+#define CLOCK_REALTIME 0
+#define CLOCK_MONOTONIC 1
+#define CLOCK_PROCESS_CPUTIME_ID 2
+#define CLOCK_THREAD_CPUTIME_ID 3
+#define CLOCK_MONOTONIC_RAW 4
+#define CLOCK_REALTIME_COARSE 5
+#define CLOCK_MONOTONIC_COARSE 6
+#define CLOCK_BOOTTIME 7
+#define CLOCK_REALTIME_ALARM 8
+#define CLOCK_BOOTTIME_ALARM 9
+#define CLOCK_HWSPECIFIC 10
+#define CLOCK_TAI 11
+#define NR_CLOCKIDS 12
+
+
+#define NSEC_PER_SEC 1000000000ULL
+#define UNRESONABLE_LATENCY 40000000 /* 40ms in nanosecs */
+
+#define TIMER_SECS 1
+int alarmcount;
+int clock_id;
+struct timespec start_time;
+long long max_latency_ns;
+
+char *clockstring(int clockid)
+{
+ switch (clockid) {
+ case CLOCK_REALTIME:
+ return "CLOCK_REALTIME";
+ case CLOCK_MONOTONIC:
+ return "CLOCK_MONOTONIC";
+ case CLOCK_PROCESS_CPUTIME_ID:
+ return "CLOCK_PROCESS_CPUTIME_ID";
+ case CLOCK_THREAD_CPUTIME_ID:
+ return "CLOCK_THREAD_CPUTIME_ID";
+ case CLOCK_MONOTONIC_RAW:
+ return "CLOCK_MONOTONIC_RAW";
+ case CLOCK_REALTIME_COARSE:
+ return "CLOCK_REALTIME_COARSE";
+ case CLOCK_MONOTONIC_COARSE:
+ return "CLOCK_MONOTONIC_COARSE";
+ case CLOCK_BOOTTIME:
+ return "CLOCK_BOOTTIME";
+ case CLOCK_REALTIME_ALARM:
+ return "CLOCK_REALTIME_ALARM";
+ case CLOCK_BOOTTIME_ALARM:
+ return "CLOCK_BOOTTIME_ALARM";
+ case CLOCK_TAI:
+ return "CLOCK_TAI";
+ };
+ return "UNKNOWN_CLOCKID";
+}
+
+
+long long timespec_sub(struct timespec a, struct timespec b)
+{
+ long long ret = NSEC_PER_SEC * b.tv_sec + b.tv_nsec;
+
+ ret -= NSEC_PER_SEC * a.tv_sec + a.tv_nsec;
+ return ret;
+}
+
+
+void sigalarm(int signo)
+{
+ long long delta_ns;
+ struct timespec ts;
+
+ clock_gettime(clock_id, &ts);
+ alarmcount++;
+
+ delta_ns = timespec_sub(start_time, ts);
+ delta_ns -= NSEC_PER_SEC * TIMER_SECS * alarmcount;
+
+ if (delta_ns < 0)
+ printf("%s timer fired early: FAIL\n", clockstring(clock_id));
+
+ if (delta_ns > max_latency_ns)
+ max_latency_ns = delta_ns;
+}
+
+int do_timer(int clock_id, int flags)
+{
+ struct sigevent se;
+ timer_t tm1;
+ struct itimerspec its1, its2;
+ int err;
+
+ /* Set up timer: */
+ memset(&se, 0, sizeof(se));
+ se.sigev_notify = SIGEV_SIGNAL;
+ se.sigev_signo = SIGRTMAX;
+ se.sigev_value.sival_int = 0;
+
+ max_latency_ns = 0;
+ alarmcount = 0;
+
+ err = timer_create(clock_id, &se, &tm1);
+ if (err) {
+ if ((clock_id == CLOCK_REALTIME_ALARM) ||
+ (clock_id == CLOCK_BOOTTIME_ALARM)) {
+ printf("%-22s %s missing CAP_WAKE_ALARM? : [UNSUPPORTED]\n",
+ clockstring(clock_id),
+ flags ? "ABSTIME":"RELTIME");
+ return 0;
+ }
+ printf("%s - timer_create() failed\n", clockstring(clock_id));
+ return -1;
+ }
+
+ clock_gettime(clock_id, &start_time);
+ if (flags) {
+ its1.it_value = start_time;
+ its1.it_value.tv_sec += TIMER_SECS;
+ } else {
+ its1.it_value.tv_sec = TIMER_SECS;
+ its1.it_value.tv_nsec = 0;
+ }
+ its1.it_interval.tv_sec = TIMER_SECS;
+ its1.it_interval.tv_nsec = 0;
+
+ err = timer_settime(tm1, flags, &its1, &its2);
+ if (err) {
+ printf("%s - timer_settime() failed\n", clockstring(clock_id));
+ return -1;
+ }
+
+ while (alarmcount < 5)
+ sleep(1);
+
+ printf("%-22s %s max latency: %10lld ns : ",
+ clockstring(clock_id),
+ flags ? "ABSTIME":"RELTIME",
+ max_latency_ns);
+
+ timer_delete(tm1);
+ if (max_latency_ns < UNRESONABLE_LATENCY) {
+ printf("[OK]\n");
+ return 0;
+ }
+ printf("[FAILED]\n");
+ return -1;
+}
+
+int main(void)
+{
+ struct sigaction act;
+ int signum = SIGRTMAX;
+ int ret = 0;
+
+ /* Set up signal handler: */
+ sigfillset(&act.sa_mask);
+ act.sa_flags = 0;
+ act.sa_handler = sigalarm;
+ sigaction(signum, &act, NULL);
+
+ printf("Setting timers for every %i seconds\n", TIMER_SECS);
+ for (clock_id = 0; clock_id < NR_CLOCKIDS; clock_id++) {
+
+ if ((clock_id == CLOCK_PROCESS_CPUTIME_ID) ||
+ (clock_id == CLOCK_THREAD_CPUTIME_ID) ||
+ (clock_id == CLOCK_MONOTONIC_RAW) ||
+ (clock_id == CLOCK_REALTIME_COARSE) ||
+ (clock_id == CLOCK_MONOTONIC_COARSE) ||
+ (clock_id == CLOCK_HWSPECIFIC))
+ continue;
+
+ ret |= do_timer(clock_id, TIMER_ABSTIME);
+ ret |= do_timer(clock_id, 0);
+ }
+ if (ret)
+ return ksft_exit_fail();
+ return ksft_exit_pass();
+}
--- /dev/null
+/* ADJ_FREQ Skew consistency test
+ * by: john stultz (johnstul@us.ibm.com)
+ * (C) Copyright IBM 2012
+ * Licensed under the GPLv2
+ *
+ * NOTE: This is a meta-test which cranks the ADJ_FREQ knob back
+ * and forth and watches for consistency problems. Thus this test requires
+ * that the inconsistency-check tests be present in the same directory it
+ * is run from.
+ *
+ * To build:
+ * $ gcc skew_consistency.c -o skew_consistency -lrt
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <sys/time.h>
+#include <sys/timex.h>
+#include <time.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <stdlib.h>
+#include <string.h>
+#include <sys/wait.h>
+#ifdef KTEST
+#include "../kselftest.h"
+#else
+static inline int ksft_exit_pass(void)
+{
+ exit(0);
+}
+static inline int ksft_exit_fail(void)
+{
+ exit(1);
+}
+#endif
+
+#define NSEC_PER_SEC 1000000000LL
+
+int main(int argv, char **argc)
+{
+ struct timex tx;
+ int ret, ppm;
+ pid_t pid;
+
+
+ printf("Running Asyncrhonous Frequency Changing Tests...\n");
+
+ pid = fork();
+ if (!pid)
+ return system("./inconsistency-check -c 1 -t 600");
+
+ ppm = 500;
+ ret = 0;
+
+ while (pid != waitpid(pid, &ret, WNOHANG)) {
+ ppm = -ppm;
+ tx.modes = ADJ_FREQUENCY;
+ tx.freq = ppm << 16;
+ adjtimex(&tx);
+ usleep(500000);
+ }
+
+ /* Set things back */
+ tx.modes = ADJ_FREQUENCY;
+ tx.offset = 0;
+ adjtimex(&tx);
+
+
+ if (ret) {
+ printf("[FAILED]\n");
+ return ksft_exit_fail();
+ }
+ printf("[OK]\n");
+ return ksft_exit_pass();
+}
--- /dev/null
+/* threadtest.c
+ * by: john stultz (johnstul@us.ibm.com)
+ * (C) Copyright IBM 2004, 2005, 2006, 2012
+ * Licensed under the GPLv2
+ *
+ * To build:
+ * $ gcc threadtest.c -o threadtest -lrt
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include <stdio.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include <sys/time.h>
+#include <pthread.h>
+#ifdef KTEST
+#include "../kselftest.h"
+#else
+static inline int ksft_exit_pass(void)
+{
+ exit(0);
+}
+static inline int ksft_exit_fail(void)
+{
+ exit(1);
+}
+#endif
+
+
+/* serializes shared list access */
+pthread_mutex_t list_lock = PTHREAD_MUTEX_INITIALIZER;
+/* serializes console output */
+pthread_mutex_t print_lock = PTHREAD_MUTEX_INITIALIZER;
+
+
+#define MAX_THREADS 128
+#define LISTSIZE 128
+
+int done = 0;
+
+struct timespec global_list[LISTSIZE];
+int listcount = 0;
+
+
+void checklist(struct timespec *list, int size)
+{
+ int i, j;
+ struct timespec *a, *b;
+
+ /* scan the list */
+ for (i = 0; i < size-1; i++) {
+ a = &list[i];
+ b = &list[i+1];
+
+ /* look for any time inconsistencies */
+ if ((b->tv_sec <= a->tv_sec) &&
+ (b->tv_nsec < a->tv_nsec)) {
+
+ /* flag other threads */
+ done = 1;
+
+ /*serialize printing to avoid junky output*/
+ pthread_mutex_lock(&print_lock);
+
+ /* dump the list */
+ printf("\n");
+ for (j = 0; j < size; j++) {
+ if (j == i)
+ printf("---------------\n");
+ printf("%lu:%lu\n", list[j].tv_sec, list[j].tv_nsec);
+ if (j == i+1)
+ printf("---------------\n");
+ }
+ printf("[FAILED]\n");
+
+ pthread_mutex_unlock(&print_lock);
+ }
+ }
+}
+
+/* The shared thread shares a global list
+ * that each thread fills while holding the lock.
+ * This stresses clock syncronization across cpus.
+ */
+void *shared_thread(void *arg)
+{
+ while (!done) {
+ /* protect the list */
+ pthread_mutex_lock(&list_lock);
+
+ /* see if we're ready to check the list */
+ if (listcount >= LISTSIZE) {
+ checklist(global_list, LISTSIZE);
+ listcount = 0;
+ }
+ clock_gettime(CLOCK_MONOTONIC, &global_list[listcount++]);
+
+ pthread_mutex_unlock(&list_lock);
+ }
+ return NULL;
+}
+
+
+/* Each independent thread fills in its own
+ * list. This stresses clock_gettime() lock contention.
+ */
+void *independent_thread(void *arg)
+{
+ struct timespec my_list[LISTSIZE];
+ int count;
+
+ while (!done) {
+ /* fill the list */
+ for (count = 0; count < LISTSIZE; count++)
+ clock_gettime(CLOCK_MONOTONIC, &my_list[count]);
+ checklist(my_list, LISTSIZE);
+ }
+ return NULL;
+}
+
+#define DEFAULT_THREAD_COUNT 8
+#define DEFAULT_RUNTIME 30
+
+int main(int argc, char **argv)
+{
+ int thread_count, i;
+ time_t start, now, runtime;
+ char buf[255];
+ pthread_t pth[MAX_THREADS];
+ int opt;
+ void *tret;
+ int ret = 0;
+ void *(*thread)(void *) = shared_thread;
+
+ thread_count = DEFAULT_THREAD_COUNT;
+ runtime = DEFAULT_RUNTIME;
+
+ /* Process arguments */
+ while ((opt = getopt(argc, argv, "t:n:i")) != -1) {
+ switch (opt) {
+ case 't':
+ runtime = atoi(optarg);
+ break;
+ case 'n':
+ thread_count = atoi(optarg);
+ break;
+ case 'i':
+ thread = independent_thread;
+ printf("using independent threads\n");
+ break;
+ default:
+ printf("Usage: %s [-t <secs>] [-n <numthreads>] [-i]\n", argv[0]);
+ printf(" -t: time to run\n");
+ printf(" -n: number of threads\n");
+ printf(" -i: use independent threads\n");
+ return -1;
+ }
+ }
+
+ if (thread_count > MAX_THREADS)
+ thread_count = MAX_THREADS;
+
+
+ setbuf(stdout, NULL);
+
+ start = time(0);
+ strftime(buf, 255, "%a, %d %b %Y %T %z", localtime(&start));
+ printf("%s\n", buf);
+ printf("Testing consistency with %i threads for %ld seconds: ", thread_count, runtime);
+
+ /* spawn */
+ for (i = 0; i < thread_count; i++)
+ pthread_create(&pth[i], 0, thread, 0);
+
+ while (time(&now) < start + runtime) {
+ sleep(1);
+ if (done) {
+ ret = 1;
+ strftime(buf, 255, "%a, %d %b %Y %T %z", localtime(&now));
+ printf("%s\n", buf);
+ goto out;
+ }
+ }
+ printf("[OK]\n");
+ done = 1;
+
+out:
+ /* wait */
+ for (i = 0; i < thread_count; i++)
+ pthread_join(pth[i], &tret);
+
+ /* die */
+ if (ret)
+ ksft_exit_fail();
+ return ksft_exit_pass();
+}
--- /dev/null
+/* valid adjtimex test
+ * by: John Stultz <john.stultz@linaro.org>
+ * (C) Copyright Linaro 2015
+ * Licensed under the GPLv2
+ *
+ * This test validates adjtimex interface with valid
+ * and invalid test data.
+ *
+ * Usage: valid-adjtimex
+ *
+ * To build:
+ * $ gcc valid-adjtimex.c -o valid-adjtimex -lrt
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <time.h>
+#include <sys/time.h>
+#include <sys/timex.h>
+#include <string.h>
+#include <signal.h>
+#include <unistd.h>
+#ifdef KTEST
+#include "../kselftest.h"
+#else
+static inline int ksft_exit_pass(void)
+{
+ exit(0);
+}
+static inline int ksft_exit_fail(void)
+{
+ exit(1);
+}
+#endif
+
+#define NSEC_PER_SEC 1000000000L
+
+/* clear NTP time_status & time_state */
+int clear_time_state(void)
+{
+ struct timex tx;
+ int ret;
+
+ tx.modes = ADJ_STATUS;
+ tx.status = 0;
+ ret = adjtimex(&tx);
+ return ret;
+}
+
+#define NUM_FREQ_VALID 32
+#define NUM_FREQ_OUTOFRANGE 4
+#define NUM_FREQ_INVALID 2
+
+long valid_freq[NUM_FREQ_VALID] = {
+ -499<<16,
+ -450<<16,
+ -400<<16,
+ -350<<16,
+ -300<<16,
+ -250<<16,
+ -200<<16,
+ -150<<16,
+ -100<<16,
+ -75<<16,
+ -50<<16,
+ -25<<16,
+ -10<<16,
+ -5<<16,
+ -1<<16,
+ -1000,
+ 1<<16,
+ 5<<16,
+ 10<<16,
+ 25<<16,
+ 50<<16,
+ 75<<16,
+ 100<<16,
+ 150<<16,
+ 200<<16,
+ 250<<16,
+ 300<<16,
+ 350<<16,
+ 400<<16,
+ 450<<16,
+ 499<<16,
+};
+
+long outofrange_freq[NUM_FREQ_OUTOFRANGE] = {
+ -1000<<16,
+ -550<<16,
+ 550<<16,
+ 1000<<16,
+};
+
+#define LONG_MAX (~0UL>>1)
+#define LONG_MIN (-LONG_MAX - 1)
+
+long invalid_freq[NUM_FREQ_INVALID] = {
+ LONG_MAX,
+ LONG_MIN,
+};
+
+int validate_freq(void)
+{
+ struct timex tx;
+ int ret, pass = 0;
+ int i;
+
+ clear_time_state();
+
+ memset(&tx, 0, sizeof(struct timex));
+ /* Set the leap second insert flag */
+
+ printf("Testing ADJ_FREQ... ");
+ for (i = 0; i < NUM_FREQ_VALID; i++) {
+ tx.modes = ADJ_FREQUENCY;
+ tx.freq = valid_freq[i];
+
+ ret = adjtimex(&tx);
+ if (ret < 0) {
+ printf("[FAIL]\n");
+ printf("Error: adjtimex(ADJ_FREQ, %ld - %ld ppm\n",
+ valid_freq[i], valid_freq[i]>>16);
+ pass = -1;
+ goto out;
+ }
+ tx.modes = 0;
+ ret = adjtimex(&tx);
+ if (tx.freq != valid_freq[i]) {
+ printf("Warning: freq value %ld not what we set it (%ld)!\n",
+ tx.freq, valid_freq[i]);
+ }
+ }
+ for (i = 0; i < NUM_FREQ_OUTOFRANGE; i++) {
+ tx.modes = ADJ_FREQUENCY;
+ tx.freq = outofrange_freq[i];
+
+ ret = adjtimex(&tx);
+ if (ret < 0) {
+ printf("[FAIL]\n");
+ printf("Error: adjtimex(ADJ_FREQ, %ld - %ld ppm\n",
+ outofrange_freq[i], outofrange_freq[i]>>16);
+ pass = -1;
+ goto out;
+ }
+ tx.modes = 0;
+ ret = adjtimex(&tx);
+ if (tx.freq == outofrange_freq[i]) {
+ printf("[FAIL]\n");
+ printf("ERROR: out of range value %ld actually set!\n",
+ tx.freq);
+ pass = -1;
+ goto out;
+ }
+ }
+
+
+ if (sizeof(long) == 8) { /* this case only applies to 64bit systems */
+ for (i = 0; i < NUM_FREQ_INVALID; i++) {
+ tx.modes = ADJ_FREQUENCY;
+ tx.freq = invalid_freq[i];
+ ret = adjtimex(&tx);
+ if (ret >= 0) {
+ printf("[FAIL]\n");
+ printf("Error: No failure on invalid ADJ_FREQUENCY %ld\n",
+ invalid_freq[i]);
+ pass = -1;
+ goto out;
+ }
+ }
+ }
+
+ printf("[OK]\n");
+out:
+ /* reset freq to zero */
+ tx.modes = ADJ_FREQUENCY;
+ tx.freq = 0;
+ ret = adjtimex(&tx);
+
+ return pass;
+}
+
+
+int main(int argc, char **argv)
+{
+ if (validate_freq())
+ return ksft_exit_fail();
+
+ return ksft_exit_pass();
+}
# No binaries, but make sure arg-less "make" doesn't trigger "run_tests"
all:
-run_tests: all
- ./test_user_copy.sh
+TEST_PROGS := test_user_copy.sh
+
+include ../lib.mk
# Makefile for vm selftests
-CC = $(CROSS_COMPILE)gcc
CFLAGS = -Wall
BINARIES = hugepage-mmap hugepage-shm map_hugetlb thuge-gen hugetlbfstest
BINARIES += transhuge-stress
%: %.c
$(CC) $(CFLAGS) -o $@ $^ -lrt
-run_tests: all
- @/bin/sh ./run_vmtests || (echo "vmtests: [FAIL]"; exit 1)
+TEST_PROGS := run_vmtests
+TEST_FILES := $(BINARIES)
+
+include ../lib.mk
clean:
$(RM) $(BINARIES)
--- /dev/null
+*_32
+*_64
--- /dev/null
+.PHONY: all all_32 all_64 check_build32 clean run_tests
+
+TARGETS_C_BOTHBITS := sigreturn
+
+BINARIES_32 := $(TARGETS_C_BOTHBITS:%=%_32)
+BINARIES_64 := $(TARGETS_C_BOTHBITS:%=%_64)
+
+CFLAGS := -O2 -g -std=gnu99 -pthread -Wall
+
+UNAME_P := $(shell uname -p)
+
+# Always build 32-bit tests
+all: all_32
+
+# If we're on a 64-bit host, build 64-bit tests as well
+ifeq ($(shell uname -p),x86_64)
+all: all_64
+endif
+
+all_32: check_build32 $(BINARIES_32)
+
+all_64: $(BINARIES_64)
+
+clean:
+ $(RM) $(BINARIES_32) $(BINARIES_64)
+
+run_tests:
+ ./run_x86_tests.sh
+
+$(TARGETS_C_BOTHBITS:%=%_32): %_32: %.c
+ $(CC) -m32 -o $@ $(CFLAGS) $(EXTRA_CFLAGS) $^ -lrt -ldl
+
+$(TARGETS_C_BOTHBITS:%=%_64): %_64: %.c
+ $(CC) -m64 -o $@ $(CFLAGS) $(EXTRA_CFLAGS) $^ -lrt -ldl
+
+check_build32:
+ @if ! $(CC) -m32 -o /dev/null trivial_32bit_program.c; then \
+ echo "Warning: you seem to have a broken 32-bit build" 2>&1; \
+ echo "environment. If you are using a Debian-like"; \
+ echo " distribution, try:"; \
+ echo ""; \
+ echo " apt-get install gcc-multilib libc6-i386 libc6-dev-i386"; \
+ echo ""; \
+ echo "If you are using a Fedora-like distribution, try:"; \
+ echo ""; \
+ echo " yum install glibc-devel.*i686"; \
+ exit 1; \
+ fi
--- /dev/null
+#!/bin/bash
+
+# This is deliberately minimal. IMO kselftests should provide a standard
+# script here.
+./sigreturn_32 || exit 1
+
+if [[ "$uname -p" -eq "x86_64" ]]; then
+ ./sigreturn_64 || exit 1
+fi
+
+exit 0
--- /dev/null
+/*
+ * sigreturn.c - tests for x86 sigreturn(2) and exit-to-userspace
+ * Copyright (c) 2014-2015 Andrew Lutomirski
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * This is a series of tests that exercises the sigreturn(2) syscall and
+ * the IRET / SYSRET paths in the kernel.
+ *
+ * For now, this focuses on the effects of unusual CS and SS values,
+ * and it has a bunch of tests to make sure that ESP/RSP is restored
+ * properly.
+ *
+ * The basic idea behind these tests is to raise(SIGUSR1) to create a
+ * sigcontext frame, plug in the values to be tested, and then return,
+ * which implicitly invokes sigreturn(2) and programs the user context
+ * as desired.
+ *
+ * For tests for which we expect sigreturn and the subsequent return to
+ * user mode to succeed, we return to a short trampoline that generates
+ * SIGTRAP so that the meat of the tests can be ordinary C code in a
+ * SIGTRAP handler.
+ *
+ * The inner workings of each test is documented below.
+ *
+ * Do not run on outdated, unpatched kernels at risk of nasty crashes.
+ */
+
+#define _GNU_SOURCE
+
+#include <sys/time.h>
+#include <time.h>
+#include <stdlib.h>
+#include <sys/syscall.h>
+#include <unistd.h>
+#include <stdio.h>
+#include <string.h>
+#include <inttypes.h>
+#include <sys/mman.h>
+#include <sys/signal.h>
+#include <sys/ucontext.h>
+#include <asm/ldt.h>
+#include <err.h>
+#include <setjmp.h>
+#include <stddef.h>
+#include <stdbool.h>
+#include <sys/ptrace.h>
+#include <sys/user.h>
+
+/*
+ * In principle, this test can run on Linux emulation layers (e.g.
+ * Illumos "LX branded zones"). Solaris-based kernels reserve LDT
+ * entries 0-5 for their own internal purposes, so start our LDT
+ * allocations above that reservation. (The tests don't pass on LX
+ * branded zones, but at least this lets them run.)
+ */
+#define LDT_OFFSET 6
+
+/* An aligned stack accessible through some of our segments. */
+static unsigned char stack16[65536] __attribute__((aligned(4096)));
+
+/*
+ * An aligned int3 instruction used as a trampoline. Some of the tests
+ * want to fish out their ss values, so this trampoline copies ss to eax
+ * before the int3.
+ */
+asm (".pushsection .text\n\t"
+ ".type int3, @function\n\t"
+ ".align 4096\n\t"
+ "int3:\n\t"
+ "mov %ss,%eax\n\t"
+ "int3\n\t"
+ ".size int3, . - int3\n\t"
+ ".align 4096, 0xcc\n\t"
+ ".popsection");
+extern char int3[4096];
+
+/*
+ * At startup, we prepapre:
+ *
+ * - ldt_nonexistent_sel: An LDT entry that doesn't exist (all-zero
+ * descriptor or out of bounds).
+ * - code16_sel: A 16-bit LDT code segment pointing to int3.
+ * - data16_sel: A 16-bit LDT data segment pointing to stack16.
+ * - npcode32_sel: A 32-bit not-present LDT code segment pointing to int3.
+ * - npdata32_sel: A 32-bit not-present LDT data segment pointing to stack16.
+ * - gdt_data16_idx: A 16-bit GDT data segment pointing to stack16.
+ * - gdt_npdata32_idx: A 32-bit not-present GDT data segment pointing to
+ * stack16.
+ *
+ * For no particularly good reason, xyz_sel is a selector value with the
+ * RPL and LDT bits filled in, whereas xyz_idx is just an index into the
+ * descriptor table. These variables will be zero if their respective
+ * segments could not be allocated.
+ */
+static unsigned short ldt_nonexistent_sel;
+static unsigned short code16_sel, data16_sel, npcode32_sel, npdata32_sel;
+
+static unsigned short gdt_data16_idx, gdt_npdata32_idx;
+
+static unsigned short GDT3(int idx)
+{
+ return (idx << 3) | 3;
+}
+
+static unsigned short LDT3(int idx)
+{
+ return (idx << 3) | 7;
+}
+
+/* Our sigaltstack scratch space. */
+static char altstack_data[SIGSTKSZ];
+
+static void sethandler(int sig, void (*handler)(int, siginfo_t *, void *),
+ int flags)
+{
+ struct sigaction sa;
+ memset(&sa, 0, sizeof(sa));
+ sa.sa_sigaction = handler;
+ sa.sa_flags = SA_SIGINFO | flags;
+ sigemptyset(&sa.sa_mask);
+ if (sigaction(sig, &sa, 0))
+ err(1, "sigaction");
+}
+
+static void clearhandler(int sig)
+{
+ struct sigaction sa;
+ memset(&sa, 0, sizeof(sa));
+ sa.sa_handler = SIG_DFL;
+ sigemptyset(&sa.sa_mask);
+ if (sigaction(sig, &sa, 0))
+ err(1, "sigaction");
+}
+
+static void add_ldt(const struct user_desc *desc, unsigned short *var,
+ const char *name)
+{
+ if (syscall(SYS_modify_ldt, 1, desc, sizeof(*desc)) == 0) {
+ *var = LDT3(desc->entry_number);
+ } else {
+ printf("[NOTE]\tFailed to create %s segment\n", name);
+ *var = 0;
+ }
+}
+
+static void setup_ldt(void)
+{
+ if ((unsigned long)stack16 > (1ULL << 32) - sizeof(stack16))
+ errx(1, "stack16 is too high\n");
+ if ((unsigned long)int3 > (1ULL << 32) - sizeof(int3))
+ errx(1, "int3 is too high\n");
+
+ ldt_nonexistent_sel = LDT3(LDT_OFFSET + 2);
+
+ const struct user_desc code16_desc = {
+ .entry_number = LDT_OFFSET + 0,
+ .base_addr = (unsigned long)int3,
+ .limit = 4095,
+ .seg_32bit = 0,
+ .contents = 2, /* Code, not conforming */
+ .read_exec_only = 0,
+ .limit_in_pages = 0,
+ .seg_not_present = 0,
+ .useable = 0
+ };
+ add_ldt(&code16_desc, &code16_sel, "code16");
+
+ const struct user_desc data16_desc = {
+ .entry_number = LDT_OFFSET + 1,
+ .base_addr = (unsigned long)stack16,
+ .limit = 0xffff,
+ .seg_32bit = 0,
+ .contents = 0, /* Data, grow-up */
+ .read_exec_only = 0,
+ .limit_in_pages = 0,
+ .seg_not_present = 0,
+ .useable = 0
+ };
+ add_ldt(&data16_desc, &data16_sel, "data16");
+
+ const struct user_desc npcode32_desc = {
+ .entry_number = LDT_OFFSET + 3,
+ .base_addr = (unsigned long)int3,
+ .limit = 4095,
+ .seg_32bit = 1,
+ .contents = 2, /* Code, not conforming */
+ .read_exec_only = 0,
+ .limit_in_pages = 0,
+ .seg_not_present = 1,
+ .useable = 0
+ };
+ add_ldt(&npcode32_desc, &npcode32_sel, "npcode32");
+
+ const struct user_desc npdata32_desc = {
+ .entry_number = LDT_OFFSET + 4,
+ .base_addr = (unsigned long)stack16,
+ .limit = 0xffff,
+ .seg_32bit = 1,
+ .contents = 0, /* Data, grow-up */
+ .read_exec_only = 0,
+ .limit_in_pages = 0,
+ .seg_not_present = 1,
+ .useable = 0
+ };
+ add_ldt(&npdata32_desc, &npdata32_sel, "npdata32");
+
+ struct user_desc gdt_data16_desc = {
+ .entry_number = -1,
+ .base_addr = (unsigned long)stack16,
+ .limit = 0xffff,
+ .seg_32bit = 0,
+ .contents = 0, /* Data, grow-up */
+ .read_exec_only = 0,
+ .limit_in_pages = 0,
+ .seg_not_present = 0,
+ .useable = 0
+ };
+
+ if (syscall(SYS_set_thread_area, &gdt_data16_desc) == 0) {
+ /*
+ * This probably indicates vulnerability to CVE-2014-8133.
+ * Merely getting here isn't definitive, though, and we'll
+ * diagnose the problem for real later on.
+ */
+ printf("[WARN]\tset_thread_area allocated data16 at index %d\n",
+ gdt_data16_desc.entry_number);
+ gdt_data16_idx = gdt_data16_desc.entry_number;
+ } else {
+ printf("[OK]\tset_thread_area refused 16-bit data\n");
+ }
+
+ struct user_desc gdt_npdata32_desc = {
+ .entry_number = -1,
+ .base_addr = (unsigned long)stack16,
+ .limit = 0xffff,
+ .seg_32bit = 1,
+ .contents = 0, /* Data, grow-up */
+ .read_exec_only = 0,
+ .limit_in_pages = 0,
+ .seg_not_present = 1,
+ .useable = 0
+ };
+
+ if (syscall(SYS_set_thread_area, &gdt_npdata32_desc) == 0) {
+ /*
+ * As a hardening measure, newer kernels don't allow this.
+ */
+ printf("[WARN]\tset_thread_area allocated npdata32 at index %d\n",
+ gdt_npdata32_desc.entry_number);
+ gdt_npdata32_idx = gdt_npdata32_desc.entry_number;
+ } else {
+ printf("[OK]\tset_thread_area refused 16-bit data\n");
+ }
+}
+
+/* State used by our signal handlers. */
+static gregset_t initial_regs, requested_regs, resulting_regs;
+
+/* Instructions for the SIGUSR1 handler. */
+static volatile unsigned short sig_cs, sig_ss;
+static volatile sig_atomic_t sig_trapped, sig_err, sig_trapno;
+
+/* Abstractions for some 32-bit vs 64-bit differences. */
+#ifdef __x86_64__
+# define REG_IP REG_RIP
+# define REG_SP REG_RSP
+# define REG_AX REG_RAX
+
+struct selectors {
+ unsigned short cs, gs, fs, ss;
+};
+
+static unsigned short *ssptr(ucontext_t *ctx)
+{
+ struct selectors *sels = (void *)&ctx->uc_mcontext.gregs[REG_CSGSFS];
+ return &sels->ss;
+}
+
+static unsigned short *csptr(ucontext_t *ctx)
+{
+ struct selectors *sels = (void *)&ctx->uc_mcontext.gregs[REG_CSGSFS];
+ return &sels->cs;
+}
+#else
+# define REG_IP REG_EIP
+# define REG_SP REG_ESP
+# define REG_AX REG_EAX
+
+static greg_t *ssptr(ucontext_t *ctx)
+{
+ return &ctx->uc_mcontext.gregs[REG_SS];
+}
+
+static greg_t *csptr(ucontext_t *ctx)
+{
+ return &ctx->uc_mcontext.gregs[REG_CS];
+}
+#endif
+
+/* Number of errors in the current test case. */
+static volatile sig_atomic_t nerrs;
+
+/*
+ * SIGUSR1 handler. Sets CS and SS as requested and points IP to the
+ * int3 trampoline. Sets SP to a large known value so that we can see
+ * whether the value round-trips back to user mode correctly.
+ */
+static void sigusr1(int sig, siginfo_t *info, void *ctx_void)
+{
+ ucontext_t *ctx = (ucontext_t*)ctx_void;
+
+ memcpy(&initial_regs, &ctx->uc_mcontext.gregs, sizeof(gregset_t));
+
+ *csptr(ctx) = sig_cs;
+ *ssptr(ctx) = sig_ss;
+
+ ctx->uc_mcontext.gregs[REG_IP] =
+ sig_cs == code16_sel ? 0 : (unsigned long)&int3;
+ ctx->uc_mcontext.gregs[REG_SP] = (unsigned long)0x8badf00d5aadc0deULL;
+ ctx->uc_mcontext.gregs[REG_AX] = 0;
+
+ memcpy(&requested_regs, &ctx->uc_mcontext.gregs, sizeof(gregset_t));
+ requested_regs[REG_AX] = *ssptr(ctx); /* The asm code does this. */
+
+ return;
+}
+
+/*
+ * Called after a successful sigreturn. Restores our state so that
+ * the original raise(SIGUSR1) returns.
+ */
+static void sigtrap(int sig, siginfo_t *info, void *ctx_void)
+{
+ ucontext_t *ctx = (ucontext_t*)ctx_void;
+
+ sig_err = ctx->uc_mcontext.gregs[REG_ERR];
+ sig_trapno = ctx->uc_mcontext.gregs[REG_TRAPNO];
+
+ unsigned short ss;
+ asm ("mov %%ss,%0" : "=r" (ss));
+
+ greg_t asm_ss = ctx->uc_mcontext.gregs[REG_AX];
+ if (asm_ss != sig_ss && sig == SIGTRAP) {
+ /* Sanity check failure. */
+ printf("[FAIL]\tSIGTRAP: ss = %hx, frame ss = %hx, ax = %llx\n",
+ ss, *ssptr(ctx), (unsigned long long)asm_ss);
+ nerrs++;
+ }
+
+ memcpy(&resulting_regs, &ctx->uc_mcontext.gregs, sizeof(gregset_t));
+ memcpy(&ctx->uc_mcontext.gregs, &initial_regs, sizeof(gregset_t));
+
+ sig_trapped = sig;
+}
+
+/*
+ * Checks a given selector for its code bitness or returns -1 if it's not
+ * a usable code segment selector.
+ */
+int cs_bitness(unsigned short cs)
+{
+ uint32_t valid = 0, ar;
+ asm ("lar %[cs], %[ar]\n\t"
+ "jnz 1f\n\t"
+ "mov $1, %[valid]\n\t"
+ "1:"
+ : [ar] "=r" (ar), [valid] "+rm" (valid)
+ : [cs] "r" (cs));
+
+ if (!valid)
+ return -1;
+
+ bool db = (ar & (1 << 22));
+ bool l = (ar & (1 << 21));
+
+ if (!(ar & (1<<11)))
+ return -1; /* Not code. */
+
+ if (l && !db)
+ return 64;
+ else if (!l && db)
+ return 32;
+ else if (!l && !db)
+ return 16;
+ else
+ return -1; /* Unknown bitness. */
+}
+
+/* Finds a usable code segment of the requested bitness. */
+int find_cs(int bitness)
+{
+ unsigned short my_cs;
+
+ asm ("mov %%cs,%0" : "=r" (my_cs));
+
+ if (cs_bitness(my_cs) == bitness)
+ return my_cs;
+ if (cs_bitness(my_cs + (2 << 3)) == bitness)
+ return my_cs + (2 << 3);
+ if (my_cs > (2<<3) && cs_bitness(my_cs - (2 << 3)) == bitness)
+ return my_cs - (2 << 3);
+ if (cs_bitness(code16_sel) == bitness)
+ return code16_sel;
+
+ printf("[WARN]\tCould not find %d-bit CS\n", bitness);
+ return -1;
+}
+
+static int test_valid_sigreturn(int cs_bits, bool use_16bit_ss, int force_ss)
+{
+ int cs = find_cs(cs_bits);
+ if (cs == -1) {
+ printf("[SKIP]\tCode segment unavailable for %d-bit CS, %d-bit SS\n",
+ cs_bits, use_16bit_ss ? 16 : 32);
+ return 0;
+ }
+
+ if (force_ss != -1) {
+ sig_ss = force_ss;
+ } else {
+ if (use_16bit_ss) {
+ if (!data16_sel) {
+ printf("[SKIP]\tData segment unavailable for %d-bit CS, 16-bit SS\n",
+ cs_bits);
+ return 0;
+ }
+ sig_ss = data16_sel;
+ } else {
+ asm volatile ("mov %%ss,%0" : "=r" (sig_ss));
+ }
+ }
+
+ sig_cs = cs;
+
+ printf("[RUN]\tValid sigreturn: %d-bit CS (%hx), %d-bit SS (%hx%s)\n",
+ cs_bits, sig_cs, use_16bit_ss ? 16 : 32, sig_ss,
+ (sig_ss & 4) ? "" : ", GDT");
+
+ raise(SIGUSR1);
+
+ nerrs = 0;
+
+ /*
+ * Check that each register had an acceptable value when the
+ * int3 trampoline was invoked.
+ */
+ for (int i = 0; i < NGREG; i++) {
+ greg_t req = requested_regs[i], res = resulting_regs[i];
+ if (i == REG_TRAPNO || i == REG_IP)
+ continue; /* don't care */
+ if (i == REG_SP) {
+ printf("\tSP: %llx -> %llx\n", (unsigned long long)req,
+ (unsigned long long)res);
+
+ /*
+ * In many circumstances, the high 32 bits of rsp
+ * are zeroed. For example, we could be a real
+ * 32-bit program, or we could hit any of a number
+ * of poorly-documented IRET or segmented ESP
+ * oddities. If this happens, it's okay.
+ */
+ if (res == (req & 0xFFFFFFFF))
+ continue; /* OK; not expected to work */
+ }
+
+ bool ignore_reg = false;
+#if __i386__
+ if (i == REG_UESP)
+ ignore_reg = true;
+#else
+ if (i == REG_CSGSFS) {
+ struct selectors *req_sels =
+ (void *)&requested_regs[REG_CSGSFS];
+ struct selectors *res_sels =
+ (void *)&resulting_regs[REG_CSGSFS];
+ if (req_sels->cs != res_sels->cs) {
+ printf("[FAIL]\tCS mismatch: requested 0x%hx; got 0x%hx\n",
+ req_sels->cs, res_sels->cs);
+ nerrs++;
+ }
+
+ if (req_sels->ss != res_sels->ss) {
+ printf("[FAIL]\tSS mismatch: requested 0x%hx; got 0x%hx\n",
+ req_sels->ss, res_sels->ss);
+ nerrs++;
+ }
+
+ continue;
+ }
+#endif
+
+ /* Sanity check on the kernel */
+ if (i == REG_AX && requested_regs[i] != resulting_regs[i]) {
+ printf("[FAIL]\tAX (saved SP) mismatch: requested 0x%llx; got 0x%llx\n",
+ (unsigned long long)requested_regs[i],
+ (unsigned long long)resulting_regs[i]);
+ nerrs++;
+ continue;
+ }
+
+ if (requested_regs[i] != resulting_regs[i] && !ignore_reg) {
+ /*
+ * SP is particularly interesting here. The
+ * usual cause of failures is that we hit the
+ * nasty IRET case of returning to a 16-bit SS,
+ * in which case bits 16:31 of the *kernel*
+ * stack pointer persist in ESP.
+ */
+ printf("[FAIL]\tReg %d mismatch: requested 0x%llx; got 0x%llx\n",
+ i, (unsigned long long)requested_regs[i],
+ (unsigned long long)resulting_regs[i]);
+ nerrs++;
+ }
+ }
+
+ if (nerrs == 0)
+ printf("[OK]\tall registers okay\n");
+
+ return nerrs;
+}
+
+static int test_bad_iret(int cs_bits, unsigned short ss, int force_cs)
+{
+ int cs = force_cs == -1 ? find_cs(cs_bits) : force_cs;
+ if (cs == -1)
+ return 0;
+
+ sig_cs = cs;
+ sig_ss = ss;
+
+ printf("[RUN]\t%d-bit CS (%hx), bogus SS (%hx)\n",
+ cs_bits, sig_cs, sig_ss);
+
+ sig_trapped = 0;
+ raise(SIGUSR1);
+ if (sig_trapped) {
+ char errdesc[32] = "";
+ if (sig_err) {
+ const char *src = (sig_err & 1) ? " EXT" : "";
+ const char *table;
+ if ((sig_err & 0x6) == 0x0)
+ table = "GDT";
+ else if ((sig_err & 0x6) == 0x4)
+ table = "LDT";
+ else if ((sig_err & 0x6) == 0x2)
+ table = "IDT";
+ else
+ table = "???";
+
+ sprintf(errdesc, "%s%s index %d, ",
+ table, src, sig_err >> 3);
+ }
+
+ char trapname[32];
+ if (sig_trapno == 13)
+ strcpy(trapname, "GP");
+ else if (sig_trapno == 11)
+ strcpy(trapname, "NP");
+ else if (sig_trapno == 12)
+ strcpy(trapname, "SS");
+ else if (sig_trapno == 32)
+ strcpy(trapname, "IRET"); /* X86_TRAP_IRET */
+ else
+ sprintf(trapname, "%d", sig_trapno);
+
+ printf("[OK]\tGot #%s(0x%lx) (i.e. %s%s)\n",
+ trapname, (unsigned long)sig_err,
+ errdesc, strsignal(sig_trapped));
+ return 0;
+ } else {
+ printf("[FAIL]\tDid not get SIGSEGV\n");
+ return 1;
+ }
+}
+
+int main()
+{
+ int total_nerrs = 0;
+ unsigned short my_cs, my_ss;
+
+ asm volatile ("mov %%cs,%0" : "=r" (my_cs));
+ asm volatile ("mov %%ss,%0" : "=r" (my_ss));
+ setup_ldt();
+
+ stack_t stack = {
+ .ss_sp = altstack_data,
+ .ss_size = SIGSTKSZ,
+ };
+ if (sigaltstack(&stack, NULL) != 0)
+ err(1, "sigaltstack");
+
+ sethandler(SIGUSR1, sigusr1, 0);
+ sethandler(SIGTRAP, sigtrap, SA_ONSTACK);
+
+ /* Easy cases: return to a 32-bit SS in each possible CS bitness. */
+ total_nerrs += test_valid_sigreturn(64, false, -1);
+ total_nerrs += test_valid_sigreturn(32, false, -1);
+ total_nerrs += test_valid_sigreturn(16, false, -1);
+
+ /*
+ * Test easy espfix cases: return to a 16-bit LDT SS in each possible
+ * CS bitness. NB: with a long mode CS, the SS bitness is irrelevant.
+ *
+ * This catches the original missing-espfix-on-64-bit-kernels issue
+ * as well as CVE-2014-8134.
+ */
+ total_nerrs += test_valid_sigreturn(64, true, -1);
+ total_nerrs += test_valid_sigreturn(32, true, -1);
+ total_nerrs += test_valid_sigreturn(16, true, -1);
+
+ if (gdt_data16_idx) {
+ /*
+ * For performance reasons, Linux skips espfix if SS points
+ * to the GDT. If we were able to allocate a 16-bit SS in
+ * the GDT, see if it leaks parts of the kernel stack pointer.
+ *
+ * This tests for CVE-2014-8133.
+ */
+ total_nerrs += test_valid_sigreturn(64, true,
+ GDT3(gdt_data16_idx));
+ total_nerrs += test_valid_sigreturn(32, true,
+ GDT3(gdt_data16_idx));
+ total_nerrs += test_valid_sigreturn(16, true,
+ GDT3(gdt_data16_idx));
+ }
+
+ /*
+ * We're done testing valid sigreturn cases. Now we test states
+ * for which sigreturn itself will succeed but the subsequent
+ * entry to user mode will fail.
+ *
+ * Depending on the failure mode and the kernel bitness, these
+ * entry failures can generate SIGSEGV, SIGBUS, or SIGILL.
+ */
+ clearhandler(SIGTRAP);
+ sethandler(SIGSEGV, sigtrap, SA_ONSTACK);
+ sethandler(SIGBUS, sigtrap, SA_ONSTACK);
+ sethandler(SIGILL, sigtrap, SA_ONSTACK); /* 32-bit kernels do this */
+
+ /* Easy failures: invalid SS, resulting in #GP(0) */
+ test_bad_iret(64, ldt_nonexistent_sel, -1);
+ test_bad_iret(32, ldt_nonexistent_sel, -1);
+ test_bad_iret(16, ldt_nonexistent_sel, -1);
+
+ /* These fail because SS isn't a data segment, resulting in #GP(SS) */
+ test_bad_iret(64, my_cs, -1);
+ test_bad_iret(32, my_cs, -1);
+ test_bad_iret(16, my_cs, -1);
+
+ /* Try to return to a not-present code segment, triggering #NP(SS). */
+ test_bad_iret(32, my_ss, npcode32_sel);
+
+ /*
+ * Try to return to a not-present but otherwise valid data segment.
+ * This will cause IRET to fail with #SS on the espfix stack. This
+ * exercises CVE-2014-9322.
+ *
+ * Note that, if espfix is enabled, 64-bit Linux will lose track
+ * of the actual cause of failure and report #GP(0) instead.
+ * This would be very difficult for Linux to avoid, because
+ * espfix64 causes IRET failures to be promoted to #DF, so the
+ * original exception frame is never pushed onto the stack.
+ */
+ test_bad_iret(32, npdata32_sel, -1);
+
+ /*
+ * Try to return to a not-present but otherwise valid data
+ * segment without invoking espfix. Newer kernels don't allow
+ * this to happen in the first place. On older kernels, though,
+ * this can trigger CVE-2014-9322.
+ */
+ if (gdt_npdata32_idx)
+ test_bad_iret(32, GDT3(gdt_npdata32_idx), -1);
+
+ return total_nerrs ? 1 : 0;
+}
--- /dev/null
+/*
+ * Trivial program to check that we have a valid 32-bit build environment.
+ * Copyright (c) 2015 Andy Lutomirski
+ * GPL v2
+ */
+
+#include <stdio.h>
+
+int main()
+{
+ printf("\n");
+
+ return 0;
+}
return IRQ_HANDLED;
}
+/*
+ * Work function for handling the backup timer that we schedule when a vcpu is
+ * no longer running, but had a timer programmed to fire in the future.
+ */
static void kvm_timer_inject_irq_work(struct work_struct *work)
{
struct kvm_vcpu *vcpu;
vcpu = container_of(work, struct kvm_vcpu, arch.timer_cpu.expired);
vcpu->arch.timer_cpu.armed = false;
- kvm_timer_inject_irq(vcpu);
+
+ /*
+ * If the vcpu is blocked we want to wake it up so that it will see
+ * the timer has expired when entering the guest.
+ */
+ kvm_vcpu_kick(vcpu);
}
static enum hrtimer_restart kvm_timer_expire(struct hrtimer *hrt)
return HRTIMER_NORESTART;
}
+bool kvm_timer_should_fire(struct kvm_vcpu *vcpu)
+{
+ struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
+ cycle_t cval, now;
+
+ if ((timer->cntv_ctl & ARCH_TIMER_CTRL_IT_MASK) ||
+ !(timer->cntv_ctl & ARCH_TIMER_CTRL_ENABLE))
+ return false;
+
+ cval = timer->cntv_cval;
+ now = kvm_phys_timer_read() - vcpu->kvm->arch.timer.cntvoff;
+
+ return cval <= now;
+}
+
/**
* kvm_timer_flush_hwstate - prepare to move the virt timer to the cpu
* @vcpu: The vcpu pointer
* populate the CPU timer again.
*/
timer_disarm(timer);
+
+ /*
+ * If the timer expired while we were not scheduled, now is the time
+ * to inject it.
+ */
+ if (kvm_timer_should_fire(vcpu))
+ kvm_timer_inject_irq(vcpu);
}
/**
cycle_t cval, now;
u64 ns;
- if ((timer->cntv_ctl & ARCH_TIMER_CTRL_IT_MASK) ||
- !(timer->cntv_ctl & ARCH_TIMER_CTRL_ENABLE))
- return;
-
- cval = timer->cntv_cval;
- now = kvm_phys_timer_read() - vcpu->kvm->arch.timer.cntvoff;
-
BUG_ON(timer_is_armed(timer));
- if (cval <= now) {
+ if (kvm_timer_should_fire(vcpu)) {
/*
* Timer has already expired while we were not
* looking. Inject the interrupt and carry on.
return;
}
+ cval = timer->cntv_cval;
+ now = kvm_phys_timer_read() - vcpu->kvm->arch.timer.cntvoff;
+
ns = cyclecounter_cyc2ns(timecounter->cc, cval - now, timecounter->mask,
&timecounter->frac);
timer_arm(timer, ns);
vcpu->vcpu_id);
}
+static bool handle_mmio_set_active_reg(struct kvm_vcpu *vcpu,
+ struct kvm_exit_mmio *mmio,
+ phys_addr_t offset)
+{
+ return vgic_handle_set_active_reg(vcpu->kvm, mmio, offset,
+ vcpu->vcpu_id);
+}
+
+static bool handle_mmio_clear_active_reg(struct kvm_vcpu *vcpu,
+ struct kvm_exit_mmio *mmio,
+ phys_addr_t offset)
+{
+ return vgic_handle_clear_active_reg(vcpu->kvm, mmio, offset,
+ vcpu->vcpu_id);
+}
+
static bool handle_mmio_priority_reg(struct kvm_vcpu *vcpu,
struct kvm_exit_mmio *mmio,
phys_addr_t offset)
return write_set_clear_sgi_pend_reg(vcpu, mmio, offset, false);
}
-static const struct kvm_mmio_range vgic_dist_ranges[] = {
+static const struct vgic_io_range vgic_dist_ranges[] = {
{
.base = GIC_DIST_CTRL,
.len = 12,
.base = GIC_DIST_ACTIVE_SET,
.len = VGIC_MAX_IRQS / 8,
.bits_per_irq = 1,
- .handle_mmio = handle_mmio_raz_wi,
+ .handle_mmio = handle_mmio_set_active_reg,
},
{
.base = GIC_DIST_ACTIVE_CLEAR,
.len = VGIC_MAX_IRQS / 8,
.bits_per_irq = 1,
- .handle_mmio = handle_mmio_raz_wi,
+ .handle_mmio = handle_mmio_clear_active_reg,
},
{
.base = GIC_DIST_PRI,
{}
};
-static bool vgic_v2_handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *run,
- struct kvm_exit_mmio *mmio)
-{
- unsigned long base = vcpu->kvm->arch.vgic.vgic_dist_base;
-
- if (!is_in_range(mmio->phys_addr, mmio->len, base,
- KVM_VGIC_V2_DIST_SIZE))
- return false;
-
- /* GICv2 does not support accesses wider than 32 bits */
- if (mmio->len > 4) {
- kvm_inject_dabt(vcpu, mmio->phys_addr);
- return true;
- }
-
- return vgic_handle_mmio_range(vcpu, run, mmio, vgic_dist_ranges, base);
-}
-
static void vgic_dispatch_sgi(struct kvm_vcpu *vcpu, u32 reg)
{
struct kvm *kvm = vcpu->kvm;
static int vgic_v2_map_resources(struct kvm *kvm,
const struct vgic_params *params)
{
+ struct vgic_dist *dist = &kvm->arch.vgic;
int ret = 0;
if (!irqchip_in_kernel(kvm))
if (vgic_ready(kvm))
goto out;
- if (IS_VGIC_ADDR_UNDEF(kvm->arch.vgic.vgic_dist_base) ||
- IS_VGIC_ADDR_UNDEF(kvm->arch.vgic.vgic_cpu_base)) {
+ if (IS_VGIC_ADDR_UNDEF(dist->vgic_dist_base) ||
+ IS_VGIC_ADDR_UNDEF(dist->vgic_cpu_base)) {
kvm_err("Need to set vgic cpu and dist addresses first\n");
ret = -ENXIO;
goto out;
}
+ vgic_register_kvm_io_dev(kvm, dist->vgic_dist_base,
+ KVM_VGIC_V2_DIST_SIZE,
+ vgic_dist_ranges, -1, &dist->dist_iodev);
+
/*
* Initialize the vgic if this hasn't already been done on demand by
* accessing the vgic state from userspace.
ret = vgic_init(kvm);
if (ret) {
kvm_err("Unable to allocate maps\n");
- goto out;
+ goto out_unregister;
}
- ret = kvm_phys_addr_ioremap(kvm, kvm->arch.vgic.vgic_cpu_base,
+ ret = kvm_phys_addr_ioremap(kvm, dist->vgic_cpu_base,
params->vcpu_base, KVM_VGIC_V2_CPU_SIZE,
true);
if (ret) {
kvm_err("Unable to remap VGIC CPU to VCPU\n");
- goto out;
+ goto out_unregister;
}
- kvm->arch.vgic.ready = true;
+ dist->ready = true;
+ goto out;
+
+out_unregister:
+ kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &dist->dist_iodev.dev);
+
out:
if (ret)
kvm_vgic_destroy(kvm);
{
struct vgic_dist *dist = &kvm->arch.vgic;
- dist->vm_ops.handle_mmio = vgic_v2_handle_mmio;
dist->vm_ops.queue_sgi = vgic_v2_queue_sgi;
dist->vm_ops.add_sgi_source = vgic_v2_add_sgi_source;
dist->vm_ops.init_model = vgic_v2_init_model;
* CPU Interface Register accesses - these are not accessed by the VM, but by
* user space for saving and restoring VGIC state.
*/
-static const struct kvm_mmio_range vgic_cpu_ranges[] = {
+static const struct vgic_io_range vgic_cpu_ranges[] = {
{
.base = GIC_CPU_CTRL,
.len = 12,
struct kvm_device_attr *attr,
u32 *reg, bool is_write)
{
- const struct kvm_mmio_range *r = NULL, *ranges;
+ const struct vgic_io_range *r = NULL, *ranges;
phys_addr_t offset;
int ret, cpuid, c;
struct kvm_vcpu *vcpu, *tmp_vcpu;
struct vgic_dist *vgic;
struct kvm_exit_mmio mmio;
+ u32 data;
offset = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK;
cpuid = (attr->attr & KVM_DEV_ARM_VGIC_CPUID_MASK) >>
mmio.len = 4;
mmio.is_write = is_write;
+ mmio.data = &data;
if (is_write)
mmio_data_write(&mmio, ~0, *reg);
switch (attr->group) {
default:
BUG();
}
- r = vgic_find_range(ranges, &mmio, offset);
+ r = vgic_find_range(ranges, 4, offset);
if (unlikely(!r || !r->handle_mmio)) {
ret = -ENXIO;
return false;
}
-static const struct kvm_mmio_range vgic_v3_dist_ranges[] = {
+static const struct vgic_io_range vgic_v3_dist_ranges[] = {
{
.base = GICD_CTLR,
.len = 0x04,
{},
};
+static bool handle_mmio_ctlr_redist(struct kvm_vcpu *vcpu,
+ struct kvm_exit_mmio *mmio,
+ phys_addr_t offset)
+{
+ /* since we don't support LPIs, this register is zero for now */
+ vgic_reg_access(mmio, NULL, offset,
+ ACCESS_READ_RAZ | ACCESS_WRITE_IGNORED);
+ return false;
+}
+
+static bool handle_mmio_typer_redist(struct kvm_vcpu *vcpu,
+ struct kvm_exit_mmio *mmio,
+ phys_addr_t offset)
+{
+ u32 reg;
+ u64 mpidr;
+ struct kvm_vcpu *redist_vcpu = mmio->private;
+ int target_vcpu_id = redist_vcpu->vcpu_id;
+
+ /* the upper 32 bits contain the affinity value */
+ if ((offset & ~3) == 4) {
+ mpidr = kvm_vcpu_get_mpidr_aff(redist_vcpu);
+ reg = compress_mpidr(mpidr);
+
+ vgic_reg_access(mmio, ®, offset,
+ ACCESS_READ_VALUE | ACCESS_WRITE_IGNORED);
+ return false;
+ }
+
+ reg = redist_vcpu->vcpu_id << 8;
+ if (target_vcpu_id == atomic_read(&vcpu->kvm->online_vcpus) - 1)
+ reg |= GICR_TYPER_LAST;
+ vgic_reg_access(mmio, ®, offset,
+ ACCESS_READ_VALUE | ACCESS_WRITE_IGNORED);
+ return false;
+}
+
static bool handle_mmio_set_enable_reg_redist(struct kvm_vcpu *vcpu,
struct kvm_exit_mmio *mmio,
phys_addr_t offset)
return vgic_handle_cfg_reg(reg, mmio, offset);
}
-static const struct kvm_mmio_range vgic_redist_sgi_ranges[] = {
+#define SGI_base(x) ((x) + SZ_64K)
+
+static const struct vgic_io_range vgic_redist_ranges[] = {
+ {
+ .base = GICR_CTLR,
+ .len = 0x04,
+ .bits_per_irq = 0,
+ .handle_mmio = handle_mmio_ctlr_redist,
+ },
+ {
+ .base = GICR_TYPER,
+ .len = 0x08,
+ .bits_per_irq = 0,
+ .handle_mmio = handle_mmio_typer_redist,
+ },
+ {
+ .base = GICR_IIDR,
+ .len = 0x04,
+ .bits_per_irq = 0,
+ .handle_mmio = handle_mmio_iidr,
+ },
+ {
+ .base = GICR_WAKER,
+ .len = 0x04,
+ .bits_per_irq = 0,
+ .handle_mmio = handle_mmio_raz_wi,
+ },
{
- .base = GICR_IGROUPR0,
+ .base = GICR_IDREGS,
+ .len = 0x30,
+ .bits_per_irq = 0,
+ .handle_mmio = handle_mmio_idregs,
+ },
+ {
+ .base = SGI_base(GICR_IGROUPR0),
.len = 0x04,
.bits_per_irq = 1,
.handle_mmio = handle_mmio_rao_wi,
},
{
- .base = GICR_ISENABLER0,
+ .base = SGI_base(GICR_ISENABLER0),
.len = 0x04,
.bits_per_irq = 1,
.handle_mmio = handle_mmio_set_enable_reg_redist,
},
{
- .base = GICR_ICENABLER0,
+ .base = SGI_base(GICR_ICENABLER0),
.len = 0x04,
.bits_per_irq = 1,
.handle_mmio = handle_mmio_clear_enable_reg_redist,
},
{
- .base = GICR_ISPENDR0,
+ .base = SGI_base(GICR_ISPENDR0),
.len = 0x04,
.bits_per_irq = 1,
.handle_mmio = handle_mmio_set_pending_reg_redist,
},
{
- .base = GICR_ICPENDR0,
+ .base = SGI_base(GICR_ICPENDR0),
.len = 0x04,
.bits_per_irq = 1,
.handle_mmio = handle_mmio_clear_pending_reg_redist,
},
{
- .base = GICR_ISACTIVER0,
+ .base = SGI_base(GICR_ISACTIVER0),
.len = 0x04,
.bits_per_irq = 1,
.handle_mmio = handle_mmio_raz_wi,
},
{
- .base = GICR_ICACTIVER0,
+ .base = SGI_base(GICR_ICACTIVER0),
.len = 0x04,
.bits_per_irq = 1,
.handle_mmio = handle_mmio_raz_wi,
},
{
- .base = GICR_IPRIORITYR0,
+ .base = SGI_base(GICR_IPRIORITYR0),
.len = 0x20,
.bits_per_irq = 8,
.handle_mmio = handle_mmio_priority_reg_redist,
},
{
- .base = GICR_ICFGR0,
+ .base = SGI_base(GICR_ICFGR0),
.len = 0x08,
.bits_per_irq = 2,
.handle_mmio = handle_mmio_cfg_reg_redist,
},
{
- .base = GICR_IGRPMODR0,
+ .base = SGI_base(GICR_IGRPMODR0),
.len = 0x04,
.bits_per_irq = 1,
.handle_mmio = handle_mmio_raz_wi,
},
{
- .base = GICR_NSACR,
+ .base = SGI_base(GICR_NSACR),
.len = 0x04,
.handle_mmio = handle_mmio_raz_wi,
},
{},
};
-static bool handle_mmio_ctlr_redist(struct kvm_vcpu *vcpu,
- struct kvm_exit_mmio *mmio,
- phys_addr_t offset)
-{
- /* since we don't support LPIs, this register is zero for now */
- vgic_reg_access(mmio, NULL, offset,
- ACCESS_READ_RAZ | ACCESS_WRITE_IGNORED);
- return false;
-}
-
-static bool handle_mmio_typer_redist(struct kvm_vcpu *vcpu,
- struct kvm_exit_mmio *mmio,
- phys_addr_t offset)
-{
- u32 reg;
- u64 mpidr;
- struct kvm_vcpu *redist_vcpu = mmio->private;
- int target_vcpu_id = redist_vcpu->vcpu_id;
-
- /* the upper 32 bits contain the affinity value */
- if ((offset & ~3) == 4) {
- mpidr = kvm_vcpu_get_mpidr_aff(redist_vcpu);
- reg = compress_mpidr(mpidr);
-
- vgic_reg_access(mmio, ®, offset,
- ACCESS_READ_VALUE | ACCESS_WRITE_IGNORED);
- return false;
- }
-
- reg = redist_vcpu->vcpu_id << 8;
- if (target_vcpu_id == atomic_read(&vcpu->kvm->online_vcpus) - 1)
- reg |= GICR_TYPER_LAST;
- vgic_reg_access(mmio, ®, offset,
- ACCESS_READ_VALUE | ACCESS_WRITE_IGNORED);
- return false;
-}
-
-static const struct kvm_mmio_range vgic_redist_ranges[] = {
- {
- .base = GICR_CTLR,
- .len = 0x04,
- .bits_per_irq = 0,
- .handle_mmio = handle_mmio_ctlr_redist,
- },
- {
- .base = GICR_TYPER,
- .len = 0x08,
- .bits_per_irq = 0,
- .handle_mmio = handle_mmio_typer_redist,
- },
- {
- .base = GICR_IIDR,
- .len = 0x04,
- .bits_per_irq = 0,
- .handle_mmio = handle_mmio_iidr,
- },
- {
- .base = GICR_WAKER,
- .len = 0x04,
- .bits_per_irq = 0,
- .handle_mmio = handle_mmio_raz_wi,
- },
- {
- .base = GICR_IDREGS,
- .len = 0x30,
- .bits_per_irq = 0,
- .handle_mmio = handle_mmio_idregs,
- },
- {},
-};
-
-/*
- * This function splits accesses between the distributor and the two
- * redistributor parts (private/SPI). As each redistributor is accessible
- * from any CPU, we have to determine the affected VCPU by taking the faulting
- * address into account. We then pass this VCPU to the handler function via
- * the private parameter.
- */
-#define SGI_BASE_OFFSET SZ_64K
-static bool vgic_v3_handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *run,
- struct kvm_exit_mmio *mmio)
-{
- struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
- unsigned long dbase = dist->vgic_dist_base;
- unsigned long rdbase = dist->vgic_redist_base;
- int nrcpus = atomic_read(&vcpu->kvm->online_vcpus);
- int vcpu_id;
- const struct kvm_mmio_range *mmio_range;
-
- if (is_in_range(mmio->phys_addr, mmio->len, dbase, GIC_V3_DIST_SIZE)) {
- return vgic_handle_mmio_range(vcpu, run, mmio,
- vgic_v3_dist_ranges, dbase);
- }
-
- if (!is_in_range(mmio->phys_addr, mmio->len, rdbase,
- GIC_V3_REDIST_SIZE * nrcpus))
- return false;
-
- vcpu_id = (mmio->phys_addr - rdbase) / GIC_V3_REDIST_SIZE;
- rdbase += (vcpu_id * GIC_V3_REDIST_SIZE);
- mmio->private = kvm_get_vcpu(vcpu->kvm, vcpu_id);
-
- if (mmio->phys_addr >= rdbase + SGI_BASE_OFFSET) {
- rdbase += SGI_BASE_OFFSET;
- mmio_range = vgic_redist_sgi_ranges;
- } else {
- mmio_range = vgic_redist_ranges;
- }
- return vgic_handle_mmio_range(vcpu, run, mmio, mmio_range, rdbase);
-}
-
static bool vgic_v3_queue_sgi(struct kvm_vcpu *vcpu, int irq)
{
if (vgic_queue_irq(vcpu, 0, irq)) {
{
int ret = 0;
struct vgic_dist *dist = &kvm->arch.vgic;
+ gpa_t rdbase = dist->vgic_redist_base;
+ struct vgic_io_device *iodevs = NULL;
+ int i;
if (!irqchip_in_kernel(kvm))
return 0;
goto out;
}
- kvm->arch.vgic.ready = true;
+ ret = vgic_register_kvm_io_dev(kvm, dist->vgic_dist_base,
+ GIC_V3_DIST_SIZE, vgic_v3_dist_ranges,
+ -1, &dist->dist_iodev);
+ if (ret)
+ goto out;
+
+ iodevs = kcalloc(dist->nr_cpus, sizeof(iodevs[0]), GFP_KERNEL);
+ if (!iodevs) {
+ ret = -ENOMEM;
+ goto out_unregister;
+ }
+
+ for (i = 0; i < dist->nr_cpus; i++) {
+ ret = vgic_register_kvm_io_dev(kvm, rdbase,
+ SZ_128K, vgic_redist_ranges,
+ i, &iodevs[i]);
+ if (ret)
+ goto out_unregister;
+ rdbase += GIC_V3_REDIST_SIZE;
+ }
+
+ dist->redist_iodevs = iodevs;
+ dist->ready = true;
+ goto out;
+
+out_unregister:
+ kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &dist->dist_iodev.dev);
+ if (iodevs) {
+ for (i = 0; i < dist->nr_cpus; i++) {
+ if (iodevs[i].dev.ops)
+ kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS,
+ &iodevs[i].dev);
+ }
+ }
+
out:
if (ret)
kvm_vgic_destroy(kvm);
{
struct vgic_dist *dist = &kvm->arch.vgic;
- dist->vm_ops.handle_mmio = vgic_v3_handle_mmio;
dist->vm_ops.queue_sgi = vgic_v3_queue_sgi;
dist->vm_ops.add_sgi_source = vgic_v3_add_sgi_source;
dist->vm_ops.init_model = vgic_v3_init_model;
#include <asm/kvm_emulate.h>
#include <asm/kvm_arm.h>
#include <asm/kvm_mmu.h>
+#include <trace/events/kvm.h>
+#include <asm/kvm.h>
+#include <kvm/iodev.h>
/*
* How the whole thing works (courtesy of Christoffer Dall):
return vgic_bitmap_get_irq_val(&dist->irq_queued, vcpu->vcpu_id, irq);
}
+static int vgic_irq_is_active(struct kvm_vcpu *vcpu, int irq)
+{
+ struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
+
+ return vgic_bitmap_get_irq_val(&dist->irq_active, vcpu->vcpu_id, irq);
+}
+
static void vgic_irq_set_queued(struct kvm_vcpu *vcpu, int irq)
{
struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
vgic_bitmap_set_irq_val(&dist->irq_queued, vcpu->vcpu_id, irq, 0);
}
+static void vgic_irq_set_active(struct kvm_vcpu *vcpu, int irq)
+{
+ struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
+
+ vgic_bitmap_set_irq_val(&dist->irq_active, vcpu->vcpu_id, irq, 1);
+}
+
+static void vgic_irq_clear_active(struct kvm_vcpu *vcpu, int irq)
+{
+ struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
+
+ vgic_bitmap_set_irq_val(&dist->irq_active, vcpu->vcpu_id, irq, 0);
+}
+
static int vgic_dist_irq_get_level(struct kvm_vcpu *vcpu, int irq)
{
struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
return false;
}
+bool vgic_handle_set_active_reg(struct kvm *kvm,
+ struct kvm_exit_mmio *mmio,
+ phys_addr_t offset, int vcpu_id)
+{
+ u32 *reg;
+ struct vgic_dist *dist = &kvm->arch.vgic;
+
+ reg = vgic_bitmap_get_reg(&dist->irq_active, vcpu_id, offset);
+ vgic_reg_access(mmio, reg, offset,
+ ACCESS_READ_VALUE | ACCESS_WRITE_SETBIT);
+
+ if (mmio->is_write) {
+ vgic_update_state(kvm);
+ return true;
+ }
+
+ return false;
+}
+
+bool vgic_handle_clear_active_reg(struct kvm *kvm,
+ struct kvm_exit_mmio *mmio,
+ phys_addr_t offset, int vcpu_id)
+{
+ u32 *reg;
+ struct vgic_dist *dist = &kvm->arch.vgic;
+
+ reg = vgic_bitmap_get_reg(&dist->irq_active, vcpu_id, offset);
+ vgic_reg_access(mmio, reg, offset,
+ ACCESS_READ_VALUE | ACCESS_WRITE_CLEARBIT);
+
+ if (mmio->is_write) {
+ vgic_update_state(kvm);
+ return true;
+ }
+
+ return false;
+}
+
static u32 vgic_cfg_expand(u16 val)
{
u32 res = 0;
}
/**
- * vgic_unqueue_irqs - move pending IRQs from LRs to the distributor
+ * vgic_unqueue_irqs - move pending/active IRQs from LRs to the distributor
* @vgic_cpu: Pointer to the vgic_cpu struct holding the LRs
*
- * Move any pending IRQs that have already been assigned to LRs back to the
+ * Move any IRQs that have already been assigned to LRs back to the
* emulated distributor state so that the complete emulated state can be read
* from the main emulation structures without investigating the LRs.
- *
- * Note that IRQs in the active state in the LRs get their pending state moved
- * to the distributor but the active state stays in the LRs, because we don't
- * track the active state on the distributor side.
*/
void vgic_unqueue_irqs(struct kvm_vcpu *vcpu)
{
* 01: pending
* 10: active
* 11: pending and active
- *
- * If the LR holds only an active interrupt (not pending) then
- * just leave it alone.
*/
- if ((lr.state & LR_STATE_MASK) == LR_STATE_ACTIVE)
- continue;
+ BUG_ON(!(lr.state & LR_STATE_MASK));
+
+ /* Reestablish SGI source for pending and active IRQs */
+ if (lr.irq < VGIC_NR_SGIS)
+ add_sgi_source(vcpu, lr.irq, lr.source);
+
+ /*
+ * If the LR holds an active (10) or a pending and active (11)
+ * interrupt then move the active state to the
+ * distributor tracking bit.
+ */
+ if (lr.state & LR_STATE_ACTIVE) {
+ vgic_irq_set_active(vcpu, lr.irq);
+ lr.state &= ~LR_STATE_ACTIVE;
+ }
/*
* Reestablish the pending state on the distributor and the
* is fine, then we are only setting a few bits that were
* already set.
*/
- vgic_dist_irq_set_pending(vcpu, lr.irq);
- if (lr.irq < VGIC_NR_SGIS)
- add_sgi_source(vcpu, lr.irq, lr.source);
- lr.state &= ~LR_STATE_PENDING;
+ if (lr.state & LR_STATE_PENDING) {
+ vgic_dist_irq_set_pending(vcpu, lr.irq);
+ lr.state &= ~LR_STATE_PENDING;
+ }
+
vgic_set_lr(vcpu, i, lr);
/*
- * If there's no state left on the LR (it could still be
- * active), then the LR does not hold any useful info and can
- * be marked as free for other use.
+ * Mark the LR as free for other use.
*/
- if (!(lr.state & LR_STATE_MASK)) {
- vgic_retire_lr(i, lr.irq, vcpu);
- vgic_irq_clear_queued(vcpu, lr.irq);
- }
+ BUG_ON(lr.state & LR_STATE_MASK);
+ vgic_retire_lr(i, lr.irq, vcpu);
+ vgic_irq_clear_queued(vcpu, lr.irq);
/* Finally update the VGIC state. */
vgic_update_state(vcpu->kvm);
}
const
-struct kvm_mmio_range *vgic_find_range(const struct kvm_mmio_range *ranges,
- struct kvm_exit_mmio *mmio,
- phys_addr_t offset)
-{
- const struct kvm_mmio_range *r = ranges;
-
- while (r->len) {
- if (offset >= r->base &&
- (offset + mmio->len) <= (r->base + r->len))
- return r;
- r++;
+struct vgic_io_range *vgic_find_range(const struct vgic_io_range *ranges,
+ int len, gpa_t offset)
+{
+ while (ranges->len) {
+ if (offset >= ranges->base &&
+ (offset + len) <= (ranges->base + ranges->len))
+ return ranges;
+ ranges++;
}
return NULL;
}
static bool vgic_validate_access(const struct vgic_dist *dist,
- const struct kvm_mmio_range *range,
+ const struct vgic_io_range *range,
unsigned long offset)
{
int irq;
static bool call_range_handler(struct kvm_vcpu *vcpu,
struct kvm_exit_mmio *mmio,
unsigned long offset,
- const struct kvm_mmio_range *range)
+ const struct vgic_io_range *range)
{
- u32 *data32 = (void *)mmio->data;
struct kvm_exit_mmio mmio32;
bool ret;
mmio32.private = mmio->private;
mmio32.phys_addr = mmio->phys_addr + 4;
- if (mmio->is_write)
- *(u32 *)mmio32.data = data32[1];
+ mmio32.data = &((u32 *)mmio->data)[1];
ret = range->handle_mmio(vcpu, &mmio32, offset + 4);
- if (!mmio->is_write)
- data32[1] = *(u32 *)mmio32.data;
mmio32.phys_addr = mmio->phys_addr;
- if (mmio->is_write)
- *(u32 *)mmio32.data = data32[0];
+ mmio32.data = &((u32 *)mmio->data)[0];
ret |= range->handle_mmio(vcpu, &mmio32, offset);
- if (!mmio->is_write)
- data32[0] = *(u32 *)mmio32.data;
return ret;
}
/**
- * vgic_handle_mmio_range - handle an in-kernel MMIO access
+ * vgic_handle_mmio_access - handle an in-kernel MMIO access
+ * This is called by the read/write KVM IO device wrappers below.
* @vcpu: pointer to the vcpu performing the access
- * @run: pointer to the kvm_run structure
- * @mmio: pointer to the data describing the access
- * @ranges: array of MMIO ranges in a given region
- * @mmio_base: base address of that region
+ * @this: pointer to the KVM IO device in charge
+ * @addr: guest physical address of the access
+ * @len: size of the access
+ * @val: pointer to the data region
+ * @is_write: read or write access
*
* returns true if the MMIO access could be performed
*/
-bool vgic_handle_mmio_range(struct kvm_vcpu *vcpu, struct kvm_run *run,
- struct kvm_exit_mmio *mmio,
- const struct kvm_mmio_range *ranges,
- unsigned long mmio_base)
+static int vgic_handle_mmio_access(struct kvm_vcpu *vcpu,
+ struct kvm_io_device *this, gpa_t addr,
+ int len, void *val, bool is_write)
{
- const struct kvm_mmio_range *range;
struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
+ struct vgic_io_device *iodev = container_of(this,
+ struct vgic_io_device, dev);
+ struct kvm_run *run = vcpu->run;
+ const struct vgic_io_range *range;
+ struct kvm_exit_mmio mmio;
bool updated_state;
- unsigned long offset;
+ gpa_t offset;
- offset = mmio->phys_addr - mmio_base;
- range = vgic_find_range(ranges, mmio, offset);
+ offset = addr - iodev->addr;
+ range = vgic_find_range(iodev->reg_ranges, len, offset);
if (unlikely(!range || !range->handle_mmio)) {
- pr_warn("Unhandled access %d %08llx %d\n",
- mmio->is_write, mmio->phys_addr, mmio->len);
- return false;
+ pr_warn("Unhandled access %d %08llx %d\n", is_write, addr, len);
+ return -ENXIO;
}
- spin_lock(&vcpu->kvm->arch.vgic.lock);
+ mmio.phys_addr = addr;
+ mmio.len = len;
+ mmio.is_write = is_write;
+ mmio.data = val;
+ mmio.private = iodev->redist_vcpu;
+
+ spin_lock(&dist->lock);
offset -= range->base;
if (vgic_validate_access(dist, range, offset)) {
- updated_state = call_range_handler(vcpu, mmio, offset, range);
+ updated_state = call_range_handler(vcpu, &mmio, offset, range);
} else {
- if (!mmio->is_write)
- memset(mmio->data, 0, mmio->len);
+ if (!is_write)
+ memset(val, 0, len);
updated_state = false;
}
- spin_unlock(&vcpu->kvm->arch.vgic.lock);
- kvm_prepare_mmio(run, mmio);
+ spin_unlock(&dist->lock);
+ run->mmio.is_write = is_write;
+ run->mmio.len = len;
+ run->mmio.phys_addr = addr;
+ memcpy(run->mmio.data, val, len);
+
kvm_handle_mmio_return(vcpu, run);
if (updated_state)
vgic_kick_vcpus(vcpu->kvm);
- return true;
+ return 0;
+}
+
+static int vgic_handle_mmio_read(struct kvm_vcpu *vcpu,
+ struct kvm_io_device *this,
+ gpa_t addr, int len, void *val)
+{
+ return vgic_handle_mmio_access(vcpu, this, addr, len, val, false);
}
+static int vgic_handle_mmio_write(struct kvm_vcpu *vcpu,
+ struct kvm_io_device *this,
+ gpa_t addr, int len, const void *val)
+{
+ return vgic_handle_mmio_access(vcpu, this, addr, len, (void *)val,
+ true);
+}
+
+struct kvm_io_device_ops vgic_io_ops = {
+ .read = vgic_handle_mmio_read,
+ .write = vgic_handle_mmio_write,
+};
+
/**
- * vgic_handle_mmio - handle an in-kernel MMIO access for the GIC emulation
- * @vcpu: pointer to the vcpu performing the access
- * @run: pointer to the kvm_run structure
- * @mmio: pointer to the data describing the access
+ * vgic_register_kvm_io_dev - register VGIC register frame on the KVM I/O bus
+ * @kvm: The VM structure pointer
+ * @base: The (guest) base address for the register frame
+ * @len: Length of the register frame window
+ * @ranges: Describing the handler functions for each register
+ * @redist_vcpu_id: The VCPU ID to pass on to the handlers on call
+ * @iodev: Points to memory to be passed on to the handler
*
- * returns true if the MMIO access has been performed in kernel space,
- * and false if it needs to be emulated in user space.
- * Calls the actual handling routine for the selected VGIC model.
+ * @iodev stores the parameters of this function to be usable by the handler
+ * respectively the dispatcher function (since the KVM I/O bus framework lacks
+ * an opaque parameter). Initialization is done in this function, but the
+ * reference should be valid and unique for the whole VGIC lifetime.
+ * If the register frame is not mapped for a specific VCPU, pass -1 to
+ * @redist_vcpu_id.
*/
-bool vgic_handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *run,
- struct kvm_exit_mmio *mmio)
+int vgic_register_kvm_io_dev(struct kvm *kvm, gpa_t base, int len,
+ const struct vgic_io_range *ranges,
+ int redist_vcpu_id,
+ struct vgic_io_device *iodev)
{
- if (!irqchip_in_kernel(vcpu->kvm))
- return false;
+ struct kvm_vcpu *vcpu = NULL;
+ int ret;
- /*
- * This will currently call either vgic_v2_handle_mmio() or
- * vgic_v3_handle_mmio(), which in turn will call
- * vgic_handle_mmio_range() defined above.
- */
- return vcpu->kvm->arch.vgic.vm_ops.handle_mmio(vcpu, run, mmio);
+ if (redist_vcpu_id >= 0)
+ vcpu = kvm_get_vcpu(kvm, redist_vcpu_id);
+
+ iodev->addr = base;
+ iodev->len = len;
+ iodev->reg_ranges = ranges;
+ iodev->redist_vcpu = vcpu;
+
+ kvm_iodevice_init(&iodev->dev, &vgic_io_ops);
+
+ mutex_lock(&kvm->slots_lock);
+
+ ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, base, len,
+ &iodev->dev);
+ mutex_unlock(&kvm->slots_lock);
+
+ /* Mark the iodev as invalid if registration fails. */
+ if (ret)
+ iodev->dev.ops = NULL;
+
+ return ret;
}
static int vgic_nr_shared_irqs(struct vgic_dist *dist)
return dist->nr_irqs - VGIC_NR_PRIVATE_IRQS;
}
+static int compute_active_for_cpu(struct kvm_vcpu *vcpu)
+{
+ struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
+ unsigned long *active, *enabled, *act_percpu, *act_shared;
+ unsigned long active_private, active_shared;
+ int nr_shared = vgic_nr_shared_irqs(dist);
+ int vcpu_id;
+
+ vcpu_id = vcpu->vcpu_id;
+ act_percpu = vcpu->arch.vgic_cpu.active_percpu;
+ act_shared = vcpu->arch.vgic_cpu.active_shared;
+
+ active = vgic_bitmap_get_cpu_map(&dist->irq_active, vcpu_id);
+ enabled = vgic_bitmap_get_cpu_map(&dist->irq_enabled, vcpu_id);
+ bitmap_and(act_percpu, active, enabled, VGIC_NR_PRIVATE_IRQS);
+
+ active = vgic_bitmap_get_shared_map(&dist->irq_active);
+ enabled = vgic_bitmap_get_shared_map(&dist->irq_enabled);
+ bitmap_and(act_shared, active, enabled, nr_shared);
+ bitmap_and(act_shared, act_shared,
+ vgic_bitmap_get_shared_map(&dist->irq_spi_target[vcpu_id]),
+ nr_shared);
+
+ active_private = find_first_bit(act_percpu, VGIC_NR_PRIVATE_IRQS);
+ active_shared = find_first_bit(act_shared, nr_shared);
+
+ return (active_private < VGIC_NR_PRIVATE_IRQS ||
+ active_shared < nr_shared);
+}
+
static int compute_pending_for_cpu(struct kvm_vcpu *vcpu)
{
struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
/*
* Update the interrupt state and determine which CPUs have pending
- * interrupts. Must be called with distributor lock held.
+ * or active interrupts. Must be called with distributor lock held.
*/
void vgic_update_state(struct kvm *kvm)
{
}
kvm_for_each_vcpu(c, vcpu, kvm) {
- if (compute_pending_for_cpu(vcpu)) {
- pr_debug("CPU%d has pending interrupts\n", c);
+ if (compute_pending_for_cpu(vcpu))
set_bit(c, dist->irq_pending_on_cpu);
- }
+
+ if (compute_active_for_cpu(vcpu))
+ set_bit(c, dist->irq_active_on_cpu);
+ else
+ clear_bit(c, dist->irq_active_on_cpu);
}
}
}
}
+static void vgic_queue_irq_to_lr(struct kvm_vcpu *vcpu, int irq,
+ int lr_nr, struct vgic_lr vlr)
+{
+ if (vgic_irq_is_active(vcpu, irq)) {
+ vlr.state |= LR_STATE_ACTIVE;
+ kvm_debug("Set active, clear distributor: 0x%x\n", vlr.state);
+ vgic_irq_clear_active(vcpu, irq);
+ vgic_update_state(vcpu->kvm);
+ } else if (vgic_dist_irq_is_pending(vcpu, irq)) {
+ vlr.state |= LR_STATE_PENDING;
+ kvm_debug("Set pending: 0x%x\n", vlr.state);
+ }
+
+ if (!vgic_irq_is_edge(vcpu, irq))
+ vlr.state |= LR_EOI_INT;
+
+ vgic_set_lr(vcpu, lr_nr, vlr);
+ vgic_sync_lr_elrsr(vcpu, lr_nr, vlr);
+}
+
/*
* Queue an interrupt to a CPU virtual interface. Return true on success,
* or false if it wasn't possible to queue it.
if (vlr.source == sgi_source_id) {
kvm_debug("LR%d piggyback for IRQ%d\n", lr, vlr.irq);
BUG_ON(!test_bit(lr, vgic_cpu->lr_used));
- vlr.state |= LR_STATE_PENDING;
- vgic_set_lr(vcpu, lr, vlr);
- vgic_sync_lr_elrsr(vcpu, lr, vlr);
+ vgic_queue_irq_to_lr(vcpu, irq, lr, vlr);
return true;
}
}
vlr.irq = irq;
vlr.source = sgi_source_id;
- vlr.state = LR_STATE_PENDING;
- if (!vgic_irq_is_edge(vcpu, irq))
- vlr.state |= LR_EOI_INT;
-
- vgic_set_lr(vcpu, lr, vlr);
- vgic_sync_lr_elrsr(vcpu, lr, vlr);
+ vlr.state = 0;
+ vgic_queue_irq_to_lr(vcpu, irq, lr, vlr);
return true;
}
{
struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
+ unsigned long *pa_percpu, *pa_shared;
int i, vcpu_id;
int overflow = 0;
+ int nr_shared = vgic_nr_shared_irqs(dist);
vcpu_id = vcpu->vcpu_id;
+ pa_percpu = vcpu->arch.vgic_cpu.pend_act_percpu;
+ pa_shared = vcpu->arch.vgic_cpu.pend_act_shared;
+
+ bitmap_or(pa_percpu, vgic_cpu->pending_percpu, vgic_cpu->active_percpu,
+ VGIC_NR_PRIVATE_IRQS);
+ bitmap_or(pa_shared, vgic_cpu->pending_shared, vgic_cpu->active_shared,
+ nr_shared);
/*
* We may not have any pending interrupt, or the interrupts
* may have been serviced from another vcpu. In all cases,
* move along.
*/
- if (!kvm_vgic_vcpu_pending_irq(vcpu)) {
- pr_debug("CPU%d has no pending interrupt\n", vcpu_id);
+ if (!kvm_vgic_vcpu_pending_irq(vcpu) && !kvm_vgic_vcpu_active_irq(vcpu))
goto epilog;
- }
/* SGIs */
- for_each_set_bit(i, vgic_cpu->pending_percpu, VGIC_NR_SGIS) {
+ for_each_set_bit(i, pa_percpu, VGIC_NR_SGIS) {
if (!queue_sgi(vcpu, i))
overflow = 1;
}
/* PPIs */
- for_each_set_bit_from(i, vgic_cpu->pending_percpu, VGIC_NR_PRIVATE_IRQS) {
+ for_each_set_bit_from(i, pa_percpu, VGIC_NR_PRIVATE_IRQS) {
if (!vgic_queue_hwirq(vcpu, i))
overflow = 1;
}
/* SPIs */
- for_each_set_bit(i, vgic_cpu->pending_shared, vgic_nr_shared_irqs(dist)) {
+ for_each_set_bit(i, pa_shared, nr_shared) {
if (!vgic_queue_hwirq(vcpu, i + VGIC_NR_PRIVATE_IRQS))
overflow = 1;
}
+
+
+
epilog:
if (overflow) {
vgic_enable_underflow(vcpu);
static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
{
u32 status = vgic_get_interrupt_status(vcpu);
+ struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
bool level_pending = false;
+ struct kvm *kvm = vcpu->kvm;
kvm_debug("STATUS = %08x\n", status);
struct vgic_lr vlr = vgic_get_lr(vcpu, lr);
WARN_ON(vgic_irq_is_edge(vcpu, vlr.irq));
+ spin_lock(&dist->lock);
vgic_irq_clear_queued(vcpu, vlr.irq);
WARN_ON(vlr.state & LR_STATE_MASK);
vlr.state = 0;
*/
vgic_dist_irq_clear_soft_pend(vcpu, vlr.irq);
+ /*
+ * kvm_notify_acked_irq calls kvm_set_irq()
+ * to reset the IRQ level. Need to release the
+ * lock for kvm_set_irq to grab it.
+ */
+ spin_unlock(&dist->lock);
+
+ kvm_notify_acked_irq(kvm, 0,
+ vlr.irq - VGIC_NR_PRIVATE_IRQS);
+ spin_lock(&dist->lock);
+
/* Any additional pending interrupt? */
if (vgic_dist_irq_get_level(vcpu, vlr.irq)) {
vgic_cpu_irq_set(vcpu, vlr.irq);
vgic_cpu_irq_clear(vcpu, vlr.irq);
}
+ spin_unlock(&dist->lock);
+
/*
* Despite being EOIed, the LR may not have
* been marked as empty.
return level_pending;
}
-/*
- * Sync back the VGIC state after a guest run. The distributor lock is
- * needed so we don't get preempted in the middle of the state processing.
- */
+/* Sync back the VGIC state after a guest run */
static void __kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
{
struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
{
- struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
-
if (!irqchip_in_kernel(vcpu->kvm))
return;
- spin_lock(&dist->lock);
__kvm_vgic_sync_hwstate(vcpu);
- spin_unlock(&dist->lock);
}
int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu)
return test_bit(vcpu->vcpu_id, dist->irq_pending_on_cpu);
}
+int kvm_vgic_vcpu_active_irq(struct kvm_vcpu *vcpu)
+{
+ struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
+
+ if (!irqchip_in_kernel(vcpu->kvm))
+ return 0;
+
+ return test_bit(vcpu->vcpu_id, dist->irq_active_on_cpu);
+}
+
+
void vgic_kick_vcpus(struct kvm *kvm)
{
struct kvm_vcpu *vcpu;
struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
kfree(vgic_cpu->pending_shared);
+ kfree(vgic_cpu->active_shared);
+ kfree(vgic_cpu->pend_act_shared);
kfree(vgic_cpu->vgic_irq_lr_map);
vgic_cpu->pending_shared = NULL;
+ vgic_cpu->active_shared = NULL;
+ vgic_cpu->pend_act_shared = NULL;
vgic_cpu->vgic_irq_lr_map = NULL;
}
int sz = (nr_irqs - VGIC_NR_PRIVATE_IRQS) / 8;
vgic_cpu->pending_shared = kzalloc(sz, GFP_KERNEL);
+ vgic_cpu->active_shared = kzalloc(sz, GFP_KERNEL);
+ vgic_cpu->pend_act_shared = kzalloc(sz, GFP_KERNEL);
vgic_cpu->vgic_irq_lr_map = kmalloc(nr_irqs, GFP_KERNEL);
- if (!vgic_cpu->pending_shared || !vgic_cpu->vgic_irq_lr_map) {
+ if (!vgic_cpu->pending_shared
+ || !vgic_cpu->active_shared
+ || !vgic_cpu->pend_act_shared
+ || !vgic_cpu->vgic_irq_lr_map) {
kvm_vgic_vcpu_destroy(vcpu);
return -ENOMEM;
}
kfree(dist->irq_spi_mpidr);
kfree(dist->irq_spi_target);
kfree(dist->irq_pending_on_cpu);
+ kfree(dist->irq_active_on_cpu);
dist->irq_sgi_sources = NULL;
dist->irq_spi_cpu = NULL;
dist->irq_spi_target = NULL;
dist->irq_pending_on_cpu = NULL;
+ dist->irq_active_on_cpu = NULL;
dist->nr_cpus = 0;
}
ret |= vgic_init_bitmap(&dist->irq_pending, nr_cpus, nr_irqs);
ret |= vgic_init_bitmap(&dist->irq_soft_pend, nr_cpus, nr_irqs);
ret |= vgic_init_bitmap(&dist->irq_queued, nr_cpus, nr_irqs);
+ ret |= vgic_init_bitmap(&dist->irq_active, nr_cpus, nr_irqs);
ret |= vgic_init_bitmap(&dist->irq_cfg, nr_cpus, nr_irqs);
ret |= vgic_init_bytemap(&dist->irq_priority, nr_cpus, nr_irqs);
GFP_KERNEL);
dist->irq_pending_on_cpu = kzalloc(BITS_TO_LONGS(nr_cpus) * sizeof(long),
GFP_KERNEL);
+ dist->irq_active_on_cpu = kzalloc(BITS_TO_LONGS(nr_cpus) * sizeof(long),
+ GFP_KERNEL);
if (!dist->irq_sgi_sources ||
!dist->irq_spi_cpu ||
!dist->irq_spi_target ||
- !dist->irq_pending_on_cpu) {
+ !dist->irq_pending_on_cpu ||
+ !dist->irq_active_on_cpu) {
ret = -ENOMEM;
goto out;
}
return r;
}
-int vgic_has_attr_regs(const struct kvm_mmio_range *ranges, phys_addr_t offset)
+int vgic_has_attr_regs(const struct vgic_io_range *ranges, phys_addr_t offset)
{
- struct kvm_exit_mmio dev_attr_mmio;
-
- dev_attr_mmio.len = 4;
- if (vgic_find_range(ranges, &dev_attr_mmio, offset))
+ if (vgic_find_range(ranges, 4, offset))
return 0;
else
return -ENXIO;
};
static const struct of_device_id vgic_ids[] = {
- { .compatible = "arm,cortex-a15-gic", .data = vgic_v2_probe, },
- { .compatible = "arm,gic-v3", .data = vgic_v3_probe, },
+ { .compatible = "arm,cortex-a15-gic", .data = vgic_v2_probe, },
+ { .compatible = "arm,cortex-a7-gic", .data = vgic_v2_probe, },
+ { .compatible = "arm,gic-400", .data = vgic_v2_probe, },
+ { .compatible = "arm,gic-v3", .data = vgic_v3_probe, },
{},
};
free_percpu_irq(vgic->maint_irq, kvm_get_running_vcpus());
return ret;
}
+
+int kvm_irq_map_gsi(struct kvm *kvm,
+ struct kvm_kernel_irq_routing_entry *entries,
+ int gsi)
+{
+ return gsi;
+}
+
+int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
+{
+ return pin;
+}
+
+int kvm_set_irq(struct kvm *kvm, int irq_source_id,
+ u32 irq, int level, bool line_status)
+{
+ unsigned int spi = irq + VGIC_NR_PRIVATE_IRQS;
+
+ trace_kvm_set_irq(irq, level, irq_source_id);
+
+ BUG_ON(!vgic_initialized(kvm));
+
+ if (spi > kvm->arch.vgic.nr_irqs)
+ return -EINVAL;
+ return kvm_vgic_inject_irq(kvm, 0, spi, level);
+
+}
+
+/* MSI not implemented yet */
+int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
+ struct kvm *kvm, int irq_source_id,
+ int level, bool line_status)
+{
+ return 0;
+}
#ifndef __KVM_VGIC_H__
#define __KVM_VGIC_H__
+#include <kvm/iodev.h>
+
#define VGIC_ADDR_UNDEF (-1)
#define IS_VGIC_ADDR_UNDEF(_x) ((_x) == VGIC_ADDR_UNDEF)
bool vgic_queue_irq(struct kvm_vcpu *vcpu, u8 sgi_source_id, int irq);
void vgic_unqueue_irqs(struct kvm_vcpu *vcpu);
+struct kvm_exit_mmio {
+ phys_addr_t phys_addr;
+ void *data;
+ u32 len;
+ bool is_write;
+ void *private;
+};
+
void vgic_reg_access(struct kvm_exit_mmio *mmio, u32 *reg,
phys_addr_t offset, int mode);
bool handle_mmio_raz_wi(struct kvm_vcpu *vcpu, struct kvm_exit_mmio *mmio,
*((u32 *)mmio->data) = cpu_to_le32(value) & mask;
}
-struct kvm_mmio_range {
+struct vgic_io_range {
phys_addr_t base;
unsigned long len;
int bits_per_irq;
phys_addr_t offset);
};
+int vgic_register_kvm_io_dev(struct kvm *kvm, gpa_t base, int len,
+ const struct vgic_io_range *ranges,
+ int redist_id,
+ struct vgic_io_device *iodev);
+
static inline bool is_in_range(phys_addr_t addr, unsigned long len,
phys_addr_t baseaddr, unsigned long size)
{
}
const
-struct kvm_mmio_range *vgic_find_range(const struct kvm_mmio_range *ranges,
- struct kvm_exit_mmio *mmio,
- phys_addr_t offset);
-
-bool vgic_handle_mmio_range(struct kvm_vcpu *vcpu, struct kvm_run *run,
- struct kvm_exit_mmio *mmio,
- const struct kvm_mmio_range *ranges,
- unsigned long mmio_base);
+struct vgic_io_range *vgic_find_range(const struct vgic_io_range *ranges,
+ int len, gpa_t offset);
bool vgic_handle_enable_reg(struct kvm *kvm, struct kvm_exit_mmio *mmio,
phys_addr_t offset, int vcpu_id, int access);
bool vgic_handle_clear_pending_reg(struct kvm *kvm, struct kvm_exit_mmio *mmio,
phys_addr_t offset, int vcpu_id);
+bool vgic_handle_set_active_reg(struct kvm *kvm,
+ struct kvm_exit_mmio *mmio,
+ phys_addr_t offset, int vcpu_id);
+
+bool vgic_handle_clear_active_reg(struct kvm *kvm,
+ struct kvm_exit_mmio *mmio,
+ phys_addr_t offset, int vcpu_id);
+
bool vgic_handle_cfg_reg(u32 *reg, struct kvm_exit_mmio *mmio,
phys_addr_t offset);
void vgic_kick_vcpus(struct kvm *kvm);
-int vgic_has_attr_regs(const struct kvm_mmio_range *ranges, phys_addr_t offset);
+int vgic_has_attr_regs(const struct vgic_io_range *ranges, phys_addr_t offset);
int vgic_set_common_attr(struct kvm_device *dev, struct kvm_device_attr *attr);
int vgic_get_common_attr(struct kvm_device *dev, struct kvm_device_attr *attr);
*
*/
-#include "iodev.h"
+#include <kvm/iodev.h>
#include <linux/kvm_host.h>
#include <linux/slab.h>
return 1;
}
-static int coalesced_mmio_write(struct kvm_io_device *this,
- gpa_t addr, int len, const void *val)
+static int coalesced_mmio_write(struct kvm_vcpu *vcpu,
+ struct kvm_io_device *this, gpa_t addr,
+ int len, const void *val)
{
struct kvm_coalesced_mmio_dev *dev = to_mmio(this);
struct kvm_coalesced_mmio_ring *ring = dev->kvm->coalesced_mmio_ring;
#include <linux/seqlock.h>
#include <trace/events/kvm.h>
-#include "iodev.h"
+#include <kvm/iodev.h>
#ifdef CONFIG_HAVE_KVM_IRQFD
/*
unsigned int events;
int idx;
+ if (!kvm_arch_intc_initialized(kvm))
+ return -EAGAIN;
+
irqfd = kzalloc(sizeof(*irqfd), GFP_KERNEL);
if (!irqfd)
return -ENOMEM;
/* MMIO/PIO writes trigger an event if the addr/val match */
static int
-ioeventfd_write(struct kvm_io_device *this, gpa_t addr, int len,
- const void *val)
+ioeventfd_write(struct kvm_vcpu *vcpu, struct kvm_io_device *this, gpa_t addr,
+ int len, const void *val)
{
struct _ioeventfd *p = to_ioeventfd(this);
+++ /dev/null
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
- */
-
-#ifndef __KVM_IODEV_H__
-#define __KVM_IODEV_H__
-
-#include <linux/kvm_types.h>
-#include <asm/errno.h>
-
-struct kvm_io_device;
-
-/**
- * kvm_io_device_ops are called under kvm slots_lock.
- * read and write handlers return 0 if the transaction has been handled,
- * or non-zero to have it passed to the next device.
- **/
-struct kvm_io_device_ops {
- int (*read)(struct kvm_io_device *this,
- gpa_t addr,
- int len,
- void *val);
- int (*write)(struct kvm_io_device *this,
- gpa_t addr,
- int len,
- const void *val);
- void (*destructor)(struct kvm_io_device *this);
-};
-
-
-struct kvm_io_device {
- const struct kvm_io_device_ops *ops;
-};
-
-static inline void kvm_iodevice_init(struct kvm_io_device *dev,
- const struct kvm_io_device_ops *ops)
-{
- dev->ops = ops;
-}
-
-static inline int kvm_iodevice_read(struct kvm_io_device *dev,
- gpa_t addr, int l, void *v)
-{
- return dev->ops->read ? dev->ops->read(dev, addr, l, v) : -EOPNOTSUPP;
-}
-
-static inline int kvm_iodevice_write(struct kvm_io_device *dev,
- gpa_t addr, int l, const void *v)
-{
- return dev->ops->write ? dev->ops->write(dev, addr, l, v) : -EOPNOTSUPP;
-}
-
-static inline void kvm_iodevice_destructor(struct kvm_io_device *dev)
-{
- if (dev->ops->destructor)
- dev->ops->destructor(dev);
-}
-
-#endif /* __KVM_IODEV_H__ */
i = kvm_irq_map_gsi(kvm, irq_set, irq);
srcu_read_unlock(&kvm->irq_srcu, idx);
- while(i--) {
+ while (i--) {
int r;
r = irq_set[i].set(&irq_set[i], kvm, irq_source_id, level,
line_status);
*
*/
-#include "iodev.h"
+#include <kvm/iodev.h>
#include <linux/kvm_host.h>
#include <linux/kvm.h>
MODULE_AUTHOR("Qumranet");
MODULE_LICENSE("GPL");
-unsigned int halt_poll_ns = 0;
+static unsigned int halt_poll_ns;
module_param(halt_poll_ns, uint, S_IRUGO | S_IWUSR);
/*
* Ordering of locks:
*
- * kvm->lock --> kvm->slots_lock --> kvm->irq_lock
+ * kvm->lock --> kvm->slots_lock --> kvm->irq_lock
*/
DEFINE_SPINLOCK(kvm_lock);
LIST_HEAD(vm_list);
static cpumask_var_t cpus_hardware_enabled;
-static int kvm_usage_count = 0;
+static int kvm_usage_count;
static atomic_t hardware_enable_failed;
struct kmem_cache *kvm_vcpu_cache;
return kzalloc(size, GFP_KERNEL);
}
-void kvm_kvfree(const void *addr)
-{
- if (is_vmalloc_addr(addr))
- vfree(addr);
- else
- kfree(addr);
-}
-
static void kvm_destroy_dirty_bitmap(struct kvm_memory_slot *memslot)
{
if (!memslot->dirty_bitmap)
return;
- kvm_kvfree(memslot->dirty_bitmap);
+ kvfree(memslot->dirty_bitmap);
memslot->dirty_bitmap = NULL;
}
* or moved, memslot will be created.
*
* validation of sp->gfn happens in:
- * - gfn_to_hva (kvm_read_guest, gfn_to_pfn)
- * - kvm_is_visible_gfn (mmu_check_roots)
+ * - gfn_to_hva (kvm_read_guest, gfn_to_pfn)
+ * - kvm_is_visible_gfn (mmu_check_roots)
*/
kvm_arch_flush_shadow_memslot(kvm, slot);
mask = xchg(&dirty_bitmap[i], 0);
dirty_bitmap_buffer[i] = mask;
- offset = i * BITS_PER_LONG;
- kvm_arch_mmu_enable_log_dirty_pt_masked(kvm, memslot, offset,
- mask);
+ if (mask) {
+ offset = i * BITS_PER_LONG;
+ kvm_arch_mmu_enable_log_dirty_pt_masked(kvm, memslot,
+ offset, mask);
+ }
}
spin_unlock(&kvm->mmu_lock);
return gfn_to_hva_memslot_prot(slot, gfn, writable);
}
-static int kvm_read_hva(void *data, void __user *hva, int len)
-{
- return __copy_from_user(data, hva, len);
-}
-
-static int kvm_read_hva_atomic(void *data, void __user *hva, int len)
-{
- return __copy_from_user_inatomic(data, hva, len);
-}
-
static int get_user_page_nowait(struct task_struct *tsk, struct mm_struct *mm,
unsigned long start, int write, struct page **page)
{
return kvm_pfn_to_page(pfn);
}
-
EXPORT_SYMBOL_GPL(gfn_to_page);
void kvm_release_page_clean(struct page *page)
{
if (!kvm_is_reserved_pfn(pfn)) {
struct page *page = pfn_to_page(pfn);
+
if (!PageReserved(page))
SetPageDirty(page);
}
addr = gfn_to_hva_prot(kvm, gfn, NULL);
if (kvm_is_error_hva(addr))
return -EFAULT;
- r = kvm_read_hva(data, (void __user *)addr + offset, len);
+ r = __copy_from_user(data, (void __user *)addr + offset, len);
if (r)
return -EFAULT;
return 0;
if (kvm_is_error_hva(addr))
return -EFAULT;
pagefault_disable();
- r = kvm_read_hva_atomic(data, (void __user *)addr + offset, len);
+ r = __copy_from_user_inatomic(data, (void __user *)addr + offset, len);
pagefault_enable();
if (r)
return -EFAULT;
ghc->generation = slots->generation;
ghc->len = len;
ghc->memslot = gfn_to_memslot(kvm, start_gfn);
- ghc->hva = gfn_to_hva_many(ghc->memslot, start_gfn, &nr_pages_avail);
- if (!kvm_is_error_hva(ghc->hva) && nr_pages_avail >= nr_pages_needed) {
+ ghc->hva = gfn_to_hva_many(ghc->memslot, start_gfn, NULL);
+ if (!kvm_is_error_hva(ghc->hva) && nr_pages_needed <= 1) {
ghc->hva += offset;
} else {
/*
int offset = offset_in_page(gpa);
int ret;
- while ((seg = next_segment(len, offset)) != 0) {
+ while ((seg = next_segment(len, offset)) != 0) {
ret = kvm_clear_guest_page(kvm, gfn, offset, seg);
if (ret < 0)
return ret;
start = cur = ktime_get();
if (halt_poll_ns) {
ktime_t stop = ktime_add_ns(ktime_get(), halt_poll_ns);
+
do {
/*
* This sets KVM_REQ_UNHALT if an interrupt
* Special cases: vcpu ioctls that are asynchronous to vcpu execution,
* so vcpu_load() would break it.
*/
- if (ioctl == KVM_S390_INTERRUPT || ioctl == KVM_INTERRUPT)
+ if (ioctl == KVM_S390_INTERRUPT || ioctl == KVM_S390_IRQ || ioctl == KVM_INTERRUPT)
return kvm_arch_vcpu_ioctl(filp, ioctl, arg);
#endif
/* The thread running this VCPU changed. */
struct pid *oldpid = vcpu->pid;
struct pid *newpid = get_task_pid(current, PIDTYPE_PID);
+
rcu_assign_pointer(vcpu->pid, newpid);
if (oldpid)
synchronize_rcu();
if (r)
goto out;
r = -EFAULT;
- if (copy_to_user(argp, &mp_state, sizeof mp_state))
+ if (copy_to_user(argp, &mp_state, sizeof(mp_state)))
goto out;
r = 0;
break;
struct kvm_mp_state mp_state;
r = -EFAULT;
- if (copy_from_user(&mp_state, argp, sizeof mp_state))
+ if (copy_from_user(&mp_state, argp, sizeof(mp_state)))
goto out;
r = kvm_arch_vcpu_ioctl_set_mpstate(vcpu, &mp_state);
break;
struct kvm_translation tr;
r = -EFAULT;
- if (copy_from_user(&tr, argp, sizeof tr))
+ if (copy_from_user(&tr, argp, sizeof(tr)))
goto out;
r = kvm_arch_vcpu_ioctl_translate(vcpu, &tr);
if (r)
goto out;
r = -EFAULT;
- if (copy_to_user(argp, &tr, sizeof tr))
+ if (copy_to_user(argp, &tr, sizeof(tr)))
goto out;
r = 0;
break;
struct kvm_guest_debug dbg;
r = -EFAULT;
- if (copy_from_user(&dbg, argp, sizeof dbg))
+ if (copy_from_user(&dbg, argp, sizeof(dbg)))
goto out;
r = kvm_arch_vcpu_ioctl_set_guest_debug(vcpu, &dbg);
break;
if (argp) {
r = -EFAULT;
if (copy_from_user(&kvm_sigmask, argp,
- sizeof kvm_sigmask))
+ sizeof(kvm_sigmask)))
goto out;
r = -EINVAL;
- if (kvm_sigmask.len != sizeof sigset)
+ if (kvm_sigmask.len != sizeof(sigset))
goto out;
r = -EFAULT;
if (copy_from_user(&sigset, sigmask_arg->sigset,
- sizeof sigset))
+ sizeof(sigset)))
goto out;
p = &sigset;
}
if (argp) {
r = -EFAULT;
if (copy_from_user(&kvm_sigmask, argp,
- sizeof kvm_sigmask))
+ sizeof(kvm_sigmask)))
goto out;
r = -EINVAL;
- if (kvm_sigmask.len != sizeof csigset)
+ if (kvm_sigmask.len != sizeof(csigset))
goto out;
r = -EFAULT;
if (copy_from_user(&csigset, sigmask_arg->sigset,
- sizeof csigset))
+ sizeof(csigset)))
goto out;
sigset_from_compat(&sigset, &csigset);
r = kvm_vcpu_ioctl_set_sigmask(vcpu, &sigset);
r = -EFAULT;
if (copy_from_user(&kvm_userspace_mem, argp,
- sizeof kvm_userspace_mem))
+ sizeof(kvm_userspace_mem)))
goto out;
r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem);
struct kvm_dirty_log log;
r = -EFAULT;
- if (copy_from_user(&log, argp, sizeof log))
+ if (copy_from_user(&log, argp, sizeof(log)))
goto out;
r = kvm_vm_ioctl_get_dirty_log(kvm, &log);
break;
#ifdef KVM_COALESCED_MMIO_PAGE_OFFSET
case KVM_REGISTER_COALESCED_MMIO: {
struct kvm_coalesced_mmio_zone zone;
+
r = -EFAULT;
- if (copy_from_user(&zone, argp, sizeof zone))
+ if (copy_from_user(&zone, argp, sizeof(zone)))
goto out;
r = kvm_vm_ioctl_register_coalesced_mmio(kvm, &zone);
break;
}
case KVM_UNREGISTER_COALESCED_MMIO: {
struct kvm_coalesced_mmio_zone zone;
+
r = -EFAULT;
- if (copy_from_user(&zone, argp, sizeof zone))
+ if (copy_from_user(&zone, argp, sizeof(zone)))
goto out;
r = kvm_vm_ioctl_unregister_coalesced_mmio(kvm, &zone);
break;
struct kvm_irqfd data;
r = -EFAULT;
- if (copy_from_user(&data, argp, sizeof data))
+ if (copy_from_user(&data, argp, sizeof(data)))
goto out;
r = kvm_irqfd(kvm, &data);
break;
struct kvm_ioeventfd data;
r = -EFAULT;
- if (copy_from_user(&data, argp, sizeof data))
+ if (copy_from_user(&data, argp, sizeof(data)))
goto out;
r = kvm_ioeventfd(kvm, &data);
break;
struct kvm_msi msi;
r = -EFAULT;
- if (copy_from_user(&msi, argp, sizeof msi))
+ if (copy_from_user(&msi, argp, sizeof(msi)))
goto out;
r = kvm_send_userspace_msi(kvm, &msi);
break;
struct kvm_irq_level irq_event;
r = -EFAULT;
- if (copy_from_user(&irq_event, argp, sizeof irq_event))
+ if (copy_from_user(&irq_event, argp, sizeof(irq_event)))
goto out;
r = kvm_vm_ioctl_irq_line(kvm, &irq_event,
r = -EFAULT;
if (ioctl == KVM_IRQ_LINE_STATUS) {
- if (copy_to_user(argp, &irq_event, sizeof irq_event))
+ if (copy_to_user(argp, &irq_event, sizeof(irq_event)))
goto out;
}
goto out_free_irq_routing;
r = kvm_set_irq_routing(kvm, entries, routing.nr,
routing.flags);
- out_free_irq_routing:
+out_free_irq_routing:
vfree(entries);
break;
}
if (r) {
cpumask_clear_cpu(cpu, cpus_hardware_enabled);
atomic_inc(&hardware_enable_failed);
- printk(KERN_INFO "kvm: enabling virtualization on "
- "CPU%d failed\n", cpu);
+ pr_info("kvm: enabling virtualization on CPU%d failed\n", cpu);
}
}
val &= ~CPU_TASKS_FROZEN;
switch (val) {
case CPU_DYING:
- printk(KERN_INFO "kvm: disabling virtualization on CPU%d\n",
+ pr_info("kvm: disabling virtualization on CPU%d\n",
cpu);
hardware_disable();
break;
case CPU_STARTING:
- printk(KERN_INFO "kvm: enabling virtualization on CPU%d\n",
+ pr_info("kvm: enabling virtualization on CPU%d\n",
cpu);
hardware_enable();
break;
*
* And Intel TXT required VMX off for all cpu when system shutdown.
*/
- printk(KERN_INFO "kvm: exiting hardware virtualization\n");
+ pr_info("kvm: exiting hardware virtualization\n");
kvm_rebooting = true;
on_each_cpu(hardware_disable_nolock, NULL, 1);
return NOTIFY_OK;
}
static inline int kvm_io_bus_cmp(const struct kvm_io_range *r1,
- const struct kvm_io_range *r2)
+ const struct kvm_io_range *r2)
{
if (r1->addr < r2->addr)
return -1;
return off;
}
-static int __kvm_io_bus_write(struct kvm_io_bus *bus,
+static int __kvm_io_bus_write(struct kvm_vcpu *vcpu, struct kvm_io_bus *bus,
struct kvm_io_range *range, const void *val)
{
int idx;
while (idx < bus->dev_count &&
kvm_io_bus_cmp(range, &bus->range[idx]) == 0) {
- if (!kvm_iodevice_write(bus->range[idx].dev, range->addr,
+ if (!kvm_iodevice_write(vcpu, bus->range[idx].dev, range->addr,
range->len, val))
return idx;
idx++;
}
/* kvm_io_bus_write - called under kvm->slots_lock */
-int kvm_io_bus_write(struct kvm *kvm, enum kvm_bus bus_idx, gpa_t addr,
+int kvm_io_bus_write(struct kvm_vcpu *vcpu, enum kvm_bus bus_idx, gpa_t addr,
int len, const void *val)
{
struct kvm_io_bus *bus;
.len = len,
};
- bus = srcu_dereference(kvm->buses[bus_idx], &kvm->srcu);
- r = __kvm_io_bus_write(bus, &range, val);
+ bus = srcu_dereference(vcpu->kvm->buses[bus_idx], &vcpu->kvm->srcu);
+ r = __kvm_io_bus_write(vcpu, bus, &range, val);
return r < 0 ? r : 0;
}
/* kvm_io_bus_write_cookie - called under kvm->slots_lock */
-int kvm_io_bus_write_cookie(struct kvm *kvm, enum kvm_bus bus_idx, gpa_t addr,
- int len, const void *val, long cookie)
+int kvm_io_bus_write_cookie(struct kvm_vcpu *vcpu, enum kvm_bus bus_idx,
+ gpa_t addr, int len, const void *val, long cookie)
{
struct kvm_io_bus *bus;
struct kvm_io_range range;
.len = len,
};
- bus = srcu_dereference(kvm->buses[bus_idx], &kvm->srcu);
+ bus = srcu_dereference(vcpu->kvm->buses[bus_idx], &vcpu->kvm->srcu);
/* First try the device referenced by cookie. */
if ((cookie >= 0) && (cookie < bus->dev_count) &&
(kvm_io_bus_cmp(&range, &bus->range[cookie]) == 0))
- if (!kvm_iodevice_write(bus->range[cookie].dev, addr, len,
+ if (!kvm_iodevice_write(vcpu, bus->range[cookie].dev, addr, len,
val))
return cookie;
* cookie contained garbage; fall back to search and return the
* correct cookie value.
*/
- return __kvm_io_bus_write(bus, &range, val);
+ return __kvm_io_bus_write(vcpu, bus, &range, val);
}
-static int __kvm_io_bus_read(struct kvm_io_bus *bus, struct kvm_io_range *range,
- void *val)
+static int __kvm_io_bus_read(struct kvm_vcpu *vcpu, struct kvm_io_bus *bus,
+ struct kvm_io_range *range, void *val)
{
int idx;
while (idx < bus->dev_count &&
kvm_io_bus_cmp(range, &bus->range[idx]) == 0) {
- if (!kvm_iodevice_read(bus->range[idx].dev, range->addr,
+ if (!kvm_iodevice_read(vcpu, bus->range[idx].dev, range->addr,
range->len, val))
return idx;
idx++;
EXPORT_SYMBOL_GPL(kvm_io_bus_write);
/* kvm_io_bus_read - called under kvm->slots_lock */
-int kvm_io_bus_read(struct kvm *kvm, enum kvm_bus bus_idx, gpa_t addr,
+int kvm_io_bus_read(struct kvm_vcpu *vcpu, enum kvm_bus bus_idx, gpa_t addr,
int len, void *val)
{
struct kvm_io_bus *bus;
.len = len,
};
- bus = srcu_dereference(kvm->buses[bus_idx], &kvm->srcu);
- r = __kvm_io_bus_read(bus, &range, val);
+ bus = srcu_dereference(vcpu->kvm->buses[bus_idx], &vcpu->kvm->srcu);
+ r = __kvm_io_bus_read(vcpu, bus, &range, val);
return r < 0 ? r : 0;
}
static void kvm_sched_in(struct preempt_notifier *pn, int cpu)
{
struct kvm_vcpu *vcpu = preempt_notifier_to_vcpu(pn);
+
if (vcpu->preempted)
vcpu->preempted = false;
r = misc_register(&kvm_dev);
if (r) {
- printk(KERN_ERR "kvm: misc device register failed\n");
+ pr_err("kvm: misc device register failed\n");
goto out_unreg;
}
r = kvm_init_debug();
if (r) {
- printk(KERN_ERR "kvm: create debugfs files failed\n");
+ pr_err("kvm: create debugfs files failed\n");
goto out_undebugfs;
}
projects / firefly-linux-kernel-4.4.55.git / commitdiff