ARM: dts: sunxi: Revert SRAM controller drivers patches
authorMaxime Ripard <maxime.ripard@free-electrons.com>
Mon, 1 Jun 2015 09:10:14 +0000 (11:10 +0200)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Mon, 1 Jun 2015 09:13:22 +0000 (11:13 +0200)
This patch reverts commit ccb4ada2f193 ("ARM: dts: sun7i: Add A20 SRAM and
SRAM controller"), commit e6f51e4bd2a5 ("ARM: dts: sun5i: Add A13 and A10s
SRAM and SRAM controller") and commit 6d92b80f356f ("ARM: dts: sun4i: Add
A10 SRAM and SRAM controller").

The bindings have been changed in the SRAM driver, and we need to
change the DT accordingly.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
arch/arm/boot/dts/sun4i-a10.dtsi
arch/arm/boot/dts/sun5i.dtsi
arch/arm/boot/dts/sun7i-a20.dtsi

index 73b6143e3e9137efc70e51b607406951d53e945c..d7f43e5caf49be10d3f76ba6de32d96adcdf09d6 100644 (file)
                };
        };
 
-       /*
-        * Note we use the address where the mmio registers start, not where
-        * the SRAM blocks start, this cannot be changed because that would be
-        * a devicetree ABI change.
-        */
        soc@01c00000 {
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                ranges;
 
-               sram@00000000 {
-                       compatible = "allwinner,sun4i-a10-sram";
-                       reg = <0x00000000 0x4000>;
-                       allwinner,sram-name = "A1";
-               };
-
-               sram@00004000 {
-                       compatible = "allwinner,sun4i-a10-sram";
-                       reg = <0x00004000 0x4000>;
-                       allwinner,sram-name = "A2";
-               };
-
-               sram@00008000 {
-                       compatible = "allwinner,sun4i-a10-sram";
-                       reg = <0x00008000 0x4000>;
-                       allwinner,sram-name = "A3-A4";
-               };
-
-               sram@00010000 {
-                       compatible = "allwinner,sun4i-a10-sram";
-                       reg = <0x00010000 0x1000>;
-                       allwinner,sram-name = "D";
-               };
-
-               sram-controller@01c00000 {
-                       compatible = "allwinner,sun4i-a10-sram-controller";
-                       reg = <0x01c00000 0x30>;
-               };
-
                dma: dma-controller@01c02000 {
                        compatible = "allwinner,sun4i-a10-dma";
                        reg = <0x01c02000 0x1000>;
index 5f662435a935f071bc90716b4fd24a02dc2dacc0..26095aa97ada4b7dcc53a09f4c85d53f51a7f2b3 100644 (file)
                };
        };
 
-       /*
-        * Note we use the address where the mmio registers start, not where
-        * the SRAM blocks start, this cannot be changed because that would be
-        * a devicetree ABI change.
-        */
        soc@01c00000 {
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                ranges;
 
-               sram@00000000 {
-                       compatible = "allwinner,sun4i-a10-sram";
-                       reg = <0x00000000 0x4000>;
-                       allwinner,sram-name = "A1";
-               };
-
-               sram@00004000 {
-                       compatible = "allwinner,sun4i-a10-sram";
-                       reg = <0x00004000 0x4000>;
-                       allwinner,sram-name = "A2";
-               };
-
-               sram@00008000 {
-                       compatible = "allwinner,sun4i-a10-sram";
-                       reg = <0x00008000 0x4000>;
-                       allwinner,sram-name = "A3-A4";
-               };
-
-               sram@00010000 {
-                       compatible = "allwinner,sun4i-a10-sram";
-                       reg = <0x00010000 0x1000>;
-                       allwinner,sram-name = "D";
-               };
-
-               sram-controller@01c00000 {
-                       compatible = "allwinner,sun4i-a10-sram-controller";
-                       reg = <0x01c00000 0x30>;
-               };
-
                dma: dma-controller@01c02000 {
                        compatible = "allwinner,sun4i-a10-dma";
                        reg = <0x01c02000 0x1000>;
index 99d48b4da01b45678f67fdbd54b0749f3198fe8f..25bd4f1d393c42a6c1882aaac3c298af4a160a7d 100644 (file)
                };
        };
 
-       /*
-        * Note we use the address where the mmio registers start, not where
-        * the SRAM blocks start, this cannot be changed because that would be
-        * a devicetree ABI change.
-        */
        soc@01c00000 {
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                ranges;
 
-               sram@00000000 {
-                       compatible = "allwinner,sun4i-a10-sram";
-                       reg = <0x00000000 0x4000>;
-                       allwinner,sram-name = "A1";
-               };
-
-               sram@00004000 {
-                       compatible = "allwinner,sun4i-a10-sram";
-                       reg = <0x00004000 0x4000>;
-                       allwinner,sram-name = "A2";
-               };
-
-               sram@00008000 {
-                       compatible = "allwinner,sun4i-a10-sram";
-                       reg = <0x00008000 0x4000>;
-                       allwinner,sram-name = "A3-A4";
-               };
-
-               sram@00010000 {
-                       compatible = "allwinner,sun4i-a10-sram";
-                       reg = <0x00010000 0x1000>;
-                       allwinner,sram-name = "D";
-               };
-
-               sram-controller@01c00000 {
-                       compatible = "allwinner,sun4i-a10-sram-controller";
-                       reg = <0x01c00000 0x30>;
-               };
-
                nmi_intc: interrupt-controller@01c00030 {
                        compatible = "allwinner,sun7i-a20-sc-nmi";
                        interrupt-controller;