rockchip/rga: add src1 mmu table config when ABB mode
authorShengqin.Zhang <zsq@rock-chips.com>
Mon, 21 Mar 2016 10:16:46 +0000 (18:16 +0800)
committerZikim,Wei <wzq@rock-chips.com>
Mon, 29 Aug 2016 09:57:58 +0000 (17:57 +0800)
when rga2 use alpha under mmu, it must config src1
mmu addr for src1 channel will read mmu table

Change-Id: I6131a546421a5195bf3ae183f6fc7cb50fb09cfc
Signed-off-by: Shengqin.Zhang <zsq@rock-chips.com>
Signed-off-by: Zhiqin Wei <wzq@rock-chips.com>
drivers/video/rockchip/rga2/rga2_mmu_info.c
drivers/video/rockchip/rga2/rga2_reg_info.c

index 1b88c067ebfe303c1faa67c40fba6dfa4dd0035f..21c9a8695d554a3af52eb1273e594650d87960e6 100644 (file)
@@ -535,6 +535,11 @@ static int rga2_mmu_info_BitBlt_mode(struct rga2_reg *reg, struct rga2_req *req)
             v_size = (req->dst.v_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;\r
             req->dst.uv_addr = (req->dst.uv_addr & (~PAGE_MASK)) | ((uv_size) << PAGE_SHIFT);\r
             req->dst.v_addr = (req->dst.v_addr & (~PAGE_MASK)) | ((v_size) << PAGE_SHIFT);\r
+\r
+           if (((req->alpha_rop_flag & 1) == 1) && (req->bitblt_mode == 0)) {\r
+               req->mmu_info.src1_base_addr = req->mmu_info.dst_base_addr;\r
+               req->mmu_info.src1_mmu_flag  = req->mmu_info.dst_mmu_flag;\r
+           }\r
         }\r
 \r
         /* flush data to DDR */\r
index 7d8a4d676f7fa560a1334e909f6b152b25c93d07..d1a9db5dffb9ee9971cdb2ad40285b3c85d5c763 100755 (executable)
@@ -1049,7 +1049,7 @@ void RGA_MSG_2_RGA2_MSG(struct rga_req *req_rga, struct rga2_req *req)
     req->bitblt_mode = req_rga->bsfilter_flag;\r
 \r
     req->src_a_global_val = req_rga->alpha_global_value;\r
-    req->dst_a_global_val = 0;\r
+    req->dst_a_global_val = req_rga->alpha_global_value;\r
     req->rop_code = req_rga->rop_code;\r
     req->rop_mode = 0;\r
 \r
@@ -1080,10 +1080,10 @@ void RGA_MSG_2_RGA2_MSG(struct rga_req *req_rga, struct rga2_req *req)
     req->alpha_rop_flag |= (((req_rga->alpha_rop_flag >> 5) & 1) << 6); // dst_dither_down\r
     req->alpha_rop_flag |= (((req_rga->alpha_rop_flag >> 6) & 1) << 7); // gradient fill mode sel\r
 \r
-    if(((req_rga->alpha_rop_flag) & 1)) {\r
-        if((req_rga->alpha_rop_flag >> 3) & 1) {\r
+    if (((req_rga->alpha_rop_flag) & 1)) {\r
+        if ((req_rga->alpha_rop_flag >> 3) & 1) {\r
             /* porter duff alpha enable */\r
-            switch(req_rga->PD_mode)\r
+            switch (req_rga->PD_mode)\r
             {\r
                 case 0: //dst = 0\r
                     break;\r
@@ -1129,6 +1129,10 @@ void RGA_MSG_2_RGA2_MSG(struct rga_req *req_rga, struct rga2_req *req)
                     break;\r
                 case 11://dst = ((256-da)*sc + (256-sa)*dc) >> 8;\r
                     break;\r
+               case 12:\r
+                   req->alpha_mode_0 = 0x0010;\r
+                   req->alpha_mode_1 = 0x0820;\r
+                   break;\r
                 default:\r
                     break;\r
             }\r
@@ -1248,7 +1252,7 @@ void RGA_MSG_2_RGA2_MSG_32(struct rga_req_32 *req_rga, struct rga2_req *req)
     req->rop_mask_addr = req_rga->rop_mask_addr;\r
     req->bitblt_mode = req_rga->bsfilter_flag;\r
     req->src_a_global_val = req_rga->alpha_global_value;\r
-    req->dst_a_global_val = 0;\r
+    req->dst_a_global_val = req_rga->alpha_global_value;\r
     req->rop_code = req_rga->rop_code;\r
     req->rop_mode = 0;\r
     req->color_fill_mode = req_rga->color_fill_mode;\r
@@ -1320,6 +1324,10 @@ void RGA_MSG_2_RGA2_MSG_32(struct rga_req_32 *req_rga, struct rga2_req *req)
                     break;\r
                 case 11://dst = ((256-da)*sc + (256-sa)*dc) >> 8;\r
                     break;\r
+               case 12:\r
+                   req->alpha_mode_0 = 0x0010;\r
+                   req->alpha_mode_1 = 0x0820;\r
+                   break;\r
                 default:\r
                     break;\r
             }\r