Also, added a pattern for the thumb-2 MOV of shifted immediate since that can encode immediates not encodable by the 16-bit immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74288
91177308-0d34-0410-b5e6-
96231b3b80d8
"mov", " $dst, $src", []>;
let isReMaterializable = 1, isAsCheapAsAMove = 1 in
-def t2MOVi16 : T2sI<(outs GPR:$dst), (ins i32imm:$src),
- "movw", " $dst, $src",
- [(set GPR:$dst, imm0_65535:$src)]>;
+def t2MOVi : T2sI<(outs GPR:$dst), (ins t2_so_imm:$src),
+ "mov", " $dst, $src",
+ [(set GPR:$dst, t2_so_imm:$src)]>;
+
+let isReMaterializable = 1, isAsCheapAsAMove = 1 in
+def t2MOVi16 : T2I<(outs GPR:$dst), (ins i32imm:$src),
+ "movw", " $dst, $src",
+ [(set GPR:$dst, imm0_65535:$src)]>;
// FIXME: Also available in ARM mode.
let Constraints = "$src = $dst" in
--- /dev/null
+; RUN: llvm-as < %s | llc | grep {mov\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#66846720} | Count 5
+
+target triple = "thumbv7-apple-darwin"
+
+; 171 = 0x000000ab
+define i32 @f1(i32 %a) {
+ %tmp = add i32 0, 171
+ ret i32 %tmp
+}
+
+; 1179666 = 0x00120012
+define i32 @f2(i32 %a) {
+ %tmp = add i32 0, 1179666
+ ret i32 %tmp
+}
+
+; 872428544 = 0x34003400
+define i32 @f3(i32 %a) {
+ %tmp = add i32 0, 872428544
+ ret i32 %tmp
+}
+
+; 1448498774 = 0x56565656
+define i32 @f4(i32 %a) {
+ %tmp = add i32 0, 1448498774
+ ret i32 %tmp
+}
+
+; 66846720 = 0x03fc0000
+define i32 @f5(i32 %a) {
+ %tmp = add i32 0, 66846720
+ ret i32 %tmp
+}
--- /dev/null
+; RUN: llvm-as < %s | llc | grep {movw\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#65535} | Count 1
+
+target triple = "thumbv7-apple-darwin"
+
+define i32 @f6(i32 %a) {
+ %tmp = add i32 0, 65535
+ ret i32 %tmp
+}