Mark ARM subtarget features that are available for the assembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117929 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 776dbbd84704546f19ac57cacfb08e3dca33d466..a49975ccfa549de42ad2ba81d16f988c3c1400d0 100644 (file)
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -142,27 +142,29 @@ def ARMbfi           : SDNode<"ARMISD::BFI", SDT_ARMBFI>;
 //===----------------------------------------------------------------------===//
 // ARM Instruction Predicate Definitions.
 //
-def HasV4T           : Predicate<"Subtarget->hasV4TOps()">;
+def HasV4T           : Predicate<"Subtarget->hasV4TOps()">, AssemblerPredicate;
 def NoV4T            : Predicate<"!Subtarget->hasV4TOps()">;
 def HasV5T           : Predicate<"Subtarget->hasV5TOps()">;
-def HasV5TE          : Predicate<"Subtarget->hasV5TEOps()">;
-def HasV6            : Predicate<"Subtarget->hasV6Ops()">;
-def HasV6T2          : Predicate<"Subtarget->hasV6T2Ops()">;
+def HasV5TE          : Predicate<"Subtarget->hasV5TEOps()">, AssemblerPredicate;
+def HasV6            : Predicate<"Subtarget->hasV6Ops()">, AssemblerPredicate;
+def HasV6T2          : Predicate<"Subtarget->hasV6T2Ops()">, AssemblerPredicate;
 def NoV6T2           : Predicate<"!Subtarget->hasV6T2Ops()">;
-def HasV7            : Predicate<"Subtarget->hasV7Ops()">;
+def HasV7            : Predicate<"Subtarget->hasV7Ops()">, AssemblerPredicate;
 def NoVFP            : Predicate<"!Subtarget->hasVFP2()">;
-def HasVFP2          : Predicate<"Subtarget->hasVFP2()">;
-def HasVFP3          : Predicate<"Subtarget->hasVFP3()">;
-def HasNEON          : Predicate<"Subtarget->hasNEON()">;
-def HasDivide        : Predicate<"Subtarget->hasDivide()">;
-def HasT2ExtractPack : Predicate<"Subtarget->hasT2ExtractPack()">;
-def HasDB            : Predicate<"Subtarget->hasDataBarrier()">;
+def HasVFP2          : Predicate<"Subtarget->hasVFP2()">, AssemblerPredicate;
+def HasVFP3          : Predicate<"Subtarget->hasVFP3()">, AssemblerPredicate;
+def HasNEON          : Predicate<"Subtarget->hasNEON()">, AssemblerPredicate;
+def HasDivide        : Predicate<"Subtarget->hasDivide()">, AssemblerPredicate;
+def HasT2ExtractPack : Predicate<"Subtarget->hasT2ExtractPack()">,
+                                 AssemblerPredicate;
+def HasDB            : Predicate<"Subtarget->hasDataBarrier()">,
+                                 AssemblerPredicate;
 def UseNEONForFP     : Predicate<"Subtarget->useNEONForSinglePrecisionFP()">;
 def DontUseNEONForFP : Predicate<"!Subtarget->useNEONForSinglePrecisionFP()">;
-def IsThumb          : Predicate<"Subtarget->isThumb()">;
+def IsThumb          : Predicate<"Subtarget->isThumb()">, AssemblerPredicate;
 def IsThumb1Only     : Predicate<"Subtarget->isThumb1Only()">;
-def IsThumb2         : Predicate<"Subtarget->isThumb2()">;
-def IsARM            : Predicate<"!Subtarget->isThumb()">;
+def IsThumb2         : Predicate<"Subtarget->isThumb2()">, AssemblerPredicate;
+def IsARM            : Predicate<"!Subtarget->isThumb()">, AssemblerPredicate;
 def IsDarwin         : Predicate<"Subtarget->isTargetDarwin()">;
 def IsNotDarwin      : Predicate<"!Subtarget->isTargetDarwin()">;
 

diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index fe46a0417464cf4453c3ea8145b0c2f17e9cd4c4..0f1b2e207647629e5cd26a4bf3fba0312b22a465 100644 (file)
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -92,7 +92,11 @@ private:
 
 public:
   ARMAsmParser(const Target &T, MCAsmParser &_Parser, TargetMachine &_TM)
-    : TargetAsmParser(T), Parser(_Parser), TM(_TM) {}
+    : TargetAsmParser(T), Parser(_Parser), TM(_TM) {
+      // Initialize the set of available features.
+      setAvailableFeatures(ComputeAvailableFeatures(
+          &TM.getSubtarget<ARMSubtarget>()));
+    }
 
   virtual bool ParseInstruction(StringRef Name, SMLoc NameLoc,
                                 SmallVectorImpl<MCParsedAsmOperand*> &Operands);

diff --git a/test/MC/ARM/arm_instructions.s b/test/MC/ARM/arm_instructions.s
index 18a8cfa90e2b7e50f44ec73414c62c338ea6508d..b82b36a04399c75d8490798b27037eb14bada893 100644 (file)
--- a/test/MC/ARM/arm_instructions.s
+++ b/test/MC/ARM/arm_instructions.s
@@ -1,4 +1,4 @@
-@ RUN: llvm-mc -triple arm-unknown-unknown -show-encoding %s | FileCheck %s
+@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding %s | FileCheck %s
 
 @ CHECK: nop
 @ CHECK: encoding: [0x00,0xf0,0x20,0xe3]

diff --git a/test/MC/ARM/arm_word_directive.s b/test/MC/ARM/arm_word_directive.s
index 78336913169f36b87866535f49adeee69330051a..e782479b608113f05f939947ea05ad12329703aa 100644 (file)
--- a/test/MC/ARM/arm_word_directive.s
+++ b/test/MC/ARM/arm_word_directive.s
@@ -1,4 +1,4 @@
-@ RUN: llvm-mc -triple arm-unknown-unknown %s | FileCheck %s
+@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown %s | FileCheck %s
 
 @ CHECK: TEST0:
 @ CHECK: .long 3

diff --git a/test/MC/ARM/neon-abs-encoding.s b/test/MC/ARM/neon-abs-encoding.s
index b895a75977b15afe9af5fada3ca96d8de18499c0..9a6284d0ee7f90bdc9e8e5749a41864d8a79eb44 100644 (file)
--- a/test/MC/ARM/neon-abs-encoding.s
+++ b/test/MC/ARM/neon-abs-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
 
 // CHECK: vabs.s8      d16, d16                @ encoding: [0x20,0x03,0xf1,0xf3]
        vabs.s8 d16, d16

diff --git a/test/MC/ARM/neon-absdiff-encoding.s b/test/MC/ARM/neon-absdiff-encoding.s
index 314fc63b2d1b4b952ca3b620cb39d819a3f264af..005a7f5c9b2a4ffcb5faff7eec7d09e32cf8053a 100644 (file)
--- a/test/MC/ARM/neon-absdiff-encoding.s
+++ b/test/MC/ARM/neon-absdiff-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
 // XFAIL: *
 // NOTE: This currently fails because the ASM parser doesn't parse vabal.
 

diff --git a/test/MC/ARM/neon-add-encoding.s b/test/MC/ARM/neon-add-encoding.s
index 6211a3ef0218abb1bc1448e8b2654969900564a4..632657a6c5ae7e646b30b06f4f4ad17244fdbed5 100644 (file)
--- a/test/MC/ARM/neon-add-encoding.s
+++ b/test/MC/ARM/neon-add-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s
 
 
 // CHECK: vadd.i8      d16, d17, d16           @ encoding: [0xa0,0x08,0x41,0xf2]

diff --git a/test/MC/ARM/neon-bitcount-encoding.s b/test/MC/ARM/neon-bitcount-encoding.s
index 1693711f8eaa71b5baa28165a4a633afda196ab7..85ebcc0845a7eaec5ac99fe790015da347eba42f 100644 (file)
--- a/test/MC/ARM/neon-bitcount-encoding.s
+++ b/test/MC/ARM/neon-bitcount-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
 // XFAIL: *
 
 // CHECK: vcnt.8       d16, d16                @ encoding: [0x20,0x05,0xf0,0xf3]

diff --git a/test/MC/ARM/neon-bitwise-encoding.s b/test/MC/ARM/neon-bitwise-encoding.s
index da7ae64fab26ee9bace3d857084c4e83a7e171c3..9db5cdabdcd0b93b3b95b336ba7c9e2315cd890f 100644 (file)
--- a/test/MC/ARM/neon-bitwise-encoding.s
+++ b/test/MC/ARM/neon-bitwise-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
 
 // CHECK: vand d16, d17, d16           @ encoding: [0xb0,0x01,0x41,0xf2]
        vand    d16, d17, d16

diff --git a/test/MC/ARM/neon-cmp-encoding.s b/test/MC/ARM/neon-cmp-encoding.s
index 1838587522a2413727e8eb0f1fea9e2f2fbb202f..bb4ef94181fc9ec78d7bb70d100304c517c32f47 100644 (file)
--- a/test/MC/ARM/neon-cmp-encoding.s
+++ b/test/MC/ARM/neon-cmp-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
 // XFAIL: *
 
 // FIXME: We cannot currently test the following instructions, which are 

diff --git a/test/MC/ARM/neon-convert-encoding.s b/test/MC/ARM/neon-convert-encoding.s
index c60024a2d3d137de6a5bea5cd9502f4c1de2a3bc..a0d6688b6a6acd576a1f06f3a0e2766ed0a3f1b5 100644 (file)
--- a/test/MC/ARM/neon-convert-encoding.s
+++ b/test/MC/ARM/neon-convert-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
 
 // CHECK: vcvt.s32.f32 d16, d16        @ encoding: [0x20,0x07,0xfb,0xf3]
        vcvt.s32.f32    d16, d16

diff --git a/test/MC/ARM/neon-dup-encoding.s b/test/MC/ARM/neon-dup-encoding.s
index 05380cab12f081dde03e652b1c661665337066f0..557df2c978b22ba66c4186be9851a7803f6e2f25 100644 (file)
--- a/test/MC/ARM/neon-dup-encoding.s
+++ b/test/MC/ARM/neon-dup-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
 // XFAIL: *
 
 // CHECK: vdup.8       d16, r0                 @ encoding: [0x90,0x0b,0xc0,0xee]

diff --git a/test/MC/ARM/neon-minmax-encoding.s b/test/MC/ARM/neon-minmax-encoding.s
index f7200f08407dbab31a8faec0426b12640541b790..cd8d5af202f9a41f2eaf4057430ce3d4361ba4dc 100644 (file)
--- a/test/MC/ARM/neon-minmax-encoding.s
+++ b/test/MC/ARM/neon-minmax-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
 
 // CHECK: vmin.s8      d16, d16, d17           @ encoding: [0xb1,0x06,0x40,0xf2]
        vmin.s8 d16, d16, d17

diff --git a/test/MC/ARM/neon-mov-encoding.s b/test/MC/ARM/neon-mov-encoding.s
index 2aaad9e121cea7a06975180ee901dbd2c9251d34..5cd6d8f3911737206fb976bda4a05232b7b86a4d 100644 (file)
--- a/test/MC/ARM/neon-mov-encoding.s
+++ b/test/MC/ARM/neon-mov-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
 // XFAIL: *
 
 // CHECK: vmov.i8      d16, #0x8               @ encoding: [0x18,0x0e,0xc0,0xf2]

diff --git a/test/MC/ARM/neon-mul-accum-encoding.s b/test/MC/ARM/neon-mul-accum-encoding.s
index e76ad2458438917bfcea12b5458eb4e5e46f55e4..2b11c51039fa5e8c0fe60494c6ef28f6eafa3c0d 100644 (file)
--- a/test/MC/ARM/neon-mul-accum-encoding.s
+++ b/test/MC/ARM/neon-mul-accum-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
 // XFAIL: *
 
 // CHECK: vmla.i8      d16, d18, d17           @ encoding: [0xa1,0x09,0x42,0xf2]

diff --git a/test/MC/ARM/neon-mul-encoding.s b/test/MC/ARM/neon-mul-encoding.s
index 80c19ba185c0c8e266d6125de34f5ec3a0d1c61a..8afc8dbf34267ef9b126e48505fb551f6da0ac4a 100644 (file)
--- a/test/MC/ARM/neon-mul-encoding.s
+++ b/test/MC/ARM/neon-mul-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
 
 // CHECK: vmul.i8      d16, d16, d17           @ encoding: [0xb1,0x09,0x40,0xf2]
        vmul.i8 d16, d16, d17

diff --git a/test/MC/ARM/neon-neg-encoding.s b/test/MC/ARM/neon-neg-encoding.s
index b81f49bcf9213f842ca1dd2800ee98bbd270e670..38c49ca679098fa3aeb91b1c22f6ad541fe53a13 100644 (file)
--- a/test/MC/ARM/neon-neg-encoding.s
+++ b/test/MC/ARM/neon-neg-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
 
 // CHECK: vneg.s8      d16, d16                @ encoding: [0xa0,0x03,0xf1,0xf3]
        vneg.s8 d16, d16

diff --git a/test/MC/ARM/neon-pairwise-encoding.s b/test/MC/ARM/neon-pairwise-encoding.s
index b00e6062dabee3a22434537878986dbae1ebe016..683dd96f7c51fc70c847fa6ca11a2a769d87eae6 100644 (file)
--- a/test/MC/ARM/neon-pairwise-encoding.s
+++ b/test/MC/ARM/neon-pairwise-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
 // XFAIL: *
 
 // CHECK: vpadd.i8     d16, d17, d16   @ encoding: [0xb0,0x0b,0x41,0xf2]

diff --git a/test/MC/ARM/neon-reciprocal-encoding.s b/test/MC/ARM/neon-reciprocal-encoding.s
index 762d107980f51018867a355f1f0dd73c88ed1a94..0e251973ffc22d6a1d605552d8878207f5673399 100644 (file)
--- a/test/MC/ARM/neon-reciprocal-encoding.s
+++ b/test/MC/ARM/neon-reciprocal-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
 
 // CHECK: vrecpe.u32   d16, d16        @ encoding: [0x20,0x04,0xfb,0xf3]
        vrecpe.u32      d16, d16

diff --git a/test/MC/ARM/neon-reverse-encoding.s b/test/MC/ARM/neon-reverse-encoding.s
index a4c713d562e90e7eb736062a95dc13502747869f..1b538b88637280dee945a3b272d89555557e3ef9 100644 (file)
--- a/test/MC/ARM/neon-reverse-encoding.s
+++ b/test/MC/ARM/neon-reverse-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
 
 // CHECK: vrev64.8     d16, d16        @ encoding: [0x20,0x00,0xf0,0xf3]
        vrev64.8        d16, d16

diff --git a/test/MC/ARM/neon-satshift-encoding.s b/test/MC/ARM/neon-satshift-encoding.s
index 81fe70a998b79922080bf33eb4f1661ab93b9e7d..64ec3e6fd4575bb8cb05f94912e61659ad500651 100644 (file)
--- a/test/MC/ARM/neon-satshift-encoding.s
+++ b/test/MC/ARM/neon-satshift-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
 
 // CHECK: vqshl.s8     d16, d16, d17   @ encoding: [0xb0,0x04,0x41,0xf2]
        vqshl.s8        d16, d16, d17

diff --git a/test/MC/ARM/neon-shift-encoding.s b/test/MC/ARM/neon-shift-encoding.s
index f03af4187615fdb30ef8f6dd981104e21eb33609..b3fd1353ded20950315275301cb33b638c772186 100644 (file)
--- a/test/MC/ARM/neon-shift-encoding.s
+++ b/test/MC/ARM/neon-shift-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
 
 // CHECK: vshl.u8      d16, d17, d16           @ encoding: [0xa1,0x04,0x40,0xf3]
        vshl.u8 d16, d17, d16

diff --git a/test/MC/ARM/simple-fp-encoding.s b/test/MC/ARM/simple-fp-encoding.s
index 61dd9b32df2f33f674b3d44a940971fdcc1ed7d7..0df7ccdbec2f8bce180da87086d9852de0037883 100644 (file)
--- a/test/MC/ARM/simple-fp-encoding.s
+++ b/test/MC/ARM/simple-fp-encoding.s
@@ -1,4 +1,4 @@
-// RUN: llvm-mc -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s
+// RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s
 
 // CHECK: vadd.f64 d16, d17, d16      @ encoding: [0xa0,0x0b,0x71,0xee]
         vadd.f64        d16, d17, d16