This code is no longer needed, it is moved to the target-indep code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23332 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp
index 8a377d056a15c9163bb2f8be4aab5733f42f7327..1a20b2951df75bc74c2a8556dab69f13dd08d8e0 100644 (file)
--- a/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -116,8 +116,6 @@ public:
     CCInvMap.clear();
   }
 
-  virtual void EmitFunctionEntryCode(Function &Fn, MachineFunction &MF);
-
   unsigned SelectExpr(SDOperand N);
   void Select(SDOperand N);
 
@@ -135,28 +133,6 @@ public:
 };
 }
 
-void AlphaISel::EmitFunctionEntryCode(Function &Fn, MachineFunction &MF) {
-  // If this function has live-in values, emit the copies from pregs to vregs at
-  // the top of the function, before anything else.
-  MachineBasicBlock *BB = MF.begin();
-  if (MF.livein_begin() != MF.livein_end()) {
-    SSARegMap *RegMap = MF.getSSARegMap();
-    for (MachineFunction::livein_iterator LI = MF.livein_begin(),
-           E = MF.livein_end(); LI != E; ++LI) {
-      const TargetRegisterClass *RC = RegMap->getRegClass(LI->second);
-      if (RC == Alpha::GPRCRegisterClass) {
-        BuildMI(BB, Alpha::BIS, 2, LI->second).addReg(LI->first)
-          .addReg(LI->first);
-      } else if (RC == Alpha::FPRCRegisterClass) {
-        BuildMI(BB, Alpha::CPYS, 2, LI->second).addReg(LI->first)
-          .addReg(LI->first);
-      } else {
-        assert(0 && "Unknown regclass!");
-      }
-    }
-  }
-}
-
 static bool isSIntImmediate(SDOperand N, int64_t& Imm) {
   // test for constant
   if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N)) {

diff --git a/lib/Target/X86/X86ISelPattern.cpp b/lib/Target/X86/X86ISelPattern.cpp
index deddd1ddf312ff93324198db04709941221357da..536f2645a468686e5eb9b0438857994d5b1c0ab8 100644 (file)
--- a/lib/Target/X86/X86ISelPattern.cpp
+++ b/lib/Target/X86/X86ISelPattern.cpp
@@ -1156,31 +1156,6 @@ static void EmitSpecialCodeForMain(MachineBasicBlock *BB,
 }
 
 void ISel::EmitFunctionEntryCode(Function &Fn, MachineFunction &MF) {
-  // If this function has live-in values, emit the copies from pregs to vregs at
-  // the top of the function, before anything else.
-  MachineBasicBlock *BB = MF.begin();
-  if (MF.livein_begin() != MF.livein_end()) {
-    SSARegMap *RegMap = MF.getSSARegMap();
-    for (MachineFunction::livein_iterator LI = MF.livein_begin(),
-         E = MF.livein_end(); LI != E; ++LI) {
-      const TargetRegisterClass *RC = RegMap->getRegClass(LI->second);
-      if (RC == X86::R8RegisterClass) {
-        BuildMI(BB, X86::MOV8rr, 1, LI->second).addReg(LI->first);
-      } else if (RC == X86::R16RegisterClass) {
-        BuildMI(BB, X86::MOV16rr, 1, LI->second).addReg(LI->first);
-      } else if (RC == X86::R32RegisterClass) {
-        BuildMI(BB, X86::MOV32rr, 1, LI->second).addReg(LI->first);
-      } else if (RC == X86::RFPRegisterClass) {
-        BuildMI(BB, X86::FpMOV, 1, LI->second).addReg(LI->first);
-      } else if (RC == X86::RXMMRegisterClass) {
-        BuildMI(BB, X86::MOVAPDrr, 1, LI->second).addReg(LI->first);
-      } else {
-        assert(0 && "Unknown regclass!");
-      }
-    }
-  }
-
-
   // If this is main, emit special code for main.
   if (Fn.hasExternalLinkage() && Fn.getName() == "main")
     EmitSpecialCodeForMain(BB, MF.getFrameInfo());