On DataLayout, omit the default of p:64:64:64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197397 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AArch64/AArch64TargetMachine.cpp b/lib/Target/AArch64/AArch64TargetMachine.cpp
index ea80af48d3e20e02cbb09bc520c64496c4001908..bfa496075b6436ca7c3375142145f1bc9bdd58e7 100644 (file)
--- a/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -34,7 +34,7 @@ AArch64TargetMachine::AArch64TargetMachine(const Target &T, StringRef TT,
   : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
     Subtarget(TT, CPU, FS),
     InstrInfo(Subtarget),
-    DL("e-p:64:64-i64:64:64-i128:128:128-s:32:32-n32:64-S128"),
+    DL("e-i64:64:64-i128:128:128-s:32:32-n32:64-S128"),
     TLInfo(*this),
     TSInfo(*this),
     FrameLowering(Subtarget) {

diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp
index e476488071ba9034cc6bac0048a0ef50a729ae56..30762c6a7292720ce9e4568cc0e14cae4158a1fb 100644 (file)
--- a/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/lib/Target/Mips/MipsTargetMachine.cpp
@@ -54,10 +54,8 @@ static std::string computeDataLayout(const MipsSubtarget &ST) {
   else
     Ret += "E";
 
-  // Pointers are 64 or 32 bit depending on the ABI.
-  if (ST.isABI_N64())
-    Ret += "-p:64:64:64";
-  else
+  // Pointers are 32 bit on some ABIs.
+  if (!ST.isABI_N64())
     Ret += "-p:32:32:32";
 
   // 8 and 16 bit integers only need no have natural alignment, but try to

diff --git a/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/lib/Target/NVPTX/NVPTXTargetMachine.cpp
index d2735a63bd5cb61daddeef5ee9fead3d35373c1b..272940d4dc6c3173b5097233ed806618a0defba4 100644 (file)
--- a/lib/Target/NVPTX/NVPTXTargetMachine.cpp
+++ b/lib/Target/NVPTX/NVPTXTargetMachine.cpp
@@ -66,9 +66,7 @@ extern "C" void LLVMInitializeNVPTXTarget() {
 static std::string computeDataLayout(const NVPTXSubtarget &ST) {
   std::string Ret = "e";
 
-  if (ST.is64Bit())
-    Ret += "-p:64:64:64";
-  else
+  if (!ST.is64Bit())
     Ret += "-p:32:32:32";
 
   Ret += "-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"

diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index 561b5e60bee9392f4478f35bbc029218412d0bc5..25badb1d0b6374e67cfccb16400d0c75955a9ffc 100644 (file)
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -38,10 +38,8 @@ static std::string getDataLayoutString(const PPCSubtarget &ST) {
   // PPC is big endian.
   std::string Ret = "E";
 
-  // PPC64 has 64 bit pointers, PPC32 has 32 bit pointers.
-  if (ST.isPPC64())
-    Ret += "-p:64:64";
-  else
+  // PPC32 has 32 bit pointers.
+  if (!ST.isPPC64())
     Ret += "-p:32:32";
 
   // Note, the alignment values for f64 and i64 on ppc64 in Darwin

diff --git a/lib/Target/R600/AMDGPUTargetMachine.cpp b/lib/Target/R600/AMDGPUTargetMachine.cpp
index 762a17ae071a6df638f3a6704c4de2f4deae1380..ae56e7923df66957937719f6c14938ff460e02f9 100644 (file)
--- a/lib/Target/R600/AMDGPUTargetMachine.cpp
+++ b/lib/Target/R600/AMDGPUTargetMachine.cpp
@@ -61,9 +61,7 @@ static std::string computeDataLayout(const AMDGPUSubtarget &ST) {
   if (ST.hasHWFP64())
     DataLayout.append("-f64:64:64");
 
-  if (ST.is64bit())
-    DataLayout.append("-p:64:64:64");
-  else
+  if (!ST.is64bit())
     DataLayout.append("-p:32:32:32");
 
   if (ST.getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS)

diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp
index 36d2f6f778dea93cf1eb288dfa469e8ff6c0bc65..7324e99af91ec6e24427c7fceca5dfae32e1631c 100644 (file)
--- a/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -27,10 +27,8 @@ static std::string computeDataLayout(const SparcSubtarget &ST) {
   // Sparc is big endian.
   std::string Ret = "E";
 
-  // V9 has 64 bit pointers, others have 32bit pointers.
-  if (ST.is64Bit())
-    Ret += "-p:64:64:64";
-  else
+  // Some ABIs have 32bit pointers.
+  if (!ST.is64Bit())
     Ret += "-p:32:32:32";
 
   // Alignments for 64 bit integers.

diff --git a/lib/Target/SystemZ/SystemZTargetMachine.cpp b/lib/Target/SystemZ/SystemZTargetMachine.cpp
index fd947ee9faae3164c7b0805121a0728b7cfcd7c9..132608961a6605ce32b346b84cbfadf7d94e484e 100644 (file)
--- a/lib/Target/SystemZ/SystemZTargetMachine.cpp
+++ b/lib/Target/SystemZ/SystemZTargetMachine.cpp
@@ -30,7 +30,7 @@ SystemZTargetMachine::SystemZTargetMachine(const Target &T, StringRef TT,
     // Make sure that global data has at least 16 bits of alignment by default,
     // so that we can refer to it using LARL.  We don't have any special
     // requirements for stack variables though.
-    DL("E-p:64:64:64-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"),
+    DL("E-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"),
     InstrInfo(*this), TLInfo(*this), TSInfo(*this),
     FrameLowering(*this, Subtarget) {
   initAsmInfo();

diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index 274808839cda9524476099ee20e2c72282fc63f6..4675a4ec03d0e404ca93e71e97b4421485e2f1bc 100644 (file)
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -34,11 +34,9 @@ static std::string computeDataLayout(const X86Subtarget &ST) {
   // X86 is little endian
   std::string Ret = "e";
 
-  // X86 and x32 have 32 bit pointers, x86-64 has 64 bit pointers
+  // X86 and x32 have 32 bit pointers.
   if (ST.isTarget64BitILP32() || !ST.is64Bit())
     Ret += "-p:32:32";
-  else
-    Ret += "-p:64:64";
 
   // Objects on the stack ore aligned to 64 bits.
   // FIXME: of any size?