#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/list.h>
#include <linux/math64.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/io.h>
+#include <asm/clkdev.h>
+
#include <mach/clock.h>
#include <mach/hardware.h>
#include <mach/common.h>
}
static struct clk clk16m = {
- .name = "CLK16M",
.get_rate = clk16m_get_rate,
.enable = _clk_enable,
.enable_reg = CCM_CSCR,
}
static struct clk clk32 = {
- .name = "CLK32",
.get_rate = clk32_get_rate,
};
}
static struct clk clk32_premult = {
- .name = "CLK32_premultiplier",
.parent = &clk32,
.get_rate = clk32_premult_get_rate,
};
}
static struct clk prem_clk = {
- .name = "prem_clk",
.set_parent = prem_clk_set_parent,
};
}
static struct clk system_clk = {
- .name = "system_clk",
.parent = &prem_clk,
.get_rate = system_clk_get_rate,
};
}
static struct clk mcu_clk = {
- .name = "mcu_clk",
.parent = &clk32_premult,
.get_rate = mcu_clk_get_rate,
};
}
static struct clk fclk = {
- .name = "fclk",
.parent = &mcu_clk,
.get_rate = fclk_get_rate,
};
}
static struct clk hclk = {
- .name = "hclk",
.parent = &system_clk,
.get_rate = hclk_get_rate,
.round_rate = hclk_round_rate,
}
static struct clk clk48m = {
- .name = "CLK48M",
.parent = &system_clk,
.get_rate = clk48m_get_rate,
.round_rate = clk48m_round_rate,
static struct clk perclk[] = {
{
- .name = "perclk",
.id = 0,
.parent = &system_clk,
.get_rate = perclk1_get_rate,
.round_rate = perclk1_round_rate,
.set_rate = perclk1_set_rate,
}, {
- .name = "perclk",
.id = 1,
.parent = &system_clk,
.get_rate = perclk2_get_rate,
.round_rate = perclk2_round_rate,
.set_rate = perclk2_set_rate,
}, {
- .name = "perclk",
.id = 2,
.parent = &system_clk,
.get_rate = perclk3_get_rate,
}
static struct clk clko_clk = {
- .name = "clko_clk",
.set_parent = clko_set_parent,
};
static struct clk dma_clk = {
- .name = "dma",
.parent = &hclk,
.round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate,
};
static struct clk csi_clk = {
- .name = "csi_clk",
.parent = &hclk,
.round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate,
};
static struct clk mma_clk = {
- .name = "mma_clk",
.parent = &hclk,
.round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate,
};
static struct clk usbd_clk = {
- .name = "usbd_clk",
.parent = &clk48m,
.round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate,
};
static struct clk gpt_clk = {
- .name = "gpt_clk",
.parent = &perclk[0],
.round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate,
};
static struct clk uart_clk = {
- .name = "uart",
.parent = &perclk[0],
.round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate,
};
static struct clk i2c_clk = {
- .name = "i2c_clk",
.parent = &hclk,
.round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate,
};
static struct clk spi_clk = {
- .name = "spi_clk",
.parent = &perclk[1],
.round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate,
};
static struct clk sdhc_clk = {
- .name = "sdhc_clk",
.parent = &perclk[1],
.round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate,
};
static struct clk lcdc_clk = {
- .name = "lcdc_clk",
.parent = &perclk[1],
.round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate,
};
static struct clk mshc_clk = {
- .name = "mshc_clk",
.parent = &hclk,
.round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate,
};
static struct clk ssi_clk = {
- .name = "ssi_clk",
.parent = &perclk[2],
.round_rate = _clk_parent_round_rate,
.set_rate = _clk_parent_set_rate,
};
static struct clk rtc_clk = {
- .name = "rtc_clk",
.parent = &clk32,
};
-static struct clk *mxc_clks[] = {
- &clk16m,
- &clk32,
- &clk32_premult,
- &prem_clk,
- &system_clk,
- &mcu_clk,
- &fclk,
- &hclk,
- &clk48m,
- &perclk[0],
- &perclk[1],
- &perclk[2],
- &clko_clk,
- &dma_clk,
- &csi_clk,
- &mma_clk,
- &usbd_clk,
- &gpt_clk,
- &uart_clk,
- &i2c_clk,
- &spi_clk,
- &sdhc_clk,
- &lcdc_clk,
- &mshc_clk,
- &ssi_clk,
- &rtc_clk,
+#define _REGISTER_CLOCK(d, n, c) \
+ { \
+ .dev_id = d, \
+ .con_id = n, \
+ .clk = &c, \
+ },
+static struct clk_lookup lookups[] __initdata = {
+ _REGISTER_CLOCK(NULL, "dma", dma_clk)
+ _REGISTER_CLOCK("mx1-camera.0", NULL, csi_clk)
+ _REGISTER_CLOCK(NULL, "mma", mma_clk)
+ _REGISTER_CLOCK("imx_udc.0", NULL, usbd_clk)
+ _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
+ _REGISTER_CLOCK("imx-uart.0", NULL, uart_clk)
+ _REGISTER_CLOCK("imx-uart.1", NULL, uart_clk)
+ _REGISTER_CLOCK("imx-uart.2", NULL, uart_clk)
+ _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
+ _REGISTER_CLOCK("spi_imx.0", NULL, spi_clk)
+ _REGISTER_CLOCK("imx-mmc.0", NULL, sdhc_clk)
+ _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
+ _REGISTER_CLOCK(NULL, "mshc", mshc_clk)
+ _REGISTER_CLOCK(NULL, "ssi", ssi_clk)
+ _REGISTER_CLOCK("mxc_rtc.0", NULL, rtc_clk)
};
int __init mx1_clocks_init(unsigned long fref)
{
- struct clk **clkp;
unsigned int reg;
+ int i;
/* disable clocks we are able to */
__raw_writel(0, SCM_GCCR);
reg = (reg & CCM_CSCR_CLKO_MASK) >> CCM_CSCR_CLKO_OFFSET;
clko_clk.parent = (struct clk *)clko_clocks[reg];
- for (clkp = mxc_clks; clkp < mxc_clks + ARRAY_SIZE(mxc_clks); clkp++)
- clk_register(*clkp);
+ for (i = 0; i < ARRAY_SIZE(lookups); i++)
+ clkdev_add(&lookups[i]);
clk_enable(&hclk);
clk_enable(&fclk);