Fix PR4528. This scavenger assertion is too strict. The two-address value is
authorEvan Cheng <evan.cheng@apple.com>
Tue, 4 Aug 2009 16:52:44 +0000 (16:52 +0000)
committerEvan Cheng <evan.cheng@apple.com>
Tue, 4 Aug 2009 16:52:44 +0000 (16:52 +0000)
killed by another operand.

There is probably a better fix. Either 1) scavenger can look at other operands, or
2) livevariables can be smarter about kill markers. Patches welcome.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78072 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/RegisterScavenging.cpp
test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll [new file with mode: 0644]

index e1c8f2fe22eeb44a200976ac5492c573b1326a0e..0a29ef02bcb3d053c94e0b5850f0bc89917e260b 100644 (file)
@@ -267,7 +267,8 @@ void RegScavenger::forward() {
     unsigned UseIdx;
     if (MI->isRegTiedToUseOperand(Idx, &UseIdx) &&
         !MI->getOperand(UseIdx).isUndef()) {
-      assert(isUsed(Reg) && "Using an undefined register!");
+      assert(!MI->getOperand(UseIdx).isKill() &&
+             "Using an undefined register!");
       continue;
     }
 
diff --git a/test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll b/test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll
new file mode 100644 (file)
index 0000000..cb27473
--- /dev/null
@@ -0,0 +1,25 @@
+; RUN: llvm-as < %s | llc -mtriple=armv6-elf
+; PR4528
+
+define arm_aapcscc i32 @file_read_actor(i32 %desc, i32 %page, i32 %offset, i32 %size) nounwind optsize {
+entry:
+       br i1 undef, label %fault_in_pages_writeable.exit, label %bb5.i
+
+bb5.i:         ; preds = %entry
+       %asmtmp.i = tail call i32 asm sideeffect "1:\09strbt\09$1,[$2]\0A2:\0A\09.section .fixup,\22ax\22\0A\09.align\092\0A3:\09mov\09$0, $3\0A\09b\092b\0A\09.previous\0A\09.section __ex_table,\22a\22\0A\09.align\093\0A\09.long\091b, 3b\0A\09.previous", "=r,r,r,i,0,~{cc}"(i8 0, i32 undef, i32 -14, i32 0) nounwind             ; <i32> [#uses=1]
+       br label %fault_in_pages_writeable.exit
+
+fault_in_pages_writeable.exit:         ; preds = %bb5.i, %entry
+       %0 = phi i32 [ 0, %entry ], [ %asmtmp.i, %bb5.i ]               ; <i32> [#uses=1]
+       %1 = icmp eq i32 %0, 0          ; <i1> [#uses=1]
+       br i1 %1, label %bb2, label %bb3
+
+bb2:           ; preds = %fault_in_pages_writeable.exit
+       unreachable
+
+bb3:           ; preds = %fault_in_pages_writeable.exit
+       %2 = tail call arm_aapcscc  i32 @__copy_to_user(i8* undef, i8* undef, i32 undef) nounwind               ; <i32> [#uses=0]
+       unreachable
+}
+
+declare arm_aapcscc i32 @__copy_to_user(i8*, i8*, i32)