Added a handful of x86-32 instructions that were missing so that llvm-mc would

be more complete.  These are only expected to be used by llvm-mc with assembly
source so there is no pattern, [], in the .td files.  Most are being added to
X86InstrInfo.td as Chris suggested and only comments about register uses are
added.  Suggestions welcome on the .td changes as I'm not sure on every detail
of the x86 records.  More missing instructions will be coming.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116716 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 7dbd2217d1906eaf66cee6f66cacf5c38595a3f6..c9e210795dde2ff2884e82f0a463a62c4c19f8e4 100644 (file)
--- a/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -1082,6 +1082,13 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,
     Operands[0] = X86Operand::CreateToken("xor", NameLoc);
   }
 
+  // FIXME: Hack to handle recognize "aa[dm]" -> "aa[dm] $0xA".
+  if ((Name.startswith("aad") || Name.startswith("aam")) &&
+      Operands.size() == 1) {
+    const MCExpr *A = MCConstantExpr::Create(0xA, getParser().getContext());
+    Operands.push_back(X86Operand::CreateImm(A, NameLoc, NameLoc));
+  }
+
   return false;
 }
 

diff --git a/lib/Target/X86/X86InstrControl.td b/lib/Target/X86/X86InstrControl.td
index 001138482d799939e83b1ac1e94a88c947449485..c100bcb978c519fb8b0b787b5c929321be203181 100644 (file)
--- a/lib/Target/X86/X86InstrControl.td
+++ b/lib/Target/X86/X86InstrControl.td
@@ -24,10 +24,15 @@ let isTerminator = 1, isReturn = 1, isBarrier = 1,
   def RETI   : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops),
                     "ret\t$amt",
                     [(X86retflag timm:$amt)]>;
+  def RETIW  : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops),
+                    "retw\t$amt",
+                    [(X86retflag timm:$amt)]>, OpSize;
   def LRET   : I   <0xCB, RawFrm, (outs), (ins),
                     "lret", []>;
   def LRETI  : Ii16<0xCA, RawFrm, (outs), (ins i16imm:$amt),
                     "lret\t$amt", []>;
+  def LRETIW : Ii16<0xCA, RawFrm, (outs), (ins i16imm:$amt),
+                    "lretw\t$amt", []>, OpSize;
 }
 
 // Unconditional branches.

diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 14d673a36a08d415f529080de810e233c6c0de0c..3feb8363ef0d90bb195f655f87a15f0ef191cf82 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -1182,7 +1182,45 @@ def CLTS : I<0x06, RawFrm, (outs), (ins), "clts", []>, TB;
 // Table lookup instructions
 def XLAT : I<0xD7, RawFrm, (outs), (ins), "xlatb", []>;
 
-
+// ASCII Adjust After Addition
+// sets AL, AH and CF and AF of EFLAGS and uses AL and AF of EFLAGS
+def AAA : I<0x37, RawFrm, (outs), (ins), "aaa", []>, Requires<[In32BitMode]>;
+
+// ASCII Adjust AX Before Division
+// sets AL, AH and EFLAGS and uses AL and AH
+def AAD8i8 : Ii8<0xD5, RawFrm, (outs), (ins i8imm:$src),
+                 "aad\t$src", []>, Requires<[In32BitMode]>;
+
+// ASCII Adjust AX After Multiply
+// sets AL, AH and EFLAGS and uses AL
+def AAM8i8 : Ii8<0xD4, RawFrm, (outs), (ins i8imm:$src),
+                 "aam\t$src", []>, Requires<[In32BitMode]>;
+
+// ASCII Adjust AL After Subtraction - sets 
+// sets AL, AH and CF and AF of EFLAGS and uses AL and AF of EFLAGS
+def AAS : I<0x3F, RawFrm, (outs), (ins), "aas", []>, Requires<[In32BitMode]>;
+
+// Decimal Adjust AL after Addition
+// sets AL, CF and AF of EFLAGS and uses AL, CF and AF of EFLAGS
+def DAA : I<0x27, RawFrm, (outs), (ins), "daa", []>, Requires<[In32BitMode]>;
+
+// Decimal Adjust AL after Subtraction
+// sets AL, CF and AF of EFLAGS and uses AL, CF and AF of EFLAGS
+def DAS : I<0x2F, RawFrm, (outs), (ins), "das", []>, Requires<[In32BitMode]>;
+
+// Check Array Index Against Bounds
+def BOUNDS16rm : I<0x62, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
+                   "bound\t{$src, $dst|$dst, $src}", []>, OpSize,
+                   Requires<[In32BitMode]>; 
+def BOUNDS32rm : I<0x62, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
+                   "bound\t{$src, $dst|$dst, $src}", []>,
+                   Requires<[In32BitMode]>; 
+
+// Adjust RPL Field of Segment Selector
+def ARPL16rr : I<0x63, MRMDestReg, (outs GR16:$src), (ins GR16:$dst),
+                 "arpl\t{$src, $dst|$dst, $src}", []>, Requires<[In32BitMode]>; 
+def ARPL16mr : I<0x63, MRMSrcMem, (outs GR16:$src), (ins i16mem:$dst),
+                 "arpl\t{$src, $dst|$dst, $src}", []>, Requires<[In32BitMode]>; 
 
 //===----------------------------------------------------------------------===//
 // Subsystems.

diff --git a/test/MC/X86/x86-32.s b/test/MC/X86/x86-32.s
index 2391028feeefdf3b7d16397ad6e0fceccfc3c98f..a03472203deb63c423874825527ed0e45000fe15 100644 (file)
--- a/test/MC/X86/x86-32.s
+++ b/test/MC/X86/x86-32.s
@@ -590,3 +590,67 @@ pshufw $14, %mm4, %mm0
 // PR8288
 pshufw $90, %mm4, %mm0
 
+// rdar://8416805
+// CHECK: aaa
+// CHECK:  encoding: [0x37]
+               aaa
+
+// CHECK: aad  $1
+// CHECK:  encoding: [0xd5,0x01]
+               aad     $1
+
+// CHECK: aad  $10
+// CHECK:  encoding: [0xd5,0x0a]
+               aad     $0xA
+
+// CHECK: aad  $10
+// CHECK:  encoding: [0xd5,0x0a]
+               aad
+
+// CHECK: aam  $2
+// CHECK:  encoding: [0xd4,0x02]
+               aam     $2
+
+// CHECK: aam  $10
+// CHECK:  encoding: [0xd4,0x0a]
+               aam     $0xA
+
+// CHECK: aam  $10
+// CHECK:  encoding: [0xd4,0x0a]
+               aam
+
+// CHECK: aas
+// CHECK:  encoding: [0x3f]
+               aas
+
+// CHECK: daa
+// CHECK:  encoding: [0x27]
+               daa
+
+// CHECK: das
+// CHECK:  encoding: [0x2f]
+               das
+
+// CHECK: retw $31438
+// CHECK:  encoding: [0x66,0xc2,0xce,0x7a]
+               retw    $0x7ace
+
+// CHECK: lretw        $31438
+// CHECK:  encoding: [0x66,0xca,0xce,0x7a]
+               lretw   $0x7ace
+
+// CHECK: bound        2(%eax), %bx
+// CHECK:  encoding: [0x66,0x62,0x58,0x02]
+               bound   2(%eax),%bx
+
+// CHECK: bound        4(%ebx), %ecx
+// CHECK:  encoding: [0x62,0x4b,0x04]
+               bound   4(%ebx),%ecx
+
+// CHECK: arpl %bx, %bx
+// CHECK:  encoding: [0x63,0xdb]
+               arpl    %bx,%bx
+
+// CHECK: arpl %bx, 6(%ecx)
+// CHECK:  encoding: [0x63,0x59,0x06]
+               arpl    %bx,6(%ecx)

diff --git a/test/MC/X86/x86-64.s b/test/MC/X86/x86-64.s
index 82998952cf8238be76e593088e072280784a9799..32c1e526d02ac1dc3b93bda8587ec85293372d42 100644 (file)
--- a/test/MC/X86/x86-64.s
+++ b/test/MC/X86/x86-64.s
@@ -714,6 +714,15 @@ iretq
 // CHECK: iretq
 // CHECK: encoding: [0x48,0xcf]
 
+// rdar://8416805
+// CHECK: retw $31438
+// CHECK:  encoding: [0x66,0xc2,0xce,0x7a]
+               retw    $0x7ace
+
+// CHECK: lretw        $31438
+// CHECK:  encoding: [0x66,0xca,0xce,0x7a]
+               lretw   $0x7ace
+
 // rdar://8403907
 sysret
 // CHECK: sysretl