make the x86 mccode emitter emit the 0x67 and 0x66 prefix bytes in the same

order as cctools for diffability.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115022 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86MCCodeEmitter.cpp b/lib/Target/X86/X86MCCodeEmitter.cpp
index c0154514712c58a9851c417bd3b4733a4c9a01aa..e9ce02f1ff71f107dfaf2c328d4366a9096c4277 100644 (file)
--- a/lib/Target/X86/X86MCCodeEmitter.cpp
+++ b/lib/Target/X86/X86MCCodeEmitter.cpp
@@ -720,14 +720,14 @@ void X86MCCodeEmitter::EmitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte,
   if ((TSFlags & X86II::Op0Mask) == X86II::REP)
     EmitByte(0xF3, CurByte, OS);
 
-  // Emit the operand size opcode prefix as needed.
-  if (TSFlags & X86II::OpSize)
-    EmitByte(0x66, CurByte, OS);
-
   // Emit the address size opcode prefix as needed.
   if ((TSFlags & X86II::AdSize) ||
       (MemOperand != -1 && Is64BitMode && Is32BitMemOperand(MI, MemOperand)))
     EmitByte(0x67, CurByte, OS);
+  
+  // Emit the operand size opcode prefix as needed.
+  if (TSFlags & X86II::OpSize)
+    EmitByte(0x66, CurByte, OS);
 
   bool Need0FPrefix = false;
   switch (TSFlags & X86II::Op0Mask) {

diff --git a/test/MC/AsmParser/X86/x86_instructions.s b/test/MC/AsmParser/X86/x86_instructions.s
index 248cec193827222cbdb97e13a820fd80243782b6..24f5a27ef6d7efafe045f08f9f37508fbd42d0cc 100644 (file)
--- a/test/MC/AsmParser/X86/x86_instructions.s
+++ b/test/MC/AsmParser/X86/x86_instructions.s
@@ -449,3 +449,8 @@ leaq        8(%rax), %rsi
 // CHECK: leaq 8(%rax), %rsi
 // CHECK: encoding: [0x48,0x8d,0x70,0x08]
 
+
+cvttpd2dq      0xdeadbeef(%ebx,%ecx,8),%xmm5
+// CHECK: cvttpd2dq    3735928559(%ebx,%ecx,8), %xmm5
+// CHECK: encoding: [0x67,0x66,0x0f,0xe6,0xac,0xcb,0xef,0xbe,0xad,0xde]
+