[PowerPC] Don't attempt a 64-bit pow2 division on PPC32

In r224033, in moving the signed power-of-2 division expansion into
BuildSDIVPow2, I accidentally made it possible to attempt the lowering for a
64-bit division on PPC32. This later asserts.

Fixes PR21928.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224758 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 62c1f714e9d4aab18eb9ff7147d332b0024216e1..18384627ced3386bfb1b078b6d3a6c216132a668 100644 (file)
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -8966,6 +8966,8 @@ PPCTargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor,
                                   std::vector<SDNode *> *Created) const {
   // fold (sdiv X, pow2)
   EVT VT = N->getValueType(0);
+  if (VT == MVT::i64 && !Subtarget.isPPC64())
+    return SDValue();
   if ((VT != MVT::i32 && VT != MVT::i64) ||
       !(Divisor.isPowerOf2() || (-Divisor).isPowerOf2()))
     return SDValue();

diff --git a/test/CodeGen/PowerPC/sdiv-pow2.ll b/test/CodeGen/PowerPC/sdiv-pow2.ll
index c6330a6807aa31557c4fbe521ba2546a2988e3ea..5ec019dfb4af10e603548666392dbd150830f1f9 100644 (file)
--- a/test/CodeGen/PowerPC/sdiv-pow2.ll
+++ b/test/CodeGen/PowerPC/sdiv-pow2.ll
@@ -1,4 +1,5 @@
 ; RUN: llc -mcpu=ppc64 < %s | FileCheck %s
+; RUN: llc -mtriple=powerpc-unknown-linux-gnu -mcpu=ppc < %s | FileCheck -check-prefix=CHECK-32 %s
 target datalayout = "E-m:e-i64:64-n32:64"
 target triple = "powerpc64-unknown-linux-gnu"
 
@@ -25,6 +26,10 @@ entry:
 ; CHECK: sradi [[REG1:[0-9]+]], 3, 3
 ; CHECK: addze 3, [[REG1]]
 ; CHECK: blr
+
+; CHECK-32-LABEL @foo8
+; CHECK-32-NOT: sradi
+; CHECK-32: blr
 }
 
 ; Function Attrs: nounwind readnone
@@ -52,6 +57,10 @@ entry:
 ; CHECK: addze [[REG2:[0-9]+]], [[REG1]]
 ; CHECK: neg 3, [[REG2]]
 ; CHECK: blr
+
+; CHECK-32-LABEL @foo8n
+; CHECK-32-NOT: sradi
+; CHECK-32: blr
 }
 
 attributes #0 = { nounwind readnone }