Add constant pool support, including folding into addresses.

Pretty print addresses a bit, to not print [%r1+%g0]: just print [%r1]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24813 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Sparc/SparcAsmPrinter.cpp b/lib/Target/Sparc/SparcAsmPrinter.cpp
index ea4971c995e618477c319a22bfb70952ce3332cd..f64bd7eddafdc97b6dcedcc1842275206e5c521d 100644 (file)
--- a/lib/Target/Sparc/SparcAsmPrinter.cpp
+++ b/lib/Target/Sparc/SparcAsmPrinter.cpp
@@ -185,8 +185,20 @@ void SparcV8AsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
 
 void SparcV8AsmPrinter::printMemOperand(const MachineInstr *MI, int opNum) {
   printOperand(MI, opNum);
+  MachineOperand::MachineOperandType OpTy = MI->getOperand(opNum+1).getType();
+  
+  if ((OpTy == MachineOperand::MO_VirtualRegister ||
+       OpTy == MachineOperand::MO_MachineRegister) &&
+      MI->getOperand(opNum+1).getReg() == V8::G0)
+    return;   // don't print "+%g0"
+  if ((OpTy == MachineOperand::MO_SignExtendedImmed ||
+       OpTy == MachineOperand::MO_UnextendedImmed) &&
+      MI->getOperand(opNum+1).getImmedValue() == 0)
+    return;   // don't print "+0"
+  
   O << "+";
-  if (MI->getOperand(opNum+1).getType() == MachineOperand::MO_GlobalAddress) {
+  if (OpTy == MachineOperand::MO_GlobalAddress ||
+      OpTy == MachineOperand::MO_ConstantPoolIndex) {
     O << "%lo(";
     printOperand(MI, opNum+1);
     O << ")";

diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index aa558d189cbb9aa6d2582ba8672494e548ea2c39..860c76fdb14b801c649d93a5c472f5d2beb46f78 100644 (file)
--- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -75,6 +75,7 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
 
   // Custom legalize GlobalAddress nodes into LO/HI parts.
   setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
+  setOperationAction(ISD::ConstantPool , MVT::i32, Custom);
   
   // Sparc doesn't have sext_inreg, replace them with shl/sra
   setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16  , Expand);
@@ -251,6 +252,13 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
     SDOperand Lo = DAG.getNode(V8ISD::Lo, MVT::i32, GA);
     return DAG.getNode(ISD::ADD, MVT::i32, Lo, Hi);
   }
+  case ISD::ConstantPool: {
+    Constant *C = cast<ConstantPoolSDNode>(Op)->get();
+    SDOperand CP = DAG.getTargetConstantPool(C, MVT::i32);
+    SDOperand Hi = DAG.getNode(V8ISD::Hi, MVT::i32, CP);
+    SDOperand Lo = DAG.getNode(V8ISD::Lo, MVT::i32, CP);
+    return DAG.getNode(ISD::ADD, MVT::i32, Lo, Hi);
+  }
   }  
 }
 

diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td
index eaa6691fee364ed3d25fd38bbdd52e36fdb9189a..22ed2417df59e8e2ffea65cf0deeed7f041ee911 100644 (file)
--- a/lib/Target/Sparc/SparcInstrInfo.td
+++ b/lib/Target/Sparc/SparcInstrInfo.td
@@ -660,6 +660,8 @@ def : Pat<(i32 simm13:$val),
 def : Pat<(i32 imm:$val),
           (ORri (SETHIi (HI22 imm:$val)), (LO10 imm:$val))>;
 
-// Global addresses
+// Global addresses, constant pool entries
 def : Pat<(V8hi tglobaladdr:$in), (SETHIi tglobaladdr:$in)>;
 def : Pat<(V8lo tglobaladdr:$in), (ORri G0, tglobaladdr:$in)>;
+def : Pat<(V8hi tconstpool:$in), (SETHIi tconstpool:$in)>;
+def : Pat<(V8lo tconstpool:$in), (ORri G0, tconstpool:$in)>;

diff --git a/lib/Target/SparcV8/SparcV8AsmPrinter.cpp b/lib/Target/SparcV8/SparcV8AsmPrinter.cpp
index ea4971c995e618477c319a22bfb70952ce3332cd..f64bd7eddafdc97b6dcedcc1842275206e5c521d 100644 (file)
--- a/lib/Target/SparcV8/SparcV8AsmPrinter.cpp
+++ b/lib/Target/SparcV8/SparcV8AsmPrinter.cpp
@@ -185,8 +185,20 @@ void SparcV8AsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
 
 void SparcV8AsmPrinter::printMemOperand(const MachineInstr *MI, int opNum) {
   printOperand(MI, opNum);
+  MachineOperand::MachineOperandType OpTy = MI->getOperand(opNum+1).getType();
+  
+  if ((OpTy == MachineOperand::MO_VirtualRegister ||
+       OpTy == MachineOperand::MO_MachineRegister) &&
+      MI->getOperand(opNum+1).getReg() == V8::G0)
+    return;   // don't print "+%g0"
+  if ((OpTy == MachineOperand::MO_SignExtendedImmed ||
+       OpTy == MachineOperand::MO_UnextendedImmed) &&
+      MI->getOperand(opNum+1).getImmedValue() == 0)
+    return;   // don't print "+0"
+  
   O << "+";
-  if (MI->getOperand(opNum+1).getType() == MachineOperand::MO_GlobalAddress) {
+  if (OpTy == MachineOperand::MO_GlobalAddress ||
+      OpTy == MachineOperand::MO_ConstantPoolIndex) {
     O << "%lo(";
     printOperand(MI, opNum+1);
     O << ")";

diff --git a/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp b/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
index aa558d189cbb9aa6d2582ba8672494e548ea2c39..860c76fdb14b801c649d93a5c472f5d2beb46f78 100644 (file)
--- a/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
+++ b/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
@@ -75,6 +75,7 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
 
   // Custom legalize GlobalAddress nodes into LO/HI parts.
   setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
+  setOperationAction(ISD::ConstantPool , MVT::i32, Custom);
   
   // Sparc doesn't have sext_inreg, replace them with shl/sra
   setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16  , Expand);
@@ -251,6 +252,13 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
     SDOperand Lo = DAG.getNode(V8ISD::Lo, MVT::i32, GA);
     return DAG.getNode(ISD::ADD, MVT::i32, Lo, Hi);
   }
+  case ISD::ConstantPool: {
+    Constant *C = cast<ConstantPoolSDNode>(Op)->get();
+    SDOperand CP = DAG.getTargetConstantPool(C, MVT::i32);
+    SDOperand Hi = DAG.getNode(V8ISD::Hi, MVT::i32, CP);
+    SDOperand Lo = DAG.getNode(V8ISD::Lo, MVT::i32, CP);
+    return DAG.getNode(ISD::ADD, MVT::i32, Lo, Hi);
+  }
   }  
 }
 

diff --git a/lib/Target/SparcV8/SparcV8InstrInfo.td b/lib/Target/SparcV8/SparcV8InstrInfo.td
index eaa6691fee364ed3d25fd38bbdd52e36fdb9189a..22ed2417df59e8e2ffea65cf0deeed7f041ee911 100644 (file)
--- a/lib/Target/SparcV8/SparcV8InstrInfo.td
+++ b/lib/Target/SparcV8/SparcV8InstrInfo.td
@@ -660,6 +660,8 @@ def : Pat<(i32 simm13:$val),
 def : Pat<(i32 imm:$val),
           (ORri (SETHIi (HI22 imm:$val)), (LO10 imm:$val))>;
 
-// Global addresses
+// Global addresses, constant pool entries
 def : Pat<(V8hi tglobaladdr:$in), (SETHIi tglobaladdr:$in)>;
 def : Pat<(V8lo tglobaladdr:$in), (ORri G0, tglobaladdr:$in)>;
+def : Pat<(V8hi tconstpool:$in), (SETHIi tconstpool:$in)>;
+def : Pat<(V8lo tconstpool:$in), (ORri G0, tconstpool:$in)>;