cl::opt<bool> DisableStrip("disable-strip",
cl::desc("Do not strip the LLVM bytecode in executable"));
+
+ cl::opt<bool> EnableModSched("enable-ModSched", cl::desc("Enable modulo scheduling pass instead of local scheduling"));
+
// Register the target.
RegisterTarget<SparcV9TargetMachine> X("sparcv9", " SPARC V9");
}
PM.add(createSparcV9BurgInstSelector(*this));
- if (!DisableSched)
- PM.add(createInstructionSchedulingWithSSAPass(*this));
+ if(PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr, "Before modulo scheduling:\n"));
+ //Use ModuloScheduling if enabled, otherwise use local scheduling if not disabled.
+ if(EnableModSched)
+ PM.add(createModuloSchedulingPass(*this));
+ else {
+ if (!DisableSched)
+ PM.add(createInstructionSchedulingWithSSAPass(*this));
+ }
+
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr, "Before reg alloc:\n"));
# What the Sparc JIT requires
ifdef ENABLE_SPARCV9_JIT
JITLIBS += LLVMSparcV9
- ARCHLIBS += LLVMSparcV9InstrSched LLVMSparcV9LiveVar LLVMInstrumentation.a \
+ ARCHLIBS += LLVMSparcV9ModuloSched LLVMSparcV9InstrSched LLVMSparcV9LiveVar LLVMInstrumentation.a \
LLVMProfilePaths LLVMBCWriter LLVMTransforms.a LLVMipo.a \
LLVMipa.a LLVMDataStructure.a LLVMSparcV9RegAlloc
endif