alignment for PPC32/64, avoiding some masking operations.
llvm-gcc expands vaarg inline instead of using the instruction
so it has never hit this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116168
91177308-0d34-0410-b5e6-
96231b3b80d8
setUseUnderscoreSetJmp(true);
setUseUnderscoreLongJmp(true);
+ // On PPC32/64, arguments smaller than 4/8 bytes are extended, so all
+ // arguments are at least 4/8 bytes aligned.
+ setMinStackArgumentAlignment(TM.getSubtarget<PPCSubtarget>().isPPC64() ? 8:4);
+
// Set up the register classes.
addRegisterClass(MVT::i32, PPC::GPRCRegisterClass);
addRegisterClass(MVT::f32, PPC::F4RCRegisterClass);
--- /dev/null
+; RUN: llc < %s -march=ppc32 | FileCheck -check-prefix=P32 %s
+; RUN: llc < %s -march=ppc64 | FileCheck -check-prefix=P64 %s
+
+; PR8327
+define i8* @test1(i8** %foo) nounwind {
+ %A = va_arg i8** %foo, i8*
+ ret i8* %A
+}
+
+; P32: test1:
+; P32: lwz r4, 0(r3)
+; P32: addi r5, r4, 4
+; P32: stw r5, 0(r3)
+; P32: lwz r3, 0(r4)
+; P32: blr
+
+; P64: test1:
+; P64: ld r4, 0(r3)
+; P64: addi r5, r4, 8
+; P64: std r5, 0(r3)
+; P64: ld r3, 0(r4)
+; P64: blr