drm/i915: use the yesno helper for logging
authorJani Nikula <jani.nikula@intel.com>
Thu, 3 Sep 2015 08:16:09 +0000 (11:16 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 4 Sep 2015 08:14:22 +0000 (10:14 +0200)
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_pm.c

index 4563f8b955eacc5b8a52f34411277f1de620fbb4..41629faaf939c0a3a4ae230259d521891c9c27cf 100644 (file)
@@ -1382,17 +1382,16 @@ static int ironlake_drpc_info(struct seq_file *m)
        intel_runtime_pm_put(dev_priv);
        mutex_unlock(&dev->struct_mutex);
 
-       seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
-                  "yes" : "no");
+       seq_printf(m, "HD boost: %s\n", yesno(rgvmodectl & MEMMODE_BOOST_EN));
        seq_printf(m, "Boost freq: %d\n",
                   (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
                   MEMMODE_BOOST_FREQ_SHIFT);
        seq_printf(m, "HW control enabled: %s\n",
-                  rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
+                  yesno(rgvmodectl & MEMMODE_HWIDLE_EN));
        seq_printf(m, "SW control enabled: %s\n",
-                  rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
+                  yesno(rgvmodectl & MEMMODE_SWMODE_EN));
        seq_printf(m, "Gated voltage change: %s\n",
-                  rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
+                  yesno(rgvmodectl & MEMMODE_RCLK_GATE));
        seq_printf(m, "Starting frequency: P%d\n",
                   (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
        seq_printf(m, "Max P-state: P%d\n",
@@ -1401,7 +1400,7 @@ static int ironlake_drpc_info(struct seq_file *m)
        seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
        seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
        seq_printf(m, "Render standby enabled: %s\n",
-                  (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
+                  yesno(!(rstdbyctl & RCX_SW_EXIT)));
        seq_puts(m, "Current RS state: ");
        switch (rstdbyctl & RSX_STATUS_MASK) {
        case RSX_STATUS_ON:
@@ -2844,8 +2843,7 @@ static void intel_dp_info(struct seq_file *m,
        struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base);
 
        seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]);
-       seq_printf(m, "\taudio support: %s\n", intel_dp->has_audio ? "yes" :
-                  "no");
+       seq_printf(m, "\taudio support: %s\n", yesno(intel_dp->has_audio));
        if (intel_encoder->type == INTEL_OUTPUT_EDP)
                intel_panel_info(m, &intel_connector->panel);
 }
@@ -2856,8 +2854,7 @@ static void intel_hdmi_info(struct seq_file *m,
        struct intel_encoder *intel_encoder = intel_connector->encoder;
        struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&intel_encoder->base);
 
-       seq_printf(m, "\taudio support: %s\n", intel_hdmi->has_audio ? "yes" :
-                  "no");
+       seq_printf(m, "\taudio support: %s\n", yesno(intel_hdmi->has_audio));
 }
 
 static void intel_lvds_info(struct seq_file *m,
index 44e753d5f7f5464ae2f54f9bbcf318a27b21d14e..45ab25e479ae430d8937a0486b5d8836eb787069 100644 (file)
@@ -4014,8 +4014,8 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
        }
 
        DRM_DEBUG_KMS("Display Port TPS3 support: source %s, sink %s\n",
-                     intel_dp_source_supports_hbr2(dev) ? "yes" : "no",
-                     drm_dp_tps3_supported(intel_dp->dpcd) ? "yes" : "no");
+                     yesno(intel_dp_source_supports_hbr2(dev)),
+                     yesno(drm_dp_tps3_supported(intel_dp->dpcd)));
 
        /* Intermediate frequency support */
        if (is_edp(intel_dp) &&
index 1b90f03f7025b89f2011a4a609579a9216b7ada8..79cd9872bf1f7812eae3b95db92cc851d17a18be 100644 (file)
@@ -5550,7 +5550,7 @@ static void cherryview_enable_rps(struct drm_device *dev)
        /* RPS code assumes GPLL is used */
        WARN_ONCE((val & GPLLENABLE) == 0, "GPLL not enabled\n");
 
-       DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & GPLLENABLE ? "yes" : "no");
+       DRM_DEBUG_DRIVER("GPLL enabled? %s\n", yesno(val & GPLLENABLE));
        DRM_DEBUG_DRIVER("GPU status: 0x%08x\n", val);
 
        dev_priv->rps.cur_freq = (val >> 8) & 0xff;
@@ -5640,7 +5640,7 @@ static void valleyview_enable_rps(struct drm_device *dev)
        /* RPS code assumes GPLL is used */
        WARN_ONCE((val & GPLLENABLE) == 0, "GPLL not enabled\n");
 
-       DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & GPLLENABLE ? "yes" : "no");
+       DRM_DEBUG_DRIVER("GPLL enabled? %s\n", yesno(val & GPLLENABLE));
        DRM_DEBUG_DRIVER("GPU status: 0x%08x\n", val);
 
        dev_priv->rps.cur_freq = (val >> 8) & 0xff;