reenable collapse of loadimm+AND -> dep.z (thanks guys)
authorDuraid Madina <duraid@octopus.com.au>
Sun, 21 Aug 2005 15:43:53 +0000 (15:43 +0000)
committerDuraid Madina <duraid@octopus.com.au>
Sun, 21 Aug 2005 15:43:53 +0000 (15:43 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22944 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/IA64/IA64ISelPattern.cpp

index b66a0327514c47a388db0988666ee9d3f7d5fd59..bf5aa565f248851952b52bed7f97a578cd264af5 100644 (file)
@@ -1439,7 +1439,7 @@ assert(0 && "hmm, ISD::SIGN_EXTEND: shouldn't ever be reached. bad luck!\n");
     case MVT::i32:
     case MVT::i64: {
       Tmp1 = SelectExpr(N.getOperand(0));
-/* FIXME     switch (ponderIntegerAndWith(N.getOperand(1), Tmp3)) {
+      switch (ponderIntegerAndWith(N.getOperand(1), Tmp3)) {
         case 1: // ANDing a constant that is 2^n-1 for some n
           switch (Tmp3) {
             case 8:  // if AND 0x00000000000000FF, be quaint and use zxt1
@@ -1452,12 +1452,13 @@ assert(0 && "hmm, ISD::SIGN_EXTEND: shouldn't ever be reached. bad luck!\n");
               BuildMI(BB, IA64::ZXT4, 1, Result).addReg(Tmp1);
               break;
             default: // otherwise, use dep.z to paste zeros
-              BuildMI(BB, IA64::DEPZ, 3, Result).addReg(Tmp1)
+            // FIXME: assert the dep.z is in bounds
+             BuildMI(BB, IA64::DEPZ, 3, Result).addReg(Tmp1)
                 .addImm(0).addImm(Tmp3);
               break;
-          }
-          return Result; // early exit
-  FIXME } */ // fallthrough and emit a simple AND:
+         }
+         return Result; // early exit
+      } // fallthrough and emit a simple AND:
       Tmp2 = SelectExpr(N.getOperand(1));
       BuildMI(BB, IA64::AND, 2, Result).addReg(Tmp1).addReg(Tmp2);
     }