* Allow mul, shl nodes to be codegen'd as LEA (if appropriate).

* Add patterns to handle GlobalAddress, ConstantPool, etc.
  MOV32ri to materialize these nodes in registers.
  ADD32ri to handle %reg + GA, etc.
  MOV32mi to handle store GA, etc. to memory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26374 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 1e8d222fc0bd3df5e8941d39337b48855dd567b7..8b7b513d3cec23ea2a79f4f9440c6af9b24a5155 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -56,6 +56,8 @@ def SDTX86RepStr  : SDTypeProfile<0, 1, [SDTCisVT<0, OtherVT>]>;
 
 def SDTX86RdTsc   : SDTypeProfile<0, 0, []>;
 
+def SDTX86Wrapper : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>, SDTCisPtrTy<0>]>;
+
 def X86shld    : SDNode<"X86ISD::SHLD",     SDTIntShiftDOp>;
 def X86shrd    : SDNode<"X86ISD::SHRD",     SDTIntShiftDOp>;
 
@@ -120,6 +122,8 @@ def X86rdtsc   : SDNode<"X86ISD::RDTSC_DAG",SDTX86RdTsc,
 def X86loadp   : SDNode<"X86ISD::LOAD_PACK", SDTLoad, 
                         [SDNPHasChain]>;
 
+def X86Wrapper : SDNode<"X86ISD::Wrapper",  SDTX86Wrapper>;
+
 //===----------------------------------------------------------------------===//
 // X86 Operand Definitions.
 //
@@ -165,7 +169,7 @@ def brtarget : Operand<OtherVT>;
 // Define X86 specific addressing mode.
 def addr    : ComplexPattern<i32, 4, "SelectAddr", []>;
 def leaaddr : ComplexPattern<i32, 4, "SelectLEAAddr",
-                             [add, frameindex]>;
+                             [add, mul, shl, frameindex]>;
 
 //===----------------------------------------------------------------------===//
 // X86 Instruction Format Definitions.
@@ -2352,6 +2356,25 @@ def MOV32r0  : I<0x31, MRMInitReg,  (ops R32:$dst),
 // Non-Instruction Patterns
 //===----------------------------------------------------------------------===//
 
+// ConstantPool GlobalAddress, ExternalSymbol
+def : Pat<(i32 (X86Wrapper tconstpool  :$dst)), (MOV32ri tconstpool  :$dst)>;
+def : Pat<(i32 (X86Wrapper tglobaladdr :$dst)), (MOV32ri tglobaladdr :$dst)>;
+def : Pat<(i32 (X86Wrapper texternalsym:$dst)), (MOV32ri texternalsym:$dst)>;
+
+def : Pat<(add R32:$src1, (X86Wrapper tconstpool:$src2)),
+          (ADD32ri R32:$src1, tconstpool:$src2)>;
+def : Pat<(add R32:$src1, (X86Wrapper tglobaladdr :$src2)),
+          (ADD32ri R32:$src1, tglobaladdr:$src2)>;
+def : Pat<(add R32:$src1, (X86Wrapper texternalsym:$src2)),
+          (ADD32ri R32:$src1, texternalsym:$src2)>;
+
+def : Pat<(store (X86Wrapper tconstpool:$src), addr:$dst),
+          (MOV32mi addr:$dst, tconstpool:$src)>;
+def : Pat<(store (X86Wrapper tglobaladdr:$src), addr:$dst),
+          (MOV32mi addr:$dst, tglobaladdr:$src)>;
+def : Pat<(store (X86Wrapper texternalsym:$src), addr:$dst),
+          (MOV32mi addr:$dst, texternalsym:$src)>;
+
 // Calls
 def : Pat<(X86call tglobaladdr:$dst),
           (CALLpcrel32 tglobaladdr:$dst)>;