Fix minor detail

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4725 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp
index d9f5c4fc73ac2c3beac96e776ebaa146210f3dec..d74bfd4912e9151fa33b4af6ae36aa794b46c96a 100644 (file)
--- a/lib/Target/X86/InstSelectSimple.cpp
+++ b/lib/Target/X86/InstSelectSimple.cpp
@@ -451,7 +451,7 @@ void ISel::visitMul(BinaryOperator &I) {
   BuildMI(BB, MovOpcode[Class], 1, Reg).addReg(Op0Reg);
   
   // Emit the appropriate multiply instruction...
-  BuildMI(BB, MulOpcode[Class], 4)
+  BuildMI(BB, MulOpcode[Class], 3)
     .addReg(Reg, UseAndDef).addReg(Op1Reg).addClobber(Clobber);
 
   // Put the result into the destination register...

diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp
index d9f5c4fc73ac2c3beac96e776ebaa146210f3dec..d74bfd4912e9151fa33b4af6ae36aa794b46c96a 100644 (file)
--- a/lib/Target/X86/X86ISelSimple.cpp
+++ b/lib/Target/X86/X86ISelSimple.cpp
@@ -451,7 +451,7 @@ void ISel::visitMul(BinaryOperator &I) {
   BuildMI(BB, MovOpcode[Class], 1, Reg).addReg(Op0Reg);
   
   // Emit the appropriate multiply instruction...
-  BuildMI(BB, MulOpcode[Class], 4)
+  BuildMI(BB, MulOpcode[Class], 3)
     .addReg(Reg, UseAndDef).addReg(Op1Reg).addClobber(Clobber);
 
   // Put the result into the destination register...