add isTerminatortto b and bcond

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31036 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index aa26e304ea2183147767e86c66216c8d814d759c..5392929462cf500c193999ee2c1ac1adc7cc95a9 100644 (file)
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -210,13 +210,15 @@ let Defs = [R0] in {
   def UMULL   : IntBinOp<"umull r12,", mulhu>;
 }
 
-def bcond      : InstARM<(ops brtarget:$dst, CCOp:$cc),
-                        "b$cc $dst",
-                        [(armbr bb:$dst, imm:$cc)]>;
-
-def b      : InstARM<(ops brtarget:$dst),
-                        "b $dst",
-                        [(br bb:$dst)]>;
+let isTerminator = 1 in {
+  def bcond   : InstARM<(ops brtarget:$dst, CCOp:$cc),
+                           "b$cc $dst",
+                           [(armbr bb:$dst, imm:$cc)]>;
+
+  def b       : InstARM<(ops brtarget:$dst),
+                        "b $dst",
+                        [(br bb:$dst)]>;
+}
 
 def cmp      : InstARM<(ops IntRegs:$a, op_addr_mode1:$b),
                       "cmp $a, $b",