Fix JIT encoding for CMPSD as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45268 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrFormats.td b/lib/Target/X86/X86InstrFormats.td
index 1eda93b0e9f2e74f18c2e1b65f8ab32dbad21b59..8ac32077506ab6e258ea011793ef086c8d013590 100644 (file)
--- a/lib/Target/X86/X86InstrFormats.td
+++ b/lib/Target/X86/X86InstrFormats.td
@@ -156,11 +156,15 @@ class PSIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
 // SSE2 Instruction Templates:
 // 
 //   SDI   - SSE2 instructions with XD prefix.
+//   SDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix.
 //   PDI   - SSE2 instructions with TB and OpSize prefixes.
 //   PDIi8 - SSE2 instructions with ImmT == Imm8 and TB and OpSize prefixes.
 
 class SDI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag> pattern>
       : I<o, F, outs, ins, asm, pattern>, XD, Requires<[HasSSE2]>;
+class SDIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
+            list<dag> pattern>
+      : Ii8<o, F, outs, ins, asm, pattern>, XD, Requires<[HasSSE2]>;
 class PDI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag> pattern>
       : I<o, F, outs, ins, asm, pattern>, TB, OpSize, Requires<[HasSSE2]>;
 class PDIi8<bits<8> o, Format F, dag outs, dag ins, string asm,

diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index d6a77a2e3bf48d8bea93cb14d481dd14997c46ea..1eb20185179954e7b599e97498b7db5ac25e5a17 100644 (file)
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -1085,10 +1085,10 @@ def Int_CVTTSD2SIrm : SDI<0x2C, MRMSrcMem, (outs GR32:$dst), (ins f128mem:$src),
 
 // Comparison instructions
 let isTwoAddress = 1 in {
-  def CMPSDrr : SDI<0xC2, MRMSrcReg, 
+  def CMPSDrr : SDIi8<0xC2, MRMSrcReg, 
                     (outs FR64:$dst), (ins FR64:$src1, FR64:$src, SSECC:$cc),
                     "cmp${cc}sd\t{$src, $dst|$dst, $src}", []>;
-  def CMPSDrm : SDI<0xC2, MRMSrcMem, 
+  def CMPSDrm : SDIi8<0xC2, MRMSrcMem, 
                     (outs FR64:$dst), (ins FR64:$src1, f64mem:$src, SSECC:$cc),
                     "cmp${cc}sd\t{$src, $dst|$dst, $src}", []>;
 }
@@ -1105,12 +1105,12 @@ def UCOMISDrm: PDI<0x2E, MRMSrcMem, (outs), (ins FR64:$src1, f64mem:$src2),
 
 // Aliases to match intrinsics which expect XMM operand(s).
 let isTwoAddress = 1 in {
-  def Int_CMPSDrr : SDI<0xC2, MRMSrcReg, 
+  def Int_CMPSDrr : SDIi8<0xC2, MRMSrcReg, 
                         (outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc),
                         "cmp${cc}sd\t{$src, $dst|$dst, $src}",
                         [(set VR128:$dst, (int_x86_sse2_cmp_sd VR128:$src1,
                                            VR128:$src, imm:$cc))]>;
-  def Int_CMPSDrm : SDI<0xC2, MRMSrcMem, 
+  def Int_CMPSDrm : SDIi8<0xC2, MRMSrcMem, 
                         (outs VR128:$dst), (ins VR128:$src1, f64mem:$src, SSECC:$cc),
                         "cmp${cc}sd\t{$src, $dst|$dst, $src}",
                         [(set VR128:$dst, (int_x86_sse2_cmp_sd VR128:$src1,