rk30: clock: init spi clk rate same as parent
author黄涛 <huangtao@rock-chips.com>
Wed, 11 Apr 2012 12:59:58 +0000 (20:59 +0800)
committer黄涛 <huangtao@rock-chips.com>
Wed, 11 Apr 2012 12:59:58 +0000 (20:59 +0800)
arch/arm/mach-rk30/clock_data.c

index 59803290a6b129641b104f17663cd961b08362fc..f6332e8207ad29c22cf35a3a1722311056cc91cf 100755 (executable)
@@ -2972,7 +2972,11 @@ static void __init rk30_clock_common_init(unsigned long gpll_rate,unsigned long
        
        //i2s
        rk30_clock_common_i2s_init();
-       
+
+       // spi
+       clk_set_rate_nolock(&clk_spi0, clk_spi0.parent->rate);
+       clk_set_rate_nolock(&clk_spi1, clk_spi1.parent->rate);
+
        // uart
        #if 0 
        clk_set_parent_nolock(&clk_uart_pll, &codec_pll_clk);