x86, suspend: Handle CPUs which fail to #GP on RDMSR
authorH. Peter Anvin <hpa@linux.intel.com>
Fri, 12 Jul 2013 23:48:12 +0000 (16:48 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 4 Aug 2013 08:50:53 +0000 (16:50 +0800)
commit 5ff560fd48d5b3d82fa0c3aff625c9da1a301911 upstream.

There are CPUs which have errata causing RDMSR of a nonexistent MSR to
not fault.  We would then try to WRMSR to restore the value of that
MSR, causing a crash.  Specifically, some Pentium M variants would
have this problem trying to save and restore the non-existent EFER,
causing a crash on resume.

Work around this by making sure we can write back the result at
suspend time.

Huge thanks to Christian Sünkenberg for finding the offending erratum
that finally deciphered the mystery.

Reported-and-tested-by: Johan Heinrich <onny@project-insanity.org>
Debugged-by: Christian Sünkenberg <christian.suenkenberg@student.kit.edu>
Acked-by: Rafael J. Wysocki <rjw@sisk.pl>
Link: http://lkml.kernel.org/r/51DDC972.3010005@student.kit.edu
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/x86/kernel/acpi/sleep.c

index b44577bc97449c14af7988e18a14b4b9c31cc262..ec94e11807dc43bded4cead2c22350d907b6a68c 100644 (file)
@@ -48,9 +48,20 @@ int acpi_suspend_lowlevel(void)
 #ifndef CONFIG_64BIT
        native_store_gdt((struct desc_ptr *)&header->pmode_gdt);
 
+       /*
+        * We have to check that we can write back the value, and not
+        * just read it.  At least on 90 nm Pentium M (Family 6, Model
+        * 13), reading an invalid MSR is not guaranteed to trap, see
+        * Erratum X4 in "Intel Pentium M Processor on 90 nm Process
+        * with 2-MB L2 Cache and Intel® Processor A100 and A110 on 90
+        * nm process with 512-KB L2 Cache Specification Update".
+        */
        if (!rdmsr_safe(MSR_EFER,
                        &header->pmode_efer_low,
-                       &header->pmode_efer_high))
+                       &header->pmode_efer_high) &&
+           !wrmsr_safe(MSR_EFER,
+                       header->pmode_efer_low,
+                       header->pmode_efer_high))
                header->pmode_behavior |= (1 << WAKEUP_BEHAVIOR_RESTORE_EFER);
 #endif /* !CONFIG_64BIT */
 
@@ -61,7 +72,10 @@ int acpi_suspend_lowlevel(void)
        }
        if (!rdmsr_safe(MSR_IA32_MISC_ENABLE,
                        &header->pmode_misc_en_low,
-                       &header->pmode_misc_en_high))
+                       &header->pmode_misc_en_high) &&
+           !wrmsr_safe(MSR_IA32_MISC_ENABLE,
+                       header->pmode_misc_en_low,
+                       header->pmode_misc_en_high))
                header->pmode_behavior |=
                        (1 << WAKEUP_BEHAVIOR_RESTORE_MISC_ENABLE);
        header->realmode_flags = acpi_realmode_flags;