Merge branch 'next/soc' into HEAD
authorOlof Johansson <olof@lixom.net>
Mon, 1 Oct 2012 21:19:17 +0000 (14:19 -0700)
committerOlof Johansson <olof@lixom.net>
Mon, 1 Oct 2012 21:19:17 +0000 (14:19 -0700)
Conflicts:
arch/arm/mach-ux500/clock.c
arch/arm/mach-ux500/cpu.c
drivers/clocksource/Makefile

20 files changed:
1  2 
MAINTAINERS
arch/arm/Kconfig
arch/arm/Makefile
arch/arm/mach-exynos/clock-exynos5.c
arch/arm/mach-imx/clk-imx51-imx53.c
arch/arm/mach-omap2/Makefile
arch/arm/mach-omap2/clkt_dpll.c
arch/arm/mach-omap2/dpll3xxx.c
arch/arm/mach-omap2/omap_hwmod.c
arch/arm/mach-shmobile/board-kzm9g.c
arch/arm/mach-shmobile/setup-sh73a0.c
arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/board-dt-tegra20.c
arch/arm/mach-ux500/cpu-db8500.c
arch/arm/mach-ux500/cpu.c
arch/arm/plat-omap/omap_device.c
arch/arm/plat-samsung/clock.c
arch/arm/plat-samsung/devs.c
drivers/clk/Makefile
drivers/clocksource/Makefile

diff --cc MAINTAINERS
Simple merge
index 884768cb5332c661333c9b2797629df9d85ded4d,171f184b089df5e4df845fa7131d48432b26cf76..a97adeccf558af3e5c53bfc28790f55218989c64
@@@ -672,8 -700,10 +689,9 @@@ config ARCH_TEGR
        select HAVE_CLK
        select HAVE_SMP
        select MIGHT_HAVE_CACHE_L2X0
 -      select NEED_MACH_IO_H if PCI
        select ARCH_HAS_CPUFREQ
        select USE_OF
+       select COMMON_CLK
        help
          This enables support for NVIDIA Tegra based systems (Tegra APX,
          Tegra 6xx and Tegra 2 series).
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
index a13c97b4ba1df0c380b32d8193682f6782ccd599,38ed2ddd32655de26939cb4d6048079ba0ddb63e..db99a4ade80cd46650dfad30a7d068c7a291bb8c
@@@ -757,9 -777,10 +777,10 @@@ static struct platform_device *sh73a0_l
        &i2c4_device,
        &dma0_device,
        &mpdma0_device,
+       &pmu_device,
  };
  
 -#define SRCR2          0xe61580b0
 +#define SRCR2          IOMEM(0xe61580b0)
  
  void __init sh73a0_add_standard_devices(void)
  {
Simple merge
Simple merge
index 8e755638aa76184923ad644a6d5ba4e4aced2de1,4b0a9b3003123e51da736e6421aede1e29eaaf46..2236cbd03cd79c11d897353d33401ddc4a3c962e
@@@ -49,9 -51,7 +49,9 @@@ void __init ux500_init_irq(void
        void __iomem *dist_base;
        void __iomem *cpu_base;
  
-       if (cpu_is_u8500_family()) {
 +      gic_arch_extn.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
 +
+       if (cpu_is_u8500_family() || cpu_is_ux540_family()) {
                dist_base = __io_address(U8500_GIC_DIST_BASE);
                cpu_base = __io_address(U8500_GIC_CPU_BASE);
        } else
Simple merge
index d1116e2dfbeaf57ccd0c2a1aff9ce413d9b57f2a,7938fbce825e3052dc62f3a413e84b7aa0a887b5..012bbd0b8d81063fa7db1547f440b7ca97adca74
@@@ -144,10 -144,9 +144,10 @@@ long clk_round_rate(struct clk *clk, un
  
  int clk_set_rate(struct clk *clk, unsigned long rate)
  {
 +      unsigned long flags;
        int ret;
  
-       if (IS_ERR(clk))
+       if (IS_ERR_OR_NULL(clk))
                return -EINVAL;
  
        /* We do not default just do a clk->rate = rate as
@@@ -174,13 -173,12 +174,13 @@@ struct clk *clk_get_parent(struct clk *
  
  int clk_set_parent(struct clk *clk, struct clk *parent)
  {
 +      unsigned long flags;
        int ret = 0;
  
-       if (IS_ERR(clk))
+       if (IS_ERR_OR_NULL(clk) || IS_ERR_OR_NULL(parent))
                return -EINVAL;
  
 -      spin_lock(&clocks_lock);
 +      spin_lock_irqsave(&clocks_lock, flags);
  
        if (clk->ops && clk->ops->set_parent)
                ret = (clk->ops->set_parent)(clk, parent);
Simple merge
Simple merge
index 65919901a301174b42aa291f6070985906563e21,d496a55f6bb0c3061746559813e6d7dbc015aee7..cccde85e2d6c6f11b09647de1a07c63a702b4361
@@@ -13,4 -13,4 +13,5 @@@ obj-$(CONFIG_DW_APB_TIMER)    += dw_apb_ti
  obj-$(CONFIG_DW_APB_TIMER_OF) += dw_apb_timer_of.o
  obj-$(CONFIG_CLKSRC_DBX500_PRCMU)     += clksrc-dbx500-prcmu.o
  obj-$(CONFIG_ARMADA_370_XP_TIMER)     += time-armada-370-xp.o
 +obj-$(CONFIG_CLKSRC_ARM_GENERIC)      += arm_generic.o
+ obj-$(CONFIG_ARCH_BCM2835)    += bcm2835_timer.o