rk3188(t) : limit arm frequency below 1.4GHz and disable cpll and dpll, when -t flag...

diff --git a/arch/arm/mach-rk3188/cpufreq.c b/arch/arm/mach-rk3188/cpufreq.c
index 73f0f1a911d33a626a2c9e5149cf4a1b2290dc84..6fbb0f7844895fd396ca19f310d5dcd76b1fbf2f 100644 (file)
--- a/arch/arm/mach-rk3188/cpufreq.c
+++ b/arch/arm/mach-rk3188/cpufreq.c
@@ -37,6 +37,7 @@
 #include <mach/cpu.h>
 #include <mach/ddr.h>
 #include <mach/dvfs.h>
+#include <plat/efuse.h>
 
 #define VERSION "2.2"
 
@@ -494,7 +495,9 @@ static int rk3188_cpufreq_init_cpu0(struct cpufreq_policy *policy)
        }
        low_battery_freq = get_freq_from_table(low_battery_freq);
        clk_enable_dvfs(cpu_clk);
-
+       if(rk_tflag()){
+               dvfs_clk_enable_limit(cpu_clk, 0, 1416 * 1000 * 1000);
+       }
        freq_wq = alloc_workqueue("rk3188_cpufreqd", WQ_NON_REENTRANT | WQ_MEM_RECLAIM | WQ_HIGHPRI | WQ_FREEZABLE, 1);
        rk3188_cpufreq_temp_limit_init(policy);
 #ifdef CPU_FREQ_DVFS_TST

diff --git a/arch/arm/plat-rk/efuse.c b/arch/arm/plat-rk/efuse.c
index 3a5821c3bb2db6d55afbd5ef9ac45d4021816611..8584964f60d8a1b120881cf2ae623aaf8004ed1f 100644 (file)
--- a/arch/arm/plat-rk/efuse.c
+++ b/arch/arm/plat-rk/efuse.c
@@ -66,6 +66,10 @@ int rk_pll_flag(void)
 {
        return efuse_buf[22] & 0x3;
 }
+int rk_tflag(void)
+{
+       return efuse_buf[22] & (0x1 << 3);
+}
 
 int rk_leakage_val(void)
 {

diff --git a/arch/arm/plat-rk/include/plat/efuse.h b/arch/arm/plat-rk/include/plat/efuse.h
index 76c97cf6fa4c279bfc8ebe54c7abba2e7cc0f6eb..9583cc363c6a24674e2d0af54e6a611258465c50 100644 (file)
--- a/arch/arm/plat-rk/include/plat/efuse.h
+++ b/arch/arm/plat-rk/include/plat/efuse.h
@@ -19,6 +19,7 @@
 /* Interfaces to get efuse informations */
 void rk_efuse_init(void);
 int rk_pll_flag(void);
+int rk_tflag(void);
 int rk_leakage_val(void);
 int rk3028_version_val(void);