Reverts more unnecessary changes

diff --git a/include/llvm/CodeGen/MachineBasicBlock.h b/include/llvm/CodeGen/MachineBasicBlock.h
index fd786f68fb653b240015fd7cb58d351470dc50f6..3d58c499823e86725e9263a79d29830acd4eae26 100644 (file)
--- a/include/llvm/CodeGen/MachineBasicBlock.h
+++ b/include/llvm/CodeGen/MachineBasicBlock.h
@@ -124,10 +124,6 @@ private:
   /// is only computed once and is cached.
   mutable MCSymbol *CachedMCSymbol = nullptr;
 
-  // XXX-update: A flag that checks whether we can eliminate this machine basic
-  // block.
-  bool canEliminateMachineBB;
-
   // Intrusive list support
   MachineBasicBlock() {}
 
@@ -139,15 +135,6 @@ private:
   friend class MachineFunction;
 
 public:
-  // XXX-update:
-  void disableCanEliminateMachineBB() {
-    canEliminateMachineBB = false;
-  }
-
-  bool getCanEliminateMachineBB() {
-    return canEliminateMachineBB;
-  }
-
   /// Return the LLVM basic block that this instance corresponded to originally.
   /// Note that this may be NULL if this instance does not correspond directly
   /// to an LLVM basic block.

diff --git a/include/llvm/IR/BasicBlock.h b/include/llvm/IR/BasicBlock.h
index 94edb547f5322d954fb8c6121796686f9ff3f194..c6b54d308ce69f7d24c49491f4353cfd4b824011 100644 (file)
--- a/include/llvm/IR/BasicBlock.h
+++ b/include/llvm/IR/BasicBlock.h
@@ -59,9 +59,6 @@ private:
   InstListType InstList;
   Function *Parent;
 
-  // XXX-update: A flag that checks whether we can eliminate this block.
-  bool canEliminateBlock;
-
   void setParent(Function *parent);
   friend class SymbolTableListTraits<BasicBlock>;
 
@@ -77,16 +74,6 @@ private:
                       Function *Parent = nullptr,
                       BasicBlock *InsertBefore = nullptr);
 public:
-  // XXX-update:
-  void disableCanEliminateBlock() {
-    canEliminateBlock = false;
-  }
-
-  bool getCanEliminateBlock() {
-    return canEliminateBlock;
-  }
-
-
   /// \brief Get the context in which this basic block lives.
   LLVMContext &getContext() const;
 

diff --git a/include/llvm/IR/Instructions.h b/include/llvm/IR/Instructions.h
index cc6c25974cd5422ed48a6691a033783ea3fab7aa..28e1fd90fdf63cfde52c0cf5a02a0e2c120675da 100644 (file)
--- a/include/llvm/IR/Instructions.h
+++ b/include/llvm/IR/Instructions.h
@@ -228,14 +228,6 @@ public:
   LoadInst(Value *Ptr, const char *NameStr, bool isVolatile,
            BasicBlock *InsertAtEnd);
 
-  bool getHasSubsequentAcqlRMW() {
-    return hasSubsequentAcqlRMW_;
-  }
-
-  void setHasSubsequentAcqlRMW(bool val) {
-    hasSubsequentAcqlRMW_ = val;
-  }
-
   /// isVolatile - Return true if this is a load from a volatile memory
   /// location.
   ///
@@ -314,8 +306,6 @@ private:
   void setInstructionSubclassData(unsigned short D) {
     Instruction::setInstructionSubclassData(D);
   }
-
-  bool hasSubsequentAcqlRMW_;
 };
 
 //===----------------------------------------------------------------------===//

diff --git a/lib/CodeGen/AtomicExpandPass.cpp b/lib/CodeGen/AtomicExpandPass.cpp
index 180aba7870993bf26f5c1fadc2c8b595bd2ee9b9..c3c3f6ca29df377f2ab59a5c149d7f9580fc91d1 100644 (file)
--- a/lib/CodeGen/AtomicExpandPass.cpp
+++ b/lib/CodeGen/AtomicExpandPass.cpp
@@ -71,33 +71,6 @@ namespace {
     bool isIdempotentRMW(AtomicRMWInst *AI);
     bool simplifyIdempotentRMW(AtomicRMWInst *AI);
   };
-
-
-  // If 'LI' is a relaxed load, and it is immediately followed by a
-// atomic read-modify-write that has acq_rel parameter, we don't have to do
-// anything since the rmw serves as a natural barrier.
-void MarkRelaxedLoadBeforeAcqrelRMW(LoadInst* LI) {
-  auto* BB = LI->getParent();
-  auto BBI = LI->getIterator();
-  for (BBI++; BBI != BB->end(); BBI++) {
-    Instruction* CurInst = &*BBI;
-    if (!CurInst) {
-      return;
-    }
-    if (!CurInst->isAtomic()) {
-      continue;
-    }
-    auto* RMW = dyn_cast<AtomicRMWInst>(CurInst);
-    if (!RMW) {
-      return;
-    }
-    if (RMW->getOrdering() == AcquireRelease ||
-        RMW->getOrdering() == SequentiallyConsistent) {
-      LI->setHasSubsequentAcqlRMW(true);
-    }
-  }
-}
-
 }
 
 char AtomicExpand::ID = 0;
@@ -116,7 +89,6 @@ bool AtomicExpand::runOnFunction(Function &F) {
   TLI = TM->getSubtargetImpl(F)->getTargetLowering();
 
   SmallVector<Instruction *, 1> AtomicInsts;
-  SmallVector<LoadInst*, 1> MonotonicLoadInsts;
 
   bool MadeChange = false;
   // XXX-comment: Converts relaxed stores to release stores.
@@ -167,56 +139,8 @@ bool AtomicExpand::runOnFunction(Function &F) {
   // Changing control-flow while iterating through it is a bad idea, so gather a
   // list of all atomic instructions before we start.
   for (inst_iterator I = inst_begin(F), E = inst_end(F); I != E; ++I) {
-    // XXX-update: For relaxed loads, change them to acquire. This includes
-    // relaxed loads, relaxed atomic RMW & relaxed atomic compare exchange.
-    if (I->isAtomic()) {
-      switch (I->getOpcode()) {
-        case Instruction::AtomicCmpXchg: {
-          // XXX-comment: AtomicCmpXchg in AArch64 will be translated to a
-          // conditional branch that contains the value of the load anyway, so
-          // we don't need to do anything.
-          /*
-          auto* CmpXchg = dyn_cast<AtomicCmpXchgInst>(&*I);
-          auto SuccOrdering = CmpXchg->getSuccessOrdering();
-          if (SuccOrdering == Monotonic) {
-            CmpXchg->setSuccessOrdering(Acquire);
-          } else if (SuccOrdering == Release) {
-            CmpXchg->setSuccessOrdering(AcquireRelease);
-          }
-          */
-          break;
-        }
-        case Instruction::AtomicRMW: {
-          // XXX-comment: Similar to AtomicCmpXchg. These instructions in
-          // AArch64 will be translated to a loop whose condition depends on the
-          // store status, which further depends on the load value.
-          /*
-          auto* RMW = dyn_cast<AtomicRMWInst>(&*I);
-          if (RMW->getOrdering() == Monotonic) {
-            RMW->setOrdering(Acquire);
-          }
-          */
-          break;
-        }
-        case Instruction::Load: {
-          auto* LI = dyn_cast<LoadInst>(&*I);
-          if (LI->getOrdering() == Monotonic) {
-            /*
-            DEBUG(dbgs() << "Transforming relaxed loads to acquire loads: "
-                         << *LI << '\n');
-            LI->setOrdering(Acquire);
-            */
-//            MonotonicLoadInsts.push_back(LI);
-            MarkRelaxedLoadBeforeAcqrelRMW(LI);
-          }
-          break;
-        }
-        default: {
-          break;
-        }
-      }
+    if (I->isAtomic())
       AtomicInsts.push_back(&*I);
-    }
   }
 
   for (auto I : AtomicInsts) {
@@ -232,7 +156,7 @@ bool AtomicExpand::runOnFunction(Function &F) {
     if (TLI->getInsertFencesForAtomic()) {
       if (LI && isAtLeastAcquire(LI->getOrdering())) {
         FenceOrdering = LI->getOrdering();
-//        AddFakeConditionalBranch(
+        LI->setOrdering(Monotonic);
         IsStore = false;
         IsLoad = true;
       } else if (SI && isAtLeastRelease(SI->getOrdering())) {
@@ -300,7 +224,6 @@ bool AtomicExpand::runOnFunction(Function &F) {
       MadeChange |= expandAtomicCmpXchg(CASI);
     }
   }
-
   return MadeChange;
 }
 

diff --git a/lib/CodeGen/MachineBasicBlock.cpp b/lib/CodeGen/MachineBasicBlock.cpp
index 4219016874296873120e8e8e67d08e602bf0d7fd..85d544d94984cdf3bcfb21a7e087c6fa87ee621f 100644 (file)
--- a/lib/CodeGen/MachineBasicBlock.cpp
+++ b/lib/CodeGen/MachineBasicBlock.cpp
@@ -40,7 +40,7 @@ using namespace llvm;
 #define DEBUG_TYPE "codegen"
 
 MachineBasicBlock::MachineBasicBlock(MachineFunction &MF, const BasicBlock *B)
-    : BB(B), Number(-1), xParent(&MF), canEliminateMachineBB(true) {
+    : BB(B), Number(-1), xParent(&MF) {
   Insts.Parent = this;
 }
 

diff --git a/lib/IR/BasicBlock.cpp b/lib/IR/BasicBlock.cpp
index 8e3cac27f4860c7e71dca4f8333be4f4cf8cccbd..f61276fd436b49bb739e3489ea3686022f87ab5a 100644 (file)
--- a/lib/IR/BasicBlock.cpp
+++ b/lib/IR/BasicBlock.cpp
@@ -40,8 +40,7 @@ template class llvm::SymbolTableListTraits<Instruction>;
 
 BasicBlock::BasicBlock(LLVMContext &C, const Twine &Name, Function *NewParent,
                        BasicBlock *InsertBefore)
-  : Value(Type::getLabelTy(C), Value::BasicBlockVal), Parent(nullptr),
-    canEliminateBlock(true) {
+  : Value(Type::getLabelTy(C), Value::BasicBlockVal), Parent(nullptr) {
 
   if (NewParent)
     insertInto(NewParent, InsertBefore);