Keep track of *which* input constraint matches an output

constraint.  Reject asms where an output has multiple
input constraints tied to it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57687 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/InlineAsm.h b/include/llvm/InlineAsm.h
index 325b777dd49f8644de44f2e87c196c7fa479fd5a..879b2e847f9a4845147c59814f6ee98a5bcb19fb 100644 (file)
--- a/include/llvm/InlineAsm.h
+++ b/include/llvm/InlineAsm.h
@@ -79,9 +79,15 @@ public:
     /// read.  This is only ever set for an output operand.
     bool isEarlyClobber; 
     
-    /// hasMatchingInput - This is set to true for an output constraint iff
-    /// there is an input constraint that is required to match it (e.g. "0").
-    bool hasMatchingInput;
+    /// MatchingInput - If this is not -1, this is an output constraint where an
+    /// input constraint is required to match it (e.g. "0").  The value is the
+    /// constraint number that matches this one (for example, if this is
+    /// constraint #0 and constraint #4 has the value "0", this will be 4).
+    signed char MatchingInput;
+    
+    /// hasMatchingInput - Return true if this is an output constraint that has
+    /// a matching input constraint.
+    bool hasMatchingInput() const { return MatchingInput != -1; }
     
     /// isCommutative - This is set to true for a constraint that is commutative
     /// with the next operand.

diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
index da4703c60d756517bd7e4039a21349d67d9a571f..5e5bdbe5116af04777dea209a192239421568782 100644 (file)
--- a/include/llvm/Target/TargetLowering.h
+++ b/include/llvm/Target/TargetLowering.h
@@ -1197,9 +1197,9 @@ public:
     /// ConstraintVT - The ValueType for the operand value.
     MVT ConstraintVT;
     
-    /// isMatchingConstraint - Return true of this is an input operand that is a
-    /// matching constraint like "4".
-    bool isMatchingConstraint() const;
+    /// isMatchingInputConstraint - Return true of this is an input operand that
+    /// is a matching constraint like "4".
+    bool isMatchingInputConstraint() const;
     
     /// getMatchedOperand - If this is an input matching constraint, this method
     /// returns the output operand it matches.

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index 64192dc41ae127062066b06dbac8230fa7c2802c..103b5c0e7e7353cb9eef96eaebf27437288459d3 100644 (file)
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
@@ -4491,7 +4491,7 @@ GetRegistersForValue(SDISelAsmOperandInfo &OpInfo,
     
     // If there is an input constraint that matches this, we need to reserve 
     // the input register so no other inputs allocate to it.
-    isInReg = OpInfo.hasMatchingInput;
+    isInReg = OpInfo.hasMatchingInput();
     break;
   case InlineAsm::isInput:
     isInReg = true;
@@ -4562,7 +4562,7 @@ GetRegistersForValue(SDISelAsmOperandInfo &OpInfo,
     // the constraint, so we have to pick a register to pin the input/output to.
     // If it isn't a matched constraint, go ahead and create vreg and let the
     // regalloc do its thing.
-    if (!OpInfo.hasMatchingInput) {
+    if (!OpInfo.hasMatchingInput()) {
       RegVT = *PhysReg.second->vt_begin();
       if (OpInfo.ConstraintVT == MVT::Other)
         ValueVT = RegVT;
@@ -4863,7 +4863,7 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) {
     case InlineAsm::isInput: {
       SDValue InOperandVal = OpInfo.CallOperand;
       
-      if (OpInfo.isMatchingConstraint()) {   // Matching constraint?
+      if (OpInfo.isMatchingInputConstraint()) {   // Matching constraint?
         // If this is required to match an output register we have already set,
         // just use its register.
         unsigned OperandNo = OpInfo.getMatchedOperand();

diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 664e06d2d27753f744a79c0eed31da3d69fe256b..479e1380c5b21e38c031379f560dfaf300110c52 100644 (file)
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1962,9 +1962,9 @@ getRegForInlineAsmConstraint(const std::string &Constraint,
 //===----------------------------------------------------------------------===//
 // Constraint Selection.
 
-/// isMatchingConstraint - Return true of this is an input operand that is a
-/// matching constraint like "4".
-bool TargetLowering::AsmOperandInfo::isMatchingConstraint() const {
+/// isMatchingInputConstraint - Return true of this is an input operand that is
+/// a matching constraint like "4".
+bool TargetLowering::AsmOperandInfo::isMatchingInputConstraint() const {
   assert(!ConstraintCode.empty() && "No known constraint!");
   return isdigit(ConstraintCode[0]);
 }

diff --git a/lib/VMCore/InlineAsm.cpp b/lib/VMCore/InlineAsm.cpp
index 5eefc8842bafb15daf15838d9dd5b944d280b091..524e294ab75f5b5a7efe3b1663413f0b4426246e 100644 (file)
--- a/lib/VMCore/InlineAsm.cpp
+++ b/lib/VMCore/InlineAsm.cpp
@@ -57,7 +57,7 @@ bool InlineAsm::ConstraintInfo::Parse(const std::string &Str,
   // Initialize
   Type = isInput;
   isEarlyClobber = false;
-  hasMatchingInput = false;
+  MatchingInput = -1;
   isCommutative = false;
   isIndirect = false;
   
@@ -127,8 +127,13 @@ bool InlineAsm::ConstraintInfo::Parse(const std::string &Str,
           Type != isInput)
         return true;  // Invalid constraint number.
       
+      // If Operand N already has a matching input, reject this.  An output
+      // can't be constrained to the same value as multiple inputs.
+      if (ConstraintsSoFar[N].hasMatchingInput())
+        return true;
+      
       // Note that operand #n has a matching input.
-      ConstraintsSoFar[N].hasMatchingInput = true;
+      ConstraintsSoFar[N].MatchingInput = ConstraintsSoFar.size();
     } else {
       // Single letter constraint.
       Codes.push_back(std::string(I, I+1));