dform 8/9 are identical to dform 1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31637 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td
index f297f10c185da1c6cf08ea5e9b395a3fe95994a3..2237beb9d24161279285f5f49cdf4d416a254604 100644 (file)
--- a/lib/Target/PowerPC/PPCInstrFormats.td
+++ b/lib/Target/PowerPC/PPCInstrFormats.td
@@ -174,15 +174,6 @@ class DForm_6_ext<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin>
   let L = PPC64;
 }
 
-class DForm_8<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin,
-              list<dag> pattern>
-  : DForm_1<opcode, OL, asmstr, itin, pattern> {
-}
-
-class DForm_9<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin,
-              list<dag> pattern>
-  : DForm_1<opcode, OL, asmstr, itin, pattern> {
-}
 
 // 1.7.5 DS-Form
 class DSForm_1<bits<6> opcode, bits<2> xo, dag OL, string asmstr,

diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index 21035bedc26c38f1b9451bcea9b8474db6ee76cf..559d4bceca4d5e755a9f4d6dddca79dfef8b0c42 100644 (file)
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -422,10 +422,10 @@ def LWZ : DForm_1<32, (ops GPRC:$rD, memri:$src),
                   "lwz $rD, $src", LdStGeneral,
                   [(set GPRC:$rD, (load iaddr:$src))]>;
 
-def LFS : DForm_8<48, (ops F4RC:$rD, memri:$src),
+def LFS : DForm_1<48, (ops F4RC:$rD, memri:$src),
                   "lfs $rD, $src", LdStLFDU,
                   [(set F4RC:$rD, (load iaddr:$src))]>;
-def LFD : DForm_8<50, (ops F8RC:$rD, memri:$src),
+def LFD : DForm_1<50, (ops F8RC:$rD, memri:$src),
                   "lfd $rD, $src", LdStLFD,
                   [(set F8RC:$rD, (load iaddr:$src))]>;
 
@@ -452,11 +452,11 @@ def LWZU : DForm_1<33, (ops GPRC:$rD, ptr_rc:$rA_result, i32imm:$disp,
                    "lwzu $rD, $disp($rA)", LdStGeneral,
                    []>, RegConstraint<"$rA = $rA_result">;
 
-def LFSU : DForm_8<49, (ops F4RC:$rD, ptr_rc:$rA_result, i32imm:$disp,
+def LFSU : DForm_1<49, (ops F4RC:$rD, ptr_rc:$rA_result, i32imm:$disp,
                             ptr_rc:$rA),
                   "lfs $rD, $disp($rA)", LdStLFDU,
                   []>, RegConstraint<"$rA = $rA_result">;
-def LFDU : DForm_8<51, (ops F8RC:$rD, ptr_rc:$rA_result, i32imm:$disp,
+def LFDU : DForm_1<51, (ops F8RC:$rD, ptr_rc:$rA_result, i32imm:$disp,
                             ptr_rc:$rA),
                   "lfd $rD, $disp($rA)", LdStLFD,
                   []>, RegConstraint<"$rA = $rA_result">;
@@ -537,10 +537,10 @@ def CMPLWI : DForm_6_ext<10, (ops CRRC:$dst, GPRC:$src1, u16imm:$src2),
                          "cmplwi $dst, $src1, $src2", IntCompare>;
 }
 let isStore = 1, noResults = 1, PPC970_Unit = 2 in {
-def STFS : DForm_9<52, (ops F4RC:$rS, memri:$dst),
+def STFS : DForm_1<52, (ops F4RC:$rS, memri:$dst),
                    "stfs $rS, $dst", LdStUX,
                    [(store F4RC:$rS, iaddr:$dst)]>;
-def STFD : DForm_9<54, (ops F8RC:$rS, memri:$dst),
+def STFD : DForm_1<54, (ops F8RC:$rS, memri:$dst),
                    "stfd $rS, $dst", LdStUX,
                    [(store F8RC:$rS, iaddr:$dst)]>;
 }