git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165326
91177308-0d34-0410-b5e6-
96231b3b80d8
virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
SMLoc &EndLoc) = 0;
+ /// MapAndConstraints - Map inline assembly operands to MCInst operands
+ /// and an associated constraint.
typedef std::pair< unsigned, std::string > MapAndConstraint;
typedef SmallVector<MapAndConstraint, 4> MatchInstMapAndConstraints;
typedef SmallVectorImpl<MapAndConstraint> MatchInstMapAndConstraintsImpl;