[ARMv8] Add some missing tests for DSB/DMB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190060 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/MC/ARM/basic-thumb2-instructions-v8.s b/test/MC/ARM/basic-thumb2-instructions-v8.s
index 09edaf752e65c69e5e158ac7f2130cc02303d6ff..69a7cff6abd007a435948ba760e0f982fd0814d8 100644 (file)
--- a/test/MC/ARM/basic-thumb2-instructions-v8.s
+++ b/test/MC/ARM/basic-thumb2-instructions-v8.s
@@ -1,6 +1,6 @@
 @ New ARMv8 T32 encodings
 
-@ RUN: llvm-mc -triple thumbv8 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-V8
+@ RUN: not llvm-mc -triple thumbv8 -show-encoding -mattr=+db < %s | FileCheck %s --check-prefix=CHECK-V8
 @ RUN: not llvm-mc -triple thumbv7 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V7
 
 @ HLT
@@ -34,3 +34,38 @@
 @ CHECK-V7: error: instruction requires: armv8
 @ CHECK-V7: error: instruction requires: armv8
 @ CHECK-V7: error: instruction requires: armv8
+
+@------------------------------------------------------------------------------
+@ DMB (v8 barriers)
+@------------------------------------------------------------------------------
+        dmb ishld
+        dmb oshld
+        dmb nshld
+        dmb ld
+        dmb #20
+
+@ CHECK-V8: dmb ishld @ encoding: [0xbf,0xf3,0x59,0x8f]
+@ CHECK-V8: dmb oshld @ encoding: [0xbf,0xf3,0x51,0x8f]
+@ CHECK-V8: dmb nshld @ encoding: [0xbf,0xf3,0x55,0x8f]
+@ CHECK-V8: dmb ld @ encoding: [0xbf,0xf3,0x5d,0x8f]
+@ CHECK-V7: error: invalid operand for instruction
+@ CHECK-V7: error: invalid operand for instruction
+@ CHECK-V7: error: invalid operand for instruction
+@ CHECK-V7: error: invalid operand for instruction
+@ CHECK-V7: error: immediate value out of range
+
+@------------------------------------------------------------------------------
+@ DSB (v8 barriers)
+@------------------------------------------------------------------------------
+        dsb ishld
+        dsb oshld
+        dsb nshld
+        dsb ld
+
+@ CHECK-V8: dsb ishld @ encoding: [0xbf,0xf3,0x49,0x8f]
+@ CHECK-V8: dsb oshld @ encoding: [0xbf,0xf3,0x41,0x8f]
+@ CHECK-V8: dsb nshld @ encoding: [0xbf,0xf3,0x45,0x8f]
+@ CHECK-V8: dsb ld @ encoding: [0xbf,0xf3,0x4d,0x8f]
+@ CHECK-V7: error: invalid operand for instruction
+@ CHECK-V7: error: invalid operand for instruction
+@ CHECK-V7: error: invalid operand for instruction

diff --git a/test/MC/Disassembler/ARM/basic-arm-instructions-v8.txt b/test/MC/Disassembler/ARM/basic-arm-instructions-v8.txt
index 8d4debf93a341dfe846c8919a735340739bd4178..c14748a6102816817743b0589b9abc1205fbaa18 100644 (file)
--- a/test/MC/Disassembler/ARM/basic-arm-instructions-v8.txt
+++ b/test/MC/Disassembler/ARM/basic-arm-instructions-v8.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -disassemble -triple armv8 -show-encoding < %s | FileCheck %s
+# RUN: llvm-mc -disassemble -triple armv8 -mattr=+db -show-encoding < %s | FileCheck %s
 
 # New v8 ARM instructions
 
@@ -9,3 +9,12 @@
 
 0x7f 0xff 0x0f 0xe1
 # CHECK: hlt #65535
+
+0x59 0xf0 0x7f 0xf5
+0x51 0xf0 0x7f 0xf5
+0x55 0xf0 0x7f 0xf5
+0x5d 0xf0 0x7f 0xf5
+# CHECK: dmb ishld
+# CHECK: dmb oshld
+# CHECK: dmb nshld
+# CHECK: dmb ld

diff --git a/test/MC/Disassembler/ARM/thumb-v8.txt b/test/MC/Disassembler/ARM/thumb-v8.txt
index 075b17c9a2aa6d7e066b7250fa067f509e1cef4b..eb5ffea7d66768323146f02bdf201eb970f989d3 100644 (file)
--- a/test/MC/Disassembler/ARM/thumb-v8.txt
+++ b/test/MC/Disassembler/ARM/thumb-v8.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -disassemble -triple thumbv8 -show-encoding < %s | FileCheck %s
+# RUN: llvm-mc -disassemble -triple thumbv8 -mattr=+db -show-encoding < %s | FileCheck %s
 
 0x80 0xba
 # CHECK: hlt #0
@@ -16,3 +16,13 @@
 
 0x8f 0xf7 0x03 0x80 
 # CHECK: dcps3
+
+0xbf 0xf3 0x59 0x8f
+0xbf 0xf3 0x51 0x8f
+0xbf 0xf3 0x55 0x8f
+0xbf 0xf3 0x5d 0x8f
+
+# CHECK: dmb ishld
+# CHECK: dmb oshld
+# CHECK: dmb nshld
+# CHECK: dmb ld