namespace llvm {
class MRegisterInfo;
+class BitVector;
class LiveVariables : public MachineFunctionPass {
public:
///
std::vector<VarInfo> VirtRegInfo;
- /// AllocatablePhysicalRegisters - This vector keeps track of which registers
- /// are actually register allocatable by the target machine. We can not track
- /// liveness for values that are not in this set.
+ /// ReservedRegisters - This vector keeps track of which registers
+ /// are reserved register which are not allocatable by the target machine.
+ /// We can not track liveness for values that are in this set.
///
- BitVector AllocatablePhysicalRegisters;
+ BitVector ReservedRegisters;
private: // Intermediate data structures
const MRegisterInfo *RegInfo;