video: rockchip: hdmi: 3368 work okay
authorZheng Yang <zhengyang@rock-chips.com>
Mon, 15 Feb 2016 08:46:37 +0000 (16:46 +0800)
committerGerrit Code Review <gerrit@rock-chips.com>
Tue, 16 Feb 2016 05:59:03 +0000 (13:59 +0800)
Change-Id: I40f6b87f1f77fb410d4adb9c2b352624b6b19d34
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
drivers/video/rockchip/hdmi/rockchip-hdmi-cec.c
drivers/video/rockchip/hdmi/rockchip-hdmi-core.c
drivers/video/rockchip/hdmi/rockchip-hdmi-edid.c
drivers/video/rockchip/hdmi/rockchip-hdmiv1/rockchip_hdmiv1.c
drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2.c
drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c
drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.h

index f8f3d3d096d33fe51e1fe1ec7f4223b41dca3d0c..59965cdaed9a5acf1b3babfef57ee75d3a2e3d2b 100644 (file)
@@ -172,9 +172,9 @@ static ssize_t  cec_state_show(struct device *dev,
 }
 
 static struct device_attribute cec_attrs[] = {
-       __ATTR(logic, 0666, cec_logic_show, cec_logic_store),
-       __ATTR(phy, 0666, cec_phy_show, cec_phy_store),
-       __ATTR(enable, 0666, cec_enable_show, cec_enable_store),
+       __ATTR(logic, S_IRUGO | S_IWUSR, cec_logic_show, cec_logic_store),
+       __ATTR(phy, S_IRUGO | S_IWUSR, cec_phy_show, cec_phy_store),
+       __ATTR(enable, S_IRUGO | S_IWUSR, cec_enable_show, cec_enable_store),
        __ATTR(stat, S_IRUGO, cec_state_show, NULL),
 };
 
index 1696c04059654ed28a4ae03428fa7e2328717a60..344f23691e3723fc4aa6fa4c2cf0d9a46e4629da 100644 (file)
@@ -645,10 +645,12 @@ int snd_config_hdmi_audio(struct snd_pcm_hw_params *params)
 
        audio_cfg.rate = rate;
 
-       if (params->flags == HW_PARAMS_FLAG_NLPCM)
-               audio_cfg.type = HDMI_AUDIO_NLPCM;
-       else
-               audio_cfg.type = HDMI_AUDIO_LPCM;
+       /*
+        *if (params->flags == HW_PARAMS_FLAG_NLPCM)
+        *      audio_cfg.type = HDMI_AUDIO_NLPCM;
+        *else
+        */
+       audio_cfg.type = HDMI_AUDIO_LPCM;
 
        audio_cfg.channel = params_channels(params);
        audio_cfg.word_length = HDMI_AUDIO_WORD_LENGTH_16bit;
index 1025433ebcd82958682d1cefdbb74d4ba8e3ce0e..6ce7171bf45a700d7d2a873693768b568d50400f 100644 (file)
@@ -1,5 +1,5 @@
 #include "rockchip-hdmi.h"
-#include "../../edid.h"
+#include "../../fbdev/edid.h"
 
 #ifdef EDIDDEBUG
 #define EDBG   DBG
@@ -368,6 +368,7 @@ static int hdmi_edid_parse_extensions_cea(unsigned char *buf,
 {
        unsigned int ddc_offset, native_dtd_num, cur_offset = 4;
        unsigned int tag, IEEEOUI = 0, count, i;
+       struct fb_videomode *vmode;
 
        if (!buf)
                return E_HDMI_EDID_PARAM;
@@ -457,8 +458,7 @@ static int hdmi_edid_parse_extensions_cea(unsigned char *buf,
        }
 
        /* Parse DTD */
-       struct fb_videomode *vmode =
-               kmalloc(sizeof(struct fb_videomode), GFP_KERNEL);
+       vmode = kmalloc(sizeof(*vmode), GFP_KERNEL);
 
        if (!vmode)
                return E_HDMI_EDID_SUCCESS;
@@ -472,7 +472,6 @@ static int hdmi_edid_parse_extensions_cea(unsigned char *buf,
        }
        kfree(vmode);
 
-#endif
        return E_HDMI_EDID_SUCCESS;
 }
 
index c2b80280a0bf2b1780dda833e59072278b9a11e2..bcc01b5f3070891ea10b087c5cade7346b7c2f1b 100644 (file)
@@ -357,7 +357,7 @@ static int rockchip_hdmiv1_probe(struct platform_device *pdev)
                ret = devm_request_irq(hdmi_dev->hdmi->dev,
                                       hdmi_dev->irq,
                                       rockchip_hdmiv1_irq_func,
-                                      IRQF_TRIGGER_HIGH | IRQF_DISABLED,
+                                      IRQF_TRIGGER_HIGH,
                                       dev_name(hdmi_dev->hdmi->dev),
                                       hdmi_dev->hdmi);
                if (ret) {
index f82100c83406ffce8b866748e01b1f920ec951a5..6850b8ed18c9009db7b9e881608d225af42e811a 100644 (file)
@@ -2,6 +2,7 @@
 #include <linux/delay.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
 #include <linux/interrupt.h>
 #include <linux/clk.h>
 #include <linux/of_gpio.h>
@@ -224,15 +225,7 @@ static int rockchip_hdmiv2_clk_enable(struct hdmi_dev *hdmi_dev)
                        hdmi_dev->clk_on |= HDMI_EXT_PHY_CLK_ON;
                }
        } else if ((hdmi_dev->clk_on & HDMI_PD_ON) == 0) {
-               if (!hdmi_dev->pd) {
-                       hdmi_dev->pd = devm_clk_get(hdmi_dev->dev, "pd_hdmi");
-                       if (IS_ERR(hdmi_dev->pd)) {
-                               dev_err(hdmi_dev->dev,
-                                       "Unable to get hdmi pd\n");
-                               return -1;
-                       }
-               }
-               clk_prepare_enable(hdmi_dev->pd);
+               pm_runtime_get_sync(hdmi_dev->dev);
                hdmi_dev->clk_on |= HDMI_PD_ON;
        }
 
@@ -286,8 +279,8 @@ static int rockchip_hdmiv2_clk_disable(struct hdmi_dev *hdmi_dev)
        if (hdmi_dev->clk_on == 0)
                return 0;
 
-       if ((hdmi_dev->clk_on & HDMI_PD_ON) && (hdmi_dev->pd)) {
-               clk_disable_unprepare(hdmi_dev->pd);
+       if ((hdmi_dev->clk_on & HDMI_PD_ON)) {
+               pm_runtime_put(hdmi_dev->dev);
                hdmi_dev->clk_on &= ~HDMI_PD_ON;
        }
 
@@ -548,7 +541,7 @@ static int rockchip_hdmiv2_probe(struct platform_device *pdev)
                dev_err(&pdev->dev, "failed to get hdmi reset: %d\n", ret);
                goto failed;
        }
-
+       pm_runtime_enable(hdmi_dev->dev);
        /*enable pd and pclk and hdcp_clk*/
        if (rockchip_hdmiv2_clk_enable(hdmi_dev) < 0) {
                ret = -ENXIO;
@@ -585,10 +578,12 @@ static int rockchip_hdmiv2_probe(struct platform_device *pdev)
                                SUPPORT_YCBCR_INPUT |
                                SUPPORT_1080I |
                                SUPPORT_480I_576I;
-               if (rockchip_get_cpu_version())
-                       rk_hdmi_property.feature |=
-                               SUPPORT_YUV420 |
-                               SUPPORT_DEEP_10BIT;
+               /*
+                *if (rockchip_get_cpu_version())
+                *      rk_hdmi_property.feature |=
+                *              SUPPORT_YUV420 |
+                *              SUPPORT_DEEP_10BIT;
+                */
        } else {
                ret = -ENXIO;
                goto failed1;
index b22eaa3f27963e99cd26bd96fe6600baa247eb2c..ec80cdbdde9f23169a79a2b47c2d73cbd64b70a9 100755 (executable)
@@ -673,7 +673,7 @@ static int ext_phy_config(struct hdmi_dev *hdmi_dev)
        if ((stat & EXT_PHY_PPLL_LOCK_STATUS_MASK) == 0) {
                stat = hdmi_readl(hdmi_dev, MC_LOCKONCLOCK);
                dev_err(hdmi_dev->hdmi->dev,
-                       "PHY PLL not locked: PCLK_ON=%d,TMDSCLK_ON=%d\n",
+                       "PHY PLL not locked: PCLK_ON=%ld,TMDSCLK_ON=%ld\n",
                        (stat & m_PCLK_ON) >> 6, (stat & m_TMDSCLK_ON) >> 5);
                return -1;
        }
@@ -803,7 +803,7 @@ static int rockchip_hdmiv2_config_phy(struct hdmi_dev *hdmi_dev)
        if ((stat & m_PHY_LOCK) == 0) {
                stat = hdmi_readl(hdmi_dev, MC_LOCKONCLOCK);
                dev_err(hdmi_dev->hdmi->dev,
-                       "PHY PLL not locked: PCLK_ON=%d,TMDSCLK_ON=%d\n",
+                       "PHY PLL not locked: PCLK_ON=%ld,TMDSCLK_ON=%ld\n",
                        (stat & m_PCLK_ON) >> 6, (stat & m_TMDSCLK_ON) >> 5);
                return -1;
        }
index ad85e6a6c1b6fe4ef41cdffcf8de646ddf16e459..af3b834215f1e15660641ea028f7e0c277edadc1 100644 (file)
@@ -1662,6 +1662,13 @@ struct phy_mpll_config_tab {
 #define RK322X_PLL_PDATA_DEN   BIT(11 + 16)
 #define RK322X_PLL_PDATA_EN    (BIT(11) | BIT(11 + 16))
 
+#ifndef RK322X_GRF_SOC_CON2
+#define RK322X_GRF_SOC_CON2    RK3228_GRF_SOC_CON2
+#endif
+#ifndef RK322X_GRF_SOC_CON6
+#define RK322X_GRF_SOC_CON6    RK3228_GRF_SOC_CON6
+#endif
+
 struct ext_pll_config_tab {
        u32     pix_clock;
        u32     tmdsclock;