i zi:; $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@
PHONY += kernel.img zkernel.img
+
+ifdef CONFIG_MACH_RK29_2906
+kernel.img: Image FORCE
+ $(Q)$(srctree)/mkkrnlimg $(obj)/arch/arm/boot/Image $(obj)/kernel.img RK2906
+ @echo ' RK2906 Image: $@ is ready'
+else
kernel.img: Image FORCE
$(Q)$(srctree)/mkkrnlimg $(obj)/arch/arm/boot/Image $(obj)/kernel.img
@echo ' Image: $@ is ready'
+endif
zkernel.img: zImage FORCE
$(Q)$(srctree)/mkkrnlimg $(obj)/arch/arm/boot/zImage $(obj)/kernel.img
# CONFIG_RK29_WORKING_POWER_MANAGEMENT is not set
CONFIG_RK29_CLK_SWITCH_TO_32K=y
CONFIG_RK29_GPIO_SUSPEND=y
-# CONFIG_RK29_NEON_POWERDOMAIN_SET is not set
+CONFIG_RK29_NEON_POWERDOMAIN_SET=y
# CONFIG_RK29_SPI_INSRAM is not set
+CONFIG_RK29_I2C_INSRAM=y
+# CONFIG_RK29_CHARGE_EARLYSUSPEND is not set
#
# System MMU
# CONFIG_SENSORS_AK8975 is not set
# CONFIG_DS1682 is not set
# CONFIG_TI_DAC7512 is not set
-# CONFIG_UID_STAT is not set
+CONFIG_UID_STAT=y
# CONFIG_BMP085 is not set
# CONFIG_WL127X_RFKILL is not set
CONFIG_APANIC=y
CONFIG_PPP_SYNC_TTY=y
CONFIG_PPP_DEFLATE=y
CONFIG_PPP_BSDCOMP=y
-# CONFIG_PPP_MPPE is not set
-# CONFIG_PPPOE is not set
-# CONFIG_PPPOLAC is not set
-# CONFIG_PPPOPNS is not set
+CONFIG_PPP_MPPE=y
+#CONFIG_PPPOE is not set
+CONFIG_PPPOLAC=y
+CONFIG_PPPOPNS=y
# CONFIG_SLIP is not set
CONFIG_SLHC=y
# CONFIG_NETCONSOLE is not set
CONFIG_INPUT_MISC=y
# CONFIG_INPUT_LPSENSOR_ISL29028 is not set
# CONFIG_INPUT_LPSENSOR_CM3602 is not set
-CONFIG_INPUT_LPSENSOR_AL3006=y
+# CONFIG_INPUT_LPSENSOR_AL3006 is not set
# CONFIG_INPUT_AD714X is not set
# CONFIG_INPUT_ATI_REMOTE is not set
# CONFIG_INPUT_ATI_REMOTE2 is not set
# CONFIG_PDA_POWER is not set
CONFIG_WM831X_BACKUP=y
CONFIG_WM831X_POWER=y
-CONFIG_WM831X_CHARGER_DISPLAY=y
+# CONFIG_WM831X_CHARGER_DISPLAY is not set
# CONFIG_WM831X_WITH_BATTERY is not set
# CONFIG_TEST_POWER is not set
# CONFIG_BATTERY_DS2780 is not set
# CONFIG_CHARGER_MAX8903 is not set
# CONFIG_CHARGER_GPIO is not set
# CONFIG_BATTERY_RK29_ADC is not set
-# CONFIG_POWER_ON_CHARGER_DISPLAY is not set
+CONFIG_POWER_ON_CHARGER_DISPLAY=y
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
# CONFIG_WATCHDOG is not set
# CONFIG_SOC_CAMERA_OV2659 is not set
# CONFIG_SOC_CAMERA_OV7690 is not set
# CONFIG_SOC_CAMERA_OV9650 is not set
+# CONFIG_SOC_CAMERA_OV2640_RK is not set
# CONFIG_SOC_CAMERA_OV3640 is not set
# CONFIG_SOC_CAMERA_OV5642 is not set
# CONFIG_SOC_CAMERA_OV5640 is not set
# CONFIG_SND_RK29_CODEC_SOC_MASTER is not set
CONFIG_SND_RK29_CODEC_SOC_SLAVE=y
# CONFIG_ADJUST_VOL_BY_CODEC is not set
+CONFIG_PHONE_INCALL_IS_SUSPEND=y
CONFIG_SND_SOC_I2C_AND_SPI=y
# CONFIG_SND_SOC_ALL_CODECS is not set
CONFIG_SND_SOC_WM_HUBS=y
if ARCH_RK29
+config MACH_RK29_2906
+ bool "ROCKCHIP RK2906 Feature"
+
choice
prompt "Select Board Type"
depends on ARCH_RK29
config RK29_SPI_INSRAM
tristate "Support spi control interface"
depends on REGULATOR_WM831X
- default ns
+ default n
config RK29_I2C_INSRAM
tristate "Support i2c control interface"
- depends on REGULATOR_ACT8891
- default ns
+ depends on REGULATOR_WM831X
+ default n
+config RK29_CHARGE_EARLYSUSPEND
+ bool "Support charge in low power"
+ default n
config RK29_PWM_INSRAM
tristate "Support pwm control interface"
depends on RK29_PWM_REGULATOR
-obj-y += timer.o io.o devices.o iomux.o clock.o rk29-pl330.o dma.o ddr.o memcpy_dma.o reset.o
+obj-y += timer.o io.o devices.o verifyID.o iomux.o clock.o rk29-pl330.o dma.o ddr.o memcpy_dma.o reset.o
obj-y += tests.o memtester.o
obj-$(CONFIG_PM) += pm.o
obj-$(CONFIG_CPU_FREQ) += cpufreq.o
obj-$(CONFIG_MACH_RK29_TD8801_V2) += board-rk29-td8801_v2.o board-rk29-td8801_v2-key.o board-rk29-td8801_v2-rfkill.o
obj-$(CONFIG_MACH_RK29_PHONEPADSDK) += board-rk29phonepadsdk.o board-rk29phonepadsdk-key.o board-rk29phonepadsdk-rfkill.o board-rk29phonepadsdk-power.o
obj-$(CONFIG_MACH_RK29_newton) += board-rk29-newton.o board-rk29-newton-key.o board-newton-rfkill.o board-rk29sdk-power.o
+obj-$(CONFIG_RK29_CHARGE_EARLYSUSPEND) += rk29_charge_lowpower.o
obj-$(CONFIG_MACH_RK29_K97) += board-rk29-k97.o board-rk29k97-key.o board-rk29sdk-rfkill.o board-rk29sdk-power.o
obj-$(CONFIG_MACH_RK29_PHONE_Z5) += board-rk29-z5.o board-rk29-z5-key.o board-rk29-z5-rfkill.o
#ifdef CONFIG_VIDEO_RK29
/*---------------- Camera Sensor Macro Define Begin ------------------------*/
/*---------------- Camera Sensor Configuration Macro Begin ------------------------*/
-#define CONFIG_SENSOR_0 RK29_CAM_SENSOR_OV5642 /* back camera sensor */
+#define CONFIG_SENSOR_0 RK29_CAM_SENSOR_OV5642 /* back camera sensor 0 */
#define CONFIG_SENSOR_IIC_ADDR_0 0x78
#define CONFIG_SENSOR_IIC_ADAPTER_ID_0 1
#define CONFIG_SENSOR_ORIENTATION_0 90
#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_0 RK29_CAM_FLASHACTIVE_L
#define CONFIG_SENSOR_QCIF_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_240X160_FPS_FIXED_0 15000
#define CONFIG_SENSOR_QVGA_FPS_FIXED_0 15000
#define CONFIG_SENSOR_CIF_FPS_FIXED_0 15000
#define CONFIG_SENSOR_VGA_FPS_FIXED_0 15000
#define CONFIG_SENSOR_SVGA_FPS_FIXED_0 15000
#define CONFIG_SENSOR_720P_FPS_FIXED_0 30000
-#define CONFIG_SENSOR_1 RK29_CAM_SENSOR_OV2659 /* front camera sensor */
+#define CONFIG_SENSOR_01 RK29_CAM_SENSOR_OV5642 /* back camera sensor 1 */
+#define CONFIG_SENSOR_IIC_ADDR_01 0x00
+#define CONFIG_SENSOR_IIC_ADAPTER_ID_01 1
+#define CONFIG_SENSOR_ORIENTATION_01 90
+#define CONFIG_SENSOR_POWER_PIN_01 INVALID_GPIO
+#define CONFIG_SENSOR_RESET_PIN_01 INVALID_GPIO
+#define CONFIG_SENSOR_POWERDN_PIN_01 RK29_PIN6_PB7
+#define CONFIG_SENSOR_FALSH_PIN_01 INVALID_GPIO
+#define CONFIG_SENSOR_POWERACTIVE_LEVEL_01 RK29_CAM_POWERACTIVE_L
+#define CONFIG_SENSOR_RESETACTIVE_LEVEL_01 RK29_CAM_RESETACTIVE_L
+#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_01 RK29_CAM_POWERDNACTIVE_H
+#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_01 RK29_CAM_FLASHACTIVE_L
+
+#define CONFIG_SENSOR_QCIF_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_240X160_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_QVGA_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_CIF_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_VGA_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_480P_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_SVGA_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_720P_FPS_FIXED_01 30000
+
+#define CONFIG_SENSOR_02 RK29_CAM_SENSOR_OV5640 /* back camera sensor 2 */
+#define CONFIG_SENSOR_IIC_ADDR_02 0x00
+#define CONFIG_SENSOR_IIC_ADAPTER_ID_02 1
+#define CONFIG_SENSOR_ORIENTATION_02 90
+#define CONFIG_SENSOR_POWER_PIN_02 INVALID_GPIO
+#define CONFIG_SENSOR_RESET_PIN_02 INVALID_GPIO
+#define CONFIG_SENSOR_POWERDN_PIN_02 RK29_PIN6_PB7
+#define CONFIG_SENSOR_FALSH_PIN_02 INVALID_GPIO
+#define CONFIG_SENSOR_POWERACTIVE_LEVEL_02 RK29_CAM_POWERACTIVE_L
+#define CONFIG_SENSOR_RESETACTIVE_LEVEL_02 RK29_CAM_RESETACTIVE_L
+#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_02 RK29_CAM_POWERDNACTIVE_H
+#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_02 RK29_CAM_FLASHACTIVE_L
+
+#define CONFIG_SENSOR_QCIF_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_240X160_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_QVGA_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_CIF_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_VGA_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_480P_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_SVGA_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_720P_FPS_FIXED_02 30000
+
+#define CONFIG_SENSOR_1 RK29_CAM_SENSOR_OV2659 /* front camera sensor 0 */
#define CONFIG_SENSOR_IIC_ADDR_1 0x60
#define CONFIG_SENSOR_IIC_ADAPTER_ID_1 1
#define CONFIG_SENSOR_ORIENTATION_1 270
#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_1 RK29_CAM_FLASHACTIVE_L
#define CONFIG_SENSOR_QCIF_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_240X160_FPS_FIXED_1 15000
#define CONFIG_SENSOR_QVGA_FPS_FIXED_1 15000
#define CONFIG_SENSOR_CIF_FPS_FIXED_1 15000
#define CONFIG_SENSOR_VGA_FPS_FIXED_1 15000
#define CONFIG_SENSOR_SVGA_FPS_FIXED_1 15000
#define CONFIG_SENSOR_720P_FPS_FIXED_1 30000
+#define CONFIG_SENSOR_11 RK29_CAM_SENSOR_OV2659 /* front camera sensor 1 */
+#define CONFIG_SENSOR_IIC_ADDR_11 0x00
+#define CONFIG_SENSOR_IIC_ADAPTER_ID_11 1
+#define CONFIG_SENSOR_ORIENTATION_11 270
+#define CONFIG_SENSOR_POWER_PIN_11 INVALID_GPIO
+#define CONFIG_SENSOR_RESET_PIN_11 INVALID_GPIO
+#define CONFIG_SENSOR_POWERDN_PIN_11 RK29_PIN5_PD7
+#define CONFIG_SENSOR_FALSH_PIN_11 INVALID_GPIO
+#define CONFIG_SENSOR_POWERACTIVE_LEVEL_11 RK29_CAM_POWERACTIVE_L
+#define CONFIG_SENSOR_RESETACTIVE_LEVEL_11 RK29_CAM_RESETACTIVE_L
+#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_11 RK29_CAM_POWERDNACTIVE_H
+#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_11 RK29_CAM_FLASHACTIVE_L
+
+#define CONFIG_SENSOR_QCIF_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_240X160_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_QVGA_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_CIF_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_VGA_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_480P_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_SVGA_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_720P_FPS_FIXED_11 30000
+
+#define CONFIG_SENSOR_12 RK29_CAM_SENSOR_OV2655 /* front camera sensor 2 */
+#define CONFIG_SENSOR_IIC_ADDR_12 0x00
+#define CONFIG_SENSOR_IIC_ADAPTER_ID_12 1
+#define CONFIG_SENSOR_ORIENTATION_12 270
+#define CONFIG_SENSOR_POWER_PIN_12 INVALID_GPIO
+#define CONFIG_SENSOR_RESET_PIN_12 INVALID_GPIO
+#define CONFIG_SENSOR_POWERDN_PIN_12 RK29_PIN5_PD7
+#define CONFIG_SENSOR_FALSH_PIN_12 INVALID_GPIO
+#define CONFIG_SENSOR_POWERACTIVE_LEVEL_12 RK29_CAM_POWERACTIVE_L
+#define CONFIG_SENSOR_RESETACTIVE_LEVEL_12 RK29_CAM_RESETACTIVE_L
+#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_12 RK29_CAM_POWERDNACTIVE_H
+#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_12 RK29_CAM_FLASHACTIVE_L
+
+#define CONFIG_SENSOR_QCIF_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_240X160_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_QVGA_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_CIF_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_VGA_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_480P_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_SVGA_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_720P_FPS_FIXED_12 30000
+
+
#endif //#ifdef CONFIG_VIDEO_RK29
/*---------------- Camera Sensor Configuration Macro End------------------------*/
#include "../../../drivers/media/video/rk29_camera.c"
#if (CONFIG_SENSOR_IIC_ADDR_0 != 0x00)
&rk29_soc_camera_pdrv_0,
#endif
+ #if (CONFIG_SENSOR_IIC_ADDR_1 != 0x00)
&rk29_soc_camera_pdrv_1,
+ #endif
+ #if (PMEM_CAM_SIZE > 0)
&android_pmem_cam_device,
+ #endif
#endif
#if PMEM_SKYPE_SIZE > 0
&android_pmem_skype_device,
#endif
#define CONFIG_SENSOR_QCIF_FPS_FIXED_0 12504
+#define CONFIG_SENSOR_240X160_FPS_FIXED_0 12504
#define CONFIG_SENSOR_QVGA_FPS_FIXED_0 12504
#define CONFIG_SENSOR_CIF_FPS_FIXED_0 12504
#define CONFIG_SENSOR_VGA_FPS_FIXED_0 12504
#define CONFIG_SENSOR_480P_FPS_FIXED_0 12504
#define CONFIG_SENSOR_SVGA_FPS_FIXED_0 12504
-#define CONFIG_SENSOR_720P_FPS_FIXED_0 6256
+#define CONFIG_SENSOR_720P_FPS_FIXED_0 12504
#ifdef CONFIG_SOC_CAMERA_OV9665
#define CONFIG_SENSOR_1 RK29_CAM_SENSOR_OV9665 /* front camera sensor */
#define CONFIG_SENSOR_IIC_ADDR_1 0x60
#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_1 RK29_CAM_FLASHACTIVE_L
#define CONFIG_SENSOR_QCIF_FPS_FIXED_1 12504
+#define CONFIG_SENSOR_240X160_FPS_FIXED_1 12504
#define CONFIG_SENSOR_QVGA_FPS_FIXED_1 12504
#define CONFIG_SENSOR_CIF_FPS_FIXED_1 12504
#define CONFIG_SENSOR_VGA_FPS_FIXED_1 12504
#define CONFIG_SENSOR_480P_FPS_FIXED_1 12504
#define CONFIG_SENSOR_SVGA_FPS_FIXED_1 12504
-#define CONFIG_SENSOR_720P_FPS_FIXED_1 6256
+#define CONFIG_SENSOR_720P_FPS_FIXED_1 12504
#endif //#ifdef CONFIG_VIDEO_RK29
/*---------------- Camera Sensor Configuration Macro End------------------------*/
#include "../../../drivers/media/video/rk29_camera.c"
#define SDRAM_SIZE SZ_512M
#endif
#define PMEM_GPU_SIZE SZ_128M
-#define PMEM_UI_SIZE (48 * SZ_1M) /* 1280x800: 64M 1024x768: 48M ... */
+#define PMEM_UI_SIZE (68 * SZ_1M) /* 1280x800: 64M 1024x768: 48M ... */
#define PMEM_VPU_SIZE SZ_64M
#define PMEM_SKYPE_SIZE 0
#define PMEM_CAM_SIZE PMEM_CAM_NECESSARY
.model= 8452,
.swap_xyz= 1,
.swap_xy=0,
- .orientation ={1,0,0,0,0,1,0,-1,0},
+ .orientation ={1,0,0,0,0,-1,0,-1,0},
.init_platform_hw= mma8452_init_platform_hw,
};
#if (CONFIG_SENSOR_IIC_ADDR_0 != 0x00)
&rk29_soc_camera_pdrv_0,
#endif
+ #if (CONFIG_SENSOR_IIC_ADDR_1 != 0x00)
&rk29_soc_camera_pdrv_1,
+ #endif
+
+ #if (PMEM_CAM_SIZE > 0)
&android_pmem_cam_device,
+ #endif
#endif
#if PMEM_SKYPE_SIZE > 0
&android_pmem_skype_device,
#define IOMUX_BT_GPIO_POWER rk29_mux_api_set(GPIO5D6_SDMMC1PWREN_NAME, GPIO5H_GPIO5D6);
#define BT_GPIO_RESET RK29_PIN6_PC7
#define BT_GPIO_WAKE_UP RK29_PIN6_PD0
-#define BT_GPIO_WAKE_UP_HOST RK29_PIN4_PD4
-#define IOMUX_BT_GPIO_WAKE_UP_HOST() rk29_mux_api_set(GPIO4D4_CPUTRACECLK_NAME,GPIO4H_GPIO4D4);
+#define BT_GPIO_WAKE_UP_HOST RK29_PIN4_PA2
+//#define IOMUX_BT_GPIO_WAKE_UP_HOST() rk29_mux_api_set(GPIO4D4_CPUTRACECLK_NAME,GPIO4H_GPIO4D4);
//bt cts paired to uart rts
#define UART_RTS RK29_PIN2_PA7
printk("%s:failed to request RAHO_BT_WAKE_UP_HOST\n",__FUNCTION__);
}
- IOMUX_BT_GPIO_WAKE_UP_HOST();
+ //IOMUX_BT_GPIO_WAKE_UP_HOST();
gpio_pull_updown(BT_GPIO_WAKE_UP_HOST,GPIOPullUp);
rc = request_irq(gpio_to_irq(BT_GPIO_WAKE_UP_HOST),bcm4329_wake_host_irq,IRQF_TRIGGER_FALLING,NULL,NULL);
if(rc)
-/* arch/arm/mach-rk29/board-rk29-phonesdk.c
+/* arch/arm/mach-rk29/board-rk29-td8801.c
*
* Copyright (C) 2010 ROCKCHIP, Inc.
*
.m_layout =
{
{
- {-1, 0, 0 },
- {0, -1, 0 },
+ {1, 0, 0 },
+ {0, 1, 0 },
{0, 0, 1 },
},
};
#endif
+#if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT)
+#define SDMMC0_WRITE_PROTECT_PIN RK29_PIN2_PA3 //According to your own project to set the value of write-protect-pin.
+#endif
+
+#if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT)
+#define SDMMC1_WRITE_PROTECT_PIN RK29_PIN1_PC1 //According to your own project to set the value of write-protect-pin.
+#endif
+
/*****************************************************************************************
* SDMMC devices
#ifdef CONFIG_SDMMC0_RK29
static int rk29_sdmmc0_cfg_gpio(void)
{
+#ifdef CONFIG_SDMMC_RK29_OLD
rk29_mux_api_set(GPIO1D1_SDMMC0CMD_NAME, GPIO1H_SDMMC0_CMD);
rk29_mux_api_set(GPIO1D0_SDMMC0CLKOUT_NAME, GPIO1H_SDMMC0_CLKOUT);
rk29_mux_api_set(GPIO1D2_SDMMC0DATA0_NAME, GPIO1H_SDMMC0_DATA0);
rk29_mux_api_set(GPIO1D3_SDMMC0DATA1_NAME, GPIO1H_SDMMC0_DATA1);
rk29_mux_api_set(GPIO1D4_SDMMC0DATA2_NAME, GPIO1H_SDMMC0_DATA2);
rk29_mux_api_set(GPIO1D5_SDMMC0DATA3_NAME, GPIO1H_SDMMC0_DATA3);
-#ifdef CONFIG_SDMMC_RK29_OLD
+
rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_GPIO2A2);
-#else
- rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_SDMMC0_DETECT_N);//Modifyed by xbw.
-#endif
+
rk29_mux_api_set(GPIO5D5_SDMMC0PWREN_NAME, GPIO5H_GPIO5D5); ///GPIO5H_SDMMC0_PWR_EN); ///GPIO5H_GPIO5D5);
gpio_request(RK29_PIN5_PD5,"sdmmc");
+#if 0
gpio_set_value(RK29_PIN5_PD5,GPIO_HIGH);
mdelay(100);
gpio_set_value(RK29_PIN5_PD5,GPIO_LOW);
+#else
+ gpio_direction_output(RK29_PIN5_PD5,GPIO_LOW);
+#endif
+
+#else
+ rk29_sdmmc_set_iomux(0, 0xFFFF);
+
+ rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_SDMMC0_DETECT_N);//Modifyed by xbw.
+
+ #if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT)
+ gpio_request(SDMMC0_WRITE_PROTECT_PIN,"sdmmc-wp");
+ gpio_direction_input(SDMMC0_WRITE_PROTECT_PIN);
+ #endif
+
+#endif
+
return 0;
}
MMC_VDD_33_34|MMC_VDD_34_35| MMC_VDD_35_36),
.host_caps = (MMC_CAP_4_BIT_DATA|MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),
.io_init = rk29_sdmmc0_cfg_gpio,
+
+#if !defined(CONFIG_SDMMC_RK29_OLD)
+ .set_iomux = rk29_sdmmc_set_iomux,
+#endif
+
.dma_name = "sd_mmc",
#ifdef CONFIG_SDMMC0_USE_DMA
.use_dma = 1,
#else
.use_dma = 0,
#endif
-#if !defined(CONFIG_SDMMC_RK29_OLD)
- .set_iomux = rk29_sdmmc_set_iomux,
-#endif
-
-// .detect_irq = RK29_PIN2_PA2, // INVALID_GPIO
.detect_irq = INVALID_GPIO,
.enable_sd_wakeup = 0,
+
+#if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT)
+ .write_prt = SDMMC0_WRITE_PROTECT_PIN,
+#else
+ .write_prt = INVALID_GPIO,
+#endif
};
#endif
#ifdef CONFIG_SDMMC1_RK29
#define CONFIG_SDMMC1_USE_DMA
static int rk29_sdmmc1_cfg_gpio(void)
{
+#if defined(CONFIG_SDMMC_RK29_OLD)
rk29_mux_api_set(GPIO1C2_SDMMC1CMD_NAME, GPIO1H_SDMMC1_CMD);
rk29_mux_api_set(GPIO1C7_SDMMC1CLKOUT_NAME, GPIO1H_SDMMC1_CLKOUT);
rk29_mux_api_set(GPIO1C3_SDMMC1DATA0_NAME, GPIO1H_SDMMC1_DATA0);
rk29_mux_api_set(GPIO1C5_SDMMC1DATA2_NAME, GPIO1H_SDMMC1_DATA2);
rk29_mux_api_set(GPIO1C6_SDMMC1DATA3_NAME, GPIO1H_SDMMC1_DATA3);
//rk29_mux_api_set(GPIO1C0_UART0CTSN_SDMMC1DETECTN_NAME, GPIO1H_SDMMC1_DETECT_N);
+
+#else
+
+#if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT)
+ gpio_request(SDMMC1_WRITE_PROTECT_PIN,"sdio-wp");
+ gpio_direction_input(SDMMC1_WRITE_PROTECT_PIN);
+#endif
+
+#endif
+
return 0;
}
.host_ocr_avail = (MMC_VDD_25_26|MMC_VDD_26_27|MMC_VDD_27_28|MMC_VDD_28_29|
MMC_VDD_29_30|MMC_VDD_30_31|MMC_VDD_31_32|
MMC_VDD_32_33|MMC_VDD_33_34),
+
+#if !defined(CONFIG_USE_SDMMC1_FOR_WIFI_DEVELOP_BOARD)
.host_caps = (MMC_CAP_4_BIT_DATA|MMC_CAP_SDIO_IRQ|
MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),
+#else
+ .host_caps = (MMC_CAP_4_BIT_DATA|MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),
+#endif
+
.io_init = rk29_sdmmc1_cfg_gpio,
+
+#if !defined(CONFIG_SDMMC_RK29_OLD)
+ .set_iomux = rk29_sdmmc_set_iomux,
+#endif
.dma_name = "sdio",
#ifdef CONFIG_SDMMC1_USE_DMA
.use_dma = 1,
#else
.use_dma = 0,
#endif
+
+#if !defined(CONFIG_USE_SDMMC1_FOR_WIFI_DEVELOP_BOARD)
#ifdef CONFIG_WIFI_CONTROL_FUNC
.status = rk29sdk_wifi_status,
.register_status_notify = rk29sdk_wifi_status_register,
#if 0
.detect_irq = RK29SDK_WIFI_SDIO_CARD_DETECT_N,
#endif
-#if !defined(CONFIG_SDMMC_RK29_OLD)
- .set_iomux = rk29_sdmmc_set_iomux,
+
+#if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT)
+ .write_prt = SDMMC1_WRITE_PROTECT_PIN,
+#else
+ .write_prt = INVALID_GPIO,
+#endif
+
+#else
+//for wifi develop board
+ .detect_irq = INVALID_GPIO,
+ .enable_sd_wakeup = 0,
#endif
+
};
-#endif
+#endif ////endif--#ifdef CONFIG_SDMMC1_RK29
+
+
#ifdef CONFIG_WIFI_CONTROL_FUNC
#define RK29SDK_WIFI_BT_GPIO_POWER_N RK29_PIN5_PD6
gpio_direction_output(RK29SDK_WIFI_GPIO_RESET_N, GPIO_LOW);
gpio_direction_output(RK29SDK_BT_GPIO_RESET_N, GPIO_LOW);
+ #if defined(CONFIG_SDMMC1_RK29) && !defined(CONFIG_SDMMC_RK29_OLD)
+
+ rk29_mux_api_set(GPIO1C4_SDMMC1DATA1_NAME, GPIO1H_GPIO1C4);
+ gpio_request(RK29_PIN1_PC4, "mmc1-data1");
+ gpio_direction_output(RK29_PIN1_PC4,GPIO_LOW);//set mmc1-data1 to low.
+
+ rk29_mux_api_set(GPIO1C5_SDMMC1DATA2_NAME, GPIO1H_GPIO1C5);
+ gpio_request(RK29_PIN1_PC5, "mmc1-data2");
+ gpio_direction_output(RK29_PIN1_PC5,GPIO_LOW);//set mmc1-data2 to low.
+
+ rk29_mux_api_set(GPIO1C6_SDMMC1DATA3_NAME, GPIO1H_GPIO1C6);
+ gpio_request(RK29_PIN1_PC6, "mmc1-data3");
+ gpio_direction_output(RK29_PIN1_PC6,GPIO_LOW);//set mmc1-data3 to low.
+
+ rk29_sdmmc_gpio_open(1, 0); //added by xbw at 2011-10-13
+ #endif
pr_info("%s: init finished\n",__func__);
return 0;
pr_info("%s: %d\n", __func__, on);
if (on){
gpio_set_value(RK29SDK_WIFI_BT_GPIO_POWER_N, GPIO_HIGH);
+
+ #if defined(CONFIG_SDMMC1_RK29) && !defined(CONFIG_SDMMC_RK29_OLD)
+ rk29_sdmmc_gpio_open(1, 1); //added by xbw at 2011-10-13
+ #endif
+
gpio_set_value(RK29SDK_WIFI_GPIO_RESET_N, GPIO_HIGH);
mdelay(100);
pr_info("wifi turn on power\n");
}else{
if (!rk29sdk_bt_power_state){
gpio_set_value(RK29SDK_WIFI_BT_GPIO_POWER_N, GPIO_LOW);
+
+ #if defined(CONFIG_SDMMC1_RK29) && !defined(CONFIG_SDMMC_RK29_OLD)
+ rk29_sdmmc_gpio_open(1, 0); //added by xbw at 2011-10-13
+ #endif
+
mdelay(100);
pr_info("wifi shut off power\n");
}else
#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_0 RK29_CAM_POWERDNACTIVE_H
#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_0 RK29_CAM_FLASHACTIVE_L
-#define CONFIG_SENSOR_QCIF_FPS_FIXED_0 15
-#define CONFIG_SENSOR_QVGA_FPS_FIXED_0 15
-#define CONFIG_SENSOR_CIF_FPS_FIXED_0 15
-#define CONFIG_SENSOR_VGA_FPS_FIXED_0 15
-#define CONFIG_SENSOR_480P_FPS_FIXED_0 15
-#define CONFIG_SENSOR_SVGA_FPS_FIXED_0 15
-#define CONFIG_SENSOR_720P_FPS_FIXED_0 30
+#define CONFIG_SENSOR_QCIF_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_QVGA_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_CIF_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_VGA_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_480P_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_SVGA_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_720P_FPS_FIXED_0 30000
#define CONFIG_SENSOR_1 RK29_CAM_SENSOR_OV2659 /* front camera sensor */
#define CONFIG_SENSOR_IIC_ADDR_1 0x60
#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_1 RK29_CAM_POWERDNACTIVE_H
#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_1 RK29_CAM_FLASHACTIVE_L
-#define CONFIG_SENSOR_QCIF_FPS_FIXED_1 15
-#define CONFIG_SENSOR_QVGA_FPS_FIXED_1 15
-#define CONFIG_SENSOR_CIF_FPS_FIXED_1 15
-#define CONFIG_SENSOR_VGA_FPS_FIXED_1 15
-#define CONFIG_SENSOR_480P_FPS_FIXED_1 15
-#define CONFIG_SENSOR_SVGA_FPS_FIXED_1 15
-#define CONFIG_SENSOR_720P_FPS_FIXED_1 30
+#define CONFIG_SENSOR_QCIF_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_QVGA_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_CIF_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_VGA_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_480P_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_SVGA_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_720P_FPS_FIXED_1 30000
#endif //#ifdef CONFIG_VIDEO_RK29
/*---------------- Camera Sensor Configuration Macro End------------------------*/
#else
#define SDRAM_SIZE SZ_512M
#endif
+
#define PMEM_GPU_SIZE SZ_64M
-#define PMEM_UI_SIZE SZ_32M
+/*1280*800 : (32+64)M ,1024*768 : (26+48)M, 800*600 : (16+32)M, 800*480 : (12+32)M,*/
+#define PMEM_UI_SIZE (48 * SZ_1M)
#define PMEM_VPU_SIZE SZ_64M
#define PMEM_SKYPE_SIZE 0
#define PMEM_CAM_SIZE PMEM_CAM_NECESSARY
.micdet_irq = 0,
.irq_base = 0,
+ .lineout1_diff = 1,
.PA_control_pin=RK29_PIN6_PB6,
};
#endif
+#if defined (CONFIG_SND_SOC_RT5625_SPK_FORM_SPKOUT) || defined (CONFIG_SND_SOC_RT5625_SPK_FORM_HPOUT)
+
+//please define level value of power amp control
+#define POWER_AMP_ON 0
+#define POWER_AMP_OFF 1
+#define RT5625_POWER_AMP_PIN INVALID_GPIO //RK29_PIN6_PB6
+
+struct rt5625_platform_data rt5625_platform_data = {
+ .spk_ctr_pin = RT5625_POWER_AMP_PIN,
+ .spk_ctr_on = POWER_AMP_ON,
+ .spk_ctr_off = POWER_AMP_OFF,
+};
+#endif
+
#ifdef CONFIG_RK_HEADSET_DET
struct rk_headset_pdata rk_headset_info = {
},
#endif
-#if defined (CONFIG_SND_SOC_RT5625)
+//note: rt5625 support two hardware connect, select the right config
+
+#if defined (CONFIG_SND_SOC_RT5625_SPK_FORM_SPKOUT) || defined (CONFIG_SND_SOC_RT5625_SPK_FORM_HPOUT)
{
.type = "rt5625",
.addr = 0x1e, //need check A1 pin,A1 pin is low,addr=0x1e,A1 pin is high,addr=0x1f.
.flags = 0,
+ .platform_data = &rt5625_platform_data,
},
#endif
struct rk29_mu509_data rk29_mu509_info = {
.io_init = mu509_io_init,
.io_deinit = mu509_io_deinit,
+ .modem_power_en = RK29_PIN6_PC2,
.bp_power = RK29_PIN6_PB1,//RK29_PIN0_PB4,
.bp_power_active_low = 1,
.bp_reset = RK29_PIN6_PC7,//RK29_PIN0_PB3,
--- /dev/null
+#include <mach/rk29_iomap.h>
+#include <mach/board.h>
+#include <mach/sram.h>
+#include <mach/iomux.h>
+#include <mach/cru.h>
+#include <asm/io.h>
+#include <mach/gpio.h>
+
+#if defined(CONFIG_RK29_I2C_INSRAM)
+
+#define I2C_SPEED 200
+
+#if defined(CONFIG_MACH_RK29_TD8801_V2)
+/******************need set when you use i2c*************************/
+#define I2C_SADDR (0x34) /* slave address ,wm8310 addr is 0x34*/
+#define SRAM_I2C_CH 1 //CH==0, i2c0,CH==1, i2c1,CH==2, i2c2,CH==3, i2c3
+#define SRAM_I2C_ADDRBASE RK29_I2C1_BASE //RK29_I2C0_BASE\RK29_I2C2_BASE\RK29_I2C3_BASE
+#define I2C_SLAVE_ADDR_LEN 1 // 2:slav addr is 10bit ,1:slav addr is 7bit
+#define I2C_SLAVE_REG_LEN 2 // 2:slav reg addr is 16 bit ,1:is 8 bit
+#define SRAM_I2C_DATA_BYTE 2 //i2c transmission data is 1bit(8wei) or 2bit(16wei)
+#define GRF_GPIO_IOMUX GRF_GPIO1L_IOMUX
+/*ch=0:GRF_GPIO2L_IOMUX,ch=1:GRF_GPIO1L_IOMUX,ch=2:GRF_GPIO5H_IOMUX,ch=3:GRF_GPIO2L_IOMUX*/
+#define I2C_GRF_GPIO_IOMUX (~(0x03<<14))&(~(0x03<<12))|(0x01<<14)|(0x01<<12)
+/*CH=0:(~(0x03<<30))&(~(0x03<<28))|(0x01<<30)|(0x01<<28),CH=1:(~(0x03<<14))&(~(0x03<<12))|(0x01<<14)|(0x01<<12),
+CH=2:(~(0x03<<24))&(~(0x03<<22))|(0x01<<24)|(0x01<<22),CH=3:(~(0x03<<26))&(~(0x03<<24))|(0x02<<26)|(0x02<<24)*/
+/***************************************/
+#if defined(SRAM_I2C_CH)
+#define CRU_CLKGATE_ADDR CRU_CLKGATE2_CON
+#define CRU_CLKGATE_BIT SRAM_I2C_CH+11
+#else
+#define CRU_CLKGATE_ADDR CRU_CLKGATE0_CON
+#define CRU_CLKGATE_BIT 26
+#endif
+//#define SRAM_I2C_ADDRBASE (RK29_I2C##SRAM_I2C_CH##_BASE )
+
+#define I2C_SLAVE_TYPE (((I2C_SLAVE_ADDR_LEN-1)<<4)|((I2C_SLAVE_REG_LEN-1)))
+
+#define uint8 unsigned char
+#define uint16 unsigned short
+#define uint32 unsigned int
+uint32 __sramdata data[5];
+
+#define CRU_CLKGATE0_CON 0x54
+#define CRU_CLKGATE2_CON 0x64
+#define CRU_CLKGATE1_CON 0x60
+
+#define CRU_CLKSEL0_CON 0x14
+#define GRF_GPIO5H_IOMUX 0x74
+#define GRF_GPIO2L_IOMUX 0x58
+#define GRF_GPIO1L_IOMUX 0x50
+
+#define I2C_ARBITR_LOSE_STATUS (1<<7) // Arbitration lose STATUS
+#define I2C_RECE_INT_MACKP (1<<1) // Master ACK period interrupt status bit
+#define I2C_RECE_INT_MACK (1) // Master receives ACK interrupt status bit
+
+#define I2C_MTXR (0x0000) /* master transmit */
+#define I2C_MRXR (0x0004) /* master receive */
+
+#define I2C_IER (0x0014) /* interrupt enable control */
+#define I2C_ISR (0x0018) /* interrupt status, write 0 to clear */
+#define I2C_LCMR (0x001c) /* stop/start/resume command, write 1 to set */
+#define I2C_LSR (0x0020) /* i2c core status */
+#define I2C_CONR (0x0024) /* i2c config */
+#define I2C_OPR (0x0028) /* i2c core config */
+#define I2C_MASTER_TRAN_MODE (1<<3)
+#define I2C_MASTER_PORT_ENABLE (1<<2)
+#define I2C_CON_NACK (1 << 4)
+#define I2C_CON_ACK (0)
+#define I2C_LCMR_RESUME (1<<2)
+#define I2C_LCMR_STOP (1<<1)
+#define I2C_LCMR_START (1<<0)
+#define SRAM_I2C_WRITE (0x0ul)
+#define SRAM_I2C_READ (0x1ul)
+#define I2C_MASTER_RECE_MODE (0)
+#define I2C_CORE_ENABLE (1<<6)
+#define I2C_CORE_DISABLE (0)
+
+#define SRAM_I2C_CLK_ENABLE() writel((~0x000000085), RK29_CRU_BASE + CRU_CLKGATE1_CON);
+#define SRAM_I2C_CLK_DISABLE() writel(~0, RK29_CRU_BASE + CRU_CLKGATE1_CON);
+#define sram_i2c_set_mode() do{ writel(0x0,SRAM_I2C_ADDRBASE + I2C_ISR);writel(0x0, SRAM_I2C_ADDRBASE + I2C_IER);writel((readl(SRAM_I2C_ADDRBASE + I2C_CONR)&(~(0x1ul<<4)))|I2C_MASTER_TRAN_MODE|I2C_MASTER_PORT_ENABLE, SRAM_I2C_ADDRBASE + I2C_CONR);}while(0)
+#define sram_udelay(usecs,a) LOOP((usecs)*LOOPS_PER_USEC)
+
+void __sramfunc sram_i2c_start(void);
+void __sramfunc sram_i2c_stop(void);
+uint8 __sramfunc sram_i2c_wait_event(void);
+uint8 __sramfunc sram_i2c_send_data(uint8 buf, uint8 startbit);
+uint8 __sramfunc sram_i2c_read_data(uint8 *buf);
+uint8 __sramfunc sram_i2c_slaveAdr(uint16 I2CSlaveAddr, uint8 addressBit, uint8 read_or_write);
+
+void __sramfunc sram_printch(char byte);
+void __sramfunc print_Hex(unsigned int hex);
+
+
+void i2c_interface_ctr_reg_pread()
+{
+ readl(SRAM_I2C_ADDRBASE);
+ readl(RK29_CRU_BASE);
+ readl(RK29_GRF_BASE);
+ readl(RK29_GPIO0_BASE);
+ readl(RK29_GPIO1_BASE);
+ readl(RK29_GPIO2_BASE);
+ readl(RK29_GPIO3_BASE);
+ readl(RK29_GPIO4_BASE);
+ readl(RK29_GPIO5_BASE);
+ readl(RK29_GPIO6_BASE);
+}
+
+void __sramfunc sram_i2c_delay(int delay_time)
+{
+ int n = 100 * delay_time;
+ while(n--)
+ {
+ __asm__ __volatile__("");
+ }
+}
+
+
+/*-------------------------------------------------------------------------------------------------------
+Name : sram_i2c_init
+Desc : initialize the necessary registers
+Params : channel-determine which I2C bus we used
+Return : none
+------------------------------------------------------------------------------------------------------*/
+void __sramfunc sram_i2c_init()
+{
+
+ //enable cru_clkgate1 clock
+ data[0] = readl(RK29_CRU_BASE + CRU_CLKGATE1_CON);
+ writel(data[0]&(~0x00000085), RK29_CRU_BASE + CRU_CLKGATE1_CON);
+ //set the pclk
+ data[1] = readl(RK29_CRU_BASE + CRU_CLKSEL0_CON);
+ writel(data[1]&(~(0x07 << 5))&(~(0x03 << 10)) | (0x03 << 10), RK29_CRU_BASE + CRU_CLKSEL0_CON);
+ data[2] = readl(RK29_CRU_BASE + CRU_CLKGATE_ADDR);
+ writel(data[2]&(~(0x01 << CRU_CLKGATE_BIT)), RK29_CRU_BASE + CRU_CLKGATE_ADDR);
+ data[3] = readl(RK29_GRF_BASE + GRF_GPIO_IOMUX);
+ writel(data[3]&I2C_GRF_GPIO_IOMUX, RK29_GRF_BASE + GRF_GPIO_IOMUX);
+
+
+ //reset I2c-reg base
+ data[4] = readl(SRAM_I2C_ADDRBASE + I2C_OPR);
+ writel(data[4] | (0x1ul << 7), SRAM_I2C_ADDRBASE + I2C_OPR);
+ sram_i2c_delay(10);
+ writel(data[4]&(~(0x1ul << 7)), SRAM_I2C_ADDRBASE + I2C_OPR);
+ writel(0x0, SRAM_I2C_ADDRBASE + I2C_LCMR);
+ //disable arq
+ writel(0x0, SRAM_I2C_ADDRBASE + I2C_IER);
+ writel(data[4]&(~0x03f), SRAM_I2C_ADDRBASE + I2C_OPR);
+ //enable i2c core
+ writel(data[4] | I2C_CORE_ENABLE , SRAM_I2C_ADDRBASE + I2C_OPR);
+}
+
+
+/*-------------------------------------------------------------------------------------------------------
+Name : sram_i2c_deinit
+Desc : de-initialize the necessary registers
+Params : noe
+Return : none
+------------------------------------------------------------------------------------------------------*/
+void __sramfunc sram_i2c_deinit(void)
+{
+ SRAM_I2C_CLK_ENABLE();
+ //restore i2c opr reg
+ writel(data[4], SRAM_I2C_ADDRBASE + I2C_OPR);
+
+ //restore iomux reg
+ writel(data[3], RK29_GRF_BASE + GRF_GPIO_IOMUX);
+
+ //restore cru gate2
+ writel(data[2], RK29_CRU_BASE + CRU_CLKGATE_ADDR);
+
+ //restore scu clock reg
+ writel(data[1], RK29_CRU_BASE + CRU_CLKSEL0_CON);
+
+ //restore cru gate1
+ writel(data[0], RK29_CRU_BASE + CRU_CLKGATE1_CON);
+}
+
+
+/*-------------------------------------------------------------------------------------------------------
+Name : sram_i2c_start
+Desc : start i2c
+Params : none
+Return : none
+------------------------------------------------------------------------------------------------------*/
+void __sramfunc sram_i2c_start(void)
+{
+ writel(I2C_LCMR_START | I2C_LCMR_RESUME, SRAM_I2C_ADDRBASE + I2C_LCMR);
+}
+
+
+/*-------------------------------------------------------------------------------------------------------
+Name : sram_i2c_stop
+Desc : stop i2c
+Params : none
+Return : none
+------------------------------------------------------------------------------------------------------*/
+void __sramfunc sram_i2c_stop(void)
+{
+ writel(I2C_LCMR_STOP | I2C_LCMR_RESUME, SRAM_I2C_ADDRBASE + I2C_LCMR);
+}
+
+
+/*-------------------------------------------------------------------------------------------------------
+Name : sram_i2c_wait_event
+Desc : wait the ack
+Params : none
+Return : success: return 0; fail: return 1
+------------------------------------------------------------------------------------------------------*/
+uint8 __sramfunc sram_i2c_wait_event(void)
+{
+ unsigned int isr, waiteSendDelay = 3;
+
+ isr = readl(SRAM_I2C_ADDRBASE + I2C_ISR);
+
+ while (waiteSendDelay > 0)
+ {
+ if ((isr & I2C_ARBITR_LOSE_STATUS) != 0)
+ {
+ writel(0x0, SRAM_I2C_ADDRBASE + I2C_ISR);
+ return 1;
+ }
+ if ((isr & I2C_RECE_INT_MACK) != 0)
+ {
+ break;
+ }
+ sram_i2c_delay(1);
+ waiteSendDelay--;
+ }
+ writel(isr & (~0x1ul) , SRAM_I2C_ADDRBASE + I2C_ISR);
+ return 0;
+}
+
+
+/*-------------------------------------------------------------------------------------------------------
+Name : sram_i2c_send_data
+Desc : send a byte data
+Params : buf: the data we need to send;
+ startbit: startbit=1, send a start signal
+ startbit=0, do not send a start signal
+Return : success: return 0; fail: return 1
+------------------------------------------------------------------------------------------------------*/
+uint8 __sramfunc sram_i2c_send_data(uint8 buf, uint8 startbit)
+{
+ writel(buf, SRAM_I2C_ADDRBASE + I2C_MTXR);
+ readl(SRAM_I2C_ADDRBASE + I2C_LCMR);
+ if(startbit)
+ {
+ writel(I2C_LCMR_START | I2C_LCMR_RESUME, SRAM_I2C_ADDRBASE + I2C_LCMR);
+ sram_i2c_delay(50);
+ }
+ else
+ {
+ writel(I2C_LCMR_RESUME, SRAM_I2C_ADDRBASE + I2C_LCMR);
+ sram_i2c_delay(50);
+ }
+
+ if(sram_i2c_wait_event() != 0)
+ return 1;
+
+ return 0;
+}
+
+
+/*-------------------------------------------------------------------------------------------------------
+Name : sram_i2c_send_data
+Desc : receive a byte data
+Params : buf: save the data we received
+Return : success: return 0; fail: return 1
+------------------------------------------------------------------------------------------------------*/
+uint8 __sramfunc sram_i2c_read_data(uint8 *buf)
+{
+ unsigned int ret;
+ uint8 waitDelay = 3;
+
+ ret = readl(SRAM_I2C_ADDRBASE + I2C_LCMR);
+ writel(ret | I2C_LCMR_RESUME, SRAM_I2C_ADDRBASE + I2C_LCMR);
+
+ while(waitDelay > 0)
+ {
+ ret = readl(SRAM_I2C_ADDRBASE + I2C_ISR);
+ if((ret & I2C_ARBITR_LOSE_STATUS) != 0)
+ return 1;
+
+ if((ret & I2C_RECE_INT_MACKP) != 0)
+ break;
+
+ waitDelay--;
+ }
+
+ sram_i2c_delay(50);
+ *buf = (uint8)readl(SRAM_I2C_ADDRBASE + I2C_MRXR);
+ ret = readl(SRAM_I2C_ADDRBASE + I2C_ISR);
+ writel(ret & (~(0x1 << 1)), SRAM_I2C_ADDRBASE + I2C_ISR);
+ return 0;
+}
+
+
+/*-------------------------------------------------------------------------------------------------------
+Name : sram_i2c_slaveAdr
+Desc : send the slaveAddr in 10bit mode or in 7bit mode
+Params : I2CSlaveAddr: slave address
+ addressbit: high 4bits determine 7 bits or 10 bits slave address锛沴ow 4bits determine 8 bits or 16 bits regAddress
+ high 4bits==7, slave address is 7 bits
+ high 4bits==10,slave address is 10 bits
+ low 4bits==0, slave address is 8 bits
+ low 4bits==1, slave address is 16 bits
+ read_or_write: read a data or write a data from salve
+Return : sucess return 0, fail return 0
+------------------------------------------------------------------------------------------------------*/
+uint8 __sramfunc sram_i2c_slaveAdr(uint16 I2CSlaveAddr, uint8 addressBit, uint8 read_or_write)
+{
+ uint8 retv = 1;
+
+ if((addressBit & 0xf0) == 0x10) //10bit slave address
+ {
+ if(sram_i2c_send_data((I2CSlaveAddr >> 7) & 0x06 | 0xf0 | read_or_write, 1) != 0)
+ goto STOP;
+
+ sram_i2c_delay(50);
+ if(sram_i2c_send_data((I2CSlaveAddr) & 0xff | read_or_write, 0) != 0)
+ goto STOP;
+ }
+ else //7bit slave address
+ {
+ if(sram_i2c_send_data((I2CSlaveAddr << 1) | read_or_write, 1) != 0)
+ goto STOP;
+ }
+
+ retv = 0;
+
+STOP:
+ //sram_i2c_stop();
+ return retv;
+}
+
+
+/*-------------------------------------------------------------------------------------------------------
+Name : sram_i2c_wirte
+Desc : conduct wirte operation
+Params : I2CSlaveAddr: slave address
+ regAddr: slave register address
+ *pdataBuff: data we want to write
+ size: number of bytes
+ addressbit: high 4bits determine 7 bits or 10 bits slave address锛沴ow 4bits determine 8 bits or 16 bits regAddress
+ high 4bits==7, slave address is 7 bits
+ high 4bits==10,slave address is 10 bits
+ low 4bits==0, slave address is 8 bits
+ low 4bits==1, slave address is 16 bits
+Return : success: return 0; fail: return 1
+------------------------------------------------------------------------------------------------------*/
+uint8 __sramfunc sram_i2c_write(uint16 I2CSlaveAddr, uint16 regAddr, void *pdataBuff, uint16 size, uint8 addressBit)
+{
+ unsigned int ret;
+ uint8 *pdata;
+ uint8 bit_if16 = (addressBit & 0x0f) ? 0x2 : 0x1;
+ uint8 retv = 1;
+
+ pdata = (uint8 *) pdataBuff;
+
+ sram_i2c_set_mode();
+
+ sram_i2c_delay(50);
+ if((retv = sram_i2c_slaveAdr(I2CSlaveAddr, addressBit, SRAM_I2C_WRITE)) != 0)
+ goto STOP;
+ sram_i2c_delay(50);
+
+ do
+ {
+ bit_if16--;
+ if (sram_i2c_send_data((regAddr >> (bit_if16 ? 8 : 0)) & 0xff, 0) != 0)
+ goto STOP;
+
+ }
+ while(bit_if16);
+
+ sram_i2c_delay(50);
+
+ do
+ {
+ if (sram_i2c_send_data(*pdata, 0) != 0)
+ goto STOP;
+ sram_i2c_delay(50);
+ pdata++;
+ size--;
+ }
+ while (size);
+
+ retv = 0;
+ ret = readl( SRAM_I2C_ADDRBASE + I2C_CONR);
+ writel(ret | I2C_CON_NACK, SRAM_I2C_ADDRBASE + I2C_CONR);
+
+STOP:
+ sram_i2c_stop();
+ return retv;
+}
+
+
+/*-------------------------------------------------------------------------------------------------------
+Name : sram_i2c_read
+Desc : conduct read operation
+Params : I2CSlaveAddr: slave address
+ regAddr: slave register address
+ *pdataBuff: save the data master received
+ size: number of bytes
+ addressbit: high 4bits determine 7 bits or 10 bits slave address锛沴ow 4bits determine 8 bits or 16 bits regAddress
+ high 4bits==7, slave address is 7 bits
+ high 4bits==10,slave address is 10 bits
+ low 4bits==0, slave address is 8 bits
+ low 4bits==1, slave address is 16 bits
+ mode: mode=0, NORMALMODE
+ mode=1, DIRECTMODE
+Return : success: return 0; fail: return 1
+------------------------------------------------------------------------------------------------------*/
+uint8 __sramfunc sram_i2c_read(uint16 I2CSlaveAddr, uint16 regAddr, void *pdataBuff, uint16 size, uint8 addressBit)
+{
+ uint8 *pdata;
+ unsigned int ret;
+ uint8 bit_if16 = (addressBit & 0x0f) ? 0x2 : 0x1;
+ uint8 retv = 1;
+
+ pdata = (uint8 *)pdataBuff;
+ sram_i2c_set_mode();
+ //sram_i2c_delay(50);
+
+ if((retv = sram_i2c_slaveAdr(I2CSlaveAddr, addressBit, SRAM_I2C_WRITE)) != 0)
+ goto STOP;
+ //sram_i2c_delay(50);
+
+ do
+ {
+ bit_if16--;
+ if (sram_i2c_send_data((regAddr >> (bit_if16 ? 8 : 0)) & 0xff, 0) != 0)
+ goto STOP;
+ }
+ while(bit_if16);
+
+ sram_i2c_delay(50);
+
+ if((retv = sram_i2c_slaveAdr(I2CSlaveAddr, addressBit, SRAM_I2C_READ)) != 0)
+ goto STOP;
+
+ writel((ret&(~(0x1 << 3))) | I2C_MASTER_RECE_MODE | I2C_MASTER_PORT_ENABLE, SRAM_I2C_ADDRBASE + I2C_CONR);
+ do
+ {
+ ret = readl(SRAM_I2C_ADDRBASE + I2C_CONR);
+ if(size == 1)
+ {
+ if((sram_i2c_read_data(pdata)) != 0)
+ goto STOP;
+ writel(ret | I2C_CON_NACK, SRAM_I2C_ADDRBASE + I2C_CONR);
+ }
+ else
+ {
+ if((sram_i2c_read_data(pdata)) != 0)
+ goto STOP;
+ writel(ret & (~(0x1ul << 4)) | I2C_CON_ACK, SRAM_I2C_ADDRBASE + I2C_CONR);
+ }
+ //sram_i2c_delay(50);
+ pdata++;
+ size--;
+ }
+ while (size);
+
+ retv = 0;
+
+STOP:
+ sram_i2c_stop();
+ return retv;
+}
+unsigned int __sramfunc rk29_suspend_voltage_set(unsigned int vol)
+{
+ uint8 slaveaddr;
+ uint16 slavereg;
+ unsigned int ret, mask, addr;
+ uint8 data[2];
+
+ sram_i2c_init(); //init i2c device
+ slaveaddr = I2C_SADDR; //slave device addr
+ slavereg = 0x4003; // reg addr
+
+ data[0] = 0x00; //clear i2c when read
+ data[1] = 0x00;
+ ret = sram_i2c_read(slaveaddr, slavereg, data, SRAM_I2C_DATA_BYTE, I2C_SLAVE_TYPE);
+ // print_Hex(data[0]); //read data saved in data
+ // print_Hex(data[1]); //read data saved in data
+ //sram_printch('\n');
+
+ data[0] |= (0x1<<6); //write data
+ sram_i2c_write(slaveaddr, slavereg, data, SRAM_I2C_DATA_BYTE, I2C_SLAVE_TYPE);//wm831x enter sleep mode
+ sram_i2c_delay(50);
+
+ sram_i2c_deinit(); //deinit i2c device
+
+}
+
+void __sramfunc rk29_suspend_voltage_resume(unsigned int vol)
+{
+ uint8 slaveaddr;
+ uint16 slavereg;
+ unsigned int ret, mask, addr;
+ uint8 data[2];
+
+ sram_i2c_init(); //init i2c device
+ slaveaddr = I2C_SADDR; //slave device addr
+ slavereg = 0x4003; // reg addr
+
+ data[0] = 0x00; //clear i2c when read
+ data[1] = 0x00;
+ ret = sram_i2c_read(slaveaddr, slavereg, data, SRAM_I2C_DATA_BYTE, I2C_SLAVE_TYPE);
+ // print_Hex(data[0]); //read data saved in data
+ // print_Hex(data[1]); //read data saved in data
+ // sram_printch('\n');
+
+ data[0] &= ~(0x1<<6); //write data
+ sram_i2c_write(slaveaddr, slavereg, data, SRAM_I2C_DATA_BYTE, I2C_SLAVE_TYPE);//wm831x exit sleep mode
+ sram_i2c_delay(50);
+
+ sram_i2c_deinit(); //deinit i2c device
+ // To make the system time correct after resume from suspend
+ sram_udelay(100000, 24);
+
+}
+
+#endif
+#endif
+
+
void (*exit_platform_hw)(void);
};
+struct rt5625_platform_data {
+ int spk_ctr_pin;
+ int spk_ctr_on;
+ int spk_ctr_off;
+};
+
//tcl miaozh add
/*nas touch */
struct nas_platform_data {
#define PM_VOL_H\r
\r
\r
-#if defined(CONFIG_RK29_SPI_INSRAM)||defined(CONFIG_RK29_PWM_INSRAM)\r
+#if defined(CONFIG_RK29_SPI_INSRAM)||defined(CONFIG_RK29_PWM_INSRAM)||defined(CONFIG_RK29_I2C_INSRAM)\r
\r
void interface_ctr_reg_pread(void);\r
+void i2c_interface_ctr_reg_pread(void);\r
unsigned int __sramfunc rk29_suspend_voltage_set(unsigned int vol);\r
void __sramfunc rk29_suspend_voltage_resume(unsigned int vol);\r
\r
#else\r
\r
#define interface_ctr_reg_pread()\r
+#define i2c_interface_ctr_reg_pread()\r
static unsigned int __sramfunc rk29_suspend_voltage_set(unsigned int vol) { return 0; }\r
#define rk29_suspend_voltage_resume(a)\r
\r
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <plat/rk_camera.h>
+#ifndef __ASM_ARCH_CAMERA_H_
+#define __ASM_ARCH_CAMERA_H_
+
+#include <linux/videodev2.h>
+
+#define RK29_CAM_DRV_NAME "rk29xx-camera"
+#define RK29_CAM_PLATFORM_DEV_ID 33
+
+#define INVALID_GPIO -1
+
+#define RK29_CAM_IO_SUCCESS 0
+#define RK29_CAM_EIO_INVALID -1
+#define RK29_CAM_EIO_REQUESTFAIL -2
+
+#define RK29_CAM_SUPPORT_NUMS 6
+
+/*---------------- Camera Sensor Must Define Macro Begin ------------------------*/
+#define RK29_CAM_SENSOR_OV7675 ov7675
+#define RK29_CAM_SENSOR_OV9650 ov9650
+#define RK29_CAM_SENSOR_OV2640 ov2640
+#define RK29_CAM_SENSOR_OV2655 ov2655
+#define RK29_CAM_SENSOR_OV2659 ov2659
+#define RK29_CAM_SENSOR_OV7690 ov7690
+#define RK29_CAM_SENSOR_OV3640 ov3640
+#define RK29_CAM_SENSOR_OV5640 ov5640
+#define RK29_CAM_SENSOR_OV5642 ov5642
+#define RK29_CAM_SENSOR_S5K6AA s5k6aa
+#define RK29_CAM_SENSOR_MT9D112 mt9d112
+#define RK29_CAM_SENSOR_MT9D113 mt9d113
+#define RK29_CAM_SENSOR_MT9P111 mt9p111
+#define RK29_CAM_SENSOR_MT9T111 mt9t111
+#define RK29_CAM_SENSOR_GT2005 gt2005
+#define RK29_CAM_SENSOR_GC0307 gc0307
+#define RK29_CAM_SENSOR_GC0308 gc0308
+#define RK29_CAM_SENSOR_GC0309 gc0309
+#define RK29_CAM_SENSOR_GC2015 gc2015
+#define RK29_CAM_SENSOR_SIV120B siv120b
+#define RK29_CAM_SENSOR_SID130B sid130B
+#define RK29_CAM_SENSOR_HI253 hi253
+#define RK29_CAM_SENSOR_HI704 hi704
+#define RK29_CAM_SENSOR_NT99250 nt99250
+
+#define RK29_CAM_SENSOR_NAME_OV7675 "ov7675"
+#define RK29_CAM_SENSOR_NAME_OV9650 "ov9650"
+#define RK29_CAM_SENSOR_NAME_OV2640 "ov2640"
+#define RK29_CAM_SENSOR_NAME_OV2655 "ov2655"
+#define RK29_CAM_SENSOR_NAME_OV2659 "ov2659"
+#define RK29_CAM_SENSOR_NAME_OV7690 "ov7690"
+#define RK29_CAM_SENSOR_NAME_OV3640 "ov3640"
+#define RK29_CAM_SENSOR_NAME_OV5640 "ov5640"
+#define RK29_CAM_SENSOR_NAME_OV5642 "ov5642"
+#define RK29_CAM_SENSOR_NAME_S5K6AA "s5k6aa"
+#define RK29_CAM_SENSOR_NAME_MT9D112 "mt9d112"
+#define RK29_CAM_SENSOR_NAME_MT9D113 "mt9d113"
+#define RK29_CAM_SENSOR_NAME_MT9P111 "mt9p111"
+#define RK29_CAM_SENSOR_NAME_MT9T111 "mt9t111"
+#define RK29_CAM_SENSOR_NAME_GT2005 "gt2005"
+#define RK29_CAM_SENSOR_NAME_GC0307 "gc0307"
+#define RK29_CAM_SENSOR_NAME_GC0308 "gc0308"
+#define RK29_CAM_SENSOR_NAME_GC0309 "gc0309"
+#define RK29_CAM_SENSOR_NAME_GC2015 "gc2015"
+#define RK29_CAM_SENSOR_NAME_SIV120B "siv120b"
+#define RK29_CAM_SENSOR_NAME_SID130B "sid130B"
+#define RK29_CAM_SENSOR_NAME_HI253 "hi253"
+#define RK29_CAM_SENSOR_NAME_HI704 "hi704"
+#define RK29_CAM_SENSOR_NAME_NT99250 "nt99250"
+
+#define ov7675_FULL_RESOLUTION 0x30000 // 0.3 megapixel
+#define ov9650_FULL_RESOLUTION 0x130000 // 1.3 megapixel
+#define ov2640_FULL_RESOLUTION 0x200000 // 2 megapixel
+#define ov2655_FULL_RESOLUTION 0x200000 // 2 megapixel
+#define ov2659_FULL_RESOLUTION 0x200000 // 2 megapixel
+#define ov7690_FULL_RESOLUTION 0x300000 // 2 megapixel
+#define ov3640_FULL_RESOLUTION 0x300000 // 3 megapixel
+#define ov5640_FULL_RESOLUTION 0x500000 // 5 megapixel
+#define ov5642_FULL_RESOLUTION 0x500000 // 5 megapixel
+#define s5k6aa_FULL_RESOLUTION 0x130000 // 1.3 megapixel
+#define mt9d112_FULL_RESOLUTION 0x200000 // 2 megapixel
+#define mt9d113_FULL_RESOLUTION 0x200000 // 2 megapixel
+#define mt9t111_FULL_RESOLUTION 0x300000 // 3 megapixel
+#define mt9p111_FULL_RESOLUTION 0x500000 // 5 megapixel
+#define gt2005_FULL_RESOLUTION 0x200000 // 2 megapixel
+#define gc0308_FULL_RESOLUTION 0x30000 // 0.3 megapixel
+#define gc0309_FULL_RESOLUTION 0x30000 // 0.3 megapixel
+#define gc2015_FULL_RESOLUTION 0x200000 // 2 megapixel
+#define siv120b_FULL_RESOLUTION 0x30000 // 0.3 megapixel
+#define sid130B_FULL_RESOLUTION 0x200000 // 2 megapixel
+#define hi253_FULL_RESOLUTION 0x200000 // 2 megapixel
+#define hi704_FULL_RESOLUTION 0x30000 // 0.3 megapixel
+#define nt99250_FULL_RESOLUTION 0x200000 // 2 megapixel
+/*---------------- Camera Sensor Must Define Macro End ------------------------*/
+
+
+#define RK29_CAM_POWERACTIVE_BITPOS 0x00
+#define RK29_CAM_POWERACTIVE_MASK (1<<RK29_CAM_POWERACTIVE_BITPOS)
+#define RK29_CAM_POWERACTIVE_H (0x01<<RK29_CAM_POWERACTIVE_BITPOS)
+#define RK29_CAM_POWERACTIVE_L (0x00<<RK29_CAM_POWERACTIVE_BITPOS)
+
+#define RK29_CAM_RESETACTIVE_BITPOS 0x01
+#define RK29_CAM_RESETACTIVE_MASK (1<<RK29_CAM_RESETACTIVE_BITPOS)
+#define RK29_CAM_RESETACTIVE_H (0x01<<RK29_CAM_RESETACTIVE_BITPOS)
+#define RK29_CAM_RESETACTIVE_L (0x00<<RK29_CAM_RESETACTIVE_BITPOS)
+
+#define RK29_CAM_POWERDNACTIVE_BITPOS 0x02
+#define RK29_CAM_POWERDNACTIVE_MASK (1<<RK29_CAM_POWERDNACTIVE_BITPOS)
+#define RK29_CAM_POWERDNACTIVE_H (0x01<<RK29_CAM_POWERDNACTIVE_BITPOS)
+#define RK29_CAM_POWERDNACTIVE_L (0x00<<RK29_CAM_POWERDNACTIVE_BITPOS)
+
+#define RK29_CAM_FLASHACTIVE_BITPOS 0x03
+#define RK29_CAM_FLASHACTIVE_MASK (1<<RK29_CAM_FLASHACTIVE_BITPOS)
+#define RK29_CAM_FLASHACTIVE_H (0x01<<RK29_CAM_FLASHACTIVE_BITPOS)
+#define RK29_CAM_FLASHACTIVE_L (0x00<<RK29_CAM_FLASHACTIVE_BITPOS)
+
+/* v4l2_subdev_core_ops.ioctl ioctl_cmd macro */
+#define RK29_CAM_SUBDEV_ACTIVATE 0x00
+#define RK29_CAM_SUBDEV_DEACTIVATE 0x01
+#define RK29_CAM_SUBDEV_IOREQUEST 0x02
+#define RK29_CAM_SUBDEV_CB_REGISTER 0x03
+
+enum rk29camera_ioctrl_cmd
+{
+ Cam_Power,
+ Cam_Reset,
+ Cam_PowerDown,
+ Cam_Flash
+};
+
+enum rk29sensor_power_cmd
+{
+ Sensor_Reset,
+ Sensor_PowerDown,
+ Sensor_Flash
+};
+
+enum rk29camera_flash_cmd
+{
+ Flash_Off,
+ Flash_On,
+ Flash_Torch
+};
+
+struct rk29camera_gpio_res {
+ unsigned int gpio_reset;
+ unsigned int gpio_power;
+ unsigned int gpio_powerdown;
+ unsigned int gpio_flash;
+ unsigned int gpio_flag;
+ unsigned int gpio_init;
+
+ const char *dev_name;
+};
+
+struct rk29camera_mem_res {
+ const char *name;
+ unsigned int start;
+ unsigned int size;
+};
+struct rk29camera_info {
+ const char *dev_name;
+ unsigned int orientation;
+ struct v4l2_frmivalenum fival[10];
+};
+struct rk29camera_platform_data {
+ int (*io_init)(void);
+ int (*io_deinit)(int sensor);
+ int (*sensor_ioctrl)(struct device *dev,enum rk29camera_ioctrl_cmd cmd,int on);
+ struct rk29camera_gpio_res gpio_res[RK29_CAM_SUPPORT_NUMS];
+ struct rk29camera_mem_res meminfo;
+ struct rk29camera_info info[RK29_CAM_SUPPORT_NUMS];
+};
+
+struct rk29camera_platform_ioctl_cb {
+ int (*sensor_power_cb)(struct rk29camera_gpio_res *res, int on);
+ int (*sensor_reset_cb)(struct rk29camera_gpio_res *res, int on);
+ int (*sensor_powerdown_cb)(struct rk29camera_gpio_res *res, int on);
+ int (*sensor_flash_cb)(struct rk29camera_gpio_res *res, int on);
+};
+
+typedef struct rk29_camera_sensor_cb {
+ int (*sensor_cb)(void *arg);
+}rk29_camera_sensor_cb_s;
+
+#endif /* __ASM_ARCH_CAMERA_H_ */
+
#define RK29_DEBUG_PHYS 0x20024000
#define RK29_DEBUG_SIZE SZ_16K
#define RK29_I2C0_PHYS 0x2002C000
+#define RK29_I2C0_BASE (RK29_ADDR_BASE1+0x2C000)
#define RK29_I2C0_SIZE SZ_16K
#define RK29_UART0_PHYS 0x20030000
#define RK29_UART0_SIZE SZ_4K
#define VPU_MEM_LINK _IOW(VPU_MEM_IOCTL_MAGIC, 7, unsigned int)
#define VPU_MEM_CACHE_CLEAN _IOW(VPU_MEM_IOCTL_MAGIC, 8, unsigned int)
#define VPU_MEM_CACHE_INVALID _IOW(VPU_MEM_IOCTL_MAGIC, 9, unsigned int)
-
+#define VPU_MEM_POOL_SET _IOW(VPU_MEM_IOCTL_MAGIC, 10, unsigned int)
+#define VPU_MEM_POOL_UNSET _IOW(VPU_MEM_IOCTL_MAGIC, 11, unsigned int)
+#define VPU_MEM_POOL_CHECK _IOW(VPU_MEM_IOCTL_MAGIC, 12, unsigned int)
struct vpu_mem_platform_data
{
RK29_DEVICE(NANDC),
RK29_DEVICE(SPI0),
RK29_DEVICE(SPI1),
+ RK29_DEVICE(I2C0),
RK29_DEVICE(I2C1),
RK29_DEVICE(I2C2),
RK29_DEVICE(I2C3),
-#ifdef CONFIG_DDR_RECONFIG
RK29_DEVICE(LCDC),
+#ifdef CONFIG_DDR_RECONFIG
RK29_DEVICE(GPU),
RK29_DEVICE(VCODEC),
RK29_DEVICE(VIP),
return 0;\r
}\r
\r
-static DEVICE_ATTR(dmamemcpy, S_IRUGO|S_IALLUGO, memcpy_dma_read, memcpy_dma_write);\r
+static DEVICE_ATTR(dmamemcpy, S_IRUGO|S_IXUGO, memcpy_dma_read, memcpy_dma_write);\r
\r
\r
static int __devinit dma_memcpy_probe(struct platform_device *pdev)\r
sram_printch('0');
flush_tlb_all();
+ #if defined(CONFIG_RK29_SPI_INSRAM) || defined(CONFIG_RK29_PWM_INSRAM)
interface_ctr_reg_pread();
+ #endif
+ #if defined(CONFIG_RK29_I2C_INSRAM)
+ i2c_interface_ctr_reg_pread();
+ #endif
/* disable clock */
clkgate[0] = cru_readl(CRU_CLKGATE0_CON);
| (1 << CLK_GATE_TPIU)
#endif
) | clkgate[0], CRU_CLKGATE0_CON);
+
+#ifdef CONFIG_PHONE_INCALL_IS_SUSPEND
+#if defined(CONFIG_SND_RK29_SOC_I2S_8CH)
+ cru_writel(clkgate[0]&(~(1<<CLK_GATE_I2S0)),CRU_CLKGATE0_CON);
+#elif defined(CONFIG_SND_RK29_SOC_I2S_2CH)
+ cru_writel(clkgate[0]&(~(1<<CLK_GATE_I2S1)),CRU_CLKGATE0_CON);
+#endif
+#endif
+
cru_writel(~0, CRU_CLKGATE1_CON);
cru_writel(~((1 << CLK_GATE_GPIO1 % 32)
| (1 << CLK_GATE_GPIO2 % 32)
cru_writel(clksel0 & ~0x7FC000, CRU_CLKSEL0_CON);
sram_printch('4');
-
+ pm_gpio_suspend();
rk29_suspend();
-
+ pm_gpio_resume();
sram_printch('4');
/* resume general pll */
--- /dev/null
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/input.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/suspend.h>
+#include <linux/platform_device.h>
+#include <linux/workqueue.h>
+#include <linux/suspend.h>
+#include <linux/power_supply.h>
+#include <linux/earlysuspend.h>
+#include <mach/rk29_iomap.h>
+#include <linux/io.h>
+#include <mach/gpio.h>
+
+
+
+#define CHARGE_EARLYSUSPEND 0
+#define CHARGE_EARLYRESUME 1
+
+/******************************************************************/
+#ifdef CONFIG_RK29_CHARGE_EARLYSUSPEND
+
+static DEFINE_MUTEX(power_suspend_lock);
+
+static struct early_suspend charge_lowerpower = {
+
+ .level = -0xff,
+ .suspend = NULL,
+ .resume = NULL,
+};
+
+
+void charge_earlysuspend_enter(int status) //xsf
+{
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+
+ struct early_suspend *pos;
+ struct early_suspend *earlysuspend_temp;
+ struct list_head *list_head;
+ struct list_head *list_temp;
+
+
+ mutex_lock(&power_suspend_lock);
+
+ earlysuspend_temp = &charge_lowerpower;
+ list_head = earlysuspend_temp->link.prev;
+
+ if(status == 0)
+ {
+ list_for_each_entry(pos, list_head, link)
+ {
+// printk("earlysuspend-level = %d --\n", pos->level);
+ if (pos->suspend != NULL)
+ pos->suspend(pos);
+ }
+ }
+
+ if(status == 1)
+ {
+ list_for_each_entry_reverse(pos, list_head, link)
+ {
+// printk("earlysuspend-level = %d --\n", pos->level);
+ if (pos->resume != NULL)
+ pos->resume(pos);
+ }
+ }
+
+ mutex_unlock(&power_suspend_lock);
+#endif
+
+}
+int rk29_charge_judge(void)
+{
+ return readl(RK29_GPIO4_BASE + GPIO_INT_STATUS);
+
+}
+extern int rk29_pm_enter(suspend_state_t state);
+
+int charger_suspend(void)
+{
+
+#ifdef CONFIG_RK29_CHARGE_EARLYSUSPEND
+
+ charge_earlysuspend_enter(0);
+ while(1)
+ {
+ local_irq_disable();
+ rk29_pm_enter(PM_SUSPEND_MEM);
+
+ if((rk29_charge_judge() &&(0x01000000)))
+ {
+ local_irq_enable();
+ break;
+ }
+ else
+ local_irq_enable();
+ }
+ charge_earlysuspend_enter(1); //xsf
+ return 0;
+#endif
+}
+
+
+
+static int __devinit charge_lowerpower_probe(struct platform_device *pdev)
+{
+
+
+ printk("%s\n",__FUNCTION__);
+#ifdef CONFIG_HAS_EARLYSUSPEND
+ register_early_suspend(&charge_lowerpower);//xsf
+#endif
+
+}
+
+static struct platform_driver charge_lowerpower_driver = {
+ .probe = charge_lowerpower_probe,
+ .driver = {
+ .name = "charge_lowerpower",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init charge_lowerpower_init(void)
+{
+ return platform_driver_register(&charge_lowerpower_driver);
+}
+module_init(charge_lowerpower_init);
+
+static void __exit charge_lowerpower_exit(void)
+{
+ platform_driver_unregister(&charge_lowerpower_driver);
+}
+module_exit(charge_lowerpower_exit);
+
+
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("xsf<xsf@rock-chips.com>");
+MODULE_DESCRIPTION("charger lowerpower");
+
+
+#endif
+/***************************************************************/
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
--- /dev/null
+#include <linux/module.h>\r
+#include <linux/file.h>\r
+#include <linux/fs.h>\r
+#include <linux/miscdevice.h>\r
+#include <linux/uaccess.h>\r
+#include "verifyID.h"\r
+\r
+\r
+\r
+static int verifyid_open(struct inode *inode, struct file *file)\r
+{\r
+ int ret;\r
+ ret = generic_file_open(inode, file);\r
+ if (unlikely(ret))\r
+ return ret;\r
+ return 0;\r
+}\r
+\r
+static int verifyid_release(struct inode *ignored, struct file *file)\r
+{\r
+\r
+ return 0;\r
+}\r
+\r
+static int GetChipTag(void)\r
+{\r
+ unsigned long i;\r
+ unsigned long value; \r
+ value = read_XDATA32(RK29_GPIO6_BASE+0x4);\r
+ printk("read gpio6+4 = 0x%x\n",value);\r
+ write_XDATA32((RK29_GPIO6_BASE+0x4), (read_XDATA32(RK29_GPIO6_BASE+0x4)&(~(0x7ul<<28)))); // portD 4:6 input\r
+ value = read_XDATA32(RK29_GPIO6_BASE+0x50); \r
+ printk("read gpio6+0x50 = 0x%x\n",value);\r
+ value = (value>>28)&0x07; \r
+ \r
+ return value;\r
+}\r
+static long verifyid_ioctl(struct file *file, unsigned int cmd, unsigned long arg)\r
+{\r
+ long ret = -ENOTTY;\r
+\r
+ switch (cmd) {\r
+ case VERIFYID_GETID:\r
+ ret=GetChipTag();\r
+ *((unsigned long *)arg) = 1;\r
+ break;\r
+ }\r
+\r
+ return ret;\r
+}\r
+\r
+static ssize_t verifyid_read(struct file *file, char __user *buf,\r
+ size_t len, loff_t *pos)\r
+{\r
+ long ret = GetChipTag();\r
+ char *kb = {0x11,0x22,0x33,0x44};\r
+ if(ret>0)\r
+ //*buf = 0xf8;\r
+ copy_to_user(buf,kb,1);\r
+ return ret;\r
+}\r
+\r
+static struct file_operations verifyid_fops = {\r
+ .owner = THIS_MODULE,\r
+ .open = verifyid_open,\r
+ .read = verifyid_read,\r
+ .release = verifyid_release,\r
+ .unlocked_ioctl = verifyid_ioctl,\r
+ .compat_ioctl = verifyid_ioctl,\r
+};\r
+\r
+static struct miscdevice verifyid_misc = {\r
+ .minor = MISC_DYNAMIC_MINOR,\r
+ .name = "verifyid",\r
+ .fops = &verifyid_fops,\r
+};\r
+\r
+static int __init verifyid_init(void)\r
+{\r
+ int ret;\r
+ ret = misc_register(&verifyid_misc);\r
+ if (unlikely(ret)) {\r
+ printk(KERN_ERR "verifyid: failed to register misc device!\n");\r
+ return ret;\r
+ }\r
+ printk(KERN_INFO "verifyid: initialized\n");\r
+\r
+ return 0;\r
+}\r
+\r
+static void __exit verifyid_exit(void)\r
+{\r
+ int ret;\r
+\r
+ ret = misc_deregister(&verifyid_misc);\r
+ if (unlikely(ret))\r
+ printk(KERN_ERR "verifyid: failed to unregister misc device!\n");\r
+\r
+ printk(KERN_INFO "verifyid: unloaded\n");\r
+}\r
+\r
+module_init(verifyid_init);\r
+module_exit(verifyid_exit);\r
+\r
+MODULE_LICENSE("GPL");\r
+\r
--- /dev/null
+/*\r
+ */\r
+\r
+#ifndef _LINUX_VERIFYID_H\r
+#define _LINUX_VERIFYID_H\r
+#include <mach/rk29_iomap.h>\r
+\r
+\r
+#define VERIFYID_GETID 0x29\r
+#define write_XDATA32(address, value) (*((unsigned long volatile*)(address)) = value)\r
+#define read_XDATA32(address) (*((unsigned long volatile*)(address)))\r
+\r
+#endif /* _LINUX_VERIFYID_H */\r
+\r
* @author ChenHengming (2011-4-11)\r
*/\r
typedef struct vpu_mem_session {\r
- /* a list of memory region used posted by current process */\r
- struct list_head list_used;\r
- struct list_head list_post;\r
- /* a linked list of data so we can access them for debugging */\r
- struct list_head list_session;\r
+ /* a list of memory region used posted by current process */\r
+ struct list_head list_used;\r
+ struct list_head list_post;\r
+ /* a linked list of data so we can access them for debugging */\r
+ struct list_head list_session;\r
+ /* a linked list of memory pool on current session */\r
+ struct list_head list_pool;\r
/* process id of teh mapping process */\r
pid_t pid;\r
} vdm_session;\r
\r
+/**\r
+ * session memory pool info\r
+ */\r
+typedef struct vpu_mem_pool_info {\r
+ struct list_head session_link; /* link to session use for search */\r
+ struct list_head list_used; /* a linked list for used memory in the pool */\r
+ vdm_session *session;\r
+ int count_current;\r
+ int count_target;\r
+ int pfn;\r
+} vdm_pool;\r
+\r
+/**\r
+ * session memory pool config input\r
+ */\r
+typedef struct vpu_mem_pool_config {\r
+ int size;\r
+ unsigned int count;\r
+} vdm_pool_config;\r
+\r
/**\r
* global region info\r
*/\r
typedef struct vpu_mem_region_info {\r
- struct list_head index_list; /* link to index list use for search */\r
- int used;\r
- int post;\r
- int index;\r
- int pfn;\r
+ struct list_head index_list; /* link to index list use for search */\r
+ int used;\r
+ int post;\r
+ int index;\r
+ int pfn;\r
} vdm_region;\r
\r
/**\r
* this struct should be modified with bitmap lock\r
*/\r
typedef struct vpu_mem_link_info {\r
- struct list_head session_link; /* link to vpu_mem_session list */\r
- struct list_head status_link; /* link to vdm_info.status list use for search */\r
- vdm_region *region;\r
- int link_post;\r
- int link_used;\r
- int index;\r
- int pfn;\r
+ struct list_head session_link; /* link to vpu_mem_session list */\r
+ struct list_head status_link; /* link to vdm_info.status list use for search */\r
+ struct list_head pool_link; /* link to vpu_mem_session pool list for search */\r
+ vdm_region *region;\r
+ vdm_pool *pool;\r
+ union {\r
+ int post;\r
+ int used;\r
+ int count;\r
+ } ref;\r
+ int *ref_ptr;\r
+ int index;\r
+ int pfn;\r
} vdm_link;\r
\r
/**\r
/*\r
* vdm_session init only store the free region but use a vdm_session for convenience\r
*/\r
- vdm_session status;\r
+ vdm_session status;\r
struct list_head list_index; /* sort by index */\r
- struct list_head list_free; /* free region list */\r
- struct list_head list_session; /* session list */\r
- struct rw_semaphore rw_sem;\r
+ struct list_head list_free; /* free region list */\r
+ struct list_head list_session; /* session list */\r
+ struct rw_semaphore rw_sem;\r
} vdm_info;\r
\r
static vdm_info vpu_mem;\r
*/\r
static void dump_status(void)\r
{\r
- vdm_link *link, *tmp_link;\r
- vdm_region *region, *tmp_region;\r
- vdm_session *session, *tmp_session;\r
-\r
- printk("vpu mem status dump :\n\n");\r
-\r
- // °´ index ´òÓ¡È«²¿ region\r
- printk("region:\n");\r
- list_for_each_entry_safe(region, tmp_region, &vdm_index, index_list) {\r
- printk(" idx %6d pfn %6d used %3d post %3d\n",\r
- region->index, region->pfn, region->used, region->post);\r
- }\r
- printk("free :\n");\r
- list_for_each_entry_safe(link, tmp_link, &vdm_free, status_link) {\r
- printk(" idx %6d pfn %6d used %3d post %3d\n",\r
- link->index, link->pfn, link->link_used, link->link_post);\r
- }\r
- printk("used :\n");\r
- list_for_each_entry_safe(link, tmp_link, &vdm_used, status_link) {\r
- printk(" idx %6d pfn %6d used %3d post %3d\n",\r
- link->index, link->pfn, link->link_used, link->link_post);\r
- }\r
- printk("post :\n");\r
- list_for_each_entry_safe(link, tmp_link, &vdm_post, status_link) {\r
- printk(" idx %6d pfn %6d used %3d post %3d\n",\r
- link->index, link->pfn, link->link_used, link->link_post);\r
- }\r
+ vdm_link *link, *tmp_link;\r
+ vdm_pool *pool, *tmp_pool;\r
+ vdm_region *region, *tmp_region;\r
+ vdm_session *session, *tmp_session;\r
+\r
+ printk("vpu mem status dump :\n\n");\r
+\r
+ // °´ index ´òÓ¡È«²¿ region\r
+ printk("region:\n");\r
+ list_for_each_entry_safe(region, tmp_region, &vdm_index, index_list) {\r
+ printk(" idx %6d pfn %6d used %3d post %3d\n",\r
+ region->index, region->pfn, region->used, region->post);\r
+ }\r
+ printk("free :\n");\r
+ list_for_each_entry_safe(link, tmp_link, &vdm_free, status_link) {\r
+ printk(" idx %6d pfn %6d ref %3d\n",\r
+ link->index, link->pfn, link->ref.used);\r
+ }\r
+ printk("used :\n");\r
+ list_for_each_entry_safe(link, tmp_link, &vdm_used, status_link) {\r
+ printk(" idx %6d pfn %6d used %3d\n",\r
+ link->index, link->pfn, link->ref.used);\r
+ }\r
+ printk("post :\n");\r
+ list_for_each_entry_safe(link, tmp_link, &vdm_post, status_link) {\r
+ printk(" idx %6d pfn %6d post %3d\n",\r
+ link->index, link->pfn, link->ref.post);\r
+ }\r
\r
- // ´òÓ¡ vpu_mem_info ÖеÄÈ«²¿ session µÄ region Õ¼ÓÃÇé¿ö\r
- list_for_each_entry_safe(session, tmp_session, &vdm_proc, list_session) {\r
- printk("pid: %d\n", session->pid);\r
+ // ´òÓ¡ vpu_mem_info ÖеÄÈ«²¿ session µÄ region Õ¼ÓÃÇé¿ö\r
+ list_for_each_entry_safe(session, tmp_session, &vdm_proc, list_session) {\r
+ printk("pid: %d\n", session->pid);\r
\r
- list_for_each_entry_safe(link, tmp_link, &session->list_used, session_link) {\r
- printk("used: idx %6d pfn %6d used %3d\n",\r
- link->index, link->pfn, link->link_used);\r
- }\r
- list_for_each_entry_safe(link, tmp_link, &session->list_post, session_link) {\r
- printk("post: idx %6d pfn %6d post %3d\n",\r
- link->index, link->pfn, link->link_post);\r
- }\r
- }\r
+ list_for_each_entry_safe(pool, tmp_pool, &session->list_pool, session_link) {\r
+ printk("pool: pfn %6d target %3d current %2d\n",\r
+ pool->pfn, pool->count_current, pool->count_target);\r
+ }\r
+ list_for_each_entry_safe(link, tmp_link, &session->list_used, session_link) {\r
+ printk("used: idx %6d pfn %6d used %3d\n",\r
+ link->index, link->pfn, link->ref.used);\r
+ }\r
+ list_for_each_entry_safe(link, tmp_link, &session->list_post, session_link) {\r
+ printk("post: idx %6d pfn %6d post %3d\n",\r
+ link->index, link->pfn, link->ref.post);\r
+ }\r
+ }\r
}\r
\r
/**\r
*/\r
static vdm_link *find_used_link(vdm_session *session, int index)\r
{\r
- vdm_link *pos, *n;\r
+ vdm_link *pos, *n;\r
\r
- list_for_each_entry_safe(pos, n, &session->list_used, session_link) {\r
- if (index == pos->index) {\r
- DLOG("found index %d ptr %x\n", index, pos);\r
- return pos;\r
- }\r
- }\r
+ list_for_each_entry_safe(pos, n, &session->list_used, session_link) {\r
+ if (index == pos->index) {\r
+ DLOG("found index %d ptr %p\n", index, pos);\r
+ return pos;\r
+ }\r
+ }\r
\r
- return NULL;\r
+ return NULL;\r
}\r
\r
/**\r
*/\r
static vdm_link *find_post_link(int index)\r
{\r
- vdm_link *pos, *n;\r
+ vdm_link *pos, *n;\r
\r
- list_for_each_entry_safe(pos, n, &vdm_post, status_link) {\r
- if (index == pos->index) {\r
- return pos;\r
- }\r
- }\r
+ list_for_each_entry_safe(pos, n, &vdm_post, status_link) {\r
+ if (index == pos->index) {\r
+ return pos;\r
+ }\r
+ }\r
\r
- return NULL;\r
+ return NULL;\r
}\r
\r
/**\r
*/\r
static vdm_link *find_free_link(int index)\r
{\r
- vdm_link *pos, *n;\r
+ vdm_link *pos, *n;\r
\r
- list_for_each_entry_safe(pos, n, &vdm_free, status_link) {\r
- if (index == pos->index) {\r
- return pos;\r
- }\r
- }\r
+ list_for_each_entry_safe(pos, n, &vdm_free, status_link) {\r
+ if (index == pos->index) {\r
+ return pos;\r
+ }\r
+ }\r
\r
- return NULL;\r
+ return NULL;\r
}\r
+\r
+static vdm_pool *find_pool_by_pfn(vdm_session *session, unsigned int pfn)\r
+{\r
+ vdm_pool *pos, *n;\r
+\r
+ list_for_each_entry_safe(pos, n, &session->list_pool, session_link) {\r
+ if (pfn == pos->pfn) {\r
+ return pos;\r
+ }\r
+ }\r
+\r
+ return NULL;\r
+}\r
+\r
+static void vpu_mem_pool_add_link(vdm_pool *pool, vdm_link *link)\r
+{\r
+ link->pool = pool;\r
+ list_add_tail(&link->pool_link, &pool->list_used);\r
+ pool->count_current++;\r
+}\r
+\r
+static void vpu_mem_pool_del_link(vdm_link *link)\r
+{\r
+ vdm_pool *pool = link->pool;\r
+ link->pool = NULL;\r
+ list_del_init(&link->pool_link);\r
+ pool->count_current--;\r
+}\r
+\r
+static void link_ref_inc(vdm_link *link)\r
+{\r
+ link->ref.count++;\r
+ if (link->ref_ptr) {\r
+ *link->ref_ptr += 1;\r
+ }\r
+}\r
+\r
+static void link_ref_dec(vdm_link *link)\r
+{\r
+ link->ref.count--;\r
+ if (link->ref_ptr) {\r
+ *link->ref_ptr -= 1;\r
+ }\r
+}\r
+\r
/**\r
* insert a region into the index list for search\r
*\r
\r
list_for_each_entry_safe(tmp, n, &vdm_index, index_list) {\r
next = tmp->index;\r
- DLOG("insert index %d pfn %d last %d next %d ptr %x\n", index, region->pfn, last, next, tmp);\r
+ DLOG("insert index %d pfn %d last %d next %d ptr %p\n", index, region->pfn, last, next, tmp);\r
if ((last < index) && (index < next)) {\r
DLOG("Done\n");\r
list_add_tail(®ion->index_list, &tmp->index_list);\r
list_for_each_entry_safe(tmp, n, &vdm_free, status_link) {\r
next = tmp->index;\r
if ((last < index) && (index < next)) {\r
- DLOG("list_add_tail index %d pfn %d last %d next %d ptr %x\n", index, link->pfn, last, next, tmp);\r
+ DLOG("list_add_tail index %d pfn %d last %d next %d ptr %p\n", index, link->pfn, last, next, tmp);\r
list_add_tail(&link->status_link, &tmp->status_link);\r
return ;\r
}\r
last = next;\r
}\r
list_add_tail(&link->status_link, &tmp->status_link);\r
- DLOG("list_add index %d pfn %d last %d ptr %x\n", index, link->pfn, last, tmp);\r
+ DLOG("list_add index %d pfn %d last %d ptr %p\n", index, link->pfn, last, tmp);\r
return ;\r
}\r
\r
list_for_each_entry_safe(tmp, n, &vdm_post, status_link) {\r
next = tmp->index;\r
if ((last < index) && (index < next)) {\r
- DLOG("list_add_tail index %d pfn %d last %d next %d ptr %x\n", index, link->pfn, last, next, tmp);\r
+ DLOG("list_add_tail index %d pfn %d last %d next %d ptr %p\n", index, link->pfn, last, next, tmp);\r
list_add_tail(&link->status_link, &tmp->status_link);\r
return ;\r
}\r
}\r
\r
list_add_tail(&link->status_link, &tmp->status_link);\r
- DLOG("list_add index %d pfn %d last %d ptr %x\n", index, link->pfn, last, tmp);\r
+ DLOG("list_add index %d pfn %d last %d ptr %p\n", index, link->pfn, last, tmp);\r
return ;\r
}\r
\r
list_for_each_entry_safe(tmp, n, &vdm_used, status_link) {\r
next = tmp->index;\r
if ((last < index) && (index < next)) {\r
- DLOG("list_add_tail index %d pfn %d last %d next %d ptr %x\n", index, link->pfn, last, next, tmp);\r
+ DLOG("list_add_tail index %d pfn %d last %d next %d ptr %p\n", index, link->pfn, last, next, tmp);\r
list_add_tail(&link->status_link, &tmp->status_link);\r
return ;\r
}\r
}\r
\r
list_add_tail(&link->status_link, &tmp->status_link);\r
- DLOG("list_add index %d pfn %d last %d ptr %x\n", index, link->pfn, last, tmp);\r
+ DLOG("list_add index %d pfn %d last %d ptr %p\n", index, link->pfn, last, tmp);\r
return ;\r
}\r
\r
next = tmp->index;\r
if ((last < index) && (index < next)) {\r
list_add_tail(&link->session_link, &tmp->session_link);\r
- DLOG("list_add_tail index %d pfn %d last %d next %d ptr %x\n", index, link->pfn, last, next, tmp);\r
+ DLOG("list_add_tail index %d pfn %d last %d next %d ptr %p\n", index, link->pfn, last, next, tmp);\r
return ;\r
}\r
last = next;\r
}\r
\r
list_add_tail(&link->session_link, &tmp->session_link);\r
- DLOG("list_add index %d pfn %d last %d ptr %x\n", index, link->pfn, last, tmp);\r
+ DLOG("list_add index %d pfn %d last %d ptr %p\n", index, link->pfn, last, tmp);\r
return ;\r
}\r
\r
static void _insert_link_session_post(vdm_link *link, vdm_session *session)\r
{\r
- int index = link->index;\r
- int last = -1;\r
- int next;\r
- vdm_link *tmp, *n;\r
-\r
- if (list_empty(&session->list_post)) {\r
- DLOG("session post list is empty, list_add_tail first region\n");\r
- list_add_tail(&link->session_link, &session->list_post);\r
- return ;\r
- }\r
+ int index = link->index;\r
+ int last = -1;\r
+ int next;\r
+ vdm_link *tmp, *n;\r
+\r
+ if (list_empty(&session->list_post)) {\r
+ DLOG("session post list is empty, list_add_tail first region\n");\r
+ list_add_tail(&link->session_link, &session->list_post);\r
+ return ;\r
+ }\r
\r
- list_for_each_entry_safe(tmp, n, &session->list_post, session_link) {\r
- next = tmp->index;\r
- if ((last < index) && (index < next)) {\r
- list_add_tail(&link->session_link, &tmp->session_link);\r
- DLOG("list_add_tail index %d pfn %d last %d next %d ptr %x\n", index, link->pfn, last, next, tmp);\r
- return ;\r
- }\r
- last = next;\r
- }\r
+ list_for_each_entry_safe(tmp, n, &session->list_post, session_link) {\r
+ next = tmp->index;\r
+ if ((last < index) && (index < next)) {\r
+ list_add_tail(&link->session_link, &tmp->session_link);\r
+ DLOG("list_add_tail index %d pfn %d last %d next %d ptr %p\n", index, link->pfn, last, next, tmp);\r
+ return ;\r
+ }\r
+ last = next;\r
+ }\r
\r
- list_add_tail(&link->session_link, &tmp->session_link);\r
- DLOG("list_add index %d pfn %d last %d ptr %x\n", index, link->pfn, last, tmp);\r
- return ;\r
+ list_add_tail(&link->session_link, &tmp->session_link);\r
+ DLOG("list_add index %d pfn %d last %d ptr %p\n", index, link->pfn, last, tmp);\r
+ return ;\r
}\r
\r
static void _remove_free_region(vdm_region *region)\r
{\r
- list_del_init(®ion->index_list);\r
- kfree(region);\r
+ list_del_init(®ion->index_list);\r
+ kfree(region);\r
}\r
\r
static void _remove_free_link(vdm_link *link)\r
{\r
- list_del_init(&link->session_link);\r
- list_del_init(&link->status_link);\r
- kfree(link);\r
+ list_del_init(&link->session_link);\r
+ list_del_init(&link->status_link);\r
+ kfree(link);\r
}\r
\r
static void _merge_two_region(vdm_region *dst, vdm_region *src)\r
{\r
- vdm_link *dst_link = find_free_link(dst->index);\r
- vdm_link *src_link = find_free_link(src->index);\r
- dst->pfn += src->pfn;\r
- dst_link->pfn += src_link->pfn;\r
- _remove_free_link(src_link);\r
- _remove_free_region(src);\r
+ vdm_link *dst_link = find_free_link(dst->index);\r
+ vdm_link *src_link = find_free_link(src->index);\r
+ dst->pfn += src->pfn;\r
+ dst_link->pfn += src_link->pfn;\r
+ _remove_free_link(src_link);\r
+ _remove_free_region(src);\r
}\r
\r
static void merge_free_region_and_link(vdm_region *region)\r
{\r
- if (region->used || region->post) {\r
- printk(KERN_ALERT "try to merge unfree region!\n");\r
- return ;\r
- } else {\r
- vdm_region *neighbor;\r
- struct list_head *tmp = region->index_list.next;\r
- if (tmp != &vdm_index) {\r
- neighbor = (vdm_region *)list_entry(tmp, vdm_region, index_list);\r
- if (is_free_region(neighbor)) {\r
- DLOG("merge next\n");\r
- _merge_two_region(region, neighbor);\r
- }\r
- }\r
- tmp = region->index_list.prev;\r
- if (tmp != &vdm_index) {\r
- neighbor = (vdm_region *)list_entry(tmp, vdm_region, index_list);\r
- if (is_free_region(neighbor)) {\r
- DLOG("merge prev\n");\r
- _merge_two_region(neighbor, region);\r
- }\r
- }\r
- }\r
+ if (region->used || region->post) {\r
+ printk(KERN_ALERT "try to merge unfree region!\n");\r
+ return ;\r
+ } else {\r
+ vdm_region *neighbor;\r
+ struct list_head *tmp = region->index_list.next;\r
+ if (tmp != &vdm_index) {\r
+ neighbor = (vdm_region *)list_entry(tmp, vdm_region, index_list);\r
+ if (is_free_region(neighbor)) {\r
+ DLOG("merge next\n");\r
+ _merge_two_region(region, neighbor);\r
+ }\r
+ }\r
+ tmp = region->index_list.prev;\r
+ if (tmp != &vdm_index) {\r
+ neighbor = (vdm_region *)list_entry(tmp, vdm_region, index_list);\r
+ if (is_free_region(neighbor)) {\r
+ DLOG("merge prev\n");\r
+ _merge_two_region(neighbor, region);\r
+ }\r
+ }\r
+ }\r
}\r
\r
static void put_free_link(vdm_link *link)\r
{\r
- list_del_init(&link->session_link);\r
- list_del_init(&link->status_link);\r
- _insert_link_status_free(link);\r
+ if (link->pool) {\r
+ vpu_mem_pool_del_link(link);\r
+ }\r
+ list_del_init(&link->session_link);\r
+ list_del_init(&link->status_link);\r
+ _insert_link_status_free(link);\r
}\r
\r
static void put_used_link(vdm_link *link, vdm_session *session)\r
{\r
- list_del_init(&link->session_link);\r
- list_del_init(&link->status_link);\r
- _insert_link_status_used(link);\r
- _insert_link_session_used(link, session);\r
+ list_del_init(&link->session_link);\r
+ list_del_init(&link->status_link);\r
+ _insert_link_status_used(link);\r
+ _insert_link_session_used(link, session);\r
+ if (NULL == link->pool) {\r
+ vdm_pool *pool = find_pool_by_pfn(session, link->pfn);\r
+ if (pool) {\r
+ vpu_mem_pool_add_link(pool, link);\r
+ }\r
+ }\r
}\r
\r
static void put_post_link(vdm_link *link, vdm_session *session)\r
{\r
- list_del_init(&link->session_link);\r
- list_del_init(&link->status_link);\r
- _insert_link_status_post(link);\r
- _insert_link_session_post(link, session);\r
+ list_del_init(&link->session_link);\r
+ list_del_init(&link->status_link);\r
+ _insert_link_status_post(link);\r
+ _insert_link_session_post(link, session);\r
+ if (NULL == link->pool) {\r
+ vdm_pool *pool = find_pool_by_pfn(session, link->pfn);\r
+ if (pool) {\r
+ vpu_mem_pool_add_link(pool, link);\r
+ }\r
+ }\r
}\r
\r
/**\r
*/\r
static vdm_link *new_link_by_index(int index, int pfn)\r
{\r
- vdm_region *region = (vdm_region *)kmalloc(sizeof(vdm_region), GFP_KERNEL);\r
- vdm_link *link = (vdm_link *)kmalloc(sizeof(vdm_link ), GFP_KERNEL);\r
+ vdm_region *region = (vdm_region *)kmalloc(sizeof(vdm_region), GFP_KERNEL);\r
+ vdm_link *link = (vdm_link *)kmalloc(sizeof(vdm_link ), GFP_KERNEL);\r
\r
- if ((NULL == region) || (NULL == link)) {\r
- printk(KERN_ALERT "can not kmalloc vdm_region and vdm_link in %s", __FUNCTION__);\r
- if (region) {\r
- kfree(region);\r
- }\r
- if (link) {\r
- kfree(link);\r
- }\r
- return NULL;\r
- }\r
+ if ((NULL == region) || (NULL == link)) {\r
+ printk(KERN_ALERT "can not kmalloc vdm_region and vdm_link in %s", __FUNCTION__);\r
+ if (region) {\r
+ kfree(region);\r
+ }\r
+ if (link) {\r
+ kfree(link);\r
+ }\r
+ return NULL;\r
+ }\r
\r
- region->post = 0;\r
- region->used = 0;\r
- region->index = index;\r
- region->pfn = pfn;\r
+ region->post = 0;\r
+ region->used = 0;\r
+ region->index = index;\r
+ region->pfn = pfn;\r
\r
- INIT_LIST_HEAD(®ion->index_list);\r
+ INIT_LIST_HEAD(®ion->index_list);\r
\r
- link->link_post = 0;\r
- link->link_used = 0;\r
- link->region = region;\r
- link->index = region->index;\r
- link->pfn = region->pfn;\r
- INIT_LIST_HEAD(&link->session_link);\r
- INIT_LIST_HEAD(&link->status_link);\r
+ link->ref.count = 0;\r
+ link->ref_ptr = NULL;\r
+ link->region = region;\r
+ link->index = region->index;\r
+ link->pfn = region->pfn;\r
+ INIT_LIST_HEAD(&link->session_link);\r
+ INIT_LIST_HEAD(&link->status_link);\r
+ INIT_LIST_HEAD(&link->pool_link);\r
+ link->pool = NULL;\r
\r
- return link;\r
+ return link;\r
}\r
\r
/**\r
*/\r
static vdm_link *new_link_by_region(vdm_region *region)\r
{\r
- vdm_link *link = (vdm_link *)kmalloc(sizeof(vdm_link), GFP_KERNEL);\r
- if (NULL == link) {\r
- printk(KERN_ALERT "can not kmalloc vdm_region and vdm_link in %s", __FUNCTION__);\r
- return NULL;\r
- }\r
-\r
- link->link_post = 0;\r
- link->link_used = 0;\r
- link->region = region;\r
- link->index = region->index;\r
- link->pfn = region->pfn;\r
- INIT_LIST_HEAD(&link->session_link);\r
- INIT_LIST_HEAD(&link->status_link);\r
+ vdm_link *link = (vdm_link *)kmalloc(sizeof(vdm_link), GFP_KERNEL);\r
+ if (NULL == link) {\r
+ printk(KERN_ALERT "can not kmalloc vdm_region and vdm_link in %s", __FUNCTION__);\r
+ return NULL;\r
+ }\r
\r
- return link;\r
+ link->ref.count = 0;\r
+ link->ref_ptr = NULL;\r
+ link->region = region;\r
+ link->index = region->index;\r
+ link->pfn = region->pfn;\r
+ INIT_LIST_HEAD(&link->session_link);\r
+ INIT_LIST_HEAD(&link->status_link);\r
+ INIT_LIST_HEAD(&link->pool_link);\r
+ link->pool = NULL;\r
+\r
+ return link;\r
}\r
\r
/**\r
*/\r
static void link_del(vdm_link *link)\r
{\r
- list_del_init(&link->session_link);\r
- list_del_init(&link->status_link);\r
- kfree(link);\r
+ if (link->pool) {\r
+ vpu_mem_pool_del_link(link);\r
+ }\r
+ list_del_init(&link->session_link);\r
+ list_del_init(&link->status_link);\r
+ if (is_free_region(link->region) && NULL == find_free_link(link->index)) {\r
+ put_free_link(link);\r
+ merge_free_region_and_link(link->region);\r
+ } else {\r
+ kfree(link);\r
+ }\r
}\r
\r
/**\r
*/\r
static vdm_link *get_used_link_from_free_link(vdm_link *link, vdm_session *session, int pfn)\r
{\r
- if (pfn > link->pfn) {\r
- return NULL;\r
- }\r
- if (pfn == link->pfn) {\r
- DLOG("pfn == link->pfn %d\n", pfn);\r
- link->link_used = 1;\r
- link->region->used = 1;\r
- put_used_link(link, session);\r
- return link;\r
- } else {\r
- vdm_link *used = new_link_by_index(link->index, pfn);\r
- if (NULL == used)\r
- return NULL;\r
-\r
- link->index += pfn;\r
- link->pfn -= pfn;\r
- link->region->index += pfn;\r
- link->region->pfn -= pfn;\r
- used->link_used = 1;\r
- used->region->used = 1;\r
-\r
- DLOG("used: index %d pfn %d ptr %x\n", used->index, used->pfn, used->region);\r
- if (_insert_region_index(used->region)) {\r
- printk(KERN_ALERT "fail to insert allocated region index %d pfn %d\n", used->index, used->pfn);\r
- link_del(used);\r
- link->index -= pfn;\r
- link->pfn += pfn;\r
- link->region->index -= pfn;\r
- link->region->pfn += pfn;\r
- _remove_free_region(used->region);\r
- _remove_free_link(used);\r
- return NULL;\r
- }\r
- put_used_link(used, session);\r
- return used;\r
- }\r
+ if (pfn > link->pfn) {\r
+ return NULL;\r
+ }\r
+ if (pfn == link->pfn) {\r
+ DLOG("pfn == link->pfn %d\n", pfn);\r
+ link->ref.used = 1;\r
+ link->region->used = 1;\r
+ link->ref_ptr = &link->region->used;\r
+ put_used_link(link, session);\r
+ return link;\r
+ } else {\r
+ vdm_link *used = new_link_by_index(link->index, pfn);\r
+ if (NULL == used)\r
+ return NULL;\r
+\r
+ link->index += pfn;\r
+ link->pfn -= pfn;\r
+ link->region->index += pfn;\r
+ link->region->pfn -= pfn;\r
+ used->ref.used = 1;\r
+ used->region->used = 1;\r
+ used->ref_ptr = &used->region->used;\r
+\r
+ DLOG("used: index %d pfn %d ptr %p\n", used->index, used->pfn, used->region);\r
+ if (_insert_region_index(used->region)) {\r
+ printk(KERN_ALERT "fail to insert allocated region index %d pfn %d\n", used->index, used->pfn);\r
+ link_del(used);\r
+ link->index -= pfn;\r
+ link->pfn += pfn;\r
+ link->region->index -= pfn;\r
+ link->region->pfn += pfn;\r
+ _remove_free_region(used->region);\r
+ _remove_free_link(used);\r
+ return NULL;\r
+ }\r
+ put_used_link(used, session);\r
+ return used;\r
+ }\r
}\r
\r
-static int vpu_mem_release(struct inode *, struct file *);\r
-static int vpu_mem_mmap(struct file *, struct vm_area_struct *);\r
-static int vpu_mem_open(struct inode *, struct file *);\r
-static long vpu_mem_ioctl(struct file *, unsigned int, unsigned long);\r
-\r
-struct file_operations vpu_mem_fops = {\r
- .open = vpu_mem_open,\r
- .mmap = vpu_mem_mmap,\r
- .unlocked_ioctl = vpu_mem_ioctl,\r
- .release = vpu_mem_release,\r
-};\r
-\r
int is_vpu_mem_file(struct file *file)\r
{\r
if (unlikely(!file || !file->f_dentry || !file->f_dentry->d_inode))\r
\r
static long vpu_mem_allocate(struct file *file, unsigned int len)\r
{\r
- vdm_link *free, *n;\r
+ vdm_link *free, *n;\r
unsigned int pfn = (len + VPU_MEM_MIN_ALLOC - 1)/VPU_MEM_MIN_ALLOC;\r
- vdm_session *session = (vdm_session *)file->private_data;\r
+ vdm_session *session = (vdm_session *)file->private_data;\r
\r
- if (!is_vpu_mem_file(file)) {\r
- printk(KERN_INFO "allocate vpu_mem session from invalid file\n");\r
- return -ENODEV;\r
- }\r
+ if (!is_vpu_mem_file(file)) {\r
+ printk(KERN_INFO "allocate vpu_mem session from invalid file\n");\r
+ return -ENODEV;\r
+ }\r
\r
- list_for_each_entry_safe(free, n, &vdm_free, status_link) {\r
- /* find match free buffer use it first */\r
- vdm_link *used = get_used_link_from_free_link(free, session, pfn);\r
- DLOG("search free buffer at index %d pfn %d for len %d\n", free->index, free->pfn, pfn);\r
- if (NULL == used) {\r
- continue;\r
- } else {\r
- DLOG("found buffer at index %d pfn %d for ptr %x\n", used->index, used->pfn, used);\r
- return used->index;\r
- }\r
- }\r
+ list_for_each_entry_safe(free, n, &vdm_free, status_link) {\r
+ /* find match free buffer use it first */\r
+ vdm_link *used = get_used_link_from_free_link(free, session, pfn);\r
+ DLOG("search free buffer at index %d pfn %d for len %d\n", free->index, free->pfn, pfn);\r
+ if (NULL == used) {\r
+ continue;\r
+ } else {\r
+ DLOG("found buffer at index %d pfn %d for ptr %p\n", used->index, used->pfn, used);\r
+ return used->index;\r
+ }\r
+ }\r
\r
if (!vpu_mem_over) {\r
- printk(KERN_INFO "vpu_mem: no space left to allocate!\n");\r
- dump_status();\r
- vpu_mem_over = 1;\r
- }\r
- return -1;\r
+ printk(KERN_INFO "vpu_mem: no space left to allocate!\n");\r
+ dump_status();\r
+ vpu_mem_over = 1;\r
+ }\r
+ return -1;\r
}\r
\r
static int vpu_mem_free(struct file *file, int index)\r
{\r
- vdm_session *session = (vdm_session *)file->private_data;\r
+ vdm_session *session = (vdm_session *)file->private_data;\r
\r
- if (!is_vpu_mem_file(file)) {\r
- printk(KERN_INFO "free vpu_mem session from invalid file.\n");\r
- return -ENODEV;\r
- }\r
+ if (!is_vpu_mem_file(file)) {\r
+ printk(KERN_INFO "free vpu_mem session from invalid file.\n");\r
+ return -ENODEV;\r
+ }\r
\r
DLOG("searching for index %d\n", index);\r
- {\r
- vdm_link *link = find_used_link(session, index);\r
- if (NULL == link) {\r
- DLOG("no link of index %d searched\n", index);\r
- return -1;\r
- }\r
- link->link_used--;\r
- link->region->used--;\r
- if (0 == link->link_used) {\r
- if (is_free_region(link->region)) {\r
- put_free_link(link);\r
- merge_free_region_and_link(link->region);\r
- } else {\r
- link_del(link);\r
- }\r
- }\r
+ {\r
+ vdm_link *link = find_used_link(session, index);\r
+ if (NULL == link) {\r
+ DLOG("no link of index %d searched\n", index);\r
+ return -1;\r
+ }\r
+ link_ref_dec(link);\r
+ if (0 == link->ref.used) {\r
+ link_del(link);\r
+ }\r
}\r
- return 0;\r
+ return 0;\r
}\r
\r
static int vpu_mem_duplicate(struct file *file, int index)\r
{\r
- vdm_session *session = (vdm_session *)file->private_data;\r
+ vdm_session *session = (vdm_session *)file->private_data;\r
/* caller should hold the write lock on vpu_mem_sem! */\r
- if (!is_vpu_mem_file(file)) {\r
- printk(KERN_INFO "duplicate vpu_mem session from invalid file.\n");\r
- return -ENODEV;\r
- }\r
+ if (!is_vpu_mem_file(file)) {\r
+ printk(KERN_INFO "duplicate vpu_mem session from invalid file.\n");\r
+ return -ENODEV;\r
+ }\r
\r
DLOG("duplicate index %d\n", index);\r
- {\r
- vdm_link *post = find_post_link(index);\r
- if (NULL == post) {\r
- vdm_link *used = find_used_link(session, index);\r
- if (NULL == used) {\r
- printk(KERN_ERR "try to duplicate unknown index %d\n", index);\r
- dump_status();\r
- return -1;\r
- }\r
- post = new_link_by_region(used->region);\r
- post->link_post = 1;\r
- post->region->post++;\r
- put_post_link(post, session);\r
- } else {\r
- DLOG("duplicate posted index %d\n", index);\r
- post->link_post++;\r
- post->region->post++;\r
- }\r
- }\r
+ {\r
+ vdm_link *post = find_post_link(index);\r
+ if (NULL == post) {\r
+ vdm_link *used = find_used_link(session, index);\r
+ if (NULL == used) {\r
+ printk(KERN_ERR "try to duplicate unknown index %d\n", index);\r
+ dump_status();\r
+ return -1;\r
+ }\r
+ post = new_link_by_region(used->region);\r
+ post->ref_ptr = &post->region->post;\r
+ link_ref_inc(post);\r
+ put_post_link(post, session);\r
+ } else {\r
+ DLOG("duplicate posted index %d\n", index);\r
+ link_ref_inc(post);\r
+ }\r
+ }\r
\r
return 0;\r
}\r
\r
static int vpu_mem_link(struct file *file, int index)\r
{\r
- vdm_session *session = (vdm_session *)file->private_data;\r
+ vdm_session *session = (vdm_session *)file->private_data;\r
\r
if (!is_vpu_mem_file(file)) {\r
- printk(KERN_INFO "link vpu_mem session from invalid file.\n");\r
- return -ENODEV;\r
+ printk(KERN_INFO "link vpu_mem session from invalid file.\n");\r
+ return -ENODEV;\r
}\r
\r
- DLOG("link index %d\n", index);\r
- {\r
- vdm_link *post = find_post_link(index);\r
- if (NULL == post) {\r
- printk(KERN_ERR "try to link unknown index %d\n", index);\r
- dump_status();\r
- return -1;\r
- } else {\r
- vdm_link *used = find_used_link(session, index);\r
- post->link_post--;\r
- post->region->post--;\r
- if (0 == post->link_post) {\r
- if (NULL == used) {\r
- post->link_used++;\r
- post->region->used++;\r
- put_used_link(post, session);\r
- } else {\r
- used->link_used++;\r
- used->region->used++;\r
- link_del(post);\r
- }\r
- } else {\r
- if (NULL == used) {\r
- used = new_link_by_region(post->region);\r
- used->link_used++;\r
- used->region->used++;\r
- put_used_link(used, session);\r
- } else {\r
- used->link_used++;\r
- used->region->used++;\r
- }\r
- }\r
- }\r
- }\r
+ DLOG("link index %d\n", index);\r
+ {\r
+ vdm_link *post = find_post_link(index);\r
+ if (NULL == post) {\r
+ printk(KERN_ERR "try to link unknown index %d\n", index);\r
+ dump_status();\r
+ return -1;\r
+ } else {\r
+ vdm_link *used = find_used_link(session, index);\r
+ link_ref_dec(post);\r
+\r
+ if (used) {\r
+ if (0 == post->ref.post) {\r
+ link_del(post);\r
+ post = NULL;\r
+ }\r
+ } else {\r
+ if (post->ref.post) {\r
+ used = new_link_by_region(post->region);\r
+ } else {\r
+ used = post;\r
+ post = NULL;\r
+ }\r
+ used->ref_ptr = &used->region->used;\r
+ put_used_link(used, session);\r
+ }\r
+ link_ref_inc(used);\r
+ }\r
+ }\r
\r
return 0;\r
}\r
\r
+static int vpu_mem_pool_add(vdm_session *session, unsigned int pfn, unsigned int count)\r
+{\r
+ vdm_link *link, *n;\r
+ vdm_pool *pool = kmalloc(sizeof(vdm_pool), GFP_KERNEL);\r
+ DLOG("vpu_mem_pool_add %p pfn %d count %d\n", pool, pfn, count);\r
+ if (NULL == pool) {\r
+ printk(KERN_ALERT "vpu_mem: unable to allocate memory for vpu_mem pool.");\r
+ return -1;\r
+ }\r
+ INIT_LIST_HEAD(&pool->session_link);\r
+ INIT_LIST_HEAD(&pool->list_used);\r
+ pool->session = session;\r
+ pool->pfn = pfn;\r
+ pool->count_target = count;\r
+ pool->count_current = 0;\r
+\r
+ list_for_each_entry_safe(link, n, &session->list_used, session_link) {\r
+ if (pfn == link->pfn && NULL == link->pool) {\r
+ vpu_mem_pool_add_link(pool, link);\r
+ }\r
+ }\r
+\r
+ list_add_tail(&pool->session_link, &session->list_pool);\r
+\r
+ return 0;\r
+}\r
+\r
+static void vpu_mem_pool_del(vdm_pool *pool)\r
+{\r
+ vdm_link *link, *n;\r
+ DLOG("vpu_mem_pool_del %p\n", pool);\r
+ list_for_each_entry_safe(link, n, &pool->list_used, pool_link) {\r
+ vpu_mem_pool_del_link(link);\r
+ }\r
+ if (pool->count_current) {\r
+ printk(KERN_ALERT "vpu_mem pool deleted by still %d link left.\n", pool->count_current);\r
+ }\r
+ list_del_init(&pool->session_link);\r
+ pool->session = NULL;\r
+ kfree(pool);\r
+ return ;\r
+}\r
+\r
+static int vpu_mem_pool_set(struct file *file, unsigned int pfn, unsigned int count)\r
+{\r
+ int ret = 0;\r
+ vdm_session *session = (vdm_session *)file->private_data;\r
+ vdm_pool *pool = find_pool_by_pfn(session, pfn);\r
+ if (NULL == pool) {\r
+ // no pool build pool first\r
+ ret = vpu_mem_pool_add(session, pfn, count);\r
+ } else {\r
+ pool->count_target += count;\r
+ }\r
+ return ret;\r
+}\r
+\r
+static int vpu_mem_pool_unset(struct file *file, unsigned int pfn, unsigned int count)\r
+{\r
+ int ret = 0;\r
+ vdm_session *session = (vdm_session *)file->private_data;\r
+ vdm_pool *pool = find_pool_by_pfn(session, pfn);\r
+ if (pool) {\r
+ pool->count_target -= count;\r
+ if (pool->count_target <= 0) {\r
+ if (pool->count_target) {\r
+ printk(KERN_ALERT "vpu_mem pool unpaired set and unset with %d differ.", pool->count_target);\r
+ }\r
+ vpu_mem_pool_del(pool);\r
+ }\r
+ }\r
+ return ret;\r
+}\r
+\r
+static int vpu_mem_pool_check(struct file *file, unsigned int pfn)\r
+{\r
+ int ret = 0;\r
+ vdm_session *session = (vdm_session *)file->private_data;\r
+ vdm_pool *pool = find_pool_by_pfn(session, pfn);\r
+ if (pool) {\r
+ if (pool->count_current >= pool->count_target) {\r
+ ret = 1;\r
+ }\r
+ DLOG("vpu_mem_pool_check pfn %u current %d target %d ret %d\n", pfn, pool->count_current, pool->count_target, ret);\r
+ }\r
+ return ret;\r
+}\r
+\r
void vpu_mem_cache_opt(struct file *file, long index, unsigned int cmd)\r
{\r
vdm_session *session = (vdm_session *)file->private_data;\r
return;\r
\r
down_read(&vdm_rwsem);\r
- do {\r
- vdm_link *link = find_used_link(session, index);\r
- if (NULL == link) {\r
- pr_err("vpu_mem_cache_opt on non-exsist index %ld\n", index);\r
- break;\r
- }\r
- start = vpu_mem.vbase + index * VPU_MEM_MIN_ALLOC;\r
- end = start + link->pfn * VPU_MEM_MIN_ALLOC;;\r
- switch (cmd) {\r
- case VPU_MEM_CACHE_FLUSH : {\r
- dmac_flush_range(start, end);\r
- break;\r
- }\r
- case VPU_MEM_CACHE_CLEAN : {\r
- dmac_clean_range(start, end);\r
- break;\r
- }\r
- case VPU_MEM_CACHE_INVALID : {\r
- dmac_inv_range(start, end);\r
- break;\r
- }\r
- default :\r
- break;\r
- }\r
- } while (0);\r
- up_read(&vdm_rwsem);\r
+ do {\r
+ vdm_link *link = find_used_link(session, index);\r
+ if (NULL == link) {\r
+ pr_err("vpu_mem_cache_opt on non-exsist index %ld\n", index);\r
+ break;\r
+ }\r
+ start = vpu_mem.vbase + index * VPU_MEM_MIN_ALLOC;\r
+ end = start + link->pfn * VPU_MEM_MIN_ALLOC;;\r
+ switch (cmd) {\r
+ case VPU_MEM_CACHE_FLUSH : {\r
+ dmac_flush_range(start, end);\r
+ break;\r
+ }\r
+ case VPU_MEM_CACHE_CLEAN : {\r
+ dmac_clean_range(start, end);\r
+ break;\r
+ }\r
+ case VPU_MEM_CACHE_INVALID : {\r
+ dmac_inv_range(start, end);\r
+ break;\r
+ }\r
+ default :\r
+ break;\r
+ }\r
+ } while (0);\r
+ up_read(&vdm_rwsem);\r
}\r
\r
static pgprot_t vpu_mem_phys_mem_access_prot(struct file *file, pgprot_t vma_prot)\r
\r
static int vpu_mem_open(struct inode *inode, struct file *file)\r
{\r
- vdm_session *session;\r
- int ret = 0;\r
-\r
- DLOG("current %u file %p(%d)\n", current->pid, file, (int)file_count(file));\r
- /* setup file->private_data to indicate its unmapped */\r
- /* you can only open a vpu_mem device one time */\r
- if (file->private_data != NULL && file->private_data != &vpu_mem.dev)\r
- return -1;\r
- session = kmalloc(sizeof(vdm_session), GFP_KERNEL);\r
- if (!session) {\r
- printk(KERN_ALERT "vpu_mem: unable to allocate memory for vpu_mem metadata.");\r
- return -1;\r
- }\r
- session->pid = current->pid;\r
- INIT_LIST_HEAD(&session->list_post);\r
- INIT_LIST_HEAD(&session->list_used);\r
+ vdm_session *session;\r
+ int ret = 0;\r
\r
- file->private_data = session;\r
+ DLOG("current %u file %p(%d)\n", current->pid, file, (int)file_count(file));\r
+ /* setup file->private_data to indicate its unmapped */\r
+ /* you can only open a vpu_mem device one time */\r
+ if (file->private_data != NULL && file->private_data != &vpu_mem.dev)\r
+ return -1;\r
+ session = kmalloc(sizeof(vdm_session), GFP_KERNEL);\r
+ if (!session) {\r
+ printk(KERN_ALERT "vpu_mem: unable to allocate memory for vpu_mem metadata.");\r
+ return -1;\r
+ }\r
+ session->pid = current->pid;\r
+ INIT_LIST_HEAD(&session->list_post);\r
+ INIT_LIST_HEAD(&session->list_used);\r
+ INIT_LIST_HEAD(&session->list_pool);\r
\r
- down_write(&vdm_rwsem);\r
- list_add_tail(&session->list_session, &vdm_proc);\r
- up_write(&vdm_rwsem);\r
- return ret;\r
+ file->private_data = session;\r
+\r
+ down_write(&vdm_rwsem);\r
+ list_add_tail(&session->list_session, &vdm_proc);\r
+ up_write(&vdm_rwsem);\r
+ return ret;\r
}\r
\r
static int vpu_mem_mmap(struct file *file, struct vm_area_struct *vma)\r
{\r
- vdm_session *session;\r
+ vdm_session *session;\r
unsigned long vma_size = vma->vm_end - vma->vm_start;\r
int ret = 0;\r
\r
\r
session = (vdm_session *)file->private_data;\r
\r
- /* assert: vma_size must be the total size of the vpu_mem */\r
+ /* assert: vma_size must be the total size of the vpu_mem */\r
if (vpu_mem.size != vma_size) {\r
printk(KERN_WARNING "vpu_mem: mmap size [%lu] does not match"\r
"size of backing region [%lu].\n", vma_size, vpu_mem.size);\r
{\r
vdm_session *session = (vdm_session *)file->private_data;\r
\r
- down_write(&vdm_rwsem);\r
- {\r
- vdm_link *link, *tmp_link;\r
- //unsigned long flags = current->flags;\r
- //printk("current->flags: %lx\n", flags);\r
- list_del(&session->list_session);\r
- file->private_data = NULL;\r
-\r
- list_for_each_entry_safe(link, tmp_link, &session->list_post, session_link) {\r
- do {\r
- link->link_post--;\r
- link->region->post--;\r
- } while (link->link_post);\r
- if (find_free_link(link->index)) {\r
- link_del(link);\r
- } else {\r
- put_free_link(link);\r
- }\r
- if (is_free_region(link->region)) {\r
- merge_free_region_and_link(link->region);\r
- }\r
- }\r
- list_for_each_entry_safe(link, tmp_link, &session->list_used, session_link) {\r
- do {\r
- link->link_used--;\r
- link->region->used--;\r
- } while (link->link_used);\r
- if (find_free_link(link->index)) {\r
- link_del(link);\r
- } else {\r
- put_free_link(link);\r
- }\r
- if (is_free_region(link->region)) {\r
- merge_free_region_and_link(link->region);\r
- }\r
- }\r
- }\r
- up_write(&vdm_rwsem);\r
- kfree(session);\r
+ down_write(&vdm_rwsem);\r
+ {\r
+ vdm_link *link, *tmp_link;\r
+ vdm_pool *pool, *tmp_pool;\r
+ //unsigned long flags = current->flags;\r
+ //printk("current->flags: %lx\n", flags);\r
+ list_del(&session->list_session);\r
+ file->private_data = NULL;\r
+\r
+ list_for_each_entry_safe(pool, tmp_pool, &session->list_pool, session_link) {\r
+ vpu_mem_pool_del(pool);\r
+ }\r
\r
- return 0;\r
+ list_for_each_entry_safe(link, tmp_link, &session->list_post, session_link) {\r
+ do {\r
+ link_ref_dec(link);\r
+ } while (link->ref.post);\r
+ link_del(link);\r
+ }\r
+ list_for_each_entry_safe(link, tmp_link, &session->list_used, session_link) {\r
+ do {\r
+ link_ref_dec(link);\r
+ } while (link->ref.used);\r
+ link_del(link);\r
+ }\r
+ }\r
+ up_write(&vdm_rwsem);\r
+ kfree(session);\r
+\r
+ return 0;\r
}\r
\r
static long vpu_mem_ioctl(struct file *file, unsigned int cmd, unsigned long arg)\r
{\r
- long index, ret = 0;\r
+ long index, ret = 0;\r
\r
switch (cmd) {\r
- case VPU_MEM_GET_PHYS:\r
+ case VPU_MEM_GET_PHYS: {\r
DLOG("get_phys\n");\r
printk(KERN_INFO "vpu_mem: request for physical address of vpu_mem region "\r
"from process %d.\n", current->pid);\r
if (copy_to_user((void __user *)arg, &vpu_mem.base, sizeof(vpu_mem.base)))\r
- return -EFAULT;\r
- break;\r
- case VPU_MEM_GET_TOTAL_SIZE:\r
+ return -EFAULT;\r
+ } break;\r
+ case VPU_MEM_GET_TOTAL_SIZE: {\r
DLOG("get total size\n");\r
if (copy_to_user((void __user *)arg, &vpu_mem.size, sizeof(vpu_mem.size)))\r
return -EFAULT;\r
- break;\r
- case VPU_MEM_ALLOCATE:\r
+ } break;\r
+ case VPU_MEM_ALLOCATE: {\r
+ unsigned int size;\r
DLOG("allocate\n");\r
- {\r
- unsigned int size;\r
- if (copy_from_user(&size, (void __user *)arg, sizeof(size)))\r
- return -EFAULT;\r
- down_write(&vdm_rwsem);\r
- ret = vpu_mem_allocate(file, size);\r
- up_write(&vdm_rwsem);\r
- DLOG("allocate at index %ld\n", ret);\r
- break;\r
- }\r
- case VPU_MEM_FREE:\r
- DLOG("mem free\n");\r
- {\r
- if (copy_from_user(&index, (void __user *)arg, sizeof(index)))\r
- return -EFAULT;\r
- if (index >= vpu_mem.size)\r
- return -EACCES;\r
- down_write(&vdm_rwsem);\r
- ret = vpu_mem_free(file, index);\r
- up_write(&vdm_rwsem);\r
- break;\r
- }\r
+ if (copy_from_user(&size, (void __user *)arg, sizeof(size)))\r
+ return -EFAULT;\r
+ down_write(&vdm_rwsem);\r
+ ret = vpu_mem_allocate(file, size);\r
+ up_write(&vdm_rwsem);\r
+ DLOG("allocate at index %ld\n", ret);\r
+ } break;\r
+ case VPU_MEM_FREE: {\r
+ DLOG("mem free\n");\r
+ if (copy_from_user(&index, (void __user *)arg, sizeof(index)))\r
+ return -EFAULT;\r
+ if (index >= vpu_mem.size)\r
+ return -EACCES;\r
+ down_write(&vdm_rwsem);\r
+ ret = vpu_mem_free(file, index);\r
+ up_write(&vdm_rwsem);\r
+ } break;\r
+\r
case VPU_MEM_CACHE_FLUSH:\r
- case VPU_MEM_CACHE_CLEAN:\r
- case VPU_MEM_CACHE_INVALID:\r
- DLOG("flush\n");\r
- {\r
- if (copy_from_user(&index, (void __user *)arg, sizeof(index)))\r
- return -EFAULT;\r
- if (index < 0)\r
- return -EINVAL;\r
- vpu_mem_cache_opt(file, index, cmd);\r
- break;\r
- }\r
- case VPU_MEM_DUPLICATE:\r
- DLOG("duplicate\n");\r
- {\r
- if (copy_from_user(&index, (void __user *)arg, sizeof(index)))\r
- return -EFAULT;\r
- down_write(&vdm_rwsem);\r
- ret = vpu_mem_duplicate(file, index);\r
- up_write(&vdm_rwsem);\r
- break;\r
- }\r
- case VPU_MEM_LINK:\r
- DLOG("link\n");\r
- {\r
- if (copy_from_user(&index, (void __user *)arg, sizeof(index)))\r
- return -EFAULT;\r
- down_write(&vdm_rwsem);\r
- ret = vpu_mem_link(file, index);\r
- up_write(&vdm_rwsem);\r
- break;\r
- }\r
+ case VPU_MEM_CACHE_CLEAN:\r
+ case VPU_MEM_CACHE_INVALID: {\r
+ DLOG("flush\n");\r
+ if (copy_from_user(&index, (void __user *)arg, sizeof(index)))\r
+ return -EFAULT;\r
+ if (index < 0)\r
+ return -EINVAL;\r
+ vpu_mem_cache_opt(file, index, cmd);\r
+ } break;\r
+ case VPU_MEM_DUPLICATE: {\r
+ DLOG("duplicate\n");\r
+ if (copy_from_user(&index, (void __user *)arg, sizeof(index)))\r
+ return -EFAULT;\r
+ down_write(&vdm_rwsem);\r
+ ret = vpu_mem_duplicate(file, index);\r
+ up_write(&vdm_rwsem);\r
+ } break;\r
+\r
+ case VPU_MEM_LINK: {\r
+ DLOG("link\n");\r
+ if (copy_from_user(&index, (void __user *)arg, sizeof(index)))\r
+ return -EFAULT;\r
+ down_write(&vdm_rwsem);\r
+ ret = vpu_mem_link(file, index);\r
+ up_write(&vdm_rwsem);\r
+ } break;\r
+\r
+ case VPU_MEM_POOL_SET: {\r
+ struct vpu_mem_pool_config config;\r
+ DLOG("pool set\n");\r
+ if (copy_from_user(&config, (void __user *)arg, sizeof(config)))\r
+ return -EFAULT;\r
+ config.size = (config.size + VPU_MEM_MIN_ALLOC - 1)/VPU_MEM_MIN_ALLOC;\r
+ down_write(&vdm_rwsem);\r
+ ret = vpu_mem_pool_set(file, config.size, config.count);\r
+ up_write(&vdm_rwsem);\r
+ } break;\r
+\r
+ case VPU_MEM_POOL_UNSET: {\r
+ struct vpu_mem_pool_config config;\r
+ DLOG("pool unset\n");\r
+ if (copy_from_user(&config, (void __user *)arg, sizeof(config)))\r
+ return -EFAULT;\r
+ config.size = (config.size + VPU_MEM_MIN_ALLOC - 1)/VPU_MEM_MIN_ALLOC;\r
+ down_write(&vdm_rwsem);\r
+ ret = vpu_mem_pool_unset(file, config.size, config.count);\r
+ up_write(&vdm_rwsem);\r
+ } break;\r
+\r
+ case VPU_MEM_POOL_CHECK: {\r
+ int pfn;\r
+ if (copy_from_user(&pfn, (void __user *)arg, sizeof(int)))\r
+ return -EFAULT;\r
+ pfn = (pfn + VPU_MEM_MIN_ALLOC - 1)/VPU_MEM_MIN_ALLOC;\r
+ DLOG("pool check\n");\r
+ down_read(&vdm_rwsem);\r
+ ret = vpu_mem_pool_check(file, pfn);\r
+ up_read(&vdm_rwsem);\r
+ } break;\r
+\r
default:\r
return -EINVAL;\r
}\r
return ret;\r
}\r
\r
+struct file_operations vpu_mem_fops = {\r
+ .open = vpu_mem_open,\r
+ .mmap = vpu_mem_mmap,\r
+ .unlocked_ioctl = vpu_mem_ioctl,\r
+ .release = vpu_mem_release,\r
+};\r
+\r
#if VPU_MEM_DEBUG\r
static ssize_t debug_open(struct inode *inode, struct file *file)\r
{\r
n = scnprintf(buffer, debug_bufmax,\r
"pid #: mapped regions (offset, len, used, post) ...\n");\r
down_read(&vdm_rwsem);\r
- list_for_each_entry_safe(region, tmp_region, &vdm_index, index_list) {\r
- n += scnprintf(buffer + n, debug_bufmax - n,\r
- "(%d,%d,%d,%d) ",\r
- region->index, region->pfn, region->used, region->post);\r
+ list_for_each_entry_safe(region, tmp_region, &vdm_index, index_list) {\r
+ n += scnprintf(buffer + n, debug_bufmax - n,\r
+ "(%d,%d,%d,%d) ",\r
+ region->index, region->pfn, region->used, region->post);\r
}\r
up_read(&vdm_rwsem);\r
n++;\r
down_read(&vdm_rwsem);\r
{\r
vdm_link *link, *tmp_link;\r
+ vdm_pool *pool, *tmp_pool;\r
vdm_region *region, *tmp_region;\r
vdm_session *session, *tmp_session;\r
// °´ index ´òÓ¡È«²¿ region\r
seq_printf(s, "free :\n");\r
list_for_each_entry_safe(link, tmp_link, &vdm_free, status_link) {\r
seq_printf(s, " idx %6d pfn %6d used %3d post %3d\n",\r
- link->index, link->pfn, link->link_used, link->link_post);\r
+ link->index, link->pfn, link->ref.used, link->ref.post);\r
}\r
}\r
if (list_empty(&vdm_used)) {\r
seq_printf(s, "used :\n");\r
list_for_each_entry_safe(link, tmp_link, &vdm_used, status_link) {\r
seq_printf(s, " idx %6d pfn %6d used %3d post %3d\n",\r
- link->index, link->pfn, link->link_used, link->link_post);\r
+ link->index, link->pfn, link->ref.used, link->ref.post);\r
}\r
}\r
if (list_empty(&vdm_post)) {\r
seq_printf(s, "post :\n");\r
list_for_each_entry_safe(link, tmp_link, &vdm_post, status_link) {\r
seq_printf(s, " idx %6d pfn %6d used %3d post %3d\n",\r
- link->index, link->pfn, link->link_used, link->link_post);\r
+ link->index, link->pfn, link->ref.used, link->ref.post);\r
}\r
}\r
\r
// ´òÓ¡ vpu_mem_info ÖеÄÈ«²¿ session µÄ region Õ¼ÓÃÇé¿ö\r
list_for_each_entry_safe(session, tmp_session, &vdm_proc, list_session) {\r
seq_printf(s, "\npid: %d\n", session->pid);\r
+ if (list_empty(&session->list_pool)) {\r
+ seq_printf(s, "pool : empty\n");\r
+ } else {\r
+ seq_printf(s, "pool :\n");\r
+ list_for_each_entry_safe(pool, tmp_pool, &session->list_pool, session_link) {\r
+ seq_printf(s, " pfn %6d target %3d current %2d\n",\r
+ pool->pfn, pool->count_target, pool->count_current);\r
+ }\r
+ }\r
if (list_empty(&session->list_used)) {\r
seq_printf(s, "used : empty\n");\r
} else {\r
seq_printf(s, "used :\n");\r
list_for_each_entry_safe(link, tmp_link, &session->list_used, session_link) {\r
seq_printf(s, " idx %6d pfn %6d used %3d\n",\r
- link->index, link->pfn, link->link_used);\r
+ link->index, link->pfn, link->ref.used);\r
}\r
}\r
if (list_empty(&session->list_post)) {\r
seq_printf(s, "post :\n");\r
list_for_each_entry_safe(link, tmp_link, &session->list_post, session_link) {\r
seq_printf(s, " idx %6d pfn %6d post %3d\n",\r
- link->index, link->pfn, link->link_post);\r
+ link->index, link->pfn, link->ref.post);\r
}\r
}\r
}\r
\r
} \r
\r
-static CLASS_ATTR(name, 0777, cmmb_class_show_name, NULL);\r
+static CLASS_ATTR(name, 0660, cmmb_class_show_name, NULL);
\r
static int __init init_cmmbclass(void)\r
{\r
/* if the client doesn't support this heap type */
if (!((1 << heap->type) & client->heap_mask))
continue;
-
/* if the caller didn't specify this heap type */
if (!((1 << heap->id) & flags))
continue;
static long ion_share_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
{
struct ion_buffer *buffer = filp->private_data;
-
+
switch (cmd) {
case PMEM_GET_PHYS:
{
if (copy_from_user(®ion, (void __user *)arg,
sizeof(struct pmem_region)))
return -EFAULT;
+ if(!(region.offset & 0xf0000000))
+ region.offset = buffer->vm_start;
+
dmac_flush_range((void *)region.offset, (void *)(region.offset + region.len));
break;
if (parent->f_flags & O_DSYNC)
file->f_flags |= O_DSYNC;
-
+
ion_buffer_get(handle->buffer);
fd_install(fd, file);
case ION_IOC_ALLOC:
{
struct ion_allocation_data data;
+
if (copy_from_user(&data, (void __user *)arg, sizeof(data)))
return -EFAULT;
-
data.handle = ion_alloc(client, data.len, data.align,
data.flags);
if (IS_ERR_OR_NULL(data.handle)) {
printk("%s: alloc 0x%x bytes failed\n", __func__, data.len);
- return -ENOMEM;
- }
+ return -ENOMEM;
+ }
if (copy_to_user((void __user *)arg, &data, sizeof(data)))
return -EFAULT;
break;
return err;
}
- err = data.handle->buffer->heap->ops->cache_op(buffer->heap, buffer,
+ err = data.handle->buffer->heap->ops->cache_op(buffer->heap, buffer,
data.virt, data.size, cmd);
mutex_unlock(&client->lock);
if(err < 0)
return err;
break;
}
+ case ION_GET_CLIENT:
+ {
+ struct ion_handle *handle;
+ struct ion_client_data data;
+ struct rb_node *n;
+
+ if (copy_from_user(&data, (void __user *)arg,
+ sizeof(struct ion_client_data)))
+ return -EFAULT;
+
+ mutex_lock(&client->lock);
+ switch (data.type) {
+ case ION_TYPE_GET_TOTAL_SIZE:
+ data.total_size = 0;
+ for (n = rb_first(&client->handles); n; n = rb_next(n)) {
+ handle = rb_entry(n, struct ion_handle, node);
+ data.total_size += handle->buffer->size;
+ }
+ break;
+ case ION_TYPE_SIZE_GET_COUNT:
+ data.count = 0;
+ for (n = rb_first(&client->handles); n; n = rb_next(n)) {
+ handle = rb_entry(n, struct ion_handle, node);
+ if(handle->buffer->size == data.size)
+ data.count++;
+ }
+ break;
+ }
+ mutex_unlock(&client->lock);
+ if (copy_to_user((void __user *)arg, &data,
+ sizeof(struct ion_client_data)))
+ return -EFAULT;
+ break;
+ }
default:
return -ENOTTY;
}
.llseek = seq_lseek,
.release = single_release,
};
+
struct ion_device *ion_device_create(long (*custom_ioctl)
(struct ion_client *client,
unsigned int cmd,
* GNU General Public License for more details.
*
*/
+#include <linux/spinlock.h>
- #include <linux/spinlock.h>
#include <linux/err.h>
#include <linux/genalloc.h>
#include <linux/io.h>
#include <linux/vmalloc.h>
#include <linux/iommu.h>
#include <linux/seq_file.h>
-#include <asm/mach/map.h>
#include <linux/dma-mapping.h>
#include <asm/cacheflush.h>
-
#include "ion_priv.h"
-#define ION_CACHED
+#include <asm/mach/map.h>
+
#define RESERVED_SIZE(total) ((total)/10)
+
struct ion_carveout_heap {
struct ion_heap heap;
struct gen_pool *pool;
ion_phys_addr_t base;
-
unsigned long allocated_bytes;
unsigned long vpu_allocated_bytes;
unsigned long max_allocated;
unsigned long bit_nr;
unsigned long *bits;
};
+
ion_phys_addr_t ion_carveout_allocate(struct ion_heap *heap,
unsigned long size,
unsigned long align,
{
struct ion_carveout_heap *carveout_heap =
container_of(heap, struct ion_carveout_heap, heap);
- unsigned long offset;
+ unsigned long offset;
unsigned long free_size = carveout_heap->total_size - carveout_heap->allocated_bytes;
- if((flags & (1<<ION_VPU_ID)) &&
- (free_size < RESERVED_SIZE(carveout_heap->total_size))){
- printk("%s: heap %s has not enough memory for vpu: vpu allocated(%luM)\n",
+ if ((flags & (1<<ION_VPU_ID)) &&
+ (free_size < RESERVED_SIZE(carveout_heap->total_size))) {
+ printk("%s: heap %s has not enough memory for vpu: vpu allocated(%luM)\n",
__func__, heap->name, carveout_heap->vpu_allocated_bytes/SZ_1M);
return ION_CARVEOUT_ALLOCATE_FAIL;
}
" the allocation of size %lu pages still failed."
" Memory is probably fragmented.\n",
__func__, heap->name,
- (carveout_heap->total_size - carveout_heap->allocated_bytes)/SZ_1K,
+ (carveout_heap->total_size - carveout_heap->allocated_bytes)/SZ_1K,
size/SZ_1K);
else
printk("%s: heap %s has not enough memory(%luK)"
"the alloction of size is %luK.\n",
__func__, heap->name,
- (carveout_heap->total_size - carveout_heap->allocated_bytes)/SZ_1K,
+ (carveout_heap->total_size - carveout_heap->allocated_bytes)/SZ_1K,
size/SZ_1K);
return ION_CARVEOUT_ALLOCATE_FAIL;
}
if((offset + size - carveout_heap->base) > carveout_heap->max_allocated)
carveout_heap->max_allocated = offset + size - carveout_heap->base;
- bitmap_set(carveout_heap->bits,
+ bitmap_set(carveout_heap->bits,
(offset - carveout_heap->base)/PAGE_SIZE , size/PAGE_SIZE);
return offset;
}
if(flags & (1<<ION_VPU_ID))
carveout_heap->vpu_allocated_bytes -= size;
carveout_heap->allocated_bytes -= size;
- bitmap_clear(carveout_heap->bits,
+ bitmap_clear(carveout_heap->bits,
(addr - carveout_heap->base)/PAGE_SIZE, size/PAGE_SIZE);
}
vma->vm_end - vma->vm_start,
pgprot_noncached(vma->vm_page_prot));
+ buffer->vm_start = vma->vm_start;
return err;
}
+
int ion_carveout_cache_op(struct ion_heap *heap, struct ion_buffer *buffer,
void *virt, size_t size, unsigned int cmd)
{
switch(cmd) {
case ION_CACHE_FLUSH:
dmac_flush_range((void *)start, (void *)end);
- outer_flush_range(buffer->priv_phys,buffer->priv_phys + size);
+ outer_flush_range(buffer->priv_phys,buffer->priv_phys + size);
break;
case ION_CACHE_CLEAN:
- /* When cleaning, always clean the innermost (L1) cache first
+ /* When cleaning, always clean the innermost (L1) cache first
* and then clean the outer cache(s).
*/
dmac_clean_range((void *)start, (void *)end);
- outer_clean_range(buffer->priv_phys,buffer->priv_phys + size);
+ outer_clean_range(buffer->priv_phys,buffer->priv_phys + size);
break;
case ION_CACHE_INVALID:
- /* When invalidating, always invalidate the outermost cache first
+ /* When invalidating, always invalidate the outermost cache first
* and the L1 cache last.
*/
- outer_inv_range(buffer->priv_phys,buffer->priv_phys + size);
+ outer_inv_range(buffer->priv_phys,buffer->priv_phys + size);
dmac_inv_range((void *)start, (void *)end);
break;
default:
container_of(heap, struct ion_carveout_heap, heap);
for(i = carveout_heap->bit_nr/8 - 1; i>= 0; i--){
- seq_printf(s, "%.3uM> Bits[%.3d - %.3d]: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
+ seq_printf(s, "%.3uM> Bits[%.3d - %.3d]: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
i+1, i*8 + 7, i*8,
carveout_heap->bits[i*8 + 7],
carveout_heap->bits[i*8 + 6],
carveout_heap->allocated_bytes/SZ_1M);
seq_printf(s, "max_allocated: %luM\n",
carveout_heap->max_allocated/SZ_1M);
- seq_printf(s, "Heap size: %luM, heap base: 0x%lx\n",
+ seq_printf(s, "Heap size: %luM, heap base: 0x%lx\n",
carveout_heap->total_size/SZ_1M, carveout_heap->base);
return 0;
}
+
static struct ion_heap_ops carveout_heap_ops = {
.allocate = ion_carveout_heap_allocate,
.free = ion_carveout_heap_free,
carveout_heap->max_allocated = 0;
carveout_heap->total_size = heap_data->size;
carveout_heap->bit_nr = heap_data->size/(PAGE_SIZE * sizeof(unsigned long) * 8);
- carveout_heap->bits =
+ carveout_heap->bits =
(unsigned long *)kzalloc(carveout_heap->bit_nr * sizeof(unsigned long), GFP_KERNEL);
return &carveout_heap->heap;
void *vaddr;
int dmap_cnt;
struct scatterlist *sglist;
-
+ unsigned long vm_start;
int marked;
};
if((lsr & I2C_LSR_RCV_NAK) && !(msg->flags & I2C_M_IGNORE_NAK))
{
dev_info(i2c->dev, "addr: 0x%x receive no ack\n", msg->addr);
- return -EINVAL;
+ return -EAGAIN;
}
if(start && (msg->flags & I2C_M_TEN))
ret = rk29_send_2nd_addr(i2c, msg, start);
i2c->adap.algo = &rk29_i2c_algorithm;
i2c->adap.class = I2C_CLASS_HWMON;
i2c->adap.nr = pdata->bus_num;
+ i2c->adap.retries = 3;
+ i2c->adap.timeout = msecs_to_jiffies(500);
+
spin_lock_init(&i2c->cmd_lock);
i2c->dev = &pdev->dev;
return count;
}
-static DEVICE_ATTR(range, S_IRUGO|S_IWUSR|S_IWGRP|S_IWOTH,
+static DEVICE_ATTR(range, S_IRUGO,
bma150_range_show, bma150_range_store);
-static DEVICE_ATTR(bandwidth, S_IRUGO|S_IWUSR|S_IWGRP|S_IWOTH,
+static DEVICE_ATTR(bandwidth, S_IRUGO,
bma150_bandwidth_show, bma150_bandwidth_store);
-static DEVICE_ATTR(mode, S_IRUGO|S_IWUSR|S_IWGRP|S_IWOTH,
+static DEVICE_ATTR(mode, S_IRUGO,
bma150_mode_show, bma150_mode_store);
-static DEVICE_ATTR(value, S_IRUGO|S_IWUSR|S_IWGRP,
+static DEVICE_ATTR(value, S_IRUGO,
bma150_value_show, NULL);
-static DEVICE_ATTR(delay, S_IRUGO|S_IWUSR|S_IWGRP|S_IWOTH,
+static DEVICE_ATTR(delay, S_IRUGO,
bma150_delay_show, bma150_delay_store);
-static DEVICE_ATTR(enable, S_IRUGO|S_IWUSR|S_IWGRP|S_IWOTH,
+static DEVICE_ATTR(enable, S_IRUGO,
bma150_enable_show, bma150_enable_store);
static struct attribute *bma150_attributes[] = {
x = g_x[i];
y = g_y[i];
}
+ #ifdef CONFIG_MACH_RK29_TD8801_V2
+ if( y >=80 ) y-=80;
+ if( x >= 50 ) x-=50;
+ #endif
+
g_x[i] = x;
g_y[i] = y;
unsigned char id; //finger ID
int posx;
int posy;
+ int lastx;
+ int lasty;
unsigned char active;
unsigned char pre_active;
};
static struct point_data point[MAX_SUPPORT_POINT];
-
struct i2c_dev
{
struct list_head list;
input_mt_report_slot_state(tsdata->input, MT_TOOL_FINGER, false);
}
- if (point[i].active) {
+ if (point[i].active && (
+ abs(point[i].posx - point[i].lastx) > 2 ||
+ abs(point[i].posy - point[i].lasty) > 2
+ )) {
input_mt_slot(tsdata->input, point[i].id);
input_mt_report_slot_state(tsdata->input, MT_TOOL_FINGER, true);
input_report_abs(tsdata->input, ABS_MT_TOUCH_MAJOR, 1);
input_report_abs(tsdata->input, ABS_MT_POSITION_X, point[i].posy);
input_report_abs(tsdata->input, ABS_MT_POSITION_Y, point[i].posx);
+ point[i].lastx = point[i].posx;
+ point[i].lasty = point[i].posy;
}
DBG("%d[id = %d] = %2d active= %d pre_active = %d x = %5d y = %5d \n",
while (!tsdata->exiting) {
pixcir_ts_poscheck(tsdata);
- /*if (attb_read_val()){
+ if (attb_read_val()){
DBG("%s: >>>>>touch release\n\n",__FUNCTION__);
for (i = 0; i < MAX_SUPPORT_POINT; i++) {
point[i].pre_active = point[i].active;
input_sync(tsdata->input);
enable_irq(tsdata->client->irq);
break;
- }*/
+ }
msleep(1);
}
\r
return _count;\r
}\r
-static CLASS_ATTR(debug, 0666, dbg_mode_show, dbg_mode_store);\r
+static CLASS_ATTR(debug, 0664, dbg_mode_show, dbg_mode_store);\r
\r
static int dbg_sys_init(void)\r
{\r
bool "Digital zoom with IPP off"
endchoice
+choice
+ prompt "RK29XX camera memory "
+ depends on VIDEO_RK29
+ default VIDEO_RK29_CAMMEM_PMEM
+ ---help---
+ where camera memory which is used for preview/raw/jpeg in android camera hal is alloced
+config VIDEO_RK29_CAMMEM_PMEM
+ bool "Camera memory from pmem"
+
+config VIDEO_RK29_CAMMEM_ION
+ bool "Camera memory from ion"
+endchoice
+
config VIDEO_MX2_HOSTSUPPORT
bool
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
+
static int debug;
module_param(debug, int, S_IRUGO|S_IWUSR);
#define SENSOR_MIN_HEIGHT 480//144
#define SENSOR_MAX_WIDTH 800//1600
#define SENSOR_MAX_HEIGHT 600//1200
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 640 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 480
+#define SENSOR_INIT_WINSEQADR sensor_vga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_YUYV8_2X8
#define CONFIG_SENSOR_WhiteBalance 1
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 640;
-static s32 sensor_init_height = 480;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct sensor *sensor = to_sensor(client);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
- char value;
- int ret,pid = 0,i = 0,j=0;
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_vga;
- sensor_init_width = 640;
- sensor_init_height = 480;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret;
+
+
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
if (sensor_ioctrl(icd, Sensor_PowerDown, 0) < 0) {
mdelay(5); */ //delay 5 microseconds
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct sensor *sensor = to_sensor(client);
const struct sensor_datafmt *fmt;
- int ret = 0;
+ int ret = 0,set_w,set_h;
fmt = sensor_find_datafmt(mf->code, sensor_colour_fmts,
ARRAY_SIZE(sensor_colour_fmts));
else if (mf->width < SENSOR_MIN_WIDTH)
mf->width = SENSOR_MIN_WIDTH;
+ set_w = mf->width;
+ set_h = mf->height;
+
+ if (((set_w <= 176) && (set_h <= 144)) && sensor_qcif[0].reg!=0xff)
+ {
+ set_w = 176;
+ set_h = 144;
+ }
+ else if (((set_w <= 320) && (set_h <= 240)) && sensor_qvga[0].reg!=0xff)
+ {
+ set_w = 320;
+ set_h = 240;
+ }
+ else if (((set_w <= 352) && (set_h<= 288)) && sensor_cif[0].reg!=0xff)
+ {
+ set_w = 352;
+ set_h = 288;
+ }
+ else if (((set_w <= 640) && (set_h <= 480)) && sensor_vga[0].reg!=0xff)
+ {
+ set_w = 640;
+ set_h = 480;
+ }
+ else if (((set_w <= 800) && (set_h <= 600)) && sensor_svga[0].reg!=0xff)
+ {
+ set_w = 800;
+ set_h = 600;
+ }
+ else if (((set_w <= 1280) && (set_h <= 720)) && sensor_720p[0].reg!=0xff)
+ {
+ set_w = 1280;
+ set_h = 720;
+ }
+ else if (((set_w <= 1280) && (set_h <= 1024)) && sensor_sxga[0].reg!=0xff)
+ {
+ set_w = 1280;
+ set_h = 1024;
+ }
+ else
+ {
+ set_w = SENSOR_INIT_WIDTH;
+ set_h = SENSOR_INIT_HEIGHT;
+ }
+
+ mf->width = set_w;
+ mf->height = set_h;
mf->colorspace = fmt->colorspace;
return ret;
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ sensor->sensor_gpio_res = NULL;
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS;i++) {
+ if (sensor->sensor_io_request->gpio_res[i].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[i].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[i];
+ }
+ }
+ if (sensor->sensor_gpio_res == NULL) {
+ SENSOR_TR("%s %s obtain gpio resource failed when RK29_CAM_SUBDEV_IOREQUEST \n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
+
static int debug;
module_param(debug, int, S_IRUGO|S_IWUSR);
#define SENSOR_MIN_HEIGHT 480//144
#define SENSOR_MAX_WIDTH 640
#define SENSOR_MAX_HEIGHT 480
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 640 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 480
+#define SENSOR_INIT_WINSEQADR sensor_vga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_YUYV8_2X8
#define CONFIG_SENSOR_WhiteBalance 1
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 640;
-static s32 sensor_init_height = 480;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct sensor *sensor = to_sensor(client);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
- char value;
- int ret,pid = 0,i = 0,j=0;
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_vga;
- sensor_init_width = 640;
- sensor_init_height = 480;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret;
+
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
if (sensor_ioctrl(icd, Sensor_PowerDown, 0) < 0) {
mdelay(5); */ //delay 5 microseconds
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct sensor *sensor = to_sensor(client);
const struct sensor_datafmt *fmt;
- int ret = 0;
+ int ret = 0,set_w,set_h;
fmt = sensor_find_datafmt(mf->code, sensor_colour_fmts,
ARRAY_SIZE(sensor_colour_fmts));
else if (mf->width < SENSOR_MIN_WIDTH)
mf->width = SENSOR_MIN_WIDTH;
+ set_w = mf->width;
+ set_h = mf->height;
+
+ if (((set_w <= 176) && (set_h <= 144)) && sensor_qcif[0].reg)
+ {
+ set_w = 176;
+ set_h = 144;
+ }
+ else if (((set_w <= 320) && (set_h <= 240)) && sensor_qvga[0].reg)
+ {
+ set_w = 320;
+ set_h = 240;
+ }
+ else if (((set_w <= 352) && (set_h<= 288)) && sensor_cif[0].reg)
+ {
+ set_w = 352;
+ set_h = 288;
+ }
+ else if (((set_w <= 640) && (set_h <= 480)) && sensor_vga[0].reg)
+ {
+ set_w = 640;
+ set_h = 480;
+ }
+ else if (((set_w <= 800) && (set_h <= 600)) && sensor_svga[0].reg)
+ {
+ set_w = 800;
+ set_h = 600;
+ }
+ else if (((set_w <= 1280) && (set_h <= 1024)) && sensor_sxga[0].reg)
+ {
+ set_w = 1280;
+ set_h = 1024;
+ }
+ else
+ {
+ set_w = SENSOR_INIT_WIDTH;
+ set_h = SENSOR_INIT_HEIGHT;
+ }
+
+ mf->width = set_w;
+ mf->height = set_h;
+
mf->colorspace = fmt->colorspace;
return ret;
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ sensor->sensor_gpio_res = NULL;
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS;i++) {
+ if (sensor->sensor_io_request->gpio_res[i].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[i].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[i];
+ }
+ }
+ if (sensor->sensor_gpio_res == NULL) {
+ SENSOR_TR("%s %s obtain gpio resource failed when RK29_CAM_SUBDEV_IOREQUEST \n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
+
static int debug;
module_param(debug, int, S_IRUGO|S_IWUSR);
#define SENSOR_MIN_HEIGHT 144
#define SENSOR_MAX_WIDTH 640
#define SENSOR_MAX_HEIGHT 480
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 640 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 480
+#define SENSOR_INIT_WINSEQADR sensor_vga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_YUYV8_2X8
#define CONFIG_SENSOR_WhiteBalance 1
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
u8 val;
};
-/* init 800*600 SVGA */
+/* init SVGA preview */
static struct reginfo sensor_init_data[] =
{
/*init registers code.*/
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 640;
-static s32 sensor_init_height = 480;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
char value;
- int ret,pid = 0,i = 0,j=0;
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_vga;
- sensor_init_width = 640;
- sensor_init_height = 480;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
- SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
+ int ret;
if (sensor_ioctrl(icd, Sensor_PowerDown, 0) < 0) {
ret = -ENODEV;
goto sensor_INIT_ERR;
}
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct sensor *sensor = to_sensor(client);
const struct sensor_datafmt *fmt;
- int ret = 0;
+ int ret = 0,set_w,set_h;
fmt = sensor_find_datafmt(mf->code, sensor_colour_fmts,
ARRAY_SIZE(sensor_colour_fmts));
else if (mf->width < SENSOR_MIN_WIDTH)
mf->width = SENSOR_MIN_WIDTH;
+ set_w = mf->width;
+ set_h = mf->height;
+
+ if (((set_w <= 176) && (set_h <= 144)) && sensor_qcif[0].reg)
+ {
+ set_w = 176;
+ set_h = 144;
+ }
+ else if (((set_w <= 320) && (set_h <= 240)) && sensor_qvga[0].reg)
+ {
+ set_w = 320;
+ set_h = 240;
+ }
+ else if (((set_w <= 352) && (set_h<= 288)) && sensor_cif[0].reg)
+ {
+ set_w = 352;
+ set_h = 288;
+ }
+ else if (((set_w <= 640) && (set_h <= 480)) && sensor_vga[0].reg)
+ {
+ set_w = 640;
+ set_h = 480;
+ }
+
+ else
+ {
+ set_w = SENSOR_INIT_WIDTH;
+ set_h = SENSOR_INIT_HEIGHT;
+ }
+ mf->width = set_w;
+ mf->height = set_h;
mf->colorspace = fmt->colorspace;
return ret;
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
-
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ sensor->sensor_gpio_res = NULL;
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS;i++) {
+ if (sensor->sensor_io_request->gpio_res[i].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[i].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[i];
+ }
+ }
+ if (sensor->sensor_gpio_res == NULL) {
+ SENSOR_TR("%s %s obtain gpio resource failed when RK29_CAM_SUBDEV_IOREQUEST \n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
+
static int debug;
module_param(debug, int, S_IRUGO|S_IWUSR);
#define SENSOR_MIN_HEIGHT 144
#define SENSOR_MAX_WIDTH 640
#define SENSOR_MAX_HEIGHT 480
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 640 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 480
+#define SENSOR_INIT_WINSEQADR sensor_vga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_YUYV8_2X8
#define CONFIG_SENSOR_WhiteBalance 1
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 640;
-static s32 sensor_init_height = 480;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
char value;
- int ret,pid = 0,i = 0,j=0;
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_vga;
- sensor_init_width = 640;
- sensor_init_height = 480;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret;
if (sensor_ioctrl(icd, Sensor_PowerDown, 0) < 0) {
ret = -ENODEV;
goto sensor_INIT_ERR;
}
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ if (sensor->sensor_io_request->gpio_res[0].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[0].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[0];
+ } else if (sensor->sensor_io_request->gpio_res[1].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[1].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[1];
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
+
static int debug;
module_param(debug, int, S_IRUGO|S_IWUSR);
#define SENSOR_MIN_HEIGHT 480
#define SENSOR_MAX_WIDTH 1600
#define SENSOR_MAX_HEIGHT 1200
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 800//1024 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 600//768
+#define SENSOR_INIT_WINSEQADR sensor_svga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_UYVY8_2X8
#define CONFIG_SENSOR_WhiteBalance 1
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
u8 val;
};
-/* init 800*600 SVGA */
+/* init SVGA preview */
static struct reginfo sensor_init_data[] =
{
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 800;
-static s32 sensor_init_height = 600;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
char value;
- int ret,pid = 0,i = 0,j=0;
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_svga;
- sensor_init_width = 800;
- sensor_init_height = 600;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret,pid = 0;
+
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
if (sensor_ioctrl(icd, Sensor_PowerDown, 0) < 0) {
goto sensor_INIT_ERR;
}
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct sensor *sensor = to_sensor(client);
const struct sensor_datafmt *fmt;
- int ret = 0;
+ int ret = 0,set_w,set_h;
fmt = sensor_find_datafmt(mf->code, sensor_colour_fmts,
ARRAY_SIZE(sensor_colour_fmts));
else if (mf->width < SENSOR_MIN_WIDTH)
mf->width = SENSOR_MIN_WIDTH;
+ set_w = mf->width;
+ set_h = mf->height;
+
+ if (((set_w <= 176) && (set_h <= 144)) && sensor_qcif[0].reg)
+ {
+ set_w = 176;
+ set_h = 144;
+ }
+ else if (((set_w <= 320) && (set_h <= 240)) && sensor_qvga[0].reg)
+ {
+ set_w = 320;
+ set_h = 240;
+ }
+ else if (((set_w <= 352) && (set_h<= 288)) && sensor_cif[0].reg)
+ {
+ set_w = 352;
+ set_h = 288;
+ }
+ else if (((set_w <= 640) && (set_h <= 480)) && sensor_vga[0].reg)
+ {
+ set_w = 640;
+ set_h = 480;
+ }
+ else if (((set_w <= 800) && (set_h <= 600)) && sensor_svga[0].reg)
+ {
+ set_w = 800-32;
+ set_h = 600;
+ }
+ else if (((set_w <= 1024) && (set_h <= 768)) && sensor_xga[0].reg)
+ {
+ set_w = 1024;
+ set_h = 768;
+ }
+ else if (((set_w <= 1280) && (set_h <= 1024)) && sensor_sxga[0].reg)
+ {
+ set_w = 1280;
+ set_h = 1024;
+ }
+ else if (((set_w <= 1600) && (set_h <= 1200)) && sensor_uxga[0].reg)
+ {
+ set_w = 1600-32;
+ set_h = 1200;
+ }
+ else
+ {
+ set_w = SENSOR_INIT_WIDTH;
+ set_h = SENSOR_INIT_HEIGHT;
+ }
+ mf->width = set_w;
+ mf->height = set_h;
mf->colorspace = fmt->colorspace;
return ret;
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ sensor->sensor_gpio_res = NULL;
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS;i++) {
+ if (sensor->sensor_io_request->gpio_res[i].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[i].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[i];
+ }
+ }
+ if (sensor->sensor_gpio_res == NULL) {
+ SENSOR_TR("%s %s obtain gpio resource failed when RK29_CAM_SUBDEV_IOREQUEST \n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
+
static int debug;
module_param(debug, int, S_IRUGO|S_IWUSR);
#define SENSOR_MIN_HEIGHT 480
#define SENSOR_MAX_WIDTH 1600
#define SENSOR_MAX_HEIGHT 1200
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 640 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 480
+#define SENSOR_INIT_WINSEQADR sensor_vga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_YUYV8_2X8
#define CONFIG_SENSOR_WhiteBalance 1
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
u8 val;
};
-/* init 800*600 SVGA */
+/* init 352X288 SVGA */
static struct reginfo sensor_init_data[] =
{
{0x0101 , 0x00},
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 640;
-static s32 sensor_init_height = 480;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
char value;
- int ret,pid = 0,i = 0,j=0;
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_svga;
- sensor_init_width = 640;
- sensor_init_height = 480;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret,pid = 0;
+
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
if (sensor_ioctrl(icd, Sensor_PowerDown, 0) < 0) {
goto sensor_INIT_ERR;
}
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct sensor *sensor = to_sensor(client);
const struct sensor_datafmt *fmt;
- int ret = 0;
+ int ret = 0,set_w,set_h;
fmt = sensor_find_datafmt(mf->code, sensor_colour_fmts,
ARRAY_SIZE(sensor_colour_fmts));
else if (mf->width < SENSOR_MIN_WIDTH)
mf->width = SENSOR_MIN_WIDTH;
+ set_w = mf->width;
+ set_h = mf->height;
+
+ if (((set_w <= 176) && (set_h <= 144)) && sensor_qcif[0].reg)
+ {
+ set_w = 176;
+ set_h = 144;
+ }
+ else if (((set_w <= 320) && (set_h <= 240)) && sensor_qvga[0].reg)
+ {
+ set_w = 320;
+ set_h = 240;
+ }
+ else if (((set_w <= 352) && (set_h<= 288)) && sensor_cif[0].reg)
+ {
+ set_w = 352;
+ set_h = 288;
+ }
+ else if (((set_w <= 640) && (set_h <= 480)) && sensor_vga[0].reg)
+ {
+ set_w = 640;
+ set_h = 480;
+ }
+ else if (((set_w <= 800) && (set_h <= 600)) && sensor_svga[0].reg)
+ {
+ set_w = 800;
+ set_h = 600;
+ }
+ else if (((set_w <= 1280) && (set_h <= 1024)) && sensor_sxga[0].reg)
+ {
+ set_w = 1280;
+ set_h = 1024;
+ }
+ else if (((set_w <= 1600) && (set_h <= 1200)) && sensor_uxga[0].reg)
+ {
+ set_w = 1600;
+ set_h = 1200;
+ }
+ else
+ {
+ set_w = SENSOR_INIT_WIDTH;
+ set_h = SENSOR_INIT_HEIGHT;
+ }
+
+ mf->width = set_w;
+ mf->height = set_h;
mf->colorspace = fmt->colorspace;
return ret;
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ sensor->sensor_gpio_res = NULL;
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS;i++) {
+ if (sensor->sensor_io_request->gpio_res[i].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[i].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[i];
+ }
+ }
+ if (sensor->sensor_gpio_res == NULL) {
+ SENSOR_TR("%s %s obtain gpio resource failed when RK29_CAM_SUBDEV_IOREQUEST \n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
+
static int debug;
module_param(debug, int, S_IRUGO|S_IWUSR);
#define SENSOR_MIN_HEIGHT 144
#define SENSOR_MAX_WIDTH 1600
#define SENSOR_MAX_HEIGHT 1200
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 1600 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 1200
+#define SENSOR_INIT_WINSEQADR sensor_uxga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_UYVY8_2X8
#define CONFIG_SENSOR_WhiteBalance 1
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
u8 val;
};
-/* init 800*600 SVGA */
+/* init SVGA preview */
static struct reginfo sensor_init_data[] =
{
// {0x01, 0xf9},
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 1600;
-static s32 sensor_init_height = 1200;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
-
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
char value;
- int ret,pid = 0,i = 0,j=0;
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_uxga;
- sensor_init_width = 1600;
- sensor_init_height = 1200;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret;
+
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
if (sensor_ioctrl(icd, Sensor_PowerDown, 0) < 0) {
goto sensor_INIT_ERR;
}
#endif
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ if (sensor->sensor_io_request->gpio_res[0].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[0].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[0];
+ } else if (sensor->sensor_io_request->gpio_res[1].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[1].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[1];
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
+
static int debug;
module_param(debug, int, S_IRUGO|S_IWUSR);
#define SENSOR_MIN_HEIGHT 144
#define SENSOR_MAX_WIDTH 640
#define SENSOR_MAX_HEIGHT 480
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 640 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 480
+#define SENSOR_INIT_WINSEQADR sensor_vga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_UYVY8_2X8
#define CONFIG_SENSOR_WhiteBalance 1
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
u8 val;
};
-/* init 800*600 SVGA */
+/* init SVGA preview */
static struct reginfo sensor_init_data[] =
{
//PAGE 0
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 640;
-static s32 sensor_init_height = 480;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
char value;
- int ret,pid = 0,i = 0,j=0;
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_vga;
- sensor_init_width = 640;
- sensor_init_height = 480;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret;
+
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
if (sensor_ioctrl(icd, Sensor_PowerDown, 0) < 0) {
goto sensor_INIT_ERR;
}
#endif
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ if (sensor->sensor_io_request->gpio_res[0].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[0].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[0];
+ } else if (sensor->sensor_io_request->gpio_res[1].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[1].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[1];
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
#include "mt9d112.h"
static int debug;
#define SENSOR_MIN_HEIGHT 240
#define SENSOR_MAX_WIDTH 1600
#define SENSOR_MAX_HEIGHT 1200
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 640 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 480
+#define SENSOR_INIT_WINSEQADR sensor_vga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_UYVY8_2X8
#define CONFIG_SENSOR_WhiteBalance 1
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 800;
-static s32 sensor_init_height = 600;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct sensor *sensor = to_sensor(client);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
- int ret,i = 0,j=0;
+ int ret;
#if (SENSOR_ID_REG != SEQUENCE_END)
u16 pid = 0;
#endif
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_svga;
- sensor_init_width = 800;
- sensor_init_height = 600;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
-
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
goto sensor_INIT_ERR;
}
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct sensor *sensor = to_sensor(client);
const struct sensor_datafmt *fmt;
- int ret = 0;
+ int ret = 0,set_w,set_h;
fmt = sensor_find_datafmt(mf->code, sensor_colour_fmts,
ARRAY_SIZE(sensor_colour_fmts));
else if (mf->width < SENSOR_MIN_WIDTH)
mf->width = SENSOR_MIN_WIDTH;
+ set_w = mf->width;
+ set_h = mf->height;
+ if (((set_w <= 176) && (set_h <= 144)) && (sensor_qcif[0].reg!=SEQUENCE_END))
+ {
+ set_w = 176;
+ set_h = 144;
+ }
+ else if (((set_w <= 320) && (set_h <= 240)) && (sensor_qvga[0].reg!=SEQUENCE_END))
+ {
+ set_w = 320;
+ set_h = 240;
+ }
+ else if (((set_w <= 352) && (set_h<= 288)) && (sensor_cif[0].reg!=SEQUENCE_END))
+ {
+ set_w = 352;
+ set_h = 288;
+ }
+ else if (((set_w <= 640) && (set_h <= 480)) && (sensor_vga[0].reg!=SEQUENCE_END))
+ {
+ set_w = 640;
+ set_h = 480;
+ }
+ else if (((set_w <= 800) && (set_h <= 600)) && (sensor_svga[0].reg!=SEQUENCE_END))
+ {
+ set_w = 800;
+ set_h = 600;
+ }
+ else if (((set_w <= 1024) && (set_h <= 768)) && (sensor_xga[0].reg!=SEQUENCE_END))
+ {
+ set_w = 1024;
+ set_h = 768;
+ }
+ else if (((set_w <= 1280) && (set_h <= 720)) && (sensor_720p[0].reg!=SEQUENCE_END))
+ {
+ set_w = 1280;
+ set_h = 720;
+ }
+ else if (((set_w <= 1280) && (set_h <= 1024)) && (sensor_sxga[0].reg!=SEQUENCE_END))
+ {
+ set_w = 1280;
+ set_h = 1024;
+ }
+ else if (((set_w <= 1600) && (set_h <= 1200)) && (sensor_uxga[0].reg!=SEQUENCE_END))
+ {
+ set_w = 1600;
+ set_h = 1200;
+ }
+ else if (((set_w <= 1920) && (set_h <= 1080)) && (sensor_1080p[0].reg!=SEQUENCE_END))
+ {
+ set_w = 1920;
+ set_h = 1080;
+ }
+ else if (((set_w <= 2048) && (set_h <= 1536)) && (sensor_qxga[0].reg!=SEQUENCE_END))
+ {
+ set_w = 2048;
+ set_h = 1536;
+ }
+ else if (((set_w <= 2592) && (set_h <= 1944)) && (sensor_qsxga[0].reg!=SEQUENCE_END))
+ {
+ set_w = 2592;
+ set_h = 1944;
+ }
+
+ mf->width = set_w;
+ mf->height = set_h;
+
mf->colorspace = fmt->colorspace;
return ret;
}
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ sensor->sensor_gpio_res = NULL;
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS;i++) {
+ if (sensor->sensor_io_request->gpio_res[i].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[i].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[i];
+ }
+ }
+ if (sensor->sensor_gpio_res == NULL) {
+ SENSOR_TR("%s %s obtain gpio resource failed when RK29_CAM_SUBDEV_IOREQUEST \n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
#include "mt9d113.h"
static int debug;
#define SENSOR_MIN_HEIGHT 600
#define SENSOR_MAX_WIDTH 1600
#define SENSOR_MAX_HEIGHT 1200
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 800 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 600
+#define SENSOR_INIT_WINSEQADR sensor_init_data
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_UYVY8_2X8
#define CONFIG_SENSOR_WhiteBalance 0
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 1
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_FALLING |\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 800;
-static s32 sensor_init_height = 600;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct sensor *sensor = to_sensor(client);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
- char value;
- int ret,pid = 0,i = 0,j=0;
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_svga;
- sensor_init_width = 800;
- sensor_init_height = 600;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret;
+ u16 pid = 0;
+
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
if (sensor_ioctrl(icd, Sensor_PowerDown, 0) < 0) {
goto sensor_INIT_ERR;
}
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
}
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ sensor->sensor_gpio_res = NULL;
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS;i++) {
+ if (sensor->sensor_io_request->gpio_res[i].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[i].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[i];
+ }
+ }
+ if (sensor->sensor_gpio_res == NULL) {
+ SENSOR_TR("%s %s obtain gpio resource failed when RK29_CAM_SUBDEV_IOREQUEST \n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
#include "mt9p111.h"
static int debug;
#define SENSOR_MIN_HEIGHT 144
#define SENSOR_MAX_WIDTH 2592
#define SENSOR_MAX_HEIGHT 1944
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 640 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 480
+#define SENSOR_INIT_WINSEQADR sensor_vga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_UYVY8_2X8
#define YUV420_BUFFER_MAX_SIZE 7558272 /* 2592*1944*1.5*/
#define CONFIG_SENSOR_WhiteBalance 1
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH|\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
#define SENSOR_AF_MODE_CLOSE 5
#endif
-/* init 800*600 SVGA */
+/* init 640X480 VGA */
static struct reginfo sensor_init_data[] =
{
//[Step2-PLL_Timing]
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 640;
-static s32 sensor_init_height = 480;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
-
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
const struct v4l2_queryctrl *qctrl;
#endif
const struct sensor_datafmt *fmt;
- int ret,pid = 0,i = 0 ,j = 0;
+ int ret,pid = 0;
int index =0 ;
#if (SENSOR_RESET_REG != SEQUENCE_END)
struct reginfo reg_info;
#endif
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_vga;
- sensor_init_width = 640;
- sensor_init_height = 480;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
SENSOR_DG("\n sensor_init_data..%s.\n",SENSOR_NAME_STRING());
- ret =sensor_write_init_data(client, sensor_init_data_p);
+ ret =sensor_write_init_data(client, sensor_init_data);
if (ret != 0) {
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
goto sensor_INIT_ERR;
mf->width = SENSOR_MAX_WIDTH;
else if (mf->width < SENSOR_MIN_WIDTH)
mf->width = SENSOR_MIN_WIDTH;
-
+ if (sensor_fmt_catch(mf->width, mf->height, &mf->width, &mf->height) == NULL) {
+ mf->width = 0;
+ mf->height = 0;
+ }
mf->colorspace = fmt->colorspace;
return ret;
}
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ sensor->sensor_gpio_res = NULL;
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS;i++) {
+ if (sensor->sensor_io_request->gpio_res[i].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[i].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[i];
+ }
+ }
+ if (sensor->sensor_gpio_res == NULL) {
+ SENSOR_TR("%s %s obtain gpio resource failed when RK29_CAM_SUBDEV_IOREQUEST \n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
#include "mt9t111.h"
static int debug;
#define SENSOR_MIN_HEIGHT 144
#define SENSOR_MAX_WIDTH 2048
#define SENSOR_MAX_HEIGHT 1536
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 640 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 480
+#define SENSOR_INIT_WINSEQADR sensor_vga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_UYVY8_2X8
#define CONFIG_SENSOR_WhiteBalance 1
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH|\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
#define SENSOR_AF_MODE_CLOSE 5
#endif
-/* init 800*600 SVGA */
+/* init 640X480 VGA */
static struct reginfo sensor_init_data[] =
{
//[Step2-PLL_Timing]
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 640;
-static s32 sensor_init_height = 480;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
-
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct sensor *sensor = to_sensor(client);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
- int ret,pid = 0,i = 0 , j = 0;
+ int ret,pid = 0;
#if (SENSOR_RESET_REG != SEQUENCE_END)
struct reginfo reg_info;
#endif
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_vga;
- sensor_init_width = 640;
- sensor_init_height = 480;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
if (sensor_ioctrl(icd, Sensor_PowerDown, 0) < 0) {
ret = -ENODEV;
goto sensor_INIT_ERR;
}
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
}
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ sensor->sensor_gpio_res = NULL;
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS;i++) {
+ if (sensor->sensor_io_request->gpio_res[i].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[i].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[i];
+ }
+ }
+ if (sensor->sensor_gpio_res == NULL) {
+ SENSOR_TR("%s %s obtain gpio resource failed when RK29_CAM_SUBDEV_IOREQUEST \n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
+
static int debug;
module_param(debug, int, S_IRUGO|S_IWUSR);
#define SENSOR_MIN_HEIGHT 144
#define SENSOR_MAX_WIDTH 1600
#define SENSOR_MAX_HEIGHT 1200
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 800 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 600
+#define SENSOR_INIT_WINSEQADR sensor_svga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_UYVY8_2X8
#define CONFIG_SENSOR_WhiteBalance 0
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
u8 val;
};
-/* init 800*600 SVGA */
+/* init 352X288 SVGA */
static struct reginfo sensor_init_data[] =
{
{0x3024,0x02}, //TG //0x02
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 800;
-static s32 sensor_init_height = 600;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
-
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
char value;
- int ret,pid = 0,i = 0,j=0;
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_svga;
- sensor_init_width = 800;
- sensor_init_height = 600;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret,pid = 0;
+
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
if (sensor_ioctrl(icd, Sensor_PowerDown, 0) < 0) {
}
#endif
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ if (sensor->sensor_io_request->gpio_res[0].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[0].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[0];
+ } else if (sensor->sensor_io_request->gpio_res[1].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[1].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[1];
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
+/*
+<<<<<<< HEAD
+ * ov2640 Camera Driver
+ *
+ * Copyright (C) 2010 Alberto Panizzo <maramaopercheseimorto@gmail.com>
+ *
+ * Based on ov772x, ov9640 drivers and previous non merged implementations.
+ *
+ * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2006, OmniVision
+=======
+o* Driver for MT9M001 CMOS Image Sensor from Micron
+ *
+ * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
+>>>>>>> parent of 15f7fab... temp revert rk change
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+<<<<<<< HEAD
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/videodev2.h>
+#include <media/v4l2-chip-ident.h>
+#include <media/v4l2-subdev.h>
+#include <media/soc_camera.h>
+#include <media/soc_mediabus.h>
+
+#define VAL_SET(x, mask, rshift, lshift) \
+ ((((x) >> rshift) & mask) << lshift)
+/*
+ * DSP registers
+ * register offset for BANK_SEL == BANK_SEL_DSP
+ */
+#define R_BYPASS 0x05 /* Bypass DSP */
+#define R_BYPASS_DSP_BYPAS 0x01 /* Bypass DSP, sensor out directly */
+#define R_BYPASS_USE_DSP 0x00 /* Use the internal DSP */
+#define QS 0x44 /* Quantization Scale Factor */
+#define CTRLI 0x50
+#define CTRLI_LP_DP 0x80
+#define CTRLI_ROUND 0x40
+#define CTRLI_V_DIV_SET(x) VAL_SET(x, 0x3, 0, 3)
+#define CTRLI_H_DIV_SET(x) VAL_SET(x, 0x3, 0, 0)
+#define HSIZE 0x51 /* H_SIZE[7:0] (real/4) */
+#define HSIZE_SET(x) VAL_SET(x, 0xFF, 2, 0)
+#define VSIZE 0x52 /* V_SIZE[7:0] (real/4) */
+#define VSIZE_SET(x) VAL_SET(x, 0xFF, 2, 0)
+#define XOFFL 0x53 /* OFFSET_X[7:0] */
+#define XOFFL_SET(x) VAL_SET(x, 0xFF, 0, 0)
+#define YOFFL 0x54 /* OFFSET_Y[7:0] */
+#define YOFFL_SET(x) VAL_SET(x, 0xFF, 0, 0)
+#define VHYX 0x55 /* Offset and size completion */
+#define VHYX_VSIZE_SET(x) VAL_SET(x, 0x1, (8+2), 7)
+#define VHYX_HSIZE_SET(x) VAL_SET(x, 0x1, (8+2), 3)
+#define VHYX_YOFF_SET(x) VAL_SET(x, 0x3, 8, 4)
+#define VHYX_XOFF_SET(x) VAL_SET(x, 0x3, 8, 0)
+#define DPRP 0x56
+#define TEST 0x57 /* Horizontal size completion */
+#define TEST_HSIZE_SET(x) VAL_SET(x, 0x1, (9+2), 7)
+#define ZMOW 0x5A /* Zoom: Out Width OUTW[7:0] (real/4) */
+#define ZMOW_OUTW_SET(x) VAL_SET(x, 0xFF, 2, 0)
+#define ZMOH 0x5B /* Zoom: Out Height OUTH[7:0] (real/4) */
+#define ZMOH_OUTH_SET(x) VAL_SET(x, 0xFF, 2, 0)
+#define ZMHH 0x5C /* Zoom: Speed and H&W completion */
+#define ZMHH_ZSPEED_SET(x) VAL_SET(x, 0x0F, 0, 4)
+#define ZMHH_OUTH_SET(x) VAL_SET(x, 0x1, (8+2), 2)
+#define ZMHH_OUTW_SET(x) VAL_SET(x, 0x3, (8+2), 0)
+#define BPADDR 0x7C /* SDE Indirect Register Access: Address */
+#define BPDATA 0x7D /* SDE Indirect Register Access: Data */
+#define CTRL2 0x86 /* DSP Module enable 2 */
+#define CTRL2_DCW_EN 0x20
+#define CTRL2_SDE_EN 0x10
+#define CTRL2_UV_ADJ_EN 0x08
+#define CTRL2_UV_AVG_EN 0x04
+#define CTRL2_CMX_EN 0x01
+#define CTRL3 0x87 /* DSP Module enable 3 */
+#define CTRL3_BPC_EN 0x80
+#define CTRL3_WPC_EN 0x40
+#define SIZEL 0x8C /* Image Size Completion */
+#define SIZEL_HSIZE8_11_SET(x) VAL_SET(x, 0x1, 11, 6)
+#define SIZEL_HSIZE8_SET(x) VAL_SET(x, 0x7, 0, 3)
+#define SIZEL_VSIZE8_SET(x) VAL_SET(x, 0x7, 0, 0)
+#define HSIZE8 0xC0 /* Image Horizontal Size HSIZE[10:3] */
+#define HSIZE8_SET(x) VAL_SET(x, 0xFF, 3, 0)
+#define VSIZE8 0xC1 /* Image Vertical Size VSIZE[10:3] */
+#define VSIZE8_SET(x) VAL_SET(x, 0xFF, 3, 0)
+#define CTRL0 0xC2 /* DSP Module enable 0 */
+#define CTRL0_AEC_EN 0x80
+#define CTRL0_AEC_SEL 0x40
+#define CTRL0_STAT_SEL 0x20
+#define CTRL0_VFIRST 0x10
+#define CTRL0_YUV422 0x08
+#define CTRL0_YUV_EN 0x04
+#define CTRL0_RGB_EN 0x02
+#define CTRL0_RAW_EN 0x01
+#define CTRL1 0xC3 /* DSP Module enable 1 */
+#define CTRL1_CIP 0x80
+#define CTRL1_DMY 0x40
+#define CTRL1_RAW_GMA 0x20
+#define CTRL1_DG 0x10
+#define CTRL1_AWB 0x08
+#define CTRL1_AWB_GAIN 0x04
+#define CTRL1_LENC 0x02
+#define CTRL1_PRE 0x01
+#define R_DVP_SP 0xD3 /* DVP output speed control */
+#define R_DVP_SP_AUTO_MODE 0x80
+#define R_DVP_SP_DVP_MASK 0x3F /* DVP PCLK = sysclk (48)/[6:0] (YUV0);
+ * = sysclk (48)/(2*[6:0]) (RAW);*/
+#define IMAGE_MODE 0xDA /* Image Output Format Select */
+#define IMAGE_MODE_Y8_DVP_EN 0x40
+#define IMAGE_MODE_JPEG_EN 0x10
+#define IMAGE_MODE_YUV422 0x00
+#define IMAGE_MODE_RAW10 0x04 /* (DVP) */
+#define IMAGE_MODE_RGB565 0x08
+#define IMAGE_MODE_HREF_VSYNC 0x02 /* HREF timing select in DVP JPEG output
+ * mode (0 for HREF is same as sensor) */
+#define IMAGE_MODE_LBYTE_FIRST 0x01 /* Byte swap enable for DVP
+ * 1: Low byte first UYVY (C2[4] =0)
+ * VYUY (C2[4] =1)
+ * 0: High byte first YUYV (C2[4]=0)
+ * YVYU (C2[4] = 1) */
+#define RESET 0xE0 /* Reset */
+#define RESET_MICROC 0x40
+#define RESET_SCCB 0x20
+#define RESET_JPEG 0x10
+#define RESET_DVP 0x04
+#define RESET_IPU 0x02
+#define RESET_CIF 0x01
+#define REGED 0xED /* Register ED */
+#define REGED_CLK_OUT_DIS 0x10
+#define MS_SP 0xF0 /* SCCB Master Speed */
+#define SS_ID 0xF7 /* SCCB Slave ID */
+#define SS_CTRL 0xF8 /* SCCB Slave Control */
+#define SS_CTRL_ADD_AUTO_INC 0x20
+#define SS_CTRL_EN 0x08
+#define SS_CTRL_DELAY_CLK 0x04
+#define SS_CTRL_ACC_EN 0x02
+#define SS_CTRL_SEN_PASS_THR 0x01
+#define MC_BIST 0xF9 /* Microcontroller misc register */
+#define MC_BIST_RESET 0x80 /* Microcontroller Reset */
+#define MC_BIST_BOOT_ROM_SEL 0x40
+#define MC_BIST_12KB_SEL 0x20
+#define MC_BIST_12KB_MASK 0x30
+#define MC_BIST_512KB_SEL 0x08
+#define MC_BIST_512KB_MASK 0x0C
+#define MC_BIST_BUSY_BIT_R 0x02
+#define MC_BIST_MC_RES_ONE_SH_W 0x02
+#define MC_BIST_LAUNCH 0x01
+#define BANK_SEL 0xFF /* Register Bank Select */
+#define BANK_SEL_DSP 0x00
+#define BANK_SEL_SENS 0x01
+
+/*
+ * Sensor registers
+ * register offset for BANK_SEL == BANK_SEL_SENS
+ */
+#define GAIN 0x00 /* AGC - Gain control gain setting */
+#define COM1 0x03 /* Common control 1 */
+#define COM1_1_DUMMY_FR 0x40
+#define COM1_3_DUMMY_FR 0x80
+#define COM1_7_DUMMY_FR 0xC0
+#define COM1_VWIN_LSB_UXGA 0x0F
+#define COM1_VWIN_LSB_SVGA 0x0A
+#define COM1_VWIN_LSB_CIF 0x06
+#define REG04 0x04 /* Register 04 */
+#define REG04_DEF 0x20 /* Always set */
+#define REG04_HFLIP_IMG 0x80 /* Horizontal mirror image ON/OFF */
+#define REG04_VFLIP_IMG 0x40 /* Vertical flip image ON/OFF */
+#define REG04_VREF_EN 0x10
+#define REG04_HREF_EN 0x08
+#define REG04_AEC_SET(x) VAL_SET(x, 0x3, 0, 0)
+#define REG08 0x08 /* Frame Exposure One-pin Control Pre-charge Row Num */
+#define COM2 0x09 /* Common control 2 */
+#define COM2_SOFT_SLEEP_MODE 0x10 /* Soft sleep mode */
+ /* Output drive capability */
+#define COM2_OCAP_Nx_SET(N) (((N) - 1) & 0x03) /* N = [1x .. 4x] */
+#define PID 0x0A /* Product ID Number MSB */
+#define VER 0x0B /* Product ID Number LSB */
+#define COM3 0x0C /* Common control 3 */
+#define COM3_BAND_50H 0x04 /* 0 For Banding at 60H */
+#define COM3_BAND_AUTO 0x02 /* Auto Banding */
+#define COM3_SING_FR_SNAPSH 0x01 /* 0 For enable live video output after the
+ * snapshot sequence*/
+#define AEC 0x10 /* AEC[9:2] Exposure Value */
+#define CLKRC 0x11 /* Internal clock */
+#define CLKRC_EN 0x80
+#define CLKRC_DIV_SET(x) (((x) - 1) & 0x1F) /* CLK = XVCLK/(x) */
+#define COM7 0x12 /* Common control 7 */
+#define COM7_SRST 0x80 /* Initiates system reset. All registers are
+ * set to factory default values after which
+ * the chip resumes normal operation */
+#define COM7_RES_UXGA 0x00 /* Resolution selectors for UXGA */
+#define COM7_RES_SVGA 0x40 /* SVGA */
+#define COM7_RES_CIF 0x20 /* CIF */
+#define COM7_ZOOM_EN 0x04 /* Enable Zoom mode */
+#define COM7_COLOR_BAR_TEST 0x02 /* Enable Color Bar Test Pattern */
+#define COM8 0x13 /* Common control 8 */
+#define COM8_DEF 0xC0 /* Banding filter ON/OFF */
+#define COM8_BNDF_EN 0x20 /* Banding filter ON/OFF */
+#define COM8_AGC_EN 0x04 /* AGC Auto/Manual control selection */
+#define COM8_AEC_EN 0x01 /* Auto/Manual Exposure control */
+#define COM9 0x14 /* Common control 9
+ * Automatic gain ceiling - maximum AGC value [7:5]*/
+#define COM9_AGC_GAIN_2x 0x00 /* 000 : 2x */
+#define COM9_AGC_GAIN_4x 0x20 /* 001 : 4x */
+#define COM9_AGC_GAIN_8x 0x40 /* 010 : 8x */
+#define COM9_AGC_GAIN_16x 0x60 /* 011 : 16x */
+#define COM9_AGC_GAIN_32x 0x80 /* 100 : 32x */
+#define COM9_AGC_GAIN_64x 0xA0 /* 101 : 64x */
+#define COM9_AGC_GAIN_128x 0xC0 /* 110 : 128x */
+#define COM10 0x15 /* Common control 10 */
+#define COM10_PCLK_HREF 0x20 /* PCLK output qualified by HREF */
+#define COM10_PCLK_RISE 0x10 /* Data is updated at the rising edge of
+ * PCLK (user can latch data at the next
+ * falling edge of PCLK).
+ * 0 otherwise. */
+#define COM10_HREF_INV 0x08 /* Invert HREF polarity:
+ * HREF negative for valid data*/
+#define COM10_VSINC_INV 0x02 /* Invert VSYNC polarity */
+#define HSTART 0x17 /* Horizontal Window start MSB 8 bit */
+#define HEND 0x18 /* Horizontal Window end MSB 8 bit */
+#define VSTART 0x19 /* Vertical Window start MSB 8 bit */
+#define VEND 0x1A /* Vertical Window end MSB 8 bit */
+#define MIDH 0x1C /* Manufacturer ID byte - high */
+#define MIDL 0x1D /* Manufacturer ID byte - low */
+#define AEW 0x24 /* AGC/AEC - Stable operating region (upper limit) */
+#define AEB 0x25 /* AGC/AEC - Stable operating region (lower limit) */
+#define VV 0x26 /* AGC/AEC Fast mode operating region */
+#define VV_HIGH_TH_SET(x) VAL_SET(x, 0xF, 0, 4)
+#define VV_LOW_TH_SET(x) VAL_SET(x, 0xF, 0, 0)
+#define REG2A 0x2A /* Dummy pixel insert MSB */
+#define FRARL 0x2B /* Dummy pixel insert LSB */
+#define ADDVFL 0x2D /* LSB of insert dummy lines in Vertical direction */
+#define ADDVFH 0x2E /* MSB of insert dummy lines in Vertical direction */
+#define YAVG 0x2F /* Y/G Channel Average value */
+#define REG32 0x32 /* Common Control 32 */
+#define REG32_PCLK_DIV_2 0x80 /* PCLK freq divided by 2 */
+#define REG32_PCLK_DIV_4 0xC0 /* PCLK freq divided by 4 */
+#define ARCOM2 0x34 /* Zoom: Horizontal start point */
+#define REG45 0x45 /* Register 45 */
+#define FLL 0x46 /* Frame Length Adjustment LSBs */
+#define FLH 0x47 /* Frame Length Adjustment MSBs */
+#define COM19 0x48 /* Zoom: Vertical start point */
+#define ZOOMS 0x49 /* Zoom: Vertical start point */
+#define COM22 0x4B /* Flash light control */
+#define COM25 0x4E /* For Banding operations */
+#define BD50 0x4F /* 50Hz Banding AEC 8 LSBs */
+#define BD60 0x50 /* 60Hz Banding AEC 8 LSBs */
+#define REG5D 0x5D /* AVGsel[7:0], 16-zone average weight option */
+#define REG5E 0x5E /* AVGsel[15:8], 16-zone average weight option */
+#define REG5F 0x5F /* AVGsel[23:16], 16-zone average weight option */
+#define REG60 0x60 /* AVGsel[31:24], 16-zone average weight option */
+#define HISTO_LOW 0x61 /* Histogram Algorithm Low Level */
+#define HISTO_HIGH 0x62 /* Histogram Algorithm High Level */
+
+/*
+ * ID
+ */
+#define MANUFACTURER_ID 0x7FA2
+#define PID_OV2640 0x2642
+#define VERSION(pid, ver) ((pid << 8) | (ver & 0xFF))
+
+/*
+ * Struct
+ */
+struct regval_list {
+ u8 reg_num;
+ u8 value;
+};
+
+/* Supported resolutions */
+enum ov2640_width {
+ W_QCIF = 176,
+ W_QVGA = 320,
+ W_CIF = 352,
+ W_VGA = 640,
+ W_SVGA = 800,
+ W_XGA = 1024,
+ W_SXGA = 1280,
+ W_UXGA = 1600,
+};
+
+enum ov2640_height {
+ H_QCIF = 144,
+ H_QVGA = 240,
+ H_CIF = 288,
+ H_VGA = 480,
+ H_SVGA = 600,
+ H_XGA = 768,
+ H_SXGA = 1024,
+ H_UXGA = 1200,
+};
+
+struct ov2640_win_size {
+ char *name;
+ enum ov2640_width width;
+ enum ov2640_height height;
+ const struct regval_list *regs;
+};
+
+
+struct ov2640_priv {
+ struct v4l2_subdev subdev;
+ struct ov2640_camera_info *info;
+ enum v4l2_mbus_pixelcode cfmt_code;
+ const struct ov2640_win_size *win;
+ int model;
+ u16 flag_vflip:1;
+ u16 flag_hflip:1;
+};
+
+/*
+ * Registers settings
+ */
+
+#define ENDMARKER { 0xff, 0xff }
+
+static const struct regval_list ov2640_init_regs[] = {
+ { BANK_SEL, BANK_SEL_DSP },
+ { 0x2c, 0xff },
+ { 0x2e, 0xdf },
+ { BANK_SEL, BANK_SEL_SENS },
+ { 0x3c, 0x32 },
+ { CLKRC, CLKRC_DIV_SET(1) },
+ { COM2, COM2_OCAP_Nx_SET(3) },
+ { REG04, REG04_DEF | REG04_HREF_EN },
+ { COM8, COM8_DEF | COM8_BNDF_EN | COM8_AGC_EN | COM8_AEC_EN },
+ { COM9, COM9_AGC_GAIN_8x | 0x08},
+ { 0x2c, 0x0c },
+ { 0x33, 0x78 },
+ { 0x3a, 0x33 },
+ { 0x3b, 0xfb },
+ { 0x3e, 0x00 },
+ { 0x43, 0x11 },
+ { 0x16, 0x10 },
+ { 0x39, 0x02 },
+ { 0x35, 0x88 },
+ { 0x22, 0x0a },
+ { 0x37, 0x40 },
+ { 0x23, 0x00 },
+ { ARCOM2, 0xa0 },
+ { 0x06, 0x02 },
+ { 0x06, 0x88 },
+ { 0x07, 0xc0 },
+ { 0x0d, 0xb7 },
+ { 0x0e, 0x01 },
+ { 0x4c, 0x00 },
+ { 0x4a, 0x81 },
+ { 0x21, 0x99 },
+ { AEW, 0x40 },
+ { AEB, 0x38 },
+ { VV, VV_HIGH_TH_SET(0x08) | VV_LOW_TH_SET(0x02) },
+ { 0x5c, 0x00 },
+ { 0x63, 0x00 },
+ { FLL, 0x22 },
+ { COM3, 0x38 | COM3_BAND_AUTO },
+ { REG5D, 0x55 },
+ { REG5E, 0x7d },
+ { REG5F, 0x7d },
+ { REG60, 0x55 },
+ { HISTO_LOW, 0x70 },
+ { HISTO_HIGH, 0x80 },
+ { 0x7c, 0x05 },
+ { 0x20, 0x80 },
+ { 0x28, 0x30 },
+ { 0x6c, 0x00 },
+ { 0x6d, 0x80 },
+ { 0x6e, 0x00 },
+ { 0x70, 0x02 },
+ { 0x71, 0x94 },
+ { 0x73, 0xc1 },
+ { 0x3d, 0x34 },
+ { COM7, COM7_RES_UXGA | COM7_ZOOM_EN },
+ { 0x5a, 0x57 },
+ { BD50, 0xbb },
+ { BD60, 0x9c },
+ { BANK_SEL, BANK_SEL_DSP },
+ { 0xe5, 0x7f },
+ { MC_BIST, MC_BIST_RESET | MC_BIST_BOOT_ROM_SEL },
+ { 0x41, 0x24 },
+ { RESET, RESET_JPEG | RESET_DVP },
+ { 0x76, 0xff },
+ { 0x33, 0xa0 },
+ { 0x42, 0x20 },
+ { 0x43, 0x18 },
+ { 0x4c, 0x00 },
+ { CTRL3, CTRL3_BPC_EN | CTRL3_WPC_EN | 0x10 },
+ { 0x88, 0x3f },
+ { 0xd7, 0x03 },
+ { 0xd9, 0x10 },
+ { R_DVP_SP , R_DVP_SP_AUTO_MODE | 0x2 },
+ { 0xc8, 0x08 },
+ { 0xc9, 0x80 },
+ { BPADDR, 0x00 },
+ { BPDATA, 0x00 },
+ { BPADDR, 0x03 },
+ { BPDATA, 0x48 },
+ { BPDATA, 0x48 },
+ { BPADDR, 0x08 },
+ { BPDATA, 0x20 },
+ { BPDATA, 0x10 },
+ { BPDATA, 0x0e },
+ { 0x90, 0x00 },
+ { 0x91, 0x0e },
+ { 0x91, 0x1a },
+ { 0x91, 0x31 },
+ { 0x91, 0x5a },
+ { 0x91, 0x69 },
+ { 0x91, 0x75 },
+ { 0x91, 0x7e },
+ { 0x91, 0x88 },
+ { 0x91, 0x8f },
+ { 0x91, 0x96 },
+ { 0x91, 0xa3 },
+ { 0x91, 0xaf },
+ { 0x91, 0xc4 },
+ { 0x91, 0xd7 },
+ { 0x91, 0xe8 },
+ { 0x91, 0x20 },
+ { 0x92, 0x00 },
+ { 0x93, 0x06 },
+ { 0x93, 0xe3 },
+ { 0x93, 0x03 },
+ { 0x93, 0x03 },
+ { 0x93, 0x00 },
+ { 0x93, 0x02 },
+ { 0x93, 0x00 },
+ { 0x93, 0x00 },
+ { 0x93, 0x00 },
+ { 0x93, 0x00 },
+ { 0x93, 0x00 },
+ { 0x93, 0x00 },
+ { 0x93, 0x00 },
+ { 0x96, 0x00 },
+ { 0x97, 0x08 },
+ { 0x97, 0x19 },
+ { 0x97, 0x02 },
+ { 0x97, 0x0c },
+ { 0x97, 0x24 },
+ { 0x97, 0x30 },
+ { 0x97, 0x28 },
+ { 0x97, 0x26 },
+ { 0x97, 0x02 },
+ { 0x97, 0x98 },
+ { 0x97, 0x80 },
+ { 0x97, 0x00 },
+ { 0x97, 0x00 },
+ { 0xa4, 0x00 },
+ { 0xa8, 0x00 },
+ { 0xc5, 0x11 },
+ { 0xc6, 0x51 },
+ { 0xbf, 0x80 },
+ { 0xc7, 0x10 },
+ { 0xb6, 0x66 },
+ { 0xb8, 0xA5 },
+ { 0xb7, 0x64 },
+ { 0xb9, 0x7C },
+ { 0xb3, 0xaf },
+ { 0xb4, 0x97 },
+ { 0xb5, 0xFF },
+ { 0xb0, 0xC5 },
+ { 0xb1, 0x94 },
+ { 0xb2, 0x0f },
+ { 0xc4, 0x5c },
+ { 0xa6, 0x00 },
+ { 0xa7, 0x20 },
+ { 0xa7, 0xd8 },
+ { 0xa7, 0x1b },
+ { 0xa7, 0x31 },
+ { 0xa7, 0x00 },
+ { 0xa7, 0x18 },
+ { 0xa7, 0x20 },
+ { 0xa7, 0xd8 },
+ { 0xa7, 0x19 },
+ { 0xa7, 0x31 },
+ { 0xa7, 0x00 },
+ { 0xa7, 0x18 },
+ { 0xa7, 0x20 },
+ { 0xa7, 0xd8 },
+ { 0xa7, 0x19 },
+ { 0xa7, 0x31 },
+ { 0xa7, 0x00 },
+ { 0xa7, 0x18 },
+ { 0x7f, 0x00 },
+ { 0xe5, 0x1f },
+ { 0xe1, 0x77 },
+ { 0xdd, 0x7f },
+ { CTRL0, CTRL0_YUV422 | CTRL0_YUV_EN | CTRL0_RGB_EN },
+ ENDMARKER,
+};
+
+/*
+ * Register settings for window size
+ * The preamble, setup the internal DSP to input an UXGA (1600x1200) image.
+ * Then the different zooming configurations will setup the output image size.
+ */
+static const struct regval_list ov2640_size_change_preamble_regs[] = {
+ { BANK_SEL, BANK_SEL_DSP },
+ { RESET, RESET_DVP },
+ { HSIZE8, HSIZE8_SET(W_UXGA) },
+ { VSIZE8, VSIZE8_SET(H_UXGA) },
+ { CTRL2, CTRL2_DCW_EN | CTRL2_SDE_EN |
+ CTRL2_UV_AVG_EN | CTRL2_CMX_EN | CTRL2_UV_ADJ_EN },
+ { HSIZE, HSIZE_SET(W_UXGA) },
+ { VSIZE, VSIZE_SET(H_UXGA) },
+ { XOFFL, XOFFL_SET(0) },
+ { YOFFL, YOFFL_SET(0) },
+ { VHYX, VHYX_HSIZE_SET(W_UXGA) | VHYX_VSIZE_SET(H_UXGA) |
+ VHYX_XOFF_SET(0) | VHYX_YOFF_SET(0)},
+ { TEST, TEST_HSIZE_SET(W_UXGA) },
+ ENDMARKER,
+};
+
+#define PER_SIZE_REG_SEQ(x, y, v_div, h_div, pclk_div) \
+ { CTRLI, CTRLI_LP_DP | CTRLI_V_DIV_SET(v_div) | \
+ CTRLI_H_DIV_SET(h_div)}, \
+ { ZMOW, ZMOW_OUTW_SET(x) }, \
+ { ZMOH, ZMOH_OUTH_SET(y) }, \
+ { ZMHH, ZMHH_OUTW_SET(x) | ZMHH_OUTH_SET(y) }, \
+ { R_DVP_SP, pclk_div }, \
+ { RESET, 0x00}
+
+static const struct regval_list ov2640_qcif_regs[] = {
+ PER_SIZE_REG_SEQ(W_QCIF, H_QCIF, 3, 3, 4),
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_qvga_regs[] = {
+ PER_SIZE_REG_SEQ(W_QVGA, H_QVGA, 2, 2, 4),
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_cif_regs[] = {
+ PER_SIZE_REG_SEQ(W_CIF, H_CIF, 2, 2, 8),
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_vga_regs[] = {
+ PER_SIZE_REG_SEQ(W_VGA, H_VGA, 0, 0, 2),
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_svga_regs[] = {
+ PER_SIZE_REG_SEQ(W_SVGA, H_SVGA, 1, 1, 2),
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_xga_regs[] = {
+ PER_SIZE_REG_SEQ(W_XGA, H_XGA, 0, 0, 2),
+ { CTRLI, 0x00},
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_sxga_regs[] = {
+ PER_SIZE_REG_SEQ(W_SXGA, H_SXGA, 0, 0, 2),
+ { CTRLI, 0x00},
+ { R_DVP_SP, 2 | R_DVP_SP_AUTO_MODE },
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_uxga_regs[] = {
+ PER_SIZE_REG_SEQ(W_UXGA, H_UXGA, 0, 0, 0),
+ { CTRLI, 0x00},
+ { R_DVP_SP, 0 | R_DVP_SP_AUTO_MODE },
+ ENDMARKER,
+};
+
+#define OV2640_SIZE(n, w, h, r) \
+ {.name = n, .width = w , .height = h, .regs = r }
+
+static const struct ov2640_win_size ov2640_supported_win_sizes[] = {
+ OV2640_SIZE("QCIF", W_QCIF, H_QCIF, ov2640_qcif_regs),
+ OV2640_SIZE("QVGA", W_QVGA, H_QVGA, ov2640_qvga_regs),
+ OV2640_SIZE("CIF", W_CIF, H_CIF, ov2640_cif_regs),
+ OV2640_SIZE("VGA", W_VGA, H_VGA, ov2640_vga_regs),
+ OV2640_SIZE("SVGA", W_SVGA, H_SVGA, ov2640_svga_regs),
+ OV2640_SIZE("XGA", W_XGA, H_XGA, ov2640_xga_regs),
+ OV2640_SIZE("SXGA", W_SXGA, H_SXGA, ov2640_sxga_regs),
+ OV2640_SIZE("UXGA", W_UXGA, H_UXGA, ov2640_uxga_regs),
+};
+
+/*
+ * Register settings for pixel formats
+ */
+static const struct regval_list ov2640_format_change_preamble_regs[] = {
+ { BANK_SEL, BANK_SEL_DSP },
+ { R_BYPASS, R_BYPASS_USE_DSP },
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_yuv422_regs[] = {
+ { IMAGE_MODE, IMAGE_MODE_LBYTE_FIRST | IMAGE_MODE_YUV422 },
+ { 0xD7, 0x01 },
+ { 0x33, 0xa0 },
+ { 0xe1, 0x67 },
+ { RESET, 0x00 },
+ { R_BYPASS, R_BYPASS_USE_DSP },
+ ENDMARKER,
+};
+
+static const struct regval_list ov2640_rgb565_regs[] = {
+ { IMAGE_MODE, IMAGE_MODE_LBYTE_FIRST | IMAGE_MODE_RGB565 },
+ { 0xd7, 0x03 },
+ { RESET, 0x00 },
+ { R_BYPASS, R_BYPASS_USE_DSP },
+ ENDMARKER,
+};
+
+static enum v4l2_mbus_pixelcode ov2640_codes[] = {
+ V4L2_MBUS_FMT_UYVY8_2X8,
+ V4L2_MBUS_FMT_RGB565_2X8_LE,
+};
+
+/*
+ * Supported controls
+ */
+static const struct v4l2_queryctrl ov2640_controls[] = {
+ {
+ .id = V4L2_CID_VFLIP,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "Flip Vertically",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ }, {
+ .id = V4L2_CID_HFLIP,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "Flip Horizontally",
+ .minimum = 0,
+ .maximum = 1,
+ .step = 1,
+ .default_value = 0,
+ },
+};
+
+/*
+ * General functions
+ */
+static struct ov2640_priv *to_ov2640(const struct i2c_client *client)
+{
+ return container_of(i2c_get_clientdata(client), struct ov2640_priv,
+ subdev);
+}
+
+static int ov2640_write_array(struct i2c_client *client,
+ const struct regval_list *vals)
+{
+ int ret;
+
+ while ((vals->reg_num != 0xff) || (vals->value != 0xff)) {
+ ret = i2c_smbus_write_byte_data(client,
+ vals->reg_num, vals->value);
+ dev_vdbg(&client->dev, "array: 0x%02x, 0x%02x",
+ vals->reg_num, vals->value);
+
+ if (ret < 0)
+ return ret;
+ vals++;
+ }
+ return 0;
+}
+
+static int ov2640_mask_set(struct i2c_client *client,
+ u8 reg, u8 mask, u8 set)
+{
+ s32 val = i2c_smbus_read_byte_data(client, reg);
+ if (val < 0)
+ return val;
+
+ val &= ~mask;
+ val |= set & mask;
+
+ dev_vdbg(&client->dev, "masks: 0x%02x, 0x%02x", reg, val);
+
+ return i2c_smbus_write_byte_data(client, reg, val);
+}
+
+static int ov2640_reset(struct i2c_client *client)
+{
+ int ret;
+ const struct regval_list reset_seq[] = {
+ {BANK_SEL, BANK_SEL_SENS},
+ {COM7, COM7_SRST},
+ ENDMARKER,
+ };
+
+ ret = ov2640_write_array(client, reset_seq);
+ if (ret)
+ goto err;
+
+ msleep(5);
+err:
+ dev_dbg(&client->dev, "%s: (ret %d)", __func__, ret);
+ return ret;
+}
+
+/*
+ * soc_camera_ops functions
+ */
+static int ov2640_s_stream(struct v4l2_subdev *sd, int enable)
+{
+ return 0;
+}
+
+static int ov2640_set_bus_param(struct soc_camera_device *icd,
+ unsigned long flags)
+{
+ struct soc_camera_link *icl = to_soc_camera_link(icd);
+ unsigned long width_flag = flags & SOCAM_DATAWIDTH_MASK;
+
+ /* Only one width bit may be set */
+ if (!is_power_of_2(width_flag))
+ return -EINVAL;
+
+ if (icl->set_bus_param)
+ return icl->set_bus_param(icl, width_flag);
+
+ /*
+ * Without board specific bus width settings we support only the
+ * sensors native bus width witch are tested working
+ */
+ if (width_flag & (SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8))
+ return 0;
+
+ return 0;
+}
+
+static unsigned long ov2640_query_bus_param(struct soc_camera_device *icd)
+{
+ struct soc_camera_link *icl = to_soc_camera_link(icd);
+ unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
+ SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
+ SOCAM_DATA_ACTIVE_HIGH;
+
+ if (icl->query_bus_param)
+ flags |= icl->query_bus_param(icl) & SOCAM_DATAWIDTH_MASK;
+ else
+ flags |= SOCAM_DATAWIDTH_10;
+
+ return soc_camera_apply_sensor_flags(icl, flags);
+}
+
+static int ov2640_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct ov2640_priv *priv = to_ov2640(client);
+
+ switch (ctrl->id) {
+ case V4L2_CID_VFLIP:
+ ctrl->value = priv->flag_vflip;
+ break;
+ case V4L2_CID_HFLIP:
+ ctrl->value = priv->flag_hflip;
+ break;
+ }
+ return 0;
+}
+
+static int ov2640_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct ov2640_priv *priv = to_ov2640(client);
+ int ret = 0;
+ u8 val;
+
+ switch (ctrl->id) {
+ case V4L2_CID_VFLIP:
+ val = ctrl->value ? REG04_VFLIP_IMG : 0x00;
+ priv->flag_vflip = ctrl->value ? 1 : 0;
+ ret = ov2640_mask_set(client, REG04, REG04_VFLIP_IMG, val);
+ break;
+ case V4L2_CID_HFLIP:
+ val = ctrl->value ? REG04_HFLIP_IMG : 0x00;
+ priv->flag_hflip = ctrl->value ? 1 : 0;
+ ret = ov2640_mask_set(client, REG04, REG04_HFLIP_IMG, val);
+ break;
+ }
+
+ return ret;
+}
+
+static int ov2640_g_chip_ident(struct v4l2_subdev *sd,
+ struct v4l2_dbg_chip_ident *id)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct ov2640_priv *priv = to_ov2640(client);
+
+ id->ident = priv->model;
+ id->revision = 0;
+
+ return 0;
+}
+
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+static int ov2640_g_register(struct v4l2_subdev *sd,
+ struct v4l2_dbg_register *reg)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ int ret;
+
+ reg->size = 1;
+ if (reg->reg > 0xff)
+ return -EINVAL;
+
+ ret = i2c_smbus_read_byte_data(client, reg->reg);
+ if (ret < 0)
+ return ret;
+
+ reg->val = ret;
+
+ return 0;
+}
+
+static int ov2640_s_register(struct v4l2_subdev *sd,
+ struct v4l2_dbg_register *reg)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+ if (reg->reg > 0xff ||
+ reg->val > 0xff)
+ return -EINVAL;
+
+ return i2c_smbus_write_byte_data(client, reg->reg, reg->val);
+}
+#endif
+
+/* Select the nearest higher resolution for capture */
+static const struct ov2640_win_size *ov2640_select_win(u32 *width, u32 *height)
+{
+ int i, default_size = ARRAY_SIZE(ov2640_supported_win_sizes) - 1;
+
+ for (i = 0; i < ARRAY_SIZE(ov2640_supported_win_sizes); i++) {
+ if (ov2640_supported_win_sizes[i].width >= *width &&
+ ov2640_supported_win_sizes[i].height >= *height) {
+ *width = ov2640_supported_win_sizes[i].width;
+ *height = ov2640_supported_win_sizes[i].height;
+ return &ov2640_supported_win_sizes[i];
+ }
+ }
+
+ *width = ov2640_supported_win_sizes[default_size].width;
+ *height = ov2640_supported_win_sizes[default_size].height;
+ return &ov2640_supported_win_sizes[default_size];
+}
+
+static int ov2640_set_params(struct i2c_client *client, u32 *width, u32 *height,
+ enum v4l2_mbus_pixelcode code)
+{
+ struct ov2640_priv *priv = to_ov2640(client);
+ const struct regval_list *selected_cfmt_regs;
+ int ret;
+
+ /* select win */
+ priv->win = ov2640_select_win(width, height);
+
+ /* select format */
+ priv->cfmt_code = 0;
+ switch (code) {
+ case V4L2_MBUS_FMT_RGB565_2X8_LE:
+ dev_dbg(&client->dev, "%s: Selected cfmt RGB565", __func__);
+ selected_cfmt_regs = ov2640_rgb565_regs;
+ break;
+ default:
+ case V4L2_MBUS_FMT_UYVY8_2X8:
+ dev_dbg(&client->dev, "%s: Selected cfmt YUV422", __func__);
+ selected_cfmt_regs = ov2640_yuv422_regs;
+ }
+
+ /* reset hardware */
+ ov2640_reset(client);
+
+ /* initialize the sensor with default data */
+ dev_dbg(&client->dev, "%s: Init default", __func__);
+ ret = ov2640_write_array(client, ov2640_init_regs);
+ if (ret < 0)
+ goto err;
+
+ /* select preamble */
+ dev_dbg(&client->dev, "%s: Set size to %s", __func__, priv->win->name);
+ ret = ov2640_write_array(client, ov2640_size_change_preamble_regs);
+ if (ret < 0)
+ goto err;
+
+ /* set size win */
+ ret = ov2640_write_array(client, priv->win->regs);
+ if (ret < 0)
+ goto err;
+
+ /* cfmt preamble */
+ dev_dbg(&client->dev, "%s: Set cfmt", __func__);
+ ret = ov2640_write_array(client, ov2640_format_change_preamble_regs);
+ if (ret < 0)
+ goto err;
+
+ /* set cfmt */
+ ret = ov2640_write_array(client, selected_cfmt_regs);
+ if (ret < 0)
+ goto err;
+
+ priv->cfmt_code = code;
+ *width = priv->win->width;
+ *height = priv->win->height;
+
+ return 0;
+
+err:
+ dev_err(&client->dev, "%s: Error %d", __func__, ret);
+ ov2640_reset(client);
+ priv->win = NULL;
+
+ return ret;
+}
+
+static int ov2640_g_fmt(struct v4l2_subdev *sd,
+ struct v4l2_mbus_framefmt *mf)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct ov2640_priv *priv = to_ov2640(client);
+
+ if (!priv->win) {
+ u32 width = W_SVGA, height = H_SVGA;
+ int ret = ov2640_set_params(client, &width, &height,
+ V4L2_MBUS_FMT_UYVY8_2X8);
+ if (ret < 0)
+ return ret;
+ }
+
+ mf->width = priv->win->width;
+ mf->height = priv->win->height;
+ mf->code = priv->cfmt_code;
+
+ switch (mf->code) {
+ case V4L2_MBUS_FMT_RGB565_2X8_LE:
+ mf->colorspace = V4L2_COLORSPACE_SRGB;
+ break;
+ default:
+ case V4L2_MBUS_FMT_UYVY8_2X8:
+ mf->colorspace = V4L2_COLORSPACE_JPEG;
+ }
+ mf->field = V4L2_FIELD_NONE;
+
+ return 0;
+}
+
+static int ov2640_s_fmt(struct v4l2_subdev *sd,
+ struct v4l2_mbus_framefmt *mf)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ int ret;
+
+
+ switch (mf->code) {
+ case V4L2_MBUS_FMT_RGB565_2X8_LE:
+ mf->colorspace = V4L2_COLORSPACE_SRGB;
+ break;
+ default:
+ mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
+ case V4L2_MBUS_FMT_UYVY8_2X8:
+ mf->colorspace = V4L2_COLORSPACE_JPEG;
+ }
+
+ ret = ov2640_set_params(client, &mf->width, &mf->height, mf->code);
+
+ return ret;
+}
+
+static int ov2640_try_fmt(struct v4l2_subdev *sd,
+ struct v4l2_mbus_framefmt *mf)
+{
+ const struct ov2640_win_size *win;
+
+ /*
+ * select suitable win
+ */
+ win = ov2640_select_win(&mf->width, &mf->height);
+
+ mf->field = V4L2_FIELD_NONE;
+
+ switch (mf->code) {
+ case V4L2_MBUS_FMT_RGB565_2X8_LE:
+ mf->colorspace = V4L2_COLORSPACE_SRGB;
+ break;
+ default:
+ mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
+ case V4L2_MBUS_FMT_UYVY8_2X8:
+ mf->colorspace = V4L2_COLORSPACE_JPEG;
+ }
+
+ return 0;
+}
+
+static int ov2640_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
+ enum v4l2_mbus_pixelcode *code)
+{
+ if (index >= ARRAY_SIZE(ov2640_codes))
+ return -EINVAL;
+
+ *code = ov2640_codes[index];
+ return 0;
+}
+
+static int ov2640_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
+{
+ a->c.left = 0;
+ a->c.top = 0;
+ a->c.width = W_UXGA;
+ a->c.height = H_UXGA;
+ a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+
+ return 0;
+}
+
+static int ov2640_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
+{
+ a->bounds.left = 0;
+ a->bounds.top = 0;
+ a->bounds.width = W_UXGA;
+ a->bounds.height = H_UXGA;
+ a->defrect = a->bounds;
+ a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ a->pixelaspect.numerator = 1;
+ a->pixelaspect.denominator = 1;
+
+ return 0;
+}
+
+static int ov2640_video_probe(struct soc_camera_device *icd,
+ struct i2c_client *client)
+{
+ struct ov2640_priv *priv = to_ov2640(client);
+ u8 pid, ver, midh, midl;
+ const char *devname;
+ int ret;
+
+ /*
+ * we must have a parent by now. And it cannot be a wrong one.
+ * So this entire test is completely redundant.
+ */
+ if (!icd->dev.parent ||
+ to_soc_camera_host(icd->dev.parent)->nr != icd->iface) {
+ dev_err(&client->dev, "Parent missing or invalid!\n");
+ ret = -ENODEV;
+ goto err;
+ }
+
+ /*
+ * check and show product ID and manufacturer ID
+ */
+ i2c_smbus_write_byte_data(client, BANK_SEL, BANK_SEL_SENS);
+ pid = i2c_smbus_read_byte_data(client, PID);
+ ver = i2c_smbus_read_byte_data(client, VER);
+ midh = i2c_smbus_read_byte_data(client, MIDH);
+ midl = i2c_smbus_read_byte_data(client, MIDL);
+
+ switch (VERSION(pid, ver)) {
+ case PID_OV2640:
+ devname = "ov2640";
+ priv->model = V4L2_IDENT_OV2640;
+ break;
+ default:
+ dev_err(&client->dev,
+ "Product ID error %x:%x\n", pid, ver);
+ ret = -ENODEV;
+ goto err;
+ }
+
+ dev_info(&client->dev,
+ "%s Product ID %0x:%0x Manufacturer ID %x:%x\n",
+ devname, pid, ver, midh, midl);
+
+ return 0;
+
+err:
+ return ret;
+}
+
+static struct soc_camera_ops ov2640_ops = {
+ .set_bus_param = ov2640_set_bus_param,
+ .query_bus_param = ov2640_query_bus_param,
+ .controls = ov2640_controls,
+ .num_controls = ARRAY_SIZE(ov2640_controls),
+};
+
+static struct v4l2_subdev_core_ops ov2640_subdev_core_ops = {
+ .g_ctrl = ov2640_g_ctrl,
+ .s_ctrl = ov2640_s_ctrl,
+ .g_chip_ident = ov2640_g_chip_ident,
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+ .g_register = ov2640_g_register,
+ .s_register = ov2640_s_register,
+#endif
+};
+
+static struct v4l2_subdev_video_ops ov2640_subdev_video_ops = {
+ .s_stream = ov2640_s_stream,
+ .g_mbus_fmt = ov2640_g_fmt,
+ .s_mbus_fmt = ov2640_s_fmt,
+ .try_mbus_fmt = ov2640_try_fmt,
+ .cropcap = ov2640_cropcap,
+ .g_crop = ov2640_g_crop,
+ .enum_mbus_fmt = ov2640_enum_fmt,
+};
+
+static struct v4l2_subdev_ops ov2640_subdev_ops = {
+ .core = &ov2640_subdev_core_ops,
+ .video = &ov2640_subdev_video_ops,
+};
+
+/*
+ * i2c_driver functions
+ */
+static int ov2640_probe(struct i2c_client *client,
+ const struct i2c_device_id *did)
+{
+ struct ov2640_priv *priv;
+ struct soc_camera_device *icd = client->dev.platform_data;
+ struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
+ struct soc_camera_link *icl;
+ int ret;
+
+ if (!icd) {
+ dev_err(&adapter->dev, "OV2640: missing soc-camera data!\n");
+ return -EINVAL;
+ }
+
+ icl = to_soc_camera_link(icd);
+ if (!icl) {
+ dev_err(&adapter->dev,
+ "OV2640: Missing platform_data for driver\n");
+ return -EINVAL;
+ }
+
+ if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
+ dev_err(&adapter->dev,
+ "OV2640: I2C-Adapter doesn't support SMBUS\n");
+ return -EIO;
+ }
+
+ priv = kzalloc(sizeof(struct ov2640_priv), GFP_KERNEL);
+ if (!priv) {
+ dev_err(&adapter->dev,
+ "Failed to allocate memory for private data!\n");
+ return -ENOMEM;
+ }
+
+ priv->info = icl->priv;
+
+ v4l2_i2c_subdev_init(&priv->subdev, client, &ov2640_subdev_ops);
+
+ icd->ops = &ov2640_ops;
+
+ ret = ov2640_video_probe(icd, client);
+ if (ret) {
+ icd->ops = NULL;
+ kfree(priv);
+ } else {
+ dev_info(&adapter->dev, "OV2640 Probed\n");
+ }
+
+ return ret;
+}
+
+static int ov2640_remove(struct i2c_client *client)
+{
+ struct ov2640_priv *priv = to_ov2640(client);
+ struct soc_camera_device *icd = client->dev.platform_data;
+
+ icd->ops = NULL;
+ kfree(priv);
+ return 0;
+}
+
+static const struct i2c_device_id ov2640_id[] = {
+ { "ov2640", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, ov2640_id);
+
+static struct i2c_driver ov2640_i2c_driver = {
+ .driver = {
+ .name = "ov2640",
+ },
+ .probe = ov2640_probe,
+ .remove = ov2640_remove,
+ .id_table = ov2640_id,
+};
+
+/*
+ * Module functions
+ */
+static int __init ov2640_module_init(void)
+{
+ return i2c_add_driver(&ov2640_i2c_driver);
+}
+
+static void __exit ov2640_module_exit(void)
+{
+ i2c_del_driver(&ov2640_i2c_driver);
+}
+
+module_init(ov2640_module_init);
+module_exit(ov2640_module_exit);
+
+MODULE_DESCRIPTION("SoC Camera driver for Omni Vision 2640 sensor");
+MODULE_AUTHOR("Alberto Panizzo");
+MODULE_LICENSE("GPL v2");
+=======
#include <linux/videodev2.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
+
static int debug;
module_param(debug, int, S_IRUGO|S_IWUSR);
#define SENSOR_MIN_HEIGHT 480
#define SENSOR_MAX_WIDTH 1600
#define SENSOR_MAX_HEIGHT 1200
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 640 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 480
+#define SENSOR_INIT_WINSEQADR sensor_vga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_YUYV8_2X8
#define CONFIG_SENSOR_WhiteBalance 0
#define CONFIG_SENSOR_Brightness 1
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 640;
-static s32 sensor_init_height = 480;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = sd->priv;
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
char value;
- int ret,pid = 0,i = 0,j=0;
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_vga;
- sensor_init_width = 640;
- sensor_init_height = 480;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret,pid = 0;
+
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
if (sensor_ioctrl(icd, Sensor_PowerDown, 0) < 0) {
goto sensor_INIT_ERR;
}
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ if (sensor->sensor_io_request->gpio_res[0].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[0].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[0];
+ } else if (sensor->sensor_io_request->gpio_res[1].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[1].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[1];
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
-#include <linux/videodev2.h>
+#include <linux/videodev2.h>\r
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/log2.h>
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
+
static int debug;
module_param(debug, int, S_IRUGO|S_IWUSR);
#define _CONS(a,b) a##b
#define CONS(a,b) _CONS(a,b)
-
#define __STR(x) #x
#define _STR(x) __STR(x)
#define STR(x) _STR(x)
#define SENSOR_MIN_HEIGHT 480
#define SENSOR_MAX_WIDTH 1600
#define SENSOR_MAX_HEIGHT 1200
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 640 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 480
+#define SENSOR_INIT_WINSEQADR sensor_vga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_YUYV8_2X8
#define CONFIG_SENSOR_WhiteBalance 0
#define CONFIG_SENSOR_Brightness 1
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 640;
-static s32 sensor_init_height = 480;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = sensor_init_data;
-static struct reginfo* sensor_init_winseq_p = sensor_svga;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
- struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct i2c_client *client = v4l2_get_subdevdata(sd);\r
struct soc_camera_device *icd = client->dev.platform_data;
struct sensor *sensor = to_sensor(client);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
char value;
- int ret,pid = 0,i = 0,j=0;
- //if val ==1,mean that sensor need to be reinit
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_vga;
- sensor_init_width = 640;
- sensor_init_height = 480;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret,pid = 0;
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
goto sensor_INIT_ERR;
}
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
static int sensor_g_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *mf)
{
- struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct i2c_client *client = v4l2_get_subdevdata(sd);\r
struct soc_camera_device *icd = client->dev.platform_data;
struct sensor *sensor = to_sensor(client);
}
static int sensor_s_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *mf)
{
- struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct i2c_client *client = v4l2_get_subdevdata(sd);\r
struct sensor *sensor = to_sensor(client);
const struct sensor_datafmt *fmt;
const struct v4l2_queryctrl *qctrl;
static int sensor_try_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *mf)
{
- struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct i2c_client *client = v4l2_get_subdevdata(sd);\r
struct sensor *sensor = to_sensor(client);
const struct sensor_datafmt *fmt;
- int ret = 0;
+ int ret = 0,set_w,set_h;\r
fmt = sensor_find_datafmt(mf->code, sensor_colour_fmts,
ARRAY_SIZE(sensor_colour_fmts));
mf->width = SENSOR_MAX_WIDTH;
else if (mf->width < SENSOR_MIN_WIDTH)
mf->width = SENSOR_MIN_WIDTH;
+\r
+ set_w = mf->width;
+ set_h = mf->height;
+ if (((set_w <= 176) && (set_h <= 144)) && sensor_qcif[0].reg)
+ {
+ set_w = 176;\r
+ set_h = 144;
+ }
+ else if (((set_w <= 320) && (set_h <= 240)) && sensor_qvga[0].reg)
+ {
+ set_w = 320;\r
+ set_h = 240;
+ }
+ else if (((set_w <= 352) && (set_h<= 288)) && sensor_cif[0].reg)
+ {
+ set_w = 352;\r
+ set_h = 288;
+ }
+ else if (((set_w <= 640) && (set_h <= 480)) && sensor_vga[0].reg)
+ {
+ set_w = 640;\r
+ set_h = 480;
+ }
+ else if (((set_w <= 800) && (set_h <= 600)) && sensor_svga[0].reg)
+ {
+ set_w = 800;\r
+ set_h = 600;
+ }
+ else if (((set_w <= 1024) && (set_h <= 768)) && sensor_xga[0].reg)
+ {
+ set_w = 1024;\r
+ set_h = 768;
+ }
+ else if (((set_w <= 1280) && (set_h <= 1024)) && sensor_sxga[0].reg)
+ {
+ set_w = 1280;\r
+ set_h = 1024;
+ }
+ else if (((set_w <= 1600) && (set_h <= 1200)) && sensor_uxga[0].reg)
+ {
+ set_w = 1600;\r
+ set_h = 1200;
+ }
+ else
+ {
+ set_w = SENSOR_INIT_WIDTH;\r
+ set_h = SENSOR_INIT_HEIGHT;
+ }\r
+
+ mf->width = set_w;
+ mf->height = set_h;\r
+\r
mf->colorspace = fmt->colorspace;
return ret;
}
static int sensor_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *id)
{
- struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct i2c_client *client = v4l2_get_subdevdata(sd);\r
if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR)
return -EINVAL;
static int sensor_g_control(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
{
- struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct i2c_client *client = v4l2_get_subdevdata(sd);\r
struct sensor *sensor = to_sensor(client);
const struct v4l2_queryctrl *qctrl;
static int sensor_s_control(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
{
- struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct i2c_client *client = v4l2_get_subdevdata(sd);\r
struct sensor *sensor = to_sensor(client);
struct soc_camera_device *icd = client->dev.platform_data;
const struct v4l2_queryctrl *qctrl;
static int sensor_g_ext_controls(struct v4l2_subdev *sd, struct v4l2_ext_controls *ext_ctrl)
{
- struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct i2c_client *client = v4l2_get_subdevdata(sd);\r
struct soc_camera_device *icd = client->dev.platform_data;
int i, error_cnt=0, error_idx=-1;
static int sensor_s_ext_controls(struct v4l2_subdev *sd, struct v4l2_ext_controls *ext_ctrl)
{
- struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct i2c_client *client = v4l2_get_subdevdata(sd);\r
struct soc_camera_device *icd = client->dev.platform_data;
int i, error_cnt=0, error_idx=-1;
static long sensor_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
{
- struct i2c_client *client = v4l2_get_subdevdata(sd);
+ struct i2c_client *client = v4l2_get_subdevdata(sd);\r
struct soc_camera_device *icd = client->dev.platform_data;
struct sensor *sensor = to_sensor(client);
int ret = 0;
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg; \r
+ if (sensor->sensor_io_request != NULL) {
+ sensor->sensor_gpio_res = NULL;
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS;i++) {
+ if (sensor->sensor_io_request->gpio_res[i].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[i].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[i];
+ }
+ }
+ if (sensor->sensor_gpio_res == NULL) {
+ SENSOR_TR("%s %s obtain gpio resource failed when RK29_CAM_SUBDEV_IOREQUEST \n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }\r
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
MODULE_DESCRIPTION(SENSOR_NAME_STRING(Camera sensor driver));
MODULE_AUTHOR("ddl <kernel@rock-chips>");
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL");\r
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
+
static int debug;
module_param(debug, int, S_IRUGO|S_IWUSR);
#define SENSOR_MIN_HEIGHT 144
#define SENSOR_MAX_WIDTH 1600
#define SENSOR_MAX_HEIGHT 1200
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 640 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 480
+#define SENSOR_INIT_WINSEQADR sensor_vga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_UYVY8_2X8
#define CONFIG_SENSOR_WhiteBalance 1
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 1
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
u8 val;
};
-/* init 800*600 SVGA */
+/* init 352X288 SVGA */
static struct reginfo sensor_init_data[] =
{
{0x308c, 0x80},
static struct reginfo sensor_sxga[] =
{
{0x300E, 0x34},
- {0x3011, 0x01},
+ {0x3011, 0x00},
{0x3012, 0x00},
{0x302a, 0x05},
{0x302b, 0xCB},
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 640;
-static s32 sensor_init_height = 480;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
-
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
char value;
- int ret,pid = 0,i = 0,j=0;
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_vga;
- sensor_init_width = 640;
- sensor_init_height = 480;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret,pid = 0;
+
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
if (sensor_ioctrl(icd, Sensor_PowerDown, 0) < 0) {
goto sensor_INIT_ERR;
}
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct sensor *sensor = to_sensor(client);
const struct sensor_datafmt *fmt;
- int ret = 0;
+ int ret = 0,set_w,set_h;
fmt = sensor_find_datafmt(mf->code, sensor_colour_fmts,
ARRAY_SIZE(sensor_colour_fmts));
else if (mf->width < SENSOR_MIN_WIDTH)
mf->width = SENSOR_MIN_WIDTH;
+ set_w = mf->width;
+ set_h = mf->height;
+
+ if (((set_w <= 176) && (set_h <= 144)) && sensor_qcif[0].reg)
+ {
+ set_w = 176;
+ set_h = 144;
+ }
+ else if (((set_w <= 320) && (set_h <= 240)) && sensor_qvga[0].reg)
+ {
+ set_w = 320;
+ set_h = 240;
+ }
+ else if (((set_w <= 352) && (set_h<= 288)) && sensor_cif[0].reg)
+ {
+ set_w = 352;
+ set_h = 288;
+ }
+ else if (((set_w <= 640) && (set_h <= 480)) && sensor_vga[0].reg)
+ {
+ set_w = 640;
+ set_h = 480;
+ }
+ else if (((set_w <= 800) && (set_h <= 600)) && sensor_svga[0].reg)
+ {
+ set_w = 800;
+ set_h = 600;
+ }
+ else if (((set_w <= 1024) && (set_h <= 768)) && sensor_xga[0].reg)
+ {
+ set_w = 1024;
+ set_h = 768;
+ }
+ else if (((set_w <= 1280) && (set_h <= 1024)) && sensor_sxga[0].reg)
+ {
+ set_w = 1280;
+ set_h = 1024;
+ }
+ else if (((set_w <= 1600) && (set_h <= 1200)) && sensor_uxga[0].reg)
+ {
+ set_w = 1600;
+ set_h = 1200;
+ }
+
+ mf->width = set_w;
+ mf->height = set_h;
mf->colorspace = fmt->colorspace;
return ret;
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ sensor->sensor_gpio_res = NULL;
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS;i++) {
+ if (sensor->sensor_io_request->gpio_res[i].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[i].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[i];
+ }
+ }
+ if (sensor->sensor_gpio_res == NULL) {
+ SENSOR_TR("%s %s obtain gpio resource failed when RK29_CAM_SUBDEV_IOREQUEST \n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
+
static int debug;
module_param(debug, int, S_IRUGO|S_IWUSR);
#define SENSOR_MIN_HEIGHT 600
#define SENSOR_MAX_WIDTH 1600
#define SENSOR_MAX_HEIGHT 1200
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 800 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 600
+#define SENSOR_INIT_WINSEQADR sensor_svga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_YUYV8_2X8
#define CONFIG_SENSOR_WhiteBalance 1
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
{
struct soc_camera_link *icl = to_soc_camera_link(icd);
int ret = 0;
- //for fpga debug ,not control io
- //return 0;
+
SENSOR_DG("%s %s cmd(%d) on(%d)\n",SENSOR_NAME_STRING(),__FUNCTION__,cmd,on);
switch (cmd)
{
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 800;
-static s32 sensor_init_height = 600;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = sensor_init_data;
-static struct reginfo* sensor_init_winseq_p = sensor_svga;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
char value;
- int ret,pid = 0,i = 0,j=0;
- //if val ==1,mean that sensor need to be reinit
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_svga;
- sensor_init_width = 800;
- sensor_init_height = 600;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret,pid = 0;
+
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
if (sensor_ioctrl(icd, Sensor_PowerDown, 0) < 0) {
goto sensor_INIT_ERR;
}
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct sensor *sensor = to_sensor(client);
const struct sensor_datafmt *fmt;
- int ret = 0;
+ int ret = 0,set_w,set_h;
fmt = sensor_find_datafmt(mf->code, sensor_colour_fmts,
ARRAY_SIZE(sensor_colour_fmts));
else if (mf->width < SENSOR_MIN_WIDTH)
mf->width = SENSOR_MIN_WIDTH;
+ set_w = mf->width;
+ set_h = mf->height;
+
+ if (((set_w <= 176) && (set_h <= 144)) && sensor_qcif[0].reg)
+ {
+ set_w = 176;
+ set_h = 144;
+ }
+ else if (((set_w <= 320) && (set_h <= 240)) && sensor_qvga[0].reg)
+ {
+ set_w = 320;
+ set_h = 240;
+ }
+ else if (((set_w <= 352) && (set_h<= 288)) && sensor_cif[0].reg)
+ {
+ set_w = 352;
+ set_h = 288;
+ }
+ else if (((set_w <= 640) && (set_h <= 480)) && sensor_vga[0].reg)
+ {
+ set_w = 640;
+ set_h = 480;
+ }
+ else if (((set_w <= 800) && (set_h <= 600)) && sensor_svga[0].reg)
+ {
+ set_w = 800;
+ set_h = 600;
+ }
+ else if (((set_w <= 1280) && (set_h <= 720)) && sensor_720p[0].reg)
+ {
+ set_w = 1280;
+ set_h = 720;
+ }
+ else if (((set_w <= 1024) && (set_h <= 768)) && sensor_xga[0].reg)
+ {
+ set_w = 1024;
+ set_h = 768;
+ }
+ else if (((set_w <= 1280) && (set_h <= 1024)) && sensor_sxga[0].reg)
+ {
+ set_w = 1280;
+ set_h = 1024;
+ }
+ else if (((set_w <= 1600) && (set_h <= 1200)) && sensor_uxga[0].reg)
+ {
+ set_w = 1600;
+ set_h = 1200;
+ }
+ else
+ { /* ddl@rock-chips.com : Sensor output smallest size if isn't support app */
+ set_w = SENSOR_INIT_WIDTH;
+ set_h = SENSOR_INIT_HEIGHT;
+ }
+
+ mf->width = set_w;
+ mf->height = set_h;
mf->colorspace = fmt->colorspace;
return ret;
{
sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
-
+ sensor->sensor_gpio_res = NULL;
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS;i++) {
+ if (sensor->sensor_io_request->gpio_res[i].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[i].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[i];
+ }
+ }
+ if (sensor->sensor_gpio_res == NULL) {
+ SENSOR_TR("%s %s obtain gpio resource failed when RK29_CAM_SUBDEV_IOREQUEST \n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
#include "ov3640.h"
static int debug;
#define SENSOR_MIN_HEIGHT 144
#define SENSOR_MAX_WIDTH 2048
#define SENSOR_MAX_HEIGHT 1536
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 640 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 480
+#define SENSOR_INIT_WINSEQADR sensor_init_data
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_YUYV8_2X8
#define CONFIG_SENSOR_WhiteBalance 1
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 640;
-static s32 sensor_init_height = 480;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = sd->priv;
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
char value;
- int ret,pid = 0,i = 0,j=0;
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_vga;
- sensor_init_width = 640;
- sensor_init_height = 480;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret,pid = 0;
+
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
if (sensor_ioctrl(icd, Sensor_PowerDown, 0) < 0) {
goto sensor_INIT_ERR;
}
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
}
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ if (sensor->sensor_io_request->gpio_res[0].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[0].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[0];
+ } else if (sensor->sensor_io_request->gpio_res[1].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[1].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[1];
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
+#include <mach/rk29_camera.h>
#include "ov5640.h"
-#include <linux/vmalloc.h>
+
static int debug;
module_param(debug, int, S_IRUGO|S_IWUSR);
#define SENSOR_MIN_HEIGHT 144
#define SENSOR_MAX_WIDTH 2592
#define SENSOR_MAX_HEIGHT 1944
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 800 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 600
+#define SENSOR_INIT_WINSEQADR sensor_svga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_YUYV8_2X8
#define CONFIG_SENSOR_WhiteBalance 1
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_WRITE_REGS 1
#define WRITE_REGS_NUM 100
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
SENSOR_DG("%s %s Enter, cmd:0x%x \n",SENSOR_NAME_STRING(), __FUNCTION__,sensor_work->cmd);
mutex_lock(&sensor->wq_lock);
+ if((sensor_work->cmd != WqCmd_af_init) && (sensor->info_priv.auto_focus != SENSOR_AF_MODE_AUTO))
+ {
+ SENSOR_TR("auto focus status is wrong ,do nothing !");
+ goto set_end;
+ }
switch (sensor_work->cmd)
{
case WqCmd_af_init:
SENSOR_TR("Unknow command(%d) in %s af workqueue!",sensor_work->cmd,SENSOR_NAME_STRING());
break;
}
-
+set_end:
if (sensor_work->wait == false) {
kfree((void*)sensor_work);
} else {
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 800;
-static s32 sensor_init_height = 600;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = sensor_init_data;
-static struct reginfo* sensor_init_winseq_p = sensor_svga;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
char value;
- int ret,pid = 0,i = 0,j=0;
- //if val ==1,mean that sensor need to be reinit
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_svga;
- sensor_init_width = 800;
- sensor_init_height = 600;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret,pid = 0;
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
goto sensor_INIT_ERR;
}
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0) {
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
goto sensor_INIT_ERR;
}
#endif
} else if (enable == 0) {
- sensor->info_priv.enable = 0;
#if CONFIG_SENSOR_Focus
flush_workqueue(sensor->sensor_wq);
#endif
+ sensor->info_priv.enable = 0;
}
return 0;
}
}
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ sensor->sensor_gpio_res = NULL;
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS;i++) {
+ if (sensor->sensor_io_request->gpio_res[i].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[i].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[i];
+ }
+ }
+ if (sensor->sensor_gpio_res == NULL) {
+ SENSOR_TR("%s %s obtain gpio resource failed when RK29_CAM_SUBDEV_IOREQUEST \n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
+#include <mach/rk29_camera.h>
#include "ov5640.h"
-#include <linux/vmalloc.h>
+
static int debug = 1;
module_param(debug, int, S_IRUGO|S_IWUSR);
#define SENSOR_MIN_HEIGHT 144
#define SENSOR_MAX_WIDTH 2592
#define SENSOR_MAX_HEIGHT 1944
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 800 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 600
+#define SENSOR_INIT_WINSEQADR sensor_svga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_YUYV8_2X8
#define CONFIG_SENSOR_WhiteBalance 1
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_Effect 1
#define CONFIG_SENSOR_Scene 1
#define CONFIG_SENSOR_DigitalZoom 0
-#define CONFIG_SENSOR_Exposure 0
+#define CONFIG_SENSOR_Exposure 1
#define CONFIG_SENSOR_Flash 1
#define CONFIG_SENSOR_Mirror 0
#define CONFIG_SENSOR_Flip 0
#define CONFIG_SENSOR_WRITE_REGS 1
#define WRITE_REGS_NUM 100
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#if CONFIG_SENSOR_Exposure
static struct reginfo sensor_Exposure0[]=
{
+ {0x3a0f, 0x10},
+ {0x3a10, 0x08},
+ {0x3a1b, 0x10},
+ {0x3a1e, 0x08},
+ {0x3a11, 0x20},
+ {0x3a1f, 0x10},
{SEQUENCE_END, 0x00}
};
static struct reginfo sensor_Exposure1[]=
{
+ {0x3a0f, 0x20},
+ {0x3a10, 0x18},
+ {0x3a11, 0x41},
+ {0x3a1b, 0x20},
+ {0x3a1e, 0x18},
+ {0x3a1f, 0x10},
{SEQUENCE_END, 0x00}
};
static struct reginfo sensor_Exposure2[]=
{
+ {0x3a0f, 0x30},
+ {0x3a10, 0x28},
+ {0x3a11, 0x61},
+ {0x3a1b, 0x30},
+ {0x3a1e, 0x28},
+ {0x3a1f, 0x10},
{SEQUENCE_END, 0x00}
};
static struct reginfo sensor_Exposure3[]=
{
+ {0x3a0f, 0x38},
+ {0x3a10, 0x30},
+ {0x3a11, 0x61},
+ {0x3a1b, 0x38},
+ {0x3a1e, 0x30},
+ {0x3a1f, 0x10},
{SEQUENCE_END, 0x00}
};
static struct reginfo sensor_Exposure4[]=
{
+ {0x3a0f, 0x40},
+ {0x3a10, 0x38},
+ {0x3a11, 0x71},
+ {0x3a1b, 0x40},
+ {0x3a1e, 0x38},
+ {0x3a1f, 0x10},
{SEQUENCE_END, 0x00}
};
static struct reginfo sensor_Exposure5[]=
{
+ {0x3a0f, 0x50},
+ {0x3a10, 0x48},
+ {0x3a11, 0x90},
+ {0x3a1b, 0x50},
+ {0x3a1e, 0x48},
+ {0x3a1f, 0x20},
{SEQUENCE_END, 0x00}
};
static struct reginfo sensor_Exposure6[]=
{
+ {0x3a0f, 0x60},
+ {0x3a10, 0x58},
+ {0x3a11, 0xa0},
+ {0x3a1b, 0x60},
+ {0x3a1e, 0x58},
+ {0x3a1f, 0x20},
{SEQUENCE_END, 0x00}
};
static struct reginfo *sensor_ExposureSeqe[] = {sensor_Exposure0, sensor_Exposure1, sensor_Exposure2, sensor_Exposure3,
.id = V4L2_CID_EXPOSURE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Exposure Control",
- .minimum = 0,
- .maximum = 6,
+ .minimum = -3,
+ .maximum = 3,
.step = 1,
.default_value = 0,
},
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 800;
-static s32 sensor_init_height = 600;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = sensor_init_data;
-static struct reginfo* sensor_init_winseq_p = sensor_svga;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
char value;
- int ret,pid = 0,i = 0,j=0;
- //if val ==1,mean that sensor need to be reinit
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_svga;
- sensor_init_width = 800;
- sensor_init_height = 600;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret,pid = 0;
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
goto sensor_INIT_ERR;
}
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0) {
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
goto sensor_INIT_ERR;
}
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ if (sensor->sensor_io_request->gpio_res[0].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[0].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[0];
+ } else if (sensor->sensor_io_request->gpio_res[1].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[1].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[1];
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
#include "ov5642.h"
static int debug;
#define SENSOR_MIN_HEIGHT 144
#define SENSOR_MAX_WIDTH 2592
#define SENSOR_MAX_HEIGHT 1944
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 800 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 600
+#define SENSOR_INIT_WINSEQADR sensor_svga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_UYVY8_2X8
#define CONFIG_SENSOR_WhiteBalance 1
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
#define StepFocus_Nearest_Tag 0x04
#define StepFocus_Spec_Tag 0x10
#endif
+
/* init 800X600 SVGA */
static struct reginfo sensor_init_data[] =
{
SENSOR_DG("%s %s Enter, cmd:0x%x \n",SENSOR_NAME_STRING(), __FUNCTION__,sensor_work->cmd);
mutex_lock(&sensor->wq_lock);
+ if((sensor_work->cmd != WqCmd_af_init) && (sensor->info_priv.auto_focus != SENSOR_AF_MODE_AUTO))
+ {
+ SENSOR_TR("auto focus status is wrong ,do nothing !");
+ goto set_end;
+ }
switch (sensor_work->cmd)
{
case WqCmd_af_init:
SENSOR_TR("Unknow command(%d) in %s af workqueue!",sensor_work->cmd,SENSOR_NAME_STRING());
break;
}
-
+set_end:
if (sensor_work->wait == false) {
kfree((void*)sensor_work);
} else {
sensor_power_end:
return ret;
}
-
-static s32 sensor_init_width = 800;
-static s32 sensor_init_height = 600;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
char value;
- int ret,pid = 0,i = 0,j=0;
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_svga;
- sensor_init_width = 800;
- sensor_init_height = 600;
- if (tmp_plat_data != NULL) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && (i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret,pid = 0;
+
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
if (sensor_ioctrl(icd, Sensor_PowerDown, 0) < 0) {
goto sensor_INIT_ERR;
}
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0) {
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
goto sensor_INIT_ERR;
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct sensor *sensor = to_sensor(client);
const struct sensor_datafmt *fmt;
- int ret = 0;
+ int ret = 0,set_w,set_h;
fmt = sensor_find_datafmt(mf->code, sensor_colour_fmts,
ARRAY_SIZE(sensor_colour_fmts));
else if (mf->width < SENSOR_MIN_WIDTH)
mf->width = SENSOR_MIN_WIDTH;
+ set_w = mf->width;
+ set_h = mf->height;
+
+ if (((set_w <= 176) && (set_h <= 144)) && sensor_qcif[0].reg)
+ {
+ set_w = 176;
+ set_h = 144;
+ }
+ else if (((set_w <= 320) && (set_h <= 240)) && sensor_qvga[0].reg)
+ {
+ set_w = 320;
+ set_h = 240;
+ }
+ else if (((set_w <= 352) && (set_h<= 288)) && sensor_cif[0].reg)
+ {
+ set_w = 352;
+ set_h = 288;
+ }
+ else if (((set_w <= 640) && (set_h <= 480)) && sensor_vga[0].reg)
+ {
+ set_w = 640;
+ set_h = 480;
+ }
+ else if (((set_w <= 800) && (set_h <= 600)) && sensor_svga[0].reg)
+ {
+ set_w = 800;
+ set_h = 600;
+ }
+ else if (((set_w <= 1024) && (set_h <= 768)) && sensor_xga[0].reg)
+ {
+ set_w = 1024;
+ set_h = 768;
+ }
+ else if (((set_w <= 1280) && (set_h <= 720)) && sensor_720p[0].reg)
+ {
+ set_w = 1280;
+ set_h = 720;
+ }
+ else if (((set_w <= 1280) && (set_h <= 1024)) && sensor_sxga[0].reg)
+ {
+ set_w = 1280;
+ set_h = 1024;
+ }
+ else if (((set_w <= 1600) && (set_h <= 1200)) && sensor_uxga[0].reg)
+ {
+ set_w = 1600;
+ set_h = 1200;
+ }
+ else if (((set_w <= 1920) && (set_h <= 1080)) && sensor_1080p[0].reg)
+ {
+ set_w = 1920;
+ set_h = 1080;
+ }
+ else if (((set_w <= 2048) && (set_h <= 1536)) && sensor_qxga[0].reg)
+ {
+ set_w = 2048;
+ set_h = 1536;
+ }
+ else if (((set_w <= 2592) && (set_h <= 1944)) && sensor_qsxga[0].reg)
+ {
+ set_w = 2592;
+ set_h = 1944;
+ }
+ else
+ {
+ set_w = SENSOR_INIT_WIDTH;
+ set_h = SENSOR_INIT_HEIGHT;
+ }
+
+ mf->width = set_w;
+ mf->height = set_h;
+
mf->colorspace = fmt->colorspace;
return ret;
}
#endif
} else if (enable == 0) {
- sensor->info_priv.enable = 0;
#if CONFIG_SENSOR_Focus
flush_workqueue(sensor->sensor_wq);
#endif
+ sensor->info_priv.enable = 0;
}
return 0;
}
break;
}
case RK29_CAM_SUBDEV_IOREQUEST:
- {
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
-
+ {
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_gpio_res = NULL;
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS;i++) {
+ if (sensor->sensor_io_request->gpio_res[i].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[i].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[i];
+ }
+ }
+ if (sensor->sensor_gpio_res == NULL) {
+ SENSOR_TR("%s %s obtain gpio resource failed when RK29_CAM_SUBDEV_IOREQUEST \n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
+
static int debug;
module_param(debug, int, S_IRUGO|S_IWUSR);
#define SENSOR_MIN_HEIGHT 480//144
#define SENSOR_MAX_WIDTH 640
#define SENSOR_MAX_HEIGHT 480
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 640 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 480
+#define SENSOR_INIT_WINSEQADR sensor_vga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_YUYV8_2X8
#define CONFIG_SENSOR_WhiteBalance 0
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
u8 reg;
u8 val;
};
-/* init 800*600 SVGA */
+
+/* init 640X480 VGA */
static struct reginfo sensor_init_data[] =
{
{0x12, 0x80},
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 800;
-static s32 sensor_init_height = 600;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct sensor *sensor = to_sensor(client);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
- int ret,pid = 0,i = 0,j=0;
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_svga;
- sensor_init_width = 800;
- sensor_init_height = 600;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret;
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
mdelay(5); //delay 5 microseconds
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct sensor *sensor = to_sensor(client);
const struct sensor_datafmt *fmt;
- int ret = 0;
+ int ret = 0,set_w,set_h;
fmt = sensor_find_datafmt(mf->code, sensor_colour_fmts,
ARRAY_SIZE(sensor_colour_fmts));
mf->width = SENSOR_MAX_WIDTH;
else if (mf->width < SENSOR_MIN_WIDTH)
mf->width = SENSOR_MIN_WIDTH;
+
+ set_w = mf->width;
+ set_h = mf->height;
+
+ if (((set_w <= 176) && (set_h <= 144)) && sensor_qcif[0].reg)
+ {
+ set_w = 176;
+ set_h = 144;
+ }
+ else if (((set_w <= 320) && (set_h <= 240)) && sensor_qvga[0].reg)
+ {
+ set_w = 320;
+ set_h = 240;
+ }
+ else if (((set_w <= 352) && (set_h<= 288)) && sensor_cif[0].reg)
+ {
+ set_w = 352;
+ set_h = 288;
+ }
+ else if (((set_w <= 640) && (set_h <= 480)) && sensor_vga[0].reg)
+ {
+ set_w = 640;
+ set_h = 480;
+ }
+ else if (((set_w <= 800) && (set_h <= 600)) && sensor_svga[0].reg)
+ {
+ set_w = 800;
+ set_h = 600;
+ }
+ else if (((set_w <= 1280) && (set_h <= 1024)) && sensor_sxga[0].reg)
+ {
+ set_w = 1280;
+ set_h = 1024;
+ }
+ else
+ {
+ set_w = SENSOR_INIT_WIDTH;
+ set_h = SENSOR_INIT_HEIGHT;
+ }
+ mf->width = set_w;
+ mf->height = set_h;
mf->colorspace = fmt->colorspace;
return ret;
case RK29_CAM_SUBDEV_IOREQUEST:
{
sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ if (sensor->sensor_io_request != NULL) {
+ sensor->sensor_gpio_res = NULL;
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS;i++) {
+ if (sensor->sensor_io_request->gpio_res[i].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[i].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[i];
+ }
+ }
+ if (sensor->sensor_gpio_res == NULL) {
+ SENSOR_TR("%s %s obtain gpio resource failed when RK29_CAM_SUBDEV_IOREQUEST \n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
+
static int debug;
module_param(debug, int, S_IRUGO|S_IWUSR);
#define SENSOR_MIN_HEIGHT 144
#define SENSOR_MAX_WIDTH 640
#define SENSOR_MAX_HEIGHT 480
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 640 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 480
+#define SENSOR_INIT_WINSEQADR sensor_vga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_YUYV8_2X8
#define CONFIG_SENSOR_WhiteBalance 1
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
u8 reg;
u8 val;
};
-
-/* init 640*480 VGA */
+/* init 640X480 VGA */
static struct reginfo sensor_init_data[] =
{
{0x12, 0x80},
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 640;
-static s32 sensor_init_height = 480;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct sensor *sensor = to_sensor(client);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
- int ret,pid = 0,i = 0,j=0;
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_vga;
- sensor_init_width = 640;
- sensor_init_height = 480;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret;
+
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
if (sensor_ioctrl(icd, Sensor_PowerDown, 0) < 0) {
}
mdelay(5); //delay 5 microseconds
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ if (sensor->sensor_io_request->gpio_res[0].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[0].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[0];
+ } else if (sensor->sensor_io_request->gpio_res[1].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[1].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[1];
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#define PMEM_CAMIPP_NECESSARY 0x800000\r
#elif (PMEM_CAM_FULL_RESOLUTION == 0x300000)\r
#define PMEM_CAM_NECESSARY 0xe00000 /* 1280*720*1.5*4(preview) + 4.5M(capture raw) + 3M(jpeg encode output) */\r
-#define PMEM_CAMIPP_NECESSARY 0x500000\r
+#define PMEM_CAMIPP_NECESSARY 0x600000\r
#elif (PMEM_CAM_FULL_RESOLUTION == 0x200000) /* 1280*720*1.5*4(preview) + 3M(capture raw) + 3M(jpeg encode output) */\r
#define PMEM_CAM_NECESSARY 0xc00000\r
-#define PMEM_CAMIPP_NECESSARY 0x400000\r
+#define PMEM_CAMIPP_NECESSARY 0x600000\r
#elif ((PMEM_CAM_FULL_RESOLUTION == 0x100000) || (PMEM_CAM_FULL_RESOLUTION == 0x130000))\r
#define PMEM_CAM_NECESSARY 0x800000 /* 800*600*1.5*4(preview) + 2M(capture raw) + 2M(jpeg encode output) */\r
#define PMEM_CAMIPP_NECESSARY 0x400000\r
#define PMEM_CAM_NECESSARY 0x1200000\r
#define PMEM_CAMIPP_NECESSARY 0x800000\r
#endif\r
+\r
+#ifdef CONFIG_VIDEO_RK29_CAMMEM_ION\r
+#undef PMEM_CAM_NECESSARY\r
+#define PMEM_CAM_NECESSARY 0x00000000\r
+#endif\r
+\r
/*---------------- Camera Sensor Fixed Macro End ------------------------*/\r
#else //#ifdef CONFIG_VIDEO_RK29 \r
#define PMEM_CAM_NECESSARY 0x00000000\r
*****************************************************************************************/\r
#ifdef CONFIG_VIDEO_RK29 \r
static int camera_debug;\r
-module_param(camera_debug, int, S_IRUGO|S_IWUSR);\r
+module_param(camera_debug, int, S_IRUGO|S_IWUSR|S_IWGRP);\r
\r
#define ddprintk(level, fmt, arg...) do { \\r
if (camera_debug >= level) \\r
\r
#define dprintk(format, ...) ddprintk(1, format, ## __VA_ARGS__) \r
\r
-#define SENSOR_NAME_0 STR(CONFIG_SENSOR_0) /* back camera sensor */\r
-#define SENSOR_NAME_1 STR(CONFIG_SENSOR_1) /* front camera sensor */\r
+#define SENSOR_NAME_0 STR(CONFIG_SENSOR_0) /* back camera sensor 0 */\r
#define SENSOR_DEVICE_NAME_0 STR(CONS(CONFIG_SENSOR_0, _back))\r
+#ifdef CONFIG_SENSOR_01\r
+#define SENSOR_NAME_01 STR(CONFIG_SENSOR_01) /* back camera sensor 1 */\r
+#define SENSOR_DEVICE_NAME_01 STR(CONS(CONFIG_SENSOR_01, _back_1))\r
+#endif\r
+#ifdef CONFIG_SENSOR_02\r
+#define SENSOR_NAME_02 STR(CONFIG_SENSOR_02) /* back camera sensor 2 */\r
+#define SENSOR_DEVICE_NAME_02 STR(CONS(CONFIG_SENSOR_02, _back_2))\r
+#endif\r
+#define SENSOR_NAME_1 STR(CONFIG_SENSOR_1) /* front camera sensor 0 */\r
#define SENSOR_DEVICE_NAME_1 STR(CONS(CONFIG_SENSOR_1, _front))\r
+#ifdef CONFIG_SENSOR_11\r
+#define SENSOR_NAME_11 STR(CONFIG_SENSOR_11) /* front camera sensor 1 */\r
+#define SENSOR_DEVICE_NAME_11 STR(CONS(CONFIG_SENSOR_11, _front_1))\r
+#endif\r
+#ifdef CONFIG_SENSOR_12\r
+#define SENSOR_NAME_12 STR(CONFIG_SENSOR_12) /* front camera sensor 2 */\r
+#define SENSOR_DEVICE_NAME_12 STR(CONS(CONFIG_SENSOR_12, _front_2))\r
+#endif\r
+\r
\r
static int rk29_sensor_io_init(void);\r
static int rk29_sensor_io_deinit(int sensor);\r
.gpio_flash = CONFIG_SENSOR_FALSH_PIN_0,\r
.gpio_flag = (CONFIG_SENSOR_POWERACTIVE_LEVEL_0|CONFIG_SENSOR_RESETACTIVE_LEVEL_0|CONFIG_SENSOR_POWERDNACTIVE_LEVEL_0|CONFIG_SENSOR_FLASHACTIVE_LEVEL_0),\r
.gpio_init = 0, \r
- .dev_name = SENSOR_DEVICE_NAME_0,\r
+ .dev_name = SENSOR_DEVICE_NAME_0, \r
+ }, {\r
+ #ifdef CONFIG_SENSOR_01\r
+ .gpio_reset = CONFIG_SENSOR_RESET_PIN_01,\r
+ .gpio_power = CONFIG_SENSOR_POWER_PIN_01,\r
+ .gpio_powerdown = CONFIG_SENSOR_POWERDN_PIN_01,\r
+ .gpio_flash = CONFIG_SENSOR_FALSH_PIN_01,\r
+ .gpio_flag = (CONFIG_SENSOR_POWERACTIVE_LEVEL_01|CONFIG_SENSOR_RESETACTIVE_LEVEL_01|CONFIG_SENSOR_POWERDNACTIVE_LEVEL_01|CONFIG_SENSOR_FLASHACTIVE_LEVEL_01),\r
+ .gpio_init = 0, \r
+ .dev_name = SENSOR_DEVICE_NAME_01,\r
+ #else\r
+ .gpio_reset = INVALID_GPIO,\r
+ .gpio_power = INVALID_GPIO,\r
+ .gpio_powerdown = INVALID_GPIO,\r
+ .gpio_flash = INVALID_GPIO,\r
+ .gpio_flag = 0,\r
+ .gpio_init = 0, \r
+ .dev_name = NULL,\r
+ #endif\r
+ }, {\r
+ #ifdef CONFIG_SENSOR_02\r
+ .gpio_reset = CONFIG_SENSOR_RESET_PIN_02,\r
+ .gpio_power = CONFIG_SENSOR_POWER_PIN_02,\r
+ .gpio_powerdown = CONFIG_SENSOR_POWERDN_PIN_02,\r
+ .gpio_flash = CONFIG_SENSOR_FALSH_PIN_02,\r
+ .gpio_flag = (CONFIG_SENSOR_POWERACTIVE_LEVEL_02|CONFIG_SENSOR_RESETACTIVE_LEVEL_02|CONFIG_SENSOR_POWERDNACTIVE_LEVEL_02|CONFIG_SENSOR_FLASHACTIVE_LEVEL_02),\r
+ .gpio_init = 0, \r
+ .dev_name = SENSOR_DEVICE_NAME_02, \r
+ #else\r
+ .gpio_reset = INVALID_GPIO,\r
+ .gpio_power = INVALID_GPIO,\r
+ .gpio_powerdown = INVALID_GPIO,\r
+ .gpio_flash = INVALID_GPIO,\r
+ .gpio_flag = 0,\r
+ .gpio_init = 0, \r
+ .dev_name = NULL,\r
+ #endif\r
}, {\r
.gpio_reset = CONFIG_SENSOR_RESET_PIN_1,\r
.gpio_power = CONFIG_SENSOR_POWER_PIN_1,\r
.gpio_flag = (CONFIG_SENSOR_POWERACTIVE_LEVEL_1|CONFIG_SENSOR_RESETACTIVE_LEVEL_1|CONFIG_SENSOR_POWERDNACTIVE_LEVEL_1|CONFIG_SENSOR_FLASHACTIVE_LEVEL_1),\r
.gpio_init = 0,\r
.dev_name = SENSOR_DEVICE_NAME_1,\r
+ },{\r
+ #ifdef CONFIG_SENSOR_11\r
+ .gpio_reset = CONFIG_SENSOR_RESET_PIN_11,\r
+ .gpio_power = CONFIG_SENSOR_POWER_PIN_11,\r
+ .gpio_powerdown = CONFIG_SENSOR_POWERDN_PIN_11,\r
+ .gpio_flash = CONFIG_SENSOR_FALSH_PIN_11,\r
+ .gpio_flag = (CONFIG_SENSOR_POWERACTIVE_LEVEL_11|CONFIG_SENSOR_RESETACTIVE_LEVEL_11|CONFIG_SENSOR_POWERDNACTIVE_LEVEL_11|CONFIG_SENSOR_FLASHACTIVE_LEVEL_11),\r
+ .gpio_init = 0,\r
+ .dev_name = SENSOR_DEVICE_NAME_11,\r
+ #else\r
+ .gpio_reset = INVALID_GPIO,\r
+ .gpio_power = INVALID_GPIO,\r
+ .gpio_powerdown = INVALID_GPIO,\r
+ .gpio_flash = INVALID_GPIO,\r
+ .gpio_flag = 0,\r
+ .gpio_init = 0, \r
+ .dev_name = NULL,\r
+ #endif \r
+ }, {\r
+ #ifdef CONFIG_SENSOR_12\r
+ .gpio_reset = CONFIG_SENSOR_RESET_PIN_12,\r
+ .gpio_power = CONFIG_SENSOR_POWER_PIN_12,\r
+ .gpio_powerdown = CONFIG_SENSOR_POWERDN_PIN_12,\r
+ .gpio_flash = CONFIG_SENSOR_FALSH_PIN_12,\r
+ .gpio_flag = (CONFIG_SENSOR_POWERACTIVE_LEVEL_12|CONFIG_SENSOR_RESETACTIVE_LEVEL_12|CONFIG_SENSOR_POWERDNACTIVE_LEVEL_12|CONFIG_SENSOR_FLASHACTIVE_LEVEL_12),\r
+ .gpio_init = 0,\r
+ .dev_name = SENSOR_DEVICE_NAME_12,\r
+ #else\r
+ .gpio_reset = INVALID_GPIO,\r
+ .gpio_power = INVALID_GPIO,\r
+ .gpio_powerdown = INVALID_GPIO,\r
+ .gpio_flash = INVALID_GPIO,\r
+ .gpio_flag = 0,\r
+ .gpio_init = 0, \r
+ .dev_name = NULL,\r
+ #endif\r
}\r
},\r
#ifdef CONFIG_VIDEO_RK29_WORK_IPP\r
.info = {\r
{\r
.dev_name = SENSOR_DEVICE_NAME_0,\r
- .orientation = CONFIG_SENSOR_ORIENTATION_0, \r
+ .orientation = CONFIG_SENSOR_ORIENTATION_0, \r
+ #ifdef CONFIG_SENSOR_01\r
},{\r
+ .dev_name = SENSOR_DEVICE_NAME_01,\r
+ .orientation = CONFIG_SENSOR_ORIENTATION_01, \r
+ #else\r
+ },{\r
+ .dev_name = NULL,\r
+ .orientation = 0x00, \r
+ #endif\r
+ #ifdef CONFIG_SENSOR_02\r
+ },{\r
+ .dev_name = SENSOR_DEVICE_NAME_02,\r
+ .orientation = CONFIG_SENSOR_ORIENTATION_02, \r
+ #else\r
+ },{\r
+ .dev_name = NULL,\r
+ .orientation = 0x00, \r
+ #endif\r
+ },{\r
.dev_name = SENSOR_DEVICE_NAME_1,\r
.orientation = CONFIG_SENSOR_ORIENTATION_1,\r
- }\r
+ #ifdef CONFIG_SENSOR_11 \r
+ },{\r
+ .dev_name = SENSOR_DEVICE_NAME_11,\r
+ .orientation = CONFIG_SENSOR_ORIENTATION_11, \r
+ #else\r
+ },{\r
+ .dev_name = NULL,\r
+ .orientation = 0x00, \r
+ #endif\r
+ #ifdef CONFIG_SENSOR_12\r
+ },{\r
+ .dev_name = SENSOR_DEVICE_NAME_12,\r
+ .orientation = CONFIG_SENSOR_ORIENTATION_12, \r
+ #else\r
+ },{\r
+ .dev_name = NULL,\r
+ .orientation = 0x00, \r
+ #endif\r
+ }\r
}\r
};\r
\r
int ret = 0;\r
\r
if (camera_power != INVALID_GPIO) {\r
- if (camera_io_init & RK29_CAM_POWERACTIVE_MASK) {\r
+ if (camera_io_init & RK29_CAM_POWERACTIVE_MASK) {\r
if (on) {\r
gpio_set_value(camera_power, ((camera_ioflag&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));\r
dprintk("%s..%s..PowerPin=%d ..PinLevel = %x \n",__FUNCTION__,res->dev_name, camera_power, ((camera_ioflag&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));\r
return ret;\r
}\r
\r
-\r
+static void rk29_sensor_fps_get(int idx, unsigned int *val, int w, int h)\r
+{\r
+ switch (idx)\r
+ {\r
+ case 0:\r
+ {\r
+ if ((w==176) && (h==144)) {\r
+ *val = CONFIG_SENSOR_QCIF_FPS_FIXED_0;\r
+ #ifdef CONFIG_SENSOR_240X160_FPS_FIXED_0\r
+ } else if ((w==240) && (h==160)) {\r
+ *val = CONFIG_SENSOR_240X160_FPS_FIXED_0;\r
+ #endif\r
+ } else if ((w==320) && (h==240)) {\r
+ *val = CONFIG_SENSOR_QVGA_FPS_FIXED_0;\r
+ } else if ((w==352) && (h==288)) {\r
+ *val = CONFIG_SENSOR_CIF_FPS_FIXED_0;\r
+ } else if ((w==640) && (h==480)) {\r
+ *val = CONFIG_SENSOR_VGA_FPS_FIXED_0;\r
+ } else if ((w==720) && (h==480)) {\r
+ *val = CONFIG_SENSOR_480P_FPS_FIXED_0;\r
+ } else if ((w==1280) && (h==720)) {\r
+ *val = CONFIG_SENSOR_720P_FPS_FIXED_0;\r
+ }\r
+ break;\r
+ }\r
+ #ifdef CONFIG_SENSOR_01\r
+ case 1:\r
+ {\r
+ if ((w==176) && (h==144)) {\r
+ *val = CONFIG_SENSOR_QCIF_FPS_FIXED_01;\r
+ #ifdef CONFIG_SENSOR_240X160_FPS_FIXED_01\r
+ } else if ((w==240) && (h==160)) {\r
+ *val = CONFIG_SENSOR_240X160_FPS_FIXED_01;\r
+ #endif\r
+ } else if ((w==320) && (h==240)) {\r
+ *val = CONFIG_SENSOR_QVGA_FPS_FIXED_01;\r
+ } else if ((w==352) && (h==288)) {\r
+ *val = CONFIG_SENSOR_CIF_FPS_FIXED_01;\r
+ } else if ((w==640) && (h==480)) {\r
+ *val = CONFIG_SENSOR_VGA_FPS_FIXED_01;\r
+ } else if ((w==720) && (h==480)) {\r
+ *val = CONFIG_SENSOR_480P_FPS_FIXED_01;\r
+ } else if ((w==1280) && (h==720)) {\r
+ *val = CONFIG_SENSOR_720P_FPS_FIXED_01;\r
+ }\r
+ break;\r
+ }\r
+ #endif\r
+ #ifdef CONFIG_SENSOR_02\r
+ case 2:\r
+ {\r
+ if ((w==176) && (h==144)) {\r
+ *val = CONFIG_SENSOR_QCIF_FPS_FIXED_02;\r
+ #ifdef CONFIG_SENSOR_240X160_FPS_FIXED_02\r
+ } else if ((w==240) && (h==160)) {\r
+ *val = CONFIG_SENSOR_240X160_FPS_FIXED_02;\r
+ #endif\r
+ } else if ((w==320) && (h==240)) {\r
+ *val = CONFIG_SENSOR_QVGA_FPS_FIXED_02;\r
+ } else if ((w==352) && (h==288)) {\r
+ *val = CONFIG_SENSOR_CIF_FPS_FIXED_02;\r
+ } else if ((w==640) && (h==480)) {\r
+ *val = CONFIG_SENSOR_VGA_FPS_FIXED_02;\r
+ } else if ((w==720) && (h==480)) {\r
+ *val = CONFIG_SENSOR_480P_FPS_FIXED_02;\r
+ } else if ((w==1280) && (h==720)) {\r
+ *val = CONFIG_SENSOR_720P_FPS_FIXED_02;\r
+ }\r
+ break;\r
+ }\r
+ #endif\r
+ \r
+ case 3:\r
+ {\r
+ if ((w==176) && (h==144)) {\r
+ *val = CONFIG_SENSOR_QCIF_FPS_FIXED_1;\r
+ #ifdef CONFIG_SENSOR_240X160_FPS_FIXED_1\r
+ } else if ((w==240) && (h==160)) {\r
+ *val = CONFIG_SENSOR_240X160_FPS_FIXED_1;\r
+ #endif\r
+ } else if ((w==320) && (h==240)) {\r
+ *val = CONFIG_SENSOR_QVGA_FPS_FIXED_1;\r
+ } else if ((w==352) && (h==288)) {\r
+ *val = CONFIG_SENSOR_CIF_FPS_FIXED_1;\r
+ } else if ((w==640) && (h==480)) {\r
+ *val = CONFIG_SENSOR_VGA_FPS_FIXED_1;\r
+ } else if ((w==720) && (h==480)) {\r
+ *val = CONFIG_SENSOR_480P_FPS_FIXED_1;\r
+ } else if ((w==1280) && (h==720)) {\r
+ *val = CONFIG_SENSOR_720P_FPS_FIXED_1;\r
+ }\r
+ break;\r
+ }\r
+ #ifdef CONFIG_SENSOR_11\r
+ case 4:\r
+ {\r
+ if ((w==176) && (h==144)) {\r
+ *val = CONFIG_SENSOR_QCIF_FPS_FIXED_11;\r
+ #ifdef CONFIG_SENSOR_240X160_FPS_FIXED_11\r
+ } else if ((w==240) && (h==160)) {\r
+ *val = CONFIG_SENSOR_240X160_FPS_FIXED_11;\r
+ #endif\r
+ } else if ((w==320) && (h==240)) {\r
+ *val = CONFIG_SENSOR_QVGA_FPS_FIXED_11;\r
+ } else if ((w==352) && (h==288)) {\r
+ *val = CONFIG_SENSOR_CIF_FPS_FIXED_11;\r
+ } else if ((w==640) && (h==480)) {\r
+ *val = CONFIG_SENSOR_VGA_FPS_FIXED_11;\r
+ } else if ((w==720) && (h==480)) {\r
+ *val = CONFIG_SENSOR_480P_FPS_FIXED_11;\r
+ } else if ((w==1280) && (h==720)) {\r
+ *val = CONFIG_SENSOR_720P_FPS_FIXED_11;\r
+ }\r
+ break;\r
+ }\r
+ #endif\r
+ #ifdef CONFIG_SENSOR_12\r
+ case 5:\r
+ {\r
+ if ((w==176) && (h==144)) {\r
+ *val = CONFIG_SENSOR_QCIF_FPS_FIXED_12;\r
+ #ifdef CONFIG_SENSOR_240X160_FPS_FIXED_12\r
+ } else if ((w==240) && (h==160)) {\r
+ *val = CONFIG_SENSOR_240X160_FPS_FIXED_12;\r
+ #endif\r
+ } else if ((w==320) && (h==240)) {\r
+ *val = CONFIG_SENSOR_QVGA_FPS_FIXED_12;\r
+ } else if ((w==352) && (h==288)) {\r
+ *val = CONFIG_SENSOR_CIF_FPS_FIXED_12;\r
+ } else if ((w==640) && (h==480)) {\r
+ *val = CONFIG_SENSOR_VGA_FPS_FIXED_12;\r
+ } else if ((w==720) && (h==480)) {\r
+ *val = CONFIG_SENSOR_480P_FPS_FIXED_12;\r
+ } else if ((w==1280) && (h==720)) {\r
+ *val = CONFIG_SENSOR_720P_FPS_FIXED_12;\r
+ }\r
+ break;\r
+ }\r
+ #endif\r
+ default:\r
+ printk(KERN_ERR"rk29_cam_io: sensor-%d have not been define in board file!",idx);\r
+ }\r
+}\r
static int rk29_sensor_io_init(void)\r
{\r
int ret = 0, i,j;\r
if (sensor_ioctl_cb.sensor_flash_cb == NULL)\r
sensor_ioctl_cb.sensor_flash_cb = sensor_flash_default_cb;\r
\r
- for (i=0; i<2; i++) {\r
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS; i++) {\r
+ if (rk29_camera_platform_data.gpio_res[i].dev_name == NULL)\r
+ continue;\r
+ \r
camera_reset = rk29_camera_platform_data.gpio_res[i].gpio_reset;\r
camera_power = rk29_camera_platform_data.gpio_res[i].gpio_power;\r
camera_powerdown = rk29_camera_platform_data.gpio_res[i].gpio_powerdown;\r
printk("%s..%s..power pin(%d) init failed\n",__FUNCTION__,rk29_camera_platform_data.gpio_res[i].dev_name,camera_power);\r
goto sensor_io_int_loop_end;\r
} else {\r
- if (camera_power != rk29_camera_platform_data.gpio_res[0].gpio_power) {\r
+ for (j=0; j<i; j++) {\r
+ if (camera_power == rk29_camera_platform_data.gpio_res[j].gpio_power)\r
+ break;\r
+ }\r
+ if (i==j) {\r
printk("%s..%s..power pin(%d) init failed\n",__FUNCTION__,rk29_camera_platform_data.gpio_res[i].dev_name,camera_power);\r
goto sensor_io_int_loop_end;\r
}\r
if (camera_reset != INVALID_GPIO) {\r
ret = gpio_request(camera_reset, "camera reset");\r
if (ret) {\r
- printk("%s..%s..reset pin(%d) init failed\n",__FUNCTION__,rk29_camera_platform_data.gpio_res[i].dev_name,camera_reset);\r
- goto sensor_io_int_loop_end;\r
+ if (i==1) {\r
+ if ((camera_reset == rk29_camera_platform_data.gpio_res[0].gpio_reset) \r
+ || (camera_reset == rk29_camera_platform_data.gpio_res[2].gpio_reset)) {\r
+ ret = 0;\r
+ }\r
+ }\r
+ if (i==2) {\r
+ if ((camera_reset == rk29_camera_platform_data.gpio_res[0].gpio_reset) \r
+ || (camera_reset == rk29_camera_platform_data.gpio_res[1].gpio_reset)) {\r
+ ret = 0;\r
+ }\r
+ }\r
+ if (i==4) {\r
+ if ((camera_reset == rk29_camera_platform_data.gpio_res[3].gpio_reset) \r
+ || (camera_reset == rk29_camera_platform_data.gpio_res[5].gpio_reset)) {\r
+ ret = 0;\r
+ }\r
+ }\r
+ if (i==5) {\r
+ if ((camera_reset == rk29_camera_platform_data.gpio_res[3].gpio_reset) \r
+ || (camera_reset == rk29_camera_platform_data.gpio_res[4].gpio_reset)) {\r
+ ret = 0;\r
+ }\r
+ }\r
+ if (ret) {\r
+ printk("%s..%s..reset pin(%d) init failed\n",__FUNCTION__,rk29_camera_platform_data.gpio_res[i].dev_name,camera_reset);\r
+ goto sensor_io_int_loop_end;\r
+ }\r
}\r
\r
if (rk29_sensor_iomux(camera_reset) < 0) {\r
if (camera_powerdown != INVALID_GPIO) {\r
ret = gpio_request(camera_powerdown, "camera powerdown");\r
if (ret) {\r
- printk("%s..%s..powerdown pin(%d) init failed\n",__FUNCTION__,rk29_camera_platform_data.gpio_res[i].dev_name,camera_powerdown);\r
- goto sensor_io_int_loop_end;\r
+ if (i==1) {\r
+ if ((camera_powerdown == rk29_camera_platform_data.gpio_res[0].gpio_powerdown) \r
+ || (camera_powerdown == rk29_camera_platform_data.gpio_res[2].gpio_powerdown)) {\r
+ ret = 0;\r
+ }\r
+ }\r
+ if (i==2) {\r
+ if ((camera_powerdown == rk29_camera_platform_data.gpio_res[0].gpio_powerdown) \r
+ || (camera_powerdown == rk29_camera_platform_data.gpio_res[1].gpio_powerdown)) {\r
+ ret = 0;\r
+ }\r
+ }\r
+ if (i==4) {\r
+ if ((camera_powerdown == rk29_camera_platform_data.gpio_res[3].gpio_powerdown) \r
+ || (camera_powerdown == rk29_camera_platform_data.gpio_res[5].gpio_powerdown)) {\r
+ ret = 0;\r
+ }\r
+ }\r
+ if (i==5) {\r
+ if ((camera_powerdown == rk29_camera_platform_data.gpio_res[3].gpio_powerdown) \r
+ || (camera_powerdown == rk29_camera_platform_data.gpio_res[4].gpio_powerdown)) {\r
+ ret = 0;\r
+ }\r
+ }\r
+ if (ret) {\r
+ printk("%s..%s..powerdown pin(%d) init failed\n",__FUNCTION__,rk29_camera_platform_data.gpio_res[i].dev_name,camera_powerdown);\r
+ goto sensor_io_int_loop_end;\r
+ }\r
}\r
\r
if (rk29_sensor_iomux(camera_powerdown) < 0) {\r
if (camera_flash != INVALID_GPIO) {\r
ret = gpio_request(camera_flash, "camera flash");\r
if (ret) {\r
- printk("%s..%s..flash pin(%d) init failed\n",__FUNCTION__,rk29_camera_platform_data.gpio_res[i].dev_name,camera_flash);\r
- goto sensor_io_int_loop_end;\r
+ if (i==1) {\r
+ if ((camera_flash == rk29_camera_platform_data.gpio_res[0].gpio_flash) \r
+ || (camera_flash == rk29_camera_platform_data.gpio_res[2].gpio_flash)) {\r
+ ret = 0;\r
+ }\r
+ }\r
+ if (i==2) {\r
+ if ((camera_flash == rk29_camera_platform_data.gpio_res[0].gpio_flash) \r
+ || (camera_flash == rk29_camera_platform_data.gpio_res[1].gpio_flash)) {\r
+ ret = 0;\r
+ }\r
+ }\r
+ if (i==4) {\r
+ if ((camera_flash == rk29_camera_platform_data.gpio_res[3].gpio_flash) \r
+ || (camera_flash == rk29_camera_platform_data.gpio_res[5].gpio_flash)) {\r
+ ret = 0;\r
+ }\r
+ }\r
+ if (i==5) {\r
+ if ((camera_flash == rk29_camera_platform_data.gpio_res[3].gpio_flash) \r
+ || (camera_flash == rk29_camera_platform_data.gpio_res[4].gpio_flash)) {\r
+ ret = 0;\r
+ }\r
+ }\r
+ if (ret) {\r
+ printk("%s..%s..flash pin(%d) init failed\n",__FUNCTION__,rk29_camera_platform_data.gpio_res[i].dev_name,camera_flash);\r
+ goto sensor_io_int_loop_end;\r
+ }\r
}\r
\r
if (rk29_sensor_iomux(camera_flash) < 0) {\r
\r
for (j=0; j<10; j++) {\r
memset(&rk29_camera_platform_data.info[i].fival[j],0x00,sizeof(struct v4l2_frmivalenum));\r
- }\r
- j=0;\r
- if (strstr(rk29_camera_platform_data.info[i].dev_name,"_back")) {\r
- \r
- #if CONFIG_SENSOR_QCIF_FPS_FIXED_0\r
- rk29_camera_platform_data.info[i].fival[j].discrete.denominator = CONFIG_SENSOR_QCIF_FPS_FIXED_0;\r
- rk29_camera_platform_data.info[i].fival[j].discrete.numerator= 1000;\r
- rk29_camera_platform_data.info[i].fival[j].index = 0;\r
- rk29_camera_platform_data.info[i].fival[j].pixel_format = V4L2_PIX_FMT_NV12;\r
- rk29_camera_platform_data.info[i].fival[j].width = 176;\r
- rk29_camera_platform_data.info[i].fival[j].height = 144;\r
- rk29_camera_platform_data.info[i].fival[j].type = V4L2_FRMIVAL_TYPE_DISCRETE;\r
- j++;\r
- #endif\r
-\r
- #if CONFIG_SENSOR_QVGA_FPS_FIXED_0\r
- rk29_camera_platform_data.info[i].fival[j].discrete.denominator = CONFIG_SENSOR_QVGA_FPS_FIXED_0;\r
- rk29_camera_platform_data.info[i].fival[j].discrete.numerator= 1000;\r
- rk29_camera_platform_data.info[i].fival[j].index = 0;\r
- rk29_camera_platform_data.info[i].fival[j].pixel_format = V4L2_PIX_FMT_NV12;\r
- rk29_camera_platform_data.info[i].fival[j].width = 320;\r
- rk29_camera_platform_data.info[i].fival[j].height = 240;\r
- rk29_camera_platform_data.info[i].fival[j].type = V4L2_FRMIVAL_TYPE_DISCRETE;\r
- j++;\r
- #endif\r
-\r
- #if CONFIG_SENSOR_CIF_FPS_FIXED_0\r
- rk29_camera_platform_data.info[i].fival[j].discrete.denominator = CONFIG_SENSOR_CIF_FPS_FIXED_0;\r
- rk29_camera_platform_data.info[i].fival[j].discrete.numerator= 1000;\r
- rk29_camera_platform_data.info[i].fival[j].index = 0;\r
- rk29_camera_platform_data.info[i].fival[j].pixel_format = V4L2_PIX_FMT_NV12;\r
- rk29_camera_platform_data.info[i].fival[j].width = 352;\r
- rk29_camera_platform_data.info[i].fival[j].height = 288;\r
- rk29_camera_platform_data.info[i].fival[j].type = V4L2_FRMIVAL_TYPE_DISCRETE;\r
- j++;\r
- #endif\r
-\r
- #if CONFIG_SENSOR_VGA_FPS_FIXED_0\r
- rk29_camera_platform_data.info[i].fival[j].discrete.denominator = CONFIG_SENSOR_VGA_FPS_FIXED_0;\r
- rk29_camera_platform_data.info[i].fival[j].discrete.numerator= 1000;\r
- rk29_camera_platform_data.info[i].fival[j].index = 0;\r
- rk29_camera_platform_data.info[i].fival[j].pixel_format = V4L2_PIX_FMT_NV12;\r
- rk29_camera_platform_data.info[i].fival[j].width = 640;\r
- rk29_camera_platform_data.info[i].fival[j].height = 480;\r
- rk29_camera_platform_data.info[i].fival[j].type = V4L2_FRMIVAL_TYPE_DISCRETE;\r
- j++;\r
- #endif\r
-\r
- #if CONFIG_SENSOR_480P_FPS_FIXED_0\r
- rk29_camera_platform_data.info[i].fival[j].discrete.denominator = CONFIG_SENSOR_480P_FPS_FIXED_0;\r
- rk29_camera_platform_data.info[i].fival[j].discrete.numerator= 1000;\r
- rk29_camera_platform_data.info[i].fival[j].index = 0;\r
- rk29_camera_platform_data.info[i].fival[j].pixel_format = V4L2_PIX_FMT_NV12;\r
- rk29_camera_platform_data.info[i].fival[j].width = 720;\r
- rk29_camera_platform_data.info[i].fival[j].height = 480;\r
- rk29_camera_platform_data.info[i].fival[j].type = V4L2_FRMIVAL_TYPE_DISCRETE;\r
- j++;\r
- #endif \r
-\r
- #if CONFIG_SENSOR_SVGA_FPS_FIXED_0\r
- rk29_camera_platform_data.info[i].fival[j].discrete.denominator = CONFIG_SENSOR_SVGA_FPS_FIXED_0;\r
- rk29_camera_platform_data.info[i].fival[j].discrete.numerator= 1000;\r
- rk29_camera_platform_data.info[i].fival[j].index = 0;\r
- rk29_camera_platform_data.info[i].fival[j].pixel_format = V4L2_PIX_FMT_NV12;\r
- rk29_camera_platform_data.info[i].fival[j].width = 800;\r
- rk29_camera_platform_data.info[i].fival[j].height = 600;\r
- rk29_camera_platform_data.info[i].fival[j].type = V4L2_FRMIVAL_TYPE_DISCRETE;\r
- j++;\r
- #endif\r
-\r
- #if CONFIG_SENSOR_720P_FPS_FIXED_0\r
- rk29_camera_platform_data.info[i].fival[j].discrete.denominator = CONFIG_SENSOR_720P_FPS_FIXED_0;\r
- rk29_camera_platform_data.info[i].fival[j].discrete.numerator= 1000;\r
- rk29_camera_platform_data.info[i].fival[j].index = 0;\r
- rk29_camera_platform_data.info[i].fival[j].pixel_format = V4L2_PIX_FMT_NV12;\r
- rk29_camera_platform_data.info[i].fival[j].width = 1280;\r
- rk29_camera_platform_data.info[i].fival[j].height = 720;\r
- rk29_camera_platform_data.info[i].fival[j].type = V4L2_FRMIVAL_TYPE_DISCRETE;\r
- j++;\r
- #endif\r
-\r
- } else {\r
- #if CONFIG_SENSOR_QCIF_FPS_FIXED_1\r
- rk29_camera_platform_data.info[i].fival[j].discrete.denominator = CONFIG_SENSOR_QCIF_FPS_FIXED_1;\r
- rk29_camera_platform_data.info[i].fival[j].discrete.numerator= 1000;\r
- rk29_camera_platform_data.info[i].fival[j].index = 0;\r
- rk29_camera_platform_data.info[i].fival[j].pixel_format = V4L2_PIX_FMT_NV12;\r
- rk29_camera_platform_data.info[i].fival[j].width = 176;\r
- rk29_camera_platform_data.info[i].fival[j].height = 144;\r
- rk29_camera_platform_data.info[i].fival[j].type = V4L2_FRMIVAL_TYPE_DISCRETE;\r
- j++;\r
- #endif\r
-\r
- #if CONFIG_SENSOR_QVGA_FPS_FIXED_1\r
- rk29_camera_platform_data.info[i].fival[j].discrete.denominator = CONFIG_SENSOR_QVGA_FPS_FIXED_1;\r
- rk29_camera_platform_data.info[i].fival[j].discrete.numerator= 1000;\r
- rk29_camera_platform_data.info[i].fival[j].index = 0;\r
- rk29_camera_platform_data.info[i].fival[j].pixel_format = V4L2_PIX_FMT_NV12;\r
- rk29_camera_platform_data.info[i].fival[j].width = 320;\r
- rk29_camera_platform_data.info[i].fival[j].height = 240;\r
- rk29_camera_platform_data.info[i].fival[j].type = V4L2_FRMIVAL_TYPE_DISCRETE;\r
- j++;\r
- #endif\r
-\r
- #if CONFIG_SENSOR_CIF_FPS_FIXED_1\r
- rk29_camera_platform_data.info[i].fival[j].discrete.denominator = CONFIG_SENSOR_CIF_FPS_FIXED_1;\r
- rk29_camera_platform_data.info[i].fival[j].discrete.numerator= 1000;\r
- rk29_camera_platform_data.info[i].fival[j].index = 0;\r
- rk29_camera_platform_data.info[i].fival[j].pixel_format = V4L2_PIX_FMT_NV12;\r
- rk29_camera_platform_data.info[i].fival[j].width = 352;\r
- rk29_camera_platform_data.info[i].fival[j].height = 288;\r
- rk29_camera_platform_data.info[i].fival[j].type = V4L2_FRMIVAL_TYPE_DISCRETE;\r
- j++;\r
- #endif\r
\r
- #if CONFIG_SENSOR_VGA_FPS_FIXED_1\r
- rk29_camera_platform_data.info[i].fival[j].discrete.denominator = CONFIG_SENSOR_VGA_FPS_FIXED_1;\r
- rk29_camera_platform_data.info[i].fival[j].discrete.numerator= 1000;\r
- rk29_camera_platform_data.info[i].fival[j].index = 0;\r
- rk29_camera_platform_data.info[i].fival[j].pixel_format = V4L2_PIX_FMT_NV12;\r
- rk29_camera_platform_data.info[i].fival[j].width = 640;\r
- rk29_camera_platform_data.info[i].fival[j].height = 480;\r
- rk29_camera_platform_data.info[i].fival[j].type = V4L2_FRMIVAL_TYPE_DISCRETE;\r
- j++;\r
- #endif\r
-\r
- #if CONFIG_SENSOR_480P_FPS_FIXED_1\r
- rk29_camera_platform_data.info[i].fival[j].discrete.denominator = CONFIG_SENSOR_480P_FPS_FIXED_1;\r
- rk29_camera_platform_data.info[i].fival[j].discrete.numerator= 1000;\r
- rk29_camera_platform_data.info[i].fival[j].index = 0;\r
- rk29_camera_platform_data.info[i].fival[j].pixel_format = V4L2_PIX_FMT_NV12;\r
- rk29_camera_platform_data.info[i].fival[j].width = 720;\r
- rk29_camera_platform_data.info[i].fival[j].height = 480;\r
- rk29_camera_platform_data.info[i].fival[j].type = V4L2_FRMIVAL_TYPE_DISCRETE;\r
- j++;\r
- #endif \r
-\r
- #if CONFIG_SENSOR_SVGA_FPS_FIXED_1\r
- rk29_camera_platform_data.info[i].fival[j].discrete.denominator = CONFIG_SENSOR_SVGA_FPS_FIXED_1;\r
- rk29_camera_platform_data.info[i].fival[j].discrete.numerator= 1000;\r
- rk29_camera_platform_data.info[i].fival[j].index = 0;\r
- rk29_camera_platform_data.info[i].fival[j].pixel_format = V4L2_PIX_FMT_NV12;\r
- rk29_camera_platform_data.info[i].fival[j].width = 800;\r
- rk29_camera_platform_data.info[i].fival[j].height = 600;\r
- rk29_camera_platform_data.info[i].fival[j].type = V4L2_FRMIVAL_TYPE_DISCRETE;\r
- j++;\r
- #endif\r
-\r
- #if CONFIG_SENSOR_720P_FPS_FIXED_1\r
- rk29_camera_platform_data.info[i].fival[j].discrete.denominator = CONFIG_SENSOR_720P_FPS_FIXED_1;\r
- rk29_camera_platform_data.info[i].fival[j].discrete.numerator= 1000;\r
- rk29_camera_platform_data.info[i].fival[j].index = 0;\r
- rk29_camera_platform_data.info[i].fival[j].pixel_format = V4L2_PIX_FMT_NV12;\r
- rk29_camera_platform_data.info[i].fival[j].width = 1280;\r
- rk29_camera_platform_data.info[i].fival[j].height = 720;\r
- rk29_camera_platform_data.info[i].fival[j].type = V4L2_FRMIVAL_TYPE_DISCRETE;\r
- j++;\r
- #endif\r
+ if (j==0) {\r
+ rk29_camera_platform_data.info[i].fival[j].width = 176;\r
+ rk29_camera_platform_data.info[i].fival[j].height = 144;\r
+ } else if (j==1) {\r
+ rk29_camera_platform_data.info[i].fival[j].width = 320;\r
+ rk29_camera_platform_data.info[i].fival[j].height = 240;\r
+ } else if (j==2) {\r
+ rk29_camera_platform_data.info[i].fival[j].width = 352;\r
+ rk29_camera_platform_data.info[i].fival[j].height = 288;\r
+ } else if (j==3) {\r
+ rk29_camera_platform_data.info[i].fival[j].width = 640;\r
+ rk29_camera_platform_data.info[i].fival[j].height = 480;\r
+ } else if (j==4) {\r
+ rk29_camera_platform_data.info[i].fival[j].width = 720;\r
+ rk29_camera_platform_data.info[i].fival[j].height = 480;\r
+ } else if (j==5) {\r
+ rk29_camera_platform_data.info[i].fival[j].width = 1280;\r
+ rk29_camera_platform_data.info[i].fival[j].height = 720;\r
+ } else if (j==6) {\r
+ rk29_camera_platform_data.info[i].fival[j].width = 240;\r
+ rk29_camera_platform_data.info[i].fival[j].height = 160;\r
+ }\r
+ if (rk29_camera_platform_data.info[i].fival[j].width && rk29_camera_platform_data.info[i].fival[j].height) {\r
+ rk29_sensor_fps_get(i,&rk29_camera_platform_data.info[i].fival[j].discrete.denominator,\r
+ rk29_camera_platform_data.info[i].fival[j].width,rk29_camera_platform_data.info[i].fival[j].height);\r
+ rk29_camera_platform_data.info[i].fival[j].discrete.numerator= 1000;\r
+ rk29_camera_platform_data.info[i].fival[j].index = 0;\r
+ rk29_camera_platform_data.info[i].fival[j].pixel_format = V4L2_PIX_FMT_NV12;\r
+ rk29_camera_platform_data.info[i].fival[j].type = V4L2_FRMIVAL_TYPE_DISCRETE;\r
+ }\r
}\r
\r
continue;\r
static int rk29_sensor_ioctrl(struct device *dev,enum rk29camera_ioctrl_cmd cmd, int on)\r
{\r
struct rk29camera_gpio_res *res = NULL; \r
- int ret = RK29_CAM_IO_SUCCESS;\r
- if(rk29_camera_platform_data.gpio_res[0].dev_name && (strcmp(rk29_camera_platform_data.gpio_res[0].dev_name, dev_name(dev)) == 0)) {\r
- res = (struct rk29camera_gpio_res *)&rk29_camera_platform_data.gpio_res[0];\r
- } else if (rk29_camera_platform_data.gpio_res[1].dev_name && (strcmp(rk29_camera_platform_data.gpio_res[1].dev_name, dev_name(dev)) == 0)) {\r
- res = (struct rk29camera_gpio_res *)&rk29_camera_platform_data.gpio_res[1];\r
- } else {\r
+ int ret = RK29_CAM_IO_SUCCESS,i;\r
+\r
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS; i++) {\r
+ if(rk29_camera_platform_data.gpio_res[i].dev_name && (strcmp(rk29_camera_platform_data.gpio_res[i].dev_name, dev_name(dev)) == 0)) {\r
+ res = (struct rk29camera_gpio_res *)&rk29_camera_platform_data.gpio_res[i];\r
+ } \r
+ }\r
+ if (res == NULL) {\r
printk(KERN_ERR "%s is not regisiterd in rk29_camera_platform_data!!\n",dev_name(dev));\r
ret = RK29_CAM_EIO_INVALID;\r
goto rk29_sensor_ioctrl_end;\r
}\r
+\r
switch (cmd)\r
{\r
case Cam_Power:\r
rk29_sensor_ioctrl_end:\r
return ret;\r
}\r
+\r
+static int rk29_sensor_powerdown(struct device *dev, int on)\r
+{\r
+ return rk29_sensor_ioctrl(dev,Cam_PowerDown,on);\r
+}\r
static int rk29_sensor_power(struct device *dev, int on)\r
{\r
- rk29_sensor_ioctrl(dev,Cam_Power,on);\r
+ if (!on) /* ddl@rock-chips.com : Ensure sensor enter standby or power off */\r
+ rk29_sensor_powerdown(dev,1);\r
+ rk29_sensor_ioctrl(dev,Cam_Power,on); \r
return 0;\r
}\r
-#if (CONFIG_SENSOR_RESET_PIN_0 != INVALID_GPIO) || (CONFIG_SENSOR_RESET_PIN_1 != INVALID_GPIO)\r
static int rk29_sensor_reset(struct device *dev)\r
{\r
rk29_sensor_ioctrl(dev,Cam_Reset,1);\r
rk29_sensor_ioctrl(dev,Cam_Reset,0);\r
return 0;\r
}\r
-#endif\r
-static int rk29_sensor_powerdown(struct device *dev, int on)\r
-{\r
- return rk29_sensor_ioctrl(dev,Cam_PowerDown,on);\r
-}\r
+\r
#if (CONFIG_SENSOR_IIC_ADDR_0 != 0x00)\r
static struct i2c_board_info rk29_i2c_cam_info_0[] = {\r
{\r
},\r
};\r
#endif\r
+#ifdef CONFIG_SENSOR_01\r
+#if (CONFIG_SENSOR_IIC_ADDR_01 != 0x00)\r
+static struct i2c_board_info rk29_i2c_cam_info_01[] = {\r
+ {\r
+ I2C_BOARD_INFO(SENSOR_NAME_01, CONFIG_SENSOR_IIC_ADDR_01>>1)\r
+ },\r
+};\r
+\r
+static struct soc_camera_link rk29_iclink_01 = {\r
+ .bus_id = RK29_CAM_PLATFORM_DEV_ID,\r
+ .power = rk29_sensor_power,\r
+#if (CONFIG_SENSOR_RESET_PIN_01 != INVALID_GPIO)\r
+ .reset = rk29_sensor_reset,\r
+#endif \r
+ .powerdown = rk29_sensor_powerdown,\r
+ .board_info = &rk29_i2c_cam_info_01[0],\r
+ .i2c_adapter_id = CONFIG_SENSOR_IIC_ADAPTER_ID_01,\r
+ .module_name = SENSOR_NAME_01,\r
+};\r
+\r
+/*platform_device : soc-camera need */\r
+static struct platform_device rk29_soc_camera_pdrv_01 = {\r
+ .name = "soc-camera-pdrv",\r
+ .id = 8,\r
+ .dev = {\r
+ .init_name = SENSOR_DEVICE_NAME_01,\r
+ .platform_data = &rk29_iclink_01,\r
+ },\r
+};\r
+#endif\r
+#endif\r
+#ifdef CONFIG_SENSOR_02\r
+#if (CONFIG_SENSOR_IIC_ADDR_02 != 0x00)\r
+static struct i2c_board_info rk29_i2c_cam_info_02[] = {\r
+ {\r
+ I2C_BOARD_INFO(SENSOR_NAME_02, CONFIG_SENSOR_IIC_ADDR_02>>1)\r
+ },\r
+};\r
+\r
+static struct soc_camera_link rk29_iclink_02 = {\r
+ .bus_id = RK29_CAM_PLATFORM_DEV_ID,\r
+ .power = rk29_sensor_power,\r
+#if (CONFIG_SENSOR_RESET_PIN_02 != INVALID_GPIO)\r
+ .reset = rk29_sensor_reset,\r
+#endif \r
+ .powerdown = rk29_sensor_powerdown,\r
+ .board_info = &rk29_i2c_cam_info_02[0],\r
+ .i2c_adapter_id = CONFIG_SENSOR_IIC_ADAPTER_ID_02,\r
+ .module_name = SENSOR_NAME_02,\r
+};\r
+\r
+/*platform_device : soc-camera need */\r
+static struct platform_device rk29_soc_camera_pdrv_02 = {\r
+ .name = "soc-camera-pdrv",\r
+ .id = 3,\r
+ .dev = {\r
+ .init_name = SENSOR_DEVICE_NAME_02,\r
+ .platform_data = &rk29_iclink_02,\r
+ },\r
+};\r
+#endif\r
+#endif\r
+#ifdef CONFIG_SENSOR_11\r
+#if (CONFIG_SENSOR_IIC_ADDR_11 != 0x00)\r
+static struct i2c_board_info rk29_i2c_cam_info_11[] = {\r
+ {\r
+ I2C_BOARD_INFO(SENSOR_NAME_11, CONFIG_SENSOR_IIC_ADDR_11>>1)\r
+ },\r
+};\r
+\r
+static struct soc_camera_link rk29_iclink_11 = {\r
+ .bus_id = RK29_CAM_PLATFORM_DEV_ID,\r
+ .power = rk29_sensor_power,\r
+#if (CONFIG_SENSOR_RESET_PIN_11 != INVALID_GPIO)\r
+ .reset = rk29_sensor_reset,\r
+#endif \r
+ .powerdown = rk29_sensor_powerdown,\r
+ .board_info = &rk29_i2c_cam_info_11[0],\r
+ .i2c_adapter_id = CONFIG_SENSOR_IIC_ADAPTER_ID_11,\r
+ .module_name = SENSOR_NAME_11,\r
+};\r
+\r
+/*platform_device : soc-camera need */\r
+static struct platform_device rk29_soc_camera_pdrv_11 = {\r
+ .name = "soc-camera-pdrv",\r
+ .id = 4,\r
+ .dev = {\r
+ .init_name = SENSOR_DEVICE_NAME_11,\r
+ .platform_data = &rk29_iclink_11,\r
+ },\r
+};\r
+#endif\r
+#endif\r
+#ifdef CONFIG_SENSOR_12\r
+#if (CONFIG_SENSOR_IIC_ADDR_12 != 0x00)\r
+static struct i2c_board_info rk29_i2c_cam_info_12[] = {\r
+ {\r
+ I2C_BOARD_INFO(SENSOR_NAME_12, CONFIG_SENSOR_IIC_ADDR_12>>1)\r
+ },\r
+};\r
+\r
+static struct soc_camera_link rk29_iclink_12 = {\r
+ .bus_id = RK29_CAM_PLATFORM_DEV_ID,\r
+ .power = rk29_sensor_power,\r
+#if (CONFIG_SENSOR_RESET_PIN_12 != INVALID_GPIO)\r
+ .reset = rk29_sensor_reset,\r
+#endif \r
+ .powerdown = rk29_sensor_powerdown,\r
+ .board_info = &rk29_i2c_cam_info_12[0],\r
+ .i2c_adapter_id = CONFIG_SENSOR_IIC_ADAPTER_ID_12,\r
+ .module_name = SENSOR_NAME_12,\r
+};\r
+\r
+/*platform_device : soc-camera need */\r
+static struct platform_device rk29_soc_camera_pdrv_12 = {\r
+ .name = "soc-camera-pdrv",\r
+ .id = 5,\r
+ .dev = {\r
+ .init_name = SENSOR_DEVICE_NAME_12,\r
+ .platform_data = &rk29_iclink_12,\r
+ },\r
+};\r
+#endif\r
+#endif\r
\r
static u64 rockchip_device_camera_dmamask = 0xffffffffUL;\r
static struct resource rk29_camera_resource[] = {\r
.platform_data = &rk29_camera_platform_data,\r
}\r
};\r
-\r
+#if (PMEM_CAM_SIZE > 0)\r
static struct android_pmem_platform_data android_pmem_cam_pdata = {\r
.name = "pmem_cam",\r
.start = PMEM_CAM_BASE,\r
.platform_data = &android_pmem_cam_pdata,\r
},\r
};\r
+#endif\r
+\r
+static int rk_register_camera_devices(void)\r
+{ \r
+#ifdef CONFIG_SENSOR_IIC_ADDR_01\r
+#if CONFIG_SENSOR_IIC_ADDR_01\r
+ platform_device_register(&rk29_soc_camera_pdrv_01);\r
+#endif\r
+#endif\r
+\r
+#ifdef CONFIG_SENSOR_IIC_ADDR_02\r
+#if CONFIG_SENSOR_IIC_ADDR_02\r
+ platform_device_register(&rk29_soc_camera_pdrv_02);\r
+#endif\r
+#endif\r
+\r
+#ifdef CONFIG_SENSOR_IIC_ADDR_11\r
+#if CONFIG_SENSOR_IIC_ADDR_11\r
+ platform_device_register(&rk29_soc_camera_pdrv_11);\r
+#endif\r
+#endif\r
+\r
+#ifdef CONFIG_SENSOR_IIC_ADDR_12\r
+#if CONFIG_SENSOR_IIC_ADDR_12\r
+ platform_device_register(&rk29_soc_camera_pdrv_12);\r
+#endif\r
+#endif\r
+ return 0;\r
+}\r
+\r
+module_init(rk_register_camera_devices);\r
+\r
\r
#endif\r
\r
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
-#if CONFIG_ARCH_RK29
+
#include <linux/init.h>
#include <linux/module.h>
#include <linux/io.h>
static int debug;
-module_param(debug, int, S_IRUGO|S_IWUSR);
+module_param(debug, int, S_IRUGO|S_IWUSR|S_IWGRP);
#define dprintk(level, fmt, arg...) do { \
if (debug >= level) \
*v0.x.4 : this driver support digital zoom;
*v0.x.5 : this driver support test framerate and query framerate from board file configuration;
*v0.x.6 : this driver improve test framerate method;
+*v0.x.7 : this driver product resolution by IPP crop and scale, which user request but sensor can't support;
+* note: this version is only provide yifang client, which is not official version;
+*v0.x.8 : this driver and rk29_camera.c support upto 3 back-sensors and upto 3 front-sensors;
*/
-#define RK29_CAM_VERSION_CODE KERNEL_VERSION(0, 1, 6)
+#define RK29_CAM_VERSION_CODE KERNEL_VERSION(0, 1, 8)
/* limit to rk29 hardware capabilities */
#define RK29_CAM_BUS_PARAM (SOCAM_MASTER |\
struct rk29_camera_dev *pcdev = ici->priv;
int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
icd->current_fmt->host_fmt);
+ int bytes_per_line_host = soc_mbus_bytes_per_line(pcdev->host_width,
+ icd->current_fmt->host_fmt);
dev_dbg(&icd->dev, "count=%d, size=%d\n", *count, *size);
/* planar capture requires Y, U and V buffers to be page aligned */
*size = PAGE_ALIGN(bytes_per_line*icd->user_height); /* Y pages UV pages, yuv422*/
- pcdev->vipmem_bsize = PAGE_ALIGN(bytes_per_line * pcdev->host_height);
+ pcdev->vipmem_bsize = PAGE_ALIGN(bytes_per_line_host * pcdev->host_height);
if (CAM_WORKQUEUE_IS_EN()) {
vipdata_base = pcdev->vipmem_phybase + vb->i*pcdev->vipmem_bsize;
src_y_size = pcdev->host_width*pcdev->host_height;
dst_y_size = pcdev->icd->user_width*pcdev->icd->user_height;
+
for (h=0; h<scale_times; h++) {
for (w=0; w<scale_times; w++) {
vb->state = VIDEOBUF_ERROR;
spin_unlock_irqrestore(&pcdev->lock, flags);
- printk("Capture image(vb->i:0x%x) which IPP operated is error:\n",vb->i);
- printk("widx:%d hidx:%d ",w,h);
- printk("%dx%d@(%d,%d)->%dx%d\n",pcdev->zoominfo.a.c.width,pcdev->zoominfo.a.c.height,pcdev->zoominfo.a.c.left,pcdev->zoominfo.a.c.top,pcdev->icd->user_width,pcdev->icd->user_height);
- printk("ipp_req.src0.YrgbMst:0x%x ipp_req.src0.CbrMst:0x%x \n", ipp_req.src0.YrgbMst,ipp_req.src0.CbrMst);
- printk("ipp_req.src0.w:0x%x ipp_req.src0.h:0x%x \n",ipp_req.src0.w,ipp_req.src0.h);
- printk("ipp_req.src0.fmt:0x%x\n",ipp_req.src0.fmt);
- printk("ipp_req.dst0.YrgbMst:0x%x ipp_req.dst0.CbrMst:0x%x \n",ipp_req.dst0.YrgbMst,ipp_req.dst0.CbrMst);
- printk("ipp_req.dst0.w:0x%x ipp_req.dst0.h:0x%x \n",ipp_req.dst0.w ,ipp_req.dst0.h);
- printk("ipp_req.dst0.fmt:0x%x\n",ipp_req.dst0.fmt);
- printk("ipp_req.src_vir_w:0x%x ipp_req.dst_vir_w :0x%x\n",ipp_req.src_vir_w ,ipp_req.dst_vir_w);
- printk("ipp_req.timeout:0x%x ipp_req.flag :0x%x\n",ipp_req.timeout,ipp_req.flag);
+ RK29CAMERA_TR("Capture image(vb->i:0x%x) which IPP operated is error:\n",vb->i);
+ RK29CAMERA_TR("widx:%d hidx:%d ",w,h);
+ RK29CAMERA_TR("%dx%d@(%d,%d)->%dx%d\n",pcdev->zoominfo.a.c.width,pcdev->zoominfo.a.c.height,pcdev->zoominfo.a.c.left,pcdev->zoominfo.a.c.top,pcdev->icd->user_width,pcdev->icd->user_height);
+ RK29CAMERA_TR("ipp_req.src0.YrgbMst:0x%x ipp_req.src0.CbrMst:0x%x \n", ipp_req.src0.YrgbMst,ipp_req.src0.CbrMst);
+ RK29CAMERA_TR("ipp_req.src0.w:0x%x ipp_req.src0.h:0x%x \n",ipp_req.src0.w,ipp_req.src0.h);
+ RK29CAMERA_TR("ipp_req.src0.fmt:0x%x\n",ipp_req.src0.fmt);
+ RK29CAMERA_TR("ipp_req.dst0.YrgbMst:0x%x ipp_req.dst0.CbrMst:0x%x \n",ipp_req.dst0.YrgbMst,ipp_req.dst0.CbrMst);
+ RK29CAMERA_TR("ipp_req.dst0.w:0x%x ipp_req.dst0.h:0x%x \n",ipp_req.dst0.w ,ipp_req.dst0.h);
+ RK29CAMERA_TR("ipp_req.dst0.fmt:0x%x\n",ipp_req.dst0.fmt);
+ RK29CAMERA_TR("ipp_req.src_vir_w:0x%x ipp_req.dst_vir_w :0x%x\n",ipp_req.src_vir_w ,ipp_req.dst_vir_w);
+ RK29CAMERA_TR("ipp_req.timeout:0x%x ipp_req.flag :0x%x\n",ipp_req.timeout,ipp_req.flag);
goto do_ipp_err;
}
goto ebusy;
}
- dev_info(&icd->dev, "RK29 Camera driver attached to camera%d(%s)\n",
- icd->devnum,dev_name(icd->pdev));
-
+ RK29CAMERA_DG("RK29 Camera driver attached to %s\n",dev_name(icd->pdev));
+
pcdev->frame_inval = RK29_CAM_FRAME_INVAL_INIT;
pcdev->active = NULL;
pcdev->icd = NULL;
mutex_lock(&camera_lock);
BUG_ON(icd != pcdev->icd);
- dev_info(&icd->dev, "RK29 Camera driver detached from camera%d(%s)\n",
- icd->devnum,dev_name(icd->pdev));
+ RK29CAMERA_DG("RK29 Camera driver detached from %s\n",dev_name(icd->pdev));
/* ddl@rock-chips.com: Application will call VIDIOC_STREAMOFF before close device, but
stream may be turn on again before close device, if suspend and resume happened. */
ret = -EINVAL;
goto RK29_CAMERA_SET_FMT_END;
}
- mf.width = usr_w;
- mf.height = usr_h;
}
#endif
icd->sense = NULL;
if (!ret) {
- rect.left = 0;
- rect.top = 0;
- rect.width = mf.width;
- rect.height = mf.height;
+
+ if (mf.width*usr_h == mf.height*usr_w) {
+ rect.width = mf.width;
+ rect.height = mf.height;
+ } else {
+ int ratio;
+ if (usr_w > usr_h) {
+ if (mf.width > usr_w) {
+ ratio = mf.width*10/usr_w;
+ rect.width = usr_w*ratio/10;
+ rect.height = usr_h*ratio/10;
+ } else {
+ ratio = usr_w*10/mf.width + 1;
+ rect.width = usr_w*10/ratio;
+ rect.height = usr_h*10/ratio;
+ }
+ } else {
+ if (mf.height > usr_h) {
+ ratio = mf.height*10/usr_h;
+ rect.width = usr_w*ratio/10;
+ rect.height = usr_h*ratio/10;
+ } else {
+ ratio = usr_h*10/mf.height + 1;
+ rect.width = usr_w*10/ratio;
+ rect.height = usr_h*10/ratio;
+ }
+ }
+ }
+
+ rect.left = (mf.width - rect.width)/2;
+ rect.top = (mf.height - rect.height)/2;
down(&pcdev->zoominfo.sem);
pcdev->zoominfo.a.c.width = rect.width*100/pcdev->zoominfo.zoom_rate;
pcdev->zoominfo.a.c.width &= ~0x03;
pcdev->zoominfo.a.c.height = rect.height*100/pcdev->zoominfo.zoom_rate;
pcdev->zoominfo.a.c.height &= ~0x03;
- pcdev->zoominfo.a.c.left = ((rect.width - pcdev->zoominfo.a.c.width)>>1)&(~0x01);
- pcdev->zoominfo.a.c.top = ((rect.height - pcdev->zoominfo.a.c.height)>>1)&(~0x01);
+ pcdev->zoominfo.a.c.left = ((rect.width - pcdev->zoominfo.a.c.width)/2 + rect.left)&(~0x01);
+ pcdev->zoominfo.a.c.top = ((rect.height - pcdev->zoominfo.a.c.height)/2 + rect.top)&(~0x01);
up(&pcdev->zoominfo.sem);
/* ddl@rock-chips.com: IPP work limit check */
}
}
- RK29CAMERA_DG("%s..%s icd width:%d host width:%d (zoom: %dx%d@(%d,%d)->%dx%d)\n",__FUNCTION__,xlate->host_fmt->name,
- rect.width, pix->width, pcdev->zoominfo.a.c.width,pcdev->zoominfo.a.c.height, pcdev->zoominfo.a.c.left,pcdev->zoominfo.a.c.top,
+ /* ddl@rock-chips.com: Crop is doing by IPP, not by VIP in rk2918 */
+ rect.left = 0;
+ rect.top = 0;
+ rect.width = mf.width;
+ rect.height = mf.height;
+
+ RK29CAMERA_DG("%s..%s Sensor output:%dx%d VIP output:%dx%d (zoom: %dx%d@(%d,%d)->%dx%d)\n",__FUNCTION__,xlate->host_fmt->name,
+ mf.width, mf.height,rect.width,rect.height, pcdev->zoominfo.a.c.width,pcdev->zoominfo.a.c.height, pcdev->zoominfo.a.c.left,pcdev->zoominfo.a.c.top,
pix->width, pix->height);
+
+
rk29_camera_setup_format(icd, pix->pixelformat, mf.code, &rect);
if (CAM_IPPWORK_IS_EN()) {
pcdev->icd_width = icd_width;
pcdev->icd_height = icd_height;
- pix->width = mf.width;
- pix->height = mf.height;
+ pix->width = usr_w;
+ pix->height = usr_h;
pix->field = mf.field;
pix->colorspace = mf.colorspace;
icd->current_fmt = xlate;
if (stream_on & ENABLE_CAPTURE)
write_vip_reg(RK29_VIP_CTRL, (read_vip_reg(RK29_VIP_CTRL) | ENABLE_CAPTURE));
if (ret)
- RK29CAMERA_TR("\n%s..%d.. ret = %d \n",__FUNCTION__,__LINE__, ret);
+ RK29CAMERA_TR("\n%s: Driver isn't support %dx%d resolution which user request!\n",__FUNCTION__,usr_w,usr_h);
return ret;
}
static bool rk29_camera_fmt_capturechk(struct v4l2_format *f)
bool is_capture = rk29_camera_fmt_capturechk(f);
bool vipmem_is_overflow = false;
struct v4l2_mbus_framefmt mf;
-
+ int bytes_per_line_host;
+
usr_w = pix->width;
usr_h = pix->height;
RK29CAMERA_DG("%s enter width:%d height:%d\n",__FUNCTION__,usr_w,usr_h);
goto RK29_CAMERA_TRY_FMT_END;
RK29CAMERA_DG("%s mf.width:%d mf.height:%d\n",__FUNCTION__,mf.width,mf.height);
#ifdef CONFIG_VIDEO_RK29_WORK_IPP
- if ((mf.width > usr_w) && (mf.height > usr_h)) {
+ if ((mf.width != usr_w) || (mf.height != usr_h)) {
+ bytes_per_line_host = soc_mbus_bytes_per_line(mf.width,icd->current_fmt->host_fmt);
if (is_capture) {
- vipmem_is_overflow = (PAGE_ALIGN(pix->bytesperline*pix->height) > pcdev->vipmem_size);
+ vipmem_is_overflow = (PAGE_ALIGN(bytes_per_line_host*mf.height) > pcdev->vipmem_size);
} else {
/* Assume preview buffer minimum is 4 */
- vipmem_is_overflow = (PAGE_ALIGN(pix->bytesperline*pix->height)*4 > pcdev->vipmem_size);
- }
+ vipmem_is_overflow = (PAGE_ALIGN(bytes_per_line_host*mf.height)*4 > pcdev->vipmem_size);
+ }
if (vipmem_is_overflow == false) {
pix->width = usr_w;
pix->height = usr_h;
pix->width = mf.width;
pix->height = mf.height;
}
- } else if ((mf.width < usr_w) && (mf.height < usr_h)) {
- if (((usr_w>>1) < mf.width) && ((usr_h>>1) < mf.height)) {
- if (is_capture) {
- vipmem_is_overflow = (PAGE_ALIGN(pix->bytesperline*pix->height) > pcdev->vipmem_size);
- } else {
- vipmem_is_overflow = (PAGE_ALIGN(pix->bytesperline*pix->height)*4 > pcdev->vipmem_size);
- }
- if (vipmem_is_overflow == false) {
- pix->width = usr_w;
- pix->height = usr_h;
- } else {
- RK29CAMERA_TR("vipmem for IPP is overflow, This resolution(%dx%d -> %dx%d) is invalidate!\n",mf.width,mf.height,usr_w,usr_h);
+
+ if ((mf.width < usr_w) || (mf.height < usr_h)) {
+ if (((usr_w>>1) > mf.width) || ((usr_h>>1) > mf.height)) {
+ RK29CAMERA_TR("The aspect ratio(%dx%d/%dx%d) is bigger than 2 !\n",mf.width,mf.height,usr_w,usr_h);
pix->width = mf.width;
pix->height = mf.height;
- }
- } else {
- RK29CAMERA_TR("The aspect ratio(%dx%d/%dx%d) is bigger than 2 !\n",mf.width,mf.height,usr_w,usr_h);
- pix->width = mf.width;
- pix->height = mf.height;
- }
+ }
+ }
}
#else
pix->width = mf.width;
pix->colorspace = mf.colorspace;
switch (mf.field) {
- case V4L2_FIELD_ANY:
- case V4L2_FIELD_NONE:
- pix->field = V4L2_FIELD_NONE;
- break;
- default:
- /* TODO: support interlaced at least in pass-through mode */
- dev_err(icd->dev.parent, "Field type %d unsupported.\n",
- mf.field);
- goto RK29_CAMERA_TRY_FMT_END;
+ case V4L2_FIELD_ANY:
+ case V4L2_FIELD_NONE:
+ pix->field = V4L2_FIELD_NONE;
+ break;
+ default:
+ /* TODO: support interlaced at least in pass-through mode */
+ dev_err(icd->dev.parent, "Field type %d unsupported.\n",
+ mf.field);
+ goto RK29_CAMERA_TRY_FMT_END;
}
RK29_CAMERA_TRY_FMT_END:
{
struct rk29_camera_dev *pcdev = ici->priv;
char orientation[5];
+ int i;
- strlcpy(cap->card, dev_name(pcdev->icd->pdev), sizeof(cap->card));
- if (strcmp(dev_name(pcdev->icd->pdev), pcdev->pdata->info[0].dev_name) == 0) {
- sprintf(orientation,"-%d",pcdev->pdata->info[0].orientation);
+ strlcpy(cap->card, dev_name(pcdev->icd->pdev), sizeof(cap->card));
+
+ memset(orientation,0x00,sizeof(orientation));
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS;i++) {
+ if ((pcdev->pdata->info[i].dev_name!=NULL) && (strcmp(dev_name(pcdev->icd->pdev), pcdev->pdata->info[i].dev_name) == 0)) {
+ sprintf(orientation,"-%d",pcdev->pdata->info[i].orientation);
+ }
+ }
+
+ if (orientation[0] != '-') {
+ RK29CAMERA_TR("%s: %s is not registered in rk29_camera_platform_data, orientation apply default value",__FUNCTION__,dev_name(pcdev->icd->pdev));
+ if (strstr(dev_name(pcdev->icd->pdev),"front"))
+ strcat(cap->card,"-270");
+ else
+ strcat(cap->card,"-90");
} else {
- sprintf(orientation,"-%d",pcdev->pdata->info[1].orientation);
+ strcat(cap->card,orientation);
}
- strcat(cap->card,orientation);
+
cap->version = RK29_CAM_VERSION_CODE;
cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
struct rk29_camera_dev *pcdev = ici->priv;
struct rk29_camera_frmivalenum *fival_list = NULL;
- struct v4l2_frmivalenum *fival_head;
+ struct v4l2_frmivalenum *fival_head=NULL;
int i,ret = 0,index;
index = fival->index & 0x00ffffff;
RK29CAMERA_TR("%s: fival_list is NULL\n",__FUNCTION__);
ret = -EINVAL;
}
- } else {
- if (strcmp(dev_name(pcdev->icd->pdev),pcdev->pdata->info[0].dev_name) == 0) {
- fival_head = pcdev->pdata->info[0].fival;
- } else {
- fival_head = pcdev->pdata->info[1].fival;
+ } else {
+
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS; i++) {
+ if (pcdev->pdata->info[i].dev_name && (strcmp(dev_name(pcdev->icd->pdev),pcdev->pdata->info[i].dev_name) == 0)) {
+ fival_head = pcdev->pdata->info[i].fival;
+ }
+ }
+
+ if (fival_head == NULL) {
+ RK29CAMERA_TR("%s: %s is not registered in rk29_camera_platform_data!!",__FUNCTION__,dev_name(pcdev->icd->pdev));
+ ret = -EINVAL;
+ goto rk29_camera_enum_frameintervals_end;
}
+
i = 0;
while (fival_head->width && fival_head->height) {
if ((fival->pixel_format == fival_head->pixel_format)
if ((i == index) && (fival->height == fival_head->height) && (fival->width == fival_head->width)) {
memcpy(fival, fival_head, sizeof(struct v4l2_frmivalenum));
- RK29CAMERA_DG("%s %dx%d@%c%c%c%c framerate : %d/%d\n", dev_name(&rk29_camdev_info_ptr->icd->dev),
+ RK29CAMERA_DG("%s %dx%d@%c%c%c%c framerate : %d/%d\n", dev_name(rk29_camdev_info_ptr->icd->pdev),
fival->width, fival->height,
fival->pixel_format & 0xFF, (fival->pixel_format >> 8) & 0xFF,
(fival->pixel_format >> 16) & 0xFF, (fival->pixel_format >> 24),
fival->discrete.denominator,fival->discrete.numerator);
} else {
if (index == 0)
- RK29CAMERA_TR("%s have not catch %d%d@%c%c%c%c index(%d) framerate\n",dev_name(&rk29_camdev_info_ptr->icd->dev),
+ RK29CAMERA_TR("%s have not catch %d%d@%c%c%c%c index(%d) framerate\n",dev_name(rk29_camdev_info_ptr->icd->pdev),
fival->width,fival->height,
fival->pixel_format & 0xFF, (fival->pixel_format >> 8) & 0xFF,
(fival->pixel_format >> 16) & 0xFF, (fival->pixel_format >> 24),
index);
else
- RK29CAMERA_DG("%s have not catch %d%d@%c%c%c%c index(%d) framerate\n",dev_name(&rk29_camdev_info_ptr->icd->dev),
+ RK29CAMERA_DG("%s have not catch %d%d@%c%c%c%c index(%d) framerate\n",dev_name(rk29_camdev_info_ptr->icd->pdev),
fival->width,fival->height,
fival->pixel_format & 0xFF, (fival->pixel_format >> 8) & 0xFF,
(fival->pixel_format >> 16) & 0xFF, (fival->pixel_format >> 24),
ret = -EINVAL;
}
}
-
+rk29_camera_enum_frameintervals_end:
return ret;
}
int irq,i;
int err = 0;
- RK29CAMERA_DG("%s..%s..%d \n",__FUNCTION__,__FILE__,__LINE__);
+ RK29CAMERA_TR("RK29 Camera driver version: v%d.%d.%d\n",(RK29_CAM_VERSION_CODE&0xff0000)>>16,
+ (RK29_CAM_VERSION_CODE&0xff00)>>8,RK29_CAM_VERSION_CODE&0xff);
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
irq = platform_get_irq(pdev, 0);
if (!res || irq < 0) {
MODULE_DESCRIPTION("RK29 Soc Camera Host driver");
MODULE_AUTHOR("ddl <ddl@rock-chips>");
MODULE_LICENSE("GPL");
-#endif
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
#include <linux/delay.h>
#include "s5k6aa.h"
static int debug;
#define SENSOR_MIN_HEIGHT 480
#define SENSOR_MAX_WIDTH 1280
#define SENSOR_MAX_HEIGHT 1024
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 640 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 480
+#define SENSOR_INIT_WINSEQADR sensor_vga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_YUYV8_2X8
#define CONFIG_SENSOR_WhiteBalance 0
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
#define SENSOR_AF_MODE_CLOSE 5
#endif
-/* init 800*600 SVGA */
+/* init 640X480 SVGA */
static struct reginfo sensor_init_data[] =
{
{0x0010,0x0001}, // Reset
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 640;
-static s32 sensor_init_height = 480;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct sensor *sensor = to_sensor(client);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
- char value;
- int ret,pid = 0,i = 0,j=0;
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_vga;
- sensor_init_width = 640;
- sensor_init_height = 480;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret;
+ u16 pid = 0;
+
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
sensor_ioctrl(icd,Sensor_Reset, 1);
goto sensor_INIT_ERR;
}
- ret = sensor_write_array(client, sensor_init_data_p);
+ ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());
}
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ if (sensor->sensor_io_request->gpio_res[0].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[0].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[0];
+ } else if (sensor->sensor_io_request->gpio_res[1].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[1].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[1];
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
#include <media/v4l2-common.h>\r
#include <media/v4l2-chip-ident.h>\r
#include <media/soc_camera.h>\r
-#include <plat/rk_camera.h>\r
-#include <linux/vmalloc.h>\r
-\r
+#include <mach/rk29_camera.h>\r
\r
static int debug;\r
module_param(debug, int, S_IRUGO|S_IWUSR);\r
#define SENSOR_MIN_HEIGHT 144\r
#define SENSOR_MAX_WIDTH 1600\r
#define SENSOR_MAX_HEIGHT 1200\r
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */\r
-#define SENSOR_INIT_HEIGHT sensor_init_height\r
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p\r
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode\r
-#define SENSOR_BUS_PARAM sensor_init_busparam\r
-\r
+#define SENSOR_INIT_WIDTH 640 /* Sensor pixel size for sensor_init_data array */\r
+#define SENSOR_INIT_HEIGHT 480\r
+#define SENSOR_INIT_WINSEQADR sensor_vga\r
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_UYVY8_2X8\r
\r
#define CONFIG_SENSOR_WhiteBalance 1\r
#define CONFIG_SENSOR_Brightness 0\r
#define CONFIG_SENSOR_I2C_NOSCHED 0\r
#define CONFIG_SENSOR_I2C_RDWRCHK 0\r
\r
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |\\r
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW|\\r
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)\r
\r
#define COLOR_TEMPERATURE_CLOUDY_DN 6500\r
#define COLOR_TEMPERATURE_CLOUDY_UP 8000\r
sensor_power_end:\r
return ret;\r
}\r
-static s32 sensor_init_width = 640;\r
-static s32 sensor_init_height = 480;\r
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);\r
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;\r
-static struct reginfo* sensor_init_data_p = NULL;\r
-static struct reginfo* sensor_init_winseq_p = NULL;\r
-static struct reginfo* sensor_init_winseq_board = NULL;\r
static int sensor_init(struct v4l2_subdev *sd, u32 val)\r
{\r
struct i2c_client *client = v4l2_get_subdevdata(sd);\r
struct sensor *sensor = to_sensor(client);\r
const struct v4l2_queryctrl *qctrl;\r
const struct sensor_datafmt *fmt;\r
- int ret,pid = 0,i = 0,j=0;\r
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;\r
- sensor_init_data_p = sensor_init_data;\r
- sensor_init_winseq_p = sensor_vga;\r
- sensor_init_width = 640;\r
- sensor_init_height = 480;\r
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) { \r
- for(i = 0;i < RK_CAM_NUM;i++){\r
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&\r
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))\r
- break;\r
- }\r
- }\r
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){\r
- //user has defined the init data\r
- //init reg\r
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){\r
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){\r
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;\r
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;\r
- }\r
- sensor_init_data_p = sensor_init_data;\r
- }\r
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){\r
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);\r
- }\r
- //init winseq\r
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){\r
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;\r
- if(sensor_init_winseq_board)\r
- {\r
- vfree(sensor_init_winseq_board);\r
- sensor_init_winseq_board = NULL;\r
- }\r
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);\r
- if(!sensor_init_winseq_board)\r
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);\r
- for(j = 0;j< tmp_winseq_size;j++){\r
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;\r
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;\r
- }\r
- sensor_init_winseq_p = sensor_init_winseq_board;\r
- }\r
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){\r
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);\r
- }\r
- //init width,height,bus,pixelcode\r
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)\r
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;\r
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)\r
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;\r
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)\r
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;\r
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)\r
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;\r
- }\r
+ int ret;\r
\r
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);\r
\r
goto sensor_INIT_ERR;\r
}\r
#endif\r
- ret = sensor_write_array(client, sensor_init_data_p);\r
+ ret = sensor_write_array(client, sensor_init_data);\r
if (ret != 0)\r
{\r
SENSOR_TR("error: %s initial failed\n",SENSOR_NAME_STRING());\r
struct i2c_client *client = v4l2_get_subdevdata(sd);\r
struct sensor *sensor = to_sensor(client);
const struct sensor_datafmt *fmt;
- int ret = 0;
+ int ret = 0,set_w,set_h;\r
fmt = sensor_find_datafmt(mf->code, sensor_colour_fmts,
ARRAY_SIZE(sensor_colour_fmts));
mf->width = SENSOR_MAX_WIDTH;
else if (mf->width < SENSOR_MIN_WIDTH)
mf->width = SENSOR_MIN_WIDTH;
-
+\r
+ set_w = mf->width;
+ set_h = mf->height;
+\r
+ if (((set_w <= 176) && (set_h <= 144)) &&( sensor_qcif[0].reg!=0xff))\r
+ {\r
+ set_w = 176;\r
+ set_h = 144;\r
+ }\r
+ else if (((set_w <= 320) && (set_h <= 240)) && (sensor_qvga[0].reg!=0xff))\r
+ {\r
+ set_w = 320;\r
+ set_h = 240;\r
+ }\r
+ else if (((set_w <= 352) && (set_h<= 288)) && (sensor_cif[0].reg!=0xff))\r
+ {\r
+ set_w = 352;\r
+ set_h = 288;\r
+ }\r
+ else if (((set_w <= 640) && (set_h <= 480)) &&( sensor_vga[0].reg!=0xff))\r
+ {\r
+ set_w =640;\r
+ set_h = 480;\r
+ }\r
+ else if (((set_w <= 800) && (set_h <= 600)) && (sensor_svga[0].reg!=0xff))\r
+ {\r
+ set_w = 800;\r
+ set_h = 600;\r
+ }\r
+ else if (((set_w <= 1024) && (set_h <= 768)) &&( sensor_xga[0].reg!=0xff))\r
+ {\r
+ set_w = 1024;\r
+ set_h = 768;\r
+ }\r
+ else if (((set_w <= 1280) && (set_h <= 1024)) && (sensor_sxga[0].reg!=0xff))\r
+ {\r
+ set_w = 1280;\r
+ set_h = 1024;\r
+ }\r
+ else if (((set_w <= 1600) && (set_h <= 1200)) && (sensor_uxga[0].reg!=0xff))\r
+ {\r
+ set_w = 1600;\r
+ set_h = 1200;\r
+ }\r
+ else\r
+ {\r
+ set_w = SENSOR_INIT_WIDTH;\r
+ set_h = SENSOR_INIT_HEIGHT; \r
+ }\r
+ mf->width = set_w;
+ mf->height = set_h; \r
mf->colorspace = fmt->colorspace;
return ret;
\r
case RK29_CAM_SUBDEV_IOREQUEST:\r
{\r
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg; \r
- if (sensor->sensor_io_request != NULL) { \r
- int j = 0;\r
- for(j = 0;j < RK_CAM_NUM;j++){\r
- if (sensor->sensor_io_request->gpio_res[j].dev_name && \r
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {\r
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];\r
- break;\r
- } \r
- }\r
- if(j == RK_CAM_NUM){\r
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);\r
- ret = -EINVAL;\r
- goto sensor_ioctl_end;\r
- }\r
- }\r
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg; \r
+ if (sensor->sensor_io_request != NULL) {
+ sensor->sensor_gpio_res = NULL;
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS;i++) {
+ if (sensor->sensor_io_request->gpio_res[i].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[i].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[i];
+ }
+ }
+ if (sensor->sensor_gpio_res == NULL) {
+ SENSOR_TR("%s %s obtain gpio resource failed when RK29_CAM_SUBDEV_IOREQUEST \n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }\r
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control \r
for this project */\r
#if CONFIG_SENSOR_Flash \r
\r
MODULE_DESCRIPTION(SENSOR_NAME_STRING(Camera sensor driver));\r
MODULE_AUTHOR("ddl <kernel@rock-chips>");\r
-MODULE_LICENSE("GPL");
\ No newline at end of file
+MODULE_LICENSE("GPL");\r
#include <media/v4l2-common.h>
#include <media/v4l2-chip-ident.h>
#include <media/soc_camera.h>
-#include <plat/rk_camera.h>
-#include <linux/vmalloc.h>
+#include <mach/rk29_camera.h>
+
static int debug;
module_param(debug, int, S_IRUGO|S_IWUSR);
#define SENSOR_MIN_HEIGHT 480//144
#define SENSOR_MAX_WIDTH 640
#define SENSOR_MAX_HEIGHT 480
-#define SENSOR_INIT_WIDTH sensor_init_width /* Sensor pixel size for sensor_init_data array */
-#define SENSOR_INIT_HEIGHT sensor_init_height
-#define SENSOR_INIT_WINSEQADR sensor_init_winseq_p
-#define SENSOR_INIT_PIXFMT sensor_init_pixelcode
-#define SENSOR_BUS_PARAM sensor_init_busparam
+#define SENSOR_INIT_WIDTH 640 /* Sensor pixel size for sensor_init_data array */
+#define SENSOR_INIT_HEIGHT 480
+#define SENSOR_INIT_WINSEQADR sensor_vga
+#define SENSOR_INIT_PIXFMT V4L2_MBUS_FMT_YUYV8_2X8
#define CONFIG_SENSOR_WhiteBalance 0
#define CONFIG_SENSOR_Brightness 0
#define CONFIG_SENSOR_I2C_NOSCHED 0
#define CONFIG_SENSOR_I2C_RDWRCHK 0
+#define SENSOR_BUS_PARAM (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |\
+ SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |\
+ SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ)
+
#define COLOR_TEMPERATURE_CLOUDY_DN 6500
#define COLOR_TEMPERATURE_CLOUDY_UP 8000
#define COLOR_TEMPERATURE_CLEARDAY_DN 5000
sensor_power_end:
return ret;
}
-static s32 sensor_init_width = 640;
-static s32 sensor_init_height = 480;
-static unsigned long sensor_init_busparam = (SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING|SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8 |SOCAM_MCLK_24MHZ);
-static enum v4l2_mbus_pixelcode sensor_init_pixelcode = V4L2_MBUS_FMT_YUYV8_2X8;
-static struct reginfo* sensor_init_data_p = NULL;
-static struct reginfo* sensor_init_winseq_p = NULL;
-static struct reginfo* sensor_init_winseq_board = NULL;
+
static int sensor_init(struct v4l2_subdev *sd, u32 val)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct sensor *sensor = to_sensor(client);
const struct v4l2_queryctrl *qctrl;
const struct sensor_datafmt *fmt;
- char value;
- int ret,pid = 0,i = 0,j=0;
- struct rk29camera_platform_data* tmp_plat_data =(struct rk29camera_platform_data*)val;
- sensor_init_data_p = sensor_init_data;
- sensor_init_winseq_p = sensor_vga;
- sensor_init_width = 640;
- sensor_init_height = 480;
- if (tmp_plat_data != NULL && (u32)tmp_plat_data != 1) {
- for(i = 0;i < RK_CAM_NUM;i++){
- if ((tmp_plat_data->sensor_init_data[i])&& tmp_plat_data->info[i].dev_name &&
- (strcmp(tmp_plat_data->info[i].dev_name, dev_name(icd->pdev)) == 0))
- break;
- }
- }
- if(tmp_plat_data && ((u32)tmp_plat_data != 1) &&(i < RK_CAM_NUM) && tmp_plat_data->sensor_init_data[i]){
- //user has defined the init data
- //init reg
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- for(j = 0;j< sizeof(sensor_init_data)/sizeof(struct reginfo);j++){
- sensor_init_data[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].reg;
- sensor_init_data[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data[j].val;
- }
- sensor_init_data_p = sensor_init_data;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data){
- sensor_init_data_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_data);
- }
- //init winseq
- if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq && (sizeof(struct reginfo) != sizeof(struct reginfo_t))){
- int tmp_winseq_size = tmp_plat_data->sensor_init_data[i]->rk_sensor_winseq_size;
- if(sensor_init_winseq_board)
- {
- vfree(sensor_init_winseq_board);
- sensor_init_winseq_board = NULL;
- }
- sensor_init_winseq_board = (struct reginfo*)vmalloc(tmp_winseq_size);
- if(!sensor_init_winseq_board)
- SENSOR_TR("%s :vmalloc erro !",__FUNCTION__);
- for(j = 0;j< tmp_winseq_size;j++){
- sensor_init_winseq_board[j].reg = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].reg;
- sensor_init_winseq_board[j].val = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq[j].val;
- }
- sensor_init_winseq_p = sensor_init_winseq_board;
- }
- else if(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq){
- sensor_init_winseq_p = (struct reginfo*)(tmp_plat_data->sensor_init_data[i]->rk_sensor_init_winseq);
- }
- //init width,height,bus,pixelcode
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width != INVALID_VALUE)
- sensor_init_width = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_width;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height != INVALID_VALUE)
- sensor_init_height = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_height;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param != INVALID_VALUE)
- sensor_init_busparam = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_bus_param;
- if(tmp_plat_data->sensor_init_data[i] && tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode != INVALID_VALUE)
- sensor_init_pixelcode = tmp_plat_data->sensor_init_data[i]->rk_sensor_init_pixelcode;
- }
+ int ret, i;
+
SENSOR_DG("\n%s..%s.. \n",SENSOR_NAME_STRING(),__FUNCTION__);
if (sensor_ioctrl(icd, Sensor_PowerDown, 0) < 0) {
// ret = sensor_write(client, sensor_init_data + i*2, sensor_init_data + i*2 + 1);
// printk("write to reg[0x%x] 0x%x\n",sensor_init_data[i].reg,sensor_init_data[i].val);
- ret = sensor_write(client, sensor_init_data_p[i].reg, sensor_init_data_p[i].val);
+ ret = sensor_write(client, sensor_init_data[i].reg, sensor_init_data[i].val);
//ret = sensor_write_array(client, sensor_init_data);
if (ret != 0)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct sensor *sensor = to_sensor(client);
const struct sensor_datafmt *fmt;
- int ret = 0;
+ int ret = 0,set_w,set_h;
fmt = sensor_find_datafmt(mf->code, sensor_colour_fmts,
ARRAY_SIZE(sensor_colour_fmts));
mf->width = SENSOR_MAX_WIDTH;
else if (mf->width < SENSOR_MIN_WIDTH)
mf->width = SENSOR_MIN_WIDTH;
+
+ set_w = mf->width;
+ set_h = mf->height;
+ if (((set_w <= 176) && (set_h <= 144)) && sensor_qcif[0].reg)
+ {
+ set_w = 176;
+ set_h = 144;
+ }
+ else if (((set_w <= 320) && (set_h <= 240)) && sensor_qvga[0].reg)
+ {
+ set_w = 320;
+ set_h = 240;
+ }
+ else if (((set_w <= 352) && (set_h<= 288)) && sensor_cif[0].reg)
+ {
+ set_w = 352;
+ set_h = 288;
+ }
+ else if (((set_w <= 640) && (set_h <= 480)) && sensor_vga[0].reg)
+ {
+ set_w = 640;
+ set_h = 480;
+ }
+ else
+ {
+ set_w = SENSOR_INIT_WIDTH;
+ set_h = SENSOR_INIT_HEIGHT;
+ }
+ mf->width = set_w;
+ mf->height = set_h;
mf->colorspace = fmt->colorspace;
return ret;
case RK29_CAM_SUBDEV_IOREQUEST:
{
- sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
- if (sensor->sensor_io_request != NULL) {
- int j = 0;
- for(j = 0;j < RK_CAM_NUM;j++){
- if (sensor->sensor_io_request->gpio_res[j].dev_name &&
- (strcmp(sensor->sensor_io_request->gpio_res[j].dev_name, dev_name(icd->pdev)) == 0)) {
- sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[j];
- break;
- }
- }
- if(j == RK_CAM_NUM){
- SENSOR_TR("%s %s RK_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
- ret = -EINVAL;
- goto sensor_ioctl_end;
- }
- }
-
+ sensor->sensor_io_request = (struct rk29camera_platform_data*)arg;
+ if (sensor->sensor_io_request != NULL) {
+ sensor->sensor_gpio_res = NULL;
+ for (i=0; i<RK29_CAM_SUPPORT_NUMS;i++) {
+ if (sensor->sensor_io_request->gpio_res[i].dev_name &&
+ (strcmp(sensor->sensor_io_request->gpio_res[i].dev_name, dev_name(icd->pdev)) == 0)) {
+ sensor->sensor_gpio_res = (struct rk29camera_gpio_res*)&sensor->sensor_io_request->gpio_res[i];
+ }
+ }
+ if (sensor->sensor_gpio_res == NULL) {
+ SENSOR_TR("%s %s obtain gpio resource failed when RK29_CAM_SUBDEV_IOREQUEST \n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
+ } else {
+ SENSOR_TR("%s %s RK29_CAM_SUBDEV_IOREQUEST fail\n",SENSOR_NAME_STRING(),__FUNCTION__);
+ ret = -EINVAL;
+ goto sensor_ioctl_end;
+ }
/* ddl@rock-chips.com : if gpio_flash havn't been set in board-xxx.c, sensor driver must notify is not support flash control
for this project */
#if CONFIG_SENSOR_Flash
if (icd->iface == ici->nr) {
int ret;
icd->dev.parent = ici->v4l2_dev.dev;
- dev_set_name(&icd->dev, "%u-%u", icd->iface,
- icd->devnum);
+ dev_set_name(&icd->dev, "%u-%u-%s", icd->iface,
+ icd->devnum,dev_name(icd->pdev));
ret = device_register(&icd->dev);
if (ret < 0) {
icd->dev.parent = NULL;
struct v4l2_mbus_framefmt mf;
int ret;
- dev_info(dev, "Probing %s\n", dev_name(dev));
-
ret = regulator_bulk_get(icd->pdev, icl->num_regulators,
icl->regulators);
if (ret < 0)
soc_camera_power_set(icd, icl, 0);
mutex_unlock(&icd->video_lock);
-
+ dev_info(dev, "Probe %s success\n", dev_name(icd->pdev));
return 0;
evidstart:
epower:
regulator_bulk_free(icl->num_regulators, icl->regulators);
ereg:
+ dev_err(dev, "Probe %s failed\n", dev_name(icd->pdev));
return ret;
}
((!list_empty(&queue->mainqueue)) || (!(queue->flags & UVC_QUEUE_STREAMING))));
mutex_lock(&queue->mutex);
- if (ret)
+ if (ret || (!(queue->flags & UVC_QUEUE_STREAMING)))
goto done;
goto checks;
void wm831x_i2c_shutdown(struct i2c_client *i2c)
{
struct wm831x *wm831x = i2c_get_clientdata(i2c);
- printk("%s\n", __FUNCTION__);
- wm831x_device_shutdown(wm831x);
+// printk("%s\n", __FUNCTION__);
+// wm831x_device_shutdown(wm831x);
}
static const struct i2c_device_id wm831x_i2c_id[] = {
#include <mach/gpio.h>
#include <mach/iomux.h>
+#ifdef CONFIG_PHONE_INCALL_IS_SUSPEND
+#include <sound/soc.h>
+#endif
+
#if 0
#define DBG(x...) printk(KERN_DEBUG x)
#else
#ifdef CONFIG_PM
static int wm8994_suspend(struct device *dev)
{
- struct wm8994 *wm8994 = dev_get_drvdata(dev);
+ struct wm8994 *wm8994 = dev_get_drvdata(dev);
int ret;
-
-// printk("on wm8994-core.c wm8994_suspend\n");
+#ifdef CONFIG_PHONE_INCALL_IS_SUSPEND
+ printk("on wm8994-core.c wm8994_suspend\n");
+ if(snd_soc_incall_status(0,0))
+ {
+ DBG("incalling cannot suspend\n");
+ return 0;
+ }
+#endif
/* Don't actually go through with the suspend if the CODEC is
* still active (eg, for audio passthrough from CP. */
ret = wm8994_reg_read(wm8994, WM8994_POWER_MANAGEMENT_1);
static int wm8994_resume(struct device *dev)
{
- struct wm8994 *wm8994 = dev_get_drvdata(dev);
+ struct wm8994 *wm8994 = dev_get_drvdata(dev);
int ret;
-
-// printk("on wm8994-core.c wm8994_resume\n");
+#ifdef CONFIG_PHONE_INCALL_IS_SUSPEND
+ printk("on wm8994-core.c wm8994_resume\n");
+ if(snd_soc_incall_status(0,0))
+ {
+ DBG("incalling cannot resume\n");
+ return 0;
+ }
+#endif
/* We may have lied to the PM core about suspending */
if (!wm8994->suspended)
return 0;
#include <linux/workqueue.h>
#include <linux/mu509.h>
#include <linux/slab.h>
+#include <linux/earlysuspend.h>
MODULE_LICENSE("GPL");
struct class *modem_class = NULL;
static int do_wakeup_irq = 0;
static int modem_status;
-
+static int online = 0;
+int suspend_int =0;
static void ap_wakeup_bp(struct platform_device *pdev, int wake)
{
struct rk29_mu509_data *pdata = pdev->dev.platform_data;
static void do_wakeup(struct work_struct *work)
{
-// MODEMDBG("%s[%d]: %s\n", __FILE__, __LINE__, __FUNCTION__);
- //rk28_send_wakeup_key();
+ if(suspend_int)
+ {
+ gpio_set_value(gpdata->ap_wakeup_bp, 0);
+ suspend_int = 0;
+ }
+
}
static DECLARE_DELAYED_WORK(wakeup_work, do_wakeup);
do_wakeup_irq = 0;
// MODEMDBG("%s[%d]: %s\n", __FILE__, __LINE__, __FUNCTION__);
wake_lock_timeout(&modem_wakelock, 10 * HZ);
- schedule_delayed_work(&wakeup_work, HZ / 10);
+ schedule_delayed_work(&wakeup_work, 2*HZ);
}
return IRQ_HANDLED;
}
if(on_off)
{
MODEMDBG("------------modem_poweron\n");
+ gpio_set_value(pdata->bp_reset, GPIO_HIGH);
+ msleep(100);
+ gpio_set_value(pdata->bp_reset, GPIO_LOW);
gpio_set_value(pdata->bp_power, GPIO_LOW);
msleep(1000);
gpio_set_value(pdata->bp_power, GPIO_HIGH);
{
MODEMDBG("------------modem_poweroff\n");
gpio_set_value(pdata->bp_power, GPIO_LOW);
- mdelay(2500);
gpio_set_value(pdata->bp_power, GPIO_HIGH);
- mdelay(2500);
+ msleep(2500);
gpio_set_value(pdata->bp_power, GPIO_LOW);
}
return 0;
return 0;
}
-static int mu509_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+static long mu509_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
struct rk29_mu509_data *pdata = gpdata;
//MODEMDBG("-------------%s\n",__FUNCTION__);
{
case MU509_RESET:
gpio_set_value(pdata->bp_reset, GPIO_HIGH);
- mdelay(100);
+ msleep(100);
gpio_set_value(pdata->bp_reset, GPIO_LOW);
- mdelay(100);
+ msleep(100);
gpio_set_value(pdata->bp_power, GPIO_LOW);
msleep(1000);
gpio_set_value(pdata->bp_power, GPIO_HIGH);
.name = MODEM_NAME,
.fops = &mu509_fops
};
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37))
+static ssize_t modem_status_read(struct class *cls, struct class_attribute *attr, char *_buf)
+#else
static ssize_t modem_status_read(struct class *cls, char *_buf)
+#endif
{
return sprintf(_buf, "%d\n", modem_status);
}
-
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37))
+static ssize_t modem_status_write(struct class *cls, struct class_attribute *attr, const char *_buf, size_t _count)
+#else
static ssize_t modem_status_write(struct class *cls, const char *_buf, size_t _count)
+#endif
{
-
- printk("Read data from Android: %s\n", _buf);
- struct rk29_mu509_data *pdata = gpdata;
- int new_state = simple_strtoul(_buf, NULL, 16);
+ int new_state = simple_strtoul(_buf, NULL, 16);
if(new_state == modem_status) return _count;
if (new_state == 1){
printk("%s, c(%d), open modem \n", __FUNCTION__, new_state);
- //gpio_set_value(pdata->bp_power, GPIO_HIGH);
- gpio_set_value(pdata->bp_reset, GPIO_HIGH);
- mdelay(100);
- gpio_set_value(pdata->bp_reset, GPIO_LOW);
- modem_poweron_off(1);
+ modem_poweron_off(1);
}else if(new_state == 0){
printk("%s, c(%d), close modem \n", __FUNCTION__, new_state);
- gpio_set_value(pdata->bp_power, GPIO_LOW);
+ modem_poweron_off(0);
}else{
printk("%s, invalid parameter \n", __FUNCTION__);
}
return _count;
}
static CLASS_ATTR(modem_status, 0777, modem_status_read, modem_status_write);
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37))
+static ssize_t online_read(struct class *cls, struct class_attribute *attr, char *_buf)
+#else
+static ssize_t online_read(struct class *cls, char *_buf)
+#endif
+{
+ return sprintf(_buf, "%d\n", online);
+
+}
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37))
+static ssize_t online_write(struct class *cls, struct class_attribute *attr, const char *_buf, size_t _count)
+#else
+static ssize_t online_write(struct class *cls, const char *_buf, size_t _count)
+#endif
+{
+ int new_value = simple_strtoul(_buf, NULL, 16);
+ if(new_value == online) return _count;
+ online = new_value;
+ return _count;
+}
+static CLASS_ATTR(online, 0777, online_read, online_write);
+static void rk29_early_suspend(struct early_suspend *h)
+{
+ printk("*********************509____suspend\n");
+
+}
+static void rk29_early_resume(struct early_suspend *h)
+{
+ if(suspend_int)
+ {
+ printk("***************509____resume\n");
+ gpio_set_value(gpdata->ap_wakeup_bp, 0);
+ suspend_int = 0;
+ }
+}
+
+static struct early_suspend mu509_early_suspend = {
+ .suspend = rk29_early_suspend,
+ .resume = rk29_early_resume,
+ .level = EARLY_SUSPEND_LEVEL_DISABLE_FB - 1,
+ };
static int mu509_probe(struct platform_device *pdev)
{
struct rk29_mu509_data *pdata = gpdata = pdev->dev.platform_data;
pdata->dev = &pdev->dev;
if(pdata->io_init)
pdata->io_init();
- gpio_set_value(pdata->bp_reset, GPIO_HIGH);
- mdelay(100);
- gpio_set_value(pdata->bp_reset, GPIO_LOW);
+ gpio_set_value(pdata->modem_power_en, GPIO_HIGH);
+ msleep(1000);
modem_poweron_off(1);
modem_status = 1;
+ register_early_suspend(&mu509_early_suspend);
mu509_data = kzalloc(sizeof(struct modem_dev), GFP_KERNEL);
if(mu509_data == NULL)
{
return 0;
}
-int mu509_suspend(struct platform_device *pdev)
+int mu509_suspend(struct platform_device *pdev, pm_message_t state)
{
+ suspend_int = 1;
do_wakeup_irq = 1;
//MODEMDBG("-------------%s\n",__FUNCTION__);
+ if(!online)
ap_wakeup_bp(pdev, 1);
rk29_mux_api_set(GPIO1C1_UART0RTSN_SDMMC1WRITEPRT_NAME, GPIO1H_GPIO1C1);
//gpio_direction_output(RK29_PIN1_PC1, 1);
int mu509_resume(struct platform_device *pdev)
{
//MODEMDBG("-------------%s\n",__FUNCTION__);
- ap_wakeup_bp(pdev, 0);
+ //ap_wakeup_bp(pdev, 0);
rk29_mux_api_set(GPIO1C1_UART0RTSN_SDMMC1WRITEPRT_NAME, GPIO1H_UART0_RTS_N);
+ if(gpio_get_value(gpdata->bp_wakeup_ap))
+ {
+ schedule_delayed_work(&wakeup_work, 2*HZ);
+ }
return 0;
}
-void mu509_shutdown(struct platform_device *pdev, pm_message_t state)
+void mu509_shutdown(struct platform_device *pdev)
{
struct rk29_mu509_data *pdata = pdev->dev.platform_data;
struct modem_dev *mu509_data = platform_get_drvdata(pdev);
if(pdata->io_deinit)
pdata->io_deinit();
cancel_work_sync(&mu509_data->work);
+ gpio_free(pdata->modem_power_en);
gpio_free(pdata->bp_power);
gpio_free(pdata->bp_reset);
gpio_free(pdata->ap_wakeup_bp);
modem_class = class_create(THIS_MODULE, "rk291x_modem");
ret = class_create_file(modem_class, &class_attr_modem_status);
+ ret = class_create_file(modem_class, &class_attr_online);
if (ret)
{
printk("Fail to class rk291x_modem.\n");
//MODEMDBG("-------------%s\n",__FUNCTION__);
platform_driver_unregister(&mu509_driver);
class_remove_file(modem_class, &class_attr_modem_status);
+ class_remove_file(modem_class, &class_attr_online);
}
module_init(mu509_init);
#define RK29_SDMMC_WAIT_DTO_INTERNVAL 4500 //The time interval from the CMD_DONE_INT to DTO_INT
#define RK29_SDMMC_REMOVAL_DELAY 2000 //The time interval from the CD_INT to detect_timer react.
-#define RK29_SDMMC_VERSION "Ver.3.03 The last modify date is 2012-03-23,modifyed by XBW."
+#define RK29_SDMMC_VERSION "Ver.3.03 The last modify date is 2012-03-23,modifyed by XBW."
#if !defined(CONFIG_USE_SDMMC0_FOR_WIFI_DEVELOP_BOARD)
#define RK29_CTRL_SDMMC_ID 0 //mainly used by SDMMC
* V1.5 - Support RK2818 (Debug the Register Function)
*/
-#define DEBUG
+//#define DEBUG
-//#define RK2818
+#define RK2818
#include <linux/module.h>
dev->net->hard_header_len += DM_TX_OVERHEAD;
dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
#ifdef RK2818 //harris 2010.12.27
- dev->rx_urb_size = 8912; // ftp fail fixed
+ dev->rx_urb_size = dev->net->mtu + ETH_HLEN + DM_RX_OVERHEAD+1;
#else
dev->rx_urb_size = 2048;//dev->net->mtu + ETH_HLEN + DM_RX_OVERHEAD+1; // ftp fail fixed
#endif
dev->net->ethtool_ops = &sr9700_android_ethtool_ops;
dev->net->hard_header_len += QF_TX_OVERHEAD;
dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
- dev->rx_urb_size =4096;// dev->net->mtu + ETH_HLEN + QF_RX_OVERHEAD;
+ dev->rx_urb_size = dev->net->mtu + ETH_HLEN + QF_RX_OVERHEAD;
dev->mii.dev = dev->net;
dev->mii.mdio_read = sr9700_android_mdio_read;
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`
end
DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, start_seq: %d\n", __FUNCTION__, __LINE__,
preorder_ctrl->indicate_seq, start_seq);
#endif
+ #else
+ preorder_ctrl->indicate_seq = 0xffff;
#endif
preorder_ctrl->enable =(pmlmeinfo->bAcceptAddbaReq == _TRUE)? _TRUE :_FALSE;
begin 644 os_dep/linux/ioctl_linux.o
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`
end
/*
* Broadcom BCM4319 driver version.
*/
-#define RTL8192_DRV_VERSION "3.26"
+#define RTL8192_DRV_VERSION "3.28"
#endif /* WIFI_BCM4319_VERSION_H */
*/\r
\r
static struct class *rkwifi_class = NULL;\r
-static CLASS_ATTR(chip, 0666, wifi_chip_read, NULL);\r
+static CLASS_ATTR(chip, 0664, wifi_chip_read, NULL);\r
\r
int rkwifi_sysif_init(void)\r
{\r
//variable init
data->client = client;
data->adc_val = adc_sync_read(client);
-
- //init a timer for adc sample
- //init a delay work for adc timer work
- setup_timer(&data->timer, rk29_adc_battery_scan_timer, (unsigned long)data);
- data->timer.expires = jiffies + 2000;
- add_timer(&data->timer);
-
- INIT_WORK(&data->timer_work, rk29_adc_battery_timer_work);
- INIT_WORK(&data->resume_work, rk29_adc_battery_resume_check);
-
-#if defined(CONFIG_BATTERY_RK29_AC_CHARGE)
- //init dc dectet irq & delay work
- if (pdata->dc_det_pin != INVALID_GPIO)
- {
- irq = gpio_to_irq(pdata->dc_det_pin);
-
- irq_flag = gpio_get_value (pdata->dc_det_pin) ? IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
- ret = request_irq(irq, rk29_adc_battery_dc_wakeup, irq_flag, "rk29_adc_battery", NULL);
- if (ret) {
- printk("failed to request dc det irq\n");
- goto err_dcirq_failed;
- }
- enable_irq_wake(irq);
-
- INIT_WORK(&data->dcwakeup_work, rk29_adc_battery_dcdet_delaywork);
- }
-#endif
-
- //Power on Battery detect
- rk29_adc_battery_lowpower_check(data);
-
- //power supply register
- wake_lock_init(&batt_wake_lock, WAKE_LOCK_SUSPEND, "batt_lock");
ret = power_supply_register(&pdev->dev, &rk29_battery_supply);
if (ret)
goto err_battery_failed;
}
-#if defined(CONFIG_BATTERY_RK29_AC_CHARGE)
- ret = power_supply_register(&pdev->dev, &rk29_ac_supply);
- if (ret)
- {
- printk(KERN_INFO "fail to ac power_supply_register\n");
- goto err_ac_failed;
- }
-#endif
#if defined(CONFIG_BATTERY_RK29_USB_CHARGE)
ret = power_supply_register(&pdev->dev, &rk29_usb_supply);
goto err_usb_failed;
}
#endif
-
+
+ INIT_WORK(&data->timer_work, rk29_adc_battery_timer_work);
+ INIT_WORK(&data->resume_work, rk29_adc_battery_resume_check);
+
+ //init a timer for adc sample
+ //init a delay work for adc timer work
+ setup_timer(&data->timer, rk29_adc_battery_scan_timer, (unsigned long)data);
+ data->timer.expires = jiffies + 2000;
+ add_timer(&data->timer);
+
+
+ wake_lock_init(&batt_wake_lock, WAKE_LOCK_SUSPEND, "batt_lock");
+
+#if defined(CONFIG_BATTERY_RK29_AC_CHARGE)
+
+ ret = power_supply_register(&pdev->dev, &rk29_ac_supply);
+ if (ret) {
+ printk(KERN_INFO "fail to ac power_supply_register\n");
+ goto err_ac_failed;
+ }
+ //init dc dectet irq & delay work
+ if (pdata->dc_det_pin != INVALID_GPIO)
+ {
+ INIT_WORK(&data->dcwakeup_work, rk29_adc_battery_dcdet_delaywork);
+ irq = gpio_to_irq(pdata->dc_det_pin);
+
+ irq_flag = gpio_get_value (pdata->dc_det_pin) ? IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
+ ret = request_irq(irq, rk29_adc_battery_dc_wakeup, irq_flag, "rk29_adc_battery", NULL);
+ if (ret) {
+ printk("failed to request dc det irq\n");
+ goto err_dcirq_failed;
+ }
+ enable_irq_wake(irq);
+
+ }
+#endif
+
+ //Power on Battery detect
+ rk29_adc_battery_lowpower_check(data);
+
+
printk(KERN_INFO "rk29_adc_battery: driver initialized\n");
return 0;
3710,3714,3718,3722,3726,
3730,3734,3738,3742,3746,
3750,3756,3764,3774,3786,
- 3800,3808,3817,3827,3838,
+ 3800,3808,3817,3827,3845,
3950,3964,3982,4002,4026,
- 4050,4074,4098,4123,4149,4178
+ 4030,4034,4055,4070,4085,4120
};
static int batt_disp_table[batt_num] = {
};
static int batt_chg_step_table[batt_num] = {
- 3530,3565,3600,3635,3655,3680,//+160
- 3700,3717,3734,3745,3755,//+150
- 3770,3778,3786,3795,3803,//+140
+ 3520,3525,3575,3600,3620,3644,//+160
+ 3662,3670,3684,3700,3715,//+150
+ 3720,3748,3756,3775,3790,//+140
3810,3814,3818,3822,3825,//+130
3830,3832,3834,3836,3837,//+120
- 3840,3842,3844,3846,3847,//+110
- 3850,3857,3864,3871,3876,//+100
- 3890,3897,3904,3911,3918,//+90
+ 3839,3841,3842,3844,3844,//+110
+ 3855,3860,3864,3871,3890,//+100
+ 3910,3930,3952,3977,3997,//+90
4030,4047,4064,4080,4096,//+80
- 4120,4132,4144,4156,4170,4180//+70
+ 4132,4144,4150,4170,4195,4200//+70
};
static int chg_num = 60;
static int disp_plus = 1000;
static int disp_minus = 1000;
+ static int disp_minus2 = 1000;
static int disp_curr = 0;
static int disp_num = 50;
+ static int batt_level_all = 0;
+ static int batt_level[20];
+ static int avr_num = 0;
+ static int avr_int = 0;
*level = wm831x_power->batt_info.level;
{
disp_plus = 0;
disp_minus = 0;
+ disp_minus2 = 0;
disp_curr = 0;
-
for(i = 0; i < batt_num; i++){
- if((batt_chg_step_table[i] <= batt_vol) &&
- (batt_chg_step_table[i+1] > batt_vol))
+ if(batt_vol >= batt_chg_step_table[i] &&
+ batt_vol < batt_chg_step_table[i+1])
break;
}
- *level = batt_disp_table[i];
-
- if (batt_vol <= batt_chg_step_table[0])
- *level = 0;
- if (batt_vol >= batt_chg_step_table[batt_num - 1])
- *level = 100;
-
- // ³õʼ״̬
+ if(batt_vol <= batt_chg_step_table[0])
+ i = 0;
+ if(batt_vol >= batt_chg_step_table[batt_num-1])
+ i = batt_num-1;
+ if(avr_int==0){
+ batt_level[avr_num] = batt_disp_table[i];
+ batt_level_all += batt_level[avr_num];
+ avr_num++;
+ if(avr_num >= 20)
+ {
+ avr_num = 0;
+ avr_int = 1;
+ }
+ else
+ {
+ *level = batt_disp_table[i];
+ return 0;
+ }
+ }
+ else {
+ batt_level_all -= batt_level[avr_num];
+ batt_level[avr_num]=batt_disp_table[i];
+ batt_level_all += batt_level[avr_num];
+ avr_num++;
+ }
+ if(avr_num >= 20)
+ avr_num = 0;
+ *level = batt_level_all/20;
if ((chg_plus == 1000) && (chg_minus == 1000))
{
*level = *level;
chg_plus = 0;
chg_minus = 0;
chg_curr = 0;
+
}
else
{
{
chg_minus = 0;
chg_curr = 0;
-
+ if(*level < 85)
+ chg_num =10;
+ else
+ chg_num = 5;
if (++chg_plus > chg_num)
{
*level = wm831x_power->batt_info.level + 1;
chg_plus = 0;
-
- if(*level < 85)
- chg_num = 60;
- else
- chg_num = 20;
-
- }
- else
- {
- *level = wm831x_power->batt_info.level;
- }
- }
-
- else if (*level >= wm831x_power->batt_info.level)
- {
- chg_plus = 0;
- chg_minus = 0;
-
- if (++chg_curr > chg_num)
- {
- *level = *level;
- chg_curr = 0;
- }
- else
- {
- *level = wm831x_power->batt_info.level;
- }
- }
- else if (*level < (wm831x_power->batt_info.level-1))
- {
- chg_plus = 0;
- chg_curr = 0;
- if (++chg_minus > (chg_num<<1))
- {
- *level = wm831x_power->batt_info.level - 1;
- chg_minus = 0;
-
- if(*level < 85)
- chg_num = 60;
- else
- chg_num = 20;
-
}
else
{
chg_plus = 0;
chg_minus = 0;
chg_curr = 0;
-
for(i = 0; i < batt_num; i++){
if(batt_vol >= batt_step_table[i] &&
batt_vol < batt_step_table[i+1])
break;
}
- *level = batt_disp_table[i];
-
- if (batt_vol <= batt_step_table[0])
- *level = 0;
- if (batt_vol >= batt_step_table[batt_num - 1])
- *level = 100;
-
- // ³õʼ״̬
+ if(batt_vol <= batt_step_table[0])
+ i = 0;
+ if(batt_vol >= batt_step_table[batt_num-1])
+ i = batt_num-1;
+ if(avr_int==0){
+ batt_level[avr_num] = batt_disp_table[i];
+ batt_level_all += batt_level[avr_num];
+ avr_num++;
+ if(avr_num >= 20)
+ {
+ avr_num = 0;
+ avr_int = 1;
+ }
+ else
+ {
+ *level = batt_disp_table[i];
+ return 0;
+ }
+ }
+ else {
+ batt_level_all -= batt_level[avr_num];
+ batt_level[avr_num]=batt_disp_table[i];
+ batt_level_all += batt_level[avr_num];
+ avr_num++;
+ }
+ if(avr_num >= 20)
+ avr_num = 0;
+ *level = batt_level_all/20;
if ((disp_plus == 1000) && (disp_minus == 1000))
{
*level = *level;
disp_plus = 0;
disp_minus = 0;
+ disp_minus2 =0;
disp_curr = 0;
}
else
- {
-
- if (*level <= (wm831x_power->batt_info.level-1))
+ {
+ if(*level <= (wm831x_power ->batt_info.level -20))
{
disp_plus = 0;
disp_curr = 0;
-
- if (++disp_minus > disp_num)
+ disp_minus2 = 0;
+ disp_num = 1;
+ if (++disp_minus > disp_num)
{
- *level = wm831x_power->batt_info.level - 1;
+ *level = wm831x_power->batt_info.level - 20;
disp_minus = 0;
-
- if((*level < 17) || (*level > 85))
- disp_num = 10;
- else
- disp_num = 50;
-
}
else
{
*level = wm831x_power->batt_info.level;
}
}
- else if (*level <= wm831x_power->batt_info.level)
+ else if (*level <= (wm831x_power->batt_info.level-1))
{
disp_plus = 0;
+ disp_curr = 0;
disp_minus = 0;
-
- if (++disp_curr > disp_num)
- {
- *level = *level;
- disp_curr = 0;
- }
+ if((*level < 17) || (*level > 85))
+ disp_num = 30;
else
+ disp_num = 80;
+
+ if (++disp_minus2 > disp_num)
{
- *level = wm831x_power->batt_info.level;
- }
- }
- else if (*level >= (wm831x_power->batt_info.level+1))
- {
- disp_minus = 0;
- disp_curr = 0;
-
- if (++disp_plus > (disp_num<<1))
- {
- *level = wm831x_power->batt_info.level + 1;
- disp_plus = 0;
- if((*level < 17) || (*level > 85))
- disp_num = 10;
- else
- disp_num = 50;
+ *level = wm831x_power->batt_info.level - 1;
+ disp_minus2 = 0;
}
else
{
+
*level = wm831x_power->batt_info.level;
- }
+ }
}
else
{
disp_plus = 0;
disp_minus = 0;
+ disp_minus2 = 0;
disp_curr = 0;
*level = wm831x_power->batt_info.level;
}
#include <linux/gpio.h>
#include <linux/slab.h>
+#include <linux/delay.h>
#include <linux/mfd/wm8994/core.h>
#include <linux/mfd/wm8994/registers.h>
#include <linux/mfd/wm8994/pdata.h>
ret);
goto err_gpio;
}
+ msleep(50);
} else
ldo->is_enabled = true;
0 - no use,original code
1 - use
*/
-#define gcdENABLE_MMU_PROTECTING 1
+#define gcdENABLE_MMU_PROTECTING 1
#endif /* __gc_hal_options_h_ */
return gcvSTATUS_OK;
OnError:
-
/* Roll back. */
if (mmu != gcvNULL)
{
/* Not enough pages avaiable. */
gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
}
-
+
/* Grab the mutex. */
gcmkONERROR(gckOS_AcquireMutex(Mmu->os, Mmu->pageTableMutex, gcvINFINITE));
mutex = gcvTRUE;
return gcvSTATUS_OK;
OnError:
-
if (mutex)
{
/* Release the mutex. */
gcmkHEADER_ARG("Mmu=0x%x PageTable=0x%x PageCount=%lu",
Mmu, PageTable, PageCount);
-
/* Verify the arguments. */
gcmkVERIFY_OBJECT(Mmu, gcvOBJ_MMU);
gcmkVERIFY_ARGUMENT(PageTable != gcvNULL);
unregister_chrdev(major, DRV_NAME);
#endif
-
- shutdown = 1;
+
+ shutdown = 1;
+
+ //hyh added
return;
+
mdelay(100);
gckGALDEVICE_Stop(galDevice);
mdelay(50);
if (!signal->manualReset && timeout == 0) timeout = 1;
rc = wait_for_completion_interruptible_timeout(&signal->event, timeout);
+
+#if 1 // dkm : avoid return OK when timeout in kernel3.0
+ status = (rc == 0) ? gcvSTATUS_TIMEOUT : gcvSTATUS_OK;
+#else
status = ((rc == 0) && !signal->event.done) ? gcvSTATUS_TIMEOUT
: gcvSTATUS_OK;
+#endif
/* Return status. */
gcmkFOOTER();
if (!config)
return -ENOMEM;
- config->fsg.nluns = 1;
+ config->fsg.nluns = 2;
config->fsg.luns[0].removable = 1;
+ config->fsg.luns[1].removable = 1;
common = fsg_common_init(NULL, cdev, &config->fsg);
if (IS_ERR(common)) {
err = sysfs_create_link(&f->dev->kobj,
&common->luns[0].dev.kobj,
"lun");
+ err = sysfs_create_link(&f->dev->kobj, &common->luns[1].dev.kobj,"lun1");
if (err) {
kfree(config);
return err;
printk("store_file: \"%s\"\n", buf);
#endif
-#ifndef CONFIG_USB_ANDROID_MASS_STORAGE
+#ifndef CONFIG_USB_G_ANDROID
/* disabled in android because we need to allow closing the backing file
* if the media was removed
*/
{ USB_DEVICE(ZTE_VENDOR_ID, 0xFFFF) },
{ USB_DEVICE(LEADCORE_VENDOR_ID, 0x5700) },
{ USB_DEVICE(LEADCORE_VENDOR_ID, 0x6341) },
+ { USB_DEVICE(0x230d, 0x000d) },
+ { USB_DEVICE(0x0E8D, 0x00A2) },
+ { USB_DEVICE(0x1E89, 0x1A20) },
+ { USB_DEVICE(0x12D1, 0x1C05) },
+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0007, 0xff, 0xff, 0xff) },
+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0167, 0xff, 0xff, 0xff) },
{ USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD100) },
{ USB_DEVICE(CELOT_VENDOR_ID, CELOT_PRODUCT_CT680M) }, /* CT-650 CDMA 450 1xEVDO modem */
int status = urb->status;
struct usb_serial_port *port = urb->context;
struct option_port_private *portdata = usb_get_serial_port_data(port);
+ static int err_times = 0;
dbg("%s", __func__);
dbg("%s: urb %p port %p has data %p", __func__, urb, port, portdata);
if (status == 0) {
+ err_times = 0;
struct usb_ctrlrequest *req_pkt =
(struct usb_ctrlrequest *)urb->transfer_buffer;
dbg("%s: type %x req %x", __func__,
req_pkt->bRequestType, req_pkt->bRequest);
}
- } else
- err("%s: error %d", __func__, status);
-
+ }
+ else{
+ if(status == -EPROTO && err_times++ >10){
+ err_times = 0;
+ printk("%s,recieve -71 error more than 10 times,so reset usb\n",__FUNCTION__);
+ usb_queue_reset_device(port->serial->interface);
+ return;
+ }else
+ err("%s : error %d",__func__, status);
+ }
+
/* Resubmit urb so we continue receiving IRQ data */
if (status != -ESHUTDOWN && status != -ENOENT) {
err = usb_submit_urb(urb, GFP_ATOMIC);
.no_dynamic_id = 1,
.supports_autosuspend = 1,
};
+#ifdef CONFIG_MU509
+static int MU509_USB = 0;
+#define MU509_USB_PORT (SERIAL_TTY_MINORS - 10)
+#endif
/* There is no MODULE_DEVICE_TABLE for usbserial.c. Instead
the MODULE_DEVICE_TABLE declarations in each serial driver
{
unsigned int i, j;
int good_spot;
+ int a=0;
dbg("%s %d", __func__, num_ports);
*minor = 0;
mutex_lock(&table_lock);
- for (i = 0; i < SERIAL_TTY_MINORS; ++i) {
+#ifdef CONFIG_MU509
+ if (MU509_USB)
+ a= MU509_USB_PORT;
+#endif
+ for (i = a; i < SERIAL_TTY_MINORS; ++i) {
if (serial_table[i])
continue;
} else {
serial->attached = 1;
}
+#ifdef CONFIG_MU509
+ if ((le16_to_cpu(dev->descriptor.idVendor) == 0x12D1 ) && (le16_to_cpu(dev->descriptor.idProduct) == 0x1001))
+ MU509_USB =1;
+ else
+ MU509_USB = 0;
+#endif
if (get_free_serial(serial, num_ports, &minor) == NULL) {
dev_err(&interface->dev, "No more free serial devices\n");
obj-$(CONFIG_VGASTATE) += vgastate.o
obj-y += fb_notify.o
+
obj-$(CONFIG_FB) += fb.o
+ifdef CONFIG_MACH_RK29_2906
+fb.o: fb.uu
+ @echo "UUDE fb.uu"
+ @uudecode fb.uu -o fb.o
+else
fb-y := fbmem.o fbmon.o fbcmap.o fbsysfs.o \
modedb.o fbcvt.o
fb-objs := $(fb-y)
+endif
obj-$(CONFIG_VT) += console/
obj-$(CONFIG_LOGO) += logo/
--- /dev/null
+begin 644 fb.o
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+M<F]C7V-R96%T95]D871A`&9R86UE8G5F9F5R7V%L;&]C`&9B7W-E=%]V87(`
+M<FM?8VAE8VM?<F5S;VQU=&EO;@!F8E]F:6YD7V)E<W1?;6]D90!F8E]D97-T
+M<F]Y7VUO9&5D8@!F8E]A;&QO8U]C;6%P7V=F<`!F8E]E9&ED7W1O7VUO;G-P
+M96-S`')E9VES=&5R961?9F(`9F)?9V5T7VUO9&4`9F)?=FED96]M;V1E7W1O
+M7VUO9&5L:7-T`&9B7V9I;F1?;6]D90!F8E]F:6YD7VYE87)E<W1?;6]D90!F
+M8E]S971?=7-E<E]C;6%P`&MM96U?8V%C:&5?86QL;V,`;6]D=6QE7W!U=`!F
+M8E]D96%L;&]C7V-M87``9&5V:6-E7V-R96%T95]F:6QE`%]?865A8FE?:61I
+M=@!F8E]S:&]W7V-H87)G95]L;V=O`'!R965M<'1?<V-H961U;&4`9&5V:6-E
+M7V-R96%T90!F8E]M;V1E7VES7V5Q=6%L`&9B7W9A<E]T;U]V:61E;VUO9&4`
+M;75T97A?;&]C:P!C;VYS;VQE7VQO8VL`<W1R;F-M<`!F8E]M;V1E7V]P=&EO
+M;@!R96=I<W1E<E]F<F%M96)U9F9E<@!M96UC;7``9F)?86QL;V-?8VUA<`!P
+M<FEN=&L`7U]M=71E>%]I;FET`&9B7V1E9F%U;'1?8VUA<`!F8E]G971?;W!T
+M:6]N<P!D969A=6QT7VQL<V5E:P!R96UO=F5?8V]N9FQI8W1I;F=?9G)A;65B
+M=69F97)S`%]?;65M>F5R;P!F8E]P<F5P87)E7VQO9V\`7U]A96%B:5]U:61I
+M=@!C;VYS;VQE7W5N;&]C:P!F8E]F:6YD7VUO9&5?8W9T`&9B7W-E=%]S=7-P
+M96YD`&9B7VYE=U]M;V1E;&ES=`!F8E]E9&ED7V%D9%]M;VYS<&5C<P!F8E]N
+M;W1I9FEE<E]C86QL7V-H86EN`&9B7V-O<'E?8VUA<`!F8E]F:7)M=V%R95]E
+M9&ED`'-E<5]R96%D`&9B7V=E=%]C;VQO<E]D97!T:`!M=71E>%]U;FQO8VL`
+M9F)?9&5L971E7W9I9&5O;6]D90!F8E]V861D<@!?7W)E9VES=&5R7V-H<F1E
+M=@!D979I8V5?9&5S=')O>0!S97%?<')I;G1F`&=?4FLR.7AX0VAI<`!F8E]P
+M87)S95]E9&ED`%]?865A8FE?=6ED:79M;V0`<VEM<&QE7W-T<G1O=6P`9F)?
+M:6YI=%]D979I8V4`9F)?861D7W9I9&5O;6]D90!F8E]D97-T<F]Y7VUO9&5L
+M:7-T`&UA;&QO8U]S:7IE<P!F8E]F:6YD7V)E<W1?9&ES<&QA>0!F8E]P86Y?
+M9&ES<&QA>0!F8E]C;6%P7W1O7W5S97(`<V5Q7V]P96X`9F)?9V5T7V)U9F9E
+M<E]O9F9S970`9&5V7W-E=%]D<G9D871A`&9R86UE8G5F9F5R7W)E;&5A<V4`
+M<W1R;&5N`%]?865A8FE?=6YW:6YD7V-P<%]P<C$`7U]C;W!Y7W1O7W5S97(`
+M<W1R8VAR`%]?8V]P>5]F<F]M7W5S97(`7U]K;6%L;&]C`&1E=FEC95]R96UO
+9=F5?9FEL90!?7W)E<75E<W1?;6]D=6QE````
+`
+end
}\r
#endif\r
static struct device_attribute hdmi_attrs[] = {\r
- __ATTR(state, 0777, hdmi_show_state_attrs, hdmi_restore_state_attrs),\r
- __ATTR(enable, 0777, hdmi_show_switch_attrs, hdmi_restore_switch_attrs),\r
- __ATTR(debug, 0777, hdmi_show_debug_attrs, hdmi_restore_debug_attrs),\r
+ __ATTR(state, 0774, hdmi_show_state_attrs, hdmi_restore_state_attrs),\r
+ __ATTR(enable, 0774, hdmi_show_switch_attrs, hdmi_restore_switch_attrs),\r
+ __ATTR(debug, 0774, hdmi_show_debug_attrs, hdmi_restore_debug_attrs),\r
//__ATTR(init, 0777, NULL, hdmi_restore_init_attrs),\r
};\r
int hdmi_create_attrs(struct hdmi *hdmi)\r
unsigned long phys;
size_t size;
};
+
struct ion_flush_data {
struct ion_handle *handle;
void *virt;
size_t size;
};
+
+struct ion_client_data {
+#define ION_TYPE_GET_TOTAL_SIZE 0
+#define ION_TYPE_SIZE_GET_COUNT 1
+ unsigned int type;
+ union {
+ size_t size;
+ size_t total_size;
+ };
+ unsigned int count;
+};
+
#define ION_IOC_MAGIC 'I'
/**
#define ION_CACHE_CLEAN _IOWR(ION_IOC_MAGIC, 8, struct ion_flush_data)
#define ION_CACHE_INVALID _IOWR(ION_IOC_MAGIC, 9, struct ion_flush_data)
#define ION_GET_PHYS _IOWR(ION_IOC_MAGIC, 10, unsigned long)
+#define ION_GET_CLIENT _IOWR(ION_IOC_MAGIC, 11, struct ion_client_data)
+
#endif /* _LINUX_ION_H */
/* WM8958 microphone bias configuration */
int micbias[2];
-
};
#endif
unsigned int bp_reset_active_low;
unsigned int bp_wakeup_ap;
unsigned int ap_wakeup_bp;
+ unsigned int modem_power_en;
};
#define MODEM_NAME "mu509"
SND_SOC_RBTREE_COMPRESSION
};
+#ifdef CONFIG_PHONE_INCALL_IS_SUSPEND
+int snd_soc_incall_status(int read_or_write, int status);
+#endif
+
+
int snd_soc_codec_set_sysclk(struct snd_soc_codec *codec, int clk_id,
unsigned int freq, int dir);
int snd_soc_codec_set_pll(struct snd_soc_codec *codec, int pll_id, int source,
arch/arm/mach-rk29/clock.c
arch/arm/mach-rk29/ddr.c
arch/arm/mach-rk29/vpu*.c
+arch/arm/mach-rk29/verifyID.c
drivers/staging/rk29/ipp/rk29-ipp.c
)
arch/arm/mach-rk29/board-rk29-p91*
arch/arm/configs/rk29_p91_defconfig
-arch/arm/mach-rk29/board-rk29phonepadsdk*
-arch/arm/configs/rk29_phonepadsdk_defconfig
-
arch/arm/mach-rk29/board-rk29-phonesdk*
arch/arm/configs/rk29_phonesdk_defconfig
+/*
+ * rt5625.c -- RT5625 ALSA SoC audio codec driver
+ *
+ * Copyright 2011 Realtek Semiconductor Corp.
+ * Author: Johnny Hsu <johnnyhsu@realtek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
#include <linux/module.h>
#include <linux/moduleparam.h>
-#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
-#include <linux/jiffies.h>
-#include <asm/delay.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc-dapm.h>
#include <sound/initval.h>
#include <sound/tlv.h>
-#include <asm/div64.h>
-
+#include <linux/gpio.h>
#include "rt5625.h"
-
-#if REALTEK_HWDEP
-
-#include <linux/ioctl.h>
-#include <linux/types.h>
-
+#include <mach/board.h>
+
+#define RT5625_PROC
+#ifdef RT5625_PROC
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/vmalloc.h>
+char debug_write_read = 0;
#endif
-#if 0
+#if 1
#define DBG(x...) printk(KERN_INFO x)
#else
#define DBG(x...) do { } while (0)
#endif
-#define AUDIO_NAME "rt5625"
-#define RT5625_VERSION "0.03 alsa 1.0.21"
-#define ALSA_SOC_VERSION "1.0.21"
+static struct snd_soc_codec *rt5625_codec;
-#define RT5625_EQ_FUNC_ENA 0
+#define RT5625_REG_RW 1 /* for debug */
+//#define RT5625_DEMO 1 /* only for demo; please remove it */
-static void hp_depop_mode2(struct snd_soc_codec *codec);
-static void hp_mute_unmute_depop(struct snd_soc_codec *codec,int mute);
+#define RT5625_F_SMT_PHO
+#define RT5625_PLY_BIT 0
+#define RT5625_PLY_MASK (0x1)
+#define RT5625_REC_BIT 1
+#define RT5625_REC_MASK (0x1 << RT5625_REC_BIT)
+#define RT5625_3G_BIT 2
+#define RT5625_3G_MASK (0x1 << RT5625_3G_BIT)
+#define RT5625_BT_BIT 3
+#define RT5625_BT_MASK (0x1 << RT5625_BT_BIT)
+#define RT5625_VOIP_BIT 4
+#define RT5625_VOIP_MASK (0x1 << RT5625_VOIP_BIT)
struct rt5625_priv {
unsigned int stereo_sysclk;
unsigned int voice_sysclk;
-};
-struct rt5625_init_reg {
- u8 reg_index;
- u16 reg_value;
+ int vodsp_fun;
+ int spk_ctr_status;
+ int spk_ctr_pin;
+ int spk_ctr_on;
+ int spk_ctr_off;
+#ifdef RT5625_F_SMT_PHO
+ int app_bmp;/* bit{0, 1, 2, 3, 4} = {play, rec, 3g, bt, voip} */
+ int pll_sel;
+ int pll2_sel;
+ int dac_active;
+ int adc_active;
+ int headset;
+ int vodsp_fun_bak;
+#endif
};
-static struct rt5625_init_reg rt5625_init_list[] = {
-
- {RT5625_HP_OUT_VOL , 0x8888}, //default is -12db
- {RT5625_SPK_OUT_VOL , 0x8080}, //default is 0db
- {RT5625_DAC_AND_MIC_CTRL , 0xee03}, //DAC to hpmixer
- {RT5625_OUTPUT_MIXER_CTRL , 0x0748}, //all output from hpmixer
- {RT5625_MIC_CTRL , 0x0500}, //mic boost 20db
- {RT5625_ADC_REC_MIXER , 0x3f3f}, //record source from mic1
- {RT5625_GEN_CTRL_REG1 , 0x0c0a}, //speaker vdd ratio is 1
- {RT5625_ADC_REC_GAIN , 0xd5d5}, //gain 15db of ADC by default
-
+#ifdef RT5625_F_SMT_PHO
+static u16 rt5625_voip_back[][2] = {
+ {RT5625_VODSP_PDM_CTL, 0x0000},
+ {RT5625_F_DAC_ADC_VDAC, 0x0000},
};
+#define RT5625_VOIP_BK_NUM \
+ (sizeof(rt5625_voip_back) / sizeof(rt5625_voip_back[0]))
+#endif
-#define RT5625_INIT_REG_NUM ARRAY_SIZE(rt5625_init_list)
-
-#if (RT5625_EQ_FUNC_ENA==1)
-//*************************************************************************************************
-//eq table
-//*************************************************************************************************
-enum
-{
- NORMAL=0,
- CLUB,
- DANCE,
- LIVE,
- POP,
- ROCK,
- OPPO,
- TREBLE,
- BASS
+#ifdef RT5625_DEMO
+struct rt5625_init_reg {
+ u8 reg;
+ u16 val;
};
-typedef struct _HW_EQ_PRESET
-{
- u16 HwEqType;
- u16 EqValue[14];
- u16 HwEQCtrl;
-
-}HW_EQ_PRESET;
-
-
-HW_EQ_PRESET HwEq_Preset[]={
-/* 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0x6e*/
- {NORMAL,{0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000},0x0000},
- {CLUB ,{0x1C10,0x0000,0xC1CC,0x1E5D,0x0699,0xCD48,0x188D,0x0699,0xC3B6,0x1CD0,0x0699,0x0436,0x0000},0x800E},
- {DANCE ,{0x1F2C,0x095B,0xC071,0x1F95,0x0616,0xC96E,0x1B11,0xFC91,0xDCF2,0x1194,0xFAF2,0x0436,0x0000},0x800F},
- {LIVE ,{0x1EB5,0xFCB6,0xC24A,0x1DF8,0x0E7C,0xC883,0x1C10,0x0699,0xDA41,0x1561,0x0295,0x0436,0x0000},0x800F},
- {POP ,{0x1EB5,0xFCB6,0xC1D4,0x1E5D,0x0E23,0xD92E,0x16E6,0xFCB6,0x0000,0x0969,0xF988,0x0436,0x0000},0x800F},
- {ROCK ,{0x1EB5,0xFCB6,0xC071,0x1F95,0x0424,0xC30A,0x1D27,0xF900,0x0C5D,0x0FC7,0x0E23,0x0436,0x0000},0x800F},
- {OPPO ,{0x0000,0x0000,0xCA4A,0x17F8,0x0FEC,0xCA4A,0x17F8,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000},0x800F},
- {TREBLE,{0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x188D,0x1699},0x8010},
- {BASS ,{0x1A43,0x0C00,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000},0x8001},
-
+static struct rt5625_init_reg init_list[] = {
+ {RT5625_HP_OUT_VOL , 0x8888}, //default is -12db
+ {RT5625_SPK_OUT_VOL , 0x8080}, //default is 0db
+ {RT5625_PHONEIN_VOL , 0xe800}, //phone differential
+ {RT5625_DAC_MIC_CTRL , 0xee01}, //DAC to hpmixer & spkmixer
+ {RT5625_OUTMIX_CTRL , 0x2bc8}, //spk from spkmixer; hp from hpmixer; aux from monomixer; classAB
+ {RT5625_ADC_REC_MIXER , 0x1f1f}, //record source from mic1 & mic2
+ {RT5625_GEN_CTRL1 , 0x0c08}, //speaker vdd ratio is 1; 1.25VDD ratio
};
+#define RT5625_INIT_REG_LEN ARRAY_SIZE(init_list)
+static int rt5625_reg_init(struct snd_soc_codec *codec)
+{
+ int i;
+ for (i = 0; i < RT5625_INIT_REG_LEN; i++)
+ snd_soc_write(codec, init_list[i].reg, init_list[i].val);
+ return 0;
+}
#endif
-//*************************************************************************************************
-//*************************************************************************************************
-
-/*
- * bit[0] for linein playback switch
- * bit[1] phone
- * bit[2] mic1
- * bit[3] mic2
- * bit[4] vopcm
- *
- */
-#define HPL_MIXER 0x80
-#define HPR_MIXER 0x82
-static unsigned int reg80 = 0, reg82 = 0;
-/*
- * bit[0][1][2] use for aec control
- * bit[3] for none
- * bit[4] for SPKL pga
- * bit[5] for SPKR pga
- * bit[6] for hpl pga
- * bit[7] for hpr pga
- * bit[8] for dump dsp
- * bit[12~15] for eq function
- */
- #define VIRTUAL_REG_FOR_MISC_FUNC 0x84
-static unsigned int reg84 = 0;
-
-
-static const u16 rt5625_reg[] = {
- 0x59b4, 0x8080, 0x8080, 0x8080, /*reg00-reg06*/
- 0xc800, 0xe808, 0x1010, 0x0808, /*reg08-reg0e*/
- 0xe0ef, 0xcbcb, 0x7f7f, 0x0000, /*reg10-reg16*/
- 0xe010, 0x0000, 0x8008, 0x2007, /*reg18-reg1e*/
- 0x0000, 0x0000, 0x00c0, 0xef00, /*reg20-reg26*/
- 0x0000, 0x0000, 0x0000, 0x0000, /*reg28-reg2e*/
- 0x0000, 0x0000, 0x0000, 0x0000, /*reg30-reg36*/
- 0x0000, 0x0000, 0x0000, 0x0000, /*reg38-reg3e*/
- 0x0c0a, 0x0000, 0x0000, 0x0000, /*reg40-reg46*/
- 0x0029, 0x0000, 0xbe3e, 0x3e3e, /*reg48-reg4e*/
- 0x0000, 0x0000, 0x803a, 0x0000, /*reg50-reg56*/
- 0x0000, 0x0009, 0x0000, 0x3000, /*reg58-reg5e*/
- 0x3075, 0x1010, 0x3110, 0x0000, /*reg60-reg66*/
- 0x0553, 0x0000, 0x0000, 0x0000, /*reg68-reg6e*/
- 0x0000, 0x0000, 0x0000, 0x0000, /*reg70-reg76*/
- 0x0000, 0x0000, 0x0000, 0x0000, /*reg78-reg7e*/
+static const u16 rt5625_reg[0x80] = {
+ [RT5625_RESET] = 0x59b4,
+ [RT5625_SPK_OUT_VOL] = 0x8080,
+ [RT5625_HP_OUT_VOL] = 0x8080,
+ [RT5625_AUX_OUT_VOL] = 0x8080,
+ [RT5625_PHONEIN_VOL] = 0xc800,
+ [RT5625_LINE_IN_VOL] = 0xe808,
+ [RT5625_DAC_VOL] = 0x1010,
+ [RT5625_MIC_VOL] = 0x0808,
+ [RT5625_DAC_MIC_CTRL] = 0xee0f,
+ [RT5625_ADC_REC_GAIN] = 0xcbcb,
+ [RT5625_ADC_REC_MIXER] = 0x7f7f,
+ [RT5625_VDAC_OUT_VOL] = 0xe010,
+ [RT5625_OUTMIX_CTRL] = 0x8008,
+ [RT5625_VODSP_CTL] = 0x2007,
+ [RT5625_DMIC_CTRL] = 0x00c0,
+ [RT5625_PD_CTRL] = 0xef00,
+ [RT5625_GEN_CTRL1] = 0x0c0a,
+ [RT5625_LDO_CTRL] = 0x0029,
+ [RT5625_GPIO_CONFIG] = 0xbe3e,
+ [RT5625_GPIO_POLAR] = 0x3e3e,
+ [RT5625_GPIO_STATUS] = 0x803a,
+ [RT5625_SOFT_VOL_CTRL] = 0x0009,
+ [RT5625_DAC_CLK_CTRL1] = 0x3075,
+ [RT5625_DAC_CLK_CTRL2] = 0x1010,
+ [RT5625_VDAC_CLK_CTRL1] = 0x3110,
+ [RT5625_PS_CTRL] = 0x0553,
+ [RT5625_VENDOR_ID1] = 0x10ec,
+ [RT5625_VENDOR_ID2] = 0x5c02,
};
-
-Voice_DSP_Reg VODSP_AEC_Init_Value[]=
-{
+rt5625_dsp_reg rt5625_dsp_init[] = {
{0x232C, 0x0025},
{0x230B, 0x0001},
{0x2308, 0x007F},
{0x2304, 0x00FA},
{0x2305, 0x0500},
{0x2306, 0x4000},
- {0x230D, 0x0900},
+ {0x230D, 0x0300},
{0x230E, 0x0280},
{0x2312, 0x00B1},
{0x2314, 0xC000},
{0x2316, 0x0041},
- {0x2317, 0x2200},
- {0x2318, 0x0C00},
+ {0x2317, 0x2800},
+ {0x2318, 0x0800},
{0x231D, 0x0050},
{0x231F, 0x4000},
{0x2330, 0x0008},
{0x22D4, 0x2800},
{0x22D5, 0x3000},
{0x2399, 0x2800},
- {0x230C, 0x0000}, //to enable VODSP AEC function
+ {0x230C, 0x0000},
};
-
-
-#define SET_VODSP_REG_INIT_NUM ARRAY_SIZE(VODSP_AEC_Init_Value)
-static struct snd_soc_device *rt5625_socdev;
-
-static inline unsigned int rt5625_read_reg_cache(struct snd_soc_codec *codec,
- unsigned int reg)
-{
- u16 *cache = codec->reg_cache;
-
- if (reg > 0x7e)
+#define RT5625_DSP_INIT_NUM ARRAY_SIZE(rt5625_dsp_init)
+
+static int rt5625_volatile_register(
+ struct snd_soc_codec *codec, unsigned int reg)
+{
+ switch (reg) {
+ case RT5625_RESET:
+ case RT5625_PD_CTRL:
+ case RT5625_GPIO_STATUS:
+ case RT5625_OTC_STATUS:
+ case RT5625_PRIV_DATA:
+ case RT5625_EQ_CTRL:
+ case RT5625_DSP_DATA:
+ case RT5625_DSP_CMD:
+ case RT5625_VENDOR_ID1:
+ case RT5625_VENDOR_ID2:
+ return 1;
+ default:
return 0;
- return cache[reg / 2];
+ }
}
-
-static unsigned int rt5625_read_hw_reg(struct snd_soc_codec *codec, unsigned int reg)
-{
- u8 data[2] = {0};
- unsigned int value = 0x0;
-
- data[0] = reg;
-
- i2c_master_reg8_recv(codec->control_data,reg,data,2,100 * 1000);
-
- value = (data[0]<<8) | data[1];
-
- DBG(KERN_INFO "rt5625_read ok, reg = %x, value = %x\n", reg, value);
-
- return value;
+static int rt5625_readable_register(
+ struct snd_soc_codec *codec, unsigned int reg)
+{
+ switch (reg) {
+ case RT5625_RESET:
+ case RT5625_SPK_OUT_VOL:
+ case RT5625_HP_OUT_VOL:
+ case RT5625_AUX_OUT_VOL:
+ case RT5625_PHONEIN_VOL:
+ case RT5625_LINE_IN_VOL:
+ case RT5625_DAC_VOL:
+ case RT5625_MIC_VOL:
+ case RT5625_DAC_MIC_CTRL:
+ case RT5625_ADC_REC_GAIN:
+ case RT5625_ADC_REC_MIXER:
+ case RT5625_VDAC_OUT_VOL:
+ case RT5625_VODSP_PDM_CTL:
+ case RT5625_OUTMIX_CTRL:
+ case RT5625_VODSP_CTL:
+ case RT5625_MIC_CTRL:
+ case RT5625_DMIC_CTRL:
+ case RT5625_PD_CTRL:
+ case RT5625_F_DAC_ADC_VDAC:
+ case RT5625_SDP_CTRL:
+ case RT5625_EXT_SDP_CTRL:
+ case RT5625_PWR_ADD1:
+ case RT5625_PWR_ADD2:
+ case RT5625_PWR_ADD3:
+ case RT5625_GEN_CTRL1:
+ case RT5625_GEN_CTRL2:
+ case RT5625_PLL_CTRL:
+ case RT5625_PLL2_CTRL:
+ case RT5625_LDO_CTRL:
+ case RT5625_GPIO_CONFIG:
+ case RT5625_GPIO_POLAR:
+ case RT5625_GPIO_STICKY:
+ case RT5625_GPIO_WAKEUP:
+ case RT5625_GPIO_STATUS:
+ case RT5625_GPIO_SHARING:
+ case RT5625_OTC_STATUS:
+ case RT5625_SOFT_VOL_CTRL:
+ case RT5625_GPIO_OUT_CTRL:
+ case RT5625_MISC_CTRL:
+ case RT5625_DAC_CLK_CTRL1:
+ case RT5625_DAC_CLK_CTRL2:
+ case RT5625_VDAC_CLK_CTRL1:
+ case RT5625_PS_CTRL:
+ case RT5625_PRIV_INDEX:
+ case RT5625_PRIV_DATA:
+ case RT5625_EQ_CTRL:
+ case RT5625_DSP_ADDR:
+ case RT5625_DSP_DATA:
+ case RT5625_DSP_CMD:
+ case RT5625_VENDOR_ID1:
+ case RT5625_VENDOR_ID2:
+ return 1;
+ default:
+ return 0;
+ }
}
-
-static unsigned int rt5625_read(struct snd_soc_codec *codec, unsigned int reg)
+static unsigned int rt5625_read(struct snd_soc_codec *codec,
+ unsigned int reg)
{
- if ((reg == 0x80)
- || (reg == 0x82)
- || (reg == 0x84))
- return (reg == 0x80) ? reg80 : ((reg == 0x82) ? reg82 : reg84);
-
- return rt5625_read_hw_reg(codec, reg);
-}
+ unsigned int val;
-
-static inline void rt5625_write_reg_cache(struct snd_soc_codec *codec,
- unsigned int reg, unsigned int value)
-{
- u16 *cache = codec->reg_cache;
- if (reg > 0x7E)
- return;
- cache[reg / 2] = value;
+ val = codec->hw_read(codec, reg);
+ return val;
}
static int rt5625_write(struct snd_soc_codec *codec, unsigned int reg,
unsigned int value)
{
+ unsigned int val;
u8 data[3];
- unsigned int *regvalue = NULL;
data[0] = reg;
- data[1] = (value & 0xff00) >> 8;
- data[2] = value & 0x00ff;
+ data[1] = (value >> 8) & 0xff;
+ data[2] = value & 0xff;
- if ((reg == 0x80)
- || (reg == 0x82)
- || (reg == 0x84))
- {
- regvalue = ((reg == 0x80) ? ®80 : ((reg == 0x82) ? ®82 : ®84));
- *regvalue = value;
- DBG("rt5625_write ok, reg = %x, value = %x\n", reg, value);
- return 0;
- }
- rt5625_write_reg_cache(codec, reg, value);
-
- if (codec->hw_write(codec->control_data, data, 3) == 3)
- {
- DBG("rt5625_write ok, reg = %x, value = %x\n", reg, value);
- return 0;
- }
- else
- {
- printk("rt5625_write fail\n");
- return -EIO;
- }
+ val = codec->hw_write(codec->control_data, data, 3);
+ return val;
}
-int rt5625_write_mask(struct snd_soc_codec *codec, unsigned int reg,unsigned int value,unsigned int mask)
+static int rt5625_reset(struct snd_soc_codec *codec)
{
-
- unsigned char RetVal=0;
- unsigned int CodecData;
-
- DBG("rt5625_write_mask ok, reg = %x, value = %x ,mask= %x\n", reg, value,mask);
+ return snd_soc_write(codec, RT5625_RESET, 0);
+}
- if(!mask)
- return 0;
+/**
+ * rt5625_index_write - Write private register.
+ * @codec: SoC audio codec device.
+ * @reg: Private register index.
+ * @value: Private register Data.
+ *
+ * Modify private register for advanced setting. It can be written through
+ * private index (0x6a) and data (0x6c) register.
+ *
+ * Returns 0 for success or negative error code.
+ */
+static int rt5625_index_write(struct snd_soc_codec *codec,
+ unsigned int reg, unsigned int value)
+{
+ int ret;
- if(mask!=0xffff)
- {
- CodecData=rt5625_read(codec,reg);
- CodecData&=~mask;
- CodecData|=(value&mask);
- RetVal=rt5625_write(codec,reg,CodecData);
- }
- else
- {
- RetVal=rt5625_write(codec,reg,value);
+ ret = snd_soc_write(codec, RT5625_PRIV_INDEX, reg);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
+ goto err;
}
+ ret = snd_soc_write(codec, RT5625_PRIV_DATA, value);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to set private value: %d\n", ret);
+ goto err;
+ }
+ return 0;
- return RetVal;
+err:
+ return ret;
}
-
-void rt5625_write_index(struct snd_soc_codec *codec, unsigned int reg,
- unsigned int value)
+/**
+ * rt5625_index_read - Read private register.
+ * @codec: SoC audio codec device.
+ * @reg: Private register index.
+ *
+ * Read advanced setting from private register. It can be read through
+ * private index (0x6a) and data (0x6c) register.
+ *
+ * Returns private register value or negative error code.
+ */
+static unsigned int rt5625_index_read(
+ struct snd_soc_codec *codec, unsigned int reg)
{
-
- rt5625_write(codec,0x6a,reg);
- rt5625_write(codec,0x6c,value);
-}
+ int ret;
-unsigned int rt5625_read_index(struct snd_soc_codec *codec, unsigned int reg)
-{
- unsigned int value = 0x0;
- rt5625_write(codec,0x6a,reg);
- value=rt5625_read(codec,0x6c);
-
- return value;
+ ret = snd_soc_write(codec, RT5625_PRIV_INDEX, reg);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
+ return ret;
+ }
+ return snd_soc_read(codec, RT5625_PRIV_DATA);
}
-void rt5625_write_index_mask(struct snd_soc_codec *codec, unsigned int reg,unsigned int value,unsigned int mask)
+/**
+ * rt5625_index_update_bits - update private register bits
+ * @codec: Audio codec
+ * @reg: Private register index.
+ * @mask: Register mask
+ * @value: New value
+ *
+ * Writes new register value.
+ *
+ * Returns 1 for change, 0 for no change, or negative error code.
+ */
+static int rt5625_index_update_bits(struct snd_soc_codec *codec,
+ unsigned int reg, unsigned int mask, unsigned int value)
{
-
-// unsigned char RetVal=0;
- unsigned int CodecData;
-
- DBG("rt5625_write_index_mask ok, reg = %x, value = %x ,mask= %x\n", reg, value,mask);
+ unsigned int old, new;
+ int change, ret;
- if(!mask)
- return;
-
- if(mask!=0xffff)
- {
- CodecData=rt5625_read_index(codec,reg);
- CodecData&=~mask;
- CodecData|=(value&mask);
- rt5625_write_index(codec,reg,CodecData);
- }
- else
- {
- rt5625_write_index(codec,reg,value);
+ ret = rt5625_index_read(codec, reg);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to read private reg: %d\n", ret);
+ goto err;
}
-}
-//#define rt5625_write_mask(c, reg, value, mask) snd_soc_update_bits(c, reg, mask, value)
+ old = ret;
+ new = (old & ~mask) | (value & mask);
+ change = old != new;
+ if (change) {
+ ret = rt5625_index_write(codec, reg, new);
+ if (ret < 0) {
+ dev_err(codec->dev,
+ "Failed to write private reg: %d\n", ret);
+ goto err;
+ }
+ }
+ return change;
-#define rt5625_reset(c) rt5625_write(c, RT5625_RESET, 0)
+err:
+ return ret;
+}
-/*read/write dsp reg*/
-static int rt5625_wait_vodsp_i2c_done(struct snd_soc_codec *codec)
+/**
+ * rt5625_dsp_done - Wait until DSP is ready.
+ * @codec: SoC Audio Codec device.
+ *
+ * To check voice DSP status and confirm it's ready for next work.
+ *
+ * Returns 0 for success or negative error code.
+ */
+static int rt5625_dsp_done(struct snd_soc_codec *codec)
{
- unsigned int checkcount = 0, vodsp_data;
+ unsigned int count = 0, dsp_val;
- vodsp_data = rt5625_read(codec, RT5625_VODSP_REG_CMD);
- while(vodsp_data & VODSP_BUSY)
- {
- if(checkcount > 10)
+ dsp_val = snd_soc_read(codec, RT5625_DSP_CMD);
+ while(dsp_val & RT5625_DSP_BUSY_MASK) {
+ if(count > 10)
return -EBUSY;
- vodsp_data = rt5625_read(codec, RT5625_VODSP_REG_CMD);
- checkcount ++;
+ dsp_val = snd_soc_read(codec, RT5625_DSP_CMD);
+ count ++;
}
+
return 0;
}
-static int rt5625_write_vodsp_reg(struct snd_soc_codec *codec, unsigned int vodspreg, unsigned int value)
+/**
+ * rt5625_dsp_write - Write DSP register.
+ * @codec: SoC audio codec device.
+ * @reg: DSP register index.
+ * @value: DSP register Data.
+ *
+ * Modify voice DSP register for sound effect. The DSP can be controlled
+ * through DSP addr (0x70), data (0x72) and cmd (0x74) register. It has
+ * to wait until the DSP is ready.
+ *
+ * Returns 0 for success or negative error code.
+ */
+static int rt5625_dsp_write(struct snd_soc_codec *codec,
+ unsigned int reg, unsigned int value)
{
- int ret = 0;
-
- if(ret != rt5625_wait_vodsp_i2c_done(codec))
- return -EBUSY;
+ int ret;
- rt5625_write(codec, RT5625_VODSP_REG_ADDR, vodspreg);
- rt5625_write(codec, RT5625_VODSP_REG_DATA, value);
- rt5625_write(codec, RT5625_VODSP_REG_CMD, VODSP_WRITE_ENABLE | VODSP_CMD_MW);
+ ret = rt5625_dsp_done(codec);
+ if (ret < 0) {
+ dev_err(codec->dev, "DSP is busy: %d\n", ret);
+ goto err;
+ }
+ ret = snd_soc_write(codec, RT5625_DSP_ADDR, reg);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to write DSP addr reg: %d\n", ret);
+ goto err;
+ }
+ ret = snd_soc_write(codec, RT5625_DSP_DATA, value);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to write DSP data reg: %d\n", ret);
+ goto err;
+ }
+ ret = snd_soc_write(codec, RT5625_DSP_CMD,
+ RT5625_DSP_W_EN | RT5625_DSP_CMD_MW);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to write DSP cmd reg: %d\n", ret);
+ goto err;
+ }
mdelay(10);
- return ret;
+ return 0;
+err:
+ return ret;
}
-static unsigned int rt5625_read_vodsp_reg(struct snd_soc_codec *codec, unsigned int vodspreg)
+/**
+ * rt5625_dsp_read - Read DSP register.
+ * @codec: SoC audio codec device.
+ * @reg: DSP register index.
+ *
+ * Read DSP setting value from voice DSP. The DSP can be controlled
+ * through DSP addr (0x70), data (0x72) and cmd (0x74) register. Each
+ * command has to wait until the DSP is ready.
+ *
+ * Returns DSP register value or negative error code.
+ */
+static unsigned int rt5625_dsp_read(
+ struct snd_soc_codec *codec, unsigned int reg)
{
+ unsigned int val_h, val_l;
int ret = 0;
- unsigned int nDataH, nDataL;
- unsigned int value;
- if(ret != rt5625_wait_vodsp_i2c_done(codec))
- return -EBUSY;
-
- rt5625_write(codec, RT5625_VODSP_REG_ADDR, vodspreg);
- rt5625_write(codec, RT5625_VODSP_REG_CMD, VODSP_READ_ENABLE | VODSP_CMD_MR);
+ ret = rt5625_dsp_done(codec);
+ if (ret < 0) {
+ dev_err(codec->dev, "DSP is busy: %d\n", ret);
+ goto err;
+ }
+ ret = snd_soc_write(codec, RT5625_DSP_ADDR, reg);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to write DSP addr reg: %d\n", ret);
+ goto err;
+ }
+ ret = snd_soc_write(codec, RT5625_DSP_CMD,
+ RT5625_DSP_R_EN | RT5625_DSP_CMD_MR);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to write DSP cmd reg: %d\n", ret);
+ goto err;
+ }
+
+ /* Read DSP high byte data */
+ ret = rt5625_dsp_done(codec);
+ if (ret < 0) {
+ dev_err(codec->dev, "DSP is busy: %d\n", ret);
+ goto err;
+ }
+ ret = snd_soc_write(codec, RT5625_DSP_ADDR, 0x26);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to write DSP addr reg: %d\n", ret);
+ goto err;
+ }
+ ret = snd_soc_write(codec, RT5625_DSP_CMD,
+ RT5625_DSP_R_EN | RT5625_DSP_CMD_RR);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to write DSP cmd reg: %d\n", ret);
+ goto err;
+ }
+ ret = rt5625_dsp_done(codec);
+ if (ret < 0) {
+ dev_err(codec->dev, "DSP is busy: %d\n", ret);
+ goto err;
+ }
+ ret = snd_soc_read(codec, RT5625_DSP_DATA);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to read DSP data reg: %d\n", ret);
+ goto err;
+ }
+ val_h = ret;
- if (ret != rt5625_wait_vodsp_i2c_done(codec))
- return -EBUSY;
- rt5625_write(codec, RT5625_VODSP_REG_ADDR, 0x26);
- rt5625_write(codec, RT5625_VODSP_REG_CMD, VODSP_READ_ENABLE | VODSP_CMD_RR);
+ /* Read DSP low byte data */
+ ret = snd_soc_write(codec, RT5625_DSP_ADDR, 0x25);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to write DSP addr reg: %d\n", ret);
+ goto err;
+ }
+ ret = snd_soc_write(codec, RT5625_DSP_CMD,
+ RT5625_DSP_R_EN | RT5625_DSP_CMD_RR);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to write DSP cmd reg: %d\n", ret);
+ goto err;
+ }
+ ret = rt5625_dsp_done(codec);
+ if (ret < 0) {
+ dev_err(codec->dev, "DSP is busy: %d\n", ret);
+ goto err;
+ }
+ ret = snd_soc_read(codec, RT5625_DSP_DATA);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to read DSP data reg: %d\n", ret);
+ goto err;
+ }
+ val_l = ret;
- if(ret != rt5625_wait_vodsp_i2c_done(codec))
- return -EBUSY;
- nDataH = rt5625_read(codec, RT5625_VODSP_REG_DATA);
- rt5625_write(codec, RT5625_VODSP_REG_ADDR, 0x25);
- rt5625_write(codec, RT5625_VODSP_REG_CMD, VODSP_READ_ENABLE | VODSP_CMD_RR);
+ return ((val_h & 0xff) << 8) |(val_l & 0xff);
- if(ret != rt5625_wait_vodsp_i2c_done(codec))
- return -EBUSY;
- nDataL = rt5625_read(codec, RT5625_VODSP_REG_DATA);
- value = ((nDataH & 0xff) << 8) |(nDataL & 0xff);
- DBG("%s vodspreg=0x%x, value=0x%x\n", __func__, vodspreg, value);
- return value;
+err:
+ return ret;
}
-static int rt5625_reg_init(struct snd_soc_codec *codec)
-{
- int i;
+static const char *rt5625_spk_ctr_sel[] = {"Disable", "Enable"};
- for (i = 0; i < RT5625_INIT_REG_NUM; i++)
- rt5625_write(codec, rt5625_init_list[i].reg_index, rt5625_init_list[i].reg_value);
+/* ADCR function select */
+static const char *adcr_fun_sel[] = {
+ "Stereo ADC", "Voice ADC", "VoDSP", "PDM Slave"};
- return 0;
-}
+static const struct soc_enum adcr_fun_sel_enum =
+ SOC_ENUM_SINGLE(RT5625_F_DAC_ADC_VDAC, RT5625_ADCR_F_SFT,
+ ARRAY_SIZE(adcr_fun_sel), adcr_fun_sel);
-//*************************************************************************************************
-//*************************************************************************************************
-#if (RT5625_EQ_FUNC_ENA==1)
-//eq function
-static void rt5625_update_eqmode(struct snd_soc_codec *codec, int mode)
-{
- u16 HwEqIndex=0;
+/* ADCL function select */
+static const char *adcl_fun_sel[] = {"Stereo ADC", "VoDSP"};
- if(mode==NORMAL)
- {
- /*clear EQ parameter*/
- for(HwEqIndex=0;HwEqIndex<=0x0C;HwEqIndex++)
- {
- rt5625_write_index(codec, HwEqIndex, HwEq_Preset[mode].EqValue[HwEqIndex]);
- }
-
- rt5625_write_mask(codec, 0x6e,0x0,EN_HW_EQ_BLK | EN_HW_EQ_HPF | EN_HW_EQ_BP3 | EN_HW_EQ_BP2 | EN_HW_EQ_BP1 | EN_HW_EQ_LPF); /*disable EQ block*/
- }
- else
- {
- /*Fill EQ parameter*/
- for(HwEqIndex=0;HwEqIndex<=0x0C;HwEqIndex++)
- {
- rt5625_write_index(codec, HwEqIndex, HwEq_Preset[mode].EqValue[HwEqIndex]);
- }
+static const struct soc_enum adcl_fun_sel_enum =
+ SOC_ENUM_SINGLE(RT5625_F_DAC_ADC_VDAC, RT5625_ADCL_F_SFT,
+ ARRAY_SIZE(adcl_fun_sel), adcl_fun_sel);
- //enable EQ block
- rt5625_write_mask(codec, 0x6e,HwEq_Preset[mode].HwEQCtrl,EN_HW_EQ_BLK | EN_HW_EQ_HPF | EN_HW_EQ_BP3 | EN_HW_EQ_BP2 | EN_HW_EQ_BP1 | EN_HW_EQ_LPF);
-
- //update EQ parameter
- rt5625_write_mask(codec, 0x6e,0x0080,0x0080);
- }
-}
+/* Voice DSP */
+static const char *rt5625_aec_fun[] = {"Disable", "Enable"};
+static const SOC_ENUM_SINGLE_DECL(rt5625_aec_fun_enum, 0, 0, rt5625_aec_fun);
-static int rt5625_eq_sel_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
-{
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- u16 Virtual_reg = rt5625_read(codec, VIRTUAL_REG_FOR_MISC_FUNC);
- int rt5625_mode=((Virtual_reg)&0xf000)>>12;
-
- if ( rt5625_mode == ucontrol->value.integer.value[0])
- return 0;
+static const char *rt5625_dsp_lrck[] = {"8KHz", "16KHz"};
- rt5625_update_eqmode(codec, ucontrol->value.enumerated.item[0]);
+static const SOC_ENUM_SINGLE_DECL(rt5625_dsp_lrck_enum,
+ RT5625_VODSP_CTL, RT5625_DSP_LRCK_SFT, rt5625_dsp_lrck);
- Virtual_reg &= 0x0fff;
- Virtual_reg |= (ucontrol->value.integer.value[0])<<12;
- rt5625_write(codec, VIRTUAL_REG_FOR_MISC_FUNC, Virtual_reg);
-
- return 0;
-}
-#endif
-//*************************************************************************************************
-//*************************************************************************************************
-static const char *rt5625_aec_path_sel[] = {"aec func disable","aec func for pcm in/out",
- "aec func for iis in/out","aec func for analog in/out"}; /*0*/
-static const char *rt5625_spk_out_sel[] = {"Class AB", "Class D"}; /*1*/
-static const char *rt5625_spk_l_source_sel[] = {"LPRN", "LPRP", "LPLN", "MM"}; /*2*/
-static const char *rt5625_spkmux_source_sel[] = {"VMID", "HP Mixer",
- "SPK Mixer", "Mono Mixer"}; /*3*/
-static const char *rt5625_hplmux_source_sel[] = {"VMID","HPL Mixer"}; /*4*/
-static const char *rt5625_hprmux_source_sel[] = {"VMID","HPR Mixer"}; /*5*/
-static const char *rt5625_auxmux_source_sel[] = {"VMID", "HP Mixer",
- "SPK Mixer", "Mono Mixer"}; /*6*/
-static const char *rt5625_spkamp_ratio_sel[] = {"2.25 Vdd", "2.00 Vdd",
- "1.75 Vdd", "1.50 Vdd", "1.25 Vdd", "1.00 Vdd"}; /*7*/
-static const char *rt5625_mic1_boost_sel[] = {"Bypass", "+20db", "+30db", "+40db"}; /*8*/
-static const char *rt5625_mic2_boost_sel[] = {"Bypass", "+20db", "+30db", "+40db"}; /*9*/
-static const char *rt5625_dmic_boost_sel[] = {"Bypass", "+6db", "+12db", "+18db",
- "+24db", "+30db", "+36db", "+42db"}; /*10*/
-static const char *rt5625_adcr_func_sel[] = {"Stereo ADC", "Voice ADC",
- "VoDSP Interface", "PDM Slave Interface"}; /*11*/
-#if (RT5625_EQ_FUNC_ENA==1)
-static const char *rt5625_eq_sel[] = {"NORMAL", "CLUB","DANCE", "LIVE","POP", /*12*/
- "ROCK", "OPPO", "TREBLE", "BASS"};
-#endif
+static const char *rt5625_bp_ctrl[] = {"Bypass", "Normal"};
-static const struct soc_enum rt5625_enum[] = {
-
-SOC_ENUM_SINGLE(VIRTUAL_REG_FOR_MISC_FUNC, 0, 4, rt5625_aec_path_sel), /*0*/
-SOC_ENUM_SINGLE(RT5625_OUTPUT_MIXER_CTRL, 13, 2, rt5625_spk_out_sel), /*1*/
-SOC_ENUM_SINGLE(RT5625_OUTPUT_MIXER_CTRL, 14, 4, rt5625_spk_l_source_sel), /*2*/
-SOC_ENUM_SINGLE(RT5625_OUTPUT_MIXER_CTRL, 10, 4, rt5625_spkmux_source_sel),/*3*/
-SOC_ENUM_SINGLE(RT5625_OUTPUT_MIXER_CTRL, 9, 2, rt5625_hplmux_source_sel), /*4*/
-SOC_ENUM_SINGLE(RT5625_OUTPUT_MIXER_CTRL, 8, 2, rt5625_hprmux_source_sel),/*5*/
-SOC_ENUM_SINGLE(RT5625_OUTPUT_MIXER_CTRL, 6, 4, rt5625_auxmux_source_sel),/*6*/
-SOC_ENUM_SINGLE(RT5625_GEN_CTRL_REG1, 1, 6, rt5625_spkamp_ratio_sel), /*7*/
-SOC_ENUM_SINGLE(RT5625_MIC_CTRL, 10, 4, rt5625_mic1_boost_sel), /*8*/
-SOC_ENUM_SINGLE(RT5625_MIC_CTRL, 8, 4, rt5625_mic2_boost_sel), /*9*/
-SOC_ENUM_SINGLE(RT5625_DMIC_CTRL, 0, 8, rt5625_dmic_boost_sel), /*10*/
-SOC_ENUM_SINGLE(RT5625_DAC_ADC_VODAC_FUN_SEL, 4, 4, rt5625_adcr_func_sel), /*11*/
-#if (RT5625_EQ_FUNC_ENA==1)
-SOC_ENUM_SINGLE(VIRTUAL_REG_FOR_MISC_FUNC, 12, 9, rt5625_eq_sel), /*EQ mode select mode 12*/
-#endif
-};
+static const SOC_ENUM_SINGLE_DECL(rt5625_bp_ctrl_enum,
+ RT5625_VODSP_CTL, RT5625_DSP_BP_SFT, rt5625_bp_ctrl);
+
+static const char *rt5625_pd_ctrl[] = {"Power down", "Normal"};
+static const SOC_ENUM_SINGLE_DECL(rt5625_pd_ctrl_enum,
+ RT5625_VODSP_CTL, RT5625_DSP_PD_SFT, rt5625_pd_ctrl);
+static const char *rt5625_rst_ctrl[] = {"Reset", "Normal"};
-//*****************************************************************************
-//function:Enable the Voice PCM interface Path
-//*****************************************************************************
-static int ConfigPcmVoicePath(struct snd_soc_codec *codec,unsigned int bEnableVoicePath,unsigned int mode)
+static const SOC_ENUM_SINGLE_DECL(rt5625_rst_ctrl_enum,
+ RT5625_VODSP_CTL, RT5625_DSP_RST_SFT, rt5625_rst_ctrl);
+/* Speaker */
+static const char *rt5625_spk_out[] = {"Class AB", "Class D"};
+
+static const SOC_ENUM_SINGLE_DECL(rt5625_spk_out_enum,
+ RT5625_OUTMIX_CTRL, RT5625_SPK_T_SFT, rt5625_spk_out);
+
+static const char *rt5625_spkl_src[] = {"LPRN", "LPRP", "LPLN", "MM"};
+
+static const SOC_ENUM_SINGLE_DECL(rt5625_spkl_src_enum,
+ RT5625_OUTMIX_CTRL, RT5625_SPKN_S_SFT, rt5625_spkl_src);
+
+static const char *rt5625_spkamp_ratio[] = {"2.25 Vdd", "2.00 Vdd",
+ "1.75 Vdd", "1.50 Vdd", "1.25 Vdd", "1.00 Vdd"};
+
+static const SOC_ENUM_SINGLE_DECL(rt5625_spkamp_ratio_enum,
+ RT5625_GEN_CTRL1, RT5625_SPK_R_SFT, rt5625_spkamp_ratio);
+
+static const char *rt5625_Pin_mode[] = {"IRQ Out", "GPIO enable", "Reserved", "VoDSP bypass"};
+static const char *rt5625_Pin_configuration[] = {"Output", "Input"};
+static const char *rt5625_Pin_level[] = {"Low", "High"};
+
+/* Output/Input Mode */
+//static const char *rt5625_auxout_mode[] = {"Differential", "Single ended"};
+
+//static const SOC_ENUM_SINGLE_DECL(rt5625_auxout_mode_enum,
+// RT5625_OUTMIX_CTRL, RT5625_AUXOUT_MODE_SFT, rt5625_auxout_mode);
+
+//static const char *rt5625_input_mode[] = {"Single ended", "Differential"};
+
+//static const SOC_ENUM_SINGLE_DECL(rt5625_phone_mode_enum,
+// RT5625_PHONEIN_VOL, RT5625_PHO_DIFF_SFT, rt5625_input_mode);
+
+//static const SOC_ENUM_SINGLE_DECL(rt5625_mic1_mode_enum,
+// RT5625_MIC_VOL, RT5625_MIC1_DIFF_SFT, rt5625_input_mode);
+
+//static const SOC_ENUM_SINGLE_DECL(rt5625_mic2_mode_enum,
+// RT5625_MIC_VOL, RT5625_MIC2_DIFF_SFT, rt5625_input_mode);
+
+static const struct soc_enum rt5625_gpio2_enum[] = {
+SOC_ENUM_SINGLE(RT5625_GPIO_SHARING, 0, 4, rt5625_Pin_mode), /*0*/
+SOC_ENUM_SINGLE(RT5625_GPIO_CONFIG, 2, 2, rt5625_Pin_configuration),/*1*/
+SOC_ENUM_SINGLE(RT5625_GPIO_OUT_CTRL, 2, 2, rt5625_Pin_level), /*2*/
+};
+
+static int rt5625_adcr_fun_sel_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ unsigned int val, mask, bitmask;
- if(bEnableVoicePath)
- {
- //Power on DAC reference
- rt5625_write_mask(codec,RT5625_PWR_MANAG_ADD1,PWR_DAC_REF|PWR_VOICE_DF2SE,PWR_DAC_REF|PWR_VOICE_DF2SE);
- //Power on Voice DAC/ADC
- rt5625_write_mask(codec,RT5625_PWR_MANAG_ADD2,PWR_VOICE_CLOCK,PWR_VOICE_CLOCK);
- //routing voice to HPMixer
- rt5625_write_mask(codec,RT5625_VOICE_DAC_OUT_VOL,0,M_V_DAC_TO_HP_MIXER);
-
- switch(mode)
- {
- case PCM_SLAVE_MODE_B: //8kHz sampling rate,16 bits PCM mode and Slave mode,PCM mode is B,MCLK=24.576MHz from Oscillator.
- //CSR PSKEY_PCM_CONFIG32 (HEX) = 0x08C00000,PSKEY_FORMAT=0x0060
-
- //Enable GPIO 1,3,4,5 to voice interface
- //Set I2S to Slave mode
- //Voice I2S SYSCLK Source select Main SYSCLK
- //Set voice I2S VBCLK Polarity to Invert
- //Set Data length to 16 bit
- //set Data Fomrat to PCM mode B
- //the register 0x36 value's should is 0xC083
- rt5625_write(codec,RT5625_EXTEND_SDP_CTRL,0xC083);
-
- //Set LRCK voice select divide 32
- //set voice blck select divide 6 and 8
- //voice filter clock divide 3 and 16
- //the register 0x64 value's should is 0x5524
- rt5625_write(codec,RT5625_VOICE_DAC_PCMCLK_CTRL1,0x5524);
-
- break;
+ for (bitmask = 1; bitmask < e->max; bitmask <<= 1)
+ ;
+ if (ucontrol->value.enumerated.item[0] > e->max - 1)
+ return -EINVAL;
+ val = ucontrol->value.enumerated.item[0] << e->shift_l;
+ mask = (bitmask - 1) << e->shift_l;
+
+ snd_soc_update_bits(codec, RT5625_PD_CTRL,
+ RT5625_PWR_PR0, RT5625_PWR_PR0);
+ if ((rt5625->app_bmp & RT5625_3G_MASK) &&
+ rt5625->vodsp_fun == RT5625_AEC_EN) {
+ snd_soc_update_bits(codec, e->reg, mask, RT5625_ADCR_F_PDM);
+ } else if (rt5625->app_bmp & RT5625_VOIP_MASK &&
+ rt5625->vodsp_fun == RT5625_AEC_EN) {
+ snd_soc_update_bits(codec, e->reg, mask, RT5625_ADCR_F_PDM);
+ } else if (rt5625->app_bmp & RT5625_BT_MASK) {
+ snd_soc_update_bits(codec, e->reg, mask, RT5625_ADCR_F_VADC);
+ } else {
+ snd_soc_update_bits(codec, e->reg, mask, val);
+ }
+ snd_soc_update_bits(codec, RT5625_PD_CTRL, RT5625_PWR_PR0, 0);
- case PCM_SLAVE_MODE_A: //8kHz sampling rate,16 bits PCM and Slave mode,PCM mode is A,MCLK=24.576MHz from Oscillator.
- //CSR PSKEY_PCM_CONFIG32 (HEX) = 0x08C00004,PSKEY_FORMAT=0x0060
-
- //Enable GPIO 1,3,4,5 to voice interface
- //Set I2S to Slave mode
- //Voice I2S SYSCLK Source select Main SYSCLK
- //Set voice i2s VBCLK Polarity to Invert
- //Set Data length to 16 bit
- //set Data Fomrat to PCM mode A
- //the register 0x36 value's should is 0xC082
- rt5625_write(codec,RT5625_EXTEND_SDP_CTRL,0xC082);
-
- //Set LRCK voice select divide 64
- //set voice blck select divide 6 and 8
- //voice filter clock divide 3 and 16
- //the register 0x64 value's should is 0x5524
- rt5625_write(codec,RT5625_VOICE_DAC_PCMCLK_CTRL1,0x5524);
-
- break;
+ return 0;
+}
- case PCM_MASTER_MODE_B: //8kHz sampling rate,16 bits PCM and Master mode,PCM mode is B,Clock from PLL OUT
- //CSR PSKEY_PCM_CONFIG32 (HEX) = 0x08000002,PSKEY_FORMAT=0x0060
-
- //Enable GPIO 1,3,4,5 to voice interface
- //Set I2S to master mode
- //Set voice i2s VBCLK Polarity to Invert
- //Set Data length to 16 bit
- //set Data Fomrat to PCM mode B
- //the register 0x36 value's should is 0x8083
- rt5625_write(codec,RT5625_EXTEND_SDP_CTRL,0x8083);
-
- //Set LRCK voice select divide 64
- //set voice blck select divide 6 and 8
- //voice filter clock divide 3 and 16
- //the register 0x64 value's should is 0x5524
- rt5625_write(codec,RT5625_VOICE_DAC_PCMCLK_CTRL1,0x5524);
-
- break;
+static int rt5625_adcl_fun_sel_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ unsigned int val, mask, bitmask;
- default:
- //do nothing
- break;
+ for (bitmask = 1; bitmask < e->max; bitmask <<= 1)
+ ;
+ if (ucontrol->value.enumerated.item[0] > e->max - 1)
+ return -EINVAL;
+ val = ucontrol->value.enumerated.item[0] << e->shift_l;
+ mask = (bitmask - 1) << e->shift_l;
+
+ snd_soc_update_bits(codec, RT5625_PD_CTRL,
+ RT5625_PWR_PR0, RT5625_PWR_PR0);
+ if ((rt5625->app_bmp & RT5625_3G_MASK) &&
+ rt5625->vodsp_fun == RT5625_AEC_EN) {
+ snd_soc_update_bits(codec, e->reg, mask, RT5625_ADCL_F_DSP);
+ } else {
+ snd_soc_update_bits(codec, e->reg, mask, val);
+ }
+ snd_soc_update_bits(codec, RT5625_PD_CTRL, RT5625_PWR_PR0, 0);
- }
- }
- else
- {
- //Power down Voice Different to sing-end power
- rt5625_write_mask(codec,RT5625_PWR_MANAG_ADD1,0,PWR_VOICE_DF2SE);
- //Power down Voice DAC/ADC
- rt5625_write_mask(codec,RT5625_PWR_MANAG_ADD2,0,PWR_VOICE_CLOCK);
- //Disable Voice PCM interface
- rt5625_write_mask(codec,RT5625_EXTEND_SDP_CTRL,0,EXT_I2S_FUNC_ENABLE);
- }
-
return 0;
}
-static int init_vodsp_aec(struct snd_soc_codec *codec)
+static int rt5625_init_vodsp_aec(struct snd_soc_codec *codec)
{
- int i;
- int ret = 0;
+ int i, ret = 0;
/*disable LDO power*/
- rt5625_write_mask(codec, RT5625_LDO_CTRL,0,LDO_ENABLE);
+ snd_soc_update_bits(codec, RT5625_LDO_CTRL,
+ RT5625_LDO_MASK, RT5625_LDO_DIS);
mdelay(20);
- rt5625_write_mask(codec, RT5625_VODSP_CTL,VODSP_NO_PD_MODE_ENA,VODSP_NO_PD_MODE_ENA);
+ snd_soc_update_bits(codec, RT5625_VODSP_CTL,
+ RT5625_DSP_PD_MASK, RT5625_DSP_PD_NOR);
/*enable LDO power and set output voltage to 1.2V*/
- rt5625_write_mask(codec, RT5625_LDO_CTRL,LDO_ENABLE|LDO_OUT_VOL_CTRL_1_20V,LDO_ENABLE|LDO_OUT_VOL_CTRL_MASK);
+ snd_soc_update_bits(codec, RT5625_LDO_CTRL,
+ RT5625_LDO_MASK | RT5625_LDO_VC_MASK,
+ RT5625_LDO_EN | RT5625_LDO_VC_1_20V);
mdelay(20);
/*enable power of VODSP I2C interface*/
- rt5625_write_mask(codec, RT5625_PWR_MANAG_ADD3,PWR_VODSP_INTERFACE|PWR_I2C_FOR_VODSP,PWR_VODSP_INTERFACE|PWR_I2C_FOR_VODSP);
+ snd_soc_update_bits(codec, RT5625_PWR_ADD3, RT5625_P_DSP_IF |
+ RT5625_P_DSP_I2C, RT5625_P_DSP_IF | RT5625_P_DSP_I2C);
mdelay(1);
- rt5625_write_mask(codec, RT5625_VODSP_CTL,0,VODSP_NO_RST_MODE_ENA); /*Reset VODSP*/
+ /*Reset VODSP*/
+ snd_soc_update_bits(codec, RT5625_VODSP_CTL,
+ RT5625_DSP_RST_MASK, RT5625_DSP_RST_EN);
mdelay(1);
- rt5625_write_mask(codec, RT5625_VODSP_CTL,VODSP_NO_RST_MODE_ENA,VODSP_NO_RST_MODE_ENA); /*set VODSP to non-reset status*/
+ /*set VODSP to non-reset status*/
+ snd_soc_update_bits(codec, RT5625_VODSP_CTL,
+ RT5625_DSP_RST_MASK, RT5625_DSP_RST_NOR);
mdelay(20);
/*initize AEC paramter*/
- for(i = 0; i < SET_VODSP_REG_INIT_NUM; i++)
- {
- ret = rt5625_write_vodsp_reg(codec, VODSP_AEC_Init_Value[i].VoiceDSPIndex,VODSP_AEC_Init_Value[i].VoiceDSPValue);
+ for(i = 0; i < RT5625_DSP_INIT_NUM; i++) {
+ ret = rt5625_dsp_write(codec, rt5625_dsp_init[i].index,
+ rt5625_dsp_init[i].value);
if(ret)
return -EIO;
}
-
- schedule_timeout_uninterruptible(msecs_to_jiffies(10));
+ mdelay(10);
+ //printk("[DSP poweron] 0x%04x: 0x%04x\n", 0x230C, rt5625_dsp_read(codec, 0x230C));
return 0;
}
-//***********************************************************************************************
-//function:Enable/Disable the vodsp interface Path
-//For system clock only suport specific clock,realtek suggest customer to use 24.576Mhz or 22.5792Mhz
-//clock fro MCLK(MCLK=48k*512 or 44.1k*512Mhz)
-//***********************************************************************************************
-static int set_vodsp_aec_path(struct snd_soc_codec *codec, unsigned int mode)
+static int rt5625_aec_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
- switch(mode)
- {
-
- case PCM_IN_PCM_OUT:
- //set PCM format
- ConfigPcmVoicePath(codec,1,PCM_MASTER_MODE_B);
- //set AEC path
- rt5625_write_mask(codec, 0x26,0x0300,0x0300);
- rt5625_write_mask(codec, RT5625_VODSP_PDM_CTL,VODSP_RXDP_PWR|VODSP_RXDP_S_SEL_VOICE|VOICE_PCM_S_SEL_AEC_TXDP
- ,VODSP_RXDP_PWR|VODSP_RXDP_S_SEL_MASK|VOICE_PCM_S_SEL_MASK);
- rt5625_write_mask(codec, RT5625_DAC_ADC_VODAC_FUN_SEL,ADCR_FUNC_SEL_PDM|VODAC_SOUR_SEL_VODSP_TXDC
- ,ADCR_FUNC_SEL_MASK|VODAC_SOUR_SEL_MASK);
- rt5625_write_mask(codec, RT5625_VODSP_CTL,VODSP_LRCK_SEL_8K,VODSP_LRCK_SEL_MASK);
- rt5625_write_mask(codec, 0x26,0x0000,0x0300);
- //set input&output path and power
- rt5625_write_mask(codec, 0x3a,0x0c8f,0x0c8f);//power on related bit
- rt5625_write_mask(codec, 0x3c,0xa4cb,0xa4cb);//power on related bit
- rt5625_write_mask(codec, 0x3e,0x3302,0xf302);//power on related bit
-
- rt5625_write(codec, 0x10, 0xee0f);//mute DAC to hpmixer
- rt5625_write(codec, 0x0e, 0x8808);//set Mic1 to differential mode
- rt5625_write(codec, 0x22, 0x0000);//Mic boost 0db
- rt5625_write(codec, 0x12, 0xCBD3);//ADC_Mixer_R boost 10.5 db
- rt5625_write(codec, 0x14, 0x7f3f);//Mic1->ADCMixer_R
- rt5625_write(codec, 0x18, 0xa010);//VoDAC to speakerMixer,0db
- rt5625_write(codec, 0x1c, 0x8808);//speaker source from speakermixer
-
- rt5625_write_mask(codec, 0x02,0x0000,0x8080); //unmute speaker
+ ucontrol->value.integer.value[0] = rt5625->vodsp_fun;
+ return 0;
+}
- break;
-
-
- case ANALOG_IN_ANALOG_OUT:
- rt5625_write_mask(codec, 0x26,0x0300,0x0300);
- rt5625_write_mask(codec, RT5625_VODSP_PDM_CTL,VODSP_RXDP_PWR|VODSP_RXDP_S_SEL_ADCL|VOICE_PCM_S_SEL_AEC_TXDP
- ,VODSP_RXDP_PWR|VODSP_RXDP_S_SEL_MASK|VOICE_PCM_S_SEL_MASK);
- rt5625_write_mask(codec, RT5625_DAC_ADC_VODAC_FUN_SEL,ADCR_FUNC_SEL_PDM|VODAC_SOUR_SEL_VODSP_TXDC|DAC_FUNC_SEL_VODSP_TXDP|ADCL_FUNC_SEL_VODSP
- ,ADCR_FUNC_SEL_MASK|VODAC_SOUR_SEL_MASK|DAC_FUNC_SEL_MASK|ADCL_FUNC_SEL_MASK);
- rt5625_write_mask(codec, RT5625_VODSP_CTL,VODSP_LRCK_SEL_16K,VODSP_LRCK_SEL_MASK);
- rt5625_write_mask(codec, 0x26,0x0000,0x0300);
- //set input&output path and power
- rt5625_write_mask(codec, 0x3a,0xcc8f,0xcc8f);//power on related bit
- rt5625_write_mask(codec, 0x3c,0xa7cf,0xa7cf);//power on related bit
- rt5625_write_mask(codec, 0x3e,0xf312,0xf312);//power on related bit
-
- rt5625_write(codec, 0x0e, 0x8808);//set Mic1 to differential mode
- rt5625_write(codec, 0x08, 0xe800);//set phone in to differential mode
- rt5625_write(codec, 0x22, 0x0000);//Mic boost 0db
- rt5625_write(codec, 0x14, 0x773f);//Mic1->ADCMixer_R,phone in-->ADCMixer_L
- rt5625_write(codec, 0x12, 0xCBD3);//ADC_Mixer_R boost 10.5 db
- rt5625_write(codec, 0x1c, 0x88c8);//speaker from spkmixer,monoOut from monoMixer
- rt5625_write(codec, 0x18, 0xA010);//unmute VoDAC to spkmixer
- rt5625_write(codec, 0x10, 0xee0e);//unmute DAC to monoMixer
- rt5625_write(codec, 0x62, 0x2222);
- rt5625_write(codec, 0x64, 0x3122);
- rt5625_write_mask(codec, 0x02,0x0000,0x8080); //unmute speaker
- rt5625_write_mask(codec, 0x06,0x0000,0x8080); //unmute auxout
- break;
- case DAC_IN_ADC_OUT:
- rt5625_write_mask(codec, 0x26,0x0300,0x0300);
- rt5625_write_mask(codec,RT5625_DAC_ADC_VODAC_FUN_SEL,ADCR_FUNC_SEL_PDM|DAC_FUNC_SEL_VODSP_TXDC
- ,ADCR_FUNC_SEL_MASK|DAC_FUNC_SEL_MASK);
- rt5625_write_mask(codec,RT5625_VODSP_PDM_CTL,VODSP_SRC1_PWR|VODSP_SRC2_PWR|VODSP_RXDP_PWR|VODSP_RXDP_S_SEL_SRC1|REC_S_SEL_SRC2,
- VODSP_SRC1_PWR|VODSP_SRC2_PWR|VODSP_RXDP_PWR|VODSP_RXDP_S_SEL_MASK|REC_S_SEL_MASK);
- rt5625_write_mask(codec,RT5625_VODSP_CTL,VODSP_LRCK_SEL_16K,VODSP_LRCK_SEL_MASK);
- rt5625_write_mask(codec, 0x26,0x0000,0x0300);
- //set input&output path and power
- rt5625_write_mask(codec, 0x3a,0xcc0f,0xcc0f);//power on related bit
- rt5625_write_mask(codec, 0x3c,0xa7cb,0xa7cb);//power on related bit
- rt5625_write_mask(codec, 0x3e,0x3302,0x3302);//power on related bit
-
- rt5625_write(codec, 0x0e, 0x8808);//set Mic1 to differential mode
- rt5625_write(codec, 0x22, 0x0000);//Mic boost 0db
- rt5625_write(codec, 0x14, 0x7f3f);//Mic1->ADCMixer_R
- rt5625_write(codec, 0x12, 0xCBD3);//ADC_Mixer_R boost 10.5 db
- rt5625_write(codec, 0x1c, 0x8808);//speaker out from spkMixer
- rt5625_write(codec, 0x10, 0xee0d);//unmute DAC to spkMixer
- rt5625_write(codec, 0x60, 0x3075);
- rt5625_write(codec, 0x62, 0x1010);
- rt5625_write_mask(codec, 0x02,0x0000,0x8080); //unmute speaker
+static int rt5625_aec_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
- break;
+ if(ucontrol->value.integer.value[0] == rt5625->vodsp_fun)
+ return 0;
+ rt5625->vodsp_fun = ucontrol->value.integer.value[0];
- case VODSP_AEC_DISABLE:
- default:
- rt5625_write_mask(codec, 0x02,0x8080,0x8080);//mute speaker out
- rt5625_write_mask(codec, 0x06,0x8080,0x8080);//mute auxout
- rt5625_write(codec, 0x22, 0x0500);//Mic boost 20db by default
- rt5625_write(codec, 0x14, 0x3f3f);//record from Mic1 by default
- rt5625_write(codec, 0x12, 0xD5D5);//ADC_Mixer_R boost 15 db by default
- rt5625_write(codec, 0x1c, 0x0748);//all output from HPmixer by default
- rt5625_write(codec, 0x10, 0xee03);//DAC to HPmixer by default
- rt5625_write(codec, 0x18, 0xe010);//mute VoDAC to mixer by default
- rt5625_write_mask(codec, 0x26,0x0300,0x0300);
- /*set stereo DAC&Voice DAC&Stereo ADC function select to default*/
- rt5625_write(codec, RT5625_DAC_ADC_VODAC_FUN_SEL,0);
- /*set VODSP&PDM Control to default*/
- rt5625_write(codec, RT5625_VODSP_PDM_CTL,0);
- rt5625_write_mask(codec, 0x26,0x0000,0x0300);
- rt5625_write_mask(codec, 0x3e,0x0000,0xf312);//power down related bit
- rt5625_write_mask(codec, 0x3a,0x0000,0xcc8d);//power down related bit
- rt5625_write_mask(codec, 0x3c,0x0000,0x07cf);//power down related bit
-
-
- break;
- }
+ switch(rt5625->vodsp_fun) {
+ case RT5625_AEC_EN:
+ break;
+ case RT5625_AEC_DIS:
+ if (!(rt5625->app_bmp & RT5625_3G_MASK) ||
+ ((rt5625->app_bmp & RT5625_3G_MASK) && rt5625->headset)) {
+ snd_soc_update_bits(codec, RT5625_VODSP_CTL,
+ RT5625_DSP_PD_MASK, RT5625_DSP_PD_EN);
+ snd_soc_update_bits(codec, RT5625_PWR_ADD3,
+ RT5625_P_DSP_IF | RT5625_P_DSP_I2C, 0);
+ snd_soc_update_bits(codec, RT5625_LDO_CTRL,
+ RT5625_LDO_MASK, RT5625_LDO_DIS);
+ }
+ break;
+ default:
+ break;
+ }
return 0;
}
-static int enable_vodsp_aec(struct snd_soc_codec *codec, unsigned int VodspAEC_En, unsigned int AEC_mode)
+#ifdef RT5625_F_SMT_PHO
+static int rt5625_app_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
{
- int ret = 0;
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
-
- if (VodspAEC_En != 0)
- {
+ pr_info("App status: %x\n", rt5625->app_bmp);
- //enable power of VODSP I2C interface & VODSP interface
- rt5625_write_mask(codec, RT5625_PWR_MANAG_ADD3,PWR_VODSP_INTERFACE|PWR_I2C_FOR_VODSP,PWR_VODSP_INTERFACE|PWR_I2C_FOR_VODSP);
- //enable power of VODSP I2S interface
- rt5625_write_mask(codec, RT5625_PWR_MANAG_ADD1,PWR_I2S_INTERFACE,PWR_I2S_INTERFACE);
- //select input/output of VODSP AEC
- set_vodsp_aec_path(codec, AEC_mode);
+ return 0;
+}
+static int rt5625_cap_voip_chk_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ int i, upd;
+
+ /* VoIP start up if record & playback all turn on, or AEC *
+ * is disabled. otherwise, cheat dapm. */
+ if ((rt5625->app_bmp & RT5625_REC_MASK) == 0 ||
+ (rt5625->app_bmp & RT5625_PLY_MASK) == 0) {
+ /* backup registers for voip routing */
+ for(i = 0; i < RT5625_VOIP_BK_NUM; i++)
+ rt5625_voip_back[i][1] =
+ snd_soc_read(codec, rt5625_voip_back[i][0]);
+ /* cheat dapm */
+ snd_soc_update_bits(codec, RT5625_VODSP_PDM_CTL,
+ RT5625_REC_IIS_S_MASK, RT5625_REC_IIS_S_SRC2);
+ return 0;
}
- else
- {
- //disable VODSP AEC path
- set_vodsp_aec_path(codec, VODSP_AEC_DISABLE);
- //set VODSP AEC to power down mode
- rt5625_write_mask(codec, RT5625_VODSP_CTL,0,VODSP_NO_PD_MODE_ENA);
- //disable power of VODSP I2C interface & VODSP interface
- rt5625_write_mask(codec, RT5625_PWR_MANAG_ADD3,0,PWR_VODSP_INTERFACE|PWR_I2C_FOR_VODSP);
+
+ if (rt5625->headset) {
+ /* backup registers for voip routing */
+ for(i = 0; i < RT5625_VOIP_BK_NUM; i++)
+ rt5625_voip_back[i][1] =
+ snd_soc_read(codec, rt5625_voip_back[i][0]);
+ /* cheat dapm */
+ snd_soc_update_bits(codec, RT5625_VODSP_PDM_CTL,
+ RT5625_REC_IIS_S_MASK, RT5625_REC_IIS_S_SRC2);
+ } else
+ rt5625->vodsp_fun = RT5625_AEC_EN;
+
+ upd = (rt5625->app_bmp & ~RT5625_VOIP_MASK) |
+ (ucontrol->value.integer.value[0] << RT5625_VOIP_BIT);
+ if (rt5625->app_bmp != upd) {
+ rt5625->app_bmp = upd;
+ rt5625->app_bmp &= ~(RT5625_3G_MASK | RT5625_BT_MASK);
}
- return ret;
+ return 0;
}
-static void rt5625_aec_config(struct snd_soc_codec *codec, unsigned int mode)
+static int rt5625_cap_voip_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
{
- DBG("rt5625_aec_config %d\n",mode);
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ int i;
- if (mode == VODSP_AEC_DISABLE)
- {
- enable_vodsp_aec(codec,0, mode);
- /*disable LDO power*/
- rt5625_write_mask(codec, RT5625_LDO_CTRL,0,LDO_ENABLE);
- }
- else
- {
- init_vodsp_aec(codec);
-
- enable_vodsp_aec(codec,1, mode);
+ if (rt5625->app_bmp & RT5625_VOIP_MASK) {
+ if (rt5625->headset) {
+ snd_soc_update_bits(codec, RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_L_MIC1 | RT5625_M_RM_R_MIC1 | RT5625_M_RM_L_PHO,
+ RT5625_M_RM_L_MIC1 | RT5625_M_RM_R_MIC1 | RT5625_M_RM_L_PHO);
+ /* recover all changes by voip */
+ for(i = 0; i < RT5625_VOIP_BK_NUM; i++)
+ snd_soc_write(codec, rt5625_voip_back[i][0],
+ rt5625_voip_back[i][1]);
+ snd_soc_update_bits(codec, RT5625_VODSP_PDM_CTL,
+ RT5625_SRC1_PWR | RT5625_SRC2_PWR, 0);
+ } else {
+ snd_soc_update_bits(codec, RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_L_MIC1 | RT5625_M_RM_L_MIC2 | RT5625_M_RM_R_MIC2 | RT5625_M_RM_L_PHO,
+ RT5625_M_RM_L_MIC1 | RT5625_M_RM_L_MIC2 | RT5625_M_RM_R_MIC2 | RT5625_M_RM_L_PHO);
+ rt5625->vodsp_fun = RT5625_AEC_EN;
+ /* Mic1 & Mic2 boost 0db */
+ snd_soc_update_bits(codec, RT5625_MIC_CTRL,
+ RT5625_MIC1_BST_MASK | RT5625_MIC2_BST_MASK,
+ RT5625_MIC1_BST_BYPASS | RT5625_MIC2_BST_BYPASS);
+ /* Capture volume gain 9db */
+ snd_soc_update_bits(codec, RT5625_ADC_REC_GAIN,
+ RT5625_G_ADCL_MASK | RT5625_G_ADCR_MASK, (0x11 << 8 ) | 0x11);
+ }
+ } else {
+ /* recover all changes by voip */
+ for(i = 0; i < RT5625_VOIP_BK_NUM; i++)
+ snd_soc_write(codec, rt5625_voip_back[i][0],
+ rt5625_voip_back[i][1]);
+ snd_soc_update_bits(codec, RT5625_VODSP_PDM_CTL,
+ RT5625_SRC1_PWR | RT5625_SRC2_PWR, 0);
+ if (rt5625->app_bmp & RT5625_3G_MASK &&
+ rt5625->vodsp_fun == RT5625_AEC_EN) {
+ /* Mic1 boost 0db */
+ snd_soc_update_bits(codec, RT5625_MIC_CTRL,
+ RT5625_MIC1_BST_MASK, RT5625_MIC1_BST_BYPASS);
+ /* Capture volume gain 9db */
+ snd_soc_update_bits(codec, RT5625_ADC_REC_GAIN,
+ RT5625_G_ADCR_MASK, 0x11);
+ }
}
+
+ return 0;
}
-//****************************************************************************************************************
-//*
-//*function:disable rt5625's function.
-//*
-//*
-//****************************************************************************************************************
-static int rt5625_func_aec_disable(struct snd_soc_codec *codec,int mode)
-{
- switch(mode)
- {
- case RT5625_AEC_PCM_IN_OUT:
- case RT5625_AEC_IIS_IN_OUT:
- case RT5625_AEC_ANALOG_IN_OUT:
-
- rt5625_aec_config(codec,VODSP_AEC_DISABLE); //disable AEC function and path
-
- break;
-
- default:
+static int rt5625_hs_voip_chk_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ int i, upd;
+
+ rt5625->headset = true;
+ if ((rt5625->app_bmp & RT5625_REC_MASK) == 0 ||
+ (rt5625->app_bmp & RT5625_PLY_MASK) == 0) {
+ /* backup registers for voip routing */
+ for(i = 0; i < RT5625_VOIP_BK_NUM; i++)
+ rt5625_voip_back[i][1] =
+ snd_soc_read(codec, rt5625_voip_back[i][0]);
+ rt5625->vodsp_fun_bak = rt5625->vodsp_fun;
+ /* cheat dapm */
+ snd_soc_update_bits(codec, RT5625_VODSP_PDM_CTL,
+ RT5625_REC_IIS_S_MASK | RT5625_RXDP_PWR, RT5625_REC_IIS_S_ADC);
+ return 0;
+ }
- break;
+ upd = (rt5625->app_bmp & ~RT5625_VOIP_MASK) |
+ (ucontrol->value.integer.value[0] << RT5625_VOIP_BIT);
+ if (rt5625->app_bmp != upd) {
+ rt5625->app_bmp = upd;
+ rt5625->app_bmp &= ~(RT5625_3G_MASK | RT5625_BT_MASK);
}
return 0;
}
-
-static int rt5625_get_dsp_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
+static int rt5625_hs_voip_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- /*cause we choose bit[0][1] to store the mode type*/
- int mode = (rt5625_read(codec, VIRTUAL_REG_FOR_MISC_FUNC)) & 0x03;
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ int i;
+
+ if (rt5625->app_bmp & RT5625_VOIP_MASK) {
+ snd_soc_update_bits(codec, RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_R_MIC1 | RT5625_M_RM_L_PHO,
+ RT5625_M_RM_R_MIC1 | RT5625_M_RM_L_PHO);
+ /* Mic1 & Mic2 boost 0db */
+ snd_soc_update_bits(codec, RT5625_MIC_CTRL,
+ RT5625_MIC1_BST_MASK | RT5625_MIC2_BST_MASK,
+ RT5625_MIC1_BST_BYPASS | RT5625_MIC2_BST_BYPASS);
+ /* Capture volume gain 9db */
+ snd_soc_update_bits(codec, RT5625_ADC_REC_GAIN,
+ RT5625_G_ADCL_MASK | RT5625_G_ADCR_MASK, (0x11 << 8 ) | 0x11);
+ } else {
+ /* recover all changes by voip */
+ for(i = 0; i < RT5625_VOIP_BK_NUM; i++)
+ snd_soc_write(codec, rt5625_voip_back[i][0],
+ rt5625_voip_back[i][1]);
+ rt5625->vodsp_fun = rt5625->vodsp_fun_bak;
+ if ((rt5625->app_bmp & RT5625_3G_MASK) && rt5625->vodsp_fun == RT5625_AEC_EN) {
+ snd_soc_update_bits(codec, RT5625_F_DAC_ADC_VDAC,
+ RT5625_ADCR_F_MASK, RT5625_ADCR_F_PDM);
+ } else if (rt5625->app_bmp & RT5625_BT_MASK) {
+ snd_soc_update_bits(codec, RT5625_F_DAC_ADC_VDAC,
+ RT5625_ADCR_F_MASK, RT5625_ADCR_F_VADC);
+ } else {
+ snd_soc_update_bits(codec, RT5625_F_DAC_ADC_VDAC,
+ RT5625_ADCR_F_MASK, RT5625_ADCR_F_ADC);
+ }
+ }
- ucontrol->value.integer.value[0] = mode;
return 0;
}
-
-static int rt5625_set_dsp_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
+static int rt5625_voip_chk_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- u16 Virtual_reg = rt5625_read(codec, VIRTUAL_REG_FOR_MISC_FUNC);
- int rt5625_mode=(Virtual_reg)&0x03;
-
- DBG("rt5625_mode=%d,value[0]=%ld,Virtual_reg=%x\n",rt5625_mode,ucontrol->value.integer.value[0],Virtual_reg);
-
- if ( rt5625_mode == ucontrol->value.integer.value[0])
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ int i, upd;
+
+ rt5625->headset = false;
+ /* voip start-up if record is on-going; otherwise, cheat dapm */
+ if ((rt5625->app_bmp & RT5625_REC_MASK) == 0 ||
+ (rt5625->app_bmp & RT5625_PLY_MASK) == 0) {
+ /* backup registers for voip routing */
+ for(i = 0; i < RT5625_VOIP_BK_NUM; i++)
+ rt5625_voip_back[i][1] =
+ snd_soc_read(codec, rt5625_voip_back[i][0]);
+ rt5625->vodsp_fun_bak = rt5625->vodsp_fun;
+ /* cheat dapm */
+ snd_soc_update_bits(codec, RT5625_VODSP_PDM_CTL,
+ RT5625_RXDP_S_MASK | RT5625_REC_IIS_S_MASK | RT5625_RXDP_PWR,
+ RT5625_RXDP_S_SRC1 | RT5625_REC_IIS_S_SRC2);
return 0;
+ }
- switch(ucontrol->value.integer.value[0])
- {
- case RT5625_AEC_PCM_IN_OUT:
-
- rt5625_aec_config(codec,PCM_IN_PCM_OUT);//enable AEC PCM in/out function and path
+ upd = (rt5625->app_bmp & ~RT5625_VOIP_MASK) |
+ (ucontrol->value.integer.value[0] << RT5625_VOIP_BIT);
+ if (rt5625->app_bmp != upd) {
+ rt5625->app_bmp = upd;
+ rt5625->app_bmp &= ~(RT5625_3G_MASK | RT5625_BT_MASK);
+ }
- break;
+ return 0;
+}
- case RT5625_AEC_IIS_IN_OUT:
+static int rt5625_voip_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ int i;
- rt5625_aec_config(codec,DAC_IN_ADC_OUT);//enable AEC IIS in/out function and path
+ if (rt5625->app_bmp & RT5625_VOIP_MASK) {
+ snd_soc_update_bits(codec, RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_R_MIC2 | RT5625_M_RM_L_PHO,
+ RT5625_M_RM_R_MIC2 | RT5625_M_RM_L_PHO);
+ /* Mic1 & Mic2 boost 0db */
+ snd_soc_update_bits(codec, RT5625_MIC_CTRL,
+ RT5625_MIC1_BST_MASK | RT5625_MIC2_BST_MASK,
+ RT5625_MIC1_BST_BYPASS | RT5625_MIC2_BST_BYPASS);
+ /* Capture volume gain 9db */
+ snd_soc_update_bits(codec, RT5625_ADC_REC_GAIN,
+ RT5625_G_ADCL_MASK | RT5625_G_ADCR_MASK, (0x11 << 8 ) | 0x11);
+ } else {
+ /* recover all changes by voip */
+ for(i = 0; i < RT5625_VOIP_BK_NUM; i++)
+ snd_soc_write(codec, rt5625_voip_back[i][0],
+ rt5625_voip_back[i][1]);
+ rt5625->vodsp_fun = rt5625->vodsp_fun_bak;
+ snd_soc_update_bits(codec, RT5625_VODSP_PDM_CTL,
+ RT5625_SRC1_PWR | RT5625_SRC2_PWR, 0);
+ if ((rt5625->app_bmp & RT5625_3G_MASK) && rt5625->vodsp_fun == RT5625_AEC_EN) {
+ snd_soc_update_bits(codec, RT5625_F_DAC_ADC_VDAC,
+ RT5625_ADCR_F_MASK, RT5625_ADCR_F_PDM);
+ } else if (rt5625->app_bmp & RT5625_BT_MASK) {
+ snd_soc_update_bits(codec, RT5625_F_DAC_ADC_VDAC,
+ RT5625_ADCR_F_MASK, RT5625_ADCR_F_VADC);
+ } else {
+ snd_soc_update_bits(codec, RT5625_F_DAC_ADC_VDAC,
+ RT5625_ADCR_F_MASK, RT5625_ADCR_F_ADC);
+ }
+ }
- break;
+ return 0;
+}
- case RT5625_AEC_ANALOG_IN_OUT:
-
- rt5625_aec_config(codec,ANALOG_IN_ANALOG_OUT);//enable AEC analog in/out function and path
-
- break;
+static int rt5625_voip_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
- case RT5625_AEC_DISABLE:
-
- rt5625_func_aec_disable(codec,rt5625_mode); //disable previous select function.
-
- break;
+ ucontrol->value.integer.value[0] =
+ (rt5625->app_bmp & RT5625_VOIP_MASK) >> RT5625_VOIP_BIT;
- default:
+ return 0;
+}
- break;
- }
+static int rt5625_play_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
- Virtual_reg &= 0xfffc;
- Virtual_reg |= (ucontrol->value.integer.value[0]);
- rt5625_write(codec, VIRTUAL_REG_FOR_MISC_FUNC, Virtual_reg);
+ ucontrol->value.integer.value[0] =
+ (rt5625->app_bmp & RT5625_PLY_MASK) >> RT5625_PLY_BIT;
- DBG("2rt5625_mode=%d,value[0]=%ld,Virtual_reg=%x\n",rt5625_mode,ucontrol->value.integer.value[0],Virtual_reg);
return 0;
}
-static int rt5625_dump_dsp_reg(struct snd_soc_codec *codec)
+static int rt5625_play_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
{
- int i;
-
- rt5625_write_mask(codec, RT5625_VODSP_CTL, VODSP_NO_PD_MODE_ENA,VODSP_NO_PD_MODE_ENA);
- for (i = 0; i < SET_VODSP_REG_INIT_NUM; i++) {
- rt5625_read_vodsp_reg(codec, VODSP_AEC_Init_Value[i].VoiceDSPIndex);
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ int upd;
+
+ upd = (rt5625->app_bmp & ~RT5625_PLY_MASK) |
+ (ucontrol->value.integer.value[0] << RT5625_PLY_BIT);
+ if (rt5625->app_bmp != upd)
+ rt5625->app_bmp = upd;
+
+ if (!(rt5625->app_bmp & RT5625_3G_MASK) ||
+ ((rt5625->app_bmp & RT5625_3G_MASK) && rt5625->headset)) {
+ snd_soc_update_bits(codec, RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_L_PHO, RT5625_M_RM_L_PHO);
}
+
return 0;
}
-
-static int rt5625_dump_dsp_put(struct snd_kcontrol *kcontrol,
+static int rt5625_rec_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- int mode = rt5625_read(codec, VIRTUAL_REG_FOR_MISC_FUNC);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+
+ ucontrol->value.integer.value[0] =
+ (rt5625->app_bmp & RT5625_REC_MASK) >> RT5625_REC_BIT;
- mode &= ~(0x01 << 8);
- mode |= (ucontrol->value.integer.value[0] << 8);
- rt5625_write(codec, VIRTUAL_REG_FOR_MISC_FUNC, mode);
- rt5625_dump_dsp_reg(codec);
-
return 0;
}
-static const struct snd_kcontrol_new rt5625_snd_controls[] = {
-SOC_ENUM_EXT("rt5625 aec mode sel", rt5625_enum[0], rt5625_get_dsp_mode, rt5625_set_dsp_mode),
-SOC_ENUM("SPK Amp Type", rt5625_enum[1]),
-SOC_ENUM("Left SPK Source", rt5625_enum[2]),
-SOC_ENUM("SPK Amp Ratio", rt5625_enum[7]),
-SOC_ENUM("Mic1 Boost", rt5625_enum[8]),
-SOC_ENUM("Mic2 Boost", rt5625_enum[9]),
-SOC_ENUM("Dmic Boost", rt5625_enum[10]),
-SOC_ENUM("ADCR Func", rt5625_enum[11]),
-SOC_DOUBLE("PCM Playback Volume", RT5625_STEREO_DAC_VOL, 8, 0, 63, 1),
-SOC_DOUBLE("LineIn Playback Volume", RT5625_LINE_IN_VOL, 8, 0, 31, 1),
-SOC_SINGLE("Phone Playback Volume", RT5625_PHONEIN_VOL, 8, 31, 1),
-SOC_SINGLE("Mic1 Playback Volume", RT5625_MIC_VOL, 8, 31, 1),
-SOC_SINGLE("Mic2 Playback Volume", RT5625_MIC_VOL, 0, 31, 1),
-SOC_DOUBLE("PCM Capture Volume", RT5625_ADC_REC_GAIN, 8, 0, 31, 1),
-SOC_DOUBLE("SPKOUT Playback Volume", RT5625_SPK_OUT_VOL, 8, 0, 31, 1),
-SOC_DOUBLE("SPKOUT Playback Switch", RT5625_SPK_OUT_VOL, 15, 7, 1, 1),
-SOC_DOUBLE("HPOUT Playback Volume", RT5625_HP_OUT_VOL, 8, 0, 31, 1),
-SOC_DOUBLE("HPOUT Playback Switch", RT5625_HP_OUT_VOL, 15, 7, 1, 1),
-SOC_DOUBLE("AUXOUT Playback Volume", RT5625_AUX_OUT_VOL, 8, 0, 31, 1),
-SOC_DOUBLE("AUXOUT Playback Switch", RT5625_AUX_OUT_VOL, 15, 7, 1, 1),
-SOC_DOUBLE("ADC Record Gain", RT5625_ADC_REC_GAIN, 8, 0, 31, 0),
-SOC_SINGLE_EXT("VoDSP Dump", VIRTUAL_REG_FOR_MISC_FUNC, 8, 1, 0,
- snd_soc_get_volsw, rt5625_dump_dsp_put),
-#if (RT5625_EQ_FUNC_ENA==1)
-SOC_ENUM_EXT("EQ Mode", rt5625_enum[12], snd_soc_get_enum_double, rt5625_eq_sel_put),
-#endif
-};
-
-static int rt5625_add_controls(struct snd_soc_codec *codec)
+static int rt5625_rec_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(rt5625_snd_controls); i++){
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&rt5625_snd_controls[i],
- codec, NULL));
- if (err < 0)
- return err;
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ int upd;
+
+ upd = (rt5625->app_bmp & ~RT5625_REC_MASK) |
+ (ucontrol->value.integer.value[0] << RT5625_REC_BIT);
+ if (rt5625->app_bmp != upd)
+ rt5625->app_bmp = upd;
+
+ if (!(rt5625->app_bmp & RT5625_3G_MASK) ||
+ ((rt5625->app_bmp & RT5625_3G_MASK) && rt5625->headset)) {
+ snd_soc_update_bits(codec, RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_L_PHO, RT5625_M_RM_L_PHO);
}
+
+
return 0;
}
-static void hp_depop_mode2(struct snd_soc_codec *codec)
+static int rt5625_bt_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
{
- rt5625_write_mask(codec, RT5625_PWR_MANAG_ADD1, PWR_SOFTGEN_EN, PWR_SOFTGEN_EN);
- rt5625_write_mask(codec, RT5625_PWR_MANAG_ADD3, PWR_HP_R_OUT_VOL|PWR_HP_L_OUT_VOL,
- PWR_HP_R_OUT_VOL|PWR_HP_L_OUT_VOL);
- rt5625_write(codec, RT5625_MISC_CTRL,HP_DEPOP_MODE2_EN);
-
- DBG("delay 500 msec\n");
-
- schedule_timeout_uninterruptible(msecs_to_jiffies(500));
-
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
- rt5625_write_mask(codec, RT5625_PWR_MANAG_ADD1, PWR_HP_OUT_AMP|PWR_HP_OUT_ENH_AMP,
- PWR_HP_OUT_AMP|PWR_HP_OUT_ENH_AMP);
- //rt5625_write_mask(codec, RT5625_MISC_CTRL, 0, HP_DEPOP_MODE2_EN);
+ ucontrol->value.integer.value[0] =
+ (rt5625->app_bmp & RT5625_BT_MASK) >> RT5625_BT_BIT;
+ return 0;
}
-//enable depop function for mute/unmute
-static void hp_mute_unmute_depop(struct snd_soc_codec *codec,int mute)
+static int rt5625_bt_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
{
- if(mute)
- {
- rt5625_write_mask(codec, RT5625_PWR_MANAG_ADD1, PWR_SOFTGEN_EN, PWR_SOFTGEN_EN);
- rt5625_write(codec, RT5625_MISC_CTRL,M_UM_DEPOP_EN|HP_R_M_UM_DEPOP_EN|HP_L_M_UM_DEPOP_EN);
- //Mute headphone right/left channel
- rt5625_write_mask(codec,RT5625_HP_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE);
- mdelay(50);
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ int upd;
+
+ if (!(rt5625->app_bmp & RT5625_REC_MASK)) {
+ snd_soc_update_bits(codec, RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_L_MIC1 | RT5625_M_RM_L_MIC2 |
+ RT5625_M_RM_R_MIC1 | RT5625_M_RM_R_MIC2,
+ RT5625_M_RM_L_MIC1 | RT5625_M_RM_L_MIC2 |
+ RT5625_M_RM_R_MIC1 | RT5625_M_RM_R_MIC2);
}
- else
- {
- rt5625_write_mask(codec, RT5625_PWR_MANAG_ADD1, PWR_SOFTGEN_EN, PWR_SOFTGEN_EN);
- rt5625_write(codec, RT5625_MISC_CTRL, M_UM_DEPOP_EN|HP_R_M_UM_DEPOP_EN|HP_L_M_UM_DEPOP_EN);
- //unMute headphone right/left channel
- rt5625_write_mask(codec,RT5625_HP_OUT_VOL,0,RT_L_MUTE|RT_R_MUTE);
- mdelay(50);
+
+ upd = (rt5625->app_bmp & ~RT5625_BT_MASK) |
+ (ucontrol->value.integer.value[0] << RT5625_BT_BIT);
+ if (rt5625->app_bmp != upd) {
+ rt5625->app_bmp = upd;
+ rt5625->app_bmp &= ~(RT5625_3G_MASK | RT5625_VOIP_MASK);
}
+ return 0;
}
+static int rt5625_3g_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+
+ ucontrol->value.integer.value[0] =
+ (rt5625->app_bmp & RT5625_3G_MASK) >> RT5625_3G_BIT;
-/*
- * _DAPM_ Controls
- */
- /*Left ADC Rec mixer*/
- /*Left ADC Rec mixer*/
-static const struct snd_kcontrol_new rt5625_left_adc_rec_mixer_controls[] = {
-SOC_DAPM_SINGLE("Mic1 Capture Switch", RT5625_ADC_REC_MIXER, 14, 1, 1),
-SOC_DAPM_SINGLE("Mic2 Capture Switch", RT5625_ADC_REC_MIXER, 13, 1, 1),
-SOC_DAPM_SINGLE("LineIn Capture Switch", RT5625_ADC_REC_MIXER, 12, 1, 1),
-SOC_DAPM_SINGLE("Phone Capture Switch", RT5625_ADC_REC_MIXER, 11, 1, 1),
-SOC_DAPM_SINGLE("HP Mixer Capture Switch", RT5625_ADC_REC_MIXER, 10, 1, 1),
-SOC_DAPM_SINGLE("SPK Mixer Capture Switch", RT5625_ADC_REC_MIXER, 9, 1, 1),
-SOC_DAPM_SINGLE("MoNo Mixer Capture Switch", RT5625_ADC_REC_MIXER, 8, 1, 1),
+ return 0;
+}
-};
+static int rt5625_3g_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ int upd;
+
+ rt5625->headset = false;
+ if (!(rt5625->app_bmp & RT5625_REC_MASK)) {
+ snd_soc_update_bits(codec, RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_L_MIC1 | RT5625_M_RM_L_MIC2 | RT5625_M_RM_R_MIC2,
+ RT5625_M_RM_L_MIC1 | RT5625_M_RM_L_MIC2 | RT5625_M_RM_R_MIC2);
+ }
-/*Left ADC Rec mixer*/
-static const struct snd_kcontrol_new rt5625_right_adc_rec_mixer_controls[] = {
-SOC_DAPM_SINGLE("Mic1 Capture Switch", RT5625_ADC_REC_MIXER, 6, 1, 1),
-SOC_DAPM_SINGLE("Mic2 Capture Switch", RT5625_ADC_REC_MIXER, 5, 1, 1),
-SOC_DAPM_SINGLE("LineIn Capture Switch", RT5625_ADC_REC_MIXER, 4, 1, 1),
-SOC_DAPM_SINGLE("Phone Capture Switch", RT5625_ADC_REC_MIXER, 3, 1, 1),
-SOC_DAPM_SINGLE("HP Mixer Capture Switch", RT5625_ADC_REC_MIXER, 2, 1, 1),
-SOC_DAPM_SINGLE("SPK Mixer Capture Switch", RT5625_ADC_REC_MIXER, 1, 1, 1),
-SOC_DAPM_SINGLE("MoNo Mixer Capture Switch", RT5625_ADC_REC_MIXER, 0, 1, 1),
-};
+ upd = (rt5625->app_bmp & ~RT5625_3G_MASK) |
+ (ucontrol->value.integer.value[0] << RT5625_3G_BIT);
+ if (rt5625->app_bmp != upd) {
+ rt5625->app_bmp = upd;
+ rt5625->app_bmp &= ~(RT5625_BT_MASK | RT5625_VOIP_MASK);
+ }
-/*Left hpmixer mixer*/
-static const struct snd_kcontrol_new rt5625_left_hp_mixer_controls[] = {
-SOC_DAPM_SINGLE("ADC Playback Switch", RT5625_ADC_REC_GAIN, 15, 1, 1),
-SOC_DAPM_SINGLE("LineIn Playback Switch", HPL_MIXER, 0, 1, 0),
-SOC_DAPM_SINGLE("Phone Playback Switch", HPL_MIXER, 1, 1, 0),
-SOC_DAPM_SINGLE("Mic1 Playback Switch", HPL_MIXER, 2, 1, 0),
-SOC_DAPM_SINGLE("Mic2 Playback Switch", HPL_MIXER, 3, 1, 0),
-SOC_DAPM_SINGLE("Voice DAC Playback Switch", HPL_MIXER, 4, 1, 0),
-SOC_DAPM_SINGLE("HIFI DAC Playback Switch", RT5625_DAC_AND_MIC_CTRL, 3, 1, 1),
+ return 0;
+}
-};
+static int rt5625_hs_3g_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ int upd;
+
+ rt5625->headset = true;
+ if (!(rt5625->app_bmp & RT5625_REC_MASK)) {
+ snd_soc_update_bits(codec, RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_L_MIC1 | RT5625_M_RM_L_MIC2 |
+ RT5625_M_RM_R_MIC1 | RT5625_M_RM_R_MIC2,
+ RT5625_M_RM_L_MIC1 | RT5625_M_RM_L_MIC2 |
+ RT5625_M_RM_R_MIC1 | RT5625_M_RM_R_MIC2);
+ }
+ upd = (rt5625->app_bmp & ~RT5625_3G_MASK) |
+ (ucontrol->value.integer.value[0] << RT5625_3G_BIT);
+ if (rt5625->app_bmp != upd) {
+ rt5625->app_bmp = upd;
+ rt5625->app_bmp &= ~(RT5625_BT_MASK | RT5625_VOIP_MASK);
+ }
-/*Right hpmixer mixer*/
-static const struct snd_kcontrol_new rt5625_right_hp_mixer_controls[] = {
-SOC_DAPM_SINGLE("ADC Playback Switch", RT5625_ADC_REC_GAIN, 7, 1, 1),
-SOC_DAPM_SINGLE("LineIn Playback Switch", HPR_MIXER, 0, 1, 0),
-SOC_DAPM_SINGLE("Phone Playback Switch", HPR_MIXER, 1, 1, 0),
-SOC_DAPM_SINGLE("Mic1 Playback Switch", HPR_MIXER, 2, 1, 0),
-SOC_DAPM_SINGLE("Mic2 Playback Switch", HPR_MIXER, 3, 1, 0),
-SOC_DAPM_SINGLE("Voice DAC Playback Switch", HPR_MIXER, 4, 1, 0),
-SOC_DAPM_SINGLE("HIFI DAC Playback Switch", RT5625_DAC_AND_MIC_CTRL, 2, 1, 1),
+ return 0;
+}
-};
+static int rt5625_dump_dsp_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ int i;
+ u16 val;
-/*mono mixer*/
-static const struct snd_kcontrol_new rt5625_mono_mixer_controls[] = {
-SOC_DAPM_SINGLE("ADCL Playback Switch", RT5625_ADC_REC_GAIN, 14, 1, 1),
-SOC_DAPM_SINGLE("ADCR Playback Switch", RT5625_ADC_REC_GAIN, 6, 1, 1),
-SOC_DAPM_SINGLE("Line Mixer Playback Switch", RT5625_LINE_IN_VOL, 13, 1, 1),
-SOC_DAPM_SINGLE("Mic1 Playback Switch", RT5625_DAC_AND_MIC_CTRL, 13, 1, 1),
-SOC_DAPM_SINGLE("Mic2 Playback Switch", RT5625_DAC_AND_MIC_CTRL, 9, 1, 1),
-SOC_DAPM_SINGLE("DAC Mixer Playback Switch", RT5625_DAC_AND_MIC_CTRL, 0, 1, 1),
-SOC_DAPM_SINGLE("Voice DAC Playback Switch", RT5625_VOICE_DAC_OUT_VOL, 13, 1, 1),
-};
+ pr_info("\n[ RT5625 DSP Register ]\n");
+ for (i = 0; i < RT5625_DSP_INIT_NUM; i++) {
+ val = rt5625_dsp_read(codec, rt5625_dsp_init[i].index);
+ if (val) pr_info(" 0x%x: 0x%x\n",
+ rt5625_dsp_init[i].index, val);
+ }
+ return 0;
+}
-/*speaker mixer*/
-static const struct snd_kcontrol_new rt5625_spk_mixer_controls[] = {
-SOC_DAPM_SINGLE("Line Mixer Playback Switch", RT5625_LINE_IN_VOL, 14, 1, 1),
-SOC_DAPM_SINGLE("Phone Playback Switch", RT5625_PHONEIN_VOL, 14, 1, 1),
-SOC_DAPM_SINGLE("Mic1 Playback Switch", RT5625_DAC_AND_MIC_CTRL, 14, 1, 1),
-SOC_DAPM_SINGLE("Mic2 Playback Switch", RT5625_DAC_AND_MIC_CTRL, 10, 1, 1),
-SOC_DAPM_SINGLE("DAC Mixer Playback Switch", RT5625_DAC_AND_MIC_CTRL, 1, 1, 1),
-SOC_DAPM_SINGLE("Voice DAC Playback Switch", RT5625_VOICE_DAC_OUT_VOL, 14, 1, 1),
-};
+static int rt5625_dac_active_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
-static int mixer_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event)
+ ucontrol->value.integer.value[0] = rt5625->dac_active;
+ return 0;
+}
+
+static int rt5625_dac_active_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_codec *codec = w->codec;
- unsigned int l, r;
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct snd_soc_dapm_context *dapm = &codec->dapm;
+ struct snd_soc_dapm_widget *w;
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
- DBG("enter %s\n", __func__);
+ if(ucontrol->value.integer.value[0] == rt5625->dac_active)
+ return 0;
+ rt5625->dac_active = ucontrol->value.integer.value[0];
- l= rt5625_read(codec, HPL_MIXER);
- r = rt5625_read(codec, HPR_MIXER);
-
- if ((l & 0x1) || (r & 0x1))
- rt5625_write_mask(codec, 0x0a, 0x0000, 0x8000);
- else
- rt5625_write_mask(codec, 0x0a, 0x8000, 0x8000);
+ /* playback is on-going; do nothing when turn off BT */
+ if (rt5625->dac_active == 0 && rt5625->app_bmp & RT5625_PLY_MASK)
+ return 0;
- if ((l & 0x2) || (r & 0x2))
- rt5625_write_mask(codec, 0x08, 0x0000, 0x8000);
- else
- rt5625_write_mask(codec, 0x08, 0x8000, 0x8000);
+ list_for_each_entry(w, &dapm->card->widgets, list)
+ {
+ if (!w->sname || w->dapm != dapm)
+ continue;
+ if (strstr(w->sname, "Playback")) {
+ pr_info("widget %s %s %s\n", w->name, w->sname,
+ rt5625->dac_active ? "active" : "inactive");
+ w->active = rt5625->dac_active;
+ }
+ }
- if ((l & 0x4) || (r & 0x4))
- rt5625_write_mask(codec, 0x10, 0x0000, 0x8000);
- else
- rt5625_write_mask(codec, 0x10, 0x8000, 0x8000);
+ if (!(rt5625->dac_active))
+ snd_soc_dapm_sync(dapm);
- if ((l & 0x8) || (r & 0x8))
- rt5625_write_mask(codec, 0x10, 0x0000, 0x0800);
- else
- rt5625_write_mask(codec, 0x10, 0x0800, 0x0800);
+ return 0;
+}
- if ((l & 0x10) || (r & 0x10))
- rt5625_write_mask(codec, 0x18, 0x0000, 0x8000);
- else
- rt5625_write_mask(codec, 0x18, 0x8000, 0x8000);
+static int rt5625_adc_active_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ ucontrol->value.integer.value[0] = rt5625->adc_active;
return 0;
}
+static int rt5625_adc_active_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct snd_soc_dapm_context *dapm = &codec->dapm;
+ struct snd_soc_dapm_widget *w;
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
-/*
- * bit[0][1] use for aec control
- * bit[2][3] for ADCR func
- * bit[4] for SPKL pga
- * bit[5] for SPKR pga
- * bit[6] for hpl pga
- * bit[7] for hpr pga
- */
-static int spk_pga_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event)
- {
- struct snd_soc_codec *codec = w->codec;
- int reg;
-
- DBG("enter %s\n", __func__);
- reg = rt5625_read(codec, VIRTUAL_REG_FOR_MISC_FUNC) & (0x3 << 4);
- if ((reg >> 4) != 0x3 && reg != 0)
+ if(ucontrol->value.integer.value[0] == rt5625->adc_active)
return 0;
+ rt5625->adc_active = ucontrol->value.integer.value[0];
- switch (event)
+ /* record is on-going; do nothing when turn off BT */
+ if (rt5625->adc_active == 0 && rt5625->app_bmp & RT5625_REC_MASK)
+ return 0;
+
+ list_for_each_entry(w, &dapm->card->widgets, list)
{
- case SND_SOC_DAPM_POST_PMU:
- DBG("after virtual spk power up!\n");
- rt5625_write_mask(codec, 0x3e, 0x3000, 0x3000);
- rt5625_write_mask(codec, 0x02, 0x0000, 0x8080);
- rt5625_write_mask(codec, 0x3a, 0x0400, 0x0400);//power on spk amp
- break;
- case SND_SOC_DAPM_POST_PMD:
- DBG("aftet virtual spk power down!\n");
- rt5625_write_mask(codec, 0x3a, 0x0000, 0x0400);//power off spk amp
- rt5625_write_mask(codec, 0x02, 0x8080, 0x8080);
- rt5625_write_mask(codec, 0x3e, 0x0000, 0x3000);
- break;
- default:
- return 0;
+ if (!w->sname || w->dapm != dapm)
+ continue;
+ if (strstr(w->sname, "Capture")) {
+ pr_info("widget %s %s %s\n", w->name, w->sname,
+ rt5625->adc_active ? "active" : "inactive");
+ w->active = rt5625->adc_active;
+ }
}
+
+ if (!(rt5625->adc_active))
+ snd_soc_dapm_sync(dapm);
+
return 0;
}
+static int rt5625_pll_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ ucontrol->value.integer.value[0] = rt5625->pll_sel;
+ return 0;
+}
-static int hp_pga_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event)
-{
- struct snd_soc_codec *codec = w->codec;
- int reg;
-
- DBG("enter %s\n", __func__);
+static int rt5625_pll_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
- reg = rt5625_read(codec, VIRTUAL_REG_FOR_MISC_FUNC) & (0x3 << 6);
- if ((reg >> 6) != 0x3 && reg != 0)
+ if(ucontrol->value.integer.value[0] == rt5625->pll_sel)
return 0;
-
- switch (event)
- {
- case SND_SOC_DAPM_POST_PMD:
+ rt5625->pll_sel = ucontrol->value.integer.value[0];
+
+ switch(rt5625->pll_sel) {
+ case RT5625_PLL_DIS:
+ pr_info("%s(): Disable\n", __func__);
+ snd_soc_update_bits(codec, RT5625_GEN_CTRL1,
+ RT5625_SCLK_PLL1, 0);
+ snd_soc_write(codec, RT5625_DAC_CLK_CTRL2, 0);
+ break;
- DBG("aftet virtual hp power down!\n");
+ case RT5625_PLL_112896_225792:
+ pr_info("%s(): 11.2896>22.5792\n", __func__);
+ snd_soc_write(codec, RT5625_GEN_CTRL2, 0x0000);
+ snd_soc_write(codec, RT5625_PLL_CTRL, 0x06a0);
+ snd_soc_update_bits(codec, RT5625_GEN_CTRL1,
+ RT5625_SCLK_PLL1, RT5625_SCLK_PLL1);
+ snd_soc_write(codec, RT5625_DAC_CLK_CTRL2, 0x0210);
+ break;
- hp_mute_unmute_depop(codec,1);//mute hp
- rt5625_write_mask(codec, 0x3a, 0x0000, 0x0300);
- rt5625_write_mask(codec, 0x3e, 0x0000, 0x0c00);
- break;
+ case RT5625_PLL_112896_24576:
+ pr_info("%s(): 11.2896->24.576\n", __func__);
+ snd_soc_write(codec, RT5625_GEN_CTRL2, 0x0000);
+ snd_soc_write(codec, RT5625_PLL_CTRL, 0x922f);
+ snd_soc_update_bits(codec, RT5625_GEN_CTRL1,
+ RT5625_SCLK_PLL1, RT5625_SCLK_PLL1);
+ snd_soc_write(codec, RT5625_DAC_CLK_CTRL2, 0x0210);
+ break;
- case SND_SOC_DAPM_POST_PMU:
+ default:
+ break;
+ }
- DBG("after virtual hp power up!\n");
- hp_depop_mode2(codec);
- hp_mute_unmute_depop(codec,0);//unmute hp
- break;
+ return 0;
+}
- default:
- return 0;
- }
+static int rt5625_pll2_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ ucontrol->value.integer.value[0] = rt5625->pll2_sel;
return 0;
}
+static int rt5625_pll2_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ if(ucontrol->value.integer.value[0] == rt5625->pll2_sel)
+ return 0;
+ rt5625->pll2_sel = ucontrol->value.integer.value[0];
+
+ if(rt5625->pll2_sel != RT5625_PLL_DIS) {
+ snd_soc_update_bits(codec, RT5625_GEN_CTRL1,
+ RT5625_VSCLK_MASK, RT5625_VSCLK_PLL2);
+ snd_soc_write(codec, RT5625_PLL2_CTRL, RT5625_PLL2_EN);
+ snd_soc_write(codec, RT5625_VDAC_CLK_CTRL1,
+ RT5625_VBCLK_DIV1_4);
+ snd_soc_update_bits(codec, RT5625_EXT_SDP_CTRL,
+ RT5625_PCM_CS_MASK, RT5625_PCM_CS_VSCLK);
+ }
-static int aux_pga_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event)
-{
return 0;
}
-/*SPKOUT Mux*/
-static const struct snd_kcontrol_new rt5625_spkout_mux_out_controls =
-SOC_DAPM_ENUM("Route", rt5625_enum[3]);
+static const char *rt5625_pll_sel[] = {"Disable", "11.2896->22.5792", "11.2896->24.576"};
-/*HPLOUT MUX*/
-static const struct snd_kcontrol_new rt5625_hplout_mux_out_controls =
-SOC_DAPM_ENUM("Route", rt5625_enum[4]);
+static const SOC_ENUM_SINGLE_DECL(rt5625_pll_sel_enum, 0, 0, rt5625_pll_sel);
-/*HPROUT MUX*/
-static const struct snd_kcontrol_new rt5625_hprout_mux_out_controls =
-SOC_DAPM_ENUM("Route", rt5625_enum[5]);
-/*AUXOUT MUX*/
-static const struct snd_kcontrol_new rt5625_auxout_mux_out_controls =
-SOC_DAPM_ENUM("Route", rt5625_enum[6]);
+static const char *rt5625_pll2_sel[] = {"Disable", "Enable"};
-static const struct snd_soc_dapm_widget rt5625_dapm_widgets[] = {
-SND_SOC_DAPM_INPUT("Left LineIn"),
-SND_SOC_DAPM_INPUT("Right LineIn"),
-SND_SOC_DAPM_INPUT("Phone"),
-SND_SOC_DAPM_INPUT("Mic1"),
-SND_SOC_DAPM_INPUT("Mic2"),
-
-SND_SOC_DAPM_PGA("Mic1 Boost", RT5625_PWR_MANAG_ADD3, 1, 0, NULL, 0),
-SND_SOC_DAPM_PGA("Mic2 Boost", RT5625_PWR_MANAG_ADD3, 0, 0, NULL, 0),
-
-SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback DAC", RT5625_PWR_MANAG_ADD2, 9, 0),
-SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback DAC", RT5625_PWR_MANAG_ADD2, 8, 0),
-SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback DAC", RT5625_PWR_MANAG_ADD2, 10, 0),
-
-SND_SOC_DAPM_PGA("Left LineIn PGA", RT5625_PWR_MANAG_ADD3, 7, 0, NULL, 0),
-SND_SOC_DAPM_PGA("Right LineIn PGA", RT5625_PWR_MANAG_ADD3, 6, 0, NULL, 0),
-SND_SOC_DAPM_PGA("Phone PGA", RT5625_PWR_MANAG_ADD3, 5, 0, NULL, 0),
-SND_SOC_DAPM_PGA("Mic1 PGA", RT5625_PWR_MANAG_ADD3, 3, 0, NULL, 0),
-SND_SOC_DAPM_PGA("Mic2 PGA", RT5625_PWR_MANAG_ADD3, 2, 0, NULL, 0),
-SND_SOC_DAPM_PGA("VoDAC PGA", RT5625_PWR_MANAG_ADD1, 7, 0, NULL, 0),
-SND_SOC_DAPM_MIXER("Left Rec Mixer", RT5625_PWR_MANAG_ADD2, 1, 0,
- &rt5625_left_adc_rec_mixer_controls[0], ARRAY_SIZE(rt5625_left_adc_rec_mixer_controls)),
-SND_SOC_DAPM_MIXER("Right Rec Mixer", RT5625_PWR_MANAG_ADD2, 0, 0,
- &rt5625_right_adc_rec_mixer_controls[0], ARRAY_SIZE(rt5625_right_adc_rec_mixer_controls)),
-SND_SOC_DAPM_MIXER_E("Left HP Mixer", RT5625_PWR_MANAG_ADD2, 5, 0,
- &rt5625_left_hp_mixer_controls[0], ARRAY_SIZE(rt5625_left_hp_mixer_controls),
- mixer_event, SND_SOC_DAPM_POST_REG),
-SND_SOC_DAPM_MIXER_E("Right HP Mixer", RT5625_PWR_MANAG_ADD2, 4, 0,
- &rt5625_right_hp_mixer_controls[0], ARRAY_SIZE(rt5625_right_hp_mixer_controls),
- mixer_event, SND_SOC_DAPM_POST_REG),
-SND_SOC_DAPM_MIXER("MoNo Mixer", RT5625_PWR_MANAG_ADD2, 2, 0,
- &rt5625_mono_mixer_controls[0], ARRAY_SIZE(rt5625_mono_mixer_controls)),
-SND_SOC_DAPM_MIXER("SPK Mixer", RT5625_PWR_MANAG_ADD2, 3, 0,
- &rt5625_spk_mixer_controls[0], ARRAY_SIZE(rt5625_spk_mixer_controls)),
-SND_SOC_DAPM_MIXER("HP Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
-SND_SOC_DAPM_MIXER("DAC Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
-SND_SOC_DAPM_MIXER("Line Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
-
-SND_SOC_DAPM_MUX("SPKOUT Mux", SND_SOC_NOPM, 0, 0, &rt5625_spkout_mux_out_controls),
-SND_SOC_DAPM_MUX("HPLOUT Mux", SND_SOC_NOPM, 0, 0, &rt5625_hplout_mux_out_controls),
-SND_SOC_DAPM_MUX("HPROUT Mux", SND_SOC_NOPM, 0, 0, &rt5625_hprout_mux_out_controls),
-SND_SOC_DAPM_MUX("AUXOUT Mux", SND_SOC_NOPM, 0, 0, &rt5625_auxout_mux_out_controls),
-
-SND_SOC_DAPM_PGA_E("SPKL Out PGA", VIRTUAL_REG_FOR_MISC_FUNC, 4, 0, NULL, 0,
- spk_pga_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
-SND_SOC_DAPM_PGA_E("SPKR Out PGA", VIRTUAL_REG_FOR_MISC_FUNC, 5, 0, NULL, 0,
- spk_pga_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
-SND_SOC_DAPM_PGA_E("HPL Out PGA",VIRTUAL_REG_FOR_MISC_FUNC, 6, 0, NULL, 0,
- hp_pga_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
-SND_SOC_DAPM_PGA_E("HPR Out PGA",VIRTUAL_REG_FOR_MISC_FUNC, 7, 0, NULL, 0,
- hp_pga_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
-SND_SOC_DAPM_PGA_E("AUX Out PGA",RT5625_PWR_MANAG_ADD3, 14, 0, NULL, 0,
- aux_pga_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
-
-SND_SOC_DAPM_ADC("Left ADC", "Left ADC HiFi Capture", RT5625_PWR_MANAG_ADD2, 7, 0),
-SND_SOC_DAPM_ADC("Right ADC", "Right ADC HiFi Capture", RT5625_PWR_MANAG_ADD2, 6, 0),
-SND_SOC_DAPM_OUTPUT("SPKL"),
-SND_SOC_DAPM_OUTPUT("SPKR"),
-SND_SOC_DAPM_OUTPUT("HPL"),
-SND_SOC_DAPM_OUTPUT("HPR"),
-SND_SOC_DAPM_OUTPUT("AUX"),
-SND_SOC_DAPM_MICBIAS("Mic1 Bias", RT5625_PWR_MANAG_ADD1, 3, 0),
-SND_SOC_DAPM_MICBIAS("Mic2 Bias", RT5625_PWR_MANAG_ADD1, 2, 0),
+static const SOC_ENUM_SINGLE_DECL(rt5625_pll2_sel_enum, 0, 0, rt5625_pll2_sel);
+#endif
+
+static const char *rt5625_AUXOUT_mode[] = {"Differential mode", "Single-ended mode"};
+static const char *rt5625_Differential_Input_Control[] = {"Disable", "Enable"};
+
+static const struct soc_enum rt5625_differential_enum[] = {
+SOC_ENUM_SINGLE(RT5625_OUTMIX_CTRL, 4, 2, rt5625_AUXOUT_mode), /*0*/
+SOC_ENUM_SINGLE(RT5625_PHONEIN_VOL, 13, 2, rt5625_Differential_Input_Control),/*1*/
+SOC_ENUM_SINGLE(RT5625_MIC_VOL, 15, 2, rt5625_Differential_Input_Control), /*2*/
+SOC_ENUM_SINGLE(RT5625_MIC_VOL, 7, 2, rt5625_Differential_Input_Control), /*3*/
};
-static const struct snd_soc_dapm_route audio_map[] = {
- /*Input PGA*/
-
- {"Left LineIn PGA", NULL, "Left LineIn"},
- {"Right LineIn PGA", NULL, "Right LineIn"},
- {"Phone PGA", NULL, "Phone"},
- {"Mic1 Boost", NULL, "Mic1"},
- {"Mic2 Boost", NULL, "Mic2"},
- {"Mic1 PGA", NULL, "Mic1"},
- {"Mic2 PGA", NULL, "Mic2"},
- {"VoDAC PGA", NULL, "Voice DAC"},
-
- /*Left ADC mixer*/
- {"Left Rec Mixer", "LineIn Capture Switch", "Left LineIn"},
- {"Left Rec Mixer", "Phone Capture Switch", "Phone"},
- {"Left Rec Mixer", "Mic1 Capture Switch", "Mic1 Boost"},
- {"Left Rec Mixer", "Mic2 Capture Switch", "Mic2 Boost"},
- {"Left Rec Mixer", "HP Mixer Capture Switch", "Left HP Mixer"},
- {"Left Rec Mixer", "SPK Mixer Capture Switch", "SPK Mixer"},
- {"Left Rec Mixer", "MoNo Mixer Capture Switch", "MoNo Mixer"},
-
- /*Right ADC Mixer*/
- {"Right Rec Mixer", "LineIn Capture Switch", "Right LineIn"},
- {"Right Rec Mixer", "Phone Capture Switch", "Phone"},
- {"Right Rec Mixer", "Mic1 Capture Switch", "Mic1 Boost"},
- {"Right Rec Mixer", "Mic2 Capture Switch", "Mic2 Boost"},
- {"Right Rec Mixer", "HP Mixer Capture Switch", "Right HP Mixer"},
- {"Right Rec Mixer", "SPK Mixer Capture Switch", "SPK Mixer"},
- {"Right Rec Mixer", "MoNo Mixer Capture Switch", "MoNo Mixer"},
-
- /*HPL mixer*/
- {"Left HP Mixer", "ADC Playback Switch", "Left Rec Mixer"},
- {"Left HP Mixer", "LineIn Playback Switch", "Left LineIn PGA"},
- {"Left HP Mixer", "Phone Playback Switch", "Phone PGA"},
- {"Left HP Mixer", "Mic1 Playback Switch", "Mic1 PGA"},
- {"Left HP Mixer", "Mic2 Playback Switch", "Mic2 PGA"},
- {"Left HP Mixer", "HIFI DAC Playback Switch", "Left DAC"},
- {"Left HP Mixer", "Voice DAC Playback Switch", "VoDAC PGA"},
-
- /*HPR mixer*/
- {"Right HP Mixer", "ADC Playback Switch", "Right Rec Mixer"},
- {"Right HP Mixer", "LineIn Playback Switch", "Right LineIn PGA"},
- {"Right HP Mixer", "HIFI DAC Playback Switch", "Right DAC"},
- {"Right HP Mixer", "Phone Playback Switch", "Phone PGA"},
- {"Right HP Mixer", "Mic1 Playback Switch", "Mic1 PGA"},
- {"Right HP Mixer", "Mic2 Playback Switch", "Mic2 PGA"},
- {"Right HP Mixer", "Voice DAC Playback Switch", "VoDAC PGA"},
-
- /*DAC Mixer*/
- {"DAC Mixer", NULL, "Left DAC"},
- {"DAC Mixer", NULL, "Right DAC"},
-
- /*line mixer*/
- {"Line Mixer", NULL, "Left LineIn PGA"},
- {"Line Mixer", NULL, "Right LineIn PGA"},
-
- /*spk mixer*/
- {"SPK Mixer", "Line Mixer Playback Switch", "Line Mixer"},
- {"SPK Mixer", "Phone Playback Switch", "Phone PGA"},
- {"SPK Mixer", "Mic1 Playback Switch", "Mic1 PGA"},
- {"SPK Mixer", "Mic2 Playback Switch", "Mic2 PGA"},
- {"SPK Mixer", "DAC Mixer Playback Switch", "DAC Mixer"},
- {"SPK Mixer", "Voice DAC Playback Switch", "VoDAC PGA"},
-
- /*mono mixer*/
- {"MoNo Mixer", "Line Mixer Playback Switch", "Line Mixer"},
- {"MoNo Mixer", "ADCL Playback Switch","Left Rec Mixer"},
- {"MoNo Mixer", "ADCR Playback Switch","Right Rec Mixer"},
- {"MoNo Mixer", "Mic1 Playback Switch", "Mic1 PGA"},
- {"MoNo Mixer", "Mic2 Playback Switch", "Mic2 PGA"},
- {"MoNo Mixer", "DAC Mixer Playback Switch", "DAC Mixer"},
- {"MoNo Mixer", "Voice DAC Playback Switch", "VoDAC PGA"},
-
- /*hp mixer*/
- {"HP Mixer", NULL, "Left HP Mixer"},
- {"HP Mixer", NULL, "Right HP Mixer"},
-
- /*spkout mux*/
- {"SPKOUT Mux", "HP Mixer", "HP Mixer"},
- {"SPKOUT Mux", "SPK Mixer", "SPK Mixer"},
- {"SPKOUT Mux", "Mono Mixer", "MoNo Mixer"},
-
- /*hpl out mux*/
- {"HPLOUT Mux", "HPL Mixer", "Left HP Mixer"},
-
- /*hpr out mux*/
- {"HPROUT Mux", "HPR Mixer", "Right HP Mixer"},
+static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
+static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -3525, 75, 0);
+static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
+static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1650, 150, 0);
+static const DECLARE_TLV_DB_SCALE(dmic_bst_tlv, 0, 600, 0);
+/* {0, +20, +30, +40} dB */
+static unsigned int mic_bst_tlv[] = {
+ TLV_DB_RANGE_HEAD(2),
+ 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
+ 1, 3, TLV_DB_SCALE_ITEM(2000, 1000, 0),
+};
- /*aux out mux*/
- {"AUXOUT Mux", "HP Mixer", "HP Mixer"},
- {"AUXOUT Mux", "SPK Mixer", "SPK Mixer"},
- {"AUXOUT Mux", "Mono Mixer", "MoNo Mixer"},
+#ifdef RT5625_REG_RW
+#define REGVAL_MAX 0xffff
+static unsigned int regctl_addr = 0x3e;
+static int rt5625_regctl_info(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_info *uinfo)
+{
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
+ uinfo->count = 2;
+ uinfo->value.integer.min = 0;
+ uinfo->value.integer.max = REGVAL_MAX;
+ return 0;
+}
- /*spkl out pga*/
- {"SPKL Out PGA", NULL, "SPKOUT Mux"},
+static int rt5625_regctl_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ ucontrol->value.integer.value[0] = regctl_addr;
+ ucontrol->value.integer.value[1] = snd_soc_read(codec, regctl_addr);
+ return 0;
+}
- /*spkr out pga*/
- {"SPKR Out PGA", NULL, "SPKOUT Mux"},
-
- /*hpl out pga*/
- {"HPL Out PGA", NULL, "HPLOUT Mux"},
+static int rt5625_regctl_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ regctl_addr = ucontrol->value.integer.value[0];
+ if(ucontrol->value.integer.value[1] <= REGVAL_MAX)
+ snd_soc_write(codec, regctl_addr, ucontrol->value.integer.value[1]);
+ return 0;
+}
+#endif
- /*hpr out pga*/
- {"HPR Out PGA", NULL, "HPROUT Mux"},
+/*speaker ext control*/
+static const struct soc_enum spk_ctr_enum =
+ SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(rt5625_spk_ctr_sel), rt5625_spk_ctr_sel);
- /*aux out pga*/
- {"AUX Out PGA", NULL, "AUXOUT Mux"},
-
- /*left adc*/
- {"Left ADC", NULL, "Left Rec Mixer"},
-
- /*right adc*/
- {"Right ADC", NULL, "Right Rec Mixer"},
-
- /*output*/
- {"SPKL", NULL, "SPKL Out PGA"},
- {"SPKR", NULL, "SPKR Out PGA"},
- {"HPL", NULL, "HPL Out PGA"},
- {"HPR", NULL, "HPR Out PGA"},
- {"AUX", NULL, "AUX Out PGA"},
-};
+static int rt5625_spk_ctr_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ ucontrol->value.integer.value[0] = rt5625->spk_ctr_status;
+ return 0;
+}
-static int rt5625_add_widgets(struct snd_soc_codec *codec)
+static int rt5625_spk_ctr_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
{
- snd_soc_dapm_new_controls(codec, rt5625_dapm_widgets,
- ARRAY_SIZE(rt5625_dapm_widgets));
- snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
- snd_soc_dapm_new_widgets(codec);
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+
+ rt5625->spk_ctr_status = ucontrol->value.integer.value[0];
+ if(rt5625->spk_ctr_pin != INVALID_GPIO)
+ {
+ if(rt5625->spk_ctr_status)
+ gpio_set_value(rt5625->spk_ctr_pin,rt5625->spk_ctr_on);
+ else
+ gpio_set_value(rt5625->spk_ctr_pin,rt5625->spk_ctr_off);
+ }
return 0;
}
-struct _pll_div{
- u32 pll_in;
- u32 pll_out;
- u16 regvalue;
+static const struct snd_kcontrol_new rt5625_snd_controls[] = {
+
+ #if defined (CONFIG_SND_SOC_RT5625_SPK_FORM_SPKOUT)
+ SOC_DOUBLE_TLV("SPKOUT Playback Volume", RT5625_SPK_OUT_VOL,
+ RT5625_L_VOL_SFT, RT5625_R_VOL_SFT, 31, 1, out_vol_tlv),
+ SOC_DOUBLE("SPKOUT Playback Switch", RT5625_SPK_OUT_VOL,
+ RT5625_L_MUTE_SFT, RT5625_R_MUTE_SFT, 1, 1),
+ SOC_DOUBLE_TLV("Earpiece Playback Volume", RT5625_SPK_OUT_VOL,
+ RT5625_L_VOL_SFT, RT5625_R_VOL_SFT, 31, 1, out_vol_tlv),
+ SOC_DOUBLE("Earpiece Playback Switch", RT5625_SPK_OUT_VOL,
+ RT5625_L_MUTE_SFT, RT5625_R_MUTE_SFT, 1, 1),
+ #endif
+
+ #if defined (CONFIG_SND_SOC_RT5625_SPK_FORM_HPOUT)
+ SOC_DOUBLE_TLV("SPKOUT Playback Volume", RT5625_HP_OUT_VOL,
+ RT5625_L_VOL_SFT, RT5625_R_VOL_SFT, 31, 1, out_vol_tlv),
+ SOC_DOUBLE("SPKOUT Playback Switch", RT5625_HP_OUT_VOL,
+ RT5625_L_MUTE_SFT, RT5625_R_MUTE_SFT, 1, 1),
+ SOC_DOUBLE_TLV("Earpiece Playback Volume", RT5625_HP_OUT_VOL,
+ RT5625_L_VOL_SFT, RT5625_R_VOL_SFT, 31, 1, out_vol_tlv),
+ SOC_DOUBLE("Earpiece Playback Switch", RT5625_HP_OUT_VOL,
+ RT5625_L_MUTE_SFT, RT5625_R_MUTE_SFT, 1, 1),
+ SOC_ENUM_EXT("SPK_CTR",spk_ctr_enum, rt5625_spk_ctr_get, rt5625_spk_ctr_put),
+ #endif
+
+ SOC_ENUM("SPK Amp Type", rt5625_spk_out_enum),
+ SOC_ENUM("Left SPK Source", rt5625_spkl_src_enum),
+ SOC_ENUM("SPK Amp Ratio", rt5625_spkamp_ratio_enum),
+ //SOC_DOUBLE_TLV("Headphone Playback Volume", RT5625_HP_OUT_VOL,
+ // RT5625_L_VOL_SFT, RT5625_R_VOL_SFT, 31, 1, out_vol_tlv),
+ //SOC_DOUBLE("Headphone Playback Switch", RT5625_HP_OUT_VOL,
+ // RT5625_L_MUTE_SFT, RT5625_R_MUTE_SFT, 1, 1),
+ //SOC_ENUM("AUXOUT Mode Control", rt5625_auxout_mode_enum),
+ SOC_DOUBLE_TLV("AUXOUT Playback Volume", RT5625_AUX_OUT_VOL,
+ RT5625_L_VOL_SFT, RT5625_R_VOL_SFT, 31, 1, out_vol_tlv),
+ SOC_DOUBLE("AUXOUT Playback Switch", RT5625_AUX_OUT_VOL,
+ RT5625_L_MUTE_SFT, RT5625_R_MUTE_SFT, 1, 1),
+ SOC_DOUBLE_TLV("PCM Playback Volume", RT5625_DAC_VOL,
+ RT5625_L_VOL_SFT, RT5625_R_VOL_SFT, 63, 1, dmic_bst_tlv),
+ //SOC_ENUM("Phone Mode Control", rt5625_phone_mode_enum),
+ SOC_SINGLE_TLV("Phone Playback Volume", RT5625_PHONEIN_VOL,
+ RT5625_L_VOL_SFT, 31, 1, in_vol_tlv),
+ //SOC_ENUM("MIC1 Mode Control", rt5625_mic1_mode_enum),
+ SOC_SINGLE_TLV("MIC1 Boost", RT5625_MIC_CTRL,
+ RT5625_MIC1_BST_SFT, 3, 0, mic_bst_tlv),
+ SOC_SINGLE_TLV("Mic1 Playback Volume", RT5625_MIC_VOL,
+ RT5625_L_VOL_SFT, 31, 1, in_vol_tlv),
+ //SOC_ENUM("MIC2 Mode Control", rt5625_mic2_mode_enum),
+ SOC_SINGLE_TLV("MIC2 Boost", RT5625_MIC_CTRL,
+ RT5625_MIC2_BST_SFT, 3, 0, mic_bst_tlv),
+ SOC_SINGLE_TLV("Mic2 Playback Volume", RT5625_MIC_VOL,
+ RT5625_R_VOL_SFT, 31, 1, in_vol_tlv),
+ SOC_SINGLE_TLV("Dmic Boost", RT5625_DMIC_CTRL,
+ RT5625_DIG_BST_SFT, 7, 0, dmic_bst_tlv),
+ SOC_DOUBLE_TLV("LineIn Playback Volume", RT5625_LINE_IN_VOL,
+ RT5625_L_VOL_SFT, RT5625_R_VOL_SFT, 31, 1, in_vol_tlv),
+ SOC_DOUBLE_TLV("PCM Capture Volume", RT5625_ADC_REC_GAIN,
+ RT5625_L_VOL_SFT, RT5625_R_VOL_SFT, 31, 0, adc_vol_tlv),
+ //SOC_DOUBLE_TLV("ADC Record Gain", RT5625_ADC_REC_GAIN,
+ // RT5625_L_VOL_SFT, RT5625_R_VOL_SFT, 31, 0, adc_vol_tlv),
+ /* This item does'nt affect path connected; only for clock choosen */
+ SOC_ENUM_EXT("ADCR fun select Control", adcr_fun_sel_enum,
+ snd_soc_get_enum_double, rt5625_adcr_fun_sel_put),
+ SOC_ENUM_EXT("ADCL fun select Control", adcl_fun_sel_enum,
+ snd_soc_get_enum_double, rt5625_adcl_fun_sel_put),
+
+ /* Voice DSP */
+ SOC_ENUM_EXT("VoDSP AEC", rt5625_aec_fun_enum,
+ rt5625_aec_get, rt5625_aec_put),
+ SOC_ENUM("VoDSP LRCK Control", rt5625_dsp_lrck_enum),
+ SOC_ENUM("VoDSP BP Pin Control", rt5625_bp_ctrl_enum),
+ SOC_ENUM("VoDSP Power Down Pin Control", rt5625_pd_ctrl_enum),
+ SOC_ENUM("VoDSP Reset Pin Control", rt5625_rst_ctrl_enum),
+
+#ifdef RT5625_F_SMT_PHO
+ SOC_ENUM("GPIO2 mode", rt5625_gpio2_enum[0]),
+ SOC_ENUM("GPIO2 configuration", rt5625_gpio2_enum[1]),
+ SOC_ENUM("GPIO2 level", rt5625_gpio2_enum[2]),
+
+ SOC_SINGLE_EXT("VoDSP Dump", 0, 0, 1, 0, rt5625_dump_dsp_get, NULL),
+ SOC_SINGLE_EXT("DAC Switch", 0, 0, 1, 0, rt5625_dac_active_get, rt5625_dac_active_put),
+ SOC_SINGLE_EXT("ADC Switch", 0, 0, 1, 0, rt5625_adc_active_get, rt5625_adc_active_put),
+ SOC_ENUM_EXT("PLL Switch", rt5625_pll_sel_enum, rt5625_pll_get, rt5625_pll_put),
+ SOC_ENUM_EXT("PLL2 Switch", rt5625_pll2_sel_enum, rt5625_pll2_get, rt5625_pll2_put),
+ SOC_SINGLE_EXT("VoIP Check", 0, 0, 1, 0, rt5625_voip_get, rt5625_voip_chk_put),
+ SOC_SINGLE_EXT("VoIP Switch", 0, 0, 1, 0, rt5625_voip_get, rt5625_voip_put),
+ SOC_SINGLE_EXT("Capture VoIP Check", 0, 0, 1, 0, rt5625_voip_get, rt5625_cap_voip_chk_put),
+ SOC_SINGLE_EXT("Capture VoIP Switch", 0, 0, 1, 0, rt5625_voip_get, rt5625_cap_voip_put),
+ SOC_SINGLE_EXT("Headset VoIP Check", 0, 0, 1, 0, rt5625_voip_get, rt5625_hs_voip_chk_put),
+ SOC_SINGLE_EXT("Headset VoIP Switch", 0, 0, 1, 0, rt5625_voip_get, rt5625_hs_voip_put),
+ SOC_SINGLE_EXT("Playback Switch", 0, 0, 1, 0, rt5625_play_get, rt5625_play_put),
+ SOC_SINGLE_EXT("Record Switch", 0, 0, 1, 0, rt5625_rec_get, rt5625_rec_put),
+ SOC_SINGLE_EXT("BT Switch", 0, 0, 1, 0, rt5625_bt_get, rt5625_bt_put),
+ SOC_SINGLE_EXT("3G Switch", 0, 0, 1, 0, rt5625_3g_get, rt5625_3g_put),
+ SOC_SINGLE_EXT("Headset 3G Switch", 0, 0, 1, 0, rt5625_3g_get, rt5625_hs_3g_put),
+ SOC_SINGLE_EXT("APP disp", 0, 0, 1, 0, rt5625_app_get, NULL),
+#endif
+ //SOC_DOUBLE_TLV("SPKOUT Playback Volume", RT5625_SPK_OUT_VOL,
+ // RT5625_L_VOL_SFT, RT5625_R_VOL_SFT, 31, 1, out_vol_tlv),
+ //SOC_DOUBLE("SPKOUT Playback Switch", RT5625_SPK_OUT_VOL,
+ // RT5625_L_MUTE_SFT, RT5625_R_MUTE_SFT, 1, 1),
+ SOC_DOUBLE_TLV("HPOUT Playback Volume", RT5625_HP_OUT_VOL,
+ RT5625_L_VOL_SFT, RT5625_R_VOL_SFT, 31, 1, out_vol_tlv),
+ SOC_DOUBLE("HPOUT Playback Switch", RT5625_HP_OUT_VOL,
+ RT5625_L_MUTE_SFT, RT5625_R_MUTE_SFT, 1, 1),
+ SOC_ENUM("AUXOUT mode switch", rt5625_differential_enum[0]),
+ SOC_ENUM("Phone Differential Input Control", rt5625_differential_enum[1]),
+ SOC_ENUM("MIC1 Differential Input Control", rt5625_differential_enum[2]),
+ SOC_ENUM("MIC2 Differential Input Control", rt5625_differential_enum[3]),
+
+#ifdef RT5625_REG_RW
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Register Control",
+ .info = rt5625_regctl_info,
+ .get = rt5625_regctl_get,
+ .put = rt5625_regctl_put,
+ },
+#endif
};
-/**************************************************************
- * watch out!
+ /*Left ADC Rec mixer*/
+static const struct snd_kcontrol_new rt5625_adcl_rec_mixer[] = {
+ SOC_DAPM_SINGLE("Mic1 Capture Switch", RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_L_MIC1_SFT, 1, 1),
+ SOC_DAPM_SINGLE("Mic2 Capture Switch", RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_L_MIC2_SFT, 1, 1),
+ SOC_DAPM_SINGLE("LineIn Capture Switch", RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_L_LINE_SFT, 1, 1),
+ SOC_DAPM_SINGLE("Phone Capture Switch", RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_L_PHO_SFT, 1, 1),
+ SOC_DAPM_SINGLE("HP Mixer Capture Switch", RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_L_HM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("SPK Mixer Capture Switch", RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_L_SM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("MoNo Mixer Capture Switch", RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_L_MM_SFT, 1, 1),
+};
+
+/*Right ADC Rec mixer*/
+static const struct snd_kcontrol_new rt5625_adcr_rec_mixer[] = {
+ SOC_DAPM_SINGLE("Mic1 Capture Switch", RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_R_MIC1_SFT, 1, 1),
+ SOC_DAPM_SINGLE("Mic2 Capture Switch", RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_R_MIC2_SFT, 1, 1),
+ SOC_DAPM_SINGLE("LineIn Capture Switch", RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_R_LINE_SFT, 1, 1),
+ SOC_DAPM_SINGLE("Phone Capture Switch", RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_R_PHO_SFT, 1, 1),
+ SOC_DAPM_SINGLE("HP Mixer Capture Switch", RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_R_HM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("SPK Mixer Capture Switch", RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_R_SM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("MoNo Mixer Capture Switch", RT5625_ADC_REC_MIXER,
+ RT5625_M_RM_R_MM_SFT, 1, 1),
+};
+
+/* HP Mixer for mono input */
+static const struct snd_kcontrol_new rt5625_hp_mixer[] = {
+ SOC_DAPM_SINGLE("LineIn Playback Switch", RT5625_LINE_IN_VOL,
+ RT5625_M_LI_HM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("Phone Playback Switch", RT5625_PHONEIN_VOL,
+ RT5625_M_PHO_HM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("Mic1 Playback Switch", RT5625_DAC_MIC_CTRL,
+ RT5625_M_MIC1_HM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("Mic2 Playback Switch", RT5625_DAC_MIC_CTRL,
+ RT5625_M_MIC2_HM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("Voice DAC Playback Switch", RT5625_VDAC_OUT_VOL,
+ RT5625_M_VDAC_HM_SFT, 1, 1),
+};
+
+/* Left HP Mixer */
+static const struct snd_kcontrol_new rt5625_hpl_mixer[] = {
+ SOC_DAPM_SINGLE("ADC Playback Switch", RT5625_ADC_REC_GAIN,
+ RT5625_M_ADCL_HM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("DAC Playback Switch", RT5625_DAC_MIC_CTRL,
+ RT5625_M_DACL_HM_SFT, 1, 1),
+};
+
+/* Right HP Mixer */
+static const struct snd_kcontrol_new rt5625_hpr_mixer[] = {
+ SOC_DAPM_SINGLE("ADC Playback Switch", RT5625_ADC_REC_GAIN,
+ RT5625_M_ADCR_HM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("DAC Playback Switch", RT5625_DAC_MIC_CTRL,
+ RT5625_M_DACR_HM_SFT, 1, 1),
+};
+
+/* Mono Mixer */
+static const struct snd_kcontrol_new rt5625_mono_mixer[] = {
+ SOC_DAPM_SINGLE("ADCL Playback Switch", RT5625_ADC_REC_GAIN,
+ RT5625_M_ADCL_MM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("ADCR Playback Switch", RT5625_ADC_REC_GAIN,
+ RT5625_M_ADCR_MM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("Line Mixer Playback Switch", RT5625_LINE_IN_VOL,
+ RT5625_M_LI_MM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("Mic1 Playback Switch", RT5625_DAC_MIC_CTRL,
+ RT5625_M_MIC1_MM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("Mic2 Playback Switch", RT5625_DAC_MIC_CTRL,
+ RT5625_M_MIC2_MM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("DAC Mixer Playback Switch", RT5625_DAC_MIC_CTRL,
+ RT5625_M_DAC_MM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("Voice DAC Playback Switch", RT5625_VDAC_OUT_VOL,
+ RT5625_M_VDAC_MM_SFT, 1, 1),
+};
+
+/* Speaker Mixer */
+static const struct snd_kcontrol_new rt5625_spk_mixer[] = {
+ SOC_DAPM_SINGLE("Line Mixer Playback Switch", RT5625_LINE_IN_VOL,
+ RT5625_M_LI_SM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("Phone Playback Switch", RT5625_PHONEIN_VOL,
+ RT5625_M_PHO_SM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("Mic1 Playback Switch", RT5625_DAC_MIC_CTRL,
+ RT5625_M_MIC1_SM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("Mic2 Playback Switch", RT5625_DAC_MIC_CTRL,
+ RT5625_M_MIC2_SM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("DAC Mixer Playback Switch", RT5625_DAC_MIC_CTRL,
+ RT5625_M_DAC_SM_SFT, 1, 1),
+ SOC_DAPM_SINGLE("Voice DAC Playback Switch", RT5625_VDAC_OUT_VOL,
+ RT5625_M_VDAC_SM_SFT, 1, 1),
+};
+
+static int rt5625_dac_func_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_REG:
+ snd_soc_update_bits(codec, RT5625_PD_CTRL,
+ RT5625_PWR_PR1, RT5625_PWR_PR1);
+ break;
+
+ case SND_SOC_DAPM_POST_REG:
+ snd_soc_update_bits(codec, RT5625_PD_CTRL,
+ RT5625_PWR_PR1, 0);
+ break;
+
+ default:
+ return 0;
+ }
+
+ return 0;
+}
+
+static int rt5625_hpmix_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_PMD:
+ snd_soc_update_bits(codec, RT5625_PWR_ADD2,
+ RT5625_P_HM_L | RT5625_P_HM_R, 0);
+ break;
+
+ case SND_SOC_DAPM_POST_PMU:
+ snd_soc_update_bits(codec, RT5625_PWR_ADD2,
+ RT5625_P_HM_L | RT5625_P_HM_R,
+ RT5625_P_HM_L | RT5625_P_HM_R);
+ break;
+
+ default:
+ return 0;
+ }
+
+ return 0;
+}
+
+static int rt5625_vodsp_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+
+ switch (event) {
+ case SND_SOC_DAPM_POST_PMD:
+ //pr_info("%s(): PMD\n", __func__);
+ snd_soc_update_bits(codec, RT5625_VODSP_CTL,
+ RT5625_DSP_PD_MASK, RT5625_DSP_PD_EN);
+ snd_soc_update_bits(codec, RT5625_PWR_ADD3,
+ RT5625_P_DSP_IF | RT5625_P_DSP_I2C, 0);
+ snd_soc_update_bits(codec, RT5625_LDO_CTRL,
+ RT5625_LDO_MASK, RT5625_LDO_DIS);
+ break;
+
+ case SND_SOC_DAPM_POST_PMU:
+ //pr_info("%s(): PMU\n", __func__);
+ if(rt5625->vodsp_fun == RT5625_AEC_EN)
+ rt5625_init_vodsp_aec(codec);
+ //pr_info("[DSP poweron] 0x%04x: 0x%04x\n", 0x230C, rt5625_dsp_read(codec, 0x230C));
+ break;
+
+ default:
+ return 0;
+ }
+
+ return 0;
+}
+
+
+static void hp_depop_mode2(struct snd_soc_codec *codec)
+{
+ snd_soc_update_bits(codec, RT5625_PWR_ADD1,
+ RT5625_P_SG_EN, RT5625_P_SG_EN);
+ snd_soc_update_bits(codec, RT5625_PWR_ADD3,
+ RT5625_P_HPL_VOL | RT5625_P_HPR_VOL,
+ RT5625_P_HPL_VOL | RT5625_P_HPR_VOL);
+ snd_soc_write(codec, RT5625_MISC_CTRL, RT5625_HP_DEPOP_M2);
+ schedule_timeout_uninterruptible(msecs_to_jiffies(500));
+ snd_soc_update_bits(codec, RT5625_PWR_ADD1,
+ RT5625_P_HPO_AMP | RT5625_P_HPO_ENH,
+ RT5625_P_HPO_AMP | RT5625_P_HPO_ENH);
+}
+
+/* enable depop function for mute/unmute */
+static void hp_mute_unmute_depop(struct snd_soc_codec *codec,int mute)
+{
+ if(mute) {
+ snd_soc_update_bits(codec, RT5625_PWR_ADD1,
+ RT5625_P_SG_EN, RT5625_P_SG_EN);
+ snd_soc_write(codec, RT5625_MISC_CTRL, RT5625_MUM_DEPOP |
+ RT5625_HPR_MUM_DEPOP | RT5625_HPL_MUM_DEPOP);
+ snd_soc_update_bits(codec, RT5625_HP_OUT_VOL,
+ RT5625_L_MUTE | RT5625_R_MUTE,
+ RT5625_L_MUTE | RT5625_R_MUTE);
+ mdelay(50);
+ snd_soc_update_bits(codec, RT5625_PWR_ADD1, RT5625_P_SG_EN, 0);
+ } else {
+ snd_soc_update_bits(codec, RT5625_PWR_ADD1,
+ RT5625_P_SG_EN, RT5625_P_SG_EN);
+ snd_soc_write(codec, RT5625_MISC_CTRL, RT5625_MUM_DEPOP |
+ RT5625_HPR_MUM_DEPOP | RT5625_HPL_MUM_DEPOP);
+ snd_soc_update_bits(codec,RT5625_HP_OUT_VOL,
+ RT5625_L_MUTE | RT5625_R_MUTE, 0);
+ mdelay(50);
+ }
+}
+
+static int rt5625_hp_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+
+ switch (event) {
+ case SND_SOC_DAPM_PRE_PMD:
+ hp_mute_unmute_depop(codec,1);
+ snd_soc_update_bits(codec, RT5625_PWR_ADD1,
+ RT5625_P_HPO_AMP | RT5625_P_HPO_ENH, 0);
+ snd_soc_update_bits(codec, RT5625_PWR_ADD3,
+ RT5625_P_HPL_VOL | RT5625_P_HPR_VOL, 0);
+ break;
+
+ case SND_SOC_DAPM_POST_PMU:
+ hp_depop_mode2(codec);
+ hp_mute_unmute_depop(codec,0);
+ break;
+
+ default:
+ return 0;
+ }
+
+ return 0;
+}
+
+/* DAC function select MUX */
+static const char *dac_fun_sel[] = {
+ "Stereo DAC", "SRC2 Out", "TxDP", "TxDC"};
+
+static const struct soc_enum dac_fun_sel_enum =
+ SOC_ENUM_SINGLE(RT5625_F_DAC_ADC_VDAC, RT5625_DAC_F_SFT,
+ ARRAY_SIZE(dac_fun_sel), dac_fun_sel);
+
+static const struct snd_kcontrol_new dac_fun_sel_mux =
+ SOC_DAPM_ENUM("DAC Function Select Mux", dac_fun_sel_enum);
+
+/* Voice DAC source select MUX */
+static const char *vdac_src_sel[] = {
+ "Voice PCM", "SRC2 Out", "TxDP", "TxDC"};
+
+static const struct soc_enum vdac_src_sel_enum =
+ SOC_ENUM_SINGLE(RT5625_F_DAC_ADC_VDAC, RT5625_VDAC_S_SFT,
+ ARRAY_SIZE(vdac_src_sel), vdac_src_sel);
+
+static const struct snd_kcontrol_new vdac_src_sel_mux =
+ SOC_DAPM_ENUM("Voice DAC Source Mux", vdac_src_sel_enum);
+
+/* SRC1 power switch */
+static const struct snd_kcontrol_new src1_pwr_sw_control =
+ SOC_DAPM_SINGLE("Switch", RT5625_VODSP_PDM_CTL,
+ RT5625_SRC1_PWR_SFT, 1, 0);
+
+/* SRC2 power switch */
+static const struct snd_kcontrol_new src2_pwr_sw_control =
+ SOC_DAPM_SINGLE("Switch", RT5625_VODSP_PDM_CTL,
+ RT5625_SRC2_PWR_SFT, 1, 0);
+
+/* SRC2 source select MUX */
+static const char *src2_src_sel[] = {"TxDP", "TxDC"};
+
+static const struct soc_enum src2_src_sel_enum =
+ SOC_ENUM_SINGLE(RT5625_VODSP_PDM_CTL, RT5625_SRC2_S_SFT,
+ ARRAY_SIZE(src2_src_sel), src2_src_sel);
+
+static const struct snd_kcontrol_new src2_src_sel_mux =
+ SOC_DAPM_ENUM("SRC2 Source Mux", src2_src_sel_enum);
+
+/* VoDSP RxDP power switch */
+static const struct snd_kcontrol_new rxdp_pwr_sw_control =
+ SOC_DAPM_SINGLE("Switch", RT5625_VODSP_PDM_CTL,
+ RT5625_RXDP_PWR_SFT, 1, 0);
+/* VoDSP RxDC power switch */
+static const struct snd_kcontrol_new rxdc_pwr_sw_control =
+ SOC_DAPM_SINGLE("Switch", RT5625_VODSP_PDM_CTL,
+ RT5625_RXDC_PWR_SFT, 1, 0);
+
+/* VoDSP RxDP source select MUX */
+static const char *rxdp_src_sel[] = {"SRC1 Output", "ADCL to VoDSP",
+ "Voice to Stereo", "ADCR to VoDSP"};
+
+static const struct soc_enum rxdp_src_sel_enum =
+ SOC_ENUM_SINGLE(RT5625_VODSP_PDM_CTL, RT5625_RXDP_S_SFT,
+ ARRAY_SIZE(rxdp_src_sel), rxdp_src_sel);
+
+static const struct snd_kcontrol_new rxdp_src_sel_mux =
+ SOC_DAPM_ENUM("RxDP Source Mux", rxdp_src_sel_enum);
+
+/* PCM source select MUX */
+static const char *pcm_src_sel[] = {"ADCR", "TxDP"};
+
+static const struct soc_enum pcm_src_sel_enum =
+ SOC_ENUM_SINGLE(RT5625_VODSP_PDM_CTL, RT5625_PCM_S_SFT,
+ ARRAY_SIZE(pcm_src_sel), pcm_src_sel);
+
+static const struct snd_kcontrol_new pcm_src_sel_mux =
+ SOC_DAPM_ENUM("PCM Source Mux", pcm_src_sel_enum);
+
+/* Main stereo record I2S source select MUX */
+static const char *rec_iis_src_sel[] = {"ADC", "Voice to Stereo", "SRC2 Output"};
+
+static const struct soc_enum rec_iis_src_enum =
+ SOC_ENUM_SINGLE(RT5625_VODSP_PDM_CTL, RT5625_REC_IIS_S_SFT,
+ ARRAY_SIZE(rec_iis_src_sel), rec_iis_src_sel);
+
+static const struct snd_kcontrol_new rec_iis_src_mux =
+ SOC_DAPM_ENUM("REC I2S Source Mux", rec_iis_src_enum);
+
+/* SPK volume input select MUX */
+static const char *spkvol_input_sel[] = {"VMID", "HP Mixer", "SPK Mixer", "Mono Mixer"};
+
+static const struct soc_enum spkvol_input_enum =
+ SOC_ENUM_SINGLE(RT5625_OUTMIX_CTRL, RT5625_SPKVOL_S_SFT,
+ ARRAY_SIZE(spkvol_input_sel), spkvol_input_sel);
+
+static const struct snd_kcontrol_new spkvol_input_mux =
+ SOC_DAPM_ENUM("SPK Vol Input Mux", spkvol_input_enum);
+
+/* HP volume input select MUX */
+static const char *hpvol_input_sel[] = {"VMID", "HP Mixer"};
+
+static const struct soc_enum hplvol_input_enum =
+ SOC_ENUM_SINGLE(RT5625_OUTMIX_CTRL, RT5625_HPVOL_L_S_SFT,
+ ARRAY_SIZE(hpvol_input_sel), hpvol_input_sel);
+
+static const struct snd_kcontrol_new hplvol_input_mux =
+ SOC_DAPM_ENUM("HPL Vol Input Mux", hplvol_input_enum);
+
+static const struct soc_enum hprvol_input_enum =
+ SOC_ENUM_SINGLE(RT5625_OUTMIX_CTRL, RT5625_HPVOL_R_S_SFT,
+ ARRAY_SIZE(hpvol_input_sel), hpvol_input_sel);
+
+static const struct snd_kcontrol_new hprvol_input_mux =
+ SOC_DAPM_ENUM("HPR Vol Input Mux", hprvol_input_enum);
+
+/* AUX volume input select MUX */
+static const struct soc_enum auxvol_input_enum =
+ SOC_ENUM_SINGLE(RT5625_OUTMIX_CTRL, RT5625_AUXVOL_S_SFT,
+ ARRAY_SIZE(spkvol_input_sel), spkvol_input_sel);
+
+static const struct snd_kcontrol_new auxvol_input_mux =
+ SOC_DAPM_ENUM("AUX Vol Input Mux", auxvol_input_enum);
+
+static const struct snd_soc_dapm_widget rt5625_dapm_widgets[] = {
+ /* supply */
+ SND_SOC_DAPM_SUPPLY("IIS Interface", RT5625_PWR_ADD1,
+ RT5625_P_I2S_BIT, 0, NULL, 0),
+ SND_SOC_DAPM_SUPPLY("PLL1", RT5625_PWR_ADD2,
+ RT5625_P_PLL1_BIT, 0, NULL, 0),
+ SND_SOC_DAPM_SUPPLY("PLL2", RT5625_PWR_ADD2,
+ RT5625_P_PLL2_BIT, 0, NULL, 0),
+ SND_SOC_DAPM_VMID("VMID"),
+ SND_SOC_DAPM_SUPPLY("DAC Ref", RT5625_PWR_ADD1,
+ RT5625_P_DAC_REF_BIT, 0, NULL, 0),
+ /* microphone bias */
+ SND_SOC_DAPM_MICBIAS("Mic1 Bias", RT5625_PWR_ADD1,
+ RT5625_P_MB1_BIT, 0),
+ SND_SOC_DAPM_MICBIAS("Mic2 Bias", RT5625_PWR_ADD1,
+ RT5625_P_MB2_BIT, 0),
+
+ /* Input */
+ SND_SOC_DAPM_INPUT("Left LineIn"),
+ SND_SOC_DAPM_INPUT("Right LineIn"),
+ SND_SOC_DAPM_INPUT("Phone"),
+ SND_SOC_DAPM_INPUT("Mic1"),
+ SND_SOC_DAPM_INPUT("Mic2"),
+
+ SND_SOC_DAPM_PGA("Mic1 Boost", RT5625_PWR_ADD3,
+ RT5625_P_MIC1_BST_BIT, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("Mic2 Boost", RT5625_PWR_ADD3,
+ RT5625_P_MIC2_BST_BIT, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("Phone Rec Mixer", RT5625_PWR_ADD3,
+ RT5625_P_PH_ADMIX_BIT, 0, NULL, 0),
+
+ SND_SOC_DAPM_MIXER("Left Rec Mixer", RT5625_PWR_ADD2,
+ RT5625_P_ADCL_RM_BIT, 0, rt5625_adcl_rec_mixer,
+ ARRAY_SIZE(rt5625_adcl_rec_mixer)),
+ SND_SOC_DAPM_MIXER("Right Rec Mixer", RT5625_PWR_ADD2,
+ RT5625_P_ADCR_RM_BIT, 0, rt5625_adcr_rec_mixer,
+ ARRAY_SIZE(rt5625_adcr_rec_mixer)),
+
+ SND_SOC_DAPM_ADC("Left ADC", NULL, RT5625_PWR_ADD2,
+ RT5625_P_ADCL_BIT, 0),
+ SND_SOC_DAPM_ADC("Right ADC", NULL, RT5625_PWR_ADD2,
+ RT5625_P_ADCR_BIT, 0),
+ SND_SOC_DAPM_PGA("ADC", SND_SOC_NOPM, 0, 0, NULL, 0),//johnny-3-9
+ SND_SOC_DAPM_MUX("PCM src select Mux", SND_SOC_NOPM, 0, 0,
+ &pcm_src_sel_mux),
+ SND_SOC_DAPM_MUX("IIS src select Mux", SND_SOC_NOPM, 0, 0,
+ &rec_iis_src_mux),
+
+ /* Input Stream Audio Interface */
+ SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 HiFi Capture", 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Voice Capture", 0, SND_SOC_NOPM, 0, 0),
+
+ /* Voice DSP */
+ SND_SOC_DAPM_MUX("SRC2 src select Mux", SND_SOC_NOPM, 0, 0,
+ &src2_src_sel_mux),
+ SND_SOC_DAPM_SWITCH("SRC1 Enable", SND_SOC_NOPM, 0, 0,
+ &src1_pwr_sw_control),
+ SND_SOC_DAPM_SWITCH("SRC2 Enable", SND_SOC_NOPM, 0, 0,
+ &src2_pwr_sw_control),
+ SND_SOC_DAPM_SWITCH("RxDP Enable", SND_SOC_NOPM, 0, 0,
+ &rxdp_pwr_sw_control),
+ SND_SOC_DAPM_SWITCH("RxDC Enable", SND_SOC_NOPM, 0, 0,
+ &rxdc_pwr_sw_control),
+
+ SND_SOC_DAPM_MUX("RxDP src select Mux", SND_SOC_NOPM, 0, 0,
+ &rxdp_src_sel_mux),
+
+ SND_SOC_DAPM_PGA("TxDP", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("TxDC", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("PDM", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("RxDP", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("RxDC", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_PGA_E("Voice DSP", SND_SOC_NOPM,
+ 0, 0, NULL, 0, rt5625_vodsp_event,
+ SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
+
+ /* Output */
+ /* Output Stream Audio Interface */
+ SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 HiFi Playback",
+ 0, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Voice Playback",
+ 0, SND_SOC_NOPM, 0, 0),
+
+ /* DAC function select Mux */
+ SND_SOC_DAPM_MUX_E("DAC fun Mux", SND_SOC_NOPM, 0, 0,
+ &dac_fun_sel_mux, rt5625_dac_func_event,
+ SND_SOC_DAPM_PRE_REG | SND_SOC_DAPM_POST_REG),
+ /* VDAC source select Mux */
+ SND_SOC_DAPM_MUX_E("VDAC src Mux", SND_SOC_NOPM, 0, 0,
+ &vdac_src_sel_mux, rt5625_dac_func_event,
+ SND_SOC_DAPM_PRE_REG | SND_SOC_DAPM_POST_REG),
+
+ SND_SOC_DAPM_DAC("Left DAC", NULL, RT5625_PWR_ADD2,
+ RT5625_P_DACL_BIT, 0),
+ SND_SOC_DAPM_DAC("Right DAC", NULL, RT5625_PWR_ADD2,
+ RT5625_P_DACR_BIT, 0),
+ SND_SOC_DAPM_DAC("Voice DAC", NULL, RT5625_PWR_ADD2,
+ RT5625_P_VDAC_BIT, 0),
+
+ SND_SOC_DAPM_PGA("Mic1 Volume", RT5625_PWR_ADD3,
+ RT5625_P_MIC1_VOL_BIT, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("Mic2 Volume", RT5625_PWR_ADD3,
+ RT5625_P_MIC2_VOL_BIT, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("Left LineIn Volume", RT5625_PWR_ADD3,
+ RT5625_P_LV_L_BIT, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("Right LineIn Volume", RT5625_PWR_ADD3,
+ RT5625_P_LV_R_BIT, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("Phone Volume", RT5625_PWR_ADD3,
+ RT5625_P_PH_VOL_BIT, 0, NULL, 0),
+
+ SND_SOC_DAPM_PGA("Left DAC To Mixer", RT5625_PWR_ADD1,
+ RT5625_P_DACL_MIX_BIT, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("Right DAC To Mixer", RT5625_PWR_ADD1,
+ RT5625_P_DACR_MIX_BIT, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("Voice DAC To Mixer", RT5625_PWR_ADD1,
+ RT5625_P_VDAC_MIX_BIT, 0, NULL, 0),
+
+ SND_SOC_DAPM_MIXER("SPK Mixer", RT5625_PWR_ADD2,
+ RT5625_P_SM_BIT, 0, rt5625_spk_mixer,
+ ARRAY_SIZE(rt5625_spk_mixer)),
+ SND_SOC_DAPM_MIXER("Mono HP Mixer", SND_SOC_NOPM, 0, 0,
+ rt5625_hp_mixer, ARRAY_SIZE(rt5625_hp_mixer)),
+ SND_SOC_DAPM_MIXER("Left HP Mixer", SND_SOC_NOPM, 0, 0,
+ rt5625_hpl_mixer, ARRAY_SIZE(rt5625_hpl_mixer)),
+ SND_SOC_DAPM_MIXER("Right HP Mixer", SND_SOC_NOPM, 0, 0,
+ rt5625_hpr_mixer, ARRAY_SIZE(rt5625_hpr_mixer)),
+ SND_SOC_DAPM_MIXER("Mono Mixer", RT5625_PWR_ADD2,
+ RT5625_P_MM_BIT, 0, rt5625_mono_mixer,
+ ARRAY_SIZE(rt5625_mono_mixer)),
+
+ SND_SOC_DAPM_MIXER_E("HP Mixer", SND_SOC_NOPM, 0, 0, NULL, 0,
+ rt5625_hpmix_event, SND_SOC_DAPM_PRE_PMD |
+ SND_SOC_DAPM_POST_PMU),
+
+ SND_SOC_DAPM_MIXER("DAC Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_MIXER("Line Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
+
+ SND_SOC_DAPM_MUX("SPK Vol Input Mux", SND_SOC_NOPM,
+ 0, 0, &spkvol_input_mux),
+ SND_SOC_DAPM_SUPPLY("SPKL Vol", RT5625_PWR_ADD3,
+ RT5625_P_SPKL_VOL_BIT, 0, NULL, 0),
+ SND_SOC_DAPM_SUPPLY("SPKR Vol", RT5625_PWR_ADD3,
+ RT5625_P_SPKR_VOL_BIT, 0, NULL, 0),
+ SND_SOC_DAPM_MUX("HPL Vol Input Mux", RT5625_PWR_ADD3,
+ RT5625_P_HPL_VOL_BIT, 0, &hplvol_input_mux),
+ SND_SOC_DAPM_MUX("HPR Vol Input Mux", RT5625_PWR_ADD3,
+ RT5625_P_HPR_VOL_BIT, 0, &hprvol_input_mux),
+ SND_SOC_DAPM_MUX("AUX Vol Input Mux", RT5625_PWR_ADD3,
+ RT5625_P_AUX_VOL_BIT, 0, &auxvol_input_mux),
+
+ SND_SOC_DAPM_SUPPLY("SPK Amp", RT5625_PWR_ADD1,
+ RT5625_P_SPK_AMP_BIT, 0, NULL, 0),
+ SND_SOC_DAPM_PGA_E("HP Amp", SND_SOC_NOPM, 0, 0, NULL, 0,
+ rt5625_hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
+
+ SND_SOC_DAPM_OUTPUT("SPKL"),
+ SND_SOC_DAPM_OUTPUT("SPKR"),
+ SND_SOC_DAPM_OUTPUT("HPL"),
+ SND_SOC_DAPM_OUTPUT("HPR"),
+ SND_SOC_DAPM_OUTPUT("AUX"),
+};
+
+static const struct snd_soc_dapm_route rt5625_dapm_routes[] = {
+ {"DAC Ref", NULL, "IIS Interface"},
+ {"DAC Ref", NULL, "PLL1"},
+ {"DAC Ref", NULL, "PLL2"},
+
+ /* Input */
+ {"Phone Rec Mixer", NULL, "Phone"},
+ {"Mic1 Boost", NULL, "Mic1"},
+ {"Mic2 Boost", NULL, "Mic2"},
+
+ {"Left Rec Mixer", "LineIn Capture Switch", "Left LineIn"},
+ {"Left Rec Mixer", "Phone Capture Switch", "Phone Rec Mixer"},
+ {"Left Rec Mixer", "Mic1 Capture Switch", "Mic1 Boost"},
+ {"Left Rec Mixer", "Mic2 Capture Switch", "Mic2 Boost"},
+ {"Left Rec Mixer", "HP Mixer Capture Switch", "Left HP Mixer"},
+ {"Left Rec Mixer", "SPK Mixer Capture Switch", "SPK Mixer"},
+ {"Left Rec Mixer", "MoNo Mixer Capture Switch", "Mono Mixer"},
+
+ {"Right Rec Mixer", "LineIn Capture Switch", "Right LineIn"},
+ {"Right Rec Mixer", "Phone Capture Switch", "Phone Rec Mixer"},
+ {"Right Rec Mixer", "Mic1 Capture Switch", "Mic1 Boost"},
+ {"Right Rec Mixer", "Mic2 Capture Switch", "Mic2 Boost"},
+ {"Right Rec Mixer", "HP Mixer Capture Switch", "Right HP Mixer"},
+ {"Right Rec Mixer", "SPK Mixer Capture Switch", "SPK Mixer"},
+ {"Right Rec Mixer", "MoNo Mixer Capture Switch", "Mono Mixer"},
+
+ {"Left ADC", NULL, "DAC Ref"},
+ {"Left ADC", NULL, "Left Rec Mixer"},
+ {"Right ADC", NULL, "DAC Ref"},
+ {"Right ADC", NULL, "Right Rec Mixer"},
+
+ {"PCM src select Mux", "TxDP", "TxDP"},
+ {"PCM src select Mux", "ADCR", "Right ADC"},
+
+ //johnny-3-9 [s]
+ {"ADC", NULL, "Left ADC"},
+ {"ADC", NULL, "Right ADC"},
+ {"IIS src select Mux", "ADC", "ADC"},
+ //{"IIS src select Mux", "ADC", "Left ADC"},
+ //{"IIS src select Mux", "ADC", "Right ADC"},
+ //johnny-3-9 [e]
+ {"IIS src select Mux", "Voice to Stereo", "AIF2RX"},
+ {"IIS src select Mux", "SRC2 Output", "SRC2 Enable"},
+
+ {"AIF2TX", NULL, "IIS Interface"},
+ {"AIF2TX", NULL, "PCM src select Mux"},
+ {"AIF1TX", NULL, "IIS Interface"},
+ {"AIF1TX", NULL, "IIS src select Mux"},
+
+ /* Output */
+ {"AIF1RX", NULL, "IIS Interface"},
+ {"AIF2RX", NULL, "IIS Interface"},
+
+ {"DAC fun Mux", "SRC2 Out", "SRC2 Enable"},
+ {"DAC fun Mux", "TxDP", "TxDP"},
+ {"DAC fun Mux", "TxDC", "TxDC"},
+ {"DAC fun Mux", "Stereo DAC", "AIF1RX"},
+
+ {"VDAC src Mux", "SRC2 Out", "SRC2 Enable"},
+ {"VDAC src Mux", "TxDP", "TxDP"},
+ {"VDAC src Mux", "TxDC", "TxDC"},
+ {"VDAC src Mux", "Voice PCM", "AIF2RX"},
+
+ {"Left DAC", NULL, "DAC Ref"},
+ {"Left DAC", NULL, "DAC fun Mux"},
+ {"Right DAC", NULL, "DAC Ref"},
+ {"Right DAC", NULL, "DAC fun Mux"},
+ {"Voice DAC", NULL, "DAC Ref"},
+ {"Voice DAC", NULL, "VDAC src Mux"},
+
+ {"Left LineIn Volume", NULL, "Left LineIn"},
+ {"Right LineIn Volume", NULL, "Right LineIn"},
+ {"Phone Volume", NULL, "Phone"},
+ {"Mic1 Volume", NULL, "Mic1 Boost"},
+ {"Mic2 Volume", NULL, "Mic2 Boost"},
+
+ {"Left DAC To Mixer", NULL, "Left DAC"},
+ {"Right DAC To Mixer", NULL, "Right DAC"},
+ {"Voice DAC To Mixer", NULL, "Voice DAC"},
+
+ {"DAC Mixer", NULL, "Left DAC To Mixer"},
+ {"DAC Mixer", NULL, "Right DAC To Mixer"},
+ {"Line Mixer", NULL, "Left LineIn Volume"},
+ {"Line Mixer", NULL, "Right LineIn Volume"},
+
+ {"Mono HP Mixer", "LineIn Playback Switch", "Line Mixer"},
+ {"Mono HP Mixer", "Phone Playback Switch", "Phone Volume"},
+ {"Mono HP Mixer", "Mic1 Playback Switch", "Mic1 Volume"},
+ {"Mono HP Mixer", "Mic2 Playback Switch", "Mic2 Volume"},
+ {"Mono HP Mixer", "Voice DAC Playback Switch", "Voice DAC To Mixer"},
+ {"Left HP Mixer", "ADC Playback Switch", "Left Rec Mixer"},
+ {"Left HP Mixer", "DAC Playback Switch", "Left DAC To Mixer"},
+ {"Right HP Mixer", "ADC Playback Switch", "Right Rec Mixer"},
+ {"Right HP Mixer", "DAC Playback Switch", "Right DAC To Mixer"},
+
+ {"SPK Mixer", "Line Mixer Playback Switch", "Line Mixer"},
+ {"SPK Mixer", "Phone Playback Switch", "Phone Volume"},
+ {"SPK Mixer", "Mic1 Playback Switch", "Mic1 Volume"},
+ {"SPK Mixer", "Mic2 Playback Switch", "Mic2 Volume"},
+ {"SPK Mixer", "DAC Mixer Playback Switch", "DAC Mixer"},
+ {"SPK Mixer", "Voice DAC Playback Switch", "Voice DAC To Mixer"},
+
+ {"Mono Mixer", "Line Mixer Playback Switch", "Line Mixer"},
+ {"Mono Mixer", "ADCL Playback Switch","Left Rec Mixer"},
+ {"Mono Mixer", "ADCR Playback Switch","Right Rec Mixer"},
+ {"Mono Mixer", "Mic1 Playback Switch", "Mic1 Volume"},
+ {"Mono Mixer", "Mic2 Playback Switch", "Mic2 Volume"},
+ {"Mono Mixer", "DAC Mixer Playback Switch", "DAC Mixer"},
+ {"Mono Mixer", "Voice DAC Playback Switch", "Voice DAC To Mixer"},
+
+ {"HP Mixer", NULL, "Mono HP Mixer"},
+ {"HP Mixer", NULL, "Left HP Mixer"},
+ {"HP Mixer", NULL, "Right HP Mixer"},
+
+ {"SPK Vol Input Mux", "VMID", "VMID"},
+ {"SPK Vol Input Mux", "HP Mixer", "HP Mixer"},
+ {"SPK Vol Input Mux", "SPK Mixer", "SPK Mixer"},
+ {"SPK Vol Input Mux", "Mono Mixer", "Mono Mixer"},
+ {"SPK Vol Input Mux", NULL, "SPKL Vol"},
+ {"SPK Vol Input Mux", NULL, "SPKR Vol"},
+
+ {"HPL Vol Input Mux", "HP Mixer", "HP Mixer"},
+ {"HPL Vol Input Mux", "VMID", "VMID"},
+ {"HP Amp", NULL, "HPL Vol Input Mux"},
+ {"HPR Vol Input Mux", "HP Mixer", "HP Mixer"},
+ {"HPR Vol Input Mux", "VMID", "VMID"},
+ {"HP Amp", NULL, "HPR Vol Input Mux"},
+
+ {"AUX Vol Input Mux", "VMID", "VMID"},
+ {"AUX Vol Input Mux", "HP Mixer", "HP Mixer"},
+ {"AUX Vol Input Mux", "SPK Mixer", "SPK Mixer"},
+ {"AUX Vol Input Mux", "Mono Mixer", "Mono Mixer"},
+
+ {"SPKL", NULL, "SPK Amp"},
+ {"SPKL", NULL, "SPK Vol Input Mux"},
+ {"SPKR", NULL, "SPK Amp"},
+ {"SPKR", NULL, "SPK Vol Input Mux"},
+ {"HPL", NULL, "HP Amp"},
+ {"HPR", NULL, "HP Amp"},
+ {"AUX", NULL, "AUX Vol Input Mux"},
+
+ /* Voice DSP */
+ {"SRC1 Enable", "Switch", "AIF1RX"},
+
+ {"RxDP src select Mux", "Voice to Stereo", "AIF2RX"},
+ {"RxDP src select Mux", "ADCL to VoDSP", "Left ADC"},
+ {"RxDP src select Mux", "SRC1 Output", "SRC1 Enable"},
+ {"RxDP src select Mux", "ADCR to VoDSP", "Right ADC"},
+
+ {"RxDP Enable", "Switch", "RxDP src select Mux"},
+ {"RxDC Enable", "Switch", "Left ADC"},
+
+ {"RxDP", NULL, "RxDP Enable"},
+ {"RxDC", NULL, "RxDC Enable"},
+ {"PDM", NULL, "Right ADC"},
+
+ {"Voice DSP", NULL, "RxDP"},
+ {"Voice DSP", NULL, "RxDC"},
+ {"Voice DSP", NULL, "PDM"},
+
+ {"TxDP", NULL, "Voice DSP"},
+ {"TxDC", NULL, "Voice DSP"},
+
+ {"SRC2 src select Mux", "TxDP", "TxDP"},
+ {"SRC2 src select Mux", "TxDC", "TxDC"},
+ {"SRC2 Enable", "Switch", "SRC2 src select Mux"},
+};
+
+struct _pll_div{
+ u32 pll_in;
+ u32 pll_out;
+ u16 regvalue;
+};
+
+/**************************************************************
+ * watch out!
* our codec support you to select different source as pll input, but if you
* use both of the I2S audio interface and pcm interface instantially.
* The two DAI must have the same pll setting params, so you have to offer
* 24576000.
**************************************************************/
static const struct _pll_div codec_master_pll1_div[] = {
-
- { 2048000, 8192000, 0x0ea0},
- { 3686400, 8192000, 0x4e27},
- { 12000000, 8192000, 0x456b},
- { 13000000, 8192000, 0x495f},
- { 13100000, 8192000, 0x0320},
- { 2048000, 11289600, 0xf637},
- { 3686400, 11289600, 0x2f22},
- { 12000000, 11289600, 0x3e2f},
- { 13000000, 11289600, 0x4d5b},
- { 13100000, 11289600, 0x363b},
- { 2048000, 16384000, 0x1ea0},
- { 3686400, 16384000, 0x9e27},
- { 12000000, 16384000, 0x452b},
- { 13000000, 16384000, 0x542f},
- { 13100000, 16384000, 0x03a0},
- { 2048000, 16934400, 0xe625},
- { 3686400, 16934400, 0x9126},
- { 12000000, 16934400, 0x4d2c},
- { 13000000, 16934400, 0x742f},
- { 13100000, 16934400, 0x3c27},
- { 2048000, 22579200, 0x2aa0},
- { 3686400, 22579200, 0x2f20},
- { 12000000, 22579200, 0x7e2f},
- { 13000000, 22579200, 0x742f},
- { 13100000, 22579200, 0x3c27},
- { 2048000, 24576000, 0x2ea0},
- { 3686400, 24576000, 0xee27},
- { 11289600, 24576000, 0x950F},
- { 12000000, 24576000, 0x2915},
- { 12288000, 24576000, 0x0600},
- { 13000000, 24576000, 0x772e},
- { 13100000, 24576000, 0x0d20},
- { 26000000, 24576000, 0x2027},
- { 26000000, 22579200, 0x392f},
- { 24576000, 22579200, 0x0921},
- { 24576000, 24576000, 0x02a0},
+ { 2048000, 8192000, 0x0ea0},
+ { 3686400, 8192000, 0x4e27},
+ { 12000000, 8192000, 0x456b},
+ { 13000000, 8192000, 0x495f},
+ { 13100000, 8192000, 0x0320},
+ { 2048000, 11289600, 0xf637},
+ { 3686400, 11289600, 0x2f22},
+ { 12000000, 11289600, 0x3e2f},
+ { 13000000, 11289600, 0x4d5b},
+ { 13100000, 11289600, 0x363b},
+ { 2048000, 16384000, 0x1ea0},
+ { 3686400, 16384000, 0x9e27},
+ { 12000000, 16384000, 0x452b},
+ { 13000000, 16384000, 0x542f},
+ { 13100000, 16384000, 0x03a0},
+ { 2048000, 16934400, 0xe625},
+ { 3686400, 16934400, 0x9126},
+ { 12000000, 16934400, 0x4d2c},
+ { 13000000, 16934400, 0x742f},
+ { 13100000, 16934400, 0x3c27},
+ { 2048000, 22579200, 0x2aa0},
+ { 3686400, 22579200, 0x2f20},
+ { 12000000, 22579200, 0x7e2f},
+ { 13000000, 22579200, 0x742f},
+ { 13100000, 22579200, 0x3c27},
+ { 2048000, 24576000, 0x2ea0},
+ { 3686400, 24576000, 0xee27},
+ { 11289600, 24576000, 0x950F},
+ { 12000000, 24576000, 0x2915},
+ { 12288000, 24576000, 0x0600},
+ { 13000000, 24576000, 0x772e},
+ { 13100000, 24576000, 0x0d20},
+ { 26000000, 24576000, 0x2027},
+ { 26000000, 22579200, 0x392f},
+ { 24576000, 22579200, 0x0921},
+ { 24576000, 24576000, 0x02a0},
};
static const struct _pll_div codec_bclk_pll1_div[] = {
-
- { 256000, 4096000, 0x3ea0},
- { 352800, 5644800, 0x3ea0},
- { 512000, 8192000, 0x3ea0},
- { 705600, 11289600, 0x3ea0},
- { 1024000, 16384000, 0x3ea0},
- { 1411200, 22579200, 0x3ea0},
- { 1536000, 24576000, 0x3ea0},
- { 2048000, 16384000, 0x1ea0},
- { 2822400, 22579200, 0x1ea0},
- { 3072000, 24576000, 0x1ea0},
- { 705600, 11289600, 0x3ea0},
- { 705600, 8467200, 0x3ab0},
- { 2822400, 11289600, 0x1ee0},
- { 3072000, 12288000, 0x1ee0},
+ { 256000, 4096000, 0x3ea0},
+ { 352800, 5644800, 0x3ea0},
+ { 512000, 8192000, 0x3ea0},
+ { 705600, 11289600, 0x3ea0},
+ { 1024000, 16384000, 0x3ea0},
+ { 1411200, 22579200, 0x3ea0},
+ { 1536000, 24576000, 0x3ea0},
+ { 2048000, 16384000, 0x1ea0},
+ { 2822400, 22579200, 0x1ea0},
+ { 3072000, 24576000, 0x1ea0},
+ { 705600, 11289600, 0x3ea0},
+ { 705600, 8467200, 0x3ab0},
+ { 2822400, 11289600, 0x1ee0},
+ { 3072000, 12288000, 0x1ee0},
};
static const struct _pll_div codec_vbclk_pll1_div[] = {
-
- { 256000, 4096000, 0x3ea0},
- { 352800, 5644800, 0x3ea0},
- { 512000, 8192000, 0x3ea0},
- { 705600, 11289600, 0x3ea0},
- { 1024000, 16384000, 0x3ea0},
- { 1411200, 22579200, 0x3ea0},
- { 1536000, 24576000, 0x3ea0},
- { 2048000, 16384000, 0x1ea0},
- { 2822400, 22579200, 0x1ea0},
- { 3072000, 24576000, 0x1ea0},
- { 705600, 11289600, 0x3ea0},
- { 705600, 8467200, 0x3ab0},
+ { 256000, 4096000, 0x3ea0},
+ { 352800, 5644800, 0x3ea0},
+ { 512000, 8192000, 0x3ea0},
+ { 705600, 11289600, 0x3ea0},
+ { 1024000, 16384000, 0x3ea0},
+ { 1411200, 22579200, 0x3ea0},
+ { 1536000, 24576000, 0x3ea0},
+ { 2048000, 16384000, 0x1ea0},
+ { 2822400, 22579200, 0x1ea0},
+ { 3072000, 24576000, 0x1ea0},
+ { 705600, 11289600, 0x3ea0},
+ { 705600, 8467200, 0x3ab0},
};
-
struct _coeff_div_stereo {
unsigned int mclk;
unsigned int rate;
unsigned int reg64;
};
+/* bclk is config to 32fs, if codec is choose to be slave mode,
+input bclk should be 32*fs */
static const struct _coeff_div_stereo coeff_div_stereo[] = {
-
- /*bclk is config to 32fs, if codec is choose to be slave mode , input bclk should be 32*fs */
- {24576000, 48000, 0x3174, 0x1010},
- {12288000, 48000, 0x1174, 0x0000},
- {18432000, 48000, 0x2174, 0x1111},
- {36864000, 48000, 0x2274, 0x2020},
- {49152000, 48000, 0xf074, 0x3030},
- {24576000, 48000, 0x3172, 0x1010},
- {24576000, 8000, 0xB274, 0x2424},
- {24576000, 16000, 0xB174, 0x2222},
- {24576000, 32000, 0xB074, 0x2121},
- {22579200, 11025, 0X3374, 0x1414},
- {22579200, 22050, 0X3274, 0x1212},
- {22579200, 44100, 0X3174, 0x1010},
- {0, 0, 0, 0},
+ {24576000, 48000, 0x3174, 0x1010},
+ {12288000, 48000, 0x1174, 0x0000},
+ {18432000, 48000, 0x2174, 0x1111},
+ {36864000, 48000, 0x2274, 0x2020},
+ {49152000, 48000, 0xf074, 0x3030},
+ {24576000, 48000, 0x3172, 0x1010},
+ {24576000, 8000, 0xB274, 0x2424},
+ {24576000, 16000, 0xB174, 0x2222},
+ {24576000, 32000, 0xB074, 0x2121},
+ {22579200, 11025, 0X3374, 0x1414},
+ {22579200, 22050, 0X3274, 0x1212},
+ {22579200, 44100, 0X3174, 0x1010},
+ {12288000, 8000, 0xB174, 0x2222},
+ {11289600, 44100, 0X3072, 0x0000},
};
+/* bclk is config to 32fs, if codec is choose to be slave mode,
+input bclk should be 32*fs */
static const struct _coeff_div_voice coeff_div_voice[] = {
-
- /*bclk is config to 32fs, if codec is choose to be slave mode , input bclk should be 32*fs */
- {24576000, 16000, 0x2622},
- {24576000, 8000, 0x2824},
- {0, 0, 0},
+ {24576000, 16000, 0x2622},
+ {24576000, 8000, 0x2824},
+ {2048000,8000,0x3000},
};
static int get_coeff(unsigned int mclk, unsigned int rate, int mode)
{
int i;
- DBG("get_coeff mclk = %d, rate = %d, mode = %d\n", mclk, rate, mode);
+ pr_info("mclk = %d, rate = %d, mode = %d\n", mclk, rate, mode);
- if (!mode) {
+ if (!mode)
for (i = 0; i < ARRAY_SIZE(coeff_div_stereo); i++) {
- if ((coeff_div_stereo[i].rate == rate) && (coeff_div_stereo[i].mclk == mclk))
+ if ((coeff_div_stereo[i].rate == rate) &&
+ (coeff_div_stereo[i].mclk == mclk))
return i;
}
- } else {
+ else
for (i = 0; i< ARRAY_SIZE(coeff_div_voice); i++) {
- if ((coeff_div_voice[i].rate == rate) && (coeff_div_voice[i].mclk == mclk))
+ if ((coeff_div_voice[i].rate == rate) &&
+ (coeff_div_voice[i].mclk == mclk))
return i;
}
- }
- printk("can't find a matched mclk and rate in %s\n",
+ pr_err("can't find a matched mclk and rate in %s\n",
(mode ? "coeff_div_voice[]" : "coeff_div_audio[]"));
return -EINVAL;
}
-static int rt5625_codec_set_dai_pll(struct snd_soc_dai *codec_dai,
- int pll_id, unsigned int freq_in, unsigned int freq_out)
+static int rt5625_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
+ unsigned int freq_in, unsigned int freq_out)
{
- int i;
- int ret = -EINVAL;
- struct snd_soc_codec *codec = codec_dai->codec;
-
- DBG("enter %s pll_id = %d freq_in = %d freq_out = %d\n",
- __func__, pll_id, freq_in, freq_out);
+ struct snd_soc_codec *codec = dai->codec;
+ int i, ret = -EINVAL;
- if (pll_id < RT5625_PLL1_FROM_MCLK || pll_id > RT5625_PLL1_FROM_VBCLK)
+ if (pll_id < RT5625_PLL_MCLK || pll_id > RT5625_PLL_VBCLK)
return -EINVAL;
- if (!freq_in || !freq_out)
+ if (!freq_in || !freq_out) {
+ dev_info(dai->dev, "PLL is closed\n");
+ snd_soc_update_bits(codec, RT5625_GEN_CTRL1,
+ RT5625_SCLK_MASK, RT5625_SCLK_MCLK);
return 0;
+ }
- if (RT5625_PLL1_FROM_MCLK == pll_id) {
-
+ if (RT5625_PLL_MCLK == pll_id) {
+ for (i = 0; i < ARRAY_SIZE(codec_master_pll1_div); i ++)
+ if ((freq_in == codec_master_pll1_div[i].pll_in) &&
+ (freq_out == codec_master_pll1_div[i].pll_out)) {
+ snd_soc_write(codec, RT5625_GEN_CTRL2,
+ RT5625_PLL1_S_MCLK);
+ snd_soc_write(codec, RT5625_PLL_CTRL,
+ codec_master_pll1_div[i].regvalue);
+ snd_soc_update_bits(codec, RT5625_GEN_CTRL1,
+ RT5625_SCLK_MASK, RT5625_SCLK_PLL1);
+ ret = 0;
+ break;
+ }
+ } else if (RT5625_PLL_MCLK_TO_VSYSCLK == pll_id) {
for (i = 0; i < ARRAY_SIZE(codec_master_pll1_div); i ++)
{
if ((freq_in == codec_master_pll1_div[i].pll_in) && (freq_out == codec_master_pll1_div[i].pll_out))
{
- rt5625_write(codec, RT5625_GEN_CTRL_REG2, 0x0000); /*PLL source from MCLK*/
- rt5625_write(codec, RT5625_PLL_CTRL, codec_master_pll1_div[i].regvalue); /*set pll code*/
- rt5625_write_mask(codec, RT5625_PWR_MANAG_ADD2, 0x8000, 0x8000); /*enable pll1 power*/
- rt5625_write_mask(codec, RT5625_GEN_CTRL_REG1, 0x8000, 0x8000);
+ snd_soc_write(codec, RT5625_GEN_CTRL2, 0x0000); /*PLL source from MCLK*/
+ snd_soc_write(codec, RT5625_PLL_CTRL, codec_master_pll1_div[i].regvalue); /*set pll code*/
+ snd_soc_update_bits(codec, RT5625_GEN_CTRL1, 0x0030, 0x0030); /* Voice SYSCLK source from FLL1 */
ret = 0;
}
}
- } else if (RT5625_PLL1_FROM_BCLK == pll_id) {
-
+ }else if (RT5625_PLL_BCLK == pll_id) {
for (i = 0; i < ARRAY_SIZE(codec_bclk_pll1_div); i ++)
- {
- if ((freq_in == codec_bclk_pll1_div[i].pll_in) && (freq_out == codec_bclk_pll1_div[i].pll_out))
- {
- rt5625_write(codec, RT5625_GEN_CTRL_REG2, 0x2000); /*PLL source from BCLK*/
- rt5625_write(codec, RT5625_PLL_CTRL, codec_bclk_pll1_div[i].regvalue); /*set pll1 code*/
- rt5625_write_mask(codec, RT5625_PWR_MANAG_ADD2, 0x8000, 0x8000); /*enable pll1 power*/
- rt5625_write_mask(codec, RT5625_GEN_CTRL_REG1, 0x8000, 0x8000);
+ if ((freq_in == codec_bclk_pll1_div[i].pll_in) &&
+ (freq_out == codec_bclk_pll1_div[i].pll_out)) {
+ snd_soc_write(codec, RT5625_GEN_CTRL2,
+ RT5625_PLL1_S_BCLK);
+ snd_soc_write(codec, RT5625_PLL_CTRL,
+ codec_bclk_pll1_div[i].regvalue);
+ snd_soc_update_bits(codec, RT5625_GEN_CTRL1,
+ RT5625_SCLK_MASK, RT5625_SCLK_PLL1);
ret = 0;
+ break;
}
- }
- } else if (RT5625_PLL1_FROM_VBCLK == pll_id) {
-
+ } else if (RT5625_PLL_VBCLK == pll_id) {
for (i = 0; i < ARRAY_SIZE(codec_vbclk_pll1_div); i ++)
- {
- if ((freq_in == codec_vbclk_pll1_div[i].pll_in) && (freq_out == codec_vbclk_pll1_div[i].pll_out))
- {
- rt5625_write(codec, RT5625_GEN_CTRL_REG2, 0x3000); /*PLL source from VBCLK*/
- rt5625_write(codec, RT5625_PLL_CTRL, codec_vbclk_pll1_div[i].regvalue); /*set pll1 code*/
- rt5625_write_mask(codec, RT5625_PWR_MANAG_ADD2, 0x8000, 0x8000); /*enable pll1 power*/
- rt5625_write_mask(codec, RT5625_GEN_CTRL_REG1, 0x8000, 0x8000);
+ if ((freq_in == codec_vbclk_pll1_div[i].pll_in) &&
+ (freq_out == codec_vbclk_pll1_div[i].pll_out)) {
+ snd_soc_write(codec, RT5625_GEN_CTRL2,
+ RT5625_PLL1_S_VBCLK);
+ snd_soc_write(codec, RT5625_PLL_CTRL,
+ codec_vbclk_pll1_div[i].regvalue);
+ snd_soc_update_bits(codec, RT5625_GEN_CTRL1,
+ RT5625_SCLK_MASK, RT5625_SCLK_PLL1);
ret = 0;
+ break;
}
- }
}
- return 0;
+
+ return ret;
}
-static int rt5625_hifi_codec_set_dai_sysclk(struct snd_soc_dai *codec_dai,
+static int rt5625_set_dai_sysclk(struct snd_soc_dai *dai,
int clk_id, unsigned int freq, int dir)
{
- struct snd_soc_codec *codec = codec_dai->codec;
- struct rt5625_priv * rt5625 = codec->private_data;
+ struct snd_soc_codec *codec = dai->codec;
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ unsigned int val = 0;
- DBG("sysclk freq %u for audio i2s\n", freq);
-
- if ((freq >= (256 * 8000)) && (freq <= (512 * 48000))) {
+ switch (dai->id) {
+ case RT5625_AIF1:
+ if (freq == rt5625->stereo_sysclk)
+ return 0;
rt5625->stereo_sysclk = freq;
- return 0;
+ break;
+
+ case RT5625_AIF2:
+ if (freq == rt5625->voice_sysclk)
+ return 0;
+ rt5625->voice_sysclk = freq;
+ break;
+
+ default:
+ return -EINVAL;
}
-
- printk("unsupported sysclk freq %u for audio i2s\n", freq);
- rt5625->stereo_sysclk=24576000;
-
- return 0;
-}
-static int rt5625_voice_codec_set_dai_sysclk(struct snd_soc_dai *codec_dai,
- int clk_id, unsigned int freq, int dir)
-{
- struct snd_soc_codec *codec = codec_dai->codec;
- struct rt5625_priv * rt5625 = codec->private_data;
+ switch (clk_id) {
+ case RT5625_SCLK_S_MCLK:
+ break;
- DBG("sysclk freq %u for voice pcm\n", freq);
+ case RT5625_SCLK_S_PLL:
+ val |= RT5625_SCLK_PLL1;
+ break;
- if ((freq >= (256 * 8000)) && (freq <= (512 * 48000))) {
- rt5625->voice_sysclk = freq;
- return 0;
- }
+ default:
+ dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
+ return -EINVAL;
+ }
+ snd_soc_update_bits(codec, RT5625_GEN_CTRL1,
+ RT5625_SCLK_MASK, val);
- printk("unsupported sysclk freq %u for voice pcm\n", freq);
- rt5625->voice_sysclk = 24576000;
+ dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
return 0;
}
-
-static int rt5625_hifi_pcm_hw_params(struct snd_pcm_substream *substream,
+static int rt5625_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->card->codec;
- struct rt5625_priv *rt5625 = codec->private_data;
+ struct snd_soc_codec *codec = rtd->codec;
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ unsigned int iface = 0, rate = params_rate(params), coeff;
- unsigned int iface = rt5625_read(codec, RT5625_MAIN_SDP_CTRL) & 0xfff3;
- int rate = params_rate(params);
- int coeff = get_coeff(rt5625->stereo_sysclk, rate, 0);
-
- DBG("enter %s rate = %d \n", __func__, rate);
+ switch (params_format(params)) {
+ case SNDRV_PCM_FORMAT_S16_LE:
+ break;
- switch (params_format(params))
- {
- case SNDRV_PCM_FORMAT_S16_LE:
- break;
- case SNDRV_PCM_FORMAT_S20_3LE:
- iface |= 0x0004;
- case SNDRV_PCM_FORMAT_S24_LE:
- iface |= 0x0008;
- case SNDRV_PCM_FORMAT_S8:
- iface |= 0x000c;
- }
-
- rt5625_write(codec, RT5625_MAIN_SDP_CTRL, iface);
- rt5625_write_mask(codec, 0x3a, 0xc801, 0xc801); /*power i2s and dac ref*/
- if (coeff >= 0) {
- rt5625_write(codec, RT5625_STEREO_DAC_CLK_CTRL1, coeff_div_stereo[coeff].reg60);
- rt5625_write(codec, RT5625_STEREO_DAC_CLK_CTRL2, coeff_div_stereo[coeff].reg62);
+ case SNDRV_PCM_FORMAT_S20_3LE:
+ iface |= RT5625_I2S_DL_20;
+ break;
+
+ case SNDRV_PCM_FORMAT_S24_LE:
+ iface |= RT5625_I2S_DL_24;
+ break;
+
+ case SNDRV_PCM_FORMAT_S8:
+ iface |= RT5625_I2S_DL_8;
+ break;
+
+ default:
+ return -EINVAL;
}
-
- return 0;
-}
-static int rt5625_voice_pcm_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params,
- struct snd_soc_dai *dai)
-{
- struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->card->codec;
- struct rt5625_priv *rt5625 = codec->private_data;
- struct snd_soc_dapm_widget *w;
- unsigned int iface = rt5625_read(codec, RT5625_EXTEND_SDP_CTRL) & 0xfff3;
- int rate = params_rate(params);
- int coeff = get_coeff(rt5625->voice_sysclk, rate, 1);
+ switch (dai->id) {
+ case RT5625_AIF1:
+ coeff = get_coeff(rt5625->stereo_sysclk, rate, 0);
+ if (coeff < 0) {
+ dev_err(codec->dev, "Unsupported clock setting\n");
+ return -EINVAL;
+ }
+ snd_soc_write(codec, RT5625_DAC_CLK_CTRL1,
+ coeff_div_stereo[coeff].reg60);
+ snd_soc_write(codec, RT5625_DAC_CLK_CTRL2,
+ coeff_div_stereo[coeff].reg62);
+ snd_soc_update_bits(codec, RT5625_SDP_CTRL,
+ RT5625_I2S_DL_MASK, iface);
+ break;
- DBG("enter %s rate = %d \n", __func__, rate);
+ case RT5625_AIF2:
+ rate = 8000;
+ coeff = get_coeff(rt5625->voice_sysclk, rate, 1);
+ if (coeff < 0) {
+ dev_err(codec->dev, "Unsupported clock setting\n");
+ return -EINVAL;
+ }
+ snd_soc_write(codec, RT5625_VDAC_CLK_CTRL1,
+ coeff_div_voice[coeff].reg64);
+ iface |= 0x0100; //Voice SYSCLK source from FLL1
+ snd_soc_update_bits(codec, RT5625_EXT_SDP_CTRL,
+ RT5625_I2S_DL_MASK, iface);
+ break;
- list_for_each_entry(w, &codec->dapm_widgets, list)
- {
- if (!w->sname)
- continue;
- if (!strcmp(w->name, "Right ADC"))
- strcpy(w->sname, "Right ADC Voice Capture");
+ default:
+ return -EINVAL;
}
-
- switch (params_format(params))
- {
- case SNDRV_PCM_FORMAT_S16_LE:
- break;
- case SNDRV_PCM_FORMAT_S20_3LE:
- iface |= 0x0004;
- case SNDRV_PCM_FORMAT_S24_LE:
- iface |= 0x0008;
- case SNDRV_PCM_FORMAT_S8:
- iface |= 0x000c;
- }
- rt5625_write_mask(codec, 0x3a, 0x0801, 0x0801); /*power i2s and dac ref*/
- rt5625_write(codec, RT5625_EXTEND_SDP_CTRL, iface);
- if (coeff >= 0)
- rt5625_write(codec, RT5625_VOICE_DAC_PCMCLK_CTRL1, coeff_div_voice[coeff].reg64);
+
+#ifdef RT5625_F_SMT_PHO
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ rt5625->app_bmp |= RT5625_PLY_MASK;
+ else
+ rt5625->app_bmp |= RT5625_REC_MASK;
+#endif
return 0;
}
-
-static int rt5625_hifi_codec_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
+static int rt5625_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{
+ struct snd_soc_codec *codec = dai->codec;
+ unsigned int iface = 0;
+ bool slave;
- struct snd_soc_codec *codec = codec_dai->codec;
- u16 iface = 0;
+ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+ case SND_SOC_DAIFMT_CBM_CFM:
+ slave = false;
+ break;
- DBG("enter %s fmt = %d\n", __func__, fmt);
+ case SND_SOC_DAIFMT_CBS_CFS:
+ slave = true;
+ break;
- /*set master/slave interface*/
- switch (fmt & SND_SOC_DAIFMT_MASTER_MASK)
- {
- case SND_SOC_DAIFMT_CBM_CFM:
- iface = 0x0000;
- break;
- case SND_SOC_DAIFMT_CBS_CFS:
- iface = 0x8000;
- break;
- default:
- return -EINVAL;
+ default:
+ return -EINVAL;
}
- /*interface format*/
- switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK)
- {
- case SND_SOC_DAIFMT_I2S:
- iface |= 0x0000;
- break;
- case SND_SOC_DAIFMT_LEFT_J:
- iface |= 0x0001;
- break;
- case SND_SOC_DAIFMT_DSP_A:
- iface |= 0x0002;
- break;
- case SND_SOC_DAIFMT_DSP_B:
- iface |= 0x0003;
- break;
- default:
- return -EINVAL;
- }
-
- /*clock inversion*/
- switch (fmt & SND_SOC_DAIFMT_INV_MASK)
- {
- case SND_SOC_DAIFMT_NB_NF:
- iface |= 0x0000;
- break;
- case SND_SOC_DAIFMT_IB_NF:
- iface |= 0x0080;
- break;
- default:
- return -EINVAL;
- }
+ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+ case SND_SOC_DAIFMT_I2S:
+ break;
- rt5625_write(codec, RT5625_MAIN_SDP_CTRL, iface);
- return 0;
-}
+ case SND_SOC_DAIFMT_LEFT_J:
+ iface |= RT5625_I2S_DF_LEFT;
+ break;
-static int rt5625_voice_codec_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
-{
- struct snd_soc_codec *codec = codec_dai->codec;
- int iface;
+ case SND_SOC_DAIFMT_DSP_A:
+ iface |= RT5625_I2S_DF_PCM_A;
+ break;
- DBG("enter %s\n", __func__);
- /*set slave/master mode*/
- switch (fmt & SND_SOC_DAIFMT_MASTER_MASK)
- {
- case SND_SOC_DAIFMT_CBM_CFM:
- iface = 0x0000;
- break;
- case SND_SOC_DAIFMT_CBS_CFS:
- iface = 0x4000;
- break;
- default:
- return -EINVAL;
- }
+ case SND_SOC_DAIFMT_DSP_B:
+ iface |= RT5625_I2S_DF_PCM_B;
+ break;
- switch(fmt & SND_SOC_DAIFMT_FORMAT_MASK)
- {
- case SND_SOC_DAIFMT_I2S:
- iface |= 0x0000;
- break;
- case SND_SOC_DAIFMT_LEFT_J:
- iface |= 0x0001;
- break;
- case SND_SOC_DAIFMT_DSP_A:
- iface |= 0x0002;
- break;
- case SND_SOC_DAIFMT_DSP_B:
- iface |= 0x0003;
- break;
- default:
- return -EINVAL;
- }
-
- /*clock inversion*/
- switch (fmt & SND_SOC_DAIFMT_INV_MASK)
- {
- case SND_SOC_DAIFMT_NB_NF:
- iface |= 0x0000;
- break;
- case SND_SOC_DAIFMT_IB_NF:
- iface |= 0x0080;
- break;
- default:
- return -EINVAL;
+ default:
+ return -EINVAL;
}
- iface |= 0x8000; /*enable vopcm*/
- rt5625_write(codec, RT5625_EXTEND_SDP_CTRL, iface);
- return 0;
-}
+ switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
+ case SND_SOC_DAIFMT_NB_NF:
+ break;
+ case SND_SOC_DAIFMT_IB_NF:
+ iface |= RT5625_I2S_BP_INV;
+ break;
-static int rt5625_hifi_codec_mute(struct snd_soc_dai *dai, int mute)
-{
- struct snd_soc_codec *codec = dai->codec;
+ default:
+ return -EINVAL;
+ }
+ iface |= 0x8000; /*enable vopcm*/
+
+ switch (dai->id) {
+ case RT5625_AIF1:
+ if (slave)
+ iface |= RT5625_I2S_M_SLV;
+ snd_soc_update_bits(codec, RT5625_SDP_CTRL,
+ RT5625_I2S_M_MASK | RT5625_I2S_BP_MASK |
+ RT5625_I2S_DF_MASK, iface);
+ break;
- if (mute)
- rt5625_write_mask(codec, RT5625_STEREO_DAC_VOL, 0x8080, 0x8080);
- else
- rt5625_write_mask(codec, RT5625_STEREO_DAC_VOL, 0x0000, 0x8080);
+ case RT5625_AIF2:
+ if (slave)
+ iface |= RT5625_PCM_M_SLV;
+ snd_soc_update_bits(codec, RT5625_EXT_SDP_CTRL,
+ RT5625_PCM_M_MASK | RT5625_I2S_BP_MASK |
+ RT5625_I2S_DF_MASK, iface);
+ break;
+
+ default:
+ return -EINVAL;
+ }
return 0;
}
-static int rt5625_voice_codec_mute(struct snd_soc_dai *dai, int mute)
+#ifdef RT5625_F_SMT_PHO
+static int rt5625_trigger(struct snd_pcm_substream *substream,
+ int cmd, struct snd_soc_dai *dai)
{
- struct snd_soc_codec *codec = dai->codec;
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct snd_soc_codec *codec = rtd->codec;
+ struct rt5625_priv *rt5625 = snd_soc_codec_get_drvdata(codec);
+ int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
- if (mute)
- rt5625_write_mask(codec, RT5625_VOICE_DAC_OUT_VOL, 0x1000, 0x1000);
- else
- rt5625_write_mask(codec, RT5625_VOICE_DAC_OUT_VOL, 0x0000, 0x1000);
- return 0;
-}
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_START:
+ case SNDRV_PCM_TRIGGER_RESUME:
+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+ if (capture)
+ rt5625->app_bmp |= RT5625_REC_MASK;
+ else
+ rt5625->app_bmp |= RT5625_PLY_MASK;
+ break;
+ case SNDRV_PCM_TRIGGER_STOP:
+ case SNDRV_PCM_TRIGGER_SUSPEND:
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+ if (capture)
+ rt5625->app_bmp &= ~RT5625_REC_MASK;
+ else
+ rt5625->app_bmp &= ~RT5625_PLY_MASK;
+ rt5625->app_bmp &= ~RT5625_VOIP_MASK;
+ break;
+
+ default:
+ break;
+ }
+
+ return 0;
+}
+#endif
static int rt5625_set_bias_level(struct snd_soc_codec *codec,
enum snd_soc_bias_level level)
{
switch(level) {
case SND_SOC_BIAS_ON:
+#ifdef RT5625_DEMO
+ snd_soc_update_bits(codec, RT5625_HP_OUT_VOL,
+ RT5625_L_MUTE | RT5625_R_MUTE, 0);
+ snd_soc_update_bits(codec, RT5625_SPK_OUT_VOL,
+ RT5625_L_MUTE | RT5625_R_MUTE, 0);
+#endif
break;
+
case SND_SOC_BIAS_PREPARE:
- rt5625_write(codec, 0x26, 0x0000);
- rt5625_write_mask(codec, 0x3c, 0x2000, 0x2000);
- rt5625_write_mask(codec, 0x3a, 0x000e, 0x000e);
+ snd_soc_write(codec, RT5625_PD_CTRL, 0x0000);
+ snd_soc_update_bits(codec, RT5625_PWR_ADD1,
+ RT5625_P_MB1 | RT5625_P_MB2,
+ RT5625_P_MB1 | RT5625_P_MB2);
break;
+
case SND_SOC_BIAS_STANDBY:
+#ifdef RT5625_DEMO
+ snd_soc_update_bits(codec, RT5625_HP_OUT_VOL,
+ RT5625_L_MUTE | RT5625_R_MUTE,
+ RT5625_L_MUTE | RT5625_R_MUTE);
+ snd_soc_update_bits(codec, RT5625_SPK_OUT_VOL,
+ RT5625_L_MUTE | RT5625_R_MUTE,
+ RT5625_L_MUTE | RT5625_R_MUTE);
+ snd_soc_update_bits(codec, RT5625_PWR_ADD1,
+ RT5625_P_MB1 | RT5625_P_MB2, 0);
+#endif
+ if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
+ snd_soc_write(codec, RT5625_PD_CTRL, 0);
+ snd_soc_write(codec, RT5625_PWR_ADD1,
+ RT5625_P_MAIN_BIAS);
+ snd_soc_write(codec, RT5625_PWR_ADD2, RT5625_P_VREF);
+ codec->cache_only = false;
+ snd_soc_cache_sync(codec);
+ }
break;
+
case SND_SOC_BIAS_OFF:
- rt5625_write_mask(codec, 0x04, 0x8080, 0x8080); /*mute hp*/
- rt5625_write_mask(codec, 0x02, 0x8080, 0x8080); /*mute spk*/
- rt5625_write(codec, 0x3e, 0x0000); //power off all bit
- rt5625_write(codec, 0x3a, 0x0000); //power off all bit
- rt5625_write(codec, 0x3c, 0x0000); //power off all bit
+#ifdef RT5625_DEMO
+ snd_soc_update_bits(codec, RT5625_HP_OUT_VOL,
+ RT5625_L_MUTE | RT5625_R_MUTE,
+ RT5625_L_MUTE | RT5625_R_MUTE);
+ snd_soc_update_bits(codec, RT5625_SPK_OUT_VOL,
+ RT5625_L_MUTE | RT5625_R_MUTE,
+ RT5625_L_MUTE | RT5625_R_MUTE);
+#endif
+ snd_soc_write(codec, RT5625_PWR_ADD1, 0x0000);
+ snd_soc_write(codec, RT5625_PWR_ADD2, 0x0000);
+ snd_soc_write(codec, RT5625_PWR_ADD3, 0x0000);
break;
}
- codec->bias_level = level;
+ codec->dapm.bias_level = level;
+
+ return 0;
+}
+
+#ifdef RT5625_PROC
+static int rt5625_proc_init(void);
+#endif
+
+static int rt5625_probe(struct snd_soc_codec *codec)
+{
+ int ret;
+
+ ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
+ if (ret != 0) {
+ dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
+ return ret;
+ }
+
+ #ifdef RT5625_PROC
+ rt5625_proc_init();
+ #endif
+
+ rt5625_reset(codec);
+ snd_soc_write(codec, RT5625_PD_CTRL, 0);
+ snd_soc_write(codec, RT5625_PWR_ADD1, RT5625_P_MAIN_BIAS);
+ snd_soc_write(codec, RT5625_PWR_ADD2, RT5625_P_VREF);
+#ifdef RT5625_DEMO
+ rt5625_reg_init(codec);
+#endif
+ codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
+ rt5625_codec = codec;
return 0;
}
+static int rt5625_remove(struct snd_soc_codec *codec)
+{
+ rt5625_set_bias_level(codec, SND_SOC_BIAS_OFF);
+ return 0;
+}
-#define RT5625_STEREO_RATES SNDRV_PCM_RATE_8000_48000
+#ifdef CONFIG_PM
+static int rt5625_suspend(struct snd_soc_codec *codec, pm_message_t state)
+{
+ rt5625_set_bias_level(codec, SND_SOC_BIAS_OFF);
+ return 0;
+}
-#define RT5626_VOICE_RATES SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_8000
+static int rt5625_resume(struct snd_soc_codec *codec)
+{
+ rt5625_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
+ return 0;
+}
+#else
+#define rt5625_suspend NULL
+#define rt5625_resume NULL
+#endif
+#define RT5625_STEREO_RATES SNDRV_PCM_RATE_8000_48000
+#define RT5625_VOICE_RATES SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_8000
#define RT5625_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
SNDRV_PCM_FMTBIT_S20_3LE |\
SNDRV_PCM_FMTBIT_S24_LE |\
SNDRV_PCM_FMTBIT_S8)
-static struct snd_soc_dai_ops rt5625_dai_ops_hifi = {
-
- .hw_params = rt5625_hifi_pcm_hw_params,
-// .digital_mute = rt5625_hifi_codec_mute,
- .set_fmt = rt5625_hifi_codec_set_dai_fmt,
- .set_pll = rt5625_codec_set_dai_pll,
- .set_sysclk = rt5625_hifi_codec_set_dai_sysclk,
-
-};
-
-
-static struct snd_soc_dai_ops rt5625_dai_ops_voice = {
-
- .hw_params = rt5625_voice_pcm_hw_params,
-// .digital_mute = rt5625_voice_codec_mute,
- .set_fmt = rt5625_voice_codec_set_dai_fmt,
- .set_pll = rt5625_codec_set_dai_pll,
- .set_sysclk = rt5625_voice_codec_set_dai_sysclk,
-
+struct snd_soc_dai_ops rt5625_aif_dai_ops = {
+#ifdef RT5625_F_SMT_PHO
+ .trigger = rt5625_trigger,
+#endif
+ .hw_params = rt5625_hw_params,
+ .set_fmt = rt5625_set_dai_fmt,
+ .set_sysclk = rt5625_set_dai_sysclk,
+ .set_pll = rt5625_set_dai_pll,
};
-
-
-struct snd_soc_dai rt5625_dai[] = {
- /*hifi codec dai*/
+struct snd_soc_dai_driver rt5625_dai[] = {
{
- .name = "RT5625 HiFi",
- .id = 1,
+ .name = "rt5625-aif1",
+ .id = RT5625_AIF1,
.playback = {
.stream_name = "HiFi Playback",
.channels_min = 1,
.rates = RT5625_STEREO_RATES,
.formats = RT5625_FORMATS,
},
-
- .ops = &rt5625_dai_ops_hifi,
+ .ops = &rt5625_aif_dai_ops,
},
-
- /*voice codec dai*/
{
- .name = "RT5625 Voice",
- .id = 2,
+ .name = "rt5625-aif2",
+ .id = RT5625_AIF2,
.playback = {
.stream_name = "Voice Playback",
.channels_min = 1,
- .channels_max = 1,
- .rates = RT5626_VOICE_RATES,
+ .channels_max = 2,
+ .rates = RT5625_VOICE_RATES,
.formats = RT5625_FORMATS,
},
.capture = {
.stream_name = "Voice Capture",
.channels_min = 1,
- .channels_max = 1,
- .rates = RT5626_VOICE_RATES,
+ .channels_max = 2,
+ .rates = RT5625_VOICE_RATES,
.formats = RT5625_FORMATS,
},
-
- .ops = &rt5625_dai_ops_voice,
-
+ .ops = &rt5625_aif_dai_ops,
},
};
-EXPORT_SYMBOL_GPL(rt5625_dai);
-
-
-static void rt5625_work(struct work_struct *work)
-{
- struct snd_soc_codec *codec =
- container_of(work, struct snd_soc_codec, delayed_work.work);
- rt5625_set_bias_level(codec, codec->bias_level);
-}
-
-
-#if defined(CONFIG_SND_HWDEP)
-
-#if REALTEK_HWDEP
-
-#define RT_CE_CODEC_HWDEP_NAME "rt56xx hwdep "
-
-
-static int rt56xx_hwdep_open(struct snd_hwdep *hw, struct file *file)
-{
- DBG("enter %s\n", __func__);
- return 0;
-}
-
-static int rt56xx_hwdep_release(struct snd_hwdep *hw, struct file *file)
-{
- DBG("enter %s\n", __func__);
- return 0;
-}
-
-
-static int rt56xx_hwdep_ioctl_common(struct snd_hwdep *hw, struct file *file, unsigned int cmd, unsigned long arg)
-{
- struct rt56xx_cmd rt56xx;
- struct rt56xx_cmd __user *_rt56xx = arg;
- struct rt56xx_reg_state *buf;
- struct rt56xx_reg_state *p;
- struct snd_soc_codec *codec = hw->private_data;
-
- if (copy_from_user(&rt56xx, _rt56xx, sizeof(rt56xx)))
- return -EFAULT;
- buf = kmalloc(sizeof(*buf) * rt56xx.number, GFP_KERNEL);
- if (buf == NULL)
- return -ENOMEM;
- if (copy_from_user(buf, rt56xx.buf, sizeof(*buf) * rt56xx.number)) {
- goto err;
- }
- switch (cmd) {
- case RT_READ_CODEC_REG_IOCTL:
- for (p = buf; p < buf + rt56xx.number; p++)
- {
- p->reg_value = codec->read(codec, p->reg_index);
- }
- if (copy_to_user(rt56xx.buf, buf, sizeof(*buf) * rt56xx.number))
- goto err;
-
- break;
- case RT_WRITE_CODEC_REG_IOCTL:
- for (p = buf; p < buf + rt56xx.number; p++)
- codec->write(codec, p->reg_index, p->reg_value);
- break;
- }
-
- kfree(buf);
- return 0;
-
-err:
- kfree(buf);
- return -EFAULT;
-
-}
-
-static int rt56xx_codec_dump_reg(struct snd_hwdep *hw, struct file *file, unsigned long arg)
-{
- struct rt56xx_cmd rt56xx;
- struct rt56xx_cmd __user *_rt56xx = arg;
- struct rt56xx_reg_state *buf;
- struct snd_soc_codec *codec = hw->private_data;
- int number = codec->reg_cache_size;
- int i;
-
- DBG("enter %s, number = %d\n", __func__, number);
- if (copy_from_user(&rt56xx, _rt56xx, sizeof(rt56xx)))
- return -EFAULT;
-
- buf = kmalloc(sizeof(*buf) * number, GFP_KERNEL);
- if (buf == NULL)
- return -ENOMEM;
-
- for (i = 0; i < number; i++)
- {
- buf[i].reg_index = i << 1;
- buf[i].reg_value = codec->read(codec, buf[i].reg_index);
- }
- if (copy_to_user(rt56xx.buf, buf, sizeof(*buf) * i))
- goto err;
- rt56xx.number = number;
- if (copy_to_user(_rt56xx, &rt56xx, sizeof(rt56xx)))
- goto err;
- kfree(buf);
- return 0;
-err:
- kfree(buf);
- return -EFAULT;
-
-}
-
-static int rt56xx_hwdep_ioctl(struct snd_hwdep *hw, struct file *file, unsigned int cmd, unsigned long arg)
-{
- if (cmd == RT_READ_ALL_CODEC_REG_IOCTL)
- {
- return rt56xx_codec_dump_reg(hw, file, arg);
- }
- else
- {
- return rt56xx_hwdep_ioctl_common(hw, file, cmd, arg);
- }
-}
-
-int realtek_ce_init_hwdep(struct snd_soc_codec *codec)
-{
- struct snd_hwdep *hw;
- struct snd_card *card = codec->card;
- int err;
-
- if ((err = snd_hwdep_new(card, RT_CE_CODEC_HWDEP_NAME, 0, &hw)) < 0)
- return err;
-
- strcpy(hw->name, RT_CE_CODEC_HWDEP_NAME);
- hw->private_data = codec;
- hw->ops.open = rt56xx_hwdep_open;
- hw->ops.release = rt56xx_hwdep_release;
- hw->ops.ioctl = rt56xx_hwdep_ioctl;
- return 0;
-}
-
-#endif
+static struct snd_soc_codec_driver soc_codec_dev_rt5625 = {
+ .probe = rt5625_probe,
+ .remove = rt5625_remove,
+ .suspend = rt5625_suspend,
+ .resume = rt5625_resume,
+ .set_bias_level = rt5625_set_bias_level,
+ .reg_cache_size = 0x80,
+ .reg_word_size = sizeof(u16),
+ .reg_cache_default = rt5625_reg,
+ .volatile_register = rt5625_volatile_register,
+ .readable_register = rt5625_readable_register,
+ .reg_cache_step = 1,
+ .controls = rt5625_snd_controls,
+ .num_controls = ARRAY_SIZE(rt5625_snd_controls),
+ .dapm_widgets = rt5625_dapm_widgets,
+ .num_dapm_widgets = ARRAY_SIZE(rt5625_dapm_widgets),
+ .dapm_routes = rt5625_dapm_routes,
+ .num_dapm_routes = ARRAY_SIZE(rt5625_dapm_routes),
+};
-#endif
+static const struct i2c_device_id rt5625_i2c_id[] = {
+ { "rt5625", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, rt5625_i2c_id);
-static int rt5625_init(struct snd_soc_device *socdev)
+static int rt5625_i2c_probe(struct i2c_client *i2c,
+ const struct i2c_device_id *id)
{
+ struct rt5625_priv *rt5625;
+ int ret;
+ struct rt5625_platform_data *pdata = pdata = i2c->dev.platform_data;
- struct snd_soc_codec *codec = socdev->card->codec;
- int ret = 0;
-
- codec->name = "RT5625";
- codec->owner = THIS_MODULE;
- codec->read = rt5625_read;
- codec->write = rt5625_write;
- codec->set_bias_level = rt5625_set_bias_level;
- codec->dai= rt5625_dai;
- codec->num_dai = 2;
- codec->reg_cache_step = 2;
- codec->reg_cache_size = ARRAY_SIZE(rt5625_reg)*2;
- codec->reg_cache = kmemdup(rt5625_reg, sizeof(rt5625_reg), GFP_KERNEL);
- if (codec->reg_cache == NULL)
+ rt5625 = kzalloc(sizeof(struct rt5625_priv), GFP_KERNEL);
+ if (NULL == rt5625)
return -ENOMEM;
- rt5625_reset(codec);
+ rt5625->spk_ctr_pin = pdata->spk_ctr_pin;
+ rt5625->spk_ctr_on = pdata->spk_ctr_on;
+ rt5625->spk_ctr_off = pdata->spk_ctr_off;
- ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
- if (ret < 0 )
+ if(rt5625->spk_ctr_pin != INVALID_GPIO)
{
- printk(KERN_ERR "rt5625: failed to create pcms\n");
- goto pcm_err;
+ gpio_request(rt5625->spk_ctr_pin,NULL);
+ gpio_direction_output(rt5625->spk_ctr_pin,rt5625->spk_ctr_off);
+ rt5625->spk_ctr_status = 0;
}
-
- rt5625_write(codec, RT5625_PD_CTRL_STAT, 0);
- rt5625_write(codec, RT5625_PWR_MANAG_ADD1, PWR_MAIN_BIAS);
- rt5625_write(codec, RT5625_PWR_MANAG_ADD2, PWR_MIXER_VREF);
- rt5625_reg_init(codec);
- rt5625_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
- codec->bias_level = SND_SOC_BIAS_STANDBY;
- schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(80));
-
-#if (RT5625_EQ_FUNC_ENA==1)
- rt5625_update_eqmode(codec,POP);
-#endif
-
- rt5625_add_controls(codec);
- rt5625_add_widgets(codec);
-
- #if defined(CONFIG_SND_HWDEP)
-
- #if REALTEK_HWDEP
- realtek_ce_init_hwdep(codec);
-
- #endif
-
- #endif
-
- ret = snd_soc_init_card(socdev);
+ i2c_set_clientdata(i2c, rt5625);
+ ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5625,
+ rt5625_dai, ARRAY_SIZE(rt5625_dai));
if (ret < 0)
- {
- printk(KERN_ERR "rt5625: failed to register card\n");
- goto card_err;
- }
- DBG("rt5625: initial ok\n");
- return 0;
-
- card_err:
- snd_soc_free_pcms(socdev);
- snd_soc_dapm_free(socdev);
-
- pcm_err:
- kfree(codec->reg_cache);
- return ret;
-
-
-}
-
-
-static int rt5625_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
-{
- struct snd_soc_device *socdev = rt5625_socdev;
- struct snd_soc_codec *codec = socdev->card->codec;
- int ret;
-
- i2c_set_clientdata(i2c, codec);
- codec->control_data = i2c;
-
- ret = rt5625_init(socdev);
- if (ret < 0)
- pr_err("failed to initialise rt5625\n");
+ kfree(rt5625);
return ret;
}
-static int rt5625_i2c_remove(struct i2c_client *client)
+static __devexit int rt5625_i2c_remove(struct i2c_client *i2c)
{
- struct snd_soc_codec *codec = i2c_get_clientdata(client);
- kfree(codec->reg_cache);
+ snd_soc_unregister_codec(&i2c->dev);
+ kfree(i2c_get_clientdata(i2c));
return 0;
}
-static const struct i2c_device_id rt5625_i2c_id[] = {
- {"rt5625", 0},
- {}
-};
-MODULE_DEVICE_TABLE(i2c, rt5625_i2c_id);
-static struct i2c_driver rt5625_i2c_driver = {
+struct i2c_driver rt5625_i2c_driver = {
.driver = {
- .name = "RT5625 I2C Codec",
+ .name = "rt5625",
.owner = THIS_MODULE,
},
- .probe = rt5625_i2c_probe,
- .remove = rt5625_i2c_remove,
+ .probe = rt5625_i2c_probe,
+ .remove = __devexit_p(rt5625_i2c_remove),
.id_table = rt5625_i2c_id,
};
-
-static int rt5625_add_i2c_device(struct platform_device *pdev,
- const struct rt5625_setup_data *setup)
+static int __init rt5625_modinit(void)
{
-#if 0
- struct i2c_board_info info;
- struct i2c_adapter *adapter;
- struct i2c_client *client;
-#endif
- int ret;
-
- ret = i2c_add_driver(&rt5625_i2c_driver);
- if (ret != 0) {
- dev_err(&pdev->dev, "can't add i2c driver\n");
- return ret;
- }
-#if 0
- memset(&info, 0, sizeof(struct i2c_board_info));
- info.addr = setup->i2c_address;
- strlcpy(info.type, "rt5625", I2C_NAME_SIZE);
-
- adapter = i2c_get_adapter(setup->i2c_bus);
- if (!adapter) {
- dev_err(&pdev->dev, "can't get i2c adapter %d\n",
- setup->i2c_bus);
- goto err_driver;
- }
+ return i2c_add_driver(&rt5625_i2c_driver);
+}
+module_init(rt5625_modinit);
- client = i2c_new_device(adapter, &info);
- i2c_put_adapter(adapter);
- if (!client) {
- dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
- (unsigned int)info.addr);
- goto err_driver;
- }
-#endif
- return 0;
-#if 0
-err_driver:
+static void __exit rt5625_modexit(void)
+{
i2c_del_driver(&rt5625_i2c_driver);
- return -ENODEV;
-#endif
}
+module_exit(rt5625_modexit);
+MODULE_DESCRIPTION("ASoC RT5625 driver");
+MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
+MODULE_LICENSE("GPL");
-static int rt5625_probe(struct platform_device *pdev)
-{
- struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct rt5625_setup_data *setup;
- struct snd_soc_codec *codec;
- struct rt5625_priv *rt5625;
- int ret;
- pr_info("RT5625 Audio Codec %s", RT5625_VERSION);
+#ifdef RT5625_PROC
- if(socdev->codec_data)
+static ssize_t rt5625_proc_write(struct file *file, const char __user *buffer,
+ unsigned long len, void *data)
+{
+ char *cookie_pot;
+ char *p;
+ int reg;
+ int value;
+
+ cookie_pot = (char *)vmalloc( len );
+ if (!cookie_pot)
{
- setup = socdev->codec_data;
- }
-
- codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
- if (codec == NULL)
return -ENOMEM;
-
- rt5625 = kzalloc(sizeof(struct rt5625_priv), GFP_KERNEL);
- if (rt5625 == NULL) {
- kfree(codec);
- return -ENOMEM;
- }
- codec->private_data = rt5625;
- socdev->card->codec = codec;
-
- mutex_init(&codec->mutex);
- INIT_LIST_HEAD(&codec->dapm_widgets);
- INIT_LIST_HEAD(&codec->dapm_paths);
- rt5625_socdev = socdev;
- INIT_DELAYED_WORK(&codec->delayed_work, rt5625_work);
-
- ret = -ENODEV;
-// if (setup->i2c_address)
+ }
+ else
{
- codec->hw_write = (hw_write_t)i2c_master_send;
- //codec->hw_read = (hw_read_t)i2c_master_recv;
- ret = rt5625_add_i2c_device(pdev, setup);
- }
-
- if (ret != 0) {
- kfree(codec->private_data);
- kfree(codec);
- socdev->card->codec = NULL;
+ if (copy_from_user( cookie_pot, buffer, len ))
+ return -EFAULT;
}
- return ret;
-}
-static int run_delayed_work(struct delayed_work *dwork)
-{
- int ret;
+ switch(cookie_pot[0])
+ {
+ case 'd':
+ case 'D':
+ debug_write_read ++;
+ debug_write_read %= 2;
+ if(debug_write_read != 0)
+ printk("Debug read and write reg on\n");
+ else
+ printk("Debug read and write reg off\n");
+ break;
+ case 'r':
+ case 'R':
+ printk("Read reg debug\n");
+ if(cookie_pot[1] ==':')
+ {
+ debug_write_read = 1;
+ strsep(&cookie_pot,":");
+ while((p=strsep(&cookie_pot,",")))
+ {
+ reg = simple_strtol(p,NULL,16);
+ value = rt5625_read(rt5625_codec,reg);
+ printk("rt5625_read:0x%04x = 0x%04x\n",reg,value);
+ }
+ debug_write_read = 0;
+ printk("\n");
+ }
+ else
+ {
+ printk("Error Read reg debug.\n");
+ printk("For example: echo r:22,23,24,25>rt5625_ts\n");
+ }
+ break;
+ case 'w':
+ case 'W':
+ printk("Write reg debug\n");
+ if(cookie_pot[1] ==':')
+ {
+ debug_write_read = 1;
+ strsep(&cookie_pot,":");
+ while((p=strsep(&cookie_pot,"=")))
+ {
+ reg = simple_strtol(p,NULL,16);
+ p=strsep(&cookie_pot,",");
+ value = simple_strtol(p,NULL,16);
+ rt5625_write(rt5625_codec,reg,value);
+ printk("rt5625_write:0x%04x = 0x%04x\n",reg,value);
+ }
+ debug_write_read = 0;
+ printk("\n");
+ }
+ else
+ {
+ printk("Error Write reg debug.\n");
+ printk("For example: w:22=0,23=0,24=0,25=0>rt5625_ts\n");
+ }
+ break;
+ case 'a':
+ printk("Dump reg \n");
- /* cancel any work waiting to be queued. */
- ret = cancel_delayed_work(dwork);
+ for(reg = 0; reg < 0x6e; reg+=2)
+ {
+ value = rt5625_read(rt5625_codec,reg);
+ printk("rt5625_read:0x%04x = 0x%04x\n",reg,value);
+ }
- /* if there was any work waiting then we run it now and
- * wait for it's completion */
- if (ret) {
- schedule_delayed_work(dwork, 0);
- flush_scheduled_work();
+ break;
+ default:
+ printk("Help for rt5625_ts .\n-->The Cmd list: \n");
+ printk("-->'d&&D' Open or Off the debug\n");
+ printk("-->'r&&R' Read reg debug,Example: echo 'r:22,23,24,25'>rt5625_ts\n");
+ printk("-->'w&&W' Write reg debug,Example: echo 'w:22=0,23=0,24=0,25=0'>rt5625_ts\n");
+ break;
}
- return ret;
-}
-
-static int rt5625_remove(struct platform_device *pdev)
-{
- struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->card->codec;
-
- if (codec->control_data)
- rt5625_set_bias_level(codec, SND_SOC_BIAS_OFF);
- run_delayed_work(&codec->delayed_work);
- snd_soc_free_pcms(socdev);
- snd_soc_dapm_free(socdev);
- i2c_unregister_device(codec->control_data);
- i2c_del_driver(&rt5625_i2c_driver);
- kfree(codec->private_data);
- kfree(codec);
-
- return 0;
+ return len;
}
+static const struct file_operations rt5625_proc_fops = {
+ .owner = THIS_MODULE,
+};
-static int rt5625_suspend(struct platform_device *pdev, pm_message_t state)
-{
- struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->card->codec;
-
- rt5625_set_bias_level(codec, SND_SOC_BIAS_OFF);
-
- return 0;
-}
-
-static int rt5625_resume(struct platform_device *pdev)
+static int rt5625_proc_init(void)
{
- struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->card->codec;
-
-
-// int i;
-// u8 data[3];
-// u16 *cache = codec->reg_cache;
-
-#if 1
- rt5625_reset(codec);
- rt5625_write(codec, RT5625_PD_CTRL_STAT, 0);
- rt5625_write(codec, RT5625_PWR_MANAG_ADD1, PWR_MAIN_BIAS);
- rt5625_write(codec, RT5625_PWR_MANAG_ADD2, PWR_MIXER_VREF);
- rt5625_reg_init(codec);
-#else
- /* Sync reg_cache with the hardware */
- for (i = 0; i < ARRAY_SIZE(rt5625_reg); i++) {
- if (i == RT5625_RESET)
- continue;
- data[0] = i << 1;
- data[1] = (0xff00 & cache[i]) >> 8;
- data[2] = 0x00ff & cache[i];
- codec->hw_write(codec->control_data, data, 3);
+ struct proc_dir_entry *rt5625_proc_entry;
+ rt5625_proc_entry = create_proc_entry("driver/rt5625_ts", 0777, NULL);
+ if(rt5625_proc_entry != NULL)
+ {
+ rt5625_proc_entry->write_proc = rt5625_proc_write;
+ return 0;
}
-
- rt5625_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
-#endif
-
- /* charge rt5625 caps */
- if (codec->suspend_bias_level == SND_SOC_BIAS_ON) {
- rt5625_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
- codec->bias_level = SND_SOC_BIAS_ON;
- schedule_delayed_work(&codec->delayed_work,
- msecs_to_jiffies(100));
+ else
+ {
+ printk("create proc error !\n");
+ return -1;
}
-
- return 0;
}
-
-
-struct snd_soc_codec_device soc_codec_dev_rt5625 = {
- .probe = rt5625_probe,
- .remove = rt5625_remove,
- .suspend = rt5625_suspend,
- .resume = rt5625_resume,
-};
-
-EXPORT_SYMBOL_GPL(soc_codec_dev_rt5625);
-
-static int __init rt5625_modinit(void)
-{
- return snd_soc_register_dais(rt5625_dai, ARRAY_SIZE(rt5625_dai));
-}
-
-static void __exit rt5625_exit(void)
-{
- snd_soc_unregister_dais(rt5625_dai, ARRAY_SIZE(rt5625_dai));
-}
-
-module_init(rt5625_modinit);
-module_exit(rt5625_exit);
-MODULE_LICENSE("GPL");
+#endif
-#ifndef _RT5625_H
-#define _RT5625_H
-
-#define RT5625_RESET 0X00 //RESET CODEC TO DEFAULT
-#define RT5625_SPK_OUT_VOL 0X02 //SPEAKER OUT VOLUME
-#define RT5625_HP_OUT_VOL 0X04 //HEADPHONE OUTPUT VOLUME
-#define RT5625_AUX_OUT_VOL 0X06 //AUXOUT VOLUME
-#define RT5625_PHONEIN_VOL 0X08 //PHONE INPUT VOLUME
-#define RT5625_LINE_IN_VOL 0X0A //LINE IN VOLUME
-#define RT5625_STEREO_DAC_VOL 0X0C //STEREO DAC VOLUME
-#define RT5625_MIC_VOL 0X0E //MICROPHONE VOLUME
-#define RT5625_DAC_AND_MIC_CTRL 0X10 //STEREO DAC AND MIC ROUTING CONTROL
-#define RT5625_ADC_REC_GAIN 0X12 //ADC RECORD GAIN
-#define RT5625_ADC_REC_MIXER 0X14 //ADC RECORD MIXER CONTROL
-#define RT5625_VOICE_DAC_OUT_VOL 0X18 //VOICE DAC OUTPUT VOLUME
-#define RT5625_VODSP_PDM_CTL 0X1A //VODSP & PDM CONTROL
-#define RT5625_OUTPUT_MIXER_CTRL 0X1C //OUTPUT MIXER CONTROL
-#define RT5625_VODSP_CTL 0X1E //VODSP CONTROL
-#define RT5625_MIC_CTRL 0X22 //MICROPHONE CONTROL
-#define RT5625_DMIC_CTRL 0x24
-#define RT5625_PD_CTRL_STAT 0X26 //POWER DOWN CONTROL/STATUS
-#define RT5625_DAC_ADC_VODAC_FUN_SEL 0X2E //STEREO DAC,VOICE DAC,STEREO ADC FUNCTION SELECT
-#define RT5625_MAIN_SDP_CTRL 0X34 //MAIN SERIAL DATA PORT CONTROL(STEREO I2S)
-#define RT5625_EXTEND_SDP_CTRL 0X36 //EXTEND SERIAL DATA PORT CONTROL(VOICE I2S/PCM)
-#define RT5625_PWR_MANAG_ADD1 0X3A //POWER MANAGMENT ADDITION 1
-#define RT5625_PWR_MANAG_ADD2 0X3C //POWER MANAGMENT ADDITION 2
-#define RT5625_PWR_MANAG_ADD3 0X3E //POWER MANAGMENT ADDITION 3
-#define RT5625_GEN_CTRL_REG1 0X40 //GENERAL PURPOSE CONTROL REGISTER 1
-#define RT5625_GEN_CTRL_REG2 0X42 //GENERAL PURPOSE CONTROL REGISTER 2
-#define RT5625_PLL_CTRL 0X44 //PLL1 CONTROL
-#define RT5625_PLL2_CTRL 0X46 //PLL2 CONTROL
-#define RT5625_LDO_CTRL 0X48 //LDO CONTROL
-#define RT5625_GPIO_PIN_CONFIG 0X4C //GPIO PIN CONFIGURATION
-#define RT5625_GPIO_PIN_POLARITY 0X4E //GPIO PIN POLARITY
-#define RT5625_GPIO_PIN_STICKY 0X50 //GPIO PIN STICKY
-#define RT5625_GPIO_PIN_WAKEUP 0X52 //GPIO PIN WAKE UP
-#define RT5625_GPIO_PIN_STATUS 0X54 //GPIO PIN STATUS
-#define RT5625_GPIO_PIN_SHARING 0X56 //GPIO PIN SHARING
-#define RT5625_OVER_TEMP_CURR_STATUS 0X58 //OVER TEMPERATURE AND CURRENT STATUS
-#define RT5625_SOFT_VOL_CTRL 0X5A //SOFT VOLUME CONTROL SETTING
-#define RT5625_GPIO_OUT_CTRL 0X5C //GPIO OUTPUT PIN CONTRL
-#define RT5625_MISC_CTRL 0X5E //MISC CONTROL
-#define RT5625_STEREO_DAC_CLK_CTRL1 0X60 //STEREO DAC CLOCK CONTROL 1
-#define RT5625_STEREO_DAC_CLK_CTRL2 0X62 //STEREO DAC CLOCK CONTROL 2
-#define RT5625_VOICE_DAC_PCMCLK_CTRL1 0X64 //VOICE/PCM DAC CLOCK CONTROL 1
-#define RT5625_PSEDUEO_SPATIAL_CTRL 0X68 //PSEDUEO STEREO /SPATIAL EFFECT BLOCK CONTROL
-#define RT5625_PRIV_ADDR 0X6A //PRIVATE ADDRESS
-#define RT5625_PRIV_DATA 0X6C //PRIVATE DATA
-#define RT5625_EQ_CTRL_ADC_HPF 0X6E //EQ CONTROL AND STATUS /ADC HPF CONTROL
-#define RT5625_VODSP_REG_ADDR 0x70 //VODSP REGISTER ADDRESS
-#define RT5625_VODSP_REG_DATA 0x72 //VODSP REGISTER DATA
-#define RT5625_VODSP_REG_CMD 0x74 //VODSP REGISTER COMMAND
-
-
-/**************************************************************************************************
- *Bit define of Codec Register
- *************************************************************************************************/
-//global definition
-#define RT_L_MUTE (0x1<<15) //Mute Left Control
-#define RT_L_ZC (0x1<<14) //Mute Left Zero-Cross Detector Control
-#define RT_R_MUTE (0x1<<7) //Mute Right Control
-#define RT_R_ZC (0x1<<6) //Mute Right Zero-Cross Detector Control
-#define RT_M_HP_MIXER (0x1<<15) //Mute source to HP Mixer
-#define RT_M_SPK_MIXER (0x1<<14) //Mute source to Speaker Mixer
-#define RT_M_MONO_MIXER (0x1<<13) //Mute source to Mono Mixer
-
-//Phone Input Volume(0x08)
-#define M_PHONEIN_TO_HP_MIXER (0x1<<15) //Mute Phone In volume to HP mixer
-#define M_PHONEIN_TO_SPK_MIXER (0x1<<14) //Mute Phone In volume to speaker mixer
-
-
-//Mic Routing Control(0x10)
-#define M_MIC1_TO_HP_MIXER (0x1<<15) //Mute MIC1 to HP mixer
-#define M_MIC1_TO_SPK_MIXER (0x1<<14) //Mute MiC1 to SPK mixer
-#define M_MIC1_TO_MONO_MIXER (0x1<<13) //Mute MIC1 to MONO mixer
-#define M_MIC2_TO_HP_MIXER (0x1<<11) //Mute MIC2 to HP mixer
-#define M_MIC2_TO_SPK_MIXER (0x1<<10) //Mute MiC2 to SPK mixer
-#define M_MIC2_TO_MONO_MIXER (0x1<<9) //Mute MIC2 to MONO mixer
-#define M_DAC_TO_HPL_MIXER (0x1<<3) //Mute DAC to HP left mixer
-#define M_DAC_TO_HPR_MIXER (0x1<<2) //Mute DAC to HP right mixer
-#define M_DAC_TO_SPK_MIXER (0x1<<1) //Mute DAC to SPK mixer
-#define M_DAC_TO_MONO_MIXER (0x1<<0) //Mute DAC to MONO mixer
-
-
-
-//ADC Record Gain(0x12)
-#define M_ADC_L_TO_HP_MIXER (0x1<<15) //Mute left of ADC to HP Mixer
-#define M_ADC_L_TO_MONO_MIXER (0x1<<14) //Mute left of ADC to MONO Mixer
-#define ADC_L_ZC_DET (0x1<<13) //ADC Zero-Cross Detector Control
-#define ADC_L_GAIN_MASK (0x1f<<8) //ADC Record Gain Left channel Mask
-#define M_ADC_R_TO_HP_MIXER (0x1<<7) //Mute right of ADC to HP Mixer
-#define M_ADC_R_TO_MONO_MIXER (0x1<<6) //Mute right of ADC to MONO Mixer
-#define ADC_R_ZC_DET (0x1<<5) //ADC Zero-Cross Detector Control
-#define ADC_R_GAIN_MASK (0x1f<<0) //ADC Record Gain Right channel Mask
-
-//Voice DAC Output Volume(0x18)
-#define M_V_DAC_TO_HP_MIXER (0x1<<15)
-#define M_V_DAC_TO_SPK_MIXER (0x1<<14)
-#define M_V_DAC_TO_MONO_MIXER (0x1<<13)
-
-
-//AEC & PDM Control(0x1A)
-#define VODSP_SRC1_PWR (0x1<<15) //Enable SRC1 Power
-#define VODSP_SRC2_PWR (0x1<<13) //Enable SRC2 Power
-
-#define VODSP_SRC2_S_SEL_MASK (0x1<<12)
-#define VODSP_SRC2_S_SEL_TXDP (0x0<<12) //SRC2 source select AEC_TXDP
-#define VODSP_SRC2_S_SEL_TXDC (0x1<<12) //SRC2 source select AEC_TXDC
-
-#define VODSP_RXDP_PWR (0x1<<11) //Enable AEC RXDP Power
-
-#define VODSP_RXDP_S_SEL_MASK (0x3<<9)
-#define VODSP_RXDP_S_SEL_SRC1 (0x0<<9) //AEC RxDP source select SRC1 Output
-#define VODSP_RXDP_S_SEL_ADCL (0x1<<9) //AEC RxDP source select ADC Left to AEC Digital Path
-#define VODSP_RXDP_S_SEL_VOICE (0x2<<9) //AEC RxDP source select Voice to Stereo Digital Path
-#define VODSP_RXDP_S_SEL_ADCR (0x3<<9) //AEC RxDP source select ADC Right to AEC Digital Path
-
-#define VODSP_RXDC_PWR (0x1<<8) //Enable AEC RXDC Power
-
-#define VOICE_PCM_S_SEL_MASK (0x1<<7)
-#define VOICE_PCM_S_SEL_ADC_R (0x0<<7) //VSADC PCM interface source select ADC R
-#define VOICE_PCM_S_SEL_AEC_TXDP (0x1<<7) //VSADC PCM interface source select AEC_TXDP
-
-#define REC_S_SEL_MASK (0x3<<4)
-#define REC_S_SEL_ADC (0x0<<4) //Main Stereo Record I2S source select ADC L/R
-#define REC_S_SEL_VOICE (0x1<<4) //Main Stereo Record I2S source select Voice to Stereo Digital Path
-#define REC_S_SEL_SRC2 (0x2<<4) //Main Stereo Record I2S source select SRC2
-
-
-//Output Mixer Control(0x1C)
-#define SPKOUT_N_SOUR_MASK (0x3<<14)
-#define SPKOUT_N_SOUR_LN (0x2<<14)
-#define SPKOUT_N_SOUR_RP (0x1<<14)
-#define SPKOUT_N_SOUR_RN (0x0<<14)
-
-#define SPKOUT_SEL_CLASS_D (0x1<<13)
-#define SPKOUT_SEL_CLASS_AB (0x0<<13)
-
-#define SPK_CLASS_AB_S_AMP (0x0<<12)
-#define SPK_CALSS_AB_W_AMP (0x1<<12)
-
-#define SPKOUT_INPUT_SEL_MASK (0x3<<10)
-#define SPKOUT_INPUT_SEL_MONOMIXER (0x3<<10)
-#define SPKOUT_INPUT_SEL_SPKMIXER (0x2<<10)
-#define SPKOUT_INPUT_SEL_HPMIXER (0x1<<10)
-#define SPKOUT_INPUT_SEL_VMID (0x0<<10)
-
-#define HPL_INPUT_SEL_HPLMIXER (0x1<<9)
-#define HPR_INPUT_SEL_HPRMIXER (0x1<<8)
-
-#define AUXOUT_INPUT_SEL_MASK (0x3<<6)
-#define AUXOUT_INPUT_SEL_MONOMIXER (0x3<<6)
-#define AUXOUT_INPUT_SEL_SPKMIXER (0x2<<6)
-#define AUXOUT_INPUT_SEL_HPMIXER (0x1<<6)
-#define AUXOUT_INPUT_SEL_VMID (0x0<<6)
-
-
-//Voice DSP Control(0x1E)
-#define VODSP_SYSCLK_S_SEL_MASK (0x1<<15)
-#define VODSP_SYSCLK_S_SEL_M_CLK (0x0<<15)
-#define VODSP_SYSCLK_S_SEL_V_CLK (0x1<<15)
-
-#define VODSP_LRCK_SEL_MASK (0x1<<13)
-#define VODSP_LRCK_SEL_8K (0x0<<13)
-#define VODSP_LRCK_SEL_16K (0x1<<13)
-
-#define VODSP_TEST_MODE_ENA (0x1<<3)
-#define VODSP_NO_BP_MODE_ENA (0x1<<2)
-#define VODSP_NO_PD_MODE_ENA (0x1<<1)
-#define VODSP_NO_RST_MODE_ENA (0x1<<0)
-
-
-
-
-//Micphone Control define(0x22)
-#define MIC1 1
-#define MIC2 2
-#define MIC_BIAS_90_PRECNET_AVDD 1
-#define MIC_BIAS_75_PRECNET_AVDD 2
-
-#define MIC1_BOOST_CONTROL_MASK (0x3<<10)
-#define MIC1_BOOST_CONTROL_BYPASS (0x0<<10)
-#define MIC1_BOOST_CONTROL_20DB (0x1<<10)
-#define MIC1_BOOST_CONTROL_30DB (0x2<<10)
-#define MIC1_BOOST_CONTROL_40DB (0x3<<10)
-
-#define MIC2_BOOST_CONTROL_MASK (0x3<<8)
-#define MIC2_BOOST_CONTROL_BYPASS (0x0<<8)
-#define MIC2_BOOST_CONTROL_20DB (0x1<<8)
-#define MIC2_BOOST_CONTROL_30DB (0x2<<8)
-#define MIC2_BOOST_CONTROL_40DB (0x3<<8)
-
-#define MIC1_BIAS_VOLT_CTRL_MASK (0x1<<5)
-#define MIC1_BIAS_VOLT_CTRL_90P (0x0<<5)
-#define MIC1_BIAS_VOLT_CTRL_75P (0x1<<5)
-
-#define MIC2_BIAS_VOLT_CTRL_MASK (0x1<<4)
-#define MIC2_BIAS_VOLT_CTRL_90P (0x0<<4)
-#define MIC2_BIAS_VOLT_CTRL_75P (0x1<<4)
-
-//PowerDown control of register(0x26)
-//power management bits
-#define RT_PWR_PR7 (0x1<<15) //write this bit to power down the Speaker Amplifier
-#define RT_PWR_PR6 (0x1<<14) //write this bit to power down the Headphone Out and MonoOut
-#define RT_PWR_PR5 (0x1<<13) //write this bit to power down the internal clock(without PLL)
-#define RT_PWR_PR3 (0x1<<11) //write this bit to power down the mixer(vref/vrefout out off)
-#define RT_PWR_PR2 (0x1<<10) //write this bit to power down the mixer(vref/vrefout still on)
-#define RT_PWR_PR1 (0x1<<9) //write this bit to power down the dac
-#define RT_PWR_PR0 (0x1<<8) //write this bit to power down the adc
-#define RT_PWR_REF (0x1<<3) //read only
-#define RT_PWR_ANL (0x1<<2) //read only
-#define RT_PWR_DAC (0x1<<1) //read only
-#define RT_PWR_ADC (0x1) //read only
-
-
-//Stereo DAC/Voice DAC/Stereo ADC function(0x2E)
-#define DAC_FUNC_SEL_MASK (0x3<<12)
-#define DAC_FUNC_SEL_DAC (0x0<<12)
-#define DAC_FUNC_SEL_SRC2 (0x1<<12)
-#define DAC_FUNC_SEL_VODSP_TXDP (0x2<<12)
-#define DAC_FUNC_SEL_VODSP_TXDC (0x3<<12)
-
-#define VODAC_SOUR_SEL_MASK (0x7<<8)
-#define VODAC_SOUR_SEL_VOICE (0x0<<8)
-#define VODAC_SOUR_SEL_SRC2 (0x1<<8)
-#define VODAC_SOUR_SEL_VODSP_TXDP (0x2<<8)
-#define VODAC_SOUR_SEL_VODSP_TXDC (0x3<<8)
-
-#define ADCR_FUNC_SEL_MASK (0x3<<4)
-#define ADCR_FUNC_SEL_ADC (0x0<<4)
-#define ADCR_FUNC_SEL_VOADC (0x1<<4)
-#define ADCR_FUNC_SEL_VODSP (0x2<<4)
-#define ADCR_FUNC_SEL_PDM (0x3<<4)
-
-#define ADCL_FUNC_SEL_MASK (0x3<<0)
-#define ADCL_FUNC_SEL_ADC (0x0<<0)
-#define ADCL_FUNC_SEL_VODSP (0x1<<0)
-
-//Main Serial Data Port Control(0x34)
-#define MAIN_I2S_MODE_SEL (0x1<<15) //0:Master mode 1:Slave mode
-#define MAIN_I2S_SADLRCK_CTRL (0x1<<14) //0:Disable,ADC and DAC use the same fs,1:Enable
-
-#define MAIN_I2S_PCM_MODE (0x1<<6) //0:Normal SADLRCK/SDALRCK,1:Invert SADLRCK/SDALRCK
-//Data Length Slection
-#define MAIN_I2S_DL_MASK (0x3<<2) //main i2s Data Length mask
-#define MAIN_I2S_DL_16 (0x0<<2) //16 bits
-#define MAIN_I2S_DL_20 (0x1<<2) //20 bits
-#define MAIN_I2S_DL_24 (0x2<<2) //24 bits
-#define MAIN_I2S_DL_32 (0x3<<2) //8 bits
-
-//PCM Data Format Selection
-#define MAIN_I2S_DF_MASK (0x3) //main i2s Data Format mask
-#define MAIN_I2S_DF_I2S (0x0) //I2S FORMAT
-#define MAIN_I2S_DF_LEFT (0x1) //LEFT JUSTIFIED format
-#define MAIN_I2S_DF_PCM_A (0x2) //PCM Mode A
-#define MAIN_I2S_DF_PCM_B (0x3) //PCM Mode B
-
-//Extend Serial Data Port Control(0x36)
-#define EXT_I2S_FUNC_ENABLE (0x1<<15) //Enable PCM interface on GPIO 1,3,4,5 0:GPIO function,1:Voice PCM interface
-#define EXT_I2S_MODE_SEL (0x1<<14) //0:Master ,1:Slave
-#define EXT_I2S_AUTO_CLK_CTRL (0x1<<13) //0:Disable,1:Enable
-#define EXT_I2S_BCLK_POLARITY (0x1<<7) //0:Normal 1:Invert
-#define EXT_I2S_PCM_MODE (0x1<<6) //0:Normal VSLRCK,1:Invert VSLRCK
-//Data Length Slection
-#define EXT_I2S_DL_MASK (0x3<<2) //Extend i2s Data Length mask
-#define EXT_I2S_DL_32 (0x3<<2) //8 bits
-#define EXT_I2S_DL_24 (0x2<<2) //24 bits
-#define EXT_I2S_DL_20 (0x1<<2) //20 bits
-#define EXT_I2S_DL_16 (0x0<<2) //16 bits
-
-//Voice Data Format
-#define EXT_I2S_DF_MASK (0x3) //Extend i2s Data Format mask
-#define EXT_I2S_DF_I2S (0x0) //I2S FORMAT
-#define EXT_I2S_DF_LEFT (0x1) //LEFT JUSTIFIED format
-#define EXT_I2S_DF_PCM_A (0x2) //PCM Mode A
-#define EXT_I2S_DF_PCM_B (0x3) //PCM Mode B
-
-//Power managment addition 1 (0x3A),0:Disable,1:Enable
-#define PWR_DAC_DF2SE_L (0x1<<15)
-#define PWR_DAC_DF2SE_R (0x1<<14)
-#define PWR_ZC_DET_PD (0x1<<13)
-#define PWR_I2S_INTERFACE (0x1<<11)
-#define PWR_AMP_POWER (0x1<<10)
-#define PWR_HP_OUT_AMP (0x1<<9)
-#define PWR_HP_OUT_ENH_AMP (0x1<<8)
-#define PWR_VOICE_DF2SE (0x1<<7)
-#define PWR_SOFTGEN_EN (0x1<<6)
-#define PWR_MIC_BIAS1_DET (0x1<<5)
-#define PWR_MIC_BIAS2_DET (0x1<<4)
-#define PWR_MIC_BIAS1 (0x1<<3)
-#define PWR_MIC_BIAS2 (0x1<<2)
-#define PWR_MAIN_BIAS (0x1<<1)
-#define PWR_DAC_REF (0x1)
-
-
-//Power managment addition 2(0x3C),0:Disable,1:Enable
-#define PWR_PLL1 (0x1<<15)
-#define PWR_PLL2 (0x1<<14)
-#define PWR_MIXER_VREF (0x1<<13)
-#define PWR_TEMP_SENSOR (0x1<<12)
-#define PWR_AUX_ADC (0x1<<11)
-#define PWR_VOICE_CLOCK (0x1<<10)
-#define PWR_L_DAC_CLK (0x1<<9)
-#define PWR_R_DAC_CLK (0x1<<8)
-#define PWR_L_ADC_CLK (0x1<<7)
-#define PWR_R_ADC_CLK (0x1<<6)
-#define PWR_L_HP_MIXER (0x1<<5)
-#define PWR_R_HP_MIXER (0x1<<4)
-#define PWR_SPK_MIXER (0x1<<3)
-#define PWR_MONO_MIXER (0x1<<2)
-#define PWR_L_ADC_REC_MIXER (0x1<<1)
-#define PWR_R_ADC_REC_MIXER (0x1)
-
-
-//Power managment addition 3(0x3E),0:Disable,1:Enable
-#define PWR_OSC_EN (0x1<<15)
-#define PWR_AUXOUT_VOL (0x1<<14)
-#define PWR_SPK_OUT (0x1<<13)
-#define PWR_SPK_OUT_N (0x1<<12)
-#define PWR_HP_L_OUT_VOL (0x1<<11)
-#define PWR_HP_R_OUT_VOL (0x1<<10)
-#define PWR_VODSP_INTERFACE (0x1<<9)
-#define PWR_I2C_FOR_VODSP (0x1<<8)
-#define PWR_LINE_IN_L (0x1<<7)
-#define PWR_LINE_IN_R (0x1<<6)
-#define PWR_PHONE_VOL (0x1<<5)
-#define PWR_PHONE_ADMIXER (0x1<<4)
-#define PWR_MIC1_VOL_CTRL (0x1<<3)
-#define PWR_MIC2_VOL_CTRL (0x1<<2)
-#define PWR_MIC1_BOOST (0x1<<1)
-#define PWR_MIC2_BOOST (0x1)
-
-//General Purpose Control Register 1(0x40)
-#define GP_CLK_FROM_PLL (0x1<<15)
-#define GP_CLK_FROM_MCLK (0x0<<15)
-
-#define GP_DAC_HI_PA_ENA (0x1<<10) //Enable DAC High Pass Filter
-
-#define GP_EXTCLK_S_SEL_PLL2 (0x1<<6)
-#define GP_EXTCLK_S_SEL_PLL1 (0x0<<6)
-
-#define GP_EXTCLK_DIR_SEL_OUTPUT (0x1<<5)
-#define GP_EXTCLK_DIR_SEL_INTPUT (0x0<<5)
-
-#define GP_VOSYS_S_SEL_PLL2 (0x0<<4)
-#define GP_VOSYS_S_SEL_EXTCLK (0x1<<4)
-
-#define GP_SPK_AMP_CTRL_MASK (0x7<<1)
-#define GP_SPK_AMP_CTRL_RATIO_225 (0x0<<1) //2.25 Vdd
-#define GP_SPK_AMP_CTRL_RATIO_200 (0x1<<1) //2.00 Vdd
-#define GP_SPK_AMP_CTRL_RATIO_175 (0x2<<1) //1.75 Vdd
-#define GP_SPK_AMP_CTRL_RATIO_150 (0x3<<1) //1.50 Vdd
-#define GP_SPK_AMP_CTRL_RATIO_125 (0x4<<1) //1.25 Vdd
-#define GP_SPK_AMP_CTRL_RATIO_100 (0x5<<1) //1.00 Vdd
-
-//General Purpose Control Register 2(0x42)
-#define GP2_PLL1_SOUR_SEL_MASK (0x3<<12)
-#define GP2_PLL1_SOUR_SEL_MCLK (0x0<<12)
-#define GP2_PLL1_SOUR_SEL_BCLK (0x2<<12)
-#define GP2_PLL1_SOUR_SEL_VBCLK (0x3<<12)
-
-//PLL Control(0x44)
-#define PLL_M_CODE_MASK 0xF //PLL M code mask
-#define PLL_K_CODE_MASK (0x7<<4) //PLL K code mask
-#define PLL_BYPASS_N (0x1<<7) //bypass PLL N code
-#define PLL_N_CODE_MASK (0xFF<<8) //PLL N code mask
-
-#define PLL_CTRL_M_VAL(m) ((m)&0xf)
-#define PLL_CTRL_K_VAL(k) (((k)&0x7)<<4)
-#define PLL_CTRL_N_VAL(n) (((n)&0xff)<<8)
-
-//PLL2 CONTROL
-#define PLL2_ENA (0x1<<15)
-#define PLL_2_RATIO_8X (0x0)
-#define PLL_2_RATIO_16X (0x1)
-
-//LDO Control(0x48)
-#define LDO_ENABLE (0x1<<15)
-
-#define LDO_OUT_VOL_CTRL_MASK (0xf<<0)
-#define LDO_OUT_VOL_CTRL_1_55V (0xf<<0)
-#define LDO_OUT_VOL_CTRL_1_50V (0xe<<0)
-#define LDO_OUT_VOL_CTRL_1_45V (0xd<<0)
-#define LDO_OUT_VOL_CTRL_1_40V (0xc<<0)
-#define LDO_OUT_VOL_CTRL_1_35V (0xb<<0)
-#define LDO_OUT_VOL_CTRL_1_30V (0xa<<0)
-#define LDO_OUT_VOL_CTRL_1_25V (0x9<<0)
-#define LDO_OUT_VOL_CTRL_1_20V (0x8<<0)
-#define LDO_OUT_VOL_CTRL_1_15V (0x7<<0)
-#define LDO_OUT_VOL_CTRL_1_05V (0x6<<0)
-#define LDO_OUT_VOL_CTRL_1_00V (0x5<<0)
-#define LDO_OUT_VOL_CTRL_0_95V (0x4<<0)
-#define LDO_OUT_VOL_CTRL_0_90V (0x3<<0)
-#define LDO_OUT_VOL_CTRL_0_85V (0x2<<0)
-#define LDO_OUT_VOL_CTRL_0_80V (0x1<<0)
-#define LDO_OUT_VOL_CTRL_0_75V (0x0<<0)
-
-
-
-//GPIO Pin Configuration(0x4C)
-#define GPIO_1 (0x1<<1)
-#define GPIO_2 (0x1<<2)
-#define GPIO_3 (0x1<<3)
-#define GPIO_4 (0x1<<4)
-#define GPIO_5 (0x1<<5)
-
-
-////INTERRUPT CONTROL(0x5E)
-#define DISABLE_FAST_VREG (0x1<<15)
-
-#define AVC_TARTGET_SEL_MASK (0x3<<12)
-#define AVC_TARTGET_SEL_NONE (0x0<<12)
-#define AVC_TARTGET_SEL_R (0x1<<12)
-#define AVC_TARTGET_SEL_L (0x2<<12)
-#define AVC_TARTGET_SEL_BOTH (0x3<<12)
-
-#define HP_DEPOP_MODE2_EN (0x1<<8)
-#define HP_DEPOP_MODE1_EN (0x1<<9)
-#define HP_L_M_UM_DEPOP_EN (0x1<<7)
-#define HP_R_M_UM_DEPOP_EN (0x1<<6)
-#define M_UM_DEPOP_EN (0x1<<5)
-
-//Stereo DAC Clock Control 1(0x60)
-#define STEREO_BCLK_DIV1_MASK (0xF<<12)
-#define STEREO_BCLK_DIV1_1 (0x0<<12)
-#define STEREO_BCLK_DIV1_2 (0x1<<12)
-#define STEREO_BCLK_DIV1_3 (0x2<<12)
-#define STEREO_BCLK_DIV1_4 (0x3<<12)
-#define STEREO_BCLK_DIV1_5 (0x4<<12)
-#define STEREO_BCLK_DIV1_6 (0x5<<12)
-#define STEREO_BCLK_DIV1_7 (0x6<<12)
-#define STEREO_BCLK_DIV1_8 (0x7<<12)
-#define STEREO_BCLK_DIV1_9 (0x8<<12)
-#define STEREO_BCLK_DIV1_10 (0x9<<12)
-#define STEREO_BCLK_DIV1_11 (0xA<<12)
-#define STEREO_BCLK_DIV1_12 (0xB<<12)
-#define STEREO_BCLK_DIV1_13 (0xC<<12)
-#define STEREO_BCLK_DIV1_14 (0xD<<12)
-#define STEREO_BCLK_DIV1_15 (0xE<<12)
-#define STEREO_BCLK_DIV1_16 (0xF<<12)
-
-#define STEREO_BCLK_DIV2_MASK (0x7<<8)
-#define STEREO_BCLK_DIV2_2 (0x0<<8)
-#define STEREO_BCLK_DIV2_4 (0x1<<8)
-#define STEREO_BCLK_DIV2_8 (0x2<<8)
-#define STEREO_BCLK_DIV2_16 (0x3<<8)
-#define STEREO_BCLK_DIV2_32 (0x4<<8)
-
-#define STEREO_AD_LRCK_DIV1_MASK (0xF<<4)
-#define STEREO_AD_LRCK_DIV1_1 (0x0<<4)
-#define STEREO_AD_LRCK_DIV1_2 (0x1<<4)
-#define STEREO_AD_LRCK_DIV1_3 (0x2<<4)
-#define STEREO_AD_LRCK_DIV1_4 (0x3<<4)
-#define STEREO_AD_LRCK_DIV1_5 (0x4<<4)
-#define STEREO_AD_LRCK_DIV1_6 (0x5<<4)
-#define STEREO_AD_LRCK_DIV1_7 (0x6<<4)
-#define STEREO_AD_LRCK_DIV1_8 (0x7<<4)
-#define STEREO_AD_LRCK_DIV1_9 (0x8<<4)
-#define STEREO_AD_LRCK_DIV1_10 (0x9<<4)
-#define STEREO_AD_LRCK_DIV1_11 (0xA<<4)
-#define STEREO_AD_LRCK_DIV1_12 (0xB<<4)
-#define STEREO_AD_LRCK_DIV1_13 (0xC<<4)
-#define STEREO_AD_LRCK_DIV1_14 (0xD<<4)
-#define STEREO_AD_LRCK_DIV1_15 (0xE<<4)
-#define STEREO_AD_LRCK_DIV1_16 (0xF<<4)
-
-#define STEREO_AD_LRCK_DIV2_MASK (0x7<<1)
-#define STEREO_AD_LRCK_DIV2_2 (0x0<<1)
-#define STEREO_AD_LRCK_DIV2_4 (0x1<<1)
-#define STEREO_AD_LRCK_DIV2_8 (0x2<<1)
-#define STEREO_AD_LRCK_DIV2_16 (0x3<<1)
-#define STEREO_AD_LRCK_DIV2_32 (0x4<<1)
-
-#define STEREO_DA_LRCK_DIV_MASK (1)
-#define STEREO_DA_LRCK_DIV_32 (0)
-#define STEREO_DA_LRCK_DIV_64 (1)
-
-//Stereo DAC Clock Control 2(0x62)
-#define STEREO_DA_FILTER_DIV1_MASK (0xF<<12)
-#define STEREO_DA_FILTER_DIV1_1 (0x0<<12)
-#define STEREO_DA_FILTER_DIV1_2 (0x1<<12)
-#define STEREO_DA_FILTER_DIV1_3 (0x2<<12)
-#define STEREO_DA_FILTER_DIV1_4 (0x3<<12)
-#define STEREO_DA_FILTER_DIV1_5 (0x4<<12)
-#define STEREO_DA_FILTER_DIV1_6 (0x5<<12)
-#define STEREO_DA_FILTER_DIV1_7 (0x6<<12)
-#define STEREO_DA_FILTER_DIV1_8 (0x7<<12)
-#define STEREO_DA_FILTER_DIV1_9 (0x8<<12)
-#define STEREO_DA_FILTER_DIV1_10 (0x9<<12)
-#define STEREO_DA_FILTER_DIV1_11 (0xA<<12)
-#define STEREO_DA_FILTER_DIV1_12 (0xB<<12)
-#define STEREO_DA_FILTER_DIV1_13 (0xC<<12)
-#define STEREO_DA_FILTER_DIV1_14 (0xD<<12)
-#define STEREO_DA_FILTER_DIV1_15 (0xE<<12)
-#define STEREO_DA_FILTER_DIV1_16 (0xF<<12)
-
-#define STEREO_DA_FILTER_DIV2_MASK (0x7<<9)
-#define STEREO_DA_FILTER_DIV2_2 (0x0<<9)
-#define STEREO_DA_FILTER_DIV2_4 (0x1<<9)
-#define STEREO_DA_FILTER_DIV2_8 (0x2<<9)
-#define STEREO_DA_FILTER_DIV2_16 (0x3<<9)
-#define STEREO_DA_FILTER_DIV2_32 (0x4<<9)
-
-#define STEREO_AD_FILTER_DIV1_MASK (0xF<<4)
-#define STEREO_AD_FILTER_DIV1_1 (0x0<<4)
-#define STEREO_AD_FILTER_DIV1_2 (0x1<<4)
-#define STEREO_AD_FILTER_DIV1_3 (0x2<<4)
-#define STEREO_AD_FILTER_DIV1_4 (0x3<<4)
-#define STEREO_AD_FILTER_DIV1_5 (0x4<<4)
-#define STEREO_AD_FILTER_DIV1_6 (0x5<<4)
-#define STEREO_AD_FILTER_DIV1_7 (0x6<<4)
-#define STEREO_AD_FILTER_DIV1_8 (0x7<<4)
-#define STEREO_AD_FILTER_DIV1_9 (0x8<<4)
-#define STEREO_AD_FILTER_DIV1_10 (0x9<<4)
-#define STEREO_AD_FILTER_DIV1_11 (0xA<<4)
-#define STEREO_AD_FILTER_DIV1_12 (0xB<<4)
-#define STEREO_AD_FILTER_DIV1_13 (0xC<<4)
-#define STEREO_AD_FILTER_DIV1_14 (0xD<<4)
-#define STEREO_AD_FILTER_DIV1_15 (0xE<<4)
-#define STEREO_AD_FILTER_DIV1_16 (0xF<<4)
-
-#define STEREO_AD_FILTER_DIV2_MASK (0x7<<1)
-#define STEREO_AD_FILTER_DIV2_1 (0x0<<1)
-#define STEREO_AD_FILTER_DIV2_2 (0x1<<1)
-#define STEREO_AD_FILTER_DIV2_4 (0x2<<1)
-#define STEREO_AD_FILTER_DIV2_8 (0x3<<1)
-#define STEREO_AD_FILTER_DIV2_16 (0x4<<1)
-#define STEREO_AD_FILTER_DIV2_32 (0x5<<1)
-
-
-//Voice DAC PCM Clock Control 1(0x64)
-#define VOICE_BCLK_DIV1_MASK (0xF<<12)
-#define VOICE_BCLK_DIV1_1 (0x0<<12)
-#define VOICE_BCLK_DIV1_2 (0x1<<12)
-#define VOICE_BCLK_DIV1_3 (0x2<<12)
-#define VOICE_BCLK_DIV1_4 (0x3<<12)
-#define VOICE_BCLK_DIV1_5 (0x4<<12)
-#define VOICE_BCLK_DIV1_6 (0x5<<12)
-#define VOICE_BCLK_DIV1_7 (0x6<<12)
-#define VOICE_BCLK_DIV1_8 (0x7<<12)
-#define VOICE_BCLK_DIV1_9 (0x8<<12)
-#define VOICE_BCLK_DIV1_10 (0x9<<12)
-#define VOICE_BCLK_DIV1_11 (0xA<<12)
-#define VOICE_BCLK_DIV1_12 (0xB<<12)
-#define VOICE_BCLK_DIV1_13 (0xC<<12)
-#define VOICE_BCLK_DIV1_14 (0xD<<12)
-#define VOICE_BCLK_DIV1_15 (0xE<<12)
-#define VOICE_BCLK_DIV1_16 (0xF<<12)
-
-#define VOICE_BCLK_DIV2_MASK (0x7<<8)
-#define VOICE_BCLK_DIV2_2 (0x0<<8)
-#define VOICE_BCLK_DIV2_4 (0x1<<8)
-#define VOICE_BCLK_DIV2_8 (0x2<<8)
-#define VOICE_BCLK_DIV2_16 (0x3<<8)
-#define VOICE_BCLK_DIV2_32 (0x4<<8)
-
-#define VOICE_AD_LRCK_DIV1_MASK (0xF<<4)
-#define VOICE_AD_LRCK_DIV1_1 (0x0<<4)
-#define VOICE_AD_LRCK_DIV1_2 (0x1<<4)
-#define VOICE_AD_LRCK_DIV1_3 (0x2<<4)
-#define VOICE_AD_LRCK_DIV1_4 (0x3<<4)
-#define VOICE_AD_LRCK_DIV1_5 (0x4<<4)
-#define VOICE_AD_LRCK_DIV1_6 (0x5<<4)
-#define VOICE_AD_LRCK_DIV1_7 (0x6<<4)
-#define VOICE_AD_LRCK_DIV1_8 (0x7<<4)
-#define VOICE_AD_LRCK_DIV1_9 (0x8<<4)
-#define VOICE_AD_LRCK_DIV1_10 (0x9<<4)
-#define VOICE_AD_LRCK_DIV1_11 (0xA<<4)
-#define VOICE_AD_LRCK_DIV1_12 (0xB<<4)
-#define VOICE_AD_LRCK_DIV1_13 (0xC<<4)
-#define VOICE_AD_LRCK_DIV1_14 (0xD<<4)
-#define VOICE_AD_LRCK_DIV1_15 (0xE<<4)
-#define VOICE_AD_LRCK_DIV1_16 (0xF<<4)
-
-#define VOICE_AD_LRCK_DIV2_MASK (0x7<<1)
-#define VOICE_AD_LRCK_DIV2_2 (0x0<<1)
-#define VOICE_AD_LRCK_DIV2_4 (0x1<<1)
-#define VOICE_AD_LRCK_DIV2_8 (0x2<<1)
-#define VOICE_AD_LRCK_DIV2_16 (0x3<<1)
-#define VOICE_AD_LRCK_DIV2_32 (0x4<<1)
-
-#define VOICE_DA_LRCK_DIV_MASK (1)
-#define VOICE_DA_LRCK_DIV_32 (0)
-#define VOICE_DA_LRCK_DIV_64 (1)
-
-
-//Psedueo Stereo & Spatial Effect Block Control(0x68)
-#define SPATIAL_CTRL_EN (0x1<<15)
-#define ALL_PASS_FILTER_EN (0x1<<14)
-#define PSEUDO_STEREO_EN (0x1<<13)
-#define STEREO_EXPENSION_EN (0x1<<12)
-
-#define SPATIAL_3D_GAIN1_MASK (0x3<<10)
-#define SPATIAL_3D_GAIN1_1_0 (0x0<<10)
-#define SPATIAL_3D_GAIN1_1_5 (0x1<<10)
-#define SPATIAL_3D_GAIN1_2_0 (0x2<<10)
-
-#define SPATIAL_3D_RATIO1_MASK (0x3<<8)
-#define SPATIAL_3D_RATIO1_0_0 (0x0<<8)
-#define SPATIAL_3D_RATIO1_0_66 (0x1<<8)
-#define SPATIAL_3D_RATIO1_1_0 (0x2<<8)
-
-#define SPATIAL_3D_GAIN2_MASK (0x3<<6)
-#define SPATIAL_3D_GAIN2_1_0 (0x0<<6)
-#define SPATIAL_3D_GAIN2_1_5 (0x1<<6)
-#define SPATIAL_3D_GAIN2_2_0 (0x2<<6)
-
-#define SPATIAL_3D_RATIO2_MASK (0x3<<4)
-#define SPATIAL_3D_RATIO2_0_0 (0x0<<4)
-#define SPATIAL_3D_RATIO2_0_66 (0x1<<4)
-#define SPATIAL_3D_RATIO2_1_0 (0x2<<4)
-
-#define APF_MASK (0x3)
-#define APF_FOR_48K (0x3)
-#define APF_FOR_44_1K (0x2)
-#define APF_FOR_32K (0x1)
-
-//EQ Control and Status /ADC HPF Control(0x6E)
-#define EN_HW_EQ_BLK (0x1<<15) //HW EQ block control
-
-#define EQ_SOUR_SEL_DAC (0x0<<14)
-#define EQ_SOUR_SEL_ADC (0x1<<14)
-
-#define EQ_CHANGE_EN (0x1<<7) //EQ parameter update control
-#define EN_HW_EQ_HPF (0x1<<4) //EQ High Pass Filter Control
-#define EN_HW_EQ_BP3 (0x1<<3) //EQ Band-3 Control
-#define EN_HW_EQ_BP2 (0x1<<2) //EQ Band-2 Control
-#define EN_HW_EQ_BP1 (0x1<<1) //EQ Band-1 Control
-#define EN_HW_EQ_LPF (0x1<<0) //EQ Low Pass Filter Control
-
-
-//AEC register command(0x74)
-
-#define VODSP_BUSY (0x1<<15) //VODSP I2C busy flag
-
-#define VODSP_S_FROM_VODSP_RD (0x0<<14)
-#define VODSP_S_FROM_MX72 (0x1<<14)
-
-#define VODSP_CLK_SEL_MASK (0x3<<12) //VODSP CLK select Mask
-#define VODSP_CLK_SEL_12_288M (0x0<<12) //VODSP CLK select 12.288Mhz
-#define VODSP_CLK_SEL_6_144M (0x1<<12) //VODSP CLK select 6.144Mhz
-#define VODSP_CLK_SEL_3_072M (0x2<<12) //VODSP CLK select 3.072Mhz
-#define VODSP_CLK_SEL_2_048M (0x3<<12) //VODSP CLK select 2.0488Mhz
-
-#define VODSP_READ_ENABLE (0x1<<9) //VODSP Read Enable
-#define VODSP_WRITE_ENABLE (0x1<<8) //VODSP Write Enable
-
-#define VODSP_CMD_MASK (0xFF<<0)
-#define VODSP_CMD_MW (0x3B<<0) //Memory Write
-#define VODSP_CMD_MR (0x37<<0) //Memory Read
-#define VODSP_CMD_RR (0x60<<0) //Register Read
-#define VODSP_CMD_RW (0x68<<0) //Register Write
-
-
-/*************************************************************************************************
- *Index register of codec
- *************************************************************************************************/
-/*Index(0x20) for Auto Volume Control*/
-#define AVC_CH_SEL_MASK (0x1<<7)
-#define AVC_CH_SEL_L_CH (0x0<<7)
-#define AVC_CH_SEL_R_CH (0x1<<7)
-#define ENABLE_AVC_GAIN_CTRL (0x1<<15)
-//*************************************************************************************************
-//*************************************************************************************************
-
-#define REALTEK_HWDEP 0
-
-#if REALTEK_HWDEP
-
-struct rt56xx_reg_state
-{
- unsigned int reg_index;
- unsigned int reg_value;
+/*
+ * rt5625.h -- RT5625 ALSA SoC audio driver
+ *
+ * Copyright 2011 Realtek Microelectronics
+ * Author: Johnny Hsu <johnnyhsu@realtek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __RT5625_H__
+#define __RT5625_H__
+
+#define RT5625_RESET 0x00
+#define RT5625_SPK_OUT_VOL 0x02
+#define RT5625_HP_OUT_VOL 0x04
+#define RT5625_AUX_OUT_VOL 0x06
+#define RT5625_PHONEIN_VOL 0x08
+#define RT5625_LINE_IN_VOL 0x0a
+#define RT5625_DAC_VOL 0x0c
+#define RT5625_MIC_VOL 0x0e
+#define RT5625_DAC_MIC_CTRL 0x10
+#define RT5625_ADC_REC_GAIN 0x12
+#define RT5625_ADC_REC_MIXER 0x14
+#define RT5625_VDAC_OUT_VOL 0x18
+#define RT5625_VODSP_PDM_CTL 0x1a
+#define RT5625_OUTMIX_CTRL 0x1c
+#define RT5625_VODSP_CTL 0x1e
+#define RT5625_MIC_CTRL 0x22
+#define RT5625_DMIC_CTRL 0x24
+#define RT5625_PD_CTRL 0x26
+#define RT5625_F_DAC_ADC_VDAC 0x2e
+#define RT5625_SDP_CTRL 0x34
+#define RT5625_EXT_SDP_CTRL 0x36
+#define RT5625_PWR_ADD1 0x3a
+#define RT5625_PWR_ADD2 0x3c
+#define RT5625_PWR_ADD3 0x3e
+#define RT5625_GEN_CTRL1 0x40
+#define RT5625_GEN_CTRL2 0x42
+#define RT5625_PLL_CTRL 0x44
+#define RT5625_PLL2_CTRL 0x46
+#define RT5625_LDO_CTRL 0x48
+#define RT5625_GPIO_CONFIG 0x4c
+#define RT5625_GPIO_POLAR 0x4e
+#define RT5625_GPIO_STICKY 0x50
+#define RT5625_GPIO_WAKEUP 0x52
+#define RT5625_GPIO_STATUS 0x54
+#define RT5625_GPIO_SHARING 0x56
+#define RT5625_OTC_STATUS 0x58
+#define RT5625_SOFT_VOL_CTRL 0x5a
+#define RT5625_GPIO_OUT_CTRL 0x5c
+#define RT5625_MISC_CTRL 0x5e
+#define RT5625_DAC_CLK_CTRL1 0x60
+#define RT5625_DAC_CLK_CTRL2 0x62
+#define RT5625_VDAC_CLK_CTRL1 0x64
+#define RT5625_PS_CTRL 0x68
+#define RT5625_PRIV_INDEX 0x6a
+#define RT5625_PRIV_DATA 0x6c
+#define RT5625_EQ_CTRL 0x6e
+#define RT5625_DSP_ADDR 0x70
+#define RT5625_DSP_DATA 0x72
+#define RT5625_DSP_CMD 0x74
+#define RT5625_VENDOR_ID1 0x7c
+#define RT5625_VENDOR_ID2 0x7e
+
+/* global definition */
+#define RT5625_L_MUTE (0x1 << 15)
+#define RT5625_L_MUTE_SFT 15
+#define RT5625_L_ZC (0x1 << 14)
+#define RT5625_L_VOL_MASK (0x1f << 8)
+#define RT5625_L_HVOL_MASK (0x3f << 8)
+#define RT5625_L_VOL_SFT 8
+#define RT5625_R_MUTE (0x1 << 7)
+#define RT5625_R_MUTE_SFT 7
+#define RT5625_R_ZC (0x1 << 6)
+#define RT5625_R_VOL_MASK (0x1f)
+#define RT5625_R_HVOL_MASK (0x3f)
+#define RT5625_R_VOL_SFT 0
+#define RT5625_M_HPMIX (0x1 << 15)
+#define RT5625_M_SPKMIX (0x1 << 14)
+#define RT5625_M_MONOMIX (0x1 << 13)
+
+/* Phone Input (0x08) */
+#define RT5625_M_PHO_HM (0x1 << 15)
+#define RT5625_M_PHO_HM_SFT 15
+#define RT5625_M_PHO_SM (0x1 << 14)
+#define RT5625_M_PHO_SM_SFT 14
+#define RT5625_PHO_DIFF (0x1 << 13)
+#define RT5625_PHO_DIFF_SFT 13
+#define RT5625_PHO_DIFF_DIS (0x0 << 13)
+#define RT5625_PHO_DIFF_EN (0x1 << 13)
+
+/* Linein Volume (0x0a) */
+#define RT5625_M_LI_HM (0x1 << 15)
+#define RT5625_M_LI_HM_SFT 15
+#define RT5625_M_LI_SM (0x1 << 14)
+#define RT5625_M_LI_SM_SFT 14
+#define RT5625_M_LI_MM (0x1 << 13)
+#define RT5625_M_LI_MM_SFT 13
+
+/* MIC Input Volume (0x0e) */
+#define RT5625_MIC1_DIFF_MASK (0x1 << 15)
+#define RT5625_MIC1_DIFF_SFT 15
+#define RT5625_MIC1_DIFF_DIS (0x0 << 15)
+#define RT5625_MIC1_DIFF_EN (0x1 << 15)
+#define RT5625_MIC2_DIFF_MASK (0x1 << 7)
+#define RT5625_MIC2_DIFF_SFT 7
+#define RT5625_MIC2_DIFF_DIS (0x0 << 7)
+#define RT5625_MIC2_DIFF_EN (0x1 << 7)
+
+/* Stereo DAC and MIC Routing Control (0x10) */
+#define RT5625_M_MIC1_HM (0x1 << 15)
+#define RT5625_M_MIC1_HM_SFT 15
+#define RT5625_M_MIC1_SM (0x1 << 14)
+#define RT5625_M_MIC1_SM_SFT 14
+#define RT5625_M_MIC1_MM (0x1 << 13)
+#define RT5625_M_MIC1_MM_SFT 13
+#define RT5625_M_MIC2_HM (0x1 << 11)
+#define RT5625_M_MIC2_HM_SFT 11
+#define RT5625_M_MIC2_SM (0x1 << 10)
+#define RT5625_M_MIC2_SM_SFT 10
+#define RT5625_M_MIC2_MM (0x1 << 9)
+#define RT5625_M_MIC2_MM_SFT 9
+#define RT5625_M_DACL_HM (0x1 << 3)
+#define RT5625_M_DACL_HM_SFT 3
+#define RT5625_M_DACR_HM (0x1 << 2)
+#define RT5625_M_DACR_HM_SFT 2
+#define RT5625_M_DAC_SM (0x1 << 1)
+#define RT5625_M_DAC_SM_SFT 1
+#define RT5625_M_DAC_MM (0x1)
+#define RT5625_M_DAC_MM_SFT 0
+
+/* ADC Record Gain (0x12) */
+#define RT5625_M_ADCL_HM (0x1 << 15)
+#define RT5625_M_ADCL_HM_SFT 15
+#define RT5625_M_ADCL_MM (0x1 << 14)
+#define RT5625_M_ADCL_MM_SFT 14
+#define RT5625_ADCL_ZCD (0x1 << 13)
+#define RT5625_G_ADCL_MASK (0x1f << 8)
+#define RT5625_M_ADCR_HM (0x1 << 7)
+#define RT5625_M_ADCR_HM_SFT 7
+#define RT5625_M_ADCR_MM (0x1 << 6)
+#define RT5625_M_ADCR_MM_SFT 6
+#define RT5625_ADCR_ZCD (0x1 << 5)
+#define RT5625_G_ADCR_MASK (0x1f)
+
+/* ADC Record Mixer Control (0x14) */
+#define RT5625_M_RM_L_MIC1 (0x1 << 14)
+#define RT5625_M_RM_L_MIC1_SFT 14
+#define RT5625_M_RM_L_MIC2 (0x1 << 13)
+#define RT5625_M_RM_L_MIC2_SFT 13
+#define RT5625_M_RM_L_LINE (0x1 << 12)
+#define RT5625_M_RM_L_LINE_SFT 12
+#define RT5625_M_RM_L_PHO (0x1 << 11)
+#define RT5625_M_RM_L_PHO_SFT 11
+#define RT5625_M_RM_L_HM (0x1 << 10)
+#define RT5625_M_RM_L_HM_SFT 10
+#define RT5625_M_RM_L_SM (0x1 << 9)
+#define RT5625_M_RM_L_SM_SFT 9
+#define RT5625_M_RM_L_MM (0x1 << 8)
+#define RT5625_M_RM_L_MM_SFT 8
+#define RT5625_M_RM_R_MIC1 (0x1 << 6)
+#define RT5625_M_RM_R_MIC1_SFT 6
+#define RT5625_M_RM_R_MIC2 (0x1 << 5)
+#define RT5625_M_RM_R_MIC2_SFT 5
+#define RT5625_M_RM_R_LINE (0x1 << 4)
+#define RT5625_M_RM_R_LINE_SFT 4
+#define RT5625_M_RM_R_PHO (0x1 << 3)
+#define RT5625_M_RM_R_PHO_SFT 3
+#define RT5625_M_RM_R_HM (0x1 << 2)
+#define RT5625_M_RM_R_HM_SFT 2
+#define RT5625_M_RM_R_SM (0x1 << 1)
+#define RT5625_M_RM_R_SM_SFT 1
+#define RT5625_M_RM_R_MM (0x1)
+#define RT5625_M_RM_R_MM_SFT 0
+
+/* Voice DAC Volume (0x18) */
+#define RT5625_M_VDAC_HM (0x1 << 15)
+#define RT5625_M_VDAC_HM_SFT 15
+#define RT5625_M_VDAC_SM (0x1 << 14)
+#define RT5625_M_VDAC_SM_SFT 14
+#define RT5625_M_VDAC_MM (0x1 << 13)
+#define RT5625_M_VDAC_MM_SFT 13
+
+/* AEC & PDM Control (0x1a) */
+#define RT5625_SRC1_PWR (0x1 << 15)
+#define RT5625_SRC1_PWR_SFT 15
+#define RT5625_SRC2_PWR (0x1 << 13)
+#define RT5625_SRC2_PWR_SFT 13
+#define RT5625_SRC2_S_MASK (0x1 << 12)
+#define RT5625_SRC2_S_SFT 12
+#define RT5625_SRC2_S_TXDP (0x0 << 12)
+#define RT5625_SRC2_S_TXDC (0x1 << 12)
+#define RT5625_RXDP_PWR (0x1 << 11)
+#define RT5625_RXDP_PWR_SFT 11
+#define RT5625_RXDP_S_MASK (0x3 << 9)
+#define RT5625_RXDP_S_SFT 9
+#define RT5625_RXDP_S_SRC1 (0x0 << 9)
+#define RT5625_RXDP_S_ADCL (0x1 << 9)
+#define RT5625_RXDP_S_VOICE (0x2 << 9)
+#define RT5625_RXDP_S_ADCR (0x3 << 9)
+#define RT5625_RXDC_PWR (0x1 << 8)
+#define RT5625_RXDC_PWR_SFT 8
+#define RT5625_PCM_S_MASK (0x1 << 7)
+#define RT5625_PCM_S_SFT 7
+#define RT5625_PCM_S_ADCR (0x0 << 7)
+#define RT5625_PCM_S_TXDP (0x1 << 7)
+#define RT5625_REC_IIS_S_MASK (0x3 << 4)
+#define RT5625_REC_IIS_S_SFT 4
+#define RT5625_REC_IIS_S_ADC (0x0 << 4)
+#define RT5625_REC_IIS_S_VOICE (0x1 << 4)
+#define RT5625_REC_IIS_S_SRC2 (0x2 << 4)
+
+/* Output Mixer Control (0x1c) */
+#define RT5625_SPKN_S_MASK (0x3 << 14)
+#define RT5625_SPKN_S_SFT 14
+#define RT5625_SPKN_S_LN (0x2 << 14)
+#define RT5625_SPKN_S_RP (0x1 << 14)
+#define RT5625_SPKN_S_RN (0x0 << 14)
+#define RT5625_SPK_T_MASK (0x1 << 13)
+#define RT5625_SPK_T_SFT 13
+#define RT5625_SPK_T_CLS_D (0x1 << 13)
+#define RT5625_SPK_T_CLS_AB (0x0 << 13)
+#define RT5625_CLS_AB_MASK (0x1 << 12)
+#define RT5625_CLS_AB_SFT 12
+#define RT5625_CLS_AB_S_AMP (0x0 << 12)
+#define RT5625_CLS_AB_W_AMP (0x1 << 12)
+#define RT5625_SPKVOL_S_MASK (0x3 << 10)
+#define RT5625_SPKVOL_S_SFT 10
+#define RT5625_SPKVOL_S_MM (0x3 << 10)
+#define RT5625_SPKVOL_S_SM (0x2 << 10)
+#define RT5625_SPKVOL_S_HM (0x1 << 10)
+#define RT5625_SPKVOL_S_VMID (0x0 << 10)
+#define RT5625_HPVOL_L_S_MASK (0x1 << 9)
+#define RT5625_HPVOL_L_S_SFT 9
+#define RT5625_HPVOL_L_S_HM (0x1 << 9)
+#define RT5625_HPVOL_L_S_VMID (0x0 << 9)
+#define RT5625_HPVOL_R_S_MASK (0x1 << 8)
+#define RT5625_HPVOL_R_S_SFT 8
+#define RT5625_HPVOL_R_S_HM (0x1 << 8)
+#define RT5625_HPVOL_R_S_VMID (0x0 << 8)
+#define RT5625_AUXVOL_S_MASK (0x3 << 6)
+#define RT5625_AUXVOL_S_SFT 6
+#define RT5625_AUXVOL_S_MM (0x3 << 6)
+#define RT5625_AUXVOL_S_SM (0x2 << 6)
+#define RT5625_AUXVOL_S_HM (0x1 << 6)
+#define RT5625_AUXVOL_S_VMID (0x0 << 6)
+#define RT5625_AUXOUT_MODE (0x1 << 4)
+#define RT5625_AUXOUT_MODE_SFT 4
+#define RT5625_DACL_HP_MASK (0x1 << 1)
+#define RT5625_DACL_HP_SFT 1
+#define RT5625_DACL_HP_MUTE (0x0 << 1)
+#define RT5625_DACL_HP_ON (0x1 << 1)
+#define RT5625_DACR_HP_MASK (0x1)
+#define RT5625_DACR_HP_SFT 0
+#define RT5625_DACR_HP_MUTE (0x0)
+#define RT5625_DACR_HP_ON (0x1)
+
+/* VoDSP Control (0x1e) */
+#define RT5625_DSP_SCLK_S_MASK (0x1 << 15)
+#define RT5625_DSP_SCLK_S_SFT 15
+#define RT5625_DSP_SCLK_S_MCLK (0x0 << 15)
+#define RT5625_DSP_SCLK_S_VCLK (0x1 << 15)
+#define RT5625_DSP_LRCK_MASK (0x1 << 13)
+#define RT5625_DSP_LRCK_SFT 13
+#define RT5625_DSP_LRCK_8K (0x0 << 13)
+#define RT5625_DSP_LRCK_16K (0x1 << 13)
+#define RT5625_DSP_TP_MASK (0x1 << 3)
+#define RT5625_DSP_TP_SFT 3
+#define RT5625_DSP_TP_NOR (0x0 << 3)
+#define RT5625_DSP_TP_TEST (0x1 << 3)
+#define RT5625_DSP_BP_MASK (0x1 << 2)
+#define RT5625_DSP_BP_SFT 2
+#define RT5625_DSP_BP_EN (0x0 << 2)
+#define RT5625_DSP_BP_NOR (0x1 << 2)
+#define RT5625_DSP_PD_MASK (0x1 << 1)
+#define RT5625_DSP_PD_SFT 1
+#define RT5625_DSP_PD_EN (0x0 << 1)
+#define RT5625_DSP_PD_NOR (0x1 << 1)
+#define RT5625_DSP_RST_MASK (0x1)
+#define RT5625_DSP_RST_SFT 0
+#define RT5625_DSP_RST_EN (0x0)
+#define RT5625_DSP_RST_NOR (0x1)
+
+/* Microphone Control (0x22) */
+#define RT5625_MIC1_BST_MASK (0x3 << 10)
+#define RT5625_MIC1_BST_SFT 10
+#define RT5625_MIC1_BST_BYPASS (0x0 << 10)
+#define RT5625_MIC1_BST_20DB (0x1 << 10)
+#define RT5625_MIC1_BST_30DB (0x2 << 10)
+#define RT5625_MIC1_BST_40DB (0x3 << 10)
+#define RT5625_MIC2_BST_MASK (0x3 << 8)
+#define RT5625_MIC2_BST_SFT 8
+#define RT5625_MIC2_BST_BYPASS (0x0 << 8)
+#define RT5625_MIC2_BST_20DB (0x1 << 8)
+#define RT5625_MIC2_BST_30DB (0x2 << 8)
+#define RT5625_MIC2_BST_40DB (0x3 << 8)
+#define RT5625_MB1_OV_MASK (0x1 << 5)
+#define RT5625_MB1_OV_90P (0x0 << 5)
+#define RT5625_MB1_OV_75P (0x1 << 5)
+#define RT5625_MB2_OV_MASK (0x1 << 4)
+#define RT5625_MB2_OV_90P (0x0 << 4)
+#define RT5625_MB2_OV_75P (0x1 << 4)
+#define RT5625_SCD_THD_MASK (0x3)
+#define RT5625_SCD_THD_600UA (0x0)
+#define RT5625_SCD_THD_1500UA (0x1)
+#define RT5625_SCD_THD_2000UA (0x2)
+
+/* Digital Boost Control (0x24) */
+#define RT5625_DIG_BST_MASK (0x7)
+#define RT5625_DIG_BST_SFT 0
+
+/* Power Down Control/Status (0x26) */
+#define RT5625_PWR_PR7 (0x1 << 15)
+#define RT5625_PWR_PR6 (0x1 << 14)
+#define RT5625_PWR_PR5 (0x1 << 13)
+#define RT5625_PWR_PR3 (0x1 << 11)
+#define RT5625_PWR_PR2 (0x1 << 10)
+#define RT5625_PWR_PR1 (0x1 << 9)
+#define RT5625_PWR_PR0 (0x1 << 8)
+#define RT5625_PWR_REF_ST (0x1 << 3)
+#define RT5625_PWR_AM_ST (0x1 << 2)
+#define RT5625_PWR_DAC_ST (0x1 << 1)
+#define RT5625_PWR_ADC_ST (0x1)
+
+/* Stereo DAC/Voice DAC/Stereo ADC Function Select (0x2e) */
+#define RT5625_DAC_F_MASK (0x3 << 12)
+#define RT5625_DAC_F_SFT 12
+#define RT5625_DAC_F_DAC (0x0 << 12)
+#define RT5625_DAC_F_SRC2 (0x1 << 12)
+#define RT5625_DAC_F_TXDP (0x2 << 12)
+#define RT5625_DAC_F_TXDC (0x3 << 12)
+#define RT5625_VDAC_S_MASK (0x7 << 8)
+#define RT5625_VDAC_S_SFT 8
+#define RT5625_VDAC_S_VOICE (0x0 << 8)
+#define RT5625_VDAC_S_SRC2 (0x1 << 8)
+#define RT5625_VDAC_S_TXDP (0x2 << 8)
+#define RT5625_VDAC_S_TXDC (0x3 << 8)
+#define RT5625_ADCR_F_MASK (0x3 << 4)
+#define RT5625_ADCR_F_SFT 4
+#define RT5625_ADCR_F_ADC (0x0 << 4)
+#define RT5625_ADCR_F_VADC (0x1 << 4)
+#define RT5625_ADCR_F_DSP (0x2 << 4)
+#define RT5625_ADCR_F_PDM (0x3 << 4)
+#define RT5625_ADCL_F_MASK (0x1)
+#define RT5625_ADCL_F_SFT 0
+#define RT5625_ADCL_F_ADC (0x0)
+#define RT5625_ADCL_F_DSP (0x1)
+
+/* Main Serial Data Port Control (Stereo IIS) (0x34) */
+#define RT5625_I2S_M_MASK (0x1 << 15)
+#define RT5625_I2S_M_SFT 15
+#define RT5625_I2S_M_MST (0x0 << 15)
+#define RT5625_I2S_M_SLV (0x1 << 15)
+#define RT5625_I2S_SAD_MASK (0x1 << 14)
+#define RT5625_I2S_SAD_SFT 14
+#define RT5625_I2S_SAD_DIS (0x0 << 14)
+#define RT5625_I2S_SAD_EN (0x1 << 14)
+#define RT5625_I2S_S_MASK (0x1 << 8)
+#define RT5625_I2S_S_SFT 8
+#define RT5625_I2S_S_MSCLK (0x0 << 8)
+#define RT5625_I2S_S_VSCLK (0x1 << 8)
+#define RT5625_I2S_BP_MASK (0x1 << 7)
+#define RT5625_I2S_BP_SFT 7
+#define RT5625_I2S_BP_NOR (0x0 << 7)
+#define RT5625_I2S_BP_INV (0x1 << 7)
+#define RT5625_I2S_LRCK_MASK (0x1 << 6)
+#define RT5625_I2S_LRCK_SFT 6
+#define RT5625_I2S_LRCK_NOR (0x0 << 6)
+#define RT5625_I2S_LRCK_INV (0x1 << 6)
+#define RT5625_I2S_DL_MASK (0x3 << 2)
+#define RT5625_I2S_DL_SFT 2
+#define RT5625_I2S_DL_16 (0x0 << 2)
+#define RT5625_I2S_DL_20 (0x1 << 2)
+#define RT5625_I2S_DL_24 (0x2 << 2)
+#define RT5625_I2S_DL_8 (0x3 << 2)
+#define RT5625_I2S_DF_MASK (0x3)
+#define RT5625_I2S_DF_SFT 0
+#define RT5625_I2S_DF_I2S (0x0)
+#define RT5625_I2S_DF_LEFT (0x1)
+#define RT5625_I2S_DF_PCM_A (0x2)
+#define RT5625_I2S_DF_PCM_B (0x3)
+
+/* Extend Serial Data Port Control (0x36) */
+#define RT5625_PCM_F_MASK (0x1 << 15)
+#define RT5625_PCM_F_SFT 15
+#define RT5625_PCM_F_GPIO (0x0 << 15)
+#define RT5625_PCM_F_PCM (0x1 << 15)
+#define RT5625_PCM_M_MASK (0x1 << 14)
+#define RT5625_PCM_M_SFT 14
+#define RT5625_PCM_M_MST (0x0 << 14)
+#define RT5625_PCM_M_SLV (0x1 << 14)
+#define RT5625_PCM_CS_MASK (0x1 << 8)
+#define RT5625_PCM_CS_SFT 8
+#define RT5625_PCM_CS_SCLK (0x0 << 8)
+#define RT5625_PCM_CS_VSCLK (0x1 << 8)
+
+/* Power Management Addition 1 (0x3a) */
+#define RT5625_P_DACL_MIX (0x1 << 15)
+#define RT5625_P_DACL_MIX_BIT 15
+#define RT5625_P_DACR_MIX (0x1 << 14)
+#define RT5625_P_DACR_MIX_BIT 14
+#define RT5625_P_ZCD (0x1 << 13)
+#define RT5625_P_ZCD_BIT 13
+#define RT5625_P_I2S (0x1 << 11)
+#define RT5625_P_I2S_BIT 11
+#define RT5625_P_SPK_AMP (0x1 << 10)
+#define RT5625_P_SPK_AMP_BIT 10
+#define RT5625_P_HPO_AMP (0x1 << 9)
+#define RT5625_P_HPO_AMP_BIT 9
+#define RT5625_P_HPO_ENH (0x1 << 8)
+#define RT5625_P_HPO_ENH_BIT 8
+#define RT5625_P_VDAC_MIX (0x1 << 7)
+#define RT5625_P_VDAC_MIX_BIT 7
+#define RT5625_P_SG_EN (0x1 << 6)
+#define RT5625_P_SG_EN_BIT 6
+#define RT5625_P_MB1_SCD (0x1 << 5)
+#define RT5625_P_MB1_SCD_BIT 5
+#define RT5625_P_MB2_SCD (0x1 << 4)
+#define RT5625_P_MB2_SCD_BIT 4
+#define RT5625_P_MB1 (0x1 << 3)
+#define RT5625_P_MB1_BIT 3
+#define RT5625_P_MB2 (0x1 << 2)
+#define RT5625_P_MB2_BIT 2
+#define RT5625_P_MAIN_BIAS (0x1 << 1)
+#define RT5625_P_MAIN_BIAS_BIT 1
+#define RT5625_P_DAC_REF (0x1)
+#define RT5625_P_DAC_REF_BIT 0
+
+/* Power Management Addition 2 (0x3c) */
+#define RT5625_P_PLL1 (0x1 << 15)
+#define RT5625_P_PLL1_BIT 15
+#define RT5625_P_PLL2 (0x1 << 14)
+#define RT5625_P_PLL2_BIT 14
+#define RT5625_P_VREF (0x1 << 13)
+#define RT5625_P_VREF_BIT 13
+#define RT5625_P_OVT (0x1 << 12)
+#define RT5625_P_OVT_BIT 12
+#define RT5625_P_AUX_ADC (0x1 << 11)
+#define RT5625_P_AUX_ADC_BIT 11
+#define RT5625_P_VDAC (0x1 << 10)
+#define RT5625_P_VDAC_BIT 10
+#define RT5625_P_DACL (0x1 << 9)
+#define RT5625_P_DACL_BIT 9
+#define RT5625_P_DACR (0x1 << 8)
+#define RT5625_P_DACR_BIT 8
+#define RT5625_P_ADCL (0x1 << 7)
+#define RT5625_P_ADCL_BIT 7
+#define RT5625_P_ADCR (0x1 << 6)
+#define RT5625_P_ADCR_BIT 6
+#define RT5625_P_HM_L (0x1 << 5)
+#define RT5625_P_HM_L_BIT 5
+#define RT5625_P_HM_R (0x1 << 4)
+#define RT5625_P_HM_R_BIT 4
+#define RT5625_P_SM (0x1 << 3)
+#define RT5625_P_SM_BIT 3
+#define RT5625_P_MM (0x1 << 2)
+#define RT5625_P_MM_BIT 2
+#define RT5625_P_ADCL_RM (0x1 << 1)
+#define RT5625_P_ADCL_RM_BIT 1
+#define RT5625_P_ADCR_RM (0x1)
+#define RT5625_P_ADCR_RM_BIT 0
+
+/* Power Management Addition 3 (0x3e) */
+#define RT5625_P_OSC_EN (0x1 << 15)
+#define RT5625_P_OSC_EN_BIT 15
+#define RT5625_P_AUX_VOL (0x1 << 14)
+#define RT5625_P_AUX_VOL_BIT 14
+#define RT5625_P_SPKL_VOL (0x1 << 13)
+#define RT5625_P_SPKL_VOL_BIT 13
+#define RT5625_P_SPKR_VOL (0x1 << 12)
+#define RT5625_P_SPKR_VOL_BIT 12
+#define RT5625_P_HPL_VOL (0x1 << 11)
+#define RT5625_P_HPL_VOL_BIT 11
+#define RT5625_P_HPR_VOL (0x1 << 10)
+#define RT5625_P_HPR_VOL_BIT 10
+#define RT5625_P_DSP_IF (0x1 << 9)
+#define RT5625_P_DSP_IF_BIT 9
+#define RT5625_P_DSP_I2C (0x1 << 8)
+#define RT5625_P_DSP_I2C_BIT 8
+#define RT5625_P_LV_L (0x1 << 7)
+#define RT5625_P_LV_L_BIT 7
+#define RT5625_P_LV_R (0x1 << 6)
+#define RT5625_P_LV_R_BIT 6
+#define RT5625_P_PH_VOL (0x1 << 5)
+#define RT5625_P_PH_VOL_BIT 5
+#define RT5625_P_PH_ADMIX (0x1 << 4)
+#define RT5625_P_PH_ADMIX_BIT 4
+#define RT5625_P_MIC1_VOL (0x1 << 3)
+#define RT5625_P_MIC1_VOL_BIT 3
+#define RT5625_P_MIC2_VOL (0x1 << 2)
+#define RT5625_P_MIC2_VOL_BIT 2
+#define RT5625_P_MIC1_BST (0x1 << 1)
+#define RT5625_P_MIC1_BST_BIT 1
+#define RT5625_P_MIC2_BST (0x1)
+#define RT5625_P_MIC2_BST_BIT 0
+
+/* General Purpose Control Register 1 (0x40) */
+#define RT5625_SCLK_MASK (0x1 << 15)
+#define RT5625_SCLK_SFT 15
+#define RT5625_SCLK_MCLK (0x0 << 15)
+#define RT5625_SCLK_PLL1 (0x1 << 15)
+#define RT5625_VSCLK_MASK (0x1 << 4)
+#define RT5625_VSCLK_SFT 4
+#define RT5625_VSCLK_PLL2 (0x0<<4)
+#define RT5625_VSCLK_EXTCLK (0x1<<4)
+#define RT5625_SPK_R_MASK (0x7 << 1)
+#define RT5625_SPK_R_SFT 1
+#define RT5625_SPK_R_225V (0x0 << 1)
+#define RT5625_SPK_R_200V (0x1 << 1)
+#define RT5625_SPK_R_175V (0x2 << 1)
+#define RT5625_SPK_R_150V (0x3 << 1)
+#define RT5625_SPK_R_125V (0x4 << 1)
+#define RT5625_SPK_R_100V (0x5 << 1)
+
+/* General Purpose Control Register 2 (0x42) */
+#define RT5625_PLL1_S_MASK (0x3 << 12)
+#define RT5625_PLL1_S_SFT 12
+#define RT5625_PLL1_S_MCLK (0x0 << 12)
+#define RT5625_PLL1_S_BCLK (0x2 << 12)
+#define RT5625_PLL1_S_VBCLK (0x3 << 12)
+
+/* PLL2 Control (0x46) */
+#define RT5625_PLL2_MASK (0x1 << 15)
+#define RT5625_PLL2_DIS (0x0 << 15)
+#define RT5625_PLL2_EN (0x1 << 15)
+#define RT5625_PLL2_R_MASK (0x1)
+#define RT5625_PLL2_R_8X (0x0)
+#define RT5625_PLL2_R_16X (0x1)
+
+/* LDO Control (0x48) */
+#define RT5625_LDO_MASK (0x1 << 15)
+#define RT5625_LDO_DIS (0x0 << 15)
+#define RT5625_LDO_EN (0x1 << 15)
+#define RT5625_LDO_VC_MASK (0xf)
+#define RT5625_LDO_VC_1_55V (0xf<<0)
+#define RT5625_LDO_VC_1_50V (0xe<<0)
+#define RT5625_LDO_VC_1_45V (0xd<<0)
+#define RT5625_LDO_VC_1_40V (0xc<<0)
+#define RT5625_LDO_VC_1_35V (0xb<<0)
+#define RT5625_LDO_VC_1_30V (0xa<<0)
+#define RT5625_LDO_VC_1_25V (0x9<<0)
+#define RT5625_LDO_VC_1_20V (0x8<<0)
+#define RT5625_LDO_VC_1_15V (0x7<<0)
+#define RT5625_LDO_VC_1_05V (0x6<<0)
+#define RT5625_LDO_VC_1_00V (0x5<<0)
+#define RT5625_LDO_VC_0_95V (0x4<<0)
+#define RT5625_LDO_VC_0_90V (0x3<<0)
+#define RT5625_LDO_VC_0_85V (0x2<<0)
+#define RT5625_LDO_VC_0_80V (0x1<<0)
+#define RT5625_LDO_VC_0_75V (0x0<<0)
+
+/* GPIO Pin Configuration (0x4c) */
+#define RT5625_GPIO_5 (0x1 << 5)
+#define RT5625_GPIO_4 (0x1 << 4)
+#define RT5625_GPIO_3 (0x1 << 3)
+#define RT5625_GPIO_2 (0x1 << 2)
+#define RT5625_GPIO_1 (0x1 << 1)
+
+/* MISC Control (0x5e) */
+#define RT5625_FAST_VREF_MASK (0x1 << 15)
+#define RT5625_FAST_VREF_EN (0x0 << 15)
+#define RT5625_FAST_VREF_DIS (0x1 << 15)
+#define RT5625_HP_DEPOP_M2 (0x1 << 8)
+#define RT5625_HP_DEPOP_M1 (0x1 << 9)
+#define RT5625_HPL_MUM_DEPOP (0x1 << 7)
+#define RT5625_HPR_MUM_DEPOP (0x1 << 6)
+#define RT5625_MUM_DEPOP (0x1 << 5)
+
+/* Stereo DAC Clock Control 1 (0x60) */
+#define RT5625_BCLK_DIV1_MASK (0xf << 12)
+#define RT5625_BCLK_DIV1_1 (0x0 << 12)
+#define RT5625_BCLK_DIV1_2 (0x1 << 12)
+#define RT5625_BCLK_DIV1_3 (0x2 << 12)
+#define RT5625_BCLK_DIV1_4 (0x3 << 12)
+#define RT5625_BCLK_DIV1_5 (0x4 << 12)
+#define RT5625_BCLK_DIV1_6 (0x5 << 12)
+#define RT5625_BCLK_DIV1_7 (0x6 << 12)
+#define RT5625_BCLK_DIV1_8 (0x7 << 12)
+#define RT5625_BCLK_DIV1_9 (0x8 << 12)
+#define RT5625_BCLK_DIV1_10 (0x9 << 12)
+#define RT5625_BCLK_DIV1_11 (0xa << 12)
+#define RT5625_BCLK_DIV1_12 (0xb << 12)
+#define RT5625_BCLK_DIV1_13 (0xc << 12)
+#define RT5625_BCLK_DIV1_14 (0xd << 12)
+#define RT5625_BCLK_DIV1_15 (0xe << 12)
+#define RT5625_BCLK_DIV1_16 (0xf << 12)
+#define RT5625_BCLK_DIV2_MASK (0x7 << 8)
+#define RT5625_BCLK_DIV2_2 (0x0 << 8)
+#define RT5625_BCLK_DIV2_4 (0x1 << 8)
+#define RT5625_BCLK_DIV2_8 (0x2 << 8)
+#define RT5625_BCLK_DIV2_16 (0x3 << 8)
+#define RT5625_BCLK_DIV2_32 (0x4 << 8)
+#define RT5625_AD_LRCK_DIV1_MASK (0xf << 4)
+#define RT5625_AD_LRCK_DIV1_1 (0x0 << 4)
+#define RT5625_AD_LRCK_DIV1_2 (0x1 << 4)
+#define RT5625_AD_LRCK_DIV1_3 (0x2 << 4)
+#define RT5625_AD_LRCK_DIV1_4 (0x3 << 4)
+#define RT5625_AD_LRCK_DIV1_5 (0x4 << 4)
+#define RT5625_AD_LRCK_DIV1_6 (0x5 << 4)
+#define RT5625_AD_LRCK_DIV1_7 (0x6 << 4)
+#define RT5625_AD_LRCK_DIV1_8 (0x7 << 4)
+#define RT5625_AD_LRCK_DIV1_9 (0x8 << 4)
+#define RT5625_AD_LRCK_DIV1_10 (0x9 << 4)
+#define RT5625_AD_LRCK_DIV1_11 (0xa << 4)
+#define RT5625_AD_LRCK_DIV1_12 (0xb << 4)
+#define RT5625_AD_LRCK_DIV1_13 (0xc << 4)
+#define RT5625_AD_LRCK_DIV1_14 (0xd << 4)
+#define RT5625_AD_LRCK_DIV1_15 (0xe << 4)
+#define RT5625_AD_LRCK_DIV1_16 (0xf << 4)
+#define RT5625_AD_LRCK_DIV2_MASK (0x7 << 1)
+#define RT5625_AD_LRCK_DIV2_2 (0x0 << 1)
+#define RT5625_AD_LRCK_DIV2_4 (0x1 << 1)
+#define RT5625_AD_LRCK_DIV2_8 (0x2 << 1)
+#define RT5625_AD_LRCK_DIV2_16 (0x3 << 1)
+#define RT5625_AD_LRCK_DIV2_32 (0x4 << 1)
+#define RT5625_DA_LRCK_DIV_MASK (1)
+#define RT5625_DA_LRCK_DIV_32 (0)
+#define RT5625_DA_LRCK_DIV_64 (1)
+
+/* Stereo DAC Clock Control 2 (0x62) */
+#define RT5625_DF_DIV1_MASK (0xF << 12)
+#define RT5625_DF_DIV1_1 (0x0 << 12)
+#define RT5625_DF_DIV1_2 (0x1 << 12)
+#define RT5625_DF_DIV1_3 (0x2 << 12)
+#define RT5625_DF_DIV1_4 (0x3 << 12)
+#define RT5625_DF_DIV1_5 (0x4 << 12)
+#define RT5625_DF_DIV1_6 (0x5 << 12)
+#define RT5625_DF_DIV1_7 (0x6 << 12)
+#define RT5625_DF_DIV1_8 (0x7 << 12)
+#define RT5625_DF_DIV1_9 (0x8 << 12)
+#define RT5625_DF_DIV1_10 (0x9 << 12)
+#define RT5625_DF_DIV1_11 (0xA << 12)
+#define RT5625_DF_DIV1_12 (0xB << 12)
+#define RT5625_DF_DIV1_13 (0xC << 12)
+#define RT5625_DF_DIV1_14 (0xD << 12)
+#define RT5625_DF_DIV1_15 (0xE << 12)
+#define RT5625_DF_DIV1_16 (0xF << 12)
+#define RT5625_DF_DIV2_MASK (0x7 << 9)
+#define RT5625_DF_DIV2_2 (0x0 << 9)
+#define RT5625_DF_DIV2_4 (0x1 << 9)
+#define RT5625_DF_DIV2_8 (0x2 << 9)
+#define RT5625_DF_DIV2_16 (0x3 << 9)
+#define RT5625_DF_DIV2_32 (0x4 << 9)
+#define RT5625_AF_DIV1_MASK (0xF << 4)
+#define RT5625_AF_DIV1_1 (0x0 << 4)
+#define RT5625_AF_DIV1_2 (0x1 << 4)
+#define RT5625_AF_DIV1_3 (0x2 << 4)
+#define RT5625_AF_DIV1_4 (0x3 << 4)
+#define RT5625_AF_DIV1_5 (0x4 << 4)
+#define RT5625_AF_DIV1_6 (0x5 << 4)
+#define RT5625_AF_DIV1_7 (0x6 << 4)
+#define RT5625_AF_DIV1_8 (0x7 << 4)
+#define RT5625_AF_DIV1_9 (0x8 << 4)
+#define RT5625_AF_DIV1_10 (0x9 << 4)
+#define RT5625_AF_DIV1_11 (0xA << 4)
+#define RT5625_AF_DIV1_12 (0xB << 4)
+#define RT5625_AF_DIV1_13 (0xC << 4)
+#define RT5625_AF_DIV1_14 (0xD << 4)
+#define RT5625_AF_DIV1_15 (0xE << 4)
+#define RT5625_AF_DIV1_16 (0xF << 4)
+#define RT5625_AF_DIV2_MASK (0x7 << 1)
+#define RT5625_AF_DIV2_1 (0x0 << 1)
+#define RT5625_AF_DIV2_2 (0x1 << 1)
+#define RT5625_AF_DIV2_4 (0x2 << 1)
+#define RT5625_AF_DIV2_8 (0x3 << 1)
+#define RT5625_AF_DIV2_16 (0x4 << 1)
+#define RT5625_AF_DIV2_32 (0x5 << 1)
+
+/* Voice DAC PCM Clock Control 1 (0x64) */
+#define RT5625_VBCLK_DIV1_MASK (0xF << 12)
+#define RT5625_VBCLK_DIV1_1 (0x0 << 12)
+#define RT5625_VBCLK_DIV1_2 (0x1 << 12)
+#define RT5625_VBCLK_DIV1_3 (0x2 << 12)
+#define RT5625_VBCLK_DIV1_4 (0x3 << 12)
+#define RT5625_VBCLK_DIV1_5 (0x4 << 12)
+#define RT5625_VBCLK_DIV1_6 (0x5 << 12)
+#define RT5625_VBCLK_DIV1_7 (0x6 << 12)
+#define RT5625_VBCLK_DIV1_8 (0x7 << 12)
+#define RT5625_VBCLK_DIV1_9 (0x8 << 12)
+#define RT5625_VBCLK_DIV1_10 (0x9 << 12)
+#define RT5625_VBCLK_DIV1_11 (0xA << 12)
+#define RT5625_VBCLK_DIV1_12 (0xB << 12)
+#define RT5625_VBCLK_DIV1_13 (0xC << 12)
+#define RT5625_VBCLK_DIV1_14 (0xD << 12)
+#define RT5625_VBCLK_DIV1_15 (0xE << 12)
+#define RT5625_VBCLK_DIV1_16 (0xF << 12)
+#define RT5625_VBCLK_DIV2_MASK (0x7 << 8)
+#define RT5625_VBCLK_DIV2_2 (0x0 << 8)
+#define RT5625_VBCLK_DIV2_4 (0x1 << 8)
+#define RT5625_VBCLK_DIV2_8 (0x2 << 8)
+#define RT5625_VBCLK_DIV2_16 (0x3 << 8)
+#define RT5625_VBCLK_DIV2_32 (0x4 << 8)
+#define RT5625_AD_VLRCK_DIV1_MASK (0xF << 4)
+#define RT5625_AD_VLRCK_DIV1_1 (0x0 << 4)
+#define RT5625_AD_VLRCK_DIV1_2 (0x1 << 4)
+#define RT5625_AD_VLRCK_DIV1_3 (0x2 << 4)
+#define RT5625_AD_VLRCK_DIV1_4 (0x3 << 4)
+#define RT5625_AD_VLRCK_DIV1_5 (0x4 << 4)
+#define RT5625_AD_VLRCK_DIV1_6 (0x5 << 4)
+#define RT5625_AD_VLRCK_DIV1_7 (0x6 << 4)
+#define RT5625_AD_VLRCK_DIV1_8 (0x7 << 4)
+#define RT5625_AD_VLRCK_DIV1_9 (0x8 << 4)
+#define RT5625_AD_VLRCK_DIV1_10 (0x9 << 4)
+#define RT5625_AD_VLRCK_DIV1_11 (0xA << 4)
+#define RT5625_AD_VLRCK_DIV1_12 (0xB << 4)
+#define RT5625_AD_VLRCK_DIV1_13 (0xC << 4)
+#define RT5625_AD_VLRCK_DIV1_14 (0xD << 4)
+#define RT5625_AD_VLRCK_DIV1_15 (0xE << 4)
+#define RT5625_AD_VLRCK_DIV1_16 (0xF << 4)
+#define RT5625_AD_VLRCK_DIV2_MASK (0x7 << 1)
+#define RT5625_AD_VLRCK_DIV2_2 (0x0 << 1)
+#define RT5625_AD_VLRCK_DIV2_4 (0x1 << 1)
+#define RT5625_AD_VLRCK_DIV2_8 (0x2 << 1)
+#define RT5625_AD_VLRCK_DIV2_16 (0x3 << 1)
+#define RT5625_AD_VLRCK_DIV2_32 (0x4 << 1)
+#define RT5625_DA_VLRCK_DIV_MASK (1)
+#define RT5625_DA_VLRCK_DIV_32 (0)
+#define RT5625_DA_VLRCK_DIV_64 (1)
+
+/* Psedueo Stereo & Spatial Effect Block Control (0x68) */
+#define RT5625_SP_CTRL_EN (0x1 << 15)
+#define RT5625_APF_EN (0x1 << 14)
+#define RT5625_PS_EN (0x1 << 13)
+#define RT5625_STO_EXP_EN (0x1 << 12)
+#define RT5625_SP_3D_G1_MASK (0x3 << 10)
+#define RT5625_SP_3D_G1_1_0 (0x0 << 10)
+#define RT5625_SP_3D_G1_1_5 (0x1 << 10)
+#define RT5625_SP_3D_G1_2_0 (0x2 << 10)
+#define RT5625_SP_3D_R1_MASK (0x3 << 8)
+#define RT5625_SP_3D_R1_0_0 (0x0 << 8)
+#define RT5625_SP_3D_R1_0_66 (0x1 << 8)
+#define RT5625_SP_3D_R1_1_0 (0x2 << 8)
+#define RT5625_SP_3D_G2_MASK (0x3 << 6)
+#define RT5625_SP_3D_G2_1_0 (0x0 << 6)
+#define RT5625_SP_3D_G2_1_5 (0x1 << 6)
+#define RT5625_SP_3D_G2_2_0 (0x2 << 6)
+#define RT5625_SP_3D_R2_MASK (0x3 << 4)
+#define RT5625_SP_3D_R2_0_0 (0x0 << 4)
+#define RT5625_SP_3D_R2_0_66 (0x1 << 4)
+#define RT5625_SP_3D_R2_1_0 (0x2 << 4)
+#define RT5625_APF_MASK (0x3)
+#define RT5625_APF_48K (0x3)
+#define RT5625_APF_44_1K (0x2)
+#define RT5625_APF_32K (0x1)
+
+/* EQ Control and Status /ADC HPF Control (0x6E) */
+#define RT5625_EN_HW_EQ_BLK (0x1 << 15)
+#define RT5625_EQ_SRC_DAC (0x0 << 14)
+#define RT5625_EQ_SRC_ADC (0x1 << 14)
+#define RT5625_EQ_CHG_EN (0x1 << 7)
+#define RT5625_EN_HW_EQ_HPF (0x1 << 4)
+#define RT5625_EN_HW_EQ_BP3 (0x1 << 3)
+#define RT5625_EN_HW_EQ_BP2 (0x1 << 2)
+#define RT5625_EN_HW_EQ_BP1 (0x1 << 1)
+#define RT5625_EN_HW_EQ_LPF (0x1 << 0)
+
+/* VoDSP Register Command (0x74) */
+#define RT5625_DSP_BUSY_MASK (0x1 << 15)
+#define RT5625_DSP_DS_MASK (0x1 << 14)
+#define RT5625_DSP_DS_VODSP (0x0 << 14)
+#define RT5625_DSP_DS_REG72 (0x1 << 14)
+#define RT5625_DSP_CLK_MASK (0x3 << 12)
+#define RT5625_DSP_CLK_12_288M (0x0 << 12)
+#define RT5625_DSP_CLK_6_144M (0x1 << 12)
+#define RT5625_DSP_CLK_3_072M (0x2 << 12)
+#define RT5625_DSP_CLK_2_048M (0x3 << 12)
+#define RT5625_DSP_R_EN (0x1 << 9)
+#define RT5625_DSP_W_EN (0x1 << 8)
+#define RT5625_DSP_CMD_MASK (0xff)
+#define RT5625_DSP_CMD_SFT 0
+#define RT5625_DSP_CMD_MW (0x3B) /* Memory Write */
+#define RT5625_DSP_CMD_MR (0x37) /* Memory Read */
+#define RT5625_DSP_CMD_RR (0x60) /* Register Read */
+#define RT5625_DSP_CMD_RW (0x68) /* Register Write */
+
+
+/* Index(0x20) for Auto Volume Control */
+#define RT5625_AVC_CH_MASK (0x1 << 7)
+#define RT5625_AVC_CH_L_CH (0x0 << 7)
+#define RT5625_AVC_CH_R_CH (0x1 << 7)
+#define RT5625_AVC_GAIN_EN (0x1 << 15)
+
+
+
+enum {
+ RT5625_AIF1,
+ RT5625_AIF2,
};
-struct rt56xx_cmd
-{
- size_t number;
- struct rt56xx_reg_state __user *buf;
+/* System Clock Source */
+enum {
+ RT5625_SCLK_S_MCLK,
+ RT5625_SCLK_S_PLL,
};
-
-enum
-{
- RT_READ_CODEC_REG_IOCTL = _IOR('R', 0x01, struct rt56xx_cmd),
- RT_READ_ALL_CODEC_REG_IOCTL = _IOR('R', 0x02, struct rt56xx_cmd),
- RT_WRITE_CODEC_REG_IOCTL = _IOW('R', 0x03, struct rt56xx_cmd),
-};
-
-#endif
-
-
-enum pll_sel
-{
- RT5625_PLL1_FROM_MCLK = 0,
- RT5625_PLL1_FROM_BCLK,
- RT5625_PLL1_FROM_VBCLK,
+enum pll_sel {
+ RT5625_PLL_MCLK = 0,
+ RT5625_PLL_MCLK_TO_VSYSCLK,
+ RT5625_PLL_BCLK,
+ RT5625_PLL_VBCLK,
};
-enum AEC_MODE
-{
- PCM_IN_PCM_OUT = 0,
- ANALOG_IN_ANALOG_OUT,
- DAC_IN_ADC_OUT,
- VODSP_AEC_DISABLE
+enum {
+ RT5625_AEC_DIS,
+ RT5625_AEC_EN,
};
-enum
-{
- PCM_MASTER_MODE_A=0,
- PCM_MASTER_MODE_B,
- PCM_SLAVE_MODE_A,
- PCM_SLAVE_MODE_B,
+//#ifdef RT5625_F_SMT_PHO
+enum {
+ RT5625_PLL_DIS,
+ RT5625_PLL_112896_225792,
+ RT5625_PLL_112896_24576,
};
+//#endif
-
-enum RT5625_FUNC_SEL
-{
- RT5625_AEC_DISABLE =0,
- RT5625_AEC_PCM_IN_OUT,
- RT5625_AEC_IIS_IN_OUT,
- RT5625_AEC_ANALOG_IN_OUT,
-
-};
-
-
-struct rt5625_setup_data {
- int i2c_bus;
- int i2c_address;
-};
-
-typedef struct
-{
- unsigned short int VoiceDSPIndex;
- unsigned short int VoiceDSPValue;
-
-}Voice_DSP_Reg;
-
-extern struct snd_soc_dai rt5625_dai[];
-extern struct snd_soc_codec_device soc_codec_dev_rt5625;
+typedef struct {
+ unsigned short index;
+ unsigned short value;
+} rt5625_dsp_reg;
#endif
return 0;
}
+int lineout_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *control, int event)
+{
+// struct snd_soc_codec *codec = w->codec;
+// struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
+// struct wm8994_pdata *pdata = wm8994->pdata;
+
+// printk("Enter %s::%s---%d\n",__FILE__,__FUNCTION__,__LINE__);
+#ifdef CONFIG_PHONE_INCALL_IS_SUSPEND
+ switch (event) {
+ case SND_SOC_DAPM_POST_PMU:
+ printk("wm8994 is incall status\n");
+ snd_soc_incall_status(1,1);
+ break;
+
+ case SND_SOC_DAPM_PRE_PMD:
+ printk("wm8994 exit incall status\n");
+ snd_soc_incall_status(1,0);
+ break;
+
+ default:
+ BUG();
+ break;
+ }
+#endif
+ return 0;
+}
+
static int aif1clk_ev(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
static const struct snd_soc_dapm_widget wm8994_PA_dapm_widgets[] = {
SND_SOC_DAPM_SPK("PA Driver", wm8994_PA_event),
};
+/*
+static const struct snd_soc_dapm_route wm8994_lineout_status_intercon[] = {
+ { "LINEOUT1N STATUS", NULL,"LINEOUT1N Driver"},
+ { "LINEOUT1P STATUS", NULL,"LINEOUT1P Driver"},
+ { "LINEOUT1N", NULL, "LINEOUT1N STATUS" },
+ { "LINEOUT1P", NULL, "LINEOUT1P STATUS" },
+};
+static const struct snd_soc_dapm_widget wm8994_lineout_status_dapm_widgets[] = {
+SND_SOC_DAPM_LINE("LINEOUT1N Driver", lineout_event),
+SND_SOC_DAPM_LINE("LINEOUT1P Driver", lineout_event),
+};
+*/
/* The size in bits of the FLL divide multiplied by 10
* to allow rounding later */
#define FIXED_FLL_SIZE ((1 << 16) * 10)
struct wm8994 *control = codec->control_data;
int i, ret;
-// printk("on wm8994.c wm8994_suspend\n");
+#ifdef CONFIG_PHONE_INCALL_IS_SUSPEND
+ DBG("on wm8994.c wm8994_suspend\n");
+ if(snd_soc_incall_status(0,0))
+ {
+ DBG("incalling cannot suspend\n");
+ return 0;
+ }
+#endif
switch (control->type) {
case WM8994:
snd_soc_update_bits(codec, WM8994_MICBIAS, WM8994_MICD_ENA, 0);
int i, ret;
unsigned int val, mask;
-// printk("on wm8994.c wm8994_resume\n");
+#ifdef CONFIG_PHONE_INCALL_IS_SUSPEND
+ printk("on wm8994.c wm8994_resume\n");
+ if(snd_soc_incall_status(0,0))
+ {
+ DBG("incalling cannot resume\n");
+ return 0;
+ }
+#endif
+
if (wm8994->revision < 4) {
/* force a HW read */
val = wm8994_reg_read(codec->control_data,
}
else
dev_info(codec->dev, "have not pa control\n");
-
+
+ //lineout off
+// snd_soc_dapm_new_controls(dapm, wm8994_lineout_status_dapm_widgets,
+// ARRAY_SIZE(wm8994_lineout_status_dapm_widgets));
+// snd_soc_dapm_add_routes(dapm, wm8994_lineout_status_intercon,
+// ARRAY_SIZE(wm8994_lineout_status_intercon));
+
return 0;
err_irq:
const struct firmware *mbc;
const struct firmware *mbc_vss;
const struct firmware *enh_eq;
+
+ unsigned int lineout_status:1;
};
+int lineout_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *control, int event);
+
#endif
#include <sound/tlv.h>
#include "wm8993.h"
+#include "wm8994.h"
#include "wm_hubs.h"
const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0);
SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0,
line2p_mix, ARRAY_SIZE(line2p_mix)),
-SND_SOC_DAPM_PGA("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0,
- NULL, 0),
-SND_SOC_DAPM_PGA("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0,
- NULL, 0),
+//SND_SOC_DAPM_PGA("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0,
+// NULL, 0),
+//SND_SOC_DAPM_PGA("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0,
+// NULL, 0),
+SND_SOC_DAPM_PGA_E("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0,
+ NULL, 0,
+ lineout_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
+SND_SOC_DAPM_PGA_E("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0,
+ NULL, 0,
+ lineout_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
+
SND_SOC_DAPM_PGA("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0,
NULL, 0),
SND_SOC_DAPM_PGA("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0,
tristate "SoC I2S Audio support for rockchip - RT5625"
depends on SND_RK29_SOC
select SND_RK29_SOC_I2S
- select SND_SOC_RT5625
help
Say Y if you want to add support for SoC audio on rockchip
with the RT5625.
+choice
+ depends on SND_RK29_SOC_RT5625
+ prompt "RT5625 hardware select"
+
+ config SND_SOC_RT5625_SPK_FORM_SPKOUT
+ bool "spk from spkout"
+ select SND_SOC_RT5625
+ help
+ if your codec output hardware connect is spk from spkout, choose it
+
+ config SND_SOC_RT5625_SPK_FORM_HPOUT
+ bool "spk from hpout"
+ select SND_SOC_RT5625
+ help
+ if your codec output hardware connect is spk from spkout, choose it
+endchoice
+
config SND_RK29_SOC_WM8994
tristate "SoC I2S Audio support for rockchip - WM8994"
depends on SND_RK29_SOC
default n
help
adjust volume by codec
-
+
+config PHONE_INCALL_IS_SUSPEND
+ bool "Incalling Whether suspend codec"
+ default n
+ help
+ set "y" phone incall status cannot into suspend codec
+
endif
-/*
- * rk29_rt5625.c -- SoC audio for rockchip
- *
- * Driver for rockchip rt5625 audio
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- *
- */
-
-#include <linux/module.h>
-#include <linux/device.h>
-#include <sound/core.h>
-#include <sound/pcm.h>
-#include <sound/soc.h>
-#include <sound/soc-dapm.h>
-#include <asm/io.h>
-#include <mach/hardware.h>
-#include <mach/rk29_iomap.h>
-#include "../codecs/rt5625.h"
-#include "rk29_pcm.h"
-#include "rk29_i2s.h"
-
-#if 0
-#define DBG(x...) printk(KERN_INFO x)
-#else
-#define DBG(x...)
-#endif
-
-static int rk29_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params)
-{
- struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
- struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
- unsigned int pll_out = 0;
- int ret;
-
- DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__);
- /*by Vincent Hsiung for EQ Vol Change*/
- #define HW_PARAMS_FLAG_EQVOL_ON 0x21
- #define HW_PARAMS_FLAG_EQVOL_OFF 0x22
- if (codec_dai->ops->hw_params && ((params->flags == HW_PARAMS_FLAG_EQVOL_ON) || (params->flags == HW_PARAMS_FLAG_EQVOL_OFF)))
- {
- ret = codec_dai->ops->hw_params(substream, params, codec_dai); //by Vincent
- DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__);
- } else {
-
- /* set codec DAI configuration */
- #if defined (CONFIG_SND_RK29_CODEC_SOC_SLAVE)
-
- ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
- SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
- #endif
- #if defined (CONFIG_SND_RK29_CODEC_SOC_MASTER)
-
- ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
- SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM );
- #endif
- if (ret < 0)
- return ret;
-
- /* set cpu DAI configuration */
- #if defined (CONFIG_SND_RK29_CODEC_SOC_SLAVE)
- ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
- SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
- #endif
- #if defined (CONFIG_SND_RK29_CODEC_SOC_MASTER)
- ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
- SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
- #endif
- if (ret < 0)
- return ret;
- }
-
- switch(params_rate(params)) {
- case 8000:
- case 16000:
- case 24000:
- case 32000:
- case 48000:
- pll_out = 12288000;
- break;
- case 11025:
- case 22050:
- case 44100:
- pll_out = 11289600;
- break;
- default:
- DBG("Enter:%s, %d, Error rate=%d\n", __FUNCTION__, __LINE__, params_rate(params));
- return -EINVAL;
- break;
- }
-
- DBG("Enter:%s, %d, rate=%d\n", __FUNCTION__, __LINE__, params_rate(params));
-
- /*Set the system clk for codec*/
- ret = snd_soc_dai_set_sysclk(codec_dai, 0, pll_out, SND_SOC_CLOCK_IN);
- if (ret < 0)
- {
- DBG("rk29_hw_params_rt5625:failed to set the sysclk for codec side\n");
- return ret;
- }
-
- snd_soc_dai_set_sysclk(cpu_dai, 0, pll_out, 0);
- snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_BCLK, (pll_out/4)/params_rate(params)-1);
- snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_MCLK, 3);
-
- DBG("Enter:%s, %d, pll_out/4/params_rate(params) = %d \n", __FUNCTION__, __LINE__, (pll_out/4)/params_rate(params));
-
- return 0;
-}
-
-static const struct snd_soc_dapm_widget rt5625_dapm_widgets[] = {
-
- SND_SOC_DAPM_MIC("Mic Jack", NULL),
- SND_SOC_DAPM_SPK("Ext Spk", NULL),
- SND_SOC_DAPM_HP("Headphone Jack", NULL),
-
-};
-
-static const struct snd_soc_dapm_route audio_map[]={
-
- /* Mic Jack --> MIC_IN*/
- {"Mic1 Bias", NULL, "Mic Jack"},
- {"Mic1", NULL, "Mic1 Bias"},
- /* HP_OUT --> Headphone Jack */
- {"Headphone Jack", NULL, "HPL"},
- {"Headphone Jack", NULL, "HPR"},
- /* LINE_OUT --> Ext Speaker */
- {"Ext Spk", NULL, "SPKL"},
- {"Ext Spk", NULL, "SPKR"},
-} ;
-
-/*
- * Logic for a rt5625 as connected on a rockchip board.
- */
-static int rk29_rt5625_init(struct snd_soc_codec *codec)
-{
- DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__);
-
- /* Add specific widgets */
- snd_soc_dapm_new_controls(codec, rt5625_dapm_widgets,
- ARRAY_SIZE(rt5625_dapm_widgets));
-
- /* Set up specific audio path audio_mapnects */
- snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
- //snd_soc_dapm_nc_pin(codec, "HP_L");
- //snd_soc_dapm_nc_pin(codec, "HP_R");
- snd_soc_dapm_sync(codec);
-
- return 0;
-}
-
-static int rt5625_voice_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params)
-{
- struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
- struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
- unsigned int pll_out = 0;
- int ret;
-
- DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__);
-
- /* set codec DAI configuration */
- /*#if defined (CONFIG_SND_CODEC_SOC_SLAVE)
- DBG("Enter::%s----codec slave\n",__FUNCTION__);
-
- ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_A |
- SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
- #endif*/
- //#if defined (CONFIG_SND_CODEC_SOC_MASTER)
- DBG("Enter::%s----codec master\n",__FUNCTION__);
-
- ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_A |
- SND_SOC_DAIFMT_IB_NF | SND_SOC_DAIFMT_CBM_CFM );
- //#endif
-
- switch(params_rate(params)) {
- case 8000:
- case 16000:
- case 24000:
- case 32000:
- case 48000:
- pll_out = 12288000;
- break;
- case 11025:
- case 22050:
- case 44100:
- pll_out = 11289600;
- break;
- default:
- DBG("Enter:%s, %d, Error rate=%d\n", __FUNCTION__, __LINE__, params_rate(params));
- return -EINVAL;
- break;
- }
-
- snd_soc_dai_set_pll(codec_dai, RT5625_PLL1_FROM_MCLK, pll_out, 24576000);
-
- /*Set the system clk for codec*/
- ret = snd_soc_dai_set_sysclk(codec_dai, 0, 24576000, SND_SOC_CLOCK_IN);
-
- if (ret < 0) {
- printk("rk29_hw_params_rt5625:failed to set the sysclk for codec side\n");
- return ret;
- }
-
- ret = snd_soc_dai_set_sysclk(cpu_dai, 0, pll_out, 0);
-
- return 0;
-}
-
-static struct snd_soc_ops rk29_ops = {
- .hw_params = rk29_hw_params,
-};
-
-static struct snd_soc_ops rt5625_voice_ops = {
- .hw_params = rt5625_voice_hw_params,
-};
-
-static struct snd_soc_dai_link rk29_dai[] = {
- {
- .name = "RT5625-1",
- .stream_name = "RT5625 PCM-1",
- .cpu_dai = &rk29_i2s_dai,
- .codec_dai = &rt5625_dai[0],
- .init = rk29_rt5625_init,
- .ops = &rk29_ops,
- },
- {
- .name = "RT5625-2",
- .stream_name = "RT5625 PCM-2",
- .cpu_dai = &rk29_i2s_dai,
- .codec_dai = &rt5625_dai[1],
- .init = rk29_rt5625_init,
- .ops = &rt5625_voice_ops,
- }
-};
-
-static struct snd_soc_card snd_soc_card_rk29 = {
- .name = "RK29_RT5625",
- .platform = &rk29_soc_platform,
- .dai_link = &rk29_dai,
- .num_links = 1,
-};
-
-
-static struct snd_soc_device rk29_snd_devdata = {
- .card = &snd_soc_card_rk29,
- .codec_dev = &soc_codec_dev_rt5625,
-};
-
-static struct platform_device *rk29_snd_device;
-
-static int __init audio_card_init(void)
-{
- int ret =0;
-
- DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__);
-
- rk29_snd_device = platform_device_alloc("soc-audio", -1);
- if (!rk29_snd_device) {
- DBG("platform device allocation failed\n");
- ret = -ENOMEM;
- return ret;
- }
- platform_set_drvdata(rk29_snd_device, &rk29_snd_devdata);
- rk29_snd_devdata.dev = &rk29_snd_device->dev;
- ret = platform_device_add(rk29_snd_device);
- if (ret) {
- DBG("platform device add failed\n");
- platform_device_put(rk29_snd_device);
- }
- return ret;
-}
-
-static void __exit audio_card_exit(void)
-{
- platform_device_unregister(rk29_snd_device);
-}
-
-module_init(audio_card_init);
-module_exit(audio_card_exit);
-/* Module information */
-MODULE_AUTHOR("rockchip");
-MODULE_DESCRIPTION("ROCKCHIP i2s ASoC Interface");
-MODULE_LICENSE("GPL");
+/*\r
+ * rk29_rt5625.c -- SoC audio for rockchip\r
+ *\r
+ * Driver for rockchip rt5625 audio\r
+ *\r
+ * This program is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License as published by the\r
+ * Free Software Foundation; either version 2 of the License, or (at your\r
+ * option) any later version.\r
+ *\r
+ *\r
+ */\r
+\r
+#include <linux/module.h>\r
+#include <linux/device.h>\r
+#include <sound/core.h>\r
+#include <sound/pcm.h>\r
+#include <sound/soc.h>\r
+#include <sound/soc-dapm.h>\r
+#include <asm/io.h>\r
+#include <mach/hardware.h>\r
+#include <mach/rk29_iomap.h>\r
+#include "../codecs/rt5625.h"\r
+#include "rk29_pcm.h"\r
+#include "rk29_i2s.h"\r
+\r
+#if 1\r
+#define DBG(x...) printk(KERN_INFO x)\r
+#else\r
+#define DBG(x...)\r
+#endif\r
+\r
+static int rk29_hw_params(struct snd_pcm_substream *substream,\r
+ struct snd_pcm_hw_params *params)\r
+{\r
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;\r
+ struct snd_soc_dai *codec_dai = rtd->codec_dai;\r
+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;\r
+ unsigned int pll_out = 0;\r
+ int ret;\r
+\r
+ DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__); \r
+ /*by Vincent Hsiung for EQ Vol Change*/\r
+ #define HW_PARAMS_FLAG_EQVOL_ON 0x21\r
+ #define HW_PARAMS_FLAG_EQVOL_OFF 0x22\r
+ if (codec_dai->driver->ops->hw_params && ((params->flags == HW_PARAMS_FLAG_EQVOL_ON) || (params->flags == HW_PARAMS_FLAG_EQVOL_OFF)))\r
+ {\r
+ ret = codec_dai->driver->ops->hw_params(substream, params, codec_dai); //by Vincent\r
+ DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__);\r
+ } else {\r
+ \r
+ /* set codec DAI configuration */\r
+ #if defined (CONFIG_SND_RK29_CODEC_SOC_SLAVE) \r
+\r
+ ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |\r
+ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);\r
+ #endif \r
+ #if defined (CONFIG_SND_RK29_CODEC_SOC_MASTER) \r
+\r
+ ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |\r
+ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM ); \r
+ #endif\r
+ if (ret < 0)\r
+ return ret; \r
+\r
+ /* set cpu DAI configuration */\r
+ #if defined (CONFIG_SND_RK29_CODEC_SOC_SLAVE) \r
+ ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |\r
+ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);\r
+ #endif \r
+ #if defined (CONFIG_SND_RK29_CODEC_SOC_MASTER) \r
+ ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |\r
+ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS); \r
+ #endif \r
+ if (ret < 0)\r
+ return ret;\r
+ }\r
+\r
+ switch(params_rate(params)) {\r
+ case 8000:\r
+ case 16000:\r
+ case 24000:\r
+ case 32000:\r
+ case 48000:\r
+ pll_out = 12288000;\r
+ break;\r
+ case 11025:\r
+ case 22050:\r
+ case 44100:\r
+ pll_out = 11289600;\r
+ break;\r
+ default:\r
+ DBG("Enter:%s, %d, Error rate=%d\n", __FUNCTION__, __LINE__, params_rate(params));\r
+ return -EINVAL;\r
+ break;\r
+ }\r
+\r
+ DBG("Enter:%s, %d, rate=%d\n", __FUNCTION__, __LINE__, params_rate(params));\r
+\r
+ /*Set the system clk for codec*/\r
+ ret = snd_soc_dai_set_sysclk(codec_dai, 0, pll_out, SND_SOC_CLOCK_IN);\r
+ if (ret < 0)\r
+ {\r
+ DBG("rk29_hw_params_rt5625:failed to set the sysclk for codec side\n"); \r
+ return ret;\r
+ }\r
+\r
+ snd_soc_dai_set_sysclk(cpu_dai, 0, pll_out, 0);\r
+ snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_BCLK, (pll_out/4)/params_rate(params)-1);\r
+ snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_MCLK, 3);\r
+\r
+ DBG("Enter:%s, %d, pll_out/4/params_rate(params) = %d \n", __FUNCTION__, __LINE__, (pll_out/4)/params_rate(params));\r
+ \r
+ return 0;\r
+}\r
+\r
+static int rt5625_voice_hw_params(struct snd_pcm_substream *substream,\r
+ struct snd_pcm_hw_params *params)\r
+{\r
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;\r
+ struct snd_soc_dai *codec_dai = rtd->codec_dai;\r
+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;\r
+ unsigned int pll_out = 0;\r
+ int ret;\r
+\r
+ DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__); \r
+ \r
+ /* set codec DAI configuration */\r
+ //#if defined (CONFIG_SND_CODEC_SOC_SLAVE) \r
+ DBG("Enter::%s----codec slave\n",__FUNCTION__);\r
+\r
+ ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_A |\r
+ SND_SOC_DAIFMT_IB_NF | SND_SOC_DAIFMT_CBS_CFS);\r
+ /*#endif\r
+ //#if defined (CONFIG_SND_CODEC_SOC_MASTER) \r
+ DBG("Enter::%s----codec master\n",__FUNCTION__);\r
+\r
+ ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_A |\r
+ SND_SOC_DAIFMT_IB_NF | SND_SOC_DAIFMT_CBM_CFM ); \r
+ #endif*/\r
+\r
+ switch(params_rate(params)) {\r
+ case 8000:\r
+ case 16000:\r
+ case 24000:\r
+ case 32000:\r
+ case 48000:\r
+ pll_out = 12288000;\r
+ break;\r
+ case 11025:\r
+ case 22050:\r
+ case 44100:\r
+ pll_out = 11289600;\r
+ break;\r
+ default:\r
+ DBG("Enter:%s, %d, Error rate=%d\n", __FUNCTION__, __LINE__, params_rate(params));\r
+ return -EINVAL;\r
+ break;\r
+ }\r
+\r
+ snd_soc_dai_set_pll(codec_dai, RT5625_PLL_MCLK_TO_VSYSCLK, 0, pll_out, 24576000);\r
+\r
+ /*Set the system clk for codec*/\r
+ ret = snd_soc_dai_set_sysclk(codec_dai, 0, 24576000, SND_SOC_CLOCK_IN);\r
+\r
+ if (ret < 0) {\r
+ printk("rk29_hw_params_rt5625:failed to set the sysclk for codec side\n"); \r
+ return ret;\r
+ }\r
+\r
+ ret = snd_soc_dai_set_sysclk(cpu_dai, 0, pll_out, 0);\r
+ \r
+ return 0;\r
+}\r
+\r
+static struct snd_soc_ops rk29_ops = {\r
+ .hw_params = rk29_hw_params,\r
+};\r
+\r
+static struct snd_soc_ops rt5625_voice_ops = {\r
+ .hw_params = rt5625_voice_hw_params,\r
+};\r
+\r
+static struct snd_soc_dai_link rk29_dai[] = {\r
+ {\r
+ .name = "RT5625 I2S1",\r
+ .stream_name = "RT5625 PCM",\r
+ .codec_name = "rt5625.0-001f",\r
+ .platform_name = "rockchip-audio",\r
+ .cpu_dai_name = "rk29_i2s.0",\r
+ .codec_dai_name = "rt5625-aif1",\r
+ .ops = &rk29_ops,\r
+ },\r
+ {\r
+ .name = "RT5625 I2S2",\r
+ .stream_name = "RT5625 PCM",\r
+ .codec_name = "rt5625.0-001f",\r
+ .platform_name = "rockchip-audio",\r
+ .cpu_dai_name = "rk29_i2s.0",\r
+ .codec_dai_name = "rt5625-aif2",\r
+ .ops = &rt5625_voice_ops,\r
+ },\r
+};\r
+\r
+static struct snd_soc_card snd_soc_card_rk29 = {\r
+ .name = "RK29_RT5625",\r
+ .dai_link = rk29_dai,\r
+ .num_links = 2,\r
+};\r
+\r
+static struct platform_device *rk29_snd_device;\r
+\r
+static int __init audio_card_init(void)\r
+{\r
+ int ret =0;\r
+\r
+ DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__);\r
+\r
+ rk29_snd_device = platform_device_alloc("soc-audio", -1);\r
+ if (!rk29_snd_device) {\r
+ printk("platform device allocation failed\n");\r
+ return -ENOMEM;\r
+ }\r
+\r
+ platform_set_drvdata(rk29_snd_device, &snd_soc_card_rk29);\r
+ ret = platform_device_add(rk29_snd_device);\r
+ if (ret) {\r
+ printk("platform device add failed\n");\r
+\r
+ platform_device_put(rk29_snd_device);\r
+ return ret;\r
+ }\r
+ \r
+ return ret;\r
+}\r
+\r
+static void __exit audio_card_exit(void)\r
+{\r
+ platform_device_unregister(rk29_snd_device);\r
+}\r
+\r
+module_init(audio_card_init);\r
+module_exit(audio_card_exit);\r
+/* Module information */\r
+MODULE_AUTHOR("rockchip");\r
+MODULE_DESCRIPTION("ROCKCHIP i2s ASoC Interface");\r
+MODULE_LICENSE("GPL");\r
.pointer = soc_pcm_pointer,
};
+#ifdef CONFIG_PHONE_INCALL_IS_SUSPEND
+int snd_soc_incall_status(int read_or_write, int status)
+{
+ static int now_status = 0;
+ if(read_or_write == 1)
+ {//write
+ now_status = status;
+ }
+
+ return now_status;
+}
+EXPORT_SYMBOL_GPL(snd_soc_incall_status);
+#endif
+
+
#ifdef CONFIG_PM_SLEEP
/* powers down audio subsystem for suspend */
int snd_soc_suspend(struct device *dev)
struct snd_soc_card *card = dev_get_drvdata(dev);
struct snd_soc_codec *codec;
int i;
-
+
+#ifdef CONFIG_PHONE_INCALL_IS_SUSPEND
+ if(snd_soc_incall_status(0,0))
+ {
+ printk("card is incall cannot into suspend\n");
+ return 0;
+ }
+#endif
/* If the initialization of this soc device failed, there is no codec
* associated with it. Just bail out in this case.
*/
* left with bias OFF or STANDBY and suspended so we must now
* resume. Otherwise the suspend was suppressed.
*/
+
if (codec->driver->resume && codec->suspended) {
switch (codec->dapm.bias_level) {
case SND_SOC_BIAS_STANDBY:
{
struct snd_soc_card *card = dev_get_drvdata(dev);
int i, ac97_control = 0;
-
+
+#ifdef CONFIG_PHONE_INCALL_IS_SUSPEND
+ if(snd_soc_incall_status(0,0))
+ {
+ printk("card is incall cannot into suspend\n");
+ return 0;
+ }
+#endif
/* AC97 devices might have other drivers hanging off them so
* need to resume immediately. Other drivers don't have that
* problem and may take a substantial amount of time to resume
projects / firefly-linux-kernel-4.4.55.git / commitdiff