Merge remote-tracking branch 'origin/develop-3.0-rk30' into develop-3.0
author黄涛 <huangtao@rock-chips.com>
Sun, 25 Mar 2012 07:55:20 +0000 (15:55 +0800)
committer黄涛 <huangtao@rock-chips.com>
Sun, 25 Mar 2012 07:55:20 +0000 (15:55 +0800)
arch/arm/configs/rk30_sdk_defconfig [changed mode: 0644->0755]
drivers/usb/dwc_otg/dwc_otg_cil.h
drivers/usb/dwc_otg/dwc_otg_driver.c
drivers/usb/dwc_otg/dwc_otg_hcd.c
drivers/usb/dwc_otg/dwc_otg_pcd.c

old mode 100644 (file)
new mode 100755 (executable)
index 3fc3d8b..59686ee
@@ -285,7 +285,10 @@ CONFIG_HID_APPLE=y
 CONFIG_HID_ELECOM=y
 CONFIG_HID_MAGICMOUSE=y
 CONFIG_HID_WACOM=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB20_HOST=y
 CONFIG_USB20_OTG=y
 CONFIG_MMC=y
 CONFIG_MMC_UNSAFE_RESUME=y
index a385a26a80ae5be0b304e3cb894edd66bd021d2b..a93555ed306adf72be20c5597cbfad1f888a285f 100755 (executable)
@@ -429,7 +429,7 @@ typedef struct dwc_otg_core_params
         * Note: The FPGA configuration supports a maximum of 12 host channels.
         */
        int32_t host_channels;
-#define dwc_param_host_channels_default 12
+#define dwc_param_host_channels_default 16
 
        /** The number of endpoints in addition to EP0 available for device 
         * mode operations. 
index 7cd74ca76899cfebbf5459fa0ad9594f5f570eea..81d911f62fd6e79103fd08d64279cb89687292e3 100755 (executable)
@@ -2012,6 +2012,9 @@ static __devinit int host20_driver_probe(struct platform_device *pdev)
        cru_set_soft_reset(SOFT_RST_USB_HOST_2_0_PHY, false);
        cru_set_soft_reset(SOFT_RST_USB_HOST_2_0_CONTROLLER, false);
 #endif
+#ifdef CONFIG_ARCH_RK30  
+    *(unsigned int*)(USBGRF_UOC1_CON2+4) = ((1<<5)|((1<<5)<<16));
+#endif    
        if (dwc_otg_device == 0) 
        {
                dev_err(dev, "kmalloc of dwc_otg_device failed\n");
index b13da8738860d158351fc419028d4fcf6454859f..3c186646b6f8fc906cda9172c71fa863515497a8 100755 (executable)
@@ -1396,7 +1396,6 @@ void dwc_otg_hcd_free(struct usb_hcd *_hcd)
        return;
 }
 
-
 #ifdef DEBUG
 static void dump_urb_info(struct urb *_urb, char* _fn_name)
 {
@@ -1511,17 +1510,6 @@ int dwc_otg_hcd_urb_enqueue(struct usb_hcd *_hcd,
                return retval;
        }
 #endif
-#if 1
-       /*
-        * Make sure the start of frame interrupt is enabled now that
-        * we know we should have queued data. The SOF interrupt
-        * handler automatically disables itself when idle to reduce
-        * the number of interrupts. See dwc_otg_hcd_handle_sof_intr()
-        * for the disable
-        */
-       dwc_modify_reg32(&dwc_otg_hcd->core_if->core_global_regs->gintmsk, 0,
-                        DWC_SOF_INTR_MASK);
-#endif
 #ifdef DEBUG
            if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB)) {
                dump_urb_info(_urb, "dwc_otg_hcd_urb_enqueue");
@@ -1544,6 +1532,17 @@ int dwc_otg_hcd_urb_enqueue(struct usb_hcd *_hcd,
                           "Error status %d\n", retval);
                dwc_otg_hcd_qtd_free(qtd);
        }
+#if 1
+       /*
+        * Make sure the start of frame interrupt is enabled now that
+        * we know we should have queued data. The SOF interrupt
+        * handler automatically disables itself when idle to reduce
+        * the number of interrupts. See dwc_otg_hcd_handle_sof_intr()
+        * for the disable
+        */
+       dwc_modify_reg32(&dwc_otg_hcd->core_if->core_global_regs->gintmsk, 0,
+                        DWC_SOF_INTR_MASK);
+#endif
 out:
 
        return retval;
index 6a2f4473df0eb358755df0732893f72437ca9632..1749a24f2590ba821e134b9b3a17fb2d2f9d1a40 100755 (executable)
@@ -1912,7 +1912,7 @@ int dwc_otg_pcd_init(struct device *dev)
     pcd->vbus_status  = 0;
     pcd->phy_suspend  = 0;
     if(dwc_otg_is_device_mode(core_if))
-        mod_timer(&pcd->check_vbus_timer, jiffies+(HZ<<2)); // delay 16 S +(HZ<<4)
+        mod_timer(&pcd->check_vbus_timer, jiffies+(HZ<<4)); // delay 16 S
        DWC_PRINT("%s pass,everest\n", __func__);
 //     dwc_otg_pcd_start_vbus_timer( pcd );
        return 0;