hook up getOpcodeName for ARM so that "llc -show-mc-inst" includes
authorChris Lattner <sabre@nondot.org>
Thu, 28 Oct 2010 21:37:33 +0000 (21:37 +0000)
committerChris Lattner <sabre@nondot.org>
Thu, 28 Oct 2010 21:37:33 +0000 (21:37 +0000)
the opcode string in the inst dump, e.g.:
vmov r2, r3, d17             @ encoding: [0x31,0x2b,0x53,0xec]
                                        @ <MCInst #989 VMOVRRD
                                        @  <MCOperand Reg:68>
                                        @  <MCOperand Reg:69>
                                        @  <MCOperand Reg:19>
                                        @  <MCOperand Imm:14>
                                        @  <MCOperand Reg:0>>

The "VMOVRRD" is new.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117609 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
lib/Target/ARM/InstPrinter/ARMInstPrinter.h

index 21b3e1c32a27cb6e552e65017457ad414dcdbd95..7ea438bebd304cfd1e68193a0e0e3d34af350098 100644 (file)
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
+#define GET_INSTRUCTION_NAME
 #include "ARMGenAsmWriter.inc"
 
+StringRef ARMInstPrinter::getOpcodeName(unsigned Opcode) const {
+  return getInstructionName(Opcode);
+}
+
+
 void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
   // Check for MOVs and print canonical forms, instead.
   if (MI->getOpcode() == ARM::MOVs) {
index 47c74700feeab65e3d36e5591ea1405996856a5c..1ae0988d92463be6badd8989ffc27ed9e84649cb 100644 (file)
@@ -24,6 +24,9 @@ public:
   ARMInstPrinter(const MCAsmInfo &MAI) : MCInstPrinter(MAI) {}
 
   virtual void printInst(const MCInst *MI, raw_ostream &O);
+  virtual StringRef getOpcodeName(unsigned Opcode) const;
+
+  static const char *getInstructionName(unsigned Opcode);
 
   // Autogenerated by tblgen.
   void printInstruction(const MCInst *MI, raw_ostream &O);