Prevent x86-specific DAGCombine from creating nodes with illegal type (which could...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136148 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 2c62b93f7bde53515310a65f23535477e3e52581..1c87f14ad4557d846ced87c2dceb3da18f3de465 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -4520,7 +4520,8 @@ static SDValue EltsFromConsecutiveLoads(EVT VT, SmallVectorImpl<SDValue> &Elts,
                        LDBase->getPointerInfo(),
                        LDBase->isVolatile(), LDBase->isNonTemporal(),
                        LDBase->getAlignment());
-  } else if (NumElems == 4 && LastLoadedElt == 1) {
+  } else if (NumElems == 4 && LastLoadedElt == 1 &&
+             DAG.getTargetLoweringInfo().isTypeLegal(MVT::v2i64)) {
     SDVTList Tys = DAG.getVTList(MVT::v2i64, MVT::Other);
     SDValue Ops[] = { LDBase->getChain(), LDBase->getBasePtr() };
     SDValue ResNode = DAG.getMemIntrinsicNode(X86ISD::VZEXT_LOAD, DL, Tys,

diff --git a/test/CodeGen/X86/split-vector-bitcast.ll b/test/CodeGen/X86/split-vector-bitcast.ll
index 79cc1202dc1333d7cb585aab4d24310d28d5368d..fae15cfaf26e77835253c1bf0f2917b872842d17 100644 (file)
--- a/test/CodeGen/X86/split-vector-bitcast.ll
+++ b/test/CodeGen/X86/split-vector-bitcast.ll
@@ -1,7 +1,6 @@
 ; RUN: llc < %s -march=x86 -mattr=-sse2,+sse | grep addps
 
-; XFAIL: *
-; PR10497
+; PR10497 + another isel issue with sse2 disabled
 ; (This is primarily checking that this construct doesn't crash.)
 define void @a(<2 x float>* %a, <2 x i32>* %b) {
   %cc = load <2 x float>* %a