The interface to instruction scheduling is now just a call to get the pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1702 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/SparcV9/SparcV9TargetMachine.cpp b/lib/Target/SparcV9/SparcV9TargetMachine.cpp
index 91e51d88d2840cc2a61b2d751d0a29751dd0e659..422dda02bf49b3bf850582c658dce90639de26be 100644 (file)
--- a/lib/Target/SparcV9/SparcV9TargetMachine.cpp
+++ b/lib/Target/SparcV9/SparcV9TargetMachine.cpp
@@ -223,17 +223,6 @@ public:
   }
 };
 
-class InstructionScheduling : public MethodPass {
-  TargetMachine &Target;
-public:
-  inline InstructionScheduling(TargetMachine &T) : Target(T) {}
-  bool runOnMethod(Method *M) {
-    if (ScheduleInstructionsWithSSA(M, Target))
-      cerr << "Instr scheduling failed for method " << M->getName() << "\n\n";
-    return false;
-  }
-};
-
 struct FreeMachineCodeForMethod : public MethodPass {
   static void freeMachineCode(Instruction *I) {
     MachineCodeForInstruction::destroy(I);
@@ -258,7 +247,7 @@ void UltraSparc::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) {
 
   PM.add(new InstructionSelection(*this));
 
-  //PM.add(new InstructionScheduling(*this));
+  //PM.add(createInstructionSchedulingWithSSAPass(*this));
 
   PM.add(getRegisterAllocator(*this));